Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 46
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 20:11:27.458764 lava-dispatcher, installed at version: 2024.03
2 20:11:27.458960 start: 0 validate
3 20:11:27.459093 Start time: 2024-05-28 20:11:27.459084+00:00 (UTC)
4 20:11:27.459212 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:11:27.459340 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:11:27.738928 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:11:27.739647 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 20:11:28.000601 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:11:28.000772 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 20:11:28.250392 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:11:28.250556 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:11:28.510211 Using caching service: 'http://localhost/cache/?uri=%s'
13 20:11:28.510392 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 20:11:28.769672 validate duration: 1.31
16 20:11:28.769952 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:11:28.770057 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:11:28.770146 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:11:28.770268 Not decompressing ramdisk as can be used compressed.
20 20:11:28.770351 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 20:11:28.770414 saving as /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/ramdisk/initrd.cpio.gz
22 20:11:28.770479 total size: 5628169 (5 MB)
23 20:11:28.771662 progress 0 % (0 MB)
24 20:11:28.773403 progress 5 % (0 MB)
25 20:11:28.775003 progress 10 % (0 MB)
26 20:11:28.776393 progress 15 % (0 MB)
27 20:11:28.778012 progress 20 % (1 MB)
28 20:11:28.779464 progress 25 % (1 MB)
29 20:11:28.781002 progress 30 % (1 MB)
30 20:11:28.782569 progress 35 % (1 MB)
31 20:11:28.784017 progress 40 % (2 MB)
32 20:11:28.785594 progress 45 % (2 MB)
33 20:11:28.786952 progress 50 % (2 MB)
34 20:11:28.788492 progress 55 % (2 MB)
35 20:11:28.790060 progress 60 % (3 MB)
36 20:11:28.791459 progress 65 % (3 MB)
37 20:11:28.792994 progress 70 % (3 MB)
38 20:11:28.794430 progress 75 % (4 MB)
39 20:11:28.795946 progress 80 % (4 MB)
40 20:11:28.797341 progress 85 % (4 MB)
41 20:11:28.798944 progress 90 % (4 MB)
42 20:11:28.800463 progress 95 % (5 MB)
43 20:11:28.801914 progress 100 % (5 MB)
44 20:11:28.802120 5 MB downloaded in 0.03 s (169.63 MB/s)
45 20:11:28.802317 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:11:28.802556 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:11:28.802642 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:11:28.802725 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:11:28.802857 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 20:11:28.802926 saving as /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/kernel/Image
52 20:11:28.802988 total size: 54682112 (52 MB)
53 20:11:28.803050 No compression specified
54 20:11:28.804258 progress 0 % (0 MB)
55 20:11:28.818222 progress 5 % (2 MB)
56 20:11:28.832325 progress 10 % (5 MB)
57 20:11:28.846499 progress 15 % (7 MB)
58 20:11:28.860473 progress 20 % (10 MB)
59 20:11:28.874557 progress 25 % (13 MB)
60 20:11:28.888349 progress 30 % (15 MB)
61 20:11:28.902360 progress 35 % (18 MB)
62 20:11:28.916237 progress 40 % (20 MB)
63 20:11:28.930298 progress 45 % (23 MB)
64 20:11:28.944319 progress 50 % (26 MB)
65 20:11:28.958350 progress 55 % (28 MB)
66 20:11:28.972335 progress 60 % (31 MB)
67 20:11:28.986116 progress 65 % (33 MB)
68 20:11:29.000088 progress 70 % (36 MB)
69 20:11:29.013870 progress 75 % (39 MB)
70 20:11:29.027926 progress 80 % (41 MB)
71 20:11:29.042096 progress 85 % (44 MB)
72 20:11:29.056013 progress 90 % (46 MB)
73 20:11:29.070192 progress 95 % (49 MB)
74 20:11:29.083844 progress 100 % (52 MB)
75 20:11:29.084084 52 MB downloaded in 0.28 s (185.52 MB/s)
76 20:11:29.084275 end: 1.2.1 http-download (duration 00:00:00) [common]
78 20:11:29.084607 end: 1.2 download-retry (duration 00:00:00) [common]
79 20:11:29.084694 start: 1.3 download-retry (timeout 00:10:00) [common]
80 20:11:29.084779 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 20:11:29.084911 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 20:11:29.084980 saving as /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 20:11:29.085041 total size: 57695 (0 MB)
84 20:11:29.085101 No compression specified
85 20:11:29.086232 progress 56 % (0 MB)
86 20:11:29.086541 progress 100 % (0 MB)
87 20:11:29.086744 0 MB downloaded in 0.00 s (32.36 MB/s)
88 20:11:29.086867 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:11:29.087093 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:11:29.087177 start: 1.4 download-retry (timeout 00:10:00) [common]
92 20:11:29.087259 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 20:11:29.087373 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 20:11:29.087440 saving as /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/nfsrootfs/full.rootfs.tar
95 20:11:29.087500 total size: 120894716 (115 MB)
96 20:11:29.087561 Using unxz to decompress xz
97 20:11:29.091687 progress 0 % (0 MB)
98 20:11:29.440255 progress 5 % (5 MB)
99 20:11:29.801783 progress 10 % (11 MB)
100 20:11:30.156682 progress 15 % (17 MB)
101 20:11:30.487505 progress 20 % (23 MB)
102 20:11:30.783666 progress 25 % (28 MB)
103 20:11:31.145791 progress 30 % (34 MB)
104 20:11:31.488471 progress 35 % (40 MB)
105 20:11:31.655153 progress 40 % (46 MB)
106 20:11:31.835860 progress 45 % (51 MB)
107 20:11:32.147827 progress 50 % (57 MB)
108 20:11:32.525817 progress 55 % (63 MB)
109 20:11:32.871268 progress 60 % (69 MB)
110 20:11:33.216031 progress 65 % (74 MB)
111 20:11:33.558901 progress 70 % (80 MB)
112 20:11:33.915783 progress 75 % (86 MB)
113 20:11:34.256847 progress 80 % (92 MB)
114 20:11:34.600988 progress 85 % (98 MB)
115 20:11:34.956915 progress 90 % (103 MB)
116 20:11:35.281882 progress 95 % (109 MB)
117 20:11:35.644642 progress 100 % (115 MB)
118 20:11:35.650017 115 MB downloaded in 6.56 s (17.57 MB/s)
119 20:11:35.650280 end: 1.4.1 http-download (duration 00:00:07) [common]
121 20:11:35.650544 end: 1.4 download-retry (duration 00:00:07) [common]
122 20:11:35.650634 start: 1.5 download-retry (timeout 00:09:53) [common]
123 20:11:35.650721 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 20:11:35.650869 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 20:11:35.650938 saving as /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/modules/modules.tar
126 20:11:35.650998 total size: 8607916 (8 MB)
127 20:11:35.651061 Using unxz to decompress xz
128 20:11:35.655274 progress 0 % (0 MB)
129 20:11:35.675043 progress 5 % (0 MB)
130 20:11:35.702662 progress 10 % (0 MB)
131 20:11:35.730691 progress 15 % (1 MB)
132 20:11:35.756709 progress 20 % (1 MB)
133 20:11:35.783759 progress 25 % (2 MB)
134 20:11:35.810091 progress 30 % (2 MB)
135 20:11:35.834716 progress 35 % (2 MB)
136 20:11:35.860884 progress 40 % (3 MB)
137 20:11:35.885410 progress 45 % (3 MB)
138 20:11:35.909215 progress 50 % (4 MB)
139 20:11:35.933746 progress 55 % (4 MB)
140 20:11:35.958018 progress 60 % (4 MB)
141 20:11:35.981643 progress 65 % (5 MB)
142 20:11:36.007818 progress 70 % (5 MB)
143 20:11:36.034545 progress 75 % (6 MB)
144 20:11:36.057888 progress 80 % (6 MB)
145 20:11:36.081358 progress 85 % (7 MB)
146 20:11:36.104672 progress 90 % (7 MB)
147 20:11:36.133525 progress 95 % (7 MB)
148 20:11:36.161838 progress 100 % (8 MB)
149 20:11:36.167586 8 MB downloaded in 0.52 s (15.89 MB/s)
150 20:11:36.167882 end: 1.5.1 http-download (duration 00:00:01) [common]
152 20:11:36.168212 end: 1.5 download-retry (duration 00:00:01) [common]
153 20:11:36.168304 start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
154 20:11:36.168396 start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
155 20:11:39.736990 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe
156 20:11:39.737195 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 20:11:39.737335 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 20:11:39.737506 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l
159 20:11:39.737636 makedir: /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin
160 20:11:39.737738 makedir: /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/tests
161 20:11:39.737838 makedir: /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/results
162 20:11:39.737936 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-add-keys
163 20:11:39.738076 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-add-sources
164 20:11:39.738202 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-background-process-start
165 20:11:39.738327 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-background-process-stop
166 20:11:39.738450 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-common-functions
167 20:11:39.738572 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-echo-ipv4
168 20:11:39.738698 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-install-packages
169 20:11:39.738820 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-installed-packages
170 20:11:39.738943 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-os-build
171 20:11:39.739066 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-probe-channel
172 20:11:39.739186 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-probe-ip
173 20:11:39.739310 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-target-ip
174 20:11:39.739431 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-target-mac
175 20:11:39.739551 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-target-storage
176 20:11:39.739673 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-case
177 20:11:39.739795 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-event
178 20:11:39.739914 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-feedback
179 20:11:39.740034 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-raise
180 20:11:39.740154 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-reference
181 20:11:39.740275 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-runner
182 20:11:39.740399 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-set
183 20:11:39.740522 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-test-shell
184 20:11:39.740650 Updating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-add-keys (debian)
185 20:11:39.740802 Updating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-add-sources (debian)
186 20:11:39.740938 Updating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-install-packages (debian)
187 20:11:39.741073 Updating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-installed-packages (debian)
188 20:11:39.741207 Updating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/bin/lava-os-build (debian)
189 20:11:39.741567 Creating /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/environment
190 20:11:39.741668 LAVA metadata
191 20:11:39.741734 - LAVA_JOB_ID=14063104
192 20:11:39.741796 - LAVA_DISPATCHER_IP=192.168.201.1
193 20:11:39.741896 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 20:11:39.741961 skipped lava-vland-overlay
195 20:11:39.742034 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 20:11:39.742123 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 20:11:39.742183 skipped lava-multinode-overlay
198 20:11:39.742254 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 20:11:39.742331 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 20:11:39.742403 Loading test definitions
201 20:11:39.742488 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 20:11:39.742558 Using /lava-14063104 at stage 0
203 20:11:39.742834 uuid=14063104_1.6.2.3.1 testdef=None
204 20:11:39.742920 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 20:11:39.743003 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 20:11:39.743448 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 20:11:39.743668 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 20:11:39.744214 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 20:11:39.744440 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 20:11:39.744970 runner path: /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/0/tests/0_timesync-off test_uuid 14063104_1.6.2.3.1
213 20:11:39.745127 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 20:11:39.745391 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 20:11:39.745463 Using /lava-14063104 at stage 0
217 20:11:39.745559 Fetching tests from https://github.com/kernelci/test-definitions.git
218 20:11:39.745645 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/0/tests/1_kselftest-tpm2'
219 20:11:42.248435 Running '/usr/bin/git checkout kernelci.org
220 20:11:42.398978 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 20:11:42.400498 uuid=14063104_1.6.2.3.5 testdef=None
222 20:11:42.400805 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 20:11:42.401419 start: 1.6.2.3.6 test-overlay (timeout 00:09:46) [common]
225 20:11:42.403256 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 20:11:42.403811 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:46) [common]
228 20:11:42.406331 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 20:11:42.406905 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
231 20:11:42.409272 runner path: /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/0/tests/1_kselftest-tpm2 test_uuid 14063104_1.6.2.3.5
232 20:11:42.409512 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 20:11:42.409662 BRANCH='cip'
234 20:11:42.409803 SKIPFILE='/dev/null'
235 20:11:42.409943 SKIP_INSTALL='True'
236 20:11:42.410080 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 20:11:42.410225 TST_CASENAME=''
238 20:11:42.410363 TST_CMDFILES='tpm2'
239 20:11:42.410659 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 20:11:42.411181 Creating lava-test-runner.conf files
242 20:11:42.411330 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14063104/lava-overlay-333q3m8l/lava-14063104/0 for stage 0
243 20:11:42.411528 - 0_timesync-off
244 20:11:42.411685 - 1_kselftest-tpm2
245 20:11:42.411892 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 20:11:42.412089 start: 1.6.2.4 compress-overlay (timeout 00:09:46) [common]
247 20:11:50.010004 end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
248 20:11:50.010162 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
249 20:11:50.010252 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 20:11:50.010348 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 20:11:50.010439 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
252 20:11:50.176226 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 20:11:50.176611 start: 1.6.4 extract-modules (timeout 00:09:39) [common]
254 20:11:50.176728 extracting modules file /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe
255 20:11:50.391570 extracting modules file /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063104/extract-overlay-ramdisk-a32vjri5/ramdisk
256 20:11:50.615686 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 20:11:50.615882 start: 1.6.5 apply-overlay-tftp (timeout 00:09:38) [common]
258 20:11:50.615984 [common] Applying overlay to NFS
259 20:11:50.616052 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063104/compress-overlay-meu6mmr9/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe
260 20:11:51.545128 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 20:11:51.545319 start: 1.6.6 configure-preseed-file (timeout 00:09:37) [common]
262 20:11:51.545416 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 20:11:51.545503 start: 1.6.7 compress-ramdisk (timeout 00:09:37) [common]
264 20:11:51.545587 Building ramdisk /var/lib/lava/dispatcher/tmp/14063104/extract-overlay-ramdisk-a32vjri5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14063104/extract-overlay-ramdisk-a32vjri5/ramdisk
265 20:11:51.886852 >> 130335 blocks
266 20:11:53.925144 rename /var/lib/lava/dispatcher/tmp/14063104/extract-overlay-ramdisk-a32vjri5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/ramdisk/ramdisk.cpio.gz
267 20:11:53.925643 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 20:11:53.925756 start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
269 20:11:53.925859 start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
270 20:11:53.925967 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/kernel/Image']
271 20:12:07.282183 Returned 0 in 13 seconds
272 20:12:07.382790 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/kernel/image.itb
273 20:12:07.754885 output: FIT description: Kernel Image image with one or more FDT blobs
274 20:12:07.755274 output: Created: Tue May 28 21:12:07 2024
275 20:12:07.755352 output: Image 0 (kernel-1)
276 20:12:07.755416 output: Description:
277 20:12:07.755478 output: Created: Tue May 28 21:12:07 2024
278 20:12:07.755542 output: Type: Kernel Image
279 20:12:07.755601 output: Compression: lzma compressed
280 20:12:07.755660 output: Data Size: 13061303 Bytes = 12755.18 KiB = 12.46 MiB
281 20:12:07.755720 output: Architecture: AArch64
282 20:12:07.755777 output: OS: Linux
283 20:12:07.755834 output: Load Address: 0x00000000
284 20:12:07.755890 output: Entry Point: 0x00000000
285 20:12:07.755945 output: Hash algo: crc32
286 20:12:07.755999 output: Hash value: 0578ee26
287 20:12:07.756052 output: Image 1 (fdt-1)
288 20:12:07.756105 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 20:12:07.756157 output: Created: Tue May 28 21:12:07 2024
290 20:12:07.756210 output: Type: Flat Device Tree
291 20:12:07.756265 output: Compression: uncompressed
292 20:12:07.756316 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 20:12:07.756368 output: Architecture: AArch64
294 20:12:07.756419 output: Hash algo: crc32
295 20:12:07.756470 output: Hash value: a9713552
296 20:12:07.756520 output: Image 2 (ramdisk-1)
297 20:12:07.756571 output: Description: unavailable
298 20:12:07.756623 output: Created: Tue May 28 21:12:07 2024
299 20:12:07.756674 output: Type: RAMDisk Image
300 20:12:07.756726 output: Compression: Unknown Compression
301 20:12:07.756778 output: Data Size: 18718451 Bytes = 18279.74 KiB = 17.85 MiB
302 20:12:07.756836 output: Architecture: AArch64
303 20:12:07.756897 output: OS: Linux
304 20:12:07.756950 output: Load Address: unavailable
305 20:12:07.757001 output: Entry Point: unavailable
306 20:12:07.757052 output: Hash algo: crc32
307 20:12:07.757102 output: Hash value: da7a14f3
308 20:12:07.757168 output: Default Configuration: 'conf-1'
309 20:12:07.757220 output: Configuration 0 (conf-1)
310 20:12:07.757294 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 20:12:07.757359 output: Kernel: kernel-1
312 20:12:07.757410 output: Init Ramdisk: ramdisk-1
313 20:12:07.757461 output: FDT: fdt-1
314 20:12:07.757512 output: Loadables: kernel-1
315 20:12:07.757563 output:
316 20:12:07.757761 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 20:12:07.757858 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 20:12:07.757957 end: 1.6 prepare-tftp-overlay (duration 00:00:32) [common]
319 20:12:07.758053 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:21) [common]
320 20:12:07.758131 No LXC device requested
321 20:12:07.758207 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 20:12:07.758293 start: 1.8 deploy-device-env (timeout 00:09:21) [common]
323 20:12:07.758373 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 20:12:07.758438 Checking files for TFTP limit of 4294967296 bytes.
325 20:12:07.758930 end: 1 tftp-deploy (duration 00:00:39) [common]
326 20:12:07.759033 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 20:12:07.759129 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 20:12:07.759270 substitutions:
329 20:12:07.759341 - {DTB}: 14063104/tftp-deploy-6d9fb4rv/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 20:12:07.759405 - {INITRD}: 14063104/tftp-deploy-6d9fb4rv/ramdisk/ramdisk.cpio.gz
331 20:12:07.759468 - {KERNEL}: 14063104/tftp-deploy-6d9fb4rv/kernel/Image
332 20:12:07.759529 - {LAVA_MAC}: None
333 20:12:07.759585 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe
334 20:12:07.759640 - {NFS_SERVER_IP}: 192.168.201.1
335 20:12:07.759694 - {PRESEED_CONFIG}: None
336 20:12:07.759748 - {PRESEED_LOCAL}: None
337 20:12:07.759802 - {RAMDISK}: 14063104/tftp-deploy-6d9fb4rv/ramdisk/ramdisk.cpio.gz
338 20:12:07.759856 - {ROOT_PART}: None
339 20:12:07.759912 - {ROOT}: None
340 20:12:07.759966 - {SERVER_IP}: 192.168.201.1
341 20:12:07.760019 - {TEE}: None
342 20:12:07.760072 Parsed boot commands:
343 20:12:07.760131 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 20:12:07.760307 Parsed boot commands: tftpboot 192.168.201.1 14063104/tftp-deploy-6d9fb4rv/kernel/image.itb 14063104/tftp-deploy-6d9fb4rv/kernel/cmdline
345 20:12:07.760395 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 20:12:07.760478 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 20:12:07.760567 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 20:12:07.760650 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 20:12:07.760721 Not connected, no need to disconnect.
350 20:12:07.760793 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 20:12:07.760879 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 20:12:07.760945 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 20:12:07.764610 Setting prompt string to ['lava-test: # ']
354 20:12:07.764971 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 20:12:07.765078 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 20:12:07.765175 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 20:12:07.765293 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 20:12:07.765519 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
359 20:12:33.022413 Returned 0 in 25 seconds
360 20:12:33.123147 end: 2.2.2.1 pdu-reboot (duration 00:00:25) [common]
362 20:12:33.123488 end: 2.2.2 reset-device (duration 00:00:25) [common]
363 20:12:33.123601 start: 2.2.3 depthcharge-start (timeout 00:04:35) [common]
364 20:12:33.123706 Setting prompt string to 'Starting depthcharge on Juniper...'
365 20:12:33.123785 Changing prompt to 'Starting depthcharge on Juniper...'
366 20:12:33.123895 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 20:12:33.124525 [Enter `^Ec?' for help]
368 20:12:33.124634 [DL] 00000000 00000000 010701
369 20:12:33.124723
370 20:12:33.124826
371 20:12:33.124928 F0: 102B 0000
372 20:12:33.125031
373 20:12:33.125131 F3: 1006 0033 [0200]
374 20:12:33.125230
375 20:12:33.125352 F3: 4001 00E0 [0200]
376 20:12:33.125433
377 20:12:33.125541 F3: 0000 0000
378 20:12:33.125638
379 20:12:33.125733 V0: 0000 0000 [0001]
380 20:12:33.125828
381 20:12:33.125924 00: 1027 0002
382 20:12:33.126024
383 20:12:33.126119 01: 0000 0000
384 20:12:33.126216
385 20:12:33.126309 BP: 0C00 0251 [0000]
386 20:12:33.126403
387 20:12:33.126496 G0: 1182 0000
388 20:12:33.126589
389 20:12:33.126682 EC: 0004 0000 [0001]
390 20:12:33.126775
391 20:12:33.126868 S7: 0000 0000 [0000]
392 20:12:33.126964
393 20:12:33.127057 CC: 0000 0000 [0001]
394 20:12:33.127179
395 20:12:33.127272 T0: 0000 00DB [000F]
396 20:12:33.127365
397 20:12:33.127458 Jump to BL
398 20:12:33.127550
399 20:12:33.127643
400 20:12:33.127735
401 20:12:33.127828 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 20:12:33.127924 ARM64: Exception handlers installed.
403 20:12:33.128017 ARM64: Testing exception
404 20:12:33.128110 ARM64: Done test exception
405 20:12:33.128203 WDT: Last reset was cold boot
406 20:12:33.128295 SPI0(PAD0) initialized at 992727 Hz
407 20:12:33.128419 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 20:12:33.128513 Manufacturer: ef
409 20:12:33.128606 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 20:12:33.128699 Probing TPM: . done!
411 20:12:33.128792 TPM ready after 0 ms
412 20:12:33.128885 Connected to device vid:did:rid of 1ae0:0028:00
413 20:12:33.128978 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 20:12:33.129072 Initialized TPM device CR50 revision 0
415 20:12:33.129164 tlcl_send_startup: Startup return code is 0
416 20:12:33.129303 TPM: setup succeeded
417 20:12:33.129397 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 20:12:33.129491 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 20:12:33.129587 in-header: 03 19 00 00 08 00 00 00
420 20:12:33.129680 in-data: a2 e0 47 00 13 00 00 00
421 20:12:33.129774 Chrome EC: UHEPI supported
422 20:12:33.129867 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 20:12:33.129961 in-header: 03 a1 00 00 08 00 00 00
424 20:12:33.130054 in-data: 84 60 60 10 00 00 00 00
425 20:12:33.130146 Phase 1
426 20:12:33.130242 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 20:12:33.130336 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 20:12:33.130430 VB2:vb2_check_recovery() Recovery was requested manually
429 20:12:33.130523 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 20:12:33.130616 Recovery requested (1009000e)
431 20:12:33.130709 tlcl_extend: response is 0
432 20:12:33.130802 tlcl_extend: response is 0
433 20:12:33.130895
434 20:12:33.131025
435 20:12:33.131118 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 20:12:33.131212 ARM64: Exception handlers installed.
437 20:12:33.131305 ARM64: Testing exception
438 20:12:33.131397 ARM64: Done test exception
439 20:12:33.131490 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x200b
440 20:12:33.131583 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 20:12:33.131676 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 20:12:33.131769 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
443 20:12:33.131862 [RTC]rtc_get_frequency_meter,134: input=0x7, output=731
444 20:12:33.131956 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
445 20:12:33.132049 [RTC]rtc_get_frequency_meter,134: input=0x9, output=767
446 20:12:33.132142 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
447 20:12:33.132235 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
448 20:12:33.132328 [RTC]rtc_get_frequency_meter,134: input=0xb, output=800
449 20:12:33.132420 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
450 20:12:33.132513 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
451 20:12:33.132606 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
452 20:12:33.132699 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
453 20:12:33.132791 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
454 20:12:33.132884 in-header: 03 19 00 00 08 00 00 00
455 20:12:33.132976 in-data: a2 e0 47 00 13 00 00 00
456 20:12:33.133088 Chrome EC: UHEPI supported
457 20:12:33.133211 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
458 20:12:33.133328 in-header: 03 a1 00 00 08 00 00 00
459 20:12:33.133423 in-data: 84 60 60 10 00 00 00 00
460 20:12:33.133516 Skip loading cached calibration data
461 20:12:33.133645 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
462 20:12:33.133801 in-header: 03 a1 00 00 08 00 00 00
463 20:12:33.133894 in-data: 84 60 60 10 00 00 00 00
464 20:12:33.134016 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
465 20:12:33.134110 in-header: 03 a1 00 00 08 00 00 00
466 20:12:33.134217 in-data: 84 60 60 10 00 00 00 00
467 20:12:33.134322 ADC[3]: Raw value=1036408 ID=8
468 20:12:33.134415 Manufacturer: ef
469 20:12:33.134507 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
470 20:12:33.134600 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
471 20:12:33.134694 CBFS @ 21000 size 3d4000
472 20:12:33.134787 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
473 20:12:33.134880 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
474 20:12:33.134973 CBFS: Found @ offset 3c880 size 4b
475 20:12:33.135065 DRAM-K: Full Calibration
476 20:12:33.135195 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
477 20:12:33.135329 CBFS @ 21000 size 3d4000
478 20:12:33.135422 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
479 20:12:33.135516 CBFS: Locating 'fallback/dram'
480 20:12:33.135609 CBFS: Found @ offset 24b00 size 12268
481 20:12:33.135701 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
482 20:12:33.135795 ddr_geometry: 1, config: 0x0
483 20:12:33.135887 header.status = 0x0
484 20:12:33.135980 header.magic = 0x44524d4b (expected: 0x44524d4b)
485 20:12:33.136073 header.version = 0x5 (expected: 0x5)
486 20:12:33.136368 header.size = 0x8f0 (expected: 0x8f0)
487 20:12:33.136462 header.config = 0x0
488 20:12:33.136558 header.flags = 0x0
489 20:12:33.136665 header.checksum = 0x0
490 20:12:33.136773 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
491 20:12:33.136926 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
492 20:12:33.137038 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
493 20:12:33.137134 ddr_geometry:1
494 20:12:33.137229 [EMI] new MDL number = 1
495 20:12:33.137363 dram_cbt_mode_extern: 0
496 20:12:33.137498 dram_cbt_mode [RK0]: 0, [RK1]: 0
497 20:12:33.137592 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
498 20:12:33.137686
499 20:12:33.137779
500 20:12:33.137872 [Bianco] ETT version 0.0.0.1
501 20:12:33.138007 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
502 20:12:33.138131
503 20:12:33.138224 vSetVcoreByFreq with vcore:762500, freq=1600
504 20:12:33.138320
505 20:12:33.138412 [DramcInit]
506 20:12:33.138505 AutoRefreshCKEOff AutoREF OFF
507 20:12:33.138599 DDRPhyPLLSetting-CKEOFF
508 20:12:33.138693 DDRPhyPLLSetting-CKEON
509 20:12:33.138786
510 20:12:33.138880 Enable WDQS
511 20:12:33.138973 [ModeRegInit_LP4] CH0 RK0
512 20:12:33.139066 Write Rank0 MR13 =0x18
513 20:12:33.139160 Write Rank0 MR12 =0x5d
514 20:12:33.139253 Write Rank0 MR1 =0x56
515 20:12:33.139384 Write Rank0 MR2 =0x1a
516 20:12:33.139516 Write Rank0 MR11 =0x0
517 20:12:33.139620 Write Rank0 MR22 =0x38
518 20:12:33.139722 Write Rank0 MR14 =0x5d
519 20:12:33.139810 Write Rank0 MR3 =0x30
520 20:12:33.139896 Write Rank0 MR13 =0x58
521 20:12:33.139981 Write Rank0 MR12 =0x5d
522 20:12:33.140064 Write Rank0 MR1 =0x56
523 20:12:33.140148 Write Rank0 MR2 =0x2d
524 20:12:33.140231 Write Rank0 MR11 =0x23
525 20:12:33.140314 Write Rank0 MR22 =0x34
526 20:12:33.140427 Write Rank0 MR14 =0x10
527 20:12:33.140504 Write Rank0 MR3 =0x30
528 20:12:33.140597 Write Rank0 MR13 =0xd8
529 20:12:33.140703 [ModeRegInit_LP4] CH0 RK1
530 20:12:33.140810 Write Rank1 MR13 =0x18
531 20:12:33.140903 Write Rank1 MR12 =0x5d
532 20:12:33.140995 Write Rank1 MR1 =0x56
533 20:12:33.141086 Write Rank1 MR2 =0x1a
534 20:12:33.141178 Write Rank1 MR11 =0x0
535 20:12:33.141291 Write Rank1 MR22 =0x38
536 20:12:33.141398 Write Rank1 MR14 =0x5d
537 20:12:33.141491 Write Rank1 MR3 =0x30
538 20:12:33.141583 Write Rank1 MR13 =0x58
539 20:12:33.141675 Write Rank1 MR12 =0x5d
540 20:12:33.141767 Write Rank1 MR1 =0x56
541 20:12:33.141888 Write Rank1 MR2 =0x2d
542 20:12:33.141980 Write Rank1 MR11 =0x23
543 20:12:33.142072 Write Rank1 MR22 =0x34
544 20:12:33.142163 Write Rank1 MR14 =0x10
545 20:12:33.142255 Write Rank1 MR3 =0x30
546 20:12:33.142347 Write Rank1 MR13 =0xd8
547 20:12:33.142439 [ModeRegInit_LP4] CH1 RK0
548 20:12:33.142532 Write Rank0 MR13 =0x18
549 20:12:33.142624 Write Rank0 MR12 =0x5d
550 20:12:33.142715 Write Rank0 MR1 =0x56
551 20:12:33.142807 Write Rank0 MR2 =0x1a
552 20:12:33.142899 Write Rank0 MR11 =0x0
553 20:12:33.143028 Write Rank0 MR22 =0x38
554 20:12:33.143121 Write Rank0 MR14 =0x5d
555 20:12:33.143213 Write Rank0 MR3 =0x30
556 20:12:33.143305 Write Rank0 MR13 =0x58
557 20:12:33.143397 Write Rank0 MR12 =0x5d
558 20:12:33.143489 Write Rank0 MR1 =0x56
559 20:12:33.143580 Write Rank0 MR2 =0x2d
560 20:12:33.143672 Write Rank0 MR11 =0x23
561 20:12:33.143765 Write Rank0 MR22 =0x34
562 20:12:33.143856 Write Rank0 MR14 =0x10
563 20:12:33.143948 Write Rank0 MR3 =0x30
564 20:12:33.144042 Write Rank0 MR13 =0xd8
565 20:12:33.144135 [ModeRegInit_LP4] CH1 RK1
566 20:12:33.144227 Write Rank1 MR13 =0x18
567 20:12:33.144319 Write Rank1 MR12 =0x5d
568 20:12:33.144411 Write Rank1 MR1 =0x56
569 20:12:33.144503 Write Rank1 MR2 =0x1a
570 20:12:33.144595 Write Rank1 MR11 =0x0
571 20:12:33.144718 Write Rank1 MR22 =0x38
572 20:12:33.144812 Write Rank1 MR14 =0x5d
573 20:12:33.144904 Write Rank1 MR3 =0x30
574 20:12:33.144997 Write Rank1 MR13 =0x58
575 20:12:33.145089 Write Rank1 MR12 =0x5d
576 20:12:33.145181 Write Rank1 MR1 =0x56
577 20:12:33.145292 Write Rank1 MR2 =0x2d
578 20:12:33.145399 Write Rank1 MR11 =0x23
579 20:12:33.145492 Write Rank1 MR22 =0x34
580 20:12:33.145606 Write Rank1 MR14 =0x10
581 20:12:33.145712 Write Rank1 MR3 =0x30
582 20:12:33.145805 Write Rank1 MR13 =0xd8
583 20:12:33.145897 match AC timing 3
584 20:12:33.145989 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
585 20:12:33.146083 [MiockJmeterHQA]
586 20:12:33.146176 vSetVcoreByFreq with vcore:762500, freq=1600
587 20:12:33.146269
588 20:12:33.146361 MIOCK jitter meter ch=0
589 20:12:33.146472
590 20:12:33.146579 1T = (99-17) = 82 dly cells
591 20:12:33.146675 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
592 20:12:33.146770 vSetVcoreByFreq with vcore:725000, freq=1200
593 20:12:33.146863
594 20:12:33.146954 MIOCK jitter meter ch=0
595 20:12:33.147047
596 20:12:33.147139 1T = (94-16) = 78 dly cells
597 20:12:33.147233 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
598 20:12:33.147353 vSetVcoreByFreq with vcore:725000, freq=800
599 20:12:33.147445
600 20:12:33.147537 MIOCK jitter meter ch=0
601 20:12:33.147630
602 20:12:33.147722 1T = (94-16) = 78 dly cells
603 20:12:33.147816 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
604 20:12:33.147937 vSetVcoreByFreq with vcore:762500, freq=1600
605 20:12:33.148029 vSetVcoreByFreq with vcore:762500, freq=1600
606 20:12:33.148122
607 20:12:33.148214 K DRVP
608 20:12:33.148306 1. OCD DRVP=0 CALOUT=0
609 20:12:33.148402 1. OCD DRVP=1 CALOUT=0
610 20:12:33.148499 1. OCD DRVP=2 CALOUT=0
611 20:12:33.148595 1. OCD DRVP=3 CALOUT=0
612 20:12:33.148689 1. OCD DRVP=4 CALOUT=0
613 20:12:33.148784 1. OCD DRVP=5 CALOUT=0
614 20:12:33.148878 1. OCD DRVP=6 CALOUT=0
615 20:12:33.148973 1. OCD DRVP=7 CALOUT=0
616 20:12:33.149067 1. OCD DRVP=8 CALOUT=0
617 20:12:33.149162 1. OCD DRVP=9 CALOUT=1
618 20:12:33.149259
619 20:12:33.149381 1. OCD DRVP calibration OK! DRVP=9
620 20:12:33.149476
621 20:12:33.149569
622 20:12:33.149661
623 20:12:33.149753 K ODTN
624 20:12:33.149845 3. OCD ODTN=0 ,CALOUT=1
625 20:12:33.149943 3. OCD ODTN=1 ,CALOUT=1
626 20:12:33.150038 3. OCD ODTN=2 ,CALOUT=1
627 20:12:33.150132 3. OCD ODTN=3 ,CALOUT=1
628 20:12:33.150227 3. OCD ODTN=4 ,CALOUT=1
629 20:12:33.150321 3. OCD ODTN=5 ,CALOUT=1
630 20:12:33.150442 3. OCD ODTN=6 ,CALOUT=1
631 20:12:33.150537 3. OCD ODTN=7 ,CALOUT=0
632 20:12:33.150662
633 20:12:33.150755 3. OCD ODTN calibration OK! ODTN=7
634 20:12:33.150850
635 20:12:33.150942 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
636 20:12:33.151034 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
637 20:12:33.151127 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
638 20:12:33.151220
639 20:12:33.151370 K DRVP
640 20:12:33.151462 1. OCD DRVP=0 CALOUT=0
641 20:12:33.151557 1. OCD DRVP=1 CALOUT=0
642 20:12:33.151652 1. OCD DRVP=2 CALOUT=0
643 20:12:33.151746 1. OCD DRVP=3 CALOUT=0
644 20:12:33.151840 1. OCD DRVP=4 CALOUT=0
645 20:12:33.151954 1. OCD DRVP=5 CALOUT=0
646 20:12:33.152061 1. OCD DRVP=6 CALOUT=0
647 20:12:33.152155 1. OCD DRVP=7 CALOUT=0
648 20:12:33.152249 1. OCD DRVP=8 CALOUT=0
649 20:12:33.152344 1. OCD DRVP=9 CALOUT=0
650 20:12:33.152669 1. OCD DRVP=10 CALOUT=1
651 20:12:33.152811
652 20:12:33.152970 1. OCD DRVP calibration OK! DRVP=10
653 20:12:33.153069
654 20:12:33.153165
655 20:12:33.153279
656 20:12:33.153416 K ODTN
657 20:12:33.153526 3. OCD ODTN=0 ,CALOUT=1
658 20:12:33.153636 3. OCD ODTN=1 ,CALOUT=1
659 20:12:33.153770 3. OCD ODTN=2 ,CALOUT=1
660 20:12:33.153869 3. OCD ODTN=3 ,CALOUT=1
661 20:12:33.153967 3. OCD ODTN=4 ,CALOUT=1
662 20:12:33.154064 3. OCD ODTN=5 ,CALOUT=1
663 20:12:33.154160 3. OCD ODTN=6 ,CALOUT=1
664 20:12:33.154256 3. OCD ODTN=7 ,CALOUT=1
665 20:12:33.154380 3. OCD ODTN=8 ,CALOUT=1
666 20:12:33.154476 3. OCD ODTN=9 ,CALOUT=1
667 20:12:33.154591 3. OCD ODTN=10 ,CALOUT=1
668 20:12:33.154696 3. OCD ODTN=11 ,CALOUT=1
669 20:12:33.154783 3. OCD ODTN=12 ,CALOUT=1
670 20:12:33.154869 3. OCD ODTN=13 ,CALOUT=1
671 20:12:33.154955 3. OCD ODTN=14 ,CALOUT=0
672 20:12:33.155040
673 20:12:33.155123 3. OCD ODTN calibration OK! ODTN=14
674 20:12:33.155208
675 20:12:33.155291 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
676 20:12:33.155375 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
677 20:12:33.155467 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
678 20:12:33.155554
679 20:12:33.155637 [DramcInit]
680 20:12:33.155723 AutoRefreshCKEOff AutoREF OFF
681 20:12:33.155814 DDRPhyPLLSetting-CKEOFF
682 20:12:33.155906 DDRPhyPLLSetting-CKEON
683 20:12:33.155997
684 20:12:33.156089 Enable WDQS
685 20:12:33.156180 ==
686 20:12:33.156273 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 20:12:33.156366 fsp= 1, odt_onoff= 1, Byte mode= 0
688 20:12:33.156492 ==
689 20:12:33.156579 [Duty_Offset_Calibration]
690 20:12:33.156663
691 20:12:33.156747 ===========================
692 20:12:33.156830 B0:0 B1:1 CA:1
693 20:12:33.156913 ==
694 20:12:33.156998 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 20:12:33.157081 fsp= 1, odt_onoff= 1, Byte mode= 0
696 20:12:33.157164 ==
697 20:12:33.157248 [Duty_Offset_Calibration]
698 20:12:33.157425
699 20:12:33.157511 ===========================
700 20:12:33.157597 B0:1 B1:1 CA:0
701 20:12:33.157694 [ModeRegInit_LP4] CH0 RK0
702 20:12:33.157778 Write Rank0 MR13 =0x18
703 20:12:33.157891 Write Rank0 MR12 =0x5d
704 20:12:33.157974 Write Rank0 MR1 =0x56
705 20:12:33.158057 Write Rank0 MR2 =0x1a
706 20:12:33.158140 Write Rank0 MR11 =0x0
707 20:12:33.158223 Write Rank0 MR22 =0x38
708 20:12:33.158305 Write Rank0 MR14 =0x5d
709 20:12:33.158388 Write Rank0 MR3 =0x30
710 20:12:33.158471 Write Rank0 MR13 =0x58
711 20:12:33.158554 Write Rank0 MR12 =0x5d
712 20:12:33.158637 Write Rank0 MR1 =0x56
713 20:12:33.158720 Write Rank0 MR2 =0x2d
714 20:12:33.158802 Write Rank0 MR11 =0x23
715 20:12:33.158913 Write Rank0 MR22 =0x34
716 20:12:33.158995 Write Rank0 MR14 =0x10
717 20:12:33.159078 Write Rank0 MR3 =0x30
718 20:12:33.159161 Write Rank0 MR13 =0xd8
719 20:12:33.159244 [ModeRegInit_LP4] CH0 RK1
720 20:12:33.159327 Write Rank1 MR13 =0x18
721 20:12:33.159409 Write Rank1 MR12 =0x5d
722 20:12:33.159492 Write Rank1 MR1 =0x56
723 20:12:33.159608 Write Rank1 MR2 =0x1a
724 20:12:33.159691 Write Rank1 MR11 =0x0
725 20:12:33.159774 Write Rank1 MR22 =0x38
726 20:12:33.159856 Write Rank1 MR14 =0x5d
727 20:12:33.159939 Write Rank1 MR3 =0x30
728 20:12:33.160022 Write Rank1 MR13 =0x58
729 20:12:33.160104 Write Rank1 MR12 =0x5d
730 20:12:33.160193 Write Rank1 MR1 =0x56
731 20:12:33.160278 Write Rank1 MR2 =0x2d
732 20:12:33.160361 Write Rank1 MR11 =0x23
733 20:12:33.160443 Write Rank1 MR22 =0x34
734 20:12:33.160526 Write Rank1 MR14 =0x10
735 20:12:33.160609 Write Rank1 MR3 =0x30
736 20:12:33.160692 Write Rank1 MR13 =0xd8
737 20:12:33.160775 [ModeRegInit_LP4] CH1 RK0
738 20:12:33.160908 Write Rank0 MR13 =0x18
739 20:12:33.161043 Write Rank0 MR12 =0x5d
740 20:12:33.161128 Write Rank0 MR1 =0x56
741 20:12:33.161211 Write Rank0 MR2 =0x1a
742 20:12:33.161320 Write Rank0 MR11 =0x0
743 20:12:33.161376 Write Rank0 MR22 =0x38
744 20:12:33.161430 Write Rank0 MR14 =0x5d
745 20:12:33.161484 Write Rank0 MR3 =0x30
746 20:12:33.161551 Write Rank0 MR13 =0x58
747 20:12:33.161619 Write Rank0 MR12 =0x5d
748 20:12:33.161672 Write Rank0 MR1 =0x56
749 20:12:33.161726 Write Rank0 MR2 =0x2d
750 20:12:33.161779 Write Rank0 MR11 =0x23
751 20:12:33.161834 Write Rank0 MR22 =0x34
752 20:12:33.161887 Write Rank0 MR14 =0x10
753 20:12:33.161941 Write Rank0 MR3 =0x30
754 20:12:33.161994 Write Rank0 MR13 =0xd8
755 20:12:33.162074 [ModeRegInit_LP4] CH1 RK1
756 20:12:33.162127 Write Rank1 MR13 =0x18
757 20:12:33.162181 Write Rank1 MR12 =0x5d
758 20:12:33.162234 Write Rank1 MR1 =0x56
759 20:12:33.162286 Write Rank1 MR2 =0x1a
760 20:12:33.162339 Write Rank1 MR11 =0x0
761 20:12:33.162393 Write Rank1 MR22 =0x38
762 20:12:33.162446 Write Rank1 MR14 =0x5d
763 20:12:33.162500 Write Rank1 MR3 =0x30
764 20:12:33.162552 Write Rank1 MR13 =0x58
765 20:12:33.162633 Write Rank1 MR12 =0x5d
766 20:12:33.162714 Write Rank1 MR1 =0x56
767 20:12:33.162781 Write Rank1 MR2 =0x2d
768 20:12:33.162835 Write Rank1 MR11 =0x23
769 20:12:33.162889 Write Rank1 MR22 =0x34
770 20:12:33.162943 Write Rank1 MR14 =0x10
771 20:12:33.162998 Write Rank1 MR3 =0x30
772 20:12:33.163053 Write Rank1 MR13 =0xd8
773 20:12:33.163107 match AC timing 3
774 20:12:33.163161 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 20:12:33.163217 DramC Write-DBI off
776 20:12:33.163273 DramC Read-DBI off
777 20:12:33.163327 Write Rank0 MR13 =0x59
778 20:12:33.163382 ==
779 20:12:33.163437 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 20:12:33.163492 fsp= 1, odt_onoff= 1, Byte mode= 0
781 20:12:33.163547 ==
782 20:12:33.163602 === u2Vref_new: 0x56 --> 0x2d
783 20:12:33.163657 === u2Vref_new: 0x58 --> 0x38
784 20:12:33.163712 === u2Vref_new: 0x5a --> 0x39
785 20:12:33.163767 === u2Vref_new: 0x5c --> 0x3c
786 20:12:33.163822 === u2Vref_new: 0x5e --> 0x3d
787 20:12:33.163877 === u2Vref_new: 0x60 --> 0xa0
788 20:12:33.163932 [CA 0] Center 33 (4~63) winsize 60
789 20:12:33.163986 [CA 1] Center 34 (5~63) winsize 59
790 20:12:33.164040 [CA 2] Center 29 (1~57) winsize 57
791 20:12:33.164094 [CA 3] Center 24 (-3~51) winsize 55
792 20:12:33.164149 [CA 4] Center 25 (-2~52) winsize 55
793 20:12:33.164203 [CA 5] Center 30 (2~58) winsize 57
794 20:12:33.164257
795 20:12:33.164335 [CATrainingPosCal] consider 1 rank data
796 20:12:33.164393 u2DelayCellTimex100 = 762/100 ps
797 20:12:33.164448 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
798 20:12:33.164503 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
799 20:12:33.164558 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
800 20:12:33.164613 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
801 20:12:33.164668 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
802 20:12:33.164723 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
803 20:12:33.164777
804 20:12:33.164832 CA PerBit enable=1, Macro0, CA PI delay=24
805 20:12:33.164887 === u2Vref_new: 0x56 --> 0x2d
806 20:12:33.164942
807 20:12:33.164995 Vref(ca) range 1: 22
808 20:12:33.165051
809 20:12:33.165105 CS Dly= 10 (41-0-32)
810 20:12:33.165159 Write Rank0 MR13 =0xd8
811 20:12:33.165214 Write Rank0 MR13 =0xd8
812 20:12:33.165276 Write Rank0 MR12 =0x56
813 20:12:33.165332 Write Rank1 MR13 =0x59
814 20:12:33.165387 ==
815 20:12:33.165661 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
816 20:12:33.165724 fsp= 1, odt_onoff= 1, Byte mode= 0
817 20:12:33.165781 ==
818 20:12:33.165836 === u2Vref_new: 0x56 --> 0x2d
819 20:12:33.165892 === u2Vref_new: 0x58 --> 0x38
820 20:12:33.165946 === u2Vref_new: 0x5a --> 0x39
821 20:12:33.166001 === u2Vref_new: 0x5c --> 0x3c
822 20:12:33.166056 === u2Vref_new: 0x5e --> 0x3d
823 20:12:33.166110 === u2Vref_new: 0x60 --> 0xa0
824 20:12:33.166165 [CA 0] Center 34 (5~63) winsize 59
825 20:12:33.166219 [CA 1] Center 34 (6~63) winsize 58
826 20:12:33.166273 [CA 2] Center 29 (0~58) winsize 59
827 20:12:33.166327 [CA 3] Center 23 (-4~51) winsize 56
828 20:12:33.166382 [CA 4] Center 24 (-3~52) winsize 56
829 20:12:33.166436 [CA 5] Center 30 (1~59) winsize 59
830 20:12:33.166491
831 20:12:33.166546 [CATrainingPosCal] consider 2 rank data
832 20:12:33.166600 u2DelayCellTimex100 = 762/100 ps
833 20:12:33.166655 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
834 20:12:33.166709 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
835 20:12:33.166764 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
836 20:12:33.166818 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
837 20:12:33.166873 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
838 20:12:33.166928 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
839 20:12:33.166983
840 20:12:33.167036 CA PerBit enable=1, Macro0, CA PI delay=24
841 20:12:33.167091 === u2Vref_new: 0x56 --> 0x2d
842 20:12:33.167146
843 20:12:33.167201 Vref(ca) range 1: 22
844 20:12:33.167255
845 20:12:33.167310 CS Dly= 11 (42-0-32)
846 20:12:33.167365 Write Rank1 MR13 =0xd8
847 20:12:33.167440 Write Rank1 MR13 =0xd8
848 20:12:33.167507 Write Rank1 MR12 =0x56
849 20:12:33.167564 [RankSwap] Rank num 2, (Multi 1), Rank 0
850 20:12:33.167619 Write Rank0 MR2 =0xad
851 20:12:33.167674 [Write Leveling]
852 20:12:33.167730 delay byte0 byte1 byte2 byte3
853 20:12:33.167784
854 20:12:33.167839 10 0 0
855 20:12:33.167895 11 0 0
856 20:12:33.167951 12 0 0
857 20:12:33.168007 13 0 0
858 20:12:33.168063 14 0 0
859 20:12:33.168119 15 0 0
860 20:12:33.168174 16 0 0
861 20:12:33.168230 17 0 0
862 20:12:33.168286 18 0 0
863 20:12:33.168341 19 0 0
864 20:12:33.168397 20 0 0
865 20:12:33.168452 21 0 0
866 20:12:33.168507 22 0 0
867 20:12:33.168563 23 0 0
868 20:12:33.168618 24 0 0
869 20:12:33.168673 25 0 0
870 20:12:33.168729 26 0 ff
871 20:12:33.168784 27 0 ff
872 20:12:33.168840 28 0 ff
873 20:12:33.168894 29 0 ff
874 20:12:33.168950 30 0 ff
875 20:12:33.169005 31 0 ff
876 20:12:33.169060 32 0 ff
877 20:12:33.169116 33 ff ff
878 20:12:33.169172 34 ff ff
879 20:12:33.169227 35 ff ff
880 20:12:33.169304 36 ff ff
881 20:12:33.169362 37 ff ff
882 20:12:33.169417 38 ff ff
883 20:12:33.169472 39 ff ff
884 20:12:33.169528 pass bytecount = 0xff (0xff: all bytes pass)
885 20:12:33.169583
886 20:12:33.169637 DQS0 dly: 33
887 20:12:33.169691 DQS1 dly: 26
888 20:12:33.169746 Write Rank0 MR2 =0x2d
889 20:12:33.169809 [RankSwap] Rank num 2, (Multi 1), Rank 0
890 20:12:33.169896 Write Rank0 MR1 =0xd6
891 20:12:33.169981 [Gating]
892 20:12:33.170079 ==
893 20:12:33.170159 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
894 20:12:33.170217 fsp= 1, odt_onoff= 1, Byte mode= 0
895 20:12:33.170273 ==
896 20:12:33.170329 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0
897 20:12:33.170385 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
898 20:12:33.170467 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
899 20:12:33.170556 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 20:12:33.170644 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 20:12:33.170733 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 20:12:33.170834 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 20:12:33.170939 3 1 28 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
904 20:12:33.171001 3 2 0 |f0f 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
905 20:12:33.171058 3 2 4 |3534 1b1a |(11 11)(11 11) |(0 0)(0 0)| 0
906 20:12:33.171115 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
907 20:12:33.171171 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
908 20:12:33.171228 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
909 20:12:33.171284 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 20:12:33.171341 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
911 20:12:33.171398 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
912 20:12:33.171458 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
913 20:12:33.171515 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
914 20:12:33.171571 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
915 20:12:33.171626 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
916 20:12:33.171682 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
917 20:12:33.171738 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 20:12:33.171795 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 20:12:33.171855 3 3 28 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
920 20:12:33.171912 3 4 0 |1110 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
921 20:12:33.171968 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
922 20:12:33.172023 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
923 20:12:33.172084 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
924 20:12:33.172143 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 20:12:33.172199 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 20:12:33.172254 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 20:12:33.172310 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 20:12:33.172366 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 20:12:33.172426 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 20:12:33.172486 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 20:12:33.172546 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 20:12:33.172602 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 20:12:33.172662 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 20:12:33.172717 [Byte 0] Lead/lag falling Transition (3, 5, 20)
935 20:12:33.172772 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
936 20:12:33.172828 [Byte 0] Lead/lag Transition tap number (2)
937 20:12:33.172883 [Byte 1] Lead/lag falling Transition (3, 5, 24)
938 20:12:33.172938 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
939 20:12:33.173208 [Byte 1] Lead/lag Transition tap number (2)
940 20:12:33.173303 3 6 0 |606 3d3d |(1 1)(11 11) |(0 0)(0 0)| 0
941 20:12:33.173365 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
942 20:12:33.173422 [Byte 0]First pass (3, 6, 4)
943 20:12:33.173477 3 6 8 |4646 606 |(0 0)(1 1) |(0 0)(0 0)| 0
944 20:12:33.173534 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
945 20:12:33.173591 [Byte 1]First pass (3, 6, 12)
946 20:12:33.173646 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 20:12:33.173703 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
948 20:12:33.173759 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 20:12:33.173820 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 20:12:33.173877 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 20:12:33.173934 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 20:12:33.174011 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 20:12:33.174091 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 20:12:33.174168 All bytes gating window > 1UI, Early break!
955 20:12:33.174244
956 20:12:33.174340 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
957 20:12:33.174435
958 20:12:33.174529 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
959 20:12:33.174623
960 20:12:33.174716
961 20:12:33.174810
962 20:12:33.174903 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
963 20:12:33.174997
964 20:12:33.175091 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
965 20:12:33.175189
966 20:12:33.175278
967 20:12:33.175372 Write Rank0 MR1 =0x56
968 20:12:33.175458
969 20:12:33.175544 best RODT dly(2T, 0.5T) = (2, 2)
970 20:12:33.175629
971 20:12:33.175717 best RODT dly(2T, 0.5T) = (2, 2)
972 20:12:33.175802 ==
973 20:12:33.175888 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
974 20:12:33.175974 fsp= 1, odt_onoff= 1, Byte mode= 0
975 20:12:33.176059 ==
976 20:12:33.176145 Start DQ dly to find pass range UseTestEngine =0
977 20:12:33.176230 x-axis: bit #, y-axis: DQ dly (-127~63)
978 20:12:33.176315 RX Vref Scan = 0
979 20:12:33.176400 -26, [0] xxxxxxxx xxxxxxxx [MSB]
980 20:12:33.176488 -25, [0] xxxxxxxx xxxxxxxx [MSB]
981 20:12:33.176575 -24, [0] xxxxxxxx xxxxxxxx [MSB]
982 20:12:33.176662 -23, [0] xxxxxxxx xxxxxxxx [MSB]
983 20:12:33.176748 -22, [0] xxxxxxxx xxxxxxxx [MSB]
984 20:12:33.176835 -21, [0] xxxxxxxx xxxxxxxx [MSB]
985 20:12:33.176922 -20, [0] xxxxxxxx xxxxxxxx [MSB]
986 20:12:33.177008 -19, [0] xxxxxxxx xxxxxxxx [MSB]
987 20:12:33.177094 -18, [0] xxxxxxxx xxxxxxxx [MSB]
988 20:12:33.177181 -17, [0] xxxxxxxx xxxxxxxx [MSB]
989 20:12:33.177274 -16, [0] xxxxxxxx xxxxxxxx [MSB]
990 20:12:33.177362 -15, [0] xxxxxxxx xxxxxxxx [MSB]
991 20:12:33.177450 -14, [0] xxxxxxxx xxxxxxxx [MSB]
992 20:12:33.177511 -13, [0] xxxxxxxx xxxxxxxx [MSB]
993 20:12:33.177567 -12, [0] xxxxxxxx xxxxxxxx [MSB]
994 20:12:33.177622 -11, [0] xxxxxxxx xxxxxxxx [MSB]
995 20:12:33.177677 -10, [0] xxxxxxxx xxxxxxxx [MSB]
996 20:12:33.177732 -9, [0] xxxxxxxx xxxxxxxx [MSB]
997 20:12:33.177788 -8, [0] xxxxxxxx xxxxxxxx [MSB]
998 20:12:33.177843 -7, [0] xxxxxxxx xxxxxxxx [MSB]
999 20:12:33.177899 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1000 20:12:33.177954 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1001 20:12:33.178010 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1002 20:12:33.178065 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1003 20:12:33.178120 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1004 20:12:33.178175 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1005 20:12:33.178230 0, [0] xxxoxoxx xxxxxxxx [MSB]
1006 20:12:33.178287 1, [0] xxxoxoxx xxxoxxxx [MSB]
1007 20:12:33.178342 2, [0] xxxoxoxx xxxoxxxx [MSB]
1008 20:12:33.178397 3, [0] xxxoxooo oxxoxoox [MSB]
1009 20:12:33.178459 4, [0] xxxoxooo ooxoxooo [MSB]
1010 20:12:33.178515 5, [0] xxxoxooo ooxooooo [MSB]
1011 20:12:33.178572 6, [0] xxxooooo ooxooooo [MSB]
1012 20:12:33.178629 7, [0] xxoooooo ooxooooo [MSB]
1013 20:12:33.178685 8, [0] xooooooo oooooooo [MSB]
1014 20:12:33.178740 9, [0] xooooooo oooooooo [MSB]
1015 20:12:33.178799 10, [0] xooooooo oooooooo [MSB]
1016 20:12:33.178856 31, [0] oooooooo oooooooo [MSB]
1017 20:12:33.178912 32, [0] oooxoooo oooooooo [MSB]
1018 20:12:33.178967 33, [0] oooxoooo oooooxoo [MSB]
1019 20:12:33.179023 34, [0] oooxoxxo oooooxxo [MSB]
1020 20:12:33.179078 35, [0] oooxoxxx xooooxxo [MSB]
1021 20:12:33.179134 36, [0] oooxoxxx xooxoxxo [MSB]
1022 20:12:33.179190 37, [0] oooxoxxx xxoxxxxx [MSB]
1023 20:12:33.179245 38, [0] oooxoxxx xxoxxxxx [MSB]
1024 20:12:33.179305 39, [0] oooxoxxx xxoxxxxx [MSB]
1025 20:12:33.179370 40, [0] xooxxxxx xxoxxxxx [MSB]
1026 20:12:33.179432 41, [0] xoxxxxxx xxoxxxxx [MSB]
1027 20:12:33.179489 42, [0] xxxxxxxx xxoxxxxx [MSB]
1028 20:12:33.179545 43, [0] xxxxxxxx xxxxxxxx [MSB]
1029 20:12:33.179601 iDelay=43, Bit 0, Center 25 (11 ~ 39) 29
1030 20:12:33.179655 iDelay=43, Bit 1, Center 24 (8 ~ 41) 34
1031 20:12:33.179709 iDelay=43, Bit 2, Center 23 (7 ~ 40) 34
1032 20:12:33.179763 iDelay=43, Bit 3, Center 15 (0 ~ 31) 32
1033 20:12:33.179823 iDelay=43, Bit 4, Center 22 (6 ~ 39) 34
1034 20:12:33.179878 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
1035 20:12:33.179932 iDelay=43, Bit 6, Center 18 (3 ~ 33) 31
1036 20:12:33.179985 iDelay=43, Bit 7, Center 18 (3 ~ 34) 32
1037 20:12:33.180046 iDelay=43, Bit 8, Center 18 (3 ~ 34) 32
1038 20:12:33.180131 iDelay=43, Bit 9, Center 20 (4 ~ 36) 33
1039 20:12:33.180215 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1040 20:12:33.180299 iDelay=43, Bit 11, Center 18 (1 ~ 35) 35
1041 20:12:33.180383 iDelay=43, Bit 12, Center 20 (5 ~ 36) 32
1042 20:12:33.180462 iDelay=43, Bit 13, Center 17 (3 ~ 32) 30
1043 20:12:33.180518 iDelay=43, Bit 14, Center 18 (3 ~ 33) 31
1044 20:12:33.180573 iDelay=43, Bit 15, Center 20 (4 ~ 36) 33
1045 20:12:33.180627 ==
1046 20:12:33.180684 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1047 20:12:33.180739 fsp= 1, odt_onoff= 1, Byte mode= 0
1048 20:12:33.180794 ==
1049 20:12:33.180848 DQS Delay:
1050 20:12:33.180902 DQS0 = 0, DQS1 = 0
1051 20:12:33.180956 DQM Delay:
1052 20:12:33.181009 DQM0 = 20, DQM1 = 19
1053 20:12:33.181067 DQ Delay:
1054 20:12:33.181158 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1055 20:12:33.181251 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =18
1056 20:12:33.181337 DQ8 =18, DQ9 =20, DQ10 =25, DQ11 =18
1057 20:12:33.181412 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1058 20:12:33.181487
1059 20:12:33.181579
1060 20:12:33.181671 DramC Write-DBI off
1061 20:12:33.181765 ==
1062 20:12:33.181858 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1063 20:12:33.181961 fsp= 1, odt_onoff= 1, Byte mode= 0
1064 20:12:33.182064 ==
1065 20:12:33.182160 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1066 20:12:33.182254
1067 20:12:33.182347 Begin, DQ Scan Range 922~1178
1068 20:12:33.182444
1069 20:12:33.182542
1070 20:12:33.182637 TX Vref Scan disable
1071 20:12:33.182937 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1072 20:12:33.183035 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1073 20:12:33.183134 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1074 20:12:33.183232 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1075 20:12:33.183330 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1076 20:12:33.183426 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1077 20:12:33.183523 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1078 20:12:33.183620 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1079 20:12:33.183716 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1080 20:12:33.183811 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1081 20:12:33.183906 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1082 20:12:33.184002 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1083 20:12:33.184097 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1084 20:12:33.184193 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1085 20:12:33.184289 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1086 20:12:33.184384 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1087 20:12:33.184480 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1088 20:12:33.184575 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1089 20:12:33.184671 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1090 20:12:33.184767 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1091 20:12:33.184862 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1092 20:12:33.184956 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1093 20:12:33.185051 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1094 20:12:33.185147 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1095 20:12:33.185241 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1096 20:12:33.185348 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1097 20:12:33.185444 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1098 20:12:33.185539 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1099 20:12:33.185635 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1100 20:12:33.185733 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1101 20:12:33.185830 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1102 20:12:33.185918 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1103 20:12:33.186005 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1104 20:12:33.186091 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1105 20:12:33.186178 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1106 20:12:33.186266 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1107 20:12:33.186356 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1108 20:12:33.186445 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1109 20:12:33.186533 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1110 20:12:33.186620 961 |3 6 1|[0] xxxxxxxx oxxxxxxx [MSB]
1111 20:12:33.186709 962 |3 6 2|[0] xxxxxxxx oxxoxoxx [MSB]
1112 20:12:33.186799 963 |3 6 3|[0] xxxxxxxx oxxoxoox [MSB]
1113 20:12:33.186886 964 |3 6 4|[0] xxxxxxxx oxxoooox [MSB]
1114 20:12:33.186972 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1115 20:12:33.187058 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1116 20:12:33.187145 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1117 20:12:33.187231 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1118 20:12:33.187317 969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]
1119 20:12:33.187412 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1120 20:12:33.187511 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1121 20:12:33.187607 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1122 20:12:33.187703 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1123 20:12:33.187799 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1124 20:12:33.187902 975 |3 6 15|[0] xooooooo oooooooo [MSB]
1125 20:12:33.187998 986 |3 6 26|[0] oooooooo oooxoxoo [MSB]
1126 20:12:33.188094 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1127 20:12:33.188190 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1128 20:12:33.188285 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1129 20:12:33.188380 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1130 20:12:33.188476 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1131 20:12:33.188571 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1132 20:12:33.188666 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1133 20:12:33.188761 Byte0, DQ PI dly=982, DQM PI dly= 982
1134 20:12:33.188855 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1135 20:12:33.188949
1136 20:12:33.189043 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1137 20:12:33.189130
1138 20:12:33.189223 Byte1, DQ PI dly=975, DQM PI dly= 975
1139 20:12:33.189317 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1140 20:12:33.189403
1141 20:12:33.189487 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1142 20:12:33.189571
1143 20:12:33.189654 ==
1144 20:12:33.189739 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1145 20:12:33.189823 fsp= 1, odt_onoff= 1, Byte mode= 0
1146 20:12:33.189907 ==
1147 20:12:33.189994 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1148 20:12:33.190077
1149 20:12:33.190161 Begin, DQ Scan Range 951~1015
1150 20:12:33.190245 Write Rank0 MR14 =0x0
1151 20:12:33.190334
1152 20:12:33.190393 CH=0, VrefRange= 0, VrefLevel = 0
1153 20:12:33.190448 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1154 20:12:33.190504 TX Bit1 (977~993) 17 985, Bit9 (967~982) 16 974,
1155 20:12:33.190558 TX Bit2 (977~993) 17 985, Bit10 (969~989) 21 979,
1156 20:12:33.190613 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1157 20:12:33.190667 TX Bit4 (976~993) 18 984, Bit12 (967~983) 17 975,
1158 20:12:33.190722 TX Bit5 (972~987) 16 979, Bit13 (966~982) 17 974,
1159 20:12:33.190780 TX Bit6 (974~988) 15 981, Bit14 (967~983) 17 975,
1160 20:12:33.190835 TX Bit7 (977~991) 15 984, Bit15 (968~983) 16 975,
1161 20:12:33.190913
1162 20:12:33.190970 Write Rank0 MR14 =0x2
1163 20:12:33.191025
1164 20:12:33.191079 CH=0, VrefRange= 0, VrefLevel = 2
1165 20:12:33.191133 TX Bit0 (977~994) 18 985, Bit8 (964~983) 20 973,
1166 20:12:33.191191 TX Bit1 (977~993) 17 985, Bit9 (966~983) 18 974,
1167 20:12:33.191265 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1168 20:12:33.191352 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1169 20:12:33.191437 TX Bit4 (975~994) 20 984, Bit12 (967~983) 17 975,
1170 20:12:33.191522 TX Bit5 (971~988) 18 979, Bit13 (966~982) 17 974,
1171 20:12:33.191606 TX Bit6 (973~988) 16 980, Bit14 (967~983) 17 975,
1172 20:12:33.191691 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1173 20:12:33.191774
1174 20:12:33.191858 Write Rank0 MR14 =0x4
1175 20:12:33.191941
1176 20:12:33.192024 CH=0, VrefRange= 0, VrefLevel = 4
1177 20:12:33.192108 TX Bit0 (977~994) 18 985, Bit8 (963~983) 21 973,
1178 20:12:33.192396 TX Bit1 (976~993) 18 984, Bit9 (966~983) 18 974,
1179 20:12:33.192486 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1180 20:12:33.192575 TX Bit3 (970~987) 18 978, Bit11 (964~983) 20 973,
1181 20:12:33.192660 TX Bit4 (975~994) 20 984, Bit12 (966~983) 18 974,
1182 20:12:33.192745 TX Bit5 (971~988) 18 979, Bit13 (965~982) 18 973,
1183 20:12:33.192830 TX Bit6 (973~990) 18 981, Bit14 (966~984) 19 975,
1184 20:12:33.192915 TX Bit7 (976~991) 16 983, Bit15 (969~984) 16 976,
1185 20:12:33.192998
1186 20:12:33.193082 Write Rank0 MR14 =0x6
1187 20:12:33.193167
1188 20:12:33.193253 CH=0, VrefRange= 0, VrefLevel = 6
1189 20:12:33.193322 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1190 20:12:33.193377 TX Bit1 (976~994) 19 985, Bit9 (966~983) 18 974,
1191 20:12:33.193433 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1192 20:12:33.193487 TX Bit3 (969~987) 19 978, Bit11 (964~983) 20 973,
1193 20:12:33.193541 TX Bit4 (975~994) 20 984, Bit12 (966~984) 19 975,
1194 20:12:33.193595 TX Bit5 (971~989) 19 980, Bit13 (964~983) 20 973,
1195 20:12:33.193649 TX Bit6 (972~990) 19 981, Bit14 (966~985) 20 975,
1196 20:12:33.193703 TX Bit7 (976~992) 17 984, Bit15 (968~985) 18 976,
1197 20:12:33.193757
1198 20:12:33.193810 Write Rank0 MR14 =0x8
1199 20:12:33.193864
1200 20:12:33.193923 CH=0, VrefRange= 0, VrefLevel = 8
1201 20:12:33.193979 TX Bit0 (976~995) 20 985, Bit8 (963~984) 22 973,
1202 20:12:33.194032 TX Bit1 (976~994) 19 985, Bit9 (966~984) 19 975,
1203 20:12:33.194086 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1204 20:12:33.194140 TX Bit3 (969~988) 20 978, Bit11 (963~983) 21 973,
1205 20:12:33.194194 TX Bit4 (975~995) 21 985, Bit12 (965~984) 20 974,
1206 20:12:33.194248 TX Bit5 (970~990) 21 980, Bit13 (965~983) 19 974,
1207 20:12:33.194306 TX Bit6 (972~991) 20 981, Bit14 (966~985) 20 975,
1208 20:12:33.194361 TX Bit7 (976~992) 17 984, Bit15 (968~985) 18 976,
1209 20:12:33.194415
1210 20:12:33.194468 Write Rank0 MR14 =0xa
1211 20:12:33.194522
1212 20:12:33.194580 CH=0, VrefRange= 0, VrefLevel = 10
1213 20:12:33.194648 TX Bit0 (976~996) 21 986, Bit8 (962~985) 24 973,
1214 20:12:33.194703 TX Bit1 (976~994) 19 985, Bit9 (965~984) 20 974,
1215 20:12:33.194758 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
1216 20:12:33.194812 TX Bit3 (969~988) 20 978, Bit11 (963~983) 21 973,
1217 20:12:33.194866 TX Bit4 (974~995) 22 984, Bit12 (965~985) 21 975,
1218 20:12:33.194924 TX Bit5 (970~991) 22 980, Bit13 (965~983) 19 974,
1219 20:12:33.194979 TX Bit6 (971~991) 21 981, Bit14 (966~986) 21 976,
1220 20:12:33.195033 TX Bit7 (975~992) 18 983, Bit15 (967~986) 20 976,
1221 20:12:33.195088
1222 20:12:33.195141 Write Rank0 MR14 =0xc
1223 20:12:33.195195
1224 20:12:33.195249 CH=0, VrefRange= 0, VrefLevel = 12
1225 20:12:33.195307 TX Bit0 (976~997) 22 986, Bit8 (962~985) 24 973,
1226 20:12:33.195383 TX Bit1 (976~995) 20 985, Bit9 (965~985) 21 975,
1227 20:12:33.195460 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
1228 20:12:33.195553 TX Bit3 (969~989) 21 979, Bit11 (963~984) 22 973,
1229 20:12:33.195646 TX Bit4 (974~996) 23 985, Bit12 (965~985) 21 975,
1230 20:12:33.195745 TX Bit5 (970~991) 22 980, Bit13 (964~984) 21 974,
1231 20:12:33.195850 TX Bit6 (971~991) 21 981, Bit14 (965~987) 23 976,
1232 20:12:33.195945 TX Bit7 (975~993) 19 984, Bit15 (967~987) 21 977,
1233 20:12:33.196041
1234 20:12:33.196134 Write Rank0 MR14 =0xe
1235 20:12:33.196228
1236 20:12:33.196315 CH=0, VrefRange= 0, VrefLevel = 14
1237 20:12:33.196391 TX Bit0 (976~997) 22 986, Bit8 (962~986) 25 974,
1238 20:12:33.196465 TX Bit1 (976~995) 20 985, Bit9 (965~985) 21 975,
1239 20:12:33.196559 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1240 20:12:33.196652 TX Bit3 (969~990) 22 979, Bit11 (962~984) 23 973,
1241 20:12:33.196745 TX Bit4 (974~996) 23 985, Bit12 (964~986) 23 975,
1242 20:12:33.196839 TX Bit5 (970~991) 22 980, Bit13 (963~984) 22 973,
1243 20:12:33.196932 TX Bit6 (970~992) 23 981, Bit14 (964~987) 24 975,
1244 20:12:33.197025 TX Bit7 (974~993) 20 983, Bit15 (967~987) 21 977,
1245 20:12:33.197118
1246 20:12:33.197210 Write Rank0 MR14 =0x10
1247 20:12:33.197311
1248 20:12:33.197404 CH=0, VrefRange= 0, VrefLevel = 16
1249 20:12:33.197497 TX Bit0 (976~998) 23 987, Bit8 (962~986) 25 974,
1250 20:12:33.197590 TX Bit1 (975~996) 22 985, Bit9 (965~986) 22 975,
1251 20:12:33.197683 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1252 20:12:33.197776 TX Bit3 (969~991) 23 980, Bit11 (962~985) 24 973,
1253 20:12:33.197871 TX Bit4 (974~996) 23 985, Bit12 (964~986) 23 975,
1254 20:12:33.197966 TX Bit5 (969~991) 23 980, Bit13 (963~985) 23 974,
1255 20:12:33.198051 TX Bit6 (970~992) 23 981, Bit14 (965~988) 24 976,
1256 20:12:33.198136 TX Bit7 (974~994) 21 984, Bit15 (967~988) 22 977,
1257 20:12:33.198220
1258 20:12:33.198303 Write Rank0 MR14 =0x12
1259 20:12:33.198386
1260 20:12:33.198469 CH=0, VrefRange= 0, VrefLevel = 18
1261 20:12:33.198554 TX Bit0 (975~998) 24 986, Bit8 (961~987) 27 974,
1262 20:12:33.198638 TX Bit1 (975~996) 22 985, Bit9 (963~987) 25 975,
1263 20:12:33.198723 TX Bit2 (975~995) 21 985, Bit10 (967~991) 25 979,
1264 20:12:33.198807 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1265 20:12:33.198892 TX Bit4 (973~998) 26 985, Bit12 (964~987) 24 975,
1266 20:12:33.198976 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1267 20:12:33.199061 TX Bit6 (970~992) 23 981, Bit14 (964~988) 25 976,
1268 20:12:33.199146 TX Bit7 (973~994) 22 983, Bit15 (967~989) 23 978,
1269 20:12:33.199229
1270 20:12:33.199312 Write Rank0 MR14 =0x14
1271 20:12:33.199395
1272 20:12:33.199479 CH=0, VrefRange= 0, VrefLevel = 20
1273 20:12:33.199563 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1274 20:12:33.199647 TX Bit1 (975~997) 23 986, Bit9 (962~987) 26 974,
1275 20:12:33.199732 TX Bit2 (974~996) 23 985, Bit10 (967~991) 25 979,
1276 20:12:33.199816 TX Bit3 (968~991) 24 979, Bit11 (961~985) 25 973,
1277 20:12:33.199901 TX Bit4 (973~998) 26 985, Bit12 (963~987) 25 975,
1278 20:12:33.200187 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1279 20:12:33.200279 TX Bit6 (969~993) 25 981, Bit14 (963~988) 26 975,
1280 20:12:33.200365 TX Bit7 (973~994) 22 983, Bit15 (967~989) 23 978,
1281 20:12:33.200449
1282 20:12:33.200533 Write Rank0 MR14 =0x16
1283 20:12:33.200616
1284 20:12:33.200710 CH=0, VrefRange= 0, VrefLevel = 22
1285 20:12:33.200796 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1286 20:12:33.200881 TX Bit1 (974~997) 24 985, Bit9 (963~988) 26 975,
1287 20:12:33.200966 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1288 20:12:33.201050 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1289 20:12:33.201135 TX Bit4 (972~998) 27 985, Bit12 (963~987) 25 975,
1290 20:12:33.201221 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1291 20:12:33.201304 TX Bit6 (969~993) 25 981, Bit14 (963~988) 26 975,
1292 20:12:33.201361 TX Bit7 (972~995) 24 983, Bit15 (966~989) 24 977,
1293 20:12:33.201416
1294 20:12:33.201470 Write Rank0 MR14 =0x18
1295 20:12:33.201524
1296 20:12:33.201577 CH=0, VrefRange= 0, VrefLevel = 24
1297 20:12:33.201632 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1298 20:12:33.201686 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1299 20:12:33.201740 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1300 20:12:33.201794 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1301 20:12:33.201849 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1302 20:12:33.201903 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1303 20:12:33.201957 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1304 20:12:33.202012 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1305 20:12:33.202066
1306 20:12:33.202119 Write Rank0 MR14 =0x1a
1307 20:12:33.202173
1308 20:12:33.202226 CH=0, VrefRange= 0, VrefLevel = 26
1309 20:12:33.202280 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1310 20:12:33.202337 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1311 20:12:33.202391 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1312 20:12:33.202445 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1313 20:12:33.202499 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1314 20:12:33.202554 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1315 20:12:33.202608 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1316 20:12:33.202665 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1317 20:12:33.202719
1318 20:12:33.202772 Write Rank0 MR14 =0x1c
1319 20:12:33.202826
1320 20:12:33.202879 CH=0, VrefRange= 0, VrefLevel = 28
1321 20:12:33.202933 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1322 20:12:33.203004 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1323 20:12:33.203071 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1324 20:12:33.203133 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1325 20:12:33.203188 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1326 20:12:33.203242 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1327 20:12:33.203296 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1328 20:12:33.203351 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1329 20:12:33.203405
1330 20:12:33.203477 Write Rank0 MR14 =0x1e
1331 20:12:33.203562
1332 20:12:33.203646 CH=0, VrefRange= 0, VrefLevel = 30
1333 20:12:33.203730 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1334 20:12:33.203815 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1335 20:12:33.203900 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1336 20:12:33.203985 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1337 20:12:33.204069 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1338 20:12:33.204154 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1339 20:12:33.204238 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1340 20:12:33.204323 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1341 20:12:33.204407
1342 20:12:33.204498
1343 20:12:33.204557 TX Vref found, early break! 374< 382
1344 20:12:33.204612 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1345 20:12:33.204667 u1DelayCellOfst[0]=8 cells (7 PI)
1346 20:12:33.204720 u1DelayCellOfst[1]=7 cells (6 PI)
1347 20:12:33.204774 u1DelayCellOfst[2]=6 cells (5 PI)
1348 20:12:33.204829 u1DelayCellOfst[3]=0 cells (0 PI)
1349 20:12:33.204882 u1DelayCellOfst[4]=6 cells (5 PI)
1350 20:12:33.204936 u1DelayCellOfst[5]=0 cells (0 PI)
1351 20:12:33.204990 u1DelayCellOfst[6]=1 cells (1 PI)
1352 20:12:33.205044 u1DelayCellOfst[7]=3 cells (3 PI)
1353 20:12:33.205097 Byte0, DQ PI dly=980, DQM PI dly= 983
1354 20:12:33.205152 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1355 20:12:33.205206
1356 20:12:33.205267 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1357 20:12:33.205324
1358 20:12:33.205378 u1DelayCellOfst[8]=0 cells (0 PI)
1359 20:12:33.205431 u1DelayCellOfst[9]=3 cells (3 PI)
1360 20:12:33.205485 u1DelayCellOfst[10]=6 cells (5 PI)
1361 20:12:33.205539 u1DelayCellOfst[11]=0 cells (0 PI)
1362 20:12:33.205592 u1DelayCellOfst[12]=1 cells (1 PI)
1363 20:12:33.205645 u1DelayCellOfst[13]=0 cells (0 PI)
1364 20:12:33.205699 u1DelayCellOfst[14]=1 cells (1 PI)
1365 20:12:33.205752 u1DelayCellOfst[15]=6 cells (5 PI)
1366 20:12:33.205804 Byte1, DQ PI dly=973, DQM PI dly= 975
1367 20:12:33.205857 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1368 20:12:33.205910
1369 20:12:33.205963 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1370 20:12:33.206017
1371 20:12:33.206070 Write Rank0 MR14 =0x18
1372 20:12:33.206123
1373 20:12:33.206176 Final TX Range 0 Vref 24
1374 20:12:33.206230
1375 20:12:33.206283 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1376 20:12:33.206336
1377 20:12:33.206389 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1378 20:12:33.206443 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1379 20:12:33.206497 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1380 20:12:33.206550 Write Rank0 MR3 =0xb0
1381 20:12:33.206604 DramC Write-DBI on
1382 20:12:33.206657 ==
1383 20:12:33.206710 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1384 20:12:33.206764 fsp= 1, odt_onoff= 1, Byte mode= 0
1385 20:12:33.206818 ==
1386 20:12:33.206871 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1387 20:12:33.206924
1388 20:12:33.207179 Begin, DQ Scan Range 695~759
1389 20:12:33.207263
1390 20:12:33.207369
1391 20:12:33.207475 TX Vref Scan disable
1392 20:12:33.207582 695 |2 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1393 20:12:33.207693 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1394 20:12:33.207796 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1395 20:12:33.207883 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1396 20:12:33.207970 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1397 20:12:33.208055 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1398 20:12:33.208142 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1399 20:12:33.208227 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1400 20:12:33.208314 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1401 20:12:33.208400 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1402 20:12:33.208486 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1403 20:12:33.208571 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1404 20:12:33.208657 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1405 20:12:33.208750 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1406 20:12:33.208838 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1407 20:12:33.208924 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1408 20:12:33.209010 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1409 20:12:33.209095 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1410 20:12:33.209184 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1411 20:12:33.209280 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1412 20:12:33.209367 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1413 20:12:33.209453 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1414 20:12:33.209538 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1415 20:12:33.209624 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1416 20:12:33.209710 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1417 20:12:33.209795 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1418 20:12:33.209881 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1419 20:12:33.209966 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1420 20:12:33.210052 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1421 20:12:33.210137 Byte0, DQ PI dly=727, DQM PI dly= 727
1422 20:12:33.210221 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1423 20:12:33.210304
1424 20:12:33.210387 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1425 20:12:33.210470
1426 20:12:33.210553 Byte1, DQ PI dly=718, DQM PI dly= 718
1427 20:12:33.210636 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1428 20:12:33.210720
1429 20:12:33.210803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1430 20:12:33.210885
1431 20:12:33.210969 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1432 20:12:33.211054 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1433 20:12:33.211139 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1434 20:12:33.211226 Write Rank0 MR3 =0x30
1435 20:12:33.211310 DramC Write-DBI off
1436 20:12:33.211396
1437 20:12:33.211480 [DATLAT]
1438 20:12:33.211563 Freq=1600, CH0 RK0, use_rxtx_scan=0
1439 20:12:33.211646
1440 20:12:33.211729 DATLAT Default: 0xf
1441 20:12:33.211811 7, 0xFFFF, sum=0
1442 20:12:33.211896 8, 0xFFFF, sum=0
1443 20:12:33.211980 9, 0xFFFF, sum=0
1444 20:12:33.212065 10, 0xFFFF, sum=0
1445 20:12:33.212150 11, 0xFFFF, sum=0
1446 20:12:33.212234 12, 0xFFFF, sum=0
1447 20:12:33.212319 13, 0xFFFF, sum=0
1448 20:12:33.212403 14, 0x0, sum=1
1449 20:12:33.212487 15, 0x0, sum=2
1450 20:12:33.212572 16, 0x0, sum=3
1451 20:12:33.212656 17, 0x0, sum=4
1452 20:12:33.212741 pattern=2 first_step=14 total pass=5 best_step=16
1453 20:12:33.212824 ==
1454 20:12:33.212907 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1455 20:12:33.212991 fsp= 1, odt_onoff= 1, Byte mode= 0
1456 20:12:33.213073 ==
1457 20:12:33.213157 Start DQ dly to find pass range UseTestEngine =1
1458 20:12:33.213240 x-axis: bit #, y-axis: DQ dly (-127~63)
1459 20:12:33.213310 RX Vref Scan = 1
1460 20:12:33.213366
1461 20:12:33.213419 RX Vref found, early break!
1462 20:12:33.213473
1463 20:12:33.213526 Final RX Vref 13, apply to both rank0 and 1
1464 20:12:33.213580 ==
1465 20:12:33.213633 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1466 20:12:33.213686 fsp= 1, odt_onoff= 1, Byte mode= 0
1467 20:12:33.213739 ==
1468 20:12:33.213792 DQS Delay:
1469 20:12:33.213845 DQS0 = 0, DQS1 = 0
1470 20:12:33.213898 DQM Delay:
1471 20:12:33.213951 DQM0 = 20, DQM1 = 19
1472 20:12:33.214004 DQ Delay:
1473 20:12:33.214057 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1474 20:12:33.214110 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =19
1475 20:12:33.214164 DQ8 =18, DQ9 =20, DQ10 =23, DQ11 =16
1476 20:12:33.214216 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1477 20:12:33.214276
1478 20:12:33.214330
1479 20:12:33.214382
1480 20:12:33.214435 [DramC_TX_OE_Calibration] TA2
1481 20:12:33.214489 Original DQ_B0 (3 6) =30, OEN = 27
1482 20:12:33.214543 Original DQ_B1 (3 6) =30, OEN = 27
1483 20:12:33.214596 23, 0x0, End_B0=23 End_B1=23
1484 20:12:33.214651 24, 0x0, End_B0=24 End_B1=24
1485 20:12:33.214705 25, 0x0, End_B0=25 End_B1=25
1486 20:12:33.214759 26, 0x0, End_B0=26 End_B1=26
1487 20:12:33.214813 27, 0x0, End_B0=27 End_B1=27
1488 20:12:33.214867 28, 0x0, End_B0=28 End_B1=28
1489 20:12:33.214921 29, 0x0, End_B0=29 End_B1=29
1490 20:12:33.214975 30, 0x0, End_B0=30 End_B1=30
1491 20:12:33.215030 31, 0xFFFF, End_B0=30 End_B1=30
1492 20:12:33.215084 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1493 20:12:33.215138 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1494 20:12:33.215192
1495 20:12:33.215244
1496 20:12:33.215296 Write Rank0 MR23 =0x3f
1497 20:12:33.215349 [DQSOSC]
1498 20:12:33.215403 [DQSOSCAuto] RK0, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1499 20:12:33.215457 CH0_RK0: MR19=0x3, MR18=0xA9, DQSOSC=336, MR23=63, INC=21, DEC=32
1500 20:12:33.215513 Write Rank0 MR23 =0x3f
1501 20:12:33.215566 [DQSOSC]
1502 20:12:33.215619 [DQSOSCAuto] RK0, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
1503 20:12:33.215673 CH0 RK0: MR19=3, MR18=AD
1504 20:12:33.215726 [RankSwap] Rank num 2, (Multi 1), Rank 1
1505 20:12:33.215779 Write Rank0 MR2 =0xad
1506 20:12:33.215831 [Write Leveling]
1507 20:12:33.215887 delay byte0 byte1 byte2 byte3
1508 20:12:33.215942
1509 20:12:33.215994 10 0 0
1510 20:12:33.216052 11 0 0
1511 20:12:33.216110 12 0 0
1512 20:12:33.216197 13 0 0
1513 20:12:33.216283 14 0 0
1514 20:12:33.216354 15 0 0
1515 20:12:33.216427 16 0 0
1516 20:12:33.216515 17 0 0
1517 20:12:33.216600 18 0 0
1518 20:12:33.216685 19 0 0
1519 20:12:33.216775 20 0 0
1520 20:12:33.216867 21 0 0
1521 20:12:33.216953 22 0 0
1522 20:12:33.217039 23 0 0
1523 20:12:33.217124 24 0 0
1524 20:12:33.217208 25 0 0
1525 20:12:33.217302 26 0 0
1526 20:12:33.217387 27 0 0
1527 20:12:33.217472 28 0 0
1528 20:12:33.217556 29 0 ff
1529 20:12:33.217641 30 0 ff
1530 20:12:33.217727 31 0 ff
1531 20:12:33.217786 32 0 ff
1532 20:12:33.217840 33 0 ff
1533 20:12:33.218107 34 0 ff
1534 20:12:33.218206 35 ff ff
1535 20:12:33.218316 36 ff ff
1536 20:12:33.218426 37 ff ff
1537 20:12:33.218530 38 ff ff
1538 20:12:33.218616 39 ff ff
1539 20:12:33.218701 40 ff ff
1540 20:12:33.218786 41 ff ff
1541 20:12:33.218871 pass bytecount = 0xff (0xff: all bytes pass)
1542 20:12:33.218954
1543 20:12:33.219037 DQS0 dly: 35
1544 20:12:33.219119 DQS1 dly: 29
1545 20:12:33.219202 Write Rank0 MR2 =0x2d
1546 20:12:33.219285 [RankSwap] Rank num 2, (Multi 1), Rank 0
1547 20:12:33.219368 Write Rank1 MR1 =0xd6
1548 20:12:33.219451 [Gating]
1549 20:12:33.219533 ==
1550 20:12:33.219616 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1551 20:12:33.219700 fsp= 1, odt_onoff= 1, Byte mode= 0
1552 20:12:33.219783 ==
1553 20:12:33.219866 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1554 20:12:33.219952 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1555 20:12:33.220038 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1556 20:12:33.220123 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1557 20:12:33.220209 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1558 20:12:33.220294 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1559 20:12:33.220379 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1560 20:12:33.220465 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1561 20:12:33.220553 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1562 20:12:33.220641 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1563 20:12:33.220720 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(0 0)(0 0)| 0
1564 20:12:33.220777 3 2 12 |b0a 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1565 20:12:33.220831 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1566 20:12:33.220886 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1567 20:12:33.220940 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1568 20:12:33.221020 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1569 20:12:33.221113 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1570 20:12:33.221201 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1571 20:12:33.221291 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1572 20:12:33.221348 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1573 20:12:33.221403 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1574 20:12:33.221458 [Byte 1] Lead/lag falling Transition (3, 3, 16)
1575 20:12:33.221512 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1576 20:12:33.221592 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1577 20:12:33.221682 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1578 20:12:33.221741 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1579 20:12:33.221796 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1580 20:12:33.221850 3 4 8 |1716 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1581 20:12:33.221905 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1582 20:12:33.221959 3 4 16 |3d3d 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
1583 20:12:33.222017 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 20:12:33.222095 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 20:12:33.222164 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 20:12:33.222259 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 20:12:33.222346 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 20:12:33.222432 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 20:12:33.222518 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 20:12:33.222606 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 20:12:33.222699 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 20:12:33.222785 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1593 20:12:33.222871 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1594 20:12:33.222957 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1595 20:12:33.223046 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1596 20:12:33.223130 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1597 20:12:33.223214 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1598 20:12:33.223301 [Byte 0] Lead/lag Transition tap number (2)
1599 20:12:33.223385 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1600 20:12:33.223470 [Byte 1] Lead/lag Transition tap number (3)
1601 20:12:33.223554 3 6 12 |e0e 3e3d |(1 1)(11 11) |(0 0)(0 0)| 0
1602 20:12:33.223640 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1603 20:12:33.223726 [Byte 0]First pass (3, 6, 16)
1604 20:12:33.223784 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 20:12:33.223839 [Byte 1]First pass (3, 6, 20)
1606 20:12:33.223893 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 20:12:33.223947 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 20:12:33.224003 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 20:12:33.224057 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1610 20:12:33.224112 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 20:12:33.224167 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 20:12:33.224221 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1613 20:12:33.224275 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1614 20:12:33.224330 All bytes gating window > 1UI, Early break!
1615 20:12:33.224383
1616 20:12:33.224441 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1617 20:12:33.224501
1618 20:12:33.224555 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1619 20:12:33.224613
1620 20:12:33.224667
1621 20:12:33.224720
1622 20:12:33.224773 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1623 20:12:33.224826
1624 20:12:33.224879 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1625 20:12:33.224932
1626 20:12:33.224984
1627 20:12:33.225036 Write Rank1 MR1 =0x56
1628 20:12:33.225097
1629 20:12:33.225181 best RODT dly(2T, 0.5T) = (2, 3)
1630 20:12:33.225269
1631 20:12:33.225326 best RODT dly(2T, 0.5T) = (2, 3)
1632 20:12:33.225380 ==
1633 20:12:33.225433 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1634 20:12:33.225487 fsp= 1, odt_onoff= 1, Byte mode= 0
1635 20:12:33.225541 ==
1636 20:12:33.225594 Start DQ dly to find pass range UseTestEngine =0
1637 20:12:33.225648 x-axis: bit #, y-axis: DQ dly (-127~63)
1638 20:12:33.225702 RX Vref Scan = 0
1639 20:12:33.225756 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1640 20:12:33.225811 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1641 20:12:33.225866 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1642 20:12:33.225920 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1643 20:12:33.226179 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1644 20:12:33.226243 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1645 20:12:33.226298 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1646 20:12:33.226354 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1647 20:12:33.226408 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1648 20:12:33.226462 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1649 20:12:33.226516 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1650 20:12:33.226570 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1651 20:12:33.226624 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1652 20:12:33.226678 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1653 20:12:33.226732 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1654 20:12:33.226786 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1655 20:12:33.226840 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1656 20:12:33.226894 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1657 20:12:33.226948 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1658 20:12:33.227002 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1659 20:12:33.227057 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1660 20:12:33.227116 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1661 20:12:33.227171 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1662 20:12:33.227225 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1663 20:12:33.227280 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1664 20:12:33.227334 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1665 20:12:33.227388 0, [0] xxxoxxxx oxxoxoxx [MSB]
1666 20:12:33.227448 1, [0] xxxoxoxx ooxoooox [MSB]
1667 20:12:33.227503 2, [0] xxxoxooo ooxoooox [MSB]
1668 20:12:33.227563 3, [0] xxxoxooo ooxooooo [MSB]
1669 20:12:33.227617 4, [0] xxxoxooo ooxooooo [MSB]
1670 20:12:33.227678 5, [0] xxxoxooo oooooooo [MSB]
1671 20:12:33.227735 6, [0] xoxooooo oooooooo [MSB]
1672 20:12:33.227793 7, [0] xooooooo oooooooo [MSB]
1673 20:12:33.227875 8, [0] xooooooo oooooooo [MSB]
1674 20:12:33.227963 34, [0] oooooooo oooooooo [MSB]
1675 20:12:33.228050 35, [0] oooxoooo oooxoxoo [MSB]
1676 20:12:33.228135 36, [0] oooxoxoo oooxoxxo [MSB]
1677 20:12:33.228221 37, [0] oooxoxxx xooxoxxo [MSB]
1678 20:12:33.228306 38, [0] oooxoxxx xxoxxxxo [MSB]
1679 20:12:33.228391 39, [0] oooxoxxx xxoxxxxx [MSB]
1680 20:12:33.228476 40, [0] oooxoxxx xxoxxxxx [MSB]
1681 20:12:33.228561 41, [0] oooxoxxx xxoxxxxx [MSB]
1682 20:12:33.228646 42, [0] xooxxxxx xxoxxxxx [MSB]
1683 20:12:33.228732 43, [0] xoxxxxxx xxxxxxxx [MSB]
1684 20:12:33.228822 44, [0] xxxxxxxx xxxxxxxx [MSB]
1685 20:12:33.228907 iDelay=44, Bit 0, Center 25 (9 ~ 41) 33
1686 20:12:33.228991 iDelay=44, Bit 1, Center 24 (6 ~ 43) 38
1687 20:12:33.229074 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1688 20:12:33.229158 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1689 20:12:33.229241 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1690 20:12:33.229334 iDelay=44, Bit 5, Center 18 (1 ~ 35) 35
1691 20:12:33.229418 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
1692 20:12:33.229501 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
1693 20:12:33.229584 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1694 20:12:33.229667 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
1695 20:12:33.229751 iDelay=44, Bit 10, Center 23 (5 ~ 42) 38
1696 20:12:33.229832 iDelay=44, Bit 11, Center 17 (0 ~ 34) 35
1697 20:12:33.229888 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1698 20:12:33.229952 iDelay=44, Bit 13, Center 17 (0 ~ 34) 35
1699 20:12:33.230006 iDelay=44, Bit 14, Center 18 (1 ~ 35) 35
1700 20:12:33.230059 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
1701 20:12:33.230112 ==
1702 20:12:33.230166 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1703 20:12:33.230219 fsp= 1, odt_onoff= 1, Byte mode= 0
1704 20:12:33.230273 ==
1705 20:12:33.230326 DQS Delay:
1706 20:12:33.230379 DQS0 = 0, DQS1 = 0
1707 20:12:33.230432 DQM Delay:
1708 20:12:33.230485 DQM0 = 21, DQM1 = 18
1709 20:12:33.230538 DQ Delay:
1710 20:12:33.230601 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1711 20:12:33.230655 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19
1712 20:12:33.230717 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
1713 20:12:33.230772 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1714 20:12:33.230825
1715 20:12:33.230879
1716 20:12:33.230931 DramC Write-DBI off
1717 20:12:33.230985 ==
1718 20:12:33.231039 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1719 20:12:33.231092 fsp= 1, odt_onoff= 1, Byte mode= 0
1720 20:12:33.231145 ==
1721 20:12:33.231205 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1722 20:12:33.231260
1723 20:12:33.231317 Begin, DQ Scan Range 925~1181
1724 20:12:33.231371
1725 20:12:33.231423
1726 20:12:33.231476 TX Vref Scan disable
1727 20:12:33.231529 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1728 20:12:33.231594 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1729 20:12:33.231649 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1730 20:12:33.231703 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1731 20:12:33.231758 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1732 20:12:33.231812 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1733 20:12:33.231866 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1734 20:12:33.231921 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1735 20:12:33.231974 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1736 20:12:33.232028 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1737 20:12:33.232083 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1738 20:12:33.232136 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1739 20:12:33.232191 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1740 20:12:33.232245 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1741 20:12:33.232299 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1742 20:12:33.232353 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1743 20:12:33.232409 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1744 20:12:33.232470 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1745 20:12:33.232524 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1746 20:12:33.232579 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1747 20:12:33.232633 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1748 20:12:33.232687 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1749 20:12:33.232741 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1750 20:12:33.232795 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1751 20:12:33.232849 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1752 20:12:33.232903 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1753 20:12:33.232957 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1754 20:12:33.233011 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1755 20:12:33.233067 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1756 20:12:33.233121 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1757 20:12:33.233175 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1758 20:12:33.233229 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1759 20:12:33.233290 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1760 20:12:33.233344 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1761 20:12:33.233402 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1762 20:12:33.233461 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1763 20:12:33.233722 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1764 20:12:33.233789 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1765 20:12:33.233845 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1766 20:12:33.233901 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1767 20:12:33.233955 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1768 20:12:33.234011 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1769 20:12:33.234065 967 |3 6 7|[0] xxxxxxxx xxxoxxxx [MSB]
1770 20:12:33.234120 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1771 20:12:33.234175 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1772 20:12:33.234229 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1773 20:12:33.234284 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1774 20:12:33.234349 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1775 20:12:33.234405 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1776 20:12:33.234460 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1777 20:12:33.234520 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1778 20:12:33.234575 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1779 20:12:33.234634 977 |3 6 17|[0] xxxooooo oooooooo [MSB]
1780 20:12:33.234689 990 |3 6 30|[0] oooooooo xooxxxxo [MSB]
1781 20:12:33.234743 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1782 20:12:33.234798 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1783 20:12:33.234853 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1784 20:12:33.234907 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1785 20:12:33.234962 995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]
1786 20:12:33.235016 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1787 20:12:33.235071 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1788 20:12:33.235125 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1789 20:12:33.235200 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1790 20:12:33.235257 Byte0, DQ PI dly=986, DQM PI dly= 986
1791 20:12:33.235312 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1792 20:12:33.235367
1793 20:12:33.235421 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1794 20:12:33.235475
1795 20:12:33.235528 Byte1, DQ PI dly=979, DQM PI dly= 979
1796 20:12:33.235581 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1797 20:12:33.235635
1798 20:12:33.235710 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1799 20:12:33.235794
1800 20:12:33.235879 ==
1801 20:12:33.235967 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1802 20:12:33.236050 fsp= 1, odt_onoff= 1, Byte mode= 0
1803 20:12:33.236134 ==
1804 20:12:33.236217 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1805 20:12:33.236300
1806 20:12:33.236383 Begin, DQ Scan Range 955~1019
1807 20:12:33.236466 Write Rank1 MR14 =0x0
1808 20:12:33.236528
1809 20:12:33.236581 CH=0, VrefRange= 0, VrefLevel = 0
1810 20:12:33.236635 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
1811 20:12:33.236690 TX Bit1 (978~998) 21 988, Bit9 (969~985) 17 977,
1812 20:12:33.236744 TX Bit2 (980~997) 18 988, Bit10 (975~990) 16 982,
1813 20:12:33.236798 TX Bit3 (974~991) 18 982, Bit11 (968~984) 17 976,
1814 20:12:33.236852 TX Bit4 (979~998) 20 988, Bit12 (969~985) 17 977,
1815 20:12:33.236905 TX Bit5 (977~991) 15 984, Bit13 (969~984) 16 976,
1816 20:12:33.236959 TX Bit6 (977~992) 16 984, Bit14 (970~985) 16 977,
1817 20:12:33.237012 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1818 20:12:33.237091
1819 20:12:33.237174 Write Rank1 MR14 =0x2
1820 20:12:33.237267
1821 20:12:33.237326 CH=0, VrefRange= 0, VrefLevel = 2
1822 20:12:33.237380 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
1823 20:12:33.237434 TX Bit1 (979~998) 20 988, Bit9 (969~985) 17 977,
1824 20:12:33.237488 TX Bit2 (979~997) 19 988, Bit10 (975~990) 16 982,
1825 20:12:33.237542 TX Bit3 (974~992) 19 983, Bit11 (968~985) 18 976,
1826 20:12:33.237603 TX Bit4 (979~998) 20 988, Bit12 (969~986) 18 977,
1827 20:12:33.237657 TX Bit5 (976~991) 16 983, Bit13 (968~984) 17 976,
1828 20:12:33.237711 TX Bit6 (977~993) 17 985, Bit14 (969~985) 17 977,
1829 20:12:33.237765 TX Bit7 (978~995) 18 986, Bit15 (973~989) 17 981,
1830 20:12:33.237829
1831 20:12:33.237884 Write Rank1 MR14 =0x4
1832 20:12:33.237943
1833 20:12:33.237997 CH=0, VrefRange= 0, VrefLevel = 4
1834 20:12:33.238050 TX Bit0 (980~999) 20 989, Bit8 (969~986) 18 977,
1835 20:12:33.238109 TX Bit1 (978~998) 21 988, Bit9 (969~986) 18 977,
1836 20:12:33.238163 TX Bit2 (979~998) 20 988, Bit10 (974~990) 17 982,
1837 20:12:33.238216 TX Bit3 (974~992) 19 983, Bit11 (968~985) 18 976,
1838 20:12:33.238270 TX Bit4 (979~998) 20 988, Bit12 (969~986) 18 977,
1839 20:12:33.238324 TX Bit5 (976~991) 16 983, Bit13 (968~985) 18 976,
1840 20:12:33.238377 TX Bit6 (976~993) 18 984, Bit14 (969~985) 17 977,
1841 20:12:33.238431 TX Bit7 (978~995) 18 986, Bit15 (973~989) 17 981,
1842 20:12:33.238484
1843 20:12:33.238536 Write Rank1 MR14 =0x6
1844 20:12:33.238589
1845 20:12:33.238642 CH=0, VrefRange= 0, VrefLevel = 6
1846 20:12:33.238705 TX Bit0 (979~999) 21 989, Bit8 (968~986) 19 977,
1847 20:12:33.238790 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1848 20:12:33.238876 TX Bit2 (978~998) 21 988, Bit10 (974~991) 18 982,
1849 20:12:33.238961 TX Bit3 (973~992) 20 982, Bit11 (968~986) 19 977,
1850 20:12:33.239047 TX Bit4 (978~998) 21 988, Bit12 (968~987) 20 977,
1851 20:12:33.239131 TX Bit5 (976~992) 17 984, Bit13 (968~985) 18 976,
1852 20:12:33.239215 TX Bit6 (976~994) 19 985, Bit14 (969~987) 19 978,
1853 20:12:33.239299 TX Bit7 (977~996) 20 986, Bit15 (972~989) 18 980,
1854 20:12:33.239382
1855 20:12:33.239464 Write Rank1 MR14 =0x8
1856 20:12:33.239547
1857 20:12:33.239631 CH=0, VrefRange= 0, VrefLevel = 8
1858 20:12:33.239714 TX Bit0 (979~1000) 22 989, Bit8 (968~987) 20 977,
1859 20:12:33.239798 TX Bit1 (978~999) 22 988, Bit9 (969~988) 20 978,
1860 20:12:33.239882 TX Bit2 (978~998) 21 988, Bit10 (974~991) 18 982,
1861 20:12:33.239965 TX Bit3 (972~993) 22 982, Bit11 (968~987) 20 977,
1862 20:12:33.240051 TX Bit4 (978~999) 22 988, Bit12 (969~988) 20 978,
1863 20:12:33.240136 TX Bit5 (975~992) 18 983, Bit13 (968~986) 19 977,
1864 20:12:33.240220 TX Bit6 (976~994) 19 985, Bit14 (969~987) 19 978,
1865 20:12:33.240303 TX Bit7 (977~996) 20 986, Bit15 (971~990) 20 980,
1866 20:12:33.240387
1867 20:12:33.240470 Write Rank1 MR14 =0xa
1868 20:12:33.240552
1869 20:12:33.240635 CH=0, VrefRange= 0, VrefLevel = 10
1870 20:12:33.240718 TX Bit0 (979~1000) 22 989, Bit8 (968~987) 20 977,
1871 20:12:33.241006 TX Bit1 (978~999) 22 988, Bit9 (968~988) 21 978,
1872 20:12:33.241096 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
1873 20:12:33.241181 TX Bit3 (971~993) 23 982, Bit11 (968~987) 20 977,
1874 20:12:33.241279 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1875 20:12:33.241338 TX Bit5 (975~992) 18 983, Bit13 (968~986) 19 977,
1876 20:12:33.241393 TX Bit6 (975~995) 21 985, Bit14 (969~988) 20 978,
1877 20:12:33.241447 TX Bit7 (977~997) 21 987, Bit15 (971~990) 20 980,
1878 20:12:33.241501
1879 20:12:33.241554 Write Rank1 MR14 =0xc
1880 20:12:33.241608
1881 20:12:33.241665 CH=0, VrefRange= 0, VrefLevel = 12
1882 20:12:33.241720 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
1883 20:12:33.241779 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
1884 20:12:33.241839 TX Bit2 (978~999) 22 988, Bit10 (972~992) 21 982,
1885 20:12:33.241894 TX Bit3 (971~994) 24 982, Bit11 (968~988) 21 978,
1886 20:12:33.241947 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1887 20:12:33.242001 TX Bit5 (974~993) 20 983, Bit13 (968~987) 20 977,
1888 20:12:33.242055 TX Bit6 (975~996) 22 985, Bit14 (968~989) 22 978,
1889 20:12:33.242114 TX Bit7 (977~997) 21 987, Bit15 (970~990) 21 980,
1890 20:12:33.242168
1891 20:12:33.242221 Write Rank1 MR14 =0xe
1892 20:12:33.242274
1893 20:12:33.242327 CH=0, VrefRange= 0, VrefLevel = 14
1894 20:12:33.242381 TX Bit0 (978~1001) 24 989, Bit8 (968~989) 22 978,
1895 20:12:33.242453 TX Bit1 (978~999) 22 988, Bit9 (968~989) 22 978,
1896 20:12:33.242509 TX Bit2 (978~999) 22 988, Bit10 (972~991) 20 981,
1897 20:12:33.242582 TX Bit3 (971~994) 24 982, Bit11 (968~989) 22 978,
1898 20:12:33.242638 TX Bit4 (978~1000) 23 989, Bit12 (968~989) 22 978,
1899 20:12:33.242692 TX Bit5 (974~994) 21 984, Bit13 (968~988) 21 978,
1900 20:12:33.242746 TX Bit6 (974~996) 23 985, Bit14 (968~989) 22 978,
1901 20:12:33.242800 TX Bit7 (976~998) 23 987, Bit15 (970~990) 21 980,
1902 20:12:33.242855
1903 20:12:33.242917 Write Rank1 MR14 =0x10
1904 20:12:33.243000
1905 20:12:33.243084 CH=0, VrefRange= 0, VrefLevel = 16
1906 20:12:33.243167 TX Bit0 (978~1001) 24 989, Bit8 (968~989) 22 978,
1907 20:12:33.243251 TX Bit1 (978~1000) 23 989, Bit9 (968~989) 22 978,
1908 20:12:33.243338 TX Bit2 (978~1000) 23 989, Bit10 (972~992) 21 982,
1909 20:12:33.243425 TX Bit3 (971~995) 25 983, Bit11 (967~989) 23 978,
1910 20:12:33.243510 TX Bit4 (977~1000) 24 988, Bit12 (968~989) 22 978,
1911 20:12:33.243594 TX Bit5 (974~994) 21 984, Bit13 (967~988) 22 977,
1912 20:12:33.243678 TX Bit6 (974~997) 24 985, Bit14 (968~989) 22 978,
1913 20:12:33.243776 TX Bit7 (976~998) 23 987, Bit15 (970~991) 22 980,
1914 20:12:33.243862
1915 20:12:33.243946 Write Rank1 MR14 =0x12
1916 20:12:33.244030
1917 20:12:33.244123 CH=0, VrefRange= 0, VrefLevel = 18
1918 20:12:33.244210 TX Bit0 (978~1002) 25 990, Bit8 (967~989) 23 978,
1919 20:12:33.244295 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1920 20:12:33.244356 TX Bit2 (978~1000) 23 989, Bit10 (972~992) 21 982,
1921 20:12:33.244411 TX Bit3 (971~996) 26 983, Bit11 (967~989) 23 978,
1922 20:12:33.244465 TX Bit4 (977~1000) 24 988, Bit12 (968~990) 23 979,
1923 20:12:33.244519 TX Bit5 (974~994) 21 984, Bit13 (967~989) 23 978,
1924 20:12:33.244573 TX Bit6 (973~997) 25 985, Bit14 (968~990) 23 979,
1925 20:12:33.244627 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1926 20:12:33.244680
1927 20:12:33.244732 Write Rank1 MR14 =0x14
1928 20:12:33.244785
1929 20:12:33.244838 CH=0, VrefRange= 0, VrefLevel = 20
1930 20:12:33.244891 TX Bit0 (978~1002) 25 990, Bit8 (967~989) 23 978,
1931 20:12:33.244945 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1932 20:12:33.245029 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1933 20:12:33.245116 TX Bit3 (970~997) 28 983, Bit11 (966~989) 24 977,
1934 20:12:33.245201 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1935 20:12:33.245286 TX Bit5 (973~995) 23 984, Bit13 (967~989) 23 978,
1936 20:12:33.245345 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
1937 20:12:33.245406 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1938 20:12:33.245462
1939 20:12:33.245516 Write Rank1 MR14 =0x16
1940 20:12:33.245569
1941 20:12:33.245623 CH=0, VrefRange= 0, VrefLevel = 22
1942 20:12:33.245676 TX Bit0 (978~1003) 26 990, Bit8 (967~990) 24 978,
1943 20:12:33.245730 TX Bit1 (977~1001) 25 989, Bit9 (968~990) 23 979,
1944 20:12:33.245785 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1945 20:12:33.245839 TX Bit3 (970~996) 27 983, Bit11 (966~990) 25 978,
1946 20:12:33.245892 TX Bit4 (976~1001) 26 988, Bit12 (967~990) 24 978,
1947 20:12:33.245952 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1948 20:12:33.246007 TX Bit6 (972~998) 27 985, Bit14 (967~990) 24 978,
1949 20:12:33.246061 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1950 20:12:33.246114
1951 20:12:33.246167 Write Rank1 MR14 =0x18
1952 20:12:33.246220
1953 20:12:33.246273 CH=0, VrefRange= 0, VrefLevel = 24
1954 20:12:33.246326 TX Bit0 (978~1003) 26 990, Bit8 (967~990) 24 978,
1955 20:12:33.246380 TX Bit1 (977~1001) 25 989, Bit9 (968~990) 23 979,
1956 20:12:33.246434 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1957 20:12:33.246487 TX Bit3 (970~996) 27 983, Bit11 (966~990) 25 978,
1958 20:12:33.246541 TX Bit4 (976~1001) 26 988, Bit12 (967~990) 24 978,
1959 20:12:33.246594 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1960 20:12:33.246648 TX Bit6 (972~998) 27 985, Bit14 (967~990) 24 978,
1961 20:12:33.246702 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1962 20:12:33.246755
1963 20:12:33.246836 Write Rank1 MR14 =0x1a
1964 20:12:33.246919
1965 20:12:33.247002 CH=0, VrefRange= 0, VrefLevel = 26
1966 20:12:33.247086 TX Bit0 (978~1003) 26 990, Bit8 (967~990) 24 978,
1967 20:12:33.247170 TX Bit1 (977~1001) 25 989, Bit9 (968~990) 23 979,
1968 20:12:33.247254 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1969 20:12:33.247338 TX Bit3 (970~996) 27 983, Bit11 (966~990) 25 978,
1970 20:12:33.247628 TX Bit4 (976~1001) 26 988, Bit12 (967~990) 24 978,
1971 20:12:33.247723 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1972 20:12:33.247811 TX Bit6 (972~998) 27 985, Bit14 (967~990) 24 978,
1973 20:12:33.247896 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1974 20:12:33.403227
1975 20:12:33.403362 Write Rank1 MR14 =0x1c
1976 20:12:33.403429
1977 20:12:33.403490 CH=0, VrefRange= 0, VrefLevel = 28
1978 20:12:33.403553 TX Bit0 (978~1003) 26 990, Bit8 (967~990) 24 978,
1979 20:12:33.403614 TX Bit1 (977~1001) 25 989, Bit9 (968~990) 23 979,
1980 20:12:33.403672 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1981 20:12:33.403728 TX Bit3 (970~996) 27 983, Bit11 (966~990) 25 978,
1982 20:12:33.403783 TX Bit4 (976~1001) 26 988, Bit12 (967~990) 24 978,
1983 20:12:33.403838 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1984 20:12:33.403892 TX Bit6 (972~998) 27 985, Bit14 (967~990) 24 978,
1985 20:12:33.403945 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1986 20:12:33.403998
1987 20:12:33.404051 Write Rank1 MR14 =0x1e
1988 20:12:33.404103
1989 20:12:33.404156 CH=0, VrefRange= 0, VrefLevel = 30
1990 20:12:33.404209 TX Bit0 (978~1003) 26 990, Bit8 (967~990) 24 978,
1991 20:12:33.404262 TX Bit1 (977~1001) 25 989, Bit9 (968~990) 23 979,
1992 20:12:33.404315 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1993 20:12:33.404367 TX Bit3 (970~996) 27 983, Bit11 (966~990) 25 978,
1994 20:12:33.404421 TX Bit4 (976~1001) 26 988, Bit12 (967~990) 24 978,
1995 20:12:33.404473 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1996 20:12:33.404526 TX Bit6 (972~998) 27 985, Bit14 (967~990) 24 978,
1997 20:12:33.404579 TX Bit7 (975~999) 25 987, Bit15 (969~991) 23 980,
1998 20:12:33.404631
1999 20:12:33.404683
2000 20:12:33.404735 TX Vref found, early break! 368< 375
2001 20:12:33.404787 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2002 20:12:33.404839 u1DelayCellOfst[0]=8 cells (7 PI)
2003 20:12:33.404892 u1DelayCellOfst[1]=7 cells (6 PI)
2004 20:12:33.404944 u1DelayCellOfst[2]=6 cells (5 PI)
2005 20:12:33.404996 u1DelayCellOfst[3]=0 cells (0 PI)
2006 20:12:33.405048 u1DelayCellOfst[4]=6 cells (5 PI)
2007 20:12:33.405100 u1DelayCellOfst[5]=1 cells (1 PI)
2008 20:12:33.405152 u1DelayCellOfst[6]=2 cells (2 PI)
2009 20:12:33.405204 u1DelayCellOfst[7]=5 cells (4 PI)
2010 20:12:33.405281 Byte0, DQ PI dly=983, DQM PI dly= 986
2011 20:12:33.405351 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2012 20:12:33.405404
2013 20:12:33.405456 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2014 20:12:33.405509
2015 20:12:33.405561 u1DelayCellOfst[8]=0 cells (0 PI)
2016 20:12:33.405613 u1DelayCellOfst[9]=1 cells (1 PI)
2017 20:12:33.405665 u1DelayCellOfst[10]=3 cells (3 PI)
2018 20:12:33.405731 u1DelayCellOfst[11]=0 cells (0 PI)
2019 20:12:33.405797 u1DelayCellOfst[12]=0 cells (0 PI)
2020 20:12:33.405850 u1DelayCellOfst[13]=0 cells (0 PI)
2021 20:12:33.405902 u1DelayCellOfst[14]=0 cells (0 PI)
2022 20:12:33.405955 u1DelayCellOfst[15]=2 cells (2 PI)
2023 20:12:33.406006 Byte1, DQ PI dly=978, DQM PI dly= 979
2024 20:12:33.406059 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2025 20:12:33.406111
2026 20:12:33.406163 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2027 20:12:33.406215
2028 20:12:33.406266 Write Rank1 MR14 =0x16
2029 20:12:33.406319
2030 20:12:33.406370 Final TX Range 0 Vref 22
2031 20:12:33.406423
2032 20:12:33.406474 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2033 20:12:33.406527
2034 20:12:33.406579 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2035 20:12:33.406631 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2036 20:12:33.406683 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2037 20:12:33.406735 Write Rank1 MR3 =0xb0
2038 20:12:33.406787 DramC Write-DBI on
2039 20:12:33.406839 ==
2040 20:12:33.406891 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2041 20:12:33.406943 fsp= 1, odt_onoff= 1, Byte mode= 0
2042 20:12:33.406995 ==
2043 20:12:33.407048 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2044 20:12:33.407100
2045 20:12:33.407152 Begin, DQ Scan Range 699~763
2046 20:12:33.407204
2047 20:12:33.407255
2048 20:12:33.407307 TX Vref Scan disable
2049 20:12:33.407358 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2050 20:12:33.407412 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2051 20:12:33.407466 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2052 20:12:33.407519 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2053 20:12:33.407572 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2054 20:12:33.407625 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2055 20:12:33.407678 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2056 20:12:33.407731 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2057 20:12:33.407784 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2058 20:12:33.407837 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2059 20:12:33.407890 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2060 20:12:33.407943 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2061 20:12:33.407996 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2062 20:12:33.408049 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2063 20:12:33.408103 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2064 20:12:33.408156 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2065 20:12:33.408209 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2066 20:12:33.408292 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2067 20:12:33.408345 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2068 20:12:33.408398 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2069 20:12:33.408451 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2070 20:12:33.408504 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2071 20:12:33.408557 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2072 20:12:33.408611 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2073 20:12:33.408664 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2074 20:12:33.408717 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2075 20:12:33.408798 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2076 20:12:33.408851 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2077 20:12:33.408905 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2078 20:12:33.409040 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2079 20:12:33.409099 Byte0, DQ PI dly=731, DQM PI dly= 731
2080 20:12:33.409153 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2081 20:12:33.409206
2082 20:12:33.409516 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2083 20:12:33.409578
2084 20:12:33.409632 Byte1, DQ PI dly=722, DQM PI dly= 722
2085 20:12:33.409685 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2086 20:12:33.409739
2087 20:12:33.409792 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2088 20:12:33.409845
2089 20:12:33.409897 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2090 20:12:33.409951 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2091 20:12:33.410005 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2092 20:12:33.410071 Write Rank1 MR3 =0x30
2093 20:12:33.410138 DramC Write-DBI off
2094 20:12:33.410191
2095 20:12:33.410244 [DATLAT]
2096 20:12:33.410296 Freq=1600, CH0 RK1, use_rxtx_scan=0
2097 20:12:33.410350
2098 20:12:33.410402 DATLAT Default: 0x10
2099 20:12:33.410455 7, 0xFFFF, sum=0
2100 20:12:33.410508 8, 0xFFFF, sum=0
2101 20:12:33.410576 9, 0xFFFF, sum=0
2102 20:12:33.410631 10, 0xFFFF, sum=0
2103 20:12:33.410686 11, 0xFFFF, sum=0
2104 20:12:33.410741 12, 0xFFFF, sum=0
2105 20:12:33.410796 13, 0xFFFF, sum=0
2106 20:12:33.410850 14, 0x0, sum=1
2107 20:12:33.410918 15, 0x0, sum=2
2108 20:12:33.410971 16, 0x0, sum=3
2109 20:12:33.411025 17, 0x0, sum=4
2110 20:12:33.411079 pattern=2 first_step=14 total pass=5 best_step=16
2111 20:12:33.411145 ==
2112 20:12:33.411212 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2113 20:12:33.411265 fsp= 1, odt_onoff= 1, Byte mode= 0
2114 20:12:33.411318 ==
2115 20:12:33.411371 Start DQ dly to find pass range UseTestEngine =1
2116 20:12:33.411424 x-axis: bit #, y-axis: DQ dly (-127~63)
2117 20:12:33.411477 RX Vref Scan = 0
2118 20:12:33.411544 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2119 20:12:33.411649 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2120 20:12:33.411706 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2121 20:12:33.411796 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2122 20:12:33.411850 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2123 20:12:33.411904 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2124 20:12:33.411957 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2125 20:12:33.412011 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2126 20:12:33.412064 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2127 20:12:33.412117 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2128 20:12:33.412171 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2129 20:12:33.412224 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2130 20:12:33.412306 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2131 20:12:33.412360 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2132 20:12:33.412423 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2133 20:12:33.412479 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2134 20:12:33.412533 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2135 20:12:33.412587 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2136 20:12:33.412640 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2137 20:12:33.412694 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2138 20:12:33.412748 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2139 20:12:33.412801 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2140 20:12:33.412854 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2141 20:12:33.412908 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2142 20:12:33.412962 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2143 20:12:33.413015 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2144 20:12:33.413069 0, [0] xxxoxxxx oxxxxoxx [MSB]
2145 20:12:33.413123 1, [0] xxxoxoxx ooxoooox [MSB]
2146 20:12:33.413177 2, [0] xxxoxooo ooxoooox [MSB]
2147 20:12:33.413230 3, [0] xxxoxooo ooxooooo [MSB]
2148 20:12:33.413319 4, [0] xxxoxooo ooxooooo [MSB]
2149 20:12:33.413374 5, [0] xxxooooo ooxooooo [MSB]
2150 20:12:33.413427 6, [0] xxxooooo oooooooo [MSB]
2151 20:12:33.413481 7, [0] xooooooo oooooooo [MSB]
2152 20:12:33.413538 8, [0] xooooooo oooooooo [MSB]
2153 20:12:33.413617 34, [0] oooxoooo oooxoooo [MSB]
2154 20:12:33.413751 35, [0] oooxoxoo oooxoxoo [MSB]
2155 20:12:33.413883 36, [0] oooxoxxo oooxoxoo [MSB]
2156 20:12:33.413973 37, [0] oooxoxxx xooxxxxo [MSB]
2157 20:12:33.414060 38, [0] oooxoxxx xooxxxxo [MSB]
2158 20:12:33.414154 39, [0] oooxoxxx xxoxxxxx [MSB]
2159 20:12:33.414248 40, [0] oooxoxxx xxoxxxxx [MSB]
2160 20:12:33.414342 41, [0] oooxxxxx xxoxxxxx [MSB]
2161 20:12:33.414435 42, [0] oooxxxxx xxxxxxxx [MSB]
2162 20:12:33.414528 43, [0] oxxxxxxx xxxxxxxx [MSB]
2163 20:12:33.414621 44, [0] xxxxxxxx xxxxxxxx [MSB]
2164 20:12:33.414715 iDelay=44, Bit 0, Center 26 (9 ~ 43) 35
2165 20:12:33.414806 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36
2166 20:12:33.414897 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
2167 20:12:33.414988 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2168 20:12:33.415080 iDelay=44, Bit 4, Center 22 (5 ~ 40) 36
2169 20:12:33.415171 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2170 20:12:33.415262 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34
2171 20:12:33.415353 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
2172 20:12:33.415444 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
2173 20:12:33.415535 iDelay=44, Bit 9, Center 19 (1 ~ 38) 38
2174 20:12:33.415626 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36
2175 20:12:33.415731 iDelay=44, Bit 11, Center 17 (1 ~ 33) 33
2176 20:12:33.415837 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
2177 20:12:33.415928 iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36
2178 20:12:33.416019 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36
2179 20:12:33.416110 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
2180 20:12:33.416201 ==
2181 20:12:33.416292 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2182 20:12:33.416384 fsp= 1, odt_onoff= 1, Byte mode= 0
2183 20:12:33.416475 ==
2184 20:12:33.416567 DQS Delay:
2185 20:12:33.416658 DQS0 = 0, DQS1 = 0
2186 20:12:33.416749 DQM Delay:
2187 20:12:33.416839 DQM0 = 20, DQM1 = 18
2188 20:12:33.416930 DQ Delay:
2189 20:12:33.417021 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
2190 20:12:33.417113 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2191 20:12:33.417204 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2192 20:12:33.417329 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20
2193 20:12:33.417458
2194 20:12:33.417549
2195 20:12:33.417639
2196 20:12:33.417729 [DramC_TX_OE_Calibration] TA2
2197 20:12:33.417820 Original DQ_B0 (3 6) =30, OEN = 27
2198 20:12:33.417912 Original DQ_B1 (3 6) =30, OEN = 27
2199 20:12:33.418004 23, 0x0, End_B0=23 End_B1=23
2200 20:12:33.418097 24, 0x0, End_B0=24 End_B1=24
2201 20:12:33.418191 25, 0x0, End_B0=25 End_B1=25
2202 20:12:33.418284 26, 0x0, End_B0=26 End_B1=26
2203 20:12:33.418377 27, 0x0, End_B0=27 End_B1=27
2204 20:12:33.418470 28, 0x0, End_B0=28 End_B1=28
2205 20:12:33.418563 29, 0x0, End_B0=29 End_B1=29
2206 20:12:33.418656 30, 0x0, End_B0=30 End_B1=30
2207 20:12:33.418750 31, 0xFFFF, End_B0=30 End_B1=30
2208 20:12:33.418843 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2209 20:12:33.418966 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2210 20:12:33.419058
2211 20:12:33.419148
2212 20:12:33.419239 Write Rank1 MR23 =0x3f
2213 20:12:33.419330 [DQSOSC]
2214 20:12:33.419686 [DQSOSCAuto] RK1, (LSB)MR18= 0x7d, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps
2215 20:12:33.419783 CH0_RK1: MR19=0x3, MR18=0x7D, DQSOSC=352, MR23=63, INC=19, DEC=29
2216 20:12:33.419878 Write Rank1 MR23 =0x3f
2217 20:12:33.419971 [DQSOSC]
2218 20:12:33.420067 [DQSOSCAuto] RK1, (LSB)MR18= 0x7d, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps
2219 20:12:33.420160 CH0 RK1: MR19=3, MR18=7D
2220 20:12:33.420253 [RxdqsGatingPostProcess] freq 1600
2221 20:12:33.420345 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2222 20:12:33.420437 Rank: 0
2223 20:12:33.420531 best DQS0 dly(2T, 0.5T) = (2, 5)
2224 20:12:33.420624 best DQS1 dly(2T, 0.5T) = (2, 5)
2225 20:12:33.420716 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2226 20:12:33.420807 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2227 20:12:33.420898 Rank: 1
2228 20:12:33.420990 best DQS0 dly(2T, 0.5T) = (2, 6)
2229 20:12:33.421081 best DQS1 dly(2T, 0.5T) = (2, 6)
2230 20:12:33.421171 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2231 20:12:33.421283 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2232 20:12:33.421390 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2233 20:12:33.421514 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2234 20:12:33.421605 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2235 20:12:33.421696 Write Rank0 MR13 =0x59
2236 20:12:33.421788 ==
2237 20:12:33.421879 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2238 20:12:33.421971 fsp= 1, odt_onoff= 1, Byte mode= 0
2239 20:12:33.422062 ==
2240 20:12:33.422153 === u2Vref_new: 0x56 --> 0x3a
2241 20:12:33.422245 === u2Vref_new: 0x58 --> 0x58
2242 20:12:33.422336 === u2Vref_new: 0x5a --> 0x5a
2243 20:12:33.422428 === u2Vref_new: 0x5c --> 0x78
2244 20:12:33.422557 === u2Vref_new: 0x5e --> 0x7a
2245 20:12:33.422648 === u2Vref_new: 0x60 --> 0x90
2246 20:12:33.422739 [CA 0] Center 35 (8~63) winsize 56
2247 20:12:33.422830 [CA 1] Center 35 (8~63) winsize 56
2248 20:12:33.422922 [CA 2] Center 32 (3~61) winsize 59
2249 20:12:33.423013 [CA 3] Center 33 (3~63) winsize 61
2250 20:12:33.423104 [CA 4] Center 33 (4~63) winsize 60
2251 20:12:33.423194 [CA 5] Center 25 (-1~52) winsize 54
2252 20:12:33.423284
2253 20:12:33.423375 [CATrainingPosCal] consider 1 rank data
2254 20:12:33.423466 u2DelayCellTimex100 = 762/100 ps
2255 20:12:33.423556 CA0 delay=35 (8~63),Diff = 10 PI (12 cell)
2256 20:12:33.423647 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2257 20:12:33.423738 CA2 delay=32 (3~61),Diff = 7 PI (8 cell)
2258 20:12:33.423828 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2259 20:12:33.423919 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2260 20:12:33.424010 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2261 20:12:33.424101
2262 20:12:33.424191 CA PerBit enable=1, Macro0, CA PI delay=25
2263 20:12:33.424282 === u2Vref_new: 0x5a --> 0x5a
2264 20:12:33.424373
2265 20:12:33.424463 Vref(ca) range 1: 26
2266 20:12:33.424554
2267 20:12:33.424644 CS Dly= 10 (41-0-32)
2268 20:12:33.424735 Write Rank0 MR13 =0xd8
2269 20:12:33.424826 Write Rank0 MR13 =0xd8
2270 20:12:33.424916 Write Rank0 MR12 =0x5a
2271 20:12:33.425007 Write Rank1 MR13 =0x59
2272 20:12:33.425098 ==
2273 20:12:33.425189 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2274 20:12:33.425339 fsp= 1, odt_onoff= 1, Byte mode= 0
2275 20:12:33.425432 ==
2276 20:12:33.425539 === u2Vref_new: 0x56 --> 0x3a
2277 20:12:33.426868 === u2Vref_new: 0x58 --> 0x58
2278 20:12:33.429697 === u2Vref_new: 0x5a --> 0x5a
2279 20:12:33.432692 === u2Vref_new: 0x5c --> 0x78
2280 20:12:33.436085 === u2Vref_new: 0x5e --> 0x7a
2281 20:12:33.439656 === u2Vref_new: 0x60 --> 0x90
2282 20:12:33.442828 [CA 0] Center 36 (9~63) winsize 55
2283 20:12:33.446106 [CA 1] Center 35 (7~63) winsize 57
2284 20:12:33.449459 [CA 2] Center 32 (3~62) winsize 60
2285 20:12:33.452835 [CA 3] Center 33 (3~63) winsize 61
2286 20:12:33.456261 [CA 4] Center 34 (5~63) winsize 59
2287 20:12:33.460028 [CA 5] Center 25 (-2~53) winsize 56
2288 20:12:33.460136
2289 20:12:33.462718 [CATrainingPosCal] consider 2 rank data
2290 20:12:33.466068 u2DelayCellTimex100 = 762/100 ps
2291 20:12:33.469925 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2292 20:12:33.472830 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2293 20:12:33.476236 CA2 delay=32 (3~61),Diff = 7 PI (8 cell)
2294 20:12:33.479700 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2295 20:12:33.482813 CA4 delay=34 (5~63),Diff = 9 PI (11 cell)
2296 20:12:33.486560 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2297 20:12:33.486678
2298 20:12:33.490092 CA PerBit enable=1, Macro0, CA PI delay=25
2299 20:12:33.493480 === u2Vref_new: 0x58 --> 0x58
2300 20:12:33.493583
2301 20:12:33.496444 Vref(ca) range 1: 24
2302 20:12:33.496528
2303 20:12:33.499875 CS Dly= 11 (42-0-32)
2304 20:12:33.499961 Write Rank1 MR13 =0xd8
2305 20:12:33.503228 Write Rank1 MR13 =0xd8
2306 20:12:33.503313 Write Rank1 MR12 =0x58
2307 20:12:33.506794 [RankSwap] Rank num 2, (Multi 1), Rank 0
2308 20:12:33.510047 Write Rank0 MR2 =0xad
2309 20:12:33.513172 [Write Leveling]
2310 20:12:33.513265 delay byte0 byte1 byte2 byte3
2311 20:12:33.513364
2312 20:12:33.516919 10 0 0
2313 20:12:33.517005 11 0 0
2314 20:12:33.519985 12 0 0
2315 20:12:33.520096 13 0 0
2316 20:12:33.523203 14 0 0
2317 20:12:33.523290 15 0 0
2318 20:12:33.523378 16 0 0
2319 20:12:33.526976 17 0 0
2320 20:12:33.527063 18 0 0
2321 20:12:33.529893 19 0 0
2322 20:12:33.529979 20 0 0
2323 20:12:33.530064 21 0 0
2324 20:12:33.533401 22 0 0
2325 20:12:33.533487 23 0 0
2326 20:12:33.536524 24 0 0
2327 20:12:33.536610 25 0 0
2328 20:12:33.536697 26 0 0
2329 20:12:33.540099 27 0 0
2330 20:12:33.540185 28 0 0
2331 20:12:33.543531 29 0 0
2332 20:12:33.543617 30 0 ff
2333 20:12:33.546483 31 0 0
2334 20:12:33.546574 32 0 ff
2335 20:12:33.546676 33 0 ff
2336 20:12:33.549931 34 ff ff
2337 20:12:33.550020 35 ff ff
2338 20:12:33.553120 36 ff ff
2339 20:12:33.553232 37 ff ff
2340 20:12:33.556540 38 ff ff
2341 20:12:33.556652 39 ff ff
2342 20:12:33.559881 40 ff ff
2343 20:12:33.563255 pass bytecount = 0xff (0xff: all bytes pass)
2344 20:12:33.563341
2345 20:12:33.563427 DQS0 dly: 34
2346 20:12:33.566767 DQS1 dly: 32
2347 20:12:33.566851 Write Rank0 MR2 =0x2d
2348 20:12:33.570429 [RankSwap] Rank num 2, (Multi 1), Rank 0
2349 20:12:33.573243 Write Rank0 MR1 =0xd6
2350 20:12:33.573347 [Gating]
2351 20:12:33.573432 ==
2352 20:12:33.580174 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2353 20:12:33.583321 fsp= 1, odt_onoff= 1, Byte mode= 0
2354 20:12:33.583409 ==
2355 20:12:33.586976 3 1 0 |2827 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2356 20:12:33.590016 3 1 4 |3636 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2357 20:12:33.596723 3 1 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2358 20:12:33.600590 3 1 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2359 20:12:33.603420 3 1 16 |3434 3534 |(10 10)(11 11) |(0 1)(0 1)| 0
2360 20:12:33.610548 3 1 20 |1413 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2361 20:12:33.613500 3 1 24 |3333 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2362 20:12:33.617408 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2363 20:12:33.620279 3 2 0 |3d3c b0a |(11 11)(11 11) |(1 1)(0 1)| 0
2364 20:12:33.627444 3 2 4 |3d3c 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2365 20:12:33.630262 3 2 8 |3a39 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2366 20:12:33.633936 3 2 12 |2c2c 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2367 20:12:33.637570 [Byte 0] Lead/lag Transition tap number (1)
2368 20:12:33.643846 3 2 16 |908 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2369 20:12:33.647537 3 2 20 |3c3b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2370 20:12:33.650384 3 2 24 |3b3b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2371 20:12:33.657372 3 2 28 |1918 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2372 20:12:33.660395 3 3 0 |201 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2373 20:12:33.664321 3 3 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2374 20:12:33.670725 3 3 8 |3534 e0d |(11 11)(11 11) |(0 1)(1 1)| 0
2375 20:12:33.673893 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2376 20:12:33.677429 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2377 20:12:33.680757 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2378 20:12:33.687497 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2379 20:12:33.690787 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2380 20:12:33.694236 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2381 20:12:33.697387 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2382 20:12:33.704174 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 20:12:33.707622 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 20:12:33.710979 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2385 20:12:33.717509 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 20:12:33.721394 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 20:12:33.724593 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 20:12:33.731427 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 20:12:33.734411 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 20:12:33.737951 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 20:12:33.740890 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 20:12:33.747984 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 20:12:33.751321 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 20:12:33.754725 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2395 20:12:33.761235 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2396 20:12:33.764917 [Byte 0] Lead/lag Transition tap number (2)
2397 20:12:33.768096 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2398 20:12:33.771544 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2399 20:12:33.778083 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2400 20:12:33.781842 [Byte 1] Lead/lag Transition tap number (2)
2401 20:12:33.784651 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2402 20:12:33.788095 [Byte 0]First pass (3, 6, 0)
2403 20:12:33.791359 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2404 20:12:33.794877 [Byte 1]First pass (3, 6, 4)
2405 20:12:33.798295 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2406 20:12:33.801685 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 20:12:33.804716 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2408 20:12:33.811728 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 20:12:33.814847 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 20:12:33.818787 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 20:12:33.821663 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 20:12:33.824985 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 20:12:33.831835 All bytes gating window > 1UI, Early break!
2414 20:12:33.831921
2415 20:12:33.834960 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2416 20:12:33.835041
2417 20:12:33.841992 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2418 20:12:33.842076
2419 20:12:33.842139
2420 20:12:33.842197
2421 20:12:33.842253 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2422 20:12:33.842309
2423 20:12:33.845095 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2424 20:12:33.845176
2425 20:12:33.845239
2426 20:12:33.848565 Write Rank0 MR1 =0x56
2427 20:12:33.848645
2428 20:12:33.851777 best RODT dly(2T, 0.5T) = (2, 2)
2429 20:12:33.851857
2430 20:12:33.855027 best RODT dly(2T, 0.5T) = (2, 2)
2431 20:12:33.855107 ==
2432 20:12:33.858486 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2433 20:12:33.862171 fsp= 1, odt_onoff= 1, Byte mode= 0
2434 20:12:33.862252 ==
2435 20:12:33.868720 Start DQ dly to find pass range UseTestEngine =0
2436 20:12:33.871675 x-axis: bit #, y-axis: DQ dly (-127~63)
2437 20:12:33.871757 RX Vref Scan = 0
2438 20:12:33.875289 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2439 20:12:33.878468 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2440 20:12:33.882004 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2441 20:12:33.885496 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2442 20:12:33.888789 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2443 20:12:33.888870 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2444 20:12:33.892138 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2445 20:12:33.895225 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2446 20:12:33.898920 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2447 20:12:33.902002 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2448 20:12:33.905395 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2449 20:12:33.908994 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2450 20:12:33.911950 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2451 20:12:33.912037 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2452 20:12:33.915563 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2453 20:12:33.918856 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2454 20:12:33.922273 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2455 20:12:33.925694 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2456 20:12:33.928723 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2457 20:12:33.932131 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2458 20:12:33.932254 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2459 20:12:33.935463 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2460 20:12:33.938650 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2461 20:12:33.942171 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2462 20:12:33.945456 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2463 20:12:33.949014 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2464 20:12:33.952203 0, [0] xxxoxxxx xxxxxxxx [MSB]
2465 20:12:33.952289 1, [0] xxxoxxxx xxxxxxxo [MSB]
2466 20:12:33.955551 2, [0] xxooxxxo xxxxxxxo [MSB]
2467 20:12:33.958963 3, [0] xxooxxxo oxxxxxxo [MSB]
2468 20:12:33.962287 4, [0] xxoooxxo oooxooxo [MSB]
2469 20:12:33.965880 5, [0] xxoooxxo oooooooo [MSB]
2470 20:12:33.969137 6, [0] xooooxxo oooooooo [MSB]
2471 20:12:33.969224 7, [0] xoooooxo oooooooo [MSB]
2472 20:12:33.972079 8, [0] xoooooxo oooooooo [MSB]
2473 20:12:33.976022 32, [0] ooxxoooo oooooooo [MSB]
2474 20:12:33.978996 33, [0] ooxxoooo ooooooox [MSB]
2475 20:12:33.982287 34, [0] ooxxoooo ooooooox [MSB]
2476 20:12:33.985768 35, [0] ooxxxooo ooxoooox [MSB]
2477 20:12:33.985868 36, [0] ooxxxooo xoxoooox [MSB]
2478 20:12:33.988734 37, [0] ooxxxoox xxxooxxx [MSB]
2479 20:12:33.992365 38, [0] ooxxxoox xxxxoxxx [MSB]
2480 20:12:33.995813 39, [0] ooxxxoox xxxxxxxx [MSB]
2481 20:12:33.999212 40, [0] xxxxxoox xxxxxxxx [MSB]
2482 20:12:34.002111 41, [0] xxxxxxxx xxxxxxxx [MSB]
2483 20:12:34.005778 iDelay=41, Bit 0, Center 24 (9 ~ 39) 31
2484 20:12:34.009103 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2485 20:12:34.012583 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2486 20:12:34.015888 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2487 20:12:34.019453 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2488 20:12:34.022198 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2489 20:12:34.025705 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2490 20:12:34.028914 iDelay=41, Bit 7, Center 19 (2 ~ 36) 35
2491 20:12:34.032212 iDelay=41, Bit 8, Center 19 (3 ~ 35) 33
2492 20:12:34.036196 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2493 20:12:34.039286 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2494 20:12:34.042427 iDelay=41, Bit 11, Center 21 (5 ~ 37) 33
2495 20:12:34.048996 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2496 20:12:34.052289 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2497 20:12:34.055761 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2498 20:12:34.059221 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2499 20:12:34.059307 ==
2500 20:12:34.062566 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2501 20:12:34.065865 fsp= 1, odt_onoff= 1, Byte mode= 0
2502 20:12:34.065950 ==
2503 20:12:34.069025 DQS Delay:
2504 20:12:34.069109 DQS0 = 0, DQS1 = 0
2505 20:12:34.072361 DQM Delay:
2506 20:12:34.072482 DQM0 = 20, DQM1 = 19
2507 20:12:34.072568 DQ Delay:
2508 20:12:34.075918 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2509 20:12:34.079479 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2510 20:12:34.082802 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21
2511 20:12:34.085634 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2512 20:12:34.085719
2513 20:12:34.085804
2514 20:12:34.089120 DramC Write-DBI off
2515 20:12:34.089205 ==
2516 20:12:34.095633 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2517 20:12:34.095722 fsp= 1, odt_onoff= 1, Byte mode= 0
2518 20:12:34.099010 ==
2519 20:12:34.102442 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2520 20:12:34.102565
2521 20:12:34.105967 Begin, DQ Scan Range 928~1184
2522 20:12:34.106052
2523 20:12:34.106137
2524 20:12:34.106217 TX Vref Scan disable
2525 20:12:34.109398 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2526 20:12:34.112668 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2527 20:12:34.119180 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2528 20:12:34.122436 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2529 20:12:34.125564 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2530 20:12:34.129015 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2531 20:12:34.132541 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2532 20:12:34.135952 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2533 20:12:34.139051 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2534 20:12:34.142250 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2535 20:12:34.145673 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2536 20:12:34.149082 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2537 20:12:34.152411 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2538 20:12:34.155833 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2539 20:12:34.158959 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2540 20:12:34.162512 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2541 20:12:34.165948 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2542 20:12:34.169026 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2543 20:12:34.175754 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2544 20:12:34.179023 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2545 20:12:34.181961 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2546 20:12:34.185492 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2547 20:12:34.189085 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2548 20:12:34.192201 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2549 20:12:34.195313 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2550 20:12:34.198749 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2551 20:12:34.202407 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2552 20:12:34.205675 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2553 20:12:34.208917 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2554 20:12:34.212264 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2555 20:12:34.215867 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2556 20:12:34.219084 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2557 20:12:34.222121 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2558 20:12:34.225700 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2559 20:12:34.228568 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2560 20:12:34.235540 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2561 20:12:34.238556 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2562 20:12:34.241957 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2563 20:12:34.245601 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2564 20:12:34.248441 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2565 20:12:34.251934 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
2566 20:12:34.255401 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
2567 20:12:34.258662 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
2568 20:12:34.262201 971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]
2569 20:12:34.265797 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2570 20:12:34.268822 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2571 20:12:34.272089 974 |3 6 14|[0] xxoooxxo oooooooo [MSB]
2572 20:12:34.275648 975 |3 6 15|[0] xooooxxo oooooooo [MSB]
2573 20:12:34.278611 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2574 20:12:34.286394 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2575 20:12:34.289779 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
2576 20:12:34.293202 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2577 20:12:34.296507 995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]
2578 20:12:34.299665 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2579 20:12:34.302990 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
2580 20:12:34.306336 Byte0, DQ PI dly=984, DQM PI dly= 984
2581 20:12:34.309905 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2582 20:12:34.310021
2583 20:12:34.316573 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2584 20:12:34.316715
2585 20:12:34.319935 Byte1, DQ PI dly=980, DQM PI dly= 980
2586 20:12:34.323204 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2587 20:12:34.323291
2588 20:12:34.326607 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2589 20:12:34.326718
2590 20:12:34.326838 ==
2591 20:12:34.333115 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2592 20:12:34.336833 fsp= 1, odt_onoff= 1, Byte mode= 0
2593 20:12:34.336972 ==
2594 20:12:34.339603 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2595 20:12:34.339704
2596 20:12:34.343187 Begin, DQ Scan Range 956~1020
2597 20:12:34.346158 Write Rank0 MR14 =0x0
2598 20:12:34.353263
2599 20:12:34.353384 CH=1, VrefRange= 0, VrefLevel = 0
2600 20:12:34.359759 TX Bit0 (978~996) 19 987, Bit8 (971~986) 16 978,
2601 20:12:34.363318 TX Bit1 (977~994) 18 985, Bit9 (971~986) 16 978,
2602 20:12:34.370263 TX Bit2 (976~991) 16 983, Bit10 (973~987) 15 980,
2603 20:12:34.373239 TX Bit3 (974~989) 16 981, Bit11 (974~991) 18 982,
2604 20:12:34.376521 TX Bit4 (977~992) 16 984, Bit12 (974~991) 18 982,
2605 20:12:34.383099 TX Bit5 (977~995) 19 986, Bit13 (975~990) 16 982,
2606 20:12:34.386365 TX Bit6 (978~995) 18 986, Bit14 (974~988) 15 981,
2607 20:12:34.389908 TX Bit7 (976~991) 16 983, Bit15 (968~986) 19 977,
2608 20:12:34.390001
2609 20:12:34.393233 Write Rank0 MR14 =0x2
2610 20:12:34.401625
2611 20:12:34.401743 CH=1, VrefRange= 0, VrefLevel = 2
2612 20:12:34.408452 TX Bit0 (977~997) 21 987, Bit8 (970~987) 18 978,
2613 20:12:34.411843 TX Bit1 (976~994) 19 985, Bit9 (970~987) 18 978,
2614 20:12:34.418345 TX Bit2 (976~991) 16 983, Bit10 (973~987) 15 980,
2615 20:12:34.421686 TX Bit3 (973~990) 18 981, Bit11 (974~991) 18 982,
2616 20:12:34.425121 TX Bit4 (976~992) 17 984, Bit12 (974~991) 18 982,
2617 20:12:34.431454 TX Bit5 (977~996) 20 986, Bit13 (975~991) 17 983,
2618 20:12:34.435153 TX Bit6 (978~996) 19 987, Bit14 (974~989) 16 981,
2619 20:12:34.438074 TX Bit7 (976~991) 16 983, Bit15 (968~987) 20 977,
2620 20:12:34.438191
2621 20:12:34.441426 Write Rank0 MR14 =0x4
2622 20:12:34.450294
2623 20:12:34.450393 CH=1, VrefRange= 0, VrefLevel = 4
2624 20:12:34.456640 TX Bit0 (977~997) 21 987, Bit8 (970~988) 19 979,
2625 20:12:34.460211 TX Bit1 (976~995) 20 985, Bit9 (970~988) 19 979,
2626 20:12:34.466576 TX Bit2 (976~991) 16 983, Bit10 (972~988) 17 980,
2627 20:12:34.469841 TX Bit3 (973~990) 18 981, Bit11 (974~991) 18 982,
2628 20:12:34.473469 TX Bit4 (976~992) 17 984, Bit12 (973~991) 19 982,
2629 20:12:34.480269 TX Bit5 (977~996) 20 986, Bit13 (975~991) 17 983,
2630 20:12:34.483510 TX Bit6 (978~996) 19 987, Bit14 (973~989) 17 981,
2631 20:12:34.486406 TX Bit7 (976~991) 16 983, Bit15 (968~987) 20 977,
2632 20:12:34.486517
2633 20:12:34.490036 Write Rank0 MR14 =0x6
2634 20:12:34.498581
2635 20:12:34.498669 CH=1, VrefRange= 0, VrefLevel = 6
2636 20:12:34.504875 TX Bit0 (977~997) 21 987, Bit8 (970~989) 20 979,
2637 20:12:34.508783 TX Bit1 (976~995) 20 985, Bit9 (970~988) 19 979,
2638 20:12:34.515303 TX Bit2 (975~992) 18 983, Bit10 (972~989) 18 980,
2639 20:12:34.518863 TX Bit3 (972~990) 19 981, Bit11 (974~992) 19 983,
2640 20:12:34.521923 TX Bit4 (976~993) 18 984, Bit12 (972~992) 21 982,
2641 20:12:34.528462 TX Bit5 (977~997) 21 987, Bit13 (974~991) 18 982,
2642 20:12:34.531903 TX Bit6 (978~997) 20 987, Bit14 (973~991) 19 982,
2643 20:12:34.534994 TX Bit7 (976~992) 17 984, Bit15 (968~988) 21 978,
2644 20:12:34.535081
2645 20:12:34.538610 Write Rank0 MR14 =0x8
2646 20:12:34.547018
2647 20:12:34.547109 CH=1, VrefRange= 0, VrefLevel = 8
2648 20:12:34.554065 TX Bit0 (977~998) 22 987, Bit8 (970~990) 21 980,
2649 20:12:34.557070 TX Bit1 (976~996) 21 986, Bit9 (969~989) 21 979,
2650 20:12:34.563588 TX Bit2 (975~992) 18 983, Bit10 (972~990) 19 981,
2651 20:12:34.567638 TX Bit3 (972~991) 20 981, Bit11 (974~992) 19 983,
2652 20:12:34.570642 TX Bit4 (976~993) 18 984, Bit12 (972~992) 21 982,
2653 20:12:34.577206 TX Bit5 (976~997) 22 986, Bit13 (974~991) 18 982,
2654 20:12:34.580522 TX Bit6 (978~997) 20 987, Bit14 (972~991) 20 981,
2655 20:12:34.583728 TX Bit7 (976~992) 17 984, Bit15 (968~988) 21 978,
2656 20:12:34.583816
2657 20:12:34.586934 Write Rank0 MR14 =0xa
2658 20:12:34.595663
2659 20:12:34.598806 CH=1, VrefRange= 0, VrefLevel = 10
2660 20:12:34.602387 TX Bit0 (977~998) 22 987, Bit8 (970~990) 21 980,
2661 20:12:34.605693 TX Bit1 (976~997) 22 986, Bit9 (969~990) 22 979,
2662 20:12:34.612072 TX Bit2 (974~992) 19 983, Bit10 (972~991) 20 981,
2663 20:12:34.615336 TX Bit3 (971~991) 21 981, Bit11 (973~992) 20 982,
2664 20:12:34.618878 TX Bit4 (975~994) 20 984, Bit12 (971~992) 22 981,
2665 20:12:34.625860 TX Bit5 (976~997) 22 986, Bit13 (974~992) 19 983,
2666 20:12:34.629383 TX Bit6 (977~997) 21 987, Bit14 (972~991) 20 981,
2667 20:12:34.632120 TX Bit7 (976~992) 17 984, Bit15 (968~989) 22 978,
2668 20:12:34.632221
2669 20:12:34.635545 Write Rank0 MR14 =0xc
2670 20:12:34.644095
2671 20:12:34.647576 CH=1, VrefRange= 0, VrefLevel = 12
2672 20:12:34.650803 TX Bit0 (977~998) 22 987, Bit8 (969~991) 23 980,
2673 20:12:34.654356 TX Bit1 (975~997) 23 986, Bit9 (969~991) 23 980,
2674 20:12:34.660911 TX Bit2 (974~993) 20 983, Bit10 (971~991) 21 981,
2675 20:12:34.664145 TX Bit3 (971~991) 21 981, Bit11 (972~992) 21 982,
2676 20:12:34.667514 TX Bit4 (975~995) 21 985, Bit12 (971~992) 22 981,
2677 20:12:34.674417 TX Bit5 (976~998) 23 987, Bit13 (973~992) 20 982,
2678 20:12:34.677461 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
2679 20:12:34.680966 TX Bit7 (975~993) 19 984, Bit15 (967~989) 23 978,
2680 20:12:34.681082
2681 20:12:34.684122 Write Rank0 MR14 =0xe
2682 20:12:34.693078
2683 20:12:34.696422 CH=1, VrefRange= 0, VrefLevel = 14
2684 20:12:34.700002 TX Bit0 (977~999) 23 988, Bit8 (969~991) 23 980,
2685 20:12:34.703359 TX Bit1 (975~997) 23 986, Bit9 (969~991) 23 980,
2686 20:12:34.709766 TX Bit2 (974~993) 20 983, Bit10 (970~992) 23 981,
2687 20:12:34.713078 TX Bit3 (971~992) 22 981, Bit11 (972~993) 22 982,
2688 20:12:34.716155 TX Bit4 (975~995) 21 985, Bit12 (971~992) 22 981,
2689 20:12:34.722785 TX Bit5 (976~998) 23 987, Bit13 (972~992) 21 982,
2690 20:12:34.726236 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
2691 20:12:34.729945 TX Bit7 (975~993) 19 984, Bit15 (967~990) 24 978,
2692 20:12:34.733202
2693 20:12:34.733319 Write Rank0 MR14 =0x10
2694 20:12:34.742138
2695 20:12:34.745330 CH=1, VrefRange= 0, VrefLevel = 16
2696 20:12:34.748871 TX Bit0 (977~999) 23 988, Bit8 (969~992) 24 980,
2697 20:12:34.751934 TX Bit1 (975~997) 23 986, Bit9 (969~991) 23 980,
2698 20:12:34.758599 TX Bit2 (973~994) 22 983, Bit10 (969~992) 24 980,
2699 20:12:34.762151 TX Bit3 (970~992) 23 981, Bit11 (971~993) 23 982,
2700 20:12:34.765638 TX Bit4 (975~996) 22 985, Bit12 (970~993) 24 981,
2701 20:12:34.772066 TX Bit5 (976~998) 23 987, Bit13 (972~992) 21 982,
2702 20:12:34.775627 TX Bit6 (977~999) 23 988, Bit14 (971~992) 22 981,
2703 20:12:34.778744 TX Bit7 (975~994) 20 984, Bit15 (967~991) 25 979,
2704 20:12:34.778839
2705 20:12:34.781801 Write Rank0 MR14 =0x12
2706 20:12:34.791160
2707 20:12:34.794069 CH=1, VrefRange= 0, VrefLevel = 18
2708 20:12:34.797717 TX Bit0 (976~999) 24 987, Bit8 (969~992) 24 980,
2709 20:12:34.800868 TX Bit1 (975~998) 24 986, Bit9 (969~991) 23 980,
2710 20:12:34.807364 TX Bit2 (973~994) 22 983, Bit10 (969~992) 24 980,
2711 20:12:34.811186 TX Bit3 (970~992) 23 981, Bit11 (971~993) 23 982,
2712 20:12:34.814321 TX Bit4 (974~996) 23 985, Bit12 (970~993) 24 981,
2713 20:12:34.821059 TX Bit5 (976~999) 24 987, Bit13 (971~992) 22 981,
2714 20:12:34.824252 TX Bit6 (977~999) 23 988, Bit14 (970~992) 23 981,
2715 20:12:34.827246 TX Bit7 (974~994) 21 984, Bit15 (967~991) 25 979,
2716 20:12:34.830701
2717 20:12:34.830814 Write Rank0 MR14 =0x14
2718 20:12:34.840105
2719 20:12:34.843530 CH=1, VrefRange= 0, VrefLevel = 20
2720 20:12:34.846461 TX Bit0 (976~999) 24 987, Bit8 (968~992) 25 980,
2721 20:12:34.849605 TX Bit1 (975~998) 24 986, Bit9 (968~991) 24 979,
2722 20:12:34.856552 TX Bit2 (972~995) 24 983, Bit10 (969~992) 24 980,
2723 20:12:34.859960 TX Bit3 (970~993) 24 981, Bit11 (970~994) 25 982,
2724 20:12:34.863131 TX Bit4 (974~997) 24 985, Bit12 (970~993) 24 981,
2725 20:12:34.869606 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2726 20:12:34.872866 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2727 20:12:34.876776 TX Bit7 (974~996) 23 985, Bit15 (966~991) 26 978,
2728 20:12:34.876853
2729 20:12:34.879516 Write Rank0 MR14 =0x16
2730 20:12:34.888734
2731 20:12:34.891997 CH=1, VrefRange= 0, VrefLevel = 22
2732 20:12:34.895973 TX Bit0 (976~1000) 25 988, Bit8 (968~992) 25 980,
2733 20:12:34.899134 TX Bit1 (975~998) 24 986, Bit9 (968~992) 25 980,
2734 20:12:34.905557 TX Bit2 (972~995) 24 983, Bit10 (969~992) 24 980,
2735 20:12:34.908666 TX Bit3 (969~993) 25 981, Bit11 (970~994) 25 982,
2736 20:12:34.912089 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
2737 20:12:34.918645 TX Bit5 (975~999) 25 987, Bit13 (971~993) 23 982,
2738 20:12:34.922020 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2739 20:12:34.925973 TX Bit7 (973~996) 24 984, Bit15 (966~991) 26 978,
2740 20:12:34.928720
2741 20:12:34.928821 Write Rank0 MR14 =0x18
2742 20:12:34.938089
2743 20:12:34.942181 CH=1, VrefRange= 0, VrefLevel = 24
2744 20:12:34.944675 TX Bit0 (976~1000) 25 988, Bit8 (968~992) 25 980,
2745 20:12:34.947784 TX Bit1 (974~998) 25 986, Bit9 (968~992) 25 980,
2746 20:12:34.954558 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
2747 20:12:34.957905 TX Bit3 (969~993) 25 981, Bit11 (970~994) 25 982,
2748 20:12:34.961214 TX Bit4 (973~997) 25 985, Bit12 (969~994) 26 981,
2749 20:12:34.967941 TX Bit5 (975~999) 25 987, Bit13 (970~992) 23 981,
2750 20:12:34.971390 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2751 20:12:34.974591 TX Bit7 (973~997) 25 985, Bit15 (966~990) 25 978,
2752 20:12:34.977582
2753 20:12:34.977705 Write Rank0 MR14 =0x1a
2754 20:12:34.987398
2755 20:12:34.987489 CH=1, VrefRange= 0, VrefLevel = 26
2756 20:12:34.993841 TX Bit0 (976~1000) 25 988, Bit8 (968~992) 25 980,
2757 20:12:34.997430 TX Bit1 (974~999) 26 986, Bit9 (968~992) 25 980,
2758 20:12:35.003642 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
2759 20:12:35.007276 TX Bit3 (969~993) 25 981, Bit11 (969~993) 25 981,
2760 20:12:35.010624 TX Bit4 (972~997) 26 984, Bit12 (969~993) 25 981,
2761 20:12:35.017422 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
2762 20:12:35.020730 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2763 20:12:35.023800 TX Bit7 (972~997) 26 984, Bit15 (967~990) 24 978,
2764 20:12:35.027197
2765 20:12:35.027280 Write Rank0 MR14 =0x1c
2766 20:12:35.036235
2767 20:12:35.039511 CH=1, VrefRange= 0, VrefLevel = 28
2768 20:12:35.043104 TX Bit0 (976~1000) 25 988, Bit8 (968~992) 25 980,
2769 20:12:35.046447 TX Bit1 (974~999) 26 986, Bit9 (968~992) 25 980,
2770 20:12:35.053586 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
2771 20:12:35.056264 TX Bit3 (969~993) 25 981, Bit11 (969~993) 25 981,
2772 20:12:35.059520 TX Bit4 (972~997) 26 984, Bit12 (969~993) 25 981,
2773 20:12:35.066395 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
2774 20:12:35.070208 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2775 20:12:35.076131 TX Bit7 (972~997) 26 984, Bit15 (967~990) 24 978,
2776 20:12:35.076247
2777 20:12:35.076342 Write Rank0 MR14 =0x1e
2778 20:12:35.085411
2779 20:12:35.088973 CH=1, VrefRange= 0, VrefLevel = 30
2780 20:12:35.092053 TX Bit0 (976~1000) 25 988, Bit8 (968~992) 25 980,
2781 20:12:35.095625 TX Bit1 (974~999) 26 986, Bit9 (968~992) 25 980,
2782 20:12:35.102100 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
2783 20:12:35.105520 TX Bit3 (969~993) 25 981, Bit11 (969~993) 25 981,
2784 20:12:35.108735 TX Bit4 (972~997) 26 984, Bit12 (969~993) 25 981,
2785 20:12:35.115598 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
2786 20:12:35.119076 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2787 20:12:35.122493 TX Bit7 (972~997) 26 984, Bit15 (967~990) 24 978,
2788 20:12:35.125594
2789 20:12:35.125676 Write Rank0 MR14 =0x20
2790 20:12:35.134752
2791 20:12:35.138786 CH=1, VrefRange= 0, VrefLevel = 32
2792 20:12:35.141321 TX Bit0 (976~1000) 25 988, Bit8 (968~992) 25 980,
2793 20:12:35.145393 TX Bit1 (974~999) 26 986, Bit9 (968~992) 25 980,
2794 20:12:35.151539 TX Bit2 (971~995) 25 983, Bit10 (969~992) 24 980,
2795 20:12:35.154725 TX Bit3 (969~993) 25 981, Bit11 (969~993) 25 981,
2796 20:12:35.158001 TX Bit4 (972~997) 26 984, Bit12 (969~993) 25 981,
2797 20:12:35.165040 TX Bit5 (975~999) 25 987, Bit13 (969~992) 24 980,
2798 20:12:35.168550 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2799 20:12:35.171418 TX Bit7 (972~997) 26 984, Bit15 (967~990) 24 978,
2800 20:12:35.171502
2801 20:12:35.174822
2802 20:12:35.178398 TX Vref found, early break! 370< 379
2803 20:12:35.181428 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2804 20:12:35.184736 u1DelayCellOfst[0]=8 cells (7 PI)
2805 20:12:35.188293 u1DelayCellOfst[1]=6 cells (5 PI)
2806 20:12:35.191422 u1DelayCellOfst[2]=2 cells (2 PI)
2807 20:12:35.194747 u1DelayCellOfst[3]=0 cells (0 PI)
2808 20:12:35.194829 u1DelayCellOfst[4]=3 cells (3 PI)
2809 20:12:35.198203 u1DelayCellOfst[5]=7 cells (6 PI)
2810 20:12:35.201642 u1DelayCellOfst[6]=8 cells (7 PI)
2811 20:12:35.204541 u1DelayCellOfst[7]=3 cells (3 PI)
2812 20:12:35.208052 Byte0, DQ PI dly=981, DQM PI dly= 984
2813 20:12:35.211453 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2814 20:12:35.214897
2815 20:12:35.218228 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2816 20:12:35.218311
2817 20:12:35.221755 u1DelayCellOfst[8]=2 cells (2 PI)
2818 20:12:35.225202 u1DelayCellOfst[9]=2 cells (2 PI)
2819 20:12:35.227916 u1DelayCellOfst[10]=2 cells (2 PI)
2820 20:12:35.231566 u1DelayCellOfst[11]=3 cells (3 PI)
2821 20:12:35.231649 u1DelayCellOfst[12]=3 cells (3 PI)
2822 20:12:35.234857 u1DelayCellOfst[13]=2 cells (2 PI)
2823 20:12:35.238065 u1DelayCellOfst[14]=2 cells (2 PI)
2824 20:12:35.241741 u1DelayCellOfst[15]=0 cells (0 PI)
2825 20:12:35.244909 Byte1, DQ PI dly=978, DQM PI dly= 979
2826 20:12:35.251885 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2827 20:12:35.251972
2828 20:12:35.255224 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2829 20:12:35.255308
2830 20:12:35.258636 Write Rank0 MR14 =0x1a
2831 20:12:35.258743
2832 20:12:35.258809 Final TX Range 0 Vref 26
2833 20:12:35.258902
2834 20:12:35.264987 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2835 20:12:35.265072
2836 20:12:35.271366 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2837 20:12:35.278233 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2838 20:12:35.285189 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2839 20:12:35.288448 Write Rank0 MR3 =0xb0
2840 20:12:35.291592 DramC Write-DBI on
2841 20:12:35.291678 ==
2842 20:12:35.294824 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2843 20:12:35.298327 fsp= 1, odt_onoff= 1, Byte mode= 0
2844 20:12:35.298415 ==
2845 20:12:35.301558 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2846 20:12:35.304806
2847 20:12:35.304889 Begin, DQ Scan Range 699~763
2848 20:12:35.304954
2849 20:12:35.305044
2850 20:12:35.308201 TX Vref Scan disable
2851 20:12:35.311813 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2852 20:12:35.314858 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2853 20:12:35.318439 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2854 20:12:35.321589 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2855 20:12:35.324777 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2856 20:12:35.328337 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2857 20:12:35.331618 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2858 20:12:35.334943 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2859 20:12:35.338103 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2860 20:12:35.341478 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2861 20:12:35.345421 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2862 20:12:35.351342 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2863 20:12:35.355112 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2864 20:12:35.358158 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2865 20:12:35.361964 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2866 20:12:35.365174 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2867 20:12:35.368379 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2868 20:12:35.375729 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2869 20:12:35.378749 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2870 20:12:35.382234 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2871 20:12:35.385232 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2872 20:12:35.389069 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2873 20:12:35.392090 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2874 20:12:35.395701 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2875 20:12:35.398654 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2876 20:12:35.402089 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2877 20:12:35.405791 Byte0, DQ PI dly=729, DQM PI dly= 729
2878 20:12:35.409023 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2879 20:12:35.409098
2880 20:12:35.415259 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2881 20:12:35.415344
2882 20:12:35.419294 Byte1, DQ PI dly=723, DQM PI dly= 723
2883 20:12:35.422281 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2884 20:12:35.422357
2885 20:12:35.425281 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2886 20:12:35.425367
2887 20:12:35.432147 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2888 20:12:35.439155 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2889 20:12:35.448593 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2890 20:12:35.448709 Write Rank0 MR3 =0x30
2891 20:12:35.452007 DramC Write-DBI off
2892 20:12:35.452100
2893 20:12:35.452190 [DATLAT]
2894 20:12:35.455627 Freq=1600, CH1 RK0, use_rxtx_scan=0
2895 20:12:35.455698
2896 20:12:35.458803 DATLAT Default: 0xf
2897 20:12:35.458885 7, 0xFFFF, sum=0
2898 20:12:35.461778 8, 0xFFFF, sum=0
2899 20:12:35.461861 9, 0xFFFF, sum=0
2900 20:12:35.465174 10, 0xFFFF, sum=0
2901 20:12:35.465264 11, 0xFFFF, sum=0
2902 20:12:35.468387 12, 0xFFFF, sum=0
2903 20:12:35.468474 13, 0xFFFF, sum=0
2904 20:12:35.468540 14, 0x0, sum=1
2905 20:12:35.472170 15, 0x0, sum=2
2906 20:12:35.472248 16, 0x0, sum=3
2907 20:12:35.475472 17, 0x0, sum=4
2908 20:12:35.478641 pattern=2 first_step=14 total pass=5 best_step=16
2909 20:12:35.478724 ==
2910 20:12:35.485751 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2911 20:12:35.488422 fsp= 1, odt_onoff= 1, Byte mode= 0
2912 20:12:35.488527 ==
2913 20:12:35.491645 Start DQ dly to find pass range UseTestEngine =1
2914 20:12:35.495043 x-axis: bit #, y-axis: DQ dly (-127~63)
2915 20:12:35.495145 RX Vref Scan = 1
2916 20:12:35.619688
2917 20:12:35.619835 RX Vref found, early break!
2918 20:12:35.619906
2919 20:12:35.625744 Final RX Vref 13, apply to both rank0 and 1
2920 20:12:35.625837 ==
2921 20:12:35.629129 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2922 20:12:35.632325 fsp= 1, odt_onoff= 1, Byte mode= 0
2923 20:12:35.632414 ==
2924 20:12:35.632480 DQS Delay:
2925 20:12:35.635923 DQS0 = 0, DQS1 = 0
2926 20:12:35.636007 DQM Delay:
2927 20:12:35.639570 DQM0 = 20, DQM1 = 18
2928 20:12:35.639655 DQ Delay:
2929 20:12:35.642619 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
2930 20:12:35.645754 DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =19
2931 20:12:35.649218 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2932 20:12:35.652509 DQ12 =20, DQ13 =19, DQ14 =19, DQ15 =16
2933 20:12:35.652595
2934 20:12:35.652693
2935 20:12:35.652786
2936 20:12:35.655726 [DramC_TX_OE_Calibration] TA2
2937 20:12:35.658894 Original DQ_B0 (3 6) =30, OEN = 27
2938 20:12:35.662301 Original DQ_B1 (3 6) =30, OEN = 27
2939 20:12:35.665736 23, 0x0, End_B0=23 End_B1=23
2940 20:12:35.665821 24, 0x0, End_B0=24 End_B1=24
2941 20:12:35.669065 25, 0x0, End_B0=25 End_B1=25
2942 20:12:35.672753 26, 0x0, End_B0=26 End_B1=26
2943 20:12:35.676144 27, 0x0, End_B0=27 End_B1=27
2944 20:12:35.676251 28, 0x0, End_B0=28 End_B1=28
2945 20:12:35.679307 29, 0x0, End_B0=29 End_B1=29
2946 20:12:35.682513 30, 0x0, End_B0=30 End_B1=30
2947 20:12:35.686204 31, 0xFFFF, End_B0=30 End_B1=30
2948 20:12:35.689281 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2949 20:12:35.696101 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2950 20:12:35.696196
2951 20:12:35.696261
2952 20:12:35.699175 Write Rank0 MR23 =0x3f
2953 20:12:35.699256 [DQSOSC]
2954 20:12:35.706090 [DQSOSCAuto] RK0, (LSB)MR18= 0xbc, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2955 20:12:35.712753 CH1_RK0: MR19=0x3, MR18=0xBC, DQSOSC=329, MR23=63, INC=22, DEC=34
2956 20:12:35.715939 Write Rank0 MR23 =0x3f
2957 20:12:35.716023 [DQSOSC]
2958 20:12:35.722526 [DQSOSCAuto] RK0, (LSB)MR18= 0xbc, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2959 20:12:35.725843 CH1 RK0: MR19=3, MR18=BC
2960 20:12:35.729242 [RankSwap] Rank num 2, (Multi 1), Rank 1
2961 20:12:35.732499 Write Rank0 MR2 =0xad
2962 20:12:35.732583 [Write Leveling]
2963 20:12:35.736134 delay byte0 byte1 byte2 byte3
2964 20:12:35.736216
2965 20:12:35.736280 10 0 0
2966 20:12:35.739494 11 0 0
2967 20:12:35.739577 12 0 0
2968 20:12:35.742721 13 0 0
2969 20:12:35.742805 14 0 0
2970 20:12:35.745766 15 0 0
2971 20:12:35.745848 16 0 0
2972 20:12:35.745912 17 0 0
2973 20:12:35.749509 18 0 0
2974 20:12:35.749592 19 0 0
2975 20:12:35.752813 20 0 0
2976 20:12:35.752896 21 0 0
2977 20:12:35.752961 22 0 0
2978 20:12:35.756045 23 0 0
2979 20:12:35.756160 24 0 0
2980 20:12:35.759031 25 0 0
2981 20:12:35.759111 26 0 0
2982 20:12:35.759177 27 0 0
2983 20:12:35.762541 28 0 0
2984 20:12:35.762616 29 0 0
2985 20:12:35.765738 30 0 0
2986 20:12:35.765809 31 0 0
2987 20:12:35.768999 32 0 ff
2988 20:12:35.769097 33 0 ff
2989 20:12:35.769186 34 0 ff
2990 20:12:35.772738 35 0 ff
2991 20:12:35.772837 36 ff ff
2992 20:12:35.776009 37 ff ff
2993 20:12:35.776092 38 ff ff
2994 20:12:35.779326 39 ff ff
2995 20:12:35.779412 40 ff ff
2996 20:12:35.782944 41 ff ff
2997 20:12:35.783027 42 ff ff
2998 20:12:35.786230 pass bytecount = 0xff (0xff: all bytes pass)
2999 20:12:35.786313
3000 20:12:35.789129 DQS0 dly: 36
3001 20:12:35.789236 DQS1 dly: 32
3002 20:12:35.793062 Write Rank0 MR2 =0x2d
3003 20:12:35.795881 [RankSwap] Rank num 2, (Multi 1), Rank 0
3004 20:12:35.795963 Write Rank1 MR1 =0xd6
3005 20:12:35.799328 [Gating]
3006 20:12:35.799411 ==
3007 20:12:35.802405 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3008 20:12:35.806135 fsp= 1, odt_onoff= 1, Byte mode= 0
3009 20:12:35.806219 ==
3010 20:12:35.812607 3 1 0 |807 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3011 20:12:35.816224 3 1 4 |1f1e 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3012 20:12:35.819175 3 1 8 |3434 3534 |(0 0)(11 11) |(0 1)(0 1)| 0
3013 20:12:35.822663 3 1 12 |3333 3534 |(10 10)(11 11) |(0 1)(0 1)| 0
3014 20:12:35.829382 3 1 16 |2222 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3015 20:12:35.832684 3 1 20 |3232 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3016 20:12:35.835687 3 1 24 |1211 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3017 20:12:35.842651 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3018 20:12:35.845629 3 2 0 |3a3a 201 |(11 11)(11 11) |(0 0)(1 1)| 0
3019 20:12:35.849062 3 2 4 |3c3c 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3020 20:12:35.855851 3 2 8 |3837 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3021 20:12:35.859238 3 2 12 |3a3a 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0
3022 20:12:35.862240 3 2 16 |3b3a 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3023 20:12:35.865663 3 2 20 |3938 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3024 20:12:35.872542 3 2 24 |3938 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3025 20:12:35.876065 3 2 28 |3837 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3026 20:12:35.879151 3 3 0 |1413 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
3027 20:12:35.886041 3 3 4 |3534 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3028 20:12:35.889123 [Byte 0] Lead/lag falling Transition (3, 3, 4)
3029 20:12:35.892759 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3030 20:12:35.896140 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3031 20:12:35.902684 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3032 20:12:35.905978 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3033 20:12:35.909189 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3034 20:12:35.915900 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3035 20:12:35.918919 3 3 28 |e0d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3036 20:12:35.922639 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
3037 20:12:35.929165 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3038 20:12:35.932739 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3039 20:12:35.935510 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3040 20:12:35.942781 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3041 20:12:35.945582 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3042 20:12:35.948938 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3043 20:12:35.952334 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3044 20:12:35.958898 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3045 20:12:35.962877 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3046 20:12:35.966117 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3047 20:12:35.972431 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3048 20:12:35.975908 [Byte 0] Lead/lag falling Transition (3, 5, 12)
3049 20:12:35.979125 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3050 20:12:35.985663 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3051 20:12:35.989120 [Byte 0] Lead/lag Transition tap number (3)
3052 20:12:35.992287 [Byte 1] Lead/lag falling Transition (3, 5, 20)
3053 20:12:35.995729 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3054 20:12:35.999011 [Byte 1] Lead/lag Transition tap number (2)
3055 20:12:36.005799 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3056 20:12:36.009371 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3057 20:12:36.012513 [Byte 0]First pass (3, 6, 0)
3058 20:12:36.015593 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3059 20:12:36.019057 [Byte 1]First pass (3, 6, 4)
3060 20:12:36.022146 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3061 20:12:36.025678 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3062 20:12:36.029151 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3063 20:12:36.035789 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3064 20:12:36.038818 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3065 20:12:36.042053 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3066 20:12:36.045432 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3067 20:12:36.048830 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3068 20:12:36.055573 All bytes gating window > 1UI, Early break!
3069 20:12:36.055687
3070 20:12:36.058907 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 18)
3071 20:12:36.059011
3072 20:12:36.062157 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)
3073 20:12:36.062242
3074 20:12:36.062307
3075 20:12:36.062368
3076 20:12:36.065373 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 18)
3077 20:12:36.065457
3078 20:12:36.069053 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3079 20:12:36.069162
3080 20:12:36.069254
3081 20:12:36.072586 Write Rank1 MR1 =0x56
3082 20:12:36.072669
3083 20:12:36.075703 best RODT dly(2T, 0.5T) = (2, 2)
3084 20:12:36.075794
3085 20:12:36.079003 best RODT dly(2T, 0.5T) = (2, 2)
3086 20:12:36.079086 ==
3087 20:12:36.085671 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3088 20:12:36.085763 fsp= 1, odt_onoff= 1, Byte mode= 0
3089 20:12:36.088711 ==
3090 20:12:36.092130 Start DQ dly to find pass range UseTestEngine =0
3091 20:12:36.095525 x-axis: bit #, y-axis: DQ dly (-127~63)
3092 20:12:36.095610 RX Vref Scan = 0
3093 20:12:36.098837 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3094 20:12:36.102311 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3095 20:12:36.105476 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3096 20:12:36.108916 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3097 20:12:36.112170 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3098 20:12:36.115829 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3099 20:12:36.115917 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3100 20:12:36.119015 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3101 20:12:36.122290 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3102 20:12:36.125773 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3103 20:12:36.129253 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3104 20:12:36.132828 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3105 20:12:36.135679 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3106 20:12:36.139103 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3107 20:12:36.142665 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3108 20:12:36.142753 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3109 20:12:36.146055 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3110 20:12:36.149124 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3111 20:12:36.152436 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3112 20:12:36.156153 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3113 20:12:36.158888 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3114 20:12:36.162732 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3115 20:12:36.162820 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3116 20:12:36.165782 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3117 20:12:36.168910 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3118 20:12:36.172998 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3119 20:12:36.175629 0, [0] xxooxxxx xxxxxxxo [MSB]
3120 20:12:36.179221 1, [0] xxooxxxo xxxxxxxo [MSB]
3121 20:12:36.179308 2, [0] xxoooxxo oooxxxxo [MSB]
3122 20:12:36.182622 3, [0] xxoooxxo oooxxooo [MSB]
3123 20:12:36.185860 4, [0] xxoooxxo ooooxooo [MSB]
3124 20:12:36.189168 5, [0] xooooxxo oooooooo [MSB]
3125 20:12:36.192482 6, [0] xoooooxo oooooooo [MSB]
3126 20:12:36.195979 34, [0] oooxoooo oooooooo [MSB]
3127 20:12:36.196066 35, [0] ooxxoooo ooooooox [MSB]
3128 20:12:36.199312 36, [0] ooxxoooo ooooooox [MSB]
3129 20:12:36.202737 37, [0] ooxxoooo ooxoooox [MSB]
3130 20:12:36.206020 38, [0] ooxxxoox xoxooxox [MSB]
3131 20:12:36.209133 39, [0] ooxxxoox xxxxoxxx [MSB]
3132 20:12:36.212635 40, [0] ooxxxoox xxxxoxxx [MSB]
3133 20:12:36.216116 41, [0] ooxxxoox xxxxxxxx [MSB]
3134 20:12:36.216204 42, [0] xxxxxxxx xxxxxxxx [MSB]
3135 20:12:36.219112 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3136 20:12:36.226026 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3137 20:12:36.229135 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3138 20:12:36.232567 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3139 20:12:36.235867 iDelay=42, Bit 4, Center 19 (2 ~ 37) 36
3140 20:12:36.239374 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3141 20:12:36.242626 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3142 20:12:36.245983 iDelay=42, Bit 7, Center 19 (1 ~ 37) 37
3143 20:12:36.249191 iDelay=42, Bit 8, Center 19 (2 ~ 37) 36
3144 20:12:36.252620 iDelay=42, Bit 9, Center 20 (2 ~ 38) 37
3145 20:12:36.255819 iDelay=42, Bit 10, Center 19 (2 ~ 36) 35
3146 20:12:36.259705 iDelay=42, Bit 11, Center 21 (4 ~ 38) 35
3147 20:12:36.262665 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3148 20:12:36.265895 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3149 20:12:36.269365 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3150 20:12:36.276209 iDelay=42, Bit 15, Center 16 (-2 ~ 34) 37
3151 20:12:36.276295 ==
3152 20:12:36.279390 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3153 20:12:36.282886 fsp= 1, odt_onoff= 1, Byte mode= 0
3154 20:12:36.282967 ==
3155 20:12:36.283032 DQS Delay:
3156 20:12:36.286012 DQS0 = 0, DQS1 = 0
3157 20:12:36.286093 DQM Delay:
3158 20:12:36.289154 DQM0 = 20, DQM1 = 19
3159 20:12:36.289301 DQ Delay:
3160 20:12:36.292687 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3161 20:12:36.296302 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3162 20:12:36.299427 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21
3163 20:12:36.302700 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3164 20:12:36.302783
3165 20:12:36.302847
3166 20:12:36.306275 DramC Write-DBI off
3167 20:12:36.306387 ==
3168 20:12:36.309184 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3169 20:12:36.312385 fsp= 1, odt_onoff= 1, Byte mode= 0
3170 20:12:36.312468 ==
3171 20:12:36.319048 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3172 20:12:36.319131
3173 20:12:36.319195 Begin, DQ Scan Range 928~1184
3174 20:12:36.319256
3175 20:12:36.322397
3176 20:12:36.322479 TX Vref Scan disable
3177 20:12:36.325766 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3178 20:12:36.329277 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3179 20:12:36.332755 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3180 20:12:36.335723 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3181 20:12:36.339268 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3182 20:12:36.342656 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3183 20:12:36.349293 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3184 20:12:36.352501 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3185 20:12:36.356173 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3186 20:12:36.359418 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3187 20:12:36.362968 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3188 20:12:36.366386 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3189 20:12:36.369599 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3190 20:12:36.372806 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3191 20:12:36.375973 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3192 20:12:36.379306 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3193 20:12:36.382626 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3194 20:12:36.386086 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3195 20:12:36.389405 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3196 20:12:36.392552 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3197 20:12:36.395792 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3198 20:12:36.399163 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3199 20:12:36.406406 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3200 20:12:36.409403 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3201 20:12:36.412621 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3202 20:12:36.416127 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3203 20:12:36.419176 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3204 20:12:36.422426 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3205 20:12:36.425596 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3206 20:12:36.428930 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3207 20:12:36.432470 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3208 20:12:36.435802 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3209 20:12:36.439102 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3210 20:12:36.442565 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3211 20:12:36.446049 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3212 20:12:36.449134 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3213 20:12:36.452674 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3214 20:12:36.456021 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3215 20:12:36.459843 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3216 20:12:36.462491 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3217 20:12:36.466054 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3218 20:12:36.469051 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3219 20:12:36.472595 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
3220 20:12:36.475933 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3221 20:12:36.482451 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3222 20:12:36.486008 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3223 20:12:36.489114 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
3224 20:12:36.492565 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3225 20:12:36.496005 976 |3 6 16|[0] xxoooxxx oooooooo [MSB]
3226 20:12:36.499192 977 |3 6 17|[0] xooooooo oooooooo [MSB]
3227 20:12:36.502470 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3228 20:12:36.505950 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3229 20:12:36.512981 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3230 20:12:36.516153 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3231 20:12:36.519407 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3232 20:12:36.522961 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3233 20:12:36.525827 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
3234 20:12:36.529561 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
3235 20:12:36.532749 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
3236 20:12:36.535943 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
3237 20:12:36.539260 999 |3 6 39|[0] ooxxxoox xxxxxxxx [MSB]
3238 20:12:36.542495 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3239 20:12:36.545981 Byte0, DQ PI dly=986, DQM PI dly= 986
3240 20:12:36.549279 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3241 20:12:36.549383
3242 20:12:36.555768 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3243 20:12:36.555855
3244 20:12:36.559630 Byte1, DQ PI dly=978, DQM PI dly= 978
3245 20:12:36.562371 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3246 20:12:36.562455
3247 20:12:36.566068 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3248 20:12:36.569128
3249 20:12:36.569235 ==
3250 20:12:36.572596 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3251 20:12:36.575636 fsp= 1, odt_onoff= 1, Byte mode= 0
3252 20:12:36.575719 ==
3253 20:12:36.579118 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3254 20:12:36.579229
3255 20:12:36.582432 Begin, DQ Scan Range 954~1018
3256 20:12:36.586130 wait MRW command Rank1 MR14 =0x0 fired (1)
3257 20:12:36.589194 Write Rank1 MR14 =0x0
3258 20:12:36.598408
3259 20:12:36.598501 CH=1, VrefRange= 0, VrefLevel = 0
3260 20:12:36.604452 TX Bit0 (980~998) 19 989, Bit8 (971~988) 18 979,
3261 20:12:36.608148 TX Bit1 (979~997) 19 988, Bit9 (971~987) 17 979,
3262 20:12:36.614624 TX Bit2 (976~991) 16 983, Bit10 (973~986) 14 979,
3263 20:12:36.617804 TX Bit3 (975~991) 17 983, Bit11 (974~991) 18 982,
3264 20:12:36.621586 TX Bit4 (977~993) 17 985, Bit12 (973~989) 17 981,
3265 20:12:36.628185 TX Bit5 (979~997) 19 988, Bit13 (974~987) 14 980,
3266 20:12:36.631140 TX Bit6 (979~998) 20 988, Bit14 (973~988) 16 980,
3267 20:12:36.634774 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
3268 20:12:36.634858
3269 20:12:36.637821 Write Rank1 MR14 =0x2
3270 20:12:36.646841
3271 20:12:36.646936 CH=1, VrefRange= 0, VrefLevel = 2
3272 20:12:36.653738 TX Bit0 (980~998) 19 989, Bit8 (971~988) 18 979,
3273 20:12:36.656996 TX Bit1 (978~997) 20 987, Bit9 (970~986) 17 978,
3274 20:12:36.663813 TX Bit2 (976~992) 17 984, Bit10 (972~987) 16 979,
3275 20:12:36.667083 TX Bit3 (975~991) 17 983, Bit11 (974~991) 18 982,
3276 20:12:36.670157 TX Bit4 (977~994) 18 985, Bit12 (973~990) 18 981,
3277 20:12:36.676721 TX Bit5 (978~998) 21 988, Bit13 (975~988) 14 981,
3278 20:12:36.680509 TX Bit6 (979~998) 20 988, Bit14 (973~989) 17 981,
3279 20:12:36.683600 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3280 20:12:36.683688
3281 20:12:36.686501 Write Rank1 MR14 =0x4
3282 20:12:36.696020
3283 20:12:36.696115 CH=1, VrefRange= 0, VrefLevel = 4
3284 20:12:36.702635 TX Bit0 (979~999) 21 989, Bit8 (970~989) 20 979,
3285 20:12:36.706041 TX Bit1 (979~998) 20 988, Bit9 (970~988) 19 979,
3286 20:12:36.712473 TX Bit2 (976~992) 17 984, Bit10 (972~988) 17 980,
3287 20:12:36.716352 TX Bit3 (975~992) 18 983, Bit11 (973~991) 19 982,
3288 20:12:36.719676 TX Bit4 (977~994) 18 985, Bit12 (972~990) 19 981,
3289 20:12:36.725897 TX Bit5 (978~998) 21 988, Bit13 (975~989) 15 982,
3290 20:12:36.729162 TX Bit6 (978~999) 22 988, Bit14 (973~990) 18 981,
3291 20:12:36.732349 TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977,
3292 20:12:36.732434
3293 20:12:36.735846 Write Rank1 MR14 =0x6
3294 20:12:36.745433
3295 20:12:36.745569 CH=1, VrefRange= 0, VrefLevel = 6
3296 20:12:36.751749 TX Bit0 (979~999) 21 989, Bit8 (970~989) 20 979,
3297 20:12:36.755327 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
3298 20:12:36.762203 TX Bit2 (976~993) 18 984, Bit10 (972~990) 19 981,
3299 20:12:36.765024 TX Bit3 (975~992) 18 983, Bit11 (973~992) 20 982,
3300 20:12:36.768575 TX Bit4 (977~995) 19 986, Bit12 (972~991) 20 981,
3301 20:12:36.775017 TX Bit5 (978~998) 21 988, Bit13 (974~989) 16 981,
3302 20:12:36.778434 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
3303 20:12:36.781950 TX Bit7 (977~994) 18 985, Bit15 (968~986) 19 977,
3304 20:12:36.782040
3305 20:12:36.784812 Write Rank1 MR14 =0x8
3306 20:12:36.794597
3307 20:12:36.794696 CH=1, VrefRange= 0, VrefLevel = 8
3308 20:12:36.800887 TX Bit0 (978~999) 22 988, Bit8 (970~990) 21 980,
3309 20:12:36.804163 TX Bit1 (978~998) 21 988, Bit9 (970~989) 20 979,
3310 20:12:36.810681 TX Bit2 (976~993) 18 984, Bit10 (971~990) 20 980,
3311 20:12:36.814271 TX Bit3 (974~992) 19 983, Bit11 (972~992) 21 982,
3312 20:12:36.817698 TX Bit4 (976~996) 21 986, Bit12 (972~991) 20 981,
3313 20:12:36.824180 TX Bit5 (977~998) 22 987, Bit13 (974~990) 17 982,
3314 20:12:36.827231 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
3315 20:12:36.830601 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
3316 20:12:36.830686
3317 20:12:36.833859 Write Rank1 MR14 =0xa
3318 20:12:36.843805
3319 20:12:36.846899 CH=1, VrefRange= 0, VrefLevel = 10
3320 20:12:36.849846 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3321 20:12:36.853706 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
3322 20:12:36.860464 TX Bit2 (975~994) 20 984, Bit10 (970~991) 22 980,
3323 20:12:36.863342 TX Bit3 (974~993) 20 983, Bit11 (972~992) 21 982,
3324 20:12:36.866633 TX Bit4 (976~996) 21 986, Bit12 (971~992) 22 981,
3325 20:12:36.873342 TX Bit5 (978~999) 22 988, Bit13 (973~991) 19 982,
3326 20:12:36.876416 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
3327 20:12:36.882991 TX Bit7 (977~995) 19 986, Bit15 (967~987) 21 977,
3328 20:12:36.883104
3329 20:12:36.883204 Write Rank1 MR14 =0xc
3330 20:12:36.892824
3331 20:12:36.896071 CH=1, VrefRange= 0, VrefLevel = 12
3332 20:12:36.899477 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3333 20:12:36.903117 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
3334 20:12:36.909752 TX Bit2 (975~994) 20 984, Bit10 (970~991) 22 980,
3335 20:12:36.913350 TX Bit3 (974~994) 21 984, Bit11 (972~992) 21 982,
3336 20:12:36.916402 TX Bit4 (976~997) 22 986, Bit12 (971~992) 22 981,
3337 20:12:36.922927 TX Bit5 (978~999) 22 988, Bit13 (972~991) 20 981,
3338 20:12:36.926041 TX Bit6 (977~1000) 24 988, Bit14 (971~991) 21 981,
3339 20:12:36.929849 TX Bit7 (977~996) 20 986, Bit15 (967~987) 21 977,
3340 20:12:36.932773
3341 20:12:36.932848 Write Rank1 MR14 =0xe
3342 20:12:36.943177
3343 20:12:36.945655 CH=1, VrefRange= 0, VrefLevel = 14
3344 20:12:36.949502 TX Bit0 (978~1000) 23 989, Bit8 (970~991) 22 980,
3345 20:12:36.952373 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3346 20:12:36.959072 TX Bit2 (975~995) 21 985, Bit10 (970~991) 22 980,
3347 20:12:36.962345 TX Bit3 (973~994) 22 983, Bit11 (971~992) 22 981,
3348 20:12:36.965736 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
3349 20:12:36.972244 TX Bit5 (978~999) 22 988, Bit13 (972~992) 21 982,
3350 20:12:36.975797 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3351 20:12:36.982275 TX Bit7 (977~997) 21 987, Bit15 (967~988) 22 977,
3352 20:12:36.982397
3353 20:12:36.982492 Write Rank1 MR14 =0x10
3354 20:12:36.992152
3355 20:12:36.995756 CH=1, VrefRange= 0, VrefLevel = 16
3356 20:12:36.999163 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3357 20:12:37.002482 TX Bit1 (978~999) 22 988, Bit9 (969~991) 23 980,
3358 20:12:37.009182 TX Bit2 (974~996) 23 985, Bit10 (969~992) 24 980,
3359 20:12:37.012344 TX Bit3 (972~995) 24 983, Bit11 (971~992) 22 981,
3360 20:12:37.015984 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3361 20:12:37.022477 TX Bit5 (977~999) 23 988, Bit13 (972~992) 21 982,
3362 20:12:37.026020 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3363 20:12:37.028809 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3364 20:12:37.028910
3365 20:12:37.032143 Write Rank1 MR14 =0x12
3366 20:12:37.042123
3367 20:12:37.045219 CH=1, VrefRange= 0, VrefLevel = 18
3368 20:12:37.048891 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
3369 20:12:37.051839 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3370 20:12:37.058616 TX Bit2 (974~996) 23 985, Bit10 (969~992) 24 980,
3371 20:12:37.061707 TX Bit3 (972~995) 24 983, Bit11 (970~993) 24 981,
3372 20:12:37.064979 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3373 20:12:37.072382 TX Bit5 (977~1000) 24 988, Bit13 (971~992) 22 981,
3374 20:12:37.075214 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3375 20:12:37.081954 TX Bit7 (976~997) 22 986, Bit15 (967~989) 23 978,
3376 20:12:37.082052
3377 20:12:37.082117 Write Rank1 MR14 =0x14
3378 20:12:37.092652
3379 20:12:37.095335 CH=1, VrefRange= 0, VrefLevel = 20
3380 20:12:37.098671 TX Bit0 (978~1002) 25 990, Bit8 (969~992) 24 980,
3381 20:12:37.102047 TX Bit1 (977~1000) 24 988, Bit9 (969~991) 23 980,
3382 20:12:37.108816 TX Bit2 (973~997) 25 985, Bit10 (969~992) 24 980,
3383 20:12:37.112103 TX Bit3 (972~996) 25 984, Bit11 (970~993) 24 981,
3384 20:12:37.115265 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
3385 20:12:37.121861 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3386 20:12:37.125206 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3387 20:12:37.132162 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3388 20:12:37.132248
3389 20:12:37.132311 Write Rank1 MR14 =0x16
3390 20:12:37.142204
3391 20:12:37.145525 CH=1, VrefRange= 0, VrefLevel = 22
3392 20:12:37.148658 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3393 20:12:37.152208 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
3394 20:12:37.158821 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3395 20:12:37.162134 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3396 20:12:37.165380 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3397 20:12:37.172070 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3398 20:12:37.175388 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3399 20:12:37.182112 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3400 20:12:37.182228
3401 20:12:37.182321 Write Rank1 MR14 =0x18
3402 20:12:37.192389
3403 20:12:37.195903 CH=1, VrefRange= 0, VrefLevel = 24
3404 20:12:37.198977 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3405 20:12:37.202117 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
3406 20:12:37.209060 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3407 20:12:37.212170 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3408 20:12:37.215582 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3409 20:12:37.222316 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3410 20:12:37.225470 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3411 20:12:37.232459 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3412 20:12:37.232552
3413 20:12:37.232619 Write Rank1 MR14 =0x1a
3414 20:12:37.242605
3415 20:12:37.245649 CH=1, VrefRange= 0, VrefLevel = 26
3416 20:12:37.249403 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3417 20:12:37.252480 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
3418 20:12:37.259279 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3419 20:12:37.262599 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3420 20:12:37.265902 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3421 20:12:37.272535 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3422 20:12:37.276088 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3423 20:12:37.282198 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3424 20:12:37.282309
3425 20:12:37.282402 Write Rank1 MR14 =0x1c
3426 20:12:37.293028
3427 20:12:37.293154 CH=1, VrefRange= 0, VrefLevel = 28
3428 20:12:37.299318 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3429 20:12:37.302393 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
3430 20:12:37.309277 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3431 20:12:37.312421 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3432 20:12:37.315691 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3433 20:12:37.322652 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3434 20:12:37.326044 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3435 20:12:37.332819 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3436 20:12:37.332916
3437 20:12:37.333047 Write Rank1 MR14 =0x1e
3438 20:12:37.342708
3439 20:12:37.345913 CH=1, VrefRange= 0, VrefLevel = 30
3440 20:12:37.349450 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3441 20:12:37.352574 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
3442 20:12:37.359345 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3443 20:12:37.362683 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3444 20:12:37.366285 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3445 20:12:37.372538 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3446 20:12:37.376421 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3447 20:12:37.383148 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3448 20:12:37.383239
3449 20:12:37.383303 Write Rank1 MR14 =0x20
3450 20:12:37.392748
3451 20:12:37.396112 CH=1, VrefRange= 0, VrefLevel = 32
3452 20:12:37.399766 TX Bit0 (977~1002) 26 989, Bit8 (969~992) 24 980,
3453 20:12:37.403266 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
3454 20:12:37.409501 TX Bit2 (973~997) 25 985, Bit10 (969~991) 23 980,
3455 20:12:37.412813 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3456 20:12:37.416517 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
3457 20:12:37.423132 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3458 20:12:37.426266 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3459 20:12:37.432857 TX Bit7 (976~998) 23 987, Bit15 (967~990) 24 978,
3460 20:12:37.432941
3461 20:12:37.433006
3462 20:12:37.436009 TX Vref found, early break! 369< 371
3463 20:12:37.439560 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3464 20:12:37.442766 u1DelayCellOfst[0]=7 cells (6 PI)
3465 20:12:37.446631 u1DelayCellOfst[1]=6 cells (5 PI)
3466 20:12:37.449496 u1DelayCellOfst[2]=2 cells (2 PI)
3467 20:12:37.453495 u1DelayCellOfst[3]=0 cells (0 PI)
3468 20:12:37.456111 u1DelayCellOfst[4]=5 cells (4 PI)
3469 20:12:37.456193 u1DelayCellOfst[5]=6 cells (5 PI)
3470 20:12:37.459226 u1DelayCellOfst[6]=7 cells (6 PI)
3471 20:12:37.462836 u1DelayCellOfst[7]=5 cells (4 PI)
3472 20:12:37.466116 Byte0, DQ PI dly=983, DQM PI dly= 986
3473 20:12:37.473091 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3474 20:12:37.473175
3475 20:12:37.476191 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3476 20:12:37.476273
3477 20:12:37.479300 u1DelayCellOfst[8]=2 cells (2 PI)
3478 20:12:37.482736 u1DelayCellOfst[9]=2 cells (2 PI)
3479 20:12:37.485987 u1DelayCellOfst[10]=2 cells (2 PI)
3480 20:12:37.489793 u1DelayCellOfst[11]=3 cells (3 PI)
3481 20:12:37.492739 u1DelayCellOfst[12]=3 cells (3 PI)
3482 20:12:37.492846 u1DelayCellOfst[13]=3 cells (3 PI)
3483 20:12:37.496509 u1DelayCellOfst[14]=2 cells (2 PI)
3484 20:12:37.499390 u1DelayCellOfst[15]=0 cells (0 PI)
3485 20:12:37.502588 Byte1, DQ PI dly=978, DQM PI dly= 979
3486 20:12:37.509389 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3487 20:12:37.509473
3488 20:12:37.513054 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3489 20:12:37.513136
3490 20:12:37.516320 Write Rank1 MR14 =0x16
3491 20:12:37.516400
3492 20:12:37.516463 Final TX Range 0 Vref 22
3493 20:12:37.516524
3494 20:12:37.523084 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3495 20:12:37.523168
3496 20:12:37.529387 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3497 20:12:37.536398 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3498 20:12:37.546128 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3499 20:12:37.546236 Write Rank1 MR3 =0xb0
3500 20:12:37.549380 DramC Write-DBI on
3501 20:12:37.549462 ==
3502 20:12:37.553162 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3503 20:12:37.556226 fsp= 1, odt_onoff= 1, Byte mode= 0
3504 20:12:37.556310 ==
3505 20:12:37.562682 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3506 20:12:37.562768
3507 20:12:37.562832 Begin, DQ Scan Range 699~763
3508 20:12:37.562891
3509 20:12:37.562948
3510 20:12:37.566900 TX Vref Scan disable
3511 20:12:37.569446 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3512 20:12:37.572548 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3513 20:12:37.576200 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3514 20:12:37.579445 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3515 20:12:37.583159 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3516 20:12:37.585892 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3517 20:12:37.592700 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3518 20:12:37.595847 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3519 20:12:37.599093 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3520 20:12:37.602595 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3521 20:12:37.606131 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3522 20:12:37.609235 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3523 20:12:37.612368 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3524 20:12:37.615893 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3525 20:12:37.619198 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3526 20:12:37.622560 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3527 20:12:37.625981 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3528 20:12:37.629145 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3529 20:12:37.632625 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3530 20:12:37.635922 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3531 20:12:37.644246 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3532 20:12:37.647605 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3533 20:12:37.651081 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3534 20:12:37.654061 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3535 20:12:37.657245 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3536 20:12:37.661222 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3537 20:12:37.664036 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3538 20:12:37.667532 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3539 20:12:37.671320 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3540 20:12:37.674386 Byte0, DQ PI dly=731, DQM PI dly= 731
3541 20:12:37.677526 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3542 20:12:37.677609
3543 20:12:37.684080 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3544 20:12:37.684164
3545 20:12:37.687628 Byte1, DQ PI dly=723, DQM PI dly= 723
3546 20:12:37.690778 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3547 20:12:37.690860
3548 20:12:37.694266 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3549 20:12:37.694352
3550 20:12:37.700829 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3551 20:12:37.707939 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3552 20:12:37.717958 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3553 20:12:37.718044 Write Rank1 MR3 =0x30
3554 20:12:37.720737 DramC Write-DBI off
3555 20:12:37.720877
3556 20:12:37.721016 [DATLAT]
3557 20:12:37.724544 Freq=1600, CH1 RK1, use_rxtx_scan=0
3558 20:12:37.724626
3559 20:12:37.727742 DATLAT Default: 0x10
3560 20:12:37.727823 7, 0xFFFF, sum=0
3561 20:12:37.730797 8, 0xFFFF, sum=0
3562 20:12:37.730879 9, 0xFFFF, sum=0
3563 20:12:37.730944 10, 0xFFFF, sum=0
3564 20:12:37.734311 11, 0xFFFF, sum=0
3565 20:12:37.734393 12, 0xFFFF, sum=0
3566 20:12:37.737470 13, 0xFFFF, sum=0
3567 20:12:37.737552 14, 0x0, sum=1
3568 20:12:37.741126 15, 0x0, sum=2
3569 20:12:37.741208 16, 0x0, sum=3
3570 20:12:37.744251 17, 0x0, sum=4
3571 20:12:37.747441 pattern=2 first_step=14 total pass=5 best_step=16
3572 20:12:37.747522 ==
3573 20:12:37.754377 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3574 20:12:37.754461 fsp= 1, odt_onoff= 1, Byte mode= 0
3575 20:12:37.757485 ==
3576 20:12:37.760975 Start DQ dly to find pass range UseTestEngine =1
3577 20:12:37.764106 x-axis: bit #, y-axis: DQ dly (-127~63)
3578 20:12:37.764187 RX Vref Scan = 0
3579 20:12:37.767590 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3580 20:12:37.770796 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3581 20:12:37.774149 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3582 20:12:37.777405 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3583 20:12:37.780672 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3584 20:12:37.784096 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3585 20:12:37.787353 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3586 20:12:37.787435 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3587 20:12:37.791183 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3588 20:12:37.794332 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3589 20:12:37.797488 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3590 20:12:37.800771 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3591 20:12:37.804229 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3592 20:12:37.807523 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3593 20:12:37.811053 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3594 20:12:37.811203 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3595 20:12:37.814324 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3596 20:12:37.817892 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3597 20:12:37.821042 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3598 20:12:37.824168 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3599 20:12:37.827794 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3600 20:12:37.830942 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3601 20:12:37.831028 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3602 20:12:37.834332 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3603 20:12:37.837695 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3604 20:12:37.840752 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3605 20:12:37.844138 0, [0] xxooxxxx xxxxxxxo [MSB]
3606 20:12:37.847569 1, [0] xxooxxxx xxxxxxxo [MSB]
3607 20:12:37.847652 2, [0] xxoooxxo oooxxxxo [MSB]
3608 20:12:37.851190 3, [0] xxoooxxo ooooxooo [MSB]
3609 20:12:37.854315 4, [0] xxoooxxo oooooooo [MSB]
3610 20:12:37.857252 5, [0] xoooooxo oooooooo [MSB]
3611 20:12:37.860528 6, [0] xoooooxo oooooooo [MSB]
3612 20:12:37.863933 34, [0] oooxoooo oooooooo [MSB]
3613 20:12:37.867674 35, [0] oooxoooo ooooooox [MSB]
3614 20:12:37.870693 36, [0] ooxxoooo ooooooox [MSB]
3615 20:12:37.874391 37, [0] ooxxxoox ooxooxxx [MSB]
3616 20:12:37.877180 38, [0] ooxxxoox xxxooxxx [MSB]
3617 20:12:37.880637 39, [0] ooxxxoox xxxxoxxx [MSB]
3618 20:12:37.880749 40, [0] ooxxxoox xxxxxxxx [MSB]
3619 20:12:37.883961 41, [0] oxxxxoox xxxxxxxx [MSB]
3620 20:12:37.887597 42, [0] oxxxxxox xxxxxxxx [MSB]
3621 20:12:37.890717 43, [0] xxxxxxxx xxxxxxxx [MSB]
3622 20:12:37.894017 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3623 20:12:37.897168 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3624 20:12:37.900474 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3625 20:12:37.904226 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3626 20:12:37.907440 iDelay=43, Bit 4, Center 19 (2 ~ 36) 35
3627 20:12:37.910768 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3628 20:12:37.913756 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3629 20:12:37.920815 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
3630 20:12:37.923834 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3631 20:12:37.927109 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3632 20:12:37.930399 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3633 20:12:37.933818 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3634 20:12:37.937122 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3635 20:12:37.940438 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3636 20:12:37.943921 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3637 20:12:37.947072 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3638 20:12:37.947178 ==
3639 20:12:37.954338 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3640 20:12:37.957208 fsp= 1, odt_onoff= 1, Byte mode= 0
3641 20:12:37.957297 ==
3642 20:12:37.957362 DQS Delay:
3643 20:12:37.960594 DQS0 = 0, DQS1 = 0
3644 20:12:37.960674 DQM Delay:
3645 20:12:37.960737 DQM0 = 20, DQM1 = 19
3646 20:12:37.963950 DQ Delay:
3647 20:12:37.967500 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3648 20:12:37.970859 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3649 20:12:37.973674 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3650 20:12:37.977065 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3651 20:12:37.977145
3652 20:12:37.977208
3653 20:12:37.977292
3654 20:12:37.980484 [DramC_TX_OE_Calibration] TA2
3655 20:12:37.983722 Original DQ_B0 (3 6) =30, OEN = 27
3656 20:12:37.983805 Original DQ_B1 (3 6) =30, OEN = 27
3657 20:12:37.987682 23, 0x0, End_B0=23 End_B1=23
3658 20:12:37.990370 24, 0x0, End_B0=24 End_B1=24
3659 20:12:37.993606 25, 0x0, End_B0=25 End_B1=25
3660 20:12:37.997182 26, 0x0, End_B0=26 End_B1=26
3661 20:12:37.997317 27, 0x0, End_B0=27 End_B1=27
3662 20:12:38.000730 28, 0x0, End_B0=28 End_B1=28
3663 20:12:38.003670 29, 0x0, End_B0=29 End_B1=29
3664 20:12:38.007319 30, 0x0, End_B0=30 End_B1=30
3665 20:12:38.010694 31, 0xFFFF, End_B0=30 End_B1=30
3666 20:12:38.013857 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3667 20:12:38.020528 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3668 20:12:38.020611
3669 20:12:38.020674
3670 20:12:38.023759 Write Rank1 MR23 =0x3f
3671 20:12:38.023840 [DQSOSC]
3672 20:12:38.030503 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3673 20:12:38.037389 CH1_RK1: MR19=0x3, MR18=0xB1, DQSOSC=333, MR23=63, INC=22, DEC=33
3674 20:12:38.041041 Write Rank1 MR23 =0x3f
3675 20:12:38.041121 [DQSOSC]
3676 20:12:38.046997 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3677 20:12:38.051022 CH1 RK1: MR19=3, MR18=B3
3678 20:12:38.053880 [RxdqsGatingPostProcess] freq 1600
3679 20:12:38.057106 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3680 20:12:38.060243 Rank: 0
3681 20:12:38.060324 best DQS0 dly(2T, 0.5T) = (2, 5)
3682 20:12:38.063688 best DQS1 dly(2T, 0.5T) = (2, 5)
3683 20:12:38.067084 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3684 20:12:38.070354 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3685 20:12:38.070437 Rank: 1
3686 20:12:38.073800 best DQS0 dly(2T, 0.5T) = (2, 5)
3687 20:12:38.077183 best DQS1 dly(2T, 0.5T) = (2, 5)
3688 20:12:38.080390 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3689 20:12:38.083610 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3690 20:12:38.090581 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3691 20:12:38.093609 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3692 20:12:38.097521 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3693 20:12:38.097603
3694 20:12:38.097666
3695 20:12:38.100711 [Calibration Summary] Freqency 1600
3696 20:12:38.100792 CH 0, Rank 0
3697 20:12:38.103868 All Pass.
3698 20:12:38.103949
3699 20:12:38.104013 CH 0, Rank 1
3700 20:12:38.104072 All Pass.
3701 20:12:38.104129
3702 20:12:38.107292 CH 1, Rank 0
3703 20:12:38.107372 All Pass.
3704 20:12:38.107436
3705 20:12:38.110360 CH 1, Rank 1
3706 20:12:38.110441 All Pass.
3707 20:12:38.110504
3708 20:12:38.117048 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3709 20:12:38.123652 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3710 20:12:38.130570 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3711 20:12:38.133664 Write Rank0 MR3 =0xb0
3712 20:12:38.137111 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3713 20:12:38.147165 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3714 20:12:38.153857 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3715 20:12:38.153952 Write Rank1 MR3 =0xb0
3716 20:12:38.160721 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3717 20:12:38.167430 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3718 20:12:38.174205 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3719 20:12:38.177060 Write Rank0 MR3 =0xb0
3720 20:12:38.183621 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3721 20:12:38.190217 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3722 20:12:38.197453 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3723 20:12:38.200324 Write Rank1 MR3 =0xb0
3724 20:12:38.200406 DramC Write-DBI on
3725 20:12:38.203778 [GetDramInforAfterCalByMRR] Vendor 1.
3726 20:12:38.207157 [GetDramInforAfterCalByMRR] Revision 7.
3727 20:12:38.210568 MR8 12
3728 20:12:38.213797 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3729 20:12:38.213879 MR8 12
3730 20:12:38.220623 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3731 20:12:38.220705 MR8 12
3732 20:12:38.223626 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3733 20:12:38.226943 MR8 12
3734 20:12:38.230312 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3735 20:12:38.240164 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3736 20:12:38.240276 Write Rank0 MR13 =0xd0
3737 20:12:38.243864 Write Rank1 MR13 =0xd0
3738 20:12:38.246777 Write Rank0 MR13 =0xd0
3739 20:12:38.246875 Write Rank1 MR13 =0xd0
3740 20:12:38.250348 Save calibration result to emmc
3741 20:12:38.250454
3742 20:12:38.250545
3743 20:12:38.253636 [DramcModeReg_Check] Freq_1600, FSP_1
3744 20:12:38.257055 FSP_1, CH_0, RK0
3745 20:12:38.257187 Write Rank0 MR13 =0xd8
3746 20:12:38.260359 MR12 = 0x56 (global = 0x56) match
3747 20:12:38.263785 MR14 = 0x18 (global = 0x18) match
3748 20:12:38.267007 FSP_1, CH_0, RK1
3749 20:12:38.267117 Write Rank1 MR13 =0xd8
3750 20:12:38.270496 MR12 = 0x56 (global = 0x56) match
3751 20:12:38.273837 MR14 = 0x16 (global = 0x16) match
3752 20:12:38.277051 FSP_1, CH_1, RK0
3753 20:12:38.277160 Write Rank0 MR13 =0xd8
3754 20:12:38.280679 MR12 = 0x5a (global = 0x5a) match
3755 20:12:38.284031 MR14 = 0x1a (global = 0x1a) match
3756 20:12:38.287003 FSP_1, CH_1, RK1
3757 20:12:38.287119 Write Rank1 MR13 =0xd8
3758 20:12:38.290386 MR12 = 0x58 (global = 0x58) match
3759 20:12:38.293555 MR14 = 0x16 (global = 0x16) match
3760 20:12:38.293663
3761 20:12:38.297052 [MEM_TEST] 02: After DFS, before run time config
3762 20:12:38.309460 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3763 20:12:38.309581
3764 20:12:38.309675 [TA2_TEST]
3765 20:12:38.309775 === TA2 HW
3766 20:12:38.313266 TA2 PAT: XTALK
3767 20:12:38.316060 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3768 20:12:38.322854 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3769 20:12:38.325962 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3770 20:12:38.332571 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3771 20:12:38.332681
3772 20:12:38.332774
3773 20:12:38.332893 Settings after calibration
3774 20:12:38.332980
3775 20:12:38.335763 [DramcRunTimeConfig]
3776 20:12:38.339480 TransferPLLToSPMControl - MODE SW PHYPLL
3777 20:12:38.342283 TX_TRACKING: ON
3778 20:12:38.342390 RX_TRACKING: ON
3779 20:12:38.342484 HW_GATING: ON
3780 20:12:38.345794 HW_GATING DBG: OFF
3781 20:12:38.345902 ddr_geometry:1
3782 20:12:38.348919 ddr_geometry:1
3783 20:12:38.349020 ddr_geometry:1
3784 20:12:38.352425 ddr_geometry:1
3785 20:12:38.352506 ddr_geometry:1
3786 20:12:38.352569 ddr_geometry:1
3787 20:12:38.355544 ddr_geometry:1
3788 20:12:38.355649 ddr_geometry:1
3789 20:12:38.359034 High Freq DUMMY_READ_FOR_TRACKING: ON
3790 20:12:38.362177 ZQCS_ENABLE_LP4: OFF
3791 20:12:38.365955 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3792 20:12:38.369201 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3793 20:12:38.369354 SPM_CONTROL_AFTERK: ON
3794 20:12:38.372606 IMPEDANCE_TRACKING: ON
3795 20:12:38.372705 TEMP_SENSOR: ON
3796 20:12:38.375589 PER_BANK_REFRESH: ON
3797 20:12:38.375699 HW_SAVE_FOR_SR: ON
3798 20:12:38.382412 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3799 20:12:38.382500 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3800 20:12:38.385962 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3801 20:12:38.388739 Read ODT Tracking: ON
3802 20:12:38.392290 =========================
3803 20:12:38.392380
3804 20:12:38.392445 [TA2_TEST]
3805 20:12:38.392505 === TA2 HW
3806 20:12:38.399296 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3807 20:12:38.402247 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3808 20:12:38.408732 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3809 20:12:38.412001 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3810 20:12:38.412102
3811 20:12:38.415305 [MEM_TEST] 03: After run time config
3812 20:12:38.427212 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3813 20:12:38.430580 [complex_mem_test] start addr:0x40024000, len:131072
3814 20:12:38.634848 1st complex R/W mem test pass
3815 20:12:38.641487 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3816 20:12:38.644908 sync preloader write leveling
3817 20:12:38.648234 sync preloader cbt_mr12
3818 20:12:38.651969 sync preloader cbt_clk_dly
3819 20:12:38.652051 sync preloader cbt_cmd_dly
3820 20:12:38.655171 sync preloader cbt_cs
3821 20:12:38.658225 sync preloader cbt_ca_perbit_delay
3822 20:12:38.658307 sync preloader clk_delay
3823 20:12:38.661559 sync preloader dqs_delay
3824 20:12:38.664670 sync preloader u1Gating2T_Save
3825 20:12:38.668116 sync preloader u1Gating05T_Save
3826 20:12:38.671241 sync preloader u1Gatingfine_tune_Save
3827 20:12:38.674872 sync preloader u1Gatingucpass_count_Save
3828 20:12:38.678381 sync preloader u1TxWindowPerbitVref_Save
3829 20:12:38.681544 sync preloader u1TxCenter_min_Save
3830 20:12:38.684800 sync preloader u1TxCenter_max_Save
3831 20:12:38.688030 sync preloader u1Txwin_center_Save
3832 20:12:38.691424 sync preloader u1Txfirst_pass_Save
3833 20:12:38.694663 sync preloader u1Txlast_pass_Save
3834 20:12:38.694746 sync preloader u1RxDatlat_Save
3835 20:12:38.701698 sync preloader u1RxWinPerbitVref_Save
3836 20:12:38.704727 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3837 20:12:38.708073 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3838 20:12:38.711146 sync preloader delay_cell_unit
3839 20:12:38.717680 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3840 20:12:38.721169 sync preloader write leveling
3841 20:12:38.721311 sync preloader cbt_mr12
3842 20:12:38.724374 sync preloader cbt_clk_dly
3843 20:12:38.728059 sync preloader cbt_cmd_dly
3844 20:12:38.728162 sync preloader cbt_cs
3845 20:12:38.731188 sync preloader cbt_ca_perbit_delay
3846 20:12:38.734497 sync preloader clk_delay
3847 20:12:38.737628 sync preloader dqs_delay
3848 20:12:38.741245 sync preloader u1Gating2T_Save
3849 20:12:38.741345 sync preloader u1Gating05T_Save
3850 20:12:38.744953 sync preloader u1Gatingfine_tune_Save
3851 20:12:38.748050 sync preloader u1Gatingucpass_count_Save
3852 20:12:38.754815 sync preloader u1TxWindowPerbitVref_Save
3853 20:12:38.754895 sync preloader u1TxCenter_min_Save
3854 20:12:38.757607 sync preloader u1TxCenter_max_Save
3855 20:12:38.761235 sync preloader u1Txwin_center_Save
3856 20:12:38.764197 sync preloader u1Txfirst_pass_Save
3857 20:12:38.767873 sync preloader u1Txlast_pass_Save
3858 20:12:38.770942 sync preloader u1RxDatlat_Save
3859 20:12:38.774299 sync preloader u1RxWinPerbitVref_Save
3860 20:12:38.777595 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3861 20:12:38.784160 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3862 20:12:38.784244 sync preloader delay_cell_unit
3863 20:12:38.791062 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3864 20:12:38.794464 sync preloader write leveling
3865 20:12:38.797945 sync preloader cbt_mr12
3866 20:12:38.798027 sync preloader cbt_clk_dly
3867 20:12:38.801398 sync preloader cbt_cmd_dly
3868 20:12:38.804441 sync preloader cbt_cs
3869 20:12:38.807886 sync preloader cbt_ca_perbit_delay
3870 20:12:38.807968 sync preloader clk_delay
3871 20:12:38.811263 sync preloader dqs_delay
3872 20:12:38.814454 sync preloader u1Gating2T_Save
3873 20:12:38.817744 sync preloader u1Gating05T_Save
3874 20:12:38.821140 sync preloader u1Gatingfine_tune_Save
3875 20:12:38.824492 sync preloader u1Gatingucpass_count_Save
3876 20:12:38.828392 sync preloader u1TxWindowPerbitVref_Save
3877 20:12:38.831273 sync preloader u1TxCenter_min_Save
3878 20:12:38.834771 sync preloader u1TxCenter_max_Save
3879 20:12:38.841908 sync preloader u1Txwin_center_Save
3880 20:12:38.842000 sync preloader u1Txfirst_pass_Save
3881 20:12:38.844694 sync preloader u1Txlast_pass_Save
3882 20:12:38.844787 sync preloader u1RxDatlat_Save
3883 20:12:38.848238 sync preloader u1RxWinPerbitVref_Save
3884 20:12:38.854611 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3885 20:12:38.857635 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3886 20:12:38.860918 sync preloader delay_cell_unit
3887 20:12:38.864431 just_for_test_dump_coreboot_params dump all params
3888 20:12:38.868170 dump source = 0x0
3889 20:12:38.868260 dump params frequency:1600
3890 20:12:38.871158 dump params rank number:2
3891 20:12:38.871248
3892 20:12:38.874571 dump params write leveling
3893 20:12:38.878142 write leveling[0][0][0] = 0x21
3894 20:12:38.878231 write leveling[0][0][1] = 0x1a
3895 20:12:38.881521 write leveling[0][1][0] = 0x23
3896 20:12:38.884299 write leveling[0][1][1] = 0x1d
3897 20:12:38.887657 write leveling[1][0][0] = 0x22
3898 20:12:38.891528 write leveling[1][0][1] = 0x20
3899 20:12:38.894516 write leveling[1][1][0] = 0x24
3900 20:12:38.894602 write leveling[1][1][1] = 0x20
3901 20:12:38.898177 dump params cbt_cs
3902 20:12:38.898255 cbt_cs[0][0] = 0xa
3903 20:12:38.900950 cbt_cs[0][1] = 0xa
3904 20:12:38.901050 cbt_cs[1][0] = 0xa
3905 20:12:38.904767 cbt_cs[1][1] = 0xa
3906 20:12:38.907780 dump params cbt_mr12
3907 20:12:38.907882 cbt_mr12[0][0] = 0x16
3908 20:12:38.910984 cbt_mr12[0][1] = 0x16
3909 20:12:38.911085 cbt_mr12[1][0] = 0x1a
3910 20:12:38.914790 cbt_mr12[1][1] = 0x18
3911 20:12:38.914866 dump params tx window
3912 20:12:38.917912 tx_center_min[0][0][0] = 980
3913 20:12:38.921272 tx_center_max[0][0][0] = 987
3914 20:12:38.924684 tx_center_min[0][0][1] = 973
3915 20:12:38.927929 tx_center_max[0][0][1] = 978
3916 20:12:38.928001 tx_center_min[0][1][0] = 983
3917 20:12:38.931095 tx_center_max[0][1][0] = 990
3918 20:12:38.934736 tx_center_min[0][1][1] = 978
3919 20:12:38.938420 tx_center_max[0][1][1] = 981
3920 20:12:38.941117 tx_center_min[1][0][0] = 981
3921 20:12:38.941244 tx_center_max[1][0][0] = 988
3922 20:12:38.944678 tx_center_min[1][0][1] = 978
3923 20:12:38.947757 tx_center_max[1][0][1] = 981
3924 20:12:38.951166 tx_center_min[1][1][0] = 983
3925 20:12:38.954345 tx_center_max[1][1][0] = 989
3926 20:12:38.954450 tx_center_min[1][1][1] = 978
3927 20:12:38.957802 tx_center_max[1][1][1] = 981
3928 20:12:38.961303 dump params tx window
3929 20:12:38.964382 tx_win_center[0][0][0] = 987
3930 20:12:38.964463 tx_first_pass[0][0][0] = 975
3931 20:12:38.967604 tx_last_pass[0][0][0] = 999
3932 20:12:38.971041 tx_win_center[0][0][1] = 986
3933 20:12:38.974416 tx_first_pass[0][0][1] = 974
3934 20:12:38.974528 tx_last_pass[0][0][1] = 998
3935 20:12:38.977736 tx_win_center[0][0][2] = 985
3936 20:12:38.980932 tx_first_pass[0][0][2] = 974
3937 20:12:38.984918 tx_last_pass[0][0][2] = 997
3938 20:12:38.985029 tx_win_center[0][0][3] = 980
3939 20:12:38.987956 tx_first_pass[0][0][3] = 968
3940 20:12:38.990974 tx_last_pass[0][0][3] = 992
3941 20:12:38.994417 tx_win_center[0][0][4] = 985
3942 20:12:38.997707 tx_first_pass[0][0][4] = 973
3943 20:12:38.997812 tx_last_pass[0][0][4] = 998
3944 20:12:39.001098 tx_win_center[0][0][5] = 980
3945 20:12:39.004311 tx_first_pass[0][0][5] = 969
3946 20:12:39.007944 tx_last_pass[0][0][5] = 992
3947 20:12:39.011115 tx_win_center[0][0][6] = 981
3948 20:12:39.011216 tx_first_pass[0][0][6] = 969
3949 20:12:39.014761 tx_last_pass[0][0][6] = 993
3950 20:12:39.017986 tx_win_center[0][0][7] = 983
3951 20:12:39.020944 tx_first_pass[0][0][7] = 971
3952 20:12:39.021032 tx_last_pass[0][0][7] = 995
3953 20:12:39.024227 tx_win_center[0][0][8] = 973
3954 20:12:39.027633 tx_first_pass[0][0][8] = 961
3955 20:12:39.031379 tx_last_pass[0][0][8] = 986
3956 20:12:39.034099 tx_win_center[0][0][9] = 976
3957 20:12:39.034230 tx_first_pass[0][0][9] = 963
3958 20:12:39.037658 tx_last_pass[0][0][9] = 989
3959 20:12:39.040735 tx_win_center[0][0][10] = 978
3960 20:12:39.044072 tx_first_pass[0][0][10] = 967
3961 20:12:39.044191 tx_last_pass[0][0][10] = 990
3962 20:12:39.047802 tx_win_center[0][0][11] = 973
3963 20:12:39.050687 tx_first_pass[0][0][11] = 961
3964 20:12:39.054499 tx_last_pass[0][0][11] = 986
3965 20:12:39.057775 tx_win_center[0][0][12] = 974
3966 20:12:39.057886 tx_first_pass[0][0][12] = 962
3967 20:12:39.061055 tx_last_pass[0][0][12] = 987
3968 20:12:39.064442 tx_win_center[0][0][13] = 973
3969 20:12:39.067862 tx_first_pass[0][0][13] = 962
3970 20:12:39.071145 tx_last_pass[0][0][13] = 985
3971 20:12:39.071231 tx_win_center[0][0][14] = 974
3972 20:12:39.074250 tx_first_pass[0][0][14] = 962
3973 20:12:39.077823 tx_last_pass[0][0][14] = 987
3974 20:12:39.080814 tx_win_center[0][0][15] = 978
3975 20:12:39.084178 tx_first_pass[0][0][15] = 966
3976 20:12:39.084296 tx_last_pass[0][0][15] = 990
3977 20:12:39.087655 tx_win_center[0][1][0] = 990
3978 20:12:39.090954 tx_first_pass[0][1][0] = 978
3979 20:12:39.094171 tx_last_pass[0][1][0] = 1003
3980 20:12:39.097178 tx_win_center[0][1][1] = 989
3981 20:12:39.097300 tx_first_pass[0][1][1] = 977
3982 20:12:39.100780 tx_last_pass[0][1][1] = 1001
3983 20:12:39.104314 tx_win_center[0][1][2] = 988
3984 20:12:39.107461 tx_first_pass[0][1][2] = 977
3985 20:12:39.110655 tx_last_pass[0][1][2] = 1000
3986 20:12:39.110813 tx_win_center[0][1][3] = 983
3987 20:12:39.114088 tx_first_pass[0][1][3] = 970
3988 20:12:39.117450 tx_last_pass[0][1][3] = 996
3989 20:12:39.120836 tx_win_center[0][1][4] = 988
3990 20:12:39.120964 tx_first_pass[0][1][4] = 976
3991 20:12:39.124132 tx_last_pass[0][1][4] = 1001
3992 20:12:39.127780 tx_win_center[0][1][5] = 984
3993 20:12:39.130864 tx_first_pass[0][1][5] = 972
3994 20:12:39.134433 tx_last_pass[0][1][5] = 996
3995 20:12:39.134528 tx_win_center[0][1][6] = 985
3996 20:12:39.137515 tx_first_pass[0][1][6] = 972
3997 20:12:39.141001 tx_last_pass[0][1][6] = 998
3998 20:12:39.144169 tx_win_center[0][1][7] = 987
3999 20:12:39.144280 tx_first_pass[0][1][7] = 975
4000 20:12:39.147427 tx_last_pass[0][1][7] = 999
4001 20:12:39.151205 tx_win_center[0][1][8] = 978
4002 20:12:39.154242 tx_first_pass[0][1][8] = 967
4003 20:12:39.157376 tx_last_pass[0][1][8] = 990
4004 20:12:39.157461 tx_win_center[0][1][9] = 979
4005 20:12:39.160826 tx_first_pass[0][1][9] = 968
4006 20:12:39.164130 tx_last_pass[0][1][9] = 990
4007 20:12:39.167463 tx_win_center[0][1][10] = 981
4008 20:12:39.167562 tx_first_pass[0][1][10] = 970
4009 20:12:39.170690 tx_last_pass[0][1][10] = 993
4010 20:12:39.174292 tx_win_center[0][1][11] = 978
4011 20:12:39.177758 tx_first_pass[0][1][11] = 966
4012 20:12:39.181129 tx_last_pass[0][1][11] = 990
4013 20:12:39.181247 tx_win_center[0][1][12] = 978
4014 20:12:39.184036 tx_first_pass[0][1][12] = 967
4015 20:12:39.187911 tx_last_pass[0][1][12] = 990
4016 20:12:39.190966 tx_win_center[0][1][13] = 978
4017 20:12:39.194389 tx_first_pass[0][1][13] = 967
4018 20:12:39.194480 tx_last_pass[0][1][13] = 989
4019 20:12:39.198586 tx_win_center[0][1][14] = 978
4020 20:12:39.201175 tx_first_pass[0][1][14] = 967
4021 20:12:39.204468 tx_last_pass[0][1][14] = 990
4022 20:12:39.208010 tx_win_center[0][1][15] = 980
4023 20:12:39.208123 tx_first_pass[0][1][15] = 969
4024 20:12:39.211323 tx_last_pass[0][1][15] = 991
4025 20:12:39.214395 tx_win_center[1][0][0] = 988
4026 20:12:39.218021 tx_first_pass[1][0][0] = 976
4027 20:12:39.220832 tx_last_pass[1][0][0] = 1000
4028 20:12:39.220919 tx_win_center[1][0][1] = 986
4029 20:12:39.224184 tx_first_pass[1][0][1] = 974
4030 20:12:39.227693 tx_last_pass[1][0][1] = 999
4031 20:12:39.230995 tx_win_center[1][0][2] = 983
4032 20:12:39.234817 tx_first_pass[1][0][2] = 971
4033 20:12:39.234914 tx_last_pass[1][0][2] = 995
4034 20:12:39.237495 tx_win_center[1][0][3] = 981
4035 20:12:39.240626 tx_first_pass[1][0][3] = 969
4036 20:12:39.244157 tx_last_pass[1][0][3] = 993
4037 20:12:39.244286 tx_win_center[1][0][4] = 984
4038 20:12:39.247705 tx_first_pass[1][0][4] = 972
4039 20:12:39.250591 tx_last_pass[1][0][4] = 997
4040 20:12:39.253926 tx_win_center[1][0][5] = 987
4041 20:12:39.257177 tx_first_pass[1][0][5] = 975
4042 20:12:39.257317 tx_last_pass[1][0][5] = 999
4043 20:12:39.261375 tx_win_center[1][0][6] = 988
4044 20:12:39.263994 tx_first_pass[1][0][6] = 976
4045 20:12:39.267199 tx_last_pass[1][0][6] = 1000
4046 20:12:39.267280 tx_win_center[1][0][7] = 984
4047 20:12:39.270978 tx_first_pass[1][0][7] = 972
4048 20:12:39.273771 tx_last_pass[1][0][7] = 997
4049 20:12:39.277438 tx_win_center[1][0][8] = 980
4050 20:12:39.280787 tx_first_pass[1][0][8] = 968
4051 20:12:39.280883 tx_last_pass[1][0][8] = 992
4052 20:12:39.284079 tx_win_center[1][0][9] = 980
4053 20:12:39.287128 tx_first_pass[1][0][9] = 968
4054 20:12:39.290952 tx_last_pass[1][0][9] = 992
4055 20:12:39.291059 tx_win_center[1][0][10] = 980
4056 20:12:39.294176 tx_first_pass[1][0][10] = 969
4057 20:12:39.297165 tx_last_pass[1][0][10] = 992
4058 20:12:39.300371 tx_win_center[1][0][11] = 981
4059 20:12:39.303792 tx_first_pass[1][0][11] = 969
4060 20:12:39.303884 tx_last_pass[1][0][11] = 993
4061 20:12:39.307145 tx_win_center[1][0][12] = 981
4062 20:12:39.310686 tx_first_pass[1][0][12] = 969
4063 20:12:39.313919 tx_last_pass[1][0][12] = 993
4064 20:12:39.317696 tx_win_center[1][0][13] = 980
4065 20:12:39.317793 tx_first_pass[1][0][13] = 969
4066 20:12:39.320925 tx_last_pass[1][0][13] = 992
4067 20:12:39.323933 tx_win_center[1][0][14] = 980
4068 20:12:39.327581 tx_first_pass[1][0][14] = 969
4069 20:12:39.330834 tx_last_pass[1][0][14] = 992
4070 20:12:39.330925 tx_win_center[1][0][15] = 978
4071 20:12:39.333942 tx_first_pass[1][0][15] = 967
4072 20:12:39.337091 tx_last_pass[1][0][15] = 990
4073 20:12:39.340459 tx_win_center[1][1][0] = 989
4074 20:12:39.343814 tx_first_pass[1][1][0] = 977
4075 20:12:39.343885 tx_last_pass[1][1][0] = 1002
4076 20:12:39.347454 tx_win_center[1][1][1] = 988
4077 20:12:39.350286 tx_first_pass[1][1][1] = 977
4078 20:12:39.353739 tx_last_pass[1][1][1] = 1000
4079 20:12:39.357216 tx_win_center[1][1][2] = 985
4080 20:12:39.357348 tx_first_pass[1][1][2] = 973
4081 20:12:39.360846 tx_last_pass[1][1][2] = 997
4082 20:12:39.363734 tx_win_center[1][1][3] = 983
4083 20:12:39.367172 tx_first_pass[1][1][3] = 971
4084 20:12:39.367281 tx_last_pass[1][1][3] = 996
4085 20:12:39.370954 tx_win_center[1][1][4] = 987
4086 20:12:39.373830 tx_first_pass[1][1][4] = 975
4087 20:12:39.377016 tx_last_pass[1][1][4] = 999
4088 20:12:39.380436 tx_win_center[1][1][5] = 988
4089 20:12:39.380543 tx_first_pass[1][1][5] = 976
4090 20:12:39.384214 tx_last_pass[1][1][5] = 1000
4091 20:12:39.387442 tx_win_center[1][1][6] = 989
4092 20:12:39.391302 tx_first_pass[1][1][6] = 977
4093 20:12:39.391434 tx_last_pass[1][1][6] = 1001
4094 20:12:39.393867 tx_win_center[1][1][7] = 987
4095 20:12:39.397402 tx_first_pass[1][1][7] = 976
4096 20:12:39.400413 tx_last_pass[1][1][7] = 998
4097 20:12:39.403974 tx_win_center[1][1][8] = 980
4098 20:12:39.404134 tx_first_pass[1][1][8] = 969
4099 20:12:39.407594 tx_last_pass[1][1][8] = 992
4100 20:12:39.410715 tx_win_center[1][1][9] = 980
4101 20:12:39.413809 tx_first_pass[1][1][9] = 968
4102 20:12:39.413951 tx_last_pass[1][1][9] = 992
4103 20:12:39.417196 tx_win_center[1][1][10] = 980
4104 20:12:39.420706 tx_first_pass[1][1][10] = 969
4105 20:12:39.423667 tx_last_pass[1][1][10] = 991
4106 20:12:39.427213 tx_win_center[1][1][11] = 981
4107 20:12:39.430296 tx_first_pass[1][1][11] = 970
4108 20:12:39.430446 tx_last_pass[1][1][11] = 993
4109 20:12:39.433708 tx_win_center[1][1][12] = 981
4110 20:12:39.437363 tx_first_pass[1][1][12] = 969
4111 20:12:39.440513 tx_last_pass[1][1][12] = 993
4112 20:12:39.443786 tx_win_center[1][1][13] = 981
4113 20:12:39.443936 tx_first_pass[1][1][13] = 970
4114 20:12:39.447248 tx_last_pass[1][1][13] = 992
4115 20:12:39.450411 tx_win_center[1][1][14] = 980
4116 20:12:39.454539 tx_first_pass[1][1][14] = 969
4117 20:12:39.454671 tx_last_pass[1][1][14] = 992
4118 20:12:39.457589 tx_win_center[1][1][15] = 978
4119 20:12:39.460809 tx_first_pass[1][1][15] = 967
4120 20:12:39.463872 tx_last_pass[1][1][15] = 990
4121 20:12:39.463984 dump params rx window
4122 20:12:39.467598 rx_firspass[0][0][0] = 9
4123 20:12:39.470753 rx_lastpass[0][0][0] = 42
4124 20:12:39.473723 rx_firspass[0][0][1] = 8
4125 20:12:39.473809 rx_lastpass[0][0][1] = 40
4126 20:12:39.477004 rx_firspass[0][0][2] = 9
4127 20:12:39.480294 rx_lastpass[0][0][2] = 39
4128 20:12:39.480378 rx_firspass[0][0][3] = -1
4129 20:12:39.483981 rx_lastpass[0][0][3] = 30
4130 20:12:39.487179 rx_firspass[0][0][4] = 7
4131 20:12:39.490875 rx_lastpass[0][0][4] = 39
4132 20:12:39.490988 rx_firspass[0][0][5] = 3
4133 20:12:39.493991 rx_lastpass[0][0][5] = 29
4134 20:12:39.497280 rx_firspass[0][0][6] = 2
4135 20:12:39.497409 rx_lastpass[0][0][6] = 32
4136 20:12:39.501088 rx_firspass[0][0][7] = 4
4137 20:12:39.504115 rx_lastpass[0][0][7] = 34
4138 20:12:39.504226 rx_firspass[0][0][8] = 3
4139 20:12:39.507187 rx_lastpass[0][0][8] = 34
4140 20:12:39.510596 rx_firspass[0][0][9] = 5
4141 20:12:39.510679 rx_lastpass[0][0][9] = 35
4142 20:12:39.513887 rx_firspass[0][0][10] = 9
4143 20:12:39.517552 rx_lastpass[0][0][10] = 38
4144 20:12:39.521041 rx_firspass[0][0][11] = 3
4145 20:12:39.521146 rx_lastpass[0][0][11] = 30
4146 20:12:39.523791 rx_firspass[0][0][12] = 5
4147 20:12:39.527255 rx_lastpass[0][0][12] = 34
4148 20:12:39.530473 rx_firspass[0][0][13] = 1
4149 20:12:39.530580 rx_lastpass[0][0][13] = 31
4150 20:12:39.533941 rx_firspass[0][0][14] = 3
4151 20:12:39.537121 rx_lastpass[0][0][14] = 33
4152 20:12:39.537237 rx_firspass[0][0][15] = 4
4153 20:12:39.540760 rx_lastpass[0][0][15] = 35
4154 20:12:39.543842 rx_firspass[0][1][0] = 9
4155 20:12:39.547298 rx_lastpass[0][1][0] = 43
4156 20:12:39.547409 rx_firspass[0][1][1] = 7
4157 20:12:39.550353 rx_lastpass[0][1][1] = 42
4158 20:12:39.553718 rx_firspass[0][1][2] = 7
4159 20:12:39.553799 rx_lastpass[0][1][2] = 42
4160 20:12:39.557123 rx_firspass[0][1][3] = -2
4161 20:12:39.560418 rx_lastpass[0][1][3] = 33
4162 20:12:39.560528 rx_firspass[0][1][4] = 5
4163 20:12:39.563781 rx_lastpass[0][1][4] = 40
4164 20:12:39.567138 rx_firspass[0][1][5] = 1
4165 20:12:39.570330 rx_lastpass[0][1][5] = 34
4166 20:12:39.570410 rx_firspass[0][1][6] = 2
4167 20:12:39.574236 rx_lastpass[0][1][6] = 35
4168 20:12:39.577199 rx_firspass[0][1][7] = 2
4169 20:12:39.577319 rx_lastpass[0][1][7] = 36
4170 20:12:39.580407 rx_firspass[0][1][8] = 0
4171 20:12:39.584211 rx_lastpass[0][1][8] = 36
4172 20:12:39.584294 rx_firspass[0][1][9] = 1
4173 20:12:39.587226 rx_lastpass[0][1][9] = 38
4174 20:12:39.590768 rx_firspass[0][1][10] = 6
4175 20:12:39.593864 rx_lastpass[0][1][10] = 41
4176 20:12:39.593945 rx_firspass[0][1][11] = 1
4177 20:12:39.597240 rx_lastpass[0][1][11] = 33
4178 20:12:39.600663 rx_firspass[0][1][12] = 1
4179 20:12:39.600775 rx_lastpass[0][1][12] = 36
4180 20:12:39.603815 rx_firspass[0][1][13] = -1
4181 20:12:39.607557 rx_lastpass[0][1][13] = 34
4182 20:12:39.610734 rx_firspass[0][1][14] = 1
4183 20:12:39.610823 rx_lastpass[0][1][14] = 36
4184 20:12:39.614077 rx_firspass[0][1][15] = 3
4185 20:12:39.617714 rx_lastpass[0][1][15] = 38
4186 20:12:39.617794 rx_firspass[1][0][0] = 8
4187 20:12:39.620839 rx_lastpass[1][0][0] = 40
4188 20:12:39.624266 rx_firspass[1][0][1] = 7
4189 20:12:39.627393 rx_lastpass[1][0][1] = 38
4190 20:12:39.627485 rx_firspass[1][0][2] = 0
4191 20:12:39.630759 rx_lastpass[1][0][2] = 32
4192 20:12:39.634222 rx_firspass[1][0][3] = 0
4193 20:12:39.634303 rx_lastpass[1][0][3] = 31
4194 20:12:39.637309 rx_firspass[1][0][4] = 4
4195 20:12:39.640436 rx_lastpass[1][0][4] = 33
4196 20:12:39.640516 rx_firspass[1][0][5] = 9
4197 20:12:39.643982 rx_lastpass[1][0][5] = 38
4198 20:12:39.647103 rx_firspass[1][0][6] = 10
4199 20:12:39.650421 rx_lastpass[1][0][6] = 40
4200 20:12:39.650502 rx_firspass[1][0][7] = 5
4201 20:12:39.653669 rx_lastpass[1][0][7] = 33
4202 20:12:39.657189 rx_firspass[1][0][8] = 3
4203 20:12:39.657312 rx_lastpass[1][0][8] = 35
4204 20:12:39.660660 rx_firspass[1][0][9] = 4
4205 20:12:39.663886 rx_lastpass[1][0][9] = 35
4206 20:12:39.667164 rx_firspass[1][0][10] = 2
4207 20:12:39.667245 rx_lastpass[1][0][10] = 34
4208 20:12:39.670322 rx_firspass[1][0][11] = 4
4209 20:12:39.673701 rx_lastpass[1][0][11] = 34
4210 20:12:39.673791 rx_firspass[1][0][12] = 5
4211 20:12:39.677111 rx_lastpass[1][0][12] = 35
4212 20:12:39.680843 rx_firspass[1][0][13] = 5
4213 20:12:39.683819 rx_lastpass[1][0][13] = 33
4214 20:12:39.683902 rx_firspass[1][0][14] = 3
4215 20:12:39.687095 rx_lastpass[1][0][14] = 34
4216 20:12:39.690378 rx_firspass[1][0][15] = 0
4217 20:12:39.693675 rx_lastpass[1][0][15] = 32
4218 20:12:39.693760 rx_firspass[1][1][0] = 7
4219 20:12:39.696817 rx_lastpass[1][1][0] = 42
4220 20:12:39.700360 rx_firspass[1][1][1] = 5
4221 20:12:39.700458 rx_lastpass[1][1][1] = 40
4222 20:12:39.704016 rx_firspass[1][1][2] = 0
4223 20:12:39.706779 rx_lastpass[1][1][2] = 35
4224 20:12:39.706878 rx_firspass[1][1][3] = -2
4225 20:12:39.710095 rx_lastpass[1][1][3] = 33
4226 20:12:39.713698 rx_firspass[1][1][4] = 2
4227 20:12:39.717216 rx_lastpass[1][1][4] = 36
4228 20:12:39.717341 rx_firspass[1][1][5] = 5
4229 20:12:39.720249 rx_lastpass[1][1][5] = 41
4230 20:12:39.723641 rx_firspass[1][1][6] = 7
4231 20:12:39.723723 rx_lastpass[1][1][6] = 42
4232 20:12:39.726941 rx_firspass[1][1][7] = 2
4233 20:12:39.730444 rx_lastpass[1][1][7] = 36
4234 20:12:39.730545 rx_firspass[1][1][8] = 2
4235 20:12:39.733679 rx_lastpass[1][1][8] = 37
4236 20:12:39.737211 rx_firspass[1][1][9] = 2
4237 20:12:39.740337 rx_lastpass[1][1][9] = 37
4238 20:12:39.740410 rx_firspass[1][1][10] = 2
4239 20:12:39.743620 rx_lastpass[1][1][10] = 36
4240 20:12:39.746836 rx_firspass[1][1][11] = 3
4241 20:12:39.746942 rx_lastpass[1][1][11] = 38
4242 20:12:39.750055 rx_firspass[1][1][12] = 4
4243 20:12:39.753629 rx_lastpass[1][1][12] = 39
4244 20:12:39.756850 rx_firspass[1][1][13] = 3
4245 20:12:39.756970 rx_lastpass[1][1][13] = 36
4246 20:12:39.760567 rx_firspass[1][1][14] = 3
4247 20:12:39.763583 rx_lastpass[1][1][14] = 36
4248 20:12:39.766913 rx_firspass[1][1][15] = 0
4249 20:12:39.767021 rx_lastpass[1][1][15] = 34
4250 20:12:39.770113 dump params clk_delay
4251 20:12:39.770196 clk_delay[0] = -1
4252 20:12:39.773380 clk_delay[1] = 0
4253 20:12:39.773489 dump params dqs_delay
4254 20:12:39.776926 dqs_delay[0][0] = 0
4255 20:12:39.780148 dqs_delay[0][1] = -1
4256 20:12:39.780254 dqs_delay[1][0] = -1
4257 20:12:39.783710 dqs_delay[1][1] = 1
4258 20:12:39.786616 dump params delay_cell_unit = 762
4259 20:12:39.786746 dump source = 0x0
4260 20:12:39.790065 dump params frequency:1200
4261 20:12:39.790142 dump params rank number:2
4262 20:12:39.793464
4263 20:12:39.793538 dump params write leveling
4264 20:12:39.796776 write leveling[0][0][0] = 0x0
4265 20:12:39.800153 write leveling[0][0][1] = 0x0
4266 20:12:39.803375 write leveling[0][1][0] = 0x0
4267 20:12:39.806757 write leveling[0][1][1] = 0x0
4268 20:12:39.806838 write leveling[1][0][0] = 0x0
4269 20:12:39.810118 write leveling[1][0][1] = 0x0
4270 20:12:39.813869 write leveling[1][1][0] = 0x0
4271 20:12:39.816621 write leveling[1][1][1] = 0x0
4272 20:12:39.816728 dump params cbt_cs
4273 20:12:39.820238 cbt_cs[0][0] = 0x0
4274 20:12:39.820318 cbt_cs[0][1] = 0x0
4275 20:12:39.823388 cbt_cs[1][0] = 0x0
4276 20:12:39.823469 cbt_cs[1][1] = 0x0
4277 20:12:39.826735 dump params cbt_mr12
4278 20:12:39.826822 cbt_mr12[0][0] = 0x0
4279 20:12:39.830235 cbt_mr12[0][1] = 0x0
4280 20:12:39.833240 cbt_mr12[1][0] = 0x0
4281 20:12:39.833362 cbt_mr12[1][1] = 0x0
4282 20:12:39.836879 dump params tx window
4283 20:12:39.839840 tx_center_min[0][0][0] = 0
4284 20:12:39.839926 tx_center_max[0][0][0] = 0
4285 20:12:39.843365 tx_center_min[0][0][1] = 0
4286 20:12:39.846651 tx_center_max[0][0][1] = 0
4287 20:12:39.846736 tx_center_min[0][1][0] = 0
4288 20:12:39.850000 tx_center_max[0][1][0] = 0
4289 20:12:39.853384 tx_center_min[0][1][1] = 0
4290 20:12:39.856769 tx_center_max[0][1][1] = 0
4291 20:12:39.856859 tx_center_min[1][0][0] = 0
4292 20:12:39.859867 tx_center_max[1][0][0] = 0
4293 20:12:39.863298 tx_center_min[1][0][1] = 0
4294 20:12:39.866672 tx_center_max[1][0][1] = 0
4295 20:12:39.866755 tx_center_min[1][1][0] = 0
4296 20:12:39.870247 tx_center_max[1][1][0] = 0
4297 20:12:39.873410 tx_center_min[1][1][1] = 0
4298 20:12:39.877040 tx_center_max[1][1][1] = 0
4299 20:12:39.877124 dump params tx window
4300 20:12:39.879976 tx_win_center[0][0][0] = 0
4301 20:12:39.883224 tx_first_pass[0][0][0] = 0
4302 20:12:39.883309 tx_last_pass[0][0][0] = 0
4303 20:12:39.886924 tx_win_center[0][0][1] = 0
4304 20:12:39.889838 tx_first_pass[0][0][1] = 0
4305 20:12:39.893113 tx_last_pass[0][0][1] = 0
4306 20:12:39.893225 tx_win_center[0][0][2] = 0
4307 20:12:39.896616 tx_first_pass[0][0][2] = 0
4308 20:12:39.900073 tx_last_pass[0][0][2] = 0
4309 20:12:39.900181 tx_win_center[0][0][3] = 0
4310 20:12:39.903059 tx_first_pass[0][0][3] = 0
4311 20:12:39.906378 tx_last_pass[0][0][3] = 0
4312 20:12:39.909832 tx_win_center[0][0][4] = 0
4313 20:12:39.909934 tx_first_pass[0][0][4] = 0
4314 20:12:39.913148 tx_last_pass[0][0][4] = 0
4315 20:12:39.916444 tx_win_center[0][0][5] = 0
4316 20:12:39.919680 tx_first_pass[0][0][5] = 0
4317 20:12:39.919773 tx_last_pass[0][0][5] = 0
4318 20:12:39.923211 tx_win_center[0][0][6] = 0
4319 20:12:39.926539 tx_first_pass[0][0][6] = 0
4320 20:12:39.926637 tx_last_pass[0][0][6] = 0
4321 20:12:39.929969 tx_win_center[0][0][7] = 0
4322 20:12:39.932897 tx_first_pass[0][0][7] = 0
4323 20:12:39.936638 tx_last_pass[0][0][7] = 0
4324 20:12:39.936726 tx_win_center[0][0][8] = 0
4325 20:12:39.939794 tx_first_pass[0][0][8] = 0
4326 20:12:39.943070 tx_last_pass[0][0][8] = 0
4327 20:12:39.943191 tx_win_center[0][0][9] = 0
4328 20:12:39.946509 tx_first_pass[0][0][9] = 0
4329 20:12:39.949508 tx_last_pass[0][0][9] = 0
4330 20:12:39.953225 tx_win_center[0][0][10] = 0
4331 20:12:39.953390 tx_first_pass[0][0][10] = 0
4332 20:12:39.956075 tx_last_pass[0][0][10] = 0
4333 20:12:39.959518 tx_win_center[0][0][11] = 0
4334 20:12:39.963052 tx_first_pass[0][0][11] = 0
4335 20:12:39.963180 tx_last_pass[0][0][11] = 0
4336 20:12:39.966569 tx_win_center[0][0][12] = 0
4337 20:12:39.969986 tx_first_pass[0][0][12] = 0
4338 20:12:39.973052 tx_last_pass[0][0][12] = 0
4339 20:12:39.973160 tx_win_center[0][0][13] = 0
4340 20:12:39.976049 tx_first_pass[0][0][13] = 0
4341 20:12:39.979717 tx_last_pass[0][0][13] = 0
4342 20:12:39.983497 tx_win_center[0][0][14] = 0
4343 20:12:39.986124 tx_first_pass[0][0][14] = 0
4344 20:12:39.986238 tx_last_pass[0][0][14] = 0
4345 20:12:39.989651 tx_win_center[0][0][15] = 0
4346 20:12:39.992747 tx_first_pass[0][0][15] = 0
4347 20:12:39.992863 tx_last_pass[0][0][15] = 0
4348 20:12:39.996227 tx_win_center[0][1][0] = 0
4349 20:12:39.999950 tx_first_pass[0][1][0] = 0
4350 20:12:40.002719 tx_last_pass[0][1][0] = 0
4351 20:12:40.002807 tx_win_center[0][1][1] = 0
4352 20:12:40.006507 tx_first_pass[0][1][1] = 0
4353 20:12:40.009981 tx_last_pass[0][1][1] = 0
4354 20:12:40.012878 tx_win_center[0][1][2] = 0
4355 20:12:40.012986 tx_first_pass[0][1][2] = 0
4356 20:12:40.016545 tx_last_pass[0][1][2] = 0
4357 20:12:40.019660 tx_win_center[0][1][3] = 0
4358 20:12:40.019742 tx_first_pass[0][1][3] = 0
4359 20:12:40.022582 tx_last_pass[0][1][3] = 0
4360 20:12:40.026059 tx_win_center[0][1][4] = 0
4361 20:12:40.029615 tx_first_pass[0][1][4] = 0
4362 20:12:40.029704 tx_last_pass[0][1][4] = 0
4363 20:12:40.033013 tx_win_center[0][1][5] = 0
4364 20:12:40.036279 tx_first_pass[0][1][5] = 0
4365 20:12:40.039575 tx_last_pass[0][1][5] = 0
4366 20:12:40.039657 tx_win_center[0][1][6] = 0
4367 20:12:40.042864 tx_first_pass[0][1][6] = 0
4368 20:12:40.046427 tx_last_pass[0][1][6] = 0
4369 20:12:40.046507 tx_win_center[0][1][7] = 0
4370 20:12:40.049450 tx_first_pass[0][1][7] = 0
4371 20:12:40.052627 tx_last_pass[0][1][7] = 0
4372 20:12:40.055929 tx_win_center[0][1][8] = 0
4373 20:12:40.056010 tx_first_pass[0][1][8] = 0
4374 20:12:40.059286 tx_last_pass[0][1][8] = 0
4375 20:12:40.062704 tx_win_center[0][1][9] = 0
4376 20:12:40.066327 tx_first_pass[0][1][9] = 0
4377 20:12:40.066409 tx_last_pass[0][1][9] = 0
4378 20:12:40.069607 tx_win_center[0][1][10] = 0
4379 20:12:40.072989 tx_first_pass[0][1][10] = 0
4380 20:12:40.073069 tx_last_pass[0][1][10] = 0
4381 20:12:40.076171 tx_win_center[0][1][11] = 0
4382 20:12:40.079540 tx_first_pass[0][1][11] = 0
4383 20:12:40.082856 tx_last_pass[0][1][11] = 0
4384 20:12:40.082939 tx_win_center[0][1][12] = 0
4385 20:12:40.086202 tx_first_pass[0][1][12] = 0
4386 20:12:40.089529 tx_last_pass[0][1][12] = 0
4387 20:12:40.092833 tx_win_center[0][1][13] = 0
4388 20:12:40.092940 tx_first_pass[0][1][13] = 0
4389 20:12:40.096582 tx_last_pass[0][1][13] = 0
4390 20:12:40.099485 tx_win_center[0][1][14] = 0
4391 20:12:40.102863 tx_first_pass[0][1][14] = 0
4392 20:12:40.102943 tx_last_pass[0][1][14] = 0
4393 20:12:40.106037 tx_win_center[0][1][15] = 0
4394 20:12:40.109691 tx_first_pass[0][1][15] = 0
4395 20:12:40.112652 tx_last_pass[0][1][15] = 0
4396 20:12:40.112732 tx_win_center[1][0][0] = 0
4397 20:12:40.116410 tx_first_pass[1][0][0] = 0
4398 20:12:40.119458 tx_last_pass[1][0][0] = 0
4399 20:12:40.122890 tx_win_center[1][0][1] = 0
4400 20:12:40.122971 tx_first_pass[1][0][1] = 0
4401 20:12:40.126207 tx_last_pass[1][0][1] = 0
4402 20:12:40.129491 tx_win_center[1][0][2] = 0
4403 20:12:40.133210 tx_first_pass[1][0][2] = 0
4404 20:12:40.133328 tx_last_pass[1][0][2] = 0
4405 20:12:40.135981 tx_win_center[1][0][3] = 0
4406 20:12:40.139534 tx_first_pass[1][0][3] = 0
4407 20:12:40.139614 tx_last_pass[1][0][3] = 0
4408 20:12:40.143223 tx_win_center[1][0][4] = 0
4409 20:12:40.146219 tx_first_pass[1][0][4] = 0
4410 20:12:40.149523 tx_last_pass[1][0][4] = 0
4411 20:12:40.149604 tx_win_center[1][0][5] = 0
4412 20:12:40.152872 tx_first_pass[1][0][5] = 0
4413 20:12:40.156429 tx_last_pass[1][0][5] = 0
4414 20:12:40.156551 tx_win_center[1][0][6] = 0
4415 20:12:40.159422 tx_first_pass[1][0][6] = 0
4416 20:12:40.162914 tx_last_pass[1][0][6] = 0
4417 20:12:40.166289 tx_win_center[1][0][7] = 0
4418 20:12:40.166380 tx_first_pass[1][0][7] = 0
4419 20:12:40.169538 tx_last_pass[1][0][7] = 0
4420 20:12:40.172706 tx_win_center[1][0][8] = 0
4421 20:12:40.176123 tx_first_pass[1][0][8] = 0
4422 20:12:40.176261 tx_last_pass[1][0][8] = 0
4423 20:12:40.179262 tx_win_center[1][0][9] = 0
4424 20:12:40.182468 tx_first_pass[1][0][9] = 0
4425 20:12:40.185692 tx_last_pass[1][0][9] = 0
4426 20:12:40.185777 tx_win_center[1][0][10] = 0
4427 20:12:40.189249 tx_first_pass[1][0][10] = 0
4428 20:12:40.193201 tx_last_pass[1][0][10] = 0
4429 20:12:40.193337 tx_win_center[1][0][11] = 0
4430 20:12:40.196165 tx_first_pass[1][0][11] = 0
4431 20:12:40.199046 tx_last_pass[1][0][11] = 0
4432 20:12:40.202296 tx_win_center[1][0][12] = 0
4433 20:12:40.206202 tx_first_pass[1][0][12] = 0
4434 20:12:40.206288 tx_last_pass[1][0][12] = 0
4435 20:12:40.209163 tx_win_center[1][0][13] = 0
4436 20:12:40.212150 tx_first_pass[1][0][13] = 0
4437 20:12:40.215534 tx_last_pass[1][0][13] = 0
4438 20:12:40.215619 tx_win_center[1][0][14] = 0
4439 20:12:40.219171 tx_first_pass[1][0][14] = 0
4440 20:12:40.222443 tx_last_pass[1][0][14] = 0
4441 20:12:40.225800 tx_win_center[1][0][15] = 0
4442 20:12:40.225889 tx_first_pass[1][0][15] = 0
4443 20:12:40.229144 tx_last_pass[1][0][15] = 0
4444 20:12:40.232701 tx_win_center[1][1][0] = 0
4445 20:12:40.235583 tx_first_pass[1][1][0] = 0
4446 20:12:40.235676 tx_last_pass[1][1][0] = 0
4447 20:12:40.238960 tx_win_center[1][1][1] = 0
4448 20:12:40.242151 tx_first_pass[1][1][1] = 0
4449 20:12:40.242238 tx_last_pass[1][1][1] = 0
4450 20:12:40.245239 tx_win_center[1][1][2] = 0
4451 20:12:40.248588 tx_first_pass[1][1][2] = 0
4452 20:12:40.252255 tx_last_pass[1][1][2] = 0
4453 20:12:40.252346 tx_win_center[1][1][3] = 0
4454 20:12:40.255244 tx_first_pass[1][1][3] = 0
4455 20:12:40.258543 tx_last_pass[1][1][3] = 0
4456 20:12:40.261897 tx_win_center[1][1][4] = 0
4457 20:12:40.261987 tx_first_pass[1][1][4] = 0
4458 20:12:40.265674 tx_last_pass[1][1][4] = 0
4459 20:12:40.268614 tx_win_center[1][1][5] = 0
4460 20:12:40.268744 tx_first_pass[1][1][5] = 0
4461 20:12:40.272161 tx_last_pass[1][1][5] = 0
4462 20:12:40.275416 tx_win_center[1][1][6] = 0
4463 20:12:40.278675 tx_first_pass[1][1][6] = 0
4464 20:12:40.278766 tx_last_pass[1][1][6] = 0
4465 20:12:40.282229 tx_win_center[1][1][7] = 0
4466 20:12:40.285479 tx_first_pass[1][1][7] = 0
4467 20:12:40.288499 tx_last_pass[1][1][7] = 0
4468 20:12:40.288584 tx_win_center[1][1][8] = 0
4469 20:12:40.291760 tx_first_pass[1][1][8] = 0
4470 20:12:40.295098 tx_last_pass[1][1][8] = 0
4471 20:12:40.295188 tx_win_center[1][1][9] = 0
4472 20:12:40.298505 tx_first_pass[1][1][9] = 0
4473 20:12:40.302267 tx_last_pass[1][1][9] = 0
4474 20:12:40.305489 tx_win_center[1][1][10] = 0
4475 20:12:40.305609 tx_first_pass[1][1][10] = 0
4476 20:12:40.308826 tx_last_pass[1][1][10] = 0
4477 20:12:40.312154 tx_win_center[1][1][11] = 0
4478 20:12:40.315093 tx_first_pass[1][1][11] = 0
4479 20:12:40.315180 tx_last_pass[1][1][11] = 0
4480 20:12:40.318419 tx_win_center[1][1][12] = 0
4481 20:12:40.322059 tx_first_pass[1][1][12] = 0
4482 20:12:40.325443 tx_last_pass[1][1][12] = 0
4483 20:12:40.325533 tx_win_center[1][1][13] = 0
4484 20:12:40.328497 tx_first_pass[1][1][13] = 0
4485 20:12:40.332106 tx_last_pass[1][1][13] = 0
4486 20:12:40.335475 tx_win_center[1][1][14] = 0
4487 20:12:40.335565 tx_first_pass[1][1][14] = 0
4488 20:12:40.338742 tx_last_pass[1][1][14] = 0
4489 20:12:40.342012 tx_win_center[1][1][15] = 0
4490 20:12:40.345457 tx_first_pass[1][1][15] = 0
4491 20:12:40.345549 tx_last_pass[1][1][15] = 0
4492 20:12:40.348668 dump params rx window
4493 20:12:40.352641 rx_firspass[0][0][0] = 0
4494 20:12:40.352735 rx_lastpass[0][0][0] = 0
4495 20:12:40.355543 rx_firspass[0][0][1] = 0
4496 20:12:40.358613 rx_lastpass[0][0][1] = 0
4497 20:12:40.358702 rx_firspass[0][0][2] = 0
4498 20:12:40.362173 rx_lastpass[0][0][2] = 0
4499 20:12:40.365098 rx_firspass[0][0][3] = 0
4500 20:12:40.365212 rx_lastpass[0][0][3] = 0
4501 20:12:40.368456 rx_firspass[0][0][4] = 0
4502 20:12:40.372120 rx_lastpass[0][0][4] = 0
4503 20:12:40.375357 rx_firspass[0][0][5] = 0
4504 20:12:40.375445 rx_lastpass[0][0][5] = 0
4505 20:12:40.378605 rx_firspass[0][0][6] = 0
4506 20:12:40.382146 rx_lastpass[0][0][6] = 0
4507 20:12:40.382232 rx_firspass[0][0][7] = 0
4508 20:12:40.385420 rx_lastpass[0][0][7] = 0
4509 20:12:40.388587 rx_firspass[0][0][8] = 0
4510 20:12:40.388683 rx_lastpass[0][0][8] = 0
4511 20:12:40.391818 rx_firspass[0][0][9] = 0
4512 20:12:40.394888 rx_lastpass[0][0][9] = 0
4513 20:12:40.394974 rx_firspass[0][0][10] = 0
4514 20:12:40.398608 rx_lastpass[0][0][10] = 0
4515 20:12:40.401672 rx_firspass[0][0][11] = 0
4516 20:12:40.405474 rx_lastpass[0][0][11] = 0
4517 20:12:40.405563 rx_firspass[0][0][12] = 0
4518 20:12:40.408625 rx_lastpass[0][0][12] = 0
4519 20:12:40.411747 rx_firspass[0][0][13] = 0
4520 20:12:40.411835 rx_lastpass[0][0][13] = 0
4521 20:12:40.415363 rx_firspass[0][0][14] = 0
4522 20:12:40.418761 rx_lastpass[0][0][14] = 0
4523 20:12:40.421989 rx_firspass[0][0][15] = 0
4524 20:12:40.422075 rx_lastpass[0][0][15] = 0
4525 20:12:40.425114 rx_firspass[0][1][0] = 0
4526 20:12:40.429214 rx_lastpass[0][1][0] = 0
4527 20:12:40.429340 rx_firspass[0][1][1] = 0
4528 20:12:40.431795 rx_lastpass[0][1][1] = 0
4529 20:12:40.434977 rx_firspass[0][1][2] = 0
4530 20:12:40.435061 rx_lastpass[0][1][2] = 0
4531 20:12:40.438813 rx_firspass[0][1][3] = 0
4532 20:12:40.441743 rx_lastpass[0][1][3] = 0
4533 20:12:40.441818 rx_firspass[0][1][4] = 0
4534 20:12:40.444853 rx_lastpass[0][1][4] = 0
4535 20:12:40.448756 rx_firspass[0][1][5] = 0
4536 20:12:40.448834 rx_lastpass[0][1][5] = 0
4537 20:12:40.451628 rx_firspass[0][1][6] = 0
4538 20:12:40.454924 rx_lastpass[0][1][6] = 0
4539 20:12:40.458699 rx_firspass[0][1][7] = 0
4540 20:12:40.458781 rx_lastpass[0][1][7] = 0
4541 20:12:40.462372 rx_firspass[0][1][8] = 0
4542 20:12:40.464912 rx_lastpass[0][1][8] = 0
4543 20:12:40.464991 rx_firspass[0][1][9] = 0
4544 20:12:40.468138 rx_lastpass[0][1][9] = 0
4545 20:12:40.471562 rx_firspass[0][1][10] = 0
4546 20:12:40.471630 rx_lastpass[0][1][10] = 0
4547 20:12:40.474930 rx_firspass[0][1][11] = 0
4548 20:12:40.478260 rx_lastpass[0][1][11] = 0
4549 20:12:40.481668 rx_firspass[0][1][12] = 0
4550 20:12:40.481752 rx_lastpass[0][1][12] = 0
4551 20:12:40.485198 rx_firspass[0][1][13] = 0
4552 20:12:40.488053 rx_lastpass[0][1][13] = 0
4553 20:12:40.488136 rx_firspass[0][1][14] = 0
4554 20:12:40.491831 rx_lastpass[0][1][14] = 0
4555 20:12:40.494901 rx_firspass[0][1][15] = 0
4556 20:12:40.498147 rx_lastpass[0][1][15] = 0
4557 20:12:40.498232 rx_firspass[1][0][0] = 0
4558 20:12:40.501402 rx_lastpass[1][0][0] = 0
4559 20:12:40.505205 rx_firspass[1][0][1] = 0
4560 20:12:40.505330 rx_lastpass[1][0][1] = 0
4561 20:12:40.507858 rx_firspass[1][0][2] = 0
4562 20:12:40.511479 rx_lastpass[1][0][2] = 0
4563 20:12:40.511562 rx_firspass[1][0][3] = 0
4564 20:12:40.515113 rx_lastpass[1][0][3] = 0
4565 20:12:40.518139 rx_firspass[1][0][4] = 0
4566 20:12:40.518222 rx_lastpass[1][0][4] = 0
4567 20:12:40.521230 rx_firspass[1][0][5] = 0
4568 20:12:40.524849 rx_lastpass[1][0][5] = 0
4569 20:12:40.528035 rx_firspass[1][0][6] = 0
4570 20:12:40.528118 rx_lastpass[1][0][6] = 0
4571 20:12:40.531165 rx_firspass[1][0][7] = 0
4572 20:12:40.535116 rx_lastpass[1][0][7] = 0
4573 20:12:40.535201 rx_firspass[1][0][8] = 0
4574 20:12:40.538132 rx_lastpass[1][0][8] = 0
4575 20:12:40.541221 rx_firspass[1][0][9] = 0
4576 20:12:40.541340 rx_lastpass[1][0][9] = 0
4577 20:12:40.544904 rx_firspass[1][0][10] = 0
4578 20:12:40.547875 rx_lastpass[1][0][10] = 0
4579 20:12:40.547957 rx_firspass[1][0][11] = 0
4580 20:12:40.551166 rx_lastpass[1][0][11] = 0
4581 20:12:40.554761 rx_firspass[1][0][12] = 0
4582 20:12:40.557882 rx_lastpass[1][0][12] = 0
4583 20:12:40.557966 rx_firspass[1][0][13] = 0
4584 20:12:40.561185 rx_lastpass[1][0][13] = 0
4585 20:12:40.564566 rx_firspass[1][0][14] = 0
4586 20:12:40.564649 rx_lastpass[1][0][14] = 0
4587 20:12:40.567973 rx_firspass[1][0][15] = 0
4588 20:12:40.571171 rx_lastpass[1][0][15] = 0
4589 20:12:40.574369 rx_firspass[1][1][0] = 0
4590 20:12:40.574454 rx_lastpass[1][1][0] = 0
4591 20:12:40.577829 rx_firspass[1][1][1] = 0
4592 20:12:40.580959 rx_lastpass[1][1][1] = 0
4593 20:12:40.581058 rx_firspass[1][1][2] = 0
4594 20:12:40.584347 rx_lastpass[1][1][2] = 0
4595 20:12:40.587724 rx_firspass[1][1][3] = 0
4596 20:12:40.587807 rx_lastpass[1][1][3] = 0
4597 20:12:40.591204 rx_firspass[1][1][4] = 0
4598 20:12:40.594497 rx_lastpass[1][1][4] = 0
4599 20:12:40.594609 rx_firspass[1][1][5] = 0
4600 20:12:40.597792 rx_lastpass[1][1][5] = 0
4601 20:12:40.600880 rx_firspass[1][1][6] = 0
4602 20:12:40.604388 rx_lastpass[1][1][6] = 0
4603 20:12:40.604473 rx_firspass[1][1][7] = 0
4604 20:12:40.607636 rx_lastpass[1][1][7] = 0
4605 20:12:40.610981 rx_firspass[1][1][8] = 0
4606 20:12:40.611063 rx_lastpass[1][1][8] = 0
4607 20:12:40.614548 rx_firspass[1][1][9] = 0
4608 20:12:40.617875 rx_lastpass[1][1][9] = 0
4609 20:12:40.617958 rx_firspass[1][1][10] = 0
4610 20:12:40.620890 rx_lastpass[1][1][10] = 0
4611 20:12:40.624455 rx_firspass[1][1][11] = 0
4612 20:12:40.624538 rx_lastpass[1][1][11] = 0
4613 20:12:40.627922 rx_firspass[1][1][12] = 0
4614 20:12:40.631154 rx_lastpass[1][1][12] = 0
4615 20:12:40.634252 rx_firspass[1][1][13] = 0
4616 20:12:40.634335 rx_lastpass[1][1][13] = 0
4617 20:12:40.637649 rx_firspass[1][1][14] = 0
4618 20:12:40.641069 rx_lastpass[1][1][14] = 0
4619 20:12:40.641159 rx_firspass[1][1][15] = 0
4620 20:12:40.644205 rx_lastpass[1][1][15] = 0
4621 20:12:40.647530 dump params clk_delay
4622 20:12:40.647613 clk_delay[0] = 0
4623 20:12:40.650769 clk_delay[1] = 0
4624 20:12:40.650851 dump params dqs_delay
4625 20:12:40.654477 dqs_delay[0][0] = 0
4626 20:12:40.654562 dqs_delay[0][1] = 0
4627 20:12:40.657685 dqs_delay[1][0] = 0
4628 20:12:40.657773 dqs_delay[1][1] = 0
4629 20:12:40.660693 dump params delay_cell_unit = 762
4630 20:12:40.664150 dump source = 0x0
4631 20:12:40.667358 dump params frequency:800
4632 20:12:40.667441 dump params rank number:2
4633 20:12:40.667506
4634 20:12:40.670674 dump params write leveling
4635 20:12:40.674383 write leveling[0][0][0] = 0x0
4636 20:12:40.677997 write leveling[0][0][1] = 0x0
4637 20:12:40.678090 write leveling[0][1][0] = 0x0
4638 20:12:40.681225 write leveling[0][1][1] = 0x0
4639 20:12:40.684154 write leveling[1][0][0] = 0x0
4640 20:12:40.687974 write leveling[1][0][1] = 0x0
4641 20:12:40.690746 write leveling[1][1][0] = 0x0
4642 20:12:40.690830 write leveling[1][1][1] = 0x0
4643 20:12:40.694465 dump params cbt_cs
4644 20:12:40.697525 cbt_cs[0][0] = 0x0
4645 20:12:40.697622 cbt_cs[0][1] = 0x0
4646 20:12:40.700732 cbt_cs[1][0] = 0x0
4647 20:12:40.700819 cbt_cs[1][1] = 0x0
4648 20:12:40.704585 dump params cbt_mr12
4649 20:12:40.704674 cbt_mr12[0][0] = 0x0
4650 20:12:40.707489 cbt_mr12[0][1] = 0x0
4651 20:12:40.707575 cbt_mr12[1][0] = 0x0
4652 20:12:40.711047 cbt_mr12[1][1] = 0x0
4653 20:12:40.714283 dump params tx window
4654 20:12:40.714368 tx_center_min[0][0][0] = 0
4655 20:12:40.717850 tx_center_max[0][0][0] = 0
4656 20:12:40.720836 tx_center_min[0][0][1] = 0
4657 20:12:40.720923 tx_center_max[0][0][1] = 0
4658 20:12:40.724300 tx_center_min[0][1][0] = 0
4659 20:12:40.727564 tx_center_max[0][1][0] = 0
4660 20:12:40.730930 tx_center_min[0][1][1] = 0
4661 20:12:40.731013 tx_center_max[0][1][1] = 0
4662 20:12:40.734288 tx_center_min[1][0][0] = 0
4663 20:12:40.737940 tx_center_max[1][0][0] = 0
4664 20:12:40.740689 tx_center_min[1][0][1] = 0
4665 20:12:40.740771 tx_center_max[1][0][1] = 0
4666 20:12:40.743843 tx_center_min[1][1][0] = 0
4667 20:12:40.747460 tx_center_max[1][1][0] = 0
4668 20:12:40.750719 tx_center_min[1][1][1] = 0
4669 20:12:40.750809 tx_center_max[1][1][1] = 0
4670 20:12:40.754259 dump params tx window
4671 20:12:40.757413 tx_win_center[0][0][0] = 0
4672 20:12:40.757511 tx_first_pass[0][0][0] = 0
4673 20:12:40.760637 tx_last_pass[0][0][0] = 0
4674 20:12:40.764391 tx_win_center[0][0][1] = 0
4675 20:12:40.767373 tx_first_pass[0][0][1] = 0
4676 20:12:40.767466 tx_last_pass[0][0][1] = 0
4677 20:12:40.771190 tx_win_center[0][0][2] = 0
4678 20:12:40.773827 tx_first_pass[0][0][2] = 0
4679 20:12:40.777224 tx_last_pass[0][0][2] = 0
4680 20:12:40.777365 tx_win_center[0][0][3] = 0
4681 20:12:40.780465 tx_first_pass[0][0][3] = 0
4682 20:12:40.783948 tx_last_pass[0][0][3] = 0
4683 20:12:40.784048 tx_win_center[0][0][4] = 0
4684 20:12:40.787279 tx_first_pass[0][0][4] = 0
4685 20:12:40.790442 tx_last_pass[0][0][4] = 0
4686 20:12:40.793950 tx_win_center[0][0][5] = 0
4687 20:12:40.794041 tx_first_pass[0][0][5] = 0
4688 20:12:40.797424 tx_last_pass[0][0][5] = 0
4689 20:12:40.800448 tx_win_center[0][0][6] = 0
4690 20:12:40.803974 tx_first_pass[0][0][6] = 0
4691 20:12:40.804081 tx_last_pass[0][0][6] = 0
4692 20:12:40.806927 tx_win_center[0][0][7] = 0
4693 20:12:40.810569 tx_first_pass[0][0][7] = 0
4694 20:12:40.810680 tx_last_pass[0][0][7] = 0
4695 20:12:40.813486 tx_win_center[0][0][8] = 0
4696 20:12:40.816929 tx_first_pass[0][0][8] = 0
4697 20:12:40.820461 tx_last_pass[0][0][8] = 0
4698 20:12:40.820559 tx_win_center[0][0][9] = 0
4699 20:12:40.823535 tx_first_pass[0][0][9] = 0
4700 20:12:40.826973 tx_last_pass[0][0][9] = 0
4701 20:12:40.830200 tx_win_center[0][0][10] = 0
4702 20:12:40.830290 tx_first_pass[0][0][10] = 0
4703 20:12:40.833737 tx_last_pass[0][0][10] = 0
4704 20:12:40.836903 tx_win_center[0][0][11] = 0
4705 20:12:40.840197 tx_first_pass[0][0][11] = 0
4706 20:12:40.840290 tx_last_pass[0][0][11] = 0
4707 20:12:40.843791 tx_win_center[0][0][12] = 0
4708 20:12:40.847112 tx_first_pass[0][0][12] = 0
4709 20:12:40.850156 tx_last_pass[0][0][12] = 0
4710 20:12:40.850250 tx_win_center[0][0][13] = 0
4711 20:12:40.853624 tx_first_pass[0][0][13] = 0
4712 20:12:40.856962 tx_last_pass[0][0][13] = 0
4713 20:12:40.860500 tx_win_center[0][0][14] = 0
4714 20:12:40.860585 tx_first_pass[0][0][14] = 0
4715 20:12:40.863815 tx_last_pass[0][0][14] = 0
4716 20:12:40.867180 tx_win_center[0][0][15] = 0
4717 20:12:40.870622 tx_first_pass[0][0][15] = 0
4718 20:12:40.870727 tx_last_pass[0][0][15] = 0
4719 20:12:40.873793 tx_win_center[0][1][0] = 0
4720 20:12:40.876974 tx_first_pass[0][1][0] = 0
4721 20:12:40.877065 tx_last_pass[0][1][0] = 0
4722 20:12:40.880780 tx_win_center[0][1][1] = 0
4723 20:12:40.883738 tx_first_pass[0][1][1] = 0
4724 20:12:40.886806 tx_last_pass[0][1][1] = 0
4725 20:12:40.886909 tx_win_center[0][1][2] = 0
4726 20:12:40.890432 tx_first_pass[0][1][2] = 0
4727 20:12:40.894113 tx_last_pass[0][1][2] = 0
4728 20:12:40.896832 tx_win_center[0][1][3] = 0
4729 20:12:40.896926 tx_first_pass[0][1][3] = 0
4730 20:12:40.900403 tx_last_pass[0][1][3] = 0
4731 20:12:40.903525 tx_win_center[0][1][4] = 0
4732 20:12:40.903620 tx_first_pass[0][1][4] = 0
4733 20:12:40.907154 tx_last_pass[0][1][4] = 0
4734 20:12:40.910390 tx_win_center[0][1][5] = 0
4735 20:12:40.913790 tx_first_pass[0][1][5] = 0
4736 20:12:40.913882 tx_last_pass[0][1][5] = 0
4737 20:12:40.916695 tx_win_center[0][1][6] = 0
4738 20:12:40.920716 tx_first_pass[0][1][6] = 0
4739 20:12:40.923664 tx_last_pass[0][1][6] = 0
4740 20:12:40.923745 tx_win_center[0][1][7] = 0
4741 20:12:40.926710 tx_first_pass[0][1][7] = 0
4742 20:12:40.930311 tx_last_pass[0][1][7] = 0
4743 20:12:40.930392 tx_win_center[0][1][8] = 0
4744 20:12:40.933592 tx_first_pass[0][1][8] = 0
4745 20:12:40.936938 tx_last_pass[0][1][8] = 0
4746 20:12:40.940143 tx_win_center[0][1][9] = 0
4747 20:12:40.940223 tx_first_pass[0][1][9] = 0
4748 20:12:40.943392 tx_last_pass[0][1][9] = 0
4749 20:12:40.947008 tx_win_center[0][1][10] = 0
4750 20:12:40.949944 tx_first_pass[0][1][10] = 0
4751 20:12:40.950032 tx_last_pass[0][1][10] = 0
4752 20:12:40.953418 tx_win_center[0][1][11] = 0
4753 20:12:40.956691 tx_first_pass[0][1][11] = 0
4754 20:12:40.960127 tx_last_pass[0][1][11] = 0
4755 20:12:40.960213 tx_win_center[0][1][12] = 0
4756 20:12:40.963272 tx_first_pass[0][1][12] = 0
4757 20:12:40.966771 tx_last_pass[0][1][12] = 0
4758 20:12:40.969991 tx_win_center[0][1][13] = 0
4759 20:12:40.970078 tx_first_pass[0][1][13] = 0
4760 20:12:40.973643 tx_last_pass[0][1][13] = 0
4761 20:12:40.976886 tx_win_center[0][1][14] = 0
4762 20:12:40.980630 tx_first_pass[0][1][14] = 0
4763 20:12:40.980712 tx_last_pass[0][1][14] = 0
4764 20:12:40.983141 tx_win_center[0][1][15] = 0
4765 20:12:40.986891 tx_first_pass[0][1][15] = 0
4766 20:12:40.990362 tx_last_pass[0][1][15] = 0
4767 20:12:40.990463 tx_win_center[1][0][0] = 0
4768 20:12:40.993515 tx_first_pass[1][0][0] = 0
4769 20:12:40.996849 tx_last_pass[1][0][0] = 0
4770 20:12:40.996931 tx_win_center[1][0][1] = 0
4771 20:12:40.999777 tx_first_pass[1][0][1] = 0
4772 20:12:41.003488 tx_last_pass[1][0][1] = 0
4773 20:12:41.007147 tx_win_center[1][0][2] = 0
4774 20:12:41.007232 tx_first_pass[1][0][2] = 0
4775 20:12:41.009769 tx_last_pass[1][0][2] = 0
4776 20:12:41.013071 tx_win_center[1][0][3] = 0
4777 20:12:41.016788 tx_first_pass[1][0][3] = 0
4778 20:12:41.016872 tx_last_pass[1][0][3] = 0
4779 20:12:41.020069 tx_win_center[1][0][4] = 0
4780 20:12:41.023325 tx_first_pass[1][0][4] = 0
4781 20:12:41.023410 tx_last_pass[1][0][4] = 0
4782 20:12:41.026904 tx_win_center[1][0][5] = 0
4783 20:12:41.029712 tx_first_pass[1][0][5] = 0
4784 20:12:41.033432 tx_last_pass[1][0][5] = 0
4785 20:12:41.033516 tx_win_center[1][0][6] = 0
4786 20:12:41.036496 tx_first_pass[1][0][6] = 0
4787 20:12:41.040563 tx_last_pass[1][0][6] = 0
4788 20:12:41.043040 tx_win_center[1][0][7] = 0
4789 20:12:41.043125 tx_first_pass[1][0][7] = 0
4790 20:12:41.046744 tx_last_pass[1][0][7] = 0
4791 20:12:41.050095 tx_win_center[1][0][8] = 0
4792 20:12:41.050179 tx_first_pass[1][0][8] = 0
4793 20:12:41.053298 tx_last_pass[1][0][8] = 0
4794 20:12:41.056575 tx_win_center[1][0][9] = 0
4795 20:12:41.059853 tx_first_pass[1][0][9] = 0
4796 20:12:41.059939 tx_last_pass[1][0][9] = 0
4797 20:12:41.063374 tx_win_center[1][0][10] = 0
4798 20:12:41.066715 tx_first_pass[1][0][10] = 0
4799 20:12:41.070242 tx_last_pass[1][0][10] = 0
4800 20:12:41.070330 tx_win_center[1][0][11] = 0
4801 20:12:41.073529 tx_first_pass[1][0][11] = 0
4802 20:12:41.076622 tx_last_pass[1][0][11] = 0
4803 20:12:41.079937 tx_win_center[1][0][12] = 0
4804 20:12:41.080023 tx_first_pass[1][0][12] = 0
4805 20:12:41.083105 tx_last_pass[1][0][12] = 0
4806 20:12:41.086586 tx_win_center[1][0][13] = 0
4807 20:12:41.089766 tx_first_pass[1][0][13] = 0
4808 20:12:41.089871 tx_last_pass[1][0][13] = 0
4809 20:12:41.093453 tx_win_center[1][0][14] = 0
4810 20:12:41.096700 tx_first_pass[1][0][14] = 0
4811 20:12:41.100120 tx_last_pass[1][0][14] = 0
4812 20:12:41.100211 tx_win_center[1][0][15] = 0
4813 20:12:41.103093 tx_first_pass[1][0][15] = 0
4814 20:12:41.106424 tx_last_pass[1][0][15] = 0
4815 20:12:41.109989 tx_win_center[1][1][0] = 0
4816 20:12:41.110095 tx_first_pass[1][1][0] = 0
4817 20:12:41.113163 tx_last_pass[1][1][0] = 0
4818 20:12:41.116545 tx_win_center[1][1][1] = 0
4819 20:12:41.116643 tx_first_pass[1][1][1] = 0
4820 20:12:41.119947 tx_last_pass[1][1][1] = 0
4821 20:12:41.123227 tx_win_center[1][1][2] = 0
4822 20:12:41.126316 tx_first_pass[1][1][2] = 0
4823 20:12:41.126415 tx_last_pass[1][1][2] = 0
4824 20:12:41.129727 tx_win_center[1][1][3] = 0
4825 20:12:41.133250 tx_first_pass[1][1][3] = 0
4826 20:12:41.136465 tx_last_pass[1][1][3] = 0
4827 20:12:41.136551 tx_win_center[1][1][4] = 0
4828 20:12:41.140311 tx_first_pass[1][1][4] = 0
4829 20:12:41.143263 tx_last_pass[1][1][4] = 0
4830 20:12:41.143348 tx_win_center[1][1][5] = 0
4831 20:12:41.146987 tx_first_pass[1][1][5] = 0
4832 20:12:41.150219 tx_last_pass[1][1][5] = 0
4833 20:12:41.153109 tx_win_center[1][1][6] = 0
4834 20:12:41.153193 tx_first_pass[1][1][6] = 0
4835 20:12:41.156603 tx_last_pass[1][1][6] = 0
4836 20:12:41.159885 tx_win_center[1][1][7] = 0
4837 20:12:41.159968 tx_first_pass[1][1][7] = 0
4838 20:12:41.163192 tx_last_pass[1][1][7] = 0
4839 20:12:41.166449 tx_win_center[1][1][8] = 0
4840 20:12:41.169979 tx_first_pass[1][1][8] = 0
4841 20:12:41.170063 tx_last_pass[1][1][8] = 0
4842 20:12:41.173538 tx_win_center[1][1][9] = 0
4843 20:12:41.176664 tx_first_pass[1][1][9] = 0
4844 20:12:41.180057 tx_last_pass[1][1][9] = 0
4845 20:12:41.180205 tx_win_center[1][1][10] = 0
4846 20:12:41.183434 tx_first_pass[1][1][10] = 0
4847 20:12:41.186605 tx_last_pass[1][1][10] = 0
4848 20:12:41.189975 tx_win_center[1][1][11] = 0
4849 20:12:41.190081 tx_first_pass[1][1][11] = 0
4850 20:12:41.193065 tx_last_pass[1][1][11] = 0
4851 20:12:41.196396 tx_win_center[1][1][12] = 0
4852 20:12:41.199930 tx_first_pass[1][1][12] = 0
4853 20:12:41.200060 tx_last_pass[1][1][12] = 0
4854 20:12:41.203541 tx_win_center[1][1][13] = 0
4855 20:12:41.206859 tx_first_pass[1][1][13] = 0
4856 20:12:41.206986 tx_last_pass[1][1][13] = 0
4857 20:12:41.209872 tx_win_center[1][1][14] = 0
4858 20:12:41.213442 tx_first_pass[1][1][14] = 0
4859 20:12:41.216915 tx_last_pass[1][1][14] = 0
4860 20:12:41.216996 tx_win_center[1][1][15] = 0
4861 20:12:41.220092 tx_first_pass[1][1][15] = 0
4862 20:12:41.223096 tx_last_pass[1][1][15] = 0
4863 20:12:41.226458 dump params rx window
4864 20:12:41.226540 rx_firspass[0][0][0] = 0
4865 20:12:41.229860 rx_lastpass[0][0][0] = 0
4866 20:12:41.233239 rx_firspass[0][0][1] = 0
4867 20:12:41.233360 rx_lastpass[0][0][1] = 0
4868 20:12:41.236393 rx_firspass[0][0][2] = 0
4869 20:12:41.239900 rx_lastpass[0][0][2] = 0
4870 20:12:41.239982 rx_firspass[0][0][3] = 0
4871 20:12:41.243210 rx_lastpass[0][0][3] = 0
4872 20:12:41.246373 rx_firspass[0][0][4] = 0
4873 20:12:41.246457 rx_lastpass[0][0][4] = 0
4874 20:12:41.249874 rx_firspass[0][0][5] = 0
4875 20:12:41.253235 rx_lastpass[0][0][5] = 0
4876 20:12:41.256247 rx_firspass[0][0][6] = 0
4877 20:12:41.256328 rx_lastpass[0][0][6] = 0
4878 20:12:41.260128 rx_firspass[0][0][7] = 0
4879 20:12:41.263481 rx_lastpass[0][0][7] = 0
4880 20:12:41.263563 rx_firspass[0][0][8] = 0
4881 20:12:41.266345 rx_lastpass[0][0][8] = 0
4882 20:12:41.269710 rx_firspass[0][0][9] = 0
4883 20:12:41.269791 rx_lastpass[0][0][9] = 0
4884 20:12:41.273190 rx_firspass[0][0][10] = 0
4885 20:12:41.276157 rx_lastpass[0][0][10] = 0
4886 20:12:41.279994 rx_firspass[0][0][11] = 0
4887 20:12:41.280086 rx_lastpass[0][0][11] = 0
4888 20:12:41.283223 rx_firspass[0][0][12] = 0
4889 20:12:41.286482 rx_lastpass[0][0][12] = 0
4890 20:12:41.286562 rx_firspass[0][0][13] = 0
4891 20:12:41.289539 rx_lastpass[0][0][13] = 0
4892 20:12:41.293427 rx_firspass[0][0][14] = 0
4893 20:12:41.293508 rx_lastpass[0][0][14] = 0
4894 20:12:41.296502 rx_firspass[0][0][15] = 0
4895 20:12:41.300068 rx_lastpass[0][0][15] = 0
4896 20:12:41.303049 rx_firspass[0][1][0] = 0
4897 20:12:41.303130 rx_lastpass[0][1][0] = 0
4898 20:12:41.306194 rx_firspass[0][1][1] = 0
4899 20:12:41.309477 rx_lastpass[0][1][1] = 0
4900 20:12:41.309557 rx_firspass[0][1][2] = 0
4901 20:12:41.313225 rx_lastpass[0][1][2] = 0
4902 20:12:41.316442 rx_firspass[0][1][3] = 0
4903 20:12:41.316523 rx_lastpass[0][1][3] = 0
4904 20:12:41.319970 rx_firspass[0][1][4] = 0
4905 20:12:41.322720 rx_lastpass[0][1][4] = 0
4906 20:12:41.322800 rx_firspass[0][1][5] = 0
4907 20:12:41.326408 rx_lastpass[0][1][5] = 0
4908 20:12:41.329567 rx_firspass[0][1][6] = 0
4909 20:12:41.332934 rx_lastpass[0][1][6] = 0
4910 20:12:41.333015 rx_firspass[0][1][7] = 0
4911 20:12:41.336271 rx_lastpass[0][1][7] = 0
4912 20:12:41.339581 rx_firspass[0][1][8] = 0
4913 20:12:41.339661 rx_lastpass[0][1][8] = 0
4914 20:12:41.343129 rx_firspass[0][1][9] = 0
4915 20:12:41.346175 rx_lastpass[0][1][9] = 0
4916 20:12:41.346255 rx_firspass[0][1][10] = 0
4917 20:12:41.349509 rx_lastpass[0][1][10] = 0
4918 20:12:41.352855 rx_firspass[0][1][11] = 0
4919 20:12:41.356243 rx_lastpass[0][1][11] = 0
4920 20:12:41.356323 rx_firspass[0][1][12] = 0
4921 20:12:41.359592 rx_lastpass[0][1][12] = 0
4922 20:12:41.362866 rx_firspass[0][1][13] = 0
4923 20:12:41.362946 rx_lastpass[0][1][13] = 0
4924 20:12:41.366345 rx_firspass[0][1][14] = 0
4925 20:12:41.369849 rx_lastpass[0][1][14] = 0
4926 20:12:41.369930 rx_firspass[0][1][15] = 0
4927 20:12:41.372838 rx_lastpass[0][1][15] = 0
4928 20:12:41.376402 rx_firspass[1][0][0] = 0
4929 20:12:41.379671 rx_lastpass[1][0][0] = 0
4930 20:12:41.379751 rx_firspass[1][0][1] = 0
4931 20:12:41.382761 rx_lastpass[1][0][1] = 0
4932 20:12:41.386156 rx_firspass[1][0][2] = 0
4933 20:12:41.386237 rx_lastpass[1][0][2] = 0
4934 20:12:41.389719 rx_firspass[1][0][3] = 0
4935 20:12:41.392800 rx_lastpass[1][0][3] = 0
4936 20:12:41.392880 rx_firspass[1][0][4] = 0
4937 20:12:41.396205 rx_lastpass[1][0][4] = 0
4938 20:12:41.399442 rx_firspass[1][0][5] = 0
4939 20:12:41.399523 rx_lastpass[1][0][5] = 0
4940 20:12:41.403212 rx_firspass[1][0][6] = 0
4941 20:12:41.406422 rx_lastpass[1][0][6] = 0
4942 20:12:41.406503 rx_firspass[1][0][7] = 0
4943 20:12:41.409533 rx_lastpass[1][0][7] = 0
4944 20:12:41.412903 rx_firspass[1][0][8] = 0
4945 20:12:41.416267 rx_lastpass[1][0][8] = 0
4946 20:12:41.416347 rx_firspass[1][0][9] = 0
4947 20:12:41.419359 rx_lastpass[1][0][9] = 0
4948 20:12:41.422689 rx_firspass[1][0][10] = 0
4949 20:12:41.422776 rx_lastpass[1][0][10] = 0
4950 20:12:41.426146 rx_firspass[1][0][11] = 0
4951 20:12:41.429615 rx_lastpass[1][0][11] = 0
4952 20:12:41.429698 rx_firspass[1][0][12] = 0
4953 20:12:41.433043 rx_lastpass[1][0][12] = 0
4954 20:12:41.436103 rx_firspass[1][0][13] = 0
4955 20:12:41.439541 rx_lastpass[1][0][13] = 0
4956 20:12:41.439623 rx_firspass[1][0][14] = 0
4957 20:12:41.442766 rx_lastpass[1][0][14] = 0
4958 20:12:41.445966 rx_firspass[1][0][15] = 0
4959 20:12:41.446048 rx_lastpass[1][0][15] = 0
4960 20:12:41.449950 rx_firspass[1][1][0] = 0
4961 20:12:41.452733 rx_lastpass[1][1][0] = 0
4962 20:12:41.452846 rx_firspass[1][1][1] = 0
4963 20:12:41.456399 rx_lastpass[1][1][1] = 0
4964 20:12:41.459861 rx_firspass[1][1][2] = 0
4965 20:12:41.463065 rx_lastpass[1][1][2] = 0
4966 20:12:41.463171 rx_firspass[1][1][3] = 0
4967 20:12:41.466272 rx_lastpass[1][1][3] = 0
4968 20:12:41.469687 rx_firspass[1][1][4] = 0
4969 20:12:41.469826 rx_lastpass[1][1][4] = 0
4970 20:12:41.472733 rx_firspass[1][1][5] = 0
4971 20:12:41.476292 rx_lastpass[1][1][5] = 0
4972 20:12:41.476400 rx_firspass[1][1][6] = 0
4973 20:12:41.479447 rx_lastpass[1][1][6] = 0
4974 20:12:41.483094 rx_firspass[1][1][7] = 0
4975 20:12:41.483199 rx_lastpass[1][1][7] = 0
4976 20:12:41.486357 rx_firspass[1][1][8] = 0
4977 20:12:41.489912 rx_lastpass[1][1][8] = 0
4978 20:12:41.490018 rx_firspass[1][1][9] = 0
4979 20:12:41.492919 rx_lastpass[1][1][9] = 0
4980 20:12:41.496103 rx_firspass[1][1][10] = 0
4981 20:12:41.499511 rx_lastpass[1][1][10] = 0
4982 20:12:41.499618 rx_firspass[1][1][11] = 0
4983 20:12:41.502852 rx_lastpass[1][1][11] = 0
4984 20:12:41.506379 rx_firspass[1][1][12] = 0
4985 20:12:41.506504 rx_lastpass[1][1][12] = 0
4986 20:12:41.509487 rx_firspass[1][1][13] = 0
4987 20:12:41.512693 rx_lastpass[1][1][13] = 0
4988 20:12:41.512797 rx_firspass[1][1][14] = 0
4989 20:12:41.516030 rx_lastpass[1][1][14] = 0
4990 20:12:41.519667 rx_firspass[1][1][15] = 0
4991 20:12:41.522756 rx_lastpass[1][1][15] = 0
4992 20:12:41.522863 dump params clk_delay
4993 20:12:41.526739 clk_delay[0] = 0
4994 20:12:41.526845 clk_delay[1] = 0
4995 20:12:41.529410 dump params dqs_delay
4996 20:12:41.529515 dqs_delay[0][0] = 0
4997 20:12:41.532896 dqs_delay[0][1] = 0
4998 20:12:41.533001 dqs_delay[1][0] = 0
4999 20:12:41.536420 dqs_delay[1][1] = 0
5000 20:12:41.539551 dump params delay_cell_unit = 762
5001 20:12:41.542798 mt_set_emi_preloader end
5002 20:12:41.546110 [mt_mem_init] dram size: 0x100000000, rank number: 2
5003 20:12:41.549572 [complex_mem_test] start addr:0x40000000, len:20480
5004 20:12:41.586978 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5005 20:12:41.593744 [complex_mem_test] start addr:0x80000000, len:20480
5006 20:12:41.630138 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5007 20:12:41.636061 [complex_mem_test] start addr:0xc0000000, len:20480
5008 20:12:41.671893 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5009 20:12:41.678791 [complex_mem_test] start addr:0x56000000, len:8192
5010 20:12:41.694942 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5011 20:12:41.695059 ddr_geometry:1
5012 20:12:41.701369 [complex_mem_test] start addr:0x80000000, len:8192
5013 20:12:41.718969 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5014 20:12:41.722425 dram_init: dram init end (result: 0)
5015 20:12:41.728901 Successfully loaded DRAM blobs and ran DRAM calibration
5016 20:12:41.739222 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5017 20:12:41.739310 CBMEM:
5018 20:12:41.742040 IMD: root @ 00000000fffff000 254 entries.
5019 20:12:41.745515 IMD: root @ 00000000ffffec00 62 entries.
5020 20:12:41.752323 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5021 20:12:41.758731 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5022 20:12:41.761816 in-header: 03 a1 00 00 08 00 00 00
5023 20:12:41.765402 in-data: 84 60 60 10 00 00 00 00
5024 20:12:41.768687 Chrome EC: clear events_b mask to 0x0000000020004000
5025 20:12:41.775726 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5026 20:12:41.779120 in-header: 03 fd 00 00 00 00 00 00
5027 20:12:41.779267 in-data:
5028 20:12:41.786239 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5029 20:12:41.786328 CBFS @ 21000 size 3d4000
5030 20:12:41.792657 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5031 20:12:41.795752 CBFS: Locating 'fallback/ramstage'
5032 20:12:41.799397 CBFS: Found @ offset 10d40 size d563
5033 20:12:41.820653 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5034 20:12:41.832530 Accumulated console time in romstage 12813 ms
5035 20:12:41.832646
5036 20:12:41.832740
5037 20:12:41.842598 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5038 20:12:41.846806 ARM64: Exception handlers installed.
5039 20:12:41.846914 ARM64: Testing exception
5040 20:12:41.849390 ARM64: Done test exception
5041 20:12:41.852567 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5042 20:12:41.856068 Manufacturer: ef
5043 20:12:41.859288 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5044 20:12:41.865960 WARNING: RO_VPD is uninitialized or empty.
5045 20:12:41.869867 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5046 20:12:41.872977 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5047 20:12:41.882762 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5048 20:12:41.885746 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5049 20:12:41.892680 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5050 20:12:41.892766 Enumerating buses...
5051 20:12:41.899138 Show all devs... Before device enumeration.
5052 20:12:41.899254 Root Device: enabled 1
5053 20:12:41.902742 CPU_CLUSTER: 0: enabled 1
5054 20:12:41.902835 CPU: 00: enabled 1
5055 20:12:41.905786 Compare with tree...
5056 20:12:41.909071 Root Device: enabled 1
5057 20:12:41.909186 CPU_CLUSTER: 0: enabled 1
5058 20:12:41.912075 CPU: 00: enabled 1
5059 20:12:41.915653 Root Device scanning...
5060 20:12:41.915764 root_dev_scan_bus for Root Device
5061 20:12:41.918951 CPU_CLUSTER: 0 enabled
5062 20:12:41.922179 root_dev_scan_bus for Root Device done
5063 20:12:41.928944 scan_bus: scanning of bus Root Device took 10690 usecs
5064 20:12:41.929029 done
5065 20:12:41.932074 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5066 20:12:41.935809 Allocating resources...
5067 20:12:41.935892 Reading resources...
5068 20:12:41.938958 Root Device read_resources bus 0 link: 0
5069 20:12:41.945489 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5070 20:12:41.945573 CPU: 00 missing read_resources
5071 20:12:41.952131 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5072 20:12:41.955840 Root Device read_resources bus 0 link: 0 done
5073 20:12:41.959102 Done reading resources.
5074 20:12:41.962117 Show resources in subtree (Root Device)...After reading.
5075 20:12:41.965721 Root Device child on link 0 CPU_CLUSTER: 0
5076 20:12:41.969060 CPU_CLUSTER: 0 child on link 0 CPU: 00
5077 20:12:41.978585 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5078 20:12:41.978712 CPU: 00
5079 20:12:41.981982 Setting resources...
5080 20:12:41.985639 Root Device assign_resources, bus 0 link: 0
5081 20:12:41.988988 CPU_CLUSTER: 0 missing set_resources
5082 20:12:41.992022 Root Device assign_resources, bus 0 link: 0
5083 20:12:41.995792 Done setting resources.
5084 20:12:42.002403 Show resources in subtree (Root Device)...After assigning values.
5085 20:12:42.005447 Root Device child on link 0 CPU_CLUSTER: 0
5086 20:12:42.008789 CPU_CLUSTER: 0 child on link 0 CPU: 00
5087 20:12:42.015908 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5088 20:12:42.019242 CPU: 00
5089 20:12:42.019360 Done allocating resources.
5090 20:12:42.025427 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5091 20:12:42.025545 Enabling resources...
5092 20:12:42.028950 done.
5093 20:12:42.032561 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5094 20:12:42.035795 Initializing devices...
5095 20:12:42.035901 Root Device init ...
5096 20:12:42.039315 mainboard_init: Starting display init.
5097 20:12:42.042740 ADC[4]: Raw value=76850 ID=0
5098 20:12:42.065295 anx7625_power_on_init: Init interface.
5099 20:12:42.068355 anx7625_disable_pd_protocol: Disabled PD feature.
5100 20:12:42.074877 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5101 20:12:42.121980 anx7625_start_dp_work: Secure OCM version=00
5102 20:12:42.125035 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5103 20:12:42.142165 sp_tx_get_edid_block: EDID Block = 1
5104 20:12:42.259445 Extracted contents:
5105 20:12:42.262932 header: 00 ff ff ff ff ff ff 00
5106 20:12:42.266691 serial number: 06 af 5c 14 00 00 00 00 00 1a
5107 20:12:42.269506 version: 01 04
5108 20:12:42.272655 basic params: 95 1a 0e 78 02
5109 20:12:42.276178 chroma info: 99 85 95 55 56 92 28 22 50 54
5110 20:12:42.279304 established: 00 00 00
5111 20:12:42.286194 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5112 20:12:42.289790 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5113 20:12:42.295829 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5114 20:12:42.302632 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5115 20:12:42.308987 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5116 20:12:42.312529 extensions: 00
5117 20:12:42.312603 checksum: ae
5118 20:12:42.312677
5119 20:12:42.315744 Manufacturer: AUO Model 145c Serial Number 0
5120 20:12:42.319067 Made week 0 of 2016
5121 20:12:42.319149 EDID version: 1.4
5122 20:12:42.322722 Digital display
5123 20:12:42.326020 6 bits per primary color channel
5124 20:12:42.326094 DisplayPort interface
5125 20:12:42.329430 Maximum image size: 26 cm x 14 cm
5126 20:12:42.332799 Gamma: 220%
5127 20:12:42.332879 Check DPMS levels
5128 20:12:42.335898 Supported color formats: RGB 4:4:4
5129 20:12:42.339785 First detailed timing is preferred timing
5130 20:12:42.342532 Established timings supported:
5131 20:12:42.346191 Standard timings supported:
5132 20:12:42.346263 Detailed timings
5133 20:12:42.352385 Hex of detail: ce1d56ea50001a3030204600009010000018
5134 20:12:42.355780 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5135 20:12:42.359237 0556 0586 05a6 0640 hborder 0
5136 20:12:42.362400 0300 0304 030a 031a vborder 0
5137 20:12:42.366100 -hsync -vsync
5138 20:12:42.369505 Did detailed timing
5139 20:12:42.372739 Hex of detail: 0000000f0000000000000000000000000020
5140 20:12:42.375672 Manufacturer-specified data, tag 15
5141 20:12:42.379526 Hex of detail: 000000fe0041554f0a202020202020202020
5142 20:12:42.382684 ASCII string: AUO
5143 20:12:42.385962 Hex of detail: 000000fe004231313658414230312e34200a
5144 20:12:42.388893 ASCII string: B116XAB01.4
5145 20:12:42.388974 Checksum
5146 20:12:42.392574 Checksum: 0xae (valid)
5147 20:12:42.398697 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5148 20:12:42.398789 DSI data_rate: 457800000 bps
5149 20:12:42.406757 anx7625_parse_edid: set default k value to 0x3d for panel
5150 20:12:42.409926 anx7625_parse_edid: pixelclock(76300).
5151 20:12:42.413009 hactive(1366), hsync(32), hfp(48), hbp(154)
5152 20:12:42.416390 vactive(768), vsync(6), vfp(4), vbp(16)
5153 20:12:42.419722 anx7625_dsi_config: config dsi.
5154 20:12:42.427827 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5155 20:12:42.448814 anx7625_dsi_config: success to config DSI
5156 20:12:42.452462 anx7625_dp_start: MIPI phy setup OK.
5157 20:12:42.455340 [SSUSB] Setting up USB HOST controller...
5158 20:12:42.459021 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5159 20:12:42.462027 [SSUSB] phy power-on done.
5160 20:12:42.465875 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5161 20:12:42.469138 in-header: 03 fc 01 00 00 00 00 00
5162 20:12:42.469225 in-data:
5163 20:12:42.472521 handle_proto3_response: EC response with error code: 1
5164 20:12:42.475766 SPM: pcm index = 1
5165 20:12:42.479424 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5166 20:12:42.482505 CBFS @ 21000 size 3d4000
5167 20:12:42.489216 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5168 20:12:42.492855 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5169 20:12:42.496039 CBFS: Found @ offset 1e7c0 size 1026
5170 20:12:42.502693 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5171 20:12:42.505747 SPM: binary array size = 2988
5172 20:12:42.509347 SPM: version = pcm_allinone_v1.17.2_20180829
5173 20:12:42.512705 SPM binary loaded in 32 msecs
5174 20:12:42.519885 spm_kick_im_to_fetch: ptr = 000000004021eec2
5175 20:12:42.523018 spm_kick_im_to_fetch: len = 2988
5176 20:12:42.523126 SPM: spm_kick_pcm_to_run
5177 20:12:42.526732 SPM: spm_kick_pcm_to_run done
5178 20:12:42.530077 SPM: spm_init done in 52 msecs
5179 20:12:42.533239 Root Device init finished in 494997 usecs
5180 20:12:42.536622 CPU_CLUSTER: 0 init ...
5181 20:12:42.546564 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5182 20:12:42.549880 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5183 20:12:42.553053 CBFS @ 21000 size 3d4000
5184 20:12:42.556839 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5185 20:12:42.560003 CBFS: Locating 'sspm.bin'
5186 20:12:42.563126 CBFS: Found @ offset 208c0 size 41cb
5187 20:12:42.573129 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5188 20:12:42.580716 CPU_CLUSTER: 0 init finished in 42798 usecs
5189 20:12:42.580817 Devices initialized
5190 20:12:42.584179 Show all devs... After init.
5191 20:12:42.587619 Root Device: enabled 1
5192 20:12:42.587733 CPU_CLUSTER: 0: enabled 1
5193 20:12:42.591082 CPU: 00: enabled 1
5194 20:12:42.594161 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5195 20:12:42.597524 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5196 20:12:42.600814 ELOG: NV offset 0x558000 size 0x1000
5197 20:12:42.608389 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5198 20:12:42.615282 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5199 20:12:42.618468 ELOG: Event(17) added with size 13 at 2024-05-28 20:12:42 UTC
5200 20:12:42.621817 out: cmd=0x121: 03 db 21 01 00 00 00 00
5201 20:12:42.625264 in-header: 03 e5 00 00 2c 00 00 00
5202 20:12:42.638607 in-data: 10 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 87 7d 04 00 06 80 00 00 e4 71 05 00 06 80 00 00 76 27 01 00 06 80 00 00 fb 6d 02 00
5203 20:12:42.642052 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5204 20:12:42.645149 in-header: 03 19 00 00 08 00 00 00
5205 20:12:42.648481 in-data: a2 e0 47 00 13 00 00 00
5206 20:12:42.652176 Chrome EC: UHEPI supported
5207 20:12:42.658986 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5208 20:12:42.661580 in-header: 03 e1 00 00 08 00 00 00
5209 20:12:42.664929 in-data: 84 20 60 10 00 00 00 00
5210 20:12:42.668095 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5211 20:12:42.675318 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5212 20:12:42.678082 in-header: 03 e1 00 00 08 00 00 00
5213 20:12:42.681333 in-data: 84 20 60 10 00 00 00 00
5214 20:12:42.688522 ELOG: Event(A1) added with size 10 at 2024-05-28 20:12:42 UTC
5215 20:12:42.694935 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5216 20:12:42.698374 ELOG: Event(A0) added with size 9 at 2024-05-28 20:12:42 UTC
5217 20:12:42.705153 elog_add_boot_reason: Logged dev mode boot
5218 20:12:42.705280 Finalize devices...
5219 20:12:42.708025 Devices finalized
5220 20:12:42.711884 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5221 20:12:42.714981 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5222 20:12:42.721270 ELOG: Event(91) added with size 10 at 2024-05-28 20:12:42 UTC
5223 20:12:42.724741 Writing coreboot table at 0xffeda000
5224 20:12:42.728536 0. 0000000000114000-000000000011efff: RAMSTAGE
5225 20:12:42.735225 1. 0000000040000000-000000004023cfff: RAMSTAGE
5226 20:12:42.738164 2. 000000004023d000-00000000545fffff: RAM
5227 20:12:42.741794 3. 0000000054600000-000000005465ffff: BL31
5228 20:12:42.745033 4. 0000000054660000-00000000ffed9fff: RAM
5229 20:12:42.751976 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5230 20:12:42.754940 6. 0000000100000000-000000013fffffff: RAM
5231 20:12:42.758258 Passing 5 GPIOs to payload:
5232 20:12:42.761726 NAME | PORT | POLARITY | VALUE
5233 20:12:42.765166 write protect | 0x00000096 | low | high
5234 20:12:42.771860 EC in RW | 0x000000b1 | high | undefined
5235 20:12:42.774984 EC interrupt | 0x00000097 | low | undefined
5236 20:12:42.778487 TPM interrupt | 0x00000099 | high | undefined
5237 20:12:42.784914 speaker enable | 0x000000af | high | undefined
5238 20:12:42.788511 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5239 20:12:42.791899 in-header: 03 f7 00 00 02 00 00 00
5240 20:12:42.792045 in-data: 04 00
5241 20:12:42.795427 Board ID: 4
5242 20:12:42.798412 ADC[3]: Raw value=1034629 ID=8
5243 20:12:42.798493 RAM code: 8
5244 20:12:42.798557 SKU ID: 16
5245 20:12:42.802215 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5246 20:12:42.805236 CBFS @ 21000 size 3d4000
5247 20:12:42.811713 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5248 20:12:42.818694 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum ad5f
5249 20:12:42.818777 coreboot table: 940 bytes.
5250 20:12:42.821973 IMD ROOT 0. 00000000fffff000 00001000
5251 20:12:42.828284 IMD SMALL 1. 00000000ffffe000 00001000
5252 20:12:42.831863 CONSOLE 2. 00000000fffde000 00020000
5253 20:12:42.835160 FMAP 3. 00000000fffdd000 0000047c
5254 20:12:42.838389 TIME STAMP 4. 00000000fffdc000 00000910
5255 20:12:42.841761 RAMOOPS 5. 00000000ffedc000 00100000
5256 20:12:42.845083 COREBOOT 6. 00000000ffeda000 00002000
5257 20:12:42.845165 IMD small region:
5258 20:12:42.851628 IMD ROOT 0. 00000000ffffec00 00000400
5259 20:12:42.854884 VBOOT WORK 1. 00000000ffffeb00 00000100
5260 20:12:42.858343 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5261 20:12:42.861793 VPD 3. 00000000ffffea60 0000006c
5262 20:12:42.865011 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5263 20:12:42.871749 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5264 20:12:42.875175 in-header: 03 e1 00 00 08 00 00 00
5265 20:12:42.878322 in-data: 84 20 60 10 00 00 00 00
5266 20:12:42.885297 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5267 20:12:42.885394 CBFS @ 21000 size 3d4000
5268 20:12:42.892270 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5269 20:12:42.895352 CBFS: Locating 'fallback/payload'
5270 20:12:42.899874 CBFS: Found @ offset dc040 size 439a0
5271 20:12:42.990412 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5272 20:12:42.994136 Checking segment from ROM address 0x0000000040003a00
5273 20:12:43.000503 Checking segment from ROM address 0x0000000040003a1c
5274 20:12:43.003603 Loading segment from ROM address 0x0000000040003a00
5275 20:12:43.007062 code (compression=0)
5276 20:12:43.017043 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5277 20:12:43.023926 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5278 20:12:43.027676 it's not compressed!
5279 20:12:43.030377 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5280 20:12:43.036826 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5281 20:12:43.044931 Loading segment from ROM address 0x0000000040003a1c
5282 20:12:43.048266 Entry Point 0x0000000080000000
5283 20:12:43.048349 Loaded segments
5284 20:12:43.054760 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5285 20:12:43.057934 Jumping to boot code at 0000000080000000(00000000ffeda000)
5286 20:12:43.068030 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5287 20:12:43.071861 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5288 20:12:43.075689 CBFS @ 21000 size 3d4000
5289 20:12:43.081483 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5290 20:12:43.084696 CBFS: Locating 'fallback/bl31'
5291 20:12:43.088088 CBFS: Found @ offset 36dc0 size 5820
5292 20:12:43.098866 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5293 20:12:43.102097 Checking segment from ROM address 0x0000000040003a00
5294 20:12:43.108977 Checking segment from ROM address 0x0000000040003a1c
5295 20:12:43.111992 Loading segment from ROM address 0x0000000040003a00
5296 20:12:43.115360 code (compression=1)
5297 20:12:43.121927 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5298 20:12:43.131924 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5299 20:12:43.132050 using LZMA
5300 20:12:43.140819 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5301 20:12:43.147880 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5302 20:12:43.150800 Loading segment from ROM address 0x0000000040003a1c
5303 20:12:43.154187 Entry Point 0x0000000054601000
5304 20:12:43.154293 Loaded segments
5305 20:12:43.157249 NOTICE: MT8183 bl31_setup
5306 20:12:43.164504 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5307 20:12:43.168003 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5308 20:12:43.170890 INFO: [DEVAPC] dump DEVAPC registers:
5309 20:12:43.181131 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5310 20:12:43.187977 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5311 20:12:43.194850 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5312 20:12:43.204532 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5313 20:12:43.211412 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5314 20:12:43.221246 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5315 20:12:43.228017 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5316 20:12:43.238274 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5317 20:12:43.244479 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5318 20:12:43.254445 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5319 20:12:43.261011 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5320 20:12:43.270989 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5321 20:12:43.277614 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5322 20:12:43.284519 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5323 20:12:43.294295 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5324 20:12:43.301075 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5325 20:12:43.307640 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5326 20:12:43.314564 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5327 20:12:43.320913 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5328 20:12:43.331214 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5329 20:12:43.337728 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5330 20:12:43.344305 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5331 20:12:43.347691 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5332 20:12:43.351358 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5333 20:12:43.354122 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5334 20:12:43.357762 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5335 20:12:43.361173 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5336 20:12:43.367757 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5337 20:12:43.370836 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5338 20:12:43.374093 WARNING: region 0:
5339 20:12:43.377439 WARNING: apc:0x168, sa:0x0, ea:0xfff
5340 20:12:43.377522 WARNING: region 1:
5341 20:12:43.384463 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5342 20:12:43.384545 WARNING: region 2:
5343 20:12:43.387813 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5344 20:12:43.390734 WARNING: region 3:
5345 20:12:43.394697 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5346 20:12:43.394780 WARNING: region 4:
5347 20:12:43.397244 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5348 20:12:43.400948 WARNING: region 5:
5349 20:12:43.404028 WARNING: apc:0x0, sa:0x0, ea:0x0
5350 20:12:43.404111 WARNING: region 6:
5351 20:12:43.407569 WARNING: apc:0x0, sa:0x0, ea:0x0
5352 20:12:43.410837 WARNING: region 7:
5353 20:12:43.414056 WARNING: apc:0x0, sa:0x0, ea:0x0
5354 20:12:43.420940 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5355 20:12:43.424112 INFO: SPM: enable SPMC mode
5356 20:12:43.428193 NOTICE: spm_boot_init() start
5357 20:12:43.428299 NOTICE: spm_boot_init() end
5358 20:12:43.434343 INFO: BL31: Initializing runtime services
5359 20:12:43.437728 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5360 20:12:43.444395 INFO: BL31: Preparing for EL3 exit to normal world
5361 20:12:43.447634 INFO: Entry point address = 0x80000000
5362 20:12:43.447764 INFO: SPSR = 0x8
5363 20:12:43.471118
5364 20:12:43.471247
5365 20:12:43.471314
5366 20:12:43.471765 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5367 20:12:43.471866 start: 2.2.4 bootloader-commands (timeout 00:04:24) [common]
5368 20:12:43.471948 Setting prompt string to ['jacuzzi:']
5369 20:12:43.472030 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:24)
5370 20:12:43.474360 Starting depthcharge on Juniper...
5371 20:12:43.474457
5372 20:12:43.477735 vboot_handoff: creating legacy vboot_handoff structure
5373 20:12:43.477817
5374 20:12:43.480694 ec_init(0): CrosEC protocol v3 supported (544, 544)
5375 20:12:43.480775
5376 20:12:43.484524 Wipe memory regions:
5377 20:12:43.484605
5378 20:12:43.487332 [0x00000040000000, 0x00000054600000)
5379 20:12:43.530396
5380 20:12:43.530505 [0x00000054660000, 0x00000080000000)
5381 20:12:43.621478
5382 20:12:43.621624 [0x000000811994a0, 0x000000ffeda000)
5383 20:12:43.881507
5384 20:12:43.881660 [0x00000100000000, 0x00000140000000)
5385 20:12:44.014432
5386 20:12:44.017517 Initializing XHCI USB controller at 0x11200000.
5387 20:12:44.040600
5388 20:12:44.043607 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5389 20:12:44.043690
5390 20:12:44.043756
5391 20:12:44.044098 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5393 20:12:44.144502 jacuzzi: tftpboot 192.168.201.1 14063104/tftp-deploy-6d9fb4rv/kernel/image.itb 14063104/tftp-deploy-6d9fb4rv/kernel/cmdline
5394 20:12:44.144663 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5395 20:12:44.144814 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5396 20:12:44.148959 tftpboot 192.168.201.1 14063104/tftp-deploy-6d9fb4rv/kernel/image.itp-deploy-6d9fb4rv/kernel/cmdline
5397 20:12:44.149043
5398 20:12:44.149107 Waiting for link
5399 20:12:44.553925
5400 20:12:44.554080 R8152: Initializing
5401 20:12:44.554153
5402 20:12:44.558045 Version 9 (ocp_data = 6010)
5403 20:12:44.558132
5404 20:12:44.561197 R8152: Done initializing
5405 20:12:44.561321
5406 20:12:44.561388 Adding net device
5407 20:12:44.946905
5408 20:12:44.947054 done.
5409 20:12:44.947125
5410 20:12:44.947277 MAC: 00:e0:4c:71:a7:1f
5411 20:12:44.947439
5412 20:12:44.949815 Sending DHCP discover... done.
5413 20:12:44.949899
5414 20:12:44.953141 Waiting for reply... done.
5415 20:12:44.953275
5416 20:12:44.956650 Sending DHCP request... done.
5417 20:12:44.956761
5418 20:12:44.962042 Waiting for reply... done.
5419 20:12:44.962138
5420 20:12:44.962204 My ip is 192.168.201.23
5421 20:12:44.962266
5422 20:12:44.965389 The DHCP server ip is 192.168.201.1
5423 20:12:44.965493
5424 20:12:44.972348 TFTP server IP predefined by user: 192.168.201.1
5425 20:12:44.972443
5426 20:12:44.978285 Bootfile predefined by user: 14063104/tftp-deploy-6d9fb4rv/kernel/image.itb
5427 20:12:44.978384
5428 20:12:44.981936 Sending tftp read request... done.
5429 20:12:44.982033
5430 20:12:44.985616 Waiting for the transfer...
5431 20:12:44.985705
5432 20:12:45.255460 00000000 ################################################################
5433 20:12:45.255649
5434 20:12:45.527013 00080000 ################################################################
5435 20:12:45.527168
5436 20:12:45.784172 00100000 ################################################################
5437 20:12:45.784338
5438 20:12:46.045621 00180000 ################################################################
5439 20:12:46.045768
5440 20:12:46.298436 00200000 ################################################################
5441 20:12:46.298591
5442 20:12:46.556354 00280000 ################################################################
5443 20:12:46.556507
5444 20:12:46.813753 00300000 ################################################################
5445 20:12:46.813903
5446 20:12:47.067731 00380000 ################################################################
5447 20:12:47.067881
5448 20:12:47.319755 00400000 ################################################################
5449 20:12:47.319908
5450 20:12:47.573325 00480000 ################################################################
5451 20:12:47.573472
5452 20:12:47.828906 00500000 ################################################################
5453 20:12:47.829092
5454 20:12:48.084926 00580000 ################################################################
5455 20:12:48.085102
5456 20:12:48.340278 00600000 ################################################################
5457 20:12:48.340421
5458 20:12:48.600578 00680000 ################################################################
5459 20:12:48.600729
5460 20:12:48.861207 00700000 ################################################################
5461 20:12:48.861367
5462 20:12:49.110746 00780000 ################################################################
5463 20:12:49.110895
5464 20:12:49.361089 00800000 ################################################################
5465 20:12:49.361236
5466 20:12:49.625874 00880000 ################################################################
5467 20:12:49.626026
5468 20:12:49.892397 00900000 ################################################################
5469 20:12:49.892548
5470 20:12:50.159865 00980000 ################################################################
5471 20:12:50.160013
5472 20:12:50.433537 00a00000 ################################################################
5473 20:12:50.433683
5474 20:12:50.721545 00a80000 ################################################################
5475 20:12:50.721698
5476 20:12:50.988971 00b00000 ################################################################
5477 20:12:50.989173
5478 20:12:51.266965 00b80000 ################################################################
5479 20:12:51.267119
5480 20:12:51.539450 00c00000 ################################################################
5481 20:12:51.539631
5482 20:12:51.811936 00c80000 ################################################################
5483 20:12:51.812092
5484 20:12:52.096476 00d00000 ################################################################
5485 20:12:52.096637
5486 20:12:52.380238 00d80000 ################################################################
5487 20:12:52.380394
5488 20:12:52.649861 00e00000 ################################################################
5489 20:12:52.650037
5490 20:12:52.911512 00e80000 ################################################################
5491 20:12:52.911685
5492 20:12:53.170838 00f00000 ################################################################
5493 20:12:53.170992
5494 20:12:53.439908 00f80000 ################################################################
5495 20:12:53.440059
5496 20:12:53.706218 01000000 ################################################################
5497 20:12:53.706371
5498 20:12:53.977403 01080000 ################################################################
5499 20:12:53.977583
5500 20:12:54.262715 01100000 ################################################################
5501 20:12:54.262886
5502 20:12:54.534984 01180000 ################################################################
5503 20:12:54.535133
5504 20:12:54.805788 01200000 ################################################################
5505 20:12:54.805938
5506 20:12:55.064115 01280000 ################################################################
5507 20:12:55.064258
5508 20:12:55.328539 01300000 ################################################################
5509 20:12:55.328689
5510 20:12:55.581853 01380000 ################################################################
5511 20:12:55.582003
5512 20:12:55.842947 01400000 ################################################################
5513 20:12:55.843129
5514 20:12:56.113423 01480000 ################################################################
5515 20:12:56.113572
5516 20:12:56.378639 01500000 ################################################################
5517 20:12:56.378787
5518 20:12:56.657587 01580000 ################################################################
5519 20:12:56.657732
5520 20:12:56.926430 01600000 ################################################################
5521 20:12:56.926587
5522 20:12:57.185955 01680000 ################################################################
5523 20:12:57.186111
5524 20:12:57.452948 01700000 ################################################################
5525 20:12:57.453098
5526 20:12:57.704738 01780000 ################################################################
5527 20:12:57.704938
5528 20:12:57.959628 01800000 ################################################################
5529 20:12:57.959827
5530 20:12:58.220911 01880000 ################################################################
5531 20:12:58.221099
5532 20:12:58.472987 01900000 ################################################################
5533 20:12:58.473183
5534 20:12:58.726585 01980000 ################################################################
5535 20:12:58.726807
5536 20:12:58.998743 01a00000 ################################################################
5537 20:12:58.998937
5538 20:12:59.248070 01a80000 ################################################################
5539 20:12:59.248267
5540 20:12:59.499908 01b00000 ################################################################
5541 20:12:59.500104
5542 20:12:59.762733 01b80000 ################################################################
5543 20:12:59.762930
5544 20:13:00.031276 01c00000 ################################################################
5545 20:13:00.031476
5546 20:13:00.286577 01c80000 ################################################################
5547 20:13:00.286769
5548 20:13:00.535507 01d00000 ################################################################
5549 20:13:00.535705
5550 20:13:00.774314 01d80000 ################################################################
5551 20:13:00.774516
5552 20:13:00.949529 01e00000 ############################################### done.
5553 20:13:00.949709
5554 20:13:00.953153 The bootfile was 31839498 bytes long.
5555 20:13:00.953309
5556 20:13:00.956389 Sending tftp read request... done.
5557 20:13:00.956518
5558 20:13:00.959870 Waiting for the transfer...
5559 20:13:00.960008
5560 20:13:00.962957 00000000 # done.
5561 20:13:00.963076
5562 20:13:00.969962 Command line loaded dynamically from TFTP file: 14063104/tftp-deploy-6d9fb4rv/kernel/cmdline
5563 20:13:00.970107
5564 20:13:00.996750 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5565 20:13:00.996903
5566 20:13:00.997005 Loading FIT.
5567 20:13:00.997097
5568 20:13:00.999390 Image ramdisk-1 has 18718451 bytes.
5569 20:13:00.999505
5570 20:13:01.003446 Image fdt-1 has 57695 bytes.
5571 20:13:01.003613
5572 20:13:01.006431 Image kernel-1 has 13061303 bytes.
5573 20:13:01.006549
5574 20:13:01.013389 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5575 20:13:01.013523
5576 20:13:01.026438 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5577 20:13:01.026589
5578 20:13:01.030029 Choosing best match conf-1 for compat google,juniper-sku16.
5579 20:13:01.032863
5580 20:13:01.036225 Connected to device vid:did:rid of 1ae0:0028:00
5581 20:13:01.048693
5582 20:13:01.051588 tpm_get_response: command 0x17b, return code 0x0
5583 20:13:01.051699
5584 20:13:01.055048 tpm_cleanup: add release locality here.
5585 20:13:01.055145
5586 20:13:01.058727 Shutting down all USB controllers.
5587 20:13:01.058851
5588 20:13:01.062069 Removing current net device
5589 20:13:01.062208
5590 20:13:01.065493 Exiting depthcharge with code 4 at timestamp: 33960747
5591 20:13:01.065611
5592 20:13:01.068542 LZMA decompressing kernel-1 to 0x80193568
5593 20:13:01.068631
5594 20:13:01.071706 LZMA decompressing kernel-1 to 0x40000000
5595 20:13:02.932126
5596 20:13:02.932286 jumping to kernel
5597 20:13:02.932752 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5598 20:13:02.932853 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5599 20:13:02.932930 Setting prompt string to ['Linux version [0-9]']
5600 20:13:02.933000 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5601 20:13:02.933068 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5602 20:13:03.007845
5603 20:13:03.011090 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5604 20:13:03.014348 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5605 20:13:03.014467 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5606 20:13:03.014543 Setting prompt string to []
5607 20:13:03.014620 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5608 20:13:03.014693 Using line separator: #'\n'#
5609 20:13:03.014752 No login prompt set.
5610 20:13:03.014869 Parsing kernel messages
5611 20:13:03.014937 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5612 20:13:03.015041 [login-action] Waiting for messages, (timeout 00:04:05)
5613 20:13:03.015109 Waiting using forced prompt support (timeout 00:02:02)
5614 20:13:03.033780 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j208563-arm64-gcc-10-defconfig-arm64-chromebook-j5dkg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024
5615 20:13:03.037395 [ 0.000000] random: crng init done
5616 20:13:03.043944 [ 0.000000] Machine model: Google juniper sku16 board
5617 20:13:03.047265 [ 0.000000] efi: UEFI not found.
5618 20:13:03.053839 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5619 20:13:03.063550 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5620 20:13:03.070449 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5621 20:13:03.073769 [ 0.000000] printk: bootconsole [mtk8250] enabled
5622 20:13:03.082677 [ 0.000000] NUMA: No NUMA configuration found
5623 20:13:03.089021 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5624 20:13:03.095744 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5625 20:13:03.095896 [ 0.000000] Zone ranges:
5626 20:13:03.102382 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5627 20:13:03.105804 [ 0.000000] DMA32 empty
5628 20:13:03.112337 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5629 20:13:03.115697 [ 0.000000] Movable zone start for each node
5630 20:13:03.118929 [ 0.000000] Early memory node ranges
5631 20:13:03.125568 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5632 20:13:03.132013 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5633 20:13:03.138625 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5634 20:13:03.145374 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5635 20:13:03.152264 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5636 20:13:03.158865 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5637 20:13:03.174797 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5638 20:13:03.181842 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5639 20:13:03.188101 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5640 20:13:03.191437 [ 0.000000] psci: probing for conduit method from DT.
5641 20:13:03.198279 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5642 20:13:03.201563 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5643 20:13:03.208029 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5644 20:13:03.211771 [ 0.000000] psci: SMC Calling Convention v1.1
5645 20:13:03.217721 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5646 20:13:03.221239 [ 0.000000] Detected VIPT I-cache on CPU0
5647 20:13:03.228279 [ 0.000000] CPU features: detected: GIC system register CPU interface
5648 20:13:03.234477 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5649 20:13:03.241242 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5650 20:13:03.248079 [ 0.000000] CPU features: detected: ARM erratum 845719
5651 20:13:03.251619 [ 0.000000] alternatives: applying boot alternatives
5652 20:13:03.254861 [ 0.000000] Fallback order for Node 0: 0
5653 20:13:03.261112 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5654 20:13:03.264707 [ 0.000000] Policy zone: Normal
5655 20:13:03.291376 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5656 20:13:03.304468 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5657 20:13:03.314382 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5658 20:13:03.320647 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5659 20:13:03.327466 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5660 20:13:03.330778 <6>[ 0.000000] software IO TLB: area num 8.
5661 20:13:03.358504 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5662 20:13:03.416911 <6>[ 0.000000] Memory: 3896924K/4191232K available (18112K kernel code, 4120K rwdata, 22500K rodata, 8512K init, 616K bss, 261540K reserved, 32768K cma-reserved)
5663 20:13:03.422978 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5664 20:13:03.429630 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5665 20:13:03.433178 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5666 20:13:03.439550 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5667 20:13:03.446288 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5668 20:13:03.449454 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5669 20:13:03.459346 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5670 20:13:03.466550 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5671 20:13:03.469303 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5672 20:13:03.481097 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5673 20:13:03.488093 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5674 20:13:03.491034 <6>[ 0.000000] GICv3: 640 SPIs implemented
5675 20:13:03.494824 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5676 20:13:03.501111 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5677 20:13:03.504570 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5678 20:13:03.511072 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5679 20:13:03.520927 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5680 20:13:03.534627 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5681 20:13:03.541088 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5682 20:13:03.553284 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5683 20:13:03.566302 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5684 20:13:03.572792 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5685 20:13:03.579637 <6>[ 0.009471] Console: colour dummy device 80x25
5686 20:13:03.583481 <6>[ 0.014506] printk: console [tty1] enabled
5687 20:13:03.593296 <6>[ 0.018895] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5688 20:13:03.599967 <6>[ 0.029359] pid_max: default: 32768 minimum: 301
5689 20:13:03.603377 <6>[ 0.034240] LSM: Security Framework initializing
5690 20:13:03.613281 <6>[ 0.039153] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5691 20:13:03.619841 <6>[ 0.046777] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5692 20:13:03.626259 <4>[ 0.055651] cacheinfo: Unable to detect cache hierarchy for CPU 0
5693 20:13:03.636475 <6>[ 0.062278] cblist_init_generic: Setting adjustable number of callback queues.
5694 20:13:03.642991 <6>[ 0.069723] cblist_init_generic: Setting shift to 3 and lim to 1.
5695 20:13:03.649548 <6>[ 0.076076] cblist_init_generic: Setting adjustable number of callback queues.
5696 20:13:03.656187 <6>[ 0.083521] cblist_init_generic: Setting shift to 3 and lim to 1.
5697 20:13:03.659592 <6>[ 0.089921] rcu: Hierarchical SRCU implementation.
5698 20:13:03.665959 <6>[ 0.094946] rcu: Max phase no-delay instances is 1000.
5699 20:13:03.673178 <6>[ 0.102876] EFI services will not be available.
5700 20:13:03.676942 <6>[ 0.107826] smp: Bringing up secondary CPUs ...
5701 20:13:03.687083 <6>[ 0.113061] Detected VIPT I-cache on CPU1
5702 20:13:03.693473 <4>[ 0.113107] cacheinfo: Unable to detect cache hierarchy for CPU 1
5703 20:13:03.700500 <6>[ 0.113116] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5704 20:13:03.707307 <6>[ 0.113146] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5705 20:13:03.710432 <6>[ 0.113628] Detected VIPT I-cache on CPU2
5706 20:13:03.716867 <4>[ 0.113659] cacheinfo: Unable to detect cache hierarchy for CPU 2
5707 20:13:03.723750 <6>[ 0.113664] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5708 20:13:03.730040 <6>[ 0.113677] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5709 20:13:03.733454 <6>[ 0.114125] Detected VIPT I-cache on CPU3
5710 20:13:03.740312 <4>[ 0.114155] cacheinfo: Unable to detect cache hierarchy for CPU 3
5711 20:13:03.746711 <6>[ 0.114160] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5712 20:13:03.756545 <6>[ 0.114171] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5713 20:13:03.759996 <6>[ 0.114746] CPU features: detected: Spectre-v2
5714 20:13:03.763717 <6>[ 0.114755] CPU features: detected: Spectre-BHB
5715 20:13:03.770138 <6>[ 0.114759] CPU features: detected: ARM erratum 858921
5716 20:13:03.773121 <6>[ 0.114765] Detected VIPT I-cache on CPU4
5717 20:13:03.780104 <4>[ 0.114812] cacheinfo: Unable to detect cache hierarchy for CPU 4
5718 20:13:03.786597 <6>[ 0.114820] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5719 20:13:03.793505 <6>[ 0.114828] arch_timer: Enabling local workaround for ARM erratum 858921
5720 20:13:03.799922 <6>[ 0.114838] arch_timer: CPU4: Trapping CNTVCT access
5721 20:13:03.806549 <6>[ 0.114846] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5722 20:13:03.809911 <6>[ 0.115333] Detected VIPT I-cache on CPU5
5723 20:13:03.816468 <4>[ 0.115374] cacheinfo: Unable to detect cache hierarchy for CPU 5
5724 20:13:03.823177 <6>[ 0.115380] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5725 20:13:03.829834 <6>[ 0.115386] arch_timer: Enabling local workaround for ARM erratum 858921
5726 20:13:03.836503 <6>[ 0.115392] arch_timer: CPU5: Trapping CNTVCT access
5727 20:13:03.843363 <6>[ 0.115398] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5728 20:13:03.846230 <6>[ 0.115932] Detected VIPT I-cache on CPU6
5729 20:13:03.853041 <4>[ 0.115977] cacheinfo: Unable to detect cache hierarchy for CPU 6
5730 20:13:03.859732 <6>[ 0.115983] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5731 20:13:03.869647 <6>[ 0.115991] arch_timer: Enabling local workaround for ARM erratum 858921
5732 20:13:03.872987 <6>[ 0.115997] arch_timer: CPU6: Trapping CNTVCT access
5733 20:13:03.879321 <6>[ 0.116002] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5734 20:13:03.882817 <6>[ 0.116533] Detected VIPT I-cache on CPU7
5735 20:13:03.889369 <4>[ 0.116577] cacheinfo: Unable to detect cache hierarchy for CPU 7
5736 20:13:03.895955 <6>[ 0.116583] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5737 20:13:03.906014 <6>[ 0.116590] arch_timer: Enabling local workaround for ARM erratum 858921
5738 20:13:03.909146 <6>[ 0.116596] arch_timer: CPU7: Trapping CNTVCT access
5739 20:13:03.915895 <6>[ 0.116602] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5740 20:13:03.919561 <6>[ 0.116650] smp: Brought up 1 node, 8 CPUs
5741 20:13:03.925944 <6>[ 0.355517] SMP: Total of 8 processors activated.
5742 20:13:03.932685 <6>[ 0.360454] CPU features: detected: 32-bit EL0 Support
5743 20:13:03.935854 <6>[ 0.365825] CPU features: detected: 32-bit EL1 Support
5744 20:13:03.942650 <6>[ 0.371191] CPU features: detected: CRC32 instructions
5745 20:13:03.945795 <6>[ 0.376618] CPU: All CPU(s) started at EL2
5746 20:13:03.952479 <6>[ 0.380961] alternatives: applying system-wide alternatives
5747 20:13:03.959006 <6>[ 0.388951] devtmpfs: initialized
5748 20:13:03.971512 <6>[ 0.397896] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5749 20:13:03.982003 <6>[ 0.407846] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5750 20:13:03.984972 <6>[ 0.415574] pinctrl core: initialized pinctrl subsystem
5751 20:13:03.992994 <6>[ 0.422678] DMI not present or invalid.
5752 20:13:03.999763 <6>[ 0.427041] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5753 20:13:04.006412 <6>[ 0.433946] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5754 20:13:04.016032 <6>[ 0.441474] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5755 20:13:04.022846 <6>[ 0.449723] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5756 20:13:04.029661 <6>[ 0.457900] audit: initializing netlink subsys (disabled)
5757 20:13:04.036085 <5>[ 0.463602] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5758 20:13:04.042771 <6>[ 0.464577] thermal_sys: Registered thermal governor 'step_wise'
5759 20:13:04.049412 <6>[ 0.471568] thermal_sys: Registered thermal governor 'power_allocator'
5760 20:13:04.053063 <6>[ 0.477864] cpuidle: using governor menu
5761 20:13:04.059532 <6>[ 0.488828] NET: Registered PF_QIPCRTR protocol family
5762 20:13:04.066275 <6>[ 0.494323] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5763 20:13:04.073215 <6>[ 0.501420] ASID allocator initialised with 32768 entries
5764 20:13:04.079563 <6>[ 0.508193] Serial: AMBA PL011 UART driver
5765 20:13:04.089142 <4>[ 0.518594] Trying to register duplicate clock ID: 113
5766 20:13:04.149156 <6>[ 0.575383] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5767 20:13:04.163247 <6>[ 0.589715] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5768 20:13:04.166558 <6>[ 0.599460] KASLR enabled
5769 20:13:04.181867 <6>[ 0.607465] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5770 20:13:04.187769 <6>[ 0.614467] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5771 20:13:04.194458 <6>[ 0.620943] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5772 20:13:04.201189 <6>[ 0.627935] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5773 20:13:04.207649 <6>[ 0.634409] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5774 20:13:04.214925 <6>[ 0.641399] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5775 20:13:04.221100 <6>[ 0.647873] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5776 20:13:04.227855 <6>[ 0.654863] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5777 20:13:04.231275 <6>[ 0.662437] ACPI: Interpreter disabled.
5778 20:13:04.240478 <6>[ 0.670409] iommu: Default domain type: Translated
5779 20:13:04.247181 <6>[ 0.675515] iommu: DMA domain TLB invalidation policy: strict mode
5780 20:13:04.251134 <5>[ 0.682144] SCSI subsystem initialized
5781 20:13:04.257314 <6>[ 0.686558] usbcore: registered new interface driver usbfs
5782 20:13:04.263844 <6>[ 0.692285] usbcore: registered new interface driver hub
5783 20:13:04.267269 <6>[ 0.697825] usbcore: registered new device driver usb
5784 20:13:04.274443 <6>[ 0.704123] pps_core: LinuxPPS API ver. 1 registered
5785 20:13:04.284105 <6>[ 0.709308] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5786 20:13:04.287965 <6>[ 0.718632] PTP clock support registered
5787 20:13:04.291105 <6>[ 0.722884] EDAC MC: Ver: 3.0.0
5788 20:13:04.298974 <6>[ 0.728538] FPGA manager framework
5789 20:13:04.302272 <6>[ 0.732225] Advanced Linux Sound Architecture Driver Initialized.
5790 20:13:04.306171 <6>[ 0.738969] vgaarb: loaded
5791 20:13:04.312527 <6>[ 0.742097] clocksource: Switched to clocksource arch_sys_counter
5792 20:13:04.319359 <5>[ 0.748527] VFS: Disk quotas dquot_6.6.0
5793 20:13:04.325819 <6>[ 0.752702] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5794 20:13:04.329366 <6>[ 0.759875] pnp: PnP ACPI: disabled
5795 20:13:04.337032 <6>[ 0.766729] NET: Registered PF_INET protocol family
5796 20:13:04.344165 <6>[ 0.771963] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5797 20:13:04.355578 <6>[ 0.781875] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5798 20:13:04.365741 <6>[ 0.790630] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5799 20:13:04.372118 <6>[ 0.798578] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5800 20:13:04.378996 <6>[ 0.806809] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5801 20:13:04.385272 <6>[ 0.814901] TCP: Hash tables configured (established 32768 bind 32768)
5802 20:13:04.395383 <6>[ 0.821728] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5803 20:13:04.402166 <6>[ 0.828698] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5804 20:13:04.408878 <6>[ 0.836177] NET: Registered PF_UNIX/PF_LOCAL protocol family
5805 20:13:04.415583 <6>[ 0.842270] RPC: Registered named UNIX socket transport module.
5806 20:13:04.418831 <6>[ 0.848413] RPC: Registered udp transport module.
5807 20:13:04.422001 <6>[ 0.853337] RPC: Registered tcp transport module.
5808 20:13:04.429214 <6>[ 0.858260] RPC: Registered tcp NFSv4.1 backchannel transport module.
5809 20:13:04.435578 <6>[ 0.864911] PCI: CLS 0 bytes, default 64
5810 20:13:04.438774 <6>[ 0.869161] Unpacking initramfs...
5811 20:13:04.448647 <6>[ 0.873221] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5812 20:13:04.455320 <6>[ 0.881922] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5813 20:13:04.461858 <6>[ 0.890811] kvm [1]: IPA Size Limit: 40 bits
5814 20:13:04.465171 <6>[ 0.897141] kvm [1]: vgic-v2@c420000
5815 20:13:04.472030 <6>[ 0.900967] kvm [1]: GIC system register CPU interface enabled
5816 20:13:04.475040 <6>[ 0.907143] kvm [1]: vgic interrupt IRQ18
5817 20:13:04.482036 <6>[ 0.911507] kvm [1]: Hyp mode initialized successfully
5818 20:13:04.488447 <5>[ 0.917801] Initialise system trusted keyrings
5819 20:13:04.495385 <6>[ 0.922572] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5820 20:13:04.502843 <6>[ 0.932526] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5821 20:13:04.509599 <5>[ 0.938942] NFS: Registering the id_resolver key type
5822 20:13:04.512873 <5>[ 0.944244] Key type id_resolver registered
5823 20:13:04.519453 <5>[ 0.948655] Key type id_legacy registered
5824 20:13:04.526142 <6>[ 0.952954] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5825 20:13:04.533062 <6>[ 0.959869] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5826 20:13:04.539549 <6>[ 0.967599] 9p: Installing v9fs 9p2000 file system support
5827 20:13:04.567144 <5>[ 0.996679] Key type asymmetric registered
5828 20:13:04.570798 <5>[ 1.001012] Asymmetric key parser 'x509' registered
5829 20:13:04.580471 <6>[ 1.006160] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5830 20:13:04.583547 <6>[ 1.013767] io scheduler mq-deadline registered
5831 20:13:04.586763 <6>[ 1.018521] io scheduler kyber registered
5832 20:13:04.609702 <6>[ 1.039188] EINJ: ACPI disabled.
5833 20:13:04.616106 <4>[ 1.042950] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5834 20:13:04.654027 <6>[ 1.083301] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5835 20:13:04.662249 <6>[ 1.091761] printk: console [ttyS0] disabled
5836 20:13:04.690064 <6>[ 1.116405] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5837 20:13:04.697214 <6>[ 1.125873] printk: console [ttyS0] enabled
5838 20:13:04.700321 <6>[ 1.125873] printk: console [ttyS0] enabled
5839 20:13:04.703529 <6>[ 1.134793] printk: bootconsole [mtk8250] disabled
5840 20:13:04.710364 <6>[ 1.134793] printk: bootconsole [mtk8250] disabled
5841 20:13:04.720321 <3>[ 1.145313] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5842 20:13:04.727148 <3>[ 1.153687] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5843 20:13:04.756181 <6>[ 1.182077] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5844 20:13:04.762414 <6>[ 1.191716] serial serial0: tty port ttyS1 registered
5845 20:13:04.769225 <6>[ 1.198280] SuperH (H)SCI(F) driver initialized
5846 20:13:04.772380 <6>[ 1.203759] msm_serial: driver initialized
5847 20:13:04.787803 <6>[ 1.214021] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5848 20:13:04.797768 <6>[ 1.222618] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5849 20:13:04.805070 <6>[ 1.231187] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5850 20:13:04.814290 <6>[ 1.239751] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5851 20:13:04.820948 <6>[ 1.248405] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5852 20:13:04.830977 <6>[ 1.257066] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5853 20:13:04.841035 <6>[ 1.265802] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5854 20:13:04.847542 <6>[ 1.274538] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5855 20:13:04.857474 <6>[ 1.283101] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5856 20:13:04.867236 <6>[ 1.291902] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5857 20:13:04.874781 <4>[ 1.304259] cacheinfo: Unable to detect cache hierarchy for CPU 0
5858 20:13:04.884110 <6>[ 1.313603] loop: module loaded
5859 20:13:04.895719 <6>[ 1.325461] vsim1: Bringing 1800000uV into 2700000-2700000uV
5860 20:13:04.913776 <6>[ 1.343413] megasas: 07.719.03.00-rc1
5861 20:13:04.922760 <6>[ 1.352125] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5862 20:13:04.931949 <6>[ 1.361468] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5863 20:13:04.948848 <6>[ 1.378304] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5864 20:13:05.005418 <6>[ 1.428565] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5865 20:13:05.064255 <6>[ 1.493795] Freeing initrd memory: 18272K
5866 20:13:05.079359 <4>[ 1.505623] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5867 20:13:05.086424 <4>[ 1.514850] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
5868 20:13:05.092812 <4>[ 1.521548] Hardware name: Google juniper sku16 board (DT)
5869 20:13:05.096081 <4>[ 1.527287] Call trace:
5870 20:13:05.099662 <4>[ 1.529987] dump_backtrace.part.0+0xe0/0xf0
5871 20:13:05.102985 <4>[ 1.534523] show_stack+0x18/0x30
5872 20:13:05.106308 <4>[ 1.538095] dump_stack_lvl+0x68/0x84
5873 20:13:05.109381 <4>[ 1.542016] dump_stack+0x18/0x34
5874 20:13:05.116201 <4>[ 1.545586] sysfs_warn_dup+0x64/0x80
5875 20:13:05.119507 <4>[ 1.549507] sysfs_do_create_link_sd+0xf0/0x100
5876 20:13:05.122911 <4>[ 1.554294] sysfs_create_link+0x20/0x40
5877 20:13:05.129126 <4>[ 1.558473] bus_add_device+0x68/0x10c
5878 20:13:05.132528 <4>[ 1.562480] device_add+0x340/0x7ac
5879 20:13:05.135946 <4>[ 1.566223] of_device_add+0x44/0x60
5880 20:13:05.139380 <4>[ 1.570057] of_platform_device_create_pdata+0x90/0x120
5881 20:13:05.146207 <4>[ 1.575539] of_platform_bus_create+0x170/0x370
5882 20:13:05.149594 <4>[ 1.580325] of_platform_populate+0x50/0xfc
5883 20:13:05.155912 <4>[ 1.584765] parse_mtd_partitions+0x1dc/0x510
5884 20:13:05.159372 <4>[ 1.589378] mtd_device_parse_register+0xf8/0x2e0
5885 20:13:05.162953 <4>[ 1.594335] spi_nor_probe+0x21c/0x2f0
5886 20:13:05.166112 <4>[ 1.598341] spi_mem_probe+0x6c/0xb0
5887 20:13:05.169696 <4>[ 1.602174] spi_probe+0x84/0xe4
5888 20:13:05.176265 <4>[ 1.605656] really_probe+0xbc/0x2e0
5889 20:13:05.179669 <4>[ 1.609486] __driver_probe_device+0x78/0x11c
5890 20:13:05.182931 <4>[ 1.614097] driver_probe_device+0xd8/0x160
5891 20:13:05.189221 <4>[ 1.618536] __device_attach_driver+0xb8/0x134
5892 20:13:05.192870 <4>[ 1.623235] bus_for_each_drv+0x78/0xd0
5893 20:13:05.196072 <4>[ 1.627325] __device_attach+0xa8/0x1c0
5894 20:13:05.202912 <4>[ 1.631415] device_initial_probe+0x14/0x20
5895 20:13:05.206124 <4>[ 1.635853] bus_probe_device+0x9c/0xa4
5896 20:13:05.209707 <4>[ 1.639943] device_add+0x3ac/0x7ac
5897 20:13:05.213191 <4>[ 1.643686] __spi_add_device+0x78/0x120
5898 20:13:05.216114 <4>[ 1.647863] spi_add_device+0x40/0x7c
5899 20:13:05.222731 <4>[ 1.651781] spi_register_controller+0x610/0xad0
5900 20:13:05.226505 <4>[ 1.656653] devm_spi_register_controller+0x4c/0xa4
5901 20:13:05.230188 <4>[ 1.661786] mtk_spi_probe+0x3f8/0x650
5902 20:13:05.236438 <4>[ 1.665790] platform_probe+0x68/0xe0
5903 20:13:05.239544 <4>[ 1.669708] really_probe+0xbc/0x2e0
5904 20:13:05.242991 <4>[ 1.673538] __driver_probe_device+0x78/0x11c
5905 20:13:05.246313 <4>[ 1.678149] driver_probe_device+0xd8/0x160
5906 20:13:05.253028 <4>[ 1.682586] __driver_attach+0x94/0x19c
5907 20:13:05.256275 <4>[ 1.686677] bus_for_each_dev+0x70/0xd0
5908 20:13:05.259555 <4>[ 1.690766] driver_attach+0x24/0x30
5909 20:13:05.262977 <4>[ 1.694596] bus_add_driver+0x154/0x20c
5910 20:13:05.269430 <4>[ 1.698686] driver_register+0x78/0x130
5911 20:13:05.272964 <4>[ 1.702777] __platform_driver_register+0x28/0x34
5912 20:13:05.276049 <4>[ 1.707736] mtk_spi_driver_init+0x1c/0x28
5913 20:13:05.282756 <4>[ 1.712090] do_one_initcall+0x50/0x1d0
5914 20:13:05.286090 <4>[ 1.716180] kernel_init_freeable+0x21c/0x288
5915 20:13:05.289437 <4>[ 1.720793] kernel_init+0x24/0x12c
5916 20:13:05.292773 <4>[ 1.724538] ret_from_fork+0x10/0x20
5917 20:13:05.303976 <6>[ 1.733418] tun: Universal TUN/TAP device driver, 1.6
5918 20:13:05.307171 <6>[ 1.739705] thunder_xcv, ver 1.0
5919 20:13:05.310694 <6>[ 1.743232] thunder_bgx, ver 1.0
5920 20:13:05.313671 <6>[ 1.746735] nicpf, ver 1.0
5921 20:13:05.324746 <6>[ 1.751092] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5922 20:13:05.327941 <6>[ 1.758575] hns3: Copyright (c) 2017 Huawei Corporation.
5923 20:13:05.334810 <6>[ 1.764173] hclge is initializing
5924 20:13:05.338330 <6>[ 1.767757] e1000: Intel(R) PRO/1000 Network Driver
5925 20:13:05.344677 <6>[ 1.772892] e1000: Copyright (c) 1999-2006 Intel Corporation.
5926 20:13:05.348185 <6>[ 1.778912] e1000e: Intel(R) PRO/1000 Network Driver
5927 20:13:05.354803 <6>[ 1.784132] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5928 20:13:05.361649 <6>[ 1.790325] igb: Intel(R) Gigabit Ethernet Network Driver
5929 20:13:05.368046 <6>[ 1.795980] igb: Copyright (c) 2007-2014 Intel Corporation.
5930 20:13:05.374963 <6>[ 1.801821] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5931 20:13:05.381692 <6>[ 1.808344] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5932 20:13:05.384957 <6>[ 1.814893] sky2: driver version 1.30
5933 20:13:05.392008 <6>[ 1.820131] usbcore: registered new device driver r8152-cfgselector
5934 20:13:05.397912 <6>[ 1.826672] usbcore: registered new interface driver r8152
5935 20:13:05.404338 <6>[ 1.832507] VFIO - User Level meta-driver version: 0.3
5936 20:13:05.411221 <6>[ 1.840293] mtu3 11201000.usb: uwk - reg:0x420, version:101
5937 20:13:05.418298 <4>[ 1.846168] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5938 20:13:05.424750 <6>[ 1.853437] mtu3 11201000.usb: dr_mode: 1, drd: auto
5939 20:13:05.431309 <6>[ 1.858662] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5940 20:13:05.434861 <6>[ 1.864846] mtu3 11201000.usb: usb3-drd: 0
5941 20:13:05.441618 <6>[ 1.870401] mtu3 11201000.usb: xHCI platform device register success...
5942 20:13:05.452872 <4>[ 1.879017] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5943 20:13:05.459628 <6>[ 1.886985] xhci-mtk 11200000.usb: xHCI Host Controller
5944 20:13:05.466341 <6>[ 1.892493] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5945 20:13:05.472696 <6>[ 1.900234] xhci-mtk 11200000.usb: USB3 root hub has no ports
5946 20:13:05.479308 <6>[ 1.906243] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5947 20:13:05.486034 <6>[ 1.915669] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5948 20:13:05.492690 <6>[ 1.921747] xhci-mtk 11200000.usb: xHCI Host Controller
5949 20:13:05.499728 <6>[ 1.927236] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5950 20:13:05.506148 <6>[ 1.934894] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5951 20:13:05.509624 <6>[ 1.941720] hub 1-0:1.0: USB hub found
5952 20:13:05.516351 <6>[ 1.945748] hub 1-0:1.0: 1 port detected
5953 20:13:05.526128 <6>[ 1.951109] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5954 20:13:05.529482 <6>[ 1.959740] hub 2-0:1.0: USB hub found
5955 20:13:05.536056 <3>[ 1.963795] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5956 20:13:05.543186 <6>[ 1.971688] usbcore: registered new interface driver usb-storage
5957 20:13:05.549723 <6>[ 1.978269] usbcore: registered new device driver onboard-usb-hub
5958 20:13:05.560087 <4>[ 1.986195] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5959 20:13:05.568760 <6>[ 1.998428] mt6397-rtc mt6358-rtc: registered as rtc0
5960 20:13:05.579176 <6>[ 2.003910] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-28T20:13:05 UTC (1716927185)
5961 20:13:05.582229 <6>[ 2.013783] i2c_dev: i2c /dev entries driver
5962 20:13:05.594223 <6>[ 2.020191] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5963 20:13:05.604060 <6>[ 2.028511] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5964 20:13:05.607566 <6>[ 2.037414] i2c 4-0058: Fixed dependency cycle(s) with /panel
5965 20:13:05.617546 <6>[ 2.043446] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5966 20:13:05.623730 <3>[ 2.050910] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5967 20:13:05.641526 <6>[ 2.067904] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
5968 20:13:05.649786 <6>[ 2.079372] cpu cpu0: EM: created perf domain
5969 20:13:05.659634 <6>[ 2.084848] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5970 20:13:05.666508 <6>[ 2.096134] cpu cpu4: EM: created perf domain
5971 20:13:05.673672 <6>[ 2.103148] sdhci: Secure Digital Host Controller Interface driver
5972 20:13:05.680417 <6>[ 2.109604] sdhci: Copyright(c) Pierre Ossman
5973 20:13:05.687256 <6>[ 2.115004] Synopsys Designware Multimedia Card Interface Driver
5974 20:13:05.693521 <6>[ 2.115557] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5975 20:13:05.696858 <6>[ 2.122054] sdhci-pltfm: SDHCI platform and OF driver helper
5976 20:13:05.705530 <6>[ 2.134645] ledtrig-cpu: registered to indicate activity on CPUs
5977 20:13:05.713123 <6>[ 2.142337] usbcore: registered new interface driver usbhid
5978 20:13:05.716504 <6>[ 2.148175] usbhid: USB HID core driver
5979 20:13:05.726903 <6>[ 2.152463] spi_master spi2: will run message pump with realtime priority
5980 20:13:05.730465 <4>[ 2.152591] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5981 20:13:05.740902 <4>[ 2.166829] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5982 20:13:05.751088 <6>[ 2.172243] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5983 20:13:05.770673 <6>[ 2.190283] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5984 20:13:05.777431 <4>[ 2.200877] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5985 20:13:05.780834 <6>[ 2.205296] cros-ec-spi spi2.0: Chrome EC device registered
5986 20:13:05.795122 <4>[ 2.221458] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5987 20:13:05.802128 <6>[ 2.231428] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5988 20:13:05.811976 <4>[ 2.234429] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5989 20:13:05.815190 <6>[ 2.237742] mmc0: new HS400 MMC card at address 0001
5990 20:13:05.821710 <4>[ 2.246233] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5991 20:13:05.828471 <6>[ 2.257324] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5992 20:13:05.836216 <6>[ 2.265686] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5993 20:13:05.842953 <6>[ 2.266597] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5994 20:13:05.849814 <6>[ 2.274445] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5995 20:13:05.856605 <6>[ 2.281790] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5996 20:13:05.863190 <6>[ 2.284961] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5997 20:13:05.873090 <6>[ 2.295876] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5998 20:13:05.879833 <6>[ 2.298536] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5999 20:13:05.886737 <6>[ 2.309919] NET: Registered PF_PACKET protocol family
6000 20:13:05.896255 <6>[ 2.319082] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6001 20:13:05.903183 <6>[ 2.320420] 9pnet: Installing 9P2000 support
6002 20:13:05.913294 <6>[ 2.332564] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6003 20:13:05.916203 <5>[ 2.337056] Key type dns_resolver registered
6004 20:13:05.923420 <6>[ 2.352109] registered taskstats version 1
6005 20:13:05.926622 <5>[ 2.356478] Loading compiled-in X.509 certificates
6006 20:13:05.956119 <6>[ 2.382209] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6007 20:13:05.966785 <3>[ 2.392481] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6008 20:13:05.991999 <4>[ 2.418270] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6009 20:13:06.005782 <6>[ 2.428792] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6010 20:13:06.015676 <6>[ 2.440296] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6011 20:13:06.028895 <3>[ 2.451536] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6012 20:13:06.044277 <3>[ 2.467320] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6013 20:13:06.050971 <3>[ 2.479832] debugfs: File 'Playback' in directory 'dapm' already present!
6014 20:13:06.057772 <3>[ 2.486885] debugfs: File 'Capture' in directory 'dapm' already present!
6015 20:13:06.074951 <6>[ 2.497873] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6016 20:13:06.085451 <6>[ 2.511729] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6017 20:13:06.095481 <6>[ 2.520312] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6018 20:13:06.102146 <6>[ 2.528835] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6019 20:13:06.112192 <6>[ 2.537354] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6020 20:13:06.115171 <6>[ 2.541617] hub 1-1:1.0: USB hub found
6021 20:13:06.125174 <6>[ 2.545868] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6022 20:13:06.128750 <6>[ 2.550314] hub 1-1:1.0: 3 ports detected
6023 20:13:06.135367 <6>[ 2.558378] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6024 20:13:06.145253 <6>[ 2.558383] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6025 20:13:06.152104 <6>[ 2.580395] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6026 20:13:06.158494 <6>[ 2.587910] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6027 20:13:06.165607 <6>[ 2.595238] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6028 20:13:06.176314 <6>[ 2.602539] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6029 20:13:06.183084 <6>[ 2.609970] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6030 20:13:06.189352 <6>[ 2.618217] panfrost 13040000.gpu: clock rate = 511999970
6031 20:13:06.199731 <6>[ 2.623902] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6032 20:13:06.206024 <6>[ 2.634183] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6033 20:13:06.216345 <6>[ 2.642204] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6034 20:13:06.229416 <6>[ 2.650638] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6035 20:13:06.236014 <6>[ 2.662717] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6036 20:13:06.247194 <6>[ 2.673477] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6037 20:13:06.257096 <6>[ 2.682590] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6038 20:13:06.267380 <6>[ 2.691754] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6039 20:13:06.273956 <6>[ 2.700883] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6040 20:13:06.283774 <6>[ 2.710010] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6041 20:13:06.293502 <6>[ 2.719309] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6042 20:13:06.303788 <6>[ 2.728609] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6043 20:13:06.313538 <6>[ 2.738082] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6044 20:13:06.324274 <6>[ 2.747556] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6045 20:13:06.330367 <6>[ 2.756682] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6046 20:13:06.404039 <6>[ 2.829904] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6047 20:13:06.413964 <6>[ 2.838831] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6048 20:13:06.424684 <6>[ 2.850562] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6049 20:13:06.440077 <6>[ 2.866134] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6050 20:13:07.122709 <6>[ 3.058616] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6051 20:13:07.133072 <4>[ 3.175320] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6052 20:13:07.139162 <4>[ 3.175339] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6053 20:13:07.145807 <6>[ 3.224344] r8152 1-1.2:1.0 eth0: v1.12.13
6054 20:13:07.152619 <6>[ 3.306125] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6055 20:13:07.159006 <6>[ 3.532309] Console: switching to colour frame buffer device 170x48
6056 20:13:07.165713 <6>[ 3.592962] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6057 20:13:07.183367 <6>[ 3.609536] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6058 20:13:07.189920 <6>[ 3.617815] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6059 20:13:08.414926 <6>[ 4.844416] r8152 1-1.2:1.0 eth0: carrier on
6060 20:13:10.900842 <5>[ 4.866133] Sending DHCP requests .., OK
6061 20:13:10.907268 <6>[ 7.334454] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6062 20:13:10.910534 <6>[ 7.342904] IP-Config: Complete:
6063 20:13:10.923853 <6>[ 7.346474] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6064 20:13:10.930479 <6>[ 7.357375] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6065 20:13:10.940565 <6>[ 7.366854] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6066 20:13:10.943823 <6>[ 7.366864] nameserver0=192.168.201.1
6067 20:13:10.950680 <6>[ 7.379265] clk: Disabling unused clocks
6068 20:13:10.954418 <6>[ 7.384381] ALSA device list:
6069 20:13:10.961726 <6>[ 7.391010] #0: mt8183_mt6358_ts3a227_max98357
6070 20:13:10.973266 <6>[ 7.402650] Freeing unused kernel memory: 8512K
6071 20:13:10.980667 <6>[ 7.410251] Run /init as init process
6072 20:13:10.992763 Loading, please wait...
6073 20:13:11.029144 Starting systemd-udevd version 252.22-1~deb12u1
6074 20:13:11.346378 <3>[ 7.775980] thermal_sys: Failed to find 'trips' node
6075 20:13:11.357040 <4>[ 7.781822] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6076 20:13:11.363511 <3>[ 7.783148] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6077 20:13:11.370117 <3>[ 7.783163] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6078 20:13:11.377002 <3>[ 7.784251] mtk-scp 10500000.scp: invalid resource
6079 20:13:11.383315 <6>[ 7.784309] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6080 20:13:11.393581 <3>[ 7.790631] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6081 20:13:11.399862 <6>[ 7.794615] remoteproc remoteproc0: scp is available
6082 20:13:11.406696 <4>[ 7.794693] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6083 20:13:11.413438 <6>[ 7.794700] remoteproc remoteproc0: powering up scp
6084 20:13:11.423329 <4>[ 7.794714] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6085 20:13:11.430098 <3>[ 7.794718] remoteproc remoteproc0: request_firmware failed: -2
6086 20:13:11.436711 <4>[ 7.795401] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6087 20:13:11.443085 <4>[ 7.797786] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6088 20:13:11.449631 <3>[ 7.800547] thermal_sys: Failed to find 'trips' node
6089 20:13:11.456775 <3>[ 7.806321] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6090 20:13:11.467613 <3>[ 7.811386] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6091 20:13:11.481078 <3>[ 7.818917] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6092 20:13:11.490733 <3>[ 7.828918] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6093 20:13:11.500844 <3>[ 7.829893] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6094 20:13:11.507312 <3>[ 7.829917] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6095 20:13:11.517240 <3>[ 7.829926] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6096 20:13:11.524214 <3>[ 7.834133] elan_i2c 2-0015: Error applying setting, reverse things back
6097 20:13:11.534206 <3>[ 7.838511] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6098 20:13:11.540633 <3>[ 7.838525] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6099 20:13:11.550604 <3>[ 7.838534] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6100 20:13:11.557464 <3>[ 7.838543] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6101 20:13:11.567022 <3>[ 7.838551] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6102 20:13:11.577091 <3>[ 7.838604] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6103 20:13:11.584032 <4>[ 7.842581] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6104 20:13:11.593828 <6>[ 7.856957] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6105 20:13:11.600486 <6>[ 7.857042] cs_system_cfg: CoreSight Configuration manager initialised
6106 20:13:11.603806 <6>[ 7.863202] mc: Linux media interface: v0.10
6107 20:13:11.613927 <6>[ 7.871865] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6108 20:13:11.623534 <6>[ 7.930196] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6109 20:13:11.630071 <6>[ 7.934750] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6110 20:13:11.636831 <6>[ 7.953852] videodev: Linux video capture interface: v2.00
6111 20:13:11.646823 <5>[ 7.955588] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6112 20:13:11.653842 <6>[ 7.959472] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6113 20:13:11.656805 <6>[ 7.968357] Bluetooth: Core ver 2.22
6114 20:13:11.663356 <5>[ 7.973717] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6115 20:13:11.673654 <5>[ 7.974149] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6116 20:13:11.684334 <4>[ 7.974213] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6117 20:13:11.687794 <6>[ 7.974222] cfg80211: failed to load regulatory.db
6118 20:13:11.697711 <6>[ 7.976672] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6119 20:13:11.704547 <6>[ 7.985058] NET: Registered PF_BLUETOOTH protocol family
6120 20:13:11.710960 <6>[ 7.993583] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6121 20:13:11.718159 <6>[ 8.001959] Bluetooth: HCI device and connection manager initialized
6122 20:13:11.725390 <6>[ 8.001975] Bluetooth: HCI socket layer initialized
6123 20:13:11.732040 <6>[ 8.001981] Bluetooth: L2CAP socket layer initialized
6124 20:13:11.738312 <6>[ 8.001991] Bluetooth: SCO socket layer initialized
6125 20:13:11.745217 <6>[ 8.029532] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6126 20:13:11.751573 <6>[ 8.035296] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6127 20:13:11.758537 <6>[ 8.035466] Bluetooth: HCI UART driver ver 2.3
6128 20:13:11.765065 <6>[ 8.035470] Bluetooth: HCI UART protocol H4 registered
6129 20:13:11.768292 <6>[ 8.035507] Bluetooth: HCI UART protocol LL registered
6130 20:13:11.775155 <6>[ 8.035522] Bluetooth: HCI UART protocol Three-wire (H5) registered
6131 20:13:11.785797 <6>[ 8.035834] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6132 20:13:11.792413 <6>[ 8.035837] Bluetooth: HCI UART protocol Broadcom registered
6133 20:13:11.795523 <6>[ 8.035858] Bluetooth: HCI UART protocol QCA registered
6134 20:13:11.802475 <6>[ 8.035869] Bluetooth: HCI UART protocol Marvell registered
6135 20:13:11.809152 <6>[ 8.036290] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6136 20:13:11.815887 <6>[ 8.036568] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6137 20:13:11.826218 Begin: Loading e<6>[ 8.036595] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6138 20:13:11.832713 ssential drivers<6>[ 8.037763] Bluetooth: hci0: setting up ROME/QCA6390
6139 20:13:11.836575 ... done.
6140 20:13:11.846058 <6>[ 8.058408] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6141 20:13:11.856528 Begin: Running /<6>[ 8.066223] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6142 20:13:11.862924 scripts/init-pre<6>[ 8.072139] usbcore: registered new interface driver uvcvideo
6143 20:13:11.866150 mount ... done.
6144 20:13:11.873071 <6>[ 8.079946] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6145 20:13:11.873163
6146 20:13:11.883129 Begin: Mounting<6>[ 8.080072] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6147 20:13:11.893178 root file syste<6>[ 8.080084] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6148 20:13:11.906045 m ... Begin: Run<6>[ 8.080418] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6149 20:13:11.915760 ning /scripts/nf<6>[ 8.230400] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6150 20:13:11.915858 s-top ... done.
6151 20:13:11.925778 <4>[ 8.232415] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6152 20:13:11.929538 <4>[ 8.232415] Fallback method does not support PEC.
6153 20:13:11.929665
6154 20:13:11.939231 Begin: Running <3>[ 8.249324] Bluetooth: hci0: Frame reassembly failed (-84)
6155 20:13:11.945823 /scripts/nfs-pre<3>[ 8.253843] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6156 20:13:11.952984 mount ... Waiting up to 60 secs for any ethernet to become available
6157 20:13:11.956412 Device /sys/class/net/eth0 found
6158 20:13:11.956529 done.
6159 20:13:11.965930 Begin: Waiting up to 180 secs for any network device to become available ... done.
6160 20:13:11.981145 <3>[ 8.407108] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6161 20:13:12.016820 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6162 20:13:12.050626 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6163 20:13:12.056999 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6164 20:13:12.063785 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6165 20:13:12.070458 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6166 20:13:12.077240 domain : lava-rack
6167 20:13:12.080353 rootserver: 192.168.201.1 rootpath:
6168 20:13:12.084014 filename :
6169 20:13:12.090878 <6>[ 8.518958] Bluetooth: hci0: QCA Product ID :0x00000008
6170 20:13:12.096928 <6>[ 8.526607] Bluetooth: hci0: QCA SOC Version :0x00000044
6171 20:13:12.105669 <6>[ 8.534617] Bluetooth: hci0: QCA ROM Version :0x00000302
6172 20:13:12.113123 <6>[ 8.542671] Bluetooth: hci0: QCA Patch Version:0x00000111
6173 20:13:12.122132 <6>[ 8.551419] Bluetooth: hci0: QCA controller version 0x00440302
6174 20:13:12.133817 <6>[ 8.560013] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6175 20:13:12.144115 <4>[ 8.569214] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6176 20:13:12.154437 <3>[ 8.580527] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6177 20:13:12.161026 <3>[ 8.590576] Bluetooth: hci0: QCA Failed to download patch (-2)
6178 20:13:12.174847 <6>[ 8.600855] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6179 20:13:12.193108 done.
6180 20:13:12.200766 Begin: Running /scripts/nfs-bottom ... done.
6181 20:13:12.214132 Begin: Running /scripts/init-bottom ... done.
6182 20:13:12.264550 <4>[ 8.689970] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6183 20:13:12.284358 <4>[ 8.710369] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6184 20:13:12.298812 <4>[ 8.725003] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6185 20:13:12.307062 <4>[ 8.736244] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6186 20:13:13.533509 <6>[ 9.963002] NET: Registered PF_INET6 protocol family
6187 20:13:13.544965 <6>[ 9.974438] Segment Routing with IPv6
6188 20:13:13.551620 <6>[ 9.980877] In-situ OAM (IOAM) with IPv6
6189 20:13:13.723007 <30>[ 10.125358] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6190 20:13:13.740689 <30>[ 10.169781] systemd[1]: Detected architecture arm64.
6191 20:13:13.750639
6192 20:13:13.753447 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6193 20:13:13.753536
6194 20:13:13.777872 <30>[ 10.207227] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6195 20:13:14.781368 <30>[ 11.207474] systemd[1]: Queued start job for default target graphical.target.
6196 20:13:14.822055 <30>[ 11.248037] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6197 20:13:14.835080 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6198 20:13:14.854157 <30>[ 11.280404] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6199 20:13:14.867940 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6200 20:13:14.886445 <30>[ 11.312497] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6201 20:13:14.900742 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6202 20:13:14.917993 <30>[ 11.343723] systemd[1]: Created slice user.slice - User and Session Slice.
6203 20:13:14.929890 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6204 20:13:14.952344 <30>[ 11.374708] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6205 20:13:14.965044 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6206 20:13:14.987913 <30>[ 11.410523] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6207 20:13:15.000021 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6208 20:13:15.026425 <30>[ 11.442446] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6209 20:13:15.045816 <30>[ 11.471540] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6210 20:13:15.053255 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6211 20:13:15.072801 <30>[ 11.498283] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6212 20:13:15.084946 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6213 20:13:15.104198 <30>[ 11.530343] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6214 20:13:15.118339 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6215 20:13:15.133207 <30>[ 11.562372] systemd[1]: Reached target paths.target - Path Units.
6216 20:13:15.147254 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6217 20:13:15.164236 <30>[ 11.590297] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6218 20:13:15.176382 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6219 20:13:15.188749 <30>[ 11.618246] systemd[1]: Reached target slices.target - Slice Units.
6220 20:13:15.203865 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6221 20:13:15.217088 <30>[ 11.646304] systemd[1]: Reached target swap.target - Swaps.
6222 20:13:15.227941 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6223 20:13:15.248274 <30>[ 11.674343] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6224 20:13:15.261448 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6225 20:13:15.280567 <30>[ 11.706698] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6226 20:13:15.294207 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6227 20:13:15.316146 <30>[ 11.741497] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6228 20:13:15.328840 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6229 20:13:15.350063 <30>[ 11.776018] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6230 20:13:15.363710 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6231 20:13:15.381292 <30>[ 11.807049] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6232 20:13:15.393363 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6233 20:13:15.414192 <30>[ 11.840130] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6234 20:13:15.427793 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6235 20:13:15.447296 <30>[ 11.873381] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6236 20:13:15.460785 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6237 20:13:15.477030 <30>[ 11.902895] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6238 20:13:15.490101 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6239 20:13:15.532287 <30>[ 11.958540] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6240 20:13:15.544871 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6241 20:13:15.557839 <30>[ 11.984175] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6242 20:13:15.571267 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6243 20:13:15.591553 <30>[ 12.017791] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6244 20:13:15.603138 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6245 20:13:15.627450 <30>[ 12.046853] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6246 20:13:15.669274 <30>[ 12.095411] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6247 20:13:15.682653 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6248 20:13:15.706679 <30>[ 12.132769] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6249 20:13:15.718571 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6250 20:13:15.756709 <30>[ 12.182663] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6251 20:13:15.769121 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6252 20:13:15.794339 <30>[ 12.220480] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6253 20:13:15.808575 Startin<6>[ 12.232640] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6254 20:13:15.812245 g [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6255 20:13:15.839028 <30>[ 12.264702] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6256 20:13:15.853125 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6257 20:13:15.893134 <30>[ 12.318791] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6258 20:13:15.906314 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6259 20:13:15.930072 <30>[ 12.356234] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6260 20:13:15.943170 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6261 20:13:15.958987 <6>[ 12.388503] fuse: init (API version 7.37)
6262 20:13:15.988859 <30>[ 12.415051] systemd[1]: Starting systemd-journald.service - Journal Service...
6263 20:13:15.999404 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6264 20:13:16.027314 <30>[ 12.453072] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6265 20:13:16.038893 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6266 20:13:16.079988 <30>[ 12.502951] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6267 20:13:16.091408 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6268 20:13:16.113155 <30>[ 12.539318] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6269 20:13:16.125873 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6270 20:13:16.152177 <30>[ 12.577730] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6271 20:13:16.161508 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6272 20:13:16.183778 <30>[ 12.611949] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6273 20:13:16.193719 <3>[ 12.617163] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6274 20:13:16.207697 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - H<3>[ 12.635138] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6275 20:13:16.210870 uge Pages File System.
6276 20:13:16.227922 <3>[ 12.653340] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6277 20:13:16.238320 <30>[ 12.663106] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6278 20:13:16.245142 <3>[ 12.668556] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6279 20:13:16.263348 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 12.687010] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6280 20:13:16.263471 File System.
6281 20:13:16.279146 <3>[ 12.704455] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6282 20:13:16.286623 <30>[ 12.713620] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6283 20:13:16.296461 <3>[ 12.720209] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6284 20:13:16.316180 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 12.741265] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6285 20:13:16.316294 File System.
6286 20:13:16.334984 <30>[ 12.759270] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6287 20:13:16.344795 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6288 20:13:16.361543 <30>[ 12.787406] systemd[1]: Started systemd-journald.service - Journal Service.
6289 20:13:16.372309 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6290 20:13:16.394554 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6291 20:13:16.415590 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6292 20:13:16.435611 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6293 20:13:16.455293 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6294 20:13:16.474865 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6295 20:13:16.494829 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6296 20:13:16.515067 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6297 20:13:16.534877 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6298 20:13:16.553620 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6299 20:13:16.577605 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6300 20:13:16.637157 <4>[ 13.055797] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6301 20:13:16.648537 <3>[ 13.073498] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6302 20:13:16.654959 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6303 20:13:16.678441 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6304 20:13:16.701244 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6305 20:13:16.724873 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6306 20:13:16.754217 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables..<46>[ 13.178640] systemd-journald[319]: Received client request to flush runtime journal.
6307 20:13:16.754359 .
6308 20:13:16.782897 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6309 20:13:16.810288 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6310 20:13:16.829897 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6311 20:13:16.850369 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6312 20:13:16.870627 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6313 20:13:17.543643 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6314 20:13:17.896115 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6315 20:13:17.938540 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6316 20:13:18.224379 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6317 20:13:18.342448 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6318 20:13:18.365595 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6319 20:13:18.385043 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6320 20:13:18.441251 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6321 20:13:18.467574 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6322 20:13:18.718457 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6323 20:13:18.777045 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6324 20:13:18.793191 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6325 20:13:18.860026 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6326 20:13:19.051481 <4>[ 15.479985] power_supply_show_property: 4 callbacks suppressed
6327 20:13:19.061971 <3>[ 15.480001] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 20:13:19.073695 <3>[ 15.486120] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6329 20:13:19.080570 <3>[ 15.505142] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6330 20:13:19.098323 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 15.522532] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6331 20:13:19.098415 d-backlight.
6332 20:13:19.113124 <3>[ 15.538544] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 20:13:19.128089 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Sup<3>[ 15.554295] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 20:13:19.128225 port.
6335 20:13:19.144922 <3>[ 15.570845] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 20:13:19.161949 <3>[ 15.587705] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6337 20:13:19.177075 <3>[ 15.602619] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6338 20:13:19.192018 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0..<3>[ 15.617615] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6339 20:13:19.192222 .
6340 20:13:19.277601 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6341 20:13:19.302934 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6342 20:13:19.369157 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6343 20:13:19.413207 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6344 20:13:19.496806 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6345 20:13:19.514205 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6346 20:13:19.601595 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6347 20:13:19.629991 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6348 20:13:19.655599 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6349 20:13:19.689115 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6350 20:13:19.711406 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6351 20:13:19.734725 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6352 20:13:19.754712 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6353 20:13:19.779122 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6354 20:13:19.808849 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6355 20:13:19.827111 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6356 20:13:19.853854 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6357 20:13:19.874151 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6358 20:13:19.899672 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6359 20:13:19.921800 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6360 20:13:19.937844 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6361 20:13:19.961408 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6362 20:13:19.985869 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6363 20:13:20.005829 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6364 20:13:20.025433 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6365 20:13:20.045085 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6366 20:13:20.061898 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6367 20:13:20.082569 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6368 20:13:20.133239 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6369 20:13:20.149108 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6370 20:13:20.183283 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6371 20:13:20.251915 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6372 20:13:20.283540 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6373 20:13:20.307039 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6374 20:13:20.328281 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6375 20:13:20.420545 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6376 20:13:20.471849 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6377 20:13:20.499594 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6378 20:13:20.517736 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6379 20:13:20.557478 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6380 20:13:20.579633 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6381 20:13:20.627994 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6382 20:13:20.651359 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6383 20:13:20.671931 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6384 20:13:20.713300 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6385 20:13:20.813071 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6386 20:13:20.906467
6387 20:13:20.908834 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6388 20:13:20.909306
6389 20:13:20.912345 debian-bookworm-arm64 login: root (automatic login)
6390 20:13:20.912756
6391 20:13:21.220353 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024 aarch64
6392 20:13:21.220501
6393 20:13:21.227065 The programs included with the Debian GNU/Linux system are free software;
6394 20:13:21.233565 the exact distribution terms for each program are described in the
6395 20:13:21.236794 individual files in /usr/share/doc/*/copyright.
6396 20:13:21.236877
6397 20:13:21.243624 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6398 20:13:21.246538 permitted by applicable law.
6399 20:13:22.359220 Matched prompt #10: / #
6401 20:13:22.359546 Setting prompt string to ['/ #']
6402 20:13:22.359660 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6404 20:13:22.359905 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6405 20:13:22.360042 start: 2.2.6 expect-shell-connection (timeout 00:03:45) [common]
6406 20:13:22.360155 Setting prompt string to ['/ #']
6407 20:13:22.360252 Forcing a shell prompt, looking for ['/ #']
6409 20:13:22.410551 / #
6410 20:13:22.410691 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6411 20:13:22.410803 Waiting using forced prompt support (timeout 00:02:30)
6412 20:13:22.416626
6413 20:13:22.416904 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6414 20:13:22.417034 start: 2.2.7 export-device-env (timeout 00:03:45) [common]
6416 20:13:22.517433 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe'
6417 20:13:22.522586 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14063104/extract-nfsrootfs-93m93_pe'
6419 20:13:22.623258 / # export NFS_SERVER_IP='192.168.201.1'
6420 20:13:22.629135 export NFS_SERVER_IP='192.168.201.1'
6421 20:13:22.629951 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6422 20:13:22.630419 end: 2.2 depthcharge-retry (duration 00:01:15) [common]
6423 20:13:22.630868 end: 2 depthcharge-action (duration 00:01:15) [common]
6424 20:13:22.631315 start: 3 lava-test-retry (timeout 00:08:06) [common]
6425 20:13:22.631742 start: 3.1 lava-test-shell (timeout 00:08:06) [common]
6426 20:13:22.632124 Using namespace: common
6428 20:13:22.733122 / # #
6429 20:13:22.733447 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6430 20:13:22.738765 #
6431 20:13:22.739135 Using /lava-14063104
6433 20:13:22.839680 / # export SHELL=/bin/bash
6434 20:13:22.845051 export SHELL=/bin/bash
6436 20:13:22.945735 / # . /lava-14063104/environment
6437 20:13:22.952135 . /lava-14063104/environment
6439 20:13:23.059356 / # /lava-14063104/bin/lava-test-runner /lava-14063104/0
6440 20:13:23.059893 Test shell timeout: 10s (minimum of the action and connection timeout)
6441 20:13:23.065632 /lava-14063104/bin/lava-test-runner /lava-14063104/0
6442 20:13:23.337406 + export TESTRUN_ID=0_timesync-off
6443 20:13:23.340970 + TESTRUN_ID=0_timesync-off
6444 20:13:23.343729 + cd /lava-14063104/0/tests/0_timesync-off
6445 20:13:23.347375 ++ cat uuid
6446 20:13:23.350237 + UUID=14063104_1.6.2.3.1
6447 20:13:23.350319 + set +x
6448 20:13:23.357041 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14063104_1.6.2.3.1>
6449 20:13:23.357319 Received signal: <STARTRUN> 0_timesync-off 14063104_1.6.2.3.1
6450 20:13:23.357393 Starting test lava.0_timesync-off (14063104_1.6.2.3.1)
6451 20:13:23.357480 Skipping test definition patterns.
6452 20:13:23.360639 + systemctl stop systemd-timesyncd
6453 20:13:23.431559 + set +x
6454 20:13:23.434416 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14063104_1.6.2.3.1>
6455 20:13:23.434686 Received signal: <ENDRUN> 0_timesync-off 14063104_1.6.2.3.1
6456 20:13:23.434780 Ending use of test pattern.
6457 20:13:23.434846 Ending test lava.0_timesync-off (14063104_1.6.2.3.1), duration 0.08
6459 20:13:23.511902 + export TESTRUN_ID=1_kselftest-tpm2
6460 20:13:23.515338 + TESTRUN_ID=1_kselftest-tpm2
6461 20:13:23.521608 + cd /lava-14063104/0/tests/1_kselftest-tpm2
6462 20:13:23.521692 ++ cat uuid
6463 20:13:23.524941 + UUID=14063104_1.6.2.3.5
6464 20:13:23.525024 + set +x
6465 20:13:23.528385 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14063104_1.6.2.3.5>
6466 20:13:23.528641 Received signal: <STARTRUN> 1_kselftest-tpm2 14063104_1.6.2.3.5
6467 20:13:23.528713 Starting test lava.1_kselftest-tpm2 (14063104_1.6.2.3.5)
6468 20:13:23.528795 Skipping test definition patterns.
6469 20:13:23.531800 + cd ./automated/linux/kselftest/
6470 20:13:23.558066 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6471 20:13:23.591286 INFO: install_deps skipped
6472 20:13:24.093360 --2024-05-28 20:13:24-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6473 20:13:24.100191 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6474 20:13:24.224476 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6475 20:13:24.351831 HTTP request sent, awaiting response... 200 OK
6476 20:13:24.355127 Length: 1642660 (1.6M) [application/octet-stream]
6477 20:13:24.358644 Saving to: 'kselftest_armhf.tar.gz'
6478 20:13:24.358744
6479 20:13:24.358811
6480 20:13:24.609198 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6481 20:13:24.867622 kselftest_armhf.tar 2%[ ] 44.98K 174KB/s
6482 20:13:25.172158 kselftest_armhf.tar 13%[=> ] 214.67K 415KB/s
6483 20:13:25.303866 kselftest_armhf.tar 51%[=========> ] 819.89K 995KB/s
6484 20:13:25.310332 kselftest_armhf.tar 100%[===================>] 1.57M 1.64MB/s in 1.0s
6485 20:13:25.310976
6486 20:13:25.453417 2024-05-28 20:13:25 (1.64 MB/s) - 'kselftest_armhf.tar.gz' saved [1642660/1642660]
6487 20:13:25.453585
6488 20:13:29.509001 skiplist:
6489 20:13:29.512405 ========================================
6490 20:13:29.515458 ========================================
6491 20:13:29.562109 tpm2:test_smoke.sh
6492 20:13:29.565081 tpm2:test_space.sh
6493 20:13:29.581561 ============== Tests to run ===============
6494 20:13:29.581982 tpm2:test_smoke.sh
6495 20:13:29.585347 tpm2:test_space.sh
6496 20:13:29.588424 ===========End Tests to run ===============
6497 20:13:29.591454 shardfile-tpm2 pass
6498 20:13:29.694409 <12>[ 26.123021] kselftest: Running tests in tpm2
6499 20:13:29.706024 TAP version 13
6500 20:13:29.722716 1..2
6501 20:13:29.755354 # selftests: tpm2: test_smoke.sh
6502 20:13:31.711499 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6503 20:13:31.718390 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6504 20:13:31.724906 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6505 20:13:31.728333 # Traceback (most recent call last):
6506 20:13:31.738227 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6507 20:13:31.738311 # if self.tpm:
6508 20:13:31.741874 # ^^^^^^^^
6509 20:13:31.744981 # AttributeError: 'Client' object has no attribute 'tpm'
6510 20:13:31.751783 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6511 20:13:31.758333 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6512 20:13:31.761932 # Traceback (most recent call last):
6513 20:13:31.772151 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6514 20:13:31.775036 # if self.tpm:
6515 20:13:31.775117 # ^^^^^^^^
6516 20:13:31.781826 # AttributeError: 'Client' object has no attribute 'tpm'
6517 20:13:31.788748 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6518 20:13:31.795490 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6519 20:13:31.798682 # Traceback (most recent call last):
6520 20:13:31.808652 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6521 20:13:31.808735 # if self.tpm:
6522 20:13:31.812184 # ^^^^^^^^
6523 20:13:31.815112 # AttributeError: 'Client' object has no attribute 'tpm'
6524 20:13:31.825303 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6525 20:13:31.832079 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6526 20:13:31.835333 # Traceback (most recent call last):
6527 20:13:31.845427 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6528 20:13:31.845511 # if self.tpm:
6529 20:13:31.848563 # ^^^^^^^^
6530 20:13:31.852190 # AttributeError: 'Client' object has no attribute 'tpm'
6531 20:13:31.858643 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6532 20:13:31.865252 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6533 20:13:31.869013 # Traceback (most recent call last):
6534 20:13:31.878913 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6535 20:13:31.882276 # if self.tpm:
6536 20:13:31.882357 # ^^^^^^^^
6537 20:13:31.889440 # AttributeError: 'Client' object has no attribute 'tpm'
6538 20:13:31.895487 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6539 20:13:31.898947 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6540 20:13:31.902067 # Traceback (most recent call last):
6541 20:13:31.912324 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6542 20:13:31.915521 # if self.tpm:
6543 20:13:31.915602 # ^^^^^^^^
6544 20:13:31.922237 # AttributeError: 'Client' object has no attribute 'tpm'
6545 20:13:31.928947 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6546 20:13:31.935299 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6547 20:13:31.938959 # Traceback (most recent call last):
6548 20:13:31.949491 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6549 20:13:31.952249 # if self.tpm:
6550 20:13:31.952330 # ^^^^^^^^
6551 20:13:31.958882 # AttributeError: 'Client' object has no attribute 'tpm'
6552 20:13:31.965581 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6553 20:13:31.972377 # Exception ignored in: <function Client.__del__ at 0xffff84d7ccc0>
6554 20:13:31.975643 # Traceback (most recent call last):
6555 20:13:31.985291 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6556 20:13:31.988529 # if self.tpm:
6557 20:13:31.988646 # ^^^^^^^^
6558 20:13:31.995392 # AttributeError: 'Client' object has no attribute 'tpm'
6559 20:13:31.995474 #
6560 20:13:32.002418 # ======================================================================
6561 20:13:32.008663 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6562 20:13:32.015248 # ----------------------------------------------------------------------
6563 20:13:32.018409 # Traceback (most recent call last):
6564 20:13:32.028948 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6565 20:13:32.035787 # self.root_key = self.client.create_root_key()
6566 20:13:32.038856 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6567 20:13:32.049015 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6568 20:13:32.055550 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6569 20:13:32.058889 # ^^^^^^^^^^^^^^^^^^
6570 20:13:32.072195 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6571 20:13:32.072277 # raise ProtocolError(cc, rc)
6572 20:13:32.078709 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6573 20:13:32.078791 #
6574 20:13:32.085278 # ======================================================================
6575 20:13:32.091896 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6576 20:13:32.098657 # ----------------------------------------------------------------------
6577 20:13:32.101826 # Traceback (most recent call last):
6578 20:13:32.111780 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6579 20:13:32.115678 # self.client = tpm2.Client()
6580 20:13:32.118939 # ^^^^^^^^^^^^^
6581 20:13:32.128566 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6582 20:13:32.135543 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6583 20:13:32.139272 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6584 20:13:32.145245 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6585 20:13:32.145363 #
6586 20:13:32.152198 # ======================================================================
6587 20:13:32.158850 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6588 20:13:32.166410 # ----------------------------------------------------------------------
6589 20:13:32.170017 # Traceback (most recent call last):
6590 20:13:32.180405 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6591 20:13:32.183795 # self.client = tpm2.Client()
6592 20:13:32.186789 # ^^^^^^^^^^^^^
6593 20:13:32.197617 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6594 20:13:32.200528 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6595 20:13:32.207191 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6596 20:13:32.210862 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6597 20:13:32.210944 #
6598 20:13:32.217652 # ======================================================================
6599 20:13:32.224080 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6600 20:13:32.230963 # ----------------------------------------------------------------------
6601 20:13:32.234216 # Traceback (most recent call last):
6602 20:13:32.244243 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6603 20:13:32.247514 # self.client = tpm2.Client()
6604 20:13:32.251133 # ^^^^^^^^^^^^^
6605 20:13:32.260990 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6606 20:13:32.267447 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6607 20:13:32.270866 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6608 20:13:32.277857 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6609 20:13:32.277939 #
6610 20:13:32.284482 # ======================================================================
6611 20:13:32.291191 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6612 20:13:32.297847 # ----------------------------------------------------------------------
6613 20:13:32.300919 # Traceback (most recent call last):
6614 20:13:32.311299 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6615 20:13:32.314544 # self.client = tpm2.Client()
6616 20:13:32.317870 # ^^^^^^^^^^^^^
6617 20:13:32.327809 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6618 20:13:32.331226 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6619 20:13:32.337586 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6620 20:13:32.341389 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6621 20:13:32.341463 #
6622 20:13:32.347859 # ======================================================================
6623 20:13:32.354506 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6624 20:13:32.361214 # ----------------------------------------------------------------------
6625 20:13:32.364651 # Traceback (most recent call last):
6626 20:13:32.374516 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6627 20:13:32.377901 # self.client = tpm2.Client()
6628 20:13:32.381007 # ^^^^^^^^^^^^^
6629 20:13:32.391106 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6630 20:13:32.394642 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6631 20:13:32.400870 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6632 20:13:32.407957 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6633 20:13:32.408038 #
6634 20:13:32.414195 # ======================================================================
6635 20:13:32.421175 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6636 20:13:32.424409 # ----------------------------------------------------------------------
6637 20:13:32.431115 # Traceback (most recent call last):
6638 20:13:32.440944 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6639 20:13:32.444525 # self.client = tpm2.Client()
6640 20:13:32.444606 # ^^^^^^^^^^^^^
6641 20:13:32.454973 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6642 20:13:32.461626 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6643 20:13:32.464393 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6644 20:13:32.471199 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6645 20:13:32.471279 #
6646 20:13:32.478046 # ======================================================================
6647 20:13:32.484667 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6648 20:13:32.490942 # ----------------------------------------------------------------------
6649 20:13:32.494565 # Traceback (most recent call last):
6650 20:13:32.504557 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6651 20:13:32.507699 # self.client = tpm2.Client()
6652 20:13:32.511467 # ^^^^^^^^^^^^^
6653 20:13:32.521288 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6654 20:13:32.527929 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6655 20:13:32.531155 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6656 20:13:32.537902 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6657 20:13:32.537983 #
6658 20:13:32.544281 # ======================================================================
6659 20:13:32.550854 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6660 20:13:32.557581 # ----------------------------------------------------------------------
6661 20:13:32.561167 # Traceback (most recent call last):
6662 20:13:32.574260 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6663 20:13:32.574343 # self.client = tpm2.Client()
6664 20:13:32.577972 # ^^^^^^^^^^^^^
6665 20:13:32.588350 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6666 20:13:32.594551 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6667 20:13:32.598052 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6668 20:13:32.604884 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6669 20:13:32.604996 #
6670 20:13:32.611371 # ----------------------------------------------------------------------
6671 20:13:32.614759 # Ran 9 tests in 0.091s
6672 20:13:32.614833 #
6673 20:13:32.614895 # FAILED (errors=9)
6674 20:13:32.622107 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6675 20:13:32.628697 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6676 20:13:32.628779 #
6677 20:13:32.636128 # ----------------------------------------------------------------------
6678 20:13:32.639447 # Ran 2 tests in 0.067s
6679 20:13:32.639528 #
6680 20:13:32.639592 # OK
6681 20:13:32.642839 ok 1 selftests: tpm2: test_smoke.sh
6682 20:13:32.646281 # selftests: tpm2: test_space.sh
6683 20:13:32.653170 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6684 20:13:32.656414 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6685 20:13:32.704905 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6686 20:13:32.755568 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6687 20:13:32.761832 #
6688 20:13:32.768252 # ======================================================================
6689 20:13:32.771868 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6690 20:13:32.778355 # ----------------------------------------------------------------------
6691 20:13:32.782314 # Traceback (most recent call last):
6692 20:13:32.795007 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6693 20:13:32.798699 # root1 = space1.create_root_key()
6694 20:13:32.801901 # ^^^^^^^^^^^^^^^^^^^^^^^^
6695 20:13:32.811937 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6696 20:13:32.818788 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6697 20:13:32.821858 # ^^^^^^^^^^^^^^^^^^
6698 20:13:32.831980 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6699 20:13:32.835413 # raise ProtocolError(cc, rc)
6700 20:13:32.841983 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6701 20:13:32.842065 #
6702 20:13:32.848478 # ======================================================================
6703 20:13:32.855355 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6704 20:13:32.862084 # ----------------------------------------------------------------------
6705 20:13:32.865452 # Traceback (most recent call last):
6706 20:13:32.875374 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6707 20:13:32.878591 # space1.create_root_key()
6708 20:13:32.888554 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6709 20:13:32.895145 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6710 20:13:32.898733 # ^^^^^^^^^^^^^^^^^^
6711 20:13:32.908087 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6712 20:13:32.911548 # raise ProtocolError(cc, rc)
6713 20:13:32.918374 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6714 20:13:32.918494 #
6715 20:13:32.925178 # ======================================================================
6716 20:13:32.931913 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6717 20:13:32.938131 # ----------------------------------------------------------------------
6718 20:13:32.941507 # Traceback (most recent call last):
6719 20:13:32.951587 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6720 20:13:32.954629 # root1 = space1.create_root_key()
6721 20:13:32.957942 # ^^^^^^^^^^^^^^^^^^^^^^^^
6722 20:13:32.971674 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6723 20:13:32.974816 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6724 20:13:32.981864 # ^^^^^^^^^^^^^^^^^^
6725 20:13:32.991535 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6726 20:13:32.995098 # raise ProtocolError(cc, rc)
6727 20:13:32.998224 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6728 20:13:32.998311 #
6729 20:13:33.004996 # ======================================================================
6730 20:13:33.011661 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6731 20:13:33.018236 # ----------------------------------------------------------------------
6732 20:13:33.021646 # Traceback (most recent call last):
6733 20:13:33.035140 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6734 20:13:33.038342 # root1 = space1.create_root_key()
6735 20:13:33.042121 # ^^^^^^^^^^^^^^^^^^^^^^^^
6736 20:13:33.052131 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6737 20:13:33.058662 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6738 20:13:33.061770 # ^^^^^^^^^^^^^^^^^^
6739 20:13:33.071899 # File "/lava-14063104/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6740 20:13:33.075133 # raise ProtocolError(cc, rc)
6741 20:13:33.081639 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6742 20:13:33.081721 #
6743 20:13:33.088602 # ----------------------------------------------------------------------
6744 20:13:33.091809 # Ran 4 tests in 0.191s
6745 20:13:33.091921 #
6746 20:13:33.095272 # FAILED (errors=4)
6747 20:13:33.098156 not ok 2 selftests: tpm2: test_space.sh # exit=1
6748 20:13:33.450974 tpm2_test_smoke_sh pass
6749 20:13:33.454145 tpm2_test_space_sh fail
6750 20:13:33.536088 + ../../utils/send-to-lava.sh ./output/result.txt
6751 20:13:33.596883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6752 20:13:33.597196 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6754 20:13:33.631488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6755 20:13:33.631745 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6757 20:13:33.666139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6758 20:13:33.666407 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6760 20:13:33.669949 + set +x
6761 20:13:33.673133 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14063104_1.6.2.3.5>
6762 20:13:33.673406 Received signal: <ENDRUN> 1_kselftest-tpm2 14063104_1.6.2.3.5
6763 20:13:33.673478 Ending use of test pattern.
6764 20:13:33.673537 Ending test lava.1_kselftest-tpm2 (14063104_1.6.2.3.5), duration 10.14
6766 20:13:33.676517 <LAVA_TEST_RUNNER EXIT>
6767 20:13:33.676760 ok: lava_test_shell seems to have completed
6768 20:13:33.676864 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6769 20:13:33.676950 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6770 20:13:33.677039 end: 3 lava-test-retry (duration 00:00:11) [common]
6771 20:13:33.677122 start: 4 finalize (timeout 00:07:55) [common]
6772 20:13:33.677213 start: 4.1 power-off (timeout 00:00:30) [common]
6773 20:13:33.677410 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6774 20:13:33.886780 >> Command sent successfully.
6775 20:13:33.898016 Returned 0 in 0 seconds
6776 20:13:33.999180 end: 4.1 power-off (duration 00:00:00) [common]
6778 20:13:34.000492 start: 4.2 read-feedback (timeout 00:07:55) [common]
6779 20:13:34.001907 Listened to connection for namespace 'common' for up to 1s
6780 20:13:35.001352 Finalising connection for namespace 'common'
6781 20:13:35.001512 Disconnecting from shell: Finalise
6782 20:13:35.001592 / #
6783 20:13:35.101883 end: 4.2 read-feedback (duration 00:00:01) [common]
6784 20:13:35.102055 end: 4 finalize (duration 00:00:01) [common]
6785 20:13:35.102196 Cleaning after the job
6786 20:13:35.102303 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/ramdisk
6787 20:13:35.104442 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/kernel
6788 20:13:35.114977 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/dtb
6789 20:13:35.115175 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/nfsrootfs
6790 20:13:35.179009 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063104/tftp-deploy-6d9fb4rv/modules
6791 20:13:35.184684 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14063104
6792 20:13:35.755769 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14063104
6793 20:13:35.755938 Job finished correctly