Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 40
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 84
1 20:14:06.309917 lava-dispatcher, installed at version: 2024.03
2 20:14:06.310134 start: 0 validate
3 20:14:06.310286 Start time: 2024-05-28 20:14:06.310278+00:00 (UTC)
4 20:14:06.310424 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:14:06.310568 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 20:14:06.580505 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:14:06.581169 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 20:14:06.842635 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:14:06.843451 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 20:14:07.096822 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:14:07.097540 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:14:07.356498 validate duration: 1.05
14 20:14:07.357953 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:14:07.358537 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:14:07.359056 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:14:07.359791 Not decompressing ramdisk as can be used compressed.
18 20:14:07.360316 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
19 20:14:07.360661 saving as /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/ramdisk/rootfs.cpio.gz
20 20:14:07.361002 total size: 28105535 (26 MB)
21 20:14:07.370216 progress 0 % (0 MB)
22 20:14:07.398684 progress 5 % (1 MB)
23 20:14:07.411940 progress 10 % (2 MB)
24 20:14:07.421490 progress 15 % (4 MB)
25 20:14:07.429666 progress 20 % (5 MB)
26 20:14:07.437686 progress 25 % (6 MB)
27 20:14:07.445762 progress 30 % (8 MB)
28 20:14:07.453778 progress 35 % (9 MB)
29 20:14:07.461765 progress 40 % (10 MB)
30 20:14:07.469650 progress 45 % (12 MB)
31 20:14:07.477646 progress 50 % (13 MB)
32 20:14:07.485622 progress 55 % (14 MB)
33 20:14:07.493620 progress 60 % (16 MB)
34 20:14:07.501635 progress 65 % (17 MB)
35 20:14:07.509721 progress 70 % (18 MB)
36 20:14:07.517713 progress 75 % (20 MB)
37 20:14:07.525711 progress 80 % (21 MB)
38 20:14:07.533682 progress 85 % (22 MB)
39 20:14:07.541344 progress 90 % (24 MB)
40 20:14:07.549319 progress 95 % (25 MB)
41 20:14:07.557329 progress 100 % (26 MB)
42 20:14:07.557612 26 MB downloaded in 0.20 s (136.31 MB/s)
43 20:14:07.557786 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:14:07.558058 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:14:07.558158 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:14:07.558256 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:14:07.558398 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 20:14:07.558476 saving as /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/kernel/Image
50 20:14:07.558546 total size: 54682112 (52 MB)
51 20:14:07.558616 No compression specified
52 20:14:07.559841 progress 0 % (0 MB)
53 20:14:07.575261 progress 5 % (2 MB)
54 20:14:07.590569 progress 10 % (5 MB)
55 20:14:07.606037 progress 15 % (7 MB)
56 20:14:07.621366 progress 20 % (10 MB)
57 20:14:07.636790 progress 25 % (13 MB)
58 20:14:07.652184 progress 30 % (15 MB)
59 20:14:07.667757 progress 35 % (18 MB)
60 20:14:07.683087 progress 40 % (20 MB)
61 20:14:07.698364 progress 45 % (23 MB)
62 20:14:07.713913 progress 50 % (26 MB)
63 20:14:07.729231 progress 55 % (28 MB)
64 20:14:07.744741 progress 60 % (31 MB)
65 20:14:07.760081 progress 65 % (33 MB)
66 20:14:07.775747 progress 70 % (36 MB)
67 20:14:07.791232 progress 75 % (39 MB)
68 20:14:07.806840 progress 80 % (41 MB)
69 20:14:07.822177 progress 85 % (44 MB)
70 20:14:07.837587 progress 90 % (46 MB)
71 20:14:07.853074 progress 95 % (49 MB)
72 20:14:07.868203 progress 100 % (52 MB)
73 20:14:07.868471 52 MB downloaded in 0.31 s (168.27 MB/s)
74 20:14:07.868639 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:14:07.868904 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:14:07.869002 start: 1.3 download-retry (timeout 00:09:59) [common]
78 20:14:07.869096 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 20:14:07.869246 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 20:14:07.869325 saving as /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 20:14:07.869394 total size: 57695 (0 MB)
82 20:14:07.869476 No compression specified
83 20:14:07.870728 progress 56 % (0 MB)
84 20:14:07.871037 progress 100 % (0 MB)
85 20:14:07.871267 0 MB downloaded in 0.00 s (29.43 MB/s)
86 20:14:07.871404 end: 1.3.1 http-download (duration 00:00:00) [common]
88 20:14:07.871665 end: 1.3 download-retry (duration 00:00:00) [common]
89 20:14:07.871761 start: 1.4 download-retry (timeout 00:09:59) [common]
90 20:14:07.871853 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 20:14:07.871979 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 20:14:07.872057 saving as /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/modules/modules.tar
93 20:14:07.872126 total size: 8607916 (8 MB)
94 20:14:07.872196 Using unxz to decompress xz
95 20:14:07.876567 progress 0 % (0 MB)
96 20:14:07.899144 progress 5 % (0 MB)
97 20:14:07.927135 progress 10 % (0 MB)
98 20:14:07.956545 progress 15 % (1 MB)
99 20:14:07.985365 progress 20 % (1 MB)
100 20:14:08.015021 progress 25 % (2 MB)
101 20:14:08.043993 progress 30 % (2 MB)
102 20:14:08.070689 progress 35 % (2 MB)
103 20:14:08.099904 progress 40 % (3 MB)
104 20:14:08.127525 progress 45 % (3 MB)
105 20:14:08.154829 progress 50 % (4 MB)
106 20:14:08.182436 progress 55 % (4 MB)
107 20:14:08.209284 progress 60 % (4 MB)
108 20:14:08.235409 progress 65 % (5 MB)
109 20:14:08.264252 progress 70 % (5 MB)
110 20:14:08.294198 progress 75 % (6 MB)
111 20:14:08.320473 progress 80 % (6 MB)
112 20:14:08.347485 progress 85 % (7 MB)
113 20:14:08.373583 progress 90 % (7 MB)
114 20:14:08.405475 progress 95 % (7 MB)
115 20:14:08.436304 progress 100 % (8 MB)
116 20:14:08.442574 8 MB downloaded in 0.57 s (14.39 MB/s)
117 20:14:08.442841 end: 1.4.1 http-download (duration 00:00:01) [common]
119 20:14:08.443140 end: 1.4 download-retry (duration 00:00:01) [common]
120 20:14:08.443248 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 20:14:08.443352 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 20:14:08.443499 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 20:14:08.443611 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 20:14:08.443868 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v
125 20:14:08.444025 makedir: /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin
126 20:14:08.444147 makedir: /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/tests
127 20:14:08.444261 makedir: /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/results
128 20:14:08.444391 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-add-keys
129 20:14:08.444557 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-add-sources
130 20:14:08.444706 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-background-process-start
131 20:14:08.444855 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-background-process-stop
132 20:14:08.445000 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-common-functions
133 20:14:08.445143 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-echo-ipv4
134 20:14:08.445288 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-install-packages
135 20:14:08.445438 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-installed-packages
136 20:14:08.445580 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-os-build
137 20:14:08.445722 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-probe-channel
138 20:14:08.445862 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-probe-ip
139 20:14:08.446001 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-target-ip
140 20:14:08.446140 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-target-mac
141 20:14:08.446279 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-target-storage
142 20:14:08.446423 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-case
143 20:14:08.446563 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-event
144 20:14:08.446702 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-feedback
145 20:14:08.446842 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-raise
146 20:14:08.446979 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-reference
147 20:14:08.447119 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-runner
148 20:14:08.447257 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-set
149 20:14:08.447398 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-test-shell
150 20:14:08.447542 Updating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-install-packages (oe)
151 20:14:08.447712 Updating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/bin/lava-installed-packages (oe)
152 20:14:08.447850 Creating /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/environment
153 20:14:08.447964 LAVA metadata
154 20:14:08.448049 - LAVA_JOB_ID=14063112
155 20:14:08.448123 - LAVA_DISPATCHER_IP=192.168.201.1
156 20:14:08.448241 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 20:14:08.448317 skipped lava-vland-overlay
158 20:14:08.448399 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 20:14:08.448493 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 20:14:08.448576 skipped lava-multinode-overlay
161 20:14:08.448658 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 20:14:08.448751 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 20:14:08.448834 Loading test definitions
164 20:14:08.448935 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 20:14:08.449029 Using /lava-14063112 at stage 0
166 20:14:08.449382 uuid=14063112_1.5.2.3.1 testdef=None
167 20:14:08.449491 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 20:14:08.449590 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 20:14:08.450175 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 20:14:08.450426 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 20:14:08.451115 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 20:14:08.451379 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 20:14:08.452043 runner path: /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/0/tests/0_v4l2-compliance-uvc test_uuid 14063112_1.5.2.3.1
176 20:14:08.452221 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 20:14:08.452455 Creating lava-test-runner.conf files
179 20:14:08.452527 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14063112/lava-overlay-0c8ljl8v/lava-14063112/0 for stage 0
180 20:14:08.452631 - 0_v4l2-compliance-uvc
181 20:14:08.452739 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 20:14:08.452837 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 20:14:08.461021 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 20:14:08.461143 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 20:14:08.461241 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 20:14:08.461339 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 20:14:08.461481 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 20:14:09.445097 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 20:14:09.445536 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 20:14:09.445667 extracting modules file /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063112/extract-overlay-ramdisk-938sfq7t/ramdisk
191 20:14:09.691078 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 20:14:09.691260 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 20:14:09.691364 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063112/compress-overlay-5wl_5od7/overlay-1.5.2.4.tar.gz to ramdisk
194 20:14:09.691442 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063112/compress-overlay-5wl_5od7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14063112/extract-overlay-ramdisk-938sfq7t/ramdisk
195 20:14:09.698769 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 20:14:09.698895 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 20:14:09.699003 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 20:14:09.699105 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 20:14:09.699203 Building ramdisk /var/lib/lava/dispatcher/tmp/14063112/extract-overlay-ramdisk-938sfq7t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14063112/extract-overlay-ramdisk-938sfq7t/ramdisk
200 20:14:10.479535 >> 275882 blocks
201 20:14:15.030824 rename /var/lib/lava/dispatcher/tmp/14063112/extract-overlay-ramdisk-938sfq7t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/ramdisk/ramdisk.cpio.gz
202 20:14:15.031325 end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
203 20:14:15.031479 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
204 20:14:15.031589 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
205 20:14:15.031713 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/kernel/Image']
206 20:14:29.252640 Returned 0 in 14 seconds
207 20:14:29.353658 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/kernel/image.itb
208 20:14:30.079288 output: FIT description: Kernel Image image with one or more FDT blobs
209 20:14:30.079697 output: Created: Tue May 28 21:14:29 2024
210 20:14:30.079783 output: Image 0 (kernel-1)
211 20:14:30.079856 output: Description:
212 20:14:30.079927 output: Created: Tue May 28 21:14:29 2024
213 20:14:30.079998 output: Type: Kernel Image
214 20:14:30.080067 output: Compression: lzma compressed
215 20:14:30.080137 output: Data Size: 13061303 Bytes = 12755.18 KiB = 12.46 MiB
216 20:14:30.080208 output: Architecture: AArch64
217 20:14:30.080277 output: OS: Linux
218 20:14:30.080348 output: Load Address: 0x00000000
219 20:14:30.080417 output: Entry Point: 0x00000000
220 20:14:30.080484 output: Hash algo: crc32
221 20:14:30.080553 output: Hash value: 0578ee26
222 20:14:30.080617 output: Image 1 (fdt-1)
223 20:14:30.080682 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 20:14:30.080744 output: Created: Tue May 28 21:14:29 2024
225 20:14:30.080806 output: Type: Flat Device Tree
226 20:14:30.080867 output: Compression: uncompressed
227 20:14:30.080928 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 20:14:30.080988 output: Architecture: AArch64
229 20:14:30.081048 output: Hash algo: crc32
230 20:14:30.081109 output: Hash value: a9713552
231 20:14:30.081169 output: Image 2 (ramdisk-1)
232 20:14:30.081238 output: Description: unavailable
233 20:14:30.081311 output: Created: Tue May 28 21:14:29 2024
234 20:14:30.081374 output: Type: RAMDisk Image
235 20:14:30.081442 output: Compression: Unknown Compression
236 20:14:30.081505 output: Data Size: 41212006 Bytes = 40246.10 KiB = 39.30 MiB
237 20:14:30.081566 output: Architecture: AArch64
238 20:14:30.081627 output: OS: Linux
239 20:14:30.081688 output: Load Address: unavailable
240 20:14:30.081788 output: Entry Point: unavailable
241 20:14:30.081897 output: Hash algo: crc32
242 20:14:30.081966 output: Hash value: 0c731cd9
243 20:14:30.082029 output: Default Configuration: 'conf-1'
244 20:14:30.082090 output: Configuration 0 (conf-1)
245 20:14:30.082152 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 20:14:30.082214 output: Kernel: kernel-1
247 20:14:30.082275 output: Init Ramdisk: ramdisk-1
248 20:14:30.082335 output: FDT: fdt-1
249 20:14:30.082396 output: Loadables: kernel-1
250 20:14:30.082457 output:
251 20:14:30.082688 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 20:14:30.082796 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 20:14:30.082908 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 20:14:30.083017 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
255 20:14:30.083106 No LXC device requested
256 20:14:30.083195 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 20:14:30.083288 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
258 20:14:30.083374 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 20:14:30.083457 Checking files for TFTP limit of 4294967296 bytes.
260 20:14:30.084010 end: 1 tftp-deploy (duration 00:00:23) [common]
261 20:14:30.084126 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 20:14:30.084230 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 20:14:30.084370 substitutions:
264 20:14:30.084445 - {DTB}: 14063112/tftp-deploy-qk70arxa/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 20:14:30.084518 - {INITRD}: 14063112/tftp-deploy-qk70arxa/ramdisk/ramdisk.cpio.gz
266 20:14:30.084586 - {KERNEL}: 14063112/tftp-deploy-qk70arxa/kernel/Image
267 20:14:30.084654 - {LAVA_MAC}: None
268 20:14:30.084720 - {PRESEED_CONFIG}: None
269 20:14:30.084784 - {PRESEED_LOCAL}: None
270 20:14:30.084846 - {RAMDISK}: 14063112/tftp-deploy-qk70arxa/ramdisk/ramdisk.cpio.gz
271 20:14:30.084910 - {ROOT_PART}: None
272 20:14:30.084973 - {ROOT}: None
273 20:14:30.085037 - {SERVER_IP}: 192.168.201.1
274 20:14:30.085099 - {TEE}: None
275 20:14:30.085161 Parsed boot commands:
276 20:14:30.085222 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 20:14:30.085416 Parsed boot commands: tftpboot 192.168.201.1 14063112/tftp-deploy-qk70arxa/kernel/image.itb 14063112/tftp-deploy-qk70arxa/kernel/cmdline
278 20:14:30.085526 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 20:14:30.085622 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 20:14:30.085730 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 20:14:30.085824 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 20:14:30.085906 Not connected, no need to disconnect.
283 20:14:30.085990 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 20:14:30.086079 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 20:14:30.086159 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 20:14:30.090184 Setting prompt string to ['lava-test: # ']
287 20:14:30.090598 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 20:14:30.090719 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 20:14:30.090833 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 20:14:30.090933 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 20:14:30.091134 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 20:14:53.378837 Returned 0 in 23 seconds
293 20:14:53.479858 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 20:14:53.482825 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 20:14:53.483468 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 20:14:53.483978 Setting prompt string to 'Starting depthcharge on Juniper...'
298 20:14:53.484414 Changing prompt to 'Starting depthcharge on Juniper...'
299 20:14:53.484815 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 20:14:53.486973 [Enter `^Ec?' for help]
301 20:14:53.487499 [DL] 00000000 00000000 010701
302 20:14:53.487933
303 20:14:53.488316
304 20:14:53.488711 F0: 102B 0000
305 20:14:53.489061
306 20:14:53.489480 F3: 1006 0033 [0200]
307 20:14:53.489895
308 20:14:53.490270 F3: 4001 00E0 [0200]
309 20:14:53.490669
310 20:14:53.491040 F3: 0000 0000
311 20:14:53.491365
312 20:14:53.491736 V0: 0000 0000 [0001]
313 20:14:53.492095
314 20:14:53.492478 00: 1027 0002
315 20:14:53.492867
316 20:14:53.493238 01: 0000 0000
317 20:14:53.493624
318 20:14:53.494027 BP: 0C00 0251 [0000]
319 20:14:53.494394
320 20:14:53.494759 G0: 1182 0000
321 20:14:53.495128
322 20:14:53.495451 EC: 0004 0000 [0001]
323 20:14:53.495800
324 20:14:53.496200 S7: 0000 0000 [0000]
325 20:14:53.496526
326 20:14:53.496833 CC: 0000 0000 [0001]
327 20:14:53.497214
328 20:14:53.497632 T0: 0000 00DB [000F]
329 20:14:53.497944
330 20:14:53.498210 Jump to BL
331 20:14:53.498472
332 20:14:53.498742
333 20:14:53.499039
334 20:14:53.499301 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 20:14:53.499616 ARM64: Exception handlers installed.
336 20:14:53.499881 ARM64: Testing exception
337 20:14:53.500179 ARM64: Done test exception
338 20:14:53.500440 WDT: Last reset was cold boot
339 20:14:53.500699 SPI0(PAD0) initialized at 992727 Hz
340 20:14:53.500992 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 20:14:53.501264 Manufacturer: ef
342 20:14:53.501578 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 20:14:53.501847 Probing TPM: . done!
344 20:14:53.502129 TPM ready after 0 ms
345 20:14:53.502413 Connected to device vid:did:rid of 1ae0:0028:00
346 20:14:53.502698 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
347 20:14:53.502983 Initialized TPM device CR50 revision 0
348 20:14:53.503256 tlcl_send_startup: Startup return code is 0
349 20:14:53.503526 TPM: setup succeeded
350 20:14:53.503788 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 20:14:53.504047 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 20:14:53.504309 in-header: 03 19 00 00 08 00 00 00
353 20:14:53.504590 in-data: a2 e0 47 00 13 00 00 00
354 20:14:53.504851 Chrome EC: UHEPI supported
355 20:14:53.505121 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 20:14:53.505395 in-header: 03 a1 00 00 08 00 00 00
357 20:14:53.505755 in-data: 84 60 60 10 00 00 00 00
358 20:14:53.506046 Phase 1
359 20:14:53.506310 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 20:14:53.506579 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 20:14:53.506843 VB2:vb2_check_recovery() Recovery was requested manually
362 20:14:53.507127 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 20:14:53.507390 Recovery requested (1009000e)
364 20:14:53.507663 tlcl_extend: response is 0
365 20:14:53.507930 tlcl_extend: response is 0
366 20:14:53.508205
367 20:14:53.508473
368 20:14:53.508733 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 20:14:53.509046 ARM64: Exception handlers installed.
370 20:14:53.509337 ARM64: Testing exception
371 20:14:53.509656 ARM64: Done test exception
372 20:14:53.509876 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x201b
373 20:14:53.510074 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 20:14:53.510269 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 20:14:53.510458 [RTC]rtc_get_frequency_meter,134: input=0xf, output=862
376 20:14:53.510648 [RTC]rtc_get_frequency_meter,134: input=0x7, output=732
377 20:14:53.510836 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
378 20:14:53.511023 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
379 20:14:53.511212 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
380 20:14:53.511411 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
381 20:14:53.511599 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
382 20:14:53.511786 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
383 20:14:53.511972 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 20:14:53.512156 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 20:14:53.512360 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 20:14:53.512549 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 20:14:53.512736 in-header: 03 19 00 00 08 00 00 00
388 20:14:53.512922 in-data: a2 e0 47 00 13 00 00 00
389 20:14:53.513108 Chrome EC: UHEPI supported
390 20:14:53.513311 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 20:14:53.513531 in-header: 03 a1 00 00 08 00 00 00
392 20:14:53.513723 in-data: 84 60 60 10 00 00 00 00
393 20:14:53.513911 Skip loading cached calibration data
394 20:14:53.514098 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 20:14:53.514287 in-header: 03 a1 00 00 08 00 00 00
396 20:14:53.514482 in-data: 84 60 60 10 00 00 00 00
397 20:14:53.514674 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 20:14:53.514863 in-header: 03 a1 00 00 08 00 00 00
399 20:14:53.515067 in-data: 84 60 60 10 00 00 00 00
400 20:14:53.515263 ADC[3]: Raw value=216472 ID=1
401 20:14:53.515411 Manufacturer: ef
402 20:14:53.515555 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 20:14:53.515715 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 20:14:53.515861 CBFS @ 21000 size 3d4000
405 20:14:53.516005 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 20:14:53.516149 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 20:14:53.516292 CBFS: Found @ offset 3c700 size 44
408 20:14:53.516440 DRAM-K: Full Calibration
409 20:14:53.516587 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 20:14:53.516732 CBFS @ 21000 size 3d4000
411 20:14:53.516874 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 20:14:53.517018 CBFS: Locating 'fallback/dram'
413 20:14:53.517161 CBFS: Found @ offset 24b00 size 12268
414 20:14:53.517310 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 20:14:53.517495 ddr_geometry: 1, config: 0x0
416 20:14:53.517650 header.status = 0x0
417 20:14:53.517793 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 20:14:53.517936 header.version = 0x5 (expected: 0x5)
419 20:14:53.518324 header.size = 0x8f0 (expected: 0x8f0)
420 20:14:53.518483 header.config = 0x0
421 20:14:53.518645 header.flags = 0x0
422 20:14:53.518790 header.checksum = 0x0
423 20:14:53.518996 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 20:14:53.519149 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 20:14:53.519298 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 20:14:53.519457 ddr_geometry:1
427 20:14:53.519599 [EMI] new MDL number = 1
428 20:14:53.519746 dram_cbt_mode_extern: 0
429 20:14:53.519862 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 20:14:53.519979 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 20:14:53.520102
432 20:14:53.520223
433 20:14:53.520338 [Bianco] ETT version 0.0.0.1
434 20:14:53.520454 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 20:14:53.520572
436 20:14:53.520688 vSetVcoreByFreq with vcore:762500, freq=1600
437 20:14:53.520825
438 20:14:53.521029 [DramcInit]
439 20:14:53.521155 AutoRefreshCKEOff AutoREF OFF
440 20:14:53.521283 DDRPhyPLLSetting-CKEOFF
441 20:14:53.521404 DDRPhyPLLSetting-CKEON
442 20:14:53.521547
443 20:14:53.521666 Enable WDQS
444 20:14:53.521782 [ModeRegInit_LP4] CH0 RK0
445 20:14:53.521899 Write Rank0 MR13 =0x18
446 20:14:53.522017 Write Rank0 MR12 =0x5d
447 20:14:53.522150 Write Rank0 MR1 =0x56
448 20:14:53.522293 Write Rank0 MR2 =0x1a
449 20:14:53.522414 Write Rank0 MR11 =0x0
450 20:14:53.522530 Write Rank0 MR22 =0x38
451 20:14:53.522644 Write Rank0 MR14 =0x5d
452 20:14:53.522759 Write Rank0 MR3 =0x30
453 20:14:53.522873 Write Rank0 MR13 =0x58
454 20:14:53.522987 Write Rank0 MR12 =0x5d
455 20:14:53.523113 Write Rank0 MR1 =0x56
456 20:14:53.523228 Write Rank0 MR2 =0x2d
457 20:14:53.523342 Write Rank0 MR11 =0x23
458 20:14:53.523456 Write Rank0 MR22 =0x34
459 20:14:53.523571 Write Rank0 MR14 =0x10
460 20:14:53.523710 Write Rank0 MR3 =0x30
461 20:14:53.523834 Write Rank0 MR13 =0xd8
462 20:14:53.523961 [ModeRegInit_LP4] CH0 RK1
463 20:14:53.524078 Write Rank1 MR13 =0x18
464 20:14:53.524193 Write Rank1 MR12 =0x5d
465 20:14:53.524308 Write Rank1 MR1 =0x56
466 20:14:53.524423 Write Rank1 MR2 =0x1a
467 20:14:53.524537 Write Rank1 MR11 =0x0
468 20:14:53.524652 Write Rank1 MR22 =0x38
469 20:14:53.524768 Write Rank1 MR14 =0x5d
470 20:14:53.524865 Write Rank1 MR3 =0x30
471 20:14:53.524962 Write Rank1 MR13 =0x58
472 20:14:53.525058 Write Rank1 MR12 =0x5d
473 20:14:53.525159 Write Rank1 MR1 =0x56
474 20:14:53.525259 Write Rank1 MR2 =0x2d
475 20:14:53.525382 Write Rank1 MR11 =0x23
476 20:14:53.525526 Write Rank1 MR22 =0x34
477 20:14:53.525626 Write Rank1 MR14 =0x10
478 20:14:53.525724 Write Rank1 MR3 =0x30
479 20:14:53.525820 Write Rank1 MR13 =0xd8
480 20:14:53.525922 [ModeRegInit_LP4] CH1 RK0
481 20:14:53.526023 Write Rank0 MR13 =0x18
482 20:14:53.526121 Write Rank0 MR12 =0x5d
483 20:14:53.526216 Write Rank0 MR1 =0x56
484 20:14:53.526313 Write Rank0 MR2 =0x1a
485 20:14:53.526410 Write Rank0 MR11 =0x0
486 20:14:53.526507 Write Rank0 MR22 =0x38
487 20:14:53.526603 Write Rank0 MR14 =0x5d
488 20:14:53.526705 Write Rank0 MR3 =0x30
489 20:14:53.526805 Write Rank0 MR13 =0x58
490 20:14:53.526902 Write Rank0 MR12 =0x5d
491 20:14:53.526998 Write Rank0 MR1 =0x56
492 20:14:53.527095 Write Rank0 MR2 =0x2d
493 20:14:53.527191 Write Rank0 MR11 =0x23
494 20:14:53.527288 Write Rank0 MR22 =0x34
495 20:14:53.527384 Write Rank0 MR14 =0x10
496 20:14:53.527480 Write Rank0 MR3 =0x30
497 20:14:53.527576 Write Rank0 MR13 =0xd8
498 20:14:53.527673 [ModeRegInit_LP4] CH1 RK1
499 20:14:53.527770 Write Rank1 MR13 =0x18
500 20:14:53.527873 Write Rank1 MR12 =0x5d
501 20:14:53.527974 Write Rank1 MR1 =0x56
502 20:14:53.528071 Write Rank1 MR2 =0x1a
503 20:14:53.528168 Write Rank1 MR11 =0x0
504 20:14:53.528263 Write Rank1 MR22 =0x38
505 20:14:53.528364 Write Rank1 MR14 =0x5d
506 20:14:53.528462 Write Rank1 MR3 =0x30
507 20:14:53.528557 Write Rank1 MR13 =0x58
508 20:14:53.528670 Write Rank1 MR12 =0x5d
509 20:14:53.528788 Write Rank1 MR1 =0x56
510 20:14:53.528890 Write Rank1 MR2 =0x2d
511 20:14:53.528986 Write Rank1 MR11 =0x23
512 20:14:53.529083 Write Rank1 MR22 =0x34
513 20:14:53.529179 Write Rank1 MR14 =0x10
514 20:14:53.529275 Write Rank1 MR3 =0x30
515 20:14:53.529372 Write Rank1 MR13 =0xd8
516 20:14:53.529487 match AC timing 3
517 20:14:53.529587 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 20:14:53.529686 [MiockJmeterHQA]
519 20:14:53.529787 vSetVcoreByFreq with vcore:762500, freq=1600
520 20:14:53.529872
521 20:14:53.529957 MIOCK jitter meter ch=0
522 20:14:53.530041
523 20:14:53.530125 1T = (101-17) = 84 dly cells
524 20:14:53.530212 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
525 20:14:53.530302 vSetVcoreByFreq with vcore:725000, freq=1200
526 20:14:53.530389
527 20:14:53.530473 MIOCK jitter meter ch=0
528 20:14:53.530557
529 20:14:53.530641 1T = (96-16) = 80 dly cells
530 20:14:53.530727 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
531 20:14:53.530811 vSetVcoreByFreq with vcore:725000, freq=800
532 20:14:53.530895
533 20:14:53.530979 MIOCK jitter meter ch=0
534 20:14:53.531063
535 20:14:53.531152 1T = (96-16) = 80 dly cells
536 20:14:53.531241 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
537 20:14:53.531326 vSetVcoreByFreq with vcore:762500, freq=1600
538 20:14:53.531411 vSetVcoreByFreq with vcore:762500, freq=1600
539 20:14:53.531495
540 20:14:53.531579 K DRVP
541 20:14:53.531663 1. OCD DRVP=0 CALOUT=0
542 20:14:53.531758 1. OCD DRVP=1 CALOUT=0
543 20:14:53.531862 1. OCD DRVP=2 CALOUT=0
544 20:14:53.531948 1. OCD DRVP=3 CALOUT=0
545 20:14:53.532035 1. OCD DRVP=4 CALOUT=0
546 20:14:53.532121 1. OCD DRVP=5 CALOUT=0
547 20:14:53.532206 1. OCD DRVP=6 CALOUT=0
548 20:14:53.532291 1. OCD DRVP=7 CALOUT=0
549 20:14:53.532377 1. OCD DRVP=8 CALOUT=1
550 20:14:53.532461
551 20:14:53.532546 1. OCD DRVP calibration OK! DRVP=8
552 20:14:53.532633
553 20:14:53.532717
554 20:14:53.532800
555 20:14:53.532884 K ODTN
556 20:14:53.532968 3. OCD ODTN=0 ,CALOUT=1
557 20:14:53.533057 3. OCD ODTN=1 ,CALOUT=1
558 20:14:53.533143 3. OCD ODTN=2 ,CALOUT=1
559 20:14:53.533228 3. OCD ODTN=3 ,CALOUT=1
560 20:14:53.533313 3. OCD ODTN=4 ,CALOUT=1
561 20:14:53.533398 3. OCD ODTN=5 ,CALOUT=1
562 20:14:53.533504 3. OCD ODTN=6 ,CALOUT=1
563 20:14:53.533591 3. OCD ODTN=7 ,CALOUT=0
564 20:14:53.533677
565 20:14:53.533763 3. OCD ODTN calibration OK! ODTN=7
566 20:14:53.533849
567 20:14:53.533933 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 20:14:53.534017 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 20:14:53.534102 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 20:14:53.534186
571 20:14:53.534270 K DRVP
572 20:14:53.534353 1. OCD DRVP=0 CALOUT=0
573 20:14:53.534438 1. OCD DRVP=1 CALOUT=0
574 20:14:53.534523 1. OCD DRVP=2 CALOUT=0
575 20:14:53.534610 1. OCD DRVP=3 CALOUT=0
576 20:14:53.534695 1. OCD DRVP=4 CALOUT=0
577 20:14:53.534784 1. OCD DRVP=5 CALOUT=0
578 20:14:53.534859 1. OCD DRVP=6 CALOUT=0
579 20:14:53.534934 1. OCD DRVP=7 CALOUT=0
580 20:14:53.535009 1. OCD DRVP=8 CALOUT=0
581 20:14:53.535084 1. OCD DRVP=9 CALOUT=0
582 20:14:53.535159 1. OCD DRVP=10 CALOUT=1
583 20:14:53.535234
584 20:14:53.535516 1. OCD DRVP calibration OK! DRVP=10
585 20:14:53.535615
586 20:14:53.535693
587 20:14:53.535768
588 20:14:53.535843 K ODTN
589 20:14:53.535917 3. OCD ODTN=0 ,CALOUT=1
590 20:14:53.535994 3. OCD ODTN=1 ,CALOUT=1
591 20:14:53.536070 3. OCD ODTN=2 ,CALOUT=1
592 20:14:53.536147 3. OCD ODTN=3 ,CALOUT=1
593 20:14:53.536222 3. OCD ODTN=4 ,CALOUT=1
594 20:14:53.536297 3. OCD ODTN=5 ,CALOUT=1
595 20:14:53.536372 3. OCD ODTN=6 ,CALOUT=1
596 20:14:53.536448 3. OCD ODTN=7 ,CALOUT=1
597 20:14:53.536522 3. OCD ODTN=8 ,CALOUT=1
598 20:14:53.536597 3. OCD ODTN=9 ,CALOUT=1
599 20:14:53.536671 3. OCD ODTN=10 ,CALOUT=1
600 20:14:53.536747 3. OCD ODTN=11 ,CALOUT=1
601 20:14:53.536821 3. OCD ODTN=12 ,CALOUT=1
602 20:14:53.536896 3. OCD ODTN=13 ,CALOUT=1
603 20:14:53.536971 3. OCD ODTN=14 ,CALOUT=1
604 20:14:53.537045 3. OCD ODTN=15 ,CALOUT=0
605 20:14:53.537120
606 20:14:53.537194 3. OCD ODTN calibration OK! ODTN=15
607 20:14:53.537269
608 20:14:53.537343 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 20:14:53.537418 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 20:14:53.537512 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 20:14:53.537588
612 20:14:53.537662 [DramcInit]
613 20:14:53.537736 AutoRefreshCKEOff AutoREF OFF
614 20:14:53.537827 DDRPhyPLLSetting-CKEOFF
615 20:14:53.537907 DDRPhyPLLSetting-CKEON
616 20:14:53.537981
617 20:14:53.538071 Enable WDQS
618 20:14:53.538146 ==
619 20:14:53.538220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 20:14:53.538295 fsp= 1, odt_onoff= 1, Byte mode= 0
621 20:14:53.538370 ==
622 20:14:53.538445 [Duty_Offset_Calibration]
623 20:14:53.538519
624 20:14:53.538592 ===========================
625 20:14:53.538697 B0:1 B1:-1 CA:0
626 20:14:53.538773 ==
627 20:14:53.538847 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 20:14:53.538922 fsp= 1, odt_onoff= 1, Byte mode= 0
629 20:14:53.538997 ==
630 20:14:53.539071 [Duty_Offset_Calibration]
631 20:14:53.539145
632 20:14:53.539219 ===========================
633 20:14:53.539293 B0:0 B1:0 CA:0
634 20:14:53.539367 [ModeRegInit_LP4] CH0 RK0
635 20:14:53.539441 Write Rank0 MR13 =0x18
636 20:14:53.539515 Write Rank0 MR12 =0x5d
637 20:14:53.539587 Write Rank0 MR1 =0x56
638 20:14:53.539661 Write Rank0 MR2 =0x1a
639 20:14:53.539747 Write Rank0 MR11 =0x0
640 20:14:53.539812 Write Rank0 MR22 =0x38
641 20:14:53.539877 Write Rank0 MR14 =0x5d
642 20:14:53.539943 Write Rank0 MR3 =0x30
643 20:14:53.540007 Write Rank0 MR13 =0x58
644 20:14:53.540073 Write Rank0 MR12 =0x5d
645 20:14:53.540138 Write Rank0 MR1 =0x56
646 20:14:53.540204 Write Rank0 MR2 =0x2d
647 20:14:53.540268 Write Rank0 MR11 =0x23
648 20:14:53.540334 Write Rank0 MR22 =0x34
649 20:14:53.540404 Write Rank0 MR14 =0x10
650 20:14:53.540472 Write Rank0 MR3 =0x30
651 20:14:53.540538 Write Rank0 MR13 =0xd8
652 20:14:53.540604 [ModeRegInit_LP4] CH0 RK1
653 20:14:53.540670 Write Rank1 MR13 =0x18
654 20:14:53.540735 Write Rank1 MR12 =0x5d
655 20:14:53.540800 Write Rank1 MR1 =0x56
656 20:14:53.540866 Write Rank1 MR2 =0x1a
657 20:14:53.540931 Write Rank1 MR11 =0x0
658 20:14:53.540997 Write Rank1 MR22 =0x38
659 20:14:53.541062 Write Rank1 MR14 =0x5d
660 20:14:53.541127 Write Rank1 MR3 =0x30
661 20:14:53.541193 Write Rank1 MR13 =0x58
662 20:14:53.541258 Write Rank1 MR12 =0x5d
663 20:14:53.541323 Write Rank1 MR1 =0x56
664 20:14:53.541388 Write Rank1 MR2 =0x2d
665 20:14:53.541466 Write Rank1 MR11 =0x23
666 20:14:53.541551 Write Rank1 MR22 =0x34
667 20:14:53.541620 Write Rank1 MR14 =0x10
668 20:14:53.541686 Write Rank1 MR3 =0x30
669 20:14:53.541750 Write Rank1 MR13 =0xd8
670 20:14:53.541815 [ModeRegInit_LP4] CH1 RK0
671 20:14:53.541880 Write Rank0 MR13 =0x18
672 20:14:53.541946 Write Rank0 MR12 =0x5d
673 20:14:53.542039 Write Rank0 MR1 =0x56
674 20:14:53.542107 Write Rank0 MR2 =0x1a
675 20:14:53.542173 Write Rank0 MR11 =0x0
676 20:14:53.542239 Write Rank0 MR22 =0x38
677 20:14:53.542305 Write Rank0 MR14 =0x5d
678 20:14:53.542370 Write Rank0 MR3 =0x30
679 20:14:53.542436 Write Rank0 MR13 =0x58
680 20:14:53.542502 Write Rank0 MR12 =0x5d
681 20:14:53.542568 Write Rank0 MR1 =0x56
682 20:14:53.542639 Write Rank0 MR2 =0x2d
683 20:14:53.542707 Write Rank0 MR11 =0x23
684 20:14:53.542773 Write Rank0 MR22 =0x34
685 20:14:53.542839 Write Rank0 MR14 =0x10
686 20:14:53.542904 Write Rank0 MR3 =0x30
687 20:14:53.542969 Write Rank0 MR13 =0xd8
688 20:14:53.543035 [ModeRegInit_LP4] CH1 RK1
689 20:14:53.543101 Write Rank1 MR13 =0x18
690 20:14:53.543167 Write Rank1 MR12 =0x5d
691 20:14:53.543232 Write Rank1 MR1 =0x56
692 20:14:53.543297 Write Rank1 MR2 =0x1a
693 20:14:53.543363 Write Rank1 MR11 =0x0
694 20:14:53.543428 Write Rank1 MR22 =0x38
695 20:14:53.543493 Write Rank1 MR14 =0x5d
696 20:14:53.543558 Write Rank1 MR3 =0x30
697 20:14:53.543624 Write Rank1 MR13 =0x58
698 20:14:53.543689 Write Rank1 MR12 =0x5d
699 20:14:53.543754 Write Rank1 MR1 =0x56
700 20:14:53.543819 Write Rank1 MR2 =0x2d
701 20:14:53.543883 Write Rank1 MR11 =0x23
702 20:14:53.543948 Write Rank1 MR22 =0x34
703 20:14:53.544014 Write Rank1 MR14 =0x10
704 20:14:53.544079 Write Rank1 MR3 =0x30
705 20:14:53.544149 Write Rank1 MR13 =0xd8
706 20:14:53.544217 match AC timing 3
707 20:14:53.544283 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 20:14:53.544350 DramC Write-DBI off
709 20:14:53.544415 DramC Read-DBI off
710 20:14:53.544481 Write Rank0 MR13 =0x59
711 20:14:53.544546 ==
712 20:14:53.544613 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 20:14:53.544680 fsp= 1, odt_onoff= 1, Byte mode= 0
714 20:14:53.544758 ==
715 20:14:53.544820 === u2Vref_new: 0x56 --> 0x2d
716 20:14:53.544881 === u2Vref_new: 0x58 --> 0x38
717 20:14:53.544942 === u2Vref_new: 0x5a --> 0x39
718 20:14:53.545003 === u2Vref_new: 0x5c --> 0x3c
719 20:14:53.545088 === u2Vref_new: 0x5e --> 0x3d
720 20:14:53.545152 === u2Vref_new: 0x60 --> 0xa0
721 20:14:53.545214 [CA 0] Center 34 (6~63) winsize 58
722 20:14:53.545280 [CA 1] Center 35 (8~63) winsize 56
723 20:14:53.545343 [CA 2] Center 28 (-1~58) winsize 60
724 20:14:53.545405 [CA 3] Center 24 (-4~52) winsize 57
725 20:14:53.545474 [CA 4] Center 24 (-4~52) winsize 57
726 20:14:53.545537 [CA 5] Center 30 (1~59) winsize 59
727 20:14:53.545598
728 20:14:53.545658 [CATrainingPosCal] consider 1 rank data
729 20:14:53.545720 u2DelayCellTimex100 = 744/100 ps
730 20:14:53.545781 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
731 20:14:53.545843 CA1 delay=35 (8~63),Diff = 11 PI (14 cell)
732 20:14:53.545904 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
733 20:14:53.545965 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
734 20:14:53.546026 CA4 delay=24 (-4~52),Diff = 0 PI (0 cell)
735 20:14:53.546088 CA5 delay=30 (1~59),Diff = 6 PI (7 cell)
736 20:14:53.546148
737 20:14:53.546210 CA PerBit enable=1, Macro0, CA PI delay=24
738 20:14:53.546276 === u2Vref_new: 0x5a --> 0x39
739 20:14:53.546339
740 20:14:53.546400 Vref(ca) range 1: 26
741 20:14:53.546461
742 20:14:53.546522 CS Dly= 7 (38-0-32)
743 20:14:53.546584 Write Rank0 MR13 =0xd8
744 20:14:53.546644 Write Rank0 MR13 =0xd8
745 20:14:53.546705 Write Rank0 MR12 =0x5a
746 20:14:53.546766 Write Rank1 MR13 =0x59
747 20:14:53.546827 ==
748 20:14:53.547096 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 20:14:53.547167 fsp= 1, odt_onoff= 1, Byte mode= 0
750 20:14:53.547232 ==
751 20:14:53.547294 === u2Vref_new: 0x56 --> 0x2d
752 20:14:53.547358 === u2Vref_new: 0x58 --> 0x38
753 20:14:53.547421 === u2Vref_new: 0x5a --> 0x39
754 20:14:53.547483 === u2Vref_new: 0x5c --> 0x3c
755 20:14:53.547545 === u2Vref_new: 0x5e --> 0x3d
756 20:14:53.547607 === u2Vref_new: 0x60 --> 0xa0
757 20:14:53.547668 [CA 0] Center 35 (8~63) winsize 56
758 20:14:53.547729 [CA 1] Center 35 (7~63) winsize 57
759 20:14:53.547791 [CA 2] Center 28 (-1~58) winsize 60
760 20:14:53.547857 [CA 3] Center 23 (-5~51) winsize 57
761 20:14:53.547920 [CA 4] Center 23 (-5~51) winsize 57
762 20:14:53.547981 [CA 5] Center 29 (0~59) winsize 60
763 20:14:53.548042
764 20:14:53.548103 [CATrainingPosCal] consider 2 rank data
765 20:14:53.548165 u2DelayCellTimex100 = 744/100 ps
766 20:14:53.548227 CA0 delay=35 (8~63),Diff = 12 PI (15 cell)
767 20:14:53.548288 CA1 delay=35 (8~63),Diff = 12 PI (15 cell)
768 20:14:53.548364 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
769 20:14:53.548432 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 20:14:53.548494 CA4 delay=23 (-4~51),Diff = 0 PI (0 cell)
771 20:14:53.548555 CA5 delay=30 (1~59),Diff = 7 PI (9 cell)
772 20:14:53.548617
773 20:14:53.548679 CA PerBit enable=1, Macro0, CA PI delay=23
774 20:14:53.548741 === u2Vref_new: 0x5e --> 0x3d
775 20:14:53.548806
776 20:14:53.548868 Vref(ca) range 1: 30
777 20:14:53.548946
778 20:14:53.549012 CS Dly= 5 (36-0-32)
779 20:14:53.549084 Write Rank1 MR13 =0xd8
780 20:14:53.549149 Write Rank1 MR13 =0xd8
781 20:14:53.549210 Write Rank1 MR12 =0x5e
782 20:14:53.549271 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 20:14:53.549346 Write Rank0 MR2 =0xad
784 20:14:53.549408 [Write Leveling]
785 20:14:53.549502 delay byte0 byte1 byte2 byte3
786 20:14:53.549566
787 20:14:53.549628 10 0 0
788 20:14:53.549706 11 0 0
789 20:14:53.549773 12 0 0
790 20:14:53.549838 13 0 0
791 20:14:53.549908 14 0 0
792 20:14:53.549975 15 0 0
793 20:14:53.550047 16 0 0
794 20:14:53.550114 17 0 0
795 20:14:53.550185 18 0 0
796 20:14:53.550252 19 0 0
797 20:14:53.550314 20 0 0
798 20:14:53.550375 21 0 0
799 20:14:53.550450 22 0 0
800 20:14:53.550516 23 0 0
801 20:14:53.550587 24 0 0
802 20:14:53.550652 25 0 0
803 20:14:53.550714 26 0 0
804 20:14:53.550776 27 0 ff
805 20:14:53.550838 28 0 ff
806 20:14:53.550899 29 0 ff
807 20:14:53.550974 30 0 ff
808 20:14:53.551045 31 ff ff
809 20:14:53.551111 32 ff ff
810 20:14:53.551173 33 ff ff
811 20:14:53.551235 34 ff ff
812 20:14:53.551305 35 ff ff
813 20:14:53.551371 36 ff ff
814 20:14:53.551433 37 ff ff
815 20:14:53.551495 pass bytecount = 0xff (0xff: all bytes pass)
816 20:14:53.551567
817 20:14:53.551635 DQS0 dly: 31
818 20:14:53.551698 DQS1 dly: 27
819 20:14:53.551758 Write Rank0 MR2 =0x2d
820 20:14:53.551833 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 20:14:53.551917 Write Rank0 MR1 =0xd6
822 20:14:53.551981 [Gating]
823 20:14:53.552058 ==
824 20:14:53.552121 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 20:14:53.552194 fsp= 1, odt_onoff= 1, Byte mode= 0
826 20:14:53.552260 ==
827 20:14:53.552322 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
828 20:14:53.552386 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
829 20:14:53.552462 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
830 20:14:53.552527 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
831 20:14:53.552589 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
832 20:14:53.552659 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 20:14:53.552729 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 20:14:53.552794 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 20:14:53.552870 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 20:14:53.552933 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 20:14:53.552999 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(1 0)(1 0)| 0
838 20:14:53.553090 3 2 12 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
839 20:14:53.553156 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
840 20:14:53.553232 3 2 20 |3534 1d1c |(11 11)(11 11) |(0 0)(0 0)| 0
841 20:14:53.553304 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 20:14:53.553372 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 20:14:53.553442 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 20:14:53.553514 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 20:14:53.553587 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
846 20:14:53.553655 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 20:14:53.553718 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 20:14:53.553789 [Byte 0] Lead/lag Transition tap number (1)
849 20:14:53.553856 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
850 20:14:53.553918 [Byte 1] Lead/lag falling Transition (3, 3, 20)
851 20:14:53.553980 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 20:14:53.554053 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 20:14:53.554120 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 20:14:53.554182 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 20:14:53.554244 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 20:14:53.554318 3 4 12 |2928 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 20:14:53.554387 3 4 16 |1211 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
858 20:14:53.554452 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
859 20:14:53.554523 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 20:14:53.554591 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 20:14:53.554654 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 20:14:53.554730 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 20:14:53.554816 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 20:14:53.554881 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 20:14:53.554957 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 20:14:53.555024 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 20:14:53.555100 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 20:14:53.555163 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 20:14:53.555226 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 20:14:53.555297 [Byte 0] Lead/lag falling Transition (3, 6, 0)
871 20:14:53.555562 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
872 20:14:53.555633 [Byte 1] Lead/lag falling Transition (3, 6, 4)
873 20:14:53.555710 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
874 20:14:53.555775 [Byte 0] Lead/lag Transition tap number (3)
875 20:14:53.555851 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
876 20:14:53.555916 [Byte 1] Lead/lag Transition tap number (3)
877 20:14:53.555978 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
878 20:14:53.556049 [Byte 0]First pass (3, 6, 16)
879 20:14:53.556115 3 6 20 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
880 20:14:53.556191 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 20:14:53.556255 [Byte 1]First pass (3, 6, 24)
882 20:14:53.556317 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 20:14:53.556387 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 20:14:53.556462 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 20:14:53.556529 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 20:14:53.556592 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 20:14:53.556655 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 20:14:53.556717 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 20:14:53.556789 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 20:14:53.556866 All bytes gating window > 1UI, Early break!
891 20:14:53.556928
892 20:14:53.556990 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
893 20:14:53.557064
894 20:14:53.557126 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
895 20:14:53.557199
896 20:14:53.557264
897 20:14:53.557324
898 20:14:53.557385 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
899 20:14:53.557472
900 20:14:53.557540 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
901 20:14:53.557615
902 20:14:53.557677
903 20:14:53.557739 Write Rank0 MR1 =0x56
904 20:14:53.557809
905 20:14:53.557876 best RODT dly(2T, 0.5T) = (2, 3)
906 20:14:53.557938
907 20:14:53.557999 best RODT dly(2T, 0.5T) = (2, 3)
908 20:14:53.558074 ==
909 20:14:53.558137 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 20:14:53.558199 fsp= 1, odt_onoff= 1, Byte mode= 0
911 20:14:53.558261 ==
912 20:14:53.558356 Start DQ dly to find pass range UseTestEngine =0
913 20:14:53.558431 x-axis: bit #, y-axis: DQ dly (-127~63)
914 20:14:53.558497 RX Vref Scan = 0
915 20:14:53.558559 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 20:14:53.558622 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 20:14:53.558696 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 20:14:53.558772 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 20:14:53.558839 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 20:14:53.558902 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 20:14:53.558965 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 20:14:53.559028 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 20:14:53.559090 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 20:14:53.559162 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 20:14:53.559229 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 20:14:53.559292 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 20:14:53.559354 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 20:14:53.559429 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 20:14:53.559492 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 20:14:53.559555 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 20:14:53.559617 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 20:14:53.559688 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 20:14:53.559755 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 20:14:53.559828 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 20:14:53.559894 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 20:14:53.559957 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 20:14:53.560020 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 20:14:53.560095 -3, [0] xxxxxxxx oxxxxxxx [MSB]
939 20:14:53.560158 -2, [0] xxxoxxxx oxxoxxxx [MSB]
940 20:14:53.560220 -1, [0] xxxoxxxx oxxoxxxx [MSB]
941 20:14:53.560285 0, [0] xxxoxxxx ooxoooxx [MSB]
942 20:14:53.560359 1, [0] xxxoxxxx ooxoooxx [MSB]
943 20:14:53.560428 2, [0] xxxoxoox ooxoooox [MSB]
944 20:14:53.560490 3, [0] xxxoxoox ooxoooox [MSB]
945 20:14:53.560564 4, [0] xxxoxoox ooxoooox [MSB]
946 20:14:53.560630 5, [0] oxxooooo ooxooooo [MSB]
947 20:14:53.560693 6, [0] oxxooooo ooxooooo [MSB]
948 20:14:53.560754 32, [0] oooxoooo oooooooo [MSB]
949 20:14:53.560826 33, [0] oooxoooo xooooooo [MSB]
950 20:14:53.560892 34, [0] oooxoooo xooxoooo [MSB]
951 20:14:53.560953 35, [0] oooxoooo xxoxoooo [MSB]
952 20:14:53.561015 36, [0] oooxoxoo xxoxxoxo [MSB]
953 20:14:53.561089 37, [0] oooxoxxx xxoxxxxo [MSB]
954 20:14:53.561152 38, [0] oooxoxxx xxoxxxxo [MSB]
955 20:14:53.561214 39, [0] oooxoxxx xxoxxxxx [MSB]
956 20:14:53.561285 40, [0] ooxxoxxx xxoxxxxx [MSB]
957 20:14:53.561352 41, [0] xxxxxxxx xxoxxxxx [MSB]
958 20:14:53.561414 42, [0] xxxxxxxx xxxxxxxx [MSB]
959 20:14:53.561532 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
960 20:14:53.561614 iDelay=42, Bit 1, Center 23 (7 ~ 40) 34
961 20:14:53.561676 iDelay=42, Bit 2, Center 23 (7 ~ 39) 33
962 20:14:53.561741 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
963 20:14:53.561812 iDelay=42, Bit 4, Center 22 (5 ~ 40) 36
964 20:14:53.561878 iDelay=42, Bit 5, Center 18 (2 ~ 35) 34
965 20:14:53.561940 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
966 20:14:53.562001 iDelay=42, Bit 7, Center 20 (5 ~ 36) 32
967 20:14:53.562075 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
968 20:14:53.562137 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
969 20:14:53.562210 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
970 20:14:53.562272 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
971 20:14:53.562334 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
972 20:14:53.562395 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
973 20:14:53.562468 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
974 20:14:53.562531 iDelay=42, Bit 15, Center 21 (5 ~ 38) 34
975 20:14:53.562607 ==
976 20:14:53.562669 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 20:14:53.562730 fsp= 1, odt_onoff= 1, Byte mode= 0
978 20:14:53.562801 ==
979 20:14:53.562867 DQS Delay:
980 20:14:53.562937 DQS0 = 0, DQS1 = 0
981 20:14:53.563002 DQM Delay:
982 20:14:53.563063 DQM0 = 20, DQM1 = 18
983 20:14:53.563128 DQ Delay:
984 20:14:53.563199 DQ0 =22, DQ1 =23, DQ2 =23, DQ3 =14
985 20:14:53.563264 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
986 20:14:53.563336 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
987 20:14:53.563402 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
988 20:14:53.563463
989 20:14:53.563525
990 20:14:53.563598 DramC Write-DBI off
991 20:14:53.563660 ==
992 20:14:53.563721 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
993 20:14:53.563783 fsp= 1, odt_onoff= 1, Byte mode= 0
994 20:14:53.563857 ==
995 20:14:53.563919 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
996 20:14:53.563981
997 20:14:53.564051 Begin, DQ Scan Range 923~1179
998 20:14:53.564117
999 20:14:53.564181
1000 20:14:53.564442 TX Vref Scan disable
1001 20:14:53.564528 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1002 20:14:53.564615 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1003 20:14:53.564680 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1004 20:14:53.564743 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1005 20:14:53.564820 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1006 20:14:53.564887 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1007 20:14:53.564961 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1008 20:14:53.565031 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1009 20:14:53.565097 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1010 20:14:53.565170 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1011 20:14:53.565238 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1012 20:14:53.565311 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1013 20:14:53.565379 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1014 20:14:53.565457 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1015 20:14:53.565583 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1016 20:14:53.565663 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1017 20:14:53.565736 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1018 20:14:53.565802 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1019 20:14:53.565865 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1020 20:14:53.565939 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1021 20:14:53.566014 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1022 20:14:53.566082 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1023 20:14:53.566148 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1024 20:14:53.566213 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1025 20:14:53.566291 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1026 20:14:53.566362 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1027 20:14:53.566440 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1028 20:14:53.566504 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1029 20:14:53.566565 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1030 20:14:53.566627 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1031 20:14:53.566689 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1032 20:14:53.566751 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1033 20:14:53.566823 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1034 20:14:53.566888 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1035 20:14:53.566963 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1036 20:14:53.567025 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1037 20:14:53.567100 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1038 20:14:53.567162 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1039 20:14:53.567226 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1040 20:14:53.567290 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1041 20:14:53.567364 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1042 20:14:53.567435 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1043 20:14:53.567500 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1044 20:14:53.567562 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1045 20:14:53.567623 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1046 20:14:53.567699 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1047 20:14:53.567762 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1048 20:14:53.567836 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1049 20:14:53.567898 971 |3 6 11|[0] xxxxxxxx ooxoxxxx [MSB]
1050 20:14:53.567963 972 |3 6 12|[0] xxxxxxxx ooxooxxx [MSB]
1051 20:14:53.568026 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1052 20:14:53.568100 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1053 20:14:53.568170 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1054 20:14:53.568258 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1055 20:14:53.568323 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1056 20:14:53.568385 978 |3 6 18|[0] xooooooo oooooooo [MSB]
1057 20:14:53.568461 990 |3 6 30|[0] oooooooo oooxoxoo [MSB]
1058 20:14:53.568524 991 |3 6 31|[0] oooooooo xxoxxxoo [MSB]
1059 20:14:53.568598 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1060 20:14:53.568664 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1061 20:14:53.568728 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1062 20:14:53.568800 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1063 20:14:53.568865 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1064 20:14:53.568927 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1065 20:14:53.568989 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1066 20:14:53.569063 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1067 20:14:53.569125 Byte0, DQ PI dly=986, DQM PI dly= 986
1068 20:14:53.569186 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1069 20:14:53.569247
1070 20:14:53.569316 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1071 20:14:53.569382
1072 20:14:53.569460 Byte1, DQ PI dly=981, DQM PI dly= 981
1073 20:14:53.569523 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1074 20:14:53.569598
1075 20:14:53.569665 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1076 20:14:53.569732
1077 20:14:53.569796 ==
1078 20:14:53.569858 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1079 20:14:53.569928 fsp= 1, odt_onoff= 1, Byte mode= 0
1080 20:14:53.569993 ==
1081 20:14:53.570063 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1082 20:14:53.570127
1083 20:14:53.570186 Begin, DQ Scan Range 957~1021
1084 20:14:53.570246 Write Rank0 MR14 =0x0
1085 20:14:53.570315
1086 20:14:53.570379 CH=0, VrefRange= 0, VrefLevel = 0
1087 20:14:53.570449 TX Bit0 (982~993) 12 987, Bit8 (972~985) 14 978,
1088 20:14:53.570513 TX Bit1 (981~993) 13 987, Bit9 (974~987) 14 980,
1089 20:14:53.570574 TX Bit2 (982~994) 13 988, Bit10 (978~991) 14 984,
1090 20:14:53.570635 TX Bit3 (976~990) 15 983, Bit11 (973~983) 11 978,
1091 20:14:53.570709 TX Bit4 (980~993) 14 986, Bit12 (975~985) 11 980,
1092 20:14:53.570773 TX Bit5 (978~992) 15 985, Bit13 (976~985) 10 980,
1093 20:14:53.570844 TX Bit6 (978~991) 14 984, Bit14 (975~989) 15 982,
1094 20:14:53.570909 TX Bit7 (980~993) 14 986, Bit15 (977~991) 15 984,
1095 20:14:53.570969
1096 20:14:53.571029 Write Rank0 MR14 =0x2
1097 20:14:53.571102
1098 20:14:53.571163 CH=0, VrefRange= 0, VrefLevel = 2
1099 20:14:53.571223 TX Bit0 (982~994) 13 988, Bit8 (971~986) 16 978,
1100 20:14:53.571292 TX Bit1 (979~994) 16 986, Bit9 (974~988) 15 981,
1101 20:14:53.571357 TX Bit2 (982~995) 14 988, Bit10 (977~992) 16 984,
1102 20:14:53.571421 TX Bit3 (976~991) 16 983, Bit11 (973~984) 12 978,
1103 20:14:53.571483 TX Bit4 (979~993) 15 986, Bit12 (975~986) 12 980,
1104 20:14:53.571553 TX Bit5 (977~992) 16 984, Bit13 (975~986) 12 980,
1105 20:14:53.571618 TX Bit6 (978~992) 15 985, Bit14 (976~989) 14 982,
1106 20:14:53.571901 TX Bit7 (979~993) 15 986, Bit15 (977~991) 15 984,
1107 20:14:53.571972
1108 20:14:53.572060 Write Rank0 MR14 =0x4
1109 20:14:53.572127
1110 20:14:53.572200 CH=0, VrefRange= 0, VrefLevel = 4
1111 20:14:53.572266 TX Bit0 (981~995) 15 988, Bit8 (970~987) 18 978,
1112 20:14:53.572327 TX Bit1 (979~995) 17 987, Bit9 (973~988) 16 980,
1113 20:14:53.572388 TX Bit2 (980~996) 17 988, Bit10 (977~993) 17 985,
1114 20:14:53.572461 TX Bit3 (976~991) 16 983, Bit11 (972~984) 13 978,
1115 20:14:53.572528 TX Bit4 (979~994) 16 986, Bit12 (975~987) 13 981,
1116 20:14:53.572601 TX Bit5 (977~992) 16 984, Bit13 (975~987) 13 981,
1117 20:14:53.572666 TX Bit6 (978~992) 15 985, Bit14 (975~990) 16 982,
1118 20:14:53.572727 TX Bit7 (979~994) 16 986, Bit15 (976~992) 17 984,
1119 20:14:53.572797
1120 20:14:53.572861 Write Rank0 MR14 =0x6
1121 20:14:53.572922
1122 20:14:53.572982 CH=0, VrefRange= 0, VrefLevel = 6
1123 20:14:53.573052 TX Bit0 (981~996) 16 988, Bit8 (970~988) 19 979,
1124 20:14:53.573117 TX Bit1 (979~996) 18 987, Bit9 (973~989) 17 981,
1125 20:14:53.573188 TX Bit2 (980~997) 18 988, Bit10 (977~994) 18 985,
1126 20:14:53.573254 TX Bit3 (976~991) 16 983, Bit11 (971~985) 15 978,
1127 20:14:53.573324 TX Bit4 (978~994) 17 986, Bit12 (974~988) 15 981,
1128 20:14:53.573389 TX Bit5 (977~993) 17 985, Bit13 (975~988) 14 981,
1129 20:14:53.573459 TX Bit6 (978~993) 16 985, Bit14 (975~990) 16 982,
1130 20:14:53.573522 TX Bit7 (979~995) 17 987, Bit15 (977~993) 17 985,
1131 20:14:53.573596
1132 20:14:53.573657 Write Rank0 MR14 =0x8
1133 20:14:53.573717
1134 20:14:53.573777 CH=0, VrefRange= 0, VrefLevel = 8
1135 20:14:53.573848 TX Bit0 (981~997) 17 989, Bit8 (969~988) 20 978,
1136 20:14:53.573913 TX Bit1 (979~997) 19 988, Bit9 (972~989) 18 980,
1137 20:14:53.573977 TX Bit2 (980~997) 18 988, Bit10 (976~995) 20 985,
1138 20:14:53.574046 TX Bit3 (976~992) 17 984, Bit11 (971~987) 17 979,
1139 20:14:53.574112 TX Bit4 (979~995) 17 987, Bit12 (974~988) 15 981,
1140 20:14:53.574176 TX Bit5 (977~993) 17 985, Bit13 (974~988) 15 981,
1141 20:14:53.574239 TX Bit6 (977~994) 18 985, Bit14 (975~991) 17 983,
1142 20:14:53.574310 TX Bit7 (979~996) 18 987, Bit15 (976~994) 19 985,
1143 20:14:53.574398
1144 20:14:53.574461 Write Rank0 MR14 =0xa
1145 20:14:53.574524
1146 20:14:53.574600 CH=0, VrefRange= 0, VrefLevel = 10
1147 20:14:53.574664 TX Bit0 (980~997) 18 988, Bit8 (969~989) 21 979,
1148 20:14:53.574738 TX Bit1 (978~997) 20 987, Bit9 (972~989) 18 980,
1149 20:14:53.574809 TX Bit2 (979~998) 20 988, Bit10 (976~996) 21 986,
1150 20:14:53.574875 TX Bit3 (975~992) 18 983, Bit11 (970~988) 19 979,
1151 20:14:53.574935 TX Bit4 (978~996) 19 987, Bit12 (974~989) 16 981,
1152 20:14:53.574996 TX Bit5 (977~993) 17 985, Bit13 (974~989) 16 981,
1153 20:14:53.575065 TX Bit6 (977~995) 19 986, Bit14 (974~991) 18 982,
1154 20:14:53.575130 TX Bit7 (978~997) 20 987, Bit15 (976~994) 19 985,
1155 20:14:53.575201
1156 20:14:53.575268 Write Rank0 MR14 =0xc
1157 20:14:53.575328
1158 20:14:53.575388 CH=0, VrefRange= 0, VrefLevel = 12
1159 20:14:53.575461 TX Bit0 (979~998) 20 988, Bit8 (969~989) 21 979,
1160 20:14:53.575532 TX Bit1 (978~998) 21 988, Bit9 (972~989) 18 980,
1161 20:14:53.575597 TX Bit2 (979~998) 20 988, Bit10 (976~996) 21 986,
1162 20:14:53.575657 TX Bit3 (975~992) 18 983, Bit11 (970~988) 19 979,
1163 20:14:53.575718 TX Bit4 (978~997) 20 987, Bit12 (973~989) 17 981,
1164 20:14:53.575778 TX Bit5 (977~994) 18 985, Bit13 (974~989) 16 981,
1165 20:14:53.575838 TX Bit6 (977~995) 19 986, Bit14 (974~992) 19 983,
1166 20:14:53.575898 TX Bit7 (978~998) 21 988, Bit15 (976~995) 20 985,
1167 20:14:53.575959
1168 20:14:53.576018 Write Rank0 MR14 =0xe
1169 20:14:53.576077
1170 20:14:53.576136 CH=0, VrefRange= 0, VrefLevel = 14
1171 20:14:53.576197 TX Bit0 (979~999) 21 989, Bit8 (969~989) 21 979,
1172 20:14:53.576257 TX Bit1 (978~999) 22 988, Bit9 (971~990) 20 980,
1173 20:14:53.576318 TX Bit2 (979~999) 21 989, Bit10 (976~996) 21 986,
1174 20:14:53.576378 TX Bit3 (975~993) 19 984, Bit11 (970~988) 19 979,
1175 20:14:53.576439 TX Bit4 (978~998) 21 988, Bit12 (973~990) 18 981,
1176 20:14:53.576500 TX Bit5 (976~994) 19 985, Bit13 (973~989) 17 981,
1177 20:14:53.576563 TX Bit6 (977~996) 20 986, Bit14 (974~993) 20 983,
1178 20:14:53.576626 TX Bit7 (978~998) 21 988, Bit15 (976~996) 21 986,
1179 20:14:53.576687
1180 20:14:53.576746 Write Rank0 MR14 =0x10
1181 20:14:53.576806
1182 20:14:53.576865 CH=0, VrefRange= 0, VrefLevel = 16
1183 20:14:53.576926 TX Bit0 (979~999) 21 989, Bit8 (969~990) 22 979,
1184 20:14:53.576986 TX Bit1 (978~999) 22 988, Bit9 (971~990) 20 980,
1185 20:14:53.577046 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1186 20:14:53.577106 TX Bit3 (975~993) 19 984, Bit11 (969~989) 21 979,
1187 20:14:53.577166 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
1188 20:14:53.577226 TX Bit5 (976~995) 20 985, Bit13 (973~990) 18 981,
1189 20:14:53.577287 TX Bit6 (977~997) 21 987, Bit14 (973~993) 21 983,
1190 20:14:53.577347 TX Bit7 (978~999) 22 988, Bit15 (975~996) 22 985,
1191 20:14:53.577407
1192 20:14:53.577485 Write Rank0 MR14 =0x12
1193 20:14:53.577551
1194 20:14:53.577613 CH=0, VrefRange= 0, VrefLevel = 18
1195 20:14:53.577674 TX Bit0 (979~999) 21 989, Bit8 (968~990) 23 979,
1196 20:14:53.577734 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1197 20:14:53.577795 TX Bit2 (978~999) 22 988, Bit10 (976~997) 22 986,
1198 20:14:53.577856 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1199 20:14:53.577916 TX Bit4 (977~998) 22 987, Bit12 (972~991) 20 981,
1200 20:14:53.577977 TX Bit5 (976~995) 20 985, Bit13 (972~990) 19 981,
1201 20:14:53.578038 TX Bit6 (976~998) 23 987, Bit14 (973~994) 22 983,
1202 20:14:53.578122 TX Bit7 (978~999) 22 988, Bit15 (975~996) 22 985,
1203 20:14:53.578184
1204 20:14:53.578249 Write Rank0 MR14 =0x14
1205 20:14:53.578311
1206 20:14:53.578371 CH=0, VrefRange= 0, VrefLevel = 20
1207 20:14:53.578445 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1208 20:14:53.578703 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1209 20:14:53.578773 TX Bit2 (978~1000) 23 989, Bit10 (975~997) 23 986,
1210 20:14:53.578839 TX Bit3 (974~994) 21 984, Bit11 (969~989) 21 979,
1211 20:14:53.578900 TX Bit4 (977~999) 23 988, Bit12 (971~991) 21 981,
1212 20:14:53.578961 TX Bit5 (976~997) 22 986, Bit13 (972~990) 19 981,
1213 20:14:53.579022 TX Bit6 (976~998) 23 987, Bit14 (973~995) 23 984,
1214 20:14:53.579083 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1215 20:14:53.579144
1216 20:14:53.579203 Write Rank0 MR14 =0x16
1217 20:14:53.579266
1218 20:14:53.579328 CH=0, VrefRange= 0, VrefLevel = 22
1219 20:14:53.579389 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
1220 20:14:53.579450 TX Bit1 (977~999) 23 988, Bit9 (970~991) 22 980,
1221 20:14:53.579511 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1222 20:14:53.579572 TX Bit3 (973~994) 22 983, Bit11 (969~989) 21 979,
1223 20:14:53.579633 TX Bit4 (977~999) 23 988, Bit12 (971~992) 22 981,
1224 20:14:53.579693 TX Bit5 (976~997) 22 986, Bit13 (971~991) 21 981,
1225 20:14:53.579754 TX Bit6 (976~999) 24 987, Bit14 (972~996) 25 984,
1226 20:14:53.579815 TX Bit7 (977~1000) 24 988, Bit15 (975~997) 23 986,
1227 20:14:53.579876
1228 20:14:53.579935 Write Rank0 MR14 =0x18
1229 20:14:53.579996
1230 20:14:53.580056 CH=0, VrefRange= 0, VrefLevel = 24
1231 20:14:53.580119 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
1232 20:14:53.580182 TX Bit1 (977~1000) 24 988, Bit9 (970~992) 23 981,
1233 20:14:53.580243 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1234 20:14:53.580304 TX Bit3 (973~995) 23 984, Bit11 (969~990) 22 979,
1235 20:14:53.580365 TX Bit4 (977~999) 23 988, Bit12 (971~992) 22 981,
1236 20:14:53.580425 TX Bit5 (975~998) 24 986, Bit13 (971~992) 22 981,
1237 20:14:53.580486 TX Bit6 (976~999) 24 987, Bit14 (972~996) 25 984,
1238 20:14:53.580547 TX Bit7 (977~1000) 24 988, Bit15 (974~997) 24 985,
1239 20:14:53.580607
1240 20:14:53.580667 Write Rank0 MR14 =0x1a
1241 20:14:53.580727
1242 20:14:53.580789 CH=0, VrefRange= 0, VrefLevel = 26
1243 20:14:53.580851 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1244 20:14:53.580912 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1245 20:14:53.580973 TX Bit2 (977~1001) 25 989, Bit10 (975~998) 24 986,
1246 20:14:53.581033 TX Bit3 (973~995) 23 984, Bit11 (969~991) 23 980,
1247 20:14:53.581116 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1248 20:14:53.581178 TX Bit5 (975~998) 24 986, Bit13 (971~992) 22 981,
1249 20:14:53.581239 TX Bit6 (976~1000) 25 988, Bit14 (971~996) 26 983,
1250 20:14:53.581299 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1251 20:14:53.581359
1252 20:14:53.581419 Write Rank0 MR14 =0x1c
1253 20:14:53.581495
1254 20:14:53.581555 CH=0, VrefRange= 0, VrefLevel = 28
1255 20:14:53.581615 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1256 20:14:53.581677 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1257 20:14:53.581737 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1258 20:14:53.581798 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1259 20:14:53.581858 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1260 20:14:53.581918 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1261 20:14:53.581979 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1262 20:14:53.582039 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1263 20:14:53.582103
1264 20:14:53.582166 Write Rank0 MR14 =0x1e
1265 20:14:53.582231
1266 20:14:53.582291 CH=0, VrefRange= 0, VrefLevel = 30
1267 20:14:53.582351 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1268 20:14:53.582412 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1269 20:14:53.582472 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1270 20:14:53.582532 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1271 20:14:53.582595 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1272 20:14:53.582656 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1273 20:14:53.582718 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1274 20:14:53.582779 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1275 20:14:53.582839
1276 20:14:53.582898 Write Rank0 MR14 =0x20
1277 20:14:53.582959
1278 20:14:53.583018 CH=0, VrefRange= 0, VrefLevel = 32
1279 20:14:53.583078 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1280 20:14:53.583141 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1281 20:14:53.583202 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1282 20:14:53.583262 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1283 20:14:53.583325 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1284 20:14:53.583388 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1285 20:14:53.583448 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1286 20:14:53.583508 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1287 20:14:53.583567
1288 20:14:53.583629 Write Rank0 MR14 =0x22
1289 20:14:53.583693
1290 20:14:53.583755 CH=0, VrefRange= 0, VrefLevel = 34
1291 20:14:53.583815 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1292 20:14:53.583875 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1293 20:14:53.583936 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1294 20:14:53.583999 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1295 20:14:53.584061 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1296 20:14:53.584128 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1297 20:14:53.584207 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1298 20:14:53.584272 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1299 20:14:53.584331
1300 20:14:53.584391 Write Rank0 MR14 =0x24
1301 20:14:53.584454
1302 20:14:53.584513 CH=0, VrefRange= 0, VrefLevel = 36
1303 20:14:53.584576 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1304 20:14:53.584638 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1305 20:14:53.584698 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1306 20:14:53.584759 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1307 20:14:53.585018 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1308 20:14:53.585086 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1309 20:14:53.585148 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1310 20:14:53.585208 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1311 20:14:53.585268
1312 20:14:53.585327
1313 20:14:53.585387 TX Vref found, early break! 370< 371
1314 20:14:53.585457 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1315 20:14:53.585520 u1DelayCellOfst[0]=7 cells (6 PI)
1316 20:14:53.585581 u1DelayCellOfst[1]=7 cells (6 PI)
1317 20:14:53.585641 u1DelayCellOfst[2]=7 cells (6 PI)
1318 20:14:53.585701 u1DelayCellOfst[3]=0 cells (0 PI)
1319 20:14:53.585760 u1DelayCellOfst[4]=6 cells (5 PI)
1320 20:14:53.585824 u1DelayCellOfst[5]=3 cells (3 PI)
1321 20:14:53.585885 u1DelayCellOfst[6]=5 cells (4 PI)
1322 20:14:53.585945 u1DelayCellOfst[7]=7 cells (6 PI)
1323 20:14:53.586005 Byte0, DQ PI dly=983, DQM PI dly= 986
1324 20:14:53.586065 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1325 20:14:53.586126
1326 20:14:53.586185 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1327 20:14:53.586246
1328 20:14:53.586305 u1DelayCellOfst[8]=0 cells (0 PI)
1329 20:14:53.586365 u1DelayCellOfst[9]=2 cells (2 PI)
1330 20:14:53.586425 u1DelayCellOfst[10]=10 cells (8 PI)
1331 20:14:53.586486 u1DelayCellOfst[11]=1 cells (1 PI)
1332 20:14:53.586545 u1DelayCellOfst[12]=3 cells (3 PI)
1333 20:14:53.586605 u1DelayCellOfst[13]=3 cells (3 PI)
1334 20:14:53.586665 u1DelayCellOfst[14]=6 cells (5 PI)
1335 20:14:53.586724 u1DelayCellOfst[15]=10 cells (8 PI)
1336 20:14:53.586784 Byte1, DQ PI dly=978, DQM PI dly= 982
1337 20:14:53.586844 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1338 20:14:53.586907
1339 20:14:53.586969 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1340 20:14:53.587029
1341 20:14:53.587089 Write Rank0 MR14 =0x1c
1342 20:14:53.587148
1343 20:14:53.587207 Final TX Range 0 Vref 28
1344 20:14:53.587266
1345 20:14:53.587325 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1346 20:14:53.587385
1347 20:14:53.587445 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1348 20:14:53.587505 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1349 20:14:53.587565 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1350 20:14:53.587626 Write Rank0 MR3 =0xb0
1351 20:14:53.587685 DramC Write-DBI on
1352 20:14:53.587744 ==
1353 20:14:53.587807 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1354 20:14:53.587869 fsp= 1, odt_onoff= 1, Byte mode= 0
1355 20:14:53.587930 ==
1356 20:14:53.588016 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1357 20:14:53.588078
1358 20:14:53.588138 Begin, DQ Scan Range 702~766
1359 20:14:53.588198
1360 20:14:53.588258
1361 20:14:53.588316 TX Vref Scan disable
1362 20:14:53.588376 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1363 20:14:53.588437 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1364 20:14:53.588498 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1365 20:14:53.588563 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1366 20:14:53.588626 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1367 20:14:53.588687 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1368 20:14:53.588747 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1369 20:14:53.588807 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1370 20:14:53.588869 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1371 20:14:53.588931 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1372 20:14:53.588991 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1373 20:14:53.589052 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1374 20:14:53.589113 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1375 20:14:53.589174 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1376 20:14:53.589235 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1377 20:14:53.589295 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1378 20:14:53.589355 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1379 20:14:53.589416 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1380 20:14:53.589487 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1381 20:14:53.589548 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1382 20:14:53.589609 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1383 20:14:53.589670 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1384 20:14:53.589732 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1385 20:14:53.589796 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1386 20:14:53.589859 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1387 20:14:53.589920 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1388 20:14:53.589981 Byte0, DQ PI dly=732, DQM PI dly= 732
1389 20:14:53.590041 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1390 20:14:53.590101
1391 20:14:53.590160 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1392 20:14:53.590221
1393 20:14:53.590280 Byte1, DQ PI dly=725, DQM PI dly= 725
1394 20:14:53.590340 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1395 20:14:53.590399
1396 20:14:53.590458 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1397 20:14:53.590518
1398 20:14:53.590581 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1399 20:14:53.590643 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1400 20:14:53.590704 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1401 20:14:53.590764 Write Rank0 MR3 =0x30
1402 20:14:53.590824 DramC Write-DBI off
1403 20:14:53.590888
1404 20:14:53.590964 [DATLAT]
1405 20:14:53.591025 Freq=1600, CH0 RK0, use_rxtx_scan=0
1406 20:14:53.591085
1407 20:14:53.591143 DATLAT Default: 0xf
1408 20:14:53.591204 7, 0xFFFF, sum=0
1409 20:14:53.591265 8, 0xFFFF, sum=0
1410 20:14:53.591331 9, 0xFFFF, sum=0
1411 20:14:53.591394 10, 0xFFFF, sum=0
1412 20:14:53.591455 11, 0xFFFF, sum=0
1413 20:14:53.591515 12, 0xFFFF, sum=0
1414 20:14:53.591575 13, 0xFFFF, sum=0
1415 20:14:53.591635 14, 0x0, sum=1
1416 20:14:53.591695 15, 0x0, sum=2
1417 20:14:53.591756 16, 0x0, sum=3
1418 20:14:53.591816 17, 0x0, sum=4
1419 20:14:53.591876 pattern=2 first_step=14 total pass=5 best_step=16
1420 20:14:53.591936 ==
1421 20:14:53.591996 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1422 20:14:53.592055 fsp= 1, odt_onoff= 1, Byte mode= 0
1423 20:14:53.592115 ==
1424 20:14:53.592175 Start DQ dly to find pass range UseTestEngine =1
1425 20:14:53.592235 x-axis: bit #, y-axis: DQ dly (-127~63)
1426 20:14:53.592296 RX Vref Scan = 1
1427 20:14:53.592355
1428 20:14:53.592415 RX Vref found, early break!
1429 20:14:53.592478
1430 20:14:53.592539 Final RX Vref 11, apply to both rank0 and 1
1431 20:14:53.592599 ==
1432 20:14:53.592659 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1433 20:14:53.592719 fsp= 1, odt_onoff= 1, Byte mode= 0
1434 20:14:53.592779 ==
1435 20:14:53.592839 DQS Delay:
1436 20:14:53.593096 DQS0 = 0, DQS1 = 0
1437 20:14:53.593164 DQM Delay:
1438 20:14:53.593225 DQM0 = 19, DQM1 = 17
1439 20:14:53.593285 DQ Delay:
1440 20:14:53.593345 DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =14
1441 20:14:53.593404 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1442 20:14:53.593473 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1443 20:14:53.593537 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1444 20:14:53.593599
1445 20:14:53.593658
1446 20:14:53.593717
1447 20:14:53.593776 [DramC_TX_OE_Calibration] TA2
1448 20:14:53.593835 Original DQ_B0 (3 6) =30, OEN = 27
1449 20:14:53.593895 Original DQ_B1 (3 6) =30, OEN = 27
1450 20:14:53.593955 23, 0x0, End_B0=23 End_B1=23
1451 20:14:53.594017 24, 0x0, End_B0=24 End_B1=24
1452 20:14:53.594078 25, 0x0, End_B0=25 End_B1=25
1453 20:14:53.594139 26, 0x0, End_B0=26 End_B1=26
1454 20:14:53.594199 27, 0x0, End_B0=27 End_B1=27
1455 20:14:53.594263 28, 0x0, End_B0=28 End_B1=28
1456 20:14:53.594351 29, 0x0, End_B0=29 End_B1=29
1457 20:14:53.594414 30, 0x0, End_B0=30 End_B1=30
1458 20:14:53.594475 31, 0xFFFF, End_B0=30 End_B1=30
1459 20:14:53.594536 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1460 20:14:53.594597 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1461 20:14:53.594657
1462 20:14:53.594716
1463 20:14:53.594775 Write Rank0 MR23 =0x3f
1464 20:14:53.594835 [DQSOSC]
1465 20:14:53.594894 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1466 20:14:53.594959 CH0_RK0: MR19=0x202, MR18=0xC2C2, DQSOSC=446, MR23=63, INC=12, DEC=18
1467 20:14:53.595021 Write Rank0 MR23 =0x3f
1468 20:14:53.595080 [DQSOSC]
1469 20:14:53.595139 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1470 20:14:53.595199 CH0 RK0: MR19=202, MR18=C1C1
1471 20:14:53.595258 [RankSwap] Rank num 2, (Multi 1), Rank 1
1472 20:14:53.595317 Write Rank0 MR2 =0xad
1473 20:14:53.595376 [Write Leveling]
1474 20:14:53.595435 delay byte0 byte1 byte2 byte3
1475 20:14:53.595495
1476 20:14:53.595554 10 0 0
1477 20:14:53.595614 11 0 0
1478 20:14:53.595675 12 0 0
1479 20:14:53.595736 13 0 0
1480 20:14:53.595796 14 0 0
1481 20:14:53.595856 15 0 0
1482 20:14:53.595916 16 0 0
1483 20:14:53.595977 17 0 0
1484 20:14:53.596037 18 0 0
1485 20:14:53.596098 19 0 0
1486 20:14:53.596158 20 0 0
1487 20:14:53.596218 21 0 0
1488 20:14:53.596278 22 0 0
1489 20:14:53.596338 23 0 0
1490 20:14:53.596402 24 0 0
1491 20:14:53.596465 25 0 ff
1492 20:14:53.596526 26 0 ff
1493 20:14:53.596587 27 0 ff
1494 20:14:53.596648 28 ff ff
1495 20:14:53.596707 29 ff ff
1496 20:14:53.596768 30 ff ff
1497 20:14:53.596828 31 ff ff
1498 20:14:53.596888 32 ff ff
1499 20:14:53.596948 33 ff ff
1500 20:14:53.597007 34 ff ff
1501 20:14:53.597067 pass bytecount = 0xff (0xff: all bytes pass)
1502 20:14:53.597127
1503 20:14:53.597221 DQS0 dly: 28
1504 20:14:53.597316 DQS1 dly: 25
1505 20:14:53.597409 Write Rank0 MR2 =0x2d
1506 20:14:53.597492 [RankSwap] Rank num 2, (Multi 1), Rank 0
1507 20:14:53.597559 Write Rank1 MR1 =0xd6
1508 20:14:53.597633 [Gating]
1509 20:14:53.597694 ==
1510 20:14:53.597754 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1511 20:14:53.597814 fsp= 1, odt_onoff= 1, Byte mode= 0
1512 20:14:53.597874 ==
1513 20:14:53.597934 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1514 20:14:53.598001 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1515 20:14:53.598068 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1516 20:14:53.598130 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1517 20:14:53.598191 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1518 20:14:53.598251 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1519 20:14:53.598312 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1520 20:14:53.598374 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1521 20:14:53.598433 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1522 20:14:53.598494 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1523 20:14:53.598556 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1524 20:14:53.598616 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1525 20:14:53.598677 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1526 20:14:53.598737 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1527 20:14:53.598798 [Byte 0] Lead/lag Transition tap number (7)
1528 20:14:53.598859 3 2 20 |e0e 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1529 20:14:53.598924 3 2 24 |1716 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1530 20:14:53.598986 3 2 28 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1531 20:14:53.599046 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1532 20:14:53.599108 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1533 20:14:53.599169 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1534 20:14:53.599230 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1535 20:14:53.599291 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1536 20:14:53.599352 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1537 20:14:53.599413 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1538 20:14:53.599473 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1539 20:14:53.599534 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1540 20:14:53.599594 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1541 20:14:53.599654 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1542 20:14:53.599714 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1543 20:14:53.599775 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1544 20:14:53.599836 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1545 20:14:53.599897 3 4 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1546 20:14:53.599962 3 4 24 |100f 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1547 20:14:53.600024 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1548 20:14:53.600085 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 20:14:53.600146 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 20:14:53.600207 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 20:14:53.600267 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 20:14:53.600327 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 20:14:53.600388 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 20:14:53.600449 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 20:14:53.600509 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 20:14:53.600768 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 20:14:53.600840 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 20:14:53.600905 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 20:14:53.600966 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 20:14:53.601048 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1561 20:14:53.601115 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1562 20:14:53.601176 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1563 20:14:53.601237 [Byte 0] Lead/lag Transition tap number (2)
1564 20:14:53.601298 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1565 20:14:53.601359 [Byte 1] Lead/lag Transition tap number (3)
1566 20:14:53.601421 3 6 24 |2e2e 202 |(11 11)(11 11) |(0 0)(0 0)| 0
1567 20:14:53.601491 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1568 20:14:53.601552 [Byte 0]First pass (3, 6, 28)
1569 20:14:53.601613 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1570 20:14:53.601677 [Byte 1]First pass (3, 7, 0)
1571 20:14:53.601739 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1572 20:14:53.601800 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1573 20:14:53.601860 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 20:14:53.601921 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 20:14:53.601982 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 20:14:53.602042 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 20:14:53.602103 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 20:14:53.602164 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 20:14:53.602225 All bytes gating window > 1UI, Early break!
1580 20:14:53.602285
1581 20:14:53.602344 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1582 20:14:53.602404
1583 20:14:53.602463 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1584 20:14:53.602522
1585 20:14:53.602582
1586 20:14:53.602641
1587 20:14:53.602700 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1588 20:14:53.602759
1589 20:14:53.602818 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1590 20:14:53.602877
1591 20:14:53.602936
1592 20:14:53.602995 Write Rank1 MR1 =0x56
1593 20:14:53.603058
1594 20:14:53.603119 best RODT dly(2T, 0.5T) = (2, 3)
1595 20:14:53.603179
1596 20:14:53.603239 best RODT dly(2T, 0.5T) = (2, 3)
1597 20:14:53.603298 ==
1598 20:14:53.603357 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1599 20:14:53.603418 fsp= 1, odt_onoff= 1, Byte mode= 0
1600 20:14:53.603478 ==
1601 20:14:53.603537 Start DQ dly to find pass range UseTestEngine =0
1602 20:14:53.603597 x-axis: bit #, y-axis: DQ dly (-127~63)
1603 20:14:53.603657 RX Vref Scan = 0
1604 20:14:53.603716 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1605 20:14:53.603778 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1606 20:14:53.603840 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1607 20:14:53.603905 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1608 20:14:53.603968 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1609 20:14:53.604056 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1610 20:14:53.604122 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1611 20:14:53.604183 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1612 20:14:53.604244 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1613 20:14:53.604304 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1614 20:14:53.604365 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1615 20:14:53.604426 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1616 20:14:53.604486 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1617 20:14:53.604547 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1618 20:14:53.604608 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1619 20:14:53.604668 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1620 20:14:53.604732 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1621 20:14:53.604795 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1622 20:14:53.604855 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1623 20:14:53.604916 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1624 20:14:53.604977 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1625 20:14:53.605039 -5, [0] xxxxxxxx oxxxxxxx [MSB]
1626 20:14:53.605099 -4, [0] xxxoxxxx oxxoxxxx [MSB]
1627 20:14:53.605159 -3, [0] xxxoxxxx ooxoxoxx [MSB]
1628 20:14:53.605220 -2, [0] xxxoxoxx ooxoooxx [MSB]
1629 20:14:53.605281 -1, [0] xxxoxoxx ooxoooxx [MSB]
1630 20:14:53.605342 0, [0] xxxoxoox ooxoooxx [MSB]
1631 20:14:53.605404 1, [0] xxxoxoox ooxoooox [MSB]
1632 20:14:53.605475 2, [0] xxxoxoox ooxoooox [MSB]
1633 20:14:53.605537 3, [0] xxxooooo ooxooooo [MSB]
1634 20:14:53.605598 4, [0] ooxooooo ooxooooo [MSB]
1635 20:14:53.605659 32, [0] oooxoooo oooooooo [MSB]
1636 20:14:53.605720 33, [0] oooxoooo xooooooo [MSB]
1637 20:14:53.605781 34, [0] oooxoooo xooooooo [MSB]
1638 20:14:53.605845 35, [0] oooxoooo xxoxoooo [MSB]
1639 20:14:53.605908 36, [0] oooxoxxo xxoxxxxo [MSB]
1640 20:14:53.605969 37, [0] oooxoxxx xxoxxxxo [MSB]
1641 20:14:53.606029 38, [0] oooxoxxx xxoxxxxo [MSB]
1642 20:14:53.606090 39, [0] ooxxxxxx xxoxxxxx [MSB]
1643 20:14:53.606150 40, [0] xoxxxxxx xxoxxxxx [MSB]
1644 20:14:53.606211 41, [0] xxxxxxxx xxoxxxxx [MSB]
1645 20:14:53.606273 42, [0] xxxxxxxx xxoxxxxx [MSB]
1646 20:14:53.606334 43, [0] xxxxxxxx xxxxxxxx [MSB]
1647 20:14:53.606394 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1648 20:14:53.606454 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1649 20:14:53.606513 iDelay=43, Bit 2, Center 21 (5 ~ 38) 34
1650 20:14:53.606572 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1651 20:14:53.606631 iDelay=43, Bit 4, Center 20 (3 ~ 38) 36
1652 20:14:53.606691 iDelay=43, Bit 5, Center 16 (-2 ~ 35) 38
1653 20:14:53.606750 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1654 20:14:53.606809 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1655 20:14:53.606872 iDelay=43, Bit 8, Center 13 (-5 ~ 32) 38
1656 20:14:53.606934 iDelay=43, Bit 9, Center 15 (-3 ~ 34) 38
1657 20:14:53.606994 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1658 20:14:53.607057 iDelay=43, Bit 11, Center 15 (-4 ~ 34) 39
1659 20:14:53.607119 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1660 20:14:53.607178 iDelay=43, Bit 13, Center 16 (-3 ~ 35) 39
1661 20:14:53.607238 iDelay=43, Bit 14, Center 18 (1 ~ 35) 35
1662 20:14:53.607297 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1663 20:14:53.607356 ==
1664 20:14:53.607416 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1665 20:14:53.607476 fsp= 1, odt_onoff= 1, Byte mode= 0
1666 20:14:53.607536 ==
1667 20:14:53.607595 DQS Delay:
1668 20:14:53.607655 DQS0 = 0, DQS1 = 0
1669 20:14:53.607720 DQM Delay:
1670 20:14:53.607810 DQM0 = 18, DQM1 = 17
1671 20:14:53.607872 DQ Delay:
1672 20:14:53.607932 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =13
1673 20:14:53.607992 DQ4 =20, DQ5 =16, DQ6 =17, DQ7 =19
1674 20:14:53.608055 DQ8 =13, DQ9 =15, DQ10 =23, DQ11 =15
1675 20:14:53.608116 DQ12 =16, DQ13 =16, DQ14 =18, DQ15 =20
1676 20:14:53.608175
1677 20:14:53.608235
1678 20:14:53.608298 DramC Write-DBI off
1679 20:14:53.608362 ==
1680 20:14:53.608423 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1681 20:14:53.608684 fsp= 1, odt_onoff= 1, Byte mode= 0
1682 20:14:53.608752 ==
1683 20:14:53.608814 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1684 20:14:53.608874
1685 20:14:53.608939 Begin, DQ Scan Range 921~1177
1686 20:14:53.609007
1687 20:14:53.609067
1688 20:14:53.609126 TX Vref Scan disable
1689 20:14:53.609186 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1690 20:14:53.609247 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1691 20:14:53.609309 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1692 20:14:53.609369 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1693 20:14:53.609435 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1694 20:14:53.609497 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1695 20:14:53.609558 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1696 20:14:53.609623 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1697 20:14:53.609686 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1698 20:14:53.609746 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1699 20:14:53.609807 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1700 20:14:53.609867 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1701 20:14:53.609927 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1702 20:14:53.609987 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1703 20:14:53.610048 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1704 20:14:53.610108 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1705 20:14:53.610173 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1706 20:14:53.610235 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1707 20:14:53.610296 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1708 20:14:53.610356 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1709 20:14:53.610416 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1710 20:14:53.610483 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1711 20:14:53.610565 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1712 20:14:53.610628 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1713 20:14:53.610689 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1714 20:14:53.610751 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1715 20:14:53.610811 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1716 20:14:53.610872 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1717 20:14:53.610933 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1718 20:14:53.610999 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1719 20:14:53.611062 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1720 20:14:53.611123 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1721 20:14:53.611184 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1722 20:14:53.611244 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1723 20:14:53.611306 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1724 20:14:53.611367 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1725 20:14:53.611428 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1726 20:14:53.611489 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1727 20:14:53.611550 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1728 20:14:53.611610 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1729 20:14:53.611671 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1730 20:14:53.611732 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1731 20:14:53.611796 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1732 20:14:53.611859 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1733 20:14:53.611920 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1734 20:14:53.611979 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1735 20:14:53.612040 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1736 20:14:53.612101 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1737 20:14:53.612161 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1738 20:14:53.612221 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1739 20:14:53.612283 971 |3 6 11|[0] xxxxxxxx oxxxxxxx [MSB]
1740 20:14:53.612344 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1741 20:14:53.612404 973 |3 6 13|[0] xxxxxxxx oxxoxxox [MSB]
1742 20:14:53.612465 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1743 20:14:53.612526 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1744 20:14:53.612586 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1745 20:14:53.612646 977 |3 6 17|[0] xxxoxoox oooooooo [MSB]
1746 20:14:53.612707 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1747 20:14:53.612767 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1748 20:14:53.612828 991 |3 6 31|[0] oooooooo xxoxxooo [MSB]
1749 20:14:53.612892 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1750 20:14:53.612956 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1751 20:14:53.613016 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1752 20:14:53.613076 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1753 20:14:53.613137 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1754 20:14:53.613197 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1755 20:14:53.613258 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1756 20:14:53.613318 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1757 20:14:53.613380 Byte0, DQ PI dly=986, DQM PI dly= 986
1758 20:14:53.613447 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1759 20:14:53.613511
1760 20:14:53.613571 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1761 20:14:53.613631
1762 20:14:53.613691 Byte1, DQ PI dly=981, DQM PI dly= 981
1763 20:14:53.613750 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1764 20:14:53.613810
1765 20:14:53.613873 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1766 20:14:53.613935
1767 20:14:53.613994 ==
1768 20:14:53.614053 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1769 20:14:53.614113 fsp= 1, odt_onoff= 1, Byte mode= 0
1770 20:14:53.614173 ==
1771 20:14:53.614262 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1772 20:14:53.614325
1773 20:14:53.614385 Begin, DQ Scan Range 957~1021
1774 20:14:53.614445 Write Rank1 MR14 =0x0
1775 20:14:53.614506
1776 20:14:53.614565 CH=0, VrefRange= 0, VrefLevel = 0
1777 20:14:53.614625 TX Bit0 (982~993) 12 987, Bit8 (974~985) 12 979,
1778 20:14:53.614690 TX Bit1 (980~993) 14 986, Bit9 (975~986) 12 980,
1779 20:14:53.614753 TX Bit2 (983~992) 10 987, Bit10 (979~991) 13 985,
1780 20:14:53.614813 TX Bit3 (976~990) 15 983, Bit11 (975~983) 9 979,
1781 20:14:53.614873 TX Bit4 (980~993) 14 986, Bit12 (976~986) 11 981,
1782 20:14:53.614933 TX Bit5 (978~990) 13 984, Bit13 (975~988) 14 981,
1783 20:14:53.614993 TX Bit6 (978~991) 14 984, Bit14 (975~990) 16 982,
1784 20:14:53.615052 TX Bit7 (980~993) 14 986, Bit15 (978~992) 15 985,
1785 20:14:53.615112
1786 20:14:53.615171 Write Rank1 MR14 =0x2
1787 20:14:53.615230
1788 20:14:53.615290 CH=0, VrefRange= 0, VrefLevel = 2
1789 20:14:53.615349 TX Bit0 (982~993) 12 987, Bit8 (973~985) 13 979,
1790 20:14:53.615410 TX Bit1 (980~994) 15 987, Bit9 (975~987) 13 981,
1791 20:14:53.615474 TX Bit2 (982~993) 12 987, Bit10 (978~992) 15 985,
1792 20:14:53.615732 TX Bit3 (976~990) 15 983, Bit11 (975~984) 10 979,
1793 20:14:53.615801 TX Bit4 (979~993) 15 986, Bit12 (976~987) 12 981,
1794 20:14:53.615862 TX Bit5 (978~990) 13 984, Bit13 (975~988) 14 981,
1795 20:14:53.615923 TX Bit6 (978~992) 15 985, Bit14 (975~991) 17 983,
1796 20:14:53.615984 TX Bit7 (980~993) 14 986, Bit15 (978~993) 16 985,
1797 20:14:53.616046
1798 20:14:53.616105 Write Rank1 MR14 =0x4
1799 20:14:53.616165
1800 20:14:53.616223 CH=0, VrefRange= 0, VrefLevel = 4
1801 20:14:53.616283 TX Bit0 (981~994) 14 987, Bit8 (973~987) 15 980,
1802 20:14:53.616343 TX Bit1 (979~995) 17 987, Bit9 (975~987) 13 981,
1803 20:14:53.616403 TX Bit2 (981~994) 14 987, Bit10 (978~993) 16 985,
1804 20:14:53.616463 TX Bit3 (975~991) 17 983, Bit11 (974~985) 12 979,
1805 20:14:53.616538 TX Bit4 (979~994) 16 986, Bit12 (976~988) 13 982,
1806 20:14:53.616602 TX Bit5 (978~991) 14 984, Bit13 (975~989) 15 982,
1807 20:14:53.616665 TX Bit6 (978~992) 15 985, Bit14 (975~991) 17 983,
1808 20:14:53.616738 TX Bit7 (979~994) 16 986, Bit15 (978~993) 16 985,
1809 20:14:53.616798
1810 20:14:53.616857 wait MRW command Rank1 MR14 =0x6 fired (1)
1811 20:14:53.616917 Write Rank1 MR14 =0x6
1812 20:14:53.616987
1813 20:14:53.617046 CH=0, VrefRange= 0, VrefLevel = 6
1814 20:14:53.617106 TX Bit0 (981~995) 15 988, Bit8 (972~988) 17 980,
1815 20:14:53.617166 TX Bit1 (979~996) 18 987, Bit9 (975~989) 15 982,
1816 20:14:53.617226 TX Bit2 (981~994) 14 987, Bit10 (977~994) 18 985,
1817 20:14:53.617285 TX Bit3 (975~991) 17 983, Bit11 (974~986) 13 980,
1818 20:14:53.617345 TX Bit4 (979~995) 17 987, Bit12 (975~988) 14 981,
1819 20:14:53.617410 TX Bit5 (978~991) 14 984, Bit13 (975~989) 15 982,
1820 20:14:53.617513 TX Bit6 (978~993) 16 985, Bit14 (975~992) 18 983,
1821 20:14:53.617576 TX Bit7 (979~995) 17 987, Bit15 (977~994) 18 985,
1822 20:14:53.617636
1823 20:14:53.617696 Write Rank1 MR14 =0x8
1824 20:14:53.617756
1825 20:14:53.617815 CH=0, VrefRange= 0, VrefLevel = 8
1826 20:14:53.617876 TX Bit0 (980~996) 17 988, Bit8 (971~988) 18 979,
1827 20:14:53.617936 TX Bit1 (979~997) 19 988, Bit9 (974~989) 16 981,
1828 20:14:53.617996 TX Bit2 (980~995) 16 987, Bit10 (977~994) 18 985,
1829 20:14:53.618056 TX Bit3 (975~991) 17 983, Bit11 (974~987) 14 980,
1830 20:14:53.618120 TX Bit4 (979~996) 18 987, Bit12 (975~989) 15 982,
1831 20:14:53.618183 TX Bit5 (977~991) 15 984, Bit13 (974~990) 17 982,
1832 20:14:53.618243 TX Bit6 (977~993) 17 985, Bit14 (975~992) 18 983,
1833 20:14:53.618303 TX Bit7 (979~997) 19 988, Bit15 (977~994) 18 985,
1834 20:14:53.618363
1835 20:14:53.618423 Write Rank1 MR14 =0xa
1836 20:14:53.618483
1837 20:14:53.618542 CH=0, VrefRange= 0, VrefLevel = 10
1838 20:14:53.618602 TX Bit0 (980~997) 18 988, Bit8 (971~989) 19 980,
1839 20:14:53.618663 TX Bit1 (978~998) 21 988, Bit9 (974~989) 16 981,
1840 20:14:53.618723 TX Bit2 (980~996) 17 988, Bit10 (977~995) 19 986,
1841 20:14:53.618782 TX Bit3 (974~992) 19 983, Bit11 (973~988) 16 980,
1842 20:14:53.618842 TX Bit4 (978~996) 19 987, Bit12 (974~989) 16 981,
1843 20:14:53.618903 TX Bit5 (977~992) 16 984, Bit13 (974~990) 17 982,
1844 20:14:53.618963 TX Bit6 (978~994) 17 986, Bit14 (974~993) 20 983,
1845 20:14:53.619048 TX Bit7 (979~996) 18 987, Bit15 (977~996) 20 986,
1846 20:14:53.619148
1847 20:14:53.619217 Write Rank1 MR14 =0xc
1848 20:14:53.619280
1849 20:14:53.619339 CH=0, VrefRange= 0, VrefLevel = 12
1850 20:14:53.619400 TX Bit0 (980~998) 19 989, Bit8 (970~989) 20 979,
1851 20:14:53.619461 TX Bit1 (979~998) 20 988, Bit9 (973~990) 18 981,
1852 20:14:53.619521 TX Bit2 (980~997) 18 988, Bit10 (977~996) 20 986,
1853 20:14:53.619581 TX Bit3 (974~992) 19 983, Bit11 (973~988) 16 980,
1854 20:14:53.619641 TX Bit4 (978~998) 21 988, Bit12 (974~989) 16 981,
1855 20:14:53.619701 TX Bit5 (977~992) 16 984, Bit13 (974~990) 17 982,
1856 20:14:53.619761 TX Bit6 (977~995) 19 986, Bit14 (974~994) 21 984,
1857 20:14:53.619824 TX Bit7 (978~998) 21 988, Bit15 (976~996) 21 986,
1858 20:14:53.619886
1859 20:14:53.619945 Write Rank1 MR14 =0xe
1860 20:14:53.620004
1861 20:14:53.620067 CH=0, VrefRange= 0, VrefLevel = 14
1862 20:14:53.620129 TX Bit0 (979~998) 20 988, Bit8 (970~989) 20 979,
1863 20:14:53.620190 TX Bit1 (978~999) 22 988, Bit9 (974~990) 17 982,
1864 20:14:53.620250 TX Bit2 (979~998) 20 988, Bit10 (976~996) 21 986,
1865 20:14:53.620310 TX Bit3 (974~992) 19 983, Bit11 (973~989) 17 981,
1866 20:14:53.620371 TX Bit4 (978~998) 21 988, Bit12 (974~990) 17 982,
1867 20:14:53.620431 TX Bit5 (977~993) 17 985, Bit13 (974~991) 18 982,
1868 20:14:53.620491 TX Bit6 (977~996) 20 986, Bit14 (974~995) 22 984,
1869 20:14:53.620550 TX Bit7 (978~998) 21 988, Bit15 (976~996) 21 986,
1870 20:14:53.620612
1871 20:14:53.620703 Write Rank1 MR14 =0x10
1872 20:14:53.620766
1873 20:14:53.620825 CH=0, VrefRange= 0, VrefLevel = 16
1874 20:14:53.620886 TX Bit0 (979~999) 21 989, Bit8 (970~990) 21 980,
1875 20:14:53.620946 TX Bit1 (978~999) 22 988, Bit9 (973~990) 18 981,
1876 20:14:53.621024 TX Bit2 (979~998) 20 988, Bit10 (977~997) 21 987,
1877 20:14:53.621137 TX Bit3 (973~993) 21 983, Bit11 (972~989) 18 980,
1878 20:14:53.621246 TX Bit4 (978~998) 21 988, Bit12 (974~991) 18 982,
1879 20:14:53.621341 TX Bit5 (977~994) 18 985, Bit13 (973~992) 20 982,
1880 20:14:53.621440 TX Bit6 (977~997) 21 987, Bit14 (974~995) 22 984,
1881 20:14:53.621505 TX Bit7 (978~999) 22 988, Bit15 (976~997) 22 986,
1882 20:14:53.621566
1883 20:14:53.621626 Write Rank1 MR14 =0x12
1884 20:14:53.621690
1885 20:14:53.621752 CH=0, VrefRange= 0, VrefLevel = 18
1886 20:14:53.621812 TX Bit0 (979~999) 21 989, Bit8 (970~990) 21 980,
1887 20:14:53.621873 TX Bit1 (978~999) 22 988, Bit9 (973~991) 19 982,
1888 20:14:53.621936 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1889 20:14:53.621999 TX Bit3 (973~993) 21 983, Bit11 (972~989) 18 980,
1890 20:14:53.622059 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
1891 20:14:53.622118 TX Bit5 (976~995) 20 985, Bit13 (973~992) 20 982,
1892 20:14:53.622379 TX Bit6 (977~997) 21 987, Bit14 (973~995) 23 984,
1893 20:14:53.622448 TX Bit7 (978~999) 22 988, Bit15 (976~997) 22 986,
1894 20:14:53.622509
1895 20:14:53.622569 Write Rank1 MR14 =0x14
1896 20:14:53.622629
1897 20:14:53.622689 CH=0, VrefRange= 0, VrefLevel = 20
1898 20:14:53.622748 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
1899 20:14:53.622809 TX Bit1 (978~1000) 23 989, Bit9 (973~992) 20 982,
1900 20:14:53.622869 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1901 20:14:53.622929 TX Bit3 (972~994) 23 983, Bit11 (971~990) 20 980,
1902 20:14:53.622989 TX Bit4 (978~999) 22 988, Bit12 (973~992) 20 982,
1903 20:14:53.623048 TX Bit5 (976~996) 21 986, Bit13 (973~993) 21 983,
1904 20:14:53.623108 TX Bit6 (977~998) 22 987, Bit14 (973~996) 24 984,
1905 20:14:53.623173 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1906 20:14:53.785552
1907 20:14:53.785891 Write Rank1 MR14 =0x16
1908 20:14:53.786113
1909 20:14:53.786318 CH=0, VrefRange= 0, VrefLevel = 22
1910 20:14:53.786520 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
1911 20:14:53.786740 TX Bit1 (978~1000) 23 989, Bit9 (972~992) 21 982,
1912 20:14:53.786993 TX Bit2 (978~1000) 23 989, Bit10 (976~998) 23 987,
1913 20:14:53.787272 TX Bit3 (972~994) 23 983, Bit11 (971~991) 21 981,
1914 20:14:53.787520 TX Bit4 (978~999) 22 988, Bit12 (972~992) 21 982,
1915 20:14:53.787774 TX Bit5 (976~996) 21 986, Bit13 (972~994) 23 983,
1916 20:14:53.787836 TX Bit6 (976~998) 23 987, Bit14 (973~996) 24 984,
1917 20:14:53.787897 TX Bit7 (978~1000) 23 989, Bit15 (976~998) 23 987,
1918 20:14:53.787958
1919 20:14:53.788022 Write Rank1 MR14 =0x18
1920 20:14:53.788115
1921 20:14:53.788178 CH=0, VrefRange= 0, VrefLevel = 24
1922 20:14:53.788245 TX Bit0 (978~1001) 24 989, Bit8 (969~992) 24 980,
1923 20:14:53.788307 TX Bit1 (978~1000) 23 989, Bit9 (972~992) 21 982,
1924 20:14:53.788371 TX Bit2 (978~1000) 23 989, Bit10 (976~998) 23 987,
1925 20:14:53.788434 TX Bit3 (972~995) 24 983, Bit11 (970~991) 22 980,
1926 20:14:53.788499 TX Bit4 (977~1000) 24 988, Bit12 (972~993) 22 982,
1927 20:14:53.788559 TX Bit5 (976~997) 22 986, Bit13 (972~994) 23 983,
1928 20:14:53.788619 TX Bit6 (976~999) 24 987, Bit14 (973~997) 25 985,
1929 20:14:53.788681 TX Bit7 (978~1000) 23 989, Bit15 (975~998) 24 986,
1930 20:14:53.788744
1931 20:14:53.788806 Write Rank1 MR14 =0x1a
1932 20:14:53.788868
1933 20:14:53.788926 CH=0, VrefRange= 0, VrefLevel = 26
1934 20:14:53.788986 TX Bit0 (978~1001) 24 989, Bit8 (968~992) 25 980,
1935 20:14:53.789049 TX Bit1 (977~1001) 25 989, Bit9 (971~993) 23 982,
1936 20:14:53.789113 TX Bit2 (978~1000) 23 989, Bit10 (975~999) 25 987,
1937 20:14:53.789174 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
1938 20:14:53.789234 TX Bit4 (977~1000) 24 988, Bit12 (972~994) 23 983,
1939 20:14:53.789294 TX Bit5 (975~997) 23 986, Bit13 (972~995) 24 983,
1940 20:14:53.789353 TX Bit6 (976~999) 24 987, Bit14 (972~997) 26 984,
1941 20:14:53.789412 TX Bit7 (977~1000) 24 988, Bit15 (975~998) 24 986,
1942 20:14:53.789484
1943 20:14:53.789544 wait MRW command Rank1 MR14 =0x1c fired (1)
1944 20:14:53.789609 Write Rank1 MR14 =0x1c
1945 20:14:53.789672
1946 20:14:53.789733 CH=0, VrefRange= 0, VrefLevel = 28
1947 20:14:53.789794 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
1948 20:14:53.789853 TX Bit1 (978~1001) 24 989, Bit9 (971~994) 24 982,
1949 20:14:53.789913 TX Bit2 (978~1001) 24 989, Bit10 (975~999) 25 987,
1950 20:14:53.789973 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
1951 20:14:53.790033 TX Bit4 (977~1001) 25 989, Bit12 (971~994) 24 982,
1952 20:14:53.790092 TX Bit5 (975~998) 24 986, Bit13 (971~995) 25 983,
1953 20:14:53.790152 TX Bit6 (976~999) 24 987, Bit14 (972~997) 26 984,
1954 20:14:53.790211 TX Bit7 (977~1001) 25 989, Bit15 (975~998) 24 986,
1955 20:14:53.790271
1956 20:14:53.790330 Write Rank1 MR14 =0x1e
1957 20:14:53.790389
1958 20:14:53.790447 CH=0, VrefRange= 0, VrefLevel = 30
1959 20:14:53.790506 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
1960 20:14:53.790567 TX Bit1 (978~1001) 24 989, Bit9 (970~994) 25 982,
1961 20:14:53.790626 TX Bit2 (978~1001) 24 989, Bit10 (975~999) 25 987,
1962 20:14:53.790685 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
1963 20:14:53.790745 TX Bit4 (977~1001) 25 989, Bit12 (971~995) 25 983,
1964 20:14:53.790804 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1965 20:14:53.790863 TX Bit6 (976~1000) 25 988, Bit14 (972~997) 26 984,
1966 20:14:53.790923 TX Bit7 (977~1001) 25 989, Bit15 (975~998) 24 986,
1967 20:14:53.790982
1968 20:14:53.791044 Write Rank1 MR14 =0x20
1969 20:14:53.791105
1970 20:14:53.791164 CH=0, VrefRange= 0, VrefLevel = 32
1971 20:14:53.791223 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
1972 20:14:53.791283 TX Bit1 (978~1001) 24 989, Bit9 (970~994) 25 982,
1973 20:14:53.791343 TX Bit2 (978~1001) 24 989, Bit10 (975~999) 25 987,
1974 20:14:53.791428 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
1975 20:14:53.791493 TX Bit4 (977~1001) 25 989, Bit12 (971~995) 25 983,
1976 20:14:53.791554 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1977 20:14:53.791615 TX Bit6 (976~1000) 25 988, Bit14 (972~997) 26 984,
1978 20:14:53.791674 TX Bit7 (977~1001) 25 989, Bit15 (975~998) 24 986,
1979 20:14:53.791734
1980 20:14:53.791798 Write Rank1 MR14 =0x22
1981 20:14:53.791860
1982 20:14:53.791919 CH=0, VrefRange= 0, VrefLevel = 34
1983 20:14:53.791978 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
1984 20:14:53.792038 TX Bit1 (978~1001) 24 989, Bit9 (970~994) 25 982,
1985 20:14:53.792098 TX Bit2 (978~1001) 24 989, Bit10 (975~999) 25 987,
1986 20:14:53.792158 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
1987 20:14:53.792217 TX Bit4 (977~1001) 25 989, Bit12 (971~995) 25 983,
1988 20:14:53.792277 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
1989 20:14:53.792337 TX Bit6 (976~1000) 25 988, Bit14 (972~997) 26 984,
1990 20:14:53.792398 TX Bit7 (977~1001) 25 989, Bit15 (975~998) 24 986,
1991 20:14:53.792457
1992 20:14:53.792731 Write Rank1 MR14 =0x24
1993 20:14:53.792799
1994 20:14:53.792861 CH=0, VrefRange= 0, VrefLevel = 36
1995 20:14:53.792922 TX Bit0 (978~1002) 25 990, Bit8 (968~992) 25 980,
1996 20:14:53.792982 TX Bit1 (978~1001) 24 989, Bit9 (970~994) 25 982,
1997 20:14:53.793043 TX Bit2 (978~1001) 24 989, Bit10 (975~999) 25 987,
1998 20:14:53.793102 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
1999 20:14:53.793162 TX Bit4 (977~1001) 25 989, Bit12 (971~995) 25 983,
2000 20:14:53.793222 TX Bit5 (975~998) 24 986, Bit13 (970~994) 25 982,
2001 20:14:53.793282 TX Bit6 (976~1000) 25 988, Bit14 (972~997) 26 984,
2002 20:14:53.793342 TX Bit7 (977~1001) 25 989, Bit15 (975~998) 24 986,
2003 20:14:53.793402
2004 20:14:53.793476
2005 20:14:53.793539 TX Vref found, early break! 371< 377
2006 20:14:53.793599 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2007 20:14:53.793660 u1DelayCellOfst[0]=9 cells (7 PI)
2008 20:14:53.793720 u1DelayCellOfst[1]=7 cells (6 PI)
2009 20:14:53.793781 u1DelayCellOfst[2]=7 cells (6 PI)
2010 20:14:53.793840 u1DelayCellOfst[3]=0 cells (0 PI)
2011 20:14:53.793900 u1DelayCellOfst[4]=7 cells (6 PI)
2012 20:14:53.793960 u1DelayCellOfst[5]=3 cells (3 PI)
2013 20:14:53.794019 u1DelayCellOfst[6]=6 cells (5 PI)
2014 20:14:53.794078 u1DelayCellOfst[7]=7 cells (6 PI)
2015 20:14:53.794138 Byte0, DQ PI dly=983, DQM PI dly= 986
2016 20:14:53.794198 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2017 20:14:53.794263
2018 20:14:53.794325 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2019 20:14:53.794418
2020 20:14:53.794481 u1DelayCellOfst[8]=0 cells (0 PI)
2021 20:14:53.794542 u1DelayCellOfst[9]=2 cells (2 PI)
2022 20:14:53.794602 u1DelayCellOfst[10]=9 cells (7 PI)
2023 20:14:53.794678 u1DelayCellOfst[11]=0 cells (0 PI)
2024 20:14:53.794742 u1DelayCellOfst[12]=3 cells (3 PI)
2025 20:14:53.794803 u1DelayCellOfst[13]=2 cells (2 PI)
2026 20:14:53.794863 u1DelayCellOfst[14]=5 cells (4 PI)
2027 20:14:53.794924 u1DelayCellOfst[15]=7 cells (6 PI)
2028 20:14:53.794987 Byte1, DQ PI dly=980, DQM PI dly= 983
2029 20:14:53.795050 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2030 20:14:53.795112
2031 20:14:53.795172 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2032 20:14:53.795233
2033 20:14:53.795292 Write Rank1 MR14 =0x1e
2034 20:14:53.795351
2035 20:14:53.795411 Final TX Range 0 Vref 30
2036 20:14:53.795471
2037 20:14:53.795531 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2038 20:14:53.795592
2039 20:14:53.795651 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2040 20:14:53.795716 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2041 20:14:53.795779 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2042 20:14:53.795840 Write Rank1 MR3 =0xb0
2043 20:14:53.795899 DramC Write-DBI on
2044 20:14:53.795959 ==
2045 20:14:53.796020 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2046 20:14:53.796081 fsp= 1, odt_onoff= 1, Byte mode= 0
2047 20:14:53.796142 ==
2048 20:14:53.796202 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2049 20:14:53.796263
2050 20:14:53.796326 Begin, DQ Scan Range 703~767
2051 20:14:53.796388
2052 20:14:53.796448
2053 20:14:53.796507 TX Vref Scan disable
2054 20:14:53.796567 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2055 20:14:53.796629 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2056 20:14:53.796690 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2057 20:14:53.796752 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2058 20:14:53.796813 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2059 20:14:53.796874 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2060 20:14:53.796936 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2061 20:14:53.796996 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2062 20:14:53.797057 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2063 20:14:53.797118 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2064 20:14:53.797179 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2065 20:14:53.797240 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2066 20:14:53.797304 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2067 20:14:53.797367 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2068 20:14:53.797442 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2069 20:14:53.797513 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2070 20:14:53.797575 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2071 20:14:53.797636 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2072 20:14:53.797697 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2073 20:14:53.797758 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2074 20:14:53.797819 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2075 20:14:53.797880 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2076 20:14:53.797945 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2077 20:14:53.798028 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2078 20:14:53.798095 Byte0, DQ PI dly=732, DQM PI dly= 732
2079 20:14:53.798156 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
2080 20:14:53.798217
2081 20:14:53.798277 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
2082 20:14:53.798338
2083 20:14:53.798397 Byte1, DQ PI dly=726, DQM PI dly= 726
2084 20:14:53.798457 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2085 20:14:53.798518
2086 20:14:53.798582 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2087 20:14:53.798645
2088 20:14:53.798704 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2089 20:14:53.798765 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2090 20:14:53.798826 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2091 20:14:53.798887 Write Rank1 MR3 =0x30
2092 20:14:53.798946 DramC Write-DBI off
2093 20:14:53.799006
2094 20:14:53.799066 [DATLAT]
2095 20:14:53.799126 Freq=1600, CH0 RK1, use_rxtx_scan=0
2096 20:14:53.799187
2097 20:14:53.799246 DATLAT Default: 0x10
2098 20:14:53.799306 7, 0xFFFF, sum=0
2099 20:14:53.799367 8, 0xFFFF, sum=0
2100 20:14:53.799429 9, 0xFFFF, sum=0
2101 20:14:53.799494 10, 0xFFFF, sum=0
2102 20:14:53.799558 11, 0xFFFF, sum=0
2103 20:14:53.799619 12, 0xFFFF, sum=0
2104 20:14:53.799680 13, 0xFFFF, sum=0
2105 20:14:53.799742 14, 0x0, sum=1
2106 20:14:53.799803 15, 0x0, sum=2
2107 20:14:53.799864 16, 0x0, sum=3
2108 20:14:53.799924 17, 0x0, sum=4
2109 20:14:53.799986 pattern=2 first_step=14 total pass=5 best_step=16
2110 20:14:53.800046 ==
2111 20:14:53.800106 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2112 20:14:53.800169 fsp= 1, odt_onoff= 1, Byte mode= 0
2113 20:14:53.800232 ==
2114 20:14:53.800295 Start DQ dly to find pass range UseTestEngine =1
2115 20:14:53.800554 x-axis: bit #, y-axis: DQ dly (-127~63)
2116 20:14:53.800623 RX Vref Scan = 0
2117 20:14:53.800684 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2118 20:14:53.800747 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2119 20:14:53.800813 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2120 20:14:53.800876 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2121 20:14:53.800938 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2122 20:14:53.800999 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2123 20:14:53.801061 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2124 20:14:53.801121 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2125 20:14:53.801183 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2126 20:14:53.801243 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2127 20:14:53.801310 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2128 20:14:53.801421 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2129 20:14:53.801500 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2130 20:14:53.801563 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2131 20:14:53.801624 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2132 20:14:53.801686 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2133 20:14:53.801747 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2134 20:14:53.801808 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2135 20:14:53.801869 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2136 20:14:53.801931 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2137 20:14:53.801991 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2138 20:14:53.802052 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2139 20:14:53.802113 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2140 20:14:53.802173 -3, [0] xxxxxxxx oxxoxxxx [MSB]
2141 20:14:53.802233 -2, [0] xxxoxoxx ooxoxxxx [MSB]
2142 20:14:53.802294 -1, [0] xxxoxoxx ooxoooxx [MSB]
2143 20:14:53.802355 0, [0] xxxoxoxx ooxoooxx [MSB]
2144 20:14:53.802421 1, [0] xxxoxoox ooxoooxx [MSB]
2145 20:14:53.802484 2, [0] xxxoxoox ooxoooox [MSB]
2146 20:14:53.802544 3, [0] xxxooooo ooxoooox [MSB]
2147 20:14:53.802605 4, [0] ooxooooo ooxooooo [MSB]
2148 20:14:53.802669 5, [0] oooooooo ooxooooo [MSB]
2149 20:14:53.802732 32, [0] oooxoooo oooooooo [MSB]
2150 20:14:53.802793 33, [0] oooxoooo xooxoooo [MSB]
2151 20:14:53.802853 34, [0] oooxoooo xooxoxoo [MSB]
2152 20:14:53.802914 35, [0] oooxoxoo xxoxxxoo [MSB]
2153 20:14:53.802974 36, [0] oooxoxxo xxoxxxxo [MSB]
2154 20:14:53.803039 37, [0] oooxoxxo xxoxxxxo [MSB]
2155 20:14:53.803103 38, [0] oooxoxxx xxoxxxxx [MSB]
2156 20:14:53.803165 39, [0] oxoxxxxx xxoxxxxx [MSB]
2157 20:14:53.803225 40, [0] xxoxxxxx xxoxxxxx [MSB]
2158 20:14:53.803286 41, [0] xxxxxxxx xxxxxxxx [MSB]
2159 20:14:53.803347 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2160 20:14:53.803407 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2161 20:14:53.803467 iDelay=41, Bit 2, Center 22 (5 ~ 40) 36
2162 20:14:53.803526 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2163 20:14:53.803586 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
2164 20:14:53.803650 iDelay=41, Bit 5, Center 16 (-2 ~ 34) 37
2165 20:14:53.803713 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2166 20:14:53.803775 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
2167 20:14:53.803834 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2168 20:14:53.803894 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2169 20:14:53.803954 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
2170 20:14:53.804013 iDelay=41, Bit 11, Center 14 (-3 ~ 32) 36
2171 20:14:53.804073 iDelay=41, Bit 12, Center 16 (-1 ~ 34) 36
2172 20:14:53.804133 iDelay=41, Bit 13, Center 16 (-1 ~ 33) 35
2173 20:14:53.804193 iDelay=41, Bit 14, Center 18 (2 ~ 35) 34
2174 20:14:53.804281 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
2175 20:14:53.804343 ==
2176 20:14:53.804403 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2177 20:14:53.804464 fsp= 1, odt_onoff= 1, Byte mode= 0
2178 20:14:53.804524 ==
2179 20:14:53.804588 DQS Delay:
2180 20:14:53.804650 DQS0 = 0, DQS1 = 0
2181 20:14:53.804710 DQM Delay:
2182 20:14:53.804769 DQM0 = 19, DQM1 = 17
2183 20:14:53.804829 DQ Delay:
2184 20:14:53.804888 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2185 20:14:53.804948 DQ4 =20, DQ5 =16, DQ6 =18, DQ7 =20
2186 20:14:53.805008 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =14
2187 20:14:53.805067 DQ12 =16, DQ13 =16, DQ14 =18, DQ15 =20
2188 20:14:53.805130
2189 20:14:53.805191
2190 20:14:53.805250
2191 20:14:53.805309 [DramC_TX_OE_Calibration] TA2
2192 20:14:53.805372 Original DQ_B0 (3 6) =30, OEN = 27
2193 20:14:53.805446 Original DQ_B1 (3 6) =30, OEN = 27
2194 20:14:53.805509 23, 0x0, End_B0=23 End_B1=23
2195 20:14:53.805571 24, 0x0, End_B0=24 End_B1=24
2196 20:14:53.805632 25, 0x0, End_B0=25 End_B1=25
2197 20:14:53.805692 26, 0x0, End_B0=26 End_B1=26
2198 20:14:53.805754 27, 0x0, End_B0=27 End_B1=27
2199 20:14:53.805814 28, 0x0, End_B0=28 End_B1=28
2200 20:14:53.805875 29, 0x0, End_B0=29 End_B1=29
2201 20:14:53.805935 30, 0x0, End_B0=30 End_B1=30
2202 20:14:53.805996 31, 0xFFFF, End_B0=30 End_B1=30
2203 20:14:53.806061 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2204 20:14:53.806124 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2205 20:14:53.806184
2206 20:14:53.806243
2207 20:14:53.806316 Write Rank1 MR23 =0x3f
2208 20:14:53.806380 [DQSOSC]
2209 20:14:53.807880 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5a5, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2210 20:14:53.814294 CH0_RK1: MR19=0x202, MR18=0xA5A5, DQSOSC=465, MR23=63, INC=11, DEC=17
2211 20:14:53.817672 Write Rank1 MR23 =0x3f
2212 20:14:53.817757 [DQSOSC]
2213 20:14:53.827244 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4a4, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2214 20:14:53.827339 CH0 RK1: MR19=202, MR18=A4A4
2215 20:14:53.830824 [RxdqsGatingPostProcess] freq 1600
2216 20:14:53.837062 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2217 20:14:53.837246 Rank: 0
2218 20:14:53.840519 best DQS0 dly(2T, 0.5T) = (2, 6)
2219 20:14:53.843916 best DQS1 dly(2T, 0.5T) = (2, 6)
2220 20:14:53.847170 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2221 20:14:53.850801 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2222 20:14:53.851188 Rank: 1
2223 20:14:53.853650 best DQS0 dly(2T, 0.5T) = (2, 6)
2224 20:14:53.857080 best DQS1 dly(2T, 0.5T) = (2, 6)
2225 20:14:53.860657 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2226 20:14:53.863489 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2227 20:14:53.867070 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2228 20:14:53.870601 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2229 20:14:53.876589 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2230 20:14:53.876977 Write Rank0 MR13 =0x59
2231 20:14:53.879905 ==
2232 20:14:53.883605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2233 20:14:53.886527 fsp= 1, odt_onoff= 1, Byte mode= 0
2234 20:14:53.886911 ==
2235 20:14:53.889985 === u2Vref_new: 0x56 --> 0x3a
2236 20:14:53.892962 === u2Vref_new: 0x58 --> 0x58
2237 20:14:53.896230 === u2Vref_new: 0x5a --> 0x5a
2238 20:14:53.899888 === u2Vref_new: 0x5c --> 0x78
2239 20:14:53.903187 === u2Vref_new: 0x5e --> 0x7a
2240 20:14:53.906147 === u2Vref_new: 0x60 --> 0x90
2241 20:14:53.909614 [CA 0] Center 37 (12~63) winsize 52
2242 20:14:53.913047 [CA 1] Center 37 (12~63) winsize 52
2243 20:14:53.916006 [CA 2] Center 34 (6~63) winsize 58
2244 20:14:53.919523 [CA 3] Center 35 (8~63) winsize 56
2245 20:14:53.922530 [CA 4] Center 34 (5~63) winsize 59
2246 20:14:53.925864 [CA 5] Center 28 (-1~58) winsize 60
2247 20:14:53.926350
2248 20:14:53.928704 [CATrainingPosCal] consider 1 rank data
2249 20:14:53.932393 u2DelayCellTimex100 = 744/100 ps
2250 20:14:53.935411 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2251 20:14:53.939287 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2252 20:14:53.942146 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2253 20:14:53.945682 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2254 20:14:53.948643 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2255 20:14:53.952136 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2256 20:14:53.952696
2257 20:14:53.958652 CA PerBit enable=1, Macro0, CA PI delay=28
2258 20:14:53.959113 === u2Vref_new: 0x5c --> 0x78
2259 20:14:53.959432
2260 20:14:53.961544 Vref(ca) range 1: 28
2261 20:14:53.961928
2262 20:14:53.965199 CS Dly= 12 (43-0-32)
2263 20:14:53.965618 Write Rank0 MR13 =0xd8
2264 20:14:53.968359 Write Rank0 MR13 =0xd8
2265 20:14:53.972270 Write Rank0 MR12 =0x5c
2266 20:14:53.972768 Write Rank1 MR13 =0x59
2267 20:14:53.973150 ==
2268 20:14:53.978328 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2269 20:14:53.981717 fsp= 1, odt_onoff= 1, Byte mode= 0
2270 20:14:53.982104 ==
2271 20:14:53.984587 === u2Vref_new: 0x56 --> 0x3a
2272 20:14:53.988048 === u2Vref_new: 0x58 --> 0x58
2273 20:14:53.991532 === u2Vref_new: 0x5a --> 0x5a
2274 20:14:53.994603 === u2Vref_new: 0x5c --> 0x78
2275 20:14:53.994989 === u2Vref_new: 0x5e --> 0x7a
2276 20:14:53.997983 === u2Vref_new: 0x60 --> 0x90
2277 20:14:54.001256 [CA 0] Center 37 (12~63) winsize 52
2278 20:14:54.004706 [CA 1] Center 37 (12~63) winsize 52
2279 20:14:54.008234 [CA 2] Center 33 (4~63) winsize 60
2280 20:14:54.011094 [CA 3] Center 35 (7~63) winsize 57
2281 20:14:54.014568 [CA 4] Center 33 (4~63) winsize 60
2282 20:14:54.017740 [CA 5] Center 28 (-1~58) winsize 60
2283 20:14:54.018125
2284 20:14:54.020883 [CATrainingPosCal] consider 2 rank data
2285 20:14:54.024492 u2DelayCellTimex100 = 744/100 ps
2286 20:14:54.027803 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2287 20:14:54.034664 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2288 20:14:54.037392 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2289 20:14:54.040837 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2290 20:14:54.043813 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2291 20:14:54.047261 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2292 20:14:54.047649
2293 20:14:54.050700 CA PerBit enable=1, Macro0, CA PI delay=28
2294 20:14:54.053854 === u2Vref_new: 0x5e --> 0x7a
2295 20:14:54.054239
2296 20:14:54.057159 Vref(ca) range 1: 30
2297 20:14:54.057575
2298 20:14:54.057885 CS Dly= 11 (42-0-32)
2299 20:14:54.060631 Write Rank1 MR13 =0xd8
2300 20:14:54.063557 Write Rank1 MR13 =0xd8
2301 20:14:54.063936 Write Rank1 MR12 =0x5e
2302 20:14:54.066955 [RankSwap] Rank num 2, (Multi 1), Rank 0
2303 20:14:54.069999 Write Rank0 MR2 =0xad
2304 20:14:54.070438 [Write Leveling]
2305 20:14:54.073226 delay byte0 byte1 byte2 byte3
2306 20:14:54.073725
2307 20:14:54.076947 10 0 0
2308 20:14:54.077335 11 0 0
2309 20:14:54.080100 12 0 0
2310 20:14:54.080523 13 0 0
2311 20:14:54.080839 14 0 0
2312 20:14:54.083176 15 0 0
2313 20:14:54.083597 16 0 0
2314 20:14:54.086762 17 0 0
2315 20:14:54.087156 18 0 0
2316 20:14:54.089940 19 0 0
2317 20:14:54.090335 20 0 0
2318 20:14:54.090648 21 0 0
2319 20:14:54.092954 22 0 0
2320 20:14:54.093345 23 0 0
2321 20:14:54.096363 24 0 0
2322 20:14:54.096756 25 0 0
2323 20:14:54.099529 26 0 0
2324 20:14:54.099926 27 0 0
2325 20:14:54.100257 28 0 ff
2326 20:14:54.103128 29 0 ff
2327 20:14:54.103633 30 0 ff
2328 20:14:54.106007 31 0 ff
2329 20:14:54.106418 32 0 ff
2330 20:14:54.109354 33 0 ff
2331 20:14:54.109988 34 0 ff
2332 20:14:54.113087 35 ff ff
2333 20:14:54.113649 36 ff ff
2334 20:14:54.113971 37 ff ff
2335 20:14:54.116243 38 ff ff
2336 20:14:54.116656 39 ff ff
2337 20:14:54.119136 40 ff ff
2338 20:14:54.119617 41 ff ff
2339 20:14:54.126148 pass bytecount = 0xff (0xff: all bytes pass)
2340 20:14:54.126540
2341 20:14:54.126845 DQS0 dly: 35
2342 20:14:54.127129 DQS1 dly: 28
2343 20:14:54.128960 Write Rank0 MR2 =0x2d
2344 20:14:54.132692 [RankSwap] Rank num 2, (Multi 1), Rank 0
2345 20:14:54.135641 Write Rank0 MR1 =0xd6
2346 20:14:54.136020 [Gating]
2347 20:14:54.136322 ==
2348 20:14:54.142049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2349 20:14:54.146236 fsp= 1, odt_onoff= 1, Byte mode= 0
2350 20:14:54.146732 ==
2351 20:14:54.148745 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2352 20:14:54.152182 3 1 4 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2353 20:14:54.158662 3 1 8 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2354 20:14:54.161702 3 1 12 |2c2b 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
2355 20:14:54.165012 3 1 16 |2c2b 1211 |(11 11)(11 11) |(1 0)(0 0)| 0
2356 20:14:54.171928 3 1 20 |2c2b 1515 |(11 11)(11 11) |(1 0)(1 1)| 0
2357 20:14:54.174676 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2358 20:14:54.178407 3 1 28 |2c2b 1e1d |(11 11)(11 11) |(1 0)(1 1)| 0
2359 20:14:54.184638 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2360 20:14:54.188067 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2361 20:14:54.191470 3 2 4 |2c2b 3232 |(11 11)(11 11) |(1 0)(0 1)| 0
2362 20:14:54.197787 3 2 8 |2c2b 2d2c |(11 11)(11 11) |(1 0)(0 1)| 0
2363 20:14:54.201178 3 2 12 |2c2b 504 |(11 11)(11 11) |(1 0)(0 1)| 0
2364 20:14:54.204384 3 2 16 |201 2b2b |(11 11)(11 11) |(0 0)(0 1)| 0
2365 20:14:54.211352 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2366 20:14:54.214889 3 2 24 |3534 706 |(11 11)(11 11) |(0 0)(1 1)| 0
2367 20:14:54.217469 3 2 28 |3534 3a39 |(11 11)(11 11) |(0 0)(1 1)| 0
2368 20:14:54.221118 3 3 0 |3534 3b3a |(11 11)(11 11) |(0 0)(1 1)| 0
2369 20:14:54.227380 [Byte 1] Lead/lag Transition tap number (1)
2370 20:14:54.230820 3 3 4 |3534 3a3a |(11 11)(11 11) |(0 0)(0 0)| 0
2371 20:14:54.233807 3 3 8 |3534 1211 |(11 11)(11 11) |(0 0)(1 1)| 0
2372 20:14:54.240338 3 3 12 |3534 2626 |(11 11)(11 11) |(0 0)(1 1)| 0
2373 20:14:54.244069 3 3 16 |3534 1e1e |(11 11)(11 11) |(1 1)(1 1)| 0
2374 20:14:54.247122 3 3 20 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2375 20:14:54.253866 3 3 24 |3534 808 |(11 11)(11 11) |(0 1)(1 1)| 0
2376 20:14:54.256676 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2377 20:14:54.260033 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2378 20:14:54.266692 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2379 20:14:54.269895 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2380 20:14:54.273242 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2381 20:14:54.280247 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2382 20:14:54.283156 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2383 20:14:54.286137 3 4 20 |505 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2384 20:14:54.292816 3 4 24 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2385 20:14:54.296442 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2386 20:14:54.299734 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2387 20:14:54.302769 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 20:14:54.309954 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 20:14:54.312501 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 20:14:54.315697 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 20:14:54.322672 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 20:14:54.325339 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 20:14:54.331701 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 20:14:54.335331 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 20:14:54.338527 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 20:14:54.341814 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 20:14:54.348639 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2398 20:14:54.351693 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2399 20:14:54.354924 [Byte 0] Lead/lag Transition tap number (2)
2400 20:14:54.361385 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2401 20:14:54.365003 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2402 20:14:54.368330 [Byte 1] Lead/lag Transition tap number (2)
2403 20:14:54.371217 3 6 20 |1616 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2404 20:14:54.378050 3 6 24 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
2405 20:14:54.378443 [Byte 0]First pass (3, 6, 24)
2406 20:14:54.384420 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2407 20:14:54.387537 [Byte 1]First pass (3, 6, 28)
2408 20:14:54.390989 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2409 20:14:54.394547 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2410 20:14:54.397982 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2411 20:14:54.401088 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 20:14:54.407549 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 20:14:54.410584 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2414 20:14:54.413350 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 20:14:54.416987 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2416 20:14:54.423297 All bytes gating window > 1UI, Early break!
2417 20:14:54.423389
2418 20:14:54.426633 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2419 20:14:54.426733
2420 20:14:54.429981 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2421 20:14:54.430079
2422 20:14:54.430156
2423 20:14:54.430230
2424 20:14:54.433410 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2425 20:14:54.433528
2426 20:14:54.436844 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2427 20:14:54.437228
2428 20:14:54.440244
2429 20:14:54.443851 wait MRW command Rank0 MR1 =0x56 fired (1)
2430 20:14:54.444354 Write Rank0 MR1 =0x56
2431 20:14:54.444673
2432 20:14:54.446535 best RODT dly(2T, 0.5T) = (2, 3)
2433 20:14:54.446919
2434 20:14:54.449997 best RODT dly(2T, 0.5T) = (2, 3)
2435 20:14:54.450380 ==
2436 20:14:54.456918 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2437 20:14:54.460002 fsp= 1, odt_onoff= 1, Byte mode= 0
2438 20:14:54.460493 ==
2439 20:14:54.463214 Start DQ dly to find pass range UseTestEngine =0
2440 20:14:54.466564 x-axis: bit #, y-axis: DQ dly (-127~63)
2441 20:14:54.469560 RX Vref Scan = 0
2442 20:14:54.472931 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2443 20:14:54.473383 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2444 20:14:54.476538 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2445 20:14:54.479399 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2446 20:14:54.483081 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2447 20:14:54.486021 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2448 20:14:54.489386 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2449 20:14:54.492421 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2450 20:14:54.496082 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2451 20:14:54.499010 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2452 20:14:54.502210 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2453 20:14:54.502599 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2454 20:14:54.505675 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2455 20:14:54.508965 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2456 20:14:54.512189 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2457 20:14:54.515359 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2458 20:14:54.518802 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2459 20:14:54.521728 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2460 20:14:54.525136 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2461 20:14:54.528488 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2462 20:14:54.528887 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2463 20:14:54.531617 -5, [0] xxxxxxxx xxxxxxxo [MSB]
2464 20:14:54.535477 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2465 20:14:54.538373 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2466 20:14:54.541989 -2, [0] xxxoxxxx xoxxxxxo [MSB]
2467 20:14:54.544725 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2468 20:14:54.548229 0, [0] xxooxxxx ooxxxxxo [MSB]
2469 20:14:54.548824 1, [0] xxooxxxx ooxxxxxo [MSB]
2470 20:14:54.551561 2, [0] xxooxxxo oooxxxxo [MSB]
2471 20:14:54.554476 3, [0] xoooxxxo ooooxxoo [MSB]
2472 20:14:54.558043 4, [0] oooooxxo oooooooo [MSB]
2473 20:14:54.561512 5, [0] oooooxoo oooooooo [MSB]
2474 20:14:54.564485 32, [0] oooooooo ooooooox [MSB]
2475 20:14:54.567600 33, [0] oooooooo ooooooox [MSB]
2476 20:14:54.567994 34, [0] oooooooo ooooooox [MSB]
2477 20:14:54.570763 35, [0] ooxooooo oxooooox [MSB]
2478 20:14:54.574070 36, [0] ooxxoooo xxooooox [MSB]
2479 20:14:54.577461 37, [0] ooxxoooo xxooooox [MSB]
2480 20:14:54.580683 38, [0] ooxxoooo xxooooox [MSB]
2481 20:14:54.584186 39, [0] oxxxooox xxxxxoox [MSB]
2482 20:14:54.587314 40, [0] oxxxxoox xxxxxoox [MSB]
2483 20:14:54.590740 41, [0] xxxxxoxx xxxxxxxx [MSB]
2484 20:14:54.591256 42, [0] xxxxxoxx xxxxxxxx [MSB]
2485 20:14:54.593923 43, [0] xxxxxxxx xxxxxxxx [MSB]
2486 20:14:54.597418 iDelay=43, Bit 0, Center 22 (4 ~ 40) 37
2487 20:14:54.600240 iDelay=43, Bit 1, Center 20 (3 ~ 38) 36
2488 20:14:54.603792 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
2489 20:14:54.610051 iDelay=43, Bit 3, Center 16 (-2 ~ 35) 38
2490 20:14:54.613596 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
2491 20:14:54.616769 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
2492 20:14:54.620088 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
2493 20:14:54.623416 iDelay=43, Bit 7, Center 20 (2 ~ 38) 37
2494 20:14:54.626270 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
2495 20:14:54.629656 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2496 20:14:54.633214 iDelay=43, Bit 10, Center 20 (2 ~ 38) 37
2497 20:14:54.636549 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
2498 20:14:54.639832 iDelay=43, Bit 12, Center 21 (4 ~ 38) 35
2499 20:14:54.646326 iDelay=43, Bit 13, Center 22 (4 ~ 40) 37
2500 20:14:54.649218 iDelay=43, Bit 14, Center 21 (3 ~ 40) 38
2501 20:14:54.652522 iDelay=43, Bit 15, Center 13 (-5 ~ 31) 37
2502 20:14:54.652911 ==
2503 20:14:54.656135 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2504 20:14:54.659637 fsp= 1, odt_onoff= 1, Byte mode= 0
2505 20:14:54.660022 ==
2506 20:14:54.662419 DQS Delay:
2507 20:14:54.662802 DQS0 = 0, DQS1 = 0
2508 20:14:54.665947 DQM Delay:
2509 20:14:54.666328 DQM0 = 20, DQM1 = 18
2510 20:14:54.668908 DQ Delay:
2511 20:14:54.669287 DQ0 =22, DQ1 =20, DQ2 =17, DQ3 =16
2512 20:14:54.672392 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
2513 20:14:54.675929 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2514 20:14:54.678848 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =13
2515 20:14:54.682223
2516 20:14:54.682614
2517 20:14:54.682938 DramC Write-DBI off
2518 20:14:54.683227 ==
2519 20:14:54.688810 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2520 20:14:54.691839 fsp= 1, odt_onoff= 1, Byte mode= 0
2521 20:14:54.692227 ==
2522 20:14:54.695642 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2523 20:14:54.696154
2524 20:14:54.698712 Begin, DQ Scan Range 924~1180
2525 20:14:54.699116
2526 20:14:54.699428
2527 20:14:54.702006 TX Vref Scan disable
2528 20:14:54.705007 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2529 20:14:54.708670 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2530 20:14:54.711370 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2531 20:14:54.714892 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2532 20:14:54.718324 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2533 20:14:54.721667 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2534 20:14:54.725003 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2535 20:14:54.727626 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2536 20:14:54.731001 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2537 20:14:54.734641 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2538 20:14:54.740919 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2539 20:14:54.744817 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2540 20:14:54.747647 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2541 20:14:54.750951 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2542 20:14:54.754097 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2543 20:14:54.757380 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2544 20:14:54.760811 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2545 20:14:54.763708 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2546 20:14:54.767222 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2547 20:14:54.770357 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2548 20:14:54.773879 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2549 20:14:54.776751 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2550 20:14:54.780213 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2551 20:14:54.786461 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2552 20:14:54.789893 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2553 20:14:54.793368 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2554 20:14:54.796232 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2555 20:14:54.799478 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2556 20:14:54.803300 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2557 20:14:54.806090 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2558 20:14:54.809333 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2559 20:14:54.812765 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2560 20:14:54.816276 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2561 20:14:54.819121 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2562 20:14:54.822656 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2563 20:14:54.825882 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2564 20:14:54.832412 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2565 20:14:54.835454 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2566 20:14:54.838925 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2567 20:14:54.842474 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2568 20:14:54.845188 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2569 20:14:54.848708 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2570 20:14:54.852090 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2571 20:14:54.855169 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2572 20:14:54.858337 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2573 20:14:54.862050 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2574 20:14:54.864866 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2575 20:14:54.868316 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2576 20:14:54.871782 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2577 20:14:54.874619 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2578 20:14:54.878124 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
2579 20:14:54.881632 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
2580 20:14:54.888002 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
2581 20:14:54.891473 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2582 20:14:54.894255 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2583 20:14:54.897983 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2584 20:14:54.901269 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2585 20:14:54.904503 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2586 20:14:54.907862 982 |3 6 22|[0] xxxxxxxo oooooooo [MSB]
2587 20:14:54.910695 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
2588 20:14:54.917457 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2589 20:14:54.920645 992 |3 6 32|[0] oooooooo oxooooox [MSB]
2590 20:14:54.924165 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2591 20:14:54.927360 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2592 20:14:54.930753 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2593 20:14:54.934330 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2594 20:14:54.937377 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2595 20:14:54.940284 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2596 20:14:54.943635 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2597 20:14:54.947112 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2598 20:14:54.950424 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2599 20:14:54.957132 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
2600 20:14:54.959876 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
2601 20:14:54.963444 1004 |3 6 44|[0] ooxxxoox xxxxxxxx [MSB]
2602 20:14:54.966327 1005 |3 6 45|[0] oxxxxoxx xxxxxxxx [MSB]
2603 20:14:54.969878 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2604 20:14:54.973079 Byte0, DQ PI dly=992, DQM PI dly= 992
2605 20:14:54.976455 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2606 20:14:54.976843
2607 20:14:54.983513 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2608 20:14:54.984017
2609 20:14:54.986312 Byte1, DQ PI dly=983, DQM PI dly= 983
2610 20:14:54.989865 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2611 20:14:54.990270
2612 20:14:54.992868 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2613 20:14:54.993297
2614 20:14:54.996147 ==
2615 20:14:54.999441 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2616 20:14:55.002954 fsp= 1, odt_onoff= 1, Byte mode= 0
2617 20:14:55.003489 ==
2618 20:14:55.006543 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2619 20:14:55.007004
2620 20:14:55.009190 Begin, DQ Scan Range 959~1023
2621 20:14:55.012810 Write Rank0 MR14 =0x0
2622 20:14:55.020965
2623 20:14:55.023866 CH=1, VrefRange= 0, VrefLevel = 0
2624 20:14:55.027691 TX Bit0 (985~1000) 16 992, Bit8 (976~990) 15 983,
2625 20:14:55.030242 TX Bit1 (984~999) 16 991, Bit9 (976~987) 12 981,
2626 20:14:55.037264 TX Bit2 (983~997) 15 990, Bit10 (978~991) 14 984,
2627 20:14:55.040028 TX Bit3 (979~994) 16 986, Bit11 (979~991) 13 985,
2628 20:14:55.043767 TX Bit4 (984~998) 15 991, Bit12 (979~991) 13 985,
2629 20:14:55.050372 TX Bit5 (985~999) 15 992, Bit13 (979~992) 14 985,
2630 20:14:55.053546 TX Bit6 (985~998) 14 991, Bit14 (979~991) 13 985,
2631 20:14:55.059603 TX Bit7 (985~998) 14 991, Bit15 (974~983) 10 978,
2632 20:14:55.060014
2633 20:14:55.060342 Write Rank0 MR14 =0x2
2634 20:14:55.068962
2635 20:14:55.069343 CH=1, VrefRange= 0, VrefLevel = 2
2636 20:14:55.075728 TX Bit0 (985~1000) 16 992, Bit8 (976~990) 15 983,
2637 20:14:55.078650 TX Bit1 (984~1000) 17 992, Bit9 (976~988) 13 982,
2638 20:14:55.085546 TX Bit2 (983~998) 16 990, Bit10 (977~992) 16 984,
2639 20:14:55.088441 TX Bit3 (979~995) 17 987, Bit11 (979~991) 13 985,
2640 20:14:55.092034 TX Bit4 (984~998) 15 991, Bit12 (978~991) 14 984,
2641 20:14:55.098340 TX Bit5 (985~1000) 16 992, Bit13 (979~992) 14 985,
2642 20:14:55.101839 TX Bit6 (984~998) 15 991, Bit14 (978~991) 14 984,
2643 20:14:55.107819 TX Bit7 (985~998) 14 991, Bit15 (974~984) 11 979,
2644 20:14:55.108043
2645 20:14:55.108250 Write Rank0 MR14 =0x4
2646 20:14:55.117296
2647 20:14:55.117484 CH=1, VrefRange= 0, VrefLevel = 4
2648 20:14:55.124417 TX Bit0 (985~1001) 17 993, Bit8 (975~990) 16 982,
2649 20:14:55.127307 TX Bit1 (984~1000) 17 992, Bit9 (975~989) 15 982,
2650 20:14:55.133801 TX Bit2 (982~998) 17 990, Bit10 (977~992) 16 984,
2651 20:14:55.137146 TX Bit3 (979~996) 18 987, Bit11 (978~992) 15 985,
2652 20:14:55.140734 TX Bit4 (983~999) 17 991, Bit12 (978~992) 15 985,
2653 20:14:55.147233 TX Bit5 (985~1001) 17 993, Bit13 (978~993) 16 985,
2654 20:14:55.150046 TX Bit6 (984~999) 16 991, Bit14 (978~992) 15 985,
2655 20:14:55.157041 TX Bit7 (984~999) 16 991, Bit15 (973~984) 12 978,
2656 20:14:55.157164
2657 20:14:55.157274 Write Rank0 MR14 =0x6
2658 20:14:55.166697
2659 20:14:55.166815 CH=1, VrefRange= 0, VrefLevel = 6
2660 20:14:55.173347 TX Bit0 (985~1002) 18 993, Bit8 (975~991) 17 983,
2661 20:14:55.176880 TX Bit1 (983~1001) 19 992, Bit9 (975~990) 16 982,
2662 20:14:55.183307 TX Bit2 (981~998) 18 989, Bit10 (977~992) 16 984,
2663 20:14:55.186341 TX Bit3 (979~997) 19 988, Bit11 (978~992) 15 985,
2664 20:14:55.189360 TX Bit4 (983~1000) 18 991, Bit12 (978~992) 15 985,
2665 20:14:55.196201 TX Bit5 (985~1001) 17 993, Bit13 (978~994) 17 986,
2666 20:14:55.199546 TX Bit6 (984~1000) 17 992, Bit14 (978~992) 15 985,
2667 20:14:55.205873 TX Bit7 (984~1000) 17 992, Bit15 (971~985) 15 978,
2668 20:14:55.206119
2669 20:14:55.206312 Write Rank0 MR14 =0x8
2670 20:14:55.215945
2671 20:14:55.216185 CH=1, VrefRange= 0, VrefLevel = 8
2672 20:14:55.222553 TX Bit0 (985~1002) 18 993, Bit8 (975~991) 17 983,
2673 20:14:55.225693 TX Bit1 (983~1002) 20 992, Bit9 (975~990) 16 982,
2674 20:14:55.232640 TX Bit2 (981~999) 19 990, Bit10 (977~993) 17 985,
2675 20:14:55.235314 TX Bit3 (978~997) 20 987, Bit11 (978~993) 16 985,
2676 20:14:55.242132 TX Bit4 (983~1000) 18 991, Bit12 (978~992) 15 985,
2677 20:14:55.245638 TX Bit5 (984~1002) 19 993, Bit13 (978~994) 17 986,
2678 20:14:55.248508 TX Bit6 (984~1001) 18 992, Bit14 (978~992) 15 985,
2679 20:14:55.255490 TX Bit7 (984~1000) 17 992, Bit15 (971~986) 16 978,
2680 20:14:55.255896
2681 20:14:55.256229 Write Rank0 MR14 =0xa
2682 20:14:55.265678
2683 20:14:55.268714 CH=1, VrefRange= 0, VrefLevel = 10
2684 20:14:55.272075 TX Bit0 (984~1004) 21 994, Bit8 (974~991) 18 982,
2685 20:14:55.275056 TX Bit1 (983~1002) 20 992, Bit9 (974~990) 17 982,
2686 20:14:55.282180 TX Bit2 (981~1000) 20 990, Bit10 (976~994) 19 985,
2687 20:14:55.284958 TX Bit3 (978~998) 21 988, Bit11 (978~994) 17 986,
2688 20:14:55.291683 TX Bit4 (982~1001) 20 991, Bit12 (977~993) 17 985,
2689 20:14:55.294964 TX Bit5 (985~1002) 18 993, Bit13 (978~995) 18 986,
2690 20:14:55.298632 TX Bit6 (984~1001) 18 992, Bit14 (977~993) 17 985,
2691 20:14:55.304893 TX Bit7 (983~1001) 19 992, Bit15 (971~987) 17 979,
2692 20:14:55.305532
2693 20:14:55.305910 Write Rank0 MR14 =0xc
2694 20:14:55.315454
2695 20:14:55.318425 CH=1, VrefRange= 0, VrefLevel = 12
2696 20:14:55.321864 TX Bit0 (985~1004) 20 994, Bit8 (974~992) 19 983,
2697 20:14:55.324817 TX Bit1 (983~1003) 21 993, Bit9 (974~990) 17 982,
2698 20:14:55.331423 TX Bit2 (980~1000) 21 990, Bit10 (976~994) 19 985,
2699 20:14:55.335368 TX Bit3 (978~998) 21 988, Bit11 (977~994) 18 985,
2700 20:14:55.342149 TX Bit4 (982~1002) 21 992, Bit12 (977~994) 18 985,
2701 20:14:55.345144 TX Bit5 (984~1004) 21 994, Bit13 (977~995) 19 986,
2702 20:14:55.347944 TX Bit6 (983~1002) 20 992, Bit14 (977~994) 18 985,
2703 20:14:55.354865 TX Bit7 (983~1001) 19 992, Bit15 (970~988) 19 979,
2704 20:14:55.355253
2705 20:14:55.355557 Write Rank0 MR14 =0xe
2706 20:14:55.365056
2707 20:14:55.368467 CH=1, VrefRange= 0, VrefLevel = 14
2708 20:14:55.371335 TX Bit0 (985~1004) 20 994, Bit8 (973~992) 20 982,
2709 20:14:55.374857 TX Bit1 (982~1004) 23 993, Bit9 (973~991) 19 982,
2710 20:14:55.381466 TX Bit2 (980~1001) 22 990, Bit10 (976~995) 20 985,
2711 20:14:55.384778 TX Bit3 (978~998) 21 988, Bit11 (977~995) 19 986,
2712 20:14:55.391134 TX Bit4 (982~1003) 22 992, Bit12 (977~995) 19 986,
2713 20:14:55.394555 TX Bit5 (984~1004) 21 994, Bit13 (977~996) 20 986,
2714 20:14:55.397645 TX Bit6 (983~1003) 21 993, Bit14 (977~994) 18 985,
2715 20:14:55.404108 TX Bit7 (983~1002) 20 992, Bit15 (970~989) 20 979,
2716 20:14:55.404496
2717 20:14:55.407198 Write Rank0 MR14 =0x10
2718 20:14:55.415217
2719 20:14:55.418380 CH=1, VrefRange= 0, VrefLevel = 16
2720 20:14:55.421408 TX Bit0 (984~1005) 22 994, Bit8 (972~992) 21 982,
2721 20:14:55.424941 TX Bit1 (982~1004) 23 993, Bit9 (973~991) 19 982,
2722 20:14:55.431265 TX Bit2 (979~1001) 23 990, Bit10 (976~996) 21 986,
2723 20:14:55.434756 TX Bit3 (978~998) 21 988, Bit11 (977~996) 20 986,
2724 20:14:55.441493 TX Bit4 (981~1003) 23 992, Bit12 (977~995) 19 986,
2725 20:14:55.444499 TX Bit5 (984~1005) 22 994, Bit13 (977~997) 21 987,
2726 20:14:55.448095 TX Bit6 (983~1004) 22 993, Bit14 (977~995) 19 986,
2727 20:14:55.454246 TX Bit7 (983~1003) 21 993, Bit15 (970~989) 20 979,
2728 20:14:55.454685
2729 20:14:55.455045 Write Rank0 MR14 =0x12
2730 20:14:55.465369
2731 20:14:55.468103 CH=1, VrefRange= 0, VrefLevel = 18
2732 20:14:55.471542 TX Bit0 (984~1005) 22 994, Bit8 (973~993) 21 983,
2733 20:14:55.474637 TX Bit1 (981~1005) 25 993, Bit9 (972~991) 20 981,
2734 20:14:55.481370 TX Bit2 (979~1001) 23 990, Bit10 (975~996) 22 985,
2735 20:14:55.484274 TX Bit3 (977~999) 23 988, Bit11 (977~997) 21 987,
2736 20:14:55.490613 TX Bit4 (981~1004) 24 992, Bit12 (977~996) 20 986,
2737 20:14:55.494087 TX Bit5 (984~1005) 22 994, Bit13 (977~997) 21 987,
2738 20:14:55.497701 TX Bit6 (982~1004) 23 993, Bit14 (977~996) 20 986,
2739 20:14:55.503808 TX Bit7 (982~1004) 23 993, Bit15 (970~990) 21 980,
2740 20:14:55.503926
2741 20:14:55.504005 Write Rank0 MR14 =0x14
2742 20:14:55.514342
2743 20:14:55.518016 CH=1, VrefRange= 0, VrefLevel = 20
2744 20:14:55.521208 TX Bit0 (983~1005) 23 994, Bit8 (972~994) 23 983,
2745 20:14:55.524076 TX Bit1 (981~1005) 25 993, Bit9 (972~992) 21 982,
2746 20:14:55.530909 TX Bit2 (979~1002) 24 990, Bit10 (975~997) 23 986,
2747 20:14:55.534320 TX Bit3 (977~999) 23 988, Bit11 (976~997) 22 986,
2748 20:14:55.541016 TX Bit4 (981~1004) 24 992, Bit12 (976~997) 22 986,
2749 20:14:55.543944 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
2750 20:14:55.547119 TX Bit6 (982~1004) 23 993, Bit14 (977~997) 21 987,
2751 20:14:55.553779 TX Bit7 (982~1004) 23 993, Bit15 (970~990) 21 980,
2752 20:14:55.553877
2753 20:14:55.557163 Write Rank0 MR14 =0x16
2754 20:14:55.564470
2755 20:14:55.568031 CH=1, VrefRange= 0, VrefLevel = 22
2756 20:14:55.571159 TX Bit0 (983~1006) 24 994, Bit8 (971~994) 24 982,
2757 20:14:55.574351 TX Bit1 (981~1005) 25 993, Bit9 (972~992) 21 982,
2758 20:14:55.580785 TX Bit2 (979~1003) 25 991, Bit10 (975~997) 23 986,
2759 20:14:55.584489 TX Bit3 (977~1000) 24 988, Bit11 (976~998) 23 987,
2760 20:14:55.591166 TX Bit4 (980~1005) 26 992, Bit12 (976~997) 22 986,
2761 20:14:55.593883 TX Bit5 (983~1005) 23 994, Bit13 (977~998) 22 987,
2762 20:14:55.597330 TX Bit6 (982~1005) 24 993, Bit14 (976~997) 22 986,
2763 20:14:55.604009 TX Bit7 (982~1005) 24 993, Bit15 (969~990) 22 979,
2764 20:14:55.604100
2765 20:14:55.607420 Write Rank0 MR14 =0x18
2766 20:14:55.614937
2767 20:14:55.618443 CH=1, VrefRange= 0, VrefLevel = 24
2768 20:14:55.621358 TX Bit0 (983~1006) 24 994, Bit8 (971~995) 25 983,
2769 20:14:55.624847 TX Bit1 (981~1005) 25 993, Bit9 (971~992) 22 981,
2770 20:14:55.631500 TX Bit2 (978~1004) 27 991, Bit10 (974~998) 25 986,
2771 20:14:55.634821 TX Bit3 (977~1000) 24 988, Bit11 (976~998) 23 987,
2772 20:14:55.641340 TX Bit4 (980~1005) 26 992, Bit12 (976~998) 23 987,
2773 20:14:55.644560 TX Bit5 (983~1006) 24 994, Bit13 (976~998) 23 987,
2774 20:14:55.647971 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
2775 20:14:55.654524 TX Bit7 (981~1005) 25 993, Bit15 (969~991) 23 980,
2776 20:14:55.654616
2777 20:14:55.657262 Write Rank0 MR14 =0x1a
2778 20:14:55.665159
2779 20:14:55.668645 CH=1, VrefRange= 0, VrefLevel = 26
2780 20:14:55.671673 TX Bit0 (983~1006) 24 994, Bit8 (971~996) 26 983,
2781 20:14:55.674683 TX Bit1 (981~1005) 25 993, Bit9 (971~993) 23 982,
2782 20:14:55.681564 TX Bit2 (978~1004) 27 991, Bit10 (975~998) 24 986,
2783 20:14:55.684845 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
2784 20:14:55.691421 TX Bit4 (979~1005) 27 992, Bit12 (975~998) 24 986,
2785 20:14:55.694749 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
2786 20:14:55.698105 TX Bit6 (981~1005) 25 993, Bit14 (976~998) 23 987,
2787 20:14:55.704491 TX Bit7 (982~1005) 24 993, Bit15 (969~991) 23 980,
2788 20:14:55.704584
2789 20:14:55.707683 Write Rank0 MR14 =0x1c
2790 20:14:55.715906
2791 20:14:55.718541 CH=1, VrefRange= 0, VrefLevel = 28
2792 20:14:55.722055 TX Bit0 (983~1007) 25 995, Bit8 (971~996) 26 983,
2793 20:14:55.725635 TX Bit1 (981~1006) 26 993, Bit9 (971~993) 23 982,
2794 20:14:55.731923 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2795 20:14:55.735449 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
2796 20:14:55.741933 TX Bit4 (980~1005) 26 992, Bit12 (975~999) 25 987,
2797 20:14:55.744733 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
2798 20:14:55.748224 TX Bit6 (981~1006) 26 993, Bit14 (976~998) 23 987,
2799 20:14:55.755094 TX Bit7 (980~1005) 26 992, Bit15 (969~991) 23 980,
2800 20:14:55.755194
2801 20:14:55.758078 Write Rank0 MR14 =0x1e
2802 20:14:55.765879
2803 20:14:55.769232 CH=1, VrefRange= 0, VrefLevel = 30
2804 20:14:55.772813 TX Bit0 (982~1006) 25 994, Bit8 (971~995) 25 983,
2805 20:14:55.775529 TX Bit1 (980~1006) 27 993, Bit9 (971~993) 23 982,
2806 20:14:55.782164 TX Bit2 (978~1005) 28 991, Bit10 (975~998) 24 986,
2807 20:14:55.785397 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
2808 20:14:55.791723 TX Bit4 (980~1005) 26 992, Bit12 (975~998) 24 986,
2809 20:14:55.795289 TX Bit5 (982~1006) 25 994, Bit13 (975~999) 25 987,
2810 20:14:55.798636 TX Bit6 (980~1006) 27 993, Bit14 (975~998) 24 986,
2811 20:14:55.805273 TX Bit7 (980~1005) 26 992, Bit15 (969~991) 23 980,
2812 20:14:55.805756
2813 20:14:55.808550 Write Rank0 MR14 =0x20
2814 20:14:55.816335
2815 20:14:55.819552 CH=1, VrefRange= 0, VrefLevel = 32
2816 20:14:55.822584 TX Bit0 (982~1006) 25 994, Bit8 (970~995) 26 982,
2817 20:14:55.825909 TX Bit1 (980~1006) 27 993, Bit9 (970~993) 24 981,
2818 20:14:55.832772 TX Bit2 (978~1004) 27 991, Bit10 (975~998) 24 986,
2819 20:14:55.836589 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
2820 20:14:55.842999 TX Bit4 (981~1005) 25 993, Bit12 (975~998) 24 986,
2821 20:14:55.845865 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
2822 20:14:55.849307 TX Bit6 (980~1006) 27 993, Bit14 (974~999) 26 986,
2823 20:14:55.855497 TX Bit7 (980~1005) 26 992, Bit15 (969~992) 24 980,
2824 20:14:55.856008
2825 20:14:55.858533 Write Rank0 MR14 =0x22
2826 20:14:55.866145
2827 20:14:55.869146 CH=1, VrefRange= 0, VrefLevel = 34
2828 20:14:55.872672 TX Bit0 (982~1006) 25 994, Bit8 (970~995) 26 982,
2829 20:14:55.876016 TX Bit1 (980~1006) 27 993, Bit9 (970~993) 24 981,
2830 20:14:55.882514 TX Bit2 (978~1004) 27 991, Bit10 (975~998) 24 986,
2831 20:14:55.886017 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
2832 20:14:55.892318 TX Bit4 (981~1005) 25 993, Bit12 (975~998) 24 986,
2833 20:14:55.895595 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
2834 20:14:55.898696 TX Bit6 (980~1006) 27 993, Bit14 (974~999) 26 986,
2835 20:14:55.905130 TX Bit7 (980~1005) 26 992, Bit15 (969~992) 24 980,
2836 20:14:55.905279
2837 20:14:55.908419 Write Rank0 MR14 =0x24
2838 20:14:55.916488
2839 20:14:55.919640 CH=1, VrefRange= 0, VrefLevel = 36
2840 20:14:55.922855 TX Bit0 (982~1006) 25 994, Bit8 (970~995) 26 982,
2841 20:14:55.926196 TX Bit1 (980~1006) 27 993, Bit9 (970~993) 24 981,
2842 20:14:55.933154 TX Bit2 (978~1004) 27 991, Bit10 (975~998) 24 986,
2843 20:14:55.936261 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
2844 20:14:55.942974 TX Bit4 (981~1005) 25 993, Bit12 (975~998) 24 986,
2845 20:14:55.946310 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
2846 20:14:55.949219 TX Bit6 (980~1006) 27 993, Bit14 (974~999) 26 986,
2847 20:14:55.955975 TX Bit7 (980~1005) 26 992, Bit15 (969~992) 24 980,
2848 20:14:55.956437
2849 20:14:55.959290 Write Rank0 MR14 =0x26
2850 20:14:55.966805
2851 20:14:55.970682 CH=1, VrefRange= 0, VrefLevel = 38
2852 20:14:55.973683 TX Bit0 (982~1006) 25 994, Bit8 (970~995) 26 982,
2853 20:14:55.976577 TX Bit1 (980~1006) 27 993, Bit9 (970~993) 24 981,
2854 20:14:55.983455 TX Bit2 (978~1004) 27 991, Bit10 (975~998) 24 986,
2855 20:14:55.986282 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
2856 20:14:55.993189 TX Bit4 (981~1005) 25 993, Bit12 (975~998) 24 986,
2857 20:14:55.996012 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
2858 20:14:55.999414 TX Bit6 (980~1006) 27 993, Bit14 (974~999) 26 986,
2859 20:14:56.006083 TX Bit7 (980~1005) 26 992, Bit15 (969~992) 24 980,
2860 20:14:56.006503
2861 20:14:56.006858
2862 20:14:56.009180 TX Vref found, early break! 378< 386
2863 20:14:56.013017 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2864 20:14:56.015793 u1DelayCellOfst[0]=7 cells (6 PI)
2865 20:14:56.019193 u1DelayCellOfst[1]=6 cells (5 PI)
2866 20:14:56.022562 u1DelayCellOfst[2]=3 cells (3 PI)
2867 20:14:56.025527 u1DelayCellOfst[3]=0 cells (0 PI)
2868 20:14:56.029058 u1DelayCellOfst[4]=6 cells (5 PI)
2869 20:14:56.032127 u1DelayCellOfst[5]=6 cells (5 PI)
2870 20:14:56.035846 u1DelayCellOfst[6]=6 cells (5 PI)
2871 20:14:56.039030 u1DelayCellOfst[7]=5 cells (4 PI)
2872 20:14:56.041914 Byte0, DQ PI dly=988, DQM PI dly= 991
2873 20:14:56.045604 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2874 20:14:56.045990
2875 20:14:56.048583 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2876 20:14:56.052079
2877 20:14:56.052564 u1DelayCellOfst[8]=2 cells (2 PI)
2878 20:14:56.055257 u1DelayCellOfst[9]=1 cells (1 PI)
2879 20:14:56.058477 u1DelayCellOfst[10]=7 cells (6 PI)
2880 20:14:56.061568 u1DelayCellOfst[11]=9 cells (7 PI)
2881 20:14:56.065252 u1DelayCellOfst[12]=7 cells (6 PI)
2882 20:14:56.068278 u1DelayCellOfst[13]=9 cells (7 PI)
2883 20:14:56.071547 u1DelayCellOfst[14]=7 cells (6 PI)
2884 20:14:56.075205 u1DelayCellOfst[15]=0 cells (0 PI)
2885 20:14:56.078014 Byte1, DQ PI dly=980, DQM PI dly= 983
2886 20:14:56.081555 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2887 20:14:56.081983
2888 20:14:56.087855 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2889 20:14:56.088283
2890 20:14:56.088619 Write Rank0 MR14 =0x20
2891 20:14:56.091251
2892 20:14:56.091670 Final TX Range 0 Vref 32
2893 20:14:56.092011
2894 20:14:56.097749 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2895 20:14:56.098174
2896 20:14:56.104590 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2897 20:14:56.110859 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2898 20:14:56.120991 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2899 20:14:56.121417 Write Rank0 MR3 =0xb0
2900 20:14:56.124357 DramC Write-DBI on
2901 20:14:56.124779 ==
2902 20:14:56.127334 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2903 20:14:56.130915 fsp= 1, odt_onoff= 1, Byte mode= 0
2904 20:14:56.131338 ==
2905 20:14:56.137258 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2906 20:14:56.137838
2907 20:14:56.138184 Begin, DQ Scan Range 703~767
2908 20:14:56.140787
2909 20:14:56.141209
2910 20:14:56.141578 TX Vref Scan disable
2911 20:14:56.143500 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2912 20:14:56.147186 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2913 20:14:56.150025 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2914 20:14:56.153500 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2915 20:14:56.156695 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2916 20:14:56.163489 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2917 20:14:56.167244 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2918 20:14:56.169753 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2919 20:14:56.173204 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2920 20:14:56.176355 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2921 20:14:56.180025 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2922 20:14:56.182797 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2923 20:14:56.186343 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2924 20:14:56.189205 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2925 20:14:56.192593 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2926 20:14:56.196307 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2927 20:14:56.199125 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2928 20:14:56.202646 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2929 20:14:56.206383 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2930 20:14:56.212664 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2931 20:14:56.215942 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2932 20:14:56.221637 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2933 20:14:56.224856 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2934 20:14:56.228399 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2935 20:14:56.231496 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2936 20:14:56.234845 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2937 20:14:56.237926 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2938 20:14:56.241667 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2939 20:14:56.245222 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2940 20:14:56.248080 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2941 20:14:56.251353 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2942 20:14:56.255023 Byte0, DQ PI dly=736, DQM PI dly= 736
2943 20:14:56.260988 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2944 20:14:56.261261
2945 20:14:56.264412 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2946 20:14:56.264660
2947 20:14:56.267502 Byte1, DQ PI dly=727, DQM PI dly= 727
2948 20:14:56.270833 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
2949 20:14:56.270925
2950 20:14:56.277612 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
2951 20:14:56.277706
2952 20:14:56.284652 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2953 20:14:56.290844 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2954 20:14:56.297206 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2955 20:14:56.300844 Write Rank0 MR3 =0x30
2956 20:14:56.301021 DramC Write-DBI off
2957 20:14:56.301126
2958 20:14:56.303453 [DATLAT]
2959 20:14:56.303584 Freq=1600, CH1 RK0, use_rxtx_scan=0
2960 20:14:56.307148
2961 20:14:56.307293 DATLAT Default: 0xf
2962 20:14:56.310548 7, 0xFFFF, sum=0
2963 20:14:56.310717 8, 0xFFFF, sum=0
2964 20:14:56.313237 9, 0xFFFF, sum=0
2965 20:14:56.313407 10, 0xFFFF, sum=0
2966 20:14:56.316844 11, 0xFFFF, sum=0
2967 20:14:56.317037 12, 0xFFFF, sum=0
2968 20:14:56.319986 13, 0xFFFF, sum=0
2969 20:14:56.320179 14, 0x0, sum=1
2970 20:14:56.320333 15, 0x0, sum=2
2971 20:14:56.323733 16, 0x0, sum=3
2972 20:14:56.324056 17, 0x0, sum=4
2973 20:14:56.329876 pattern=2 first_step=14 total pass=5 best_step=16
2974 20:14:56.330184 ==
2975 20:14:56.333289 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2976 20:14:56.336870 fsp= 1, odt_onoff= 1, Byte mode= 0
2977 20:14:56.337401 ==
2978 20:14:56.343070 Start DQ dly to find pass range UseTestEngine =1
2979 20:14:56.346000 x-axis: bit #, y-axis: DQ dly (-127~63)
2980 20:14:56.346092 RX Vref Scan = 1
2981 20:14:56.453960
2982 20:14:56.454481 RX Vref found, early break!
2983 20:14:56.454822
2984 20:14:56.460729 Final RX Vref 11, apply to both rank0 and 1
2985 20:14:56.461155 ==
2986 20:14:56.463967 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2987 20:14:56.466880 fsp= 1, odt_onoff= 1, Byte mode= 0
2988 20:14:56.467305 ==
2989 20:14:56.470476 DQS Delay:
2990 20:14:56.470897 DQS0 = 0, DQS1 = 0
2991 20:14:56.471233 DQM Delay:
2992 20:14:56.473391 DQM0 = 19, DQM1 = 18
2993 20:14:56.473841 DQ Delay:
2994 20:14:56.476904 DQ0 =20, DQ1 =21, DQ2 =18, DQ3 =15
2995 20:14:56.480592 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =19
2996 20:14:56.483606 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
2997 20:14:56.486800 DQ12 =20, DQ13 =21, DQ14 =20, DQ15 =12
2998 20:14:56.487224
2999 20:14:56.487562
3000 20:14:56.487877
3001 20:14:56.489921 [DramC_TX_OE_Calibration] TA2
3002 20:14:56.493167 Original DQ_B0 (3 6) =30, OEN = 27
3003 20:14:56.496562 Original DQ_B1 (3 6) =30, OEN = 27
3004 20:14:56.499957 23, 0x0, End_B0=23 End_B1=23
3005 20:14:56.503043 24, 0x0, End_B0=24 End_B1=24
3006 20:14:56.503480 25, 0x0, End_B0=25 End_B1=25
3007 20:14:56.506909 26, 0x0, End_B0=26 End_B1=26
3008 20:14:56.509752 27, 0x0, End_B0=27 End_B1=27
3009 20:14:56.512713 28, 0x0, End_B0=28 End_B1=28
3010 20:14:56.516005 29, 0x0, End_B0=29 End_B1=29
3011 20:14:56.516449 30, 0x0, End_B0=30 End_B1=30
3012 20:14:56.519320 31, 0xFFFF, End_B0=30 End_B1=30
3013 20:14:56.526217 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3014 20:14:56.532740 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3015 20:14:56.533129
3016 20:14:56.533552
3017 20:14:56.533889 Write Rank0 MR23 =0x3f
3018 20:14:56.535742 [DQSOSC]
3019 20:14:56.542712 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3020 20:14:56.549127 CH1_RK0: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3021 20:14:56.551987 Write Rank0 MR23 =0x3f
3022 20:14:56.552371 [DQSOSC]
3023 20:14:56.559233 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3024 20:14:56.562084 CH1 RK0: MR19=202, MR18=B6B6
3025 20:14:56.565323 [RankSwap] Rank num 2, (Multi 1), Rank 1
3026 20:14:56.568654 Write Rank0 MR2 =0xad
3027 20:14:56.569177 [Write Leveling]
3028 20:14:56.572264 delay byte0 byte1 byte2 byte3
3029 20:14:56.572862
3030 20:14:56.575642 10 0 0
3031 20:14:56.576182 11 0 0
3032 20:14:56.578546 12 0 0
3033 20:14:56.578979 13 0 0
3034 20:14:56.579325 14 0 0
3035 20:14:56.581915 15 0 0
3036 20:14:56.582348 16 0 0
3037 20:14:56.584984 17 0 0
3038 20:14:56.585413 18 0 0
3039 20:14:56.585812 19 0 0
3040 20:14:56.588491 20 0 0
3041 20:14:56.588923 21 0 0
3042 20:14:56.591680 22 0 0
3043 20:14:56.592112 23 0 0
3044 20:14:56.594558 24 0 0
3045 20:14:56.594991 25 0 0
3046 20:14:56.595337 26 0 ff
3047 20:14:56.598081 27 0 ff
3048 20:14:56.598513 28 0 ff
3049 20:14:56.601339 29 0 ff
3050 20:14:56.601810 30 0 ff
3051 20:14:56.604391 31 0 ff
3052 20:14:56.604822 32 0 ff
3053 20:14:56.608337 33 ff ff
3054 20:14:56.608870 34 ff ff
3055 20:14:56.612038 35 ff ff
3056 20:14:56.612570 36 ff ff
3057 20:14:56.614222 37 ff ff
3058 20:14:56.614724 38 ff ff
3059 20:14:56.615076 39 ff ff
3060 20:14:56.621406 pass bytecount = 0xff (0xff: all bytes pass)
3061 20:14:56.621868
3062 20:14:56.622207 DQS0 dly: 33
3063 20:14:56.622525 DQS1 dly: 26
3064 20:14:56.624063 Write Rank0 MR2 =0x2d
3065 20:14:56.627585 [RankSwap] Rank num 2, (Multi 1), Rank 0
3066 20:14:56.631389 Write Rank1 MR1 =0xd6
3067 20:14:56.631985 [Gating]
3068 20:14:56.632353 ==
3069 20:14:56.637240 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3070 20:14:56.641293 fsp= 1, odt_onoff= 1, Byte mode= 0
3071 20:14:56.641875 ==
3072 20:14:56.643928 3 1 0 |2c2b 1717 |(11 11)(11 11) |(1 1)(1 1)| 0
3073 20:14:56.646940 3 1 4 |2c2b 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
3074 20:14:56.653934 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3075 20:14:56.656799 3 1 12 |2c2b 3635 |(11 11)(11 11) |(0 0)(0 0)| 0
3076 20:14:56.660001 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3077 20:14:56.666971 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3078 20:14:56.669867 3 1 24 |2c2b 3535 |(11 11)(0 0) |(1 0)(1 1)| 0
3079 20:14:56.673227 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3080 20:14:56.679883 [Byte 1] Lead/lag falling Transition (3, 1, 28)
3081 20:14:56.683012 3 2 0 |2c2b 1c1c |(11 11)(11 11) |(1 0)(0 1)| 0
3082 20:14:56.686240 3 2 4 |2c2b 1818 |(11 11)(11 11) |(1 0)(0 1)| 0
3083 20:14:56.692806 3 2 8 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 1)| 0
3084 20:14:56.696363 3 2 12 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 1)| 0
3085 20:14:56.699939 3 2 16 |2c2c 3433 |(11 10)(11 11) |(0 0)(0 1)| 0
3086 20:14:56.705869 3 2 20 |201 201 |(11 11)(11 11) |(0 0)(0 1)| 0
3087 20:14:56.709544 3 2 24 |3534 807 |(11 11)(11 11) |(0 0)(1 1)| 0
3088 20:14:56.712598 3 2 28 |3534 100f |(11 11)(11 11) |(0 0)(1 1)| 0
3089 20:14:56.719146 3 3 0 |3534 3e3d |(11 11)(11 11) |(0 0)(1 1)| 0
3090 20:14:56.722340 [Byte 1] Lead/lag Transition tap number (1)
3091 20:14:56.725855 3 3 4 |3534 2222 |(11 11)(11 11) |(0 0)(0 0)| 0
3092 20:14:56.728900 3 3 8 |3534 3b3b |(11 11)(10 10) |(1 1)(0 0)| 0
3093 20:14:56.735398 [Byte 0] Lead/lag Transition tap number (1)
3094 20:14:56.738874 3 3 12 |3534 3d3d |(11 11)(0 0) |(0 0)(0 0)| 0
3095 20:14:56.741956 3 3 16 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3096 20:14:56.748329 3 3 20 |3534 3232 |(11 11)(11 11) |(1 1)(1 1)| 0
3097 20:14:56.751745 3 3 24 |3534 1313 |(11 11)(11 11) |(1 1)(1 1)| 0
3098 20:14:56.754983 3 3 28 |3534 2f2e |(11 11)(11 11) |(0 1)(1 1)| 0
3099 20:14:56.761814 3 4 0 |3534 2c2b |(11 11)(11 11) |(0 1)(0 1)| 0
3100 20:14:56.765651 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3101 20:14:56.768447 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3102 20:14:56.774420 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3103 20:14:56.777516 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3104 20:14:56.781079 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3105 20:14:56.787493 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3106 20:14:56.790611 3 4 28 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
3107 20:14:56.794043 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 20:14:56.797412 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3109 20:14:56.803660 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 20:14:56.807185 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3111 20:14:56.810773 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3112 20:14:56.816896 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3113 20:14:56.820380 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3114 20:14:56.823594 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3115 20:14:56.829952 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3116 20:14:56.833559 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3117 20:14:56.836899 [Byte 0] Lead/lag falling Transition (3, 6, 4)
3118 20:14:56.843781 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3119 20:14:56.846824 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3120 20:14:56.850060 [Byte 0] Lead/lag Transition tap number (3)
3121 20:14:56.856481 3 6 16 |1e1e 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3122 20:14:56.859508 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3123 20:14:56.862961 3 6 20 |808 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3124 20:14:56.866165 [Byte 1] Lead/lag Transition tap number (2)
3125 20:14:56.873151 3 6 24 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3126 20:14:56.873640 [Byte 0]First pass (3, 6, 24)
3127 20:14:56.879355 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3128 20:14:56.879825 [Byte 1]First pass (3, 6, 28)
3129 20:14:56.885812 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3130 20:14:56.889319 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3131 20:14:56.892668 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3132 20:14:56.895845 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3133 20:14:56.902380 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3134 20:14:56.905635 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3135 20:14:56.909138 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3136 20:14:56.912232 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3137 20:14:56.915564 All bytes gating window > 1UI, Early break!
3138 20:14:56.918705
3139 20:14:56.921936 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
3140 20:14:56.922359
3141 20:14:56.925309 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3142 20:14:56.925736
3143 20:14:56.926060
3144 20:14:56.926545
3145 20:14:56.928587 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
3146 20:14:56.929015
3147 20:14:56.931946 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3148 20:14:56.932441
3149 20:14:56.932798
3150 20:14:56.934744 Write Rank1 MR1 =0x56
3151 20:14:56.935172
3152 20:14:56.938543 best RODT dly(2T, 0.5T) = (2, 3)
3153 20:14:56.938972
3154 20:14:56.941774 best RODT dly(2T, 0.5T) = (2, 3)
3155 20:14:56.942203 ==
3156 20:14:56.948172 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3157 20:14:56.951700 fsp= 1, odt_onoff= 1, Byte mode= 0
3158 20:14:56.952158 ==
3159 20:14:56.954403 Start DQ dly to find pass range UseTestEngine =0
3160 20:14:56.957925 x-axis: bit #, y-axis: DQ dly (-127~63)
3161 20:14:56.961098 RX Vref Scan = 0
3162 20:14:56.961552 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3163 20:14:56.964630 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3164 20:14:56.967673 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3165 20:14:56.970857 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3166 20:14:56.974037 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3167 20:14:56.977524 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3168 20:14:56.981098 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3169 20:14:56.984299 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3170 20:14:56.987323 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3171 20:14:56.987879 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3172 20:14:56.990545 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3173 20:14:56.993924 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3174 20:14:56.997208 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3175 20:14:57.000369 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3176 20:14:57.003331 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3177 20:14:57.006728 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3178 20:14:57.010158 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3179 20:14:57.013336 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3180 20:14:57.013510 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3181 20:14:57.016531 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3182 20:14:57.019723 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3183 20:14:57.023373 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3184 20:14:57.027228 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3185 20:14:57.029836 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3186 20:14:57.033202 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3187 20:14:57.036244 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3188 20:14:57.036340 0, [0] xxxoxxxx ooxxxxxo [MSB]
3189 20:14:57.039419 1, [0] xxxoxxxx ooxxxxxo [MSB]
3190 20:14:57.042402 2, [0] xxxoxxxx ooxxxxxo [MSB]
3191 20:14:57.045701 3, [0] xxooxxxo oooxoxxo [MSB]
3192 20:14:57.049261 4, [0] oxoooxxo oooooooo [MSB]
3193 20:14:57.052091 32, [0] oooooooo ooooooox [MSB]
3194 20:14:57.055487 33, [0] oooooooo ooooooox [MSB]
3195 20:14:57.055586 34, [0] oooooooo ooooooox [MSB]
3196 20:14:57.059041 35, [0] ooxxoooo oxooooox [MSB]
3197 20:14:57.062113 36, [0] ooxxoooo xxooooox [MSB]
3198 20:14:57.065546 37, [0] ooxxoooo xxooooox [MSB]
3199 20:14:57.068538 38, [0] ooxxoooo xxooooox [MSB]
3200 20:14:57.071872 39, [0] oxxxooox xxooooox [MSB]
3201 20:14:57.075260 40, [0] oxxxooox xxxxxoox [MSB]
3202 20:14:57.078452 41, [0] xxxxxoxx xxxxxoox [MSB]
3203 20:14:57.078588 42, [0] xxxxxxxx xxxxxxxx [MSB]
3204 20:14:57.081969 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3205 20:14:57.088478 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3206 20:14:57.091724 iDelay=42, Bit 2, Center 18 (3 ~ 34) 32
3207 20:14:57.094803 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3208 20:14:57.098316 iDelay=42, Bit 4, Center 22 (4 ~ 40) 37
3209 20:14:57.101373 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3210 20:14:57.105321 iDelay=42, Bit 6, Center 22 (5 ~ 40) 36
3211 20:14:57.107960 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3212 20:14:57.111265 iDelay=42, Bit 8, Center 17 (-1 ~ 35) 37
3213 20:14:57.115063 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3214 20:14:57.117871 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3215 20:14:57.121414 iDelay=42, Bit 11, Center 21 (4 ~ 39) 36
3216 20:14:57.127530 iDelay=42, Bit 12, Center 21 (3 ~ 39) 37
3217 20:14:57.130731 iDelay=42, Bit 13, Center 22 (4 ~ 41) 38
3218 20:14:57.134196 iDelay=42, Bit 14, Center 22 (4 ~ 41) 38
3219 20:14:57.137559 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
3220 20:14:57.137652 ==
3221 20:14:57.143859 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3222 20:14:57.143954 fsp= 1, odt_onoff= 1, Byte mode= 0
3223 20:14:57.147212 ==
3224 20:14:57.147306 DQS Delay:
3225 20:14:57.147380 DQS0 = 0, DQS1 = 0
3226 20:14:57.150787 DQM Delay:
3227 20:14:57.150880 DQM0 = 20, DQM1 = 19
3228 20:14:57.153636 DQ Delay:
3229 20:14:57.156990 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3230 20:14:57.160415 DQ4 =22, DQ5 =23, DQ6 =22, DQ7 =20
3231 20:14:57.163559 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =21
3232 20:14:57.167138 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
3233 20:14:57.167232
3234 20:14:57.167306
3235 20:14:57.167375 DramC Write-DBI off
3236 20:14:57.167441 ==
3237 20:14:57.173661 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3238 20:14:57.176457 fsp= 1, odt_onoff= 1, Byte mode= 0
3239 20:14:57.176551 ==
3240 20:14:57.179835 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3241 20:14:57.179930
3242 20:14:57.183467 Begin, DQ Scan Range 922~1178
3243 20:14:57.183562
3244 20:14:57.183636
3245 20:14:57.186319 TX Vref Scan disable
3246 20:14:57.189841 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3247 20:14:57.193378 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3248 20:14:57.196680 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3249 20:14:57.199381 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3250 20:14:57.202846 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3251 20:14:57.206451 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3252 20:14:57.209276 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3253 20:14:57.213185 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3254 20:14:57.216048 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3255 20:14:57.222829 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3256 20:14:57.225992 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3257 20:14:57.229159 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3258 20:14:57.232282 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3259 20:14:57.235523 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3260 20:14:57.239010 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3261 20:14:57.242339 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3262 20:14:57.245951 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3263 20:14:57.248455 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3264 20:14:57.252607 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3265 20:14:57.255360 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3266 20:14:57.258809 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3267 20:14:57.264943 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3268 20:14:57.268642 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3269 20:14:57.271827 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3270 20:14:57.274656 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3271 20:14:57.278287 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3272 20:14:57.281482 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3273 20:14:57.284782 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3274 20:14:57.287851 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3275 20:14:57.291437 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3276 20:14:57.294614 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3277 20:14:57.297557 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3278 20:14:57.301116 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3279 20:14:57.304651 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3280 20:14:57.310708 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3281 20:14:57.314673 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3282 20:14:57.317229 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3283 20:14:57.320605 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3284 20:14:57.323912 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3285 20:14:57.327254 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3286 20:14:57.330647 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3287 20:14:57.333930 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3288 20:14:57.336774 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3289 20:14:57.340519 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3290 20:14:57.343806 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3291 20:14:57.346855 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3292 20:14:57.350232 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3293 20:14:57.353445 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3294 20:14:57.356879 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3295 20:14:57.360054 971 |3 6 11|[0] xxxxxxxx xoxxxxxo [MSB]
3296 20:14:57.366364 972 |3 6 12|[0] xxxxxxxx xoxxxxxo [MSB]
3297 20:14:57.369849 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
3298 20:14:57.373197 974 |3 6 14|[0] xxxxxxxx oooxxxxo [MSB]
3299 20:14:57.376356 975 |3 6 15|[0] xxxxxxxx ooooxxoo [MSB]
3300 20:14:57.379688 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3301 20:14:57.382967 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3302 20:14:57.386591 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3303 20:14:57.389304 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3304 20:14:57.392903 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3305 20:14:57.396204 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
3306 20:14:57.399652 982 |3 6 22|[0] xooooooo oooooooo [MSB]
3307 20:14:57.406576 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3308 20:14:57.410148 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3309 20:14:57.413768 992 |3 6 32|[0] oooooooo xxooooox [MSB]
3310 20:14:57.416952 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3311 20:14:57.419922 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3312 20:14:57.423069 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3313 20:14:57.426393 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3314 20:14:57.429893 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3315 20:14:57.432780 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3316 20:14:57.437145 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3317 20:14:57.439331 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3318 20:14:57.442868 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
3319 20:14:57.449166 1002 |3 6 42|[0] ooxxooox xxxxxxxx [MSB]
3320 20:14:57.452716 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3321 20:14:57.455976 Byte0, DQ PI dly=990, DQM PI dly= 990
3322 20:14:57.459299 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
3323 20:14:57.459738
3324 20:14:57.462598 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
3325 20:14:57.463004
3326 20:14:57.465837 Byte1, DQ PI dly=982, DQM PI dly= 982
3327 20:14:57.472561 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3328 20:14:57.473059
3329 20:14:57.475274 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3330 20:14:57.475701
3331 20:14:57.476044 ==
3332 20:14:57.481948 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3333 20:14:57.485246 fsp= 1, odt_onoff= 1, Byte mode= 0
3334 20:14:57.485715 ==
3335 20:14:57.488554 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3336 20:14:57.488976
3337 20:14:57.492123 Begin, DQ Scan Range 958~1022
3338 20:14:57.494872 Write Rank1 MR14 =0x0
3339 20:14:57.502406
3340 20:14:57.502893 CH=1, VrefRange= 0, VrefLevel = 0
3341 20:14:57.508827 TX Bit0 (984~1000) 17 992, Bit8 (976~986) 11 981,
3342 20:14:57.512061 TX Bit1 (983~998) 16 990, Bit9 (975~985) 11 980,
3343 20:14:57.518849 TX Bit2 (982~996) 15 989, Bit10 (976~991) 16 983,
3344 20:14:57.521643 TX Bit3 (979~991) 13 985, Bit11 (977~991) 15 984,
3345 20:14:57.525109 TX Bit4 (983~998) 16 990, Bit12 (978~989) 12 983,
3346 20:14:57.531448 TX Bit5 (984~999) 16 991, Bit13 (978~991) 14 984,
3347 20:14:57.534835 TX Bit6 (984~998) 15 991, Bit14 (977~990) 14 983,
3348 20:14:57.541346 TX Bit7 (984~997) 14 990, Bit15 (971~983) 13 977,
3349 20:14:57.541487
3350 20:14:57.541562 Write Rank1 MR14 =0x2
3351 20:14:57.551217
3352 20:14:57.551393 CH=1, VrefRange= 0, VrefLevel = 2
3353 20:14:57.557751 TX Bit0 (984~1001) 18 992, Bit8 (976~986) 11 981,
3354 20:14:57.560758 TX Bit1 (983~998) 16 990, Bit9 (974~986) 13 980,
3355 20:14:57.567495 TX Bit2 (982~997) 16 989, Bit10 (976~992) 17 984,
3356 20:14:57.570548 TX Bit3 (978~992) 15 985, Bit11 (977~992) 16 984,
3357 20:14:57.573932 TX Bit4 (983~999) 17 991, Bit12 (978~990) 13 984,
3358 20:14:57.580417 TX Bit5 (984~1000) 17 992, Bit13 (977~992) 16 984,
3359 20:14:57.584150 TX Bit6 (983~998) 16 990, Bit14 (977~990) 14 983,
3360 20:14:57.590050 TX Bit7 (984~997) 14 990, Bit15 (971~984) 14 977,
3361 20:14:57.590182
3362 20:14:57.590286 Write Rank1 MR14 =0x4
3363 20:14:57.600166
3364 20:14:57.600400 CH=1, VrefRange= 0, VrefLevel = 4
3365 20:14:57.606536 TX Bit0 (984~1001) 18 992, Bit8 (976~987) 12 981,
3366 20:14:57.609940 TX Bit1 (984~999) 16 991, Bit9 (973~987) 15 980,
3367 20:14:57.616496 TX Bit2 (980~997) 18 988, Bit10 (976~992) 17 984,
3368 20:14:57.619994 TX Bit3 (978~993) 16 985, Bit11 (977~992) 16 984,
3369 20:14:57.623073 TX Bit4 (982~999) 18 990, Bit12 (978~990) 13 984,
3370 20:14:57.629779 TX Bit5 (984~1000) 17 992, Bit13 (977~992) 16 984,
3371 20:14:57.633033 TX Bit6 (983~999) 17 991, Bit14 (977~991) 15 984,
3372 20:14:57.639584 TX Bit7 (984~998) 15 991, Bit15 (971~984) 14 977,
3373 20:14:57.640142
3374 20:14:57.640618 Write Rank1 MR14 =0x6
3375 20:14:57.649694
3376 20:14:57.650110 CH=1, VrefRange= 0, VrefLevel = 6
3377 20:14:57.656058 TX Bit0 (984~1002) 19 993, Bit8 (975~988) 14 981,
3378 20:14:57.659640 TX Bit1 (983~999) 17 991, Bit9 (973~987) 15 980,
3379 20:14:57.665829 TX Bit2 (980~998) 19 989, Bit10 (975~993) 19 984,
3380 20:14:57.669059 TX Bit3 (978~993) 16 985, Bit11 (977~993) 17 985,
3381 20:14:57.672235 TX Bit4 (982~1000) 19 991, Bit12 (977~991) 15 984,
3382 20:14:57.678754 TX Bit5 (984~1001) 18 992, Bit13 (977~993) 17 985,
3383 20:14:57.681852 TX Bit6 (983~1000) 18 991, Bit14 (976~991) 16 983,
3384 20:14:57.688643 TX Bit7 (984~998) 15 991, Bit15 (970~985) 16 977,
3385 20:14:57.689065
3386 20:14:57.689396 Write Rank1 MR14 =0x8
3387 20:14:57.698777
3388 20:14:57.699198 CH=1, VrefRange= 0, VrefLevel = 8
3389 20:14:57.705151 TX Bit0 (984~1002) 19 993, Bit8 (974~989) 16 981,
3390 20:14:57.708856 TX Bit1 (982~1000) 19 991, Bit9 (972~988) 17 980,
3391 20:14:57.715512 TX Bit2 (980~998) 19 989, Bit10 (975~993) 19 984,
3392 20:14:57.718892 TX Bit3 (977~995) 19 986, Bit11 (976~993) 18 984,
3393 20:14:57.721736 TX Bit4 (981~1000) 20 990, Bit12 (977~991) 15 984,
3394 20:14:57.728230 TX Bit5 (983~1001) 19 992, Bit13 (977~993) 17 985,
3395 20:14:57.731799 TX Bit6 (982~1000) 19 991, Bit14 (976~991) 16 983,
3396 20:14:57.737748 TX Bit7 (983~999) 17 991, Bit15 (970~986) 17 978,
3397 20:14:57.738138
3398 20:14:57.738447 Write Rank1 MR14 =0xa
3399 20:14:57.748380
3400 20:14:57.751521 CH=1, VrefRange= 0, VrefLevel = 10
3401 20:14:57.754702 TX Bit0 (983~1002) 20 992, Bit8 (974~990) 17 982,
3402 20:14:57.757716 TX Bit1 (982~1000) 19 991, Bit9 (971~989) 19 980,
3403 20:14:57.764206 TX Bit2 (979~998) 20 988, Bit10 (975~994) 20 984,
3404 20:14:57.767471 TX Bit3 (977~996) 20 986, Bit11 (976~994) 19 985,
3405 20:14:57.774001 TX Bit4 (981~1000) 20 990, Bit12 (977~992) 16 984,
3406 20:14:57.777511 TX Bit5 (983~1002) 20 992, Bit13 (976~994) 19 985,
3407 20:14:57.780579 TX Bit6 (982~1001) 20 991, Bit14 (976~992) 17 984,
3408 20:14:57.786892 TX Bit7 (983~999) 17 991, Bit15 (970~986) 17 978,
3409 20:14:57.787422
3410 20:14:57.787897 Write Rank1 MR14 =0xc
3411 20:14:57.797634
3412 20:14:57.801057 CH=1, VrefRange= 0, VrefLevel = 12
3413 20:14:57.804480 TX Bit0 (983~1003) 21 993, Bit8 (973~990) 18 981,
3414 20:14:57.807816 TX Bit1 (982~1001) 20 991, Bit9 (971~990) 20 980,
3415 20:14:57.814084 TX Bit2 (979~999) 21 989, Bit10 (974~995) 22 984,
3416 20:14:57.817401 TX Bit3 (977~996) 20 986, Bit11 (976~995) 20 985,
3417 20:14:57.824016 TX Bit4 (981~1001) 21 991, Bit12 (976~992) 17 984,
3418 20:14:57.827425 TX Bit5 (983~1002) 20 992, Bit13 (976~994) 19 985,
3419 20:14:57.830425 TX Bit6 (982~1001) 20 991, Bit14 (976~992) 17 984,
3420 20:14:57.837130 TX Bit7 (982~1000) 19 991, Bit15 (969~987) 19 978,
3421 20:14:57.837768
3422 20:14:57.838279 Write Rank1 MR14 =0xe
3423 20:14:57.847692
3424 20:14:57.850907 CH=1, VrefRange= 0, VrefLevel = 14
3425 20:14:57.854533 TX Bit0 (983~1004) 22 993, Bit8 (973~990) 18 981,
3426 20:14:57.857309 TX Bit1 (982~1001) 20 991, Bit9 (971~990) 20 980,
3427 20:14:57.863610 TX Bit2 (979~1000) 22 989, Bit10 (974~995) 22 984,
3428 20:14:57.867045 TX Bit3 (977~997) 21 987, Bit11 (975~995) 21 985,
3429 20:14:57.873319 TX Bit4 (980~1002) 23 991, Bit12 (976~992) 17 984,
3430 20:14:57.877295 TX Bit5 (983~1003) 21 993, Bit13 (976~995) 20 985,
3431 20:14:57.880022 TX Bit6 (982~1002) 21 992, Bit14 (975~993) 19 984,
3432 20:14:57.887196 TX Bit7 (982~1000) 19 991, Bit15 (969~988) 20 978,
3433 20:14:57.887367
3434 20:14:57.889846 Write Rank1 MR14 =0x10
3435 20:14:57.897161
3436 20:14:57.900375 CH=1, VrefRange= 0, VrefLevel = 16
3437 20:14:57.903787 TX Bit0 (983~1003) 21 993, Bit8 (972~991) 20 981,
3438 20:14:57.907149 TX Bit1 (981~1002) 22 991, Bit9 (971~991) 21 981,
3439 20:14:57.913486 TX Bit2 (978~1000) 23 989, Bit10 (974~995) 22 984,
3440 20:14:57.916808 TX Bit3 (977~997) 21 987, Bit11 (975~995) 21 985,
3441 20:14:57.923376 TX Bit4 (980~1002) 23 991, Bit12 (976~993) 18 984,
3442 20:14:57.927042 TX Bit5 (982~1003) 22 992, Bit13 (976~995) 20 985,
3443 20:14:57.929790 TX Bit6 (981~1002) 22 991, Bit14 (975~994) 20 984,
3444 20:14:57.936795 TX Bit7 (981~1001) 21 991, Bit15 (969~989) 21 979,
3445 20:14:57.937075
3446 20:14:57.937294 Write Rank1 MR14 =0x12
3447 20:14:57.948019
3448 20:14:57.951006 CH=1, VrefRange= 0, VrefLevel = 18
3449 20:14:57.954580 TX Bit0 (982~1005) 24 993, Bit8 (972~991) 20 981,
3450 20:14:57.957666 TX Bit1 (981~1003) 23 992, Bit9 (971~991) 21 981,
3451 20:14:57.964221 TX Bit2 (978~1000) 23 989, Bit10 (974~996) 23 985,
3452 20:14:57.967759 TX Bit3 (977~998) 22 987, Bit11 (975~996) 22 985,
3453 20:14:57.973894 TX Bit4 (980~1003) 24 991, Bit12 (976~993) 18 984,
3454 20:14:57.977204 TX Bit5 (982~1004) 23 993, Bit13 (976~997) 22 986,
3455 20:14:57.980212 TX Bit6 (981~1003) 23 992, Bit14 (975~994) 20 984,
3456 20:14:57.986716 TX Bit7 (981~1002) 22 991, Bit15 (969~990) 22 979,
3457 20:14:57.987143
3458 20:14:57.990573 Write Rank1 MR14 =0x14
3459 20:14:57.997696
3460 20:14:58.001476 CH=1, VrefRange= 0, VrefLevel = 20
3461 20:14:58.004252 TX Bit0 (982~1005) 24 993, Bit8 (971~992) 22 981,
3462 20:14:58.007453 TX Bit1 (981~1003) 23 992, Bit9 (971~991) 21 981,
3463 20:14:58.014055 TX Bit2 (978~1001) 24 989, Bit10 (973~997) 25 985,
3464 20:14:58.017267 TX Bit3 (976~998) 23 987, Bit11 (975~997) 23 986,
3465 20:14:58.024511 TX Bit4 (979~1004) 26 991, Bit12 (975~994) 20 984,
3466 20:14:58.027345 TX Bit5 (982~1005) 24 993, Bit13 (975~997) 23 986,
3467 20:14:58.030649 TX Bit6 (980~1004) 25 992, Bit14 (974~995) 22 984,
3468 20:14:58.038012 TX Bit7 (980~1002) 23 991, Bit15 (969~990) 22 979,
3469 20:14:58.038441
3470 20:14:58.038775 Write Rank1 MR14 =0x16
3471 20:14:58.048126
3472 20:14:58.051606 CH=1, VrefRange= 0, VrefLevel = 22
3473 20:14:58.055007 TX Bit0 (982~1006) 25 994, Bit8 (971~992) 22 981,
3474 20:14:58.058228 TX Bit1 (980~1004) 25 992, Bit9 (970~991) 22 980,
3475 20:14:58.064433 TX Bit2 (978~1001) 24 989, Bit10 (973~997) 25 985,
3476 20:14:58.067750 TX Bit3 (976~998) 23 987, Bit11 (974~998) 25 986,
3477 20:14:58.074524 TX Bit4 (979~1003) 25 991, Bit12 (974~995) 22 984,
3478 20:14:58.077575 TX Bit5 (981~1005) 25 993, Bit13 (975~997) 23 986,
3479 20:14:58.081006 TX Bit6 (980~1004) 25 992, Bit14 (974~995) 22 984,
3480 20:14:58.087331 TX Bit7 (980~1003) 24 991, Bit15 (968~990) 23 979,
3481 20:14:58.087841
3482 20:14:58.088182 Write Rank1 MR14 =0x18
3483 20:14:58.098985
3484 20:14:58.101972 CH=1, VrefRange= 0, VrefLevel = 24
3485 20:14:58.105296 TX Bit0 (981~1006) 26 993, Bit8 (971~992) 22 981,
3486 20:14:58.108673 TX Bit1 (980~1005) 26 992, Bit9 (970~992) 23 981,
3487 20:14:58.115108 TX Bit2 (978~1001) 24 989, Bit10 (972~998) 27 985,
3488 20:14:58.118841 TX Bit3 (976~999) 24 987, Bit11 (974~998) 25 986,
3489 20:14:58.124940 TX Bit4 (979~1005) 27 992, Bit12 (974~996) 23 985,
3490 20:14:58.128518 TX Bit5 (981~1005) 25 993, Bit13 (975~998) 24 986,
3491 20:14:58.131276 TX Bit6 (980~1005) 26 992, Bit14 (974~996) 23 985,
3492 20:14:58.137939 TX Bit7 (980~1003) 24 991, Bit15 (968~991) 24 979,
3493 20:14:58.138461
3494 20:14:58.138802 Write Rank1 MR14 =0x1a
3495 20:14:58.148918
3496 20:14:58.152596 CH=1, VrefRange= 0, VrefLevel = 26
3497 20:14:58.155868 TX Bit0 (981~1006) 26 993, Bit8 (971~993) 23 982,
3498 20:14:58.159238 TX Bit1 (979~1005) 27 992, Bit9 (970~992) 23 981,
3499 20:14:58.165629 TX Bit2 (977~1002) 26 989, Bit10 (972~998) 27 985,
3500 20:14:58.169182 TX Bit3 (976~999) 24 987, Bit11 (973~998) 26 985,
3501 20:14:58.174931 TX Bit4 (979~1005) 27 992, Bit12 (974~995) 22 984,
3502 20:14:58.178169 TX Bit5 (980~1005) 26 992, Bit13 (974~998) 25 986,
3503 20:14:58.181958 TX Bit6 (979~1005) 27 992, Bit14 (973~997) 25 985,
3504 20:14:58.188119 TX Bit7 (980~1004) 25 992, Bit15 (968~991) 24 979,
3505 20:14:58.188546
3506 20:14:58.188882 Write Rank1 MR14 =0x1c
3507 20:14:58.199532
3508 20:14:58.202396 CH=1, VrefRange= 0, VrefLevel = 28
3509 20:14:58.206211 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3510 20:14:58.209273 TX Bit1 (979~1005) 27 992, Bit9 (969~993) 25 981,
3511 20:14:58.215803 TX Bit2 (977~1003) 27 990, Bit10 (973~998) 26 985,
3512 20:14:58.218767 TX Bit3 (976~999) 24 987, Bit11 (973~998) 26 985,
3513 20:14:58.225417 TX Bit4 (978~1005) 28 991, Bit12 (974~997) 24 985,
3514 20:14:58.228852 TX Bit5 (980~1006) 27 993, Bit13 (974~998) 25 986,
3515 20:14:58.232445 TX Bit6 (979~1005) 27 992, Bit14 (973~997) 25 985,
3516 20:14:58.239065 TX Bit7 (979~1005) 27 992, Bit15 (968~991) 24 979,
3517 20:14:58.239589
3518 20:14:58.239930 Write Rank1 MR14 =0x1e
3519 20:14:58.249620
3520 20:14:58.253184 CH=1, VrefRange= 0, VrefLevel = 30
3521 20:14:58.256263 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3522 20:14:58.259375 TX Bit1 (979~1005) 27 992, Bit9 (970~993) 24 981,
3523 20:14:58.266910 TX Bit2 (977~1003) 27 990, Bit10 (973~997) 25 985,
3524 20:14:58.269772 TX Bit3 (975~1000) 26 987, Bit11 (973~998) 26 985,
3525 20:14:58.276499 TX Bit4 (979~1005) 27 992, Bit12 (973~998) 26 985,
3526 20:14:58.278993 TX Bit5 (980~1006) 27 993, Bit13 (974~999) 26 986,
3527 20:14:58.282721 TX Bit6 (979~1005) 27 992, Bit14 (973~996) 24 984,
3528 20:14:58.288735 TX Bit7 (979~1005) 27 992, Bit15 (968~991) 24 979,
3529 20:14:58.289184
3530 20:14:58.292114 Write Rank1 MR14 =0x20
3531 20:14:58.300042
3532 20:14:58.303463 CH=1, VrefRange= 0, VrefLevel = 32
3533 20:14:58.306787 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3534 20:14:58.310129 TX Bit1 (979~1005) 27 992, Bit9 (970~993) 24 981,
3535 20:14:58.316858 TX Bit2 (977~1003) 27 990, Bit10 (973~997) 25 985,
3536 20:14:58.320071 TX Bit3 (975~1000) 26 987, Bit11 (973~998) 26 985,
3537 20:14:58.326239 TX Bit4 (979~1005) 27 992, Bit12 (973~998) 26 985,
3538 20:14:58.329922 TX Bit5 (980~1006) 27 993, Bit13 (974~999) 26 986,
3539 20:14:58.332605 TX Bit6 (979~1005) 27 992, Bit14 (973~996) 24 984,
3540 20:14:58.339725 TX Bit7 (979~1005) 27 992, Bit15 (968~991) 24 979,
3541 20:14:58.340167
3542 20:14:58.342906 Write Rank1 MR14 =0x22
3543 20:14:58.351084
3544 20:14:58.354192 CH=1, VrefRange= 0, VrefLevel = 34
3545 20:14:58.357789 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3546 20:14:58.360669 TX Bit1 (979~1005) 27 992, Bit9 (970~993) 24 981,
3547 20:14:58.366816 TX Bit2 (977~1003) 27 990, Bit10 (973~997) 25 985,
3548 20:14:58.370060 TX Bit3 (975~1000) 26 987, Bit11 (973~998) 26 985,
3549 20:14:58.376911 TX Bit4 (979~1005) 27 992, Bit12 (973~998) 26 985,
3550 20:14:58.380423 TX Bit5 (980~1006) 27 993, Bit13 (974~999) 26 986,
3551 20:14:58.382802 TX Bit6 (979~1005) 27 992, Bit14 (973~996) 24 984,
3552 20:14:58.389765 TX Bit7 (979~1005) 27 992, Bit15 (968~991) 24 979,
3553 20:14:58.390207
3554 20:14:58.392972 Write Rank1 MR14 =0x24
3555 20:14:58.401425
3556 20:14:58.404408 CH=1, VrefRange= 0, VrefLevel = 36
3557 20:14:58.407584 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3558 20:14:58.410582 TX Bit1 (979~1005) 27 992, Bit9 (970~993) 24 981,
3559 20:14:58.417201 TX Bit2 (977~1003) 27 990, Bit10 (973~997) 25 985,
3560 20:14:58.420734 TX Bit3 (975~1000) 26 987, Bit11 (973~998) 26 985,
3561 20:14:58.427191 TX Bit4 (979~1005) 27 992, Bit12 (973~998) 26 985,
3562 20:14:58.430579 TX Bit5 (980~1006) 27 993, Bit13 (974~999) 26 986,
3563 20:14:58.433547 TX Bit6 (979~1005) 27 992, Bit14 (973~996) 24 984,
3564 20:14:58.440383 TX Bit7 (979~1005) 27 992, Bit15 (968~991) 24 979,
3565 20:14:58.440909
3566 20:14:58.441249
3567 20:14:58.443998 TX Vref found, early break! 387< 393
3568 20:14:58.446904 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3569 20:14:58.450154 u1DelayCellOfst[0]=7 cells (6 PI)
3570 20:14:58.453209 u1DelayCellOfst[1]=6 cells (5 PI)
3571 20:14:58.456372 u1DelayCellOfst[2]=3 cells (3 PI)
3572 20:14:58.459530 u1DelayCellOfst[3]=0 cells (0 PI)
3573 20:14:58.462648 u1DelayCellOfst[4]=6 cells (5 PI)
3574 20:14:58.465827 u1DelayCellOfst[5]=7 cells (6 PI)
3575 20:14:58.469541 u1DelayCellOfst[6]=6 cells (5 PI)
3576 20:14:58.473390 u1DelayCellOfst[7]=6 cells (5 PI)
3577 20:14:58.476822 Byte0, DQ PI dly=987, DQM PI dly= 990
3578 20:14:58.479378 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3579 20:14:58.479840
3580 20:14:58.482932 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3581 20:14:58.486283
3582 20:14:58.486710 u1DelayCellOfst[8]=2 cells (2 PI)
3583 20:14:58.489673 u1DelayCellOfst[9]=2 cells (2 PI)
3584 20:14:58.492418 u1DelayCellOfst[10]=7 cells (6 PI)
3585 20:14:58.495720 u1DelayCellOfst[11]=7 cells (6 PI)
3586 20:14:58.499260 u1DelayCellOfst[12]=7 cells (6 PI)
3587 20:14:58.502448 u1DelayCellOfst[13]=9 cells (7 PI)
3588 20:14:58.505937 u1DelayCellOfst[14]=6 cells (5 PI)
3589 20:14:58.508651 u1DelayCellOfst[15]=0 cells (0 PI)
3590 20:14:58.512650 Byte1, DQ PI dly=979, DQM PI dly= 982
3591 20:14:58.515838 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3592 20:14:58.516360
3593 20:14:58.522287 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3594 20:14:58.522715
3595 20:14:58.523051 Write Rank1 MR14 =0x1e
3596 20:14:58.525760
3597 20:14:58.526182 Final TX Range 0 Vref 30
3598 20:14:58.526523
3599 20:14:58.531946 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3600 20:14:58.532376
3601 20:14:58.538325 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3602 20:14:58.545189 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3603 20:14:58.554748 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3604 20:14:58.555175 Write Rank1 MR3 =0xb0
3605 20:14:58.558642 DramC Write-DBI on
3606 20:14:58.559162 ==
3607 20:14:58.561480 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3608 20:14:58.564945 fsp= 1, odt_onoff= 1, Byte mode= 0
3609 20:14:58.565372 ==
3610 20:14:58.571154 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3611 20:14:58.571597
3612 20:14:58.571939 Begin, DQ Scan Range 702~766
3613 20:14:58.574725
3614 20:14:58.575187
3615 20:14:58.575694 TX Vref Scan disable
3616 20:14:58.577518 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3617 20:14:58.580697 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3618 20:14:58.584044 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3619 20:14:58.587333 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3620 20:14:58.590920 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3621 20:14:58.597744 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3622 20:14:58.600890 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3623 20:14:58.604288 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3624 20:14:58.607165 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3625 20:14:58.610587 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3626 20:14:58.613823 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3627 20:14:58.617081 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3628 20:14:58.620195 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3629 20:14:58.623297 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3630 20:14:58.626833 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3631 20:14:58.630045 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3632 20:14:58.632899 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3633 20:14:58.636145 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3634 20:14:58.639717 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3635 20:14:58.643477 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3636 20:14:58.649942 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3637 20:14:58.656280 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3638 20:14:58.660138 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3639 20:14:58.662947 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3640 20:14:58.666072 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3641 20:14:58.669792 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3642 20:14:58.673267 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3643 20:14:58.675720 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3644 20:14:58.679144 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3645 20:14:58.682670 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3646 20:14:58.685507 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3647 20:14:58.688802 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3648 20:14:58.692420 Byte0, DQ PI dly=736, DQM PI dly= 736
3649 20:14:58.698669 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3650 20:14:58.699090
3651 20:14:58.701818 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3652 20:14:58.702238
3653 20:14:58.705185 Byte1, DQ PI dly=727, DQM PI dly= 727
3654 20:14:58.709244 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
3655 20:14:58.712032
3656 20:14:58.715616 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
3657 20:14:58.716155
3658 20:14:58.721586 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3659 20:14:58.728027 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3660 20:14:58.734522 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3661 20:14:58.738350 Write Rank1 MR3 =0x30
3662 20:14:58.738787 DramC Write-DBI off
3663 20:14:58.739229
3664 20:14:58.741425 [DATLAT]
3665 20:14:58.744493 Freq=1600, CH1 RK1, use_rxtx_scan=0
3666 20:14:58.745017
3667 20:14:58.745356 DATLAT Default: 0x10
3668 20:14:58.748131 7, 0xFFFF, sum=0
3669 20:14:58.748563 8, 0xFFFF, sum=0
3670 20:14:58.751786 9, 0xFFFF, sum=0
3671 20:14:58.752313 10, 0xFFFF, sum=0
3672 20:14:58.754809 11, 0xFFFF, sum=0
3673 20:14:58.755250 12, 0xFFFF, sum=0
3674 20:14:58.758001 13, 0xFFFF, sum=0
3675 20:14:58.758432 14, 0x0, sum=1
3676 20:14:58.758775 15, 0x0, sum=2
3677 20:14:58.761116 16, 0x0, sum=3
3678 20:14:58.761590 17, 0x0, sum=4
3679 20:14:58.767585 pattern=2 first_step=14 total pass=5 best_step=16
3680 20:14:58.768022 ==
3681 20:14:58.770995 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3682 20:14:58.773884 fsp= 1, odt_onoff= 1, Byte mode= 0
3683 20:14:58.774309 ==
3684 20:14:58.780104 Start DQ dly to find pass range UseTestEngine =1
3685 20:14:58.783436 x-axis: bit #, y-axis: DQ dly (-127~63)
3686 20:14:58.784061 RX Vref Scan = 0
3687 20:14:58.787197 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3688 20:14:58.790049 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3689 20:14:58.793392 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3690 20:14:58.796983 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3691 20:14:58.800144 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3692 20:14:58.803495 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3693 20:14:58.804075 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3694 20:14:58.806578 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3695 20:14:58.810453 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3696 20:14:58.812970 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3697 20:14:58.816565 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3698 20:14:58.819582 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3699 20:14:58.823132 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3700 20:14:58.826645 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3701 20:14:58.829877 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3702 20:14:58.833550 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3703 20:14:58.833982 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3704 20:14:58.836324 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3705 20:14:58.840159 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3706 20:14:58.842606 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3707 20:14:58.845844 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3708 20:14:58.849530 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3709 20:14:58.852507 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3710 20:14:58.853037 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3711 20:14:58.856283 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3712 20:14:58.858880 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3713 20:14:58.862041 0, [0] xxxoxxxx ooxxxxxo [MSB]
3714 20:14:58.866324 1, [0] xxxoxxxx ooxxxxxo [MSB]
3715 20:14:58.869174 2, [0] xxooxxxx ooxxxxxo [MSB]
3716 20:14:58.872072 3, [0] xxooxxxo oooooxxo [MSB]
3717 20:14:58.872502 4, [0] ooooxxxo oooooooo [MSB]
3718 20:14:58.875449 5, [0] oooooxoo oooooooo [MSB]
3719 20:14:58.879927 32, [0] oooooooo ooooooox [MSB]
3720 20:14:58.883337 33, [0] oooooooo ooooooox [MSB]
3721 20:14:58.886765 34, [0] oooxoooo oxooooox [MSB]
3722 20:14:58.890207 35, [0] ooxxoooo oxooooox [MSB]
3723 20:14:58.893175 36, [0] ooxxoooo xxooooox [MSB]
3724 20:14:58.896192 37, [0] ooxxoooo xxooooox [MSB]
3725 20:14:58.900251 38, [0] ooxxoooo xxooxoox [MSB]
3726 20:14:58.900759 39, [0] oxxxooox xxxxxoox [MSB]
3727 20:14:58.903151 40, [0] oxxxxoox xxxxxxox [MSB]
3728 20:14:58.906010 41, [0] xxxxxxxx xxxxxxxx [MSB]
3729 20:14:58.909657 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3730 20:14:58.912924 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3731 20:14:58.915922 iDelay=41, Bit 2, Center 18 (2 ~ 34) 33
3732 20:14:58.922795 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3733 20:14:58.926287 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
3734 20:14:58.928955 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3735 20:14:58.932752 iDelay=41, Bit 6, Center 22 (5 ~ 40) 36
3736 20:14:58.935564 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3737 20:14:58.938964 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3738 20:14:58.942198 iDelay=41, Bit 9, Center 15 (-2 ~ 33) 36
3739 20:14:58.945631 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3740 20:14:58.948948 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3741 20:14:58.952304 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3742 20:14:58.955728 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3743 20:14:58.962034 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3744 20:14:58.965567 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3745 20:14:58.965992 ==
3746 20:14:58.968600 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3747 20:14:58.971915 fsp= 1, odt_onoff= 1, Byte mode= 0
3748 20:14:58.972342 ==
3749 20:14:58.974843 DQS Delay:
3750 20:14:58.975292 DQS0 = 0, DQS1 = 0
3751 20:14:58.978326 DQM Delay:
3752 20:14:58.978752 DQM0 = 20, DQM1 = 18
3753 20:14:58.979091 DQ Delay:
3754 20:14:58.981672 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3755 20:14:58.985129 DQ4 =22, DQ5 =23, DQ6 =22, DQ7 =20
3756 20:14:58.988329 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3757 20:14:58.991535 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3758 20:14:58.991951
3759 20:14:58.992281
3760 20:14:58.995017
3761 20:14:58.995431 [DramC_TX_OE_Calibration] TA2
3762 20:14:58.997677 Original DQ_B0 (3 6) =30, OEN = 27
3763 20:14:59.001176 Original DQ_B1 (3 6) =30, OEN = 27
3764 20:14:59.004266 23, 0x0, End_B0=23 End_B1=23
3765 20:14:59.007626 24, 0x0, End_B0=24 End_B1=24
3766 20:14:59.010683 25, 0x0, End_B0=25 End_B1=25
3767 20:14:59.011116 26, 0x0, End_B0=26 End_B1=26
3768 20:14:59.014541 27, 0x0, End_B0=27 End_B1=27
3769 20:14:59.017570 28, 0x0, End_B0=28 End_B1=28
3770 20:14:59.020704 29, 0x0, End_B0=29 End_B1=29
3771 20:14:59.023880 30, 0x0, End_B0=30 End_B1=30
3772 20:14:59.024311 31, 0xFFFF, End_B0=30 End_B1=30
3773 20:14:59.031065 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3774 20:14:59.037247 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3775 20:14:59.037751
3776 20:14:59.038091
3777 20:14:59.040390 Write Rank1 MR23 =0x3f
3778 20:14:59.040814 [DQSOSC]
3779 20:14:59.047303 [DQSOSCAuto] RK1, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3780 20:14:59.053291 CH1_RK1: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3781 20:14:59.057209 Write Rank1 MR23 =0x3f
3782 20:14:59.057781 [DQSOSC]
3783 20:14:59.066808 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3784 20:14:59.067337 CH1 RK1: MR19=202, MR18=B4B4
3785 20:14:59.070285 [RxdqsGatingPostProcess] freq 1600
3786 20:14:59.076735 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3787 20:14:59.077159 Rank: 0
3788 20:14:59.079826 best DQS0 dly(2T, 0.5T) = (2, 6)
3789 20:14:59.083022 best DQS1 dly(2T, 0.5T) = (2, 6)
3790 20:14:59.086305 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3791 20:14:59.089193 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3792 20:14:59.089660 Rank: 1
3793 20:14:59.092025 best DQS0 dly(2T, 0.5T) = (2, 6)
3794 20:14:59.095698 best DQS1 dly(2T, 0.5T) = (2, 6)
3795 20:14:59.098978 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3796 20:14:59.102511 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3797 20:14:59.105736 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3798 20:14:59.108904 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3799 20:14:59.115495 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3800 20:14:59.115710
3801 20:14:59.115830
3802 20:14:59.118813 [Calibration Summary] Freqency 1600
3803 20:14:59.119003 CH 0, Rank 0
3804 20:14:59.121895 All Pass.
3805 20:14:59.122069
3806 20:14:59.122172 CH 0, Rank 1
3807 20:14:59.122270 All Pass.
3808 20:14:59.122364
3809 20:14:59.124999 CH 1, Rank 0
3810 20:14:59.125145 All Pass.
3811 20:14:59.125263
3812 20:14:59.125371 CH 1, Rank 1
3813 20:14:59.128260 All Pass.
3814 20:14:59.128426
3815 20:14:59.134965 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3816 20:14:59.141563 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3817 20:14:59.148859 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3818 20:14:59.151597 Write Rank0 MR3 =0xb0
3819 20:14:59.158668 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3820 20:14:59.164728 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3821 20:14:59.171160 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3822 20:14:59.174237 Write Rank1 MR3 =0xb0
3823 20:14:59.177756 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3824 20:14:59.187388 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3825 20:14:59.194078 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3826 20:14:59.194198 Write Rank0 MR3 =0xb0
3827 20:14:59.200593 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3828 20:14:59.210345 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3829 20:14:59.217139 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3830 20:14:59.217418 Write Rank1 MR3 =0xb0
3831 20:14:59.220314 DramC Write-DBI on
3832 20:14:59.223782 [GetDramInforAfterCalByMRR] Vendor 6.
3833 20:14:59.227122 [GetDramInforAfterCalByMRR] Revision 505.
3834 20:14:59.227492 MR8 1111
3835 20:14:59.233590 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3836 20:14:59.234032 MR8 1111
3837 20:14:59.237119 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3838 20:14:59.240112 MR8 1111
3839 20:14:59.243546 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3840 20:14:59.243976 MR8 1111
3841 20:14:59.249567 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3842 20:14:59.259568 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3843 20:14:59.259663 Write Rank0 MR13 =0xd0
3844 20:14:59.262509 Write Rank1 MR13 =0xd0
3845 20:14:59.266012 Write Rank0 MR13 =0xd0
3846 20:14:59.266112 Write Rank1 MR13 =0xd0
3847 20:14:59.269721 Save calibration result to emmc
3848 20:14:59.269913
3849 20:14:59.270017
3850 20:14:59.272824 [DramcModeReg_Check] Freq_1600, FSP_1
3851 20:14:59.275568 FSP_1, CH_0, RK0
3852 20:14:59.275745 Write Rank0 MR13 =0xd8
3853 20:14:59.279339 MR12 = 0x5a (global = 0x5a) match
3854 20:14:59.282488 MR14 = 0x1c (global = 0x1c) match
3855 20:14:59.285560 FSP_1, CH_0, RK1
3856 20:14:59.285707 Write Rank1 MR13 =0xd8
3857 20:14:59.288941 MR12 = 0x5e (global = 0x5e) match
3858 20:14:59.292292 MR14 = 0x1e (global = 0x1e) match
3859 20:14:59.296205 FSP_1, CH_1, RK0
3860 20:14:59.296486 Write Rank0 MR13 =0xd8
3861 20:14:59.299284 MR12 = 0x5c (global = 0x5c) match
3862 20:14:59.302036 MR14 = 0x20 (global = 0x20) match
3863 20:14:59.305878 FSP_1, CH_1, RK1
3864 20:14:59.306253 Write Rank1 MR13 =0xd8
3865 20:14:59.309055 MR12 = 0x5e (global = 0x5e) match
3866 20:14:59.312497 MR14 = 0x1e (global = 0x1e) match
3867 20:14:59.313022
3868 20:14:59.318678 [MEM_TEST] 02: After DFS, before run time config
3869 20:14:59.328221 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3870 20:14:59.328649
3871 20:14:59.328986 [TA2_TEST]
3872 20:14:59.329302 === TA2 HW
3873 20:14:59.331629 TA2 PAT: XTALK
3874 20:14:59.335342 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3875 20:14:59.341534 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3876 20:14:59.344902 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3877 20:14:59.351388 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3878 20:14:59.351814
3879 20:14:59.352175
3880 20:14:59.352504 Settings after calibration
3881 20:14:59.354739
3882 20:14:59.355163 [DramcRunTimeConfig]
3883 20:14:59.358191 TransferPLLToSPMControl - MODE SW PHYPLL
3884 20:14:59.360976 TX_TRACKING: ON
3885 20:14:59.361068 RX_TRACKING: ON
3886 20:14:59.361141 HW_GATING: ON
3887 20:14:59.364196 HW_GATING DBG: OFF
3888 20:14:59.364289 ddr_geometry:1
3889 20:14:59.367237 ddr_geometry:1
3890 20:14:59.367329 ddr_geometry:1
3891 20:14:59.370571 ddr_geometry:1
3892 20:14:59.370671 ddr_geometry:1
3893 20:14:59.374328 ddr_geometry:1
3894 20:14:59.374543 ddr_geometry:1
3895 20:14:59.374687 ddr_geometry:1
3896 20:14:59.377764 High Freq DUMMY_READ_FOR_TRACKING: ON
3897 20:14:59.380872 ZQCS_ENABLE_LP4: OFF
3898 20:14:59.384286 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3899 20:14:59.386969 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3900 20:14:59.390259 SPM_CONTROL_AFTERK: ON
3901 20:14:59.390487 IMPEDANCE_TRACKING: ON
3902 20:14:59.394036 TEMP_SENSOR: ON
3903 20:14:59.394265 PER_BANK_REFRESH: ON
3904 20:14:59.397164 HW_SAVE_FOR_SR: ON
3905 20:14:59.400206 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3906 20:14:59.403281 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3907 20:14:59.406605 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3908 20:14:59.406702 Read ODT Tracking: ON
3909 20:14:59.410097 =========================
3910 20:14:59.410194
3911 20:14:59.410289 [TA2_TEST]
3912 20:14:59.413328 === TA2 HW
3913 20:14:59.416671 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3914 20:14:59.423242 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3915 20:14:59.426464 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3916 20:14:59.433087 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3917 20:14:59.433329
3918 20:14:59.435912 [MEM_TEST] 03: After run time config
3919 20:14:59.446337 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3920 20:14:59.449645 [complex_mem_test] start addr:0x40024000, len:131072
3921 20:14:59.654737 1st complex R/W mem test pass
3922 20:14:59.660567 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3923 20:14:59.663766 sync preloader write leveling
3924 20:14:59.666988 sync preloader cbt_mr12
3925 20:14:59.670437 sync preloader cbt_clk_dly
3926 20:14:59.670872 sync preloader cbt_cmd_dly
3927 20:14:59.673228 sync preloader cbt_cs
3928 20:14:59.676675 sync preloader cbt_ca_perbit_delay
3929 20:14:59.680082 sync preloader clk_delay
3930 20:14:59.680522 sync preloader dqs_delay
3931 20:14:59.683648 sync preloader u1Gating2T_Save
3932 20:14:59.686857 sync preloader u1Gating05T_Save
3933 20:14:59.690249 sync preloader u1Gatingfine_tune_Save
3934 20:14:59.693163 sync preloader u1Gatingucpass_count_Save
3935 20:14:59.696304 sync preloader u1TxWindowPerbitVref_Save
3936 20:14:59.699634 sync preloader u1TxCenter_min_Save
3937 20:14:59.702956 sync preloader u1TxCenter_max_Save
3938 20:14:59.706187 sync preloader u1Txwin_center_Save
3939 20:14:59.709521 sync preloader u1Txfirst_pass_Save
3940 20:14:59.713366 sync preloader u1Txlast_pass_Save
3941 20:14:59.716317 sync preloader u1RxDatlat_Save
3942 20:14:59.719420 sync preloader u1RxWinPerbitVref_Save
3943 20:14:59.722488 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3944 20:14:59.725597 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3945 20:14:59.728943 sync preloader delay_cell_unit
3946 20:14:59.735725 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3947 20:14:59.738929 sync preloader write leveling
3948 20:14:59.742121 sync preloader cbt_mr12
3949 20:14:59.742560 sync preloader cbt_clk_dly
3950 20:14:59.745623 sync preloader cbt_cmd_dly
3951 20:14:59.748874 sync preloader cbt_cs
3952 20:14:59.752485 sync preloader cbt_ca_perbit_delay
3953 20:14:59.752922 sync preloader clk_delay
3954 20:14:59.755198 sync preloader dqs_delay
3955 20:14:59.758509 sync preloader u1Gating2T_Save
3956 20:14:59.761600 sync preloader u1Gating05T_Save
3957 20:14:59.765416 sync preloader u1Gatingfine_tune_Save
3958 20:14:59.768637 sync preloader u1Gatingucpass_count_Save
3959 20:14:59.772171 sync preloader u1TxWindowPerbitVref_Save
3960 20:14:59.774892 sync preloader u1TxCenter_min_Save
3961 20:14:59.778321 sync preloader u1TxCenter_max_Save
3962 20:14:59.781378 sync preloader u1Txwin_center_Save
3963 20:14:59.784771 sync preloader u1Txfirst_pass_Save
3964 20:14:59.788309 sync preloader u1Txlast_pass_Save
3965 20:14:59.791143 sync preloader u1RxDatlat_Save
3966 20:14:59.794882 sync preloader u1RxWinPerbitVref_Save
3967 20:14:59.797806 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3968 20:14:59.801307 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3969 20:14:59.804377 sync preloader delay_cell_unit
3970 20:14:59.810845 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3971 20:14:59.814003 sync preloader write leveling
3972 20:14:59.817604 sync preloader cbt_mr12
3973 20:14:59.818125 sync preloader cbt_clk_dly
3974 20:14:59.821114 sync preloader cbt_cmd_dly
3975 20:14:59.824359 sync preloader cbt_cs
3976 20:14:59.827346 sync preloader cbt_ca_perbit_delay
3977 20:14:59.827790 sync preloader clk_delay
3978 20:14:59.830481 sync preloader dqs_delay
3979 20:14:59.833946 sync preloader u1Gating2T_Save
3980 20:14:59.837056 sync preloader u1Gating05T_Save
3981 20:14:59.840634 sync preloader u1Gatingfine_tune_Save
3982 20:14:59.843904 sync preloader u1Gatingucpass_count_Save
3983 20:14:59.847015 sync preloader u1TxWindowPerbitVref_Save
3984 20:14:59.850466 sync preloader u1TxCenter_min_Save
3985 20:14:59.853614 sync preloader u1TxCenter_max_Save
3986 20:14:59.856855 sync preloader u1Txwin_center_Save
3987 20:14:59.860409 sync preloader u1Txfirst_pass_Save
3988 20:14:59.863395 sync preloader u1Txlast_pass_Save
3989 20:14:59.863925 sync preloader u1RxDatlat_Save
3990 20:14:59.866550 sync preloader u1RxWinPerbitVref_Save
3991 20:14:59.873241 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3992 20:14:59.876550 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3993 20:14:59.879616 sync preloader delay_cell_unit
3994 20:14:59.882778 just_for_test_dump_coreboot_params dump all params
3995 20:14:59.886560 dump source = 0x0
3996 20:14:59.887094 dump params frequency:1600
3997 20:14:59.889580 dump params rank number:2
3998 20:14:59.890120
3999 20:14:59.892877 dump params write leveling
4000 20:14:59.896691 write leveling[0][0][0] = 0x1f
4001 20:14:59.899599 write leveling[0][0][1] = 0x1b
4002 20:14:59.902751 write leveling[0][1][0] = 0x1c
4003 20:14:59.903206 write leveling[0][1][1] = 0x19
4004 20:14:59.906107 write leveling[1][0][0] = 0x23
4005 20:14:59.908889 write leveling[1][0][1] = 0x1c
4006 20:14:59.912176 write leveling[1][1][0] = 0x21
4007 20:14:59.915388 write leveling[1][1][1] = 0x1a
4008 20:14:59.915967 dump params cbt_cs
4009 20:14:59.918984 cbt_cs[0][0] = 0x6
4010 20:14:59.919404 cbt_cs[0][1] = 0x6
4011 20:14:59.922328 cbt_cs[1][0] = 0xb
4012 20:14:59.922753 cbt_cs[1][1] = 0xb
4013 20:14:59.925547 dump params cbt_mr12
4014 20:14:59.928816 cbt_mr12[0][0] = 0x1a
4015 20:14:59.929233 cbt_mr12[0][1] = 0x1e
4016 20:14:59.932081 cbt_mr12[1][0] = 0x1c
4017 20:14:59.932590 cbt_mr12[1][1] = 0x1e
4018 20:14:59.935401 dump params tx window
4019 20:14:59.938746 tx_center_min[0][0][0] = 983
4020 20:14:59.941882 tx_center_max[0][0][0] = 989
4021 20:14:59.942312 tx_center_min[0][0][1] = 978
4022 20:14:59.945068 tx_center_max[0][0][1] = 986
4023 20:14:59.948044 tx_center_min[0][1][0] = 983
4024 20:14:59.951596 tx_center_max[0][1][0] = 990
4025 20:14:59.955167 tx_center_min[0][1][1] = 980
4026 20:14:59.955752 tx_center_max[0][1][1] = 987
4027 20:14:59.958539 tx_center_min[1][0][0] = 988
4028 20:14:59.961317 tx_center_max[1][0][0] = 994
4029 20:14:59.964659 tx_center_min[1][0][1] = 980
4030 20:14:59.967877 tx_center_max[1][0][1] = 987
4031 20:14:59.968304 tx_center_min[1][1][0] = 987
4032 20:14:59.971314 tx_center_max[1][1][0] = 993
4033 20:14:59.974440 tx_center_min[1][1][1] = 979
4034 20:14:59.977847 tx_center_max[1][1][1] = 986
4035 20:14:59.978425 dump params tx window
4036 20:14:59.981543 tx_win_center[0][0][0] = 989
4037 20:14:59.984146 tx_first_pass[0][0][0] = 978
4038 20:14:59.987435 tx_last_pass[0][0][0] = 1001
4039 20:14:59.990722 tx_win_center[0][0][1] = 989
4040 20:14:59.991332 tx_first_pass[0][0][1] = 977
4041 20:14:59.994008 tx_last_pass[0][0][1] = 1001
4042 20:14:59.997286 tx_win_center[0][0][2] = 989
4043 20:15:00.000713 tx_first_pass[0][0][2] = 978
4044 20:15:00.004132 tx_last_pass[0][0][2] = 1001
4045 20:15:00.004696 tx_win_center[0][0][3] = 983
4046 20:15:00.007511 tx_first_pass[0][0][3] = 972
4047 20:15:00.010383 tx_last_pass[0][0][3] = 995
4048 20:15:00.014499 tx_win_center[0][0][4] = 988
4049 20:15:00.017361 tx_first_pass[0][0][4] = 977
4050 20:15:00.017836 tx_last_pass[0][0][4] = 1000
4051 20:15:00.020406 tx_win_center[0][0][5] = 986
4052 20:15:00.023622 tx_first_pass[0][0][5] = 974
4053 20:15:00.026989 tx_last_pass[0][0][5] = 998
4054 20:15:00.030576 tx_win_center[0][0][6] = 987
4055 20:15:00.031077 tx_first_pass[0][0][6] = 976
4056 20:15:00.033869 tx_last_pass[0][0][6] = 999
4057 20:15:00.036454 tx_win_center[0][0][7] = 989
4058 20:15:00.040325 tx_first_pass[0][0][7] = 977
4059 20:15:00.043242 tx_last_pass[0][0][7] = 1001
4060 20:15:00.043822 tx_win_center[0][0][8] = 978
4061 20:15:00.046534 tx_first_pass[0][0][8] = 967
4062 20:15:00.049653 tx_last_pass[0][0][8] = 990
4063 20:15:00.053299 tx_win_center[0][0][9] = 980
4064 20:15:00.053866 tx_first_pass[0][0][9] = 969
4065 20:15:00.056680 tx_last_pass[0][0][9] = 992
4066 20:15:00.059602 tx_win_center[0][0][10] = 986
4067 20:15:00.067008 tx_first_pass[0][0][10] = 975
4068 20:15:00.067654 tx_last_pass[0][0][10] = 998
4069 20:15:00.069646 tx_win_center[0][0][11] = 979
4070 20:15:00.070224 tx_first_pass[0][0][11] = 968
4071 20:15:00.073130 tx_last_pass[0][0][11] = 991
4072 20:15:00.075740 tx_win_center[0][0][12] = 981
4073 20:15:00.079254 tx_first_pass[0][0][12] = 970
4074 20:15:00.082563 tx_last_pass[0][0][12] = 993
4075 20:15:00.082987 tx_win_center[0][0][13] = 981
4076 20:15:00.085916 tx_first_pass[0][0][13] = 970
4077 20:15:00.089031 tx_last_pass[0][0][13] = 993
4078 20:15:00.092424 tx_win_center[0][0][14] = 983
4079 20:15:00.095371 tx_first_pass[0][0][14] = 970
4080 20:15:00.095673 tx_last_pass[0][0][14] = 996
4081 20:15:00.098825 tx_win_center[0][0][15] = 986
4082 20:15:00.102404 tx_first_pass[0][0][15] = 974
4083 20:15:00.105605 tx_last_pass[0][0][15] = 998
4084 20:15:00.108745 tx_win_center[0][1][0] = 990
4085 20:15:00.111606 tx_first_pass[0][1][0] = 978
4086 20:15:00.112078 tx_last_pass[0][1][0] = 1002
4087 20:15:00.115226 tx_win_center[0][1][1] = 989
4088 20:15:00.118122 tx_first_pass[0][1][1] = 978
4089 20:15:00.121942 tx_last_pass[0][1][1] = 1001
4090 20:15:00.124801 tx_win_center[0][1][2] = 989
4091 20:15:00.125121 tx_first_pass[0][1][2] = 978
4092 20:15:00.128330 tx_last_pass[0][1][2] = 1001
4093 20:15:00.131661 tx_win_center[0][1][3] = 983
4094 20:15:00.134755 tx_first_pass[0][1][3] = 971
4095 20:15:00.135062 tx_last_pass[0][1][3] = 996
4096 20:15:00.138262 tx_win_center[0][1][4] = 989
4097 20:15:00.141272 tx_first_pass[0][1][4] = 977
4098 20:15:00.144590 tx_last_pass[0][1][4] = 1001
4099 20:15:00.148009 tx_win_center[0][1][5] = 986
4100 20:15:00.148308 tx_first_pass[0][1][5] = 975
4101 20:15:00.151242 tx_last_pass[0][1][5] = 998
4102 20:15:00.154586 tx_win_center[0][1][6] = 988
4103 20:15:00.157973 tx_first_pass[0][1][6] = 976
4104 20:15:00.161366 tx_last_pass[0][1][6] = 1000
4105 20:15:00.161778 tx_win_center[0][1][7] = 989
4106 20:15:00.164261 tx_first_pass[0][1][7] = 977
4107 20:15:00.167693 tx_last_pass[0][1][7] = 1001
4108 20:15:00.171078 tx_win_center[0][1][8] = 980
4109 20:15:00.174126 tx_first_pass[0][1][8] = 968
4110 20:15:00.174518 tx_last_pass[0][1][8] = 992
4111 20:15:00.177356 tx_win_center[0][1][9] = 982
4112 20:15:00.180873 tx_first_pass[0][1][9] = 970
4113 20:15:00.184003 tx_last_pass[0][1][9] = 994
4114 20:15:00.187157 tx_win_center[0][1][10] = 987
4115 20:15:00.187479 tx_first_pass[0][1][10] = 975
4116 20:15:00.190583 tx_last_pass[0][1][10] = 999
4117 20:15:00.194004 tx_win_center[0][1][11] = 980
4118 20:15:00.197302 tx_first_pass[0][1][11] = 969
4119 20:15:00.200352 tx_last_pass[0][1][11] = 992
4120 20:15:00.200722 tx_win_center[0][1][12] = 983
4121 20:15:00.203714 tx_first_pass[0][1][12] = 971
4122 20:15:00.207093 tx_last_pass[0][1][12] = 995
4123 20:15:00.210038 tx_win_center[0][1][13] = 982
4124 20:15:00.213631 tx_first_pass[0][1][13] = 970
4125 20:15:00.216541 tx_last_pass[0][1][13] = 994
4126 20:15:00.216930 tx_win_center[0][1][14] = 984
4127 20:15:00.220282 tx_first_pass[0][1][14] = 972
4128 20:15:00.223475 tx_last_pass[0][1][14] = 997
4129 20:15:00.226583 tx_win_center[0][1][15] = 986
4130 20:15:00.229897 tx_first_pass[0][1][15] = 975
4131 20:15:00.230455 tx_last_pass[0][1][15] = 998
4132 20:15:00.233021 tx_win_center[1][0][0] = 994
4133 20:15:00.236210 tx_first_pass[1][0][0] = 982
4134 20:15:00.239765 tx_last_pass[1][0][0] = 1006
4135 20:15:00.242896 tx_win_center[1][0][1] = 993
4136 20:15:00.243320 tx_first_pass[1][0][1] = 980
4137 20:15:00.246224 tx_last_pass[1][0][1] = 1006
4138 20:15:00.249525 tx_win_center[1][0][2] = 991
4139 20:15:00.252830 tx_first_pass[1][0][2] = 978
4140 20:15:00.256268 tx_last_pass[1][0][2] = 1004
4141 20:15:00.256692 tx_win_center[1][0][3] = 988
4142 20:15:00.259416 tx_first_pass[1][0][3] = 976
4143 20:15:00.262669 tx_last_pass[1][0][3] = 1001
4144 20:15:00.266060 tx_win_center[1][0][4] = 993
4145 20:15:00.269542 tx_first_pass[1][0][4] = 981
4146 20:15:00.270013 tx_last_pass[1][0][4] = 1005
4147 20:15:00.272442 tx_win_center[1][0][5] = 993
4148 20:15:00.275562 tx_first_pass[1][0][5] = 981
4149 20:15:00.278878 tx_last_pass[1][0][5] = 1006
4150 20:15:00.282183 tx_win_center[1][0][6] = 993
4151 20:15:00.282739 tx_first_pass[1][0][6] = 980
4152 20:15:00.285608 tx_last_pass[1][0][6] = 1006
4153 20:15:00.289281 tx_win_center[1][0][7] = 992
4154 20:15:00.292024 tx_first_pass[1][0][7] = 980
4155 20:15:00.295844 tx_last_pass[1][0][7] = 1005
4156 20:15:00.296359 tx_win_center[1][0][8] = 982
4157 20:15:00.298905 tx_first_pass[1][0][8] = 970
4158 20:15:00.302612 tx_last_pass[1][0][8] = 995
4159 20:15:00.306022 tx_win_center[1][0][9] = 981
4160 20:15:00.308729 tx_first_pass[1][0][9] = 970
4161 20:15:00.309153 tx_last_pass[1][0][9] = 993
4162 20:15:00.311591 tx_win_center[1][0][10] = 986
4163 20:15:00.315122 tx_first_pass[1][0][10] = 975
4164 20:15:00.318492 tx_last_pass[1][0][10] = 998
4165 20:15:00.321798 tx_win_center[1][0][11] = 987
4166 20:15:00.322245 tx_first_pass[1][0][11] = 975
4167 20:15:00.324835 tx_last_pass[1][0][11] = 999
4168 20:15:00.328155 tx_win_center[1][0][12] = 986
4169 20:15:00.331832 tx_first_pass[1][0][12] = 975
4170 20:15:00.334797 tx_last_pass[1][0][12] = 998
4171 20:15:00.338134 tx_win_center[1][0][13] = 987
4172 20:15:00.338585 tx_first_pass[1][0][13] = 975
4173 20:15:00.341320 tx_last_pass[1][0][13] = 999
4174 20:15:00.344690 tx_win_center[1][0][14] = 986
4175 20:15:00.348315 tx_first_pass[1][0][14] = 974
4176 20:15:00.350802 tx_last_pass[1][0][14] = 999
4177 20:15:00.351338 tx_win_center[1][0][15] = 980
4178 20:15:00.354419 tx_first_pass[1][0][15] = 969
4179 20:15:00.358164 tx_last_pass[1][0][15] = 992
4180 20:15:00.361044 tx_win_center[1][1][0] = 993
4181 20:15:00.364057 tx_first_pass[1][1][0] = 980
4182 20:15:00.364479 tx_last_pass[1][1][0] = 1006
4183 20:15:00.368048 tx_win_center[1][1][1] = 992
4184 20:15:00.371383 tx_first_pass[1][1][1] = 979
4185 20:15:00.374604 tx_last_pass[1][1][1] = 1005
4186 20:15:00.377619 tx_win_center[1][1][2] = 990
4187 20:15:00.378070 tx_first_pass[1][1][2] = 977
4188 20:15:00.381056 tx_last_pass[1][1][2] = 1003
4189 20:15:00.383856 tx_win_center[1][1][3] = 987
4190 20:15:00.387033 tx_first_pass[1][1][3] = 975
4191 20:15:00.390457 tx_last_pass[1][1][3] = 1000
4192 20:15:00.390954 tx_win_center[1][1][4] = 992
4193 20:15:00.393817 tx_first_pass[1][1][4] = 979
4194 20:15:00.397070 tx_last_pass[1][1][4] = 1005
4195 20:15:00.400680 tx_win_center[1][1][5] = 993
4196 20:15:00.403272 tx_first_pass[1][1][5] = 980
4197 20:15:00.403670 tx_last_pass[1][1][5] = 1006
4198 20:15:00.406696 tx_win_center[1][1][6] = 992
4199 20:15:00.410103 tx_first_pass[1][1][6] = 979
4200 20:15:00.413250 tx_last_pass[1][1][6] = 1005
4201 20:15:00.416713 tx_win_center[1][1][7] = 992
4202 20:15:00.417395 tx_first_pass[1][1][7] = 979
4203 20:15:00.420118 tx_last_pass[1][1][7] = 1005
4204 20:15:00.423603 tx_win_center[1][1][8] = 981
4205 20:15:00.426421 tx_first_pass[1][1][8] = 970
4206 20:15:00.430123 tx_last_pass[1][1][8] = 993
4207 20:15:00.430663 tx_win_center[1][1][9] = 981
4208 20:15:00.432715 tx_first_pass[1][1][9] = 970
4209 20:15:00.436286 tx_last_pass[1][1][9] = 993
4210 20:15:00.439393 tx_win_center[1][1][10] = 985
4211 20:15:00.442647 tx_first_pass[1][1][10] = 973
4212 20:15:00.443225 tx_last_pass[1][1][10] = 997
4213 20:15:00.445747 tx_win_center[1][1][11] = 985
4214 20:15:00.449877 tx_first_pass[1][1][11] = 973
4215 20:15:00.452664 tx_last_pass[1][1][11] = 998
4216 20:15:00.455938 tx_win_center[1][1][12] = 985
4217 20:15:00.456459 tx_first_pass[1][1][12] = 973
4218 20:15:00.459504 tx_last_pass[1][1][12] = 998
4219 20:15:00.462163 tx_win_center[1][1][13] = 986
4220 20:15:00.465625 tx_first_pass[1][1][13] = 974
4221 20:15:00.469251 tx_last_pass[1][1][13] = 999
4222 20:15:00.472322 tx_win_center[1][1][14] = 984
4223 20:15:00.472744 tx_first_pass[1][1][14] = 973
4224 20:15:00.475487 tx_last_pass[1][1][14] = 996
4225 20:15:00.478823 tx_win_center[1][1][15] = 979
4226 20:15:00.481819 tx_first_pass[1][1][15] = 968
4227 20:15:00.485373 tx_last_pass[1][1][15] = 991
4228 20:15:00.485792 dump params rx window
4229 20:15:00.488495 rx_firspass[0][0][0] = 7
4230 20:15:00.491970 rx_lastpass[0][0][0] = 36
4231 20:15:00.492534 rx_firspass[0][0][1] = 8
4232 20:15:00.495401 rx_lastpass[0][0][1] = 36
4233 20:15:00.498160 rx_firspass[0][0][2] = 6
4234 20:15:00.498578 rx_lastpass[0][0][2] = 39
4235 20:15:00.501598 rx_firspass[0][0][3] = -3
4236 20:15:00.505500 rx_lastpass[0][0][3] = 30
4237 20:15:00.508417 rx_firspass[0][0][4] = 6
4238 20:15:00.508909 rx_lastpass[0][0][4] = 36
4239 20:15:00.511689 rx_firspass[0][0][5] = 3
4240 20:15:00.514759 rx_lastpass[0][0][5] = 33
4241 20:15:00.515282 rx_firspass[0][0][6] = 4
4242 20:15:00.518280 rx_lastpass[0][0][6] = 33
4243 20:15:00.521381 rx_firspass[0][0][7] = 4
4244 20:15:00.524688 rx_lastpass[0][0][7] = 36
4245 20:15:00.525103 rx_firspass[0][0][8] = -2
4246 20:15:00.527926 rx_lastpass[0][0][8] = 30
4247 20:15:00.530862 rx_firspass[0][0][9] = 2
4248 20:15:00.534604 rx_lastpass[0][0][9] = 32
4249 20:15:00.535043 rx_firspass[0][0][10] = 9
4250 20:15:00.538226 rx_lastpass[0][0][10] = 37
4251 20:15:00.540574 rx_firspass[0][0][11] = 0
4252 20:15:00.540994 rx_lastpass[0][0][11] = 30
4253 20:15:00.544002 rx_firspass[0][0][12] = 3
4254 20:15:00.547196 rx_lastpass[0][0][12] = 31
4255 20:15:00.550869 rx_firspass[0][0][13] = 1
4256 20:15:00.551393 rx_lastpass[0][0][13] = 31
4257 20:15:00.553756 rx_firspass[0][0][14] = 0
4258 20:15:00.557408 rx_lastpass[0][0][14] = 35
4259 20:15:00.560094 rx_firspass[0][0][15] = 4
4260 20:15:00.560649 rx_lastpass[0][0][15] = 36
4261 20:15:00.563677 rx_firspass[0][1][0] = 4
4262 20:15:00.567453 rx_lastpass[0][1][0] = 39
4263 20:15:00.570436 rx_firspass[0][1][1] = 4
4264 20:15:00.570880 rx_lastpass[0][1][1] = 38
4265 20:15:00.573314 rx_firspass[0][1][2] = 5
4266 20:15:00.576771 rx_lastpass[0][1][2] = 40
4267 20:15:00.577208 rx_firspass[0][1][3] = -2
4268 20:15:00.579959 rx_lastpass[0][1][3] = 31
4269 20:15:00.583197 rx_firspass[0][1][4] = 3
4270 20:15:00.586760 rx_lastpass[0][1][4] = 38
4271 20:15:00.587306 rx_firspass[0][1][5] = -2
4272 20:15:00.589540 rx_lastpass[0][1][5] = 34
4273 20:15:00.593404 rx_firspass[0][1][6] = 1
4274 20:15:00.593959 rx_lastpass[0][1][6] = 35
4275 20:15:00.596342 rx_firspass[0][1][7] = 3
4276 20:15:00.600334 rx_lastpass[0][1][7] = 37
4277 20:15:00.602991 rx_firspass[0][1][8] = -4
4278 20:15:00.603410 rx_lastpass[0][1][8] = 32
4279 20:15:00.606263 rx_firspass[0][1][9] = -2
4280 20:15:00.609317 rx_lastpass[0][1][9] = 34
4281 20:15:00.609780 rx_firspass[0][1][10] = 6
4282 20:15:00.612780 rx_lastpass[0][1][10] = 40
4283 20:15:00.616432 rx_firspass[0][1][11] = -3
4284 20:15:00.619360 rx_lastpass[0][1][11] = 32
4285 20:15:00.619780 rx_firspass[0][1][12] = -1
4286 20:15:00.622623 rx_lastpass[0][1][12] = 34
4287 20:15:00.625717 rx_firspass[0][1][13] = -1
4288 20:15:00.629109 rx_lastpass[0][1][13] = 33
4289 20:15:00.629849 rx_firspass[0][1][14] = 2
4290 20:15:00.632236 rx_lastpass[0][1][14] = 35
4291 20:15:00.635430 rx_firspass[0][1][15] = 4
4292 20:15:00.638893 rx_lastpass[0][1][15] = 37
4293 20:15:00.639508 rx_firspass[1][0][0] = 5
4294 20:15:00.642242 rx_lastpass[1][0][0] = 36
4295 20:15:00.645270 rx_firspass[1][0][1] = 3
4296 20:15:00.645727 rx_lastpass[1][0][1] = 36
4297 20:15:00.648756 rx_firspass[1][0][2] = 0
4298 20:15:00.652065 rx_lastpass[1][0][2] = 34
4299 20:15:00.655516 rx_firspass[1][0][3] = 0
4300 20:15:00.655933 rx_lastpass[1][0][3] = 31
4301 20:15:00.658691 rx_firspass[1][0][4] = 5
4302 20:15:00.661631 rx_lastpass[1][0][4] = 35
4303 20:15:00.662051 rx_firspass[1][0][5] = 9
4304 20:15:00.665024 rx_lastpass[1][0][5] = 38
4305 20:15:00.668223 rx_firspass[1][0][6] = 5
4306 20:15:00.671422 rx_lastpass[1][0][6] = 38
4307 20:15:00.671792 rx_firspass[1][0][7] = 5
4308 20:15:00.674695 rx_lastpass[1][0][7] = 34
4309 20:15:00.678613 rx_firspass[1][0][8] = 1
4310 20:15:00.678909 rx_lastpass[1][0][8] = 33
4311 20:15:00.681355 rx_firspass[1][0][9] = 0
4312 20:15:00.684479 rx_lastpass[1][0][9] = 31
4313 20:15:00.687884 rx_firspass[1][0][10] = 3
4314 20:15:00.688179 rx_lastpass[1][0][10] = 36
4315 20:15:00.691245 rx_firspass[1][0][11] = 4
4316 20:15:00.694305 rx_lastpass[1][0][11] = 36
4317 20:15:00.697876 rx_firspass[1][0][12] = 6
4318 20:15:00.698239 rx_lastpass[1][0][12] = 34
4319 20:15:00.700951 rx_firspass[1][0][13] = 5
4320 20:15:00.704306 rx_lastpass[1][0][13] = 35
4321 20:15:00.704719 rx_firspass[1][0][14] = 5
4322 20:15:00.707743 rx_lastpass[1][0][14] = 36
4323 20:15:00.711022 rx_firspass[1][0][15] = -4
4324 20:15:00.714706 rx_lastpass[1][0][15] = 29
4325 20:15:00.715265 rx_firspass[1][1][0] = 4
4326 20:15:00.717310 rx_lastpass[1][1][0] = 40
4327 20:15:00.720544 rx_firspass[1][1][1] = 4
4328 20:15:00.723934 rx_lastpass[1][1][1] = 38
4329 20:15:00.724352 rx_firspass[1][1][2] = 2
4330 20:15:00.727245 rx_lastpass[1][1][2] = 34
4331 20:15:00.730381 rx_firspass[1][1][3] = -2
4332 20:15:00.730796 rx_lastpass[1][1][3] = 33
4333 20:15:00.734104 rx_firspass[1][1][4] = 5
4334 20:15:00.737599 rx_lastpass[1][1][4] = 39
4335 20:15:00.740644 rx_firspass[1][1][5] = 6
4336 20:15:00.741065 rx_lastpass[1][1][5] = 40
4337 20:15:00.744221 rx_firspass[1][1][6] = 5
4338 20:15:00.747184 rx_lastpass[1][1][6] = 40
4339 20:15:00.747772 rx_firspass[1][1][7] = 3
4340 20:15:00.750301 rx_lastpass[1][1][7] = 38
4341 20:15:00.753933 rx_firspass[1][1][8] = -1
4342 20:15:00.756573 rx_lastpass[1][1][8] = 35
4343 20:15:00.756990 rx_firspass[1][1][9] = -2
4344 20:15:00.759911 rx_lastpass[1][1][9] = 33
4345 20:15:00.763448 rx_firspass[1][1][10] = 3
4346 20:15:00.763961 rx_lastpass[1][1][10] = 38
4347 20:15:00.766719 rx_firspass[1][1][11] = 3
4348 20:15:00.770068 rx_lastpass[1][1][11] = 38
4349 20:15:00.773396 rx_firspass[1][1][12] = 3
4350 20:15:00.773948 rx_lastpass[1][1][12] = 37
4351 20:15:00.776815 rx_firspass[1][1][13] = 4
4352 20:15:00.780138 rx_lastpass[1][1][13] = 39
4353 20:15:00.783095 rx_firspass[1][1][14] = 4
4354 20:15:00.783513 rx_lastpass[1][1][14] = 40
4355 20:15:00.786304 rx_firspass[1][1][15] = -4
4356 20:15:00.789522 rx_lastpass[1][1][15] = 31
4357 20:15:00.790084 dump params clk_delay
4358 20:15:00.792753 clk_delay[0] = -1
4359 20:15:00.793363 clk_delay[1] = 0
4360 20:15:00.796091 dump params dqs_delay
4361 20:15:00.799250 dqs_delay[0][0] = -1
4362 20:15:00.799822 dqs_delay[0][1] = 0
4363 20:15:00.802379 dqs_delay[1][0] = 0
4364 20:15:00.802831 dqs_delay[1][1] = -1
4365 20:15:00.806204 dump params delay_cell_unit = 744
4366 20:15:00.808969 dump source = 0x0
4367 20:15:00.809385 dump params frequency:1200
4368 20:15:00.812707 dump params rank number:2
4369 20:15:00.813124
4370 20:15:00.815757 dump params write leveling
4371 20:15:00.818879 write leveling[0][0][0] = 0x0
4372 20:15:00.822325 write leveling[0][0][1] = 0x0
4373 20:15:00.822891 write leveling[0][1][0] = 0x0
4374 20:15:00.825782 write leveling[0][1][1] = 0x0
4375 20:15:00.829487 write leveling[1][0][0] = 0x0
4376 20:15:00.832005 write leveling[1][0][1] = 0x0
4377 20:15:00.835365 write leveling[1][1][0] = 0x0
4378 20:15:00.838571 write leveling[1][1][1] = 0x0
4379 20:15:00.839110 dump params cbt_cs
4380 20:15:00.841946 cbt_cs[0][0] = 0x0
4381 20:15:00.842392 cbt_cs[0][1] = 0x0
4382 20:15:00.845472 cbt_cs[1][0] = 0x0
4383 20:15:00.845848 cbt_cs[1][1] = 0x0
4384 20:15:00.848376 dump params cbt_mr12
4385 20:15:00.848792 cbt_mr12[0][0] = 0x0
4386 20:15:00.851543 cbt_mr12[0][1] = 0x0
4387 20:15:00.851961 cbt_mr12[1][0] = 0x0
4388 20:15:00.855861 cbt_mr12[1][1] = 0x0
4389 20:15:00.858622 dump params tx window
4390 20:15:00.859147 tx_center_min[0][0][0] = 0
4391 20:15:00.862089 tx_center_max[0][0][0] = 0
4392 20:15:00.865237 tx_center_min[0][0][1] = 0
4393 20:15:00.868348 tx_center_max[0][0][1] = 0
4394 20:15:00.868820 tx_center_min[0][1][0] = 0
4395 20:15:00.871735 tx_center_max[0][1][0] = 0
4396 20:15:00.874946 tx_center_min[0][1][1] = 0
4397 20:15:00.877645 tx_center_max[0][1][1] = 0
4398 20:15:00.878120 tx_center_min[1][0][0] = 0
4399 20:15:00.881218 tx_center_max[1][0][0] = 0
4400 20:15:00.884822 tx_center_min[1][0][1] = 0
4401 20:15:00.887712 tx_center_max[1][0][1] = 0
4402 20:15:00.888133 tx_center_min[1][1][0] = 0
4403 20:15:00.891502 tx_center_max[1][1][0] = 0
4404 20:15:00.894246 tx_center_min[1][1][1] = 0
4405 20:15:00.897599 tx_center_max[1][1][1] = 0
4406 20:15:00.898032 dump params tx window
4407 20:15:00.901035 tx_win_center[0][0][0] = 0
4408 20:15:00.904312 tx_first_pass[0][0][0] = 0
4409 20:15:00.904859 tx_last_pass[0][0][0] = 0
4410 20:15:00.907551 tx_win_center[0][0][1] = 0
4411 20:15:00.910848 tx_first_pass[0][0][1] = 0
4412 20:15:00.913824 tx_last_pass[0][0][1] = 0
4413 20:15:00.914386 tx_win_center[0][0][2] = 0
4414 20:15:00.917294 tx_first_pass[0][0][2] = 0
4415 20:15:00.920433 tx_last_pass[0][0][2] = 0
4416 20:15:00.923803 tx_win_center[0][0][3] = 0
4417 20:15:00.924353 tx_first_pass[0][0][3] = 0
4418 20:15:00.927049 tx_last_pass[0][0][3] = 0
4419 20:15:00.930810 tx_win_center[0][0][4] = 0
4420 20:15:00.933642 tx_first_pass[0][0][4] = 0
4421 20:15:00.934059 tx_last_pass[0][0][4] = 0
4422 20:15:00.936727 tx_win_center[0][0][5] = 0
4423 20:15:00.940005 tx_first_pass[0][0][5] = 0
4424 20:15:00.943897 tx_last_pass[0][0][5] = 0
4425 20:15:00.944405 tx_win_center[0][0][6] = 0
4426 20:15:00.946831 tx_first_pass[0][0][6] = 0
4427 20:15:00.950203 tx_last_pass[0][0][6] = 0
4428 20:15:00.953019 tx_win_center[0][0][7] = 0
4429 20:15:00.953731 tx_first_pass[0][0][7] = 0
4430 20:15:00.956551 tx_last_pass[0][0][7] = 0
4431 20:15:00.959400 tx_win_center[0][0][8] = 0
4432 20:15:00.963215 tx_first_pass[0][0][8] = 0
4433 20:15:00.963645 tx_last_pass[0][0][8] = 0
4434 20:15:00.966377 tx_win_center[0][0][9] = 0
4435 20:15:00.969475 tx_first_pass[0][0][9] = 0
4436 20:15:00.969911 tx_last_pass[0][0][9] = 0
4437 20:15:00.972575 tx_win_center[0][0][10] = 0
4438 20:15:00.976346 tx_first_pass[0][0][10] = 0
4439 20:15:00.979616 tx_last_pass[0][0][10] = 0
4440 20:15:00.980153 tx_win_center[0][0][11] = 0
4441 20:15:00.982757 tx_first_pass[0][0][11] = 0
4442 20:15:00.985800 tx_last_pass[0][0][11] = 0
4443 20:15:00.989347 tx_win_center[0][0][12] = 0
4444 20:15:00.992105 tx_first_pass[0][0][12] = 0
4445 20:15:00.992529 tx_last_pass[0][0][12] = 0
4446 20:15:00.995377 tx_win_center[0][0][13] = 0
4447 20:15:00.998960 tx_first_pass[0][0][13] = 0
4448 20:15:01.002329 tx_last_pass[0][0][13] = 0
4449 20:15:01.002745 tx_win_center[0][0][14] = 0
4450 20:15:01.005193 tx_first_pass[0][0][14] = 0
4451 20:15:01.008497 tx_last_pass[0][0][14] = 0
4452 20:15:01.011822 tx_win_center[0][0][15] = 0
4453 20:15:01.012240 tx_first_pass[0][0][15] = 0
4454 20:15:01.015339 tx_last_pass[0][0][15] = 0
4455 20:15:01.018630 tx_win_center[0][1][0] = 0
4456 20:15:01.021914 tx_first_pass[0][1][0] = 0
4457 20:15:01.022379 tx_last_pass[0][1][0] = 0
4458 20:15:01.025523 tx_win_center[0][1][1] = 0
4459 20:15:01.028870 tx_first_pass[0][1][1] = 0
4460 20:15:01.031685 tx_last_pass[0][1][1] = 0
4461 20:15:01.032212 tx_win_center[0][1][2] = 0
4462 20:15:01.034930 tx_first_pass[0][1][2] = 0
4463 20:15:01.037887 tx_last_pass[0][1][2] = 0
4464 20:15:01.041313 tx_win_center[0][1][3] = 0
4465 20:15:01.041757 tx_first_pass[0][1][3] = 0
4466 20:15:01.044827 tx_last_pass[0][1][3] = 0
4467 20:15:01.048118 tx_win_center[0][1][4] = 0
4468 20:15:01.051311 tx_first_pass[0][1][4] = 0
4469 20:15:01.051733 tx_last_pass[0][1][4] = 0
4470 20:15:01.054475 tx_win_center[0][1][5] = 0
4471 20:15:01.058060 tx_first_pass[0][1][5] = 0
4472 20:15:01.058475 tx_last_pass[0][1][5] = 0
4473 20:15:01.061332 tx_win_center[0][1][6] = 0
4474 20:15:01.064361 tx_first_pass[0][1][6] = 0
4475 20:15:01.067768 tx_last_pass[0][1][6] = 0
4476 20:15:01.068186 tx_win_center[0][1][7] = 0
4477 20:15:01.070850 tx_first_pass[0][1][7] = 0
4478 20:15:01.074049 tx_last_pass[0][1][7] = 0
4479 20:15:01.077130 tx_win_center[0][1][8] = 0
4480 20:15:01.077222 tx_first_pass[0][1][8] = 0
4481 20:15:01.080427 tx_last_pass[0][1][8] = 0
4482 20:15:01.083445 tx_win_center[0][1][9] = 0
4483 20:15:01.086788 tx_first_pass[0][1][9] = 0
4484 20:15:01.086879 tx_last_pass[0][1][9] = 0
4485 20:15:01.090728 tx_win_center[0][1][10] = 0
4486 20:15:01.094052 tx_first_pass[0][1][10] = 0
4487 20:15:01.096661 tx_last_pass[0][1][10] = 0
4488 20:15:01.096852 tx_win_center[0][1][11] = 0
4489 20:15:01.100429 tx_first_pass[0][1][11] = 0
4490 20:15:01.103894 tx_last_pass[0][1][11] = 0
4491 20:15:01.106870 tx_win_center[0][1][12] = 0
4492 20:15:01.107086 tx_first_pass[0][1][12] = 0
4493 20:15:01.110352 tx_last_pass[0][1][12] = 0
4494 20:15:01.113473 tx_win_center[0][1][13] = 0
4495 20:15:01.116326 tx_first_pass[0][1][13] = 0
4496 20:15:01.116489 tx_last_pass[0][1][13] = 0
4497 20:15:01.119673 tx_win_center[0][1][14] = 0
4498 20:15:01.122952 tx_first_pass[0][1][14] = 0
4499 20:15:01.126552 tx_last_pass[0][1][14] = 0
4500 20:15:01.126775 tx_win_center[0][1][15] = 0
4501 20:15:01.129817 tx_first_pass[0][1][15] = 0
4502 20:15:01.133099 tx_last_pass[0][1][15] = 0
4503 20:15:01.136679 tx_win_center[1][0][0] = 0
4504 20:15:01.140110 tx_first_pass[1][0][0] = 0
4505 20:15:01.140664 tx_last_pass[1][0][0] = 0
4506 20:15:01.142916 tx_win_center[1][0][1] = 0
4507 20:15:01.146494 tx_first_pass[1][0][1] = 0
4508 20:15:01.146916 tx_last_pass[1][0][1] = 0
4509 20:15:01.149917 tx_win_center[1][0][2] = 0
4510 20:15:01.152885 tx_first_pass[1][0][2] = 0
4511 20:15:01.155840 tx_last_pass[1][0][2] = 0
4512 20:15:01.155932 tx_win_center[1][0][3] = 0
4513 20:15:01.158725 tx_first_pass[1][0][3] = 0
4514 20:15:01.162121 tx_last_pass[1][0][3] = 0
4515 20:15:01.165351 tx_win_center[1][0][4] = 0
4516 20:15:01.165448 tx_first_pass[1][0][4] = 0
4517 20:15:01.168639 tx_last_pass[1][0][4] = 0
4518 20:15:01.172404 tx_win_center[1][0][5] = 0
4519 20:15:01.175950 tx_first_pass[1][0][5] = 0
4520 20:15:01.176139 tx_last_pass[1][0][5] = 0
4521 20:15:01.178752 tx_win_center[1][0][6] = 0
4522 20:15:01.182374 tx_first_pass[1][0][6] = 0
4523 20:15:01.182547 tx_last_pass[1][0][6] = 0
4524 20:15:01.185167 tx_win_center[1][0][7] = 0
4525 20:15:01.188567 tx_first_pass[1][0][7] = 0
4526 20:15:01.192090 tx_last_pass[1][0][7] = 0
4527 20:15:01.192327 tx_win_center[1][0][8] = 0
4528 20:15:01.195023 tx_first_pass[1][0][8] = 0
4529 20:15:01.198192 tx_last_pass[1][0][8] = 0
4530 20:15:01.201665 tx_win_center[1][0][9] = 0
4531 20:15:01.201856 tx_first_pass[1][0][9] = 0
4532 20:15:01.205026 tx_last_pass[1][0][9] = 0
4533 20:15:01.208153 tx_win_center[1][0][10] = 0
4534 20:15:01.212029 tx_first_pass[1][0][10] = 0
4535 20:15:01.212306 tx_last_pass[1][0][10] = 0
4536 20:15:01.215246 tx_win_center[1][0][11] = 0
4537 20:15:01.218264 tx_first_pass[1][0][11] = 0
4538 20:15:01.221536 tx_last_pass[1][0][11] = 0
4539 20:15:01.221961 tx_win_center[1][0][12] = 0
4540 20:15:01.224933 tx_first_pass[1][0][12] = 0
4541 20:15:01.227757 tx_last_pass[1][0][12] = 0
4542 20:15:01.231060 tx_win_center[1][0][13] = 0
4543 20:15:01.234493 tx_first_pass[1][0][13] = 0
4544 20:15:01.234910 tx_last_pass[1][0][13] = 0
4545 20:15:01.237927 tx_win_center[1][0][14] = 0
4546 20:15:01.241414 tx_first_pass[1][0][14] = 0
4547 20:15:01.244419 tx_last_pass[1][0][14] = 0
4548 20:15:01.244876 tx_win_center[1][0][15] = 0
4549 20:15:01.247758 tx_first_pass[1][0][15] = 0
4550 20:15:01.250891 tx_last_pass[1][0][15] = 0
4551 20:15:01.254226 tx_win_center[1][1][0] = 0
4552 20:15:01.254695 tx_first_pass[1][1][0] = 0
4553 20:15:01.257486 tx_last_pass[1][1][0] = 0
4554 20:15:01.260804 tx_win_center[1][1][1] = 0
4555 20:15:01.264194 tx_first_pass[1][1][1] = 0
4556 20:15:01.264614 tx_last_pass[1][1][1] = 0
4557 20:15:01.267344 tx_win_center[1][1][2] = 0
4558 20:15:01.270360 tx_first_pass[1][1][2] = 0
4559 20:15:01.270782 tx_last_pass[1][1][2] = 0
4560 20:15:01.273737 tx_win_center[1][1][3] = 0
4561 20:15:01.277189 tx_first_pass[1][1][3] = 0
4562 20:15:01.280246 tx_last_pass[1][1][3] = 0
4563 20:15:01.280667 tx_win_center[1][1][4] = 0
4564 20:15:01.283883 tx_first_pass[1][1][4] = 0
4565 20:15:01.286946 tx_last_pass[1][1][4] = 0
4566 20:15:01.289982 tx_win_center[1][1][5] = 0
4567 20:15:01.290400 tx_first_pass[1][1][5] = 0
4568 20:15:01.293727 tx_last_pass[1][1][5] = 0
4569 20:15:01.296582 tx_win_center[1][1][6] = 0
4570 20:15:01.300132 tx_first_pass[1][1][6] = 0
4571 20:15:01.300553 tx_last_pass[1][1][6] = 0
4572 20:15:01.303158 tx_win_center[1][1][7] = 0
4573 20:15:01.306398 tx_first_pass[1][1][7] = 0
4574 20:15:01.309800 tx_last_pass[1][1][7] = 0
4575 20:15:01.310356 tx_win_center[1][1][8] = 0
4576 20:15:01.313053 tx_first_pass[1][1][8] = 0
4577 20:15:01.316475 tx_last_pass[1][1][8] = 0
4578 20:15:01.319869 tx_win_center[1][1][9] = 0
4579 20:15:01.320361 tx_first_pass[1][1][9] = 0
4580 20:15:01.322718 tx_last_pass[1][1][9] = 0
4581 20:15:01.326305 tx_win_center[1][1][10] = 0
4582 20:15:01.329686 tx_first_pass[1][1][10] = 0
4583 20:15:01.330106 tx_last_pass[1][1][10] = 0
4584 20:15:01.332569 tx_win_center[1][1][11] = 0
4585 20:15:01.335871 tx_first_pass[1][1][11] = 0
4586 20:15:01.339309 tx_last_pass[1][1][11] = 0
4587 20:15:01.339734 tx_win_center[1][1][12] = 0
4588 20:15:01.342650 tx_first_pass[1][1][12] = 0
4589 20:15:01.346245 tx_last_pass[1][1][12] = 0
4590 20:15:01.348903 tx_win_center[1][1][13] = 0
4591 20:15:01.349325 tx_first_pass[1][1][13] = 0
4592 20:15:01.352223 tx_last_pass[1][1][13] = 0
4593 20:15:01.355495 tx_win_center[1][1][14] = 0
4594 20:15:01.358892 tx_first_pass[1][1][14] = 0
4595 20:15:01.359333 tx_last_pass[1][1][14] = 0
4596 20:15:01.362787 tx_win_center[1][1][15] = 0
4597 20:15:01.365352 tx_first_pass[1][1][15] = 0
4598 20:15:01.368987 tx_last_pass[1][1][15] = 0
4599 20:15:01.369478 dump params rx window
4600 20:15:01.371975 rx_firspass[0][0][0] = 0
4601 20:15:01.375191 rx_lastpass[0][0][0] = 0
4602 20:15:01.375731 rx_firspass[0][0][1] = 0
4603 20:15:01.378505 rx_lastpass[0][0][1] = 0
4604 20:15:01.381856 rx_firspass[0][0][2] = 0
4605 20:15:01.385065 rx_lastpass[0][0][2] = 0
4606 20:15:01.385543 rx_firspass[0][0][3] = 0
4607 20:15:01.388019 rx_lastpass[0][0][3] = 0
4608 20:15:01.391300 rx_firspass[0][0][4] = 0
4609 20:15:01.391718 rx_lastpass[0][0][4] = 0
4610 20:15:01.394812 rx_firspass[0][0][5] = 0
4611 20:15:01.397965 rx_lastpass[0][0][5] = 0
4612 20:15:01.398567 rx_firspass[0][0][6] = 0
4613 20:15:01.401798 rx_lastpass[0][0][6] = 0
4614 20:15:01.404763 rx_firspass[0][0][7] = 0
4615 20:15:01.405207 rx_lastpass[0][0][7] = 0
4616 20:15:01.407849 rx_firspass[0][0][8] = 0
4617 20:15:01.411223 rx_lastpass[0][0][8] = 0
4618 20:15:01.414439 rx_firspass[0][0][9] = 0
4619 20:15:01.414864 rx_lastpass[0][0][9] = 0
4620 20:15:01.418198 rx_firspass[0][0][10] = 0
4621 20:15:01.421315 rx_lastpass[0][0][10] = 0
4622 20:15:01.421909 rx_firspass[0][0][11] = 0
4623 20:15:01.424312 rx_lastpass[0][0][11] = 0
4624 20:15:01.427671 rx_firspass[0][0][12] = 0
4625 20:15:01.430991 rx_lastpass[0][0][12] = 0
4626 20:15:01.431408 rx_firspass[0][0][13] = 0
4627 20:15:01.433808 rx_lastpass[0][0][13] = 0
4628 20:15:01.437263 rx_firspass[0][0][14] = 0
4629 20:15:01.440721 rx_lastpass[0][0][14] = 0
4630 20:15:01.441138 rx_firspass[0][0][15] = 0
4631 20:15:01.444061 rx_lastpass[0][0][15] = 0
4632 20:15:01.447448 rx_firspass[0][1][0] = 0
4633 20:15:01.447865 rx_lastpass[0][1][0] = 0
4634 20:15:01.450738 rx_firspass[0][1][1] = 0
4635 20:15:01.453617 rx_lastpass[0][1][1] = 0
4636 20:15:01.454035 rx_firspass[0][1][2] = 0
4637 20:15:01.457313 rx_lastpass[0][1][2] = 0
4638 20:15:01.460444 rx_firspass[0][1][3] = 0
4639 20:15:01.463571 rx_lastpass[0][1][3] = 0
4640 20:15:01.463994 rx_firspass[0][1][4] = 0
4641 20:15:01.466899 rx_lastpass[0][1][4] = 0
4642 20:15:01.470494 rx_firspass[0][1][5] = 0
4643 20:15:01.470913 rx_lastpass[0][1][5] = 0
4644 20:15:01.473647 rx_firspass[0][1][6] = 0
4645 20:15:01.476952 rx_lastpass[0][1][6] = 0
4646 20:15:01.477367 rx_firspass[0][1][7] = 0
4647 20:15:01.480027 rx_lastpass[0][1][7] = 0
4648 20:15:01.483104 rx_firspass[0][1][8] = 0
4649 20:15:01.487015 rx_lastpass[0][1][8] = 0
4650 20:15:01.487433 rx_firspass[0][1][9] = 0
4651 20:15:01.489640 rx_lastpass[0][1][9] = 0
4652 20:15:01.493452 rx_firspass[0][1][10] = 0
4653 20:15:01.493991 rx_lastpass[0][1][10] = 0
4654 20:15:01.496516 rx_firspass[0][1][11] = 0
4655 20:15:01.499890 rx_lastpass[0][1][11] = 0
4656 20:15:01.502830 rx_firspass[0][1][12] = 0
4657 20:15:01.503353 rx_lastpass[0][1][12] = 0
4658 20:15:01.506141 rx_firspass[0][1][13] = 0
4659 20:15:01.509329 rx_lastpass[0][1][13] = 0
4660 20:15:01.509934 rx_firspass[0][1][14] = 0
4661 20:15:01.513203 rx_lastpass[0][1][14] = 0
4662 20:15:01.516044 rx_firspass[0][1][15] = 0
4663 20:15:01.519451 rx_lastpass[0][1][15] = 0
4664 20:15:01.519878 rx_firspass[1][0][0] = 0
4665 20:15:01.522286 rx_lastpass[1][0][0] = 0
4666 20:15:01.526245 rx_firspass[1][0][1] = 0
4667 20:15:01.526660 rx_lastpass[1][0][1] = 0
4668 20:15:01.529194 rx_firspass[1][0][2] = 0
4669 20:15:01.532550 rx_lastpass[1][0][2] = 0
4670 20:15:01.533259 rx_firspass[1][0][3] = 0
4671 20:15:01.535872 rx_lastpass[1][0][3] = 0
4672 20:15:01.539491 rx_firspass[1][0][4] = 0
4673 20:15:01.542587 rx_lastpass[1][0][4] = 0
4674 20:15:01.543006 rx_firspass[1][0][5] = 0
4675 20:15:01.545989 rx_lastpass[1][0][5] = 0
4676 20:15:01.548817 rx_firspass[1][0][6] = 0
4677 20:15:01.549236 rx_lastpass[1][0][6] = 0
4678 20:15:01.552244 rx_firspass[1][0][7] = 0
4679 20:15:01.555447 rx_lastpass[1][0][7] = 0
4680 20:15:01.555867 rx_firspass[1][0][8] = 0
4681 20:15:01.558637 rx_lastpass[1][0][8] = 0
4682 20:15:01.561903 rx_firspass[1][0][9] = 0
4683 20:15:01.565307 rx_lastpass[1][0][9] = 0
4684 20:15:01.565769 rx_firspass[1][0][10] = 0
4685 20:15:01.569061 rx_lastpass[1][0][10] = 0
4686 20:15:01.571941 rx_firspass[1][0][11] = 0
4687 20:15:01.572359 rx_lastpass[1][0][11] = 0
4688 20:15:01.575141 rx_firspass[1][0][12] = 0
4689 20:15:01.578636 rx_lastpass[1][0][12] = 0
4690 20:15:01.581743 rx_firspass[1][0][13] = 0
4691 20:15:01.582160 rx_lastpass[1][0][13] = 0
4692 20:15:01.584633 rx_firspass[1][0][14] = 0
4693 20:15:01.588130 rx_lastpass[1][0][14] = 0
4694 20:15:01.588549 rx_firspass[1][0][15] = 0
4695 20:15:01.591382 rx_lastpass[1][0][15] = 0
4696 20:15:01.594564 rx_firspass[1][1][0] = 0
4697 20:15:01.598016 rx_lastpass[1][1][0] = 0
4698 20:15:01.598441 rx_firspass[1][1][1] = 0
4699 20:15:01.601322 rx_lastpass[1][1][1] = 0
4700 20:15:01.604382 rx_firspass[1][1][2] = 0
4701 20:15:01.604863 rx_lastpass[1][1][2] = 0
4702 20:15:01.608000 rx_firspass[1][1][3] = 0
4703 20:15:01.611003 rx_lastpass[1][1][3] = 0
4704 20:15:01.611445 rx_firspass[1][1][4] = 0
4705 20:15:01.614349 rx_lastpass[1][1][4] = 0
4706 20:15:01.617764 rx_firspass[1][1][5] = 0
4707 20:15:01.621005 rx_lastpass[1][1][5] = 0
4708 20:15:01.621427 rx_firspass[1][1][6] = 0
4709 20:15:01.623956 rx_lastpass[1][1][6] = 0
4710 20:15:01.627355 rx_firspass[1][1][7] = 0
4711 20:15:01.627799 rx_lastpass[1][1][7] = 0
4712 20:15:01.630918 rx_firspass[1][1][8] = 0
4713 20:15:01.633985 rx_lastpass[1][1][8] = 0
4714 20:15:01.634077 rx_firspass[1][1][9] = 0
4715 20:15:01.636992 rx_lastpass[1][1][9] = 0
4716 20:15:01.639988 rx_firspass[1][1][10] = 0
4717 20:15:01.643382 rx_lastpass[1][1][10] = 0
4718 20:15:01.643474 rx_firspass[1][1][11] = 0
4719 20:15:01.646658 rx_lastpass[1][1][11] = 0
4720 20:15:01.650807 rx_firspass[1][1][12] = 0
4721 20:15:01.653814 rx_lastpass[1][1][12] = 0
4722 20:15:01.654234 rx_firspass[1][1][13] = 0
4723 20:15:01.657240 rx_lastpass[1][1][13] = 0
4724 20:15:01.660280 rx_firspass[1][1][14] = 0
4725 20:15:01.660697 rx_lastpass[1][1][14] = 0
4726 20:15:01.663821 rx_firspass[1][1][15] = 0
4727 20:15:01.666844 rx_lastpass[1][1][15] = 0
4728 20:15:01.667267 dump params clk_delay
4729 20:15:01.669950 clk_delay[0] = 0
4730 20:15:01.670368 clk_delay[1] = 0
4731 20:15:01.673332 dump params dqs_delay
4732 20:15:01.676233 dqs_delay[0][0] = 0
4733 20:15:01.676652 dqs_delay[0][1] = 0
4734 20:15:01.679723 dqs_delay[1][0] = 0
4735 20:15:01.680141 dqs_delay[1][1] = 0
4736 20:15:01.683012 dump params delay_cell_unit = 744
4737 20:15:01.686191 dump source = 0x0
4738 20:15:01.686611 dump params frequency:800
4739 20:15:01.690167 dump params rank number:2
4740 20:15:01.690585
4741 20:15:01.692838 dump params write leveling
4742 20:15:01.695998 write leveling[0][0][0] = 0x0
4743 20:15:01.699245 write leveling[0][0][1] = 0x0
4744 20:15:01.699899 write leveling[0][1][0] = 0x0
4745 20:15:01.702806 write leveling[0][1][1] = 0x0
4746 20:15:01.705648 write leveling[1][0][0] = 0x0
4747 20:15:01.709027 write leveling[1][0][1] = 0x0
4748 20:15:01.712145 write leveling[1][1][0] = 0x0
4749 20:15:01.712570 write leveling[1][1][1] = 0x0
4750 20:15:01.715806 dump params cbt_cs
4751 20:15:01.716229 cbt_cs[0][0] = 0x0
4752 20:15:01.719136 cbt_cs[0][1] = 0x0
4753 20:15:01.722652 cbt_cs[1][0] = 0x0
4754 20:15:01.723171 cbt_cs[1][1] = 0x0
4755 20:15:01.725939 dump params cbt_mr12
4756 20:15:01.726361 cbt_mr12[0][0] = 0x0
4757 20:15:01.729217 cbt_mr12[0][1] = 0x0
4758 20:15:01.729725 cbt_mr12[1][0] = 0x0
4759 20:15:01.731995 cbt_mr12[1][1] = 0x0
4760 20:15:01.735236 dump params tx window
4761 20:15:01.735674 tx_center_min[0][0][0] = 0
4762 20:15:01.739067 tx_center_max[0][0][0] = 0
4763 20:15:01.742088 tx_center_min[0][0][1] = 0
4764 20:15:01.745393 tx_center_max[0][0][1] = 0
4765 20:15:01.745997 tx_center_min[0][1][0] = 0
4766 20:15:01.748511 tx_center_max[0][1][0] = 0
4767 20:15:01.751726 tx_center_min[0][1][1] = 0
4768 20:15:01.754738 tx_center_max[0][1][1] = 0
4769 20:15:01.754834 tx_center_min[1][0][0] = 0
4770 20:15:01.757900 tx_center_max[1][0][0] = 0
4771 20:15:01.761557 tx_center_min[1][0][1] = 0
4772 20:15:01.765138 tx_center_max[1][0][1] = 0
4773 20:15:01.765582 tx_center_min[1][1][0] = 0
4774 20:15:01.768769 tx_center_max[1][1][0] = 0
4775 20:15:01.771592 tx_center_min[1][1][1] = 0
4776 20:15:01.774613 tx_center_max[1][1][1] = 0
4777 20:15:01.775057 dump params tx window
4778 20:15:01.777873 tx_win_center[0][0][0] = 0
4779 20:15:01.781077 tx_first_pass[0][0][0] = 0
4780 20:15:01.781173 tx_last_pass[0][0][0] = 0
4781 20:15:01.784140 tx_win_center[0][0][1] = 0
4782 20:15:01.787064 tx_first_pass[0][0][1] = 0
4783 20:15:01.790912 tx_last_pass[0][0][1] = 0
4784 20:15:01.791008 tx_win_center[0][0][2] = 0
4785 20:15:01.794133 tx_first_pass[0][0][2] = 0
4786 20:15:01.797221 tx_last_pass[0][0][2] = 0
4787 20:15:01.800340 tx_win_center[0][0][3] = 0
4788 20:15:01.800445 tx_first_pass[0][0][3] = 0
4789 20:15:01.803703 tx_last_pass[0][0][3] = 0
4790 20:15:01.807074 tx_win_center[0][0][4] = 0
4791 20:15:01.810720 tx_first_pass[0][0][4] = 0
4792 20:15:01.811183 tx_last_pass[0][0][4] = 0
4793 20:15:01.813815 tx_win_center[0][0][5] = 0
4794 20:15:01.817096 tx_first_pass[0][0][5] = 0
4795 20:15:01.817586 tx_last_pass[0][0][5] = 0
4796 20:15:01.820366 tx_win_center[0][0][6] = 0
4797 20:15:01.823908 tx_first_pass[0][0][6] = 0
4798 20:15:01.827210 tx_last_pass[0][0][6] = 0
4799 20:15:01.827708 tx_win_center[0][0][7] = 0
4800 20:15:01.830348 tx_first_pass[0][0][7] = 0
4801 20:15:01.833765 tx_last_pass[0][0][7] = 0
4802 20:15:01.836857 tx_win_center[0][0][8] = 0
4803 20:15:01.837275 tx_first_pass[0][0][8] = 0
4804 20:15:01.840328 tx_last_pass[0][0][8] = 0
4805 20:15:01.843489 tx_win_center[0][0][9] = 0
4806 20:15:01.847001 tx_first_pass[0][0][9] = 0
4807 20:15:01.847523 tx_last_pass[0][0][9] = 0
4808 20:15:01.850484 tx_win_center[0][0][10] = 0
4809 20:15:01.853076 tx_first_pass[0][0][10] = 0
4810 20:15:01.856472 tx_last_pass[0][0][10] = 0
4811 20:15:01.856985 tx_win_center[0][0][11] = 0
4812 20:15:01.859483 tx_first_pass[0][0][11] = 0
4813 20:15:01.863180 tx_last_pass[0][0][11] = 0
4814 20:15:01.866421 tx_win_center[0][0][12] = 0
4815 20:15:01.866932 tx_first_pass[0][0][12] = 0
4816 20:15:01.869859 tx_last_pass[0][0][12] = 0
4817 20:15:01.872629 tx_win_center[0][0][13] = 0
4818 20:15:01.875998 tx_first_pass[0][0][13] = 0
4819 20:15:01.876381 tx_last_pass[0][0][13] = 0
4820 20:15:01.879400 tx_win_center[0][0][14] = 0
4821 20:15:01.882754 tx_first_pass[0][0][14] = 0
4822 20:15:01.885894 tx_last_pass[0][0][14] = 0
4823 20:15:01.889360 tx_win_center[0][0][15] = 0
4824 20:15:01.889800 tx_first_pass[0][0][15] = 0
4825 20:15:01.892836 tx_last_pass[0][0][15] = 0
4826 20:15:01.895759 tx_win_center[0][1][0] = 0
4827 20:15:01.898977 tx_first_pass[0][1][0] = 0
4828 20:15:01.899475 tx_last_pass[0][1][0] = 0
4829 20:15:01.902257 tx_win_center[0][1][1] = 0
4830 20:15:01.905354 tx_first_pass[0][1][1] = 0
4831 20:15:01.905828 tx_last_pass[0][1][1] = 0
4832 20:15:01.908871 tx_win_center[0][1][2] = 0
4833 20:15:01.911852 tx_first_pass[0][1][2] = 0
4834 20:15:01.915615 tx_last_pass[0][1][2] = 0
4835 20:15:01.916053 tx_win_center[0][1][3] = 0
4836 20:15:01.918830 tx_first_pass[0][1][3] = 0
4837 20:15:01.922101 tx_last_pass[0][1][3] = 0
4838 20:15:01.925028 tx_win_center[0][1][4] = 0
4839 20:15:01.925523 tx_first_pass[0][1][4] = 0
4840 20:15:01.928377 tx_last_pass[0][1][4] = 0
4841 20:15:01.932500 tx_win_center[0][1][5] = 0
4842 20:15:01.934903 tx_first_pass[0][1][5] = 0
4843 20:15:01.935522 tx_last_pass[0][1][5] = 0
4844 20:15:01.938009 tx_win_center[0][1][6] = 0
4845 20:15:01.941146 tx_first_pass[0][1][6] = 0
4846 20:15:01.944555 tx_last_pass[0][1][6] = 0
4847 20:15:01.945074 tx_win_center[0][1][7] = 0
4848 20:15:01.948065 tx_first_pass[0][1][7] = 0
4849 20:15:01.951091 tx_last_pass[0][1][7] = 0
4850 20:15:01.951611 tx_win_center[0][1][8] = 0
4851 20:15:01.954506 tx_first_pass[0][1][8] = 0
4852 20:15:01.957766 tx_last_pass[0][1][8] = 0
4853 20:15:01.960964 tx_win_center[0][1][9] = 0
4854 20:15:01.961405 tx_first_pass[0][1][9] = 0
4855 20:15:01.964459 tx_last_pass[0][1][9] = 0
4856 20:15:01.967542 tx_win_center[0][1][10] = 0
4857 20:15:01.970675 tx_first_pass[0][1][10] = 0
4858 20:15:01.971094 tx_last_pass[0][1][10] = 0
4859 20:15:01.974859 tx_win_center[0][1][11] = 0
4860 20:15:01.977213 tx_first_pass[0][1][11] = 0
4861 20:15:01.981324 tx_last_pass[0][1][11] = 0
4862 20:15:01.983759 tx_win_center[0][1][12] = 0
4863 20:15:01.984358 tx_first_pass[0][1][12] = 0
4864 20:15:01.987122 tx_last_pass[0][1][12] = 0
4865 20:15:01.990365 tx_win_center[0][1][13] = 0
4866 20:15:01.993917 tx_first_pass[0][1][13] = 0
4867 20:15:01.994364 tx_last_pass[0][1][13] = 0
4868 20:15:01.997066 tx_win_center[0][1][14] = 0
4869 20:15:02.000199 tx_first_pass[0][1][14] = 0
4870 20:15:02.003633 tx_last_pass[0][1][14] = 0
4871 20:15:02.004015 tx_win_center[0][1][15] = 0
4872 20:15:02.007030 tx_first_pass[0][1][15] = 0
4873 20:15:02.010015 tx_last_pass[0][1][15] = 0
4874 20:15:02.013335 tx_win_center[1][0][0] = 0
4875 20:15:02.013874 tx_first_pass[1][0][0] = 0
4876 20:15:02.016426 tx_last_pass[1][0][0] = 0
4877 20:15:02.019661 tx_win_center[1][0][1] = 0
4878 20:15:02.023253 tx_first_pass[1][0][1] = 0
4879 20:15:02.023706 tx_last_pass[1][0][1] = 0
4880 20:15:02.026182 tx_win_center[1][0][2] = 0
4881 20:15:02.029577 tx_first_pass[1][0][2] = 0
4882 20:15:02.032975 tx_last_pass[1][0][2] = 0
4883 20:15:02.033355 tx_win_center[1][0][3] = 0
4884 20:15:02.036240 tx_first_pass[1][0][3] = 0
4885 20:15:02.039815 tx_last_pass[1][0][3] = 0
4886 20:15:02.042963 tx_win_center[1][0][4] = 0
4887 20:15:02.043378 tx_first_pass[1][0][4] = 0
4888 20:15:02.046479 tx_last_pass[1][0][4] = 0
4889 20:15:02.049593 tx_win_center[1][0][5] = 0
4890 20:15:02.050008 tx_first_pass[1][0][5] = 0
4891 20:15:02.052612 tx_last_pass[1][0][5] = 0
4892 20:15:02.055919 tx_win_center[1][0][6] = 0
4893 20:15:02.059708 tx_first_pass[1][0][6] = 0
4894 20:15:02.060242 tx_last_pass[1][0][6] = 0
4895 20:15:02.062606 tx_win_center[1][0][7] = 0
4896 20:15:02.065204 tx_first_pass[1][0][7] = 0
4897 20:15:02.068487 tx_last_pass[1][0][7] = 0
4898 20:15:02.068578 tx_win_center[1][0][8] = 0
4899 20:15:02.072408 tx_first_pass[1][0][8] = 0
4900 20:15:02.075712 tx_last_pass[1][0][8] = 0
4901 20:15:02.079393 tx_win_center[1][0][9] = 0
4902 20:15:02.079920 tx_first_pass[1][0][9] = 0
4903 20:15:02.082589 tx_last_pass[1][0][9] = 0
4904 20:15:02.085477 tx_win_center[1][0][10] = 0
4905 20:15:02.089037 tx_first_pass[1][0][10] = 0
4906 20:15:02.089609 tx_last_pass[1][0][10] = 0
4907 20:15:02.092063 tx_win_center[1][0][11] = 0
4908 20:15:02.095271 tx_first_pass[1][0][11] = 0
4909 20:15:02.098599 tx_last_pass[1][0][11] = 0
4910 20:15:02.099016 tx_win_center[1][0][12] = 0
4911 20:15:02.101422 tx_first_pass[1][0][12] = 0
4912 20:15:02.104673 tx_last_pass[1][0][12] = 0
4913 20:15:02.108168 tx_win_center[1][0][13] = 0
4914 20:15:02.108632 tx_first_pass[1][0][13] = 0
4915 20:15:02.111305 tx_last_pass[1][0][13] = 0
4916 20:15:02.114915 tx_win_center[1][0][14] = 0
4917 20:15:02.118277 tx_first_pass[1][0][14] = 0
4918 20:15:02.118696 tx_last_pass[1][0][14] = 0
4919 20:15:02.121573 tx_win_center[1][0][15] = 0
4920 20:15:02.124858 tx_first_pass[1][0][15] = 0
4921 20:15:02.128265 tx_last_pass[1][0][15] = 0
4922 20:15:02.131249 tx_win_center[1][1][0] = 0
4923 20:15:02.131666 tx_first_pass[1][1][0] = 0
4924 20:15:02.134810 tx_last_pass[1][1][0] = 0
4925 20:15:02.137922 tx_win_center[1][1][1] = 0
4926 20:15:02.138419 tx_first_pass[1][1][1] = 0
4927 20:15:02.140765 tx_last_pass[1][1][1] = 0
4928 20:15:02.144347 tx_win_center[1][1][2] = 0
4929 20:15:02.147428 tx_first_pass[1][1][2] = 0
4930 20:15:02.147842 tx_last_pass[1][1][2] = 0
4931 20:15:02.150965 tx_win_center[1][1][3] = 0
4932 20:15:02.154283 tx_first_pass[1][1][3] = 0
4933 20:15:02.157730 tx_last_pass[1][1][3] = 0
4934 20:15:02.158284 tx_win_center[1][1][4] = 0
4935 20:15:02.160500 tx_first_pass[1][1][4] = 0
4936 20:15:02.164366 tx_last_pass[1][1][4] = 0
4937 20:15:02.167775 tx_win_center[1][1][5] = 0
4938 20:15:02.168291 tx_first_pass[1][1][5] = 0
4939 20:15:02.171041 tx_last_pass[1][1][5] = 0
4940 20:15:02.174179 tx_win_center[1][1][6] = 0
4941 20:15:02.176982 tx_first_pass[1][1][6] = 0
4942 20:15:02.177400 tx_last_pass[1][1][6] = 0
4943 20:15:02.180094 tx_win_center[1][1][7] = 0
4944 20:15:02.182957 tx_first_pass[1][1][7] = 0
4945 20:15:02.183059 tx_last_pass[1][1][7] = 0
4946 20:15:02.186708 tx_win_center[1][1][8] = 0
4947 20:15:02.189749 tx_first_pass[1][1][8] = 0
4948 20:15:02.193020 tx_last_pass[1][1][8] = 0
4949 20:15:02.193104 tx_win_center[1][1][9] = 0
4950 20:15:02.196521 tx_first_pass[1][1][9] = 0
4951 20:15:02.199861 tx_last_pass[1][1][9] = 0
4952 20:15:02.203400 tx_win_center[1][1][10] = 0
4953 20:15:02.203580 tx_first_pass[1][1][10] = 0
4954 20:15:02.206787 tx_last_pass[1][1][10] = 0
4955 20:15:02.209271 tx_win_center[1][1][11] = 0
4956 20:15:02.213060 tx_first_pass[1][1][11] = 0
4957 20:15:02.213258 tx_last_pass[1][1][11] = 0
4958 20:15:02.216200 tx_win_center[1][1][12] = 0
4959 20:15:02.219448 tx_first_pass[1][1][12] = 0
4960 20:15:02.222649 tx_last_pass[1][1][12] = 0
4961 20:15:02.225752 tx_win_center[1][1][13] = 0
4962 20:15:02.225916 tx_first_pass[1][1][13] = 0
4963 20:15:02.229109 tx_last_pass[1][1][13] = 0
4964 20:15:02.232393 tx_win_center[1][1][14] = 0
4965 20:15:02.236026 tx_first_pass[1][1][14] = 0
4966 20:15:02.236337 tx_last_pass[1][1][14] = 0
4967 20:15:02.239149 tx_win_center[1][1][15] = 0
4968 20:15:02.242436 tx_first_pass[1][1][15] = 0
4969 20:15:02.245918 tx_last_pass[1][1][15] = 0
4970 20:15:02.246270 dump params rx window
4971 20:15:02.249373 rx_firspass[0][0][0] = 0
4972 20:15:02.252680 rx_lastpass[0][0][0] = 0
4973 20:15:02.253252 rx_firspass[0][0][1] = 0
4974 20:15:02.255827 rx_lastpass[0][0][1] = 0
4975 20:15:02.258654 rx_firspass[0][0][2] = 0
4976 20:15:02.259068 rx_lastpass[0][0][2] = 0
4977 20:15:02.261871 rx_firspass[0][0][3] = 0
4978 20:15:02.265076 rx_lastpass[0][0][3] = 0
4979 20:15:02.265539 rx_firspass[0][0][4] = 0
4980 20:15:02.268410 rx_lastpass[0][0][4] = 0
4981 20:15:02.271807 rx_firspass[0][0][5] = 0
4982 20:15:02.275301 rx_lastpass[0][0][5] = 0
4983 20:15:02.275764 rx_firspass[0][0][6] = 0
4984 20:15:02.278867 rx_lastpass[0][0][6] = 0
4985 20:15:02.282027 rx_firspass[0][0][7] = 0
4986 20:15:02.282447 rx_lastpass[0][0][7] = 0
4987 20:15:02.285061 rx_firspass[0][0][8] = 0
4988 20:15:02.288133 rx_lastpass[0][0][8] = 0
4989 20:15:02.288597 rx_firspass[0][0][9] = 0
4990 20:15:02.291612 rx_lastpass[0][0][9] = 0
4991 20:15:02.294705 rx_firspass[0][0][10] = 0
4992 20:15:02.298271 rx_lastpass[0][0][10] = 0
4993 20:15:02.298735 rx_firspass[0][0][11] = 0
4994 20:15:02.301879 rx_lastpass[0][0][11] = 0
4995 20:15:02.304571 rx_firspass[0][0][12] = 0
4996 20:15:02.308236 rx_lastpass[0][0][12] = 0
4997 20:15:02.308651 rx_firspass[0][0][13] = 0
4998 20:15:02.311478 rx_lastpass[0][0][13] = 0
4999 20:15:02.314542 rx_firspass[0][0][14] = 0
5000 20:15:02.314954 rx_lastpass[0][0][14] = 0
5001 20:15:02.317629 rx_firspass[0][0][15] = 0
5002 20:15:02.321182 rx_lastpass[0][0][15] = 0
5003 20:15:02.324689 rx_firspass[0][1][0] = 0
5004 20:15:02.325199 rx_lastpass[0][1][0] = 0
5005 20:15:02.327731 rx_firspass[0][1][1] = 0
5006 20:15:02.330849 rx_lastpass[0][1][1] = 0
5007 20:15:02.331323 rx_firspass[0][1][2] = 0
5008 20:15:02.334119 rx_lastpass[0][1][2] = 0
5009 20:15:02.337186 rx_firspass[0][1][3] = 0
5010 20:15:02.337277 rx_lastpass[0][1][3] = 0
5011 20:15:02.340160 rx_firspass[0][1][4] = 0
5012 20:15:02.343448 rx_lastpass[0][1][4] = 0
5013 20:15:02.347013 rx_firspass[0][1][5] = 0
5014 20:15:02.347115 rx_lastpass[0][1][5] = 0
5015 20:15:02.349914 rx_firspass[0][1][6] = 0
5016 20:15:02.353293 rx_lastpass[0][1][6] = 0
5017 20:15:02.353395 rx_firspass[0][1][7] = 0
5018 20:15:02.356778 rx_lastpass[0][1][7] = 0
5019 20:15:02.360155 rx_firspass[0][1][8] = 0
5020 20:15:02.360238 rx_lastpass[0][1][8] = 0
5021 20:15:02.363543 rx_firspass[0][1][9] = 0
5022 20:15:02.367020 rx_lastpass[0][1][9] = 0
5023 20:15:02.370061 rx_firspass[0][1][10] = 0
5024 20:15:02.370208 rx_lastpass[0][1][10] = 0
5025 20:15:02.373124 rx_firspass[0][1][11] = 0
5026 20:15:02.376371 rx_lastpass[0][1][11] = 0
5027 20:15:02.376528 rx_firspass[0][1][12] = 0
5028 20:15:02.379950 rx_lastpass[0][1][12] = 0
5029 20:15:02.383291 rx_firspass[0][1][13] = 0
5030 20:15:02.386098 rx_lastpass[0][1][13] = 0
5031 20:15:02.386188 rx_firspass[0][1][14] = 0
5032 20:15:02.389348 rx_lastpass[0][1][14] = 0
5033 20:15:02.392723 rx_firspass[0][1][15] = 0
5034 20:15:02.396266 rx_lastpass[0][1][15] = 0
5035 20:15:02.396357 rx_firspass[1][0][0] = 0
5036 20:15:02.399446 rx_lastpass[1][0][0] = 0
5037 20:15:02.402334 rx_firspass[1][0][1] = 0
5038 20:15:02.402433 rx_lastpass[1][0][1] = 0
5039 20:15:02.405783 rx_firspass[1][0][2] = 0
5040 20:15:02.409266 rx_lastpass[1][0][2] = 0
5041 20:15:02.409407 rx_firspass[1][0][3] = 0
5042 20:15:02.412244 rx_lastpass[1][0][3] = 0
5043 20:15:02.415390 rx_firspass[1][0][4] = 0
5044 20:15:02.415481 rx_lastpass[1][0][4] = 0
5045 20:15:02.418931 rx_firspass[1][0][5] = 0
5046 20:15:02.422059 rx_lastpass[1][0][5] = 0
5047 20:15:02.425323 rx_firspass[1][0][6] = 0
5048 20:15:02.425414 rx_lastpass[1][0][6] = 0
5049 20:15:02.428753 rx_firspass[1][0][7] = 0
5050 20:15:02.431750 rx_lastpass[1][0][7] = 0
5051 20:15:02.431838 rx_firspass[1][0][8] = 0
5052 20:15:02.435467 rx_lastpass[1][0][8] = 0
5053 20:15:02.438547 rx_firspass[1][0][9] = 0
5054 20:15:02.438661 rx_lastpass[1][0][9] = 0
5055 20:15:02.442030 rx_firspass[1][0][10] = 0
5056 20:15:02.445216 rx_lastpass[1][0][10] = 0
5057 20:15:02.448255 rx_firspass[1][0][11] = 0
5058 20:15:02.448398 rx_lastpass[1][0][11] = 0
5059 20:15:02.451909 rx_firspass[1][0][12] = 0
5060 20:15:02.454726 rx_lastpass[1][0][12] = 0
5061 20:15:02.458055 rx_firspass[1][0][13] = 0
5062 20:15:02.458218 rx_lastpass[1][0][13] = 0
5063 20:15:02.461564 rx_firspass[1][0][14] = 0
5064 20:15:02.465268 rx_lastpass[1][0][14] = 0
5065 20:15:02.465734 rx_firspass[1][0][15] = 0
5066 20:15:02.468161 rx_lastpass[1][0][15] = 0
5067 20:15:02.471298 rx_firspass[1][1][0] = 0
5068 20:15:02.474950 rx_lastpass[1][1][0] = 0
5069 20:15:02.475365 rx_firspass[1][1][1] = 0
5070 20:15:02.477880 rx_lastpass[1][1][1] = 0
5071 20:15:02.481357 rx_firspass[1][1][2] = 0
5072 20:15:02.482039 rx_lastpass[1][1][2] = 0
5073 20:15:02.484811 rx_firspass[1][1][3] = 0
5074 20:15:02.488231 rx_lastpass[1][1][3] = 0
5075 20:15:02.488646 rx_firspass[1][1][4] = 0
5076 20:15:02.491435 rx_lastpass[1][1][4] = 0
5077 20:15:02.494403 rx_firspass[1][1][5] = 0
5078 20:15:02.497864 rx_lastpass[1][1][5] = 0
5079 20:15:02.498281 rx_firspass[1][1][6] = 0
5080 20:15:02.501195 rx_lastpass[1][1][6] = 0
5081 20:15:02.504048 rx_firspass[1][1][7] = 0
5082 20:15:02.504466 rx_lastpass[1][1][7] = 0
5083 20:15:02.507534 rx_firspass[1][1][8] = 0
5084 20:15:02.511015 rx_lastpass[1][1][8] = 0
5085 20:15:02.511640 rx_firspass[1][1][9] = 0
5086 20:15:02.514137 rx_lastpass[1][1][9] = 0
5087 20:15:02.517043 rx_firspass[1][1][10] = 0
5088 20:15:02.520244 rx_lastpass[1][1][10] = 0
5089 20:15:02.520661 rx_firspass[1][1][11] = 0
5090 20:15:02.523750 rx_lastpass[1][1][11] = 0
5091 20:15:02.527034 rx_firspass[1][1][12] = 0
5092 20:15:02.530413 rx_lastpass[1][1][12] = 0
5093 20:15:02.530852 rx_firspass[1][1][13] = 0
5094 20:15:02.533543 rx_lastpass[1][1][13] = 0
5095 20:15:02.536589 rx_firspass[1][1][14] = 0
5096 20:15:02.537003 rx_lastpass[1][1][14] = 0
5097 20:15:02.540193 rx_firspass[1][1][15] = 0
5098 20:15:02.543290 rx_lastpass[1][1][15] = 0
5099 20:15:02.543706 dump params clk_delay
5100 20:15:02.546852 clk_delay[0] = 0
5101 20:15:02.547267 clk_delay[1] = 0
5102 20:15:02.549874 dump params dqs_delay
5103 20:15:02.553009 dqs_delay[0][0] = 0
5104 20:15:02.553423 dqs_delay[0][1] = 0
5105 20:15:02.556337 dqs_delay[1][0] = 0
5106 20:15:02.556780 dqs_delay[1][1] = 0
5107 20:15:02.559708 dump params delay_cell_unit = 744
5108 20:15:02.563056 mt_set_emi_preloader end
5109 20:15:02.566457 [mt_mem_init] dram size: 0x100000000, rank number: 2
5110 20:15:02.572727 [complex_mem_test] start addr:0x40000000, len:20480
5111 20:15:02.608509 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5112 20:15:02.614535 [complex_mem_test] start addr:0x80000000, len:20480
5113 20:15:02.650870 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5114 20:15:02.657212 [complex_mem_test] start addr:0xc0000000, len:20480
5115 20:15:02.693126 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5116 20:15:02.699753 [complex_mem_test] start addr:0x56000000, len:8192
5117 20:15:02.716670 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5118 20:15:02.719846 ddr_geometry:1
5119 20:15:02.723212 [complex_mem_test] start addr:0x80000000, len:8192
5120 20:15:02.739662 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5121 20:15:02.743050 dram_init: dram init end (result: 0)
5122 20:15:02.749921 Successfully loaded DRAM blobs and ran DRAM calibration
5123 20:15:02.760468 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5124 20:15:02.760990 CBMEM:
5125 20:15:02.763421 IMD: root @ 00000000fffff000 254 entries.
5126 20:15:02.766384 IMD: root @ 00000000ffffec00 62 entries.
5127 20:15:02.773064 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5128 20:15:02.779451 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5129 20:15:02.782834 in-header: 03 a1 00 00 08 00 00 00
5130 20:15:02.785901 in-data: 84 60 60 10 00 00 00 00
5131 20:15:02.792582 Chrome EC: clear events_b mask to 0x0000000020004000
5132 20:15:02.799803 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5133 20:15:02.800365 in-header: 03 fd 00 00 00 00 00 00
5134 20:15:02.802936 in-data:
5135 20:15:02.805869 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5136 20:15:02.809291 CBFS @ 21000 size 3d4000
5137 20:15:02.812487 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5138 20:15:02.815457 CBFS: Locating 'fallback/ramstage'
5139 20:15:02.818759 CBFS: Found @ offset 10d40 size d563
5140 20:15:02.842464 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5141 20:15:02.853943 Accumulated console time in romstage 13501 ms
5142 20:15:02.854451
5143 20:15:02.854728
5144 20:15:02.864330 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5145 20:15:02.867442 ARM64: Exception handlers installed.
5146 20:15:02.867635 ARM64: Testing exception
5147 20:15:02.870303 ARM64: Done test exception
5148 20:15:02.873725 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5149 20:15:02.876857 Manufacturer: ef
5150 20:15:02.883549 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5151 20:15:02.886814 WARNING: RO_VPD is uninitialized or empty.
5152 20:15:02.889662 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5153 20:15:02.893336 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5154 20:15:02.903610 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5155 20:15:02.906689 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5156 20:15:02.913707 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5157 20:15:02.914124 Enumerating buses...
5158 20:15:02.920655 Show all devs... Before device enumeration.
5159 20:15:02.921166 Root Device: enabled 1
5160 20:15:02.923726 CPU_CLUSTER: 0: enabled 1
5161 20:15:02.926642 CPU: 00: enabled 1
5162 20:15:02.927057 Compare with tree...
5163 20:15:02.929900 Root Device: enabled 1
5164 20:15:02.930318 CPU_CLUSTER: 0: enabled 1
5165 20:15:02.933622 CPU: 00: enabled 1
5166 20:15:02.936252 Root Device scanning...
5167 20:15:02.939642 root_dev_scan_bus for Root Device
5168 20:15:02.940110 CPU_CLUSTER: 0 enabled
5169 20:15:02.943089 root_dev_scan_bus for Root Device done
5170 20:15:02.949715 scan_bus: scanning of bus Root Device took 10690 usecs
5171 20:15:02.950178 done
5172 20:15:02.953216 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5173 20:15:02.956870 Allocating resources...
5174 20:15:02.959603 Reading resources...
5175 20:15:02.963052 Root Device read_resources bus 0 link: 0
5176 20:15:02.966327 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5177 20:15:02.969399 CPU: 00 missing read_resources
5178 20:15:02.972342 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5179 20:15:02.975645 Root Device read_resources bus 0 link: 0 done
5180 20:15:02.978602 Done reading resources.
5181 20:15:02.982356 Show resources in subtree (Root Device)...After reading.
5182 20:15:02.989018 Root Device child on link 0 CPU_CLUSTER: 0
5183 20:15:02.992716 CPU_CLUSTER: 0 child on link 0 CPU: 00
5184 20:15:02.998574 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5185 20:15:03.001778 CPU: 00
5186 20:15:03.001971 Setting resources...
5187 20:15:03.008492 Root Device assign_resources, bus 0 link: 0
5188 20:15:03.011720 CPU_CLUSTER: 0 missing set_resources
5189 20:15:03.014868 Root Device assign_resources, bus 0 link: 0
5190 20:15:03.015033 Done setting resources.
5191 20:15:03.021594 Show resources in subtree (Root Device)...After assigning values.
5192 20:15:03.025301 Root Device child on link 0 CPU_CLUSTER: 0
5193 20:15:03.028197 CPU_CLUSTER: 0 child on link 0 CPU: 00
5194 20:15:03.038100 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5195 20:15:03.038610 CPU: 00
5196 20:15:03.041500 Done allocating resources.
5197 20:15:03.047995 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5198 20:15:03.048504 Enabling resources...
5199 20:15:03.048838 done.
5200 20:15:03.054229 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5201 20:15:03.054647 Initializing devices...
5202 20:15:03.057722 Root Device init ...
5203 20:15:03.060971 mainboard_init: Starting display init.
5204 20:15:03.064657 ADC[4]: Raw value=75836 ID=0
5205 20:15:03.086664 anx7625_power_on_init: Init interface.
5206 20:15:03.090195 anx7625_disable_pd_protocol: Disabled PD feature.
5207 20:15:03.095769 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5208 20:15:03.154073 anx7625_start_dp_work: Secure OCM version=00
5209 20:15:03.156817 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5210 20:15:03.176949 sp_tx_get_edid_block: EDID Block = 1
5211 20:15:03.290807 Extracted contents:
5212 20:15:03.294251 header: 00 ff ff ff ff ff ff 00
5213 20:15:03.297391 serial number: 06 af 5c 14 00 00 00 00 00 1a
5214 20:15:03.300362 version: 01 04
5215 20:15:03.303844 basic params: 95 1a 0e 78 02
5216 20:15:03.307123 chroma info: 99 85 95 55 56 92 28 22 50 54
5217 20:15:03.310517 established: 00 00 00
5218 20:15:03.316720 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5219 20:15:03.323437 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5220 20:15:03.326714 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5221 20:15:03.333281 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5222 20:15:03.339821 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5223 20:15:03.342996 extensions: 00
5224 20:15:03.343080 checksum: ae
5225 20:15:03.343159
5226 20:15:03.349620 Manufacturer: AUO Model 145c Serial Number 0
5227 20:15:03.349707 Made week 0 of 2016
5228 20:15:03.353142 EDID version: 1.4
5229 20:15:03.353222 Digital display
5230 20:15:03.356473 6 bits per primary color channel
5231 20:15:03.359313 DisplayPort interface
5232 20:15:03.362891 Maximum image size: 26 cm x 14 cm
5233 20:15:03.362973 Gamma: 220%
5234 20:15:03.363053 Check DPMS levels
5235 20:15:03.366097 Supported color formats: RGB 4:4:4
5236 20:15:03.372499 First detailed timing is preferred timing
5237 20:15:03.372583 Established timings supported:
5238 20:15:03.375666 Standard timings supported:
5239 20:15:03.379108 Detailed timings
5240 20:15:03.382187 Hex of detail: ce1d56ea50001a3030204600009010000018
5241 20:15:03.385638 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5242 20:15:03.392556 0556 0586 05a6 0640 hborder 0
5243 20:15:03.396002 0300 0304 030a 031a vborder 0
5244 20:15:03.399403 -hsync -vsync
5245 20:15:03.399817 Did detailed timing
5246 20:15:03.405503 Hex of detail: 0000000f0000000000000000000000000020
5247 20:15:03.409169 Manufacturer-specified data, tag 15
5248 20:15:03.412788 Hex of detail: 000000fe0041554f0a202020202020202020
5249 20:15:03.415892 ASCII string: AUO
5250 20:15:03.419196 Hex of detail: 000000fe004231313658414230312e34200a
5251 20:15:03.422060 ASCII string: B116XAB01.4
5252 20:15:03.422525 Checksum
5253 20:15:03.425199 Checksum: 0xae (valid)
5254 20:15:03.428709 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5255 20:15:03.432048 DSI data_rate: 457800000 bps
5256 20:15:03.438934 anx7625_parse_edid: set default k value to 0x3d for panel
5257 20:15:03.442051 anx7625_parse_edid: pixelclock(76300).
5258 20:15:03.444912 hactive(1366), hsync(32), hfp(48), hbp(154)
5259 20:15:03.448510 vactive(768), vsync(6), vfp(4), vbp(16)
5260 20:15:03.451822 anx7625_dsi_config: config dsi.
5261 20:15:03.459375 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5262 20:15:03.480686 anx7625_dsi_config: success to config DSI
5263 20:15:03.484054 anx7625_dp_start: MIPI phy setup OK.
5264 20:15:03.486855 [SSUSB] Setting up USB HOST controller...
5265 20:15:03.490235 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5266 20:15:03.493426 [SSUSB] phy power-on done.
5267 20:15:03.497110 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5268 20:15:03.500709 in-header: 03 fc 01 00 00 00 00 00
5269 20:15:03.501148 in-data:
5270 20:15:03.507118 handle_proto3_response: EC response with error code: 1
5271 20:15:03.507591 SPM: pcm index = 1
5272 20:15:03.513359 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5273 20:15:03.513851 CBFS @ 21000 size 3d4000
5274 20:15:03.520184 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5275 20:15:03.523127 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5276 20:15:03.526504 CBFS: Found @ offset 1e7c0 size 1026
5277 20:15:03.532873 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5278 20:15:03.536209 SPM: binary array size = 2988
5279 20:15:03.540076 SPM: version = pcm_allinone_v1.17.2_20180829
5280 20:15:03.543055 SPM binary loaded in 32 msecs
5281 20:15:03.551559 spm_kick_im_to_fetch: ptr = 000000004021eec2
5282 20:15:03.555037 spm_kick_im_to_fetch: len = 2988
5283 20:15:03.555456 SPM: spm_kick_pcm_to_run
5284 20:15:03.558415 SPM: spm_kick_pcm_to_run done
5285 20:15:03.561295 SPM: spm_init done in 52 msecs
5286 20:15:03.564768 Root Device init finished in 505259 usecs
5287 20:15:03.567560 CPU_CLUSTER: 0 init ...
5288 20:15:03.577795 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5289 20:15:03.581404 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5290 20:15:03.584319 CBFS @ 21000 size 3d4000
5291 20:15:03.587299 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5292 20:15:03.590530 CBFS: Locating 'sspm.bin'
5293 20:15:03.594041 CBFS: Found @ offset 208c0 size 41cb
5294 20:15:03.604896 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5295 20:15:03.612674 CPU_CLUSTER: 0 init finished in 42800 usecs
5296 20:15:03.613191 Devices initialized
5297 20:15:03.616179 Show all devs... After init.
5298 20:15:03.619183 Root Device: enabled 1
5299 20:15:03.619594 CPU_CLUSTER: 0: enabled 1
5300 20:15:03.622490 CPU: 00: enabled 1
5301 20:15:03.625741 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5302 20:15:03.632804 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5303 20:15:03.635739 ELOG: NV offset 0x558000 size 0x1000
5304 20:15:03.638862 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5305 20:15:03.645325 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5306 20:15:03.651899 ELOG: Event(17) added with size 13 at 2024-05-28 20:15:03 UTC
5307 20:15:03.655221 out: cmd=0x121: 03 db 21 01 00 00 00 00
5308 20:15:03.658438 in-header: 03 c4 00 00 2c 00 00 00
5309 20:15:03.671579 in-data: cf 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 00 dd 08 00 06 80 00 00 b5 e1 09 00 06 80 00 00 ca 11 03 00 06 80 00 00 6e f7 03 00
5310 20:15:03.674779 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5311 20:15:03.677798 in-header: 03 19 00 00 08 00 00 00
5312 20:15:03.680991 in-data: a2 e0 47 00 13 00 00 00
5313 20:15:03.684421 Chrome EC: UHEPI supported
5314 20:15:03.691197 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5315 20:15:03.694439 in-header: 03 e1 00 00 08 00 00 00
5316 20:15:03.697511 in-data: 84 20 60 10 00 00 00 00
5317 20:15:03.700723 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5318 20:15:03.707370 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5319 20:15:03.710489 in-header: 03 e1 00 00 08 00 00 00
5320 20:15:03.714110 in-data: 84 20 60 10 00 00 00 00
5321 20:15:03.720445 ELOG: Event(A1) added with size 10 at 2024-05-28 20:15:03 UTC
5322 20:15:03.727029 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5323 20:15:03.730353 ELOG: Event(A0) added with size 9 at 2024-05-28 20:15:03 UTC
5324 20:15:03.736709 elog_add_boot_reason: Logged dev mode boot
5325 20:15:03.737222 Finalize devices...
5326 20:15:03.739865 Devices finalized
5327 20:15:03.743354 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5328 20:15:03.749713 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5329 20:15:03.753278 ELOG: Event(91) added with size 10 at 2024-05-28 20:15:03 UTC
5330 20:15:03.756400 Writing coreboot table at 0xffeda000
5331 20:15:03.762655 0. 0000000000114000-000000000011efff: RAMSTAGE
5332 20:15:03.765392 1. 0000000040000000-000000004023cfff: RAMSTAGE
5333 20:15:03.768932 2. 000000004023d000-00000000545fffff: RAM
5334 20:15:03.772209 3. 0000000054600000-000000005465ffff: BL31
5335 20:15:03.775524 4. 0000000054660000-00000000ffed9fff: RAM
5336 20:15:03.781901 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5337 20:15:03.785563 6. 0000000100000000-000000013fffffff: RAM
5338 20:15:03.788426 Passing 5 GPIOs to payload:
5339 20:15:03.791779 NAME | PORT | POLARITY | VALUE
5340 20:15:03.798462 write protect | 0x00000096 | low | high
5341 20:15:03.801850 EC in RW | 0x000000b1 | high | undefined
5342 20:15:03.808223 EC interrupt | 0x00000097 | low | undefined
5343 20:15:03.812112 TPM interrupt | 0x00000099 | high | undefined
5344 20:15:03.814935 speaker enable | 0x000000af | high | undefined
5345 20:15:03.818161 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5346 20:15:03.821800 in-header: 03 f7 00 00 02 00 00 00
5347 20:15:03.824953 in-data: 04 00
5348 20:15:03.825410 Board ID: 4
5349 20:15:03.828091 ADC[3]: Raw value=215404 ID=1
5350 20:15:03.828544 RAM code: 1
5351 20:15:03.831836 SKU ID: 16
5352 20:15:03.834658 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5353 20:15:03.837786 CBFS @ 21000 size 3d4000
5354 20:15:03.841086 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5355 20:15:03.847881 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 9c34
5356 20:15:03.851304 coreboot table: 940 bytes.
5357 20:15:03.853630 IMD ROOT 0. 00000000fffff000 00001000
5358 20:15:03.857302 IMD SMALL 1. 00000000ffffe000 00001000
5359 20:15:03.860584 CONSOLE 2. 00000000fffde000 00020000
5360 20:15:03.863810 FMAP 3. 00000000fffdd000 0000047c
5361 20:15:03.870385 TIME STAMP 4. 00000000fffdc000 00000910
5362 20:15:03.873738 RAMOOPS 5. 00000000ffedc000 00100000
5363 20:15:03.877151 COREBOOT 6. 00000000ffeda000 00002000
5364 20:15:03.877353 IMD small region:
5365 20:15:03.880225 IMD ROOT 0. 00000000ffffec00 00000400
5366 20:15:03.887051 VBOOT WORK 1. 00000000ffffeb00 00000100
5367 20:15:03.890402 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5368 20:15:03.893372 VPD 3. 00000000ffffea60 0000006c
5369 20:15:03.897172 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5370 20:15:03.903428 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5371 20:15:03.906811 in-header: 03 e1 00 00 08 00 00 00
5372 20:15:03.909918 in-data: 84 20 60 10 00 00 00 00
5373 20:15:03.916890 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5374 20:15:03.917420 CBFS @ 21000 size 3d4000
5375 20:15:03.923320 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5376 20:15:03.926394 CBFS: Locating 'fallback/payload'
5377 20:15:03.934367 CBFS: Found @ offset dc040 size 439a0
5378 20:15:04.022185 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5379 20:15:04.025770 Checking segment from ROM address 0x0000000040003a00
5380 20:15:04.032387 Checking segment from ROM address 0x0000000040003a1c
5381 20:15:04.035601 Loading segment from ROM address 0x0000000040003a00
5382 20:15:04.038985 code (compression=0)
5383 20:15:04.048364 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5384 20:15:04.055195 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5385 20:15:04.058276 it's not compressed!
5386 20:15:04.062279 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5387 20:15:04.067649 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5388 20:15:04.076959 Loading segment from ROM address 0x0000000040003a1c
5389 20:15:04.079507 Entry Point 0x0000000080000000
5390 20:15:04.079931 Loaded segments
5391 20:15:04.086049 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5392 20:15:04.089110 Jumping to boot code at 0000000080000000(00000000ffeda000)
5393 20:15:04.099254 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5394 20:15:04.105867 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5395 20:15:04.105968 CBFS @ 21000 size 3d4000
5396 20:15:04.112254 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5397 20:15:04.115257 CBFS: Locating 'fallback/bl31'
5398 20:15:04.118715 CBFS: Found @ offset 36dc0 size 5820
5399 20:15:04.130521 read SPI 0x57de8 0x5820: 6881 us, 3278 KB/s, 26.224 Mbps
5400 20:15:04.133360 Checking segment from ROM address 0x0000000040003a00
5401 20:15:04.140458 Checking segment from ROM address 0x0000000040003a1c
5402 20:15:04.143594 Loading segment from ROM address 0x0000000040003a00
5403 20:15:04.147113 code (compression=1)
5404 20:15:04.156897 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5405 20:15:04.163205 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5406 20:15:04.163636 using LZMA
5407 20:15:04.171917 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5408 20:15:04.178528 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5409 20:15:04.181717 Loading segment from ROM address 0x0000000040003a1c
5410 20:15:04.185317 Entry Point 0x0000000054601000
5411 20:15:04.185788 Loaded segments
5412 20:15:04.188959 NOTICE: MT8183 bl31_setup
5413 20:15:04.196091 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5414 20:15:04.199185 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5415 20:15:04.202376 INFO: [DEVAPC] dump DEVAPC registers:
5416 20:15:04.212749 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5417 20:15:04.219323 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5418 20:15:04.228952 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5419 20:15:04.235191 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5420 20:15:04.245257 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5421 20:15:04.251457 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5422 20:15:04.261386 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5423 20:15:04.268530 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5424 20:15:04.277724 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5425 20:15:04.284558 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5426 20:15:04.294104 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5427 20:15:04.300372 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5428 20:15:04.310695 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5429 20:15:04.316868 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5430 20:15:04.323532 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5431 20:15:04.333262 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5432 20:15:04.340185 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5433 20:15:04.346549 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5434 20:15:04.353117 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5435 20:15:04.363344 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5436 20:15:04.369691 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5437 20:15:04.376157 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5438 20:15:04.379086 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5439 20:15:04.382706 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5440 20:15:04.385745 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5441 20:15:04.389423 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5442 20:15:04.392295 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5443 20:15:04.399358 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5444 20:15:04.404935 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5445 20:15:04.405363 WARNING: region 0:
5446 20:15:04.408369 WARNING: apc:0x168, sa:0x0, ea:0xfff
5447 20:15:04.411669 WARNING: region 1:
5448 20:15:04.415143 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5449 20:15:04.415568 WARNING: region 2:
5450 20:15:04.418855 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5451 20:15:04.421573 WARNING: region 3:
5452 20:15:04.425051 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5453 20:15:04.428456 WARNING: region 4:
5454 20:15:04.431342 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5455 20:15:04.431765 WARNING: region 5:
5456 20:15:04.434766 WARNING: apc:0x0, sa:0x0, ea:0x0
5457 20:15:04.438230 WARNING: region 6:
5458 20:15:04.441735 WARNING: apc:0x0, sa:0x0, ea:0x0
5459 20:15:04.442160 WARNING: region 7:
5460 20:15:04.445011 WARNING: apc:0x0, sa:0x0, ea:0x0
5461 20:15:04.451522 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5462 20:15:04.454576 INFO: SPM: enable SPMC mode
5463 20:15:04.457591 NOTICE: spm_boot_init() start
5464 20:15:04.461383 NOTICE: spm_boot_init() end
5465 20:15:04.464644 INFO: BL31: Initializing runtime services
5466 20:15:04.471432 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5467 20:15:04.473932 INFO: BL31: Preparing for EL3 exit to normal world
5468 20:15:04.477489 INFO: Entry point address = 0x80000000
5469 20:15:04.480709 INFO: SPSR = 0x8
5470 20:15:04.502578
5471 20:15:04.502998
5472 20:15:04.503334
5473 20:15:04.504917 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5474 20:15:04.505504 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5475 20:15:04.505935 Setting prompt string to ['jacuzzi:']
5476 20:15:04.506344 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5477 20:15:04.507008 Starting depthcharge on Juniper...
5478 20:15:04.507365
5479 20:15:04.508979 vboot_handoff: creating legacy vboot_handoff structure
5480 20:15:04.509408
5481 20:15:04.512331 ec_init(0): CrosEC protocol v3 supported (544, 544)
5482 20:15:04.515378
5483 20:15:04.515800 Wipe memory regions:
5484 20:15:04.516138
5485 20:15:04.518933 [0x00000040000000, 0x00000054600000)
5486 20:15:04.561990
5487 20:15:04.565552 [0x00000054660000, 0x00000080000000)
5488 20:15:04.653420
5489 20:15:04.653594 [0x000000811994a0, 0x000000ffeda000)
5490 20:15:04.913587
5491 20:15:04.914104 [0x00000100000000, 0x00000140000000)
5492 20:15:05.046668
5493 20:15:05.049645 Initializing XHCI USB controller at 0x11200000.
5494 20:15:05.072529
5495 20:15:05.076265 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5496 20:15:05.076972
5497 20:15:05.077513
5498 20:15:05.078454 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5500 20:15:05.179916 jacuzzi: tftpboot 192.168.201.1 14063112/tftp-deploy-qk70arxa/kernel/image.itb 14063112/tftp-deploy-qk70arxa/kernel/cmdline
5501 20:15:05.180616 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5502 20:15:05.181088 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5503 20:15:05.185287 tftpboot 192.168.201.1 14063112/tftp-deploy-qk70arxa/kernel/image.itp-deploy-qk70arxa/kernel/cmdline
5504 20:15:05.185765
5505 20:15:05.186107 Waiting for link
5506 20:15:05.586084
5507 20:15:05.586250 R8152: Initializing
5508 20:15:05.586334
5509 20:15:05.589115 Version 9 (ocp_data = 6010)
5510 20:15:05.589239
5511 20:15:05.593019 R8152: Done initializing
5512 20:15:05.593117
5513 20:15:05.593193 Adding net device
5514 20:15:05.978199
5515 20:15:05.978361 done.
5516 20:15:05.978441
5517 20:15:05.978511 MAC: 00:e0:4c:78:85:cb
5518 20:15:05.978579
5519 20:15:05.981526 Sending DHCP discover... done.
5520 20:15:05.981616
5521 20:15:05.984905 Waiting for reply... done.
5522 20:15:05.984999
5523 20:15:05.988105 Sending DHCP request... done.
5524 20:15:05.988231
5525 20:15:05.992993 Waiting for reply... done.
5526 20:15:05.993108
5527 20:15:05.993214 My ip is 192.168.201.22
5528 20:15:05.993315
5529 20:15:05.996366 The DHCP server ip is 192.168.201.1
5530 20:15:05.996480
5531 20:15:06.003391 TFTP server IP predefined by user: 192.168.201.1
5532 20:15:06.003512
5533 20:15:06.009240 Bootfile predefined by user: 14063112/tftp-deploy-qk70arxa/kernel/image.itb
5534 20:15:06.009356
5535 20:15:06.012421 Sending tftp read request... done.
5536 20:15:06.012535
5537 20:15:06.016140 Waiting for the transfer...
5538 20:15:06.016260
5539 20:15:06.271411 00000000 ################################################################
5540 20:15:06.271602
5541 20:15:06.518273 00080000 ################################################################
5542 20:15:06.518432
5543 20:15:06.764585 00100000 ################################################################
5544 20:15:06.764769
5545 20:15:07.011385 00180000 ################################################################
5546 20:15:07.011581
5547 20:15:07.261734 00200000 ################################################################
5548 20:15:07.261922
5549 20:15:07.509655 00280000 ################################################################
5550 20:15:07.509818
5551 20:15:07.756060 00300000 ################################################################
5552 20:15:07.756251
5553 20:15:08.002084 00380000 ################################################################
5554 20:15:08.002261
5555 20:15:08.249051 00400000 ################################################################
5556 20:15:08.249253
5557 20:15:08.494936 00480000 ################################################################
5558 20:15:08.495127
5559 20:15:08.741312 00500000 ################################################################
5560 20:15:08.741508
5561 20:15:08.993298 00580000 ################################################################
5562 20:15:08.993498
5563 20:15:09.243337 00600000 ################################################################
5564 20:15:09.243529
5565 20:15:09.495905 00680000 ################################################################
5566 20:15:09.496096
5567 20:15:09.753659 00700000 ################################################################
5568 20:15:09.753849
5569 20:15:09.999585 00780000 ################################################################
5570 20:15:09.999742
5571 20:15:10.246307 00800000 ################################################################
5572 20:15:10.246468
5573 20:15:10.493766 00880000 ################################################################
5574 20:15:10.493928
5575 20:15:10.742816 00900000 ################################################################
5576 20:15:10.742978
5577 20:15:10.990330 00980000 ################################################################
5578 20:15:10.990493
5579 20:15:11.240162 00a00000 ################################################################
5580 20:15:11.240323
5581 20:15:11.488874 00a80000 ################################################################
5582 20:15:11.489036
5583 20:15:11.737480 00b00000 ################################################################
5584 20:15:11.737642
5585 20:15:11.991051 00b80000 ################################################################
5586 20:15:11.991213
5587 20:15:12.241737 00c00000 ################################################################
5588 20:15:12.241900
5589 20:15:12.491954 00c80000 ################################################################
5590 20:15:12.492116
5591 20:15:12.741881 00d00000 ################################################################
5592 20:15:12.742043
5593 20:15:13.004975 00d80000 ################################################################
5594 20:15:13.005123
5595 20:15:13.261932 00e00000 ################################################################
5596 20:15:13.262091
5597 20:15:13.516458 00e80000 ################################################################
5598 20:15:13.516644
5599 20:15:13.776017 00f00000 ################################################################
5600 20:15:13.776180
5601 20:15:14.034032 00f80000 ################################################################
5602 20:15:14.034223
5603 20:15:14.299381 01000000 ################################################################
5604 20:15:14.299547
5605 20:15:14.579301 01080000 ################################################################
5606 20:15:14.579494
5607 20:15:14.855226 01100000 ################################################################
5608 20:15:14.855387
5609 20:15:15.109542 01180000 ################################################################
5610 20:15:15.109726
5611 20:15:15.363668 01200000 ################################################################
5612 20:15:15.363827
5613 20:15:15.619489 01280000 ################################################################
5614 20:15:15.619643
5615 20:15:15.880014 01300000 ################################################################
5616 20:15:15.880173
5617 20:15:16.137602 01380000 ################################################################
5618 20:15:16.137763
5619 20:15:16.397679 01400000 ################################################################
5620 20:15:16.397832
5621 20:15:16.652423 01480000 ################################################################
5622 20:15:16.652581
5623 20:15:16.920334 01500000 ################################################################
5624 20:15:16.920497
5625 20:15:17.180914 01580000 ################################################################
5626 20:15:17.181108
5627 20:15:17.444669 01600000 ################################################################
5628 20:15:17.444824
5629 20:15:17.707886 01680000 ################################################################
5630 20:15:17.708071
5631 20:15:17.978651 01700000 ################################################################
5632 20:15:17.978807
5633 20:15:18.233255 01780000 ################################################################
5634 20:15:18.233464
5635 20:15:18.488226 01800000 ################################################################
5636 20:15:18.488389
5637 20:15:18.756054 01880000 ################################################################
5638 20:15:18.756219
5639 20:15:19.011071 01900000 ################################################################
5640 20:15:19.011267
5641 20:15:19.266911 01980000 ################################################################
5642 20:15:19.267075
5643 20:15:19.530048 01a00000 ################################################################
5644 20:15:19.530201
5645 20:15:19.807759 01a80000 ################################################################
5646 20:15:19.807944
5647 20:15:20.099004 01b00000 ################################################################
5648 20:15:20.099168
5649 20:15:20.383768 01b80000 ################################################################
5650 20:15:20.383931
5651 20:15:20.649207 01c00000 ################################################################
5652 20:15:20.649409
5653 20:15:20.964819 01c80000 ################################################################
5654 20:15:20.965010
5655 20:15:21.236842 01d00000 ################################################################
5656 20:15:21.237000
5657 20:15:21.509667 01d80000 ################################################################
5658 20:15:21.509826
5659 20:15:21.790355 01e00000 ################################################################
5660 20:15:21.790547
5661 20:15:22.055254 01e80000 ################################################################
5662 20:15:22.055416
5663 20:15:22.312891 01f00000 ################################################################
5664 20:15:22.313051
5665 20:15:22.570956 01f80000 ################################################################
5666 20:15:22.571112
5667 20:15:22.835452 02000000 ################################################################
5668 20:15:22.835617
5669 20:15:23.098452 02080000 ################################################################
5670 20:15:23.098645
5671 20:15:23.358516 02100000 ################################################################
5672 20:15:23.358675
5673 20:15:23.630690 02180000 ################################################################
5674 20:15:23.630849
5675 20:15:23.922280 02200000 ################################################################
5676 20:15:23.922451
5677 20:15:24.196765 02280000 ################################################################
5678 20:15:24.196924
5679 20:15:24.475397 02300000 ################################################################
5680 20:15:24.475562
5681 20:15:24.734353 02380000 ################################################################
5682 20:15:24.734510
5683 20:15:24.988239 02400000 ################################################################
5684 20:15:24.988429
5685 20:15:25.243863 02480000 ################################################################
5686 20:15:25.244018
5687 20:15:25.501982 02500000 ################################################################
5688 20:15:25.502133
5689 20:15:25.765219 02580000 ################################################################
5690 20:15:25.765368
5691 20:15:26.029898 02600000 ################################################################
5692 20:15:26.030052
5693 20:15:26.298490 02680000 ################################################################
5694 20:15:26.298647
5695 20:15:26.568098 02700000 ################################################################
5696 20:15:26.568258
5697 20:15:26.842846 02780000 ################################################################
5698 20:15:26.843009
5699 20:15:27.103250 02800000 ################################################################
5700 20:15:27.103411
5701 20:15:27.359080 02880000 ################################################################
5702 20:15:27.359238
5703 20:15:27.617606 02900000 ################################################################
5704 20:15:27.617802
5705 20:15:27.870255 02980000 ################################################################
5706 20:15:27.870414
5707 20:15:28.156085 02a00000 ################################################################
5708 20:15:28.156239
5709 20:15:28.432480 02a80000 ################################################################
5710 20:15:28.432626
5711 20:15:28.732371 02b00000 ################################################################
5712 20:15:28.732531
5713 20:15:29.031775 02b80000 ################################################################
5714 20:15:29.031932
5715 20:15:29.305050 02c00000 ################################################################
5716 20:15:29.305241
5717 20:15:29.574003 02c80000 ################################################################
5718 20:15:29.574166
5719 20:15:29.864537 02d00000 ################################################################
5720 20:15:29.864708
5721 20:15:30.134268 02d80000 ################################################################
5722 20:15:30.134471
5723 20:15:30.410962 02e00000 ################################################################
5724 20:15:30.411117
5725 20:15:30.694226 02e80000 ################################################################
5726 20:15:30.694384
5727 20:15:30.965103 02f00000 ################################################################
5728 20:15:30.965263
5729 20:15:31.270716 02f80000 ################################################################
5730 20:15:31.270888
5731 20:15:31.571420 03000000 ################################################################
5732 20:15:31.571585
5733 20:15:31.846398 03080000 ################################################################
5734 20:15:31.846540
5735 20:15:32.144203 03100000 ################################################################
5736 20:15:32.144365
5737 20:15:32.445865 03180000 ################################################################
5738 20:15:32.446028
5739 20:15:32.744329 03200000 ################################################################
5740 20:15:32.744490
5741 20:15:33.043239 03280000 ################################################################
5742 20:15:33.043398
5743 20:15:33.327737 03300000 ################################################################
5744 20:15:33.327899
5745 20:15:33.499061 03380000 ######################################### done.
5746 20:15:33.499219
5747 20:15:33.501977 The bootfile was 54333054 bytes long.
5748 20:15:33.502070
5749 20:15:33.505183 Sending tftp read request... done.
5750 20:15:33.505277
5751 20:15:33.508789 Waiting for the transfer...
5752 20:15:33.508883
5753 20:15:33.508956 00000000 # done.
5754 20:15:33.511840
5755 20:15:33.518321 Command line loaded dynamically from TFTP file: 14063112/tftp-deploy-qk70arxa/kernel/cmdline
5756 20:15:33.518415
5757 20:15:33.535036 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5758 20:15:33.535141
5759 20:15:33.535213 Loading FIT.
5760 20:15:33.538477
5761 20:15:33.538568 Image ramdisk-1 has 41212006 bytes.
5762 20:15:33.538642
5763 20:15:33.541732 Image fdt-1 has 57695 bytes.
5764 20:15:33.541845
5765 20:15:33.544950 Image kernel-1 has 13061303 bytes.
5766 20:15:33.545041
5767 20:15:33.554380 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5768 20:15:33.554472
5769 20:15:33.567929 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5770 20:15:33.568048
5771 20:15:33.571107 Choosing best match conf-1 for compat google,juniper-sku16.
5772 20:15:33.575826
5773 20:15:33.579847 Connected to device vid:did:rid of 1ae0:0028:00
5774 20:15:33.586853
5775 20:15:33.590322 tpm_get_response: command 0x17b, return code 0x0
5776 20:15:33.590415
5777 20:15:33.593769 tpm_cleanup: add release locality here.
5778 20:15:33.593862
5779 20:15:33.597083 Shutting down all USB controllers.
5780 20:15:33.597175
5781 20:15:33.600328 Removing current net device
5782 20:15:33.600420
5783 20:15:33.603566 Exiting depthcharge with code 4 at timestamp: 46212068
5784 20:15:33.603659
5785 20:15:33.609786 LZMA decompressing kernel-1 to 0x80193568
5786 20:15:33.609882
5787 20:15:33.613325 LZMA decompressing kernel-1 to 0x40000000
5788 20:15:35.470483
5789 20:15:35.470647 jumping to kernel
5790 20:15:35.471205 end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
5791 20:15:35.471315 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
5792 20:15:35.471400 Setting prompt string to ['Linux version [0-9]']
5793 20:15:35.471476 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5794 20:15:35.471550 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5795 20:15:35.546104
5796 20:15:35.548954 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5797 20:15:35.552612 start: 2.2.5.1 login-action (timeout 00:03:55) [common]
5798 20:15:35.552730 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5799 20:15:35.552814 Setting prompt string to []
5800 20:15:35.552904 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5801 20:15:35.552990 Using line separator: #'\n'#
5802 20:15:35.553063 No login prompt set.
5803 20:15:35.553134 Parsing kernel messages
5804 20:15:35.553198 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5805 20:15:35.553312 [login-action] Waiting for messages, (timeout 00:03:55)
5806 20:15:35.553391 Waiting using forced prompt support (timeout 00:01:57)
5807 20:15:35.571883 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j208563-arm64-gcc-10-defconfig-arm64-chromebook-j5dkg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024
5808 20:15:35.575220 [ 0.000000] random: crng init done
5809 20:15:35.582081 [ 0.000000] Machine model: Google juniper sku16 board
5810 20:15:35.584922 [ 0.000000] efi: UEFI not found.
5811 20:15:35.591841 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5812 20:15:35.601650 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5813 20:15:35.608148 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5814 20:15:35.611463 [ 0.000000] printk: bootconsole [mtk8250] enabled
5815 20:15:35.620522 [ 0.000000] NUMA: No NUMA configuration found
5816 20:15:35.627053 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5817 20:15:35.633741 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5818 20:15:35.633836 [ 0.000000] Zone ranges:
5819 20:15:35.640484 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5820 20:15:35.643853 [ 0.000000] DMA32 empty
5821 20:15:35.649973 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5822 20:15:35.653301 [ 0.000000] Movable zone start for each node
5823 20:15:35.656480 [ 0.000000] Early memory node ranges
5824 20:15:35.663238 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5825 20:15:35.669676 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5826 20:15:35.676803 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5827 20:15:35.682568 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5828 20:15:35.689293 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5829 20:15:35.695822 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5830 20:15:35.712808 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5831 20:15:35.719586 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5832 20:15:35.726084 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5833 20:15:35.729293 [ 0.000000] psci: probing for conduit method from DT.
5834 20:15:35.736029 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5835 20:15:35.739139 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5836 20:15:35.745687 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5837 20:15:35.749100 [ 0.000000] psci: SMC Calling Convention v1.1
5838 20:15:35.756019 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5839 20:15:35.758956 [ 0.000000] Detected VIPT I-cache on CPU0
5840 20:15:35.765137 [ 0.000000] CPU features: detected: GIC system register CPU interface
5841 20:15:35.771656 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5842 20:15:35.778451 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5843 20:15:35.784784 [ 0.000000] CPU features: detected: ARM erratum 845719
5844 20:15:35.788183 [ 0.000000] alternatives: applying boot alternatives
5845 20:15:35.794944 [ 0.000000] Fallback order for Node 0: 0
5846 20:15:35.801269 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5847 20:15:35.804496 [ 0.000000] Policy zone: Normal
5848 20:15:35.820835 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5849 20:15:35.833535 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5850 20:15:35.843336 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5851 20:15:35.850292 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5852 20:15:35.856611 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5853 20:15:35.863159 <6>[ 0.000000] software IO TLB: area num 8.
5854 20:15:35.887659 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5855 20:15:35.945323 <6>[ 0.000000] Memory: 3874960K/4191232K available (18112K kernel code, 4120K rwdata, 22500K rodata, 8512K init, 616K bss, 283504K reserved, 32768K cma-reserved)
5856 20:15:35.952047 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5857 20:15:35.958445 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5858 20:15:35.961587 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5859 20:15:35.968091 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5860 20:15:35.974555 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5861 20:15:35.981401 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5862 20:15:35.988103 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5863 20:15:35.994131 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5864 20:15:36.000485 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5865 20:15:36.010532 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5866 20:15:36.017543 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5867 20:15:36.020356 <6>[ 0.000000] GICv3: 640 SPIs implemented
5868 20:15:36.023556 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5869 20:15:36.030190 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5870 20:15:36.033804 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5871 20:15:36.039938 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5872 20:15:36.053392 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5873 20:15:36.066320 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5874 20:15:36.072673 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5875 20:15:36.082596 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5876 20:15:36.095753 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5877 20:15:36.102184 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5878 20:15:36.109109 <6>[ 0.009479] Console: colour dummy device 80x25
5879 20:15:36.112464 <6>[ 0.014510] printk: console [tty1] enabled
5880 20:15:36.125827 <6>[ 0.018899] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5881 20:15:36.129044 <6>[ 0.029364] pid_max: default: 32768 minimum: 301
5882 20:15:36.135330 <6>[ 0.034245] LSM: Security Framework initializing
5883 20:15:36.142167 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5884 20:15:36.148758 <6>[ 0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5885 20:15:36.155187 <4>[ 0.055654] cacheinfo: Unable to detect cache hierarchy for CPU 0
5886 20:15:36.165490 <6>[ 0.062287] cblist_init_generic: Setting adjustable number of callback queues.
5887 20:15:36.172215 <6>[ 0.069733] cblist_init_generic: Setting shift to 3 and lim to 1.
5888 20:15:36.178524 <6>[ 0.076087] cblist_init_generic: Setting adjustable number of callback queues.
5889 20:15:36.184713 <6>[ 0.083532] cblist_init_generic: Setting shift to 3 and lim to 1.
5890 20:15:36.188322 <6>[ 0.089932] rcu: Hierarchical SRCU implementation.
5891 20:15:36.194897 <6>[ 0.094958] rcu: Max phase no-delay instances is 1000.
5892 20:15:36.202416 <6>[ 0.102887] EFI services will not be available.
5893 20:15:36.205888 <6>[ 0.107837] smp: Bringing up secondary CPUs ...
5894 20:15:36.216570 <6>[ 0.113081] Detected VIPT I-cache on CPU1
5895 20:15:36.223014 <4>[ 0.113125] cacheinfo: Unable to detect cache hierarchy for CPU 1
5896 20:15:36.229645 <6>[ 0.113134] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5897 20:15:36.235903 <6>[ 0.113167] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5898 20:15:36.239242 <6>[ 0.113649] Detected VIPT I-cache on CPU2
5899 20:15:36.245907 <4>[ 0.113682] cacheinfo: Unable to detect cache hierarchy for CPU 2
5900 20:15:36.252192 <6>[ 0.113687] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5901 20:15:36.259143 <6>[ 0.113699] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5902 20:15:36.265676 <6>[ 0.114146] Detected VIPT I-cache on CPU3
5903 20:15:36.272038 <4>[ 0.114176] cacheinfo: Unable to detect cache hierarchy for CPU 3
5904 20:15:36.278434 <6>[ 0.114180] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5905 20:15:36.285167 <6>[ 0.114192] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5906 20:15:36.288555 <6>[ 0.114767] CPU features: detected: Spectre-v2
5907 20:15:36.294914 <6>[ 0.114776] CPU features: detected: Spectre-BHB
5908 20:15:36.298182 <6>[ 0.114780] CPU features: detected: ARM erratum 858921
5909 20:15:36.305261 <6>[ 0.114786] Detected VIPT I-cache on CPU4
5910 20:15:36.311713 <4>[ 0.114833] cacheinfo: Unable to detect cache hierarchy for CPU 4
5911 20:15:36.318454 <6>[ 0.114841] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5912 20:15:36.324324 <6>[ 0.114849] arch_timer: Enabling local workaround for ARM erratum 858921
5913 20:15:36.327703 <6>[ 0.114859] arch_timer: CPU4: Trapping CNTVCT access
5914 20:15:36.337745 <6>[ 0.114867] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5915 20:15:36.341282 <6>[ 0.115353] Detected VIPT I-cache on CPU5
5916 20:15:36.347272 <4>[ 0.115393] cacheinfo: Unable to detect cache hierarchy for CPU 5
5917 20:15:36.354127 <6>[ 0.115398] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5918 20:15:36.360700 <6>[ 0.115405] arch_timer: Enabling local workaround for ARM erratum 858921
5919 20:15:36.367435 <6>[ 0.115411] arch_timer: CPU5: Trapping CNTVCT access
5920 20:15:36.373418 <6>[ 0.115416] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5921 20:15:36.377024 <6>[ 0.115953] Detected VIPT I-cache on CPU6
5922 20:15:36.383435 <4>[ 0.115997] cacheinfo: Unable to detect cache hierarchy for CPU 6
5923 20:15:36.390144 <6>[ 0.116003] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5924 20:15:36.396677 <6>[ 0.116011] arch_timer: Enabling local workaround for ARM erratum 858921
5925 20:15:36.403349 <6>[ 0.116017] arch_timer: CPU6: Trapping CNTVCT access
5926 20:15:36.409909 <6>[ 0.116022] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5927 20:15:36.413087 <6>[ 0.116554] Detected VIPT I-cache on CPU7
5928 20:15:36.419850 <4>[ 0.116598] cacheinfo: Unable to detect cache hierarchy for CPU 7
5929 20:15:36.425771 <6>[ 0.116604] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5930 20:15:36.432754 <6>[ 0.116611] arch_timer: Enabling local workaround for ARM erratum 858921
5931 20:15:36.439178 <6>[ 0.116617] arch_timer: CPU7: Trapping CNTVCT access
5932 20:15:36.445624 <6>[ 0.116623] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5933 20:15:36.449362 <6>[ 0.116670] smp: Brought up 1 node, 8 CPUs
5934 20:15:36.455444 <6>[ 0.355542] SMP: Total of 8 processors activated.
5935 20:15:36.462293 <6>[ 0.360478] CPU features: detected: 32-bit EL0 Support
5936 20:15:36.465233 <6>[ 0.365849] CPU features: detected: 32-bit EL1 Support
5937 20:15:36.472336 <6>[ 0.371215] CPU features: detected: CRC32 instructions
5938 20:15:36.474924 <6>[ 0.376643] CPU: All CPU(s) started at EL2
5939 20:15:36.481332 <6>[ 0.380981] alternatives: applying system-wide alternatives
5940 20:15:36.488607 <6>[ 0.389012] devtmpfs: initialized
5941 20:15:36.504209 <6>[ 0.397948] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5942 20:15:36.510980 <6>[ 0.407898] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5943 20:15:36.517246 <6>[ 0.415626] pinctrl core: initialized pinctrl subsystem
5944 20:15:36.520359 <6>[ 0.422737] DMI not present or invalid.
5945 20:15:36.527064 <6>[ 0.427107] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5946 20:15:36.536916 <6>[ 0.434003] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5947 20:15:36.543633 <6>[ 0.441527] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5948 20:15:36.553243 <6>[ 0.449778] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5949 20:15:36.559955 <6>[ 0.457954] audit: initializing netlink subsys (disabled)
5950 20:15:36.566554 <5>[ 0.463658] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5951 20:15:36.573123 <6>[ 0.464636] thermal_sys: Registered thermal governor 'step_wise'
5952 20:15:36.580010 <6>[ 0.471624] thermal_sys: Registered thermal governor 'power_allocator'
5953 20:15:36.582756 <6>[ 0.477920] cpuidle: using governor menu
5954 20:15:36.589388 <6>[ 0.488885] NET: Registered PF_QIPCRTR protocol family
5955 20:15:36.595727 <6>[ 0.494370] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5956 20:15:36.602252 <6>[ 0.501467] ASID allocator initialised with 32768 entries
5957 20:15:36.609253 <6>[ 0.508234] Serial: AMBA PL011 UART driver
5958 20:15:36.618488 <4>[ 0.518649] Trying to register duplicate clock ID: 113
5959 20:15:36.678236 <6>[ 0.575456] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5960 20:15:36.693385 <6>[ 0.589821] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5961 20:15:36.695837 <6>[ 0.599558] KASLR enabled
5962 20:15:36.710978 <6>[ 0.607561] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5963 20:15:36.717153 <6>[ 0.614562] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5964 20:15:36.724031 <6>[ 0.621038] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5965 20:15:36.730506 <6>[ 0.628029] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5966 20:15:36.737106 <6>[ 0.634502] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5967 20:15:36.743384 <6>[ 0.641493] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5968 20:15:36.750250 <6>[ 0.647967] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5969 20:15:36.756570 <6>[ 0.654956] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5970 20:15:36.762717 <6>[ 0.662525] ACPI: Interpreter disabled.
5971 20:15:36.770504 <6>[ 0.670509] iommu: Default domain type: Translated
5972 20:15:36.776774 <6>[ 0.675615] iommu: DMA domain TLB invalidation policy: strict mode
5973 20:15:36.780585 <5>[ 0.682246] SCSI subsystem initialized
5974 20:15:36.786955 <6>[ 0.686655] usbcore: registered new interface driver usbfs
5975 20:15:36.793363 <6>[ 0.692383] usbcore: registered new interface driver hub
5976 20:15:36.796802 <6>[ 0.697923] usbcore: registered new device driver usb
5977 20:15:36.803912 <6>[ 0.704224] pps_core: LinuxPPS API ver. 1 registered
5978 20:15:36.814151 <6>[ 0.709409] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5979 20:15:36.817172 <6>[ 0.718733] PTP clock support registered
5980 20:15:36.820544 <6>[ 0.722984] EDAC MC: Ver: 3.0.0
5981 20:15:36.828510 <6>[ 0.728638] FPGA manager framework
5982 20:15:36.835221 <6>[ 0.732324] Advanced Linux Sound Architecture Driver Initialized.
5983 20:15:36.838332 <6>[ 0.739071] vgaarb: loaded
5984 20:15:36.844793 <6>[ 0.742192] clocksource: Switched to clocksource arch_sys_counter
5985 20:15:36.848179 <5>[ 0.748622] VFS: Disk quotas dquot_6.6.0
5986 20:15:36.854754 <6>[ 0.752797] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5987 20:15:36.857619 <6>[ 0.759973] pnp: PnP ACPI: disabled
5988 20:15:36.866794 <6>[ 0.766832] NET: Registered PF_INET protocol family
5989 20:15:36.873356 <6>[ 0.772063] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5990 20:15:36.885186 <6>[ 0.781974] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5991 20:15:36.895104 <6>[ 0.790727] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5992 20:15:36.901368 <6>[ 0.798678] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5993 20:15:36.907967 <6>[ 0.806909] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5994 20:15:36.918283 <6>[ 0.815004] TCP: Hash tables configured (established 32768 bind 32768)
5995 20:15:36.924968 <6>[ 0.821831] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5996 20:15:36.930964 <6>[ 0.828803] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5997 20:15:36.937565 <6>[ 0.836283] NET: Registered PF_UNIX/PF_LOCAL protocol family
5998 20:15:36.944261 <6>[ 0.842378] RPC: Registered named UNIX socket transport module.
5999 20:15:36.947418 <6>[ 0.848521] RPC: Registered udp transport module.
6000 20:15:36.954142 <6>[ 0.853445] RPC: Registered tcp transport module.
6001 20:15:36.960552 <6>[ 0.858368] RPC: Registered tcp NFSv4.1 backchannel transport module.
6002 20:15:36.963858 <6>[ 0.865019] PCI: CLS 0 bytes, default 64
6003 20:15:36.967026 <6>[ 0.869275] Unpacking initramfs...
6004 20:15:36.982017 <6>[ 0.878786] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6005 20:15:36.991796 <6>[ 0.887414] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6006 20:15:36.995047 <6>[ 0.896265] kvm [1]: IPA Size Limit: 40 bits
6007 20:15:37.002395 <6>[ 0.902588] kvm [1]: vgic-v2@c420000
6008 20:15:37.005766 <6>[ 0.906404] kvm [1]: GIC system register CPU interface enabled
6009 20:15:37.012251 <6>[ 0.912588] kvm [1]: vgic interrupt IRQ18
6010 20:15:37.015975 <6>[ 0.916951] kvm [1]: Hyp mode initialized successfully
6011 20:15:37.023105 <5>[ 0.923236] Initialise system trusted keyrings
6012 20:15:37.029545 <6>[ 0.928068] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6013 20:15:37.037948 <6>[ 0.938009] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6014 20:15:37.044210 <5>[ 0.944494] NFS: Registering the id_resolver key type
6015 20:15:37.047430 <5>[ 0.949812] Key type id_resolver registered
6016 20:15:37.053918 <5>[ 0.954229] Key type id_legacy registered
6017 20:15:37.061011 <6>[ 0.958542] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6018 20:15:37.067045 <6>[ 0.965473] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6019 20:15:37.073307 <6>[ 0.973217] 9p: Installing v9fs 9p2000 file system support
6020 20:15:37.102438 <5>[ 1.002707] Key type asymmetric registered
6021 20:15:37.105830 <5>[ 1.007053] Asymmetric key parser 'x509' registered
6022 20:15:37.115522 <6>[ 1.012217] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6023 20:15:37.118581 <6>[ 1.019831] io scheduler mq-deadline registered
6024 20:15:37.121872 <6>[ 1.024588] io scheduler kyber registered
6025 20:15:37.145831 <6>[ 1.045342] EINJ: ACPI disabled.
6026 20:15:37.152195 <4>[ 1.049107] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6027 20:15:37.189922 <6>[ 1.089805] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6028 20:15:37.198054 <6>[ 1.098321] printk: console [ttyS0] disabled
6029 20:15:37.225883 <6>[ 1.122965] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6030 20:15:37.233304 <6>[ 1.132437] printk: console [ttyS0] enabled
6031 20:15:37.235794 <6>[ 1.132437] printk: console [ttyS0] enabled
6032 20:15:37.242784 <6>[ 1.141356] printk: bootconsole [mtk8250] disabled
6033 20:15:37.245911 <6>[ 1.141356] printk: bootconsole [mtk8250] disabled
6034 20:15:37.255754 <3>[ 1.151896] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6035 20:15:37.262051 <3>[ 1.160281] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6036 20:15:37.291640 <6>[ 1.188688] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6037 20:15:37.298652 <6>[ 1.198348] serial serial0: tty port ttyS1 registered
6038 20:15:37.305153 <6>[ 1.204897] SuperH (H)SCI(F) driver initialized
6039 20:15:37.307943 <6>[ 1.210386] msm_serial: driver initialized
6040 20:15:37.323541 <6>[ 1.220714] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6041 20:15:37.333445 <6>[ 1.229314] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6042 20:15:37.340003 <6>[ 1.237892] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6043 20:15:37.350205 <6>[ 1.246459] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6044 20:15:37.359644 <6>[ 1.255106] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6045 20:15:37.366252 <6>[ 1.263763] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6046 20:15:37.376486 <6>[ 1.272499] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6047 20:15:37.385543 <6>[ 1.281236] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6048 20:15:37.392148 <6>[ 1.289799] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6049 20:15:37.402103 <6>[ 1.298596] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6050 20:15:37.410631 <4>[ 1.310988] cacheinfo: Unable to detect cache hierarchy for CPU 0
6051 20:15:37.420033 <6>[ 1.320364] loop: module loaded
6052 20:15:37.431916 <6>[ 1.332204] vsim1: Bringing 1800000uV into 2700000-2700000uV
6053 20:15:37.449883 <6>[ 1.350084] megasas: 07.719.03.00-rc1
6054 20:15:37.458822 <6>[ 1.358961] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6055 20:15:37.476806 <6>[ 1.373568] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6056 20:15:37.489967 <6>[ 1.390137] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6057 20:15:37.549975 <6>[ 1.443816] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6058 20:15:38.273552 <6>[ 2.173989] Freeing initrd memory: 40240K
6059 20:15:38.287361 <4>[ 2.184088] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6060 20:15:38.293966 <4>[ 2.193342] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
6061 20:15:38.300158 <4>[ 2.200040] Hardware name: Google juniper sku16 board (DT)
6062 20:15:38.303403 <4>[ 2.205780] Call trace:
6063 20:15:38.307097 <4>[ 2.208480] dump_backtrace.part.0+0xe0/0xf0
6064 20:15:38.310147 <4>[ 2.213016] show_stack+0x18/0x30
6065 20:15:38.316726 <4>[ 2.216588] dump_stack_lvl+0x68/0x84
6066 20:15:38.320118 <4>[ 2.220508] dump_stack+0x18/0x34
6067 20:15:38.323045 <4>[ 2.224078] sysfs_warn_dup+0x64/0x80
6068 20:15:38.326242 <4>[ 2.227999] sysfs_do_create_link_sd+0xf0/0x100
6069 20:15:38.333448 <4>[ 2.232787] sysfs_create_link+0x20/0x40
6070 20:15:38.336521 <4>[ 2.236966] bus_add_device+0x68/0x10c
6071 20:15:38.339960 <4>[ 2.240972] device_add+0x340/0x7ac
6072 20:15:38.343146 <4>[ 2.244715] of_device_add+0x44/0x60
6073 20:15:38.349752 <4>[ 2.248549] of_platform_device_create_pdata+0x90/0x120
6074 20:15:38.352626 <4>[ 2.254030] of_platform_bus_create+0x170/0x370
6075 20:15:38.359268 <4>[ 2.258817] of_platform_populate+0x50/0xfc
6076 20:15:38.362901 <4>[ 2.263256] parse_mtd_partitions+0x1dc/0x510
6077 20:15:38.369051 <4>[ 2.267868] mtd_device_parse_register+0xf8/0x2e0
6078 20:15:38.372457 <4>[ 2.272826] spi_nor_probe+0x21c/0x2f0
6079 20:15:38.375754 <4>[ 2.276832] spi_mem_probe+0x6c/0xb0
6080 20:15:38.379274 <4>[ 2.280664] spi_probe+0x84/0xe4
6081 20:15:38.382408 <4>[ 2.284145] really_probe+0xbc/0x2e0
6082 20:15:38.389076 <4>[ 2.287976] __driver_probe_device+0x78/0x11c
6083 20:15:38.392495 <4>[ 2.292587] driver_probe_device+0xd8/0x160
6084 20:15:38.395626 <4>[ 2.297025] __device_attach_driver+0xb8/0x134
6085 20:15:38.401943 <4>[ 2.301723] bus_for_each_drv+0x78/0xd0
6086 20:15:38.404965 <4>[ 2.305813] __device_attach+0xa8/0x1c0
6087 20:15:38.408679 <4>[ 2.309904] device_initial_probe+0x14/0x20
6088 20:15:38.414998 <4>[ 2.314342] bus_probe_device+0x9c/0xa4
6089 20:15:38.418004 <4>[ 2.318432] device_add+0x3ac/0x7ac
6090 20:15:38.421302 <4>[ 2.322174] __spi_add_device+0x78/0x120
6091 20:15:38.424956 <4>[ 2.326352] spi_add_device+0x40/0x7c
6092 20:15:38.431120 <4>[ 2.330269] spi_register_controller+0x610/0xad0
6093 20:15:38.434630 <4>[ 2.335141] devm_spi_register_controller+0x4c/0xa4
6094 20:15:38.437944 <4>[ 2.340274] mtk_spi_probe+0x3f8/0x650
6095 20:15:38.444136 <4>[ 2.344278] platform_probe+0x68/0xe0
6096 20:15:38.447417 <4>[ 2.348196] really_probe+0xbc/0x2e0
6097 20:15:38.450647 <4>[ 2.352025] __driver_probe_device+0x78/0x11c
6098 20:15:38.457835 <4>[ 2.356636] driver_probe_device+0xd8/0x160
6099 20:15:38.460389 <4>[ 2.361074] __driver_attach+0x94/0x19c
6100 20:15:38.463757 <4>[ 2.365164] bus_for_each_dev+0x70/0xd0
6101 20:15:38.467481 <4>[ 2.369254] driver_attach+0x24/0x30
6102 20:15:38.470684 <4>[ 2.373084] bus_add_driver+0x154/0x20c
6103 20:15:38.477059 <4>[ 2.377174] driver_register+0x78/0x130
6104 20:15:38.480296 <4>[ 2.381264] __platform_driver_register+0x28/0x34
6105 20:15:38.486755 <4>[ 2.386224] mtk_spi_driver_init+0x1c/0x28
6106 20:15:38.490499 <4>[ 2.390577] do_one_initcall+0x50/0x1d0
6107 20:15:38.493579 <4>[ 2.394667] kernel_init_freeable+0x21c/0x288
6108 20:15:38.496578 <4>[ 2.399280] kernel_init+0x24/0x12c
6109 20:15:38.503101 <4>[ 2.403025] ret_from_fork+0x10/0x20
6110 20:15:38.511540 <6>[ 2.411771] tun: Universal TUN/TAP device driver, 1.6
6111 20:15:38.514948 <6>[ 2.418041] thunder_xcv, ver 1.0
6112 20:15:38.521304 <6>[ 2.421557] thunder_bgx, ver 1.0
6113 20:15:38.521398 <6>[ 2.425061] nicpf, ver 1.0
6114 20:15:38.532828 <6>[ 2.429430] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6115 20:15:38.538963 <6>[ 2.436916] hns3: Copyright (c) 2017 Huawei Corporation.
6116 20:15:38.542541 <6>[ 2.442531] hclge is initializing
6117 20:15:38.545371 <6>[ 2.446111] e1000: Intel(R) PRO/1000 Network Driver
6118 20:15:38.552246 <6>[ 2.451248] e1000: Copyright (c) 1999-2006 Intel Corporation.
6119 20:15:38.558853 <6>[ 2.457270] e1000e: Intel(R) PRO/1000 Network Driver
6120 20:15:38.564947 <6>[ 2.462490] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6121 20:15:38.568294 <6>[ 2.468684] igb: Intel(R) Gigabit Ethernet Network Driver
6122 20:15:38.575021 <6>[ 2.474341] igb: Copyright (c) 2007-2014 Intel Corporation.
6123 20:15:38.581321 <6>[ 2.480184] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6124 20:15:38.587689 <6>[ 2.486707] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6125 20:15:38.591071 <6>[ 2.493262] sky2: driver version 1.30
6126 20:15:38.598470 <6>[ 2.498522] usbcore: registered new device driver r8152-cfgselector
6127 20:15:38.604747 <6>[ 2.505069] usbcore: registered new interface driver r8152
6128 20:15:38.611120 <6>[ 2.510894] VFIO - User Level meta-driver version: 0.3
6129 20:15:38.618539 <6>[ 2.518677] mtu3 11201000.usb: uwk - reg:0x420, version:101
6130 20:15:38.628191 <4>[ 2.524547] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6131 20:15:38.631746 <6>[ 2.531819] mtu3 11201000.usb: dr_mode: 1, drd: auto
6132 20:15:38.638210 <6>[ 2.537044] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6133 20:15:38.641652 <6>[ 2.543218] mtu3 11201000.usb: usb3-drd: 0
6134 20:15:38.651907 <6>[ 2.548744] mtu3 11201000.usb: xHCI platform device register success...
6135 20:15:38.658124 <4>[ 2.557333] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6136 20:15:38.665119 <6>[ 2.565255] xhci-mtk 11200000.usb: xHCI Host Controller
6137 20:15:38.674775 <6>[ 2.570761] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6138 20:15:38.678022 <6>[ 2.578483] xhci-mtk 11200000.usb: USB3 root hub has no ports
6139 20:15:38.687926 <6>[ 2.584491] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6140 20:15:38.694727 <6>[ 2.593912] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6141 20:15:38.700724 <6>[ 2.599994] xhci-mtk 11200000.usb: xHCI Host Controller
6142 20:15:38.707382 <6>[ 2.605482] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6143 20:15:38.714408 <6>[ 2.613140] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6144 20:15:38.717145 <6>[ 2.619953] hub 1-0:1.0: USB hub found
6145 20:15:38.723707 <6>[ 2.623985] hub 1-0:1.0: 1 port detected
6146 20:15:38.733515 <6>[ 2.629296] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6147 20:15:38.737280 <6>[ 2.637902] hub 2-0:1.0: USB hub found
6148 20:15:38.743387 <3>[ 2.641929] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6149 20:15:38.750043 <6>[ 2.649809] usbcore: registered new interface driver usb-storage
6150 20:15:38.756503 <6>[ 2.656415] usbcore: registered new device driver onboard-usb-hub
6151 20:15:38.773552 <4>[ 2.670284] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6152 20:15:38.782226 <6>[ 2.682540] mt6397-rtc mt6358-rtc: registered as rtc0
6153 20:15:38.792212 <6>[ 2.688016] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-28T20:15:38 UTC (1716927338)
6154 20:15:38.799265 <6>[ 2.697896] i2c_dev: i2c /dev entries driver
6155 20:15:38.808696 <6>[ 2.704299] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6156 20:15:38.815073 <6>[ 2.712615] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6157 20:15:38.821466 <6>[ 2.721522] i2c 4-0058: Fixed dependency cycle(s) with /panel
6158 20:15:38.827936 <6>[ 2.727553] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6159 20:15:38.837859 <3>[ 2.735004] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6160 20:15:38.855207 <6>[ 2.752015] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6161 20:15:38.863310 <6>[ 2.763475] cpu cpu0: EM: created perf domain
6162 20:15:38.876660 <6>[ 2.768866] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6163 20:15:38.879312 <6>[ 2.780151] cpu cpu4: EM: created perf domain
6164 20:15:38.887165 <6>[ 2.787214] sdhci: Secure Digital Host Controller Interface driver
6165 20:15:38.893973 <6>[ 2.793662] sdhci: Copyright(c) Pierre Ossman
6166 20:15:38.900004 <6>[ 2.799071] Synopsys Designware Multimedia Card Interface Driver
6167 20:15:38.906865 <6>[ 2.799604] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6168 20:15:38.913338 <6>[ 2.806156] sdhci-pltfm: SDHCI platform and OF driver helper
6169 20:15:38.919719 <6>[ 2.819063] ledtrig-cpu: registered to indicate activity on CPUs
6170 20:15:38.926779 <6>[ 2.826789] usbcore: registered new interface driver usbhid
6171 20:15:38.932919 <6>[ 2.832628] usbhid: USB HID core driver
6172 20:15:38.940052 <6>[ 2.836911] spi_master spi2: will run message pump with realtime priority
6173 20:15:38.946785 <4>[ 2.836961] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6174 20:15:38.953451 <4>[ 2.851154] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6175 20:15:38.966531 <6>[ 2.857417] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6176 20:15:38.983873 <6>[ 2.874418] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6177 20:15:38.990813 <4>[ 2.884593] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6178 20:15:38.996915 <6>[ 2.889920] cros-ec-spi spi2.0: Chrome EC device registered
6179 20:15:39.008050 <4>[ 2.904790] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6180 20:15:39.020509 <4>[ 2.917169] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6181 20:15:39.026998 <4>[ 2.926004] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6182 20:15:39.033030 <6>[ 2.926540] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6183 20:15:39.040765 <6>[ 2.940867] mmc0: new HS400 MMC card at address 0001
6184 20:15:39.047433 <6>[ 2.943287] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6185 20:15:39.053777 <6>[ 2.947255] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6186 20:15:39.061616 <6>[ 2.961837] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6187 20:15:39.071359 <6>[ 2.967746] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6188 20:15:39.081053 <6>[ 2.971342] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6189 20:15:39.087728 <6>[ 2.977347] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6190 20:15:39.094491 <6>[ 2.988674] NET: Registered PF_PACKET protocol family
6191 20:15:39.097819 <6>[ 2.993777] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6192 20:15:39.103979 <6>[ 2.998153] 9pnet: Installing 9P2000 support
6193 20:15:39.110280 <6>[ 3.004043] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6194 20:15:39.120635 <6>[ 3.006305] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6195 20:15:39.130115 <6>[ 3.006685] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6196 20:15:39.136821 <5>[ 3.007650] Key type dns_resolver registered
6197 20:15:39.140638 <6>[ 3.040986] registered taskstats version 1
6198 20:15:39.146528 <5>[ 3.045359] Loading compiled-in X.509 certificates
6199 20:15:39.152821 <6>[ 3.050202] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6200 20:15:39.186115 <3>[ 3.082850] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6201 20:15:39.216538 <4>[ 3.109942] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6202 20:15:39.225766 <6>[ 3.120572] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6203 20:15:39.240080 <6>[ 3.133355] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6204 20:15:39.253053 <3>[ 3.144937] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6205 20:15:39.267228 <3>[ 3.160668] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6206 20:15:39.273834 <3>[ 3.173116] debugfs: File 'Playback' in directory 'dapm' already present!
6207 20:15:39.283398 <3>[ 3.180169] debugfs: File 'Capture' in directory 'dapm' already present!
6208 20:15:39.297087 <6>[ 3.190440] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6209 20:15:39.307336 <6>[ 3.204051] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6210 20:15:39.310124 <6>[ 3.205145] hub 1-1:1.0: USB hub found
6211 20:15:39.320324 <6>[ 3.212598] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6212 20:15:39.323368 <6>[ 3.216968] hub 1-1:1.0: 3 ports detected
6213 20:15:39.333645 <6>[ 3.225101] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6214 20:15:39.340068 <6>[ 3.237895] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6215 20:15:39.349456 <6>[ 3.246414] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6216 20:15:39.359445 <6>[ 3.254931] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6217 20:15:39.365927 <6>[ 3.263448] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6218 20:15:39.372549 <6>[ 3.272662] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6219 20:15:39.380345 <6>[ 3.280184] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6220 20:15:39.387437 <6>[ 3.287527] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6221 20:15:39.398293 <6>[ 3.294801] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6222 20:15:39.404840 <6>[ 3.302249] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6223 20:15:39.411085 <6>[ 3.310575] panfrost 13040000.gpu: clock rate = 511999970
6224 20:15:39.420803 <6>[ 3.316270] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6225 20:15:39.430443 <6>[ 3.326538] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6226 20:15:39.437168 <6>[ 3.334553] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6227 20:15:39.450285 <6>[ 3.342986] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6228 20:15:39.456313 <6>[ 3.355064] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6229 20:15:39.468325 <6>[ 3.365158] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6230 20:15:39.478170 <6>[ 3.373969] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6231 20:15:39.487683 <6>[ 3.383118] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6232 20:15:39.497816 <6>[ 3.392248] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6233 20:15:39.504620 <6>[ 3.401378] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6234 20:15:39.514161 <6>[ 3.410677] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6235 20:15:39.523526 <6>[ 3.419976] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6236 20:15:39.533623 <6>[ 3.429450] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6237 20:15:39.543291 <6>[ 3.438924] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6238 20:15:39.553146 <6>[ 3.448049] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6239 20:15:39.624890 <6>[ 3.521070] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6240 20:15:39.633956 <6>[ 3.529968] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6241 20:15:39.645313 <6>[ 3.542362] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6242 20:15:39.661342 <6>[ 3.558222] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6243 20:15:40.351630 <6>[ 3.746613] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6244 20:15:40.361283 <4>[ 3.863424] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6245 20:15:40.368222 <4>[ 3.863445] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6246 20:15:40.374385 <6>[ 3.916986] r8152 1-1.2:1.0 eth0: v1.12.13
6247 20:15:40.381153 <6>[ 3.994219] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6248 20:15:40.387754 <6>[ 4.231887] Console: switching to colour frame buffer device 170x48
6249 20:15:40.397288 <6>[ 4.292562] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6250 20:15:40.412198 <6>[ 4.308893] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6251 20:15:40.418835 <6>[ 4.316965] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6252 20:15:41.714993 <6>[ 5.615103] r8152 1-1.2:1.0 eth0: carrier on
6253 20:15:44.290737 <5>[ 5.646240] Sending DHCP requests .., OK
6254 20:15:44.296676 <6>[ 8.194629] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6255 20:15:44.300097 <6>[ 8.203062] IP-Config: Complete:
6256 20:15:44.313738 <6>[ 8.206657] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6257 20:15:44.323539 <6>[ 8.217563] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6258 20:15:44.329894 <6>[ 8.227048] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6259 20:15:44.333134 <6>[ 8.227058] nameserver0=192.168.201.1
6260 20:15:44.339885 <6>[ 8.239409] clk: Disabling unused clocks
6261 20:15:44.343391 <6>[ 8.244513] ALSA device list:
6262 20:15:44.351289 <6>[ 8.251121] #0: mt8183_mt6358_ts3a227_max98357
6263 20:15:44.363406 <6>[ 8.262706] Freeing unused kernel memory: 8512K
6264 20:15:44.370700 <6>[ 8.270410] Run /init as init process
6265 20:15:44.405053 <6>[ 8.304369] NET: Registered PF_INET6 protocol family
6266 20:15:44.411617 <6>[ 8.311262] Segment Routing with IPv6
6267 20:15:44.415057 <6>[ 8.315909] In-situ OAM (IOAM) with IPv6
6268 20:15:44.459575 <30>[ 8.330057] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6269 20:15:44.465859 <30>[ 8.366127] systemd[1]: Detected architecture arm64.
6270 20:15:44.469208
6271 20:15:44.472417 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6272 20:15:44.472542
6273 20:15:44.486416 <30>[ 8.386477] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6274 20:15:44.627963 <30>[ 8.524660] systemd[1]: Queued start job for default target graphical.target.
6275 20:15:44.656239 <30>[ 8.552628] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6276 20:15:44.665798 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6277 20:15:44.683117 <30>[ 8.579610] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6278 20:15:44.693053 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6279 20:15:44.710472 <30>[ 8.607076] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6280 20:15:44.721725 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6281 20:15:44.738435 <30>[ 8.635121] systemd[1]: Created slice user.slice - User and Session Slice.
6282 20:15:44.748388 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6283 20:15:44.770337 <30>[ 8.663413] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6284 20:15:44.781843 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6285 20:15:44.801974 <30>[ 8.695232] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6286 20:15:44.813820 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6287 20:15:44.842764 <30>[ 8.726505] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6288 20:15:44.858069 <30>[ 8.754729] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6289 20:15:44.865439 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6290 20:15:44.885994 <30>[ 8.782367] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6291 20:15:44.898523 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6292 20:15:44.914138 <30>[ 8.810441] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6293 20:15:44.928316 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6294 20:15:44.943151 <30>[ 8.842482] systemd[1]: Reached target paths.target - Path Units.
6295 20:15:44.957605 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6296 20:15:44.974233 <30>[ 8.870393] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6297 20:15:44.986176 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6298 20:15:45.001992 <30>[ 8.898358] systemd[1]: Reached target slices.target - Slice Units.
6299 20:15:45.013470 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6300 20:15:45.026928 <30>[ 8.926432] systemd[1]: Reached target swap.target - Swaps.
6301 20:15:45.037822 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6302 20:15:45.057897 <30>[ 8.954431] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6303 20:15:45.070819 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6304 20:15:45.090476 <30>[ 8.986891] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6305 20:15:45.104229 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6306 20:15:45.123550 <30>[ 9.019777] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6307 20:15:45.137064 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6308 20:15:45.154145 <30>[ 9.051126] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6309 20:15:45.168775 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6310 20:15:45.186569 <30>[ 9.083054] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6311 20:15:45.198396 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6312 20:15:45.218299 <30>[ 9.115242] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6313 20:15:45.232222 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6314 20:15:45.250826 <30>[ 9.147101] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6315 20:15:45.263923 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6316 20:15:45.282862 <30>[ 9.178865] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6317 20:15:45.295433 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6318 20:15:45.338536 <30>[ 9.234619] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6319 20:15:45.351186 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6320 20:15:45.378909 <30>[ 9.275635] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6321 20:15:45.389860 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6322 20:15:45.412532 <30>[ 9.309330] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6323 20:15:45.425882 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6324 20:15:45.449707 <30>[ 9.339659] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6325 20:15:45.494022 <30>[ 9.390815] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6326 20:15:45.506991 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6327 20:15:45.531454 <30>[ 9.428026] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6328 20:15:45.545106 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6329 20:15:45.602386 <30>[ 9.498920] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6330 20:15:45.616574 Startin<6>[ 9.510736] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6331 20:15:45.619730 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6332 20:15:45.644101 <30>[ 9.540553] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6333 20:15:45.657209 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6334 20:15:45.679602 <30>[ 9.575942] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6335 20:15:45.694069 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6336 20:15:45.746440 <30>[ 9.642978] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6337 20:15:45.758045 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6338 20:15:45.783507 <30>[ 9.680621] systemd[1]: Starting systemd-journald.service - Journal Service...
6339 20:15:45.794670 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6340 20:15:45.814004 <30>[ 9.710176] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6341 20:15:45.824523 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6342 20:15:45.849331 <30>[ 9.742604] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6343 20:15:45.859751 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6344 20:15:45.882355 <30>[ 9.778850] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6345 20:15:45.896699 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6346 20:15:45.916980 <30>[ 9.813305] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6347 20:15:45.927891 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6348 20:15:45.949883 <30>[ 9.846112] systemd[1]: Started systemd-journald.service - Journal Service.
6349 20:15:45.959720 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6350 20:15:45.980238 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6351 20:15:45.998451 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6352 20:15:46.018596 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6353 20:15:46.034997 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6354 20:15:46.055894 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6355 20:15:46.081894 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6356 20:15:46.098660 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6357 20:15:46.122669 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6358 20:15:46.146615 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6359 20:15:46.166885 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6360 20:15:46.190673 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6361 20:15:46.215487 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6362 20:15:46.234484 See 'systemctl status systemd-remount-fs.service' for details.
6363 20:15:46.245541 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6364 20:15:46.291096 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6365 20:15:46.317276 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6366 20:15:46.329203 <46>[ 10.226037] systemd-journald[200]: Received client request to flush runtime journal.
6367 20:15:46.343476 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6368 20:15:46.372034 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6369 20:15:46.392872 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6370 20:15:46.422094 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6371 20:15:46.440192 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6372 20:15:46.460456 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6373 20:15:46.480250 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6374 20:15:46.499801 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6375 20:15:46.520031 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6376 20:15:46.562488 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6377 20:15:46.598957 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6378 20:15:46.623534 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6379 20:15:46.643085 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6380 20:15:46.686677 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6381 20:15:46.712663 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6382 20:15:46.735083 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6383 20:15:46.796533 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6384 20:15:46.816796 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6385 20:15:46.834736 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6386 20:15:46.872433 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6387 20:15:46.891800 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6388 20:15:46.910363 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6389 20:15:47.003991 <3>[ 10.903848] thermal_sys: Failed to find 'trips' node
6390 20:15:47.014621 <3>[ 10.910979] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6391 20:15:47.024394 <3>[ 10.920143] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6392 20:15:47.034532 <4>[ 10.930727] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6393 20:15:47.049586 <3>[ 10.942519] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6394 20:15:47.052388 <3>[ 10.946726] thermal_sys: Failed to find 'trips' node
6395 20:15:47.058700 <4>[ 10.950736] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6396 20:15:47.065241 <3>[ 10.952591] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6397 20:15:47.075388 <3>[ 10.958069] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6398 20:15:47.081674 <4>[ 10.958596] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6399 20:15:47.091846 <3>[ 10.965316] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6400 20:15:47.101567 <3>[ 10.972100] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6401 20:15:47.111037 <3>[ 10.972218] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6402 20:15:47.117953 <3>[ 10.972232] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6403 20:15:47.128142 <3>[ 10.972238] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6404 20:15:47.134331 <3>[ 10.979228] elan_i2c 2-0015: Error applying setting, reverse things back
6405 20:15:47.144746 <4>[ 10.986694] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6406 20:15:47.151150 <3>[ 10.996915] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6407 20:15:47.161277 <3>[ 10.996933] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6408 20:15:47.171257 <3>[ 10.996938] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6409 20:15:47.177600 <3>[ 10.996945] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6410 20:15:47.188054 <3>[ 10.996949] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6411 20:15:47.198276 <3>[ 11.001032] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6412 20:15:47.201323 <6>[ 11.033220] mc: Linux media interface: v0.10
6413 20:15:47.208144 <5>[ 11.042809] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6414 20:15:47.217817 <6>[ 11.050694] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6415 20:15:47.224563 <6>[ 11.065026] cs_system_cfg: CoreSight Configuration manager initialised
6416 20:15:47.231072 <5>[ 11.067543] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6417 20:15:47.241338 <6>[ 11.090987] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6418 20:15:47.250731 <5>[ 11.093257] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6419 20:15:47.260232 <6>[ 11.106903] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6420 20:15:47.263304 <6>[ 11.108348] videodev: Linux video capture interface: v2.00
6421 20:15:47.273024 <4>[ 11.114577] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6422 20:15:47.282965 <6>[ 11.122483] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6423 20:15:47.286144 <6>[ 11.123358] Bluetooth: Core ver 2.22
6424 20:15:47.293152 <6>[ 11.123426] NET: Registered PF_BLUETOOTH protocol family
6425 20:15:47.299763 <6>[ 11.123429] Bluetooth: HCI device and connection manager initialized
6426 20:15:47.306024 <6>[ 11.123449] Bluetooth: HCI socket layer initialized
6427 20:15:47.309355 <6>[ 11.123456] Bluetooth: L2CAP socket layer initialized
6428 20:15:47.316170 <6>[ 11.123471] Bluetooth: SCO socket layer initialized
6429 20:15:47.319558 <3>[ 11.123806] mtk-scp 10500000.scp: invalid resource
6430 20:15:47.329358 <6>[ 11.123867] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6431 20:15:47.332717 <6>[ 11.124783] remoteproc remoteproc0: scp is available
6432 20:15:47.342531 <4>[ 11.124867] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6433 20:15:47.348973 <6>[ 11.124873] remoteproc remoteproc0: powering up scp
6434 20:15:47.355941 <4>[ 11.124889] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6435 20:15:47.362746 <3>[ 11.124892] remoteproc remoteproc0: request_firmware failed: -2
6436 20:15:47.369398 <6>[ 11.129195] cfg80211: failed to load regulatory.db
6437 20:15:47.376399 <6>[ 11.156471] Bluetooth: HCI UART driver ver 2.3
6438 20:15:47.382601 <6>[ 11.157791] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6439 20:15:47.388949 <6>[ 11.164495] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6440 20:15:47.399600 <6>[ 11.164787] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6441 20:15:47.406064 <6>[ 11.164836] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6442 20:15:47.416276 <6>[ 11.165331] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6443 20:15:47.422970 <6>[ 11.165467] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6444 20:15:47.429538 <6>[ 11.169906] Bluetooth: HCI UART protocol H4 registered
6445 20:15:47.442475 <6>[ 11.176280] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6446 20:15:47.449307 <6>[ 11.176460] usbcore: registered new interface driver uvcvideo
6447 20:15:47.455767 <6>[ 11.186665] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6448 20:15:47.462223 <6>[ 11.188602] Bluetooth: HCI UART protocol LL registered
6449 20:15:47.471965 <6>[ 11.197956] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6450 20:15:47.479205 <6>[ 11.198703] Bluetooth: HCI UART protocol Three-wire (H5) registered
6451 20:15:47.488629 <6>[ 11.205380] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6452 20:15:47.491670 <6>[ 11.210753] Bluetooth: HCI UART protocol Broadcom registered
6453 20:15:47.505126 <6>[ 11.215849] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6454 20:15:47.514070 <6>[ 11.220880] Bluetooth: HCI UART protocol QCA registered
6455 20:15:47.523176 <6>[ 11.222058] Bluetooth: hci0: setting up ROME/QCA6390
6456 20:15:47.535088 <6>[ 11.226029] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6457 20:15:47.541423 <6>[ 11.233474] Bluetooth: HCI UART protocol Marvell registered
6458 20:15:47.551240 <6>[ 11.237340] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6459 20:15:47.562986 <6>[ 11.237351] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6460 20:15:47.577109 <6>[ 11.237855] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6461 20:15:47.586946 <6>[ 11.386188] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6462 20:15:47.593979 <3>[ 11.431350] Bluetooth: hci0: Frame reassembly failed (-84)
6463 20:15:47.660984 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<4>[ 11.555853] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6464 20:15:47.663937 <4>[ 11.555853] Fallback method does not support PEC.
6465 20:15:47.667136 d-backlight.
6466 20:15:47.673514 <3>[ 11.560907] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6467 20:15:47.688583 [[0;32m OK [<3>[ 11.585046] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6468 20:15:47.695037 0m] Reached target [0;1;39msound.target[0m - Sound Card.
6469 20:15:47.707184 <3>[ 11.603116] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6470 20:15:47.724196 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Se<3>[ 11.619461] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6471 20:15:47.724595 t.
6472 20:15:47.732134 <3>[ 11.619917] power_supply sbs-12-000b: driver failed to report `health' property: -6
6473 20:15:47.741950 <3>[ 11.634657] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6474 20:15:47.759949 <3>[ 11.656114] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6475 20:15:47.778827 <3>[ 11.675335] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6476 20:15:47.795582 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0..<3>[ 11.690783] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6477 20:15:47.795717 .
6478 20:15:47.805388 <6>[ 11.705087] Bluetooth: hci0: QCA Product ID :0x00000008
6479 20:15:47.815641 <3>[ 11.709965] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6480 20:15:47.819082 <6>[ 11.710759] Bluetooth: hci0: QCA SOC Version :0x00000044
6481 20:15:47.833367 <6>[ 11.731588] Bluetooth: hci0: QCA ROM Version :0x00000302
6482 20:15:47.843227 Starting [0;1;39msyste<6>[ 11.739273] Bluetooth: hci0: QCA Patch Version:0x00000111
6483 20:15:47.849867 md-networkd.…ice[0m - Network<6>[ 11.748434] Bluetooth: hci0: QCA controller version 0x00440302
6484 20:15:47.852753 Configuration...
6485 20:15:47.859445 <6>[ 11.756973] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6486 20:15:47.869145 <4>[ 11.765722] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6487 20:15:47.880470 <3>[ 11.776701] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6488 20:15:47.887149 <3>[ 11.786808] Bluetooth: hci0: QCA Failed to download patch (-2)
6489 20:15:47.897289 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6490 20:15:47.931673 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6491 20:15:47.944572 <6>[ 11.840872] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6492 20:15:47.955032 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6493 20:15:47.972087 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6494 20:15:47.989987 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6495 20:15:48.009192 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6496 20:15:48.025539 [[0;32m OK [0m] Listening on<4>[ 11.924129] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6497 20:15:48.032352 [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6498 20:15:48.052045 [[0;32m OK [0m] Reached target [0;1;39msock<4>[ 11.948946] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6499 20:15:48.055447 ets.target[0m - Socket Units.
6500 20:15:48.071908 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Swit<4>[ 11.965823] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6501 20:15:48.072349 ch Status /dev/rfkill Watch.
6502 20:15:48.080107 <4>[ 11.980044] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6503 20:15:48.093131 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6504 20:15:48.145365 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6505 20:15:48.177590 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6506 20:15:48.196794 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6507 20:15:48.215052 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6508 20:15:48.259168 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6509 20:15:48.323331 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6510 20:15:48.346364 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6511 20:15:48.362928 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6512 20:15:48.383374 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6513 20:15:48.403762 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6514 20:15:48.453065 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6515 20:15:48.478483 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6516 20:15:48.500289 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6517 20:15:48.518347 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6518 20:15:48.538058 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6519 20:15:48.600292 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6520 20:15:48.636830 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6521 20:15:48.698838
6522 20:15:48.701526 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6523 20:15:48.701954
6524 20:15:48.704966 debian-bookworm-arm64 login: root (automatic login)
6525 20:15:48.705385
6526 20:15:48.725865 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024 aarch64
6527 20:15:48.726362
6528 20:15:48.732173 The programs included with the Debian GNU/Linux system are free software;
6529 20:15:48.738812 the exact distribution terms for each program are described in the
6530 20:15:48.742217 individual files in /usr/share/doc/*/copyright.
6531 20:15:48.742599
6532 20:15:48.748559 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6533 20:15:48.751754 permitted by applicable law.
6534 20:15:48.752975 Matched prompt #10: / #
6536 20:15:48.753952 Setting prompt string to ['/ #']
6537 20:15:48.754344 end: 2.2.5.1 login-action (duration 00:00:13) [common]
6539 20:15:48.755217 end: 2.2.5 auto-login-action (duration 00:00:13) [common]
6540 20:15:48.755603 start: 2.2.6 expect-shell-connection (timeout 00:03:41) [common]
6541 20:15:48.755925 Setting prompt string to ['/ #']
6542 20:15:48.756211 Forcing a shell prompt, looking for ['/ #']
6544 20:15:48.806957 / #
6545 20:15:48.807595 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6546 20:15:48.807964 Waiting using forced prompt support (timeout 00:02:30)
6547 20:15:48.813086
6548 20:15:48.813870 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6549 20:15:48.814334 start: 2.2.7 export-device-env (timeout 00:03:41) [common]
6550 20:15:48.814790 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6551 20:15:48.815224 end: 2.2 depthcharge-retry (duration 00:01:19) [common]
6552 20:15:48.815646 end: 2 depthcharge-action (duration 00:01:19) [common]
6553 20:15:48.816083 start: 3 lava-test-retry (timeout 00:08:19) [common]
6554 20:15:48.816499 start: 3.1 lava-test-shell (timeout 00:08:19) [common]
6555 20:15:48.816874 Using namespace: common
6557 20:15:48.917981 / # #
6558 20:15:48.918208 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6559 20:15:48.923657 #
6560 20:15:48.924087 Using /lava-14063112
6562 20:15:49.024698 / # export SHELL=/bin/sh
6563 20:15:49.030353 export SHELL=/bin/sh
6565 20:15:49.131578 / # . /lava-14063112/environment
6566 20:15:49.137345 . /lava-14063112/environment
6568 20:15:49.238985 / # /lava-14063112/bin/lava-test-runner /lava-14063112/0
6569 20:15:49.239626 Test shell timeout: 10s (minimum of the action and connection timeout)
6570 20:15:49.245916 /lava-14063112/bin/lava-test-runner /lava-14063112/0
6571 20:15:49.271104 + export TESTRUN_ID=0_v4l2-compliance-uvc
6572 20:15:49.274296 + cd /lava-14063112/0/tests/0_v4l2-compliance-uvc
6573 20:15:49.274732 + cat uuid
6574 20:15:49.277781 + UUID=14063112_1.5.2.3.1
6575 20:15:49.278214 + set +x
6576 20:15:49.284289 <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14063112_1.5.2.3.1>
6577 20:15:49.285001 Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14063112_1.5.2.3.1
6578 20:15:49.285378 Starting test lava.0_v4l2-compliance-uvc (14063112_1.5.2.3.1)
6579 20:15:49.285820 Skipping test definition patterns.
6580 20:15:49.287196 + /usr/bin/v4l2-parser.sh -d uvcvideo
6581 20:15:49.293795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>
6582 20:15:49.294188 device: /dev/video2
6583 20:15:49.294787 Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
6585 20:15:56.098111 v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t
6586 20:15:56.113813 v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54
6587 20:15:56.125631
6588 20:15:56.143263 Compliance test for uvcvideo device /dev/video2:
6589 20:15:56.155312
6590 20:15:56.170376 Driver Info:
6591 20:15:56.184765 Driver name : uvcvideo
6592 20:15:56.203314 Card type : HD WebCam: HD WebCam
6593 20:15:56.218192 Bus info : usb-11200000.usb-1.3
6594 20:15:56.229552 Driver version : 6.1.91
6595 20:15:56.243103 Capabilities : 0x84a00001
6596 20:15:56.262155 Metadata Capture
6597 20:15:56.275623 Streaming
6598 20:15:56.288804 Extended Pix Format
6599 20:15:56.305728 Device Capabilities
6600 20:15:56.320406 Device Caps : 0x04200001
6601 20:15:56.336502 Streaming
6602 20:15:56.351270 Extended Pix Format
6603 20:15:56.367688 Media Driver Info:
6604 20:15:56.383120 Driver name : uvcvideo
6605 20:15:56.399602 Model : HD WebCam: HD WebCam
6606 20:15:56.411342 Serial :
6607 20:15:56.429102 Bus info : usb-11200000.usb-1.3
6608 20:15:56.439876 Media version : 6.1.91
6609 20:15:56.457307 Hardware revision: 0x00003269 (12905)
6610 20:15:56.467545 Driver version : 6.1.91
6611 20:15:56.482234 Interface Info:
6612 20:15:56.501107 <LAVA_SIGNAL_TESTSET START Interface-Info>
6613 20:15:56.501936 Received signal: <TESTSET> START Interface-Info
6614 20:15:56.502420 Starting test_set Interface-Info
6615 20:15:56.504685 ID : 0x03000002
6616 20:15:56.515574 Type : V4L Video
6617 20:15:56.530183 Entity Info:
6618 20:15:56.539009 <LAVA_SIGNAL_TESTSET STOP>
6619 20:15:56.539655 Received signal: <TESTSET> STOP
6620 20:15:56.539996 Closing test_set Interface-Info
6621 20:15:56.548752 <LAVA_SIGNAL_TESTSET START Entity-Info>
6622 20:15:56.549388 Received signal: <TESTSET> START Entity-Info
6623 20:15:56.549761 Starting test_set Entity-Info
6624 20:15:56.551843 ID : 0x00000001 (1)
6625 20:15:56.568698 Name : HD WebCam: HD WebCam
6626 20:15:56.580960 Function : V4L2 I/O
6627 20:15:56.596506 Flags : default
6628 20:15:56.610602 Pad 0x01000007 : 0: Sink
6629 20:15:56.636233 Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable
6630 20:15:56.639706
6631 20:15:56.653515 Required ioctls:
6632 20:15:56.663138 <LAVA_SIGNAL_TESTSET STOP>
6633 20:15:56.663853 Received signal: <TESTSET> STOP
6634 20:15:56.664192 Closing test_set Entity-Info
6635 20:15:56.674605 <LAVA_SIGNAL_TESTSET START Required-ioctls>
6636 20:15:56.675249 Received signal: <TESTSET> START Required-ioctls
6637 20:15:56.675580 Starting test_set Required-ioctls
6638 20:15:56.678195 test MC information (see 'Media Driver Info' above): OK
6639 20:15:56.707300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>
6640 20:15:56.707950 Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
6642 20:15:56.710071 test VIDIOC_QUERYCAP: OK
6643 20:15:56.737077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6644 20:15:56.737880 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6646 20:15:56.740276 test invalid ioctls: OK
6647 20:15:56.766938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>
6648 20:15:56.767338
6649 20:15:56.767896 Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
6651 20:15:56.780034 Allow for multiple opens:
6652 20:15:56.789751 <LAVA_SIGNAL_TESTSET STOP>
6653 20:15:56.790393 Received signal: <TESTSET> STOP
6654 20:15:56.790739 Closing test_set Required-ioctls
6655 20:15:56.800396 <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>
6656 20:15:56.801052 Received signal: <TESTSET> START Allow-for-multiple-opens
6657 20:15:56.801423 Starting test_set Allow-for-multiple-opens
6658 20:15:56.803840 test second /dev/video2 open: OK
6659 20:15:56.830532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video2-open RESULT=pass>
6660 20:15:56.831180 Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video2-open RESULT=pass
6662 20:15:56.833473 test VIDIOC_QUERYCAP: OK
6663 20:15:56.861415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6664 20:15:56.862093 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6666 20:15:56.865170 test VIDIOC_G/S_PRIORITY: OK
6667 20:15:56.893059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>
6668 20:15:56.893795 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
6670 20:15:56.895832 test for unlimited opens: OK
6671 20:15:56.922873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>
6672 20:15:56.923272
6673 20:15:56.923829 Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
6675 20:15:56.939504 Debug ioctls:
6676 20:15:56.946972 <LAVA_SIGNAL_TESTSET STOP>
6677 20:15:56.947608 Received signal: <TESTSET> STOP
6678 20:15:56.947936 Closing test_set Allow-for-multiple-opens
6679 20:15:56.956377 <LAVA_SIGNAL_TESTSET START Debug-ioctls>
6680 20:15:56.957015 Received signal: <TESTSET> START Debug-ioctls
6681 20:15:56.957346 Starting test_set Debug-ioctls
6682 20:15:56.959960 test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
6683 20:15:56.989475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>
6684 20:15:56.990123 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
6686 20:15:56.995711 test VIDIOC_LOG_STATUS: OK (Not Supported)
6687 20:15:57.022738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>
6688 20:15:57.023137
6689 20:15:57.023690 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
6691 20:15:57.036144 Input ioctls:
6692 20:15:57.044666 <LAVA_SIGNAL_TESTSET STOP>
6693 20:15:57.045301 Received signal: <TESTSET> STOP
6694 20:15:57.045648 Closing test_set Debug-ioctls
6695 20:15:57.054165 <LAVA_SIGNAL_TESTSET START Input-ioctls>
6696 20:15:57.054859 Received signal: <TESTSET> START Input-ioctls
6697 20:15:57.055206 Starting test_set Input-ioctls
6698 20:15:57.057151 test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
6699 20:15:57.087248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>
6700 20:15:57.087943 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
6702 20:15:57.089891 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6703 20:15:57.110435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6704 20:15:57.111124 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6706 20:15:57.116565 test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
6707 20:15:57.140925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>
6708 20:15:57.141550 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
6710 20:15:57.147193 test VIDIOC_ENUMAUDIO: OK (Not Supported)
6711 20:15:57.171269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>
6712 20:15:57.171951 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
6714 20:15:57.174677 test VIDIOC_G/S/ENUMINPUT: OK
6715 20:15:57.203783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>
6716 20:15:57.204423 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
6718 20:15:57.210808 test VIDIOC_G/S_AUDIO: OK (Not Supported)
6719 20:15:57.234063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>
6720 20:15:57.234754 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
6722 20:15:57.236766 Inputs: 1 Audio Inputs: 0 Tuners: 0
6723 20:15:57.249792
6724 20:15:57.272233 test VIDIOC_G/S_MODULATOR: OK (Not Supported)
6725 20:15:57.301573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>
6726 20:15:57.302378 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
6728 20:15:57.308114 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6729 20:15:57.330346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6730 20:15:57.331034 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6732 20:15:57.337289 test VIDIOC_ENUMAUDOUT: OK (Not Supported)
6733 20:15:57.361882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>
6734 20:15:57.362566 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
6736 20:15:57.367878 test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
6737 20:15:57.391037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>
6738 20:15:57.391677 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
6740 20:15:57.397331 test VIDIOC_G/S_AUDOUT: OK (Not Supported)
6741 20:15:57.423677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>
6742 20:15:57.424366 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
6744 20:15:57.428116
6745 20:15:57.449982 test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
6746 20:15:57.476883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>
6747 20:15:57.477549 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
6749 20:15:57.483216 test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
6750 20:15:57.508573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>
6751 20:15:57.509246 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
6753 20:15:57.512122 test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
6754 20:15:57.536422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>
6755 20:15:57.537103 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
6757 20:15:57.543159 test VIDIOC_G/S_EDID: OK (Not Supported)
6758 20:15:57.568539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>
6759 20:15:57.568936
6760 20:15:57.569527 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
6762 20:15:57.585994 Control ioctls (Input 0):
6763 20:15:57.594684 <LAVA_SIGNAL_TESTSET STOP>
6764 20:15:57.595363 Received signal: <TESTSET> STOP
6765 20:15:57.595720 Closing test_set Input-ioctls
6766 20:15:57.606727 <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>
6767 20:15:57.607407 Received signal: <TESTSET> START Control-ioctls-Input-0
6768 20:15:57.607770 Starting test_set Control-ioctls-Input-0
6769 20:15:57.609531 test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
6770 20:15:57.638073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>
6771 20:15:57.638510 test VIDIOC_QUERYCTRL: OK
6772 20:15:57.639105 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
6774 20:15:57.664998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>
6775 20:15:57.665745 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
6777 20:15:57.668276 test VIDIOC_G/S_CTRL: OK
6778 20:15:57.696339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>
6779 20:15:57.697042 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
6781 20:15:57.699878 test VIDIOC_G/S/TRY_EXT_CTRLS: OK
6782 20:15:57.728778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>
6783 20:15:57.729484 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
6785 20:15:57.735442 test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
6786 20:15:57.762604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>
6787 20:15:57.763291 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
6789 20:15:57.765881 test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
6790 20:15:57.787788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>
6791 20:15:57.788470 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
6793 20:15:57.790942 Standard Controls: 15 Private Controls: 0
6794 20:15:57.802557
6795 20:15:57.817203 Format ioctls (Input 0):
6796 20:15:57.826426 <LAVA_SIGNAL_TESTSET STOP>
6797 20:15:57.827109 Received signal: <TESTSET> STOP
6798 20:15:57.827528 Closing test_set Control-ioctls-Input-0
6799 20:15:57.837697 <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>
6800 20:15:57.838378 Received signal: <TESTSET> START Format-ioctls-Input-0
6801 20:15:57.838740 Starting test_set Format-ioctls-Input-0
6802 20:15:57.840716 test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
6803 20:15:57.873559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>
6804 20:15:57.874249 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
6806 20:15:57.876396 test VIDIOC_G/S_PARM: OK
6807 20:15:57.902856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>
6808 20:15:57.903570 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
6810 20:15:57.905873 test VIDIOC_G_FBUF: OK (Not Supported)
6811 20:15:57.933196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>
6812 20:15:57.933874 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
6814 20:15:57.936167 test VIDIOC_G_FMT: OK
6815 20:15:57.960058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>
6816 20:15:57.960898 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
6818 20:15:57.963113 test VIDIOC_TRY_FMT: OK
6819 20:15:57.989203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>
6820 20:15:57.990050 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
6822 20:15:57.995813 warn: v4l2-test-formats.cpp(1046): Could not set fmt2
6823 20:15:58.005290 test VIDIOC_S_FMT: OK
6824 20:15:58.036092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>
6825 20:15:58.036874 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
6827 20:15:58.039587 test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
6828 20:15:58.072136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>
6829 20:15:58.072917 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
6831 20:15:58.075499 test Cropping: OK (Not Supported)
6832 20:15:58.102292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>
6833 20:15:58.102981 Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
6835 20:15:58.105475 test Composing: OK (Not Supported)
6836 20:15:58.130539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>
6837 20:15:58.131321 Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
6839 20:15:58.133893 test Scaling: OK (Not Supported)
6840 20:15:58.160585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>
6841 20:15:58.161090
6842 20:15:58.161820 Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
6844 20:15:58.171875 Codec ioctls (Input 0):
6845 20:15:58.181819 <LAVA_SIGNAL_TESTSET STOP>
6846 20:15:58.182656 Received signal: <TESTSET> STOP
6847 20:15:58.183151 Closing test_set Format-ioctls-Input-0
6848 20:15:58.192048 <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>
6849 20:15:58.192728 Received signal: <TESTSET> START Codec-ioctls-Input-0
6850 20:15:58.193102 Starting test_set Codec-ioctls-Input-0
6851 20:15:58.194853 test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
6852 20:15:58.223003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>
6853 20:15:58.223738 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
6855 20:15:58.229043 test VIDIOC_G_ENC_INDEX: OK (Not Supported)
6856 20:15:58.253905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>
6857 20:15:58.254608 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
6859 20:15:58.259996 test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
6860 20:15:58.286375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>
6861 20:15:58.287013 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
6863 20:15:58.289350
6864 20:15:58.300812 Buffer ioctls (Input 0):
6865 20:15:58.309481 <LAVA_SIGNAL_TESTSET STOP>
6866 20:15:58.310172 Received signal: <TESTSET> STOP
6867 20:15:58.310553 Closing test_set Codec-ioctls-Input-0
6868 20:15:58.320257 <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>
6869 20:15:58.320907 Received signal: <TESTSET> START Buffer-ioctls-Input-0
6870 20:15:58.321263 Starting test_set Buffer-ioctls-Input-0
6871 20:15:58.323146 test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
6872 20:15:58.357103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>
6873 20:15:58.357888 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
6875 20:15:58.360171 test CREATE_BUFS maximum buffers: OK
6876 20:15:58.384665 Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
6878 20:15:58.387608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>
6879 20:15:58.388001 test VIDIOC_EXPBUF: OK
6880 20:15:58.416539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>
6881 20:15:58.417345 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
6883 20:15:58.419496 test Requests: OK (Not Supported)
6884 20:15:58.445238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>
6885 20:15:58.445742
6886 20:15:58.446343 Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
6888 20:15:58.457947 Test input 0:
6889 20:15:58.469006
6890 20:15:58.486003 Streaming ioctls:
6891 20:15:58.494832 <LAVA_SIGNAL_TESTSET STOP>
6892 20:15:58.495516 Received signal: <TESTSET> STOP
6893 20:15:58.495877 Closing test_set Buffer-ioctls-Input-0
6894 20:15:58.505709 <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>
6895 20:15:58.506383 Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
6896 20:15:58.506739 Starting test_set Streaming-ioctls_Test-input-0
6897 20:15:58.508542 test read/write: OK (Not Supported)
6898 20:15:58.534469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>
6899 20:15:58.535151 Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
6901 20:15:58.537671 test blocking wait: OK
6902 20:15:58.565610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>
6903 20:15:58.566350 Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
6905 20:15:58.572237 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6906 20:15:58.580124 test MMAP (no poll): FAIL
6907 20:15:58.611812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>
6908 20:15:58.612516 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
6910 20:15:58.618668 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6911 20:15:58.627239 test MMAP (select): FAIL
6912 20:15:58.656137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>
6913 20:15:58.656821 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
6915 20:15:58.662141 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6916 20:15:58.671797 test MMAP (epoll): FAIL
6917 20:15:58.699273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>
6918 20:15:58.699716
6919 20:15:58.700415 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
6921 20:15:58.939110
6922 20:15:58.949903 test USERPTR (no poll): OK
6923 20:15:58.980991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>
6924 20:15:58.981447
6925 20:15:58.982067 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
6927 20:15:59.214565
6928 20:15:59.225676 test USERPTR (select): OK
6929 20:15:59.257387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>
6930 20:15:59.258109 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
6932 20:15:59.263612 test DMABUF: Cannot test, specify --expbuf-device
6933 20:15:59.271696
6934 20:15:59.292367 Total for uvcvideo device /dev/video2: 54, Succeeded: 51, Failed: 3, Warnings: 1
6935 20:15:59.297307 <LAVA_TEST_RUNNER EXIT>
6936 20:15:59.298071 ok: lava_test_shell seems to have completed
6937 20:15:59.298454 Marking unfinished test run as failed
6939 20:15:59.303228 CREATE_BUFS-maximum-buffers:
result: pass
set: Buffer-ioctls-Input-0
Composing:
result: pass
set: Format-ioctls-Input-0
Cropping:
result: pass
set: Format-ioctls-Input-0
MC-information-see-Media-Driver-Info-above:
result: pass
set: Required-ioctls
MMAP-epoll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-no-poll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-select:
result: fail
set: Streaming-ioctls_Test-input-0
Requests:
result: pass
set: Buffer-ioctls-Input-0
Scaling:
result: pass
set: Format-ioctls-Input-0
USERPTR-no-poll:
result: pass
set: Streaming-ioctls_Test-input-0
USERPTR-select:
result: pass
set: Streaming-ioctls_Test-input-0
VIDIOC_DBG_G/S_REGISTER:
result: pass
set: Debug-ioctls
VIDIOC_DV_TIMINGS_CAP:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_STD:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDIO:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDOUT:
result: pass
set: Input-ioctls
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
result: pass
set: Format-ioctls-Input-0
VIDIOC_EXPBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_G/S/ENUMINPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/ENUMOUTPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/TRY_EXT_CTRLS:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_AUDIO:
result: pass
set: Input-ioctls
VIDIOC_G/S_AUDOUT:
result: pass
set: Input-ioctls
VIDIOC_G/S_CTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_EDID:
result: pass
set: Input-ioctls
VIDIOC_G/S_FREQUENCY:
result: pass
set: Input-ioctls
VIDIOC_G/S_JPEGCOMP:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_MODULATOR:
result: pass
set: Input-ioctls
VIDIOC_G/S_PARM:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G/S_PRIORITY:
result: pass
set: Allow-for-multiple-opens
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
result: pass
set: Input-ioctls
VIDIOC_G_ENC_INDEX:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_G_FBUF:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_SLICED_VBI_CAP:
result: pass
set: Format-ioctls-Input-0
VIDIOC_LOG_STATUS:
result: pass
set: Debug-ioctls
VIDIOC_QUERYCAP:
result: pass
set: Allow-for-multiple-opens
VIDIOC_QUERYCTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
result: pass
set: Control-ioctls-Input-0
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_S_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_S_HW_FREQ_SEEK:
result: pass
set: Input-ioctls
VIDIOC_TRY_DECODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_ENCODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
result: pass
set: Control-ioctls-Input-0
blocking-wait:
result: pass
set: Streaming-ioctls_Test-input-0
device-presence: pass
for-unlimited-opens:
result: pass
set: Allow-for-multiple-opens
invalid-ioctls:
result: pass
set: Required-ioctls
read/write:
result: pass
set: Streaming-ioctls_Test-input-0
second-/dev/video2-open:
result: pass
set: Allow-for-multiple-opens
6940 20:15:59.303835 end: 3.1 lava-test-shell (duration 00:00:10) [common]
6941 20:15:59.304283 end: 3 lava-test-retry (duration 00:00:10) [common]
6942 20:15:59.304731 start: 4 finalize (timeout 00:08:08) [common]
6943 20:15:59.305184 start: 4.1 power-off (timeout 00:00:30) [common]
6944 20:15:59.306012 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6945 20:16:00.557486 >> Command sent successfully.
6946 20:16:00.567627 Returned 0 in 1 seconds
6947 20:16:00.668797 end: 4.1 power-off (duration 00:00:01) [common]
6949 20:16:00.670201 start: 4.2 read-feedback (timeout 00:08:07) [common]
6950 20:16:00.671396 Listened to connection for namespace 'common' for up to 1s
6951 20:16:01.672082 Finalising connection for namespace 'common'
6952 20:16:01.672737 Disconnecting from shell: Finalise
6953 20:16:01.673111 / #
6954 20:16:01.773970 end: 4.2 read-feedback (duration 00:00:01) [common]
6955 20:16:01.774591 end: 4 finalize (duration 00:00:02) [common]
6956 20:16:01.775161 Cleaning after the job
6957 20:16:01.775641 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/ramdisk
6958 20:16:01.793847 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/kernel
6959 20:16:01.826447 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/dtb
6960 20:16:01.826747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063112/tftp-deploy-qk70arxa/modules
6961 20:16:01.834187 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14063112
6962 20:16:01.902514 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14063112
6963 20:16:01.902709 Job finished correctly