Boot log: mt8183-kukui-jacuzzi-juniper-sku16

    1 20:14:07.403391  lava-dispatcher, installed at version: 2024.03
    2 20:14:07.403594  start: 0 validate
    3 20:14:07.403727  Start time: 2024-05-28 20:14:07.403719+00:00 (UTC)
    4 20:14:07.403859  Using caching service: 'http://localhost/cache/?uri=%s'
    5 20:14:07.403996  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 20:14:07.665331  Using caching service: 'http://localhost/cache/?uri=%s'
    7 20:14:07.666059  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 20:14:07.918941  Using caching service: 'http://localhost/cache/?uri=%s'
    9 20:14:07.919737  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
   10 20:14:08.181628  Using caching service: 'http://localhost/cache/?uri=%s'
   11 20:14:08.182312  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 20:14:08.436442  Using caching service: 'http://localhost/cache/?uri=%s'
   13 20:14:08.437352  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   14 20:14:08.707500  validate duration: 1.30
   16 20:14:08.708775  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 20:14:08.709346  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 20:14:08.709802  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 20:14:08.710363  Not decompressing ramdisk as can be used compressed.
   20 20:14:08.710802  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
   21 20:14:08.711230  saving as /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/ramdisk/initrd.cpio.gz
   22 20:14:08.711615  total size: 5628169 (5 MB)
   23 20:14:08.716534  progress   0 % (0 MB)
   24 20:14:08.725073  progress   5 % (0 MB)
   25 20:14:08.731943  progress  10 % (0 MB)
   26 20:14:08.736287  progress  15 % (0 MB)
   27 20:14:08.740289  progress  20 % (1 MB)
   28 20:14:08.743446  progress  25 % (1 MB)
   29 20:14:08.746406  progress  30 % (1 MB)
   30 20:14:08.749233  progress  35 % (1 MB)
   31 20:14:08.751413  progress  40 % (2 MB)
   32 20:14:08.753908  progress  45 % (2 MB)
   33 20:14:08.755937  progress  50 % (2 MB)
   34 20:14:08.758077  progress  55 % (2 MB)
   35 20:14:08.760108  progress  60 % (3 MB)
   36 20:14:08.761806  progress  65 % (3 MB)
   37 20:14:08.763705  progress  70 % (3 MB)
   38 20:14:08.765269  progress  75 % (4 MB)
   39 20:14:08.766963  progress  80 % (4 MB)
   40 20:14:08.768473  progress  85 % (4 MB)
   41 20:14:08.770128  progress  90 % (4 MB)
   42 20:14:08.771673  progress  95 % (5 MB)
   43 20:14:08.773067  progress 100 % (5 MB)
   44 20:14:08.773284  5 MB downloaded in 0.06 s (87.01 MB/s)
   45 20:14:08.773445  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 20:14:08.773688  end: 1.1 download-retry (duration 00:00:00) [common]
   48 20:14:08.773775  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 20:14:08.773860  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 20:14:08.774006  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   51 20:14:08.774092  saving as /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/kernel/Image
   52 20:14:08.774154  total size: 54682112 (52 MB)
   53 20:14:08.774215  No compression specified
   54 20:14:08.775324  progress   0 % (0 MB)
   55 20:14:08.789089  progress   5 % (2 MB)
   56 20:14:08.802868  progress  10 % (5 MB)
   57 20:14:08.816916  progress  15 % (7 MB)
   58 20:14:08.831064  progress  20 % (10 MB)
   59 20:14:08.845350  progress  25 % (13 MB)
   60 20:14:08.859680  progress  30 % (15 MB)
   61 20:14:08.874152  progress  35 % (18 MB)
   62 20:14:08.888289  progress  40 % (20 MB)
   63 20:14:08.902406  progress  45 % (23 MB)
   64 20:14:08.916639  progress  50 % (26 MB)
   65 20:14:08.930426  progress  55 % (28 MB)
   66 20:14:08.944331  progress  60 % (31 MB)
   67 20:14:08.958237  progress  65 % (33 MB)
   68 20:14:08.972198  progress  70 % (36 MB)
   69 20:14:08.985951  progress  75 % (39 MB)
   70 20:14:08.999873  progress  80 % (41 MB)
   71 20:14:09.013723  progress  85 % (44 MB)
   72 20:14:09.027326  progress  90 % (46 MB)
   73 20:14:09.040975  progress  95 % (49 MB)
   74 20:14:09.054346  progress 100 % (52 MB)
   75 20:14:09.054576  52 MB downloaded in 0.28 s (185.97 MB/s)
   76 20:14:09.054725  end: 1.2.1 http-download (duration 00:00:00) [common]
   78 20:14:09.054953  end: 1.2 download-retry (duration 00:00:00) [common]
   79 20:14:09.055088  start: 1.3 download-retry (timeout 00:10:00) [common]
   80 20:14:09.055177  start: 1.3.1 http-download (timeout 00:10:00) [common]
   81 20:14:09.055311  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   82 20:14:09.055380  saving as /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   83 20:14:09.055441  total size: 57695 (0 MB)
   84 20:14:09.055501  No compression specified
   85 20:14:09.056557  progress  56 % (0 MB)
   86 20:14:09.056853  progress 100 % (0 MB)
   87 20:14:09.057051  0 MB downloaded in 0.00 s (34.22 MB/s)
   88 20:14:09.057170  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 20:14:09.057410  end: 1.3 download-retry (duration 00:00:00) [common]
   91 20:14:09.057495  start: 1.4 download-retry (timeout 00:10:00) [common]
   92 20:14:09.057577  start: 1.4.1 http-download (timeout 00:10:00) [common]
   93 20:14:09.057684  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
   94 20:14:09.057751  saving as /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/nfsrootfs/full.rootfs.tar
   95 20:14:09.057809  total size: 120894716 (115 MB)
   96 20:14:09.057870  Using unxz to decompress xz
   97 20:14:09.062322  progress   0 % (0 MB)
   98 20:14:09.413433  progress   5 % (5 MB)
   99 20:14:09.771755  progress  10 % (11 MB)
  100 20:14:10.123397  progress  15 % (17 MB)
  101 20:14:10.457822  progress  20 % (23 MB)
  102 20:14:10.750869  progress  25 % (28 MB)
  103 20:14:11.106659  progress  30 % (34 MB)
  104 20:14:11.443533  progress  35 % (40 MB)
  105 20:14:11.608651  progress  40 % (46 MB)
  106 20:14:11.787716  progress  45 % (51 MB)
  107 20:14:12.110859  progress  50 % (57 MB)
  108 20:14:12.497691  progress  55 % (63 MB)
  109 20:14:12.846595  progress  60 % (69 MB)
  110 20:14:13.190746  progress  65 % (74 MB)
  111 20:14:13.538601  progress  70 % (80 MB)
  112 20:14:13.898658  progress  75 % (86 MB)
  113 20:14:14.238918  progress  80 % (92 MB)
  114 20:14:14.578977  progress  85 % (98 MB)
  115 20:14:14.949611  progress  90 % (103 MB)
  116 20:14:15.285391  progress  95 % (109 MB)
  117 20:14:15.647857  progress 100 % (115 MB)
  118 20:14:15.653149  115 MB downloaded in 6.60 s (17.48 MB/s)
  119 20:14:15.653493  end: 1.4.1 http-download (duration 00:00:07) [common]
  121 20:14:15.653911  end: 1.4 download-retry (duration 00:00:07) [common]
  122 20:14:15.654007  start: 1.5 download-retry (timeout 00:09:53) [common]
  123 20:14:15.654095  start: 1.5.1 http-download (timeout 00:09:53) [common]
  124 20:14:15.654251  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
  125 20:14:15.654323  saving as /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/modules/modules.tar
  126 20:14:15.654385  total size: 8607916 (8 MB)
  127 20:14:15.654449  Using unxz to decompress xz
  128 20:14:15.658726  progress   0 % (0 MB)
  129 20:14:15.678619  progress   5 % (0 MB)
  130 20:14:15.703772  progress  10 % (0 MB)
  131 20:14:15.729317  progress  15 % (1 MB)
  132 20:14:15.754127  progress  20 % (1 MB)
  133 20:14:15.779728  progress  25 % (2 MB)
  134 20:14:15.804933  progress  30 % (2 MB)
  135 20:14:15.828990  progress  35 % (2 MB)
  136 20:14:15.855703  progress  40 % (3 MB)
  137 20:14:15.880736  progress  45 % (3 MB)
  138 20:14:15.905186  progress  50 % (4 MB)
  139 20:14:15.930572  progress  55 % (4 MB)
  140 20:14:15.955464  progress  60 % (4 MB)
  141 20:14:15.979680  progress  65 % (5 MB)
  142 20:14:16.006422  progress  70 % (5 MB)
  143 20:14:16.034258  progress  75 % (6 MB)
  144 20:14:16.058447  progress  80 % (6 MB)
  145 20:14:16.082694  progress  85 % (7 MB)
  146 20:14:16.106472  progress  90 % (7 MB)
  147 20:14:16.135820  progress  95 % (7 MB)
  148 20:14:16.164795  progress 100 % (8 MB)
  149 20:14:16.170673  8 MB downloaded in 0.52 s (15.90 MB/s)
  150 20:14:16.170981  end: 1.5.1 http-download (duration 00:00:01) [common]
  152 20:14:16.171375  end: 1.5 download-retry (duration 00:00:01) [common]
  153 20:14:16.171503  start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
  154 20:14:16.171628  start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
  155 20:14:19.979062  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7
  156 20:14:19.979256  end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
  157 20:14:19.979361  start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
  158 20:14:19.979539  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2
  159 20:14:19.979668  makedir: /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin
  160 20:14:19.979769  makedir: /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/tests
  161 20:14:19.979872  makedir: /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/results
  162 20:14:19.979980  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-add-keys
  163 20:14:19.980120  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-add-sources
  164 20:14:19.980245  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-background-process-start
  165 20:14:19.980377  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-background-process-stop
  166 20:14:19.980501  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-common-functions
  167 20:14:19.980621  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-echo-ipv4
  168 20:14:19.980745  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-install-packages
  169 20:14:19.980873  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-installed-packages
  170 20:14:19.980996  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-os-build
  171 20:14:19.981127  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-probe-channel
  172 20:14:19.981249  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-probe-ip
  173 20:14:19.981581  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-target-ip
  174 20:14:19.981718  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-target-mac
  175 20:14:19.981844  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-target-storage
  176 20:14:19.981976  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-case
  177 20:14:19.982099  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-event
  178 20:14:19.982219  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-feedback
  179 20:14:19.982339  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-raise
  180 20:14:19.982474  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-reference
  181 20:14:19.982606  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-runner
  182 20:14:19.982732  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-set
  183 20:14:19.982855  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-test-shell
  184 20:14:19.982993  Updating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-add-keys (debian)
  185 20:14:19.983143  Updating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-add-sources (debian)
  186 20:14:19.983279  Updating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-install-packages (debian)
  187 20:14:19.983413  Updating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-installed-packages (debian)
  188 20:14:19.983554  Updating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/bin/lava-os-build (debian)
  189 20:14:19.983670  Creating /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/environment
  190 20:14:19.983773  LAVA metadata
  191 20:14:19.983838  - LAVA_JOB_ID=14063130
  192 20:14:19.983898  - LAVA_DISPATCHER_IP=192.168.201.1
  193 20:14:19.984005  start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  194 20:14:19.984070  skipped lava-vland-overlay
  195 20:14:19.984141  end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
  196 20:14:19.984219  start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  197 20:14:19.984278  skipped lava-multinode-overlay
  198 20:14:19.984346  end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  199 20:14:19.984422  start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
  200 20:14:19.984547  Loading test definitions
  201 20:14:19.984633  start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  202 20:14:19.984702  Using /lava-14063130 at stage 0
  203 20:14:19.984984  uuid=14063130_1.6.2.3.1 testdef=None
  204 20:14:19.985077  end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
  205 20:14:19.985158  start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
  206 20:14:19.985642  end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
  208 20:14:19.985862  start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  209 20:14:19.986414  end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
  211 20:14:19.986647  start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  212 20:14:19.987166  runner path: /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/0/tests/0_timesync-off test_uuid 14063130_1.6.2.3.1
  213 20:14:19.987336  end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  215 20:14:19.987558  start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
  216 20:14:19.987628  Using /lava-14063130 at stage 0
  217 20:14:19.987729  Fetching tests from https://github.com/kernelci/test-definitions.git
  218 20:14:19.987814  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/0/tests/1_kselftest-rtc'
  219 20:14:21.938166  Running '/usr/bin/git checkout kernelci.org
  220 20:14:22.086139  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
  221 20:14:22.086880  uuid=14063130_1.6.2.3.5 testdef=None
  222 20:14:22.087041  end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
  224 20:14:22.087290  start: 1.6.2.3.6 test-overlay (timeout 00:09:47) [common]
  225 20:14:22.088061  end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
  227 20:14:22.088298  start: 1.6.2.3.7 test-install-overlay (timeout 00:09:47) [common]
  228 20:14:22.089343  end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
  230 20:14:22.089583  start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
  231 20:14:22.090557  runner path: /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/0/tests/1_kselftest-rtc test_uuid 14063130_1.6.2.3.5
  232 20:14:22.090648  BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
  233 20:14:22.090712  BRANCH='cip'
  234 20:14:22.090777  SKIPFILE='/dev/null'
  235 20:14:22.090836  SKIP_INSTALL='True'
  236 20:14:22.090892  TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
  237 20:14:22.090950  TST_CASENAME=''
  238 20:14:22.091005  TST_CMDFILES='rtc'
  239 20:14:22.091152  end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  241 20:14:22.091365  Creating lava-test-runner.conf files
  242 20:14:22.091429  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14063130/lava-overlay-mpdsspr2/lava-14063130/0 for stage 0
  243 20:14:22.091520  - 0_timesync-off
  244 20:14:22.091588  - 1_kselftest-rtc
  245 20:14:22.091679  end: 1.6.2.3 test-definition (duration 00:00:02) [common]
  246 20:14:22.091766  start: 1.6.2.4 compress-overlay (timeout 00:09:47) [common]
  247 20:14:29.716544  end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
  248 20:14:29.716712  start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
  249 20:14:29.716805  end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  250 20:14:29.716911  end: 1.6.2 lava-overlay (duration 00:00:10) [common]
  251 20:14:29.717002  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
  252 20:14:29.883660  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  253 20:14:29.884043  start: 1.6.4 extract-modules (timeout 00:09:39) [common]
  254 20:14:29.884154  extracting modules file /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7
  255 20:14:30.107231  extracting modules file /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063130/extract-overlay-ramdisk-ix173w0j/ramdisk
  256 20:14:30.326546  end: 1.6.4 extract-modules (duration 00:00:00) [common]
  257 20:14:30.326722  start: 1.6.5 apply-overlay-tftp (timeout 00:09:38) [common]
  258 20:14:30.326821  [common] Applying overlay to NFS
  259 20:14:30.326889  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063130/compress-overlay-v0htz5ea/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7
  260 20:14:31.268462  end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
  261 20:14:31.268629  start: 1.6.6 configure-preseed-file (timeout 00:09:37) [common]
  262 20:14:31.268728  end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
  263 20:14:31.268829  start: 1.6.7 compress-ramdisk (timeout 00:09:37) [common]
  264 20:14:31.268913  Building ramdisk /var/lib/lava/dispatcher/tmp/14063130/extract-overlay-ramdisk-ix173w0j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14063130/extract-overlay-ramdisk-ix173w0j/ramdisk
  265 20:14:31.601915  >> 130335 blocks

  266 20:14:33.695577  rename /var/lib/lava/dispatcher/tmp/14063130/extract-overlay-ramdisk-ix173w0j/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/ramdisk/ramdisk.cpio.gz
  267 20:14:33.696054  end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
  268 20:14:33.696209  start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
  269 20:14:33.696345  start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
  270 20:14:33.696484  Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/kernel/Image']
  271 20:14:47.029442  Returned 0 in 13 seconds
  272 20:14:47.130290  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/kernel/image.itb
  273 20:14:47.544317  output: FIT description: Kernel Image image with one or more FDT blobs
  274 20:14:47.544719  output: Created:         Tue May 28 21:14:47 2024
  275 20:14:47.544798  output:  Image 0 (kernel-1)
  276 20:14:47.544864  output:   Description:  
  277 20:14:47.544927  output:   Created:      Tue May 28 21:14:47 2024
  278 20:14:47.544992  output:   Type:         Kernel Image
  279 20:14:47.545052  output:   Compression:  lzma compressed
  280 20:14:47.545149  output:   Data Size:    13061303 Bytes = 12755.18 KiB = 12.46 MiB
  281 20:14:47.545241  output:   Architecture: AArch64
  282 20:14:47.545343  output:   OS:           Linux
  283 20:14:47.545402  output:   Load Address: 0x00000000
  284 20:14:47.545460  output:   Entry Point:  0x00000000
  285 20:14:47.545517  output:   Hash algo:    crc32
  286 20:14:47.545572  output:   Hash value:   0578ee26
  287 20:14:47.545650  output:  Image 1 (fdt-1)
  288 20:14:47.545708  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  289 20:14:47.545761  output:   Created:      Tue May 28 21:14:47 2024
  290 20:14:47.545818  output:   Type:         Flat Device Tree
  291 20:14:47.545895  output:   Compression:  uncompressed
  292 20:14:47.545970  output:   Data Size:    57695 Bytes = 56.34 KiB = 0.06 MiB
  293 20:14:47.546063  output:   Architecture: AArch64
  294 20:14:47.546157  output:   Hash algo:    crc32
  295 20:14:47.546280  output:   Hash value:   a9713552
  296 20:14:47.546362  output:  Image 2 (ramdisk-1)
  297 20:14:47.546444  output:   Description:  unavailable
  298 20:14:47.546525  output:   Created:      Tue May 28 21:14:47 2024
  299 20:14:47.546616  output:   Type:         RAMDisk Image
  300 20:14:47.546699  output:   Compression:  Unknown Compression
  301 20:14:47.546780  output:   Data Size:    18723743 Bytes = 18284.91 KiB = 17.86 MiB
  302 20:14:47.546863  output:   Architecture: AArch64
  303 20:14:47.546944  output:   OS:           Linux
  304 20:14:47.547025  output:   Load Address: unavailable
  305 20:14:47.547106  output:   Entry Point:  unavailable
  306 20:14:47.547167  output:   Hash algo:    crc32
  307 20:14:47.547223  output:   Hash value:   1c53e3db
  308 20:14:47.547275  output:  Default Configuration: 'conf-1'
  309 20:14:47.547327  output:  Configuration 0 (conf-1)
  310 20:14:47.547379  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  311 20:14:47.547430  output:   Kernel:       kernel-1
  312 20:14:47.547482  output:   Init Ramdisk: ramdisk-1
  313 20:14:47.547533  output:   FDT:          fdt-1
  314 20:14:47.547584  output:   Loadables:    kernel-1
  315 20:14:47.547640  output: 
  316 20:14:47.547851  end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
  317 20:14:47.547952  end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
  318 20:14:47.548059  end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
  319 20:14:47.548151  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:21) [common]
  320 20:14:47.548232  No LXC device requested
  321 20:14:47.548309  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  322 20:14:47.548395  start: 1.8 deploy-device-env (timeout 00:09:21) [common]
  323 20:14:47.548472  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  324 20:14:47.548539  Checking files for TFTP limit of 4294967296 bytes.
  325 20:14:47.549154  end: 1 tftp-deploy (duration 00:00:39) [common]
  326 20:14:47.549313  start: 2 depthcharge-action (timeout 00:05:00) [common]
  327 20:14:47.549417  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  328 20:14:47.549545  substitutions:
  329 20:14:47.549613  - {DTB}: 14063130/tftp-deploy-wlzgvhaf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
  330 20:14:47.549678  - {INITRD}: 14063130/tftp-deploy-wlzgvhaf/ramdisk/ramdisk.cpio.gz
  331 20:14:47.549737  - {KERNEL}: 14063130/tftp-deploy-wlzgvhaf/kernel/Image
  332 20:14:47.549795  - {LAVA_MAC}: None
  333 20:14:47.549855  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7
  334 20:14:47.549913  - {NFS_SERVER_IP}: 192.168.201.1
  335 20:14:47.549967  - {PRESEED_CONFIG}: None
  336 20:14:47.550021  - {PRESEED_LOCAL}: None
  337 20:14:47.550075  - {RAMDISK}: 14063130/tftp-deploy-wlzgvhaf/ramdisk/ramdisk.cpio.gz
  338 20:14:47.550129  - {ROOT_PART}: None
  339 20:14:47.550181  - {ROOT}: None
  340 20:14:47.550234  - {SERVER_IP}: 192.168.201.1
  341 20:14:47.550288  - {TEE}: None
  342 20:14:47.550340  Parsed boot commands:
  343 20:14:47.550393  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  344 20:14:47.550575  Parsed boot commands: tftpboot 192.168.201.1 14063130/tftp-deploy-wlzgvhaf/kernel/image.itb 14063130/tftp-deploy-wlzgvhaf/kernel/cmdline 
  345 20:14:47.550663  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  346 20:14:47.550805  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  347 20:14:47.550971  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  348 20:14:47.551107  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  349 20:14:47.551215  Not connected, no need to disconnect.
  350 20:14:47.551357  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  351 20:14:47.551447  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  352 20:14:47.551518  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
  353 20:14:47.555399  Setting prompt string to ['lava-test: # ']
  354 20:14:47.555766  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  355 20:14:47.555888  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  356 20:14:47.556044  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  357 20:14:47.556185  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  358 20:14:47.556418  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
  359 20:15:11.434105  Returned 0 in 23 seconds
  360 20:15:11.534821  end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
  362 20:15:11.535253  end: 2.2.2 reset-device (duration 00:00:24) [common]
  363 20:15:11.535384  start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
  364 20:15:11.535501  Setting prompt string to 'Starting depthcharge on Juniper...'
  365 20:15:11.535598  Changing prompt to 'Starting depthcharge on Juniper...'
  366 20:15:11.535696  depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
  367 20:15:11.536268  [Enter `^Ec?' for help]

  368 20:15:11.536373  [DL] 00000000 00000000 010701

  369 20:15:11.536468  

  370 20:15:11.536557  

  371 20:15:11.536650  F0: 102B 0000

  372 20:15:11.536743  

  373 20:15:11.536844  F3: 1006 0033 [0200]

  374 20:15:11.536933  

  375 20:15:11.537034  F3: 4001 00E0 [0200]

  376 20:15:11.537121  

  377 20:15:11.537204  F3: 0000 0000

  378 20:15:11.537313  

  379 20:15:11.537410  V0: 0000 0000 [0001]

  380 20:15:11.537495  

  381 20:15:11.537578  00: 1027 0002

  382 20:15:11.537664  

  383 20:15:11.537746  01: 0000 0000

  384 20:15:11.537830  

  385 20:15:11.537911  BP: 0C00 0251 [0000]

  386 20:15:11.537993  

  387 20:15:11.538074  G0: 1182 0000

  388 20:15:11.538155  

  389 20:15:11.538236  EC: 0004 0000 [0001]

  390 20:15:11.538317  

  391 20:15:11.538379  S7: 0000 0000 [0000]

  392 20:15:11.538435  

  393 20:15:11.538491  CC: 0000 0000 [0001]

  394 20:15:11.538557  

  395 20:15:11.538641  T0: 0000 00DB [000F]

  396 20:15:11.538727  

  397 20:15:11.538808  Jump to BL

  398 20:15:11.538889  

  399 20:15:11.538971  


  400 20:15:11.539054  

  401 20:15:11.539137  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...

  402 20:15:11.539225  ARM64: Exception handlers installed.

  403 20:15:11.539308  ARM64: Testing exception

  404 20:15:11.539390  ARM64: Done test exception

  405 20:15:11.539472  WDT: Last reset was cold boot

  406 20:15:11.539554  SPI0(PAD0) initialized at 992727 Hz

  407 20:15:11.539639  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

  408 20:15:11.539721  Manufacturer: ef

  409 20:15:11.539804  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  410 20:15:11.539886  Probing TPM: . done!

  411 20:15:11.539967  TPM ready after 0 ms

  412 20:15:11.540050  Connected to device vid:did:rid of 1ae0:0028:00

  413 20:15:11.540135  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c

  414 20:15:11.540219  Initialized TPM device CR50 revision 0

  415 20:15:11.540304  tlcl_send_startup: Startup return code is 0

  416 20:15:11.540382  TPM: setup succeeded

  417 20:15:11.540468  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  418 20:15:11.540551  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  419 20:15:11.540634  in-header: 03 19 00 00 08 00 00 00 

  420 20:15:11.540715  in-data: a2 e0 47 00 13 00 00 00 

  421 20:15:11.540797  Chrome EC: UHEPI supported

  422 20:15:11.540880  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  423 20:15:11.540963  in-header: 03 a1 00 00 08 00 00 00 

  424 20:15:11.541045  in-data: 84 60 60 10 00 00 00 00 

  425 20:15:11.541126  Phase 1

  426 20:15:11.541208  FMAP: area GBB found @ 3f5000 (12032 bytes)

  427 20:15:11.541336  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  428 20:15:11.541392  VB2:vb2_check_recovery() Recovery was requested manually

  429 20:15:11.541444  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0

  430 20:15:11.541497  Recovery requested (1009000e)

  431 20:15:11.541549  tlcl_extend: response is 0

  432 20:15:11.541601  tlcl_extend: response is 0

  433 20:15:11.541653  

  434 20:15:11.541718  

  435 20:15:11.541776  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...

  436 20:15:11.541839  ARM64: Exception handlers installed.

  437 20:15:11.541924  ARM64: Testing exception

  438 20:15:11.542009  ARM64: Done test exception

  439 20:15:11.542093  [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x200b

  440 20:15:11.542176  [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2

  441 20:15:11.542258  [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a

  442 20:15:11.542341  [RTC]rtc_get_frequency_meter,134: input=0xf, output=864

  443 20:15:11.542423  [RTC]rtc_get_frequency_meter,134: input=0x7, output=734

  444 20:15:11.542508  [RTC]rtc_get_frequency_meter,134: input=0xb, output=796

  445 20:15:11.542592  [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b

  446 20:15:11.542674  [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482

  447 20:15:11.542758  [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1

  448 20:15:11.542841  [RTC]rtc_bbpu_power_on,376: done BBPU=0x9

  449 20:15:11.542924  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  450 20:15:11.543006  in-header: 03 19 00 00 08 00 00 00 

  451 20:15:11.543088  in-data: a2 e0 47 00 13 00 00 00 

  452 20:15:11.543169  Chrome EC: UHEPI supported

  453 20:15:11.543252  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  454 20:15:11.543337  in-header: 03 a1 00 00 08 00 00 00 

  455 20:15:11.543423  in-data: 84 60 60 10 00 00 00 00 

  456 20:15:11.543505  Skip loading cached calibration data

  457 20:15:11.543588  out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 

  458 20:15:11.543672  in-header: 03 a1 00 00 08 00 00 00 

  459 20:15:11.543756  in-data: 84 60 60 10 00 00 00 00 

  460 20:15:11.543841  out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 

  461 20:15:11.543925  in-header: 03 a1 00 00 08 00 00 00 

  462 20:15:11.544007  in-data: 84 60 60 10 00 00 00 00 

  463 20:15:11.544103  ADC[3]: Raw value=1037476 ID=8

  464 20:15:11.544187  Manufacturer: ef

  465 20:15:11.544271  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  466 20:15:11.544354  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  467 20:15:11.544436  CBFS @ 21000 size 3d4000

  468 20:15:11.544491  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  469 20:15:11.544543  CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'

  470 20:15:11.544595  CBFS: Found @ offset 3c880 size 4b

  471 20:15:11.544665  DRAM-K: Full Calibration

  472 20:15:11.544747  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  473 20:15:11.544833  CBFS @ 21000 size 3d4000

  474 20:15:11.544916  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  475 20:15:11.544998  CBFS: Locating 'fallback/dram'

  476 20:15:11.545081  CBFS: Found @ offset 24b00 size 12268

  477 20:15:11.545164  read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps

  478 20:15:11.545248  ddr_geometry: 1, config: 0x0

  479 20:15:11.545347  header.status = 0x0

  480 20:15:11.545401  header.magic = 0x44524d4b (expected: 0x44524d4b)

  481 20:15:11.545454  header.version = 0x5 (expected: 0x5)

  482 20:15:11.545506  header.size = 0x8f0 (expected: 0x8f0)

  483 20:15:11.545558  header.config = 0x0

  484 20:15:11.545615  header.flags = 0x0

  485 20:15:11.545667  header.checksum = 0x0

  486 20:15:11.545718  dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5

  487 20:15:11.545771  Set DRAM voltage: vdram1 = 1125000, vddq = 600000

  488 20:15:11.546014  Get DRAM voltage to vdram1 = 1125000, vddq = 600000

  489 20:15:11.546143  ddr_geometry:1

  490 20:15:11.546228  [EMI] new MDL number = 1

  491 20:15:11.546310  dram_cbt_mode_extern: 0

  492 20:15:11.546392  dram_cbt_mode [RK0]: 0, [RK1]: 0

  493 20:15:11.546475  Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]

  494 20:15:11.546557  

  495 20:15:11.546640  

  496 20:15:11.546721  [Bianco] ETT version 0.0.0.1

  497 20:15:11.546804   dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6

  498 20:15:11.546885  

  499 20:15:11.546967  vSetVcoreByFreq with vcore:762500, freq=1600

  500 20:15:11.547058  

  501 20:15:11.547141  [DramcInit]

  502 20:15:11.547223  AutoRefreshCKEOff AutoREF OFF

  503 20:15:11.547304  DDRPhyPLLSetting-CKEOFF

  504 20:15:11.547386  DDRPhyPLLSetting-CKEON

  505 20:15:11.547467  

  506 20:15:11.547548  Enable WDQS

  507 20:15:11.547629  [ModeRegInit_LP4] CH0 RK0

  508 20:15:11.547710  Write Rank0 MR13 =0x18

  509 20:15:11.547792  Write Rank0 MR12 =0x5d

  510 20:15:11.547873  Write Rank0 MR1 =0x56

  511 20:15:11.547955  Write Rank0 MR2 =0x1a

  512 20:15:11.548036  Write Rank0 MR11 =0x0

  513 20:15:11.548117  Write Rank0 MR22 =0x38

  514 20:15:11.548199  Write Rank0 MR14 =0x5d

  515 20:15:11.548280  Write Rank0 MR3 =0x30

  516 20:15:11.548361  Write Rank0 MR13 =0x58

  517 20:15:11.548442  Write Rank0 MR12 =0x5d

  518 20:15:11.548523  Write Rank0 MR1 =0x56

  519 20:15:11.548604  Write Rank0 MR2 =0x2d

  520 20:15:11.548686  Write Rank0 MR11 =0x23

  521 20:15:11.548767  Write Rank0 MR22 =0x34

  522 20:15:11.548848  Write Rank0 MR14 =0x10

  523 20:15:11.548931  Write Rank0 MR3 =0x30

  524 20:15:11.549014  Write Rank0 MR13 =0xd8

  525 20:15:11.549095  [ModeRegInit_LP4] CH0 RK1

  526 20:15:11.549177  Write Rank1 MR13 =0x18

  527 20:15:11.549327  Write Rank1 MR12 =0x5d

  528 20:15:11.549387  Write Rank1 MR1 =0x56

  529 20:15:11.549440  Write Rank1 MR2 =0x1a

  530 20:15:11.549492  Write Rank1 MR11 =0x0

  531 20:15:11.549544  Write Rank1 MR22 =0x38

  532 20:15:11.549596  Write Rank1 MR14 =0x5d

  533 20:15:11.549648  Write Rank1 MR3 =0x30

  534 20:15:11.549699  Write Rank1 MR13 =0x58

  535 20:15:11.549755  Write Rank1 MR12 =0x5d

  536 20:15:11.549810  Write Rank1 MR1 =0x56

  537 20:15:11.549862  Write Rank1 MR2 =0x2d

  538 20:15:11.549913  Write Rank1 MR11 =0x23

  539 20:15:11.549965  Write Rank1 MR22 =0x34

  540 20:15:11.550016  Write Rank1 MR14 =0x10

  541 20:15:11.550067  Write Rank1 MR3 =0x30

  542 20:15:11.550118  Write Rank1 MR13 =0xd8

  543 20:15:11.550170  [ModeRegInit_LP4] CH1 RK0

  544 20:15:11.550225  Write Rank0 MR13 =0x18

  545 20:15:11.550280  Write Rank0 MR12 =0x5d

  546 20:15:11.550333  Write Rank0 MR1 =0x56

  547 20:15:11.550384  Write Rank0 MR2 =0x1a

  548 20:15:11.550435  Write Rank0 MR11 =0x0

  549 20:15:11.550486  Write Rank0 MR22 =0x38

  550 20:15:11.550537  Write Rank0 MR14 =0x5d

  551 20:15:11.550589  Write Rank0 MR3 =0x30

  552 20:15:11.550640  Write Rank0 MR13 =0x58

  553 20:15:11.550691  Write Rank0 MR12 =0x5d

  554 20:15:11.550752  Write Rank0 MR1 =0x56

  555 20:15:11.550840  Write Rank0 MR2 =0x2d

  556 20:15:11.550922  Write Rank0 MR11 =0x23

  557 20:15:11.551003  Write Rank0 MR22 =0x34

  558 20:15:11.551085  Write Rank0 MR14 =0x10

  559 20:15:11.551166  Write Rank0 MR3 =0x30

  560 20:15:11.551247  Write Rank0 MR13 =0xd8

  561 20:15:11.551328  [ModeRegInit_LP4] CH1 RK1

  562 20:15:11.551410  Write Rank1 MR13 =0x18

  563 20:15:11.551491  Write Rank1 MR12 =0x5d

  564 20:15:11.551572  Write Rank1 MR1 =0x56

  565 20:15:11.551653  Write Rank1 MR2 =0x1a

  566 20:15:11.551735  Write Rank1 MR11 =0x0

  567 20:15:11.551816  Write Rank1 MR22 =0x38

  568 20:15:11.551897  Write Rank1 MR14 =0x5d

  569 20:15:11.551978  Write Rank1 MR3 =0x30

  570 20:15:11.552059  Write Rank1 MR13 =0x58

  571 20:15:11.552141  Write Rank1 MR12 =0x5d

  572 20:15:11.552227  Write Rank1 MR1 =0x56

  573 20:15:11.552284  Write Rank1 MR2 =0x2d

  574 20:15:11.552336  Write Rank1 MR11 =0x23

  575 20:15:11.552392  Write Rank1 MR22 =0x34

  576 20:15:11.552447  Write Rank1 MR14 =0x10

  577 20:15:11.552502  Write Rank1 MR3 =0x30

  578 20:15:11.552553  Write Rank1 MR13 =0xd8

  579 20:15:11.552605  match AC timing 3

  580 20:15:11.552660  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  581 20:15:11.552713  [MiockJmeterHQA]

  582 20:15:11.552765  vSetVcoreByFreq with vcore:762500, freq=1600

  583 20:15:11.552817  

  584 20:15:11.552868  	MIOCK jitter meter	ch=0

  585 20:15:11.552919  

  586 20:15:11.552970  1T = (100-18) = 82 dly cells

  587 20:15:11.553024  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps

  588 20:15:11.553076  vSetVcoreByFreq with vcore:725000, freq=1200

  589 20:15:11.553127  

  590 20:15:11.553178  	MIOCK jitter meter	ch=0

  591 20:15:11.553229  

  592 20:15:11.553304  1T = (95-17) = 78 dly cells

  593 20:15:11.553372  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps

  594 20:15:11.553424  vSetVcoreByFreq with vcore:725000, freq=800

  595 20:15:11.553475  

  596 20:15:11.553526  	MIOCK jitter meter	ch=0

  597 20:15:11.553577  

  598 20:15:11.553629  1T = (95-17) = 78 dly cells

  599 20:15:11.553682  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps

  600 20:15:11.553734  vSetVcoreByFreq with vcore:762500, freq=1600

  601 20:15:11.553785  vSetVcoreByFreq with vcore:762500, freq=1600

  602 20:15:11.553846  

  603 20:15:11.553905  	K DRVP

  604 20:15:11.553957  1. OCD DRVP=0 CALOUT=0

  605 20:15:11.554011  1. OCD DRVP=1 CALOUT=0

  606 20:15:11.554064  1. OCD DRVP=2 CALOUT=0

  607 20:15:11.554116  1. OCD DRVP=3 CALOUT=0

  608 20:15:11.554169  1. OCD DRVP=4 CALOUT=0

  609 20:15:11.554221  1. OCD DRVP=5 CALOUT=0

  610 20:15:11.554274  1. OCD DRVP=6 CALOUT=0

  611 20:15:11.554326  1. OCD DRVP=7 CALOUT=0

  612 20:15:11.554379  1. OCD DRVP=8 CALOUT=0

  613 20:15:11.554432  1. OCD DRVP=9 CALOUT=1

  614 20:15:11.554488  

  615 20:15:11.554542  1. OCD DRVP calibration OK! DRVP=9

  616 20:15:11.554595  

  617 20:15:11.554646  

  618 20:15:11.554697  

  619 20:15:11.554751  	K ODTN

  620 20:15:11.554806  3. OCD ODTN=0 ,CALOUT=1

  621 20:15:11.554861  3. OCD ODTN=1 ,CALOUT=1

  622 20:15:11.554914  3. OCD ODTN=2 ,CALOUT=1

  623 20:15:11.554967  3. OCD ODTN=3 ,CALOUT=1

  624 20:15:11.555019  3. OCD ODTN=4 ,CALOUT=1

  625 20:15:11.555072  3. OCD ODTN=5 ,CALOUT=1

  626 20:15:11.555125  3. OCD ODTN=6 ,CALOUT=1

  627 20:15:11.555178  3. OCD ODTN=7 ,CALOUT=0

  628 20:15:11.555235  

  629 20:15:11.555289  3. OCD ODTN calibration OK! ODTN=7

  630 20:15:11.555343  

  631 20:15:11.555394  [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7

  632 20:15:11.555446  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15

  633 20:15:11.555498  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)

  634 20:15:11.555550  

  635 20:15:11.555602  	K DRVP

  636 20:15:11.555653  1. OCD DRVP=0 CALOUT=0

  637 20:15:11.555705  1. OCD DRVP=1 CALOUT=0

  638 20:15:11.555758  1. OCD DRVP=2 CALOUT=0

  639 20:15:11.555810  1. OCD DRVP=3 CALOUT=0

  640 20:15:11.555862  1. OCD DRVP=4 CALOUT=0

  641 20:15:11.555914  1. OCD DRVP=5 CALOUT=0

  642 20:15:11.555966  1. OCD DRVP=6 CALOUT=0

  643 20:15:11.556018  1. OCD DRVP=7 CALOUT=0

  644 20:15:11.556070  1. OCD DRVP=8 CALOUT=0

  645 20:15:11.556123  1. OCD DRVP=9 CALOUT=0

  646 20:15:11.556183  1. OCD DRVP=10 CALOUT=1

  647 20:15:11.556268  

  648 20:15:11.556349  1. OCD DRVP calibration OK! DRVP=10

  649 20:15:11.556433  

  650 20:15:11.556513  

  651 20:15:11.556594  

  652 20:15:11.556652  	K ODTN

  653 20:15:11.556738  3. OCD ODTN=0 ,CALOUT=1

  654 20:15:11.556823  3. OCD ODTN=1 ,CALOUT=1

  655 20:15:11.556907  3. OCD ODTN=2 ,CALOUT=1

  656 20:15:11.556994  3. OCD ODTN=3 ,CALOUT=1

  657 20:15:11.557081  3. OCD ODTN=4 ,CALOUT=1

  658 20:15:11.557173  3. OCD ODTN=5 ,CALOUT=1

  659 20:15:11.557447  3. OCD ODTN=6 ,CALOUT=1

  660 20:15:11.557509  3. OCD ODTN=7 ,CALOUT=1

  661 20:15:11.557566  3. OCD ODTN=8 ,CALOUT=1

  662 20:15:11.557621  3. OCD ODTN=9 ,CALOUT=1

  663 20:15:11.557674  3. OCD ODTN=10 ,CALOUT=1

  664 20:15:11.557731  3. OCD ODTN=11 ,CALOUT=1

  665 20:15:11.557793  3. OCD ODTN=12 ,CALOUT=1

  666 20:15:11.557846  3. OCD ODTN=13 ,CALOUT=1

  667 20:15:11.557899  3. OCD ODTN=14 ,CALOUT=0

  668 20:15:11.557957  

  669 20:15:11.558009  3. OCD ODTN calibration OK! ODTN=14

  670 20:15:11.558062  

  671 20:15:11.558115  [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14

  672 20:15:11.558167  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14

  673 20:15:11.558220  term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)

  674 20:15:11.558272  

  675 20:15:11.558324  [DramcInit]

  676 20:15:11.558375  AutoRefreshCKEOff AutoREF OFF

  677 20:15:11.558427  DDRPhyPLLSetting-CKEOFF

  678 20:15:11.558478  DDRPhyPLLSetting-CKEON

  679 20:15:11.558529  

  680 20:15:11.558579  Enable WDQS

  681 20:15:11.558630  ==

  682 20:15:11.558681  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  683 20:15:11.558733  fsp= 1, odt_onoff= 1, Byte mode= 0

  684 20:15:11.558785  ==

  685 20:15:11.558836  [Duty_Offset_Calibration]

  686 20:15:11.558887  

  687 20:15:11.558938  ===========================

  688 20:15:11.558989  	B0:0	B1:1	CA:1

  689 20:15:11.559041  ==

  690 20:15:11.559092  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

  691 20:15:11.559144  fsp= 1, odt_onoff= 1, Byte mode= 0

  692 20:15:11.559195  ==

  693 20:15:11.559246  [Duty_Offset_Calibration]

  694 20:15:11.559297  

  695 20:15:11.559349  ===========================

  696 20:15:11.559400  	B0:1	B1:2	CA:0

  697 20:15:11.559451  [ModeRegInit_LP4] CH0 RK0

  698 20:15:11.559506  Write Rank0 MR13 =0x18

  699 20:15:11.559560  Write Rank0 MR12 =0x5d

  700 20:15:11.559611  Write Rank0 MR1 =0x56

  701 20:15:11.559663  Write Rank0 MR2 =0x1a

  702 20:15:11.559714  Write Rank0 MR11 =0x0

  703 20:15:11.559765  Write Rank0 MR22 =0x38

  704 20:15:11.559815  Write Rank0 MR14 =0x5d

  705 20:15:11.559867  Write Rank0 MR3 =0x30

  706 20:15:11.559918  Write Rank0 MR13 =0x58

  707 20:15:11.559970  Write Rank0 MR12 =0x5d

  708 20:15:11.560021  Write Rank0 MR1 =0x56

  709 20:15:11.560072  Write Rank0 MR2 =0x2d

  710 20:15:11.560123  Write Rank0 MR11 =0x23

  711 20:15:11.560174  Write Rank0 MR22 =0x34

  712 20:15:11.560225  Write Rank0 MR14 =0x10

  713 20:15:11.560276  Write Rank0 MR3 =0x30

  714 20:15:11.560327  Write Rank0 MR13 =0xd8

  715 20:15:11.560379  [ModeRegInit_LP4] CH0 RK1

  716 20:15:11.560430  Write Rank1 MR13 =0x18

  717 20:15:11.560481  Write Rank1 MR12 =0x5d

  718 20:15:11.560532  Write Rank1 MR1 =0x56

  719 20:15:11.560583  Write Rank1 MR2 =0x1a

  720 20:15:11.560656  Write Rank1 MR11 =0x0

  721 20:15:11.560709  Write Rank1 MR22 =0x38

  722 20:15:11.560761  Write Rank1 MR14 =0x5d

  723 20:15:11.560812  Write Rank1 MR3 =0x30

  724 20:15:11.560864  Write Rank1 MR13 =0x58

  725 20:15:11.560915  Write Rank1 MR12 =0x5d

  726 20:15:11.560967  Write Rank1 MR1 =0x56

  727 20:15:11.561018  Write Rank1 MR2 =0x2d

  728 20:15:11.561068  Write Rank1 MR11 =0x23

  729 20:15:11.561120  Write Rank1 MR22 =0x34

  730 20:15:11.561171  Write Rank1 MR14 =0x10

  731 20:15:11.561222  Write Rank1 MR3 =0x30

  732 20:15:11.561303  Write Rank1 MR13 =0xd8

  733 20:15:11.561369  [ModeRegInit_LP4] CH1 RK0

  734 20:15:11.561421  Write Rank0 MR13 =0x18

  735 20:15:11.561473  Write Rank0 MR12 =0x5d

  736 20:15:11.561524  Write Rank0 MR1 =0x56

  737 20:15:11.561576  Write Rank0 MR2 =0x1a

  738 20:15:11.561627  Write Rank0 MR11 =0x0

  739 20:15:11.561678  Write Rank0 MR22 =0x38

  740 20:15:11.561729  Write Rank0 MR14 =0x5d

  741 20:15:11.561780  Write Rank0 MR3 =0x30

  742 20:15:11.561854  Write Rank0 MR13 =0x58

  743 20:15:11.561937  Write Rank0 MR12 =0x5d

  744 20:15:11.562019  Write Rank0 MR1 =0x56

  745 20:15:11.562100  Write Rank0 MR2 =0x2d

  746 20:15:11.562191  Write Rank0 MR11 =0x23

  747 20:15:11.562246  Write Rank0 MR22 =0x34

  748 20:15:11.562298  Write Rank0 MR14 =0x10

  749 20:15:11.562349  Write Rank0 MR3 =0x30

  750 20:15:11.562400  Write Rank0 MR13 =0xd8

  751 20:15:11.562451  [ModeRegInit_LP4] CH1 RK1

  752 20:15:11.562503  Write Rank1 MR13 =0x18

  753 20:15:11.562554  Write Rank1 MR12 =0x5d

  754 20:15:11.562606  Write Rank1 MR1 =0x56

  755 20:15:11.562656  Write Rank1 MR2 =0x1a

  756 20:15:11.562707  Write Rank1 MR11 =0x0

  757 20:15:11.562758  Write Rank1 MR22 =0x38

  758 20:15:11.562809  Write Rank1 MR14 =0x5d

  759 20:15:11.562859  Write Rank1 MR3 =0x30

  760 20:15:11.562910  Write Rank1 MR13 =0x58

  761 20:15:11.562961  Write Rank1 MR12 =0x5d

  762 20:15:11.563012  Write Rank1 MR1 =0x56

  763 20:15:11.563062  Write Rank1 MR2 =0x2d

  764 20:15:11.563112  Write Rank1 MR11 =0x23

  765 20:15:11.563164  Write Rank1 MR22 =0x34

  766 20:15:11.563215  Write Rank1 MR14 =0x10

  767 20:15:11.563266  Write Rank1 MR3 =0x30

  768 20:15:11.563317  Write Rank1 MR13 =0xd8

  769 20:15:11.563368  match AC timing 3

  770 20:15:11.563419  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  771 20:15:11.563471  DramC Write-DBI off

  772 20:15:11.563523  DramC Read-DBI off

  773 20:15:11.563574  Write Rank0 MR13 =0x59

  774 20:15:11.563626  ==

  775 20:15:11.563681  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  776 20:15:11.563735  fsp= 1, odt_onoff= 1, Byte mode= 0

  777 20:15:11.563788  ==

  778 20:15:11.563839  === u2Vref_new: 0x56 --> 0x2d

  779 20:15:11.563891  === u2Vref_new: 0x58 --> 0x38

  780 20:15:11.563942  === u2Vref_new: 0x5a --> 0x39

  781 20:15:11.563994  === u2Vref_new: 0x5c --> 0x3c

  782 20:15:11.564067  === u2Vref_new: 0x5e --> 0x3d

  783 20:15:11.564121  === u2Vref_new: 0x60 --> 0xa0

  784 20:15:11.564173  

  785 20:15:11.564246  CBT Vref found, early break!

  786 20:15:11.564329  [CA 0] Center 33 (4~63) winsize 60

  787 20:15:11.564411  [CA 1] Center 34 (5~63) winsize 59

  788 20:15:11.564492  [CA 2] Center 28 (0~57) winsize 58

  789 20:15:11.564574  [CA 3] Center 24 (-3~51) winsize 55

  790 20:15:11.564656  [CA 4] Center 25 (-2~53) winsize 56

  791 20:15:11.564726  [CA 5] Center 30 (2~58) winsize 57

  792 20:15:11.564798  

  793 20:15:11.564880  [CATrainingPosCal] consider 1 rank data

  794 20:15:11.564962  u2DelayCellTimex100 = 762/100 ps

  795 20:15:11.565047  CA0 delay=33 (4~63),Diff = 9 PI (11 cell)

  796 20:15:11.565129  CA1 delay=34 (5~63),Diff = 10 PI (12 cell)

  797 20:15:11.565212  CA2 delay=28 (0~57),Diff = 4 PI (5 cell)

  798 20:15:11.565350  CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)

  799 20:15:11.565405  CA4 delay=25 (-2~53),Diff = 1 PI (1 cell)

  800 20:15:11.565460  CA5 delay=30 (2~58),Diff = 6 PI (7 cell)

  801 20:15:11.565513  

  802 20:15:11.565568  CA PerBit enable=1, Macro0, CA PI delay=24

  803 20:15:11.565620  === u2Vref_new: 0x56 --> 0x2d

  804 20:15:11.565672  

  805 20:15:11.565723  Vref(ca) range 1: 22

  806 20:15:11.565774  

  807 20:15:11.565825  CS Dly= 10 (41-0-32)

  808 20:15:11.565877  Write Rank0 MR13 =0xd8

  809 20:15:11.565928  Write Rank0 MR13 =0xd8

  810 20:15:11.565979  Write Rank0 MR12 =0x56

  811 20:15:11.566030  Write Rank1 MR13 =0x59

  812 20:15:11.566081  ==

  813 20:15:11.566135  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

  814 20:15:11.566197  fsp= 1, odt_onoff= 1, Byte mode= 0

  815 20:15:11.566264  ==

  816 20:15:11.566324  === u2Vref_new: 0x56 --> 0x2d

  817 20:15:11.566378  === u2Vref_new: 0x58 --> 0x38

  818 20:15:11.566430  === u2Vref_new: 0x5a --> 0x39

  819 20:15:11.566693  === u2Vref_new: 0x5c --> 0x3c

  820 20:15:11.566754  === u2Vref_new: 0x5e --> 0x3d

  821 20:15:11.566808  === u2Vref_new: 0x60 --> 0xa0

  822 20:15:11.566860  [CA 0] Center 34 (5~63) winsize 59

  823 20:15:11.566912  [CA 1] Center 34 (6~63) winsize 58

  824 20:15:11.566965  [CA 2] Center 29 (0~58) winsize 59

  825 20:15:11.567022  [CA 3] Center 23 (-4~51) winsize 56

  826 20:15:11.567074  [CA 4] Center 24 (-3~52) winsize 56

  827 20:15:11.567126  [CA 5] Center 30 (1~59) winsize 59

  828 20:15:11.567179  

  829 20:15:11.567262  [CATrainingPosCal] consider 2 rank data

  830 20:15:11.567384  u2DelayCellTimex100 = 762/100 ps

  831 20:15:11.567467  CA0 delay=34 (5~63),Diff = 10 PI (12 cell)

  832 20:15:11.567549  CA1 delay=34 (6~63),Diff = 10 PI (12 cell)

  833 20:15:11.567632  CA2 delay=28 (0~57),Diff = 4 PI (5 cell)

  834 20:15:11.567714  CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)

  835 20:15:11.567796  CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)

  836 20:15:11.567878  CA5 delay=30 (2~58),Diff = 6 PI (7 cell)

  837 20:15:11.567959  

  838 20:15:11.568041  CA PerBit enable=1, Macro0, CA PI delay=24

  839 20:15:11.568123  === u2Vref_new: 0x56 --> 0x2d

  840 20:15:11.568238  

  841 20:15:11.568335  Vref(ca) range 1: 22

  842 20:15:11.568413  

  843 20:15:11.568468  CS Dly= 11 (42-0-32)

  844 20:15:11.568553  Write Rank1 MR13 =0xd8

  845 20:15:11.568613  Write Rank1 MR13 =0xd8

  846 20:15:11.568697  Write Rank1 MR12 =0x56

  847 20:15:11.568781  [RankSwap] Rank num 2, (Multi 1), Rank 0

  848 20:15:11.568864  Write Rank0 MR2 =0xad

  849 20:15:11.568947  [Write Leveling]

  850 20:15:11.569029  delay  byte0  byte1  byte2  byte3

  851 20:15:11.569111  

  852 20:15:11.569193  10    0   0   

  853 20:15:11.569299  11    0   0   

  854 20:15:11.569463  12    0   0   

  855 20:15:11.569551  13    0   0   

  856 20:15:11.569607  14    0   0   

  857 20:15:11.569661  15    0   0   

  858 20:15:11.569721  16    0   0   

  859 20:15:11.569774  17    0   0   

  860 20:15:11.569827  18    0   0   

  861 20:15:11.569882  19    0   0   

  862 20:15:11.569952  20    0   0   

  863 20:15:11.570017  21    0   0   

  864 20:15:11.570073  22    0   0   

  865 20:15:11.570143  23    0   0   

  866 20:15:11.570215  24    0   0   

  867 20:15:11.570318  25    0   0   

  868 20:15:11.570417  26    0   0   

  869 20:15:11.570501  27    0   0   

  870 20:15:11.570622  28    0   0   

  871 20:15:11.570708  29    0   ff   

  872 20:15:11.570792  30    0   ff   

  873 20:15:11.570876  31    0   ff   

  874 20:15:11.570959  32    0   ff   

  875 20:15:11.571043  33    ff   ff   

  876 20:15:11.571129  34    ff   ff   

  877 20:15:11.571215  35    ff   ff   

  878 20:15:11.571298  36    ff   ff   

  879 20:15:11.571382  37    ff   ff   

  880 20:15:11.571465  38    ff   ff   

  881 20:15:11.571549  39    ff   ff   

  882 20:15:11.571633  pass bytecount = 0xff (0xff: all bytes pass) 

  883 20:15:11.571714  

  884 20:15:11.571795  DQS0 dly: 33

  885 20:15:11.571876  DQS1 dly: 29

  886 20:15:11.571957  Write Rank0 MR2 =0x2d

  887 20:15:11.572039  [RankSwap] Rank num 2, (Multi 1), Rank 0

  888 20:15:11.572121  Write Rank0 MR1 =0xd6

  889 20:15:11.572205  [Gating]

  890 20:15:11.572291  ==

  891 20:15:11.572378  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  892 20:15:11.572433  fsp= 1, odt_onoff= 1, Byte mode= 0

  893 20:15:11.572486  ==

  894 20:15:11.572538  3 1 0 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  895 20:15:11.572591  3 1 4 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  896 20:15:11.572645  3 1 8 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  897 20:15:11.572699  3 1 12 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  898 20:15:11.572752  3 1 16 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  899 20:15:11.572806  3 1 20 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  900 20:15:11.572858  3 1 24 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

  901 20:15:11.572911  3 1 28 |302 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

  902 20:15:11.572964  3 2 0 |3534 2c2c  |(11 11)(11 0) |(0 0)(0 0)| 0

  903 20:15:11.573017  3 2 4 |3534 2c2c  |(11 11)(11 0) |(0 0)(0 0)| 0

  904 20:15:11.573070  3 2 8 |3534 303  |(11 11)(11 11) |(0 0)(0 0)| 0

  905 20:15:11.573123  3 2 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  906 20:15:11.573176  3 2 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  907 20:15:11.573229  3 2 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  908 20:15:11.573324  3 2 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

  909 20:15:11.573378  3 2 28 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  910 20:15:11.573430  3 3 0 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  911 20:15:11.573483  3 3 4 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  912 20:15:11.573540  3 3 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  913 20:15:11.573593  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  914 20:15:11.573650  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  915 20:15:11.573706  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  916 20:15:11.573760  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  917 20:15:11.573813  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  918 20:15:11.573865  3 4 0 |e0e 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  919 20:15:11.573963  3 4 4 |3d3d 2f2e  |(11 11)(11 11) |(1 1)(1 1)| 0

  920 20:15:11.574052  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  921 20:15:11.574139  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  922 20:15:11.574266  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  923 20:15:11.574354  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  924 20:15:11.574438  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  925 20:15:11.574522  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  926 20:15:11.574606  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  927 20:15:11.574690  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  928 20:15:11.574774  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  929 20:15:11.574859  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  930 20:15:11.574944  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  931 20:15:11.575074  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  932 20:15:11.575159  [Byte 0] Lead/lag falling Transition (3, 5, 20)

  933 20:15:11.575245  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

  934 20:15:11.575332  [Byte 0] Lead/lag Transition tap number (2)

  935 20:15:11.575415  [Byte 1] Lead/lag falling Transition (3, 5, 24)

  936 20:15:11.575498  3 5 28 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

  937 20:15:11.575582  [Byte 1] Lead/lag Transition tap number (2)

  938 20:15:11.575668  3 6 0 |202 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

  939 20:15:11.575754  3 6 4 |4646 3e3d  |(0 0)(11 11) |(0 0)(0 0)| 0

  940 20:15:11.575841  [Byte 0]First pass (3, 6, 4)

  941 20:15:11.575924  3 6 8 |4646 c0c  |(0 0)(1 1) |(0 0)(0 0)| 0

  942 20:15:11.576205  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  943 20:15:11.576294  [Byte 1]First pass (3, 6, 12)

  944 20:15:11.576376  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  945 20:15:11.576458  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  946 20:15:11.576515  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  947 20:15:11.576568  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  948 20:15:11.576691  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  949 20:15:11.576869  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  950 20:15:11.577005  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  951 20:15:11.577089  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  952 20:15:11.577179  All bytes gating window > 1UI, Early break!

  953 20:15:11.577281  

  954 20:15:11.577379  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)

  955 20:15:11.577461  

  956 20:15:11.577526  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

  957 20:15:11.577579  

  958 20:15:11.577647  

  959 20:15:11.577734  

  960 20:15:11.577787  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)

  961 20:15:11.577840  

  962 20:15:11.577891  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

  963 20:15:11.577946  

  964 20:15:11.578021  

  965 20:15:11.578102  Write Rank0 MR1 =0x56

  966 20:15:11.578183  

  967 20:15:11.578264  best RODT dly(2T, 0.5T) = (2, 2)

  968 20:15:11.578344  

  969 20:15:11.578425  best RODT dly(2T, 0.5T) = (2, 2)

  970 20:15:11.578505  ==

  971 20:15:11.578587  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  972 20:15:11.578669  fsp= 1, odt_onoff= 1, Byte mode= 0

  973 20:15:11.578750  ==

  974 20:15:11.578832  Start DQ dly to find pass range UseTestEngine =0

  975 20:15:11.578914  x-axis: bit #, y-axis: DQ dly (-127~63)

  976 20:15:11.578995  RX Vref Scan = 0

  977 20:15:11.579076  -26, [0] xxxxxxxx xxxxxxxx [MSB]

  978 20:15:11.579162  -25, [0] xxxxxxxx xxxxxxxx [MSB]

  979 20:15:11.579246  -24, [0] xxxxxxxx xxxxxxxx [MSB]

  980 20:15:11.579329  -23, [0] xxxxxxxx xxxxxxxx [MSB]

  981 20:15:11.579412  -22, [0] xxxxxxxx xxxxxxxx [MSB]

  982 20:15:11.579495  -21, [0] xxxxxxxx xxxxxxxx [MSB]

  983 20:15:11.579578  -20, [0] xxxxxxxx xxxxxxxx [MSB]

  984 20:15:11.579661  -19, [0] xxxxxxxx xxxxxxxx [MSB]

  985 20:15:11.579744  -18, [0] xxxxxxxx xxxxxxxx [MSB]

  986 20:15:11.579827  -17, [0] xxxxxxxx xxxxxxxx [MSB]

  987 20:15:11.579910  -16, [0] xxxxxxxx xxxxxxxx [MSB]

  988 20:15:11.579993  -15, [0] xxxxxxxx xxxxxxxx [MSB]

  989 20:15:11.580076  -14, [0] xxxxxxxx xxxxxxxx [MSB]

  990 20:15:11.580190  -13, [0] xxxxxxxx xxxxxxxx [MSB]

  991 20:15:11.580273  -12, [0] xxxxxxxx xxxxxxxx [MSB]

  992 20:15:11.580356  -11, [0] xxxxxxxx xxxxxxxx [MSB]

  993 20:15:11.580439  -10, [0] xxxxxxxx xxxxxxxx [MSB]

  994 20:15:11.580523  -9, [0] xxxxxxxx xxxxxxxx [MSB]

  995 20:15:11.580597  -8, [0] xxxxxxxx xxxxxxxx [MSB]

  996 20:15:11.580662  -7, [0] xxxxxxxx xxxxxxxx [MSB]

  997 20:15:11.580745  -6, [0] xxxxxxxx xxxxxxxx [MSB]

  998 20:15:11.580828  -5, [0] xxxxxxxx xxxxxxxx [MSB]

  999 20:15:11.580910  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1000 20:15:11.580993  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 1001 20:15:11.581092  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 1002 20:15:11.581216  -1, [0] xxxoxxxx xxxxxxxx [MSB]

 1003 20:15:11.581314  0, [0] xxxoxoxx xxxxxxxx [MSB]

 1004 20:15:11.581369  1, [0] xxxoxoxx xxxoxxxx [MSB]

 1005 20:15:11.581423  2, [0] xxxoxoxo xxxoxoxx [MSB]

 1006 20:15:11.581476  3, [0] xxxoxooo oxxoxoox [MSB]

 1007 20:15:11.581528  4, [0] xxxoxooo oxxoxoox [MSB]

 1008 20:15:11.581581  5, [0] xxxoxooo ooxooooo [MSB]

 1009 20:15:11.581634  6, [0] xxxoxooo ooxooooo [MSB]

 1010 20:15:11.581686  7, [0] xooooooo oooooooo [MSB]

 1011 20:15:11.581740  8, [0] xooooooo oooooooo [MSB]

 1012 20:15:11.581797  9, [0] xooooooo oooooooo [MSB]

 1013 20:15:11.581853  32, [0] oooxoooo oooooooo [MSB]

 1014 20:15:11.581906  33, [0] oooxoooo oooooxoo [MSB]

 1015 20:15:11.581960  34, [0] oooxoxxo oooooxxo [MSB]

 1016 20:15:11.582012  35, [0] oooxoxxx xooooxxo [MSB]

 1017 20:15:11.582064  36, [0] oooxoxxx xooxoxxx [MSB]

 1018 20:15:11.582121  37, [0] oooxoxxx xxoxxxxx [MSB]

 1019 20:15:11.582178  38, [0] oooxoxxx xxoxxxxx [MSB]

 1020 20:15:11.582261  39, [0] oooxoxxx xxoxxxxx [MSB]

 1021 20:15:11.582345  40, [0] oooxxxxx xxoxxxxx [MSB]

 1022 20:15:11.582405  41, [0] xoxxxxxx xxoxxxxx [MSB]

 1023 20:15:11.582488  42, [0] xxxxxxxx xxxxxxxx [MSB]

 1024 20:15:11.582572  iDelay=42, Bit 0, Center 25 (10 ~ 40) 31

 1025 20:15:11.582664  iDelay=42, Bit 1, Center 24 (7 ~ 41) 35

 1026 20:15:11.582749  iDelay=42, Bit 2, Center 23 (7 ~ 40) 34

 1027 20:15:11.582850  iDelay=42, Bit 3, Center 15 (-1 ~ 31) 33

 1028 20:15:11.582948  iDelay=42, Bit 4, Center 23 (7 ~ 39) 33

 1029 20:15:11.583030  iDelay=42, Bit 5, Center 16 (0 ~ 33) 34

 1030 20:15:11.583114  iDelay=42, Bit 6, Center 18 (3 ~ 33) 31

 1031 20:15:11.583195  iDelay=42, Bit 7, Center 18 (2 ~ 34) 33

 1032 20:15:11.583275  iDelay=42, Bit 8, Center 18 (3 ~ 34) 32

 1033 20:15:11.583357  iDelay=42, Bit 9, Center 20 (5 ~ 36) 32

 1034 20:15:11.583440  iDelay=42, Bit 10, Center 24 (7 ~ 41) 35

 1035 20:15:11.583523  iDelay=42, Bit 11, Center 18 (1 ~ 35) 35

 1036 20:15:11.583606  iDelay=42, Bit 12, Center 20 (5 ~ 36) 32

 1037 20:15:11.583686  iDelay=42, Bit 13, Center 17 (2 ~ 32) 31

 1038 20:15:11.583767  iDelay=42, Bit 14, Center 18 (3 ~ 33) 31

 1039 20:15:11.583847  iDelay=42, Bit 15, Center 20 (5 ~ 35) 31

 1040 20:15:11.583929  ==

 1041 20:15:11.584011  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1042 20:15:11.584112  fsp= 1, odt_onoff= 1, Byte mode= 0

 1043 20:15:11.584269  ==

 1044 20:15:11.584364  DQS Delay:

 1045 20:15:11.584444  DQS0 = 0, DQS1 = 0

 1046 20:15:11.584524  DQM Delay:

 1047 20:15:11.584604  DQM0 = 20, DQM1 = 19

 1048 20:15:11.584683  DQ Delay:

 1049 20:15:11.584766  DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15

 1050 20:15:11.584848  DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18

 1051 20:15:11.584928  DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18

 1052 20:15:11.585011  DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20

 1053 20:15:11.585091  

 1054 20:15:11.585171  

 1055 20:15:11.585252  DramC Write-DBI off

 1056 20:15:11.585368  ==

 1057 20:15:11.585449  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1058 20:15:11.585530  fsp= 1, odt_onoff= 1, Byte mode= 0

 1059 20:15:11.585612  ==

 1060 20:15:11.585695  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1061 20:15:11.585777  

 1062 20:15:11.585857  Begin, DQ Scan Range 925~1181

 1063 20:15:11.585938  

 1064 20:15:11.586019  

 1065 20:15:11.586099  	TX Vref Scan disable

 1066 20:15:11.586179  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1067 20:15:11.586262  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1068 20:15:11.586345  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1069 20:15:11.586428  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1070 20:15:11.586511  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1071 20:15:11.586594  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1072 20:15:11.586677  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1073 20:15:11.586957  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1074 20:15:11.587045  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1075 20:15:11.587132  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1076 20:15:11.587216  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1077 20:15:11.587300  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1078 20:15:11.587386  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1079 20:15:11.587472  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1080 20:15:11.587555  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1081 20:15:11.587640  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1082 20:15:11.587725  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1083 20:15:11.587848  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1084 20:15:11.587934  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1085 20:15:11.588017  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1086 20:15:11.588101  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1087 20:15:11.588227  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1088 20:15:11.588352  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1089 20:15:11.588435  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1090 20:15:11.588491  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1091 20:15:11.588544  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1092 20:15:11.588596  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1093 20:15:11.588651  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1094 20:15:11.588703  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1095 20:15:11.588755  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1096 20:15:11.588815  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1097 20:15:11.588898  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1098 20:15:11.588981  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1099 20:15:11.589064  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1100 20:15:11.589147  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1101 20:15:11.589230  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1102 20:15:11.589331  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1103 20:15:11.589385  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1104 20:15:11.589438  963 |3 6 3|[0] xxxxxxxx oxxoxxxx [MSB]

 1105 20:15:11.589540  964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]

 1106 20:15:11.589610  965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]

 1107 20:15:11.589670  966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]

 1108 20:15:11.589753  967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]

 1109 20:15:11.589836  968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]

 1110 20:15:11.589919  969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]

 1111 20:15:11.590001  970 |3 6 10|[0] xxxoxoox oooooooo [MSB]

 1112 20:15:11.590084  971 |3 6 11|[0] xxxoxoox oooooooo [MSB]

 1113 20:15:11.590167  972 |3 6 12|[0] xxxoxoox oooooooo [MSB]

 1114 20:15:11.590292  973 |3 6 13|[0] xxxoooox oooooooo [MSB]

 1115 20:15:11.590446  974 |3 6 14|[0] xxxooooo oooooooo [MSB]

 1116 20:15:11.590558  975 |3 6 15|[0] xooooooo oooooooo [MSB]

 1117 20:15:11.590641  988 |3 6 28|[0] oooooooo oxxxxxxx [MSB]

 1118 20:15:11.590726  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1119 20:15:11.590839  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1120 20:15:11.590930  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1121 20:15:11.591015  992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]

 1122 20:15:11.591098  993 |3 6 33|[0] xxoxxxxx xxxxxxxx [MSB]

 1123 20:15:11.591181  994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1124 20:15:11.591264  Byte0, DQ PI dly=982, DQM PI dly= 982

 1125 20:15:11.591347  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)

 1126 20:15:11.591429  

 1127 20:15:11.591509  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)

 1128 20:15:11.591590  

 1129 20:15:11.591671  Byte1, DQ PI dly=976, DQM PI dly= 976

 1130 20:15:11.591782  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)

 1131 20:15:11.591865  

 1132 20:15:11.591946  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)

 1133 20:15:11.592040  

 1134 20:15:11.592136  ==

 1135 20:15:11.592247  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1136 20:15:11.592329  fsp= 1, odt_onoff= 1, Byte mode= 0

 1137 20:15:11.592409  ==

 1138 20:15:11.592490  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1139 20:15:11.592571  

 1140 20:15:11.592652  Begin, DQ Scan Range 952~1016

 1141 20:15:11.592732  Write Rank0 MR14 =0x0

 1142 20:15:11.592812  

 1143 20:15:11.592892  	CH=0, VrefRange= 0, VrefLevel = 0

 1144 20:15:11.593011  TX Bit0 (977~994) 18 985,   Bit8 (966~984) 19 975,

 1145 20:15:11.593092  TX Bit1 (977~993) 17 985,   Bit9 (968~984) 17 976,

 1146 20:15:11.593174  TX Bit2 (976~993) 18 984,   Bit10 (970~990) 21 980,

 1147 20:15:11.593299  TX Bit3 (970~986) 17 978,   Bit11 (965~984) 20 974,

 1148 20:15:11.593362  TX Bit4 (976~993) 18 984,   Bit12 (967~984) 18 975,

 1149 20:15:11.593417  TX Bit5 (972~988) 17 980,   Bit13 (967~983) 17 975,

 1150 20:15:11.593469  TX Bit6 (974~988) 15 981,   Bit14 (967~984) 18 975,

 1151 20:15:11.593520  TX Bit7 (977~991) 15 984,   Bit15 (970~986) 17 978,

 1152 20:15:11.593572  

 1153 20:15:11.593623  Write Rank0 MR14 =0x2

 1154 20:15:11.593674  

 1155 20:15:11.593724  	CH=0, VrefRange= 0, VrefLevel = 2

 1156 20:15:11.593775  TX Bit0 (977~994) 18 985,   Bit8 (966~984) 19 975,

 1157 20:15:11.593831  TX Bit1 (977~993) 17 985,   Bit9 (967~985) 19 976,

 1158 20:15:11.593886  TX Bit2 (976~993) 18 984,   Bit10 (970~990) 21 980,

 1159 20:15:11.593938  TX Bit3 (970~986) 17 978,   Bit11 (965~984) 20 974,

 1160 20:15:11.593989  TX Bit4 (976~993) 18 984,   Bit12 (967~984) 18 975,

 1161 20:15:11.594058  TX Bit5 (971~988) 18 979,   Bit13 (966~983) 18 974,

 1162 20:15:11.594142  TX Bit6 (974~989) 16 981,   Bit14 (968~984) 17 976,

 1163 20:15:11.594223  TX Bit7 (976~991) 16 983,   Bit15 (969~987) 19 978,

 1164 20:15:11.594305  

 1165 20:15:11.594387  Write Rank0 MR14 =0x4

 1166 20:15:11.594467  

 1167 20:15:11.594548  	CH=0, VrefRange= 0, VrefLevel = 4

 1168 20:15:11.594631  TX Bit0 (977~994) 18 985,   Bit8 (966~985) 20 975,

 1169 20:15:11.594714  TX Bit1 (977~993) 17 985,   Bit9 (967~985) 19 976,

 1170 20:15:11.594797  TX Bit2 (976~993) 18 984,   Bit10 (970~990) 21 980,

 1171 20:15:11.594879  TX Bit3 (970~987) 18 978,   Bit11 (965~985) 21 975,

 1172 20:15:11.594960  TX Bit4 (975~994) 20 984,   Bit12 (967~985) 19 976,

 1173 20:15:11.595042  TX Bit5 (971~989) 19 980,   Bit13 (966~984) 19 975,

 1174 20:15:11.595126  TX Bit6 (973~990) 18 981,   Bit14 (967~985) 19 976,

 1175 20:15:11.595210  TX Bit7 (976~991) 16 983,   Bit15 (969~988) 20 978,

 1176 20:15:11.595290  

 1177 20:15:11.595370  Write Rank0 MR14 =0x6

 1178 20:15:11.595452  

 1179 20:15:11.595533  	CH=0, VrefRange= 0, VrefLevel = 6

 1180 20:15:11.595614  TX Bit0 (977~995) 19 986,   Bit8 (966~985) 20 975,

 1181 20:15:11.595888  TX Bit1 (977~993) 17 985,   Bit9 (967~986) 20 976,

 1182 20:15:11.596014  TX Bit2 (976~994) 19 985,   Bit10 (970~990) 21 980,

 1183 20:15:11.596096  TX Bit3 (969~987) 19 978,   Bit11 (964~985) 22 974,

 1184 20:15:11.596178  TX Bit4 (975~994) 20 984,   Bit12 (966~986) 21 976,

 1185 20:15:11.596260  TX Bit5 (971~990) 20 980,   Bit13 (966~984) 19 975,

 1186 20:15:11.596330  TX Bit6 (972~990) 19 981,   Bit14 (967~986) 20 976,

 1187 20:15:11.596385  TX Bit7 (976~992) 17 984,   Bit15 (969~989) 21 979,

 1188 20:15:11.596438  

 1189 20:15:11.596489  Write Rank0 MR14 =0x8

 1190 20:15:11.596540  

 1191 20:15:11.596590  	CH=0, VrefRange= 0, VrefLevel = 8

 1192 20:15:11.596641  TX Bit0 (977~996) 20 986,   Bit8 (965~986) 22 975,

 1193 20:15:11.596693  TX Bit1 (976~994) 19 985,   Bit9 (967~986) 20 976,

 1194 20:15:11.596745  TX Bit2 (976~994) 19 985,   Bit10 (969~990) 22 979,

 1195 20:15:11.596796  TX Bit3 (969~988) 20 978,   Bit11 (964~985) 22 974,

 1196 20:15:11.596877  TX Bit4 (975~995) 21 985,   Bit12 (966~986) 21 976,

 1197 20:15:11.596961  TX Bit5 (970~990) 21 980,   Bit13 (965~985) 21 975,

 1198 20:15:11.597045  TX Bit6 (971~991) 21 981,   Bit14 (967~986) 20 976,

 1199 20:15:11.597128  TX Bit7 (976~992) 17 984,   Bit15 (969~989) 21 979,

 1200 20:15:11.597208  

 1201 20:15:11.597332  Write Rank0 MR14 =0xa

 1202 20:15:11.597412  

 1203 20:15:11.597492  	CH=0, VrefRange= 0, VrefLevel = 10

 1204 20:15:11.597582  TX Bit0 (976~996) 21 986,   Bit8 (965~986) 22 975,

 1205 20:15:11.597646  TX Bit1 (976~994) 19 985,   Bit9 (966~986) 21 976,

 1206 20:15:11.597731  TX Bit2 (975~994) 20 984,   Bit10 (969~991) 23 980,

 1207 20:15:11.597815  TX Bit3 (969~989) 21 979,   Bit11 (964~986) 23 975,

 1208 20:15:11.597896  TX Bit4 (974~995) 22 984,   Bit12 (966~987) 22 976,

 1209 20:15:11.597978  TX Bit5 (970~990) 21 980,   Bit13 (965~985) 21 975,

 1210 20:15:11.598059  TX Bit6 (971~991) 21 981,   Bit14 (966~988) 23 977,

 1211 20:15:11.598140  TX Bit7 (975~992) 18 983,   Bit15 (969~989) 21 979,

 1212 20:15:11.598220  

 1213 20:15:11.598300  Write Rank0 MR14 =0xc

 1214 20:15:11.598383  

 1215 20:15:11.598465  	CH=0, VrefRange= 0, VrefLevel = 12

 1216 20:15:11.598548  TX Bit0 (976~997) 22 986,   Bit8 (964~987) 24 975,

 1217 20:15:11.598632  TX Bit1 (976~995) 20 985,   Bit9 (966~987) 22 976,

 1218 20:15:11.598713  TX Bit2 (975~994) 20 984,   Bit10 (969~991) 23 980,

 1219 20:15:11.598794  TX Bit3 (969~990) 22 979,   Bit11 (963~987) 25 975,

 1220 20:15:11.598875  TX Bit4 (974~996) 23 985,   Bit12 (965~987) 23 976,

 1221 20:15:11.598958  TX Bit5 (970~991) 22 980,   Bit13 (964~985) 22 974,

 1222 20:15:11.599043  TX Bit6 (971~991) 21 981,   Bit14 (966~988) 23 977,

 1223 20:15:11.599125  TX Bit7 (975~993) 19 984,   Bit15 (968~989) 22 978,

 1224 20:15:11.599208  

 1225 20:15:11.599288  Write Rank0 MR14 =0xe

 1226 20:15:11.599368  

 1227 20:15:11.599448  	CH=0, VrefRange= 0, VrefLevel = 14

 1228 20:15:11.599529  TX Bit0 (976~997) 22 986,   Bit8 (963~988) 26 975,

 1229 20:15:11.599613  TX Bit1 (976~995) 20 985,   Bit9 (966~987) 22 976,

 1230 20:15:11.599696  TX Bit2 (975~995) 21 985,   Bit10 (969~992) 24 980,

 1231 20:15:11.599781  TX Bit3 (969~990) 22 979,   Bit11 (962~987) 26 974,

 1232 20:15:11.599865  TX Bit4 (974~996) 23 985,   Bit12 (965~988) 24 976,

 1233 20:15:11.599947  TX Bit5 (970~991) 22 980,   Bit13 (964~986) 23 975,

 1234 20:15:11.600028  TX Bit6 (970~992) 23 981,   Bit14 (965~989) 25 977,

 1235 20:15:11.600110  TX Bit7 (974~994) 21 984,   Bit15 (968~990) 23 979,

 1236 20:15:11.600190  

 1237 20:15:11.600292  Write Rank0 MR14 =0x10

 1238 20:15:11.600402  

 1239 20:15:11.600527  	CH=0, VrefRange= 0, VrefLevel = 16

 1240 20:15:11.600611  TX Bit0 (976~998) 23 987,   Bit8 (964~988) 25 976,

 1241 20:15:11.600693  TX Bit1 (975~996) 22 985,   Bit9 (965~988) 24 976,

 1242 20:15:11.600774  TX Bit2 (975~995) 21 985,   Bit10 (969~992) 24 980,

 1243 20:15:11.600855  TX Bit3 (968~991) 24 979,   Bit11 (962~988) 27 975,

 1244 20:15:11.600937  TX Bit4 (973~996) 24 984,   Bit12 (965~988) 24 976,

 1245 20:15:11.601058  TX Bit5 (969~992) 24 980,   Bit13 (963~986) 24 974,

 1246 20:15:11.601140  TX Bit6 (970~992) 23 981,   Bit14 (965~989) 25 977,

 1247 20:15:11.601250  TX Bit7 (974~993) 20 983,   Bit15 (968~990) 23 979,

 1248 20:15:11.601356  

 1249 20:15:11.601437  Write Rank0 MR14 =0x12

 1250 20:15:11.601517  

 1251 20:15:11.601597  	CH=0, VrefRange= 0, VrefLevel = 18

 1252 20:15:11.601678  TX Bit0 (975~998) 24 986,   Bit8 (963~989) 27 976,

 1253 20:15:11.601760  TX Bit1 (975~996) 22 985,   Bit9 (965~989) 25 977,

 1254 20:15:11.601842  TX Bit2 (974~996) 23 985,   Bit10 (969~992) 24 980,

 1255 20:15:11.601923  TX Bit3 (968~991) 24 979,   Bit11 (962~988) 27 975,

 1256 20:15:11.602004  TX Bit4 (973~997) 25 985,   Bit12 (965~989) 25 977,

 1257 20:15:11.602127  TX Bit5 (969~992) 24 980,   Bit13 (963~987) 25 975,

 1258 20:15:11.602210  TX Bit6 (970~993) 24 981,   Bit14 (965~989) 25 977,

 1259 20:15:11.602294  TX Bit7 (973~994) 22 983,   Bit15 (968~990) 23 979,

 1260 20:15:11.602376  

 1261 20:15:11.602456  Write Rank0 MR14 =0x14

 1262 20:15:11.602536  

 1263 20:15:11.602616  	CH=0, VrefRange= 0, VrefLevel = 20

 1264 20:15:11.602697  TX Bit0 (975~999) 25 987,   Bit8 (963~989) 27 976,

 1265 20:15:11.602779  TX Bit1 (975~997) 23 986,   Bit9 (964~989) 26 976,

 1266 20:15:11.602904  TX Bit2 (974~996) 23 985,   Bit10 (968~993) 26 980,

 1267 20:15:11.602988  TX Bit3 (968~992) 25 980,   Bit11 (962~988) 27 975,

 1268 20:15:11.603070  TX Bit4 (973~998) 26 985,   Bit12 (965~989) 25 977,

 1269 20:15:11.603151  TX Bit5 (969~992) 24 980,   Bit13 (963~988) 26 975,

 1270 20:15:11.603232  TX Bit6 (969~993) 25 981,   Bit14 (964~989) 26 976,

 1271 20:15:11.603314  TX Bit7 (972~995) 24 983,   Bit15 (967~990) 24 978,

 1272 20:15:11.603394  

 1273 20:15:11.603474  Write Rank0 MR14 =0x16

 1274 20:15:11.603554  

 1275 20:15:11.603634  	CH=0, VrefRange= 0, VrefLevel = 22

 1276 20:15:11.603715  TX Bit0 (975~999) 25 987,   Bit8 (962~988) 27 975,

 1277 20:15:11.603797  TX Bit1 (975~997) 23 986,   Bit9 (964~989) 26 976,

 1278 20:15:11.603880  TX Bit2 (974~997) 24 985,   Bit10 (968~992) 25 980,

 1279 20:15:11.603962  TX Bit3 (968~992) 25 980,   Bit11 (962~988) 27 975,

 1280 20:15:11.604240  TX Bit4 (972~998) 27 985,   Bit12 (963~989) 27 976,

 1281 20:15:11.604371  TX Bit5 (969~993) 25 981,   Bit13 (962~988) 27 975,

 1282 20:15:11.604434  TX Bit6 (969~993) 25 981,   Bit14 (964~989) 26 976,

 1283 20:15:11.604519  TX Bit7 (972~995) 24 983,   Bit15 (967~991) 25 979,

 1284 20:15:11.604603  

 1285 20:15:11.604685  Write Rank0 MR14 =0x18

 1286 20:15:11.604765  

 1287 20:15:11.604846  	CH=0, VrefRange= 0, VrefLevel = 24

 1288 20:15:11.604927  TX Bit0 (975~999) 25 987,   Bit8 (962~987) 26 974,

 1289 20:15:11.605009  TX Bit1 (974~998) 25 986,   Bit9 (964~989) 26 976,

 1290 20:15:11.605107  TX Bit2 (974~997) 24 985,   Bit10 (968~992) 25 980,

 1291 20:15:11.605194  TX Bit3 (968~992) 25 980,   Bit11 (962~988) 27 975,

 1292 20:15:11.605300  TX Bit4 (973~998) 26 985,   Bit12 (964~989) 26 976,

 1293 20:15:11.605384  TX Bit5 (969~993) 25 981,   Bit13 (963~989) 27 976,

 1294 20:15:11.605466  TX Bit6 (969~994) 26 981,   Bit14 (965~989) 25 977,

 1295 20:15:11.605547  TX Bit7 (972~995) 24 983,   Bit15 (967~990) 24 978,

 1296 20:15:11.605627  

 1297 20:15:11.605707  Write Rank0 MR14 =0x1a

 1298 20:15:11.605787  

 1299 20:15:11.605912  	CH=0, VrefRange= 0, VrefLevel = 26

 1300 20:15:11.605997  TX Bit0 (975~999) 25 987,   Bit8 (962~987) 26 974,

 1301 20:15:11.606079  TX Bit1 (974~998) 25 986,   Bit9 (964~989) 26 976,

 1302 20:15:11.606161  TX Bit2 (974~997) 24 985,   Bit10 (968~992) 25 980,

 1303 20:15:11.606242  TX Bit3 (968~992) 25 980,   Bit11 (962~988) 27 975,

 1304 20:15:11.606324  TX Bit4 (973~998) 26 985,   Bit12 (964~989) 26 976,

 1305 20:15:11.606405  TX Bit5 (969~993) 25 981,   Bit13 (963~989) 27 976,

 1306 20:15:11.606486  TX Bit6 (969~994) 26 981,   Bit14 (965~989) 25 977,

 1307 20:15:11.606567  TX Bit7 (972~995) 24 983,   Bit15 (967~990) 24 978,

 1308 20:15:11.606649  

 1309 20:15:11.606731  Write Rank0 MR14 =0x1c

 1310 20:15:11.606812  

 1311 20:15:11.606893  	CH=0, VrefRange= 0, VrefLevel = 28

 1312 20:15:11.606974  TX Bit0 (975~999) 25 987,   Bit8 (962~987) 26 974,

 1313 20:15:11.607056  TX Bit1 (974~998) 25 986,   Bit9 (964~989) 26 976,

 1314 20:15:11.607139  TX Bit2 (974~997) 24 985,   Bit10 (968~992) 25 980,

 1315 20:15:11.607220  TX Bit3 (968~992) 25 980,   Bit11 (962~988) 27 975,

 1316 20:15:11.607303  TX Bit4 (973~998) 26 985,   Bit12 (964~989) 26 976,

 1317 20:15:11.607384  TX Bit5 (969~993) 25 981,   Bit13 (963~989) 27 976,

 1318 20:15:11.607465  TX Bit6 (969~994) 26 981,   Bit14 (965~989) 25 977,

 1319 20:15:11.607547  TX Bit7 (972~995) 24 983,   Bit15 (967~990) 24 978,

 1320 20:15:11.607637  

 1321 20:15:11.607719  Write Rank0 MR14 =0x1e

 1322 20:15:11.607798  

 1323 20:15:11.607881  	CH=0, VrefRange= 0, VrefLevel = 30

 1324 20:15:11.607965  TX Bit0 (975~999) 25 987,   Bit8 (962~987) 26 974,

 1325 20:15:11.608048  TX Bit1 (974~998) 25 986,   Bit9 (964~989) 26 976,

 1326 20:15:11.608131  TX Bit2 (974~997) 24 985,   Bit10 (968~992) 25 980,

 1327 20:15:11.608187  TX Bit3 (968~992) 25 980,   Bit11 (962~988) 27 975,

 1328 20:15:11.608264  TX Bit4 (973~998) 26 985,   Bit12 (964~989) 26 976,

 1329 20:15:11.608330  TX Bit5 (969~993) 25 981,   Bit13 (963~989) 27 976,

 1330 20:15:11.608398  TX Bit6 (969~994) 26 981,   Bit14 (965~989) 25 977,

 1331 20:15:11.608499  TX Bit7 (972~995) 24 983,   Bit15 (967~990) 24 978,

 1332 20:15:11.608550  

 1333 20:15:11.608600  

 1334 20:15:11.608651  TX Vref found, early break! 374< 385

 1335 20:15:11.608703  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1336 20:15:11.608754  u1DelayCellOfst[0]=8 cells (7 PI)

 1337 20:15:11.608804  u1DelayCellOfst[1]=7 cells (6 PI)

 1338 20:15:11.608876  u1DelayCellOfst[2]=6 cells (5 PI)

 1339 20:15:11.608959  u1DelayCellOfst[3]=0 cells (0 PI)

 1340 20:15:11.609042  u1DelayCellOfst[4]=6 cells (5 PI)

 1341 20:15:11.609122  u1DelayCellOfst[5]=1 cells (1 PI)

 1342 20:15:11.609210  u1DelayCellOfst[6]=1 cells (1 PI)

 1343 20:15:11.609336  u1DelayCellOfst[7]=3 cells (3 PI)

 1344 20:15:11.609420  Byte0, DQ PI dly=980, DQM PI dly= 983

 1345 20:15:11.609501  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 1346 20:15:11.609624  

 1347 20:15:11.609739  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 1348 20:15:11.609821  

 1349 20:15:11.609901  u1DelayCellOfst[8]=0 cells (0 PI)

 1350 20:15:11.609982  u1DelayCellOfst[9]=2 cells (2 PI)

 1351 20:15:11.610062  u1DelayCellOfst[10]=7 cells (6 PI)

 1352 20:15:11.610143  u1DelayCellOfst[11]=1 cells (1 PI)

 1353 20:15:11.610226  u1DelayCellOfst[12]=2 cells (2 PI)

 1354 20:15:11.610308  u1DelayCellOfst[13]=2 cells (2 PI)

 1355 20:15:11.610388  u1DelayCellOfst[14]=3 cells (3 PI)

 1356 20:15:11.610486  u1DelayCellOfst[15]=5 cells (4 PI)

 1357 20:15:11.610583  Byte1, DQ PI dly=974, DQM PI dly= 977

 1358 20:15:11.610666  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)

 1359 20:15:11.610746  

 1360 20:15:11.610827  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)

 1361 20:15:11.610910  

 1362 20:15:11.610991  Write Rank0 MR14 =0x18

 1363 20:15:11.611070  

 1364 20:15:11.611151  Final TX Range 0 Vref 24

 1365 20:15:11.611241  

 1366 20:15:11.611323  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1367 20:15:11.611403  

 1368 20:15:11.611516  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1369 20:15:11.611601  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1370 20:15:11.611685  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1371 20:15:11.611767  Write Rank0 MR3 =0xb0

 1372 20:15:11.611847  DramC Write-DBI on

 1373 20:15:11.611926  ==

 1374 20:15:11.612007  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1375 20:15:11.612088  fsp= 1, odt_onoff= 1, Byte mode= 0

 1376 20:15:11.612167  ==

 1377 20:15:11.612286  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1378 20:15:11.612367  

 1379 20:15:11.612429  Begin, DQ Scan Range 697~761

 1380 20:15:11.612511  

 1381 20:15:11.612590  

 1382 20:15:11.612669  	TX Vref Scan disable

 1383 20:15:11.612749  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1384 20:15:11.612832  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1385 20:15:11.612915  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1386 20:15:11.612999  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1387 20:15:11.613082  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1388 20:15:11.613165  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1389 20:15:11.613247  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1390 20:15:11.613353  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1391 20:15:11.613438  705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]

 1392 20:15:11.613521  706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]

 1393 20:15:11.613796  707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]

 1394 20:15:11.613883  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 1395 20:15:11.613966  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 1396 20:15:11.614049  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 1397 20:15:11.614131  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1398 20:15:11.614241  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1399 20:15:11.614299  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1400 20:15:11.614383  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 1401 20:15:11.614470  734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]

 1402 20:15:11.614554  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 1403 20:15:11.614637  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 1404 20:15:11.614720  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 1405 20:15:11.614802  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 1406 20:15:11.614884  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 1407 20:15:11.614967  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 1408 20:15:11.615053  741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1409 20:15:11.615137  Byte0, DQ PI dly=727, DQM PI dly= 727

 1410 20:15:11.615217  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)

 1411 20:15:11.615298  

 1412 20:15:11.615378  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)

 1413 20:15:11.615458  

 1414 20:15:11.615537  Byte1, DQ PI dly=719, DQM PI dly= 719

 1415 20:15:11.615618  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)

 1416 20:15:11.615698  

 1417 20:15:11.615778  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)

 1418 20:15:11.615860  

 1419 20:15:11.615944  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 1420 20:15:11.616025  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1421 20:15:11.616107  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1422 20:15:11.616187  Write Rank0 MR3 =0x30

 1423 20:15:11.616267  DramC Write-DBI off

 1424 20:15:11.616346  

 1425 20:15:11.616425  [DATLAT]

 1426 20:15:11.616497  Freq=1600, CH0 RK0, use_rxtx_scan=0

 1427 20:15:11.616578  

 1428 20:15:11.616658  DATLAT Default: 0xf

 1429 20:15:11.616737  7, 0xFFFF, sum=0

 1430 20:15:11.616818  8, 0xFFFF, sum=0

 1431 20:15:11.616899  9, 0xFFFF, sum=0

 1432 20:15:11.616981  10, 0xFFFF, sum=0

 1433 20:15:11.617062  11, 0xFFFF, sum=0

 1434 20:15:11.617144  12, 0xFFFF, sum=0

 1435 20:15:11.617225  13, 0xFFFF, sum=0

 1436 20:15:11.617348  14, 0x0, sum=1

 1437 20:15:11.617431  15, 0x0, sum=2

 1438 20:15:11.617512  16, 0x0, sum=3

 1439 20:15:11.617594  17, 0x0, sum=4

 1440 20:15:11.617676  pattern=2 first_step=14 total pass=5 best_step=16

 1441 20:15:11.617756  ==

 1442 20:15:11.617837  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1443 20:15:11.617917  fsp= 1, odt_onoff= 1, Byte mode= 0

 1444 20:15:11.617997  ==

 1445 20:15:11.618077  Start DQ dly to find pass range UseTestEngine =1

 1446 20:15:11.618157  x-axis: bit #, y-axis: DQ dly (-127~63)

 1447 20:15:11.618238  RX Vref Scan = 1

 1448 20:15:11.618326  

 1449 20:15:11.618411  RX Vref found, early break!

 1450 20:15:11.618492  

 1451 20:15:11.618572  Final RX Vref 13, apply to both rank0 and 1

 1452 20:15:11.618652  ==

 1453 20:15:11.618732  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1454 20:15:11.618813  fsp= 1, odt_onoff= 1, Byte mode= 0

 1455 20:15:11.618892  ==

 1456 20:15:11.618972  DQS Delay:

 1457 20:15:11.619051  DQS0 = 0, DQS1 = 0

 1458 20:15:11.619130  DQM Delay:

 1459 20:15:11.619210  DQM0 = 20, DQM1 = 19

 1460 20:15:11.619289  DQ Delay:

 1461 20:15:11.619371  DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15

 1462 20:15:11.619453  DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =19

 1463 20:15:11.619534  DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16

 1464 20:15:11.619614  DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20

 1465 20:15:11.619693  

 1466 20:15:11.619772  

 1467 20:15:11.619850  

 1468 20:15:11.619929  [DramC_TX_OE_Calibration] TA2

 1469 20:15:11.620009  Original DQ_B0 (3 6) =30, OEN = 27

 1470 20:15:11.620097  Original DQ_B1 (3 6) =30, OEN = 27

 1471 20:15:11.620191  23, 0x0, End_B0=23 End_B1=23

 1472 20:15:11.620311  24, 0x0, End_B0=24 End_B1=24

 1473 20:15:11.620395  25, 0x0, End_B0=25 End_B1=25

 1474 20:15:11.620477  26, 0x0, End_B0=26 End_B1=26

 1475 20:15:11.620559  27, 0x0, End_B0=27 End_B1=27

 1476 20:15:11.620641  28, 0x0, End_B0=28 End_B1=28

 1477 20:15:11.620723  29, 0x0, End_B0=29 End_B1=29

 1478 20:15:11.620804  30, 0x0, End_B0=30 End_B1=30

 1479 20:15:11.620886  31, 0xFFFF, End_B0=30 End_B1=30

 1480 20:15:11.620972  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1481 20:15:11.621054  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1482 20:15:11.621135  

 1483 20:15:11.621214  

 1484 20:15:11.621322  Write Rank0 MR23 =0x3f

 1485 20:15:11.621388  [DQSOSC]

 1486 20:15:11.621458  [DQSOSCAuto] RK0, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps

 1487 20:15:11.621540  CH0_RK0: MR19=0x3, MR18=0xAD, DQSOSC=334, MR23=63, INC=22, DEC=33

 1488 20:15:11.621621  Write Rank0 MR23 =0x3f

 1489 20:15:11.621698  [DQSOSC]

 1490 20:15:11.621754  [DQSOSCAuto] RK0, (LSB)MR18= 0xae, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps

 1491 20:15:11.621809  CH0 RK0: MR19=3, MR18=AE

 1492 20:15:11.621860  [RankSwap] Rank num 2, (Multi 1), Rank 1

 1493 20:15:11.621911  Write Rank0 MR2 =0xad

 1494 20:15:11.621961  [Write Leveling]

 1495 20:15:11.622011  delay  byte0  byte1  byte2  byte3

 1496 20:15:11.622062  

 1497 20:15:11.622112  10    0   0   

 1498 20:15:11.622164  11    0   0   

 1499 20:15:11.622215  12    0   0   

 1500 20:15:11.622266  13    0   0   

 1501 20:15:11.622317  14    0   0   

 1502 20:15:11.622371  15    0   0   

 1503 20:15:11.622432  16    0   0   

 1504 20:15:11.622513  17    0   0   

 1505 20:15:11.622594  18    0   0   

 1506 20:15:11.622677  19    0   0   

 1507 20:15:11.622760  20    0   0   

 1508 20:15:11.622841  21    0   0   

 1509 20:15:11.622923  22    0   0   

 1510 20:15:11.623004  23    0   0   

 1511 20:15:11.623085  24    0   0   

 1512 20:15:11.623167  25    0   0   

 1513 20:15:11.623248  26    0   0   

 1514 20:15:11.623329  27    0   0   

 1515 20:15:11.623413  28    0   0   

 1516 20:15:11.623494  29    0   0   

 1517 20:15:11.623575  30    0   ff   

 1518 20:15:11.623658  31    0   ff   

 1519 20:15:11.623741  32    0   ff   

 1520 20:15:11.623823  33    0   ff   

 1521 20:15:11.623904  34    ff   ff   

 1522 20:15:11.623986  35    ff   ff   

 1523 20:15:11.624067  36    ff   ff   

 1524 20:15:11.624149  37    ff   ff   

 1525 20:15:11.624230  38    ff   ff   

 1526 20:15:11.624312  39    ff   ff   

 1527 20:15:11.624379  40    ff   ff   

 1528 20:15:11.624434  pass bytecount = 0xff (0xff: all bytes pass) 

 1529 20:15:11.624485  

 1530 20:15:11.624535  DQS0 dly: 34

 1531 20:15:11.624589  DQS1 dly: 30

 1532 20:15:11.624654  Write Rank0 MR2 =0x2d

 1533 20:15:11.624735  [RankSwap] Rank num 2, (Multi 1), Rank 0

 1534 20:15:11.624815  Write Rank1 MR1 =0xd6

 1535 20:15:11.624898  [Gating]

 1536 20:15:11.624983  ==

 1537 20:15:11.625064  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1538 20:15:11.625144  fsp= 1, odt_onoff= 1, Byte mode= 0

 1539 20:15:11.625224  ==

 1540 20:15:11.625348  3 1 0 |2c2b 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 1541 20:15:11.625432  3 1 4 |2c2b 2c2b  |(11 11)(11 11) |(0 0)(0 0)| 0

 1542 20:15:11.625511  3 1 8 |2c2b 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 1543 20:15:11.625765  3 1 12 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1544 20:15:11.625855  3 1 16 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1545 20:15:11.625939  3 1 20 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1546 20:15:11.626021  3 1 24 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1547 20:15:11.626104  3 1 28 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1548 20:15:11.626186  3 2 0 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1549 20:15:11.626307  3 2 4 |2c2b 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1550 20:15:11.626393  3 2 8 |2625 2c2b  |(11 11)(11 11) |(1 0)(1 0)| 0

 1551 20:15:11.626480  3 2 12 |2727 2c2c  |(11 11)(11 0) |(0 0)(0 0)| 0

 1552 20:15:11.626566  3 2 16 |3534 1818  |(11 11)(11 11) |(0 0)(0 0)| 0

 1553 20:15:11.626648  3 2 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1554 20:15:11.626731  3 2 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1555 20:15:11.626822  3 2 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1556 20:15:11.626911  3 3 0 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1557 20:15:11.626998  3 3 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1558 20:15:11.627084  3 3 8 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1559 20:15:11.627167  3 3 12 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1560 20:15:11.627251  3 3 16 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1561 20:15:11.627337  [Byte 0] Lead/lag Transition tap number (1)

 1562 20:15:11.627421  3 3 20 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1563 20:15:11.627505  3 3 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1564 20:15:11.627587  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1565 20:15:11.627672  3 4 0 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1566 20:15:11.627755  3 4 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1567 20:15:11.627837  3 4 8 |504 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 1568 20:15:11.627922  3 4 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1569 20:15:11.628004  3 4 16 |3d3d 1514  |(11 11)(11 11) |(1 1)(1 1)| 0

 1570 20:15:11.628096  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1571 20:15:11.628180  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1572 20:15:11.628263  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1573 20:15:11.628378  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1574 20:15:11.628465  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1575 20:15:11.628550  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1576 20:15:11.628632  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1577 20:15:11.628714  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1578 20:15:11.628797  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1579 20:15:11.628881  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1580 20:15:11.628965  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1581 20:15:11.629047  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1582 20:15:11.629129  [Byte 0] Lead/lag falling Transition (3, 6, 0)

 1583 20:15:11.629210  [Byte 1] Lead/lag falling Transition (3, 6, 0)

 1584 20:15:11.629337  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 0)| 0

 1585 20:15:11.629414  [Byte 0] Lead/lag Transition tap number (2)

 1586 20:15:11.629470  3 6 8 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 1587 20:15:11.629526  [Byte 1] Lead/lag Transition tap number (3)

 1588 20:15:11.629605  3 6 12 |4646 3e3d  |(0 0)(11 11) |(0 0)(0 0)| 0

 1589 20:15:11.629687  [Byte 0]First pass (3, 6, 12)

 1590 20:15:11.629767  3 6 16 |4646 404  |(0 0)(11 11) |(0 0)(0 0)| 0

 1591 20:15:11.629852  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1592 20:15:11.629935  [Byte 1]First pass (3, 6, 20)

 1593 20:15:11.630017  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1594 20:15:11.630101  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1595 20:15:11.630183  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1596 20:15:11.630265  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1597 20:15:11.630352  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1598 20:15:11.630438  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1599 20:15:11.630522  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1600 20:15:11.630607  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1601 20:15:11.630689  All bytes gating window > 1UI, Early break!

 1602 20:15:11.630768  

 1603 20:15:11.630848  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)

 1604 20:15:11.630927  

 1605 20:15:11.631007  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)

 1606 20:15:11.631086  

 1607 20:15:11.631164  

 1608 20:15:11.631243  

 1609 20:15:11.631322  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)

 1610 20:15:11.631403  

 1611 20:15:11.631485  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)

 1612 20:15:11.631565  

 1613 20:15:11.631644  

 1614 20:15:11.631724  Write Rank1 MR1 =0x56

 1615 20:15:11.631813  

 1616 20:15:11.631895  best RODT dly(2T, 0.5T) = (2, 3)

 1617 20:15:11.631976  

 1618 20:15:11.632057  best RODT dly(2T, 0.5T) = (2, 3)

 1619 20:15:11.632136  ==

 1620 20:15:11.632217  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1621 20:15:11.632297  fsp= 1, odt_onoff= 1, Byte mode= 0

 1622 20:15:11.632370  ==

 1623 20:15:11.632426  Start DQ dly to find pass range UseTestEngine =0

 1624 20:15:11.632478  x-axis: bit #, y-axis: DQ dly (-127~63)

 1625 20:15:11.632558  RX Vref Scan = 0

 1626 20:15:11.632638  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 1627 20:15:11.632720  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 1628 20:15:11.632802  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 1629 20:15:11.632884  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 1630 20:15:11.632965  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 1631 20:15:11.633047  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 1632 20:15:11.633128  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 1633 20:15:11.633210  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 1634 20:15:11.633332  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 1635 20:15:11.633416  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 1636 20:15:11.633498  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 1637 20:15:11.633580  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 1638 20:15:11.633662  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 1639 20:15:11.633744  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 1640 20:15:11.633826  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 1641 20:15:11.633907  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 1642 20:15:11.633989  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 1643 20:15:11.634071  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 1644 20:15:11.634152  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 1645 20:15:11.634233  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1646 20:15:11.634315  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1647 20:15:11.634396  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1648 20:15:11.634673  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1649 20:15:11.634761  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 1650 20:15:11.634843  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 1651 20:15:11.634925  -1, [0] xxxoxxxx xxxoxoxx [MSB]

 1652 20:15:11.635007  0, [0] xxxoxxxx oxxoxoxx [MSB]

 1653 20:15:11.635089  1, [0] xxxoxoxx ooxoooox [MSB]

 1654 20:15:11.635149  2, [0] xxxoxooo ooxoooox [MSB]

 1655 20:15:11.635229  3, [0] xxxoxooo ooxooooo [MSB]

 1656 20:15:11.635311  4, [0] xxxoxooo ooxooooo [MSB]

 1657 20:15:11.635392  5, [0] xxxoxooo oooooooo [MSB]

 1658 20:15:11.635474  6, [0] xxxooooo oooooooo [MSB]

 1659 20:15:11.635558  7, [0] xooooooo oooooooo [MSB]

 1660 20:15:11.635641  8, [0] xooooooo oooooooo [MSB]

 1661 20:15:11.635725  9, [0] xooooooo oooooooo [MSB]

 1662 20:15:11.635807  35, [0] oooxoooo oooxoooo [MSB]

 1663 20:15:11.635891  36, [0] oooxoxoo oooxoxxo [MSB]

 1664 20:15:11.635975  37, [0] oooxoxxx xooxoxxo [MSB]

 1665 20:15:11.636057  38, [0] oooxoxxx xxoxxxxo [MSB]

 1666 20:15:11.636138  39, [0] oooxoxxx xxoxxxxx [MSB]

 1667 20:15:11.636221  40, [0] oooxoxxx xxoxxxxx [MSB]

 1668 20:15:11.636301  41, [0] oooxoxxx xxoxxxxx [MSB]

 1669 20:15:11.636354  42, [0] oooxxxxx xxoxxxxx [MSB]

 1670 20:15:11.636406  43, [0] xxxxxxxx xxxxxxxx [MSB]

 1671 20:15:11.636458  iDelay=43, Bit 0, Center 26 (10 ~ 42) 33

 1672 20:15:11.636509  iDelay=43, Bit 1, Center 24 (7 ~ 42) 36

 1673 20:15:11.636559  iDelay=43, Bit 2, Center 24 (7 ~ 42) 36

 1674 20:15:11.636609  iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36

 1675 20:15:11.636659  iDelay=43, Bit 4, Center 23 (6 ~ 41) 36

 1676 20:15:11.636709  iDelay=43, Bit 5, Center 18 (1 ~ 35) 35

 1677 20:15:11.636791  iDelay=43, Bit 6, Center 19 (2 ~ 36) 35

 1678 20:15:11.636872  iDelay=43, Bit 7, Center 19 (2 ~ 36) 35

 1679 20:15:11.636951  iDelay=43, Bit 8, Center 18 (0 ~ 36) 37

 1680 20:15:11.637033  iDelay=43, Bit 9, Center 19 (1 ~ 37) 37

 1681 20:15:11.637114  iDelay=43, Bit 10, Center 23 (5 ~ 42) 38

 1682 20:15:11.637194  iDelay=43, Bit 11, Center 16 (-1 ~ 34) 36

 1683 20:15:11.637277  iDelay=43, Bit 12, Center 19 (1 ~ 37) 37

 1684 20:15:11.637363  iDelay=43, Bit 13, Center 17 (-1 ~ 35) 37

 1685 20:15:11.637414  iDelay=43, Bit 14, Center 18 (1 ~ 35) 35

 1686 20:15:11.637464  iDelay=43, Bit 15, Center 20 (3 ~ 38) 36

 1687 20:15:11.637515  ==

 1688 20:15:11.637576  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1689 20:15:11.637640  fsp= 1, odt_onoff= 1, Byte mode= 0

 1690 20:15:11.637710  ==

 1691 20:15:11.637792  DQS Delay:

 1692 20:15:11.637877  DQS0 = 0, DQS1 = 0

 1693 20:15:11.637963  DQM Delay:

 1694 20:15:11.638046  DQM0 = 21, DQM1 = 18

 1695 20:15:11.638125  DQ Delay:

 1696 20:15:11.638208  DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =16

 1697 20:15:11.638301  DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19

 1698 20:15:11.638382  DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =16

 1699 20:15:11.638462  DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20

 1700 20:15:11.638541  

 1701 20:15:11.638622  

 1702 20:15:11.638704  DramC Write-DBI off

 1703 20:15:11.638785  ==

 1704 20:15:11.638866  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1705 20:15:11.638946  fsp= 1, odt_onoff= 1, Byte mode= 0

 1706 20:15:11.639025  ==

 1707 20:15:11.639107  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1708 20:15:11.639188  

 1709 20:15:11.639267  Begin, DQ Scan Range 926~1182

 1710 20:15:11.639346  

 1711 20:15:11.639425  

 1712 20:15:11.639504  	TX Vref Scan disable

 1713 20:15:11.639583  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1714 20:15:11.639666  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1715 20:15:11.639748  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1716 20:15:11.639830  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1717 20:15:11.639915  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1718 20:15:11.639998  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1719 20:15:11.640080  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1720 20:15:11.640162  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1721 20:15:11.640244  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1722 20:15:11.640326  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1723 20:15:11.640408  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1724 20:15:11.640490  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1725 20:15:11.640572  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1726 20:15:11.640654  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1727 20:15:11.640736  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1728 20:15:11.640818  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1729 20:15:11.640900  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1730 20:15:11.640982  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1731 20:15:11.641064  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1732 20:15:11.641147  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1733 20:15:11.641231  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1734 20:15:11.641352  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1735 20:15:11.641435  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1736 20:15:11.641517  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1737 20:15:11.641599  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1738 20:15:11.641693  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1739 20:15:11.641777  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1740 20:15:11.641859  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1741 20:15:11.641942  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1742 20:15:11.642024  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1743 20:15:11.642106  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1744 20:15:11.642188  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1745 20:15:11.642271  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1746 20:15:11.642353  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1747 20:15:11.642409  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1748 20:15:11.642461  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1749 20:15:11.642513  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1750 20:15:11.642564  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1751 20:15:11.642615  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1752 20:15:11.642671  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1753 20:15:11.642724  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1754 20:15:11.642777  967 |3 6 7|[0] xxxxxxxx oxxoxoxx [MSB]

 1755 20:15:11.642829  968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]

 1756 20:15:11.642880  969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]

 1757 20:15:11.642931  970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]

 1758 20:15:11.642982  971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]

 1759 20:15:11.643033  972 |3 6 12|[0] xxxoxxxx ooxooooo [MSB]

 1760 20:15:11.643084  973 |3 6 13|[0] xxxoxoox oooooooo [MSB]

 1761 20:15:11.643134  974 |3 6 14|[0] xxxoxoox oooooooo [MSB]

 1762 20:15:11.643185  975 |3 6 15|[0] xxxoxoox oooooooo [MSB]

 1763 20:15:11.643236  976 |3 6 16|[0] xxxoxooo oooooooo [MSB]

 1764 20:15:11.643287  977 |3 6 17|[0] xooooooo oooooooo [MSB]

 1765 20:15:11.643528  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1766 20:15:11.643597  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1767 20:15:11.643654  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 1768 20:15:11.643710  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 1769 20:15:11.643791  994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB]

 1770 20:15:11.643873  995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]

 1771 20:15:11.643955  996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]

 1772 20:15:11.644038  997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]

 1773 20:15:11.644120  998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1774 20:15:11.644203  Byte0, DQ PI dly=985, DQM PI dly= 985

 1775 20:15:11.644283  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)

 1776 20:15:11.644363  

 1777 20:15:11.644420  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)

 1778 20:15:11.644501  

 1779 20:15:11.644567  Byte1, DQ PI dly=979, DQM PI dly= 979

 1780 20:15:11.644627  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 1781 20:15:11.644709  

 1782 20:15:11.644789  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 1783 20:15:11.644868  

 1784 20:15:11.644947  ==

 1785 20:15:11.645028  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1786 20:15:11.645108  fsp= 1, odt_onoff= 1, Byte mode= 0

 1787 20:15:11.645187  ==

 1788 20:15:11.645300  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1789 20:15:11.645368  

 1790 20:15:11.645419  Begin, DQ Scan Range 955~1019

 1791 20:15:11.645470  Write Rank1 MR14 =0x0

 1792 20:15:11.645521  

 1793 20:15:11.645599  	CH=0, VrefRange= 0, VrefLevel = 0

 1794 20:15:11.645670  TX Bit0 (980~998) 19 989,   Bit8 (969~986) 18 977,

 1795 20:15:11.645728  TX Bit1 (978~996) 19 987,   Bit9 (970~987) 18 978,

 1796 20:15:11.645783  TX Bit2 (978~996) 19 987,   Bit10 (975~991) 17 983,

 1797 20:15:11.645835  TX Bit3 (973~991) 19 982,   Bit11 (969~986) 18 977,

 1798 20:15:11.645886  TX Bit4 (978~997) 20 987,   Bit12 (969~988) 20 978,

 1799 20:15:11.645937  TX Bit5 (976~990) 15 983,   Bit13 (969~986) 18 977,

 1800 20:15:11.645987  TX Bit6 (976~992) 17 984,   Bit14 (970~986) 17 978,

 1801 20:15:11.646037  TX Bit7 (978~993) 16 985,   Bit15 (974~990) 17 982,

 1802 20:15:11.646087  

 1803 20:15:11.646137  Write Rank1 MR14 =0x2

 1804 20:15:11.646187  

 1805 20:15:11.646238  	CH=0, VrefRange= 0, VrefLevel = 2

 1806 20:15:11.646288  TX Bit0 (979~998) 20 988,   Bit8 (969~987) 19 978,

 1807 20:15:11.646339  TX Bit1 (978~997) 20 987,   Bit9 (970~988) 19 979,

 1808 20:15:11.646393  TX Bit2 (978~996) 19 987,   Bit10 (975~991) 17 983,

 1809 20:15:11.646448  TX Bit3 (973~991) 19 982,   Bit11 (968~987) 20 977,

 1810 20:15:11.646499  TX Bit4 (978~997) 20 987,   Bit12 (969~989) 21 979,

 1811 20:15:11.646549  TX Bit5 (976~991) 16 983,   Bit13 (969~986) 18 977,

 1812 20:15:11.646602  TX Bit6 (976~992) 17 984,   Bit14 (969~987) 19 978,

 1813 20:15:11.646654  TX Bit7 (978~993) 16 985,   Bit15 (973~990) 18 981,

 1814 20:15:11.646707  

 1815 20:15:11.646757  Write Rank1 MR14 =0x4

 1816 20:15:11.646806  

 1817 20:15:11.646856  	CH=0, VrefRange= 0, VrefLevel = 4

 1818 20:15:11.646905  TX Bit0 (979~998) 20 988,   Bit8 (968~988) 21 978,

 1819 20:15:11.646956  TX Bit1 (978~998) 21 988,   Bit9 (969~989) 21 979,

 1820 20:15:11.647006  TX Bit2 (978~997) 20 987,   Bit10 (975~991) 17 983,

 1821 20:15:11.647057  TX Bit3 (972~992) 21 982,   Bit11 (968~988) 21 978,

 1822 20:15:11.647107  TX Bit4 (978~997) 20 987,   Bit12 (969~989) 21 979,

 1823 20:15:11.647161  TX Bit5 (975~991) 17 983,   Bit13 (969~987) 19 978,

 1824 20:15:11.647215  TX Bit6 (976~992) 17 984,   Bit14 (969~988) 20 978,

 1825 20:15:11.647270  TX Bit7 (978~994) 17 986,   Bit15 (973~990) 18 981,

 1826 20:15:11.647322  

 1827 20:15:11.647404  Write Rank1 MR14 =0x6

 1828 20:15:11.647484  

 1829 20:15:11.647563  	CH=0, VrefRange= 0, VrefLevel = 6

 1830 20:15:11.647644  TX Bit0 (979~999) 21 989,   Bit8 (968~988) 21 978,

 1831 20:15:11.647727  TX Bit1 (978~998) 21 988,   Bit9 (969~990) 22 979,

 1832 20:15:11.647809  TX Bit2 (978~998) 21 988,   Bit10 (975~992) 18 983,

 1833 20:15:11.647890  TX Bit3 (971~992) 22 981,   Bit11 (968~989) 22 978,

 1834 20:15:11.647970  TX Bit4 (978~998) 21 988,   Bit12 (969~989) 21 979,

 1835 20:15:11.648051  TX Bit5 (975~991) 17 983,   Bit13 (968~987) 20 977,

 1836 20:15:11.648131  TX Bit6 (975~993) 19 984,   Bit14 (969~989) 21 979,

 1837 20:15:11.648220  TX Bit7 (977~994) 18 985,   Bit15 (973~990) 18 981,

 1838 20:15:11.648318  

 1839 20:15:11.648410  Write Rank1 MR14 =0x8

 1840 20:15:11.648492  

 1841 20:15:11.648572  	CH=0, VrefRange= 0, VrefLevel = 8

 1842 20:15:11.648652  TX Bit0 (978~999) 22 988,   Bit8 (968~989) 22 978,

 1843 20:15:11.648733  TX Bit1 (977~998) 22 987,   Bit9 (969~990) 22 979,

 1844 20:15:11.648821  TX Bit2 (978~998) 21 988,   Bit10 (974~992) 19 983,

 1845 20:15:11.648908  TX Bit3 (971~992) 22 981,   Bit11 (968~989) 22 978,

 1846 20:15:11.648993  TX Bit4 (977~998) 22 987,   Bit12 (968~990) 23 979,

 1847 20:15:11.649083  TX Bit5 (974~992) 19 983,   Bit13 (968~988) 21 978,

 1848 20:15:11.649169  TX Bit6 (975~993) 19 984,   Bit14 (969~989) 21 979,

 1849 20:15:11.649259  TX Bit7 (977~995) 19 986,   Bit15 (973~991) 19 982,

 1850 20:15:11.649383  

 1851 20:15:11.649467  Write Rank1 MR14 =0xa

 1852 20:15:11.649551  

 1853 20:15:11.649635  	CH=0, VrefRange= 0, VrefLevel = 10

 1854 20:15:11.649717  TX Bit0 (978~999) 22 988,   Bit8 (968~989) 22 978,

 1855 20:15:11.649801  TX Bit1 (977~998) 22 987,   Bit9 (968~990) 23 979,

 1856 20:15:11.649882  TX Bit2 (978~998) 21 988,   Bit10 (974~993) 20 983,

 1857 20:15:11.649966  TX Bit3 (971~992) 22 981,   Bit11 (967~989) 23 978,

 1858 20:15:11.650047  TX Bit4 (977~999) 23 988,   Bit12 (968~990) 23 979,

 1859 20:15:11.650128  TX Bit5 (974~992) 19 983,   Bit13 (968~989) 22 978,

 1860 20:15:11.650209  TX Bit6 (974~994) 21 984,   Bit14 (969~990) 22 979,

 1861 20:15:11.650293  TX Bit7 (976~996) 21 986,   Bit15 (971~991) 21 981,

 1862 20:15:11.650374  

 1863 20:15:11.650455  Write Rank1 MR14 =0xc

 1864 20:15:11.650534  

 1865 20:15:11.650614  	CH=0, VrefRange= 0, VrefLevel = 12

 1866 20:15:11.650694  TX Bit0 (978~999) 22 988,   Bit8 (968~990) 23 979,

 1867 20:15:11.650775  TX Bit1 (977~999) 23 988,   Bit9 (969~990) 22 979,

 1868 20:15:11.650856  TX Bit2 (977~999) 23 988,   Bit10 (973~993) 21 983,

 1869 20:15:11.650937  TX Bit3 (971~993) 23 982,   Bit11 (967~990) 24 978,

 1870 20:15:11.651018  TX Bit4 (977~999) 23 988,   Bit12 (968~990) 23 979,

 1871 20:15:11.651294  TX Bit5 (973~992) 20 982,   Bit13 (968~989) 22 978,

 1872 20:15:11.651380  TX Bit6 (974~994) 21 984,   Bit14 (968~990) 23 979,

 1873 20:15:11.651462  TX Bit7 (977~997) 21 987,   Bit15 (972~991) 20 981,

 1874 20:15:11.651542  

 1875 20:15:11.651622  Write Rank1 MR14 =0xe

 1876 20:15:11.651701  

 1877 20:15:11.651794  	CH=0, VrefRange= 0, VrefLevel = 14

 1878 20:15:11.651878  TX Bit0 (978~1000) 23 989,   Bit8 (968~990) 23 979,

 1879 20:15:11.651960  TX Bit1 (977~999) 23 988,   Bit9 (968~990) 23 979,

 1880 20:15:11.652044  TX Bit2 (977~999) 23 988,   Bit10 (972~993) 22 982,

 1881 20:15:11.652126  TX Bit3 (970~994) 25 982,   Bit11 (967~990) 24 978,

 1882 20:15:11.652207  TX Bit4 (977~999) 23 988,   Bit12 (968~990) 23 979,

 1883 20:15:11.652293  TX Bit5 (973~993) 21 983,   Bit13 (968~990) 23 979,

 1884 20:15:11.652353  TX Bit6 (973~995) 23 984,   Bit14 (968~990) 23 979,

 1885 20:15:11.652406  TX Bit7 (976~997) 22 986,   Bit15 (971~991) 21 981,

 1886 20:15:11.652458  

 1887 20:15:11.652508  Write Rank1 MR14 =0x10

 1888 20:15:11.652559  

 1889 20:15:11.652609  	CH=0, VrefRange= 0, VrefLevel = 16

 1890 20:15:11.652659  TX Bit0 (978~1000) 23 989,   Bit8 (968~990) 23 979,

 1891 20:15:11.652710  TX Bit1 (977~999) 23 988,   Bit9 (968~991) 24 979,

 1892 20:15:11.652760  TX Bit2 (977~999) 23 988,   Bit10 (974~994) 21 984,

 1893 20:15:11.652815  TX Bit3 (970~994) 25 982,   Bit11 (967~990) 24 978,

 1894 20:15:11.652869  TX Bit4 (977~999) 23 988,   Bit12 (968~991) 24 979,

 1895 20:15:11.652925  TX Bit5 (972~993) 22 982,   Bit13 (967~990) 24 978,

 1896 20:15:11.653003  TX Bit6 (973~995) 23 984,   Bit14 (968~990) 23 979,

 1897 20:15:11.653083  TX Bit7 (976~998) 23 987,   Bit15 (970~992) 23 981,

 1898 20:15:11.653163  

 1899 20:15:11.653242  Write Rank1 MR14 =0x12

 1900 20:15:11.653338  

 1901 20:15:11.653389  	CH=0, VrefRange= 0, VrefLevel = 18

 1902 20:15:11.653441  TX Bit0 (978~1001) 24 989,   Bit8 (967~990) 24 978,

 1903 20:15:11.653492  TX Bit1 (977~999) 23 988,   Bit9 (968~991) 24 979,

 1904 20:15:11.653544  TX Bit2 (977~999) 23 988,   Bit10 (973~994) 22 983,

 1905 20:15:11.653597  TX Bit3 (970~995) 26 982,   Bit11 (966~990) 25 978,

 1906 20:15:11.653649  TX Bit4 (977~1000) 24 988,   Bit12 (968~991) 24 979,

 1907 20:15:11.653703  TX Bit5 (972~994) 23 983,   Bit13 (967~990) 24 978,

 1908 20:15:11.653754  TX Bit6 (972~996) 25 984,   Bit14 (968~991) 24 979,

 1909 20:15:11.653804  TX Bit7 (975~998) 24 986,   Bit15 (970~992) 23 981,

 1910 20:15:11.653854  

 1911 20:15:11.653904  Write Rank1 MR14 =0x14

 1912 20:15:11.653953  

 1913 20:15:11.654003  	CH=0, VrefRange= 0, VrefLevel = 20

 1914 20:15:11.654054  TX Bit0 (977~1001) 25 989,   Bit8 (967~990) 24 978,

 1915 20:15:11.654107  TX Bit1 (976~1000) 25 988,   Bit9 (968~991) 24 979,

 1916 20:15:11.654161  TX Bit2 (977~1000) 24 988,   Bit10 (972~994) 23 983,

 1917 20:15:11.654212  TX Bit3 (970~995) 26 982,   Bit11 (966~991) 26 978,

 1918 20:15:11.654263  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1919 20:15:11.654313  TX Bit5 (971~994) 24 982,   Bit13 (967~990) 24 978,

 1920 20:15:11.654363  TX Bit6 (972~996) 25 984,   Bit14 (967~991) 25 979,

 1921 20:15:11.654413  TX Bit7 (975~998) 24 986,   Bit15 (970~992) 23 981,

 1922 20:15:11.654463  

 1923 20:15:11.654513  Write Rank1 MR14 =0x16

 1924 20:15:11.654567  

 1925 20:15:11.654620  	CH=0, VrefRange= 0, VrefLevel = 22

 1926 20:15:11.654675  TX Bit0 (977~1001) 25 989,   Bit8 (967~991) 25 979,

 1927 20:15:11.654726  TX Bit1 (976~1000) 25 988,   Bit9 (968~991) 24 979,

 1928 20:15:11.654777  TX Bit2 (977~1000) 24 988,   Bit10 (971~995) 25 983,

 1929 20:15:11.654827  TX Bit3 (969~995) 27 982,   Bit11 (967~991) 25 979,

 1930 20:15:11.654877  TX Bit4 (976~1000) 25 988,   Bit12 (967~991) 25 979,

 1931 20:15:11.654927  TX Bit5 (971~995) 25 983,   Bit13 (966~990) 25 978,

 1932 20:15:11.654984  TX Bit6 (972~997) 26 984,   Bit14 (967~991) 25 979,

 1933 20:15:11.655055  TX Bit7 (974~999) 26 986,   Bit15 (969~992) 24 980,

 1934 20:15:11.655108  

 1935 20:15:11.655158  Write Rank1 MR14 =0x18

 1936 20:15:11.655208  

 1937 20:15:11.655258  	CH=0, VrefRange= 0, VrefLevel = 24

 1938 20:15:11.655308  TX Bit0 (977~1002) 26 989,   Bit8 (966~991) 26 978,

 1939 20:15:11.655360  TX Bit1 (976~1000) 25 988,   Bit9 (968~991) 24 979,

 1940 20:15:11.655410  TX Bit2 (977~1000) 24 988,   Bit10 (970~994) 25 982,

 1941 20:15:11.655461  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1942 20:15:11.655515  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1943 20:15:11.655569  TX Bit5 (971~995) 25 983,   Bit13 (966~990) 25 978,

 1944 20:15:11.655621  TX Bit6 (971~997) 27 984,   Bit14 (968~991) 24 979,

 1945 20:15:11.655671  TX Bit7 (974~999) 26 986,   Bit15 (969~992) 24 980,

 1946 20:15:11.655722  

 1947 20:15:11.655776  Write Rank1 MR14 =0x1a

 1948 20:15:11.655829  

 1949 20:15:11.655882  	CH=0, VrefRange= 0, VrefLevel = 26

 1950 20:15:11.655936  TX Bit0 (977~1002) 26 989,   Bit8 (966~991) 26 978,

 1951 20:15:11.655987  TX Bit1 (976~1000) 25 988,   Bit9 (968~991) 24 979,

 1952 20:15:11.656038  TX Bit2 (977~1000) 24 988,   Bit10 (970~994) 25 982,

 1953 20:15:11.656088  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1954 20:15:11.656139  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1955 20:15:11.656189  TX Bit5 (971~995) 25 983,   Bit13 (966~990) 25 978,

 1956 20:15:11.656250  TX Bit6 (971~997) 27 984,   Bit14 (968~991) 24 979,

 1957 20:15:11.656320  TX Bit7 (974~999) 26 986,   Bit15 (969~992) 24 980,

 1958 20:15:11.656435  

 1959 20:15:11.656516  Write Rank1 MR14 =0x1c

 1960 20:15:11.656595  

 1961 20:15:11.656675  	CH=0, VrefRange= 0, VrefLevel = 28

 1962 20:15:11.656755  TX Bit0 (977~1002) 26 989,   Bit8 (966~991) 26 978,

 1963 20:15:11.656836  TX Bit1 (976~1000) 25 988,   Bit9 (968~991) 24 979,

 1964 20:15:11.656916  TX Bit2 (977~1000) 24 988,   Bit10 (970~994) 25 982,

 1965 20:15:11.656999  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1966 20:15:11.657081  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1967 20:15:11.657164  TX Bit5 (971~995) 25 983,   Bit13 (966~990) 25 978,

 1968 20:15:11.657245  TX Bit6 (971~997) 27 984,   Bit14 (968~991) 24 979,

 1969 20:15:11.657363  TX Bit7 (974~999) 26 986,   Bit15 (969~992) 24 980,

 1970 20:15:11.657443  

 1971 20:15:11.657522  Write Rank1 MR14 =0x1e

 1972 20:15:11.657601  

 1973 20:15:11.657874  	CH=0, VrefRange= 0, VrefLevel = 30

 1974 20:15:11.657935  TX Bit0 (977~1002) 26 989,   Bit8 (966~991) 26 978,

 1975 20:15:11.880541  TX Bit1 (976~1000) 25 988,   Bit9 (968~991) 24 979,

 1976 20:15:11.881170  TX Bit2 (977~1000) 24 988,   Bit10 (970~994) 25 982,

 1977 20:15:11.881677  TX Bit3 (969~994) 26 981,   Bit11 (966~990) 25 978,

 1978 20:15:11.882164  TX Bit4 (976~1001) 26 988,   Bit12 (967~991) 25 979,

 1979 20:15:11.882638  TX Bit5 (971~995) 25 983,   Bit13 (966~990) 25 978,

 1980 20:15:11.883098  TX Bit6 (971~997) 27 984,   Bit14 (968~991) 24 979,

 1981 20:15:11.883531  TX Bit7 (974~999) 26 986,   Bit15 (969~992) 24 980,

 1982 20:15:11.883990  

 1983 20:15:11.884421  

 1984 20:15:11.884839  TX Vref found, early break! 380< 382

 1985 20:15:11.885287  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 1986 20:15:11.885575  u1DelayCellOfst[0]=10 cells (8 PI)

 1987 20:15:11.885864  u1DelayCellOfst[1]=8 cells (7 PI)

 1988 20:15:11.886156  u1DelayCellOfst[2]=8 cells (7 PI)

 1989 20:15:11.886422  u1DelayCellOfst[3]=0 cells (0 PI)

 1990 20:15:11.886683  u1DelayCellOfst[4]=8 cells (7 PI)

 1991 20:15:11.886945  u1DelayCellOfst[5]=2 cells (2 PI)

 1992 20:15:11.887203  u1DelayCellOfst[6]=3 cells (3 PI)

 1993 20:15:11.887647  u1DelayCellOfst[7]=6 cells (5 PI)

 1994 20:15:11.888098  Byte0, DQ PI dly=981, DQM PI dly= 985

 1995 20:15:11.888531  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)

 1996 20:15:11.888972  

 1997 20:15:11.889403  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)

 1998 20:15:11.889685  

 1999 20:15:11.889965  u1DelayCellOfst[8]=0 cells (0 PI)

 2000 20:15:11.890262  u1DelayCellOfst[9]=1 cells (1 PI)

 2001 20:15:11.890529  u1DelayCellOfst[10]=5 cells (4 PI)

 2002 20:15:11.890792  u1DelayCellOfst[11]=0 cells (0 PI)

 2003 20:15:11.891054  u1DelayCellOfst[12]=1 cells (1 PI)

 2004 20:15:11.891329  u1DelayCellOfst[13]=0 cells (0 PI)

 2005 20:15:11.891709  u1DelayCellOfst[14]=1 cells (1 PI)

 2006 20:15:11.892122  u1DelayCellOfst[15]=2 cells (2 PI)

 2007 20:15:11.892533  Byte1, DQ PI dly=978, DQM PI dly= 980

 2008 20:15:11.892974  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 2009 20:15:11.893401  

 2010 20:15:11.893676  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 2011 20:15:11.893944  

 2012 20:15:11.894255  Write Rank1 MR14 =0x18

 2013 20:15:11.894524  

 2014 20:15:11.894784  Final TX Range 0 Vref 24

 2015 20:15:11.895095  

 2016 20:15:11.895497  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2017 20:15:11.895926  

 2018 20:15:11.896358  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2019 20:15:11.896788  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2020 20:15:11.897227  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2021 20:15:11.897561  Write Rank1 MR3 =0xb0

 2022 20:15:11.897829  DramC Write-DBI on

 2023 20:15:11.898111  ==

 2024 20:15:11.898409  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2025 20:15:11.898676  fsp= 1, odt_onoff= 1, Byte mode= 0

 2026 20:15:11.898958  ==

 2027 20:15:11.899219  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2028 20:15:11.899500  

 2029 20:15:11.899915  Begin, DQ Scan Range 700~764

 2030 20:15:11.900324  

 2031 20:15:11.900730  

 2032 20:15:11.901167  	TX Vref Scan disable

 2033 20:15:11.901504  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2034 20:15:11.901790  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2035 20:15:11.902107  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2036 20:15:11.902440  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2037 20:15:11.902888  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2038 20:15:11.903338  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2039 20:15:11.903796  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2040 20:15:11.904240  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2041 20:15:11.904666  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2042 20:15:11.905021  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 2043 20:15:11.905353  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 2044 20:15:11.905656  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 2045 20:15:11.905955  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2046 20:15:11.906255  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2047 20:15:11.906553  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2048 20:15:11.906852  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2049 20:15:11.907174  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2050 20:15:11.907464  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2051 20:15:11.907813  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2052 20:15:11.908165  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2053 20:15:11.908489  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2054 20:15:11.908795  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2055 20:15:11.909096  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2056 20:15:11.909396  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2057 20:15:11.909610  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2058 20:15:11.909896  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2059 20:15:11.910165  Byte0, DQ PI dly=730, DQM PI dly= 730

 2060 20:15:11.910405  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)

 2061 20:15:11.910634  

 2062 20:15:11.910856  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)

 2063 20:15:11.911084  

 2064 20:15:11.911308  Byte1, DQ PI dly=722, DQM PI dly= 722

 2065 20:15:11.911530  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)

 2066 20:15:11.911751  

 2067 20:15:11.911973  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)

 2068 20:15:11.912193  

 2069 20:15:11.912423  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2070 20:15:11.912650  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2071 20:15:11.912876  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2072 20:15:11.913104  Write Rank1 MR3 =0x30

 2073 20:15:11.913346  DramC Write-DBI off

 2074 20:15:11.913500  

 2075 20:15:11.913666  [DATLAT]

 2076 20:15:11.913816  Freq=1600, CH0 RK1, use_rxtx_scan=0

 2077 20:15:11.913975  

 2078 20:15:11.914120  DATLAT Default: 0x10

 2079 20:15:11.914263  7, 0xFFFF, sum=0

 2080 20:15:11.914414  8, 0xFFFF, sum=0

 2081 20:15:11.914621  9, 0xFFFF, sum=0

 2082 20:15:11.914845  10, 0xFFFF, sum=0

 2083 20:15:11.915031  11, 0xFFFF, sum=0

 2084 20:15:11.915213  12, 0xFFFF, sum=0

 2085 20:15:11.915395  13, 0xFFFF, sum=0

 2086 20:15:11.915576  14, 0x0, sum=1

 2087 20:15:11.915758  15, 0x0, sum=2

 2088 20:15:11.915939  16, 0x0, sum=3

 2089 20:15:11.916120  17, 0x0, sum=4

 2090 20:15:11.916310  pattern=2 first_step=14 total pass=5 best_step=16

 2091 20:15:11.916492  ==

 2092 20:15:11.916621  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2093 20:15:11.916740  fsp= 1, odt_onoff= 1, Byte mode= 0

 2094 20:15:11.916854  ==

 2095 20:15:11.917233  Start DQ dly to find pass range UseTestEngine =1

 2096 20:15:11.917384  x-axis: bit #, y-axis: DQ dly (-127~63)

 2097 20:15:11.917507  RX Vref Scan = 0

 2098 20:15:11.917632  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2099 20:15:11.917752  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2100 20:15:11.917869  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2101 20:15:11.917986  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2102 20:15:11.918103  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2103 20:15:11.918232  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2104 20:15:11.918350  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2105 20:15:11.918466  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2106 20:15:11.918581  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2107 20:15:11.918697  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2108 20:15:11.918828  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2109 20:15:11.919017  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2110 20:15:11.919199  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2111 20:15:11.919389  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2112 20:15:11.919571  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2113 20:15:11.919764  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2114 20:15:11.919917  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2115 20:15:11.920073  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2116 20:15:11.920215  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2117 20:15:11.920324  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2118 20:15:11.920421  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2119 20:15:11.920518  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2120 20:15:11.920614  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2121 20:15:11.920711  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2122 20:15:11.920807  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 2123 20:15:11.920904  -1, [0] xxxoxxxx xxxxxoxx [MSB]

 2124 20:15:11.921000  0, [0] xxxoxxxx oxxxxoxx [MSB]

 2125 20:15:11.921142  1, [0] xxxoxoxx ooxoxoox [MSB]

 2126 20:15:11.921325  2, [0] xxxoxooo ooxoooox [MSB]

 2127 20:15:11.921430  3, [0] xxxoxooo ooxooooo [MSB]

 2128 20:15:11.921528  4, [0] xxxoxooo ooxooooo [MSB]

 2129 20:15:11.921627  5, [0] xxxooooo ooxooooo [MSB]

 2130 20:15:11.921725  6, [0] xxxooooo oooooooo [MSB]

 2131 20:15:11.921822  7, [0] xooooooo oooooooo [MSB]

 2132 20:15:11.921918  8, [0] xooooooo oooooooo [MSB]

 2133 20:15:11.922016  34, [0] oooxoooo oooxoooo [MSB]

 2134 20:15:11.922114  35, [0] oooxoxoo oooxoxoo [MSB]

 2135 20:15:11.922211  36, [0] oooxoxxo oooxoxoo [MSB]

 2136 20:15:11.922308  37, [0] oooxoxxx xooxxxxo [MSB]

 2137 20:15:11.922405  38, [0] oooxoxxx xooxxxxo [MSB]

 2138 20:15:11.922507  39, [0] oooxoxxx xxoxxxxx [MSB]

 2139 20:15:11.922609  40, [0] oooxoxxx xxoxxxxx [MSB]

 2140 20:15:11.922707  41, [0] oooxxxxx xxoxxxxx [MSB]

 2141 20:15:11.922804  42, [0] oooxxxxx xxxxxxxx [MSB]

 2142 20:15:11.922901  43, [0] oxxxxxxx xxxxxxxx [MSB]

 2143 20:15:11.922996  44, [0] xxxxxxxx xxxxxxxx [MSB]

 2144 20:15:11.923092  iDelay=44, Bit 0, Center 26 (9 ~ 43) 35

 2145 20:15:11.923187  iDelay=44, Bit 1, Center 24 (7 ~ 42) 36

 2146 20:15:11.923282  iDelay=44, Bit 2, Center 24 (7 ~ 42) 36

 2147 20:15:11.923381  iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36

 2148 20:15:11.923527  iDelay=44, Bit 4, Center 22 (5 ~ 40) 36

 2149 20:15:11.923682  iDelay=44, Bit 5, Center 17 (1 ~ 34) 34

 2150 20:15:11.923835  iDelay=44, Bit 6, Center 18 (2 ~ 35) 34

 2151 20:15:11.923988  iDelay=44, Bit 7, Center 19 (2 ~ 36) 35

 2152 20:15:11.924141  iDelay=44, Bit 8, Center 18 (0 ~ 36) 37

 2153 20:15:11.924292  iDelay=44, Bit 9, Center 19 (1 ~ 38) 38

 2154 20:15:11.924392  iDelay=44, Bit 10, Center 23 (6 ~ 41) 36

 2155 20:15:11.924489  iDelay=44, Bit 11, Center 17 (1 ~ 33) 33

 2156 20:15:11.924585  iDelay=44, Bit 12, Center 19 (2 ~ 36) 35

 2157 20:15:11.924680  iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36

 2158 20:15:11.924782  iDelay=44, Bit 14, Center 18 (1 ~ 36) 36

 2159 20:15:11.924863  iDelay=44, Bit 15, Center 20 (3 ~ 38) 36

 2160 20:15:11.924945  ==

 2161 20:15:11.925027  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2162 20:15:11.925109  fsp= 1, odt_onoff= 1, Byte mode= 0

 2163 20:15:11.925220  ==

 2164 20:15:11.925358  DQS Delay:

 2165 20:15:11.925486  DQS0 = 0, DQS1 = 0

 2166 20:15:11.925613  DQM Delay:

 2167 20:15:11.925740  DQM0 = 20, DQM1 = 18

 2168 20:15:11.925867  DQ Delay:

 2169 20:15:11.925995  DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15

 2170 20:15:11.926123  DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19

 2171 20:15:11.926251  DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17

 2172 20:15:11.926379  DQ12 =19, DQ13 =16, DQ14 =18, DQ15 =20

 2173 20:15:11.926478  

 2174 20:15:11.926605  

 2175 20:15:11.926731  

 2176 20:15:11.926858  [DramC_TX_OE_Calibration] TA2

 2177 20:15:11.926994  Original DQ_B0 (3 6) =30, OEN = 27

 2178 20:15:11.927086  Original DQ_B1 (3 6) =30, OEN = 27

 2179 20:15:11.927169  23, 0x0, End_B0=23 End_B1=23

 2180 20:15:11.927253  24, 0x0, End_B0=24 End_B1=24

 2181 20:15:11.927336  25, 0x0, End_B0=25 End_B1=25

 2182 20:15:11.927418  26, 0x0, End_B0=26 End_B1=26

 2183 20:15:11.927500  27, 0x0, End_B0=27 End_B1=27

 2184 20:15:11.927583  28, 0x0, End_B0=28 End_B1=28

 2185 20:15:11.927675  29, 0x0, End_B0=29 End_B1=29

 2186 20:15:11.927810  30, 0x0, End_B0=30 End_B1=30

 2187 20:15:11.927942  31, 0xFFFE, End_B0=30 End_B1=30

 2188 20:15:11.928074  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2189 20:15:11.928204  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2190 20:15:11.928323  

 2191 20:15:11.928407  

 2192 20:15:11.928489  Write Rank1 MR23 =0x3f

 2193 20:15:11.928571  [DQSOSC]

 2194 20:15:11.928653  [DQSOSCAuto] RK1, (LSB)MR18= 0x7e, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps

 2195 20:15:11.928737  CH0_RK1: MR19=0x3, MR18=0x7E, DQSOSC=352, MR23=63, INC=19, DEC=29

 2196 20:15:11.928819  Write Rank1 MR23 =0x3f

 2197 20:15:11.928949  [DQSOSC]

 2198 20:15:11.929085  [DQSOSCAuto] RK1, (LSB)MR18= 0x7a, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps

 2199 20:15:11.929216  CH0 RK1: MR19=3, MR18=7A

 2200 20:15:11.929361  [RxdqsGatingPostProcess] freq 1600

 2201 20:15:11.929492  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 2202 20:15:11.929620  Rank: 0

 2203 20:15:11.929745  best DQS0 dly(2T, 0.5T) = (2, 5)

 2204 20:15:11.929865  best DQS1 dly(2T, 0.5T) = (2, 5)

 2205 20:15:11.929977  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 2206 20:15:11.930090  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 2207 20:15:11.930185  Rank: 1

 2208 20:15:11.930263  best DQS0 dly(2T, 0.5T) = (2, 6)

 2209 20:15:11.930335  best DQS1 dly(2T, 0.5T) = (2, 6)

 2210 20:15:11.930407  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2211 20:15:11.930479  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2212 20:15:11.930551  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 2213 20:15:11.930623  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 2214 20:15:11.930699  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 2215 20:15:11.930775  Write Rank0 MR13 =0x59

 2216 20:15:11.930847  ==

 2217 20:15:11.930919  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2218 20:15:11.931202  fsp= 1, odt_onoff= 1, Byte mode= 0

 2219 20:15:11.931285  ==

 2220 20:15:11.931378  === u2Vref_new: 0x56 --> 0x3a

 2221 20:15:11.931497  === u2Vref_new: 0x58 --> 0x58

 2222 20:15:11.931611  === u2Vref_new: 0x5a --> 0x5a

 2223 20:15:11.931724  === u2Vref_new: 0x5c --> 0x78

 2224 20:15:11.931837  === u2Vref_new: 0x5e --> 0x7a

 2225 20:15:11.931950  === u2Vref_new: 0x60 --> 0x90

 2226 20:15:11.932062  [CA 0] Center 36 (9~63) winsize 55

 2227 20:15:11.932174  [CA 1] Center 35 (8~63) winsize 56

 2228 20:15:11.932286  [CA 2] Center 32 (3~61) winsize 59

 2229 20:15:11.932398  [CA 3] Center 33 (3~63) winsize 61

 2230 20:15:11.932509  [CA 4] Center 33 (3~63) winsize 61

 2231 20:15:11.932621  [CA 5] Center 25 (-2~52) winsize 55

 2232 20:15:11.932715  

 2233 20:15:11.932826  [CATrainingPosCal] consider 1 rank data

 2234 20:15:11.932938  u2DelayCellTimex100 = 762/100 ps

 2235 20:15:11.933050  CA0 delay=36 (9~63),Diff = 11 PI (14 cell)

 2236 20:15:11.933162  CA1 delay=35 (8~63),Diff = 10 PI (12 cell)

 2237 20:15:11.933280  CA2 delay=32 (3~61),Diff = 7 PI (8 cell)

 2238 20:15:11.933357  CA3 delay=33 (3~63),Diff = 8 PI (10 cell)

 2239 20:15:11.933429  CA4 delay=33 (3~63),Diff = 8 PI (10 cell)

 2240 20:15:11.933501  CA5 delay=25 (-2~52),Diff = 0 PI (0 cell)

 2241 20:15:11.933573  

 2242 20:15:11.933644  CA PerBit enable=1, Macro0, CA PI delay=25

 2243 20:15:11.933715  === u2Vref_new: 0x56 --> 0x3a

 2244 20:15:11.933787  

 2245 20:15:11.933857  Vref(ca) range 1: 22

 2246 20:15:11.933928  

 2247 20:15:11.934001  CS Dly= 10 (41-0-32)

 2248 20:15:11.934076  Write Rank0 MR13 =0xd8

 2249 20:15:11.934147  Write Rank0 MR13 =0xd8

 2250 20:15:11.934218  Write Rank0 MR12 =0x56

 2251 20:15:11.934292  Write Rank1 MR13 =0x59

 2252 20:15:11.934366  ==

 2253 20:15:11.934438  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2254 20:15:11.934510  fsp= 1, odt_onoff= 1, Byte mode= 0

 2255 20:15:11.934582  ==

 2256 20:15:11.934653  === u2Vref_new: 0x56 --> 0x3a

 2257 20:15:11.934737  === u2Vref_new: 0x58 --> 0x58

 2258 20:15:11.934800  === u2Vref_new: 0x5a --> 0x5a

 2259 20:15:11.934863  === u2Vref_new: 0x5c --> 0x78

 2260 20:15:11.934927  === u2Vref_new: 0x5e --> 0x7a

 2261 20:15:11.934991  === u2Vref_new: 0x60 --> 0x90

 2262 20:15:11.935058  [CA 0] Center 36 (10~63) winsize 54

 2263 20:15:11.935134  [CA 1] Center 35 (7~63) winsize 57

 2264 20:15:11.935236  [CA 2] Center 32 (3~62) winsize 60

 2265 20:15:11.935336  [CA 3] Center 32 (3~62) winsize 60

 2266 20:15:11.935435  [CA 4] Center 33 (4~63) winsize 60

 2267 20:15:11.935535  [CA 5] Center 25 (-2~53) winsize 56

 2268 20:15:11.935633  

 2269 20:15:11.935733  [CATrainingPosCal] consider 2 rank data

 2270 20:15:11.935835  u2DelayCellTimex100 = 762/100 ps

 2271 20:15:11.935937  CA0 delay=36 (10~63),Diff = 11 PI (14 cell)

 2272 20:15:11.936038  CA1 delay=35 (8~63),Diff = 10 PI (12 cell)

 2273 20:15:11.936138  CA2 delay=32 (3~61),Diff = 7 PI (8 cell)

 2274 20:15:11.936238  CA3 delay=32 (3~62),Diff = 7 PI (8 cell)

 2275 20:15:11.936338  CA4 delay=33 (4~63),Diff = 8 PI (10 cell)

 2276 20:15:11.936438  CA5 delay=25 (-2~52),Diff = 0 PI (0 cell)

 2277 20:15:11.936518  

 2278 20:15:11.936583  CA PerBit enable=1, Macro0, CA PI delay=25

 2279 20:15:11.936655  === u2Vref_new: 0x56 --> 0x3a

 2280 20:15:11.936756  

 2281 20:15:11.936856  Vref(ca) range 1: 22

 2282 20:15:11.936955  

 2283 20:15:11.937057  CS Dly= 11 (42-0-32)

 2284 20:15:11.937157  Write Rank1 MR13 =0xd8

 2285 20:15:11.937261  Write Rank1 MR13 =0xd8

 2286 20:15:11.937331  Write Rank1 MR12 =0x56

 2287 20:15:11.937394  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2288 20:15:11.937457  Write Rank0 MR2 =0xad

 2289 20:15:11.937523  [Write Leveling]

 2290 20:15:11.937591  delay  byte0  byte1  byte2  byte3

 2291 20:15:11.937655  

 2292 20:15:11.937719  10    0   0   

 2293 20:15:11.937783  11    0   0   

 2294 20:15:11.937847  12    0   0   

 2295 20:15:11.937911  13    0   0   

 2296 20:15:11.937975  14    0   0   

 2297 20:15:11.938037  15    0   0   

 2298 20:15:11.938101  16    0   0   

 2299 20:15:11.938168  17    0   0   

 2300 20:15:11.938236  18    0   0   

 2301 20:15:11.938304  19    0   0   

 2302 20:15:11.938369  20    0   0   

 2303 20:15:11.938433  21    0   0   

 2304 20:15:11.938497  22    0   0   

 2305 20:15:11.938560  23    0   0   

 2306 20:15:11.938624  24    0   0   

 2307 20:15:11.938688  25    0   0   

 2308 20:15:11.938751  26    0   0   

 2309 20:15:11.938815  27    0   0   

 2310 20:15:11.938879  28    0   0   

 2311 20:15:11.938942  29    0   0   

 2312 20:15:11.939005  30    0   0   

 2313 20:15:11.939068  31    0   0   

 2314 20:15:11.939132  32    0   ff   

 2315 20:15:11.939196  33    0   ff   

 2316 20:15:11.939260  34    ff   ff   

 2317 20:15:11.939324  35    ff   ff   

 2318 20:15:11.939388  36    ff   ff   

 2319 20:15:11.939457  37    ff   ff   

 2320 20:15:11.939539  38    ff   ff   

 2321 20:15:11.939641  39    ff   ff   

 2322 20:15:11.939754  40    ff   ff   

 2323 20:15:11.939846  pass bytecount = 0xff (0xff: all bytes pass) 

 2324 20:15:11.939941  

 2325 20:15:11.940032  DQS0 dly: 34

 2326 20:15:11.940121  DQS1 dly: 32

 2327 20:15:11.940211  Write Rank0 MR2 =0x2d

 2328 20:15:11.940301  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2329 20:15:11.940391  Write Rank0 MR1 =0xd6

 2330 20:15:11.940480  [Gating]

 2331 20:15:11.940569  ==

 2332 20:15:11.940660  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2333 20:15:11.940724  fsp= 1, odt_onoff= 1, Byte mode= 0

 2334 20:15:11.940815  ==

 2335 20:15:11.940905  3 1 0 |2222 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2336 20:15:11.940999  3 1 4 |b0b 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2337 20:15:11.941092  3 1 8 |3433 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2338 20:15:11.941185  3 1 12 |1817 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2339 20:15:11.941284  3 1 16 |302f 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2340 20:15:11.941347  3 1 20 |1c1b 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2341 20:15:11.941407  3 1 24 |2928 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2342 20:15:11.941465  3 1 28 |403 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2343 20:15:11.941523  3 2 0 |3a3a 908  |(0 0)(11 11) |(1 1)(1 1)| 0

 2344 20:15:11.941582  3 2 4 |1b1a 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2345 20:15:11.941640  [Byte 0] Lead/lag Transition tap number (1)

 2346 20:15:11.941698  3 2 8 |3d3c 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2347 20:15:11.941756  3 2 12 |3737 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2348 20:15:11.941837  3 2 16 |1817 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2349 20:15:11.941935  3 2 20 |3b3a 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2350 20:15:11.942029  3 2 24 |3a39 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2351 20:15:11.947220  3 2 28 |3b3a 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2352 20:15:11.950574  3 3 0 |201 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2353 20:15:11.953770  [Byte 0] Lead/lag falling Transition (3, 3, 0)

 2354 20:15:11.957116  3 3 4 |3534 202  |(11 11)(11 11) |(0 1)(1 1)| 0

 2355 20:15:11.964343  3 3 8 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2356 20:15:11.967260  3 3 12 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2357 20:15:11.970482  [Byte 1] Lead/lag falling Transition (3, 3, 12)

 2358 20:15:11.977310  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2359 20:15:11.980645  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2360 20:15:11.983826  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2361 20:15:11.987418  3 3 28 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2362 20:15:11.994151  3 4 0 |3d3d 1312  |(11 11)(11 11) |(1 1)(1 1)| 0

 2363 20:15:11.997330  3 4 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2364 20:15:12.000971  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2365 20:15:12.007695  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2366 20:15:12.010941  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2367 20:15:12.014113  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2368 20:15:12.021110  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2369 20:15:12.024506  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2370 20:15:12.027858  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2371 20:15:12.030934  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2372 20:15:12.037817  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2373 20:15:12.041122  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2374 20:15:12.044360  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2375 20:15:12.051047  [Byte 0] Lead/lag falling Transition (3, 5, 16)

 2376 20:15:12.054492  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2377 20:15:12.057831  [Byte 0] Lead/lag Transition tap number (2)

 2378 20:15:12.060955  [Byte 1] Lead/lag falling Transition (3, 5, 20)

 2379 20:15:12.068005  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2380 20:15:12.071248  3 5 28 |403 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2381 20:15:12.074457  [Byte 1] Lead/lag Transition tap number (3)

 2382 20:15:12.078247  3 6 0 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 2383 20:15:12.081121  [Byte 0]First pass (3, 6, 0)

 2384 20:15:12.084675  3 6 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2385 20:15:12.087807  [Byte 1]First pass (3, 6, 4)

 2386 20:15:12.091774  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2387 20:15:12.094970  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2388 20:15:12.101784  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2389 20:15:12.104896  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2390 20:15:12.107998  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2391 20:15:12.111325  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2392 20:15:12.115012  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2393 20:15:12.121330  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2394 20:15:12.125054  All bytes gating window > 1UI, Early break!

 2395 20:15:12.125502  

 2396 20:15:12.128165  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)

 2397 20:15:12.128590  

 2398 20:15:12.131682  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)

 2399 20:15:12.132087  

 2400 20:15:12.132403  

 2401 20:15:12.132831  

 2402 20:15:12.135523  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)

 2403 20:15:12.135928  

 2404 20:15:12.141378  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)

 2405 20:15:12.141786  

 2406 20:15:12.142129  

 2407 20:15:12.142426  Write Rank0 MR1 =0x56

 2408 20:15:12.142739  

 2409 20:15:12.144689  best RODT dly(2T, 0.5T) = (2, 2)

 2410 20:15:12.145142  

 2411 20:15:12.148160  best RODT dly(2T, 0.5T) = (2, 2)

 2412 20:15:12.148566  ==

 2413 20:15:12.154777  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2414 20:15:12.158088  fsp= 1, odt_onoff= 1, Byte mode= 0

 2415 20:15:12.158523  ==

 2416 20:15:12.161673  Start DQ dly to find pass range UseTestEngine =0

 2417 20:15:12.164853  x-axis: bit #, y-axis: DQ dly (-127~63)

 2418 20:15:12.168462  RX Vref Scan = 0

 2419 20:15:12.168878  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2420 20:15:12.171780  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2421 20:15:12.175285  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2422 20:15:12.178317  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2423 20:15:12.181654  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2424 20:15:12.185086  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2425 20:15:12.188345  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2426 20:15:12.191756  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2427 20:15:12.192196  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2428 20:15:12.194730  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2429 20:15:12.198290  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2430 20:15:12.201635  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2431 20:15:12.205116  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2432 20:15:12.208787  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2433 20:15:12.211917  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2434 20:15:12.215328  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2435 20:15:12.215708  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2436 20:15:12.218347  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2437 20:15:12.221822  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2438 20:15:12.224966  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2439 20:15:12.228433  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2440 20:15:12.231952  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2441 20:15:12.235227  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2442 20:15:12.235655  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2443 20:15:12.238642  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 2444 20:15:12.241928  -1, [0] xxxxxxxx xxxxxxxx [MSB]

 2445 20:15:12.245322  0, [0] xxxoxxxx xxxxxxxx [MSB]

 2446 20:15:12.248720  1, [0] xxooxxxx xxxxxxxo [MSB]

 2447 20:15:12.251884  2, [0] xxooxxxx xxxxxxxo [MSB]

 2448 20:15:12.252288  3, [0] xxoooxxo oooxxoxo [MSB]

 2449 20:15:12.255512  4, [0] xxoooxxo oooxooxo [MSB]

 2450 20:15:12.258650  5, [0] xxoooxxo oooooooo [MSB]

 2451 20:15:12.262172  6, [0] xooooxxo oooooooo [MSB]

 2452 20:15:12.265326  7, [0] xoooooxo oooooooo [MSB]

 2453 20:15:12.268582  8, [0] ooooooxo oooooooo [MSB]

 2454 20:15:12.269009  32, [0] ooxxoooo oooooooo [MSB]

 2455 20:15:12.271551  33, [0] ooxxoooo ooooooox [MSB]

 2456 20:15:12.275485  34, [0] ooxxoooo ooooooox [MSB]

 2457 20:15:12.278289  35, [0] ooxxxooo ooxoooox [MSB]

 2458 20:15:12.282113  36, [0] ooxxxooo ooxoooox [MSB]

 2459 20:15:12.285762  37, [0] ooxxxoox xxxxoxxx [MSB]

 2460 20:15:12.288747  38, [0] ooxxxoox xxxxoxxx [MSB]

 2461 20:15:12.289353  39, [0] ooxxxoox xxxxxxxx [MSB]

 2462 20:15:12.292257  40, [0] xxxxxoox xxxxxxxx [MSB]

 2463 20:15:12.295346  41, [0] xxxxxoxx xxxxxxxx [MSB]

 2464 20:15:12.298488  42, [0] xxxxxxxx xxxxxxxx [MSB]

 2465 20:15:12.301848  iDelay=42, Bit 0, Center 23 (8 ~ 39) 32

 2466 20:15:12.305105  iDelay=42, Bit 1, Center 22 (6 ~ 39) 34

 2467 20:15:12.308525  iDelay=42, Bit 2, Center 16 (1 ~ 31) 31

 2468 20:15:12.312340  iDelay=42, Bit 3, Center 15 (0 ~ 31) 32

 2469 20:15:12.315302  iDelay=42, Bit 4, Center 18 (3 ~ 34) 32

 2470 20:15:12.318687  iDelay=42, Bit 5, Center 24 (7 ~ 41) 35

 2471 20:15:12.322229  iDelay=42, Bit 6, Center 24 (9 ~ 40) 32

 2472 20:15:12.325379  iDelay=42, Bit 7, Center 19 (3 ~ 36) 34

 2473 20:15:12.328548  iDelay=42, Bit 8, Center 19 (3 ~ 36) 34

 2474 20:15:12.332380  iDelay=42, Bit 9, Center 19 (3 ~ 36) 34

 2475 20:15:12.338791  iDelay=42, Bit 10, Center 18 (3 ~ 34) 32

 2476 20:15:12.342310  iDelay=42, Bit 11, Center 20 (5 ~ 36) 32

 2477 20:15:12.345562  iDelay=42, Bit 12, Center 21 (4 ~ 38) 35

 2478 20:15:12.349064  iDelay=42, Bit 13, Center 19 (3 ~ 36) 34

 2479 20:15:12.352433  iDelay=42, Bit 14, Center 20 (5 ~ 36) 32

 2480 20:15:12.355610  iDelay=42, Bit 15, Center 16 (1 ~ 32) 32

 2481 20:15:12.356075  ==

 2482 20:15:12.362271  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2483 20:15:12.362725  fsp= 1, odt_onoff= 1, Byte mode= 0

 2484 20:15:12.365663  ==

 2485 20:15:12.366232  DQS Delay:

 2486 20:15:12.366660  DQS0 = 0, DQS1 = 0

 2487 20:15:12.368990  DQM Delay:

 2488 20:15:12.369448  DQM0 = 20, DQM1 = 19

 2489 20:15:12.372282  DQ Delay:

 2490 20:15:12.372718  DQ0 =23, DQ1 =22, DQ2 =16, DQ3 =15

 2491 20:15:12.375236  DQ4 =18, DQ5 =24, DQ6 =24, DQ7 =19

 2492 20:15:12.379181  DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =20

 2493 20:15:12.382400  DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =16

 2494 20:15:12.382855  

 2495 20:15:12.385370  

 2496 20:15:12.385782  DramC Write-DBI off

 2497 20:15:12.386114  ==

 2498 20:15:12.392131  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2499 20:15:12.395423  fsp= 1, odt_onoff= 1, Byte mode= 0

 2500 20:15:12.395848  ==

 2501 20:15:12.398704  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 2502 20:15:12.399159  

 2503 20:15:12.402568  Begin, DQ Scan Range 928~1184

 2504 20:15:12.402996  

 2505 20:15:12.403323  

 2506 20:15:12.403652  	TX Vref Scan disable

 2507 20:15:12.409042  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 2508 20:15:12.412504  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 2509 20:15:12.415846  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 2510 20:15:12.419120  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 2511 20:15:12.422487  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 2512 20:15:12.425710  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2513 20:15:12.428822  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 2514 20:15:12.432414  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2515 20:15:12.436239  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2516 20:15:12.439157  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2517 20:15:12.442464  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2518 20:15:12.445673  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2519 20:15:12.449003  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 2520 20:15:12.452574  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 2521 20:15:12.455374  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 2522 20:15:12.458763  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 2523 20:15:12.462262  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2524 20:15:12.468611  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 2525 20:15:12.472197  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 2526 20:15:12.475989  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2527 20:15:12.478696  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 2528 20:15:12.482138  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 2529 20:15:12.485498  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 2530 20:15:12.488881  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 2531 20:15:12.492284  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 2532 20:15:12.495528  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2533 20:15:12.498731  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2534 20:15:12.502022  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2535 20:15:12.505525  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2536 20:15:12.508777  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2537 20:15:12.512180  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2538 20:15:12.515421  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2539 20:15:12.518951  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2540 20:15:12.521848  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2541 20:15:12.528767  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2542 20:15:12.532115  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2543 20:15:12.535631  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2544 20:15:12.538894  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2545 20:15:12.542105  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2546 20:15:12.545661  967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]

 2547 20:15:12.549296  968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]

 2548 20:15:12.552171  969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]

 2549 20:15:12.555847  970 |3 6 10|[0] xxxxxxxx oooxoxxo [MSB]

 2550 20:15:12.558773  971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]

 2551 20:15:12.562387  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 2552 20:15:12.565446  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 2553 20:15:12.568615  974 |3 6 14|[0] xxoooxxx oooooooo [MSB]

 2554 20:15:12.572249  975 |3 6 15|[0] xooooxxo oooooooo [MSB]

 2555 20:15:12.575527  976 |3 6 16|[0] xoooooxo oooooooo [MSB]

 2556 20:15:12.583502  991 |3 6 31|[0] oooooooo ooooooox [MSB]

 2557 20:15:12.586978  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 2558 20:15:12.589892  993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]

 2559 20:15:12.593187  994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]

 2560 20:15:12.596830  995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]

 2561 20:15:12.600656  996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]

 2562 20:15:12.603491  997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2563 20:15:12.607142  Byte0, DQ PI dly=984, DQM PI dly= 984

 2564 20:15:12.609929  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)

 2565 20:15:12.610349  

 2566 20:15:12.616721  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)

 2567 20:15:12.617152  

 2568 20:15:12.619897  Byte1, DQ PI dly=979, DQM PI dly= 979

 2569 20:15:12.622957  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 2570 20:15:12.623371  

 2571 20:15:12.626920  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 2572 20:15:12.627342  

 2573 20:15:12.627671  ==

 2574 20:15:12.633402  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2575 20:15:12.636384  fsp= 1, odt_onoff= 1, Byte mode= 0

 2576 20:15:12.636804  ==

 2577 20:15:12.639884  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 2578 20:15:12.640302  

 2579 20:15:12.643690  Begin, DQ Scan Range 955~1019

 2580 20:15:12.646945  wait MRW command Rank0 MR14 =0x0 fired (1)

 2581 20:15:12.649599  Write Rank0 MR14 =0x0

 2582 20:15:12.657352  

 2583 20:15:12.657822  	CH=1, VrefRange= 0, VrefLevel = 0

 2584 20:15:12.664580  TX Bit0 (978~996) 19 987,   Bit8 (970~986) 17 978,

 2585 20:15:12.667748  TX Bit1 (977~994) 18 985,   Bit9 (970~986) 17 978,

 2586 20:15:12.674163  TX Bit2 (976~991) 16 983,   Bit10 (972~987) 16 979,

 2587 20:15:12.677553  TX Bit3 (974~989) 16 981,   Bit11 (975~989) 15 982,

 2588 20:15:12.680804  TX Bit4 (977~992) 16 984,   Bit12 (973~990) 18 981,

 2589 20:15:12.687368  TX Bit5 (977~995) 19 986,   Bit13 (974~989) 16 981,

 2590 20:15:12.690905  TX Bit6 (978~995) 18 986,   Bit14 (973~987) 15 980,

 2591 20:15:12.694046  TX Bit7 (977~990) 14 983,   Bit15 (968~986) 19 977,

 2592 20:15:12.694520  

 2593 20:15:12.697551  Write Rank0 MR14 =0x2

 2594 20:15:12.705957  

 2595 20:15:12.706371  	CH=1, VrefRange= 0, VrefLevel = 2

 2596 20:15:12.712770  TX Bit0 (978~997) 20 987,   Bit8 (970~986) 17 978,

 2597 20:15:12.716094  TX Bit1 (976~994) 19 985,   Bit9 (970~987) 18 978,

 2598 20:15:12.722718  TX Bit2 (976~991) 16 983,   Bit10 (972~987) 16 979,

 2599 20:15:12.725931  TX Bit3 (973~990) 18 981,   Bit11 (975~990) 16 982,

 2600 20:15:12.729333  TX Bit4 (976~992) 17 984,   Bit12 (973~990) 18 981,

 2601 20:15:12.735961  TX Bit5 (977~996) 20 986,   Bit13 (975~990) 16 982,

 2602 20:15:12.739238  TX Bit6 (978~996) 19 987,   Bit14 (973~988) 16 980,

 2603 20:15:12.742574  TX Bit7 (976~991) 16 983,   Bit15 (968~986) 19 977,

 2604 20:15:12.742996  

 2605 20:15:12.746073  Write Rank0 MR14 =0x4

 2606 20:15:12.754820  

 2607 20:15:12.755247  	CH=1, VrefRange= 0, VrefLevel = 4

 2608 20:15:12.761771  TX Bit0 (978~997) 20 987,   Bit8 (970~986) 17 978,

 2609 20:15:12.765473  TX Bit1 (976~994) 19 985,   Bit9 (970~987) 18 978,

 2610 20:15:12.771556  TX Bit2 (976~991) 16 983,   Bit10 (972~987) 16 979,

 2611 20:15:12.774684  TX Bit3 (973~990) 18 981,   Bit11 (975~990) 16 982,

 2612 20:15:12.778185  TX Bit4 (976~992) 17 984,   Bit12 (973~990) 18 981,

 2613 20:15:12.784632  TX Bit5 (977~996) 20 986,   Bit13 (975~990) 16 982,

 2614 20:15:12.788156  TX Bit6 (978~996) 19 987,   Bit14 (973~988) 16 980,

 2615 20:15:12.791311  TX Bit7 (976~991) 16 983,   Bit15 (968~986) 19 977,

 2616 20:15:12.791746  

 2617 20:15:12.794494  Write Rank0 MR14 =0x6

 2618 20:15:12.803077  

 2619 20:15:12.803487  	CH=1, VrefRange= 0, VrefLevel = 6

 2620 20:15:12.809733  TX Bit0 (977~997) 21 987,   Bit8 (969~987) 19 978,

 2621 20:15:12.813138  TX Bit1 (976~995) 20 985,   Bit9 (969~987) 19 978,

 2622 20:15:12.819752  TX Bit2 (975~992) 18 983,   Bit10 (971~988) 18 979,

 2623 20:15:12.823082  TX Bit3 (972~990) 19 981,   Bit11 (973~991) 19 982,

 2624 20:15:12.826263  TX Bit4 (976~993) 18 984,   Bit12 (971~991) 21 981,

 2625 20:15:12.833240  TX Bit5 (977~997) 21 987,   Bit13 (974~991) 18 982,

 2626 20:15:12.836594  TX Bit6 (978~997) 20 987,   Bit14 (972~989) 18 980,

 2627 20:15:12.839717  TX Bit7 (976~992) 17 984,   Bit15 (967~986) 20 976,

 2628 20:15:12.840139  

 2629 20:15:12.843214  Write Rank0 MR14 =0x8

 2630 20:15:12.851740  

 2631 20:15:12.852169  	CH=1, VrefRange= 0, VrefLevel = 8

 2632 20:15:12.858418  TX Bit0 (977~998) 22 987,   Bit8 (969~989) 21 979,

 2633 20:15:12.861870  TX Bit1 (976~996) 21 986,   Bit9 (970~989) 20 979,

 2634 20:15:12.868577  TX Bit2 (975~992) 18 983,   Bit10 (971~989) 19 980,

 2635 20:15:12.871725  TX Bit3 (972~991) 20 981,   Bit11 (973~991) 19 982,

 2636 20:15:12.875164  TX Bit4 (976~993) 18 984,   Bit12 (971~991) 21 981,

 2637 20:15:12.881779  TX Bit5 (976~997) 22 986,   Bit13 (973~991) 19 982,

 2638 20:15:12.885067  TX Bit6 (977~997) 21 987,   Bit14 (972~990) 19 981,

 2639 20:15:12.888561  TX Bit7 (976~992) 17 984,   Bit15 (967~987) 21 977,

 2640 20:15:12.888979  

 2641 20:15:12.891585  Write Rank0 MR14 =0xa

 2642 20:15:12.900900  

 2643 20:15:12.903919  	CH=1, VrefRange= 0, VrefLevel = 10

 2644 20:15:12.907091  TX Bit0 (977~998) 22 987,   Bit8 (969~990) 22 979,

 2645 20:15:12.910445  TX Bit1 (976~996) 21 986,   Bit9 (969~989) 21 979,

 2646 20:15:12.917088  TX Bit2 (974~992) 19 983,   Bit10 (971~990) 20 980,

 2647 20:15:12.920486  TX Bit3 (971~991) 21 981,   Bit11 (973~992) 20 982,

 2648 20:15:12.923867  TX Bit4 (975~994) 20 984,   Bit12 (971~992) 22 981,

 2649 20:15:12.930478  TX Bit5 (976~998) 23 987,   Bit13 (973~991) 19 982,

 2650 20:15:12.933939  TX Bit6 (977~998) 22 987,   Bit14 (971~991) 21 981,

 2651 20:15:12.937048  TX Bit7 (975~992) 18 983,   Bit15 (967~988) 22 977,

 2652 20:15:12.937530  

 2653 20:15:12.940282  Write Rank0 MR14 =0xc

 2654 20:15:12.949303  

 2655 20:15:12.953009  	CH=1, VrefRange= 0, VrefLevel = 12

 2656 20:15:12.956221  TX Bit0 (977~998) 22 987,   Bit8 (969~990) 22 979,

 2657 20:15:12.959518  TX Bit1 (976~996) 21 986,   Bit9 (969~990) 22 979,

 2658 20:15:12.966609  TX Bit2 (974~993) 20 983,   Bit10 (970~990) 21 980,

 2659 20:15:12.969373  TX Bit3 (971~991) 21 981,   Bit11 (972~992) 21 982,

 2660 20:15:12.973128  TX Bit4 (975~995) 21 985,   Bit12 (970~992) 23 981,

 2661 20:15:12.979658  TX Bit5 (976~998) 23 987,   Bit13 (972~991) 20 981,

 2662 20:15:12.983236  TX Bit6 (977~998) 22 987,   Bit14 (971~991) 21 981,

 2663 20:15:12.986896  TX Bit7 (975~993) 19 984,   Bit15 (967~988) 22 977,

 2664 20:15:12.987422  

 2665 20:15:12.989461  Write Rank0 MR14 =0xe

 2666 20:15:12.998463  

 2667 20:15:13.002207  	CH=1, VrefRange= 0, VrefLevel = 14

 2668 20:15:13.005430  TX Bit0 (977~999) 23 988,   Bit8 (968~990) 23 979,

 2669 20:15:13.008576  TX Bit1 (975~997) 23 986,   Bit9 (968~990) 23 979,

 2670 20:15:13.015039  TX Bit2 (973~993) 21 983,   Bit10 (970~991) 22 980,

 2671 20:15:13.018591  TX Bit3 (971~992) 22 981,   Bit11 (972~992) 21 982,

 2672 20:15:13.022225  TX Bit4 (975~996) 22 985,   Bit12 (970~992) 23 981,

 2673 20:15:13.028591  TX Bit5 (976~998) 23 987,   Bit13 (972~992) 21 982,

 2674 20:15:13.032003  TX Bit6 (977~998) 22 987,   Bit14 (970~991) 22 980,

 2675 20:15:13.035072  TX Bit7 (975~994) 20 984,   Bit15 (967~989) 23 978,

 2676 20:15:13.035490  

 2677 20:15:13.038579  Write Rank0 MR14 =0x10

 2678 20:15:13.047313  

 2679 20:15:13.051254  	CH=1, VrefRange= 0, VrefLevel = 16

 2680 20:15:13.054055  TX Bit0 (977~999) 23 988,   Bit8 (968~991) 24 979,

 2681 20:15:13.057248  TX Bit1 (976~998) 23 987,   Bit9 (969~990) 22 979,

 2682 20:15:13.063861  TX Bit2 (973~994) 22 983,   Bit10 (969~991) 23 980,

 2683 20:15:13.067518  TX Bit3 (970~992) 23 981,   Bit11 (971~992) 22 981,

 2684 20:15:13.071104  TX Bit4 (975~996) 22 985,   Bit12 (970~992) 23 981,

 2685 20:15:13.077230  TX Bit5 (976~998) 23 987,   Bit13 (971~992) 22 981,

 2686 20:15:13.080844  TX Bit6 (977~998) 22 987,   Bit14 (970~992) 23 981,

 2687 20:15:13.083951  TX Bit7 (974~994) 21 984,   Bit15 (967~990) 24 978,

 2688 20:15:13.084370  

 2689 20:15:13.087444  Write Rank0 MR14 =0x12

 2690 20:15:13.096474  

 2691 20:15:13.099772  	CH=1, VrefRange= 0, VrefLevel = 18

 2692 20:15:13.103167  TX Bit0 (976~999) 24 987,   Bit8 (968~991) 24 979,

 2693 20:15:13.106589  TX Bit1 (975~998) 24 986,   Bit9 (968~991) 24 979,

 2694 20:15:13.113335  TX Bit2 (973~994) 22 983,   Bit10 (969~992) 24 980,

 2695 20:15:13.116801  TX Bit3 (970~992) 23 981,   Bit11 (970~992) 23 981,

 2696 20:15:13.119902  TX Bit4 (974~997) 24 985,   Bit12 (970~992) 23 981,

 2697 20:15:13.126918  TX Bit5 (976~999) 24 987,   Bit13 (971~992) 22 981,

 2698 20:15:13.129684  TX Bit6 (977~999) 23 988,   Bit14 (970~992) 23 981,

 2699 20:15:13.132987  TX Bit7 (974~995) 22 984,   Bit15 (967~990) 24 978,

 2700 20:15:13.133446  

 2701 20:15:13.136361  Write Rank0 MR14 =0x14

 2702 20:15:13.145309  

 2703 20:15:13.148971  	CH=1, VrefRange= 0, VrefLevel = 20

 2704 20:15:13.152421  TX Bit0 (976~999) 24 987,   Bit8 (968~992) 25 980,

 2705 20:15:13.155814  TX Bit1 (975~998) 24 986,   Bit9 (968~991) 24 979,

 2706 20:15:13.162257  TX Bit2 (972~994) 23 983,   Bit10 (969~992) 24 980,

 2707 20:15:13.165658  TX Bit3 (970~993) 24 981,   Bit11 (970~993) 24 981,

 2708 20:15:13.168791  TX Bit4 (974~997) 24 985,   Bit12 (970~993) 24 981,

 2709 20:15:13.175755  TX Bit5 (976~999) 24 987,   Bit13 (970~992) 23 981,

 2710 20:15:13.178978  TX Bit6 (977~999) 23 988,   Bit14 (970~992) 23 981,

 2711 20:15:13.182253  TX Bit7 (974~995) 22 984,   Bit15 (966~991) 26 978,

 2712 20:15:13.185157  

 2713 20:15:13.185597  Write Rank0 MR14 =0x16

 2714 20:15:13.195195  

 2715 20:15:13.198031  	CH=1, VrefRange= 0, VrefLevel = 22

 2716 20:15:13.201398  TX Bit0 (976~1000) 25 988,   Bit8 (968~992) 25 980,

 2717 20:15:13.204729  TX Bit1 (975~998) 24 986,   Bit9 (968~991) 24 979,

 2718 20:15:13.211205  TX Bit2 (972~995) 24 983,   Bit10 (969~992) 24 980,

 2719 20:15:13.214682  TX Bit3 (970~993) 24 981,   Bit11 (970~993) 24 981,

 2720 20:15:13.218201  TX Bit4 (973~998) 26 985,   Bit12 (969~993) 25 981,

 2721 20:15:13.224351  TX Bit5 (975~999) 25 987,   Bit13 (971~992) 22 981,

 2722 20:15:13.228018  TX Bit6 (976~999) 24 987,   Bit14 (970~992) 23 981,

 2723 20:15:13.231111  TX Bit7 (974~996) 23 985,   Bit15 (966~990) 25 978,

 2724 20:15:13.234612  

 2725 20:15:13.235025  Write Rank0 MR14 =0x18

 2726 20:15:13.243909  

 2727 20:15:13.247306  	CH=1, VrefRange= 0, VrefLevel = 24

 2728 20:15:13.251019  TX Bit0 (976~1000) 25 988,   Bit8 (968~992) 25 980,

 2729 20:15:13.254148  TX Bit1 (974~999) 26 986,   Bit9 (968~992) 25 980,

 2730 20:15:13.260866  TX Bit2 (971~994) 24 982,   Bit10 (968~992) 25 980,

 2731 20:15:13.264144  TX Bit3 (969~993) 25 981,   Bit11 (970~993) 24 981,

 2732 20:15:13.267951  TX Bit4 (973~997) 25 985,   Bit12 (969~993) 25 981,

 2733 20:15:13.273961  TX Bit5 (975~999) 25 987,   Bit13 (970~992) 23 981,

 2734 20:15:13.277703  TX Bit6 (976~1000) 25 988,   Bit14 (969~992) 24 980,

 2735 20:15:13.280816  TX Bit7 (973~997) 25 985,   Bit15 (966~989) 24 977,

 2736 20:15:13.284301  

 2737 20:15:13.284810  Write Rank0 MR14 =0x1a

 2738 20:15:13.293819  

 2739 20:15:13.296689  	CH=1, VrefRange= 0, VrefLevel = 26

 2740 20:15:13.300266  TX Bit0 (976~1000) 25 988,   Bit8 (968~992) 25 980,

 2741 20:15:13.303552  TX Bit1 (974~999) 26 986,   Bit9 (968~992) 25 980,

 2742 20:15:13.310339  TX Bit2 (971~994) 24 982,   Bit10 (968~992) 25 980,

 2743 20:15:13.313644  TX Bit3 (969~993) 25 981,   Bit11 (970~993) 24 981,

 2744 20:15:13.316764  TX Bit4 (973~997) 25 985,   Bit12 (969~993) 25 981,

 2745 20:15:13.323474  TX Bit5 (975~999) 25 987,   Bit13 (970~992) 23 981,

 2746 20:15:13.326598  TX Bit6 (976~1000) 25 988,   Bit14 (969~992) 24 980,

 2747 20:15:13.333211  TX Bit7 (973~997) 25 985,   Bit15 (966~989) 24 977,

 2748 20:15:13.333707  

 2749 20:15:13.336522  wait MRW command Rank0 MR14 =0x1c fired (1)

 2750 20:15:13.336945  Write Rank0 MR14 =0x1c

 2751 20:15:13.346672  

 2752 20:15:13.350086  	CH=1, VrefRange= 0, VrefLevel = 28

 2753 20:15:13.353383  TX Bit0 (976~1000) 25 988,   Bit8 (968~992) 25 980,

 2754 20:15:13.356527  TX Bit1 (974~999) 26 986,   Bit9 (968~992) 25 980,

 2755 20:15:13.363118  TX Bit2 (971~994) 24 982,   Bit10 (968~992) 25 980,

 2756 20:15:13.366407  TX Bit3 (969~993) 25 981,   Bit11 (970~993) 24 981,

 2757 20:15:13.370197  TX Bit4 (973~997) 25 985,   Bit12 (969~993) 25 981,

 2758 20:15:13.376349  TX Bit5 (975~999) 25 987,   Bit13 (970~992) 23 981,

 2759 20:15:13.379750  TX Bit6 (976~1000) 25 988,   Bit14 (969~992) 24 980,

 2760 20:15:13.386418  TX Bit7 (973~997) 25 985,   Bit15 (966~989) 24 977,

 2761 20:15:13.386837  

 2762 20:15:13.387164  Write Rank0 MR14 =0x1e

 2763 20:15:13.396047  

 2764 20:15:13.399479  	CH=1, VrefRange= 0, VrefLevel = 30

 2765 20:15:13.402589  TX Bit0 (976~1000) 25 988,   Bit8 (968~992) 25 980,

 2766 20:15:13.406122  TX Bit1 (974~999) 26 986,   Bit9 (968~992) 25 980,

 2767 20:15:13.412707  TX Bit2 (971~994) 24 982,   Bit10 (968~992) 25 980,

 2768 20:15:13.416062  TX Bit3 (969~993) 25 981,   Bit11 (970~993) 24 981,

 2769 20:15:13.419663  TX Bit4 (973~997) 25 985,   Bit12 (969~993) 25 981,

 2770 20:15:13.426290  TX Bit5 (975~999) 25 987,   Bit13 (970~992) 23 981,

 2771 20:15:13.429234  TX Bit6 (976~1000) 25 988,   Bit14 (969~992) 24 980,

 2772 20:15:13.432700  TX Bit7 (973~997) 25 985,   Bit15 (966~989) 24 977,

 2773 20:15:13.436146  

 2774 20:15:13.436557  Write Rank0 MR14 =0x20

 2775 20:15:13.444918  

 2776 20:15:13.448699  	CH=1, VrefRange= 0, VrefLevel = 32

 2777 20:15:13.452060  TX Bit0 (976~1000) 25 988,   Bit8 (968~992) 25 980,

 2778 20:15:13.455663  TX Bit1 (974~999) 26 986,   Bit9 (968~992) 25 980,

 2779 20:15:13.462447  TX Bit2 (971~994) 24 982,   Bit10 (968~992) 25 980,

 2780 20:15:13.465374  TX Bit3 (969~993) 25 981,   Bit11 (970~993) 24 981,

 2781 20:15:13.468836  TX Bit4 (973~997) 25 985,   Bit12 (969~993) 25 981,

 2782 20:15:13.475246  TX Bit5 (975~999) 25 987,   Bit13 (970~992) 23 981,

 2783 20:15:13.478462  TX Bit6 (976~1000) 25 988,   Bit14 (969~992) 24 980,

 2784 20:15:13.482282  TX Bit7 (973~997) 25 985,   Bit15 (966~989) 24 977,

 2785 20:15:13.485084  

 2786 20:15:13.485550  

 2787 20:15:13.488655  TX Vref found, early break! 365< 375

 2788 20:15:13.491771  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 2789 20:15:13.495418  u1DelayCellOfst[0]=8 cells (7 PI)

 2790 20:15:13.498532  u1DelayCellOfst[1]=6 cells (5 PI)

 2791 20:15:13.502095  u1DelayCellOfst[2]=1 cells (1 PI)

 2792 20:15:13.505286  u1DelayCellOfst[3]=0 cells (0 PI)

 2793 20:15:13.508620  u1DelayCellOfst[4]=5 cells (4 PI)

 2794 20:15:13.509035  u1DelayCellOfst[5]=7 cells (6 PI)

 2795 20:15:13.511631  u1DelayCellOfst[6]=8 cells (7 PI)

 2796 20:15:13.515158  u1DelayCellOfst[7]=5 cells (4 PI)

 2797 20:15:13.518492  Byte0, DQ PI dly=981, DQM PI dly= 984

 2798 20:15:13.525125  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)

 2799 20:15:13.525737  

 2800 20:15:13.528838  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)

 2801 20:15:13.529254  

 2802 20:15:13.532116  u1DelayCellOfst[8]=3 cells (3 PI)

 2803 20:15:13.535314  u1DelayCellOfst[9]=3 cells (3 PI)

 2804 20:15:13.538531  u1DelayCellOfst[10]=3 cells (3 PI)

 2805 20:15:13.542035  u1DelayCellOfst[11]=5 cells (4 PI)

 2806 20:15:13.545672  u1DelayCellOfst[12]=5 cells (4 PI)

 2807 20:15:13.546097  u1DelayCellOfst[13]=5 cells (4 PI)

 2808 20:15:13.548424  u1DelayCellOfst[14]=3 cells (3 PI)

 2809 20:15:13.551759  u1DelayCellOfst[15]=0 cells (0 PI)

 2810 20:15:13.555113  Byte1, DQ PI dly=977, DQM PI dly= 979

 2811 20:15:13.561554  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 2812 20:15:13.561969  

 2813 20:15:13.564893  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 2814 20:15:13.565342  

 2815 20:15:13.568352  Write Rank0 MR14 =0x18

 2816 20:15:13.568808  

 2817 20:15:13.569177  Final TX Range 0 Vref 24

 2818 20:15:13.571683  

 2819 20:15:13.575098  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2820 20:15:13.578230  

 2821 20:15:13.581377  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2822 20:15:13.591434  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2823 20:15:13.598420  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2824 20:15:13.598866  Write Rank0 MR3 =0xb0

 2825 20:15:13.601541  DramC Write-DBI on

 2826 20:15:13.602077  ==

 2827 20:15:13.604973  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2828 20:15:13.608144  fsp= 1, odt_onoff= 1, Byte mode= 0

 2829 20:15:13.608576  ==

 2830 20:15:13.615025  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2831 20:15:13.615481  

 2832 20:15:13.618231  Begin, DQ Scan Range 699~763

 2833 20:15:13.618671  

 2834 20:15:13.619021  

 2835 20:15:13.619333  	TX Vref Scan disable

 2836 20:15:13.621749  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2837 20:15:13.624546  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2838 20:15:13.627950  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2839 20:15:13.631246  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2840 20:15:13.638062  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2841 20:15:13.641493  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2842 20:15:13.644638  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2843 20:15:13.647738  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2844 20:15:13.651323  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2845 20:15:13.654528  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2846 20:15:13.657781  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2847 20:15:13.661497  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 2848 20:15:13.664735  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 2849 20:15:13.668083  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2850 20:15:13.671164  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2851 20:15:13.674603  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2852 20:15:13.677816  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2853 20:15:13.685817  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2854 20:15:13.689355  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2855 20:15:13.693037  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2856 20:15:13.696318  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2857 20:15:13.699784  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2858 20:15:13.702753  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2859 20:15:13.705986  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2860 20:15:13.709365  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2861 20:15:13.712977  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2862 20:15:13.716001  Byte0, DQ PI dly=729, DQM PI dly= 729

 2863 20:15:13.719216  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)

 2864 20:15:13.719631  

 2865 20:15:13.725769  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)

 2866 20:15:13.726189  

 2867 20:15:13.729545  Byte1, DQ PI dly=722, DQM PI dly= 722

 2868 20:15:13.732892  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)

 2869 20:15:13.733475  

 2870 20:15:13.736514  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)

 2871 20:15:13.737027  

 2872 20:15:13.742823  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2873 20:15:13.749639  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2874 20:15:13.759520  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2875 20:15:13.760024  Write Rank0 MR3 =0x30

 2876 20:15:13.762924  DramC Write-DBI off

 2877 20:15:13.763328  

 2878 20:15:13.763650  [DATLAT]

 2879 20:15:13.765947  Freq=1600, CH1 RK0, use_rxtx_scan=0

 2880 20:15:13.766364  

 2881 20:15:13.769111  DATLAT Default: 0xf

 2882 20:15:13.769711  7, 0xFFFF, sum=0

 2883 20:15:13.772383  8, 0xFFFF, sum=0

 2884 20:15:13.772805  9, 0xFFFF, sum=0

 2885 20:15:13.775785  10, 0xFFFF, sum=0

 2886 20:15:13.776200  11, 0xFFFF, sum=0

 2887 20:15:13.779674  12, 0xFFFF, sum=0

 2888 20:15:13.780192  13, 0xFFFF, sum=0

 2889 20:15:13.780528  14, 0x0, sum=1

 2890 20:15:13.782899  15, 0x0, sum=2

 2891 20:15:13.783313  16, 0x0, sum=3

 2892 20:15:13.785939  17, 0x0, sum=4

 2893 20:15:13.789719  pattern=2 first_step=14 total pass=5 best_step=16

 2894 20:15:13.790145  ==

 2895 20:15:13.796488  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2896 20:15:13.796996  fsp= 1, odt_onoff= 1, Byte mode= 0

 2897 20:15:13.799298  ==

 2898 20:15:13.802860  Start DQ dly to find pass range UseTestEngine =1

 2899 20:15:13.805872  x-axis: bit #, y-axis: DQ dly (-127~63)

 2900 20:15:13.806474  RX Vref Scan = 1

 2901 20:15:13.929642  

 2902 20:15:13.930236  RX Vref found, early break!

 2903 20:15:13.930810  

 2904 20:15:13.936483  Final RX Vref 13, apply to both rank0 and 1

 2905 20:15:13.937087  ==

 2906 20:15:13.939881  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2907 20:15:13.943055  fsp= 1, odt_onoff= 1, Byte mode= 0

 2908 20:15:13.943614  ==

 2909 20:15:13.944119  DQS Delay:

 2910 20:15:13.946532  DQS0 = 0, DQS1 = 0

 2911 20:15:13.947192  DQM Delay:

 2912 20:15:13.949829  DQM0 = 20, DQM1 = 18

 2913 20:15:13.950394  DQ Delay:

 2914 20:15:13.953393  DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15

 2915 20:15:13.956401  DQ4 =19, DQ5 =23, DQ6 =25, DQ7 =19

 2916 20:15:13.959967  DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19

 2917 20:15:13.963239  DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17

 2918 20:15:13.963710  

 2919 20:15:13.964093  

 2920 20:15:13.964490  

 2921 20:15:13.966284  [DramC_TX_OE_Calibration] TA2

 2922 20:15:13.969797  Original DQ_B0 (3 6) =30, OEN = 27

 2923 20:15:13.972989  Original DQ_B1 (3 6) =30, OEN = 27

 2924 20:15:13.976536  23, 0x0, End_B0=23 End_B1=23

 2925 20:15:13.977302  24, 0x0, End_B0=24 End_B1=24

 2926 20:15:13.979549  25, 0x0, End_B0=25 End_B1=25

 2927 20:15:13.982810  26, 0x0, End_B0=26 End_B1=26

 2928 20:15:13.986112  27, 0x0, End_B0=27 End_B1=27

 2929 20:15:13.986741  28, 0x0, End_B0=28 End_B1=28

 2930 20:15:13.989521  29, 0x0, End_B0=29 End_B1=29

 2931 20:15:13.992978  30, 0x0, End_B0=30 End_B1=30

 2932 20:15:13.996267  31, 0xFFFF, End_B0=30 End_B1=30

 2933 20:15:14.002924  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2934 20:15:14.006141  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2935 20:15:14.006570  

 2936 20:15:14.007000  

 2937 20:15:14.009733  Write Rank0 MR23 =0x3f

 2938 20:15:14.010162  [DQSOSC]

 2939 20:15:14.015943  [DQSOSCAuto] RK0, (LSB)MR18= 0xbd, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps

 2940 20:15:14.022920  CH1_RK0: MR19=0x3, MR18=0xBD, DQSOSC=329, MR23=63, INC=22, DEC=34

 2941 20:15:14.026212  Write Rank0 MR23 =0x3f

 2942 20:15:14.026733  [DQSOSC]

 2943 20:15:14.032583  [DQSOSCAuto] RK0, (LSB)MR18= 0xbf, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps

 2944 20:15:14.036254  CH1 RK0: MR19=3, MR18=BF

 2945 20:15:14.039763  [RankSwap] Rank num 2, (Multi 1), Rank 1

 2946 20:15:14.042525  Write Rank0 MR2 =0xad

 2947 20:15:14.042954  [Write Leveling]

 2948 20:15:14.046091  delay  byte0  byte1  byte2  byte3

 2949 20:15:14.046622  

 2950 20:15:14.049514  10    0   0   

 2951 20:15:14.050065  11    0   0   

 2952 20:15:14.050540  12    0   0   

 2953 20:15:14.053097  13    0   0   

 2954 20:15:14.053677  14    0   0   

 2955 20:15:14.055986  15    0   0   

 2956 20:15:14.056498  16    0   0   

 2957 20:15:14.056870  17    0   0   

 2958 20:15:14.059460  18    0   0   

 2959 20:15:14.060054  19    0   0   

 2960 20:15:14.062868  20    0   0   

 2961 20:15:14.063438  21    0   0   

 2962 20:15:14.063920  22    0   0   

 2963 20:15:14.066534  23    0   0   

 2964 20:15:14.067099  24    0   0   

 2965 20:15:14.069858  25    0   0   

 2966 20:15:14.070275  26    0   0   

 2967 20:15:14.073157  27    0   0   

 2968 20:15:14.073685  28    0   0   

 2969 20:15:14.074062  29    0   0   

 2970 20:15:14.076388  30    0   0   

 2971 20:15:14.076764  31    0   0   

 2972 20:15:14.079968  32    0   ff   

 2973 20:15:14.080518  33    0   ff   

 2974 20:15:14.081023  34    0   ff   

 2975 20:15:14.082998  35    ff   ff   

 2976 20:15:14.083575  36    ff   ff   

 2977 20:15:14.086911  37    ff   ff   

 2978 20:15:14.087489  38    ff   ff   

 2979 20:15:14.090077  39    ff   ff   

 2980 20:15:14.090611  40    ff   ff   

 2981 20:15:14.093323  41    ff   ff   

 2982 20:15:14.096488  pass bytecount = 0xff (0xff: all bytes pass) 

 2983 20:15:14.097112  

 2984 20:15:14.097704  DQS0 dly: 35

 2985 20:15:14.100022  DQS1 dly: 32

 2986 20:15:14.100586  Write Rank0 MR2 =0x2d

 2987 20:15:14.103213  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2988 20:15:14.109841  wait MRW command Rank1 MR1 =0xd6 fired (1)

 2989 20:15:14.110396  Write Rank1 MR1 =0xd6

 2990 20:15:14.110873  [Gating]

 2991 20:15:14.111343  ==

 2992 20:15:14.116579  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2993 20:15:14.120468  fsp= 1, odt_onoff= 1, Byte mode= 0

 2994 20:15:14.121049  ==

 2995 20:15:14.123214  3 1 0 |3231 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2996 20:15:14.130046  3 1 4 |2c2c 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2997 20:15:14.133394  3 1 8 |1211 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 2998 20:15:14.136666  3 1 12 |2f2f 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 2999 20:15:14.142923  3 1 16 |1716 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3000 20:15:14.146399  3 1 20 |100f 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3001 20:15:14.150007  3 1 24 |3130 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3002 20:15:14.153503  3 1 28 |201 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 3003 20:15:14.159605  3 2 0 |3a39 403  |(11 11)(11 11) |(1 1)(1 1)| 0

 3004 20:15:14.163232  3 2 4 |3a3a 3d3d  |(10 10)(11 11) |(0 0)(1 1)| 0

 3005 20:15:14.166322  3 2 8 |3837 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3006 20:15:14.173042  3 2 12 |3636 3d3d  |(0 0)(11 11) |(0 0)(1 1)| 0

 3007 20:15:14.176372  3 2 16 |1312 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3008 20:15:14.179667  3 2 20 |1b1b 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3009 20:15:14.182928  3 2 24 |201 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3010 20:15:14.189680  3 2 28 |1514 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3011 20:15:14.193049  3 3 0 |2928 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3012 20:15:14.196246  [Byte 0] Lead/lag falling Transition (3, 3, 0)

 3013 20:15:14.203282  3 3 4 |3534 b0a  |(11 11)(11 11) |(0 1)(1 1)| 0

 3014 20:15:14.206104  3 3 8 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 3015 20:15:14.209374  [Byte 1] Lead/lag falling Transition (3, 3, 8)

 3016 20:15:14.216566  3 3 12 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3017 20:15:14.219787  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3018 20:15:14.223499  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 3019 20:15:14.226746  3 3 24 |3534 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3020 20:15:14.232769  3 3 28 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3021 20:15:14.236347  3 4 0 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 3022 20:15:14.239778  3 4 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3023 20:15:14.246548  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3024 20:15:14.250046  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3025 20:15:14.253372  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3026 20:15:14.259787  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3027 20:15:14.262863  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3028 20:15:14.266263  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3029 20:15:14.269669  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3030 20:15:14.276500  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3031 20:15:14.279959  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3032 20:15:14.283009  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3033 20:15:14.289721  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3034 20:15:14.293055  [Byte 0] Lead/lag falling Transition (3, 5, 16)

 3035 20:15:14.296573  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 3036 20:15:14.299711  [Byte 0] Lead/lag Transition tap number (2)

 3037 20:15:14.306384  3 5 24 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3038 20:15:14.309485  [Byte 1] Lead/lag falling Transition (3, 5, 24)

 3039 20:15:14.312987  3 5 28 |403 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 3040 20:15:14.319629  [Byte 1] Lead/lag Transition tap number (2)

 3041 20:15:14.322829  3 6 0 |4646 d0c  |(0 0)(11 11) |(0 0)(0 0)| 0

 3042 20:15:14.323282  [Byte 0]First pass (3, 6, 0)

 3043 20:15:14.329550  3 6 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3044 20:15:14.329993  [Byte 1]First pass (3, 6, 4)

 3045 20:15:14.336579  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3046 20:15:14.339708  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3047 20:15:14.343390  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3048 20:15:14.346309  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3049 20:15:14.352682  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3050 20:15:14.356072  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3051 20:15:14.359269  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3052 20:15:14.362647  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3053 20:15:14.366151  All bytes gating window > 1UI, Early break!

 3054 20:15:14.366569  

 3055 20:15:14.369695  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)

 3056 20:15:14.370113  

 3057 20:15:14.376251  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

 3058 20:15:14.376781  

 3059 20:15:14.377119  

 3060 20:15:14.377639  

 3061 20:15:14.379560  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)

 3062 20:15:14.379995  

 3063 20:15:14.383016  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

 3064 20:15:14.383454  

 3065 20:15:14.383891  

 3066 20:15:14.386149  Write Rank1 MR1 =0x56

 3067 20:15:14.386582  

 3068 20:15:14.389382  best RODT dly(2T, 0.5T) = (2, 2)

 3069 20:15:14.389815  

 3070 20:15:14.392666  best RODT dly(2T, 0.5T) = (2, 2)

 3071 20:15:14.393098  ==

 3072 20:15:14.396216  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3073 20:15:14.399718  fsp= 1, odt_onoff= 1, Byte mode= 0

 3074 20:15:14.400136  ==

 3075 20:15:14.406312  Start DQ dly to find pass range UseTestEngine =0

 3076 20:15:14.409431  x-axis: bit #, y-axis: DQ dly (-127~63)

 3077 20:15:14.409913  RX Vref Scan = 0

 3078 20:15:14.412740  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3079 20:15:14.415949  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3080 20:15:14.419180  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3081 20:15:14.422592  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3082 20:15:14.426248  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3083 20:15:14.426670  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3084 20:15:14.429217  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3085 20:15:14.432707  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3086 20:15:14.436113  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3087 20:15:14.439461  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3088 20:15:14.442654  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3089 20:15:14.446023  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3090 20:15:14.449329  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3091 20:15:14.449849  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3092 20:15:14.452773  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3093 20:15:14.456153  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3094 20:15:14.459540  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3095 20:15:14.462850  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3096 20:15:14.466328  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3097 20:15:14.469172  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3098 20:15:14.469661  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3099 20:15:14.472596  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3100 20:15:14.476513  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3101 20:15:14.479209  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3102 20:15:14.483083  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 3103 20:15:14.486073  -1, [0] xxxoxxxx xxxxxxxo [MSB]

 3104 20:15:14.489670  0, [0] xxooxxxo xxxxxxxo [MSB]

 3105 20:15:14.490118  1, [0] xxooxxxo xxxxxxxo [MSB]

 3106 20:15:14.492618  2, [0] xxoooxxo oooxxxoo [MSB]

 3107 20:15:14.495985  3, [0] xxoooxxo ooooxooo [MSB]

 3108 20:15:14.499140  4, [0] xxoooxxo ooooxooo [MSB]

 3109 20:15:14.502626  5, [0] xoooooxo oooooooo [MSB]

 3110 20:15:14.506390  6, [0] xoooooxo oooooooo [MSB]

 3111 20:15:14.506814  34, [0] oooxoooo oooooooo [MSB]

 3112 20:15:14.509133  35, [0] ooxxoooo ooooooox [MSB]

 3113 20:15:14.512527  36, [0] ooxxoooo ooooooox [MSB]

 3114 20:15:14.515802  37, [0] ooxxxooo xoxoooox [MSB]

 3115 20:15:14.519358  38, [0] ooxxxooo xoxooxox [MSB]

 3116 20:15:14.522616  39, [0] ooxxxoox xxxxoxxx [MSB]

 3117 20:15:14.525723  40, [0] ooxxxoox xxxxoxxx [MSB]

 3118 20:15:14.529130  41, [0] ooxxxoox xxxxxxxx [MSB]

 3119 20:15:14.529720  42, [0] xxxxxxxx xxxxxxxx [MSB]

 3120 20:15:14.532632  iDelay=42, Bit 0, Center 24 (7 ~ 41) 35

 3121 20:15:14.535552  iDelay=42, Bit 1, Center 23 (5 ~ 41) 37

 3122 20:15:14.542459  iDelay=42, Bit 2, Center 17 (0 ~ 34) 35

 3123 20:15:14.545898  iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36

 3124 20:15:14.549185  iDelay=42, Bit 4, Center 19 (2 ~ 36) 35

 3125 20:15:14.552268  iDelay=42, Bit 5, Center 23 (5 ~ 41) 37

 3126 20:15:14.555766  iDelay=42, Bit 6, Center 24 (7 ~ 41) 35

 3127 20:15:14.559260  iDelay=42, Bit 7, Center 19 (0 ~ 38) 39

 3128 20:15:14.562785  iDelay=42, Bit 8, Center 19 (2 ~ 36) 35

 3129 20:15:14.565626  iDelay=42, Bit 9, Center 20 (2 ~ 38) 37

 3130 20:15:14.569350  iDelay=42, Bit 10, Center 19 (2 ~ 36) 35

 3131 20:15:14.572522  iDelay=42, Bit 11, Center 20 (3 ~ 38) 36

 3132 20:15:14.575974  iDelay=42, Bit 12, Center 22 (5 ~ 40) 36

 3133 20:15:14.579219  iDelay=42, Bit 13, Center 20 (3 ~ 37) 35

 3134 20:15:14.582455  iDelay=42, Bit 14, Center 20 (2 ~ 38) 37

 3135 20:15:14.588860  iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36

 3136 20:15:14.589323  ==

 3137 20:15:14.592059  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3138 20:15:14.595186  fsp= 1, odt_onoff= 1, Byte mode= 0

 3139 20:15:14.595624  ==

 3140 20:15:14.599204  DQS Delay:

 3141 20:15:14.599686  DQS0 = 0, DQS1 = 0

 3142 20:15:14.600128  DQM Delay:

 3143 20:15:14.602312  DQM0 = 20, DQM1 = 19

 3144 20:15:14.602910  DQ Delay:

 3145 20:15:14.605321  DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15

 3146 20:15:14.608976  DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19

 3147 20:15:14.611829  DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20

 3148 20:15:14.615268  DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16

 3149 20:15:14.615686  

 3150 20:15:14.616013  

 3151 20:15:14.618902  DramC Write-DBI off

 3152 20:15:14.619317  ==

 3153 20:15:14.622019  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3154 20:15:14.625175  fsp= 1, odt_onoff= 1, Byte mode= 0

 3155 20:15:14.625638  ==

 3156 20:15:14.631854  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 3157 20:15:14.632272  

 3158 20:15:14.632602  Begin, DQ Scan Range 928~1184

 3159 20:15:14.635278  

 3160 20:15:14.635694  

 3161 20:15:14.636022  	TX Vref Scan disable

 3162 20:15:14.638838  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 3163 20:15:14.641886  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 3164 20:15:14.645244  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 3165 20:15:14.648891  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 3166 20:15:14.651868  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 3167 20:15:14.659073  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 3168 20:15:14.661984  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3169 20:15:14.665310  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3170 20:15:14.668538  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3171 20:15:14.671836  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3172 20:15:14.675251  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 3173 20:15:14.678542  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3174 20:15:14.682137  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3175 20:15:14.685323  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 3176 20:15:14.688809  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 3177 20:15:14.692158  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3178 20:15:14.695320  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3179 20:15:14.698690  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 3180 20:15:14.702174  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 3181 20:15:14.705166  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 3182 20:15:14.709069  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 3183 20:15:14.714987  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 3184 20:15:14.718597  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 3185 20:15:14.722125  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 3186 20:15:14.724997  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 3187 20:15:14.728300  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 3188 20:15:14.732168  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3189 20:15:14.735356  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3190 20:15:14.738504  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3191 20:15:14.742052  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3192 20:15:14.745213  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3193 20:15:14.748396  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3194 20:15:14.751939  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3195 20:15:14.755028  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3196 20:15:14.758867  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3197 20:15:14.761550  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3198 20:15:14.765337  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3199 20:15:14.768331  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3200 20:15:14.771765  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3201 20:15:14.775600  967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]

 3202 20:15:14.778527  968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]

 3203 20:15:14.782020  969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]

 3204 20:15:14.788858  970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]

 3205 20:15:14.791876  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 3206 20:15:14.795355  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 3207 20:15:14.798499  973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]

 3208 20:15:14.802047  974 |3 6 14|[0] xxooxxxx oooooooo [MSB]

 3209 20:15:14.804953  975 |3 6 15|[0] xxoooxxx oooooooo [MSB]

 3210 20:15:14.808357  976 |3 6 16|[0] xxoooxxo oooooooo [MSB]

 3211 20:15:14.811991  988 |3 6 28|[0] oooooooo ooooooox [MSB]

 3212 20:15:14.818757  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 3213 20:15:14.821921  990 |3 6 30|[0] oooooooo ooooooox [MSB]

 3214 20:15:14.825341  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 3215 20:15:14.828572  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 3216 20:15:14.831845  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 3217 20:15:14.835104  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 3218 20:15:14.838764  995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]

 3219 20:15:14.841998  996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]

 3220 20:15:14.844855  997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]

 3221 20:15:14.848300  998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]

 3222 20:15:14.852198  999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3223 20:15:14.855507  Byte0, DQ PI dly=985, DQM PI dly= 985

 3224 20:15:14.858411  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)

 3225 20:15:14.862176  

 3226 20:15:14.864770  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)

 3227 20:15:14.865187  

 3228 20:15:14.868266  Byte1, DQ PI dly=978, DQM PI dly= 978

 3229 20:15:14.872075  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 3230 20:15:14.872613  

 3231 20:15:14.878671  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 3232 20:15:14.879261  

 3233 20:15:14.879765  ==

 3234 20:15:14.881920  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3235 20:15:14.884937  fsp= 1, odt_onoff= 1, Byte mode= 0

 3236 20:15:14.885552  ==

 3237 20:15:14.888368  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 3238 20:15:14.888817  

 3239 20:15:14.891681  Begin, DQ Scan Range 954~1018

 3240 20:15:14.895060  Write Rank1 MR14 =0x0

 3241 20:15:14.903775  

 3242 20:15:14.904233  	CH=1, VrefRange= 0, VrefLevel = 0

 3243 20:15:14.909951  TX Bit0 (979~998) 20 988,   Bit8 (971~986) 16 978,

 3244 20:15:14.913401  TX Bit1 (978~995) 18 986,   Bit9 (970~986) 17 978,

 3245 20:15:14.920208  TX Bit2 (976~991) 16 983,   Bit10 (973~986) 14 979,

 3246 20:15:14.923556  TX Bit3 (975~990) 16 982,   Bit11 (974~991) 18 982,

 3247 20:15:14.926711  TX Bit4 (977~992) 16 984,   Bit12 (972~988) 17 980,

 3248 20:15:14.933609  TX Bit5 (978~997) 20 987,   Bit13 (975~987) 13 981,

 3249 20:15:14.936833  TX Bit6 (978~997) 20 987,   Bit14 (972~987) 16 979,

 3250 20:15:14.940498  TX Bit7 (977~992) 16 984,   Bit15 (968~985) 18 976,

 3251 20:15:14.940998  

 3252 20:15:14.943509  Write Rank1 MR14 =0x2

 3253 20:15:14.952691  

 3254 20:15:14.953281  	CH=1, VrefRange= 0, VrefLevel = 2

 3255 20:15:14.959103  TX Bit0 (978~998) 21 988,   Bit8 (971~987) 17 979,

 3256 20:15:14.962552  TX Bit1 (978~996) 19 987,   Bit9 (969~986) 18 977,

 3257 20:15:14.969159  TX Bit2 (976~992) 17 984,   Bit10 (972~986) 15 979,

 3258 20:15:14.972349  TX Bit3 (975~991) 17 983,   Bit11 (973~990) 18 981,

 3259 20:15:14.976113  TX Bit4 (976~993) 18 984,   Bit12 (972~988) 17 980,

 3260 20:15:14.982483  TX Bit5 (978~997) 20 987,   Bit13 (974~987) 14 980,

 3261 20:15:14.986156  TX Bit6 (978~998) 21 988,   Bit14 (972~988) 17 980,

 3262 20:15:14.989215  TX Bit7 (977~992) 16 984,   Bit15 (968~985) 18 976,

 3263 20:15:14.989677  

 3264 20:15:14.993127  Write Rank1 MR14 =0x4

 3265 20:15:15.001369  

 3266 20:15:15.001787  	CH=1, VrefRange= 0, VrefLevel = 4

 3267 20:15:15.008121  TX Bit0 (978~998) 21 988,   Bit8 (970~988) 19 979,

 3268 20:15:15.011463  TX Bit1 (978~997) 20 987,   Bit9 (970~987) 18 978,

 3269 20:15:15.017866  TX Bit2 (975~992) 18 983,   Bit10 (971~988) 18 979,

 3270 20:15:15.021142  TX Bit3 (974~991) 18 982,   Bit11 (973~991) 19 982,

 3271 20:15:15.024894  TX Bit4 (976~993) 18 984,   Bit12 (972~989) 18 980,

 3272 20:15:15.031169  TX Bit5 (978~997) 20 987,   Bit13 (973~988) 16 980,

 3273 20:15:15.034533  TX Bit6 (978~998) 21 988,   Bit14 (972~989) 18 980,

 3274 20:15:15.038234  TX Bit7 (977~992) 16 984,   Bit15 (968~985) 18 976,

 3275 20:15:15.038806  

 3276 20:15:15.041236  Write Rank1 MR14 =0x6

 3277 20:15:15.051032  

 3278 20:15:15.051451  	CH=1, VrefRange= 0, VrefLevel = 6

 3279 20:15:15.057081  TX Bit0 (978~998) 21 988,   Bit8 (970~988) 19 979,

 3280 20:15:15.060338  TX Bit1 (978~997) 20 987,   Bit9 (970~987) 18 978,

 3281 20:15:15.067176  TX Bit2 (975~992) 18 983,   Bit10 (971~988) 18 979,

 3282 20:15:15.070453  TX Bit3 (974~991) 18 982,   Bit11 (973~991) 19 982,

 3283 20:15:15.074095  TX Bit4 (976~993) 18 984,   Bit12 (972~989) 18 980,

 3284 20:15:15.080464  TX Bit5 (978~997) 20 987,   Bit13 (973~988) 16 980,

 3285 20:15:15.083735  TX Bit6 (978~998) 21 988,   Bit14 (972~989) 18 980,

 3286 20:15:15.087298  TX Bit7 (977~992) 16 984,   Bit15 (968~985) 18 976,

 3287 20:15:15.087794  

 3288 20:15:15.090399  Write Rank1 MR14 =0x8

 3289 20:15:15.099823  

 3290 20:15:15.100236  	CH=1, VrefRange= 0, VrefLevel = 8

 3291 20:15:15.106303  TX Bit0 (978~999) 22 988,   Bit8 (970~989) 20 979,

 3292 20:15:15.109565  TX Bit1 (977~998) 22 987,   Bit9 (969~988) 20 978,

 3293 20:15:15.116156  TX Bit2 (975~992) 18 983,   Bit10 (971~988) 18 979,

 3294 20:15:15.119888  TX Bit3 (973~992) 20 982,   Bit11 (972~992) 21 982,

 3295 20:15:15.122633  TX Bit4 (976~994) 19 985,   Bit12 (971~990) 20 980,

 3296 20:15:15.129746  TX Bit5 (978~998) 21 988,   Bit13 (973~989) 17 981,

 3297 20:15:15.132847  TX Bit6 (977~999) 23 988,   Bit14 (971~990) 20 980,

 3298 20:15:15.136509  TX Bit7 (977~994) 18 985,   Bit15 (967~986) 20 976,

 3299 20:15:15.137069  

 3300 20:15:15.139382  Write Rank1 MR14 =0xa

 3301 20:15:15.148786  

 3302 20:15:15.151842  	CH=1, VrefRange= 0, VrefLevel = 10

 3303 20:15:15.155232  TX Bit0 (978~999) 22 988,   Bit8 (970~989) 20 979,

 3304 20:15:15.158560  TX Bit1 (977~998) 22 987,   Bit9 (969~989) 21 979,

 3305 20:15:15.165709  TX Bit2 (975~993) 19 984,   Bit10 (969~988) 20 978,

 3306 20:15:15.169123  TX Bit3 (973~992) 20 982,   Bit11 (971~992) 22 981,

 3307 20:15:15.172148  TX Bit4 (976~995) 20 985,   Bit12 (970~991) 22 980,

 3308 20:15:15.178478  TX Bit5 (978~998) 21 988,   Bit13 (972~990) 19 981,

 3309 20:15:15.182439  TX Bit6 (977~999) 23 988,   Bit14 (971~991) 21 981,

 3310 20:15:15.185211  TX Bit7 (976~994) 19 985,   Bit15 (967~986) 20 976,

 3311 20:15:15.185661  

 3312 20:15:15.189119  Write Rank1 MR14 =0xc

 3313 20:15:15.198524  

 3314 20:15:15.201170  	CH=1, VrefRange= 0, VrefLevel = 12

 3315 20:15:15.204753  TX Bit0 (977~1000) 24 988,   Bit8 (969~990) 22 979,

 3316 20:15:15.207921  TX Bit1 (977~998) 22 987,   Bit9 (969~989) 21 979,

 3317 20:15:15.214569  TX Bit2 (974~993) 20 983,   Bit10 (970~990) 21 980,

 3318 20:15:15.217992  TX Bit3 (973~993) 21 983,   Bit11 (971~992) 22 981,

 3319 20:15:15.221326  TX Bit4 (975~996) 22 985,   Bit12 (970~991) 22 980,

 3320 20:15:15.228080  TX Bit5 (977~998) 22 987,   Bit13 (972~990) 19 981,

 3321 20:15:15.231317  TX Bit6 (977~999) 23 988,   Bit14 (971~991) 21 981,

 3322 20:15:15.234574  TX Bit7 (976~995) 20 985,   Bit15 (967~986) 20 976,

 3323 20:15:15.237810  

 3324 20:15:15.238220  Write Rank1 MR14 =0xe

 3325 20:15:15.247874  

 3326 20:15:15.250770  	CH=1, VrefRange= 0, VrefLevel = 14

 3327 20:15:15.254059  TX Bit0 (977~1000) 24 988,   Bit8 (969~990) 22 979,

 3328 20:15:15.257210  TX Bit1 (977~998) 22 987,   Bit9 (969~990) 22 979,

 3329 20:15:15.264555  TX Bit2 (975~994) 20 984,   Bit10 (969~991) 23 980,

 3330 20:15:15.267428  TX Bit3 (972~993) 22 982,   Bit11 (971~992) 22 981,

 3331 20:15:15.270948  TX Bit4 (975~996) 22 985,   Bit12 (970~991) 22 980,

 3332 20:15:15.277491  TX Bit5 (977~998) 22 987,   Bit13 (971~991) 21 981,

 3333 20:15:15.280727  TX Bit6 (977~999) 23 988,   Bit14 (970~991) 22 980,

 3334 20:15:15.284007  TX Bit7 (976~995) 20 985,   Bit15 (967~987) 21 977,

 3335 20:15:15.287676  

 3336 20:15:15.288234  Write Rank1 MR14 =0x10

 3337 20:15:15.297232  

 3338 20:15:15.300445  	CH=1, VrefRange= 0, VrefLevel = 16

 3339 20:15:15.303916  TX Bit0 (978~1000) 23 989,   Bit8 (969~991) 23 980,

 3340 20:15:15.307122  TX Bit1 (977~999) 23 988,   Bit9 (969~990) 22 979,

 3341 20:15:15.313940  TX Bit2 (974~995) 22 984,   Bit10 (969~991) 23 980,

 3342 20:15:15.317095  TX Bit3 (971~994) 24 982,   Bit11 (971~993) 23 982,

 3343 20:15:15.320940  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3344 20:15:15.326863  TX Bit5 (977~999) 23 988,   Bit13 (970~991) 22 980,

 3345 20:15:15.330289  TX Bit6 (977~1000) 24 988,   Bit14 (970~991) 22 980,

 3346 20:15:15.333960  TX Bit7 (976~996) 21 986,   Bit15 (967~988) 22 977,

 3347 20:15:15.336982  

 3348 20:15:15.337572  Write Rank1 MR14 =0x12

 3349 20:15:15.346521  

 3350 20:15:15.350241  	CH=1, VrefRange= 0, VrefLevel = 18

 3351 20:15:15.353365  TX Bit0 (977~1000) 24 988,   Bit8 (969~991) 23 980,

 3352 20:15:15.356560  TX Bit1 (977~999) 23 988,   Bit9 (968~991) 24 979,

 3353 20:15:15.363662  TX Bit2 (973~995) 23 984,   Bit10 (970~991) 22 980,

 3354 20:15:15.367327  TX Bit3 (971~994) 24 982,   Bit11 (970~993) 24 981,

 3355 20:15:15.370507  TX Bit4 (975~997) 23 986,   Bit12 (970~992) 23 981,

 3356 20:15:15.376422  TX Bit5 (977~999) 23 988,   Bit13 (971~992) 22 981,

 3357 20:15:15.379821  TX Bit6 (977~1000) 24 988,   Bit14 (970~992) 23 981,

 3358 20:15:15.386680  TX Bit7 (976~996) 21 986,   Bit15 (967~988) 22 977,

 3359 20:15:15.387099  

 3360 20:15:15.387421  Write Rank1 MR14 =0x14

 3361 20:15:15.396588  

 3362 20:15:15.399958  	CH=1, VrefRange= 0, VrefLevel = 20

 3363 20:15:15.402947  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3364 20:15:15.406443  TX Bit1 (977~999) 23 988,   Bit9 (968~991) 24 979,

 3365 20:15:15.413149  TX Bit2 (973~996) 24 984,   Bit10 (969~991) 23 980,

 3366 20:15:15.416891  TX Bit3 (971~995) 25 983,   Bit11 (970~993) 24 981,

 3367 20:15:15.420255  TX Bit4 (974~998) 25 986,   Bit12 (970~992) 23 981,

 3368 20:15:15.426439  TX Bit5 (976~999) 24 987,   Bit13 (970~992) 23 981,

 3369 20:15:15.430066  TX Bit6 (977~1000) 24 988,   Bit14 (969~992) 24 980,

 3370 20:15:15.433198  TX Bit7 (975~997) 23 986,   Bit15 (967~988) 22 977,

 3371 20:15:15.436789  

 3372 20:15:15.437322  Write Rank1 MR14 =0x16

 3373 20:15:15.446956  

 3374 20:15:15.449775  	CH=1, VrefRange= 0, VrefLevel = 22

 3375 20:15:15.452789  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3376 20:15:15.456316  TX Bit1 (977~1000) 24 988,   Bit9 (969~991) 23 980,

 3377 20:15:15.462690  TX Bit2 (972~996) 25 984,   Bit10 (969~991) 23 980,

 3378 20:15:15.466151  TX Bit3 (970~995) 26 982,   Bit11 (969~993) 25 981,

 3379 20:15:15.469610  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3380 20:15:15.476016  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3381 20:15:15.479429  TX Bit6 (977~1001) 25 989,   Bit14 (969~992) 24 980,

 3382 20:15:15.485843  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3383 20:15:15.486375  

 3384 20:15:15.486874  Write Rank1 MR14 =0x18

 3385 20:15:15.496521  

 3386 20:15:15.497081  	CH=1, VrefRange= 0, VrefLevel = 24

 3387 20:15:15.503061  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3388 20:15:15.506445  TX Bit1 (977~1000) 24 988,   Bit9 (969~991) 23 980,

 3389 20:15:15.512736  TX Bit2 (972~996) 25 984,   Bit10 (969~991) 23 980,

 3390 20:15:15.516230  TX Bit3 (970~995) 26 982,   Bit11 (969~993) 25 981,

 3391 20:15:15.519649  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3392 20:15:15.526334  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3393 20:15:15.529498  TX Bit6 (977~1001) 25 989,   Bit14 (969~992) 24 980,

 3394 20:15:15.536351  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3395 20:15:15.536765  

 3396 20:15:15.537084  Write Rank1 MR14 =0x1a

 3397 20:15:15.546517  

 3398 20:15:15.549249  	CH=1, VrefRange= 0, VrefLevel = 26

 3399 20:15:15.553033  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3400 20:15:15.556293  TX Bit1 (977~1000) 24 988,   Bit9 (969~991) 23 980,

 3401 20:15:15.562772  TX Bit2 (972~996) 25 984,   Bit10 (969~991) 23 980,

 3402 20:15:15.566331  TX Bit3 (970~995) 26 982,   Bit11 (969~993) 25 981,

 3403 20:15:15.569802  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3404 20:15:15.576117  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3405 20:15:15.579544  TX Bit6 (977~1001) 25 989,   Bit14 (969~992) 24 980,

 3406 20:15:15.582830  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3407 20:15:15.586523  

 3408 20:15:15.587079  Write Rank1 MR14 =0x1c

 3409 20:15:15.596296  

 3410 20:15:15.599796  	CH=1, VrefRange= 0, VrefLevel = 28

 3411 20:15:15.602966  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3412 20:15:15.606336  TX Bit1 (977~1000) 24 988,   Bit9 (969~991) 23 980,

 3413 20:15:15.612867  TX Bit2 (972~996) 25 984,   Bit10 (969~991) 23 980,

 3414 20:15:15.616184  TX Bit3 (970~995) 26 982,   Bit11 (969~993) 25 981,

 3415 20:15:15.619579  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3416 20:15:15.626006  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3417 20:15:15.629761  TX Bit6 (977~1001) 25 989,   Bit14 (969~992) 24 980,

 3418 20:15:15.635953  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3419 20:15:15.636515  

 3420 20:15:15.636851  Write Rank1 MR14 =0x1e

 3421 20:15:15.646606  

 3422 20:15:15.649865  	CH=1, VrefRange= 0, VrefLevel = 30

 3423 20:15:15.653184  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3424 20:15:15.656077  TX Bit1 (977~1000) 24 988,   Bit9 (969~991) 23 980,

 3425 20:15:15.662771  TX Bit2 (972~996) 25 984,   Bit10 (969~991) 23 980,

 3426 20:15:15.666251  TX Bit3 (970~995) 26 982,   Bit11 (969~993) 25 981,

 3427 20:15:15.669526  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3428 20:15:15.676191  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3429 20:15:15.679701  TX Bit6 (977~1001) 25 989,   Bit14 (969~992) 24 980,

 3430 20:15:15.686131  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3431 20:15:15.686551  

 3432 20:15:15.686877  Write Rank1 MR14 =0x20

 3433 20:15:15.696276  

 3434 20:15:15.699387  	CH=1, VrefRange= 0, VrefLevel = 32

 3435 20:15:15.702994  TX Bit0 (977~1001) 25 989,   Bit8 (969~991) 23 980,

 3436 20:15:15.706003  TX Bit1 (977~1000) 24 988,   Bit9 (969~991) 23 980,

 3437 20:15:15.712884  TX Bit2 (972~996) 25 984,   Bit10 (969~991) 23 980,

 3438 20:15:15.716402  TX Bit3 (970~995) 26 982,   Bit11 (969~993) 25 981,

 3439 20:15:15.719357  TX Bit4 (974~998) 25 986,   Bit12 (969~992) 24 980,

 3440 20:15:15.726383  TX Bit5 (976~1000) 25 988,   Bit13 (970~992) 23 981,

 3441 20:15:15.729355  TX Bit6 (977~1001) 25 989,   Bit14 (969~992) 24 980,

 3442 20:15:15.736147  TX Bit7 (975~997) 23 986,   Bit15 (966~989) 24 977,

 3443 20:15:15.736647  

 3444 20:15:15.737216  

 3445 20:15:15.739526  TX Vref found, early break! 361< 367

 3446 20:15:15.742782  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps

 3447 20:15:15.745933  u1DelayCellOfst[0]=8 cells (7 PI)

 3448 20:15:15.749714  u1DelayCellOfst[1]=7 cells (6 PI)

 3449 20:15:15.752918  u1DelayCellOfst[2]=2 cells (2 PI)

 3450 20:15:15.755864  u1DelayCellOfst[3]=0 cells (0 PI)

 3451 20:15:15.759307  u1DelayCellOfst[4]=5 cells (4 PI)

 3452 20:15:15.759726  u1DelayCellOfst[5]=7 cells (6 PI)

 3453 20:15:15.762714  u1DelayCellOfst[6]=8 cells (7 PI)

 3454 20:15:15.766338  u1DelayCellOfst[7]=5 cells (4 PI)

 3455 20:15:15.769566  Byte0, DQ PI dly=982, DQM PI dly= 985

 3456 20:15:15.776028  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)

 3457 20:15:15.776348  

 3458 20:15:15.779322  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)

 3459 20:15:15.779624  

 3460 20:15:15.782871  u1DelayCellOfst[8]=3 cells (3 PI)

 3461 20:15:15.786177  u1DelayCellOfst[9]=3 cells (3 PI)

 3462 20:15:15.789129  u1DelayCellOfst[10]=3 cells (3 PI)

 3463 20:15:15.792961  u1DelayCellOfst[11]=5 cells (4 PI)

 3464 20:15:15.796090  u1DelayCellOfst[12]=3 cells (3 PI)

 3465 20:15:15.796313  u1DelayCellOfst[13]=5 cells (4 PI)

 3466 20:15:15.799005  u1DelayCellOfst[14]=3 cells (3 PI)

 3467 20:15:15.802359  u1DelayCellOfst[15]=0 cells (0 PI)

 3468 20:15:15.805875  Byte1, DQ PI dly=977, DQM PI dly= 979

 3469 20:15:15.812599  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 3470 20:15:15.812824  

 3471 20:15:15.815729  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 3472 20:15:15.815954  

 3473 20:15:15.819434  Write Rank1 MR14 =0x16

 3474 20:15:15.819655  

 3475 20:15:15.819829  Final TX Range 0 Vref 22

 3476 20:15:15.820066  

 3477 20:15:15.826097  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 3478 20:15:15.826321  

 3479 20:15:15.832561  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3480 20:15:15.842545  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3481 20:15:15.849156  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3482 20:15:15.849423  Write Rank1 MR3 =0xb0

 3483 20:15:15.852753  DramC Write-DBI on

 3484 20:15:15.852976  ==

 3485 20:15:15.855920  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3486 20:15:15.859243  fsp= 1, odt_onoff= 1, Byte mode= 0

 3487 20:15:15.859469  ==

 3488 20:15:15.865889  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 3489 20:15:15.866172  

 3490 20:15:15.866369  Begin, DQ Scan Range 699~763

 3491 20:15:15.869072  

 3492 20:15:15.869514  

 3493 20:15:15.869775  	TX Vref Scan disable

 3494 20:15:15.872279  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3495 20:15:15.875842  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3496 20:15:15.878909  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3497 20:15:15.882986  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3498 20:15:15.885513  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3499 20:15:15.892352  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3500 20:15:15.895549  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3501 20:15:15.899163  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3502 20:15:15.902900  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3503 20:15:15.905619  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3504 20:15:15.909005  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3505 20:15:15.912159  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3506 20:15:15.915642  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 3507 20:15:15.918948  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 3508 20:15:15.922200  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 3509 20:15:15.925808  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 3510 20:15:15.929402  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 3511 20:15:15.932467  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 3512 20:15:15.935572  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 3513 20:15:15.939001  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 3514 20:15:15.947004  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 3515 20:15:15.950451  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 3516 20:15:15.953714  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 3517 20:15:15.956888  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 3518 20:15:15.960247  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 3519 20:15:15.963428  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 3520 20:15:15.966838  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 3521 20:15:15.970027  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 3522 20:15:15.973714  744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3523 20:15:15.976986  Byte0, DQ PI dly=731, DQM PI dly= 731

 3524 20:15:15.980471  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)

 3525 20:15:15.980565  

 3526 20:15:15.986823  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)

 3527 20:15:15.986904  

 3528 20:15:15.990552  Byte1, DQ PI dly=723, DQM PI dly= 723

 3529 20:15:15.993772  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)

 3530 20:15:15.993853  

 3531 20:15:15.997205  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)

 3532 20:15:15.997324  

 3533 20:15:16.003875  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3534 20:15:16.010784  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3535 20:15:16.020112  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3536 20:15:16.020204  Write Rank1 MR3 =0x30

 3537 20:15:16.023523  DramC Write-DBI off

 3538 20:15:16.023612  

 3539 20:15:16.023676  [DATLAT]

 3540 20:15:16.027026  Freq=1600, CH1 RK1, use_rxtx_scan=0

 3541 20:15:16.027106  

 3542 20:15:16.030457  DATLAT Default: 0x10

 3543 20:15:16.030537  7, 0xFFFF, sum=0

 3544 20:15:16.033301  8, 0xFFFF, sum=0

 3545 20:15:16.033385  9, 0xFFFF, sum=0

 3546 20:15:16.036784  10, 0xFFFF, sum=0

 3547 20:15:16.036865  11, 0xFFFF, sum=0

 3548 20:15:16.040256  12, 0xFFFF, sum=0

 3549 20:15:16.040348  13, 0xFFFF, sum=0

 3550 20:15:16.040456  14, 0x0, sum=1

 3551 20:15:16.043601  15, 0x0, sum=2

 3552 20:15:16.043693  16, 0x0, sum=3

 3553 20:15:16.047114  17, 0x0, sum=4

 3554 20:15:16.050110  pattern=2 first_step=14 total pass=5 best_step=16

 3555 20:15:16.050190  ==

 3556 20:15:16.056415  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3557 20:15:16.059759  fsp= 1, odt_onoff= 1, Byte mode= 0

 3558 20:15:16.059840  ==

 3559 20:15:16.063433  Start DQ dly to find pass range UseTestEngine =1

 3560 20:15:16.066508  x-axis: bit #, y-axis: DQ dly (-127~63)

 3561 20:15:16.070028  RX Vref Scan = 0

 3562 20:15:16.070108  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3563 20:15:16.073571  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3564 20:15:16.076700  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3565 20:15:16.080074  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3566 20:15:16.083110  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3567 20:15:16.086470  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3568 20:15:16.089719  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3569 20:15:16.093080  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3570 20:15:16.093161  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3571 20:15:16.096502  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3572 20:15:16.099736  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3573 20:15:16.103376  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3574 20:15:16.106789  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3575 20:15:16.109902  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3576 20:15:16.113318  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3577 20:15:16.116423  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3578 20:15:16.116506  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3579 20:15:16.119805  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3580 20:15:16.123401  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3581 20:15:16.126540  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3582 20:15:16.129811  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3583 20:15:16.133186  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3584 20:15:16.136778  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3585 20:15:16.136860  -3, [0] xxxoxxxx xxxxxxxx [MSB]

 3586 20:15:16.140133  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 3587 20:15:16.143251  -1, [0] xxxoxxxx xxxxxxxx [MSB]

 3588 20:15:16.146430  0, [0] xxooxxxx xxxxxxxo [MSB]

 3589 20:15:16.150311  1, [0] xxooxxxx ooxxxxxo [MSB]

 3590 20:15:16.152972  2, [0] xxoooxxo oooxxxxo [MSB]

 3591 20:15:16.153054  3, [0] xxoooxxo ooooxooo [MSB]

 3592 20:15:16.156489  4, [0] xxoooxxo oooooooo [MSB]

 3593 20:15:16.159911  5, [0] xoooooxo oooooooo [MSB]

 3594 20:15:16.163037  6, [0] ooooooxo oooooooo [MSB]

 3595 20:15:16.167153  34, [0] oooxoooo oooooooo [MSB]

 3596 20:15:16.170204  35, [0] oooxoooo ooooooox [MSB]

 3597 20:15:16.173565  36, [0] ooxxoooo ooooooox [MSB]

 3598 20:15:16.176963  37, [0] ooxxxoox ooxooxxx [MSB]

 3599 20:15:16.180220  38, [0] ooxxxoox xxxooxxx [MSB]

 3600 20:15:16.183565  39, [0] ooxxxoox xxxxoxxx [MSB]

 3601 20:15:16.183680  40, [0] ooxxxoox xxxxxxxx [MSB]

 3602 20:15:16.186799  41, [0] oxxxxoox xxxxxxxx [MSB]

 3603 20:15:16.190465  42, [0] oxxxxxox xxxxxxxx [MSB]

 3604 20:15:16.193889  43, [0] xxxxxxxx xxxxxxxx [MSB]

 3605 20:15:16.196570  iDelay=43, Bit 0, Center 24 (6 ~ 42) 37

 3606 20:15:16.200249  iDelay=43, Bit 1, Center 22 (5 ~ 40) 36

 3607 20:15:16.203398  iDelay=43, Bit 2, Center 17 (0 ~ 35) 36

 3608 20:15:16.206825  iDelay=43, Bit 3, Center 15 (-3 ~ 33) 37

 3609 20:15:16.210114  iDelay=43, Bit 4, Center 19 (2 ~ 36) 35

 3610 20:15:16.213838  iDelay=43, Bit 5, Center 23 (5 ~ 41) 37

 3611 20:15:16.216911  iDelay=43, Bit 6, Center 24 (7 ~ 42) 36

 3612 20:15:16.220383  iDelay=43, Bit 7, Center 19 (2 ~ 36) 35

 3613 20:15:16.226940  iDelay=43, Bit 8, Center 19 (1 ~ 37) 37

 3614 20:15:16.230523  iDelay=43, Bit 9, Center 19 (1 ~ 37) 37

 3615 20:15:16.233900  iDelay=43, Bit 10, Center 19 (2 ~ 36) 35

 3616 20:15:16.236806  iDelay=43, Bit 11, Center 20 (3 ~ 38) 36

 3617 20:15:16.240231  iDelay=43, Bit 12, Center 21 (4 ~ 39) 36

 3618 20:15:16.243555  iDelay=43, Bit 13, Center 19 (3 ~ 36) 34

 3619 20:15:16.247235  iDelay=43, Bit 14, Center 19 (3 ~ 36) 34

 3620 20:15:16.250468  iDelay=43, Bit 15, Center 17 (0 ~ 34) 35

 3621 20:15:16.250549  ==

 3622 20:15:16.256854  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3623 20:15:16.260366  fsp= 1, odt_onoff= 1, Byte mode= 0

 3624 20:15:16.260447  ==

 3625 20:15:16.260510  DQS Delay:

 3626 20:15:16.263628  DQS0 = 0, DQS1 = 0

 3627 20:15:16.263708  DQM Delay:

 3628 20:15:16.263771  DQM0 = 20, DQM1 = 19

 3629 20:15:16.267182  DQ Delay:

 3630 20:15:16.270475  DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15

 3631 20:15:16.273635  DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19

 3632 20:15:16.276733  DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20

 3633 20:15:16.280541  DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17

 3634 20:15:16.280622  

 3635 20:15:16.280684  

 3636 20:15:16.280742  

 3637 20:15:16.283939  [DramC_TX_OE_Calibration] TA2

 3638 20:15:16.284018  Original DQ_B0 (3 6) =30, OEN = 27

 3639 20:15:16.287078  Original DQ_B1 (3 6) =30, OEN = 27

 3640 20:15:16.290677  23, 0x0, End_B0=23 End_B1=23

 3641 20:15:16.293861  24, 0x0, End_B0=24 End_B1=24

 3642 20:15:16.297372  25, 0x0, End_B0=25 End_B1=25

 3643 20:15:16.300016  26, 0x0, End_B0=26 End_B1=26

 3644 20:15:16.300097  27, 0x0, End_B0=27 End_B1=27

 3645 20:15:16.303599  28, 0x0, End_B0=28 End_B1=28

 3646 20:15:16.307203  29, 0x0, End_B0=29 End_B1=29

 3647 20:15:16.310195  30, 0x0, End_B0=30 End_B1=30

 3648 20:15:16.313326  31, 0xFFFF, End_B0=30 End_B1=30

 3649 20:15:16.317182  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3650 20:15:16.323279  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3651 20:15:16.323357  

 3652 20:15:16.323421  

 3653 20:15:16.326782  Write Rank1 MR23 =0x3f

 3654 20:15:16.326858  [DQSOSC]

 3655 20:15:16.333197  [DQSOSCAuto] RK1, (LSB)MR18= 0xb2, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps

 3656 20:15:16.340005  CH1_RK1: MR19=0x3, MR18=0xB2, DQSOSC=332, MR23=63, INC=22, DEC=33

 3657 20:15:16.340089  Write Rank1 MR23 =0x3f

 3658 20:15:16.343651  [DQSOSC]

 3659 20:15:16.350210  [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps

 3660 20:15:16.353130  CH1 RK1: MR19=3, MR18=B3

 3661 20:15:16.356754  [RxdqsGatingPostProcess] freq 1600

 3662 20:15:16.360240  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 3663 20:15:16.363885  Rank: 0

 3664 20:15:16.363954  best DQS0 dly(2T, 0.5T) = (2, 5)

 3665 20:15:16.366440  best DQS1 dly(2T, 0.5T) = (2, 5)

 3666 20:15:16.369896  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3667 20:15:16.373564  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3668 20:15:16.373632  Rank: 1

 3669 20:15:16.376810  best DQS0 dly(2T, 0.5T) = (2, 5)

 3670 20:15:16.380446  best DQS1 dly(2T, 0.5T) = (2, 5)

 3671 20:15:16.383482  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3672 20:15:16.386774  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 3673 20:15:16.393306  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 3674 20:15:16.393381  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 3675 20:15:16.400163  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 3676 20:15:16.400245  

 3677 20:15:16.400308  

 3678 20:15:16.403690  [Calibration Summary] Freqency 1600

 3679 20:15:16.403770  CH 0, Rank 0

 3680 20:15:16.406781  All Pass.

 3681 20:15:16.406860  

 3682 20:15:16.406923  CH 0, Rank 1

 3683 20:15:16.406982  All Pass.

 3684 20:15:16.407039  

 3685 20:15:16.409999  CH 1, Rank 0

 3686 20:15:16.410078  All Pass.

 3687 20:15:16.410140  

 3688 20:15:16.410199  CH 1, Rank 1

 3689 20:15:16.413369  All Pass.

 3690 20:15:16.413448  

 3691 20:15:16.420053  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3692 20:15:16.426991  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3693 20:15:16.433464  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3694 20:15:16.436737  Write Rank0 MR3 =0xb0

 3695 20:15:16.440425  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3696 20:15:16.450321  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3697 20:15:16.456726  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3698 20:15:16.456897  Write Rank1 MR3 =0xb0

 3699 20:15:16.463650  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3700 20:15:16.470343  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3701 20:15:16.477126  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3702 20:15:16.479956  Write Rank0 MR3 =0xb0

 3703 20:15:16.486739  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3704 20:15:16.493280  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3705 20:15:16.500168  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3706 20:15:16.503485  Write Rank1 MR3 =0xb0

 3707 20:15:16.503557  DramC Write-DBI on

 3708 20:15:16.506840  [GetDramInforAfterCalByMRR] Vendor 1.

 3709 20:15:16.510053  [GetDramInforAfterCalByMRR] Revision 7.

 3710 20:15:16.513726  MR8 12

 3711 20:15:16.516834  CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3712 20:15:16.516914  MR8 12

 3713 20:15:16.523553  CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3714 20:15:16.523629  MR8 12

 3715 20:15:16.527304  CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3716 20:15:16.530261  MR8 12

 3717 20:15:16.533212  CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3718 20:15:16.543700  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0

 3719 20:15:16.543785  Write Rank0 MR13 =0xd0

 3720 20:15:16.546654  Write Rank1 MR13 =0xd0

 3721 20:15:16.549993  Write Rank0 MR13 =0xd0

 3722 20:15:16.550073  Write Rank1 MR13 =0xd0

 3723 20:15:16.553404  Save calibration result to emmc

 3724 20:15:16.553484  

 3725 20:15:16.553547  

 3726 20:15:16.557004  [DramcModeReg_Check] Freq_1600, FSP_1

 3727 20:15:16.559929  FSP_1, CH_0, RK0

 3728 20:15:16.560023  Write Rank0 MR13 =0xd8

 3729 20:15:16.563385  		MR12 = 0x56 (global = 0x56)	match

 3730 20:15:16.566894  		MR14 = 0x18 (global = 0x18)	match

 3731 20:15:16.570173  FSP_1, CH_0, RK1

 3732 20:15:16.570253  Write Rank1 MR13 =0xd8

 3733 20:15:16.573494  		MR12 = 0x56 (global = 0x56)	match

 3734 20:15:16.576994  		MR14 = 0x18 (global = 0x18)	match

 3735 20:15:16.580034  FSP_1, CH_1, RK0

 3736 20:15:16.580137  Write Rank0 MR13 =0xd8

 3737 20:15:16.583877  		MR12 = 0x56 (global = 0x56)	match

 3738 20:15:16.586960  		MR14 = 0x18 (global = 0x18)	match

 3739 20:15:16.589979  FSP_1, CH_1, RK1

 3740 20:15:16.590060  Write Rank1 MR13 =0xd8

 3741 20:15:16.593405  		MR12 = 0x56 (global = 0x56)	match

 3742 20:15:16.596912  		MR14 = 0x16 (global = 0x16)	match

 3743 20:15:16.596993  

 3744 20:15:16.600167  [MEM_TEST] 02: After DFS, before run time config

 3745 20:15:16.612604  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3746 20:15:16.612687  

 3747 20:15:16.612749  [TA2_TEST]

 3748 20:15:16.612807  === TA2 HW

 3749 20:15:16.615570  TA2 PAT: XTALK

 3750 20:15:16.618914  HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0

 3751 20:15:16.625835  HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0

 3752 20:15:16.629299  HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0

 3753 20:15:16.632081  HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0

 3754 20:15:16.635601  

 3755 20:15:16.635681  

 3756 20:15:16.635744  Settings after calibration

 3757 20:15:16.635802  

 3758 20:15:16.638830  [DramcRunTimeConfig]

 3759 20:15:16.642730  TransferPLLToSPMControl - MODE SW PHYPLL

 3760 20:15:16.642811  TX_TRACKING: ON

 3761 20:15:16.645481  RX_TRACKING: ON

 3762 20:15:16.645581  HW_GATING: ON

 3763 20:15:16.649238  HW_GATING DBG: OFF

 3764 20:15:16.649356  ddr_geometry:1

 3765 20:15:16.652333  ddr_geometry:1

 3766 20:15:16.652412  ddr_geometry:1

 3767 20:15:16.652474  ddr_geometry:1

 3768 20:15:16.655544  ddr_geometry:1

 3769 20:15:16.655623  ddr_geometry:1

 3770 20:15:16.658737  ddr_geometry:1

 3771 20:15:16.658817  ddr_geometry:1

 3772 20:15:16.662472  High Freq DUMMY_READ_FOR_TRACKING: ON

 3773 20:15:16.665524  ZQCS_ENABLE_LP4: OFF

 3774 20:15:16.669040  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 3775 20:15:16.672364  DUMMY_READ_FOR_DQS_GATING_RETRY: OFF

 3776 20:15:16.672444  SPM_CONTROL_AFTERK: ON

 3777 20:15:16.675705  IMPEDANCE_TRACKING: ON

 3778 20:15:16.675784  TEMP_SENSOR: ON

 3779 20:15:16.679338  PER_BANK_REFRESH: ON

 3780 20:15:16.679418  HW_SAVE_FOR_SR: ON

 3781 20:15:16.682061  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3782 20:15:16.685698  CLK_FREE_FUN_FOR_DRAMC_PSEL: ON

 3783 20:15:16.688878  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON

 3784 20:15:16.692105  Read ODT Tracking: ON

 3785 20:15:16.695794  =========================

 3786 20:15:16.695875  

 3787 20:15:16.695938  [TA2_TEST]

 3788 20:15:16.695996  === TA2 HW

 3789 20:15:16.702782  HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0

 3790 20:15:16.705689  HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0

 3791 20:15:16.712436  HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0

 3792 20:15:16.715455  HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0

 3793 20:15:16.715536  

 3794 20:15:16.718957  [MEM_TEST] 03: After run time config

 3795 20:15:16.730436  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3796 20:15:16.733528  [complex_mem_test] start addr:0x40024000, len:131072

 3797 20:15:16.937807  1st complex R/W mem test pass

 3798 20:15:16.944649  save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 

 3799 20:15:16.947936  sync preloader write leveling

 3800 20:15:16.951122  sync preloader cbt_mr12

 3801 20:15:16.954463  sync preloader cbt_clk_dly

 3802 20:15:16.954544  sync preloader cbt_cmd_dly

 3803 20:15:16.957456  sync preloader cbt_cs

 3804 20:15:16.961078  sync preloader cbt_ca_perbit_delay

 3805 20:15:16.961159  sync preloader clk_delay

 3806 20:15:16.964433  sync preloader dqs_delay

 3807 20:15:16.967516  sync preloader u1Gating2T_Save

 3808 20:15:16.971160  sync preloader u1Gating05T_Save

 3809 20:15:16.974490  sync preloader u1Gatingfine_tune_Save

 3810 20:15:16.977882  sync preloader u1Gatingucpass_count_Save

 3811 20:15:16.981056  sync preloader u1TxWindowPerbitVref_Save

 3812 20:15:16.984542  sync preloader u1TxCenter_min_Save

 3813 20:15:16.987782  sync preloader u1TxCenter_max_Save

 3814 20:15:16.990707  sync preloader u1Txwin_center_Save

 3815 20:15:16.994237  sync preloader u1Txfirst_pass_Save

 3816 20:15:16.997702  sync preloader u1Txlast_pass_Save

 3817 20:15:16.997779  sync preloader u1RxDatlat_Save

 3818 20:15:17.000944  sync preloader u1RxWinPerbitVref_Save

 3819 20:15:17.007905  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3820 20:15:17.011090  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3821 20:15:17.014385  sync preloader delay_cell_unit

 3822 20:15:17.020912  save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 

 3823 20:15:17.024275  sync preloader write leveling

 3824 20:15:17.024352  sync preloader cbt_mr12

 3825 20:15:17.027702  sync preloader cbt_clk_dly

 3826 20:15:17.030859  sync preloader cbt_cmd_dly

 3827 20:15:17.030943  sync preloader cbt_cs

 3828 20:15:17.034214  sync preloader cbt_ca_perbit_delay

 3829 20:15:17.038163  sync preloader clk_delay

 3830 20:15:17.041104  sync preloader dqs_delay

 3831 20:15:17.041223  sync preloader u1Gating2T_Save

 3832 20:15:17.044488  sync preloader u1Gating05T_Save

 3833 20:15:17.047985  sync preloader u1Gatingfine_tune_Save

 3834 20:15:17.051208  sync preloader u1Gatingucpass_count_Save

 3835 20:15:17.054692  sync preloader u1TxWindowPerbitVref_Save

 3836 20:15:17.057814  sync preloader u1TxCenter_min_Save

 3837 20:15:17.060968  sync preloader u1TxCenter_max_Save

 3838 20:15:17.064674  sync preloader u1Txwin_center_Save

 3839 20:15:17.068236  sync preloader u1Txfirst_pass_Save

 3840 20:15:17.071090  sync preloader u1Txlast_pass_Save

 3841 20:15:17.075014  sync preloader u1RxDatlat_Save

 3842 20:15:17.078247  sync preloader u1RxWinPerbitVref_Save

 3843 20:15:17.081468  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3844 20:15:17.084529  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3845 20:15:17.087868  sync preloader delay_cell_unit

 3846 20:15:17.094587  save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 

 3847 20:15:17.098352  sync preloader write leveling

 3848 20:15:17.101204  sync preloader cbt_mr12

 3849 20:15:17.101301  sync preloader cbt_clk_dly

 3850 20:15:17.104534  sync preloader cbt_cmd_dly

 3851 20:15:17.108106  sync preloader cbt_cs

 3852 20:15:17.111425  sync preloader cbt_ca_perbit_delay

 3853 20:15:17.111501  sync preloader clk_delay

 3854 20:15:17.114618  sync preloader dqs_delay

 3855 20:15:17.118092  sync preloader u1Gating2T_Save

 3856 20:15:17.121362  sync preloader u1Gating05T_Save

 3857 20:15:17.124954  sync preloader u1Gatingfine_tune_Save

 3858 20:15:17.127912  sync preloader u1Gatingucpass_count_Save

 3859 20:15:17.131359  sync preloader u1TxWindowPerbitVref_Save

 3860 20:15:17.134702  sync preloader u1TxCenter_min_Save

 3861 20:15:17.137817  sync preloader u1TxCenter_max_Save

 3862 20:15:17.141566  sync preloader u1Txwin_center_Save

 3863 20:15:17.141655  sync preloader u1Txfirst_pass_Save

 3864 20:15:17.144359  sync preloader u1Txlast_pass_Save

 3865 20:15:17.148086  sync preloader u1RxDatlat_Save

 3866 20:15:17.151098  sync preloader u1RxWinPerbitVref_Save

 3867 20:15:17.154531  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3868 20:15:17.161132  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3869 20:15:17.164918  sync preloader delay_cell_unit

 3870 20:15:17.168365  just_for_test_dump_coreboot_params dump all params

 3871 20:15:17.168446  dump source = 0x0

 3872 20:15:17.171181  dump params frequency:1600

 3873 20:15:17.174230  dump params rank number:2

 3874 20:15:17.174310  

 3875 20:15:17.177632   dump params write leveling

 3876 20:15:17.177713  write leveling[0][0][0] = 0x21

 3877 20:15:17.181406  write leveling[0][0][1] = 0x1d

 3878 20:15:17.184717  write leveling[0][1][0] = 0x22

 3879 20:15:17.187589  write leveling[0][1][1] = 0x1e

 3880 20:15:17.191055  write leveling[1][0][0] = 0x22

 3881 20:15:17.194395  write leveling[1][0][1] = 0x20

 3882 20:15:17.194476  write leveling[1][1][0] = 0x23

 3883 20:15:17.197839  write leveling[1][1][1] = 0x20

 3884 20:15:17.201555  dump params cbt_cs

 3885 20:15:17.201649  cbt_cs[0][0] = 0xa

 3886 20:15:17.204361  cbt_cs[0][1] = 0xa

 3887 20:15:17.204448  cbt_cs[1][0] = 0xa

 3888 20:15:17.207915  cbt_cs[1][1] = 0xa

 3889 20:15:17.207995  dump params cbt_mr12

 3890 20:15:17.211429  cbt_mr12[0][0] = 0x16

 3891 20:15:17.214938  cbt_mr12[0][1] = 0x16

 3892 20:15:17.215010  cbt_mr12[1][0] = 0x16

 3893 20:15:17.218104  cbt_mr12[1][1] = 0x16

 3894 20:15:17.218175  dump params tx window

 3895 20:15:17.221180  tx_center_min[0][0][0] = 980

 3896 20:15:17.224710  tx_center_max[0][0][0] =  987

 3897 20:15:17.228200  tx_center_min[0][0][1] = 974

 3898 20:15:17.231589  tx_center_max[0][0][1] =  980

 3899 20:15:17.232010  tx_center_min[0][1][0] = 981

 3900 20:15:17.234896  tx_center_max[0][1][0] =  989

 3901 20:15:17.238326  tx_center_min[0][1][1] = 978

 3902 20:15:17.241410  tx_center_max[0][1][1] =  982

 3903 20:15:17.241864  tx_center_min[1][0][0] = 981

 3904 20:15:17.245360  tx_center_max[1][0][0] =  988

 3905 20:15:17.248134  tx_center_min[1][0][1] = 977

 3906 20:15:17.251584  tx_center_max[1][0][1] =  981

 3907 20:15:17.254714  tx_center_min[1][1][0] = 982

 3908 20:15:17.255130  tx_center_max[1][1][0] =  989

 3909 20:15:17.258305  tx_center_min[1][1][1] = 977

 3910 20:15:17.261407  tx_center_max[1][1][1] =  981

 3911 20:15:17.265076  dump params tx window

 3912 20:15:17.265590  tx_win_center[0][0][0] = 987

 3913 20:15:17.267834  tx_first_pass[0][0][0] =  975

 3914 20:15:17.271522  tx_last_pass[0][0][0] =	999

 3915 20:15:17.274800  tx_win_center[0][0][1] = 986

 3916 20:15:17.278352  tx_first_pass[0][0][1] =  974

 3917 20:15:17.278851  tx_last_pass[0][0][1] =	998

 3918 20:15:17.281566  tx_win_center[0][0][2] = 985

 3919 20:15:17.284742  tx_first_pass[0][0][2] =  974

 3920 20:15:17.288118  tx_last_pass[0][0][2] =	997

 3921 20:15:17.288616  tx_win_center[0][0][3] = 980

 3922 20:15:17.291256  tx_first_pass[0][0][3] =  968

 3923 20:15:17.294694  tx_last_pass[0][0][3] =	992

 3924 20:15:17.298079  tx_win_center[0][0][4] = 985

 3925 20:15:17.298495  tx_first_pass[0][0][4] =  973

 3926 20:15:17.301378  tx_last_pass[0][0][4] =	998

 3927 20:15:17.304658  tx_win_center[0][0][5] = 981

 3928 20:15:17.308220  tx_first_pass[0][0][5] =  969

 3929 20:15:17.311360  tx_last_pass[0][0][5] =	993

 3930 20:15:17.311777  tx_win_center[0][0][6] = 981

 3931 20:15:17.314840  tx_first_pass[0][0][6] =  969

 3932 20:15:17.318183  tx_last_pass[0][0][6] =	994

 3933 20:15:17.321421  tx_win_center[0][0][7] = 983

 3934 20:15:17.321836  tx_first_pass[0][0][7] =  972

 3935 20:15:17.325002  tx_last_pass[0][0][7] =	995

 3936 20:15:17.328515  tx_win_center[0][0][8] = 974

 3937 20:15:17.331562  tx_first_pass[0][0][8] =  962

 3938 20:15:17.334800  tx_last_pass[0][0][8] =	987

 3939 20:15:17.335219  tx_win_center[0][0][9] = 976

 3940 20:15:17.338260  tx_first_pass[0][0][9] =  964

 3941 20:15:17.341395  tx_last_pass[0][0][9] =	989

 3942 20:15:17.344597  tx_win_center[0][0][10] = 980

 3943 20:15:17.348109  tx_first_pass[0][0][10] =  968

 3944 20:15:17.348577  tx_last_pass[0][0][10] =	992

 3945 20:15:17.351661  tx_win_center[0][0][11] = 975

 3946 20:15:17.354690  tx_first_pass[0][0][11] =  962

 3947 20:15:17.358383  tx_last_pass[0][0][11] =	988

 3948 20:15:17.358796  tx_win_center[0][0][12] = 976

 3949 20:15:17.361427  tx_first_pass[0][0][12] =  964

 3950 20:15:17.365000  tx_last_pass[0][0][12] =	989

 3951 20:15:17.368301  tx_win_center[0][0][13] = 976

 3952 20:15:17.371636  tx_first_pass[0][0][13] =  963

 3953 20:15:17.372228  tx_last_pass[0][0][13] =	989

 3954 20:15:17.374630  tx_win_center[0][0][14] = 977

 3955 20:15:17.377945  tx_first_pass[0][0][14] =  965

 3956 20:15:17.381370  tx_last_pass[0][0][14] =	989

 3957 20:15:17.384509  tx_win_center[0][0][15] = 978

 3958 20:15:17.388277  tx_first_pass[0][0][15] =  967

 3959 20:15:17.388689  tx_last_pass[0][0][15] =	990

 3960 20:15:17.391594  tx_win_center[0][1][0] = 989

 3961 20:15:17.395112  tx_first_pass[0][1][0] =  977

 3962 20:15:17.397937  tx_last_pass[0][1][0] =	1002

 3963 20:15:17.398348  tx_win_center[0][1][1] = 988

 3964 20:15:17.401576  tx_first_pass[0][1][1] =  976

 3965 20:15:17.404769  tx_last_pass[0][1][1] =	1000

 3966 20:15:17.408125  tx_win_center[0][1][2] = 988

 3967 20:15:17.411417  tx_first_pass[0][1][2] =  977

 3968 20:15:17.411829  tx_last_pass[0][1][2] =	1000

 3969 20:15:17.414981  tx_win_center[0][1][3] = 981

 3970 20:15:17.417910  tx_first_pass[0][1][3] =  969

 3971 20:15:17.421433  tx_last_pass[0][1][3] =	994

 3972 20:15:17.421898  tx_win_center[0][1][4] = 988

 3973 20:15:17.424742  tx_first_pass[0][1][4] =  976

 3974 20:15:17.428010  tx_last_pass[0][1][4] =	1001

 3975 20:15:17.431396  tx_win_center[0][1][5] = 983

 3976 20:15:17.434539  tx_first_pass[0][1][5] =  971

 3977 20:15:17.434952  tx_last_pass[0][1][5] =	995

 3978 20:15:17.438110  tx_win_center[0][1][6] = 984

 3979 20:15:17.441282  tx_first_pass[0][1][6] =  971

 3980 20:15:17.444989  tx_last_pass[0][1][6] =	997

 3981 20:15:17.445435  tx_win_center[0][1][7] = 986

 3982 20:15:17.447882  tx_first_pass[0][1][7] =  974

 3983 20:15:17.451592  tx_last_pass[0][1][7] =	999

 3984 20:15:17.454649  tx_win_center[0][1][8] = 978

 3985 20:15:17.458613  tx_first_pass[0][1][8] =  966

 3986 20:15:17.459026  tx_last_pass[0][1][8] =	991

 3987 20:15:17.461764  tx_win_center[0][1][9] = 979

 3988 20:15:17.465030  tx_first_pass[0][1][9] =  968

 3989 20:15:17.468074  tx_last_pass[0][1][9] =	991

 3990 20:15:17.468493  tx_win_center[0][1][10] = 982

 3991 20:15:17.471877  tx_first_pass[0][1][10] =  970

 3992 20:15:17.474852  tx_last_pass[0][1][10] =	994

 3993 20:15:17.478380  tx_win_center[0][1][11] = 978

 3994 20:15:17.481316  tx_first_pass[0][1][11] =  966

 3995 20:15:17.481731  tx_last_pass[0][1][11] =	990

 3996 20:15:17.484907  tx_win_center[0][1][12] = 979

 3997 20:15:17.488335  tx_first_pass[0][1][12] =  967

 3998 20:15:17.491272  tx_last_pass[0][1][12] =	991

 3999 20:15:17.494507  tx_win_center[0][1][13] = 978

 4000 20:15:17.494588  tx_first_pass[0][1][13] =  966

 4001 20:15:17.498008  tx_last_pass[0][1][13] =	990

 4002 20:15:17.501125  tx_win_center[0][1][14] = 979

 4003 20:15:17.504463  tx_first_pass[0][1][14] =  968

 4004 20:15:17.507741  tx_last_pass[0][1][14] =	991

 4005 20:15:17.507821  tx_win_center[0][1][15] = 980

 4006 20:15:17.511258  tx_first_pass[0][1][15] =  969

 4007 20:15:17.514391  tx_last_pass[0][1][15] =	992

 4008 20:15:17.517764  tx_win_center[1][0][0] = 988

 4009 20:15:17.521070  tx_first_pass[1][0][0] =  976

 4010 20:15:17.521153  tx_last_pass[1][0][0] =	1000

 4011 20:15:17.524525  tx_win_center[1][0][1] = 986

 4012 20:15:17.528051  tx_first_pass[1][0][1] =  974

 4013 20:15:17.531434  tx_last_pass[1][0][1] =	999

 4014 20:15:17.534803  tx_win_center[1][0][2] = 982

 4015 20:15:17.534895  tx_first_pass[1][0][2] =  971

 4016 20:15:17.537621  tx_last_pass[1][0][2] =	994

 4017 20:15:17.540954  tx_win_center[1][0][3] = 981

 4018 20:15:17.544396  tx_first_pass[1][0][3] =  969

 4019 20:15:17.544558  tx_last_pass[1][0][3] =	993

 4020 20:15:17.548141  tx_win_center[1][0][4] = 985

 4021 20:15:17.551053  tx_first_pass[1][0][4] =  973

 4022 20:15:17.554809  tx_last_pass[1][0][4] =	997

 4023 20:15:17.558047  tx_win_center[1][0][5] = 987

 4024 20:15:17.558233  tx_first_pass[1][0][5] =  975

 4025 20:15:17.561161  tx_last_pass[1][0][5] =	999

 4026 20:15:17.564518  tx_win_center[1][0][6] = 988

 4027 20:15:17.567666  tx_first_pass[1][0][6] =  976

 4028 20:15:17.567909  tx_last_pass[1][0][6] =	1000

 4029 20:15:17.571298  tx_win_center[1][0][7] = 985

 4030 20:15:17.574417  tx_first_pass[1][0][7] =  973

 4031 20:15:17.577934  tx_last_pass[1][0][7] =	997

 4032 20:15:17.581466  tx_win_center[1][0][8] = 980

 4033 20:15:17.581759  tx_first_pass[1][0][8] =  968

 4034 20:15:17.584935  tx_last_pass[1][0][8] =	992

 4035 20:15:17.588257  tx_win_center[1][0][9] = 980

 4036 20:15:17.591569  tx_first_pass[1][0][9] =  968

 4037 20:15:17.592038  tx_last_pass[1][0][9] =	992

 4038 20:15:17.594991  tx_win_center[1][0][10] = 980

 4039 20:15:17.598489  tx_first_pass[1][0][10] =  968

 4040 20:15:17.601204  tx_last_pass[1][0][10] =	992

 4041 20:15:17.604441  tx_win_center[1][0][11] = 981

 4042 20:15:17.604521  tx_first_pass[1][0][11] =  970

 4043 20:15:17.607654  tx_last_pass[1][0][11] =	993

 4044 20:15:17.610997  tx_win_center[1][0][12] = 981

 4045 20:15:17.614244  tx_first_pass[1][0][12] =  969

 4046 20:15:17.617889  tx_last_pass[1][0][12] =	993

 4047 20:15:17.617989  tx_win_center[1][0][13] = 981

 4048 20:15:17.621068  tx_first_pass[1][0][13] =  970

 4049 20:15:17.624041  tx_last_pass[1][0][13] =	992

 4050 20:15:17.628413  tx_win_center[1][0][14] = 980

 4051 20:15:17.631023  tx_first_pass[1][0][14] =  969

 4052 20:15:17.631155  tx_last_pass[1][0][14] =	992

 4053 20:15:17.634117  tx_win_center[1][0][15] = 977

 4054 20:15:17.637289  tx_first_pass[1][0][15] =  966

 4055 20:15:17.641197  tx_last_pass[1][0][15] =	989

 4056 20:15:17.644577  tx_win_center[1][1][0] = 989

 4057 20:15:17.644766  tx_first_pass[1][1][0] =  977

 4058 20:15:17.647414  tx_last_pass[1][1][0] =	1001

 4059 20:15:17.651148  tx_win_center[1][1][1] = 988

 4060 20:15:17.654208  tx_first_pass[1][1][1] =  977

 4061 20:15:17.657818  tx_last_pass[1][1][1] =	1000

 4062 20:15:17.658110  tx_win_center[1][1][2] = 984

 4063 20:15:17.661342  tx_first_pass[1][1][2] =  972

 4064 20:15:17.664650  tx_last_pass[1][1][2] =	996

 4065 20:15:17.667812  tx_win_center[1][1][3] = 982

 4066 20:15:17.668228  tx_first_pass[1][1][3] =  970

 4067 20:15:17.670957  tx_last_pass[1][1][3] =	995

 4068 20:15:17.674212  tx_win_center[1][1][4] = 986

 4069 20:15:17.677704  tx_first_pass[1][1][4] =  974

 4070 20:15:17.681255  tx_last_pass[1][1][4] =	998

 4071 20:15:17.681353  tx_win_center[1][1][5] = 988

 4072 20:15:17.684524  tx_first_pass[1][1][5] =  976

 4073 20:15:17.687733  tx_last_pass[1][1][5] =	1000

 4074 20:15:17.691278  tx_win_center[1][1][6] = 989

 4075 20:15:17.691386  tx_first_pass[1][1][6] =  977

 4076 20:15:17.694518  tx_last_pass[1][1][6] =	1001

 4077 20:15:17.697702  tx_win_center[1][1][7] = 986

 4078 20:15:17.701140  tx_first_pass[1][1][7] =  975

 4079 20:15:17.704613  tx_last_pass[1][1][7] =	997

 4080 20:15:17.704770  tx_win_center[1][1][8] = 980

 4081 20:15:17.708085  tx_first_pass[1][1][8] =  969

 4082 20:15:17.711238  tx_last_pass[1][1][8] =	991

 4083 20:15:17.714621  tx_win_center[1][1][9] = 980

 4084 20:15:17.714820  tx_first_pass[1][1][9] =  969

 4085 20:15:17.717835  tx_last_pass[1][1][9] =	991

 4086 20:15:17.721362  tx_win_center[1][1][10] = 980

 4087 20:15:17.724378  tx_first_pass[1][1][10] =  969

 4088 20:15:17.727996  tx_last_pass[1][1][10] =	991

 4089 20:15:17.728410  tx_win_center[1][1][11] = 981

 4090 20:15:17.731209  tx_first_pass[1][1][11] =  969

 4091 20:15:17.734996  tx_last_pass[1][1][11] =	993

 4092 20:15:17.737815  tx_win_center[1][1][12] = 980

 4093 20:15:17.741011  tx_first_pass[1][1][12] =  969

 4094 20:15:17.741096  tx_last_pass[1][1][12] =	992

 4095 20:15:17.744214  tx_win_center[1][1][13] = 981

 4096 20:15:17.747707  tx_first_pass[1][1][13] =  970

 4097 20:15:17.750675  tx_last_pass[1][1][13] =	992

 4098 20:15:17.754415  tx_win_center[1][1][14] = 980

 4099 20:15:17.757768  tx_first_pass[1][1][14] =  969

 4100 20:15:17.757878  tx_last_pass[1][1][14] =	992

 4101 20:15:17.760886  tx_win_center[1][1][15] = 977

 4102 20:15:17.764014  tx_first_pass[1][1][15] =  966

 4103 20:15:17.767776  tx_last_pass[1][1][15] =	989

 4104 20:15:17.768188  dump params rx window

 4105 20:15:17.771314  rx_firspass[0][0][0] = 9

 4106 20:15:17.774145  rx_lastpass[0][0][0] =  42

 4107 20:15:17.774224  rx_firspass[0][0][1] = 8

 4108 20:15:17.777247  rx_lastpass[0][0][1] =  40

 4109 20:15:17.780807  rx_firspass[0][0][2] = 9

 4110 20:15:17.780887  rx_lastpass[0][0][2] =  39

 4111 20:15:17.783944  rx_firspass[0][0][3] = -2

 4112 20:15:17.787452  rx_lastpass[0][0][3] =  31

 4113 20:15:17.790714  rx_firspass[0][0][4] = 7

 4114 20:15:17.790794  rx_lastpass[0][0][4] =  39

 4115 20:15:17.794114  rx_firspass[0][0][5] = 3

 4116 20:15:17.797751  rx_lastpass[0][0][5] =  29

 4117 20:15:17.797830  rx_firspass[0][0][6] = 2

 4118 20:15:17.800890  rx_lastpass[0][0][6] =  32

 4119 20:15:17.804406  rx_firspass[0][0][7] = 4

 4120 20:15:17.804480  rx_lastpass[0][0][7] =  34

 4121 20:15:17.807553  rx_firspass[0][0][8] = 2

 4122 20:15:17.810776  rx_lastpass[0][0][8] =  34

 4123 20:15:17.814044  rx_firspass[0][0][9] = 5

 4124 20:15:17.814117  rx_lastpass[0][0][9] =  36

 4125 20:15:17.817373  rx_firspass[0][0][10] = 9

 4126 20:15:17.820742  rx_lastpass[0][0][10] =  38

 4127 20:15:17.820838  rx_firspass[0][0][11] = 3

 4128 20:15:17.824124  rx_lastpass[0][0][11] =  31

 4129 20:15:17.827519  rx_firspass[0][0][12] = 5

 4130 20:15:17.830840  rx_lastpass[0][0][12] =  35

 4131 20:15:17.830942  rx_firspass[0][0][13] = 1

 4132 20:15:17.833800  rx_lastpass[0][0][13] =  32

 4133 20:15:17.837817  rx_firspass[0][0][14] = 3

 4134 20:15:17.840448  rx_lastpass[0][0][14] =  33

 4135 20:15:17.840544  rx_firspass[0][0][15] = 4

 4136 20:15:17.844111  rx_lastpass[0][0][15] =  35

 4137 20:15:17.847096  rx_firspass[0][1][0] = 9

 4138 20:15:17.847198  rx_lastpass[0][1][0] =  43

 4139 20:15:17.850749  rx_firspass[0][1][1] = 7

 4140 20:15:17.854103  rx_lastpass[0][1][1] =  42

 4141 20:15:17.854176  rx_firspass[0][1][2] = 7

 4142 20:15:17.857624  rx_lastpass[0][1][2] =  42

 4143 20:15:17.860544  rx_firspass[0][1][3] = -2

 4144 20:15:17.864314  rx_lastpass[0][1][3] =  33

 4145 20:15:17.864412  rx_firspass[0][1][4] = 5

 4146 20:15:17.867483  rx_lastpass[0][1][4] =  40

 4147 20:15:17.870783  rx_firspass[0][1][5] = 1

 4148 20:15:17.870877  rx_lastpass[0][1][5] =  34

 4149 20:15:17.874086  rx_firspass[0][1][6] = 2

 4150 20:15:17.877392  rx_lastpass[0][1][6] =  35

 4151 20:15:17.877462  rx_firspass[0][1][7] = 2

 4152 20:15:17.880683  rx_lastpass[0][1][7] =  36

 4153 20:15:17.884071  rx_firspass[0][1][8] = 0

 4154 20:15:17.884167  rx_lastpass[0][1][8] =  36

 4155 20:15:17.887405  rx_firspass[0][1][9] = 1

 4156 20:15:17.891045  rx_lastpass[0][1][9] =  38

 4157 20:15:17.894318  rx_firspass[0][1][10] = 6

 4158 20:15:17.894398  rx_lastpass[0][1][10] =  41

 4159 20:15:17.897554  rx_firspass[0][1][11] = 1

 4160 20:15:17.900972  rx_lastpass[0][1][11] =  33

 4161 20:15:17.901051  rx_firspass[0][1][12] = 2

 4162 20:15:17.904255  rx_lastpass[0][1][12] =  36

 4163 20:15:17.907777  rx_firspass[0][1][13] = -1

 4164 20:15:17.910701  rx_lastpass[0][1][13] =  34

 4165 20:15:17.910781  rx_firspass[0][1][14] = 1

 4166 20:15:17.914148  rx_lastpass[0][1][14] =  36

 4167 20:15:17.917891  rx_firspass[0][1][15] = 3

 4168 20:15:17.920786  rx_lastpass[0][1][15] =  38

 4169 20:15:17.920866  rx_firspass[1][0][0] = 8

 4170 20:15:17.924225  rx_lastpass[1][0][0] =  40

 4171 20:15:17.927556  rx_firspass[1][0][1] = 7

 4172 20:15:17.927636  rx_lastpass[1][0][1] =  38

 4173 20:15:17.930668  rx_firspass[1][0][2] = 1

 4174 20:15:17.933871  rx_lastpass[1][0][2] =  32

 4175 20:15:17.933951  rx_firspass[1][0][3] = 0

 4176 20:15:17.937960  rx_lastpass[1][0][3] =  31

 4177 20:15:17.940445  rx_firspass[1][0][4] = 4

 4178 20:15:17.944522  rx_lastpass[1][0][4] =  33

 4179 20:15:17.944636  rx_firspass[1][0][5] = 9

 4180 20:15:17.947454  rx_lastpass[1][0][5] =  38

 4181 20:15:17.950702  rx_firspass[1][0][6] = 10

 4182 20:15:17.950782  rx_lastpass[1][0][6] =  40

 4183 20:15:17.954004  rx_firspass[1][0][7] = 5

 4184 20:15:17.957757  rx_lastpass[1][0][7] =  33

 4185 20:15:17.957850  rx_firspass[1][0][8] = 3

 4186 20:15:17.960682  rx_lastpass[1][0][8] =  34

 4187 20:15:17.964456  rx_firspass[1][0][9] = 4

 4188 20:15:17.967711  rx_lastpass[1][0][9] =  35

 4189 20:15:17.967791  rx_firspass[1][0][10] = 2

 4190 20:15:17.971213  rx_lastpass[1][0][10] =  34

 4191 20:15:17.974204  rx_firspass[1][0][11] = 4

 4192 20:15:17.974290  rx_lastpass[1][0][11] =  34

 4193 20:15:17.977657  rx_firspass[1][0][12] = 5

 4194 20:15:17.981140  rx_lastpass[1][0][12] =  35

 4195 20:15:17.984161  rx_firspass[1][0][13] = 5

 4196 20:15:17.984261  rx_lastpass[1][0][13] =  33

 4197 20:15:17.987564  rx_firspass[1][0][14] = 4

 4198 20:15:17.990745  rx_lastpass[1][0][14] =  34

 4199 20:15:17.994278  rx_firspass[1][0][15] = 0

 4200 20:15:17.994397  rx_lastpass[1][0][15] =  32

 4201 20:15:17.997396  rx_firspass[1][1][0] = 6

 4202 20:15:18.000711  rx_lastpass[1][1][0] =  42

 4203 20:15:18.000865  rx_firspass[1][1][1] = 5

 4204 20:15:18.004313  rx_lastpass[1][1][1] =  40

 4205 20:15:18.007429  rx_firspass[1][1][2] = 0

 4206 20:15:18.010744  rx_lastpass[1][1][2] =  35

 4207 20:15:18.010944  rx_firspass[1][1][3] = -3

 4208 20:15:18.014208  rx_lastpass[1][1][3] =  33

 4209 20:15:18.017542  rx_firspass[1][1][4] = 2

 4210 20:15:18.017778  rx_lastpass[1][1][4] =  36

 4211 20:15:18.020955  rx_firspass[1][1][5] = 5

 4212 20:15:18.024399  rx_lastpass[1][1][5] =  41

 4213 20:15:18.024716  rx_firspass[1][1][6] = 7

 4214 20:15:18.027887  rx_lastpass[1][1][6] =  42

 4215 20:15:18.030887  rx_firspass[1][1][7] = 2

 4216 20:15:18.034036  rx_lastpass[1][1][7] =  36

 4217 20:15:18.034447  rx_firspass[1][1][8] = 1

 4218 20:15:18.037637  rx_lastpass[1][1][8] =  37

 4219 20:15:18.040899  rx_firspass[1][1][9] = 1

 4220 20:15:18.041493  rx_lastpass[1][1][9] =  37

 4221 20:15:18.044199  rx_firspass[1][1][10] = 2

 4222 20:15:18.047270  rx_lastpass[1][1][10] =  36

 4223 20:15:18.047745  rx_firspass[1][1][11] = 3

 4224 20:15:18.050744  rx_lastpass[1][1][11] =  38

 4225 20:15:18.054368  rx_firspass[1][1][12] = 4

 4226 20:15:18.057535  rx_lastpass[1][1][12] =  39

 4227 20:15:18.058033  rx_firspass[1][1][13] = 3

 4228 20:15:18.060483  rx_lastpass[1][1][13] =  36

 4229 20:15:18.064220  rx_firspass[1][1][14] = 3

 4230 20:15:18.067467  rx_lastpass[1][1][14] =  36

 4231 20:15:18.067897  rx_firspass[1][1][15] = 0

 4232 20:15:18.070587  rx_lastpass[1][1][15] =  34

 4233 20:15:18.074173  dump params clk_delay

 4234 20:15:18.074604  clk_delay[0] = -1

 4235 20:15:18.077442  clk_delay[1] = 0

 4236 20:15:18.077855  dump params dqs_delay

 4237 20:15:18.080681  dqs_delay[0][0] = 0

 4238 20:15:18.081294  dqs_delay[0][1] = 0

 4239 20:15:18.084340  dqs_delay[1][0] = -1

 4240 20:15:18.084753  dqs_delay[1][1] = 0

 4241 20:15:18.087461  dump params delay_cell_unit = 762

 4242 20:15:18.090857  dump source = 0x0

 4243 20:15:18.094601  dump params frequency:1200

 4244 20:15:18.095013  dump params rank number:2

 4245 20:15:18.095339  

 4246 20:15:18.097559   dump params write leveling

 4247 20:15:18.100935  write leveling[0][0][0] = 0x0

 4248 20:15:18.104370  write leveling[0][0][1] = 0x0

 4249 20:15:18.104779  write leveling[0][1][0] = 0x0

 4250 20:15:18.107420  write leveling[0][1][1] = 0x0

 4251 20:15:18.110540  write leveling[1][0][0] = 0x0

 4252 20:15:18.114547  write leveling[1][0][1] = 0x0

 4253 20:15:18.117457  write leveling[1][1][0] = 0x0

 4254 20:15:18.117869  write leveling[1][1][1] = 0x0

 4255 20:15:18.120562  dump params cbt_cs

 4256 20:15:18.120974  cbt_cs[0][0] = 0x0

 4257 20:15:18.124170  cbt_cs[0][1] = 0x0

 4258 20:15:18.127268  cbt_cs[1][0] = 0x0

 4259 20:15:18.127694  cbt_cs[1][1] = 0x0

 4260 20:15:18.130538  dump params cbt_mr12

 4261 20:15:18.130949  cbt_mr12[0][0] = 0x0

 4262 20:15:18.134299  cbt_mr12[0][1] = 0x0

 4263 20:15:18.134708  cbt_mr12[1][0] = 0x0

 4264 20:15:18.137234  cbt_mr12[1][1] = 0x0

 4265 20:15:18.137694  dump params tx window

 4266 20:15:18.140804  tx_center_min[0][0][0] = 0

 4267 20:15:18.144362  tx_center_max[0][0][0] =  0

 4268 20:15:18.147792  tx_center_min[0][0][1] = 0

 4269 20:15:18.148206  tx_center_max[0][0][1] =  0

 4270 20:15:18.151061  tx_center_min[0][1][0] = 0

 4271 20:15:18.153992  tx_center_max[0][1][0] =  0

 4272 20:15:18.157616  tx_center_min[0][1][1] = 0

 4273 20:15:18.158030  tx_center_max[0][1][1] =  0

 4274 20:15:18.160724  tx_center_min[1][0][0] = 0

 4275 20:15:18.164064  tx_center_max[1][0][0] =  0

 4276 20:15:18.167966  tx_center_min[1][0][1] = 0

 4277 20:15:18.168377  tx_center_max[1][0][1] =  0

 4278 20:15:18.170883  tx_center_min[1][1][0] = 0

 4279 20:15:18.174350  tx_center_max[1][1][0] =  0

 4280 20:15:18.174750  tx_center_min[1][1][1] = 0

 4281 20:15:18.177697  tx_center_max[1][1][1] =  0

 4282 20:15:18.180577  dump params tx window

 4283 20:15:18.184704  tx_win_center[0][0][0] = 0

 4284 20:15:18.185057  tx_first_pass[0][0][0] =  0

 4285 20:15:18.187588  tx_last_pass[0][0][0] =	0

 4286 20:15:18.190699  tx_win_center[0][0][1] = 0

 4287 20:15:18.191045  tx_first_pass[0][0][1] =  0

 4288 20:15:18.194021  tx_last_pass[0][0][1] =	0

 4289 20:15:18.197697  tx_win_center[0][0][2] = 0

 4290 20:15:18.201327  tx_first_pass[0][0][2] =  0

 4291 20:15:18.201739  tx_last_pass[0][0][2] =	0

 4292 20:15:18.204167  tx_win_center[0][0][3] = 0

 4293 20:15:18.207503  tx_first_pass[0][0][3] =  0

 4294 20:15:18.207918  tx_last_pass[0][0][3] =	0

 4295 20:15:18.210945  tx_win_center[0][0][4] = 0

 4296 20:15:18.214357  tx_first_pass[0][0][4] =  0

 4297 20:15:18.217485  tx_last_pass[0][0][4] =	0

 4298 20:15:18.217898  tx_win_center[0][0][5] = 0

 4299 20:15:18.221446  tx_first_pass[0][0][5] =  0

 4300 20:15:18.224074  tx_last_pass[0][0][5] =	0

 4301 20:15:18.227673  tx_win_center[0][0][6] = 0

 4302 20:15:18.228086  tx_first_pass[0][0][6] =  0

 4303 20:15:18.231201  tx_last_pass[0][0][6] =	0

 4304 20:15:18.234851  tx_win_center[0][0][7] = 0

 4305 20:15:18.235265  tx_first_pass[0][0][7] =  0

 4306 20:15:18.237685  tx_last_pass[0][0][7] =	0

 4307 20:15:18.241069  tx_win_center[0][0][8] = 0

 4308 20:15:18.244513  tx_first_pass[0][0][8] =  0

 4309 20:15:18.245104  tx_last_pass[0][0][8] =	0

 4310 20:15:18.247885  tx_win_center[0][0][9] = 0

 4311 20:15:18.251109  tx_first_pass[0][0][9] =  0

 4312 20:15:18.254709  tx_last_pass[0][0][9] =	0

 4313 20:15:18.255128  tx_win_center[0][0][10] = 0

 4314 20:15:18.257558  tx_first_pass[0][0][10] =  0

 4315 20:15:18.261223  tx_last_pass[0][0][10] =	0

 4316 20:15:18.261690  tx_win_center[0][0][11] = 0

 4317 20:15:18.264465  tx_first_pass[0][0][11] =  0

 4318 20:15:18.267816  tx_last_pass[0][0][11] =	0

 4319 20:15:18.271033  tx_win_center[0][0][12] = 0

 4320 20:15:18.274195  tx_first_pass[0][0][12] =  0

 4321 20:15:18.274628  tx_last_pass[0][0][12] =	0

 4322 20:15:18.277959  tx_win_center[0][0][13] = 0

 4323 20:15:18.281317  tx_first_pass[0][0][13] =  0

 4324 20:15:18.281737  tx_last_pass[0][0][13] =	0

 4325 20:15:18.284397  tx_win_center[0][0][14] = 0

 4326 20:15:18.287659  tx_first_pass[0][0][14] =  0

 4327 20:15:18.290954  tx_last_pass[0][0][14] =	0

 4328 20:15:18.291374  tx_win_center[0][0][15] = 0

 4329 20:15:18.294289  tx_first_pass[0][0][15] =  0

 4330 20:15:18.297656  tx_last_pass[0][0][15] =	0

 4331 20:15:18.301315  tx_win_center[0][1][0] = 0

 4332 20:15:18.301734  tx_first_pass[0][1][0] =  0

 4333 20:15:18.304009  tx_last_pass[0][1][0] =	0

 4334 20:15:18.307695  tx_win_center[0][1][1] = 0

 4335 20:15:18.311139  tx_first_pass[0][1][1] =  0

 4336 20:15:18.311727  tx_last_pass[0][1][1] =	0

 4337 20:15:18.314411  tx_win_center[0][1][2] = 0

 4338 20:15:18.317332  tx_first_pass[0][1][2] =  0

 4339 20:15:18.320795  tx_last_pass[0][1][2] =	0

 4340 20:15:18.321213  tx_win_center[0][1][3] = 0

 4341 20:15:18.323883  tx_first_pass[0][1][3] =  0

 4342 20:15:18.327044  tx_last_pass[0][1][3] =	0

 4343 20:15:18.327125  tx_win_center[0][1][4] = 0

 4344 20:15:18.330411  tx_first_pass[0][1][4] =  0

 4345 20:15:18.333656  tx_last_pass[0][1][4] =	0

 4346 20:15:18.336943  tx_win_center[0][1][5] = 0

 4347 20:15:18.337024  tx_first_pass[0][1][5] =  0

 4348 20:15:18.340694  tx_last_pass[0][1][5] =	0

 4349 20:15:18.344049  tx_win_center[0][1][6] = 0

 4350 20:15:18.347501  tx_first_pass[0][1][6] =  0

 4351 20:15:18.347583  tx_last_pass[0][1][6] =	0

 4352 20:15:18.350479  tx_win_center[0][1][7] = 0

 4353 20:15:18.353611  tx_first_pass[0][1][7] =  0

 4354 20:15:18.353691  tx_last_pass[0][1][7] =	0

 4355 20:15:18.357140  tx_win_center[0][1][8] = 0

 4356 20:15:18.360155  tx_first_pass[0][1][8] =  0

 4357 20:15:18.363814  tx_last_pass[0][1][8] =	0

 4358 20:15:18.363894  tx_win_center[0][1][9] = 0

 4359 20:15:18.367043  tx_first_pass[0][1][9] =  0

 4360 20:15:18.370457  tx_last_pass[0][1][9] =	0

 4361 20:15:18.373910  tx_win_center[0][1][10] = 0

 4362 20:15:18.373990  tx_first_pass[0][1][10] =  0

 4363 20:15:18.377153  tx_last_pass[0][1][10] =	0

 4364 20:15:18.380531  tx_win_center[0][1][11] = 0

 4365 20:15:18.383697  tx_first_pass[0][1][11] =  0

 4366 20:15:18.383777  tx_last_pass[0][1][11] =	0

 4367 20:15:18.387070  tx_win_center[0][1][12] = 0

 4368 20:15:18.390616  tx_first_pass[0][1][12] =  0

 4369 20:15:18.393487  tx_last_pass[0][1][12] =	0

 4370 20:15:18.393567  tx_win_center[0][1][13] = 0

 4371 20:15:18.397147  tx_first_pass[0][1][13] =  0

 4372 20:15:18.400314  tx_last_pass[0][1][13] =	0

 4373 20:15:18.403343  tx_win_center[0][1][14] = 0

 4374 20:15:18.403423  tx_first_pass[0][1][14] =  0

 4375 20:15:18.407336  tx_last_pass[0][1][14] =	0

 4376 20:15:18.410546  tx_win_center[0][1][15] = 0

 4377 20:15:18.413599  tx_first_pass[0][1][15] =  0

 4378 20:15:18.413678  tx_last_pass[0][1][15] =	0

 4379 20:15:18.417044  tx_win_center[1][0][0] = 0

 4380 20:15:18.420202  tx_first_pass[1][0][0] =  0

 4381 20:15:18.420281  tx_last_pass[1][0][0] =	0

 4382 20:15:18.423569  tx_win_center[1][0][1] = 0

 4383 20:15:18.426953  tx_first_pass[1][0][1] =  0

 4384 20:15:18.430296  tx_last_pass[1][0][1] =	0

 4385 20:15:18.430375  tx_win_center[1][0][2] = 0

 4386 20:15:18.433482  tx_first_pass[1][0][2] =  0

 4387 20:15:18.437055  tx_last_pass[1][0][2] =	0

 4388 20:15:18.440621  tx_win_center[1][0][3] = 0

 4389 20:15:18.440701  tx_first_pass[1][0][3] =  0

 4390 20:15:18.443684  tx_last_pass[1][0][3] =	0

 4391 20:15:18.447273  tx_win_center[1][0][4] = 0

 4392 20:15:18.447358  tx_first_pass[1][0][4] =  0

 4393 20:15:18.450534  tx_last_pass[1][0][4] =	0

 4394 20:15:18.453949  tx_win_center[1][0][5] = 0

 4395 20:15:18.457317  tx_first_pass[1][0][5] =  0

 4396 20:15:18.457416  tx_last_pass[1][0][5] =	0

 4397 20:15:18.460706  tx_win_center[1][0][6] = 0

 4398 20:15:18.463907  tx_first_pass[1][0][6] =  0

 4399 20:15:18.464015  tx_last_pass[1][0][6] =	0

 4400 20:15:18.467313  tx_win_center[1][0][7] = 0

 4401 20:15:18.470852  tx_first_pass[1][0][7] =  0

 4402 20:15:18.473727  tx_last_pass[1][0][7] =	0

 4403 20:15:18.473807  tx_win_center[1][0][8] = 0

 4404 20:15:18.477566  tx_first_pass[1][0][8] =  0

 4405 20:15:18.480656  tx_last_pass[1][0][8] =	0

 4406 20:15:18.484123  tx_win_center[1][0][9] = 0

 4407 20:15:18.484202  tx_first_pass[1][0][9] =  0

 4408 20:15:18.487074  tx_last_pass[1][0][9] =	0

 4409 20:15:18.490112  tx_win_center[1][0][10] = 0

 4410 20:15:18.493412  tx_first_pass[1][0][10] =  0

 4411 20:15:18.493492  tx_last_pass[1][0][10] =	0

 4412 20:15:18.497225  tx_win_center[1][0][11] = 0

 4413 20:15:18.500404  tx_first_pass[1][0][11] =  0

 4414 20:15:18.500483  tx_last_pass[1][0][11] =	0

 4415 20:15:18.503848  tx_win_center[1][0][12] = 0

 4416 20:15:18.506963  tx_first_pass[1][0][12] =  0

 4417 20:15:18.510504  tx_last_pass[1][0][12] =	0

 4418 20:15:18.510584  tx_win_center[1][0][13] = 0

 4419 20:15:18.513705  tx_first_pass[1][0][13] =  0

 4420 20:15:18.517115  tx_last_pass[1][0][13] =	0

 4421 20:15:18.520401  tx_win_center[1][0][14] = 0

 4422 20:15:18.523895  tx_first_pass[1][0][14] =  0

 4423 20:15:18.523974  tx_last_pass[1][0][14] =	0

 4424 20:15:18.527192  tx_win_center[1][0][15] = 0

 4425 20:15:18.530797  tx_first_pass[1][0][15] =  0

 4426 20:15:18.533963  tx_last_pass[1][0][15] =	0

 4427 20:15:18.534372  tx_win_center[1][1][0] = 0

 4428 20:15:18.537239  tx_first_pass[1][1][0] =  0

 4429 20:15:18.541040  tx_last_pass[1][1][0] =	0

 4430 20:15:18.541562  tx_win_center[1][1][1] = 0

 4431 20:15:18.544301  tx_first_pass[1][1][1] =  0

 4432 20:15:18.547388  tx_last_pass[1][1][1] =	0

 4433 20:15:18.550447  tx_win_center[1][1][2] = 0

 4434 20:15:18.550856  tx_first_pass[1][1][2] =  0

 4435 20:15:18.553794  tx_last_pass[1][1][2] =	0

 4436 20:15:18.557320  tx_win_center[1][1][3] = 0

 4437 20:15:18.557733  tx_first_pass[1][1][3] =  0

 4438 20:15:18.560882  tx_last_pass[1][1][3] =	0

 4439 20:15:18.564181  tx_win_center[1][1][4] = 0

 4440 20:15:18.567785  tx_first_pass[1][1][4] =  0

 4441 20:15:18.568190  tx_last_pass[1][1][4] =	0

 4442 20:15:18.570494  tx_win_center[1][1][5] = 0

 4443 20:15:18.573743  tx_first_pass[1][1][5] =  0

 4444 20:15:18.577381  tx_last_pass[1][1][5] =	0

 4445 20:15:18.577792  tx_win_center[1][1][6] = 0

 4446 20:15:18.580442  tx_first_pass[1][1][6] =  0

 4447 20:15:18.583903  tx_last_pass[1][1][6] =	0

 4448 20:15:18.584316  tx_win_center[1][1][7] = 0

 4449 20:15:18.587554  tx_first_pass[1][1][7] =  0

 4450 20:15:18.590560  tx_last_pass[1][1][7] =	0

 4451 20:15:18.594262  tx_win_center[1][1][8] = 0

 4452 20:15:18.594673  tx_first_pass[1][1][8] =  0

 4453 20:15:18.597310  tx_last_pass[1][1][8] =	0

 4454 20:15:18.600538  tx_win_center[1][1][9] = 0

 4455 20:15:18.603904  tx_first_pass[1][1][9] =  0

 4456 20:15:18.604311  tx_last_pass[1][1][9] =	0

 4457 20:15:18.607120  tx_win_center[1][1][10] = 0

 4458 20:15:18.610472  tx_first_pass[1][1][10] =  0

 4459 20:15:18.613790  tx_last_pass[1][1][10] =	0

 4460 20:15:18.614197  tx_win_center[1][1][11] = 0

 4461 20:15:18.617354  tx_first_pass[1][1][11] =  0

 4462 20:15:18.620492  tx_last_pass[1][1][11] =	0

 4463 20:15:18.623824  tx_win_center[1][1][12] = 0

 4464 20:15:18.624235  tx_first_pass[1][1][12] =  0

 4465 20:15:18.626914  tx_last_pass[1][1][12] =	0

 4466 20:15:18.630344  tx_win_center[1][1][13] = 0

 4467 20:15:18.633713  tx_first_pass[1][1][13] =  0

 4468 20:15:18.633793  tx_last_pass[1][1][13] =	0

 4469 20:15:18.636401  tx_win_center[1][1][14] = 0

 4470 20:15:18.639910  tx_first_pass[1][1][14] =  0

 4471 20:15:18.643508  tx_last_pass[1][1][14] =	0

 4472 20:15:18.643589  tx_win_center[1][1][15] = 0

 4473 20:15:18.646667  tx_first_pass[1][1][15] =  0

 4474 20:15:18.650045  tx_last_pass[1][1][15] =	0

 4475 20:15:18.650125  dump params rx window

 4476 20:15:18.653519  rx_firspass[0][0][0] = 0

 4477 20:15:18.656707  rx_lastpass[0][0][0] =  0

 4478 20:15:18.656787  rx_firspass[0][0][1] = 0

 4479 20:15:18.659983  rx_lastpass[0][0][1] =  0

 4480 20:15:18.663646  rx_firspass[0][0][2] = 0

 4481 20:15:18.663726  rx_lastpass[0][0][2] =  0

 4482 20:15:18.666702  rx_firspass[0][0][3] = 0

 4483 20:15:18.670225  rx_lastpass[0][0][3] =  0

 4484 20:15:18.673601  rx_firspass[0][0][4] = 0

 4485 20:15:18.673677  rx_lastpass[0][0][4] =  0

 4486 20:15:18.676650  rx_firspass[0][0][5] = 0

 4487 20:15:18.679984  rx_lastpass[0][0][5] =  0

 4488 20:15:18.680058  rx_firspass[0][0][6] = 0

 4489 20:15:18.683783  rx_lastpass[0][0][6] =  0

 4490 20:15:18.686552  rx_firspass[0][0][7] = 0

 4491 20:15:18.686634  rx_lastpass[0][0][7] =  0

 4492 20:15:18.690059  rx_firspass[0][0][8] = 0

 4493 20:15:18.693539  rx_lastpass[0][0][8] =  0

 4494 20:15:18.693618  rx_firspass[0][0][9] = 0

 4495 20:15:18.697144  rx_lastpass[0][0][9] =  0

 4496 20:15:18.700229  rx_firspass[0][0][10] = 0

 4497 20:15:18.700307  rx_lastpass[0][0][10] =  0

 4498 20:15:18.703719  rx_firspass[0][0][11] = 0

 4499 20:15:18.707005  rx_lastpass[0][0][11] =  0

 4500 20:15:18.710580  rx_firspass[0][0][12] = 0

 4501 20:15:18.710667  rx_lastpass[0][0][12] =  0

 4502 20:15:18.713552  rx_firspass[0][0][13] = 0

 4503 20:15:18.716753  rx_lastpass[0][0][13] =  0

 4504 20:15:18.716833  rx_firspass[0][0][14] = 0

 4505 20:15:18.720275  rx_lastpass[0][0][14] =  0

 4506 20:15:18.723472  rx_firspass[0][0][15] = 0

 4507 20:15:18.726959  rx_lastpass[0][0][15] =  0

 4508 20:15:18.727039  rx_firspass[0][1][0] = 0

 4509 20:15:18.730163  rx_lastpass[0][1][0] =  0

 4510 20:15:18.733765  rx_firspass[0][1][1] = 0

 4511 20:15:18.733844  rx_lastpass[0][1][1] =  0

 4512 20:15:18.736614  rx_firspass[0][1][2] = 0

 4513 20:15:18.740663  rx_lastpass[0][1][2] =  0

 4514 20:15:18.740748  rx_firspass[0][1][3] = 0

 4515 20:15:18.743655  rx_lastpass[0][1][3] =  0

 4516 20:15:18.746776  rx_firspass[0][1][4] = 0

 4517 20:15:18.746867  rx_lastpass[0][1][4] =  0

 4518 20:15:18.749866  rx_firspass[0][1][5] = 0

 4519 20:15:18.753777  rx_lastpass[0][1][5] =  0

 4520 20:15:18.753862  rx_firspass[0][1][6] = 0

 4521 20:15:18.756969  rx_lastpass[0][1][6] =  0

 4522 20:15:18.760057  rx_firspass[0][1][7] = 0

 4523 20:15:18.763306  rx_lastpass[0][1][7] =  0

 4524 20:15:18.763405  rx_firspass[0][1][8] = 0

 4525 20:15:18.767043  rx_lastpass[0][1][8] =  0

 4526 20:15:18.770537  rx_firspass[0][1][9] = 0

 4527 20:15:18.770949  rx_lastpass[0][1][9] =  0

 4528 20:15:18.773616  rx_firspass[0][1][10] = 0

 4529 20:15:18.777221  rx_lastpass[0][1][10] =  0

 4530 20:15:18.777723  rx_firspass[0][1][11] = 0

 4531 20:15:18.780526  rx_lastpass[0][1][11] =  0

 4532 20:15:18.783662  rx_firspass[0][1][12] = 0

 4533 20:15:18.786844  rx_lastpass[0][1][12] =  0

 4534 20:15:18.787258  rx_firspass[0][1][13] = 0

 4535 20:15:18.790195  rx_lastpass[0][1][13] =  0

 4536 20:15:18.793804  rx_firspass[0][1][14] = 0

 4537 20:15:18.794215  rx_lastpass[0][1][14] =  0

 4538 20:15:18.796877  rx_firspass[0][1][15] = 0

 4539 20:15:18.800062  rx_lastpass[0][1][15] =  0

 4540 20:15:18.803235  rx_firspass[1][0][0] = 0

 4541 20:15:18.803315  rx_lastpass[1][0][0] =  0

 4542 20:15:18.806446  rx_firspass[1][0][1] = 0

 4543 20:15:18.810019  rx_lastpass[1][0][1] =  0

 4544 20:15:18.810099  rx_firspass[1][0][2] = 0

 4545 20:15:18.813519  rx_lastpass[1][0][2] =  0

 4546 20:15:18.816624  rx_firspass[1][0][3] = 0

 4547 20:15:18.816704  rx_lastpass[1][0][3] =  0

 4548 20:15:18.819999  rx_firspass[1][0][4] = 0

 4549 20:15:18.823500  rx_lastpass[1][0][4] =  0

 4550 20:15:18.823579  rx_firspass[1][0][5] = 0

 4551 20:15:18.826654  rx_lastpass[1][0][5] =  0

 4552 20:15:18.829870  rx_firspass[1][0][6] = 0

 4553 20:15:18.829950  rx_lastpass[1][0][6] =  0

 4554 20:15:18.833045  rx_firspass[1][0][7] = 0

 4555 20:15:18.836511  rx_lastpass[1][0][7] =  0

 4556 20:15:18.839724  rx_firspass[1][0][8] = 0

 4557 20:15:18.839814  rx_lastpass[1][0][8] =  0

 4558 20:15:18.843182  rx_firspass[1][0][9] = 0

 4559 20:15:18.846688  rx_lastpass[1][0][9] =  0

 4560 20:15:18.846774  rx_firspass[1][0][10] = 0

 4561 20:15:18.850040  rx_lastpass[1][0][10] =  0

 4562 20:15:18.853466  rx_firspass[1][0][11] = 0

 4563 20:15:18.853558  rx_lastpass[1][0][11] =  0

 4564 20:15:18.856881  rx_firspass[1][0][12] = 0

 4565 20:15:18.860310  rx_lastpass[1][0][12] =  0

 4566 20:15:18.863473  rx_firspass[1][0][13] = 0

 4567 20:15:18.863580  rx_lastpass[1][0][13] =  0

 4568 20:15:18.866691  rx_firspass[1][0][14] = 0

 4569 20:15:18.869819  rx_lastpass[1][0][14] =  0

 4570 20:15:18.869993  rx_firspass[1][0][15] = 0

 4571 20:15:18.873179  rx_lastpass[1][0][15] =  0

 4572 20:15:18.876484  rx_firspass[1][1][0] = 0

 4573 20:15:18.880009  rx_lastpass[1][1][0] =  0

 4574 20:15:18.880174  rx_firspass[1][1][1] = 0

 4575 20:15:18.883561  rx_lastpass[1][1][1] =  0

 4576 20:15:18.886574  rx_firspass[1][1][2] = 0

 4577 20:15:18.886767  rx_lastpass[1][1][2] =  0

 4578 20:15:18.889846  rx_firspass[1][1][3] = 0

 4579 20:15:18.893191  rx_lastpass[1][1][3] =  0

 4580 20:15:18.893454  rx_firspass[1][1][4] = 0

 4581 20:15:18.896334  rx_lastpass[1][1][4] =  0

 4582 20:15:18.899507  rx_firspass[1][1][5] = 0

 4583 20:15:18.899594  rx_lastpass[1][1][5] =  0

 4584 20:15:18.903083  rx_firspass[1][1][6] = 0

 4585 20:15:18.906580  rx_lastpass[1][1][6] =  0

 4586 20:15:18.906695  rx_firspass[1][1][7] = 0

 4587 20:15:18.909538  rx_lastpass[1][1][7] =  0

 4588 20:15:18.912930  rx_firspass[1][1][8] = 0

 4589 20:15:18.916228  rx_lastpass[1][1][8] =  0

 4590 20:15:18.916336  rx_firspass[1][1][9] = 0

 4591 20:15:18.919641  rx_lastpass[1][1][9] =  0

 4592 20:15:18.922984  rx_firspass[1][1][10] = 0

 4593 20:15:18.923115  rx_lastpass[1][1][10] =  0

 4594 20:15:18.926589  rx_firspass[1][1][11] = 0

 4595 20:15:18.929763  rx_lastpass[1][1][11] =  0

 4596 20:15:18.929910  rx_firspass[1][1][12] = 0

 4597 20:15:18.933503  rx_lastpass[1][1][12] =  0

 4598 20:15:18.936359  rx_firspass[1][1][13] = 0

 4599 20:15:18.939672  rx_lastpass[1][1][13] =  0

 4600 20:15:18.939868  rx_firspass[1][1][14] = 0

 4601 20:15:18.943020  rx_lastpass[1][1][14] =  0

 4602 20:15:18.946815  rx_firspass[1][1][15] = 0

 4603 20:15:18.947104  rx_lastpass[1][1][15] =  0

 4604 20:15:18.949788  dump params clk_delay

 4605 20:15:18.950092  clk_delay[0] = 0

 4606 20:15:18.953448  clk_delay[1] = 0

 4607 20:15:18.956315  dump params dqs_delay

 4608 20:15:18.956834  dqs_delay[0][0] = 0

 4609 20:15:18.959698  dqs_delay[0][1] = 0

 4610 20:15:18.960191  dqs_delay[1][0] = 0

 4611 20:15:18.963503  dqs_delay[1][1] = 0

 4612 20:15:18.967164  dump params delay_cell_unit = 762

 4613 20:15:18.967576  dump source = 0x0

 4614 20:15:18.970126  dump params frequency:800

 4615 20:15:18.970580  dump params rank number:2

 4616 20:15:18.973730  

 4617 20:15:18.974143   dump params write leveling

 4618 20:15:18.976657  write leveling[0][0][0] = 0x0

 4619 20:15:18.979968  write leveling[0][0][1] = 0x0

 4620 20:15:18.983456  write leveling[0][1][0] = 0x0

 4621 20:15:18.986769  write leveling[0][1][1] = 0x0

 4622 20:15:18.987183  write leveling[1][0][0] = 0x0

 4623 20:15:18.990045  write leveling[1][0][1] = 0x0

 4624 20:15:18.993764  write leveling[1][1][0] = 0x0

 4625 20:15:18.996459  write leveling[1][1][1] = 0x0

 4626 20:15:18.996873  dump params cbt_cs

 4627 20:15:19.000278  cbt_cs[0][0] = 0x0

 4628 20:15:19.000688  cbt_cs[0][1] = 0x0

 4629 20:15:19.003610  cbt_cs[1][0] = 0x0

 4630 20:15:19.004017  cbt_cs[1][1] = 0x0

 4631 20:15:19.006710  dump params cbt_mr12

 4632 20:15:19.007121  cbt_mr12[0][0] = 0x0

 4633 20:15:19.010191  cbt_mr12[0][1] = 0x0

 4634 20:15:19.013142  cbt_mr12[1][0] = 0x0

 4635 20:15:19.013599  cbt_mr12[1][1] = 0x0

 4636 20:15:19.016599  dump params tx window

 4637 20:15:19.017009  tx_center_min[0][0][0] = 0

 4638 20:15:19.020002  tx_center_max[0][0][0] =  0

 4639 20:15:19.023101  tx_center_min[0][0][1] = 0

 4640 20:15:19.026792  tx_center_max[0][0][1] =  0

 4641 20:15:19.027211  tx_center_min[0][1][0] = 0

 4642 20:15:19.030374  tx_center_max[0][1][0] =  0

 4643 20:15:19.033391  tx_center_min[0][1][1] = 0

 4644 20:15:19.036607  tx_center_max[0][1][1] =  0

 4645 20:15:19.037029  tx_center_min[1][0][0] = 0

 4646 20:15:19.040100  tx_center_max[1][0][0] =  0

 4647 20:15:19.043243  tx_center_min[1][0][1] = 0

 4648 20:15:19.046119  tx_center_max[1][0][1] =  0

 4649 20:15:19.046199  tx_center_min[1][1][0] = 0

 4650 20:15:19.049804  tx_center_max[1][1][0] =  0

 4651 20:15:19.053575  tx_center_min[1][1][1] = 0

 4652 20:15:19.056549  tx_center_max[1][1][1] =  0

 4653 20:15:19.056628  dump params tx window

 4654 20:15:19.059806  tx_win_center[0][0][0] = 0

 4655 20:15:19.063208  tx_first_pass[0][0][0] =  0

 4656 20:15:19.063288  tx_last_pass[0][0][0] =	0

 4657 20:15:19.066457  tx_win_center[0][0][1] = 0

 4658 20:15:19.069819  tx_first_pass[0][0][1] =  0

 4659 20:15:19.069899  tx_last_pass[0][0][1] =	0

 4660 20:15:19.072829  tx_win_center[0][0][2] = 0

 4661 20:15:19.076481  tx_first_pass[0][0][2] =  0

 4662 20:15:19.080148  tx_last_pass[0][0][2] =	0

 4663 20:15:19.080228  tx_win_center[0][0][3] = 0

 4664 20:15:19.083593  tx_first_pass[0][0][3] =  0

 4665 20:15:19.086699  tx_last_pass[0][0][3] =	0

 4666 20:15:19.086772  tx_win_center[0][0][4] = 0

 4667 20:15:19.089987  tx_first_pass[0][0][4] =  0

 4668 20:15:19.093462  tx_last_pass[0][0][4] =	0

 4669 20:15:19.096564  tx_win_center[0][0][5] = 0

 4670 20:15:19.096644  tx_first_pass[0][0][5] =  0

 4671 20:15:19.099924  tx_last_pass[0][0][5] =	0

 4672 20:15:19.103302  tx_win_center[0][0][6] = 0

 4673 20:15:19.106921  tx_first_pass[0][0][6] =  0

 4674 20:15:19.107012  tx_last_pass[0][0][6] =	0

 4675 20:15:19.109742  tx_win_center[0][0][7] = 0

 4676 20:15:19.113104  tx_first_pass[0][0][7] =  0

 4677 20:15:19.113247  tx_last_pass[0][0][7] =	0

 4678 20:15:19.116761  tx_win_center[0][0][8] = 0

 4679 20:15:19.119736  tx_first_pass[0][0][8] =  0

 4680 20:15:19.123116  tx_last_pass[0][0][8] =	0

 4681 20:15:19.123231  tx_win_center[0][0][9] = 0

 4682 20:15:19.126691  tx_first_pass[0][0][9] =  0

 4683 20:15:19.129693  tx_last_pass[0][0][9] =	0

 4684 20:15:19.133117  tx_win_center[0][0][10] = 0

 4685 20:15:19.133281  tx_first_pass[0][0][10] =  0

 4686 20:15:19.136563  tx_last_pass[0][0][10] =	0

 4687 20:15:19.139660  tx_win_center[0][0][11] = 0

 4688 20:15:19.142932  tx_first_pass[0][0][11] =  0

 4689 20:15:19.143166  tx_last_pass[0][0][11] =	0

 4690 20:15:19.146551  tx_win_center[0][0][12] = 0

 4691 20:15:19.149779  tx_first_pass[0][0][12] =  0

 4692 20:15:19.153581  tx_last_pass[0][0][12] =	0

 4693 20:15:19.153991  tx_win_center[0][0][13] = 0

 4694 20:15:19.156990  tx_first_pass[0][0][13] =  0

 4695 20:15:19.159937  tx_last_pass[0][0][13] =	0

 4696 20:15:19.163296  tx_win_center[0][0][14] = 0

 4697 20:15:19.163722  tx_first_pass[0][0][14] =  0

 4698 20:15:19.166771  tx_last_pass[0][0][14] =	0

 4699 20:15:19.170294  tx_win_center[0][0][15] = 0

 4700 20:15:19.173643  tx_first_pass[0][0][15] =  0

 4701 20:15:19.174055  tx_last_pass[0][0][15] =	0

 4702 20:15:19.176773  tx_win_center[0][1][0] = 0

 4703 20:15:19.179949  tx_first_pass[0][1][0] =  0

 4704 20:15:19.180367  tx_last_pass[0][1][0] =	0

 4705 20:15:19.183721  tx_win_center[0][1][1] = 0

 4706 20:15:19.186835  tx_first_pass[0][1][1] =  0

 4707 20:15:19.190234  tx_last_pass[0][1][1] =	0

 4708 20:15:19.190649  tx_win_center[0][1][2] = 0

 4709 20:15:19.193255  tx_first_pass[0][1][2] =  0

 4710 20:15:19.196930  tx_last_pass[0][1][2] =	0

 4711 20:15:19.199770  tx_win_center[0][1][3] = 0

 4712 20:15:19.200327  tx_first_pass[0][1][3] =  0

 4713 20:15:19.203521  tx_last_pass[0][1][3] =	0

 4714 20:15:19.207180  tx_win_center[0][1][4] = 0

 4715 20:15:19.207594  tx_first_pass[0][1][4] =  0

 4716 20:15:19.210349  tx_last_pass[0][1][4] =	0

 4717 20:15:19.213322  tx_win_center[0][1][5] = 0

 4718 20:15:19.216581  tx_first_pass[0][1][5] =  0

 4719 20:15:19.216995  tx_last_pass[0][1][5] =	0

 4720 20:15:19.219947  tx_win_center[0][1][6] = 0

 4721 20:15:19.223395  tx_first_pass[0][1][6] =  0

 4722 20:15:19.223811  tx_last_pass[0][1][6] =	0

 4723 20:15:19.226899  tx_win_center[0][1][7] = 0

 4724 20:15:19.230023  tx_first_pass[0][1][7] =  0

 4725 20:15:19.233862  tx_last_pass[0][1][7] =	0

 4726 20:15:19.234282  tx_win_center[0][1][8] = 0

 4727 20:15:19.236521  tx_first_pass[0][1][8] =  0

 4728 20:15:19.240101  tx_last_pass[0][1][8] =	0

 4729 20:15:19.243371  tx_win_center[0][1][9] = 0

 4730 20:15:19.243821  tx_first_pass[0][1][9] =  0

 4731 20:15:19.246732  tx_last_pass[0][1][9] =	0

 4732 20:15:19.250109  tx_win_center[0][1][10] = 0

 4733 20:15:19.253160  tx_first_pass[0][1][10] =  0

 4734 20:15:19.253778  tx_last_pass[0][1][10] =	0

 4735 20:15:19.256330  tx_win_center[0][1][11] = 0

 4736 20:15:19.259741  tx_first_pass[0][1][11] =  0

 4737 20:15:19.263136  tx_last_pass[0][1][11] =	0

 4738 20:15:19.263630  tx_win_center[0][1][12] = 0

 4739 20:15:19.266835  tx_first_pass[0][1][12] =  0

 4740 20:15:19.270134  tx_last_pass[0][1][12] =	0

 4741 20:15:19.273547  tx_win_center[0][1][13] = 0

 4742 20:15:19.274139  tx_first_pass[0][1][13] =  0

 4743 20:15:19.276618  tx_last_pass[0][1][13] =	0

 4744 20:15:19.280261  tx_win_center[0][1][14] = 0

 4745 20:15:19.283941  tx_first_pass[0][1][14] =  0

 4746 20:15:19.284459  tx_last_pass[0][1][14] =	0

 4747 20:15:19.286734  tx_win_center[0][1][15] = 0

 4748 20:15:19.289740  tx_first_pass[0][1][15] =  0

 4749 20:15:19.293636  tx_last_pass[0][1][15] =	0

 4750 20:15:19.294149  tx_win_center[1][0][0] = 0

 4751 20:15:19.296770  tx_first_pass[1][0][0] =  0

 4752 20:15:19.299894  tx_last_pass[1][0][0] =	0

 4753 20:15:19.300302  tx_win_center[1][0][1] = 0

 4754 20:15:19.303152  tx_first_pass[1][0][1] =  0

 4755 20:15:19.306541  tx_last_pass[1][0][1] =	0

 4756 20:15:19.309885  tx_win_center[1][0][2] = 0

 4757 20:15:19.310494  tx_first_pass[1][0][2] =  0

 4758 20:15:19.313081  tx_last_pass[1][0][2] =	0

 4759 20:15:19.316747  tx_win_center[1][0][3] = 0

 4760 20:15:19.319958  tx_first_pass[1][0][3] =  0

 4761 20:15:19.320362  tx_last_pass[1][0][3] =	0

 4762 20:15:19.323777  tx_win_center[1][0][4] = 0

 4763 20:15:19.326925  tx_first_pass[1][0][4] =  0

 4764 20:15:19.327336  tx_last_pass[1][0][4] =	0

 4765 20:15:19.329658  tx_win_center[1][0][5] = 0

 4766 20:15:19.333225  tx_first_pass[1][0][5] =  0

 4767 20:15:19.336458  tx_last_pass[1][0][5] =	0

 4768 20:15:19.336870  tx_win_center[1][0][6] = 0

 4769 20:15:19.339742  tx_first_pass[1][0][6] =  0

 4770 20:15:19.343078  tx_last_pass[1][0][6] =	0

 4771 20:15:19.343489  tx_win_center[1][0][7] = 0

 4772 20:15:19.347086  tx_first_pass[1][0][7] =  0

 4773 20:15:19.350124  tx_last_pass[1][0][7] =	0

 4774 20:15:19.353356  tx_win_center[1][0][8] = 0

 4775 20:15:19.353764  tx_first_pass[1][0][8] =  0

 4776 20:15:19.356282  tx_last_pass[1][0][8] =	0

 4777 20:15:19.359998  tx_win_center[1][0][9] = 0

 4778 20:15:19.363466  tx_first_pass[1][0][9] =  0

 4779 20:15:19.363932  tx_last_pass[1][0][9] =	0

 4780 20:15:19.366772  tx_win_center[1][0][10] = 0

 4781 20:15:19.369692  tx_first_pass[1][0][10] =  0

 4782 20:15:19.370101  tx_last_pass[1][0][10] =	0

 4783 20:15:19.373523  tx_win_center[1][0][11] = 0

 4784 20:15:19.376617  tx_first_pass[1][0][11] =  0

 4785 20:15:19.379867  tx_last_pass[1][0][11] =	0

 4786 20:15:19.380288  tx_win_center[1][0][12] = 0

 4787 20:15:19.383199  tx_first_pass[1][0][12] =  0

 4788 20:15:19.386603  tx_last_pass[1][0][12] =	0

 4789 20:15:19.390391  tx_win_center[1][0][13] = 0

 4790 20:15:19.390953  tx_first_pass[1][0][13] =  0

 4791 20:15:19.393373  tx_last_pass[1][0][13] =	0

 4792 20:15:19.397092  tx_win_center[1][0][14] = 0

 4793 20:15:19.400390  tx_first_pass[1][0][14] =  0

 4794 20:15:19.400803  tx_last_pass[1][0][14] =	0

 4795 20:15:19.403095  tx_win_center[1][0][15] = 0

 4796 20:15:19.406535  tx_first_pass[1][0][15] =  0

 4797 20:15:19.410016  tx_last_pass[1][0][15] =	0

 4798 20:15:19.410425  tx_win_center[1][1][0] = 0

 4799 20:15:19.413015  tx_first_pass[1][1][0] =  0

 4800 20:15:19.416489  tx_last_pass[1][1][0] =	0

 4801 20:15:19.419646  tx_win_center[1][1][1] = 0

 4802 20:15:19.420097  tx_first_pass[1][1][1] =  0

 4803 20:15:19.423440  tx_last_pass[1][1][1] =	0

 4804 20:15:19.426597  tx_win_center[1][1][2] = 0

 4805 20:15:19.430073  tx_first_pass[1][1][2] =  0

 4806 20:15:19.430614  tx_last_pass[1][1][2] =	0

 4807 20:15:19.433365  tx_win_center[1][1][3] = 0

 4808 20:15:19.436667  tx_first_pass[1][1][3] =  0

 4809 20:15:19.437075  tx_last_pass[1][1][3] =	0

 4810 20:15:19.440115  tx_win_center[1][1][4] = 0

 4811 20:15:19.443438  tx_first_pass[1][1][4] =  0

 4812 20:15:19.446459  tx_last_pass[1][1][4] =	0

 4813 20:15:19.446875  tx_win_center[1][1][5] = 0

 4814 20:15:19.449815  tx_first_pass[1][1][5] =  0

 4815 20:15:19.453386  tx_last_pass[1][1][5] =	0

 4816 20:15:19.453799  tx_win_center[1][1][6] = 0

 4817 20:15:19.456785  tx_first_pass[1][1][6] =  0

 4818 20:15:19.459801  tx_last_pass[1][1][6] =	0

 4819 20:15:19.463762  tx_win_center[1][1][7] = 0

 4820 20:15:19.464319  tx_first_pass[1][1][7] =  0

 4821 20:15:19.466327  tx_last_pass[1][1][7] =	0

 4822 20:15:19.470013  tx_win_center[1][1][8] = 0

 4823 20:15:19.473637  tx_first_pass[1][1][8] =  0

 4824 20:15:19.474127  tx_last_pass[1][1][8] =	0

 4825 20:15:19.476417  tx_win_center[1][1][9] = 0

 4826 20:15:19.479987  tx_first_pass[1][1][9] =  0

 4827 20:15:19.480404  tx_last_pass[1][1][9] =	0

 4828 20:15:19.483260  tx_win_center[1][1][10] = 0

 4829 20:15:19.486463  tx_first_pass[1][1][10] =  0

 4830 20:15:19.489902  tx_last_pass[1][1][10] =	0

 4831 20:15:19.490352  tx_win_center[1][1][11] = 0

 4832 20:15:19.493065  tx_first_pass[1][1][11] =  0

 4833 20:15:19.496662  tx_last_pass[1][1][11] =	0

 4834 20:15:19.499580  tx_win_center[1][1][12] = 0

 4835 20:15:19.503104  tx_first_pass[1][1][12] =  0

 4836 20:15:19.503526  tx_last_pass[1][1][12] =	0

 4837 20:15:19.506425  tx_win_center[1][1][13] = 0

 4838 20:15:19.509748  tx_first_pass[1][1][13] =  0

 4839 20:15:19.512855  tx_last_pass[1][1][13] =	0

 4840 20:15:19.513319  tx_win_center[1][1][14] = 0

 4841 20:15:19.516372  tx_first_pass[1][1][14] =  0

 4842 20:15:19.519915  tx_last_pass[1][1][14] =	0

 4843 20:15:19.520329  tx_win_center[1][1][15] = 0

 4844 20:15:19.523124  tx_first_pass[1][1][15] =  0

 4845 20:15:19.526646  tx_last_pass[1][1][15] =	0

 4846 20:15:19.529926  dump params rx window

 4847 20:15:19.530388  rx_firspass[0][0][0] = 0

 4848 20:15:19.533133  rx_lastpass[0][0][0] =  0

 4849 20:15:19.536732  rx_firspass[0][0][1] = 0

 4850 20:15:19.537233  rx_lastpass[0][0][1] =  0

 4851 20:15:19.539811  rx_firspass[0][0][2] = 0

 4852 20:15:19.543292  rx_lastpass[0][0][2] =  0

 4853 20:15:19.543704  rx_firspass[0][0][3] = 0

 4854 20:15:19.546709  rx_lastpass[0][0][3] =  0

 4855 20:15:19.549809  rx_firspass[0][0][4] = 0

 4856 20:15:19.550247  rx_lastpass[0][0][4] =  0

 4857 20:15:19.552925  rx_firspass[0][0][5] = 0

 4858 20:15:19.556436  rx_lastpass[0][0][5] =  0

 4859 20:15:19.559817  rx_firspass[0][0][6] = 0

 4860 20:15:19.560232  rx_lastpass[0][0][6] =  0

 4861 20:15:19.562997  rx_firspass[0][0][7] = 0

 4862 20:15:19.566217  rx_lastpass[0][0][7] =  0

 4863 20:15:19.566672  rx_firspass[0][0][8] = 0

 4864 20:15:19.569787  rx_lastpass[0][0][8] =  0

 4865 20:15:19.573202  rx_firspass[0][0][9] = 0

 4866 20:15:19.573644  rx_lastpass[0][0][9] =  0

 4867 20:15:19.576511  rx_firspass[0][0][10] = 0

 4868 20:15:19.579750  rx_lastpass[0][0][10] =  0

 4869 20:15:19.580164  rx_firspass[0][0][11] = 0

 4870 20:15:19.583347  rx_lastpass[0][0][11] =  0

 4871 20:15:19.586057  rx_firspass[0][0][12] = 0

 4872 20:15:19.589404  rx_lastpass[0][0][12] =  0

 4873 20:15:19.589882  rx_firspass[0][0][13] = 0

 4874 20:15:19.592960  rx_lastpass[0][0][13] =  0

 4875 20:15:19.596148  rx_firspass[0][0][14] = 0

 4876 20:15:19.596556  rx_lastpass[0][0][14] =  0

 4877 20:15:19.599561  rx_firspass[0][0][15] = 0

 4878 20:15:19.602669  rx_lastpass[0][0][15] =  0

 4879 20:15:19.606398  rx_firspass[0][1][0] = 0

 4880 20:15:19.606807  rx_lastpass[0][1][0] =  0

 4881 20:15:19.609725  rx_firspass[0][1][1] = 0

 4882 20:15:19.613304  rx_lastpass[0][1][1] =  0

 4883 20:15:19.613812  rx_firspass[0][1][2] = 0

 4884 20:15:19.616540  rx_lastpass[0][1][2] =  0

 4885 20:15:19.619640  rx_firspass[0][1][3] = 0

 4886 20:15:19.620143  rx_lastpass[0][1][3] =  0

 4887 20:15:19.623443  rx_firspass[0][1][4] = 0

 4888 20:15:19.626398  rx_lastpass[0][1][4] =  0

 4889 20:15:19.627020  rx_firspass[0][1][5] = 0

 4890 20:15:19.629375  rx_lastpass[0][1][5] =  0

 4891 20:15:19.632810  rx_firspass[0][1][6] = 0

 4892 20:15:19.632923  rx_lastpass[0][1][6] =  0

 4893 20:15:19.636224  rx_firspass[0][1][7] = 0

 4894 20:15:19.639399  rx_lastpass[0][1][7] =  0

 4895 20:15:19.639507  rx_firspass[0][1][8] = 0

 4896 20:15:19.642641  rx_lastpass[0][1][8] =  0

 4897 20:15:19.646101  rx_firspass[0][1][9] = 0

 4898 20:15:19.649162  rx_lastpass[0][1][9] =  0

 4899 20:15:19.649281  rx_firspass[0][1][10] = 0

 4900 20:15:19.652683  rx_lastpass[0][1][10] =  0

 4901 20:15:19.655845  rx_firspass[0][1][11] = 0

 4902 20:15:19.655944  rx_lastpass[0][1][11] =  0

 4903 20:15:19.659241  rx_firspass[0][1][12] = 0

 4904 20:15:19.662595  rx_lastpass[0][1][12] =  0

 4905 20:15:19.665716  rx_firspass[0][1][13] = 0

 4906 20:15:19.665791  rx_lastpass[0][1][13] =  0

 4907 20:15:19.669515  rx_firspass[0][1][14] = 0

 4908 20:15:19.672491  rx_lastpass[0][1][14] =  0

 4909 20:15:19.672653  rx_firspass[0][1][15] = 0

 4910 20:15:19.676246  rx_lastpass[0][1][15] =  0

 4911 20:15:19.678991  rx_firspass[1][0][0] = 0

 4912 20:15:19.679092  rx_lastpass[1][0][0] =  0

 4913 20:15:19.682749  rx_firspass[1][0][1] = 0

 4914 20:15:19.686732  rx_lastpass[1][0][1] =  0

 4915 20:15:19.686929  rx_firspass[1][0][2] = 0

 4916 20:15:19.689440  rx_lastpass[1][0][2] =  0

 4917 20:15:19.692634  rx_firspass[1][0][3] = 0

 4918 20:15:19.696028  rx_lastpass[1][0][3] =  0

 4919 20:15:19.696181  rx_firspass[1][0][4] = 0

 4920 20:15:19.699716  rx_lastpass[1][0][4] =  0

 4921 20:15:19.702719  rx_firspass[1][0][5] = 0

 4922 20:15:19.702945  rx_lastpass[1][0][5] =  0

 4923 20:15:19.706575  rx_firspass[1][0][6] = 0

 4924 20:15:19.709435  rx_lastpass[1][0][6] =  0

 4925 20:15:19.709626  rx_firspass[1][0][7] = 0

 4926 20:15:19.712933  rx_lastpass[1][0][7] =  0

 4927 20:15:19.716069  rx_firspass[1][0][8] = 0

 4928 20:15:19.716363  rx_lastpass[1][0][8] =  0

 4929 20:15:19.719695  rx_firspass[1][0][9] = 0

 4930 20:15:19.723103  rx_lastpass[1][0][9] =  0

 4931 20:15:19.723580  rx_firspass[1][0][10] = 0

 4932 20:15:19.726147  rx_lastpass[1][0][10] =  0

 4933 20:15:19.729854  rx_firspass[1][0][11] = 0

 4934 20:15:19.733735  rx_lastpass[1][0][11] =  0

 4935 20:15:19.734309  rx_firspass[1][0][12] = 0

 4936 20:15:19.736131  rx_lastpass[1][0][12] =  0

 4937 20:15:19.739530  rx_firspass[1][0][13] = 0

 4938 20:15:19.740066  rx_lastpass[1][0][13] =  0

 4939 20:15:19.743071  rx_firspass[1][0][14] = 0

 4940 20:15:19.746153  rx_lastpass[1][0][14] =  0

 4941 20:15:19.749654  rx_firspass[1][0][15] = 0

 4942 20:15:19.750118  rx_lastpass[1][0][15] =  0

 4943 20:15:19.752758  rx_firspass[1][1][0] = 0

 4944 20:15:19.756605  rx_lastpass[1][1][0] =  0

 4945 20:15:19.757146  rx_firspass[1][1][1] = 0

 4946 20:15:19.760065  rx_lastpass[1][1][1] =  0

 4947 20:15:19.762904  rx_firspass[1][1][2] = 0

 4948 20:15:19.763504  rx_lastpass[1][1][2] =  0

 4949 20:15:19.766558  rx_firspass[1][1][3] = 0

 4950 20:15:19.769783  rx_lastpass[1][1][3] =  0

 4951 20:15:19.770216  rx_firspass[1][1][4] = 0

 4952 20:15:19.772746  rx_lastpass[1][1][4] =  0

 4953 20:15:19.776286  rx_firspass[1][1][5] = 0

 4954 20:15:19.779545  rx_lastpass[1][1][5] =  0

 4955 20:15:19.780079  rx_firspass[1][1][6] = 0

 4956 20:15:19.782614  rx_lastpass[1][1][6] =  0

 4957 20:15:19.786119  rx_firspass[1][1][7] = 0

 4958 20:15:19.786719  rx_lastpass[1][1][7] =  0

 4959 20:15:19.789460  rx_firspass[1][1][8] = 0

 4960 20:15:19.792543  rx_lastpass[1][1][8] =  0

 4961 20:15:19.792956  rx_firspass[1][1][9] = 0

 4962 20:15:19.795940  rx_lastpass[1][1][9] =  0

 4963 20:15:19.799704  rx_firspass[1][1][10] = 0

 4964 20:15:19.802781  rx_lastpass[1][1][10] =  0

 4965 20:15:19.803196  rx_firspass[1][1][11] = 0

 4966 20:15:19.805974  rx_lastpass[1][1][11] =  0

 4967 20:15:19.809169  rx_firspass[1][1][12] = 0

 4968 20:15:19.809645  rx_lastpass[1][1][12] =  0

 4969 20:15:19.812593  rx_firspass[1][1][13] = 0

 4970 20:15:19.815787  rx_lastpass[1][1][13] =  0

 4971 20:15:19.818934  rx_firspass[1][1][14] = 0

 4972 20:15:19.819426  rx_lastpass[1][1][14] =  0

 4973 20:15:19.822440  rx_firspass[1][1][15] = 0

 4974 20:15:19.825798  rx_lastpass[1][1][15] =  0

 4975 20:15:19.826355  dump params clk_delay

 4976 20:15:19.828993  clk_delay[0] = 0

 4977 20:15:19.829593  clk_delay[1] = 0

 4978 20:15:19.832381  dump params dqs_delay

 4979 20:15:19.832825  dqs_delay[0][0] = 0

 4980 20:15:19.835920  dqs_delay[0][1] = 0

 4981 20:15:19.836498  dqs_delay[1][0] = 0

 4982 20:15:19.838961  dqs_delay[1][1] = 0

 4983 20:15:19.842787  dump params delay_cell_unit = 762

 4984 20:15:19.845859  mt_set_emi_preloader end

 4985 20:15:19.848965  [mt_mem_init] dram size: 0x100000000, rank number: 2 

 4986 20:15:19.852542  [complex_mem_test] start addr:0x40000000, len:20480

 4987 20:15:19.890146  [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0

 4988 20:15:19.896955  [complex_mem_test] start addr:0x80000000, len:20480

 4989 20:15:19.932319  [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0

 4990 20:15:19.939163  [complex_mem_test] start addr:0xc0000000, len:20480

 4991 20:15:19.974725  [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0

 4992 20:15:19.981650  [complex_mem_test] start addr:0x56000000, len:8192

 4993 20:15:19.998095  [MEM] 1st complex R/W mem test pass (start addr:0x56000000)

 4994 20:15:19.998558  ddr_geometry:1

 4995 20:15:20.004758  [complex_mem_test] start addr:0x80000000, len:8192

 4996 20:15:20.021850  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 4997 20:15:20.025152  dram_init: dram init end (result: 0)

 4998 20:15:20.031770  Successfully loaded DRAM blobs and ran DRAM calibration

 4999 20:15:20.042009  Mapping address range [0000000040000000:0000000140000000) as     cacheable | read-write | non-secure | normal

 5000 20:15:20.042506  CBMEM:

 5001 20:15:20.044956  IMD: root @ 00000000fffff000 254 entries.

 5002 20:15:20.048430  IMD: root @ 00000000ffffec00 62 entries.

 5003 20:15:20.055199  VBOOT: copying vboot_working_data (256 bytes) to CBMEM...

 5004 20:15:20.062072  out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 

 5005 20:15:20.065035  in-header: 03 a1 00 00 08 00 00 00 

 5006 20:15:20.068444  in-data: 84 60 60 10 00 00 00 00 

 5007 20:15:20.071843  Chrome EC: clear events_b mask to 0x0000000020004000

 5008 20:15:20.079209  out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 

 5009 20:15:20.082289  in-header: 03 fd 00 00 00 00 00 00 

 5010 20:15:20.082370  in-data: 

 5011 20:15:20.088780  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5012 20:15:20.088862  CBFS @ 21000 size 3d4000

 5013 20:15:20.095349  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5014 20:15:20.098980  CBFS: Locating 'fallback/ramstage'

 5015 20:15:20.102067  CBFS: Found @ offset 10d40 size d563

 5016 20:15:20.123527  read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps

 5017 20:15:20.135500  Accumulated console time in romstage 12752 ms

 5018 20:15:20.135582  

 5019 20:15:20.135645  

 5020 20:15:20.145703  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...

 5021 20:15:20.148827  ARM64: Exception handlers installed.

 5022 20:15:20.148909  ARM64: Testing exception

 5023 20:15:20.152090  ARM64: Done test exception

 5024 20:15:20.155623  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 5025 20:15:20.158623  Manufacturer: ef

 5026 20:15:20.161943  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

 5027 20:15:20.168706  WARNING: RO_VPD is uninitialized or empty.

 5028 20:15:20.172120  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5029 20:15:20.175077  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5030 20:15:20.185047  read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps

 5031 20:15:20.188558  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

 5032 20:15:20.195564  BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0

 5033 20:15:20.195646  Enumerating buses...

 5034 20:15:20.201575  Show all devs... Before device enumeration.

 5035 20:15:20.201682  Root Device: enabled 1

 5036 20:15:20.205355  CPU_CLUSTER: 0: enabled 1

 5037 20:15:20.205436  CPU: 00: enabled 1

 5038 20:15:20.208861  Compare with tree...

 5039 20:15:20.212262  Root Device: enabled 1

 5040 20:15:20.212343   CPU_CLUSTER: 0: enabled 1

 5041 20:15:20.215342    CPU: 00: enabled 1

 5042 20:15:20.218467  Root Device scanning...

 5043 20:15:20.218548  root_dev_scan_bus for Root Device

 5044 20:15:20.222020  CPU_CLUSTER: 0 enabled

 5045 20:15:20.224963  root_dev_scan_bus for Root Device done

 5046 20:15:20.231655  scan_bus: scanning of bus Root Device took 10689 usecs

 5047 20:15:20.231736  done

 5048 20:15:20.235042  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0

 5049 20:15:20.238620  Allocating resources...

 5050 20:15:20.238700  Reading resources...

 5051 20:15:20.241520  Root Device read_resources bus 0 link: 0

 5052 20:15:20.248330  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 5053 20:15:20.248411  CPU: 00 missing read_resources

 5054 20:15:20.255155  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 5055 20:15:20.258270  Root Device read_resources bus 0 link: 0 done

 5056 20:15:20.261890  Done reading resources.

 5057 20:15:20.264874  Show resources in subtree (Root Device)...After reading.

 5058 20:15:20.268674   Root Device child on link 0 CPU_CLUSTER: 0

 5059 20:15:20.271905    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5060 20:15:20.281821    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5061 20:15:20.281993     CPU: 00

 5062 20:15:20.284987  Setting resources...

 5063 20:15:20.288704  Root Device assign_resources, bus 0 link: 0

 5064 20:15:20.291599  CPU_CLUSTER: 0 missing set_resources

 5065 20:15:20.294884  Root Device assign_resources, bus 0 link: 0

 5066 20:15:20.298414  Done setting resources.

 5067 20:15:20.304881  Show resources in subtree (Root Device)...After assigning values.

 5068 20:15:20.308282   Root Device child on link 0 CPU_CLUSTER: 0

 5069 20:15:20.311377    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5070 20:15:20.321763    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5071 20:15:20.322067     CPU: 00

 5072 20:15:20.325506  Done allocating resources.

 5073 20:15:20.328520  BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0

 5074 20:15:20.331522  Enabling resources...

 5075 20:15:20.331936  done.

 5076 20:15:20.335001  BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0

 5077 20:15:20.338161  Initializing devices...

 5078 20:15:20.338576  Root Device init ...

 5079 20:15:20.341540  mainboard_init: Starting display init.

 5080 20:15:20.344844  ADC[4]: Raw value=76850 ID=0

 5081 20:15:20.368497  anx7625_power_on_init: Init interface.

 5082 20:15:20.371978  anx7625_disable_pd_protocol: Disabled PD feature.

 5083 20:15:20.378476  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 5084 20:15:20.425076  anx7625_start_dp_work: Secure OCM version=00

 5085 20:15:20.428455  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 5086 20:15:20.445443  sp_tx_get_edid_block: EDID Block = 1

 5087 20:15:20.563071  Extracted contents:

 5088 20:15:20.566129  header:          00 ff ff ff ff ff ff 00

 5089 20:15:20.569567  serial number:   06 af 5c 14 00 00 00 00 00 1a

 5090 20:15:20.572895  version:         01 04

 5091 20:15:20.575794  basic params:    95 1a 0e 78 02

 5092 20:15:20.579162  chroma info:     99 85 95 55 56 92 28 22 50 54

 5093 20:15:20.582369  established:     00 00 00

 5094 20:15:20.589176  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 5095 20:15:20.592377  descriptor 1:    ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18

 5096 20:15:20.599284  descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20

 5097 20:15:20.606286  descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20

 5098 20:15:20.612429  descriptor 4:    00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a

 5099 20:15:20.615744  extensions:      00

 5100 20:15:20.616161  checksum:        ae

 5101 20:15:20.616546  

 5102 20:15:20.619308  Manufacturer: AUO Model 145c Serial Number 0

 5103 20:15:20.622269  Made week 0 of 2016

 5104 20:15:20.622684  EDID version: 1.4

 5105 20:15:20.625726  Digital display

 5106 20:15:20.629252  6 bits per primary color channel

 5107 20:15:20.629714  DisplayPort interface

 5108 20:15:20.632305  Maximum image size: 26 cm x 14 cm

 5109 20:15:20.635728  Gamma: 220%

 5110 20:15:20.636167  Check DPMS levels

 5111 20:15:20.639093  Supported color formats: RGB 4:4:4

 5112 20:15:20.642557  First detailed timing is preferred timing

 5113 20:15:20.645751  Established timings supported:

 5114 20:15:20.649151  Standard timings supported:

 5115 20:15:20.649623  Detailed timings

 5116 20:15:20.656006  Hex of detail: ce1d56ea50001a3030204600009010000018

 5117 20:15:20.659502  Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm

 5118 20:15:20.662797                 0556 0586 05a6 0640 hborder 0

 5119 20:15:20.665539                 0300 0304 030a 031a vborder 0

 5120 20:15:20.668975                 -hsync -vsync 

 5121 20:15:20.672437  Did detailed timing

 5122 20:15:20.675561  Hex of detail: 0000000f0000000000000000000000000020

 5123 20:15:20.679011  Manufacturer-specified data, tag 15

 5124 20:15:20.682369  Hex of detail: 000000fe0041554f0a202020202020202020

 5125 20:15:20.685795  ASCII string: AUO

 5126 20:15:20.689390  Hex of detail: 000000fe004231313658414230312e34200a

 5127 20:15:20.692432  ASCII string: B116XAB01.4 

 5128 20:15:20.693167  Checksum

 5129 20:15:20.695725  Checksum: 0xae (valid)

 5130 20:15:20.702300  get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz

 5131 20:15:20.702719  DSI data_rate: 457800000 bps

 5132 20:15:20.709748  anx7625_parse_edid: set default k value to 0x3d for panel

 5133 20:15:20.713305  anx7625_parse_edid: pixelclock(76300).

 5134 20:15:20.716490   hactive(1366), hsync(32), hfp(48), hbp(154)

 5135 20:15:20.719867   vactive(768), vsync(6), vfp(4), vbp(16)

 5136 20:15:20.723072  anx7625_dsi_config: config dsi.

 5137 20:15:20.731284  anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).

 5138 20:15:20.751783  anx7625_dsi_config: success to config DSI

 5139 20:15:20.755196  anx7625_dp_start: MIPI phy setup OK.

 5140 20:15:20.758680  [SSUSB] Setting up USB HOST controller...

 5141 20:15:20.761762  [SSUSB] u3phy_ports_enable u2p:1, u3p:0

 5142 20:15:20.764951  [SSUSB] phy power-on done.

 5143 20:15:20.769080  out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 

 5144 20:15:20.772841  in-header: 03 fc 01 00 00 00 00 00 

 5145 20:15:20.773288  in-data: 

 5146 20:15:20.775820  handle_proto3_response: EC response with error code: 1

 5147 20:15:20.779270  SPM: pcm index = 1

 5148 20:15:20.782324  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5149 20:15:20.785684  CBFS @ 21000 size 3d4000

 5150 20:15:20.792241  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5151 20:15:20.795890  CBFS: Locating 'pcm_allinone_lp4_3200.bin'

 5152 20:15:20.799034  CBFS: Found @ offset 1e7c0 size 1026

 5153 20:15:20.805816  read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps

 5154 20:15:20.809366  SPM: binary array size = 2988

 5155 20:15:20.812449  SPM: version = pcm_allinone_v1.17.2_20180829

 5156 20:15:20.815495  SPM binary loaded in 32 msecs

 5157 20:15:20.823131  spm_kick_im_to_fetch: ptr = 000000004021eec2

 5158 20:15:20.826498  spm_kick_im_to_fetch: len = 2988

 5159 20:15:20.826942  SPM: spm_kick_pcm_to_run

 5160 20:15:20.829717  SPM: spm_kick_pcm_to_run done

 5161 20:15:20.833160  SPM: spm_init done in 52 msecs

 5162 20:15:20.836657  Root Device init finished in 494996 usecs

 5163 20:15:20.839704  CPU_CLUSTER: 0 init ...

 5164 20:15:20.849837  Mapping address range [0000000000200000:0000000000280000) as     cacheable | read-write |     secure | device

 5165 20:15:20.853481  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5166 20:15:20.856601  CBFS @ 21000 size 3d4000

 5167 20:15:20.859808  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5168 20:15:20.863150  CBFS: Locating 'sspm.bin'

 5169 20:15:20.866339  CBFS: Found @ offset 208c0 size 41cb

 5170 20:15:20.876037  read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps

 5171 20:15:20.884558  CPU_CLUSTER: 0 init finished in 42799 usecs

 5172 20:15:20.884995  Devices initialized

 5173 20:15:20.887831  Show all devs... After init.

 5174 20:15:20.890948  Root Device: enabled 1

 5175 20:15:20.891362  CPU_CLUSTER: 0: enabled 1

 5176 20:15:20.894619  CPU: 00: enabled 1

 5177 20:15:20.897838  BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0

 5178 20:15:20.900798  FMAP: area RW_ELOG found @ 558000 (4096 bytes)

 5179 20:15:20.904285  ELOG: NV offset 0x558000 size 0x1000

 5180 20:15:20.911621  read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps

 5181 20:15:20.918751  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 5182 20:15:20.921785  ELOG: Event(17) added with size 13 at 2024-05-28 20:15:20 UTC

 5183 20:15:20.925137  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 5184 20:15:20.928403  in-header: 03 34 00 00 2c 00 00 00 

 5185 20:15:20.941582  in-data: c6 47 00 00 00 00 00 00 02 10 00 00 06 80 00 00 76 27 01 00 06 80 00 00 fb 6d 02 00 06 80 00 00 db 0f 01 00 06 80 00 00 42 2f 02 00 

 5186 20:15:20.944951  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

 5187 20:15:20.948195  in-header: 03 19 00 00 08 00 00 00 

 5188 20:15:20.951854  in-data: a2 e0 47 00 13 00 00 00 

 5189 20:15:20.954653  Chrome EC: UHEPI supported

 5190 20:15:20.961110  out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 

 5191 20:15:20.965206  in-header: 03 e1 00 00 08 00 00 00 

 5192 20:15:20.968425  in-data: 84 20 60 10 00 00 00 00 

 5193 20:15:20.971300  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

 5194 20:15:20.978230  out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 

 5195 20:15:20.981845  in-header: 03 e1 00 00 08 00 00 00 

 5196 20:15:20.984996  in-data: 84 20 60 10 00 00 00 00 

 5197 20:15:20.991904  ELOG: Event(A1) added with size 10 at 2024-05-28 20:15:20 UTC

 5198 20:15:20.997996  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 5199 20:15:21.001577  ELOG: Event(A0) added with size 9 at 2024-05-28 20:15:20 UTC

 5200 20:15:21.008168  elog_add_boot_reason: Logged dev mode boot

 5201 20:15:21.008464  Finalize devices...

 5202 20:15:21.011580  Devices finalized

 5203 20:15:21.015070  BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0

 5204 20:15:21.018401  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 5205 20:15:21.025298  ELOG: Event(91) added with size 10 at 2024-05-28 20:15:20 UTC

 5206 20:15:21.028036  Writing coreboot table at 0xffeda000

 5207 20:15:21.031711   0. 0000000000114000-000000000011efff: RAMSTAGE

 5208 20:15:21.038750   1. 0000000040000000-000000004023cfff: RAMSTAGE

 5209 20:15:21.041615   2. 000000004023d000-00000000545fffff: RAM

 5210 20:15:21.044920   3. 0000000054600000-000000005465ffff: BL31

 5211 20:15:21.048388   4. 0000000054660000-00000000ffed9fff: RAM

 5212 20:15:21.054788   5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES

 5213 20:15:21.058539   6. 0000000100000000-000000013fffffff: RAM

 5214 20:15:21.061845  Passing 5 GPIOs to payload:

 5215 20:15:21.065006              NAME |       PORT | POLARITY |     VALUE

 5216 20:15:21.068390     write protect | 0x00000096 |      low |      high

 5217 20:15:21.075231          EC in RW | 0x000000b1 |     high | undefined

 5218 20:15:21.078529      EC interrupt | 0x00000097 |      low | undefined

 5219 20:15:21.084862     TPM interrupt | 0x00000099 |     high | undefined

 5220 20:15:21.088091    speaker enable | 0x000000af |     high | undefined

 5221 20:15:21.091533  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 5222 20:15:21.094900  in-header: 03 f7 00 00 02 00 00 00 

 5223 20:15:21.095488  in-data: 04 00 

 5224 20:15:21.098151  Board ID: 4

 5225 20:15:21.101375  ADC[3]: Raw value=1034629 ID=8

 5226 20:15:21.101905  RAM code: 8

 5227 20:15:21.102416  SKU ID: 16

 5228 20:15:21.108036  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5229 20:15:21.108603  CBFS @ 21000 size 3d4000

 5230 20:15:21.114786  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5231 20:15:21.121528  Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum ad5f

 5232 20:15:21.121946  coreboot table: 940 bytes.

 5233 20:15:21.124897  IMD ROOT    0. 00000000fffff000 00001000

 5234 20:15:21.131479  IMD SMALL   1. 00000000ffffe000 00001000

 5235 20:15:21.134711  CONSOLE     2. 00000000fffde000 00020000

 5236 20:15:21.138113  FMAP        3. 00000000fffdd000 0000047c

 5237 20:15:21.141381  TIME STAMP  4. 00000000fffdc000 00000910

 5238 20:15:21.144977  RAMOOPS     5. 00000000ffedc000 00100000

 5239 20:15:21.148285  COREBOOT    6. 00000000ffeda000 00002000

 5240 20:15:21.151697  IMD small region:

 5241 20:15:21.154558    IMD ROOT    0. 00000000ffffec00 00000400

 5242 20:15:21.157802    VBOOT WORK  1. 00000000ffffeb00 00000100

 5243 20:15:21.161711    EC HOSTEVENT 2. 00000000ffffeae0 00000008

 5244 20:15:21.164737    VPD         3. 00000000ffffea60 0000006c

 5245 20:15:21.167981  BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0

 5246 20:15:21.174806  out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 

 5247 20:15:21.178324  in-header: 03 e1 00 00 08 00 00 00 

 5248 20:15:21.181768  in-data: 84 20 60 10 00 00 00 00 

 5249 20:15:21.188389  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5250 20:15:21.188847  CBFS @ 21000 size 3d4000

 5251 20:15:21.194750  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5252 20:15:21.198190  CBFS: Locating 'fallback/payload'

 5253 20:15:21.206098  CBFS: Found @ offset dc040 size 439a0

 5254 20:15:21.293908  read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps

 5255 20:15:21.297361  Checking segment from ROM address 0x0000000040003a00

 5256 20:15:21.303839  Checking segment from ROM address 0x0000000040003a1c

 5257 20:15:21.307078  Loading segment from ROM address 0x0000000040003a00

 5258 20:15:21.310459    code (compression=0)

 5259 20:15:21.320297    New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968

 5260 20:15:21.327400  Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968

 5261 20:15:21.330864  it's not compressed!

 5262 20:15:21.333796  [ 0x80000000, 80043968, 0x811994a0) <- 40003a38

 5263 20:15:21.340353  Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38

 5264 20:15:21.348300  Loading segment from ROM address 0x0000000040003a1c

 5265 20:15:21.351279    Entry Point 0x0000000080000000

 5266 20:15:21.351726  Loaded segments

 5267 20:15:21.358043  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0

 5268 20:15:21.361405  Jumping to boot code at 0000000080000000(00000000ffeda000)

 5269 20:15:21.371560  CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes

 5270 20:15:21.375183  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5271 20:15:21.378375  CBFS @ 21000 size 3d4000

 5272 20:15:21.384600  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5273 20:15:21.388131  CBFS: Locating 'fallback/bl31'

 5274 20:15:21.391276  CBFS: Found @ offset 36dc0 size 5820

 5275 20:15:21.402220  read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps

 5276 20:15:21.405236  Checking segment from ROM address 0x0000000040003a00

 5277 20:15:21.412113  Checking segment from ROM address 0x0000000040003a1c

 5278 20:15:21.415409  Loading segment from ROM address 0x0000000040003a00

 5279 20:15:21.418655    code (compression=1)

 5280 20:15:21.425335    New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8

 5281 20:15:21.435316  Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8

 5282 20:15:21.435750  using LZMA

 5283 20:15:21.444228  [ 0x54600000, 5460f420, 0x54629000) <- 40003a38

 5284 20:15:21.450442  Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0

 5285 20:15:21.454066  Loading segment from ROM address 0x0000000040003a1c

 5286 20:15:21.457591    Entry Point 0x0000000054601000

 5287 20:15:21.458002  Loaded segments

 5288 20:15:21.460953  NOTICE:  MT8183 bl31_setup

 5289 20:15:21.467450  NOTICE:  BL31: v2.1(debug):v2.1-806-g3addeb68c

 5290 20:15:21.471435  NOTICE:  BL31: Built : Sun Jan 30 03:25:20 UTC 2022

 5291 20:15:21.474351  INFO:    [DEVAPC] dump DEVAPC registers:

 5292 20:15:21.483884  INFO:    [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0

 5293 20:15:21.490794  INFO:    [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0

 5294 20:15:21.501325  INFO:    [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0

 5295 20:15:21.508072  INFO:    [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0

 5296 20:15:21.518244  INFO:    [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0

 5297 20:15:21.524578  INFO:    [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0

 5298 20:15:21.534463  INFO:    [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0

 5299 20:15:21.540897  INFO:    [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0

 5300 20:15:21.547342  INFO:    [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0

 5301 20:15:21.557236  INFO:    [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0

 5302 20:15:21.563831  INFO:    [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0

 5303 20:15:21.573978  INFO:    [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0

 5304 20:15:21.580451  INFO:    [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0

 5305 20:15:21.587350  INFO:    [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0

 5306 20:15:21.597417  INFO:    [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0

 5307 20:15:21.604195  INFO:    [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0

 5308 20:15:21.610918  INFO:    [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0

 5309 20:15:21.617352  INFO:    [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0

 5310 20:15:21.627452  INFO:    [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0

 5311 20:15:21.634134  INFO:    [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0

 5312 20:15:21.641321  INFO:    [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0

 5313 20:15:21.647252  INFO:    [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0

 5314 20:15:21.650322  INFO:    [DEVAPC] MAS_DOM_0 = 0x1

 5315 20:15:21.653837  INFO:    [DEVAPC] MAS_DOM_1 = 0x200

 5316 20:15:21.657357  INFO:    [DEVAPC] MAS_DOM_2 = 0x0

 5317 20:15:21.660118  INFO:    [DEVAPC] MAS_DOM_3 = 0x2000

 5318 20:15:21.663747  INFO:    [DEVAPC] MAS_SEC_0 = 0x8000000

 5319 20:15:21.670590  INFO:    [DEVAPC]  (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0

 5320 20:15:21.674031  INFO:    [DEVAPC]  (MM)MAS_DOMAIN_REMAP_0 = 0x24

 5321 20:15:21.677096  WARNING: region 0:

 5322 20:15:21.680206  WARNING: 	apc:0x168, sa:0x0, ea:0xfff

 5323 20:15:21.683534  WARNING: region 1:

 5324 20:15:21.686750  WARNING: 	apc:0x140, sa:0x1000, ea:0x128f

 5325 20:15:21.687330  WARNING: region 2:

 5326 20:15:21.690171  WARNING: 	apc:0x168, sa:0x1290, ea:0x1fff

 5327 20:15:21.693435  WARNING: region 3:

 5328 20:15:21.696517  WARNING: 	apc:0x168, sa:0x2000, ea:0xbfff

 5329 20:15:21.696977  WARNING: region 4:

 5330 20:15:21.703668  WARNING: 	apc:0x168, sa:0xc000, ea:0x1ffff

 5331 20:15:21.704094  WARNING: region 5:

 5332 20:15:21.707289  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5333 20:15:21.709912  WARNING: region 6:

 5334 20:15:21.710455  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5335 20:15:21.713420  WARNING: region 7:

 5336 20:15:21.716818  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5337 20:15:21.723604  INFO:    GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3

 5338 20:15:21.726823  INFO:    SPM: enable SPMC mode

 5339 20:15:21.730515  NOTICE:  spm_boot_init() start

 5340 20:15:21.730959  NOTICE:  spm_boot_init() end

 5341 20:15:21.736799  INFO:    BL31: Initializing runtime services

 5342 20:15:21.740307  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied

 5343 20:15:21.747269  INFO:    BL31: Preparing for EL3 exit to normal world

 5344 20:15:21.750246  INFO:    Entry point address = 0x80000000

 5345 20:15:21.750747  INFO:    SPSR = 0x8

 5346 20:15:21.773992  

 5347 20:15:21.774432  

 5348 20:15:21.774862  

 5349 20:15:21.776711  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 5350 20:15:21.777461  start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
 5351 20:15:21.777917  Setting prompt string to ['jacuzzi:']
 5352 20:15:21.778337  bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
 5353 20:15:21.778981  Starting depthcharge on Juniper...

 5354 20:15:21.779324  

 5355 20:15:21.780779  vboot_handoff: creating legacy vboot_handoff structure

 5356 20:15:21.781190  

 5357 20:15:21.784131  ec_init(0): CrosEC protocol v3 supported (544, 544)

 5358 20:15:21.784540  

 5359 20:15:21.787801  Wipe memory regions:

 5360 20:15:21.788252  

 5361 20:15:21.790444  	[0x00000040000000, 0x00000054600000)

 5362 20:15:21.833294  

 5363 20:15:21.833598  	[0x00000054660000, 0x00000080000000)

 5364 20:15:21.925235  

 5365 20:15:21.925778  	[0x000000811994a0, 0x000000ffeda000)

 5366 20:15:22.185137  

 5367 20:15:22.185683  	[0x00000100000000, 0x00000140000000)

 5368 20:15:22.317653  

 5369 20:15:22.320854  Initializing XHCI USB controller at 0x11200000.

 5370 20:15:22.343792  

 5371 20:15:22.347455  [firmware-jacuzzi-12573.B-collabora] Jun  8 2022 08:18:54

 5372 20:15:22.347992  

 5373 20:15:22.348337  


 5374 20:15:22.349112  Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5376 20:15:22.450245  jacuzzi: tftpboot 192.168.201.1 14063130/tftp-deploy-wlzgvhaf/kernel/image.itb 14063130/tftp-deploy-wlzgvhaf/kernel/cmdline 

 5377 20:15:22.450833  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5378 20:15:22.451220  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
 5379 20:15:22.455883  tftpboot 192.168.201.1 14063130/tftp-deploy-wlzgvhaf/kernel/image.ittp-deploy-wlzgvhaf/kernel/cmdline 

 5380 20:15:22.456312  

 5381 20:15:22.456656  Waiting for link

 5382 20:15:22.858322  

 5383 20:15:22.858846  R8152: Initializing

 5384 20:15:22.859184  

 5385 20:15:22.861615  Version 9 (ocp_data = 6010)

 5386 20:15:22.862124  

 5387 20:15:22.865117  R8152: Done initializing

 5388 20:15:22.865667  

 5389 20:15:22.866002  Adding net device

 5390 20:15:23.249969  

 5391 20:15:23.250459  done.

 5392 20:15:23.250791  

 5393 20:15:23.251103  MAC: 00:e0:4c:71:a7:1f

 5394 20:15:23.251406  

 5395 20:15:23.253685  Sending DHCP discover... done.

 5396 20:15:23.254105  

 5397 20:15:23.257839  Waiting for reply... done.

 5398 20:15:23.258263  

 5399 20:15:23.260221  Sending DHCP request... done.

 5400 20:15:23.260641  

 5401 20:15:23.263971  Waiting for reply... done.

 5402 20:15:23.264456  

 5403 20:15:23.264788  My ip is 192.168.201.23

 5404 20:15:23.265094  

 5405 20:15:23.267461  The DHCP server ip is 192.168.201.1

 5406 20:15:23.267888  

 5407 20:15:23.273883  TFTP server IP predefined by user: 192.168.201.1

 5408 20:15:23.274299  

 5409 20:15:23.280615  Bootfile predefined by user: 14063130/tftp-deploy-wlzgvhaf/kernel/image.itb

 5410 20:15:23.281035  

 5411 20:15:23.281409  Sending tftp read request... done.

 5412 20:15:23.283746  

 5413 20:15:23.290221  Waiting for the transfer... 

 5414 20:15:23.290638  

 5415 20:15:23.561141  00000000 ################################################################

 5416 20:15:23.561341  

 5417 20:15:23.811444  00080000 ################################################################

 5418 20:15:23.811580  

 5419 20:15:24.067940  00100000 ################################################################

 5420 20:15:24.068086  

 5421 20:15:24.318415  00180000 ################################################################

 5422 20:15:24.318558  

 5423 20:15:24.569698  00200000 ################################################################

 5424 20:15:24.569835  

 5425 20:15:24.825676  00280000 ################################################################

 5426 20:15:24.825820  

 5427 20:15:25.081036  00300000 ################################################################

 5428 20:15:25.081178  

 5429 20:15:25.336349  00380000 ################################################################

 5430 20:15:25.336485  

 5431 20:15:25.612744  00400000 ################################################################

 5432 20:15:25.612881  

 5433 20:15:25.867820  00480000 ################################################################

 5434 20:15:25.867954  

 5435 20:15:26.124657  00500000 ################################################################

 5436 20:15:26.124793  

 5437 20:15:26.386603  00580000 ################################################################

 5438 20:15:26.386801  

 5439 20:15:26.645132  00600000 ################################################################

 5440 20:15:26.645331  

 5441 20:15:26.930631  00680000 ################################################################

 5442 20:15:26.930815  

 5443 20:15:27.179114  00700000 ################################################################

 5444 20:15:27.179248  

 5445 20:15:27.518761  00780000 ################################################################

 5446 20:15:27.518908  

 5447 20:15:27.799623  00800000 ################################################################

 5448 20:15:27.799767  

 5449 20:15:28.064078  00880000 ################################################################

 5450 20:15:28.064222  

 5451 20:15:28.317522  00900000 ################################################################

 5452 20:15:28.317736  

 5453 20:15:28.573011  00980000 ################################################################

 5454 20:15:28.573159  

 5455 20:15:28.841499  00a00000 ################################################################

 5456 20:15:28.841679  

 5457 20:15:29.147733  00a80000 ################################################################

 5458 20:15:29.147879  

 5459 20:15:29.471375  00b00000 ################################################################

 5460 20:15:29.471547  

 5461 20:15:29.758379  00b80000 ################################################################

 5462 20:15:29.758545  

 5463 20:15:30.035390  00c00000 ################################################################

 5464 20:15:30.035541  

 5465 20:15:30.313392  00c80000 ################################################################

 5466 20:15:30.313545  

 5467 20:15:30.573451  00d00000 ################################################################

 5468 20:15:30.573601  

 5469 20:15:30.848835  00d80000 ################################################################

 5470 20:15:30.848999  

 5471 20:15:31.173135  00e00000 ################################################################

 5472 20:15:31.173331  

 5473 20:15:31.468158  00e80000 ################################################################

 5474 20:15:31.468331  

 5475 20:15:31.765199  00f00000 ################################################################

 5476 20:15:31.765378  

 5477 20:15:32.050069  00f80000 ################################################################

 5478 20:15:32.050240  

 5479 20:15:32.330897  01000000 ################################################################

 5480 20:15:32.331061  

 5481 20:15:32.601347  01080000 ################################################################

 5482 20:15:32.601497  

 5483 20:15:32.873236  01100000 ################################################################

 5484 20:15:32.873425  

 5485 20:15:33.164978  01180000 ################################################################

 5486 20:15:33.165131  

 5487 20:15:33.483259  01200000 ################################################################

 5488 20:15:33.483414  

 5489 20:15:33.799055  01280000 ################################################################

 5490 20:15:33.799221  

 5491 20:15:34.096008  01300000 ################################################################

 5492 20:15:34.096160  

 5493 20:15:34.394540  01380000 ################################################################

 5494 20:15:34.394689  

 5495 20:15:34.694191  01400000 ################################################################

 5496 20:15:34.694337  

 5497 20:15:34.979832  01480000 ################################################################

 5498 20:15:34.980001  

 5499 20:15:35.277124  01500000 ################################################################

 5500 20:15:35.277313  

 5501 20:15:35.589307  01580000 ################################################################

 5502 20:15:35.589453  

 5503 20:15:35.905328  01600000 ################################################################

 5504 20:15:35.905505  

 5505 20:15:36.169718  01680000 ################################################################

 5506 20:15:36.169871  

 5507 20:15:36.430174  01700000 ################################################################

 5508 20:15:36.430327  

 5509 20:15:36.701233  01780000 ################################################################

 5510 20:15:36.701421  

 5511 20:15:36.965463  01800000 ################################################################

 5512 20:15:36.965610  

 5513 20:15:37.229925  01880000 ################################################################

 5514 20:15:37.230074  

 5515 20:15:37.486804  01900000 ################################################################

 5516 20:15:37.486973  

 5517 20:15:37.744774  01980000 ################################################################

 5518 20:15:37.744941  

 5519 20:15:38.009978  01a00000 ################################################################

 5520 20:15:38.010150  

 5521 20:15:38.263784  01a80000 ################################################################

 5522 20:15:38.263922  

 5523 20:15:38.524663  01b00000 ################################################################

 5524 20:15:38.524864  

 5525 20:15:38.794095  01b80000 ################################################################

 5526 20:15:38.794241  

 5527 20:15:39.058004  01c00000 ################################################################

 5528 20:15:39.058147  

 5529 20:15:39.311304  01c80000 ################################################################

 5530 20:15:39.311453  

 5531 20:15:39.577153  01d00000 ################################################################

 5532 20:15:39.577337  

 5533 20:15:39.829381  01d80000 ################################################################

 5534 20:15:39.829529  

 5535 20:15:40.013892  01e00000 ################################################ done.

 5536 20:15:40.014082  

 5537 20:15:40.017085  The bootfile was 31844790 bytes long.

 5538 20:15:40.017167  

 5539 20:15:40.020738  Sending tftp read request... done.

 5540 20:15:40.020822  

 5541 20:15:40.023954  Waiting for the transfer... 

 5542 20:15:40.024036  

 5543 20:15:40.024100  00000000 # done.

 5544 20:15:40.024165  

 5545 20:15:40.034369  Command line loaded dynamically from TFTP file: 14063130/tftp-deploy-wlzgvhaf/kernel/cmdline

 5546 20:15:40.034453  

 5547 20:15:40.057041  The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 5548 20:15:40.057141  

 5549 20:15:40.060440  Loading FIT.

 5550 20:15:40.060533  

 5551 20:15:40.063825  Image ramdisk-1 has 18723743 bytes.

 5552 20:15:40.063927  

 5553 20:15:40.064006  Image fdt-1 has 57695 bytes.

 5554 20:15:40.064080  

 5555 20:15:40.066886  Image kernel-1 has 13061303 bytes.

 5556 20:15:40.066996  

 5557 20:15:40.077200  Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper

 5558 20:15:40.077365  

 5559 20:15:40.090153  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183

 5560 20:15:40.090579  

 5561 20:15:40.093623  Choosing best match conf-1 for compat google,juniper-sku16.

 5562 20:15:40.099113  

 5563 20:15:40.103625  Connected to device vid:did:rid of 1ae0:0028:00

 5564 20:15:40.110507  

 5565 20:15:40.113372  tpm_get_response: command 0x17b, return code 0x0

 5566 20:15:40.113795  

 5567 20:15:40.116673  tpm_cleanup: add release locality here.

 5568 20:15:40.117091  

 5569 20:15:40.120335  Shutting down all USB controllers.

 5570 20:15:40.120751  

 5571 20:15:40.123532  Removing current net device

 5572 20:15:40.123953  

 5573 20:15:40.127245  Exiting depthcharge with code 4 at timestamp: 34646948

 5574 20:15:40.127666  

 5575 20:15:40.130877  LZMA decompressing kernel-1 to 0x80193568

 5576 20:15:40.131294  

 5577 20:15:40.136739  LZMA decompressing kernel-1 to 0x40000000

 5578 20:15:41.994216  

 5579 20:15:41.994836  jumping to kernel

 5580 20:15:41.996591  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 5581 20:15:41.997074  start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
 5582 20:15:41.997536  Setting prompt string to ['Linux version [0-9]']
 5583 20:15:41.997962  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5584 20:15:41.998316  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 5585 20:15:42.069112  

 5586 20:15:42.072395  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

 5587 20:15:42.076891  start: 2.2.5.1 login-action (timeout 00:04:05) [common]
 5588 20:15:42.077597  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
 5589 20:15:42.077979  Setting prompt string to []
 5590 20:15:42.078357  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
 5591 20:15:42.078714  Using line separator: #'\n'#
 5592 20:15:42.079022  No login prompt set.
 5593 20:15:42.079487  Parsing kernel messages
 5594 20:15:42.079787  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
 5595 20:15:42.080383  [login-action] Waiting for messages, (timeout 00:04:05)
 5596 20:15:42.080723  Waiting using forced prompt support (timeout 00:02:03)
 5597 20:15:42.096033  [    0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j208563-arm64-gcc-10-defconfig-arm64-chromebook-j5dkg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024

 5598 20:15:42.098996  [    0.000000] random: crng init done

 5599 20:15:42.105997  [    0.000000] Machine model: Google juniper sku16 board

 5600 20:15:42.109420  [    0.000000] efi: UEFI not found.

 5601 20:15:42.115835  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

 5602 20:15:42.122234  [    0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool

 5603 20:15:42.132181  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

 5604 20:15:42.135408  [    0.000000] printk: bootconsole [mtk8250] enabled

 5605 20:15:42.144283  [    0.000000] NUMA: No NUMA configuration found

 5606 20:15:42.150948  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]

 5607 20:15:42.157604  [    0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]

 5608 20:15:42.158024  [    0.000000] Zone ranges:

 5609 20:15:42.164082  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

 5610 20:15:42.167406  [    0.000000]   DMA32    empty

 5611 20:15:42.174420  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]

 5612 20:15:42.177167  [    0.000000] Movable zone start for each node

 5613 20:15:42.180868  [    0.000000] Early memory node ranges

 5614 20:15:42.187407  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

 5615 20:15:42.193918  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

 5616 20:15:42.200810  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

 5617 20:15:42.207218  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

 5618 20:15:42.213690  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000013fffffff]

 5619 20:15:42.220365  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]

 5620 20:15:42.236471  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

 5621 20:15:42.243062  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

 5622 20:15:42.249987  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

 5623 20:15:42.253522  [    0.000000] psci: probing for conduit method from DT.

 5624 20:15:42.260203  [    0.000000] psci: PSCIv1.1 detected in firmware.

 5625 20:15:42.263334  [    0.000000] psci: Using standard PSCI v0.2 function IDs

 5626 20:15:42.269765  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

 5627 20:15:42.273040  [    0.000000] psci: SMC Calling Convention v1.1

 5628 20:15:42.279678  [    0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016

 5629 20:15:42.283347  [    0.000000] Detected VIPT I-cache on CPU0

 5630 20:15:42.289147  [    0.000000] CPU features: detected: GIC system register CPU interface

 5631 20:15:42.296361  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

 5632 20:15:42.302953  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

 5633 20:15:42.309343  [    0.000000] CPU features: detected: ARM erratum 845719

 5634 20:15:42.312845  [    0.000000] alternatives: applying boot alternatives

 5635 20:15:42.316288  [    0.000000] Fallback order for Node 0: 0 

 5636 20:15:42.322875  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031424

 5637 20:15:42.326241  [    0.000000] Policy zone: Normal

 5638 20:15:42.353286  [    0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 5639 20:15:42.366426  <5>[    0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.

 5640 20:15:42.376641  <6>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

 5641 20:15:42.383145  <6>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)

 5642 20:15:42.389822  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

 5643 20:15:42.393289  <6>[    0.000000] software IO TLB: area num 8.

 5644 20:15:42.420511  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

 5645 20:15:42.477485  <6>[    0.000000] Memory: 3896916K/4191232K available (18112K kernel code, 4120K rwdata, 22500K rodata, 8512K init, 616K bss, 261548K reserved, 32768K cma-reserved)

 5646 20:15:42.484484  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

 5647 20:15:42.490686  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

 5648 20:15:42.493889  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

 5649 20:15:42.500862  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

 5650 20:15:42.507431  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

 5651 20:15:42.510584  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

 5652 20:15:42.520905  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

 5653 20:15:42.527248  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

 5654 20:15:42.530834  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

 5655 20:15:42.543002  <6>[    0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem

 5656 20:15:42.549300  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

 5657 20:15:42.552736  <6>[    0.000000] GICv3: 640 SPIs implemented

 5658 20:15:42.556193  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

 5659 20:15:42.562902  <6>[    0.000000] Root IRQ handler: gic_handle_irq

 5660 20:15:42.566531  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

 5661 20:15:42.573188  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000

 5662 20:15:42.583413  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }

 5663 20:15:42.596367  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }

 5664 20:15:42.603201  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

 5665 20:15:42.614867  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

 5666 20:15:42.628312  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

 5667 20:15:42.634718  <6>[    0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

 5668 20:15:42.641705  <6>[    0.009469] Console: colour dummy device 80x25

 5669 20:15:42.644922  <6>[    0.014503] printk: console [tty1] enabled

 5670 20:15:42.654775  <6>[    0.018891] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

 5671 20:15:42.661567  <6>[    0.029356] pid_max: default: 32768 minimum: 301

 5672 20:15:42.665090  <6>[    0.034237] LSM: Security Framework initializing

 5673 20:15:42.674715  <6>[    0.039151] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5674 20:15:42.681364  <6>[    0.046774] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5675 20:15:42.687950  <4>[    0.055655] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5676 20:15:42.698022  <6>[    0.062284] cblist_init_generic: Setting adjustable number of callback queues.

 5677 20:15:42.704465  <6>[    0.069729] cblist_init_generic: Setting shift to 3 and lim to 1.

 5678 20:15:42.711065  <6>[    0.076082] cblist_init_generic: Setting adjustable number of callback queues.

 5679 20:15:42.717306  <6>[    0.083527] cblist_init_generic: Setting shift to 3 and lim to 1.

 5680 20:15:42.720920  <6>[    0.089927] rcu: Hierarchical SRCU implementation.

 5681 20:15:42.727613  <6>[    0.094952] rcu: 	Max phase no-delay instances is 1000.

 5682 20:15:42.735088  <6>[    0.102885] EFI services will not be available.

 5683 20:15:42.738104  <6>[    0.107836] smp: Bringing up secondary CPUs ...

 5684 20:15:42.748469  <6>[    0.113152] Detected VIPT I-cache on CPU1

 5685 20:15:42.755774  <4>[    0.113197] cacheinfo: Unable to detect cache hierarchy for CPU 1

 5686 20:15:42.761944  <6>[    0.113206] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000

 5687 20:15:42.768727  <6>[    0.113236] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]

 5688 20:15:42.772258  <6>[    0.113720] Detected VIPT I-cache on CPU2

 5689 20:15:42.778715  <4>[    0.113752] cacheinfo: Unable to detect cache hierarchy for CPU 2

 5690 20:15:42.785427  <6>[    0.113757] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000

 5691 20:15:42.792162  <6>[    0.113769] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]

 5692 20:15:42.795516  <6>[    0.114216] Detected VIPT I-cache on CPU3

 5693 20:15:42.801961  <4>[    0.114247] cacheinfo: Unable to detect cache hierarchy for CPU 3

 5694 20:15:42.808563  <6>[    0.114251] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000

 5695 20:15:42.818784  <6>[    0.114263] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]

 5696 20:15:42.821907  <6>[    0.114837] CPU features: detected: Spectre-v2

 5697 20:15:42.825359  <6>[    0.114847] CPU features: detected: Spectre-BHB

 5698 20:15:42.831985  <6>[    0.114851] CPU features: detected: ARM erratum 858921

 5699 20:15:42.834967  <6>[    0.114856] Detected VIPT I-cache on CPU4

 5700 20:15:42.842072  <4>[    0.114904] cacheinfo: Unable to detect cache hierarchy for CPU 4

 5701 20:15:42.848390  <6>[    0.114912] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000

 5702 20:15:42.855084  <6>[    0.114920] arch_timer: Enabling local workaround for ARM erratum 858921

 5703 20:15:42.861864  <6>[    0.114930] arch_timer: CPU4: Trapping CNTVCT access

 5704 20:15:42.868279  <6>[    0.114938] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]

 5705 20:15:42.871929  <6>[    0.115423] Detected VIPT I-cache on CPU5

 5706 20:15:42.878573  <4>[    0.115464] cacheinfo: Unable to detect cache hierarchy for CPU 5

 5707 20:15:42.885113  <6>[    0.115469] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000

 5708 20:15:42.891492  <6>[    0.115476] arch_timer: Enabling local workaround for ARM erratum 858921

 5709 20:15:42.898329  <6>[    0.115482] arch_timer: CPU5: Trapping CNTVCT access

 5710 20:15:42.904617  <6>[    0.115487] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]

 5711 20:15:42.908234  <6>[    0.115924] Detected VIPT I-cache on CPU6

 5712 20:15:42.914870  <4>[    0.115968] cacheinfo: Unable to detect cache hierarchy for CPU 6

 5713 20:15:42.921534  <6>[    0.115974] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000

 5714 20:15:42.927987  <6>[    0.115982] arch_timer: Enabling local workaround for ARM erratum 858921

 5715 20:15:42.934966  <6>[    0.115987] arch_timer: CPU6: Trapping CNTVCT access

 5716 20:15:42.941673  <6>[    0.115993] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]

 5717 20:15:42.945155  <6>[    0.116523] Detected VIPT I-cache on CPU7

 5718 20:15:42.951239  <4>[    0.116565] cacheinfo: Unable to detect cache hierarchy for CPU 7

 5719 20:15:42.958469  <6>[    0.116571] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000

 5720 20:15:42.967865  <6>[    0.116578] arch_timer: Enabling local workaround for ARM erratum 858921

 5721 20:15:42.971628  <6>[    0.116585] arch_timer: CPU7: Trapping CNTVCT access

 5722 20:15:42.977960  <6>[    0.116590] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]

 5723 20:15:42.981214  <6>[    0.116661] smp: Brought up 1 node, 8 CPUs

 5724 20:15:42.987951  <6>[    0.355533] SMP: Total of 8 processors activated.

 5725 20:15:42.991230  <6>[    0.360469] CPU features: detected: 32-bit EL0 Support

 5726 20:15:42.997830  <6>[    0.365840] CPU features: detected: 32-bit EL1 Support

 5727 20:15:43.004793  <6>[    0.371206] CPU features: detected: CRC32 instructions

 5728 20:15:43.008168  <6>[    0.376633] CPU: All CPU(s) started at EL2

 5729 20:15:43.014643  <6>[    0.380971] alternatives: applying system-wide alternatives

 5730 20:15:43.021115  <6>[    0.389144] devtmpfs: initialized

 5731 20:15:43.033442  <6>[    0.398091] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns

 5732 20:15:43.043474  <6>[    0.408040] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)

 5733 20:15:43.046726  <6>[    0.415766] pinctrl core: initialized pinctrl subsystem

 5734 20:15:43.054938  <6>[    0.422875] DMI not present or invalid.

 5735 20:15:43.061866  <6>[    0.427240] NET: Registered PF_NETLINK/PF_ROUTE protocol family

 5736 20:15:43.068234  <6>[    0.434149] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations

 5737 20:15:43.078354  <6>[    0.441676] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations

 5738 20:15:43.084720  <6>[    0.449927] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations

 5739 20:15:43.091537  <6>[    0.458102] audit: initializing netlink subsys (disabled)

 5740 20:15:43.098297  <5>[    0.463806] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1

 5741 20:15:43.104639  <6>[    0.464773] thermal_sys: Registered thermal governor 'step_wise'

 5742 20:15:43.110981  <6>[    0.471772] thermal_sys: Registered thermal governor 'power_allocator'

 5743 20:15:43.114254  <6>[    0.478068] cpuidle: using governor menu

 5744 20:15:43.120853  <6>[    0.489030] NET: Registered PF_QIPCRTR protocol family

 5745 20:15:43.127512  <6>[    0.494523] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.

 5746 20:15:43.134483  <6>[    0.501619] ASID allocator initialised with 32768 entries

 5747 20:15:43.140487  <6>[    0.508383] Serial: AMBA PL011 UART driver

 5748 20:15:43.150478  <4>[    0.518781] Trying to register duplicate clock ID: 113

 5749 20:15:43.210462  <6>[    0.575542] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5750 20:15:43.225030  <6>[    0.589884] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5751 20:15:43.228380  <6>[    0.599629] KASLR enabled

 5752 20:15:43.242829  <6>[    0.607610] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages

 5753 20:15:43.249502  <6>[    0.614612] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page

 5754 20:15:43.256045  <6>[    0.621088] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages

 5755 20:15:43.262699  <6>[    0.628079] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page

 5756 20:15:43.269553  <6>[    0.634552] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages

 5757 20:15:43.276175  <6>[    0.641541] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page

 5758 20:15:43.282446  <6>[    0.648015] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages

 5759 20:15:43.289052  <6>[    0.655004] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page

 5760 20:15:43.292363  <6>[    0.662570] ACPI: Interpreter disabled.

 5761 20:15:43.302070  <6>[    0.670549] iommu: Default domain type: Translated 

 5762 20:15:43.308775  <6>[    0.675656] iommu: DMA domain TLB invalidation policy: strict mode 

 5763 20:15:43.312398  <5>[    0.682288] SCSI subsystem initialized

 5764 20:15:43.319160  <6>[    0.686702] usbcore: registered new interface driver usbfs

 5765 20:15:43.325420  <6>[    0.692429] usbcore: registered new interface driver hub

 5766 20:15:43.329075  <6>[    0.697971] usbcore: registered new device driver usb

 5767 20:15:43.336176  <6>[    0.704265] pps_core: LinuxPPS API ver. 1 registered

 5768 20:15:43.345940  <6>[    0.709449] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

 5769 20:15:43.349507  <6>[    0.718774] PTP clock support registered

 5770 20:15:43.352171  <6>[    0.723026] EDAC MC: Ver: 3.0.0

 5771 20:15:43.360574  <6>[    0.728664] FPGA manager framework

 5772 20:15:43.363758  <6>[    0.732349] Advanced Linux Sound Architecture Driver Initialized.

 5773 20:15:43.367677  <6>[    0.739090] vgaarb: loaded

 5774 20:15:43.374175  <6>[    0.742216] clocksource: Switched to clocksource arch_sys_counter

 5775 20:15:43.380771  <5>[    0.748647] VFS: Disk quotas dquot_6.6.0

 5776 20:15:43.387665  <6>[    0.752822] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

 5777 20:15:43.390751  <6>[    0.759997] pnp: PnP ACPI: disabled

 5778 20:15:43.398499  <6>[    0.766848] NET: Registered PF_INET protocol family

 5779 20:15:43.405242  <6>[    0.772079] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)

 5780 20:15:43.416792  <6>[    0.781991] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)

 5781 20:15:43.423954  <6>[    0.790744] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)

 5782 20:15:43.433674  <6>[    0.798693] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)

 5783 20:15:43.440879  <6>[    0.806924] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)

 5784 20:15:43.447127  <6>[    0.815017] TCP: Hash tables configured (established 32768 bind 32768)

 5785 20:15:43.454162  <6>[    0.821842] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5786 20:15:43.464115  <6>[    0.828811] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5787 20:15:43.467959  <6>[    0.836292] NET: Registered PF_UNIX/PF_LOCAL protocol family

 5788 20:15:43.473874  <6>[    0.842384] RPC: Registered named UNIX socket transport module.

 5789 20:15:43.480888  <6>[    0.848528] RPC: Registered udp transport module.

 5790 20:15:43.484457  <6>[    0.853453] RPC: Registered tcp transport module.

 5791 20:15:43.490483  <6>[    0.858377] RPC: Registered tcp NFSv4.1 backchannel transport module.

 5792 20:15:43.497217  <6>[    0.865028] PCI: CLS 0 bytes, default 64

 5793 20:15:43.500527  <6>[    0.869279] Unpacking initramfs...

 5794 20:15:43.506643  <6>[    0.873335] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available

 5795 20:15:43.517229  <6>[    0.882034] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available

 5796 20:15:43.523663  <6>[    0.890922] kvm [1]: IPA Size Limit: 40 bits

 5797 20:15:43.526900  <6>[    0.897249] kvm [1]: vgic-v2@c420000

 5798 20:15:43.534196  <6>[    0.901072] kvm [1]: GIC system register CPU interface enabled

 5799 20:15:43.536768  <6>[    0.907249] kvm [1]: vgic interrupt IRQ18

 5800 20:15:43.543748  <6>[    0.911613] kvm [1]: Hyp mode initialized successfully

 5801 20:15:43.550479  <5>[    0.917902] Initialise system trusted keyrings

 5802 20:15:43.556947  <6>[    0.922677] workingset: timestamp_bits=42 max_order=20 bucket_order=0

 5803 20:15:43.564557  <6>[    0.932616] squashfs: version 4.0 (2009/01/31) Phillip Lougher

 5804 20:15:43.571153  <5>[    0.939032] NFS: Registering the id_resolver key type

 5805 20:15:43.574484  <5>[    0.944336] Key type id_resolver registered

 5806 20:15:43.581231  <5>[    0.948747] Key type id_legacy registered

 5807 20:15:43.587745  <6>[    0.953048] nfs4filelayout_init: NFSv4 File Layout Driver Registering...

 5808 20:15:43.594499  <6>[    0.959963] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...

 5809 20:15:43.601151  <6>[    0.967692] 9p: Installing v9fs 9p2000 file system support

 5810 20:15:43.629509  <5>[    0.997258] Key type asymmetric registered

 5811 20:15:43.632570  <5>[    1.001592] Asymmetric key parser 'x509' registered

 5812 20:15:43.642493  <6>[    1.006739] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)

 5813 20:15:43.645820  <6>[    1.014346] io scheduler mq-deadline registered

 5814 20:15:43.648974  <6>[    1.019099] io scheduler kyber registered

 5815 20:15:43.671790  <6>[    1.039726] EINJ: ACPI disabled.

 5816 20:15:43.678056  <4>[    1.043483] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17

 5817 20:15:43.715729  <6>[    1.083802] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

 5818 20:15:43.724057  <6>[    1.092239] printk: console [ttyS0] disabled

 5819 20:15:43.752604  <6>[    1.116890] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2

 5820 20:15:43.759395  <6>[    1.126367] printk: console [ttyS0] enabled

 5821 20:15:43.762654  <6>[    1.126367] printk: console [ttyS0] enabled

 5822 20:15:43.769111  <6>[    1.135280] printk: bootconsole [mtk8250] disabled

 5823 20:15:43.772408  <6>[    1.135280] printk: bootconsole [mtk8250] disabled

 5824 20:15:43.782575  <3>[    1.145800] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47

 5825 20:15:43.789174  <3>[    1.154172] mt6577-uart 11003000.serial: Error applying setting, reverse things back

 5826 20:15:43.818083  <6>[    1.182568] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2

 5827 20:15:43.824726  <6>[    1.192206] serial serial0: tty port ttyS1 registered

 5828 20:15:43.831733  <6>[    1.198772] SuperH (H)SCI(F) driver initialized

 5829 20:15:43.834895  <6>[    1.204247] msm_serial: driver initialized

 5830 20:15:43.850060  <6>[    1.214536] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000

 5831 20:15:43.860364  <6>[    1.223136] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000

 5832 20:15:43.866738  <6>[    1.231709] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000

 5833 20:15:43.876782  <6>[    1.240274] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000

 5834 20:15:43.883443  <6>[    1.248924] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000

 5835 20:15:43.893317  <6>[    1.257583] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000

 5836 20:15:43.903345  <6>[    1.266319] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000

 5837 20:15:43.909529  <6>[    1.275056] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000

 5838 20:15:43.920026  <6>[    1.283619] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000

 5839 20:15:43.929330  <6>[    1.292418] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000

 5840 20:15:43.936704  <4>[    1.304759] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5841 20:15:43.946445  <6>[    1.314069] loop: module loaded

 5842 20:15:43.958347  <6>[    1.325933] vsim1: Bringing 1800000uV into 2700000-2700000uV

 5843 20:15:43.976279  <6>[    1.343864] megasas: 07.719.03.00-rc1

 5844 20:15:43.984846  <6>[    1.352596] spi-nor spi1.0: w25q64dw (8192 Kbytes)

 5845 20:15:43.993954  <6>[    1.361613] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2

 5846 20:15:44.011001  <6>[    1.378420] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)

 5847 20:15:44.067417  <6>[    1.428721] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d

 5848 20:15:44.126399  <6>[    1.494146] Freeing initrd memory: 18280K

 5849 20:15:44.141436  <4>[    1.505996] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'

 5850 20:15:44.148114  <4>[    1.515223] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1

 5851 20:15:44.155059  <4>[    1.521921] Hardware name: Google juniper sku16 board (DT)

 5852 20:15:44.157901  <4>[    1.527660] Call trace:

 5853 20:15:44.161421  <4>[    1.530360]  dump_backtrace.part.0+0xe0/0xf0

 5854 20:15:44.165027  <4>[    1.534895]  show_stack+0x18/0x30

 5855 20:15:44.168187  <4>[    1.538467]  dump_stack_lvl+0x68/0x84

 5856 20:15:44.171609  <4>[    1.542388]  dump_stack+0x18/0x34

 5857 20:15:44.178199  <4>[    1.545957]  sysfs_warn_dup+0x64/0x80

 5858 20:15:44.181725  <4>[    1.549878]  sysfs_do_create_link_sd+0xf0/0x100

 5859 20:15:44.184557  <4>[    1.554666]  sysfs_create_link+0x20/0x40

 5860 20:15:44.191412  <4>[    1.558845]  bus_add_device+0x68/0x10c

 5861 20:15:44.194433  <4>[    1.562851]  device_add+0x340/0x7ac

 5862 20:15:44.197749  <4>[    1.566594]  of_device_add+0x44/0x60

 5863 20:15:44.204643  <4>[    1.570428]  of_platform_device_create_pdata+0x90/0x120

 5864 20:15:44.207893  <4>[    1.575909]  of_platform_bus_create+0x170/0x370

 5865 20:15:44.211251  <4>[    1.580696]  of_platform_populate+0x50/0xfc

 5866 20:15:44.218249  <4>[    1.585135]  parse_mtd_partitions+0x1dc/0x510

 5867 20:15:44.221290  <4>[    1.589748]  mtd_device_parse_register+0xf8/0x2e0

 5868 20:15:44.224495  <4>[    1.594705]  spi_nor_probe+0x21c/0x2f0

 5869 20:15:44.228265  <4>[    1.598711]  spi_mem_probe+0x6c/0xb0

 5870 20:15:44.234634  <4>[    1.602543]  spi_probe+0x84/0xe4

 5871 20:15:44.237872  <4>[    1.606025]  really_probe+0xbc/0x2e0

 5872 20:15:44.241043  <4>[    1.609855]  __driver_probe_device+0x78/0x11c

 5873 20:15:44.244988  <4>[    1.614467]  driver_probe_device+0xd8/0x160

 5874 20:15:44.251202  <4>[    1.618904]  __device_attach_driver+0xb8/0x134

 5875 20:15:44.254907  <4>[    1.623603]  bus_for_each_drv+0x78/0xd0

 5876 20:15:44.257823  <4>[    1.627693]  __device_attach+0xa8/0x1c0

 5877 20:15:44.264894  <4>[    1.631783]  device_initial_probe+0x14/0x20

 5878 20:15:44.267829  <4>[    1.636221]  bus_probe_device+0x9c/0xa4

 5879 20:15:44.271159  <4>[    1.640311]  device_add+0x3ac/0x7ac

 5880 20:15:44.274479  <4>[    1.644053]  __spi_add_device+0x78/0x120

 5881 20:15:44.277882  <4>[    1.648231]  spi_add_device+0x40/0x7c

 5882 20:15:44.284655  <4>[    1.652148]  spi_register_controller+0x610/0xad0

 5883 20:15:44.287990  <4>[    1.657021]  devm_spi_register_controller+0x4c/0xa4

 5884 20:15:44.294572  <4>[    1.662154]  mtk_spi_probe+0x3f8/0x650

 5885 20:15:44.297915  <4>[    1.666158]  platform_probe+0x68/0xe0

 5886 20:15:44.301296  <4>[    1.670075]  really_probe+0xbc/0x2e0

 5887 20:15:44.304922  <4>[    1.673905]  __driver_probe_device+0x78/0x11c

 5888 20:15:44.311375  <4>[    1.678516]  driver_probe_device+0xd8/0x160

 5889 20:15:44.314551  <4>[    1.682954]  __driver_attach+0x94/0x19c

 5890 20:15:44.318081  <4>[    1.687045]  bus_for_each_dev+0x70/0xd0

 5891 20:15:44.321909  <4>[    1.691134]  driver_attach+0x24/0x30

 5892 20:15:44.324746  <4>[    1.694964]  bus_add_driver+0x154/0x20c

 5893 20:15:44.331771  <4>[    1.699054]  driver_register+0x78/0x130

 5894 20:15:44.334874  <4>[    1.703144]  __platform_driver_register+0x28/0x34

 5895 20:15:44.338117  <4>[    1.708104]  mtk_spi_driver_init+0x1c/0x28

 5896 20:15:44.344814  <4>[    1.712458]  do_one_initcall+0x50/0x1d0

 5897 20:15:44.348389  <4>[    1.716548]  kernel_init_freeable+0x21c/0x288

 5898 20:15:44.351683  <4>[    1.721161]  kernel_init+0x24/0x12c

 5899 20:15:44.355068  <4>[    1.724906]  ret_from_fork+0x10/0x20

 5900 20:15:44.365762  <6>[    1.733774] tun: Universal TUN/TAP device driver, 1.6

 5901 20:15:44.369185  <6>[    1.740056] thunder_xcv, ver 1.0

 5902 20:15:44.372843  <6>[    1.743583] thunder_bgx, ver 1.0

 5903 20:15:44.375477  <6>[    1.747087] nicpf, ver 1.0

 5904 20:15:44.386655  <6>[    1.751450] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

 5905 20:15:44.389917  <6>[    1.758934] hns3: Copyright (c) 2017 Huawei Corporation.

 5906 20:15:44.393586  <6>[    1.764532] hclge is initializing

 5907 20:15:44.399846  <6>[    1.768116] e1000: Intel(R) PRO/1000 Network Driver

 5908 20:15:44.406513  <6>[    1.773250] e1000: Copyright (c) 1999-2006 Intel Corporation.

 5909 20:15:44.409812  <6>[    1.779271] e1000e: Intel(R) PRO/1000 Network Driver

 5910 20:15:44.416459  <6>[    1.784491] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

 5911 20:15:44.423435  <6>[    1.790684] igb: Intel(R) Gigabit Ethernet Network Driver

 5912 20:15:44.430167  <6>[    1.796339] igb: Copyright (c) 2007-2014 Intel Corporation.

 5913 20:15:44.436585  <6>[    1.802180] igbvf: Intel(R) Gigabit Virtual Function Network Driver

 5914 20:15:44.440705  <6>[    1.808703] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

 5915 20:15:44.447497  <6>[    1.815252] sky2: driver version 1.30

 5916 20:15:44.454532  <6>[    1.820489] usbcore: registered new device driver r8152-cfgselector

 5917 20:15:44.460898  <6>[    1.827030] usbcore: registered new interface driver r8152

 5918 20:15:44.464152  <6>[    1.832863] VFIO - User Level meta-driver version: 0.3

 5919 20:15:44.472602  <6>[    1.840630] mtu3 11201000.usb: uwk - reg:0x420, version:101

 5920 20:15:44.479464  <4>[    1.846511] mtu3 11201000.usb: supply vbus not found, using dummy regulator

 5921 20:15:44.486127  <6>[    1.853783] mtu3 11201000.usb: dr_mode: 1, drd: auto

 5922 20:15:44.492866  <6>[    1.859009] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0

 5923 20:15:44.496017  <6>[    1.865194] mtu3 11201000.usb: usb3-drd: 0

 5924 20:15:44.505977  <6>[    1.870743] mtu3 11201000.usb: xHCI platform device register success...

 5925 20:15:44.512463  <4>[    1.879357] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator

 5926 20:15:44.519278  <6>[    1.887312] xhci-mtk 11200000.usb: xHCI Host Controller

 5927 20:15:44.526033  <6>[    1.892814] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

 5928 20:15:44.532671  <6>[    1.900531] xhci-mtk 11200000.usb: USB3 root hub has no ports

 5929 20:15:44.542743  <6>[    1.906539] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

 5930 20:15:44.549308  <6>[    1.915964] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000

 5931 20:15:44.553216  <6>[    1.922039] xhci-mtk 11200000.usb: xHCI Host Controller

 5932 20:15:44.562880  <6>[    1.927546] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

 5933 20:15:44.569855  <6>[    1.935204] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed

 5934 20:15:44.572742  <6>[    1.942030] hub 1-0:1.0: USB hub found

 5935 20:15:44.576078  <6>[    1.946080] hub 1-0:1.0: 1 port detected

 5936 20:15:44.586832  <6>[    1.951430] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

 5937 20:15:44.590697  <6>[    1.960050] hub 2-0:1.0: USB hub found

 5938 20:15:44.600265  <3>[    1.964077] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)

 5939 20:15:44.606733  <6>[    1.971970] usbcore: registered new interface driver usb-storage

 5940 20:15:44.613238  <6>[    1.978575] usbcore: registered new device driver onboard-usb-hub

 5941 20:15:44.629272  <4>[    1.994331] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator

 5942 20:15:44.638400  <6>[    2.006589] mt6397-rtc mt6358-rtc: registered as rtc0

 5943 20:15:44.648682  <6>[    2.012068] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-28T20:15:44 UTC (1716927344)

 5944 20:15:44.651773  <6>[    2.021935] i2c_dev: i2c /dev entries driver

 5945 20:15:44.663488  <6>[    2.028358] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5946 20:15:44.673889  <6>[    2.036678] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5947 20:15:44.676945  <6>[    2.045584] i2c 4-0058: Fixed dependency cycle(s) with /panel

 5948 20:15:44.687116  <6>[    2.051615] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000

 5949 20:15:44.693490  <3>[    2.059081] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.

 5950 20:15:44.711832  <6>[    2.076099] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

 5951 20:15:44.719901  <6>[    2.087593] cpu cpu0: EM: created perf domain

 5952 20:15:44.729520  <6>[    2.093058] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz

 5953 20:15:44.736475  <6>[    2.104339] cpu cpu4: EM: created perf domain

 5954 20:15:44.743349  <6>[    2.111298] sdhci: Secure Digital Host Controller Interface driver

 5955 20:15:44.750331  <6>[    2.117753] sdhci: Copyright(c) Pierre Ossman

 5956 20:15:44.757024  <6>[    2.123157] Synopsys Designware Multimedia Card Interface Driver

 5957 20:15:44.763448  <6>[    2.123680] mtk-msdc 11240000.mmc: allocated mmc-pwrseq

 5958 20:15:44.767108  <6>[    2.130234] sdhci-pltfm: SDHCI platform and OF driver helper

 5959 20:15:44.774874  <6>[    2.142800] ledtrig-cpu: registered to indicate activity on CPUs

 5960 20:15:44.782910  <6>[    2.150481] usbcore: registered new interface driver usbhid

 5961 20:15:44.785974  <6>[    2.156316] usbhid: USB HID core driver

 5962 20:15:44.796978  <6>[    2.160626] spi_master spi2: will run message pump with realtime priority

 5963 20:15:44.800532  <4>[    2.160781] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator

 5964 20:15:44.810935  <4>[    2.174977] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator

 5965 20:15:44.820969  <6>[    2.179829] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0

 5966 20:15:44.840457  <6>[    2.198001] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1

 5967 20:15:44.846892  <4>[    2.206714] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 5968 20:15:44.849940  <6>[    2.212884] cros-ec-spi spi2.0: Chrome EC device registered

 5969 20:15:44.865651  <4>[    2.230047] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 5970 20:15:44.869156  <6>[    2.234547] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14

 5971 20:15:44.879060  <4>[    2.241790] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 5972 20:15:44.882408  <6>[    2.244502] mmc0: new HS400 MMC card at address 0001

 5973 20:15:44.888734  <4>[    2.252535] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 5974 20:15:44.895915  <6>[    2.257604] mmcblk0: mmc0:0001 TB2932 29.2 GiB 

 5975 20:15:44.906421  <6>[    2.270722] mmc1: new ultra high speed SDR104 SDIO card at address 0001

 5976 20:15:44.909452  <6>[    2.272135]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

 5977 20:15:44.918375  <6>[    2.286522] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB 

 5978 20:15:44.929251  <6>[    2.291830] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound

 5979 20:15:44.932001  <6>[    2.293005] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB 

 5980 20:15:44.945303  <6>[    2.304219] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 5981 20:15:44.948502  <6>[    2.307212] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)

 5982 20:15:44.955330  <6>[    2.317789] NET: Registered PF_PACKET protocol family

 5983 20:15:44.968595  <6>[    2.322430] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2

 5984 20:15:44.978691  <6>[    2.322606] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c

 5985 20:15:44.982187  <6>[    2.350486] 9pnet: Installing 9P2000 support

 5986 20:15:44.985134  <5>[    2.355050] Key type dns_resolver registered

 5987 20:15:44.992120  <6>[    2.360063] registered taskstats version 1

 5988 20:15:44.995632  <5>[    2.364429] Loading compiled-in X.509 certificates

 5989 20:15:45.005506  <6>[    2.370226] usb 1-1: new high-speed USB device number 2 using xhci-mtk

 5990 20:15:45.040813  <3>[    2.405422] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517

 5991 20:15:45.067151  <4>[    2.431951] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW

 5992 20:15:45.078257  <6>[    2.442530] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20

 5993 20:15:45.094027  <6>[    2.455771] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 5994 20:15:45.107253  <3>[    2.467031] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!

 5995 20:15:45.121214  <3>[    2.482457] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'

 5996 20:15:45.127737  <3>[    2.494864] debugfs: File 'Playback' in directory 'dapm' already present!

 5997 20:15:45.134490  <3>[    2.501913] debugfs: File 'Capture' in directory 'dapm' already present!

 5998 20:15:45.150468  <6>[    2.511678] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4

 5999 20:15:45.160483  <6>[    2.525064] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)

 6000 20:15:45.163775  <6>[    2.529624] hub 1-1:1.0: USB hub found

 6001 20:15:45.173800  <6>[    2.533612] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)

 6002 20:15:45.177462  <6>[    2.538047] hub 1-1:1.0: 3 ports detected

 6003 20:15:45.187193  <6>[    2.546119] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)

 6004 20:15:45.194298  <6>[    2.558912] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

 6005 20:15:45.204072  <6>[    2.567433] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)

 6006 20:15:45.210978  <6>[    2.575952] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)

 6007 20:15:45.220609  <6>[    2.584471] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

 6008 20:15:45.227347  <6>[    2.593692] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0

 6009 20:15:45.233840  <6>[    2.601194] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0

 6010 20:15:45.240674  <6>[    2.608515] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0

 6011 20:15:45.248084  <6>[    2.615793] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0

 6012 20:15:45.255339  <6>[    2.623222] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0

 6013 20:15:45.263679  <6>[    2.631493] panfrost 13040000.gpu: clock rate = 511999970

 6014 20:15:45.273418  <6>[    2.637193] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet

 6015 20:15:45.283569  <6>[    2.647445] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0

 6016 20:15:45.290158  <6>[    2.655464] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400

 6017 20:15:45.303633  <6>[    2.663898] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7

 6018 20:15:45.310017  <6>[    2.675975] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1

 6019 20:15:45.322989  <6>[    2.687403] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0

 6020 20:15:45.332674  <6>[    2.696405] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)

 6021 20:15:45.342250  <6>[    2.705586] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)

 6022 20:15:45.349099  <6>[    2.714714] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)

 6023 20:15:45.359039  <6>[    2.723842] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)

 6024 20:15:45.368804  <6>[    2.733142] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)

 6025 20:15:45.379076  <6>[    2.742442] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)

 6026 20:15:45.388853  <6>[    2.751917] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)

 6027 20:15:45.398947  <6>[    2.761394] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)

 6028 20:15:45.405382  <6>[    2.770522] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)

 6029 20:15:45.479006  <6>[    2.843474] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)

 6030 20:15:45.488649  <6>[    2.852398] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing

 6031 20:15:45.500312  <6>[    2.864350] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1

 6032 20:15:45.513754  <6>[    2.878337] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk

 6033 20:15:46.182219  <6>[    3.074811] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk

 6034 20:15:46.191980  <4>[    3.186993] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2

 6035 20:15:46.198684  <4>[    3.187010] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)

 6036 20:15:46.205083  <6>[    3.224080] r8152 1-1.2:1.0 eth0: v1.12.13

 6037 20:15:46.212182  <6>[    3.302251] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk

 6038 20:15:46.218366  <6>[    3.529869] Console: switching to colour frame buffer device 170x48

 6039 20:15:46.224918  <6>[    3.590522] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device

 6040 20:15:46.242438  <6>[    3.606934] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5

 6041 20:15:46.249124  <6>[    3.615069] input: volume-buttons as /devices/platform/volume-buttons/input/input6

 6042 20:15:47.443664  <6>[    4.811572] r8152 1-1.2:1.0 eth0: carrier on

 6043 20:15:50.066676  <5>[    4.838235] Sending DHCP requests .., OK

 6044 20:15:50.073369  <6>[    7.438570] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23

 6045 20:15:50.076302  <6>[    7.447005] IP-Config: Complete:

 6046 20:15:50.090058  <6>[    7.450577]      device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1

 6047 20:15:50.096459  <6>[    7.461477]      host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)

 6048 20:15:50.106497  <6>[    7.470957]      bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=

 6049 20:15:50.110012  <6>[    7.470967]      nameserver0=192.168.201.1

 6050 20:15:50.113223  <6>[    7.483356] clk: Disabling unused clocks

 6051 20:15:50.117569  <6>[    7.488443] ALSA device list:

 6052 20:15:50.127369  <6>[    7.495045]   #0: mt8183_mt6358_ts3a227_max98357

 6053 20:15:50.138862  <6>[    7.506662] Freeing unused kernel memory: 8512K

 6054 20:15:50.146743  <6>[    7.514286] Run /init as init process

 6055 20:15:50.158820  Loading, please wait...

 6056 20:15:50.190996  Starting systemd-udevd version 252.22-1~deb12u1


 6057 20:15:50.503907  <4>[    7.868003] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator

 6058 20:15:50.510263  <4>[    7.876240] elants_i2c 0-0010: supply vccio not found, using dummy regulator

 6059 20:15:50.516976  <3>[    7.878848] thermal_sys: Failed to find 'trips' node

 6060 20:15:50.523538  <3>[    7.890439] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6061 20:15:50.533647  <3>[    7.893330] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015

 6062 20:15:50.543354  <3>[    7.897905] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6063 20:15:50.550118  <3>[    7.908212] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22

 6064 20:15:50.557224  <4>[    7.916288] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6065 20:15:50.563599  <3>[    7.917578] thermal_sys: Failed to find 'trips' node

 6066 20:15:50.573302  <3>[    7.923485] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7  on device pinctrl_paris

 6067 20:15:50.579820  <6>[    7.925533] mc: Linux media interface: v0.10

 6068 20:15:50.587088  <3>[    7.930730] thermal_sys: Failed to find trip points for thermal-sensor2 id=0

 6069 20:15:50.593304  <3>[    7.930744] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22

 6070 20:15:50.603367  <4>[    7.930751] generic-adc-thermal: probe of thermal-sensor2 failed with error -22

 6071 20:15:50.607063  <6>[    7.931080] videodev: Linux video capture interface: v2.00

 6072 20:15:50.617242  <3>[    7.936166] elan_i2c 2-0015: Error applying setting, reverse things back

 6073 20:15:50.623785  <6>[    7.947725]  cs_system_cfg: CoreSight Configuration manager initialised

 6074 20:15:50.631179  <5>[    7.948234] cfg80211: Loading compiled-in X.509 certificates for regulatory database

 6075 20:15:50.641356  <3>[    7.952680] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6076 20:15:50.651150  <6>[    7.960298] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered

 6077 20:15:50.657587  <5>[    7.965473] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

 6078 20:15:50.667530  <5>[    7.965887] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'

 6079 20:15:50.674613  <4>[    7.965943] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

 6080 20:15:50.681018  <6>[    7.965949] cfg80211: failed to load regulatory.db

 6081 20:15:50.687700  <3>[    7.967464] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6082 20:15:50.697818  <6>[    8.034303] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7

 6083 20:15:50.707653  <3>[    8.038711] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6084 20:15:50.713812  <6>[    8.053238] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized

 6085 20:15:50.724456  <3>[    8.053425] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6086 20:15:50.727227  <3>[    8.054259] mtk-scp 10500000.scp: invalid resource

 6087 20:15:50.737394  <6>[    8.054335] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000

 6088 20:15:50.740716  <6>[    8.063090] remoteproc remoteproc0: scp is available

 6089 20:15:50.750666  <6>[    8.070409] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized

 6090 20:15:50.757376  <3>[    8.071179] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6091 20:15:50.767655  <3>[    8.071186] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6092 20:15:50.773644  <3>[    8.071194] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6093 20:15:50.784315  <3>[    8.071200] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6094 20:15:50.794666  <6>[    8.071230] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized

 6095 20:15:50.801091  <3>[    8.071238] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6096 20:15:50.811223  <6>[    8.071343] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized

 6097 20:15:50.817776  <4>[    8.080595] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6098 20:15:50.820721  <6>[    8.080904] Bluetooth: Core ver 2.22

 6099 20:15:50.829319  <6>[    8.080958] NET: Registered PF_BLUETOOTH protocol family

 6100 20:15:50.837017  <6>[    8.080960] Bluetooth: HCI device and connection manager initialized

 6101 20:15:50.845026  <6>[    8.080972] Bluetooth: HCI socket layer initialized

 6102 20:15:50.852111  <6>[    8.080977] Bluetooth: L2CAP socket layer initialized

 6103 20:15:50.858740  <6>[    8.080984] Bluetooth: SCO socket layer initialized

 6104 20:15:50.869182  <6>[    8.088132] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized

 6105 20:15:50.875778  <6>[    8.097361] remoteproc remoteproc0: powering up scp

 6106 20:15:50.885884  <6>[    8.101646] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized

 6107 20:15:50.895604  <4>[    8.109346] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6108 20:15:50.903093  <6>[    8.109851] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0

 6109 20:15:50.913637  <6>[    8.110087] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)

 6110 20:15:50.924148  <6>[    8.114633] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized

 6111 20:15:50.930898  <6>[    8.114854] Bluetooth: HCI UART driver ver 2.3

 6112 20:15:50.937626  <6>[    8.114863] Bluetooth: HCI UART protocol H4 registered

 6113 20:15:50.944211  <6>[    8.114926] Bluetooth: HCI UART protocol LL registered

 6114 20:15:50.951488  <6>[    8.114954] Bluetooth: HCI UART protocol Three-wire (H5) registered

 6115 20:15:50.963214  <6>[    8.115187] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0

 6116 20:15:50.970159  <6>[    8.115383] Bluetooth: HCI UART protocol Broadcom registered

 6117 20:15:50.976934  <6>[    8.115476] Bluetooth: HCI UART protocol QCA registered

 6118 20:15:50.983731  <6>[    8.115497] Bluetooth: HCI UART protocol Marvell registered

 6119 20:15:50.993553  Begin: Loading essential drivers<6>[    8.115947] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1

 6120 20:15:50.993993   ... done.

 6121 20:15:51.000585  Begin: Running /<6>[    8.116158] Bluetooth: hci0: setting up ROME/QCA6390

 6122 20:15:51.003885  scripts/init-premount ... done.

 6123 20:15:51.010297  <6>[    8.122684] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)

 6124 20:15:51.010742  

 6125 20:15:51.020432  Begin: Mounting root file syste<3>[    8.122801] remoteproc remoteproc0: request_firmware failed: -2

 6126 20:15:51.029934  m ... Begin: Running /scripts/nf<6>[    8.131135] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized

 6127 20:15:51.030400  s-top ... done.

 6128 20:15:51.043459  Begin: Running <6>[    8.157919] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8

 6129 20:15:51.056302  /scripts/nfs-premount ... Waitin<6>[    8.167273] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000

 6130 20:15:51.066350  g up to 60 secs for any ethernet<6>[    8.174615] usbcore: registered new interface driver uvcvideo

 6131 20:15:51.066840   to become available

 6132 20:15:51.076273  Device /sy<6>[    8.182300] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0

 6133 20:15:51.079827  s/class/net/eth0 found

 6134 20:15:51.080254  done.

 6135 20:15:51.086351  B<3>[    8.342367] Bluetooth: hci0: Frame reassembly failed (-84)

 6136 20:15:51.099718  egin: Waiting up to 180 secs for<6>[    8.344422] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77

 6137 20:15:51.109634   any network dev<4>[    8.459004] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

 6138 20:15:51.115935  <4>[    8.459004] Fallback method does not support PEC.

 6139 20:15:51.119296  ice to become available ... done.

 6140 20:15:51.168260  <3>[    8.531937] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6141 20:15:51.186484  IP-Config: eth0 hardware address<3>[    8.548883] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6142 20:15:51.189855   00:e0:4c:71:a7:1f mtu 1500 DHCP

 6143 20:15:51.192960  IP-Config: eth0 complete (dhcp from 192.168.201.1):

 6144 20:15:51.199975   address: 192.168.201.23   broadcast: 192.168.201.255  netmask: 255.255.255.0   

 6145 20:15:51.206796   gateway: 192.168.201.1    dns0     : 192.168.201.1    dns1   : 0.0.0.0         

 6146 20:15:51.213023   host   : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3                        

 6147 20:15:51.219933   domain : lava-rack                                                       

 6148 20:15:51.222930   rootserver: 192.168.201.1 rootpath: 

 6149 20:15:51.226216   filename  : 

 6150 20:15:51.247808  <6>[    8.612083] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91

 6151 20:15:51.250880  <6>[    8.616115] Bluetooth: hci0: QCA Product ID   :0x00000008

 6152 20:15:51.264720  <6>[    8.632031] Bluetooth: hci0: QCA SOC Version  :0x00000044

 6153 20:15:51.273200  <6>[    8.641385] Bluetooth: hci0: QCA ROM Version  :0x00000302

 6154 20:15:51.283102  <6>[    8.651225] Bluetooth: hci0: QCA Patch Version:0x00000111

 6155 20:15:51.292461  <6>[    8.660482] Bluetooth: hci0: QCA controller version 0x00440302

 6156 20:15:51.304641  <6>[    8.669386] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin

 6157 20:15:51.315814  <4>[    8.678810] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2

 6158 20:15:51.325427  <3>[    8.690286] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)

 6159 20:15:51.332258  <3>[    8.700440] Bluetooth: hci0: QCA Failed to download patch (-2)

 6160 20:15:51.368967  done.

 6161 20:15:51.376269  Begin: Running /scripts/nfs-bottom ... done.

 6162 20:15:51.387480  Begin: Running /scripts/init-bottom ... done.

 6163 20:15:51.643579  <6>[    9.007758] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1

 6164 20:15:51.726662  <4>[    9.091107] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6165 20:15:51.746719  <4>[    9.111274] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6166 20:15:51.762312  <4>[    9.126953] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6167 20:15:51.772498  <4>[    9.140499] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6168 20:15:52.785297  <6>[   10.153163] NET: Registered PF_INET6 protocol family

 6169 20:15:52.797404  <6>[   10.165216] Segment Routing with IPv6

 6170 20:15:52.805156  <6>[   10.173210] In-situ OAM (IOAM) with IPv6

 6171 20:15:52.992972  <30>[   10.334024] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)

 6172 20:15:53.012480  <30>[   10.380188] systemd[1]: Detected architecture arm64.

 6173 20:15:53.023907  

 6174 20:15:53.027784  Welcome to Debian GNU/Linux 12 (bookworm)!

 6175 20:15:53.028203  


 6176 20:15:53.052502  <30>[   10.420278] systemd[1]: Hostname set to <debian-bookworm-arm64>.

 6177 20:15:54.148955  <30>[   11.513427] systemd[1]: Queued start job for default target graphical.target.

 6178 20:15:54.203679  <30>[   11.567934] systemd[1]: Created slice system-getty.slice - Slice /system/getty.

 6179 20:15:54.216368  [  OK  ] Created slice system-getty.slice - Slice /system/getty.


 6180 20:15:54.236626  <30>[   11.600538] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.

 6181 20:15:54.249916  [  OK  ] Created slice system-modpr…lice - Slice /system/modprobe.


 6182 20:15:54.268133  <30>[   11.632573] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.

 6183 20:15:54.282256  [  OK  ] Created slice system-seria… - Slice /system/serial-getty.


 6184 20:15:54.299322  <30>[   11.663848] systemd[1]: Created slice user.slice - User and Session Slice.

 6185 20:15:54.311456  [  OK  ] Created slice user.slice - User and Session Slice.


 6186 20:15:54.333988  <30>[   11.694822] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.

 6187 20:15:54.346601  [  OK  ] Started systemd-ask-passwo…quests to Console Directory Watch.


 6188 20:15:54.369785  <30>[   11.730655] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.

 6189 20:15:54.381856  [  OK  ] Started systemd-ask-passwo… Requests to Wall Directory Watch.


 6190 20:15:54.408425  <30>[   11.762610] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).

 6191 20:15:54.428611  <30>[   11.792778] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...

 6192 20:15:54.437119           Expecting device dev-ttyS0.device - /dev/ttyS0...


 6193 20:15:54.458036  <30>[   11.822406] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.

 6194 20:15:54.470975  [  OK  ] Reached target cryptsetup.…get - Local Encrypted Volumes.


 6195 20:15:54.490035  <30>[   11.854467] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.

 6196 20:15:54.504236  [  OK  ] Reached target integrityse…Local Integrity Protected Volumes.


 6197 20:15:54.519003  <30>[   11.886532] systemd[1]: Reached target paths.target - Path Units.

 6198 20:15:54.533840  [  OK  ] Reached target paths.target - Path Units.


 6199 20:15:54.550414  <30>[   11.914453] systemd[1]: Reached target remote-fs.target - Remote File Systems.

 6200 20:15:54.562463  [  OK  ] Reached target remote-fs.target - Remote File Systems.


 6201 20:15:54.574788  <30>[   11.942392] systemd[1]: Reached target slices.target - Slice Units.

 6202 20:15:54.589374  [  OK  ] Reached target slices.target - Slice Units.


 6203 20:15:54.602544  <30>[   11.970445] systemd[1]: Reached target swap.target - Swaps.

 6204 20:15:54.612756  [  OK  ] Reached target swap.target - Swaps.


 6205 20:15:54.633958  <30>[   11.998442] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.

 6206 20:15:54.647126  [  OK  ] Reached target veritysetup… - Local Verity Protected Volumes.


 6207 20:15:54.666406  <30>[   12.030820] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.

 6208 20:15:54.680667  [  OK  ] Listening on systemd-initc… initctl Compatibility Named Pipe.


 6209 20:15:54.701232  <30>[   12.065654] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.

 6210 20:15:54.712981  [  OK  ] Listening on systemd-journ…socket - Journal Audit Socket.


 6211 20:15:54.732583  <30>[   12.096280] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).

 6212 20:15:54.746249  [  OK  ] Listening on systemd-journ…t - Journal Socket (/dev/log).


 6213 20:15:54.762925  <30>[   12.127161] systemd[1]: Listening on systemd-journald.socket - Journal Socket.

 6214 20:15:54.774952  [  OK  ] Listening on systemd-journald.socket - Journal Socket.


 6215 20:15:54.795962  <30>[   12.160166] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.

 6216 20:15:54.810047  [  OK  ] Listening on systemd-netwo… - Network Service Netlink Socket.


 6217 20:15:54.829088  <30>[   12.193173] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.

 6218 20:15:54.841957  [  OK  ] Listening on systemd-udevd….socket - udev Control Socket.


 6219 20:15:54.859443  <30>[   12.223003] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.

 6220 20:15:54.871810  [  OK  ] Listening on systemd-udevd…l.socket - udev Kernel Socket.


 6221 20:15:54.911229  <30>[   12.275420] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...

 6222 20:15:54.922296           Mounting dev-hugepages.mount - Huge Pages File System...


 6223 20:15:54.934973  <30>[   12.299071] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...

 6224 20:15:54.947265           Mounting dev-mqueue.mount…POSIX Message Queue File System...


 6225 20:15:54.973163  <30>[   12.337469] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...

 6226 20:15:54.985041           Mounting sys-kernel-debug.… - Kernel Debug File System...


 6227 20:15:55.009248  <30>[   12.367124] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).

 6228 20:15:55.070994  <30>[   12.435322] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...

 6229 20:15:55.085812           Starting kmod-static-nodes…ate List of Static Device Nodes...


 6230 20:15:55.108493  <30>[   12.472797] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...

 6231 20:15:55.122873           Starting modprobe@configfs…m - Load Kernel Module configfs...


 6232 20:15:55.146778  <30>[   12.511095] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...

 6233 20:15:55.161238           Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6234 20:15:55.182816  <30>[   12.547118] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...

 6235 20:15:55.197358           Startin<6>[   12.559094] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com

 6236 20:15:55.200845  g modprobe@drm.service - Load Kernel Module drm...


 6237 20:15:55.238636  <30>[   12.603110] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...

 6238 20:15:55.253744           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6239 20:15:55.275551  <30>[   12.639931] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...

 6240 20:15:55.289722           Starting modprobe@fuse.ser…e - Load Kernel Module fuse...


 6241 20:15:55.317864  <6>[   12.685381] fuse: init (API version 7.37)

 6242 20:15:55.335486  <30>[   12.699955] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...

 6243 20:15:55.350106           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6244 20:15:55.391257  <30>[   12.755586] systemd[1]: Starting systemd-journald.service - Journal Service...

 6245 20:15:55.404362           Starting systemd-journald.service - Journal Service...


 6246 20:15:55.437944  <30>[   12.802281] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...

 6247 20:15:55.450079           Starting systemd-modules-l…rvice - Load Kernel Modules...


 6248 20:15:55.473664  <30>[   12.834521] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...

 6249 20:15:55.484238           Starting systemd-network-g… units from Kernel command line...


 6250 20:15:55.507421  <30>[   12.871230] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...

 6251 20:15:55.519545           Starting systemd-remount-f…nt Root and Kernel File Systems...


 6252 20:15:55.542448  <30>[   12.907013] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...

 6253 20:15:55.554040           Starting systemd-udev-trig…[0m - Coldplug All udev Devices...


 6254 20:15:55.571373  <3>[   12.935388] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6255 20:15:55.578335  <30>[   12.938916] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.

 6256 20:15:55.585219  <3>[   12.950021] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6257 20:15:55.603082  [  OK  ] Mounted dev-hugepages.mount - Huge Pages File System.


 6258 20:15:55.613653  <3>[   12.977813] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6259 20:15:55.624929  <30>[   12.987048] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.

 6260 20:15:55.631168  <3>[   12.993751] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6261 20:15:55.651887  [  OK  ] Mounted dev-mqueue.mount[…- POSIX Message Queue <3>[   13.014046] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6262 20:15:55.652213  File System.


 6263 20:15:55.667559  <3>[   13.032276] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6264 20:15:55.679199  <30>[   13.041514] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.

 6265 20:15:55.685784  <3>[   13.050109] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6266 20:15:55.707586  [  OK  ] Mounted sys-kernel-debug.m…nt - Kernel Debug <3>[   13.069978] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6267 20:15:55.707943  File System.


 6268 20:15:55.731471  <30>[   13.095386] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.

 6269 20:15:55.743013  [  OK  ] Finished kmod-static-nodes…reate List of Static Device Nodes.


 6270 20:15:55.763344  <30>[   13.127517] systemd[1]: Started systemd-journald.service - Journal Service.

 6271 20:15:55.773792  [  OK  ] Started systemd-journald.service - Journal Service.


 6272 20:15:55.799299  [  OK  ] Finished modprobe@configfs…[0m - Load Kernel Module configfs.


 6273 20:15:55.825750  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6274 20:15:55.849225  [  OK  ] Finished modprobe@drm.service - Load Kernel Module drm.


 6275 20:15:55.872902  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6276 20:15:55.894025  [  OK  ] Finished modprobe@fuse.service - Load Kernel Module fuse.


 6277 20:15:55.913220  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6278 20:15:55.936476  [  OK  ] Finished systemd-modules-l…service - Load Kernel Modules.


 6279 20:15:55.956731  [  OK  ] Finished systemd-network-g…rk units from Kernel command line.


 6280 20:15:55.980635  [  OK  ] Finished systemd-remount-f…ount Root and Kernel File Systems.


 6281 20:15:55.999567  [  OK  ] Reached target network-pre…get - Preparation for Network.


 6282 20:15:56.036055  <4>[   13.393324] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent

 6283 20:15:56.046671  <3>[   13.411124] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5

 6284 20:15:56.074705           Mounting sys-fs-fuse-conne… - FUSE Control File System...


 6285 20:15:56.104245           Mounting sys-kernel-config…ernel Configuration File System...


 6286 20:15:56.132947           Starting systemd-journal-f…h Journal to Persistent Storage...


 6287 20:15:56.159547           Starting systemd-random-se…ice - Load/Save Random Seed...


 6288 20:15:56.193800  <46>[   13.558286] systemd-journald[322]: Received client request to flush runtime journal.

 6289 20:15:56.224240           Starting systemd-sysctl.se…ce - Apply Kernel Variables...


 6290 20:15:56.450875           Starting systemd-sysusers.…rvice - Create System Users...


 6291 20:15:56.786439  [  OK  ] Finished systemd-udev-trig…e - Coldplug All udev Devices.


 6292 20:15:56.808149  [  OK  ] Mounted sys-fs-fuse-connec…nt - FUSE Control File System.


 6293 20:15:56.827421  [  OK  ] Mounted sys-kernel-config.… Kernel Configuration File System.


 6294 20:15:56.847776  [  OK  ] Finished systemd-random-se…rvice - Load/Save Random Seed.


 6295 20:15:57.359924  [  OK  ] Finished systemd-sysctl.service - Apply Kernel Variables.


 6296 20:15:57.385150  [  OK  ] Finished systemd-sysusers.service - Create System Users.


 6297 20:15:57.427379           Starting systemd-tmpfiles-…ate Static Device Nodes in /dev...


 6298 20:15:57.674036  [  OK  ] Finished systemd-journal-f…ush Journal to Persistent Storage.


 6299 20:15:57.793227  [  OK  ] Finished systemd-tmpfiles-…reate Static Device Nodes in /dev.


 6300 20:15:57.812076  [  OK  ] Reached target local-fs-pr…reparation for Local File Systems.


 6301 20:15:57.830787  [  OK  ] Reached target local-fs.target - Local File Systems.


 6302 20:15:57.879161           Starting systemd-tmpfiles-… Volatile Files and Directories...


 6303 20:15:57.905415           Starting systemd-udevd.ser…ger for Device Events and Files...


 6304 20:15:58.168279  [  OK  ] Started systemd-udevd.serv…nager for Device Events and Files.


 6305 20:15:58.242566           Starting systemd-networkd.…ice - Network Configuration...


 6306 20:15:58.306137  [  OK  ] Found device dev-ttyS0.device - /dev/ttyS0.


 6307 20:15:58.480725  [  OK  ] Finished systemd-tm<4>[   15.846509] power_supply_show_property: 4 callbacks suppressed

 6308 20:15:58.490827  pfiles-…te Vol<3>[   15.846519] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6309 20:15:58.494949  atile Files and Directories.


 6310 20:15:58.500855  <3>[   15.850949] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6311 20:15:58.520725  <3>[   15.884878] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6312 20:15:58.537169  <3>[   15.901387] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6313 20:15:58.552456  <3>[   15.916338] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6314 20:15:58.570804  [  OK  ] Created slice syste<3>[   15.934803] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6315 20:15:58.574261  m-syste…- Slice /system/systemd-backlight.


 6316 20:15:58.585782  <3>[   15.949986] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6317 20:15:58.600781  [  OK  ] Reached target bluetooth.target - Bluetooth Sup<3>[   15.965280] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6318 20:15:58.603955  port.


 6319 20:15:58.617424  <3>[   15.981615] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6320 20:15:58.633136  <3>[   15.997069] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6321 20:15:58.662515           Starting systemd-backlight…ess of backlight:backlight_lcd0...


 6322 20:15:58.725872           Starting systemd-timesyncd… - Network Time Synchronization...


 6323 20:15:58.740459           Starting systemd-update-ut…rd System Boot/Shutdown in UTMP...


 6324 20:15:58.835641  [  OK  ] Finished systemd-backlight…tness of backlight:backlight_lcd0.


 6325 20:15:58.873412  [  OK  ] Listening on systemd-rfkil…l Switch Status /dev/rfkill Watch.


 6326 20:15:58.936135  [  OK  ] Started systemd-networkd.service - Network Configuration.


 6327 20:15:58.956461  [  OK  ] Reached target network.target - Network.


 6328 20:15:59.007216           Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6329 20:15:59.038429           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6330 20:15:59.058663           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6331 20:15:59.088635           Starting systemd-rfkill.se…Load/Save RF Kill Switch Status...


 6332 20:15:59.116934  [  OK  ] Started systemd-timesyncd.…0m - Network Time Synchronization.


 6333 20:15:59.139529  [  OK  ] Started systemd-rfkill.ser…- Load/Save RF Kill Switch Status.


 6334 20:15:59.164094  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6335 20:15:59.187230  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6336 20:15:59.210811  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6337 20:15:59.233586  [  OK  ] Reached target time-set.target - System Time Set.


 6338 20:15:59.249217  [  OK  ] Finished systemd-update-ut…cord System Boot/Shutdown in UTMP.


 6339 20:15:59.267870  [  OK  ] Reached target sysinit.target - System Initialization.


 6340 20:15:59.291117  [  OK  ] Started apt-daily.timer - Daily apt download activities.


 6341 20:15:59.311088  [  OK  ] Started apt-daily-upgrade.… apt upgrade and clean activities.


 6342 20:15:59.328314  [  OK  ] Started dpkg-db-backup.tim… Daily dpkg database backup timer.


 6343 20:15:59.354701  [  OK  ] Started e2scrub_all.timer…etadata Check for All Filesystems.


 6344 20:15:59.375203  [  OK  ] Started fstrim.timer - Discard unused blocks once a week.


 6345 20:15:59.395039  [  OK  ] Started systemd-tmpfiles-c… Cleanup of Temporary Directories.


 6346 20:15:59.414356  [  OK  ] Reached target timers.target - Timer Units.


 6347 20:15:59.433243  [  OK  ] Listening on dbus.socket[…- D-Bus System Message Bus Socket.


 6348 20:15:59.450323  [  OK  ] Reached target sockets.target - Socket Units.


 6349 20:15:59.470358  [  OK  ] Reached target basic.target - Basic System.


 6350 20:15:59.517725           Starting alsa-restore.serv…- Save/Restore Sound Card State...


 6351 20:15:59.540321           Starting dbus.service - D-Bus System Message Bus...


 6352 20:15:59.579629           Starting e2scrub_reap.serv…e ext4 Metadata Check Snapshots...


 6353 20:15:59.681423           Starting systemd-logind.se…ice - User Login Management...


 6354 20:15:59.713223           Starting systemd-user-sess…vice - Permit User Sessions...


 6355 20:15:59.740300  [  OK  ] Finished alsa-restore.serv…m - Save/Restore Sound Card State.


 6356 20:15:59.760806  [  OK  ] Reached target sound.target - Sound Card.


 6357 20:15:59.840646  [  OK  ] Finished systemd-user-sess…ervice - Permit User Sessions.


 6358 20:15:59.896486  [  OK  ] Started getty@tty1.service - Getty on tty1.


 6359 20:15:59.925524  [  OK  ] Started serial-getty@ttyS0…rvice - Serial Getty on ttyS0.


 6360 20:15:59.950582  [  OK  ] Reached target getty.target - Login Prompts.


 6361 20:15:59.981401  [  OK  ] Finished e2scrub_reap.serv…ine ext4 Metadata Check Snapshots.


 6362 20:16:00.001692  [  OK  ] Started dbus.service - D-Bus System Message Bus.


 6363 20:16:00.051412  [  OK  ] Started systemd-logind.service - User Login Management.


 6364 20:16:00.071203  [  OK  ] Reached target multi-user.target - Multi-User System.


 6365 20:16:00.091264  [  OK  ] Reached target graphical.target - Graphical Interface.


 6366 20:16:00.142086           Starting systemd-update-ut… Record Runlevel Change in UTMP...


 6367 20:16:00.250903  [  OK  ] Finished systemd-update-ut… - Record Runlevel Change in UTMP.


 6368 20:16:00.348731  


 6369 20:16:00.351837  Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0

 6370 20:16:00.352259  

 6371 20:16:00.355023  debian-bookworm-arm64 login: root (automatic login)

 6372 20:16:00.355439  


 6373 20:16:00.645709  Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024 aarch64

 6374 20:16:00.646332  

 6375 20:16:00.652854  The programs included with the Debian GNU/Linux system are free software;

 6376 20:16:00.658996  the exact distribution terms for each program are described in the

 6377 20:16:00.662550  individual files in /usr/share/doc/*/copyright.

 6378 20:16:00.663036  

 6379 20:16:00.669111  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent

 6380 20:16:00.672606  permitted by applicable law.

 6381 20:16:01.874786  Matched prompt #10: / #
 6383 20:16:01.876357  Setting prompt string to ['/ #']
 6384 20:16:01.876990  end: 2.2.5.1 login-action (duration 00:00:20) [common]
 6386 20:16:01.878148  end: 2.2.5 auto-login-action (duration 00:00:20) [common]
 6387 20:16:01.878597  start: 2.2.6 expect-shell-connection (timeout 00:03:46) [common]
 6388 20:16:01.879027  Setting prompt string to ['/ #']
 6389 20:16:01.879393  Forcing a shell prompt, looking for ['/ #']
 6391 20:16:01.930568  / # 

 6392 20:16:01.931062  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
 6393 20:16:01.931525  Waiting using forced prompt support (timeout 00:02:30)
 6394 20:16:01.936953  

 6395 20:16:01.937875  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
 6396 20:16:01.938435  start: 2.2.7 export-device-env (timeout 00:03:46) [common]
 6398 20:16:02.039732  / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7'

 6399 20:16:02.046463  export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14063130/extract-nfsrootfs-nlqkxza7'

 6401 20:16:02.148047  / # export NFS_SERVER_IP='192.168.201.1'

 6402 20:16:02.154714  export NFS_SERVER_IP='192.168.201.1'

 6403 20:16:02.155696  end: 2.2.7 export-device-env (duration 00:00:00) [common]
 6404 20:16:02.156488  end: 2.2 depthcharge-retry (duration 00:01:15) [common]
 6405 20:16:02.157241  end: 2 depthcharge-action (duration 00:01:15) [common]
 6406 20:16:02.158075  start: 3 lava-test-retry (timeout 00:08:07) [common]
 6407 20:16:02.158832  start: 3.1 lava-test-shell (timeout 00:08:07) [common]
 6408 20:16:02.159387  Using namespace: common
 6410 20:16:02.260648  / # #

 6411 20:16:02.260804  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
 6412 20:16:02.265773  #

 6413 20:16:02.266044  Using /lava-14063130
 6415 20:16:02.366384  / # export SHELL=/bin/bash

 6416 20:16:02.371945  export SHELL=/bin/bash

 6418 20:16:02.472488  / # . /lava-14063130/environment

 6419 20:16:02.477752  . /lava-14063130/environment

 6421 20:16:02.582953  / # /lava-14063130/bin/lava-test-runner /lava-14063130/0

 6422 20:16:02.583124  Test shell timeout: 10s (minimum of the action and connection timeout)
 6423 20:16:02.587841  /lava-14063130/bin/lava-test-runner /lava-14063130/0

 6424 20:16:02.818511  + export TESTRUN_ID=0_timesync-off

 6425 20:16:02.820823  + TESTRUN_ID=0_timesync-off

 6426 20:16:02.824734  + cd /lava-14063130/0/tests/0_timesync-off

 6427 20:16:02.827787  ++ cat uuid

 6428 20:16:02.830970  + UUID=14063130_1.6.2.3.1

 6429 20:16:02.831052  + set +x

 6430 20:16:02.837772  <LAVA_SIGNAL_STARTRUN 0_timesync-off 14063130_1.6.2.3.1>

 6431 20:16:02.838033  Received signal: <STARTRUN> 0_timesync-off 14063130_1.6.2.3.1
 6432 20:16:02.838109  Starting test lava.0_timesync-off (14063130_1.6.2.3.1)
 6433 20:16:02.838211  Skipping test definition patterns.
 6434 20:16:02.840833  + systemctl stop systemd-timesyncd

 6435 20:16:02.893235  + set +x

 6436 20:16:02.896818  <LAVA_SIGNAL_ENDRUN 0_timesync-off 14063130_1.6.2.3.1>

 6437 20:16:02.897075  Received signal: <ENDRUN> 0_timesync-off 14063130_1.6.2.3.1
 6438 20:16:02.897202  Ending use of test pattern.
 6439 20:16:02.897333  Ending test lava.0_timesync-off (14063130_1.6.2.3.1), duration 0.06
 6441 20:16:02.950039  + export TESTRUN_ID=1_kselftest-rtc

 6442 20:16:02.953458  + TESTRUN_ID=1_kselftest-rtc

 6443 20:16:02.956858  + cd /lava-14063130/0/tests/1_kselftest-rtc

 6444 20:16:02.960155  ++ cat uuid

 6445 20:16:02.960238  + UUID=14063130_1.6.2.3.5

 6446 20:16:02.963660  + set +x

 6447 20:16:02.967054  <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14063130_1.6.2.3.5>

 6448 20:16:02.967311  Received signal: <STARTRUN> 1_kselftest-rtc 14063130_1.6.2.3.5
 6449 20:16:02.967384  Starting test lava.1_kselftest-rtc (14063130_1.6.2.3.5)
 6450 20:16:02.967463  Skipping test definition patterns.
 6451 20:16:02.969790  + cd ./automated/linux/kselftest/

 6452 20:16:02.996569  + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1

 6453 20:16:03.024267  INFO: install_deps skipped

 6454 20:16:03.509615  --2024-05-28 20:16:03--  http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz

 6455 20:16:03.531641  Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82

 6456 20:16:03.655764  Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.

 6457 20:16:03.780765  HTTP request sent, awaiting response... 200 OK

 6458 20:16:03.784346  Length: 1642660 (1.6M) [application/octet-stream]

 6459 20:16:03.787471  Saving to: 'kselftest_armhf.tar.gz'

 6460 20:16:03.787890  

 6461 20:16:03.788219  

 6462 20:16:04.030657  kselftest_armhf.tar   0%[                    ]       0  --.-KB/s               

 6463 20:16:04.278593  kselftest_armhf.tar   3%[                    ]  50.15K   199KB/s               

 6464 20:16:04.686763  kselftest_armhf.tar  13%[=>                  ] 214.67K   428KB/s               

 6465 20:16:04.698975  kselftest_armhf.tar  39%[======>             ] 640.30K   701KB/s               

 6466 20:16:04.705555  kselftest_armhf.tar 100%[===================>]   1.57M  1.69MB/s    in 0.9s    

 6467 20:16:04.705682  

 6468 20:16:04.850262  2024-05-28 20:16:04 (1.69 MB/s) - 'kselftest_armhf.tar.gz' saved [1642660/1642660]

 6469 20:16:04.850401  

 6470 20:16:08.812806  skiplist:

 6471 20:16:08.815896  ========================================

 6472 20:16:08.819194  ========================================

 6473 20:16:08.866882  rtc:rtctest

 6474 20:16:08.887539  ============== Tests to run ===============

 6475 20:16:08.888070  rtc:rtctest

 6476 20:16:08.890606  ===========End Tests to run ===============

 6477 20:16:08.895458  shardfile-rtc pass

 6478 20:16:09.004288  <12>[   26.371318] kselftest: Running tests in rtc

 6479 20:16:09.013717  TAP version 13

 6480 20:16:09.028042  1..1

 6481 20:16:09.067526  # selftests: rtc: rtctest

 6482 20:16:09.544356  # TAP version 13

 6483 20:16:09.544839  # 1..8

 6484 20:16:09.547518  # # Starting 8 tests from 2 test cases.

 6485 20:16:09.550863  # #  RUN           rtc.date_read ...

 6486 20:16:09.557484  # # rtctest.c:49:date_read:Current RTC date/time is 28/05/2024 20:16:09.

 6487 20:16:09.560713  # #            OK  rtc.date_read

 6488 20:16:09.564277  # ok 1 rtc.date_read

 6489 20:16:09.568022  # #  RUN           rtc.date_read_loop ...

 6490 20:16:09.577311  # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).

 6491 20:16:20.490687  <6>[   37.860588] vaux18: disabling

 6492 20:16:20.493712  <6>[   37.864107] vio28: disabling

 6493 20:16:40.141923  # # rtctest.c:115:date_read_loop:Performed 2712 RTC time reads.

 6494 20:16:40.144931  # #            OK  rtc.date_read_loop

 6495 20:16:40.148468  # ok 2 rtc.date_read_loop

 6496 20:16:40.151721  # #  RUN           rtc.uie_read ...

 6497 20:16:43.123634  # #            OK  rtc.uie_read

 6498 20:16:43.126576  # ok 3 rtc.uie_read

 6499 20:16:43.130236  # #  RUN           rtc.uie_select ...

 6500 20:16:46.123292  # #            OK  rtc.uie_select

 6501 20:16:46.126641  # ok 4 rtc.uie_select

 6502 20:16:46.129966  # #  RUN           rtc.alarm_alm_set ...

 6503 20:16:46.136821  # # rtctest.c:202:alarm_alm_set:Alarm time now set to 20:16:49.

 6504 20:16:46.143401  # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)

 6505 20:16:46.146416  # # alarm_alm_set: Test terminated by assertion

 6506 20:16:46.149946  # #          FAIL  rtc.alarm_alm_set

 6507 20:16:46.152932  # not ok 5 rtc.alarm_alm_set

 6508 20:16:46.156267  # #  RUN           rtc.alarm_wkalm_set ...

 6509 20:16:46.163241  # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 28/05/2024 20:16:49.

 6510 20:16:49.126279  # #            OK  rtc.alarm_wkalm_set

 6511 20:16:49.126456  # ok 6 rtc.alarm_wkalm_set

 6512 20:16:49.132832  # #  RUN           rtc.alarm_alm_set_minute ...

 6513 20:16:49.136029  # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 20:17:00.

 6514 20:16:49.142777  # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)

 6515 20:16:49.149644  # # alarm_alm_set_minute: Test terminated by assertion

 6516 20:16:49.153298  # #          FAIL  rtc.alarm_alm_set_minute

 6517 20:16:49.156411  # not ok 7 rtc.alarm_alm_set_minute

 6518 20:16:49.159755  # #  RUN           rtc.alarm_wkalm_set_minute ...

 6519 20:16:49.166700  # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 28/05/2024 20:17:00.

 6520 20:17:00.126956  # #            OK  rtc.alarm_wkalm_set_minute

 6521 20:17:00.130518  # ok 8 rtc.alarm_wkalm_set_minute

 6522 20:17:00.133738  # # FAILED: 6 / 8 tests passed.

 6523 20:17:00.136999  # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0

 6524 20:17:00.140238  not ok 1 selftests: rtc: rtctest # exit=1

 6525 20:17:01.682473  rtc_rtctest_rtc_date_read pass

 6526 20:17:01.685476  rtc_rtctest_rtc_date_read_loop pass

 6527 20:17:01.688946  rtc_rtctest_rtc_uie_read pass

 6528 20:17:01.692228  rtc_rtctest_rtc_uie_select pass

 6529 20:17:01.695665  rtc_rtctest_rtc_alarm_alm_set fail

 6530 20:17:01.699391  rtc_rtctest_rtc_alarm_wkalm_set pass

 6531 20:17:01.702403  rtc_rtctest_rtc_alarm_alm_set_minute fail

 6532 20:17:01.705672  rtc_rtctest_rtc_alarm_wkalm_set_minute pass

 6533 20:17:01.708661  rtc_rtctest fail

 6534 20:17:01.775115  + ../../utils/send-to-lava.sh ./output/result.txt

 6535 20:17:01.843750  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>

 6536 20:17:01.844715  Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
 6538 20:17:01.900088  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>

 6539 20:17:01.900966  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
 6541 20:17:01.953150  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>

 6542 20:17:01.954085  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
 6544 20:17:01.995555  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>

 6545 20:17:01.996480  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
 6547 20:17:02.041907  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>

 6548 20:17:02.042808  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
 6550 20:17:02.087864  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>

 6551 20:17:02.088756  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
 6553 20:17:02.133194  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>

 6554 20:17:02.134072  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
 6556 20:17:02.171621  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>

 6557 20:17:02.172526  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
 6559 20:17:02.212745  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>

 6560 20:17:02.213603  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
 6562 20:17:02.250177  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>

 6563 20:17:02.250746  + set +x

 6564 20:17:02.251570  Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
 6566 20:17:02.257073  <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14063130_1.6.2.3.5>

 6567 20:17:02.257578  <LAVA_TEST_RUNNER EXIT>

 6568 20:17:02.258159  Received signal: <ENDRUN> 1_kselftest-rtc 14063130_1.6.2.3.5
 6569 20:17:02.258506  Ending use of test pattern.
 6570 20:17:02.258811  Ending test lava.1_kselftest-rtc (14063130_1.6.2.3.5), duration 59.29
 6572 20:17:02.260013  ok: lava_test_shell seems to have completed
 6573 20:17:02.260985  rtc_rtctest: fail
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
shardfile-rtc: pass

 6574 20:17:02.261728  end: 3.1 lava-test-shell (duration 00:01:00) [common]
 6575 20:17:02.262457  end: 3 lava-test-retry (duration 00:01:00) [common]
 6576 20:17:02.263075  start: 4 finalize (timeout 00:07:06) [common]
 6577 20:17:02.263675  start: 4.1 power-off (timeout 00:00:30) [common]
 6578 20:17:02.265066  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
 6579 20:17:03.751094  >> Command sent successfully.

 6580 20:17:03.761076  Returned 0 in 1 seconds
 6581 20:17:03.862281  end: 4.1 power-off (duration 00:00:02) [common]
 6583 20:17:03.863717  start: 4.2 read-feedback (timeout 00:07:05) [common]
 6584 20:17:03.864981  Listened to connection for namespace 'common' for up to 1s
 6585 20:17:03.865868  Listened to connection for namespace 'common' for up to 1s
 6586 20:17:04.865551  Finalising connection for namespace 'common'
 6587 20:17:04.866189  Disconnecting from shell: Finalise
 6588 20:17:04.866572  / # 
 6589 20:17:04.967526  end: 4.2 read-feedback (duration 00:00:01) [common]
 6590 20:17:04.968159  end: 4 finalize (duration 00:00:03) [common]
 6591 20:17:04.968720  Cleaning after the job
 6592 20:17:04.969183  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/ramdisk
 6593 20:17:04.978360  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/kernel
 6594 20:17:05.012127  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/dtb
 6595 20:17:05.012502  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/nfsrootfs
 6596 20:17:05.079937  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063130/tftp-deploy-wlzgvhaf/modules
 6597 20:17:05.085470  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14063130
 6598 20:17:05.634412  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14063130
 6599 20:17:05.634595  Job finished correctly