Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 52
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 20:08:22.407577 lava-dispatcher, installed at version: 2024.03
2 20:08:22.407800 start: 0 validate
3 20:08:22.407943 Start time: 2024-05-28 20:08:22.407934+00:00 (UTC)
4 20:08:22.408074 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:08:22.408211 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:08:22.668833 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:08:22.669497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 20:08:22.929926 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:08:22.930608 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 20:08:23.196137 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:08:23.196820 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:08:23.459800 Using caching service: 'http://localhost/cache/?uri=%s'
13 20:08:23.460496 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.91-cip21%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 20:08:23.720970 validate duration: 1.31
16 20:08:23.722209 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:08:23.722709 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:08:23.723148 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:08:23.723778 Not decompressing ramdisk as can be used compressed.
20 20:08:23.724213 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/initrd.cpio.gz
21 20:08:23.724541 saving as /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/ramdisk/initrd.cpio.gz
22 20:08:23.724869 total size: 5628151 (5 MB)
23 20:08:23.729762 progress 0 % (0 MB)
24 20:08:23.738287 progress 5 % (0 MB)
25 20:08:23.744922 progress 10 % (0 MB)
26 20:08:23.749101 progress 15 % (0 MB)
27 20:08:23.752894 progress 20 % (1 MB)
28 20:08:23.756038 progress 25 % (1 MB)
29 20:08:23.758885 progress 30 % (1 MB)
30 20:08:23.761609 progress 35 % (1 MB)
31 20:08:23.763830 progress 40 % (2 MB)
32 20:08:23.766209 progress 45 % (2 MB)
33 20:08:23.768149 progress 50 % (2 MB)
34 20:08:23.770260 progress 55 % (2 MB)
35 20:08:23.772234 progress 60 % (3 MB)
36 20:08:23.773923 progress 65 % (3 MB)
37 20:08:23.775849 progress 70 % (3 MB)
38 20:08:23.777372 progress 75 % (4 MB)
39 20:08:23.779070 progress 80 % (4 MB)
40 20:08:23.780604 progress 85 % (4 MB)
41 20:08:23.782318 progress 90 % (4 MB)
42 20:08:23.784032 progress 95 % (5 MB)
43 20:08:23.785573 progress 100 % (5 MB)
44 20:08:23.785808 5 MB downloaded in 0.06 s (88.05 MB/s)
45 20:08:23.785980 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:08:23.786248 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:08:23.786347 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:08:23.786445 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:08:23.786595 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 20:08:23.786671 saving as /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/kernel/Image
52 20:08:23.786752 total size: 54682112 (52 MB)
53 20:08:23.786824 No compression specified
54 20:08:23.788048 progress 0 % (0 MB)
55 20:08:23.803346 progress 5 % (2 MB)
56 20:08:23.818735 progress 10 % (5 MB)
57 20:08:23.834332 progress 15 % (7 MB)
58 20:08:23.849646 progress 20 % (10 MB)
59 20:08:23.865173 progress 25 % (13 MB)
60 20:08:23.880488 progress 30 % (15 MB)
61 20:08:23.895966 progress 35 % (18 MB)
62 20:08:23.911235 progress 40 % (20 MB)
63 20:08:23.926601 progress 45 % (23 MB)
64 20:08:23.942237 progress 50 % (26 MB)
65 20:08:23.957666 progress 55 % (28 MB)
66 20:08:23.973202 progress 60 % (31 MB)
67 20:08:23.988593 progress 65 % (33 MB)
68 20:08:24.004450 progress 70 % (36 MB)
69 20:08:24.019820 progress 75 % (39 MB)
70 20:08:24.035335 progress 80 % (41 MB)
71 20:08:24.050750 progress 85 % (44 MB)
72 20:08:24.066146 progress 90 % (46 MB)
73 20:08:24.081488 progress 95 % (49 MB)
74 20:08:24.096607 progress 100 % (52 MB)
75 20:08:24.096874 52 MB downloaded in 0.31 s (168.16 MB/s)
76 20:08:24.097039 end: 1.2.1 http-download (duration 00:00:00) [common]
78 20:08:24.097301 end: 1.2 download-retry (duration 00:00:00) [common]
79 20:08:24.097397 start: 1.3 download-retry (timeout 00:10:00) [common]
80 20:08:24.097491 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 20:08:24.097646 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 20:08:24.097723 saving as /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 20:08:24.097791 total size: 57695 (0 MB)
84 20:08:24.097859 No compression specified
85 20:08:24.100436 progress 56 % (0 MB)
86 20:08:24.100745 progress 100 % (0 MB)
87 20:08:24.100971 0 MB downloaded in 0.00 s (17.32 MB/s)
88 20:08:24.101107 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:08:24.101357 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:08:24.101450 start: 1.4 download-retry (timeout 00:10:00) [common]
92 20:08:24.101542 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 20:08:24.101671 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/full.rootfs.tar.xz
94 20:08:24.101746 saving as /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/nfsrootfs/full.rootfs.tar
95 20:08:24.101813 total size: 69067788 (65 MB)
96 20:08:24.101882 Using unxz to decompress xz
97 20:08:24.106274 progress 0 % (0 MB)
98 20:08:24.326876 progress 5 % (3 MB)
99 20:08:24.551751 progress 10 % (6 MB)
100 20:08:24.779023 progress 15 % (9 MB)
101 20:08:24.964758 progress 20 % (13 MB)
102 20:08:25.166629 progress 25 % (16 MB)
103 20:08:25.400767 progress 30 % (19 MB)
104 20:08:25.535695 progress 35 % (23 MB)
105 20:08:25.648921 progress 40 % (26 MB)
106 20:08:25.877887 progress 45 % (29 MB)
107 20:08:26.120259 progress 50 % (32 MB)
108 20:08:26.355518 progress 55 % (36 MB)
109 20:08:26.607983 progress 60 % (39 MB)
110 20:08:26.826116 progress 65 % (42 MB)
111 20:08:27.046915 progress 70 % (46 MB)
112 20:08:27.270491 progress 75 % (49 MB)
113 20:08:27.519645 progress 80 % (52 MB)
114 20:08:27.721383 progress 85 % (56 MB)
115 20:08:27.943203 progress 90 % (59 MB)
116 20:08:28.176100 progress 95 % (62 MB)
117 20:08:28.407169 progress 100 % (65 MB)
118 20:08:28.413981 65 MB downloaded in 4.31 s (15.27 MB/s)
119 20:08:28.414311 end: 1.4.1 http-download (duration 00:00:04) [common]
121 20:08:28.414762 end: 1.4 download-retry (duration 00:00:04) [common]
122 20:08:28.414896 start: 1.5 download-retry (timeout 00:09:55) [common]
123 20:08:28.415033 start: 1.5.1 http-download (timeout 00:09:55) [common]
124 20:08:28.415240 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.91-cip21/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 20:08:28.415348 saving as /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/modules/modules.tar
126 20:08:28.415449 total size: 8607916 (8 MB)
127 20:08:28.415525 Using unxz to decompress xz
128 20:08:28.420045 progress 0 % (0 MB)
129 20:08:28.441967 progress 5 % (0 MB)
130 20:08:28.469488 progress 10 % (0 MB)
131 20:08:28.499947 progress 15 % (1 MB)
132 20:08:28.527497 progress 20 % (1 MB)
133 20:08:28.555839 progress 25 % (2 MB)
134 20:08:28.583285 progress 30 % (2 MB)
135 20:08:28.609270 progress 35 % (2 MB)
136 20:08:28.638472 progress 40 % (3 MB)
137 20:08:28.666300 progress 45 % (3 MB)
138 20:08:28.693096 progress 50 % (4 MB)
139 20:08:28.720617 progress 55 % (4 MB)
140 20:08:28.748067 progress 60 % (4 MB)
141 20:08:28.774675 progress 65 % (5 MB)
142 20:08:28.803883 progress 70 % (5 MB)
143 20:08:28.833905 progress 75 % (6 MB)
144 20:08:28.860249 progress 80 % (6 MB)
145 20:08:28.886639 progress 85 % (7 MB)
146 20:08:28.913045 progress 90 % (7 MB)
147 20:08:28.945494 progress 95 % (7 MB)
148 20:08:28.976812 progress 100 % (8 MB)
149 20:08:28.983177 8 MB downloaded in 0.57 s (14.46 MB/s)
150 20:08:28.983480 end: 1.5.1 http-download (duration 00:00:01) [common]
152 20:08:28.983795 end: 1.5 download-retry (duration 00:00:01) [common]
153 20:08:28.983900 start: 1.6 prepare-tftp-overlay (timeout 00:09:55) [common]
154 20:08:28.984007 start: 1.6.1 extract-nfsrootfs (timeout 00:09:55) [common]
155 20:08:30.798725 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz
156 20:08:30.798944 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 20:08:30.799059 start: 1.6.2 lava-overlay (timeout 00:09:53) [common]
158 20:08:30.799254 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i
159 20:08:30.799411 makedir: /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin
160 20:08:30.799543 makedir: /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/tests
161 20:08:30.799657 makedir: /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/results
162 20:08:30.799769 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-add-keys
163 20:08:30.799927 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-add-sources
164 20:08:30.800071 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-background-process-start
165 20:08:30.800222 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-background-process-stop
166 20:08:30.800364 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-common-functions
167 20:08:30.800509 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-echo-ipv4
168 20:08:30.800651 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-install-packages
169 20:08:30.800801 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-installed-packages
170 20:08:30.800939 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-os-build
171 20:08:30.801077 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-probe-channel
172 20:08:30.801215 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-probe-ip
173 20:08:30.801352 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-target-ip
174 20:08:30.801490 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-target-mac
175 20:08:30.801626 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-target-storage
176 20:08:30.801766 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-case
177 20:08:30.801904 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-event
178 20:08:30.802041 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-feedback
179 20:08:30.802177 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-raise
180 20:08:30.802313 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-reference
181 20:08:30.802455 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-runner
182 20:08:30.802592 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-set
183 20:08:30.802729 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-test-shell
184 20:08:30.802869 Updating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-install-packages (oe)
185 20:08:30.803034 Updating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/bin/lava-installed-packages (oe)
186 20:08:30.803167 Creating /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/environment
187 20:08:30.803276 LAVA metadata
188 20:08:30.803350 - LAVA_JOB_ID=14063016
189 20:08:30.803432 - LAVA_DISPATCHER_IP=192.168.201.1
190 20:08:30.803552 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:53) [common]
191 20:08:30.803634 skipped lava-vland-overlay
192 20:08:30.803726 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 20:08:30.803820 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:53) [common]
194 20:08:30.803896 skipped lava-multinode-overlay
195 20:08:30.803988 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 20:08:30.804075 start: 1.6.2.3 test-definition (timeout 00:09:53) [common]
197 20:08:30.804159 Loading test definitions
198 20:08:30.804258 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:53) [common]
199 20:08:30.804336 Using /lava-14063016 at stage 0
200 20:08:30.804681 uuid=14063016_1.6.2.3.1 testdef=None
201 20:08:30.804780 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 20:08:30.804874 start: 1.6.2.3.2 test-overlay (timeout 00:09:53) [common]
203 20:08:30.805418 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 20:08:30.805660 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:53) [common]
206 20:08:30.806364 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 20:08:30.806621 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:53) [common]
209 20:08:30.807398 runner path: /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/0/tests/0_lc-compliance test_uuid 14063016_1.6.2.3.1
210 20:08:30.807821 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 20:08:30.808053 Creating lava-test-runner.conf files
213 20:08:30.808124 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14063016/lava-overlay-tj74fa3i/lava-14063016/0 for stage 0
214 20:08:30.808225 - 0_lc-compliance
215 20:08:30.808334 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 20:08:30.808430 start: 1.6.2.4 compress-overlay (timeout 00:09:53) [common]
217 20:08:30.814998 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 20:08:30.815152 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
219 20:08:30.815252 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 20:08:30.815348 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 20:08:30.815454 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
222 20:08:31.002838 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 20:08:31.003313 start: 1.6.4 extract-modules (timeout 00:09:53) [common]
224 20:08:31.003484 extracting modules file /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz
225 20:08:31.290877 extracting modules file /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14063016/extract-overlay-ramdisk-11tzj_dn/ramdisk
226 20:08:31.537955 end: 1.6.4 extract-modules (duration 00:00:01) [common]
227 20:08:31.538139 start: 1.6.5 apply-overlay-tftp (timeout 00:09:52) [common]
228 20:08:31.538244 [common] Applying overlay to NFS
229 20:08:31.538322 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14063016/compress-overlay-mgw_lbf2/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz
230 20:08:31.545534 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 20:08:31.545669 start: 1.6.6 configure-preseed-file (timeout 00:09:52) [common]
232 20:08:31.545770 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 20:08:31.545866 start: 1.6.7 compress-ramdisk (timeout 00:09:52) [common]
234 20:08:31.545954 Building ramdisk /var/lib/lava/dispatcher/tmp/14063016/extract-overlay-ramdisk-11tzj_dn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14063016/extract-overlay-ramdisk-11tzj_dn/ramdisk
235 20:08:31.943808 >> 130335 blocks
236 20:08:34.225732 rename /var/lib/lava/dispatcher/tmp/14063016/extract-overlay-ramdisk-11tzj_dn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/ramdisk/ramdisk.cpio.gz
237 20:08:34.226272 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
238 20:08:34.226454 start: 1.6.8 prepare-kernel (timeout 00:09:49) [common]
239 20:08:34.226610 start: 1.6.8.1 prepare-fit (timeout 00:09:49) [common]
240 20:08:34.226770 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/kernel/Image']
241 20:08:48.760319 Returned 0 in 14 seconds
242 20:08:48.861361 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/kernel/image.itb
243 20:08:49.274314 output: FIT description: Kernel Image image with one or more FDT blobs
244 20:08:49.274730 output: Created: Tue May 28 21:08:49 2024
245 20:08:49.274812 output: Image 0 (kernel-1)
246 20:08:49.274885 output: Description:
247 20:08:49.274955 output: Created: Tue May 28 21:08:49 2024
248 20:08:49.275023 output: Type: Kernel Image
249 20:08:49.275089 output: Compression: lzma compressed
250 20:08:49.275154 output: Data Size: 13061303 Bytes = 12755.18 KiB = 12.46 MiB
251 20:08:49.275221 output: Architecture: AArch64
252 20:08:49.275286 output: OS: Linux
253 20:08:49.275351 output: Load Address: 0x00000000
254 20:08:49.275424 output: Entry Point: 0x00000000
255 20:08:49.275493 output: Hash algo: crc32
256 20:08:49.275562 output: Hash value: 0578ee26
257 20:08:49.275628 output: Image 1 (fdt-1)
258 20:08:49.275694 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 20:08:49.275761 output: Created: Tue May 28 21:08:49 2024
260 20:08:49.275824 output: Type: Flat Device Tree
261 20:08:49.275885 output: Compression: uncompressed
262 20:08:49.275945 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 20:08:49.276004 output: Architecture: AArch64
264 20:08:49.276065 output: Hash algo: crc32
265 20:08:49.276125 output: Hash value: a9713552
266 20:08:49.276185 output: Image 2 (ramdisk-1)
267 20:08:49.276243 output: Description: unavailable
268 20:08:49.276312 output: Created: Tue May 28 21:08:49 2024
269 20:08:49.276373 output: Type: RAMDisk Image
270 20:08:49.276433 output: Compression: Unknown Compression
271 20:08:49.276493 output: Data Size: 18728430 Bytes = 18289.48 KiB = 17.86 MiB
272 20:08:49.276553 output: Architecture: AArch64
273 20:08:49.276613 output: OS: Linux
274 20:08:49.276672 output: Load Address: unavailable
275 20:08:49.276732 output: Entry Point: unavailable
276 20:08:49.276791 output: Hash algo: crc32
277 20:08:49.276850 output: Hash value: 77381803
278 20:08:49.276910 output: Default Configuration: 'conf-1'
279 20:08:49.276969 output: Configuration 0 (conf-1)
280 20:08:49.277029 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 20:08:49.277089 output: Kernel: kernel-1
282 20:08:49.277148 output: Init Ramdisk: ramdisk-1
283 20:08:49.277207 output: FDT: fdt-1
284 20:08:49.277265 output: Loadables: kernel-1
285 20:08:49.277324 output:
286 20:08:49.277546 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
287 20:08:49.277652 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
288 20:08:49.277769 end: 1.6 prepare-tftp-overlay (duration 00:00:20) [common]
289 20:08:49.277878 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:34) [common]
290 20:08:49.277965 No LXC device requested
291 20:08:49.278054 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 20:08:49.278145 start: 1.8 deploy-device-env (timeout 00:09:34) [common]
293 20:08:49.278232 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 20:08:49.278305 Checking files for TFTP limit of 4294967296 bytes.
295 20:08:49.278862 end: 1 tftp-deploy (duration 00:00:26) [common]
296 20:08:49.278984 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 20:08:49.279087 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 20:08:49.279228 substitutions:
299 20:08:49.279302 - {DTB}: 14063016/tftp-deploy-5l9l971u/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 20:08:49.279374 - {INITRD}: 14063016/tftp-deploy-5l9l971u/ramdisk/ramdisk.cpio.gz
301 20:08:49.279449 - {KERNEL}: 14063016/tftp-deploy-5l9l971u/kernel/Image
302 20:08:49.279515 - {LAVA_MAC}: None
303 20:08:49.279579 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz
304 20:08:49.279646 - {NFS_SERVER_IP}: 192.168.201.1
305 20:08:49.279709 - {PRESEED_CONFIG}: None
306 20:08:49.279771 - {PRESEED_LOCAL}: None
307 20:08:49.279832 - {RAMDISK}: 14063016/tftp-deploy-5l9l971u/ramdisk/ramdisk.cpio.gz
308 20:08:49.279894 - {ROOT_PART}: None
309 20:08:49.279955 - {ROOT}: None
310 20:08:49.280016 - {SERVER_IP}: 192.168.201.1
311 20:08:49.280077 - {TEE}: None
312 20:08:49.280138 Parsed boot commands:
313 20:08:49.280197 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 20:08:49.280444 Parsed boot commands: tftpboot 192.168.201.1 14063016/tftp-deploy-5l9l971u/kernel/image.itb 14063016/tftp-deploy-5l9l971u/kernel/cmdline
315 20:08:49.280552 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 20:08:49.280647 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 20:08:49.280752 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 20:08:49.280848 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 20:08:49.280930 Not connected, no need to disconnect.
320 20:08:49.281013 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 20:08:49.281105 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 20:08:49.281185 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
323 20:08:49.285228 Setting prompt string to ['lava-test: # ']
324 20:08:49.285644 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 20:08:49.285763 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 20:08:49.285881 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 20:08:49.285982 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 20:08:49.286187 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
329 20:09:11.437375 Returned 0 in 22 seconds
330 20:09:11.538108 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
332 20:09:11.538482 end: 2.2.2 reset-device (duration 00:00:22) [common]
333 20:09:11.538595 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
334 20:09:11.538694 Setting prompt string to 'Starting depthcharge on Juniper...'
335 20:09:11.538769 Changing prompt to 'Starting depthcharge on Juniper...'
336 20:09:11.538842 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
337 20:09:11.539294 [Enter `^Ec?' for help]
338 20:09:11.539383 [DL] 00000000 00000000 010701
339 20:09:11.539472
340 20:09:11.539544
341 20:09:11.539614 F0: 102B 0000
342 20:09:11.539684
343 20:09:11.539752 F3: 1006 0033 [0200]
344 20:09:11.539819
345 20:09:11.539880 F3: 4001 00E0 [0200]
346 20:09:11.539942
347 20:09:11.540003 F3: 0000 0000
348 20:09:11.540064
349 20:09:11.540124 V0: 0000 0000 [0001]
350 20:09:11.540184
351 20:09:11.540244 00: 1027 0002
352 20:09:11.540308
353 20:09:11.540369 01: 0000 0000
354 20:09:11.540431
355 20:09:11.540491 BP: 0C00 0251 [0000]
356 20:09:11.540565
357 20:09:11.540628 G0: 1182 0000
358 20:09:11.540688
359 20:09:11.540748 EC: 0004 0000 [0001]
360 20:09:11.540809
361 20:09:11.540869 S7: 0000 0000 [0000]
362 20:09:11.540929
363 20:09:11.540989 CC: 0000 0000 [0001]
364 20:09:11.541048
365 20:09:11.541108 T0: 0000 00DB [000F]
366 20:09:11.541170
367 20:09:11.541230 Jump to BL
368 20:09:11.541290
369 20:09:11.541350
370 20:09:11.541409
371 20:09:11.541469 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
372 20:09:11.541535 ARM64: Exception handlers installed.
373 20:09:11.541596 ARM64: Testing exception
374 20:09:11.541656 ARM64: Done test exception
375 20:09:11.541716 WDT: Last reset was cold boot
376 20:09:11.541776 SPI0(PAD0) initialized at 992727 Hz
377 20:09:11.541835 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
378 20:09:11.541896 Manufacturer: ef
379 20:09:11.541956 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
380 20:09:11.542016 Probing TPM: . done!
381 20:09:11.542076 TPM ready after 0 ms
382 20:09:11.542136 Connected to device vid:did:rid of 1ae0:0028:00
383 20:09:11.542196 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
384 20:09:11.542258 Initialized TPM device CR50 revision 0
385 20:09:11.542318 tlcl_send_startup: Startup return code is 0
386 20:09:11.542379 TPM: setup succeeded
387 20:09:11.542439 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
388 20:09:11.542499 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
389 20:09:11.542560 in-header: 03 19 00 00 08 00 00 00
390 20:09:11.542620 in-data: a2 e0 47 00 13 00 00 00
391 20:09:11.542680 Chrome EC: UHEPI supported
392 20:09:11.542740 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
393 20:09:11.542801 in-header: 03 a1 00 00 08 00 00 00
394 20:09:11.542860 in-data: 84 60 60 10 00 00 00 00
395 20:09:11.542920 Phase 1
396 20:09:11.542979 FMAP: area GBB found @ 3f5000 (12032 bytes)
397 20:09:11.543058 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
398 20:09:11.543123 VB2:vb2_check_recovery() Recovery was requested manually
399 20:09:11.543184 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
400 20:09:11.543245 Recovery requested (1009000e)
401 20:09:11.543306 tlcl_extend: response is 0
402 20:09:11.543366 tlcl_extend: response is 0
403 20:09:11.543437
404 20:09:11.543499
405 20:09:11.543560 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
406 20:09:11.543621 ARM64: Exception handlers installed.
407 20:09:11.543682 ARM64: Testing exception
408 20:09:11.543742 ARM64: Done test exception
409 20:09:11.543802 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc27f, sec=0x2005
410 20:09:11.543862 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
411 20:09:11.543922 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
412 20:09:11.543983 [RTC]rtc_get_frequency_meter,134: input=0xf, output=912
413 20:09:11.544043 [RTC]rtc_get_frequency_meter,134: input=0x7, output=780
414 20:09:11.544103 [RTC]rtc_get_frequency_meter,134: input=0xb, output=845
415 20:09:11.544163 [RTC]rtc_get_frequency_meter,134: input=0x9, output=813
416 20:09:11.544224 [RTC]rtc_get_frequency_meter,134: input=0x8, output=795
417 20:09:11.544283 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
418 20:09:11.544343 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
419 20:09:11.544404 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
420 20:09:11.544464 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
421 20:09:11.544524 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
422 20:09:11.544585 in-header: 03 19 00 00 08 00 00 00
423 20:09:11.544645 in-data: a2 e0 47 00 13 00 00 00
424 20:09:11.544705 Chrome EC: UHEPI supported
425 20:09:11.544764 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
426 20:09:11.544825 in-header: 03 a1 00 00 08 00 00 00
427 20:09:11.544884 in-data: 84 60 60 10 00 00 00 00
428 20:09:11.544944 Skip loading cached calibration data
429 20:09:11.545005 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
430 20:09:11.545065 in-header: 03 a1 00 00 08 00 00 00
431 20:09:11.545125 in-data: 84 60 60 10 00 00 00 00
432 20:09:11.545185 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
433 20:09:11.545245 in-header: 03 a1 00 00 08 00 00 00
434 20:09:11.545305 in-data: 84 60 60 10 00 00 00 00
435 20:09:11.545365 ADC[3]: Raw value=216216 ID=1
436 20:09:11.545425 Manufacturer: ef
437 20:09:11.545485 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
438 20:09:11.545545 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
439 20:09:11.545605 CBFS @ 21000 size 3d4000
440 20:09:11.545665 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
441 20:09:11.545725 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
442 20:09:11.545785 CBFS: Found @ offset 3c700 size 44
443 20:09:11.545845 DRAM-K: Full Calibration
444 20:09:11.545905 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
445 20:09:11.545965 CBFS @ 21000 size 3d4000
446 20:09:11.546025 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
447 20:09:11.546085 CBFS: Locating 'fallback/dram'
448 20:09:11.546145 CBFS: Found @ offset 24b00 size 12268
449 20:09:11.546205 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
450 20:09:11.546265 ddr_geometry: 1, config: 0x0
451 20:09:11.546324 header.status = 0x0
452 20:09:11.546385 header.magic = 0x44524d4b (expected: 0x44524d4b)
453 20:09:11.546445 header.version = 0x5 (expected: 0x5)
454 20:09:11.546505 header.size = 0x8f0 (expected: 0x8f0)
455 20:09:11.546564 header.config = 0x0
456 20:09:11.546624 header.flags = 0x0
457 20:09:11.546683 header.checksum = 0x0
458 20:09:11.546936 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
459 20:09:11.547004 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
460 20:09:11.547093 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
461 20:09:11.547156 ddr_geometry:1
462 20:09:11.547217 [EMI] new MDL number = 1
463 20:09:11.547277 dram_cbt_mode_extern: 0
464 20:09:11.547338 dram_cbt_mode [RK0]: 0, [RK1]: 0
465 20:09:11.547398 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
466 20:09:11.547472
467 20:09:11.547532
468 20:09:11.547592 [Bianco] ETT version 0.0.0.1
469 20:09:11.547653 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
470 20:09:11.547713
471 20:09:11.547773 vSetVcoreByFreq with vcore:762500, freq=1600
472 20:09:11.547835
473 20:09:11.547895 [DramcInit]
474 20:09:11.547955 AutoRefreshCKEOff AutoREF OFF
475 20:09:11.548014 DDRPhyPLLSetting-CKEOFF
476 20:09:11.548074 DDRPhyPLLSetting-CKEON
477 20:09:11.548134
478 20:09:11.548193 Enable WDQS
479 20:09:11.548252 [ModeRegInit_LP4] CH0 RK0
480 20:09:11.548312 Write Rank0 MR13 =0x18
481 20:09:11.548372 Write Rank0 MR12 =0x5d
482 20:09:11.548432 Write Rank0 MR1 =0x56
483 20:09:11.548491 Write Rank0 MR2 =0x1a
484 20:09:11.548550 Write Rank0 MR11 =0x0
485 20:09:11.548609 Write Rank0 MR22 =0x38
486 20:09:11.548668 Write Rank0 MR14 =0x5d
487 20:09:11.548727 Write Rank0 MR3 =0x30
488 20:09:11.548787 Write Rank0 MR13 =0x58
489 20:09:11.548846 Write Rank0 MR12 =0x5d
490 20:09:11.548906 Write Rank0 MR1 =0x56
491 20:09:11.548965 Write Rank0 MR2 =0x2d
492 20:09:11.549033 Write Rank0 MR11 =0x23
493 20:09:11.549127 Write Rank0 MR22 =0x34
494 20:09:11.549193 Write Rank0 MR14 =0x10
495 20:09:11.549254 Write Rank0 MR3 =0x30
496 20:09:11.549314 Write Rank0 MR13 =0xd8
497 20:09:11.549374 [ModeRegInit_LP4] CH0 RK1
498 20:09:11.549433 Write Rank1 MR13 =0x18
499 20:09:11.549493 Write Rank1 MR12 =0x5d
500 20:09:11.549553 Write Rank1 MR1 =0x56
501 20:09:11.549612 Write Rank1 MR2 =0x1a
502 20:09:11.549671 Write Rank1 MR11 =0x0
503 20:09:11.549731 Write Rank1 MR22 =0x38
504 20:09:11.549790 Write Rank1 MR14 =0x5d
505 20:09:11.549849 Write Rank1 MR3 =0x30
506 20:09:11.549908 Write Rank1 MR13 =0x58
507 20:09:11.549967 Write Rank1 MR12 =0x5d
508 20:09:11.550027 Write Rank1 MR1 =0x56
509 20:09:11.550085 Write Rank1 MR2 =0x2d
510 20:09:11.550145 Write Rank1 MR11 =0x23
511 20:09:11.550204 Write Rank1 MR22 =0x34
512 20:09:11.550263 Write Rank1 MR14 =0x10
513 20:09:11.550323 Write Rank1 MR3 =0x30
514 20:09:11.550382 Write Rank1 MR13 =0xd8
515 20:09:11.550441 [ModeRegInit_LP4] CH1 RK0
516 20:09:11.550501 Write Rank0 MR13 =0x18
517 20:09:11.550561 Write Rank0 MR12 =0x5d
518 20:09:11.550620 Write Rank0 MR1 =0x56
519 20:09:11.550679 Write Rank0 MR2 =0x1a
520 20:09:11.550739 Write Rank0 MR11 =0x0
521 20:09:11.550799 Write Rank0 MR22 =0x38
522 20:09:11.550857 Write Rank0 MR14 =0x5d
523 20:09:11.550917 Write Rank0 MR3 =0x30
524 20:09:11.550977 Write Rank0 MR13 =0x58
525 20:09:11.551057 Write Rank0 MR12 =0x5d
526 20:09:11.551153 Write Rank0 MR1 =0x56
527 20:09:11.551246 Write Rank0 MR2 =0x2d
528 20:09:11.551339 Write Rank0 MR11 =0x23
529 20:09:11.551434 Write Rank0 MR22 =0x34
530 20:09:11.551503 Write Rank0 MR14 =0x10
531 20:09:11.551563 Write Rank0 MR3 =0x30
532 20:09:11.551624 Write Rank0 MR13 =0xd8
533 20:09:11.551683 [ModeRegInit_LP4] CH1 RK1
534 20:09:11.551743 Write Rank1 MR13 =0x18
535 20:09:11.551802 Write Rank1 MR12 =0x5d
536 20:09:11.551861 Write Rank1 MR1 =0x56
537 20:09:11.551920 Write Rank1 MR2 =0x1a
538 20:09:11.551980 Write Rank1 MR11 =0x0
539 20:09:11.552040 Write Rank1 MR22 =0x38
540 20:09:11.552099 Write Rank1 MR14 =0x5d
541 20:09:11.552159 Write Rank1 MR3 =0x30
542 20:09:11.552218 Write Rank1 MR13 =0x58
543 20:09:11.552278 Write Rank1 MR12 =0x5d
544 20:09:11.552337 Write Rank1 MR1 =0x56
545 20:09:11.552396 Write Rank1 MR2 =0x2d
546 20:09:11.552456 Write Rank1 MR11 =0x23
547 20:09:11.552515 Write Rank1 MR22 =0x34
548 20:09:11.552575 Write Rank1 MR14 =0x10
549 20:09:11.552634 Write Rank1 MR3 =0x30
550 20:09:11.552694 Write Rank1 MR13 =0xd8
551 20:09:11.552753 match AC timing 3
552 20:09:11.552812 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
553 20:09:11.552874 [MiockJmeterHQA]
554 20:09:11.552933 vSetVcoreByFreq with vcore:762500, freq=1600
555 20:09:11.552993
556 20:09:11.553053 MIOCK jitter meter ch=0
557 20:09:11.553113
558 20:09:11.553172 1T = (102-17) = 85 dly cells
559 20:09:11.553234 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
560 20:09:11.553295 vSetVcoreByFreq with vcore:725000, freq=1200
561 20:09:11.553355
562 20:09:11.553414 MIOCK jitter meter ch=0
563 20:09:11.553489
564 20:09:11.553550 1T = (96-16) = 80 dly cells
565 20:09:11.553613 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
566 20:09:11.553674 vSetVcoreByFreq with vcore:725000, freq=800
567 20:09:11.553734
568 20:09:11.553793 MIOCK jitter meter ch=0
569 20:09:11.553853
570 20:09:11.553912 1T = (96-16) = 80 dly cells
571 20:09:11.553973 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
572 20:09:11.554034 vSetVcoreByFreq with vcore:762500, freq=1600
573 20:09:11.554094 vSetVcoreByFreq with vcore:762500, freq=1600
574 20:09:11.554153
575 20:09:11.554213 K DRVP
576 20:09:11.554272 1. OCD DRVP=0 CALOUT=0
577 20:09:11.554333 1. OCD DRVP=1 CALOUT=0
578 20:09:11.554394 1. OCD DRVP=2 CALOUT=0
579 20:09:11.554455 1. OCD DRVP=3 CALOUT=0
580 20:09:11.554517 1. OCD DRVP=4 CALOUT=0
581 20:09:11.554578 1. OCD DRVP=5 CALOUT=0
582 20:09:11.554638 1. OCD DRVP=6 CALOUT=0
583 20:09:11.554699 1. OCD DRVP=7 CALOUT=0
584 20:09:11.554760 1. OCD DRVP=8 CALOUT=0
585 20:09:11.554820 1. OCD DRVP=9 CALOUT=1
586 20:09:11.554881
587 20:09:11.554940 1. OCD DRVP calibration OK! DRVP=9
588 20:09:11.555001
589 20:09:11.555060
590 20:09:11.555119
591 20:09:11.555177 K ODTN
592 20:09:11.555240 3. OCD ODTN=0 ,CALOUT=1
593 20:09:11.555344 3. OCD ODTN=1 ,CALOUT=1
594 20:09:11.555443 3. OCD ODTN=2 ,CALOUT=1
595 20:09:11.555508 3. OCD ODTN=3 ,CALOUT=1
596 20:09:11.555570 3. OCD ODTN=4 ,CALOUT=1
597 20:09:11.555631 3. OCD ODTN=5 ,CALOUT=1
598 20:09:11.555692 3. OCD ODTN=6 ,CALOUT=1
599 20:09:11.555754 3. OCD ODTN=7 ,CALOUT=0
600 20:09:11.555814
601 20:09:11.555875 3. OCD ODTN calibration OK! ODTN=7
602 20:09:11.555937
603 20:09:11.555996 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
604 20:09:11.556057 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
605 20:09:11.556118 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
606 20:09:11.556178
607 20:09:11.556238 K DRVP
608 20:09:11.556298 1. OCD DRVP=0 CALOUT=0
609 20:09:11.556359 1. OCD DRVP=1 CALOUT=0
610 20:09:11.556420 1. OCD DRVP=2 CALOUT=0
611 20:09:11.556481 1. OCD DRVP=3 CALOUT=0
612 20:09:11.556541 1. OCD DRVP=4 CALOUT=0
613 20:09:11.556602 1. OCD DRVP=5 CALOUT=0
614 20:09:11.556663 1. OCD DRVP=6 CALOUT=0
615 20:09:11.556724 1. OCD DRVP=7 CALOUT=0
616 20:09:11.556785 1. OCD DRVP=8 CALOUT=0
617 20:09:11.556846 1. OCD DRVP=9 CALOUT=0
618 20:09:11.556906 1. OCD DRVP=10 CALOUT=0
619 20:09:11.556968 1. OCD DRVP=11 CALOUT=1
620 20:09:11.557029
621 20:09:11.557089 1. OCD DRVP calibration OK! DRVP=11
622 20:09:11.557150
623 20:09:11.557210
624 20:09:11.557268
625 20:09:11.557328 K ODTN
626 20:09:11.557388 3. OCD ODTN=0 ,CALOUT=1
627 20:09:11.557636 3. OCD ODTN=1 ,CALOUT=1
628 20:09:11.557707 3. OCD ODTN=2 ,CALOUT=1
629 20:09:11.557771 3. OCD ODTN=3 ,CALOUT=1
630 20:09:11.557833 3. OCD ODTN=4 ,CALOUT=1
631 20:09:11.557894 3. OCD ODTN=5 ,CALOUT=1
632 20:09:11.557956 3. OCD ODTN=6 ,CALOUT=1
633 20:09:11.558017 3. OCD ODTN=7 ,CALOUT=1
634 20:09:11.558078 3. OCD ODTN=8 ,CALOUT=1
635 20:09:11.558139 3. OCD ODTN=9 ,CALOUT=1
636 20:09:11.558200 3. OCD ODTN=10 ,CALOUT=1
637 20:09:11.558260 3. OCD ODTN=11 ,CALOUT=1
638 20:09:11.558321 3. OCD ODTN=12 ,CALOUT=1
639 20:09:11.558382 3. OCD ODTN=13 ,CALOUT=1
640 20:09:11.558443 3. OCD ODTN=14 ,CALOUT=1
641 20:09:11.558503 3. OCD ODTN=15 ,CALOUT=0
642 20:09:11.558564
643 20:09:11.558624 3. OCD ODTN calibration OK! ODTN=15
644 20:09:11.558685
645 20:09:11.558745 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
646 20:09:11.558805 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
647 20:09:11.558865 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
648 20:09:11.558926
649 20:09:11.558985 [DramcInit]
650 20:09:11.559045 AutoRefreshCKEOff AutoREF OFF
651 20:09:11.559105 DDRPhyPLLSetting-CKEOFF
652 20:09:11.559165 DDRPhyPLLSetting-CKEON
653 20:09:11.559224
654 20:09:11.559283 Enable WDQS
655 20:09:11.559342 ==
656 20:09:11.559402 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
657 20:09:11.559477 fsp= 1, odt_onoff= 1, Byte mode= 0
658 20:09:11.559538 ==
659 20:09:11.559598 [Duty_Offset_Calibration]
660 20:09:11.559657
661 20:09:11.559717 ===========================
662 20:09:11.559777 B0:1 B1:1 CA:1
663 20:09:11.559837 ==
664 20:09:11.559896 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
665 20:09:11.559957 fsp= 1, odt_onoff= 1, Byte mode= 0
666 20:09:11.560027 ==
667 20:09:11.560096 [Duty_Offset_Calibration]
668 20:09:11.560156
669 20:09:11.560217 ===========================
670 20:09:11.560277 B0:1 B1:0 CA:2
671 20:09:11.560336 [ModeRegInit_LP4] CH0 RK0
672 20:09:11.560396 Write Rank0 MR13 =0x18
673 20:09:11.560455 Write Rank0 MR12 =0x5d
674 20:09:11.560515 Write Rank0 MR1 =0x56
675 20:09:11.560574 Write Rank0 MR2 =0x1a
676 20:09:11.560633 Write Rank0 MR11 =0x0
677 20:09:11.560692 Write Rank0 MR22 =0x38
678 20:09:11.560751 Write Rank0 MR14 =0x5d
679 20:09:11.560810 Write Rank0 MR3 =0x30
680 20:09:11.560870 Write Rank0 MR13 =0x58
681 20:09:11.560929 Write Rank0 MR12 =0x5d
682 20:09:11.560988 Write Rank0 MR1 =0x56
683 20:09:11.561047 Write Rank0 MR2 =0x2d
684 20:09:11.561106 Write Rank0 MR11 =0x23
685 20:09:11.561165 Write Rank0 MR22 =0x34
686 20:09:11.561225 Write Rank0 MR14 =0x10
687 20:09:11.561284 Write Rank0 MR3 =0x30
688 20:09:11.561344 Write Rank0 MR13 =0xd8
689 20:09:11.561404 [ModeRegInit_LP4] CH0 RK1
690 20:09:11.561464 Write Rank1 MR13 =0x18
691 20:09:11.561522 Write Rank1 MR12 =0x5d
692 20:09:11.561581 Write Rank1 MR1 =0x56
693 20:09:11.561640 Write Rank1 MR2 =0x1a
694 20:09:11.561698 Write Rank1 MR11 =0x0
695 20:09:11.561757 Write Rank1 MR22 =0x38
696 20:09:11.561816 Write Rank1 MR14 =0x5d
697 20:09:11.561875 Write Rank1 MR3 =0x30
698 20:09:11.561934 Write Rank1 MR13 =0x58
699 20:09:11.561993 Write Rank1 MR12 =0x5d
700 20:09:11.562052 Write Rank1 MR1 =0x56
701 20:09:11.562111 Write Rank1 MR2 =0x2d
702 20:09:11.562170 Write Rank1 MR11 =0x23
703 20:09:11.562230 Write Rank1 MR22 =0x34
704 20:09:11.562290 Write Rank1 MR14 =0x10
705 20:09:11.562350 Write Rank1 MR3 =0x30
706 20:09:11.562409 Write Rank1 MR13 =0xd8
707 20:09:11.562468 [ModeRegInit_LP4] CH1 RK0
708 20:09:11.562527 Write Rank0 MR13 =0x18
709 20:09:11.562587 Write Rank0 MR12 =0x5d
710 20:09:11.562646 Write Rank0 MR1 =0x56
711 20:09:11.562706 Write Rank0 MR2 =0x1a
712 20:09:11.562765 Write Rank0 MR11 =0x0
713 20:09:11.562825 Write Rank0 MR22 =0x38
714 20:09:11.562884 Write Rank0 MR14 =0x5d
715 20:09:11.562944 Write Rank0 MR3 =0x30
716 20:09:11.563003 Write Rank0 MR13 =0x58
717 20:09:11.563062 Write Rank0 MR12 =0x5d
718 20:09:11.563121 Write Rank0 MR1 =0x56
719 20:09:11.563180 Write Rank0 MR2 =0x2d
720 20:09:11.563239 Write Rank0 MR11 =0x23
721 20:09:11.563299 Write Rank0 MR22 =0x34
722 20:09:11.563358 Write Rank0 MR14 =0x10
723 20:09:11.563423 Write Rank0 MR3 =0x30
724 20:09:11.563483 Write Rank0 MR13 =0xd8
725 20:09:11.563543 [ModeRegInit_LP4] CH1 RK1
726 20:09:11.563603 Write Rank1 MR13 =0x18
727 20:09:11.563662 Write Rank1 MR12 =0x5d
728 20:09:11.563721 Write Rank1 MR1 =0x56
729 20:09:11.563781 Write Rank1 MR2 =0x1a
730 20:09:11.563841 Write Rank1 MR11 =0x0
731 20:09:11.563900 Write Rank1 MR22 =0x38
732 20:09:11.563959 Write Rank1 MR14 =0x5d
733 20:09:11.564019 Write Rank1 MR3 =0x30
734 20:09:11.564078 Write Rank1 MR13 =0x58
735 20:09:11.564138 Write Rank1 MR12 =0x5d
736 20:09:11.564197 Write Rank1 MR1 =0x56
737 20:09:11.564257 Write Rank1 MR2 =0x2d
738 20:09:11.564316 Write Rank1 MR11 =0x23
739 20:09:11.564375 Write Rank1 MR22 =0x34
740 20:09:11.564434 Write Rank1 MR14 =0x10
741 20:09:11.564494 Write Rank1 MR3 =0x30
742 20:09:11.564553 Write Rank1 MR13 =0xd8
743 20:09:11.564612 match AC timing 3
744 20:09:11.564671 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
745 20:09:11.564732 DramC Write-DBI off
746 20:09:11.564792 DramC Read-DBI off
747 20:09:11.564851 Write Rank0 MR13 =0x59
748 20:09:11.564910 ==
749 20:09:11.564970 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
750 20:09:11.565030 fsp= 1, odt_onoff= 1, Byte mode= 0
751 20:09:11.565090 ==
752 20:09:11.565150 === u2Vref_new: 0x56 --> 0x2d
753 20:09:11.565210 === u2Vref_new: 0x58 --> 0x38
754 20:09:11.565270 === u2Vref_new: 0x5a --> 0x39
755 20:09:11.565330 === u2Vref_new: 0x5c --> 0x3c
756 20:09:11.565390 === u2Vref_new: 0x5e --> 0x3d
757 20:09:11.565449 === u2Vref_new: 0x60 --> 0xa0
758 20:09:11.565510 [CA 0] Center 34 (6~63) winsize 58
759 20:09:11.565569 [CA 1] Center 36 (10~63) winsize 54
760 20:09:11.565629 [CA 2] Center 29 (0~58) winsize 59
761 20:09:11.565688 [CA 3] Center 24 (-3~52) winsize 56
762 20:09:11.565748 [CA 4] Center 25 (-3~54) winsize 58
763 20:09:11.565807 [CA 5] Center 29 (0~59) winsize 60
764 20:09:11.565867
765 20:09:11.565926 [CATrainingPosCal] consider 1 rank data
766 20:09:11.565985 u2DelayCellTimex100 = 735/100 ps
767 20:09:11.566045 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
768 20:09:11.566105 CA1 delay=36 (10~63),Diff = 12 PI (15 cell)
769 20:09:11.566164 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
770 20:09:11.566224 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
771 20:09:11.566283 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
772 20:09:11.566343 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
773 20:09:11.566403
774 20:09:11.566462 CA PerBit enable=1, Macro0, CA PI delay=24
775 20:09:11.566521 === u2Vref_new: 0x5e --> 0x3d
776 20:09:11.566581
777 20:09:11.566640 Vref(ca) range 1: 30
778 20:09:11.566699
779 20:09:11.566758 CS Dly= 9 (40-0-32)
780 20:09:11.566817 Write Rank0 MR13 =0xd8
781 20:09:11.566877 Write Rank0 MR13 =0xd8
782 20:09:11.566936 Write Rank0 MR12 =0x5e
783 20:09:11.566995 Write Rank1 MR13 =0x59
784 20:09:11.567055 ==
785 20:09:11.567114 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
786 20:09:11.567383 fsp= 1, odt_onoff= 1, Byte mode= 0
787 20:09:11.567457 ==
788 20:09:11.567520 === u2Vref_new: 0x56 --> 0x2d
789 20:09:11.567581 === u2Vref_new: 0x58 --> 0x38
790 20:09:11.567642 === u2Vref_new: 0x5a --> 0x39
791 20:09:11.567702 === u2Vref_new: 0x5c --> 0x3c
792 20:09:11.567763 === u2Vref_new: 0x5e --> 0x3d
793 20:09:11.567822 === u2Vref_new: 0x60 --> 0xa0
794 20:09:11.567882 [CA 0] Center 36 (9~63) winsize 55
795 20:09:11.567943 [CA 1] Center 36 (9~63) winsize 55
796 20:09:11.568003 [CA 2] Center 31 (2~60) winsize 59
797 20:09:11.568063 [CA 3] Center 26 (-2~54) winsize 57
798 20:09:11.568122 [CA 4] Center 26 (-2~54) winsize 57
799 20:09:11.568183 [CA 5] Center 31 (2~61) winsize 60
800 20:09:11.568242
801 20:09:11.568301 [CATrainingPosCal] consider 2 rank data
802 20:09:11.568361 u2DelayCellTimex100 = 735/100 ps
803 20:09:11.568421 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
804 20:09:11.568482 CA1 delay=36 (10~63),Diff = 11 PI (14 cell)
805 20:09:11.568541 CA2 delay=30 (2~58),Diff = 5 PI (6 cell)
806 20:09:11.568601 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
807 20:09:11.568661 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
808 20:09:11.568721 CA5 delay=30 (2~59),Diff = 5 PI (6 cell)
809 20:09:11.568780
810 20:09:11.568839 CA PerBit enable=1, Macro0, CA PI delay=25
811 20:09:11.568899 === u2Vref_new: 0x5c --> 0x3c
812 20:09:11.568959
813 20:09:11.569018 Vref(ca) range 1: 28
814 20:09:11.569077
815 20:09:11.569137 CS Dly= 7 (38-0-32)
816 20:09:11.569196 Write Rank1 MR13 =0xd8
817 20:09:11.569255 Write Rank1 MR13 =0xd8
818 20:09:11.569316 Write Rank1 MR12 =0x5c
819 20:09:11.569375 [RankSwap] Rank num 2, (Multi 1), Rank 0
820 20:09:11.569435 Write Rank0 MR2 =0xad
821 20:09:11.569494 [Write Leveling]
822 20:09:11.569553 delay byte0 byte1 byte2 byte3
823 20:09:11.569623
824 20:09:11.569686 10 0 0
825 20:09:11.569747 11 0 0
826 20:09:11.569807 12 0 0
827 20:09:11.569868 13 0 0
828 20:09:11.569931 14 0 0
829 20:09:11.569992 15 0 0
830 20:09:11.570053 16 0 0
831 20:09:11.570114 17 0 0
832 20:09:11.570174 18 0 0
833 20:09:11.570235 19 0 0
834 20:09:11.570296 20 0 0
835 20:09:11.570359 21 0 0
836 20:09:11.570420 22 0 0
837 20:09:11.570480 23 0 ff
838 20:09:11.570541 24 0 ff
839 20:09:11.570602 25 0 ff
840 20:09:11.570663 26 0 ff
841 20:09:11.570733 27 0 ff
842 20:09:11.570794 28 0 ff
843 20:09:11.570856 29 0 ff
844 20:09:11.570916 30 0 ff
845 20:09:11.570976 31 0 ff
846 20:09:11.571037 32 ff ff
847 20:09:11.571097 33 ff ff
848 20:09:11.571158 34 ff ff
849 20:09:11.571218 35 ff ff
850 20:09:11.571279 36 ff ff
851 20:09:11.571339 37 ff ff
852 20:09:11.571398 38 ff ff
853 20:09:11.571463 pass bytecount = 0xff (0xff: all bytes pass)
854 20:09:11.571523
855 20:09:11.571583 DQS0 dly: 32
856 20:09:11.571642 DQS1 dly: 23
857 20:09:11.571702 Write Rank0 MR2 =0x2d
858 20:09:11.571762 [RankSwap] Rank num 2, (Multi 1), Rank 0
859 20:09:11.571822 Write Rank0 MR1 =0xd6
860 20:09:11.571882 [Gating]
861 20:09:11.571942 ==
862 20:09:11.572001 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
863 20:09:11.572061 fsp= 1, odt_onoff= 1, Byte mode= 0
864 20:09:11.572121 ==
865 20:09:11.572180 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
866 20:09:11.572242 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
867 20:09:11.572303 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
868 20:09:11.572364 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
869 20:09:11.572426 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
870 20:09:11.572486 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
871 20:09:11.572546 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
872 20:09:11.572608 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
873 20:09:11.572668 3 2 0 |3534 504 |(11 11)(11 11) |(0 0)(0 1)| 0
874 20:09:11.572729 3 2 4 |3534 1716 |(11 11)(11 11) |(0 0)(1 1)| 0
875 20:09:11.572789 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
876 20:09:11.572850 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
877 20:09:11.572910 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
878 20:09:11.572971 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
879 20:09:11.573032 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
880 20:09:11.573093 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
881 20:09:11.573154 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
882 20:09:11.573215 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
883 20:09:11.573275 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
884 20:09:11.573337 [Byte 1] Lead/lag falling Transition (3, 3, 8)
885 20:09:11.573397 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
886 20:09:11.573458 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
887 20:09:11.573519 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
888 20:09:11.573581 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
889 20:09:11.573641 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
890 20:09:11.573703 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
891 20:09:11.573764 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
892 20:09:11.573825 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
893 20:09:11.573886 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
894 20:09:11.573946 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 20:09:11.574006 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 20:09:11.574067 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 20:09:11.574127 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 20:09:11.574188 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 20:09:11.574248 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 20:09:11.574309 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 20:09:11.574370 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 20:09:11.574431 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 20:09:11.574492 [Byte 0] Lead/lag falling Transition (3, 5, 16)
904 20:09:11.574551 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
905 20:09:11.574612 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
906 20:09:11.574672 [Byte 0] Lead/lag Transition tap number (3)
907 20:09:11.574731 [Byte 1] Lead/lag falling Transition (3, 5, 24)
908 20:09:11.574791 3 5 28 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
909 20:09:11.574852 [Byte 0]First pass (3, 5, 28)
910 20:09:11.575107 [Byte 1] Lead/lag Transition tap number (2)
911 20:09:11.575174 3 6 0 |4646 1211 |(0 0)(11 11) |(0 0)(0 0)| 0
912 20:09:11.575237 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
913 20:09:11.575300 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
914 20:09:11.575362 [Byte 1]First pass (3, 6, 8)
915 20:09:11.575428 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
916 20:09:11.575491 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 20:09:11.575552 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 20:09:11.575613 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 20:09:11.575674 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 20:09:11.575736 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 20:09:11.575797 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 20:09:11.575858 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 20:09:11.575919 All bytes gating window > 1UI, Early break!
924 20:09:11.575979
925 20:09:11.576038 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
926 20:09:11.576098
927 20:09:11.576158 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
928 20:09:11.576218
929 20:09:11.576277
930 20:09:11.576335
931 20:09:11.576394 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
932 20:09:11.576453
933 20:09:11.576512 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
934 20:09:11.576572
935 20:09:11.576630
936 20:09:11.576689 Write Rank0 MR1 =0x56
937 20:09:11.576748
938 20:09:11.576808 best RODT dly(2T, 0.5T) = (2, 2)
939 20:09:11.576871
940 20:09:11.576931 best RODT dly(2T, 0.5T) = (2, 2)
941 20:09:11.576991 ==
942 20:09:11.577050 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
943 20:09:11.577111 fsp= 1, odt_onoff= 1, Byte mode= 0
944 20:09:11.577171 ==
945 20:09:11.577230 Start DQ dly to find pass range UseTestEngine =0
946 20:09:11.577291 x-axis: bit #, y-axis: DQ dly (-127~63)
947 20:09:11.577351 RX Vref Scan = 0
948 20:09:11.577410 -26, [0] xxxxxxxx xxxxxxxx [MSB]
949 20:09:11.577474 -25, [0] xxxxxxxx xxxxxxxx [MSB]
950 20:09:11.577535 -24, [0] xxxxxxxx xxxxxxxx [MSB]
951 20:09:11.577596 -23, [0] xxxxxxxx xxxxxxxx [MSB]
952 20:09:11.577657 -22, [0] xxxxxxxx xxxxxxxx [MSB]
953 20:09:11.577718 -21, [0] xxxxxxxx xxxxxxxx [MSB]
954 20:09:11.577779 -20, [0] xxxxxxxx xxxxxxxx [MSB]
955 20:09:11.577838 -19, [0] xxxxxxxx xxxxxxxx [MSB]
956 20:09:11.577900 -18, [0] xxxxxxxx xxxxxxxx [MSB]
957 20:09:11.577960 -17, [0] xxxxxxxx xxxxxxxx [MSB]
958 20:09:11.578021 -16, [0] xxxxxxxx xxxxxxxx [MSB]
959 20:09:11.578082 -15, [0] xxxxxxxx xxxxxxxx [MSB]
960 20:09:11.578142 -14, [0] xxxxxxxx xxxxxxxx [MSB]
961 20:09:11.578203 -13, [0] xxxxxxxx xxxxxxxx [MSB]
962 20:09:11.578264 -12, [0] xxxxxxxx xxxxxxxx [MSB]
963 20:09:11.578325 -11, [0] xxxxxxxx xxxxxxxx [MSB]
964 20:09:11.578386 -10, [0] xxxxxxxx xxxxxxxx [MSB]
965 20:09:11.578447 -9, [0] xxxxxxxx xxxxxxxx [MSB]
966 20:09:11.578508 -8, [0] xxxxxxxx xxxxxxxx [MSB]
967 20:09:11.578569 -7, [0] xxxxxxxx xxxxxxxx [MSB]
968 20:09:11.578630 -6, [0] xxxxxxxx xxxxxxxx [MSB]
969 20:09:11.578690 -5, [0] xxxxxxxx xxxxxxxx [MSB]
970 20:09:11.578752 -4, [0] xxxxxxxx xxxxxxxx [MSB]
971 20:09:11.578812 -3, [0] xxxxxxxx xxxxxxxx [MSB]
972 20:09:11.578873 -2, [0] xxxoxxxx oxxxxxxx [MSB]
973 20:09:11.578934 -1, [0] xxxoxxxx ooxoxxxx [MSB]
974 20:09:11.578995 0, [0] xxxoxoxx ooxoxxxx [MSB]
975 20:09:11.579056 1, [0] xxxoxoox ooxoooxx [MSB]
976 20:09:11.579118 2, [0] xxxoxoox ooxoooxx [MSB]
977 20:09:11.579179 3, [0] xxxoxoox ooxoooox [MSB]
978 20:09:11.579239 4, [0] xoooxooo ooxooooo [MSB]
979 20:09:11.579300 5, [0] xooooooo ooxooooo [MSB]
980 20:09:11.579361 6, [0] xooooooo ooxooooo [MSB]
981 20:09:11.579426 7, [0] oooooooo ooxooooo [MSB]
982 20:09:11.579494 32, [0] oooxoooo xooooooo [MSB]
983 20:09:11.579556 33, [0] oooxoooo xooooooo [MSB]
984 20:09:11.579617 34, [0] oooxoooo xooooooo [MSB]
985 20:09:11.579679 35, [0] oooxoooo xooooooo [MSB]
986 20:09:11.579740 36, [0] oooxoxoo xooxoooo [MSB]
987 20:09:11.579800 37, [0] oooxoxxx xxoxoooo [MSB]
988 20:09:11.579861 38, [0] oooxoxxx xxoxxoxo [MSB]
989 20:09:11.579921 39, [0] oooxxxxx xxoxxxxo [MSB]
990 20:09:11.579982 40, [0] xxoxxxxx xxoxxxxo [MSB]
991 20:09:11.580043 41, [0] xxxxxxxx xxoxxxxo [MSB]
992 20:09:11.580103 42, [0] xxxxxxxx xxoxxxxx [MSB]
993 20:09:11.580163 43, [0] xxxxxxxx xxoxxxxx [MSB]
994 20:09:11.580224 44, [0] xxxxxxxx xxxxxxxx [MSB]
995 20:09:11.580285 iDelay=44, Bit 0, Center 23 (7 ~ 39) 33
996 20:09:11.580345 iDelay=44, Bit 1, Center 21 (4 ~ 39) 36
997 20:09:11.580405 iDelay=44, Bit 2, Center 22 (4 ~ 40) 37
998 20:09:11.580465 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
999 20:09:11.580525 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
1000 20:09:11.580584 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
1001 20:09:11.580643 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
1002 20:09:11.580702 iDelay=44, Bit 7, Center 20 (4 ~ 36) 33
1003 20:09:11.580762 iDelay=44, Bit 8, Center 14 (-2 ~ 31) 34
1004 20:09:11.580821 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
1005 20:09:11.580880 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
1006 20:09:11.580940 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
1007 20:09:11.581000 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1008 20:09:11.581058 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
1009 20:09:11.581118 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
1010 20:09:11.581177 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
1011 20:09:11.581236 ==
1012 20:09:11.581295 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1013 20:09:11.581356 fsp= 1, odt_onoff= 1, Byte mode= 0
1014 20:09:11.581416 ==
1015 20:09:11.581476 DQS Delay:
1016 20:09:11.581535 DQS0 = 0, DQS1 = 0
1017 20:09:11.581594 DQM Delay:
1018 20:09:11.581655 DQM0 = 19, DQM1 = 19
1019 20:09:11.581715 DQ Delay:
1020 20:09:11.581775 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =14
1021 20:09:11.581834 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1022 20:09:11.581894 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
1023 20:09:11.581954 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
1024 20:09:11.582013
1025 20:09:11.582079
1026 20:09:11.582141 DramC Write-DBI off
1027 20:09:11.582201 ==
1028 20:09:11.582261 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1029 20:09:11.582320 fsp= 1, odt_onoff= 1, Byte mode= 0
1030 20:09:11.582380 ==
1031 20:09:11.582438 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1032 20:09:11.582498
1033 20:09:11.582557 Begin, DQ Scan Range 919~1175
1034 20:09:11.582616
1035 20:09:11.582674
1036 20:09:11.582732 TX Vref Scan disable
1037 20:09:11.582791 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1038 20:09:11.582852 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1039 20:09:11.582913 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1040 20:09:11.582973 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1041 20:09:11.583231 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1042 20:09:11.583305 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1043 20:09:11.583368 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1044 20:09:11.583436 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1045 20:09:11.583498 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1046 20:09:11.583559 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1047 20:09:11.583619 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1048 20:09:11.583680 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1049 20:09:11.583740 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1050 20:09:11.583801 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1051 20:09:11.583861 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1052 20:09:11.583921 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1053 20:09:11.583981 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1054 20:09:11.584041 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1055 20:09:11.584101 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1056 20:09:11.584161 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1057 20:09:11.584221 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1058 20:09:11.584281 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1059 20:09:11.584342 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1060 20:09:11.584402 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1061 20:09:11.584463 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1062 20:09:11.584523 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1063 20:09:11.584583 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1064 20:09:11.584643 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1065 20:09:11.584702 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1066 20:09:11.584762 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1067 20:09:11.584823 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1068 20:09:11.584882 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1069 20:09:11.584942 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1070 20:09:11.585001 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1071 20:09:11.585062 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1072 20:09:11.585122 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1073 20:09:11.585183 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1074 20:09:11.585243 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1075 20:09:11.585303 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1076 20:09:11.585363 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1077 20:09:11.585422 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1078 20:09:11.585482 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1079 20:09:11.585541 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1080 20:09:11.585601 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1081 20:09:11.585661 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1082 20:09:11.585721 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1083 20:09:11.585781 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1084 20:09:11.585841 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1085 20:09:11.585901 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1086 20:09:11.585960 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1087 20:09:11.586021 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1088 20:09:11.586081 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1089 20:09:11.586141 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1090 20:09:11.586201 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1091 20:09:11.586260 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1092 20:09:11.586321 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1093 20:09:11.586380 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1094 20:09:11.586440 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1095 20:09:11.586500 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1096 20:09:11.586560 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1097 20:09:11.586620 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1098 20:09:11.586680 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1099 20:09:11.586739 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1100 20:09:11.586799 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1101 20:09:11.586859 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1102 20:09:11.586919 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1103 20:09:11.586979 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1104 20:09:11.587039 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1105 20:09:11.587099 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1106 20:09:11.587158 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1107 20:09:11.587218 996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]
1108 20:09:11.587278 997 |3 6 37|[0] oxoxxxxx xxxxxxxx [MSB]
1109 20:09:11.587338 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1110 20:09:11.587398 Byte0, DQ PI dly=985, DQM PI dly= 985
1111 20:09:11.587469 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1112 20:09:11.587530
1113 20:09:11.587589 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1114 20:09:11.587648
1115 20:09:11.587707 Byte1, DQ PI dly=975, DQM PI dly= 975
1116 20:09:11.587765 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1117 20:09:11.587824
1118 20:09:11.587882 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1119 20:09:11.587941
1120 20:09:11.587999 ==
1121 20:09:11.588058 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1122 20:09:11.588117 fsp= 1, odt_onoff= 1, Byte mode= 0
1123 20:09:11.588177 ==
1124 20:09:11.588235 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1125 20:09:11.588294
1126 20:09:11.588352 Begin, DQ Scan Range 951~1015
1127 20:09:11.588411 Write Rank0 MR14 =0x0
1128 20:09:11.588470
1129 20:09:11.588529 CH=0, VrefRange= 0, VrefLevel = 0
1130 20:09:11.588588 TX Bit0 (979~993) 15 986, Bit8 (966~977) 12 971,
1131 20:09:11.588648 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1132 20:09:11.588708 TX Bit2 (978~992) 15 985, Bit10 (974~985) 12 979,
1133 20:09:11.588768 TX Bit3 (975~985) 11 980, Bit11 (967~980) 14 973,
1134 20:09:11.588827 TX Bit4 (978~991) 14 984, Bit12 (969~982) 14 975,
1135 20:09:11.588887 TX Bit5 (976~990) 15 983, Bit13 (969~983) 15 976,
1136 20:09:11.588946 TX Bit6 (977~989) 13 983, Bit14 (968~983) 16 975,
1137 20:09:11.589005 TX Bit7 (978~991) 14 984, Bit15 (974~984) 11 979,
1138 20:09:11.589064
1139 20:09:11.589123 Write Rank0 MR14 =0x2
1140 20:09:11.589181
1141 20:09:11.589239 CH=0, VrefRange= 0, VrefLevel = 2
1142 20:09:11.589299 TX Bit0 (978~993) 16 985, Bit8 (966~978) 13 972,
1143 20:09:11.589358 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1144 20:09:11.589417 TX Bit2 (978~993) 16 985, Bit10 (974~986) 13 980,
1145 20:09:11.589477 TX Bit3 (974~986) 13 980, Bit11 (967~981) 15 974,
1146 20:09:11.589536 TX Bit4 (977~991) 15 984, Bit12 (969~982) 14 975,
1147 20:09:11.589791 TX Bit5 (975~991) 17 983, Bit13 (968~983) 16 975,
1148 20:09:11.589861 TX Bit6 (977~991) 15 984, Bit14 (968~984) 17 976,
1149 20:09:11.589922 TX Bit7 (977~992) 16 984, Bit15 (973~985) 13 979,
1150 20:09:11.589981
1151 20:09:11.590040 Write Rank0 MR14 =0x4
1152 20:09:11.590099
1153 20:09:11.590158 CH=0, VrefRange= 0, VrefLevel = 4
1154 20:09:11.590218 TX Bit0 (978~994) 17 986, Bit8 (966~978) 13 972,
1155 20:09:11.590278 TX Bit1 (977~993) 17 985, Bit9 (968~983) 16 975,
1156 20:09:11.590338 TX Bit2 (978~994) 17 986, Bit10 (973~987) 15 980,
1157 20:09:11.590397 TX Bit3 (974~987) 14 980, Bit11 (967~982) 16 974,
1158 20:09:11.590456 TX Bit4 (977~992) 16 984, Bit12 (969~983) 15 976,
1159 20:09:11.590515 TX Bit5 (975~991) 17 983, Bit13 (968~983) 16 975,
1160 20:09:11.590574 TX Bit6 (976~991) 16 983, Bit14 (968~984) 17 976,
1161 20:09:11.590633 TX Bit7 (977~992) 16 984, Bit15 (973~985) 13 979,
1162 20:09:11.590692
1163 20:09:11.590751 Write Rank0 MR14 =0x6
1164 20:09:11.590810
1165 20:09:11.590868 CH=0, VrefRange= 0, VrefLevel = 6
1166 20:09:11.590927 TX Bit0 (977~994) 18 985, Bit8 (966~980) 15 973,
1167 20:09:11.590986 TX Bit1 (977~993) 17 985, Bit9 (967~984) 18 975,
1168 20:09:11.591045 TX Bit2 (978~994) 17 986, Bit10 (973~988) 16 980,
1169 20:09:11.591104 TX Bit3 (974~987) 14 980, Bit11 (967~982) 16 974,
1170 20:09:11.591163 TX Bit4 (977~992) 16 984, Bit12 (968~983) 16 975,
1171 20:09:11.591222 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1172 20:09:11.591281 TX Bit6 (976~992) 17 984, Bit14 (967~985) 19 976,
1173 20:09:11.591340 TX Bit7 (977~992) 16 984, Bit15 (972~987) 16 979,
1174 20:09:11.591399
1175 20:09:11.591472 Write Rank0 MR14 =0x8
1176 20:09:11.591531
1177 20:09:11.591589 CH=0, VrefRange= 0, VrefLevel = 8
1178 20:09:11.591649 TX Bit0 (977~995) 19 986, Bit8 (966~980) 15 973,
1179 20:09:11.591708 TX Bit1 (977~994) 18 985, Bit9 (967~984) 18 975,
1180 20:09:11.591767 TX Bit2 (978~995) 18 986, Bit10 (972~989) 18 980,
1181 20:09:11.591827 TX Bit3 (974~988) 15 981, Bit11 (966~983) 18 974,
1182 20:09:11.591886 TX Bit4 (976~993) 18 984, Bit12 (968~984) 17 976,
1183 20:09:11.591946 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1184 20:09:11.592005 TX Bit6 (976~992) 17 984, Bit14 (968~985) 18 976,
1185 20:09:11.592064 TX Bit7 (977~993) 17 985, Bit15 (972~987) 16 979,
1186 20:09:11.592123
1187 20:09:11.592181 Write Rank0 MR14 =0xa
1188 20:09:11.592239
1189 20:09:11.592297 CH=0, VrefRange= 0, VrefLevel = 10
1190 20:09:11.592356 TX Bit0 (977~996) 20 986, Bit8 (965~981) 17 973,
1191 20:09:11.592416 TX Bit1 (976~994) 19 985, Bit9 (967~984) 18 975,
1192 20:09:11.592475 TX Bit2 (977~996) 20 986, Bit10 (972~989) 18 980,
1193 20:09:11.592534 TX Bit3 (973~990) 18 981, Bit11 (966~983) 18 974,
1194 20:09:11.592594 TX Bit4 (977~993) 17 985, Bit12 (968~984) 17 976,
1195 20:09:11.592653 TX Bit5 (974~993) 20 983, Bit13 (968~984) 17 976,
1196 20:09:11.592712 TX Bit6 (976~992) 17 984, Bit14 (967~986) 20 976,
1197 20:09:11.592771 TX Bit7 (977~993) 17 985, Bit15 (971~988) 18 979,
1198 20:09:11.592830
1199 20:09:11.592888 Write Rank0 MR14 =0xc
1200 20:09:11.592946
1201 20:09:11.593005 CH=0, VrefRange= 0, VrefLevel = 12
1202 20:09:11.593064 TX Bit0 (977~997) 21 987, Bit8 (965~982) 18 973,
1203 20:09:11.593123 TX Bit1 (976~994) 19 985, Bit9 (967~985) 19 976,
1204 20:09:11.593182 TX Bit2 (977~996) 20 986, Bit10 (971~990) 20 980,
1205 20:09:11.593242 TX Bit3 (972~991) 20 981, Bit11 (966~984) 19 975,
1206 20:09:11.593301 TX Bit4 (976~993) 18 984, Bit12 (968~985) 18 976,
1207 20:09:11.593361 TX Bit5 (974~993) 20 983, Bit13 (967~985) 19 976,
1208 20:09:11.593420 TX Bit6 (976~993) 18 984, Bit14 (967~986) 20 976,
1209 20:09:11.593479 TX Bit7 (977~994) 18 985, Bit15 (970~989) 20 979,
1210 20:09:11.593538
1211 20:09:11.593597 Write Rank0 MR14 =0xe
1212 20:09:11.593655
1213 20:09:11.593714 CH=0, VrefRange= 0, VrefLevel = 14
1214 20:09:11.593773 TX Bit0 (977~997) 21 987, Bit8 (965~982) 18 973,
1215 20:09:11.593832 TX Bit1 (976~995) 20 985, Bit9 (967~985) 19 976,
1216 20:09:11.593891 TX Bit2 (977~997) 21 987, Bit10 (971~990) 20 980,
1217 20:09:11.593950 TX Bit3 (971~991) 21 981, Bit11 (966~984) 19 975,
1218 20:09:11.594009 TX Bit4 (976~995) 20 985, Bit12 (967~985) 19 976,
1219 20:09:11.594069 TX Bit5 (973~993) 21 983, Bit13 (967~986) 20 976,
1220 20:09:11.594127 TX Bit6 (975~993) 19 984, Bit14 (967~986) 20 976,
1221 20:09:11.594186 TX Bit7 (976~994) 19 985, Bit15 (971~990) 20 980,
1222 20:09:11.594246
1223 20:09:11.594304 Write Rank0 MR14 =0x10
1224 20:09:11.594363
1225 20:09:11.594421 CH=0, VrefRange= 0, VrefLevel = 16
1226 20:09:11.594480 TX Bit0 (977~998) 22 987, Bit8 (964~983) 20 973,
1227 20:09:11.594539 TX Bit1 (976~996) 21 986, Bit9 (967~986) 20 976,
1228 20:09:11.594598 TX Bit2 (976~998) 23 987, Bit10 (970~990) 21 980,
1229 20:09:11.594657 TX Bit3 (971~991) 21 981, Bit11 (966~984) 19 975,
1230 20:09:11.594716 TX Bit4 (976~995) 20 985, Bit12 (967~986) 20 976,
1231 20:09:11.594775 TX Bit5 (973~994) 22 983, Bit13 (967~987) 21 977,
1232 20:09:11.594834 TX Bit6 (975~994) 20 984, Bit14 (967~987) 21 977,
1233 20:09:11.594893 TX Bit7 (976~995) 20 985, Bit15 (970~990) 21 980,
1234 20:09:11.594952
1235 20:09:11.595010 Write Rank0 MR14 =0x12
1236 20:09:11.595068
1237 20:09:11.595127 CH=0, VrefRange= 0, VrefLevel = 18
1238 20:09:11.595186 TX Bit0 (977~998) 22 987, Bit8 (964~983) 20 973,
1239 20:09:11.595245 TX Bit1 (976~997) 22 986, Bit9 (966~986) 21 976,
1240 20:09:11.595304 TX Bit2 (977~998) 22 987, Bit10 (970~991) 22 980,
1241 20:09:11.595362 TX Bit3 (970~992) 23 981, Bit11 (965~985) 21 975,
1242 20:09:11.595428 TX Bit4 (976~996) 21 986, Bit12 (967~986) 20 976,
1243 20:09:11.595495 TX Bit5 (972~994) 23 983, Bit13 (967~986) 20 976,
1244 20:09:11.595555 TX Bit6 (975~994) 20 984, Bit14 (967~988) 22 977,
1245 20:09:11.595614 TX Bit7 (976~996) 21 986, Bit15 (969~990) 22 979,
1246 20:09:11.595673
1247 20:09:11.595732 Write Rank0 MR14 =0x14
1248 20:09:11.595790
1249 20:09:11.595848 CH=0, VrefRange= 0, VrefLevel = 20
1250 20:09:11.596101 TX Bit0 (977~999) 23 988, Bit8 (963~984) 22 973,
1251 20:09:11.596167 TX Bit1 (975~998) 24 986, Bit9 (966~986) 21 976,
1252 20:09:11.596228 TX Bit2 (976~999) 24 987, Bit10 (969~991) 23 980,
1253 20:09:11.596288 TX Bit3 (970~992) 23 981, Bit11 (965~985) 21 975,
1254 20:09:11.596347 TX Bit4 (976~997) 22 986, Bit12 (967~987) 21 977,
1255 20:09:11.596406 TX Bit5 (972~994) 23 983, Bit13 (967~987) 21 977,
1256 20:09:11.596464 TX Bit6 (975~995) 21 985, Bit14 (966~988) 23 977,
1257 20:09:11.596524 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
1258 20:09:11.596582
1259 20:09:11.596641 Write Rank0 MR14 =0x16
1260 20:09:11.596699
1261 20:09:11.596757 CH=0, VrefRange= 0, VrefLevel = 22
1262 20:09:11.596816 TX Bit0 (976~999) 24 987, Bit8 (963~984) 22 973,
1263 20:09:11.596876 TX Bit1 (975~998) 24 986, Bit9 (966~987) 22 976,
1264 20:09:11.596934 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1265 20:09:11.596993 TX Bit3 (970~992) 23 981, Bit11 (965~986) 22 975,
1266 20:09:11.597053 TX Bit4 (975~997) 23 986, Bit12 (967~988) 22 977,
1267 20:09:11.597112 TX Bit5 (972~995) 24 983, Bit13 (966~988) 23 977,
1268 20:09:11.597171 TX Bit6 (974~996) 23 985, Bit14 (966~989) 24 977,
1269 20:09:11.597230 TX Bit7 (976~997) 22 986, Bit15 (968~991) 24 979,
1270 20:09:11.597289
1271 20:09:11.597347 Write Rank0 MR14 =0x18
1272 20:09:11.597405
1273 20:09:11.597463 CH=0, VrefRange= 0, VrefLevel = 24
1274 20:09:11.597522 TX Bit0 (976~999) 24 987, Bit8 (962~985) 24 973,
1275 20:09:11.597581 TX Bit1 (975~999) 25 987, Bit9 (965~987) 23 976,
1276 20:09:11.597641 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1277 20:09:11.597699 TX Bit3 (969~992) 24 980, Bit11 (965~986) 22 975,
1278 20:09:11.597768 TX Bit4 (975~998) 24 986, Bit12 (967~988) 22 977,
1279 20:09:11.597830 TX Bit5 (971~995) 25 983, Bit13 (966~988) 23 977,
1280 20:09:11.597890 TX Bit6 (974~996) 23 985, Bit14 (966~990) 25 978,
1281 20:09:11.597948 TX Bit7 (975~998) 24 986, Bit15 (969~991) 23 980,
1282 20:09:11.598008
1283 20:09:11.598067 Write Rank0 MR14 =0x1a
1284 20:09:11.598126
1285 20:09:11.598184 CH=0, VrefRange= 0, VrefLevel = 26
1286 20:09:11.598243 TX Bit0 (976~999) 24 987, Bit8 (963~985) 23 974,
1287 20:09:11.598302 TX Bit1 (975~999) 25 987, Bit9 (966~988) 23 977,
1288 20:09:11.598361 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1289 20:09:11.598420 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1290 20:09:11.598480 TX Bit4 (974~998) 25 986, Bit12 (966~989) 24 977,
1291 20:09:11.598541 TX Bit5 (971~996) 26 983, Bit13 (966~990) 25 978,
1292 20:09:11.598601 TX Bit6 (974~997) 24 985, Bit14 (966~990) 25 978,
1293 20:09:11.598659 TX Bit7 (976~999) 24 987, Bit15 (968~991) 24 979,
1294 20:09:11.598719
1295 20:09:11.598777 Write Rank0 MR14 =0x1c
1296 20:09:11.598836
1297 20:09:11.598894 CH=0, VrefRange= 0, VrefLevel = 28
1298 20:09:11.598953 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1299 20:09:11.599012 TX Bit1 (975~999) 25 987, Bit9 (966~988) 23 977,
1300 20:09:11.599071 TX Bit2 (976~1000) 25 988, Bit10 (968~993) 26 980,
1301 20:09:11.599129 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1302 20:09:11.599188 TX Bit4 (974~999) 26 986, Bit12 (966~990) 25 978,
1303 20:09:11.599247 TX Bit5 (971~996) 26 983, Bit13 (966~989) 24 977,
1304 20:09:11.599307 TX Bit6 (973~997) 25 985, Bit14 (966~990) 25 978,
1305 20:09:11.599365 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1306 20:09:11.599433
1307 20:09:11.599493 Write Rank0 MR14 =0x1e
1308 20:09:11.599552
1309 20:09:11.599610 CH=0, VrefRange= 0, VrefLevel = 30
1310 20:09:11.599669 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1311 20:09:11.599728 TX Bit1 (975~999) 25 987, Bit9 (966~988) 23 977,
1312 20:09:11.599788 TX Bit2 (976~1000) 25 988, Bit10 (968~993) 26 980,
1313 20:09:11.599852 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1314 20:09:11.599924 TX Bit4 (974~999) 26 986, Bit12 (966~990) 25 978,
1315 20:09:11.599984 TX Bit5 (971~996) 26 983, Bit13 (966~989) 24 977,
1316 20:09:11.600044 TX Bit6 (973~997) 25 985, Bit14 (966~990) 25 978,
1317 20:09:11.600103 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1318 20:09:11.600162
1319 20:09:11.600237 Write Rank0 MR14 =0x20
1320 20:09:11.600300
1321 20:09:11.600358 CH=0, VrefRange= 0, VrefLevel = 32
1322 20:09:11.600418 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1323 20:09:11.600478 TX Bit1 (975~999) 25 987, Bit9 (966~988) 23 977,
1324 20:09:11.600537 TX Bit2 (976~1000) 25 988, Bit10 (968~993) 26 980,
1325 20:09:11.600596 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1326 20:09:11.600656 TX Bit4 (974~999) 26 986, Bit12 (966~990) 25 978,
1327 20:09:11.600715 TX Bit5 (971~996) 26 983, Bit13 (966~989) 24 977,
1328 20:09:11.600774 TX Bit6 (973~997) 25 985, Bit14 (966~990) 25 978,
1329 20:09:11.600833 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1330 20:09:11.600892
1331 20:09:11.600950 Write Rank0 MR14 =0x22
1332 20:09:11.601009
1333 20:09:11.601066 CH=0, VrefRange= 0, VrefLevel = 34
1334 20:09:11.601125 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1335 20:09:11.601183 TX Bit1 (975~999) 25 987, Bit9 (966~988) 23 977,
1336 20:09:11.601242 TX Bit2 (976~1000) 25 988, Bit10 (968~993) 26 980,
1337 20:09:11.601300 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1338 20:09:11.601359 TX Bit4 (974~999) 26 986, Bit12 (966~990) 25 978,
1339 20:09:11.601417 TX Bit5 (971~996) 26 983, Bit13 (966~989) 24 977,
1340 20:09:11.601475 TX Bit6 (973~997) 25 985, Bit14 (966~990) 25 978,
1341 20:09:11.601534 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1342 20:09:11.601593
1343 20:09:11.601650
1344 20:09:11.601708 TX Vref found, early break! 377< 379
1345 20:09:11.601767 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1346 20:09:11.601825 u1DelayCellOfst[0]=9 cells (7 PI)
1347 20:09:11.601883 u1DelayCellOfst[1]=7 cells (6 PI)
1348 20:09:11.601941 u1DelayCellOfst[2]=9 cells (7 PI)
1349 20:09:11.601999 u1DelayCellOfst[3]=0 cells (0 PI)
1350 20:09:11.602253 u1DelayCellOfst[4]=6 cells (5 PI)
1351 20:09:11.602321 u1DelayCellOfst[5]=2 cells (2 PI)
1352 20:09:11.602382 u1DelayCellOfst[6]=5 cells (4 PI)
1353 20:09:11.602441 u1DelayCellOfst[7]=7 cells (6 PI)
1354 20:09:11.602500 Byte0, DQ PI dly=981, DQM PI dly= 984
1355 20:09:11.602559 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1356 20:09:11.602619
1357 20:09:11.602677 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1358 20:09:11.602736
1359 20:09:11.602795 u1DelayCellOfst[8]=0 cells (0 PI)
1360 20:09:11.602853 u1DelayCellOfst[9]=3 cells (3 PI)
1361 20:09:11.602912 u1DelayCellOfst[10]=7 cells (6 PI)
1362 20:09:11.602970 u1DelayCellOfst[11]=1 cells (1 PI)
1363 20:09:11.603029 u1DelayCellOfst[12]=5 cells (4 PI)
1364 20:09:11.603087 u1DelayCellOfst[13]=3 cells (3 PI)
1365 20:09:11.603146 u1DelayCellOfst[14]=5 cells (4 PI)
1366 20:09:11.603204 u1DelayCellOfst[15]=7 cells (6 PI)
1367 20:09:11.603262 Byte1, DQ PI dly=974, DQM PI dly= 977
1368 20:09:11.603320 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1369 20:09:11.603380
1370 20:09:11.603455 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1371 20:09:11.603516
1372 20:09:11.603574 Write Rank0 MR14 =0x1c
1373 20:09:11.603633
1374 20:09:11.603691 Final TX Range 0 Vref 28
1375 20:09:11.603750
1376 20:09:11.603808 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1377 20:09:11.603867
1378 20:09:11.603925 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1379 20:09:11.603984 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1380 20:09:11.604043 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1381 20:09:11.604101 Write Rank0 MR3 =0xb0
1382 20:09:11.604159 DramC Write-DBI on
1383 20:09:11.604217 ==
1384 20:09:11.604276 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1385 20:09:11.604335 fsp= 1, odt_onoff= 1, Byte mode= 0
1386 20:09:11.604393 ==
1387 20:09:11.604451 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1388 20:09:11.604510
1389 20:09:11.604568 Begin, DQ Scan Range 697~761
1390 20:09:11.604627
1391 20:09:11.604684
1392 20:09:11.604741 TX Vref Scan disable
1393 20:09:11.604800 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1394 20:09:11.604860 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1395 20:09:11.604920 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1396 20:09:11.604980 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1397 20:09:11.605040 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1398 20:09:11.605100 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1399 20:09:11.605159 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1400 20:09:11.605219 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1401 20:09:11.605278 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1402 20:09:11.605338 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1403 20:09:11.605397 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1404 20:09:11.605457 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1405 20:09:11.605516 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1406 20:09:11.605575 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1407 20:09:11.605635 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1408 20:09:11.605696 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1409 20:09:11.605756 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1410 20:09:11.605815 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1411 20:09:11.605875 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1412 20:09:11.605935 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1413 20:09:11.605999 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1414 20:09:11.606063 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1415 20:09:11.606136 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1416 20:09:11.606212 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1417 20:09:11.606274 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1418 20:09:11.606335 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1419 20:09:11.606398 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1420 20:09:11.606458 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1421 20:09:11.606518 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1422 20:09:11.606580 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1423 20:09:11.606642 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1424 20:09:11.606702 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1425 20:09:11.606764 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1426 20:09:11.606825 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1427 20:09:11.606885 Byte0, DQ PI dly=731, DQM PI dly= 731
1428 20:09:11.606944 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1429 20:09:11.607003
1430 20:09:11.607061 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1431 20:09:11.607120
1432 20:09:11.607178 Byte1, DQ PI dly=720, DQM PI dly= 720
1433 20:09:11.607237 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
1434 20:09:11.607296
1435 20:09:11.607354 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
1436 20:09:11.607423
1437 20:09:11.607484 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1438 20:09:11.607543 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1439 20:09:11.607602 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1440 20:09:11.607661 Write Rank0 MR3 =0x30
1441 20:09:11.607720 DramC Write-DBI off
1442 20:09:11.607778
1443 20:09:11.607837 [DATLAT]
1444 20:09:11.607895 Freq=1600, CH0 RK0, use_rxtx_scan=0
1445 20:09:11.607954
1446 20:09:11.608013 DATLAT Default: 0xf
1447 20:09:11.608073 7, 0xFFFF, sum=0
1448 20:09:11.608131 8, 0xFFFF, sum=0
1449 20:09:11.608191 9, 0xFFFF, sum=0
1450 20:09:11.608251 10, 0xFFFF, sum=0
1451 20:09:11.608310 11, 0xFFFF, sum=0
1452 20:09:11.608369 12, 0xFFFF, sum=0
1453 20:09:11.608443 13, 0xFFFF, sum=0
1454 20:09:11.608503 14, 0x0, sum=1
1455 20:09:11.608563 15, 0x0, sum=2
1456 20:09:11.608621 16, 0x0, sum=3
1457 20:09:11.608681 17, 0x0, sum=4
1458 20:09:11.608740 pattern=2 first_step=14 total pass=5 best_step=16
1459 20:09:11.608798 ==
1460 20:09:11.608857 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1461 20:09:11.608916 fsp= 1, odt_onoff= 1, Byte mode= 0
1462 20:09:11.608974 ==
1463 20:09:11.609033 Start DQ dly to find pass range UseTestEngine =1
1464 20:09:11.609091 x-axis: bit #, y-axis: DQ dly (-127~63)
1465 20:09:11.609150 RX Vref Scan = 1
1466 20:09:11.609208
1467 20:09:11.609266 RX Vref found, early break!
1468 20:09:11.609324
1469 20:09:11.609382 Final RX Vref 12, apply to both rank0 and 1
1470 20:09:11.609441 ==
1471 20:09:11.609500 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1472 20:09:11.609558 fsp= 1, odt_onoff= 1, Byte mode= 0
1473 20:09:11.609617 ==
1474 20:09:11.609675 DQS Delay:
1475 20:09:11.609734 DQS0 = 0, DQS1 = 0
1476 20:09:11.609792 DQM Delay:
1477 20:09:11.609850 DQM0 = 19, DQM1 = 18
1478 20:09:11.609908 DQ Delay:
1479 20:09:11.609967 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1480 20:09:11.610222 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1481 20:09:11.610288 DQ8 =14, DQ9 =16, DQ10 =26, DQ11 =16
1482 20:09:11.610348 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =21
1483 20:09:11.610407
1484 20:09:11.610464
1485 20:09:11.610522
1486 20:09:11.610580 [DramC_TX_OE_Calibration] TA2
1487 20:09:11.610638 Original DQ_B0 (3 6) =30, OEN = 27
1488 20:09:11.610697 Original DQ_B1 (3 6) =30, OEN = 27
1489 20:09:11.610755 23, 0x0, End_B0=23 End_B1=23
1490 20:09:11.610816 24, 0x0, End_B0=24 End_B1=24
1491 20:09:11.610875 25, 0x0, End_B0=25 End_B1=25
1492 20:09:11.610934 26, 0x0, End_B0=26 End_B1=26
1493 20:09:11.610993 27, 0x0, End_B0=27 End_B1=27
1494 20:09:11.611053 28, 0x0, End_B0=28 End_B1=28
1495 20:09:11.611112 29, 0x0, End_B0=29 End_B1=29
1496 20:09:11.611171 30, 0x0, End_B0=30 End_B1=30
1497 20:09:11.611229 31, 0xFBFF, End_B0=30 End_B1=30
1498 20:09:11.611289 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1499 20:09:11.611348 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1500 20:09:11.611416
1501 20:09:11.611479
1502 20:09:11.611537 Write Rank0 MR23 =0x3f
1503 20:09:11.611596 [DQSOSC]
1504 20:09:11.611654 [DQSOSCAuto] RK0, (LSB)MR18= 0x1010, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1505 20:09:11.611713 CH0_RK0: MR19=0x303, MR18=0x1010, DQSOSC=401, MR23=63, INC=15, DEC=22
1506 20:09:11.611772 Write Rank0 MR23 =0x3f
1507 20:09:11.611830 [DQSOSC]
1508 20:09:11.611888 [DQSOSCAuto] RK0, (LSB)MR18= 0x1313, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1509 20:09:11.611947 CH0 RK0: MR19=303, MR18=1313
1510 20:09:11.612005 [RankSwap] Rank num 2, (Multi 1), Rank 1
1511 20:09:11.612063 Write Rank0 MR2 =0xad
1512 20:09:11.612122 [Write Leveling]
1513 20:09:11.612179 delay byte0 byte1 byte2 byte3
1514 20:09:11.612237
1515 20:09:11.612294 10 0 0
1516 20:09:11.612354 11 0 0
1517 20:09:11.612412 12 0 0
1518 20:09:11.612471 13 0 0
1519 20:09:11.612529 14 0 0
1520 20:09:11.612587 15 0 0
1521 20:09:11.612646 16 0 0
1522 20:09:11.612705 17 0 0
1523 20:09:11.612764 18 0 0
1524 20:09:11.612823 19 0 0
1525 20:09:11.612882 20 0 0
1526 20:09:11.612941 21 0 0
1527 20:09:11.613000 22 0 0
1528 20:09:11.613059 23 0 ff
1529 20:09:11.613118 24 0 ff
1530 20:09:11.613177 25 0 ff
1531 20:09:11.613236 26 ff ff
1532 20:09:11.613296 27 ff ff
1533 20:09:11.613356 28 ff ff
1534 20:09:11.613415 29 ff ff
1535 20:09:11.613474 30 ff ff
1536 20:09:11.613533 31 ff ff
1537 20:09:11.613592 32 ff ff
1538 20:09:11.613651 pass bytecount = 0xff (0xff: all bytes pass)
1539 20:09:11.613709
1540 20:09:11.613767 DQS0 dly: 26
1541 20:09:11.613825 DQS1 dly: 23
1542 20:09:11.613883 Write Rank0 MR2 =0x2d
1543 20:09:11.613941 [RankSwap] Rank num 2, (Multi 1), Rank 0
1544 20:09:11.613999 Write Rank1 MR1 =0xd6
1545 20:09:11.614057 [Gating]
1546 20:09:11.614115 ==
1547 20:09:11.614173 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1548 20:09:11.614232 fsp= 1, odt_onoff= 1, Byte mode= 0
1549 20:09:11.614291 ==
1550 20:09:11.614349 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1551 20:09:11.614408 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
1552 20:09:11.614468 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1553 20:09:11.614527 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1554 20:09:11.614587 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1555 20:09:11.614646 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1556 20:09:11.614705 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1557 20:09:11.614764 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1558 20:09:11.614823 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1559 20:09:11.614883 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1560 20:09:11.614942 3 2 8 |404 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1561 20:09:11.615001 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1562 20:09:11.615061 3 2 16 |3534 1312 |(11 11)(11 11) |(0 0)(1 1)| 0
1563 20:09:11.615121 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1564 20:09:11.615180 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1565 20:09:11.615240 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1566 20:09:11.615299 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1567 20:09:11.615358 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1568 20:09:11.615425 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 20:09:11.615486 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 20:09:11.615547 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1571 20:09:11.615607 3 3 20 |3534 4343 |(11 11)(11 11) |(0 0)(1 1)| 0
1572 20:09:11.615667 3 3 24 |3534 e0d |(11 11)(11 11) |(0 0)(1 1)| 0
1573 20:09:11.615726 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1574 20:09:11.615785 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1575 20:09:11.615844 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1576 20:09:11.615903 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1577 20:09:11.615963 3 4 8 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1578 20:09:11.616022 3 4 12 |1918 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1579 20:09:11.616082 3 4 16 |3d3d 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
1580 20:09:11.616141 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 20:09:11.616200 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 20:09:11.616260 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 20:09:11.616319 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 20:09:11.616379 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 20:09:11.616438 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 20:09:11.616497 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 20:09:11.616556 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 20:09:11.616615 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 20:09:11.616674 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 20:09:11.616732 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 20:09:11.616791 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 20:09:11.616851 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1593 20:09:11.616909 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1594 20:09:11.616968 [Byte 0] Lead/lag Transition tap number (2)
1595 20:09:11.617026 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1596 20:09:11.617286 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1597 20:09:11.617364 [Byte 1] Lead/lag Transition tap number (2)
1598 20:09:11.617427 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1599 20:09:11.617488 [Byte 0]First pass (3, 6, 12)
1600 20:09:11.617558 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
1601 20:09:11.617620 3 6 20 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
1602 20:09:11.617680 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 20:09:11.617753 [Byte 1]First pass (3, 6, 24)
1604 20:09:11.617815 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 20:09:11.617876 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 20:09:11.617946 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 20:09:11.618007 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 20:09:11.618067 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 20:09:11.618134 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1610 20:09:11.618194 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 20:09:11.618257 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 20:09:11.618317 All bytes gating window > 1UI, Early break!
1613 20:09:11.618376
1614 20:09:11.618434 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1615 20:09:11.618496
1616 20:09:11.618554 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1617 20:09:11.618613
1618 20:09:11.618703
1619 20:09:11.618792
1620 20:09:11.618883 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1621 20:09:11.618973
1622 20:09:11.619064 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1623 20:09:11.619160
1624 20:09:11.619252
1625 20:09:11.619342 Write Rank1 MR1 =0x56
1626 20:09:11.619440
1627 20:09:11.619532 best RODT dly(2T, 0.5T) = (2, 3)
1628 20:09:11.619622
1629 20:09:11.619712 best RODT dly(2T, 0.5T) = (2, 3)
1630 20:09:11.619802 ==
1631 20:09:11.619893 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1632 20:09:11.619985 fsp= 1, odt_onoff= 1, Byte mode= 0
1633 20:09:11.620076 ==
1634 20:09:11.620167 Start DQ dly to find pass range UseTestEngine =0
1635 20:09:11.620258 x-axis: bit #, y-axis: DQ dly (-127~63)
1636 20:09:11.620349 RX Vref Scan = 0
1637 20:09:11.620439 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1638 20:09:11.620533 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1639 20:09:11.620627 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1640 20:09:11.620720 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1641 20:09:11.620813 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1642 20:09:11.620906 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1643 20:09:11.620998 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1644 20:09:11.621091 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1645 20:09:11.621185 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1646 20:09:11.621279 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1647 20:09:11.621371 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1648 20:09:11.621464 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1649 20:09:11.621557 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1650 20:09:11.621650 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1651 20:09:11.621742 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1652 20:09:11.621835 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1653 20:09:11.621928 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1654 20:09:11.622020 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1655 20:09:11.622113 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1656 20:09:11.622206 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1657 20:09:11.622299 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1658 20:09:11.622391 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1659 20:09:11.622484 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1660 20:09:11.622576 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1661 20:09:11.622669 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1662 20:09:11.622761 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1663 20:09:11.622854 0, [0] xxxoxoxx oxxoxxxx [MSB]
1664 20:09:11.622947 1, [0] xxxoxooo ooxoooxx [MSB]
1665 20:09:11.623039 2, [0] xxxoxoxo ooxoooxx [MSB]
1666 20:09:11.623135 3, [0] xoxooooo ooxoooox [MSB]
1667 20:09:11.623241 4, [0] oooooooo ooxoooox [MSB]
1668 20:09:11.623351 5, [0] oooooooo ooxooooo [MSB]
1669 20:09:11.623452 6, [0] oooooooo ooxooooo [MSB]
1670 20:09:11.623515 33, [0] oooooooo xooooooo [MSB]
1671 20:09:11.623576 34, [0] oooxoooo xooooooo [MSB]
1672 20:09:11.623636 35, [0] oooxoooo xooooooo [MSB]
1673 20:09:11.623695 36, [0] oooxoooo xooxoooo [MSB]
1674 20:09:11.623754 37, [0] oooxoxoo xxoxoxoo [MSB]
1675 20:09:11.623814 38, [0] oooxoxoo xxoxoxxo [MSB]
1676 20:09:11.623873 39, [0] oooxoxxx xxoxxxxo [MSB]
1677 20:09:11.623932 40, [0] oooxoxxx xxoxxxxo [MSB]
1678 20:09:11.623992 41, [0] oxxxxxxx xxoxxxxx [MSB]
1679 20:09:11.624051 42, [0] oxxxxxxx xxoxxxxx [MSB]
1680 20:09:11.624110 43, [0] xxxxxxxx xxoxxxxx [MSB]
1681 20:09:11.624169 44, [0] xxxxxxxx xxoxxxxx [MSB]
1682 20:09:11.624229 45, [0] xxxxxxxx xxxxxxxx [MSB]
1683 20:09:11.624288 iDelay=45, Bit 0, Center 23 (4 ~ 42) 39
1684 20:09:11.624348 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1685 20:09:11.624407 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1686 20:09:11.624466 iDelay=45, Bit 3, Center 15 (-2 ~ 33) 36
1687 20:09:11.624524 iDelay=45, Bit 4, Center 21 (3 ~ 40) 38
1688 20:09:11.624582 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1689 20:09:11.624640 iDelay=45, Bit 6, Center 20 (3 ~ 38) 36
1690 20:09:11.624699 iDelay=45, Bit 7, Center 19 (1 ~ 38) 38
1691 20:09:11.624757 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1692 20:09:11.624815 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1693 20:09:11.624874 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1694 20:09:11.624933 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1695 20:09:11.624991 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1696 20:09:11.625049 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1697 20:09:11.625107 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1698 20:09:11.625166 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1699 20:09:11.625224 ==
1700 20:09:11.625283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1701 20:09:11.625341 fsp= 1, odt_onoff= 1, Byte mode= 0
1702 20:09:11.625399 ==
1703 20:09:11.625458 DQS Delay:
1704 20:09:11.625516 DQS0 = 0, DQS1 = 0
1705 20:09:11.625574 DQM Delay:
1706 20:09:11.625632 DQM0 = 19, DQM1 = 19
1707 20:09:11.625690 DQ Delay:
1708 20:09:11.625748 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
1709 20:09:11.625806 DQ4 =21, DQ5 =18, DQ6 =20, DQ7 =19
1710 20:09:11.625863 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1711 20:09:11.625921 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1712 20:09:11.625980
1713 20:09:11.626037
1714 20:09:11.626094 DramC Write-DBI off
1715 20:09:11.626152 ==
1716 20:09:11.626211 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1717 20:09:11.626269 fsp= 1, odt_onoff= 1, Byte mode= 0
1718 20:09:11.626327 ==
1719 20:09:11.626385 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1720 20:09:11.626443
1721 20:09:11.626501 Begin, DQ Scan Range 919~1175
1722 20:09:11.626559
1723 20:09:11.626616
1724 20:09:11.626673 TX Vref Scan disable
1725 20:09:11.626733 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1726 20:09:11.626793 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1727 20:09:11.627055 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1728 20:09:11.627126 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1729 20:09:11.627187 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1730 20:09:11.627247 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1731 20:09:11.627307 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1732 20:09:11.627367 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1733 20:09:11.627439 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1734 20:09:11.627501 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1735 20:09:11.627561 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1736 20:09:11.627625 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1737 20:09:11.627685 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1738 20:09:11.627744 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1739 20:09:11.627808 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1740 20:09:11.627870 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1741 20:09:11.627929 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1742 20:09:11.627991 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1743 20:09:11.628051 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1744 20:09:11.628111 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1745 20:09:11.628178 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1746 20:09:11.628239 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1747 20:09:11.628299 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1748 20:09:11.628387 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1749 20:09:11.628481 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1750 20:09:11.628564 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1751 20:09:11.628627 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1752 20:09:11.628687 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1753 20:09:11.628778 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1754 20:09:11.628872 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1755 20:09:11.628968 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1756 20:09:11.629062 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1757 20:09:11.629129 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1758 20:09:11.629189 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1759 20:09:11.629249 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1760 20:09:11.629309 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1761 20:09:11.629369 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1762 20:09:11.629430 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1763 20:09:11.629491 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1764 20:09:11.629550 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1765 20:09:11.629610 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1766 20:09:11.629669 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1767 20:09:11.629729 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1768 20:09:11.629788 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1769 20:09:11.629847 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1770 20:09:11.629906 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1771 20:09:11.629964 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1772 20:09:11.630024 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1773 20:09:11.630083 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1774 20:09:11.630143 968 |3 6 8|[0] xxxxxxxx ooxooxxx [MSB]
1775 20:09:11.630201 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1776 20:09:11.630260 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1777 20:09:11.630319 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1778 20:09:11.630379 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1779 20:09:11.630438 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1780 20:09:11.630525 974 |3 6 14|[0] xoxooooo oooooooo [MSB]
1781 20:09:11.630622 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1782 20:09:11.630686 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1783 20:09:11.630747 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1784 20:09:11.630808 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1785 20:09:11.630868 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1786 20:09:11.630927 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1787 20:09:11.630986 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1788 20:09:11.631046 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1789 20:09:11.631105 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1790 20:09:11.631164 Byte0, DQ PI dly=982, DQM PI dly= 982
1791 20:09:11.631223 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1792 20:09:11.631283
1793 20:09:11.631341 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1794 20:09:11.631399
1795 20:09:11.631467 Byte1, DQ PI dly=978, DQM PI dly= 978
1796 20:09:11.631526 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1797 20:09:11.631585
1798 20:09:11.631643 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1799 20:09:11.631703
1800 20:09:11.631761 ==
1801 20:09:11.631819 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1802 20:09:11.631878 fsp= 1, odt_onoff= 1, Byte mode= 0
1803 20:09:11.631936 ==
1804 20:09:11.631995 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1805 20:09:11.632053
1806 20:09:11.632110 Begin, DQ Scan Range 954~1018
1807 20:09:11.632168 Write Rank1 MR14 =0x0
1808 20:09:11.632227
1809 20:09:11.632284 CH=0, VrefRange= 0, VrefLevel = 0
1810 20:09:11.632343 TX Bit0 (977~991) 15 984, Bit8 (968~981) 14 974,
1811 20:09:11.632402 TX Bit1 (976~987) 12 981, Bit9 (970~983) 14 976,
1812 20:09:11.632460 TX Bit2 (977~990) 14 983, Bit10 (976~985) 10 980,
1813 20:09:11.632518 TX Bit3 (971~983) 13 977, Bit11 (969~982) 14 975,
1814 20:09:11.632577 TX Bit4 (976~989) 14 982, Bit12 (972~984) 13 978,
1815 20:09:11.632635 TX Bit5 (973~985) 13 979, Bit13 (974~982) 9 978,
1816 20:09:11.632693 TX Bit6 (975~988) 14 981, Bit14 (973~983) 11 978,
1817 20:09:11.632752 TX Bit7 (976~989) 14 982, Bit15 (975~985) 11 980,
1818 20:09:11.632810
1819 20:09:11.632868 Write Rank1 MR14 =0x2
1820 20:09:11.632926
1821 20:09:11.632983 CH=0, VrefRange= 0, VrefLevel = 2
1822 20:09:11.633041 TX Bit0 (977~991) 15 984, Bit8 (968~982) 15 975,
1823 20:09:11.633100 TX Bit1 (976~988) 13 982, Bit9 (969~984) 16 976,
1824 20:09:11.633159 TX Bit2 (977~990) 14 983, Bit10 (976~989) 14 982,
1825 20:09:11.633217 TX Bit3 (970~984) 15 977, Bit11 (969~982) 14 975,
1826 20:09:11.633276 TX Bit4 (976~990) 15 983, Bit12 (971~984) 14 977,
1827 20:09:11.633334 TX Bit5 (973~986) 14 979, Bit13 (973~982) 10 977,
1828 20:09:11.633393 TX Bit6 (975~989) 15 982, Bit14 (973~985) 13 979,
1829 20:09:11.633451 TX Bit7 (975~990) 16 982, Bit15 (975~988) 14 981,
1830 20:09:11.633510
1831 20:09:11.633568 Write Rank1 MR14 =0x4
1832 20:09:11.633627
1833 20:09:11.633684 CH=0, VrefRange= 0, VrefLevel = 4
1834 20:09:11.633948 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1835 20:09:11.634014 TX Bit1 (976~990) 15 983, Bit9 (969~985) 17 977,
1836 20:09:11.634074 TX Bit2 (977~991) 15 984, Bit10 (975~989) 15 982,
1837 20:09:11.634135 TX Bit3 (970~984) 15 977, Bit11 (968~983) 16 975,
1838 20:09:11.634194 TX Bit4 (975~990) 16 982, Bit12 (970~985) 16 977,
1839 20:09:11.634253 TX Bit5 (972~988) 17 980, Bit13 (973~983) 11 978,
1840 20:09:11.634311 TX Bit6 (974~990) 17 982, Bit14 (972~985) 14 978,
1841 20:09:11.634369 TX Bit7 (975~991) 17 983, Bit15 (974~990) 17 982,
1842 20:09:11.634427
1843 20:09:11.634486 Write Rank1 MR14 =0x6
1844 20:09:11.634543
1845 20:09:11.634601 CH=0, VrefRange= 0, VrefLevel = 6
1846 20:09:11.634659 TX Bit0 (977~992) 16 984, Bit8 (967~983) 17 975,
1847 20:09:11.634717 TX Bit1 (976~990) 15 983, Bit9 (968~985) 18 976,
1848 20:09:11.634776 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1849 20:09:11.634834 TX Bit3 (970~985) 16 977, Bit11 (968~983) 16 975,
1850 20:09:11.634892 TX Bit4 (975~991) 17 983, Bit12 (970~985) 16 977,
1851 20:09:11.634951 TX Bit5 (971~989) 19 980, Bit13 (971~984) 14 977,
1852 20:09:11.635010 TX Bit6 (974~990) 17 982, Bit14 (971~985) 15 978,
1853 20:09:11.635069 TX Bit7 (974~991) 18 982, Bit15 (974~990) 17 982,
1854 20:09:11.635128
1855 20:09:11.635186 Write Rank1 MR14 =0x8
1856 20:09:11.635244
1857 20:09:11.635301 CH=0, VrefRange= 0, VrefLevel = 8
1858 20:09:11.635359 TX Bit0 (977~992) 16 984, Bit8 (967~983) 17 975,
1859 20:09:11.635428 TX Bit1 (976~990) 15 983, Bit9 (968~985) 18 976,
1860 20:09:11.635489 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1861 20:09:11.635548 TX Bit3 (970~985) 16 977, Bit11 (968~983) 16 975,
1862 20:09:11.635606 TX Bit4 (975~991) 17 983, Bit12 (970~985) 16 977,
1863 20:09:11.635665 TX Bit5 (971~989) 19 980, Bit13 (971~984) 14 977,
1864 20:09:11.635723 TX Bit6 (974~990) 17 982, Bit14 (971~985) 15 978,
1865 20:09:11.635781 TX Bit7 (974~991) 18 982, Bit15 (974~990) 17 982,
1866 20:09:11.635839
1867 20:09:11.635897 Write Rank1 MR14 =0xa
1868 20:09:11.635955
1869 20:09:11.636012 CH=0, VrefRange= 0, VrefLevel = 10
1870 20:09:11.636070 TX Bit0 (976~993) 18 984, Bit8 (967~983) 17 975,
1871 20:09:11.636129 TX Bit1 (975~991) 17 983, Bit9 (968~986) 19 977,
1872 20:09:11.636187 TX Bit2 (977~992) 16 984, Bit10 (975~991) 17 983,
1873 20:09:11.636247 TX Bit3 (969~987) 19 978, Bit11 (967~984) 18 975,
1874 20:09:11.636306 TX Bit4 (974~991) 18 982, Bit12 (969~986) 18 977,
1875 20:09:11.636365 TX Bit5 (971~990) 20 980, Bit13 (971~984) 14 977,
1876 20:09:11.636424 TX Bit6 (973~991) 19 982, Bit14 (970~988) 19 979,
1877 20:09:11.636482 TX Bit7 (973~992) 20 982, Bit15 (973~991) 19 982,
1878 20:09:11.636541
1879 20:09:11.636599 Write Rank1 MR14 =0xc
1880 20:09:11.636657
1881 20:09:11.636714 CH=0, VrefRange= 0, VrefLevel = 12
1882 20:09:11.636772 TX Bit0 (976~993) 18 984, Bit8 (967~984) 18 975,
1883 20:09:11.636830 TX Bit1 (975~991) 17 983, Bit9 (967~986) 20 976,
1884 20:09:11.636889 TX Bit2 (976~992) 17 984, Bit10 (974~991) 18 982,
1885 20:09:11.636947 TX Bit3 (969~988) 20 978, Bit11 (968~984) 17 976,
1886 20:09:11.637005 TX Bit4 (974~992) 19 983, Bit12 (969~986) 18 977,
1887 20:09:11.637064 TX Bit5 (971~990) 20 980, Bit13 (971~985) 15 978,
1888 20:09:11.637123 TX Bit6 (972~991) 20 981, Bit14 (969~988) 20 978,
1889 20:09:11.637181 TX Bit7 (973~992) 20 982, Bit15 (974~991) 18 982,
1890 20:09:11.637239
1891 20:09:11.637297 Write Rank1 MR14 =0xe
1892 20:09:11.637355
1893 20:09:11.637413 CH=0, VrefRange= 0, VrefLevel = 14
1894 20:09:11.637471 TX Bit0 (976~994) 19 985, Bit8 (967~985) 19 976,
1895 20:09:11.637529 TX Bit1 (975~992) 18 983, Bit9 (967~987) 21 977,
1896 20:09:11.637587 TX Bit2 (976~993) 18 984, Bit10 (974~991) 18 982,
1897 20:09:11.637646 TX Bit3 (969~988) 20 978, Bit11 (967~985) 19 976,
1898 20:09:11.637704 TX Bit4 (974~992) 19 983, Bit12 (969~987) 19 978,
1899 20:09:11.637762 TX Bit5 (970~991) 22 980, Bit13 (970~986) 17 978,
1900 20:09:11.637820 TX Bit6 (972~991) 20 981, Bit14 (969~989) 21 979,
1901 20:09:11.637882 TX Bit7 (973~992) 20 982, Bit15 (973~991) 19 982,
1902 20:09:11.637940
1903 20:09:11.637998 Write Rank1 MR14 =0x10
1904 20:09:11.638061
1905 20:09:11.638120 CH=0, VrefRange= 0, VrefLevel = 16
1906 20:09:11.638178 TX Bit0 (976~995) 20 985, Bit8 (966~985) 20 975,
1907 20:09:11.638236 TX Bit1 (974~992) 19 983, Bit9 (968~988) 21 978,
1908 20:09:11.638294 TX Bit2 (976~993) 18 984, Bit10 (974~992) 19 983,
1909 20:09:11.638354 TX Bit3 (969~989) 21 979, Bit11 (967~986) 20 976,
1910 20:09:11.638413 TX Bit4 (973~993) 21 983, Bit12 (968~988) 21 978,
1911 20:09:11.638475 TX Bit5 (970~991) 22 980, Bit13 (969~986) 18 977,
1912 20:09:11.638534 TX Bit6 (971~992) 22 981, Bit14 (969~989) 21 979,
1913 20:09:11.638593 TX Bit7 (972~993) 22 982, Bit15 (973~992) 20 982,
1914 20:09:11.638655
1915 20:09:11.638713 Write Rank1 MR14 =0x12
1916 20:09:11.638771
1917 20:09:11.638834 CH=0, VrefRange= 0, VrefLevel = 18
1918 20:09:11.638893 TX Bit0 (975~995) 21 985, Bit8 (967~985) 19 976,
1919 20:09:11.638952 TX Bit1 (974~993) 20 983, Bit9 (968~989) 22 978,
1920 20:09:11.639017 TX Bit2 (976~994) 19 985, Bit10 (974~992) 19 983,
1921 20:09:11.639110 TX Bit3 (969~990) 22 979, Bit11 (967~986) 20 976,
1922 20:09:11.639203 TX Bit4 (973~993) 21 983, Bit12 (968~990) 23 979,
1923 20:09:11.639295 TX Bit5 (970~991) 22 980, Bit13 (969~987) 19 978,
1924 20:09:11.639387 TX Bit6 (971~992) 22 981, Bit14 (969~990) 22 979,
1925 20:09:11.639468 TX Bit7 (972~993) 22 982, Bit15 (972~992) 21 982,
1926 20:09:11.639529
1927 20:09:11.639587 Write Rank1 MR14 =0x14
1928 20:09:11.639648
1929 20:09:11.639707 CH=0, VrefRange= 0, VrefLevel = 20
1930 20:09:11.639766 TX Bit0 (975~996) 22 985, Bit8 (966~986) 21 976,
1931 20:09:11.639824 TX Bit1 (974~994) 21 984, Bit9 (968~989) 22 978,
1932 20:09:11.639888 TX Bit2 (975~994) 20 984, Bit10 (973~993) 21 983,
1933 20:09:11.639947 TX Bit3 (968~990) 23 979, Bit11 (967~986) 20 976,
1934 20:09:11.640202 TX Bit4 (972~994) 23 983, Bit12 (968~990) 23 979,
1935 20:09:11.640269 TX Bit5 (970~991) 22 980, Bit13 (969~989) 21 979,
1936 20:09:11.640329 TX Bit6 (970~992) 23 981, Bit14 (968~990) 23 979,
1937 20:09:11.640388 TX Bit7 (971~994) 24 982, Bit15 (972~992) 21 982,
1938 20:09:11.640446
1939 20:09:11.640504 Write Rank1 MR14 =0x16
1940 20:09:11.640562
1941 20:09:11.640620 CH=0, VrefRange= 0, VrefLevel = 22
1942 20:09:11.640694 TX Bit0 (975~996) 22 985, Bit8 (966~987) 22 976,
1943 20:09:11.640755 TX Bit1 (974~994) 21 984, Bit9 (967~990) 24 978,
1944 20:09:11.640815 TX Bit2 (975~995) 21 985, Bit10 (973~993) 21 983,
1945 20:09:11.785946 TX Bit3 (968~990) 23 979, Bit11 (966~987) 22 976,
1946 20:09:11.786098 TX Bit4 (972~994) 23 983, Bit12 (968~990) 23 979,
1947 20:09:11.786170 TX Bit5 (970~991) 22 980, Bit13 (968~989) 22 978,
1948 20:09:11.786239 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1949 20:09:11.786303 TX Bit7 (971~994) 24 982, Bit15 (971~993) 23 982,
1950 20:09:11.786365
1951 20:09:11.786427 Write Rank1 MR14 =0x18
1952 20:09:11.786488
1953 20:09:11.786548 CH=0, VrefRange= 0, VrefLevel = 24
1954 20:09:11.786609 TX Bit0 (974~997) 24 985, Bit8 (966~987) 22 976,
1955 20:09:11.786669 TX Bit1 (973~995) 23 984, Bit9 (967~990) 24 978,
1956 20:09:11.786729 TX Bit2 (975~995) 21 985, Bit10 (972~994) 23 983,
1957 20:09:11.786788 TX Bit3 (968~991) 24 979, Bit11 (966~988) 23 977,
1958 20:09:11.786848 TX Bit4 (971~995) 25 983, Bit12 (968~990) 23 979,
1959 20:09:11.786906 TX Bit5 (969~992) 24 980, Bit13 (969~989) 21 979,
1960 20:09:11.786965 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1961 20:09:11.787024 TX Bit7 (971~995) 25 983, Bit15 (971~993) 23 982,
1962 20:09:11.787083
1963 20:09:11.787142 Write Rank1 MR14 =0x1a
1964 20:09:11.787201
1965 20:09:11.787258 CH=0, VrefRange= 0, VrefLevel = 26
1966 20:09:11.787354 TX Bit0 (974~997) 24 985, Bit8 (965~989) 25 977,
1967 20:09:11.787447 TX Bit1 (973~995) 23 984, Bit9 (967~990) 24 978,
1968 20:09:11.787509 TX Bit2 (975~997) 23 986, Bit10 (971~994) 24 982,
1969 20:09:11.787568 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
1970 20:09:11.787628 TX Bit4 (971~995) 25 983, Bit12 (968~990) 23 979,
1971 20:09:11.787687 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
1972 20:09:11.787747 TX Bit6 (970~994) 25 982, Bit14 (968~991) 24 979,
1973 20:09:11.787806 TX Bit7 (971~995) 25 983, Bit15 (970~993) 24 981,
1974 20:09:11.787866
1975 20:09:11.787924 Write Rank1 MR14 =0x1c
1976 20:09:11.787983
1977 20:09:11.788041 CH=0, VrefRange= 0, VrefLevel = 28
1978 20:09:11.788099 TX Bit0 (974~998) 25 986, Bit8 (965~989) 25 977,
1979 20:09:11.788158 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
1980 20:09:11.788217 TX Bit2 (975~997) 23 986, Bit10 (972~995) 24 983,
1981 20:09:11.788276 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1982 20:09:11.788334 TX Bit4 (971~995) 25 983, Bit12 (968~991) 24 979,
1983 20:09:11.788393 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
1984 20:09:11.788452 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
1985 20:09:11.788510 TX Bit7 (970~996) 27 983, Bit15 (970~994) 25 982,
1986 20:09:11.788568
1987 20:09:11.788627 Write Rank1 MR14 =0x1e
1988 20:09:11.788685
1989 20:09:11.788743 CH=0, VrefRange= 0, VrefLevel = 30
1990 20:09:11.788801 TX Bit0 (974~998) 25 986, Bit8 (966~989) 24 977,
1991 20:09:11.788861 TX Bit1 (972~996) 25 984, Bit9 (967~990) 24 978,
1992 20:09:11.788919 TX Bit2 (974~997) 24 985, Bit10 (971~995) 25 983,
1993 20:09:11.788978 TX Bit3 (967~991) 25 979, Bit11 (966~990) 25 978,
1994 20:09:11.789036 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
1995 20:09:11.789095 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
1996 20:09:11.789154 TX Bit6 (969~994) 26 981, Bit14 (968~991) 24 979,
1997 20:09:11.789213 TX Bit7 (970~997) 28 983, Bit15 (970~994) 25 982,
1998 20:09:11.789275
1999 20:09:11.789335 Write Rank1 MR14 =0x20
2000 20:09:11.789393
2001 20:09:11.789450 CH=0, VrefRange= 0, VrefLevel = 32
2002 20:09:11.789509 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
2003 20:09:11.789568 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2004 20:09:11.789626 TX Bit2 (973~998) 26 985, Bit10 (971~995) 25 983,
2005 20:09:11.789685 TX Bit3 (968~991) 24 979, Bit11 (965~990) 26 977,
2006 20:09:11.789743 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2007 20:09:11.789801 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
2008 20:09:11.789860 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
2009 20:09:11.789934 TX Bit7 (971~997) 27 984, Bit15 (970~993) 24 981,
2010 20:09:11.789994
2011 20:09:11.790052 Write Rank1 MR14 =0x22
2012 20:09:11.790111
2013 20:09:11.790169 CH=0, VrefRange= 0, VrefLevel = 34
2014 20:09:11.790227 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
2015 20:09:11.790286 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2016 20:09:11.790345 TX Bit2 (973~998) 26 985, Bit10 (971~995) 25 983,
2017 20:09:11.790404 TX Bit3 (968~991) 24 979, Bit11 (965~990) 26 977,
2018 20:09:11.790462 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2019 20:09:11.790520 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
2020 20:09:11.790579 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
2021 20:09:11.790637 TX Bit7 (971~997) 27 984, Bit15 (970~993) 24 981,
2022 20:09:11.790696
2023 20:09:11.790753 Write Rank1 MR14 =0x24
2024 20:09:11.790811
2025 20:09:11.790869 CH=0, VrefRange= 0, VrefLevel = 36
2026 20:09:11.790927 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
2027 20:09:11.790986 TX Bit1 (973~997) 25 985, Bit9 (967~990) 24 978,
2028 20:09:11.791045 TX Bit2 (973~998) 26 985, Bit10 (971~995) 25 983,
2029 20:09:11.791104 TX Bit3 (968~991) 24 979, Bit11 (965~990) 26 977,
2030 20:09:11.791162 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
2031 20:09:11.791220 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
2032 20:09:11.791287 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
2033 20:09:11.791381 TX Bit7 (971~997) 27 984, Bit15 (970~993) 24 981,
2034 20:09:11.791463
2035 20:09:11.791522
2036 20:09:11.791790 TX Vref found, early break! 382< 383
2037 20:09:11.791857 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2038 20:09:11.791918 u1DelayCellOfst[0]=7 cells (6 PI)
2039 20:09:11.791977 u1DelayCellOfst[1]=7 cells (6 PI)
2040 20:09:11.792036 u1DelayCellOfst[2]=7 cells (6 PI)
2041 20:09:11.792094 u1DelayCellOfst[3]=0 cells (0 PI)
2042 20:09:11.792153 u1DelayCellOfst[4]=6 cells (5 PI)
2043 20:09:11.792211 u1DelayCellOfst[5]=2 cells (2 PI)
2044 20:09:11.792270 u1DelayCellOfst[6]=3 cells (3 PI)
2045 20:09:11.792328 u1DelayCellOfst[7]=6 cells (5 PI)
2046 20:09:11.792387 Byte0, DQ PI dly=979, DQM PI dly= 982
2047 20:09:11.792446 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2048 20:09:11.792504
2049 20:09:11.792563 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2050 20:09:11.792622
2051 20:09:11.792680 u1DelayCellOfst[8]=0 cells (0 PI)
2052 20:09:11.792739 u1DelayCellOfst[9]=1 cells (1 PI)
2053 20:09:11.792798 u1DelayCellOfst[10]=7 cells (6 PI)
2054 20:09:11.792857 u1DelayCellOfst[11]=0 cells (0 PI)
2055 20:09:11.792915 u1DelayCellOfst[12]=2 cells (2 PI)
2056 20:09:11.792974 u1DelayCellOfst[13]=2 cells (2 PI)
2057 20:09:11.793032 u1DelayCellOfst[14]=2 cells (2 PI)
2058 20:09:11.793091 u1DelayCellOfst[15]=5 cells (4 PI)
2059 20:09:11.793150 Byte1, DQ PI dly=977, DQM PI dly= 980
2060 20:09:11.793209 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2061 20:09:11.793276
2062 20:09:11.793369 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2063 20:09:11.793448
2064 20:09:11.793509 Write Rank1 MR14 =0x20
2065 20:09:11.793568
2066 20:09:11.793627 Final TX Range 0 Vref 32
2067 20:09:11.793686
2068 20:09:11.793746 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2069 20:09:11.793805
2070 20:09:11.793864 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2071 20:09:11.793924 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2072 20:09:11.793984 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2073 20:09:11.794043 Write Rank1 MR3 =0xb0
2074 20:09:11.794102 DramC Write-DBI on
2075 20:09:11.794161 ==
2076 20:09:11.794220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2077 20:09:11.794280 fsp= 1, odt_onoff= 1, Byte mode= 0
2078 20:09:11.794339 ==
2079 20:09:11.794397 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2080 20:09:11.794457
2081 20:09:11.794515 Begin, DQ Scan Range 700~764
2082 20:09:11.794573
2083 20:09:11.794631
2084 20:09:11.794690 TX Vref Scan disable
2085 20:09:11.794749 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2086 20:09:11.794809 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2087 20:09:11.794870 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2088 20:09:11.794930 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2089 20:09:11.794991 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2090 20:09:11.795051 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2091 20:09:11.795111 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2092 20:09:11.795172 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2093 20:09:11.795231 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2094 20:09:11.795291 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2095 20:09:11.795492 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2096 20:09:11.795631 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2097 20:09:11.795738 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2098 20:09:11.795804 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2099 20:09:11.795877 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2100 20:09:11.795974 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2101 20:09:11.796139 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2102 20:09:11.796254 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2103 20:09:11.796328 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2104 20:09:11.796397 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2105 20:09:11.796458 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2106 20:09:11.796520 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2107 20:09:11.796581 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2108 20:09:11.796642 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2109 20:09:11.796702 Byte0, DQ PI dly=728, DQM PI dly= 728
2110 20:09:11.796762 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2111 20:09:11.796822
2112 20:09:11.796886 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2113 20:09:11.796946
2114 20:09:11.797005 Byte1, DQ PI dly=722, DQM PI dly= 722
2115 20:09:11.797064 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2116 20:09:11.797124
2117 20:09:11.797182 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2118 20:09:11.797242
2119 20:09:11.797301 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2120 20:09:11.797362 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2121 20:09:11.797443 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2122 20:09:11.797506 Write Rank1 MR3 =0x30
2123 20:09:11.797565 DramC Write-DBI off
2124 20:09:11.797624
2125 20:09:11.797682 [DATLAT]
2126 20:09:11.797787 Freq=1600, CH0 RK1, use_rxtx_scan=0
2127 20:09:11.797882
2128 20:09:11.797974 DATLAT Default: 0x10
2129 20:09:11.798055 7, 0xFFFF, sum=0
2130 20:09:11.798121 8, 0xFFFF, sum=0
2131 20:09:11.798185 9, 0xFFFF, sum=0
2132 20:09:11.798279 10, 0xFFFF, sum=0
2133 20:09:11.798376 11, 0xFFFF, sum=0
2134 20:09:11.798479 12, 0xFFFF, sum=0
2135 20:09:11.798574 13, 0xFFFF, sum=0
2136 20:09:11.798668 14, 0x0, sum=1
2137 20:09:11.798761 15, 0x0, sum=2
2138 20:09:11.798855 16, 0x0, sum=3
2139 20:09:11.798950 17, 0x0, sum=4
2140 20:09:11.799047 pattern=2 first_step=14 total pass=5 best_step=16
2141 20:09:11.799139 ==
2142 20:09:11.799238 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2143 20:09:11.799331 fsp= 1, odt_onoff= 1, Byte mode= 0
2144 20:09:11.799431 ==
2145 20:09:11.799495 Start DQ dly to find pass range UseTestEngine =1
2146 20:09:11.799555 x-axis: bit #, y-axis: DQ dly (-127~63)
2147 20:09:11.799615 RX Vref Scan = 0
2148 20:09:11.799674 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2149 20:09:11.799735 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2150 20:09:11.799796 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2151 20:09:11.799857 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2152 20:09:11.800026 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2153 20:09:11.800152 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2154 20:09:11.800239 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2155 20:09:11.800307 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2156 20:09:11.800372 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2157 20:09:11.800433 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2158 20:09:11.800499 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2159 20:09:11.800575 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2160 20:09:11.800637 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2161 20:09:11.801023 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2162 20:09:11.801131 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2163 20:09:11.801233 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2164 20:09:11.801330 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2165 20:09:11.801425 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2166 20:09:11.801519 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2167 20:09:11.801613 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2168 20:09:11.801707 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2169 20:09:11.801800 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2170 20:09:11.801893 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2171 20:09:11.801986 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2172 20:09:11.802079 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2173 20:09:11.802172 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2174 20:09:11.802268 0, [0] xxxoxxxx oxxoxxxx [MSB]
2175 20:09:11.802367 1, [0] xxxoxoxx ooxooxxx [MSB]
2176 20:09:11.802464 2, [0] xxxoxoxx ooxoooxx [MSB]
2177 20:09:11.802560 3, [0] xxxoxooo ooxoooox [MSB]
2178 20:09:11.802624 4, [0] xxxoxooo ooxoooox [MSB]
2179 20:09:11.802694 5, [0] ooxooooo ooxoooox [MSB]
2180 20:09:11.802764 6, [0] oooooooo ooxooooo [MSB]
2181 20:09:11.802936 33, [0] oooooooo xooooooo [MSB]
2182 20:09:11.803063 34, [0] oooxoooo xooooooo [MSB]
2183 20:09:11.803233 35, [0] oooxoxoo xooxoooo [MSB]
2184 20:09:11.803385 36, [0] oooxoxoo xooxoxoo [MSB]
2185 20:09:11.803490 37, [0] oooxoxoo xxoxoxoo [MSB]
2186 20:09:11.803573 38, [0] oooxoxxo xxoxxxxo [MSB]
2187 20:09:11.803669 39, [0] oxxxoxxx xxoxxxxo [MSB]
2188 20:09:11.803749 40, [0] oxxxxxxx xxoxxxxx [MSB]
2189 20:09:11.803811 41, [0] xxxxxxxx xxoxxxxx [MSB]
2190 20:09:11.803872 42, [0] xxxxxxxx xxoxxxxx [MSB]
2191 20:09:11.803933 43, [0] xxxxxxxx xxoxxxxx [MSB]
2192 20:09:11.803993 44, [0] xxxxxxxx xxxxxxxx [MSB]
2193 20:09:11.804054 iDelay=44, Bit 0, Center 22 (5 ~ 40) 36
2194 20:09:11.804114 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2195 20:09:11.804174 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2196 20:09:11.804233 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2197 20:09:11.804292 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2198 20:09:11.804352 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2199 20:09:11.804410 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2200 20:09:11.804469 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2201 20:09:11.804528 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2202 20:09:11.804587 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2203 20:09:11.804650 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2204 20:09:11.804712 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2205 20:09:11.804770 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2206 20:09:11.804829 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2207 20:09:11.804888 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2208 20:09:11.804965 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2209 20:09:11.805026 ==
2210 20:09:11.805086 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2211 20:09:11.805182 fsp= 1, odt_onoff= 1, Byte mode= 0
2212 20:09:11.805275 ==
2213 20:09:11.805371 DQS Delay:
2214 20:09:11.805464 DQS0 = 0, DQS1 = 0
2215 20:09:11.805609 DQM Delay:
2216 20:09:11.805748 DQM0 = 19, DQM1 = 19
2217 20:09:11.805863 DQ Delay:
2218 20:09:11.805958 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
2219 20:09:11.806051 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2220 20:09:11.806142 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2221 20:09:11.806234 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2222 20:09:11.806328
2223 20:09:11.806421
2224 20:09:11.806489
2225 20:09:11.806549 [DramC_TX_OE_Calibration] TA2
2226 20:09:11.806609 Original DQ_B0 (3 6) =30, OEN = 27
2227 20:09:11.806668 Original DQ_B1 (3 6) =30, OEN = 27
2228 20:09:11.806728 23, 0x0, End_B0=23 End_B1=23
2229 20:09:11.806849 24, 0x0, End_B0=24 End_B1=24
2230 20:09:11.807037 25, 0x0, End_B0=25 End_B1=25
2231 20:09:11.807156 26, 0x0, End_B0=26 End_B1=26
2232 20:09:11.808656 27, 0x0, End_B0=27 End_B1=27
2233 20:09:11.812128 28, 0x0, End_B0=28 End_B1=28
2234 20:09:11.812239 29, 0x0, End_B0=29 End_B1=29
2235 20:09:11.815427 30, 0x0, End_B0=30 End_B1=30
2236 20:09:11.818366 31, 0xFFFF, End_B0=30 End_B1=30
2237 20:09:11.825302 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2238 20:09:11.828995 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2239 20:09:11.829198
2240 20:09:11.829331
2241 20:09:11.832286 Write Rank1 MR23 =0x3f
2242 20:09:11.832385 [DQSOSC]
2243 20:09:11.841956 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2244 20:09:11.848604 CH0_RK1: MR19=0x202, MR18=0xD7D7, DQSOSC=433, MR23=63, INC=13, DEC=19
2245 20:09:11.848749 Write Rank1 MR23 =0x3f
2246 20:09:11.848852 [DQSOSC]
2247 20:09:11.858959 [DQSOSCAuto] RK1, (LSB)MR18= 0xdada, (MSB)MR19= 0x202, tDQSOscB0 = 431 ps tDQSOscB1 = 431 ps
2248 20:09:11.862176 CH0 RK1: MR19=202, MR18=DADA
2249 20:09:11.865843 [RxdqsGatingPostProcess] freq 1600
2250 20:09:11.868545 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2251 20:09:11.871929 Rank: 0
2252 20:09:11.872030 best DQS0 dly(2T, 0.5T) = (2, 5)
2253 20:09:11.875131 best DQS1 dly(2T, 0.5T) = (2, 5)
2254 20:09:11.878589 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2255 20:09:11.881774 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2256 20:09:11.881874 Rank: 1
2257 20:09:11.885556 best DQS0 dly(2T, 0.5T) = (2, 6)
2258 20:09:11.888938 best DQS1 dly(2T, 0.5T) = (2, 6)
2259 20:09:11.892374 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2260 20:09:11.895482 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2261 20:09:11.902066 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2262 20:09:11.902165 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2263 20:09:11.908679 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2264 20:09:11.912274 Write Rank0 MR13 =0x59
2265 20:09:11.912376 ==
2266 20:09:11.915265 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2267 20:09:11.918651 fsp= 1, odt_onoff= 1, Byte mode= 0
2268 20:09:11.918746 ==
2269 20:09:11.921991 === u2Vref_new: 0x56 --> 0x3a
2270 20:09:11.925620 === u2Vref_new: 0x58 --> 0x58
2271 20:09:11.928365 === u2Vref_new: 0x5a --> 0x5a
2272 20:09:11.931787 === u2Vref_new: 0x5c --> 0x78
2273 20:09:11.935186 === u2Vref_new: 0x5e --> 0x7a
2274 20:09:11.938464 === u2Vref_new: 0x60 --> 0x90
2275 20:09:11.941959 [CA 0] Center 38 (13~63) winsize 51
2276 20:09:11.945135 [CA 1] Center 37 (11~63) winsize 53
2277 20:09:11.948645 [CA 2] Center 34 (6~63) winsize 58
2278 20:09:11.951999 [CA 3] Center 34 (6~63) winsize 58
2279 20:09:11.952114 [CA 4] Center 34 (6~63) winsize 58
2280 20:09:11.955321 [CA 5] Center 28 (-1~58) winsize 60
2281 20:09:11.955423
2282 20:09:11.961726 [CATrainingPosCal] consider 1 rank data
2283 20:09:11.961834 u2DelayCellTimex100 = 735/100 ps
2284 20:09:11.968394 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2285 20:09:11.971885 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2286 20:09:11.975334 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2287 20:09:11.978694 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2288 20:09:11.982184 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2289 20:09:11.985039 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2290 20:09:11.985133
2291 20:09:11.988321 CA PerBit enable=1, Macro0, CA PI delay=28
2292 20:09:11.991637 === u2Vref_new: 0x5e --> 0x7a
2293 20:09:11.991734
2294 20:09:11.995466 Vref(ca) range 1: 30
2295 20:09:11.995562
2296 20:09:11.995634 CS Dly= 11 (42-0-32)
2297 20:09:11.998491 Write Rank0 MR13 =0xd8
2298 20:09:12.001683 Write Rank0 MR13 =0xd8
2299 20:09:12.001781 Write Rank0 MR12 =0x5e
2300 20:09:12.005351 Write Rank1 MR13 =0x59
2301 20:09:12.005448 ==
2302 20:09:12.008648 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2303 20:09:12.011783 fsp= 1, odt_onoff= 1, Byte mode= 0
2304 20:09:12.011900 ==
2305 20:09:12.015777 === u2Vref_new: 0x56 --> 0x3a
2306 20:09:12.018936 === u2Vref_new: 0x58 --> 0x58
2307 20:09:12.022052 === u2Vref_new: 0x5a --> 0x5a
2308 20:09:12.025557 === u2Vref_new: 0x5c --> 0x78
2309 20:09:12.028741 === u2Vref_new: 0x5e --> 0x7a
2310 20:09:12.032165 === u2Vref_new: 0x60 --> 0x90
2311 20:09:12.035429 [CA 0] Center 37 (12~63) winsize 52
2312 20:09:12.039185 [CA 1] Center 37 (12~63) winsize 52
2313 20:09:12.042464 [CA 2] Center 34 (6~63) winsize 58
2314 20:09:12.045338 [CA 3] Center 34 (6~63) winsize 58
2315 20:09:12.049442 [CA 4] Center 34 (6~63) winsize 58
2316 20:09:12.052785 [CA 5] Center 27 (-2~57) winsize 60
2317 20:09:12.052882
2318 20:09:12.055465 [CATrainingPosCal] consider 2 rank data
2319 20:09:12.058919 u2DelayCellTimex100 = 735/100 ps
2320 20:09:12.062151 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2321 20:09:12.065596 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2322 20:09:12.068824 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2323 20:09:12.072428 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2324 20:09:12.075321 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2325 20:09:12.078826 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2326 20:09:12.078919
2327 20:09:12.082163 CA PerBit enable=1, Macro0, CA PI delay=28
2328 20:09:12.085596 === u2Vref_new: 0x60 --> 0x90
2329 20:09:12.085693
2330 20:09:12.089061 Vref(ca) range 1: 32
2331 20:09:12.089155
2332 20:09:12.089227 CS Dly= 12 (43-0-32)
2333 20:09:12.091942 Write Rank1 MR13 =0xd8
2334 20:09:12.095691 Write Rank1 MR13 =0xd8
2335 20:09:12.095791 Write Rank1 MR12 =0x60
2336 20:09:12.099045 [RankSwap] Rank num 2, (Multi 1), Rank 0
2337 20:09:12.102410 Write Rank0 MR2 =0xad
2338 20:09:12.102505 [Write Leveling]
2339 20:09:12.105343 delay byte0 byte1 byte2 byte3
2340 20:09:12.105436
2341 20:09:12.109334 10 0 0
2342 20:09:12.109431 11 0 0
2343 20:09:12.112116 12 0 0
2344 20:09:12.112209 13 0 0
2345 20:09:12.112282 14 0 0
2346 20:09:12.115753 15 0 0
2347 20:09:12.115856 16 0 0
2348 20:09:12.119128 17 0 0
2349 20:09:12.119224 18 0 0
2350 20:09:12.122449 19 0 0
2351 20:09:12.122544 20 0 0
2352 20:09:12.122617 21 0 0
2353 20:09:12.125339 22 0 0
2354 20:09:12.125431 23 0 0
2355 20:09:12.128801 24 0 0
2356 20:09:12.128894 25 0 ff
2357 20:09:12.132271 26 0 ff
2358 20:09:12.132367 27 0 ff
2359 20:09:12.132439 28 0 ff
2360 20:09:12.135359 29 0 ff
2361 20:09:12.135463 30 0 ff
2362 20:09:12.139059 31 0 ff
2363 20:09:12.139155 32 0 ff
2364 20:09:12.142021 33 ff ff
2365 20:09:12.142115 34 0 ff
2366 20:09:12.145639 35 ff ff
2367 20:09:12.145732 36 ff ff
2368 20:09:12.145804 37 ff ff
2369 20:09:12.149009 38 ff ff
2370 20:09:12.149101 39 ff ff
2371 20:09:12.152799 40 ff ff
2372 20:09:12.152897 41 ff ff
2373 20:09:12.155816 pass bytecount = 0xff (0xff: all bytes pass)
2374 20:09:12.159374
2375 20:09:12.159479 DQS0 dly: 35
2376 20:09:12.159550 DQS1 dly: 25
2377 20:09:12.162566 Write Rank0 MR2 =0x2d
2378 20:09:12.165651 [RankSwap] Rank num 2, (Multi 1), Rank 0
2379 20:09:12.165747 Write Rank0 MR1 =0xd6
2380 20:09:12.169132 [Gating]
2381 20:09:12.169226 ==
2382 20:09:12.172484 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2383 20:09:12.176204 fsp= 1, odt_onoff= 1, Byte mode= 0
2384 20:09:12.176345 ==
2385 20:09:12.183019 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2386 20:09:12.186227 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2387 20:09:12.189130 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2388 20:09:12.196013 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2389 20:09:12.199324 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2390 20:09:12.202643 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2391 20:09:12.206104 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2392 20:09:12.212875 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2393 20:09:12.216266 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2394 20:09:12.219395 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2395 20:09:12.226287 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2396 20:09:12.229343 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2397 20:09:12.232591 3 2 16 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2398 20:09:12.239519 3 2 20 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2399 20:09:12.242872 3 2 24 |3d3d 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
2400 20:09:12.246286 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2401 20:09:12.249711 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2402 20:09:12.256179 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2403 20:09:12.259691 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2404 20:09:12.262493 3 3 12 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2405 20:09:12.269831 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2406 20:09:12.273148 3 3 20 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2407 20:09:12.276390 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2408 20:09:12.282885 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2409 20:09:12.286808 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2410 20:09:12.289397 [Byte 1] Lead/lag Transition tap number (1)
2411 20:09:12.292707 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2412 20:09:12.299338 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2413 20:09:12.302682 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2414 20:09:12.305944 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2415 20:09:12.309445 3 4 16 |b0a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2416 20:09:12.316146 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2417 20:09:12.319518 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2418 20:09:12.322898 3 4 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2419 20:09:12.329696 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2420 20:09:12.332821 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2421 20:09:12.336017 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2422 20:09:12.342831 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2423 20:09:12.346460 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2424 20:09:12.349888 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2425 20:09:12.356366 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2426 20:09:12.359775 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2427 20:09:12.363418 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2428 20:09:12.366153 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2429 20:09:12.373188 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2430 20:09:12.375999 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2431 20:09:12.379391 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2432 20:09:12.382955 [Byte 0] Lead/lag Transition tap number (3)
2433 20:09:12.390147 3 6 16 |605 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2434 20:09:12.393332 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2435 20:09:12.396697 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2436 20:09:12.399589 [Byte 1] Lead/lag Transition tap number (2)
2437 20:09:12.406361 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
2438 20:09:12.410169 [Byte 0]First pass (3, 6, 24)
2439 20:09:12.413005 3 6 28 |4646 1212 |(0 0)(1 1) |(0 0)(0 0)| 0
2440 20:09:12.416343 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2441 20:09:12.419832 [Byte 1]First pass (3, 7, 0)
2442 20:09:12.423034 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2443 20:09:12.426617 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2444 20:09:12.429802 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2445 20:09:12.433246 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2446 20:09:12.439602 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2447 20:09:12.442989 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2448 20:09:12.446511 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2449 20:09:12.450203 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2450 20:09:12.453113 All bytes gating window > 1UI, Early break!
2451 20:09:12.456391
2452 20:09:12.459733 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2453 20:09:12.459835
2454 20:09:12.463301 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2455 20:09:12.463397
2456 20:09:12.463478
2457 20:09:12.463544
2458 20:09:12.466725 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2459 20:09:12.466819
2460 20:09:12.469742 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2461 20:09:12.469836
2462 20:09:12.469908
2463 20:09:12.472972 Write Rank0 MR1 =0x56
2464 20:09:12.473065
2465 20:09:12.476257 best RODT dly(2T, 0.5T) = (2, 3)
2466 20:09:12.476354
2467 20:09:12.479518 best RODT dly(2T, 0.5T) = (2, 3)
2468 20:09:12.479615 ==
2469 20:09:12.486282 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2470 20:09:12.486414 fsp= 1, odt_onoff= 1, Byte mode= 0
2471 20:09:12.489654 ==
2472 20:09:12.492725 Start DQ dly to find pass range UseTestEngine =0
2473 20:09:12.495826 x-axis: bit #, y-axis: DQ dly (-127~63)
2474 20:09:12.495953 RX Vref Scan = 0
2475 20:09:12.499292 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2476 20:09:12.502786 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2477 20:09:12.505741 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2478 20:09:12.509279 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2479 20:09:12.512612 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2480 20:09:12.515860 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2481 20:09:12.519235 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2482 20:09:12.519336 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2483 20:09:12.522584 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2484 20:09:12.525838 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2485 20:09:12.529177 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2486 20:09:12.532256 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2487 20:09:12.535630 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2488 20:09:12.538945 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2489 20:09:12.542277 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2490 20:09:12.545751 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2491 20:09:12.545862 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2492 20:09:12.549253 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2493 20:09:12.552900 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2494 20:09:12.555631 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2495 20:09:12.559253 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2496 20:09:12.562648 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2497 20:09:12.565775 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2498 20:09:12.565879 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2499 20:09:12.569147 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2500 20:09:12.572557 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2501 20:09:12.576101 0, [0] xxxoxxxx ooxxxxxo [MSB]
2502 20:09:12.579333 1, [0] xxooxxxx ooxxxxxo [MSB]
2503 20:09:12.582675 2, [0] xxooxxxx ooxxxxxo [MSB]
2504 20:09:12.582783 3, [0] oxooxxxo oooxxxxo [MSB]
2505 20:09:12.586010 4, [0] oxoooxxo oooxooxo [MSB]
2506 20:09:12.589485 5, [0] oooooxxo ooooooxo [MSB]
2507 20:09:12.592368 6, [0] oooooooo ooooooxo [MSB]
2508 20:09:12.595670 32, [0] oooooooo ooooooox [MSB]
2509 20:09:12.598865 33, [0] oooooooo ooooooox [MSB]
2510 20:09:12.602576 34, [0] oooooooo ooooooox [MSB]
2511 20:09:12.602687 35, [0] oooxoooo xxooooox [MSB]
2512 20:09:12.605620 36, [0] oooxoooo xxooooox [MSB]
2513 20:09:12.608861 37, [0] ooxxoooo xxooooox [MSB]
2514 20:09:12.611996 38, [0] ooxxoooo xxooooox [MSB]
2515 20:09:12.615424 39, [0] ooxxooox xxxoooox [MSB]
2516 20:09:12.619070 40, [0] oxxxxoox xxxoooox [MSB]
2517 20:09:12.622223 41, [0] oxxxxoox xxxxxxox [MSB]
2518 20:09:12.622327 42, [0] xxxxxxxx xxxxxxxx [MSB]
2519 20:09:12.628666 iDelay=42, Bit 0, Center 22 (3 ~ 41) 39
2520 20:09:12.632017 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2521 20:09:12.635437 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2522 20:09:12.638488 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2523 20:09:12.641903 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2524 20:09:12.645073 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2525 20:09:12.648810 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
2526 20:09:12.651731 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2527 20:09:12.654975 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2528 20:09:12.658417 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2529 20:09:12.661550 iDelay=42, Bit 10, Center 20 (3 ~ 38) 36
2530 20:09:12.665168 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2531 20:09:12.668556 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2532 20:09:12.672317 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2533 20:09:12.678639 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
2534 20:09:12.681908 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2535 20:09:12.682003 ==
2536 20:09:12.684795 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2537 20:09:12.688507 fsp= 1, odt_onoff= 1, Byte mode= 0
2538 20:09:12.688600 ==
2539 20:09:12.691695 DQS Delay:
2540 20:09:12.691787 DQS0 = 0, DQS1 = 0
2541 20:09:12.691859 DQM Delay:
2542 20:09:12.695118 DQM0 = 20, DQM1 = 19
2543 20:09:12.695209 DQ Delay:
2544 20:09:12.698659 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2545 20:09:12.701337 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2546 20:09:12.704781 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2547 20:09:12.708073 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2548 20:09:12.708165
2549 20:09:12.708236
2550 20:09:12.711349 DramC Write-DBI off
2551 20:09:12.711452 ==
2552 20:09:12.718146 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2553 20:09:12.718263 fsp= 1, odt_onoff= 1, Byte mode= 0
2554 20:09:12.721531 ==
2555 20:09:12.724509 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2556 20:09:12.724612
2557 20:09:12.728119 Begin, DQ Scan Range 921~1177
2558 20:09:12.728216
2559 20:09:12.728289
2560 20:09:12.728356 TX Vref Scan disable
2561 20:09:12.731621 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2562 20:09:12.734990 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2563 20:09:12.741259 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2564 20:09:12.744856 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2565 20:09:12.748083 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2566 20:09:12.751362 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2567 20:09:12.754396 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2568 20:09:12.757635 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2569 20:09:12.761280 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2570 20:09:12.764404 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2571 20:09:12.767669 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2572 20:09:12.771134 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2573 20:09:12.774700 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2574 20:09:12.778114 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2575 20:09:12.780928 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2576 20:09:12.784465 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2577 20:09:12.787657 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2578 20:09:12.794605 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2579 20:09:12.797818 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2580 20:09:12.801264 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2581 20:09:12.804206 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2582 20:09:12.808110 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2583 20:09:12.811033 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2584 20:09:12.814340 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2585 20:09:12.817450 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2586 20:09:12.821376 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2587 20:09:12.824742 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2588 20:09:12.827414 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2589 20:09:12.830849 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2590 20:09:12.834175 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2591 20:09:12.837674 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2592 20:09:12.840762 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2593 20:09:12.847347 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2594 20:09:12.850616 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2595 20:09:12.854058 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2596 20:09:12.857627 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2597 20:09:12.860577 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2598 20:09:12.863814 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2599 20:09:12.867384 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2600 20:09:12.870542 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2601 20:09:12.874014 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2602 20:09:12.877624 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2603 20:09:12.880386 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2604 20:09:12.884184 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2605 20:09:12.887453 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2606 20:09:12.890790 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2607 20:09:12.893982 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2608 20:09:12.897370 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2609 20:09:12.900662 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2610 20:09:12.904022 970 |3 6 10|[0] xxxxxxxx xxxxxxxo [MSB]
2611 20:09:12.907275 971 |3 6 11|[0] xxxxxxxx oxxxxxxo [MSB]
2612 20:09:12.910293 972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]
2613 20:09:12.914158 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
2614 20:09:12.920620 974 |3 6 14|[0] xxxxxxxx oooxxxoo [MSB]
2615 20:09:12.924207 975 |3 6 15|[0] xxxxxxxx oooooxoo [MSB]
2616 20:09:12.927593 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2617 20:09:12.930482 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2618 20:09:12.933805 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2619 20:09:12.937157 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2620 20:09:12.940853 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2621 20:09:12.943634 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2622 20:09:12.947171 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2623 20:09:12.950374 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
2624 20:09:12.953798 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2625 20:09:12.957217 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2626 20:09:12.960313 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2627 20:09:12.966988 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2628 20:09:12.970380 991 |3 6 31|[0] oooooooo xxooooox [MSB]
2629 20:09:12.973857 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2630 20:09:12.977460 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2631 20:09:12.980508 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2632 20:09:12.983659 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2633 20:09:12.987145 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2634 20:09:12.990641 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2635 20:09:12.993543 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2636 20:09:12.997122 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2637 20:09:13.000210 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2638 20:09:13.003587 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2639 20:09:13.006896 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2640 20:09:13.010575 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
2641 20:09:13.017077 1004 |3 6 44|[0] oxxxooxx xxxxxxxx [MSB]
2642 20:09:13.020110 1005 |3 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
2643 20:09:13.023528 Byte0, DQ PI dly=992, DQM PI dly= 992
2644 20:09:13.026880 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2645 20:09:13.026974
2646 20:09:13.030431 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2647 20:09:13.030526
2648 20:09:13.033531 Byte1, DQ PI dly=980, DQM PI dly= 980
2649 20:09:13.040297 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2650 20:09:13.040394
2651 20:09:13.043301 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2652 20:09:13.043431
2653 20:09:13.043526 ==
2654 20:09:13.049979 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2655 20:09:13.053435 fsp= 1, odt_onoff= 1, Byte mode= 0
2656 20:09:13.053529 ==
2657 20:09:13.056884 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2658 20:09:13.056978
2659 20:09:13.060063 Begin, DQ Scan Range 956~1020
2660 20:09:13.060157 Write Rank0 MR14 =0x0
2661 20:09:13.070794
2662 20:09:13.070949 CH=1, VrefRange= 0, VrefLevel = 0
2663 20:09:13.076828 TX Bit0 (985~1001) 17 993, Bit8 (975~985) 11 980,
2664 20:09:13.080297 TX Bit1 (985~998) 14 991, Bit9 (976~984) 9 980,
2665 20:09:13.087080 TX Bit2 (984~997) 14 990, Bit10 (977~988) 12 982,
2666 20:09:13.090275 TX Bit3 (982~994) 13 988, Bit11 (977~989) 13 983,
2667 20:09:13.093422 TX Bit4 (984~999) 16 991, Bit12 (976~989) 14 982,
2668 20:09:13.100211 TX Bit5 (986~999) 14 992, Bit13 (978~990) 13 984,
2669 20:09:13.103620 TX Bit6 (985~999) 15 992, Bit14 (976~988) 13 982,
2670 20:09:13.107139 TX Bit7 (985~998) 14 991, Bit15 (970~981) 12 975,
2671 20:09:13.107242
2672 20:09:13.110085 Write Rank0 MR14 =0x2
2673 20:09:13.119378
2674 20:09:13.119530 CH=1, VrefRange= 0, VrefLevel = 2
2675 20:09:13.126049 TX Bit0 (985~1001) 17 993, Bit8 (974~985) 12 979,
2676 20:09:13.129599 TX Bit1 (984~998) 15 991, Bit9 (975~984) 10 979,
2677 20:09:13.136015 TX Bit2 (983~998) 16 990, Bit10 (977~989) 13 983,
2678 20:09:13.139247 TX Bit3 (981~995) 15 988, Bit11 (977~990) 14 983,
2679 20:09:13.142271 TX Bit4 (984~1000) 17 992, Bit12 (977~990) 14 983,
2680 20:09:13.149382 TX Bit5 (986~1000) 15 993, Bit13 (978~991) 14 984,
2681 20:09:13.152945 TX Bit6 (985~999) 15 992, Bit14 (976~988) 13 982,
2682 20:09:13.158955 TX Bit7 (984~999) 16 991, Bit15 (970~983) 14 976,
2683 20:09:13.159084
2684 20:09:13.159197 Write Rank0 MR14 =0x4
2685 20:09:13.168850
2686 20:09:13.168982 CH=1, VrefRange= 0, VrefLevel = 4
2687 20:09:13.175711 TX Bit0 (985~1002) 18 993, Bit8 (973~986) 14 979,
2688 20:09:13.179132 TX Bit1 (984~999) 16 991, Bit9 (975~985) 11 980,
2689 20:09:13.185678 TX Bit2 (983~999) 17 991, Bit10 (976~990) 15 983,
2690 20:09:13.188641 TX Bit3 (981~996) 16 988, Bit11 (977~991) 15 984,
2691 20:09:13.192090 TX Bit4 (984~1000) 17 992, Bit12 (976~991) 16 983,
2692 20:09:13.198768 TX Bit5 (986~1000) 15 993, Bit13 (977~991) 15 984,
2693 20:09:13.202053 TX Bit6 (985~1000) 16 992, Bit14 (975~990) 16 982,
2694 20:09:13.208448 TX Bit7 (984~999) 16 991, Bit15 (969~983) 15 976,
2695 20:09:13.208544
2696 20:09:13.208638 Write Rank0 MR14 =0x6
2697 20:09:13.218337
2698 20:09:13.218431 CH=1, VrefRange= 0, VrefLevel = 6
2699 20:09:13.225073 TX Bit0 (984~1003) 20 993, Bit8 (974~987) 14 980,
2700 20:09:13.228512 TX Bit1 (984~999) 16 991, Bit9 (974~985) 12 979,
2701 20:09:13.234911 TX Bit2 (982~999) 18 990, Bit10 (976~991) 16 983,
2702 20:09:13.238341 TX Bit3 (980~997) 18 988, Bit11 (977~991) 15 984,
2703 20:09:13.241541 TX Bit4 (984~1000) 17 992, Bit12 (976~992) 17 984,
2704 20:09:13.248447 TX Bit5 (985~1001) 17 993, Bit13 (977~991) 15 984,
2705 20:09:13.251787 TX Bit6 (984~1000) 17 992, Bit14 (975~991) 17 983,
2706 20:09:13.258165 TX Bit7 (984~999) 16 991, Bit15 (970~984) 15 977,
2707 20:09:13.258257
2708 20:09:13.258328 Write Rank0 MR14 =0x8
2709 20:09:13.268149
2710 20:09:13.268240 CH=1, VrefRange= 0, VrefLevel = 8
2711 20:09:13.275193 TX Bit0 (984~1003) 20 993, Bit8 (972~987) 16 979,
2712 20:09:13.278207 TX Bit1 (983~1000) 18 991, Bit9 (974~986) 13 980,
2713 20:09:13.284671 TX Bit2 (982~1000) 19 991, Bit10 (975~991) 17 983,
2714 20:09:13.288033 TX Bit3 (980~998) 19 989, Bit11 (977~991) 15 984,
2715 20:09:13.291499 TX Bit4 (983~1001) 19 992, Bit12 (976~992) 17 984,
2716 20:09:13.298581 TX Bit5 (985~1002) 18 993, Bit13 (977~992) 16 984,
2717 20:09:13.301699 TX Bit6 (984~1001) 18 992, Bit14 (975~991) 17 983,
2718 20:09:13.307962 TX Bit7 (984~1000) 17 992, Bit15 (970~984) 15 977,
2719 20:09:13.308058
2720 20:09:13.308128 Write Rank0 MR14 =0xa
2721 20:09:13.318516
2722 20:09:13.321582 CH=1, VrefRange= 0, VrefLevel = 10
2723 20:09:13.325312 TX Bit0 (984~1005) 22 994, Bit8 (972~988) 17 980,
2724 20:09:13.328734 TX Bit1 (983~1001) 19 992, Bit9 (973~987) 15 980,
2725 20:09:13.335031 TX Bit2 (981~1000) 20 990, Bit10 (975~991) 17 983,
2726 20:09:13.338533 TX Bit3 (979~998) 20 988, Bit11 (976~992) 17 984,
2727 20:09:13.342105 TX Bit4 (983~1002) 20 992, Bit12 (976~993) 18 984,
2728 20:09:13.348088 TX Bit5 (985~1002) 18 993, Bit13 (977~992) 16 984,
2729 20:09:13.351522 TX Bit6 (984~1001) 18 992, Bit14 (975~992) 18 983,
2730 20:09:13.358400 TX Bit7 (983~1000) 18 991, Bit15 (969~985) 17 977,
2731 20:09:13.358493
2732 20:09:13.358565 Write Rank0 MR14 =0xc
2733 20:09:13.368858
2734 20:09:13.372459 CH=1, VrefRange= 0, VrefLevel = 12
2735 20:09:13.375523 TX Bit0 (984~1005) 22 994, Bit8 (972~989) 18 980,
2736 20:09:13.378912 TX Bit1 (983~1001) 19 992, Bit9 (972~987) 16 979,
2737 20:09:13.385625 TX Bit2 (981~1001) 21 991, Bit10 (975~992) 18 983,
2738 20:09:13.388741 TX Bit3 (979~998) 20 988, Bit11 (975~992) 18 983,
2739 20:09:13.392152 TX Bit4 (983~1003) 21 993, Bit12 (975~993) 19 984,
2740 20:09:13.399008 TX Bit5 (984~1002) 19 993, Bit13 (977~992) 16 984,
2741 20:09:13.401811 TX Bit6 (983~1002) 20 992, Bit14 (974~992) 19 983,
2742 20:09:13.408702 TX Bit7 (983~1001) 19 992, Bit15 (969~985) 17 977,
2743 20:09:13.408801
2744 20:09:13.408872 Write Rank0 MR14 =0xe
2745 20:09:13.419262
2746 20:09:13.419355 CH=1, VrefRange= 0, VrefLevel = 14
2747 20:09:13.425763 TX Bit0 (984~1005) 22 994, Bit8 (971~990) 20 980,
2748 20:09:13.429048 TX Bit1 (982~1002) 21 992, Bit9 (972~988) 17 980,
2749 20:09:13.435698 TX Bit2 (980~1001) 22 990, Bit10 (975~992) 18 983,
2750 20:09:13.439372 TX Bit3 (979~999) 21 989, Bit11 (975~993) 19 984,
2751 20:09:13.442740 TX Bit4 (982~1003) 22 992, Bit12 (975~993) 19 984,
2752 20:09:13.449598 TX Bit5 (984~1003) 20 993, Bit13 (976~993) 18 984,
2753 20:09:13.452738 TX Bit6 (983~1003) 21 993, Bit14 (974~993) 20 983,
2754 20:09:13.459114 TX Bit7 (983~1002) 20 992, Bit15 (969~986) 18 977,
2755 20:09:13.459207
2756 20:09:13.459279 Write Rank0 MR14 =0x10
2757 20:09:13.469898
2758 20:09:13.473272 CH=1, VrefRange= 0, VrefLevel = 16
2759 20:09:13.476565 TX Bit0 (984~1006) 23 995, Bit8 (971~991) 21 981,
2760 20:09:13.479718 TX Bit1 (982~1003) 22 992, Bit9 (972~990) 19 981,
2761 20:09:13.486434 TX Bit2 (980~1002) 23 991, Bit10 (974~992) 19 983,
2762 20:09:13.489970 TX Bit3 (978~999) 22 988, Bit11 (975~993) 19 984,
2763 20:09:13.493064 TX Bit4 (982~1004) 23 993, Bit12 (975~994) 20 984,
2764 20:09:13.499750 TX Bit5 (984~1004) 21 994, Bit13 (976~993) 18 984,
2765 20:09:13.502662 TX Bit6 (983~1003) 21 993, Bit14 (974~993) 20 983,
2766 20:09:13.509388 TX Bit7 (983~1003) 21 993, Bit15 (968~986) 19 977,
2767 20:09:13.509483
2768 20:09:13.509555 Write Rank0 MR14 =0x12
2769 20:09:13.520296
2770 20:09:13.523698 CH=1, VrefRange= 0, VrefLevel = 18
2771 20:09:13.527192 TX Bit0 (983~1006) 24 994, Bit8 (971~991) 21 981,
2772 20:09:13.530196 TX Bit1 (981~1004) 24 992, Bit9 (971~990) 20 980,
2773 20:09:13.536872 TX Bit2 (980~1002) 23 991, Bit10 (974~993) 20 983,
2774 20:09:13.540356 TX Bit3 (978~1000) 23 989, Bit11 (975~994) 20 984,
2775 20:09:13.543852 TX Bit4 (982~1005) 24 993, Bit12 (974~994) 21 984,
2776 20:09:13.550482 TX Bit5 (984~1005) 22 994, Bit13 (976~994) 19 985,
2777 20:09:13.553588 TX Bit6 (982~1004) 23 993, Bit14 (974~993) 20 983,
2778 20:09:13.560728 TX Bit7 (982~1003) 22 992, Bit15 (968~987) 20 977,
2779 20:09:13.560824
2780 20:09:13.560895 Write Rank0 MR14 =0x14
2781 20:09:13.571203
2782 20:09:13.574667 CH=1, VrefRange= 0, VrefLevel = 20
2783 20:09:13.578090 TX Bit0 (983~1006) 24 994, Bit8 (971~991) 21 981,
2784 20:09:13.580927 TX Bit1 (981~1004) 24 992, Bit9 (971~990) 20 980,
2785 20:09:13.587789 TX Bit2 (979~1003) 25 991, Bit10 (974~993) 20 983,
2786 20:09:13.591094 TX Bit3 (978~1000) 23 989, Bit11 (974~994) 21 984,
2787 20:09:13.594112 TX Bit4 (981~1005) 25 993, Bit12 (974~994) 21 984,
2788 20:09:13.601125 TX Bit5 (984~1006) 23 995, Bit13 (976~994) 19 985,
2789 20:09:13.604411 TX Bit6 (982~1005) 24 993, Bit14 (973~994) 22 983,
2790 20:09:13.610698 TX Bit7 (982~1004) 23 993, Bit15 (968~987) 20 977,
2791 20:09:13.610805
2792 20:09:13.610902 Write Rank0 MR14 =0x16
2793 20:09:13.621865
2794 20:09:13.625291 CH=1, VrefRange= 0, VrefLevel = 22
2795 20:09:13.628400 TX Bit0 (983~1006) 24 994, Bit8 (970~992) 23 981,
2796 20:09:13.631587 TX Bit1 (981~1005) 25 993, Bit9 (970~991) 22 980,
2797 20:09:13.638511 TX Bit2 (979~1004) 26 991, Bit10 (972~994) 23 983,
2798 20:09:13.641850 TX Bit3 (978~1000) 23 989, Bit11 (974~995) 22 984,
2799 20:09:13.645076 TX Bit4 (981~1006) 26 993, Bit12 (974~995) 22 984,
2800 20:09:13.651769 TX Bit5 (983~1006) 24 994, Bit13 (975~994) 20 984,
2801 20:09:13.654680 TX Bit6 (982~1005) 24 993, Bit14 (973~994) 22 983,
2802 20:09:13.661538 TX Bit7 (981~1005) 25 993, Bit15 (968~988) 21 978,
2803 20:09:13.661702
2804 20:09:13.661808 Write Rank0 MR14 =0x18
2805 20:09:13.672550
2806 20:09:13.676041 CH=1, VrefRange= 0, VrefLevel = 24
2807 20:09:13.679429 TX Bit0 (982~1006) 25 994, Bit8 (970~992) 23 981,
2808 20:09:13.682126 TX Bit1 (981~1005) 25 993, Bit9 (971~991) 21 981,
2809 20:09:13.688941 TX Bit2 (979~1005) 27 992, Bit10 (973~995) 23 984,
2810 20:09:13.692305 TX Bit3 (978~1001) 24 989, Bit11 (974~995) 22 984,
2811 20:09:13.695666 TX Bit4 (981~1006) 26 993, Bit12 (973~996) 24 984,
2812 20:09:13.702233 TX Bit5 (983~1006) 24 994, Bit13 (975~995) 21 985,
2813 20:09:13.705522 TX Bit6 (981~1006) 26 993, Bit14 (973~994) 22 983,
2814 20:09:13.712331 TX Bit7 (982~1005) 24 993, Bit15 (968~989) 22 978,
2815 20:09:13.712428
2816 20:09:13.712523 Write Rank0 MR14 =0x1a
2817 20:09:13.723004
2818 20:09:13.726374 CH=1, VrefRange= 0, VrefLevel = 26
2819 20:09:13.730103 TX Bit0 (982~1007) 26 994, Bit8 (970~992) 23 981,
2820 20:09:13.733172 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2821 20:09:13.740204 TX Bit2 (979~1005) 27 992, Bit10 (972~994) 23 983,
2822 20:09:13.743525 TX Bit3 (978~1001) 24 989, Bit11 (973~996) 24 984,
2823 20:09:13.746856 TX Bit4 (980~1006) 27 993, Bit12 (972~996) 25 984,
2824 20:09:13.753431 TX Bit5 (983~1006) 24 994, Bit13 (975~996) 22 985,
2825 20:09:13.756584 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2826 20:09:13.763037 TX Bit7 (981~1006) 26 993, Bit15 (967~990) 24 978,
2827 20:09:13.763140
2828 20:09:13.763252 Write Rank0 MR14 =0x1c
2829 20:09:13.774183
2830 20:09:13.774290 CH=1, VrefRange= 0, VrefLevel = 28
2831 20:09:13.780763 TX Bit0 (982~1007) 26 994, Bit8 (970~993) 24 981,
2832 20:09:13.784200 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2833 20:09:13.790621 TX Bit2 (978~1005) 28 991, Bit10 (972~995) 24 983,
2834 20:09:13.794012 TX Bit3 (978~1002) 25 990, Bit11 (973~996) 24 984,
2835 20:09:13.797413 TX Bit4 (980~1006) 27 993, Bit12 (972~996) 25 984,
2836 20:09:13.804391 TX Bit5 (982~1007) 26 994, Bit13 (974~996) 23 985,
2837 20:09:13.807429 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2838 20:09:13.814281 TX Bit7 (980~1006) 27 993, Bit15 (967~990) 24 978,
2839 20:09:13.814382
2840 20:09:13.814454 Write Rank0 MR14 =0x1e
2841 20:09:13.825040
2842 20:09:13.828389 CH=1, VrefRange= 0, VrefLevel = 30
2843 20:09:13.831733 TX Bit0 (981~1007) 27 994, Bit8 (969~993) 25 981,
2844 20:09:13.835112 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2845 20:09:13.841599 TX Bit2 (978~1005) 28 991, Bit10 (971~995) 25 983,
2846 20:09:13.845008 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2847 20:09:13.848340 TX Bit4 (981~1006) 26 993, Bit12 (972~996) 25 984,
2848 20:09:13.855329 TX Bit5 (982~1007) 26 994, Bit13 (974~996) 23 985,
2849 20:09:13.858175 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2850 20:09:13.864930 TX Bit7 (980~1006) 27 993, Bit15 (967~990) 24 978,
2851 20:09:13.865063
2852 20:09:13.865138 Write Rank0 MR14 =0x20
2853 20:09:13.875749
2854 20:09:13.875874 CH=1, VrefRange= 0, VrefLevel = 32
2855 20:09:13.882317 TX Bit0 (981~1007) 27 994, Bit8 (969~993) 25 981,
2856 20:09:13.885704 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2857 20:09:13.892232 TX Bit2 (978~1005) 28 991, Bit10 (971~995) 25 983,
2858 20:09:13.895590 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2859 20:09:13.898979 TX Bit4 (981~1006) 26 993, Bit12 (972~996) 25 984,
2860 20:09:13.905702 TX Bit5 (982~1007) 26 994, Bit13 (974~996) 23 985,
2861 20:09:13.909020 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2862 20:09:13.916020 TX Bit7 (980~1006) 27 993, Bit15 (967~990) 24 978,
2863 20:09:13.916114
2864 20:09:13.918912 wait MRW command Rank0 MR14 =0x22 fired (1)
2865 20:09:13.919003 Write Rank0 MR14 =0x22
2866 20:09:13.930407
2867 20:09:13.933748 CH=1, VrefRange= 0, VrefLevel = 34
2868 20:09:13.937402 TX Bit0 (981~1007) 27 994, Bit8 (969~993) 25 981,
2869 20:09:13.940711 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2870 20:09:13.947187 TX Bit2 (978~1005) 28 991, Bit10 (971~995) 25 983,
2871 20:09:13.950578 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2872 20:09:13.953718 TX Bit4 (981~1006) 26 993, Bit12 (972~996) 25 984,
2873 20:09:13.960763 TX Bit5 (982~1007) 26 994, Bit13 (974~996) 23 985,
2874 20:09:13.964080 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2875 20:09:13.970346 TX Bit7 (980~1006) 27 993, Bit15 (967~990) 24 978,
2876 20:09:13.970443
2877 20:09:13.970516 Write Rank0 MR14 =0x24
2878 20:09:13.981533
2879 20:09:13.984742 CH=1, VrefRange= 0, VrefLevel = 36
2880 20:09:13.987866 TX Bit0 (981~1007) 27 994, Bit8 (969~993) 25 981,
2881 20:09:13.991612 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2882 20:09:13.997792 TX Bit2 (978~1005) 28 991, Bit10 (971~995) 25 983,
2883 20:09:14.001523 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2884 20:09:14.004449 TX Bit4 (981~1006) 26 993, Bit12 (972~996) 25 984,
2885 20:09:14.011264 TX Bit5 (982~1007) 26 994, Bit13 (974~996) 23 985,
2886 20:09:14.014745 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2887 20:09:14.020878 TX Bit7 (980~1006) 27 993, Bit15 (967~990) 24 978,
2888 20:09:14.020971
2889 20:09:14.021044 Write Rank0 MR14 =0x26
2890 20:09:14.032157
2891 20:09:14.035433 CH=1, VrefRange= 0, VrefLevel = 38
2892 20:09:14.039163 TX Bit0 (981~1007) 27 994, Bit8 (969~993) 25 981,
2893 20:09:14.041785 TX Bit1 (980~1006) 27 993, Bit9 (970~992) 23 981,
2894 20:09:14.048922 TX Bit2 (978~1005) 28 991, Bit10 (971~995) 25 983,
2895 20:09:14.051767 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2896 20:09:14.055185 TX Bit4 (981~1006) 26 993, Bit12 (972~996) 25 984,
2897 20:09:14.061998 TX Bit5 (982~1007) 26 994, Bit13 (974~996) 23 985,
2898 20:09:14.065365 TX Bit6 (981~1006) 26 993, Bit14 (972~995) 24 983,
2899 20:09:14.072090 TX Bit7 (980~1006) 27 993, Bit15 (967~990) 24 978,
2900 20:09:14.072184
2901 20:09:14.072255
2902 20:09:14.075236 TX Vref found, early break! 377< 385
2903 20:09:14.078705 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2904 20:09:14.082023 u1DelayCellOfst[0]=6 cells (5 PI)
2905 20:09:14.084974 u1DelayCellOfst[1]=5 cells (4 PI)
2906 20:09:14.088288 u1DelayCellOfst[2]=2 cells (2 PI)
2907 20:09:14.091699 u1DelayCellOfst[3]=0 cells (0 PI)
2908 20:09:14.095335 u1DelayCellOfst[4]=5 cells (4 PI)
2909 20:09:14.098486 u1DelayCellOfst[5]=6 cells (5 PI)
2910 20:09:14.101727 u1DelayCellOfst[6]=5 cells (4 PI)
2911 20:09:14.101818 u1DelayCellOfst[7]=5 cells (4 PI)
2912 20:09:14.104982 Byte0, DQ PI dly=989, DQM PI dly= 991
2913 20:09:14.111834 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2914 20:09:14.111926
2915 20:09:14.114971 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2916 20:09:14.115062
2917 20:09:14.118833 u1DelayCellOfst[8]=3 cells (3 PI)
2918 20:09:14.122148 u1DelayCellOfst[9]=3 cells (3 PI)
2919 20:09:14.125341 u1DelayCellOfst[10]=6 cells (5 PI)
2920 20:09:14.128185 u1DelayCellOfst[11]=7 cells (6 PI)
2921 20:09:14.131858 u1DelayCellOfst[12]=7 cells (6 PI)
2922 20:09:14.135038 u1DelayCellOfst[13]=9 cells (7 PI)
2923 20:09:14.138458 u1DelayCellOfst[14]=6 cells (5 PI)
2924 20:09:14.141471 u1DelayCellOfst[15]=0 cells (0 PI)
2925 20:09:14.144870 Byte1, DQ PI dly=978, DQM PI dly= 981
2926 20:09:14.148491 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2927 20:09:14.148584
2928 20:09:14.151697 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2929 20:09:14.151788
2930 20:09:14.155387 Write Rank0 MR14 =0x1e
2931 20:09:14.155487
2932 20:09:14.158176 Final TX Range 0 Vref 30
2933 20:09:14.158267
2934 20:09:14.164997 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2935 20:09:14.165091
2936 20:09:14.171702 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2937 20:09:14.178631 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2938 20:09:14.184730 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2939 20:09:14.184823 Write Rank0 MR3 =0xb0
2940 20:09:14.188337 DramC Write-DBI on
2941 20:09:14.188429 ==
2942 20:09:14.194779 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2943 20:09:14.194872 fsp= 1, odt_onoff= 1, Byte mode= 0
2944 20:09:14.198187 ==
2945 20:09:14.201407 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2946 20:09:14.201498
2947 20:09:14.204900 Begin, DQ Scan Range 701~765
2948 20:09:14.204991
2949 20:09:14.205065
2950 20:09:14.205134 TX Vref Scan disable
2951 20:09:14.208360 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2952 20:09:14.212022 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2953 20:09:14.218079 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2954 20:09:14.221412 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2955 20:09:14.224788 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2956 20:09:14.227920 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2957 20:09:14.231546 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2958 20:09:14.234697 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2959 20:09:14.238093 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2960 20:09:14.241832 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2961 20:09:14.244396 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2962 20:09:14.248012 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2963 20:09:14.251356 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2964 20:09:14.254674 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2965 20:09:14.258176 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2966 20:09:14.261859 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2967 20:09:14.264554 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2968 20:09:14.267847 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2969 20:09:14.271156 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2970 20:09:14.274724 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2971 20:09:14.277901 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2972 20:09:14.281407 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2973 20:09:14.288169 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2974 20:09:14.291645 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2975 20:09:14.294464 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2976 20:09:14.297936 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2977 20:09:14.301367 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2978 20:09:14.308071 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2979 20:09:14.310817 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2980 20:09:14.314227 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2981 20:09:14.317654 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2982 20:09:14.321155 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2983 20:09:14.324541 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2984 20:09:14.327359 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2985 20:09:14.331044 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2986 20:09:14.334209 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2987 20:09:14.337597 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2988 20:09:14.340808 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2989 20:09:14.343972 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2990 20:09:14.347386 Byte0, DQ PI dly=738, DQM PI dly= 738
2991 20:09:14.353899 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
2992 20:09:14.353995
2993 20:09:14.357194 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
2994 20:09:14.357296
2995 20:09:14.360769 Byte1, DQ PI dly=725, DQM PI dly= 725
2996 20:09:14.364095 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2997 20:09:14.364194
2998 20:09:14.370670 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2999 20:09:14.370764
3000 20:09:14.377217 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3001 20:09:14.383699 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3002 20:09:14.390745 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3003 20:09:14.393958 Write Rank0 MR3 =0x30
3004 20:09:14.394084 DramC Write-DBI off
3005 20:09:14.394190
3006 20:09:14.394294 [DATLAT]
3007 20:09:14.397466 Freq=1600, CH1 RK0, use_rxtx_scan=0
3008 20:09:14.397557
3009 20:09:14.400702 DATLAT Default: 0xf
3010 20:09:14.400793 7, 0xFFFF, sum=0
3011 20:09:14.404163 8, 0xFFFF, sum=0
3012 20:09:14.404255 9, 0xFFFF, sum=0
3013 20:09:14.407183 10, 0xFFFF, sum=0
3014 20:09:14.407275 11, 0xFFFF, sum=0
3015 20:09:14.410337 12, 0xFFFF, sum=0
3016 20:09:14.410432 13, 0xFFFF, sum=0
3017 20:09:14.413942 14, 0x0, sum=1
3018 20:09:14.414038 15, 0x0, sum=2
3019 20:09:14.417038 16, 0x0, sum=3
3020 20:09:14.417133 17, 0x0, sum=4
3021 20:09:14.420542 pattern=2 first_step=14 total pass=5 best_step=16
3022 20:09:14.420636 ==
3023 20:09:14.427192 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3024 20:09:14.430751 fsp= 1, odt_onoff= 1, Byte mode= 0
3025 20:09:14.430845 ==
3026 20:09:14.433606 Start DQ dly to find pass range UseTestEngine =1
3027 20:09:14.436951 x-axis: bit #, y-axis: DQ dly (-127~63)
3028 20:09:14.440243 RX Vref Scan = 1
3029 20:09:14.546904
3030 20:09:14.547073 RX Vref found, early break!
3031 20:09:14.547180
3032 20:09:14.553334 Final RX Vref 11, apply to both rank0 and 1
3033 20:09:14.553430 ==
3034 20:09:14.556558 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3035 20:09:14.559814 fsp= 1, odt_onoff= 1, Byte mode= 0
3036 20:09:14.559909 ==
3037 20:09:14.560005 DQS Delay:
3038 20:09:14.563149 DQS0 = 0, DQS1 = 0
3039 20:09:14.563243 DQM Delay:
3040 20:09:14.566675 DQM0 = 20, DQM1 = 19
3041 20:09:14.566768 DQ Delay:
3042 20:09:14.569968 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3043 20:09:14.573644 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3044 20:09:14.576671 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3045 20:09:14.579740 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3046 20:09:14.579833
3047 20:09:14.579927
3048 20:09:14.580017
3049 20:09:14.583285 [DramC_TX_OE_Calibration] TA2
3050 20:09:14.586792 Original DQ_B0 (3 6) =30, OEN = 27
3051 20:09:14.589859 Original DQ_B1 (3 6) =30, OEN = 27
3052 20:09:14.593170 23, 0x0, End_B0=23 End_B1=23
3053 20:09:14.593265 24, 0x0, End_B0=24 End_B1=24
3054 20:09:14.596547 25, 0x0, End_B0=25 End_B1=25
3055 20:09:14.599891 26, 0x0, End_B0=26 End_B1=26
3056 20:09:14.603286 27, 0x0, End_B0=27 End_B1=27
3057 20:09:14.606376 28, 0x0, End_B0=28 End_B1=28
3058 20:09:14.606473 29, 0x0, End_B0=29 End_B1=29
3059 20:09:14.609552 30, 0x0, End_B0=30 End_B1=30
3060 20:09:14.613089 31, 0xFFFF, End_B0=30 End_B1=30
3061 20:09:14.619440 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3062 20:09:14.623096 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3063 20:09:14.623191
3064 20:09:14.623302
3065 20:09:14.626216 Write Rank0 MR23 =0x3f
3066 20:09:14.626310 [DQSOSC]
3067 20:09:14.636475 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3068 20:09:14.642920 CH1_RK0: MR19=0x202, MR18=0xC1C1, DQSOSC=446, MR23=63, INC=12, DEC=18
3069 20:09:14.643016 Write Rank0 MR23 =0x3f
3070 20:09:14.643129 [DQSOSC]
3071 20:09:14.652914 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3072 20:09:14.656178 CH1 RK0: MR19=202, MR18=BDBD
3073 20:09:14.659682 [RankSwap] Rank num 2, (Multi 1), Rank 1
3074 20:09:14.659776 Write Rank0 MR2 =0xad
3075 20:09:14.663048 [Write Leveling]
3076 20:09:14.666249 delay byte0 byte1 byte2 byte3
3077 20:09:14.666344
3078 20:09:14.666439 10 0 0
3079 20:09:14.669508 11 0 0
3080 20:09:14.669603 12 0 0
3081 20:09:14.669700 13 0 0
3082 20:09:14.673045 14 0 0
3083 20:09:14.673140 15 0 0
3084 20:09:14.676046 16 0 0
3085 20:09:14.676140 17 0 0
3086 20:09:14.679271 18 0 0
3087 20:09:14.679366 19 0 0
3088 20:09:14.679471 20 0 0
3089 20:09:14.682836 21 0 0
3090 20:09:14.682930 22 0 0
3091 20:09:14.686157 23 0 0
3092 20:09:14.686253 24 0 ff
3093 20:09:14.689406 25 0 ff
3094 20:09:14.689529 26 0 ff
3095 20:09:14.689627 27 0 ff
3096 20:09:14.692810 28 0 ff
3097 20:09:14.692901 29 0 ff
3098 20:09:14.695795 30 0 ff
3099 20:09:14.695887 31 0 ff
3100 20:09:14.699244 32 0 ff
3101 20:09:14.699334 33 0 ff
3102 20:09:14.699416 34 0 ff
3103 20:09:14.702407 35 ff ff
3104 20:09:14.702529 36 ff ff
3105 20:09:14.705846 37 ff ff
3106 20:09:14.705936 38 ff ff
3107 20:09:14.709438 39 ff ff
3108 20:09:14.709528 40 ff ff
3109 20:09:14.712748 41 ff ff
3110 20:09:14.716146 pass bytecount = 0xff (0xff: all bytes pass)
3111 20:09:14.716237
3112 20:09:14.716307 DQS0 dly: 35
3113 20:09:14.718966 DQS1 dly: 24
3114 20:09:14.719055 Write Rank0 MR2 =0x2d
3115 20:09:14.722221 [RankSwap] Rank num 2, (Multi 1), Rank 0
3116 20:09:14.725930 Write Rank1 MR1 =0xd6
3117 20:09:14.726019 [Gating]
3118 20:09:14.726090 ==
3119 20:09:14.732472 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3120 20:09:14.735877 fsp= 1, odt_onoff= 1, Byte mode= 0
3121 20:09:14.735967 ==
3122 20:09:14.739015 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3123 20:09:14.746295 3 1 4 |1c1b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3124 20:09:14.748990 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3125 20:09:14.752758 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3126 20:09:14.755778 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3127 20:09:14.762408 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3128 20:09:14.766069 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3129 20:09:14.769313 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3130 20:09:14.776126 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3131 20:09:14.778766 3 2 4 |3434 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3132 20:09:14.782358 3 2 8 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3133 20:09:14.788956 3 2 12 |302f 807 |(11 11)(11 1) |(1 1)(0 0)| 0
3134 20:09:14.792173 3 2 16 |3d3d 1110 |(11 11)(11 11) |(1 1)(0 0)| 0
3135 20:09:14.795691 3 2 20 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3136 20:09:14.799022 3 2 24 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3137 20:09:14.805766 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3138 20:09:14.809039 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3139 20:09:14.812244 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3140 20:09:14.819082 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3141 20:09:14.821985 [Byte 0] Lead/lag falling Transition (3, 3, 8)
3142 20:09:14.825460 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3143 20:09:14.832318 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3144 20:09:14.835245 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3145 20:09:14.838726 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3146 20:09:14.845894 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3147 20:09:14.848768 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3148 20:09:14.852099 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3149 20:09:14.855515 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3150 20:09:14.862396 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3151 20:09:14.865681 3 4 16 |3d3d 2827 |(11 11)(11 11) |(1 1)(1 1)| 0
3152 20:09:14.868842 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 20:09:14.875619 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3154 20:09:14.879063 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3155 20:09:14.882198 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3156 20:09:14.888990 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3157 20:09:14.892280 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3158 20:09:14.895643 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3159 20:09:14.902232 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3160 20:09:14.905302 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3161 20:09:14.908555 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3162 20:09:14.912241 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3163 20:09:14.918632 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3164 20:09:14.921902 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3165 20:09:14.925379 [Byte 0] Lead/lag Transition tap number (3)
3166 20:09:14.931750 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3167 20:09:14.935359 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3168 20:09:14.938648 3 6 8 |3e3e 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3169 20:09:14.941552 [Byte 1] Lead/lag Transition tap number (2)
3170 20:09:14.948720 3 6 12 |4646 b0a |(0 0)(11 11) |(0 0)(0 0)| 0
3171 20:09:14.948812 [Byte 0]First pass (3, 6, 12)
3172 20:09:14.954975 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 20:09:14.955068 [Byte 1]First pass (3, 6, 16)
3174 20:09:14.961813 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3175 20:09:14.965204 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3176 20:09:14.968346 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3177 20:09:14.971358 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3178 20:09:14.974908 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3179 20:09:14.981591 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3180 20:09:14.985218 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3181 20:09:14.988342 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3182 20:09:14.991678 All bytes gating window > 1UI, Early break!
3183 20:09:14.991872
3184 20:09:14.995103 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3185 20:09:14.995228
3186 20:09:14.998128 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3187 20:09:15.001542
3188 20:09:15.001665
3189 20:09:15.001771
3190 20:09:15.005085 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3191 20:09:15.005218
3192 20:09:15.008005 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3193 20:09:15.008134
3194 20:09:15.008245
3195 20:09:15.011108 Write Rank1 MR1 =0x56
3196 20:09:15.011260
3197 20:09:15.015188 best RODT dly(2T, 0.5T) = (2, 2)
3198 20:09:15.015312
3199 20:09:15.017845 best RODT dly(2T, 0.5T) = (2, 3)
3200 20:09:15.017964 ==
3201 20:09:15.021224 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3202 20:09:15.024671 fsp= 1, odt_onoff= 1, Byte mode= 0
3203 20:09:15.024763 ==
3204 20:09:15.028135 Start DQ dly to find pass range UseTestEngine =0
3205 20:09:15.034857 x-axis: bit #, y-axis: DQ dly (-127~63)
3206 20:09:15.034948 RX Vref Scan = 0
3207 20:09:15.037830 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3208 20:09:15.041104 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3209 20:09:15.044687 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3210 20:09:15.048080 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3211 20:09:15.048173 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3212 20:09:15.051274 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3213 20:09:15.055040 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3214 20:09:15.057960 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3215 20:09:15.061175 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3216 20:09:15.064541 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3217 20:09:15.067839 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3218 20:09:15.071415 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3219 20:09:15.071509 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3220 20:09:15.074680 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3221 20:09:15.077598 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3222 20:09:15.081059 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3223 20:09:15.084465 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3224 20:09:15.088108 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3225 20:09:15.091284 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3226 20:09:15.094565 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3227 20:09:15.094658 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3228 20:09:15.097628 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3229 20:09:15.101085 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3230 20:09:15.104371 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3231 20:09:15.107645 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3232 20:09:15.111016 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3233 20:09:15.114515 0, [0] xxxoxxxx xoxxxxxo [MSB]
3234 20:09:15.114609 1, [0] xxooxxxx ooxxxxxo [MSB]
3235 20:09:15.117888 2, [0] xxooxxxx ooxxxxxo [MSB]
3236 20:09:15.121223 3, [0] xxooxxxo oooxxxxo [MSB]
3237 20:09:15.124670 4, [0] xxoooxxo oooxxxxo [MSB]
3238 20:09:15.127976 6, [0] oooooxoo ooooooxo [MSB]
3239 20:09:15.130791 32, [0] oooooooo ooooooox [MSB]
3240 20:09:15.130882 33, [0] oooooooo ooooooox [MSB]
3241 20:09:15.134000 34, [0] oooooooo ooooooox [MSB]
3242 20:09:15.137625 35, [0] oooxoooo xxooooox [MSB]
3243 20:09:15.140814 36, [0] oooxoooo xxooooox [MSB]
3244 20:09:15.144555 37, [0] ooxxoooo xxooooox [MSB]
3245 20:09:15.147352 38, [0] ooxxoooo xxooooox [MSB]
3246 20:09:15.150546 39, [0] oxxxxoox xxooooox [MSB]
3247 20:09:15.150638 40, [0] oxxxxoox xxxoooox [MSB]
3248 20:09:15.154275 41, [0] oxxxxoox xxxxxoox [MSB]
3249 20:09:15.157104 42, [0] xxxxxxxx xxxxxxxx [MSB]
3250 20:09:15.160567 iDelay=42, Bit 0, Center 23 (5 ~ 41) 37
3251 20:09:15.164185 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3252 20:09:15.167396 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3253 20:09:15.170394 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
3254 20:09:15.177138 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3255 20:09:15.180341 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
3256 20:09:15.183826 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3257 20:09:15.187106 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3258 20:09:15.190572 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3259 20:09:15.194169 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3260 20:09:15.197288 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3261 20:09:15.201039 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3262 20:09:15.203645 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3263 20:09:15.206936 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3264 20:09:15.210260 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
3265 20:09:15.217025 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3266 20:09:15.217122 ==
3267 20:09:15.220683 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3268 20:09:15.223628 fsp= 1, odt_onoff= 1, Byte mode= 0
3269 20:09:15.223719 ==
3270 20:09:15.223791 DQS Delay:
3271 20:09:15.227331 DQS0 = 0, DQS1 = 0
3272 20:09:15.227452 DQM Delay:
3273 20:09:15.230692 DQM0 = 20, DQM1 = 19
3274 20:09:15.230781 DQ Delay:
3275 20:09:15.233908 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3276 20:09:15.237239 DQ4 =21, DQ5 =24, DQ6 =23, DQ7 =20
3277 20:09:15.240497 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3278 20:09:15.243728 DQ12 =22, DQ13 =23, DQ14 =24, DQ15 =14
3279 20:09:15.243820
3280 20:09:15.243891
3281 20:09:15.247114 DramC Write-DBI off
3282 20:09:15.247205 ==
3283 20:09:15.250055 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3284 20:09:15.253353 fsp= 1, odt_onoff= 1, Byte mode= 0
3285 20:09:15.253444 ==
3286 20:09:15.259978 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3287 20:09:15.260070
3288 20:09:15.260150 Begin, DQ Scan Range 920~1176
3289 20:09:15.260222
3290 20:09:15.260287
3291 20:09:15.263552 TX Vref Scan disable
3292 20:09:15.267066 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3293 20:09:15.270388 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3294 20:09:15.273755 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3295 20:09:15.276637 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3296 20:09:15.280469 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3297 20:09:15.283382 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3298 20:09:15.289949 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3299 20:09:15.293352 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3300 20:09:15.296670 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3301 20:09:15.300126 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3302 20:09:15.303389 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3303 20:09:15.306982 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3304 20:09:15.310336 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3305 20:09:15.313744 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3306 20:09:15.316956 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3307 20:09:15.320512 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3308 20:09:15.323280 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3309 20:09:15.326804 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3310 20:09:15.330247 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3311 20:09:15.333470 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3312 20:09:15.336836 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3313 20:09:15.339984 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3314 20:09:15.343313 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3315 20:09:15.350344 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3316 20:09:15.353323 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3317 20:09:15.356807 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3318 20:09:15.360131 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3319 20:09:15.363793 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3320 20:09:15.366812 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3321 20:09:15.370159 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3322 20:09:15.373405 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3323 20:09:15.376904 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3324 20:09:15.380322 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3325 20:09:15.383291 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3326 20:09:15.386520 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3327 20:09:15.390056 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3328 20:09:15.393577 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3329 20:09:15.396960 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3330 20:09:15.400407 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3331 20:09:15.406552 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3332 20:09:15.410048 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3333 20:09:15.413467 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3334 20:09:15.416468 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3335 20:09:15.419859 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3336 20:09:15.423240 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3337 20:09:15.426777 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3338 20:09:15.430156 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3339 20:09:15.433254 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3340 20:09:15.436429 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
3341 20:09:15.440252 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3342 20:09:15.443153 970 |3 6 10|[0] xxxxxxxx oooxxxxo [MSB]
3343 20:09:15.446968 971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]
3344 20:09:15.449833 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3345 20:09:15.453575 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3346 20:09:15.456784 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3347 20:09:15.460118 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3348 20:09:15.463271 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3349 20:09:15.466972 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3350 20:09:15.470049 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3351 20:09:15.476497 979 |3 6 19|[0] xooooxxx oooooooo [MSB]
3352 20:09:15.479560 980 |3 6 20|[0] oooooxox oooooooo [MSB]
3353 20:09:15.482922 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3354 20:09:15.486103 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3355 20:09:15.489742 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3356 20:09:15.492963 988 |3 6 28|[0] oooooooo xxooooox [MSB]
3357 20:09:15.496640 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3358 20:09:15.499549 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3359 20:09:15.502827 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3360 20:09:15.506280 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3361 20:09:15.509766 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3362 20:09:15.512564 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3363 20:09:15.519389 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3364 20:09:15.522941 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3365 20:09:15.526249 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3366 20:09:15.529352 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3367 20:09:15.532665 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3368 20:09:15.536118 1000 |3 6 40|[0] ooxxoooo xxxxxxxx [MSB]
3369 20:09:15.539578 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
3370 20:09:15.543174 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3371 20:09:15.546064 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3372 20:09:15.549167 Byte0, DQ PI dly=989, DQM PI dly= 989
3373 20:09:15.555973 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3374 20:09:15.556066
3375 20:09:15.559241 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3376 20:09:15.559331
3377 20:09:15.562580 Byte1, DQ PI dly=977, DQM PI dly= 977
3378 20:09:15.565960 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3379 20:09:15.566051
3380 20:09:15.572480 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3381 20:09:15.572571
3382 20:09:15.572641 ==
3383 20:09:15.575801 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3384 20:09:15.579513 fsp= 1, odt_onoff= 1, Byte mode= 0
3385 20:09:15.579603 ==
3386 20:09:15.585576 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3387 20:09:15.585671
3388 20:09:15.585742 Begin, DQ Scan Range 953~1017
3389 20:09:15.588577 Write Rank1 MR14 =0x0
3390 20:09:15.597691
3391 20:09:15.597782 CH=1, VrefRange= 0, VrefLevel = 0
3392 20:09:15.604753 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3393 20:09:15.607946 TX Bit1 (982~997) 16 989, Bit9 (970~983) 14 976,
3394 20:09:15.614415 TX Bit2 (980~994) 15 987, Bit10 (975~985) 11 980,
3395 20:09:15.617865 TX Bit3 (979~991) 13 985, Bit11 (975~986) 12 980,
3396 20:09:15.621019 TX Bit4 (982~997) 16 989, Bit12 (975~985) 11 980,
3397 20:09:15.628183 TX Bit5 (983~998) 16 990, Bit13 (975~987) 13 981,
3398 20:09:15.631594 TX Bit6 (983~998) 16 990, Bit14 (975~984) 10 979,
3399 20:09:15.634461 TX Bit7 (984~995) 12 989, Bit15 (968~978) 11 973,
3400 20:09:15.634551
3401 20:09:15.637824 Write Rank1 MR14 =0x2
3402 20:09:15.647229
3403 20:09:15.647321 CH=1, VrefRange= 0, VrefLevel = 2
3404 20:09:15.653871 TX Bit0 (983~999) 17 991, Bit8 (970~984) 15 977,
3405 20:09:15.657142 TX Bit1 (982~997) 16 989, Bit9 (970~984) 15 977,
3406 20:09:15.664177 TX Bit2 (979~996) 18 987, Bit10 (974~985) 12 979,
3407 20:09:15.667630 TX Bit3 (978~992) 15 985, Bit11 (975~987) 13 981,
3408 20:09:15.670845 TX Bit4 (982~997) 16 989, Bit12 (975~985) 11 980,
3409 20:09:15.677036 TX Bit5 (983~999) 17 991, Bit13 (975~988) 14 981,
3410 20:09:15.680516 TX Bit6 (982~998) 17 990, Bit14 (974~985) 12 979,
3411 20:09:15.684025 TX Bit7 (984~996) 13 990, Bit15 (968~979) 12 973,
3412 20:09:15.684116
3413 20:09:15.687162 Write Rank1 MR14 =0x4
3414 20:09:15.696808
3415 20:09:15.696900 CH=1, VrefRange= 0, VrefLevel = 4
3416 20:09:15.703085 TX Bit0 (983~999) 17 991, Bit8 (969~985) 17 977,
3417 20:09:15.706410 TX Bit1 (982~998) 17 990, Bit9 (970~984) 15 977,
3418 20:09:15.713014 TX Bit2 (979~997) 19 988, Bit10 (973~986) 14 979,
3419 20:09:15.716422 TX Bit3 (978~992) 15 985, Bit11 (974~988) 15 981,
3420 20:09:15.719747 TX Bit4 (981~998) 18 989, Bit12 (973~986) 14 979,
3421 20:09:15.726192 TX Bit5 (982~999) 18 990, Bit13 (974~989) 16 981,
3422 20:09:15.729588 TX Bit6 (982~998) 17 990, Bit14 (975~986) 12 980,
3423 20:09:15.733372 TX Bit7 (983~997) 15 990, Bit15 (968~980) 13 974,
3424 20:09:15.733463
3425 20:09:15.736246 Write Rank1 MR14 =0x6
3426 20:09:15.746249
3427 20:09:15.746341 CH=1, VrefRange= 0, VrefLevel = 6
3428 20:09:15.752425 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3429 20:09:15.755591 TX Bit1 (981~999) 19 990, Bit9 (969~985) 17 977,
3430 20:09:15.762148 TX Bit2 (979~997) 19 988, Bit10 (973~987) 15 980,
3431 20:09:15.765568 TX Bit3 (978~993) 16 985, Bit11 (973~988) 16 980,
3432 20:09:15.768909 TX Bit4 (981~998) 18 989, Bit12 (973~987) 15 980,
3433 20:09:15.775562 TX Bit5 (982~1000) 19 991, Bit13 (973~990) 18 981,
3434 20:09:15.778873 TX Bit6 (982~999) 18 990, Bit14 (974~986) 13 980,
3435 20:09:15.785610 TX Bit7 (983~998) 16 990, Bit15 (967~981) 15 974,
3436 20:09:15.785708
3437 20:09:15.785788 Write Rank1 MR14 =0x8
3438 20:09:15.795842
3439 20:09:15.795968 CH=1, VrefRange= 0, VrefLevel = 8
3440 20:09:15.802093 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3441 20:09:15.805315 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
3442 20:09:15.812093 TX Bit2 (978~998) 21 988, Bit10 (972~988) 17 980,
3443 20:09:15.815231 TX Bit3 (978~994) 17 986, Bit11 (973~989) 17 981,
3444 20:09:15.818627 TX Bit4 (980~999) 20 989, Bit12 (974~988) 15 981,
3445 20:09:15.825148 TX Bit5 (982~1000) 19 991, Bit13 (973~990) 18 981,
3446 20:09:15.828402 TX Bit6 (981~999) 19 990, Bit14 (972~987) 16 979,
3447 20:09:15.831810 TX Bit7 (983~998) 16 990, Bit15 (968~983) 16 975,
3448 20:09:15.835186
3449 20:09:15.835293 Write Rank1 MR14 =0xa
3450 20:09:15.845341
3451 20:09:15.848378 CH=1, VrefRange= 0, VrefLevel = 10
3452 20:09:15.851885 TX Bit0 (982~1001) 20 991, Bit8 (969~986) 18 977,
3453 20:09:15.855125 TX Bit1 (980~999) 20 989, Bit9 (970~985) 16 977,
3454 20:09:15.861727 TX Bit2 (978~998) 21 988, Bit10 (971~988) 18 979,
3455 20:09:15.865067 TX Bit3 (977~995) 19 986, Bit11 (973~990) 18 981,
3456 20:09:15.868414 TX Bit4 (980~999) 20 989, Bit12 (973~989) 17 981,
3457 20:09:15.875075 TX Bit5 (982~1001) 20 991, Bit13 (973~991) 19 982,
3458 20:09:15.878013 TX Bit6 (980~1000) 21 990, Bit14 (973~988) 16 980,
3459 20:09:15.884532 TX Bit7 (983~999) 17 991, Bit15 (967~983) 17 975,
3460 20:09:15.884695
3461 20:09:15.884827 Write Rank1 MR14 =0xc
3462 20:09:15.895090
3463 20:09:15.898145 CH=1, VrefRange= 0, VrefLevel = 12
3464 20:09:15.901898 TX Bit0 (981~1001) 21 991, Bit8 (969~986) 18 977,
3465 20:09:15.904781 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
3466 20:09:15.911797 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
3467 20:09:15.914986 TX Bit3 (977~996) 20 986, Bit11 (972~990) 19 981,
3468 20:09:15.918237 TX Bit4 (979~1000) 22 989, Bit12 (972~989) 18 980,
3469 20:09:15.925006 TX Bit5 (982~1001) 20 991, Bit13 (972~991) 20 981,
3470 20:09:15.928674 TX Bit6 (980~1000) 21 990, Bit14 (971~989) 19 980,
3471 20:09:15.934746 TX Bit7 (982~999) 18 990, Bit15 (967~983) 17 975,
3472 20:09:15.934852
3473 20:09:15.934925 Write Rank1 MR14 =0xe
3474 20:09:15.945689
3475 20:09:15.948489 CH=1, VrefRange= 0, VrefLevel = 14
3476 20:09:15.951856 TX Bit0 (981~1002) 22 991, Bit8 (969~986) 18 977,
3477 20:09:15.955418 TX Bit1 (980~1000) 21 990, Bit9 (969~986) 18 977,
3478 20:09:15.962153 TX Bit2 (978~999) 22 988, Bit10 (971~990) 20 980,
3479 20:09:15.965288 TX Bit3 (977~997) 21 987, Bit11 (972~991) 20 981,
3480 20:09:15.968473 TX Bit4 (979~1000) 22 989, Bit12 (972~990) 19 981,
3481 20:09:15.975355 TX Bit5 (981~1002) 22 991, Bit13 (972~991) 20 981,
3482 20:09:15.978628 TX Bit6 (980~1001) 22 990, Bit14 (972~990) 19 981,
3483 20:09:15.985178 TX Bit7 (981~1000) 20 990, Bit15 (967~984) 18 975,
3484 20:09:15.985284
3485 20:09:15.985357 Write Rank1 MR14 =0x10
3486 20:09:15.996166
3487 20:09:15.999489 CH=1, VrefRange= 0, VrefLevel = 16
3488 20:09:16.002518 TX Bit0 (981~1003) 23 992, Bit8 (968~988) 21 978,
3489 20:09:16.006224 TX Bit1 (980~1001) 22 990, Bit9 (969~987) 19 978,
3490 20:09:16.012800 TX Bit2 (978~999) 22 988, Bit10 (970~991) 22 980,
3491 20:09:16.015684 TX Bit3 (977~998) 22 987, Bit11 (971~991) 21 981,
3492 20:09:16.019170 TX Bit4 (979~1000) 22 989, Bit12 (972~991) 20 981,
3493 20:09:16.026058 TX Bit5 (980~1002) 23 991, Bit13 (971~992) 22 981,
3494 20:09:16.029143 TX Bit6 (979~1001) 23 990, Bit14 (970~990) 21 980,
3495 20:09:16.035604 TX Bit7 (981~1000) 20 990, Bit15 (966~984) 19 975,
3496 20:09:16.035699
3497 20:09:16.035770 Write Rank1 MR14 =0x12
3498 20:09:16.046425
3499 20:09:16.049910 CH=1, VrefRange= 0, VrefLevel = 18
3500 20:09:16.053458 TX Bit0 (980~1003) 24 991, Bit8 (968~988) 21 978,
3501 20:09:16.056697 TX Bit1 (979~1001) 23 990, Bit9 (969~988) 20 978,
3502 20:09:16.063163 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
3503 20:09:16.066266 TX Bit3 (977~998) 22 987, Bit11 (971~991) 21 981,
3504 20:09:16.069894 TX Bit4 (979~1001) 23 990, Bit12 (971~991) 21 981,
3505 20:09:16.076686 TX Bit5 (980~1003) 24 991, Bit13 (971~992) 22 981,
3506 20:09:16.079878 TX Bit6 (979~1001) 23 990, Bit14 (970~991) 22 980,
3507 20:09:16.086202 TX Bit7 (980~1000) 21 990, Bit15 (966~985) 20 975,
3508 20:09:16.086298
3509 20:09:16.086370 Write Rank1 MR14 =0x14
3510 20:09:16.097665
3511 20:09:16.101036 CH=1, VrefRange= 0, VrefLevel = 20
3512 20:09:16.103846 TX Bit0 (979~1004) 26 991, Bit8 (968~989) 22 978,
3513 20:09:16.107316 TX Bit1 (979~1002) 24 990, Bit9 (968~989) 22 978,
3514 20:09:16.113970 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
3515 20:09:16.117635 TX Bit3 (977~998) 22 987, Bit11 (971~992) 22 981,
3516 20:09:16.120649 TX Bit4 (979~1001) 23 990, Bit12 (971~991) 21 981,
3517 20:09:16.127544 TX Bit5 (980~1003) 24 991, Bit13 (971~992) 22 981,
3518 20:09:16.130871 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3519 20:09:16.137120 TX Bit7 (981~1000) 20 990, Bit15 (966~985) 20 975,
3520 20:09:16.137212
3521 20:09:16.137283 Write Rank1 MR14 =0x16
3522 20:09:16.148028
3523 20:09:16.151409 CH=1, VrefRange= 0, VrefLevel = 22
3524 20:09:16.154715 TX Bit0 (979~1004) 26 991, Bit8 (968~989) 22 978,
3525 20:09:16.158074 TX Bit1 (978~1002) 25 990, Bit9 (968~990) 23 979,
3526 20:09:16.165004 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
3527 20:09:16.168206 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3528 20:09:16.171385 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3529 20:09:16.178428 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3530 20:09:16.181365 TX Bit6 (979~1003) 25 991, Bit14 (970~991) 22 980,
3531 20:09:16.188248 TX Bit7 (979~1001) 23 990, Bit15 (965~986) 22 975,
3532 20:09:16.188361
3533 20:09:16.188436 Write Rank1 MR14 =0x18
3534 20:09:16.199042
3535 20:09:16.202254 CH=1, VrefRange= 0, VrefLevel = 24
3536 20:09:16.205633 TX Bit0 (979~1005) 27 992, Bit8 (968~990) 23 979,
3537 20:09:16.209033 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
3538 20:09:16.215590 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3539 20:09:16.219004 TX Bit3 (976~999) 24 987, Bit11 (970~993) 24 981,
3540 20:09:16.222175 TX Bit4 (978~1003) 26 990, Bit12 (970~992) 23 981,
3541 20:09:16.228852 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3542 20:09:16.231876 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3543 20:09:16.238589 TX Bit7 (980~1001) 22 990, Bit15 (965~986) 22 975,
3544 20:09:16.238708
3545 20:09:16.238810 Write Rank1 MR14 =0x1a
3546 20:09:16.249912
3547 20:09:16.253324 CH=1, VrefRange= 0, VrefLevel = 26
3548 20:09:16.257010 TX Bit0 (979~1005) 27 992, Bit8 (967~991) 25 979,
3549 20:09:16.260141 TX Bit1 (978~1003) 26 990, Bit9 (968~990) 23 979,
3550 20:09:16.266273 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3551 20:09:16.269761 TX Bit3 (976~999) 24 987, Bit11 (970~993) 24 981,
3552 20:09:16.273143 TX Bit4 (978~1003) 26 990, Bit12 (970~992) 23 981,
3553 20:09:16.280164 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3554 20:09:16.283620 TX Bit6 (978~1004) 27 991, Bit14 (970~992) 23 981,
3555 20:09:16.289966 TX Bit7 (979~1002) 24 990, Bit15 (965~986) 22 975,
3556 20:09:16.290059
3557 20:09:16.290130 Write Rank1 MR14 =0x1c
3558 20:09:16.301265
3559 20:09:16.301356 CH=1, VrefRange= 0, VrefLevel = 28
3560 20:09:16.308166 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3561 20:09:16.311542 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3562 20:09:16.317627 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3563 20:09:16.321149 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3564 20:09:16.324484 TX Bit4 (978~1004) 27 991, Bit12 (970~992) 23 981,
3565 20:09:16.331099 TX Bit5 (979~1006) 28 992, Bit13 (970~993) 24 981,
3566 20:09:16.334779 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3567 20:09:16.340876 TX Bit7 (979~1003) 25 991, Bit15 (964~987) 24 975,
3568 20:09:16.340969
3569 20:09:16.341040 Write Rank1 MR14 =0x1e
3570 20:09:16.352450
3571 20:09:16.355825 CH=1, VrefRange= 0, VrefLevel = 30
3572 20:09:16.359148 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3573 20:09:16.362527 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3574 20:09:16.369307 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3575 20:09:16.372719 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3576 20:09:16.376164 TX Bit4 (978~1004) 27 991, Bit12 (970~993) 24 981,
3577 20:09:16.382286 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3578 20:09:16.385644 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3579 20:09:16.392417 TX Bit7 (978~1004) 27 991, Bit15 (963~987) 25 975,
3580 20:09:16.392510
3581 20:09:16.392582 Write Rank1 MR14 =0x20
3582 20:09:16.403865
3583 20:09:16.406656 CH=1, VrefRange= 0, VrefLevel = 32
3584 20:09:16.410164 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3585 20:09:16.413860 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3586 20:09:16.420031 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3587 20:09:16.423426 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3588 20:09:16.426841 TX Bit4 (978~1004) 27 991, Bit12 (970~993) 24 981,
3589 20:09:16.433406 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3590 20:09:16.437071 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3591 20:09:16.443272 TX Bit7 (978~1004) 27 991, Bit15 (963~987) 25 975,
3592 20:09:16.443409
3593 20:09:16.443491 Write Rank1 MR14 =0x22
3594 20:09:16.454970
3595 20:09:16.457808 CH=1, VrefRange= 0, VrefLevel = 34
3596 20:09:16.461268 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3597 20:09:16.464435 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3598 20:09:16.471360 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3599 20:09:16.474787 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3600 20:09:16.478363 TX Bit4 (978~1004) 27 991, Bit12 (970~993) 24 981,
3601 20:09:16.484773 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3602 20:09:16.487562 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3603 20:09:16.494446 TX Bit7 (978~1004) 27 991, Bit15 (963~987) 25 975,
3604 20:09:16.494537
3605 20:09:16.494609 Write Rank1 MR14 =0x24
3606 20:09:16.505612
3607 20:09:16.509029 CH=1, VrefRange= 0, VrefLevel = 36
3608 20:09:16.512507 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3609 20:09:16.515715 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3610 20:09:16.522371 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3611 20:09:16.525673 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3612 20:09:16.529033 TX Bit4 (978~1004) 27 991, Bit12 (970~993) 24 981,
3613 20:09:16.535384 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3614 20:09:16.539083 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3615 20:09:16.545371 TX Bit7 (978~1004) 27 991, Bit15 (963~987) 25 975,
3616 20:09:16.545463
3617 20:09:16.545534 Write Rank1 MR14 =0x26
3618 20:09:16.556707
3619 20:09:16.556840 CH=1, VrefRange= 0, VrefLevel = 38
3620 20:09:16.563739 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3621 20:09:16.566964 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3622 20:09:16.573271 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3623 20:09:16.576567 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3624 20:09:16.580489 TX Bit4 (978~1004) 27 991, Bit12 (970~993) 24 981,
3625 20:09:16.586480 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3626 20:09:16.589943 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3627 20:09:16.596771 TX Bit7 (978~1004) 27 991, Bit15 (963~987) 25 975,
3628 20:09:16.596861
3629 20:09:16.596931
3630 20:09:16.600370 TX Vref found, early break! 380< 386
3631 20:09:16.603622 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3632 20:09:16.606710 u1DelayCellOfst[0]=6 cells (5 PI)
3633 20:09:16.609984 u1DelayCellOfst[1]=5 cells (4 PI)
3634 20:09:16.613059 u1DelayCellOfst[2]=2 cells (2 PI)
3635 20:09:16.616573 u1DelayCellOfst[3]=0 cells (0 PI)
3636 20:09:16.619936 u1DelayCellOfst[4]=5 cells (4 PI)
3637 20:09:16.623062 u1DelayCellOfst[5]=6 cells (5 PI)
3638 20:09:16.623198 u1DelayCellOfst[6]=5 cells (4 PI)
3639 20:09:16.626831 u1DelayCellOfst[7]=5 cells (4 PI)
3640 20:09:16.629986 Byte0, DQ PI dly=987, DQM PI dly= 989
3641 20:09:16.636677 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3642 20:09:16.636804
3643 20:09:16.640110 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3644 20:09:16.640222
3645 20:09:16.642994 u1DelayCellOfst[8]=3 cells (3 PI)
3646 20:09:16.646858 u1DelayCellOfst[9]=5 cells (4 PI)
3647 20:09:16.649882 u1DelayCellOfst[10]=6 cells (5 PI)
3648 20:09:16.653113 u1DelayCellOfst[11]=7 cells (6 PI)
3649 20:09:16.656649 u1DelayCellOfst[12]=7 cells (6 PI)
3650 20:09:16.660119 u1DelayCellOfst[13]=7 cells (6 PI)
3651 20:09:16.663062 u1DelayCellOfst[14]=6 cells (5 PI)
3652 20:09:16.663152 u1DelayCellOfst[15]=0 cells (0 PI)
3653 20:09:16.669720 Byte1, DQ PI dly=975, DQM PI dly= 978
3654 20:09:16.673152 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3655 20:09:16.673255
3656 20:09:16.676327 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3657 20:09:16.676424
3658 20:09:16.679348 Write Rank1 MR14 =0x1e
3659 20:09:16.679469
3660 20:09:16.683221 Final TX Range 0 Vref 30
3661 20:09:16.683320
3662 20:09:16.689356 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3663 20:09:16.689476
3664 20:09:16.696068 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3665 20:09:16.702750 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3666 20:09:16.709353 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3667 20:09:16.709480 Write Rank1 MR3 =0xb0
3668 20:09:16.712634 DramC Write-DBI on
3669 20:09:16.712731 ==
3670 20:09:16.719234 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3671 20:09:16.722451 fsp= 1, odt_onoff= 1, Byte mode= 0
3672 20:09:16.722553 ==
3673 20:09:16.725755 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3674 20:09:16.725850
3675 20:09:16.729260 Begin, DQ Scan Range 698~762
3676 20:09:16.729354
3677 20:09:16.729426
3678 20:09:16.729492 TX Vref Scan disable
3679 20:09:16.736113 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3680 20:09:16.739302 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3681 20:09:16.742191 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3682 20:09:16.746207 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3683 20:09:16.748823 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3684 20:09:16.752265 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3685 20:09:16.756011 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3686 20:09:16.758762 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3687 20:09:16.762106 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3688 20:09:16.765786 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3689 20:09:16.768932 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3690 20:09:16.772587 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3691 20:09:16.775318 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3692 20:09:16.779150 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3693 20:09:16.782447 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3694 20:09:16.785846 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3695 20:09:16.789087 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3696 20:09:16.792425 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3697 20:09:16.795400 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3698 20:09:16.798932 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3699 20:09:16.805237 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3700 20:09:16.808690 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3701 20:09:16.812038 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3702 20:09:16.815480 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3703 20:09:16.818597 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3704 20:09:16.821957 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3705 20:09:16.828585 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3706 20:09:16.832354 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3707 20:09:16.835490 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3708 20:09:16.839108 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3709 20:09:16.842291 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3710 20:09:16.845504 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3711 20:09:16.848422 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3712 20:09:16.851741 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3713 20:09:16.855399 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3714 20:09:16.858823 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3715 20:09:16.861702 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3716 20:09:16.865109 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3717 20:09:16.868530 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3718 20:09:16.872098 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3719 20:09:16.874854 Byte0, DQ PI dly=736, DQM PI dly= 736
3720 20:09:16.881593 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3721 20:09:16.881686
3722 20:09:16.884970 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3723 20:09:16.885062
3724 20:09:16.888109 Byte1, DQ PI dly=723, DQM PI dly= 723
3725 20:09:16.895128 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3726 20:09:16.895221
3727 20:09:16.898329 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3728 20:09:16.898419
3729 20:09:16.904861 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3730 20:09:16.911563 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3731 20:09:16.918330 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3732 20:09:16.921806 Write Rank1 MR3 =0x30
3733 20:09:16.921899 DramC Write-DBI off
3734 20:09:16.921970
3735 20:09:16.922036 [DATLAT]
3736 20:09:16.925201 Freq=1600, CH1 RK1, use_rxtx_scan=0
3737 20:09:16.925292
3738 20:09:16.928639 DATLAT Default: 0x10
3739 20:09:16.932045 7, 0xFFFF, sum=0
3740 20:09:16.932137 8, 0xFFFF, sum=0
3741 20:09:16.932210 9, 0xFFFF, sum=0
3742 20:09:16.935073 10, 0xFFFF, sum=0
3743 20:09:16.935165 11, 0xFFFF, sum=0
3744 20:09:16.938457 12, 0xFFFF, sum=0
3745 20:09:16.938548 13, 0xFFFF, sum=0
3746 20:09:16.941381 14, 0x0, sum=1
3747 20:09:16.941472 15, 0x0, sum=2
3748 20:09:16.945316 16, 0x0, sum=3
3749 20:09:16.945407 17, 0x0, sum=4
3750 20:09:16.947969 pattern=2 first_step=14 total pass=5 best_step=16
3751 20:09:16.951381 ==
3752 20:09:16.954902 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3753 20:09:16.958111 fsp= 1, odt_onoff= 1, Byte mode= 0
3754 20:09:16.958202 ==
3755 20:09:16.961192 Start DQ dly to find pass range UseTestEngine =1
3756 20:09:16.964656 x-axis: bit #, y-axis: DQ dly (-127~63)
3757 20:09:16.968200 RX Vref Scan = 0
3758 20:09:16.971624 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3759 20:09:16.974468 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3760 20:09:16.978058 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3761 20:09:16.978150 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3762 20:09:16.981270 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3763 20:09:16.984827 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3764 20:09:16.988018 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3765 20:09:16.991203 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3766 20:09:16.994834 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3767 20:09:16.998061 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3768 20:09:17.001294 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3769 20:09:17.001386 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3770 20:09:17.004815 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3771 20:09:17.008465 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3772 20:09:17.011614 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3773 20:09:17.014827 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3774 20:09:17.018438 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3775 20:09:17.021377 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3776 20:09:17.024736 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3777 20:09:17.024829 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3778 20:09:17.028132 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3779 20:09:17.031481 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3780 20:09:17.034994 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3781 20:09:17.037912 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3782 20:09:17.041709 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3783 20:09:17.044479 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3784 20:09:17.044571 0, [0] xxxoxxxx xoxxxxxo [MSB]
3785 20:09:17.048214 1, [0] xxooxxxx ooxxxxxo [MSB]
3786 20:09:17.051269 2, [0] xxooxxxx ooxxxxxo [MSB]
3787 20:09:17.054828 3, [0] oxooxxxo oooxxxxo [MSB]
3788 20:09:17.058098 4, [0] oxoooxxo ooooxxxo [MSB]
3789 20:09:17.061458 32, [0] oooooooo ooooooox [MSB]
3790 20:09:17.064461 33, [0] oooooooo ooooooox [MSB]
3791 20:09:17.067634 34, [0] oooooooo ooooooox [MSB]
3792 20:09:17.071303 35, [0] oooxoooo oxooooox [MSB]
3793 20:09:17.074499 36, [0] oooxoooo xxooooox [MSB]
3794 20:09:17.074645 37, [0] ooxxoooo xxooooox [MSB]
3795 20:09:17.077727 38, [0] ooxxoooo xxooooox [MSB]
3796 20:09:17.081536 39, [0] oxxxooox xxooooox [MSB]
3797 20:09:17.084638 40, [0] oxxxxoox xxxoooox [MSB]
3798 20:09:17.088058 41, [0] xxxxxxox xxxxxxxx [MSB]
3799 20:09:17.091347 42, [0] xxxxxxxx xxxxxxxx [MSB]
3800 20:09:17.094554 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3801 20:09:17.097696 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3802 20:09:17.101105 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3803 20:09:17.104282 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3804 20:09:17.107746 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3805 20:09:17.111156 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3806 20:09:17.114052 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3807 20:09:17.117352 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3808 20:09:17.120803 iDelay=42, Bit 8, Center 18 (1 ~ 35) 35
3809 20:09:17.124127 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3810 20:09:17.130896 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3811 20:09:17.134160 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3812 20:09:17.137583 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3813 20:09:17.141002 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3814 20:09:17.144311 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3815 20:09:17.147662 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3816 20:09:17.147763 ==
3817 20:09:17.154135 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3818 20:09:17.157355 fsp= 1, odt_onoff= 1, Byte mode= 0
3819 20:09:17.157462 ==
3820 20:09:17.157535 DQS Delay:
3821 20:09:17.157603 DQS0 = 0, DQS1 = 0
3822 20:09:17.160914 DQM Delay:
3823 20:09:17.161010 DQM0 = 20, DQM1 = 19
3824 20:09:17.164461 DQ Delay:
3825 20:09:17.167428 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3826 20:09:17.167523 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3827 20:09:17.170736 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =22
3828 20:09:17.177759 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3829 20:09:17.177865
3830 20:09:17.177939
3831 20:09:17.178005
3832 20:09:17.178068 [DramC_TX_OE_Calibration] TA2
3833 20:09:17.180569 Original DQ_B0 (3 6) =30, OEN = 27
3834 20:09:17.184236 Original DQ_B1 (3 6) =30, OEN = 27
3835 20:09:17.187336 23, 0x0, End_B0=23 End_B1=23
3836 20:09:17.191096 24, 0x0, End_B0=24 End_B1=24
3837 20:09:17.194104 25, 0x0, End_B0=25 End_B1=25
3838 20:09:17.194209 26, 0x0, End_B0=26 End_B1=26
3839 20:09:17.197311 27, 0x0, End_B0=27 End_B1=27
3840 20:09:17.200978 28, 0x0, End_B0=28 End_B1=28
3841 20:09:17.203979 29, 0x0, End_B0=29 End_B1=29
3842 20:09:17.207238 30, 0x0, End_B0=30 End_B1=30
3843 20:09:17.207340 31, 0xFFFF, End_B0=30 End_B1=30
3844 20:09:17.213918 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3845 20:09:17.220511 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3846 20:09:17.220642
3847 20:09:17.220718
3848 20:09:17.220784 Write Rank1 MR23 =0x3f
3849 20:09:17.224209 [DQSOSC]
3850 20:09:17.230477 [DQSOSCAuto] RK1, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3851 20:09:17.237426 CH1_RK1: MR19=0x202, MR18=0xCDCD, DQSOSC=439, MR23=63, INC=12, DEC=19
3852 20:09:17.240555 Write Rank1 MR23 =0x3f
3853 20:09:17.240663 [DQSOSC]
3854 20:09:17.247237 [DQSOSCAuto] RK1, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
3855 20:09:17.250739 CH1 RK1: MR19=202, MR18=CBCB
3856 20:09:17.254407 [RxdqsGatingPostProcess] freq 1600
3857 20:09:17.260586 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3858 20:09:17.260714 Rank: 0
3859 20:09:17.264193 best DQS0 dly(2T, 0.5T) = (2, 6)
3860 20:09:17.267428 best DQS1 dly(2T, 0.5T) = (2, 6)
3861 20:09:17.271002 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3862 20:09:17.273759 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3863 20:09:17.273860 Rank: 1
3864 20:09:17.277453 best DQS0 dly(2T, 0.5T) = (2, 5)
3865 20:09:17.280711 best DQS1 dly(2T, 0.5T) = (2, 6)
3866 20:09:17.283583 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3867 20:09:17.287069 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3868 20:09:17.290388 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3869 20:09:17.293743 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3870 20:09:17.297611 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3871 20:09:17.297720
3872 20:09:17.300396
3873 20:09:17.300490 [Calibration Summary] Freqency 1600
3874 20:09:17.303743 CH 0, Rank 0
3875 20:09:17.303840 All Pass.
3876 20:09:17.303914
3877 20:09:17.307482 CH 0, Rank 1
3878 20:09:17.307580 All Pass.
3879 20:09:17.307652
3880 20:09:17.307719 CH 1, Rank 0
3881 20:09:17.310502 All Pass.
3882 20:09:17.310596
3883 20:09:17.310693 CH 1, Rank 1
3884 20:09:17.310790 All Pass.
3885 20:09:17.310902
3886 20:09:17.317042 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3887 20:09:17.324111 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3888 20:09:17.330136 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3889 20:09:17.333585 Write Rank0 MR3 =0xb0
3890 20:09:17.340390 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3891 20:09:17.346756 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3892 20:09:17.353353 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3893 20:09:17.357163 Write Rank1 MR3 =0xb0
3894 20:09:17.363596 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3895 20:09:17.370044 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3896 20:09:17.376548 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3897 20:09:17.380193 Write Rank0 MR3 =0xb0
3898 20:09:17.386937 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3899 20:09:17.393103 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3900 20:09:17.399722 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3901 20:09:17.399858 Write Rank1 MR3 =0xb0
3902 20:09:17.403155 DramC Write-DBI on
3903 20:09:17.406814 [GetDramInforAfterCalByMRR] Vendor 6.
3904 20:09:17.410036 [GetDramInforAfterCalByMRR] Revision 505.
3905 20:09:17.410136 MR8 1111
3906 20:09:17.416826 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3907 20:09:17.416948 MR8 1111
3908 20:09:17.420107 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3909 20:09:17.423098 MR8 1111
3910 20:09:17.426671 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3911 20:09:17.426774 MR8 1111
3912 20:09:17.433213 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3913 20:09:17.443328 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3914 20:09:17.443490 Write Rank0 MR13 =0xd0
3915 20:09:17.446303 Write Rank1 MR13 =0xd0
3916 20:09:17.446396 Write Rank0 MR13 =0xd0
3917 20:09:17.449837 Write Rank1 MR13 =0xd0
3918 20:09:17.453087 Save calibration result to emmc
3919 20:09:17.453184
3920 20:09:17.453256
3921 20:09:17.456616 [DramcModeReg_Check] Freq_1600, FSP_1
3922 20:09:17.459903 FSP_1, CH_0, RK0
3923 20:09:17.460003 Write Rank0 MR13 =0xd8
3924 20:09:17.463372 MR12 = 0x5e (global = 0x5e) match
3925 20:09:17.466384 MR14 = 0x1c (global = 0x1c) match
3926 20:09:17.469961 FSP_1, CH_0, RK1
3927 20:09:17.470051 Write Rank1 MR13 =0xd8
3928 20:09:17.473248 MR12 = 0x5c (global = 0x5c) match
3929 20:09:17.476104 MR14 = 0x20 (global = 0x20) match
3930 20:09:17.479719 FSP_1, CH_1, RK0
3931 20:09:17.479809 Write Rank0 MR13 =0xd8
3932 20:09:17.483236 MR12 = 0x5e (global = 0x5e) match
3933 20:09:17.486484 MR14 = 0x1e (global = 0x1e) match
3934 20:09:17.490040 FSP_1, CH_1, RK1
3935 20:09:17.490131 Write Rank1 MR13 =0xd8
3936 20:09:17.493403 MR12 = 0x60 (global = 0x60) match
3937 20:09:17.496246 MR14 = 0x1e (global = 0x1e) match
3938 20:09:17.496336
3939 20:09:17.499426 [MEM_TEST] 02: After DFS, before run time config
3940 20:09:17.512154 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3941 20:09:17.512247
3942 20:09:17.512317 [TA2_TEST]
3943 20:09:17.512382 === TA2 HW
3944 20:09:17.515169 TA2 PAT: XTALK
3945 20:09:17.518468 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3946 20:09:17.525440 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3947 20:09:17.528277 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3948 20:09:17.531752 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3949 20:09:17.535137
3950 20:09:17.535226
3951 20:09:17.535298 Settings after calibration
3952 20:09:17.535364
3953 20:09:17.538360 [DramcRunTimeConfig]
3954 20:09:17.541990 TransferPLLToSPMControl - MODE SW PHYPLL
3955 20:09:17.545218 TX_TRACKING: ON
3956 20:09:17.545311 RX_TRACKING: ON
3957 20:09:17.545403 HW_GATING: ON
3958 20:09:17.548260 HW_GATING DBG: OFF
3959 20:09:17.548352 ddr_geometry:1
3960 20:09:17.551874 ddr_geometry:1
3961 20:09:17.551967 ddr_geometry:1
3962 20:09:17.552059 ddr_geometry:1
3963 20:09:17.554829 ddr_geometry:1
3964 20:09:17.554920 ddr_geometry:1
3965 20:09:17.558676 ddr_geometry:1
3966 20:09:17.558768 ddr_geometry:1
3967 20:09:17.561658 High Freq DUMMY_READ_FOR_TRACKING: ON
3968 20:09:17.564969 ZQCS_ENABLE_LP4: OFF
3969 20:09:17.568058 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3970 20:09:17.571747 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3971 20:09:17.571842 SPM_CONTROL_AFTERK: ON
3972 20:09:17.575156 IMPEDANCE_TRACKING: ON
3973 20:09:17.575249 TEMP_SENSOR: ON
3974 20:09:17.578103 PER_BANK_REFRESH: ON
3975 20:09:17.578195 HW_SAVE_FOR_SR: ON
3976 20:09:17.581434 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3977 20:09:17.585315 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3978 20:09:17.588349 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3979 20:09:17.591354 Read ODT Tracking: ON
3980 20:09:17.595306 =========================
3981 20:09:17.595400
3982 20:09:17.595503 [TA2_TEST]
3983 20:09:17.595591 === TA2 HW
3984 20:09:17.601980 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3985 20:09:17.604948 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3986 20:09:17.612043 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3987 20:09:17.615265 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3988 20:09:17.615386
3989 20:09:17.618165 [MEM_TEST] 03: After run time config
3990 20:09:17.629625 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3991 20:09:17.633008 [complex_mem_test] start addr:0x40024000, len:131072
3992 20:09:17.837184 1st complex R/W mem test pass
3993 20:09:17.844139 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3994 20:09:17.847074 sync preloader write leveling
3995 20:09:17.850598 sync preloader cbt_mr12
3996 20:09:17.854019 sync preloader cbt_clk_dly
3997 20:09:17.854140 sync preloader cbt_cmd_dly
3998 20:09:17.857002 sync preloader cbt_cs
3999 20:09:17.860591 sync preloader cbt_ca_perbit_delay
4000 20:09:17.860715 sync preloader clk_delay
4001 20:09:17.863952 sync preloader dqs_delay
4002 20:09:17.867367 sync preloader u1Gating2T_Save
4003 20:09:17.870248 sync preloader u1Gating05T_Save
4004 20:09:17.873711 sync preloader u1Gatingfine_tune_Save
4005 20:09:17.877075 sync preloader u1Gatingucpass_count_Save
4006 20:09:17.880586 sync preloader u1TxWindowPerbitVref_Save
4007 20:09:17.884249 sync preloader u1TxCenter_min_Save
4008 20:09:17.886892 sync preloader u1TxCenter_max_Save
4009 20:09:17.890564 sync preloader u1Txwin_center_Save
4010 20:09:17.893808 sync preloader u1Txfirst_pass_Save
4011 20:09:17.897249 sync preloader u1Txlast_pass_Save
4012 20:09:17.900399 sync preloader u1RxDatlat_Save
4013 20:09:17.903598 sync preloader u1RxWinPerbitVref_Save
4014 20:09:17.906953 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4015 20:09:17.910466 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4016 20:09:17.913652 sync preloader delay_cell_unit
4017 20:09:17.920198 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4018 20:09:17.923500 sync preloader write leveling
4019 20:09:17.923629 sync preloader cbt_mr12
4020 20:09:17.927333 sync preloader cbt_clk_dly
4021 20:09:17.930608 sync preloader cbt_cmd_dly
4022 20:09:17.930730 sync preloader cbt_cs
4023 20:09:17.933627 sync preloader cbt_ca_perbit_delay
4024 20:09:17.937170 sync preloader clk_delay
4025 20:09:17.940356 sync preloader dqs_delay
4026 20:09:17.940477 sync preloader u1Gating2T_Save
4027 20:09:17.943647 sync preloader u1Gating05T_Save
4028 20:09:17.947146 sync preloader u1Gatingfine_tune_Save
4029 20:09:17.950774 sync preloader u1Gatingucpass_count_Save
4030 20:09:17.953776 sync preloader u1TxWindowPerbitVref_Save
4031 20:09:17.957396 sync preloader u1TxCenter_min_Save
4032 20:09:17.960398 sync preloader u1TxCenter_max_Save
4033 20:09:17.963854 sync preloader u1Txwin_center_Save
4034 20:09:17.967128 sync preloader u1Txfirst_pass_Save
4035 20:09:17.970364 sync preloader u1Txlast_pass_Save
4036 20:09:17.973743 sync preloader u1RxDatlat_Save
4037 20:09:17.977140 sync preloader u1RxWinPerbitVref_Save
4038 20:09:17.980130 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4039 20:09:17.983662 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4040 20:09:17.987081 sync preloader delay_cell_unit
4041 20:09:17.993365 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4042 20:09:17.997059 sync preloader write leveling
4043 20:09:18.000200 sync preloader cbt_mr12
4044 20:09:18.003553 sync preloader cbt_clk_dly
4045 20:09:18.003650 sync preloader cbt_cmd_dly
4046 20:09:18.006961 sync preloader cbt_cs
4047 20:09:18.009820 sync preloader cbt_ca_perbit_delay
4048 20:09:18.009916 sync preloader clk_delay
4049 20:09:18.013277 sync preloader dqs_delay
4050 20:09:18.016328 sync preloader u1Gating2T_Save
4051 20:09:18.019694 sync preloader u1Gating05T_Save
4052 20:09:18.023127 sync preloader u1Gatingfine_tune_Save
4053 20:09:18.026641 sync preloader u1Gatingucpass_count_Save
4054 20:09:18.029980 sync preloader u1TxWindowPerbitVref_Save
4055 20:09:18.033458 sync preloader u1TxCenter_min_Save
4056 20:09:18.036260 sync preloader u1TxCenter_max_Save
4057 20:09:18.040134 sync preloader u1Txwin_center_Save
4058 20:09:18.043104 sync preloader u1Txfirst_pass_Save
4059 20:09:18.046474 sync preloader u1Txlast_pass_Save
4060 20:09:18.046599 sync preloader u1RxDatlat_Save
4061 20:09:18.050149 sync preloader u1RxWinPerbitVref_Save
4062 20:09:18.056898 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4063 20:09:18.060157 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4064 20:09:18.063268 sync preloader delay_cell_unit
4065 20:09:18.066881 just_for_test_dump_coreboot_params dump all params
4066 20:09:18.069876 dump source = 0x0
4067 20:09:18.070002 dump params frequency:1600
4068 20:09:18.073134 dump params rank number:2
4069 20:09:18.073254
4070 20:09:18.076766 dump params write leveling
4071 20:09:18.080217 write leveling[0][0][0] = 0x20
4072 20:09:18.083579 write leveling[0][0][1] = 0x17
4073 20:09:18.083702 write leveling[0][1][0] = 0x1a
4074 20:09:18.086407 write leveling[0][1][1] = 0x17
4075 20:09:18.089865 write leveling[1][0][0] = 0x23
4076 20:09:18.093527 write leveling[1][0][1] = 0x19
4077 20:09:18.096760 write leveling[1][1][0] = 0x23
4078 20:09:18.096884 write leveling[1][1][1] = 0x18
4079 20:09:18.100019 dump params cbt_cs
4080 20:09:18.103259 cbt_cs[0][0] = 0x8
4081 20:09:18.103382 cbt_cs[0][1] = 0x8
4082 20:09:18.106237 cbt_cs[1][0] = 0xb
4083 20:09:18.106357 cbt_cs[1][1] = 0xb
4084 20:09:18.109582 dump params cbt_mr12
4085 20:09:18.109723 cbt_mr12[0][0] = 0x1e
4086 20:09:18.113070 cbt_mr12[0][1] = 0x1c
4087 20:09:18.113176 cbt_mr12[1][0] = 0x1e
4088 20:09:18.116492 cbt_mr12[1][1] = 0x20
4089 20:09:18.119988 dump params tx window
4090 20:09:18.120115 tx_center_min[0][0][0] = 981
4091 20:09:18.123157 tx_center_max[0][0][0] = 988
4092 20:09:18.126625 tx_center_min[0][0][1] = 974
4093 20:09:18.129564 tx_center_max[0][0][1] = 980
4094 20:09:18.133046 tx_center_min[0][1][0] = 979
4095 20:09:18.133179 tx_center_max[0][1][0] = 985
4096 20:09:18.136088 tx_center_min[0][1][1] = 977
4097 20:09:18.139546 tx_center_max[0][1][1] = 983
4098 20:09:18.143217 tx_center_min[1][0][0] = 989
4099 20:09:18.146374 tx_center_max[1][0][0] = 994
4100 20:09:18.146507 tx_center_min[1][0][1] = 978
4101 20:09:18.149451 tx_center_max[1][0][1] = 985
4102 20:09:18.152546 tx_center_min[1][1][0] = 987
4103 20:09:18.155930 tx_center_max[1][1][0] = 992
4104 20:09:18.159370 tx_center_min[1][1][1] = 975
4105 20:09:18.159515 tx_center_max[1][1][1] = 981
4106 20:09:18.162590 dump params tx window
4107 20:09:18.166700 tx_win_center[0][0][0] = 988
4108 20:09:18.166830 tx_first_pass[0][0][0] = 976
4109 20:09:18.169505 tx_last_pass[0][0][0] = 1000
4110 20:09:18.172984 tx_win_center[0][0][1] = 987
4111 20:09:18.176484 tx_first_pass[0][0][1] = 975
4112 20:09:18.179509 tx_last_pass[0][0][1] = 999
4113 20:09:18.179637 tx_win_center[0][0][2] = 988
4114 20:09:18.183044 tx_first_pass[0][0][2] = 976
4115 20:09:18.185980 tx_last_pass[0][0][2] = 1000
4116 20:09:18.189442 tx_win_center[0][0][3] = 981
4117 20:09:18.192964 tx_first_pass[0][0][3] = 969
4118 20:09:18.193094 tx_last_pass[0][0][3] = 993
4119 20:09:18.196222 tx_win_center[0][0][4] = 986
4120 20:09:18.199674 tx_first_pass[0][0][4] = 974
4121 20:09:18.202490 tx_last_pass[0][0][4] = 999
4122 20:09:18.202618 tx_win_center[0][0][5] = 983
4123 20:09:18.206309 tx_first_pass[0][0][5] = 971
4124 20:09:18.209198 tx_last_pass[0][0][5] = 996
4125 20:09:18.212794 tx_win_center[0][0][6] = 985
4126 20:09:18.216400 tx_first_pass[0][0][6] = 973
4127 20:09:18.216530 tx_last_pass[0][0][6] = 997
4128 20:09:18.219598 tx_win_center[0][0][7] = 987
4129 20:09:18.222507 tx_first_pass[0][0][7] = 975
4130 20:09:18.226350 tx_last_pass[0][0][7] = 999
4131 20:09:18.226485 tx_win_center[0][0][8] = 974
4132 20:09:18.229254 tx_first_pass[0][0][8] = 962
4133 20:09:18.232556 tx_last_pass[0][0][8] = 986
4134 20:09:18.235827 tx_win_center[0][0][9] = 977
4135 20:09:18.239715 tx_first_pass[0][0][9] = 966
4136 20:09:18.239849 tx_last_pass[0][0][9] = 988
4137 20:09:18.242754 tx_win_center[0][0][10] = 980
4138 20:09:18.245816 tx_first_pass[0][0][10] = 968
4139 20:09:18.249548 tx_last_pass[0][0][10] = 993
4140 20:09:18.249676 tx_win_center[0][0][11] = 975
4141 20:09:18.253068 tx_first_pass[0][0][11] = 964
4142 20:09:18.256591 tx_last_pass[0][0][11] = 987
4143 20:09:18.259529 tx_win_center[0][0][12] = 978
4144 20:09:18.262751 tx_first_pass[0][0][12] = 966
4145 20:09:18.262874 tx_last_pass[0][0][12] = 990
4146 20:09:18.266410 tx_win_center[0][0][13] = 977
4147 20:09:18.269255 tx_first_pass[0][0][13] = 966
4148 20:09:18.272720 tx_last_pass[0][0][13] = 989
4149 20:09:18.276119 tx_win_center[0][0][14] = 978
4150 20:09:18.279605 tx_first_pass[0][0][14] = 966
4151 20:09:18.279711 tx_last_pass[0][0][14] = 990
4152 20:09:18.282716 tx_win_center[0][0][15] = 980
4153 20:09:18.286208 tx_first_pass[0][0][15] = 968
4154 20:09:18.289329 tx_last_pass[0][0][15] = 992
4155 20:09:18.292734 tx_win_center[0][1][0] = 985
4156 20:09:18.292833 tx_first_pass[0][1][0] = 973
4157 20:09:18.295975 tx_last_pass[0][1][0] = 998
4158 20:09:18.299436 tx_win_center[0][1][1] = 985
4159 20:09:18.302364 tx_first_pass[0][1][1] = 973
4160 20:09:18.302457 tx_last_pass[0][1][1] = 997
4161 20:09:18.306037 tx_win_center[0][1][2] = 985
4162 20:09:18.309300 tx_first_pass[0][1][2] = 973
4163 20:09:18.312452 tx_last_pass[0][1][2] = 998
4164 20:09:18.315891 tx_win_center[0][1][3] = 979
4165 20:09:18.315991 tx_first_pass[0][1][3] = 968
4166 20:09:18.319387 tx_last_pass[0][1][3] = 991
4167 20:09:18.322605 tx_win_center[0][1][4] = 984
4168 20:09:18.325742 tx_first_pass[0][1][4] = 971
4169 20:09:18.325835 tx_last_pass[0][1][4] = 997
4170 20:09:18.329107 tx_win_center[0][1][5] = 981
4171 20:09:18.332274 tx_first_pass[0][1][5] = 969
4172 20:09:18.336028 tx_last_pass[0][1][5] = 993
4173 20:09:18.339166 tx_win_center[0][1][6] = 982
4174 20:09:18.339259 tx_first_pass[0][1][6] = 969
4175 20:09:18.342673 tx_last_pass[0][1][6] = 995
4176 20:09:18.345889 tx_win_center[0][1][7] = 984
4177 20:09:18.349212 tx_first_pass[0][1][7] = 971
4178 20:09:18.349343 tx_last_pass[0][1][7] = 997
4179 20:09:18.352631 tx_win_center[0][1][8] = 977
4180 20:09:18.355641 tx_first_pass[0][1][8] = 965
4181 20:09:18.359079 tx_last_pass[0][1][8] = 989
4182 20:09:18.362487 tx_win_center[0][1][9] = 978
4183 20:09:18.362615 tx_first_pass[0][1][9] = 967
4184 20:09:18.365755 tx_last_pass[0][1][9] = 990
4185 20:09:18.369073 tx_win_center[0][1][10] = 983
4186 20:09:18.372557 tx_first_pass[0][1][10] = 971
4187 20:09:18.375960 tx_last_pass[0][1][10] = 995
4188 20:09:18.376081 tx_win_center[0][1][11] = 977
4189 20:09:18.378604 tx_first_pass[0][1][11] = 965
4190 20:09:18.382005 tx_last_pass[0][1][11] = 990
4191 20:09:18.385567 tx_win_center[0][1][12] = 979
4192 20:09:18.388650 tx_first_pass[0][1][12] = 967
4193 20:09:18.388772 tx_last_pass[0][1][12] = 991
4194 20:09:18.392331 tx_win_center[0][1][13] = 979
4195 20:09:18.395621 tx_first_pass[0][1][13] = 968
4196 20:09:18.398366 tx_last_pass[0][1][13] = 990
4197 20:09:18.402230 tx_win_center[0][1][14] = 979
4198 20:09:18.402355 tx_first_pass[0][1][14] = 967
4199 20:09:18.405348 tx_last_pass[0][1][14] = 991
4200 20:09:18.408745 tx_win_center[0][1][15] = 981
4201 20:09:18.411609 tx_first_pass[0][1][15] = 970
4202 20:09:18.414978 tx_last_pass[0][1][15] = 993
4203 20:09:18.415103 tx_win_center[1][0][0] = 994
4204 20:09:18.418377 tx_first_pass[1][0][0] = 981
4205 20:09:18.421766 tx_last_pass[1][0][0] = 1007
4206 20:09:18.425312 tx_win_center[1][0][1] = 993
4207 20:09:18.428966 tx_first_pass[1][0][1] = 980
4208 20:09:18.429090 tx_last_pass[1][0][1] = 1006
4209 20:09:18.431638 tx_win_center[1][0][2] = 991
4210 20:09:18.434964 tx_first_pass[1][0][2] = 978
4211 20:09:18.438230 tx_last_pass[1][0][2] = 1005
4212 20:09:18.441797 tx_win_center[1][0][3] = 989
4213 20:09:18.441921 tx_first_pass[1][0][3] = 977
4214 20:09:18.445230 tx_last_pass[1][0][3] = 1001
4215 20:09:18.448513 tx_win_center[1][0][4] = 993
4216 20:09:18.451539 tx_first_pass[1][0][4] = 981
4217 20:09:18.454735 tx_last_pass[1][0][4] = 1006
4218 20:09:18.454858 tx_win_center[1][0][5] = 994
4219 20:09:18.458133 tx_first_pass[1][0][5] = 982
4220 20:09:18.461797 tx_last_pass[1][0][5] = 1007
4221 20:09:18.464812 tx_win_center[1][0][6] = 993
4222 20:09:18.464935 tx_first_pass[1][0][6] = 981
4223 20:09:18.468523 tx_last_pass[1][0][6] = 1006
4224 20:09:18.471385 tx_win_center[1][0][7] = 993
4225 20:09:18.475206 tx_first_pass[1][0][7] = 980
4226 20:09:18.478099 tx_last_pass[1][0][7] = 1006
4227 20:09:18.478226 tx_win_center[1][0][8] = 981
4228 20:09:18.481513 tx_first_pass[1][0][8] = 969
4229 20:09:18.484925 tx_last_pass[1][0][8] = 993
4230 20:09:18.487916 tx_win_center[1][0][9] = 981
4231 20:09:18.491251 tx_first_pass[1][0][9] = 970
4232 20:09:18.491372 tx_last_pass[1][0][9] = 992
4233 20:09:18.494871 tx_win_center[1][0][10] = 983
4234 20:09:18.498176 tx_first_pass[1][0][10] = 971
4235 20:09:18.501446 tx_last_pass[1][0][10] = 995
4236 20:09:18.504472 tx_win_center[1][0][11] = 984
4237 20:09:18.504596 tx_first_pass[1][0][11] = 972
4238 20:09:18.507580 tx_last_pass[1][0][11] = 996
4239 20:09:18.511184 tx_win_center[1][0][12] = 984
4240 20:09:18.514437 tx_first_pass[1][0][12] = 972
4241 20:09:18.517559 tx_last_pass[1][0][12] = 996
4242 20:09:18.517687 tx_win_center[1][0][13] = 985
4243 20:09:18.521287 tx_first_pass[1][0][13] = 974
4244 20:09:18.524169 tx_last_pass[1][0][13] = 996
4245 20:09:18.527602 tx_win_center[1][0][14] = 983
4246 20:09:18.531108 tx_first_pass[1][0][14] = 972
4247 20:09:18.531231 tx_last_pass[1][0][14] = 995
4248 20:09:18.534651 tx_win_center[1][0][15] = 978
4249 20:09:18.537961 tx_first_pass[1][0][15] = 967
4250 20:09:18.541372 tx_last_pass[1][0][15] = 990
4251 20:09:18.544609 tx_win_center[1][1][0] = 992
4252 20:09:18.544738 tx_first_pass[1][1][0] = 979
4253 20:09:18.547393 tx_last_pass[1][1][0] = 1006
4254 20:09:18.550799 tx_win_center[1][1][1] = 991
4255 20:09:18.554200 tx_first_pass[1][1][1] = 978
4256 20:09:18.557422 tx_last_pass[1][1][1] = 1004
4257 20:09:18.557544 tx_win_center[1][1][2] = 989
4258 20:09:18.560919 tx_first_pass[1][1][2] = 977
4259 20:09:18.564324 tx_last_pass[1][1][2] = 1002
4260 20:09:18.567671 tx_win_center[1][1][3] = 987
4261 20:09:18.567797 tx_first_pass[1][1][3] = 976
4262 20:09:18.570740 tx_last_pass[1][1][3] = 999
4263 20:09:18.574365 tx_win_center[1][1][4] = 991
4264 20:09:18.577336 tx_first_pass[1][1][4] = 978
4265 20:09:18.580895 tx_last_pass[1][1][4] = 1004
4266 20:09:18.581020 tx_win_center[1][1][5] = 992
4267 20:09:18.584344 tx_first_pass[1][1][5] = 979
4268 20:09:18.587412 tx_last_pass[1][1][5] = 1005
4269 20:09:18.590902 tx_win_center[1][1][6] = 991
4270 20:09:18.594121 tx_first_pass[1][1][6] = 978
4271 20:09:18.594247 tx_last_pass[1][1][6] = 1005
4272 20:09:18.597615 tx_win_center[1][1][7] = 991
4273 20:09:18.601048 tx_first_pass[1][1][7] = 978
4274 20:09:18.604236 tx_last_pass[1][1][7] = 1004
4275 20:09:18.604360 tx_win_center[1][1][8] = 978
4276 20:09:18.607660 tx_first_pass[1][1][8] = 967
4277 20:09:18.610515 tx_last_pass[1][1][8] = 990
4278 20:09:18.613954 tx_win_center[1][1][9] = 979
4279 20:09:18.617531 tx_first_pass[1][1][9] = 968
4280 20:09:18.617654 tx_last_pass[1][1][9] = 990
4281 20:09:18.620696 tx_win_center[1][1][10] = 980
4282 20:09:18.623952 tx_first_pass[1][1][10] = 969
4283 20:09:18.627190 tx_last_pass[1][1][10] = 992
4284 20:09:18.630613 tx_win_center[1][1][11] = 981
4285 20:09:18.630734 tx_first_pass[1][1][11] = 969
4286 20:09:18.633995 tx_last_pass[1][1][11] = 993
4287 20:09:18.637462 tx_win_center[1][1][12] = 981
4288 20:09:18.640812 tx_first_pass[1][1][12] = 970
4289 20:09:18.644201 tx_last_pass[1][1][12] = 993
4290 20:09:18.644311 tx_win_center[1][1][13] = 981
4291 20:09:18.647341 tx_first_pass[1][1][13] = 970
4292 20:09:18.650883 tx_last_pass[1][1][13] = 993
4293 20:09:18.653678 tx_win_center[1][1][14] = 980
4294 20:09:18.658756 tx_first_pass[1][1][14] = 969
4295 20:09:18.658862 tx_last_pass[1][1][14] = 992
4296 20:09:18.660412 tx_win_center[1][1][15] = 975
4297 20:09:18.663799 tx_first_pass[1][1][15] = 963
4298 20:09:18.667450 tx_last_pass[1][1][15] = 987
4299 20:09:18.667546 dump params rx window
4300 20:09:18.670657 rx_firspass[0][0][0] = 5
4301 20:09:18.673743 rx_lastpass[0][0][0] = 38
4302 20:09:18.673839 rx_firspass[0][0][1] = 5
4303 20:09:18.677373 rx_lastpass[0][0][1] = 37
4304 20:09:18.680716 rx_firspass[0][0][2] = 6
4305 20:09:18.683849 rx_lastpass[0][0][2] = 36
4306 20:09:18.683946 rx_firspass[0][0][3] = -2
4307 20:09:18.686973 rx_lastpass[0][0][3] = 31
4308 20:09:18.690513 rx_firspass[0][0][4] = 5
4309 20:09:18.690607 rx_lastpass[0][0][4] = 37
4310 20:09:18.693597 rx_firspass[0][0][5] = 1
4311 20:09:18.697067 rx_lastpass[0][0][5] = 32
4312 20:09:18.700345 rx_firspass[0][0][6] = 3
4313 20:09:18.700442 rx_lastpass[0][0][6] = 34
4314 20:09:18.703665 rx_firspass[0][0][7] = 5
4315 20:09:18.707053 rx_lastpass[0][0][7] = 36
4316 20:09:18.707150 rx_firspass[0][0][8] = -3
4317 20:09:18.710391 rx_lastpass[0][0][8] = 33
4318 20:09:18.713893 rx_firspass[0][0][9] = 0
4319 20:09:18.713989 rx_lastpass[0][0][9] = 32
4320 20:09:18.716886 rx_firspass[0][0][10] = 8
4321 20:09:18.720232 rx_lastpass[0][0][10] = 41
4322 20:09:18.723427 rx_firspass[0][0][11] = 1
4323 20:09:18.723526 rx_lastpass[0][0][11] = 32
4324 20:09:18.726783 rx_firspass[0][0][12] = 2
4325 20:09:18.730304 rx_lastpass[0][0][12] = 37
4326 20:09:18.733492 rx_firspass[0][0][13] = 3
4327 20:09:18.733591 rx_lastpass[0][0][13] = 33
4328 20:09:18.737305 rx_firspass[0][0][14] = 1
4329 20:09:18.739982 rx_lastpass[0][0][14] = 37
4330 20:09:18.740078 rx_firspass[0][0][15] = 5
4331 20:09:18.743451 rx_lastpass[0][0][15] = 37
4332 20:09:18.746756 rx_firspass[0][1][0] = 5
4333 20:09:18.749905 rx_lastpass[0][1][0] = 40
4334 20:09:18.750003 rx_firspass[0][1][1] = 5
4335 20:09:18.753238 rx_lastpass[0][1][1] = 38
4336 20:09:18.756999 rx_firspass[0][1][2] = 6
4337 20:09:18.757093 rx_lastpass[0][1][2] = 38
4338 20:09:18.760238 rx_firspass[0][1][3] = -2
4339 20:09:18.763705 rx_lastpass[0][1][3] = 33
4340 20:09:18.763800 rx_firspass[0][1][4] = 5
4341 20:09:18.767037 rx_lastpass[0][1][4] = 39
4342 20:09:18.770043 rx_firspass[0][1][5] = 1
4343 20:09:18.773329 rx_lastpass[0][1][5] = 34
4344 20:09:18.773424 rx_firspass[0][1][6] = 3
4345 20:09:18.776967 rx_lastpass[0][1][6] = 37
4346 20:09:18.779843 rx_firspass[0][1][7] = 3
4347 20:09:18.779937 rx_lastpass[0][1][7] = 38
4348 20:09:18.783590 rx_firspass[0][1][8] = -2
4349 20:09:18.786556 rx_lastpass[0][1][8] = 32
4350 20:09:18.789756 rx_firspass[0][1][9] = 1
4351 20:09:18.789851 rx_lastpass[0][1][9] = 36
4352 20:09:18.793577 rx_firspass[0][1][10] = 7
4353 20:09:18.796979 rx_lastpass[0][1][10] = 43
4354 20:09:18.797074 rx_firspass[0][1][11] = -2
4355 20:09:18.799864 rx_lastpass[0][1][11] = 34
4356 20:09:18.803445 rx_firspass[0][1][12] = 1
4357 20:09:18.806668 rx_lastpass[0][1][12] = 37
4358 20:09:18.806767 rx_firspass[0][1][13] = 2
4359 20:09:18.809898 rx_lastpass[0][1][13] = 35
4360 20:09:18.813092 rx_firspass[0][1][14] = 3
4361 20:09:18.816567 rx_lastpass[0][1][14] = 37
4362 20:09:18.816666 rx_firspass[0][1][15] = 6
4363 20:09:18.819980 rx_lastpass[0][1][15] = 39
4364 20:09:18.823472 rx_firspass[1][0][0] = 5
4365 20:09:18.823568 rx_lastpass[1][0][0] = 38
4366 20:09:18.826755 rx_firspass[1][0][1] = 5
4367 20:09:18.830148 rx_lastpass[1][0][1] = 38
4368 20:09:18.830243 rx_firspass[1][0][2] = 2
4369 20:09:18.833635 rx_lastpass[1][0][2] = 35
4370 20:09:18.836883 rx_firspass[1][0][3] = 0
4371 20:09:18.840063 rx_lastpass[1][0][3] = 33
4372 20:09:18.840158 rx_firspass[1][0][4] = 5
4373 20:09:18.843547 rx_lastpass[1][0][4] = 38
4374 20:09:18.846675 rx_firspass[1][0][5] = 7
4375 20:09:18.846774 rx_lastpass[1][0][5] = 38
4376 20:09:18.850076 rx_firspass[1][0][6] = 7
4377 20:09:18.853209 rx_lastpass[1][0][6] = 40
4378 20:09:18.853303 rx_firspass[1][0][7] = 5
4379 20:09:18.856865 rx_lastpass[1][0][7] = 38
4380 20:09:18.859975 rx_firspass[1][0][8] = 1
4381 20:09:18.860069 rx_lastpass[1][0][8] = 33
4382 20:09:18.863361 rx_firspass[1][0][9] = 1
4383 20:09:18.866823 rx_lastpass[1][0][9] = 32
4384 20:09:18.870059 rx_firspass[1][0][10] = 5
4385 20:09:18.870154 rx_lastpass[1][0][10] = 35
4386 20:09:18.873583 rx_firspass[1][0][11] = 6
4387 20:09:18.876658 rx_lastpass[1][0][11] = 38
4388 20:09:18.879972 rx_firspass[1][0][12] = 6
4389 20:09:18.880069 rx_lastpass[1][0][12] = 38
4390 20:09:18.883207 rx_firspass[1][0][13] = 6
4391 20:09:18.886600 rx_lastpass[1][0][13] = 37
4392 20:09:18.886692 rx_firspass[1][0][14] = 7
4393 20:09:18.889865 rx_lastpass[1][0][14] = 38
4394 20:09:18.892951 rx_firspass[1][0][15] = -3
4395 20:09:18.896841 rx_lastpass[1][0][15] = 30
4396 20:09:18.896939 rx_firspass[1][1][0] = 3
4397 20:09:18.899910 rx_lastpass[1][1][0] = 40
4398 20:09:18.902993 rx_firspass[1][1][1] = 5
4399 20:09:18.903085 rx_lastpass[1][1][1] = 38
4400 20:09:18.906648 rx_firspass[1][1][2] = 1
4401 20:09:18.909665 rx_lastpass[1][1][2] = 36
4402 20:09:18.913400 rx_firspass[1][1][3] = -2
4403 20:09:18.913495 rx_lastpass[1][1][3] = 34
4404 20:09:18.916672 rx_firspass[1][1][4] = 4
4405 20:09:18.919803 rx_lastpass[1][1][4] = 39
4406 20:09:18.919898 rx_firspass[1][1][5] = 5
4407 20:09:18.923364 rx_lastpass[1][1][5] = 40
4408 20:09:18.926581 rx_firspass[1][1][6] = 5
4409 20:09:18.926676 rx_lastpass[1][1][6] = 41
4410 20:09:18.929574 rx_firspass[1][1][7] = 3
4411 20:09:18.933461 rx_lastpass[1][1][7] = 38
4412 20:09:18.936609 rx_firspass[1][1][8] = 1
4413 20:09:18.936703 rx_lastpass[1][1][8] = 35
4414 20:09:18.939909 rx_firspass[1][1][9] = -1
4415 20:09:18.942961 rx_lastpass[1][1][9] = 34
4416 20:09:18.943053 rx_firspass[1][1][10] = 3
4417 20:09:18.946300 rx_lastpass[1][1][10] = 39
4418 20:09:18.950030 rx_firspass[1][1][11] = 4
4419 20:09:18.953075 rx_lastpass[1][1][11] = 40
4420 20:09:18.953167 rx_firspass[1][1][12] = 5
4421 20:09:18.956541 rx_lastpass[1][1][12] = 40
4422 20:09:18.959910 rx_firspass[1][1][13] = 5
4423 20:09:18.963060 rx_lastpass[1][1][13] = 40
4424 20:09:18.963163 rx_firspass[1][1][14] = 5
4425 20:09:18.966484 rx_lastpass[1][1][14] = 40
4426 20:09:18.969458 rx_firspass[1][1][15] = -3
4427 20:09:18.969552 rx_lastpass[1][1][15] = 31
4428 20:09:18.973398 dump params clk_delay
4429 20:09:18.976204 clk_delay[0] = 1
4430 20:09:18.976298 clk_delay[1] = 0
4431 20:09:18.980071 dump params dqs_delay
4432 20:09:18.980165 dqs_delay[0][0] = -2
4433 20:09:18.982967 dqs_delay[0][1] = 0
4434 20:09:18.983060 dqs_delay[1][0] = 0
4435 20:09:18.986615 dqs_delay[1][1] = 0
4436 20:09:18.989830 dump params delay_cell_unit = 735
4437 20:09:18.989925 dump source = 0x0
4438 20:09:18.993112 dump params frequency:1200
4439 20:09:18.996322 dump params rank number:2
4440 20:09:18.996416
4441 20:09:18.996488 dump params write leveling
4442 20:09:18.999823 write leveling[0][0][0] = 0x0
4443 20:09:19.002710 write leveling[0][0][1] = 0x0
4444 20:09:19.006185 write leveling[0][1][0] = 0x0
4445 20:09:19.009737 write leveling[0][1][1] = 0x0
4446 20:09:19.009834 write leveling[1][0][0] = 0x0
4447 20:09:19.012802 write leveling[1][0][1] = 0x0
4448 20:09:19.016339 write leveling[1][1][0] = 0x0
4449 20:09:19.019630 write leveling[1][1][1] = 0x0
4450 20:09:19.019727 dump params cbt_cs
4451 20:09:19.022653 cbt_cs[0][0] = 0x0
4452 20:09:19.022745 cbt_cs[0][1] = 0x0
4453 20:09:19.026280 cbt_cs[1][0] = 0x0
4454 20:09:19.026373 cbt_cs[1][1] = 0x0
4455 20:09:19.029538 dump params cbt_mr12
4456 20:09:19.032527 cbt_mr12[0][0] = 0x0
4457 20:09:19.032625 cbt_mr12[0][1] = 0x0
4458 20:09:19.036457 cbt_mr12[1][0] = 0x0
4459 20:09:19.036552 cbt_mr12[1][1] = 0x0
4460 20:09:19.039163 dump params tx window
4461 20:09:19.042723 tx_center_min[0][0][0] = 0
4462 20:09:19.042816 tx_center_max[0][0][0] = 0
4463 20:09:19.045764 tx_center_min[0][0][1] = 0
4464 20:09:19.049646 tx_center_max[0][0][1] = 0
4465 20:09:19.052627 tx_center_min[0][1][0] = 0
4466 20:09:19.052724 tx_center_max[0][1][0] = 0
4467 20:09:19.056072 tx_center_min[0][1][1] = 0
4468 20:09:19.059712 tx_center_max[0][1][1] = 0
4469 20:09:19.062795 tx_center_min[1][0][0] = 0
4470 20:09:19.062897 tx_center_max[1][0][0] = 0
4471 20:09:19.065840 tx_center_min[1][0][1] = 0
4472 20:09:19.068995 tx_center_max[1][0][1] = 0
4473 20:09:19.072367 tx_center_min[1][1][0] = 0
4474 20:09:19.072465 tx_center_max[1][1][0] = 0
4475 20:09:19.075549 tx_center_min[1][1][1] = 0
4476 20:09:19.079332 tx_center_max[1][1][1] = 0
4477 20:09:19.079438 dump params tx window
4478 20:09:19.082446 tx_win_center[0][0][0] = 0
4479 20:09:19.085817 tx_first_pass[0][0][0] = 0
4480 20:09:19.088959 tx_last_pass[0][0][0] = 0
4481 20:09:19.089056 tx_win_center[0][0][1] = 0
4482 20:09:19.092482 tx_first_pass[0][0][1] = 0
4483 20:09:19.095339 tx_last_pass[0][0][1] = 0
4484 20:09:19.095446 tx_win_center[0][0][2] = 0
4485 20:09:19.099040 tx_first_pass[0][0][2] = 0
4486 20:09:19.102477 tx_last_pass[0][0][2] = 0
4487 20:09:19.105911 tx_win_center[0][0][3] = 0
4488 20:09:19.106008 tx_first_pass[0][0][3] = 0
4489 20:09:19.108978 tx_last_pass[0][0][3] = 0
4490 20:09:19.112333 tx_win_center[0][0][4] = 0
4491 20:09:19.115707 tx_first_pass[0][0][4] = 0
4492 20:09:19.115805 tx_last_pass[0][0][4] = 0
4493 20:09:19.118692 tx_win_center[0][0][5] = 0
4494 20:09:19.122022 tx_first_pass[0][0][5] = 0
4495 20:09:19.122122 tx_last_pass[0][0][5] = 0
4496 20:09:19.125435 tx_win_center[0][0][6] = 0
4497 20:09:19.128954 tx_first_pass[0][0][6] = 0
4498 20:09:19.131955 tx_last_pass[0][0][6] = 0
4499 20:09:19.132052 tx_win_center[0][0][7] = 0
4500 20:09:19.135707 tx_first_pass[0][0][7] = 0
4501 20:09:19.138927 tx_last_pass[0][0][7] = 0
4502 20:09:19.142125 tx_win_center[0][0][8] = 0
4503 20:09:19.142223 tx_first_pass[0][0][8] = 0
4504 20:09:19.145484 tx_last_pass[0][0][8] = 0
4505 20:09:19.148573 tx_win_center[0][0][9] = 0
4506 20:09:19.151920 tx_first_pass[0][0][9] = 0
4507 20:09:19.152023 tx_last_pass[0][0][9] = 0
4508 20:09:19.155343 tx_win_center[0][0][10] = 0
4509 20:09:19.158542 tx_first_pass[0][0][10] = 0
4510 20:09:19.158639 tx_last_pass[0][0][10] = 0
4511 20:09:19.161799 tx_win_center[0][0][11] = 0
4512 20:09:19.165280 tx_first_pass[0][0][11] = 0
4513 20:09:19.168657 tx_last_pass[0][0][11] = 0
4514 20:09:19.168751 tx_win_center[0][0][12] = 0
4515 20:09:19.172055 tx_first_pass[0][0][12] = 0
4516 20:09:19.175097 tx_last_pass[0][0][12] = 0
4517 20:09:19.178579 tx_win_center[0][0][13] = 0
4518 20:09:19.182030 tx_first_pass[0][0][13] = 0
4519 20:09:19.182131 tx_last_pass[0][0][13] = 0
4520 20:09:19.185325 tx_win_center[0][0][14] = 0
4521 20:09:19.188748 tx_first_pass[0][0][14] = 0
4522 20:09:19.188850 tx_last_pass[0][0][14] = 0
4523 20:09:19.192103 tx_win_center[0][0][15] = 0
4524 20:09:19.195104 tx_first_pass[0][0][15] = 0
4525 20:09:19.198995 tx_last_pass[0][0][15] = 0
4526 20:09:19.199111 tx_win_center[0][1][0] = 0
4527 20:09:19.202027 tx_first_pass[0][1][0] = 0
4528 20:09:19.205253 tx_last_pass[0][1][0] = 0
4529 20:09:19.208423 tx_win_center[0][1][1] = 0
4530 20:09:19.208525 tx_first_pass[0][1][1] = 0
4531 20:09:19.211817 tx_last_pass[0][1][1] = 0
4532 20:09:19.214992 tx_win_center[0][1][2] = 0
4533 20:09:19.218203 tx_first_pass[0][1][2] = 0
4534 20:09:19.218300 tx_last_pass[0][1][2] = 0
4535 20:09:19.221582 tx_win_center[0][1][3] = 0
4536 20:09:19.225194 tx_first_pass[0][1][3] = 0
4537 20:09:19.228536 tx_last_pass[0][1][3] = 0
4538 20:09:19.228636 tx_win_center[0][1][4] = 0
4539 20:09:19.231768 tx_first_pass[0][1][4] = 0
4540 20:09:19.235199 tx_last_pass[0][1][4] = 0
4541 20:09:19.235295 tx_win_center[0][1][5] = 0
4542 20:09:19.238548 tx_first_pass[0][1][5] = 0
4543 20:09:19.241414 tx_last_pass[0][1][5] = 0
4544 20:09:19.244712 tx_win_center[0][1][6] = 0
4545 20:09:19.244818 tx_first_pass[0][1][6] = 0
4546 20:09:19.248479 tx_last_pass[0][1][6] = 0
4547 20:09:19.251715 tx_win_center[0][1][7] = 0
4548 20:09:19.251820 tx_first_pass[0][1][7] = 0
4549 20:09:19.254973 tx_last_pass[0][1][7] = 0
4550 20:09:19.258362 tx_win_center[0][1][8] = 0
4551 20:09:19.261829 tx_first_pass[0][1][8] = 0
4552 20:09:19.261927 tx_last_pass[0][1][8] = 0
4553 20:09:19.265364 tx_win_center[0][1][9] = 0
4554 20:09:19.268357 tx_first_pass[0][1][9] = 0
4555 20:09:19.268462 tx_last_pass[0][1][9] = 0
4556 20:09:19.271948 tx_win_center[0][1][10] = 0
4557 20:09:19.275044 tx_first_pass[0][1][10] = 0
4558 20:09:19.278191 tx_last_pass[0][1][10] = 0
4559 20:09:19.278293 tx_win_center[0][1][11] = 0
4560 20:09:19.281523 tx_first_pass[0][1][11] = 0
4561 20:09:19.284907 tx_last_pass[0][1][11] = 0
4562 20:09:19.288448 tx_win_center[0][1][12] = 0
4563 20:09:19.291758 tx_first_pass[0][1][12] = 0
4564 20:09:19.291869 tx_last_pass[0][1][12] = 0
4565 20:09:19.295015 tx_win_center[0][1][13] = 0
4566 20:09:19.298281 tx_first_pass[0][1][13] = 0
4567 20:09:19.298385 tx_last_pass[0][1][13] = 0
4568 20:09:19.301731 tx_win_center[0][1][14] = 0
4569 20:09:19.305086 tx_first_pass[0][1][14] = 0
4570 20:09:19.308617 tx_last_pass[0][1][14] = 0
4571 20:09:19.311938 tx_win_center[0][1][15] = 0
4572 20:09:19.312041 tx_first_pass[0][1][15] = 0
4573 20:09:19.315167 tx_last_pass[0][1][15] = 0
4574 20:09:19.318400 tx_win_center[1][0][0] = 0
4575 20:09:19.318500 tx_first_pass[1][0][0] = 0
4576 20:09:19.321465 tx_last_pass[1][0][0] = 0
4577 20:09:19.324944 tx_win_center[1][0][1] = 0
4578 20:09:19.328495 tx_first_pass[1][0][1] = 0
4579 20:09:19.328594 tx_last_pass[1][0][1] = 0
4580 20:09:19.331283 tx_win_center[1][0][2] = 0
4581 20:09:19.334716 tx_first_pass[1][0][2] = 0
4582 20:09:19.338368 tx_last_pass[1][0][2] = 0
4583 20:09:19.338474 tx_win_center[1][0][3] = 0
4584 20:09:19.341736 tx_first_pass[1][0][3] = 0
4585 20:09:19.345391 tx_last_pass[1][0][3] = 0
4586 20:09:19.345493 tx_win_center[1][0][4] = 0
4587 20:09:19.348125 tx_first_pass[1][0][4] = 0
4588 20:09:19.351713 tx_last_pass[1][0][4] = 0
4589 20:09:19.354905 tx_win_center[1][0][5] = 0
4590 20:09:19.355001 tx_first_pass[1][0][5] = 0
4591 20:09:19.358116 tx_last_pass[1][0][5] = 0
4592 20:09:19.361901 tx_win_center[1][0][6] = 0
4593 20:09:19.364681 tx_first_pass[1][0][6] = 0
4594 20:09:19.364781 tx_last_pass[1][0][6] = 0
4595 20:09:19.368491 tx_win_center[1][0][7] = 0
4596 20:09:19.371616 tx_first_pass[1][0][7] = 0
4597 20:09:19.371716 tx_last_pass[1][0][7] = 0
4598 20:09:19.374888 tx_win_center[1][0][8] = 0
4599 20:09:19.377966 tx_first_pass[1][0][8] = 0
4600 20:09:19.381356 tx_last_pass[1][0][8] = 0
4601 20:09:19.381452 tx_win_center[1][0][9] = 0
4602 20:09:19.384850 tx_first_pass[1][0][9] = 0
4603 20:09:19.388355 tx_last_pass[1][0][9] = 0
4604 20:09:19.391741 tx_win_center[1][0][10] = 0
4605 20:09:19.391842 tx_first_pass[1][0][10] = 0
4606 20:09:19.394828 tx_last_pass[1][0][10] = 0
4607 20:09:19.398144 tx_win_center[1][0][11] = 0
4608 20:09:19.401359 tx_first_pass[1][0][11] = 0
4609 20:09:19.401455 tx_last_pass[1][0][11] = 0
4610 20:09:19.404484 tx_win_center[1][0][12] = 0
4611 20:09:19.407998 tx_first_pass[1][0][12] = 0
4612 20:09:19.411119 tx_last_pass[1][0][12] = 0
4613 20:09:19.411218 tx_win_center[1][0][13] = 0
4614 20:09:19.414852 tx_first_pass[1][0][13] = 0
4615 20:09:19.417914 tx_last_pass[1][0][13] = 0
4616 20:09:19.421648 tx_win_center[1][0][14] = 0
4617 20:09:19.421746 tx_first_pass[1][0][14] = 0
4618 20:09:19.424825 tx_last_pass[1][0][14] = 0
4619 20:09:19.428289 tx_win_center[1][0][15] = 0
4620 20:09:19.431308 tx_first_pass[1][0][15] = 0
4621 20:09:19.431437 tx_last_pass[1][0][15] = 0
4622 20:09:19.434390 tx_win_center[1][1][0] = 0
4623 20:09:19.437653 tx_first_pass[1][1][0] = 0
4624 20:09:19.440942 tx_last_pass[1][1][0] = 0
4625 20:09:19.441036 tx_win_center[1][1][1] = 0
4626 20:09:19.444355 tx_first_pass[1][1][1] = 0
4627 20:09:19.447754 tx_last_pass[1][1][1] = 0
4628 20:09:19.447852 tx_win_center[1][1][2] = 0
4629 20:09:19.451052 tx_first_pass[1][1][2] = 0
4630 20:09:19.454387 tx_last_pass[1][1][2] = 0
4631 20:09:19.457840 tx_win_center[1][1][3] = 0
4632 20:09:19.457937 tx_first_pass[1][1][3] = 0
4633 20:09:19.461061 tx_last_pass[1][1][3] = 0
4634 20:09:19.464173 tx_win_center[1][1][4] = 0
4635 20:09:19.467940 tx_first_pass[1][1][4] = 0
4636 20:09:19.468036 tx_last_pass[1][1][4] = 0
4637 20:09:19.471308 tx_win_center[1][1][5] = 0
4638 20:09:19.474547 tx_first_pass[1][1][5] = 0
4639 20:09:19.474646 tx_last_pass[1][1][5] = 0
4640 20:09:19.477812 tx_win_center[1][1][6] = 0
4641 20:09:19.481070 tx_first_pass[1][1][6] = 0
4642 20:09:19.484413 tx_last_pass[1][1][6] = 0
4643 20:09:19.484510 tx_win_center[1][1][7] = 0
4644 20:09:19.487651 tx_first_pass[1][1][7] = 0
4645 20:09:19.490974 tx_last_pass[1][1][7] = 0
4646 20:09:19.494054 tx_win_center[1][1][8] = 0
4647 20:09:19.494151 tx_first_pass[1][1][8] = 0
4648 20:09:19.497552 tx_last_pass[1][1][8] = 0
4649 20:09:19.500827 tx_win_center[1][1][9] = 0
4650 20:09:19.504204 tx_first_pass[1][1][9] = 0
4651 20:09:19.504301 tx_last_pass[1][1][9] = 0
4652 20:09:19.507599 tx_win_center[1][1][10] = 0
4653 20:09:19.510725 tx_first_pass[1][1][10] = 0
4654 20:09:19.510822 tx_last_pass[1][1][10] = 0
4655 20:09:19.514216 tx_win_center[1][1][11] = 0
4656 20:09:19.517604 tx_first_pass[1][1][11] = 0
4657 20:09:19.520517 tx_last_pass[1][1][11] = 0
4658 20:09:19.520615 tx_win_center[1][1][12] = 0
4659 20:09:19.523778 tx_first_pass[1][1][12] = 0
4660 20:09:19.527195 tx_last_pass[1][1][12] = 0
4661 20:09:19.530649 tx_win_center[1][1][13] = 0
4662 20:09:19.533892 tx_first_pass[1][1][13] = 0
4663 20:09:19.533991 tx_last_pass[1][1][13] = 0
4664 20:09:19.537388 tx_win_center[1][1][14] = 0
4665 20:09:19.540776 tx_first_pass[1][1][14] = 0
4666 20:09:19.543678 tx_last_pass[1][1][14] = 0
4667 20:09:19.543773 tx_win_center[1][1][15] = 0
4668 20:09:19.547107 tx_first_pass[1][1][15] = 0
4669 20:09:19.550631 tx_last_pass[1][1][15] = 0
4670 20:09:19.550730 dump params rx window
4671 20:09:19.554006 rx_firspass[0][0][0] = 0
4672 20:09:19.557282 rx_lastpass[0][0][0] = 0
4673 20:09:19.557378 rx_firspass[0][0][1] = 0
4674 20:09:19.560348 rx_lastpass[0][0][1] = 0
4675 20:09:19.563794 rx_firspass[0][0][2] = 0
4676 20:09:19.563891 rx_lastpass[0][0][2] = 0
4677 20:09:19.567377 rx_firspass[0][0][3] = 0
4678 20:09:19.570601 rx_lastpass[0][0][3] = 0
4679 20:09:19.573966 rx_firspass[0][0][4] = 0
4680 20:09:19.574064 rx_lastpass[0][0][4] = 0
4681 20:09:19.577072 rx_firspass[0][0][5] = 0
4682 20:09:19.580589 rx_lastpass[0][0][5] = 0
4683 20:09:19.580683 rx_firspass[0][0][6] = 0
4684 20:09:19.583680 rx_lastpass[0][0][6] = 0
4685 20:09:19.586967 rx_firspass[0][0][7] = 0
4686 20:09:19.587062 rx_lastpass[0][0][7] = 0
4687 20:09:19.590645 rx_firspass[0][0][8] = 0
4688 20:09:19.593824 rx_lastpass[0][0][8] = 0
4689 20:09:19.593921 rx_firspass[0][0][9] = 0
4690 20:09:19.597113 rx_lastpass[0][0][9] = 0
4691 20:09:19.600603 rx_firspass[0][0][10] = 0
4692 20:09:19.603440 rx_lastpass[0][0][10] = 0
4693 20:09:19.603536 rx_firspass[0][0][11] = 0
4694 20:09:19.607154 rx_lastpass[0][0][11] = 0
4695 20:09:19.610624 rx_firspass[0][0][12] = 0
4696 20:09:19.610721 rx_lastpass[0][0][12] = 0
4697 20:09:19.613802 rx_firspass[0][0][13] = 0
4698 20:09:19.617075 rx_lastpass[0][0][13] = 0
4699 20:09:19.620288 rx_firspass[0][0][14] = 0
4700 20:09:19.620387 rx_lastpass[0][0][14] = 0
4701 20:09:19.623795 rx_firspass[0][0][15] = 0
4702 20:09:19.626934 rx_lastpass[0][0][15] = 0
4703 20:09:19.627031 rx_firspass[0][1][0] = 0
4704 20:09:19.630537 rx_lastpass[0][1][0] = 0
4705 20:09:19.633237 rx_firspass[0][1][1] = 0
4706 20:09:19.633332 rx_lastpass[0][1][1] = 0
4707 20:09:19.636610 rx_firspass[0][1][2] = 0
4708 20:09:19.639954 rx_lastpass[0][1][2] = 0
4709 20:09:19.640050 rx_firspass[0][1][3] = 0
4710 20:09:19.643432 rx_lastpass[0][1][3] = 0
4711 20:09:19.646953 rx_firspass[0][1][4] = 0
4712 20:09:19.649998 rx_lastpass[0][1][4] = 0
4713 20:09:19.650093 rx_firspass[0][1][5] = 0
4714 20:09:19.653294 rx_lastpass[0][1][5] = 0
4715 20:09:19.656559 rx_firspass[0][1][6] = 0
4716 20:09:19.656654 rx_lastpass[0][1][6] = 0
4717 20:09:19.659986 rx_firspass[0][1][7] = 0
4718 20:09:19.663715 rx_lastpass[0][1][7] = 0
4719 20:09:19.663812 rx_firspass[0][1][8] = 0
4720 20:09:19.667096 rx_lastpass[0][1][8] = 0
4721 20:09:19.669729 rx_firspass[0][1][9] = 0
4722 20:09:19.669822 rx_lastpass[0][1][9] = 0
4723 20:09:19.673169 rx_firspass[0][1][10] = 0
4724 20:09:19.676296 rx_lastpass[0][1][10] = 0
4725 20:09:19.679840 rx_firspass[0][1][11] = 0
4726 20:09:19.679939 rx_lastpass[0][1][11] = 0
4727 20:09:19.683435 rx_firspass[0][1][12] = 0
4728 20:09:19.686805 rx_lastpass[0][1][12] = 0
4729 20:09:19.686901 rx_firspass[0][1][13] = 0
4730 20:09:19.689848 rx_lastpass[0][1][13] = 0
4731 20:09:19.693675 rx_firspass[0][1][14] = 0
4732 20:09:19.696351 rx_lastpass[0][1][14] = 0
4733 20:09:19.696448 rx_firspass[0][1][15] = 0
4734 20:09:19.699600 rx_lastpass[0][1][15] = 0
4735 20:09:19.703265 rx_firspass[1][0][0] = 0
4736 20:09:19.703389 rx_lastpass[1][0][0] = 0
4737 20:09:19.706336 rx_firspass[1][0][1] = 0
4738 20:09:19.709548 rx_lastpass[1][0][1] = 0
4739 20:09:19.709646 rx_firspass[1][0][2] = 0
4740 20:09:19.713158 rx_lastpass[1][0][2] = 0
4741 20:09:19.716098 rx_firspass[1][0][3] = 0
4742 20:09:19.719416 rx_lastpass[1][0][3] = 0
4743 20:09:19.719521 rx_firspass[1][0][4] = 0
4744 20:09:19.722895 rx_lastpass[1][0][4] = 0
4745 20:09:19.726449 rx_firspass[1][0][5] = 0
4746 20:09:19.726552 rx_lastpass[1][0][5] = 0
4747 20:09:19.729753 rx_firspass[1][0][6] = 0
4748 20:09:19.733133 rx_lastpass[1][0][6] = 0
4749 20:09:19.733263 rx_firspass[1][0][7] = 0
4750 20:09:19.736622 rx_lastpass[1][0][7] = 0
4751 20:09:19.740041 rx_firspass[1][0][8] = 0
4752 20:09:19.740136 rx_lastpass[1][0][8] = 0
4753 20:09:19.742837 rx_firspass[1][0][9] = 0
4754 20:09:19.746147 rx_lastpass[1][0][9] = 0
4755 20:09:19.746253 rx_firspass[1][0][10] = 0
4756 20:09:19.749766 rx_lastpass[1][0][10] = 0
4757 20:09:19.753076 rx_firspass[1][0][11] = 0
4758 20:09:19.756596 rx_lastpass[1][0][11] = 0
4759 20:09:19.756693 rx_firspass[1][0][12] = 0
4760 20:09:19.759540 rx_lastpass[1][0][12] = 0
4761 20:09:19.763062 rx_firspass[1][0][13] = 0
4762 20:09:19.763157 rx_lastpass[1][0][13] = 0
4763 20:09:19.765991 rx_firspass[1][0][14] = 0
4764 20:09:19.769410 rx_lastpass[1][0][14] = 0
4765 20:09:19.772832 rx_firspass[1][0][15] = 0
4766 20:09:19.772931 rx_lastpass[1][0][15] = 0
4767 20:09:19.776089 rx_firspass[1][1][0] = 0
4768 20:09:19.779439 rx_lastpass[1][1][0] = 0
4769 20:09:19.779535 rx_firspass[1][1][1] = 0
4770 20:09:19.782609 rx_lastpass[1][1][1] = 0
4771 20:09:19.786016 rx_firspass[1][1][2] = 0
4772 20:09:19.786112 rx_lastpass[1][1][2] = 0
4773 20:09:19.789156 rx_firspass[1][1][3] = 0
4774 20:09:19.792882 rx_lastpass[1][1][3] = 0
4775 20:09:19.795922 rx_firspass[1][1][4] = 0
4776 20:09:19.796019 rx_lastpass[1][1][4] = 0
4777 20:09:19.799307 rx_firspass[1][1][5] = 0
4778 20:09:19.802876 rx_lastpass[1][1][5] = 0
4779 20:09:19.802973 rx_firspass[1][1][6] = 0
4780 20:09:19.805750 rx_lastpass[1][1][6] = 0
4781 20:09:19.809566 rx_firspass[1][1][7] = 0
4782 20:09:19.809665 rx_lastpass[1][1][7] = 0
4783 20:09:19.812772 rx_firspass[1][1][8] = 0
4784 20:09:19.816002 rx_lastpass[1][1][8] = 0
4785 20:09:19.816100 rx_firspass[1][1][9] = 0
4786 20:09:19.819603 rx_lastpass[1][1][9] = 0
4787 20:09:19.822442 rx_firspass[1][1][10] = 0
4788 20:09:19.825662 rx_lastpass[1][1][10] = 0
4789 20:09:19.825758 rx_firspass[1][1][11] = 0
4790 20:09:19.829291 rx_lastpass[1][1][11] = 0
4791 20:09:19.832223 rx_firspass[1][1][12] = 0
4792 20:09:19.832321 rx_lastpass[1][1][12] = 0
4793 20:09:19.835711 rx_firspass[1][1][13] = 0
4794 20:09:19.838972 rx_lastpass[1][1][13] = 0
4795 20:09:19.842371 rx_firspass[1][1][14] = 0
4796 20:09:19.842495 rx_lastpass[1][1][14] = 0
4797 20:09:19.845559 rx_firspass[1][1][15] = 0
4798 20:09:19.848822 rx_lastpass[1][1][15] = 0
4799 20:09:19.848947 dump params clk_delay
4800 20:09:19.852390 clk_delay[0] = 0
4801 20:09:19.852509 clk_delay[1] = 0
4802 20:09:19.855699 dump params dqs_delay
4803 20:09:19.855816 dqs_delay[0][0] = 0
4804 20:09:19.859169 dqs_delay[0][1] = 0
4805 20:09:19.862020 dqs_delay[1][0] = 0
4806 20:09:19.862139 dqs_delay[1][1] = 0
4807 20:09:19.865544 dump params delay_cell_unit = 735
4808 20:09:19.868394 dump source = 0x0
4809 20:09:19.868514 dump params frequency:800
4810 20:09:19.871840 dump params rank number:2
4811 20:09:19.871960
4812 20:09:19.875548 dump params write leveling
4813 20:09:19.878982 write leveling[0][0][0] = 0x0
4814 20:09:19.879102 write leveling[0][0][1] = 0x0
4815 20:09:19.881616 write leveling[0][1][0] = 0x0
4816 20:09:19.885118 write leveling[0][1][1] = 0x0
4817 20:09:19.888242 write leveling[1][0][0] = 0x0
4818 20:09:19.891524 write leveling[1][0][1] = 0x0
4819 20:09:19.891646 write leveling[1][1][0] = 0x0
4820 20:09:19.894965 write leveling[1][1][1] = 0x0
4821 20:09:19.898038 dump params cbt_cs
4822 20:09:19.898161 cbt_cs[0][0] = 0x0
4823 20:09:19.901427 cbt_cs[0][1] = 0x0
4824 20:09:19.901551 cbt_cs[1][0] = 0x0
4825 20:09:19.905029 cbt_cs[1][1] = 0x0
4826 20:09:19.905151 dump params cbt_mr12
4827 20:09:19.908884 cbt_mr12[0][0] = 0x0
4828 20:09:19.911427 cbt_mr12[0][1] = 0x0
4829 20:09:19.911547 cbt_mr12[1][0] = 0x0
4830 20:09:19.914911 cbt_mr12[1][1] = 0x0
4831 20:09:19.915032 dump params tx window
4832 20:09:19.918069 tx_center_min[0][0][0] = 0
4833 20:09:19.921541 tx_center_max[0][0][0] = 0
4834 20:09:19.921664 tx_center_min[0][0][1] = 0
4835 20:09:19.924931 tx_center_max[0][0][1] = 0
4836 20:09:19.928313 tx_center_min[0][1][0] = 0
4837 20:09:19.931366 tx_center_max[0][1][0] = 0
4838 20:09:19.931493 tx_center_min[0][1][1] = 0
4839 20:09:19.935036 tx_center_max[0][1][1] = 0
4840 20:09:19.937985 tx_center_min[1][0][0] = 0
4841 20:09:19.941482 tx_center_max[1][0][0] = 0
4842 20:09:19.941605 tx_center_min[1][0][1] = 0
4843 20:09:19.944688 tx_center_max[1][0][1] = 0
4844 20:09:19.948295 tx_center_min[1][1][0] = 0
4845 20:09:19.951374 tx_center_max[1][1][0] = 0
4846 20:09:19.951507 tx_center_min[1][1][1] = 0
4847 20:09:19.954910 tx_center_max[1][1][1] = 0
4848 20:09:19.957929 dump params tx window
4849 20:09:19.958107 tx_win_center[0][0][0] = 0
4850 20:09:19.961607 tx_first_pass[0][0][0] = 0
4851 20:09:19.965083 tx_last_pass[0][0][0] = 0
4852 20:09:19.967983 tx_win_center[0][0][1] = 0
4853 20:09:19.968102 tx_first_pass[0][0][1] = 0
4854 20:09:19.971707 tx_last_pass[0][0][1] = 0
4855 20:09:19.975008 tx_win_center[0][0][2] = 0
4856 20:09:19.975126 tx_first_pass[0][0][2] = 0
4857 20:09:19.977890 tx_last_pass[0][0][2] = 0
4858 20:09:19.981309 tx_win_center[0][0][3] = 0
4859 20:09:19.984881 tx_first_pass[0][0][3] = 0
4860 20:09:19.985000 tx_last_pass[0][0][3] = 0
4861 20:09:19.988415 tx_win_center[0][0][4] = 0
4862 20:09:19.991505 tx_first_pass[0][0][4] = 0
4863 20:09:19.994835 tx_last_pass[0][0][4] = 0
4864 20:09:19.994952 tx_win_center[0][0][5] = 0
4865 20:09:19.998253 tx_first_pass[0][0][5] = 0
4866 20:09:20.001400 tx_last_pass[0][0][5] = 0
4867 20:09:20.004479 tx_win_center[0][0][6] = 0
4868 20:09:20.004599 tx_first_pass[0][0][6] = 0
4869 20:09:20.008011 tx_last_pass[0][0][6] = 0
4870 20:09:20.011045 tx_win_center[0][0][7] = 0
4871 20:09:20.011164 tx_first_pass[0][0][7] = 0
4872 20:09:20.014583 tx_last_pass[0][0][7] = 0
4873 20:09:20.017776 tx_win_center[0][0][8] = 0
4874 20:09:20.021087 tx_first_pass[0][0][8] = 0
4875 20:09:20.021209 tx_last_pass[0][0][8] = 0
4876 20:09:20.024501 tx_win_center[0][0][9] = 0
4877 20:09:20.028109 tx_first_pass[0][0][9] = 0
4878 20:09:20.028229 tx_last_pass[0][0][9] = 0
4879 20:09:20.031115 tx_win_center[0][0][10] = 0
4880 20:09:20.034583 tx_first_pass[0][0][10] = 0
4881 20:09:20.037639 tx_last_pass[0][0][10] = 0
4882 20:09:20.041113 tx_win_center[0][0][11] = 0
4883 20:09:20.041232 tx_first_pass[0][0][11] = 0
4884 20:09:20.044625 tx_last_pass[0][0][11] = 0
4885 20:09:20.047709 tx_win_center[0][0][12] = 0
4886 20:09:20.051172 tx_first_pass[0][0][12] = 0
4887 20:09:20.051291 tx_last_pass[0][0][12] = 0
4888 20:09:20.054763 tx_win_center[0][0][13] = 0
4889 20:09:20.057580 tx_first_pass[0][0][13] = 0
4890 20:09:20.061297 tx_last_pass[0][0][13] = 0
4891 20:09:20.061433 tx_win_center[0][0][14] = 0
4892 20:09:20.064311 tx_first_pass[0][0][14] = 0
4893 20:09:20.067757 tx_last_pass[0][0][14] = 0
4894 20:09:20.070830 tx_win_center[0][0][15] = 0
4895 20:09:20.070954 tx_first_pass[0][0][15] = 0
4896 20:09:20.074411 tx_last_pass[0][0][15] = 0
4897 20:09:20.077792 tx_win_center[0][1][0] = 0
4898 20:09:20.081179 tx_first_pass[0][1][0] = 0
4899 20:09:20.081304 tx_last_pass[0][1][0] = 0
4900 20:09:20.084132 tx_win_center[0][1][1] = 0
4901 20:09:20.087511 tx_first_pass[0][1][1] = 0
4902 20:09:20.087631 tx_last_pass[0][1][1] = 0
4903 20:09:20.091002 tx_win_center[0][1][2] = 0
4904 20:09:20.094134 tx_first_pass[0][1][2] = 0
4905 20:09:20.097716 tx_last_pass[0][1][2] = 0
4906 20:09:20.097840 tx_win_center[0][1][3] = 0
4907 20:09:20.100975 tx_first_pass[0][1][3] = 0
4908 20:09:20.104505 tx_last_pass[0][1][3] = 0
4909 20:09:20.104629 tx_win_center[0][1][4] = 0
4910 20:09:20.107908 tx_first_pass[0][1][4] = 0
4911 20:09:20.111221 tx_last_pass[0][1][4] = 0
4912 20:09:20.114167 tx_win_center[0][1][5] = 0
4913 20:09:20.114290 tx_first_pass[0][1][5] = 0
4914 20:09:20.117435 tx_last_pass[0][1][5] = 0
4915 20:09:20.120931 tx_win_center[0][1][6] = 0
4916 20:09:20.124081 tx_first_pass[0][1][6] = 0
4917 20:09:20.124210 tx_last_pass[0][1][6] = 0
4918 20:09:20.127391 tx_win_center[0][1][7] = 0
4919 20:09:20.131066 tx_first_pass[0][1][7] = 0
4920 20:09:20.131189 tx_last_pass[0][1][7] = 0
4921 20:09:20.134107 tx_win_center[0][1][8] = 0
4922 20:09:20.137563 tx_first_pass[0][1][8] = 0
4923 20:09:20.140908 tx_last_pass[0][1][8] = 0
4924 20:09:20.141029 tx_win_center[0][1][9] = 0
4925 20:09:20.143868 tx_first_pass[0][1][9] = 0
4926 20:09:20.147385 tx_last_pass[0][1][9] = 0
4927 20:09:20.150683 tx_win_center[0][1][10] = 0
4928 20:09:20.150803 tx_first_pass[0][1][10] = 0
4929 20:09:20.154070 tx_last_pass[0][1][10] = 0
4930 20:09:20.157185 tx_win_center[0][1][11] = 0
4931 20:09:20.160384 tx_first_pass[0][1][11] = 0
4932 20:09:20.160502 tx_last_pass[0][1][11] = 0
4933 20:09:20.163975 tx_win_center[0][1][12] = 0
4934 20:09:20.167045 tx_first_pass[0][1][12] = 0
4935 20:09:20.170703 tx_last_pass[0][1][12] = 0
4936 20:09:20.170829 tx_win_center[0][1][13] = 0
4937 20:09:20.173876 tx_first_pass[0][1][13] = 0
4938 20:09:20.177197 tx_last_pass[0][1][13] = 0
4939 20:09:20.180123 tx_win_center[0][1][14] = 0
4940 20:09:20.180244 tx_first_pass[0][1][14] = 0
4941 20:09:20.183495 tx_last_pass[0][1][14] = 0
4942 20:09:20.186871 tx_win_center[0][1][15] = 0
4943 20:09:20.190176 tx_first_pass[0][1][15] = 0
4944 20:09:20.190305 tx_last_pass[0][1][15] = 0
4945 20:09:20.193954 tx_win_center[1][0][0] = 0
4946 20:09:20.197235 tx_first_pass[1][0][0] = 0
4947 20:09:20.200512 tx_last_pass[1][0][0] = 0
4948 20:09:20.200635 tx_win_center[1][0][1] = 0
4949 20:09:20.203759 tx_first_pass[1][0][1] = 0
4950 20:09:20.206904 tx_last_pass[1][0][1] = 0
4951 20:09:20.210415 tx_win_center[1][0][2] = 0
4952 20:09:20.210540 tx_first_pass[1][0][2] = 0
4953 20:09:20.213631 tx_last_pass[1][0][2] = 0
4954 20:09:20.216852 tx_win_center[1][0][3] = 0
4955 20:09:20.216977 tx_first_pass[1][0][3] = 0
4956 20:09:20.220306 tx_last_pass[1][0][3] = 0
4957 20:09:20.223666 tx_win_center[1][0][4] = 0
4958 20:09:20.227082 tx_first_pass[1][0][4] = 0
4959 20:09:20.227205 tx_last_pass[1][0][4] = 0
4960 20:09:20.230000 tx_win_center[1][0][5] = 0
4961 20:09:20.233392 tx_first_pass[1][0][5] = 0
4962 20:09:20.236751 tx_last_pass[1][0][5] = 0
4963 20:09:20.236874 tx_win_center[1][0][6] = 0
4964 20:09:20.239898 tx_first_pass[1][0][6] = 0
4965 20:09:20.243371 tx_last_pass[1][0][6] = 0
4966 20:09:20.243498 tx_win_center[1][0][7] = 0
4967 20:09:20.246729 tx_first_pass[1][0][7] = 0
4968 20:09:20.250100 tx_last_pass[1][0][7] = 0
4969 20:09:20.253610 tx_win_center[1][0][8] = 0
4970 20:09:20.253708 tx_first_pass[1][0][8] = 0
4971 20:09:20.256380 tx_last_pass[1][0][8] = 0
4972 20:09:20.259842 tx_win_center[1][0][9] = 0
4973 20:09:20.263328 tx_first_pass[1][0][9] = 0
4974 20:09:20.263465 tx_last_pass[1][0][9] = 0
4975 20:09:20.266739 tx_win_center[1][0][10] = 0
4976 20:09:20.270145 tx_first_pass[1][0][10] = 0
4977 20:09:20.270239 tx_last_pass[1][0][10] = 0
4978 20:09:20.273467 tx_win_center[1][0][11] = 0
4979 20:09:20.277054 tx_first_pass[1][0][11] = 0
4980 20:09:20.280083 tx_last_pass[1][0][11] = 0
4981 20:09:20.280180 tx_win_center[1][0][12] = 0
4982 20:09:20.283301 tx_first_pass[1][0][12] = 0
4983 20:09:20.286741 tx_last_pass[1][0][12] = 0
4984 20:09:20.290046 tx_win_center[1][0][13] = 0
4985 20:09:20.293139 tx_first_pass[1][0][13] = 0
4986 20:09:20.293236 tx_last_pass[1][0][13] = 0
4987 20:09:20.296428 tx_win_center[1][0][14] = 0
4988 20:09:20.299933 tx_first_pass[1][0][14] = 0
4989 20:09:20.303098 tx_last_pass[1][0][14] = 0
4990 20:09:20.303196 tx_win_center[1][0][15] = 0
4991 20:09:20.306560 tx_first_pass[1][0][15] = 0
4992 20:09:20.309702 tx_last_pass[1][0][15] = 0
4993 20:09:20.313147 tx_win_center[1][1][0] = 0
4994 20:09:20.313252 tx_first_pass[1][1][0] = 0
4995 20:09:20.316657 tx_last_pass[1][1][0] = 0
4996 20:09:20.320005 tx_win_center[1][1][1] = 0
4997 20:09:20.320109 tx_first_pass[1][1][1] = 0
4998 20:09:20.323234 tx_last_pass[1][1][1] = 0
4999 20:09:20.326562 tx_win_center[1][1][2] = 0
5000 20:09:20.329782 tx_first_pass[1][1][2] = 0
5001 20:09:20.329882 tx_last_pass[1][1][2] = 0
5002 20:09:20.333366 tx_win_center[1][1][3] = 0
5003 20:09:20.336138 tx_first_pass[1][1][3] = 0
5004 20:09:20.339530 tx_last_pass[1][1][3] = 0
5005 20:09:20.339622 tx_win_center[1][1][4] = 0
5006 20:09:20.342748 tx_first_pass[1][1][4] = 0
5007 20:09:20.346095 tx_last_pass[1][1][4] = 0
5008 20:09:20.346242 tx_win_center[1][1][5] = 0
5009 20:09:20.349817 tx_first_pass[1][1][5] = 0
5010 20:09:20.352532 tx_last_pass[1][1][5] = 0
5011 20:09:20.355900 tx_win_center[1][1][6] = 0
5012 20:09:20.356063 tx_first_pass[1][1][6] = 0
5013 20:09:20.359264 tx_last_pass[1][1][6] = 0
5014 20:09:20.362568 tx_win_center[1][1][7] = 0
5015 20:09:20.366114 tx_first_pass[1][1][7] = 0
5016 20:09:20.366240 tx_last_pass[1][1][7] = 0
5017 20:09:20.369609 tx_win_center[1][1][8] = 0
5018 20:09:20.372591 tx_first_pass[1][1][8] = 0
5019 20:09:20.372714 tx_last_pass[1][1][8] = 0
5020 20:09:20.376244 tx_win_center[1][1][9] = 0
5021 20:09:20.379107 tx_first_pass[1][1][9] = 0
5022 20:09:20.382478 tx_last_pass[1][1][9] = 0
5023 20:09:20.382601 tx_win_center[1][1][10] = 0
5024 20:09:20.386184 tx_first_pass[1][1][10] = 0
5025 20:09:20.389485 tx_last_pass[1][1][10] = 0
5026 20:09:20.392717 tx_win_center[1][1][11] = 0
5027 20:09:20.392842 tx_first_pass[1][1][11] = 0
5028 20:09:20.396092 tx_last_pass[1][1][11] = 0
5029 20:09:20.399299 tx_win_center[1][1][12] = 0
5030 20:09:20.402763 tx_first_pass[1][1][12] = 0
5031 20:09:20.402892 tx_last_pass[1][1][12] = 0
5032 20:09:20.405847 tx_win_center[1][1][13] = 0
5033 20:09:20.409154 tx_first_pass[1][1][13] = 0
5034 20:09:20.412321 tx_last_pass[1][1][13] = 0
5035 20:09:20.412447 tx_win_center[1][1][14] = 0
5036 20:09:20.415569 tx_first_pass[1][1][14] = 0
5037 20:09:20.419641 tx_last_pass[1][1][14] = 0
5038 20:09:20.422411 tx_win_center[1][1][15] = 0
5039 20:09:20.425486 tx_first_pass[1][1][15] = 0
5040 20:09:20.425607 tx_last_pass[1][1][15] = 0
5041 20:09:20.429287 dump params rx window
5042 20:09:20.429410 rx_firspass[0][0][0] = 0
5043 20:09:20.432351 rx_lastpass[0][0][0] = 0
5044 20:09:20.435629 rx_firspass[0][0][1] = 0
5045 20:09:20.439101 rx_lastpass[0][0][1] = 0
5046 20:09:20.439222 rx_firspass[0][0][2] = 0
5047 20:09:20.442594 rx_lastpass[0][0][2] = 0
5048 20:09:20.445563 rx_firspass[0][0][3] = 0
5049 20:09:20.445683 rx_lastpass[0][0][3] = 0
5050 20:09:20.449054 rx_firspass[0][0][4] = 0
5051 20:09:20.452312 rx_lastpass[0][0][4] = 0
5052 20:09:20.452436 rx_firspass[0][0][5] = 0
5053 20:09:20.455952 rx_lastpass[0][0][5] = 0
5054 20:09:20.458787 rx_firspass[0][0][6] = 0
5055 20:09:20.458910 rx_lastpass[0][0][6] = 0
5056 20:09:20.462290 rx_firspass[0][0][7] = 0
5057 20:09:20.465637 rx_lastpass[0][0][7] = 0
5058 20:09:20.465759 rx_firspass[0][0][8] = 0
5059 20:09:20.468975 rx_lastpass[0][0][8] = 0
5060 20:09:20.472631 rx_firspass[0][0][9] = 0
5061 20:09:20.475491 rx_lastpass[0][0][9] = 0
5062 20:09:20.475611 rx_firspass[0][0][10] = 0
5063 20:09:20.479376 rx_lastpass[0][0][10] = 0
5064 20:09:20.482630 rx_firspass[0][0][11] = 0
5065 20:09:20.482752 rx_lastpass[0][0][11] = 0
5066 20:09:20.485589 rx_firspass[0][0][12] = 0
5067 20:09:20.489048 rx_lastpass[0][0][12] = 0
5068 20:09:20.489168 rx_firspass[0][0][13] = 0
5069 20:09:20.492585 rx_lastpass[0][0][13] = 0
5070 20:09:20.495611 rx_firspass[0][0][14] = 0
5071 20:09:20.499089 rx_lastpass[0][0][14] = 0
5072 20:09:20.499210 rx_firspass[0][0][15] = 0
5073 20:09:20.502031 rx_lastpass[0][0][15] = 0
5074 20:09:20.505912 rx_firspass[0][1][0] = 0
5075 20:09:20.506035 rx_lastpass[0][1][0] = 0
5076 20:09:20.509264 rx_firspass[0][1][1] = 0
5077 20:09:20.511979 rx_lastpass[0][1][1] = 0
5078 20:09:20.515793 rx_firspass[0][1][2] = 0
5079 20:09:20.515919 rx_lastpass[0][1][2] = 0
5080 20:09:20.518964 rx_firspass[0][1][3] = 0
5081 20:09:20.522057 rx_lastpass[0][1][3] = 0
5082 20:09:20.522180 rx_firspass[0][1][4] = 0
5083 20:09:20.525331 rx_lastpass[0][1][4] = 0
5084 20:09:20.528675 rx_firspass[0][1][5] = 0
5085 20:09:20.528796 rx_lastpass[0][1][5] = 0
5086 20:09:20.532067 rx_firspass[0][1][6] = 0
5087 20:09:20.535423 rx_lastpass[0][1][6] = 0
5088 20:09:20.535546 rx_firspass[0][1][7] = 0
5089 20:09:20.538941 rx_lastpass[0][1][7] = 0
5090 20:09:20.542441 rx_firspass[0][1][8] = 0
5091 20:09:20.542562 rx_lastpass[0][1][8] = 0
5092 20:09:20.545651 rx_firspass[0][1][9] = 0
5093 20:09:20.548485 rx_lastpass[0][1][9] = 0
5094 20:09:20.552078 rx_firspass[0][1][10] = 0
5095 20:09:20.552201 rx_lastpass[0][1][10] = 0
5096 20:09:20.555334 rx_firspass[0][1][11] = 0
5097 20:09:20.558736 rx_lastpass[0][1][11] = 0
5098 20:09:20.558855 rx_firspass[0][1][12] = 0
5099 20:09:20.561951 rx_lastpass[0][1][12] = 0
5100 20:09:20.565159 rx_firspass[0][1][13] = 0
5101 20:09:20.568326 rx_lastpass[0][1][13] = 0
5102 20:09:20.568445 rx_firspass[0][1][14] = 0
5103 20:09:20.571906 rx_lastpass[0][1][14] = 0
5104 20:09:20.575178 rx_firspass[0][1][15] = 0
5105 20:09:20.575295 rx_lastpass[0][1][15] = 0
5106 20:09:20.578808 rx_firspass[1][0][0] = 0
5107 20:09:20.581974 rx_lastpass[1][0][0] = 0
5108 20:09:20.582093 rx_firspass[1][0][1] = 0
5109 20:09:20.585242 rx_lastpass[1][0][1] = 0
5110 20:09:20.588938 rx_firspass[1][0][2] = 0
5111 20:09:20.591775 rx_lastpass[1][0][2] = 0
5112 20:09:20.591893 rx_firspass[1][0][3] = 0
5113 20:09:20.594966 rx_lastpass[1][0][3] = 0
5114 20:09:20.598358 rx_firspass[1][0][4] = 0
5115 20:09:20.598477 rx_lastpass[1][0][4] = 0
5116 20:09:20.601588 rx_firspass[1][0][5] = 0
5117 20:09:20.605226 rx_lastpass[1][0][5] = 0
5118 20:09:20.605346 rx_firspass[1][0][6] = 0
5119 20:09:20.608336 rx_lastpass[1][0][6] = 0
5120 20:09:20.612127 rx_firspass[1][0][7] = 0
5121 20:09:20.612252 rx_lastpass[1][0][7] = 0
5122 20:09:20.615415 rx_firspass[1][0][8] = 0
5123 20:09:20.618231 rx_lastpass[1][0][8] = 0
5124 20:09:20.618350 rx_firspass[1][0][9] = 0
5125 20:09:20.621593 rx_lastpass[1][0][9] = 0
5126 20:09:20.624941 rx_firspass[1][0][10] = 0
5127 20:09:20.628142 rx_lastpass[1][0][10] = 0
5128 20:09:20.628261 rx_firspass[1][0][11] = 0
5129 20:09:20.631738 rx_lastpass[1][0][11] = 0
5130 20:09:20.635263 rx_firspass[1][0][12] = 0
5131 20:09:20.635383 rx_lastpass[1][0][12] = 0
5132 20:09:20.638561 rx_firspass[1][0][13] = 0
5133 20:09:20.641889 rx_lastpass[1][0][13] = 0
5134 20:09:20.645202 rx_firspass[1][0][14] = 0
5135 20:09:20.645323 rx_lastpass[1][0][14] = 0
5136 20:09:20.648490 rx_firspass[1][0][15] = 0
5137 20:09:20.651843 rx_lastpass[1][0][15] = 0
5138 20:09:20.651965 rx_firspass[1][1][0] = 0
5139 20:09:20.655366 rx_lastpass[1][1][0] = 0
5140 20:09:20.658100 rx_firspass[1][1][1] = 0
5141 20:09:20.658216 rx_lastpass[1][1][1] = 0
5142 20:09:20.661464 rx_firspass[1][1][2] = 0
5143 20:09:20.665591 rx_lastpass[1][1][2] = 0
5144 20:09:20.665714 rx_firspass[1][1][3] = 0
5145 20:09:20.668286 rx_lastpass[1][1][3] = 0
5146 20:09:20.671468 rx_firspass[1][1][4] = 0
5147 20:09:20.675330 rx_lastpass[1][1][4] = 0
5148 20:09:20.675482 rx_firspass[1][1][5] = 0
5149 20:09:20.678250 rx_lastpass[1][1][5] = 0
5150 20:09:20.681873 rx_firspass[1][1][6] = 0
5151 20:09:20.682037 rx_lastpass[1][1][6] = 0
5152 20:09:20.685162 rx_firspass[1][1][7] = 0
5153 20:09:20.688558 rx_lastpass[1][1][7] = 0
5154 20:09:20.688677 rx_firspass[1][1][8] = 0
5155 20:09:20.691316 rx_lastpass[1][1][8] = 0
5156 20:09:20.694765 rx_firspass[1][1][9] = 0
5157 20:09:20.694885 rx_lastpass[1][1][9] = 0
5158 20:09:20.698249 rx_firspass[1][1][10] = 0
5159 20:09:20.701699 rx_lastpass[1][1][10] = 0
5160 20:09:20.704904 rx_firspass[1][1][11] = 0
5161 20:09:20.705024 rx_lastpass[1][1][11] = 0
5162 20:09:20.708022 rx_firspass[1][1][12] = 0
5163 20:09:20.711287 rx_lastpass[1][1][12] = 0
5164 20:09:20.711429 rx_firspass[1][1][13] = 0
5165 20:09:20.714642 rx_lastpass[1][1][13] = 0
5166 20:09:20.718605 rx_firspass[1][1][14] = 0
5167 20:09:20.721406 rx_lastpass[1][1][14] = 0
5168 20:09:20.721528 rx_firspass[1][1][15] = 0
5169 20:09:20.724778 rx_lastpass[1][1][15] = 0
5170 20:09:20.728106 dump params clk_delay
5171 20:09:20.728224 clk_delay[0] = 0
5172 20:09:20.728325 clk_delay[1] = 0
5173 20:09:20.731593 dump params dqs_delay
5174 20:09:20.734802 dqs_delay[0][0] = 0
5175 20:09:20.734954 dqs_delay[0][1] = 0
5176 20:09:20.738429 dqs_delay[1][0] = 0
5177 20:09:20.738545 dqs_delay[1][1] = 0
5178 20:09:20.741338 dump params delay_cell_unit = 735
5179 20:09:20.745101 mt_set_emi_preloader end
5180 20:09:20.747905 [mt_mem_init] dram size: 0x100000000, rank number: 2
5181 20:09:20.754762 [complex_mem_test] start addr:0x40000000, len:20480
5182 20:09:20.790352 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5183 20:09:20.797295 [complex_mem_test] start addr:0x80000000, len:20480
5184 20:09:20.832749 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5185 20:09:20.839025 [complex_mem_test] start addr:0xc0000000, len:20480
5186 20:09:20.874982 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5187 20:09:20.881337 [complex_mem_test] start addr:0x56000000, len:8192
5188 20:09:20.898079 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5189 20:09:20.898277 ddr_geometry:1
5190 20:09:20.904888 [complex_mem_test] start addr:0x80000000, len:8192
5191 20:09:20.921911 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5192 20:09:20.925074 dram_init: dram init end (result: 0)
5193 20:09:20.932025 Successfully loaded DRAM blobs and ran DRAM calibration
5194 20:09:20.941689 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5195 20:09:20.941864 CBMEM:
5196 20:09:20.945013 IMD: root @ 00000000fffff000 254 entries.
5197 20:09:20.948415 IMD: root @ 00000000ffffec00 62 entries.
5198 20:09:20.954908 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5199 20:09:20.961823 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5200 20:09:20.965243 in-header: 03 a1 00 00 08 00 00 00
5201 20:09:20.968393 in-data: 84 60 60 10 00 00 00 00
5202 20:09:20.971646 Chrome EC: clear events_b mask to 0x0000000020004000
5203 20:09:20.978973 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5204 20:09:20.982543 in-header: 03 fd 00 00 00 00 00 00
5205 20:09:20.982680 in-data:
5206 20:09:20.988870 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5207 20:09:20.989012 CBFS @ 21000 size 3d4000
5208 20:09:20.995736 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5209 20:09:20.998854 CBFS: Locating 'fallback/ramstage'
5210 20:09:21.002207 CBFS: Found @ offset 10d40 size d563
5211 20:09:21.023642 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5212 20:09:21.036035 Accumulated console time in romstage 13581 ms
5213 20:09:21.036222
5214 20:09:21.036336
5215 20:09:21.045958 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5216 20:09:21.049378 ARM64: Exception handlers installed.
5217 20:09:21.049515 ARM64: Testing exception
5218 20:09:21.052440 ARM64: Done test exception
5219 20:09:21.056430 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5220 20:09:21.059156 Manufacturer: ef
5221 20:09:21.062438 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5222 20:09:21.068978 WARNING: RO_VPD is uninitialized or empty.
5223 20:09:21.072696 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5224 20:09:21.075643 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5225 20:09:21.085515 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5226 20:09:21.089143 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5227 20:09:21.095496 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5228 20:09:21.095641 Enumerating buses...
5229 20:09:21.102549 Show all devs... Before device enumeration.
5230 20:09:21.102693 Root Device: enabled 1
5231 20:09:21.105489 CPU_CLUSTER: 0: enabled 1
5232 20:09:21.105610 CPU: 00: enabled 1
5233 20:09:21.108872 Compare with tree...
5234 20:09:21.112458 Root Device: enabled 1
5235 20:09:21.112579 CPU_CLUSTER: 0: enabled 1
5236 20:09:21.115971 CPU: 00: enabled 1
5237 20:09:21.118697 Root Device scanning...
5238 20:09:21.118815 root_dev_scan_bus for Root Device
5239 20:09:21.122131 CPU_CLUSTER: 0 enabled
5240 20:09:21.125769 root_dev_scan_bus for Root Device done
5241 20:09:21.131916 scan_bus: scanning of bus Root Device took 10689 usecs
5242 20:09:21.132057 done
5243 20:09:21.135420 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5244 20:09:21.139024 Allocating resources...
5245 20:09:21.139147 Reading resources...
5246 20:09:21.145388 Root Device read_resources bus 0 link: 0
5247 20:09:21.148530 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5248 20:09:21.151950 CPU: 00 missing read_resources
5249 20:09:21.155181 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5250 20:09:21.158880 Root Device read_resources bus 0 link: 0 done
5251 20:09:21.162092 Done reading resources.
5252 20:09:21.165370 Show resources in subtree (Root Device)...After reading.
5253 20:09:21.168766 Root Device child on link 0 CPU_CLUSTER: 0
5254 20:09:21.171667 CPU_CLUSTER: 0 child on link 0 CPU: 00
5255 20:09:21.182046 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5256 20:09:21.182229 CPU: 00
5257 20:09:21.185021 Setting resources...
5258 20:09:21.188322 Root Device assign_resources, bus 0 link: 0
5259 20:09:21.191649 CPU_CLUSTER: 0 missing set_resources
5260 20:09:21.195271 Root Device assign_resources, bus 0 link: 0
5261 20:09:21.198383 Done setting resources.
5262 20:09:21.204827 Show resources in subtree (Root Device)...After assigning values.
5263 20:09:21.208248 Root Device child on link 0 CPU_CLUSTER: 0
5264 20:09:21.211736 CPU_CLUSTER: 0 child on link 0 CPU: 00
5265 20:09:21.221685 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5266 20:09:21.221898 CPU: 00
5267 20:09:21.224706 Done allocating resources.
5268 20:09:21.228308 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5269 20:09:21.231518 Enabling resources...
5270 20:09:21.231683 done.
5271 20:09:21.234627 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5272 20:09:21.237770 Initializing devices...
5273 20:09:21.237909 Root Device init ...
5274 20:09:21.244557 mainboard_init: Starting display init.
5275 20:09:21.244710 ADC[4]: Raw value=75746 ID=0
5276 20:09:21.268220 anx7625_power_on_init: Init interface.
5277 20:09:21.271613 anx7625_disable_pd_protocol: Disabled PD feature.
5278 20:09:21.278202 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5279 20:09:21.325157 anx7625_start_dp_work: Secure OCM version=00
5280 20:09:21.328324 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5281 20:09:21.345714 sp_tx_get_edid_block: EDID Block = 1
5282 20:09:21.462644 Extracted contents:
5283 20:09:21.465888 header: 00 ff ff ff ff ff ff 00
5284 20:09:21.469313 serial number: 06 af 5c 14 00 00 00 00 00 1a
5285 20:09:21.472879 version: 01 04
5286 20:09:21.475969 basic params: 95 1a 0e 78 02
5287 20:09:21.479370 chroma info: 99 85 95 55 56 92 28 22 50 54
5288 20:09:21.482771 established: 00 00 00
5289 20:09:21.489062 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5290 20:09:21.492804 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5291 20:09:21.499679 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5292 20:09:21.505595 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5293 20:09:21.512409 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5294 20:09:21.515681 extensions: 00
5295 20:09:21.515819 checksum: ae
5296 20:09:21.515926
5297 20:09:21.519301 Manufacturer: AUO Model 145c Serial Number 0
5298 20:09:21.522341 Made week 0 of 2016
5299 20:09:21.522463 EDID version: 1.4
5300 20:09:21.526056 Digital display
5301 20:09:21.529402 6 bits per primary color channel
5302 20:09:21.529530 DisplayPort interface
5303 20:09:21.532514 Maximum image size: 26 cm x 14 cm
5304 20:09:21.535623 Gamma: 220%
5305 20:09:21.535744 Check DPMS levels
5306 20:09:21.539174 Supported color formats: RGB 4:4:4
5307 20:09:21.542705 First detailed timing is preferred timing
5308 20:09:21.545545 Established timings supported:
5309 20:09:21.548944 Standard timings supported:
5310 20:09:21.549066 Detailed timings
5311 20:09:21.555461 Hex of detail: ce1d56ea50001a3030204600009010000018
5312 20:09:21.559098 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5313 20:09:21.562509 0556 0586 05a6 0640 hborder 0
5314 20:09:21.565626 0300 0304 030a 031a vborder 0
5315 20:09:21.568976 -hsync -vsync
5316 20:09:21.572170 Did detailed timing
5317 20:09:21.575512 Hex of detail: 0000000f0000000000000000000000000020
5318 20:09:21.578784 Manufacturer-specified data, tag 15
5319 20:09:21.585374 Hex of detail: 000000fe0041554f0a202020202020202020
5320 20:09:21.585552 ASCII string: AUO
5321 20:09:21.589115 Hex of detail: 000000fe004231313658414230312e34200a
5322 20:09:21.592211 ASCII string: B116XAB01.4
5323 20:09:21.592359 Checksum
5324 20:09:21.595710 Checksum: 0xae (valid)
5325 20:09:21.602236 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5326 20:09:21.602384 DSI data_rate: 457800000 bps
5327 20:09:21.609535 anx7625_parse_edid: set default k value to 0x3d for panel
5328 20:09:21.612871 anx7625_parse_edid: pixelclock(76300).
5329 20:09:21.616101 hactive(1366), hsync(32), hfp(48), hbp(154)
5330 20:09:21.619814 vactive(768), vsync(6), vfp(4), vbp(16)
5331 20:09:21.622752 anx7625_dsi_config: config dsi.
5332 20:09:21.631179 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5333 20:09:21.651990 anx7625_dsi_config: success to config DSI
5334 20:09:21.655567 anx7625_dp_start: MIPI phy setup OK.
5335 20:09:21.658500 [SSUSB] Setting up USB HOST controller...
5336 20:09:21.662348 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5337 20:09:21.662473 [SSUSB] phy power-on done.
5338 20:09:21.669272 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5339 20:09:21.672928 in-header: 03 fc 01 00 00 00 00 00
5340 20:09:21.673075 in-data:
5341 20:09:21.675818 handle_proto3_response: EC response with error code: 1
5342 20:09:21.678950 SPM: pcm index = 1
5343 20:09:21.682366 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5344 20:09:21.685689 CBFS @ 21000 size 3d4000
5345 20:09:21.692748 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5346 20:09:21.695991 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5347 20:09:21.699092 CBFS: Found @ offset 1e7c0 size 1026
5348 20:09:21.706043 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5349 20:09:21.709217 SPM: binary array size = 2988
5350 20:09:21.712941 SPM: version = pcm_allinone_v1.17.2_20180829
5351 20:09:21.715552 SPM binary loaded in 32 msecs
5352 20:09:21.722967 spm_kick_im_to_fetch: ptr = 000000004021eec2
5353 20:09:21.726216 spm_kick_im_to_fetch: len = 2988
5354 20:09:21.726347 SPM: spm_kick_pcm_to_run
5355 20:09:21.729922 SPM: spm_kick_pcm_to_run done
5356 20:09:21.733197 SPM: spm_init done in 52 msecs
5357 20:09:21.736431 Root Device init finished in 494979 usecs
5358 20:09:21.740114 CPU_CLUSTER: 0 init ...
5359 20:09:21.749626 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5360 20:09:21.752847 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5361 20:09:21.756166 CBFS @ 21000 size 3d4000
5362 20:09:21.759700 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5363 20:09:21.763098 CBFS: Locating 'sspm.bin'
5364 20:09:21.766684 CBFS: Found @ offset 208c0 size 41cb
5365 20:09:21.776066 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5366 20:09:21.784448 CPU_CLUSTER: 0 init finished in 42801 usecs
5367 20:09:21.784622 Devices initialized
5368 20:09:21.787693 Show all devs... After init.
5369 20:09:21.790740 Root Device: enabled 1
5370 20:09:21.790866 CPU_CLUSTER: 0: enabled 1
5371 20:09:21.794260 CPU: 00: enabled 1
5372 20:09:21.797546 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5373 20:09:21.801003 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5374 20:09:21.803777 ELOG: NV offset 0x558000 size 0x1000
5375 20:09:21.811542 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5376 20:09:21.818181 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5377 20:09:21.821490 ELOG: Event(17) added with size 13 at 2024-05-28 20:08:25 UTC
5378 20:09:21.828242 out: cmd=0x121: 03 db 21 01 00 00 00 00
5379 20:09:21.831592 in-header: 03 f9 00 00 2c 00 00 00
5380 20:09:21.841421 in-data: 42 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 ac 1b 02 00 06 80 00 00 51 db 02 00 06 80 00 00 eb 0d 01 00 06 80 00 00 f1 3e 02 00
5381 20:09:21.845029 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5382 20:09:21.847980 in-header: 03 19 00 00 08 00 00 00
5383 20:09:21.851150 in-data: a2 e0 47 00 13 00 00 00
5384 20:09:21.854384 Chrome EC: UHEPI supported
5385 20:09:21.861377 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5386 20:09:21.864351 in-header: 03 e1 00 00 08 00 00 00
5387 20:09:21.867723 in-data: 84 20 60 10 00 00 00 00
5388 20:09:21.870918 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5389 20:09:21.877888 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5390 20:09:21.881089 in-header: 03 e1 00 00 08 00 00 00
5391 20:09:21.884581 in-data: 84 20 60 10 00 00 00 00
5392 20:09:21.890973 ELOG: Event(A1) added with size 10 at 2024-05-28 20:08:25 UTC
5393 20:09:21.897830 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5394 20:09:21.904546 ELOG: Event(A0) added with size 9 at 2024-05-28 20:08:25 UTC
5395 20:09:21.907590 elog_add_boot_reason: Logged dev mode boot
5396 20:09:21.907738 Finalize devices...
5397 20:09:21.910960 Devices finalized
5398 20:09:21.914498 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5399 20:09:21.921201 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5400 20:09:21.924182 ELOG: Event(91) added with size 10 at 2024-05-28 20:08:25 UTC
5401 20:09:21.927678 Writing coreboot table at 0xffeda000
5402 20:09:21.934579 0. 0000000000114000-000000000011efff: RAMSTAGE
5403 20:09:21.937680 1. 0000000040000000-000000004023cfff: RAMSTAGE
5404 20:09:21.940950 2. 000000004023d000-00000000545fffff: RAM
5405 20:09:21.944267 3. 0000000054600000-000000005465ffff: BL31
5406 20:09:21.947739 4. 0000000054660000-00000000ffed9fff: RAM
5407 20:09:21.954157 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5408 20:09:21.957546 6. 0000000100000000-000000013fffffff: RAM
5409 20:09:21.961015 Passing 5 GPIOs to payload:
5410 20:09:21.964118 NAME | PORT | POLARITY | VALUE
5411 20:09:21.970740 write protect | 0x00000096 | low | high
5412 20:09:21.974735 EC in RW | 0x000000b1 | high | undefined
5413 20:09:21.977461 EC interrupt | 0x00000097 | low | undefined
5414 20:09:21.984354 TPM interrupt | 0x00000099 | high | undefined
5415 20:09:21.987534 speaker enable | 0x000000af | high | undefined
5416 20:09:21.990865 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5417 20:09:21.994051 in-header: 03 f7 00 00 02 00 00 00
5418 20:09:21.997319 in-data: 04 00
5419 20:09:21.997450 Board ID: 4
5420 20:09:22.000761 ADC[3]: Raw value=215504 ID=1
5421 20:09:22.000886 RAM code: 1
5422 20:09:22.000994 SKU ID: 16
5423 20:09:22.007148 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5424 20:09:22.007287 CBFS @ 21000 size 3d4000
5425 20:09:22.014476 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5426 20:09:22.020727 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 77fe
5427 20:09:22.024018 coreboot table: 940 bytes.
5428 20:09:22.027553 IMD ROOT 0. 00000000fffff000 00001000
5429 20:09:22.030998 IMD SMALL 1. 00000000ffffe000 00001000
5430 20:09:22.033963 CONSOLE 2. 00000000fffde000 00020000
5431 20:09:22.037457 FMAP 3. 00000000fffdd000 0000047c
5432 20:09:22.040916 TIME STAMP 4. 00000000fffdc000 00000910
5433 20:09:22.043886 RAMOOPS 5. 00000000ffedc000 00100000
5434 20:09:22.047382 COREBOOT 6. 00000000ffeda000 00002000
5435 20:09:22.050711 IMD small region:
5436 20:09:22.053954 IMD ROOT 0. 00000000ffffec00 00000400
5437 20:09:22.056875 VBOOT WORK 1. 00000000ffffeb00 00000100
5438 20:09:22.060287 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5439 20:09:22.063901 VPD 3. 00000000ffffea60 0000006c
5440 20:09:22.070517 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5441 20:09:22.077130 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5442 20:09:22.080516 in-header: 03 e1 00 00 08 00 00 00
5443 20:09:22.083805 in-data: 84 20 60 10 00 00 00 00
5444 20:09:22.087234 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5445 20:09:22.090605 CBFS @ 21000 size 3d4000
5446 20:09:22.093731 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5447 20:09:22.097319 CBFS: Locating 'fallback/payload'
5448 20:09:22.106191 CBFS: Found @ offset dc040 size 439a0
5449 20:09:22.193549 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5450 20:09:22.197369 Checking segment from ROM address 0x0000000040003a00
5451 20:09:22.203621 Checking segment from ROM address 0x0000000040003a1c
5452 20:09:22.206864 Loading segment from ROM address 0x0000000040003a00
5453 20:09:22.210579 code (compression=0)
5454 20:09:22.220334 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5455 20:09:22.227013 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5456 20:09:22.230605 it's not compressed!
5457 20:09:22.233925 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5458 20:09:22.240174 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5459 20:09:22.248157 Loading segment from ROM address 0x0000000040003a1c
5460 20:09:22.251666 Entry Point 0x0000000080000000
5461 20:09:22.251843 Loaded segments
5462 20:09:22.258009 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5463 20:09:22.261376 Jumping to boot code at 0000000080000000(00000000ffeda000)
5464 20:09:22.271812 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5465 20:09:22.274873 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5466 20:09:22.278382 CBFS @ 21000 size 3d4000
5467 20:09:22.285120 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5468 20:09:22.285292 CBFS: Locating 'fallback/bl31'
5469 20:09:22.288633 CBFS: Found @ offset 36dc0 size 5820
5470 20:09:22.302096 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5471 20:09:22.305462 Checking segment from ROM address 0x0000000040003a00
5472 20:09:22.312253 Checking segment from ROM address 0x0000000040003a1c
5473 20:09:22.315694 Loading segment from ROM address 0x0000000040003a00
5474 20:09:22.319187 code (compression=1)
5475 20:09:22.325234 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5476 20:09:22.334996 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5477 20:09:22.335181 using LZMA
5478 20:09:22.344371 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5479 20:09:22.350523 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5480 20:09:22.353891 Loading segment from ROM address 0x0000000040003a1c
5481 20:09:22.357290 Entry Point 0x0000000054601000
5482 20:09:22.357421 Loaded segments
5483 20:09:22.360212 NOTICE: MT8183 bl31_setup
5484 20:09:22.367610 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5485 20:09:22.371521 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5486 20:09:22.374254 INFO: [DEVAPC] dump DEVAPC registers:
5487 20:09:22.384426 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5488 20:09:22.390694 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5489 20:09:22.400869 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5490 20:09:22.407609 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5491 20:09:22.417602 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5492 20:09:22.424074 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5493 20:09:22.433934 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5494 20:09:22.440609 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5495 20:09:22.450211 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5496 20:09:22.457049 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5497 20:09:22.466774 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5498 20:09:22.473256 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5499 20:09:22.480068 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5500 20:09:22.490342 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5501 20:09:22.496933 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5502 20:09:22.503424 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5503 20:09:22.510196 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5504 20:09:22.516597 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5505 20:09:22.526755 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5506 20:09:22.533268 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5507 20:09:22.539710 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5508 20:09:22.546498 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5509 20:09:22.549855 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5510 20:09:22.553297 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5511 20:09:22.556895 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5512 20:09:22.559822 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5513 20:09:22.563303 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5514 20:09:22.570166 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5515 20:09:22.576856 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5516 20:09:22.577006 WARNING: region 0:
5517 20:09:22.579922 WARNING: apc:0x168, sa:0x0, ea:0xfff
5518 20:09:22.582816 WARNING: region 1:
5519 20:09:22.586293 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5520 20:09:22.586417 WARNING: region 2:
5521 20:09:22.593203 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5522 20:09:22.593343 WARNING: region 3:
5523 20:09:22.596400 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5524 20:09:22.599705 WARNING: region 4:
5525 20:09:22.603222 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5526 20:09:22.603348 WARNING: region 5:
5527 20:09:22.606121 WARNING: apc:0x0, sa:0x0, ea:0x0
5528 20:09:22.609433 WARNING: region 6:
5529 20:09:22.613051 WARNING: apc:0x0, sa:0x0, ea:0x0
5530 20:09:22.613174 WARNING: region 7:
5531 20:09:22.616249 WARNING: apc:0x0, sa:0x0, ea:0x0
5532 20:09:22.622697 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5533 20:09:22.626085 INFO: SPM: enable SPMC mode
5534 20:09:22.629516 NOTICE: spm_boot_init() start
5535 20:09:22.632754 NOTICE: spm_boot_init() end
5536 20:09:22.635953 INFO: BL31: Initializing runtime services
5537 20:09:22.642932 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5538 20:09:22.645825 INFO: BL31: Preparing for EL3 exit to normal world
5539 20:09:22.649199 INFO: Entry point address = 0x80000000
5540 20:09:22.652474 INFO: SPSR = 0x8
5541 20:09:22.674139
5542 20:09:22.674352
5543 20:09:22.674463
5544 20:09:22.675058 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5545 20:09:22.675217 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5546 20:09:22.675350 Setting prompt string to ['jacuzzi:']
5547 20:09:22.675496 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5548 20:09:22.677639 Starting depthcharge on Juniper...
5549 20:09:22.677759
5550 20:09:22.680869 vboot_handoff: creating legacy vboot_handoff structure
5551 20:09:22.680991
5552 20:09:22.684156 ec_init(0): CrosEC protocol v3 supported (544, 544)
5553 20:09:22.684277
5554 20:09:22.687324 Wipe memory regions:
5555 20:09:22.687452
5556 20:09:22.690400 [0x00000040000000, 0x00000054600000)
5557 20:09:22.733580
5558 20:09:22.733791 [0x00000054660000, 0x00000080000000)
5559 20:09:22.825291
5560 20:09:22.825507 [0x000000811994a0, 0x000000ffeda000)
5561 20:09:23.085385
5562 20:09:23.085598 [0x00000100000000, 0x00000140000000)
5563 20:09:23.218461
5564 20:09:23.221514 Initializing XHCI USB controller at 0x11200000.
5565 20:09:23.244847
5566 20:09:23.248097 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5567 20:09:23.248232
5568 20:09:23.248336
5569 20:09:23.248685 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5571 20:09:23.349131 jacuzzi: tftpboot 192.168.201.1 14063016/tftp-deploy-5l9l971u/kernel/image.itb 14063016/tftp-deploy-5l9l971u/kernel/cmdline
5572 20:09:23.349375 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5573 20:09:23.349519 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5574 20:09:23.353722 tftpboot 192.168.201.1 14063016/tftp-deploy-5l9l971u/kernel/image.ittp-deploy-5l9l971u/kernel/cmdline
5575 20:09:23.353859
5576 20:09:23.353964 Waiting for link
5577 20:09:23.759051
5578 20:09:23.759265 R8152: Initializing
5579 20:09:23.759380
5580 20:09:23.762126 Version 9 (ocp_data = 6010)
5581 20:09:23.762246
5582 20:09:23.765358 R8152: Done initializing
5583 20:09:23.765479
5584 20:09:23.765586 Adding net device
5585 20:09:24.150966
5586 20:09:24.151206 done.
5587 20:09:24.151315
5588 20:09:24.151425 MAC: 00:e0:4c:68:0b:b9
5589 20:09:24.151574
5590 20:09:24.154379 Sending DHCP discover... done.
5591 20:09:24.154514
5592 20:09:24.158047 Waiting for reply... done.
5593 20:09:24.158180
5594 20:09:24.160994 Sending DHCP request... done.
5595 20:09:24.161118
5596 20:09:24.173604 Waiting for reply... done.
5597 20:09:24.173803
5598 20:09:24.173919 My ip is 192.168.201.13
5599 20:09:24.174023
5600 20:09:24.176935 The DHCP server ip is 192.168.201.1
5601 20:09:24.177056
5602 20:09:24.182970 TFTP server IP predefined by user: 192.168.201.1
5603 20:09:24.183105
5604 20:09:24.190087 Bootfile predefined by user: 14063016/tftp-deploy-5l9l971u/kernel/image.itb
5605 20:09:24.190248
5606 20:09:24.193247 Sending tftp read request... done.
5607 20:09:24.193380
5608 20:09:24.196676 Waiting for the transfer...
5609 20:09:24.196798
5610 20:09:24.481511 00000000 ################################################################
5611 20:09:24.481715
5612 20:09:24.760295 00080000 ################################################################
5613 20:09:24.760495
5614 20:09:25.043257 00100000 ################################################################
5615 20:09:25.043471
5616 20:09:25.330267 00180000 ################################################################
5617 20:09:25.330456
5618 20:09:25.594359 00200000 ################################################################
5619 20:09:25.594548
5620 20:09:25.871199 00280000 ################################################################
5621 20:09:25.871386
5622 20:09:26.148081 00300000 ################################################################
5623 20:09:26.148252
5624 20:09:26.424494 00380000 ################################################################
5625 20:09:26.424657
5626 20:09:26.702816 00400000 ################################################################
5627 20:09:26.702976
5628 20:09:27.006037 00480000 ################################################################
5629 20:09:27.006199
5630 20:09:27.311774 00500000 ################################################################
5631 20:09:27.311935
5632 20:09:27.618175 00580000 ################################################################
5633 20:09:27.618330
5634 20:09:27.917538 00600000 ################################################################
5635 20:09:27.917700
5636 20:09:28.194780 00680000 ################################################################
5637 20:09:28.194945
5638 20:09:28.436050 00700000 ################################################################
5639 20:09:28.436303
5640 20:09:28.681327 00780000 ################################################################
5641 20:09:28.681483
5642 20:09:28.928672 00800000 ################################################################
5643 20:09:28.928838
5644 20:09:29.192469 00880000 ################################################################
5645 20:09:29.192612
5646 20:09:29.475131 00900000 ################################################################
5647 20:09:29.475291
5648 20:09:29.776570 00980000 ################################################################
5649 20:09:29.776738
5650 20:09:30.075055 00a00000 ################################################################
5651 20:09:30.075217
5652 20:09:30.371775 00a80000 ################################################################
5653 20:09:30.371938
5654 20:09:30.662136 00b00000 ################################################################
5655 20:09:30.662307
5656 20:09:30.931654 00b80000 ################################################################
5657 20:09:30.931814
5658 20:09:31.225454 00c00000 ################################################################
5659 20:09:31.225606
5660 20:09:31.523308 00c80000 ################################################################
5661 20:09:31.523475
5662 20:09:31.813397 00d00000 ################################################################
5663 20:09:31.813555
5664 20:09:32.089232 00d80000 ################################################################
5665 20:09:32.089386
5666 20:09:32.381442 00e00000 ################################################################
5667 20:09:32.381602
5668 20:09:32.663830 00e80000 ################################################################
5669 20:09:32.663985
5670 20:09:32.940372 00f00000 ################################################################
5671 20:09:32.940516
5672 20:09:33.226316 00f80000 ################################################################
5673 20:09:33.226468
5674 20:09:33.505907 01000000 ################################################################
5675 20:09:33.506061
5676 20:09:33.791366 01080000 ################################################################
5677 20:09:33.791571
5678 20:09:34.088545 01100000 ################################################################
5679 20:09:34.088706
5680 20:09:34.342459 01180000 ################################################################
5681 20:09:34.342621
5682 20:09:34.594127 01200000 ################################################################
5683 20:09:34.594275
5684 20:09:34.847935 01280000 ################################################################
5685 20:09:34.848086
5686 20:09:35.113218 01300000 ################################################################
5687 20:09:35.113366
5688 20:09:35.403156 01380000 ################################################################
5689 20:09:35.403308
5690 20:09:35.702058 01400000 ################################################################
5691 20:09:35.702214
5692 20:09:35.999076 01480000 ################################################################
5693 20:09:35.999228
5694 20:09:36.296750 01500000 ################################################################
5695 20:09:36.296910
5696 20:09:36.580320 01580000 ################################################################
5697 20:09:36.580481
5698 20:09:36.874179 01600000 ################################################################
5699 20:09:36.874336
5700 20:09:37.152670 01680000 ################################################################
5701 20:09:37.152828
5702 20:09:37.445452 01700000 ################################################################
5703 20:09:37.445612
5704 20:09:37.744217 01780000 ################################################################
5705 20:09:37.744368
5706 20:09:38.061689 01800000 ################################################################
5707 20:09:38.062193
5708 20:09:38.371077 01880000 ################################################################
5709 20:09:38.371234
5710 20:09:38.674717 01900000 ################################################################
5711 20:09:38.674895
5712 20:09:38.960939 01980000 ################################################################
5713 20:09:38.961080
5714 20:09:39.260835 01a00000 ################################################################
5715 20:09:39.260990
5716 20:09:39.548562 01a80000 ################################################################
5717 20:09:39.548717
5718 20:09:39.852814 01b00000 ################################################################
5719 20:09:39.852967
5720 20:09:40.154952 01b80000 ################################################################
5721 20:09:40.155101
5722 20:09:40.444222 01c00000 ################################################################
5723 20:09:40.444374
5724 20:09:40.740491 01c80000 ################################################################
5725 20:09:40.740644
5726 20:09:41.042507 01d00000 ################################################################
5727 20:09:41.042667
5728 20:09:41.333545 01d80000 ################################################################
5729 20:09:41.333700
5730 20:09:41.544826 01e00000 ################################################ done.
5731 20:09:41.544983
5732 20:09:41.548073 The bootfile was 31849478 bytes long.
5733 20:09:41.548175
5734 20:09:41.551602 Sending tftp read request... done.
5735 20:09:41.551710
5736 20:09:41.551796 Waiting for the transfer...
5737 20:09:41.551877
5738 20:09:41.554892 00000000 # done.
5739 20:09:41.555002
5740 20:09:41.561214 Command line loaded dynamically from TFTP file: 14063016/tftp-deploy-5l9l971u/kernel/cmdline
5741 20:09:41.561430
5742 20:09:41.588183 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5743 20:09:41.588516
5744 20:09:41.588754 Loading FIT.
5745 20:09:41.588966
5746 20:09:41.591090 Image ramdisk-1 has 18728430 bytes.
5747 20:09:41.591367
5748 20:09:41.594856 Image fdt-1 has 57695 bytes.
5749 20:09:41.595218
5750 20:09:41.597892 Image kernel-1 has 13061303 bytes.
5751 20:09:41.598247
5752 20:09:41.607972 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5753 20:09:41.608485
5754 20:09:41.617977 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5755 20:09:41.618499
5756 20:09:41.624974 Choosing best match conf-1 for compat google,juniper-sku16.
5757 20:09:41.628852
5758 20:09:41.634284 Connected to device vid:did:rid of 1ae0:0028:00
5759 20:09:41.641793
5760 20:09:41.645153 tpm_get_response: command 0x17b, return code 0x0
5761 20:09:41.645580
5762 20:09:41.648431 tpm_cleanup: add release locality here.
5763 20:09:41.648989
5764 20:09:41.651666 Shutting down all USB controllers.
5765 20:09:41.652087
5766 20:09:41.655383 Removing current net device
5767 20:09:41.655945
5768 20:09:41.658130 Exiting depthcharge with code 4 at timestamp: 36206519
5769 20:09:41.658554
5770 20:09:41.661782 LZMA decompressing kernel-1 to 0x80193568
5771 20:09:41.662203
5772 20:09:41.668216 LZMA decompressing kernel-1 to 0x40000000
5773 20:09:43.525741
5774 20:09:43.526266 jumping to kernel
5775 20:09:43.528080 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5776 20:09:43.528569 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5777 20:09:43.528946 Setting prompt string to ['Linux version [0-9]']
5778 20:09:43.529313 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5779 20:09:43.529714 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5780 20:09:43.600779
5781 20:09:43.604366 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5782 20:09:43.607873 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5783 20:09:43.608452 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5784 20:09:43.608834 Setting prompt string to []
5785 20:09:43.609218 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5786 20:09:43.609639 Using line separator: #'\n'#
5787 20:09:43.610137 No login prompt set.
5788 20:09:43.610473 Parsing kernel messages
5789 20:09:43.610767 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5790 20:09:43.611311 [login-action] Waiting for messages, (timeout 00:04:06)
5791 20:09:43.611719 Waiting using forced prompt support (timeout 00:02:03)
5792 20:09:43.627008 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j208563-arm64-gcc-10-defconfig-arm64-chromebook-j5dkg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024
5793 20:09:43.630648 [ 0.000000] random: crng init done
5794 20:09:43.636752 [ 0.000000] Machine model: Google juniper sku16 board
5795 20:09:43.640173 [ 0.000000] efi: UEFI not found.
5796 20:09:43.646866 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5797 20:09:43.653860 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5798 20:09:43.663780 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5799 20:09:43.666617 [ 0.000000] printk: bootconsole [mtk8250] enabled
5800 20:09:43.675196 [ 0.000000] NUMA: No NUMA configuration found
5801 20:09:43.682617 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5802 20:09:43.688650 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5803 20:09:43.689172 [ 0.000000] Zone ranges:
5804 20:09:43.695293 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5805 20:09:43.699170 [ 0.000000] DMA32 empty
5806 20:09:43.705344 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5807 20:09:43.708525 [ 0.000000] Movable zone start for each node
5808 20:09:43.712052 [ 0.000000] Early memory node ranges
5809 20:09:43.718841 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5810 20:09:43.725170 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5811 20:09:43.732293 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5812 20:09:43.738695 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5813 20:09:43.744830 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5814 20:09:43.751675 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5815 20:09:43.767679 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5816 20:09:43.774153 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5817 20:09:43.781012 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5818 20:09:43.784279 [ 0.000000] psci: probing for conduit method from DT.
5819 20:09:43.791261 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5820 20:09:43.794741 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5821 20:09:43.801082 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5822 20:09:43.804619 [ 0.000000] psci: SMC Calling Convention v1.1
5823 20:09:43.810956 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5824 20:09:43.814580 [ 0.000000] Detected VIPT I-cache on CPU0
5825 20:09:43.820807 [ 0.000000] CPU features: detected: GIC system register CPU interface
5826 20:09:43.827814 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5827 20:09:43.834832 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5828 20:09:43.837601 [ 0.000000] CPU features: detected: ARM erratum 845719
5829 20:09:43.844229 [ 0.000000] alternatives: applying boot alternatives
5830 20:09:43.847820 [ 0.000000] Fallback order for Node 0: 0
5831 20:09:43.854721 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5832 20:09:43.858150 [ 0.000000] Policy zone: Normal
5833 20:09:43.884001 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5834 20:09:43.897374 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5835 20:09:43.907572 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5836 20:09:43.914351 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5837 20:09:43.920532 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5838 20:09:43.923697 <6>[ 0.000000] software IO TLB: area num 8.
5839 20:09:43.951193 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5840 20:09:44.009302 <6>[ 0.000000] Memory: 3896912K/4191232K available (18112K kernel code, 4120K rwdata, 22500K rodata, 8512K init, 616K bss, 261552K reserved, 32768K cma-reserved)
5841 20:09:44.015491 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5842 20:09:44.022365 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5843 20:09:44.025543 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5844 20:09:44.032183 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5845 20:09:44.038832 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5846 20:09:44.041965 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5847 20:09:44.052139 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5848 20:09:44.058600 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5849 20:09:44.062312 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5850 20:09:44.074070 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5851 20:09:44.080643 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5852 20:09:44.084036 <6>[ 0.000000] GICv3: 640 SPIs implemented
5853 20:09:44.087547 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5854 20:09:44.094373 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5855 20:09:44.097584 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5856 20:09:44.103964 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5857 20:09:44.113872 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5858 20:09:44.127546 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5859 20:09:44.134446 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5860 20:09:44.145817 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5861 20:09:44.159048 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5862 20:09:44.165462 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5863 20:09:44.172281 <6>[ 0.009468] Console: colour dummy device 80x25
5864 20:09:44.175721 <6>[ 0.014502] printk: console [tty1] enabled
5865 20:09:44.185448 <6>[ 0.018888] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5866 20:09:44.192508 <6>[ 0.029352] pid_max: default: 32768 minimum: 301
5867 20:09:44.196044 <6>[ 0.034234] LSM: Security Framework initializing
5868 20:09:44.205834 <6>[ 0.039148] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5869 20:09:44.212748 <6>[ 0.046771] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5870 20:09:44.219047 <4>[ 0.055647] cacheinfo: Unable to detect cache hierarchy for CPU 0
5871 20:09:44.228749 <6>[ 0.062278] cblist_init_generic: Setting adjustable number of callback queues.
5872 20:09:44.235715 <6>[ 0.069723] cblist_init_generic: Setting shift to 3 and lim to 1.
5873 20:09:44.242158 <6>[ 0.076078] cblist_init_generic: Setting adjustable number of callback queues.
5874 20:09:44.248856 <6>[ 0.083523] cblist_init_generic: Setting shift to 3 and lim to 1.
5875 20:09:44.252341 <6>[ 0.089923] rcu: Hierarchical SRCU implementation.
5876 20:09:44.258704 <6>[ 0.094949] rcu: Max phase no-delay instances is 1000.
5877 20:09:44.265629 <6>[ 0.102875] EFI services will not be available.
5878 20:09:44.269407 <6>[ 0.107825] smp: Bringing up secondary CPUs ...
5879 20:09:44.279420 <6>[ 0.113058] Detected VIPT I-cache on CPU1
5880 20:09:44.286364 <4>[ 0.113104] cacheinfo: Unable to detect cache hierarchy for CPU 1
5881 20:09:44.292898 <6>[ 0.113113] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5882 20:09:44.299213 <6>[ 0.113144] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5883 20:09:44.302668 <6>[ 0.113628] Detected VIPT I-cache on CPU2
5884 20:09:44.309376 <4>[ 0.113660] cacheinfo: Unable to detect cache hierarchy for CPU 2
5885 20:09:44.315794 <6>[ 0.113665] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5886 20:09:44.322685 <6>[ 0.113677] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5887 20:09:44.326070 <6>[ 0.114124] Detected VIPT I-cache on CPU3
5888 20:09:44.332827 <4>[ 0.114154] cacheinfo: Unable to detect cache hierarchy for CPU 3
5889 20:09:44.342683 <6>[ 0.114159] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5890 20:09:44.349313 <6>[ 0.114169] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5891 20:09:44.352253 <6>[ 0.114745] CPU features: detected: Spectre-v2
5892 20:09:44.355672 <6>[ 0.114755] CPU features: detected: Spectre-BHB
5893 20:09:44.362051 <6>[ 0.114759] CPU features: detected: ARM erratum 858921
5894 20:09:44.365800 <6>[ 0.114764] Detected VIPT I-cache on CPU4
5895 20:09:44.372382 <4>[ 0.114811] cacheinfo: Unable to detect cache hierarchy for CPU 4
5896 20:09:44.378974 <6>[ 0.114819] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5897 20:09:44.388543 <6>[ 0.114827] arch_timer: Enabling local workaround for ARM erratum 858921
5898 20:09:44.391755 <6>[ 0.114837] arch_timer: CPU4: Trapping CNTVCT access
5899 20:09:44.398705 <6>[ 0.114845] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5900 20:09:44.401733 <6>[ 0.115331] Detected VIPT I-cache on CPU5
5901 20:09:44.408637 <4>[ 0.115373] cacheinfo: Unable to detect cache hierarchy for CPU 5
5902 20:09:44.418302 <6>[ 0.115378] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5903 20:09:44.425014 <6>[ 0.115385] arch_timer: Enabling local workaround for ARM erratum 858921
5904 20:09:44.428468 <6>[ 0.115392] arch_timer: CPU5: Trapping CNTVCT access
5905 20:09:44.434852 <6>[ 0.115397] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5906 20:09:44.441692 <6>[ 0.115931] Detected VIPT I-cache on CPU6
5907 20:09:44.444616 <4>[ 0.115977] cacheinfo: Unable to detect cache hierarchy for CPU 6
5908 20:09:44.454565 <6>[ 0.115983] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5909 20:09:44.461281 <6>[ 0.115990] arch_timer: Enabling local workaround for ARM erratum 858921
5910 20:09:44.464528 <6>[ 0.115996] arch_timer: CPU6: Trapping CNTVCT access
5911 20:09:44.471289 <6>[ 0.116001] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5912 20:09:44.477867 <6>[ 0.116531] Detected VIPT I-cache on CPU7
5913 20:09:44.481708 <4>[ 0.116574] cacheinfo: Unable to detect cache hierarchy for CPU 7
5914 20:09:44.491142 <6>[ 0.116579] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5915 20:09:44.498014 <6>[ 0.116587] arch_timer: Enabling local workaround for ARM erratum 858921
5916 20:09:44.501604 <6>[ 0.116593] arch_timer: CPU7: Trapping CNTVCT access
5917 20:09:44.508017 <6>[ 0.116598] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5918 20:09:44.514457 <6>[ 0.116656] smp: Brought up 1 node, 8 CPUs
5919 20:09:44.517783 <6>[ 0.355525] SMP: Total of 8 processors activated.
5920 20:09:44.524560 <6>[ 0.360461] CPU features: detected: 32-bit EL0 Support
5921 20:09:44.527920 <6>[ 0.365832] CPU features: detected: 32-bit EL1 Support
5922 20:09:44.534333 <6>[ 0.371197] CPU features: detected: CRC32 instructions
5923 20:09:44.537802 <6>[ 0.376625] CPU: All CPU(s) started at EL2
5924 20:09:44.544597 <6>[ 0.380963] alternatives: applying system-wide alternatives
5925 20:09:44.551478 <6>[ 0.388963] devtmpfs: initialized
5926 20:09:44.563900 <6>[ 0.397914] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5927 20:09:44.573950 <6>[ 0.407864] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5928 20:09:44.577260 <6>[ 0.415594] pinctrl core: initialized pinctrl subsystem
5929 20:09:44.585395 <6>[ 0.422692] DMI not present or invalid.
5930 20:09:44.592426 <6>[ 0.427060] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5931 20:09:44.599105 <6>[ 0.433969] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5932 20:09:44.608755 <6>[ 0.441498] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5933 20:09:44.615213 <6>[ 0.449748] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5934 20:09:44.622164 <6>[ 0.457926] audit: initializing netlink subsys (disabled)
5935 20:09:44.628903 <5>[ 0.463630] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5936 20:09:44.635223 <6>[ 0.464606] thermal_sys: Registered thermal governor 'step_wise'
5937 20:09:44.642155 <6>[ 0.471596] thermal_sys: Registered thermal governor 'power_allocator'
5938 20:09:44.645221 <6>[ 0.477892] cpuidle: using governor menu
5939 20:09:44.652162 <6>[ 0.488855] NET: Registered PF_QIPCRTR protocol family
5940 20:09:44.658934 <6>[ 0.494350] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5941 20:09:44.665076 <6>[ 0.501444] ASID allocator initialised with 32768 entries
5942 20:09:44.671520 <6>[ 0.508214] Serial: AMBA PL011 UART driver
5943 20:09:44.681660 <4>[ 0.518606] Trying to register duplicate clock ID: 113
5944 20:09:44.741727 <6>[ 0.575401] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5945 20:09:44.756068 <6>[ 0.589726] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5946 20:09:44.758868 <6>[ 0.599471] KASLR enabled
5947 20:09:44.773792 <6>[ 0.607474] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5948 20:09:44.780457 <6>[ 0.614475] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5949 20:09:44.787123 <6>[ 0.620952] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5950 20:09:44.793671 <6>[ 0.627943] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5951 20:09:44.800429 <6>[ 0.634416] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5952 20:09:44.807588 <6>[ 0.641406] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5953 20:09:44.813832 <6>[ 0.647879] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5954 20:09:44.820345 <6>[ 0.654869] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5955 20:09:44.823703 <6>[ 0.662433] ACPI: Interpreter disabled.
5956 20:09:44.833457 <6>[ 0.670407] iommu: Default domain type: Translated
5957 20:09:44.839767 <6>[ 0.675513] iommu: DMA domain TLB invalidation policy: strict mode
5958 20:09:44.843121 <5>[ 0.682148] SCSI subsystem initialized
5959 20:09:44.850041 <6>[ 0.686561] usbcore: registered new interface driver usbfs
5960 20:09:44.856926 <6>[ 0.692289] usbcore: registered new interface driver hub
5961 20:09:44.859768 <6>[ 0.697831] usbcore: registered new device driver usb
5962 20:09:44.867347 <6>[ 0.704130] pps_core: LinuxPPS API ver. 1 registered
5963 20:09:44.877186 <6>[ 0.709314] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5964 20:09:44.880199 <6>[ 0.718638] PTP clock support registered
5965 20:09:44.883685 <6>[ 0.722889] EDAC MC: Ver: 3.0.0
5966 20:09:44.891788 <6>[ 0.728534] FPGA manager framework
5967 20:09:44.898134 <6>[ 0.732222] Advanced Linux Sound Architecture Driver Initialized.
5968 20:09:44.901230 <6>[ 0.738961] vgaarb: loaded
5969 20:09:44.904437 <6>[ 0.742088] clocksource: Switched to clocksource arch_sys_counter
5970 20:09:44.911355 <5>[ 0.748518] VFS: Disk quotas dquot_6.6.0
5971 20:09:44.918433 <6>[ 0.752692] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5972 20:09:44.921315 <6>[ 0.759866] pnp: PnP ACPI: disabled
5973 20:09:44.930024 <6>[ 0.766732] NET: Registered PF_INET protocol family
5974 20:09:44.936458 <6>[ 0.771961] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5975 20:09:44.948430 <6>[ 0.781873] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5976 20:09:44.957847 <6>[ 0.790628] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5977 20:09:44.964678 <6>[ 0.798577] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5978 20:09:44.971109 <6>[ 0.806809] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5979 20:09:44.980948 <6>[ 0.814903] TCP: Hash tables configured (established 32768 bind 32768)
5980 20:09:44.987868 <6>[ 0.821728] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5981 20:09:44.994927 <6>[ 0.828700] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5982 20:09:45.001261 <6>[ 0.836182] NET: Registered PF_UNIX/PF_LOCAL protocol family
5983 20:09:45.007826 <6>[ 0.842275] RPC: Registered named UNIX socket transport module.
5984 20:09:45.010831 <6>[ 0.848418] RPC: Registered udp transport module.
5985 20:09:45.017876 <6>[ 0.853342] RPC: Registered tcp transport module.
5986 20:09:45.023914 <6>[ 0.858266] RPC: Registered tcp NFSv4.1 backchannel transport module.
5987 20:09:45.027250 <6>[ 0.864919] PCI: CLS 0 bytes, default 64
5988 20:09:45.030738 <6>[ 0.869169] Unpacking initramfs...
5989 20:09:45.040527 <6>[ 0.873217] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5990 20:09:45.047250 <6>[ 0.881916] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5991 20:09:45.053673 <6>[ 0.890814] kvm [1]: IPA Size Limit: 40 bits
5992 20:09:45.057043 <6>[ 0.897135] kvm [1]: vgic-v2@c420000
5993 20:09:45.063742 <6>[ 0.900954] kvm [1]: GIC system register CPU interface enabled
5994 20:09:45.070665 <6>[ 0.907131] kvm [1]: vgic interrupt IRQ18
5995 20:09:45.073992 <6>[ 0.911489] kvm [1]: Hyp mode initialized successfully
5996 20:09:45.080904 <5>[ 0.917770] Initialise system trusted keyrings
5997 20:09:45.087162 <6>[ 0.922540] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5998 20:09:45.095427 <6>[ 0.932465] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5999 20:09:45.102238 <5>[ 0.938854] NFS: Registering the id_resolver key type
6000 20:09:45.105502 <5>[ 0.944154] Key type id_resolver registered
6001 20:09:45.111687 <5>[ 0.948563] Key type id_legacy registered
6002 20:09:45.118506 <6>[ 0.952856] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6003 20:09:45.125186 <6>[ 0.959771] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6004 20:09:45.131594 <6>[ 0.967497] 9p: Installing v9fs 9p2000 file system support
6005 20:09:45.159153 <5>[ 0.996084] Key type asymmetric registered
6006 20:09:45.162457 <5>[ 1.000417] Asymmetric key parser 'x509' registered
6007 20:09:45.172512 <6>[ 1.005566] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6008 20:09:45.175872 <6>[ 1.013172] io scheduler mq-deadline registered
6009 20:09:45.178762 <6>[ 1.017925] io scheduler kyber registered
6010 20:09:45.201437 <6>[ 1.038637] EINJ: ACPI disabled.
6011 20:09:45.207893 <4>[ 1.042398] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6012 20:09:45.245666 <6>[ 1.083014] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6013 20:09:45.254380 <6>[ 1.091495] printk: console [ttyS0] disabled
6014 20:09:45.282256 <6>[ 1.116137] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6015 20:09:45.288857 <6>[ 1.125604] printk: console [ttyS0] enabled
6016 20:09:45.292242 <6>[ 1.125604] printk: console [ttyS0] enabled
6017 20:09:45.298760 <6>[ 1.134526] printk: bootconsole [mtk8250] disabled
6018 20:09:45.302143 <6>[ 1.134526] printk: bootconsole [mtk8250] disabled
6019 20:09:45.312166 <3>[ 1.145045] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6020 20:09:45.318437 <3>[ 1.153423] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6021 20:09:45.347775 <6>[ 1.181813] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6022 20:09:45.354738 <6>[ 1.191455] serial serial0: tty port ttyS1 registered
6023 20:09:45.361370 <6>[ 1.198016] SuperH (H)SCI(F) driver initialized
6024 20:09:45.364383 <6>[ 1.203509] msm_serial: driver initialized
6025 20:09:45.379881 <6>[ 1.213785] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6026 20:09:45.389614 <6>[ 1.222379] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6027 20:09:45.396664 <6>[ 1.230951] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6028 20:09:45.406468 <6>[ 1.239517] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6029 20:09:45.413309 <6>[ 1.248168] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6030 20:09:45.423010 <6>[ 1.256823] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6031 20:09:45.433228 <6>[ 1.265556] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6032 20:09:45.439419 <6>[ 1.274294] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6033 20:09:45.449891 <6>[ 1.282858] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6034 20:09:45.459526 <6>[ 1.291653] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6035 20:09:45.466798 <4>[ 1.303999] cacheinfo: Unable to detect cache hierarchy for CPU 0
6036 20:09:45.476047 <6>[ 1.313329] loop: module loaded
6037 20:09:45.487871 <6>[ 1.325230] vsim1: Bringing 1800000uV into 2700000-2700000uV
6038 20:09:45.506190 <6>[ 1.343220] megasas: 07.719.03.00-rc1
6039 20:09:45.515082 <6>[ 1.352018] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6040 20:09:45.524191 <6>[ 1.361475] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6041 20:09:45.541564 <6>[ 1.378312] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6042 20:09:45.598109 <6>[ 1.428777] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6043 20:09:45.657700 <6>[ 1.494720] Freeing initrd memory: 18284K
6044 20:09:45.672730 <4>[ 1.506504] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6045 20:09:45.679397 <4>[ 1.515733] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
6046 20:09:45.686439 <4>[ 1.522431] Hardware name: Google juniper sku16 board (DT)
6047 20:09:45.689739 <4>[ 1.528169] Call trace:
6048 20:09:45.693025 <4>[ 1.530870] dump_backtrace.part.0+0xe0/0xf0
6049 20:09:45.696290 <4>[ 1.535405] show_stack+0x18/0x30
6050 20:09:45.699597 <4>[ 1.538977] dump_stack_lvl+0x68/0x84
6051 20:09:45.703013 <4>[ 1.542898] dump_stack+0x18/0x34
6052 20:09:45.709506 <4>[ 1.546468] sysfs_warn_dup+0x64/0x80
6053 20:09:45.712722 <4>[ 1.550389] sysfs_do_create_link_sd+0xf0/0x100
6054 20:09:45.716217 <4>[ 1.555177] sysfs_create_link+0x20/0x40
6055 20:09:45.723093 <4>[ 1.559356] bus_add_device+0x68/0x10c
6056 20:09:45.726431 <4>[ 1.563363] device_add+0x340/0x7ac
6057 20:09:45.729373 <4>[ 1.567105] of_device_add+0x44/0x60
6058 20:09:45.732977 <4>[ 1.570939] of_platform_device_create_pdata+0x90/0x120
6059 20:09:45.739289 <4>[ 1.576421] of_platform_bus_create+0x170/0x370
6060 20:09:45.742730 <4>[ 1.581208] of_platform_populate+0x50/0xfc
6061 20:09:45.749847 <4>[ 1.585647] parse_mtd_partitions+0x1dc/0x510
6062 20:09:45.752742 <4>[ 1.590260] mtd_device_parse_register+0xf8/0x2e0
6063 20:09:45.756107 <4>[ 1.595218] spi_nor_probe+0x21c/0x2f0
6064 20:09:45.759442 <4>[ 1.599223] spi_mem_probe+0x6c/0xb0
6065 20:09:45.762883 <4>[ 1.603055] spi_probe+0x84/0xe4
6066 20:09:45.769666 <4>[ 1.606537] really_probe+0xbc/0x2e0
6067 20:09:45.772619 <4>[ 1.610367] __driver_probe_device+0x78/0x11c
6068 20:09:45.776233 <4>[ 1.614979] driver_probe_device+0xd8/0x160
6069 20:09:45.782520 <4>[ 1.619417] __device_attach_driver+0xb8/0x134
6070 20:09:45.785886 <4>[ 1.624116] bus_for_each_drv+0x78/0xd0
6071 20:09:45.789446 <4>[ 1.628206] __device_attach+0xa8/0x1c0
6072 20:09:45.796234 <4>[ 1.632296] device_initial_probe+0x14/0x20
6073 20:09:45.799114 <4>[ 1.636735] bus_probe_device+0x9c/0xa4
6074 20:09:45.802904 <4>[ 1.640824] device_add+0x3ac/0x7ac
6075 20:09:45.806180 <4>[ 1.644567] __spi_add_device+0x78/0x120
6076 20:09:45.809144 <4>[ 1.648745] spi_add_device+0x40/0x7c
6077 20:09:45.815953 <4>[ 1.652662] spi_register_controller+0x610/0xad0
6078 20:09:45.818973 <4>[ 1.657535] devm_spi_register_controller+0x4c/0xa4
6079 20:09:45.825568 <4>[ 1.662668] mtk_spi_probe+0x3f8/0x650
6080 20:09:45.829112 <4>[ 1.666671] platform_probe+0x68/0xe0
6081 20:09:45.832524 <4>[ 1.670589] really_probe+0xbc/0x2e0
6082 20:09:45.836079 <4>[ 1.674419] __driver_probe_device+0x78/0x11c
6083 20:09:45.842872 <4>[ 1.679030] driver_probe_device+0xd8/0x160
6084 20:09:45.846195 <4>[ 1.683468] __driver_attach+0x94/0x19c
6085 20:09:45.849034 <4>[ 1.687558] bus_for_each_dev+0x70/0xd0
6086 20:09:45.852430 <4>[ 1.691648] driver_attach+0x24/0x30
6087 20:09:45.858866 <4>[ 1.695477] bus_add_driver+0x154/0x20c
6088 20:09:45.862189 <4>[ 1.699567] driver_register+0x78/0x130
6089 20:09:45.865972 <4>[ 1.703658] __platform_driver_register+0x28/0x34
6090 20:09:45.872630 <4>[ 1.708617] mtk_spi_driver_init+0x1c/0x28
6091 20:09:45.876097 <4>[ 1.712971] do_one_initcall+0x50/0x1d0
6092 20:09:45.879125 <4>[ 1.717061] kernel_init_freeable+0x21c/0x288
6093 20:09:45.882461 <4>[ 1.721674] kernel_init+0x24/0x12c
6094 20:09:45.885832 <4>[ 1.725419] ret_from_fork+0x10/0x20
6095 20:09:45.897143 <6>[ 1.734339] tun: Universal TUN/TAP device driver, 1.6
6096 20:09:45.900566 <6>[ 1.740618] thunder_xcv, ver 1.0
6097 20:09:45.904063 <6>[ 1.744137] thunder_bgx, ver 1.0
6098 20:09:45.907189 <6>[ 1.747640] nicpf, ver 1.0
6099 20:09:45.918124 <6>[ 1.751996] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6100 20:09:45.921558 <6>[ 1.759480] hns3: Copyright (c) 2017 Huawei Corporation.
6101 20:09:45.924802 <6>[ 1.765080] hclge is initializing
6102 20:09:45.931349 <6>[ 1.768665] e1000: Intel(R) PRO/1000 Network Driver
6103 20:09:45.938257 <6>[ 1.773802] e1000: Copyright (c) 1999-2006 Intel Corporation.
6104 20:09:45.941570 <6>[ 1.779825] e1000e: Intel(R) PRO/1000 Network Driver
6105 20:09:45.948416 <6>[ 1.785045] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6106 20:09:45.955198 <6>[ 1.791237] igb: Intel(R) Gigabit Ethernet Network Driver
6107 20:09:45.962104 <6>[ 1.796894] igb: Copyright (c) 2007-2014 Intel Corporation.
6108 20:09:45.968428 <6>[ 1.802738] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6109 20:09:45.972098 <6>[ 1.809261] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6110 20:09:45.978879 <6>[ 1.815812] sky2: driver version 1.30
6111 20:09:45.985174 <6>[ 1.821055] usbcore: registered new device driver r8152-cfgselector
6112 20:09:45.992073 <6>[ 1.827599] usbcore: registered new interface driver r8152
6113 20:09:45.995538 <6>[ 1.833429] VFIO - User Level meta-driver version: 0.3
6114 20:09:46.004421 <6>[ 1.841192] mtu3 11201000.usb: uwk - reg:0x420, version:101
6115 20:09:46.010797 <4>[ 1.847066] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6116 20:09:46.017611 <6>[ 1.854346] mtu3 11201000.usb: dr_mode: 1, drd: auto
6117 20:09:46.024308 <6>[ 1.859572] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6118 20:09:46.027299 <6>[ 1.865756] mtu3 11201000.usb: usb3-drd: 0
6119 20:09:46.037463 <6>[ 1.871297] mtu3 11201000.usb: xHCI platform device register success...
6120 20:09:46.044487 <4>[ 1.879906] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6121 20:09:46.051096 <6>[ 1.887847] xhci-mtk 11200000.usb: xHCI Host Controller
6122 20:09:46.057479 <6>[ 1.893357] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6123 20:09:46.064259 <6>[ 1.901080] xhci-mtk 11200000.usb: USB3 root hub has no ports
6124 20:09:46.074151 <6>[ 1.907089] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6125 20:09:46.081003 <6>[ 1.916510] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6126 20:09:46.087521 <6>[ 1.922587] xhci-mtk 11200000.usb: xHCI Host Controller
6127 20:09:46.094554 <6>[ 1.928099] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6128 20:09:46.100868 <6>[ 1.935759] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6129 20:09:46.104221 <6>[ 1.942585] hub 1-0:1.0: USB hub found
6130 20:09:46.107378 <6>[ 1.946614] hub 1-0:1.0: 1 port detected
6131 20:09:46.118397 <6>[ 1.951971] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6132 20:09:46.121407 <6>[ 1.960596] hub 2-0:1.0: USB hub found
6133 20:09:46.128189 <3>[ 1.964623] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6134 20:09:46.135580 <6>[ 1.972499] usbcore: registered new interface driver usb-storage
6135 20:09:46.141815 <6>[ 1.979101] usbcore: registered new device driver onboard-usb-hub
6136 20:09:46.160440 <4>[ 1.994202] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6137 20:09:46.169338 <6>[ 2.006421] mt6397-rtc mt6358-rtc: registered as rtc0
6138 20:09:46.179650 <6>[ 2.011904] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-28T20:08:49 UTC (1716926929)
6139 20:09:46.182890 <6>[ 2.021793] i2c_dev: i2c /dev entries driver
6140 20:09:46.194858 <6>[ 2.028167] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6141 20:09:46.204624 <6>[ 2.036550] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6142 20:09:46.207890 <6>[ 2.045457] i2c 4-0058: Fixed dependency cycle(s) with /panel
6143 20:09:46.217697 <6>[ 2.051530] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6144 20:09:46.224656 <3>[ 2.059006] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6145 20:09:46.242217 <6>[ 2.076124] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6146 20:09:46.250761 <6>[ 2.087553] cpu cpu0: EM: created perf domain
6147 20:09:46.260540 <6>[ 2.093051] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6148 20:09:46.267426 <6>[ 2.104357] cpu cpu4: EM: created perf domain
6149 20:09:46.274433 <6>[ 2.111095] sdhci: Secure Digital Host Controller Interface driver
6150 20:09:46.280633 <6>[ 2.117548] sdhci: Copyright(c) Pierre Ossman
6151 20:09:46.287204 <6>[ 2.122939] Synopsys Designware Multimedia Card Interface Driver
6152 20:09:46.293998 <6>[ 2.123475] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6153 20:09:46.297535 <6>[ 2.130000] sdhci-pltfm: SDHCI platform and OF driver helper
6154 20:09:46.305383 <6>[ 2.142553] ledtrig-cpu: registered to indicate activity on CPUs
6155 20:09:46.313596 <6>[ 2.150298] usbcore: registered new interface driver usbhid
6156 20:09:46.316864 <6>[ 2.156135] usbhid: USB HID core driver
6157 20:09:46.327658 <6>[ 2.160458] spi_master spi2: will run message pump with realtime priority
6158 20:09:46.334728 <4>[ 2.160607] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6159 20:09:46.341634 <4>[ 2.174807] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6160 20:09:46.351518 <6>[ 2.181787] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6161 20:09:46.370597 <6>[ 2.197612] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6162 20:09:46.377591 <4>[ 2.209291] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6163 20:09:46.380407 <6>[ 2.212157] cros-ec-spi spi2.0: Chrome EC device registered
6164 20:09:46.392138 <4>[ 2.226011] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6165 20:09:46.404051 <4>[ 2.237985] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6166 20:09:46.410755 <6>[ 2.245604] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6167 20:09:46.417820 <4>[ 2.247251] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6168 20:09:46.420967 <6>[ 2.253650] mmc0: new HS400 MMC card at address 0001
6169 20:09:46.427326 <6>[ 2.264211] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6170 20:09:46.434233 <6>[ 2.267604] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6171 20:09:46.443048 <6>[ 2.280104] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6172 20:09:46.450483 <6>[ 2.287242] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6173 20:09:46.460346 <6>[ 2.290627] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6174 20:09:46.463733 <6>[ 2.293768] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6175 20:09:46.473747 <6>[ 2.305162] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6176 20:09:46.480201 <6>[ 2.307356] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6177 20:09:46.487302 <6>[ 2.318728] NET: Registered PF_PACKET protocol family
6178 20:09:46.500316 <6>[ 2.327943] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6179 20:09:46.503686 <6>[ 2.329188] 9pnet: Installing 9P2000 support
6180 20:09:46.513983 <6>[ 2.341559] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6181 20:09:46.517366 <5>[ 2.345852] Key type dns_resolver registered
6182 20:09:46.524018 <6>[ 2.361008] registered taskstats version 1
6183 20:09:46.527080 <5>[ 2.365392] Loading compiled-in X.509 certificates
6184 20:09:46.533695 <6>[ 2.366110] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6185 20:09:46.573838 <3>[ 2.407647] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6186 20:09:46.600812 <4>[ 2.434785] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6187 20:09:46.611694 <6>[ 2.445361] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6188 20:09:46.627464 <6>[ 2.457959] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6189 20:09:46.640943 <3>[ 2.469172] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6190 20:09:46.654267 <3>[ 2.484654] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6191 20:09:46.660794 <3>[ 2.497203] debugfs: File 'Playback' in directory 'dapm' already present!
6192 20:09:46.670967 <3>[ 2.504250] debugfs: File 'Capture' in directory 'dapm' already present!
6193 20:09:46.684049 <6>[ 2.514221] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6194 20:09:46.695626 <6>[ 2.528986] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6195 20:09:46.698442 <6>[ 2.529562] hub 1-1:1.0: USB hub found
6196 20:09:46.708510 <6>[ 2.537520] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6197 20:09:46.712116 <6>[ 2.542016] hub 1-1:1.0: 3 ports detected
6198 20:09:46.721729 <6>[ 2.550031] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6199 20:09:46.728479 <6>[ 2.562825] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6200 20:09:46.738164 <6>[ 2.571346] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6201 20:09:46.745209 <6>[ 2.579869] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6202 20:09:46.755355 <6>[ 2.588388] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6203 20:09:46.761918 <6>[ 2.597550] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6204 20:09:46.768563 <6>[ 2.604947] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6205 20:09:46.774873 <6>[ 2.612178] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6206 20:09:46.785553 <6>[ 2.619382] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6207 20:09:46.792228 <6>[ 2.626752] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6208 20:09:46.798938 <6>[ 2.634929] panfrost 13040000.gpu: clock rate = 511999970
6209 20:09:46.808737 <6>[ 2.640604] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6210 20:09:46.815687 <6>[ 2.650688] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6211 20:09:46.825532 <6>[ 2.658695] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6212 20:09:46.835620 <6>[ 2.667132] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6213 20:09:46.842085 <6>[ 2.679209] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6214 20:09:46.857428 <6>[ 2.690877] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6215 20:09:46.867101 <6>[ 2.700201] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6216 20:09:46.877224 <6>[ 2.709374] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6217 20:09:46.887319 <6>[ 2.718509] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6218 20:09:46.893503 <6>[ 2.727636] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6219 20:09:46.903795 <6>[ 2.736935] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6220 20:09:46.913184 <6>[ 2.746235] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6221 20:09:46.923539 <6>[ 2.755710] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6222 20:09:46.933366 <6>[ 2.765183] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6223 20:09:46.943687 <6>[ 2.774308] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6224 20:09:47.013865 <6>[ 2.847343] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6225 20:09:47.023458 <6>[ 2.856241] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6226 20:09:47.034343 <6>[ 2.868005] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6227 20:09:47.048624 <6>[ 2.882110] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6228 20:09:47.716476 <6>[ 3.074488] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6229 20:09:47.726706 <4>[ 3.191408] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6230 20:09:47.733260 <4>[ 3.191428] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6231 20:09:47.739621 <6>[ 3.228139] r8152 1-1.2:1.0 eth0: v1.12.13
6232 20:09:47.746417 <6>[ 3.306117] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6233 20:09:47.752844 <6>[ 3.533738] Console: switching to colour frame buffer device 170x48
6234 20:09:47.759727 <6>[ 3.594407] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6235 20:09:47.778696 <6>[ 3.612224] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6236 20:09:47.785158 <6>[ 3.620833] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6237 20:09:48.990133 <6>[ 4.826973] r8152 1-1.2:1.0 eth0: carrier on
6238 20:09:49.037128 <5>[ 4.858136] Sending DHCP requests ., OK
6239 20:09:49.044065 <6>[ 4.878348] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6240 20:09:49.047334 <6>[ 4.886782] IP-Config: Complete:
6241 20:09:49.060271 <6>[ 4.890353] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6242 20:09:49.067017 <6>[ 4.901254] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6243 20:09:49.077399 <6>[ 4.910734] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6244 20:09:49.080322 <6>[ 4.910744] nameserver0=192.168.201.1
6245 20:09:49.083585 <6>[ 4.923084] clk: Disabling unused clocks
6246 20:09:49.088007 <6>[ 4.928177] ALSA device list:
6247 20:09:49.097920 <6>[ 4.935156] #0: mt8183_mt6358_ts3a227_max98357
6248 20:09:49.109649 <6>[ 4.946725] Freeing unused kernel memory: 8512K
6249 20:09:49.117357 <6>[ 4.954332] Run /init as init process
6250 20:09:49.130422 Loading, please wait...
6251 20:09:49.166376 Starting systemd-udevd version 252.22-1~deb12u1
6252 20:09:49.507966 <3>[ 5.344663] mtk-scp 10500000.scp: invalid resource
6253 20:09:49.515199 <3>[ 5.345270] thermal_sys: Failed to find 'trips' node
6254 20:09:49.521577 <6>[ 5.350553] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6255 20:09:49.528198 <3>[ 5.354984] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6256 20:09:49.538499 <3>[ 5.354995] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6257 20:09:49.544363 <4>[ 5.355000] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6258 20:09:49.556426 <3>[ 5.355535] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6259 20:09:49.563459 <3>[ 5.356281] thermal_sys: Failed to find 'trips' node
6260 20:09:49.570347 <3>[ 5.356284] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6261 20:09:49.580072 <3>[ 5.356289] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6262 20:09:49.586283 <4>[ 5.356292] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6263 20:09:49.592892 <3>[ 5.357520] thermal_sys: Failed to find 'trips' node
6264 20:09:49.600105 <3>[ 5.357523] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6265 20:09:49.606130 <3>[ 5.357527] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6266 20:09:49.616443 <4>[ 5.357529] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6267 20:09:49.619759 <6>[ 5.363997] remoteproc remoteproc0: scp is available
6268 20:09:49.626226 <3>[ 5.369909] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6269 20:09:49.639723 <3>[ 5.369915] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6270 20:09:49.646550 <3>[ 5.369921] elan_i2c 2-0015: Error applying setting, reverse things back
6271 20:09:49.652859 <6>[ 5.390325] mc: Linux media interface: v0.10
6272 20:09:49.663519 <4>[ 5.399915] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6273 20:09:49.669278 <6>[ 5.405341] Bluetooth: Core ver 2.22
6274 20:09:49.676150 <4>[ 5.405587] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6275 20:09:49.687366 <4>[ 5.405715] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6276 20:09:49.693547 <6>[ 5.412292] remoteproc remoteproc0: powering up scp
6277 20:09:49.700352 <6>[ 5.422384] NET: Registered PF_BLUETOOTH protocol family
6278 20:09:49.710623 <4>[ 5.428329] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6279 20:09:49.717584 <6>[ 5.433649] Bluetooth: HCI device and connection manager initialized
6280 20:09:49.725889 <6>[ 5.437790] videodev: Linux video capture interface: v2.00
6281 20:09:49.733462 <3>[ 5.440834] remoteproc remoteproc0: request_firmware failed: -2
6282 20:09:49.744674 <5>[ 5.446510] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6283 20:09:49.751933 <6>[ 5.449266] Bluetooth: HCI socket layer initialized
6284 20:09:49.758796 <5>[ 5.457447] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6285 20:09:49.765023 <6>[ 5.462089] Bluetooth: L2CAP socket layer initialized
6286 20:09:49.771675 <3>[ 5.463265] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6287 20:09:49.781946 <3>[ 5.463284] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6288 20:09:49.788517 <3>[ 5.463292] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6289 20:09:49.798099 <3>[ 5.468918] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6290 20:09:49.804811 <5>[ 5.469468] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6291 20:09:49.814826 <4>[ 5.469528] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6292 20:09:49.822174 <6>[ 5.469535] cfg80211: failed to load regulatory.db
6293 20:09:49.828432 <6>[ 5.470253] cs_system_cfg: CoreSight Configuration manager initialised
6294 20:09:49.834779 <6>[ 5.472482] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6295 20:09:49.841194 <6>[ 5.479830] Bluetooth: SCO socket layer initialized
6296 20:09:49.851033 <6>[ 5.585946] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6297 20:09:49.861553 <3>[ 5.587697] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6298 20:09:49.867860 <6>[ 5.600783] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6299 20:09:49.877781 <3>[ 5.605802] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6300 20:09:49.884246 <6>[ 5.614187] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6301 20:09:49.894530 <3>[ 5.622669] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6302 20:09:49.901532 <6>[ 5.631360] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6303 20:09:49.907552 <6>[ 5.633339] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6304 20:09:49.918184 <3>[ 5.639965] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6305 20:09:49.924365 <6>[ 5.640492] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6306 20:09:49.934261 <6>[ 5.640808] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6307 20:09:49.940614 <6>[ 5.648189] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6308 20:09:49.947741 <6>[ 5.648282] Bluetooth: HCI UART driver ver 2.3
6309 20:09:49.954363 <6>[ 5.648287] Bluetooth: HCI UART protocol H4 registered
6310 20:09:49.960589 <6>[ 5.648325] Bluetooth: HCI UART protocol LL registered
6311 20:09:49.967046 <6>[ 5.648343] Bluetooth: HCI UART protocol Three-wire (H5) registered
6312 20:09:49.974155 <6>[ 5.648757] Bluetooth: HCI UART protocol Broadcom registered
6313 20:09:49.980721 <6>[ 5.648776] Bluetooth: HCI UART protocol QCA registered
6314 20:09:49.987126 <6>[ 5.648788] Bluetooth: HCI UART protocol Marvell registered
6315 20:09:49.994201 <6>[ 5.648865] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6316 20:09:50.000494 <6>[ 5.649466] Bluetooth: hci0: setting up ROME/QCA6390
6317 20:09:50.007231 <6>[ 5.650118] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6318 20:09:50.020302 <6>[ 5.651578] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6319 20:09:50.027677 <6>[ 5.651694] usbcore: registered new interface driver uvcvideo
6320 20:09:50.034483 <3>[ 5.656907] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6321 20:09:50.044628 Begin: Loading e<6>[ 5.668806] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6322 20:09:50.054286 ssential drivers<6>[ 5.699634] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6323 20:09:50.057234 ... done.
6324 20:09:50.064015 Begi<6>[ 5.702369] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6325 20:09:50.077097 n: Running /scripts/init-premoun<6>[ 5.710169] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6326 20:09:50.080712 t ... done.
6327 20:09:50.090757 Begin: Mounting roo<6>[ 5.718747] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6328 20:09:50.103754 t file system ... Begin: Running<6>[ 5.726922] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6329 20:09:50.107112 /scripts/nfs-top ... done.
6330 20:09:50.116832 Beg<6>[ 5.735233] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6331 20:09:50.127056 in: Running /scripts/nfs-premoun<3>[ 5.864996] Bluetooth: hci0: Frame reassembly failed (-84)
6332 20:09:50.137241 t ... Waiting up to 60 secs for <6>[ 5.891263] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6333 20:09:50.140126 any ethernet to become available
6334 20:09:50.143537 Device /sys/class/net/eth0 found
6335 20:09:50.144084 done.
6336 20:09:50.207344 Begin: Waiting up to 180 secs for any network de<4>[ 6.041006] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6337 20:09:50.214395 <4>[ 6.041006] Fallback method does not support PEC.
6338 20:09:50.218173 vice to become available ... done.
6339 20:09:50.224922 <3>[ 6.059357] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6340 20:09:50.242322 <3>[ 6.074972] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6341 20:09:50.269915 IP-Config: eth0 hardware address 00:e0:4c:68:0b:b9 mtu 1500 DHCP
6342 20:09:50.276717 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6343 20:09:50.283577 address: 192.168.201.13 broadcast: 192.168.201.255 netmask: 255.255.255.0
6344 20:09:50.290324 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6345 20:09:50.296201 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0
6346 20:09:50.303073 domain : lava-rack
6347 20:09:50.306163 rootserver: 192.168.201.1 rootpath:
6348 20:09:50.306580 filename :
6349 20:09:50.314113 <6>[ 6.150569] Bluetooth: hci0: QCA Product ID :0x00000008
6350 20:09:50.321580 <6>[ 6.158421] Bluetooth: hci0: QCA SOC Version :0x00000044
6351 20:09:50.329413 <6>[ 6.166146] Bluetooth: hci0: QCA ROM Version :0x00000302
6352 20:09:50.338664 <6>[ 6.175369] Bluetooth: hci0: QCA Patch Version:0x00000111
6353 20:09:50.347369 <6>[ 6.184191] Bluetooth: hci0: QCA controller version 0x00440302
6354 20:09:50.359183 <6>[ 6.192926] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6355 20:09:50.369319 <4>[ 6.202133] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6356 20:09:50.379658 <3>[ 6.213435] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6357 20:09:50.386566 <3>[ 6.223474] Bluetooth: hci0: QCA Failed to download patch (-2)
6358 20:09:50.499236 done.
6359 20:09:50.507081 Begin: Running /scripts/nfs-bottom ... done.
6360 20:09:50.522634 Begin: Running /scripts/init-bottom ... done.
6361 20:09:50.649596 <6>[ 6.482331] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6362 20:09:50.732499 <4>[ 6.565302] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6363 20:09:50.751253 <4>[ 6.584268] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6364 20:09:50.766428 <4>[ 6.599346] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6365 20:09:50.776072 <4>[ 6.612343] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6366 20:09:51.917889 <6>[ 7.754017] NET: Registered PF_INET6 protocol family
6367 20:09:51.929319 <6>[ 7.766124] Segment Routing with IPv6
6368 20:09:51.937419 <6>[ 7.774218] In-situ OAM (IOAM) with IPv6
6369 20:09:52.123069 <30>[ 7.933049] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6370 20:09:52.143576 <30>[ 7.979789] systemd[1]: Detected architecture arm64.
6371 20:09:52.157337
6372 20:09:52.160523 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6373 20:09:52.160949
6374 20:09:52.182855 <30>[ 8.019539] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6375 20:09:53.311008 <30>[ 9.143851] systemd[1]: Queued start job for default target graphical.target.
6376 20:09:53.346490 <30>[ 9.180018] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6377 20:09:53.359938 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6378 20:09:53.379007 <30>[ 9.212340] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6379 20:09:53.392363 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6380 20:09:53.411039 <30>[ 9.244650] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6381 20:09:53.425848 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6382 20:09:53.446686 <30>[ 9.279742] systemd[1]: Created slice user.slice - User and Session Slice.
6383 20:09:53.458673 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6384 20:09:53.481210 <30>[ 9.310679] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6385 20:09:53.494464 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6386 20:09:53.516497 <30>[ 9.346514] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6387 20:09:53.529065 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6388 20:09:53.555236 <30>[ 9.378452] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6389 20:09:53.574864 <30>[ 9.407782] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6390 20:09:53.582798 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6391 20:09:53.601182 <30>[ 9.434289] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6392 20:09:53.613918 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6393 20:09:53.632964 <30>[ 9.466337] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6394 20:09:53.647013 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6395 20:09:53.661981 <30>[ 9.498370] systemd[1]: Reached target paths.target - Path Units.
6396 20:09:53.676581 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6397 20:09:53.693112 <30>[ 9.526282] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6398 20:09:53.705223 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6399 20:09:53.717636 <30>[ 9.554286] systemd[1]: Reached target slices.target - Slice Units.
6400 20:09:53.732209 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6401 20:09:53.745673 <30>[ 9.582332] systemd[1]: Reached target swap.target - Swaps.
6402 20:09:53.756044 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6403 20:09:53.777342 <30>[ 9.610316] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6404 20:09:53.790446 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6405 20:09:53.809862 <30>[ 9.642705] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6406 20:09:53.823872 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6407 20:09:53.844558 <30>[ 9.677606] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6408 20:09:53.857710 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6409 20:09:53.878925 <30>[ 9.712196] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6410 20:09:53.893123 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6411 20:09:53.910375 <30>[ 9.743057] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6412 20:09:53.922175 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6413 20:09:53.942999 <30>[ 9.776072] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6414 20:09:53.956618 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6415 20:09:53.976860 <30>[ 9.809792] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6416 20:09:53.989956 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6417 20:09:54.009258 <30>[ 9.842907] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6418 20:09:54.022505 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6419 20:09:54.064989 <30>[ 9.898541] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6420 20:09:54.077507 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6421 20:09:54.099638 <30>[ 9.932824] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6422 20:09:54.113506 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6423 20:09:54.133530 <30>[ 9.966795] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6424 20:09:54.146167 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6425 20:09:54.168654 <30>[ 9.995277] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6426 20:09:54.209887 <30>[ 10.042892] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6427 20:09:54.222593 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6428 20:09:54.247488 <30>[ 10.080444] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6429 20:09:54.259426 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6430 20:09:54.283784 <30>[ 10.116592] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6431 20:09:54.295811 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6432 20:09:54.318628 <30>[ 10.151819] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6433 20:09:54.333147 Starting [0;1;39mmodprobe@drm.service<6>[ 10.166440] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6434 20:09:54.336659 [0m - Load Kernel Module drm...
6435 20:09:54.363840 <30>[ 10.197024] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6436 20:09:54.376032 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6437 20:09:54.396483 <30>[ 10.229905] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6438 20:09:54.407686 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6439 20:09:54.435286 <6>[ 10.271185] fuse: init (API version 7.37)
6440 20:09:54.454309 <30>[ 10.287497] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6441 20:09:54.466501 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6442 20:09:54.495638 <30>[ 10.328818] systemd[1]: Starting systemd-journald.service - Journal Service...
6443 20:09:54.505597 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6444 20:09:54.577657 <30>[ 10.410826] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6445 20:09:54.588049 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6446 20:09:54.618037 <30>[ 10.447922] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6447 20:09:54.629604 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6448 20:09:54.652873 <30>[ 10.485847] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6449 20:09:54.665120 Startin<3>[ 10.498485] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6450 20:09:54.671471 g [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6451 20:09:54.682730 <3>[ 10.515263] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6452 20:09:54.697769 <30>[ 10.529560] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6453 20:09:54.703789 <3>[ 10.535995] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6454 20:09:54.725880 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices..<3>[ 10.556940] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6455 20:09:54.726428 .
6456 20:09:54.741615 <3>[ 10.574834] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6457 20:09:54.759510 <3>[ 10.591630] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6458 20:09:54.766762 <30>[ 10.593015] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6459 20:09:54.773133 <3>[ 10.606790] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6460 20:09:54.793952 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File S<3>[ 10.625626] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6461 20:09:54.794399 ystem.
6462 20:09:54.814191 <30>[ 10.647007] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6463 20:09:54.825249 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6464 20:09:54.842096 <30>[ 10.675200] systemd[1]: Started systemd-journald.service - Journal Service.
6465 20:09:54.854050 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6466 20:09:54.877968 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6467 20:09:54.898747 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6468 20:09:54.923470 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6469 20:09:54.943554 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6470 20:09:54.964936 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6471 20:09:54.988412 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6472 20:09:55.011831 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6473 20:09:55.031842 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6474 20:09:55.051086 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6475 20:09:55.070513 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6476 20:09:55.091158 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6477 20:09:55.111857 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6478 20:09:55.153833 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6479 20:09:55.171018 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6480 20:09:55.191476 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6481 20:09:55.229263 <4>[ 11.055710] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6482 20:09:55.240613 <3>[ 11.073419] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6483 20:09:55.247087 <46>[ 11.074774] systemd-journald[313]: Received client request to flush runtime journal.
6484 20:09:55.261731 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6485 20:09:55.290199 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6486 20:09:55.312548 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6487 20:09:55.583291 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6488 20:09:55.602620 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6489 20:09:55.622586 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6490 20:09:56.041573 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6491 20:09:56.381799 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6492 20:09:56.738674 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6493 20:09:56.747331 <4>[ 12.583379] power_supply_show_property: 3 callbacks suppressed
6494 20:09:56.757818 <3>[ 12.583393] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6495 20:09:56.776209 <3>[ 12.608755] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6496 20:09:56.799374 Starting [0;1;39msystemd-tmpfiles-…a<3>[ 12.630950] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6497 20:09:56.802900 te Static Device Nodes in /dev...
6498 20:09:56.817543 <3>[ 12.650462] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6499 20:09:56.833597 <3>[ 12.666467] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6500 20:09:56.849509 <3>[ 12.682678] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6501 20:09:56.868317 <3>[ 12.701001] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6502 20:09:56.884532 <3>[ 12.717505] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6503 20:09:56.902855 <3>[ 12.735821] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6504 20:09:56.920662 <3>[ 12.753080] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6505 20:09:56.942493 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6506 20:09:56.983949 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6507 20:09:57.002799 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6508 20:09:57.022648 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6509 20:09:57.066545 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6510 20:09:57.091917 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6511 20:09:57.375474 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6512 20:09:57.437857 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6513 20:09:57.481340 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6514 20:09:57.701784 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6515 20:09:57.765934 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6516 20:09:57.781343 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6517 20:09:57.800929 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6518 20:09:57.853722 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6519 20:09:57.899797 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6520 20:09:57.923349 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6521 20:09:57.997797 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6522 20:09:58.015745 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6523 20:09:58.062740 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6524 20:09:58.082408 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6525 20:09:58.103640 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6526 20:09:58.122918 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6527 20:09:58.145826 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6528 20:09:58.214809 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6529 20:09:58.234801 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6530 20:09:58.255016 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6531 20:09:58.277462 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6532 20:09:58.327949 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6533 20:09:58.349072 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6534 20:09:58.366096 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6535 20:09:58.389360 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6536 20:09:58.409400 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6537 20:09:58.426473 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6538 20:09:58.445659 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6539 20:09:58.462124 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6540 20:09:58.482575 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6541 20:09:58.518797 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6542 20:09:58.555109 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6543 20:09:58.662965 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6544 20:09:58.690477 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6545 20:09:58.850883 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6546 20:09:58.896199 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6547 20:09:58.949752 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6548 20:09:58.974242 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6549 20:09:58.997910 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6550 20:09:59.030103 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6551 20:09:59.054986 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6552 20:09:59.075362 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6553 20:09:59.096000 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6554 20:09:59.143067 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6555 20:09:59.208813 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6556 20:09:59.295192
6557 20:09:59.298553 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6558 20:09:59.298971
6559 20:09:59.301939 debian-bookworm-arm64 login: root (automatic login)
6560 20:09:59.302404
6561 20:09:59.563465 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Tue May 28 13:24:21 UTC 2024 aarch64
6562 20:09:59.563990
6563 20:09:59.570119 The programs included with the Debian GNU/Linux system are free software;
6564 20:09:59.576241 the exact distribution terms for each program are described in the
6565 20:09:59.579519 individual files in /usr/share/doc/*/copyright.
6566 20:09:59.579935
6567 20:09:59.586260 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6568 20:09:59.589461 permitted by applicable law.
6569 20:09:59.691523 Matched prompt #10: / #
6571 20:09:59.692672 Setting prompt string to ['/ #']
6572 20:09:59.693105 end: 2.2.5.1 login-action (duration 00:00:16) [common]
6574 20:09:59.694087 end: 2.2.5 auto-login-action (duration 00:00:16) [common]
6575 20:09:59.694526 start: 2.2.6 expect-shell-connection (timeout 00:03:50) [common]
6576 20:09:59.694882 Setting prompt string to ['/ #']
6577 20:09:59.695192 Forcing a shell prompt, looking for ['/ #']
6579 20:09:59.746044 / #
6580 20:09:59.746675 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6581 20:09:59.747117 Waiting using forced prompt support (timeout 00:02:30)
6582 20:09:59.751919
6583 20:09:59.752824 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6584 20:09:59.753375 start: 2.2.7 export-device-env (timeout 00:03:50) [common]
6586 20:09:59.854670 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz'
6587 20:09:59.860922 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14063016/extract-nfsrootfs-4p9tfzqz'
6589 20:09:59.962786 / # export NFS_SERVER_IP='192.168.201.1'
6590 20:09:59.969285 export NFS_SERVER_IP='192.168.201.1'
6591 20:09:59.970246 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6592 20:09:59.970815 end: 2.2 depthcharge-retry (duration 00:01:11) [common]
6593 20:09:59.971367 end: 2 depthcharge-action (duration 00:01:11) [common]
6594 20:09:59.972008 start: 3 lava-test-retry (timeout 00:30:00) [common]
6595 20:09:59.972519 start: 3.1 lava-test-shell (timeout 00:30:00) [common]
6596 20:09:59.972950 Using namespace: common
6598 20:10:00.074306 / # #
6599 20:10:00.074953 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:30:00)
6600 20:10:00.080118 #
6601 20:10:00.080830 Using /lava-14063016
6603 20:10:00.181907 / # export SHELL=/bin/sh
6604 20:10:00.188110 export SHELL=/bin/sh
6606 20:10:00.289976 / # . /lava-14063016/environment
6607 20:10:00.296274 . /lava-14063016/environment
6609 20:10:00.404528 / # /lava-14063016/bin/lava-test-runner /lava-14063016/0
6610 20:10:00.405214 Test shell timeout: 10s (minimum of the action and connection timeout)
6611 20:10:00.410889 /lava-14063016/bin/lava-test-runner /lava-14063016/0
6612 20:10:00.635987 + export TESTRUN_ID=0_lc-compliance
6613 20:10:00.641834 + cd /lava-14063016/0/tests/0_lc-compliance
6614 20:10:00.641934 + cat uuid
6615 20:10:00.648234 + UUID=14063016_1.6.2.3.1
6616 20:10:00.648326 + set +x
6617 20:10:00.654905 <LAVA_SIGNAL_STARTRUN 0_lc-compliance 14063016_1.6.2.3.1>
6618 20:10:00.655182 Received signal: <STARTRUN> 0_lc-compliance 14063016_1.6.2.3.1
6619 20:10:00.655265 Starting test lava.0_lc-compliance (14063016_1.6.2.3.1)
6620 20:10:00.655361 Skipping test definition patterns.
6621 20:10:00.658059 + /usr/bin/lc-compliance-parser.sh
6622 20:10:02.340248 [0:00:18.183596989] [423] [1;32m INFO [1;37mCamera [1;34mcamera_manager.cpp:284 [0mlibcamera v0.0.0+1-01935edb
6623 20:10:02.346546 Using camera /base/soc/usb@11201000/usb@11200000/hub@1-1.3:1.0-04f2:b567
6624 20:10:02.396710 [0:00:18.242212135] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6625 20:10:02.408356 [==========] Running 120 tests from 1 test suite.
6626 20:10:02.467902 [0:00:18.315578618] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6627 20:10:02.470733 [----------] Global test environment set-up.
6628 20:10:02.534304 [0:00:18.384568985] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6629 20:10:02.548237 [----------] 120 tests from CaptureTests/SingleStream
6630 20:10:02.603148 [0:00:18.454840634] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6631 20:10:02.629290 [ RUN ] CaptureTests/SingleStream.Capture/Raw_1
6632 20:10:02.693827 <LAVA_SIGNAL_TESTSET START CaptureTests/SingleStream>
6633 20:10:02.694546 Received signal: <TESTSET> START CaptureTests/SingleStream
6634 20:10:02.694916 Starting test_set CaptureTests/SingleStream
6635 20:10:02.696908 Camera needs 4 requests, can't test only 1
6636 20:10:02.776129 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6637 20:10:02.846811
6638 20:10:02.930864 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_1 (72 ms)
6639 20:10:03.027670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_1 RESULT=skip>
6640 20:10:03.028315 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_1 RESULT=skip
6642 20:10:03.043636 [ RUN ] CaptureTests/SingleStream.Capture/Raw_2
6643 20:10:03.096094 Camera needs 4 requests, can't test only 2
6644 20:10:03.180767 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6645 20:10:03.227364 [0:00:19.097294546] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6646 20:10:03.250515
6647 20:10:03.318600 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_2 (67 ms)
6648 20:10:03.388282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_2 RESULT=skip>
6649 20:10:03.388588 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_2 RESULT=skip
6651 20:10:03.399631 [ RUN ] CaptureTests/SingleStream.Capture/Raw_3
6652 20:10:03.439918 Camera needs 4 requests, can't test only 3
6653 20:10:03.512396 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6654 20:10:03.577734
6655 20:10:03.650600 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_3 (71 ms)
6656 20:10:03.723326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_3 RESULT=skip>
6657 20:10:03.724066 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_3 RESULT=skip
6659 20:10:03.738019 [ RUN ] CaptureTests/SingleStream.Capture/Raw_5
6660 20:10:03.790494 [ OK ] CaptureTests/SingleStream.Capture/Raw_5 (498 ms)
6661 20:10:03.824927 [0:00:19.711193752] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6662 20:10:03.879506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_5 RESULT=pass>
6663 20:10:03.880234 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_5 RESULT=pass
6665 20:10:03.894911 [ RUN ] CaptureTests/SingleStream.Capture/Raw_8
6666 20:10:03.943381 [ OK ] CaptureTests/SingleStream.Capture/Raw_8 (714 ms)
6667 20:10:04.018731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_8 RESULT=pass>
6668 20:10:04.019502 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_8 RESULT=pass
6670 20:10:04.033027 [ RUN ] CaptureTests/SingleStream.Capture/Raw_13
6671 20:10:04.500545 [ OK ] CaptureTests/SingleStream.Capture/Raw_13 (784 ms)
6672 20:10:04.546726 [0:00:20.451361188] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6673 20:10:04.587793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_13 RESULT=pass>
6674 20:10:04.588510 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_13 RESULT=pass
6676 20:10:04.602475 [ RUN ] CaptureTests/SingleStream.Capture/Raw_21
6677 20:10:05.942052 [ OK ] CaptureTests/SingleStream.Capture/Raw_21 (1472 ms)
6678 20:10:05.987478 [0:00:21.923253055] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6679 20:10:06.009568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_21 RESULT=pass>
6680 20:10:06.009890 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_21 RESULT=pass
6682 20:10:06.022693 [ RUN ] CaptureTests/SingleStream.Capture/Raw_34
6683 20:10:09.754826 [ OK ] CaptureTests/SingleStream.Capture/Raw_34 (3870 ms)
6684 20:10:09.799521 [0:00:25.792495453] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6685 20:10:09.825941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_34 RESULT=pass>
6686 20:10:09.826277 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_34 RESULT=pass
6688 20:10:09.836305 [ RUN ] CaptureTests/SingleStream.Capture/Raw_55
6689 20:10:15.658389 [ OK ] CaptureTests/SingleStream.Capture/Raw_55 (5951 ms)
6690 20:10:15.702984 [0:00:31.743846774] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6691 20:10:15.724602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_55 RESULT=pass>
6692 20:10:15.724937 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_55 RESULT=pass
6694 20:10:15.735593 [ RUN ] CaptureTests/SingleStream.Capture/Raw_89
6695 20:10:19.737991 <6>[ 35.577412] vaux18: disabling
6696 20:10:19.741691 <6>[ 35.580947] vio28: disabling
6697 20:10:24.956191 [ OK ] CaptureTests/SingleStream.Capture/Raw_89 (9325 ms)
6698 20:10:25.001341 [0:00:41.069325158] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6699 20:10:25.048757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_89 RESULT=pass>
6700 20:10:25.049565 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_89 RESULT=pass
6702 20:10:25.063916 [0:00:41.131588659] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6703 20:10:25.067237 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_1
6704 20:10:25.121557 Camera needs 4 requests, can't test only 1
6705 20:10:25.130991 [0:00:41.197534383] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6706 20:10:25.195573 [0:00:41.263538196] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6707 20:10:25.198661 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6708 20:10:25.272669
6709 20:10:25.353657 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_1 (62 ms)
6710 20:10:25.443595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip>
6711 20:10:25.444286 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip
6713 20:10:25.460762 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_2
6714 20:10:25.519126 Camera needs 4 requests, can't test only 2
6715 20:10:25.595223 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6716 20:10:25.673630
6717 20:10:25.752763 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_2 (65 ms)
6718 20:10:25.826689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip>
6719 20:10:25.827498 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip
6721 20:10:25.840677 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_3
6722 20:10:25.885368 Camera needs 4 requests, can't test only 3
6723 20:10:25.944556 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6724 20:10:25.999217
6725 20:10:26.058804 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_3 (64 ms)
6726 20:10:26.121012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip>
6727 20:10:26.121338 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip
6729 20:10:26.131879 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_5
6730 20:10:26.703912 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_5 (1557 ms)
6731 20:10:26.748367 [0:00:42.819088818] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6732 20:10:26.768742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass>
6733 20:10:26.769035 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass
6735 20:10:26.779821 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_8
6736 20:10:27.922735 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_8 (1220 ms)
6737 20:10:27.970897 [0:00:44.042527970] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6738 20:10:27.992595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass>
6739 20:10:27.992885 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass
6741 20:10:28.003169 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_13
6742 20:10:29.645657 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_13 (1721 ms)
6743 20:10:29.691036 [0:00:45.763908280] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6744 20:10:29.712586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass>
6745 20:10:29.712879 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass
6747 20:10:29.724190 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_21
6748 20:10:32.162137 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_21 (2517 ms)
6749 20:10:32.207926 [0:00:48.282647279] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6750 20:10:32.229753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass>
6751 20:10:32.230047 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass
6753 20:10:32.241232 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_34
6754 20:10:35.974457 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_34 (3813 ms)
6755 20:10:36.019870 [0:00:52.096385012] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6756 20:10:36.039188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass>
6757 20:10:36.039435 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass
6759 20:10:36.050998 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_55
6760 20:10:41.878542 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_55 (5905 ms)
6761 20:10:41.922272 [0:00:58.000294327] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6762 20:10:41.943343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass>
6763 20:10:41.943692 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass
6765 20:10:41.955286 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_89
6766 20:10:51.174227 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_89 (9296 ms)
6767 20:10:51.221823 [0:01:07.300252657] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6768 20:10:51.248279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass>
6769 20:10:51.248589 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass
6771 20:10:51.261932 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_1
6772 20:10:51.286618 [0:01:07.364734292] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6773 20:10:51.304685 Camera needs 4 requests, can't test only 1
6774 20:10:51.348225 [0:01:07.426871148] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6775 20:10:51.363526 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6776 20:10:51.414492 [0:01:07.493244014] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6777 20:10:51.414637
6778 20:10:51.474330 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_1 (64 ms)
6779 20:10:51.533057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip>
6780 20:10:51.533382 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip
6782 20:10:51.544897 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_2
6783 20:10:51.582880 Camera needs 4 requests, can't test only 2
6784 20:10:51.640997 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6785 20:10:51.697175
6786 20:10:51.758001 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_2 (64 ms)
6787 20:10:51.820367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip>
6788 20:10:51.820693 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip
6790 20:10:51.833106 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_3
6791 20:10:51.875754 Camera needs 4 requests, can't test only 3
6792 20:10:51.933706 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6793 20:10:51.989763
6794 20:10:52.046459 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_3 (66 ms)
6795 20:10:52.109338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip>
6796 20:10:52.109690 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip
6798 20:10:52.120344 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_5
6799 20:10:52.926864 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_5 (1556 ms)
6800 20:10:52.971260 [0:01:09.049720673] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6801 20:10:52.994460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass>
6802 20:10:52.994781 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass
6804 20:10:53.006317 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_8
6805 20:10:54.145655 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_8 (1218 ms)
6806 20:10:54.190040 [0:01:10.268437172] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6807 20:10:54.212190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass>
6808 20:10:54.212486 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass
6810 20:10:54.222613 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_13
6811 20:10:55.865416 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_13 (1719 ms)
6812 20:10:55.909084 [0:01:11.987491642] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6813 20:10:55.927048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass>
6814 20:10:55.927385 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass
6816 20:10:55.939106 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_21
6817 20:10:58.379377 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_21 (2514 ms)
6818 20:10:58.424890 [0:01:14.503033354] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6819 20:10:58.457970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass>
6820 20:10:58.458297 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass
6822 20:10:58.469885 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_34
6823 20:11:02.191715 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_34 (3812 ms)
6824 20:11:02.236889 [0:01:18.314988533] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6825 20:11:02.262922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass>
6826 20:11:02.263210 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass
6828 20:11:02.275164 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_55
6829 20:11:08.095583 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_55 (5903 ms)
6830 20:11:08.140230 [0:01:24.218337621] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6831 20:11:08.164769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass>
6832 20:11:08.165076 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass
6834 20:11:08.178288 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_89
6835 20:11:17.390543 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_89 (9294 ms)
6836 20:11:17.435958 [0:01:33.514325487] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6837 20:11:17.463575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass>
6838 20:11:17.463860 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass
6840 20:11:17.475925 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_1
6841 20:11:17.503817 [0:01:33.581922191] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6842 20:11:17.512635 Camera needs 4 requests, can't test only 1
6843 20:11:17.569763 [0:01:33.648051585] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6844 20:11:17.573050 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6845 20:11:17.635514 [0:01:33.713811286] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6846 20:11:17.635640
6847 20:11:17.688886 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_1 (65 ms)
6848 20:11:17.757667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip>
6849 20:11:17.757984 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip
6851 20:11:17.768956 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_2
6852 20:11:17.811091 Camera needs 4 requests, can't test only 2
6853 20:11:17.871790 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6854 20:11:17.924926
6855 20:11:17.987895 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_2 (66 ms)
6856 20:11:18.048912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip>
6857 20:11:18.049225 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip
6859 20:11:18.061978 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_3
6860 20:11:18.098403 Camera needs 4 requests, can't test only 3
6861 20:11:18.153377 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6862 20:11:18.206048
6863 20:11:18.261868 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_3 (67 ms)
6864 20:11:18.342389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip>
6865 20:11:18.342702 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip
6867 20:11:18.358230 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_5
6868 20:11:19.141688 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_5 (1550 ms)
6869 20:11:19.186106 [0:01:35.264222472] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6870 20:11:19.213380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass>
6871 20:11:19.213671 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass
6873 20:11:19.227699 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_8
6874 20:11:20.363267 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_8 (1221 ms)
6875 20:11:20.409019 [0:01:36.486959543] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6876 20:11:20.437918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass>
6877 20:11:20.438210 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass
6879 20:11:20.451445 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_13
6880 20:11:22.086936 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_13 (1723 ms)
6881 20:11:22.131065 [0:01:38.209158419] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6882 20:11:22.147852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass>
6883 20:11:22.148133 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass
6885 20:11:22.158317 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_21
6886 20:11:24.601487 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_21 (2515 ms)
6887 20:11:24.646668 [0:01:40.724970366] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6888 20:11:24.674854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass>
6889 20:11:24.675146 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass
6891 20:11:24.689658 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_34
6892 20:11:28.414336 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_34 (3812 ms)
6893 20:11:28.459887 [0:01:44.537491163] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6894 20:11:28.488828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass>
6895 20:11:28.489146 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass
6897 20:11:28.503557 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_55
6898 20:11:34.318791 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_55 (5904 ms)
6899 20:11:34.364468 [0:01:50.442217372] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6900 20:11:34.405118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass>
6901 20:11:34.405417 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass
6903 20:11:34.418843 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_89
6904 20:11:43.615778 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_89 (9296 ms)
6905 20:11:43.660679 [0:01:59.738062210] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6906 20:11:43.689287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass>
6907 20:11:43.689585 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass
6909 20:11:43.702274 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_1
6910 20:11:43.723237 [0:01:59.800878751] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6911 20:11:43.749490 Camera needs 4 requests, can't test only 1
6912 20:11:43.787668 [0:01:59.865295292] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6913 20:11:43.813205 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6914 20:11:43.853536 [0:01:59.930831910] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6915 20:11:43.881766
6916 20:11:43.957125 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_1 (62 ms)
6917 20:11:44.040274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip>
6918 20:11:44.041168 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip
6920 20:11:44.053520 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_2
6921 20:11:44.100575 Camera needs 4 requests, can't test only 2
6922 20:11:44.175442 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6923 20:11:44.238365
6924 20:11:44.313044 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_2 (63 ms)
6925 20:11:44.375038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip>
6926 20:11:44.375445 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip
6928 20:11:44.391260 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_3
6929 20:11:44.441247 Camera needs 4 requests, can't test only 3
6930 20:11:44.519533 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6931 20:11:44.606173
6932 20:11:44.697999 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_3 (64 ms)
6933 20:11:44.793971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip>
6934 20:11:44.794786 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip
6936 20:11:44.809564 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_5
6937 20:11:47.109439 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_5 (3301 ms)
6938 20:11:47.154823 [0:02:03.231736479] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6939 20:11:47.189313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass>
6940 20:11:47.190216 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass
6942 20:11:47.203913 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_8
6943 20:11:50.676376 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_8 (3567 ms)
6944 20:11:50.721400 [0:02:06.799177092] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6945 20:11:50.743214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass>
6946 20:11:50.743534 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass
6948 20:11:50.755450 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_13
6949 20:11:55.740746 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_13 (5061 ms)
6950 20:11:55.785452 [0:02:11.862218766] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6951 20:11:55.809931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass>
6952 20:11:55.810684 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass
6954 20:11:55.825134 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_21
6955 20:12:03.187775 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_21 (7447 ms)
6956 20:12:03.235577 [0:02:19.312477421] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6957 20:12:03.272368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass>
6958 20:12:03.273112 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass
6960 20:12:03.287205 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_34
6961 20:12:14.527583 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_34 (11337 ms)
6962 20:12:14.574568 [0:02:30.651207824] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6963 20:12:14.602979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass>
6964 20:12:14.603270 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass
6966 20:12:14.614477 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_55
6967 20:12:32.141147 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_55 (17612 ms)
6968 20:12:32.185541 [0:02:48.261703676] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6969 20:12:32.230477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass>
6970 20:12:32.231001 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass
6972 20:12:32.244626 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_89
6973 20:12:59.936824 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_89 (27794 ms)
6974 20:12:59.981986 [0:03:16.057310909] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6975 20:13:00.021339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass>
6976 20:13:00.022001 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass
6978 20:13:00.037126 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1
6979 20:13:00.050272 [0:03:16.121299139] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6980 20:13:00.088512 Camera needs 4 requests, can't test only 1
6981 20:13:00.110959 [0:03:16.186372216] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6982 20:13:00.163990 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6983 20:13:00.173636 [0:03:16.250347985] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6984 20:13:00.237348
6985 20:13:00.316309 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1 (63 ms)
6986 20:13:00.400818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip>
6987 20:13:00.401493 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip
6989 20:13:00.411983 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2
6990 20:13:00.460030 Camera needs 4 requests, can't test only 2
6991 20:13:00.532895 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6992 20:13:00.606230
6993 20:13:00.693679 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2 (64 ms)
6994 20:13:00.771980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip>
6995 20:13:00.772699 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip
6997 20:13:00.783721 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3
6998 20:13:00.839463 Camera needs 4 requests, can't test only 3
6999 20:13:00.923745 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7000 20:13:01.005350
7001 20:13:01.090892 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3 (62 ms)
7002 20:13:01.175338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip>
7003 20:13:01.176104 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip
7005 20:13:01.187520 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5
7006 20:13:03.432173 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5 (3300 ms)
7007 20:13:03.476335 [0:03:19.551683140] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7008 20:13:03.521975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass>
7009 20:13:03.522785 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass
7011 20:13:03.532575 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8
7012 20:13:06.995805 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8 (3563 ms)
7013 20:13:07.040520 [0:03:23.115990755] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7014 20:13:07.076902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass>
7015 20:13:07.077216 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass
7017 20:13:07.087989 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13
7018 20:13:12.066795 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13 (5071 ms)
7019 20:13:12.108643 [0:03:28.184158448] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7020 20:13:12.147376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass>
7021 20:13:12.147709 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass
7023 20:13:12.161461 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21
7024 20:13:19.527089 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21 (7459 ms)
7025 20:13:19.567478 [0:03:35.642963064] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7026 20:13:19.600052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass>
7027 20:13:19.600389 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass
7029 20:13:19.611091 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34
7030 20:13:30.864302 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34 (11336 ms)
7031 20:13:30.905455 [0:03:46.979965910] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7032 20:13:30.954298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass>
7033 20:13:30.955049 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass
7035 20:13:30.968063 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55
7036 20:13:48.475819 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55 (17610 ms)
7037 20:13:48.516173 [0:04:04.590798527] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7038 20:13:48.546459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass>
7039 20:13:48.546843 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass
7041 20:13:48.554160 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89
7042 20:14:16.268856 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89 (27792 ms)
7043 20:14:16.309688 [0:04:32.383401144] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7044 20:14:16.363348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass>
7045 20:14:16.364119 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass
7047 20:14:16.372990 [0:04:32.446499221] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7048 20:14:16.379483 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1
7049 20:14:16.423366 Camera needs 4 requests, can't test only 1
7050 20:14:16.437217 [0:04:32.510493452] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7051 20:14:16.495042 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7052 20:14:16.504822 [0:04:32.577486375] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7053 20:14:16.570561
7054 20:14:16.653342 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1 (61 ms)
7055 20:14:16.735099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip>
7056 20:14:16.736051 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip
7058 20:14:16.747367 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2
7059 20:14:16.795096 Camera needs 4 requests, can't test only 2
7060 20:14:16.873359 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7061 20:14:16.945304
7062 20:14:17.028658 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2 (64 ms)
7063 20:14:17.113541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip>
7064 20:14:17.114274 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip
7066 20:14:17.127397 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3
7067 20:14:17.181328 Camera needs 4 requests, can't test only 3
7068 20:14:17.257687 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7069 20:14:17.325810
7070 20:14:17.409870 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3 (64 ms)
7071 20:14:17.501153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip>
7072 20:14:17.501881 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip
7074 20:14:17.510967 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5
7075 20:14:19.762188 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5 (3303 ms)
7076 20:14:19.803993 [0:04:35.877511836] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7077 20:14:19.827460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass>
7078 20:14:19.827738 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass
7080 20:14:19.837144 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8
7081 20:14:23.324044 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8 (3560 ms)
7082 20:14:23.365505 [0:04:39.439165990] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7083 20:14:23.403533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass>
7084 20:14:23.404188 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass
7086 20:14:23.413828 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13
7087 20:14:28.384078 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13 (5060 ms)
7088 20:14:28.426503 [0:04:44.499861068] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7089 20:14:28.450448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass>
7090 20:14:28.450765 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass
7092 20:14:28.460230 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21
7093 20:14:35.832294 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21 (7448 ms)
7094 20:14:35.873322 [0:04:51.946332683] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7095 20:14:35.922859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass>
7096 20:14:35.923198 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass
7098 20:14:35.932847 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34
7099 20:14:47.167625 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34 (11334 ms)
7100 20:14:47.208545 [0:05:03.281777376] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7101 20:14:47.232417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass>
7102 20:14:47.232759 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass
7104 20:14:47.241194 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55
7105 20:15:04.781266 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55 (17613 ms)
7106 20:15:04.821964 [0:05:20.894565916] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7107 20:15:04.863498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass>
7108 20:15:04.863814 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass
7110 20:15:04.872192 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89
7111 20:15:34.143587 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89 (27787 ms)
7112 20:15:34.144325 [0:05:48.682844533] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7113 20:15:34.144985 [0:05:48.748290225] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7114 20:15:34.145578 [0:05:48.812467071] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7115 20:15:34.146222 [0:05:48.878000841] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7116 20:15:34.234732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass>
7117 20:15:34.235064 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass
7119 20:15:34.241863 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1
7120 20:15:34.279764 Camera needs 4 requests, can't test only 1
7121 20:15:34.341536 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7122 20:15:34.395447
7123 20:15:34.460552 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1 (65 ms)
7124 20:15:34.522543 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip
7126 20:15:34.525271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip>
7127 20:15:34.533410 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2
7128 20:15:34.576010 Camera needs 4 requests, can't test only 2
7129 20:15:34.637332 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7130 20:15:34.694829
7131 20:15:34.764759 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2 (64 ms)
7132 20:15:34.827978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip>
7133 20:15:34.828310 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip
7135 20:15:34.837956 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3
7136 20:15:34.880059 Camera needs 4 requests, can't test only 3
7137 20:15:34.937656 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7138 20:15:34.995302
7139 20:15:35.056864 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3 (64 ms)
7140 20:15:35.123068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip>
7141 20:15:35.123428 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip
7143 20:15:35.131044 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5
7144 20:15:36.064677 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5 (3298 ms)
7145 20:15:36.105877 [0:05:52.177360610] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7146 20:15:36.136980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass>
7147 20:15:36.137295 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass
7149 20:15:36.145317 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8
7150 20:15:39.629781 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8 (3565 ms)
7151 20:15:39.671296 [0:05:55.743086072] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7152 20:15:39.693236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass>
7153 20:15:39.693514 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass
7155 20:15:39.702315 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13
7156 20:15:44.690260 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13 (5059 ms)
7157 20:15:44.730960 [0:06:00.802316765] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7158 20:15:44.768023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass>
7159 20:15:44.768305 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass
7161 20:15:44.778145 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21
7162 20:15:52.143473 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21 (7453 ms)
7163 20:15:52.185476 [0:06:08.256230226] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7164 20:15:52.244398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass>
7165 20:15:52.245122 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass
7167 20:15:52.259708 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34
7168 20:16:03.486847 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34 (11343 ms)
7169 20:16:03.527536 [0:06:19.598560227] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7170 20:16:03.575202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass>
7171 20:16:03.575546 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass
7173 20:16:03.586592 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55
7174 20:16:21.108298 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55 (17620 ms)
7175 20:16:21.149624 [0:06:37.219847074] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7176 20:16:21.190437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass>
7177 20:16:21.191301 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass
7179 20:16:21.201261 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89
7180 20:16:48.900762 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89 (27792 ms)
7181 20:16:48.942653 [0:07:05.012709230] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7182 20:16:48.982493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass>
7183 20:16:48.982812 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass
7185 20:16:48.993484 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_1
7186 20:16:49.426769 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_1 (528 ms)
7187 20:16:49.499379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass>
7188 20:16:49.499794 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass
7190 20:16:49.510477 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_2
7191 20:16:49.675366 [0:07:05.744995230] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7192 20:16:50.259908 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_2 (832 ms)
7193 20:16:50.343512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass>
7194 20:16:50.344371 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass
7196 20:16:50.359536 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_3
7197 20:16:50.408602 [0:07:06.478395922] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7198 20:16:51.089295 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_3 (829 ms)
7199 20:16:51.146751 [0:07:07.216955692] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7200 20:16:51.153205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass>
7201 20:16:51.153529 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass
7203 20:16:51.166351 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_5
7204 20:16:52.027650 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_5 (937 ms)
7205 20:16:52.071527 [0:07:08.141947461] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7206 20:16:52.090319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass>
7207 20:16:52.090604 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass
7209 20:16:52.102512 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_8
7210 20:16:53.249148 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_8 (1221 ms)
7211 20:16:53.294833 [0:07:09.365211153] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7212 20:16:53.312925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass>
7213 20:16:53.313244 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass
7215 20:16:53.323625 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_13
7216 20:16:54.972945 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_13 (1723 ms)
7217 20:16:55.017413 [0:07:11.087403307] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7218 20:16:55.045743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass>
7219 20:16:55.046050 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass
7221 20:16:55.056200 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_21
7222 20:16:57.492535 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_21 (2520 ms)
7223 20:16:57.537537 [0:07:13.607421153] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7224 20:16:57.560345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass>
7225 20:16:57.560670 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass
7227 20:16:57.570186 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_34
7228 20:17:01.306633 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_34 (3813 ms)
7229 20:17:01.353988 [0:07:17.423496077] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7230 20:17:01.406473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass>
7231 20:17:01.407287 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass
7233 20:17:01.423289 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_55
7234 20:17:07.216360 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_55 (5909 ms)
7235 20:17:07.261067 [0:07:23.330772846] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7236 20:17:07.283152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass>
7237 20:17:07.283558 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass
7239 20:17:07.294060 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_89
7240 20:17:16.513933 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_89 (9297 ms)
7241 20:17:16.560219 [0:07:32.629696155] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7242 20:17:16.583142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass>
7243 20:17:16.583433 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass
7245 20:17:16.595539 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1
7246 20:17:17.046684 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1 (529 ms)
7247 20:17:17.108244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass>
7248 20:17:17.108606 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass
7250 20:17:17.115305 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2
7251 20:17:17.296709 [0:07:33.366105770] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7252 20:17:17.884419 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2 (837 ms)
7253 20:17:17.956467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass>
7254 20:17:17.956851 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass
7256 20:17:17.968466 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3
7257 20:17:18.021803 [0:07:34.090995078] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7258 20:17:18.710100 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3 (825 ms)
7259 20:17:18.755699 [0:07:34.825007847] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7260 20:17:18.804635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass>
7261 20:17:18.805468 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass
7263 20:17:18.816889 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5
7264 20:17:19.637934 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5 (928 ms)
7265 20:17:19.679437 [0:07:35.748900770] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7266 20:17:19.733890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass>
7267 20:17:19.734376 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass
7269 20:17:19.749696 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8
7270 20:17:20.861977 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8 (1223 ms)
7271 20:17:20.904275 [0:07:36.973380232] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7272 20:17:20.949244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass>
7273 20:17:20.949553 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass
7275 20:17:20.960662 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13
7276 20:17:22.585747 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13 (1724 ms)
7277 20:17:22.628336 [0:07:38.697043232] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7278 20:17:22.657106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass>
7279 20:17:22.657409 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass
7281 20:17:22.665130 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21
7282 20:17:25.105318 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21 (2519 ms)
7283 20:17:25.147257 [0:07:41.216613847] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7284 20:17:25.170596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass>
7285 20:17:25.171003 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass
7287 20:17:25.180883 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34
7288 20:17:28.919903 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34 (3814 ms)
7289 20:17:28.961390 [0:07:45.030492001] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7290 20:17:28.997499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass>
7291 20:17:28.997823 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass
7293 20:17:29.006873 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55
7294 20:17:34.824822 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55 (5904 ms)
7295 20:17:34.866254 [0:07:50.935300771] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7296 20:17:34.887173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass>
7297 20:17:34.887512 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass
7299 20:17:34.897511 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89
7300 20:17:44.122613 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89 (9297 ms)
7301 20:17:44.164407 [0:08:00.233359618] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7302 20:17:44.195029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass>
7303 20:17:44.195353 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass
7305 20:17:44.205680 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1
7306 20:17:44.649108 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1 (526 ms)
7307 20:17:44.723209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass>
7308 20:17:44.723532 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass
7310 20:17:44.732508 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2
7311 20:17:44.896946 [0:08:00.965504772] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7312 20:17:45.484424 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2 (835 ms)
7313 20:17:45.544689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass>
7314 20:17:45.544999 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass
7316 20:17:45.552480 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3
7317 20:17:45.626592 [0:08:01.695323002] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7318 20:17:46.310169 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3 (825 ms)
7319 20:17:46.388042 [0:08:02.428305003] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7320 20:17:46.425738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass>
7321 20:17:46.426158 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass
7323 20:17:46.437854 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5
7324 20:17:47.242429 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5 (931 ms)
7325 20:17:47.284450 [0:08:03.352841156] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7326 20:17:47.330789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass>
7327 20:17:47.331597 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass
7329 20:17:47.341934 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8
7330 20:17:48.462532 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8 (1219 ms)
7331 20:17:48.503966 [0:08:04.572266003] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7332 20:17:48.553640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass>
7333 20:17:48.554261 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass
7335 20:17:48.577333 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13
7336 20:17:50.181507 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13 (1719 ms)
7337 20:17:50.222681 [0:08:06.291417387] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7338 20:17:50.251752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass>
7339 20:17:50.252064 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass
7341 20:17:50.258413 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21
7342 20:17:52.697155 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21 (2514 ms)
7343 20:17:52.737219 [0:08:08.806054157] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7344 20:17:52.773343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass>
7345 20:17:52.773645 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass
7347 20:17:52.783988 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34
7348 20:17:56.508144 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34 (3810 ms)
7349 20:17:56.548351 [0:08:12.616781695] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7350 20:17:56.593144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass>
7351 20:17:56.593486 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass
7353 20:17:56.605174 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55
7354 20:18:02.409813 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55 (5901 ms)
7355 20:18:02.450846 [0:08:18.518857003] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7356 20:18:02.475246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass>
7357 20:18:02.475532 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass
7359 20:18:02.483246 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89
7360 20:18:11.705022 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89 (9294 ms)
7361 20:18:11.745916 [0:08:27.813988235] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7362 20:18:11.775460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass>
7363 20:18:11.775754 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass
7365 20:18:11.785828 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1
7366 20:18:12.232554 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1 (528 ms)
7367 20:18:12.296355 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass
7369 20:18:12.299760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass>
7370 20:18:12.307876 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2
7371 20:18:12.479396 [0:08:28.547359696] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7372 20:18:13.068436 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2 (835 ms)
7373 20:18:13.130736 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass
7375 20:18:13.133918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass>
7376 20:18:13.142069 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3
7377 20:18:13.215236 [0:08:29.283331466] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7378 20:18:13.902206 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3 (833 ms)
7379 20:18:13.951199 [0:08:30.019213543] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7380 20:18:13.968664 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass
7382 20:18:13.971349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass>
7383 20:18:13.981792 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5
7384 20:18:14.832101 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5 (929 ms)
7385 20:18:14.873731 [0:08:30.941854158] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7386 20:18:14.894283 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass
7388 20:18:14.897198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass>
7389 20:18:14.906265 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8
7390 20:18:16.053697 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8 (1221 ms)
7391 20:18:16.095330 [0:08:32.163259927] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7392 20:18:16.122040 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass
7394 20:18:16.125498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass>
7395 20:18:16.134963 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13
7396 20:18:17.775760 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13 (1722 ms)
7397 20:18:17.817770 [0:08:33.885755620] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7398 20:18:17.838583 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass
7400 20:18:17.841441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass>
7401 20:18:17.850916 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21
7402 20:18:20.291711 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21 (2515 ms)
7403 20:18:20.334828 [0:08:36.402461466] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7404 20:18:20.368470 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass
7406 20:18:20.371394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass>
7407 20:18:20.382439 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34
7408 20:18:24.106053 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34 (3813 ms)
7409 20:18:24.147325 [0:08:40.215178928] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7410 20:18:24.179846 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass
7412 20:18:24.182538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass>
7413 20:18:24.193971 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55
7414 20:18:30.011587 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55 (5904 ms)
7415 20:18:30.054064 [0:08:46.121267159] [423] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7416 20:18:30.099279 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass
7418 20:18:30.101930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass>
7419 20:18:30.114847 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89
7420 20:18:39.308284 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89 (9296 ms)
7421 20:18:39.384519 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass
7423 20:18:39.387001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass>
7424 20:18:39.400760 [----------] 120 tests from CaptureTests/SingleStream (517176 ms total)
7425 20:18:39.475542
7426 20:18:39.544547 [----------] Global test environment tear-down
7427 20:18:39.624915 [==========] 120 tests from 1 test suite ran. (517176 ms total)
7428 20:18:39.690824 <LAVA_SIGNAL_TESTSET STOP>
7429 20:18:39.691319 Received signal: <TESTSET> STOP
7430 20:18:39.691547 Closing test_set CaptureTests/SingleStream
7431 20:18:39.693720 + set +x
7432 20:18:39.697396 <LAVA_SIGNAL_ENDRUN 0_lc-compliance 14063016_1.6.2.3.1>
7433 20:18:39.697908 Received signal: <ENDRUN> 0_lc-compliance 14063016_1.6.2.3.1
7434 20:18:39.698180 Ending use of test pattern.
7435 20:18:39.698391 Ending test lava.0_lc-compliance (14063016_1.6.2.3.1), duration 519.04
7437 20:18:39.700867 <LAVA_TEST_RUNNER EXIT>
7438 20:18:39.701576 ok: lava_test_shell seems to have completed
7439 20:18:39.709234 Capture/Raw_1:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_13:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_2:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_21:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_3:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_34:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_5:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_55:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_8:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_89:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
7440 20:18:39.710027 end: 3.1 lava-test-shell (duration 00:08:40) [common]
7441 20:18:39.710427 end: 3 lava-test-retry (duration 00:08:40) [common]
7442 20:18:39.710825 start: 4 finalize (timeout 00:10:00) [common]
7443 20:18:39.711213 start: 4.1 power-off (timeout 00:00:30) [common]
7444 20:18:39.711957 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
7445 20:18:39.974865 >> Command sent successfully.
7446 20:18:39.985294 Returned 0 in 0 seconds
7447 20:18:40.086671 end: 4.1 power-off (duration 00:00:00) [common]
7449 20:18:40.088270 start: 4.2 read-feedback (timeout 00:10:00) [common]
7450 20:18:40.089529 Listened to connection for namespace 'common' for up to 1s
7451 20:18:41.090238 Finalising connection for namespace 'common'
7452 20:18:41.090895 Disconnecting from shell: Finalise
7453 20:18:41.091298 / #
7454 20:18:41.192325 end: 4.2 read-feedback (duration 00:00:01) [common]
7455 20:18:41.192976 end: 4 finalize (duration 00:00:01) [common]
7456 20:18:41.193544 Cleaning after the job
7457 20:18:41.194020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/ramdisk
7458 20:18:41.203131 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/kernel
7459 20:18:41.237534 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/dtb
7460 20:18:41.237912 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/nfsrootfs
7461 20:18:41.285869 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14063016/tftp-deploy-5l9l971u/modules
7462 20:18:41.291881 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14063016
7463 20:18:41.584695 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14063016
7464 20:18:41.584893 Job finished correctly