Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 35
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 17:59:28.926773 lava-dispatcher, installed at version: 2024.03
2 17:59:28.927011 start: 0 validate
3 17:59:28.927161 Start time: 2024-06-11 17:59:28.927154+00:00 (UTC)
4 17:59:28.927299 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:59:28.927443 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 17:59:29.195572 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:59:29.195815 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 17:59:29.462555 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:59:29.463020 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 18:00:29.786991 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:00:29.787183 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:00:30.316762 validate duration: 61.39
14 18:00:30.317154 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:00:30.317306 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:00:30.317458 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:00:30.317635 Not decompressing ramdisk as can be used compressed.
18 18:00:30.317763 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 18:00:30.317866 saving as /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/ramdisk/rootfs.cpio.gz
20 18:00:30.317969 total size: 8181887 (7 MB)
21 18:00:34.741286 progress 0 % (0 MB)
22 18:00:34.743814 progress 5 % (0 MB)
23 18:00:34.746190 progress 10 % (0 MB)
24 18:00:34.748715 progress 15 % (1 MB)
25 18:00:34.751105 progress 20 % (1 MB)
26 18:00:34.753647 progress 25 % (1 MB)
27 18:00:34.755973 progress 30 % (2 MB)
28 18:00:34.758533 progress 35 % (2 MB)
29 18:00:34.760878 progress 40 % (3 MB)
30 18:00:34.763416 progress 45 % (3 MB)
31 18:00:34.765805 progress 50 % (3 MB)
32 18:00:34.768294 progress 55 % (4 MB)
33 18:00:34.770605 progress 60 % (4 MB)
34 18:00:34.773091 progress 65 % (5 MB)
35 18:00:34.775403 progress 70 % (5 MB)
36 18:00:34.777870 progress 75 % (5 MB)
37 18:00:34.780177 progress 80 % (6 MB)
38 18:00:34.782674 progress 85 % (6 MB)
39 18:00:34.784955 progress 90 % (7 MB)
40 18:00:34.787457 progress 95 % (7 MB)
41 18:00:34.789778 progress 100 % (7 MB)
42 18:00:34.790011 7 MB downloaded in 4.47 s (1.74 MB/s)
43 18:00:34.790180 end: 1.1.1 http-download (duration 00:00:04) [common]
45 18:00:34.790442 end: 1.1 download-retry (duration 00:00:04) [common]
46 18:00:34.790554 start: 1.2 download-retry (timeout 00:09:56) [common]
47 18:00:34.790651 start: 1.2.1 http-download (timeout 00:09:56) [common]
48 18:00:34.790800 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 18:00:34.790878 saving as /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/kernel/Image
50 18:00:34.790944 total size: 54813184 (52 MB)
51 18:00:34.791010 No compression specified
52 18:00:41.296178 progress 0 % (0 MB)
53 18:00:41.342444 progress 5 % (2 MB)
54 18:00:41.360488 progress 10 % (5 MB)
55 18:00:41.376191 progress 15 % (7 MB)
56 18:00:41.391975 progress 20 % (10 MB)
57 18:00:41.407802 progress 25 % (13 MB)
58 18:00:41.423482 progress 30 % (15 MB)
59 18:00:41.439514 progress 35 % (18 MB)
60 18:00:41.455469 progress 40 % (20 MB)
61 18:00:41.471045 progress 45 % (23 MB)
62 18:00:41.486860 progress 50 % (26 MB)
63 18:00:41.502845 progress 55 % (28 MB)
64 18:00:41.522125 progress 60 % (31 MB)
65 18:00:41.547229 progress 65 % (34 MB)
66 18:00:41.563405 progress 70 % (36 MB)
67 18:00:41.579016 progress 75 % (39 MB)
68 18:00:41.594584 progress 80 % (41 MB)
69 18:00:41.609976 progress 85 % (44 MB)
70 18:00:41.625488 progress 90 % (47 MB)
71 18:00:41.640988 progress 95 % (49 MB)
72 18:00:41.656032 progress 100 % (52 MB)
73 18:00:41.656308 52 MB downloaded in 6.87 s (7.61 MB/s)
74 18:00:41.656476 end: 1.2.1 http-download (duration 00:00:07) [common]
76 18:00:41.656727 end: 1.2 download-retry (duration 00:00:07) [common]
77 18:00:41.656832 start: 1.3 download-retry (timeout 00:09:49) [common]
78 18:00:41.656928 start: 1.3.1 http-download (timeout 00:09:49) [common]
79 18:00:41.657076 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 18:00:41.657154 saving as /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 18:00:41.657223 total size: 57695 (0 MB)
82 18:00:41.657290 No compression specified
83 18:00:41.923118 progress 56 % (0 MB)
84 18:00:41.923503 progress 100 % (0 MB)
85 18:00:41.923766 0 MB downloaded in 0.27 s (0.21 MB/s)
86 18:00:41.923925 end: 1.3.1 http-download (duration 00:00:00) [common]
88 18:00:41.924205 end: 1.3 download-retry (duration 00:00:00) [common]
89 18:00:41.924307 start: 1.4 download-retry (timeout 00:09:48) [common]
90 18:00:41.924415 start: 1.4.1 http-download (timeout 00:09:48) [common]
91 18:00:41.924561 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 18:00:41.924663 saving as /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/modules/modules.tar
93 18:00:41.924734 total size: 8618176 (8 MB)
94 18:00:41.924804 Using unxz to decompress xz
95 18:00:41.929279 progress 0 % (0 MB)
96 18:00:41.950566 progress 5 % (0 MB)
97 18:00:41.981222 progress 10 % (0 MB)
98 18:00:42.014243 progress 15 % (1 MB)
99 18:00:42.041124 progress 20 % (1 MB)
100 18:00:42.067541 progress 25 % (2 MB)
101 18:00:42.094333 progress 30 % (2 MB)
102 18:00:42.123631 progress 35 % (2 MB)
103 18:00:42.151665 progress 40 % (3 MB)
104 18:00:42.177356 progress 45 % (3 MB)
105 18:00:42.204809 progress 50 % (4 MB)
106 18:00:42.232938 progress 55 % (4 MB)
107 18:00:42.260311 progress 60 % (4 MB)
108 18:00:42.288265 progress 65 % (5 MB)
109 18:00:42.319010 progress 70 % (5 MB)
110 18:00:42.346363 progress 75 % (6 MB)
111 18:00:42.375771 progress 80 % (6 MB)
112 18:00:42.404348 progress 85 % (7 MB)
113 18:00:42.433366 progress 90 % (7 MB)
114 18:00:42.462113 progress 95 % (7 MB)
115 18:00:42.492850 progress 100 % (8 MB)
116 18:00:42.497873 8 MB downloaded in 0.57 s (14.34 MB/s)
117 18:00:42.498182 end: 1.4.1 http-download (duration 00:00:01) [common]
119 18:00:42.498477 end: 1.4 download-retry (duration 00:00:01) [common]
120 18:00:42.498585 start: 1.5 prepare-tftp-overlay (timeout 00:09:48) [common]
121 18:00:42.498688 start: 1.5.1 extract-nfsrootfs (timeout 00:09:48) [common]
122 18:00:42.498781 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 18:00:42.498880 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
124 18:00:42.499142 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn
125 18:00:42.499300 makedir: /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin
126 18:00:42.499426 makedir: /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/tests
127 18:00:42.499543 makedir: /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/results
128 18:00:42.499717 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-add-keys
129 18:00:42.499902 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-add-sources
130 18:00:42.500052 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-background-process-start
131 18:00:42.500205 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-background-process-stop
132 18:00:42.500385 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-common-functions
133 18:00:42.500563 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-echo-ipv4
134 18:00:42.500740 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-install-packages
135 18:00:42.500920 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-installed-packages
136 18:00:42.501064 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-os-build
137 18:00:42.501207 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-probe-channel
138 18:00:42.501347 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-probe-ip
139 18:00:42.501504 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-target-ip
140 18:00:42.501645 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-target-mac
141 18:00:42.501783 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-target-storage
142 18:00:42.501930 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-case
143 18:00:42.502073 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-event
144 18:00:42.502216 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-feedback
145 18:00:42.502356 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-raise
146 18:00:42.502497 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-reference
147 18:00:42.502639 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-runner
148 18:00:42.502777 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-set
149 18:00:42.502918 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-test-shell
150 18:00:42.503063 Updating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-install-packages (oe)
151 18:00:42.503236 Updating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/bin/lava-installed-packages (oe)
152 18:00:42.503375 Creating /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/environment
153 18:00:42.503493 LAVA metadata
154 18:00:42.503579 - LAVA_JOB_ID=14291352
155 18:00:42.503657 - LAVA_DISPATCHER_IP=192.168.201.1
156 18:00:42.503823 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
157 18:00:42.503935 skipped lava-vland-overlay
158 18:00:42.504057 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 18:00:42.504196 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
160 18:00:42.504299 skipped lava-multinode-overlay
161 18:00:42.504420 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 18:00:42.504561 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
163 18:00:42.504679 Loading test definitions
164 18:00:42.504788 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
165 18:00:42.504873 Using /lava-14291352 at stage 0
166 18:00:42.505288 uuid=14291352_1.5.2.3.1 testdef=None
167 18:00:42.505422 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 18:00:42.505537 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
169 18:00:42.507029 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 18:00:42.507282 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
172 18:00:42.508154 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 18:00:42.508421 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
175 18:00:42.509363 runner path: /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/0/tests/0_dmesg test_uuid 14291352_1.5.2.3.1
176 18:00:42.509578 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 18:00:42.509836 Creating lava-test-runner.conf files
179 18:00:42.509910 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14291352/lava-overlay-s5s34wjn/lava-14291352/0 for stage 0
180 18:00:42.510016 - 0_dmesg
181 18:00:42.510130 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 18:00:42.510229 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
183 18:00:42.518295 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 18:00:42.518452 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:48) [common]
185 18:00:42.518562 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 18:00:42.518660 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 18:00:42.518756 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:48) [common]
188 18:00:42.786937 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 18:00:42.787473 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
190 18:00:42.787643 extracting modules file /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14291352/extract-overlay-ramdisk-a0de8kj4/ramdisk
191 18:00:43.085775 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 18:00:43.085992 start: 1.5.5 apply-overlay-tftp (timeout 00:09:47) [common]
193 18:00:43.086130 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14291352/compress-overlay-4ztrvx3u/overlay-1.5.2.4.tar.gz to ramdisk
194 18:00:43.086241 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14291352/compress-overlay-4ztrvx3u/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14291352/extract-overlay-ramdisk-a0de8kj4/ramdisk
195 18:00:43.094233 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 18:00:43.094443 start: 1.5.6 configure-preseed-file (timeout 00:09:47) [common]
197 18:00:43.094579 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 18:00:43.094682 start: 1.5.7 compress-ramdisk (timeout 00:09:47) [common]
199 18:00:43.094775 Building ramdisk /var/lib/lava/dispatcher/tmp/14291352/extract-overlay-ramdisk-a0de8kj4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14291352/extract-overlay-ramdisk-a0de8kj4/ramdisk
200 18:00:43.525954 >> 145182 blocks
201 18:00:46.098155 rename /var/lib/lava/dispatcher/tmp/14291352/extract-overlay-ramdisk-a0de8kj4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/ramdisk/ramdisk.cpio.gz
202 18:00:46.098669 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 18:00:46.098868 start: 1.5.8 prepare-kernel (timeout 00:09:44) [common]
204 18:00:46.098982 start: 1.5.8.1 prepare-fit (timeout 00:09:44) [common]
205 18:00:46.099105 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/kernel/Image']
206 18:01:01.925812 Returned 0 in 15 seconds
207 18:01:02.026469 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/kernel/image.itb
208 18:01:02.467028 output: FIT description: Kernel Image image with one or more FDT blobs
209 18:01:02.467526 output: Created: Tue Jun 11 19:01:02 2024
210 18:01:02.467663 output: Image 0 (kernel-1)
211 18:01:02.467780 output: Description:
212 18:01:02.467901 output: Created: Tue Jun 11 19:01:02 2024
213 18:01:02.468015 output: Type: Kernel Image
214 18:01:02.468136 output: Compression: lzma compressed
215 18:01:02.468248 output: Data Size: 13125101 Bytes = 12817.48 KiB = 12.52 MiB
216 18:01:02.468382 output: Architecture: AArch64
217 18:01:02.468516 output: OS: Linux
218 18:01:02.468636 output: Load Address: 0x00000000
219 18:01:02.468760 output: Entry Point: 0x00000000
220 18:01:02.468871 output: Hash algo: crc32
221 18:01:02.469003 output: Hash value: 7a9e9d3e
222 18:01:02.469126 output: Image 1 (fdt-1)
223 18:01:02.469237 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 18:01:02.469352 output: Created: Tue Jun 11 19:01:02 2024
225 18:01:02.469469 output: Type: Flat Device Tree
226 18:01:02.469556 output: Compression: uncompressed
227 18:01:02.469670 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 18:01:02.469782 output: Architecture: AArch64
229 18:01:02.470041 output: Hash algo: crc32
230 18:01:02.470213 output: Hash value: a9713552
231 18:01:02.470451 output: Image 2 (ramdisk-1)
232 18:01:02.470566 output: Description: unavailable
233 18:01:02.470684 output: Created: Tue Jun 11 19:01:02 2024
234 18:01:02.470782 output: Type: RAMDisk Image
235 18:01:02.470886 output: Compression: Unknown Compression
236 18:01:02.470987 output: Data Size: 21373367 Bytes = 20872.43 KiB = 20.38 MiB
237 18:01:02.471089 output: Architecture: AArch64
238 18:01:02.471183 output: OS: Linux
239 18:01:02.471275 output: Load Address: unavailable
240 18:01:02.471387 output: Entry Point: unavailable
241 18:01:02.471491 output: Hash algo: crc32
242 18:01:02.471614 output: Hash value: 97f07dd2
243 18:01:02.471707 output: Default Configuration: 'conf-1'
244 18:01:02.471801 output: Configuration 0 (conf-1)
245 18:01:02.471903 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 18:01:02.471995 output: Kernel: kernel-1
247 18:01:02.472098 output: Init Ramdisk: ramdisk-1
248 18:01:02.472191 output: FDT: fdt-1
249 18:01:02.472283 output: Loadables: kernel-1
250 18:01:02.472406 output:
251 18:01:02.472712 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 18:01:02.472866 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 18:01:02.473022 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 18:01:02.473162 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:28) [common]
255 18:01:02.473287 No LXC device requested
256 18:01:02.473420 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 18:01:02.473617 start: 1.7 deploy-device-env (timeout 00:09:28) [common]
258 18:01:02.473715 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 18:01:02.473801 Checking files for TFTP limit of 4294967296 bytes.
260 18:01:02.474389 end: 1 tftp-deploy (duration 00:00:32) [common]
261 18:01:02.474531 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 18:01:02.474641 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 18:01:02.474796 substitutions:
264 18:01:02.474885 - {DTB}: 14291352/tftp-deploy-2fbbrpmg/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 18:01:02.474956 - {INITRD}: 14291352/tftp-deploy-2fbbrpmg/ramdisk/ramdisk.cpio.gz
266 18:01:02.475021 - {KERNEL}: 14291352/tftp-deploy-2fbbrpmg/kernel/Image
267 18:01:02.475085 - {LAVA_MAC}: None
268 18:01:02.475156 - {PRESEED_CONFIG}: None
269 18:01:02.475217 - {PRESEED_LOCAL}: None
270 18:01:02.475291 - {RAMDISK}: 14291352/tftp-deploy-2fbbrpmg/ramdisk/ramdisk.cpio.gz
271 18:01:02.475357 - {ROOT_PART}: None
272 18:01:02.475417 - {ROOT}: None
273 18:01:02.475485 - {SERVER_IP}: 192.168.201.1
274 18:01:02.475546 - {TEE}: None
275 18:01:02.475605 Parsed boot commands:
276 18:01:02.475667 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 18:01:02.475914 Parsed boot commands: tftpboot 192.168.201.1 14291352/tftp-deploy-2fbbrpmg/kernel/image.itb 14291352/tftp-deploy-2fbbrpmg/kernel/cmdline
278 18:01:02.476018 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 18:01:02.476113 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 18:01:02.476215 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 18:01:02.476328 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 18:01:02.476443 Not connected, no need to disconnect.
283 18:01:02.476569 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 18:01:02.476695 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 18:01:02.476830 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 18:01:02.481194 Setting prompt string to ['lava-test: # ']
287 18:01:02.481730 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 18:01:02.481868 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 18:01:02.481991 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 18:01:02.482119 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 18:01:02.482319 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 18:01:12.824839 Returned 0 in 10 seconds
293 18:01:12.925530 end: 2.2.2.1 pdu-reboot (duration 00:00:10) [common]
295 18:01:12.926179 end: 2.2.2 reset-device (duration 00:00:10) [common]
296 18:01:12.926323 start: 2.2.3 depthcharge-start (timeout 00:04:50) [common]
297 18:01:12.926445 Setting prompt string to 'Starting depthcharge on Juniper...'
298 18:01:12.926559 Changing prompt to 'Starting depthcharge on Juniper...'
299 18:01:12.926681 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 18:01:12.927340 [Enter `^Ec?' for help]
301 18:01:12.927481 [DL] 00000000 00000000 010701
302 18:01:12.927609
303 18:01:12.927714
304 18:01:12.927782 F0: 102B 0000
305 18:01:12.927849
306 18:01:12.927919 F3: 1006 0033 [0200]
307 18:01:12.927989
308 18:01:12.928056 F3: 4001 00E0 [0200]
309 18:01:12.928120
310 18:01:12.928187 F3: 0000 0000
311 18:01:12.928252
312 18:01:12.928312 V0: 0000 0000 [0001]
313 18:01:12.928371
314 18:01:12.928438 00: 1027 0002
315 18:01:12.928506
316 18:01:12.928570 01: 0000 0000
317 18:01:12.928632
318 18:01:12.928696 BP: 0C00 0251 [0000]
319 18:01:12.928760
320 18:01:12.928820 G0: 1182 0000
321 18:01:12.928879
322 18:01:12.928938 EC: 0004 0000 [0001]
323 18:01:12.929003
324 18:01:12.929067 S7: 0000 0000 [0000]
325 18:01:12.929130
326 18:01:12.929190 CC: 0000 0000 [0001]
327 18:01:12.929253
328 18:01:12.929313 T0: 0000 00DB [000F]
329 18:01:12.929377
330 18:01:12.929449 Jump to BL
331 18:01:12.929509
332 18:01:12.929576
333 18:01:12.929638
334 18:01:12.929701 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 18:01:12.929764 ARM64: Exception handlers installed.
336 18:01:12.929833 ARM64: Testing exception
337 18:01:12.929932 ARM64: Done test exception
338 18:01:12.930029 WDT: Last reset was cold boot
339 18:01:12.930126 SPI0(PAD0) initialized at 992727 Hz
340 18:01:12.930222 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 18:01:12.930318 Manufacturer: ef
342 18:01:12.930415 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 18:01:12.930510 Probing TPM: . done!
344 18:01:12.930602 TPM ready after 0 ms
345 18:01:12.930701 Connected to device vid:did:rid of 1ae0:0028:00
346 18:01:12.930798 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
347 18:01:12.930898 Initialized TPM device CR50 revision 0
348 18:01:12.930998 tlcl_send_startup: Startup return code is 0
349 18:01:12.931095 TPM: setup succeeded
350 18:01:12.931192 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 18:01:12.931290 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 18:01:12.931384 in-header: 03 19 00 00 08 00 00 00
353 18:01:12.931481 in-data: a2 e0 47 00 13 00 00 00
354 18:01:12.931575 Chrome EC: UHEPI supported
355 18:01:12.931669 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 18:01:12.931767 in-header: 03 a1 00 00 08 00 00 00
357 18:01:12.931863 in-data: 84 60 60 10 00 00 00 00
358 18:01:12.931956 Phase 1
359 18:01:12.932055 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 18:01:12.932150 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 18:01:12.932247 VB2:vb2_check_recovery() Recovery was requested manually
362 18:01:12.932344 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 18:01:12.932439 Recovery requested (1009000e)
364 18:01:12.932534 tlcl_extend: response is 0
365 18:01:12.932631 tlcl_extend: response is 0
366 18:01:12.932726
367 18:01:12.932825
368 18:01:12.932924 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 18:01:12.933022 ARM64: Exception handlers installed.
370 18:01:12.933123 ARM64: Testing exception
371 18:01:12.933217 ARM64: Done test exception
372 18:01:12.933314 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2031
373 18:01:12.933412 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 18:01:12.933516 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 18:01:12.933606 [RTC]rtc_get_frequency_meter,134: input=0xf, output=862
376 18:01:12.933672 [RTC]rtc_get_frequency_meter,134: input=0x7, output=732
377 18:01:12.933733 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
378 18:01:12.933794 [RTC]rtc_get_frequency_meter,134: input=0x9, output=763
379 18:01:12.933854 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
380 18:01:12.933920 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
381 18:01:12.933985 [RTC]rtc_get_frequency_meter,134: input=0xb, output=797
382 18:01:12.934056 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
383 18:01:12.934117 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 18:01:12.934185 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 18:01:12.934253 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 18:01:12.934348 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 18:01:12.934444 in-header: 03 19 00 00 08 00 00 00
388 18:01:12.934541 in-data: a2 e0 47 00 13 00 00 00
389 18:01:12.934637 Chrome EC: UHEPI supported
390 18:01:12.934733 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 18:01:12.934831 in-header: 03 a1 00 00 08 00 00 00
392 18:01:12.934925 in-data: 84 60 60 10 00 00 00 00
393 18:01:12.935019 Skip loading cached calibration data
394 18:01:12.935119 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 18:01:12.935215 in-header: 03 a1 00 00 08 00 00 00
396 18:01:12.935309 in-data: 84 60 60 10 00 00 00 00
397 18:01:12.935407 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 18:01:12.935506 in-header: 03 a1 00 00 08 00 00 00
399 18:01:12.935603 in-data: 84 60 60 10 00 00 00 00
400 18:01:12.935701 ADC[3]: Raw value=215404 ID=1
401 18:01:12.935796 Manufacturer: ef
402 18:01:12.935892 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 18:01:12.935989 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 18:01:12.936083 CBFS @ 21000 size 3d4000
405 18:01:12.936178 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 18:01:12.936275 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 18:01:12.936371 CBFS: Found @ offset 3c700 size 44
408 18:01:12.936470 DRAM-K: Full Calibration
409 18:01:12.936569 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 18:01:12.936663 CBFS @ 21000 size 3d4000
411 18:01:12.936762 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 18:01:12.936858 CBFS: Locating 'fallback/dram'
413 18:01:12.936951 CBFS: Found @ offset 24b00 size 12268
414 18:01:12.937050 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 18:01:12.937144 ddr_geometry: 1, config: 0x0
416 18:01:12.937239 header.status = 0x0
417 18:01:12.937338 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 18:01:12.937442 header.version = 0x5 (expected: 0x5)
419 18:01:12.937739 header.size = 0x8f0 (expected: 0x8f0)
420 18:01:12.937862 header.config = 0x0
421 18:01:12.937958 header.flags = 0x0
422 18:01:12.938026 header.checksum = 0x0
423 18:01:12.938124 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 18:01:12.938220 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 18:01:12.938318 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 18:01:12.938415 ddr_geometry:1
427 18:01:12.938509 [EMI] new MDL number = 1
428 18:01:12.938607 dram_cbt_mode_extern: 0
429 18:01:12.938703 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 18:01:12.938797 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 18:01:12.938895
432 18:01:12.938990
433 18:01:12.939086 [Bianco] ETT version 0.0.0.1
434 18:01:12.939183 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 18:01:12.939277
436 18:01:12.939373 vSetVcoreByFreq with vcore:762500, freq=1600
437 18:01:12.939472
438 18:01:12.939565 [DramcInit]
439 18:01:12.939662 AutoRefreshCKEOff AutoREF OFF
440 18:01:12.939733 DDRPhyPLLSetting-CKEOFF
441 18:01:12.939795 DDRPhyPLLSetting-CKEON
442 18:01:12.939855
443 18:01:12.939922 Enable WDQS
444 18:01:12.940017 [ModeRegInit_LP4] CH0 RK0
445 18:01:12.940111 Write Rank0 MR13 =0x18
446 18:01:12.940207 Write Rank0 MR12 =0x5d
447 18:01:12.940303 Write Rank0 MR1 =0x56
448 18:01:12.940396 Write Rank0 MR2 =0x1a
449 18:01:12.940492 Write Rank0 MR11 =0x0
450 18:01:12.940589 Write Rank0 MR22 =0x38
451 18:01:12.940693 Write Rank0 MR14 =0x5d
452 18:01:12.940792 Write Rank0 MR3 =0x30
453 18:01:12.940887 Write Rank0 MR13 =0x58
454 18:01:12.940979 Write Rank0 MR12 =0x5d
455 18:01:12.941076 Write Rank0 MR1 =0x56
456 18:01:12.941171 Write Rank0 MR2 =0x2d
457 18:01:12.941264 Write Rank0 MR11 =0x23
458 18:01:12.941361 Write Rank0 MR22 =0x34
459 18:01:12.941466 Write Rank0 MR14 =0x10
460 18:01:12.941530 Write Rank0 MR3 =0x30
461 18:01:12.941595 Write Rank0 MR13 =0xd8
462 18:01:12.941659 [ModeRegInit_LP4] CH0 RK1
463 18:01:12.941724 Write Rank1 MR13 =0x18
464 18:01:12.941820 Write Rank1 MR12 =0x5d
465 18:01:12.941901 Write Rank1 MR1 =0x56
466 18:01:12.941965 Write Rank1 MR2 =0x1a
467 18:01:12.942026 Write Rank1 MR11 =0x0
468 18:01:12.942086 Write Rank1 MR22 =0x38
469 18:01:12.942146 Write Rank1 MR14 =0x5d
470 18:01:12.942210 Write Rank1 MR3 =0x30
471 18:01:12.942274 Write Rank1 MR13 =0x58
472 18:01:12.942367 Write Rank1 MR12 =0x5d
473 18:01:12.942459 Write Rank1 MR1 =0x56
474 18:01:12.942526 Write Rank1 MR2 =0x2d
475 18:01:12.942587 Write Rank1 MR11 =0x23
476 18:01:12.942654 Write Rank1 MR22 =0x34
477 18:01:12.942723 Write Rank1 MR14 =0x10
478 18:01:12.942820 Write Rank1 MR3 =0x30
479 18:01:12.942913 Write Rank1 MR13 =0xd8
480 18:01:12.943011 [ModeRegInit_LP4] CH1 RK0
481 18:01:12.943105 Write Rank0 MR13 =0x18
482 18:01:12.943198 Write Rank0 MR12 =0x5d
483 18:01:12.943295 Write Rank0 MR1 =0x56
484 18:01:12.943390 Write Rank0 MR2 =0x1a
485 18:01:12.943483 Write Rank0 MR11 =0x0
486 18:01:12.943553 Write Rank0 MR22 =0x38
487 18:01:12.943614 Write Rank0 MR14 =0x5d
488 18:01:12.943674 Write Rank0 MR3 =0x30
489 18:01:12.943733 Write Rank0 MR13 =0x58
490 18:01:12.943798 Write Rank0 MR12 =0x5d
491 18:01:12.943863 Write Rank0 MR1 =0x56
492 18:01:12.943927 Write Rank0 MR2 =0x2d
493 18:01:12.943986 Write Rank0 MR11 =0x23
494 18:01:12.944059 Write Rank0 MR22 =0x34
495 18:01:12.944154 Write Rank0 MR14 =0x10
496 18:01:12.944247 Write Rank0 MR3 =0x30
497 18:01:12.944344 Write Rank0 MR13 =0xd8
498 18:01:12.944441 [ModeRegInit_LP4] CH1 RK1
499 18:01:12.944535 Write Rank1 MR13 =0x18
500 18:01:12.944634 Write Rank1 MR12 =0x5d
501 18:01:12.944735 Write Rank1 MR1 =0x56
502 18:01:12.944829 Write Rank1 MR2 =0x1a
503 18:01:12.944926 Write Rank1 MR11 =0x0
504 18:01:12.945022 Write Rank1 MR22 =0x38
505 18:01:12.945116 Write Rank1 MR14 =0x5d
506 18:01:12.945213 Write Rank1 MR3 =0x30
507 18:01:12.945306 Write Rank1 MR13 =0x58
508 18:01:12.945400 Write Rank1 MR12 =0x5d
509 18:01:12.945484 Write Rank1 MR1 =0x56
510 18:01:12.945549 Write Rank1 MR2 =0x2d
511 18:01:12.945612 Write Rank1 MR11 =0x23
512 18:01:12.945671 Write Rank1 MR22 =0x34
513 18:01:12.945737 Write Rank1 MR14 =0x10
514 18:01:12.945800 Write Rank1 MR3 =0x30
515 18:01:12.945860 Write Rank1 MR13 =0xd8
516 18:01:12.945920 match AC timing 3
517 18:01:12.945979 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 18:01:12.946046 [MiockJmeterHQA]
519 18:01:12.946110 vSetVcoreByFreq with vcore:762500, freq=1600
520 18:01:12.946193
521 18:01:12.946290 MIOCK jitter meter ch=0
522 18:01:12.946386
523 18:01:12.946479 1T = (101-17) = 84 dly cells
524 18:01:12.946576 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
525 18:01:12.946644 vSetVcoreByFreq with vcore:725000, freq=1200
526 18:01:12.946708
527 18:01:12.946768 MIOCK jitter meter ch=0
528 18:01:12.946848
529 18:01:12.946944 1T = (96-16) = 80 dly cells
530 18:01:12.947041 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
531 18:01:12.947139 vSetVcoreByFreq with vcore:725000, freq=800
532 18:01:12.947235
533 18:01:12.947329 MIOCK jitter meter ch=0
534 18:01:12.947425
535 18:01:12.947520 1T = (96-16) = 80 dly cells
536 18:01:12.947617 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
537 18:01:12.947716 vSetVcoreByFreq with vcore:762500, freq=1600
538 18:01:12.947812 vSetVcoreByFreq with vcore:762500, freq=1600
539 18:01:12.947905
540 18:01:12.948002 K DRVP
541 18:01:12.948097 1. OCD DRVP=0 CALOUT=0
542 18:01:12.948192 1. OCD DRVP=1 CALOUT=0
543 18:01:12.948292 1. OCD DRVP=2 CALOUT=0
544 18:01:12.948390 1. OCD DRVP=3 CALOUT=0
545 18:01:12.948487 1. OCD DRVP=4 CALOUT=0
546 18:01:12.948586 1. OCD DRVP=5 CALOUT=0
547 18:01:12.948696 1. OCD DRVP=6 CALOUT=0
548 18:01:12.948797 1. OCD DRVP=7 CALOUT=0
549 18:01:12.948895 1. OCD DRVP=8 CALOUT=1
550 18:01:12.948990
551 18:01:12.949089 1. OCD DRVP calibration OK! DRVP=8
552 18:01:12.949185
553 18:01:12.949279
554 18:01:12.949374
555 18:01:12.949476 K ODTN
556 18:01:12.949574 3. OCD ODTN=0 ,CALOUT=1
557 18:01:12.949677 3. OCD ODTN=1 ,CALOUT=1
558 18:01:12.949777 3. OCD ODTN=2 ,CALOUT=1
559 18:01:12.949877 3. OCD ODTN=3 ,CALOUT=1
560 18:01:12.949975 3. OCD ODTN=4 ,CALOUT=1
561 18:01:12.950071 3. OCD ODTN=5 ,CALOUT=1
562 18:01:12.950171 3. OCD ODTN=6 ,CALOUT=1
563 18:01:12.950266 3. OCD ODTN=7 ,CALOUT=0
564 18:01:12.950366
565 18:01:12.950464 3. OCD ODTN calibration OK! ODTN=7
566 18:01:12.950559
567 18:01:12.950657 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 18:01:12.950751 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 18:01:12.950850 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 18:01:12.950945
571 18:01:12.951039 K DRVP
572 18:01:12.951136 1. OCD DRVP=0 CALOUT=0
573 18:01:12.951232 1. OCD DRVP=1 CALOUT=0
574 18:01:12.951332 1. OCD DRVP=2 CALOUT=0
575 18:01:12.951429 1. OCD DRVP=3 CALOUT=0
576 18:01:12.951526 1. OCD DRVP=4 CALOUT=0
577 18:01:12.951624 1. OCD DRVP=5 CALOUT=0
578 18:01:12.951719 1. OCD DRVP=6 CALOUT=0
579 18:01:12.951819 1. OCD DRVP=7 CALOUT=0
580 18:01:12.951917 1. OCD DRVP=8 CALOUT=0
581 18:01:12.952013 1. OCD DRVP=9 CALOUT=0
582 18:01:12.952096 1. OCD DRVP=10 CALOUT=1
583 18:01:12.952190
584 18:01:12.952487 1. OCD DRVP calibration OK! DRVP=10
585 18:01:12.952606
586 18:01:12.952709
587 18:01:12.952816
588 18:01:12.952929 K ODTN
589 18:01:12.953050 3. OCD ODTN=0 ,CALOUT=1
590 18:01:12.953163 3. OCD ODTN=1 ,CALOUT=1
591 18:01:12.953277 3. OCD ODTN=2 ,CALOUT=1
592 18:01:12.953380 3. OCD ODTN=3 ,CALOUT=1
593 18:01:12.953493 3. OCD ODTN=4 ,CALOUT=1
594 18:01:12.953594 3. OCD ODTN=5 ,CALOUT=1
595 18:01:12.953691 3. OCD ODTN=6 ,CALOUT=1
596 18:01:12.953791 3. OCD ODTN=7 ,CALOUT=1
597 18:01:12.953889 3. OCD ODTN=8 ,CALOUT=1
598 18:01:12.953987 3. OCD ODTN=9 ,CALOUT=1
599 18:01:12.954086 3. OCD ODTN=10 ,CALOUT=1
600 18:01:12.954182 3. OCD ODTN=11 ,CALOUT=1
601 18:01:12.954279 3. OCD ODTN=12 ,CALOUT=1
602 18:01:12.954377 3. OCD ODTN=13 ,CALOUT=1
603 18:01:12.954474 3. OCD ODTN=14 ,CALOUT=1
604 18:01:12.954572 3. OCD ODTN=15 ,CALOUT=0
605 18:01:12.954673
606 18:01:12.954768 3. OCD ODTN calibration OK! ODTN=15
607 18:01:12.954865
608 18:01:12.954962 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 18:01:12.955058 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 18:01:12.955155 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 18:01:12.955251
612 18:01:12.955345 [DramcInit]
613 18:01:12.955439 AutoRefreshCKEOff AutoREF OFF
614 18:01:12.955536 DDRPhyPLLSetting-CKEOFF
615 18:01:12.955631 DDRPhyPLLSetting-CKEON
616 18:01:12.955725
617 18:01:12.955820 Enable WDQS
618 18:01:12.955914 ==
619 18:01:12.956008 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 18:01:12.956116 fsp= 1, odt_onoff= 1, Byte mode= 0
621 18:01:12.956234 ==
622 18:01:12.956334 [Duty_Offset_Calibration]
623 18:01:12.956450
624 18:01:12.956575 ===========================
625 18:01:12.956699 B0:1 B1:-1 CA:0
626 18:01:12.956799 ==
627 18:01:12.956900 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 18:01:12.957000 fsp= 1, odt_onoff= 1, Byte mode= 0
629 18:01:12.957094 ==
630 18:01:12.957194 [Duty_Offset_Calibration]
631 18:01:12.957290
632 18:01:12.957385 ===========================
633 18:01:12.957477 B0:0 B1:0 CA:0
634 18:01:12.957540 [ModeRegInit_LP4] CH0 RK0
635 18:01:12.957600 Write Rank0 MR13 =0x18
636 18:01:12.957682 Write Rank0 MR12 =0x5d
637 18:01:12.957778 Write Rank0 MR1 =0x56
638 18:01:12.957873 Write Rank0 MR2 =0x1a
639 18:01:12.957969 Write Rank0 MR11 =0x0
640 18:01:12.958065 Write Rank0 MR22 =0x38
641 18:01:12.958157 Write Rank0 MR14 =0x5d
642 18:01:12.958253 Write Rank0 MR3 =0x30
643 18:01:12.958350 Write Rank0 MR13 =0x58
644 18:01:12.958443 Write Rank0 MR12 =0x5d
645 18:01:12.958539 Write Rank0 MR1 =0x56
646 18:01:12.958635 Write Rank0 MR2 =0x2d
647 18:01:12.958732 Write Rank0 MR11 =0x23
648 18:01:12.958830 Write Rank0 MR22 =0x34
649 18:01:12.958923 Write Rank0 MR14 =0x10
650 18:01:12.959020 Write Rank0 MR3 =0x30
651 18:01:12.959113 Write Rank0 MR13 =0xd8
652 18:01:12.959206 [ModeRegInit_LP4] CH0 RK1
653 18:01:12.959303 Write Rank1 MR13 =0x18
654 18:01:12.959398 Write Rank1 MR12 =0x5d
655 18:01:12.959491 Write Rank1 MR1 =0x56
656 18:01:12.959587 Write Rank1 MR2 =0x1a
657 18:01:12.959682 Write Rank1 MR11 =0x0
658 18:01:12.959774 Write Rank1 MR22 =0x38
659 18:01:12.959872 Write Rank1 MR14 =0x5d
660 18:01:12.959966 Write Rank1 MR3 =0x30
661 18:01:12.960060 Write Rank1 MR13 =0x58
662 18:01:12.960155 Write Rank1 MR12 =0x5d
663 18:01:12.960248 Write Rank1 MR1 =0x56
664 18:01:12.960343 Write Rank1 MR2 =0x2d
665 18:01:12.960438 Write Rank1 MR11 =0x23
666 18:01:12.960502 Write Rank1 MR22 =0x34
667 18:01:12.960562 Write Rank1 MR14 =0x10
668 18:01:12.960658 Write Rank1 MR3 =0x30
669 18:01:12.960766 Write Rank1 MR13 =0xd8
670 18:01:12.960864 [ModeRegInit_LP4] CH1 RK0
671 18:01:12.960962 Write Rank0 MR13 =0x18
672 18:01:12.961056 Write Rank0 MR12 =0x5d
673 18:01:12.961152 Write Rank0 MR1 =0x56
674 18:01:12.961247 Write Rank0 MR2 =0x1a
675 18:01:12.961340 Write Rank0 MR11 =0x0
676 18:01:12.961448 Write Rank0 MR22 =0x38
677 18:01:12.961545 Write Rank0 MR14 =0x5d
678 18:01:12.961635 Write Rank0 MR3 =0x30
679 18:01:12.961697 Write Rank0 MR13 =0x58
680 18:01:12.961791 Write Rank0 MR12 =0x5d
681 18:01:12.961883 Write Rank0 MR1 =0x56
682 18:01:12.961981 Write Rank0 MR2 =0x2d
683 18:01:12.962076 Write Rank0 MR11 =0x23
684 18:01:12.962171 Write Rank0 MR22 =0x34
685 18:01:12.962267 Write Rank0 MR14 =0x10
686 18:01:12.962360 Write Rank0 MR3 =0x30
687 18:01:12.962456 Write Rank0 MR13 =0xd8
688 18:01:12.962552 [ModeRegInit_LP4] CH1 RK1
689 18:01:12.962649 Write Rank1 MR13 =0x18
690 18:01:12.962753 Write Rank1 MR12 =0x5d
691 18:01:12.962856 Write Rank1 MR1 =0x56
692 18:01:12.962964 Write Rank1 MR2 =0x1a
693 18:01:12.963064 Write Rank1 MR11 =0x0
694 18:01:12.963158 Write Rank1 MR22 =0x38
695 18:01:12.963255 Write Rank1 MR14 =0x5d
696 18:01:12.963351 Write Rank1 MR3 =0x30
697 18:01:12.963444 Write Rank1 MR13 =0x58
698 18:01:12.963556 Write Rank1 MR12 =0x5d
699 18:01:12.963656 Write Rank1 MR1 =0x56
700 18:01:12.963750 Write Rank1 MR2 =0x2d
701 18:01:12.963847 Write Rank1 MR11 =0x23
702 18:01:12.963955 Write Rank1 MR22 =0x34
703 18:01:12.964050 Write Rank1 MR14 =0x10
704 18:01:12.964147 Write Rank1 MR3 =0x30
705 18:01:12.964243 Write Rank1 MR13 =0xd8
706 18:01:12.964338 match AC timing 3
707 18:01:12.964436 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 18:01:12.964527 DramC Write-DBI off
709 18:01:12.964590 DramC Read-DBI off
710 18:01:12.964651 Write Rank0 MR13 =0x59
711 18:01:12.964714 ==
712 18:01:12.964812 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 18:01:12.964909 fsp= 1, odt_onoff= 1, Byte mode= 0
714 18:01:12.965004 ==
715 18:01:12.965102 === u2Vref_new: 0x56 --> 0x2d
716 18:01:12.965197 === u2Vref_new: 0x58 --> 0x38
717 18:01:12.965293 === u2Vref_new: 0x5a --> 0x39
718 18:01:12.965390 === u2Vref_new: 0x5c --> 0x3c
719 18:01:12.965496 === u2Vref_new: 0x5e --> 0x3d
720 18:01:12.965587 === u2Vref_new: 0x60 --> 0xa0
721 18:01:12.965673 [CA 0] Center 34 (6~63) winsize 58
722 18:01:12.965767 [CA 1] Center 35 (7~63) winsize 57
723 18:01:12.965865 [CA 2] Center 28 (-1~58) winsize 60
724 18:01:12.965962 [CA 3] Center 23 (-4~51) winsize 56
725 18:01:12.966057 [CA 4] Center 24 (-4~52) winsize 57
726 18:01:12.966153 [CA 5] Center 29 (0~59) winsize 60
727 18:01:12.966249
728 18:01:12.966342 [CATrainingPosCal] consider 1 rank data
729 18:01:12.966440 u2DelayCellTimex100 = 744/100 ps
730 18:01:12.966539 CA0 delay=34 (6~63),Diff = 11 PI (14 cell)
731 18:01:12.966633 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
732 18:01:12.966730 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
733 18:01:12.966829 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
734 18:01:12.966923 CA4 delay=24 (-4~52),Diff = 1 PI (1 cell)
735 18:01:12.967020 CA5 delay=29 (0~59),Diff = 6 PI (7 cell)
736 18:01:12.967116
737 18:01:12.967210 CA PerBit enable=1, Macro0, CA PI delay=23
738 18:01:12.967307 === u2Vref_new: 0x5c --> 0x3c
739 18:01:12.967402
740 18:01:12.967495 Vref(ca) range 1: 28
741 18:01:12.967590
742 18:01:12.967686 CS Dly= 8 (39-0-32)
743 18:01:12.967781 Write Rank0 MR13 =0xd8
744 18:01:12.967876 Write Rank0 MR13 =0xd8
745 18:01:12.967972 Write Rank0 MR12 =0x5c
746 18:01:12.968064 Write Rank1 MR13 =0x59
747 18:01:12.968159 ==
748 18:01:12.968478 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 18:01:12.968557 fsp= 1, odt_onoff= 1, Byte mode= 0
750 18:01:12.968620 ==
751 18:01:12.968681 === u2Vref_new: 0x56 --> 0x2d
752 18:01:12.968777 === u2Vref_new: 0x58 --> 0x38
753 18:01:12.968873 === u2Vref_new: 0x5a --> 0x39
754 18:01:12.968971 === u2Vref_new: 0x5c --> 0x3c
755 18:01:12.969067 === u2Vref_new: 0x5e --> 0x3d
756 18:01:12.969160 === u2Vref_new: 0x60 --> 0xa0
757 18:01:12.969257 [CA 0] Center 35 (7~63) winsize 57
758 18:01:12.969354 [CA 1] Center 34 (6~63) winsize 58
759 18:01:12.969459 [CA 2] Center 28 (-1~58) winsize 60
760 18:01:12.969558 [CA 3] Center 22 (-6~51) winsize 58
761 18:01:12.969655 [CA 4] Center 23 (-5~51) winsize 57
762 18:01:12.969748 [CA 5] Center 29 (0~58) winsize 59
763 18:01:12.969844
764 18:01:12.969940 [CATrainingPosCal] consider 2 rank data
765 18:01:12.970034 u2DelayCellTimex100 = 744/100 ps
766 18:01:12.970131 CA0 delay=35 (7~63),Diff = 12 PI (15 cell)
767 18:01:12.970227 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
768 18:01:12.970321 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
769 18:01:12.970417 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 18:01:12.970514 CA4 delay=23 (-4~51),Diff = 0 PI (0 cell)
771 18:01:12.970608 CA5 delay=29 (0~58),Diff = 6 PI (7 cell)
772 18:01:12.970704
773 18:01:12.970800 CA PerBit enable=1, Macro0, CA PI delay=23
774 18:01:12.970893 === u2Vref_new: 0x5e --> 0x3d
775 18:01:12.970989
776 18:01:12.971085 Vref(ca) range 1: 30
777 18:01:12.971178
778 18:01:12.971274 CS Dly= 5 (36-0-32)
779 18:01:12.971370 Write Rank1 MR13 =0xd8
780 18:01:12.971462 Write Rank1 MR13 =0xd8
781 18:01:12.971558 Write Rank1 MR12 =0x5e
782 18:01:12.971654 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 18:01:12.971748 Write Rank0 MR2 =0xad
784 18:01:12.971844 [Write Leveling]
785 18:01:12.971940 delay byte0 byte1 byte2 byte3
786 18:01:12.972032
787 18:01:12.972128 10 0 0
788 18:01:12.972227 11 0 0
789 18:01:12.972322 12 0 0
790 18:01:12.972422 13 0 0
791 18:01:12.972517 14 0 0
792 18:01:12.972614 15 0 0
793 18:01:12.972712 16 0 0
794 18:01:12.972808 17 0 0
795 18:01:12.972906 18 0 0
796 18:01:12.973003 19 0 0
797 18:01:12.973098 20 0 0
798 18:01:12.973196 21 0 0
799 18:01:12.973293 22 0 0
800 18:01:12.973389 23 0 0
801 18:01:12.973504 24 0 0
802 18:01:12.973602 25 0 ff
803 18:01:12.973698 26 0 ff
804 18:01:12.973775 27 0 ff
805 18:01:12.973842 28 0 ff
806 18:01:12.973920 29 0 ff
807 18:01:12.974015 30 0 ff
808 18:01:12.974114 31 0 ff
809 18:01:12.974210 32 ff ff
810 18:01:12.974306 33 ff ff
811 18:01:12.974404 34 ff ff
812 18:01:12.974501 35 ff ff
813 18:01:12.974596 36 ff ff
814 18:01:12.974695 37 ff ff
815 18:01:12.974791 38 ff ff
816 18:01:12.974886 pass bytecount = 0xff (0xff: all bytes pass)
817 18:01:12.974984
818 18:01:12.975079 DQS0 dly: 32
819 18:01:12.975174 DQS1 dly: 25
820 18:01:12.975269 Write Rank0 MR2 =0x2d
821 18:01:12.975363 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 18:01:12.975458 Write Rank0 MR1 =0xd6
823 18:01:12.975554 [Gating]
824 18:01:12.975647 ==
825 18:01:12.975744 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
826 18:01:12.975840 fsp= 1, odt_onoff= 1, Byte mode= 0
827 18:01:12.975933 ==
828 18:01:12.976032 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
829 18:01:12.976130 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
830 18:01:12.976229 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
831 18:01:12.976327 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
832 18:01:12.976423 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 18:01:12.976516 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 18:01:12.976583 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 18:01:12.976667 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 18:01:12.976767 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 18:01:12.976866 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 18:01:12.976961 3 2 8 |2c2c 2c2b |(11 10)(11 11) |(1 0)(1 0)| 0
839 18:01:12.977061 3 2 12 |303 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
840 18:01:12.977160 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
841 18:01:12.977256 3 2 20 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
842 18:01:12.977355 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 18:01:12.977467 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 18:01:12.977567 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 18:01:12.977669 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 18:01:12.977766 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
847 18:01:12.977865 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 18:01:12.977963 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 18:01:12.978058 [Byte 0] Lead/lag Transition tap number (1)
850 18:01:12.978156 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
851 18:01:12.978254 [Byte 1] Lead/lag falling Transition (3, 3, 20)
852 18:01:12.978347 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 18:01:12.978448 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 18:01:12.978544 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 18:01:12.978641 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 18:01:12.978749 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
857 18:01:12.978848 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
858 18:01:12.978947 3 4 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
859 18:01:12.979045 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
860 18:01:12.979141 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 18:01:12.979239 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 18:01:12.979338 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 18:01:12.979435 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 18:01:12.979534 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 18:01:12.979632 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 18:01:12.979728 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 18:01:12.979826 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 18:01:12.979925 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 18:01:12.980022 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 18:01:12.980121 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 18:01:12.980423 [Byte 0] Lead/lag falling Transition (3, 6, 0)
872 18:01:12.980513 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
873 18:01:12.980638 [Byte 1] Lead/lag falling Transition (3, 6, 4)
874 18:01:12.980760 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
875 18:01:12.980876 [Byte 0] Lead/lag Transition tap number (3)
876 18:01:12.980978 3 6 12 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
877 18:01:12.981076 [Byte 1] Lead/lag Transition tap number (3)
878 18:01:12.981171 3 6 16 |4646 202 |(10 10)(11 11) |(0 0)(0 0)| 0
879 18:01:12.981273 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 18:01:12.981369 [Byte 0]First pass (3, 6, 20)
881 18:01:12.981470 [Byte 1]First pass (3, 6, 20)
882 18:01:12.981537 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 18:01:12.981634 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 18:01:12.981735 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 18:01:12.981831 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 18:01:12.981927 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 18:01:12.982028 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 18:01:12.982125 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 18:01:12.982227 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 18:01:12.982323 All bytes gating window > 1UI, Early break!
891 18:01:12.982416
892 18:01:12.982514 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
893 18:01:12.982608
894 18:01:12.982707 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
895 18:01:12.982806
896 18:01:12.982917
897 18:01:12.983016
898 18:01:12.983110 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
899 18:01:12.983209
900 18:01:12.983303 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
901 18:01:12.983402
902 18:01:12.983498
903 18:01:12.983594 Write Rank0 MR1 =0x56
904 18:01:12.983695
905 18:01:12.983790 best RODT dly(2T, 0.5T) = (2, 3)
906 18:01:12.983888
907 18:01:12.983986 best RODT dly(2T, 0.5T) = (2, 3)
908 18:01:12.984079 ==
909 18:01:12.984179 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 18:01:12.984273 fsp= 1, odt_onoff= 1, Byte mode= 0
911 18:01:12.984369 ==
912 18:01:12.984467 Start DQ dly to find pass range UseTestEngine =0
913 18:01:12.984561 x-axis: bit #, y-axis: DQ dly (-127~63)
914 18:01:12.984633 RX Vref Scan = 0
915 18:01:12.984695 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 18:01:12.984756 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 18:01:12.984822 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 18:01:12.984896 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 18:01:12.984994 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 18:01:12.985103 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 18:01:12.985201 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 18:01:12.985297 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 18:01:12.985399 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 18:01:12.985506 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 18:01:12.985606 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 18:01:12.985704 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 18:01:12.985799 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 18:01:12.985898 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 18:01:12.986002 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 18:01:12.986099 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 18:01:12.986199 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 18:01:12.986299 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 18:01:12.986399 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 18:01:12.986499 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 18:01:12.986597 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 18:01:12.986692 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 18:01:12.986792 -4, [0] xxxxxxxx oxxxxxxx [MSB]
938 18:01:12.986887 -3, [0] xxxoxxxx oxxxxxxx [MSB]
939 18:01:12.986984 -2, [0] xxxoxxxx oxxxxxxx [MSB]
940 18:01:12.987095 -1, [0] xxxoxxxx oxxoxxxx [MSB]
941 18:01:12.987190 0, [0] xxxoxxxx oxxoxoxx [MSB]
942 18:01:12.987290 1, [0] xxxoxoox ooxoooox [MSB]
943 18:01:12.987391 2, [0] xxxoxoox ooxoooox [MSB]
944 18:01:12.987490 3, [0] xxxoxoox ooxoooox [MSB]
945 18:01:12.987592 4, [0] xxxoxoox ooxoooox [MSB]
946 18:01:12.987691 5, [0] xxxooooo ooxooooo [MSB]
947 18:01:12.987786 6, [0] oooooooo ooxooooo [MSB]
948 18:01:12.987886 7, [0] oooooooo ooxooooo [MSB]
949 18:01:12.987981 32, [0] oooxoooo oooooooo [MSB]
950 18:01:12.988076 33, [0] oooxoooo xooooooo [MSB]
951 18:01:12.988175 34, [0] oooxoooo xooxoooo [MSB]
952 18:01:12.988273 35, [0] oooxoooo xxoxxooo [MSB]
953 18:01:12.988368 36, [0] oooxoxoo xxoxxoxo [MSB]
954 18:01:12.988466 37, [0] oooxoxxx xxoxxxxo [MSB]
955 18:01:12.988530 38, [0] oooxoxxx xxoxxxxo [MSB]
956 18:01:12.988591 39, [0] oooxoxxx xxoxxxxx [MSB]
957 18:01:12.988652 40, [0] ooxxxxxx xxoxxxxx [MSB]
958 18:01:12.988745 41, [0] xxxxxxxx xxoxxxxx [MSB]
959 18:01:12.988842 42, [0] xxxxxxxx xxxxxxxx [MSB]
960 18:01:12.988940 iDelay=42, Bit 0, Center 23 (6 ~ 40) 35
961 18:01:12.989045 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
962 18:01:12.989155 iDelay=42, Bit 2, Center 22 (6 ~ 39) 34
963 18:01:12.989255 iDelay=42, Bit 3, Center 14 (-3 ~ 31) 35
964 18:01:12.989351 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
965 18:01:12.989454 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
966 18:01:12.989551 iDelay=42, Bit 6, Center 18 (1 ~ 36) 36
967 18:01:12.989645 iDelay=42, Bit 7, Center 20 (5 ~ 36) 32
968 18:01:12.989741 iDelay=42, Bit 8, Center 14 (-4 ~ 32) 37
969 18:01:12.989837 iDelay=42, Bit 9, Center 17 (1 ~ 34) 34
970 18:01:12.989932 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
971 18:01:12.990025 iDelay=42, Bit 11, Center 16 (-1 ~ 33) 35
972 18:01:12.990123 iDelay=42, Bit 12, Center 17 (1 ~ 34) 34
973 18:01:12.990217 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
974 18:01:12.990312 iDelay=42, Bit 14, Center 18 (1 ~ 35) 35
975 18:01:12.990408 iDelay=42, Bit 15, Center 21 (5 ~ 38) 34
976 18:01:12.990502 ==
977 18:01:12.990598 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 18:01:12.990694 fsp= 1, odt_onoff= 1, Byte mode= 0
979 18:01:12.990787 ==
980 18:01:12.990881 DQS Delay:
981 18:01:12.990977 DQS0 = 0, DQS1 = 0
982 18:01:12.991071 DQM Delay:
983 18:01:12.991164 DQM0 = 20, DQM1 = 18
984 18:01:12.991260 DQ Delay:
985 18:01:12.991354 DQ0 =23, DQ1 =23, DQ2 =22, DQ3 =14
986 18:01:12.991454 DQ4 =22, DQ5 =18, DQ6 =18, DQ7 =20
987 18:01:12.991552 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =16
988 18:01:12.991649 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
989 18:01:12.991741
990 18:01:12.991837
991 18:01:12.991932 DramC Write-DBI off
992 18:01:12.992024 ==
993 18:01:12.992122 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
994 18:01:12.992217 fsp= 1, odt_onoff= 1, Byte mode= 0
995 18:01:12.992311 ==
996 18:01:12.992409 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
997 18:01:12.992503
998 18:01:12.992597 Begin, DQ Scan Range 921~1177
999 18:01:12.992692
1000 18:01:12.992789
1001 18:01:12.993093 TX Vref Scan disable
1002 18:01:12.993208 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1003 18:01:12.993333 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1004 18:01:12.993474 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1005 18:01:12.993601 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1006 18:01:12.993716 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1007 18:01:12.993823 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1008 18:01:12.993892 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1009 18:01:12.993955 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1010 18:01:12.994021 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1011 18:01:12.994089 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1012 18:01:12.994151 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1013 18:01:12.994211 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1014 18:01:12.994280 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1015 18:01:12.994346 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1016 18:01:12.994410 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1017 18:01:12.994473 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1018 18:01:12.994549 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1019 18:01:12.994647 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1020 18:01:12.994743 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1021 18:01:12.994840 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1022 18:01:12.994938 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1023 18:01:12.995030 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1024 18:01:12.995135 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1025 18:01:12.995235 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1026 18:01:12.995338 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1027 18:01:12.995436 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1028 18:01:12.995534 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1029 18:01:12.995632 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1030 18:01:12.995726 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1031 18:01:12.995823 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1032 18:01:12.995922 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1033 18:01:12.996021 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1034 18:01:12.996120 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1035 18:01:12.996218 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1036 18:01:12.996315 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1037 18:01:12.996415 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1038 18:01:12.996513 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1039 18:01:12.996612 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1040 18:01:12.996711 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1041 18:01:12.996806 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1042 18:01:12.996903 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1043 18:01:12.997000 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1044 18:01:12.997095 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1045 18:01:12.997193 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1046 18:01:12.997288 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1047 18:01:12.997385 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1048 18:01:12.997482 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1049 18:01:12.997578 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1050 18:01:12.997657 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1051 18:01:12.997724 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1052 18:01:12.997784 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1053 18:01:12.997844 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1054 18:01:12.997908 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1055 18:01:12.997970 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1056 18:01:12.998034 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1057 18:01:12.998129 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1058 18:01:12.998236 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1059 18:01:12.998334 978 |3 6 18|[0] xxxoooox oooooooo [MSB]
1060 18:01:12.998429 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1061 18:01:12.998530 980 |3 6 20|[0] xooooooo oooooooo [MSB]
1062 18:01:12.998629 989 |3 6 29|[0] oooooooo oooxoooo [MSB]
1063 18:01:12.998723 990 |3 6 30|[0] oooooooo xooxoxoo [MSB]
1064 18:01:12.998821 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1065 18:01:12.998918 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1066 18:01:12.999012 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1067 18:01:12.999111 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1068 18:01:12.999207 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1069 18:01:12.999302 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1070 18:01:12.999401 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1071 18:01:12.999501 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1072 18:01:12.999599 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1073 18:01:12.999697 Byte0, DQ PI dly=987, DQM PI dly= 987
1074 18:01:12.999792 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1075 18:01:12.999885
1076 18:01:12.999980 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1077 18:01:13.000072
1078 18:01:13.000164 Byte1, DQ PI dly=980, DQM PI dly= 980
1079 18:01:13.000261 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1080 18:01:13.000354
1081 18:01:13.000449 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1082 18:01:13.000542
1083 18:01:13.000636 ==
1084 18:01:13.000733 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1085 18:01:13.000828 fsp= 1, odt_onoff= 1, Byte mode= 0
1086 18:01:13.000921 ==
1087 18:01:13.001015 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1088 18:01:13.001109
1089 18:01:13.001200 Begin, DQ Scan Range 956~1020
1090 18:01:13.001294 Write Rank0 MR14 =0x0
1091 18:01:13.001388
1092 18:01:13.001473 CH=0, VrefRange= 0, VrefLevel = 0
1093 18:01:13.001534 TX Bit0 (984~994) 11 989, Bit8 (969~984) 16 976,
1094 18:01:13.001609 TX Bit1 (982~994) 13 988, Bit9 (971~985) 15 978,
1095 18:01:13.001689 TX Bit2 (983~994) 12 988, Bit10 (977~990) 14 983,
1096 18:01:13.001785 TX Bit3 (977~990) 14 983, Bit11 (970~983) 14 976,
1097 18:01:13.001882 TX Bit4 (982~993) 12 987, Bit12 (974~983) 10 978,
1098 18:01:13.001981 TX Bit5 (978~992) 15 985, Bit13 (974~983) 10 978,
1099 18:01:13.002074 TX Bit6 (979~992) 14 985, Bit14 (974~988) 15 981,
1100 18:01:13.002171 TX Bit7 (982~994) 13 988, Bit15 (976~990) 15 983,
1101 18:01:13.002265
1102 18:01:13.002356 Write Rank0 MR14 =0x2
1103 18:01:13.002450
1104 18:01:13.002545 CH=0, VrefRange= 0, VrefLevel = 2
1105 18:01:13.002639 TX Bit0 (983~994) 12 988, Bit8 (969~984) 16 976,
1106 18:01:13.002734 TX Bit1 (981~994) 14 987, Bit9 (971~986) 16 978,
1107 18:01:13.002834 TX Bit2 (983~995) 13 989, Bit10 (976~991) 16 983,
1108 18:01:13.003147 TX Bit3 (977~991) 15 984, Bit11 (970~983) 14 976,
1109 18:01:13.003272 TX Bit4 (981~993) 13 987, Bit12 (974~984) 11 979,
1110 18:01:13.003394 TX Bit5 (978~992) 15 985, Bit13 (974~984) 11 979,
1111 18:01:13.003512 TX Bit6 (978~993) 16 985, Bit14 (974~989) 16 981,
1112 18:01:13.003634 TX Bit7 (982~994) 13 988, Bit15 (975~991) 17 983,
1113 18:01:13.003751
1114 18:01:13.003853 Write Rank0 MR14 =0x4
1115 18:01:13.003943
1116 18:01:13.004005 CH=0, VrefRange= 0, VrefLevel = 4
1117 18:01:13.004065 TX Bit0 (983~995) 13 989, Bit8 (969~985) 17 977,
1118 18:01:13.004128 TX Bit1 (981~995) 15 988, Bit9 (970~987) 18 978,
1119 18:01:13.004189 TX Bit2 (982~996) 15 989, Bit10 (976~991) 16 983,
1120 18:01:13.004253 TX Bit3 (977~992) 16 984, Bit11 (969~984) 16 976,
1121 18:01:13.004315 TX Bit4 (981~994) 14 987, Bit12 (973~985) 13 979,
1122 18:01:13.004374 TX Bit5 (978~992) 15 985, Bit13 (973~985) 13 979,
1123 18:01:13.004440 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1124 18:01:13.004536 TX Bit7 (981~995) 15 988, Bit15 (975~991) 17 983,
1125 18:01:13.004627
1126 18:01:13.004721 Write Rank0 MR14 =0x6
1127 18:01:13.004814
1128 18:01:13.004913 CH=0, VrefRange= 0, VrefLevel = 6
1129 18:01:13.005012 TX Bit0 (983~997) 15 990, Bit8 (969~986) 18 977,
1130 18:01:13.005109 TX Bit1 (980~996) 17 988, Bit9 (970~988) 19 979,
1131 18:01:13.005207 TX Bit2 (982~997) 16 989, Bit10 (976~992) 17 984,
1132 18:01:13.005305 TX Bit3 (976~992) 17 984, Bit11 (969~985) 17 977,
1133 18:01:13.005401 TX Bit4 (981~995) 15 988, Bit12 (972~986) 15 979,
1134 18:01:13.005487 TX Bit5 (978~993) 16 985, Bit13 (973~986) 14 979,
1135 18:01:13.005548 TX Bit6 (978~994) 17 986, Bit14 (972~990) 19 981,
1136 18:01:13.005615 TX Bit7 (981~996) 16 988, Bit15 (975~992) 18 983,
1137 18:01:13.005678
1138 18:01:13.005737 Write Rank0 MR14 =0x8
1139 18:01:13.005796
1140 18:01:13.005857 CH=0, VrefRange= 0, VrefLevel = 8
1141 18:01:13.005918 TX Bit0 (983~998) 16 990, Bit8 (968~987) 20 977,
1142 18:01:13.005982 TX Bit1 (980~997) 18 988, Bit9 (970~988) 19 979,
1143 18:01:13.006057 TX Bit2 (982~998) 17 990, Bit10 (976~992) 17 984,
1144 18:01:13.006150 TX Bit3 (976~992) 17 984, Bit11 (969~986) 18 977,
1145 18:01:13.006250 TX Bit4 (980~995) 16 987, Bit12 (972~987) 16 979,
1146 18:01:13.006346 TX Bit5 (978~993) 16 985, Bit13 (972~987) 16 979,
1147 18:01:13.006444 TX Bit6 (978~994) 17 986, Bit14 (972~990) 19 981,
1148 18:01:13.006539 TX Bit7 (979~997) 19 988, Bit15 (975~992) 18 983,
1149 18:01:13.006632
1150 18:01:13.006723 Write Rank0 MR14 =0xa
1151 18:01:13.006820
1152 18:01:13.006913 CH=0, VrefRange= 0, VrefLevel = 10
1153 18:01:13.007005 TX Bit0 (982~998) 17 990, Bit8 (968~988) 21 978,
1154 18:01:13.007101 TX Bit1 (981~998) 18 989, Bit9 (969~989) 21 979,
1155 18:01:13.007197 TX Bit2 (982~998) 17 990, Bit10 (975~993) 19 984,
1156 18:01:13.007290 TX Bit3 (976~992) 17 984, Bit11 (969~987) 19 978,
1157 18:01:13.007385 TX Bit4 (979~996) 18 987, Bit12 (971~988) 18 979,
1158 18:01:13.007480 TX Bit5 (977~993) 17 985, Bit13 (971~988) 18 979,
1159 18:01:13.007572 TX Bit6 (978~995) 18 986, Bit14 (971~991) 21 981,
1160 18:01:13.007668 TX Bit7 (979~997) 19 988, Bit15 (974~993) 20 983,
1161 18:01:13.007762
1162 18:01:13.007853 Write Rank0 MR14 =0xc
1163 18:01:13.007955
1164 18:01:13.008050 CH=0, VrefRange= 0, VrefLevel = 12
1165 18:01:13.008143 TX Bit0 (982~999) 18 990, Bit8 (968~988) 21 978,
1166 18:01:13.008242 TX Bit1 (979~998) 20 988, Bit9 (969~989) 21 979,
1167 18:01:13.008338 TX Bit2 (981~999) 19 990, Bit10 (975~994) 20 984,
1168 18:01:13.008431 TX Bit3 (976~993) 18 984, Bit11 (969~988) 20 978,
1169 18:01:13.008527 TX Bit4 (979~997) 19 988, Bit12 (970~989) 20 979,
1170 18:01:13.008622 TX Bit5 (977~994) 18 985, Bit13 (971~988) 18 979,
1171 18:01:13.008715 TX Bit6 (977~996) 20 986, Bit14 (971~991) 21 981,
1172 18:01:13.008811 TX Bit7 (979~999) 21 989, Bit15 (975~994) 20 984,
1173 18:01:13.008905
1174 18:01:13.008997 Write Rank0 MR14 =0xe
1175 18:01:13.009090
1176 18:01:13.009184 CH=0, VrefRange= 0, VrefLevel = 14
1177 18:01:13.009281 TX Bit0 (981~999) 19 990, Bit8 (968~989) 22 978,
1178 18:01:13.009380 TX Bit1 (979~999) 21 989, Bit9 (969~990) 22 979,
1179 18:01:13.009485 TX Bit2 (981~999) 19 990, Bit10 (975~995) 21 985,
1180 18:01:13.009581 TX Bit3 (975~993) 19 984, Bit11 (968~988) 21 978,
1181 18:01:13.009677 TX Bit4 (979~998) 20 988, Bit12 (970~989) 20 979,
1182 18:01:13.009769 TX Bit5 (977~995) 19 986, Bit13 (970~989) 20 979,
1183 18:01:13.009864 TX Bit6 (977~997) 21 987, Bit14 (971~991) 21 981,
1184 18:01:13.009964 TX Bit7 (979~999) 21 989, Bit15 (974~995) 22 984,
1185 18:01:13.010058
1186 18:01:13.010153 Write Rank0 MR14 =0x10
1187 18:01:13.010246
1188 18:01:13.010338 CH=0, VrefRange= 0, VrefLevel = 16
1189 18:01:13.010434 TX Bit0 (981~999) 19 990, Bit8 (967~990) 24 978,
1190 18:01:13.010530 TX Bit1 (979~999) 21 989, Bit9 (969~990) 22 979,
1191 18:01:13.010623 TX Bit2 (980~1000) 21 990, Bit10 (974~996) 23 985,
1192 18:01:13.010721 TX Bit3 (975~994) 20 984, Bit11 (968~989) 22 978,
1193 18:01:13.010819 TX Bit4 (978~998) 21 988, Bit12 (970~989) 20 979,
1194 18:01:13.010912 TX Bit5 (977~996) 20 986, Bit13 (970~989) 20 979,
1195 18:01:13.011009 TX Bit6 (977~998) 22 987, Bit14 (970~992) 23 981,
1196 18:01:13.011104 TX Bit7 (979~999) 21 989, Bit15 (974~996) 23 985,
1197 18:01:13.011195
1198 18:01:13.011289 Write Rank0 MR14 =0x12
1199 18:01:13.011381
1200 18:01:13.011478 CH=0, VrefRange= 0, VrefLevel = 18
1201 18:01:13.011579 TX Bit0 (982~1000) 19 991, Bit8 (968~990) 23 979,
1202 18:01:13.011674 TX Bit1 (978~1000) 23 989, Bit9 (969~990) 22 979,
1203 18:01:13.011771 TX Bit2 (979~1000) 22 989, Bit10 (974~997) 24 985,
1204 18:01:13.011867 TX Bit3 (975~994) 20 984, Bit11 (968~989) 22 978,
1205 18:01:13.011961 TX Bit4 (978~999) 22 988, Bit12 (970~990) 21 980,
1206 18:01:13.012055 TX Bit5 (977~997) 21 987, Bit13 (970~990) 21 980,
1207 18:01:13.012150 TX Bit6 (977~999) 23 988, Bit14 (970~992) 23 981,
1208 18:01:13.012446 TX Bit7 (978~1000) 23 989, Bit15 (974~996) 23 985,
1209 18:01:13.012544
1210 18:01:13.012638 Write Rank0 MR14 =0x14
1211 18:01:13.012736
1212 18:01:13.012832 CH=0, VrefRange= 0, VrefLevel = 20
1213 18:01:13.012933 TX Bit0 (980~1000) 21 990, Bit8 (967~990) 24 978,
1214 18:01:13.013027 TX Bit1 (978~1000) 23 989, Bit9 (968~991) 24 979,
1215 18:01:13.013120 TX Bit2 (979~1000) 22 989, Bit10 (974~997) 24 985,
1216 18:01:13.013218 TX Bit3 (975~994) 20 984, Bit11 (968~989) 22 978,
1217 18:01:13.013312 TX Bit4 (978~999) 22 988, Bit12 (969~990) 22 979,
1218 18:01:13.013408 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
1219 18:01:13.013514 TX Bit6 (977~999) 23 988, Bit14 (970~993) 24 981,
1220 18:01:13.013607 TX Bit7 (978~1000) 23 989, Bit15 (973~997) 25 985,
1221 18:01:13.013701
1222 18:01:13.013797 Write Rank0 MR14 =0x16
1223 18:01:13.013888
1224 18:01:13.013982 CH=0, VrefRange= 0, VrefLevel = 22
1225 18:01:13.014077 TX Bit0 (980~1000) 21 990, Bit8 (967~990) 24 978,
1226 18:01:13.014170 TX Bit1 (978~1000) 23 989, Bit9 (968~991) 24 979,
1227 18:01:13.014266 TX Bit2 (979~1000) 22 989, Bit10 (973~997) 25 985,
1228 18:01:13.014364 TX Bit3 (975~995) 21 985, Bit11 (968~990) 23 979,
1229 18:01:13.014458 TX Bit4 (978~999) 22 988, Bit12 (969~991) 23 980,
1230 18:01:13.014557 TX Bit5 (976~998) 23 987, Bit13 (969~990) 22 979,
1231 18:01:13.014652 TX Bit6 (977~999) 23 988, Bit14 (969~993) 25 981,
1232 18:01:13.014744 TX Bit7 (978~1000) 23 989, Bit15 (972~997) 26 984,
1233 18:01:13.014839
1234 18:01:13.014939 Write Rank0 MR14 =0x18
1235 18:01:13.015034
1236 18:01:13.015131 CH=0, VrefRange= 0, VrefLevel = 24
1237 18:01:13.015227 TX Bit0 (979~1001) 23 990, Bit8 (967~991) 25 979,
1238 18:01:13.015320 TX Bit1 (978~1000) 23 989, Bit9 (969~991) 23 980,
1239 18:01:13.015417 TX Bit2 (979~1001) 23 990, Bit10 (973~998) 26 985,
1240 18:01:13.015511 TX Bit3 (975~995) 21 985, Bit11 (967~990) 24 978,
1241 18:01:13.015604 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
1242 18:01:13.015701 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1243 18:01:13.015797 TX Bit6 (976~999) 24 987, Bit14 (969~994) 26 981,
1244 18:01:13.015894 TX Bit7 (978~1001) 24 989, Bit15 (972~997) 26 984,
1245 18:01:13.015989
1246 18:01:13.016082 Write Rank0 MR14 =0x1a
1247 18:01:13.016175
1248 18:01:13.016269 CH=0, VrefRange= 0, VrefLevel = 26
1249 18:01:13.016361 TX Bit0 (979~1001) 23 990, Bit8 (966~990) 25 978,
1250 18:01:13.016458 TX Bit1 (978~1001) 24 989, Bit9 (968~992) 25 980,
1251 18:01:13.016528 TX Bit2 (979~1001) 23 990, Bit10 (973~997) 25 985,
1252 18:01:13.016621 TX Bit3 (974~996) 23 985, Bit11 (967~990) 24 978,
1253 18:01:13.016718 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
1254 18:01:13.016811 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
1255 18:01:13.016907 TX Bit6 (976~1000) 25 988, Bit14 (969~994) 26 981,
1256 18:01:13.017003 TX Bit7 (978~1001) 24 989, Bit15 (971~997) 27 984,
1257 18:01:13.017095
1258 18:01:13.017190 Write Rank0 MR14 =0x1c
1259 18:01:13.017281
1260 18:01:13.017375 CH=0, VrefRange= 0, VrefLevel = 28
1261 18:01:13.017478 TX Bit0 (978~1002) 25 990, Bit8 (966~990) 25 978,
1262 18:01:13.017572 TX Bit1 (978~1001) 24 989, Bit9 (968~992) 25 980,
1263 18:01:13.017649 TX Bit2 (979~1002) 24 990, Bit10 (972~997) 26 984,
1264 18:01:13.017711 TX Bit3 (974~996) 23 985, Bit11 (967~991) 25 979,
1265 18:01:13.017770 TX Bit4 (977~1000) 24 988, Bit12 (968~992) 25 980,
1266 18:01:13.017829 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1267 18:01:13.017897 TX Bit6 (976~1000) 25 988, Bit14 (969~995) 27 982,
1268 18:01:13.017964 TX Bit7 (978~1001) 24 989, Bit15 (972~997) 26 984,
1269 18:01:13.018056
1270 18:01:13.018136 Write Rank0 MR14 =0x1e
1271 18:01:13.018228
1272 18:01:13.018319 CH=0, VrefRange= 0, VrefLevel = 30
1273 18:01:13.018416 TX Bit0 (979~1002) 24 990, Bit8 (966~990) 25 978,
1274 18:01:13.018511 TX Bit1 (978~1001) 24 989, Bit9 (968~991) 24 979,
1275 18:01:13.018609 TX Bit2 (978~1002) 25 990, Bit10 (972~997) 26 984,
1276 18:01:13.018702 TX Bit3 (973~996) 24 984, Bit11 (967~991) 25 979,
1277 18:01:13.018794 TX Bit4 (977~1001) 25 989, Bit12 (969~992) 24 980,
1278 18:01:13.018892 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1279 18:01:13.018987 TX Bit6 (977~999) 23 988, Bit14 (969~996) 28 982,
1280 18:01:13.019083 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1281 18:01:13.019177
1282 18:01:13.019267 Write Rank0 MR14 =0x20
1283 18:01:13.019362
1284 18:01:13.019460 CH=0, VrefRange= 0, VrefLevel = 32
1285 18:01:13.019558 TX Bit0 (979~1002) 24 990, Bit8 (966~990) 25 978,
1286 18:01:13.019653 TX Bit1 (978~1001) 24 989, Bit9 (968~991) 24 979,
1287 18:01:13.019746 TX Bit2 (978~1002) 25 990, Bit10 (972~997) 26 984,
1288 18:01:13.019841 TX Bit3 (973~996) 24 984, Bit11 (967~991) 25 979,
1289 18:01:13.019936 TX Bit4 (977~1001) 25 989, Bit12 (969~992) 24 980,
1290 18:01:13.020031 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1291 18:01:13.020127 TX Bit6 (977~999) 23 988, Bit14 (969~996) 28 982,
1292 18:01:13.020222 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1293 18:01:13.020314
1294 18:01:13.020405 Write Rank0 MR14 =0x22
1295 18:01:13.020500
1296 18:01:13.020592 CH=0, VrefRange= 0, VrefLevel = 34
1297 18:01:13.020686 TX Bit0 (979~1002) 24 990, Bit8 (966~990) 25 978,
1298 18:01:13.020780 TX Bit1 (978~1001) 24 989, Bit9 (968~991) 24 979,
1299 18:01:13.020872 TX Bit2 (978~1002) 25 990, Bit10 (972~997) 26 984,
1300 18:01:13.020964 TX Bit3 (973~996) 24 984, Bit11 (967~991) 25 979,
1301 18:01:13.021061 TX Bit4 (977~1001) 25 989, Bit12 (969~992) 24 980,
1302 18:01:13.021154 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1303 18:01:13.021247 TX Bit6 (977~999) 23 988, Bit14 (969~996) 28 982,
1304 18:01:13.021342 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1305 18:01:13.021441
1306 18:01:13.021504 Write Rank0 MR14 =0x24
1307 18:01:13.021567
1308 18:01:13.021626 CH=0, VrefRange= 0, VrefLevel = 36
1309 18:01:13.021892 TX Bit0 (979~1002) 24 990, Bit8 (966~990) 25 978,
1310 18:01:13.021998 TX Bit1 (978~1001) 24 989, Bit9 (968~991) 24 979,
1311 18:01:13.022093 TX Bit2 (978~1002) 25 990, Bit10 (972~997) 26 984,
1312 18:01:13.022189 TX Bit3 (973~996) 24 984, Bit11 (967~991) 25 979,
1313 18:01:13.022285 TX Bit4 (977~1001) 25 989, Bit12 (969~992) 24 980,
1314 18:01:13.022378 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1315 18:01:13.022486 TX Bit6 (977~999) 23 988, Bit14 (969~996) 28 982,
1316 18:01:13.022603 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1317 18:01:13.022713
1318 18:01:13.022810 Write Rank0 MR14 =0x26
1319 18:01:13.022903
1320 18:01:13.022998 CH=0, VrefRange= 0, VrefLevel = 38
1321 18:01:13.023080 TX Bit0 (979~1002) 24 990, Bit8 (966~990) 25 978,
1322 18:01:13.023141 TX Bit1 (978~1001) 24 989, Bit9 (968~991) 24 979,
1323 18:01:13.023200 TX Bit2 (978~1002) 25 990, Bit10 (972~997) 26 984,
1324 18:01:13.023271 TX Bit3 (973~996) 24 984, Bit11 (967~991) 25 979,
1325 18:01:13.023366 TX Bit4 (977~1001) 25 989, Bit12 (969~992) 24 980,
1326 18:01:13.023460 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1327 18:01:13.023555 TX Bit6 (977~999) 23 988, Bit14 (969~996) 28 982,
1328 18:01:13.023649 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1329 18:01:13.023740
1330 18:01:13.023830
1331 18:01:13.023926 TX Vref found, early break! 367< 377
1332 18:01:13.024021 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1333 18:01:13.024113 u1DelayCellOfst[0]=7 cells (6 PI)
1334 18:01:13.024207 u1DelayCellOfst[1]=6 cells (5 PI)
1335 18:01:13.024301 u1DelayCellOfst[2]=7 cells (6 PI)
1336 18:01:13.024392 u1DelayCellOfst[3]=0 cells (0 PI)
1337 18:01:13.024486 u1DelayCellOfst[4]=6 cells (5 PI)
1338 18:01:13.024579 u1DelayCellOfst[5]=3 cells (3 PI)
1339 18:01:13.024672 u1DelayCellOfst[6]=5 cells (4 PI)
1340 18:01:13.024765 u1DelayCellOfst[7]=6 cells (5 PI)
1341 18:01:13.024859 Byte0, DQ PI dly=984, DQM PI dly= 987
1342 18:01:13.024950 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1343 18:01:13.025045
1344 18:01:13.025139 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1345 18:01:13.025232
1346 18:01:13.025326 u1DelayCellOfst[8]=0 cells (0 PI)
1347 18:01:13.025419 u1DelayCellOfst[9]=1 cells (1 PI)
1348 18:01:13.025529 u1DelayCellOfst[10]=7 cells (6 PI)
1349 18:01:13.025624 u1DelayCellOfst[11]=1 cells (1 PI)
1350 18:01:13.025719 u1DelayCellOfst[12]=2 cells (2 PI)
1351 18:01:13.025813 u1DelayCellOfst[13]=2 cells (2 PI)
1352 18:01:13.025908 u1DelayCellOfst[14]=5 cells (4 PI)
1353 18:01:13.026001 u1DelayCellOfst[15]=7 cells (6 PI)
1354 18:01:13.026092 Byte1, DQ PI dly=978, DQM PI dly= 981
1355 18:01:13.026186 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1356 18:01:13.026280
1357 18:01:13.026372 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1358 18:01:13.026468
1359 18:01:13.026565 Write Rank0 MR14 =0x1e
1360 18:01:13.026656
1361 18:01:13.026750 Final TX Range 0 Vref 30
1362 18:01:13.026844
1363 18:01:13.026937 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1364 18:01:13.027031
1365 18:01:13.027126 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1366 18:01:13.027220 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1367 18:01:13.027319 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1368 18:01:13.027414 Write Rank0 MR3 =0xb0
1369 18:01:13.027506 DramC Write-DBI on
1370 18:01:13.027600 ==
1371 18:01:13.027695 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1372 18:01:13.027787 fsp= 1, odt_onoff= 1, Byte mode= 0
1373 18:01:13.027881 ==
1374 18:01:13.027975 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1375 18:01:13.028066
1376 18:01:13.028160 Begin, DQ Scan Range 701~765
1377 18:01:13.028253
1378 18:01:13.028346
1379 18:01:13.028441 TX Vref Scan disable
1380 18:01:13.028535 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1381 18:01:13.028631 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1382 18:01:13.028727 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1383 18:01:13.028829 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1384 18:01:13.028924 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1385 18:01:13.029021 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1386 18:01:13.029120 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1387 18:01:13.029216 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1388 18:01:13.029312 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1389 18:01:13.029408 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1390 18:01:13.029494 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1391 18:01:13.029555 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1392 18:01:13.029623 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1393 18:01:13.029693 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1394 18:01:13.029788 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1395 18:01:13.029885 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1396 18:01:13.029982 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1397 18:01:13.030076 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1398 18:01:13.030171 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1399 18:01:13.030268 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1400 18:01:13.030364 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1401 18:01:13.030460 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1402 18:01:13.030556 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1403 18:01:13.030650 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1404 18:01:13.030747 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1405 18:01:13.030857 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1406 18:01:13.030963 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1407 18:01:13.031066 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1408 18:01:13.031165 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1409 18:01:13.031260 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1410 18:01:13.031358 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
1411 18:01:13.031454 Byte0, DQ PI dly=733, DQM PI dly= 733
1412 18:01:13.031549 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
1413 18:01:13.031643
1414 18:01:13.031737 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
1415 18:01:13.031834
1416 18:01:13.031928 Byte1, DQ PI dly=724, DQM PI dly= 724
1417 18:01:13.032022 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1418 18:01:13.032115
1419 18:01:13.032209 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1420 18:01:13.032300
1421 18:01:13.032396 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1422 18:01:13.032700 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1423 18:01:13.032821 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1424 18:01:13.032941 wait MRW command Rank0 MR3 =0x30 fired (1)
1425 18:01:13.033058 Write Rank0 MR3 =0x30
1426 18:01:13.033154 DramC Write-DBI off
1427 18:01:13.033245
1428 18:01:13.033339 [DATLAT]
1429 18:01:13.033439 Freq=1600, CH0 RK0, use_rxtx_scan=0
1430 18:01:13.033505
1431 18:01:13.033569 DATLAT Default: 0xf
1432 18:01:13.033631 7, 0xFFFF, sum=0
1433 18:01:13.033693 8, 0xFFFF, sum=0
1434 18:01:13.033754 9, 0xFFFF, sum=0
1435 18:01:13.033812 10, 0xFFFF, sum=0
1436 18:01:13.033908 11, 0xFFFF, sum=0
1437 18:01:13.034003 12, 0xFFFF, sum=0
1438 18:01:13.034096 13, 0xFFFF, sum=0
1439 18:01:13.034192 14, 0x0, sum=1
1440 18:01:13.034288 15, 0x0, sum=2
1441 18:01:13.034385 16, 0x0, sum=3
1442 18:01:13.034484 17, 0x0, sum=4
1443 18:01:13.034580 pattern=2 first_step=14 total pass=5 best_step=16
1444 18:01:13.034671 ==
1445 18:01:13.034767 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1446 18:01:13.034862 fsp= 1, odt_onoff= 1, Byte mode= 0
1447 18:01:13.034953 ==
1448 18:01:13.035049 Start DQ dly to find pass range UseTestEngine =1
1449 18:01:13.035143 x-axis: bit #, y-axis: DQ dly (-127~63)
1450 18:01:13.035247 RX Vref Scan = 1
1451 18:01:13.035346
1452 18:01:13.035439 RX Vref found, early break!
1453 18:01:13.035530
1454 18:01:13.035637 Final RX Vref 11, apply to both rank0 and 1
1455 18:01:13.035732 ==
1456 18:01:13.035828 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1457 18:01:13.035923 fsp= 1, odt_onoff= 1, Byte mode= 0
1458 18:01:13.036016 ==
1459 18:01:13.036111 DQS Delay:
1460 18:01:13.036204 DQS0 = 0, DQS1 = 0
1461 18:01:13.036294 DQM Delay:
1462 18:01:13.036388 DQM0 = 19, DQM1 = 17
1463 18:01:13.036481 DQ Delay:
1464 18:01:13.036542 DQ0 =21, DQ1 =21, DQ2 =23, DQ3 =14
1465 18:01:13.036606 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1466 18:01:13.036700 DQ8 =14, DQ9 =17, DQ10 =23, DQ11 =15
1467 18:01:13.036792 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1468 18:01:13.036883
1469 18:01:13.036976
1470 18:01:13.037069
1471 18:01:13.037161 [DramC_TX_OE_Calibration] TA2
1472 18:01:13.037257 Original DQ_B0 (3 6) =30, OEN = 27
1473 18:01:13.037349 Original DQ_B1 (3 6) =30, OEN = 27
1474 18:01:13.037464 23, 0x0, End_B0=23 End_B1=23
1475 18:01:13.037564 24, 0x0, End_B0=24 End_B1=24
1476 18:01:13.037658 25, 0x0, End_B0=25 End_B1=25
1477 18:01:13.037755 26, 0x0, End_B0=26 End_B1=26
1478 18:01:13.037851 27, 0x0, End_B0=27 End_B1=27
1479 18:01:13.037944 28, 0x0, End_B0=28 End_B1=28
1480 18:01:13.038040 29, 0x0, End_B0=29 End_B1=29
1481 18:01:13.038137 30, 0x0, End_B0=30 End_B1=30
1482 18:01:13.038231 31, 0xFFFF, End_B0=30 End_B1=30
1483 18:01:13.038329 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1484 18:01:13.038424 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1485 18:01:13.038515
1486 18:01:13.038608
1487 18:01:13.038701 Write Rank0 MR23 =0x3f
1488 18:01:13.038792 [DQSOSC]
1489 18:01:13.038888 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1490 18:01:13.038986 CH0_RK0: MR19=0x202, MR18=0xC0C0, DQSOSC=447, MR23=63, INC=12, DEC=18
1491 18:01:13.039078 Write Rank0 MR23 =0x3f
1492 18:01:13.039171 [DQSOSC]
1493 18:01:13.039267 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1494 18:01:13.039360 CH0 RK0: MR19=202, MR18=C0C0
1495 18:01:13.039454 [RankSwap] Rank num 2, (Multi 1), Rank 1
1496 18:01:13.039547 Write Rank0 MR2 =0xad
1497 18:01:13.039638 [Write Leveling]
1498 18:01:13.039731 delay byte0 byte1 byte2 byte3
1499 18:01:13.039824
1500 18:01:13.039916 10 0 0
1501 18:01:13.040012 11 0 0
1502 18:01:13.040107 12 0 0
1503 18:01:13.040200 13 0 0
1504 18:01:13.040295 14 0 0
1505 18:01:13.040391 15 0 0
1506 18:01:13.040485 16 0 0
1507 18:01:13.040574 17 0 0
1508 18:01:13.040638 18 0 0
1509 18:01:13.040698 19 0 0
1510 18:01:13.040756 20 0 0
1511 18:01:13.040817 21 0 0
1512 18:01:13.040913 22 0 0
1513 18:01:13.041008 23 0 0
1514 18:01:13.041101 24 0 ff
1515 18:01:13.041197 25 0 ff
1516 18:01:13.041292 26 ff ff
1517 18:01:13.041385 27 ff ff
1518 18:01:13.041482 28 ff ff
1519 18:01:13.041578 29 ff ff
1520 18:01:13.041670 30 ff ff
1521 18:01:13.041767 31 ff ff
1522 18:01:13.041862 32 ff ff
1523 18:01:13.041955 pass bytecount = 0xff (0xff: all bytes pass)
1524 18:01:13.042049
1525 18:01:13.042143 DQS0 dly: 26
1526 18:01:13.042233 DQS1 dly: 24
1527 18:01:13.042327 Write Rank0 MR2 =0x2d
1528 18:01:13.042421 [RankSwap] Rank num 2, (Multi 1), Rank 0
1529 18:01:13.042511 Write Rank1 MR1 =0xd6
1530 18:01:13.042605 [Gating]
1531 18:01:13.042698 ==
1532 18:01:13.042790 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1533 18:01:13.042886 fsp= 1, odt_onoff= 1, Byte mode= 0
1534 18:01:13.042979 ==
1535 18:01:13.043071 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1536 18:01:13.043169 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1537 18:01:13.043265 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1538 18:01:13.043360 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1539 18:01:13.043458 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1540 18:01:13.043553 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1541 18:01:13.043647 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1542 18:01:13.043744 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1543 18:01:13.043832 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1544 18:01:13.043894 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1545 18:01:13.043953 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1546 18:01:13.044052 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1547 18:01:13.044146 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1548 18:01:13.044242 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1549 18:01:13.044338 [Byte 0] Lead/lag Transition tap number (7)
1550 18:01:13.044431 3 2 20 |201 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1551 18:01:13.044526 3 2 24 |1b1b 2c2c |(11 11)(11 10) |(0 0)(0 0)| 0
1552 18:01:13.044623 3 2 28 |3534 807 |(11 11)(11 11) |(0 0)(0 0)| 0
1553 18:01:13.044717 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1554 18:01:13.044800 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1555 18:01:13.044869 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1556 18:01:13.044938 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1557 18:01:13.045032 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1558 18:01:13.045104 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1559 18:01:13.045168 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1560 18:01:13.045444 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1561 18:01:13.045517 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1562 18:01:13.045579 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1563 18:01:13.045646 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1564 18:01:13.045708 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1565 18:01:13.045771 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1566 18:01:13.045831 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1567 18:01:13.045892 3 4 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1568 18:01:13.045957 3 4 24 |3131 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1569 18:01:13.046021 3 4 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1570 18:01:13.046114 3 5 0 |3d3d 3332 |(11 11)(11 11) |(1 1)(1 1)| 0
1571 18:01:13.046205 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1572 18:01:13.046271 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1573 18:01:13.046365 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1574 18:01:13.046459 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1575 18:01:13.046527 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1576 18:01:13.046591 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 18:01:13.046654 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1578 18:01:13.046714 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 18:01:13.046797 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 18:01:13.046893 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 18:01:13.046987 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 18:01:13.047070 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1583 18:01:13.047150 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1584 18:01:13.047243 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1585 18:01:13.047339 [Byte 0] Lead/lag Transition tap number (2)
1586 18:01:13.047434 3 6 20 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1587 18:01:13.047527 [Byte 1] Lead/lag Transition tap number (3)
1588 18:01:13.047622 3 6 24 |4242 202 |(11 11)(11 11) |(0 0)(0 0)| 0
1589 18:01:13.047720 3 6 28 |4646 c0c |(0 0)(11 11) |(0 0)(0 0)| 0
1590 18:01:13.047813 [Byte 0]First pass (3, 6, 28)
1591 18:01:13.047908 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1592 18:01:13.048004 [Byte 1]First pass (3, 7, 0)
1593 18:01:13.048096 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1594 18:01:13.048194 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1595 18:01:13.048291 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1596 18:01:13.048385 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1597 18:01:13.048482 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1598 18:01:13.048578 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1599 18:01:13.048672 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1600 18:01:13.048773 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1601 18:01:13.048873 All bytes gating window > 1UI, Early break!
1602 18:01:13.048964
1603 18:01:13.049055 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1604 18:01:13.049149
1605 18:01:13.049243 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1606 18:01:13.049333
1607 18:01:13.049432
1608 18:01:13.049527
1609 18:01:13.049618 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1610 18:01:13.049713
1611 18:01:13.049805 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1612 18:01:13.049895
1613 18:01:13.049988
1614 18:01:13.050082 Write Rank1 MR1 =0x56
1615 18:01:13.050173
1616 18:01:13.050266 best RODT dly(2T, 0.5T) = (2, 3)
1617 18:01:13.050359
1618 18:01:13.050450 best RODT dly(2T, 0.5T) = (2, 3)
1619 18:01:13.050544 ==
1620 18:01:13.050639 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1621 18:01:13.050731 fsp= 1, odt_onoff= 1, Byte mode= 0
1622 18:01:13.050825 ==
1623 18:01:13.050919 Start DQ dly to find pass range UseTestEngine =0
1624 18:01:13.051011 x-axis: bit #, y-axis: DQ dly (-127~63)
1625 18:01:13.051105 RX Vref Scan = 0
1626 18:01:13.051198 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1627 18:01:13.051293 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1628 18:01:13.051389 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1629 18:01:13.051485 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1630 18:01:13.051578 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1631 18:01:13.051674 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1632 18:01:13.051770 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1633 18:01:13.051864 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1634 18:01:13.051960 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1635 18:01:13.052056 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1636 18:01:13.052149 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1637 18:01:13.052245 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1638 18:01:13.052333 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1639 18:01:13.052398 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1640 18:01:13.052458 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1641 18:01:13.052522 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1642 18:01:13.052618 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1643 18:01:13.052713 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1644 18:01:13.052809 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1645 18:01:13.052904 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1646 18:01:13.052999 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1647 18:01:13.053094 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1648 18:01:13.053190 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1649 18:01:13.053291 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1650 18:01:13.053404 -2, [0] xxxxxxxx oxxoxxxx [MSB]
1651 18:01:13.053493 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1652 18:01:13.053555 0, [0] xxxoxoxx ooxoooxx [MSB]
1653 18:01:13.053623 1, [0] xxxoxoox ooxoooxx [MSB]
1654 18:01:13.053720 2, [0] xxxoxoox ooxoooxx [MSB]
1655 18:01:13.053820 3, [0] xxxooooo ooxoooox [MSB]
1656 18:01:13.053917 4, [0] ooxooooo ooxooooo [MSB]
1657 18:01:13.054015 5, [0] ooxooooo ooxooooo [MSB]
1658 18:01:13.054109 32, [0] oooxoooo oooooooo [MSB]
1659 18:01:13.054206 33, [0] oooxoooo oooooooo [MSB]
1660 18:01:13.054301 34, [0] oooxoooo xooooooo [MSB]
1661 18:01:13.054395 35, [0] oooxoooo xxoxoooo [MSB]
1662 18:01:13.054491 36, [0] oooxoxxo xxoxxooo [MSB]
1663 18:01:13.054588 37, [0] oooxoxxx xxoxxxxo [MSB]
1664 18:01:13.054682 38, [0] oooxoxxx xxoxxxxo [MSB]
1665 18:01:13.054779 39, [0] ooxxxxxx xxoxxxxx [MSB]
1666 18:01:13.054875 40, [0] xoxxxxxx xxoxxxxx [MSB]
1667 18:01:13.054968 41, [0] xxxxxxxx xxoxxxxx [MSB]
1668 18:01:13.055064 42, [0] xxxxxxxx xxoxxxxx [MSB]
1669 18:01:13.055161 43, [0] xxxxxxxx xxxxxxxx [MSB]
1670 18:01:13.055255 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1671 18:01:13.055350 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1672 18:01:13.055443 iDelay=43, Bit 2, Center 22 (6 ~ 38) 33
1673 18:01:13.055738 iDelay=43, Bit 3, Center 15 (-1 ~ 31) 33
1674 18:01:13.055838 iDelay=43, Bit 4, Center 20 (3 ~ 38) 36
1675 18:01:13.055934 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
1676 18:01:13.056028 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
1677 18:01:13.056119 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1678 18:01:13.056213 iDelay=43, Bit 8, Center 15 (-2 ~ 33) 36
1679 18:01:13.056307 iDelay=43, Bit 9, Center 17 (0 ~ 34) 35
1680 18:01:13.056399 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1681 18:01:13.056496 iDelay=43, Bit 11, Center 16 (-2 ~ 34) 37
1682 18:01:13.056590 iDelay=43, Bit 12, Center 17 (0 ~ 35) 36
1683 18:01:13.056681 iDelay=43, Bit 13, Center 18 (0 ~ 36) 37
1684 18:01:13.056776 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
1685 18:01:13.056869 iDelay=43, Bit 15, Center 21 (4 ~ 38) 35
1686 18:01:13.056960 ==
1687 18:01:13.057063 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1688 18:01:13.057156 fsp= 1, odt_onoff= 1, Byte mode= 0
1689 18:01:13.057247 ==
1690 18:01:13.057343 DQS Delay:
1691 18:01:13.057443 DQS0 = 0, DQS1 = 0
1692 18:01:13.057540 DQM Delay:
1693 18:01:13.057632 DQM0 = 19, DQM1 = 18
1694 18:01:13.057722 DQ Delay:
1695 18:01:13.057817 DQ0 =21, DQ1 =22, DQ2 =22, DQ3 =15
1696 18:01:13.057911 DQ4 =20, DQ5 =17, DQ6 =18, DQ7 =19
1697 18:01:13.058004 DQ8 =15, DQ9 =17, DQ10 =24, DQ11 =16
1698 18:01:13.058098 DQ12 =17, DQ13 =18, DQ14 =19, DQ15 =21
1699 18:01:13.058191
1700 18:01:13.058281
1701 18:01:13.058376 DramC Write-DBI off
1702 18:01:13.058468 ==
1703 18:01:13.058560 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1704 18:01:13.058652 fsp= 1, odt_onoff= 1, Byte mode= 0
1705 18:01:13.058747 ==
1706 18:01:13.058839 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1707 18:01:13.058929
1708 18:01:13.059025 Begin, DQ Scan Range 920~1176
1709 18:01:13.059117
1710 18:01:13.059209
1711 18:01:13.059302 TX Vref Scan disable
1712 18:01:13.059393 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1713 18:01:13.059487 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1714 18:01:13.059586 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1715 18:01:13.059682 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1716 18:01:13.059775 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1717 18:01:13.059874 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1718 18:01:13.059968 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1719 18:01:13.060062 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1720 18:01:13.060161 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1721 18:01:13.060256 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1722 18:01:13.060359 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1723 18:01:13.060457 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1724 18:01:13.060552 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1725 18:01:13.060648 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1726 18:01:13.060753 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1727 18:01:13.060849 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1728 18:01:13.060947 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1729 18:01:13.061043 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1730 18:01:13.061137 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1731 18:01:13.061234 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1732 18:01:13.061331 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1733 18:01:13.061425 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1734 18:01:13.061542 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1735 18:01:13.061636 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1736 18:01:13.061728 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1737 18:01:13.061793 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1738 18:01:13.061860 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1739 18:01:13.061954 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1740 18:01:13.062051 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1741 18:01:13.062148 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1742 18:01:13.062242 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1743 18:01:13.062339 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1744 18:01:13.062436 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1745 18:01:13.062530 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1746 18:01:13.062627 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1747 18:01:13.062729 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1748 18:01:13.062825 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1749 18:01:13.062924 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1750 18:01:13.063019 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1751 18:01:13.063115 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1752 18:01:13.063211 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1753 18:01:13.063306 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1754 18:01:13.063403 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1755 18:01:13.063500 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1756 18:01:13.063594 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1757 18:01:13.063698 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1758 18:01:13.063794 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1759 18:01:13.063890 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1760 18:01:13.063987 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1761 18:01:13.064082 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1762 18:01:13.064179 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1763 18:01:13.064275 971 |3 6 11|[0] xxxxxxxx oxxoxxxx [MSB]
1764 18:01:13.064369 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1765 18:01:13.064467 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1766 18:01:13.064544 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1767 18:01:13.064628 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1768 18:01:13.064725 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1769 18:01:13.064826 977 |3 6 17|[0] ooxooooo oooooooo [MSB]
1770 18:01:13.064935 990 |3 6 30|[0] oooooooo xooxoooo [MSB]
1771 18:01:13.065034 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1772 18:01:13.065131 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1773 18:01:13.065227 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1774 18:01:13.065324 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1775 18:01:13.065421 995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1776 18:01:13.065525 Byte0, DQ PI dly=984, DQM PI dly= 984
1777 18:01:13.065615 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1778 18:01:13.065680
1779 18:01:13.065746 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1780 18:01:13.065837
1781 18:01:13.065932 Byte1, DQ PI dly=981, DQM PI dly= 981
1782 18:01:13.066026 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1783 18:01:13.066117
1784 18:01:13.066211 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1785 18:01:13.066306
1786 18:01:13.066396 ==
1787 18:01:13.066492 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1788 18:01:13.066586 fsp= 1, odt_onoff= 1, Byte mode= 0
1789 18:01:13.066877 ==
1790 18:01:13.066977 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1791 18:01:13.067072
1792 18:01:13.067166 Begin, DQ Scan Range 957~1021
1793 18:01:13.067263 Write Rank1 MR14 =0x0
1794 18:01:13.067358
1795 18:01:13.067453 CH=0, VrefRange= 0, VrefLevel = 0
1796 18:01:13.067545 TX Bit0 (979~991) 13 985, Bit8 (971~984) 14 977,
1797 18:01:13.067643 TX Bit1 (978~991) 14 984, Bit9 (975~984) 10 979,
1798 18:01:13.067738 TX Bit2 (979~991) 13 985, Bit10 (977~991) 15 984,
1799 18:01:13.067830 TX Bit3 (973~986) 14 979, Bit11 (973~983) 11 978,
1800 18:01:13.067926 TX Bit4 (978~991) 14 984, Bit12 (975~984) 10 979,
1801 18:01:13.068021 TX Bit5 (977~986) 10 981, Bit13 (975~986) 12 980,
1802 18:01:13.068114 TX Bit6 (977~990) 14 983, Bit14 (974~990) 17 982,
1803 18:01:13.068210 TX Bit7 (978~991) 14 984, Bit15 (977~991) 15 984,
1804 18:01:13.068301
1805 18:01:13.068393 Write Rank1 MR14 =0x2
1806 18:01:13.068475
1807 18:01:13.068538 CH=0, VrefRange= 0, VrefLevel = 2
1808 18:01:13.068597 TX Bit0 (978~992) 15 985, Bit8 (971~984) 14 977,
1809 18:01:13.068656 TX Bit1 (978~992) 15 985, Bit9 (974~984) 11 979,
1810 18:01:13.068715 TX Bit2 (979~991) 13 985, Bit10 (977~992) 16 984,
1811 18:01:13.068773 TX Bit3 (973~987) 15 980, Bit11 (973~983) 11 978,
1812 18:01:13.068865 TX Bit4 (978~991) 14 984, Bit12 (975~984) 10 979,
1813 18:01:13.068957 TX Bit5 (976~987) 12 981, Bit13 (974~987) 14 980,
1814 18:01:13.069049 TX Bit6 (976~991) 16 983, Bit14 (974~991) 18 982,
1815 18:01:13.069141 TX Bit7 (978~992) 15 985, Bit15 (977~991) 15 984,
1816 18:01:13.069232
1817 18:01:13.069322 Write Rank1 MR14 =0x4
1818 18:01:13.069412
1819 18:01:13.069488 CH=0, VrefRange= 0, VrefLevel = 4
1820 18:01:13.069548 TX Bit0 (978~992) 15 985, Bit8 (970~985) 16 977,
1821 18:01:13.069608 TX Bit1 (978~993) 16 985, Bit9 (974~985) 12 979,
1822 18:01:13.069676 TX Bit2 (978~992) 15 985, Bit10 (977~992) 16 984,
1823 18:01:13.069769 TX Bit3 (972~988) 17 980, Bit11 (973~984) 12 978,
1824 18:01:13.069861 TX Bit4 (978~992) 15 985, Bit12 (975~986) 12 980,
1825 18:01:13.069956 TX Bit5 (976~988) 13 982, Bit13 (974~987) 14 980,
1826 18:01:13.070052 TX Bit6 (976~991) 16 983, Bit14 (974~991) 18 982,
1827 18:01:13.070144 TX Bit7 (978~992) 15 985, Bit15 (977~992) 16 984,
1828 18:01:13.070241
1829 18:01:13.070331 Write Rank1 MR14 =0x6
1830 18:01:13.070421
1831 18:01:13.070516 CH=0, VrefRange= 0, VrefLevel = 6
1832 18:01:13.070616 TX Bit0 (978~992) 15 985, Bit8 (970~986) 17 978,
1833 18:01:13.070710 TX Bit1 (978~993) 16 985, Bit9 (974~986) 13 980,
1834 18:01:13.070808 TX Bit2 (978~992) 15 985, Bit10 (977~993) 17 985,
1835 18:01:13.070901 TX Bit3 (972~989) 18 980, Bit11 (972~984) 13 978,
1836 18:01:13.070995 TX Bit4 (978~992) 15 985, Bit12 (975~986) 12 980,
1837 18:01:13.071090 TX Bit5 (976~990) 15 983, Bit13 (973~989) 17 981,
1838 18:01:13.071184 TX Bit6 (976~991) 16 983, Bit14 (973~991) 19 982,
1839 18:01:13.071279 TX Bit7 (978~993) 16 985, Bit15 (976~992) 17 984,
1840 18:01:13.071372
1841 18:01:13.071463 Write Rank1 MR14 =0x8
1842 18:01:13.071555
1843 18:01:13.071648 CH=0, VrefRange= 0, VrefLevel = 8
1844 18:01:13.071742 TX Bit0 (978~993) 16 985, Bit8 (970~987) 18 978,
1845 18:01:13.071836 TX Bit1 (978~993) 16 985, Bit9 (973~988) 16 980,
1846 18:01:13.071930 TX Bit2 (979~992) 14 985, Bit10 (976~994) 19 985,
1847 18:01:13.072022 TX Bit3 (971~990) 20 980, Bit11 (972~985) 14 978,
1848 18:01:13.072118 TX Bit4 (977~993) 17 985, Bit12 (974~988) 15 981,
1849 18:01:13.072213 TX Bit5 (976~991) 16 983, Bit13 (973~989) 17 981,
1850 18:01:13.072306 TX Bit6 (976~992) 17 984, Bit14 (973~992) 20 982,
1851 18:01:13.072402 TX Bit7 (978~993) 16 985, Bit15 (976~992) 17 984,
1852 18:01:13.072495
1853 18:01:13.072585 Write Rank1 MR14 =0xa
1854 18:01:13.072666
1855 18:01:13.072729 CH=0, VrefRange= 0, VrefLevel = 10
1856 18:01:13.072795 TX Bit0 (978~994) 17 986, Bit8 (969~987) 19 978,
1857 18:01:13.072888 TX Bit1 (977~994) 18 985, Bit9 (973~989) 17 981,
1858 18:01:13.072985 TX Bit2 (978~993) 16 985, Bit10 (976~994) 19 985,
1859 18:01:13.073078 TX Bit3 (971~990) 20 980, Bit11 (971~986) 16 978,
1860 18:01:13.073171 TX Bit4 (977~993) 17 985, Bit12 (974~989) 16 981,
1861 18:01:13.073266 TX Bit5 (975~991) 17 983, Bit13 (973~990) 18 981,
1862 18:01:13.073360 TX Bit6 (975~992) 18 983, Bit14 (973~992) 20 982,
1863 18:01:13.073459 TX Bit7 (977~994) 18 985, Bit15 (976~993) 18 984,
1864 18:01:13.073525
1865 18:01:13.073584 Write Rank1 MR14 =0xc
1866 18:01:13.073643
1867 18:01:13.073700 CH=0, VrefRange= 0, VrefLevel = 12
1868 18:01:13.073766 TX Bit0 (978~994) 17 986, Bit8 (969~989) 21 979,
1869 18:01:13.073838 TX Bit1 (977~994) 18 985, Bit9 (972~989) 18 980,
1870 18:01:13.073924 TX Bit2 (978~994) 17 986, Bit10 (976~994) 19 985,
1871 18:01:13.074015 TX Bit3 (971~991) 21 981, Bit11 (971~987) 17 979,
1872 18:01:13.074096 TX Bit4 (977~994) 18 985, Bit12 (973~989) 17 981,
1873 18:01:13.074188 TX Bit5 (975~991) 17 983, Bit13 (973~990) 18 981,
1874 18:01:13.074285 TX Bit6 (975~992) 18 983, Bit14 (973~993) 21 983,
1875 18:01:13.074380 TX Bit7 (977~994) 18 985, Bit15 (976~994) 19 985,
1876 18:01:13.074470
1877 18:01:13.074565 Write Rank1 MR14 =0xe
1878 18:01:13.074656
1879 18:01:13.074747 CH=0, VrefRange= 0, VrefLevel = 14
1880 18:01:13.074850 TX Bit0 (977~995) 19 986, Bit8 (969~989) 21 979,
1881 18:01:13.074946 TX Bit1 (977~995) 19 986, Bit9 (972~990) 19 981,
1882 18:01:13.075039 TX Bit2 (978~994) 17 986, Bit10 (976~996) 21 986,
1883 18:01:13.075135 TX Bit3 (970~991) 22 980, Bit11 (970~987) 18 978,
1884 18:01:13.075227 TX Bit4 (977~994) 18 985, Bit12 (972~990) 19 981,
1885 18:01:13.075321 TX Bit5 (975~992) 18 983, Bit13 (972~991) 20 981,
1886 18:01:13.075416 TX Bit6 (975~993) 19 984, Bit14 (972~993) 22 982,
1887 18:01:13.075510 TX Bit7 (977~995) 19 986, Bit15 (975~995) 21 985,
1888 18:01:13.075604
1889 18:01:13.075696 Write Rank1 MR14 =0x10
1890 18:01:13.075786
1891 18:01:13.075881 CH=0, VrefRange= 0, VrefLevel = 16
1892 18:01:13.075974 TX Bit0 (977~996) 20 986, Bit8 (968~990) 23 979,
1893 18:01:13.076267 TX Bit1 (977~996) 20 986, Bit9 (971~990) 20 980,
1894 18:01:13.076367 TX Bit2 (978~995) 18 986, Bit10 (976~997) 22 986,
1895 18:01:13.076463 TX Bit3 (970~991) 22 980, Bit11 (970~989) 20 979,
1896 18:01:13.076556 TX Bit4 (976~995) 20 985, Bit12 (972~990) 19 981,
1897 18:01:13.076652 TX Bit5 (974~992) 19 983, Bit13 (972~991) 20 981,
1898 18:01:13.076746 TX Bit6 (974~993) 20 983, Bit14 (972~993) 22 982,
1899 18:01:13.076837 TX Bit7 (977~996) 20 986, Bit15 (976~995) 20 985,
1900 18:01:13.076931
1901 18:01:13.077030 Write Rank1 MR14 =0x12
1902 18:01:13.077122
1903 18:01:13.077217 CH=0, VrefRange= 0, VrefLevel = 18
1904 18:01:13.077310 TX Bit0 (977~997) 21 987, Bit8 (969~990) 22 979,
1905 18:01:13.558017 TX Bit1 (977~997) 21 987, Bit9 (971~990) 20 980,
1906 18:01:13.558166 TX Bit2 (977~995) 19 986, Bit10 (975~997) 23 986,
1907 18:01:13.558242 TX Bit3 (970~991) 22 980, Bit11 (969~989) 21 979,
1908 18:01:13.558310 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
1909 18:01:13.558374 TX Bit5 (974~992) 19 983, Bit13 (971~991) 21 981,
1910 18:01:13.558437 TX Bit6 (974~994) 21 984, Bit14 (971~994) 24 982,
1911 18:01:13.558499 TX Bit7 (977~996) 20 986, Bit15 (975~996) 22 985,
1912 18:01:13.558558
1913 18:01:13.558619 Write Rank1 MR14 =0x14
1914 18:01:13.558679
1915 18:01:13.558739 CH=0, VrefRange= 0, VrefLevel = 20
1916 18:01:13.558799 TX Bit0 (977~997) 21 987, Bit8 (968~990) 23 979,
1917 18:01:13.558859 TX Bit1 (976~997) 22 986, Bit9 (971~991) 21 981,
1918 18:01:13.558918 TX Bit2 (977~996) 20 986, Bit10 (975~997) 23 986,
1919 18:01:13.558977 TX Bit3 (969~992) 24 980, Bit11 (969~990) 22 979,
1920 18:01:13.559036 TX Bit4 (976~996) 21 986, Bit12 (971~991) 21 981,
1921 18:01:13.559095 TX Bit5 (973~993) 21 983, Bit13 (970~992) 23 981,
1922 18:01:13.559154 TX Bit6 (974~994) 21 984, Bit14 (971~995) 25 983,
1923 18:01:13.559212 TX Bit7 (976~997) 22 986, Bit15 (975~997) 23 986,
1924 18:01:13.559271
1925 18:01:13.559328 Write Rank1 MR14 =0x16
1926 18:01:13.559386
1927 18:01:13.559444 CH=0, VrefRange= 0, VrefLevel = 22
1928 18:01:13.559502 TX Bit0 (977~998) 22 987, Bit8 (968~991) 24 979,
1929 18:01:13.559561 TX Bit1 (976~998) 23 987, Bit9 (970~991) 22 980,
1930 18:01:13.559619 TX Bit2 (977~997) 21 987, Bit10 (975~998) 24 986,
1931 18:01:13.559678 TX Bit3 (969~992) 24 980, Bit11 (969~990) 22 979,
1932 18:01:13.559736 TX Bit4 (976~997) 22 986, Bit12 (970~991) 22 980,
1933 18:01:13.559832 TX Bit5 (973~993) 21 983, Bit13 (970~992) 23 981,
1934 18:01:13.559926 TX Bit6 (974~995) 22 984, Bit14 (971~995) 25 983,
1935 18:01:13.560020 TX Bit7 (976~998) 23 987, Bit15 (975~997) 23 986,
1936 18:01:13.560115
1937 18:01:13.560180 Write Rank1 MR14 =0x18
1938 18:01:13.560241
1939 18:01:13.560301 CH=0, VrefRange= 0, VrefLevel = 24
1940 18:01:13.560377 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
1941 18:01:13.560441 TX Bit1 (976~998) 23 987, Bit9 (970~991) 22 980,
1942 18:01:13.560506 TX Bit2 (977~997) 21 987, Bit10 (975~998) 24 986,
1943 18:01:13.560569 TX Bit3 (969~992) 24 980, Bit11 (969~991) 23 980,
1944 18:01:13.560633 TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980,
1945 18:01:13.560696 TX Bit5 (972~994) 23 983, Bit13 (970~993) 24 981,
1946 18:01:13.560759 TX Bit6 (973~996) 24 984, Bit14 (970~996) 27 983,
1947 18:01:13.560821 TX Bit7 (976~998) 23 987, Bit15 (975~998) 24 986,
1948 18:01:13.560884
1949 18:01:13.560946 Write Rank1 MR14 =0x1a
1950 18:01:13.561008
1951 18:01:13.561071 CH=0, VrefRange= 0, VrefLevel = 26
1952 18:01:13.561153 TX Bit0 (976~999) 24 987, Bit8 (968~991) 24 979,
1953 18:01:13.561256 TX Bit1 (976~999) 24 987, Bit9 (970~992) 23 981,
1954 18:01:13.561357 TX Bit2 (977~998) 22 987, Bit10 (975~998) 24 986,
1955 18:01:13.561461 TX Bit3 (969~993) 25 981, Bit11 (968~991) 24 979,
1956 18:01:13.561529 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
1957 18:01:13.561593 TX Bit5 (972~994) 23 983, Bit13 (969~993) 25 981,
1958 18:01:13.561657 TX Bit6 (973~996) 24 984, Bit14 (970~996) 27 983,
1959 18:01:13.561720 TX Bit7 (976~998) 23 987, Bit15 (974~998) 25 986,
1960 18:01:13.561783
1961 18:01:13.561846 Write Rank1 MR14 =0x1c
1962 18:01:13.561910
1963 18:01:13.561972 CH=0, VrefRange= 0, VrefLevel = 28
1964 18:01:13.562035 TX Bit0 (976~999) 24 987, Bit8 (967~992) 26 979,
1965 18:01:13.562099 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
1966 18:01:13.562161 TX Bit2 (976~999) 24 987, Bit10 (974~999) 26 986,
1967 18:01:13.562224 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
1968 18:01:13.562287 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
1969 18:01:13.562351 TX Bit5 (971~994) 24 982, Bit13 (969~993) 25 981,
1970 18:01:13.562413 TX Bit6 (973~997) 25 985, Bit14 (970~996) 27 983,
1971 18:01:13.562476 TX Bit7 (975~999) 25 987, Bit15 (974~998) 25 986,
1972 18:01:13.562539
1973 18:01:13.562601 Write Rank1 MR14 =0x1e
1974 18:01:13.562664
1975 18:01:13.562726 CH=0, VrefRange= 0, VrefLevel = 30
1976 18:01:13.562788 TX Bit0 (976~999) 24 987, Bit8 (967~992) 26 979,
1977 18:01:13.562852 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
1978 18:01:13.562915 TX Bit2 (976~999) 24 987, Bit10 (974~999) 26 986,
1979 18:01:13.562978 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
1980 18:01:13.563046 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
1981 18:01:13.563153 TX Bit5 (971~994) 24 982, Bit13 (969~993) 25 981,
1982 18:01:13.563266 TX Bit6 (973~997) 25 985, Bit14 (970~996) 27 983,
1983 18:01:13.563372 TX Bit7 (975~999) 25 987, Bit15 (974~998) 25 986,
1984 18:01:13.563471
1985 18:01:13.563564 Write Rank1 MR14 =0x20
1986 18:01:13.563634
1987 18:01:13.563700 CH=0, VrefRange= 0, VrefLevel = 32
1988 18:01:13.563764 TX Bit0 (976~999) 24 987, Bit8 (967~992) 26 979,
1989 18:01:13.563829 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
1990 18:01:13.563894 TX Bit2 (976~999) 24 987, Bit10 (974~999) 26 986,
1991 18:01:13.563959 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
1992 18:01:13.564231 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
1993 18:01:13.564303 TX Bit5 (971~994) 24 982, Bit13 (969~993) 25 981,
1994 18:01:13.564368 TX Bit6 (973~997) 25 985, Bit14 (970~996) 27 983,
1995 18:01:13.564453 TX Bit7 (975~999) 25 987, Bit15 (974~998) 25 986,
1996 18:01:13.564520
1997 18:01:13.564583 Write Rank1 MR14 =0x22
1998 18:01:13.564646
1999 18:01:13.564708 CH=0, VrefRange= 0, VrefLevel = 34
2000 18:01:13.564772 TX Bit0 (976~999) 24 987, Bit8 (967~992) 26 979,
2001 18:01:13.564836 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2002 18:01:13.564900 TX Bit2 (976~999) 24 987, Bit10 (974~999) 26 986,
2003 18:01:13.564963 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2004 18:01:13.565026 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2005 18:01:13.565090 TX Bit5 (971~994) 24 982, Bit13 (969~993) 25 981,
2006 18:01:13.565153 TX Bit6 (973~997) 25 985, Bit14 (970~996) 27 983,
2007 18:01:13.565216 TX Bit7 (975~999) 25 987, Bit15 (974~998) 25 986,
2008 18:01:13.565278
2009 18:01:13.565340 Write Rank1 MR14 =0x24
2010 18:01:13.565402
2011 18:01:13.565476 CH=0, VrefRange= 0, VrefLevel = 36
2012 18:01:13.565540 TX Bit0 (976~999) 24 987, Bit8 (967~992) 26 979,
2013 18:01:13.565603 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2014 18:01:13.565666 TX Bit2 (976~999) 24 987, Bit10 (974~999) 26 986,
2015 18:01:13.565729 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2016 18:01:13.565792 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2017 18:01:13.565855 TX Bit5 (971~994) 24 982, Bit13 (969~993) 25 981,
2018 18:01:13.565918 TX Bit6 (973~997) 25 985, Bit14 (970~996) 27 983,
2019 18:01:13.565980 TX Bit7 (975~999) 25 987, Bit15 (974~998) 25 986,
2020 18:01:13.566043
2021 18:01:13.566105
2022 18:01:13.566166 TX Vref found, early break! 371< 379
2023 18:01:13.566229 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2024 18:01:13.566292 u1DelayCellOfst[0]=7 cells (6 PI)
2025 18:01:13.566355 u1DelayCellOfst[1]=7 cells (6 PI)
2026 18:01:13.566418 u1DelayCellOfst[2]=7 cells (6 PI)
2027 18:01:13.566480 u1DelayCellOfst[3]=0 cells (0 PI)
2028 18:01:13.566579 u1DelayCellOfst[4]=6 cells (5 PI)
2029 18:01:13.566687 u1DelayCellOfst[5]=1 cells (1 PI)
2030 18:01:13.566789 u1DelayCellOfst[6]=5 cells (4 PI)
2031 18:01:13.566892 u1DelayCellOfst[7]=7 cells (6 PI)
2032 18:01:13.566994 Byte0, DQ PI dly=981, DQM PI dly= 984
2033 18:01:13.567066 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2034 18:01:13.567134
2035 18:01:13.567198 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2036 18:01:13.567263
2037 18:01:13.567326 u1DelayCellOfst[8]=0 cells (0 PI)
2038 18:01:13.567389 u1DelayCellOfst[9]=1 cells (1 PI)
2039 18:01:13.567453 u1DelayCellOfst[10]=9 cells (7 PI)
2040 18:01:13.567515 u1DelayCellOfst[11]=1 cells (1 PI)
2041 18:01:13.567579 u1DelayCellOfst[12]=2 cells (2 PI)
2042 18:01:13.567642 u1DelayCellOfst[13]=2 cells (2 PI)
2043 18:01:13.567705 u1DelayCellOfst[14]=5 cells (4 PI)
2044 18:01:13.567791 u1DelayCellOfst[15]=9 cells (7 PI)
2045 18:01:13.567857 Byte1, DQ PI dly=979, DQM PI dly= 982
2046 18:01:13.567920 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2047 18:01:13.567984
2048 18:01:13.568047 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2049 18:01:13.568110
2050 18:01:13.568172 Write Rank1 MR14 =0x1c
2051 18:01:13.568235
2052 18:01:13.568298 Final TX Range 0 Vref 28
2053 18:01:13.568360
2054 18:01:13.568423 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2055 18:01:13.568486
2056 18:01:13.568549 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2057 18:01:13.568612 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2058 18:01:13.568677 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2059 18:01:13.568740 Write Rank1 MR3 =0xb0
2060 18:01:13.568804 DramC Write-DBI on
2061 18:01:13.568867 ==
2062 18:01:13.568930 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2063 18:01:13.568993 fsp= 1, odt_onoff= 1, Byte mode= 0
2064 18:01:13.569057 ==
2065 18:01:13.569120 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2066 18:01:13.569184
2067 18:01:13.569246 Begin, DQ Scan Range 702~766
2068 18:01:13.569308
2069 18:01:13.569371
2070 18:01:13.569450 TX Vref Scan disable
2071 18:01:13.569517 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2072 18:01:13.569582 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2073 18:01:13.569647 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2074 18:01:13.569713 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2075 18:01:13.569778 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2076 18:01:13.569866 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2077 18:01:13.569975 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2078 18:01:13.570082 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2079 18:01:13.570189 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2080 18:01:13.570297 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2081 18:01:13.570373 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2082 18:01:13.570441 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2083 18:01:13.570508 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2084 18:01:13.570575 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2085 18:01:13.570640 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2086 18:01:13.570705 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2087 18:01:13.570771 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2088 18:01:13.570835 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2089 18:01:13.570899 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2090 18:01:13.570963 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2091 18:01:13.571028 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2092 18:01:13.571113 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2093 18:01:13.571181 Byte0, DQ PI dly=730, DQM PI dly= 730
2094 18:01:13.571245 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2095 18:01:13.571309
2096 18:01:13.571372 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2097 18:01:13.571436
2098 18:01:13.571499 Byte1, DQ PI dly=725, DQM PI dly= 725
2099 18:01:13.571562 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2100 18:01:13.571626
2101 18:01:13.571688 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2102 18:01:13.571751
2103 18:01:13.571813 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2104 18:01:13.571877 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2105 18:01:13.572141 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2106 18:01:13.572212 Write Rank1 MR3 =0x30
2107 18:01:13.572277 DramC Write-DBI off
2108 18:01:13.572340
2109 18:01:13.572406 [DATLAT]
2110 18:01:13.572469 Freq=1600, CH0 RK1, use_rxtx_scan=0
2111 18:01:13.572533
2112 18:01:13.572596 DATLAT Default: 0x10
2113 18:01:13.572659 7, 0xFFFF, sum=0
2114 18:01:13.572724 8, 0xFFFF, sum=0
2115 18:01:13.572788 9, 0xFFFF, sum=0
2116 18:01:13.572852 10, 0xFFFF, sum=0
2117 18:01:13.572916 11, 0xFFFF, sum=0
2118 18:01:13.572980 12, 0xFFFF, sum=0
2119 18:01:13.573057 13, 0xFFFF, sum=0
2120 18:01:13.573163 14, 0x0, sum=1
2121 18:01:13.573268 15, 0x0, sum=2
2122 18:01:13.573372 16, 0x0, sum=3
2123 18:01:13.573480 17, 0x0, sum=4
2124 18:01:13.573551 pattern=2 first_step=14 total pass=5 best_step=16
2125 18:01:13.573618 ==
2126 18:01:13.573683 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2127 18:01:13.573750 fsp= 1, odt_onoff= 1, Byte mode= 0
2128 18:01:13.573814 ==
2129 18:01:13.573878 Start DQ dly to find pass range UseTestEngine =1
2130 18:01:13.573942 x-axis: bit #, y-axis: DQ dly (-127~63)
2131 18:01:13.574007 RX Vref Scan = 0
2132 18:01:13.574070 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2133 18:01:13.574136 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2134 18:01:13.574200 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2135 18:01:13.574263 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2136 18:01:13.574327 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2137 18:01:13.574391 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2138 18:01:13.574480 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2139 18:01:13.574546 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2140 18:01:13.574612 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2141 18:01:13.574677 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2142 18:01:13.574741 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2143 18:01:13.574806 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2144 18:01:13.574871 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2145 18:01:13.574935 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2146 18:01:13.575000 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2147 18:01:13.575065 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2148 18:01:13.575130 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2149 18:01:13.575194 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2150 18:01:13.575259 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2151 18:01:13.575324 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2152 18:01:13.575388 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2153 18:01:13.575452 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2154 18:01:13.575516 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2155 18:01:13.575582 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2156 18:01:13.575645 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2157 18:01:13.575709 -1, [0] xxxoxxxx ooxoxoxx [MSB]
2158 18:01:13.575773 0, [0] xxxoxoxx ooxoooxx [MSB]
2159 18:01:13.575837 1, [0] xxxoxoox ooxoooxx [MSB]
2160 18:01:13.575901 2, [0] xxxoxoox ooxoooxx [MSB]
2161 18:01:13.575966 3, [0] xxxoxooo ooxoooox [MSB]
2162 18:01:13.576031 4, [0] oxxoxooo ooxoooox [MSB]
2163 18:01:13.576095 5, [0] ooxooooo ooxooooo [MSB]
2164 18:01:13.576160 32, [0] oooxoooo oooooooo [MSB]
2165 18:01:13.576225 33, [0] oooxoooo xooooooo [MSB]
2166 18:01:13.576289 34, [0] oooxoooo xooxoooo [MSB]
2167 18:01:13.576353 35, [0] oooxoxoo xxoxxxoo [MSB]
2168 18:01:13.576417 36, [0] oooxoxxo xxoxxxoo [MSB]
2169 18:01:13.576482 37, [0] oooxoxxx xxoxxxxo [MSB]
2170 18:01:13.576554 38, [0] oooxoxxx xxoxxxxx [MSB]
2171 18:01:13.576665 39, [0] oooxoxxx xxoxxxxx [MSB]
2172 18:01:13.576776 40, [0] xxxxxxxx xxoxxxxx [MSB]
2173 18:01:13.576883 41, [0] xxxxxxxx xxxxxxxx [MSB]
2174 18:01:13.576986 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2175 18:01:13.577065 iDelay=41, Bit 1, Center 22 (5 ~ 39) 35
2176 18:01:13.577134 iDelay=41, Bit 2, Center 22 (6 ~ 39) 34
2177 18:01:13.577200 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2178 18:01:13.577266 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
2179 18:01:13.577330 iDelay=41, Bit 5, Center 17 (0 ~ 34) 35
2180 18:01:13.577394 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2181 18:01:13.577470 iDelay=41, Bit 7, Center 19 (3 ~ 36) 34
2182 18:01:13.577535 iDelay=41, Bit 8, Center 14 (-3 ~ 32) 36
2183 18:01:13.577598 iDelay=41, Bit 9, Center 16 (-1 ~ 34) 36
2184 18:01:13.577662 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
2185 18:01:13.577725 iDelay=41, Bit 11, Center 15 (-2 ~ 33) 36
2186 18:01:13.577806 iDelay=41, Bit 12, Center 17 (0 ~ 34) 35
2187 18:01:13.577874 iDelay=41, Bit 13, Center 16 (-1 ~ 34) 36
2188 18:01:13.577937 iDelay=41, Bit 14, Center 19 (3 ~ 36) 34
2189 18:01:13.578000 iDelay=41, Bit 15, Center 21 (5 ~ 37) 33
2190 18:01:13.578063 ==
2191 18:01:13.578126 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2192 18:01:13.578194 fsp= 1, odt_onoff= 1, Byte mode= 0
2193 18:01:13.578258 ==
2194 18:01:13.578322 DQS Delay:
2195 18:01:13.578384 DQS0 = 0, DQS1 = 0
2196 18:01:13.578448 DQM Delay:
2197 18:01:13.578511 DQM0 = 19, DQM1 = 17
2198 18:01:13.578575 DQ Delay:
2199 18:01:13.578639 DQ0 =21, DQ1 =22, DQ2 =22, DQ3 =14
2200 18:01:13.578703 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2201 18:01:13.578766 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2202 18:01:13.578829 DQ12 =17, DQ13 =16, DQ14 =19, DQ15 =21
2203 18:01:13.578892
2204 18:01:13.578955
2205 18:01:13.579018
2206 18:01:13.579080 [DramC_TX_OE_Calibration] TA2
2207 18:01:13.579144 Original DQ_B0 (3 6) =30, OEN = 27
2208 18:01:13.579207 Original DQ_B1 (3 6) =30, OEN = 27
2209 18:01:13.579270 23, 0x0, End_B0=23 End_B1=23
2210 18:01:13.579335 24, 0x0, End_B0=24 End_B1=24
2211 18:01:13.579399 25, 0x0, End_B0=25 End_B1=25
2212 18:01:13.579463 26, 0x0, End_B0=26 End_B1=26
2213 18:01:13.579568 27, 0x0, End_B0=27 End_B1=27
2214 18:01:13.579676 28, 0x0, End_B0=28 End_B1=28
2215 18:01:13.579776 29, 0x0, End_B0=29 End_B1=29
2216 18:01:13.579871 30, 0x0, End_B0=30 End_B1=30
2217 18:01:13.579942 31, 0xFFFF, End_B0=30 End_B1=30
2218 18:01:13.580010 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2219 18:01:13.580076 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2220 18:01:13.580141
2221 18:01:13.580206
2222 18:01:13.580269 Write Rank1 MR23 =0x3f
2223 18:01:13.580333 [DQSOSC]
2224 18:01:13.580397 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4a4, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2225 18:01:13.580463 CH0_RK1: MR19=0x202, MR18=0xA4A4, DQSOSC=465, MR23=63, INC=11, DEC=17
2226 18:01:13.580528 Write Rank1 MR23 =0x3f
2227 18:01:13.580591 [DQSOSC]
2228 18:01:13.580655 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4a4, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2229 18:01:13.580719 CH0 RK1: MR19=202, MR18=A4A4
2230 18:01:13.580784 [RxdqsGatingPostProcess] freq 1600
2231 18:01:13.580848 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2232 18:01:13.580911 Rank: 0
2233 18:01:13.580973 best DQS0 dly(2T, 0.5T) = (2, 6)
2234 18:01:13.581037 best DQS1 dly(2T, 0.5T) = (2, 6)
2235 18:01:13.581104 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2236 18:01:13.581380 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2237 18:01:13.581461 Rank: 1
2238 18:01:13.581527 best DQS0 dly(2T, 0.5T) = (2, 6)
2239 18:01:13.581591 best DQS1 dly(2T, 0.5T) = (2, 6)
2240 18:01:13.581654 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2241 18:01:13.581718 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2242 18:01:13.581781 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2243 18:01:13.581845 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2244 18:01:13.584118 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2245 18:01:13.584203 Write Rank0 MR13 =0x59
2246 18:01:13.587834 ==
2247 18:01:13.590724 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2248 18:01:13.594319 fsp= 1, odt_onoff= 1, Byte mode= 0
2249 18:01:13.594419 ==
2250 18:01:13.597669 === u2Vref_new: 0x56 --> 0x3a
2251 18:01:13.600793 === u2Vref_new: 0x58 --> 0x58
2252 18:01:13.603898 === u2Vref_new: 0x5a --> 0x5a
2253 18:01:13.607206 === u2Vref_new: 0x5c --> 0x78
2254 18:01:13.610648 === u2Vref_new: 0x5e --> 0x7a
2255 18:01:13.613704 === u2Vref_new: 0x60 --> 0x90
2256 18:01:13.617023 [CA 0] Center 37 (12~63) winsize 52
2257 18:01:13.620386 [CA 1] Center 37 (11~63) winsize 53
2258 18:01:13.623643 [CA 2] Center 34 (6~63) winsize 58
2259 18:01:13.626843 [CA 3] Center 34 (6~63) winsize 58
2260 18:01:13.629994 [CA 4] Center 34 (6~63) winsize 58
2261 18:01:13.633576 [CA 5] Center 28 (-1~58) winsize 60
2262 18:01:13.633665
2263 18:01:13.636576 [CATrainingPosCal] consider 1 rank data
2264 18:01:13.639939 u2DelayCellTimex100 = 744/100 ps
2265 18:01:13.643026 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2266 18:01:13.646703 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2267 18:01:13.649557 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2268 18:01:13.653068 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2269 18:01:13.656408 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2270 18:01:13.659693 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2271 18:01:13.659783
2272 18:01:13.666100 CA PerBit enable=1, Macro0, CA PI delay=28
2273 18:01:13.666220 === u2Vref_new: 0x60 --> 0x90
2274 18:01:13.666326
2275 18:01:13.669414 Vref(ca) range 1: 32
2276 18:01:13.669559
2277 18:01:13.672864 CS Dly= 12 (43-0-32)
2278 18:01:13.672977 Write Rank0 MR13 =0xd8
2279 18:01:13.675891 Write Rank0 MR13 =0xd8
2280 18:01:13.679384 Write Rank0 MR12 =0x60
2281 18:01:13.679505 Write Rank1 MR13 =0x59
2282 18:01:13.679591 ==
2283 18:01:13.685660 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2284 18:01:13.689011 fsp= 1, odt_onoff= 1, Byte mode= 0
2285 18:01:13.689135 ==
2286 18:01:13.692218 === u2Vref_new: 0x56 --> 0x3a
2287 18:01:13.695689 === u2Vref_new: 0x58 --> 0x58
2288 18:01:13.698744 === u2Vref_new: 0x5a --> 0x5a
2289 18:01:13.698836 === u2Vref_new: 0x5c --> 0x78
2290 18:01:13.702424 === u2Vref_new: 0x5e --> 0x7a
2291 18:01:13.705509 === u2Vref_new: 0x60 --> 0x90
2292 18:01:13.708791 [CA 0] Center 37 (11~63) winsize 53
2293 18:01:13.712063 [CA 1] Center 37 (11~63) winsize 53
2294 18:01:13.715512 [CA 2] Center 34 (5~63) winsize 59
2295 18:01:13.718897 [CA 3] Center 35 (7~63) winsize 57
2296 18:01:13.722283 [CA 4] Center 33 (4~63) winsize 60
2297 18:01:13.725412 [CA 5] Center 28 (-1~57) winsize 59
2298 18:01:13.725527
2299 18:01:13.728667 [CATrainingPosCal] consider 2 rank data
2300 18:01:13.732089 u2DelayCellTimex100 = 744/100 ps
2301 18:01:13.735242 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2302 18:01:13.738391 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2303 18:01:13.745057 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2304 18:01:13.748125 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2305 18:01:13.751428 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2306 18:01:13.754734 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2307 18:01:13.754880
2308 18:01:13.758287 CA PerBit enable=1, Macro0, CA PI delay=28
2309 18:01:13.761547 === u2Vref_new: 0x5c --> 0x78
2310 18:01:13.761763
2311 18:01:13.764707 Vref(ca) range 1: 28
2312 18:01:13.764904
2313 18:01:13.765087 CS Dly= 11 (42-0-32)
2314 18:01:13.767767 Write Rank1 MR13 =0xd8
2315 18:01:13.771021 Write Rank1 MR13 =0xd8
2316 18:01:13.771251 Write Rank1 MR12 =0x5c
2317 18:01:13.774346 [RankSwap] Rank num 2, (Multi 1), Rank 0
2318 18:01:13.777914 Write Rank0 MR2 =0xad
2319 18:01:13.778182 [Write Leveling]
2320 18:01:13.781243 delay byte0 byte1 byte2 byte3
2321 18:01:13.781630
2322 18:01:13.784745 10 0 0
2323 18:01:13.785126 11 0 0
2324 18:01:13.787698 12 0 0
2325 18:01:13.788081 13 0 0
2326 18:01:13.788386 14 0 0
2327 18:01:13.790916 15 0 0
2328 18:01:13.791296 16 0 0
2329 18:01:13.794367 17 0 0
2330 18:01:13.794761 18 0 0
2331 18:01:13.797899 19 0 0
2332 18:01:13.798290 20 0 0
2333 18:01:13.798594 21 0 0
2334 18:01:13.800721 22 0 0
2335 18:01:13.801099 23 0 0
2336 18:01:13.804195 24 0 0
2337 18:01:13.804583 25 0 0
2338 18:01:13.804888 26 0 0
2339 18:01:13.807576 27 0 0
2340 18:01:13.807958 28 0 ff
2341 18:01:13.810460 29 0 ff
2342 18:01:13.810841 30 0 ff
2343 18:01:13.813689 31 0 ff
2344 18:01:13.814161 32 0 ff
2345 18:01:13.816870 33 0 ff
2346 18:01:13.817253 34 0 ff
2347 18:01:13.820427 35 0 ff
2348 18:01:13.820880 36 ff ff
2349 18:01:13.821193 37 0 ff
2350 18:01:13.823918 38 ff ff
2351 18:01:13.824298 39 ff ff
2352 18:01:13.826973 40 ff ff
2353 18:01:13.827356 41 ff ff
2354 18:01:13.830454 42 ff ff
2355 18:01:13.830835 43 ff ff
2356 18:01:13.833529 44 ff ff
2357 18:01:13.836992 pass bytecount = 0xff (0xff: all bytes pass)
2358 18:01:13.837370
2359 18:01:13.837721 DQS0 dly: 38
2360 18:01:13.839946 DQS1 dly: 28
2361 18:01:13.840321 Write Rank0 MR2 =0x2d
2362 18:01:13.843195 [RankSwap] Rank num 2, (Multi 1), Rank 0
2363 18:01:13.846799 Write Rank0 MR1 =0xd6
2364 18:01:13.847176 [Gating]
2365 18:01:13.847474 ==
2366 18:01:13.852942 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2367 18:01:13.856498 fsp= 1, odt_onoff= 1, Byte mode= 0
2368 18:01:13.856878 ==
2369 18:01:13.859890 3 1 0 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2370 18:01:13.866338 3 1 4 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2371 18:01:13.869532 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2372 18:01:13.873034 3 1 12 |2c2b 808 |(11 11)(11 11) |(0 0)(1 1)| 0
2373 18:01:13.879409 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2374 18:01:13.882745 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2375 18:01:13.885645 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2376 18:01:13.892094 [Byte 1] Lead/lag falling Transition (3, 1, 24)
2377 18:01:13.895535 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2378 18:01:13.898832 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2379 18:01:13.905246 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2380 18:01:13.908418 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2381 18:01:13.911830 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2382 18:01:13.918069 3 2 16 |201 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2383 18:01:13.921553 3 2 20 |2727 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2384 18:01:13.924918 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2385 18:01:13.931289 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2386 18:01:13.934608 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2387 18:01:13.937962 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2388 18:01:13.944600 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2389 18:01:13.947654 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 18:01:13.951152 3 3 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 18:01:13.957637 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 18:01:13.960619 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2393 18:01:13.963844 3 3 24 |3534 908 |(11 11)(11 11) |(0 1)(1 1)| 0
2394 18:01:13.967332 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2395 18:01:13.973761 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2396 18:01:13.977292 [Byte 1] Lead/lag falling Transition (3, 4, 0)
2397 18:01:13.980285 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2398 18:01:13.986790 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2399 18:01:13.990060 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2400 18:01:13.993549 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2401 18:01:14.000108 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2402 18:01:14.003217 3 4 24 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
2403 18:01:14.006720 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 18:01:14.013171 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2405 18:01:14.016638 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2406 18:01:14.019966 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2407 18:01:14.026167 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2408 18:01:14.029544 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2409 18:01:14.032856 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2410 18:01:14.039472 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2411 18:01:14.042477 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2412 18:01:14.045851 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2413 18:01:14.052567 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 18:01:14.055761 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 18:01:14.059133 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2416 18:01:14.065392 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2417 18:01:14.068915 [Byte 0] Lead/lag Transition tap number (2)
2418 18:01:14.071862 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2419 18:01:14.075299 3 6 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2420 18:01:14.081661 [Byte 1] Lead/lag Transition tap number (2)
2421 18:01:14.085061 3 6 20 |1616 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2422 18:01:14.088332 3 6 24 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
2423 18:01:14.091667 [Byte 0]First pass (3, 6, 24)
2424 18:01:14.094910 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2425 18:01:14.098129 [Byte 1]First pass (3, 6, 28)
2426 18:01:14.101414 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2427 18:01:14.104884 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2428 18:01:14.111467 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2429 18:01:14.114720 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2430 18:01:14.117640 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2431 18:01:14.121107 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2432 18:01:14.127561 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2433 18:01:14.130781 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2434 18:01:14.134434 All bytes gating window > 1UI, Early break!
2435 18:01:14.134525
2436 18:01:14.137425 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2437 18:01:14.137524
2438 18:01:14.140866 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2439 18:01:14.140956
2440 18:01:14.141038
2441 18:01:14.143884
2442 18:01:14.147345 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2443 18:01:14.147436
2444 18:01:14.150646 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2445 18:01:14.150737
2446 18:01:14.150808
2447 18:01:14.153859 Write Rank0 MR1 =0x56
2448 18:01:14.153950
2449 18:01:14.157145 best RODT dly(2T, 0.5T) = (2, 3)
2450 18:01:14.157237
2451 18:01:14.160474 best RODT dly(2T, 0.5T) = (2, 3)
2452 18:01:14.160567 ==
2453 18:01:14.163546 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2454 18:01:14.166905 fsp= 1, odt_onoff= 1, Byte mode= 0
2455 18:01:14.166996 ==
2456 18:01:14.173303 Start DQ dly to find pass range UseTestEngine =0
2457 18:01:14.176766 x-axis: bit #, y-axis: DQ dly (-127~63)
2458 18:01:14.176858 RX Vref Scan = 0
2459 18:01:14.179863 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2460 18:01:14.183254 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2461 18:01:14.186705 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2462 18:01:14.189719 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2463 18:01:14.193080 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2464 18:01:14.193173 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2465 18:01:14.196419 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2466 18:01:14.199629 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2467 18:01:14.202788 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2468 18:01:14.206342 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2469 18:01:14.209563 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2470 18:01:14.212677 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2471 18:01:14.215922 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2472 18:01:14.219193 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2473 18:01:14.219292 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2474 18:01:14.222517 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2475 18:01:14.225843 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2476 18:01:14.229358 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2477 18:01:14.232609 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2478 18:01:14.235628 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2479 18:01:14.238946 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2480 18:01:14.242410 -5, [0] xxxxxxxx xxxxxxxo [MSB]
2481 18:01:14.242513 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2482 18:01:14.245343 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2483 18:01:14.248833 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2484 18:01:14.252178 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2485 18:01:14.255374 0, [0] xxxoxxxx ooxxxxxo [MSB]
2486 18:01:14.258460 1, [0] xxooxxxx ooxxxxxo [MSB]
2487 18:01:14.261900 2, [0] xxooxxxo oooxxxxo [MSB]
2488 18:01:14.262000 3, [0] xooooxxo oooooooo [MSB]
2489 18:01:14.265240 4, [0] xooooxxo oooooooo [MSB]
2490 18:01:14.268309 5, [0] oooooxoo oooooooo [MSB]
2491 18:01:14.271808 6, [0] oooooxoo oooooooo [MSB]
2492 18:01:14.274891 32, [0] oooooooo ooooooox [MSB]
2493 18:01:14.278153 33, [0] oooooooo ooooooox [MSB]
2494 18:01:14.281701 34, [0] oooooooo ooooooox [MSB]
2495 18:01:14.284646 35, [0] ooxooooo oxooooox [MSB]
2496 18:01:14.284741 36, [0] ooxxoooo oxooooox [MSB]
2497 18:01:14.287865 37, [0] ooxxoooo xxooooox [MSB]
2498 18:01:14.291495 38, [0] ooxxoooo xxooooox [MSB]
2499 18:01:14.294609 39, [0] oxxxooox xxxxxoox [MSB]
2500 18:01:14.298089 40, [0] oxxxxoox xxxxxoox [MSB]
2501 18:01:14.301034 41, [0] xxxxxoxx xxxxxxxx [MSB]
2502 18:01:14.304482 42, [0] xxxxxoxx xxxxxxxx [MSB]
2503 18:01:14.304574 43, [0] xxxxxxxx xxxxxxxx [MSB]
2504 18:01:14.311041 iDelay=43, Bit 0, Center 22 (5 ~ 40) 36
2505 18:01:14.314360 iDelay=43, Bit 1, Center 20 (3 ~ 38) 36
2506 18:01:14.317759 iDelay=43, Bit 2, Center 17 (1 ~ 34) 34
2507 18:01:14.320785 iDelay=43, Bit 3, Center 17 (-1 ~ 35) 37
2508 18:01:14.324017 iDelay=43, Bit 4, Center 21 (3 ~ 39) 37
2509 18:01:14.327281 iDelay=43, Bit 5, Center 24 (7 ~ 42) 36
2510 18:01:14.330691 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
2511 18:01:14.333689 iDelay=43, Bit 7, Center 20 (2 ~ 38) 37
2512 18:01:14.336993 iDelay=43, Bit 8, Center 17 (-1 ~ 36) 38
2513 18:01:14.340212 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2514 18:01:14.343849 iDelay=43, Bit 10, Center 20 (2 ~ 38) 37
2515 18:01:14.350072 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
2516 18:01:14.353566 iDelay=43, Bit 12, Center 20 (3 ~ 38) 36
2517 18:01:14.357045 iDelay=43, Bit 13, Center 21 (3 ~ 40) 38
2518 18:01:14.360020 iDelay=43, Bit 14, Center 21 (3 ~ 40) 38
2519 18:01:14.363206 iDelay=43, Bit 15, Center 13 (-5 ~ 31) 37
2520 18:01:14.363302 ==
2521 18:01:14.369806 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2522 18:01:14.372960 fsp= 1, odt_onoff= 1, Byte mode= 0
2523 18:01:14.373054 ==
2524 18:01:14.373126 DQS Delay:
2525 18:01:14.373194 DQS0 = 0, DQS1 = 0
2526 18:01:14.376439 DQM Delay:
2527 18:01:14.376534 DQM0 = 20, DQM1 = 18
2528 18:01:14.379914 DQ Delay:
2529 18:01:14.382874 DQ0 =22, DQ1 =20, DQ2 =17, DQ3 =17
2530 18:01:14.386289 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
2531 18:01:14.389458 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2532 18:01:14.392854 DQ12 =20, DQ13 =21, DQ14 =21, DQ15 =13
2533 18:01:14.392946
2534 18:01:14.393019
2535 18:01:14.393087 DramC Write-DBI off
2536 18:01:14.393152 ==
2537 18:01:14.399298 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2538 18:01:14.402619 fsp= 1, odt_onoff= 1, Byte mode= 0
2539 18:01:14.402740 ==
2540 18:01:14.405708 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2541 18:01:14.405799
2542 18:01:14.409067 Begin, DQ Scan Range 924~1180
2543 18:01:14.409158
2544 18:01:14.409263
2545 18:01:14.412223 TX Vref Scan disable
2546 18:01:14.415643 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2547 18:01:14.419047 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2548 18:01:14.422468 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2549 18:01:14.425241 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2550 18:01:14.428615 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2551 18:01:14.431909 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2552 18:01:14.435271 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2553 18:01:14.438655 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2554 18:01:14.445265 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2555 18:01:14.448342 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2556 18:01:14.451574 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2557 18:01:14.454974 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2558 18:01:14.458452 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2559 18:01:14.461812 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2560 18:01:14.465080 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2561 18:01:14.468043 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2562 18:01:14.471364 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2563 18:01:14.474521 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2564 18:01:14.477875 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2565 18:01:14.481231 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2566 18:01:14.484244 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2567 18:01:14.491110 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2568 18:01:14.494320 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2569 18:01:14.497553 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2570 18:01:14.500919 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2571 18:01:14.504165 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2572 18:01:14.507492 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2573 18:01:14.510885 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2574 18:01:14.513859 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2575 18:01:14.517065 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2576 18:01:14.520535 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2577 18:01:14.523900 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2578 18:01:14.526926 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2579 18:01:14.530175 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2580 18:01:14.536768 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2581 18:01:14.540359 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2582 18:01:14.543305 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2583 18:01:14.546657 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2584 18:01:14.549945 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2585 18:01:14.553300 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2586 18:01:14.556546 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2587 18:01:14.559969 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2588 18:01:14.562992 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2589 18:01:14.566234 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2590 18:01:14.569713 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2591 18:01:14.572756 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2592 18:01:14.576135 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2593 18:01:14.579306 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2594 18:01:14.582499 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2595 18:01:14.589303 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2596 18:01:14.592372 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
2597 18:01:14.595749 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
2598 18:01:14.598905 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
2599 18:01:14.602427 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2600 18:01:14.605416 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2601 18:01:14.608779 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2602 18:01:14.612163 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2603 18:01:14.615226 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2604 18:01:14.618743 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2605 18:01:14.621898 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
2606 18:01:14.625410 984 |3 6 24|[0] xxxxxxxx oooooooo [MSB]
2607 18:01:14.632162 990 |3 6 30|[0] oooooooo ooooooox [MSB]
2608 18:01:14.635554 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2609 18:01:14.638923 992 |3 6 32|[0] oooooooo oxooooox [MSB]
2610 18:01:14.641719 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2611 18:01:14.645214 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2612 18:01:14.648401 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2613 18:01:14.651815 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2614 18:01:14.655084 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2615 18:01:14.658320 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2616 18:01:14.661708 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2617 18:01:14.664871 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2618 18:01:14.671495 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2619 18:01:14.674871 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2620 18:01:14.677796 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2621 18:01:14.681265 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2622 18:01:14.684519 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2623 18:01:14.687595 1006 |3 6 46|[0] ooxxxoox xxxxxxxx [MSB]
2624 18:01:14.690841 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2625 18:01:14.694457 Byte0, DQ PI dly=993, DQM PI dly= 993
2626 18:01:14.700852 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2627 18:01:14.700944
2628 18:01:14.704160 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2629 18:01:14.704253
2630 18:01:14.707353 Byte1, DQ PI dly=982, DQM PI dly= 982
2631 18:01:14.710911 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2632 18:01:14.711002
2633 18:01:14.717207 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2634 18:01:14.717298
2635 18:01:14.717370 ==
2636 18:01:14.720666 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2637 18:01:14.723962 fsp= 1, odt_onoff= 1, Byte mode= 0
2638 18:01:14.724052 ==
2639 18:01:14.730490 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2640 18:01:14.730580
2641 18:01:14.730651 Begin, DQ Scan Range 958~1022
2642 18:01:14.733712 Write Rank0 MR14 =0x0
2643 18:01:14.742445
2644 18:01:14.745969 CH=1, VrefRange= 0, VrefLevel = 0
2645 18:01:14.749301 TX Bit0 (987~1002) 16 994, Bit8 (976~990) 15 983,
2646 18:01:14.752514 TX Bit1 (985~1001) 17 993, Bit9 (976~987) 12 981,
2647 18:01:14.759011 TX Bit2 (984~999) 16 991, Bit10 (978~991) 14 984,
2648 18:01:14.762161 TX Bit3 (983~997) 15 990, Bit11 (979~991) 13 985,
2649 18:01:14.768625 TX Bit4 (985~1000) 16 992, Bit12 (979~991) 13 985,
2650 18:01:14.771858 TX Bit5 (988~1001) 14 994, Bit13 (980~992) 13 986,
2651 18:01:14.775324 TX Bit6 (986~1000) 15 993, Bit14 (979~991) 13 985,
2652 18:01:14.781738 TX Bit7 (986~1000) 15 993, Bit15 (974~983) 10 978,
2653 18:01:14.781858
2654 18:01:14.781960 Write Rank0 MR14 =0x2
2655 18:01:14.792047
2656 18:01:14.792139 CH=1, VrefRange= 0, VrefLevel = 2
2657 18:01:14.798926 TX Bit0 (987~1003) 17 995, Bit8 (976~990) 15 983,
2658 18:01:14.802030 TX Bit1 (985~1002) 18 993, Bit9 (976~988) 13 982,
2659 18:01:14.808713 TX Bit2 (984~999) 16 991, Bit10 (977~992) 16 984,
2660 18:01:14.811967 TX Bit3 (982~998) 17 990, Bit11 (979~991) 13 985,
2661 18:01:14.815028 TX Bit4 (985~1001) 17 993, Bit12 (978~991) 14 984,
2662 18:01:14.821636 TX Bit5 (987~1002) 16 994, Bit13 (979~992) 14 985,
2663 18:01:14.824736 TX Bit6 (986~1001) 16 993, Bit14 (979~991) 13 985,
2664 18:01:14.831566 TX Bit7 (986~1001) 16 993, Bit15 (974~983) 10 978,
2665 18:01:14.831658
2666 18:01:14.831729 Write Rank0 MR14 =0x4
2667 18:01:14.841733
2668 18:01:14.841825 CH=1, VrefRange= 0, VrefLevel = 4
2669 18:01:14.848618 TX Bit0 (986~1004) 19 995, Bit8 (976~990) 15 983,
2670 18:01:14.851533 TX Bit1 (985~1003) 19 994, Bit9 (976~989) 14 982,
2671 18:01:14.858157 TX Bit2 (984~1000) 17 992, Bit10 (977~992) 16 984,
2672 18:01:14.861638 TX Bit3 (982~998) 17 990, Bit11 (978~992) 15 985,
2673 18:01:14.867769 TX Bit4 (985~1001) 17 993, Bit12 (978~992) 15 985,
2674 18:01:14.871440 TX Bit5 (986~1003) 18 994, Bit13 (979~993) 15 986,
2675 18:01:14.874543 TX Bit6 (985~1001) 17 993, Bit14 (979~992) 14 985,
2676 18:01:14.881188 TX Bit7 (985~1001) 17 993, Bit15 (972~984) 13 978,
2677 18:01:14.881310
2678 18:01:14.881412 Write Rank0 MR14 =0x6
2679 18:01:14.891901
2680 18:01:14.892022 CH=1, VrefRange= 0, VrefLevel = 6
2681 18:01:14.898489 TX Bit0 (986~1005) 20 995, Bit8 (975~991) 17 983,
2682 18:01:14.901575 TX Bit1 (985~1003) 19 994, Bit9 (975~990) 16 982,
2683 18:01:14.908178 TX Bit2 (983~1000) 18 991, Bit10 (977~992) 16 984,
2684 18:01:14.911414 TX Bit3 (981~998) 18 989, Bit11 (978~992) 15 985,
2685 18:01:14.918143 TX Bit4 (985~1002) 18 993, Bit12 (978~992) 15 985,
2686 18:01:14.921340 TX Bit5 (986~1004) 19 995, Bit13 (979~993) 15 986,
2687 18:01:14.924446 TX Bit6 (985~1002) 18 993, Bit14 (978~992) 15 985,
2688 18:01:14.931188 TX Bit7 (985~1001) 17 993, Bit15 (972~985) 14 978,
2689 18:01:14.931313
2690 18:01:14.931416 Write Rank0 MR14 =0x8
2691 18:01:14.941790
2692 18:01:14.941886 CH=1, VrefRange= 0, VrefLevel = 8
2693 18:01:14.948265 TX Bit0 (986~1005) 20 995, Bit8 (975~991) 17 983,
2694 18:01:14.951469 TX Bit1 (984~1004) 21 994, Bit9 (975~990) 16 982,
2695 18:01:14.958192 TX Bit2 (983~1000) 18 991, Bit10 (976~993) 18 984,
2696 18:01:14.961373 TX Bit3 (981~999) 19 990, Bit11 (978~993) 16 985,
2697 18:01:14.967682 TX Bit4 (984~1002) 19 993, Bit12 (978~992) 15 985,
2698 18:01:14.971229 TX Bit5 (986~1004) 19 995, Bit13 (978~994) 17 986,
2699 18:01:14.974623 TX Bit6 (985~1003) 19 994, Bit14 (978~993) 16 985,
2700 18:01:14.980791 TX Bit7 (985~1002) 18 993, Bit15 (972~986) 15 979,
2701 18:01:14.980883
2702 18:01:14.980955 Write Rank0 MR14 =0xa
2703 18:01:14.992181
2704 18:01:14.994986 CH=1, VrefRange= 0, VrefLevel = 10
2705 18:01:14.998306 TX Bit0 (985~1006) 22 995, Bit8 (974~991) 18 982,
2706 18:01:15.001652 TX Bit1 (984~1005) 22 994, Bit9 (975~990) 16 982,
2707 18:01:15.008297 TX Bit2 (983~1001) 19 992, Bit10 (976~994) 19 985,
2708 18:01:15.011463 TX Bit3 (980~999) 20 989, Bit11 (978~994) 17 986,
2709 18:01:15.018151 TX Bit4 (984~1003) 20 993, Bit12 (978~993) 16 985,
2710 18:01:15.021469 TX Bit5 (985~1005) 21 995, Bit13 (978~995) 18 986,
2711 18:01:15.024613 TX Bit6 (985~1003) 19 994, Bit14 (977~993) 17 985,
2712 18:01:15.031272 TX Bit7 (985~1003) 19 994, Bit15 (971~986) 16 978,
2713 18:01:15.031363
2714 18:01:15.031434 Write Rank0 MR14 =0xc
2715 18:01:15.042189
2716 18:01:15.045346 CH=1, VrefRange= 0, VrefLevel = 12
2717 18:01:15.048610 TX Bit0 (985~1006) 22 995, Bit8 (974~992) 19 983,
2718 18:01:15.052105 TX Bit1 (984~1005) 22 994, Bit9 (974~991) 18 982,
2719 18:01:15.058516 TX Bit2 (982~1002) 21 992, Bit10 (976~994) 19 985,
2720 18:01:15.061451 TX Bit3 (980~999) 20 989, Bit11 (978~994) 17 986,
2721 18:01:15.068105 TX Bit4 (984~1004) 21 994, Bit12 (977~994) 18 985,
2722 18:01:15.071437 TX Bit5 (985~1005) 21 995, Bit13 (977~995) 19 986,
2723 18:01:15.074975 TX Bit6 (984~1004) 21 994, Bit14 (977~994) 18 985,
2724 18:01:15.081248 TX Bit7 (984~1004) 21 994, Bit15 (971~988) 18 979,
2725 18:01:15.081339
2726 18:01:15.081410 Write Rank0 MR14 =0xe
2727 18:01:15.092232
2728 18:01:15.095627 CH=1, VrefRange= 0, VrefLevel = 14
2729 18:01:15.098963 TX Bit0 (985~1006) 22 995, Bit8 (973~992) 20 982,
2730 18:01:15.101879 TX Bit1 (984~1006) 23 995, Bit9 (975~991) 17 983,
2731 18:01:15.108824 TX Bit2 (982~1003) 22 992, Bit10 (976~995) 20 985,
2732 18:01:15.111987 TX Bit3 (979~1000) 22 989, Bit11 (977~995) 19 986,
2733 18:01:15.118201 TX Bit4 (984~1005) 22 994, Bit12 (977~995) 19 986,
2734 18:01:15.121650 TX Bit5 (985~1006) 22 995, Bit13 (977~996) 20 986,
2735 18:01:15.125036 TX Bit6 (984~1005) 22 994, Bit14 (977~994) 18 985,
2736 18:01:15.131333 TX Bit7 (984~1004) 21 994, Bit15 (971~988) 18 979,
2737 18:01:15.131418
2738 18:01:15.134595 Write Rank0 MR14 =0x10
2739 18:01:15.142774
2740 18:01:15.146063 CH=1, VrefRange= 0, VrefLevel = 16
2741 18:01:15.149257 TX Bit0 (985~1006) 22 995, Bit8 (973~992) 20 982,
2742 18:01:15.152366 TX Bit1 (984~1006) 23 995, Bit9 (974~991) 18 982,
2743 18:01:15.158826 TX Bit2 (982~1004) 23 993, Bit10 (976~995) 20 985,
2744 18:01:15.162231 TX Bit3 (979~1000) 22 989, Bit11 (977~995) 19 986,
2745 18:01:15.168645 TX Bit4 (983~1005) 23 994, Bit12 (977~996) 20 986,
2746 18:01:15.172287 TX Bit5 (985~1006) 22 995, Bit13 (977~997) 21 987,
2747 18:01:15.175593 TX Bit6 (984~1006) 23 995, Bit14 (977~995) 19 986,
2748 18:01:15.181909 TX Bit7 (984~1005) 22 994, Bit15 (970~989) 20 979,
2749 18:01:15.182001
2750 18:01:15.185334 Write Rank0 MR14 =0x12
2751 18:01:15.193706
2752 18:01:15.196474 CH=1, VrefRange= 0, VrefLevel = 18
2753 18:01:15.199619 TX Bit0 (985~1007) 23 996, Bit8 (972~993) 22 982,
2754 18:01:15.202767 TX Bit1 (984~1006) 23 995, Bit9 (973~991) 19 982,
2755 18:01:15.209421 TX Bit2 (982~1005) 24 993, Bit10 (975~996) 22 985,
2756 18:01:15.212903 TX Bit3 (979~1001) 23 990, Bit11 (977~997) 21 987,
2757 18:01:15.219516 TX Bit4 (984~1006) 23 995, Bit12 (977~996) 20 986,
2758 18:01:15.222442 TX Bit5 (985~1006) 22 995, Bit13 (977~997) 21 987,
2759 18:01:15.225943 TX Bit6 (984~1006) 23 995, Bit14 (977~996) 20 986,
2760 18:01:15.232470 TX Bit7 (984~1005) 22 994, Bit15 (970~990) 21 980,
2761 18:01:15.232563
2762 18:01:15.235783 Write Rank0 MR14 =0x14
2763 18:01:15.243827
2764 18:01:15.246959 CH=1, VrefRange= 0, VrefLevel = 20
2765 18:01:15.250164 TX Bit0 (984~1007) 24 995, Bit8 (972~994) 23 983,
2766 18:01:15.253306 TX Bit1 (983~1006) 24 994, Bit9 (972~992) 21 982,
2767 18:01:15.259908 TX Bit2 (982~1005) 24 993, Bit10 (975~997) 23 986,
2768 18:01:15.263341 TX Bit3 (978~1001) 24 989, Bit11 (977~997) 21 987,
2769 18:01:15.269662 TX Bit4 (983~1006) 24 994, Bit12 (976~997) 22 986,
2770 18:01:15.273060 TX Bit5 (984~1007) 24 995, Bit13 (977~998) 22 987,
2771 18:01:15.276436 TX Bit6 (984~1006) 23 995, Bit14 (976~996) 21 986,
2772 18:01:15.283248 TX Bit7 (984~1006) 23 995, Bit15 (970~990) 21 980,
2773 18:01:15.283341
2774 18:01:15.286054 Write Rank0 MR14 =0x16
2775 18:01:15.294377
2776 18:01:15.297365 CH=1, VrefRange= 0, VrefLevel = 22
2777 18:01:15.300769 TX Bit0 (985~1007) 23 996, Bit8 (972~994) 23 983,
2778 18:01:15.304103 TX Bit1 (983~1006) 24 994, Bit9 (971~992) 22 981,
2779 18:01:15.310573 TX Bit2 (981~1005) 25 993, Bit10 (975~997) 23 986,
2780 18:01:15.313852 TX Bit3 (978~1001) 24 989, Bit11 (976~998) 23 987,
2781 18:01:15.320270 TX Bit4 (983~1006) 24 994, Bit12 (976~997) 22 986,
2782 18:01:15.323790 TX Bit5 (984~1007) 24 995, Bit13 (977~998) 22 987,
2783 18:01:15.327006 TX Bit6 (984~1006) 23 995, Bit14 (976~997) 22 986,
2784 18:01:15.333516 TX Bit7 (984~1006) 23 995, Bit15 (969~991) 23 980,
2785 18:01:15.333656
2786 18:01:15.336552 Write Rank0 MR14 =0x18
2787 18:01:15.344637
2788 18:01:15.348017 CH=1, VrefRange= 0, VrefLevel = 24
2789 18:01:15.351129 TX Bit0 (985~1007) 23 996, Bit8 (972~994) 23 983,
2790 18:01:15.354520 TX Bit1 (983~1006) 24 994, Bit9 (971~992) 22 981,
2791 18:01:15.361165 TX Bit2 (981~1005) 25 993, Bit10 (975~997) 23 986,
2792 18:01:15.364506 TX Bit3 (978~1001) 24 989, Bit11 (976~998) 23 987,
2793 18:01:15.371079 TX Bit4 (983~1006) 24 994, Bit12 (976~997) 22 986,
2794 18:01:15.374272 TX Bit5 (984~1007) 24 995, Bit13 (977~998) 22 987,
2795 18:01:15.377922 TX Bit6 (984~1006) 23 995, Bit14 (976~997) 22 986,
2796 18:01:15.384477 TX Bit7 (984~1006) 23 995, Bit15 (969~991) 23 980,
2797 18:01:15.384897
2798 18:01:15.387309 Write Rank0 MR14 =0x1a
2799 18:01:15.395651
2800 18:01:15.398840 CH=1, VrefRange= 0, VrefLevel = 26
2801 18:01:15.401993 TX Bit0 (984~1007) 24 995, Bit8 (971~996) 26 983,
2802 18:01:15.405415 TX Bit1 (983~1007) 25 995, Bit9 (971~993) 23 982,
2803 18:01:15.411801 TX Bit2 (980~1006) 27 993, Bit10 (974~998) 25 986,
2804 18:01:15.415266 TX Bit3 (978~1003) 26 990, Bit11 (976~998) 23 987,
2805 18:01:15.421983 TX Bit4 (982~1007) 26 994, Bit12 (976~998) 23 987,
2806 18:01:15.424994 TX Bit5 (984~1007) 24 995, Bit13 (976~999) 24 987,
2807 18:01:15.428335 TX Bit6 (983~1007) 25 995, Bit14 (976~998) 23 987,
2808 18:01:15.434686 TX Bit7 (983~1007) 25 995, Bit15 (969~991) 23 980,
2809 18:01:15.435156
2810 18:01:15.437993 Write Rank0 MR14 =0x1c
2811 18:01:15.446073
2812 18:01:15.449110 CH=1, VrefRange= 0, VrefLevel = 28
2813 18:01:15.452405 TX Bit0 (984~1007) 24 995, Bit8 (971~997) 27 984,
2814 18:01:15.455740 TX Bit1 (983~1007) 25 995, Bit9 (971~993) 23 982,
2815 18:01:15.462525 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
2816 18:01:15.465563 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
2817 18:01:15.472290 TX Bit4 (982~1007) 26 994, Bit12 (975~998) 24 986,
2818 18:01:15.475336 TX Bit5 (984~1007) 24 995, Bit13 (976~999) 24 987,
2819 18:01:15.478766 TX Bit6 (983~1007) 25 995, Bit14 (975~998) 24 986,
2820 18:01:15.485226 TX Bit7 (983~1007) 25 995, Bit15 (969~991) 23 980,
2821 18:01:15.485714
2822 18:01:15.488460 Write Rank0 MR14 =0x1e
2823 18:01:15.496931
2824 18:01:15.500072 CH=1, VrefRange= 0, VrefLevel = 30
2825 18:01:15.503505 TX Bit0 (984~1008) 25 996, Bit8 (971~996) 26 983,
2826 18:01:15.506439 TX Bit1 (983~1007) 25 995, Bit9 (970~994) 25 982,
2827 18:01:15.513128 TX Bit2 (979~1006) 28 992, Bit10 (975~998) 24 986,
2828 18:01:15.516584 TX Bit3 (977~1003) 27 990, Bit11 (975~999) 25 987,
2829 18:01:15.523021 TX Bit4 (983~1007) 25 995, Bit12 (975~998) 24 986,
2830 18:01:15.526343 TX Bit5 (984~1007) 24 995, Bit13 (976~999) 24 987,
2831 18:01:15.529347 TX Bit6 (983~1007) 25 995, Bit14 (976~998) 23 987,
2832 18:01:15.536210 TX Bit7 (983~1007) 25 995, Bit15 (968~991) 24 979,
2833 18:01:15.536631
2834 18:01:15.539178 Write Rank0 MR14 =0x20
2835 18:01:15.547691
2836 18:01:15.550998 CH=1, VrefRange= 0, VrefLevel = 32
2837 18:01:15.554011 TX Bit0 (984~1008) 25 996, Bit8 (970~995) 26 982,
2838 18:01:15.557206 TX Bit1 (983~1007) 25 995, Bit9 (970~993) 24 981,
2839 18:01:15.563693 TX Bit2 (980~1006) 27 993, Bit10 (975~998) 24 986,
2840 18:01:15.567198 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
2841 18:01:15.573632 TX Bit4 (983~1007) 25 995, Bit12 (975~998) 24 986,
2842 18:01:15.576658 TX Bit5 (983~1008) 26 995, Bit13 (975~999) 25 987,
2843 18:01:15.579942 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
2844 18:01:15.586762 TX Bit7 (983~1007) 25 995, Bit15 (968~992) 25 980,
2845 18:01:15.587178
2846 18:01:15.589779 Write Rank0 MR14 =0x22
2847 18:01:15.597847
2848 18:01:15.601271 CH=1, VrefRange= 0, VrefLevel = 34
2849 18:01:15.604491 TX Bit0 (984~1008) 25 996, Bit8 (970~995) 26 982,
2850 18:01:15.608042 TX Bit1 (983~1007) 25 995, Bit9 (970~993) 24 981,
2851 18:01:15.614222 TX Bit2 (980~1006) 27 993, Bit10 (975~998) 24 986,
2852 18:01:15.617760 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
2853 18:01:15.624090 TX Bit4 (983~1007) 25 995, Bit12 (975~998) 24 986,
2854 18:01:15.627562 TX Bit5 (983~1008) 26 995, Bit13 (975~999) 25 987,
2855 18:01:15.630844 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
2856 18:01:15.637426 TX Bit7 (983~1007) 25 995, Bit15 (968~992) 25 980,
2857 18:01:15.637884
2858 18:01:15.640331 Write Rank0 MR14 =0x24
2859 18:01:15.648900
2860 18:01:15.651842 CH=1, VrefRange= 0, VrefLevel = 36
2861 18:01:15.655144 TX Bit0 (984~1008) 25 996, Bit8 (970~995) 26 982,
2862 18:01:15.658228 TX Bit1 (983~1007) 25 995, Bit9 (970~993) 24 981,
2863 18:01:15.664762 TX Bit2 (980~1006) 27 993, Bit10 (975~998) 24 986,
2864 18:01:15.668272 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
2865 18:01:15.675055 TX Bit4 (983~1007) 25 995, Bit12 (975~998) 24 986,
2866 18:01:15.678321 TX Bit5 (983~1008) 26 995, Bit13 (975~999) 25 987,
2867 18:01:15.681551 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
2868 18:01:15.688044 TX Bit7 (983~1007) 25 995, Bit15 (968~992) 25 980,
2869 18:01:15.688462
2870 18:01:15.691089 Write Rank0 MR14 =0x26
2871 18:01:15.699721
2872 18:01:15.702789 CH=1, VrefRange= 0, VrefLevel = 38
2873 18:01:15.705875 TX Bit0 (984~1008) 25 996, Bit8 (970~995) 26 982,
2874 18:01:15.709266 TX Bit1 (983~1007) 25 995, Bit9 (970~993) 24 981,
2875 18:01:15.715624 TX Bit2 (980~1006) 27 993, Bit10 (975~998) 24 986,
2876 18:01:15.719174 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
2877 18:01:15.725778 TX Bit4 (983~1007) 25 995, Bit12 (975~998) 24 986,
2878 18:01:15.729047 TX Bit5 (983~1008) 26 995, Bit13 (975~999) 25 987,
2879 18:01:15.732215 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
2880 18:01:15.738854 TX Bit7 (983~1007) 25 995, Bit15 (968~992) 25 980,
2881 18:01:15.739276
2882 18:01:15.739603 Write Rank0 MR14 =0x28
2883 18:01:15.750146
2884 18:01:15.753120 CH=1, VrefRange= 0, VrefLevel = 40
2885 18:01:15.756509 TX Bit0 (984~1008) 25 996, Bit8 (970~995) 26 982,
2886 18:01:15.759956 TX Bit1 (983~1007) 25 995, Bit9 (970~993) 24 981,
2887 18:01:15.766553 TX Bit2 (980~1006) 27 993, Bit10 (975~998) 24 986,
2888 18:01:15.769789 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
2889 18:01:15.776289 TX Bit4 (983~1007) 25 995, Bit12 (975~998) 24 986,
2890 18:01:15.779789 TX Bit5 (983~1008) 26 995, Bit13 (975~999) 25 987,
2891 18:01:15.782704 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
2892 18:01:15.789505 TX Bit7 (983~1007) 25 995, Bit15 (968~992) 25 980,
2893 18:01:15.789927
2894 18:01:15.790254
2895 18:01:15.792996 TX Vref found, early break! 371< 381
2896 18:01:15.795831 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2897 18:01:15.799422 u1DelayCellOfst[0]=7 cells (6 PI)
2898 18:01:15.802498 u1DelayCellOfst[1]=6 cells (5 PI)
2899 18:01:15.805864 u1DelayCellOfst[2]=3 cells (3 PI)
2900 18:01:15.809135 u1DelayCellOfst[3]=0 cells (0 PI)
2901 18:01:15.812161 u1DelayCellOfst[4]=6 cells (5 PI)
2902 18:01:15.815184 u1DelayCellOfst[5]=6 cells (5 PI)
2903 18:01:15.818568 u1DelayCellOfst[6]=5 cells (4 PI)
2904 18:01:15.821910 u1DelayCellOfst[7]=6 cells (5 PI)
2905 18:01:15.824882 Byte0, DQ PI dly=990, DQM PI dly= 993
2906 18:01:15.828360 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2907 18:01:15.828450
2908 18:01:15.831862 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2909 18:01:15.835068
2910 18:01:15.835169 u1DelayCellOfst[8]=2 cells (2 PI)
2911 18:01:15.838044 u1DelayCellOfst[9]=1 cells (1 PI)
2912 18:01:15.841541 u1DelayCellOfst[10]=7 cells (6 PI)
2913 18:01:15.844841 u1DelayCellOfst[11]=9 cells (7 PI)
2914 18:01:15.847938 u1DelayCellOfst[12]=7 cells (6 PI)
2915 18:01:15.851197 u1DelayCellOfst[13]=9 cells (7 PI)
2916 18:01:15.854555 u1DelayCellOfst[14]=9 cells (7 PI)
2917 18:01:15.857733 u1DelayCellOfst[15]=0 cells (0 PI)
2918 18:01:15.861021 Byte1, DQ PI dly=980, DQM PI dly= 983
2919 18:01:15.864309 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2920 18:01:15.864408
2921 18:01:15.870946 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2922 18:01:15.871072
2923 18:01:15.871164 Write Rank0 MR14 =0x20
2924 18:01:15.871249
2925 18:01:15.874350 Final TX Range 0 Vref 32
2926 18:01:15.874466
2927 18:01:15.880820 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2928 18:01:15.880966
2929 18:01:15.887525 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2930 18:01:15.894025 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2931 18:01:15.903840 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2932 18:01:15.904113 Write Rank0 MR3 =0xb0
2933 18:01:15.907226 DramC Write-DBI on
2934 18:01:15.907607 ==
2935 18:01:15.910599 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2936 18:01:15.913870 fsp= 1, odt_onoff= 1, Byte mode= 0
2937 18:01:15.914286 ==
2938 18:01:15.920159 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2939 18:01:15.920575
2940 18:01:15.920902 Begin, DQ Scan Range 703~767
2941 18:01:15.921209
2942 18:01:15.923569
2943 18:01:15.923976 TX Vref Scan disable
2944 18:01:15.926943 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2945 18:01:15.930004 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2946 18:01:15.933389 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2947 18:01:15.936805 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2948 18:01:15.939757 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2949 18:01:15.943111 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2950 18:01:15.949605 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2951 18:01:15.953320 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2952 18:01:15.956237 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2953 18:01:15.959502 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2954 18:01:15.962862 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2955 18:01:15.966114 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2956 18:01:15.969421 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2957 18:01:15.972783 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2958 18:01:15.975918 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2959 18:01:15.979102 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2960 18:01:15.982622 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2961 18:01:15.985833 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2962 18:01:15.989237 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2963 18:01:15.992412 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2964 18:01:15.999097 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2965 18:01:16.002174 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2966 18:01:16.005564 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2967 18:01:16.011954 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2968 18:01:16.015135 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2969 18:01:16.018631 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2970 18:01:16.021813 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2971 18:01:16.025234 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2972 18:01:16.028188 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2973 18:01:16.031428 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2974 18:01:16.034980 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2975 18:01:16.037855 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2976 18:01:16.041543 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2977 18:01:16.044519 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2978 18:01:16.048090 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
2979 18:01:16.051323 Byte0, DQ PI dly=739, DQM PI dly= 739
2980 18:01:16.057547 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
2981 18:01:16.057971
2982 18:01:16.060945 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
2983 18:01:16.061482
2984 18:01:16.064302 Byte1, DQ PI dly=727, DQM PI dly= 727
2985 18:01:16.070768 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
2986 18:01:16.071189
2987 18:01:16.074133 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
2988 18:01:16.074618
2989 18:01:16.080579 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2990 18:01:16.087245 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2991 18:01:16.093889 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2992 18:01:16.097017 Write Rank0 MR3 =0x30
2993 18:01:16.097590 DramC Write-DBI off
2994 18:01:16.098064
2995 18:01:16.100305 [DATLAT]
2996 18:01:16.103573 Freq=1600, CH1 RK0, use_rxtx_scan=0
2997 18:01:16.104136
2998 18:01:16.104618 DATLAT Default: 0xf
2999 18:01:16.106806 7, 0xFFFF, sum=0
3000 18:01:16.107233 8, 0xFFFF, sum=0
3001 18:01:16.109962 9, 0xFFFF, sum=0
3002 18:01:16.110522 10, 0xFFFF, sum=0
3003 18:01:16.113222 11, 0xFFFF, sum=0
3004 18:01:16.113855 12, 0xFFFF, sum=0
3005 18:01:16.116513 13, 0xFFFF, sum=0
3006 18:01:16.117104 14, 0x0, sum=1
3007 18:01:16.119877 15, 0x0, sum=2
3008 18:01:16.120442 16, 0x0, sum=3
3009 18:01:16.120838 17, 0x0, sum=4
3010 18:01:16.126520 pattern=2 first_step=14 total pass=5 best_step=16
3011 18:01:16.127008 ==
3012 18:01:16.129580 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3013 18:01:16.132888 fsp= 1, odt_onoff= 1, Byte mode= 0
3014 18:01:16.133307 ==
3015 18:01:16.139781 Start DQ dly to find pass range UseTestEngine =1
3016 18:01:16.142802 x-axis: bit #, y-axis: DQ dly (-127~63)
3017 18:01:16.143348 RX Vref Scan = 1
3018 18:01:16.251409
3019 18:01:16.251876 RX Vref found, early break!
3020 18:01:16.252211
3021 18:01:16.258011 Final RX Vref 11, apply to both rank0 and 1
3022 18:01:16.258429 ==
3023 18:01:16.260914 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3024 18:01:16.264517 fsp= 1, odt_onoff= 1, Byte mode= 0
3025 18:01:16.265083 ==
3026 18:01:16.267500 DQS Delay:
3027 18:01:16.268062 DQS0 = 0, DQS1 = 0
3028 18:01:16.268411 DQM Delay:
3029 18:01:16.271004 DQM0 = 19, DQM1 = 18
3030 18:01:16.271555 DQ Delay:
3031 18:01:16.273944 DQ0 =20, DQ1 =21, DQ2 =17, DQ3 =15
3032 18:01:16.277346 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3033 18:01:16.280861 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
3034 18:01:16.283851 DQ12 =21, DQ13 =21, DQ14 =20, DQ15 =12
3035 18:01:16.284382
3036 18:01:16.284832
3037 18:01:16.285145
3038 18:01:16.287112 [DramC_TX_OE_Calibration] TA2
3039 18:01:16.290263 Original DQ_B0 (3 6) =30, OEN = 27
3040 18:01:16.293617 Original DQ_B1 (3 6) =30, OEN = 27
3041 18:01:16.297075 23, 0x0, End_B0=23 End_B1=23
3042 18:01:16.300220 24, 0x0, End_B0=24 End_B1=24
3043 18:01:16.300638 25, 0x0, End_B0=25 End_B1=25
3044 18:01:16.303621 26, 0x0, End_B0=26 End_B1=26
3045 18:01:16.306991 27, 0x0, End_B0=27 End_B1=27
3046 18:01:16.310282 28, 0x0, End_B0=28 End_B1=28
3047 18:01:16.313324 29, 0x0, End_B0=29 End_B1=29
3048 18:01:16.313776 30, 0x0, End_B0=30 End_B1=30
3049 18:01:16.316714 31, 0xFFFF, End_B0=30 End_B1=30
3050 18:01:16.323348 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3051 18:01:16.329909 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3052 18:01:16.330325
3053 18:01:16.330742
3054 18:01:16.331059 Write Rank0 MR23 =0x3f
3055 18:01:16.333246 [DQSOSC]
3056 18:01:16.339586 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3057 18:01:16.346212 CH1_RK0: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3058 18:01:16.349355 Write Rank0 MR23 =0x3f
3059 18:01:16.349810 [DQSOSC]
3060 18:01:16.355683 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3061 18:01:16.359121 CH1 RK0: MR19=202, MR18=B6B6
3062 18:01:16.362579 [RankSwap] Rank num 2, (Multi 1), Rank 1
3063 18:01:16.366002 Write Rank0 MR2 =0xad
3064 18:01:16.366419 [Write Leveling]
3065 18:01:16.369268 delay byte0 byte1 byte2 byte3
3066 18:01:16.369733
3067 18:01:16.372276 10 0 0
3068 18:01:16.372701 11 0 0
3069 18:01:16.375717 12 0 0
3070 18:01:16.376139 13 0 0
3071 18:01:16.376476 14 0 0
3072 18:01:16.379124 15 0 0
3073 18:01:16.379589 16 0 0
3074 18:01:16.382199 17 0 0
3075 18:01:16.382621 18 0 0
3076 18:01:16.383010 19 0 0
3077 18:01:16.385520 20 0 0
3078 18:01:16.385959 21 0 0
3079 18:01:16.388910 22 0 0
3080 18:01:16.389333 23 0 0
3081 18:01:16.391789 24 0 0
3082 18:01:16.392280 25 0 0
3083 18:01:16.392786 26 0 ff
3084 18:01:16.395473 27 0 ff
3085 18:01:16.396019 28 0 ff
3086 18:01:16.398721 29 0 ff
3087 18:01:16.399138 30 0 ff
3088 18:01:16.401694 31 0 ff
3089 18:01:16.402145 32 0 ff
3090 18:01:16.404948 33 ff ff
3091 18:01:16.405365 34 ff ff
3092 18:01:16.408098 35 ff ff
3093 18:01:16.408190 36 ff ff
3094 18:01:16.408262 37 ff ff
3095 18:01:16.411433 38 ff ff
3096 18:01:16.411525 39 ff ff
3097 18:01:16.417898 pass bytecount = 0xff (0xff: all bytes pass)
3098 18:01:16.417990
3099 18:01:16.418062 DQS0 dly: 33
3100 18:01:16.418128 DQS1 dly: 26
3101 18:01:16.421334 Write Rank0 MR2 =0x2d
3102 18:01:16.424308 [RankSwap] Rank num 2, (Multi 1), Rank 0
3103 18:01:16.427595 Write Rank1 MR1 =0xd6
3104 18:01:16.427685 [Gating]
3105 18:01:16.427756 ==
3106 18:01:16.434403 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3107 18:01:16.437707 fsp= 1, odt_onoff= 1, Byte mode= 0
3108 18:01:16.437797 ==
3109 18:01:16.440631 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3110 18:01:16.444036 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3111 18:01:16.450563 3 1 8 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3112 18:01:16.453917 3 1 12 |2c2b 2221 |(11 11)(11 11) |(0 0)(0 0)| 0
3113 18:01:16.457279 3 1 16 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
3114 18:01:16.463751 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3115 18:01:16.466863 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3116 18:01:16.470156 3 1 28 |2c2b 2626 |(11 11)(11 11) |(1 0)(1 1)| 0
3117 18:01:16.476812 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3118 18:01:16.479900 3 2 4 |2c2b 2c2c |(11 11)(11 11) |(1 0)(0 1)| 0
3119 18:01:16.483440 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3120 18:01:16.489946 [Byte 1] Lead/lag falling Transition (3, 2, 8)
3121 18:01:16.493160 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3122 18:01:16.496505 3 2 16 |2c2b 3333 |(11 11)(0 0) |(1 0)(1 1)| 0
3123 18:01:16.502689 [Byte 1] Lead/lag falling Transition (3, 2, 16)
3124 18:01:16.506151 3 2 20 |201 3333 |(11 11)(11 11) |(0 0)(0 1)| 0
3125 18:01:16.509453 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3126 18:01:16.516014 3 2 28 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3127 18:01:16.519273 3 3 0 |3534 2323 |(11 11)(1 1) |(0 0)(1 1)| 0
3128 18:01:16.522516 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3129 18:01:16.525793 3 3 8 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3130 18:01:16.532554 3 3 12 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3131 18:01:16.535748 3 3 16 |3534 3c3c |(11 11)(0 0) |(1 1)(1 1)| 0
3132 18:01:16.538678 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3133 18:01:16.545507 3 3 24 |3534 2828 |(11 11)(11 11) |(1 1)(1 1)| 0
3134 18:01:16.548460 [Byte 0] Lead/lag falling Transition (3, 3, 24)
3135 18:01:16.551915 3 3 28 |3534 b0a |(11 11)(11 11) |(0 1)(1 1)| 0
3136 18:01:16.558522 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3137 18:01:16.561608 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3138 18:01:16.564959 [Byte 1] Lead/lag falling Transition (3, 4, 4)
3139 18:01:16.571640 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3140 18:01:16.574758 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3141 18:01:16.578039 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3142 18:01:16.584726 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3143 18:01:16.587933 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3144 18:01:16.591262 3 4 28 |3d3d 1a1a |(11 11)(11 11) |(1 1)(1 1)| 0
3145 18:01:16.597623 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 18:01:16.601012 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 18:01:16.604169 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 18:01:16.610797 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 18:01:16.614001 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 18:01:16.617131 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 18:01:16.623579 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 18:01:16.627141 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 18:01:16.630038 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3154 18:01:16.636803 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3155 18:01:16.640003 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3156 18:01:16.643337 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3157 18:01:16.646796 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3158 18:01:16.653196 [Byte 0] Lead/lag Transition tap number (2)
3159 18:01:16.656586 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3160 18:01:16.659831 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3161 18:01:16.666286 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3162 18:01:16.669826 [Byte 1] Lead/lag Transition tap number (2)
3163 18:01:16.672751 3 6 24 |4646 b0a |(0 0)(11 11) |(0 0)(0 0)| 0
3164 18:01:16.676122 [Byte 0]First pass (3, 6, 24)
3165 18:01:16.679146 3 6 28 |4646 3a3a |(0 0)(11 11) |(0 0)(0 0)| 0
3166 18:01:16.682785 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 18:01:16.685971 [Byte 1]First pass (3, 7, 0)
3168 18:01:16.689087 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 18:01:16.695764 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 18:01:16.699133 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 18:01:16.702123 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 18:01:16.705300 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 18:01:16.711858 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3174 18:01:16.715299 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3175 18:01:16.718796 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3176 18:01:16.721677 All bytes gating window > 1UI, Early break!
3177 18:01:16.721770
3178 18:01:16.725017 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3179 18:01:16.725106
3180 18:01:16.728422 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3181 18:01:16.731811
3182 18:01:16.731901
3183 18:01:16.731971
3184 18:01:16.735084 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3185 18:01:16.735186
3186 18:01:16.738224 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3187 18:01:16.738314
3188 18:01:16.738385
3189 18:01:16.741504 Write Rank1 MR1 =0x56
3190 18:01:16.741608
3191 18:01:16.744791 best RODT dly(2T, 0.5T) = (2, 3)
3192 18:01:16.744881
3193 18:01:16.748303 best RODT dly(2T, 0.5T) = (2, 3)
3194 18:01:16.748393 ==
3195 18:01:16.751365 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3196 18:01:16.754424 fsp= 1, odt_onoff= 1, Byte mode= 0
3197 18:01:16.754514 ==
3198 18:01:16.761180 Start DQ dly to find pass range UseTestEngine =0
3199 18:01:16.764259 x-axis: bit #, y-axis: DQ dly (-127~63)
3200 18:01:16.764352 RX Vref Scan = 0
3201 18:01:16.767750 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3202 18:01:16.771119 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3203 18:01:16.774206 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3204 18:01:16.777534 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3205 18:01:16.780605 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3206 18:01:16.784010 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3207 18:01:16.784103 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3208 18:01:16.787354 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3209 18:01:16.790699 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3210 18:01:16.794078 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3211 18:01:16.796990 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3212 18:01:16.800410 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3213 18:01:16.803738 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3214 18:01:16.806925 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3215 18:01:16.810247 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3216 18:01:16.813697 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3217 18:01:16.813789 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3218 18:01:16.816769 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3219 18:01:16.820198 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3220 18:01:16.823457 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3221 18:01:16.826643 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3222 18:01:16.829980 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3223 18:01:16.833268 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3224 18:01:16.833360 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3225 18:01:16.836329 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3226 18:01:16.839895 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3227 18:01:16.842897 0, [0] xxxoxxxx ooxxxxxo [MSB]
3228 18:01:16.846278 1, [0] xxxoxxxx ooxxxxxo [MSB]
3229 18:01:16.849612 2, [0] xxxoxxxx ooxxxxxo [MSB]
3230 18:01:16.852783 3, [0] xxooxxxo oooxoxxo [MSB]
3231 18:01:16.852911 4, [0] xxoooxxo oooxoxxo [MSB]
3232 18:01:16.856034 5, [0] ooooooxo oooooooo [MSB]
3233 18:01:16.859104 32, [0] oooooooo ooooooox [MSB]
3234 18:01:16.862612 33, [0] oooooooo ooooooox [MSB]
3235 18:01:16.865800 34, [0] oooooooo oxooooox [MSB]
3236 18:01:16.868860 35, [0] ooxxoooo oxooooox [MSB]
3237 18:01:16.872328 36, [0] ooxxoooo xxooooox [MSB]
3238 18:01:16.875702 37, [0] ooxxoooo xxooooox [MSB]
3239 18:01:16.875825 38, [0] ooxxoooo xxooooox [MSB]
3240 18:01:16.878701 39, [0] oxxxooox xxooooox [MSB]
3241 18:01:16.882078 40, [0] oxxxooox xxxxxoox [MSB]
3242 18:01:16.885465 41, [0] xxxxxoxx xxxxxoxx [MSB]
3243 18:01:16.888886 42, [0] xxxxxxxx xxxxxxxx [MSB]
3244 18:01:16.891807 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
3245 18:01:16.895193 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3246 18:01:16.898832 iDelay=42, Bit 2, Center 18 (3 ~ 34) 32
3247 18:01:16.901678 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3248 18:01:16.905336 iDelay=42, Bit 4, Center 22 (4 ~ 40) 37
3249 18:01:16.908394 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3250 18:01:16.911735 iDelay=42, Bit 6, Center 23 (6 ~ 40) 35
3251 18:01:16.918315 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3252 18:01:16.921324 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3253 18:01:16.925160 iDelay=42, Bit 9, Center 15 (-2 ~ 33) 36
3254 18:01:16.928057 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3255 18:01:16.931253 iDelay=42, Bit 11, Center 22 (5 ~ 39) 35
3256 18:01:16.934670 iDelay=42, Bit 12, Center 21 (3 ~ 39) 37
3257 18:01:16.938141 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3258 18:01:16.940976 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3259 18:01:16.944223 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
3260 18:01:16.947750 ==
3261 18:01:16.950810 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3262 18:01:16.954166 fsp= 1, odt_onoff= 1, Byte mode= 0
3263 18:01:16.954256 ==
3264 18:01:16.954327 DQS Delay:
3265 18:01:16.957413 DQS0 = 0, DQS1 = 0
3266 18:01:16.957512 DQM Delay:
3267 18:01:16.960721 DQM0 = 20, DQM1 = 19
3268 18:01:16.960810 DQ Delay:
3269 18:01:16.963965 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3270 18:01:16.967075 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3271 18:01:16.970608 DQ8 =17, DQ9 =15, DQ10 =21, DQ11 =22
3272 18:01:16.973914 DQ12 =21, DQ13 =23, DQ14 =22, DQ15 =13
3273 18:01:16.974004
3274 18:01:16.974076
3275 18:01:16.977228 DramC Write-DBI off
3276 18:01:16.977323 ==
3277 18:01:16.980250 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3278 18:01:16.983511 fsp= 1, odt_onoff= 1, Byte mode= 0
3279 18:01:16.983601 ==
3280 18:01:16.989988 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3281 18:01:16.990078
3282 18:01:16.993271 Begin, DQ Scan Range 922~1178
3283 18:01:16.993361
3284 18:01:16.993439
3285 18:01:16.993508 TX Vref Scan disable
3286 18:01:16.996692 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3287 18:01:16.999763 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3288 18:01:17.003081 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3289 18:01:17.009795 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3290 18:01:17.013118 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3291 18:01:17.016576 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3292 18:01:17.019683 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3293 18:01:17.022866 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3294 18:01:17.026318 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3295 18:01:17.029359 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3296 18:01:17.032611 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3297 18:01:17.035785 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3298 18:01:17.039557 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3299 18:01:17.042537 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3300 18:01:17.045831 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3301 18:01:17.052476 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3302 18:01:17.055476 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3303 18:01:17.058917 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3304 18:01:17.062348 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3305 18:01:17.065345 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3306 18:01:17.068885 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3307 18:01:17.071993 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3308 18:01:17.075424 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3309 18:01:17.078322 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3310 18:01:17.081681 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3311 18:01:17.085098 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3312 18:01:17.088447 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3313 18:01:17.091801 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3314 18:01:17.098213 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3315 18:01:17.101728 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3316 18:01:17.104828 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3317 18:01:17.107880 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3318 18:01:17.111280 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3319 18:01:17.114606 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3320 18:01:17.117448 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3321 18:01:17.120891 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3322 18:01:17.124220 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3323 18:01:17.127253 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3324 18:01:17.130580 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3325 18:01:17.134119 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3326 18:01:17.137413 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3327 18:01:17.143969 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3328 18:01:17.147012 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3329 18:01:17.150511 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3330 18:01:17.153524 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3331 18:01:17.156883 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3332 18:01:17.160145 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3333 18:01:17.163646 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3334 18:01:17.166634 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3335 18:01:17.169980 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3336 18:01:17.173402 972 |3 6 12|[0] xxxxxxxx xoxxxxxo [MSB]
3337 18:01:17.176288 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
3338 18:01:17.179656 974 |3 6 14|[0] xxxxxxxx oooxxxxo [MSB]
3339 18:01:17.182976 975 |3 6 15|[0] xxxxxxxx ooooxxoo [MSB]
3340 18:01:17.186380 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3341 18:01:17.189733 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3342 18:01:17.196093 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3343 18:01:17.199461 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3344 18:01:17.202714 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3345 18:01:17.206087 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
3346 18:01:17.209323 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3347 18:01:17.212706 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3348 18:01:17.215575 992 |3 6 32|[0] oooooooo xxooooox [MSB]
3349 18:01:17.222321 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3350 18:01:17.225370 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3351 18:01:17.228800 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3352 18:01:17.232294 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3353 18:01:17.235636 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3354 18:01:17.238750 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3355 18:01:17.242114 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3356 18:01:17.245362 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3357 18:01:17.248646 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
3358 18:01:17.251856 1002 |3 6 42|[0] xoxxxxxx xxxxxxxx [MSB]
3359 18:01:17.254946 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3360 18:01:17.258219 Byte0, DQ PI dly=990, DQM PI dly= 990
3361 18:01:17.264642 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
3362 18:01:17.264777
3363 18:01:17.268146 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
3364 18:01:17.268240
3365 18:01:17.271258 Byte1, DQ PI dly=982, DQM PI dly= 982
3366 18:01:17.277836 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3367 18:01:17.277928
3368 18:01:17.281044 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3369 18:01:17.281167
3370 18:01:17.281270 ==
3371 18:01:17.287590 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3372 18:01:17.287681 fsp= 1, odt_onoff= 1, Byte mode= 0
3373 18:01:17.290899 ==
3374 18:01:17.294424 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3375 18:01:17.294514
3376 18:01:17.297423 Begin, DQ Scan Range 958~1022
3377 18:01:17.297522 Write Rank1 MR14 =0x0
3378 18:01:17.307182
3379 18:01:17.307275 CH=1, VrefRange= 0, VrefLevel = 0
3380 18:01:17.313983 TX Bit0 (984~1000) 17 992, Bit8 (977~985) 9 981,
3381 18:01:17.317264 TX Bit1 (983~998) 16 990, Bit9 (975~985) 11 980,
3382 18:01:17.323888 TX Bit2 (981~995) 15 988, Bit10 (976~991) 16 983,
3383 18:01:17.326840 TX Bit3 (979~991) 13 985, Bit11 (978~991) 14 984,
3384 18:01:17.330329 TX Bit4 (983~998) 16 990, Bit12 (978~990) 13 984,
3385 18:01:17.337047 TX Bit5 (984~999) 16 991, Bit13 (978~991) 14 984,
3386 18:01:17.340071 TX Bit6 (983~998) 16 990, Bit14 (977~990) 14 983,
3387 18:01:17.346432 TX Bit7 (983~997) 15 990, Bit15 (972~983) 12 977,
3388 18:01:17.346523
3389 18:01:17.346594 Write Rank1 MR14 =0x2
3390 18:01:17.355908
3391 18:01:17.356016 CH=1, VrefRange= 0, VrefLevel = 2
3392 18:01:17.362306 TX Bit0 (984~1000) 17 992, Bit8 (976~987) 12 981,
3393 18:01:17.365460 TX Bit1 (983~999) 17 991, Bit9 (975~986) 12 980,
3394 18:01:17.372148 TX Bit2 (981~997) 17 989, Bit10 (976~992) 17 984,
3395 18:01:17.375444 TX Bit3 (978~992) 15 985, Bit11 (977~992) 16 984,
3396 18:01:17.378696 TX Bit4 (982~999) 18 990, Bit12 (978~990) 13 984,
3397 18:01:17.385046 TX Bit5 (984~1000) 17 992, Bit13 (977~992) 16 984,
3398 18:01:17.388477 TX Bit6 (983~999) 17 991, Bit14 (977~990) 14 983,
3399 18:01:17.395143 TX Bit7 (983~997) 15 990, Bit15 (971~984) 14 977,
3400 18:01:17.395235
3401 18:01:17.395308 Write Rank1 MR14 =0x4
3402 18:01:17.404786
3403 18:01:17.404880 CH=1, VrefRange= 0, VrefLevel = 4
3404 18:01:17.411532 TX Bit0 (984~1001) 18 992, Bit8 (975~987) 13 981,
3405 18:01:17.414596 TX Bit1 (982~999) 18 990, Bit9 (973~987) 15 980,
3406 18:01:17.421153 TX Bit2 (980~997) 18 988, Bit10 (976~992) 17 984,
3407 18:01:17.424503 TX Bit3 (978~992) 15 985, Bit11 (977~992) 16 984,
3408 18:01:17.427881 TX Bit4 (982~999) 18 990, Bit12 (977~991) 15 984,
3409 18:01:17.434241 TX Bit5 (983~1000) 18 991, Bit13 (977~993) 17 985,
3410 18:01:17.437654 TX Bit6 (983~999) 17 991, Bit14 (977~991) 15 984,
3411 18:01:17.443965 TX Bit7 (983~998) 16 990, Bit15 (971~985) 15 978,
3412 18:01:17.444061
3413 18:01:17.444138 Write Rank1 MR14 =0x6
3414 18:01:17.453675
3415 18:01:17.453765 CH=1, VrefRange= 0, VrefLevel = 6
3416 18:01:17.460394 TX Bit0 (983~1001) 19 992, Bit8 (975~988) 14 981,
3417 18:01:17.463624 TX Bit1 (983~999) 17 991, Bit9 (973~987) 15 980,
3418 18:01:17.470467 TX Bit2 (980~998) 19 989, Bit10 (975~993) 19 984,
3419 18:01:17.473300 TX Bit3 (977~994) 18 985, Bit11 (977~993) 17 985,
3420 18:01:17.476670 TX Bit4 (981~1000) 20 990, Bit12 (977~991) 15 984,
3421 18:01:17.483190 TX Bit5 (983~1001) 19 992, Bit13 (977~993) 17 985,
3422 18:01:17.486391 TX Bit6 (982~999) 18 990, Bit14 (976~991) 16 983,
3423 18:01:17.493148 TX Bit7 (983~999) 17 991, Bit15 (970~985) 16 977,
3424 18:01:17.493239
3425 18:01:17.493341 Write Rank1 MR14 =0x8
3426 18:01:17.502667
3427 18:01:17.506058 CH=1, VrefRange= 0, VrefLevel = 8
3428 18:01:17.509364 TX Bit0 (983~1001) 19 992, Bit8 (974~989) 16 981,
3429 18:01:17.512522 TX Bit1 (982~1000) 19 991, Bit9 (973~988) 16 980,
3430 18:01:17.519095 TX Bit2 (979~998) 20 988, Bit10 (975~993) 19 984,
3431 18:01:17.522656 TX Bit3 (978~995) 18 986, Bit11 (976~993) 18 984,
3432 18:01:17.528861 TX Bit4 (981~1000) 20 990, Bit12 (977~991) 15 984,
3433 18:01:17.532341 TX Bit5 (983~1001) 19 992, Bit13 (977~993) 17 985,
3434 18:01:17.535465 TX Bit6 (982~1000) 19 991, Bit14 (976~992) 17 984,
3435 18:01:17.542120 TX Bit7 (982~999) 18 990, Bit15 (970~986) 17 978,
3436 18:01:17.542212
3437 18:01:17.542283 Write Rank1 MR14 =0xa
3438 18:01:17.552172
3439 18:01:17.555401 CH=1, VrefRange= 0, VrefLevel = 10
3440 18:01:17.558645 TX Bit0 (983~1002) 20 992, Bit8 (975~990) 16 982,
3441 18:01:17.561907 TX Bit1 (982~1001) 20 991, Bit9 (972~989) 18 980,
3442 18:01:17.568453 TX Bit2 (979~998) 20 988, Bit10 (975~994) 20 984,
3443 18:01:17.571763 TX Bit3 (977~995) 19 986, Bit11 (976~994) 19 985,
3444 18:01:17.578522 TX Bit4 (981~1001) 21 991, Bit12 (976~992) 17 984,
3445 18:01:17.581803 TX Bit5 (983~1001) 19 992, Bit13 (976~994) 19 985,
3446 18:01:17.584944 TX Bit6 (982~1001) 20 991, Bit14 (976~992) 17 984,
3447 18:01:17.591373 TX Bit7 (982~999) 18 990, Bit15 (970~987) 18 978,
3448 18:01:17.591466
3449 18:01:17.591538 Write Rank1 MR14 =0xc
3450 18:01:17.601849
3451 18:01:17.604819 CH=1, VrefRange= 0, VrefLevel = 12
3452 18:01:17.608223 TX Bit0 (983~1002) 20 992, Bit8 (973~990) 18 981,
3453 18:01:17.611273 TX Bit1 (981~1001) 21 991, Bit9 (972~990) 19 981,
3454 18:01:17.618074 TX Bit2 (978~999) 22 988, Bit10 (975~995) 21 985,
3455 18:01:17.621427 TX Bit3 (977~996) 20 986, Bit11 (976~995) 20 985,
3456 18:01:17.627796 TX Bit4 (980~1001) 22 990, Bit12 (977~992) 16 984,
3457 18:01:17.631262 TX Bit5 (982~1002) 21 992, Bit13 (976~994) 19 985,
3458 18:01:17.634336 TX Bit6 (981~1001) 21 991, Bit14 (976~993) 18 984,
3459 18:01:17.640684 TX Bit7 (981~1000) 20 990, Bit15 (970~988) 19 979,
3460 18:01:17.640800
3461 18:01:17.640873 Write Rank1 MR14 =0xe
3462 18:01:17.651321
3463 18:01:17.654979 CH=1, VrefRange= 0, VrefLevel = 14
3464 18:01:17.658079 TX Bit0 (982~1003) 22 992, Bit8 (973~991) 19 982,
3465 18:01:17.661105 TX Bit1 (981~1001) 21 991, Bit9 (972~990) 19 981,
3466 18:01:17.667757 TX Bit2 (978~999) 22 988, Bit10 (974~995) 22 984,
3467 18:01:17.671225 TX Bit3 (977~997) 21 987, Bit11 (975~995) 21 985,
3468 18:01:17.677657 TX Bit4 (980~1001) 22 990, Bit12 (976~993) 18 984,
3469 18:01:17.680743 TX Bit5 (982~1003) 22 992, Bit13 (976~995) 20 985,
3470 18:01:17.684200 TX Bit6 (981~1001) 21 991, Bit14 (975~993) 19 984,
3471 18:01:17.690744 TX Bit7 (981~1000) 20 990, Bit15 (969~988) 20 978,
3472 18:01:17.690836
3473 18:01:17.690907 Write Rank1 MR14 =0x10
3474 18:01:17.701110
3475 18:01:17.704425 CH=1, VrefRange= 0, VrefLevel = 16
3476 18:01:17.707805 TX Bit0 (982~1003) 22 992, Bit8 (972~991) 20 981,
3477 18:01:17.711199 TX Bit1 (981~1001) 21 991, Bit9 (971~991) 21 981,
3478 18:01:17.717639 TX Bit2 (978~1000) 23 989, Bit10 (974~996) 23 985,
3479 18:01:17.721166 TX Bit3 (977~997) 21 987, Bit11 (975~996) 22 985,
3480 18:01:17.727451 TX Bit4 (979~1001) 23 990, Bit12 (975~993) 19 984,
3481 18:01:17.730505 TX Bit5 (982~1003) 22 992, Bit13 (976~996) 21 986,
3482 18:01:17.733862 TX Bit6 (980~1002) 23 991, Bit14 (975~994) 20 984,
3483 18:01:17.740361 TX Bit7 (981~1001) 21 991, Bit15 (970~989) 20 979,
3484 18:01:17.740454
3485 18:01:17.740526 Write Rank1 MR14 =0x12
3486 18:01:17.751165
3487 18:01:17.754212 CH=1, VrefRange= 0, VrefLevel = 18
3488 18:01:17.757549 TX Bit0 (982~1003) 22 992, Bit8 (972~991) 20 981,
3489 18:01:17.760759 TX Bit1 (980~1002) 23 991, Bit9 (971~991) 21 981,
3490 18:01:17.767139 TX Bit2 (978~1000) 23 989, Bit10 (974~996) 23 985,
3491 18:01:17.770538 TX Bit3 (976~998) 23 987, Bit11 (975~996) 22 985,
3492 18:01:17.777159 TX Bit4 (979~1002) 24 990, Bit12 (976~994) 19 985,
3493 18:01:17.780725 TX Bit5 (982~1003) 22 992, Bit13 (976~996) 21 986,
3494 18:01:17.783694 TX Bit6 (980~1002) 23 991, Bit14 (975~994) 20 984,
3495 18:01:17.790048 TX Bit7 (980~1001) 22 990, Bit15 (969~989) 21 979,
3496 18:01:17.790140
3497 18:01:17.793555 Write Rank1 MR14 =0x14
3498 18:01:17.801211
3499 18:01:17.804490 CH=1, VrefRange= 0, VrefLevel = 20
3500 18:01:17.807437 TX Bit0 (981~1004) 24 992, Bit8 (972~992) 21 982,
3501 18:01:17.810678 TX Bit1 (979~1003) 25 991, Bit9 (971~991) 21 981,
3502 18:01:17.817156 TX Bit2 (978~1001) 24 989, Bit10 (973~997) 25 985,
3503 18:01:17.820687 TX Bit3 (977~998) 22 987, Bit11 (975~998) 24 986,
3504 18:01:17.827076 TX Bit4 (979~1002) 24 990, Bit12 (975~994) 20 984,
3505 18:01:17.830389 TX Bit5 (981~1004) 24 992, Bit13 (975~997) 23 986,
3506 18:01:17.833795 TX Bit6 (979~1002) 24 990, Bit14 (975~995) 21 985,
3507 18:01:17.840209 TX Bit7 (980~1002) 23 991, Bit15 (969~990) 22 979,
3508 18:01:17.840334
3509 18:01:17.840443 Write Rank1 MR14 =0x16
3510 18:01:17.851058
3511 18:01:17.854461 CH=1, VrefRange= 0, VrefLevel = 22
3512 18:01:17.857780 TX Bit0 (981~1005) 25 993, Bit8 (971~992) 22 981,
3513 18:01:17.861180 TX Bit1 (980~1003) 24 991, Bit9 (970~991) 22 980,
3514 18:01:17.867379 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
3515 18:01:17.870723 TX Bit3 (976~998) 23 987, Bit11 (974~998) 25 986,
3516 18:01:17.877508 TX Bit4 (978~1003) 26 990, Bit12 (975~995) 21 985,
3517 18:01:17.880648 TX Bit5 (980~1004) 25 992, Bit13 (975~998) 24 986,
3518 18:01:17.883750 TX Bit6 (979~1003) 25 991, Bit14 (974~995) 22 984,
3519 18:01:17.890258 TX Bit7 (979~1003) 25 991, Bit15 (969~990) 22 979,
3520 18:01:17.890354
3521 18:01:17.893614 Write Rank1 MR14 =0x18
3522 18:01:17.901378
3523 18:01:17.904752 CH=1, VrefRange= 0, VrefLevel = 24
3524 18:01:17.908033 TX Bit0 (981~1005) 25 993, Bit8 (971~992) 22 981,
3525 18:01:17.911397 TX Bit1 (979~1004) 26 991, Bit9 (970~992) 23 981,
3526 18:01:17.917897 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
3527 18:01:17.920884 TX Bit3 (976~999) 24 987, Bit11 (974~998) 25 986,
3528 18:01:17.927818 TX Bit4 (978~1003) 26 990, Bit12 (974~995) 22 984,
3529 18:01:17.930667 TX Bit5 (980~1004) 25 992, Bit13 (975~998) 24 986,
3530 18:01:17.934133 TX Bit6 (979~1004) 26 991, Bit14 (974~996) 23 985,
3531 18:01:17.940880 TX Bit7 (979~1002) 24 990, Bit15 (969~991) 23 980,
3532 18:01:17.940973
3533 18:01:17.941045 Write Rank1 MR14 =0x1a
3534 18:01:17.951621
3535 18:01:17.955006 CH=1, VrefRange= 0, VrefLevel = 26
3536 18:01:17.958411 TX Bit0 (980~1006) 27 993, Bit8 (971~992) 22 981,
3537 18:01:17.961349 TX Bit1 (978~1004) 27 991, Bit9 (970~992) 23 981,
3538 18:01:17.968026 TX Bit2 (977~1002) 26 989, Bit10 (972~998) 27 985,
3539 18:01:17.971443 TX Bit3 (976~999) 24 987, Bit11 (974~999) 26 986,
3540 18:01:17.977944 TX Bit4 (978~1003) 26 990, Bit12 (974~996) 23 985,
3541 18:01:17.980866 TX Bit5 (980~1005) 26 992, Bit13 (974~998) 25 986,
3542 18:01:17.984463 TX Bit6 (979~1004) 26 991, Bit14 (973~997) 25 985,
3543 18:01:17.990990 TX Bit7 (979~1003) 25 991, Bit15 (968~991) 24 979,
3544 18:01:17.991127
3545 18:01:17.994361 Write Rank1 MR14 =0x1c
3546 18:01:18.002183
3547 18:01:18.005602 CH=1, VrefRange= 0, VrefLevel = 28
3548 18:01:18.008904 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3549 18:01:18.011805 TX Bit1 (978~1005) 28 991, Bit9 (970~993) 24 981,
3550 18:01:18.018769 TX Bit2 (977~1003) 27 990, Bit10 (972~997) 26 984,
3551 18:01:18.021788 TX Bit3 (975~999) 25 987, Bit11 (973~999) 27 986,
3552 18:01:18.028135 TX Bit4 (978~1005) 28 991, Bit12 (973~997) 25 985,
3553 18:01:18.031716 TX Bit5 (979~1006) 28 992, Bit13 (974~999) 26 986,
3554 18:01:18.034827 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
3555 18:01:18.041572 TX Bit7 (979~1004) 26 991, Bit15 (968~991) 24 979,
3556 18:01:18.041663
3557 18:01:18.041733 Write Rank1 MR14 =0x1e
3558 18:01:18.052691
3559 18:01:18.055801 CH=1, VrefRange= 0, VrefLevel = 30
3560 18:01:18.059078 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3561 18:01:18.062089 TX Bit1 (978~1005) 28 991, Bit9 (970~993) 24 981,
3562 18:01:18.068625 TX Bit2 (977~1003) 27 990, Bit10 (972~997) 26 984,
3563 18:01:18.072044 TX Bit3 (975~999) 25 987, Bit11 (973~999) 27 986,
3564 18:01:18.078513 TX Bit4 (978~1005) 28 991, Bit12 (973~997) 25 985,
3565 18:01:18.081910 TX Bit5 (979~1006) 28 992, Bit13 (974~999) 26 986,
3566 18:01:18.085019 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
3567 18:01:18.091859 TX Bit7 (979~1004) 26 991, Bit15 (968~991) 24 979,
3568 18:01:18.091951
3569 18:01:18.094782 Write Rank1 MR14 =0x20
3570 18:01:18.103032
3571 18:01:18.106031 CH=1, VrefRange= 0, VrefLevel = 32
3572 18:01:18.109091 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3573 18:01:18.112401 TX Bit1 (978~1005) 28 991, Bit9 (970~993) 24 981,
3574 18:01:18.119104 TX Bit2 (977~1003) 27 990, Bit10 (972~997) 26 984,
3575 18:01:18.122246 TX Bit3 (975~999) 25 987, Bit11 (973~999) 27 986,
3576 18:01:18.128819 TX Bit4 (978~1005) 28 991, Bit12 (973~997) 25 985,
3577 18:01:18.132168 TX Bit5 (979~1006) 28 992, Bit13 (974~999) 26 986,
3578 18:01:18.135768 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
3579 18:01:18.142181 TX Bit7 (979~1004) 26 991, Bit15 (968~991) 24 979,
3580 18:01:18.142282
3581 18:01:18.142386 Write Rank1 MR14 =0x22
3582 18:01:18.153157
3583 18:01:18.156496 CH=1, VrefRange= 0, VrefLevel = 34
3584 18:01:18.159915 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3585 18:01:18.163014 TX Bit1 (978~1005) 28 991, Bit9 (970~993) 24 981,
3586 18:01:18.169502 TX Bit2 (977~1003) 27 990, Bit10 (972~997) 26 984,
3587 18:01:18.173021 TX Bit3 (975~999) 25 987, Bit11 (973~999) 27 986,
3588 18:01:18.179356 TX Bit4 (978~1005) 28 991, Bit12 (973~997) 25 985,
3589 18:01:18.182734 TX Bit5 (979~1006) 28 992, Bit13 (974~999) 26 986,
3590 18:01:18.185880 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
3591 18:01:18.192617 TX Bit7 (979~1004) 26 991, Bit15 (968~991) 24 979,
3592 18:01:18.192709
3593 18:01:18.192780 Write Rank1 MR14 =0x24
3594 18:01:18.203564
3595 18:01:18.206875 CH=1, VrefRange= 0, VrefLevel = 36
3596 18:01:18.209914 TX Bit0 (980~1006) 27 993, Bit8 (970~993) 24 981,
3597 18:01:18.213301 TX Bit1 (978~1005) 28 991, Bit9 (970~993) 24 981,
3598 18:01:18.220020 TX Bit2 (977~1003) 27 990, Bit10 (972~997) 26 984,
3599 18:01:18.223249 TX Bit3 (975~999) 25 987, Bit11 (973~999) 27 986,
3600 18:01:18.229667 TX Bit4 (978~1005) 28 991, Bit12 (973~997) 25 985,
3601 18:01:18.232932 TX Bit5 (979~1006) 28 992, Bit13 (974~999) 26 986,
3602 18:01:18.236332 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
3603 18:01:18.242859 TX Bit7 (979~1004) 26 991, Bit15 (968~991) 24 979,
3604 18:01:18.243008
3605 18:01:18.243123
3606 18:01:18.246185 TX Vref found, early break! 387< 397
3607 18:01:18.249266 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3608 18:01:18.252865 u1DelayCellOfst[0]=7 cells (6 PI)
3609 18:01:18.256247 u1DelayCellOfst[1]=5 cells (4 PI)
3610 18:01:18.259202 u1DelayCellOfst[2]=3 cells (3 PI)
3611 18:01:18.262703 u1DelayCellOfst[3]=0 cells (0 PI)
3612 18:01:18.266041 u1DelayCellOfst[4]=5 cells (4 PI)
3613 18:01:18.269133 u1DelayCellOfst[5]=6 cells (5 PI)
3614 18:01:18.272567 u1DelayCellOfst[6]=5 cells (4 PI)
3615 18:01:18.275662 u1DelayCellOfst[7]=5 cells (4 PI)
3616 18:01:18.279257 Byte0, DQ PI dly=987, DQM PI dly= 990
3617 18:01:18.282235 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3618 18:01:18.282651
3619 18:01:18.285825 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3620 18:01:18.289096
3621 18:01:18.289544 u1DelayCellOfst[8]=2 cells (2 PI)
3622 18:01:18.292405 u1DelayCellOfst[9]=2 cells (2 PI)
3623 18:01:18.295602 u1DelayCellOfst[10]=6 cells (5 PI)
3624 18:01:18.298670 u1DelayCellOfst[11]=9 cells (7 PI)
3625 18:01:18.302170 u1DelayCellOfst[12]=7 cells (6 PI)
3626 18:01:18.305257 u1DelayCellOfst[13]=9 cells (7 PI)
3627 18:01:18.308569 u1DelayCellOfst[14]=7 cells (6 PI)
3628 18:01:18.311819 u1DelayCellOfst[15]=0 cells (0 PI)
3629 18:01:18.315074 Byte1, DQ PI dly=979, DQM PI dly= 982
3630 18:01:18.318317 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3631 18:01:18.318868
3632 18:01:18.325003 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3633 18:01:18.325565
3634 18:01:18.326012 Write Rank1 MR14 =0x1c
3635 18:01:18.328014
3636 18:01:18.328546 Final TX Range 0 Vref 28
3637 18:01:18.329059
3638 18:01:18.334533 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3639 18:01:18.334951
3640 18:01:18.341306 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3641 18:01:18.347611 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3642 18:01:18.357576 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3643 18:01:18.358094 Write Rank1 MR3 =0xb0
3644 18:01:18.360881 DramC Write-DBI on
3645 18:01:18.361355 ==
3646 18:01:18.363991 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3647 18:01:18.367547 fsp= 1, odt_onoff= 1, Byte mode= 0
3648 18:01:18.367968 ==
3649 18:01:18.374117 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3650 18:01:18.374541
3651 18:01:18.374869 Begin, DQ Scan Range 702~766
3652 18:01:18.377071
3653 18:01:18.377525
3654 18:01:18.377863 TX Vref Scan disable
3655 18:01:18.380412 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3656 18:01:18.383752 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3657 18:01:18.387235 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3658 18:01:18.390490 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3659 18:01:18.393877 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3660 18:01:18.400496 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3661 18:01:18.403625 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3662 18:01:18.406885 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3663 18:01:18.410200 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3664 18:01:18.413537 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3665 18:01:18.416551 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3666 18:01:18.420012 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3667 18:01:18.423125 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3668 18:01:18.426510 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3669 18:01:18.429513 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3670 18:01:18.433104 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3671 18:01:18.436427 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3672 18:01:18.439715 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3673 18:01:18.443275 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3674 18:01:18.446033 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3675 18:01:18.455630 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3676 18:01:18.458751 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3677 18:01:18.461896 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3678 18:01:18.464966 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3679 18:01:18.468513 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3680 18:01:18.471617 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3681 18:01:18.475104 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3682 18:01:18.478520 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3683 18:01:18.481893 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3684 18:01:18.484872 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3685 18:01:18.488214 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3686 18:01:18.491634 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3687 18:01:18.494614 Byte0, DQ PI dly=736, DQM PI dly= 736
3688 18:01:18.501493 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3689 18:01:18.501909
3690 18:01:18.504810 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3691 18:01:18.505221
3692 18:01:18.507883 Byte1, DQ PI dly=726, DQM PI dly= 726
3693 18:01:18.514333 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
3694 18:01:18.514944
3695 18:01:18.517472 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
3696 18:01:18.517894
3697 18:01:18.524119 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3698 18:01:18.530581 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3699 18:01:18.537061 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3700 18:01:18.540516 Write Rank1 MR3 =0x30
3701 18:01:18.540921 DramC Write-DBI off
3702 18:01:18.541287
3703 18:01:18.543513 [DATLAT]
3704 18:01:18.546920 Freq=1600, CH1 RK1, use_rxtx_scan=0
3705 18:01:18.547316
3706 18:01:18.547627 DATLAT Default: 0x10
3707 18:01:18.550287 7, 0xFFFF, sum=0
3708 18:01:18.550682 8, 0xFFFF, sum=0
3709 18:01:18.553318 9, 0xFFFF, sum=0
3710 18:01:18.553883 10, 0xFFFF, sum=0
3711 18:01:18.556769 11, 0xFFFF, sum=0
3712 18:01:18.557299 12, 0xFFFF, sum=0
3713 18:01:18.559891 13, 0xFFFF, sum=0
3714 18:01:18.560351 14, 0x0, sum=1
3715 18:01:18.563284 15, 0x0, sum=2
3716 18:01:18.563732 16, 0x0, sum=3
3717 18:01:18.564281 17, 0x0, sum=4
3718 18:01:18.570055 pattern=2 first_step=14 total pass=5 best_step=16
3719 18:01:18.570481 ==
3720 18:01:18.573082 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3721 18:01:18.576250 fsp= 1, odt_onoff= 1, Byte mode= 0
3722 18:01:18.576755 ==
3723 18:01:18.583112 Start DQ dly to find pass range UseTestEngine =1
3724 18:01:18.586049 x-axis: bit #, y-axis: DQ dly (-127~63)
3725 18:01:18.586466 RX Vref Scan = 0
3726 18:01:18.589358 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3727 18:01:18.592825 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3728 18:01:18.596019 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3729 18:01:18.599190 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3730 18:01:18.602595 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3731 18:01:18.605962 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3732 18:01:18.609386 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3733 18:01:18.609857 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3734 18:01:18.612337 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3735 18:01:18.615867 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3736 18:01:18.618984 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3737 18:01:18.622360 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3738 18:01:18.625870 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3739 18:01:18.628636 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3740 18:01:18.632009 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3741 18:01:18.635297 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3742 18:01:18.638567 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3743 18:01:18.639003 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3744 18:01:18.641853 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3745 18:01:18.645284 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3746 18:01:18.648449 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3747 18:01:18.651918 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3748 18:01:18.654973 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3749 18:01:18.658321 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3750 18:01:18.658763 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3751 18:01:18.661854 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3752 18:01:18.664770 0, [0] xxxoxxxx ooxxxxxo [MSB]
3753 18:01:18.667951 1, [0] xxxoxxxx ooxxxxxo [MSB]
3754 18:01:18.671272 2, [0] xxxoxxxx ooxxxxxo [MSB]
3755 18:01:18.674565 3, [0] xxooxxxo oooxoxxo [MSB]
3756 18:01:18.677793 4, [0] ooooxxxo oooooooo [MSB]
3757 18:01:18.678215 5, [0] oooooxxo oooooooo [MSB]
3758 18:01:18.683250 32, [0] oooooooo ooooooox [MSB]
3759 18:01:18.686538 33, [0] oooooooo ooooooox [MSB]
3760 18:01:18.689813 34, [0] oooxoooo oxooooox [MSB]
3761 18:01:18.692977 35, [0] ooxxoooo xxooooox [MSB]
3762 18:01:18.696079 36, [0] ooxxoooo xxooooox [MSB]
3763 18:01:18.699648 37, [0] ooxxoooo xxooooox [MSB]
3764 18:01:18.702629 38, [0] ooxxooox xxooooox [MSB]
3765 18:01:18.703049 39, [0] oxxxooox xxxxxoox [MSB]
3766 18:01:18.705936 40, [0] oxxxxoox xxxxxoox [MSB]
3767 18:01:18.709341 41, [0] xxxxxxxx xxxxxxxx [MSB]
3768 18:01:18.712624 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3769 18:01:18.715655 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3770 18:01:18.719174 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3771 18:01:18.725512 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3772 18:01:18.728844 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
3773 18:01:18.732397 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3774 18:01:18.735551 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3775 18:01:18.739003 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3776 18:01:18.741810 iDelay=41, Bit 8, Center 16 (-1 ~ 34) 36
3777 18:01:18.745161 iDelay=41, Bit 9, Center 15 (-2 ~ 33) 36
3778 18:01:18.748376 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3779 18:01:18.751928 iDelay=41, Bit 11, Center 21 (4 ~ 38) 35
3780 18:01:18.755147 iDelay=41, Bit 12, Center 20 (3 ~ 38) 36
3781 18:01:18.758245 iDelay=41, Bit 13, Center 22 (4 ~ 40) 37
3782 18:01:18.765152 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3783 18:01:18.768054 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3784 18:01:18.768449 ==
3785 18:01:18.771455 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3786 18:01:18.774828 fsp= 1, odt_onoff= 1, Byte mode= 0
3787 18:01:18.775199 ==
3788 18:01:18.777847 DQS Delay:
3789 18:01:18.778222 DQS0 = 0, DQS1 = 0
3790 18:01:18.781334 DQM Delay:
3791 18:01:18.781844 DQM0 = 20, DQM1 = 18
3792 18:01:18.782383 DQ Delay:
3793 18:01:18.784661 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3794 18:01:18.787937 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3795 18:01:18.791189 DQ8 =16, DQ9 =15, DQ10 =20, DQ11 =21
3796 18:01:18.794297 DQ12 =20, DQ13 =22, DQ14 =22, DQ15 =13
3797 18:01:18.794853
3798 18:01:18.795343
3799 18:01:18.795876
3800 18:01:18.798007 [DramC_TX_OE_Calibration] TA2
3801 18:01:18.800993 Original DQ_B0 (3 6) =30, OEN = 27
3802 18:01:18.804239 Original DQ_B1 (3 6) =30, OEN = 27
3803 18:01:18.807496 23, 0x0, End_B0=23 End_B1=23
3804 18:01:18.810676 24, 0x0, End_B0=24 End_B1=24
3805 18:01:18.814123 25, 0x0, End_B0=25 End_B1=25
3806 18:01:18.814624 26, 0x0, End_B0=26 End_B1=26
3807 18:01:18.817541 27, 0x0, End_B0=27 End_B1=27
3808 18:01:18.820604 28, 0x0, End_B0=28 End_B1=28
3809 18:01:18.824046 29, 0x0, End_B0=29 End_B1=29
3810 18:01:18.827202 30, 0x0, End_B0=30 End_B1=30
3811 18:01:18.827665 31, 0xFFFF, End_B0=30 End_B1=30
3812 18:01:18.833683 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3813 18:01:18.840053 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3814 18:01:18.840481
3815 18:01:18.840853
3816 18:01:18.841160 Write Rank1 MR23 =0x3f
3817 18:01:18.843593 [DQSOSC]
3818 18:01:18.849961 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3819 18:01:18.856749 CH1_RK1: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3820 18:01:18.860010 Write Rank1 MR23 =0x3f
3821 18:01:18.860430 [DQSOSC]
3822 18:01:18.866344 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3823 18:01:18.869519 CH1 RK1: MR19=202, MR18=B7B7
3824 18:01:18.872820 [RxdqsGatingPostProcess] freq 1600
3825 18:01:18.879038 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3826 18:01:18.879266 Rank: 0
3827 18:01:18.882199 best DQS0 dly(2T, 0.5T) = (2, 6)
3828 18:01:18.885391 best DQS1 dly(2T, 0.5T) = (2, 6)
3829 18:01:18.888732 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3830 18:01:18.892214 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3831 18:01:18.892357 Rank: 1
3832 18:01:18.895429 best DQS0 dly(2T, 0.5T) = (2, 6)
3833 18:01:18.898907 best DQS1 dly(2T, 0.5T) = (2, 6)
3834 18:01:18.901768 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3835 18:01:18.905197 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3836 18:01:18.908705 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3837 18:01:18.911566 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3838 18:01:18.918213 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3839 18:01:18.918323
3840 18:01:18.918395
3841 18:01:18.921623 [Calibration Summary] Freqency 1600
3842 18:01:18.921715 CH 0, Rank 0
3843 18:01:18.924609 All Pass.
3844 18:01:18.924701
3845 18:01:18.924773 CH 0, Rank 1
3846 18:01:18.924841 All Pass.
3847 18:01:18.924906
3848 18:01:18.927957 CH 1, Rank 0
3849 18:01:18.928048 All Pass.
3850 18:01:18.928120
3851 18:01:18.928188 CH 1, Rank 1
3852 18:01:18.931374 All Pass.
3853 18:01:18.931465
3854 18:01:18.938056 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3855 18:01:18.944442 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3856 18:01:18.950810 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3857 18:01:18.954299 Write Rank0 MR3 =0xb0
3858 18:01:18.960708 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3859 18:01:18.967561 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3860 18:01:18.973740 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3861 18:01:18.976927 Write Rank1 MR3 =0xb0
3862 18:01:18.980443 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3863 18:01:18.990014 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3864 18:01:18.996753 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3865 18:01:18.996847 Write Rank0 MR3 =0xb0
3866 18:01:19.003221 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3867 18:01:19.013004 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3868 18:01:19.019626 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3869 18:01:19.019721 Write Rank1 MR3 =0xb0
3870 18:01:19.022871 DramC Write-DBI on
3871 18:01:19.026249 [GetDramInforAfterCalByMRR] Vendor 6.
3872 18:01:19.029209 [GetDramInforAfterCalByMRR] Revision 505.
3873 18:01:19.029304 MR8 1111
3874 18:01:19.035736 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3875 18:01:19.035879 MR8 1111
3876 18:01:19.039282 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3877 18:01:19.042477 MR8 1111
3878 18:01:19.045719 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3879 18:01:19.045816 MR8 1111
3880 18:01:19.052542 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3881 18:01:19.062248 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3882 18:01:19.062362 Write Rank0 MR13 =0xd0
3883 18:01:19.065335 Write Rank1 MR13 =0xd0
3884 18:01:19.068829 Write Rank0 MR13 =0xd0
3885 18:01:19.068921 Write Rank1 MR13 =0xd0
3886 18:01:19.072251 Save calibration result to emmc
3887 18:01:19.072347
3888 18:01:19.072419
3889 18:01:19.075412 [DramcModeReg_Check] Freq_1600, FSP_1
3890 18:01:19.078384 FSP_1, CH_0, RK0
3891 18:01:19.078476 Write Rank0 MR13 =0xd8
3892 18:01:19.081838 MR12 = 0x5c (global = 0x5c) match
3893 18:01:19.085031 MR14 = 0x1e (global = 0x1e) match
3894 18:01:19.088373 FSP_1, CH_0, RK1
3895 18:01:19.088465 Write Rank1 MR13 =0xd8
3896 18:01:19.092298 MR12 = 0x5e (global = 0x5e) match
3897 18:01:19.094889 MR14 = 0x1c (global = 0x1c) match
3898 18:01:19.098245 FSP_1, CH_1, RK0
3899 18:01:19.098359 Write Rank0 MR13 =0xd8
3900 18:01:19.101562 MR12 = 0x60 (global = 0x60) match
3901 18:01:19.104701 MR14 = 0x20 (global = 0x20) match
3902 18:01:19.108097 FSP_1, CH_1, RK1
3903 18:01:19.108189 Write Rank1 MR13 =0xd8
3904 18:01:19.111555 MR12 = 0x5c (global = 0x5c) match
3905 18:01:19.114527 MR14 = 0x1c (global = 0x1c) match
3906 18:01:19.114619
3907 18:01:19.120914 [MEM_TEST] 02: After DFS, before run time config
3908 18:01:19.130907 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3909 18:01:19.131000
3910 18:01:19.131072 [TA2_TEST]
3911 18:01:19.131139 === TA2 HW
3912 18:01:19.134515 TA2 PAT: XTALK
3913 18:01:19.137449 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3914 18:01:19.144277 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3915 18:01:19.147299 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3916 18:01:19.153936 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3917 18:01:19.154028
3918 18:01:19.154099
3919 18:01:19.154166 Settings after calibration
3920 18:01:19.156982
3921 18:01:19.157072 [DramcRunTimeConfig]
3922 18:01:19.160327 TransferPLLToSPMControl - MODE SW PHYPLL
3923 18:01:19.163808 TX_TRACKING: ON
3924 18:01:19.163899 RX_TRACKING: ON
3925 18:01:19.163971 HW_GATING: ON
3926 18:01:19.167219 HW_GATING DBG: OFF
3927 18:01:19.167315 ddr_geometry:1
3928 18:01:19.170301 ddr_geometry:1
3929 18:01:19.170428 ddr_geometry:1
3930 18:01:19.173774 ddr_geometry:1
3931 18:01:19.173870 ddr_geometry:1
3932 18:01:19.176665 ddr_geometry:1
3933 18:01:19.176756 ddr_geometry:1
3934 18:01:19.176827 ddr_geometry:1
3935 18:01:19.180049 High Freq DUMMY_READ_FOR_TRACKING: ON
3936 18:01:19.183139 ZQCS_ENABLE_LP4: OFF
3937 18:01:19.186447 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3938 18:01:19.190092 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3939 18:01:19.193012 SPM_CONTROL_AFTERK: ON
3940 18:01:19.193103 IMPEDANCE_TRACKING: ON
3941 18:01:19.196645 TEMP_SENSOR: ON
3942 18:01:19.196736 PER_BANK_REFRESH: ON
3943 18:01:19.199639 HW_SAVE_FOR_SR: ON
3944 18:01:19.202891 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3945 18:01:19.206223 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3946 18:01:19.209628 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3947 18:01:19.209718 Read ODT Tracking: ON
3948 18:01:19.212859 =========================
3949 18:01:19.212950
3950 18:01:19.216191 [TA2_TEST]
3951 18:01:19.216281 === TA2 HW
3952 18:01:19.219423 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3953 18:01:19.225755 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3954 18:01:19.229346 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3955 18:01:19.235646 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3956 18:01:19.235738
3957 18:01:19.238721 [MEM_TEST] 03: After run time config
3958 18:01:19.248966 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3959 18:01:19.252188 [complex_mem_test] start addr:0x40024000, len:131072
3960 18:01:19.456711 1st complex R/W mem test pass
3961 18:01:19.462910 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3962 18:01:19.466316 sync preloader write leveling
3963 18:01:19.469345 sync preloader cbt_mr12
3964 18:01:19.472834 sync preloader cbt_clk_dly
3965 18:01:19.472934 sync preloader cbt_cmd_dly
3966 18:01:19.476006 sync preloader cbt_cs
3967 18:01:19.479364 sync preloader cbt_ca_perbit_delay
3968 18:01:19.482392 sync preloader clk_delay
3969 18:01:19.482482 sync preloader dqs_delay
3970 18:01:19.485724 sync preloader u1Gating2T_Save
3971 18:01:19.488959 sync preloader u1Gating05T_Save
3972 18:01:19.492242 sync preloader u1Gatingfine_tune_Save
3973 18:01:19.495525 sync preloader u1Gatingucpass_count_Save
3974 18:01:19.498854 sync preloader u1TxWindowPerbitVref_Save
3975 18:01:19.502183 sync preloader u1TxCenter_min_Save
3976 18:01:19.505604 sync preloader u1TxCenter_max_Save
3977 18:01:19.508967 sync preloader u1Txwin_center_Save
3978 18:01:19.511964 sync preloader u1Txfirst_pass_Save
3979 18:01:19.515120 sync preloader u1Txlast_pass_Save
3980 18:01:19.518619 sync preloader u1RxDatlat_Save
3981 18:01:19.521972 sync preloader u1RxWinPerbitVref_Save
3982 18:01:19.525327 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3983 18:01:19.528500 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3984 18:01:19.531890 sync preloader delay_cell_unit
3985 18:01:19.538216 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3986 18:01:19.541341 sync preloader write leveling
3987 18:01:19.544999 sync preloader cbt_mr12
3988 18:01:19.545089 sync preloader cbt_clk_dly
3989 18:01:19.548034 sync preloader cbt_cmd_dly
3990 18:01:19.551155 sync preloader cbt_cs
3991 18:01:19.554531 sync preloader cbt_ca_perbit_delay
3992 18:01:19.554622 sync preloader clk_delay
3993 18:01:19.557849 sync preloader dqs_delay
3994 18:01:19.561177 sync preloader u1Gating2T_Save
3995 18:01:19.564527 sync preloader u1Gating05T_Save
3996 18:01:19.567518 sync preloader u1Gatingfine_tune_Save
3997 18:01:19.571009 sync preloader u1Gatingucpass_count_Save
3998 18:01:19.574236 sync preloader u1TxWindowPerbitVref_Save
3999 18:01:19.577574 sync preloader u1TxCenter_min_Save
4000 18:01:19.581039 sync preloader u1TxCenter_max_Save
4001 18:01:19.584220 sync preloader u1Txwin_center_Save
4002 18:01:19.587582 sync preloader u1Txfirst_pass_Save
4003 18:01:19.590546 sync preloader u1Txlast_pass_Save
4004 18:01:19.594164 sync preloader u1RxDatlat_Save
4005 18:01:19.597013 sync preloader u1RxWinPerbitVref_Save
4006 18:01:19.600477 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4007 18:01:19.603843 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4008 18:01:19.607266 sync preloader delay_cell_unit
4009 18:01:19.613700 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4010 18:01:19.616884 sync preloader write leveling
4011 18:01:19.620160 sync preloader cbt_mr12
4012 18:01:19.620252 sync preloader cbt_clk_dly
4013 18:01:19.623578 sync preloader cbt_cmd_dly
4014 18:01:19.626690 sync preloader cbt_cs
4015 18:01:19.630249 sync preloader cbt_ca_perbit_delay
4016 18:01:19.630340 sync preloader clk_delay
4017 18:01:19.633261 sync preloader dqs_delay
4018 18:01:19.636491 sync preloader u1Gating2T_Save
4019 18:01:19.639888 sync preloader u1Gating05T_Save
4020 18:01:19.643132 sync preloader u1Gatingfine_tune_Save
4021 18:01:19.646130 sync preloader u1Gatingucpass_count_Save
4022 18:01:19.649591 sync preloader u1TxWindowPerbitVref_Save
4023 18:01:19.652903 sync preloader u1TxCenter_min_Save
4024 18:01:19.656087 sync preloader u1TxCenter_max_Save
4025 18:01:19.659357 sync preloader u1Txwin_center_Save
4026 18:01:19.662638 sync preloader u1Txfirst_pass_Save
4027 18:01:19.666057 sync preloader u1Txlast_pass_Save
4028 18:01:19.666149 sync preloader u1RxDatlat_Save
4029 18:01:19.669148 sync preloader u1RxWinPerbitVref_Save
4030 18:01:19.675887 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4031 18:01:19.679301 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4032 18:01:19.682276 sync preloader delay_cell_unit
4033 18:01:19.685443 just_for_test_dump_coreboot_params dump all params
4034 18:01:19.688976 dump source = 0x0
4035 18:01:19.689067 dump params frequency:1600
4036 18:01:19.692149 dump params rank number:2
4037 18:01:19.692240
4038 18:01:19.695408 dump params write leveling
4039 18:01:19.698762 write leveling[0][0][0] = 0x20
4040 18:01:19.701784 write leveling[0][0][1] = 0x19
4041 18:01:19.705141 write leveling[0][1][0] = 0x1a
4042 18:01:19.705232 write leveling[0][1][1] = 0x18
4043 18:01:19.708565 write leveling[1][0][0] = 0x26
4044 18:01:19.711720 write leveling[1][0][1] = 0x1c
4045 18:01:19.715195 write leveling[1][1][0] = 0x21
4046 18:01:19.718190 write leveling[1][1][1] = 0x1a
4047 18:01:19.718282 dump params cbt_cs
4048 18:01:19.721570 cbt_cs[0][0] = 0x6
4049 18:01:19.721662 cbt_cs[0][1] = 0x6
4050 18:01:19.724759 cbt_cs[1][0] = 0xb
4051 18:01:19.724850 cbt_cs[1][1] = 0xb
4052 18:01:19.728120 dump params cbt_mr12
4053 18:01:19.731183 cbt_mr12[0][0] = 0x1c
4054 18:01:19.731274 cbt_mr12[0][1] = 0x1e
4055 18:01:19.734789 cbt_mr12[1][0] = 0x20
4056 18:01:19.734890 cbt_mr12[1][1] = 0x1c
4057 18:01:19.737801 dump params tx window
4058 18:01:19.741034 tx_center_min[0][0][0] = 984
4059 18:01:19.744512 tx_center_max[0][0][0] = 990
4060 18:01:19.744604 tx_center_min[0][0][1] = 978
4061 18:01:19.747464 tx_center_max[0][0][1] = 984
4062 18:01:19.750960 tx_center_min[0][1][0] = 981
4063 18:01:19.754342 tx_center_max[0][1][0] = 987
4064 18:01:19.757374 tx_center_min[0][1][1] = 979
4065 18:01:19.757506 tx_center_max[0][1][1] = 986
4066 18:01:19.760581 tx_center_min[1][0][0] = 990
4067 18:01:19.763886 tx_center_max[1][0][0] = 996
4068 18:01:19.767311 tx_center_min[1][0][1] = 980
4069 18:01:19.770684 tx_center_max[1][0][1] = 987
4070 18:01:19.770776 tx_center_min[1][1][0] = 987
4071 18:01:19.773641 tx_center_max[1][1][0] = 993
4072 18:01:19.776993 tx_center_min[1][1][1] = 979
4073 18:01:19.780369 tx_center_max[1][1][1] = 986
4074 18:01:19.780460 dump params tx window
4075 18:01:19.783739 tx_win_center[0][0][0] = 990
4076 18:01:19.786972 tx_first_pass[0][0][0] = 979
4077 18:01:19.790131 tx_last_pass[0][0][0] = 1002
4078 18:01:19.793463 tx_win_center[0][0][1] = 989
4079 18:01:19.793565 tx_first_pass[0][0][1] = 978
4080 18:01:19.796881 tx_last_pass[0][0][1] = 1001
4081 18:01:19.799936 tx_win_center[0][0][2] = 990
4082 18:01:19.803119 tx_first_pass[0][0][2] = 978
4083 18:01:19.806580 tx_last_pass[0][0][2] = 1002
4084 18:01:19.806672 tx_win_center[0][0][3] = 984
4085 18:01:19.809804 tx_first_pass[0][0][3] = 973
4086 18:01:19.813214 tx_last_pass[0][0][3] = 996
4087 18:01:19.816512 tx_win_center[0][0][4] = 989
4088 18:01:19.819609 tx_first_pass[0][0][4] = 977
4089 18:01:19.819700 tx_last_pass[0][0][4] = 1001
4090 18:01:19.822998 tx_win_center[0][0][5] = 987
4091 18:01:19.826280 tx_first_pass[0][0][5] = 976
4092 18:01:19.829621 tx_last_pass[0][0][5] = 999
4093 18:01:19.832640 tx_win_center[0][0][6] = 988
4094 18:01:19.832730 tx_first_pass[0][0][6] = 977
4095 18:01:19.835987 tx_last_pass[0][0][6] = 999
4096 18:01:19.839281 tx_win_center[0][0][7] = 989
4097 18:01:19.842392 tx_first_pass[0][0][7] = 977
4098 18:01:19.845844 tx_last_pass[0][0][7] = 1001
4099 18:01:19.845935 tx_win_center[0][0][8] = 978
4100 18:01:19.848939 tx_first_pass[0][0][8] = 966
4101 18:01:19.852375 tx_last_pass[0][0][8] = 990
4102 18:01:19.855591 tx_win_center[0][0][9] = 979
4103 18:01:19.858833 tx_first_pass[0][0][9] = 968
4104 18:01:19.858923 tx_last_pass[0][0][9] = 991
4105 18:01:19.862309 tx_win_center[0][0][10] = 984
4106 18:01:19.865332 tx_first_pass[0][0][10] = 972
4107 18:01:19.868726 tx_last_pass[0][0][10] = 997
4108 18:01:19.872073 tx_win_center[0][0][11] = 979
4109 18:01:19.872165 tx_first_pass[0][0][11] = 967
4110 18:01:19.874923 tx_last_pass[0][0][11] = 991
4111 18:01:19.878381 tx_win_center[0][0][12] = 980
4112 18:01:19.881648 tx_first_pass[0][0][12] = 969
4113 18:01:19.884771 tx_last_pass[0][0][12] = 992
4114 18:01:19.884862 tx_win_center[0][0][13] = 980
4115 18:01:19.888302 tx_first_pass[0][0][13] = 969
4116 18:01:19.891538 tx_last_pass[0][0][13] = 992
4117 18:01:19.894936 tx_win_center[0][0][14] = 982
4118 18:01:19.898228 tx_first_pass[0][0][14] = 969
4119 18:01:19.901567 tx_last_pass[0][0][14] = 996
4120 18:01:19.901657 tx_win_center[0][0][15] = 984
4121 18:01:19.904642 tx_first_pass[0][0][15] = 971
4122 18:01:19.907733 tx_last_pass[0][0][15] = 997
4123 18:01:19.911203 tx_win_center[0][1][0] = 987
4124 18:01:19.914252 tx_first_pass[0][1][0] = 976
4125 18:01:19.914343 tx_last_pass[0][1][0] = 999
4126 18:01:19.917569 tx_win_center[0][1][1] = 987
4127 18:01:19.921249 tx_first_pass[0][1][1] = 976
4128 18:01:19.924376 tx_last_pass[0][1][1] = 999
4129 18:01:19.927406 tx_win_center[0][1][2] = 987
4130 18:01:19.927497 tx_first_pass[0][1][2] = 976
4131 18:01:19.930809 tx_last_pass[0][1][2] = 999
4132 18:01:19.934041 tx_win_center[0][1][3] = 981
4133 18:01:19.937314 tx_first_pass[0][1][3] = 969
4134 18:01:19.937405 tx_last_pass[0][1][3] = 993
4135 18:01:19.940687 tx_win_center[0][1][4] = 986
4136 18:01:19.944137 tx_first_pass[0][1][4] = 975
4137 18:01:19.947112 tx_last_pass[0][1][4] = 998
4138 18:01:19.950514 tx_win_center[0][1][5] = 982
4139 18:01:19.950604 tx_first_pass[0][1][5] = 971
4140 18:01:19.953810 tx_last_pass[0][1][5] = 994
4141 18:01:19.957178 tx_win_center[0][1][6] = 985
4142 18:01:19.960281 tx_first_pass[0][1][6] = 973
4143 18:01:19.963672 tx_last_pass[0][1][6] = 997
4144 18:01:19.963766 tx_win_center[0][1][7] = 987
4145 18:01:19.966996 tx_first_pass[0][1][7] = 975
4146 18:01:19.970271 tx_last_pass[0][1][7] = 999
4147 18:01:19.973447 tx_win_center[0][1][8] = 979
4148 18:01:19.976579 tx_first_pass[0][1][8] = 967
4149 18:01:19.976670 tx_last_pass[0][1][8] = 992
4150 18:01:19.979887 tx_win_center[0][1][9] = 980
4151 18:01:19.983281 tx_first_pass[0][1][9] = 968
4152 18:01:19.986503 tx_last_pass[0][1][9] = 992
4153 18:01:19.986594 tx_win_center[0][1][10] = 986
4154 18:01:19.989714 tx_first_pass[0][1][10] = 974
4155 18:01:19.993172 tx_last_pass[0][1][10] = 999
4156 18:01:19.996087 tx_win_center[0][1][11] = 980
4157 18:01:19.999685 tx_first_pass[0][1][11] = 968
4158 18:01:20.002921 tx_last_pass[0][1][11] = 992
4159 18:01:20.003012 tx_win_center[0][1][12] = 981
4160 18:01:20.006218 tx_first_pass[0][1][12] = 969
4161 18:01:20.009126 tx_last_pass[0][1][12] = 993
4162 18:01:20.012793 tx_win_center[0][1][13] = 981
4163 18:01:20.015845 tx_first_pass[0][1][13] = 969
4164 18:01:20.015935 tx_last_pass[0][1][13] = 993
4165 18:01:20.018939 tx_win_center[0][1][14] = 983
4166 18:01:20.022541 tx_first_pass[0][1][14] = 970
4167 18:01:20.025823 tx_last_pass[0][1][14] = 996
4168 18:01:20.029006 tx_win_center[0][1][15] = 986
4169 18:01:20.032424 tx_first_pass[0][1][15] = 974
4170 18:01:20.032558 tx_last_pass[0][1][15] = 998
4171 18:01:20.035503 tx_win_center[1][0][0] = 996
4172 18:01:20.038667 tx_first_pass[1][0][0] = 984
4173 18:01:20.041879 tx_last_pass[1][0][0] = 1008
4174 18:01:20.045377 tx_win_center[1][0][1] = 995
4175 18:01:20.045476 tx_first_pass[1][0][1] = 983
4176 18:01:20.048912 tx_last_pass[1][0][1] = 1007
4177 18:01:20.051842 tx_win_center[1][0][2] = 993
4178 18:01:20.055299 tx_first_pass[1][0][2] = 980
4179 18:01:20.058780 tx_last_pass[1][0][2] = 1006
4180 18:01:20.058872 tx_win_center[1][0][3] = 990
4181 18:01:20.061574 tx_first_pass[1][0][3] = 978
4182 18:01:20.065033 tx_last_pass[1][0][3] = 1003
4183 18:01:20.068126 tx_win_center[1][0][4] = 995
4184 18:01:20.071484 tx_first_pass[1][0][4] = 983
4185 18:01:20.071574 tx_last_pass[1][0][4] = 1007
4186 18:01:20.074768 tx_win_center[1][0][5] = 995
4187 18:01:20.077971 tx_first_pass[1][0][5] = 983
4188 18:01:20.081283 tx_last_pass[1][0][5] = 1008
4189 18:01:20.084279 tx_win_center[1][0][6] = 994
4190 18:01:20.084369 tx_first_pass[1][0][6] = 982
4191 18:01:20.087807 tx_last_pass[1][0][6] = 1007
4192 18:01:20.090873 tx_win_center[1][0][7] = 995
4193 18:01:20.094098 tx_first_pass[1][0][7] = 983
4194 18:01:20.097527 tx_last_pass[1][0][7] = 1007
4195 18:01:20.097618 tx_win_center[1][0][8] = 982
4196 18:01:20.100811 tx_first_pass[1][0][8] = 970
4197 18:01:20.104133 tx_last_pass[1][0][8] = 995
4198 18:01:20.107281 tx_win_center[1][0][9] = 981
4199 18:01:20.110672 tx_first_pass[1][0][9] = 970
4200 18:01:20.110794 tx_last_pass[1][0][9] = 993
4201 18:01:20.114020 tx_win_center[1][0][10] = 986
4202 18:01:20.117087 tx_first_pass[1][0][10] = 975
4203 18:01:20.120488 tx_last_pass[1][0][10] = 998
4204 18:01:20.123424 tx_win_center[1][0][11] = 987
4205 18:01:20.123515 tx_first_pass[1][0][11] = 976
4206 18:01:20.126995 tx_last_pass[1][0][11] = 999
4207 18:01:20.130332 tx_win_center[1][0][12] = 986
4208 18:01:20.133767 tx_first_pass[1][0][12] = 975
4209 18:01:20.136622 tx_last_pass[1][0][12] = 998
4210 18:01:20.140186 tx_win_center[1][0][13] = 987
4211 18:01:20.140277 tx_first_pass[1][0][13] = 975
4212 18:01:20.143224 tx_last_pass[1][0][13] = 999
4213 18:01:20.146611 tx_win_center[1][0][14] = 987
4214 18:01:20.149987 tx_first_pass[1][0][14] = 975
4215 18:01:20.153128 tx_last_pass[1][0][14] = 999
4216 18:01:20.153219 tx_win_center[1][0][15] = 980
4217 18:01:20.156286 tx_first_pass[1][0][15] = 968
4218 18:01:20.159775 tx_last_pass[1][0][15] = 992
4219 18:01:20.162808 tx_win_center[1][1][0] = 993
4220 18:01:20.166116 tx_first_pass[1][1][0] = 980
4221 18:01:20.166210 tx_last_pass[1][1][0] = 1006
4222 18:01:20.169698 tx_win_center[1][1][1] = 991
4223 18:01:20.172653 tx_first_pass[1][1][1] = 978
4224 18:01:20.176140 tx_last_pass[1][1][1] = 1005
4225 18:01:20.179513 tx_win_center[1][1][2] = 990
4226 18:01:20.179604 tx_first_pass[1][1][2] = 977
4227 18:01:20.182664 tx_last_pass[1][1][2] = 1003
4228 18:01:20.185644 tx_win_center[1][1][3] = 987
4229 18:01:20.189122 tx_first_pass[1][1][3] = 975
4230 18:01:20.192592 tx_last_pass[1][1][3] = 999
4231 18:01:20.192683 tx_win_center[1][1][4] = 991
4232 18:01:20.195634 tx_first_pass[1][1][4] = 978
4233 18:01:20.199102 tx_last_pass[1][1][4] = 1005
4234 18:01:20.202236 tx_win_center[1][1][5] = 992
4235 18:01:20.205628 tx_first_pass[1][1][5] = 979
4236 18:01:20.205719 tx_last_pass[1][1][5] = 1006
4237 18:01:20.208841 tx_win_center[1][1][6] = 991
4238 18:01:20.212164 tx_first_pass[1][1][6] = 978
4239 18:01:20.215368 tx_last_pass[1][1][6] = 1005
4240 18:01:20.218394 tx_win_center[1][1][7] = 991
4241 18:01:20.218484 tx_first_pass[1][1][7] = 979
4242 18:01:20.221795 tx_last_pass[1][1][7] = 1004
4243 18:01:20.224986 tx_win_center[1][1][8] = 981
4244 18:01:20.228332 tx_first_pass[1][1][8] = 970
4245 18:01:20.231664 tx_last_pass[1][1][8] = 993
4246 18:01:20.231755 tx_win_center[1][1][9] = 981
4247 18:01:20.234834 tx_first_pass[1][1][9] = 970
4248 18:01:20.238258 tx_last_pass[1][1][9] = 993
4249 18:01:20.241223 tx_win_center[1][1][10] = 984
4250 18:01:20.244703 tx_first_pass[1][1][10] = 972
4251 18:01:20.244793 tx_last_pass[1][1][10] = 997
4252 18:01:20.248146 tx_win_center[1][1][11] = 986
4253 18:01:20.251117 tx_first_pass[1][1][11] = 973
4254 18:01:20.254724 tx_last_pass[1][1][11] = 999
4255 18:01:20.257777 tx_win_center[1][1][12] = 985
4256 18:01:20.257867 tx_first_pass[1][1][12] = 973
4257 18:01:20.261226 tx_last_pass[1][1][12] = 997
4258 18:01:20.264284 tx_win_center[1][1][13] = 986
4259 18:01:20.267790 tx_first_pass[1][1][13] = 974
4260 18:01:20.270839 tx_last_pass[1][1][13] = 999
4261 18:01:20.274167 tx_win_center[1][1][14] = 985
4262 18:01:20.274261 tx_first_pass[1][1][14] = 973
4263 18:01:20.277643 tx_last_pass[1][1][14] = 997
4264 18:01:20.280654 tx_win_center[1][1][15] = 979
4265 18:01:20.284070 tx_first_pass[1][1][15] = 968
4266 18:01:20.287135 tx_last_pass[1][1][15] = 991
4267 18:01:20.287225 dump params rx window
4268 18:01:20.290572 rx_firspass[0][0][0] = 6
4269 18:01:20.293602 rx_lastpass[0][0][0] = 36
4270 18:01:20.293691 rx_firspass[0][0][1] = 7
4271 18:01:20.297178 rx_lastpass[0][0][1] = 36
4272 18:01:20.300510 rx_firspass[0][0][2] = 5
4273 18:01:20.300599 rx_lastpass[0][0][2] = 39
4274 18:01:20.303490 rx_firspass[0][0][3] = -3
4275 18:01:20.306784 rx_lastpass[0][0][3] = 30
4276 18:01:20.310020 rx_firspass[0][0][4] = 6
4277 18:01:20.310111 rx_lastpass[0][0][4] = 36
4278 18:01:20.313268 rx_firspass[0][0][5] = 2
4279 18:01:20.316656 rx_lastpass[0][0][5] = 33
4280 18:01:20.316746 rx_firspass[0][0][6] = 3
4281 18:01:20.320122 rx_lastpass[0][0][6] = 33
4282 18:01:20.323600 rx_firspass[0][0][7] = 4
4283 18:01:20.326324 rx_lastpass[0][0][7] = 36
4284 18:01:20.326414 rx_firspass[0][0][8] = -1
4285 18:01:20.329549 rx_lastpass[0][0][8] = 30
4286 18:01:20.332904 rx_firspass[0][0][9] = 2
4287 18:01:20.332993 rx_lastpass[0][0][9] = 33
4288 18:01:20.336262 rx_firspass[0][0][10] = 9
4289 18:01:20.339525 rx_lastpass[0][0][10] = 37
4290 18:01:20.343017 rx_firspass[0][0][11] = 1
4291 18:01:20.343107 rx_lastpass[0][0][11] = 30
4292 18:01:20.346045 rx_firspass[0][0][12] = 3
4293 18:01:20.349537 rx_lastpass[0][0][12] = 31
4294 18:01:20.352877 rx_firspass[0][0][13] = 2
4295 18:01:20.352967 rx_lastpass[0][0][13] = 32
4296 18:01:20.355884 rx_firspass[0][0][14] = 1
4297 18:01:20.359293 rx_lastpass[0][0][14] = 35
4298 18:01:20.362698 rx_firspass[0][0][15] = 4
4299 18:01:20.362803 rx_lastpass[0][0][15] = 36
4300 18:01:20.365754 rx_firspass[0][1][0] = 4
4301 18:01:20.369231 rx_lastpass[0][1][0] = 39
4302 18:01:20.369347 rx_firspass[0][1][1] = 5
4303 18:01:20.372499 rx_lastpass[0][1][1] = 39
4304 18:01:20.375677 rx_firspass[0][1][2] = 6
4305 18:01:20.378859 rx_lastpass[0][1][2] = 39
4306 18:01:20.379001 rx_firspass[0][1][3] = -2
4307 18:01:20.382604 rx_lastpass[0][1][3] = 31
4308 18:01:20.385671 rx_firspass[0][1][4] = 5
4309 18:01:20.386240 rx_lastpass[0][1][4] = 39
4310 18:01:20.389080 rx_firspass[0][1][5] = 0
4311 18:01:20.392153 rx_lastpass[0][1][5] = 34
4312 18:01:20.395711 rx_firspass[0][1][6] = 1
4313 18:01:20.396121 rx_lastpass[0][1][6] = 35
4314 18:01:20.399109 rx_firspass[0][1][7] = 3
4315 18:01:20.402106 rx_lastpass[0][1][7] = 36
4316 18:01:20.402518 rx_firspass[0][1][8] = -3
4317 18:01:20.405509 rx_lastpass[0][1][8] = 32
4318 18:01:20.408875 rx_firspass[0][1][9] = -1
4319 18:01:20.412202 rx_lastpass[0][1][9] = 34
4320 18:01:20.412613 rx_firspass[0][1][10] = 6
4321 18:01:20.415539 rx_lastpass[0][1][10] = 40
4322 18:01:20.418665 rx_firspass[0][1][11] = -2
4323 18:01:20.422033 rx_lastpass[0][1][11] = 33
4324 18:01:20.422445 rx_firspass[0][1][12] = 0
4325 18:01:20.425174 rx_lastpass[0][1][12] = 34
4326 18:01:20.428665 rx_firspass[0][1][13] = -1
4327 18:01:20.431612 rx_lastpass[0][1][13] = 34
4328 18:01:20.432039 rx_firspass[0][1][14] = 3
4329 18:01:20.434882 rx_lastpass[0][1][14] = 36
4330 18:01:20.438207 rx_firspass[0][1][15] = 5
4331 18:01:20.438617 rx_lastpass[0][1][15] = 37
4332 18:01:20.441471 rx_firspass[1][0][0] = 5
4333 18:01:20.444903 rx_lastpass[1][0][0] = 36
4334 18:01:20.448034 rx_firspass[1][0][1] = 4
4335 18:01:20.448449 rx_lastpass[1][0][1] = 37
4336 18:01:20.451417 rx_firspass[1][0][2] = 0
4337 18:01:20.454397 rx_lastpass[1][0][2] = 34
4338 18:01:20.454805 rx_firspass[1][0][3] = 0
4339 18:01:20.457838 rx_lastpass[1][0][3] = 31
4340 18:01:20.461188 rx_firspass[1][0][4] = 5
4341 18:01:20.464523 rx_lastpass[1][0][4] = 35
4342 18:01:20.464934 rx_firspass[1][0][5] = 9
4343 18:01:20.467450 rx_lastpass[1][0][5] = 38
4344 18:01:20.470774 rx_firspass[1][0][6] = 5
4345 18:01:20.471183 rx_lastpass[1][0][6] = 38
4346 18:01:20.474079 rx_firspass[1][0][7] = 5
4347 18:01:20.477516 rx_lastpass[1][0][7] = 34
4348 18:01:20.480683 rx_firspass[1][0][8] = 1
4349 18:01:20.481225 rx_lastpass[1][0][8] = 33
4350 18:01:20.483776 rx_firspass[1][0][9] = 0
4351 18:01:20.487065 rx_lastpass[1][0][9] = 32
4352 18:01:20.487495 rx_firspass[1][0][10] = 3
4353 18:01:20.490705 rx_lastpass[1][0][10] = 36
4354 18:01:20.493893 rx_firspass[1][0][11] = 4
4355 18:01:20.496993 rx_lastpass[1][0][11] = 37
4356 18:01:20.497694 rx_firspass[1][0][12] = 6
4357 18:01:20.501971 rx_lastpass[1][0][12] = 35
4358 18:01:20.503759 rx_firspass[1][0][13] = 6
4359 18:01:20.507112 rx_lastpass[1][0][13] = 36
4360 18:01:20.507711 rx_firspass[1][0][14] = 5
4361 18:01:20.509888 rx_lastpass[1][0][14] = 36
4362 18:01:20.513226 rx_firspass[1][0][15] = -4
4363 18:01:20.516611 rx_lastpass[1][0][15] = 29
4364 18:01:20.516884 rx_firspass[1][1][0] = 4
4365 18:01:20.520467 rx_lastpass[1][1][0] = 40
4366 18:01:20.522944 rx_firspass[1][1][1] = 4
4367 18:01:20.523145 rx_lastpass[1][1][1] = 38
4368 18:01:20.526422 rx_firspass[1][1][2] = 3
4369 18:01:20.529316 rx_lastpass[1][1][2] = 34
4370 18:01:20.532592 rx_firspass[1][1][3] = -2
4371 18:01:20.532747 rx_lastpass[1][1][3] = 33
4372 18:01:20.535978 rx_firspass[1][1][4] = 5
4373 18:01:20.539372 rx_lastpass[1][1][4] = 39
4374 18:01:20.539519 rx_firspass[1][1][5] = 6
4375 18:01:20.542413 rx_lastpass[1][1][5] = 40
4376 18:01:20.545867 rx_firspass[1][1][6] = 6
4377 18:01:20.549064 rx_lastpass[1][1][6] = 40
4378 18:01:20.549193 rx_firspass[1][1][7] = 3
4379 18:01:20.552739 rx_lastpass[1][1][7] = 37
4380 18:01:20.555737 rx_firspass[1][1][8] = -1
4381 18:01:20.556033 rx_lastpass[1][1][8] = 34
4382 18:01:20.559139 rx_firspass[1][1][9] = -2
4383 18:01:20.562475 rx_lastpass[1][1][9] = 33
4384 18:01:20.565504 rx_firspass[1][1][10] = 3
4385 18:01:20.565784 rx_lastpass[1][1][10] = 38
4386 18:01:20.568977 rx_firspass[1][1][11] = 4
4387 18:01:20.572335 rx_lastpass[1][1][11] = 38
4388 18:01:20.575490 rx_firspass[1][1][12] = 3
4389 18:01:20.575741 rx_lastpass[1][1][12] = 38
4390 18:01:20.578849 rx_firspass[1][1][13] = 4
4391 18:01:20.581874 rx_lastpass[1][1][13] = 40
4392 18:01:20.582118 rx_firspass[1][1][14] = 4
4393 18:01:20.585253 rx_lastpass[1][1][14] = 40
4394 18:01:20.588536 rx_firspass[1][1][15] = -4
4395 18:01:20.591887 rx_lastpass[1][1][15] = 31
4396 18:01:20.592285 dump params clk_delay
4397 18:01:20.595075 clk_delay[0] = 0
4398 18:01:20.595390 clk_delay[1] = 0
4399 18:01:20.598595 dump params dqs_delay
4400 18:01:20.598835 dqs_delay[0][0] = 0
4401 18:01:20.601629 dqs_delay[0][1] = 0
4402 18:01:20.604754 dqs_delay[1][0] = 0
4403 18:01:20.604991 dqs_delay[1][1] = -1
4404 18:01:20.608207 dump params delay_cell_unit = 744
4405 18:01:20.611220 dump source = 0x0
4406 18:01:20.611578 dump params frequency:1200
4407 18:01:20.614511 dump params rank number:2
4408 18:01:20.614811
4409 18:01:20.618050 dump params write leveling
4410 18:01:20.621466 write leveling[0][0][0] = 0x0
4411 18:01:20.621828 write leveling[0][0][1] = 0x0
4412 18:01:20.624500 write leveling[0][1][0] = 0x0
4413 18:01:20.627877 write leveling[0][1][1] = 0x0
4414 18:01:20.630970 write leveling[1][0][0] = 0x0
4415 18:01:20.634173 write leveling[1][0][1] = 0x0
4416 18:01:20.637803 write leveling[1][1][0] = 0x0
4417 18:01:20.638048 write leveling[1][1][1] = 0x0
4418 18:01:20.640727 dump params cbt_cs
4419 18:01:20.641040 cbt_cs[0][0] = 0x0
4420 18:01:20.644338 cbt_cs[0][1] = 0x0
4421 18:01:20.644611 cbt_cs[1][0] = 0x0
4422 18:01:20.647747 cbt_cs[1][1] = 0x0
4423 18:01:20.650749 dump params cbt_mr12
4424 18:01:20.650994 cbt_mr12[0][0] = 0x0
4425 18:01:20.654134 cbt_mr12[0][1] = 0x0
4426 18:01:20.654373 cbt_mr12[1][0] = 0x0
4427 18:01:20.657159 cbt_mr12[1][1] = 0x0
4428 18:01:20.657363 dump params tx window
4429 18:01:20.660498 tx_center_min[0][0][0] = 0
4430 18:01:20.663919 tx_center_max[0][0][0] = 0
4431 18:01:20.666955 tx_center_min[0][0][1] = 0
4432 18:01:20.667131 tx_center_max[0][0][1] = 0
4433 18:01:20.670319 tx_center_min[0][1][0] = 0
4434 18:01:20.673327 tx_center_max[0][1][0] = 0
4435 18:01:20.676808 tx_center_min[0][1][1] = 0
4436 18:01:20.676946 tx_center_max[0][1][1] = 0
4437 18:01:20.680225 tx_center_min[1][0][0] = 0
4438 18:01:20.683189 tx_center_max[1][0][0] = 0
4439 18:01:20.686515 tx_center_min[1][0][1] = 0
4440 18:01:20.686685 tx_center_max[1][0][1] = 0
4441 18:01:20.689808 tx_center_min[1][1][0] = 0
4442 18:01:20.693205 tx_center_max[1][1][0] = 0
4443 18:01:20.696376 tx_center_min[1][1][1] = 0
4444 18:01:20.696542 tx_center_max[1][1][1] = 0
4445 18:01:20.699624 dump params tx window
4446 18:01:20.703017 tx_win_center[0][0][0] = 0
4447 18:01:20.706285 tx_first_pass[0][0][0] = 0
4448 18:01:20.706499 tx_last_pass[0][0][0] = 0
4449 18:01:20.709213 tx_win_center[0][0][1] = 0
4450 18:01:20.712833 tx_first_pass[0][0][1] = 0
4451 18:01:20.715913 tx_last_pass[0][0][1] = 0
4452 18:01:20.716023 tx_win_center[0][0][2] = 0
4453 18:01:20.719342 tx_first_pass[0][0][2] = 0
4454 18:01:20.722625 tx_last_pass[0][0][2] = 0
4455 18:01:20.722722 tx_win_center[0][0][3] = 0
4456 18:01:20.726048 tx_first_pass[0][0][3] = 0
4457 18:01:20.729016 tx_last_pass[0][0][3] = 0
4458 18:01:20.732572 tx_win_center[0][0][4] = 0
4459 18:01:20.732702 tx_first_pass[0][0][4] = 0
4460 18:01:20.735412 tx_last_pass[0][0][4] = 0
4461 18:01:20.738747 tx_win_center[0][0][5] = 0
4462 18:01:20.742180 tx_first_pass[0][0][5] = 0
4463 18:01:20.742334 tx_last_pass[0][0][5] = 0
4464 18:01:20.745513 tx_win_center[0][0][6] = 0
4465 18:01:20.748823 tx_first_pass[0][0][6] = 0
4466 18:01:20.751871 tx_last_pass[0][0][6] = 0
4467 18:01:20.751990 tx_win_center[0][0][7] = 0
4468 18:01:20.755240 tx_first_pass[0][0][7] = 0
4469 18:01:20.758562 tx_last_pass[0][0][7] = 0
4470 18:01:20.761648 tx_win_center[0][0][8] = 0
4471 18:01:20.761744 tx_first_pass[0][0][8] = 0
4472 18:01:20.764908 tx_last_pass[0][0][8] = 0
4473 18:01:20.768216 tx_win_center[0][0][9] = 0
4474 18:01:20.771771 tx_first_pass[0][0][9] = 0
4475 18:01:20.771904 tx_last_pass[0][0][9] = 0
4476 18:01:20.774785 tx_win_center[0][0][10] = 0
4477 18:01:20.778343 tx_first_pass[0][0][10] = 0
4478 18:01:20.781296 tx_last_pass[0][0][10] = 0
4479 18:01:20.781392 tx_win_center[0][0][11] = 0
4480 18:01:20.784633 tx_first_pass[0][0][11] = 0
4481 18:01:20.787946 tx_last_pass[0][0][11] = 0
4482 18:01:20.791346 tx_win_center[0][0][12] = 0
4483 18:01:20.791441 tx_first_pass[0][0][12] = 0
4484 18:01:20.794582 tx_last_pass[0][0][12] = 0
4485 18:01:20.797920 tx_win_center[0][0][13] = 0
4486 18:01:20.800812 tx_first_pass[0][0][13] = 0
4487 18:01:20.800907 tx_last_pass[0][0][13] = 0
4488 18:01:20.804204 tx_win_center[0][0][14] = 0
4489 18:01:20.807636 tx_first_pass[0][0][14] = 0
4490 18:01:20.810780 tx_last_pass[0][0][14] = 0
4491 18:01:20.810879 tx_win_center[0][0][15] = 0
4492 18:01:20.814100 tx_first_pass[0][0][15] = 0
4493 18:01:20.817590 tx_last_pass[0][0][15] = 0
4494 18:01:20.820677 tx_win_center[0][1][0] = 0
4495 18:01:20.820771 tx_first_pass[0][1][0] = 0
4496 18:01:20.823768 tx_last_pass[0][1][0] = 0
4497 18:01:20.827255 tx_win_center[0][1][1] = 0
4498 18:01:20.830601 tx_first_pass[0][1][1] = 0
4499 18:01:20.830694 tx_last_pass[0][1][1] = 0
4500 18:01:20.833838 tx_win_center[0][1][2] = 0
4501 18:01:20.836811 tx_first_pass[0][1][2] = 0
4502 18:01:20.840207 tx_last_pass[0][1][2] = 0
4503 18:01:20.840304 tx_win_center[0][1][3] = 0
4504 18:01:20.843713 tx_first_pass[0][1][3] = 0
4505 18:01:20.846812 tx_last_pass[0][1][3] = 0
4506 18:01:20.850145 tx_win_center[0][1][4] = 0
4507 18:01:20.850240 tx_first_pass[0][1][4] = 0
4508 18:01:20.853110 tx_last_pass[0][1][4] = 0
4509 18:01:20.856460 tx_win_center[0][1][5] = 0
4510 18:01:20.859763 tx_first_pass[0][1][5] = 0
4511 18:01:20.859863 tx_last_pass[0][1][5] = 0
4512 18:01:20.863246 tx_win_center[0][1][6] = 0
4513 18:01:20.866433 tx_first_pass[0][1][6] = 0
4514 18:01:20.866567 tx_last_pass[0][1][6] = 0
4515 18:01:20.869797 tx_win_center[0][1][7] = 0
4516 18:01:20.872824 tx_first_pass[0][1][7] = 0
4517 18:01:20.876170 tx_last_pass[0][1][7] = 0
4518 18:01:20.876288 tx_win_center[0][1][8] = 0
4519 18:01:20.879464 tx_first_pass[0][1][8] = 0
4520 18:01:20.882850 tx_last_pass[0][1][8] = 0
4521 18:01:20.886225 tx_win_center[0][1][9] = 0
4522 18:01:20.886318 tx_first_pass[0][1][9] = 0
4523 18:01:20.889340 tx_last_pass[0][1][9] = 0
4524 18:01:20.892780 tx_win_center[0][1][10] = 0
4525 18:01:20.896056 tx_first_pass[0][1][10] = 0
4526 18:01:20.896180 tx_last_pass[0][1][10] = 0
4527 18:01:20.899080 tx_win_center[0][1][11] = 0
4528 18:01:20.902412 tx_first_pass[0][1][11] = 0
4529 18:01:20.905707 tx_last_pass[0][1][11] = 0
4530 18:01:20.905832 tx_win_center[0][1][12] = 0
4531 18:01:20.909000 tx_first_pass[0][1][12] = 0
4532 18:01:20.912473 tx_last_pass[0][1][12] = 0
4533 18:01:20.915419 tx_win_center[0][1][13] = 0
4534 18:01:20.918772 tx_first_pass[0][1][13] = 0
4535 18:01:20.918873 tx_last_pass[0][1][13] = 0
4536 18:01:20.922115 tx_win_center[0][1][14] = 0
4537 18:01:20.925501 tx_first_pass[0][1][14] = 0
4538 18:01:20.928701 tx_last_pass[0][1][14] = 0
4539 18:01:20.928803 tx_win_center[0][1][15] = 0
4540 18:01:20.932007 tx_first_pass[0][1][15] = 0
4541 18:01:20.935243 tx_last_pass[0][1][15] = 0
4542 18:01:20.938572 tx_win_center[1][0][0] = 0
4543 18:01:20.938666 tx_first_pass[1][0][0] = 0
4544 18:01:20.941678 tx_last_pass[1][0][0] = 0
4545 18:01:20.945030 tx_win_center[1][0][1] = 0
4546 18:01:20.948126 tx_first_pass[1][0][1] = 0
4547 18:01:20.948218 tx_last_pass[1][0][1] = 0
4548 18:01:20.951844 tx_win_center[1][0][2] = 0
4549 18:01:20.954856 tx_first_pass[1][0][2] = 0
4550 18:01:20.954948 tx_last_pass[1][0][2] = 0
4551 18:01:20.958088 tx_win_center[1][0][3] = 0
4552 18:01:20.961613 tx_first_pass[1][0][3] = 0
4553 18:01:20.964550 tx_last_pass[1][0][3] = 0
4554 18:01:20.964642 tx_win_center[1][0][4] = 0
4555 18:01:20.967885 tx_first_pass[1][0][4] = 0
4556 18:01:20.971519 tx_last_pass[1][0][4] = 0
4557 18:01:20.974418 tx_win_center[1][0][5] = 0
4558 18:01:20.974510 tx_first_pass[1][0][5] = 0
4559 18:01:20.977942 tx_last_pass[1][0][5] = 0
4560 18:01:20.981238 tx_win_center[1][0][6] = 0
4561 18:01:20.984439 tx_first_pass[1][0][6] = 0
4562 18:01:20.984544 tx_last_pass[1][0][6] = 0
4563 18:01:20.987574 tx_win_center[1][0][7] = 0
4564 18:01:20.990868 tx_first_pass[1][0][7] = 0
4565 18:01:20.994092 tx_last_pass[1][0][7] = 0
4566 18:01:20.994184 tx_win_center[1][0][8] = 0
4567 18:01:20.997444 tx_first_pass[1][0][8] = 0
4568 18:01:21.000921 tx_last_pass[1][0][8] = 0
4569 18:01:21.001014 tx_win_center[1][0][9] = 0
4570 18:01:21.003956 tx_first_pass[1][0][9] = 0
4571 18:01:21.007236 tx_last_pass[1][0][9] = 0
4572 18:01:21.010717 tx_win_center[1][0][10] = 0
4573 18:01:21.010809 tx_first_pass[1][0][10] = 0
4574 18:01:21.014062 tx_last_pass[1][0][10] = 0
4575 18:01:21.017056 tx_win_center[1][0][11] = 0
4576 18:01:21.020230 tx_first_pass[1][0][11] = 0
4577 18:01:21.023816 tx_last_pass[1][0][11] = 0
4578 18:01:21.023908 tx_win_center[1][0][12] = 0
4579 18:01:21.026822 tx_first_pass[1][0][12] = 0
4580 18:01:21.030089 tx_last_pass[1][0][12] = 0
4581 18:01:21.033232 tx_win_center[1][0][13] = 0
4582 18:01:21.033318 tx_first_pass[1][0][13] = 0
4583 18:01:21.036596 tx_last_pass[1][0][13] = 0
4584 18:01:21.040220 tx_win_center[1][0][14] = 0
4585 18:01:21.043112 tx_first_pass[1][0][14] = 0
4586 18:01:21.043207 tx_last_pass[1][0][14] = 0
4587 18:01:21.046670 tx_win_center[1][0][15] = 0
4588 18:01:21.050088 tx_first_pass[1][0][15] = 0
4589 18:01:21.053024 tx_last_pass[1][0][15] = 0
4590 18:01:21.053118 tx_win_center[1][1][0] = 0
4591 18:01:21.056440 tx_first_pass[1][1][0] = 0
4592 18:01:21.059820 tx_last_pass[1][1][0] = 0
4593 18:01:21.063158 tx_win_center[1][1][1] = 0
4594 18:01:21.063250 tx_first_pass[1][1][1] = 0
4595 18:01:21.066125 tx_last_pass[1][1][1] = 0
4596 18:01:21.069488 tx_win_center[1][1][2] = 0
4597 18:01:21.072881 tx_first_pass[1][1][2] = 0
4598 18:01:21.072973 tx_last_pass[1][1][2] = 0
4599 18:01:21.076134 tx_win_center[1][1][3] = 0
4600 18:01:21.079344 tx_first_pass[1][1][3] = 0
4601 18:01:21.079437 tx_last_pass[1][1][3] = 0
4602 18:01:21.082722 tx_win_center[1][1][4] = 0
4603 18:01:21.086028 tx_first_pass[1][1][4] = 0
4604 18:01:21.089254 tx_last_pass[1][1][4] = 0
4605 18:01:21.089345 tx_win_center[1][1][5] = 0
4606 18:01:21.092659 tx_first_pass[1][1][5] = 0
4607 18:01:21.095821 tx_last_pass[1][1][5] = 0
4608 18:01:21.099079 tx_win_center[1][1][6] = 0
4609 18:01:21.099170 tx_first_pass[1][1][6] = 0
4610 18:01:21.102454 tx_last_pass[1][1][6] = 0
4611 18:01:21.105383 tx_win_center[1][1][7] = 0
4612 18:01:21.108800 tx_first_pass[1][1][7] = 0
4613 18:01:21.108893 tx_last_pass[1][1][7] = 0
4614 18:01:21.112097 tx_win_center[1][1][8] = 0
4615 18:01:21.115451 tx_first_pass[1][1][8] = 0
4616 18:01:21.118777 tx_last_pass[1][1][8] = 0
4617 18:01:21.118869 tx_win_center[1][1][9] = 0
4618 18:01:21.122037 tx_first_pass[1][1][9] = 0
4619 18:01:21.125056 tx_last_pass[1][1][9] = 0
4620 18:01:21.128463 tx_win_center[1][1][10] = 0
4621 18:01:21.128563 tx_first_pass[1][1][10] = 0
4622 18:01:21.131710 tx_last_pass[1][1][10] = 0
4623 18:01:21.135069 tx_win_center[1][1][11] = 0
4624 18:01:21.138416 tx_first_pass[1][1][11] = 0
4625 18:01:21.138522 tx_last_pass[1][1][11] = 0
4626 18:01:21.141299 tx_win_center[1][1][12] = 0
4627 18:01:21.144738 tx_first_pass[1][1][12] = 0
4628 18:01:21.148042 tx_last_pass[1][1][12] = 0
4629 18:01:21.148147 tx_win_center[1][1][13] = 0
4630 18:01:21.151411 tx_first_pass[1][1][13] = 0
4631 18:01:21.154840 tx_last_pass[1][1][13] = 0
4632 18:01:21.157803 tx_win_center[1][1][14] = 0
4633 18:01:21.157906 tx_first_pass[1][1][14] = 0
4634 18:01:21.161025 tx_last_pass[1][1][14] = 0
4635 18:01:21.164417 tx_win_center[1][1][15] = 0
4636 18:01:21.167779 tx_first_pass[1][1][15] = 0
4637 18:01:21.170862 tx_last_pass[1][1][15] = 0
4638 18:01:21.170954 dump params rx window
4639 18:01:21.174249 rx_firspass[0][0][0] = 0
4640 18:01:21.177642 rx_lastpass[0][0][0] = 0
4641 18:01:21.177733 rx_firspass[0][0][1] = 0
4642 18:01:21.180671 rx_lastpass[0][0][1] = 0
4643 18:01:21.184235 rx_firspass[0][0][2] = 0
4644 18:01:21.184354 rx_lastpass[0][0][2] = 0
4645 18:01:21.187286 rx_firspass[0][0][3] = 0
4646 18:01:21.190523 rx_lastpass[0][0][3] = 0
4647 18:01:21.190614 rx_firspass[0][0][4] = 0
4648 18:01:21.193912 rx_lastpass[0][0][4] = 0
4649 18:01:21.197146 rx_firspass[0][0][5] = 0
4650 18:01:21.197236 rx_lastpass[0][0][5] = 0
4651 18:01:21.200281 rx_firspass[0][0][6] = 0
4652 18:01:21.203717 rx_lastpass[0][0][6] = 0
4653 18:01:21.206878 rx_firspass[0][0][7] = 0
4654 18:01:21.206969 rx_lastpass[0][0][7] = 0
4655 18:01:21.210486 rx_firspass[0][0][8] = 0
4656 18:01:21.213248 rx_lastpass[0][0][8] = 0
4657 18:01:21.213369 rx_firspass[0][0][9] = 0
4658 18:01:21.216592 rx_lastpass[0][0][9] = 0
4659 18:01:21.219827 rx_firspass[0][0][10] = 0
4660 18:01:21.223329 rx_lastpass[0][0][10] = 0
4661 18:01:21.223419 rx_firspass[0][0][11] = 0
4662 18:01:21.226369 rx_lastpass[0][0][11] = 0
4663 18:01:21.229863 rx_firspass[0][0][12] = 0
4664 18:01:21.229954 rx_lastpass[0][0][12] = 0
4665 18:01:21.233142 rx_firspass[0][0][13] = 0
4666 18:01:21.236223 rx_lastpass[0][0][13] = 0
4667 18:01:21.239474 rx_firspass[0][0][14] = 0
4668 18:01:21.239593 rx_lastpass[0][0][14] = 0
4669 18:01:21.242924 rx_firspass[0][0][15] = 0
4670 18:01:21.245992 rx_lastpass[0][0][15] = 0
4671 18:01:21.246083 rx_firspass[0][1][0] = 0
4672 18:01:21.249292 rx_lastpass[0][1][0] = 0
4673 18:01:21.252561 rx_firspass[0][1][1] = 0
4674 18:01:21.255882 rx_lastpass[0][1][1] = 0
4675 18:01:21.256008 rx_firspass[0][1][2] = 0
4676 18:01:21.259148 rx_lastpass[0][1][2] = 0
4677 18:01:21.262398 rx_firspass[0][1][3] = 0
4678 18:01:21.262496 rx_lastpass[0][1][3] = 0
4679 18:01:21.265859 rx_firspass[0][1][4] = 0
4680 18:01:21.268881 rx_lastpass[0][1][4] = 0
4681 18:01:21.268974 rx_firspass[0][1][5] = 0
4682 18:01:21.272224 rx_lastpass[0][1][5] = 0
4683 18:01:21.275586 rx_firspass[0][1][6] = 0
4684 18:01:21.370190 rx_lastpass[0][1][6] = 0
4685 18:01:21.370322 rx_firspass[0][1][7] = 0
4686 18:01:21.370402 rx_lastpass[0][1][7] = 0
4687 18:01:21.370469 rx_firspass[0][1][8] = 0
4688 18:01:21.370533 rx_lastpass[0][1][8] = 0
4689 18:01:21.370596 rx_firspass[0][1][9] = 0
4690 18:01:21.370657 rx_lastpass[0][1][9] = 0
4691 18:01:21.370718 rx_firspass[0][1][10] = 0
4692 18:01:21.370778 rx_lastpass[0][1][10] = 0
4693 18:01:21.370859 rx_firspass[0][1][11] = 0
4694 18:01:21.370975 rx_lastpass[0][1][11] = 0
4695 18:01:21.371068 rx_firspass[0][1][12] = 0
4696 18:01:21.371136 rx_lastpass[0][1][12] = 0
4697 18:01:21.371197 rx_firspass[0][1][13] = 0
4698 18:01:21.371257 rx_lastpass[0][1][13] = 0
4699 18:01:21.371345 rx_firspass[0][1][14] = 0
4700 18:01:21.371410 rx_lastpass[0][1][14] = 0
4701 18:01:21.371470 rx_firspass[0][1][15] = 0
4702 18:01:21.371530 rx_lastpass[0][1][15] = 0
4703 18:01:21.371589 rx_firspass[1][0][0] = 0
4704 18:01:21.371649 rx_lastpass[1][0][0] = 0
4705 18:01:21.371707 rx_firspass[1][0][1] = 0
4706 18:01:21.371766 rx_lastpass[1][0][1] = 0
4707 18:01:21.371826 rx_firspass[1][0][2] = 0
4708 18:01:21.371884 rx_lastpass[1][0][2] = 0
4709 18:01:21.371943 rx_firspass[1][0][3] = 0
4710 18:01:21.372003 rx_lastpass[1][0][3] = 0
4711 18:01:21.372062 rx_firspass[1][0][4] = 0
4712 18:01:21.372121 rx_lastpass[1][0][4] = 0
4713 18:01:21.372179 rx_firspass[1][0][5] = 0
4714 18:01:21.372238 rx_lastpass[1][0][5] = 0
4715 18:01:21.372296 rx_firspass[1][0][6] = 0
4716 18:01:21.372355 rx_lastpass[1][0][6] = 0
4717 18:01:21.372414 rx_firspass[1][0][7] = 0
4718 18:01:21.372472 rx_lastpass[1][0][7] = 0
4719 18:01:21.372530 rx_firspass[1][0][8] = 0
4720 18:01:21.372589 rx_lastpass[1][0][8] = 0
4721 18:01:21.372647 rx_firspass[1][0][9] = 0
4722 18:01:21.372705 rx_lastpass[1][0][9] = 0
4723 18:01:21.372764 rx_firspass[1][0][10] = 0
4724 18:01:21.373025 rx_lastpass[1][0][10] = 0
4725 18:01:21.373810 rx_firspass[1][0][11] = 0
4726 18:01:21.373924 rx_lastpass[1][0][11] = 0
4727 18:01:21.377099 rx_firspass[1][0][12] = 0
4728 18:01:21.380103 rx_lastpass[1][0][12] = 0
4729 18:01:21.380239 rx_firspass[1][0][13] = 0
4730 18:01:21.383630 rx_lastpass[1][0][13] = 0
4731 18:01:21.387051 rx_firspass[1][0][14] = 0
4732 18:01:21.390001 rx_lastpass[1][0][14] = 0
4733 18:01:21.390141 rx_firspass[1][0][15] = 0
4734 18:01:21.393301 rx_lastpass[1][0][15] = 0
4735 18:01:21.396884 rx_firspass[1][1][0] = 0
4736 18:01:21.397076 rx_lastpass[1][1][0] = 0
4737 18:01:21.399730 rx_firspass[1][1][1] = 0
4738 18:01:21.403153 rx_lastpass[1][1][1] = 0
4739 18:01:21.406208 rx_firspass[1][1][2] = 0
4740 18:01:21.406472 rx_lastpass[1][1][2] = 0
4741 18:01:21.409612 rx_firspass[1][1][3] = 0
4742 18:01:21.412931 rx_lastpass[1][1][3] = 0
4743 18:01:21.413104 rx_firspass[1][1][4] = 0
4744 18:01:21.416157 rx_lastpass[1][1][4] = 0
4745 18:01:21.419324 rx_firspass[1][1][5] = 0
4746 18:01:21.419448 rx_lastpass[1][1][5] = 0
4747 18:01:21.422917 rx_firspass[1][1][6] = 0
4748 18:01:21.426054 rx_lastpass[1][1][6] = 0
4749 18:01:21.429184 rx_firspass[1][1][7] = 0
4750 18:01:21.429304 rx_lastpass[1][1][7] = 0
4751 18:01:21.432503 rx_firspass[1][1][8] = 0
4752 18:01:21.435862 rx_lastpass[1][1][8] = 0
4753 18:01:21.435980 rx_firspass[1][1][9] = 0
4754 18:01:21.439182 rx_lastpass[1][1][9] = 0
4755 18:01:21.442453 rx_firspass[1][1][10] = 0
4756 18:01:21.445356 rx_lastpass[1][1][10] = 0
4757 18:01:21.445543 rx_firspass[1][1][11] = 0
4758 18:01:21.448705 rx_lastpass[1][1][11] = 0
4759 18:01:21.451966 rx_firspass[1][1][12] = 0
4760 18:01:21.452080 rx_lastpass[1][1][12] = 0
4761 18:01:21.455289 rx_firspass[1][1][13] = 0
4762 18:01:21.458731 rx_lastpass[1][1][13] = 0
4763 18:01:21.462132 rx_firspass[1][1][14] = 0
4764 18:01:21.462292 rx_lastpass[1][1][14] = 0
4765 18:01:21.465061 rx_firspass[1][1][15] = 0
4766 18:01:21.468501 rx_lastpass[1][1][15] = 0
4767 18:01:21.468622 dump params clk_delay
4768 18:01:21.471763 clk_delay[0] = 0
4769 18:01:21.471914 clk_delay[1] = 0
4770 18:01:21.475141 dump params dqs_delay
4771 18:01:21.475278 dqs_delay[0][0] = 0
4772 18:01:21.478419 dqs_delay[0][1] = 0
4773 18:01:21.481654 dqs_delay[1][0] = 0
4774 18:01:21.481814 dqs_delay[1][1] = 0
4775 18:01:21.484915 dump params delay_cell_unit = 744
4776 18:01:21.487897 dump source = 0x0
4777 18:01:21.488049 dump params frequency:800
4778 18:01:21.491356 dump params rank number:2
4779 18:01:21.491514
4780 18:01:21.494718 dump params write leveling
4781 18:01:21.498036 write leveling[0][0][0] = 0x0
4782 18:01:21.498164 write leveling[0][0][1] = 0x0
4783 18:01:21.501125 write leveling[0][1][0] = 0x0
4784 18:01:21.504419 write leveling[0][1][1] = 0x0
4785 18:01:21.507777 write leveling[1][0][0] = 0x0
4786 18:01:21.511197 write leveling[1][0][1] = 0x0
4787 18:01:21.514297 write leveling[1][1][0] = 0x0
4788 18:01:21.514436 write leveling[1][1][1] = 0x0
4789 18:01:21.517695 dump params cbt_cs
4790 18:01:21.517873 cbt_cs[0][0] = 0x0
4791 18:01:21.520612 cbt_cs[0][1] = 0x0
4792 18:01:21.520724 cbt_cs[1][0] = 0x0
4793 18:01:21.524063 cbt_cs[1][1] = 0x0
4794 18:01:21.527385 dump params cbt_mr12
4795 18:01:21.527508 cbt_mr12[0][0] = 0x0
4796 18:01:21.530587 cbt_mr12[0][1] = 0x0
4797 18:01:21.530668 cbt_mr12[1][0] = 0x0
4798 18:01:21.534151 cbt_mr12[1][1] = 0x0
4799 18:01:21.534234 dump params tx window
4800 18:01:21.537200 tx_center_min[0][0][0] = 0
4801 18:01:21.540644 tx_center_max[0][0][0] = 0
4802 18:01:21.543642 tx_center_min[0][0][1] = 0
4803 18:01:21.543756 tx_center_max[0][0][1] = 0
4804 18:01:21.546891 tx_center_min[0][1][0] = 0
4805 18:01:21.550462 tx_center_max[0][1][0] = 0
4806 18:01:21.553736 tx_center_min[0][1][1] = 0
4807 18:01:21.553846 tx_center_max[0][1][1] = 0
4808 18:01:21.556895 tx_center_min[1][0][0] = 0
4809 18:01:21.560229 tx_center_max[1][0][0] = 0
4810 18:01:21.563326 tx_center_min[1][0][1] = 0
4811 18:01:21.563417 tx_center_max[1][0][1] = 0
4812 18:01:21.566779 tx_center_min[1][1][0] = 0
4813 18:01:21.569721 tx_center_max[1][1][0] = 0
4814 18:01:21.573208 tx_center_min[1][1][1] = 0
4815 18:01:21.573317 tx_center_max[1][1][1] = 0
4816 18:01:21.576163 dump params tx window
4817 18:01:21.579663 tx_win_center[0][0][0] = 0
4818 18:01:21.583080 tx_first_pass[0][0][0] = 0
4819 18:01:21.583172 tx_last_pass[0][0][0] = 0
4820 18:01:21.586379 tx_win_center[0][0][1] = 0
4821 18:01:21.589568 tx_first_pass[0][0][1] = 0
4822 18:01:21.592637 tx_last_pass[0][0][1] = 0
4823 18:01:21.592729 tx_win_center[0][0][2] = 0
4824 18:01:21.596040 tx_first_pass[0][0][2] = 0
4825 18:01:21.599414 tx_last_pass[0][0][2] = 0
4826 18:01:21.599510 tx_win_center[0][0][3] = 0
4827 18:01:21.602801 tx_first_pass[0][0][3] = 0
4828 18:01:21.605849 tx_last_pass[0][0][3] = 0
4829 18:01:21.609371 tx_win_center[0][0][4] = 0
4830 18:01:21.609526 tx_first_pass[0][0][4] = 0
4831 18:01:21.612430 tx_last_pass[0][0][4] = 0
4832 18:01:21.615796 tx_win_center[0][0][5] = 0
4833 18:01:21.619076 tx_first_pass[0][0][5] = 0
4834 18:01:21.619259 tx_last_pass[0][0][5] = 0
4835 18:01:21.622152 tx_win_center[0][0][6] = 0
4836 18:01:21.625417 tx_first_pass[0][0][6] = 0
4837 18:01:21.628983 tx_last_pass[0][0][6] = 0
4838 18:01:21.629094 tx_win_center[0][0][7] = 0
4839 18:01:21.631964 tx_first_pass[0][0][7] = 0
4840 18:01:21.635514 tx_last_pass[0][0][7] = 0
4841 18:01:21.638728 tx_win_center[0][0][8] = 0
4842 18:01:21.638836 tx_first_pass[0][0][8] = 0
4843 18:01:21.641832 tx_last_pass[0][0][8] = 0
4844 18:01:21.645463 tx_win_center[0][0][9] = 0
4845 18:01:21.645594 tx_first_pass[0][0][9] = 0
4846 18:01:21.648461 tx_last_pass[0][0][9] = 0
4847 18:01:21.651729 tx_win_center[0][0][10] = 0
4848 18:01:21.655413 tx_first_pass[0][0][10] = 0
4849 18:01:21.655579 tx_last_pass[0][0][10] = 0
4850 18:01:21.658323 tx_win_center[0][0][11] = 0
4851 18:01:21.661501 tx_first_pass[0][0][11] = 0
4852 18:01:21.664972 tx_last_pass[0][0][11] = 0
4853 18:01:21.668311 tx_win_center[0][0][12] = 0
4854 18:01:21.668537 tx_first_pass[0][0][12] = 0
4855 18:01:21.671383 tx_last_pass[0][0][12] = 0
4856 18:01:21.674868 tx_win_center[0][0][13] = 0
4857 18:01:21.677864 tx_first_pass[0][0][13] = 0
4858 18:01:21.678349 tx_last_pass[0][0][13] = 0
4859 18:01:21.681313 tx_win_center[0][0][14] = 0
4860 18:01:21.684478 tx_first_pass[0][0][14] = 0
4861 18:01:21.688006 tx_last_pass[0][0][14] = 0
4862 18:01:21.688480 tx_win_center[0][0][15] = 0
4863 18:01:21.691461 tx_first_pass[0][0][15] = 0
4864 18:01:21.694418 tx_last_pass[0][0][15] = 0
4865 18:01:21.697634 tx_win_center[0][1][0] = 0
4866 18:01:21.698101 tx_first_pass[0][1][0] = 0
4867 18:01:21.701062 tx_last_pass[0][1][0] = 0
4868 18:01:21.704386 tx_win_center[0][1][1] = 0
4869 18:01:21.707666 tx_first_pass[0][1][1] = 0
4870 18:01:21.708047 tx_last_pass[0][1][1] = 0
4871 18:01:21.710942 tx_win_center[0][1][2] = 0
4872 18:01:21.714439 tx_first_pass[0][1][2] = 0
4873 18:01:21.717387 tx_last_pass[0][1][2] = 0
4874 18:01:21.718046 tx_win_center[0][1][3] = 0
4875 18:01:21.720769 tx_first_pass[0][1][3] = 0
4876 18:01:21.723968 tx_last_pass[0][1][3] = 0
4877 18:01:21.727354 tx_win_center[0][1][4] = 0
4878 18:01:21.727846 tx_first_pass[0][1][4] = 0
4879 18:01:21.730333 tx_last_pass[0][1][4] = 0
4880 18:01:21.733758 tx_win_center[0][1][5] = 0
4881 18:01:21.736845 tx_first_pass[0][1][5] = 0
4882 18:01:21.737107 tx_last_pass[0][1][5] = 0
4883 18:01:21.740254 tx_win_center[0][1][6] = 0
4884 18:01:21.743176 tx_first_pass[0][1][6] = 0
4885 18:01:21.743381 tx_last_pass[0][1][6] = 0
4886 18:01:21.746549 tx_win_center[0][1][7] = 0
4887 18:01:21.749811 tx_first_pass[0][1][7] = 0
4888 18:01:21.752825 tx_last_pass[0][1][7] = 0
4889 18:01:21.753019 tx_win_center[0][1][8] = 0
4890 18:01:21.756352 tx_first_pass[0][1][8] = 0
4891 18:01:21.759424 tx_last_pass[0][1][8] = 0
4892 18:01:21.762666 tx_win_center[0][1][9] = 0
4893 18:01:21.762834 tx_first_pass[0][1][9] = 0
4894 18:01:21.766002 tx_last_pass[0][1][9] = 0
4895 18:01:21.769612 tx_win_center[0][1][10] = 0
4896 18:01:21.772629 tx_first_pass[0][1][10] = 0
4897 18:01:21.772720 tx_last_pass[0][1][10] = 0
4898 18:01:21.775971 tx_win_center[0][1][11] = 0
4899 18:01:21.779033 tx_first_pass[0][1][11] = 0
4900 18:01:21.782560 tx_last_pass[0][1][11] = 0
4901 18:01:21.782642 tx_win_center[0][1][12] = 0
4902 18:01:21.785850 tx_first_pass[0][1][12] = 0
4903 18:01:21.789181 tx_last_pass[0][1][12] = 0
4904 18:01:21.792270 tx_win_center[0][1][13] = 0
4905 18:01:21.795608 tx_first_pass[0][1][13] = 0
4906 18:01:21.795706 tx_last_pass[0][1][13] = 0
4907 18:01:21.799025 tx_win_center[0][1][14] = 0
4908 18:01:21.802061 tx_first_pass[0][1][14] = 0
4909 18:01:21.805480 tx_last_pass[0][1][14] = 0
4910 18:01:21.805597 tx_win_center[0][1][15] = 0
4911 18:01:21.808873 tx_first_pass[0][1][15] = 0
4912 18:01:21.811883 tx_last_pass[0][1][15] = 0
4913 18:01:21.815274 tx_win_center[1][0][0] = 0
4914 18:01:21.815425 tx_first_pass[1][0][0] = 0
4915 18:01:21.818781 tx_last_pass[1][0][0] = 0
4916 18:01:21.821781 tx_win_center[1][0][1] = 0
4917 18:01:21.825097 tx_first_pass[1][0][1] = 0
4918 18:01:21.825262 tx_last_pass[1][0][1] = 0
4919 18:01:21.828275 tx_win_center[1][0][2] = 0
4920 18:01:21.831767 tx_first_pass[1][0][2] = 0
4921 18:01:21.832054 tx_last_pass[1][0][2] = 0
4922 18:01:21.835075 tx_win_center[1][0][3] = 0
4923 18:01:21.838186 tx_first_pass[1][0][3] = 0
4924 18:01:21.841803 tx_last_pass[1][0][3] = 0
4925 18:01:21.842223 tx_win_center[1][0][4] = 0
4926 18:01:21.845272 tx_first_pass[1][0][4] = 0
4927 18:01:21.848472 tx_last_pass[1][0][4] = 0
4928 18:01:21.851608 tx_win_center[1][0][5] = 0
4929 18:01:21.852069 tx_first_pass[1][0][5] = 0
4930 18:01:21.854952 tx_last_pass[1][0][5] = 0
4931 18:01:21.858216 tx_win_center[1][0][6] = 0
4932 18:01:21.861527 tx_first_pass[1][0][6] = 0
4933 18:01:21.861979 tx_last_pass[1][0][6] = 0
4934 18:01:21.864886 tx_win_center[1][0][7] = 0
4935 18:01:21.868263 tx_first_pass[1][0][7] = 0
4936 18:01:21.871175 tx_last_pass[1][0][7] = 0
4937 18:01:21.871676 tx_win_center[1][0][8] = 0
4938 18:01:21.874522 tx_first_pass[1][0][8] = 0
4939 18:01:21.878049 tx_last_pass[1][0][8] = 0
4940 18:01:21.878550 tx_win_center[1][0][9] = 0
4941 18:01:21.880970 tx_first_pass[1][0][9] = 0
4942 18:01:21.884459 tx_last_pass[1][0][9] = 0
4943 18:01:21.887654 tx_win_center[1][0][10] = 0
4944 18:01:21.888229 tx_first_pass[1][0][10] = 0
4945 18:01:21.891080 tx_last_pass[1][0][10] = 0
4946 18:01:21.894130 tx_win_center[1][0][11] = 0
4947 18:01:21.897225 tx_first_pass[1][0][11] = 0
4948 18:01:21.900709 tx_last_pass[1][0][11] = 0
4949 18:01:21.901211 tx_win_center[1][0][12] = 0
4950 18:01:21.903736 tx_first_pass[1][0][12] = 0
4951 18:01:21.907261 tx_last_pass[1][0][12] = 0
4952 18:01:21.910382 tx_win_center[1][0][13] = 0
4953 18:01:21.910857 tx_first_pass[1][0][13] = 0
4954 18:01:21.913745 tx_last_pass[1][0][13] = 0
4955 18:01:21.916976 tx_win_center[1][0][14] = 0
4956 18:01:21.920475 tx_first_pass[1][0][14] = 0
4957 18:01:21.920908 tx_last_pass[1][0][14] = 0
4958 18:01:21.923458 tx_win_center[1][0][15] = 0
4959 18:01:21.926832 tx_first_pass[1][0][15] = 0
4960 18:01:21.930313 tx_last_pass[1][0][15] = 0
4961 18:01:21.930879 tx_win_center[1][1][0] = 0
4962 18:01:21.933342 tx_first_pass[1][1][0] = 0
4963 18:01:21.936545 tx_last_pass[1][1][0] = 0
4964 18:01:21.939990 tx_win_center[1][1][1] = 0
4965 18:01:21.940592 tx_first_pass[1][1][1] = 0
4966 18:01:21.943397 tx_last_pass[1][1][1] = 0
4967 18:01:21.946324 tx_win_center[1][1][2] = 0
4968 18:01:21.949863 tx_first_pass[1][1][2] = 0
4969 18:01:21.950274 tx_last_pass[1][1][2] = 0
4970 18:01:21.952856 tx_win_center[1][1][3] = 0
4971 18:01:21.956388 tx_first_pass[1][1][3] = 0
4972 18:01:21.959830 tx_last_pass[1][1][3] = 0
4973 18:01:21.960237 tx_win_center[1][1][4] = 0
4974 18:01:21.962827 tx_first_pass[1][1][4] = 0
4975 18:01:21.966270 tx_last_pass[1][1][4] = 0
4976 18:01:21.966685 tx_win_center[1][1][5] = 0
4977 18:01:21.969556 tx_first_pass[1][1][5] = 0
4978 18:01:21.972755 tx_last_pass[1][1][5] = 0
4979 18:01:21.976121 tx_win_center[1][1][6] = 0
4980 18:01:21.976599 tx_first_pass[1][1][6] = 0
4981 18:01:21.979265 tx_last_pass[1][1][6] = 0
4982 18:01:21.982512 tx_win_center[1][1][7] = 0
4983 18:01:21.985625 tx_first_pass[1][1][7] = 0
4984 18:01:21.986047 tx_last_pass[1][1][7] = 0
4985 18:01:21.989118 tx_win_center[1][1][8] = 0
4986 18:01:21.992631 tx_first_pass[1][1][8] = 0
4987 18:01:21.995750 tx_last_pass[1][1][8] = 0
4988 18:01:21.996159 tx_win_center[1][1][9] = 0
4989 18:01:21.998708 tx_first_pass[1][1][9] = 0
4990 18:01:22.002018 tx_last_pass[1][1][9] = 0
4991 18:01:22.005506 tx_win_center[1][1][10] = 0
4992 18:01:22.005996 tx_first_pass[1][1][10] = 0
4993 18:01:22.008555 tx_last_pass[1][1][10] = 0
4994 18:01:22.011981 tx_win_center[1][1][11] = 0
4995 18:01:22.015298 tx_first_pass[1][1][11] = 0
4996 18:01:22.015717 tx_last_pass[1][1][11] = 0
4997 18:01:22.018295 tx_win_center[1][1][12] = 0
4998 18:01:22.021651 tx_first_pass[1][1][12] = 0
4999 18:01:22.024752 tx_last_pass[1][1][12] = 0
5000 18:01:22.024843 tx_win_center[1][1][13] = 0
5001 18:01:22.028119 tx_first_pass[1][1][13] = 0
5002 18:01:22.031127 tx_last_pass[1][1][13] = 0
5003 18:01:22.034580 tx_win_center[1][1][14] = 0
5004 18:01:22.037652 tx_first_pass[1][1][14] = 0
5005 18:01:22.037764 tx_last_pass[1][1][14] = 0
5006 18:01:22.041031 tx_win_center[1][1][15] = 0
5007 18:01:22.044426 tx_first_pass[1][1][15] = 0
5008 18:01:22.047386 tx_last_pass[1][1][15] = 0
5009 18:01:22.047505 dump params rx window
5010 18:01:22.050937 rx_firspass[0][0][0] = 0
5011 18:01:22.054367 rx_lastpass[0][0][0] = 0
5012 18:01:22.054467 rx_firspass[0][0][1] = 0
5013 18:01:22.057634 rx_lastpass[0][0][1] = 0
5014 18:01:22.060545 rx_firspass[0][0][2] = 0
5015 18:01:22.060650 rx_lastpass[0][0][2] = 0
5016 18:01:22.063948 rx_firspass[0][0][3] = 0
5017 18:01:22.067087 rx_lastpass[0][0][3] = 0
5018 18:01:22.067209 rx_firspass[0][0][4] = 0
5019 18:01:22.070380 rx_lastpass[0][0][4] = 0
5020 18:01:22.073853 rx_firspass[0][0][5] = 0
5021 18:01:22.076995 rx_lastpass[0][0][5] = 0
5022 18:01:22.077123 rx_firspass[0][0][6] = 0
5023 18:01:22.080515 rx_lastpass[0][0][6] = 0
5024 18:01:22.083814 rx_firspass[0][0][7] = 0
5025 18:01:22.083934 rx_lastpass[0][0][7] = 0
5026 18:01:22.086803 rx_firspass[0][0][8] = 0
5027 18:01:22.090317 rx_lastpass[0][0][8] = 0
5028 18:01:22.090439 rx_firspass[0][0][9] = 0
5029 18:01:22.093690 rx_lastpass[0][0][9] = 0
5030 18:01:22.096761 rx_firspass[0][0][10] = 0
5031 18:01:22.100121 rx_lastpass[0][0][10] = 0
5032 18:01:22.100218 rx_firspass[0][0][11] = 0
5033 18:01:22.103442 rx_lastpass[0][0][11] = 0
5034 18:01:22.106597 rx_firspass[0][0][12] = 0
5035 18:01:22.106693 rx_lastpass[0][0][12] = 0
5036 18:01:22.109743 rx_firspass[0][0][13] = 0
5037 18:01:22.112990 rx_lastpass[0][0][13] = 0
5038 18:01:22.116388 rx_firspass[0][0][14] = 0
5039 18:01:22.116478 rx_lastpass[0][0][14] = 0
5040 18:01:22.119386 rx_firspass[0][0][15] = 0
5041 18:01:22.122769 rx_lastpass[0][0][15] = 0
5042 18:01:22.122858 rx_firspass[0][1][0] = 0
5043 18:01:22.126071 rx_lastpass[0][1][0] = 0
5044 18:01:22.129419 rx_firspass[0][1][1] = 0
5045 18:01:22.132687 rx_lastpass[0][1][1] = 0
5046 18:01:22.132777 rx_firspass[0][1][2] = 0
5047 18:01:22.135947 rx_lastpass[0][1][2] = 0
5048 18:01:22.138978 rx_firspass[0][1][3] = 0
5049 18:01:22.139068 rx_lastpass[0][1][3] = 0
5050 18:01:22.142502 rx_firspass[0][1][4] = 0
5051 18:01:22.145814 rx_lastpass[0][1][4] = 0
5052 18:01:22.145904 rx_firspass[0][1][5] = 0
5053 18:01:22.149165 rx_lastpass[0][1][5] = 0
5054 18:01:22.152188 rx_firspass[0][1][6] = 0
5055 18:01:22.155646 rx_lastpass[0][1][6] = 0
5056 18:01:22.155739 rx_firspass[0][1][7] = 0
5057 18:01:22.158707 rx_lastpass[0][1][7] = 0
5058 18:01:22.162228 rx_firspass[0][1][8] = 0
5059 18:01:22.162317 rx_lastpass[0][1][8] = 0
5060 18:01:22.165577 rx_firspass[0][1][9] = 0
5061 18:01:22.168851 rx_lastpass[0][1][9] = 0
5062 18:01:22.168945 rx_firspass[0][1][10] = 0
5063 18:01:22.171850 rx_lastpass[0][1][10] = 0
5064 18:01:22.175261 rx_firspass[0][1][11] = 0
5065 18:01:22.178427 rx_lastpass[0][1][11] = 0
5066 18:01:22.178540 rx_firspass[0][1][12] = 0
5067 18:01:22.181736 rx_lastpass[0][1][12] = 0
5068 18:01:22.185094 rx_firspass[0][1][13] = 0
5069 18:01:22.188125 rx_lastpass[0][1][13] = 0
5070 18:01:22.188266 rx_firspass[0][1][14] = 0
5071 18:01:22.191451 rx_lastpass[0][1][14] = 0
5072 18:01:22.194820 rx_firspass[0][1][15] = 0
5073 18:01:22.194913 rx_lastpass[0][1][15] = 0
5074 18:01:22.197808 rx_firspass[1][0][0] = 0
5075 18:01:22.201229 rx_lastpass[1][0][0] = 0
5076 18:01:22.204672 rx_firspass[1][0][1] = 0
5077 18:01:22.204763 rx_lastpass[1][0][1] = 0
5078 18:01:22.207830 rx_firspass[1][0][2] = 0
5079 18:01:22.211148 rx_lastpass[1][0][2] = 0
5080 18:01:22.211239 rx_firspass[1][0][3] = 0
5081 18:01:22.214389 rx_lastpass[1][0][3] = 0
5082 18:01:22.217752 rx_firspass[1][0][4] = 0
5083 18:01:22.217843 rx_lastpass[1][0][4] = 0
5084 18:01:22.220778 rx_firspass[1][0][5] = 0
5085 18:01:22.224224 rx_lastpass[1][0][5] = 0
5086 18:01:22.227532 rx_firspass[1][0][6] = 0
5087 18:01:22.227623 rx_lastpass[1][0][6] = 0
5088 18:01:22.230542 rx_firspass[1][0][7] = 0
5089 18:01:22.233810 rx_lastpass[1][0][7] = 0
5090 18:01:22.233894 rx_firspass[1][0][8] = 0
5091 18:01:22.237081 rx_lastpass[1][0][8] = 0
5092 18:01:22.240356 rx_firspass[1][0][9] = 0
5093 18:01:22.240476 rx_lastpass[1][0][9] = 0
5094 18:01:22.243978 rx_firspass[1][0][10] = 0
5095 18:01:22.247095 rx_lastpass[1][0][10] = 0
5096 18:01:22.250440 rx_firspass[1][0][11] = 0
5097 18:01:22.250530 rx_lastpass[1][0][11] = 0
5098 18:01:22.253521 rx_firspass[1][0][12] = 0
5099 18:01:22.256963 rx_lastpass[1][0][12] = 0
5100 18:01:22.257053 rx_firspass[1][0][13] = 0
5101 18:01:22.259983 rx_lastpass[1][0][13] = 0
5102 18:01:22.263438 rx_firspass[1][0][14] = 0
5103 18:01:22.266852 rx_lastpass[1][0][14] = 0
5104 18:01:22.266941 rx_firspass[1][0][15] = 0
5105 18:01:22.269992 rx_lastpass[1][0][15] = 0
5106 18:01:22.273118 rx_firspass[1][1][0] = 0
5107 18:01:22.276530 rx_lastpass[1][1][0] = 0
5108 18:01:22.276649 rx_firspass[1][1][1] = 0
5109 18:01:22.279767 rx_lastpass[1][1][1] = 0
5110 18:01:22.282884 rx_firspass[1][1][2] = 0
5111 18:01:22.282974 rx_lastpass[1][1][2] = 0
5112 18:01:22.286393 rx_firspass[1][1][3] = 0
5113 18:01:22.289438 rx_lastpass[1][1][3] = 0
5114 18:01:22.289524 rx_firspass[1][1][4] = 0
5115 18:01:22.292777 rx_lastpass[1][1][4] = 0
5116 18:01:22.296008 rx_firspass[1][1][5] = 0
5117 18:01:22.296094 rx_lastpass[1][1][5] = 0
5118 18:01:22.299496 rx_firspass[1][1][6] = 0
5119 18:01:22.302941 rx_lastpass[1][1][6] = 0
5120 18:01:22.305844 rx_firspass[1][1][7] = 0
5121 18:01:22.305934 rx_lastpass[1][1][7] = 0
5122 18:01:22.309304 rx_firspass[1][1][8] = 0
5123 18:01:22.312664 rx_lastpass[1][1][8] = 0
5124 18:01:22.312755 rx_firspass[1][1][9] = 0
5125 18:01:22.315585 rx_lastpass[1][1][9] = 0
5126 18:01:22.319219 rx_firspass[1][1][10] = 0
5127 18:01:22.322356 rx_lastpass[1][1][10] = 0
5128 18:01:22.322447 rx_firspass[1][1][11] = 0
5129 18:01:22.325704 rx_lastpass[1][1][11] = 0
5130 18:01:22.329092 rx_firspass[1][1][12] = 0
5131 18:01:22.329183 rx_lastpass[1][1][12] = 0
5132 18:01:22.332210 rx_firspass[1][1][13] = 0
5133 18:01:22.335565 rx_lastpass[1][1][13] = 0
5134 18:01:22.338836 rx_firspass[1][1][14] = 0
5135 18:01:22.338926 rx_lastpass[1][1][14] = 0
5136 18:01:22.342319 rx_firspass[1][1][15] = 0
5137 18:01:22.345218 rx_lastpass[1][1][15] = 0
5138 18:01:22.345308 dump params clk_delay
5139 18:01:22.348522 clk_delay[0] = 0
5140 18:01:22.348613 clk_delay[1] = 0
5141 18:01:22.351713 dump params dqs_delay
5142 18:01:22.351803 dqs_delay[0][0] = 0
5143 18:01:22.355190 dqs_delay[0][1] = 0
5144 18:01:22.358282 dqs_delay[1][0] = 0
5145 18:01:22.358372 dqs_delay[1][1] = 0
5146 18:01:22.361723 dump params delay_cell_unit = 744
5147 18:01:22.364916 mt_set_emi_preloader end
5148 18:01:22.368231 [mt_mem_init] dram size: 0x100000000, rank number: 2
5149 18:01:22.374750 [complex_mem_test] start addr:0x40000000, len:20480
5150 18:01:22.409845 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5151 18:01:22.416650 [complex_mem_test] start addr:0x80000000, len:20480
5152 18:01:22.452231 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5153 18:01:22.458720 [complex_mem_test] start addr:0xc0000000, len:20480
5154 18:01:22.494697 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5155 18:01:22.500937 [complex_mem_test] start addr:0x56000000, len:8192
5156 18:01:22.517856 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5157 18:01:22.521280 ddr_geometry:1
5158 18:01:22.524229 [complex_mem_test] start addr:0x80000000, len:8192
5159 18:01:22.541383 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5160 18:01:22.544899 dram_init: dram init end (result: 0)
5161 18:01:22.551332 Successfully loaded DRAM blobs and ran DRAM calibration
5162 18:01:22.561081 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5163 18:01:22.561172 CBMEM:
5164 18:01:22.564538 IMD: root @ 00000000fffff000 254 entries.
5165 18:01:22.567579 IMD: root @ 00000000ffffec00 62 entries.
5166 18:01:22.574333 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5167 18:01:22.581094 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5168 18:01:22.583975 in-header: 03 a1 00 00 08 00 00 00
5169 18:01:22.587464 in-data: 84 60 60 10 00 00 00 00
5170 18:01:22.590560 Chrome EC: clear events_b mask to 0x0000000020004000
5171 18:01:22.597347 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5172 18:01:22.600905 in-header: 03 fd 00 00 00 00 00 00
5173 18:01:22.604249 in-data:
5174 18:01:22.607567 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5175 18:01:22.610886 CBFS @ 21000 size 3d4000
5176 18:01:22.614324 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5177 18:01:22.617366 CBFS: Locating 'fallback/ramstage'
5178 18:01:22.620779 CBFS: Found @ offset 10d40 size d563
5179 18:01:22.643152 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5180 18:01:22.655621 Accumulated console time in romstage 13627 ms
5181 18:01:22.655714
5182 18:01:22.655785
5183 18:01:22.665387 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5184 18:01:22.668765 ARM64: Exception handlers installed.
5185 18:01:22.668881 ARM64: Testing exception
5186 18:01:22.671856 ARM64: Done test exception
5187 18:01:22.675029 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5188 18:01:22.678268 Manufacturer: ef
5189 18:01:22.684893 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5190 18:01:22.688208 WARNING: RO_VPD is uninitialized or empty.
5191 18:01:22.691374 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5192 18:01:22.694825 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5193 18:01:22.705239 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5194 18:01:22.708243 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5195 18:01:22.715110 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5196 18:01:22.715201 Enumerating buses...
5197 18:01:22.721369 Show all devs... Before device enumeration.
5198 18:01:22.721484 Root Device: enabled 1
5199 18:01:22.724805 CPU_CLUSTER: 0: enabled 1
5200 18:01:22.727802 CPU: 00: enabled 1
5201 18:01:22.727892 Compare with tree...
5202 18:01:22.731140 Root Device: enabled 1
5203 18:01:22.734368 CPU_CLUSTER: 0: enabled 1
5204 18:01:22.734457 CPU: 00: enabled 1
5205 18:01:22.737820 Root Device scanning...
5206 18:01:22.740997 root_dev_scan_bus for Root Device
5207 18:01:22.741125 CPU_CLUSTER: 0 enabled
5208 18:01:22.744388 root_dev_scan_bus for Root Device done
5209 18:01:22.750609 scan_bus: scanning of bus Root Device took 10688 usecs
5210 18:01:22.750704 done
5211 18:01:22.754210 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5212 18:01:22.757633 Allocating resources...
5213 18:01:22.760627 Reading resources...
5214 18:01:22.764086 Root Device read_resources bus 0 link: 0
5215 18:01:22.767289 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5216 18:01:22.770665 CPU: 00 missing read_resources
5217 18:01:22.773758 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5218 18:01:22.777067 Root Device read_resources bus 0 link: 0 done
5219 18:01:22.780355 Done reading resources.
5220 18:01:22.787235 Show resources in subtree (Root Device)...After reading.
5221 18:01:22.790329 Root Device child on link 0 CPU_CLUSTER: 0
5222 18:01:22.793756 CPU_CLUSTER: 0 child on link 0 CPU: 00
5223 18:01:22.803413 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5224 18:01:22.803511 CPU: 00
5225 18:01:22.803582 Setting resources...
5226 18:01:22.809926 Root Device assign_resources, bus 0 link: 0
5227 18:01:22.813109 CPU_CLUSTER: 0 missing set_resources
5228 18:01:22.816348 Root Device assign_resources, bus 0 link: 0
5229 18:01:22.816442 Done setting resources.
5230 18:01:22.823079 Show resources in subtree (Root Device)...After assigning values.
5231 18:01:22.826113 Root Device child on link 0 CPU_CLUSTER: 0
5232 18:01:22.829613 CPU_CLUSTER: 0 child on link 0 CPU: 00
5233 18:01:22.839192 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5234 18:01:22.839336 CPU: 00
5235 18:01:22.842694 Done allocating resources.
5236 18:01:22.849210 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5237 18:01:22.849352 Enabling resources...
5238 18:01:22.849481 done.
5239 18:01:22.855687 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5240 18:01:22.855785 Initializing devices...
5241 18:01:22.859034 Root Device init ...
5242 18:01:22.862265 mainboard_init: Starting display init.
5243 18:01:22.865175 ADC[4]: Raw value=75836 ID=0
5244 18:01:22.887887 anx7625_power_on_init: Init interface.
5245 18:01:22.891065 anx7625_disable_pd_protocol: Disabled PD feature.
5246 18:01:22.897511 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5247 18:01:22.944583 anx7625_start_dp_work: Secure OCM version=00
5248 18:01:22.948005 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5249 18:01:22.965336 sp_tx_get_edid_block: EDID Block = 1
5250 18:01:23.082477 Extracted contents:
5251 18:01:23.085770 header: 00 ff ff ff ff ff ff 00
5252 18:01:23.088698 serial number: 06 af 5c 14 00 00 00 00 00 1a
5253 18:01:23.092144 version: 01 04
5254 18:01:23.095130 basic params: 95 1a 0e 78 02
5255 18:01:23.098550 chroma info: 99 85 95 55 56 92 28 22 50 54
5256 18:01:23.101992 established: 00 00 00
5257 18:01:23.108537 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5258 18:01:23.114948 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5259 18:01:23.121352 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5260 18:01:23.124502 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5261 18:01:23.131224 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5262 18:01:23.134384 extensions: 00
5263 18:01:23.134515 checksum: ae
5264 18:01:23.137805
5265 18:01:23.141111 Manufacturer: AUO Model 145c Serial Number 0
5266 18:01:23.141195 Made week 0 of 2016
5267 18:01:23.144069 EDID version: 1.4
5268 18:01:23.144153 Digital display
5269 18:01:23.147527 6 bits per primary color channel
5270 18:01:23.150576 DisplayPort interface
5271 18:01:23.153992 Maximum image size: 26 cm x 14 cm
5272 18:01:23.154074 Gamma: 220%
5273 18:01:23.157351 Check DPMS levels
5274 18:01:23.157464 Supported color formats: RGB 4:4:4
5275 18:01:23.163787 First detailed timing is preferred timing
5276 18:01:23.163880 Established timings supported:
5277 18:01:23.167189 Standard timings supported:
5278 18:01:23.170516 Detailed timings
5279 18:01:23.173426 Hex of detail: ce1d56ea50001a3030204600009010000018
5280 18:01:23.180261 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5281 18:01:23.183438 0556 0586 05a6 0640 hborder 0
5282 18:01:23.186931 0300 0304 030a 031a vborder 0
5283 18:01:23.189923 -hsync -vsync
5284 18:01:23.190015 Did detailed timing
5285 18:01:23.196397 Hex of detail: 0000000f0000000000000000000000000020
5286 18:01:23.199804 Manufacturer-specified data, tag 15
5287 18:01:23.203231 Hex of detail: 000000fe0041554f0a202020202020202020
5288 18:01:23.206480 ASCII string: AUO
5289 18:01:23.209684 Hex of detail: 000000fe004231313658414230312e34200a
5290 18:01:23.212735 ASCII string: B116XAB01.4
5291 18:01:23.212826 Checksum
5292 18:01:23.216257 Checksum: 0xae (valid)
5293 18:01:23.219518 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5294 18:01:23.222555 DSI data_rate: 457800000 bps
5295 18:01:23.229341 anx7625_parse_edid: set default k value to 0x3d for panel
5296 18:01:23.232723 anx7625_parse_edid: pixelclock(76300).
5297 18:01:23.235777 hactive(1366), hsync(32), hfp(48), hbp(154)
5298 18:01:23.239105 vactive(768), vsync(6), vfp(4), vbp(16)
5299 18:01:23.242379 anx7625_dsi_config: config dsi.
5300 18:01:23.250410 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5301 18:01:23.271451 anx7625_dsi_config: success to config DSI
5302 18:01:23.274741 anx7625_dp_start: MIPI phy setup OK.
5303 18:01:23.278101 [SSUSB] Setting up USB HOST controller...
5304 18:01:23.281196 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5305 18:01:23.284482 [SSUSB] phy power-on done.
5306 18:01:23.288408 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5307 18:01:23.291392 in-header: 03 fc 01 00 00 00 00 00
5308 18:01:23.291512 in-data:
5309 18:01:23.297920 handle_proto3_response: EC response with error code: 1
5310 18:01:23.298012 SPM: pcm index = 1
5311 18:01:23.304597 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5312 18:01:23.304693 CBFS @ 21000 size 3d4000
5313 18:01:23.311076 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5314 18:01:23.314264 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5315 18:01:23.317709 CBFS: Found @ offset 1e7c0 size 1026
5316 18:01:23.324610 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5317 18:01:23.327682 SPM: binary array size = 2988
5318 18:01:23.331180 SPM: version = pcm_allinone_v1.17.2_20180829
5319 18:01:23.334478 SPM binary loaded in 32 msecs
5320 18:01:23.342794 spm_kick_im_to_fetch: ptr = 000000004021eec2
5321 18:01:23.346306 spm_kick_im_to_fetch: len = 2988
5322 18:01:23.346398 SPM: spm_kick_pcm_to_run
5323 18:01:23.349453 SPM: spm_kick_pcm_to_run done
5324 18:01:23.352778 SPM: spm_init done in 52 msecs
5325 18:01:23.355944 Root Device init finished in 495205 usecs
5326 18:01:23.359349 CPU_CLUSTER: 0 init ...
5327 18:01:23.369157 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5328 18:01:23.372189 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5329 18:01:23.375599 CBFS @ 21000 size 3d4000
5330 18:01:23.378983 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5331 18:01:23.382133 CBFS: Locating 'sspm.bin'
5332 18:01:23.385609 CBFS: Found @ offset 208c0 size 41cb
5333 18:01:23.395951 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5334 18:01:23.404098 CPU_CLUSTER: 0 init finished in 42800 usecs
5335 18:01:23.404209 Devices initialized
5336 18:01:23.407449 Show all devs... After init.
5337 18:01:23.410408 Root Device: enabled 1
5338 18:01:23.410501 CPU_CLUSTER: 0: enabled 1
5339 18:01:23.413796 CPU: 00: enabled 1
5340 18:01:23.417124 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5341 18:01:23.423672 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5342 18:01:23.427115 ELOG: NV offset 0x558000 size 0x1000
5343 18:01:23.430155 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5344 18:01:23.436733 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5345 18:01:23.442986 ELOG: Event(17) added with size 13 at 2024-06-11 18:01:22 UTC
5346 18:01:23.446360 out: cmd=0x121: 03 db 21 01 00 00 00 00
5347 18:01:23.449753 in-header: 03 24 00 00 2c 00 00 00
5348 18:01:23.462602 in-data: 1e 4c 00 00 00 00 00 00 02 10 00 00 06 80 00 00 30 ee 01 00 06 80 00 00 75 fa 00 00 06 80 00 00 74 e0 14 00 06 80 00 00 58 b5 16 00
5349 18:01:23.466119 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5350 18:01:23.469398 in-header: 03 19 00 00 08 00 00 00
5351 18:01:23.472487 in-data: a2 e0 47 00 13 00 00 00
5352 18:01:23.475917 Chrome EC: UHEPI supported
5353 18:01:23.482177 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5354 18:01:23.485641 in-header: 03 e1 00 00 08 00 00 00
5355 18:01:23.489036 in-data: 84 20 60 10 00 00 00 00
5356 18:01:23.492168 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5357 18:01:23.498544 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5358 18:01:23.502114 in-header: 03 e1 00 00 08 00 00 00
5359 18:01:23.505256 in-data: 84 20 60 10 00 00 00 00
5360 18:01:23.511935 ELOG: Event(A1) added with size 10 at 2024-06-11 18:01:22 UTC
5361 18:01:23.518293 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5362 18:01:23.521579 ELOG: Event(A0) added with size 9 at 2024-06-11 18:01:22 UTC
5363 18:01:23.525138 elog_add_boot_reason: Logged dev mode boot
5364 18:01:23.528364 Finalize devices...
5365 18:01:23.531679 Devices finalized
5366 18:01:23.534681 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5367 18:01:23.538109 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5368 18:01:23.544709 ELOG: Event(91) added with size 10 at 2024-06-11 18:01:22 UTC
5369 18:01:23.547715 Writing coreboot table at 0xffeda000
5370 18:01:23.551165 0. 0000000000114000-000000000011efff: RAMSTAGE
5371 18:01:23.557649 1. 0000000040000000-000000004023cfff: RAMSTAGE
5372 18:01:23.560997 2. 000000004023d000-00000000545fffff: RAM
5373 18:01:23.564037 3. 0000000054600000-000000005465ffff: BL31
5374 18:01:23.567238 4. 0000000054660000-00000000ffed9fff: RAM
5375 18:01:23.573697 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5376 18:01:23.577174 6. 0000000100000000-000000013fffffff: RAM
5377 18:01:23.580348 Passing 5 GPIOs to payload:
5378 18:01:23.583555 NAME | PORT | POLARITY | VALUE
5379 18:01:23.590307 write protect | 0x00000096 | low | high
5380 18:01:23.593646 EC in RW | 0x000000b1 | high | undefined
5381 18:01:23.596911 EC interrupt | 0x00000097 | low | undefined
5382 18:01:23.603419 TPM interrupt | 0x00000099 | high | undefined
5383 18:01:23.606521 speaker enable | 0x000000af | high | undefined
5384 18:01:23.609928 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5385 18:01:23.613080 in-header: 03 f7 00 00 02 00 00 00
5386 18:01:23.616454 in-data: 04 00
5387 18:01:23.616546 Board ID: 4
5388 18:01:23.619618 ADC[3]: Raw value=214692 ID=1
5389 18:01:23.619710 RAM code: 1
5390 18:01:23.622851 SKU ID: 16
5391 18:01:23.626214 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5392 18:01:23.629404 CBFS @ 21000 size 3d4000
5393 18:01:23.632886 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5394 18:01:23.639606 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 7830
5395 18:01:23.642597 coreboot table: 940 bytes.
5396 18:01:23.646124 IMD ROOT 0. 00000000fffff000 00001000
5397 18:01:23.649138 IMD SMALL 1. 00000000ffffe000 00001000
5398 18:01:23.652450 CONSOLE 2. 00000000fffde000 00020000
5399 18:01:23.655825 FMAP 3. 00000000fffdd000 0000047c
5400 18:01:23.662178 TIME STAMP 4. 00000000fffdc000 00000910
5401 18:01:23.665274 RAMOOPS 5. 00000000ffedc000 00100000
5402 18:01:23.668701 COREBOOT 6. 00000000ffeda000 00002000
5403 18:01:23.668824 IMD small region:
5404 18:01:23.672106 IMD ROOT 0. 00000000ffffec00 00000400
5405 18:01:23.678708 VBOOT WORK 1. 00000000ffffeb00 00000100
5406 18:01:23.681933 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5407 18:01:23.685130 VPD 3. 00000000ffffea60 0000006c
5408 18:01:23.688576 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5409 18:01:23.694931 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5410 18:01:23.698191 in-header: 03 e1 00 00 08 00 00 00
5411 18:01:23.701368 in-data: 84 20 60 10 00 00 00 00
5412 18:01:23.707978 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5413 18:01:23.708072 CBFS @ 21000 size 3d4000
5414 18:01:23.714717 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5415 18:01:23.717808 CBFS: Locating 'fallback/payload'
5416 18:01:23.725740 CBFS: Found @ offset dc040 size 439a0
5417 18:01:23.813909 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5418 18:01:23.817268 Checking segment from ROM address 0x0000000040003a00
5419 18:01:23.823931 Checking segment from ROM address 0x0000000040003a1c
5420 18:01:23.826837 Loading segment from ROM address 0x0000000040003a00
5421 18:01:23.830145 code (compression=0)
5422 18:01:23.840167 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5423 18:01:23.846776 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5424 18:01:23.849813 it's not compressed!
5425 18:01:23.853077 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5426 18:01:23.859580 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5427 18:01:23.868201 Loading segment from ROM address 0x0000000040003a1c
5428 18:01:23.871463 Entry Point 0x0000000080000000
5429 18:01:23.871901 Loaded segments
5430 18:01:23.877934 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5431 18:01:23.881176 Jumping to boot code at 0000000080000000(00000000ffeda000)
5432 18:01:23.890843 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5433 18:01:23.897383 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5434 18:01:23.897861 CBFS @ 21000 size 3d4000
5435 18:01:23.904110 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5436 18:01:23.907408 CBFS: Locating 'fallback/bl31'
5437 18:01:23.910303 CBFS: Found @ offset 36dc0 size 5820
5438 18:01:23.921969 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5439 18:01:23.925491 Checking segment from ROM address 0x0000000040003a00
5440 18:01:23.932039 Checking segment from ROM address 0x0000000040003a1c
5441 18:01:23.934905 Loading segment from ROM address 0x0000000040003a00
5442 18:01:23.938312 code (compression=1)
5443 18:01:23.948423 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5444 18:01:23.954600 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5445 18:01:23.955083 using LZMA
5446 18:01:23.964077 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5447 18:01:23.970687 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5448 18:01:23.973610 Loading segment from ROM address 0x0000000040003a1c
5449 18:01:23.977138 Entry Point 0x0000000054601000
5450 18:01:23.977617 Loaded segments
5451 18:01:23.980104 NOTICE: MT8183 bl31_setup
5452 18:01:23.987885 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5453 18:01:23.990948 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5454 18:01:23.994335 INFO: [DEVAPC] dump DEVAPC registers:
5455 18:01:24.003995 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5456 18:01:24.010472 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5457 18:01:24.020256 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5458 18:01:24.026938 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5459 18:01:24.036555 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5460 18:01:24.043312 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5461 18:01:24.052919 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5462 18:01:24.059325 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5463 18:01:24.069077 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5464 18:01:24.075471 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5465 18:01:24.085445 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5466 18:01:24.091946 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5467 18:01:24.101779 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5468 18:01:24.108513 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5469 18:01:24.114894 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5470 18:01:24.124659 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5471 18:01:24.131322 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5472 18:01:24.138119 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5473 18:01:24.144615 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5474 18:01:24.150995 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5475 18:01:24.160785 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5476 18:01:24.167789 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5477 18:01:24.170713 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5478 18:01:24.174109 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5479 18:01:24.177592 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5480 18:01:24.180508 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5481 18:01:24.184206 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5482 18:01:24.190432 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5483 18:01:24.193691 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5484 18:01:24.196838 WARNING: region 0:
5485 18:01:24.200374 WARNING: apc:0x168, sa:0x0, ea:0xfff
5486 18:01:24.203415 WARNING: region 1:
5487 18:01:24.206893 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5488 18:01:24.207003 WARNING: region 2:
5489 18:01:24.210285 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5490 18:01:24.213569 WARNING: region 3:
5491 18:01:24.216935 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5492 18:01:24.217025 WARNING: region 4:
5493 18:01:24.223247 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5494 18:01:24.223339 WARNING: region 5:
5495 18:01:24.226664 WARNING: apc:0x0, sa:0x0, ea:0x0
5496 18:01:24.229704 WARNING: region 6:
5497 18:01:24.233357 WARNING: apc:0x0, sa:0x0, ea:0x0
5498 18:01:24.233454 WARNING: region 7:
5499 18:01:24.236211 WARNING: apc:0x0, sa:0x0, ea:0x0
5500 18:01:24.242892 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5501 18:01:24.246404 INFO: SPM: enable SPMC mode
5502 18:01:24.249411 NOTICE: spm_boot_init() start
5503 18:01:24.252906 NOTICE: spm_boot_init() end
5504 18:01:24.256055 INFO: BL31: Initializing runtime services
5505 18:01:24.262557 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5506 18:01:24.265949 INFO: BL31: Preparing for EL3 exit to normal world
5507 18:01:24.269297 INFO: Entry point address = 0x80000000
5508 18:01:24.272660 INFO: SPSR = 0x8
5509 18:01:24.293812
5510 18:01:24.293911
5511 18:01:24.293984
5512 18:01:24.294527 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5513 18:01:24.294669 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5514 18:01:24.294803 Setting prompt string to ['jacuzzi:']
5515 18:01:24.294923 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5516 18:01:24.297196 Starting depthcharge on Juniper...
5517 18:01:24.297308
5518 18:01:24.300295 vboot_handoff: creating legacy vboot_handoff structure
5519 18:01:24.300391
5520 18:01:24.303548 ec_init(0): CrosEC protocol v3 supported (544, 544)
5521 18:01:24.307041
5522 18:01:24.307150 Wipe memory regions:
5523 18:01:24.307248
5524 18:01:24.310478 [0x00000040000000, 0x00000054600000)
5525 18:01:24.353615
5526 18:01:24.353712 [0x00000054660000, 0x00000080000000)
5527 18:01:24.445286
5528 18:01:24.445843 [0x000000811994a0, 0x000000ffeda000)
5529 18:01:24.705359
5530 18:01:24.705889 [0x00000100000000, 0x00000140000000)
5531 18:01:24.837457
5532 18:01:24.840758 Initializing XHCI USB controller at 0x11200000.
5533 18:01:24.863929
5534 18:01:24.867031 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5535 18:01:24.867503
5536 18:01:24.867845
5537 18:01:24.868647 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5539 18:01:24.969858 jacuzzi: tftpboot 192.168.201.1 14291352/tftp-deploy-2fbbrpmg/kernel/image.itb 14291352/tftp-deploy-2fbbrpmg/kernel/cmdline
5540 18:01:24.970438 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5541 18:01:24.970854 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
5542 18:01:24.975367 tftpboot 192.168.201.1 14291352/tftp-deploy-2fbbrpmg/kernel/image.itp-deploy-2fbbrpmg/kernel/cmdline
5543 18:01:24.975801
5544 18:01:24.976273 Waiting for link
5545 18:01:25.377619
5546 18:01:25.377790 R8152: Initializing
5547 18:01:25.377895
5548 18:01:25.380817 Version 9 (ocp_data = 6010)
5549 18:01:25.380895
5550 18:01:25.383907 R8152: Done initializing
5551 18:01:25.384021
5552 18:01:25.384137 Adding net device
5553 18:01:25.769958
5554 18:01:25.770108 done.
5555 18:01:25.770182
5556 18:01:25.770249 MAC: 00:e0:4c:78:85:cb
5557 18:01:25.770314
5558 18:01:25.773193 Sending DHCP discover... done.
5559 18:01:25.773285
5560 18:01:25.776428 Waiting for reply... done.
5561 18:01:25.776519
5562 18:01:25.779481 Sending DHCP request... done.
5563 18:01:25.779572
5564 18:01:25.783916 Waiting for reply... done.
5565 18:01:25.784007
5566 18:01:25.784078 My ip is 192.168.201.22
5567 18:01:25.784147
5568 18:01:25.787135 The DHCP server ip is 192.168.201.1
5569 18:01:25.787228
5570 18:01:25.793613 TFTP server IP predefined by user: 192.168.201.1
5571 18:01:25.793710
5572 18:01:25.800498 Bootfile predefined by user: 14291352/tftp-deploy-2fbbrpmg/kernel/image.itb
5573 18:01:25.800590
5574 18:01:25.803673 Sending tftp read request... done.
5575 18:01:25.803764
5576 18:01:25.807364 Waiting for the transfer...
5577 18:01:25.807483
5578 18:01:26.077327 00000000 ################################################################
5579 18:01:26.077477
5580 18:01:26.336194 00080000 ################################################################
5581 18:01:26.336337
5582 18:01:26.586894 00100000 ################################################################
5583 18:01:26.587040
5584 18:01:26.844024 00180000 ################################################################
5585 18:01:26.844163
5586 18:01:27.103736 00200000 ################################################################
5587 18:01:27.103894
5588 18:01:27.368901 00280000 ################################################################
5589 18:01:27.369055
5590 18:01:27.639841 00300000 ################################################################
5591 18:01:27.639987
5592 18:01:27.912361 00380000 ################################################################
5593 18:01:27.912507
5594 18:01:28.172266 00400000 ################################################################
5595 18:01:28.172413
5596 18:01:28.429713 00480000 ################################################################
5597 18:01:28.429865
5598 18:01:28.693622 00500000 ################################################################
5599 18:01:28.693789
5600 18:01:28.961382 00580000 ################################################################
5601 18:01:28.961596
5602 18:01:29.219007 00600000 ################################################################
5603 18:01:29.219173
5604 18:01:29.476034 00680000 ################################################################
5605 18:01:29.476207
5606 18:01:29.731790 00700000 ################################################################
5607 18:01:29.731951
5608 18:01:29.989802 00780000 ################################################################
5609 18:01:29.989944
5610 18:01:30.257581 00800000 ################################################################
5611 18:01:30.257723
5612 18:01:30.535861 00880000 ################################################################
5613 18:01:30.536052
5614 18:01:30.795026 00900000 ################################################################
5615 18:01:30.795182
5616 18:01:31.053646 00980000 ################################################################
5617 18:01:31.053833
5618 18:01:31.325175 00a00000 ################################################################
5619 18:01:31.325334
5620 18:01:31.598729 00a80000 ################################################################
5621 18:01:31.598895
5622 18:01:31.868337 00b00000 ################################################################
5623 18:01:31.868491
5624 18:01:32.123672 00b80000 ################################################################
5625 18:01:32.123829
5626 18:01:32.379403 00c00000 ################################################################
5627 18:01:32.379556
5628 18:01:32.633421 00c80000 ################################################################
5629 18:01:32.633582
5630 18:01:32.891254 00d00000 ################################################################
5631 18:01:32.891397
5632 18:01:33.156842 00d80000 ################################################################
5633 18:01:33.157012
5634 18:01:33.416027 00e00000 ################################################################
5635 18:01:33.416185
5636 18:01:33.675426 00e80000 ################################################################
5637 18:01:33.675568
5638 18:01:33.932883 00f00000 ################################################################
5639 18:01:33.933038
5640 18:01:34.190094 00f80000 ################################################################
5641 18:01:34.190238
5642 18:01:34.452183 01000000 ################################################################
5643 18:01:34.452330
5644 18:01:34.717760 01080000 ################################################################
5645 18:01:34.717914
5646 18:01:34.977801 01100000 ################################################################
5647 18:01:34.977960
5648 18:01:35.240759 01180000 ################################################################
5649 18:01:35.240919
5650 18:01:35.508855 01200000 ################################################################
5651 18:01:35.509016
5652 18:01:35.773233 01280000 ################################################################
5653 18:01:35.773397
5654 18:01:36.029420 01300000 ################################################################
5655 18:01:36.029575
5656 18:01:36.284730 01380000 ################################################################
5657 18:01:36.284903
5658 18:01:36.544472 01400000 ################################################################
5659 18:01:36.544632
5660 18:01:36.802622 01480000 ################################################################
5661 18:01:36.802794
5662 18:01:37.057228 01500000 ################################################################
5663 18:01:37.057408
5664 18:01:37.312847 01580000 ################################################################
5665 18:01:37.313024
5666 18:01:37.571214 01600000 ################################################################
5667 18:01:37.571359
5668 18:01:37.823958 01680000 ################################################################
5669 18:01:37.824137
5670 18:01:38.085127 01700000 ################################################################
5671 18:01:38.085270
5672 18:01:38.349406 01780000 ################################################################
5673 18:01:38.349564
5674 18:01:38.603435 01800000 ################################################################
5675 18:01:38.603585
5676 18:01:38.862832 01880000 ################################################################
5677 18:01:38.862983
5678 18:01:39.120764 01900000 ################################################################
5679 18:01:39.120914
5680 18:01:39.380358 01980000 ################################################################
5681 18:01:39.380512
5682 18:01:39.647833 01a00000 ################################################################
5683 18:01:39.647986
5684 18:01:39.902107 01a80000 ################################################################
5685 18:01:39.902274
5686 18:01:40.157187 01b00000 ################################################################
5687 18:01:40.157340
5688 18:01:40.416211 01b80000 ################################################################
5689 18:01:40.416365
5690 18:01:40.669481 01c00000 ################################################################
5691 18:01:40.669634
5692 18:01:40.928024 01c80000 ################################################################
5693 18:01:40.928214
5694 18:01:41.185052 01d00000 ################################################################
5695 18:01:41.185236
5696 18:01:41.438244 01d80000 ################################################################
5697 18:01:41.438436
5698 18:01:41.693469 01e00000 ################################################################
5699 18:01:41.693623
5700 18:01:41.951023 01e80000 ################################################################
5701 18:01:41.951189
5702 18:01:42.210514 01f00000 ################################################################
5703 18:01:42.210667
5704 18:01:42.470942 01f80000 ################################################################
5705 18:01:42.471132
5706 18:01:42.730981 02000000 ################################################################
5707 18:01:42.731143
5708 18:01:42.961382 02080000 ########################################################### done.
5709 18:01:42.961547
5710 18:01:42.964652 The bootfile was 34558214 bytes long.
5711 18:01:42.964745
5712 18:01:42.967981 Sending tftp read request... done.
5713 18:01:42.968076
5714 18:01:42.971344 Waiting for the transfer...
5715 18:01:42.971438
5716 18:01:42.974349 00000000 # done.
5717 18:01:42.974443
5718 18:01:42.981179 Command line loaded dynamically from TFTP file: 14291352/tftp-deploy-2fbbrpmg/kernel/cmdline
5719 18:01:42.981272
5720 18:01:42.997401 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5721 18:01:42.997512
5722 18:01:43.000590 Loading FIT.
5723 18:01:43.000681
5724 18:01:43.000761 Image ramdisk-1 has 21373367 bytes.
5725 18:01:43.004212
5726 18:01:43.004316 Image fdt-1 has 57695 bytes.
5727 18:01:43.004392
5728 18:01:43.007189 Image kernel-1 has 13125101 bytes.
5729 18:01:43.007280
5730 18:01:43.017277 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5731 18:01:43.017373
5732 18:01:43.030198 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5733 18:01:43.030296
5734 18:01:43.033358 Choosing best match conf-1 for compat google,juniper-sku16.
5735 18:01:43.038231
5736 18:01:43.042385 Connected to device vid:did:rid of 1ae0:0028:00
5737 18:01:43.049836
5738 18:01:43.053180 tpm_get_response: command 0x17b, return code 0x0
5739 18:01:43.053279
5740 18:01:43.056123 tpm_cleanup: add release locality here.
5741 18:01:43.056215
5742 18:01:43.059556 Shutting down all USB controllers.
5743 18:01:43.059647
5744 18:01:43.062940 Removing current net device
5745 18:01:43.063048
5746 18:01:43.065905 Exiting depthcharge with code 4 at timestamp: 36021364
5747 18:01:43.065997
5748 18:01:43.072537 LZMA decompressing kernel-1 to 0x80193568
5749 18:01:43.072630
5750 18:01:43.075627 LZMA decompressing kernel-1 to 0x40000000
5751 18:01:44.940626
5752 18:01:44.940800 jumping to kernel
5753 18:01:44.941762 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5754 18:01:44.941908 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
5755 18:01:44.942026 Setting prompt string to ['Linux version [0-9]']
5756 18:01:44.942134 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5757 18:01:44.942242 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5758 18:01:45.016205
5759 18:01:45.019492 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5760 18:01:45.022752 start: 2.2.5.1 login-action (timeout 00:04:17) [common]
5761 18:01:45.022861 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5762 18:01:45.022941 Setting prompt string to []
5763 18:01:45.023024 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5764 18:01:45.023106 Using line separator: #'\n'#
5765 18:01:45.023171 No login prompt set.
5766 18:01:45.023236 Parsing kernel messages
5767 18:01:45.023303 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5768 18:01:45.023414 [login-action] Waiting for messages, (timeout 00:04:17)
5769 18:01:45.023486 Waiting using forced prompt support (timeout 00:02:09)
5770 18:01:45.042151 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j225340-arm64-gcc-10-defconfig-arm64-chromebook-x2t4v) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 11 17:44:14 UTC 2024
5771 18:01:45.045454 [ 0.000000] random: crng init done
5772 18:01:45.051984 [ 0.000000] Machine model: Google juniper sku16 board
5773 18:01:45.055448 [ 0.000000] efi: UEFI not found.
5774 18:01:45.061836 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5775 18:01:45.071671 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5776 18:01:45.078473 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5777 18:01:45.081649 [ 0.000000] printk: bootconsole [mtk8250] enabled
5778 18:01:45.090967 [ 0.000000] NUMA: No NUMA configuration found
5779 18:01:45.097504 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5780 18:01:45.103855 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5781 18:01:45.103979 [ 0.000000] Zone ranges:
5782 18:01:45.110775 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5783 18:01:45.113877 [ 0.000000] DMA32 empty
5784 18:01:45.120189 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5785 18:01:45.123671 [ 0.000000] Movable zone start for each node
5786 18:01:45.127125 [ 0.000000] Early memory node ranges
5787 18:01:45.133368 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5788 18:01:45.140277 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5789 18:01:45.146405 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5790 18:01:45.153207 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5791 18:01:45.159444 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5792 18:01:45.166414 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5793 18:01:45.183464 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5794 18:01:45.189880 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5795 18:01:45.196406 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5796 18:01:45.199485 [ 0.000000] psci: probing for conduit method from DT.
5797 18:01:45.206269 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5798 18:01:45.209363 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5799 18:01:45.216064 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5800 18:01:45.219516 [ 0.000000] psci: SMC Calling Convention v1.1
5801 18:01:45.225759 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5802 18:01:45.229106 [ 0.000000] Detected VIPT I-cache on CPU0
5803 18:01:45.235642 [ 0.000000] CPU features: detected: GIC system register CPU interface
5804 18:01:45.242189 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5805 18:01:45.248840 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5806 18:01:45.255211 [ 0.000000] CPU features: detected: ARM erratum 845719
5807 18:01:45.258741 [ 0.000000] alternatives: applying boot alternatives
5808 18:01:45.265220 [ 0.000000] Fallback order for Node 0: 0
5809 18:01:45.271674 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5810 18:01:45.274848 [ 0.000000] Policy zone: Normal
5811 18:01:45.291114 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5812 18:01:45.304385 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5813 18:01:45.314115 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5814 18:01:45.320684 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5815 18:01:45.326993 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5816 18:01:45.333717 <6>[ 0.000000] software IO TLB: area num 8.
5817 18:01:45.358123 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5818 18:01:45.415722 <6>[ 0.000000] Memory: 3894204K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 264260K reserved, 32768K cma-reserved)
5819 18:01:45.422185 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5820 18:01:45.428797 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5821 18:01:45.432288 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5822 18:01:45.438428 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5823 18:01:45.445388 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5824 18:01:45.451433 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5825 18:01:45.458233 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5826 18:01:45.464605 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5827 18:01:45.471355 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5828 18:01:45.481243 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5829 18:01:45.487694 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5830 18:01:45.490724 <6>[ 0.000000] GICv3: 640 SPIs implemented
5831 18:01:45.494348 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5832 18:01:45.500607 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5833 18:01:45.503910 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5834 18:01:45.510585 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5835 18:01:45.523302 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5836 18:01:45.536468 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5837 18:01:45.543094 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5838 18:01:45.553028 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5839 18:01:45.566253 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5840 18:01:45.572558 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5841 18:01:45.579506 <6>[ 0.009480] Console: colour dummy device 80x25
5842 18:01:45.583214 <6>[ 0.014517] printk: console [tty1] enabled
5843 18:01:45.595901 <6>[ 0.018904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5844 18:01:45.599167 <6>[ 0.029368] pid_max: default: 32768 minimum: 301
5845 18:01:45.605661 <6>[ 0.034249] LSM: Security Framework initializing
5846 18:01:45.612532 <6>[ 0.039167] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5847 18:01:45.618622 <6>[ 0.046790] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5848 18:01:45.625688 <4>[ 0.055660] cacheinfo: Unable to detect cache hierarchy for CPU 0
5849 18:01:45.635617 <6>[ 0.062287] cblist_init_generic: Setting adjustable number of callback queues.
5850 18:01:45.642214 <6>[ 0.069733] cblist_init_generic: Setting shift to 3 and lim to 1.
5851 18:01:45.648825 <6>[ 0.076086] cblist_init_generic: Setting adjustable number of callback queues.
5852 18:01:45.655138 <6>[ 0.083531] cblist_init_generic: Setting shift to 3 and lim to 1.
5853 18:01:45.661731 <6>[ 0.089929] rcu: Hierarchical SRCU implementation.
5854 18:01:45.664891 <6>[ 0.094955] rcu: Max phase no-delay instances is 1000.
5855 18:01:45.672948 <6>[ 0.102892] EFI services will not be available.
5856 18:01:45.676361 <6>[ 0.107841] smp: Bringing up secondary CPUs ...
5857 18:01:45.686754 <6>[ 0.113127] Detected VIPT I-cache on CPU1
5858 18:01:45.693272 <4>[ 0.113173] cacheinfo: Unable to detect cache hierarchy for CPU 1
5859 18:01:45.700087 <6>[ 0.113182] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5860 18:01:45.706360 <6>[ 0.113214] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5861 18:01:45.709575 <6>[ 0.113695] Detected VIPT I-cache on CPU2
5862 18:01:45.716304 <4>[ 0.113727] cacheinfo: Unable to detect cache hierarchy for CPU 2
5863 18:01:45.723003 <6>[ 0.113733] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5864 18:01:45.729509 <6>[ 0.113745] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5865 18:01:45.735776 <6>[ 0.114191] Detected VIPT I-cache on CPU3
5866 18:01:45.742585 <4>[ 0.114221] cacheinfo: Unable to detect cache hierarchy for CPU 3
5867 18:01:45.749160 <6>[ 0.114226] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5868 18:01:45.755615 <6>[ 0.114237] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5869 18:01:45.758584 <6>[ 0.114812] CPU features: detected: Spectre-v2
5870 18:01:45.765420 <6>[ 0.114822] CPU features: detected: Spectre-BHB
5871 18:01:45.768769 <6>[ 0.114826] CPU features: detected: ARM erratum 858921
5872 18:01:45.775046 <6>[ 0.114831] Detected VIPT I-cache on CPU4
5873 18:01:45.781444 <4>[ 0.114880] cacheinfo: Unable to detect cache hierarchy for CPU 4
5874 18:01:45.788089 <6>[ 0.114887] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5875 18:01:45.794656 <6>[ 0.114895] arch_timer: Enabling local workaround for ARM erratum 858921
5876 18:01:45.801205 <6>[ 0.114905] arch_timer: CPU4: Trapping CNTVCT access
5877 18:01:45.807860 <6>[ 0.114913] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5878 18:01:45.810904 <6>[ 0.115399] Detected VIPT I-cache on CPU5
5879 18:01:45.817390 <4>[ 0.115440] cacheinfo: Unable to detect cache hierarchy for CPU 5
5880 18:01:45.824146 <6>[ 0.115446] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5881 18:01:45.830592 <6>[ 0.115453] arch_timer: Enabling local workaround for ARM erratum 858921
5882 18:01:45.837233 <6>[ 0.115459] arch_timer: CPU5: Trapping CNTVCT access
5883 18:01:45.843735 <6>[ 0.115464] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5884 18:01:45.847039 <6>[ 0.115899] Detected VIPT I-cache on CPU6
5885 18:01:45.853469 <4>[ 0.115945] cacheinfo: Unable to detect cache hierarchy for CPU 6
5886 18:01:45.859836 <6>[ 0.115951] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5887 18:01:45.866692 <6>[ 0.115957] arch_timer: Enabling local workaround for ARM erratum 858921
5888 18:01:45.873207 <6>[ 0.115963] arch_timer: CPU6: Trapping CNTVCT access
5889 18:01:45.879536 <6>[ 0.115969] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5890 18:01:45.882849 <6>[ 0.116499] Detected VIPT I-cache on CPU7
5891 18:01:45.889455 <4>[ 0.116543] cacheinfo: Unable to detect cache hierarchy for CPU 7
5892 18:01:45.896230 <6>[ 0.116550] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5893 18:01:45.905717 <6>[ 0.116557] arch_timer: Enabling local workaround for ARM erratum 858921
5894 18:01:45.908936 <6>[ 0.116563] arch_timer: CPU7: Trapping CNTVCT access
5895 18:01:45.915531 <6>[ 0.116568] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5896 18:01:45.922004 <6>[ 0.116626] smp: Brought up 1 node, 8 CPUs
5897 18:01:45.925441 <6>[ 0.355495] SMP: Total of 8 processors activated.
5898 18:01:45.932095 <6>[ 0.360432] CPU features: detected: 32-bit EL0 Support
5899 18:01:45.935012 <6>[ 0.365803] CPU features: detected: 32-bit EL1 Support
5900 18:01:45.941731 <6>[ 0.371169] CPU features: detected: CRC32 instructions
5901 18:01:45.945021 <6>[ 0.376596] CPU: All CPU(s) started at EL2
5902 18:01:45.951540 <6>[ 0.380937] alternatives: applying system-wide alternatives
5903 18:01:45.958840 <6>[ 0.388935] devtmpfs: initialized
5904 18:01:45.974735 <6>[ 0.397866] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5905 18:01:45.981158 <6>[ 0.407815] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5906 18:01:45.987444 <6>[ 0.415541] pinctrl core: initialized pinctrl subsystem
5907 18:01:45.990969 <6>[ 0.422661] DMI not present or invalid.
5908 18:01:45.997338 <6>[ 0.427032] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5909 18:01:46.007435 <6>[ 0.433935] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5910 18:01:46.014076 <6>[ 0.441462] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5911 18:01:46.023745 <6>[ 0.449713] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5912 18:01:46.030166 <6>[ 0.457890] audit: initializing netlink subsys (disabled)
5913 18:01:46.036566 <5>[ 0.463595] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5914 18:01:46.043497 <6>[ 0.464567] thermal_sys: Registered thermal governor 'step_wise'
5915 18:01:46.049745 <6>[ 0.471561] thermal_sys: Registered thermal governor 'power_allocator'
5916 18:01:46.053063 <6>[ 0.477860] cpuidle: using governor menu
5917 18:01:46.059510 <6>[ 0.488821] NET: Registered PF_QIPCRTR protocol family
5918 18:01:46.066188 <6>[ 0.494309] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5919 18:01:46.072622 <6>[ 0.501407] ASID allocator initialised with 32768 entries
5920 18:01:46.079060 <6>[ 0.508183] Serial: AMBA PL011 UART driver
5921 18:01:46.089034 <4>[ 0.518596] Trying to register duplicate clock ID: 113
5922 18:01:46.148172 <6>[ 0.574935] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5923 18:01:46.162644 <6>[ 0.589301] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5924 18:01:46.166072 <6>[ 0.599051] KASLR enabled
5925 18:01:46.180646 <6>[ 0.607050] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5926 18:01:46.187077 <6>[ 0.614053] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5927 18:01:46.193468 <6>[ 0.620531] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5928 18:01:46.200271 <6>[ 0.627521] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5929 18:01:46.206469 <6>[ 0.633996] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5930 18:01:46.213174 <6>[ 0.640986] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5931 18:01:46.219622 <6>[ 0.647460] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5932 18:01:46.226088 <6>[ 0.654449] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5933 18:01:46.232700 <6>[ 0.662023] ACPI: Interpreter disabled.
5934 18:01:46.240162 <6>[ 0.670017] iommu: Default domain type: Translated
5935 18:01:46.246882 <6>[ 0.675123] iommu: DMA domain TLB invalidation policy: strict mode
5936 18:01:46.249848 <5>[ 0.681754] SCSI subsystem initialized
5937 18:01:46.256358 <6>[ 0.686168] usbcore: registered new interface driver usbfs
5938 18:01:46.263271 <6>[ 0.691896] usbcore: registered new interface driver hub
5939 18:01:46.266553 <6>[ 0.697437] usbcore: registered new device driver usb
5940 18:01:46.273973 <6>[ 0.703743] pps_core: LinuxPPS API ver. 1 registered
5941 18:01:46.284029 <6>[ 0.708928] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5942 18:01:46.287345 <6>[ 0.718254] PTP clock support registered
5943 18:01:46.290384 <6>[ 0.722508] EDAC MC: Ver: 3.0.0
5944 18:01:46.298201 <6>[ 0.728146] FPGA manager framework
5945 18:01:46.305000 <6>[ 0.731828] Advanced Linux Sound Architecture Driver Initialized.
5946 18:01:46.307964 <6>[ 0.738580] vgaarb: loaded
5947 18:01:46.314823 <6>[ 0.741701] clocksource: Switched to clocksource arch_sys_counter
5948 18:01:46.317797 <5>[ 0.748133] VFS: Disk quotas dquot_6.6.0
5949 18:01:46.324200 <6>[ 0.752309] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5950 18:01:46.327625 <6>[ 0.759483] pnp: PnP ACPI: disabled
5951 18:01:46.336678 <6>[ 0.766374] NET: Registered PF_INET protocol family
5952 18:01:46.343119 <6>[ 0.771607] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5953 18:01:46.354977 <6>[ 0.781522] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5954 18:01:46.364810 <6>[ 0.790275] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5955 18:01:46.371394 <6>[ 0.798225] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5956 18:01:46.377853 <6>[ 0.806457] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5957 18:01:46.388079 <6>[ 0.814551] TCP: Hash tables configured (established 32768 bind 32768)
5958 18:01:46.394579 <6>[ 0.821376] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5959 18:01:46.401321 <6>[ 0.828346] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5960 18:01:46.407643 <6>[ 0.835825] NET: Registered PF_UNIX/PF_LOCAL protocol family
5961 18:01:46.414161 <6>[ 0.841921] RPC: Registered named UNIX socket transport module.
5962 18:01:46.417556 <6>[ 0.848064] RPC: Registered udp transport module.
5963 18:01:46.423948 <6>[ 0.852988] RPC: Registered tcp transport module.
5964 18:01:46.430441 <6>[ 0.857910] RPC: Registered tcp NFSv4.1 backchannel transport module.
5965 18:01:46.433747 <6>[ 0.864563] PCI: CLS 0 bytes, default 64
5966 18:01:46.437074 <6>[ 0.868851] Unpacking initramfs...
5967 18:01:46.451871 <6>[ 0.878264] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5968 18:01:46.461397 <6>[ 0.886888] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5969 18:01:46.464673 <6>[ 0.895740] kvm [1]: IPA Size Limit: 40 bits
5970 18:01:46.472208 <6>[ 0.902067] kvm [1]: vgic-v2@c420000
5971 18:01:46.475665 <6>[ 0.905884] kvm [1]: GIC system register CPU interface enabled
5972 18:01:46.482382 <6>[ 0.912056] kvm [1]: vgic interrupt IRQ18
5973 18:01:46.485557 <6>[ 0.916410] kvm [1]: Hyp mode initialized successfully
5974 18:01:46.492889 <5>[ 0.922695] Initialise system trusted keyrings
5975 18:01:46.499568 <6>[ 0.927532] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5976 18:01:46.507583 <6>[ 0.937510] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5977 18:01:46.514335 <5>[ 0.944036] NFS: Registering the id_resolver key type
5978 18:01:46.517506 <5>[ 0.949356] Key type id_resolver registered
5979 18:01:46.524299 <5>[ 0.953771] Key type id_legacy registered
5980 18:01:46.530428 <6>[ 0.958083] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5981 18:01:46.537006 <6>[ 0.965005] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5982 18:01:46.543598 <6>[ 0.972757] 9p: Installing v9fs 9p2000 file system support
5983 18:01:46.571702 <5>[ 1.001434] Key type asymmetric registered
5984 18:01:46.574974 <5>[ 1.005778] Asymmetric key parser 'x509' registered
5985 18:01:46.584764 <6>[ 1.010935] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5986 18:01:46.587979 <6>[ 1.018550] io scheduler mq-deadline registered
5987 18:01:46.591102 <6>[ 1.023308] io scheduler kyber registered
5988 18:01:46.614496 <6>[ 1.044125] EINJ: ACPI disabled.
5989 18:01:46.620798 <4>[ 1.047892] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5990 18:01:46.659032 <6>[ 1.088655] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5991 18:01:46.667153 <6>[ 1.097154] printk: console [ttyS0] disabled
5992 18:01:46.695322 <6>[ 1.121809] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5993 18:01:46.701896 <6>[ 1.131284] printk: console [ttyS0] enabled
5994 18:01:46.705016 <6>[ 1.131284] printk: console [ttyS0] enabled
5995 18:01:46.711563 <6>[ 1.140202] printk: bootconsole [mtk8250] disabled
5996 18:01:46.714826 <6>[ 1.140202] printk: bootconsole [mtk8250] disabled
5997 18:01:46.724629 <3>[ 1.150739] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5998 18:01:46.731078 <3>[ 1.159123] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5999 18:01:46.760960 <6>[ 1.187530] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6000 18:01:46.767376 <6>[ 1.197188] serial serial0: tty port ttyS1 registered
6001 18:01:46.774077 <6>[ 1.203736] SuperH (H)SCI(F) driver initialized
6002 18:01:46.777175 <6>[ 1.209246] msm_serial: driver initialized
6003 18:01:46.793116 <6>[ 1.219657] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6004 18:01:46.802976 <6>[ 1.228264] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6005 18:01:46.809556 <6>[ 1.236843] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6006 18:01:46.819245 <6>[ 1.245415] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6007 18:01:46.828953 <6>[ 1.254075] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6008 18:01:46.835678 <6>[ 1.262737] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6009 18:01:46.845407 <6>[ 1.271478] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6010 18:01:46.855329 <6>[ 1.280219] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6011 18:01:46.861623 <6>[ 1.288785] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6012 18:01:46.871407 <6>[ 1.297584] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6013 18:01:46.880407 <4>[ 1.309977] cacheinfo: Unable to detect cache hierarchy for CPU 0
6014 18:01:46.889354 <6>[ 1.319343] loop: module loaded
6015 18:01:46.901318 <6>[ 1.331259] vsim1: Bringing 1800000uV into 2700000-2700000uV
6016 18:01:46.919181 <6>[ 1.349170] megasas: 07.719.03.00-rc1
6017 18:01:46.928367 <6>[ 1.357964] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6018 18:01:46.935530 <6>[ 1.365092] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6019 18:01:46.951959 <6>[ 1.381593] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6020 18:01:47.011844 <6>[ 1.435228] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6021 18:01:47.133819 <6>[ 1.563476] Freeing initrd memory: 20868K
6022 18:01:47.152751 <4>[ 1.579207] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6023 18:01:47.159114 <4>[ 1.588436] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6024 18:01:47.166052 <4>[ 1.595135] Hardware name: Google juniper sku16 board (DT)
6025 18:01:47.169340 <4>[ 1.600873] Call trace:
6026 18:01:47.172387 <4>[ 1.603574] dump_backtrace.part.0+0xe0/0xf0
6027 18:01:47.175483 <4>[ 1.608110] show_stack+0x18/0x30
6028 18:01:47.182386 <4>[ 1.611682] dump_stack_lvl+0x68/0x84
6029 18:01:47.185303 <4>[ 1.615603] dump_stack+0x18/0x34
6030 18:01:47.188836 <4>[ 1.619173] sysfs_warn_dup+0x64/0x80
6031 18:01:47.192298 <4>[ 1.623095] sysfs_do_create_link_sd+0xf0/0x100
6032 18:01:47.198718 <4>[ 1.627882] sysfs_create_link+0x20/0x40
6033 18:01:47.201755 <4>[ 1.632061] bus_add_device+0x68/0x10c
6034 18:01:47.205116 <4>[ 1.636067] device_add+0x340/0x7ac
6035 18:01:47.208246 <4>[ 1.639811] of_device_add+0x44/0x60
6036 18:01:47.214976 <4>[ 1.643645] of_platform_device_create_pdata+0x90/0x120
6037 18:01:47.218361 <4>[ 1.649126] of_platform_bus_create+0x170/0x370
6038 18:01:47.224875 <4>[ 1.653912] of_platform_populate+0x50/0xfc
6039 18:01:47.228064 <4>[ 1.658351] parse_mtd_partitions+0x1dc/0x510
6040 18:01:47.234856 <4>[ 1.662964] mtd_device_parse_register+0xf8/0x2e0
6041 18:01:47.237930 <4>[ 1.667922] spi_nor_probe+0x21c/0x2f0
6042 18:01:47.241320 <4>[ 1.671928] spi_mem_probe+0x6c/0xb0
6043 18:01:47.244443 <4>[ 1.675761] spi_probe+0x84/0xe4
6044 18:01:47.247918 <4>[ 1.679243] really_probe+0xbc/0x2e0
6045 18:01:47.254118 <4>[ 1.683073] __driver_probe_device+0x78/0x11c
6046 18:01:47.257423 <4>[ 1.687685] driver_probe_device+0xd8/0x160
6047 18:01:47.260803 <4>[ 1.692123] __device_attach_driver+0xb8/0x134
6048 18:01:47.267393 <4>[ 1.696822] bus_for_each_drv+0x78/0xd0
6049 18:01:47.270567 <4>[ 1.700912] __device_attach+0xa8/0x1c0
6050 18:01:47.274004 <4>[ 1.705002] device_initial_probe+0x14/0x20
6051 18:01:47.280621 <4>[ 1.709441] bus_probe_device+0x9c/0xa4
6052 18:01:47.283758 <4>[ 1.713531] device_add+0x3ac/0x7ac
6053 18:01:47.287363 <4>[ 1.717273] __spi_add_device+0x78/0x120
6054 18:01:47.290081 <4>[ 1.721452] spi_add_device+0x40/0x7c
6055 18:01:47.296711 <4>[ 1.725369] spi_register_controller+0x610/0xad0
6056 18:01:47.300070 <4>[ 1.730243] devm_spi_register_controller+0x4c/0xa4
6057 18:01:47.303185 <4>[ 1.735376] mtk_spi_probe+0x3f8/0x650
6058 18:01:47.309805 <4>[ 1.739380] platform_probe+0x68/0xe0
6059 18:01:47.313231 <4>[ 1.743298] really_probe+0xbc/0x2e0
6060 18:01:47.316301 <4>[ 1.747128] __driver_probe_device+0x78/0x11c
6061 18:01:47.323089 <4>[ 1.751740] driver_probe_device+0xd8/0x160
6062 18:01:47.326083 <4>[ 1.756177] __driver_attach+0x94/0x19c
6063 18:01:47.329440 <4>[ 1.760268] bus_for_each_dev+0x70/0xd0
6064 18:01:47.332553 <4>[ 1.764358] driver_attach+0x24/0x30
6065 18:01:47.336202 <4>[ 1.768187] bus_add_driver+0x154/0x20c
6066 18:01:47.342584 <4>[ 1.772278] driver_register+0x78/0x130
6067 18:01:47.345654 <4>[ 1.776368] __platform_driver_register+0x28/0x34
6068 18:01:47.352217 <4>[ 1.781328] mtk_spi_driver_init+0x1c/0x28
6069 18:01:47.355612 <4>[ 1.785681] do_one_initcall+0x50/0x1d0
6070 18:01:47.358825 <4>[ 1.789771] kernel_init_freeable+0x21c/0x288
6071 18:01:47.362033 <4>[ 1.794385] kernel_init+0x24/0x12c
6072 18:01:47.368772 <4>[ 1.798130] ret_from_fork+0x10/0x20
6073 18:01:47.377187 <6>[ 1.807056] tun: Universal TUN/TAP device driver, 1.6
6074 18:01:47.380576 <6>[ 1.813352] thunder_xcv, ver 1.0
6075 18:01:47.387003 <6>[ 1.816871] thunder_bgx, ver 1.0
6076 18:01:47.387098 <6>[ 1.820378] nicpf, ver 1.0
6077 18:01:47.398359 <6>[ 1.824753] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6078 18:01:47.401407 <6>[ 1.832237] hns3: Copyright (c) 2017 Huawei Corporation.
6079 18:01:47.408202 <6>[ 1.837834] hclge is initializing
6080 18:01:47.411193 <6>[ 1.841414] e1000: Intel(R) PRO/1000 Network Driver
6081 18:01:47.417970 <6>[ 1.846551] e1000: Copyright (c) 1999-2006 Intel Corporation.
6082 18:01:47.424442 <6>[ 1.852573] e1000e: Intel(R) PRO/1000 Network Driver
6083 18:01:47.431058 <6>[ 1.857795] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6084 18:01:47.434029 <6>[ 1.863989] igb: Intel(R) Gigabit Ethernet Network Driver
6085 18:01:47.440816 <6>[ 1.869644] igb: Copyright (c) 2007-2014 Intel Corporation.
6086 18:01:47.447127 <6>[ 1.875488] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6087 18:01:47.453545 <6>[ 1.882011] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6088 18:01:47.456966 <6>[ 1.888564] sky2: driver version 1.30
6089 18:01:47.464143 <6>[ 1.893851] usbcore: registered new device driver r8152-cfgselector
6090 18:01:47.470666 <6>[ 1.900400] usbcore: registered new interface driver r8152
6091 18:01:47.477200 <6>[ 1.906229] VFIO - User Level meta-driver version: 0.3
6092 18:01:47.484527 <6>[ 1.914057] mtu3 11201000.usb: uwk - reg:0x420, version:101
6093 18:01:47.491094 <4>[ 1.919929] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6094 18:01:47.497660 <6>[ 1.927204] mtu3 11201000.usb: dr_mode: 1, drd: auto
6095 18:01:47.503973 <6>[ 1.932432] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6096 18:01:47.507192 <6>[ 1.938619] mtu3 11201000.usb: usb3-drd: 0
6097 18:01:47.517770 <6>[ 1.944189] mtu3 11201000.usb: xHCI platform device register success...
6098 18:01:47.524164 <4>[ 1.952827] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6099 18:01:47.531277 <6>[ 1.960769] xhci-mtk 11200000.usb: xHCI Host Controller
6100 18:01:47.540752 <6>[ 1.966300] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6101 18:01:47.544136 <6>[ 1.974024] xhci-mtk 11200000.usb: USB3 root hub has no ports
6102 18:01:47.553764 <6>[ 1.980033] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6103 18:01:47.560685 <6>[ 1.989456] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6104 18:01:47.567017 <6>[ 1.995537] xhci-mtk 11200000.usb: xHCI Host Controller
6105 18:01:47.573785 <6>[ 2.001025] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6106 18:01:47.580269 <6>[ 2.008682] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6107 18:01:47.583560 <6>[ 2.015499] hub 1-0:1.0: USB hub found
6108 18:01:47.589886 <6>[ 2.019528] hub 1-0:1.0: 1 port detected
6109 18:01:47.599946 <6>[ 2.024862] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6110 18:01:47.602943 <6>[ 2.033474] hub 2-0:1.0: USB hub found
6111 18:01:47.609672 <3>[ 2.037500] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6112 18:01:47.616130 <6>[ 2.045387] usbcore: registered new interface driver usb-storage
6113 18:01:47.622592 <6>[ 2.052001] usbcore: registered new device driver onboard-usb-hub
6114 18:01:47.639476 <4>[ 2.065799] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6115 18:01:47.648417 <6>[ 2.078037] mt6397-rtc mt6358-rtc: registered as rtc0
6116 18:01:47.658041 <6>[ 2.083516] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-11T18:01:46 UTC (1718128906)
6117 18:01:47.664517 <6>[ 2.093403] i2c_dev: i2c /dev entries driver
6118 18:01:47.674500 <6>[ 2.099816] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6119 18:01:47.681255 <6>[ 2.108132] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6120 18:01:47.687653 <6>[ 2.117036] i2c 4-0058: Fixed dependency cycle(s) with /panel
6121 18:01:47.693925 <6>[ 2.123067] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6122 18:01:47.703942 <3>[ 2.130540] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6123 18:01:47.720837 <6>[ 2.150506] cpu cpu0: EM: created perf domain
6124 18:01:47.734061 <6>[ 2.156002] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6125 18:01:47.737037 <6>[ 2.167272] cpu cpu4: EM: created perf domain
6126 18:01:47.744608 <6>[ 2.174379] sdhci: Secure Digital Host Controller Interface driver
6127 18:01:47.751375 <6>[ 2.180834] sdhci: Copyright(c) Pierre Ossman
6128 18:01:47.757737 <6>[ 2.186247] Synopsys Designware Multimedia Card Interface Driver
6129 18:01:47.763991 <6>[ 2.186719] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6130 18:01:47.770744 <6>[ 2.193328] sdhci-pltfm: SDHCI platform and OF driver helper
6131 18:01:47.777158 <6>[ 2.205909] ledtrig-cpu: registered to indicate activity on CPUs
6132 18:01:47.783753 <6>[ 2.213645] usbcore: registered new interface driver usbhid
6133 18:01:47.790531 <6>[ 2.219489] usbhid: USB HID core driver
6134 18:01:47.797290 <6>[ 2.223786] spi_master spi2: will run message pump with realtime priority
6135 18:01:47.805004 <4>[ 2.223955] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6136 18:01:47.811394 <4>[ 2.238127] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6137 18:01:47.824086 <6>[ 2.241795] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6138 18:01:47.841963 <6>[ 2.261815] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6139 18:01:47.848572 <4>[ 2.269201] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6140 18:01:47.855240 <6>[ 2.283290] cros-ec-spi spi2.0: Chrome EC device registered
6141 18:01:47.865013 <4>[ 2.290932] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6142 18:01:47.875999 <4>[ 2.302559] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6143 18:01:47.882435 <4>[ 2.311685] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6144 18:01:47.896512 <6>[ 2.322825] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6145 18:01:47.914689 <6>[ 2.344447] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6146 18:01:47.922368 <6>[ 2.352102] mmc0: new HS400 MMC card at address 0001
6147 18:01:47.928737 <6>[ 2.358456] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6148 18:01:47.938231 <6>[ 2.367838] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6149 18:01:47.947195 <6>[ 2.376785] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6150 18:01:47.953653 <6>[ 2.383360] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6151 18:01:47.959991 <6>[ 2.389643] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6152 18:01:47.973176 <6>[ 2.390025] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6153 18:01:47.983074 <6>[ 2.398728] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6154 18:01:47.992884 <6>[ 2.408757] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6155 18:01:48.002641 <6>[ 2.420584] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6156 18:01:48.009729 <6>[ 2.439597] NET: Registered PF_PACKET protocol family
6157 18:01:48.016421 <6>[ 2.445053] 9pnet: Installing 9P2000 support
6158 18:01:48.023142 <6>[ 2.445720] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6159 18:01:48.026070 <5>[ 2.449668] Key type dns_resolver registered
6160 18:01:48.032590 <6>[ 2.461551] registered taskstats version 1
6161 18:01:48.036022 <5>[ 2.465959] Loading compiled-in X.509 certificates
6162 18:01:48.077806 <3>[ 2.504310] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6163 18:01:48.108856 <6>[ 2.532248] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6164 18:01:48.119819 <6>[ 2.546322] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6165 18:01:48.129404 <6>[ 2.555043] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6166 18:01:48.136285 <6>[ 2.563603] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6167 18:01:48.145777 <6>[ 2.572199] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6168 18:01:48.155836 <6>[ 2.580747] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6169 18:01:48.162399 <6>[ 2.589287] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6170 18:01:48.172102 <6>[ 2.597862] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6171 18:01:48.175268 <6>[ 2.604575] hub 1-1:1.0: USB hub found
6172 18:01:48.181728 <6>[ 2.607361] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6173 18:01:48.185134 <6>[ 2.610835] hub 1-1:1.0: 3 ports detected
6174 18:01:48.191400 <6>[ 2.617921] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6175 18:01:48.198908 <6>[ 2.628547] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6176 18:01:48.209550 <6>[ 2.635888] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6177 18:01:48.215826 <6>[ 2.643344] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6178 18:01:48.222646 <6>[ 2.651673] panfrost 13040000.gpu: clock rate = 511999970
6179 18:01:48.232367 <6>[ 2.657376] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6180 18:01:48.241976 <6>[ 2.667412] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6181 18:01:48.248452 <6>[ 2.675431] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6182 18:01:48.261487 <6>[ 2.683864] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6183 18:01:48.267985 <6>[ 2.695942] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6184 18:01:48.280223 <6>[ 2.706831] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6185 18:01:48.289891 <6>[ 2.715582] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6186 18:01:48.299973 <6>[ 2.724732] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6187 18:01:48.309597 <6>[ 2.733863] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6188 18:01:48.316661 <6>[ 2.742990] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6189 18:01:48.325677 <6>[ 2.752290] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6190 18:01:48.335536 <6>[ 2.761589] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6191 18:01:48.345547 <6>[ 2.771063] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6192 18:01:48.355360 <6>[ 2.780539] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6193 18:01:48.364693 <6>[ 2.789663] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6194 18:01:48.436126 <6>[ 2.862413] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6195 18:01:48.445582 <6>[ 2.871440] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6196 18:01:48.456943 <6>[ 2.883479] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6197 18:01:48.483151 <6>[ 2.909850] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6198 18:01:49.153416 <6>[ 3.093984] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6199 18:01:49.163201 <4>[ 3.197669] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6200 18:01:49.169650 <4>[ 3.197688] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6201 18:01:49.176187 <6>[ 3.234724] r8152 1-1.2:1.0 eth0: v1.12.13
6202 18:01:49.182950 <6>[ 3.313734] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6203 18:01:49.189403 <6>[ 3.563295] Console: switching to colour frame buffer device 170x48
6204 18:01:49.198949 <6>[ 3.623955] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6205 18:01:49.216772 <6>[ 3.639984] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6206 18:01:49.233371 <6>[ 3.656696] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6207 18:01:49.243409 <6>[ 3.669651] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6208 18:01:49.249667 <6>[ 3.677790] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6209 18:01:49.262618 <6>[ 3.681098] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6210 18:01:49.277349 <6>[ 3.700711] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6211 18:01:50.407803 <6>[ 4.837576] r8152 1-1.2:1.0 eth0: carrier on
6212 18:01:53.152497 <5>[ 4.861734] Sending DHCP requests .., OK
6213 18:01:53.159009 <6>[ 7.586210] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6214 18:01:53.162513 <6>[ 7.594644] IP-Config: Complete:
6215 18:01:53.175535 <6>[ 7.598217] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6216 18:01:53.185173 <6>[ 7.609118] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6217 18:01:53.197217 <6>[ 7.623435] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6218 18:01:53.205821 <6>[ 7.623447] nameserver0=192.168.201.1
6219 18:01:53.213878 <6>[ 7.643170] clk: Disabling unused clocks
6220 18:01:53.218724 <6>[ 7.651100] ALSA device list:
6221 18:01:53.227637 <6>[ 7.657141] No soundcards found.
6222 18:01:53.237090 <6>[ 7.666249] Freeing unused kernel memory: 8512K
6223 18:01:53.243924 <6>[ 7.673387] Run /init as init process
6224 18:01:53.277956 Starting syslogd: OK
6225 18:01:53.282912 Starting klogd: OK
6226 18:01:53.292993 Running sysctl: OK
6227 18:01:53.302859 Populating /dev using udev: <30>[ 7.730809] udevd[206]: starting version 3.2.9
6228 18:01:53.310382 <27>[ 7.739515] udevd[206]: specified user 'tss' unknown
6229 18:01:53.317087 <27>[ 7.746218] udevd[206]: specified group 'tss' unknown
6230 18:01:53.324213 <30>[ 7.753631] udevd[207]: starting eudev-3.2.9
6231 18:01:53.348734 <27>[ 7.777920] udevd[207]: specified user 'tss' unknown
6232 18:01:53.355028 <27>[ 7.784053] udevd[207]: specified group 'tss' unknown
6233 18:01:53.472978 <6>[ 7.898640] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6234 18:01:53.479259 <3>[ 7.901329] thermal_sys: Failed to find 'trips' node
6235 18:01:53.489137 <3>[ 7.915322] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6236 18:01:53.499370 <3>[ 7.924361] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6237 18:01:53.509051 <4>[ 7.934645] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6238 18:01:53.512208 <3>[ 7.935297] mtk-scp 10500000.scp: invalid resource
6239 18:01:53.519136 <3>[ 7.948679] thermal_sys: Failed to find 'trips' node
6240 18:01:53.525689 <6>[ 7.948699] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6241 18:01:53.535445 <4>[ 7.950368] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6242 18:01:53.541954 <3>[ 7.953932] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6243 18:01:53.548497 <4>[ 7.964685] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6244 18:01:53.558248 <3>[ 7.964723] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6245 18:01:53.564772 <3>[ 7.964729] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6246 18:01:53.577671 <3>[ 7.964734] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6247 18:01:53.584369 <3>[ 7.964739] elan_i2c 2-0015: Error applying setting, reverse things back
6248 18:01:53.697322 <3>[ 7.968809] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6249 18:01:53.697872 <4>[ 7.968816] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6250 18:01:53.698217 <6>[ 7.983345] remoteproc remoteproc0: scp is available
6251 18:01:53.698568 <4>[ 7.994743] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6252 18:01:53.698890 <4>[ 8.001000] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6253 18:01:53.699190 <6>[ 8.012473] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6254 18:01:53.699485 <6>[ 8.019404] remoteproc remoteproc0: powering up scp
6255 18:01:53.699773 <3>[ 8.027550] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6256 18:01:53.700064 <6>[ 8.029015] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6257 18:01:53.700393 <3>[ 8.029388] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6258 18:01:53.700816 <4>[ 8.035035] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6259 18:01:53.701115 <3>[ 8.035046] remoteproc remoteproc0: request_firmware failed: -2
6260 18:01:53.701463 <5>[ 8.036390] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6261 18:01:53.707102 <3>[ 8.040479] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6262 18:01:53.710322 <6>[ 8.044633] mc: Linux media interface: v0.10
6263 18:01:53.716824 <5>[ 8.074370] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6264 18:01:53.726398 <3>[ 8.077452] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6265 18:01:53.736354 <5>[ 8.086492] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6266 18:01:53.742847 <6>[ 8.109791] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6267 18:01:53.752536 <3>[ 8.109873] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6268 18:01:53.759146 <4>[ 8.110025] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6269 18:01:53.765658 <6>[ 8.110032] cfg80211: failed to load regulatory.db
6270 18:01:53.771993 <6>[ 8.119716] videodev: Linux video capture interface: v2.00
6271 18:01:53.778688 <6>[ 8.120513] cs_system_cfg: CoreSight Configuration manager initialised
6272 18:01:53.785130 <3>[ 8.124583] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6273 18:01:53.794819 <6>[ 8.132875] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6274 18:01:53.801528 <3>[ 8.141118] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6275 18:01:53.811031 <6>[ 8.145806] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6276 18:01:53.820900 <3>[ 8.152422] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6277 18:01:53.830647 <6>[ 8.161063] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6278 18:01:53.837165 <6>[ 8.165488] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6279 18:01:53.847145 <3>[ 8.169493] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6280 18:01:53.860367 <3>[ 8.177370] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6281 18:01:53.866551 <6>[ 8.177856] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6282 18:01:53.876420 <3>[ 8.185644] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6283 18:01:53.886311 <6>[ 8.185989] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6284 18:01:53.893063 <6>[ 8.195558] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6285 18:01:53.902804 <3>[ 8.200425] debugfs: File 'Playback' in directory 'dapm' already present!
6286 18:01:53.909009 <6>[ 8.205604] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6287 18:01:53.912557 <6>[ 8.207200] Bluetooth: Core ver 2.22
6288 18:01:53.919852 <6>[ 8.207247] NET: Registered PF_BLUETOOTH protocol family
6289 18:01:53.926557 <6>[ 8.207249] Bluetooth: HCI device and connection manager initialized
6290 18:01:53.933128 <6>[ 8.207261] Bluetooth: HCI socket layer initialized
6291 18:01:53.939583 <6>[ 8.207266] Bluetooth: L2CAP socket layer initialized
6292 18:01:53.946268 <6>[ 8.207273] Bluetooth: SCO socket layer initialized
6293 18:01:53.952752 <3>[ 8.212417] debugfs: File 'Capture' in directory 'dapm' already present!
6294 18:01:53.962555 <6>[ 8.221407] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6295 18:01:53.969010 <6>[ 8.230279] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6296 18:01:53.978711 <6>[ 8.230592] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6297 18:01:53.988614 <6>[ 8.246042] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6298 18:01:53.991765 <6>[ 8.255843] Bluetooth: HCI UART driver ver 2.3
6299 18:01:53.998387 <6>[ 8.256261] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6300 18:01:54.008378 <6>[ 8.256915] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6301 18:01:54.011353 <6>[ 8.264135] Bluetooth: HCI UART protocol H4 registered
6302 18:01:54.024792 <6>[ 8.265366] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6303 18:01:54.031134 <6>[ 8.265479] usbcore: registered new interface driver uvcvideo
6304 18:01:54.041423 <6>[ 8.274040] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6305 18:01:54.048422 <6>[ 8.282112] Bluetooth: HCI UART protocol LL registered
6306 18:01:54.054916 <6>[ 8.282727] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6307 18:01:54.064954 <6>[ 8.282736] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6308 18:01:54.075743 <6>[ 8.283058] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6309 18:01:54.082309 <6>[ 8.431336] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6310 18:01:54.088936 <6>[ 8.434212] Bluetooth: HCI UART protocol Three-wire (H5) registered
6311 18:01:54.099259 <4>[ 8.467519] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6312 18:01:54.105687 <4>[ 8.467519] Fallback method does not support PEC.
6313 18:01:54.112187 <6>[ 8.475684] Bluetooth: HCI UART protocol Broadcom registered
6314 18:01:54.118636 <3>[ 8.483409] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6315 18:01:54.125804 <6>[ 8.490666] Bluetooth: HCI UART protocol QCA registered
6316 18:01:54.132608 <6>[ 8.491770] Bluetooth: hci0: setting up ROME/QCA6390
6317 18:01:54.142434 <3>[ 8.505801] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6318 18:01:54.148847 <6>[ 8.510394] Bluetooth: HCI UART protocol Marvell registered
6319 18:01:54.206378 done
6320 18:01:54.213669 Saving random seed: OK
6321 18:01:54.223730 Starting network: ip: RTNETLINK answers: File exists
6322 18:01:54.226806 FAIL
6323 18:01:54.262862 Starting dropbear sshd: <6>[ 8.692127] NET: Registered PF_INET6 protocol family
6324 18:01:54.269956 <6>[ 8.699495] Segment Routing with IPv6
6325 18:01:54.273302 <6>[ 8.704498] In-situ OAM (IOAM) with IPv6
6326 18:01:54.280115 <3>[ 8.704499] Bluetooth: hci0: Frame reassembly failed (-84)
6327 18:01:54.285362 OK
6328 18:01:54.296386 /bin/sh: can't access tty; job control turned off
6329 18:01:54.297051 Matched prompt #10: / #
6331 18:01:54.297657 Setting prompt string to ['/ #']
6332 18:01:54.297886 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6334 18:01:54.298442 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6335 18:01:54.298678 start: 2.2.6 expect-shell-connection (timeout 00:04:08) [common]
6336 18:01:54.298873 Setting prompt string to ['/ #']
6337 18:01:54.299051 Forcing a shell prompt, looking for ['/ #']
6339 18:01:54.349553 / #
6340 18:01:54.349833 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6341 18:01:54.350038 Waiting using forced prompt support (timeout 00:02:30)
6342 18:01:54.393601 <6>[ 8.780667] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6343 18:01:54.393714
6344 18:01:54.393993 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6345 18:01:54.394098 start: 2.2.7 export-device-env (timeout 00:04:08) [common]
6346 18:01:54.394201 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6347 18:01:54.394298 end: 2.2 depthcharge-retry (duration 00:00:52) [common]
6348 18:01:54.394389 end: 2 depthcharge-action (duration 00:00:52) [common]
6349 18:01:54.394485 start: 3 lava-test-retry (timeout 00:01:00) [common]
6350 18:01:54.394577 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6351 18:01:54.394659 Using namespace: common
6353 18:01:54.494983 / # #
6354 18:01:54.495154 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6355 18:01:54.495287 <4>[ 8.863160] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6356 18:01:54.495369 <4>[ 8.881949] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6357 18:01:54.495444 #<4>[ 8.896988] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6358 18:01:54.495514 <4>[ 8.910208] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6359 18:01:54.500380
6360 18:01:54.500675 Using /lava-14291352
6362 18:01:54.601067 / # export SHELL=/bin/sh
6363 18:01:54.601275 export SHELL=/bin/sh<6>[ 8.999126] Bluetooth: hci0: QCA Product ID :0x00000008
6364 18:01:54.601361 <6>[ 9.005912] Bluetooth: hci0: QCA SOC Version :0x00000044
6365 18:01:54.601446 <6>[ 9.012604] Bluetooth: hci0: QCA ROM Version :0x00000302
6366 18:01:54.601550 <6>[ 9.019508] Bluetooth: hci0: QCA Patch Version:0x00000111
6367 18:01:54.601646 <6>[ 9.026781] Bluetooth: hci0: QCA controller version 0x00440302
6368 18:01:54.645582 <6>[ 9.034495] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6369 18:01:54.645804
6370 18:01:54.645937 / # <4>[ 9.042841] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6372 18:01:54.746575 <3>[ . /lava-14291352/environment
6373 18:01:54.746770 9.053408] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6374 18:01:54.746856 <3>[ 9.062775] Bluetooth: hci0: QCA Failed to download patch (-2)
6375 18:01:54.751530 . /lava-14291352/environment
6377 18:01:54.852066 / # /lava-14291352/bin/lava-test-runner /lava-14291352/0
6378 18:01:54.852230 Test shell timeout: 10s (minimum of the action and connection timeout)
6379 18:01:54.857304 /lava-14291352/bin/lava-test-runner /lava-14291352/0
6380 18:01:54.880535 + export 'TESTRUN_ID=0_dmesg'
6381 18:01:54.890071 + cd /lava-14291352<8>[ 9.316426] <LAVA_SIGNAL_STARTRUN 0_dmesg 14291352_1.5.2.3.1>
6382 18:01:54.890166 /0/tests/0_dmesg
6383 18:01:54.890418 Received signal: <STARTRUN> 0_dmesg 14291352_1.5.2.3.1
6384 18:01:54.890493 Starting test lava.0_dmesg (14291352_1.5.2.3.1)
6385 18:01:54.890583 Skipping test definition patterns.
6386 18:01:54.893476 + cat uuid
6387 18:01:54.893555 + UUID=14291352_1.5.2.3.1
6388 18:01:54.893623 + set +x
6389 18:01:54.900143 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6390 18:01:54.916238 <8>[ 9.342533] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6391 18:01:54.916496 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6393 18:01:54.942170 <8>[ 9.368193] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6394 18:01:54.942465 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6396 18:01:54.968099 <8>[ 9.394684] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6397 18:01:54.968420 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6399 18:01:54.972513 + set +x
6400 18:01:54.975729 Received signal: <ENDRUN> 0_dmesg 14291352_1.5.2.3.1
6401 18:01:54.975838 Ending use of test pattern.
6402 18:01:54.975920 Ending test lava.0_dmesg (14291352_1.5.2.3.1), duration 0.09
6404 18:01:54.978909 <8>[ 9.405353] <LAVA_SIGNAL_ENDRUN 0_dmesg 14291352_1.5.2.3.1>
6405 18:01:54.983612 <LAVA_TEST_RUNNER EXIT>
6406 18:01:54.983877 ok: lava_test_shell seems to have completed
6407 18:01:54.984045 alert: pass
crit: pass
emerg: pass
6408 18:01:54.984162 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6409 18:01:54.984257 end: 3 lava-test-retry (duration 00:00:01) [common]
6410 18:01:54.984363 start: 4 finalize (timeout 00:08:35) [common]
6411 18:01:54.984460 start: 4.1 power-off (timeout 00:00:30) [common]
6412 18:01:54.984637 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6413 18:01:56.545994 >> Command sent successfully.
6414 18:01:56.549135 Returned 0 in 1 seconds
6415 18:01:56.649923 end: 4.1 power-off (duration 00:00:02) [common]
6417 18:01:56.651474 start: 4.2 read-feedback (timeout 00:08:34) [common]
6418 18:01:56.652515 Listened to connection for namespace 'common' for up to 1s
6419 18:01:57.653271 Finalising connection for namespace 'common'
6420 18:01:57.653958 Disconnecting from shell: Finalise
6421 18:01:57.654342 / #
6422 18:01:57.755318 end: 4.2 read-feedback (duration 00:00:01) [common]
6423 18:01:57.755970 end: 4 finalize (duration 00:00:03) [common]
6424 18:01:57.756538 Cleaning after the job
6425 18:01:57.756985 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/ramdisk
6426 18:01:57.767290 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/kernel
6427 18:01:57.791747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/dtb
6428 18:01:57.792180 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291352/tftp-deploy-2fbbrpmg/modules
6429 18:01:57.802079 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14291352
6430 18:01:57.848277 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14291352
6431 18:01:57.848462 Job finished correctly