Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 49
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 18:37:10.094574 lava-dispatcher, installed at version: 2024.03
2 18:37:10.094783 start: 0 validate
3 18:37:10.094924 Start time: 2024-06-11 18:37:10.094916+00:00 (UTC)
4 18:37:10.095044 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:37:10.095185 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 18:37:10.420995 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:37:10.421716 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 18:37:10.697669 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:37:10.698297 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 18:37:11.013567 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:37:11.014194 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:37:11.332181 validate duration: 1.24
14 18:37:11.332481 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:37:11.332606 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:37:11.332716 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:37:11.332857 Not decompressing ramdisk as can be used compressed.
18 18:37:11.332948 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 18:37:11.333018 saving as /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/ramdisk/rootfs.cpio.gz
20 18:37:11.333087 total size: 47897469 (45 MB)
21 18:37:11.334304 progress 0 % (0 MB)
22 18:37:11.347972 progress 5 % (2 MB)
23 18:37:11.361227 progress 10 % (4 MB)
24 18:37:11.374615 progress 15 % (6 MB)
25 18:37:11.387981 progress 20 % (9 MB)
26 18:37:11.401365 progress 25 % (11 MB)
27 18:37:11.414498 progress 30 % (13 MB)
28 18:37:11.427666 progress 35 % (16 MB)
29 18:37:11.440984 progress 40 % (18 MB)
30 18:37:11.454282 progress 45 % (20 MB)
31 18:37:11.467659 progress 50 % (22 MB)
32 18:37:11.481044 progress 55 % (25 MB)
33 18:37:11.494696 progress 60 % (27 MB)
34 18:37:11.508171 progress 65 % (29 MB)
35 18:37:11.521593 progress 70 % (32 MB)
36 18:37:11.534985 progress 75 % (34 MB)
37 18:37:11.548428 progress 80 % (36 MB)
38 18:37:11.561792 progress 85 % (38 MB)
39 18:37:11.575143 progress 90 % (41 MB)
40 18:37:11.588341 progress 95 % (43 MB)
41 18:37:11.601531 progress 100 % (45 MB)
42 18:37:11.601765 45 MB downloaded in 0.27 s (170.01 MB/s)
43 18:37:11.601935 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:37:11.602205 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:37:11.602302 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:37:11.602395 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:37:11.602546 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 18:37:11.602626 saving as /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/kernel/Image
50 18:37:11.602693 total size: 54813184 (52 MB)
51 18:37:11.602760 No compression specified
52 18:37:11.603950 progress 0 % (0 MB)
53 18:37:11.619248 progress 5 % (2 MB)
54 18:37:11.634769 progress 10 % (5 MB)
55 18:37:11.650016 progress 15 % (7 MB)
56 18:37:11.665344 progress 20 % (10 MB)
57 18:37:11.680709 progress 25 % (13 MB)
58 18:37:11.695873 progress 30 % (15 MB)
59 18:37:11.711283 progress 35 % (18 MB)
60 18:37:11.726656 progress 40 % (20 MB)
61 18:37:11.742094 progress 45 % (23 MB)
62 18:37:11.757670 progress 50 % (26 MB)
63 18:37:11.773187 progress 55 % (28 MB)
64 18:37:11.788478 progress 60 % (31 MB)
65 18:37:11.803849 progress 65 % (34 MB)
66 18:37:11.819189 progress 70 % (36 MB)
67 18:37:11.834611 progress 75 % (39 MB)
68 18:37:11.850161 progress 80 % (41 MB)
69 18:37:11.865574 progress 85 % (44 MB)
70 18:37:11.881060 progress 90 % (47 MB)
71 18:37:11.896391 progress 95 % (49 MB)
72 18:37:11.911408 progress 100 % (52 MB)
73 18:37:11.911664 52 MB downloaded in 0.31 s (169.19 MB/s)
74 18:37:11.911828 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:37:11.912078 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:37:11.912173 start: 1.3 download-retry (timeout 00:09:59) [common]
78 18:37:11.912265 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 18:37:11.912413 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 18:37:11.912497 saving as /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 18:37:11.912564 total size: 57695 (0 MB)
82 18:37:11.912630 No compression specified
83 18:37:11.913853 progress 56 % (0 MB)
84 18:37:11.914155 progress 100 % (0 MB)
85 18:37:11.914375 0 MB downloaded in 0.00 s (30.42 MB/s)
86 18:37:11.914517 end: 1.3.1 http-download (duration 00:00:00) [common]
88 18:37:11.914762 end: 1.3 download-retry (duration 00:00:00) [common]
89 18:37:11.914855 start: 1.4 download-retry (timeout 00:09:59) [common]
90 18:37:11.914945 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 18:37:11.915066 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 18:37:11.915140 saving as /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/modules/modules.tar
93 18:37:11.915207 total size: 8618176 (8 MB)
94 18:37:11.915274 Using unxz to decompress xz
95 18:37:11.919619 progress 0 % (0 MB)
96 18:37:11.940532 progress 5 % (0 MB)
97 18:37:11.970608 progress 10 % (0 MB)
98 18:37:12.003195 progress 15 % (1 MB)
99 18:37:12.029702 progress 20 % (1 MB)
100 18:37:12.055726 progress 25 % (2 MB)
101 18:37:12.081864 progress 30 % (2 MB)
102 18:37:12.110665 progress 35 % (2 MB)
103 18:37:12.137977 progress 40 % (3 MB)
104 18:37:12.164327 progress 45 % (3 MB)
105 18:37:12.191603 progress 50 % (4 MB)
106 18:37:12.220400 progress 55 % (4 MB)
107 18:37:12.248232 progress 60 % (4 MB)
108 18:37:12.274511 progress 65 % (5 MB)
109 18:37:12.303875 progress 70 % (5 MB)
110 18:37:12.329855 progress 75 % (6 MB)
111 18:37:12.358546 progress 80 % (6 MB)
112 18:37:12.385294 progress 85 % (7 MB)
113 18:37:12.413839 progress 90 % (7 MB)
114 18:37:12.442255 progress 95 % (7 MB)
115 18:37:12.471849 progress 100 % (8 MB)
116 18:37:12.476663 8 MB downloaded in 0.56 s (14.64 MB/s)
117 18:37:12.476917 end: 1.4.1 http-download (duration 00:00:01) [common]
119 18:37:12.477201 end: 1.4 download-retry (duration 00:00:01) [common]
120 18:37:12.477307 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 18:37:12.477409 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 18:37:12.477510 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 18:37:12.477609 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 18:37:12.477861 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs
125 18:37:12.478023 makedir: /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin
126 18:37:12.478142 makedir: /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/tests
127 18:37:12.478251 makedir: /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/results
128 18:37:12.478376 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-add-keys
129 18:37:12.478547 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-add-sources
130 18:37:12.478695 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-background-process-start
131 18:37:12.478839 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-background-process-stop
132 18:37:12.478980 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-common-functions
133 18:37:12.479120 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-echo-ipv4
134 18:37:12.479259 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-install-packages
135 18:37:12.479402 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-installed-packages
136 18:37:12.479537 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-os-build
137 18:37:12.479678 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-probe-channel
138 18:37:12.479814 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-probe-ip
139 18:37:12.479975 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-target-ip
140 18:37:12.480168 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-target-mac
141 18:37:12.480349 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-target-storage
142 18:37:12.480500 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-case
143 18:37:12.480639 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-event
144 18:37:12.480774 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-feedback
145 18:37:12.480911 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-raise
146 18:37:12.481046 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-reference
147 18:37:12.481181 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-runner
148 18:37:12.481316 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-set
149 18:37:12.481467 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-test-shell
150 18:37:12.481612 Updating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-install-packages (oe)
151 18:37:12.481776 Updating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/bin/lava-installed-packages (oe)
152 18:37:12.481910 Creating /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/environment
153 18:37:12.482019 LAVA metadata
154 18:37:12.482102 - LAVA_JOB_ID=14291439
155 18:37:12.482173 - LAVA_DISPATCHER_IP=192.168.201.1
156 18:37:12.482285 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 18:37:12.482362 skipped lava-vland-overlay
158 18:37:12.482442 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 18:37:12.482534 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 18:37:12.482614 skipped lava-multinode-overlay
161 18:37:12.482693 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 18:37:12.482782 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 18:37:12.482861 Loading test definitions
164 18:37:12.482959 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 18:37:12.483039 Using /lava-14291439 at stage 0
166 18:37:12.483405 uuid=14291439_1.5.2.3.1 testdef=None
167 18:37:12.483502 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 18:37:12.483594 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 18:37:12.484159 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 18:37:12.484406 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 18:37:12.485077 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 18:37:12.485332 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 18:37:12.485994 runner path: /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/0/tests/0_igt-gpu-panfrost test_uuid 14291439_1.5.2.3.1
176 18:37:12.486167 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 18:37:12.486396 Creating lava-test-runner.conf files
179 18:37:12.486467 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14291439/lava-overlay-w4rzh5bs/lava-14291439/0 for stage 0
180 18:37:12.486566 - 0_igt-gpu-panfrost
181 18:37:12.486673 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 18:37:12.486766 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 18:37:12.494603 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 18:37:12.494716 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 18:37:12.494810 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 18:37:12.494904 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 18:37:12.494999 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 18:37:14.425160 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 18:37:14.425579 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 18:37:14.425707 extracting modules file /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14291439/extract-overlay-ramdisk-pwrx0z6a/ramdisk
191 18:37:14.671490 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 18:37:14.671668 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 18:37:14.671772 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14291439/compress-overlay-55gnyyww/overlay-1.5.2.4.tar.gz to ramdisk
194 18:37:14.671852 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14291439/compress-overlay-55gnyyww/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14291439/extract-overlay-ramdisk-pwrx0z6a/ramdisk
195 18:37:14.679085 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 18:37:14.679208 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 18:37:14.679309 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 18:37:14.679418 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 18:37:14.679509 Building ramdisk /var/lib/lava/dispatcher/tmp/14291439/extract-overlay-ramdisk-pwrx0z6a/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14291439/extract-overlay-ramdisk-pwrx0z6a/ramdisk
200 18:37:16.002490 >> 465983 blocks
201 18:37:22.932698 rename /var/lib/lava/dispatcher/tmp/14291439/extract-overlay-ramdisk-pwrx0z6a/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/ramdisk/ramdisk.cpio.gz
202 18:37:22.933173 end: 1.5.7 compress-ramdisk (duration 00:00:08) [common]
203 18:37:22.933304 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
204 18:37:22.933415 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
205 18:37:22.933566 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/kernel/Image']
206 18:37:36.864862 Returned 0 in 13 seconds
207 18:37:36.965886 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/kernel/image.itb
208 18:37:37.942360 output: FIT description: Kernel Image image with one or more FDT blobs
209 18:37:37.942793 output: Created: Tue Jun 11 19:37:37 2024
210 18:37:37.942869 output: Image 0 (kernel-1)
211 18:37:37.942940 output: Description:
212 18:37:37.943006 output: Created: Tue Jun 11 19:37:37 2024
213 18:37:37.943074 output: Type: Kernel Image
214 18:37:37.943140 output: Compression: lzma compressed
215 18:37:37.943206 output: Data Size: 13125101 Bytes = 12817.48 KiB = 12.52 MiB
216 18:37:37.943271 output: Architecture: AArch64
217 18:37:37.943335 output: OS: Linux
218 18:37:37.943399 output: Load Address: 0x00000000
219 18:37:37.943460 output: Entry Point: 0x00000000
220 18:37:37.943519 output: Hash algo: crc32
221 18:37:37.943578 output: Hash value: 7a9e9d3e
222 18:37:37.943636 output: Image 1 (fdt-1)
223 18:37:37.943695 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 18:37:37.943751 output: Created: Tue Jun 11 19:37:37 2024
225 18:37:37.943807 output: Type: Flat Device Tree
226 18:37:37.943865 output: Compression: uncompressed
227 18:37:37.943920 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 18:37:37.943976 output: Architecture: AArch64
229 18:37:37.944032 output: Hash algo: crc32
230 18:37:37.944087 output: Hash value: a9713552
231 18:37:37.944142 output: Image 2 (ramdisk-1)
232 18:37:37.944198 output: Description: unavailable
233 18:37:37.944253 output: Created: Tue Jun 11 19:37:37 2024
234 18:37:37.944309 output: Type: RAMDisk Image
235 18:37:37.944365 output: Compression: Unknown Compression
236 18:37:37.944420 output: Data Size: 60988033 Bytes = 59558.63 KiB = 58.16 MiB
237 18:37:37.944476 output: Architecture: AArch64
238 18:37:37.944532 output: OS: Linux
239 18:37:37.944587 output: Load Address: unavailable
240 18:37:37.944643 output: Entry Point: unavailable
241 18:37:37.944699 output: Hash algo: crc32
242 18:37:37.944753 output: Hash value: 883026fa
243 18:37:37.944809 output: Default Configuration: 'conf-1'
244 18:37:37.944864 output: Configuration 0 (conf-1)
245 18:37:37.944919 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 18:37:37.944974 output: Kernel: kernel-1
247 18:37:37.945029 output: Init Ramdisk: ramdisk-1
248 18:37:37.945084 output: FDT: fdt-1
249 18:37:37.945140 output: Loadables: kernel-1
250 18:37:37.945195 output:
251 18:37:37.945409 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 18:37:37.945550 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 18:37:37.945660 end: 1.5 prepare-tftp-overlay (duration 00:00:25) [common]
254 18:37:37.945762 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 18:37:37.945845 No LXC device requested
256 18:37:37.945930 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 18:37:37.946019 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 18:37:37.946101 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 18:37:37.946173 Checking files for TFTP limit of 4294967296 bytes.
260 18:37:37.946707 end: 1 tftp-deploy (duration 00:00:27) [common]
261 18:37:37.946818 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 18:37:37.946921 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 18:37:37.947057 substitutions:
264 18:37:37.947129 - {DTB}: 14291439/tftp-deploy-3x77qzvl/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 18:37:37.947199 - {INITRD}: 14291439/tftp-deploy-3x77qzvl/ramdisk/ramdisk.cpio.gz
266 18:37:37.947263 - {KERNEL}: 14291439/tftp-deploy-3x77qzvl/kernel/Image
267 18:37:37.947325 - {LAVA_MAC}: None
268 18:37:37.947386 - {PRESEED_CONFIG}: None
269 18:37:37.947444 - {PRESEED_LOCAL}: None
270 18:37:37.947502 - {RAMDISK}: 14291439/tftp-deploy-3x77qzvl/ramdisk/ramdisk.cpio.gz
271 18:37:37.947561 - {ROOT_PART}: None
272 18:37:37.947618 - {ROOT}: None
273 18:37:37.947676 - {SERVER_IP}: 192.168.201.1
274 18:37:37.947733 - {TEE}: None
275 18:37:37.947790 Parsed boot commands:
276 18:37:37.947846 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 18:37:37.948033 Parsed boot commands: tftpboot 192.168.201.1 14291439/tftp-deploy-3x77qzvl/kernel/image.itb 14291439/tftp-deploy-3x77qzvl/kernel/cmdline
278 18:37:37.948130 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 18:37:37.948220 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 18:37:37.948320 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 18:37:37.948413 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 18:37:37.948493 Not connected, no need to disconnect.
283 18:37:37.948572 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 18:37:37.948660 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 18:37:37.948751 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 18:37:37.952904 Setting prompt string to ['lava-test: # ']
287 18:37:37.953299 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 18:37:37.953412 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 18:37:37.953608 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 18:37:37.953738 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 18:37:37.953983 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 18:37:48.402187 Returned 0 in 10 seconds
293 18:37:48.503724 end: 2.2.2.1 pdu-reboot (duration 00:00:11) [common]
295 18:37:48.505037 end: 2.2.2 reset-device (duration 00:00:11) [common]
296 18:37:48.505542 start: 2.2.3 depthcharge-start (timeout 00:04:49) [common]
297 18:37:48.505958 Setting prompt string to 'Starting depthcharge on Juniper...'
298 18:37:48.506268 Changing prompt to 'Starting depthcharge on Juniper...'
299 18:37:48.506574 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 18:37:48.508276 [Enter `^Ec?' for help]
301 18:37:48.508681
302 18:37:48.508851 <14>[ 926.913816] init: ConnecDL] 00000000 00000000 010701
303 18:37:48.508924
304 18:37:48.508992
305 18:37:48.509059 F0: 102B 0000
306 18:37:48.509126
307 18:37:48.509195 F3: 1006 0033 [0200]
308 18:37:48.509262
309 18:37:48.509325 F3: 4001 00E0 [0200]
310 18:37:48.509387
311 18:37:48.509453 F3: 0000 0000
312 18:37:48.509524
313 18:37:48.509586 V0: 0000 0000 [0001]
314 18:37:48.509646
315 18:37:48.509706 00: 1027 0002
316 18:37:48.509771
317 18:37:48.509830 01: 0000 0000
318 18:37:48.509892
319 18:37:48.509952 BP: 0C00 0251 [0000]
320 18:37:48.510012
321 18:37:48.510071 G0: 1182 0000
322 18:37:48.510131
323 18:37:48.510190 EC: 0004 0000 [0001]
324 18:37:48.510250
325 18:37:48.510309 S7: 0000 0000 [0000]
326 18:37:48.510369
327 18:37:48.510428 CC: 0000 0000 [0001]
328 18:37:48.510488
329 18:37:48.510547 T0: 0000 00DB [000F]
330 18:37:48.510610
331 18:37:48.510670 Jump to BL
332 18:37:48.510730
333 18:37:48.510789
334 18:37:48.510848
335 18:37:48.510909 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 18:37:48.510972 ARM64: Exception handlers installed.
337 18:37:48.511035 ARM64: Testing exception
338 18:37:48.511095 ARM64: Done test exception
339 18:37:48.511155 WDT: Last reset was cold boot
340 18:37:48.511216 SPI0(PAD0) initialized at 992727 Hz
341 18:37:48.511276 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 18:37:48.511336 Manufacturer: ef
343 18:37:48.511396 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 18:37:48.511456 Probing TPM: . done!
345 18:37:48.511515 TPM ready after 0 ms
346 18:37:48.511575 Connected to device vid:did:rid of 1ae0:0028:00
347 18:37:48.511635 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
348 18:37:48.511697 Initialized TPM device CR50 revision 0
349 18:37:48.511757 tlcl_send_startup: Startup return code is 0
350 18:37:48.511818 TPM: setup succeeded
351 18:37:48.511878 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 18:37:48.511938 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 18:37:48.511998 in-header: 03 19 00 00 08 00 00 00
354 18:37:48.512058 in-data: a2 e0 47 00 13 00 00 00
355 18:37:48.512118 Chrome EC: UHEPI supported
356 18:37:48.512178 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 18:37:48.512238 in-header: 03 a1 00 00 08 00 00 00
358 18:37:48.512298 in-data: 84 60 60 10 00 00 00 00
359 18:37:48.512358 Phase 1
360 18:37:48.512418 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 18:37:48.512478 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 18:37:48.512539 VB2:vb2_check_recovery() Recovery was requested manually
363 18:37:48.512599 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 18:37:48.512660 Recovery requested (1009000e)
365 18:37:48.512719 tlcl_extend: response is 0
366 18:37:48.512779 tlcl_extend: response is 0
367 18:37:48.512839
368 18:37:48.512898
369 18:37:48.512957 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 18:37:48.513019 ARM64: Exception handlers installed.
371 18:37:48.513079 ARM64: Testing exception
372 18:37:48.513139 ARM64: Done test exception
373 18:37:48.513198 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2031
374 18:37:48.513259 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 18:37:48.513319 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 18:37:48.513379 [RTC]rtc_get_frequency_meter,134: input=0xf, output=862
377 18:37:48.513444 [RTC]rtc_get_frequency_meter,134: input=0x7, output=732
378 18:37:48.513505 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
379 18:37:48.513566 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
380 18:37:48.513625 [RTC]rtc_get_frequency_meter,134: input=0xa, output=780
381 18:37:48.513684 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
382 18:37:48.513744 [RTC]rtc_get_frequency_meter,134: input=0xb, output=797
383 18:37:48.513804 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
384 18:37:48.513863 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 18:37:48.513923 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 18:37:48.513982 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 18:37:48.514042 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 18:37:48.514102 in-header: 03 19 00 00 08 00 00 00
389 18:37:48.514163 in-data: a2 e0 47 00 13 00 00 00
390 18:37:48.514222 Chrome EC: UHEPI supported
391 18:37:48.514282 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 18:37:48.514342 in-header: 03 a1 00 00 08 00 00 00
393 18:37:48.514402 in-data: 84 60 60 10 00 00 00 00
394 18:37:48.514461 Skip loading cached calibration data
395 18:37:48.514521 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 18:37:48.514581 in-header: 03 a1 00 00 08 00 00 00
397 18:37:48.514641 in-data: 84 60 60 10 00 00 00 00
398 18:37:48.514701 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 18:37:48.514761 in-header: 03 a1 00 00 08 00 00 00
400 18:37:48.514821 in-data: 84 60 60 10 00 00 00 00
401 18:37:48.514881 ADC[3]: Raw value=215404 ID=1
402 18:37:48.514941 Manufacturer: ef
403 18:37:48.515000 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 18:37:48.515060 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 18:37:48.515121 CBFS @ 21000 size 3d4000
406 18:37:48.515181 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 18:37:48.515240 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
408 18:37:48.515300 CBFS: Found @ offset 3c700 size 44
409 18:37:48.515360 DRAM-K: Full Calibration
410 18:37:48.515420 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 18:37:48.515480 CBFS @ 21000 size 3d4000
412 18:37:48.515540 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 18:37:48.515600 CBFS: Locating 'fallback/dram'
414 18:37:48.515660 CBFS: Found @ offset 24b00 size 12268
415 18:37:48.515719 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
416 18:37:48.515780 ddr_geometry: 1, config: 0x0
417 18:37:48.515839 header.status = 0x0
418 18:37:48.515899 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 18:37:48.516155 header.version = 0x5 (expected: 0x5)
420 18:37:48.516227 header.size = 0x8f0 (expected: 0x8f0)
421 18:37:48.516290 header.config = 0x0
422 18:37:48.516350 header.flags = 0x0
423 18:37:48.516420 header.checksum = 0x0
424 18:37:48.516483 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 18:37:48.516545 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 18:37:48.516606 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 18:37:48.516666 ddr_geometry:1
428 18:37:48.516726 [EMI] new MDL number = 1
429 18:37:48.516786 dram_cbt_mode_extern: 0
430 18:37:48.516845 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 18:37:48.516905 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 18:37:48.516965
433 18:37:48.517024
434 18:37:48.517083 [Bianco] ETT version 0.0.0.1
435 18:37:48.517144 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 18:37:48.517204
437 18:37:48.517263 vSetVcoreByFreq with vcore:762500, freq=1600
438 18:37:48.517326
439 18:37:48.517385 [DramcInit]
440 18:37:48.517464 AutoRefreshCKEOff AutoREF OFF
441 18:37:48.517528 DDRPhyPLLSetting-CKEOFF
442 18:37:48.517588 DDRPhyPLLSetting-CKEON
443 18:37:48.517648
444 18:37:48.517707 Enable WDQS
445 18:37:48.517766 [ModeRegInit_LP4] CH0 RK0
446 18:37:48.517826 Write Rank0 MR13 =0x18
447 18:37:48.517886 Write Rank0 MR12 =0x5d
448 18:37:48.517945 Write Rank0 MR1 =0x56
449 18:37:48.518005 Write Rank0 MR2 =0x1a
450 18:37:48.518065 Write Rank0 MR11 =0x0
451 18:37:48.518125 Write Rank0 MR22 =0x38
452 18:37:48.518184 Write Rank0 MR14 =0x5d
453 18:37:48.518243 Write Rank0 MR3 =0x30
454 18:37:48.518302 Write Rank0 MR13 =0x58
455 18:37:48.518361 Write Rank0 MR12 =0x5d
456 18:37:48.518443 Write Rank0 MR1 =0x56
457 18:37:48.518542 Write Rank0 MR2 =0x2d
458 18:37:48.518612 Write Rank0 MR11 =0x23
459 18:37:48.518674 Write Rank0 MR22 =0x34
460 18:37:48.518735 Write Rank0 MR14 =0x10
461 18:37:48.518795 Write Rank0 MR3 =0x30
462 18:37:48.518855 Write Rank0 MR13 =0xd8
463 18:37:48.518916 [ModeRegInit_LP4] CH0 RK1
464 18:37:48.518976 Write Rank1 MR13 =0x18
465 18:37:48.519035 Write Rank1 MR12 =0x5d
466 18:37:48.519094 Write Rank1 MR1 =0x56
467 18:37:48.519154 Write Rank1 MR2 =0x1a
468 18:37:48.519213 Write Rank1 MR11 =0x0
469 18:37:48.519273 Write Rank1 MR22 =0x38
470 18:37:48.519332 Write Rank1 MR14 =0x5d
471 18:37:48.519391 Write Rank1 MR3 =0x30
472 18:37:48.519450 Write Rank1 MR13 =0x58
473 18:37:48.519509 Write Rank1 MR12 =0x5d
474 18:37:48.519568 Write Rank1 MR1 =0x56
475 18:37:48.519627 Write Rank1 MR2 =0x2d
476 18:37:48.519686 Write Rank1 MR11 =0x23
477 18:37:48.519745 Write Rank1 MR22 =0x34
478 18:37:48.519804 Write Rank1 MR14 =0x10
479 18:37:48.519863 Write Rank1 MR3 =0x30
480 18:37:48.519923 Write Rank1 MR13 =0xd8
481 18:37:48.519982 [ModeRegInit_LP4] CH1 RK0
482 18:37:48.520041 Write Rank0 MR13 =0x18
483 18:37:48.520100 Write Rank0 MR12 =0x5d
484 18:37:48.520159 Write Rank0 MR1 =0x56
485 18:37:48.520217 Write Rank0 MR2 =0x1a
486 18:37:48.520276 Write Rank0 MR11 =0x0
487 18:37:48.520335 Write Rank0 MR22 =0x38
488 18:37:48.520394 Write Rank0 MR14 =0x5d
489 18:37:48.520453 Write Rank0 MR3 =0x30
490 18:37:48.520512 Write Rank0 MR13 =0x58
491 18:37:48.520571 Write Rank0 MR12 =0x5d
492 18:37:48.520630 Write Rank0 MR1 =0x56
493 18:37:48.520688 Write Rank0 MR2 =0x2d
494 18:37:48.520746 Write Rank0 MR11 =0x23
495 18:37:48.520805 Write Rank0 MR22 =0x34
496 18:37:48.520864 Write Rank0 MR14 =0x10
497 18:37:48.520923 Write Rank0 MR3 =0x30
498 18:37:48.520981 Write Rank0 MR13 =0xd8
499 18:37:48.521040 [ModeRegInit_LP4] CH1 RK1
500 18:37:48.521100 Write Rank1 MR13 =0x18
501 18:37:48.521159 Write Rank1 MR12 =0x5d
502 18:37:48.521218 Write Rank1 MR1 =0x56
503 18:37:48.521277 Write Rank1 MR2 =0x1a
504 18:37:48.521336 Write Rank1 MR11 =0x0
505 18:37:48.521396 Write Rank1 MR22 =0x38
506 18:37:48.521464 Write Rank1 MR14 =0x5d
507 18:37:48.521525 Write Rank1 MR3 =0x30
508 18:37:48.521584 Write Rank1 MR13 =0x58
509 18:37:48.521644 Write Rank1 MR12 =0x5d
510 18:37:48.521703 Write Rank1 MR1 =0x56
511 18:37:48.521762 Write Rank1 MR2 =0x2d
512 18:37:48.521821 Write Rank1 MR11 =0x23
513 18:37:48.521880 Write Rank1 MR22 =0x34
514 18:37:48.521940 Write Rank1 MR14 =0x10
515 18:37:48.521999 Write Rank1 MR3 =0x30
516 18:37:48.522058 Write Rank1 MR13 =0xd8
517 18:37:48.522117 match AC timing 3
518 18:37:48.522177 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 18:37:48.522238 [MiockJmeterHQA]
520 18:37:48.522298 vSetVcoreByFreq with vcore:762500, freq=1600
521 18:37:48.522358
522 18:37:48.522417 MIOCK jitter meter ch=0
523 18:37:48.522478
524 18:37:48.522537 1T = (101-18) = 83 dly cells
525 18:37:48.522599 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
526 18:37:48.522660 vSetVcoreByFreq with vcore:725000, freq=1200
527 18:37:48.522719
528 18:37:48.522778 MIOCK jitter meter ch=0
529 18:37:48.522837
530 18:37:48.522896 1T = (96-17) = 79 dly cells
531 18:37:48.522958 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
532 18:37:48.523018 vSetVcoreByFreq with vcore:725000, freq=800
533 18:37:48.523078
534 18:37:48.523137 MIOCK jitter meter ch=0
535 18:37:48.523196
536 18:37:48.523255 1T = (96-17) = 79 dly cells
537 18:37:48.523316 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
538 18:37:48.523376 vSetVcoreByFreq with vcore:762500, freq=1600
539 18:37:48.523435 vSetVcoreByFreq with vcore:762500, freq=1600
540 18:37:48.523495
541 18:37:48.523554 K DRVP
542 18:37:48.523613 1. OCD DRVP=0 CALOUT=0
543 18:37:48.523674 1. OCD DRVP=1 CALOUT=0
544 18:37:48.523735 1. OCD DRVP=2 CALOUT=0
545 18:37:48.523796 1. OCD DRVP=3 CALOUT=0
546 18:37:48.523857 1. OCD DRVP=4 CALOUT=0
547 18:37:48.523918 1. OCD DRVP=5 CALOUT=0
548 18:37:48.523978 1. OCD DRVP=6 CALOUT=0
549 18:37:48.524039 1. OCD DRVP=7 CALOUT=0
550 18:37:48.524099 1. OCD DRVP=8 CALOUT=1
551 18:37:48.524160
552 18:37:48.524219 1. OCD DRVP calibration OK! DRVP=8
553 18:37:48.524280
554 18:37:48.524339
555 18:37:48.524398
556 18:37:48.524456 K ODTN
557 18:37:48.524515 3. OCD ODTN=0 ,CALOUT=1
558 18:37:48.524579 3. OCD ODTN=1 ,CALOUT=1
559 18:37:48.524640 3. OCD ODTN=2 ,CALOUT=1
560 18:37:48.524701 3. OCD ODTN=3 ,CALOUT=1
561 18:37:48.524761 3. OCD ODTN=4 ,CALOUT=1
562 18:37:48.524821 3. OCD ODTN=5 ,CALOUT=1
563 18:37:48.524882 3. OCD ODTN=6 ,CALOUT=1
564 18:37:48.524942 3. OCD ODTN=7 ,CALOUT=0
565 18:37:48.525002
566 18:37:48.525061 3. OCD ODTN calibration OK! ODTN=7
567 18:37:48.525122
568 18:37:48.525180 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
569 18:37:48.525240 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
570 18:37:48.525300 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
571 18:37:48.525360
572 18:37:48.525418 K DRVP
573 18:37:48.525492 1. OCD DRVP=0 CALOUT=0
574 18:37:48.525554 1. OCD DRVP=1 CALOUT=0
575 18:37:48.525615 1. OCD DRVP=2 CALOUT=0
576 18:37:48.525675 1. OCD DRVP=3 CALOUT=0
577 18:37:48.525736 1. OCD DRVP=4 CALOUT=0
578 18:37:48.525797 1. OCD DRVP=5 CALOUT=0
579 18:37:48.525857 1. OCD DRVP=6 CALOUT=0
580 18:37:48.525918 1. OCD DRVP=7 CALOUT=0
581 18:37:48.525978 1. OCD DRVP=8 CALOUT=0
582 18:37:48.526039 1. OCD DRVP=9 CALOUT=0
583 18:37:48.526291 1. OCD DRVP=10 CALOUT=1
584 18:37:48.526363
585 18:37:48.526425 1. OCD DRVP calibration OK! DRVP=10
586 18:37:48.526486
587 18:37:48.526547
588 18:37:48.526606
589 18:37:48.526666 K ODTN
590 18:37:48.526726 3. OCD ODTN=0 ,CALOUT=1
591 18:37:48.526788 3. OCD ODTN=1 ,CALOUT=1
592 18:37:48.526849 3. OCD ODTN=2 ,CALOUT=1
593 18:37:48.526910 3. OCD ODTN=3 ,CALOUT=1
594 18:37:48.526971 3. OCD ODTN=4 ,CALOUT=1
595 18:37:48.527031 3. OCD ODTN=5 ,CALOUT=1
596 18:37:48.527092 3. OCD ODTN=6 ,CALOUT=1
597 18:37:48.527152 3. OCD ODTN=7 ,CALOUT=1
598 18:37:48.527213 3. OCD ODTN=8 ,CALOUT=1
599 18:37:48.527274 3. OCD ODTN=9 ,CALOUT=1
600 18:37:48.527334 3. OCD ODTN=10 ,CALOUT=1
601 18:37:48.527395 3. OCD ODTN=11 ,CALOUT=1
602 18:37:48.527455 3. OCD ODTN=12 ,CALOUT=1
603 18:37:48.527516 3. OCD ODTN=13 ,CALOUT=1
604 18:37:48.527577 3. OCD ODTN=14 ,CALOUT=1
605 18:37:48.527637 3. OCD ODTN=15 ,CALOUT=0
606 18:37:48.527698
607 18:37:48.527757 3. OCD ODTN calibration OK! ODTN=15
608 18:37:48.527818
609 18:37:48.527878 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
610 18:37:48.527938 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
611 18:37:48.527998 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
612 18:37:48.528059
613 18:37:48.528118 [DramcInit]
614 18:37:48.528176 AutoRefreshCKEOff AutoREF OFF
615 18:37:48.528236 DDRPhyPLLSetting-CKEOFF
616 18:37:48.528295 DDRPhyPLLSetting-CKEON
617 18:37:48.528355
618 18:37:48.528414 Enable WDQS
619 18:37:48.528473 ==
620 18:37:48.528532 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
621 18:37:48.528592 fsp= 1, odt_onoff= 1, Byte mode= 0
622 18:37:48.528652 ==
623 18:37:48.528712 [Duty_Offset_Calibration]
624 18:37:48.528772
625 18:37:48.528830 ===========================
626 18:37:48.528890 B0:1 B1:-1 CA:0
627 18:37:48.528949 ==
628 18:37:48.529008 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
629 18:37:48.529069 fsp= 1, odt_onoff= 1, Byte mode= 0
630 18:37:48.529129 ==
631 18:37:48.529188 [Duty_Offset_Calibration]
632 18:37:48.529248
633 18:37:48.529307 ===========================
634 18:37:48.529367 B0:1 B1:0 CA:0
635 18:37:48.529426 [ModeRegInit_LP4] CH0 RK0
636 18:37:48.529495 Write Rank0 MR13 =0x18
637 18:37:48.529554 Write Rank0 MR12 =0x5d
638 18:37:48.529613 Write Rank0 MR1 =0x56
639 18:37:48.529672 Write Rank0 MR2 =0x1a
640 18:37:48.529731 Write Rank0 MR11 =0x0
641 18:37:48.529790 Write Rank0 MR22 =0x38
642 18:37:48.529849 Write Rank0 MR14 =0x5d
643 18:37:48.529907 Write Rank0 MR3 =0x30
644 18:37:48.529966 Write Rank0 MR13 =0x58
645 18:37:48.530025 Write Rank0 MR12 =0x5d
646 18:37:48.530084 Write Rank0 MR1 =0x56
647 18:37:48.530142 Write Rank0 MR2 =0x2d
648 18:37:48.530201 Write Rank0 MR11 =0x23
649 18:37:48.530260 Write Rank0 MR22 =0x34
650 18:37:48.530318 Write Rank0 MR14 =0x10
651 18:37:48.530378 Write Rank0 MR3 =0x30
652 18:37:48.530437 Write Rank0 MR13 =0xd8
653 18:37:48.530496 [ModeRegInit_LP4] CH0 RK1
654 18:37:48.530555 Write Rank1 MR13 =0x18
655 18:37:48.530613 Write Rank1 MR12 =0x5d
656 18:37:48.530672 Write Rank1 MR1 =0x56
657 18:37:48.530731 Write Rank1 MR2 =0x1a
658 18:37:48.530790 Write Rank1 MR11 =0x0
659 18:37:48.530849 Write Rank1 MR22 =0x38
660 18:37:48.530909 Write Rank1 MR14 =0x5d
661 18:37:48.530968 Write Rank1 MR3 =0x30
662 18:37:48.531027 Write Rank1 MR13 =0x58
663 18:37:48.531086 Write Rank1 MR12 =0x5d
664 18:37:48.531145 Write Rank1 MR1 =0x56
665 18:37:48.531205 Write Rank1 MR2 =0x2d
666 18:37:48.531264 Write Rank1 MR11 =0x23
667 18:37:48.531322 Write Rank1 MR22 =0x34
668 18:37:48.531381 Write Rank1 MR14 =0x10
669 18:37:48.531440 Write Rank1 MR3 =0x30
670 18:37:48.531499 Write Rank1 MR13 =0xd8
671 18:37:48.531558 [ModeRegInit_LP4] CH1 RK0
672 18:37:48.531617 Write Rank0 MR13 =0x18
673 18:37:48.531676 Write Rank0 MR12 =0x5d
674 18:37:48.531735 Write Rank0 MR1 =0x56
675 18:37:48.531794 Write Rank0 MR2 =0x1a
676 18:37:48.531853 Write Rank0 MR11 =0x0
677 18:37:48.531912 Write Rank0 MR22 =0x38
678 18:37:48.531971 Write Rank0 MR14 =0x5d
679 18:37:48.532030 Write Rank0 MR3 =0x30
680 18:37:48.532089 Write Rank0 MR13 =0x58
681 18:37:48.532148 Write Rank0 MR12 =0x5d
682 18:37:48.532206 Write Rank0 MR1 =0x56
683 18:37:48.532265 Write Rank0 MR2 =0x2d
684 18:37:48.532324 Write Rank0 MR11 =0x23
685 18:37:48.532383 Write Rank0 MR22 =0x34
686 18:37:48.532442 Write Rank0 MR14 =0x10
687 18:37:48.532500 Write Rank0 MR3 =0x30
688 18:37:48.532559 Write Rank0 MR13 =0xd8
689 18:37:48.532618 [ModeRegInit_LP4] CH1 RK1
690 18:37:48.532677 Write Rank1 MR13 =0x18
691 18:37:48.532736 Write Rank1 MR12 =0x5d
692 18:37:48.532795 Write Rank1 MR1 =0x56
693 18:37:48.532855 Write Rank1 MR2 =0x1a
694 18:37:48.532914 Write Rank1 MR11 =0x0
695 18:37:48.532973 Write Rank1 MR22 =0x38
696 18:37:48.533032 Write Rank1 MR14 =0x5d
697 18:37:48.533091 Write Rank1 MR3 =0x30
698 18:37:48.533150 Write Rank1 MR13 =0x58
699 18:37:48.533209 Write Rank1 MR12 =0x5d
700 18:37:48.533269 Write Rank1 MR1 =0x56
701 18:37:48.533328 Write Rank1 MR2 =0x2d
702 18:37:48.533386 Write Rank1 MR11 =0x23
703 18:37:48.533458 Write Rank1 MR22 =0x34
704 18:37:48.533520 Write Rank1 MR14 =0x10
705 18:37:48.533579 Write Rank1 MR3 =0x30
706 18:37:48.533638 Write Rank1 MR13 =0xd8
707 18:37:48.533697 match AC timing 3
708 18:37:48.533757 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
709 18:37:48.533818 DramC Write-DBI off
710 18:37:48.533877 DramC Read-DBI off
711 18:37:48.533937 Write Rank0 MR13 =0x59
712 18:37:48.533996 ==
713 18:37:48.534055 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
714 18:37:48.534115 fsp= 1, odt_onoff= 1, Byte mode= 0
715 18:37:48.534175 ==
716 18:37:48.534235 === u2Vref_new: 0x56 --> 0x2d
717 18:37:48.534294 === u2Vref_new: 0x58 --> 0x38
718 18:37:48.534354 === u2Vref_new: 0x5a --> 0x39
719 18:37:48.534414 === u2Vref_new: 0x5c --> 0x3c
720 18:37:48.534473 === u2Vref_new: 0x5e --> 0x3d
721 18:37:48.534533 === u2Vref_new: 0x60 --> 0xa0
722 18:37:48.534592 [CA 0] Center 34 (6~63) winsize 58
723 18:37:48.534652 [CA 1] Center 35 (7~63) winsize 57
724 18:37:48.534711 [CA 2] Center 28 (-1~58) winsize 60
725 18:37:48.534771 [CA 3] Center 24 (-4~52) winsize 57
726 18:37:48.534830 [CA 4] Center 25 (-3~53) winsize 57
727 18:37:48.534889 [CA 5] Center 30 (1~59) winsize 59
728 18:37:48.534947
729 18:37:48.535007 [CATrainingPosCal] consider 1 rank data
730 18:37:48.535066 u2DelayCellTimex100 = 753/100 ps
731 18:37:48.535126 CA0 delay=34 (6~63),Diff = 10 PI (12 cell)
732 18:37:48.535186 CA1 delay=35 (7~63),Diff = 11 PI (14 cell)
733 18:37:48.535245 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
734 18:37:48.535305 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
735 18:37:48.535365 CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)
736 18:37:48.535424 CA5 delay=30 (1~59),Diff = 6 PI (7 cell)
737 18:37:48.535484
738 18:37:48.535543 CA PerBit enable=1, Macro0, CA PI delay=24
739 18:37:48.535603 === u2Vref_new: 0x5c --> 0x3c
740 18:37:48.535664
741 18:37:48.535723 Vref(ca) range 1: 28
742 18:37:48.535782
743 18:37:48.535842 CS Dly= 7 (38-0-32)
744 18:37:48.535901 Write Rank0 MR13 =0xd8
745 18:37:48.535960 Write Rank0 MR13 =0xd8
746 18:37:48.536020 Write Rank0 MR12 =0x5c
747 18:37:48.536282 Write Rank1 MR13 =0x59
748 18:37:48.536349 ==
749 18:37:48.536411 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
750 18:37:48.536473 fsp= 1, odt_onoff= 1, Byte mode= 0
751 18:37:48.536533 ==
752 18:37:48.536592 === u2Vref_new: 0x56 --> 0x2d
753 18:37:48.536652 === u2Vref_new: 0x58 --> 0x38
754 18:37:48.536712 === u2Vref_new: 0x5a --> 0x39
755 18:37:48.536772 === u2Vref_new: 0x5c --> 0x3c
756 18:37:48.536832 === u2Vref_new: 0x5e --> 0x3d
757 18:37:48.536892 === u2Vref_new: 0x60 --> 0xa0
758 18:37:48.536952 [CA 0] Center 35 (7~63) winsize 57
759 18:37:48.537012 [CA 1] Center 35 (7~63) winsize 57
760 18:37:48.537071 [CA 2] Center 29 (0~59) winsize 60
761 18:37:48.537131 [CA 3] Center 23 (-5~52) winsize 58
762 18:37:48.537190 [CA 4] Center 24 (-4~52) winsize 57
763 18:37:48.537250 [CA 5] Center 29 (1~58) winsize 58
764 18:37:48.537309
765 18:37:48.537368 [CATrainingPosCal] consider 2 rank data
766 18:37:48.537434 u2DelayCellTimex100 = 753/100 ps
767 18:37:48.537496 CA0 delay=35 (7~63),Diff = 11 PI (14 cell)
768 18:37:48.537556 CA1 delay=35 (7~63),Diff = 11 PI (14 cell)
769 18:37:48.537616 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
770 18:37:48.537676 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
771 18:37:48.537736 CA4 delay=24 (-3~52),Diff = 0 PI (0 cell)
772 18:37:48.537795 CA5 delay=29 (1~58),Diff = 5 PI (6 cell)
773 18:37:48.537856
774 18:37:48.537915 CA PerBit enable=1, Macro0, CA PI delay=24
775 18:37:48.537976 === u2Vref_new: 0x60 --> 0xa0
776 18:37:48.538036
777 18:37:48.538095 Vref(ca) range 1: 32
778 18:37:48.538154
779 18:37:48.538213 CS Dly= 6 (37-0-32)
780 18:37:48.538273 Write Rank1 MR13 =0xd8
781 18:37:48.538333 Write Rank1 MR13 =0xd8
782 18:37:48.538392 Write Rank1 MR12 =0x60
783 18:37:48.538452 [RankSwap] Rank num 2, (Multi 1), Rank 0
784 18:37:48.538511 Write Rank0 MR2 =0xad
785 18:37:48.538570 [Write Leveling]
786 18:37:48.538630 delay byte0 byte1 byte2 byte3
787 18:37:48.538689
788 18:37:48.538748 10 0 0
789 18:37:48.538809 11 0 0
790 18:37:48.538870 12 0 0
791 18:37:48.538930 13 0 0
792 18:37:48.538991 14 0 0
793 18:37:48.539051 15 0 0
794 18:37:48.539111 16 0 0
795 18:37:48.539171 17 0 0
796 18:37:48.539232 18 0 0
797 18:37:48.539292 19 0 0
798 18:37:48.539352 20 0 0
799 18:37:48.539412 21 0 0
800 18:37:48.539472 22 0 0
801 18:37:48.539532 23 0 0
802 18:37:48.539592 24 0 0
803 18:37:48.539653 25 0 0
804 18:37:48.539713 26 0 ff
805 18:37:48.539773 27 0 ff
806 18:37:48.539833 28 0 ff
807 18:37:48.539892 29 0 ff
808 18:37:48.539952 30 0 ff
809 18:37:48.540012 31 ff ff
810 18:37:48.540073 32 ff ff
811 18:37:48.540133 33 ff ff
812 18:37:48.540193 34 ff ff
813 18:37:48.540254 35 ff ff
814 18:37:48.540314 36 ff ff
815 18:37:48.540374 37 ff ff
816 18:37:48.540434 pass bytecount = 0xff (0xff: all bytes pass)
817 18:37:48.540494
818 18:37:48.540553 DQS0 dly: 31
819 18:37:48.540612 DQS1 dly: 26
820 18:37:48.540671 Write Rank0 MR2 =0x2d
821 18:37:48.540731 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 18:37:48.540791 Write Rank0 MR1 =0xd6
823 18:37:48.540850 [Gating]
824 18:37:48.540909 ==
825 18:37:48.540968 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
826 18:37:48.541028 fsp= 1, odt_onoff= 1, Byte mode= 0
827 18:37:48.541088 ==
828 18:37:48.541147 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
829 18:37:48.541208 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
830 18:37:48.541269 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
831 18:37:48.541330 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
832 18:37:48.541391 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
833 18:37:48.541456 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
834 18:37:48.541517 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 18:37:48.541578 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 18:37:48.541639 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 18:37:48.541701 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 18:37:48.541761 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(1 0)(1 0)| 0
839 18:37:48.541822 3 2 12 |302 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
840 18:37:48.541884 3 2 16 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
841 18:37:48.541944 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 18:37:48.542006 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 18:37:48.542067 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 18:37:48.542127 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 18:37:48.542187 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 18:37:48.542248 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
847 18:37:48.542309 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 18:37:48.542369 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 18:37:48.542430 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
850 18:37:48.542491 [Byte 0] Lead/lag Transition tap number (1)
851 18:37:48.542551 [Byte 1] Lead/lag falling Transition (3, 3, 20)
852 18:37:48.542611 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 18:37:48.542672 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 18:37:48.542733 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 18:37:48.542793 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
856 18:37:48.542854 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
857 18:37:48.542915 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
858 18:37:48.542975 3 4 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
859 18:37:48.543036 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
860 18:37:48.543096 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 18:37:48.543157 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 18:37:48.543240 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 18:37:48.543304 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 18:37:48.543365 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 18:37:48.543426 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 18:37:48.543487 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 18:37:48.543548 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 18:37:48.543609 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 18:37:48.543670 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 18:37:48.543731 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 18:37:48.543987 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 18:37:48.544058 [Byte 0] Lead/lag falling Transition (3, 6, 4)
873 18:37:48.544121 [Byte 1] Lead/lag falling Transition (3, 6, 4)
874 18:37:48.544182 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
875 18:37:48.544244 [Byte 0] Lead/lag Transition tap number (2)
876 18:37:48.544304 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
877 18:37:48.544366 [Byte 1] Lead/lag Transition tap number (3)
878 18:37:48.544426 3 6 16 |1a1a 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
879 18:37:48.544488 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 18:37:48.544549 [Byte 0]First pass (3, 6, 20)
881 18:37:48.544609 [Byte 1]First pass (3, 6, 20)
882 18:37:48.544669 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 18:37:48.544730 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 18:37:48.544790 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 18:37:48.544851 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 18:37:48.544912 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 18:37:48.544973 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 18:37:48.545034 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 18:37:48.545094 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 18:37:48.545155 All bytes gating window > 1UI, Early break!
891 18:37:48.545214
892 18:37:48.545273 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
893 18:37:48.545333
894 18:37:48.545393 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
895 18:37:48.545472
896 18:37:48.545534
897 18:37:48.545594
898 18:37:48.545653 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
899 18:37:48.545713
900 18:37:48.545773 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
901 18:37:48.545833
902 18:37:48.545892
903 18:37:48.545951 Write Rank0 MR1 =0x56
904 18:37:48.546011
905 18:37:48.546070 best RODT dly(2T, 0.5T) = (2, 3)
906 18:37:48.546130
907 18:37:48.546189 best RODT dly(2T, 0.5T) = (2, 3)
908 18:37:48.546249 ==
909 18:37:48.546309 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 18:37:48.546370 fsp= 1, odt_onoff= 1, Byte mode= 0
911 18:37:48.546430 ==
912 18:37:48.546489 Start DQ dly to find pass range UseTestEngine =0
913 18:37:48.546550 x-axis: bit #, y-axis: DQ dly (-127~63)
914 18:37:48.546610 RX Vref Scan = 0
915 18:37:48.546670 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 18:37:48.546735 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 18:37:48.546796 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 18:37:48.546857 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 18:37:48.546918 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 18:37:48.546979 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 18:37:48.547041 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 18:37:48.547100 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 18:37:48.547160 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 18:37:48.547221 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 18:37:48.547282 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 18:37:48.547345 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 18:37:48.547406 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 18:37:48.547467 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 18:37:48.547527 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 18:37:48.547589 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 18:37:48.547649 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 18:37:48.547710 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 18:37:48.547770 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 18:37:48.547831 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 18:37:48.547891 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 18:37:48.547951 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 18:37:48.548012 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 18:37:48.548073 -3, [0] xxxxxxxx oxxxxxxx [MSB]
939 18:37:48.548134 -2, [0] xxxoxxxx oxxoxxxx [MSB]
940 18:37:48.548195 -1, [0] xxxoxxxx oxxoxxxx [MSB]
941 18:37:48.548255 0, [0] xxxoxxxx ooxoooxx [MSB]
942 18:37:48.548316 1, [0] xxxoxoxx ooxoooox [MSB]
943 18:37:48.548382 2, [0] xxxoxoox ooxoooox [MSB]
944 18:37:48.548444 3, [0] xxxoxoox ooxoooox [MSB]
945 18:37:48.548504 4, [0] xxxoxoox ooxoooox [MSB]
946 18:37:48.548565 5, [0] xxxooooo ooxooooo [MSB]
947 18:37:48.548625 6, [0] oooooooo ooxooooo [MSB]
948 18:37:48.548685 7, [0] oooooooo ooxooooo [MSB]
949 18:37:48.548745 32, [0] oooxoooo oooooooo [MSB]
950 18:37:48.548805 33, [0] oooxoooo xooooooo [MSB]
951 18:37:48.548866 34, [0] oooxoooo xooxoooo [MSB]
952 18:37:48.548926 35, [0] oooxoooo xxoxoooo [MSB]
953 18:37:48.548986 36, [0] oooxoxoo xxoxxoxo [MSB]
954 18:37:48.549046 37, [0] oooxoxxx xxoxxxxo [MSB]
955 18:37:48.549107 38, [0] oooxoxxx xxoxxxxx [MSB]
956 18:37:48.549167 39, [0] oooxoxxx xxoxxxxx [MSB]
957 18:37:48.549227 40, [0] ooxxxxxx xxoxxxxx [MSB]
958 18:37:48.549288 41, [0] xxxxxxxx xxoxxxxx [MSB]
959 18:37:48.549348 42, [0] xxxxxxxx xxxxxxxx [MSB]
960 18:37:48.549408 iDelay=42, Bit 0, Center 23 (6 ~ 40) 35
961 18:37:48.549483 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
962 18:37:48.549544 iDelay=42, Bit 2, Center 22 (6 ~ 39) 34
963 18:37:48.549604 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
964 18:37:48.549664 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
965 18:37:48.549735 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
966 18:37:48.549796 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
967 18:37:48.549855 iDelay=42, Bit 7, Center 20 (5 ~ 36) 32
968 18:37:48.549914 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
969 18:37:48.549974 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
970 18:37:48.550034 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
971 18:37:48.550094 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
972 18:37:48.550153 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
973 18:37:48.550213 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
974 18:37:48.550272 iDelay=42, Bit 14, Center 18 (1 ~ 35) 35
975 18:37:48.550331 iDelay=42, Bit 15, Center 21 (5 ~ 37) 33
976 18:37:48.550390 ==
977 18:37:48.550450 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 18:37:48.550511 fsp= 1, odt_onoff= 1, Byte mode= 0
979 18:37:48.550571 ==
980 18:37:48.550630 DQS Delay:
981 18:37:48.550689 DQS0 = 0, DQS1 = 0
982 18:37:48.550748 DQM Delay:
983 18:37:48.550807 DQM0 = 20, DQM1 = 18
984 18:37:48.550867 DQ Delay:
985 18:37:48.550926 DQ0 =23, DQ1 =23, DQ2 =22, DQ3 =14
986 18:37:48.550986 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
987 18:37:48.551046 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
988 18:37:48.551106 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
989 18:37:48.551167
990 18:37:48.551226
991 18:37:48.551285 DramC Write-DBI off
992 18:37:48.551344 ==
993 18:37:48.551415 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
994 18:37:48.551529 fsp= 1, odt_onoff= 1, Byte mode= 0
995 18:37:48.551597 ==
996 18:37:48.551659 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
997 18:37:48.551720
998 18:37:48.551780 Begin, DQ Scan Range 922~1178
999 18:37:48.551840
1000 18:37:48.551900
1001 18:37:48.552159 TX Vref Scan disable
1002 18:37:48.552231 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1003 18:37:48.552295 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1004 18:37:48.552358 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1005 18:37:48.552419 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1006 18:37:48.552481 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1007 18:37:48.552542 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1008 18:37:48.552603 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1009 18:37:48.552665 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1010 18:37:48.552728 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1011 18:37:48.552789 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1012 18:37:48.552850 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1013 18:37:48.552912 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1014 18:37:48.552972 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1015 18:37:48.553033 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1016 18:37:48.553094 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1017 18:37:48.553156 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1018 18:37:48.553219 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1019 18:37:48.553280 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1020 18:37:48.553342 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1021 18:37:48.553403 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1022 18:37:48.553475 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1023 18:37:48.553538 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1024 18:37:48.553600 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1025 18:37:48.553669 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1026 18:37:48.553733 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1027 18:37:48.553794 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1028 18:37:48.553855 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1029 18:37:48.553915 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1030 18:37:48.553975 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1031 18:37:48.554035 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1032 18:37:48.554096 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1033 18:37:48.554156 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1034 18:37:48.554216 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1035 18:37:48.554275 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1036 18:37:48.554335 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1037 18:37:48.554394 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1038 18:37:48.554454 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1039 18:37:48.554513 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1040 18:37:48.554573 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1041 18:37:48.554634 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1042 18:37:48.554694 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1043 18:37:48.554754 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1044 18:37:48.554814 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1045 18:37:48.554873 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1046 18:37:48.554933 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1047 18:37:48.554992 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1048 18:37:48.555052 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1049 18:37:48.555112 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1050 18:37:48.555172 970 |3 6 10|[0] xxxxxxxx ooxooxxx [MSB]
1051 18:37:48.555231 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1052 18:37:48.555290 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1053 18:37:48.555350 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1054 18:37:48.555409 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1055 18:37:48.555469 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1056 18:37:48.555528 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1057 18:37:48.555588 977 |3 6 17|[0] xxxoooox oooooooo [MSB]
1058 18:37:48.555647 978 |3 6 18|[0] xooooooo oooooooo [MSB]
1059 18:37:48.555707 990 |3 6 30|[0] oooooooo xooxoxoo [MSB]
1060 18:37:48.555767 991 |3 6 31|[0] oooooooo xxoxxxoo [MSB]
1061 18:37:48.555826 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1062 18:37:48.555886 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1063 18:37:48.555945 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1064 18:37:48.556004 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1065 18:37:48.556063 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1066 18:37:48.556123 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1067 18:37:48.556182 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1068 18:37:48.556241 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1069 18:37:48.556300 Byte0, DQ PI dly=986, DQM PI dly= 986
1070 18:37:48.556359 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1071 18:37:48.556419
1072 18:37:48.556476 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1073 18:37:48.556536
1074 18:37:48.556594 Byte1, DQ PI dly=981, DQM PI dly= 981
1075 18:37:48.556652 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1076 18:37:48.556711
1077 18:37:48.556770 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1078 18:37:48.556829
1079 18:37:48.556888 ==
1080 18:37:48.556946 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1081 18:37:48.557006 fsp= 1, odt_onoff= 1, Byte mode= 0
1082 18:37:48.557066 ==
1083 18:37:48.557124 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1084 18:37:48.557183
1085 18:37:48.557241 Begin, DQ Scan Range 957~1021
1086 18:37:48.557300 Write Rank0 MR14 =0x0
1087 18:37:48.557358
1088 18:37:48.557416 CH=0, VrefRange= 0, VrefLevel = 0
1089 18:37:48.557490 TX Bit0 (982~993) 12 987, Bit8 (970~984) 15 977,
1090 18:37:48.557552 TX Bit1 (979~994) 16 986, Bit9 (973~986) 14 979,
1091 18:37:48.557612 TX Bit2 (982~995) 14 988, Bit10 (977~990) 14 983,
1092 18:37:48.557672 TX Bit3 (976~990) 15 983, Bit11 (971~983) 13 977,
1093 18:37:48.557732 TX Bit4 (979~992) 14 985, Bit12 (975~984) 10 979,
1094 18:37:48.557792 TX Bit5 (977~991) 15 984, Bit13 (975~984) 10 979,
1095 18:37:48.557850 TX Bit6 (978~991) 14 984, Bit14 (975~989) 15 982,
1096 18:37:48.557910 TX Bit7 (980~992) 13 986, Bit15 (976~990) 15 983,
1097 18:37:48.557969
1098 18:37:48.558027 Write Rank0 MR14 =0x2
1099 18:37:48.558086
1100 18:37:48.558144 CH=0, VrefRange= 0, VrefLevel = 2
1101 18:37:48.558202 TX Bit0 (982~994) 13 988, Bit8 (970~985) 16 977,
1102 18:37:48.558262 TX Bit1 (979~994) 16 986, Bit9 (972~987) 16 979,
1103 18:37:48.558321 TX Bit2 (982~995) 14 988, Bit10 (977~991) 15 984,
1104 18:37:48.558381 TX Bit3 (976~990) 15 983, Bit11 (971~984) 14 977,
1105 18:37:48.558440 TX Bit4 (979~993) 15 986, Bit12 (974~985) 12 979,
1106 18:37:48.558499 TX Bit5 (977~992) 16 984, Bit13 (975~985) 11 980,
1107 18:37:48.558754 TX Bit6 (978~991) 14 984, Bit14 (975~989) 15 982,
1108 18:37:48.558822 TX Bit7 (979~993) 15 986, Bit15 (976~991) 16 983,
1109 18:37:48.558883
1110 18:37:48.558943 Write Rank0 MR14 =0x4
1111 18:37:48.559002
1112 18:37:48.559060 CH=0, VrefRange= 0, VrefLevel = 4
1113 18:37:48.559120 TX Bit0 (982~995) 14 988, Bit8 (969~986) 18 977,
1114 18:37:48.559180 TX Bit1 (979~995) 17 987, Bit9 (972~988) 17 980,
1115 18:37:48.559240 TX Bit2 (980~996) 17 988, Bit10 (976~992) 17 984,
1116 18:37:48.559299 TX Bit3 (975~991) 17 983, Bit11 (970~985) 16 977,
1117 18:37:48.559358 TX Bit4 (978~993) 16 985, Bit12 (973~986) 14 979,
1118 18:37:48.559417 TX Bit5 (977~992) 16 984, Bit13 (974~986) 13 980,
1119 18:37:48.559476 TX Bit6 (978~992) 15 985, Bit14 (974~989) 16 981,
1120 18:37:48.559534 TX Bit7 (979~993) 15 986, Bit15 (976~992) 17 984,
1121 18:37:48.559593
1122 18:37:48.559650 Write Rank0 MR14 =0x6
1123 18:37:48.559709
1124 18:37:48.559767 CH=0, VrefRange= 0, VrefLevel = 6
1125 18:37:48.559826 TX Bit0 (981~996) 16 988, Bit8 (969~987) 19 978,
1126 18:37:48.559885 TX Bit1 (978~996) 19 987, Bit9 (971~989) 19 980,
1127 18:37:48.559944 TX Bit2 (980~997) 18 988, Bit10 (976~993) 18 984,
1128 18:37:48.560003 TX Bit3 (975~991) 17 983, Bit11 (970~986) 17 978,
1129 18:37:48.560063 TX Bit4 (978~994) 17 986, Bit12 (974~987) 14 980,
1130 18:37:48.560121 TX Bit5 (977~993) 17 985, Bit13 (974~987) 14 980,
1131 18:37:48.560180 TX Bit6 (977~992) 16 984, Bit14 (973~990) 18 981,
1132 18:37:48.560240 TX Bit7 (978~994) 17 986, Bit15 (976~993) 18 984,
1133 18:37:48.560299
1134 18:37:48.560357 Write Rank0 MR14 =0x8
1135 18:37:48.560416
1136 18:37:48.560474 CH=0, VrefRange= 0, VrefLevel = 8
1137 18:37:48.560533 TX Bit0 (981~997) 17 989, Bit8 (969~988) 20 978,
1138 18:37:48.560592 TX Bit1 (978~997) 20 987, Bit9 (971~989) 19 980,
1139 18:37:48.560651 TX Bit2 (980~998) 19 989, Bit10 (976~994) 19 985,
1140 18:37:48.560711 TX Bit3 (975~992) 18 983, Bit11 (970~987) 18 978,
1141 18:37:48.560769 TX Bit4 (978~995) 18 986, Bit12 (973~988) 16 980,
1142 18:37:48.560828 TX Bit5 (977~993) 17 985, Bit13 (973~988) 16 980,
1143 18:37:48.560887 TX Bit6 (977~993) 17 985, Bit14 (973~990) 18 981,
1144 18:37:48.560946 TX Bit7 (978~995) 18 986, Bit15 (976~994) 19 985,
1145 18:37:48.561005
1146 18:37:48.561064 Write Rank0 MR14 =0xa
1147 18:37:48.561122
1148 18:37:48.561180 CH=0, VrefRange= 0, VrefLevel = 10
1149 18:37:48.561240 TX Bit0 (980~998) 19 989, Bit8 (969~988) 20 978,
1150 18:37:48.561299 TX Bit1 (978~998) 21 988, Bit9 (970~989) 20 979,
1151 18:37:48.561358 TX Bit2 (979~998) 20 988, Bit10 (976~994) 19 985,
1152 18:37:48.561417 TX Bit3 (975~992) 18 983, Bit11 (969~988) 20 978,
1153 18:37:48.561496 TX Bit4 (978~996) 19 987, Bit12 (972~988) 17 980,
1154 18:37:48.561557 TX Bit5 (976~993) 18 984, Bit13 (973~989) 17 981,
1155 18:37:48.561617 TX Bit6 (977~993) 17 985, Bit14 (973~991) 19 982,
1156 18:37:48.561677 TX Bit7 (978~995) 18 986, Bit15 (975~994) 20 984,
1157 18:37:48.561736
1158 18:37:48.561794 Write Rank0 MR14 =0xc
1159 18:37:48.561852
1160 18:37:48.561910 CH=0, VrefRange= 0, VrefLevel = 12
1161 18:37:48.561969 TX Bit0 (980~998) 19 989, Bit8 (969~989) 21 979,
1162 18:37:48.562028 TX Bit1 (978~998) 21 988, Bit9 (970~989) 20 979,
1163 18:37:48.562087 TX Bit2 (979~998) 20 988, Bit10 (975~996) 22 985,
1164 18:37:48.562147 TX Bit3 (974~992) 19 983, Bit11 (969~989) 21 979,
1165 18:37:48.562206 TX Bit4 (978~997) 20 987, Bit12 (972~989) 18 980,
1166 18:37:48.562265 TX Bit5 (976~994) 19 985, Bit13 (972~989) 18 980,
1167 18:37:48.562324 TX Bit6 (977~994) 18 985, Bit14 (972~991) 20 981,
1168 18:37:48.562382 TX Bit7 (978~996) 19 987, Bit15 (975~996) 22 985,
1169 18:37:48.562441
1170 18:37:48.562499 Write Rank0 MR14 =0xe
1171 18:37:48.562557
1172 18:37:48.562615 CH=0, VrefRange= 0, VrefLevel = 14
1173 18:37:48.562673 TX Bit0 (979~999) 21 989, Bit8 (968~989) 22 978,
1174 18:37:48.562733 TX Bit1 (978~999) 22 988, Bit9 (970~990) 21 980,
1175 18:37:48.562792 TX Bit2 (979~999) 21 989, Bit10 (976~996) 21 986,
1176 18:37:48.562851 TX Bit3 (974~993) 20 983, Bit11 (969~988) 20 978,
1177 18:37:48.562910 TX Bit4 (977~998) 22 987, Bit12 (971~989) 19 980,
1178 18:37:48.562970 TX Bit5 (976~994) 19 985, Bit13 (971~989) 19 980,
1179 18:37:48.563029 TX Bit6 (976~994) 19 985, Bit14 (972~992) 21 982,
1180 18:37:48.563088 TX Bit7 (978~997) 20 987, Bit15 (975~996) 22 985,
1181 18:37:48.563147
1182 18:37:48.563205 Write Rank0 MR14 =0x10
1183 18:37:48.563263
1184 18:37:48.563321 CH=0, VrefRange= 0, VrefLevel = 16
1185 18:37:48.563380 TX Bit0 (979~999) 21 989, Bit8 (968~990) 23 979,
1186 18:37:48.563439 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1187 18:37:48.563498 TX Bit2 (978~999) 22 988, Bit10 (975~997) 23 986,
1188 18:37:48.563558 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1189 18:37:48.563617 TX Bit4 (977~998) 22 987, Bit12 (971~990) 20 980,
1190 18:37:48.563676 TX Bit5 (976~995) 20 985, Bit13 (971~990) 20 980,
1191 18:37:48.563735 TX Bit6 (976~996) 21 986, Bit14 (971~992) 22 981,
1192 18:37:48.563794 TX Bit7 (978~998) 21 988, Bit15 (975~997) 23 986,
1193 18:37:48.563853
1194 18:37:48.563911 Write Rank0 MR14 =0x12
1195 18:37:48.563970
1196 18:37:48.564028 CH=0, VrefRange= 0, VrefLevel = 18
1197 18:37:48.564087 TX Bit0 (978~999) 22 988, Bit8 (968~990) 23 979,
1198 18:37:48.564146 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
1199 18:37:48.564206 TX Bit2 (978~999) 22 988, Bit10 (975~997) 23 986,
1200 18:37:48.564265 TX Bit3 (973~994) 22 983, Bit11 (969~989) 21 979,
1201 18:37:48.564324 TX Bit4 (977~999) 23 988, Bit12 (970~990) 21 980,
1202 18:37:48.564384 TX Bit5 (975~996) 22 985, Bit13 (971~990) 20 980,
1203 18:37:48.564443 TX Bit6 (976~996) 21 986, Bit14 (971~993) 23 982,
1204 18:37:48.564502 TX Bit7 (978~999) 22 988, Bit15 (974~996) 23 985,
1205 18:37:48.564561
1206 18:37:48.564619 Write Rank0 MR14 =0x14
1207 18:37:48.564677
1208 18:37:48.564735 CH=0, VrefRange= 0, VrefLevel = 20
1209 18:37:48.564990 TX Bit0 (978~999) 22 988, Bit8 (968~991) 24 979,
1210 18:37:48.565057 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
1211 18:37:48.565118 TX Bit2 (978~999) 22 988, Bit10 (975~997) 23 986,
1212 18:37:48.565179 TX Bit3 (973~994) 22 983, Bit11 (969~990) 22 979,
1213 18:37:48.565238 TX Bit4 (977~999) 23 988, Bit12 (970~991) 22 980,
1214 18:37:48.565298 TX Bit5 (975~996) 22 985, Bit13 (970~990) 21 980,
1215 18:37:48.565357 TX Bit6 (976~996) 21 986, Bit14 (972~994) 23 983,
1216 18:37:48.565416 TX Bit7 (977~999) 23 988, Bit15 (975~997) 23 986,
1217 18:37:48.565491
1218 18:37:48.565551 Write Rank0 MR14 =0x16
1219 18:37:48.565610
1220 18:37:48.565668 CH=0, VrefRange= 0, VrefLevel = 22
1221 18:37:48.565728 TX Bit0 (978~1000) 23 989, Bit8 (967~991) 25 979,
1222 18:37:48.565787 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
1223 18:37:48.565846 TX Bit2 (978~1000) 23 989, Bit10 (974~998) 25 986,
1224 18:37:48.565906 TX Bit3 (972~994) 23 983, Bit11 (969~990) 22 979,
1225 18:37:48.565966 TX Bit4 (977~999) 23 988, Bit12 (970~991) 22 980,
1226 18:37:48.566025 TX Bit5 (975~997) 23 986, Bit13 (970~991) 22 980,
1227 18:37:48.566085 TX Bit6 (976~997) 22 986, Bit14 (970~994) 25 982,
1228 18:37:48.566143 TX Bit7 (977~999) 23 988, Bit15 (973~997) 25 985,
1229 18:37:48.566202
1230 18:37:48.566260 Write Rank0 MR14 =0x18
1231 18:37:48.566319
1232 18:37:48.566377 CH=0, VrefRange= 0, VrefLevel = 24
1233 18:37:48.566437 TX Bit0 (978~1000) 23 989, Bit8 (967~991) 25 979,
1234 18:37:48.566496 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1235 18:37:48.566555 TX Bit2 (978~1000) 23 989, Bit10 (974~998) 25 986,
1236 18:37:48.566615 TX Bit3 (972~995) 24 983, Bit11 (968~990) 23 979,
1237 18:37:48.566674 TX Bit4 (977~999) 23 988, Bit12 (970~991) 22 980,
1238 18:37:48.566733 TX Bit5 (975~998) 24 986, Bit13 (970~991) 22 980,
1239 18:37:48.566792 TX Bit6 (975~999) 25 987, Bit14 (969~995) 27 982,
1240 18:37:48.566851 TX Bit7 (977~1000) 24 988, Bit15 (973~997) 25 985,
1241 18:37:48.566910
1242 18:37:48.566968 Write Rank0 MR14 =0x1a
1243 18:37:48.567026
1244 18:37:48.567084 CH=0, VrefRange= 0, VrefLevel = 26
1245 18:37:48.567143 TX Bit0 (978~1001) 24 989, Bit8 (967~991) 25 979,
1246 18:37:48.567202 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
1247 18:37:48.567261 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
1248 18:37:48.567319 TX Bit3 (971~995) 25 983, Bit11 (968~991) 24 979,
1249 18:37:48.567378 TX Bit4 (976~999) 24 987, Bit12 (969~992) 24 980,
1250 18:37:48.567437 TX Bit5 (974~998) 25 986, Bit13 (969~992) 24 980,
1251 18:37:48.567495 TX Bit6 (975~999) 25 987, Bit14 (970~996) 27 983,
1252 18:37:48.567555 TX Bit7 (977~1000) 24 988, Bit15 (973~998) 26 985,
1253 18:37:48.567614
1254 18:37:48.567673 Write Rank0 MR14 =0x1c
1255 18:37:48.567731
1256 18:37:48.567789 CH=0, VrefRange= 0, VrefLevel = 28
1257 18:37:48.567848 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1258 18:37:48.567907 TX Bit1 (977~1000) 24 988, Bit9 (968~993) 26 980,
1259 18:37:48.567965 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
1260 18:37:48.568024 TX Bit3 (971~996) 26 983, Bit11 (968~991) 24 979,
1261 18:37:48.568083 TX Bit4 (976~1000) 25 988, Bit12 (969~993) 25 981,
1262 18:37:48.568142 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
1263 18:37:48.568201 TX Bit6 (975~999) 25 987, Bit14 (969~996) 28 982,
1264 18:37:48.568260 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1265 18:37:48.568319
1266 18:37:48.568377 Write Rank0 MR14 =0x1e
1267 18:37:48.568435
1268 18:37:48.568492 CH=0, VrefRange= 0, VrefLevel = 30
1269 18:37:48.568551 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1270 18:37:48.568610 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
1271 18:37:48.568669 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
1272 18:37:48.568728 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
1273 18:37:48.568786 TX Bit4 (976~1000) 25 988, Bit12 (969~993) 25 981,
1274 18:37:48.568846 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
1275 18:37:48.568905 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1276 18:37:48.568964 TX Bit7 (976~1001) 26 988, Bit15 (972~998) 27 985,
1277 18:37:48.569022
1278 18:37:48.569080 wait MRW command Rank0 MR14 =0x20 fired (1)
1279 18:37:48.569139 Write Rank0 MR14 =0x20
1280 18:37:48.569198
1281 18:37:48.569255 CH=0, VrefRange= 0, VrefLevel = 32
1282 18:37:48.569314 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1283 18:37:48.569373 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
1284 18:37:48.569438 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
1285 18:37:48.569500 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
1286 18:37:48.569559 TX Bit4 (976~1000) 25 988, Bit12 (969~993) 25 981,
1287 18:37:48.569618 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
1288 18:37:48.569677 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1289 18:37:48.569736 TX Bit7 (976~1001) 26 988, Bit15 (972~998) 27 985,
1290 18:37:48.569795
1291 18:37:48.569853 Write Rank0 MR14 =0x22
1292 18:37:48.569911
1293 18:37:48.569969 CH=0, VrefRange= 0, VrefLevel = 34
1294 18:37:48.570028 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1295 18:37:48.570087 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
1296 18:37:48.570145 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
1297 18:37:48.570204 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
1298 18:37:48.570262 TX Bit4 (976~1000) 25 988, Bit12 (969~993) 25 981,
1299 18:37:48.570320 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
1300 18:37:48.570378 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1301 18:37:48.570436 TX Bit7 (976~1001) 26 988, Bit15 (972~998) 27 985,
1302 18:37:48.570494
1303 18:37:48.570552 Write Rank0 MR14 =0x24
1304 18:37:48.570609
1305 18:37:48.570667 CH=0, VrefRange= 0, VrefLevel = 36
1306 18:37:48.570725 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1307 18:37:48.570784 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
1308 18:37:48.570843 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
1309 18:37:48.571098 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
1310 18:37:48.571168 TX Bit4 (976~1000) 25 988, Bit12 (969~993) 25 981,
1311 18:37:48.571227 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
1312 18:37:48.571286 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
1313 18:37:48.571344 TX Bit7 (976~1001) 26 988, Bit15 (972~998) 27 985,
1314 18:37:48.571403
1315 18:37:48.571460
1316 18:37:48.571518 TX Vref found, early break! 382< 383
1317 18:37:48.571577 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1318 18:37:48.571635 u1DelayCellOfst[0]=7 cells (6 PI)
1319 18:37:48.571694 u1DelayCellOfst[1]=6 cells (5 PI)
1320 18:37:48.571752 u1DelayCellOfst[2]=7 cells (6 PI)
1321 18:37:48.571810 u1DelayCellOfst[3]=0 cells (0 PI)
1322 18:37:48.571867 u1DelayCellOfst[4]=6 cells (5 PI)
1323 18:37:48.571926 u1DelayCellOfst[5]=3 cells (3 PI)
1324 18:37:48.571985 u1DelayCellOfst[6]=5 cells (4 PI)
1325 18:37:48.572043 u1DelayCellOfst[7]=6 cells (5 PI)
1326 18:37:48.572101 Byte0, DQ PI dly=983, DQM PI dly= 986
1327 18:37:48.572159 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1328 18:37:48.572218
1329 18:37:48.572276 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1330 18:37:48.572334
1331 18:37:48.572393 u1DelayCellOfst[8]=0 cells (0 PI)
1332 18:37:48.572451 u1DelayCellOfst[9]=2 cells (2 PI)
1333 18:37:48.572509 u1DelayCellOfst[10]=9 cells (7 PI)
1334 18:37:48.572567 u1DelayCellOfst[11]=2 cells (2 PI)
1335 18:37:48.572624 u1DelayCellOfst[12]=3 cells (3 PI)
1336 18:37:48.572682 u1DelayCellOfst[13]=3 cells (3 PI)
1337 18:37:48.572739 u1DelayCellOfst[14]=5 cells (4 PI)
1338 18:37:48.572797 u1DelayCellOfst[15]=9 cells (7 PI)
1339 18:37:48.572855 Byte1, DQ PI dly=978, DQM PI dly= 981
1340 18:37:48.572914 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1341 18:37:48.572973
1342 18:37:48.573030 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1343 18:37:48.573089
1344 18:37:48.573146 Write Rank0 MR14 =0x1e
1345 18:37:48.573204
1346 18:37:48.573262 Final TX Range 0 Vref 30
1347 18:37:48.573320
1348 18:37:48.573378 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1349 18:37:48.573447
1350 18:37:48.573509 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1351 18:37:48.573568 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1352 18:37:48.573627 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1353 18:37:48.573686 Write Rank0 MR3 =0xb0
1354 18:37:48.573744 DramC Write-DBI on
1355 18:37:48.573802 ==
1356 18:37:48.573861 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1357 18:37:48.573919 fsp= 1, odt_onoff= 1, Byte mode= 0
1358 18:37:48.573977 ==
1359 18:37:48.574035 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1360 18:37:48.574093
1361 18:37:48.574150 Begin, DQ Scan Range 701~765
1362 18:37:48.574208
1363 18:37:48.574266
1364 18:37:48.574323 TX Vref Scan disable
1365 18:37:48.574382 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1366 18:37:48.574441 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1367 18:37:48.574499 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1368 18:37:48.574558 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1369 18:37:48.574617 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1370 18:37:48.574676 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1371 18:37:48.574736 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1372 18:37:48.574795 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1373 18:37:48.574854 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1374 18:37:48.574913 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1375 18:37:48.574972 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1376 18:37:48.575031 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1377 18:37:48.575090 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1378 18:37:48.575149 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1379 18:37:48.575208 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1380 18:37:48.575267 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1381 18:37:48.575326 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1382 18:37:48.575385 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1383 18:37:48.575444 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1384 18:37:48.575503 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1385 18:37:48.575562 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1386 18:37:48.575620 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1387 18:37:48.575679 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1388 18:37:48.575738 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1389 18:37:48.575797 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1390 18:37:48.575856 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1391 18:37:48.575914 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1392 18:37:48.575973 Byte0, DQ PI dly=732, DQM PI dly= 732
1393 18:37:48.576031 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1394 18:37:48.576090
1395 18:37:48.576147 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1396 18:37:48.576206
1397 18:37:48.576263 Byte1, DQ PI dly=725, DQM PI dly= 725
1398 18:37:48.576321 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1399 18:37:48.576379
1400 18:37:48.576436 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1401 18:37:48.576494
1402 18:37:48.576552 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1403 18:37:48.576611 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1404 18:37:48.576669 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1405 18:37:48.576728 Write Rank0 MR3 =0x30
1406 18:37:48.576807 DramC Write-DBI off
1407 18:37:48.576867
1408 18:37:48.576926 [DATLAT]
1409 18:37:48.576984 Freq=1600, CH0 RK0, use_rxtx_scan=0
1410 18:37:48.577043
1411 18:37:48.577101 DATLAT Default: 0xf
1412 18:37:48.577159 7, 0xFFFF, sum=0
1413 18:37:48.577218 8, 0xFFFF, sum=0
1414 18:37:48.577278 9, 0xFFFF, sum=0
1415 18:37:48.577336 10, 0xFFFF, sum=0
1416 18:37:48.577395 11, 0xFFFF, sum=0
1417 18:37:48.577482 12, 0xFFFF, sum=0
1418 18:37:48.577544 13, 0xFFFF, sum=0
1419 18:37:48.577603 14, 0x0, sum=1
1420 18:37:48.577662 15, 0x0, sum=2
1421 18:37:48.577721 16, 0x0, sum=3
1422 18:37:48.577780 17, 0x0, sum=4
1423 18:37:48.577839 pattern=2 first_step=14 total pass=5 best_step=16
1424 18:37:48.577897 ==
1425 18:37:48.577955 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1426 18:37:48.578014 fsp= 1, odt_onoff= 1, Byte mode= 0
1427 18:37:48.578073 ==
1428 18:37:48.578130 Start DQ dly to find pass range UseTestEngine =1
1429 18:37:48.578189 x-axis: bit #, y-axis: DQ dly (-127~63)
1430 18:37:48.578247 RX Vref Scan = 1
1431 18:37:48.578305
1432 18:37:48.578363 RX Vref found, early break!
1433 18:37:48.578421
1434 18:37:48.578676 Final RX Vref 11, apply to both rank0 and 1
1435 18:37:48.578749 ==
1436 18:37:48.578812 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1437 18:37:48.578872 fsp= 1, odt_onoff= 1, Byte mode= 0
1438 18:37:48.578931 ==
1439 18:37:48.578990 DQS Delay:
1440 18:37:48.579047 DQS0 = 0, DQS1 = 0
1441 18:37:48.579105 DQM Delay:
1442 18:37:48.579163 DQM0 = 19, DQM1 = 17
1443 18:37:48.579221 DQ Delay:
1444 18:37:48.579279 DQ0 =22, DQ1 =22, DQ2 =24, DQ3 =14
1445 18:37:48.579338 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1446 18:37:48.579396 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1447 18:37:48.579455 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1448 18:37:48.579514
1449 18:37:48.579571
1450 18:37:48.579629
1451 18:37:48.579686 [DramC_TX_OE_Calibration] TA2
1452 18:37:48.579746 Original DQ_B0 (3 6) =30, OEN = 27
1453 18:37:48.579805 Original DQ_B1 (3 6) =30, OEN = 27
1454 18:37:48.579864 23, 0x0, End_B0=23 End_B1=23
1455 18:37:48.579923 24, 0x0, End_B0=24 End_B1=24
1456 18:37:48.579983 25, 0x0, End_B0=25 End_B1=25
1457 18:37:48.580041 26, 0x0, End_B0=26 End_B1=26
1458 18:37:48.580100 27, 0x0, End_B0=27 End_B1=27
1459 18:37:48.580159 28, 0x0, End_B0=28 End_B1=28
1460 18:37:48.580218 29, 0x0, End_B0=29 End_B1=29
1461 18:37:48.580276 30, 0x0, End_B0=30 End_B1=30
1462 18:37:48.580335 31, 0xFFFF, End_B0=30 End_B1=30
1463 18:37:48.580395 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1464 18:37:48.580453 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1465 18:37:48.580511
1466 18:37:48.580568
1467 18:37:48.580626 Write Rank0 MR23 =0x3f
1468 18:37:48.580684 [DQSOSC]
1469 18:37:48.580747 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
1470 18:37:48.580807 CH0_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
1471 18:37:48.580866 Write Rank0 MR23 =0x3f
1472 18:37:48.580924 [DQSOSC]
1473 18:37:48.580982 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1474 18:37:48.581041 CH0 RK0: MR19=202, MR18=C0C0
1475 18:37:48.581099 [RankSwap] Rank num 2, (Multi 1), Rank 1
1476 18:37:48.581158 Write Rank0 MR2 =0xad
1477 18:37:48.581216 [Write Leveling]
1478 18:37:48.581273 delay byte0 byte1 byte2 byte3
1479 18:37:48.581331
1480 18:37:48.581389 10 0 0
1481 18:37:48.581462 11 0 0
1482 18:37:48.581525 12 0 0
1483 18:37:48.581584 13 0 0
1484 18:37:48.581643 14 0 0
1485 18:37:48.581702 15 0 0
1486 18:37:48.581761 16 0 0
1487 18:37:48.581820 17 0 0
1488 18:37:48.581879 18 0 0
1489 18:37:48.581937 19 0 0
1490 18:37:48.581996 20 0 0
1491 18:37:48.582055 21 0 0
1492 18:37:48.582114 22 0 0
1493 18:37:48.582173 23 0 0
1494 18:37:48.582233 24 0 0
1495 18:37:48.582291 25 0 0
1496 18:37:48.582351 26 0 ff
1497 18:37:48.582410 27 0 ff
1498 18:37:48.582468 28 0 ff
1499 18:37:48.582527 29 0 ff
1500 18:37:48.582585 30 ff ff
1501 18:37:48.582644 31 ff ff
1502 18:37:48.582702 32 ff ff
1503 18:37:48.582780 33 ff ff
1504 18:37:48.582844 34 ff ff
1505 18:37:48.582903 35 ff ff
1506 18:37:48.582962 36 ff ff
1507 18:37:48.583022 pass bytecount = 0xff (0xff: all bytes pass)
1508 18:37:48.583080
1509 18:37:48.583138 DQS0 dly: 30
1510 18:37:48.583195 DQS1 dly: 26
1511 18:37:48.583253 Write Rank0 MR2 =0x2d
1512 18:37:48.583311 [RankSwap] Rank num 2, (Multi 1), Rank 0
1513 18:37:48.583369 Write Rank1 MR1 =0xd6
1514 18:37:48.583427 [Gating]
1515 18:37:48.583484 ==
1516 18:37:48.583542 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1517 18:37:48.583600 fsp= 1, odt_onoff= 1, Byte mode= 0
1518 18:37:48.583658 ==
1519 18:37:48.583716 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1520 18:37:48.583776 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1521 18:37:48.583836 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1522 18:37:48.583895 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1523 18:37:48.583955 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1524 18:37:48.584015 [Byte 1] Lead/lag falling Transition (3, 1, 16)
1525 18:37:48.584074 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1526 18:37:48.584133 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1527 18:37:48.584192 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1528 18:37:48.584252 [Byte 0] Lead/lag falling Transition (3, 1, 28)
1529 18:37:48.584310 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1530 18:37:48.584369 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1531 18:37:48.584433 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1532 18:37:48.584506 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1533 18:37:48.584568 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1534 18:37:48.584628 [Byte 0] Lead/lag Transition tap number (6)
1535 18:37:48.584687 [Byte 1] Lead/lag Transition tap number (9)
1536 18:37:48.584746 3 2 20 |2c2c 2c2b |(11 0)(11 11) |(0 0)(0 0)| 0
1537 18:37:48.584811 3 2 24 |303 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1538 18:37:48.584869 3 2 28 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1539 18:37:48.584929 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1540 18:37:48.584988 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1541 18:37:48.585047 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1542 18:37:48.585106 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1543 18:37:48.585166 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1544 18:37:48.585225 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1545 18:37:48.585284 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1546 18:37:48.585343 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1547 18:37:48.585401 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1548 18:37:48.585468 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1549 18:37:48.585528 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 18:37:48.585587 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1551 18:37:48.585647 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1552 18:37:48.585706 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1553 18:37:48.585765 3 4 24 |c0c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1554 18:37:48.585824 3 4 28 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
1555 18:37:48.585883 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 18:37:48.585942 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 18:37:48.586018 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 18:37:48.586078 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 18:37:48.586336 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 18:37:48.586404 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 18:37:48.586464 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 18:37:48.586524 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 18:37:48.586584 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 18:37:48.586643 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 18:37:48.586702 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 18:37:48.586767 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 18:37:48.586830 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1568 18:37:48.586889 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1569 18:37:48.586947 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1570 18:37:48.587007 [Byte 0] Lead/lag Transition tap number (2)
1571 18:37:48.587066 3 6 20 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1572 18:37:48.587125 3 6 24 |404 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
1573 18:37:48.587185 [Byte 1] Lead/lag Transition tap number (4)
1574 18:37:48.587244 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1575 18:37:48.587302 [Byte 0]First pass (3, 6, 28)
1576 18:37:48.587361 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 18:37:48.587420 [Byte 1]First pass (3, 7, 0)
1578 18:37:48.587477 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 18:37:48.587537 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 18:37:48.587596 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 18:37:48.587656 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 18:37:48.587715 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 18:37:48.587774 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 18:37:48.587833 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 18:37:48.587893 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 18:37:48.587951 All bytes gating window > 1UI, Early break!
1587 18:37:48.588010
1588 18:37:48.588068 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1589 18:37:48.588126
1590 18:37:48.588183 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
1591 18:37:48.588242
1592 18:37:48.588299
1593 18:37:48.588357
1594 18:37:48.588414 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1595 18:37:48.588473
1596 18:37:48.588530 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
1597 18:37:48.588588
1598 18:37:48.588645
1599 18:37:48.588702 Write Rank1 MR1 =0x56
1600 18:37:48.588771
1601 18:37:48.588831 best RODT dly(2T, 0.5T) = (2, 3)
1602 18:37:48.588895
1603 18:37:48.588955 best RODT dly(2T, 0.5T) = (2, 3)
1604 18:37:48.589013 ==
1605 18:37:48.589071 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1606 18:37:48.589131 fsp= 1, odt_onoff= 1, Byte mode= 0
1607 18:37:48.589189 ==
1608 18:37:48.589247 Start DQ dly to find pass range UseTestEngine =0
1609 18:37:48.589305 x-axis: bit #, y-axis: DQ dly (-127~63)
1610 18:37:48.589364 RX Vref Scan = 0
1611 18:37:48.589422 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1612 18:37:48.589492 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1613 18:37:48.589553 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1614 18:37:48.589612 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1615 18:37:48.589671 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1616 18:37:48.589730 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1617 18:37:48.589789 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1618 18:37:48.589847 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1619 18:37:48.589906 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1620 18:37:48.589965 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1621 18:37:48.590024 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1622 18:37:48.590083 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1623 18:37:48.590142 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1624 18:37:48.590201 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1625 18:37:48.590261 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1626 18:37:48.590320 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1627 18:37:48.590378 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1628 18:37:48.590436 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1629 18:37:48.590495 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1630 18:37:48.590554 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1631 18:37:48.590615 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1632 18:37:48.590685 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1633 18:37:48.590746 -4, [0] xxxoxxxx oxxxxxxx [MSB]
1634 18:37:48.590811 -3, [0] xxxoxxxx oxxoxxxx [MSB]
1635 18:37:48.590871 -2, [0] xxxoxxxx ooxoooxx [MSB]
1636 18:37:48.590930 -1, [0] xxxoxoxx ooxoooxx [MSB]
1637 18:37:48.590989 0, [0] xxxoxoox ooxoooox [MSB]
1638 18:37:48.591049 1, [0] xxxoxoox ooxoooox [MSB]
1639 18:37:48.591108 2, [0] xxxoxoox ooxoooox [MSB]
1640 18:37:48.591167 3, [0] xxxooooo ooxooooo [MSB]
1641 18:37:48.591226 4, [0] ooxooooo ooxooooo [MSB]
1642 18:37:48.591285 5, [0] oooooooo ooxooooo [MSB]
1643 18:37:48.591344 32, [0] oooxoooo oooooooo [MSB]
1644 18:37:48.591403 33, [0] oooxoooo oooooooo [MSB]
1645 18:37:48.591463 34, [0] oooxoooo xooxoooo [MSB]
1646 18:37:48.591522 35, [0] oooxoooo xxoxoooo [MSB]
1647 18:37:48.591582 36, [0] oooxoxxo xxoxxoxo [MSB]
1648 18:37:48.591640 37, [0] oooxoxxx xxoxxxxo [MSB]
1649 18:37:48.591699 38, [0] oooxoxxx xxoxxxxo [MSB]
1650 18:37:48.591758 39, [0] ooxxxxxx xxoxxxxx [MSB]
1651 18:37:48.591817 40, [0] xoxxxxxx xxoxxxxx [MSB]
1652 18:37:48.591876 41, [0] xxxxxxxx xxoxxxxx [MSB]
1653 18:37:48.591935 42, [0] xxxxxxxx xxoxxxxx [MSB]
1654 18:37:48.591994 43, [0] xxxxxxxx xxxxxxxx [MSB]
1655 18:37:48.592053 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1656 18:37:48.592111 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1657 18:37:48.592172 iDelay=43, Bit 2, Center 21 (5 ~ 38) 34
1658 18:37:48.592230 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1659 18:37:48.592288 iDelay=43, Bit 4, Center 20 (3 ~ 38) 36
1660 18:37:48.592346 iDelay=43, Bit 5, Center 17 (-1 ~ 35) 37
1661 18:37:48.592404 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1662 18:37:48.592462 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1663 18:37:48.592520 iDelay=43, Bit 8, Center 14 (-4 ~ 33) 38
1664 18:37:48.592578 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
1665 18:37:48.592636 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1666 18:37:48.592694 iDelay=43, Bit 11, Center 15 (-3 ~ 33) 37
1667 18:37:48.592753 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1668 18:37:48.592817 iDelay=43, Bit 13, Center 17 (-2 ~ 36) 39
1669 18:37:48.592875 iDelay=43, Bit 14, Center 17 (0 ~ 35) 36
1670 18:37:48.592933 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1671 18:37:48.592991 ==
1672 18:37:48.593049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1673 18:37:48.593108 fsp= 1, odt_onoff= 1, Byte mode= 0
1674 18:37:48.593167 ==
1675 18:37:48.593224 DQS Delay:
1676 18:37:48.593282 DQS0 = 0, DQS1 = 0
1677 18:37:48.593340 DQM Delay:
1678 18:37:48.593397 DQM0 = 18, DQM1 = 17
1679 18:37:48.593470 DQ Delay:
1680 18:37:48.593727 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =13
1681 18:37:48.593794 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =19
1682 18:37:48.593854 DQ8 =14, DQ9 =16, DQ10 =24, DQ11 =15
1683 18:37:48.593913 DQ12 =16, DQ13 =17, DQ14 =17, DQ15 =20
1684 18:37:48.593973
1685 18:37:48.594032
1686 18:37:48.594089 DramC Write-DBI off
1687 18:37:48.594147 ==
1688 18:37:48.594205 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1689 18:37:48.594265 fsp= 1, odt_onoff= 1, Byte mode= 0
1690 18:37:48.594323 ==
1691 18:37:48.594381 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1692 18:37:48.594439
1693 18:37:48.594497 Begin, DQ Scan Range 922~1178
1694 18:37:48.594555
1695 18:37:48.594613
1696 18:37:48.594673 TX Vref Scan disable
1697 18:37:48.594732 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1698 18:37:48.594791 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1699 18:37:48.594851 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1700 18:37:48.594909 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1701 18:37:48.594968 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1702 18:37:48.595027 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1703 18:37:48.595086 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1704 18:37:48.595145 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1705 18:37:48.595205 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1706 18:37:48.595263 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1707 18:37:48.595322 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1708 18:37:48.595381 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1709 18:37:48.595440 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1710 18:37:48.595498 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1711 18:37:48.595556 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1712 18:37:48.595615 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1713 18:37:48.595674 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1714 18:37:48.595733 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1715 18:37:48.595792 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1716 18:37:48.595851 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1717 18:37:48.595911 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1718 18:37:48.595969 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1719 18:37:48.596028 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1720 18:37:48.596086 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1721 18:37:48.596144 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1722 18:37:48.596203 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1723 18:37:48.596263 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1724 18:37:48.596323 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1725 18:37:48.596381 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1726 18:37:48.596440 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1727 18:37:48.596498 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1728 18:37:48.596557 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1729 18:37:48.596615 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1730 18:37:48.596675 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1731 18:37:48.596733 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1732 18:37:48.596829 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1733 18:37:48.596917 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1734 18:37:48.596979 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1735 18:37:48.597038 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1736 18:37:48.597099 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1737 18:37:48.597158 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1738 18:37:48.597217 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1739 18:37:48.597276 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1740 18:37:48.597335 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1741 18:37:48.597394 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1742 18:37:48.597459 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1743 18:37:48.597519 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1744 18:37:48.597578 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1745 18:37:48.597637 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1746 18:37:48.597696 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
1747 18:37:48.597755 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1748 18:37:48.597814 973 |3 6 13|[0] xxxxxxxx oxxoxxxx [MSB]
1749 18:37:48.597873 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1750 18:37:48.597932 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1751 18:37:48.597990 976 |3 6 16|[0] xxxxxxxx ooxooooo [MSB]
1752 18:37:48.598049 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1753 18:37:48.598109 978 |3 6 18|[0] xoxoxoox oooooooo [MSB]
1754 18:37:48.598167 979 |3 6 19|[0] ooxooooo oooooooo [MSB]
1755 18:37:48.598226 991 |3 6 31|[0] oooooooo oooxoooo [MSB]
1756 18:37:48.598285 992 |3 6 32|[0] oooooooo xxoxxooo [MSB]
1757 18:37:48.598343 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1758 18:37:48.598402 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1759 18:37:48.598461 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1760 18:37:48.598521 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1761 18:37:48.598580 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1762 18:37:48.598638 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1763 18:37:48.598697 999 |3 6 39|[0] oooxoxxo xxxxxxxx [MSB]
1764 18:37:48.598756 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1765 18:37:48.598815 Byte0, DQ PI dly=987, DQM PI dly= 987
1766 18:37:48.598873 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1767 18:37:48.598931
1768 18:37:48.598988 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1769 18:37:48.599046
1770 18:37:48.599104 Byte1, DQ PI dly=982, DQM PI dly= 982
1771 18:37:48.599161 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1772 18:37:48.599219
1773 18:37:48.599276 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1774 18:37:48.599334
1775 18:37:48.599391 ==
1776 18:37:48.599449 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1777 18:37:48.599507 fsp= 1, odt_onoff= 1, Byte mode= 0
1778 18:37:48.599565 ==
1779 18:37:48.599623 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1780 18:37:48.599680
1781 18:37:48.599738 Begin, DQ Scan Range 958~1022
1782 18:37:48.599796 Write Rank1 MR14 =0x0
1783 18:37:48.599854
1784 18:37:48.599911 CH=0, VrefRange= 0, VrefLevel = 0
1785 18:37:48.599967 TX Bit0 (983~994) 12 988, Bit8 (974~987) 14 980,
1786 18:37:48.600026 TX Bit1 (981~995) 15 988, Bit9 (976~987) 12 981,
1787 18:37:48.600084 TX Bit2 (983~993) 11 988, Bit10 (981~993) 13 987,
1788 18:37:48.600142 TX Bit3 (976~990) 15 983, Bit11 (975~984) 10 979,
1789 18:37:48.600200 TX Bit4 (981~994) 14 987, Bit12 (976~987) 12 981,
1790 18:37:48.600258 TX Bit5 (979~991) 13 985, Bit13 (976~989) 14 982,
1791 18:37:48.600316 TX Bit6 (979~992) 14 985, Bit14 (976~992) 17 984,
1792 18:37:48.600573 TX Bit7 (981~994) 14 987, Bit15 (979~992) 14 985,
1793 18:37:48.600642
1794 18:37:48.600702 Write Rank1 MR14 =0x2
1795 18:37:48.600761
1796 18:37:48.600819 CH=0, VrefRange= 0, VrefLevel = 2
1797 18:37:48.600877 TX Bit0 (983~995) 13 989, Bit8 (973~988) 16 980,
1798 18:37:48.600937 TX Bit1 (980~996) 17 988, Bit9 (975~988) 14 981,
1799 18:37:48.600996 TX Bit2 (983~994) 12 988, Bit10 (979~994) 16 986,
1800 18:37:48.601055 TX Bit3 (976~990) 15 983, Bit11 (975~985) 11 980,
1801 18:37:48.601113 TX Bit4 (981~995) 15 988, Bit12 (976~988) 13 982,
1802 18:37:48.601172 TX Bit5 (978~991) 14 984, Bit13 (975~989) 15 982,
1803 18:37:48.601230 TX Bit6 (979~993) 15 986, Bit14 (976~992) 17 984,
1804 18:37:48.601289 TX Bit7 (980~995) 16 987, Bit15 (978~993) 16 985,
1805 18:37:48.601346
1806 18:37:48.601404 Write Rank1 MR14 =0x4
1807 18:37:48.601471
1808 18:37:48.601530 CH=0, VrefRange= 0, VrefLevel = 4
1809 18:37:48.601587 TX Bit0 (982~996) 15 989, Bit8 (973~988) 16 980,
1810 18:37:48.601646 TX Bit1 (980~997) 18 988, Bit9 (975~989) 15 982,
1811 18:37:48.601704 TX Bit2 (982~995) 14 988, Bit10 (979~995) 17 987,
1812 18:37:48.601763 TX Bit3 (976~991) 16 983, Bit11 (974~986) 13 980,
1813 18:37:48.601821 TX Bit4 (980~996) 17 988, Bit12 (976~989) 14 982,
1814 18:37:48.601879 TX Bit5 (978~991) 14 984, Bit13 (975~989) 15 982,
1815 18:37:48.601937 TX Bit6 (978~994) 17 986, Bit14 (975~993) 19 984,
1816 18:37:48.601996 TX Bit7 (980~996) 17 988, Bit15 (978~994) 17 986,
1817 18:37:48.602053
1818 18:37:48.602111 Write Rank1 MR14 =0x6
1819 18:37:48.602169
1820 18:37:48.602226 CH=0, VrefRange= 0, VrefLevel = 6
1821 18:37:48.602284 TX Bit0 (982~997) 16 989, Bit8 (972~989) 18 980,
1822 18:37:48.602342 TX Bit1 (980~998) 19 989, Bit9 (975~989) 15 982,
1823 18:37:48.602400 TX Bit2 (982~996) 15 989, Bit10 (978~996) 19 987,
1824 18:37:48.602459 TX Bit3 (976~991) 16 983, Bit11 (974~987) 14 980,
1825 18:37:48.602516 TX Bit4 (979~997) 19 988, Bit12 (976~989) 14 982,
1826 18:37:48.602574 TX Bit5 (978~992) 15 985, Bit13 (975~990) 16 982,
1827 18:37:48.602632 TX Bit6 (978~995) 18 986, Bit14 (975~994) 20 984,
1828 18:37:48.602690 TX Bit7 (979~997) 19 988, Bit15 (978~995) 18 986,
1829 18:37:48.602748
1830 18:37:48.602804 Write Rank1 MR14 =0x8
1831 18:37:48.602862
1832 18:37:48.602920 CH=0, VrefRange= 0, VrefLevel = 8
1833 18:37:48.602978 TX Bit0 (981~998) 18 989, Bit8 (972~989) 18 980,
1834 18:37:48.603038 TX Bit1 (980~998) 19 989, Bit9 (975~989) 15 982,
1835 18:37:48.603096 TX Bit2 (982~997) 16 989, Bit10 (978~996) 19 987,
1836 18:37:48.603154 TX Bit3 (976~992) 17 984, Bit11 (974~988) 15 981,
1837 18:37:48.603212 TX Bit4 (980~998) 19 989, Bit12 (976~990) 15 983,
1838 18:37:48.603270 TX Bit5 (978~993) 16 985, Bit13 (975~990) 16 982,
1839 18:37:48.603328 TX Bit6 (978~995) 18 986, Bit14 (975~994) 20 984,
1840 18:37:48.603386 TX Bit7 (980~998) 19 989, Bit15 (978~996) 19 987,
1841 18:37:48.603443
1842 18:37:48.603501 Write Rank1 MR14 =0xa
1843 18:37:48.603558
1844 18:37:48.603615 CH=0, VrefRange= 0, VrefLevel = 10
1845 18:37:48.603673 TX Bit0 (981~999) 19 990, Bit8 (972~990) 19 981,
1846 18:37:48.603732 TX Bit1 (979~999) 21 989, Bit9 (974~990) 17 982,
1847 18:37:48.603789 TX Bit2 (981~998) 18 989, Bit10 (978~997) 20 987,
1848 18:37:48.603847 TX Bit3 (975~992) 18 983, Bit11 (974~989) 16 981,
1849 18:37:48.603905 TX Bit4 (979~998) 20 988, Bit12 (975~990) 16 982,
1850 18:37:48.603963 TX Bit5 (977~993) 17 985, Bit13 (975~991) 17 983,
1851 18:37:48.604021 TX Bit6 (978~996) 19 987, Bit14 (975~995) 21 985,
1852 18:37:48.604079 TX Bit7 (979~998) 20 988, Bit15 (977~997) 21 987,
1853 18:37:48.604137
1854 18:37:48.604195 Write Rank1 MR14 =0xc
1855 18:37:48.604252
1856 18:37:48.604309 CH=0, VrefRange= 0, VrefLevel = 12
1857 18:37:48.604368 TX Bit0 (980~999) 20 989, Bit8 (971~990) 20 980,
1858 18:37:48.604426 TX Bit1 (979~999) 21 989, Bit9 (974~991) 18 982,
1859 18:37:48.604485 TX Bit2 (980~998) 19 989, Bit10 (978~997) 20 987,
1860 18:37:48.604542 TX Bit3 (975~993) 19 984, Bit11 (973~989) 17 981,
1861 18:37:48.604600 TX Bit4 (978~998) 21 988, Bit12 (975~991) 17 983,
1862 18:37:48.604658 TX Bit5 (977~994) 18 985, Bit13 (975~991) 17 983,
1863 18:37:48.604716 TX Bit6 (978~997) 20 987, Bit14 (974~996) 23 985,
1864 18:37:48.604774 TX Bit7 (979~999) 21 989, Bit15 (977~997) 21 987,
1865 18:37:48.604832
1866 18:37:48.604889 Write Rank1 MR14 =0xe
1867 18:37:48.604946
1868 18:37:48.605003 CH=0, VrefRange= 0, VrefLevel = 14
1869 18:37:48.605061 TX Bit0 (980~999) 20 989, Bit8 (970~990) 21 980,
1870 18:37:48.605120 TX Bit1 (978~999) 22 988, Bit9 (974~991) 18 982,
1871 18:37:48.605178 TX Bit2 (980~999) 20 989, Bit10 (977~997) 21 987,
1872 18:37:48.605236 TX Bit3 (974~993) 20 983, Bit11 (973~989) 17 981,
1873 18:37:48.605294 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
1874 18:37:48.605352 TX Bit5 (977~995) 19 986, Bit13 (974~992) 19 983,
1875 18:37:48.605410 TX Bit6 (977~998) 22 987, Bit14 (974~996) 23 985,
1876 18:37:48.605473 TX Bit7 (979~999) 21 989, Bit15 (977~997) 21 987,
1877 18:37:48.605531
1878 18:37:48.605588 Write Rank1 MR14 =0x10
1879 18:37:48.605645
1880 18:37:48.605702 CH=0, VrefRange= 0, VrefLevel = 16
1881 18:37:48.605760 TX Bit0 (980~1000) 21 990, Bit8 (971~991) 21 981,
1882 18:37:48.605819 TX Bit1 (979~1000) 22 989, Bit9 (974~991) 18 982,
1883 18:37:48.605877 TX Bit2 (980~999) 20 989, Bit10 (977~997) 21 987,
1884 18:37:48.605936 TX Bit3 (974~993) 20 983, Bit11 (972~990) 19 981,
1885 18:37:48.605993 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
1886 18:37:48.606052 TX Bit5 (977~996) 20 986, Bit13 (974~993) 20 983,
1887 18:37:48.606110 TX Bit6 (977~999) 23 988, Bit14 (974~997) 24 985,
1888 18:37:48.606168 TX Bit7 (979~999) 21 989, Bit15 (977~997) 21 987,
1889 18:37:48.606225
1890 18:37:48.606282 Write Rank1 MR14 =0x12
1891 18:37:48.606339
1892 18:37:48.606397 CH=0, VrefRange= 0, VrefLevel = 18
1893 18:37:48.606454 TX Bit0 (979~1000) 22 989, Bit8 (970~991) 22 980,
1894 18:37:48.606512 TX Bit1 (979~1000) 22 989, Bit9 (973~992) 20 982,
1895 18:37:48.606766 TX Bit2 (980~999) 20 989, Bit10 (977~998) 22 987,
1896 18:37:48.606833 TX Bit3 (974~994) 21 984, Bit11 (972~990) 19 981,
1897 18:37:48.606893 TX Bit4 (978~999) 22 988, Bit12 (974~992) 19 983,
1898 18:37:48.606951 TX Bit5 (977~997) 21 987, Bit13 (973~993) 21 983,
1899 18:37:48.607010 TX Bit6 (977~999) 23 988, Bit14 (974~997) 24 985,
1900 18:37:48.607068 TX Bit7 (978~1000) 23 989, Bit15 (976~998) 23 987,
1901 18:37:48.607126
1902 18:37:48.607184 Write Rank1 MR14 =0x14
1903 18:37:48.607242
1904 18:37:48.607299 CH=0, VrefRange= 0, VrefLevel = 20
1905 18:37:48.607358 TX Bit0 (979~1001) 23 990, Bit8 (969~992) 24 980,
1906 18:37:48.747170 TX Bit1 (978~1000) 23 989, Bit9 (973~992) 20 982,
1907 18:37:48.747661 TX Bit2 (980~1000) 21 990, Bit10 (977~998) 22 987,
1908 18:37:48.747992 TX Bit3 (973~994) 22 983, Bit11 (971~991) 21 981,
1909 18:37:48.748294 TX Bit4 (978~1000) 23 989, Bit12 (973~993) 21 983,
1910 18:37:48.748591 TX Bit5 (977~998) 22 987, Bit13 (973~994) 22 983,
1911 18:37:48.748882 TX Bit6 (977~999) 23 988, Bit14 (973~997) 25 985,
1912 18:37:48.749125 TX Bit7 (978~1000) 23 989, Bit15 (976~998) 23 987,
1913 18:37:48.749190
1914 18:37:48.749251 Write Rank1 MR14 =0x16
1915 18:37:48.749311
1916 18:37:48.749370 CH=0, VrefRange= 0, VrefLevel = 22
1917 18:37:48.749439 TX Bit0 (979~1001) 23 990, Bit8 (969~993) 25 981,
1918 18:37:48.749503 TX Bit1 (978~1001) 24 989, Bit9 (972~993) 22 982,
1919 18:37:48.749563 TX Bit2 (979~1000) 22 989, Bit10 (977~999) 23 988,
1920 18:37:48.749623 TX Bit3 (973~995) 23 984, Bit11 (971~991) 21 981,
1921 18:37:48.749682 TX Bit4 (978~1000) 23 989, Bit12 (973~993) 21 983,
1922 18:37:48.749741 TX Bit5 (976~998) 23 987, Bit13 (973~995) 23 984,
1923 18:37:48.749801 TX Bit6 (977~999) 23 988, Bit14 (973~997) 25 985,
1924 18:37:48.749861 TX Bit7 (978~1001) 24 989, Bit15 (976~999) 24 987,
1925 18:37:48.749934
1926 18:37:48.750005 wait MRW command Rank1 MR14 =0x18 fired (1)
1927 18:37:48.750065 Write Rank1 MR14 =0x18
1928 18:37:48.750124
1929 18:37:48.750182 CH=0, VrefRange= 0, VrefLevel = 24
1930 18:37:48.750240 TX Bit0 (979~1002) 24 990, Bit8 (969~993) 25 981,
1931 18:37:48.750300 TX Bit1 (978~1001) 24 989, Bit9 (972~994) 23 983,
1932 18:37:48.750359 TX Bit2 (978~1001) 24 989, Bit10 (977~999) 23 988,
1933 18:37:48.750419 TX Bit3 (972~996) 25 984, Bit11 (970~992) 23 981,
1934 18:37:48.750478 TX Bit4 (978~1000) 23 989, Bit12 (972~994) 23 983,
1935 18:37:48.750537 TX Bit5 (976~998) 23 987, Bit13 (972~996) 25 984,
1936 18:37:48.750596 TX Bit6 (977~1000) 24 988, Bit14 (973~998) 26 985,
1937 18:37:48.750655 TX Bit7 (978~1001) 24 989, Bit15 (976~999) 24 987,
1938 18:37:48.750714
1939 18:37:48.750773 Write Rank1 MR14 =0x1a
1940 18:37:48.750831
1941 18:37:48.750889 CH=0, VrefRange= 0, VrefLevel = 26
1942 18:37:48.750947 TX Bit0 (978~1002) 25 990, Bit8 (969~993) 25 981,
1943 18:37:48.751006 TX Bit1 (978~1002) 25 990, Bit9 (971~995) 25 983,
1944 18:37:48.751065 TX Bit2 (979~1001) 23 990, Bit10 (976~1000) 25 988,
1945 18:37:48.751123 TX Bit3 (972~996) 25 984, Bit11 (970~993) 24 981,
1946 18:37:48.751181 TX Bit4 (977~1001) 25 989, Bit12 (972~995) 24 983,
1947 18:37:48.751240 TX Bit5 (976~999) 24 987, Bit13 (972~996) 25 984,
1948 18:37:48.751298 TX Bit6 (976~1000) 25 988, Bit14 (972~998) 27 985,
1949 18:37:48.751357 TX Bit7 (978~1001) 24 989, Bit15 (976~999) 24 987,
1950 18:37:48.751414
1951 18:37:48.751472 Write Rank1 MR14 =0x1c
1952 18:37:48.751531
1953 18:37:48.751589 CH=0, VrefRange= 0, VrefLevel = 28
1954 18:37:48.751648 TX Bit0 (978~1003) 26 990, Bit8 (969~994) 26 981,
1955 18:37:48.751708 TX Bit1 (978~1002) 25 990, Bit9 (971~995) 25 983,
1956 18:37:48.751767 TX Bit2 (978~1002) 25 990, Bit10 (976~1001) 26 988,
1957 18:37:48.751868 TX Bit3 (972~997) 26 984, Bit11 (970~993) 24 981,
1958 18:37:48.751953 TX Bit4 (977~1001) 25 989, Bit12 (972~995) 24 983,
1959 18:37:48.752014 TX Bit5 (975~999) 25 987, Bit13 (971~996) 26 983,
1960 18:37:48.752074 TX Bit6 (976~1000) 25 988, Bit14 (972~998) 27 985,
1961 18:37:48.752133 TX Bit7 (978~1002) 25 990, Bit15 (976~1000) 25 988,
1962 18:37:48.752192
1963 18:37:48.752250 Write Rank1 MR14 =0x1e
1964 18:37:48.752309
1965 18:37:48.752367 CH=0, VrefRange= 0, VrefLevel = 30
1966 18:37:48.752426 TX Bit0 (978~1003) 26 990, Bit8 (969~994) 26 981,
1967 18:37:48.752485 TX Bit1 (978~1002) 25 990, Bit9 (971~996) 26 983,
1968 18:37:48.752543 TX Bit2 (978~1002) 25 990, Bit10 (976~1001) 26 988,
1969 18:37:48.752602 TX Bit3 (972~997) 26 984, Bit11 (970~994) 25 982,
1970 18:37:48.752659 TX Bit4 (977~1002) 26 989, Bit12 (971~996) 26 983,
1971 18:37:48.752718 TX Bit5 (976~999) 24 987, Bit13 (970~996) 27 983,
1972 18:37:48.752776 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1973 18:37:48.752835 TX Bit7 (977~1003) 27 990, Bit15 (975~999) 25 987,
1974 18:37:48.752893
1975 18:37:48.752951 Write Rank1 MR14 =0x20
1976 18:37:48.753009
1977 18:37:48.753066 CH=0, VrefRange= 0, VrefLevel = 32
1978 18:37:48.753125 TX Bit0 (978~1003) 26 990, Bit8 (969~994) 26 981,
1979 18:37:48.753183 TX Bit1 (978~1002) 25 990, Bit9 (971~996) 26 983,
1980 18:37:48.753242 TX Bit2 (978~1002) 25 990, Bit10 (976~1001) 26 988,
1981 18:37:48.753301 TX Bit3 (972~997) 26 984, Bit11 (970~994) 25 982,
1982 18:37:48.753406 TX Bit4 (977~1002) 26 989, Bit12 (971~996) 26 983,
1983 18:37:48.753489 TX Bit5 (976~999) 24 987, Bit13 (970~996) 27 983,
1984 18:37:48.753551 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1985 18:37:48.753611 TX Bit7 (977~1003) 27 990, Bit15 (975~999) 25 987,
1986 18:37:48.753670
1987 18:37:48.753728 Write Rank1 MR14 =0x22
1988 18:37:48.753787
1989 18:37:48.753845 CH=0, VrefRange= 0, VrefLevel = 34
1990 18:37:48.753904 TX Bit0 (978~1003) 26 990, Bit8 (969~994) 26 981,
1991 18:37:48.753962 TX Bit1 (978~1002) 25 990, Bit9 (971~996) 26 983,
1992 18:37:48.754022 TX Bit2 (978~1002) 25 990, Bit10 (976~1001) 26 988,
1993 18:37:48.754081 TX Bit3 (972~997) 26 984, Bit11 (970~994) 25 982,
1994 18:37:48.754353 TX Bit4 (977~1002) 26 989, Bit12 (971~996) 26 983,
1995 18:37:48.754420 TX Bit5 (976~999) 24 987, Bit13 (970~996) 27 983,
1996 18:37:48.754481 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1997 18:37:48.754541 TX Bit7 (977~1003) 27 990, Bit15 (975~999) 25 987,
1998 18:37:48.754600
1999 18:37:48.754658 Write Rank1 MR14 =0x24
2000 18:37:48.754716
2001 18:37:48.754774 CH=0, VrefRange= 0, VrefLevel = 36
2002 18:37:48.754832 TX Bit0 (978~1003) 26 990, Bit8 (969~994) 26 981,
2003 18:37:48.754891 TX Bit1 (978~1002) 25 990, Bit9 (971~996) 26 983,
2004 18:37:48.754951 TX Bit2 (978~1002) 25 990, Bit10 (976~1001) 26 988,
2005 18:37:48.755010 TX Bit3 (972~997) 26 984, Bit11 (970~994) 25 982,
2006 18:37:48.755069 TX Bit4 (977~1002) 26 989, Bit12 (971~996) 26 983,
2007 18:37:48.755127 TX Bit5 (976~999) 24 987, Bit13 (970~996) 27 983,
2008 18:37:48.755186 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
2009 18:37:48.755245 TX Bit7 (977~1003) 27 990, Bit15 (975~999) 25 987,
2010 18:37:48.755304
2011 18:37:48.755361
2012 18:37:48.755420 TX Vref found, early break! 387< 389
2013 18:37:48.755480 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2014 18:37:48.755539 u1DelayCellOfst[0]=7 cells (6 PI)
2015 18:37:48.755597 u1DelayCellOfst[1]=7 cells (6 PI)
2016 18:37:48.755656 u1DelayCellOfst[2]=7 cells (6 PI)
2017 18:37:48.755714 u1DelayCellOfst[3]=0 cells (0 PI)
2018 18:37:48.755772 u1DelayCellOfst[4]=6 cells (5 PI)
2019 18:37:48.755830 u1DelayCellOfst[5]=3 cells (3 PI)
2020 18:37:48.755889 u1DelayCellOfst[6]=5 cells (4 PI)
2021 18:37:48.755947 u1DelayCellOfst[7]=7 cells (6 PI)
2022 18:37:48.756006 Byte0, DQ PI dly=984, DQM PI dly= 987
2023 18:37:48.756064 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2024 18:37:48.756124
2025 18:37:48.756182 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2026 18:37:48.756272
2027 18:37:48.756335 u1DelayCellOfst[8]=0 cells (0 PI)
2028 18:37:48.756394 u1DelayCellOfst[9]=2 cells (2 PI)
2029 18:37:48.756454 u1DelayCellOfst[10]=9 cells (7 PI)
2030 18:37:48.756513 u1DelayCellOfst[11]=1 cells (1 PI)
2031 18:37:48.756572 u1DelayCellOfst[12]=2 cells (2 PI)
2032 18:37:48.756630 u1DelayCellOfst[13]=2 cells (2 PI)
2033 18:37:48.756689 u1DelayCellOfst[14]=3 cells (3 PI)
2034 18:37:48.756748 u1DelayCellOfst[15]=7 cells (6 PI)
2035 18:37:48.756806 Byte1, DQ PI dly=981, DQM PI dly= 984
2036 18:37:48.756865 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2037 18:37:48.756924
2038 18:37:48.756983 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2039 18:37:48.757042
2040 18:37:48.757100 Write Rank1 MR14 =0x1e
2041 18:37:48.757159
2042 18:37:48.757217 Final TX Range 0 Vref 30
2043 18:37:48.757276
2044 18:37:48.757335 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2045 18:37:48.757394
2046 18:37:48.757462 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2047 18:37:48.757523 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2048 18:37:48.757584 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2049 18:37:48.757643 Write Rank1 MR3 =0xb0
2050 18:37:48.757702 DramC Write-DBI on
2051 18:37:48.757762 ==
2052 18:37:48.757821 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2053 18:37:48.757880 fsp= 1, odt_onoff= 1, Byte mode= 0
2054 18:37:48.757940 ==
2055 18:37:48.757999 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2056 18:37:48.758059
2057 18:37:48.758117 Begin, DQ Scan Range 704~768
2058 18:37:48.758176
2059 18:37:48.758234
2060 18:37:48.758292 TX Vref Scan disable
2061 18:37:48.758351 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2062 18:37:48.758412 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2063 18:37:48.758472 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2064 18:37:48.758532 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2065 18:37:48.758592 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2066 18:37:48.758652 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2067 18:37:48.758712 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2068 18:37:48.758772 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2069 18:37:48.758832 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2070 18:37:48.758892 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2071 18:37:48.758952 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2072 18:37:48.759012 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2073 18:37:48.759072 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2074 18:37:48.759131 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2075 18:37:48.759190 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2076 18:37:48.759250 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2077 18:37:48.759310 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2078 18:37:48.759370 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2079 18:37:48.759429 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2080 18:37:48.759488 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2081 18:37:48.759547 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2082 18:37:48.759607 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2083 18:37:48.759667 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2084 18:37:48.759726 748 |2 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
2085 18:37:48.759814 Byte0, DQ PI dly=733, DQM PI dly= 733
2086 18:37:48.759877 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2087 18:37:48.759937
2088 18:37:48.759996 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2089 18:37:48.760056
2090 18:37:48.760114 Byte1, DQ PI dly=727, DQM PI dly= 727
2091 18:37:48.760173 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
2092 18:37:48.760233
2093 18:37:48.760291 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
2094 18:37:48.760351
2095 18:37:48.760409 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2096 18:37:48.760469 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2097 18:37:48.760528 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2098 18:37:48.760587 Write Rank1 MR3 =0x30
2099 18:37:48.760646 DramC Write-DBI off
2100 18:37:48.760704
2101 18:37:48.760762 [DATLAT]
2102 18:37:48.760821 Freq=1600, CH0 RK1, use_rxtx_scan=0
2103 18:37:48.760880
2104 18:37:48.760939 DATLAT Default: 0x10
2105 18:37:48.760997 7, 0xFFFF, sum=0
2106 18:37:48.761058 8, 0xFFFF, sum=0
2107 18:37:48.761117 9, 0xFFFF, sum=0
2108 18:37:48.761177 10, 0xFFFF, sum=0
2109 18:37:48.761237 11, 0xFFFF, sum=0
2110 18:37:48.761310 12, 0xFFFF, sum=0
2111 18:37:48.761374 13, 0xFFFF, sum=0
2112 18:37:48.761442 14, 0x0, sum=1
2113 18:37:48.761504 15, 0x0, sum=2
2114 18:37:48.763053 16, 0x0, sum=3
2115 18:37:48.763126 17, 0x0, sum=4
2116 18:37:48.767075 pattern=2 first_step=14 total pass=5 best_step=16
2117 18:37:48.770269 ==
2118 18:37:48.773232 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2119 18:37:48.776638 fsp= 1, odt_onoff= 1, Byte mode= 0
2120 18:37:48.777027 ==
2121 18:37:48.779832 Start DQ dly to find pass range UseTestEngine =1
2122 18:37:48.786526 x-axis: bit #, y-axis: DQ dly (-127~63)
2123 18:37:48.787019 RX Vref Scan = 0
2124 18:37:48.789863 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2125 18:37:48.793232 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2126 18:37:48.796413 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2127 18:37:48.799684 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2128 18:37:48.800193 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2129 18:37:48.802729 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2130 18:37:48.806228 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2131 18:37:48.809362 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2132 18:37:48.812603 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2133 18:37:48.816235 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2134 18:37:48.819284 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2135 18:37:48.822219 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2136 18:37:48.825557 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2137 18:37:48.828980 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2138 18:37:48.829517 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2139 18:37:48.832590 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2140 18:37:48.835761 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2141 18:37:48.838747 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2142 18:37:48.842293 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2143 18:37:48.845507 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2144 18:37:48.848639 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2145 18:37:48.851669 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2146 18:37:48.852183 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2147 18:37:48.855139 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2148 18:37:48.858448 -2, [0] xxxoxxxx ooxoxxxx [MSB]
2149 18:37:48.861425 -1, [0] xxxoxxxx ooxoooxx [MSB]
2150 18:37:48.864975 0, [0] xxxoxoxx ooxoooxx [MSB]
2151 18:37:48.868001 1, [0] xxxoxoox ooxoooxx [MSB]
2152 18:37:48.871578 2, [0] xxxoxoox ooxoooox [MSB]
2153 18:37:48.871943 3, [0] xxxoooox ooxoooox [MSB]
2154 18:37:48.874783 4, [0] ooxooooo ooxoooox [MSB]
2155 18:37:48.878199 5, [0] ooxooooo ooxooooo [MSB]
2156 18:37:48.881361 6, [0] oooooooo ooxooooo [MSB]
2157 18:37:48.885132 32, [0] oooxoooo oooooooo [MSB]
2158 18:37:48.888576 33, [0] oooxoooo xooxoooo [MSB]
2159 18:37:48.891443 34, [0] oooxoooo xooxoxoo [MSB]
2160 18:37:48.894804 35, [0] oooxoxoo xxoxxxoo [MSB]
2161 18:37:48.898192 36, [0] oooxoxxo xxoxxxxo [MSB]
2162 18:37:48.901749 37, [0] oooxoxxx xxoxxxxo [MSB]
2163 18:37:48.904598 38, [0] oooxoxxx xxoxxxxx [MSB]
2164 18:37:48.905075 39, [0] oxoxxxxx xxoxxxxx [MSB]
2165 18:37:48.907749 40, [0] xxoxxxxx xxoxxxxx [MSB]
2166 18:37:48.911135 41, [0] xxxxxxxx xxxxxxxx [MSB]
2167 18:37:48.914310 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2168 18:37:48.917770 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2169 18:37:48.921396 iDelay=41, Bit 2, Center 23 (6 ~ 40) 35
2170 18:37:48.927489 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2171 18:37:48.930477 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
2172 18:37:48.934118 iDelay=41, Bit 5, Center 17 (0 ~ 34) 35
2173 18:37:48.937483 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2174 18:37:48.940414 iDelay=41, Bit 7, Center 20 (4 ~ 36) 33
2175 18:37:48.943956 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2176 18:37:48.947022 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2177 18:37:48.950517 iDelay=41, Bit 10, Center 23 (7 ~ 40) 34
2178 18:37:48.953412 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2179 18:37:48.956770 iDelay=41, Bit 12, Center 16 (-1 ~ 34) 36
2180 18:37:48.963666 iDelay=41, Bit 13, Center 16 (-1 ~ 33) 35
2181 18:37:48.966725 iDelay=41, Bit 14, Center 18 (2 ~ 35) 34
2182 18:37:48.970091 iDelay=41, Bit 15, Center 21 (5 ~ 37) 33
2183 18:37:48.970531 ==
2184 18:37:48.973307 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2185 18:37:48.976390 fsp= 1, odt_onoff= 1, Byte mode= 0
2186 18:37:48.976945 ==
2187 18:37:48.979788 DQS Delay:
2188 18:37:48.980174 DQS0 = 0, DQS1 = 0
2189 18:37:48.983249 DQM Delay:
2190 18:37:48.983750 DQM0 = 19, DQM1 = 17
2191 18:37:48.984067 DQ Delay:
2192 18:37:48.986403 DQ0 =21, DQ1 =21, DQ2 =23, DQ3 =14
2193 18:37:48.989792 DQ4 =20, DQ5 =17, DQ6 =18, DQ7 =20
2194 18:37:48.993508 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2195 18:37:48.996303 DQ12 =16, DQ13 =16, DQ14 =18, DQ15 =21
2196 18:37:48.996833
2197 18:37:48.997164
2198 18:37:48.999435
2199 18:37:48.999889 [DramC_TX_OE_Calibration] TA2
2200 18:37:49.002812 Original DQ_B0 (3 6) =30, OEN = 27
2201 18:37:49.006370 Original DQ_B1 (3 6) =30, OEN = 27
2202 18:37:49.009762 23, 0x0, End_B0=23 End_B1=23
2203 18:37:49.012355 24, 0x0, End_B0=24 End_B1=24
2204 18:37:49.016325 25, 0x0, End_B0=25 End_B1=25
2205 18:37:49.016856 26, 0x0, End_B0=26 End_B1=26
2206 18:37:49.019288 27, 0x0, End_B0=27 End_B1=27
2207 18:37:49.022594 28, 0x0, End_B0=28 End_B1=28
2208 18:37:49.026061 29, 0x0, End_B0=29 End_B1=29
2209 18:37:49.029015 30, 0x0, End_B0=30 End_B1=30
2210 18:37:49.029474 31, 0xFFFF, End_B0=30 End_B1=30
2211 18:37:49.035511 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2212 18:37:49.042199 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2213 18:37:49.042728
2214 18:37:49.043064
2215 18:37:49.045540 Write Rank1 MR23 =0x3f
2216 18:37:49.045967 [DQSOSC]
2217 18:37:49.051572 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6a6, (MSB)MR19= 0x202, tDQSOscB0 = 464 ps tDQSOscB1 = 464 ps
2218 18:37:49.058209 CH0_RK1: MR19=0x202, MR18=0xA6A6, DQSOSC=464, MR23=63, INC=11, DEC=17
2219 18:37:49.061350 Write Rank1 MR23 =0x3f
2220 18:37:49.061793 [DQSOSC]
2221 18:37:49.071156 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3a3, (MSB)MR19= 0x202, tDQSOscB0 = 466 ps tDQSOscB1 = 466 ps
2222 18:37:49.071639 CH0 RK1: MR19=202, MR18=A3A3
2223 18:37:49.074643 [RxdqsGatingPostProcess] freq 1600
2224 18:37:49.080981 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2225 18:37:49.081391 Rank: 0
2226 18:37:49.084482 best DQS0 dly(2T, 0.5T) = (2, 6)
2227 18:37:49.087795 best DQS1 dly(2T, 0.5T) = (2, 6)
2228 18:37:49.090904 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2229 18:37:49.094089 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2230 18:37:49.094478 Rank: 1
2231 18:37:49.097583 best DQS0 dly(2T, 0.5T) = (2, 6)
2232 18:37:49.100940 best DQS1 dly(2T, 0.5T) = (2, 6)
2233 18:37:49.103972 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2234 18:37:49.107532 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2235 18:37:49.110839 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2236 18:37:49.114165 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2237 18:37:49.120768 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2238 18:37:49.124052 Write Rank0 MR13 =0x59
2239 18:37:49.124579 ==
2240 18:37:49.127278 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2241 18:37:49.130420 fsp= 1, odt_onoff= 1, Byte mode= 0
2242 18:37:49.130916 ==
2243 18:37:49.133938 === u2Vref_new: 0x56 --> 0x3a
2244 18:37:49.136893 === u2Vref_new: 0x58 --> 0x58
2245 18:37:49.140096 === u2Vref_new: 0x5a --> 0x5a
2246 18:37:49.143730 === u2Vref_new: 0x5c --> 0x78
2247 18:37:49.146674 === u2Vref_new: 0x5e --> 0x7a
2248 18:37:49.149926 === u2Vref_new: 0x60 --> 0x90
2249 18:37:49.153038 [CA 0] Center 37 (12~63) winsize 52
2250 18:37:49.156087 [CA 1] Center 37 (12~63) winsize 52
2251 18:37:49.159486 [CA 2] Center 34 (6~63) winsize 58
2252 18:37:49.163157 [CA 3] Center 35 (7~63) winsize 57
2253 18:37:49.166342 [CA 4] Center 34 (5~63) winsize 59
2254 18:37:49.169526 [CA 5] Center 28 (-1~58) winsize 60
2255 18:37:49.170017
2256 18:37:49.172758 [CATrainingPosCal] consider 1 rank data
2257 18:37:49.176395 u2DelayCellTimex100 = 753/100 ps
2258 18:37:49.179146 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2259 18:37:49.182364 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2260 18:37:49.185852 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2261 18:37:49.188917 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2262 18:37:49.192110 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2263 18:37:49.195898 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2264 18:37:49.196437
2265 18:37:49.202344 CA PerBit enable=1, Macro0, CA PI delay=28
2266 18:37:49.202842 === u2Vref_new: 0x5c --> 0x78
2267 18:37:49.203157
2268 18:37:49.205422 Vref(ca) range 1: 28
2269 18:37:49.205930
2270 18:37:49.208695 CS Dly= 11 (42-0-32)
2271 18:37:49.209187 Write Rank0 MR13 =0xd8
2272 18:37:49.212041 Write Rank0 MR13 =0xd8
2273 18:37:49.215837 Write Rank0 MR12 =0x5c
2274 18:37:49.216334 Write Rank1 MR13 =0x59
2275 18:37:49.216647 ==
2276 18:37:49.221548 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2277 18:37:49.225518 fsp= 1, odt_onoff= 1, Byte mode= 0
2278 18:37:49.226015 ==
2279 18:37:49.228494 === u2Vref_new: 0x56 --> 0x3a
2280 18:37:49.232149 === u2Vref_new: 0x58 --> 0x58
2281 18:37:49.235196 === u2Vref_new: 0x5a --> 0x5a
2282 18:37:49.238369 === u2Vref_new: 0x5c --> 0x78
2283 18:37:49.241760 === u2Vref_new: 0x5e --> 0x7a
2284 18:37:49.242258 === u2Vref_new: 0x60 --> 0x90
2285 18:37:49.245263 [CA 0] Center 37 (12~63) winsize 52
2286 18:37:49.248458 [CA 1] Center 37 (12~63) winsize 52
2287 18:37:49.251494 [CA 2] Center 34 (5~63) winsize 59
2288 18:37:49.254851 [CA 3] Center 35 (7~63) winsize 57
2289 18:37:49.257981 [CA 4] Center 34 (5~63) winsize 59
2290 18:37:49.261366 [CA 5] Center 29 (0~58) winsize 59
2291 18:37:49.261774
2292 18:37:49.264694 [CATrainingPosCal] consider 2 rank data
2293 18:37:49.267879 u2DelayCellTimex100 = 753/100 ps
2294 18:37:49.271188 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2295 18:37:49.277395 CA1 delay=37 (12~63),Diff = 8 PI (10 cell)
2296 18:37:49.280781 CA2 delay=34 (6~63),Diff = 5 PI (6 cell)
2297 18:37:49.284213 CA3 delay=35 (7~63),Diff = 6 PI (7 cell)
2298 18:37:49.287381 CA4 delay=34 (5~63),Diff = 5 PI (6 cell)
2299 18:37:49.290925 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2300 18:37:49.291291
2301 18:37:49.294123 CA PerBit enable=1, Macro0, CA PI delay=29
2302 18:37:49.297569 === u2Vref_new: 0x5e --> 0x7a
2303 18:37:49.298082
2304 18:37:49.300618 Vref(ca) range 1: 30
2305 18:37:49.300998
2306 18:37:49.301297 CS Dly= 11 (42-0-32)
2307 18:37:49.304197 Write Rank1 MR13 =0xd8
2308 18:37:49.307414 Write Rank1 MR13 =0xd8
2309 18:37:49.307880 Write Rank1 MR12 =0x5e
2310 18:37:49.310212 [RankSwap] Rank num 2, (Multi 1), Rank 0
2311 18:37:49.313522 Write Rank0 MR2 =0xad
2312 18:37:49.313879 [Write Leveling]
2313 18:37:49.317163 delay byte0 byte1 byte2 byte3
2314 18:37:49.317709
2315 18:37:49.320227 10 0 0
2316 18:37:49.320779 11 0 0
2317 18:37:49.323737 12 0 0
2318 18:37:49.324235 13 0 0
2319 18:37:49.324593 14 0 0
2320 18:37:49.327065 15 0 0
2321 18:37:49.327561 16 0 0
2322 18:37:49.330055 17 0 0
2323 18:37:49.330442 18 0 0
2324 18:37:49.333603 19 0 0
2325 18:37:49.334092 20 0 0
2326 18:37:49.334404 21 0 0
2327 18:37:49.337012 22 0 0
2328 18:37:49.337531 23 0 0
2329 18:37:49.339968 24 0 0
2330 18:37:49.340464 25 0 ff
2331 18:37:49.343557 26 0 ff
2332 18:37:49.344053 27 0 ff
2333 18:37:49.344365 28 0 ff
2334 18:37:49.346330 29 0 ff
2335 18:37:49.346717 30 0 ff
2336 18:37:49.349854 31 0 ff
2337 18:37:49.350345 32 ff ff
2338 18:37:49.353021 33 ff ff
2339 18:37:49.353409 34 ff ff
2340 18:37:49.356127 35 ff ff
2341 18:37:49.356516 36 ff ff
2342 18:37:49.359546 37 ff ff
2343 18:37:49.359937 38 ff ff
2344 18:37:49.362737 pass bytecount = 0xff (0xff: all bytes pass)
2345 18:37:49.363120
2346 18:37:49.365925 DQS0 dly: 32
2347 18:37:49.366304 DQS1 dly: 25
2348 18:37:49.369500 Write Rank0 MR2 =0x2d
2349 18:37:49.372422 [RankSwap] Rank num 2, (Multi 1), Rank 0
2350 18:37:49.372806 Write Rank0 MR1 =0xd6
2351 18:37:49.375859 [Gating]
2352 18:37:49.376242 ==
2353 18:37:49.379418 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2354 18:37:49.382780 fsp= 1, odt_onoff= 1, Byte mode= 0
2355 18:37:49.383245 ==
2356 18:37:49.389374 3 1 0 |2c2b 706 |(11 11)(11 11) |(1 1)(1 1)| 0
2357 18:37:49.392245 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2358 18:37:49.395672 3 1 8 |2c2b 3736 |(11 11)(11 11) |(0 0)(1 1)| 0
2359 18:37:49.402088 3 1 12 |2c2b 3636 |(11 11)(11 11) |(0 0)(0 0)| 0
2360 18:37:49.405660 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2361 18:37:49.408679 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2362 18:37:49.415269 3 1 24 |2c2b 3636 |(11 11)(11 11) |(1 0)(1 1)| 0
2363 18:37:49.418540 3 1 28 |2c2b 1717 |(11 11)(11 11) |(1 0)(1 1)| 0
2364 18:37:49.422080 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2365 18:37:49.428352 3 2 0 |2c2b 2626 |(11 11)(11 11) |(1 0)(0 1)| 0
2366 18:37:49.431440 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2367 18:37:49.435259 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2368 18:37:49.441841 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2369 18:37:49.444529 3 2 16 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2370 18:37:49.448066 3 2 20 |504 3231 |(11 11)(11 11) |(0 0)(1 1)| 0
2371 18:37:49.454442 3 2 24 |3534 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
2372 18:37:49.457868 3 2 28 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2373 18:37:49.461318 [Byte 1] Lead/lag Transition tap number (1)
2374 18:37:49.464719 3 3 0 |3534 d0c |(11 11)(11 11) |(0 0)(0 0)| 0
2375 18:37:49.471080 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2376 18:37:49.474162 3 3 8 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
2377 18:37:49.477381 3 3 12 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2378 18:37:49.484192 3 3 16 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2379 18:37:49.487392 3 3 20 |3534 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
2380 18:37:49.490925 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2381 18:37:49.497234 3 3 24 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
2382 18:37:49.500638 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2383 18:37:49.503486 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2384 18:37:49.510178 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2385 18:37:49.513536 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2386 18:37:49.516604 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2387 18:37:49.523076 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2388 18:37:49.526160 3 4 16 |e0d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2389 18:37:49.529819 3 4 20 |1515 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2390 18:37:49.536355 3 4 24 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2391 18:37:49.539359 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 18:37:49.542660 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 18:37:49.549343 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 18:37:49.552713 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 18:37:49.555717 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 18:37:49.562758 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 18:37:49.565535 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 18:37:49.569036 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 18:37:49.575579 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 18:37:49.578531 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 18:37:49.582130 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 18:37:49.585145 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2403 18:37:49.591988 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2404 18:37:49.594770 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2405 18:37:49.598289 [Byte 0] Lead/lag Transition tap number (3)
2406 18:37:49.605531 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2407 18:37:49.608684 3 6 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2408 18:37:49.611342 [Byte 1] Lead/lag Transition tap number (2)
2409 18:37:49.614870 3 6 20 |2424 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2410 18:37:49.621535 3 6 24 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
2411 18:37:49.624878 [Byte 0]First pass (3, 6, 24)
2412 18:37:49.627934 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 18:37:49.631332 [Byte 1]First pass (3, 6, 28)
2414 18:37:49.634229 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 18:37:49.637874 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2416 18:37:49.640824 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 18:37:49.644415 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2418 18:37:49.650656 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 18:37:49.653952 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 18:37:49.657134 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 18:37:49.660529 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2422 18:37:49.666944 All bytes gating window > 1UI, Early break!
2423 18:37:49.667393
2424 18:37:49.670214 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2425 18:37:49.670922
2426 18:37:49.673559 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2427 18:37:49.673909
2428 18:37:49.674181
2429 18:37:49.674435
2430 18:37:49.676953 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2431 18:37:49.677302
2432 18:37:49.680145 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2433 18:37:49.683397
2434 18:37:49.683778
2435 18:37:49.684069 Write Rank0 MR1 =0x56
2436 18:37:49.684591
2437 18:37:49.686802 best RODT dly(2T, 0.5T) = (2, 3)
2438 18:37:49.687150
2439 18:37:49.690051 best RODT dly(2T, 0.5T) = (2, 3)
2440 18:37:49.690399 ==
2441 18:37:49.696668 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2442 18:37:49.700124 fsp= 1, odt_onoff= 1, Byte mode= 0
2443 18:37:49.700581 ==
2444 18:37:49.703194 Start DQ dly to find pass range UseTestEngine =0
2445 18:37:49.706823 x-axis: bit #, y-axis: DQ dly (-127~63)
2446 18:37:49.709830 RX Vref Scan = 0
2447 18:37:49.710178 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2448 18:37:49.713142 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2449 18:37:49.716573 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2450 18:37:49.719351 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2451 18:37:49.723189 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2452 18:37:49.725844 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2453 18:37:49.729689 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2454 18:37:49.732513 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2455 18:37:49.736098 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2456 18:37:49.739326 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2457 18:37:49.739791 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2458 18:37:49.742674 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2459 18:37:49.745868 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2460 18:37:49.748624 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2461 18:37:49.752504 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2462 18:37:49.755272 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2463 18:37:49.758413 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2464 18:37:49.761953 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2465 18:37:49.765337 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2466 18:37:49.765865 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2467 18:37:49.768571 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2468 18:37:49.771788 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2469 18:37:49.775148 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2470 18:37:49.778433 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2471 18:37:49.781502 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2472 18:37:49.785169 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2473 18:37:49.788032 0, [0] xxxoxxxx ooxxxxxo [MSB]
2474 18:37:49.788466 1, [0] xxooxxxx ooxxxxxo [MSB]
2475 18:37:49.791776 2, [0] xxooxxxo oooxxxxo [MSB]
2476 18:37:49.794864 3, [0] xxooxxxo oooooxoo [MSB]
2477 18:37:49.797891 4, [0] oooooxxo oooooooo [MSB]
2478 18:37:49.801520 5, [0] oooooxxo oooooooo [MSB]
2479 18:37:49.804638 6, [0] oooooxoo oooooooo [MSB]
2480 18:37:49.805154 31, [0] oooooooo ooooooox [MSB]
2481 18:37:49.807907 32, [0] oooooooo ooooooox [MSB]
2482 18:37:49.811212 33, [0] oooooooo ooooooox [MSB]
2483 18:37:49.814166 34, [0] oooooooo ooooooox [MSB]
2484 18:37:49.817639 35, [0] ooxxoooo oxooooox [MSB]
2485 18:37:49.821203 36, [0] ooxxoooo xxooooox [MSB]
2486 18:37:49.824362 37, [0] ooxxoooo xxooooox [MSB]
2487 18:37:49.827416 38, [0] oxxxoooo xxooooox [MSB]
2488 18:37:49.827945 39, [0] oxxxooox xxxxooox [MSB]
2489 18:37:49.830764 40, [0] oxxxxoxx xxxxxoox [MSB]
2490 18:37:49.834174 41, [0] xxxxxoxx xxxxxxxx [MSB]
2491 18:37:49.837230 42, [0] xxxxxxxx xxxxxxxx [MSB]
2492 18:37:49.840636 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
2493 18:37:49.843852 iDelay=42, Bit 1, Center 20 (4 ~ 37) 34
2494 18:37:49.847056 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
2495 18:37:49.850347 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2496 18:37:49.856561 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2497 18:37:49.860435 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2498 18:37:49.863469 iDelay=42, Bit 6, Center 22 (6 ~ 39) 34
2499 18:37:49.866639 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
2500 18:37:49.869722 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2501 18:37:49.872890 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
2502 18:37:49.876603 iDelay=42, Bit 10, Center 20 (2 ~ 38) 37
2503 18:37:49.879998 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
2504 18:37:49.883180 iDelay=42, Bit 12, Center 21 (3 ~ 39) 37
2505 18:37:49.886513 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2506 18:37:49.889273 iDelay=42, Bit 14, Center 21 (3 ~ 40) 38
2507 18:37:49.895994 iDelay=42, Bit 15, Center 13 (-3 ~ 30) 34
2508 18:37:49.896517 ==
2509 18:37:49.899019 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2510 18:37:49.902575 fsp= 1, odt_onoff= 1, Byte mode= 0
2511 18:37:49.903097 ==
2512 18:37:49.906285 DQS Delay:
2513 18:37:49.906807 DQS0 = 0, DQS1 = 0
2514 18:37:49.907147 DQM Delay:
2515 18:37:49.909292 DQM0 = 20, DQM1 = 18
2516 18:37:49.909860 DQ Delay:
2517 18:37:49.912702 DQ0 =22, DQ1 =20, DQ2 =17, DQ3 =16
2518 18:37:49.915806 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
2519 18:37:49.919212 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2520 18:37:49.922316 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =13
2521 18:37:49.922841
2522 18:37:49.923171
2523 18:37:49.925637 DramC Write-DBI off
2524 18:37:49.926205 ==
2525 18:37:49.928795 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2526 18:37:49.932175 fsp= 1, odt_onoff= 1, Byte mode= 0
2527 18:37:49.935084 ==
2528 18:37:49.938706 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2529 18:37:49.939231
2530 18:37:49.941669 Begin, DQ Scan Range 921~1177
2531 18:37:49.942104
2532 18:37:49.942541
2533 18:37:49.942956 TX Vref Scan disable
2534 18:37:49.945338 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2535 18:37:49.951891 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2536 18:37:49.955040 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2537 18:37:49.958222 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2538 18:37:49.963621 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2539 18:37:49.964794 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2540 18:37:49.968326 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2541 18:37:49.971435 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2542 18:37:49.974570 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2543 18:37:49.978213 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2544 18:37:49.981656 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2545 18:37:49.984745 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2546 18:37:49.987794 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2547 18:37:49.994307 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2548 18:37:49.997807 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2549 18:37:50.000929 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2550 18:37:50.004025 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2551 18:37:50.007615 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2552 18:37:50.010690 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2553 18:37:50.013699 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2554 18:37:50.017337 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2555 18:37:50.020201 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2556 18:37:50.023544 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2557 18:37:50.026945 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2558 18:37:50.030395 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2559 18:37:50.033540 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2560 18:37:50.040078 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2561 18:37:50.043231 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2562 18:37:50.046608 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2563 18:37:50.049981 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2564 18:37:50.053348 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2565 18:37:50.056540 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2566 18:37:50.059880 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2567 18:37:50.062728 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2568 18:37:50.065973 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2569 18:37:50.069479 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2570 18:37:50.073052 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2571 18:37:50.076329 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2572 18:37:50.082788 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2573 18:37:50.085837 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2574 18:37:50.089155 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2575 18:37:50.092443 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2576 18:37:50.095877 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2577 18:37:50.099085 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2578 18:37:50.102313 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2579 18:37:50.105803 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2580 18:37:50.108727 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2581 18:37:50.112053 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2582 18:37:50.115406 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2583 18:37:50.118484 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2584 18:37:50.121824 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2585 18:37:50.124846 972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]
2586 18:37:50.128548 973 |3 6 13|[0] xxxxxxxx oooxxxxo [MSB]
2587 18:37:50.132098 974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]
2588 18:37:50.138260 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2589 18:37:50.141152 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2590 18:37:50.145009 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2591 18:37:50.148147 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2592 18:37:50.151227 979 |3 6 19|[0] xooooxoo oooooooo [MSB]
2593 18:37:50.154608 980 |3 6 20|[0] xooooxoo oooooooo [MSB]
2594 18:37:50.157795 981 |3 6 21|[0] xooooooo oooooooo [MSB]
2595 18:37:50.160974 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2596 18:37:50.164531 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2597 18:37:50.168081 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2598 18:37:50.171083 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2599 18:37:50.177230 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2600 18:37:50.181128 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2601 18:37:50.184234 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2602 18:37:50.187644 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2603 18:37:50.190746 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2604 18:37:50.194213 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2605 18:37:50.197176 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2606 18:37:50.200533 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
2607 18:37:50.204025 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
2608 18:37:50.207038 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
2609 18:37:50.210533 1000 |3 6 40|[0] ooxxooxx xxxxxxxx [MSB]
2610 18:37:50.213705 1001 |3 6 41|[0] oxxxxxxx xxxxxxxx [MSB]
2611 18:37:50.220284 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2612 18:37:50.223313 Byte0, DQ PI dly=989, DQM PI dly= 989
2613 18:37:50.226852 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2614 18:37:50.227382
2615 18:37:50.230080 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2616 18:37:50.230611
2617 18:37:50.233314 Byte1, DQ PI dly=979, DQM PI dly= 979
2618 18:37:50.239599 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2619 18:37:50.240140
2620 18:37:50.243159 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2621 18:37:50.243681
2622 18:37:50.244015 ==
2623 18:37:50.249326 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2624 18:37:50.253078 fsp= 1, odt_onoff= 1, Byte mode= 0
2625 18:37:50.253810 ==
2626 18:37:50.256103 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2627 18:37:50.256525
2628 18:37:50.258924 Begin, DQ Scan Range 955~1019
2629 18:37:50.262024 Write Rank0 MR14 =0x0
2630 18:37:50.269503
2631 18:37:50.269885 CH=1, VrefRange= 0, VrefLevel = 0
2632 18:37:50.276154 TX Bit0 (984~998) 15 991, Bit8 (973~986) 14 979,
2633 18:37:50.279532 TX Bit1 (981~997) 17 989, Bit9 (974~984) 11 979,
2634 18:37:50.286095 TX Bit2 (979~993) 15 986, Bit10 (975~989) 15 982,
2635 18:37:50.288995 TX Bit3 (977~991) 15 984, Bit11 (977~988) 12 982,
2636 18:37:50.292646 TX Bit4 (981~996) 16 988, Bit12 (977~988) 12 982,
2637 18:37:50.299112 TX Bit5 (984~997) 14 990, Bit13 (977~990) 14 983,
2638 18:37:50.302655 TX Bit6 (983~996) 14 989, Bit14 (976~988) 13 982,
2639 18:37:50.309131 TX Bit7 (983~996) 14 989, Bit15 (971~980) 10 975,
2640 18:37:50.309657
2641 18:37:50.309969 Write Rank0 MR14 =0x2
2642 18:37:50.318380
2643 18:37:50.318883 CH=1, VrefRange= 0, VrefLevel = 2
2644 18:37:50.325137 TX Bit0 (983~998) 16 990, Bit8 (973~987) 15 980,
2645 18:37:50.328596 TX Bit1 (982~998) 17 990, Bit9 (973~985) 13 979,
2646 18:37:50.334800 TX Bit2 (979~994) 16 986, Bit10 (975~990) 16 982,
2647 18:37:50.337944 TX Bit3 (977~992) 16 984, Bit11 (977~989) 13 983,
2648 18:37:50.341549 TX Bit4 (981~997) 17 989, Bit12 (976~989) 14 982,
2649 18:37:50.348148 TX Bit5 (984~998) 15 991, Bit13 (977~991) 15 984,
2650 18:37:50.351321 TX Bit6 (982~997) 16 989, Bit14 (977~989) 13 983,
2651 18:37:50.357874 TX Bit7 (983~997) 15 990, Bit15 (971~982) 12 976,
2652 18:37:50.358383
2653 18:37:50.358714 Write Rank0 MR14 =0x4
2654 18:37:50.367189
2655 18:37:50.370115 CH=1, VrefRange= 0, VrefLevel = 4
2656 18:37:50.373584 TX Bit0 (983~998) 16 990, Bit8 (972~988) 17 980,
2657 18:37:50.376814 TX Bit1 (981~998) 18 989, Bit9 (972~985) 14 978,
2658 18:37:50.383224 TX Bit2 (979~996) 18 987, Bit10 (975~990) 16 982,
2659 18:37:50.386932 TX Bit3 (977~992) 16 984, Bit11 (976~990) 15 983,
2660 18:37:50.390095 TX Bit4 (980~998) 19 989, Bit12 (976~990) 15 983,
2661 18:37:50.396819 TX Bit5 (983~998) 16 990, Bit13 (976~991) 16 983,
2662 18:37:50.399601 TX Bit6 (982~997) 16 989, Bit14 (976~990) 15 983,
2663 18:37:50.406062 TX Bit7 (983~997) 15 990, Bit15 (970~983) 14 976,
2664 18:37:50.406582
2665 18:37:50.406913 Write Rank0 MR14 =0x6
2666 18:37:50.416235
2667 18:37:50.416753 CH=1, VrefRange= 0, VrefLevel = 6
2668 18:37:50.422948 TX Bit0 (983~999) 17 991, Bit8 (971~988) 18 979,
2669 18:37:50.426068 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2670 18:37:50.432499 TX Bit2 (978~996) 19 987, Bit10 (975~991) 17 983,
2671 18:37:50.436107 TX Bit3 (977~993) 17 985, Bit11 (976~991) 16 983,
2672 18:37:50.439230 TX Bit4 (980~998) 19 989, Bit12 (975~991) 17 983,
2673 18:37:50.445411 TX Bit5 (983~998) 16 990, Bit13 (976~991) 16 983,
2674 18:37:50.448840 TX Bit6 (981~998) 18 989, Bit14 (976~990) 15 983,
2675 18:37:50.455645 TX Bit7 (982~998) 17 990, Bit15 (970~983) 14 976,
2676 18:37:50.456160
2677 18:37:50.456488 Write Rank0 MR14 =0x8
2678 18:37:50.465093
2679 18:37:50.465630 CH=1, VrefRange= 0, VrefLevel = 8
2680 18:37:50.471670 TX Bit0 (982~999) 18 990, Bit8 (971~989) 19 980,
2681 18:37:50.474813 TX Bit1 (980~999) 20 989, Bit9 (971~986) 16 978,
2682 18:37:50.481504 TX Bit2 (978~997) 20 987, Bit10 (974~991) 18 982,
2683 18:37:50.484636 TX Bit3 (977~994) 18 985, Bit11 (976~991) 16 983,
2684 18:37:50.488114 TX Bit4 (979~999) 21 989, Bit12 (975~991) 17 983,
2685 18:37:50.494357 TX Bit5 (983~999) 17 991, Bit13 (976~992) 17 984,
2686 18:37:50.497775 TX Bit6 (981~998) 18 989, Bit14 (975~991) 17 983,
2687 18:37:50.503879 TX Bit7 (980~998) 19 989, Bit15 (970~984) 15 977,
2688 18:37:50.504303
2689 18:37:50.504628 Write Rank0 MR14 =0xa
2690 18:37:50.513977
2691 18:37:50.517017 CH=1, VrefRange= 0, VrefLevel = 10
2692 18:37:50.520292 TX Bit0 (982~999) 18 990, Bit8 (971~990) 20 980,
2693 18:37:50.523739 TX Bit1 (979~999) 21 989, Bit9 (972~987) 16 979,
2694 18:37:50.530049 TX Bit2 (978~997) 20 987, Bit10 (974~991) 18 982,
2695 18:37:50.533874 TX Bit3 (976~994) 19 985, Bit11 (976~991) 16 983,
2696 18:37:50.537005 TX Bit4 (979~999) 21 989, Bit12 (975~991) 17 983,
2697 18:37:50.543285 TX Bit5 (982~999) 18 990, Bit13 (976~992) 17 984,
2698 18:37:50.546435 TX Bit6 (981~998) 18 989, Bit14 (975~991) 17 983,
2699 18:37:50.552917 TX Bit7 (981~998) 18 989, Bit15 (970~984) 15 977,
2700 18:37:50.553471
2701 18:37:50.553809 Write Rank0 MR14 =0xc
2702 18:37:50.562760
2703 18:37:50.566120 CH=1, VrefRange= 0, VrefLevel = 12
2704 18:37:50.569877 TX Bit0 (982~1000) 19 991, Bit8 (970~990) 21 980,
2705 18:37:50.572894 TX Bit1 (979~999) 21 989, Bit9 (971~987) 17 979,
2706 18:37:50.579494 TX Bit2 (977~998) 22 987, Bit10 (973~992) 20 982,
2707 18:37:50.582711 TX Bit3 (976~995) 20 985, Bit11 (975~992) 18 983,
2708 18:37:50.585666 TX Bit4 (978~999) 22 988, Bit12 (975~992) 18 983,
2709 18:37:50.592601 TX Bit5 (982~999) 18 990, Bit13 (976~992) 17 984,
2710 18:37:50.595753 TX Bit6 (981~999) 19 990, Bit14 (975~991) 17 983,
2711 18:37:50.601905 TX Bit7 (980~999) 20 989, Bit15 (969~984) 16 976,
2712 18:37:50.602290
2713 18:37:50.602590 Write Rank0 MR14 =0xe
2714 18:37:50.612232
2715 18:37:50.615057 CH=1, VrefRange= 0, VrefLevel = 14
2716 18:37:50.618777 TX Bit0 (982~1000) 19 991, Bit8 (970~991) 22 980,
2717 18:37:50.621665 TX Bit1 (979~1000) 22 989, Bit9 (970~988) 19 979,
2718 18:37:50.628233 TX Bit2 (977~998) 22 987, Bit10 (973~992) 20 982,
2719 18:37:50.631507 TX Bit3 (976~995) 20 985, Bit11 (975~992) 18 983,
2720 18:37:50.638176 TX Bit4 (978~1000) 23 989, Bit12 (975~992) 18 983,
2721 18:37:50.641832 TX Bit5 (982~1000) 19 991, Bit13 (975~993) 19 984,
2722 18:37:50.645161 TX Bit6 (981~999) 19 990, Bit14 (975~992) 18 983,
2723 18:37:50.651515 TX Bit7 (981~999) 19 990, Bit15 (969~985) 17 977,
2724 18:37:50.652007
2725 18:37:50.652350 Write Rank0 MR14 =0x10
2726 18:37:50.662130
2727 18:37:50.665080 CH=1, VrefRange= 0, VrefLevel = 16
2728 18:37:50.668543 TX Bit0 (981~1001) 21 991, Bit8 (970~991) 22 980,
2729 18:37:50.672138 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
2730 18:37:50.678644 TX Bit2 (977~998) 22 987, Bit10 (972~992) 21 982,
2731 18:37:50.681964 TX Bit3 (976~996) 21 986, Bit11 (975~992) 18 983,
2732 18:37:50.688617 TX Bit4 (978~1000) 23 989, Bit12 (975~993) 19 984,
2733 18:37:50.691247 TX Bit5 (981~1000) 20 990, Bit13 (975~993) 19 984,
2734 18:37:50.694943 TX Bit6 (980~999) 20 989, Bit14 (974~992) 19 983,
2735 18:37:50.701153 TX Bit7 (980~999) 20 989, Bit15 (969~985) 17 977,
2736 18:37:50.701708
2737 18:37:50.702039 Write Rank0 MR14 =0x12
2738 18:37:50.712005
2739 18:37:50.715026 CH=1, VrefRange= 0, VrefLevel = 18
2740 18:37:50.718295 TX Bit0 (981~1001) 21 991, Bit8 (970~991) 22 980,
2741 18:37:50.721324 TX Bit1 (978~1000) 23 989, Bit9 (970~990) 21 980,
2742 18:37:50.728151 TX Bit2 (977~998) 22 987, Bit10 (972~992) 21 982,
2743 18:37:50.731136 TX Bit3 (975~997) 23 986, Bit11 (974~993) 20 983,
2744 18:37:50.737707 TX Bit4 (978~1000) 23 989, Bit12 (974~993) 20 983,
2745 18:37:50.741075 TX Bit5 (981~1000) 20 990, Bit13 (975~993) 19 984,
2746 18:37:50.744163 TX Bit6 (979~999) 21 989, Bit14 (974~992) 19 983,
2747 18:37:50.750526 TX Bit7 (979~1000) 22 989, Bit15 (968~986) 19 977,
2748 18:37:50.750919
2749 18:37:50.751220 Write Rank0 MR14 =0x14
2750 18:37:50.761183
2751 18:37:50.764340 CH=1, VrefRange= 0, VrefLevel = 20
2752 18:37:50.767878 TX Bit0 (982~1002) 21 992, Bit8 (970~991) 22 980,
2753 18:37:50.770867 TX Bit1 (979~1001) 23 990, Bit9 (970~990) 21 980,
2754 18:37:50.777395 TX Bit2 (977~999) 23 988, Bit10 (972~993) 22 982,
2755 18:37:50.780931 TX Bit3 (975~997) 23 986, Bit11 (974~993) 20 983,
2756 18:37:50.787371 TX Bit4 (977~1001) 25 989, Bit12 (974~993) 20 983,
2757 18:37:50.790774 TX Bit5 (981~1002) 22 991, Bit13 (974~994) 21 984,
2758 18:37:50.794015 TX Bit6 (979~1000) 22 989, Bit14 (974~993) 20 983,
2759 18:37:50.800352 TX Bit7 (979~1000) 22 989, Bit15 (968~986) 19 977,
2760 18:37:50.800704
2761 18:37:50.803806 Write Rank0 MR14 =0x16
2762 18:37:50.811191
2763 18:37:50.814689 CH=1, VrefRange= 0, VrefLevel = 22
2764 18:37:50.817892 TX Bit0 (980~1002) 23 991, Bit8 (969~992) 24 980,
2765 18:37:50.821235 TX Bit1 (978~1001) 24 989, Bit9 (969~991) 23 980,
2766 18:37:50.827695 TX Bit2 (977~999) 23 988, Bit10 (971~994) 24 982,
2767 18:37:50.831065 TX Bit3 (975~998) 24 986, Bit11 (974~994) 21 984,
2768 18:37:50.838062 TX Bit4 (977~1001) 25 989, Bit12 (973~994) 22 983,
2769 18:37:50.840837 TX Bit5 (981~1002) 22 991, Bit13 (974~994) 21 984,
2770 18:37:50.844440 TX Bit6 (979~1000) 22 989, Bit14 (973~994) 22 983,
2771 18:37:50.850891 TX Bit7 (978~1001) 24 989, Bit15 (967~988) 22 977,
2772 18:37:50.851396
2773 18:37:50.851700 Write Rank0 MR14 =0x18
2774 18:37:50.861397
2775 18:37:50.864605 CH=1, VrefRange= 0, VrefLevel = 24
2776 18:37:50.868013 TX Bit0 (980~1003) 24 991, Bit8 (969~992) 24 980,
2777 18:37:50.871458 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
2778 18:37:50.877889 TX Bit2 (976~1000) 25 988, Bit10 (971~994) 24 982,
2779 18:37:50.881339 TX Bit3 (975~998) 24 986, Bit11 (973~994) 22 983,
2780 18:37:50.888096 TX Bit4 (977~1001) 25 989, Bit12 (973~994) 22 983,
2781 18:37:50.891045 TX Bit5 (979~1002) 24 990, Bit13 (974~995) 22 984,
2782 18:37:50.894601 TX Bit6 (978~1001) 24 989, Bit14 (973~993) 21 983,
2783 18:37:50.901078 TX Bit7 (978~1001) 24 989, Bit15 (968~988) 21 978,
2784 18:37:50.901537
2785 18:37:50.901843 Write Rank0 MR14 =0x1a
2786 18:37:50.912372
2787 18:37:50.915667 CH=1, VrefRange= 0, VrefLevel = 26
2788 18:37:50.918629 TX Bit0 (979~1003) 25 991, Bit8 (969~992) 24 980,
2789 18:37:50.921768 TX Bit1 (977~1002) 26 989, Bit9 (969~991) 23 980,
2790 18:37:50.928549 TX Bit2 (976~1000) 25 988, Bit10 (971~994) 24 982,
2791 18:37:50.931678 TX Bit3 (974~998) 25 986, Bit11 (973~995) 23 984,
2792 18:37:50.938438 TX Bit4 (977~1002) 26 989, Bit12 (972~995) 24 983,
2793 18:37:50.941806 TX Bit5 (979~1003) 25 991, Bit13 (974~995) 22 984,
2794 18:37:50.945105 TX Bit6 (978~1001) 24 989, Bit14 (973~994) 22 983,
2795 18:37:50.951814 TX Bit7 (978~1001) 24 989, Bit15 (968~989) 22 978,
2796 18:37:50.952332
2797 18:37:50.952665 Write Rank0 MR14 =0x1c
2798 18:37:50.962371
2799 18:37:50.965942 CH=1, VrefRange= 0, VrefLevel = 28
2800 18:37:50.969100 TX Bit0 (979~1004) 26 991, Bit8 (969~992) 24 980,
2801 18:37:50.972573 TX Bit1 (977~1002) 26 989, Bit9 (969~991) 23 980,
2802 18:37:50.979027 TX Bit2 (976~1000) 25 988, Bit10 (971~995) 25 983,
2803 18:37:50.981891 TX Bit3 (974~999) 26 986, Bit11 (972~995) 24 983,
2804 18:37:50.988750 TX Bit4 (977~1003) 27 990, Bit12 (972~995) 24 983,
2805 18:37:50.991611 TX Bit5 (979~1003) 25 991, Bit13 (973~995) 23 984,
2806 18:37:50.995265 TX Bit6 (978~1002) 25 990, Bit14 (972~994) 23 983,
2807 18:37:51.001953 TX Bit7 (978~1002) 25 990, Bit15 (967~990) 24 978,
2808 18:37:51.002477
2809 18:37:51.004626 Write Rank0 MR14 =0x1e
2810 18:37:51.013574
2811 18:37:51.016558 CH=1, VrefRange= 0, VrefLevel = 30
2812 18:37:51.020163 TX Bit0 (979~1005) 27 992, Bit8 (969~992) 24 980,
2813 18:37:51.022876 TX Bit1 (977~1003) 27 990, Bit9 (969~991) 23 980,
2814 18:37:51.029264 TX Bit2 (976~1000) 25 988, Bit10 (971~995) 25 983,
2815 18:37:51.032655 TX Bit3 (974~999) 26 986, Bit11 (972~996) 25 984,
2816 18:37:51.039657 TX Bit4 (978~1002) 25 990, Bit12 (972~994) 23 983,
2817 18:37:51.042560 TX Bit5 (978~1004) 27 991, Bit13 (972~995) 24 983,
2818 18:37:51.045848 TX Bit6 (978~1003) 26 990, Bit14 (971~994) 24 982,
2819 18:37:51.052905 TX Bit7 (978~1002) 25 990, Bit15 (967~990) 24 978,
2820 18:37:51.053479
2821 18:37:51.053824 Write Rank0 MR14 =0x20
2822 18:37:51.063636
2823 18:37:51.067365 CH=1, VrefRange= 0, VrefLevel = 32
2824 18:37:51.070134 TX Bit0 (978~1004) 27 991, Bit8 (969~992) 24 980,
2825 18:37:51.073809 TX Bit1 (978~1003) 26 990, Bit9 (968~991) 24 979,
2826 18:37:51.079618 TX Bit2 (976~1001) 26 988, Bit10 (971~995) 25 983,
2827 18:37:51.083704 TX Bit3 (975~998) 24 986, Bit11 (972~995) 24 983,
2828 18:37:51.089979 TX Bit4 (978~1002) 25 990, Bit12 (971~994) 24 982,
2829 18:37:51.093099 TX Bit5 (978~1004) 27 991, Bit13 (972~995) 24 983,
2830 18:37:51.096194 TX Bit6 (977~1003) 27 990, Bit14 (971~994) 24 982,
2831 18:37:51.103080 TX Bit7 (977~1002) 26 989, Bit15 (966~990) 25 978,
2832 18:37:51.103594
2833 18:37:51.103919 Write Rank0 MR14 =0x22
2834 18:37:51.114384
2835 18:37:51.117073 CH=1, VrefRange= 0, VrefLevel = 34
2836 18:37:51.120951 TX Bit0 (978~1004) 27 991, Bit8 (969~992) 24 980,
2837 18:37:51.124414 TX Bit1 (978~1003) 26 990, Bit9 (968~991) 24 979,
2838 18:37:51.130945 TX Bit2 (976~1001) 26 988, Bit10 (971~995) 25 983,
2839 18:37:51.133880 TX Bit3 (975~998) 24 986, Bit11 (972~995) 24 983,
2840 18:37:51.140605 TX Bit4 (978~1002) 25 990, Bit12 (971~994) 24 982,
2841 18:37:51.144185 TX Bit5 (978~1004) 27 991, Bit13 (972~995) 24 983,
2842 18:37:51.147073 TX Bit6 (977~1003) 27 990, Bit14 (971~994) 24 982,
2843 18:37:51.153710 TX Bit7 (977~1002) 26 989, Bit15 (966~990) 25 978,
2844 18:37:51.154243
2845 18:37:51.154574 Write Rank0 MR14 =0x24
2846 18:37:51.164758
2847 18:37:51.168265 CH=1, VrefRange= 0, VrefLevel = 36
2848 18:37:51.171073 TX Bit0 (978~1004) 27 991, Bit8 (969~992) 24 980,
2849 18:37:51.174841 TX Bit1 (978~1003) 26 990, Bit9 (968~991) 24 979,
2850 18:37:51.181261 TX Bit2 (976~1001) 26 988, Bit10 (971~995) 25 983,
2851 18:37:51.184020 TX Bit3 (975~998) 24 986, Bit11 (972~995) 24 983,
2852 18:37:51.190869 TX Bit4 (978~1002) 25 990, Bit12 (971~994) 24 982,
2853 18:37:51.194078 TX Bit5 (978~1004) 27 991, Bit13 (972~995) 24 983,
2854 18:37:51.197761 TX Bit6 (977~1003) 27 990, Bit14 (971~994) 24 982,
2855 18:37:51.204322 TX Bit7 (977~1002) 26 989, Bit15 (966~990) 25 978,
2856 18:37:51.204826
2857 18:37:51.206924 Write Rank0 MR14 =0x26
2858 18:37:51.215278
2859 18:37:51.218709 CH=1, VrefRange= 0, VrefLevel = 38
2860 18:37:51.221830 TX Bit0 (978~1004) 27 991, Bit8 (969~992) 24 980,
2861 18:37:51.225044 TX Bit1 (978~1003) 26 990, Bit9 (968~991) 24 979,
2862 18:37:51.231243 TX Bit2 (976~1001) 26 988, Bit10 (971~995) 25 983,
2863 18:37:51.234970 TX Bit3 (975~998) 24 986, Bit11 (972~995) 24 983,
2864 18:37:51.241364 TX Bit4 (978~1002) 25 990, Bit12 (971~994) 24 982,
2865 18:37:51.245005 TX Bit5 (978~1004) 27 991, Bit13 (972~995) 24 983,
2866 18:37:51.248158 TX Bit6 (977~1003) 27 990, Bit14 (971~994) 24 982,
2867 18:37:51.254286 TX Bit7 (977~1002) 26 989, Bit15 (966~990) 25 978,
2868 18:37:51.254807
2869 18:37:51.255134
2870 18:37:51.257825 TX Vref found, early break! 374< 381
2871 18:37:51.260868 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2872 18:37:51.264245 u1DelayCellOfst[0]=6 cells (5 PI)
2873 18:37:51.267541 u1DelayCellOfst[1]=5 cells (4 PI)
2874 18:37:51.270749 u1DelayCellOfst[2]=2 cells (2 PI)
2875 18:37:51.273971 u1DelayCellOfst[3]=0 cells (0 PI)
2876 18:37:51.277128 u1DelayCellOfst[4]=5 cells (4 PI)
2877 18:37:51.280568 u1DelayCellOfst[5]=6 cells (5 PI)
2878 18:37:51.283671 u1DelayCellOfst[6]=5 cells (4 PI)
2879 18:37:51.286919 u1DelayCellOfst[7]=3 cells (3 PI)
2880 18:37:51.290142 Byte0, DQ PI dly=986, DQM PI dly= 988
2881 18:37:51.293327 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2882 18:37:51.293757
2883 18:37:51.296673 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2884 18:37:51.300506
2885 18:37:51.301002 u1DelayCellOfst[8]=2 cells (2 PI)
2886 18:37:51.303506 u1DelayCellOfst[9]=1 cells (1 PI)
2887 18:37:51.306308 u1DelayCellOfst[10]=6 cells (5 PI)
2888 18:37:51.309717 u1DelayCellOfst[11]=6 cells (5 PI)
2889 18:37:51.313122 u1DelayCellOfst[12]=5 cells (4 PI)
2890 18:37:51.316690 u1DelayCellOfst[13]=6 cells (5 PI)
2891 18:37:51.319546 u1DelayCellOfst[14]=5 cells (4 PI)
2892 18:37:51.323013 u1DelayCellOfst[15]=0 cells (0 PI)
2893 18:37:51.326202 Byte1, DQ PI dly=978, DQM PI dly= 980
2894 18:37:51.329457 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2895 18:37:51.329849
2896 18:37:51.336297 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2897 18:37:51.336801
2898 18:37:51.337110 Write Rank0 MR14 =0x20
2899 18:37:51.337398
2900 18:37:51.339040 Final TX Range 0 Vref 32
2901 18:37:51.339433
2902 18:37:51.345789 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2903 18:37:51.346176
2904 18:37:51.352172 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2905 18:37:51.358823 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2906 18:37:51.368891 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2907 18:37:51.369382 Write Rank0 MR3 =0xb0
2908 18:37:51.372302 DramC Write-DBI on
2909 18:37:51.372811 ==
2910 18:37:51.375810 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2911 18:37:51.378677 fsp= 1, odt_onoff= 1, Byte mode= 0
2912 18:37:51.379069 ==
2913 18:37:51.385283 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2914 18:37:51.385795
2915 18:37:51.386103 Begin, DQ Scan Range 700~764
2916 18:37:51.386392
2917 18:37:51.388328
2918 18:37:51.388712 TX Vref Scan disable
2919 18:37:51.391782 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2920 18:37:51.394774 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2921 18:37:51.398527 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2922 18:37:51.401471 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2923 18:37:51.408436 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2924 18:37:51.411696 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2925 18:37:51.414830 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2926 18:37:51.417903 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2927 18:37:51.421595 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2928 18:37:51.424865 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2929 18:37:51.428161 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2930 18:37:51.431286 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2931 18:37:51.434406 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2932 18:37:51.438118 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2933 18:37:51.441002 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2934 18:37:51.444352 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2935 18:37:51.447696 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2936 18:37:51.450578 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2937 18:37:51.454351 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2938 18:37:51.457314 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2939 18:37:51.463819 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2940 18:37:51.467161 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2941 18:37:51.470305 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2942 18:37:51.476904 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2943 18:37:51.480002 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2944 18:37:51.483077 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2945 18:37:51.486712 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2946 18:37:51.489992 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2947 18:37:51.493018 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2948 18:37:51.496206 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2949 18:37:51.499957 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2950 18:37:51.502700 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2951 18:37:51.506351 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2952 18:37:51.509495 749 |2 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
2953 18:37:51.513034 Byte0, DQ PI dly=734, DQM PI dly= 734
2954 18:37:51.519265 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
2955 18:37:51.519811
2956 18:37:51.522405 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
2957 18:37:51.522924
2958 18:37:51.526042 Byte1, DQ PI dly=724, DQM PI dly= 724
2959 18:37:51.532657 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2960 18:37:51.533182
2961 18:37:51.536009 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2962 18:37:51.536527
2963 18:37:51.542077 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2964 18:37:51.548677 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2965 18:37:51.554920 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2966 18:37:51.558595 Write Rank0 MR3 =0x30
2967 18:37:51.559115 DramC Write-DBI off
2968 18:37:51.559453
2969 18:37:51.562036 [DATLAT]
2970 18:37:51.565016 Freq=1600, CH1 RK0, use_rxtx_scan=0
2971 18:37:51.565715
2972 18:37:51.566223 DATLAT Default: 0xf
2973 18:37:51.568640 7, 0xFFFF, sum=0
2974 18:37:51.569167 8, 0xFFFF, sum=0
2975 18:37:51.571456 9, 0xFFFF, sum=0
2976 18:37:51.571886 10, 0xFFFF, sum=0
2977 18:37:51.575288 11, 0xFFFF, sum=0
2978 18:37:51.575812 12, 0xFFFF, sum=0
2979 18:37:51.578094 13, 0xFFFF, sum=0
2980 18:37:51.578522 14, 0x0, sum=1
2981 18:37:51.581481 15, 0x0, sum=2
2982 18:37:51.582016 16, 0x0, sum=3
2983 18:37:51.582356 17, 0x0, sum=4
2984 18:37:51.588296 pattern=2 first_step=14 total pass=5 best_step=16
2985 18:37:51.588821 ==
2986 18:37:51.591131 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2987 18:37:51.594375 fsp= 1, odt_onoff= 1, Byte mode= 0
2988 18:37:51.594809 ==
2989 18:37:51.601181 Start DQ dly to find pass range UseTestEngine =1
2990 18:37:51.604358 x-axis: bit #, y-axis: DQ dly (-127~63)
2991 18:37:51.604849 RX Vref Scan = 1
2992 18:37:51.712448
2993 18:37:51.712969 RX Vref found, early break!
2994 18:37:51.713311
2995 18:37:51.719120 Final RX Vref 11, apply to both rank0 and 1
2996 18:37:51.719649 ==
2997 18:37:51.722299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2998 18:37:51.725582 fsp= 1, odt_onoff= 1, Byte mode= 0
2999 18:37:51.726103 ==
3000 18:37:51.728871 DQS Delay:
3001 18:37:51.729389 DQS0 = 0, DQS1 = 0
3002 18:37:51.729783 DQM Delay:
3003 18:37:51.732395 DQM0 = 20, DQM1 = 18
3004 18:37:51.732918 DQ Delay:
3005 18:37:51.735426 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3006 18:37:51.738994 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3007 18:37:51.741710 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
3008 18:37:51.745470 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =13
3009 18:37:51.746006
3010 18:37:51.746340
3011 18:37:51.746644
3012 18:37:51.748519 [DramC_TX_OE_Calibration] TA2
3013 18:37:51.751632 Original DQ_B0 (3 6) =30, OEN = 27
3014 18:37:51.754840 Original DQ_B1 (3 6) =30, OEN = 27
3015 18:37:51.758353 23, 0x0, End_B0=23 End_B1=23
3016 18:37:51.761417 24, 0x0, End_B0=24 End_B1=24
3017 18:37:51.761875 25, 0x0, End_B0=25 End_B1=25
3018 18:37:51.764760 26, 0x0, End_B0=26 End_B1=26
3019 18:37:51.768139 27, 0x0, End_B0=27 End_B1=27
3020 18:37:51.771580 28, 0x0, End_B0=28 End_B1=28
3021 18:37:51.774293 29, 0x0, End_B0=29 End_B1=29
3022 18:37:51.774741 30, 0x0, End_B0=30 End_B1=30
3023 18:37:51.777890 31, 0xFFFF, End_B0=30 End_B1=30
3024 18:37:51.784917 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3025 18:37:51.791254 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3026 18:37:51.791768
3027 18:37:51.792099
3028 18:37:51.792404 Write Rank0 MR23 =0x3f
3029 18:37:51.794241 [DQSOSC]
3030 18:37:51.801286 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3031 18:37:51.807618 CH1_RK0: MR19=0x202, MR18=0xB6B6, DQSOSC=453, MR23=63, INC=11, DEC=17
3032 18:37:51.810730 Write Rank0 MR23 =0x3f
3033 18:37:51.811240 [DQSOSC]
3034 18:37:51.817264 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3035 18:37:51.820889 CH1 RK0: MR19=202, MR18=B6B6
3036 18:37:51.823945 [RankSwap] Rank num 2, (Multi 1), Rank 1
3037 18:37:51.827446 Write Rank0 MR2 =0xad
3038 18:37:51.827961 [Write Leveling]
3039 18:37:51.830351 delay byte0 byte1 byte2 byte3
3040 18:37:51.830873
3041 18:37:51.833537 10 0 0
3042 18:37:51.834061 11 0 0
3043 18:37:51.836892 12 0 0
3044 18:37:51.837419 13 0 0
3045 18:37:51.837817 14 0 0
3046 18:37:51.840215 15 0 0
3047 18:37:51.840739 16 0 0
3048 18:37:51.843506 17 0 0
3049 18:37:51.844040 18 0 0
3050 18:37:51.844380 19 0 0
3051 18:37:51.847104 20 0 0
3052 18:37:51.847635 21 0 0
3053 18:37:51.849910 22 0 0
3054 18:37:51.850340 23 0 0
3055 18:37:51.853128 24 0 0
3056 18:37:51.853609 25 0 0
3057 18:37:51.853956 26 0 0
3058 18:37:51.856197 27 0 0
3059 18:37:51.856646 28 0 ff
3060 18:37:51.860067 29 0 ff
3061 18:37:51.860589 30 0 ff
3062 18:37:51.862826 31 0 ff
3063 18:37:51.863251 32 0 ff
3064 18:37:51.866120 33 0 ff
3065 18:37:51.866506 34 ff ff
3066 18:37:51.869284 35 ff ff
3067 18:37:51.869703 36 0 ff
3068 18:37:51.870018 37 ff ff
3069 18:37:51.872791 38 ff ff
3070 18:37:51.873279 39 ff ff
3071 18:37:51.876244 40 ff ff
3072 18:37:51.876750 41 ff ff
3073 18:37:51.879292 42 ff ff
3074 18:37:51.879679 43 ff ff
3075 18:37:51.885555 pass bytecount = 0xff (0xff: all bytes pass)
3076 18:37:51.886023
3077 18:37:51.886328 DQS0 dly: 37
3078 18:37:51.886609 DQS1 dly: 28
3079 18:37:51.888856 Write Rank0 MR2 =0x2d
3080 18:37:51.892581 [RankSwap] Rank num 2, (Multi 1), Rank 0
3081 18:37:51.895687 Write Rank1 MR1 =0xd6
3082 18:37:51.896165 [Gating]
3083 18:37:51.896472 ==
3084 18:37:51.902225 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3085 18:37:51.902723 fsp= 1, odt_onoff= 1, Byte mode= 0
3086 18:37:51.905464 ==
3087 18:37:51.908975 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3088 18:37:51.912035 3 1 4 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3089 18:37:51.915172 3 1 8 |2c2b 3636 |(11 11)(0 0) |(1 1)(0 0)| 0
3090 18:37:51.921568 3 1 12 |2c2b 3635 |(11 11)(11 11) |(0 0)(0 0)| 0
3091 18:37:51.925174 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3092 18:37:51.928440 3 1 20 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3093 18:37:51.934986 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3094 18:37:51.938116 3 1 28 |2c2b 3535 |(11 11)(0 0) |(1 0)(1 1)| 0
3095 18:37:51.941403 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3096 18:37:51.947682 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3097 18:37:51.950925 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3098 18:37:51.954189 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3099 18:37:51.960964 3 2 16 |2c2c 3534 |(11 10)(11 11) |(1 0)(0 1)| 0
3100 18:37:51.964192 3 2 20 |302 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3101 18:37:51.967522 3 2 24 |3534 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
3102 18:37:51.973981 3 2 28 |3534 2121 |(11 11)(11 11) |(0 0)(1 1)| 0
3103 18:37:51.977306 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3104 18:37:51.980417 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3105 18:37:51.986791 3 3 8 |3534 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
3106 18:37:51.990446 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3107 18:37:51.993315 3 3 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 18:37:52.000715 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3109 18:37:52.003700 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3110 18:37:52.006940 3 3 24 |3534 3d3d |(11 11)(0 0) |(0 1)(1 1)| 0
3111 18:37:52.009605 3 3 28 |3534 0 |(11 11)(11 11) |(0 1)(1 1)| 0
3112 18:37:52.016490 3 4 0 |3534 201f |(11 11)(11 11) |(0 1)(1 1)| 0
3113 18:37:52.019594 [Byte 1] Lead/lag falling Transition (3, 4, 0)
3114 18:37:52.023194 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3115 18:37:52.029615 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3116 18:37:52.032830 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3117 18:37:52.036122 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3118 18:37:52.042417 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3119 18:37:52.045941 3 4 24 |3d3d b0b |(11 11)(11 11) |(1 1)(1 1)| 0
3120 18:37:52.049339 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3121 18:37:52.055527 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3122 18:37:52.059144 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3123 18:37:52.061987 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3124 18:37:52.068686 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3125 18:37:52.072020 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3126 18:37:52.075371 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3127 18:37:52.081901 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3128 18:37:52.085030 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3129 18:37:52.088161 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3130 18:37:52.094811 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3131 18:37:52.097971 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3132 18:37:52.101407 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3133 18:37:52.108313 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3134 18:37:52.111190 [Byte 0] Lead/lag Transition tap number (2)
3135 18:37:52.114936 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3136 18:37:52.117950 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3137 18:37:52.124717 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3138 18:37:52.127737 [Byte 1] Lead/lag Transition tap number (3)
3139 18:37:52.131044 3 6 24 |4646 3e3d |(10 10)(11 11) |(0 0)(0 0)| 0
3140 18:37:52.137616 3 6 28 |4646 1212 |(0 0)(11 11) |(0 0)(0 0)| 0
3141 18:37:52.138111 [Byte 0]First pass (3, 6, 28)
3142 18:37:52.144607 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3143 18:37:52.145119 [Byte 1]First pass (3, 7, 0)
3144 18:37:52.150501 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3145 18:37:52.153875 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3146 18:37:52.156855 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3147 18:37:52.160597 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3148 18:37:52.164033 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3149 18:37:52.170203 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3150 18:37:52.173555 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3151 18:37:52.176658 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3152 18:37:52.179888 All bytes gating window > 1UI, Early break!
3153 18:37:52.180276
3154 18:37:52.186306 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3155 18:37:52.186791
3156 18:37:52.189584 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
3157 18:37:52.189974
3158 18:37:52.190278
3159 18:37:52.190559
3160 18:37:52.192939 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3161 18:37:52.193334
3162 18:37:52.196301 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
3163 18:37:52.196688
3164 18:37:52.196992
3165 18:37:52.199674 Write Rank1 MR1 =0x56
3166 18:37:52.200171
3167 18:37:52.202920 best RODT dly(2T, 0.5T) = (2, 3)
3168 18:37:52.203310
3169 18:37:52.206191 best RODT dly(2T, 0.5T) = (2, 3)
3170 18:37:52.206576 ==
3171 18:37:52.209678 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3172 18:37:52.212714 fsp= 1, odt_onoff= 1, Byte mode= 0
3173 18:37:52.215860 ==
3174 18:37:52.219291 Start DQ dly to find pass range UseTestEngine =0
3175 18:37:52.222480 x-axis: bit #, y-axis: DQ dly (-127~63)
3176 18:37:52.222874 RX Vref Scan = 0
3177 18:37:52.225775 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3178 18:37:52.229046 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3179 18:37:52.232436 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3180 18:37:52.235355 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3181 18:37:52.239109 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3182 18:37:52.242602 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3183 18:37:52.245954 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3184 18:37:52.248648 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3185 18:37:52.249044 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3186 18:37:52.251841 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3187 18:37:52.255275 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3188 18:37:52.258501 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3189 18:37:52.261565 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3190 18:37:52.265000 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3191 18:37:52.268388 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3192 18:37:52.271769 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3193 18:37:52.274951 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3194 18:37:52.275474 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3195 18:37:52.278267 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3196 18:37:52.281353 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3197 18:37:52.284599 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3198 18:37:52.288371 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3199 18:37:52.291515 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3200 18:37:52.294428 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3201 18:37:52.297858 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3202 18:37:52.298246 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3203 18:37:52.300923 0, [0] xxxoxxxx ooxxxxxo [MSB]
3204 18:37:52.304171 1, [0] xxxoxxxx ooxxxxxo [MSB]
3205 18:37:52.307494 2, [0] xxxoxxxx ooxxxxxo [MSB]
3206 18:37:52.310757 3, [0] xxooxxxo oooxoxxo [MSB]
3207 18:37:52.314059 4, [0] xxooxxxo oooxoxxo [MSB]
3208 18:37:52.314413 6, [0] oooooxoo oooooooo [MSB]
3209 18:37:52.317348 32, [0] oooooooo ooooooox [MSB]
3210 18:37:52.320701 33, [0] oooooooo ooooooox [MSB]
3211 18:37:52.324060 34, [0] oooooooo oxooooox [MSB]
3212 18:37:52.327405 35, [0] ooxxoooo oxooooox [MSB]
3213 18:37:52.330594 36, [0] ooxxoooo xxooooox [MSB]
3214 18:37:52.334018 37, [0] ooxxoooo xxooooox [MSB]
3215 18:37:52.337014 38, [0] ooxxoooo xxooooox [MSB]
3216 18:37:52.337396 39, [0] oxxxooox xxooooox [MSB]
3217 18:37:52.340510 40, [0] oxxxooox xxxxooox [MSB]
3218 18:37:52.343988 41, [0] xxxxxoxx xxxxxoox [MSB]
3219 18:37:52.347071 42, [0] xxxxxoxx xxxxxxxx [MSB]
3220 18:37:52.350060 43, [0] xxxxxxxx xxxxxxxx [MSB]
3221 18:37:52.353455 iDelay=43, Bit 0, Center 22 (5 ~ 40) 36
3222 18:37:52.356646 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
3223 18:37:52.360086 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3224 18:37:52.363401 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
3225 18:37:52.366339 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
3226 18:37:52.370090 iDelay=43, Bit 5, Center 24 (7 ~ 42) 36
3227 18:37:52.373280 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3228 18:37:52.379957 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3229 18:37:52.383049 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
3230 18:37:52.386192 iDelay=43, Bit 9, Center 15 (-2 ~ 33) 36
3231 18:37:52.389503 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3232 18:37:52.393292 iDelay=43, Bit 11, Center 22 (5 ~ 39) 35
3233 18:37:52.396370 iDelay=43, Bit 12, Center 21 (3 ~ 40) 38
3234 18:37:52.399457 iDelay=43, Bit 13, Center 23 (5 ~ 41) 37
3235 18:37:52.402613 iDelay=43, Bit 14, Center 23 (5 ~ 41) 37
3236 18:37:52.405632 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3237 18:37:52.409634 ==
3238 18:37:52.412602 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3239 18:37:52.416013 fsp= 1, odt_onoff= 1, Byte mode= 0
3240 18:37:52.416535 ==
3241 18:37:52.416868 DQS Delay:
3242 18:37:52.419095 DQS0 = 0, DQS1 = 0
3243 18:37:52.419517 DQM Delay:
3244 18:37:52.422358 DQM0 = 20, DQM1 = 19
3245 18:37:52.422784 DQ Delay:
3246 18:37:52.425553 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3247 18:37:52.428674 DQ4 =22, DQ5 =24, DQ6 =22, DQ7 =20
3248 18:37:52.432338 DQ8 =17, DQ9 =15, DQ10 =21, DQ11 =22
3249 18:37:52.435257 DQ12 =21, DQ13 =23, DQ14 =23, DQ15 =13
3250 18:37:52.435739
3251 18:37:52.436040
3252 18:37:52.438467 DramC Write-DBI off
3253 18:37:52.438997 ==
3254 18:37:52.442064 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3255 18:37:52.445322 fsp= 1, odt_onoff= 1, Byte mode= 0
3256 18:37:52.445842 ==
3257 18:37:52.451901 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3258 18:37:52.452383
3259 18:37:52.455317 Begin, DQ Scan Range 924~1180
3260 18:37:52.455816
3261 18:37:52.456122
3262 18:37:52.456398 TX Vref Scan disable
3263 18:37:52.458508 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3264 18:37:52.461811 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3265 18:37:52.464762 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3266 18:37:52.471706 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3267 18:37:52.474970 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3268 18:37:52.477863 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3269 18:37:52.481134 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3270 18:37:52.484802 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3271 18:37:52.488168 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3272 18:37:52.491275 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3273 18:37:52.494573 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3274 18:37:52.498033 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3275 18:37:52.501534 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3276 18:37:52.504293 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3277 18:37:52.507403 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3278 18:37:52.511141 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3279 18:37:52.517792 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3280 18:37:52.520698 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3281 18:37:52.524185 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3282 18:37:52.527438 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3283 18:37:52.530245 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3284 18:37:52.533702 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3285 18:37:52.537321 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3286 18:37:52.539983 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3287 18:37:52.543413 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3288 18:37:52.546715 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3289 18:37:52.550000 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3290 18:37:52.553261 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3291 18:37:52.559836 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3292 18:37:52.563201 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3293 18:37:52.566307 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3294 18:37:52.569566 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3295 18:37:52.572974 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3296 18:37:52.575849 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3297 18:37:52.579276 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3298 18:37:52.582595 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3299 18:37:52.585886 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3300 18:37:52.589322 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3301 18:37:52.592781 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3302 18:37:52.596361 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3303 18:37:52.599070 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3304 18:37:52.602155 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3305 18:37:52.605518 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3306 18:37:52.612239 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3307 18:37:52.615785 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3308 18:37:52.618819 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3309 18:37:52.622361 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3310 18:37:52.625647 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3311 18:37:52.629155 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3312 18:37:52.631944 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3313 18:37:52.635315 974 |3 6 14|[0] xxxxxxxx xoxxxxxo [MSB]
3314 18:37:52.638555 975 |3 6 15|[0] xxxxxxxx oooxxxxo [MSB]
3315 18:37:52.641352 976 |3 6 16|[0] xxxxxxxx oooxxxoo [MSB]
3316 18:37:52.645129 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3317 18:37:52.648188 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3318 18:37:52.651725 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3319 18:37:52.654534 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3320 18:37:52.661122 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3321 18:37:52.664440 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3322 18:37:52.667874 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
3323 18:37:52.671089 984 |3 6 24|[0] xooooxoo oooooooo [MSB]
3324 18:37:52.674968 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3325 18:37:52.677597 992 |3 6 32|[0] oooooooo oxooooox [MSB]
3326 18:37:52.680805 993 |3 6 33|[0] oooooooo xxooooox [MSB]
3327 18:37:52.684097 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3328 18:37:52.687429 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3329 18:37:52.694062 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3330 18:37:52.697681 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3331 18:37:52.701001 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3332 18:37:52.703676 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3333 18:37:52.707478 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
3334 18:37:52.710495 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3335 18:37:52.713976 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3336 18:37:52.717207 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
3337 18:37:52.720694 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
3338 18:37:52.723773 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
3339 18:37:52.730296 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3340 18:37:52.733814 Byte0, DQ PI dly=993, DQM PI dly= 993
3341 18:37:52.736751 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
3342 18:37:52.737276
3343 18:37:52.740151 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
3344 18:37:52.740692
3345 18:37:52.743525 Byte1, DQ PI dly=983, DQM PI dly= 983
3346 18:37:52.749756 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3347 18:37:52.750259
3348 18:37:52.753080 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3349 18:37:52.753654
3350 18:37:52.754013 ==
3351 18:37:52.759407 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3352 18:37:52.762887 fsp= 1, odt_onoff= 1, Byte mode= 0
3353 18:37:52.763311 ==
3354 18:37:52.766110 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3355 18:37:52.766634
3356 18:37:52.769124 Begin, DQ Scan Range 959~1023
3357 18:37:52.772246 Write Rank1 MR14 =0x0
3358 18:37:52.779896
3359 18:37:52.780430 CH=1, VrefRange= 0, VrefLevel = 0
3360 18:37:52.786659 TX Bit0 (986~1004) 19 995, Bit8 (978~987) 10 982,
3361 18:37:52.789606 TX Bit1 (985~1000) 16 992, Bit9 (976~987) 12 981,
3362 18:37:52.796429 TX Bit2 (984~998) 15 991, Bit10 (978~993) 16 985,
3363 18:37:52.799468 TX Bit3 (983~996) 14 989, Bit11 (979~992) 14 985,
3364 18:37:52.803015 TX Bit4 (986~1001) 16 993, Bit12 (981~990) 10 985,
3365 18:37:52.809376 TX Bit5 (986~1003) 18 994, Bit13 (980~993) 14 986,
3366 18:37:52.812386 TX Bit6 (986~1000) 15 993, Bit14 (979~991) 13 985,
3367 18:37:52.819566 TX Bit7 (986~999) 14 992, Bit15 (974~984) 11 979,
3368 18:37:52.820066
3369 18:37:52.820429 Write Rank1 MR14 =0x2
3370 18:37:52.829829
3371 18:37:52.833023 CH=1, VrefRange= 0, VrefLevel = 2
3372 18:37:52.836334 TX Bit0 (986~1005) 20 995, Bit8 (977~988) 12 982,
3373 18:37:52.839367 TX Bit1 (985~1001) 17 993, Bit9 (976~988) 13 982,
3374 18:37:52.846029 TX Bit2 (984~999) 16 991, Bit10 (977~993) 17 985,
3375 18:37:52.849262 TX Bit3 (982~996) 15 989, Bit11 (978~993) 16 985,
3376 18:37:52.856039 TX Bit4 (985~1002) 18 993, Bit12 (979~991) 13 985,
3377 18:37:52.859012 TX Bit5 (986~1004) 19 995, Bit13 (979~993) 15 986,
3378 18:37:52.862367 TX Bit6 (985~1001) 17 993, Bit14 (978~991) 14 984,
3379 18:37:52.868986 TX Bit7 (985~1000) 16 992, Bit15 (973~985) 13 979,
3380 18:37:52.869571
3381 18:37:52.869914 Write Rank1 MR14 =0x4
3382 18:37:52.879455
3383 18:37:52.880007 CH=1, VrefRange= 0, VrefLevel = 4
3384 18:37:52.886273 TX Bit0 (986~1005) 20 995, Bit8 (977~990) 14 983,
3385 18:37:52.889232 TX Bit1 (985~1002) 18 993, Bit9 (976~989) 14 982,
3386 18:37:52.895549 TX Bit2 (984~999) 16 991, Bit10 (977~994) 18 985,
3387 18:37:52.898857 TX Bit3 (982~997) 16 989, Bit11 (978~993) 16 985,
3388 18:37:52.902401 TX Bit4 (985~1002) 18 993, Bit12 (978~991) 14 984,
3389 18:37:52.909132 TX Bit5 (986~1004) 19 995, Bit13 (979~994) 16 986,
3390 18:37:52.912396 TX Bit6 (985~1002) 18 993, Bit14 (978~992) 15 985,
3391 18:37:52.918552 TX Bit7 (985~1000) 16 992, Bit15 (972~986) 15 979,
3392 18:37:52.919063
3393 18:37:52.919393 Write Rank1 MR14 =0x6
3394 18:37:52.929376
3395 18:37:52.929929 CH=1, VrefRange= 0, VrefLevel = 6
3396 18:37:52.936115 TX Bit0 (986~1005) 20 995, Bit8 (976~990) 15 983,
3397 18:37:52.939108 TX Bit1 (985~1003) 19 994, Bit9 (975~989) 15 982,
3398 18:37:52.945845 TX Bit2 (984~1001) 18 992, Bit10 (977~995) 19 986,
3399 18:37:52.949172 TX Bit3 (982~997) 16 989, Bit11 (978~994) 17 986,
3400 18:37:52.955246 TX Bit4 (984~1003) 20 993, Bit12 (979~992) 14 985,
3401 18:37:52.958818 TX Bit5 (985~1005) 21 995, Bit13 (978~995) 18 986,
3402 18:37:52.962108 TX Bit6 (985~1003) 19 994, Bit14 (977~992) 16 984,
3403 18:37:52.968792 TX Bit7 (985~1001) 17 993, Bit15 (972~986) 15 979,
3404 18:37:52.969320
3405 18:37:52.969706 Write Rank1 MR14 =0x8
3406 18:37:52.979501
3407 18:37:52.982636 CH=1, VrefRange= 0, VrefLevel = 8
3408 18:37:52.985856 TX Bit0 (985~1006) 22 995, Bit8 (976~990) 15 983,
3409 18:37:52.989174 TX Bit1 (985~1004) 20 994, Bit9 (975~990) 16 982,
3410 18:37:52.995439 TX Bit2 (983~1001) 19 992, Bit10 (977~996) 20 986,
3411 18:37:52.999028 TX Bit3 (981~998) 18 989, Bit11 (977~995) 19 986,
3412 18:37:53.005634 TX Bit4 (984~1004) 21 994, Bit12 (978~992) 15 985,
3413 18:37:53.008729 TX Bit5 (985~1005) 21 995, Bit13 (978~995) 18 986,
3414 18:37:53.012177 TX Bit6 (985~1004) 20 994, Bit14 (977~993) 17 985,
3415 18:37:53.018666 TX Bit7 (985~1002) 18 993, Bit15 (972~988) 17 980,
3416 18:37:53.019198
3417 18:37:53.019528 Write Rank1 MR14 =0xa
3418 18:37:53.029377
3419 18:37:53.032857 CH=1, VrefRange= 0, VrefLevel = 10
3420 18:37:53.035724 TX Bit0 (985~1006) 22 995, Bit8 (976~991) 16 983,
3421 18:37:53.039306 TX Bit1 (984~1005) 22 994, Bit9 (974~990) 17 982,
3422 18:37:53.045567 TX Bit2 (983~1002) 20 992, Bit10 (976~996) 21 986,
3423 18:37:53.049359 TX Bit3 (980~998) 19 989, Bit11 (977~996) 20 986,
3424 18:37:53.055617 TX Bit4 (984~1005) 22 994, Bit12 (978~993) 16 985,
3425 18:37:53.058890 TX Bit5 (985~1006) 22 995, Bit13 (978~997) 20 987,
3426 18:37:53.062205 TX Bit6 (985~1005) 21 995, Bit14 (977~993) 17 985,
3427 18:37:53.068716 TX Bit7 (985~1002) 18 993, Bit15 (971~989) 19 980,
3428 18:37:53.069245
3429 18:37:53.069638 Write Rank1 MR14 =0xc
3430 18:37:53.079683
3431 18:37:53.082972 CH=1, VrefRange= 0, VrefLevel = 12
3432 18:37:53.086104 TX Bit0 (985~1006) 22 995, Bit8 (976~991) 16 983,
3433 18:37:53.089317 TX Bit1 (984~1005) 22 994, Bit9 (974~991) 18 982,
3434 18:37:53.095884 TX Bit2 (983~1002) 20 992, Bit10 (976~997) 22 986,
3435 18:37:53.098763 TX Bit3 (981~999) 19 990, Bit11 (977~997) 21 987,
3436 18:37:53.106014 TX Bit4 (984~1005) 22 994, Bit12 (977~994) 18 985,
3437 18:37:53.109060 TX Bit5 (985~1006) 22 995, Bit13 (978~997) 20 987,
3438 18:37:53.112192 TX Bit6 (984~1005) 22 994, Bit14 (977~994) 18 985,
3439 18:37:53.118586 TX Bit7 (985~1003) 19 994, Bit15 (971~990) 20 980,
3440 18:37:53.119113
3441 18:37:53.121790 Write Rank1 MR14 =0xe
3442 18:37:53.129876
3443 18:37:53.132821 CH=1, VrefRange= 0, VrefLevel = 14
3444 18:37:53.136346 TX Bit0 (985~1006) 22 995, Bit8 (975~991) 17 983,
3445 18:37:53.139559 TX Bit1 (984~1005) 22 994, Bit9 (973~991) 19 982,
3446 18:37:53.145866 TX Bit2 (982~1003) 22 992, Bit10 (976~997) 22 986,
3447 18:37:53.149604 TX Bit3 (980~999) 20 989, Bit11 (977~997) 21 987,
3448 18:37:53.155682 TX Bit4 (984~1006) 23 995, Bit12 (977~994) 18 985,
3449 18:37:53.158929 TX Bit5 (985~1006) 22 995, Bit13 (977~998) 22 987,
3450 18:37:53.162136 TX Bit6 (984~1005) 22 994, Bit14 (977~995) 19 986,
3451 18:37:53.169369 TX Bit7 (984~1004) 21 994, Bit15 (971~990) 20 980,
3452 18:37:53.169934
3453 18:37:53.170269 Write Rank1 MR14 =0x10
3454 18:37:53.180304
3455 18:37:53.183777 CH=1, VrefRange= 0, VrefLevel = 16
3456 18:37:53.186600 TX Bit0 (985~1007) 23 996, Bit8 (974~992) 19 983,
3457 18:37:53.189552 TX Bit1 (984~1006) 23 995, Bit9 (973~991) 19 982,
3458 18:37:53.196284 TX Bit2 (983~1004) 22 993, Bit10 (975~998) 24 986,
3459 18:37:53.200061 TX Bit3 (979~999) 21 989, Bit11 (976~998) 23 987,
3460 18:37:53.206305 TX Bit4 (984~1006) 23 995, Bit12 (977~995) 19 986,
3461 18:37:53.209265 TX Bit5 (985~1006) 22 995, Bit13 (978~998) 21 988,
3462 18:37:53.212941 TX Bit6 (984~1006) 23 995, Bit14 (977~996) 20 986,
3463 18:37:53.219524 TX Bit7 (984~1005) 22 994, Bit15 (971~990) 20 980,
3464 18:37:53.220050
3465 18:37:53.220379 Write Rank1 MR14 =0x12
3466 18:37:53.230567
3467 18:37:53.233672 CH=1, VrefRange= 0, VrefLevel = 18
3468 18:37:53.237124 TX Bit0 (985~1007) 23 996, Bit8 (974~992) 19 983,
3469 18:37:53.240068 TX Bit1 (984~1006) 23 995, Bit9 (973~991) 19 982,
3470 18:37:53.247118 TX Bit2 (983~1004) 22 993, Bit10 (975~998) 24 986,
3471 18:37:53.250259 TX Bit3 (979~999) 21 989, Bit11 (976~998) 23 987,
3472 18:37:53.256860 TX Bit4 (984~1006) 23 995, Bit12 (977~995) 19 986,
3473 18:37:53.259525 TX Bit5 (985~1006) 22 995, Bit13 (978~998) 21 988,
3474 18:37:53.262870 TX Bit6 (984~1006) 23 995, Bit14 (977~996) 20 986,
3475 18:37:53.269718 TX Bit7 (984~1005) 22 994, Bit15 (971~990) 20 980,
3476 18:37:53.270248
3477 18:37:53.270585 Write Rank1 MR14 =0x14
3478 18:37:53.280691
3479 18:37:53.283991 CH=1, VrefRange= 0, VrefLevel = 20
3480 18:37:53.287113 TX Bit0 (985~1007) 23 996, Bit8 (974~993) 20 983,
3481 18:37:53.290707 TX Bit1 (984~1006) 23 995, Bit9 (972~992) 21 982,
3482 18:37:53.297344 TX Bit2 (982~1005) 24 993, Bit10 (975~999) 25 987,
3483 18:37:53.300151 TX Bit3 (978~1001) 24 989, Bit11 (976~999) 24 987,
3484 18:37:53.306806 TX Bit4 (983~1006) 24 994, Bit12 (977~997) 21 987,
3485 18:37:53.310279 TX Bit5 (985~1007) 23 996, Bit13 (977~999) 23 988,
3486 18:37:53.313552 TX Bit6 (984~1006) 23 995, Bit14 (976~997) 22 986,
3487 18:37:53.319739 TX Bit7 (984~1006) 23 995, Bit15 (970~991) 22 980,
3488 18:37:53.320195
3489 18:37:53.323407 Write Rank1 MR14 =0x16
3490 18:37:53.331290
3491 18:37:53.334179 CH=1, VrefRange= 0, VrefLevel = 22
3492 18:37:53.338096 TX Bit0 (984~1007) 24 995, Bit8 (973~993) 21 983,
3493 18:37:53.341220 TX Bit1 (983~1006) 24 994, Bit9 (972~992) 21 982,
3494 18:37:53.347819 TX Bit2 (982~1005) 24 993, Bit10 (975~999) 25 987,
3495 18:37:53.351098 TX Bit3 (978~1001) 24 989, Bit11 (976~999) 24 987,
3496 18:37:53.357365 TX Bit4 (983~1006) 24 994, Bit12 (976~997) 22 986,
3497 18:37:53.360699 TX Bit5 (984~1007) 24 995, Bit13 (976~999) 24 987,
3498 18:37:53.363923 TX Bit6 (984~1006) 23 995, Bit14 (976~998) 23 987,
3499 18:37:53.370365 TX Bit7 (984~1006) 23 995, Bit15 (969~991) 23 980,
3500 18:37:53.370903
3501 18:37:53.373516 Write Rank1 MR14 =0x18
3502 18:37:53.381589
3503 18:37:53.384832 CH=1, VrefRange= 0, VrefLevel = 24
3504 18:37:53.388026 TX Bit0 (984~1008) 25 996, Bit8 (973~994) 22 983,
3505 18:37:53.391437 TX Bit1 (983~1006) 24 994, Bit9 (971~993) 23 982,
3506 18:37:53.398014 TX Bit2 (981~1005) 25 993, Bit10 (975~999) 25 987,
3507 18:37:53.401009 TX Bit3 (978~1002) 25 990, Bit11 (976~999) 24 987,
3508 18:37:53.407660 TX Bit4 (983~1007) 25 995, Bit12 (976~998) 23 987,
3509 18:37:53.411212 TX Bit5 (984~1007) 24 995, Bit13 (976~999) 24 987,
3510 18:37:53.414130 TX Bit6 (983~1007) 25 995, Bit14 (975~998) 24 986,
3511 18:37:53.421002 TX Bit7 (983~1006) 24 994, Bit15 (969~992) 24 980,
3512 18:37:53.421539
3513 18:37:53.424416 Write Rank1 MR14 =0x1a
3514 18:37:53.432764
3515 18:37:53.435543 CH=1, VrefRange= 0, VrefLevel = 26
3516 18:37:53.438895 TX Bit0 (984~1008) 25 996, Bit8 (973~994) 22 983,
3517 18:37:53.441860 TX Bit1 (982~1007) 26 994, Bit9 (971~994) 24 982,
3518 18:37:53.448480 TX Bit2 (981~1006) 26 993, Bit10 (974~999) 26 986,
3519 18:37:53.452312 TX Bit3 (978~1002) 25 990, Bit11 (976~1000) 25 988,
3520 18:37:53.458182 TX Bit4 (982~1007) 26 994, Bit12 (976~998) 23 987,
3521 18:37:53.461880 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
3522 18:37:53.464919 TX Bit6 (983~1007) 25 995, Bit14 (976~998) 23 987,
3523 18:37:53.471243 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
3524 18:37:53.471626
3525 18:37:53.474464 Write Rank1 MR14 =0x1c
3526 18:37:53.482710
3527 18:37:53.486043 CH=1, VrefRange= 0, VrefLevel = 28
3528 18:37:53.489481 TX Bit0 (984~1008) 25 996, Bit8 (972~996) 25 984,
3529 18:37:53.493008 TX Bit1 (983~1007) 25 995, Bit9 (971~994) 24 982,
3530 18:37:53.499258 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
3531 18:37:53.502590 TX Bit3 (978~1003) 26 990, Bit11 (976~999) 24 987,
3532 18:37:53.509227 TX Bit4 (983~1007) 25 995, Bit12 (975~999) 25 987,
3533 18:37:53.512467 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
3534 18:37:53.515915 TX Bit6 (983~1007) 25 995, Bit14 (975~999) 25 987,
3535 18:37:53.522468 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
3536 18:37:53.522853
3537 18:37:53.525498 Write Rank1 MR14 =0x1e
3538 18:37:53.533696
3539 18:37:53.536970 CH=1, VrefRange= 0, VrefLevel = 30
3540 18:37:53.540482 TX Bit0 (984~1009) 26 996, Bit8 (972~996) 25 984,
3541 18:37:53.543661 TX Bit1 (983~1007) 25 995, Bit9 (971~995) 25 983,
3542 18:37:53.550215 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
3543 18:37:53.553512 TX Bit3 (978~1004) 27 991, Bit11 (975~999) 25 987,
3544 18:37:53.559784 TX Bit4 (983~1007) 25 995, Bit12 (975~999) 25 987,
3545 18:37:53.562775 TX Bit5 (983~1008) 26 995, Bit13 (976~999) 24 987,
3546 18:37:53.566296 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
3547 18:37:53.572935 TX Bit7 (983~1007) 25 995, Bit15 (969~993) 25 981,
3548 18:37:53.573620
3549 18:37:53.575937 Write Rank1 MR14 =0x20
3550 18:37:53.584324
3551 18:37:53.588092 CH=1, VrefRange= 0, VrefLevel = 32
3552 18:37:53.590724 TX Bit0 (984~1009) 26 996, Bit8 (972~996) 25 984,
3553 18:37:53.593971 TX Bit1 (983~1007) 25 995, Bit9 (971~995) 25 983,
3554 18:37:53.600700 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
3555 18:37:53.603958 TX Bit3 (978~1004) 27 991, Bit11 (975~999) 25 987,
3556 18:37:53.610374 TX Bit4 (983~1007) 25 995, Bit12 (975~999) 25 987,
3557 18:37:53.614133 TX Bit5 (983~1008) 26 995, Bit13 (976~999) 24 987,
3558 18:37:53.617080 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
3559 18:37:53.623771 TX Bit7 (983~1007) 25 995, Bit15 (969~993) 25 981,
3560 18:37:53.624356
3561 18:37:53.627002 Write Rank1 MR14 =0x22
3562 18:37:53.635348
3563 18:37:53.638350 CH=1, VrefRange= 0, VrefLevel = 34
3564 18:37:53.641859 TX Bit0 (984~1009) 26 996, Bit8 (972~996) 25 984,
3565 18:37:53.644982 TX Bit1 (983~1007) 25 995, Bit9 (971~995) 25 983,
3566 18:37:53.651485 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
3567 18:37:53.654828 TX Bit3 (978~1004) 27 991, Bit11 (975~999) 25 987,
3568 18:37:53.661511 TX Bit4 (983~1007) 25 995, Bit12 (975~999) 25 987,
3569 18:37:53.664265 TX Bit5 (983~1008) 26 995, Bit13 (976~999) 24 987,
3570 18:37:53.667929 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
3571 18:37:53.674411 TX Bit7 (983~1007) 25 995, Bit15 (969~993) 25 981,
3572 18:37:53.674933
3573 18:37:53.677407 Write Rank1 MR14 =0x24
3574 18:37:53.685766
3575 18:37:53.689165 CH=1, VrefRange= 0, VrefLevel = 36
3576 18:37:53.692300 TX Bit0 (984~1009) 26 996, Bit8 (972~996) 25 984,
3577 18:37:53.695428 TX Bit1 (983~1007) 25 995, Bit9 (971~995) 25 983,
3578 18:37:53.701658 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
3579 18:37:53.705383 TX Bit3 (978~1004) 27 991, Bit11 (975~999) 25 987,
3580 18:37:53.711857 TX Bit4 (983~1007) 25 995, Bit12 (975~999) 25 987,
3581 18:37:53.714831 TX Bit5 (983~1008) 26 995, Bit13 (976~999) 24 987,
3582 18:37:53.718204 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
3583 18:37:53.724720 TX Bit7 (983~1007) 25 995, Bit15 (969~993) 25 981,
3584 18:37:53.725145
3585 18:37:53.728061 Write Rank1 MR14 =0x26
3586 18:37:53.736283
3587 18:37:53.739909 CH=1, VrefRange= 0, VrefLevel = 38
3588 18:37:53.743025 TX Bit0 (984~1009) 26 996, Bit8 (972~996) 25 984,
3589 18:37:53.745792 TX Bit1 (983~1007) 25 995, Bit9 (971~995) 25 983,
3590 18:37:53.753095 TX Bit2 (980~1006) 27 993, Bit10 (975~999) 25 987,
3591 18:37:53.755815 TX Bit3 (978~1004) 27 991, Bit11 (975~999) 25 987,
3592 18:37:53.762480 TX Bit4 (983~1007) 25 995, Bit12 (975~999) 25 987,
3593 18:37:53.765980 TX Bit5 (983~1008) 26 995, Bit13 (976~999) 24 987,
3594 18:37:53.768963 TX Bit6 (982~1007) 26 994, Bit14 (975~999) 25 987,
3595 18:37:53.775755 TX Bit7 (983~1007) 25 995, Bit15 (969~993) 25 981,
3596 18:37:53.776267
3597 18:37:53.776594
3598 18:37:53.778559 TX Vref found, early break! 375< 385
3599 18:37:53.782028 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3600 18:37:53.785534 u1DelayCellOfst[0]=6 cells (5 PI)
3601 18:37:53.788909 u1DelayCellOfst[1]=5 cells (4 PI)
3602 18:37:53.791637 u1DelayCellOfst[2]=2 cells (2 PI)
3603 18:37:53.795325 u1DelayCellOfst[3]=0 cells (0 PI)
3604 18:37:53.798192 u1DelayCellOfst[4]=5 cells (4 PI)
3605 18:37:53.801749 u1DelayCellOfst[5]=5 cells (4 PI)
3606 18:37:53.805040 u1DelayCellOfst[6]=3 cells (3 PI)
3607 18:37:53.808574 u1DelayCellOfst[7]=5 cells (4 PI)
3608 18:37:53.811618 Byte0, DQ PI dly=991, DQM PI dly= 993
3609 18:37:53.814936 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3610 18:37:53.815453
3611 18:37:53.817956 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3612 18:37:53.821808
3613 18:37:53.822355 u1DelayCellOfst[8]=3 cells (3 PI)
3614 18:37:53.824591 u1DelayCellOfst[9]=2 cells (2 PI)
3615 18:37:53.828005 u1DelayCellOfst[10]=7 cells (6 PI)
3616 18:37:53.831266 u1DelayCellOfst[11]=7 cells (6 PI)
3617 18:37:53.834412 u1DelayCellOfst[12]=7 cells (6 PI)
3618 18:37:53.837991 u1DelayCellOfst[13]=7 cells (6 PI)
3619 18:37:53.840697 u1DelayCellOfst[14]=7 cells (6 PI)
3620 18:37:53.844279 u1DelayCellOfst[15]=0 cells (0 PI)
3621 18:37:53.847525 Byte1, DQ PI dly=981, DQM PI dly= 984
3622 18:37:53.850766 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3623 18:37:53.851284
3624 18:37:53.857092 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3625 18:37:53.857617
3626 18:37:53.857954 Write Rank1 MR14 =0x1e
3627 18:37:53.860737
3628 18:37:53.861251 Final TX Range 0 Vref 30
3629 18:37:53.861645
3630 18:37:53.866982 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3631 18:37:53.867498
3632 18:37:53.873698 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3633 18:37:53.880173 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3634 18:37:53.890154 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3635 18:37:53.890666 Write Rank1 MR3 =0xb0
3636 18:37:53.893016 DramC Write-DBI on
3637 18:37:53.893400 ==
3638 18:37:53.896890 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3639 18:37:53.900300 fsp= 1, odt_onoff= 1, Byte mode= 0
3640 18:37:53.900824 ==
3641 18:37:53.906536 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3642 18:37:53.907055
3643 18:37:53.907385 Begin, DQ Scan Range 704~768
3644 18:37:53.909593
3645 18:37:53.910105
3646 18:37:53.910444 TX Vref Scan disable
3647 18:37:53.913282 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3648 18:37:53.916269 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3649 18:37:53.919816 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3650 18:37:53.922591 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3651 18:37:53.926353 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3652 18:37:53.932832 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3653 18:37:53.936231 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3654 18:37:53.938840 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3655 18:37:53.942454 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3656 18:37:53.945934 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3657 18:37:53.949339 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3658 18:37:53.952292 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3659 18:37:53.955119 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3660 18:37:53.959085 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3661 18:37:53.962181 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3662 18:37:53.965282 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3663 18:37:53.968324 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3664 18:37:53.971572 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3665 18:37:53.975250 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3666 18:37:53.981650 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3667 18:37:53.984820 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3668 18:37:53.988176 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3669 18:37:53.991401 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3670 18:37:53.997938 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3671 18:37:54.001225 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3672 18:37:54.004434 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3673 18:37:54.007949 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3674 18:37:54.011359 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3675 18:37:54.014335 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3676 18:37:54.018142 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3677 18:37:54.021204 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3678 18:37:54.024312 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3679 18:37:54.027669 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3680 18:37:54.030839 Byte0, DQ PI dly=739, DQM PI dly= 739
3681 18:37:54.037721 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
3682 18:37:54.038253
3683 18:37:54.041053 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
3684 18:37:54.041626
3685 18:37:54.043920 Byte1, DQ PI dly=728, DQM PI dly= 728
3686 18:37:54.047451 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3687 18:37:54.048012
3688 18:37:54.053944 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3689 18:37:54.054479
3690 18:37:54.060680 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3691 18:37:54.066624 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3692 18:37:54.073119 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3693 18:37:54.076884 Write Rank1 MR3 =0x30
3694 18:37:54.077414 DramC Write-DBI off
3695 18:37:54.077902
3696 18:37:54.079700 [DATLAT]
3697 18:37:54.083190 Freq=1600, CH1 RK1, use_rxtx_scan=0
3698 18:37:54.083601
3699 18:37:54.084000 DATLAT Default: 0x10
3700 18:37:54.086136 7, 0xFFFF, sum=0
3701 18:37:54.086537 8, 0xFFFF, sum=0
3702 18:37:54.089552 9, 0xFFFF, sum=0
3703 18:37:54.089950 10, 0xFFFF, sum=0
3704 18:37:54.092955 11, 0xFFFF, sum=0
3705 18:37:54.093353 12, 0xFFFF, sum=0
3706 18:37:54.096486 13, 0xFFFF, sum=0
3707 18:37:54.096986 14, 0x0, sum=1
3708 18:37:54.097493 15, 0x0, sum=2
3709 18:37:54.099652 16, 0x0, sum=3
3710 18:37:54.100164 17, 0x0, sum=4
3711 18:37:54.106082 pattern=2 first_step=14 total pass=5 best_step=16
3712 18:37:54.106610 ==
3713 18:37:54.109361 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3714 18:37:54.112777 fsp= 1, odt_onoff= 1, Byte mode= 0
3715 18:37:54.113275 ==
3716 18:37:54.118920 Start DQ dly to find pass range UseTestEngine =1
3717 18:37:54.122725 x-axis: bit #, y-axis: DQ dly (-127~63)
3718 18:37:54.123211 RX Vref Scan = 0
3719 18:37:54.125802 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3720 18:37:54.129386 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3721 18:37:54.132323 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3722 18:37:54.135942 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3723 18:37:54.139022 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3724 18:37:54.142049 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3725 18:37:54.142542 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3726 18:37:54.145709 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3727 18:37:54.148654 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3728 18:37:54.152148 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3729 18:37:54.155182 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3730 18:37:54.157989 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3731 18:37:54.161528 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3732 18:37:54.164869 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3733 18:37:54.167747 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3734 18:37:54.168150 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3735 18:37:54.171565 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3736 18:37:54.174764 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3737 18:37:54.178203 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3738 18:37:54.180903 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3739 18:37:54.184063 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3740 18:37:54.187835 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3741 18:37:54.191247 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3742 18:37:54.191736 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3743 18:37:54.194033 -2, [0] xxxxxxxx xoxxxxxo [MSB]
3744 18:37:54.197832 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3745 18:37:54.200942 0, [0] xxxoxxxx ooxxxxxo [MSB]
3746 18:37:54.204534 1, [0] xxxoxxxx ooxxxxxo [MSB]
3747 18:37:54.207715 2, [0] xxxoxxxx ooxxxxxo [MSB]
3748 18:37:54.210952 3, [0] xxooxxxo oooxoxxo [MSB]
3749 18:37:54.211458 4, [0] ooooxxxo oooooooo [MSB]
3750 18:37:54.214179 5, [0] oooooxxo oooooooo [MSB]
3751 18:37:54.217464 6, [0] ooooooxo oooooooo [MSB]
3752 18:37:54.221599 32, [0] oooooooo ooooooox [MSB]
3753 18:37:54.224469 33, [0] oooooooo oxooooox [MSB]
3754 18:37:54.227831 34, [0] oooxoooo oxooooox [MSB]
3755 18:37:54.231176 35, [0] ooxxoooo xxooooox [MSB]
3756 18:37:54.234156 36, [0] ooxxoooo xxooooox [MSB]
3757 18:37:54.237700 37, [0] ooxxoooo xxooooox [MSB]
3758 18:37:54.240715 38, [0] ooxxooox xxooxoox [MSB]
3759 18:37:54.241232 39, [0] oxxxooox xxxxxoox [MSB]
3760 18:37:54.244306 40, [0] oxxxxoox xxxxxxox [MSB]
3761 18:37:54.247787 41, [0] xxxxxxxx xxxxxxxx [MSB]
3762 18:37:54.250565 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3763 18:37:54.254003 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3764 18:37:54.257407 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3765 18:37:54.263826 iDelay=41, Bit 3, Center 16 (-1 ~ 33) 35
3766 18:37:54.267060 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
3767 18:37:54.270413 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3768 18:37:54.273650 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3769 18:37:54.276741 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3770 18:37:54.280245 iDelay=41, Bit 8, Center 16 (-1 ~ 34) 36
3771 18:37:54.283561 iDelay=41, Bit 9, Center 15 (-2 ~ 32) 35
3772 18:37:54.286911 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3773 18:37:54.290043 iDelay=41, Bit 11, Center 21 (4 ~ 38) 35
3774 18:37:54.293242 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3775 18:37:54.296511 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3776 18:37:54.303423 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3777 18:37:54.306619 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3778 18:37:54.307172 ==
3779 18:37:54.309566 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3780 18:37:54.313291 fsp= 1, odt_onoff= 1, Byte mode= 0
3781 18:37:54.313864 ==
3782 18:37:54.316283 DQS Delay:
3783 18:37:54.316804 DQS0 = 0, DQS1 = 0
3784 18:37:54.319631 DQM Delay:
3785 18:37:54.320154 DQM0 = 20, DQM1 = 18
3786 18:37:54.320596 DQ Delay:
3787 18:37:54.322631 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3788 18:37:54.325671 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3789 18:37:54.329244 DQ8 =16, DQ9 =15, DQ10 =20, DQ11 =21
3790 18:37:54.332442 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3791 18:37:54.332825
3792 18:37:54.333123
3793 18:37:54.336031
3794 18:37:54.336515 [DramC_TX_OE_Calibration] TA2
3795 18:37:54.339309 Original DQ_B0 (3 6) =30, OEN = 27
3796 18:37:54.342424 Original DQ_B1 (3 6) =30, OEN = 27
3797 18:37:54.345683 23, 0x0, End_B0=23 End_B1=23
3798 18:37:54.349018 24, 0x0, End_B0=24 End_B1=24
3799 18:37:54.352710 25, 0x0, End_B0=25 End_B1=25
3800 18:37:54.353203 26, 0x0, End_B0=26 End_B1=26
3801 18:37:54.355453 27, 0x0, End_B0=27 End_B1=27
3802 18:37:54.358732 28, 0x0, End_B0=28 End_B1=28
3803 18:37:54.362050 29, 0x0, End_B0=29 End_B1=29
3804 18:37:54.365257 30, 0x0, End_B0=30 End_B1=30
3805 18:37:54.365823 31, 0xFFFF, End_B0=30 End_B1=30
3806 18:37:54.372146 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3807 18:37:54.378105 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3808 18:37:54.378608
3809 18:37:54.378916
3810 18:37:54.381380 Write Rank1 MR23 =0x3f
3811 18:37:54.381814 [DQSOSC]
3812 18:37:54.388385 [DQSOSCAuto] RK1, (LSB)MR18= 0xb8b8, (MSB)MR19= 0x202, tDQSOscB0 = 452 ps tDQSOscB1 = 452 ps
3813 18:37:54.394960 CH1_RK1: MR19=0x202, MR18=0xB8B8, DQSOSC=452, MR23=63, INC=12, DEC=18
3814 18:37:54.397896 Write Rank1 MR23 =0x3f
3815 18:37:54.398291 [DQSOSC]
3816 18:37:54.404657 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3817 18:37:54.407960 CH1 RK1: MR19=202, MR18=B7B7
3818 18:37:54.411236 [RxdqsGatingPostProcess] freq 1600
3819 18:37:54.417829 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3820 18:37:54.418341 Rank: 0
3821 18:37:54.421066 best DQS0 dly(2T, 0.5T) = (2, 6)
3822 18:37:54.424275 best DQS1 dly(2T, 0.5T) = (2, 6)
3823 18:37:54.427598 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3824 18:37:54.431001 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3825 18:37:54.431532 Rank: 1
3826 18:37:54.434079 best DQS0 dly(2T, 0.5T) = (2, 6)
3827 18:37:54.437502 best DQS1 dly(2T, 0.5T) = (2, 6)
3828 18:37:54.441107 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3829 18:37:54.443991 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3830 18:37:54.446928 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3831 18:37:54.450378 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3832 18:37:54.457152 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3833 18:37:54.457776
3834 18:37:54.458111
3835 18:37:54.460049 [Calibration Summary] Freqency 1600
3836 18:37:54.460464 CH 0, Rank 0
3837 18:37:54.463282 All Pass.
3838 18:37:54.463779
3839 18:37:54.464106 CH 0, Rank 1
3840 18:37:54.464409 All Pass.
3841 18:37:54.464699
3842 18:37:54.466564 CH 1, Rank 0
3843 18:37:54.466978 All Pass.
3844 18:37:54.467316
3845 18:37:54.467624 CH 1, Rank 1
3846 18:37:54.469906 All Pass.
3847 18:37:54.470319
3848 18:37:54.476825 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3849 18:37:54.483626 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3850 18:37:54.489706 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3851 18:37:54.492921 Write Rank0 MR3 =0xb0
3852 18:37:54.499479 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3853 18:37:54.506160 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3854 18:37:54.512698 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3855 18:37:54.513211 Write Rank1 MR3 =0xb0
3856 18:37:54.519349 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3857 18:37:54.529009 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3858 18:37:54.535576 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3859 18:37:54.536163 Write Rank0 MR3 =0xb0
3860 18:37:54.542279 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3861 18:37:54.549048 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3862 18:37:54.558528 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3863 18:37:54.559046 Write Rank1 MR3 =0xb0
3864 18:37:54.561729 DramC Write-DBI on
3865 18:37:54.564807 [GetDramInforAfterCalByMRR] Vendor 6.
3866 18:37:54.568512 [GetDramInforAfterCalByMRR] Revision 505.
3867 18:37:54.569021 MR8 1111
3868 18:37:54.575057 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3869 18:37:54.575579 MR8 1111
3870 18:37:54.578160 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3871 18:37:54.581741 MR8 1111
3872 18:37:54.584400 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3873 18:37:54.584859 MR8 1111
3874 18:37:54.591611 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3875 18:37:54.600901 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3876 18:37:54.601593 Write Rank0 MR13 =0xd0
3877 18:37:54.604148 Write Rank1 MR13 =0xd0
3878 18:37:54.607556 Write Rank0 MR13 =0xd0
3879 18:37:54.607974 Write Rank1 MR13 =0xd0
3880 18:37:54.610820 Save calibration result to emmc
3881 18:37:54.611238
3882 18:37:54.611561
3883 18:37:54.613908 [DramcModeReg_Check] Freq_1600, FSP_1
3884 18:37:54.617036 FSP_1, CH_0, RK0
3885 18:37:54.617418 Write Rank0 MR13 =0xd8
3886 18:37:54.620842 MR12 = 0x5c (global = 0x5c) match
3887 18:37:54.623945 MR14 = 0x1e (global = 0x1e) match
3888 18:37:54.627503 FSP_1, CH_0, RK1
3889 18:37:54.627986 Write Rank1 MR13 =0xd8
3890 18:37:54.630269 MR12 = 0x60 (global = 0x60) match
3891 18:37:54.634004 MR14 = 0x1e (global = 0x1e) match
3892 18:37:54.636809 FSP_1, CH_1, RK0
3893 18:37:54.637312 Write Rank0 MR13 =0xd8
3894 18:37:54.640189 MR12 = 0x5c (global = 0x5c) match
3895 18:37:54.643596 MR14 = 0x20 (global = 0x20) match
3896 18:37:54.646909 FSP_1, CH_1, RK1
3897 18:37:54.647295 Write Rank1 MR13 =0xd8
3898 18:37:54.649853 MR12 = 0x5e (global = 0x5e) match
3899 18:37:54.653210 MR14 = 0x1e (global = 0x1e) match
3900 18:37:54.653630
3901 18:37:54.659897 [MEM_TEST] 02: After DFS, before run time config
3902 18:37:54.669385 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3903 18:37:54.670043
3904 18:37:54.670722 [TA2_TEST]
3905 18:37:54.671159 === TA2 HW
3906 18:37:54.672801 TA2 PAT: XTALK
3907 18:37:54.675856 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3908 18:37:54.682470 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3909 18:37:54.685822 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3910 18:37:54.692222 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3911 18:37:54.692798
3912 18:37:54.693140
3913 18:37:54.693414 Settings after calibration
3914 18:37:54.695865
3915 18:37:54.696256 [DramcRunTimeConfig]
3916 18:37:54.698975 TransferPLLToSPMControl - MODE SW PHYPLL
3917 18:37:54.702136 TX_TRACKING: ON
3918 18:37:54.702715 RX_TRACKING: ON
3919 18:37:54.703005 HW_GATING: ON
3920 18:37:54.705601 HW_GATING DBG: OFF
3921 18:37:54.705956 ddr_geometry:1
3922 18:37:54.708636 ddr_geometry:1
3923 18:37:54.708984 ddr_geometry:1
3924 18:37:54.711918 ddr_geometry:1
3925 18:37:54.712269 ddr_geometry:1
3926 18:37:54.715114 ddr_geometry:1
3927 18:37:54.715464 ddr_geometry:1
3928 18:37:54.715744 ddr_geometry:1
3929 18:37:54.718876 High Freq DUMMY_READ_FOR_TRACKING: ON
3930 18:37:54.721788 ZQCS_ENABLE_LP4: OFF
3931 18:37:54.725237 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3932 18:37:54.728250 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3933 18:37:54.731658 SPM_CONTROL_AFTERK: ON
3934 18:37:54.732010 IMPEDANCE_TRACKING: ON
3935 18:37:54.735246 TEMP_SENSOR: ON
3936 18:37:54.735704 PER_BANK_REFRESH: ON
3937 18:37:54.738185 HW_SAVE_FOR_SR: ON
3938 18:37:54.741749 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3939 18:37:54.745206 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3940 18:37:54.747870 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3941 18:37:54.748236 Read ODT Tracking: ON
3942 18:37:54.751090 =========================
3943 18:37:54.751440
3944 18:37:54.751718 [TA2_TEST]
3945 18:37:54.754522 === TA2 HW
3946 18:37:54.757804 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3947 18:37:54.764568 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3948 18:37:54.767505 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3949 18:37:54.774270 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3950 18:37:54.774723
3951 18:37:54.777419 [MEM_TEST] 03: After run time config
3952 18:37:54.787464 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3953 18:37:54.790776 [complex_mem_test] start addr:0x40024000, len:131072
3954 18:37:54.995194 1st complex R/W mem test pass
3955 18:37:55.001233 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3956 18:37:55.005035 sync preloader write leveling
3957 18:37:55.008379 sync preloader cbt_mr12
3958 18:37:55.011456 sync preloader cbt_clk_dly
3959 18:37:55.011875 sync preloader cbt_cmd_dly
3960 18:37:55.014936 sync preloader cbt_cs
3961 18:37:55.017964 sync preloader cbt_ca_perbit_delay
3962 18:37:55.021395 sync preloader clk_delay
3963 18:37:55.021938 sync preloader dqs_delay
3964 18:37:55.024550 sync preloader u1Gating2T_Save
3965 18:37:55.027985 sync preloader u1Gating05T_Save
3966 18:37:55.030747 sync preloader u1Gatingfine_tune_Save
3967 18:37:55.034032 sync preloader u1Gatingucpass_count_Save
3968 18:37:55.037514 sync preloader u1TxWindowPerbitVref_Save
3969 18:37:55.041003 sync preloader u1TxCenter_min_Save
3970 18:37:55.044254 sync preloader u1TxCenter_max_Save
3971 18:37:55.047515 sync preloader u1Txwin_center_Save
3972 18:37:55.050469 sync preloader u1Txfirst_pass_Save
3973 18:37:55.053661 sync preloader u1Txlast_pass_Save
3974 18:37:55.057381 sync preloader u1RxDatlat_Save
3975 18:37:55.060545 sync preloader u1RxWinPerbitVref_Save
3976 18:37:55.063738 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3977 18:37:55.066861 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3978 18:37:55.070270 sync preloader delay_cell_unit
3979 18:37:55.077170 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3980 18:37:55.080237 sync preloader write leveling
3981 18:37:55.083590 sync preloader cbt_mr12
3982 18:37:55.084107 sync preloader cbt_clk_dly
3983 18:37:55.086616 sync preloader cbt_cmd_dly
3984 18:37:55.089804 sync preloader cbt_cs
3985 18:37:55.093388 sync preloader cbt_ca_perbit_delay
3986 18:37:55.093971 sync preloader clk_delay
3987 18:37:55.096368 sync preloader dqs_delay
3988 18:37:55.099668 sync preloader u1Gating2T_Save
3989 18:37:55.102953 sync preloader u1Gating05T_Save
3990 18:37:55.106038 sync preloader u1Gatingfine_tune_Save
3991 18:37:55.109598 sync preloader u1Gatingucpass_count_Save
3992 18:37:55.112808 sync preloader u1TxWindowPerbitVref_Save
3993 18:37:55.116262 sync preloader u1TxCenter_min_Save
3994 18:37:55.119555 sync preloader u1TxCenter_max_Save
3995 18:37:55.122975 sync preloader u1Txwin_center_Save
3996 18:37:55.126100 sync preloader u1Txfirst_pass_Save
3997 18:37:55.129515 sync preloader u1Txlast_pass_Save
3998 18:37:55.132673 sync preloader u1RxDatlat_Save
3999 18:37:55.136103 sync preloader u1RxWinPerbitVref_Save
4000 18:37:55.139142 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4001 18:37:55.142481 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4002 18:37:55.145651 sync preloader delay_cell_unit
4003 18:37:55.152329 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4004 18:37:55.155218 sync preloader write leveling
4005 18:37:55.158830 sync preloader cbt_mr12
4006 18:37:55.159394 sync preloader cbt_clk_dly
4007 18:37:55.161838 sync preloader cbt_cmd_dly
4008 18:37:55.165176 sync preloader cbt_cs
4009 18:37:55.168414 sync preloader cbt_ca_perbit_delay
4010 18:37:55.168826 sync preloader clk_delay
4011 18:37:55.171664 sync preloader dqs_delay
4012 18:37:55.174956 sync preloader u1Gating2T_Save
4013 18:37:55.178240 sync preloader u1Gating05T_Save
4014 18:37:55.181323 sync preloader u1Gatingfine_tune_Save
4015 18:37:55.184919 sync preloader u1Gatingucpass_count_Save
4016 18:37:55.188118 sync preloader u1TxWindowPerbitVref_Save
4017 18:37:55.191653 sync preloader u1TxCenter_min_Save
4018 18:37:55.194510 sync preloader u1TxCenter_max_Save
4019 18:37:55.197824 sync preloader u1Txwin_center_Save
4020 18:37:55.200769 sync preloader u1Txfirst_pass_Save
4021 18:37:55.204080 sync preloader u1Txlast_pass_Save
4022 18:37:55.204475 sync preloader u1RxDatlat_Save
4023 18:37:55.207810 sync preloader u1RxWinPerbitVref_Save
4024 18:37:55.214103 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4025 18:37:55.217469 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4026 18:37:55.221034 sync preloader delay_cell_unit
4027 18:37:55.224315 just_for_test_dump_coreboot_params dump all params
4028 18:37:55.227252 dump source = 0x0
4029 18:37:55.227635 dump params frequency:1600
4030 18:37:55.230980 dump params rank number:2
4031 18:37:55.231461
4032 18:37:55.234143 dump params write leveling
4033 18:37:55.237506 write leveling[0][0][0] = 0x1f
4034 18:37:55.240557 write leveling[0][0][1] = 0x1a
4035 18:37:55.241071 write leveling[0][1][0] = 0x1e
4036 18:37:55.244076 write leveling[0][1][1] = 0x1a
4037 18:37:55.247196 write leveling[1][0][0] = 0x20
4038 18:37:55.250561 write leveling[1][0][1] = 0x19
4039 18:37:55.253341 write leveling[1][1][0] = 0x25
4040 18:37:55.256999 write leveling[1][1][1] = 0x1c
4041 18:37:55.257562 dump params cbt_cs
4042 18:37:55.260239 cbt_cs[0][0] = 0x6
4043 18:37:55.260650 cbt_cs[0][1] = 0x6
4044 18:37:55.263570 cbt_cs[1][0] = 0xb
4045 18:37:55.264080 cbt_cs[1][1] = 0xb
4046 18:37:55.266487 dump params cbt_mr12
4047 18:37:55.269896 cbt_mr12[0][0] = 0x1c
4048 18:37:55.270278 cbt_mr12[0][1] = 0x20
4049 18:37:55.273023 cbt_mr12[1][0] = 0x1c
4050 18:37:55.273530 cbt_mr12[1][1] = 0x1e
4051 18:37:55.276241 dump params tx window
4052 18:37:55.279489 tx_center_min[0][0][0] = 983
4053 18:37:55.282628 tx_center_max[0][0][0] = 989
4054 18:37:55.283015 tx_center_min[0][0][1] = 978
4055 18:37:55.286313 tx_center_max[0][0][1] = 985
4056 18:37:55.289273 tx_center_min[0][1][0] = 984
4057 18:37:55.292845 tx_center_max[0][1][0] = 990
4058 18:37:55.296127 tx_center_min[0][1][1] = 981
4059 18:37:55.296607 tx_center_max[0][1][1] = 988
4060 18:37:55.299114 tx_center_min[1][0][0] = 986
4061 18:37:55.302676 tx_center_max[1][0][0] = 991
4062 18:37:55.305963 tx_center_min[1][0][1] = 978
4063 18:37:55.309074 tx_center_max[1][0][1] = 983
4064 18:37:55.309599 tx_center_min[1][1][0] = 991
4065 18:37:55.312143 tx_center_max[1][1][0] = 996
4066 18:37:55.315434 tx_center_min[1][1][1] = 981
4067 18:37:55.319127 tx_center_max[1][1][1] = 987
4068 18:37:55.319612 dump params tx window
4069 18:37:55.322238 tx_win_center[0][0][0] = 989
4070 18:37:55.325257 tx_first_pass[0][0][0] = 978
4071 18:37:55.328607 tx_last_pass[0][0][0] = 1001
4072 18:37:55.332098 tx_win_center[0][0][1] = 988
4073 18:37:55.332578 tx_first_pass[0][0][1] = 977
4074 18:37:55.335524 tx_last_pass[0][0][1] = 1000
4075 18:37:55.338684 tx_win_center[0][0][2] = 989
4076 18:37:55.342199 tx_first_pass[0][0][2] = 977
4077 18:37:55.345196 tx_last_pass[0][0][2] = 1001
4078 18:37:55.345718 tx_win_center[0][0][3] = 983
4079 18:37:55.348617 tx_first_pass[0][0][3] = 971
4080 18:37:55.352066 tx_last_pass[0][0][3] = 996
4081 18:37:55.354895 tx_win_center[0][0][4] = 988
4082 18:37:55.358435 tx_first_pass[0][0][4] = 976
4083 18:37:55.358914 tx_last_pass[0][0][4] = 1000
4084 18:37:55.361701 tx_win_center[0][0][5] = 986
4085 18:37:55.364925 tx_first_pass[0][0][5] = 974
4086 18:37:55.368119 tx_last_pass[0][0][5] = 998
4087 18:37:55.371508 tx_win_center[0][0][6] = 987
4088 18:37:55.371893 tx_first_pass[0][0][6] = 976
4089 18:37:55.374440 tx_last_pass[0][0][6] = 999
4090 18:37:55.378008 tx_win_center[0][0][7] = 988
4091 18:37:55.381047 tx_first_pass[0][0][7] = 976
4092 18:37:55.381450 tx_last_pass[0][0][7] = 1001
4093 18:37:55.384369 tx_win_center[0][0][8] = 978
4094 18:37:55.387708 tx_first_pass[0][0][8] = 967
4095 18:37:55.391081 tx_last_pass[0][0][8] = 990
4096 18:37:55.393942 tx_win_center[0][0][9] = 980
4097 18:37:55.394327 tx_first_pass[0][0][9] = 968
4098 18:37:55.397080 tx_last_pass[0][0][9] = 992
4099 18:37:55.400692 tx_win_center[0][0][10] = 985
4100 18:37:55.403779 tx_first_pass[0][0][10] = 973
4101 18:37:55.407233 tx_last_pass[0][0][10] = 998
4102 18:37:55.410375 tx_win_center[0][0][11] = 980
4103 18:37:55.410768 tx_first_pass[0][0][11] = 968
4104 18:37:55.413369 tx_last_pass[0][0][11] = 992
4105 18:37:55.417092 tx_win_center[0][0][12] = 981
4106 18:37:55.420047 tx_first_pass[0][0][12] = 969
4107 18:37:55.423564 tx_last_pass[0][0][12] = 993
4108 18:37:55.424052 tx_win_center[0][0][13] = 981
4109 18:37:55.426696 tx_first_pass[0][0][13] = 969
4110 18:37:55.430394 tx_last_pass[0][0][13] = 993
4111 18:37:55.433211 tx_win_center[0][0][14] = 982
4112 18:37:55.436511 tx_first_pass[0][0][14] = 969
4113 18:37:55.440070 tx_last_pass[0][0][14] = 996
4114 18:37:55.440556 tx_win_center[0][0][15] = 985
4115 18:37:55.443180 tx_first_pass[0][0][15] = 972
4116 18:37:55.446786 tx_last_pass[0][0][15] = 998
4117 18:37:55.450008 tx_win_center[0][1][0] = 990
4118 18:37:55.453150 tx_first_pass[0][1][0] = 978
4119 18:37:55.453700 tx_last_pass[0][1][0] = 1003
4120 18:37:55.456422 tx_win_center[0][1][1] = 990
4121 18:37:55.459494 tx_first_pass[0][1][1] = 978
4122 18:37:55.463175 tx_last_pass[0][1][1] = 1002
4123 18:37:55.466088 tx_win_center[0][1][2] = 990
4124 18:37:55.466604 tx_first_pass[0][1][2] = 978
4125 18:37:55.469803 tx_last_pass[0][1][2] = 1002
4126 18:37:55.472573 tx_win_center[0][1][3] = 984
4127 18:37:55.476201 tx_first_pass[0][1][3] = 972
4128 18:37:55.479418 tx_last_pass[0][1][3] = 997
4129 18:37:55.479939 tx_win_center[0][1][4] = 989
4130 18:37:55.482565 tx_first_pass[0][1][4] = 977
4131 18:37:55.485894 tx_last_pass[0][1][4] = 1002
4132 18:37:55.489400 tx_win_center[0][1][5] = 987
4133 18:37:55.492712 tx_first_pass[0][1][5] = 976
4134 18:37:55.493229 tx_last_pass[0][1][5] = 999
4135 18:37:55.495582 tx_win_center[0][1][6] = 988
4136 18:37:55.499235 tx_first_pass[0][1][6] = 977
4137 18:37:55.501995 tx_last_pass[0][1][6] = 1000
4138 18:37:55.502412 tx_win_center[0][1][7] = 990
4139 18:37:55.505180 tx_first_pass[0][1][7] = 977
4140 18:37:55.508547 tx_last_pass[0][1][7] = 1003
4141 18:37:55.512022 tx_win_center[0][1][8] = 981
4142 18:37:55.515472 tx_first_pass[0][1][8] = 969
4143 18:37:55.515987 tx_last_pass[0][1][8] = 994
4144 18:37:55.518770 tx_win_center[0][1][9] = 983
4145 18:37:55.521949 tx_first_pass[0][1][9] = 971
4146 18:37:55.525034 tx_last_pass[0][1][9] = 996
4147 18:37:55.528645 tx_win_center[0][1][10] = 988
4148 18:37:55.529156 tx_first_pass[0][1][10] = 976
4149 18:37:55.531946 tx_last_pass[0][1][10] = 1001
4150 18:37:55.534758 tx_win_center[0][1][11] = 982
4151 18:37:55.537945 tx_first_pass[0][1][11] = 970
4152 18:37:55.541570 tx_last_pass[0][1][11] = 994
4153 18:37:55.544634 tx_win_center[0][1][12] = 983
4154 18:37:55.545106 tx_first_pass[0][1][12] = 971
4155 18:37:55.548107 tx_last_pass[0][1][12] = 996
4156 18:37:55.551138 tx_win_center[0][1][13] = 983
4157 18:37:55.554667 tx_first_pass[0][1][13] = 970
4158 18:37:55.558145 tx_last_pass[0][1][13] = 996
4159 18:37:55.558646 tx_win_center[0][1][14] = 984
4160 18:37:55.560909 tx_first_pass[0][1][14] = 972
4161 18:37:55.564273 tx_last_pass[0][1][14] = 997
4162 18:37:55.567464 tx_win_center[0][1][15] = 987
4163 18:37:55.570895 tx_first_pass[0][1][15] = 975
4164 18:37:55.574205 tx_last_pass[0][1][15] = 999
4165 18:37:55.574678 tx_win_center[1][0][0] = 991
4166 18:37:55.577150 tx_first_pass[1][0][0] = 978
4167 18:37:55.580864 tx_last_pass[1][0][0] = 1004
4168 18:37:55.583996 tx_win_center[1][0][1] = 990
4169 18:37:55.586914 tx_first_pass[1][0][1] = 978
4170 18:37:55.587296 tx_last_pass[1][0][1] = 1003
4171 18:37:55.590510 tx_win_center[1][0][2] = 988
4172 18:37:55.593311 tx_first_pass[1][0][2] = 976
4173 18:37:55.596480 tx_last_pass[1][0][2] = 1001
4174 18:37:55.599651 tx_win_center[1][0][3] = 986
4175 18:37:55.599773 tx_first_pass[1][0][3] = 975
4176 18:37:55.603186 tx_last_pass[1][0][3] = 998
4177 18:37:55.606469 tx_win_center[1][0][4] = 990
4178 18:37:55.609517 tx_first_pass[1][0][4] = 978
4179 18:37:55.609618 tx_last_pass[1][0][4] = 1002
4180 18:37:55.612985 tx_win_center[1][0][5] = 991
4181 18:37:55.616567 tx_first_pass[1][0][5] = 978
4182 18:37:55.619657 tx_last_pass[1][0][5] = 1004
4183 18:37:55.622910 tx_win_center[1][0][6] = 990
4184 18:37:55.623094 tx_first_pass[1][0][6] = 977
4185 18:37:55.626264 tx_last_pass[1][0][6] = 1003
4186 18:37:55.629732 tx_win_center[1][0][7] = 989
4187 18:37:55.632849 tx_first_pass[1][0][7] = 977
4188 18:37:55.635911 tx_last_pass[1][0][7] = 1002
4189 18:37:55.636084 tx_win_center[1][0][8] = 980
4190 18:37:55.639325 tx_first_pass[1][0][8] = 969
4191 18:37:55.642596 tx_last_pass[1][0][8] = 992
4192 18:37:55.645862 tx_win_center[1][0][9] = 979
4193 18:37:55.649319 tx_first_pass[1][0][9] = 968
4194 18:37:55.649599 tx_last_pass[1][0][9] = 991
4195 18:37:55.652793 tx_win_center[1][0][10] = 983
4196 18:37:55.655832 tx_first_pass[1][0][10] = 971
4197 18:37:55.658759 tx_last_pass[1][0][10] = 995
4198 18:37:55.662180 tx_win_center[1][0][11] = 983
4199 18:37:55.665569 tx_first_pass[1][0][11] = 972
4200 18:37:55.665988 tx_last_pass[1][0][11] = 995
4201 18:37:55.668948 tx_win_center[1][0][12] = 982
4202 18:37:55.672362 tx_first_pass[1][0][12] = 971
4203 18:37:55.675717 tx_last_pass[1][0][12] = 994
4204 18:37:55.678911 tx_win_center[1][0][13] = 983
4205 18:37:55.679323 tx_first_pass[1][0][13] = 972
4206 18:37:55.681877 tx_last_pass[1][0][13] = 995
4207 18:37:55.685488 tx_win_center[1][0][14] = 982
4208 18:37:55.688431 tx_first_pass[1][0][14] = 971
4209 18:37:55.691733 tx_last_pass[1][0][14] = 994
4210 18:37:55.692112 tx_win_center[1][0][15] = 978
4211 18:37:55.695166 tx_first_pass[1][0][15] = 966
4212 18:37:55.698250 tx_last_pass[1][0][15] = 990
4213 18:37:55.701386 tx_win_center[1][1][0] = 996
4214 18:37:55.704976 tx_first_pass[1][1][0] = 984
4215 18:37:55.708283 tx_last_pass[1][1][0] = 1009
4216 18:37:55.708665 tx_win_center[1][1][1] = 995
4217 18:37:55.711122 tx_first_pass[1][1][1] = 983
4218 18:37:55.714938 tx_last_pass[1][1][1] = 1007
4219 18:37:55.718156 tx_win_center[1][1][2] = 993
4220 18:37:55.721589 tx_first_pass[1][1][2] = 980
4221 18:37:55.722071 tx_last_pass[1][1][2] = 1006
4222 18:37:55.724927 tx_win_center[1][1][3] = 991
4223 18:37:55.727589 tx_first_pass[1][1][3] = 978
4224 18:37:55.731186 tx_last_pass[1][1][3] = 1004
4225 18:37:55.731666 tx_win_center[1][1][4] = 995
4226 18:37:55.734509 tx_first_pass[1][1][4] = 983
4227 18:37:55.737764 tx_last_pass[1][1][4] = 1007
4228 18:37:55.741031 tx_win_center[1][1][5] = 995
4229 18:37:55.744738 tx_first_pass[1][1][5] = 983
4230 18:37:55.745224 tx_last_pass[1][1][5] = 1008
4231 18:37:55.747696 tx_win_center[1][1][6] = 994
4232 18:37:55.751044 tx_first_pass[1][1][6] = 982
4233 18:37:55.754005 tx_last_pass[1][1][6] = 1007
4234 18:37:55.757232 tx_win_center[1][1][7] = 995
4235 18:37:55.760718 tx_first_pass[1][1][7] = 983
4236 18:37:55.761215 tx_last_pass[1][1][7] = 1007
4237 18:37:55.764044 tx_win_center[1][1][8] = 984
4238 18:37:55.766746 tx_first_pass[1][1][8] = 972
4239 18:37:55.770430 tx_last_pass[1][1][8] = 996
4240 18:37:55.770910 tx_win_center[1][1][9] = 983
4241 18:37:55.773622 tx_first_pass[1][1][9] = 971
4242 18:37:55.776944 tx_last_pass[1][1][9] = 995
4243 18:37:55.780390 tx_win_center[1][1][10] = 987
4244 18:37:55.783308 tx_first_pass[1][1][10] = 975
4245 18:37:55.783693 tx_last_pass[1][1][10] = 999
4246 18:37:55.786904 tx_win_center[1][1][11] = 987
4247 18:37:55.790305 tx_first_pass[1][1][11] = 975
4248 18:37:55.793204 tx_last_pass[1][1][11] = 999
4249 18:37:55.796230 tx_win_center[1][1][12] = 987
4250 18:37:55.799990 tx_first_pass[1][1][12] = 975
4251 18:37:55.800590 tx_last_pass[1][1][12] = 999
4252 18:37:55.803453 tx_win_center[1][1][13] = 987
4253 18:37:55.806217 tx_first_pass[1][1][13] = 976
4254 18:37:55.809420 tx_last_pass[1][1][13] = 999
4255 18:37:55.812748 tx_win_center[1][1][14] = 987
4256 18:37:55.813165 tx_first_pass[1][1][14] = 975
4257 18:37:55.816320 tx_last_pass[1][1][14] = 999
4258 18:37:55.819535 tx_win_center[1][1][15] = 981
4259 18:37:55.822607 tx_first_pass[1][1][15] = 969
4260 18:37:55.825611 tx_last_pass[1][1][15] = 993
4261 18:37:55.825996 dump params rx window
4262 18:37:55.829470 rx_firspass[0][0][0] = 7
4263 18:37:55.832459 rx_lastpass[0][0][0] = 36
4264 18:37:55.832925 rx_firspass[0][0][1] = 8
4265 18:37:55.835482 rx_lastpass[0][0][1] = 36
4266 18:37:55.839053 rx_firspass[0][0][2] = 6
4267 18:37:55.842146 rx_lastpass[0][0][2] = 39
4268 18:37:55.842525 rx_firspass[0][0][3] = -3
4269 18:37:55.845704 rx_lastpass[0][0][3] = 30
4270 18:37:55.848718 rx_firspass[0][0][4] = 6
4271 18:37:55.849101 rx_lastpass[0][0][4] = 36
4272 18:37:55.852085 rx_firspass[0][0][5] = 3
4273 18:37:55.855366 rx_lastpass[0][0][5] = 33
4274 18:37:55.858506 rx_firspass[0][0][6] = 3
4275 18:37:55.858863 rx_lastpass[0][0][6] = 33
4276 18:37:55.861708 rx_firspass[0][0][7] = 4
4277 18:37:55.864963 rx_lastpass[0][0][7] = 36
4278 18:37:55.865316 rx_firspass[0][0][8] = -2
4279 18:37:55.868159 rx_lastpass[0][0][8] = 30
4280 18:37:55.871322 rx_firspass[0][0][9] = 2
4281 18:37:55.874766 rx_lastpass[0][0][9] = 32
4282 18:37:55.875118 rx_firspass[0][0][10] = 9
4283 18:37:55.877963 rx_lastpass[0][0][10] = 37
4284 18:37:55.881270 rx_firspass[0][0][11] = 0
4285 18:37:55.884419 rx_lastpass[0][0][11] = 30
4286 18:37:55.884775 rx_firspass[0][0][12] = 3
4287 18:37:55.887696 rx_lastpass[0][0][12] = 31
4288 18:37:55.890814 rx_firspass[0][0][13] = 1
4289 18:37:55.894473 rx_lastpass[0][0][13] = 32
4290 18:37:55.894829 rx_firspass[0][0][14] = 0
4291 18:37:55.897482 rx_lastpass[0][0][14] = 35
4292 18:37:55.901094 rx_firspass[0][0][15] = 4
4293 18:37:55.904037 rx_lastpass[0][0][15] = 36
4294 18:37:55.904422 rx_firspass[0][1][0] = 4
4295 18:37:55.907339 rx_lastpass[0][1][0] = 39
4296 18:37:55.910794 rx_firspass[0][1][1] = 4
4297 18:37:55.911177 rx_lastpass[0][1][1] = 38
4298 18:37:55.913949 rx_firspass[0][1][2] = 6
4299 18:37:55.917179 rx_lastpass[0][1][2] = 40
4300 18:37:55.917551 rx_firspass[0][1][3] = -2
4301 18:37:55.920555 rx_lastpass[0][1][3] = 31
4302 18:37:55.923694 rx_firspass[0][1][4] = 3
4303 18:37:55.927491 rx_lastpass[0][1][4] = 38
4304 18:37:55.927919 rx_firspass[0][1][5] = 0
4305 18:37:55.930451 rx_lastpass[0][1][5] = 34
4306 18:37:55.933718 rx_firspass[0][1][6] = 1
4307 18:37:55.934068 rx_lastpass[0][1][6] = 35
4308 18:37:55.937160 rx_firspass[0][1][7] = 4
4309 18:37:55.940243 rx_lastpass[0][1][7] = 36
4310 18:37:55.943600 rx_firspass[0][1][8] = -4
4311 18:37:55.943950 rx_lastpass[0][1][8] = 32
4312 18:37:55.946920 rx_firspass[0][1][9] = -2
4313 18:37:55.950090 rx_lastpass[0][1][9] = 34
4314 18:37:55.950441 rx_firspass[0][1][10] = 7
4315 18:37:55.953313 rx_lastpass[0][1][10] = 40
4316 18:37:55.956671 rx_firspass[0][1][11] = -2
4317 18:37:55.959990 rx_lastpass[0][1][11] = 32
4318 18:37:55.960340 rx_firspass[0][1][12] = -1
4319 18:37:55.963178 rx_lastpass[0][1][12] = 34
4320 18:37:55.966505 rx_firspass[0][1][13] = -1
4321 18:37:55.969955 rx_lastpass[0][1][13] = 33
4322 18:37:55.970389 rx_firspass[0][1][14] = 2
4323 18:37:55.973075 rx_lastpass[0][1][14] = 35
4324 18:37:55.976217 rx_firspass[0][1][15] = 5
4325 18:37:55.979718 rx_lastpass[0][1][15] = 37
4326 18:37:55.980172 rx_firspass[1][0][0] = 5
4327 18:37:55.983018 rx_lastpass[1][0][0] = 37
4328 18:37:55.986237 rx_firspass[1][0][1] = 3
4329 18:37:55.989182 rx_lastpass[1][0][1] = 37
4330 18:37:55.989702 rx_firspass[1][0][2] = 0
4331 18:37:55.992836 rx_lastpass[1][0][2] = 35
4332 18:37:55.995892 rx_firspass[1][0][3] = 0
4333 18:37:55.996331 rx_lastpass[1][0][3] = 31
4334 18:37:55.999335 rx_firspass[1][0][4] = 4
4335 18:37:56.002837 rx_lastpass[1][0][4] = 36
4336 18:37:56.003322 rx_firspass[1][0][5] = 8
4337 18:37:56.005853 rx_lastpass[1][0][5] = 38
4338 18:37:56.009377 rx_firspass[1][0][6] = 5
4339 18:37:56.012290 rx_lastpass[1][0][6] = 38
4340 18:37:56.012720 rx_firspass[1][0][7] = 5
4341 18:37:56.015822 rx_lastpass[1][0][7] = 35
4342 18:37:56.019261 rx_firspass[1][0][8] = 1
4343 18:37:56.019763 rx_lastpass[1][0][8] = 33
4344 18:37:56.022291 rx_firspass[1][0][9] = 0
4345 18:37:56.025510 rx_lastpass[1][0][9] = 32
4346 18:37:56.028657 rx_firspass[1][0][10] = 3
4347 18:37:56.029064 rx_lastpass[1][0][10] = 36
4348 18:37:56.031988 rx_firspass[1][0][11] = 3
4349 18:37:56.035395 rx_lastpass[1][0][11] = 37
4350 18:37:56.038786 rx_firspass[1][0][12] = 6
4351 18:37:56.039266 rx_lastpass[1][0][12] = 36
4352 18:37:56.042078 rx_firspass[1][0][13] = 5
4353 18:37:56.045406 rx_lastpass[1][0][13] = 36
4354 18:37:56.048317 rx_firspass[1][0][14] = 5
4355 18:37:56.048693 rx_lastpass[1][0][14] = 37
4356 18:37:56.051726 rx_firspass[1][0][15] = -4
4357 18:37:56.055165 rx_lastpass[1][0][15] = 30
4358 18:37:56.055641 rx_firspass[1][1][0] = 4
4359 18:37:56.058061 rx_lastpass[1][1][0] = 40
4360 18:37:56.061299 rx_firspass[1][1][1] = 4
4361 18:37:56.064770 rx_lastpass[1][1][1] = 38
4362 18:37:56.065164 rx_firspass[1][1][2] = 3
4363 18:37:56.068102 rx_lastpass[1][1][2] = 34
4364 18:37:56.071329 rx_firspass[1][1][3] = -1
4365 18:37:56.074461 rx_lastpass[1][1][3] = 33
4366 18:37:56.074959 rx_firspass[1][1][4] = 5
4367 18:37:56.078153 rx_lastpass[1][1][4] = 39
4368 18:37:56.080958 rx_firspass[1][1][5] = 6
4369 18:37:56.081336 rx_lastpass[1][1][5] = 40
4370 18:37:56.084702 rx_firspass[1][1][6] = 7
4371 18:37:56.087774 rx_lastpass[1][1][6] = 40
4372 18:37:56.088243 rx_firspass[1][1][7] = 3
4373 18:37:56.090851 rx_lastpass[1][1][7] = 37
4374 18:37:56.094112 rx_firspass[1][1][8] = -1
4375 18:37:56.097179 rx_lastpass[1][1][8] = 34
4376 18:37:56.097678 rx_firspass[1][1][9] = -2
4377 18:37:56.100380 rx_lastpass[1][1][9] = 32
4378 18:37:56.103953 rx_firspass[1][1][10] = 3
4379 18:37:56.107374 rx_lastpass[1][1][10] = 38
4380 18:37:56.107917 rx_firspass[1][1][11] = 4
4381 18:37:56.110305 rx_lastpass[1][1][11] = 38
4382 18:37:56.113676 rx_firspass[1][1][12] = 3
4383 18:37:56.116774 rx_lastpass[1][1][12] = 37
4384 18:37:56.117151 rx_firspass[1][1][13] = 4
4385 18:37:56.120493 rx_lastpass[1][1][13] = 39
4386 18:37:56.123584 rx_firspass[1][1][14] = 4
4387 18:37:56.124065 rx_lastpass[1][1][14] = 40
4388 18:37:56.126717 rx_firspass[1][1][15] = -4
4389 18:37:56.129961 rx_lastpass[1][1][15] = 31
4390 18:37:56.133217 dump params clk_delay
4391 18:37:56.133750 clk_delay[0] = -1
4392 18:37:56.136713 clk_delay[1] = 0
4393 18:37:56.137192 dump params dqs_delay
4394 18:37:56.139720 dqs_delay[0][0] = 0
4395 18:37:56.140193 dqs_delay[0][1] = 0
4396 18:37:56.143179 dqs_delay[1][0] = 0
4397 18:37:56.143554 dqs_delay[1][1] = -1
4398 18:37:56.146414 dump params delay_cell_unit = 753
4399 18:37:56.150017 dump source = 0x0
4400 18:37:56.152769 dump params frequency:1200
4401 18:37:56.153147 dump params rank number:2
4402 18:37:56.153520
4403 18:37:56.156662 dump params write leveling
4404 18:37:56.159691 write leveling[0][0][0] = 0x0
4405 18:37:56.162659 write leveling[0][0][1] = 0x0
4406 18:37:56.166326 write leveling[0][1][0] = 0x0
4407 18:37:56.166805 write leveling[0][1][1] = 0x0
4408 18:37:56.169198 write leveling[1][0][0] = 0x0
4409 18:37:56.172522 write leveling[1][0][1] = 0x0
4410 18:37:56.176141 write leveling[1][1][0] = 0x0
4411 18:37:56.179497 write leveling[1][1][1] = 0x0
4412 18:37:56.180089 dump params cbt_cs
4413 18:37:56.182372 cbt_cs[0][0] = 0x0
4414 18:37:56.182776 cbt_cs[0][1] = 0x0
4415 18:37:56.186212 cbt_cs[1][0] = 0x0
4416 18:37:56.186688 cbt_cs[1][1] = 0x0
4417 18:37:56.189104 dump params cbt_mr12
4418 18:37:56.189643 cbt_mr12[0][0] = 0x0
4419 18:37:56.192090 cbt_mr12[0][1] = 0x0
4420 18:37:56.195603 cbt_mr12[1][0] = 0x0
4421 18:37:56.195980 cbt_mr12[1][1] = 0x0
4422 18:37:56.198774 dump params tx window
4423 18:37:56.201887 tx_center_min[0][0][0] = 0
4424 18:37:56.202265 tx_center_max[0][0][0] = 0
4425 18:37:56.205293 tx_center_min[0][0][1] = 0
4426 18:37:56.208709 tx_center_max[0][0][1] = 0
4427 18:37:56.212120 tx_center_min[0][1][0] = 0
4428 18:37:56.212601 tx_center_max[0][1][0] = 0
4429 18:37:56.215175 tx_center_min[0][1][1] = 0
4430 18:37:56.218256 tx_center_max[0][1][1] = 0
4431 18:37:56.221734 tx_center_min[1][0][0] = 0
4432 18:37:56.222145 tx_center_max[1][0][0] = 0
4433 18:37:56.225152 tx_center_min[1][0][1] = 0
4434 18:37:56.228466 tx_center_max[1][0][1] = 0
4435 18:37:56.231596 tx_center_min[1][1][0] = 0
4436 18:37:56.232085 tx_center_max[1][1][0] = 0
4437 18:37:56.235079 tx_center_min[1][1][1] = 0
4438 18:37:56.238072 tx_center_max[1][1][1] = 0
4439 18:37:56.238590 dump params tx window
4440 18:37:56.241361 tx_win_center[0][0][0] = 0
4441 18:37:56.244933 tx_first_pass[0][0][0] = 0
4442 18:37:56.248299 tx_last_pass[0][0][0] = 0
4443 18:37:56.248822 tx_win_center[0][0][1] = 0
4444 18:37:56.251620 tx_first_pass[0][0][1] = 0
4445 18:37:56.254146 tx_last_pass[0][0][1] = 0
4446 18:37:56.257757 tx_win_center[0][0][2] = 0
4447 18:37:56.258143 tx_first_pass[0][0][2] = 0
4448 18:37:56.261518 tx_last_pass[0][0][2] = 0
4449 18:37:56.264486 tx_win_center[0][0][3] = 0
4450 18:37:56.267567 tx_first_pass[0][0][3] = 0
4451 18:37:56.268082 tx_last_pass[0][0][3] = 0
4452 18:37:56.270968 tx_win_center[0][0][4] = 0
4453 18:37:56.274122 tx_first_pass[0][0][4] = 0
4454 18:37:56.274548 tx_last_pass[0][0][4] = 0
4455 18:37:56.277632 tx_win_center[0][0][5] = 0
4456 18:37:56.281004 tx_first_pass[0][0][5] = 0
4457 18:37:56.284030 tx_last_pass[0][0][5] = 0
4458 18:37:56.284563 tx_win_center[0][0][6] = 0
4459 18:37:56.287365 tx_first_pass[0][0][6] = 0
4460 18:37:56.290510 tx_last_pass[0][0][6] = 0
4461 18:37:56.294268 tx_win_center[0][0][7] = 0
4462 18:37:56.295073 tx_first_pass[0][0][7] = 0
4463 18:37:56.296886 tx_last_pass[0][0][7] = 0
4464 18:37:56.300659 tx_win_center[0][0][8] = 0
4465 18:37:56.303764 tx_first_pass[0][0][8] = 0
4466 18:37:56.304272 tx_last_pass[0][0][8] = 0
4467 18:37:56.306501 tx_win_center[0][0][9] = 0
4468 18:37:56.309886 tx_first_pass[0][0][9] = 0
4469 18:37:56.313274 tx_last_pass[0][0][9] = 0
4470 18:37:56.313862 tx_win_center[0][0][10] = 0
4471 18:37:56.317033 tx_first_pass[0][0][10] = 0
4472 18:37:56.319942 tx_last_pass[0][0][10] = 0
4473 18:37:56.322943 tx_win_center[0][0][11] = 0
4474 18:37:56.323359 tx_first_pass[0][0][11] = 0
4475 18:37:56.326209 tx_last_pass[0][0][11] = 0
4476 18:37:56.329693 tx_win_center[0][0][12] = 0
4477 18:37:56.333190 tx_first_pass[0][0][12] = 0
4478 18:37:56.333786 tx_last_pass[0][0][12] = 0
4479 18:37:56.336081 tx_win_center[0][0][13] = 0
4480 18:37:56.338964 tx_first_pass[0][0][13] = 0
4481 18:37:56.343237 tx_last_pass[0][0][13] = 0
4482 18:37:56.343766 tx_win_center[0][0][14] = 0
4483 18:37:56.345998 tx_first_pass[0][0][14] = 0
4484 18:37:56.349555 tx_last_pass[0][0][14] = 0
4485 18:37:56.352561 tx_win_center[0][0][15] = 0
4486 18:37:56.355736 tx_first_pass[0][0][15] = 0
4487 18:37:56.356260 tx_last_pass[0][0][15] = 0
4488 18:37:56.359171 tx_win_center[0][1][0] = 0
4489 18:37:56.362167 tx_first_pass[0][1][0] = 0
4490 18:37:56.365603 tx_last_pass[0][1][0] = 0
4491 18:37:56.366118 tx_win_center[0][1][1] = 0
4492 18:37:56.368887 tx_first_pass[0][1][1] = 0
4493 18:37:56.371853 tx_last_pass[0][1][1] = 0
4494 18:37:56.372276 tx_win_center[0][1][2] = 0
4495 18:37:56.375311 tx_first_pass[0][1][2] = 0
4496 18:37:56.378624 tx_last_pass[0][1][2] = 0
4497 18:37:56.381882 tx_win_center[0][1][3] = 0
4498 18:37:56.382418 tx_first_pass[0][1][3] = 0
4499 18:37:56.385566 tx_last_pass[0][1][3] = 0
4500 18:37:56.388653 tx_win_center[0][1][4] = 0
4501 18:37:56.391870 tx_first_pass[0][1][4] = 0
4502 18:37:56.392398 tx_last_pass[0][1][4] = 0
4503 18:37:56.394792 tx_win_center[0][1][5] = 0
4504 18:37:56.398109 tx_first_pass[0][1][5] = 0
4505 18:37:56.401658 tx_last_pass[0][1][5] = 0
4506 18:37:56.402184 tx_win_center[0][1][6] = 0
4507 18:37:56.404763 tx_first_pass[0][1][6] = 0
4508 18:37:56.408280 tx_last_pass[0][1][6] = 0
4509 18:37:56.411483 tx_win_center[0][1][7] = 0
4510 18:37:56.412000 tx_first_pass[0][1][7] = 0
4511 18:37:56.414546 tx_last_pass[0][1][7] = 0
4512 18:37:56.418276 tx_win_center[0][1][8] = 0
4513 18:37:56.421260 tx_first_pass[0][1][8] = 0
4514 18:37:56.421829 tx_last_pass[0][1][8] = 0
4515 18:37:56.424736 tx_win_center[0][1][9] = 0
4516 18:37:56.427719 tx_first_pass[0][1][9] = 0
4517 18:37:56.428236 tx_last_pass[0][1][9] = 0
4518 18:37:56.431189 tx_win_center[0][1][10] = 0
4519 18:37:56.434138 tx_first_pass[0][1][10] = 0
4520 18:37:56.437383 tx_last_pass[0][1][10] = 0
4521 18:37:56.437934 tx_win_center[0][1][11] = 0
4522 18:37:56.441055 tx_first_pass[0][1][11] = 0
4523 18:37:56.444298 tx_last_pass[0][1][11] = 0
4524 18:37:56.447540 tx_win_center[0][1][12] = 0
4525 18:37:56.450730 tx_first_pass[0][1][12] = 0
4526 18:37:56.451253 tx_last_pass[0][1][12] = 0
4527 18:37:56.454002 tx_win_center[0][1][13] = 0
4528 18:37:56.457085 tx_first_pass[0][1][13] = 0
4529 18:37:56.460453 tx_last_pass[0][1][13] = 0
4530 18:37:56.460986 tx_win_center[0][1][14] = 0
4531 18:37:56.463835 tx_first_pass[0][1][14] = 0
4532 18:37:56.466889 tx_last_pass[0][1][14] = 0
4533 18:37:56.469964 tx_win_center[0][1][15] = 0
4534 18:37:56.470386 tx_first_pass[0][1][15] = 0
4535 18:37:56.473404 tx_last_pass[0][1][15] = 0
4536 18:37:56.476584 tx_win_center[1][0][0] = 0
4537 18:37:56.480078 tx_first_pass[1][0][0] = 0
4538 18:37:56.480609 tx_last_pass[1][0][0] = 0
4539 18:37:56.483602 tx_win_center[1][0][1] = 0
4540 18:37:56.486353 tx_first_pass[1][0][1] = 0
4541 18:37:56.489582 tx_last_pass[1][0][1] = 0
4542 18:37:56.490013 tx_win_center[1][0][2] = 0
4543 18:37:56.493352 tx_first_pass[1][0][2] = 0
4544 18:37:56.496322 tx_last_pass[1][0][2] = 0
4545 18:37:56.499802 tx_win_center[1][0][3] = 0
4546 18:37:56.500329 tx_first_pass[1][0][3] = 0
4547 18:37:56.502849 tx_last_pass[1][0][3] = 0
4548 18:37:56.506075 tx_win_center[1][0][4] = 0
4549 18:37:56.509971 tx_first_pass[1][0][4] = 0
4550 18:37:56.510503 tx_last_pass[1][0][4] = 0
4551 18:37:56.512755 tx_win_center[1][0][5] = 0
4552 18:37:56.516434 tx_first_pass[1][0][5] = 0
4553 18:37:56.516962 tx_last_pass[1][0][5] = 0
4554 18:37:56.519513 tx_win_center[1][0][6] = 0
4555 18:37:56.523047 tx_first_pass[1][0][6] = 0
4556 18:37:56.526169 tx_last_pass[1][0][6] = 0
4557 18:37:56.526702 tx_win_center[1][0][7] = 0
4558 18:37:56.529349 tx_first_pass[1][0][7] = 0
4559 18:37:56.532777 tx_last_pass[1][0][7] = 0
4560 18:37:56.535757 tx_win_center[1][0][8] = 0
4561 18:37:56.536285 tx_first_pass[1][0][8] = 0
4562 18:37:56.539311 tx_last_pass[1][0][8] = 0
4563 18:37:56.542329 tx_win_center[1][0][9] = 0
4564 18:37:56.545880 tx_first_pass[1][0][9] = 0
4565 18:37:56.546401 tx_last_pass[1][0][9] = 0
4566 18:37:56.548959 tx_win_center[1][0][10] = 0
4567 18:37:56.552471 tx_first_pass[1][0][10] = 0
4568 18:37:56.555407 tx_last_pass[1][0][10] = 0
4569 18:37:56.555933 tx_win_center[1][0][11] = 0
4570 18:37:56.558524 tx_first_pass[1][0][11] = 0
4571 18:37:56.561788 tx_last_pass[1][0][11] = 0
4572 18:37:56.565138 tx_win_center[1][0][12] = 0
4573 18:37:56.565698 tx_first_pass[1][0][12] = 0
4574 18:37:56.568203 tx_last_pass[1][0][12] = 0
4575 18:37:56.572045 tx_win_center[1][0][13] = 0
4576 18:37:56.574912 tx_first_pass[1][0][13] = 0
4577 18:37:56.575398 tx_last_pass[1][0][13] = 0
4578 18:37:56.578073 tx_win_center[1][0][14] = 0
4579 18:37:56.581592 tx_first_pass[1][0][14] = 0
4580 18:37:56.584542 tx_last_pass[1][0][14] = 0
4581 18:37:56.588048 tx_win_center[1][0][15] = 0
4582 18:37:56.588599 tx_first_pass[1][0][15] = 0
4583 18:37:56.591235 tx_last_pass[1][0][15] = 0
4584 18:37:56.594339 tx_win_center[1][1][0] = 0
4585 18:37:56.597653 tx_first_pass[1][1][0] = 0
4586 18:37:56.598099 tx_last_pass[1][1][0] = 0
4587 18:37:56.601193 tx_win_center[1][1][1] = 0
4588 18:37:56.604138 tx_first_pass[1][1][1] = 0
4589 18:37:56.604580 tx_last_pass[1][1][1] = 0
4590 18:37:56.607519 tx_win_center[1][1][2] = 0
4591 18:37:56.611095 tx_first_pass[1][1][2] = 0
4592 18:37:56.614238 tx_last_pass[1][1][2] = 0
4593 18:37:56.614642 tx_win_center[1][1][3] = 0
4594 18:37:56.617281 tx_first_pass[1][1][3] = 0
4595 18:37:56.621103 tx_last_pass[1][1][3] = 0
4596 18:37:56.624120 tx_win_center[1][1][4] = 0
4597 18:37:56.624626 tx_first_pass[1][1][4] = 0
4598 18:37:56.627459 tx_last_pass[1][1][4] = 0
4599 18:37:56.630625 tx_win_center[1][1][5] = 0
4600 18:37:56.634015 tx_first_pass[1][1][5] = 0
4601 18:37:56.634522 tx_last_pass[1][1][5] = 0
4602 18:37:56.637466 tx_win_center[1][1][6] = 0
4603 18:37:56.640480 tx_first_pass[1][1][6] = 0
4604 18:37:56.643752 tx_last_pass[1][1][6] = 0
4605 18:37:56.644259 tx_win_center[1][1][7] = 0
4606 18:37:56.647272 tx_first_pass[1][1][7] = 0
4607 18:37:56.650401 tx_last_pass[1][1][7] = 0
4608 18:37:56.650908 tx_win_center[1][1][8] = 0
4609 18:37:56.653678 tx_first_pass[1][1][8] = 0
4610 18:37:56.657071 tx_last_pass[1][1][8] = 0
4611 18:37:56.659973 tx_win_center[1][1][9] = 0
4612 18:37:56.660481 tx_first_pass[1][1][9] = 0
4613 18:37:56.663329 tx_last_pass[1][1][9] = 0
4614 18:37:56.666226 tx_win_center[1][1][10] = 0
4615 18:37:56.669947 tx_first_pass[1][1][10] = 0
4616 18:37:56.670455 tx_last_pass[1][1][10] = 0
4617 18:37:56.673410 tx_win_center[1][1][11] = 0
4618 18:37:56.676548 tx_first_pass[1][1][11] = 0
4619 18:37:56.679634 tx_last_pass[1][1][11] = 0
4620 18:37:56.680025 tx_win_center[1][1][12] = 0
4621 18:37:56.682810 tx_first_pass[1][1][12] = 0
4622 18:37:56.686214 tx_last_pass[1][1][12] = 0
4623 18:37:56.689381 tx_win_center[1][1][13] = 0
4624 18:37:56.693031 tx_first_pass[1][1][13] = 0
4625 18:37:56.693579 tx_last_pass[1][1][13] = 0
4626 18:37:56.695953 tx_win_center[1][1][14] = 0
4627 18:37:56.699186 tx_first_pass[1][1][14] = 0
4628 18:37:56.702359 tx_last_pass[1][1][14] = 0
4629 18:37:56.702748 tx_win_center[1][1][15] = 0
4630 18:37:56.705936 tx_first_pass[1][1][15] = 0
4631 18:37:56.708943 tx_last_pass[1][1][15] = 0
4632 18:37:56.709327 dump params rx window
4633 18:37:56.712162 rx_firspass[0][0][0] = 0
4634 18:37:56.715485 rx_lastpass[0][0][0] = 0
4635 18:37:56.718901 rx_firspass[0][0][1] = 0
4636 18:37:56.719288 rx_lastpass[0][0][1] = 0
4637 18:37:56.722021 rx_firspass[0][0][2] = 0
4638 18:37:56.725484 rx_lastpass[0][0][2] = 0
4639 18:37:56.725974 rx_firspass[0][0][3] = 0
4640 18:37:56.729187 rx_lastpass[0][0][3] = 0
4641 18:37:56.732177 rx_firspass[0][0][4] = 0
4642 18:37:56.732666 rx_lastpass[0][0][4] = 0
4643 18:37:56.735359 rx_firspass[0][0][5] = 0
4644 18:37:56.738816 rx_lastpass[0][0][5] = 0
4645 18:37:56.742235 rx_firspass[0][0][6] = 0
4646 18:37:56.742727 rx_lastpass[0][0][6] = 0
4647 18:37:56.745271 rx_firspass[0][0][7] = 0
4648 18:37:56.748401 rx_lastpass[0][0][7] = 0
4649 18:37:56.748890 rx_firspass[0][0][8] = 0
4650 18:37:56.752033 rx_lastpass[0][0][8] = 0
4651 18:37:56.755325 rx_firspass[0][0][9] = 0
4652 18:37:56.755819 rx_lastpass[0][0][9] = 0
4653 18:37:56.758021 rx_firspass[0][0][10] = 0
4654 18:37:56.761679 rx_lastpass[0][0][10] = 0
4655 18:37:56.765124 rx_firspass[0][0][11] = 0
4656 18:37:56.765662 rx_lastpass[0][0][11] = 0
4657 18:37:56.768197 rx_firspass[0][0][12] = 0
4658 18:37:56.771426 rx_lastpass[0][0][12] = 0
4659 18:37:56.771923 rx_firspass[0][0][13] = 0
4660 18:37:56.774409 rx_lastpass[0][0][13] = 0
4661 18:37:56.778029 rx_firspass[0][0][14] = 0
4662 18:37:56.781517 rx_lastpass[0][0][14] = 0
4663 18:37:56.782031 rx_firspass[0][0][15] = 0
4664 18:37:56.784508 rx_lastpass[0][0][15] = 0
4665 18:37:56.787618 rx_firspass[0][1][0] = 0
4666 18:37:56.791017 rx_lastpass[0][1][0] = 0
4667 18:37:56.791402 rx_firspass[0][1][1] = 0
4668 18:37:56.794405 rx_lastpass[0][1][1] = 0
4669 18:37:56.797381 rx_firspass[0][1][2] = 0
4670 18:37:56.798000 rx_lastpass[0][1][2] = 0
4671 18:37:56.801303 rx_firspass[0][1][3] = 0
4672 18:37:56.804012 rx_lastpass[0][1][3] = 0
4673 18:37:56.804414 rx_firspass[0][1][4] = 0
4674 18:37:56.807464 rx_lastpass[0][1][4] = 0
4675 18:37:56.810362 rx_firspass[0][1][5] = 0
4676 18:37:56.810763 rx_lastpass[0][1][5] = 0
4677 18:37:56.813978 rx_firspass[0][1][6] = 0
4678 18:37:56.817196 rx_lastpass[0][1][6] = 0
4679 18:37:56.820723 rx_firspass[0][1][7] = 0
4680 18:37:56.821232 rx_lastpass[0][1][7] = 0
4681 18:37:56.823585 rx_firspass[0][1][8] = 0
4682 18:37:56.827158 rx_lastpass[0][1][8] = 0
4683 18:37:56.827666 rx_firspass[0][1][9] = 0
4684 18:37:56.830328 rx_lastpass[0][1][9] = 0
4685 18:37:56.833424 rx_firspass[0][1][10] = 0
4686 18:37:56.833879 rx_lastpass[0][1][10] = 0
4687 18:37:56.837019 rx_firspass[0][1][11] = 0
4688 18:37:56.840435 rx_lastpass[0][1][11] = 0
4689 18:37:56.843591 rx_firspass[0][1][12] = 0
4690 18:37:56.844083 rx_lastpass[0][1][12] = 0
4691 18:37:56.846647 rx_firspass[0][1][13] = 0
4692 18:37:56.850081 rx_lastpass[0][1][13] = 0
4693 18:37:56.853475 rx_firspass[0][1][14] = 0
4694 18:37:56.853974 rx_lastpass[0][1][14] = 0
4695 18:37:56.856898 rx_firspass[0][1][15] = 0
4696 18:37:56.859994 rx_lastpass[0][1][15] = 0
4697 18:37:56.860486 rx_firspass[1][0][0] = 0
4698 18:37:56.863229 rx_lastpass[1][0][0] = 0
4699 18:37:56.866236 rx_firspass[1][0][1] = 0
4700 18:37:56.869508 rx_lastpass[1][0][1] = 0
4701 18:37:56.870007 rx_firspass[1][0][2] = 0
4702 18:37:56.873076 rx_lastpass[1][0][2] = 0
4703 18:37:56.876247 rx_firspass[1][0][3] = 0
4704 18:37:56.876752 rx_lastpass[1][0][3] = 0
4705 18:37:56.879516 rx_firspass[1][0][4] = 0
4706 18:37:56.882739 rx_lastpass[1][0][4] = 0
4707 18:37:56.883127 rx_firspass[1][0][5] = 0
4708 18:37:56.886211 rx_lastpass[1][0][5] = 0
4709 18:37:56.889549 rx_firspass[1][0][6] = 0
4710 18:37:56.890046 rx_lastpass[1][0][6] = 0
4711 18:37:56.892384 rx_firspass[1][0][7] = 0
4712 18:37:56.896120 rx_lastpass[1][0][7] = 0
4713 18:37:56.898917 rx_firspass[1][0][8] = 0
4714 18:37:56.899317 rx_lastpass[1][0][8] = 0
4715 18:37:56.902261 rx_firspass[1][0][9] = 0
4716 18:37:56.905600 rx_lastpass[1][0][9] = 0
4717 18:37:56.905987 rx_firspass[1][0][10] = 0
4718 18:37:56.908921 rx_lastpass[1][0][10] = 0
4719 18:37:56.912340 rx_firspass[1][0][11] = 0
4720 18:37:56.915134 rx_lastpass[1][0][11] = 0
4721 18:37:56.915524 rx_firspass[1][0][12] = 0
4722 18:37:56.918527 rx_lastpass[1][0][12] = 0
4723 18:37:56.922014 rx_firspass[1][0][13] = 0
4724 18:37:56.922542 rx_lastpass[1][0][13] = 0
4725 18:37:56.925494 rx_firspass[1][0][14] = 0
4726 18:37:56.929064 rx_lastpass[1][0][14] = 0
4727 18:37:56.932052 rx_firspass[1][0][15] = 0
4728 18:37:56.932543 rx_lastpass[1][0][15] = 0
4729 18:37:56.934884 rx_firspass[1][1][0] = 0
4730 18:37:56.938264 rx_lastpass[1][1][0] = 0
4731 18:37:56.938649 rx_firspass[1][1][1] = 0
4732 18:37:56.941601 rx_lastpass[1][1][1] = 0
4733 18:37:56.944640 rx_firspass[1][1][2] = 0
4734 18:37:56.948541 rx_lastpass[1][1][2] = 0
4735 18:37:56.949030 rx_firspass[1][1][3] = 0
4736 18:37:56.951556 rx_lastpass[1][1][3] = 0
4737 18:37:56.954784 rx_firspass[1][1][4] = 0
4738 18:37:56.955281 rx_lastpass[1][1][4] = 0
4739 18:37:56.958236 rx_firspass[1][1][5] = 0
4740 18:37:56.961543 rx_lastpass[1][1][5] = 0
4741 18:37:56.962055 rx_firspass[1][1][6] = 0
4742 18:37:56.964597 rx_lastpass[1][1][6] = 0
4743 18:37:56.967759 rx_firspass[1][1][7] = 0
4744 18:37:56.971062 rx_lastpass[1][1][7] = 0
4745 18:37:56.971449 rx_firspass[1][1][8] = 0
4746 18:37:56.974085 rx_lastpass[1][1][8] = 0
4747 18:37:56.977684 rx_firspass[1][1][9] = 0
4748 18:37:56.978176 rx_lastpass[1][1][9] = 0
4749 18:37:56.980911 rx_firspass[1][1][10] = 0
4750 18:37:56.984101 rx_lastpass[1][1][10] = 0
4751 18:37:56.984594 rx_firspass[1][1][11] = 0
4752 18:37:56.987787 rx_lastpass[1][1][11] = 0
4753 18:37:56.990475 rx_firspass[1][1][12] = 0
4754 18:37:56.994324 rx_lastpass[1][1][12] = 0
4755 18:37:56.994819 rx_firspass[1][1][13] = 0
4756 18:37:56.996979 rx_lastpass[1][1][13] = 0
4757 18:37:57.000312 rx_firspass[1][1][14] = 0
4758 18:37:57.003807 rx_lastpass[1][1][14] = 0
4759 18:37:57.004196 rx_firspass[1][1][15] = 0
4760 18:37:57.007165 rx_lastpass[1][1][15] = 0
4761 18:37:57.010255 dump params clk_delay
4762 18:37:57.010660 clk_delay[0] = 0
4763 18:37:57.013550 clk_delay[1] = 0
4764 18:37:57.013941 dump params dqs_delay
4765 18:37:57.016824 dqs_delay[0][0] = 0
4766 18:37:57.017212 dqs_delay[0][1] = 0
4767 18:37:57.019819 dqs_delay[1][0] = 0
4768 18:37:57.020205 dqs_delay[1][1] = 0
4769 18:37:57.023295 dump params delay_cell_unit = 753
4770 18:37:57.026359 dump source = 0x0
4771 18:37:57.029861 dump params frequency:800
4772 18:37:57.030245 dump params rank number:2
4773 18:37:57.030548
4774 18:37:57.033024 dump params write leveling
4775 18:37:57.036227 write leveling[0][0][0] = 0x0
4776 18:37:57.039872 write leveling[0][0][1] = 0x0
4777 18:37:57.040264 write leveling[0][1][0] = 0x0
4778 18:37:57.043145 write leveling[0][1][1] = 0x0
4779 18:37:57.046353 write leveling[1][0][0] = 0x0
4780 18:37:57.049191 write leveling[1][0][1] = 0x0
4781 18:37:57.053269 write leveling[1][1][0] = 0x0
4782 18:37:57.055948 write leveling[1][1][1] = 0x0
4783 18:37:57.056427 dump params cbt_cs
4784 18:37:57.059632 cbt_cs[0][0] = 0x0
4785 18:37:57.060129 cbt_cs[0][1] = 0x0
4786 18:37:57.062682 cbt_cs[1][0] = 0x0
4787 18:37:57.063071 cbt_cs[1][1] = 0x0
4788 18:37:57.065587 dump params cbt_mr12
4789 18:37:57.065979 cbt_mr12[0][0] = 0x0
4790 18:37:57.068815 cbt_mr12[0][1] = 0x0
4791 18:37:57.072326 cbt_mr12[1][0] = 0x0
4792 18:37:57.072816 cbt_mr12[1][1] = 0x0
4793 18:37:57.075682 dump params tx window
4794 18:37:57.076197 tx_center_min[0][0][0] = 0
4795 18:37:57.079133 tx_center_max[0][0][0] = 0
4796 18:37:57.082028 tx_center_min[0][0][1] = 0
4797 18:37:57.085392 tx_center_max[0][0][1] = 0
4798 18:37:57.085823 tx_center_min[0][1][0] = 0
4799 18:37:57.088864 tx_center_max[0][1][0] = 0
4800 18:37:57.091745 tx_center_min[0][1][1] = 0
4801 18:37:57.095256 tx_center_max[0][1][1] = 0
4802 18:37:57.098273 tx_center_min[1][0][0] = 0
4803 18:37:57.098663 tx_center_max[1][0][0] = 0
4804 18:37:57.101591 tx_center_min[1][0][1] = 0
4805 18:37:57.104636 tx_center_max[1][0][1] = 0
4806 18:37:57.108112 tx_center_min[1][1][0] = 0
4807 18:37:57.108500 tx_center_max[1][1][0] = 0
4808 18:37:57.111273 tx_center_min[1][1][1] = 0
4809 18:37:57.114617 tx_center_max[1][1][1] = 0
4810 18:37:57.115008 dump params tx window
4811 18:37:57.117930 tx_win_center[0][0][0] = 0
4812 18:37:57.121154 tx_first_pass[0][0][0] = 0
4813 18:37:57.124736 tx_last_pass[0][0][0] = 0
4814 18:37:57.125233 tx_win_center[0][0][1] = 0
4815 18:37:57.127934 tx_first_pass[0][0][1] = 0
4816 18:37:57.130894 tx_last_pass[0][0][1] = 0
4817 18:37:57.134348 tx_win_center[0][0][2] = 0
4818 18:37:57.134740 tx_first_pass[0][0][2] = 0
4819 18:37:57.137410 tx_last_pass[0][0][2] = 0
4820 18:37:57.140704 tx_win_center[0][0][3] = 0
4821 18:37:57.144340 tx_first_pass[0][0][3] = 0
4822 18:37:57.144833 tx_last_pass[0][0][3] = 0
4823 18:37:57.147600 tx_win_center[0][0][4] = 0
4824 18:37:57.150829 tx_first_pass[0][0][4] = 0
4825 18:37:57.151296 tx_last_pass[0][0][4] = 0
4826 18:37:57.154049 tx_win_center[0][0][5] = 0
4827 18:37:57.157228 tx_first_pass[0][0][5] = 0
4828 18:37:57.160517 tx_last_pass[0][0][5] = 0
4829 18:37:57.161008 tx_win_center[0][0][6] = 0
4830 18:37:57.163916 tx_first_pass[0][0][6] = 0
4831 18:37:57.167651 tx_last_pass[0][0][6] = 0
4832 18:37:57.170207 tx_win_center[0][0][7] = 0
4833 18:37:57.170600 tx_first_pass[0][0][7] = 0
4834 18:37:57.173372 tx_last_pass[0][0][7] = 0
4835 18:37:57.176881 tx_win_center[0][0][8] = 0
4836 18:37:57.180284 tx_first_pass[0][0][8] = 0
4837 18:37:57.180671 tx_last_pass[0][0][8] = 0
4838 18:37:57.183392 tx_win_center[0][0][9] = 0
4839 18:37:57.186856 tx_first_pass[0][0][9] = 0
4840 18:37:57.187244 tx_last_pass[0][0][9] = 0
4841 18:37:57.189959 tx_win_center[0][0][10] = 0
4842 18:37:57.193295 tx_first_pass[0][0][10] = 0
4843 18:37:57.196497 tx_last_pass[0][0][10] = 0
4844 18:37:57.199855 tx_win_center[0][0][11] = 0
4845 18:37:57.200468 tx_first_pass[0][0][11] = 0
4846 18:37:57.202932 tx_last_pass[0][0][11] = 0
4847 18:37:57.206488 tx_win_center[0][0][12] = 0
4848 18:37:57.209568 tx_first_pass[0][0][12] = 0
4849 18:37:57.209971 tx_last_pass[0][0][12] = 0
4850 18:37:57.212912 tx_win_center[0][0][13] = 0
4851 18:37:57.216473 tx_first_pass[0][0][13] = 0
4852 18:37:57.219914 tx_last_pass[0][0][13] = 0
4853 18:37:57.220441 tx_win_center[0][0][14] = 0
4854 18:37:57.222623 tx_first_pass[0][0][14] = 0
4855 18:37:57.226386 tx_last_pass[0][0][14] = 0
4856 18:37:57.229130 tx_win_center[0][0][15] = 0
4857 18:37:57.229563 tx_first_pass[0][0][15] = 0
4858 18:37:57.232617 tx_last_pass[0][0][15] = 0
4859 18:37:57.236142 tx_win_center[0][1][0] = 0
4860 18:37:57.239400 tx_first_pass[0][1][0] = 0
4861 18:37:57.239914 tx_last_pass[0][1][0] = 0
4862 18:37:57.242349 tx_win_center[0][1][1] = 0
4863 18:37:57.245608 tx_first_pass[0][1][1] = 0
4864 18:37:57.249245 tx_last_pass[0][1][1] = 0
4865 18:37:57.249781 tx_win_center[0][1][2] = 0
4866 18:37:57.252484 tx_first_pass[0][1][2] = 0
4867 18:37:57.255819 tx_last_pass[0][1][2] = 0
4868 18:37:57.258837 tx_win_center[0][1][3] = 0
4869 18:37:57.259383 tx_first_pass[0][1][3] = 0
4870 18:37:57.262082 tx_last_pass[0][1][3] = 0
4871 18:37:57.265271 tx_win_center[0][1][4] = 0
4872 18:37:57.268617 tx_first_pass[0][1][4] = 0
4873 18:37:57.269003 tx_last_pass[0][1][4] = 0
4874 18:37:57.271676 tx_win_center[0][1][5] = 0
4875 18:37:57.275307 tx_first_pass[0][1][5] = 0
4876 18:37:57.275694 tx_last_pass[0][1][5] = 0
4877 18:37:57.278470 tx_win_center[0][1][6] = 0
4878 18:37:57.281591 tx_first_pass[0][1][6] = 0
4879 18:37:57.284804 tx_last_pass[0][1][6] = 0
4880 18:37:57.285189 tx_win_center[0][1][7] = 0
4881 18:37:57.288414 tx_first_pass[0][1][7] = 0
4882 18:37:57.291427 tx_last_pass[0][1][7] = 0
4883 18:37:57.294787 tx_win_center[0][1][8] = 0
4884 18:37:57.295289 tx_first_pass[0][1][8] = 0
4885 18:37:57.297858 tx_last_pass[0][1][8] = 0
4886 18:37:57.301353 tx_win_center[0][1][9] = 0
4887 18:37:57.304395 tx_first_pass[0][1][9] = 0
4888 18:37:57.304965 tx_last_pass[0][1][9] = 0
4889 18:37:57.307648 tx_win_center[0][1][10] = 0
4890 18:37:57.311285 tx_first_pass[0][1][10] = 0
4891 18:37:57.314131 tx_last_pass[0][1][10] = 0
4892 18:37:57.314520 tx_win_center[0][1][11] = 0
4893 18:37:57.317611 tx_first_pass[0][1][11] = 0
4894 18:37:57.321055 tx_last_pass[0][1][11] = 0
4895 18:37:57.324099 tx_win_center[0][1][12] = 0
4896 18:37:57.324488 tx_first_pass[0][1][12] = 0
4897 18:37:57.327605 tx_last_pass[0][1][12] = 0
4898 18:37:57.330981 tx_win_center[0][1][13] = 0
4899 18:37:57.333986 tx_first_pass[0][1][13] = 0
4900 18:37:57.334347 tx_last_pass[0][1][13] = 0
4901 18:37:57.337194 tx_win_center[0][1][14] = 0
4902 18:37:57.341059 tx_first_pass[0][1][14] = 0
4903 18:37:57.343814 tx_last_pass[0][1][14] = 0
4904 18:37:57.347496 tx_win_center[0][1][15] = 0
4905 18:37:57.347963 tx_first_pass[0][1][15] = 0
4906 18:37:57.350621 tx_last_pass[0][1][15] = 0
4907 18:37:57.353540 tx_win_center[1][0][0] = 0
4908 18:37:57.356870 tx_first_pass[1][0][0] = 0
4909 18:37:57.357229 tx_last_pass[1][0][0] = 0
4910 18:37:57.360284 tx_win_center[1][0][1] = 0
4911 18:37:57.363499 tx_first_pass[1][0][1] = 0
4912 18:37:57.363856 tx_last_pass[1][0][1] = 0
4913 18:37:57.366797 tx_win_center[1][0][2] = 0
4914 18:37:57.369825 tx_first_pass[1][0][2] = 0
4915 18:37:57.373261 tx_last_pass[1][0][2] = 0
4916 18:37:57.373663 tx_win_center[1][0][3] = 0
4917 18:37:57.376496 tx_first_pass[1][0][3] = 0
4918 18:37:57.379882 tx_last_pass[1][0][3] = 0
4919 18:37:57.382848 tx_win_center[1][0][4] = 0
4920 18:37:57.383278 tx_first_pass[1][0][4] = 0
4921 18:37:57.386424 tx_last_pass[1][0][4] = 0
4922 18:37:57.389632 tx_win_center[1][0][5] = 0
4923 18:37:57.392885 tx_first_pass[1][0][5] = 0
4924 18:37:57.393245 tx_last_pass[1][0][5] = 0
4925 18:37:57.396142 tx_win_center[1][0][6] = 0
4926 18:37:57.399327 tx_first_pass[1][0][6] = 0
4927 18:37:57.402522 tx_last_pass[1][0][6] = 0
4928 18:37:57.402881 tx_win_center[1][0][7] = 0
4929 18:37:57.405897 tx_first_pass[1][0][7] = 0
4930 18:37:57.409044 tx_last_pass[1][0][7] = 0
4931 18:37:57.412917 tx_win_center[1][0][8] = 0
4932 18:37:57.413382 tx_first_pass[1][0][8] = 0
4933 18:37:57.415886 tx_last_pass[1][0][8] = 0
4934 18:37:57.419280 tx_win_center[1][0][9] = 0
4935 18:37:57.419776 tx_first_pass[1][0][9] = 0
4936 18:37:57.422780 tx_last_pass[1][0][9] = 0
4937 18:37:57.425658 tx_win_center[1][0][10] = 0
4938 18:37:57.429286 tx_first_pass[1][0][10] = 0
4939 18:37:57.429811 tx_last_pass[1][0][10] = 0
4940 18:37:57.432220 tx_win_center[1][0][11] = 0
4941 18:37:57.435892 tx_first_pass[1][0][11] = 0
4942 18:37:57.439169 tx_last_pass[1][0][11] = 0
4943 18:37:57.441917 tx_win_center[1][0][12] = 0
4944 18:37:57.442280 tx_first_pass[1][0][12] = 0
4945 18:37:57.445414 tx_last_pass[1][0][12] = 0
4946 18:37:57.448647 tx_win_center[1][0][13] = 0
4947 18:37:57.452226 tx_first_pass[1][0][13] = 0
4948 18:37:57.452692 tx_last_pass[1][0][13] = 0
4949 18:37:57.454930 tx_win_center[1][0][14] = 0
4950 18:37:57.458237 tx_first_pass[1][0][14] = 0
4951 18:37:57.461713 tx_last_pass[1][0][14] = 0
4952 18:37:57.462077 tx_win_center[1][0][15] = 0
4953 18:37:57.465170 tx_first_pass[1][0][15] = 0
4954 18:37:57.468605 tx_last_pass[1][0][15] = 0
4955 18:37:57.471403 tx_win_center[1][1][0] = 0
4956 18:37:57.471881 tx_first_pass[1][1][0] = 0
4957 18:37:57.474705 tx_last_pass[1][1][0] = 0
4958 18:37:57.477929 tx_win_center[1][1][1] = 0
4959 18:37:57.481514 tx_first_pass[1][1][1] = 0
4960 18:37:57.481988 tx_last_pass[1][1][1] = 0
4961 18:37:57.484550 tx_win_center[1][1][2] = 0
4962 18:37:57.488116 tx_first_pass[1][1][2] = 0
4963 18:37:57.490976 tx_last_pass[1][1][2] = 0
4964 18:37:57.491338 tx_win_center[1][1][3] = 0
4965 18:37:57.494311 tx_first_pass[1][1][3] = 0
4966 18:37:57.498032 tx_last_pass[1][1][3] = 0
4967 18:37:57.501100 tx_win_center[1][1][4] = 0
4968 18:37:57.501595 tx_first_pass[1][1][4] = 0
4969 18:37:57.504185 tx_last_pass[1][1][4] = 0
4970 18:37:57.507384 tx_win_center[1][1][5] = 0
4971 18:37:57.507742 tx_first_pass[1][1][5] = 0
4972 18:37:57.510854 tx_last_pass[1][1][5] = 0
4973 18:37:57.514078 tx_win_center[1][1][6] = 0
4974 18:37:57.517290 tx_first_pass[1][1][6] = 0
4975 18:37:57.517790 tx_last_pass[1][1][6] = 0
4976 18:37:57.520717 tx_win_center[1][1][7] = 0
4977 18:37:57.523771 tx_first_pass[1][1][7] = 0
4978 18:37:57.527314 tx_last_pass[1][1][7] = 0
4979 18:37:57.527779 tx_win_center[1][1][8] = 0
4980 18:37:57.530581 tx_first_pass[1][1][8] = 0
4981 18:37:57.533858 tx_last_pass[1][1][8] = 0
4982 18:37:57.537048 tx_win_center[1][1][9] = 0
4983 18:37:57.537410 tx_first_pass[1][1][9] = 0
4984 18:37:57.540369 tx_last_pass[1][1][9] = 0
4985 18:37:57.543596 tx_win_center[1][1][10] = 0
4986 18:37:57.547109 tx_first_pass[1][1][10] = 0
4987 18:37:57.547578 tx_last_pass[1][1][10] = 0
4988 18:37:57.550139 tx_win_center[1][1][11] = 0
4989 18:37:57.553690 tx_first_pass[1][1][11] = 0
4990 18:37:57.556760 tx_last_pass[1][1][11] = 0
4991 18:37:57.557225 tx_win_center[1][1][12] = 0
4992 18:37:57.560178 tx_first_pass[1][1][12] = 0
4993 18:37:57.563364 tx_last_pass[1][1][12] = 0
4994 18:37:57.566428 tx_win_center[1][1][13] = 0
4995 18:37:57.566895 tx_first_pass[1][1][13] = 0
4996 18:37:57.569827 tx_last_pass[1][1][13] = 0
4997 18:37:57.573074 tx_win_center[1][1][14] = 0
4998 18:37:57.576044 tx_first_pass[1][1][14] = 0
4999 18:37:57.579398 tx_last_pass[1][1][14] = 0
5000 18:37:57.579883 tx_win_center[1][1][15] = 0
5001 18:37:57.582925 tx_first_pass[1][1][15] = 0
5002 18:37:57.586228 tx_last_pass[1][1][15] = 0
5003 18:37:57.586697 dump params rx window
5004 18:37:57.589758 rx_firspass[0][0][0] = 0
5005 18:37:57.592438 rx_lastpass[0][0][0] = 0
5006 18:37:57.592800 rx_firspass[0][0][1] = 0
5007 18:37:57.596222 rx_lastpass[0][0][1] = 0
5008 18:37:57.599185 rx_firspass[0][0][2] = 0
5009 18:37:57.602187 rx_lastpass[0][0][2] = 0
5010 18:37:57.602728 rx_firspass[0][0][3] = 0
5011 18:37:57.605471 rx_lastpass[0][0][3] = 0
5012 18:37:57.608707 rx_firspass[0][0][4] = 0
5013 18:37:57.609064 rx_lastpass[0][0][4] = 0
5014 18:37:57.612345 rx_firspass[0][0][5] = 0
5015 18:37:57.615499 rx_lastpass[0][0][5] = 0
5016 18:37:57.615862 rx_firspass[0][0][6] = 0
5017 18:37:57.619003 rx_lastpass[0][0][6] = 0
5018 18:37:57.622060 rx_firspass[0][0][7] = 0
5019 18:37:57.625299 rx_lastpass[0][0][7] = 0
5020 18:37:57.625871 rx_firspass[0][0][8] = 0
5021 18:37:57.628628 rx_lastpass[0][0][8] = 0
5022 18:37:57.631694 rx_firspass[0][0][9] = 0
5023 18:37:57.632209 rx_lastpass[0][0][9] = 0
5024 18:37:57.635055 rx_firspass[0][0][10] = 0
5025 18:37:57.638283 rx_lastpass[0][0][10] = 0
5026 18:37:57.641502 rx_firspass[0][0][11] = 0
5027 18:37:57.641913 rx_lastpass[0][0][11] = 0
5028 18:37:57.645486 rx_firspass[0][0][12] = 0
5029 18:37:57.648360 rx_lastpass[0][0][12] = 0
5030 18:37:57.648871 rx_firspass[0][0][13] = 0
5031 18:37:57.651709 rx_lastpass[0][0][13] = 0
5032 18:37:57.655046 rx_firspass[0][0][14] = 0
5033 18:37:57.658228 rx_lastpass[0][0][14] = 0
5034 18:37:57.658739 rx_firspass[0][0][15] = 0
5035 18:37:57.661606 rx_lastpass[0][0][15] = 0
5036 18:37:57.664735 rx_firspass[0][1][0] = 0
5037 18:37:57.665243 rx_lastpass[0][1][0] = 0
5038 18:37:57.668361 rx_firspass[0][1][1] = 0
5039 18:37:57.671088 rx_lastpass[0][1][1] = 0
5040 18:37:57.674400 rx_firspass[0][1][2] = 0
5041 18:37:57.674810 rx_lastpass[0][1][2] = 0
5042 18:37:57.677960 rx_firspass[0][1][3] = 0
5043 18:37:57.681127 rx_lastpass[0][1][3] = 0
5044 18:37:57.681689 rx_firspass[0][1][4] = 0
5045 18:37:57.684253 rx_lastpass[0][1][4] = 0
5046 18:37:57.687807 rx_firspass[0][1][5] = 0
5047 18:37:57.688326 rx_lastpass[0][1][5] = 0
5048 18:37:57.690777 rx_firspass[0][1][6] = 0
5049 18:37:57.694228 rx_lastpass[0][1][6] = 0
5050 18:37:57.697200 rx_firspass[0][1][7] = 0
5051 18:37:57.697609 rx_lastpass[0][1][7] = 0
5052 18:37:57.700436 rx_firspass[0][1][8] = 0
5053 18:37:57.703866 rx_lastpass[0][1][8] = 0
5054 18:37:57.704251 rx_firspass[0][1][9] = 0
5055 18:37:57.707370 rx_lastpass[0][1][9] = 0
5056 18:37:57.710501 rx_firspass[0][1][10] = 0
5057 18:37:57.710991 rx_lastpass[0][1][10] = 0
5058 18:37:57.713760 rx_firspass[0][1][11] = 0
5059 18:37:57.716681 rx_lastpass[0][1][11] = 0
5060 18:37:57.720493 rx_firspass[0][1][12] = 0
5061 18:37:57.720997 rx_lastpass[0][1][12] = 0
5062 18:37:57.723223 rx_firspass[0][1][13] = 0
5063 18:37:57.726680 rx_lastpass[0][1][13] = 0
5064 18:37:57.730099 rx_firspass[0][1][14] = 0
5065 18:37:57.730490 rx_lastpass[0][1][14] = 0
5066 18:37:57.733476 rx_firspass[0][1][15] = 0
5067 18:37:57.736637 rx_lastpass[0][1][15] = 0
5068 18:37:57.737125 rx_firspass[1][0][0] = 0
5069 18:37:57.739767 rx_lastpass[1][0][0] = 0
5070 18:37:57.743387 rx_firspass[1][0][1] = 0
5071 18:37:57.743873 rx_lastpass[1][0][1] = 0
5072 18:37:57.746073 rx_firspass[1][0][2] = 0
5073 18:37:57.749585 rx_lastpass[1][0][2] = 0
5074 18:37:57.753114 rx_firspass[1][0][3] = 0
5075 18:37:57.753661 rx_lastpass[1][0][3] = 0
5076 18:37:57.756555 rx_firspass[1][0][4] = 0
5077 18:37:57.759761 rx_lastpass[1][0][4] = 0
5078 18:37:57.760249 rx_firspass[1][0][5] = 0
5079 18:37:57.762416 rx_lastpass[1][0][5] = 0
5080 18:37:57.765902 rx_firspass[1][0][6] = 0
5081 18:37:57.766281 rx_lastpass[1][0][6] = 0
5082 18:37:57.769135 rx_firspass[1][0][7] = 0
5083 18:37:57.772225 rx_lastpass[1][0][7] = 0
5084 18:37:57.775836 rx_firspass[1][0][8] = 0
5085 18:37:57.776215 rx_lastpass[1][0][8] = 0
5086 18:37:57.779192 rx_firspass[1][0][9] = 0
5087 18:37:57.782069 rx_lastpass[1][0][9] = 0
5088 18:37:57.782504 rx_firspass[1][0][10] = 0
5089 18:37:57.785849 rx_lastpass[1][0][10] = 0
5090 18:37:57.789064 rx_firspass[1][0][11] = 0
5091 18:37:57.792180 rx_lastpass[1][0][11] = 0
5092 18:37:57.792576 rx_firspass[1][0][12] = 0
5093 18:37:57.795870 rx_lastpass[1][0][12] = 0
5094 18:37:57.798816 rx_firspass[1][0][13] = 0
5095 18:37:57.799298 rx_lastpass[1][0][13] = 0
5096 18:37:57.801889 rx_firspass[1][0][14] = 0
5097 18:37:57.805005 rx_lastpass[1][0][14] = 0
5098 18:37:57.808500 rx_firspass[1][0][15] = 0
5099 18:37:57.809174 rx_lastpass[1][0][15] = 0
5100 18:37:57.811910 rx_firspass[1][1][0] = 0
5101 18:37:57.815397 rx_lastpass[1][1][0] = 0
5102 18:37:57.815913 rx_firspass[1][1][1] = 0
5103 18:37:57.818792 rx_lastpass[1][1][1] = 0
5104 18:37:57.821725 rx_firspass[1][1][2] = 0
5105 18:37:57.825143 rx_lastpass[1][1][2] = 0
5106 18:37:57.825729 rx_firspass[1][1][3] = 0
5107 18:37:57.828481 rx_lastpass[1][1][3] = 0
5108 18:37:57.831871 rx_firspass[1][1][4] = 0
5109 18:37:57.832391 rx_lastpass[1][1][4] = 0
5110 18:37:57.834746 rx_firspass[1][1][5] = 0
5111 18:37:57.838378 rx_lastpass[1][1][5] = 0
5112 18:37:57.838900 rx_firspass[1][1][6] = 0
5113 18:37:57.841238 rx_lastpass[1][1][6] = 0
5114 18:37:57.844868 rx_firspass[1][1][7] = 0
5115 18:37:57.845389 rx_lastpass[1][1][7] = 0
5116 18:37:57.848423 rx_firspass[1][1][8] = 0
5117 18:37:57.851427 rx_lastpass[1][1][8] = 0
5118 18:37:57.854716 rx_firspass[1][1][9] = 0
5119 18:37:57.855236 rx_lastpass[1][1][9] = 0
5120 18:37:57.857967 rx_firspass[1][1][10] = 0
5121 18:37:57.860856 rx_lastpass[1][1][10] = 0
5122 18:37:57.861379 rx_firspass[1][1][11] = 0
5123 18:37:57.864416 rx_lastpass[1][1][11] = 0
5124 18:37:57.867541 rx_firspass[1][1][12] = 0
5125 18:37:57.870727 rx_lastpass[1][1][12] = 0
5126 18:37:57.871244 rx_firspass[1][1][13] = 0
5127 18:37:57.873976 rx_lastpass[1][1][13] = 0
5128 18:37:57.877805 rx_firspass[1][1][14] = 0
5129 18:37:57.880849 rx_lastpass[1][1][14] = 0
5130 18:37:57.881375 rx_firspass[1][1][15] = 0
5131 18:37:57.884287 rx_lastpass[1][1][15] = 0
5132 18:37:57.887217 dump params clk_delay
5133 18:37:57.887634 clk_delay[0] = 0
5134 18:37:57.890381 clk_delay[1] = 0
5135 18:37:57.890903 dump params dqs_delay
5136 18:37:57.893668 dqs_delay[0][0] = 0
5137 18:37:57.894083 dqs_delay[0][1] = 0
5138 18:37:57.897088 dqs_delay[1][0] = 0
5139 18:37:57.897666 dqs_delay[1][1] = 0
5140 18:37:57.900051 dump params delay_cell_unit = 753
5141 18:37:57.903689 mt_set_emi_preloader end
5142 18:37:57.907030 [mt_mem_init] dram size: 0x100000000, rank number: 2
5143 18:37:57.913414 [complex_mem_test] start addr:0x40000000, len:20480
5144 18:37:57.949547 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5145 18:37:57.955967 [complex_mem_test] start addr:0x80000000, len:20480
5146 18:37:57.991870 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5147 18:37:57.998304 [complex_mem_test] start addr:0xc0000000, len:20480
5148 18:37:58.034055 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5149 18:37:58.040606 [complex_mem_test] start addr:0x56000000, len:8192
5150 18:37:58.057494 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5151 18:37:58.060409 ddr_geometry:1
5152 18:37:58.063411 [complex_mem_test] start addr:0x80000000, len:8192
5153 18:37:58.081030 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5154 18:37:58.084012 dram_init: dram init end (result: 0)
5155 18:37:58.090480 Successfully loaded DRAM blobs and ran DRAM calibration
5156 18:37:58.100606 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5157 18:37:58.101119 CBMEM:
5158 18:37:58.103896 IMD: root @ 00000000fffff000 254 entries.
5159 18:37:58.107377 IMD: root @ 00000000ffffec00 62 entries.
5160 18:37:58.114106 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5161 18:37:58.120544 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5162 18:37:58.124136 in-header: 03 a1 00 00 08 00 00 00
5163 18:37:58.126930 in-data: 84 60 60 10 00 00 00 00
5164 18:37:58.130416 Chrome EC: clear events_b mask to 0x0000000020004000
5165 18:37:58.136932 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5166 18:37:58.140850 in-header: 03 fd 00 00 00 00 00 00
5167 18:37:58.143949 in-data:
5168 18:37:58.147135 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5169 18:37:58.150176 CBFS @ 21000 size 3d4000
5170 18:37:58.153601 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5171 18:37:58.156606 CBFS: Locating 'fallback/ramstage'
5172 18:37:58.160121 CBFS: Found @ offset 10d40 size d563
5173 18:37:58.183059 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5174 18:37:58.194841 Accumulated console time in romstage 13600 ms
5175 18:37:58.195356
5176 18:37:58.195690
5177 18:37:58.205044 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5178 18:37:58.207928 ARM64: Exception handlers installed.
5179 18:37:58.208455 ARM64: Testing exception
5180 18:37:58.211098 ARM64: Done test exception
5181 18:37:58.214836 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5182 18:37:58.217621 Manufacturer: ef
5183 18:37:58.224759 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5184 18:37:58.227793 WARNING: RO_VPD is uninitialized or empty.
5185 18:37:58.231201 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5186 18:37:58.234405 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5187 18:37:58.244390 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5188 18:37:58.248193 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5189 18:37:58.254470 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5190 18:37:58.255001 Enumerating buses...
5191 18:37:58.261050 Show all devs... Before device enumeration.
5192 18:37:58.261605 Root Device: enabled 1
5193 18:37:58.264305 CPU_CLUSTER: 0: enabled 1
5194 18:37:58.267362 CPU: 00: enabled 1
5195 18:37:58.267928 Compare with tree...
5196 18:37:58.270867 Root Device: enabled 1
5197 18:37:58.271391 CPU_CLUSTER: 0: enabled 1
5198 18:37:58.274009 CPU: 00: enabled 1
5199 18:37:58.276956 Root Device scanning...
5200 18:37:58.280390 root_dev_scan_bus for Root Device
5201 18:37:58.280811 CPU_CLUSTER: 0 enabled
5202 18:37:58.283623 root_dev_scan_bus for Root Device done
5203 18:37:58.290264 scan_bus: scanning of bus Root Device took 10689 usecs
5204 18:37:58.290786 done
5205 18:37:58.293069 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5206 18:37:58.296847 Allocating resources...
5207 18:37:58.300047 Reading resources...
5208 18:37:58.303590 Root Device read_resources bus 0 link: 0
5209 18:37:58.306312 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5210 18:37:58.309755 CPU: 00 missing read_resources
5211 18:37:58.313081 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5212 18:37:58.316444 Root Device read_resources bus 0 link: 0 done
5213 18:37:58.319764 Done reading resources.
5214 18:37:58.326113 Show resources in subtree (Root Device)...After reading.
5215 18:37:58.329682 Root Device child on link 0 CPU_CLUSTER: 0
5216 18:37:58.333027 CPU_CLUSTER: 0 child on link 0 CPU: 00
5217 18:37:58.342399 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5218 18:37:58.342935 CPU: 00
5219 18:37:58.343273 Setting resources...
5220 18:37:58.349241 Root Device assign_resources, bus 0 link: 0
5221 18:37:58.352683 CPU_CLUSTER: 0 missing set_resources
5222 18:37:58.355348 Root Device assign_resources, bus 0 link: 0
5223 18:37:58.355770 Done setting resources.
5224 18:37:58.362135 Show resources in subtree (Root Device)...After assigning values.
5225 18:37:58.365228 Root Device child on link 0 CPU_CLUSTER: 0
5226 18:37:58.372150 CPU_CLUSTER: 0 child on link 0 CPU: 00
5227 18:37:58.378378 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5228 18:37:58.381619 CPU: 00
5229 18:37:58.382039 Done allocating resources.
5230 18:37:58.388017 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5231 18:37:58.388507 Enabling resources...
5232 18:37:58.391542 done.
5233 18:37:58.394919 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5234 18:37:58.397855 Initializing devices...
5235 18:37:58.398238 Root Device init ...
5236 18:37:58.401460 mainboard_init: Starting display init.
5237 18:37:58.404327 ADC[4]: Raw value=75836 ID=0
5238 18:37:58.426901 anx7625_power_on_init: Init interface.
5239 18:37:58.430559 anx7625_disable_pd_protocol: Disabled PD feature.
5240 18:37:58.436785 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5241 18:37:58.484359 anx7625_start_dp_work: Secure OCM version=00
5242 18:37:58.487015 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5243 18:37:58.504671 sp_tx_get_edid_block: EDID Block = 1
5244 18:37:58.621714 Extracted contents:
5245 18:37:58.625227 header: 00 ff ff ff ff ff ff 00
5246 18:37:58.628655 serial number: 06 af 5c 14 00 00 00 00 00 1a
5247 18:37:58.631375 version: 01 04
5248 18:37:58.634666 basic params: 95 1a 0e 78 02
5249 18:37:58.638044 chroma info: 99 85 95 55 56 92 28 22 50 54
5250 18:37:58.641504 established: 00 00 00
5251 18:37:58.648244 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5252 18:37:58.654842 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5253 18:37:58.657968 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5254 18:37:58.664019 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5255 18:37:58.671113 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5256 18:37:58.674356 extensions: 00
5257 18:37:58.674886 checksum: ae
5258 18:37:58.675226
5259 18:37:58.681037 Manufacturer: AUO Model 145c Serial Number 0
5260 18:37:58.681600 Made week 0 of 2016
5261 18:37:58.683939 EDID version: 1.4
5262 18:37:58.684459 Digital display
5263 18:37:58.687137 6 bits per primary color channel
5264 18:37:58.690294 DisplayPort interface
5265 18:37:58.694071 Maximum image size: 26 cm x 14 cm
5266 18:37:58.694600 Gamma: 220%
5267 18:37:58.694934 Check DPMS levels
5268 18:37:58.696820 Supported color formats: RGB 4:4:4
5269 18:37:58.703573 First detailed timing is preferred timing
5270 18:37:58.704089 Established timings supported:
5271 18:37:58.706787 Standard timings supported:
5272 18:37:58.709852 Detailed timings
5273 18:37:58.713192 Hex of detail: ce1d56ea50001a3030204600009010000018
5274 18:37:58.716361 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5275 18:37:58.723241 0556 0586 05a6 0640 hborder 0
5276 18:37:58.726573 0300 0304 030a 031a vborder 0
5277 18:37:58.729545 -hsync -vsync
5278 18:37:58.729931 Did detailed timing
5279 18:37:58.736163 Hex of detail: 0000000f0000000000000000000000000020
5280 18:37:58.740012 Manufacturer-specified data, tag 15
5281 18:37:58.742839 Hex of detail: 000000fe0041554f0a202020202020202020
5282 18:37:58.745995 ASCII string: AUO
5283 18:37:58.749561 Hex of detail: 000000fe004231313658414230312e34200a
5284 18:37:58.752495 ASCII string: B116XAB01.4
5285 18:37:58.753001 Checksum
5286 18:37:58.756096 Checksum: 0xae (valid)
5287 18:37:58.759529 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5288 18:37:58.762887 DSI data_rate: 457800000 bps
5289 18:37:58.769064 anx7625_parse_edid: set default k value to 0x3d for panel
5290 18:37:58.772430 anx7625_parse_edid: pixelclock(76300).
5291 18:37:58.775441 hactive(1366), hsync(32), hfp(48), hbp(154)
5292 18:37:58.778612 vactive(768), vsync(6), vfp(4), vbp(16)
5293 18:37:58.781983 anx7625_dsi_config: config dsi.
5294 18:37:58.789541 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5295 18:37:58.810648 anx7625_dsi_config: success to config DSI
5296 18:37:58.813862 anx7625_dp_start: MIPI phy setup OK.
5297 18:37:58.817755 [SSUSB] Setting up USB HOST controller...
5298 18:37:58.820783 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5299 18:37:58.823689 [SSUSB] phy power-on done.
5300 18:37:58.827502 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5301 18:37:58.830821 in-header: 03 fc 01 00 00 00 00 00
5302 18:37:58.831204 in-data:
5303 18:37:58.837423 handle_proto3_response: EC response with error code: 1
5304 18:37:58.837803 SPM: pcm index = 1
5305 18:37:58.844132 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5306 18:37:58.844629 CBFS @ 21000 size 3d4000
5307 18:37:58.850651 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5308 18:37:58.853941 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5309 18:37:58.857114 CBFS: Found @ offset 1e7c0 size 1026
5310 18:37:58.863470 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5311 18:37:58.867032 SPM: binary array size = 2988
5312 18:37:58.869955 SPM: version = pcm_allinone_v1.17.2_20180829
5313 18:37:58.873055 SPM binary loaded in 32 msecs
5314 18:37:58.882039 spm_kick_im_to_fetch: ptr = 000000004021eec2
5315 18:37:58.885364 spm_kick_im_to_fetch: len = 2988
5316 18:37:58.885930 SPM: spm_kick_pcm_to_run
5317 18:37:58.888461 SPM: spm_kick_pcm_to_run done
5318 18:37:58.891906 SPM: spm_init done in 52 msecs
5319 18:37:58.895244 Root Device init finished in 494996 usecs
5320 18:37:58.898275 CPU_CLUSTER: 0 init ...
5321 18:37:58.908243 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5322 18:37:58.911206 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5323 18:37:58.915135 CBFS @ 21000 size 3d4000
5324 18:37:58.918038 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5325 18:37:58.921164 CBFS: Locating 'sspm.bin'
5326 18:37:58.924876 CBFS: Found @ offset 208c0 size 41cb
5327 18:37:58.935205 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5328 18:37:58.943165 CPU_CLUSTER: 0 init finished in 42802 usecs
5329 18:37:58.943689 Devices initialized
5330 18:37:58.946309 Show all devs... After init.
5331 18:37:58.950166 Root Device: enabled 1
5332 18:37:58.950684 CPU_CLUSTER: 0: enabled 1
5333 18:37:58.952916 CPU: 00: enabled 1
5334 18:37:58.955947 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5335 18:37:58.962862 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5336 18:37:58.966243 ELOG: NV offset 0x558000 size 0x1000
5337 18:37:58.969392 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5338 18:37:58.975623 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5339 18:37:58.982460 ELOG: Event(17) added with size 13 at 2024-06-11 18:37:58 UTC
5340 18:37:58.985817 out: cmd=0x121: 03 db 21 01 00 00 00 00
5341 18:37:58.988697 in-header: 03 48 00 00 2c 00 00 00
5342 18:37:59.002192 in-data: fe 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 04 83 08 00 06 80 00 00 3e 02 01 00 06 80 00 00 17 c9 13 00 06 80 00 00 8e b1 14 00
5343 18:37:59.005308 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5344 18:37:59.008352 in-header: 03 19 00 00 08 00 00 00
5345 18:37:59.011735 in-data: a2 e0 47 00 13 00 00 00
5346 18:37:59.015075 Chrome EC: UHEPI supported
5347 18:37:59.021193 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5348 18:37:59.025103 in-header: 03 e1 00 00 08 00 00 00
5349 18:37:59.028170 in-data: 84 20 60 10 00 00 00 00
5350 18:37:59.031662 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5351 18:37:59.038042 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5352 18:37:59.041305 in-header: 03 e1 00 00 08 00 00 00
5353 18:37:59.044433 in-data: 84 20 60 10 00 00 00 00
5354 18:37:59.050834 ELOG: Event(A1) added with size 10 at 2024-06-11 18:37:58 UTC
5355 18:37:59.057370 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5356 18:37:59.060991 ELOG: Event(A0) added with size 9 at 2024-06-11 18:37:58 UTC
5357 18:37:59.067045 elog_add_boot_reason: Logged dev mode boot
5358 18:37:59.067554 Finalize devices...
5359 18:37:59.070923 Devices finalized
5360 18:37:59.073653 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5361 18:37:59.077176 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5362 18:37:59.083768 ELOG: Event(91) added with size 10 at 2024-06-11 18:37:58 UTC
5363 18:37:59.087071 Writing coreboot table at 0xffeda000
5364 18:37:59.090128 0. 0000000000114000-000000000011efff: RAMSTAGE
5365 18:37:59.096745 1. 0000000040000000-000000004023cfff: RAMSTAGE
5366 18:37:59.099937 2. 000000004023d000-00000000545fffff: RAM
5367 18:37:59.103469 3. 0000000054600000-000000005465ffff: BL31
5368 18:37:59.106355 4. 0000000054660000-00000000ffed9fff: RAM
5369 18:37:59.112577 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5370 18:37:59.116310 6. 0000000100000000-000000013fffffff: RAM
5371 18:37:59.119799 Passing 5 GPIOs to payload:
5372 18:37:59.122844 NAME | PORT | POLARITY | VALUE
5373 18:37:59.129167 write protect | 0x00000096 | low | high
5374 18:37:59.132602 EC in RW | 0x000000b1 | high | undefined
5375 18:37:59.139484 EC interrupt | 0x00000097 | low | undefined
5376 18:37:59.142226 TPM interrupt | 0x00000099 | high | undefined
5377 18:37:59.146308 speaker enable | 0x000000af | high | undefined
5378 18:37:59.149255 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5379 18:37:59.152381 in-header: 03 f7 00 00 02 00 00 00
5380 18:37:59.155862 in-data: 04 00
5381 18:37:59.156392 Board ID: 4
5382 18:37:59.159055 ADC[3]: Raw value=214692 ID=1
5383 18:37:59.159578 RAM code: 1
5384 18:37:59.161884 SKU ID: 16
5385 18:37:59.165927 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5386 18:37:59.168641 CBFS @ 21000 size 3d4000
5387 18:37:59.171975 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5388 18:37:59.178524 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum f82e
5389 18:37:59.181888 coreboot table: 940 bytes.
5390 18:37:59.185154 IMD ROOT 0. 00000000fffff000 00001000
5391 18:37:59.187894 IMD SMALL 1. 00000000ffffe000 00001000
5392 18:37:59.191784 CONSOLE 2. 00000000fffde000 00020000
5393 18:37:59.194508 FMAP 3. 00000000fffdd000 0000047c
5394 18:37:59.201599 TIME STAMP 4. 00000000fffdc000 00000910
5395 18:37:59.204383 RAMOOPS 5. 00000000ffedc000 00100000
5396 18:37:59.207457 COREBOOT 6. 00000000ffeda000 00002000
5397 18:37:59.207880 IMD small region:
5398 18:37:59.210906 IMD ROOT 0. 00000000ffffec00 00000400
5399 18:37:59.217390 VBOOT WORK 1. 00000000ffffeb00 00000100
5400 18:37:59.220483 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5401 18:37:59.224463 VPD 3. 00000000ffffea60 0000006c
5402 18:37:59.227562 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5403 18:37:59.234397 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5404 18:37:59.237104 in-header: 03 e1 00 00 08 00 00 00
5405 18:37:59.240237 in-data: 84 20 60 10 00 00 00 00
5406 18:37:59.246863 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5407 18:37:59.247525 CBFS @ 21000 size 3d4000
5408 18:37:59.253237 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5409 18:37:59.256648 CBFS: Locating 'fallback/payload'
5410 18:37:59.264826 CBFS: Found @ offset dc040 size 439a0
5411 18:37:59.352632 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5412 18:37:59.356248 Checking segment from ROM address 0x0000000040003a00
5413 18:37:59.362624 Checking segment from ROM address 0x0000000040003a1c
5414 18:37:59.365654 Loading segment from ROM address 0x0000000040003a00
5415 18:37:59.369008 code (compression=0)
5416 18:37:59.378643 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5417 18:37:59.385481 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5418 18:37:59.388703 it's not compressed!
5419 18:37:59.391849 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5420 18:37:59.398264 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5421 18:37:59.406956 Loading segment from ROM address 0x0000000040003a1c
5422 18:37:59.410344 Entry Point 0x0000000080000000
5423 18:37:59.410762 Loaded segments
5424 18:37:59.416842 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5425 18:37:59.420276 Jumping to boot code at 0000000080000000(00000000ffeda000)
5426 18:37:59.429892 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5427 18:37:59.436267 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5428 18:37:59.436786 CBFS @ 21000 size 3d4000
5429 18:37:59.443064 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5430 18:37:59.446007 CBFS: Locating 'fallback/bl31'
5431 18:37:59.449421 CBFS: Found @ offset 36dc0 size 5820
5432 18:37:59.461110 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5433 18:37:59.464025 Checking segment from ROM address 0x0000000040003a00
5434 18:37:59.470366 Checking segment from ROM address 0x0000000040003a1c
5435 18:37:59.474050 Loading segment from ROM address 0x0000000040003a00
5436 18:37:59.476888 code (compression=1)
5437 18:37:59.487021 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5438 18:37:59.493395 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5439 18:37:59.493978 using LZMA
5440 18:37:59.502786 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5441 18:37:59.509059 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5442 18:37:59.512099 Loading segment from ROM address 0x0000000040003a1c
5443 18:37:59.515562 Entry Point 0x0000000054601000
5444 18:37:59.515951 Loaded segments
5445 18:37:59.518610 NOTICE: MT8183 bl31_setup
5446 18:37:59.526131 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5447 18:37:59.529544 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5448 18:37:59.533299 INFO: [DEVAPC] dump DEVAPC registers:
5449 18:37:59.543002 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5450 18:37:59.549658 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5451 18:37:59.559610 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5452 18:37:59.566186 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5453 18:37:59.575356 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5454 18:37:59.581921 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5455 18:37:59.591931 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5456 18:37:59.598187 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5457 18:37:59.608129 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5458 18:37:59.614698 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5459 18:37:59.624304 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5460 18:37:59.630613 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5461 18:37:59.640741 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5462 18:37:59.647228 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5463 18:37:59.653830 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5464 18:37:59.663434 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5465 18:37:59.670023 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5466 18:37:59.676852 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5467 18:37:59.682950 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5468 18:37:59.693073 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5469 18:37:59.699609 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5470 18:37:59.706036 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5471 18:37:59.709641 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5472 18:37:59.712567 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5473 18:37:59.715759 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5474 18:37:59.719257 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5475 18:37:59.722492 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5476 18:37:59.728931 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5477 18:37:59.735453 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5478 18:37:59.735929 WARNING: region 0:
5479 18:37:59.738976 WARNING: apc:0x168, sa:0x0, ea:0xfff
5480 18:37:59.742282 WARNING: region 1:
5481 18:37:59.745079 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5482 18:37:59.745483 WARNING: region 2:
5483 18:37:59.748553 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5484 18:37:59.751781 WARNING: region 3:
5485 18:37:59.755374 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5486 18:37:59.758202 WARNING: region 4:
5487 18:37:59.761611 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5488 18:37:59.762083 WARNING: region 5:
5489 18:37:59.765230 WARNING: apc:0x0, sa:0x0, ea:0x0
5490 18:37:59.768100 WARNING: region 6:
5491 18:37:59.771466 WARNING: apc:0x0, sa:0x0, ea:0x0
5492 18:37:59.771854 WARNING: region 7:
5493 18:37:59.775186 WARNING: apc:0x0, sa:0x0, ea:0x0
5494 18:37:59.781121 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5495 18:37:59.784481 INFO: SPM: enable SPMC mode
5496 18:37:59.788184 NOTICE: spm_boot_init() start
5497 18:37:59.791391 NOTICE: spm_boot_init() end
5498 18:37:59.794476 INFO: BL31: Initializing runtime services
5499 18:37:59.801286 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5500 18:37:59.804656 INFO: BL31: Preparing for EL3 exit to normal world
5501 18:37:59.807838 INFO: Entry point address = 0x80000000
5502 18:37:59.810723 INFO: SPSR = 0x8
5503 18:37:59.832993
5504 18:37:59.833585
5505 18:37:59.833941
5506 18:37:59.835495 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5507 18:37:59.835987 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5508 18:37:59.836404 Setting prompt string to ['jacuzzi:']
5509 18:37:59.836794 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5510 18:37:59.837478 Starting depthcharge on Juniper...
5511 18:37:59.837835
5512 18:37:59.839795 vboot_handoff: creating legacy vboot_handoff structure
5513 18:37:59.840309
5514 18:37:59.842411 ec_init(0): CrosEC protocol v3 supported (544, 544)
5515 18:37:59.846063
5516 18:37:59.846572 Wipe memory regions:
5517 18:37:59.846906
5518 18:37:59.849853 [0x00000040000000, 0x00000054600000)
5519 18:37:59.892700
5520 18:37:59.893208 [0x00000054660000, 0x00000080000000)
5521 18:37:59.983853
5522 18:37:59.984379 [0x000000811994a0, 0x000000ffeda000)
5523 18:38:00.243088
5524 18:38:00.243521 [0x00000100000000, 0x00000140000000)
5525 18:38:00.375770
5526 18:38:00.378681 Initializing XHCI USB controller at 0x11200000.
5527 18:38:00.401927
5528 18:38:00.405185 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5529 18:38:00.405568
5530 18:38:00.405855
5531 18:38:00.406512 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5533 18:38:00.507647 jacuzzi: tftpboot 192.168.201.1 14291439/tftp-deploy-3x77qzvl/kernel/image.itb 14291439/tftp-deploy-3x77qzvl/kernel/cmdline
5534 18:38:00.508100 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5535 18:38:00.508434 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
5536 18:38:00.512619 tftpboot 192.168.201.1 14291439/tftp-deploy-3x77qzvl/kernel/image.itp-deploy-3x77qzvl/kernel/cmdline
5537 18:38:00.512982
5538 18:38:00.513264 Waiting for link
5539 18:38:00.915930
5540 18:38:00.916098 R8152: Initializing
5541 18:38:00.916177
5542 18:38:00.919021 Version 9 (ocp_data = 6010)
5543 18:38:00.919121
5544 18:38:00.922022 R8152: Done initializing
5545 18:38:00.922132
5546 18:38:00.922218 Adding net device
5547 18:38:01.308198
5548 18:38:01.308711 done.
5549 18:38:01.309130
5550 18:38:01.309573 MAC: 00:e0:4c:78:85:cb
5551 18:38:01.309910
5552 18:38:01.311359 Sending DHCP discover... done.
5553 18:38:01.311776
5554 18:38:01.314694 Waiting for reply... done.
5555 18:38:01.315116
5556 18:38:01.317971 Sending DHCP request... done.
5557 18:38:01.318388
5558 18:38:01.323800 Waiting for reply... done.
5559 18:38:01.324230
5560 18:38:01.324559 My ip is 192.168.201.22
5561 18:38:01.324863
5562 18:38:01.326983 The DHCP server ip is 192.168.201.1
5563 18:38:01.327413
5564 18:38:01.333736 TFTP server IP predefined by user: 192.168.201.1
5565 18:38:01.334140
5566 18:38:01.340320 Bootfile predefined by user: 14291439/tftp-deploy-3x77qzvl/kernel/image.itb
5567 18:38:01.340708
5568 18:38:01.343439 Sending tftp read request... done.
5569 18:38:01.343824
5570 18:38:01.349478 Waiting for the transfer...
5571 18:38:01.349976
5572 18:38:01.643963 00000000 ################################################################
5573 18:38:01.644119
5574 18:38:01.930405 00080000 ################################################################
5575 18:38:01.930584
5576 18:38:02.211292 00100000 ################################################################
5577 18:38:02.211438
5578 18:38:02.474933 00180000 ################################################################
5579 18:38:02.475080
5580 18:38:02.765900 00200000 ################################################################
5581 18:38:02.766055
5582 18:38:03.056652 00280000 ################################################################
5583 18:38:03.056798
5584 18:38:03.342513 00300000 ################################################################
5585 18:38:03.342661
5586 18:38:03.623541 00380000 ################################################################
5587 18:38:03.623696
5588 18:38:03.906471 00400000 ################################################################
5589 18:38:03.906619
5590 18:38:04.207284 00480000 ################################################################
5591 18:38:04.207437
5592 18:38:04.499084 00500000 ################################################################
5593 18:38:04.499227
5594 18:38:04.779154 00580000 ################################################################
5595 18:38:04.779330
5596 18:38:05.055229 00600000 ################################################################
5597 18:38:05.055388
5598 18:38:05.348296 00680000 ################################################################
5599 18:38:05.348444
5600 18:38:05.607807 00700000 ################################################################
5601 18:38:05.607996
5602 18:38:05.893590 00780000 ################################################################
5603 18:38:05.893744
5604 18:38:06.191424 00800000 ################################################################
5605 18:38:06.191576
5606 18:38:06.488178 00880000 ################################################################
5607 18:38:06.488336
5608 18:38:06.760649 00900000 ################################################################
5609 18:38:06.760797
5610 18:38:07.045003 00980000 ################################################################
5611 18:38:07.045153
5612 18:38:07.301663 00a00000 ################################################################
5613 18:38:07.301838
5614 18:38:07.596766 00a80000 ################################################################
5615 18:38:07.596920
5616 18:38:07.897999 00b00000 ################################################################
5617 18:38:07.898147
5618 18:38:08.189154 00b80000 ################################################################
5619 18:38:08.189311
5620 18:38:08.487557 00c00000 ################################################################
5621 18:38:08.487711
5622 18:38:08.767200 00c80000 ################################################################
5623 18:38:08.767348
5624 18:38:09.066740 00d00000 ################################################################
5625 18:38:09.066887
5626 18:38:09.357768 00d80000 ################################################################
5627 18:38:09.357918
5628 18:38:09.648953 00e00000 ################################################################
5629 18:38:09.649103
5630 18:38:09.936559 00e80000 ################################################################
5631 18:38:09.936715
5632 18:38:10.213979 00f00000 ################################################################
5633 18:38:10.214120
5634 18:38:10.514300 00f80000 ################################################################
5635 18:38:10.514444
5636 18:38:10.807126 01000000 ################################################################
5637 18:38:10.807277
5638 18:38:11.077091 01080000 ################################################################
5639 18:38:11.077237
5640 18:38:11.361395 01100000 ################################################################
5641 18:38:11.361557
5642 18:38:11.620915 01180000 ################################################################
5643 18:38:11.621056
5644 18:38:11.875024 01200000 ################################################################
5645 18:38:11.875164
5646 18:38:12.137442 01280000 ################################################################
5647 18:38:12.137589
5648 18:38:12.394986 01300000 ################################################################
5649 18:38:12.395139
5650 18:38:12.659791 01380000 ################################################################
5651 18:38:12.659942
5652 18:38:12.929373 01400000 ################################################################
5653 18:38:12.929533
5654 18:38:13.214206 01480000 ################################################################
5655 18:38:13.214357
5656 18:38:13.503923 01500000 ################################################################
5657 18:38:13.504081
5658 18:38:13.778158 01580000 ################################################################
5659 18:38:13.778314
5660 18:38:14.059001 01600000 ################################################################
5661 18:38:14.059172
5662 18:38:14.314631 01680000 ################################################################
5663 18:38:14.314781
5664 18:38:14.571002 01700000 ################################################################
5665 18:38:14.571156
5666 18:38:14.849576 01780000 ################################################################
5667 18:38:14.849737
5668 18:38:15.139600 01800000 ################################################################
5669 18:38:15.139742
5670 18:38:15.423897 01880000 ################################################################
5671 18:38:15.424052
5672 18:38:15.717810 01900000 ################################################################
5673 18:38:15.717956
5674 18:38:15.985298 01980000 ################################################################
5675 18:38:15.985486
5676 18:38:16.258144 01a00000 ################################################################
5677 18:38:16.258294
5678 18:38:16.547789 01a80000 ################################################################
5679 18:38:16.547970
5680 18:38:16.836375 01b00000 ################################################################
5681 18:38:16.836522
5682 18:38:17.099799 01b80000 ################################################################
5683 18:38:17.099948
5684 18:38:17.368034 01c00000 ################################################################
5685 18:38:17.368186
5686 18:38:17.629969 01c80000 ################################################################
5687 18:38:17.630119
5688 18:38:17.916074 01d00000 ################################################################
5689 18:38:17.916223
5690 18:38:18.196108 01d80000 ################################################################
5691 18:38:18.196260
5692 18:38:18.470574 01e00000 ################################################################
5693 18:38:18.470728
5694 18:38:18.729957 01e80000 ################################################################
5695 18:38:18.730102
5696 18:38:19.020241 01f00000 ################################################################
5697 18:38:19.020395
5698 18:38:19.306080 01f80000 ################################################################
5699 18:38:19.306226
5700 18:38:19.588164 02000000 ################################################################
5701 18:38:19.588339
5702 18:38:19.870961 02080000 ################################################################
5703 18:38:19.871111
5704 18:38:20.154634 02100000 ################################################################
5705 18:38:20.154776
5706 18:38:20.432324 02180000 ################################################################
5707 18:38:20.432466
5708 18:38:20.720121 02200000 ################################################################
5709 18:38:20.720266
5710 18:38:20.982260 02280000 ################################################################
5711 18:38:20.982416
5712 18:38:21.263118 02300000 ################################################################
5713 18:38:21.263262
5714 18:38:21.548173 02380000 ################################################################
5715 18:38:21.548316
5716 18:38:21.823703 02400000 ################################################################
5717 18:38:21.823841
5718 18:38:22.094166 02480000 ################################################################
5719 18:38:22.094318
5720 18:38:22.365156 02500000 ################################################################
5721 18:38:22.365312
5722 18:38:22.657651 02580000 ################################################################
5723 18:38:22.657797
5724 18:38:22.955450 02600000 ################################################################
5725 18:38:22.955600
5726 18:38:23.254425 02680000 ################################################################
5727 18:38:23.254569
5728 18:38:23.514586 02700000 ################################################################
5729 18:38:23.514742
5730 18:38:23.786876 02780000 ################################################################
5731 18:38:23.787019
5732 18:38:24.087382 02800000 ################################################################
5733 18:38:24.087527
5734 18:38:24.387434 02880000 ################################################################
5735 18:38:24.387580
5736 18:38:24.655524 02900000 ################################################################
5737 18:38:24.655673
5738 18:38:24.911894 02980000 ################################################################
5739 18:38:24.912045
5740 18:38:25.177952 02a00000 ################################################################
5741 18:38:25.178098
5742 18:38:25.468214 02a80000 ################################################################
5743 18:38:25.468358
5744 18:38:25.757015 02b00000 ################################################################
5745 18:38:25.757159
5746 18:38:26.041994 02b80000 ################################################################
5747 18:38:26.042153
5748 18:38:26.312087 02c00000 ################################################################
5749 18:38:26.312230
5750 18:38:26.590374 02c80000 ################################################################
5751 18:38:26.590521
5752 18:38:26.874822 02d00000 ################################################################
5753 18:38:26.874971
5754 18:38:27.132218 02d80000 ################################################################
5755 18:38:27.132366
5756 18:38:27.396007 02e00000 ################################################################
5757 18:38:27.396159
5758 18:38:27.671099 02e80000 ################################################################
5759 18:38:27.671241
5760 18:38:27.971906 02f00000 ################################################################
5761 18:38:27.972057
5762 18:38:28.259254 02f80000 ################################################################
5763 18:38:28.259401
5764 18:38:28.528009 03000000 ################################################################
5765 18:38:28.528161
5766 18:38:28.817106 03080000 ################################################################
5767 18:38:28.817252
5768 18:38:29.097521 03100000 ################################################################
5769 18:38:29.097661
5770 18:38:29.361202 03180000 ################################################################
5771 18:38:29.361346
5772 18:38:29.617790 03200000 ################################################################
5773 18:38:29.617943
5774 18:38:29.899425 03280000 ################################################################
5775 18:38:29.899568
5776 18:38:30.183641 03300000 ################################################################
5777 18:38:30.183797
5778 18:38:30.453912 03380000 ################################################################
5779 18:38:30.454053
5780 18:38:30.729870 03400000 ################################################################
5781 18:38:30.730016
5782 18:38:31.006037 03480000 ################################################################
5783 18:38:31.006178
5784 18:38:31.284428 03500000 ################################################################
5785 18:38:31.284623
5786 18:38:31.573106 03580000 ################################################################
5787 18:38:31.573292
5788 18:38:31.840179 03600000 ################################################################
5789 18:38:31.840325
5790 18:38:32.115847 03680000 ################################################################
5791 18:38:32.116026
5792 18:38:32.380935 03700000 ################################################################
5793 18:38:32.381085
5794 18:38:32.659427 03780000 ################################################################
5795 18:38:32.659587
5796 18:38:32.929967 03800000 ################################################################
5797 18:38:32.930128
5798 18:38:33.204038 03880000 ################################################################
5799 18:38:33.204197
5800 18:38:33.485762 03900000 ################################################################
5801 18:38:33.485921
5802 18:38:33.773288 03980000 ################################################################
5803 18:38:33.773454
5804 18:38:34.063942 03a00000 ################################################################
5805 18:38:34.064101
5806 18:38:34.365820 03a80000 ################################################################
5807 18:38:34.365980
5808 18:38:34.661668 03b00000 ################################################################
5809 18:38:34.661834
5810 18:38:34.961256 03b80000 ################################################################
5811 18:38:34.961436
5812 18:38:35.234009 03c00000 ################################################################
5813 18:38:35.234162
5814 18:38:35.517233 03c80000 ################################################################
5815 18:38:35.517388
5816 18:38:35.788858 03d00000 ################################################################
5817 18:38:35.789014
5818 18:38:36.062786 03d80000 ################################################################
5819 18:38:36.062943
5820 18:38:36.349541 03e00000 ################################################################
5821 18:38:36.349742
5822 18:38:36.622897 03e80000 ################################################################
5823 18:38:36.623054
5824 18:38:36.886035 03f00000 ################################################################
5825 18:38:36.886192
5826 18:38:37.167244 03f80000 ################################################################
5827 18:38:37.167401
5828 18:38:37.456624 04000000 ################################################################
5829 18:38:37.456776
5830 18:38:37.754088 04080000 ################################################################
5831 18:38:37.754248
5832 18:38:38.027877 04100000 ################################################################
5833 18:38:38.028017
5834 18:38:38.288256 04180000 ################################################################
5835 18:38:38.288441
5836 18:38:38.575396 04200000 ################################################################
5837 18:38:38.575550
5838 18:38:38.867682 04280000 ################################################################
5839 18:38:38.867866
5840 18:38:39.157421 04300000 ################################################################
5841 18:38:39.157613
5842 18:38:39.425554 04380000 ################################################################
5843 18:38:39.425739
5844 18:38:39.715477 04400000 ################################################################
5845 18:38:39.715627
5846 18:38:39.976790 04480000 ################################################################
5847 18:38:39.976972
5848 18:38:40.255987 04500000 ################################################################
5849 18:38:40.256171
5850 18:38:40.525749 04580000 ################################################################
5851 18:38:40.525934
5852 18:38:40.796815 04600000 ################################################################
5853 18:38:40.796988
5854 18:38:40.935624 04680000 ############################### done.
5855 18:38:40.935779
5856 18:38:40.938766 The bootfile was 74172882 bytes long.
5857 18:38:40.938861
5858 18:38:40.942055 Sending tftp read request... done.
5859 18:38:40.942156
5860 18:38:40.945624 Waiting for the transfer...
5861 18:38:40.945721
5862 18:38:40.945793 00000000 # done.
5863 18:38:40.945862
5864 18:38:40.955161 Command line loaded dynamically from TFTP file: 14291439/tftp-deploy-3x77qzvl/kernel/cmdline
5865 18:38:40.955261
5866 18:38:40.971594 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5867 18:38:40.971734
5868 18:38:40.971809 Loading FIT.
5869 18:38:40.971876
5870 18:38:40.974776 Image ramdisk-1 has 60988033 bytes.
5871 18:38:40.974870
5872 18:38:40.977995 Image fdt-1 has 57695 bytes.
5873 18:38:40.978086
5874 18:38:40.981215 Image kernel-1 has 13125101 bytes.
5875 18:38:40.981307
5876 18:38:40.991274 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5877 18:38:40.991391
5878 18:38:41.000932 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5879 18:38:41.001044
5880 18:38:41.007555 Choosing best match conf-1 for compat google,juniper-sku16.
5881 18:38:41.011873
5882 18:38:41.015827 Connected to device vid:did:rid of 1ae0:0028:00
5883 18:38:41.023213
5884 18:38:41.026492 tpm_get_response: command 0x17b, return code 0x0
5885 18:38:41.026588
5886 18:38:41.029864 tpm_cleanup: add release locality here.
5887 18:38:41.029957
5888 18:38:41.033017 Shutting down all USB controllers.
5889 18:38:41.033107
5890 18:38:41.036257 Removing current net device
5891 18:38:41.036349
5892 18:38:41.039664 Exiting depthcharge with code 4 at timestamp: 58425233
5893 18:38:41.039756
5894 18:38:41.046091 LZMA decompressing kernel-1 to 0x80193568
5895 18:38:41.046185
5896 18:38:41.049409 LZMA decompressing kernel-1 to 0x40000000
5897 18:38:42.914512
5898 18:38:42.914674 jumping to kernel
5899 18:38:42.915243 end: 2.2.4 bootloader-commands (duration 00:00:43) [common]
5900 18:38:42.915356 start: 2.2.5 auto-login-action (timeout 00:03:55) [common]
5901 18:38:42.915442 Setting prompt string to ['Linux version [0-9]']
5902 18:38:42.915519 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5903 18:38:42.915594 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5904 18:38:42.989882
5905 18:38:42.992992 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5906 18:38:42.996402 start: 2.2.5.1 login-action (timeout 00:03:55) [common]
5907 18:38:42.996525 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5908 18:38:42.996609 Setting prompt string to []
5909 18:38:42.996696 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5910 18:38:42.996778 Using line separator: #'\n'#
5911 18:38:42.996844 No login prompt set.
5912 18:38:42.996912 Parsing kernel messages
5913 18:38:42.996972 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5914 18:38:42.997082 [login-action] Waiting for messages, (timeout 00:03:55)
5915 18:38:42.997154 Waiting using forced prompt support (timeout 00:01:57)
5916 18:38:43.015885 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j225340-arm64-gcc-10-defconfig-arm64-chromebook-x2t4v) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 11 17:44:14 UTC 2024
5917 18:38:43.019239 [ 0.000000] random: crng init done
5918 18:38:43.025674 [ 0.000000] Machine model: Google juniper sku16 board
5919 18:38:43.028853 [ 0.000000] efi: UEFI not found.
5920 18:38:43.035520 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5921 18:38:43.045226 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5922 18:38:43.051893 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5923 18:38:43.054999 [ 0.000000] printk: bootconsole [mtk8250] enabled
5924 18:38:43.064457 [ 0.000000] NUMA: No NUMA configuration found
5925 18:38:43.070986 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5926 18:38:43.077570 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5927 18:38:43.077718 [ 0.000000] Zone ranges:
5928 18:38:43.083999 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5929 18:38:43.087320 [ 0.000000] DMA32 empty
5930 18:38:43.093994 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5931 18:38:43.097406 [ 0.000000] Movable zone start for each node
5932 18:38:43.100517 [ 0.000000] Early memory node ranges
5933 18:38:43.107189 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5934 18:38:43.113384 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5935 18:38:43.120142 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5936 18:38:43.126935 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5937 18:38:43.133397 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5938 18:38:43.140268 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5939 18:38:43.156911 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5940 18:38:43.163306 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5941 18:38:43.170090 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5942 18:38:43.173182 [ 0.000000] psci: probing for conduit method from DT.
5943 18:38:43.179650 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5944 18:38:43.182848 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5945 18:38:43.189456 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5946 18:38:43.192531 [ 0.000000] psci: SMC Calling Convention v1.1
5947 18:38:43.199344 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5948 18:38:43.202438 [ 0.000000] Detected VIPT I-cache on CPU0
5949 18:38:43.209052 [ 0.000000] CPU features: detected: GIC system register CPU interface
5950 18:38:43.215375 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5951 18:38:43.221977 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5952 18:38:43.228490 [ 0.000000] CPU features: detected: ARM erratum 845719
5953 18:38:43.231679 [ 0.000000] alternatives: applying boot alternatives
5954 18:38:43.238366 [ 0.000000] Fallback order for Node 0: 0
5955 18:38:43.244867 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5956 18:38:43.248115 [ 0.000000] Policy zone: Normal
5957 18:38:43.264510 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5958 18:38:43.277554 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5959 18:38:43.287385 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5960 18:38:43.293675 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5961 18:38:43.300274 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5962 18:38:43.306990 <6>[ 0.000000] software IO TLB: area num 8.
5963 18:38:43.331290 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5964 18:38:43.389216 <6>[ 0.000000] Memory: 3855516K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 302948K reserved, 32768K cma-reserved)
5965 18:38:43.395673 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5966 18:38:43.402256 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5967 18:38:43.405423 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5968 18:38:43.411887 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5969 18:38:43.418718 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5970 18:38:43.425154 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5971 18:38:43.431576 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5972 18:38:43.438403 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5973 18:38:43.444820 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5974 18:38:43.454414 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5975 18:38:43.461163 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5976 18:38:43.464290 <6>[ 0.000000] GICv3: 640 SPIs implemented
5977 18:38:43.467565 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5978 18:38:43.474106 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5979 18:38:43.477354 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5980 18:38:43.484013 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5981 18:38:43.497084 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5982 18:38:43.509982 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5983 18:38:43.516405 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5984 18:38:43.526552 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5985 18:38:43.539418 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5986 18:38:43.546084 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5987 18:38:43.553167 <6>[ 0.009480] Console: colour dummy device 80x25
5988 18:38:43.556514 <6>[ 0.014517] printk: console [tty1] enabled
5989 18:38:43.569680 <6>[ 0.018903] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5990 18:38:43.572811 <6>[ 0.029367] pid_max: default: 32768 minimum: 301
5991 18:38:43.579447 <6>[ 0.034248] LSM: Security Framework initializing
5992 18:38:43.585991 <6>[ 0.039165] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5993 18:38:43.592281 <6>[ 0.046788] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5994 18:38:43.599202 <4>[ 0.055663] cacheinfo: Unable to detect cache hierarchy for CPU 0
5995 18:38:43.609132 <6>[ 0.062290] cblist_init_generic: Setting adjustable number of callback queues.
5996 18:38:43.615687 <6>[ 0.069735] cblist_init_generic: Setting shift to 3 and lim to 1.
5997 18:38:43.622508 <6>[ 0.076089] cblist_init_generic: Setting adjustable number of callback queues.
5998 18:38:43.628767 <6>[ 0.083534] cblist_init_generic: Setting shift to 3 and lim to 1.
5999 18:38:43.635252 <6>[ 0.089931] rcu: Hierarchical SRCU implementation.
6000 18:38:43.638786 <6>[ 0.094957] rcu: Max phase no-delay instances is 1000.
6001 18:38:43.646516 <6>[ 0.102904] EFI services will not be available.
6002 18:38:43.649787 <6>[ 0.107852] smp: Bringing up secondary CPUs ...
6003 18:38:43.660511 <6>[ 0.113130] Detected VIPT I-cache on CPU1
6004 18:38:43.666726 <4>[ 0.113177] cacheinfo: Unable to detect cache hierarchy for CPU 1
6005 18:38:43.673331 <6>[ 0.113186] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6006 18:38:43.679871 <6>[ 0.113218] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6007 18:38:43.683117 <6>[ 0.113701] Detected VIPT I-cache on CPU2
6008 18:38:43.689950 <4>[ 0.113733] cacheinfo: Unable to detect cache hierarchy for CPU 2
6009 18:38:43.696385 <6>[ 0.113738] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6010 18:38:43.702901 <6>[ 0.113751] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6011 18:38:43.709226 <6>[ 0.114195] Detected VIPT I-cache on CPU3
6012 18:38:43.715756 <4>[ 0.114225] cacheinfo: Unable to detect cache hierarchy for CPU 3
6013 18:38:43.722372 <6>[ 0.114230] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6014 18:38:43.729172 <6>[ 0.114241] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6015 18:38:43.732132 <6>[ 0.114816] CPU features: detected: Spectre-v2
6016 18:38:43.738919 <6>[ 0.114826] CPU features: detected: Spectre-BHB
6017 18:38:43.742043 <6>[ 0.114830] CPU features: detected: ARM erratum 858921
6018 18:38:43.748709 <6>[ 0.114835] Detected VIPT I-cache on CPU4
6019 18:38:43.755159 <4>[ 0.114883] cacheinfo: Unable to detect cache hierarchy for CPU 4
6020 18:38:43.761860 <6>[ 0.114891] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6021 18:38:43.768141 <6>[ 0.114898] arch_timer: Enabling local workaround for ARM erratum 858921
6022 18:38:43.775057 <6>[ 0.114909] arch_timer: CPU4: Trapping CNTVCT access
6023 18:38:43.781250 <6>[ 0.114916] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6024 18:38:43.784428 <6>[ 0.115402] Detected VIPT I-cache on CPU5
6025 18:38:43.790977 <4>[ 0.115443] cacheinfo: Unable to detect cache hierarchy for CPU 5
6026 18:38:43.797672 <6>[ 0.115448] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6027 18:38:43.804082 <6>[ 0.115455] arch_timer: Enabling local workaround for ARM erratum 858921
6028 18:38:43.810780 <6>[ 0.115461] arch_timer: CPU5: Trapping CNTVCT access
6029 18:38:43.817364 <6>[ 0.115466] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6030 18:38:43.820623 <6>[ 0.115902] Detected VIPT I-cache on CPU6
6031 18:38:43.827214 <4>[ 0.115948] cacheinfo: Unable to detect cache hierarchy for CPU 6
6032 18:38:43.833771 <6>[ 0.115954] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6033 18:38:43.840439 <6>[ 0.115961] arch_timer: Enabling local workaround for ARM erratum 858921
6034 18:38:43.846804 <6>[ 0.115967] arch_timer: CPU6: Trapping CNTVCT access
6035 18:38:43.853556 <6>[ 0.115972] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6036 18:38:43.856813 <6>[ 0.116503] Detected VIPT I-cache on CPU7
6037 18:38:43.863468 <4>[ 0.116547] cacheinfo: Unable to detect cache hierarchy for CPU 7
6038 18:38:43.869651 <6>[ 0.116553] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6039 18:38:43.879349 <6>[ 0.116560] arch_timer: Enabling local workaround for ARM erratum 858921
6040 18:38:43.882601 <6>[ 0.116566] arch_timer: CPU7: Trapping CNTVCT access
6041 18:38:43.889271 <6>[ 0.116572] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6042 18:38:43.895601 <6>[ 0.116637] smp: Brought up 1 node, 8 CPUs
6043 18:38:43.898971 <6>[ 0.355505] SMP: Total of 8 processors activated.
6044 18:38:43.905644 <6>[ 0.360441] CPU features: detected: 32-bit EL0 Support
6045 18:38:43.908690 <6>[ 0.365812] CPU features: detected: 32-bit EL1 Support
6046 18:38:43.915239 <6>[ 0.371177] CPU features: detected: CRC32 instructions
6047 18:38:43.918688 <6>[ 0.376602] CPU: All CPU(s) started at EL2
6048 18:38:43.925240 <6>[ 0.380941] alternatives: applying system-wide alternatives
6049 18:38:43.932691 <6>[ 0.388930] devtmpfs: initialized
6050 18:38:43.947976 <6>[ 0.397871] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6051 18:38:43.954561 <6>[ 0.407819] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6052 18:38:43.960978 <6>[ 0.415547] pinctrl core: initialized pinctrl subsystem
6053 18:38:43.964388 <6>[ 0.422666] DMI not present or invalid.
6054 18:38:43.970757 <6>[ 0.427032] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6055 18:38:43.980794 <6>[ 0.433934] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6056 18:38:43.987442 <6>[ 0.441473] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6057 18:38:43.997245 <6>[ 0.449725] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6058 18:38:44.003736 <6>[ 0.457903] audit: initializing netlink subsys (disabled)
6059 18:38:44.010470 <5>[ 0.463608] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6060 18:38:44.016924 <6>[ 0.464578] thermal_sys: Registered thermal governor 'step_wise'
6061 18:38:44.023235 <6>[ 0.471573] thermal_sys: Registered thermal governor 'power_allocator'
6062 18:38:44.026550 <6>[ 0.477872] cpuidle: using governor menu
6063 18:38:44.033037 <6>[ 0.488834] NET: Registered PF_QIPCRTR protocol family
6064 18:38:44.039819 <6>[ 0.494316] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6065 18:38:44.046172 <6>[ 0.501411] ASID allocator initialised with 32768 entries
6066 18:38:44.052633 <6>[ 0.508184] Serial: AMBA PL011 UART driver
6067 18:38:44.062135 <4>[ 0.518623] Trying to register duplicate clock ID: 113
6068 18:38:44.121795 <6>[ 0.574934] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6069 18:38:44.136167 <6>[ 0.589314] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6070 18:38:44.139555 <6>[ 0.599075] KASLR enabled
6071 18:38:44.154283 <6>[ 0.607080] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6072 18:38:44.160877 <6>[ 0.614082] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6073 18:38:44.167145 <6>[ 0.620558] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6074 18:38:44.173729 <6>[ 0.627548] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6075 18:38:44.180782 <6>[ 0.634022] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6076 18:38:44.186921 <6>[ 0.641012] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6077 18:38:44.193203 <6>[ 0.647485] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6078 18:38:44.200041 <6>[ 0.654475] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6079 18:38:44.206355 <6>[ 0.662041] ACPI: Interpreter disabled.
6080 18:38:44.213722 <6>[ 0.670047] iommu: Default domain type: Translated
6081 18:38:44.220405 <6>[ 0.675153] iommu: DMA domain TLB invalidation policy: strict mode
6082 18:38:44.223635 <5>[ 0.681785] SCSI subsystem initialized
6083 18:38:44.230087 <6>[ 0.686204] usbcore: registered new interface driver usbfs
6084 18:38:44.236559 <6>[ 0.691932] usbcore: registered new interface driver hub
6085 18:38:44.243040 <6>[ 0.697473] usbcore: registered new device driver usb
6086 18:38:44.246219 <6>[ 0.703784] pps_core: LinuxPPS API ver. 1 registered
6087 18:38:44.255976 <6>[ 0.708969] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6088 18:38:44.262343 <6>[ 0.718294] PTP clock support registered
6089 18:38:44.265710 <6>[ 0.722546] EDAC MC: Ver: 3.0.0
6090 18:38:44.272331 <6>[ 0.728184] FPGA manager framework
6091 18:38:44.275480 <6>[ 0.731869] Advanced Linux Sound Architecture Driver Initialized.
6092 18:38:44.279185 <6>[ 0.738624] vgaarb: loaded
6093 18:38:44.285464 <6>[ 0.741743] clocksource: Switched to clocksource arch_sys_counter
6094 18:38:44.292077 <5>[ 0.748173] VFS: Disk quotas dquot_6.6.0
6095 18:38:44.298695 <6>[ 0.752348] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6096 18:38:44.301898 <6>[ 0.759523] pnp: PnP ACPI: disabled
6097 18:38:44.310045 <6>[ 0.766416] NET: Registered PF_INET protocol family
6098 18:38:44.316674 <6>[ 0.771647] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6099 18:38:44.328591 <6>[ 0.781560] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6100 18:38:44.338504 <6>[ 0.790313] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6101 18:38:44.344859 <6>[ 0.798263] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6102 18:38:44.351269 <6>[ 0.806496] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6103 18:38:44.361427 <6>[ 0.814591] TCP: Hash tables configured (established 32768 bind 32768)
6104 18:38:44.368103 <6>[ 0.821421] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6105 18:38:44.374532 <6>[ 0.828391] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6106 18:38:44.381112 <6>[ 0.835871] NET: Registered PF_UNIX/PF_LOCAL protocol family
6107 18:38:44.387687 <6>[ 0.841962] RPC: Registered named UNIX socket transport module.
6108 18:38:44.390867 <6>[ 0.848107] RPC: Registered udp transport module.
6109 18:38:44.397368 <6>[ 0.853031] RPC: Registered tcp transport module.
6110 18:38:44.404038 <6>[ 0.857954] RPC: Registered tcp NFSv4.1 backchannel transport module.
6111 18:38:44.407342 <6>[ 0.864605] PCI: CLS 0 bytes, default 64
6112 18:38:44.410608 <6>[ 0.868893] Unpacking initramfs...
6113 18:38:44.425266 <6>[ 0.878302] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6114 18:38:44.435054 <6>[ 0.886927] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6115 18:38:44.438474 <6>[ 0.895775] kvm [1]: IPA Size Limit: 40 bits
6116 18:38:44.445701 <6>[ 0.902104] kvm [1]: vgic-v2@c420000
6117 18:38:44.452475 <6>[ 0.905919] kvm [1]: GIC system register CPU interface enabled
6118 18:38:44.455797 <6>[ 0.912093] kvm [1]: vgic interrupt IRQ18
6119 18:38:44.462071 <6>[ 0.916465] kvm [1]: Hyp mode initialized successfully
6120 18:38:44.465603 <5>[ 0.922728] Initialise system trusted keyrings
6121 18:38:44.471749 <6>[ 0.927569] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6122 18:38:44.481226 <6>[ 0.937539] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6123 18:38:44.487895 <5>[ 0.944038] NFS: Registering the id_resolver key type
6124 18:38:44.490941 <5>[ 0.949354] Key type id_resolver registered
6125 18:38:44.497394 <5>[ 0.953766] Key type id_legacy registered
6126 18:38:44.503882 <6>[ 0.958072] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6127 18:38:44.510715 <6>[ 0.964992] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6128 18:38:44.517087 <6>[ 0.972791] 9p: Installing v9fs 9p2000 file system support
6129 18:38:44.545441 <5>[ 1.001549] Key type asymmetric registered
6130 18:38:44.548385 <5>[ 1.005895] Asymmetric key parser 'x509' registered
6131 18:38:44.558207 <6>[ 1.011056] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6132 18:38:44.561341 <6>[ 1.018669] io scheduler mq-deadline registered
6133 18:38:44.568038 <6>[ 1.023428] io scheduler kyber registered
6134 18:38:44.587957 <6>[ 1.044292] EINJ: ACPI disabled.
6135 18:38:44.594422 <4>[ 1.048065] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6136 18:38:44.632851 <6>[ 1.089104] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6137 18:38:44.641378 <6>[ 1.097597] printk: console [ttyS0] disabled
6138 18:38:44.669113 <6>[ 1.122246] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6139 18:38:44.675891 <6>[ 1.131720] printk: console [ttyS0] enabled
6140 18:38:44.679377 <6>[ 1.131720] printk: console [ttyS0] enabled
6141 18:38:44.685779 <6>[ 1.140636] printk: bootconsole [mtk8250] disabled
6142 18:38:44.688726 <6>[ 1.140636] printk: bootconsole [mtk8250] disabled
6143 18:38:44.698796 <3>[ 1.151178] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6144 18:38:44.705220 <3>[ 1.159560] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6145 18:38:44.734870 <6>[ 1.187976] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6146 18:38:44.741479 <6>[ 1.197633] serial serial0: tty port ttyS1 registered
6147 18:38:44.747975 <6>[ 1.204217] SuperH (H)SCI(F) driver initialized
6148 18:38:44.754422 <6>[ 1.209746] msm_serial: driver initialized
6149 18:38:44.767188 <6>[ 1.220120] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6150 18:38:44.776875 <6>[ 1.228725] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6151 18:38:44.783814 <6>[ 1.237305] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6152 18:38:44.793314 <6>[ 1.245879] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6153 18:38:44.802974 <6>[ 1.254535] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6154 18:38:44.809565 <6>[ 1.263198] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6155 18:38:44.819422 <6>[ 1.271942] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6156 18:38:44.828992 <6>[ 1.280681] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6157 18:38:44.835534 <6>[ 1.289261] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6158 18:38:44.845388 <6>[ 1.298063] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6159 18:38:44.854415 <4>[ 1.310487] cacheinfo: Unable to detect cache hierarchy for CPU 0
6160 18:38:44.863675 <6>[ 1.319896] loop: module loaded
6161 18:38:44.875779 <6>[ 1.331911] vsim1: Bringing 1800000uV into 2700000-2700000uV
6162 18:38:44.893899 <6>[ 1.350079] megasas: 07.719.03.00-rc1
6163 18:38:44.902852 <6>[ 1.359078] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6164 18:38:44.920176 <6>[ 1.373126] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6165 18:38:44.933155 <6>[ 1.389437] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6166 18:38:44.993200 <6>[ 1.442927] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6167 18:38:46.447690 <6>[ 2.903963] Freeing initrd memory: 59556K
6168 18:38:46.463050 <4>[ 2.915913] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6169 18:38:46.469573 <4>[ 2.925167] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6170 18:38:46.476030 <4>[ 2.931866] Hardware name: Google juniper sku16 board (DT)
6171 18:38:46.479160 <4>[ 2.937605] Call trace:
6172 18:38:46.482420 <4>[ 2.940305] dump_backtrace.part.0+0xe0/0xf0
6173 18:38:46.485949 <4>[ 2.944842] show_stack+0x18/0x30
6174 18:38:46.492355 <4>[ 2.948414] dump_stack_lvl+0x68/0x84
6175 18:38:46.495647 <4>[ 2.952335] dump_stack+0x18/0x34
6176 18:38:46.498962 <4>[ 2.955905] sysfs_warn_dup+0x64/0x80
6177 18:38:46.501925 <4>[ 2.959827] sysfs_do_create_link_sd+0xf0/0x100
6178 18:38:46.508919 <4>[ 2.964614] sysfs_create_link+0x20/0x40
6179 18:38:46.511902 <4>[ 2.968793] bus_add_device+0x68/0x10c
6180 18:38:46.515040 <4>[ 2.972799] device_add+0x340/0x7ac
6181 18:38:46.518481 <4>[ 2.976542] of_device_add+0x44/0x60
6182 18:38:46.525082 <4>[ 2.980376] of_platform_device_create_pdata+0x90/0x120
6183 18:38:46.528398 <4>[ 2.985857] of_platform_bus_create+0x170/0x370
6184 18:38:46.534718 <4>[ 2.990644] of_platform_populate+0x50/0xfc
6185 18:38:46.537953 <4>[ 2.995083] parse_mtd_partitions+0x1dc/0x510
6186 18:38:46.544457 <4>[ 2.999696] mtd_device_parse_register+0xf8/0x2e0
6187 18:38:46.547779 <4>[ 3.004654] spi_nor_probe+0x21c/0x2f0
6188 18:38:46.550981 <4>[ 3.008660] spi_mem_probe+0x6c/0xb0
6189 18:38:46.554138 <4>[ 3.012492] spi_probe+0x84/0xe4
6190 18:38:46.557715 <4>[ 3.015973] really_probe+0xbc/0x2e0
6191 18:38:46.564390 <4>[ 3.019804] __driver_probe_device+0x78/0x11c
6192 18:38:46.567365 <4>[ 3.024416] driver_probe_device+0xd8/0x160
6193 18:38:46.573963 <4>[ 3.028854] __device_attach_driver+0xb8/0x134
6194 18:38:46.577152 <4>[ 3.033552] bus_for_each_drv+0x78/0xd0
6195 18:38:46.580469 <4>[ 3.037643] __device_attach+0xa8/0x1c0
6196 18:38:46.583643 <4>[ 3.041733] device_initial_probe+0x14/0x20
6197 18:38:46.589966 <4>[ 3.046171] bus_probe_device+0x9c/0xa4
6198 18:38:46.593221 <4>[ 3.050262] device_add+0x3ac/0x7ac
6199 18:38:46.596620 <4>[ 3.054004] __spi_add_device+0x78/0x120
6200 18:38:46.599918 <4>[ 3.058182] spi_add_device+0x40/0x7c
6201 18:38:46.606216 <4>[ 3.062100] spi_register_controller+0x610/0xad0
6202 18:38:46.609537 <4>[ 3.066973] devm_spi_register_controller+0x4c/0xa4
6203 18:38:46.616397 <4>[ 3.072106] mtk_spi_probe+0x3f8/0x650
6204 18:38:46.619244 <4>[ 3.076110] platform_probe+0x68/0xe0
6205 18:38:46.622817 <4>[ 3.080028] really_probe+0xbc/0x2e0
6206 18:38:46.626070 <4>[ 3.083858] __driver_probe_device+0x78/0x11c
6207 18:38:46.632204 <4>[ 3.088470] driver_probe_device+0xd8/0x160
6208 18:38:46.635608 <4>[ 3.092908] __driver_attach+0x94/0x19c
6209 18:38:46.639001 <4>[ 3.096998] bus_for_each_dev+0x70/0xd0
6210 18:38:46.642164 <4>[ 3.101088] driver_attach+0x24/0x30
6211 18:38:46.648783 <4>[ 3.104918] bus_add_driver+0x154/0x20c
6212 18:38:46.652059 <4>[ 3.109008] driver_register+0x78/0x130
6213 18:38:46.655257 <4>[ 3.113099] __platform_driver_register+0x28/0x34
6214 18:38:46.661659 <4>[ 3.118058] mtk_spi_driver_init+0x1c/0x28
6215 18:38:46.665031 <4>[ 3.122412] do_one_initcall+0x50/0x1d0
6216 18:38:46.671467 <4>[ 3.126502] kernel_init_freeable+0x21c/0x288
6217 18:38:46.674640 <4>[ 3.131116] kernel_init+0x24/0x12c
6218 18:38:46.677992 <4>[ 3.134861] ret_from_fork+0x10/0x20
6219 18:38:46.687430 <6>[ 3.143798] tun: Universal TUN/TAP device driver, 1.6
6220 18:38:46.690649 <6>[ 3.150104] thunder_xcv, ver 1.0
6221 18:38:46.697167 <6>[ 3.153609] thunder_bgx, ver 1.0
6222 18:38:46.697291 <6>[ 3.157115] nicpf, ver 1.0
6223 18:38:46.708345 <6>[ 3.161497] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6224 18:38:46.714726 <6>[ 3.168981] hns3: Copyright (c) 2017 Huawei Corporation.
6225 18:38:46.718408 <6>[ 3.174586] hclge is initializing
6226 18:38:46.721446 <6>[ 3.178171] e1000: Intel(R) PRO/1000 Network Driver
6227 18:38:46.728161 <6>[ 3.183306] e1000: Copyright (c) 1999-2006 Intel Corporation.
6228 18:38:46.734548 <6>[ 3.189327] e1000e: Intel(R) PRO/1000 Network Driver
6229 18:38:46.740922 <6>[ 3.194548] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6230 18:38:46.744558 <6>[ 3.200740] igb: Intel(R) Gigabit Ethernet Network Driver
6231 18:38:46.750981 <6>[ 3.206395] igb: Copyright (c) 2007-2014 Intel Corporation.
6232 18:38:46.757186 <6>[ 3.212239] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6233 18:38:46.763940 <6>[ 3.218763] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6234 18:38:46.767011 <6>[ 3.225324] sky2: driver version 1.30
6235 18:38:46.774544 <6>[ 3.230588] usbcore: registered new device driver r8152-cfgselector
6236 18:38:46.780824 <6>[ 3.237130] usbcore: registered new interface driver r8152
6237 18:38:46.787191 <6>[ 3.242958] VFIO - User Level meta-driver version: 0.3
6238 18:38:46.794451 <6>[ 3.250793] mtu3 11201000.usb: uwk - reg:0x420, version:101
6239 18:38:46.804219 <4>[ 3.256668] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6240 18:38:46.807479 <6>[ 3.263940] mtu3 11201000.usb: dr_mode: 1, drd: auto
6241 18:38:46.814195 <6>[ 3.269165] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6242 18:38:46.817351 <6>[ 3.275354] mtu3 11201000.usb: usb3-drd: 0
6243 18:38:46.827812 <6>[ 3.280898] mtu3 11201000.usb: xHCI platform device register success...
6244 18:38:46.834638 <4>[ 3.289531] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6245 18:38:46.841314 <6>[ 3.297466] xhci-mtk 11200000.usb: xHCI Host Controller
6246 18:38:46.851083 <6>[ 3.302995] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6247 18:38:46.854375 <6>[ 3.310718] xhci-mtk 11200000.usb: USB3 root hub has no ports
6248 18:38:46.864177 <6>[ 3.316726] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6249 18:38:46.870383 <6>[ 3.326150] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6250 18:38:46.877017 <6>[ 3.332236] xhci-mtk 11200000.usb: xHCI Host Controller
6251 18:38:46.883876 <6>[ 3.337725] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6252 18:38:46.890128 <6>[ 3.345382] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6253 18:38:46.896585 <6>[ 3.352200] hub 1-0:1.0: USB hub found
6254 18:38:46.899973 <6>[ 3.356229] hub 1-0:1.0: 1 port detected
6255 18:38:46.909810 <6>[ 3.361565] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6256 18:38:46.912767 <6>[ 3.370183] hub 2-0:1.0: USB hub found
6257 18:38:46.919222 <3>[ 3.374209] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6258 18:38:46.925672 <6>[ 3.382115] usbcore: registered new interface driver usb-storage
6259 18:38:46.932402 <6>[ 3.388701] usbcore: registered new device driver onboard-usb-hub
6260 18:38:46.945008 <4>[ 3.397846] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6261 18:38:46.953866 <6>[ 3.410103] mt6397-rtc mt6358-rtc: registered as rtc0
6262 18:38:46.963663 <6>[ 3.415584] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-11T18:38:46 UTC (1718131126)
6263 18:38:46.970150 <6>[ 3.425478] i2c_dev: i2c /dev entries driver
6264 18:38:46.979743 <6>[ 3.431873] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6265 18:38:46.989710 <6>[ 3.440259] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6266 18:38:46.992880 <6>[ 3.449163] i2c 4-0058: Fixed dependency cycle(s) with /panel
6267 18:38:47.002532 <6>[ 3.455230] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6268 18:38:47.009009 <3>[ 3.462696] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6269 18:38:47.026615 <6>[ 3.482699] cpu cpu0: EM: created perf domain
6270 18:38:47.039435 <6>[ 3.488196] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6271 18:38:47.042847 <6>[ 3.499472] cpu cpu4: EM: created perf domain
6272 18:38:47.050008 <6>[ 3.506319] sdhci: Secure Digital Host Controller Interface driver
6273 18:38:47.056643 <6>[ 3.512776] sdhci: Copyright(c) Pierre Ossman
6274 18:38:47.063056 <6>[ 3.518187] Synopsys Designware Multimedia Card Interface Driver
6275 18:38:47.069571 <6>[ 3.518727] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6276 18:38:47.076159 <6>[ 3.525269] sdhci-pltfm: SDHCI platform and OF driver helper
6277 18:38:47.082807 <6>[ 3.538067] ledtrig-cpu: registered to indicate activity on CPUs
6278 18:38:47.089729 <6>[ 3.545840] usbcore: registered new interface driver usbhid
6279 18:38:47.096038 <6>[ 3.551682] usbhid: USB HID core driver
6280 18:38:47.102847 <6>[ 3.555948] spi_master spi2: will run message pump with realtime priority
6281 18:38:47.110076 <4>[ 3.555950] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6282 18:38:47.116395 <4>[ 3.570202] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6283 18:38:47.129287 <6>[ 3.575474] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6284 18:38:47.146510 <6>[ 3.592670] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6285 18:38:47.153101 <6>[ 3.608084] cros-ec-spi spi2.0: Chrome EC device registered
6286 18:38:47.159424 <4>[ 3.611397] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6287 18:38:47.177887 <4>[ 3.630871] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6288 18:38:47.189144 <4>[ 3.642102] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6289 18:38:47.195597 <6>[ 3.643699] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6290 18:38:47.202161 <4>[ 3.650921] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6291 18:38:47.205418 <6>[ 3.657410] mmc0: new HS400 MMC card at address 0001
6292 18:38:47.212010 <6>[ 3.668400] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6293 18:38:47.218727 <6>[ 3.672350] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6294 18:38:47.229651 <6>[ 3.685674] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6295 18:38:47.239392 <6>[ 3.690976] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6296 18:38:47.246076 <6>[ 3.695416] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6297 18:38:47.255413 <6>[ 3.704327] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6298 18:38:47.262216 <6>[ 3.707188] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6299 18:38:47.265149 <6>[ 3.718021] NET: Registered PF_PACKET protocol family
6300 18:38:47.271821 <6>[ 3.722844] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6301 18:38:47.284713 <6>[ 3.726000] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6302 18:38:47.294470 <6>[ 3.726113] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6303 18:38:47.297896 <6>[ 3.727042] 9pnet: Installing 9P2000 support
6304 18:38:47.304426 <5>[ 3.760088] Key type dns_resolver registered
6305 18:38:47.307652 <6>[ 3.765289] registered taskstats version 1
6306 18:38:47.314015 <5>[ 3.769652] Loading compiled-in X.509 certificates
6307 18:38:47.336741 <6>[ 3.789772] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6308 18:38:47.354315 <3>[ 3.807172] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6309 18:38:47.386130 <6>[ 3.835978] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6310 18:38:47.397391 <6>[ 3.850362] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6311 18:38:47.407370 <6>[ 3.858919] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6312 18:38:47.413671 <6>[ 3.867577] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6313 18:38:47.423482 <6>[ 3.876243] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6314 18:38:47.433387 <6>[ 3.884848] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6315 18:38:47.439942 <6>[ 3.893400] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6316 18:38:47.449761 <6>[ 3.901991] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6317 18:38:47.455952 <6>[ 3.911660] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6318 18:38:47.462905 <6>[ 3.919228] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6319 18:38:47.470388 <6>[ 3.926541] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6320 18:38:47.480719 <6>[ 3.933794] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6321 18:38:47.487258 <6>[ 3.941186] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6322 18:38:47.490494 <6>[ 3.945533] hub 1-1:1.0: USB hub found
6323 18:38:47.497149 <6>[ 3.949568] panfrost 13040000.gpu: clock rate = 511999970
6324 18:38:47.500374 <6>[ 3.952211] hub 1-1:1.0: 3 ports detected
6325 18:38:47.510117 <6>[ 3.957558] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6326 18:38:47.520086 <6>[ 3.972034] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6327 18:38:47.526719 <6>[ 3.980044] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6328 18:38:47.539408 <6>[ 3.988475] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6329 18:38:47.545826 <6>[ 4.000553] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6330 18:38:47.557804 <6>[ 4.010629] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6331 18:38:47.567585 <6>[ 4.019483] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6332 18:38:47.577076 <6>[ 4.028635] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6333 18:38:47.587056 <6>[ 4.037765] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6334 18:38:47.593554 <6>[ 4.046893] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6335 18:38:47.603381 <6>[ 4.056194] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6336 18:38:47.613230 <6>[ 4.065494] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6337 18:38:47.623170 <6>[ 4.074968] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6338 18:38:47.632664 <6>[ 4.084441] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6339 18:38:47.642409 <6>[ 4.093568] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6340 18:38:47.712690 <6>[ 4.165502] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6341 18:38:47.722380 <6>[ 4.174394] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6342 18:38:47.733315 <6>[ 4.186042] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6343 18:38:47.800929 <6>[ 4.253776] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6344 18:38:48.435419 <6>[ 4.450222] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6345 18:38:48.445198 <4>[ 4.567155] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6346 18:38:48.451690 <4>[ 4.567174] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6347 18:38:48.458440 <6>[ 4.619967] r8152 1-1.2:1.0 eth0: v1.12.13
6348 18:38:48.465001 <6>[ 4.701771] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6349 18:38:48.471568 <6>[ 4.871944] Console: switching to colour frame buffer device 170x48
6350 18:38:48.481197 <6>[ 4.932594] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6351 18:38:48.496857 <6>[ 4.946698] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6352 18:38:48.514439 <6>[ 4.964233] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6353 18:38:48.524327 <6>[ 4.976555] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6354 18:38:48.530855 <6>[ 4.984536] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6355 18:38:48.540763 <6>[ 4.991768] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6356 18:38:48.561308 <6>[ 5.010831] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6357 18:38:49.796059 <6>[ 6.252404] r8152 1-1.2:1.0 eth0: carrier on
6358 18:38:52.821832 <5>[ 6.277763] Sending DHCP requests .., OK
6359 18:38:52.828488 <6>[ 9.282238] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6360 18:38:52.831517 <6>[ 9.290675] IP-Config: Complete:
6361 18:38:52.844657 <6>[ 9.294242] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6362 18:38:52.854320 <6>[ 9.305143] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6363 18:38:52.866468 <6>[ 9.319420] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6364 18:38:52.874934 <6>[ 9.319431] nameserver0=192.168.201.1
6365 18:38:52.883237 <6>[ 9.339222] clk: Disabling unused clocks
6366 18:38:52.887800 <6>[ 9.347194] ALSA device list:
6367 18:38:52.897142 <6>[ 9.353216] No soundcards found.
6368 18:38:52.905976 <6>[ 9.362136] Freeing unused kernel memory: 8512K
6369 18:38:52.913083 <6>[ 9.369287] Run /init as init process
6370 18:38:52.942720 <6>[ 9.398718] NET: Registered PF_INET6 protocol family
6371 18:38:52.949319 <6>[ 9.405489] Segment Routing with IPv6
6372 18:38:52.952486 <6>[ 9.410155] In-situ OAM (IOAM) with IPv6
6373 18:38:53.002326 <30>[ 9.429301] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6374 18:38:53.009148 <30>[ 9.465015] systemd[1]: Detected architecture arm64.
6375 18:38:53.013326
6376 18:38:53.016182 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6377 18:38:53.016274
6378 18:38:53.030021 <30>[ 9.486165] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6379 18:38:53.166561 <30>[ 9.619373] systemd[1]: Queued start job for default target graphical.target.
6380 18:38:53.211185 <30>[ 9.663966] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6381 18:38:53.220854 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6382 18:38:53.238454 <30>[ 9.691338] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6383 18:38:53.248990 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6384 18:38:53.266727 <30>[ 9.719316] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6385 18:38:53.277393 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6386 18:38:53.297769 <30>[ 9.750701] systemd[1]: Created slice user.slice - User and Session Slice.
6387 18:38:53.307680 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6388 18:38:53.329462 <30>[ 9.778890] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6389 18:38:53.340942 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6390 18:38:53.365156 <30>[ 9.814695] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6391 18:38:53.377090 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6392 18:38:53.406232 <30>[ 9.846060] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6393 18:38:53.421289 <30>[ 9.874259] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6394 18:38:53.428625 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6395 18:38:53.449102 <30>[ 9.901940] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6396 18:38:53.461442 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6397 18:38:53.477256 <30>[ 9.929993] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6398 18:38:53.491418 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6399 18:38:53.505820 <30>[ 9.962003] systemd[1]: Reached target paths.target - Path Units.
6400 18:38:53.520503 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6401 18:38:53.537046 <30>[ 9.989936] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6402 18:38:53.549577 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6403 18:38:53.565225 <30>[ 10.017902] systemd[1]: Reached target slices.target - Slice Units.
6404 18:38:53.576463 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6405 18:38:53.589772 <30>[ 10.045982] systemd[1]: Reached target swap.target - Swaps.
6406 18:38:53.600699 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6407 18:38:53.621234 <30>[ 10.073983] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6408 18:38:53.634792 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6409 18:38:53.653438 <30>[ 10.106358] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6410 18:38:53.667215 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6411 18:38:53.687135 <30>[ 10.139825] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6412 18:38:53.700602 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6413 18:38:53.717847 <30>[ 10.170654] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6414 18:38:53.731822 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6415 18:38:53.749911 <30>[ 10.202674] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6416 18:38:53.762097 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6417 18:38:53.781876 <30>[ 10.234586] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6418 18:38:53.794852 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6419 18:38:53.813708 <30>[ 10.266429] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6420 18:38:53.826546 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6421 18:38:53.869362 <30>[ 10.322130] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6422 18:38:53.881095 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6423 18:38:53.902456 <30>[ 10.355230] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6424 18:38:53.913763 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6425 18:38:53.934383 <30>[ 10.387301] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6426 18:38:53.945578 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6427 18:38:53.968357 <30>[ 10.414602] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6428 18:38:53.991087 <30>[ 10.443677] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6429 18:38:54.003109 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6430 18:38:54.045712 <30>[ 10.498362] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6431 18:38:54.057813 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6432 18:38:54.082806 <30>[ 10.535883] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6433 18:38:54.100825 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod..<6>[ 10.552775] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6434 18:38:54.100957 .
6435 18:38:54.127171 <30>[ 10.579992] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6436 18:38:54.138039 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6437 18:38:54.163180 <30>[ 10.615954] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6438 18:38:54.175728 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6439 18:38:54.199364 <30>[ 10.652042] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6440 18:38:54.210107 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6441 18:38:54.273909 <30>[ 10.726769] systemd[1]: Starting systemd-journald.service - Journal Service...
6442 18:38:54.284943 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6443 18:38:54.305744 <30>[ 10.758651] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6444 18:38:54.316857 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6445 18:38:54.339618 <30>[ 10.789355] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6446 18:38:54.349466 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6447 18:38:54.369270 <30>[ 10.822342] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6448 18:38:54.383162 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6449 18:38:54.405559 <30>[ 10.858362] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6450 18:38:54.417211 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6451 18:38:54.437366 <30>[ 10.889910] systemd[1]: Started systemd-journald.service - Journal Service.
6452 18:38:54.446979 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6453 18:38:54.467250 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6454 18:38:54.485908 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6455 18:38:54.505920 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6456 18:38:54.530718 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6457 18:38:54.555870 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6458 18:38:54.580203 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6459 18:38:54.600389 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6460 18:38:54.617951 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6461 18:38:54.640283 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6462 18:38:54.663098 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6463 18:38:54.682902 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6464 18:38:54.703533 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6465 18:38:54.750357 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6466 18:38:54.773763 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6467 18:38:54.802584 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6468 18:38:54.817871 See 'systemctl status systemd-remount-fs.service' for details.
6469 18:38:54.843242 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6470 18:38:54.863131 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6471 18:38:54.882751 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6472 18:38:54.934367 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6473 18:38:54.952229 <46>[ 11.404753] systemd-journald[204]: Received client request to flush runtime journal.
6474 18:38:54.964307 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6475 18:38:54.986533 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6476 18:38:55.012537 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6477 18:38:55.035088 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6478 18:38:55.054936 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6479 18:38:55.098561 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6480 18:38:55.128519 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6481 18:38:55.146927 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6482 18:38:55.169902 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6483 18:38:55.230410 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6484 18:38:55.255947 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6485 18:38:55.280554 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6486 18:38:55.334195 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6487 18:38:55.355376 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6488 18:38:55.374067 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6489 18:38:55.407775 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6490 18:38:55.432289 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6491 18:38:55.449819 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6492 18:38:55.559368 <3>[ 12.008790] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6493 18:38:55.562820 <3>[ 12.011082] thermal_sys: Failed to find 'trips' node
6494 18:38:55.569144 <3>[ 12.019125] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6495 18:38:55.578722 <6>[ 12.022648] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6496 18:38:55.585457 <4>[ 12.024559] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6497 18:38:55.592170 <3>[ 12.024598] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6498 18:38:55.601785 <3>[ 12.024607] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6499 18:38:55.611419 <4>[ 12.024611] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6500 18:38:55.614552 <3>[ 12.025890] thermal_sys: Failed to find 'trips' node
6501 18:38:55.624382 <3>[ 12.025894] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6502 18:38:55.634318 <3>[ 12.025899] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6503 18:38:55.640705 <4>[ 12.025902] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6504 18:38:55.650440 <4>[ 12.027555] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6505 18:38:55.664860 <6>[ 12.028059] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6506 18:38:55.674412 <6>[ 12.029579] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6507 18:38:55.687699 <3>[ 12.029891] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6508 18:38:55.700613 <3>[ 12.031319] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6509 18:38:55.707139 <4>[ 12.039245] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6510 18:38:55.713511 <3>[ 12.046369] elan_i2c 2-0015: Error applying setting, reverse things back
6511 18:38:55.716733 <6>[ 12.064532] mc: Linux media interface: v0.10
6512 18:38:55.726874 <3>[ 12.075473] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6513 18:38:55.733357 <6>[ 12.089483] cs_system_cfg: CoreSight Configuration manager initialised
6514 18:38:55.740036 <6>[ 12.094213] videodev: Linux video capture interface: v2.00
6515 18:38:55.749440 <3>[ 12.094756] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6516 18:38:55.756163 <3>[ 12.094769] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6517 18:38:55.766167 <3>[ 12.094867] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6518 18:38:55.776017 <5>[ 12.114602] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6519 18:38:55.785411 <3>[ 12.124377] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6520 18:38:55.795816 <5>[ 12.149717] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6521 18:38:55.805422 <3>[ 12.160675] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6522 18:38:55.815204 <6>[ 12.161147] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6523 18:38:55.824907 <5>[ 12.168378] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6524 18:38:55.834696 <3>[ 12.175158] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6525 18:38:55.844381 <4>[ 12.179674] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6526 18:38:55.855171 <3>[ 12.187973] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6527 18:38:55.862012 <6>[ 12.194837] cfg80211: failed to load regulatory.db
6528 18:38:55.872346 <3>[ 12.200630] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6529 18:38:55.886009 <3>[ 12.201059] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6530 18:38:55.896588 <3>[ 12.201946] debugfs: File 'Playback' in directory 'dapm' already present!
6531 18:38:55.903190 <3>[ 12.201954] debugfs: File 'Capture' in directory 'dapm' already present!
6532 18:38:55.917877 <6>[ 12.203925] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6533 18:38:55.927264 <6>[ 12.214816] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6534 18:38:55.983412 [[0;32m OK [0m] Created slic<6>[ 12.435130] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6535 18:38:55.990708 e [0;1;39msyste<3>[ 12.444500] mtk-scp 10500000.scp: invalid resource
6536 18:38:55.996954 m-syste…- Slic<6>[ 12.444548] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6537 18:38:56.006939 <6>[ 12.450108] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6538 18:38:56.016739 e /system/system<6>[ 12.459493] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6539 18:38:56.016876 d-backlight.
6540 18:38:56.020087 <6>[ 12.460659] Bluetooth: Core ver 2.22
6541 18:38:56.026658 <6>[ 12.460724] NET: Registered PF_BLUETOOTH protocol family
6542 18:38:56.033179 <6>[ 12.460726] Bluetooth: HCI device and connection manager initialized
6543 18:38:56.036274 <6>[ 12.460739] Bluetooth: HCI socket layer initialized
6544 18:38:56.042831 <6>[ 12.460745] Bluetooth: L2CAP socket layer initialized
6545 18:38:56.049397 <6>[ 12.460753] Bluetooth: SCO socket layer initialized
6546 18:38:56.052679 <6>[ 12.468297] remoteproc remoteproc0: scp is available
6547 18:38:56.062751 <6>[ 12.476345] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6548 18:38:56.069175 <4>[ 12.481661] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6549 18:38:56.078721 <6>[ 12.487121] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6550 18:38:56.085644 <6>[ 12.488806] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6551 18:38:56.092726 <6>[ 12.493579] remoteproc remoteproc0: powering up scp
6552 18:38:56.096116 <6>[ 12.493869] Bluetooth: HCI UART driver ver 2.3
6553 18:38:56.102512 <6>[ 12.493875] Bluetooth: HCI UART protocol H4 registered
6554 18:38:56.109004 <6>[ 12.493918] Bluetooth: HCI UART protocol LL registered
6555 18:38:56.115628 <6>[ 12.493931] Bluetooth: HCI UART protocol Three-wire (H5) registered
6556 18:38:56.122099 <6>[ 12.494454] Bluetooth: HCI UART protocol Broadcom registered
6557 18:38:56.128753 <6>[ 12.494480] Bluetooth: HCI UART protocol QCA registered
6558 18:38:56.135248 <6>[ 12.494493] Bluetooth: HCI UART protocol Marvell registered
6559 18:38:56.141737 <6>[ 12.494564] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6560 18:38:56.148595 <6>[ 12.494659] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6561 18:38:56.154851 <6>[ 12.495604] Bluetooth: hci0: setting up ROME/QCA6390
6562 18:38:56.164557 <6>[ 12.495637] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6563 18:38:56.171069 <6>[ 12.495710] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6564 18:38:56.194905 <46>[ 12.497771] systemd-journald[204]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.0 (1536 of 2047 items, 524288 file size, 341 bytes per hash table item), suggesting rotation.
6565 18:38:56.211865 <46>[ 12.497784] systemd-journald[204]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6566 18:38:56.219118 <6>[ 12.498881] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6567 18:38:56.225545 <4>[ 12.504101] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6568 18:38:56.239515 <6>[ 12.506810] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6569 18:38:56.242942 <6>[ 12.506922] usbcore: registered new interface driver uvcvideo
6570 18:38:56.257787 <6>[ 12.509393] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6571 18:38:56.264136 <3>[ 12.514433] remoteproc remoteproc0: request_firmware failed: -2
6572 18:38:56.275926 <6>[ 12.522494] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6573 18:38:56.291583 <6>[ 12.550290] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6574 18:38:56.302341 <4>[ 12.655895] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6575 18:38:56.308622 <4>[ 12.655895] Fallback method does not support PEC.
6576 18:38:56.318934 <6>[ 12.656163] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6577 18:38:56.329829 <3>[ 12.675002] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6578 18:38:56.340858 <6>[ 12.679107] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6579 18:38:56.347404 <3>[ 12.697099] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6580 18:38:56.357320 <3>[ 12.697553] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6581 18:38:56.363763 <3>[ 12.708797] Bluetooth: hci0: Frame reassembly failed (-84)
6582 18:38:56.374104 <3>[ 12.717822] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6583 18:38:56.384053 <3>[ 12.788563] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6584 18:38:56.394000 <3>[ 12.788994] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6585 18:38:56.403896 <3>[ 12.793233] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6586 18:38:56.411056 <3>[ 12.798074] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6587 18:38:56.417192 <3>[ 12.803949] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6588 18:38:56.428539 <6>[ 12.855403] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6589 18:38:56.438117 <3>[ 12.869506] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6590 18:38:56.472448 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6591 18:38:56.510559 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6592 18:38:56.536477 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6593 18:38:56.542856 <6>[ 12.998524] Bluetooth: hci0: QCA Product ID :0x00000008
6594 18:38:56.553080 <6>[ 13.008758] Bluetooth: hci0: QCA SOC Version :0x00000044
6595 18:38:56.563317 <6>[ 13.018890] Bluetooth: hci0: QCA ROM Version :0x00000302
6596 18:38:56.573086 <6>[ 13.028903] Bluetooth: hci0: QCA Patch Version:0x00000111
6597 18:38:56.583104 <6>[ 13.038883] Bluetooth: hci0: QCA controller version 0x00440302
6598 18:38:56.596468 <6>[ 13.048821] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6599 18:38:56.609546 [[0;32m OK [0m] Reached target [0;1;39mblue<4>[ 13.058828] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6600 18:38:56.612535 tooth.target[0m - Bluetooth Support.
6601 18:38:56.619172 <3>[ 13.071959] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6602 18:38:56.627514 <3>[ 13.083233] Bluetooth: hci0: QCA Failed to download patch (-2)
6603 18:38:56.638977 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6604 18:38:56.654360 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6605 18:38:56.674989 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6606 18:38:56.693772 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6607 18:38:56.709727 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6608 18:38:56.726093 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6609 18:38:56.741700 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6610 18:38:56.758150 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6611 18:38:56.774179 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6612 18:38:56.826248 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6613 18:38:56.854341 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6614 18:38:56.867430 <6>[ 13.319849] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6615 18:38:56.887703 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6616 18:38:56.907173 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6617 18:38:56.936549 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6618 18:38:56.958067 <4>[ 13.410498] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6619 18:38:56.974882 <4>[ 13.427356] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6620 18:38:56.990231 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.<4>[ 13.443072] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6621 18:38:56.993736 service[0m - Getty on tty1.
6622 18:38:57.000614 <4>[ 13.456234] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6623 18:38:57.043139 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6624 18:38:57.066863 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6625 18:38:57.118627 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6626 18:38:57.143070 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6627 18:38:57.175082 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6628 18:38:57.196750 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6629 18:38:57.215095 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6630 18:38:57.258789 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6631 18:38:57.292054 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6632 18:38:57.370390
6633 18:38:57.374114 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6634 18:38:57.374660
6635 18:38:57.377106 debian-bookworm-arm64 login: root (automatic login)
6636 18:38:57.377672
6637 18:38:57.400701 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 11 17:44:14 UTC 2024 aarch64
6638 18:38:57.401230
6639 18:38:57.407199 The programs included with the Debian GNU/Linux system are free software;
6640 18:38:57.413515 the exact distribution terms for each program are described in the
6641 18:38:57.416799 individual files in /usr/share/doc/*/copyright.
6642 18:38:57.417340
6643 18:38:57.423137 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6644 18:38:57.426758 permitted by applicable law.
6645 18:38:57.428164 Matched prompt #10: / #
6647 18:38:57.429163 Setting prompt string to ['/ #']
6648 18:38:57.429754 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6650 18:38:57.430812 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6651 18:38:57.431292 start: 2.2.6 expect-shell-connection (timeout 00:03:41) [common]
6652 18:38:57.431655 Setting prompt string to ['/ #']
6653 18:38:57.432022 Forcing a shell prompt, looking for ['/ #']
6655 18:38:57.483117 / #
6656 18:38:57.483726 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6657 18:38:57.484148 Waiting using forced prompt support (timeout 00:02:30)
6658 18:38:57.489563
6659 18:38:57.490451 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6660 18:38:57.490920 start: 2.2.7 export-device-env (timeout 00:03:40) [common]
6661 18:38:57.491376 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6662 18:38:57.491793 end: 2.2 depthcharge-retry (duration 00:01:20) [common]
6663 18:38:57.492201 end: 2 depthcharge-action (duration 00:01:20) [common]
6664 18:38:57.492635 start: 3 lava-test-retry (timeout 00:08:14) [common]
6665 18:38:57.493077 start: 3.1 lava-test-shell (timeout 00:08:14) [common]
6666 18:38:57.493481 Using namespace: common
6668 18:38:57.594602 / # #
6669 18:38:57.595200 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6670 18:38:57.600746 #
6671 18:38:57.601644 Using /lava-14291439
6673 18:38:57.702739 / #export SHELL=/bin/sh
6674 18:38:57.708945 export SHELL=/bin/sh
6676 18:38:57.810571 / # . /lava-14291439/environment
6677 18:38:57.816674 . /lava-14291439/environment
6679 18:38:57.918383 / # /lava-14291439/bin/lava-test-runner /lava-14291439/0
6680 18:38:57.918924 Test shell timeout: 10s (minimum of the action and connection timeout)
6681 18:38:57.924098 /lava-14291439/bin/lava-test-runner /lava-14291439/0
6682 18:38:57.955186 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14291439_1.5.2.3.1
6683 18:38:57.955654 Starting test lava.0_igt-gpu-panfrost (14291439_1.5.2.3.1)
6684 18:38:57.956030 Skipping test definition patterns.
6685 18:38:57.958397 + export TESTRUN_ID=0_igt-gpu-panf<8>[ 14.409855] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14291439_1.5.2.3.1>
6686 18:38:57.958894 rost
6687 18:38:57.961798 + cd /lava-14291439/0/tests/0_igt-gpu-panfrost
6688 18:38:57.962292 + cat uuid
6689 18:38:57.964819 + UUID=14291439_1.5.2.3.1
6690 18:38:57.965303 + set +x
6691 18:38:57.975082 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6692 18:38:57.983500 <8>[ 14.438862] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6693 18:38:57.984271 Received signal: <TESTSET> START panfrost_gem_new
6694 18:38:57.984661 Starting test_set panfrost_gem_new
6695 18:38:58.006816 <6>[ 14.462240] Console: switching to colour dummy device 80x25
6696 18:38:58.013585 <14>[ 14.468452] [IGT] panfrost_gem_new: executing
6697 18:38:58.020206 IGT-Version: 1.2<14>[ 14.473716] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6698 18:38:58.029414 8-ga44ebfe (aarc<14>[ 14.481858] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6699 18:38:58.036122 h64) (Linux: 6.1<14>[ 14.490654] [IGT] panfrost_gem_new: exiting, ret=0
6700 18:38:58.039970 .92-cip22 aarch64)
6701 18:38:58.042834 Using IGT_SRANDOM=1718131138 for randomisation
6702 18:38:58.046047 Opened device: /dev/dri/card0
6703 18:38:58.049451 Starting subtest: gem-new-4096
6704 18:38:58.052215 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6705 18:38:58.081127 <6>[ 14.519970] Console: switching to colour frame buffer device 170x48
6706 18:38:58.097122 <8>[ 14.549245] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6707 18:38:58.097950 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6709 18:38:58.117655 <6>[ 14.573082] Console: switching to colour dummy device 80x25
6710 18:38:58.123779 <14>[ 14.579136] [IGT] panfrost_gem_new: executing
6711 18:38:58.131003 IGT-Version: 1.2<14>[ 14.584168] [IGT] panfrost_gem_new: starting subtest gem-new-0
6712 18:38:58.140920 8-ga44ebfe (aarc<14>[ 14.591781] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6713 18:38:58.147347 h64) (Linux: 6.1<14>[ 14.600191] [IGT] panfrost_gem_new: exiting, ret=0
6714 18:38:58.147834 .92-cip22 aarch64)
6715 18:38:58.153687 Using IGT_SRANDOM=1718131138 for randomisation
6716 18:38:58.154206 Opened device: /dev/dri/card0
6717 18:38:58.156959 Starting subtest: gem-new-0
6718 18:38:58.160126 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6719 18:38:58.198049 <6>[ 14.636520] Console: switching to colour frame buffer device 170x48
6720 18:38:58.216214 <8>[ 14.668403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6721 18:38:58.217022 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6723 18:38:58.237487 <6>[ 14.692923] Console: switching to colour dummy device 80x25
6724 18:38:58.243715 <14>[ 14.699081] [IGT] panfrost_gem_new: executing
6725 18:38:58.250596 IGT-Version: 1.2<14>[ 14.704155] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6726 18:38:58.260376 8-ga44ebfe (aarc<14>[ 14.713086] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6727 18:38:58.266638 <14>[ 14.720938] [IGT] panfrost_gem_new: exiting, ret=0
6728 18:38:58.270148 h64) (Linux: 6.1.92-cip22 aarch64)
6729 18:38:58.273352 Using IGT_SRANDOM=1718131138 for randomisation
6730 18:38:58.276758 Opened device: /dev/dri/card0
6731 18:38:58.280252 Starting subtest: gem-new-zeroed
6732 18:38:58.282836 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6733 18:38:58.314307 <6>[ 14.752870] Console: switching to colour frame buffer device 170x48
6734 18:38:58.332797 <8>[ 14.784814] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6735 18:38:58.333815 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6737 18:38:58.338990 <8>[ 14.794380] <LAVA_SIGNAL_TESTSET STOP>
6738 18:38:58.339657 Received signal: <TESTSET> STOP
6739 18:38:58.340010 Closing test_set panfrost_gem_new
6740 18:38:58.366308 <8>[ 14.821565] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6741 18:38:58.367102 Received signal: <TESTSET> START panfrost_get_param
6742 18:38:58.367454 Starting test_set panfrost_get_param
6743 18:38:58.399542 <6>[ 14.855289] Console: switching to colour dummy device 80x25
6744 18:38:58.406383 <14>[ 14.861361] [IGT] panfrost_get_param: executing
6745 18:38:58.413207 IGT-Version: 1.2<14>[ 14.867008] [IGT] panfrost_get_param: starting subtest base-params
6746 18:38:58.422989 8-ga44ebfe (aarc<14>[ 14.874550] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6747 18:38:58.429118 h64) (Linux: 6.1<14>[ 14.883526] [IGT] panfrost_get_param: exiting, ret=0
6748 18:38:58.432329 .92-cip22 aarch64)
6749 18:38:58.436017 Using IGT_SRANDOM=1718131138 for randomisation
6750 18:38:58.438877 Opened device: /dev/dri/card0
6751 18:38:58.442158 Starting subtest: base-params
6752 18:38:58.445464 [1mSubtest base-params: SUCCESS (0.000s)[0m
6753 18:38:58.480811 <6>[ 14.919063] Console: switching to colour frame buffer device 170x48
6754 18:38:58.498403 <8>[ 14.950629] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6755 18:38:58.499194 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6757 18:38:58.531240 <6>[ 14.986746] Console: switching to colour dummy device 80x25
6758 18:38:58.538085 <14>[ 14.993096] [IGT] panfrost_get_param: executing
6759 18:38:58.544766 IGT-Version: 1.2<14>[ 14.998884] [IGT] panfrost_get_param: starting subtest get-bad-param
6760 18:38:58.554177 8-ga44ebfe (aarc<14>[ 15.006647] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6761 18:38:58.560806 h64) (Linux: 6.1<14>[ 15.015872] [IGT] panfrost_get_param: exiting, ret=0
6762 18:38:58.564033 .92-cip22 aarch64)
6763 18:38:58.567158 Using IGT_SRANDOM=1718131138 for randomisation
6764 18:38:58.570699 Opened device: /dev/dri/card0
6765 18:38:58.573768 Starting subtest: get-bad-param
6766 18:38:58.577032 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6767 18:38:58.616354 <6>[ 15.052241] Console: switching to colour frame buffer device 170x48
6768 18:38:58.634260 <8>[ 15.086581] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6769 18:38:58.635058 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6771 18:38:58.668734 <6>[ 15.123928] Console: switching to colour dummy device 80x25
6772 18:38:58.675289 <14>[ 15.129956] [IGT] panfrost_get_param: executing
6773 18:38:58.685159 IGT-Version: 1.2<14>[ 15.135855] [IGT] panfrost_get_param: starting subtest get-bad-padding
6774 18:38:58.690938 8-ga44ebfe (aarc<14>[ 15.144103] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6775 18:38:58.698060 h64) (Linux: 6.1<14>[ 15.153210] [IGT] panfrost_get_param: exiting, ret=0
6776 18:38:58.701093 .92-cip22 aarch64)
6777 18:38:58.704645 Using IGT_SRANDOM=1718131138 for randomisation
6778 18:38:58.707393 Opened device: /dev/dri/card0
6779 18:38:58.710906 Starting subtest: get-bad-padding
6780 18:38:58.714127 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6781 18:38:58.749145 <6>[ 15.187858] Console: switching to colour frame buffer device 170x48
6782 18:38:58.768016 <8>[ 15.220518] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6783 18:38:58.768786 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6785 18:38:58.774825 <8>[ 15.230187] <LAVA_SIGNAL_TESTSET STOP>
6786 18:38:58.775614 Received signal: <TESTSET> STOP
6787 18:38:58.775967 Closing test_set panfrost_get_param
6788 18:38:58.799537 <8>[ 15.254563] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6789 18:38:58.800328 Received signal: <TESTSET> START panfrost_prime
6790 18:38:58.800684 Starting test_set panfrost_prime
6791 18:38:58.833613 <6>[ 15.289172] Console: switching to colour dummy device 80x25
6792 18:38:58.840569 <14>[ 15.295380] [IGT] panfrost_prime: executing
6793 18:38:58.846726 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6794 18:38:58.850154 Using IGT_SRANDOM=1718131138 for randomisation
6795 18:38:58.852889 Opened device: /dev/dri/card0
6796 18:38:58.881306 <14>[ 15.333197] [IGT] panfrost_prime: starting subtest gem-prime-import
6797 18:38:58.883908 Starting subtest: gem-prime-import
6798 18:38:58.900455 (panfrost_prime:358) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:<14>[ 15.351420] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6799 18:38:58.900848 44:
6800 18:38:58.906853 (panfrost_p<14>[ 15.360077] [IGT] panfrost_prime: exiting, ret=98
6801 18:38:58.914037 rime:358) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6802 18:38:58.920355 (panfrost_prime:358) CRITICAL: Last errno: 9, Bad file descriptor
6803 18:38:58.920858 Stack trace:
6804 18:38:58.923470 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6805 18:38:58.926604 #1 [<unknown>+0xe8971358]
6806 18:38:58.929724 #2 [<unknown>+0xe8970f2c]
6807 18:38:58.933125 #3 [__libc_init_first+0x80]
6808 18:38:58.936349 #4 [__libc_start_main+0x98]
6809 18:38:58.939429 #5 [<unknown>+0xe8970f70]
6810 18:38:58.939812 Subtest gem-prime-import failed.
6811 18:38:58.943086 **** DEBUG ****
6812 18:38:58.952597 (panfrost_prime:358) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6813 18:38:58.962206 (panfrost_prime:358) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6814 18:38:58.968770 (panfr<6>[ 15.404592] Console: switching to colour frame buffer device 170x48
6815 18:38:58.972004 ost_prime:358) CRITICAL: Last errno: 9, Bad file descriptor
6816 18:38:58.978373 (panfrost_prime:358) igt_core-INFO: Stack trace:
6817 18:38:58.985163 (<8>[ 15.437559] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6818 18:38:58.985877 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6820 18:38:58.991397 panfrost_prime:358) igt_core-INF<8>[ 15.448014] <LAVA_SIGNAL_TESTSET STOP>
6821 18:38:58.992030 Received signal: <TESTSET> STOP
6822 18:38:58.992354 Closing test_set panfrost_prime
6823 18:38:58.998166 O: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6824 18:38:59.001214 (panfrost_prime:358) igt_core-INFO: #1 [<unknown>+0xe8971358]
6825 18:38:59.007784 (panfrost_prime:358) igt_core-INFO: #2 [<unknown>+0xe8970f2c]
6826 18:38:59.014494 (panfrost_prime:358) igt_core-INFO: #3 [__libc_init_first+0x80]
6827 18:38:59.021246 (panfrost_prime:358) igt_core-INFO: #4 [__libc_start_main+0x98]
6828 18:38:59.024362 (panfrost_prime:358) igt_core-INFO: #5 [<unknown>+0xe8970f70]
6829 18:38:59.027534 **** END ****
6830 18:38:59.031233 [1mSubtest gem-prime-import: FAIL (0.011s)[0m
6831 18:38:59.044177 Received signal: <TESTSET> START panfrost_submit
6832 18:38:59.044634 Starting test_set panfrost_submit
6833 18:38:59.047196 (panfrost_prime:358) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1<8>[ 15.499853] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6834 18:38:59.047905
6835 18:38:59.067933 <6>[ 15.523365] Console: switching to colour dummy device 80x25
6836 18:38:59.074410 <14>[ 15.529584] [IGT] panfrost_submit: executing
6837 18:38:59.080789 IGT-Version: 1.2<14>[ 15.534903] [IGT] panfrost_submit: starting subtest pan-submit
6838 18:38:59.090555 8-ga44ebfe (aarc<14>[ 15.543232] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6839 18:38:59.093728 <14>[ 15.550804] [IGT] panfrost_submit: exiting, ret=0
6840 18:38:59.097145 h64) (Linux: 6.1.92-cip22 aarch64)
6841 18:38:59.103637 Using IGT_SRANDOM=1718131139 for randomisation
6842 18:38:59.106730 Opened device: /dev/dri/card0
6843 18:38:59.107118 Starting subtest: pan-submit
6844 18:38:59.113227 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6845 18:38:59.145218 <6>[ 15.583890] Console: switching to colour frame buffer device 170x48
6846 18:38:59.160953 <8>[ 15.613315] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6847 18:38:59.161843 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6849 18:38:59.181047 <6>[ 15.636760] Console: switching to colour dummy device 80x25
6850 18:38:59.187557 <14>[ 15.643073] [IGT] panfrost_submit: executing
6851 18:38:59.197500 IGT-Version: 1.2<14>[ 15.648410] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6852 18:38:59.207150 8-ga44ebfe (aarc<14>[ 15.657093] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6853 18:38:59.213952 h64) (Linux: 6.1<14>[ 15.666870] [IGT] panfrost_submit: exiting, ret=0
6854 18:38:59.214342 .92-cip22 aarch64)
6855 18:38:59.217237 Using IGT_SRANDOM=1718131139 for randomisation
6856 18:38:59.220451 Opened device: /dev/dri/card0
6857 18:38:59.223654 Starting subtest: pan-submit-error-no-jc
6858 18:38:59.230063 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6859 18:38:59.261656 <6>[ 15.700456] Console: switching to colour frame buffer device 170x48
6860 18:38:59.280027 <8>[ 15.732497] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6861 18:38:59.280676 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6863 18:38:59.312494 <6>[ 15.768154] Console: switching to colour dummy device 80x25
6864 18:38:59.318909 <14>[ 15.774268] [IGT] panfrost_submit: executing
6865 18:38:59.328778 IGT-Version: 1.2<14>[ 15.779870] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6866 18:38:59.338685 8-ga44ebfe (aarc<14>[ 15.788680] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6867 18:38:59.345084 h64) (Linux: 6.1<14>[ 15.798574] [IGT] panfrost_submit: exiting, ret=0
6868 18:38:59.345632 .92-cip22 aarch64)
6869 18:38:59.351731 Using IGT_SRANDOM=1718131139 for randomisation
6870 18:38:59.352116 Opened device: /dev/dri/card0
6871 18:38:59.358260 Starting subtest: pan-submit-error-bad-in-syncs
6872 18:38:59.364701 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6873 18:38:59.397318 <6>[ 15.833224] Console: switching to colour frame buffer device 170x48
6874 18:38:59.415805 <8>[ 15.867659] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6875 18:38:59.416606 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6877 18:38:59.450714 <6>[ 15.906337] Console: switching to colour dummy device 80x25
6878 18:38:59.457702 <14>[ 15.912478] [IGT] panfrost_submit: executing
6879 18:38:59.467154 IGT-Version: 1.2<14>[ 15.917929] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6880 18:38:59.477254 8-ga44ebfe (aarc<14>[ 15.927279] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6881 18:38:59.484058 h64) (Linux: 6.1<14>[ 15.937501] [IGT] panfrost_submit: exiting, ret=0
6882 18:38:59.484575 .92-cip22 aarch64)
6883 18:38:59.489874 Using IGT_SRANDOM=1718131139 for randomisation
6884 18:38:59.493579 Opened device: /dev/dri/card0
6885 18:38:59.496766 Starting subtest: pan-submit-error-bad-bo-handles
6886 18:38:59.502910 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6887 18:38:59.530047 <6>[ 15.966800] Console: switching to colour frame buffer device 170x48
6888 18:38:59.546503 <8>[ 15.998706] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6889 18:38:59.547314 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6891 18:38:59.568343 <6>[ 16.023771] Console: switching to colour dummy device 80x25
6892 18:38:59.574951 <14>[ 16.029725] [IGT] panfrost_submit: executing
6893 18:38:59.584422 IGT-Version: 1.2<14>[ 16.034879] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6894 18:38:59.594171 8-ga44ebfe (aarc<14>[ 16.044456] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6895 18:38:59.601490 h64) (Linux: 6.1<14>[ 16.055098] [IGT] panfrost_submit: exiting, ret=0
6896 18:38:59.604117 .92-cip22 aarch64)
6897 18:38:59.607125 Using IGT_SRANDOM=1718131139 for randomisation
6898 18:38:59.610632 Opened device: /dev/dri/card0
6899 18:38:59.614097 Starting subtest: pan-submit-error-bad-requirements
6900 18:38:59.620442 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6901 18:38:59.643889 <6>[ 16.082773] Console: switching to colour frame buffer device 170x48
6902 18:38:59.661854 <8>[ 16.114049] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6903 18:38:59.662665 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6905 18:38:59.684531 <6>[ 16.139871] Console: switching to colour dummy device 80x25
6906 18:38:59.690902 <14>[ 16.145817] [IGT] panfrost_submit: executing
6907 18:38:59.700982 IGT-Version: 1.2<14>[ 16.150961] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6908 18:38:59.710371 8-ga44ebfe (aarc<14>[ 16.160213] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6909 18:38:59.716740 h64) (Linux: 6.1<14>[ 16.170410] [IGT] panfrost_submit: exiting, ret=0
6910 18:38:59.717256 .92-cip22 aarch64)
6911 18:38:59.723552 Using IGT_SRANDOM=1718131139 for randomisation
6912 18:38:59.726500 Opened device: /dev/dri/card0
6913 18:38:59.729907 Starting subtest: pan-submit-error-bad-out-sync
6914 18:38:59.736314 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6915 18:38:59.760354 <6>[ 16.198876] Console: switching to colour frame buffer device 170x48
6916 18:38:59.778150 <8>[ 16.230316] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6917 18:38:59.778940 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6919 18:38:59.800339 <6>[ 16.255967] Console: switching to colour dummy device 80x25
6920 18:38:59.806762 <14>[ 16.261942] [IGT] panfrost_submit: executing
6921 18:38:59.813309 IGT-Version: 1.2<14>[ 16.266883] [IGT] panfrost_submit: starting subtest pan-reset
6922 18:38:59.816967 8-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6923 18:38:59.823686 Using IGT_SRANDOM=1718131139 for randomisation
6924 18:38:59.826479 Opened device: /dev/dri/card0
6925 18:38:59.826897 Starting subtest: pan-reset
6926 18:39:00.360386 <3>[ 16.806146] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000040, tail=0x2000040, sched_job=00000000d0b70a8f
6927 18:39:00.370146 [1mSubtest pan-<14>[ 16.821815] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6928 18:39:00.376663 reset: SUCCESS (<14>[ 16.830171] [IGT] panfrost_submit: exiting, ret=0
6929 18:39:00.377046 0.548s)[0m
6930 18:39:00.431004 <6>[ 16.868856] Console: switching to colour frame buffer device 170x48
6931 18:39:00.446513 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6933 18:39:00.448870 <8>[ 16.901557] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6934 18:39:00.469093 <6>[ 16.924924] Console: switching to colour dummy device 80x25
6935 18:39:00.475686 <14>[ 16.931094] [IGT] panfrost_submit: executing
6936 18:39:00.482275 IGT-Version: 1.2<14>[ 16.936045] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6937 18:39:00.491936 8-ga44ebfe (aarc<14>[ 16.944796] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6938 18:39:00.498788 <14>[ 16.953631] [IGT] panfrost_submit: exiting, ret=0
6939 18:39:00.501885 h64) (Linux: 6.1.92-cip22 aarch64)
6940 18:39:00.505260 Using IGT_SRANDOM=1718131140 for randomisation
6941 18:39:00.508482 Opened device: /dev/dri/card0
6942 18:39:00.511578 Starting subtest: pan-submit-and-close
6943 18:39:00.517948 [1mSubtest pan-submit-and-close: SUCCESS (0.000s)[0m
6944 18:39:00.542013 <6>[ 16.980297] Console: switching to colour frame buffer device 170x48
6945 18:39:00.557508 <8>[ 17.009611] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6946 18:39:00.558258 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6948 18:39:00.579690 <6>[ 17.035115] Console: switching to colour dummy device 80x25
6949 18:39:00.586089 <14>[ 17.041161] [IGT] panfrost_submit: executing
6950 18:39:00.592486 IGT-Version: 1.2<14>[ 17.046120] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6951 18:39:00.602201 8-ga44ebfe (aarc<3>[ 17.055291] panfrost 13040000.gpu: Unhandled Page fault in AS0 at VA 0x0000DEADBEEF0000
6952 18:39:00.605638 <3>[ 17.055291] Reason: TODO
6953 18:39:00.611972 <3>[ 17.055291] raw fault status: 0x7C1003C0
6954 18:39:00.615490 <3>[ 17.055291] decoded fault status: SLAVE FAULT
6955 18:39:00.621848 <3>[ 17.055291] exception type 0xC0: TRANSLATION_FAULT_0
6956 18:39:00.625569 <3>[ 17.055291] access type 0x3: WRITE
6957 18:39:00.628730 <3>[ 17.055291] source id 0x7C10
6958 18:39:00.638158 h64) (Linux: 6.1<3>[ 17.087906] panfrost 13040000.gpu: js fault, js=1, status=JOB_BUS_FAULT, head=0x2000000, tail=0x2000000
6959 18:39:00.647846 .92-cip22 aarch6<14>[ 17.099624] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, SUCCESS
6960 18:39:00.648649 4)
6961 18:39:00.654282 Using IGT_SR<14>[ 17.108469] [IGT] panfrost_submit: exiting, ret=0
6962 18:39:00.657621 ANDOM=1718131140 for randomisation
6963 18:39:00.661094 Opened device: /dev/dri/card0
6964 18:39:00.664163 Starting subtest: pan-unhandled-pagefault
6965 18:39:00.667802 [1mSubtest pan-unhandled-pagefault: SUCCESS (0.045s)[0m
6966 18:39:00.715246 <6>[ 17.150271] Console: switching to colour frame buffer device 170x48
6967 18:39:00.729555 <8>[ 17.181584] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass>
6968 18:39:00.730532 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass
6970 18:39:00.736128 <8>[ 17.191545] <LAVA_SIGNAL_TESTSET STOP>
6971 18:39:00.736832 Received signal: <TESTSET> STOP
6972 18:39:00.737427 Closing test_set panfrost_submit
6973 18:39:00.742500 + <8>[ 17.197182] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14291439_1.5.2.3.1>
6974 18:39:00.743138 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14291439_1.5.2.3.1
6975 18:39:00.743506 Ending use of test pattern.
6976 18:39:00.743797 Ending test lava.0_igt-gpu-panfrost (14291439_1.5.2.3.1), duration 2.79
6978 18:39:00.745698 set +x
6979 18:39:00.746078 <LAVA_TEST_RUNNER EXIT>
6980 18:39:00.746622 ok: lava_test_shell seems to have completed
6981 18:39:00.747999 base-params:
result: pass
set: panfrost_get_param
gem-new-0:
result: pass
set: panfrost_gem_new
gem-new-4096:
result: pass
set: panfrost_gem_new
gem-new-zeroed:
result: pass
set: panfrost_gem_new
gem-prime-import:
result: fail
set: panfrost_prime
get-bad-padding:
result: pass
set: panfrost_get_param
get-bad-param:
result: pass
set: panfrost_get_param
pan-reset:
result: pass
set: panfrost_submit
pan-submit:
result: pass
set: panfrost_submit
pan-submit-and-close:
result: pass
set: panfrost_submit
pan-submit-error-bad-bo-handles:
result: pass
set: panfrost_submit
pan-submit-error-bad-in-syncs:
result: pass
set: panfrost_submit
pan-submit-error-bad-out-sync:
result: pass
set: panfrost_submit
pan-submit-error-bad-requirements:
result: pass
set: panfrost_submit
pan-submit-error-no-jc:
result: pass
set: panfrost_submit
pan-unhandled-pagefault:
result: pass
set: panfrost_submit
6982 18:39:00.748432 end: 3.1 lava-test-shell (duration 00:00:03) [common]
6983 18:39:00.748812 end: 3 lava-test-retry (duration 00:00:03) [common]
6984 18:39:00.749202 start: 4 finalize (timeout 00:08:11) [common]
6985 18:39:00.749648 start: 4.1 power-off (timeout 00:00:30) [common]
6986 18:39:00.750357 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6987 18:39:01.648042 >> Command sent successfully.
6988 18:39:01.657549 Returned 0 in 0 seconds
6989 18:39:01.758789 end: 4.1 power-off (duration 00:00:01) [common]
6991 18:39:01.760223 start: 4.2 read-feedback (timeout 00:08:10) [common]
6992 18:39:01.761370 Listened to connection for namespace 'common' for up to 1s
6993 18:39:01.762240 Listened to connection for namespace 'common' for up to 1s
6994 18:39:02.761765 Finalising connection for namespace 'common'
6995 18:39:02.762471 Disconnecting from shell: Finalise
6996 18:39:02.762917 / #
6997 18:39:02.863900 end: 4.2 read-feedback (duration 00:00:01) [common]
6998 18:39:02.864545 end: 4 finalize (duration 00:00:02) [common]
6999 18:39:02.865178 Cleaning after the job
7000 18:39:02.865713 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/ramdisk
7001 18:39:02.875152 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/kernel
7002 18:39:02.891431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/dtb
7003 18:39:02.891672 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291439/tftp-deploy-3x77qzvl/modules
7004 18:39:02.897840 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14291439
7005 18:39:03.018080 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14291439
7006 18:39:03.018277 Job finished correctly