Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 34
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 18:34:30.686502 lava-dispatcher, installed at version: 2024.03
2 18:34:30.686750 start: 0 validate
3 18:34:30.686880 Start time: 2024-06-11 18:34:30.686872+00:00 (UTC)
4 18:34:30.686996 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:34:30.687127 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 18:34:31.006660 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:34:31.007410 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 18:34:31.284134 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:34:31.284879 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 18:34:31.597354 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:34:31.598043 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-17-g24b63cdc814f%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 18:34:31.905060 validate duration: 1.22
14 18:34:31.905469 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:34:31.905644 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:34:31.905826 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:34:31.906013 Not decompressing ramdisk as can be used compressed.
18 18:34:31.906107 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
19 18:34:31.906170 saving as /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/ramdisk/rootfs.cpio.gz
20 18:34:31.906234 total size: 28105535 (26 MB)
21 18:34:31.911715 progress 0 % (0 MB)
22 18:34:31.918871 progress 5 % (1 MB)
23 18:34:31.926013 progress 10 % (2 MB)
24 18:34:31.933321 progress 15 % (4 MB)
25 18:34:31.940501 progress 20 % (5 MB)
26 18:34:31.947573 progress 25 % (6 MB)
27 18:34:31.954653 progress 30 % (8 MB)
28 18:34:31.961762 progress 35 % (9 MB)
29 18:34:31.968905 progress 40 % (10 MB)
30 18:34:31.975928 progress 45 % (12 MB)
31 18:34:31.983501 progress 50 % (13 MB)
32 18:34:31.991126 progress 55 % (14 MB)
33 18:34:31.998295 progress 60 % (16 MB)
34 18:34:32.005526 progress 65 % (17 MB)
35 18:34:32.012894 progress 70 % (18 MB)
36 18:34:32.020220 progress 75 % (20 MB)
37 18:34:32.027393 progress 80 % (21 MB)
38 18:34:32.034576 progress 85 % (22 MB)
39 18:34:32.041688 progress 90 % (24 MB)
40 18:34:32.048796 progress 95 % (25 MB)
41 18:34:32.055737 progress 100 % (26 MB)
42 18:34:32.055943 26 MB downloaded in 0.15 s (179.04 MB/s)
43 18:34:32.056097 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:34:32.056333 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:34:32.056418 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:34:32.056502 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:34:32.056637 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 18:34:32.056709 saving as /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/kernel/Image
50 18:34:32.056769 total size: 54813184 (52 MB)
51 18:34:32.056829 No compression specified
52 18:34:32.057952 progress 0 % (0 MB)
53 18:34:32.071535 progress 5 % (2 MB)
54 18:34:32.085352 progress 10 % (5 MB)
55 18:34:32.099150 progress 15 % (7 MB)
56 18:34:32.113516 progress 20 % (10 MB)
57 18:34:32.127494 progress 25 % (13 MB)
58 18:34:32.141195 progress 30 % (15 MB)
59 18:34:32.155156 progress 35 % (18 MB)
60 18:34:32.168823 progress 40 % (20 MB)
61 18:34:32.182434 progress 45 % (23 MB)
62 18:34:32.196414 progress 50 % (26 MB)
63 18:34:32.210364 progress 55 % (28 MB)
64 18:34:32.224137 progress 60 % (31 MB)
65 18:34:32.238363 progress 65 % (34 MB)
66 18:34:32.252166 progress 70 % (36 MB)
67 18:34:32.265832 progress 75 % (39 MB)
68 18:34:32.279642 progress 80 % (41 MB)
69 18:34:32.293360 progress 85 % (44 MB)
70 18:34:32.307192 progress 90 % (47 MB)
71 18:34:32.320965 progress 95 % (49 MB)
72 18:34:32.334664 progress 100 % (52 MB)
73 18:34:32.334922 52 MB downloaded in 0.28 s (187.94 MB/s)
74 18:34:32.335072 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:34:32.335303 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:34:32.335388 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:34:32.335473 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:34:32.335607 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 18:34:32.335681 saving as /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 18:34:32.335752 total size: 57695 (0 MB)
82 18:34:32.335829 No compression specified
83 18:34:32.336944 progress 56 % (0 MB)
84 18:34:32.337220 progress 100 % (0 MB)
85 18:34:32.337469 0 MB downloaded in 0.00 s (32.07 MB/s)
86 18:34:32.337589 end: 1.3.1 http-download (duration 00:00:00) [common]
88 18:34:32.337817 end: 1.3 download-retry (duration 00:00:00) [common]
89 18:34:32.337900 start: 1.4 download-retry (timeout 00:10:00) [common]
90 18:34:32.337981 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 18:34:32.338090 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-17-g24b63cdc814f/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 18:34:32.338156 saving as /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/modules/modules.tar
93 18:34:32.338215 total size: 8618176 (8 MB)
94 18:34:32.338274 Using unxz to decompress xz
95 18:34:32.342248 progress 0 % (0 MB)
96 18:34:32.361105 progress 5 % (0 MB)
97 18:34:32.388184 progress 10 % (0 MB)
98 18:34:32.417866 progress 15 % (1 MB)
99 18:34:32.441760 progress 20 % (1 MB)
100 18:34:32.465071 progress 25 % (2 MB)
101 18:34:32.488863 progress 30 % (2 MB)
102 18:34:32.515723 progress 35 % (2 MB)
103 18:34:32.540776 progress 40 % (3 MB)
104 18:34:32.564748 progress 45 % (3 MB)
105 18:34:32.590279 progress 50 % (4 MB)
106 18:34:32.616830 progress 55 % (4 MB)
107 18:34:32.642708 progress 60 % (4 MB)
108 18:34:32.668667 progress 65 % (5 MB)
109 18:34:32.696496 progress 70 % (5 MB)
110 18:34:32.721305 progress 75 % (6 MB)
111 18:34:32.748478 progress 80 % (6 MB)
112 18:34:32.773848 progress 85 % (7 MB)
113 18:34:32.807742 progress 90 % (7 MB)
114 18:34:32.833355 progress 95 % (7 MB)
115 18:34:32.860023 progress 100 % (8 MB)
116 18:34:32.864320 8 MB downloaded in 0.53 s (15.62 MB/s)
117 18:34:32.864578 end: 1.4.1 http-download (duration 00:00:01) [common]
119 18:34:32.864869 end: 1.4 download-retry (duration 00:00:01) [common]
120 18:34:32.864979 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 18:34:32.865090 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 18:34:32.865214 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 18:34:32.865353 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 18:34:32.865621 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j
125 18:34:32.865796 makedir: /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin
126 18:34:32.865942 makedir: /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/tests
127 18:34:32.866057 makedir: /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/results
128 18:34:32.866187 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-add-keys
129 18:34:32.866348 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-add-sources
130 18:34:32.866497 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-background-process-start
131 18:34:32.866671 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-background-process-stop
132 18:34:32.866819 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-common-functions
133 18:34:32.866965 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-echo-ipv4
134 18:34:32.867135 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-install-packages
135 18:34:32.867301 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-installed-packages
136 18:34:32.867442 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-os-build
137 18:34:32.867585 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-probe-channel
138 18:34:32.867726 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-probe-ip
139 18:34:32.867870 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-target-ip
140 18:34:32.868037 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-target-mac
141 18:34:32.868179 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-target-storage
142 18:34:32.868329 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-case
143 18:34:32.868500 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-event
144 18:34:32.868667 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-feedback
145 18:34:32.868810 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-raise
146 18:34:32.868951 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-reference
147 18:34:32.869096 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-runner
148 18:34:32.869294 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-set
149 18:34:32.869457 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-test-shell
150 18:34:32.869607 Updating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-install-packages (oe)
151 18:34:32.869805 Updating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/bin/lava-installed-packages (oe)
152 18:34:32.869972 Creating /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/environment
153 18:34:32.870091 LAVA metadata
154 18:34:32.870175 - LAVA_JOB_ID=14291364
155 18:34:32.870255 - LAVA_DISPATCHER_IP=192.168.201.1
156 18:34:32.870387 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 18:34:32.870490 skipped lava-vland-overlay
158 18:34:32.870590 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 18:34:32.870695 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 18:34:32.870801 skipped lava-multinode-overlay
161 18:34:32.870919 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 18:34:32.871049 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 18:34:32.871136 Loading test definitions
164 18:34:32.871276 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 18:34:32.871388 Using /lava-14291364 at stage 0
166 18:34:32.871808 uuid=14291364_1.5.2.3.1 testdef=None
167 18:34:32.871932 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 18:34:32.872059 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 18:34:32.872780 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 18:34:32.873152 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 18:34:32.873849 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 18:34:32.874111 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 18:34:32.874716 runner path: /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/0/tests/0_v4l2-compliance-uvc test_uuid 14291364_1.5.2.3.1
176 18:34:32.874888 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 18:34:32.875116 Creating lava-test-runner.conf files
179 18:34:32.875200 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14291364/lava-overlay-haiczx0j/lava-14291364/0 for stage 0
180 18:34:32.875337 - 0_v4l2-compliance-uvc
181 18:34:32.875481 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 18:34:32.875609 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 18:34:32.882821 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 18:34:32.882935 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 18:34:32.883039 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 18:34:32.883144 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 18:34:32.883244 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 18:34:33.764317 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 18:34:33.764725 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 18:34:33.764866 extracting modules file /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14291364/extract-overlay-ramdisk-wfbr4mp6/ramdisk
191 18:34:33.988133 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 18:34:33.988341 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 18:34:33.988436 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14291364/compress-overlay-ehk0pl1q/overlay-1.5.2.4.tar.gz to ramdisk
194 18:34:33.988506 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14291364/compress-overlay-ehk0pl1q/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14291364/extract-overlay-ramdisk-wfbr4mp6/ramdisk
195 18:34:33.995294 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 18:34:33.995411 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 18:34:33.995502 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 18:34:33.995592 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 18:34:33.995670 Building ramdisk /var/lib/lava/dispatcher/tmp/14291364/extract-overlay-ramdisk-wfbr4mp6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14291364/extract-overlay-ramdisk-wfbr4mp6/ramdisk
200 18:34:34.711756 >> 275946 blocks
201 18:34:38.764630 rename /var/lib/lava/dispatcher/tmp/14291364/extract-overlay-ramdisk-wfbr4mp6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/ramdisk/ramdisk.cpio.gz
202 18:34:38.765075 end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
203 18:34:38.765202 start: 1.5.8 prepare-kernel (timeout 00:09:53) [common]
204 18:34:38.765348 start: 1.5.8.1 prepare-fit (timeout 00:09:53) [common]
205 18:34:38.765457 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/kernel/Image']
206 18:34:52.162830 Returned 0 in 13 seconds
207 18:34:52.263473 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/kernel/image.itb
208 18:34:52.902737 output: FIT description: Kernel Image image with one or more FDT blobs
209 18:34:52.903112 output: Created: Tue Jun 11 19:34:52 2024
210 18:34:52.903183 output: Image 0 (kernel-1)
211 18:34:52.903249 output: Description:
212 18:34:52.903309 output: Created: Tue Jun 11 19:34:52 2024
213 18:34:52.903369 output: Type: Kernel Image
214 18:34:52.903431 output: Compression: lzma compressed
215 18:34:52.903489 output: Data Size: 13125101 Bytes = 12817.48 KiB = 12.52 MiB
216 18:34:52.903550 output: Architecture: AArch64
217 18:34:52.903610 output: OS: Linux
218 18:34:52.903669 output: Load Address: 0x00000000
219 18:34:52.903729 output: Entry Point: 0x00000000
220 18:34:52.903785 output: Hash algo: crc32
221 18:34:52.903844 output: Hash value: 7a9e9d3e
222 18:34:52.903899 output: Image 1 (fdt-1)
223 18:34:52.903956 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 18:34:52.904015 output: Created: Tue Jun 11 19:34:52 2024
225 18:34:52.904071 output: Type: Flat Device Tree
226 18:34:52.904126 output: Compression: uncompressed
227 18:34:52.904180 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 18:34:52.904234 output: Architecture: AArch64
229 18:34:52.904287 output: Hash algo: crc32
230 18:34:52.904340 output: Hash value: a9713552
231 18:34:52.904393 output: Image 2 (ramdisk-1)
232 18:34:52.904445 output: Description: unavailable
233 18:34:52.904498 output: Created: Tue Jun 11 19:34:52 2024
234 18:34:52.904551 output: Type: RAMDisk Image
235 18:34:52.904605 output: Compression: Unknown Compression
236 18:34:52.904657 output: Data Size: 41212475 Bytes = 40246.56 KiB = 39.30 MiB
237 18:34:52.904711 output: Architecture: AArch64
238 18:34:52.904764 output: OS: Linux
239 18:34:52.904817 output: Load Address: unavailable
240 18:34:52.904871 output: Entry Point: unavailable
241 18:34:52.904924 output: Hash algo: crc32
242 18:34:52.904977 output: Hash value: c5533576
243 18:34:52.905030 output: Default Configuration: 'conf-1'
244 18:34:52.905083 output: Configuration 0 (conf-1)
245 18:34:52.905136 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 18:34:52.905189 output: Kernel: kernel-1
247 18:34:52.905243 output: Init Ramdisk: ramdisk-1
248 18:34:52.905307 output: FDT: fdt-1
249 18:34:52.905362 output: Loadables: kernel-1
250 18:34:52.905414 output:
251 18:34:52.905617 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 18:34:52.905716 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 18:34:52.905817 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 18:34:52.905912 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
255 18:34:52.905986 No LXC device requested
256 18:34:52.906066 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 18:34:52.906149 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
258 18:34:52.906227 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 18:34:52.906298 Checking files for TFTP limit of 4294967296 bytes.
260 18:34:52.906792 end: 1 tftp-deploy (duration 00:00:21) [common]
261 18:34:52.906894 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 18:34:52.906986 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 18:34:52.907112 substitutions:
264 18:34:52.907179 - {DTB}: 14291364/tftp-deploy-q1ya37ds/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 18:34:52.907247 - {INITRD}: 14291364/tftp-deploy-q1ya37ds/ramdisk/ramdisk.cpio.gz
266 18:34:52.907307 - {KERNEL}: 14291364/tftp-deploy-q1ya37ds/kernel/Image
267 18:34:52.907365 - {LAVA_MAC}: None
268 18:34:52.907423 - {PRESEED_CONFIG}: None
269 18:34:52.907479 - {PRESEED_LOCAL}: None
270 18:34:52.907534 - {RAMDISK}: 14291364/tftp-deploy-q1ya37ds/ramdisk/ramdisk.cpio.gz
271 18:34:52.907589 - {ROOT_PART}: None
272 18:34:52.907644 - {ROOT}: None
273 18:34:52.907699 - {SERVER_IP}: 192.168.201.1
274 18:34:52.907754 - {TEE}: None
275 18:34:52.907810 Parsed boot commands:
276 18:34:52.907866 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 18:34:52.908039 Parsed boot commands: tftpboot 192.168.201.1 14291364/tftp-deploy-q1ya37ds/kernel/image.itb 14291364/tftp-deploy-q1ya37ds/kernel/cmdline
278 18:34:52.908128 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 18:34:52.908218 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 18:34:52.908310 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 18:34:52.908398 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 18:34:52.908467 Not connected, no need to disconnect.
283 18:34:52.908541 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 18:34:52.908621 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 18:34:52.908689 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
286 18:34:52.912298 Setting prompt string to ['lava-test: # ']
287 18:34:52.912672 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 18:34:52.912778 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 18:34:52.912879 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 18:34:52.912968 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 18:34:52.913176 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
292 18:35:03.103897 Returned 0 in 10 seconds
293 18:35:03.205501 end: 2.2.2.1 pdu-reboot (duration 00:00:10) [common]
295 18:35:03.207182 end: 2.2.2 reset-device (duration 00:00:10) [common]
296 18:35:03.207817 start: 2.2.3 depthcharge-start (timeout 00:04:50) [common]
297 18:35:03.208325 Setting prompt string to 'Starting depthcharge on Juniper...'
298 18:35:03.208705 Changing prompt to 'Starting depthcharge on Juniper...'
299 18:35:03.209089 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 18:35:03.211854 [Enter `^Ec?' for help]
301 18:35:03.212694 [DL] 00000000 00000000 010701
302 18:35:03.213313
303 18:35:03.213857
304 18:35:03.214309 F0: 102B 0000
305 18:35:03.214681
306 18:35:03.215027 F3: 1006 0033 [0200]
307 18:35:03.215360
308 18:35:03.215683 F3: 4001 00E0 [0200]
309 18:35:03.216015
310 18:35:03.216327 F3: 0000 0000
311 18:35:03.216637
312 18:35:03.217006 V0: 0000 0000 [0001]
313 18:35:03.217399
314 18:35:03.217725 00: 1027 0002
315 18:35:03.218057
316 18:35:03.218367 01: 0000 0000
317 18:35:03.218682
318 18:35:03.218985 BP: 0C00 0251 [0000]
319 18:35:03.219293
320 18:35:03.219598 G0: 1182 0000
321 18:35:03.219899
322 18:35:03.220201 EC: 0004 0000 [0001]
323 18:35:03.220517
324 18:35:03.220800 S7: 0000 0000 [0000]
325 18:35:03.221079
326 18:35:03.221392 CC: 0000 0000 [0001]
327 18:35:03.221677
328 18:35:03.221954 T0: 0000 00DB [000F]
329 18:35:03.222235
330 18:35:03.222513 Jump to BL
331 18:35:03.222791
332 18:35:03.223067
333 18:35:03.223357
334 18:35:03.223635 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 18:35:03.223971 ARM64: Exception handlers installed.
336 18:35:03.224257 ARM64: Testing exception
337 18:35:03.224537 ARM64: Done test exception
338 18:35:03.224818 WDT: Last reset was cold boot
339 18:35:03.225101 SPI0(PAD0) initialized at 992727 Hz
340 18:35:03.225470 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 18:35:03.225773 Manufacturer: ef
342 18:35:03.226056 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 18:35:03.226339 Probing TPM: . done!
344 18:35:03.226615 TPM ready after 0 ms
345 18:35:03.226927 Connected to device vid:did:rid of 1ae0:0028:00
346 18:35:03.227215 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 18:35:03.227503 Initialized TPM device CR50 revision 0
348 18:35:03.227785 tlcl_send_startup: Startup return code is 0
349 18:35:03.228066 TPM: setup succeeded
350 18:35:03.228380 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 18:35:03.228688 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 18:35:03.228976 in-header: 03 19 00 00 08 00 00 00
353 18:35:03.229293 in-data: a2 e0 47 00 13 00 00 00
354 18:35:03.229614 Chrome EC: UHEPI supported
355 18:35:03.229893 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 18:35:03.230216 in-header: 03 a1 00 00 08 00 00 00
357 18:35:03.230498 in-data: 84 60 60 10 00 00 00 00
358 18:35:03.230774 Phase 1
359 18:35:03.231052 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 18:35:03.231369 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 18:35:03.231676 VB2:vb2_check_recovery() Recovery was requested manually
362 18:35:03.231957 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 18:35:03.232234 Recovery requested (1009000e)
364 18:35:03.232510 tlcl_extend: response is 0
365 18:35:03.232790 tlcl_extend: response is 0
366 18:35:03.233069
367 18:35:03.233420
368 18:35:03.233717 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 18:35:03.234022 ARM64: Exception handlers installed.
370 18:35:03.234328 ARM64: Testing exception
371 18:35:03.234614 ARM64: Done test exception
372 18:35:03.234896 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2005
373 18:35:03.235209 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 18:35:03.235524 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 18:35:03.235858 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
376 18:35:03.236150 [RTC]rtc_get_frequency_meter,134: input=0x7, output=731
377 18:35:03.236429 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
378 18:35:03.236710 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
379 18:35:03.237011 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
380 18:35:03.237321 [RTC]rtc_get_frequency_meter,134: input=0xa, output=779
381 18:35:03.237552 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
382 18:35:03.237774 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
383 18:35:03.237979 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 18:35:03.238179 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 18:35:03.238379 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 18:35:03.238580 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 18:35:03.238784 in-header: 03 19 00 00 08 00 00 00
388 18:35:03.238983 in-data: a2 e0 47 00 13 00 00 00
389 18:35:03.239182 Chrome EC: UHEPI supported
390 18:35:03.239384 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 18:35:03.239588 in-header: 03 a1 00 00 08 00 00 00
392 18:35:03.239787 in-data: 84 60 60 10 00 00 00 00
393 18:35:03.239999 Skip loading cached calibration data
394 18:35:03.240217 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 18:35:03.240420 in-header: 03 a1 00 00 08 00 00 00
396 18:35:03.240620 in-data: 84 60 60 10 00 00 00 00
397 18:35:03.240821 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 18:35:03.241023 in-header: 03 a1 00 00 08 00 00 00
399 18:35:03.241221 in-data: 84 60 60 10 00 00 00 00
400 18:35:03.241491 ADC[3]: Raw value=1034629 ID=8
401 18:35:03.241700 Manufacturer: ef
402 18:35:03.241901 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 18:35:03.242100 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 18:35:03.242298 CBFS @ 21000 size 3d4000
405 18:35:03.242449 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 18:35:03.242599 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
407 18:35:03.242751 CBFS: Found @ offset 3c880 size 4b
408 18:35:03.242901 DRAM-K: Full Calibration
409 18:35:03.243051 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 18:35:03.243203 CBFS @ 21000 size 3d4000
411 18:35:03.243353 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 18:35:03.243503 CBFS: Locating 'fallback/dram'
413 18:35:03.243671 CBFS: Found @ offset 24b00 size 12268
414 18:35:03.243823 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
415 18:35:03.243976 ddr_geometry: 1, config: 0x0
416 18:35:03.244143 header.status = 0x0
417 18:35:03.244305 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 18:35:03.244457 header.version = 0x5 (expected: 0x5)
419 18:35:03.244864 header.size = 0x8f0 (expected: 0x8f0)
420 18:35:03.245181 header.config = 0x0
421 18:35:03.245536 header.flags = 0x0
422 18:35:03.245869 header.checksum = 0x0
423 18:35:03.246130 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 18:35:03.246372 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 18:35:03.246610 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 18:35:03.246853 ddr_geometry:1
427 18:35:03.247088 [EMI] new MDL number = 1
428 18:35:03.247314 dram_cbt_mode_extern: 0
429 18:35:03.247502 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 18:35:03.247691 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 18:35:03.247876
432 18:35:03.248062
433 18:35:03.248247 [Bianco] ETT version 0.0.0.1
434 18:35:03.248447 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 18:35:03.248634
436 18:35:03.248815 vSetVcoreByFreq with vcore:762500, freq=1600
437 18:35:03.248956
438 18:35:03.249080 [DramcInit]
439 18:35:03.249201 AutoRefreshCKEOff AutoREF OFF
440 18:35:03.249358 DDRPhyPLLSetting-CKEOFF
441 18:35:03.249484 DDRPhyPLLSetting-CKEON
442 18:35:03.249605
443 18:35:03.249726 Enable WDQS
444 18:35:03.249848 [ModeRegInit_LP4] CH0 RK0
445 18:35:03.249970 Write Rank0 MR13 =0x18
446 18:35:03.250091 Write Rank0 MR12 =0x5d
447 18:35:03.250212 Write Rank0 MR1 =0x56
448 18:35:03.250386 Write Rank0 MR2 =0x1a
449 18:35:03.250586 Write Rank0 MR11 =0x0
450 18:35:03.250719 Write Rank0 MR22 =0x38
451 18:35:03.250842 Write Rank0 MR14 =0x5d
452 18:35:03.250964 Write Rank0 MR3 =0x30
453 18:35:03.251084 Write Rank0 MR13 =0x58
454 18:35:03.251204 Write Rank0 MR12 =0x5d
455 18:35:03.251339 Write Rank0 MR1 =0x56
456 18:35:03.251474 Write Rank0 MR2 =0x2d
457 18:35:03.251597 Write Rank0 MR11 =0x23
458 18:35:03.251718 Write Rank0 MR22 =0x34
459 18:35:03.251839 Write Rank0 MR14 =0x10
460 18:35:03.251958 Write Rank0 MR3 =0x30
461 18:35:03.252077 Write Rank0 MR13 =0xd8
462 18:35:03.252196 [ModeRegInit_LP4] CH0 RK1
463 18:35:03.252315 Write Rank1 MR13 =0x18
464 18:35:03.252415 Write Rank1 MR12 =0x5d
465 18:35:03.252514 Write Rank1 MR1 =0x56
466 18:35:03.252615 Write Rank1 MR2 =0x1a
467 18:35:03.252715 Write Rank1 MR11 =0x0
468 18:35:03.252814 Write Rank1 MR22 =0x38
469 18:35:03.252913 Write Rank1 MR14 =0x5d
470 18:35:03.253014 Write Rank1 MR3 =0x30
471 18:35:03.253113 Write Rank1 MR13 =0x58
472 18:35:03.253212 Write Rank1 MR12 =0x5d
473 18:35:03.253344 Write Rank1 MR1 =0x56
474 18:35:03.253457 Write Rank1 MR2 =0x2d
475 18:35:03.253560 Write Rank1 MR11 =0x23
476 18:35:03.253660 Write Rank1 MR22 =0x34
477 18:35:03.253761 Write Rank1 MR14 =0x10
478 18:35:03.253861 Write Rank1 MR3 =0x30
479 18:35:03.253962 Write Rank1 MR13 =0xd8
480 18:35:03.254063 [ModeRegInit_LP4] CH1 RK0
481 18:35:03.254162 Write Rank0 MR13 =0x18
482 18:35:03.254262 Write Rank0 MR12 =0x5d
483 18:35:03.254361 Write Rank0 MR1 =0x56
484 18:35:03.254462 Write Rank0 MR2 =0x1a
485 18:35:03.254562 Write Rank0 MR11 =0x0
486 18:35:03.254662 Write Rank0 MR22 =0x38
487 18:35:03.254762 Write Rank0 MR14 =0x5d
488 18:35:03.254868 Write Rank0 MR3 =0x30
489 18:35:03.254977 Write Rank0 MR13 =0x58
490 18:35:03.255080 Write Rank0 MR12 =0x5d
491 18:35:03.255181 Write Rank0 MR1 =0x56
492 18:35:03.255280 Write Rank0 MR2 =0x2d
493 18:35:03.255380 Write Rank0 MR11 =0x23
494 18:35:03.255479 Write Rank0 MR22 =0x34
495 18:35:03.255578 Write Rank0 MR14 =0x10
496 18:35:03.255677 Write Rank0 MR3 =0x30
497 18:35:03.255776 Write Rank0 MR13 =0xd8
498 18:35:03.255875 [ModeRegInit_LP4] CH1 RK1
499 18:35:03.255975 Write Rank1 MR13 =0x18
500 18:35:03.256074 Write Rank1 MR12 =0x5d
501 18:35:03.256173 Write Rank1 MR1 =0x56
502 18:35:03.256273 Write Rank1 MR2 =0x1a
503 18:35:03.256372 Write Rank1 MR11 =0x0
504 18:35:03.256472 Write Rank1 MR22 =0x38
505 18:35:03.256572 Write Rank1 MR14 =0x5d
506 18:35:03.256672 Write Rank1 MR3 =0x30
507 18:35:03.256772 Write Rank1 MR13 =0x58
508 18:35:03.256871 Write Rank1 MR12 =0x5d
509 18:35:03.256971 Write Rank1 MR1 =0x56
510 18:35:03.257071 Write Rank1 MR2 =0x2d
511 18:35:03.257170 Write Rank1 MR11 =0x23
512 18:35:03.257315 Write Rank1 MR22 =0x34
513 18:35:03.257406 Write Rank1 MR14 =0x10
514 18:35:03.257493 Write Rank1 MR3 =0x30
515 18:35:03.257579 Write Rank1 MR13 =0xd8
516 18:35:03.257665 match AC timing 3
517 18:35:03.257751 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 18:35:03.257840 [MiockJmeterHQA]
519 18:35:03.257926 vSetVcoreByFreq with vcore:762500, freq=1600
520 18:35:03.258014
521 18:35:03.258101 MIOCK jitter meter ch=0
522 18:35:03.258187
523 18:35:03.258273 1T = (100-18) = 82 dly cells
524 18:35:03.258369 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
525 18:35:03.258492 vSetVcoreByFreq with vcore:725000, freq=1200
526 18:35:03.258613
527 18:35:03.258734 MIOCK jitter meter ch=0
528 18:35:03.258853
529 18:35:03.258971 1T = (95-17) = 78 dly cells
530 18:35:03.259124 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
531 18:35:03.259245 vSetVcoreByFreq with vcore:725000, freq=800
532 18:35:03.259395
533 18:35:03.259544 MIOCK jitter meter ch=0
534 18:35:03.259662
535 18:35:03.259810 1T = (95-17) = 78 dly cells
536 18:35:03.259932 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
537 18:35:03.260052 vSetVcoreByFreq with vcore:762500, freq=1600
538 18:35:03.260171 vSetVcoreByFreq with vcore:762500, freq=1600
539 18:35:03.260321
540 18:35:03.260441 K DRVP
541 18:35:03.260589 1. OCD DRVP=0 CALOUT=0
542 18:35:03.260744 1. OCD DRVP=1 CALOUT=0
543 18:35:03.260898 1. OCD DRVP=2 CALOUT=0
544 18:35:03.261050 1. OCD DRVP=3 CALOUT=0
545 18:35:03.261203 1. OCD DRVP=4 CALOUT=0
546 18:35:03.261372 1. OCD DRVP=5 CALOUT=0
547 18:35:03.261526 1. OCD DRVP=6 CALOUT=0
548 18:35:03.261680 1. OCD DRVP=7 CALOUT=0
549 18:35:03.261833 1. OCD DRVP=8 CALOUT=0
550 18:35:03.261986 1. OCD DRVP=9 CALOUT=1
551 18:35:03.262137
552 18:35:03.262291 1. OCD DRVP calibration OK! DRVP=9
553 18:35:03.262425
554 18:35:03.262556
555 18:35:03.262685
556 18:35:03.262816 K ODTN
557 18:35:03.262946 3. OCD ODTN=0 ,CALOUT=1
558 18:35:03.263084 3. OCD ODTN=1 ,CALOUT=1
559 18:35:03.263218 3. OCD ODTN=2 ,CALOUT=1
560 18:35:03.263352 3. OCD ODTN=3 ,CALOUT=1
561 18:35:03.263486 3. OCD ODTN=4 ,CALOUT=1
562 18:35:03.263623 3. OCD ODTN=5 ,CALOUT=1
563 18:35:03.263755 3. OCD ODTN=6 ,CALOUT=1
564 18:35:03.263888 3. OCD ODTN=7 ,CALOUT=0
565 18:35:03.264020
566 18:35:03.264152 3. OCD ODTN calibration OK! ODTN=7
567 18:35:03.264286
568 18:35:03.264416 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
569 18:35:03.264547 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
570 18:35:03.264678 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
571 18:35:03.264810
572 18:35:03.264941 K DRVP
573 18:35:03.265077 1. OCD DRVP=0 CALOUT=0
574 18:35:03.265213 1. OCD DRVP=1 CALOUT=0
575 18:35:03.265341 1. OCD DRVP=2 CALOUT=0
576 18:35:03.265450 1. OCD DRVP=3 CALOUT=0
577 18:35:03.265561 1. OCD DRVP=4 CALOUT=0
578 18:35:03.265695 1. OCD DRVP=5 CALOUT=0
579 18:35:03.265830 1. OCD DRVP=6 CALOUT=0
580 18:35:03.265935 1. OCD DRVP=7 CALOUT=0
581 18:35:03.266068 1. OCD DRVP=8 CALOUT=0
582 18:35:03.266173 1. OCD DRVP=9 CALOUT=0
583 18:35:03.266517 1. OCD DRVP=10 CALOUT=1
584 18:35:03.266620
585 18:35:03.266731 1. OCD DRVP calibration OK! DRVP=10
586 18:35:03.266842
587 18:35:03.266977
588 18:35:03.267081
589 18:35:03.267225 K ODTN
590 18:35:03.267319 3. OCD ODTN=0 ,CALOUT=1
591 18:35:03.267440 3. OCD ODTN=1 ,CALOUT=1
592 18:35:03.267561 3. OCD ODTN=2 ,CALOUT=1
593 18:35:03.267681 3. OCD ODTN=3 ,CALOUT=1
594 18:35:03.267776 3. OCD ODTN=4 ,CALOUT=1
595 18:35:03.267871 3. OCD ODTN=5 ,CALOUT=1
596 18:35:03.267992 3. OCD ODTN=6 ,CALOUT=1
597 18:35:03.268112 3. OCD ODTN=7 ,CALOUT=1
598 18:35:03.268232 3. OCD ODTN=8 ,CALOUT=1
599 18:35:03.268352 3. OCD ODTN=9 ,CALOUT=1
600 18:35:03.268472 3. OCD ODTN=10 ,CALOUT=1
601 18:35:03.268594 3. OCD ODTN=11 ,CALOUT=1
602 18:35:03.268714 3. OCD ODTN=12 ,CALOUT=1
603 18:35:03.268833 3. OCD ODTN=13 ,CALOUT=1
604 18:35:03.268952 3. OCD ODTN=14 ,CALOUT=0
605 18:35:03.269070
606 18:35:03.269187 3. OCD ODTN calibration OK! ODTN=14
607 18:35:03.269340
608 18:35:03.269461 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
609 18:35:03.269579 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
610 18:35:03.269699 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
611 18:35:03.269818
612 18:35:03.269936 [DramcInit]
613 18:35:03.270053 AutoRefreshCKEOff AutoREF OFF
614 18:35:03.270170 DDRPhyPLLSetting-CKEOFF
615 18:35:03.270286 DDRPhyPLLSetting-CKEON
616 18:35:03.270402
617 18:35:03.270518 Enable WDQS
618 18:35:03.270634 ==
619 18:35:03.270752 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 18:35:03.270870 fsp= 1, odt_onoff= 1, Byte mode= 0
621 18:35:03.270987 ==
622 18:35:03.271104 [Duty_Offset_Calibration]
623 18:35:03.271220
624 18:35:03.271335 ===========================
625 18:35:03.271452 B0:0 B1:1 CA:1
626 18:35:03.271567 ==
627 18:35:03.271684 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 18:35:03.271800 fsp= 1, odt_onoff= 1, Byte mode= 0
629 18:35:03.271916 ==
630 18:35:03.272033 [Duty_Offset_Calibration]
631 18:35:03.272148
632 18:35:03.272272 ===========================
633 18:35:03.272377 B0:1 B1:2 CA:0
634 18:35:03.272481 [ModeRegInit_LP4] CH0 RK0
635 18:35:03.272585 Write Rank0 MR13 =0x18
636 18:35:03.272689 Write Rank0 MR12 =0x5d
637 18:35:03.272793 Write Rank0 MR1 =0x56
638 18:35:03.272897 Write Rank0 MR2 =0x1a
639 18:35:03.273000 Write Rank0 MR11 =0x0
640 18:35:03.273104 Write Rank0 MR22 =0x38
641 18:35:03.273208 Write Rank0 MR14 =0x5d
642 18:35:03.273324 Write Rank0 MR3 =0x30
643 18:35:03.273430 Write Rank0 MR13 =0x58
644 18:35:03.273534 Write Rank0 MR12 =0x5d
645 18:35:03.273638 Write Rank0 MR1 =0x56
646 18:35:03.273742 Write Rank0 MR2 =0x2d
647 18:35:03.273845 Write Rank0 MR11 =0x23
648 18:35:03.273949 Write Rank0 MR22 =0x34
649 18:35:03.274052 Write Rank0 MR14 =0x10
650 18:35:03.274156 Write Rank0 MR3 =0x30
651 18:35:03.274260 Write Rank0 MR13 =0xd8
652 18:35:03.274363 [ModeRegInit_LP4] CH0 RK1
653 18:35:03.274466 Write Rank1 MR13 =0x18
654 18:35:03.274570 Write Rank1 MR12 =0x5d
655 18:35:03.274674 Write Rank1 MR1 =0x56
656 18:35:03.274777 Write Rank1 MR2 =0x1a
657 18:35:03.274881 Write Rank1 MR11 =0x0
658 18:35:03.274985 Write Rank1 MR22 =0x38
659 18:35:03.275089 Write Rank1 MR14 =0x5d
660 18:35:03.275193 Write Rank1 MR3 =0x30
661 18:35:03.275296 Write Rank1 MR13 =0x58
662 18:35:03.275400 Write Rank1 MR12 =0x5d
663 18:35:03.275503 Write Rank1 MR1 =0x56
664 18:35:03.275606 Write Rank1 MR2 =0x2d
665 18:35:03.275710 Write Rank1 MR11 =0x23
666 18:35:03.275813 Write Rank1 MR22 =0x34
667 18:35:03.275917 Write Rank1 MR14 =0x10
668 18:35:03.276020 Write Rank1 MR3 =0x30
669 18:35:03.276124 Write Rank1 MR13 =0xd8
670 18:35:03.276228 [ModeRegInit_LP4] CH1 RK0
671 18:35:03.276332 Write Rank0 MR13 =0x18
672 18:35:03.276435 Write Rank0 MR12 =0x5d
673 18:35:03.276549 Write Rank0 MR1 =0x56
674 18:35:03.276669 Write Rank0 MR2 =0x1a
675 18:35:03.276784 Write Rank0 MR11 =0x0
676 18:35:03.276884 Write Rank0 MR22 =0x38
677 18:35:03.276980 Write Rank0 MR14 =0x5d
678 18:35:03.277077 Write Rank0 MR3 =0x30
679 18:35:03.277184 Write Rank0 MR13 =0x58
680 18:35:03.277301 Write Rank0 MR12 =0x5d
681 18:35:03.277379 Write Rank0 MR1 =0x56
682 18:35:03.277456 Write Rank0 MR2 =0x2d
683 18:35:03.277555 Write Rank0 MR11 =0x23
684 18:35:03.277631 Write Rank0 MR22 =0x34
685 18:35:03.277726 Write Rank0 MR14 =0x10
686 18:35:03.277822 Write Rank0 MR3 =0x30
687 18:35:03.277917 Write Rank0 MR13 =0xd8
688 18:35:03.278012 [ModeRegInit_LP4] CH1 RK1
689 18:35:03.278106 Write Rank1 MR13 =0x18
690 18:35:03.278201 Write Rank1 MR12 =0x5d
691 18:35:03.278296 Write Rank1 MR1 =0x56
692 18:35:03.278390 Write Rank1 MR2 =0x1a
693 18:35:03.278484 Write Rank1 MR11 =0x0
694 18:35:03.278578 Write Rank1 MR22 =0x38
695 18:35:03.278673 Write Rank1 MR14 =0x5d
696 18:35:03.278768 Write Rank1 MR3 =0x30
697 18:35:03.278862 Write Rank1 MR13 =0x58
698 18:35:03.278956 Write Rank1 MR12 =0x5d
699 18:35:03.279050 Write Rank1 MR1 =0x56
700 18:35:03.279145 Write Rank1 MR2 =0x2d
701 18:35:03.279239 Write Rank1 MR11 =0x23
702 18:35:03.279333 Write Rank1 MR22 =0x34
703 18:35:03.279428 Write Rank1 MR14 =0x10
704 18:35:03.279522 Write Rank1 MR3 =0x30
705 18:35:03.279616 Write Rank1 MR13 =0xd8
706 18:35:03.279710 match AC timing 3
707 18:35:03.279805 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 18:35:03.279903 DramC Write-DBI off
709 18:35:03.279998 DramC Read-DBI off
710 18:35:03.280093 Write Rank0 MR13 =0x59
711 18:35:03.280188 ==
712 18:35:03.280284 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 18:35:03.280380 fsp= 1, odt_onoff= 1, Byte mode= 0
714 18:35:03.280475 ==
715 18:35:03.280572 === u2Vref_new: 0x56 --> 0x2d
716 18:35:03.280668 === u2Vref_new: 0x58 --> 0x38
717 18:35:03.280763 === u2Vref_new: 0x5a --> 0x39
718 18:35:03.280859 === u2Vref_new: 0x5c --> 0x3c
719 18:35:03.280955 === u2Vref_new: 0x5e --> 0x3d
720 18:35:03.281050 === u2Vref_new: 0x60 --> 0xa0
721 18:35:03.281145
722 18:35:03.281240 CBT Vref found, early break!
723 18:35:03.281342 [CA 0] Center 33 (4~63) winsize 60
724 18:35:03.281438 [CA 1] Center 34 (5~63) winsize 59
725 18:35:03.281534 [CA 2] Center 28 (0~57) winsize 58
726 18:35:03.281630 [CA 3] Center 24 (-3~51) winsize 55
727 18:35:03.281725 [CA 4] Center 25 (-2~52) winsize 55
728 18:35:03.281821 [CA 5] Center 30 (2~58) winsize 57
729 18:35:03.281916
730 18:35:03.282012 [CATrainingPosCal] consider 1 rank data
731 18:35:03.282108 u2DelayCellTimex100 = 762/100 ps
732 18:35:03.282216 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
733 18:35:03.282309 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
734 18:35:03.282401 CA2 delay=28 (0~57),Diff = 4 PI (5 cell)
735 18:35:03.282494 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
736 18:35:03.282587 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
737 18:35:03.282680 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
738 18:35:03.282772
739 18:35:03.282865 CA PerBit enable=1, Macro0, CA PI delay=24
740 18:35:03.282958 === u2Vref_new: 0x56 --> 0x2d
741 18:35:03.283051
742 18:35:03.283144 Vref(ca) range 1: 22
743 18:35:03.283237
744 18:35:03.283330 CS Dly= 10 (41-0-32)
745 18:35:03.283422 Write Rank0 MR13 =0xd8
746 18:35:03.283515 Write Rank0 MR13 =0xd8
747 18:35:03.283607 Write Rank0 MR12 =0x56
748 18:35:03.283909 Write Rank1 MR13 =0x59
749 18:35:03.284005 ==
750 18:35:03.284103 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
751 18:35:03.284199 fsp= 1, odt_onoff= 1, Byte mode= 0
752 18:35:03.284295 ==
753 18:35:03.284390 === u2Vref_new: 0x56 --> 0x2d
754 18:35:03.284485 === u2Vref_new: 0x58 --> 0x38
755 18:35:03.284579 === u2Vref_new: 0x5a --> 0x39
756 18:35:03.284710 === u2Vref_new: 0x5c --> 0x3c
757 18:35:03.284804 === u2Vref_new: 0x5e --> 0x3d
758 18:35:03.284898 === u2Vref_new: 0x60 --> 0xa0
759 18:35:03.284992 [CA 0] Center 34 (5~63) winsize 59
760 18:35:03.285085 [CA 1] Center 34 (6~63) winsize 58
761 18:35:03.285179 [CA 2] Center 29 (0~58) winsize 59
762 18:35:03.285305 [CA 3] Center 23 (-4~51) winsize 56
763 18:35:03.285414 [CA 4] Center 24 (-3~52) winsize 56
764 18:35:03.285507 [CA 5] Center 30 (1~59) winsize 59
765 18:35:03.285600
766 18:35:03.285693 [CATrainingPosCal] consider 2 rank data
767 18:35:03.285786 u2DelayCellTimex100 = 762/100 ps
768 18:35:03.285879 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
769 18:35:03.285973 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
770 18:35:03.286066 CA2 delay=28 (0~57),Diff = 4 PI (5 cell)
771 18:35:03.286159 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
772 18:35:03.286252 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
773 18:35:03.286346 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
774 18:35:03.286438
775 18:35:03.286531 CA PerBit enable=1, Macro0, CA PI delay=24
776 18:35:03.286624 === u2Vref_new: 0x56 --> 0x2d
777 18:35:03.286718
778 18:35:03.286811 Vref(ca) range 1: 22
779 18:35:03.286904
780 18:35:03.286997 CS Dly= 11 (42-0-32)
781 18:35:03.287090 Write Rank1 MR13 =0xd8
782 18:35:03.287183 Write Rank1 MR13 =0xd8
783 18:35:03.287275 Write Rank1 MR12 =0x56
784 18:35:03.287368 [RankSwap] Rank num 2, (Multi 1), Rank 0
785 18:35:03.287460 Write Rank0 MR2 =0xad
786 18:35:03.287553 [Write Leveling]
787 18:35:03.287645 delay byte0 byte1 byte2 byte3
788 18:35:03.287738
789 18:35:03.287832 10 0 0
790 18:35:03.287927 11 0 0
791 18:35:03.288022 12 0 0
792 18:35:03.288117 13 0 0
793 18:35:03.288212 14 0 0
794 18:35:03.288306 15 0 0
795 18:35:03.288400 16 0 0
796 18:35:03.288494 17 0 0
797 18:35:03.288589 18 0 0
798 18:35:03.288683 19 0 0
799 18:35:03.288777 20 0 0
800 18:35:03.288872 21 0 0
801 18:35:03.288967 22 0 0
802 18:35:03.289062 23 0 0
803 18:35:03.289156 24 0 0
804 18:35:03.289251 25 0 0
805 18:35:03.289391 26 0 ff
806 18:35:03.289487 27 0 ff
807 18:35:03.289582 28 0 ff
808 18:35:03.289677 29 0 ff
809 18:35:03.289772 30 0 ff
810 18:35:03.289866 31 0 ff
811 18:35:03.289960 32 0 ff
812 18:35:03.290055 33 ff ff
813 18:35:03.290149 34 ff ff
814 18:35:03.290243 35 ff ff
815 18:35:03.290337 36 ff ff
816 18:35:03.290431 37 ff ff
817 18:35:03.290525 38 ff ff
818 18:35:03.290619 39 ff ff
819 18:35:03.290714 pass bytecount = 0xff (0xff: all bytes pass)
820 18:35:03.290807
821 18:35:03.290900 DQS0 dly: 33
822 18:35:03.290992 DQS1 dly: 26
823 18:35:03.291085 Write Rank0 MR2 =0x2d
824 18:35:03.291177 [RankSwap] Rank num 2, (Multi 1), Rank 0
825 18:35:03.291270 Write Rank0 MR1 =0xd6
826 18:35:03.291363 [Gating]
827 18:35:03.291455 ==
828 18:35:03.291549 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
829 18:35:03.291643 fsp= 1, odt_onoff= 1, Byte mode= 0
830 18:35:03.291737 ==
831 18:35:03.291832 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0
832 18:35:03.291928 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 18:35:03.292024 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 18:35:03.292120 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 18:35:03.292215 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 18:35:03.292311 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 18:35:03.292406 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 18:35:03.292500 3 1 28 |2c2c 2c2b |(11 10)(11 11) |(0 0)(1 0)| 0
839 18:35:03.292595 3 2 0 |201 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
840 18:35:03.292690 3 2 4 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
841 18:35:03.292785 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 18:35:03.292880 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 18:35:03.292976 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 18:35:03.293071 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 18:35:03.293166 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 18:35:03.293265 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
847 18:35:03.293401 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 18:35:03.293496 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 18:35:03.293591 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 18:35:03.293686 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 18:35:03.293781 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 18:35:03.293876 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 18:35:03.293971 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
854 18:35:03.294066 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 18:35:03.294160 3 4 0 |c0c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
856 18:35:03.294255 3 4 4 |3d3d 3231 |(11 11)(11 11) |(1 1)(1 1)| 0
857 18:35:03.294349 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 18:35:03.294444 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 18:35:03.294538 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 18:35:03.294655 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 18:35:03.294764 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 18:35:03.294859 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 18:35:03.294954 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 18:35:03.295049 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 18:35:03.295144 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 18:35:03.295240 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 18:35:03.295334 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 18:35:03.295429 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 18:35:03.295523 [Byte 0] Lead/lag falling Transition (3, 5, 20)
870 18:35:03.295617 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
871 18:35:03.295712 [Byte 1] Lead/lag falling Transition (3, 5, 24)
872 18:35:03.295804 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
873 18:35:03.296097 [Byte 0] Lead/lag Transition tap number (3)
874 18:35:03.296193 [Byte 1] Lead/lag Transition tap number (2)
875 18:35:03.296290 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
876 18:35:03.296389 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
877 18:35:03.296487 [Byte 0]First pass (3, 6, 4)
878 18:35:03.296581 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 18:35:03.296678 [Byte 1]First pass (3, 6, 8)
880 18:35:03.296809 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 18:35:03.296906 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 18:35:03.297002 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 18:35:03.297098 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 18:35:03.297193 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 18:35:03.297318 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 18:35:03.297429 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 18:35:03.297525 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 18:35:03.297621 All bytes gating window > 1UI, Early break!
889 18:35:03.297715
890 18:35:03.297809 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
891 18:35:03.297904
892 18:35:03.297997 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
893 18:35:03.298090
894 18:35:03.298182
895 18:35:03.298274
896 18:35:03.298366 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
897 18:35:03.298459
898 18:35:03.298551 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
899 18:35:03.298644
900 18:35:03.298736
901 18:35:03.298828 Write Rank0 MR1 =0x56
902 18:35:03.298921
903 18:35:03.299013 best RODT dly(2T, 0.5T) = (2, 2)
904 18:35:03.299106
905 18:35:03.299198 best RODT dly(2T, 0.5T) = (2, 2)
906 18:35:03.299291 ==
907 18:35:03.299383 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
908 18:35:03.299477 fsp= 1, odt_onoff= 1, Byte mode= 0
909 18:35:03.299570 ==
910 18:35:03.299664 Start DQ dly to find pass range UseTestEngine =0
911 18:35:03.299757 x-axis: bit #, y-axis: DQ dly (-127~63)
912 18:35:03.299851 RX Vref Scan = 0
913 18:35:03.299943 -26, [0] xxxxxxxx xxxxxxxx [MSB]
914 18:35:03.300042 -25, [0] xxxxxxxx xxxxxxxx [MSB]
915 18:35:03.300137 -24, [0] xxxxxxxx xxxxxxxx [MSB]
916 18:35:03.300232 -23, [0] xxxxxxxx xxxxxxxx [MSB]
917 18:35:03.300327 -22, [0] xxxxxxxx xxxxxxxx [MSB]
918 18:35:03.300422 -21, [0] xxxxxxxx xxxxxxxx [MSB]
919 18:35:03.300517 -20, [0] xxxxxxxx xxxxxxxx [MSB]
920 18:35:03.300611 -19, [0] xxxxxxxx xxxxxxxx [MSB]
921 18:35:03.300706 -18, [0] xxxxxxxx xxxxxxxx [MSB]
922 18:35:03.300801 -17, [0] xxxxxxxx xxxxxxxx [MSB]
923 18:35:03.300895 -16, [0] xxxxxxxx xxxxxxxx [MSB]
924 18:35:03.300991 -15, [0] xxxxxxxx xxxxxxxx [MSB]
925 18:35:03.301085 -14, [0] xxxxxxxx xxxxxxxx [MSB]
926 18:35:03.301179 -13, [0] xxxxxxxx xxxxxxxx [MSB]
927 18:35:03.301307 -12, [0] xxxxxxxx xxxxxxxx [MSB]
928 18:35:03.301417 -11, [0] xxxxxxxx xxxxxxxx [MSB]
929 18:35:03.301512 -10, [0] xxxxxxxx xxxxxxxx [MSB]
930 18:35:03.301607 -9, [0] xxxxxxxx xxxxxxxx [MSB]
931 18:35:03.301701 -8, [0] xxxxxxxx xxxxxxxx [MSB]
932 18:35:03.301797 -7, [0] xxxxxxxx xxxxxxxx [MSB]
933 18:35:03.301891 -6, [0] xxxxxxxx xxxxxxxx [MSB]
934 18:35:03.301986 -5, [0] xxxxxxxx xxxxxxxx [MSB]
935 18:35:03.302081 -4, [0] xxxxxxxx xxxxxxxx [MSB]
936 18:35:03.302176 -3, [0] xxxxxxxx xxxxxxxx [MSB]
937 18:35:03.302271 -2, [0] xxxxxxxx xxxxxxxx [MSB]
938 18:35:03.302365 -1, [0] xxxoxxxx xxxxxxxx [MSB]
939 18:35:03.302460 0, [0] xxxoxoxx xxxxxxxx [MSB]
940 18:35:03.302556 1, [0] xxxoxoxx xxxoxxxx [MSB]
941 18:35:03.302651 2, [0] xxxoxoxo xxxoxoxx [MSB]
942 18:35:03.302746 3, [0] xxxoxooo oxxoxoox [MSB]
943 18:35:03.302844 4, [0] xxxoxooo oxxoxoox [MSB]
944 18:35:03.302939 5, [0] xxxoxooo ooxooooo [MSB]
945 18:35:03.303033 6, [0] xxxoxooo ooxooooo [MSB]
946 18:35:03.303128 7, [0] xooooooo ooxooooo [MSB]
947 18:35:03.303223 8, [0] xooooooo oooooooo [MSB]
948 18:35:03.303317 9, [0] xooooooo oooooooo [MSB]
949 18:35:03.303412 10, [0] xooooooo oooooooo [MSB]
950 18:35:03.303508 31, [0] oooooooo oooooooo [MSB]
951 18:35:03.303602 32, [0] oooxoooo oooooooo [MSB]
952 18:35:03.303697 33, [0] oooxoooo oooooxoo [MSB]
953 18:35:03.303791 34, [0] oooxoxxo oooooxxo [MSB]
954 18:35:03.303885 35, [0] oooxoxxx xooooxxo [MSB]
955 18:35:03.303980 36, [0] oooxoxxx xooxoxxx [MSB]
956 18:35:03.304074 37, [0] oooxoxxx xxoxxxxx [MSB]
957 18:35:03.304168 38, [0] oooxoxxx xxoxxxxx [MSB]
958 18:35:03.304262 39, [0] oooxoxxx xxoxxxxx [MSB]
959 18:35:03.304356 40, [0] oooxxxxx xxoxxxxx [MSB]
960 18:35:03.304450 41, [0] xxxxxxxx xxoxxxxx [MSB]
961 18:35:03.304545 42, [0] xxxxxxxx xxxxxxxx [MSB]
962 18:35:03.304639 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
963 18:35:03.304731 iDelay=42, Bit 1, Center 23 (7 ~ 40) 34
964 18:35:03.304824 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
965 18:35:03.304916 iDelay=42, Bit 3, Center 15 (-1 ~ 31) 33
966 18:35:03.305008 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
967 18:35:03.305100 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
968 18:35:03.305191 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
969 18:35:03.305289 iDelay=42, Bit 7, Center 18 (2 ~ 34) 33
970 18:35:03.305382 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
971 18:35:03.305475 iDelay=42, Bit 9, Center 20 (5 ~ 36) 32
972 18:35:03.305567 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
973 18:35:03.305659 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
974 18:35:03.305752 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
975 18:35:03.305844 iDelay=42, Bit 13, Center 17 (2 ~ 32) 31
976 18:35:03.305935 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
977 18:35:03.306027 iDelay=42, Bit 15, Center 20 (5 ~ 35) 31
978 18:35:03.306119 ==
979 18:35:03.306211 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
980 18:35:03.306304 fsp= 1, odt_onoff= 1, Byte mode= 0
981 18:35:03.306398 ==
982 18:35:03.306490 DQS Delay:
983 18:35:03.306583 DQS0 = 0, DQS1 = 0
984 18:35:03.306675 DQM Delay:
985 18:35:03.306767 DQM0 = 20, DQM1 = 19
986 18:35:03.306859 DQ Delay:
987 18:35:03.306952 DQ0 =25, DQ1 =23, DQ2 =23, DQ3 =15
988 18:35:03.307045 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
989 18:35:03.307138 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
990 18:35:03.307231 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
991 18:35:03.307323
992 18:35:03.307415
993 18:35:03.307507 DramC Write-DBI off
994 18:35:03.307600 ==
995 18:35:03.307693 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
996 18:35:03.307786 fsp= 1, odt_onoff= 1, Byte mode= 0
997 18:35:03.307879 ==
998 18:35:03.307972 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
999 18:35:03.308064
1000 18:35:03.308156 Begin, DQ Scan Range 922~1178
1001 18:35:03.308249
1002 18:35:03.308341
1003 18:35:03.308433 TX Vref Scan disable
1004 18:35:03.308525 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1005 18:35:03.308814 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1006 18:35:03.308911 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1007 18:35:03.309011 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1008 18:35:03.309108 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1009 18:35:03.309206 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1010 18:35:03.309311 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1011 18:35:03.309408 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1012 18:35:03.309505 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1013 18:35:03.309600 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1014 18:35:03.309696 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1015 18:35:03.309791 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1016 18:35:03.309885 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1017 18:35:03.309981 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1018 18:35:03.310079 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1019 18:35:03.310175 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1020 18:35:03.310271 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1021 18:35:03.310366 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1022 18:35:03.310461 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1023 18:35:03.310556 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1024 18:35:03.310652 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1025 18:35:03.310754 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1026 18:35:03.310853 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1027 18:35:03.310951 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1028 18:35:03.311048 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1029 18:35:03.311144 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1030 18:35:03.311240 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1031 18:35:03.311335 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1032 18:35:03.311430 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1033 18:35:03.311526 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1034 18:35:03.311620 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1035 18:35:03.311715 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1036 18:35:03.311809 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1037 18:35:03.311904 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1038 18:35:03.311998 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1039 18:35:03.312092 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1040 18:35:03.312187 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1041 18:35:03.312281 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1042 18:35:03.312376 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1043 18:35:03.312471 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1044 18:35:03.312566 962 |3 6 2|[0] xxxxxxxx oxxoxxxx [MSB]
1045 18:35:03.312660 963 |3 6 3|[0] xxxxxxxx oxxoxoox [MSB]
1046 18:35:03.312754 964 |3 6 4|[0] xxxxxxxx oxxoooox [MSB]
1047 18:35:03.312848 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1048 18:35:03.312941 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1049 18:35:03.313035 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1050 18:35:03.313128 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1051 18:35:03.313222 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1052 18:35:03.313338 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1053 18:35:03.313433 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1054 18:35:03.313528 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1055 18:35:03.313622 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1056 18:35:03.313716 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1057 18:35:03.313810 975 |3 6 15|[0] xooooooo oooooooo [MSB]
1058 18:35:03.313904 986 |3 6 26|[0] oooooooo oooxoxoo [MSB]
1059 18:35:03.313998 987 |3 6 27|[0] oooooooo xxoxxxoo [MSB]
1060 18:35:03.314091 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1061 18:35:03.314185 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1062 18:35:03.314279 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1063 18:35:03.314372 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1064 18:35:03.314466 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1065 18:35:03.314560 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1066 18:35:03.314654 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1067 18:35:03.314748 Byte0, DQ PI dly=982, DQM PI dly= 982
1068 18:35:03.314839 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1069 18:35:03.314933
1070 18:35:03.315024 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1071 18:35:03.315117
1072 18:35:03.315208 Byte1, DQ PI dly=975, DQM PI dly= 975
1073 18:35:03.315299 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1074 18:35:03.315391
1075 18:35:03.315482 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1076 18:35:03.315574
1077 18:35:03.315664 ==
1078 18:35:03.315755 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1079 18:35:03.315847 fsp= 1, odt_onoff= 1, Byte mode= 0
1080 18:35:03.315938 ==
1081 18:35:03.316030 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1082 18:35:03.316122
1083 18:35:03.316212 Begin, DQ Scan Range 951~1015
1084 18:35:03.316303 Write Rank0 MR14 =0x0
1085 18:35:03.316394
1086 18:35:03.316485 CH=0, VrefRange= 0, VrefLevel = 0
1087 18:35:03.316576 TX Bit0 (977~994) 18 985, Bit8 (965~983) 19 974,
1088 18:35:03.316668 TX Bit1 (977~993) 17 985, Bit9 (967~982) 16 974,
1089 18:35:03.316760 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1090 18:35:03.316852 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1091 18:35:03.316944 TX Bit4 (976~993) 18 984, Bit12 (967~983) 17 975,
1092 18:35:03.317036 TX Bit5 (972~987) 16 979, Bit13 (966~982) 17 974,
1093 18:35:03.317128 TX Bit6 (974~988) 15 981, Bit14 (967~983) 17 975,
1094 18:35:03.317220 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1095 18:35:03.317319
1096 18:35:03.317411 Write Rank0 MR14 =0x2
1097 18:35:03.317502
1098 18:35:03.317593 CH=0, VrefRange= 0, VrefLevel = 2
1099 18:35:03.317685 TX Bit0 (977~994) 18 985, Bit8 (964~983) 20 973,
1100 18:35:03.317776 TX Bit1 (977~993) 17 985, Bit9 (966~983) 18 974,
1101 18:35:03.317868 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1102 18:35:03.317961 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1103 18:35:03.318053 TX Bit4 (975~993) 19 984, Bit12 (966~983) 18 974,
1104 18:35:03.318145 TX Bit5 (971~988) 18 979, Bit13 (965~982) 18 973,
1105 18:35:03.318237 TX Bit6 (973~989) 17 981, Bit14 (967~983) 17 975,
1106 18:35:03.318329 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1107 18:35:03.318420
1108 18:35:03.318512 Write Rank0 MR14 =0x4
1109 18:35:03.318603
1110 18:35:03.318694 CH=0, VrefRange= 0, VrefLevel = 4
1111 18:35:03.318786 TX Bit0 (977~994) 18 985, Bit8 (963~983) 21 973,
1112 18:35:03.319073 TX Bit1 (977~993) 17 985, Bit9 (966~983) 18 974,
1113 18:35:03.319168 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1114 18:35:03.319265 TX Bit3 (970~987) 18 978, Bit11 (964~982) 19 973,
1115 18:35:03.319360 TX Bit4 (975~994) 20 984, Bit12 (966~983) 18 974,
1116 18:35:03.319454 TX Bit5 (971~988) 18 979, Bit13 (965~982) 18 973,
1117 18:35:03.319546 TX Bit6 (973~989) 17 981, Bit14 (966~984) 19 975,
1118 18:35:03.319639 TX Bit7 (976~991) 16 983, Bit15 (968~984) 17 976,
1119 18:35:03.319731
1120 18:35:03.319822 Write Rank0 MR14 =0x6
1121 18:35:03.319914
1122 18:35:03.320005 CH=0, VrefRange= 0, VrefLevel = 6
1123 18:35:03.320098 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1124 18:35:03.320191 TX Bit1 (976~993) 18 984, Bit9 (966~984) 19 975,
1125 18:35:03.320284 TX Bit2 (976~993) 18 984, Bit10 (968~989) 22 978,
1126 18:35:03.320376 TX Bit3 (969~987) 19 978, Bit11 (964~983) 20 973,
1127 18:35:03.320468 TX Bit4 (975~994) 20 984, Bit12 (966~984) 19 975,
1128 18:35:03.320560 TX Bit5 (971~990) 20 980, Bit13 (965~983) 19 974,
1129 18:35:03.320652 TX Bit6 (972~990) 19 981, Bit14 (966~984) 19 975,
1130 18:35:03.320744 TX Bit7 (976~992) 17 984, Bit15 (968~985) 18 976,
1131 18:35:03.320835
1132 18:35:03.320926 Write Rank0 MR14 =0x8
1133 18:35:03.321017
1134 18:35:03.321109 CH=0, VrefRange= 0, VrefLevel = 8
1135 18:35:03.321200 TX Bit0 (976~995) 20 985, Bit8 (963~984) 22 973,
1136 18:35:03.321301 TX Bit1 (976~994) 19 985, Bit9 (965~984) 20 974,
1137 18:35:03.321395 TX Bit2 (976~994) 19 985, Bit10 (968~990) 23 979,
1138 18:35:03.321488 TX Bit3 (969~988) 20 978, Bit11 (963~983) 21 973,
1139 18:35:03.321581 TX Bit4 (975~995) 21 985, Bit12 (966~984) 19 975,
1140 18:35:03.321674 TX Bit5 (970~990) 21 980, Bit13 (964~983) 20 973,
1141 18:35:03.321766 TX Bit6 (971~990) 20 980, Bit14 (966~985) 20 975,
1142 18:35:03.321858 TX Bit7 (975~992) 18 983, Bit15 (968~985) 18 976,
1143 18:35:03.321950
1144 18:35:03.322041 Write Rank0 MR14 =0xa
1145 18:35:03.322133
1146 18:35:03.322225 CH=0, VrefRange= 0, VrefLevel = 10
1147 18:35:03.322317 TX Bit0 (976~996) 21 986, Bit8 (963~985) 23 974,
1148 18:35:03.322409 TX Bit1 (976~994) 19 985, Bit9 (965~985) 21 975,
1149 18:35:03.322501 TX Bit2 (976~994) 19 985, Bit10 (968~990) 23 979,
1150 18:35:03.322593 TX Bit3 (969~989) 21 979, Bit11 (963~984) 22 973,
1151 18:35:03.322685 TX Bit4 (974~995) 22 984, Bit12 (965~985) 21 975,
1152 18:35:03.322777 TX Bit5 (970~991) 22 980, Bit13 (965~983) 19 974,
1153 18:35:03.322869 TX Bit6 (971~991) 21 981, Bit14 (965~986) 22 975,
1154 18:35:03.322961 TX Bit7 (975~992) 18 983, Bit15 (967~986) 20 976,
1155 18:35:03.323053
1156 18:35:03.323144 Write Rank0 MR14 =0xc
1157 18:35:03.323236
1158 18:35:03.323327 CH=0, VrefRange= 0, VrefLevel = 12
1159 18:35:03.323419 TX Bit0 (976~997) 22 986, Bit8 (962~985) 24 973,
1160 18:35:03.323511 TX Bit1 (976~995) 20 985, Bit9 (965~985) 21 975,
1161 18:35:03.323603 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
1162 18:35:03.323696 TX Bit3 (969~989) 21 979, Bit11 (963~984) 22 973,
1163 18:35:03.323788 TX Bit4 (974~995) 22 984, Bit12 (965~985) 21 975,
1164 18:35:03.323880 TX Bit5 (970~991) 22 980, Bit13 (964~984) 21 974,
1165 18:35:03.323972 TX Bit6 (971~991) 21 981, Bit14 (964~986) 23 975,
1166 18:35:03.324064 TX Bit7 (974~993) 20 983, Bit15 (967~987) 21 977,
1167 18:35:03.324155
1168 18:35:03.324246 Write Rank0 MR14 =0xe
1169 18:35:03.324337
1170 18:35:03.324428 CH=0, VrefRange= 0, VrefLevel = 14
1171 18:35:03.324520 TX Bit0 (976~997) 22 986, Bit8 (962~986) 25 974,
1172 18:35:03.324612 TX Bit1 (976~995) 20 985, Bit9 (964~986) 23 975,
1173 18:35:03.324704 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1174 18:35:03.324796 TX Bit3 (969~990) 22 979, Bit11 (962~984) 23 973,
1175 18:35:03.324887 TX Bit4 (974~996) 23 985, Bit12 (964~986) 23 975,
1176 18:35:03.324979 TX Bit5 (970~991) 22 980, Bit13 (963~984) 22 973,
1177 18:35:03.325071 TX Bit6 (970~992) 23 981, Bit14 (964~987) 24 975,
1178 18:35:03.325163 TX Bit7 (974~993) 20 983, Bit15 (968~988) 21 978,
1179 18:35:03.325254
1180 18:35:03.325390 Write Rank0 MR14 =0x10
1181 18:35:03.325481
1182 18:35:03.325572 CH=0, VrefRange= 0, VrefLevel = 16
1183 18:35:03.325664 TX Bit0 (976~997) 22 986, Bit8 (962~986) 25 974,
1184 18:35:03.325756 TX Bit1 (975~996) 22 985, Bit9 (964~986) 23 975,
1185 18:35:03.325848 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1186 18:35:03.325939 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1187 18:35:03.326032 TX Bit4 (973~997) 25 985, Bit12 (964~986) 23 975,
1188 18:35:03.326123 TX Bit5 (969~991) 23 980, Bit13 (963~985) 23 974,
1189 18:35:03.326215 TX Bit6 (970~992) 23 981, Bit14 (964~988) 25 976,
1190 18:35:03.326307 TX Bit7 (974~993) 20 983, Bit15 (967~988) 22 977,
1191 18:35:03.326399
1192 18:35:03.326490 Write Rank0 MR14 =0x12
1193 18:35:03.326581
1194 18:35:03.326672 CH=0, VrefRange= 0, VrefLevel = 18
1195 18:35:03.326764 TX Bit0 (975~998) 24 986, Bit8 (961~986) 26 973,
1196 18:35:03.326856 TX Bit1 (975~996) 22 985, Bit9 (964~987) 24 975,
1197 18:35:03.326947 TX Bit2 (975~996) 22 985, Bit10 (967~991) 25 979,
1198 18:35:03.327039 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1199 18:35:03.327131 TX Bit4 (973~997) 25 985, Bit12 (964~987) 24 975,
1200 18:35:03.327222 TX Bit5 (969~992) 24 980, Bit13 (962~985) 24 973,
1201 18:35:03.327314 TX Bit6 (970~992) 23 981, Bit14 (964~988) 25 976,
1202 18:35:03.327406 TX Bit7 (972~994) 23 983, Bit15 (967~989) 23 978,
1203 18:35:03.327498
1204 18:35:03.327588 Write Rank0 MR14 =0x14
1205 18:35:03.327679
1206 18:35:03.327771 CH=0, VrefRange= 0, VrefLevel = 20
1207 18:35:03.327862 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1208 18:35:03.327954 TX Bit1 (975~997) 23 986, Bit9 (963~988) 26 975,
1209 18:35:03.328046 TX Bit2 (974~996) 23 985, Bit10 (967~991) 25 979,
1210 18:35:03.328138 TX Bit3 (968~991) 24 979, Bit11 (961~985) 25 973,
1211 18:35:03.328229 TX Bit4 (973~998) 26 985, Bit12 (963~987) 25 975,
1212 18:35:03.328516 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1213 18:35:03.328610 TX Bit6 (970~993) 24 981, Bit14 (963~988) 26 975,
1214 18:35:03.328706 TX Bit7 (972~994) 23 983, Bit15 (966~989) 24 977,
1215 18:35:03.328799
1216 18:35:03.328892 Write Rank0 MR14 =0x16
1217 18:35:03.328984
1218 18:35:03.329076 CH=0, VrefRange= 0, VrefLevel = 22
1219 18:35:03.329168 TX Bit0 (975~999) 25 987, Bit8 (962~987) 26 974,
1220 18:35:03.329267 TX Bit1 (974~997) 24 985, Bit9 (963~988) 26 975,
1221 18:35:03.329398 TX Bit2 (974~996) 23 985, Bit10 (967~991) 25 979,
1222 18:35:03.329490 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1223 18:35:03.329584 TX Bit4 (972~998) 27 985, Bit12 (963~987) 25 975,
1224 18:35:03.329676 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1225 18:35:03.329769 TX Bit6 (969~993) 25 981, Bit14 (962~987) 26 974,
1226 18:35:03.329861 TX Bit7 (972~995) 24 983, Bit15 (966~989) 24 977,
1227 18:35:03.329953
1228 18:35:03.330044 Write Rank0 MR14 =0x18
1229 18:35:03.330135
1230 18:35:03.330226 CH=0, VrefRange= 0, VrefLevel = 24
1231 18:35:03.330317 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1232 18:35:03.330410 TX Bit1 (973~998) 26 985, Bit9 (963~989) 27 976,
1233 18:35:03.330502 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1234 18:35:03.330594 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1235 18:35:03.330686 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1236 18:35:03.330778 TX Bit5 (969~993) 25 981, Bit13 (962~985) 24 973,
1237 18:35:03.330869 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1238 18:35:03.330961 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1239 18:35:03.331052
1240 18:35:03.331143 Write Rank0 MR14 =0x1a
1241 18:35:03.331234
1242 18:35:03.331325 CH=0, VrefRange= 0, VrefLevel = 26
1243 18:35:03.331417 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1244 18:35:03.331509 TX Bit1 (973~998) 26 985, Bit9 (963~989) 27 976,
1245 18:35:03.331601 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1246 18:35:03.331694 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1247 18:35:03.331786 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1248 18:35:03.331878 TX Bit5 (969~993) 25 981, Bit13 (962~985) 24 973,
1249 18:35:03.331970 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1250 18:35:03.332062 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1251 18:35:03.332153
1252 18:35:03.332244 Write Rank0 MR14 =0x1c
1253 18:35:03.332335
1254 18:35:03.332426 CH=0, VrefRange= 0, VrefLevel = 28
1255 18:35:03.332517 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1256 18:35:03.332609 TX Bit1 (973~998) 26 985, Bit9 (963~989) 27 976,
1257 18:35:03.332701 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1258 18:35:03.332792 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1259 18:35:03.332884 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1260 18:35:03.332976 TX Bit5 (969~993) 25 981, Bit13 (962~985) 24 973,
1261 18:35:03.333068 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1262 18:35:03.333160 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1263 18:35:03.333252
1264 18:35:03.333390
1265 18:35:03.333481 TX Vref found, early break! 381< 385
1266 18:35:03.333573 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1267 18:35:03.333665 u1DelayCellOfst[0]=8 cells (7 PI)
1268 18:35:03.333756 u1DelayCellOfst[1]=6 cells (5 PI)
1269 18:35:03.333847 u1DelayCellOfst[2]=6 cells (5 PI)
1270 18:35:03.333939 u1DelayCellOfst[3]=0 cells (0 PI)
1271 18:35:03.334030 u1DelayCellOfst[4]=6 cells (5 PI)
1272 18:35:03.334122 u1DelayCellOfst[5]=1 cells (1 PI)
1273 18:35:03.334213 u1DelayCellOfst[6]=1 cells (1 PI)
1274 18:35:03.334304 u1DelayCellOfst[7]=3 cells (3 PI)
1275 18:35:03.334395 Byte0, DQ PI dly=980, DQM PI dly= 983
1276 18:35:03.334486 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1277 18:35:03.334578
1278 18:35:03.334669 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1279 18:35:03.334762
1280 18:35:03.334860 u1DelayCellOfst[8]=0 cells (0 PI)
1281 18:35:03.334954 u1DelayCellOfst[9]=3 cells (3 PI)
1282 18:35:03.335046 u1DelayCellOfst[10]=7 cells (6 PI)
1283 18:35:03.335138 u1DelayCellOfst[11]=0 cells (0 PI)
1284 18:35:03.335230 u1DelayCellOfst[12]=1 cells (1 PI)
1285 18:35:03.335325 u1DelayCellOfst[13]=0 cells (0 PI)
1286 18:35:03.335411 u1DelayCellOfst[14]=2 cells (2 PI)
1287 18:35:03.335495 u1DelayCellOfst[15]=6 cells (5 PI)
1288 18:35:03.335577 Byte1, DQ PI dly=973, DQM PI dly= 976
1289 18:35:03.335661 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1290 18:35:03.335743
1291 18:35:03.335827 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1292 18:35:03.335915
1293 18:35:03.335997 Write Rank0 MR14 =0x18
1294 18:35:03.336078
1295 18:35:03.336160 Final TX Range 0 Vref 24
1296 18:35:03.336242
1297 18:35:03.336325 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1298 18:35:03.336407
1299 18:35:03.336489 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1300 18:35:03.336573 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1301 18:35:03.336656 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1302 18:35:03.336739 Write Rank0 MR3 =0xb0
1303 18:35:03.336820 DramC Write-DBI on
1304 18:35:03.336902 ==
1305 18:35:03.336985 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1306 18:35:03.337067 fsp= 1, odt_onoff= 1, Byte mode= 0
1307 18:35:03.337149 ==
1308 18:35:03.337231 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1309 18:35:03.337352
1310 18:35:03.337433 Begin, DQ Scan Range 696~760
1311 18:35:03.337514
1312 18:35:03.337595
1313 18:35:03.337677 TX Vref Scan disable
1314 18:35:03.337759 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1315 18:35:03.337844 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1316 18:35:03.337929 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1317 18:35:03.338013 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1318 18:35:03.338098 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1319 18:35:03.338182 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1320 18:35:03.338267 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1321 18:35:03.338351 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1322 18:35:03.338435 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1323 18:35:03.338520 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1324 18:35:03.338800 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1325 18:35:03.338892 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1326 18:35:03.338978 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1327 18:35:03.339063 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1328 18:35:03.339148 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1329 18:35:03.339232 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1330 18:35:03.339316 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1331 18:35:03.339401 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1332 18:35:03.339486 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1333 18:35:03.339571 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1334 18:35:03.339657 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1335 18:35:03.339742 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1336 18:35:03.339826 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1337 18:35:03.339911 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1338 18:35:03.339996 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1339 18:35:03.340080 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1340 18:35:03.340165 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1341 18:35:03.340249 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1342 18:35:03.340333 Byte0, DQ PI dly=727, DQM PI dly= 727
1343 18:35:03.340415 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1344 18:35:03.340497
1345 18:35:03.340579 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1346 18:35:03.340661
1347 18:35:03.340743 Byte1, DQ PI dly=718, DQM PI dly= 718
1348 18:35:03.340825 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1349 18:35:03.340907
1350 18:35:03.340989 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1351 18:35:03.341071
1352 18:35:03.341153 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1353 18:35:03.341237 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1354 18:35:03.341308 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1355 18:35:03.341362 wait MRW command Rank0 MR3 =0x30 fired (1)
1356 18:35:03.341416 Write Rank0 MR3 =0x30
1357 18:35:03.341468 DramC Write-DBI off
1358 18:35:03.341521
1359 18:35:03.341573 [DATLAT]
1360 18:35:03.341624 Freq=1600, CH0 RK0, use_rxtx_scan=0
1361 18:35:03.341677
1362 18:35:03.341729 DATLAT Default: 0xf
1363 18:35:03.341781 7, 0xFFFF, sum=0
1364 18:35:03.341835 8, 0xFFFF, sum=0
1365 18:35:03.341889 9, 0xFFFF, sum=0
1366 18:35:03.341942 10, 0xFFFF, sum=0
1367 18:35:03.341995 11, 0xFFFF, sum=0
1368 18:35:03.342049 12, 0xFFFF, sum=0
1369 18:35:03.342102 13, 0xFFFF, sum=0
1370 18:35:03.342155 14, 0x0, sum=1
1371 18:35:03.342208 15, 0x0, sum=2
1372 18:35:03.342261 16, 0x0, sum=3
1373 18:35:03.342314 17, 0x0, sum=4
1374 18:35:03.342367 pattern=2 first_step=14 total pass=5 best_step=16
1375 18:35:03.342420 ==
1376 18:35:03.342472 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1377 18:35:03.342525 fsp= 1, odt_onoff= 1, Byte mode= 0
1378 18:35:03.342578 ==
1379 18:35:03.342631 Start DQ dly to find pass range UseTestEngine =1
1380 18:35:03.342683 x-axis: bit #, y-axis: DQ dly (-127~63)
1381 18:35:03.342736 RX Vref Scan = 1
1382 18:35:03.342788
1383 18:35:03.342840 RX Vref found, early break!
1384 18:35:03.342893
1385 18:35:03.342944 Final RX Vref 13, apply to both rank0 and 1
1386 18:35:03.342997 ==
1387 18:35:03.343049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1388 18:35:03.343102 fsp= 1, odt_onoff= 1, Byte mode= 0
1389 18:35:03.343154 ==
1390 18:35:03.343205 DQS Delay:
1391 18:35:03.343257 DQS0 = 0, DQS1 = 0
1392 18:35:03.343310 DQM Delay:
1393 18:35:03.343362 DQM0 = 20, DQM1 = 18
1394 18:35:03.343414 DQ Delay:
1395 18:35:03.343466 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
1396 18:35:03.343518 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =19
1397 18:35:03.343570 DQ8 =18, DQ9 =20, DQ10 =23, DQ11 =16
1398 18:35:03.343622 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1399 18:35:03.343674
1400 18:35:03.343726
1401 18:35:03.343778
1402 18:35:03.343830 [DramC_TX_OE_Calibration] TA2
1403 18:35:03.343882 Original DQ_B0 (3 6) =30, OEN = 27
1404 18:35:03.343935 Original DQ_B1 (3 6) =30, OEN = 27
1405 18:35:03.343988 23, 0x0, End_B0=23 End_B1=23
1406 18:35:03.344041 24, 0x0, End_B0=24 End_B1=24
1407 18:35:03.344094 25, 0x0, End_B0=25 End_B1=25
1408 18:35:03.344148 26, 0x0, End_B0=26 End_B1=26
1409 18:35:03.344201 27, 0x0, End_B0=27 End_B1=27
1410 18:35:03.344254 28, 0x0, End_B0=28 End_B1=28
1411 18:35:03.344307 29, 0x0, End_B0=29 End_B1=29
1412 18:35:03.344360 30, 0x0, End_B0=30 End_B1=30
1413 18:35:03.344413 31, 0xFFFF, End_B0=30 End_B1=30
1414 18:35:03.344466 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1415 18:35:03.344520 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1416 18:35:03.344573
1417 18:35:03.344624
1418 18:35:03.344675 Write Rank0 MR23 =0x3f
1419 18:35:03.344727 [DQSOSC]
1420 18:35:03.344779 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1421 18:35:03.344832 CH0_RK0: MR19=0x3, MR18=0xAA, DQSOSC=335, MR23=63, INC=21, DEC=32
1422 18:35:03.344885 Write Rank0 MR23 =0x3f
1423 18:35:03.344937 [DQSOSC]
1424 18:35:03.344989 [DQSOSCAuto] RK0, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
1425 18:35:03.345042 CH0 RK0: MR19=3, MR18=AD
1426 18:35:03.345094 [RankSwap] Rank num 2, (Multi 1), Rank 1
1427 18:35:03.345146 Write Rank0 MR2 =0xad
1428 18:35:03.345198 [Write Leveling]
1429 18:35:03.345250 delay byte0 byte1 byte2 byte3
1430 18:35:03.345342
1431 18:35:03.345394 10 0 0
1432 18:35:03.345448 11 0 0
1433 18:35:03.345501 12 0 0
1434 18:35:03.345555 13 0 0
1435 18:35:03.345607 14 0 0
1436 18:35:03.345661 15 0 0
1437 18:35:03.345713 16 0 0
1438 18:35:03.345767 17 0 0
1439 18:35:03.345819 18 0 0
1440 18:35:03.345872 19 0 0
1441 18:35:03.345925 20 0 0
1442 18:35:03.345978 21 0 0
1443 18:35:03.346030 22 0 0
1444 18:35:03.346083 23 0 0
1445 18:35:03.346136 24 0 0
1446 18:35:03.346188 25 0 0
1447 18:35:03.346241 26 0 0
1448 18:35:03.346294 27 0 0
1449 18:35:03.346347 28 0 ff
1450 18:35:03.346400 29 0 ff
1451 18:35:03.346453 30 0 ff
1452 18:35:03.346506 31 0 ff
1453 18:35:03.346558 32 0 ff
1454 18:35:03.346611 33 0 ff
1455 18:35:03.346664 34 ff ff
1456 18:35:03.346717 35 ff ff
1457 18:35:03.346770 36 ff ff
1458 18:35:03.346823 37 ff ff
1459 18:35:03.346877 38 ff ff
1460 18:35:03.346930 39 ff ff
1461 18:35:03.346983 40 ff ff
1462 18:35:03.347036 pass bytecount = 0xff (0xff: all bytes pass)
1463 18:35:03.347089
1464 18:35:03.347141 DQS0 dly: 34
1465 18:35:03.347193 DQS1 dly: 28
1466 18:35:03.347245 Write Rank0 MR2 =0x2d
1467 18:35:03.347297 [RankSwap] Rank num 2, (Multi 1), Rank 0
1468 18:35:03.347350 Write Rank1 MR1 =0xd6
1469 18:35:03.347401 [Gating]
1470 18:35:03.347453 ==
1471 18:35:03.347505 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1472 18:35:03.347557 fsp= 1, odt_onoff= 1, Byte mode= 0
1473 18:35:03.347610 ==
1474 18:35:03.347662 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1475 18:35:03.347913 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1476 18:35:03.347977 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1477 18:35:03.348032 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1478 18:35:03.348087 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1479 18:35:03.348140 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1480 18:35:03.348194 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1481 18:35:03.348248 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1482 18:35:03.348302 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1483 18:35:03.348355 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1484 18:35:03.348409 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
1485 18:35:03.348463 3 2 12 |3534 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1486 18:35:03.348516 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1487 18:35:03.348570 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1488 18:35:03.348623 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1489 18:35:03.348675 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1490 18:35:03.348729 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1491 18:35:03.348782 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1492 18:35:03.348836 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1493 18:35:03.348890 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1494 18:35:03.348943 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1495 18:35:03.348996 [Byte 0] Lead/lag Transition tap number (1)
1496 18:35:03.349049 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1497 18:35:03.349103 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1498 18:35:03.349156 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1499 18:35:03.349209 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1500 18:35:03.349270 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1501 18:35:03.349326 3 4 8 |504 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1502 18:35:03.349379 3 4 12 |2524 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1503 18:35:03.349433 3 4 16 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
1504 18:35:03.349487 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1505 18:35:03.349541 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1506 18:35:03.349594 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1507 18:35:03.349648 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1508 18:35:03.349701 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1509 18:35:03.349755 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1510 18:35:03.349808 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1511 18:35:03.349861 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1512 18:35:03.349915 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1513 18:35:03.349968 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1514 18:35:03.350022 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1515 18:35:03.350076 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1516 18:35:03.350129 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1517 18:35:03.350181 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1518 18:35:03.350234 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1519 18:35:03.350287 [Byte 0] Lead/lag Transition tap number (2)
1520 18:35:03.350339 [Byte 1] Lead/lag Transition tap number (2)
1521 18:35:03.350391 3 6 8 |403 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1522 18:35:03.350444 3 6 12 |404 3d3d |(1 1)(11 11) |(0 0)(0 0)| 0
1523 18:35:03.350498 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1524 18:35:03.350551 [Byte 0]First pass (3, 6, 16)
1525 18:35:03.350603 3 6 20 |4646 1c1c |(0 0)(1 1) |(0 0)(0 0)| 0
1526 18:35:03.350657 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1527 18:35:03.350710 [Byte 1]First pass (3, 6, 24)
1528 18:35:03.350762 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1529 18:35:03.350815 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1530 18:35:03.350868 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1531 18:35:03.350921 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1532 18:35:03.350975 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1533 18:35:03.351027 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1534 18:35:03.351081 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1535 18:35:03.351134 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1536 18:35:03.351187 All bytes gating window > 1UI, Early break!
1537 18:35:03.351240
1538 18:35:03.351292 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1539 18:35:03.351345
1540 18:35:03.351397 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1541 18:35:03.351449
1542 18:35:03.351501
1543 18:35:03.351552
1544 18:35:03.351604 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1545 18:35:03.351656
1546 18:35:03.351707 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1547 18:35:03.351759
1548 18:35:03.351810
1549 18:35:03.351862 Write Rank1 MR1 =0x56
1550 18:35:03.351914
1551 18:35:03.351966 best RODT dly(2T, 0.5T) = (2, 3)
1552 18:35:03.352018
1553 18:35:03.352071 best RODT dly(2T, 0.5T) = (2, 3)
1554 18:35:03.352123 ==
1555 18:35:03.352175 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1556 18:35:03.352228 fsp= 1, odt_onoff= 1, Byte mode= 0
1557 18:35:03.352281 ==
1558 18:35:03.352333 Start DQ dly to find pass range UseTestEngine =0
1559 18:35:03.352385 x-axis: bit #, y-axis: DQ dly (-127~63)
1560 18:35:03.352437 RX Vref Scan = 0
1561 18:35:03.352491 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1562 18:35:03.352552 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1563 18:35:03.352606 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1564 18:35:03.352659 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1565 18:35:03.352712 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1566 18:35:03.352766 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1567 18:35:03.352819 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1568 18:35:03.352872 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1569 18:35:03.352925 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1570 18:35:03.352977 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1571 18:35:03.353031 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1572 18:35:03.353085 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1573 18:35:03.353138 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1574 18:35:03.353191 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1575 18:35:03.353244 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1576 18:35:03.353310 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1577 18:35:03.353364 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1578 18:35:03.353417 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1579 18:35:03.353660 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1580 18:35:03.353719 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1581 18:35:03.353774 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1582 18:35:03.353828 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1583 18:35:03.353882 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1584 18:35:03.353935 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1585 18:35:03.353988 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1586 18:35:03.354042 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1587 18:35:03.354095 0, [0] xxxoxxxx oxxoxoxx [MSB]
1588 18:35:03.354148 1, [0] xxxoxoxx oxxoxoox [MSB]
1589 18:35:03.354202 2, [0] xxxoxooo ooxoooox [MSB]
1590 18:35:03.354255 3, [0] xxxoxooo ooxooooo [MSB]
1591 18:35:03.354309 4, [0] xxxoxooo ooxooooo [MSB]
1592 18:35:03.354361 5, [0] xxxoxooo ooxooooo [MSB]
1593 18:35:03.354415 6, [0] xxxooooo oooooooo [MSB]
1594 18:35:03.354469 7, [0] xooooooo oooooooo [MSB]
1595 18:35:03.354545 8, [0] xooooooo oooooooo [MSB]
1596 18:35:03.354642 34, [0] oooooooo oooooooo [MSB]
1597 18:35:03.354729 35, [0] oooxoooo oooxoooo [MSB]
1598 18:35:03.354814 36, [0] oooxoxoo oooxoxxo [MSB]
1599 18:35:03.354898 37, [0] oooxoxxx xooxoxxo [MSB]
1600 18:35:03.354982 38, [0] oooxoxxx xxoxxxxo [MSB]
1601 18:35:03.355066 39, [0] oooxoxxx xxoxxxxx [MSB]
1602 18:35:03.355151 40, [0] oooxoxxx xxoxxxxx [MSB]
1603 18:35:03.355234 41, [0] oooxoxxx xxoxxxxx [MSB]
1604 18:35:03.355317 42, [0] oooxxxxx xxoxxxxx [MSB]
1605 18:35:03.355373 43, [0] xxxxxxxx xxxxxxxx [MSB]
1606 18:35:03.355427 iDelay=43, Bit 0, Center 25 (9 ~ 42) 34
1607 18:35:03.355480 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
1608 18:35:03.355533 iDelay=43, Bit 2, Center 24 (7 ~ 42) 36
1609 18:35:03.355585 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
1610 18:35:03.355639 iDelay=43, Bit 4, Center 23 (6 ~ 41) 36
1611 18:35:03.355691 iDelay=43, Bit 5, Center 18 (1 ~ 35) 35
1612 18:35:03.355743 iDelay=43, Bit 6, Center 19 (2 ~ 36) 35
1613 18:35:03.355796 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1614 18:35:03.355848 iDelay=43, Bit 8, Center 18 (0 ~ 36) 37
1615 18:35:03.355900 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
1616 18:35:03.355952 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1617 18:35:03.356004 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1618 18:35:03.356056 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
1619 18:35:03.356108 iDelay=43, Bit 13, Center 17 (0 ~ 35) 36
1620 18:35:03.356160 iDelay=43, Bit 14, Center 18 (1 ~ 35) 35
1621 18:35:03.356212 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1622 18:35:03.356264 ==
1623 18:35:03.356316 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1624 18:35:03.356369 fsp= 1, odt_onoff= 1, Byte mode= 0
1625 18:35:03.356423 ==
1626 18:35:03.356476 DQS Delay:
1627 18:35:03.356528 DQS0 = 0, DQS1 = 0
1628 18:35:03.356580 DQM Delay:
1629 18:35:03.356631 DQM0 = 21, DQM1 = 19
1630 18:35:03.356683 DQ Delay:
1631 18:35:03.356735 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1632 18:35:03.356788 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19
1633 18:35:03.356840 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17
1634 18:35:03.356893 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1635 18:35:03.356946
1636 18:35:03.356998
1637 18:35:03.357049 DramC Write-DBI off
1638 18:35:03.357101 ==
1639 18:35:03.357154 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1640 18:35:03.357206 fsp= 1, odt_onoff= 1, Byte mode= 0
1641 18:35:03.357268 ==
1642 18:35:03.357367 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1643 18:35:03.357421
1644 18:35:03.357474 Begin, DQ Scan Range 924~1180
1645 18:35:03.357526
1646 18:35:03.357578
1647 18:35:03.357630 TX Vref Scan disable
1648 18:35:03.357683 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1649 18:35:03.357737 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1650 18:35:03.357791 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1651 18:35:03.357846 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1652 18:35:03.357899 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1653 18:35:03.357953 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1654 18:35:03.358006 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1655 18:35:03.358060 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1656 18:35:03.358113 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1657 18:35:03.358167 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1658 18:35:03.358220 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1659 18:35:03.358274 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1660 18:35:03.358328 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1661 18:35:03.358380 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1662 18:35:03.358434 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1663 18:35:03.358486 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1664 18:35:03.358539 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1665 18:35:03.358593 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1666 18:35:03.358646 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1667 18:35:03.358699 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1668 18:35:03.358752 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1669 18:35:03.358805 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1670 18:35:03.358858 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1671 18:35:03.358912 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1672 18:35:03.358965 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1673 18:35:03.359019 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1674 18:35:03.359072 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1675 18:35:03.359126 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1676 18:35:03.359179 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1677 18:35:03.359232 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1678 18:35:03.359285 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1679 18:35:03.359338 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1680 18:35:03.359391 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1681 18:35:03.359445 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1682 18:35:03.359498 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1683 18:35:03.359551 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1684 18:35:03.359604 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1685 18:35:03.359657 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1686 18:35:03.359710 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1687 18:35:03.359764 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1688 18:35:03.359817 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1689 18:35:03.359870 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1690 18:35:03.359923 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1691 18:35:03.359976 967 |3 6 7|[0] xxxxxxxx oxxoxoxx [MSB]
1692 18:35:03.360029 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1693 18:35:03.360081 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1694 18:35:03.360135 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1695 18:35:03.360187 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1696 18:35:03.360433 972 |3 6 12|[0] xxxoxxxx oooooooo [MSB]
1697 18:35:03.360492 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1698 18:35:03.360547 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1699 18:35:03.360600 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1700 18:35:03.360654 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1701 18:35:03.360707 977 |3 6 17|[0] ooxooooo oooooooo [MSB]
1702 18:35:03.360760 988 |3 6 28|[0] oooooooo oooooxoo [MSB]
1703 18:35:03.360813 989 |3 6 29|[0] oooooooo xooxoxoo [MSB]
1704 18:35:03.360867 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1705 18:35:03.360920 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1706 18:35:03.360974 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1707 18:35:03.361027 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1708 18:35:03.361080 994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB]
1709 18:35:03.361134 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1710 18:35:03.361187 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1711 18:35:03.361240 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1712 18:35:03.361318 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1713 18:35:03.361373 Byte0, DQ PI dly=985, DQM PI dly= 985
1714 18:35:03.361426 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1715 18:35:03.361479
1716 18:35:03.361531 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1717 18:35:03.361585
1718 18:35:03.361636 Byte1, DQ PI dly=978, DQM PI dly= 978
1719 18:35:03.361688 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1720 18:35:03.361740
1721 18:35:03.361792 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1722 18:35:03.361844
1723 18:35:03.361896 ==
1724 18:35:03.361948 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1725 18:35:03.362001 fsp= 1, odt_onoff= 1, Byte mode= 0
1726 18:35:03.362053 ==
1727 18:35:03.362105 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1728 18:35:03.362157
1729 18:35:03.362209 Begin, DQ Scan Range 954~1018
1730 18:35:03.362261 Write Rank1 MR14 =0x0
1731 18:35:03.362313
1732 18:35:03.362365 CH=0, VrefRange= 0, VrefLevel = 0
1733 18:35:03.362417 TX Bit0 (979~998) 20 988, Bit8 (969~984) 16 976,
1734 18:35:03.362471 TX Bit1 (978~996) 19 987, Bit9 (969~984) 16 976,
1735 18:35:03.362523 TX Bit2 (979~995) 17 987, Bit10 (974~989) 16 981,
1736 18:35:03.362576 TX Bit3 (973~991) 19 982, Bit11 (968~984) 17 976,
1737 18:35:03.362629 TX Bit4 (978~996) 19 987, Bit12 (969~984) 16 976,
1738 18:35:03.362681 TX Bit5 (976~990) 15 983, Bit13 (969~983) 15 976,
1739 18:35:03.362733 TX Bit6 (976~991) 16 983, Bit14 (969~984) 16 976,
1740 18:35:03.362785 TX Bit7 (977~993) 17 985, Bit15 (972~987) 16 979,
1741 18:35:03.362838
1742 18:35:03.362890 Write Rank1 MR14 =0x2
1743 18:35:03.362942
1744 18:35:03.362994 CH=0, VrefRange= 0, VrefLevel = 2
1745 18:35:03.363046 TX Bit0 (979~998) 20 988, Bit8 (969~984) 16 976,
1746 18:35:03.363099 TX Bit1 (978~997) 20 987, Bit9 (969~985) 17 977,
1747 18:35:03.363151 TX Bit2 (978~996) 19 987, Bit10 (974~989) 16 981,
1748 18:35:03.363204 TX Bit3 (972~991) 20 981, Bit11 (968~984) 17 976,
1749 18:35:03.363257 TX Bit4 (978~997) 20 987, Bit12 (969~985) 17 977,
1750 18:35:03.363309 TX Bit5 (976~991) 16 983, Bit13 (968~984) 17 976,
1751 18:35:03.363362 TX Bit6 (976~992) 17 984, Bit14 (969~984) 16 976,
1752 18:35:03.363414 TX Bit7 (977~993) 17 985, Bit15 (972~988) 17 980,
1753 18:35:03.363466
1754 18:35:03.363518 Write Rank1 MR14 =0x4
1755 18:35:03.363570
1756 18:35:03.363621 CH=0, VrefRange= 0, VrefLevel = 4
1757 18:35:03.363673 TX Bit0 (979~999) 21 989, Bit8 (968~985) 18 976,
1758 18:35:03.363726 TX Bit1 (978~997) 20 987, Bit9 (969~985) 17 977,
1759 18:35:03.363778 TX Bit2 (978~997) 20 987, Bit10 (974~990) 17 982,
1760 18:35:03.363831 TX Bit3 (972~991) 20 981, Bit11 (968~985) 18 976,
1761 18:35:03.363883 TX Bit4 (978~997) 20 987, Bit12 (969~985) 17 977,
1762 18:35:03.363936 TX Bit5 (976~991) 16 983, Bit13 (968~984) 17 976,
1763 18:35:03.363989 TX Bit6 (976~992) 17 984, Bit14 (969~985) 17 977,
1764 18:35:03.364041 TX Bit7 (977~994) 18 985, Bit15 (972~988) 17 980,
1765 18:35:03.364094
1766 18:35:03.364146 Write Rank1 MR14 =0x6
1767 18:35:03.364198
1768 18:35:03.364249 CH=0, VrefRange= 0, VrefLevel = 6
1769 18:35:03.364301 TX Bit0 (979~999) 21 989, Bit8 (968~985) 18 976,
1770 18:35:03.364354 TX Bit1 (978~998) 21 988, Bit9 (969~986) 18 977,
1771 18:35:03.364406 TX Bit2 (978~997) 20 987, Bit10 (973~990) 18 981,
1772 18:35:03.364459 TX Bit3 (972~992) 21 982, Bit11 (968~985) 18 976,
1773 18:35:03.364511 TX Bit4 (977~998) 22 987, Bit12 (968~986) 19 977,
1774 18:35:03.364564 TX Bit5 (975~991) 17 983, Bit13 (968~984) 17 976,
1775 18:35:03.364616 TX Bit6 (975~992) 18 983, Bit14 (969~986) 18 977,
1776 18:35:03.364668 TX Bit7 (977~994) 18 985, Bit15 (971~989) 19 980,
1777 18:35:03.364720
1778 18:35:03.364772 Write Rank1 MR14 =0x8
1779 18:35:03.364824
1780 18:35:03.364876 CH=0, VrefRange= 0, VrefLevel = 8
1781 18:35:03.364928 TX Bit0 (978~999) 22 988, Bit8 (968~986) 19 977,
1782 18:35:03.364981 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1783 18:35:03.365033 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1784 18:35:03.365085 TX Bit3 (971~992) 22 981, Bit11 (968~986) 19 977,
1785 18:35:03.365137 TX Bit4 (978~998) 21 988, Bit12 (968~987) 20 977,
1786 18:35:03.365204 TX Bit5 (974~991) 18 982, Bit13 (968~985) 18 976,
1787 18:35:03.365265 TX Bit6 (975~993) 19 984, Bit14 (968~986) 19 977,
1788 18:35:03.365320 TX Bit7 (977~995) 19 986, Bit15 (970~989) 20 979,
1789 18:35:03.365372
1790 18:35:03.365424 Write Rank1 MR14 =0xa
1791 18:35:03.365476
1792 18:35:03.365528 CH=0, VrefRange= 0, VrefLevel = 10
1793 18:35:03.365581 TX Bit0 (978~1000) 23 989, Bit8 (968~987) 20 977,
1794 18:35:03.365634 TX Bit1 (978~999) 22 988, Bit9 (968~987) 20 977,
1795 18:35:03.365686 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1796 18:35:03.365739 TX Bit3 (971~993) 23 982, Bit11 (967~986) 20 976,
1797 18:35:03.365792 TX Bit4 (978~998) 21 988, Bit12 (968~987) 20 977,
1798 18:35:03.365845 TX Bit5 (974~992) 19 983, Bit13 (968~985) 18 976,
1799 18:35:03.365898 TX Bit6 (975~994) 20 984, Bit14 (968~987) 20 977,
1800 18:35:03.365950 TX Bit7 (977~996) 20 986, Bit15 (970~989) 20 979,
1801 18:35:03.366003
1802 18:35:03.366055 Write Rank1 MR14 =0xc
1803 18:35:03.366107
1804 18:35:03.366352 CH=0, VrefRange= 0, VrefLevel = 12
1805 18:35:03.366415 TX Bit0 (978~1000) 23 989, Bit8 (967~988) 22 977,
1806 18:35:03.366470 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
1807 18:35:03.366523 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
1808 18:35:03.366577 TX Bit3 (971~993) 23 982, Bit11 (967~987) 21 977,
1809 18:35:03.366630 TX Bit4 (977~999) 23 988, Bit12 (968~988) 21 978,
1810 18:35:03.366682 TX Bit5 (974~992) 19 983, Bit13 (968~986) 19 977,
1811 18:35:03.366735 TX Bit6 (974~995) 22 984, Bit14 (968~988) 21 978,
1812 18:35:03.366788 TX Bit7 (977~996) 20 986, Bit15 (970~989) 20 979,
1813 18:35:03.366841
1814 18:35:03.366893 Write Rank1 MR14 =0xe
1815 18:35:03.366945
1816 18:35:03.366997 CH=0, VrefRange= 0, VrefLevel = 14
1817 18:35:03.367050 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
1818 18:35:03.367103 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1819 18:35:03.367155 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
1820 18:35:03.367208 TX Bit3 (970~993) 24 981, Bit11 (967~988) 22 977,
1821 18:35:03.367260 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1822 18:35:03.367314 TX Bit5 (973~993) 21 983, Bit13 (968~987) 20 977,
1823 18:35:03.367366 TX Bit6 (973~995) 23 984, Bit14 (968~988) 21 978,
1824 18:35:03.367419 TX Bit7 (976~997) 22 986, Bit15 (970~990) 21 980,
1825 18:35:03.367472
1826 18:35:03.367523 Write Rank1 MR14 =0x10
1827 18:35:03.367575
1828 18:35:03.367627 CH=0, VrefRange= 0, VrefLevel = 16
1829 18:35:03.367680 TX Bit0 (978~1001) 24 989, Bit8 (967~988) 22 977,
1830 18:35:03.367732 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1831 18:35:03.367784 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
1832 18:35:03.367837 TX Bit3 (970~994) 25 982, Bit11 (967~988) 22 977,
1833 18:35:03.367889 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1834 18:35:03.367943 TX Bit5 (972~993) 22 982, Bit13 (967~987) 21 977,
1835 18:35:03.367995 TX Bit6 (973~996) 24 984, Bit14 (968~989) 22 978,
1836 18:35:03.368048 TX Bit7 (976~998) 23 987, Bit15 (970~990) 21 980,
1837 18:35:03.368100
1838 18:35:03.368152 Write Rank1 MR14 =0x12
1839 18:35:03.368205
1840 18:35:03.368256 CH=0, VrefRange= 0, VrefLevel = 18
1841 18:35:03.368308 TX Bit0 (978~1001) 24 989, Bit8 (967~989) 23 978,
1842 18:35:03.368361 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1843 18:35:03.368414 TX Bit2 (977~999) 23 988, Bit10 (970~992) 23 981,
1844 18:35:03.368466 TX Bit3 (970~994) 25 982, Bit11 (967~988) 22 977,
1845 18:35:03.368519 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1846 18:35:03.368572 TX Bit5 (972~993) 22 982, Bit13 (967~988) 22 977,
1847 18:35:03.368625 TX Bit6 (973~996) 24 984, Bit14 (967~989) 23 978,
1848 18:35:03.368677 TX Bit7 (975~998) 24 986, Bit15 (969~990) 22 979,
1849 18:35:03.368730
1850 18:35:03.368782 Write Rank1 MR14 =0x14
1851 18:35:03.368834
1852 18:35:03.368885 CH=0, VrefRange= 0, VrefLevel = 20
1853 18:35:03.368938 TX Bit0 (978~1001) 24 989, Bit8 (967~989) 23 978,
1854 18:35:03.368990 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1855 18:35:03.369042 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
1856 18:35:03.369095 TX Bit3 (970~995) 26 982, Bit11 (967~989) 23 978,
1857 18:35:03.369148 TX Bit4 (976~1000) 25 988, Bit12 (968~989) 22 978,
1858 18:35:03.369200 TX Bit5 (972~994) 23 983, Bit13 (966~988) 23 977,
1859 18:35:03.369252 TX Bit6 (972~997) 26 984, Bit14 (968~989) 22 978,
1860 18:35:03.369314 TX Bit7 (975~998) 24 986, Bit15 (969~990) 22 979,
1861 18:35:03.369367
1862 18:35:03.369419 Write Rank1 MR14 =0x16
1863 18:35:03.369471
1864 18:35:03.369522 CH=0, VrefRange= 0, VrefLevel = 22
1865 18:35:03.369575 TX Bit0 (977~1001) 25 989, Bit8 (967~989) 23 978,
1866 18:35:03.369628 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1867 18:35:03.369680 TX Bit2 (976~1000) 25 988, Bit10 (970~992) 23 981,
1868 18:35:03.369733 TX Bit3 (969~995) 27 982, Bit11 (966~989) 24 977,
1869 18:35:03.369786 TX Bit4 (976~1000) 25 988, Bit12 (967~989) 23 978,
1870 18:35:03.369839 TX Bit5 (971~994) 24 982, Bit13 (966~987) 22 976,
1871 18:35:03.369892 TX Bit6 (971~997) 27 984, Bit14 (967~989) 23 978,
1872 18:35:03.369944 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1873 18:35:03.369997
1874 18:35:03.370049 Write Rank1 MR14 =0x18
1875 18:35:03.370102
1876 18:35:03.370153 CH=0, VrefRange= 0, VrefLevel = 24
1877 18:35:03.370206 TX Bit0 (977~1001) 25 989, Bit8 (967~989) 23 978,
1878 18:35:03.370258 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1879 18:35:03.370310 TX Bit2 (976~1000) 25 988, Bit10 (970~992) 23 981,
1880 18:35:03.370362 TX Bit3 (969~995) 27 982, Bit11 (966~989) 24 977,
1881 18:35:03.370414 TX Bit4 (976~1000) 25 988, Bit12 (967~989) 23 978,
1882 18:35:03.370467 TX Bit5 (971~994) 24 982, Bit13 (966~987) 22 976,
1883 18:35:03.370520 TX Bit6 (971~997) 27 984, Bit14 (967~989) 23 978,
1884 18:35:03.370572 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1885 18:35:03.370624
1886 18:35:03.370676 Write Rank1 MR14 =0x1a
1887 18:35:03.370728
1888 18:35:03.370780 CH=0, VrefRange= 0, VrefLevel = 26
1889 18:35:03.370831 TX Bit0 (977~1001) 25 989, Bit8 (967~989) 23 978,
1890 18:35:03.370884 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1891 18:35:03.370936 TX Bit2 (976~1000) 25 988, Bit10 (970~992) 23 981,
1892 18:35:03.370988 TX Bit3 (969~995) 27 982, Bit11 (966~989) 24 977,
1893 18:35:03.371040 TX Bit4 (976~1000) 25 988, Bit12 (967~989) 23 978,
1894 18:35:03.371093 TX Bit5 (971~994) 24 982, Bit13 (966~987) 22 976,
1895 18:35:03.371145 TX Bit6 (971~997) 27 984, Bit14 (967~989) 23 978,
1896 18:35:03.371198 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1897 18:35:03.371249
1898 18:35:03.371301 Write Rank1 MR14 =0x1c
1899 18:35:03.371352
1900 18:35:03.371404 CH=0, VrefRange= 0, VrefLevel = 28
1901 18:35:03.371455 TX Bit0 (977~1001) 25 989, Bit8 (967~989) 23 978,
1902 18:35:03.371508 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1903 18:35:03.371560 TX Bit2 (976~1000) 25 988, Bit10 (970~992) 23 981,
1904 18:35:03.371804 TX Bit3 (969~995) 27 982, Bit11 (966~989) 24 977,
1905 18:35:03.371862 TX Bit4 (976~1000) 25 988, Bit12 (967~989) 23 978,
1906 18:35:03.539320 TX Bit5 (971~994) 24 982, Bit13 (966~987) 22 976,
1907 18:35:03.539995 TX Bit6 (971~997) 27 984, Bit14 (967~989) 23 978,
1908 18:35:03.540436 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1909 18:35:03.540788
1910 18:35:03.541121 Write Rank1 MR14 =0x1e
1911 18:35:03.541548
1912 18:35:03.541876 CH=0, VrefRange= 0, VrefLevel = 30
1913 18:35:03.542193 TX Bit0 (977~1001) 25 989, Bit8 (967~989) 23 978,
1914 18:35:03.542506 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1915 18:35:03.542817 TX Bit2 (976~1000) 25 988, Bit10 (970~992) 23 981,
1916 18:35:03.543141 TX Bit3 (969~995) 27 982, Bit11 (966~989) 24 977,
1917 18:35:03.543445 TX Bit4 (976~1000) 25 988, Bit12 (967~989) 23 978,
1918 18:35:03.543747 TX Bit5 (971~994) 24 982, Bit13 (966~987) 22 976,
1919 18:35:03.544047 TX Bit6 (971~997) 27 984, Bit14 (967~989) 23 978,
1920 18:35:03.544343 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1921 18:35:03.544640
1922 18:35:03.544938 Write Rank1 MR14 =0x20
1923 18:35:03.545237
1924 18:35:03.545600 CH=0, VrefRange= 0, VrefLevel = 32
1925 18:35:03.545906 TX Bit0 (977~1001) 25 989, Bit8 (967~989) 23 978,
1926 18:35:03.546213 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1927 18:35:03.546513 TX Bit2 (976~1000) 25 988, Bit10 (970~992) 23 981,
1928 18:35:03.546810 TX Bit3 (969~995) 27 982, Bit11 (966~989) 24 977,
1929 18:35:03.547110 TX Bit4 (976~1000) 25 988, Bit12 (967~989) 23 978,
1930 18:35:03.547410 TX Bit5 (971~994) 24 982, Bit13 (966~987) 22 976,
1931 18:35:03.547711 TX Bit6 (971~997) 27 984, Bit14 (967~989) 23 978,
1932 18:35:03.548011 TX Bit7 (975~999) 25 987, Bit15 (969~990) 22 979,
1933 18:35:03.548311
1934 18:35:03.548608
1935 18:35:03.548903 TX Vref found, early break! 358< 366
1936 18:35:03.549204 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1937 18:35:03.549756 u1DelayCellOfst[0]=8 cells (7 PI)
1938 18:35:03.550161 u1DelayCellOfst[1]=7 cells (6 PI)
1939 18:35:03.550459 u1DelayCellOfst[2]=7 cells (6 PI)
1940 18:35:03.550732 u1DelayCellOfst[3]=0 cells (0 PI)
1941 18:35:03.551001 u1DelayCellOfst[4]=7 cells (6 PI)
1942 18:35:03.551339 u1DelayCellOfst[5]=0 cells (0 PI)
1943 18:35:03.551841 u1DelayCellOfst[6]=2 cells (2 PI)
1944 18:35:03.552171 u1DelayCellOfst[7]=6 cells (5 PI)
1945 18:35:03.552476 Byte0, DQ PI dly=982, DQM PI dly= 985
1946 18:35:03.552778 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1947 18:35:03.553082
1948 18:35:03.553464 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1949 18:35:03.553753
1950 18:35:03.554024 u1DelayCellOfst[8]=2 cells (2 PI)
1951 18:35:03.554298 u1DelayCellOfst[9]=2 cells (2 PI)
1952 18:35:03.554571 u1DelayCellOfst[10]=6 cells (5 PI)
1953 18:35:03.554843 u1DelayCellOfst[11]=1 cells (1 PI)
1954 18:35:03.555117 u1DelayCellOfst[12]=2 cells (2 PI)
1955 18:35:03.555385 u1DelayCellOfst[13]=0 cells (0 PI)
1956 18:35:03.555658 u1DelayCellOfst[14]=2 cells (2 PI)
1957 18:35:03.555930 u1DelayCellOfst[15]=3 cells (3 PI)
1958 18:35:03.556200 Byte1, DQ PI dly=976, DQM PI dly= 978
1959 18:35:03.556471 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1960 18:35:03.556744
1961 18:35:03.557013 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1962 18:35:03.557330
1963 18:35:03.557765 Write Rank1 MR14 =0x16
1964 18:35:03.558059
1965 18:35:03.558333 Final TX Range 0 Vref 22
1966 18:35:03.558609
1967 18:35:03.558877 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1968 18:35:03.559167
1969 18:35:03.559473 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1970 18:35:03.559754 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1971 18:35:03.560032 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1972 18:35:03.560309 Write Rank1 MR3 =0xb0
1973 18:35:03.560581 DramC Write-DBI on
1974 18:35:03.560852 ==
1975 18:35:03.561125 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1976 18:35:03.561495 fsp= 1, odt_onoff= 1, Byte mode= 0
1977 18:35:03.561781 ==
1978 18:35:03.562053 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1979 18:35:03.562326
1980 18:35:03.562591 Begin, DQ Scan Range 698~762
1981 18:35:03.562864
1982 18:35:03.563135
1983 18:35:03.563431 TX Vref Scan disable
1984 18:35:03.563881 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1985 18:35:03.564189 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1986 18:35:03.564476 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1987 18:35:03.564757 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1988 18:35:03.565037 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1989 18:35:03.565351 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1990 18:35:03.565636 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1991 18:35:03.565976 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1992 18:35:03.566267 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1993 18:35:03.566548 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1994 18:35:03.566829 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1995 18:35:03.567107 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1996 18:35:03.567346 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1997 18:35:03.567542 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1998 18:35:03.567739 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1999 18:35:03.567936 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2000 18:35:03.568133 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2001 18:35:03.568329 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2002 18:35:03.568529 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2003 18:35:03.568727 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
2004 18:35:03.568926 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2005 18:35:03.569126 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2006 18:35:03.569352 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2007 18:35:03.569555 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2008 18:35:03.569755 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2009 18:35:03.569956 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2010 18:35:03.570156 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2011 18:35:03.570354 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2012 18:35:03.570554 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2013 18:35:03.570754 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2014 18:35:03.570956 Byte0, DQ PI dly=730, DQM PI dly= 730
2015 18:35:03.571478 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2016 18:35:03.571708
2017 18:35:03.571908 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2018 18:35:03.572111
2019 18:35:03.572293 Byte1, DQ PI dly=720, DQM PI dly= 720
2020 18:35:03.572443 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2021 18:35:03.572594
2022 18:35:03.572744 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2023 18:35:03.572895
2024 18:35:03.573042 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2025 18:35:03.573193 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2026 18:35:03.573395 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2027 18:35:03.573549 Write Rank1 MR3 =0x30
2028 18:35:03.573697 DramC Write-DBI off
2029 18:35:03.573845
2030 18:35:03.573992 [DATLAT]
2031 18:35:03.574141 Freq=1600, CH0 RK1, use_rxtx_scan=0
2032 18:35:03.574289
2033 18:35:03.574435 DATLAT Default: 0x10
2034 18:35:03.574582 7, 0xFFFF, sum=0
2035 18:35:03.574732 8, 0xFFFF, sum=0
2036 18:35:03.574882 9, 0xFFFF, sum=0
2037 18:35:03.575031 10, 0xFFFF, sum=0
2038 18:35:03.575178 11, 0xFFFF, sum=0
2039 18:35:03.575328 12, 0xFFFF, sum=0
2040 18:35:03.575476 13, 0xFFFF, sum=0
2041 18:35:03.575625 14, 0x0, sum=1
2042 18:35:03.575775 15, 0x0, sum=2
2043 18:35:03.575924 16, 0x0, sum=3
2044 18:35:03.576073 17, 0x0, sum=4
2045 18:35:03.576220 pattern=2 first_step=14 total pass=5 best_step=16
2046 18:35:03.576369 ==
2047 18:35:03.576515 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2048 18:35:03.576665 fsp= 1, odt_onoff= 1, Byte mode= 0
2049 18:35:03.576811 ==
2050 18:35:03.576955 Start DQ dly to find pass range UseTestEngine =1
2051 18:35:03.577104 x-axis: bit #, y-axis: DQ dly (-127~63)
2052 18:35:03.577255 RX Vref Scan = 0
2053 18:35:03.577404 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2054 18:35:03.577527 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2055 18:35:03.577649 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2056 18:35:03.577772 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2057 18:35:03.577891 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2058 18:35:03.578011 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2059 18:35:03.578131 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2060 18:35:03.578251 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2061 18:35:03.578371 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2062 18:35:03.578492 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2063 18:35:03.578660 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2064 18:35:03.578854 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2065 18:35:03.578982 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2066 18:35:03.579106 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2067 18:35:03.579227 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2068 18:35:03.579348 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2069 18:35:03.579468 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2070 18:35:03.579588 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2071 18:35:03.579709 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2072 18:35:03.579831 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2073 18:35:03.579951 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2074 18:35:03.580072 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2075 18:35:03.580192 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2076 18:35:03.580312 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2077 18:35:03.580438 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2078 18:35:03.580558 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2079 18:35:03.580677 0, [0] xxxoxxxx oxxxxoxx [MSB]
2080 18:35:03.580797 1, [0] xxxoxoxx ooxoooox [MSB]
2081 18:35:03.580918 2, [0] xxxoxooo ooxoooox [MSB]
2082 18:35:03.581038 3, [0] xxxoxooo ooxooooo [MSB]
2083 18:35:03.581159 4, [0] xxxoxooo ooxooooo [MSB]
2084 18:35:03.581304 5, [0] xxxooooo ooxooooo [MSB]
2085 18:35:03.581431 6, [0] xxxooooo oooooooo [MSB]
2086 18:35:03.581553 7, [0] xooooooo oooooooo [MSB]
2087 18:35:03.581673 8, [0] xooooooo oooooooo [MSB]
2088 18:35:03.581792 34, [0] oooxoooo oooxoooo [MSB]
2089 18:35:03.581912 35, [0] oooxoxoo oooxoxoo [MSB]
2090 18:35:03.582033 36, [0] oooxoxxo oooxoxoo [MSB]
2091 18:35:03.582153 37, [0] oooxoxxx xooxxxxo [MSB]
2092 18:35:03.582280 38, [0] oooxoxxx xxoxxxxo [MSB]
2093 18:35:03.582380 39, [0] oooxoxxx xxoxxxxx [MSB]
2094 18:35:03.582482 40, [0] oooxoxxx xxoxxxxx [MSB]
2095 18:35:03.582582 41, [0] oooxoxxx xxoxxxxx [MSB]
2096 18:35:03.582681 42, [0] oooxxxxx xxxxxxxx [MSB]
2097 18:35:03.582782 43, [0] oxxxxxxx xxxxxxxx [MSB]
2098 18:35:03.582883 44, [0] xxxxxxxx xxxxxxxx [MSB]
2099 18:35:03.582983 iDelay=44, Bit 0, Center 26 (9 ~ 43) 35
2100 18:35:03.583082 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36
2101 18:35:03.583181 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
2102 18:35:03.583281 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2103 18:35:03.583380 iDelay=44, Bit 4, Center 23 (5 ~ 41) 37
2104 18:35:03.583479 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2105 18:35:03.583576 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34
2106 18:35:03.583676 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
2107 18:35:03.583773 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
2108 18:35:03.583871 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
2109 18:35:03.583968 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36
2110 18:35:03.584068 iDelay=44, Bit 11, Center 17 (1 ~ 33) 33
2111 18:35:03.584167 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
2112 18:35:03.584265 iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36
2113 18:35:03.584364 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36
2114 18:35:03.584463 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
2115 18:35:03.584561 ==
2116 18:35:03.584659 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2117 18:35:03.584758 fsp= 1, odt_onoff= 1, Byte mode= 0
2118 18:35:03.584858 ==
2119 18:35:03.584955 DQS Delay:
2120 18:35:03.585054 DQS0 = 0, DQS1 = 0
2121 18:35:03.585151 DQM Delay:
2122 18:35:03.585249 DQM0 = 20, DQM1 = 18
2123 18:35:03.585376 DQ Delay:
2124 18:35:03.585477 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
2125 18:35:03.585575 DQ4 =23, DQ5 =17, DQ6 =18, DQ7 =19
2126 18:35:03.585674 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2127 18:35:03.585773 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20
2128 18:35:03.585872
2129 18:35:03.585969
2130 18:35:03.586067
2131 18:35:03.586165 [DramC_TX_OE_Calibration] TA2
2132 18:35:03.586264 Original DQ_B0 (3 6) =30, OEN = 27
2133 18:35:03.586364 Original DQ_B1 (3 6) =30, OEN = 27
2134 18:35:03.586462 23, 0x0, End_B0=23 End_B1=23
2135 18:35:03.586563 24, 0x0, End_B0=24 End_B1=24
2136 18:35:03.586664 25, 0x0, End_B0=25 End_B1=25
2137 18:35:03.586764 26, 0x0, End_B0=26 End_B1=26
2138 18:35:03.586863 27, 0x0, End_B0=27 End_B1=27
2139 18:35:03.586964 28, 0x0, End_B0=28 End_B1=28
2140 18:35:03.587064 29, 0x0, End_B0=29 End_B1=29
2141 18:35:03.587164 30, 0x0, End_B0=30 End_B1=30
2142 18:35:03.587271 31, 0xFFFF, End_B0=30 End_B1=30
2143 18:35:03.587358 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2144 18:35:03.587444 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2145 18:35:03.587529
2146 18:35:03.587613
2147 18:35:03.587915 Write Rank1 MR23 =0x3f
2148 18:35:03.588012 [DQSOSC]
2149 18:35:03.588100 [DQSOSCAuto] RK1, (LSB)MR18= 0x7d, (MSB)MR19= 0x3, tDQSOscB0 = 352 ps tDQSOscB1 = 0 ps
2150 18:35:03.588188 CH0_RK1: MR19=0x3, MR18=0x7D, DQSOSC=352, MR23=63, INC=19, DEC=29
2151 18:35:03.588274 Write Rank1 MR23 =0x3f
2152 18:35:03.588360 [DQSOSC]
2153 18:35:03.588446 [DQSOSCAuto] RK1, (LSB)MR18= 0x7b, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2154 18:35:03.588533 CH0 RK1: MR19=3, MR18=7B
2155 18:35:03.588618 [RxdqsGatingPostProcess] freq 1600
2156 18:35:03.588704 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2157 18:35:03.588789 Rank: 0
2158 18:35:03.588874 best DQS0 dly(2T, 0.5T) = (2, 5)
2159 18:35:03.588959 best DQS1 dly(2T, 0.5T) = (2, 5)
2160 18:35:03.589044 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2161 18:35:03.589128 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2162 18:35:03.589213 Rank: 1
2163 18:35:03.589325 best DQS0 dly(2T, 0.5T) = (2, 6)
2164 18:35:03.589414 best DQS1 dly(2T, 0.5T) = (2, 6)
2165 18:35:03.589499 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2166 18:35:03.589585 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2167 18:35:03.589670 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2168 18:35:03.589757 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2169 18:35:03.589842 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2170 18:35:03.589928 Write Rank0 MR13 =0x59
2171 18:35:03.590019 ==
2172 18:35:03.592856 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2173 18:35:03.596318 fsp= 1, odt_onoff= 1, Byte mode= 0
2174 18:35:03.596625 ==
2175 18:35:03.599484 === u2Vref_new: 0x56 --> 0x3a
2176 18:35:03.602865 === u2Vref_new: 0x58 --> 0x58
2177 18:35:03.603117 === u2Vref_new: 0x5a --> 0x5a
2178 18:35:03.606429 === u2Vref_new: 0x5c --> 0x78
2179 18:35:03.609640 === u2Vref_new: 0x5e --> 0x7a
2180 18:35:03.613381 === u2Vref_new: 0x60 --> 0x90
2181 18:35:03.616681 [CA 0] Center 36 (9~63) winsize 55
2182 18:35:03.619956 [CA 1] Center 35 (7~63) winsize 57
2183 18:35:03.623854 [CA 2] Center 32 (3~61) winsize 59
2184 18:35:03.626789 [CA 3] Center 32 (3~62) winsize 60
2185 18:35:03.630053 [CA 4] Center 33 (4~63) winsize 60
2186 18:35:03.634069 [CA 5] Center 26 (-1~53) winsize 55
2187 18:35:03.634583
2188 18:35:03.637353 [CATrainingPosCal] consider 1 rank data
2189 18:35:03.640213 u2DelayCellTimex100 = 762/100 ps
2190 18:35:03.643776 CA0 delay=36 (9~63),Diff = 10 PI (12 cell)
2191 18:35:03.647211 CA1 delay=35 (7~63),Diff = 9 PI (11 cell)
2192 18:35:03.650188 CA2 delay=32 (3~61),Diff = 6 PI (7 cell)
2193 18:35:03.653546 CA3 delay=32 (3~62),Diff = 6 PI (7 cell)
2194 18:35:03.656722 CA4 delay=33 (4~63),Diff = 7 PI (8 cell)
2195 18:35:03.659957 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2196 18:35:03.664224
2197 18:35:03.667743 CA PerBit enable=1, Macro0, CA PI delay=26
2198 18:35:03.668257 === u2Vref_new: 0x56 --> 0x3a
2199 18:35:03.670382
2200 18:35:03.670801 Vref(ca) range 1: 22
2201 18:35:03.671134
2202 18:35:03.673410 CS Dly= 10 (41-0-32)
2203 18:35:03.673833 Write Rank0 MR13 =0xd8
2204 18:35:03.676908 Write Rank0 MR13 =0xd8
2205 18:35:03.680326 Write Rank0 MR12 =0x56
2206 18:35:03.680751 Write Rank1 MR13 =0x59
2207 18:35:03.681090 ==
2208 18:35:03.687385 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2209 18:35:03.690388 fsp= 1, odt_onoff= 1, Byte mode= 0
2210 18:35:03.690813 ==
2211 18:35:03.693961 === u2Vref_new: 0x56 --> 0x3a
2212 18:35:03.696724 === u2Vref_new: 0x58 --> 0x58
2213 18:35:03.697151 === u2Vref_new: 0x5a --> 0x5a
2214 18:35:03.700710 === u2Vref_new: 0x5c --> 0x78
2215 18:35:03.704133 === u2Vref_new: 0x5e --> 0x7a
2216 18:35:03.707532 === u2Vref_new: 0x60 --> 0x90
2217 18:35:03.711406 [CA 0] Center 36 (10~63) winsize 54
2218 18:35:03.713931 [CA 1] Center 35 (7~63) winsize 57
2219 18:35:03.717725 [CA 2] Center 33 (3~63) winsize 61
2220 18:35:03.720538 [CA 3] Center 33 (3~63) winsize 61
2221 18:35:03.723955 [CA 4] Center 33 (4~63) winsize 60
2222 18:35:03.727221 [CA 5] Center 26 (-1~53) winsize 55
2223 18:35:03.727643
2224 18:35:03.730973 [CATrainingPosCal] consider 2 rank data
2225 18:35:03.734228 u2DelayCellTimex100 = 762/100 ps
2226 18:35:03.737724 CA0 delay=36 (10~63),Diff = 10 PI (12 cell)
2227 18:35:03.740875 CA1 delay=35 (7~63),Diff = 9 PI (11 cell)
2228 18:35:03.743984 CA2 delay=32 (3~61),Diff = 6 PI (7 cell)
2229 18:35:03.747505 CA3 delay=32 (3~62),Diff = 6 PI (7 cell)
2230 18:35:03.751209 CA4 delay=33 (4~63),Diff = 7 PI (8 cell)
2231 18:35:03.754641 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2232 18:35:03.757583
2233 18:35:03.761072 CA PerBit enable=1, Macro0, CA PI delay=26
2234 18:35:03.761684 === u2Vref_new: 0x58 --> 0x58
2235 18:35:03.762025
2236 18:35:03.764936 Vref(ca) range 1: 24
2237 18:35:03.765505
2238 18:35:03.767645 CS Dly= 11 (42-0-32)
2239 18:35:03.768191 Write Rank1 MR13 =0xd8
2240 18:35:03.770735 Write Rank1 MR13 =0xd8
2241 18:35:03.773945 Write Rank1 MR12 =0x58
2242 18:35:03.777869 [RankSwap] Rank num 2, (Multi 1), Rank 0
2243 18:35:03.778327 Write Rank0 MR2 =0xad
2244 18:35:03.781360 [Write Leveling]
2245 18:35:03.784553 delay byte0 byte1 byte2 byte3
2246 18:35:03.784993
2247 18:35:03.785521 10 0 0
2248 18:35:03.785946 11 0 0
2249 18:35:03.787700 12 0 0
2250 18:35:03.788144 13 0 0
2251 18:35:03.790871 14 0 0
2252 18:35:03.791314 15 0 0
2253 18:35:03.794661 16 0 0
2254 18:35:03.795106 17 0 0
2255 18:35:03.795549 18 0 0
2256 18:35:03.797640 19 0 0
2257 18:35:03.798081 20 0 0
2258 18:35:03.800821 21 0 0
2259 18:35:03.801280 22 0 0
2260 18:35:03.801726 23 0 0
2261 18:35:03.804230 24 0 0
2262 18:35:03.804755 25 0 0
2263 18:35:03.807850 26 0 0
2264 18:35:03.808285 27 0 0
2265 18:35:03.808626 28 0 0
2266 18:35:03.811063 29 0 0
2267 18:35:03.811492 30 0 0
2268 18:35:03.814358 31 0 ff
2269 18:35:03.814784 32 0 ff
2270 18:35:03.817644 33 0 ff
2271 18:35:03.818074 34 0 ff
2272 18:35:03.818416 35 0 ff
2273 18:35:03.821221 36 0 ff
2274 18:35:03.821684 37 ff ff
2275 18:35:03.824425 38 ff ff
2276 18:35:03.824856 39 ff ff
2277 18:35:03.828296 40 ff ff
2278 18:35:03.828724 41 ff ff
2279 18:35:03.830808 42 ff ff
2280 18:35:03.831237 43 ff ff
2281 18:35:03.834346 pass bytecount = 0xff (0xff: all bytes pass)
2282 18:35:03.834771
2283 18:35:03.837861 DQS0 dly: 37
2284 18:35:03.838284 DQS1 dly: 31
2285 18:35:03.841083 Write Rank0 MR2 =0x2d
2286 18:35:03.844679 [RankSwap] Rank num 2, (Multi 1), Rank 0
2287 18:35:03.845101 Write Rank0 MR1 =0xd6
2288 18:35:03.848071 [Gating]
2289 18:35:03.848694 ==
2290 18:35:03.851421 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2291 18:35:03.854700 fsp= 1, odt_onoff= 1, Byte mode= 0
2292 18:35:03.855122 ==
2293 18:35:03.861328 3 1 0 |504 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2294 18:35:03.864531 3 1 4 |e0d 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2295 18:35:03.867972 3 1 8 |3231 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2296 18:35:03.871471 3 1 12 |908 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2297 18:35:03.878148 3 1 16 |2f2e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2298 18:35:03.881648 3 1 20 |302f 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2299 18:35:03.884615 3 1 24 |3131 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2300 18:35:03.891198 3 1 28 |504 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2301 18:35:03.894423 3 2 0 |3837 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2302 18:35:03.898218 3 2 4 |1b1a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2303 18:35:03.901632 3 2 8 |3a39 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2304 18:35:03.908445 3 2 12 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2305 18:35:03.911507 3 2 16 |1a19 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2306 18:35:03.914729 [Byte 0] Lead/lag Transition tap number (1)
2307 18:35:03.918298 3 2 20 |3b3a 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2308 18:35:03.924816 3 2 24 |707 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2309 18:35:03.928096 3 2 28 |2c2b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2310 18:35:03.931751 3 3 0 |2c2b 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2311 18:35:03.938323 3 3 4 |3534 100f |(11 11)(11 11) |(0 1)(1 1)| 0
2312 18:35:03.941967 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2313 18:35:03.945304 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2314 18:35:03.951953 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2315 18:35:03.955366 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2316 18:35:03.958448 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2317 18:35:03.961424 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2318 18:35:03.968564 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2319 18:35:03.972311 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2320 18:35:03.975242 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2321 18:35:03.981613 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2322 18:35:03.985180 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2323 18:35:03.988640 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2324 18:35:03.995039 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2325 18:35:03.998992 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2326 18:35:04.001679 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2327 18:35:04.005443 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2328 18:35:04.012359 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2329 18:35:04.015289 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2330 18:35:04.018905 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2331 18:35:04.025693 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2332 18:35:04.028812 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2333 18:35:04.032258 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2334 18:35:04.035398 [Byte 0] Lead/lag Transition tap number (2)
2335 18:35:04.042372 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2336 18:35:04.045405 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2337 18:35:04.048482 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2338 18:35:04.052228 [Byte 1] Lead/lag Transition tap number (2)
2339 18:35:04.058941 3 6 0 |4646 909 |(0 0)(11 11) |(0 0)(0 0)| 0
2340 18:35:04.059490 [Byte 0]First pass (3, 6, 0)
2341 18:35:04.065711 3 6 4 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2342 18:35:04.068456 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2343 18:35:04.071953 [Byte 1]First pass (3, 6, 8)
2344 18:35:04.075539 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2345 18:35:04.078457 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2346 18:35:04.081790 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2347 18:35:04.085188 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2348 18:35:04.092184 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2349 18:35:04.095169 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2350 18:35:04.098701 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2351 18:35:04.101943 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2352 18:35:04.104965 All bytes gating window > 1UI, Early break!
2353 18:35:04.105417
2354 18:35:04.112207 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2355 18:35:04.112762
2356 18:35:04.115880 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2357 18:35:04.116446
2358 18:35:04.116815
2359 18:35:04.117154
2360 18:35:04.118879 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2361 18:35:04.119461
2362 18:35:04.122488 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2363 18:35:04.123051
2364 18:35:04.123417
2365 18:35:04.125441 Write Rank0 MR1 =0x56
2366 18:35:04.125903
2367 18:35:04.128754 best RODT dly(2T, 0.5T) = (2, 2)
2368 18:35:04.129367
2369 18:35:04.132215 best RODT dly(2T, 0.5T) = (2, 2)
2370 18:35:04.132774 ==
2371 18:35:04.135463 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2372 18:35:04.138592 fsp= 1, odt_onoff= 1, Byte mode= 0
2373 18:35:04.139060 ==
2374 18:35:04.145676 Start DQ dly to find pass range UseTestEngine =0
2375 18:35:04.149035 x-axis: bit #, y-axis: DQ dly (-127~63)
2376 18:35:04.149654 RX Vref Scan = 0
2377 18:35:04.152564 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2378 18:35:04.155759 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2379 18:35:04.158945 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2380 18:35:04.161898 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2381 18:35:04.165596 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2382 18:35:04.166167 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2383 18:35:04.168720 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2384 18:35:04.172241 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2385 18:35:04.175696 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2386 18:35:04.178993 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2387 18:35:04.182085 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2388 18:35:04.185807 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2389 18:35:04.188459 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2390 18:35:04.192006 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2391 18:35:04.192638 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2392 18:35:04.195380 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2393 18:35:04.198879 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2394 18:35:04.201779 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2395 18:35:04.205395 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2396 18:35:04.208691 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2397 18:35:04.211778 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2398 18:35:04.215148 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2399 18:35:04.215762 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2400 18:35:04.218444 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2401 18:35:04.221727 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2402 18:35:04.224965 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2403 18:35:04.228598 0, [0] xxxoxxxx xxxxxxxx [MSB]
2404 18:35:04.231784 1, [0] xxxoxxxx xxxxxxxo [MSB]
2405 18:35:04.232351 2, [0] xxooxxxo xxxxxxxo [MSB]
2406 18:35:04.234595 3, [0] xxooxxxo xxxxxxxo [MSB]
2407 18:35:04.238013 4, [0] xxoooxxo oooxooxo [MSB]
2408 18:35:04.241882 5, [0] xxoooxxo oooooooo [MSB]
2409 18:35:04.245092 6, [0] xooooxxo oooooooo [MSB]
2410 18:35:04.247971 7, [0] xoooooxo oooooooo [MSB]
2411 18:35:04.248435 8, [0] ooooooxo oooooooo [MSB]
2412 18:35:04.251466 32, [0] ooxxoooo oooooooo [MSB]
2413 18:35:04.255460 33, [0] ooxxoooo ooooooox [MSB]
2414 18:35:04.258902 34, [0] ooxxoooo ooooooox [MSB]
2415 18:35:04.261666 35, [0] ooxxxooo ooxoooox [MSB]
2416 18:35:04.265301 36, [0] ooxxxooo xoxoooox [MSB]
2417 18:35:04.267800 37, [0] ooxxxoox xxxxoxxx [MSB]
2418 18:35:04.268223 38, [0] ooxxxoox xxxxoxxx [MSB]
2419 18:35:04.271261 39, [0] ooxxxoox xxxxxxxx [MSB]
2420 18:35:04.274601 40, [0] oxxxxoox xxxxxxxx [MSB]
2421 18:35:04.277799 41, [0] xxxxxxxx xxxxxxxx [MSB]
2422 18:35:04.281500 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2423 18:35:04.284859 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2424 18:35:04.288105 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2425 18:35:04.291651 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2426 18:35:04.294696 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2427 18:35:04.298589 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2428 18:35:04.301382 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2429 18:35:04.305002 iDelay=41, Bit 7, Center 19 (2 ~ 36) 35
2430 18:35:04.311815 iDelay=41, Bit 8, Center 19 (4 ~ 35) 32
2431 18:35:04.314658 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2432 18:35:04.317939 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2433 18:35:04.321904 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2434 18:35:04.325058 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2435 18:35:04.328728 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2436 18:35:04.331937 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2437 18:35:04.334476 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2438 18:35:04.334939 ==
2439 18:35:04.341614 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2440 18:35:04.344547 fsp= 1, odt_onoff= 1, Byte mode= 0
2441 18:35:04.345009 ==
2442 18:35:04.345470 DQS Delay:
2443 18:35:04.348310 DQS0 = 0, DQS1 = 0
2444 18:35:04.348728 DQM Delay:
2445 18:35:04.349058 DQM0 = 20, DQM1 = 19
2446 18:35:04.351164 DQ Delay:
2447 18:35:04.355006 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2448 18:35:04.358220 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2449 18:35:04.361795 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
2450 18:35:04.364899 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2451 18:35:04.365461
2452 18:35:04.365812
2453 18:35:04.366284 DramC Write-DBI off
2454 18:35:04.366667 ==
2455 18:35:04.371765 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2456 18:35:04.374964 fsp= 1, odt_onoff= 1, Byte mode= 0
2457 18:35:04.375477 ==
2458 18:35:04.378120 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2459 18:35:04.378630
2460 18:35:04.381598 Begin, DQ Scan Range 927~1183
2461 18:35:04.382110
2462 18:35:04.382526
2463 18:35:04.384669 TX Vref Scan disable
2464 18:35:04.388733 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2465 18:35:04.391716 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2466 18:35:04.394404 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2467 18:35:04.398146 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2468 18:35:04.401394 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2469 18:35:04.404876 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2470 18:35:04.408464 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2471 18:35:04.411372 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2472 18:35:04.414991 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2473 18:35:04.417628 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2474 18:35:04.421158 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2475 18:35:04.424408 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2476 18:35:04.431354 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2477 18:35:04.434759 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2478 18:35:04.437985 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2479 18:35:04.441326 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2480 18:35:04.444624 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2481 18:35:04.447748 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2482 18:35:04.450990 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2483 18:35:04.454575 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2484 18:35:04.457987 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2485 18:35:04.461675 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2486 18:35:04.464384 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2487 18:35:04.468181 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2488 18:35:04.471168 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2489 18:35:04.474902 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2490 18:35:04.477721 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2491 18:35:04.481462 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2492 18:35:04.488349 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2493 18:35:04.490930 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2494 18:35:04.494519 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2495 18:35:04.498102 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2496 18:35:04.501249 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2497 18:35:04.505005 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2498 18:35:04.508097 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2499 18:35:04.511267 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2500 18:35:04.514512 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2501 18:35:04.517639 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2502 18:35:04.521472 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2503 18:35:04.524640 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2504 18:35:04.527677 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
2505 18:35:04.531147 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2506 18:35:04.534647 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2507 18:35:04.538015 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2508 18:35:04.541693 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2509 18:35:04.544309 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2510 18:35:04.548058 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2511 18:35:04.550878 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2512 18:35:04.554525 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2513 18:35:04.561400 976 |3 6 16|[0] xxooxxxx oooooooo [MSB]
2514 18:35:04.564516 977 |3 6 17|[0] xoooooxo oooooooo [MSB]
2515 18:35:04.567577 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2516 18:35:04.571232 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2517 18:35:04.574718 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2518 18:35:04.577921 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2519 18:35:04.581012 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2520 18:35:04.584077 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2521 18:35:04.590728 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2522 18:35:04.594106 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
2523 18:35:04.597389 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
2524 18:35:04.601490 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
2525 18:35:04.604882 999 |3 6 39|[0] xoxxxxxx xxxxxxxx [MSB]
2526 18:35:04.607858 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2527 18:35:04.611449 Byte0, DQ PI dly=986, DQM PI dly= 986
2528 18:35:04.614136 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2529 18:35:04.614695
2530 18:35:04.621072 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2531 18:35:04.621716
2532 18:35:04.624598 Byte1, DQ PI dly=978, DQM PI dly= 978
2533 18:35:04.627651 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2534 18:35:04.628210
2535 18:35:04.631096 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2536 18:35:04.631705
2537 18:35:04.632113 ==
2538 18:35:04.637630 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2539 18:35:04.641108 fsp= 1, odt_onoff= 1, Byte mode= 0
2540 18:35:04.641642 ==
2541 18:35:04.644898 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2542 18:35:04.645533
2543 18:35:04.647871 Begin, DQ Scan Range 954~1018
2544 18:35:04.650525 Write Rank0 MR14 =0x0
2545 18:35:04.658528
2546 18:35:04.659085 CH=1, VrefRange= 0, VrefLevel = 0
2547 18:35:04.665484 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
2548 18:35:04.668421 TX Bit1 (978~997) 20 987, Bit9 (969~985) 17 977,
2549 18:35:04.675705 TX Bit2 (977~992) 16 984, Bit10 (970~985) 16 977,
2550 18:35:04.679014 TX Bit3 (976~991) 16 983, Bit11 (971~987) 17 979,
2551 18:35:04.681935 TX Bit4 (978~994) 17 986, Bit12 (970~987) 18 978,
2552 18:35:04.688387 TX Bit5 (978~998) 21 988, Bit13 (973~987) 15 980,
2553 18:35:04.691730 TX Bit6 (981~998) 18 989, Bit14 (971~986) 16 978,
2554 18:35:04.695533 TX Bit7 (978~993) 16 985, Bit15 (967~985) 19 976,
2555 18:35:04.696091
2556 18:35:04.698273 Write Rank0 MR14 =0x2
2557 18:35:04.708066
2558 18:35:04.711130 CH=1, VrefRange= 0, VrefLevel = 2
2559 18:35:04.714281 TX Bit0 (979~999) 21 989, Bit8 (969~985) 17 977,
2560 18:35:04.717849 TX Bit1 (978~998) 21 988, Bit9 (968~985) 18 976,
2561 18:35:04.724589 TX Bit2 (977~993) 17 985, Bit10 (970~986) 17 978,
2562 18:35:04.727593 TX Bit3 (976~991) 16 983, Bit11 (971~988) 18 979,
2563 18:35:04.731055 TX Bit4 (977~995) 19 986, Bit12 (970~989) 20 979,
2564 18:35:04.737483 TX Bit5 (978~998) 21 988, Bit13 (972~988) 17 980,
2565 18:35:04.740886 TX Bit6 (980~998) 19 989, Bit14 (970~986) 17 978,
2566 18:35:04.744299 TX Bit7 (978~993) 16 985, Bit15 (967~985) 19 976,
2567 18:35:04.744856
2568 18:35:04.747737 Write Rank0 MR14 =0x4
2569 18:35:04.757068
2570 18:35:04.757669 CH=1, VrefRange= 0, VrefLevel = 4
2571 18:35:04.763338 TX Bit0 (979~999) 21 989, Bit8 (968~986) 19 977,
2572 18:35:04.766515 TX Bit1 (978~998) 21 988, Bit9 (969~986) 18 977,
2573 18:35:04.773464 TX Bit2 (977~993) 17 985, Bit10 (969~986) 18 977,
2574 18:35:04.777213 TX Bit3 (975~991) 17 983, Bit11 (971~989) 19 980,
2575 18:35:04.780149 TX Bit4 (978~995) 18 986, Bit12 (970~989) 20 979,
2576 18:35:04.786753 TX Bit5 (978~999) 22 988, Bit13 (972~989) 18 980,
2577 18:35:04.789809 TX Bit6 (979~999) 21 989, Bit14 (970~987) 18 978,
2578 18:35:04.793113 TX Bit7 (977~994) 18 985, Bit15 (967~985) 19 976,
2579 18:35:04.793736
2580 18:35:04.796787 Write Rank0 MR14 =0x6
2581 18:35:04.805777
2582 18:35:04.806436 CH=1, VrefRange= 0, VrefLevel = 6
2583 18:35:04.812447 TX Bit0 (979~999) 21 989, Bit8 (968~986) 19 977,
2584 18:35:04.815830 TX Bit1 (977~998) 22 987, Bit9 (968~986) 19 977,
2585 18:35:04.822243 TX Bit2 (977~994) 18 985, Bit10 (969~987) 19 978,
2586 18:35:04.825821 TX Bit3 (975~992) 18 983, Bit11 (970~990) 21 980,
2587 18:35:04.828840 TX Bit4 (977~996) 20 986, Bit12 (970~990) 21 980,
2588 18:35:04.836047 TX Bit5 (978~999) 22 988, Bit13 (970~990) 21 980,
2589 18:35:04.839074 TX Bit6 (979~999) 21 989, Bit14 (970~988) 19 979,
2590 18:35:04.842266 TX Bit7 (977~994) 18 985, Bit15 (966~986) 21 976,
2591 18:35:04.842736
2592 18:35:04.845805 Write Rank0 MR14 =0x8
2593 18:35:04.855210
2594 18:35:04.855762 CH=1, VrefRange= 0, VrefLevel = 8
2595 18:35:04.861136 TX Bit0 (978~999) 22 988, Bit8 (968~987) 20 977,
2596 18:35:04.864985 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
2597 18:35:04.871294 TX Bit2 (976~994) 19 985, Bit10 (969~988) 20 978,
2598 18:35:04.874728 TX Bit3 (975~992) 18 983, Bit11 (971~990) 20 980,
2599 18:35:04.878356 TX Bit4 (977~997) 21 987, Bit12 (969~990) 22 979,
2600 18:35:04.884557 TX Bit5 (978~999) 22 988, Bit13 (970~990) 21 980,
2601 18:35:04.887997 TX Bit6 (979~999) 21 989, Bit14 (970~988) 19 979,
2602 18:35:04.891493 TX Bit7 (977~995) 19 986, Bit15 (966~986) 21 976,
2603 18:35:04.892055
2604 18:35:04.894486 Write Rank0 MR14 =0xa
2605 18:35:04.904705
2606 18:35:04.907406 CH=1, VrefRange= 0, VrefLevel = 10
2607 18:35:04.910689 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
2608 18:35:04.913752 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
2609 18:35:04.920507 TX Bit2 (976~995) 20 985, Bit10 (969~988) 20 978,
2610 18:35:04.923856 TX Bit3 (974~993) 20 983, Bit11 (970~991) 22 980,
2611 18:35:04.927190 TX Bit4 (977~997) 21 987, Bit12 (969~991) 23 980,
2612 18:35:04.933595 TX Bit5 (978~999) 22 988, Bit13 (970~991) 22 980,
2613 18:35:04.936963 TX Bit6 (979~999) 21 989, Bit14 (969~989) 21 979,
2614 18:35:04.940151 TX Bit7 (977~996) 20 986, Bit15 (966~986) 21 976,
2615 18:35:04.943491
2616 18:35:04.943915 Write Rank0 MR14 =0xc
2617 18:35:04.953296
2618 18:35:04.956336 CH=1, VrefRange= 0, VrefLevel = 12
2619 18:35:04.960222 TX Bit0 (978~1000) 23 989, Bit8 (967~988) 22 977,
2620 18:35:04.962897 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
2621 18:35:04.969659 TX Bit2 (976~996) 21 986, Bit10 (968~989) 22 978,
2622 18:35:04.972902 TX Bit3 (974~993) 20 983, Bit11 (970~991) 22 980,
2623 18:35:04.976489 TX Bit4 (977~997) 21 987, Bit12 (969~991) 23 980,
2624 18:35:04.982649 TX Bit5 (978~1000) 23 989, Bit13 (970~991) 22 980,
2625 18:35:04.985828 TX Bit6 (978~1000) 23 989, Bit14 (969~990) 22 979,
2626 18:35:04.992928 TX Bit7 (976~997) 22 986, Bit15 (966~987) 22 976,
2627 18:35:04.993378
2628 18:35:04.993710 Write Rank0 MR14 =0xe
2629 18:35:05.003262
2630 18:35:05.006473 CH=1, VrefRange= 0, VrefLevel = 14
2631 18:35:05.009585 TX Bit0 (978~1001) 24 989, Bit8 (968~989) 22 978,
2632 18:35:05.012947 TX Bit1 (977~999) 23 988, Bit9 (967~988) 22 977,
2633 18:35:05.019409 TX Bit2 (976~996) 21 986, Bit10 (968~990) 23 979,
2634 18:35:05.022680 TX Bit3 (974~994) 21 984, Bit11 (969~991) 23 980,
2635 18:35:05.026288 TX Bit4 (977~998) 22 987, Bit12 (969~991) 23 980,
2636 18:35:05.032922 TX Bit5 (978~1000) 23 989, Bit13 (970~991) 22 980,
2637 18:35:05.036578 TX Bit6 (978~1000) 23 989, Bit14 (969~990) 22 979,
2638 18:35:05.039455 TX Bit7 (977~997) 21 987, Bit15 (966~988) 23 977,
2639 18:35:05.043059
2640 18:35:05.043572 Write Rank0 MR14 =0x10
2641 18:35:05.052929
2642 18:35:05.056008 CH=1, VrefRange= 0, VrefLevel = 16
2643 18:35:05.059185 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2644 18:35:05.062857 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
2645 18:35:05.069327 TX Bit2 (976~997) 22 986, Bit10 (968~990) 23 979,
2646 18:35:05.072802 TX Bit3 (973~994) 22 983, Bit11 (969~991) 23 980,
2647 18:35:05.075869 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
2648 18:35:05.082831 TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980,
2649 18:35:05.085853 TX Bit6 (978~1000) 23 989, Bit14 (969~991) 23 980,
2650 18:35:05.092806 TX Bit7 (976~997) 22 986, Bit15 (965~988) 24 976,
2651 18:35:05.093380
2652 18:35:05.093723 Write Rank0 MR14 =0x12
2653 18:35:05.102797
2654 18:35:05.105792 CH=1, VrefRange= 0, VrefLevel = 18
2655 18:35:05.109377 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
2656 18:35:05.112659 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
2657 18:35:05.119160 TX Bit2 (976~997) 22 986, Bit10 (968~990) 23 979,
2658 18:35:05.122729 TX Bit3 (973~995) 23 984, Bit11 (969~992) 24 980,
2659 18:35:05.125981 TX Bit4 (976~999) 24 987, Bit12 (969~992) 24 980,
2660 18:35:05.132606 TX Bit5 (978~1001) 24 989, Bit13 (969~991) 23 980,
2661 18:35:05.135855 TX Bit6 (978~1001) 24 989, Bit14 (969~991) 23 980,
2662 18:35:05.142331 TX Bit7 (977~998) 22 987, Bit15 (964~989) 26 976,
2663 18:35:05.142861
2664 18:35:05.143261 Write Rank0 MR14 =0x14
2665 18:35:05.152896
2666 18:35:05.155946 CH=1, VrefRange= 0, VrefLevel = 20
2667 18:35:05.159377 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
2668 18:35:05.162466 TX Bit1 (977~1000) 24 988, Bit9 (967~990) 24 978,
2669 18:35:05.169324 TX Bit2 (975~998) 24 986, Bit10 (968~991) 24 979,
2670 18:35:05.172431 TX Bit3 (973~996) 24 984, Bit11 (969~992) 24 980,
2671 18:35:05.175922 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
2672 18:35:05.182575 TX Bit5 (977~1001) 25 989, Bit13 (969~991) 23 980,
2673 18:35:05.185679 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2674 18:35:05.192169 TX Bit7 (976~998) 23 987, Bit15 (964~989) 26 976,
2675 18:35:05.192589
2676 18:35:05.193034 Write Rank0 MR14 =0x16
2677 18:35:05.202412
2678 18:35:05.205937 CH=1, VrefRange= 0, VrefLevel = 22
2679 18:35:05.209416 TX Bit0 (977~1002) 26 989, Bit8 (967~991) 25 979,
2680 18:35:05.213350 TX Bit1 (977~1000) 24 988, Bit9 (967~991) 25 979,
2681 18:35:05.218952 TX Bit2 (975~998) 24 986, Bit10 (967~991) 25 979,
2682 18:35:05.222734 TX Bit3 (972~997) 26 984, Bit11 (969~992) 24 980,
2683 18:35:05.225647 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
2684 18:35:05.232658 TX Bit5 (977~1002) 26 989, Bit13 (969~991) 23 980,
2685 18:35:05.235691 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2686 18:35:05.242729 TX Bit7 (976~999) 24 987, Bit15 (964~988) 25 976,
2687 18:35:05.243329
2688 18:35:05.243810 Write Rank0 MR14 =0x18
2689 18:35:05.252810
2690 18:35:05.255834 CH=1, VrefRange= 0, VrefLevel = 24
2691 18:35:05.259339 TX Bit0 (977~1003) 27 990, Bit8 (967~991) 25 979,
2692 18:35:05.262305 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
2693 18:35:05.269239 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
2694 18:35:05.272543 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
2695 18:35:05.276281 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2696 18:35:05.282231 TX Bit5 (977~1001) 25 989, Bit13 (969~991) 23 980,
2697 18:35:05.285803 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2698 18:35:05.292378 TX Bit7 (976~999) 24 987, Bit15 (963~988) 26 975,
2699 18:35:05.292630
2700 18:35:05.292820 Write Rank0 MR14 =0x1a
2701 18:35:05.303003
2702 18:35:05.305904 CH=1, VrefRange= 0, VrefLevel = 26
2703 18:35:05.309565 TX Bit0 (978~1003) 26 990, Bit8 (967~991) 25 979,
2704 18:35:05.312965 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
2705 18:35:05.320077 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
2706 18:35:05.323156 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
2707 18:35:05.326097 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2708 18:35:05.333649 TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979,
2709 18:35:05.336898 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2710 18:35:05.343085 TX Bit7 (975~999) 25 987, Bit15 (963~987) 25 975,
2711 18:35:05.343604
2712 18:35:05.343942 Write Rank0 MR14 =0x1c
2713 18:35:05.353230
2714 18:35:05.356551 CH=1, VrefRange= 0, VrefLevel = 28
2715 18:35:05.360022 TX Bit0 (978~1003) 26 990, Bit8 (967~991) 25 979,
2716 18:35:05.363559 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
2717 18:35:05.369674 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
2718 18:35:05.373580 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
2719 18:35:05.376471 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2720 18:35:05.383416 TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979,
2721 18:35:05.386305 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2722 18:35:05.392826 TX Bit7 (975~999) 25 987, Bit15 (963~987) 25 975,
2723 18:35:05.393249
2724 18:35:05.393637 Write Rank0 MR14 =0x1e
2725 18:35:05.402900
2726 18:35:05.406227 CH=1, VrefRange= 0, VrefLevel = 30
2727 18:35:05.409460 TX Bit0 (978~1003) 26 990, Bit8 (967~991) 25 979,
2728 18:35:05.412856 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
2729 18:35:05.419407 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
2730 18:35:05.422702 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
2731 18:35:05.426172 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2732 18:35:05.432986 TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979,
2733 18:35:05.436504 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2734 18:35:05.439309 TX Bit7 (975~999) 25 987, Bit15 (963~987) 25 975,
2735 18:35:05.442636
2736 18:35:05.442750 Write Rank0 MR14 =0x20
2737 18:35:05.452569
2738 18:35:05.456074 CH=1, VrefRange= 0, VrefLevel = 32
2739 18:35:05.459668 TX Bit0 (978~1003) 26 990, Bit8 (967~991) 25 979,
2740 18:35:05.463077 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
2741 18:35:05.469348 TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979,
2742 18:35:05.472949 TX Bit3 (971~996) 26 983, Bit11 (968~992) 25 980,
2743 18:35:05.476239 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2744 18:35:05.482727 TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979,
2745 18:35:05.486020 TX Bit6 (978~1002) 25 990, Bit14 (968~991) 24 979,
2746 18:35:05.492713 TX Bit7 (975~999) 25 987, Bit15 (963~987) 25 975,
2747 18:35:05.492874
2748 18:35:05.492945
2749 18:35:05.496235 TX Vref found, early break! 373< 379
2750 18:35:05.499422 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2751 18:35:05.502811 u1DelayCellOfst[0]=8 cells (7 PI)
2752 18:35:05.505987 u1DelayCellOfst[1]=6 cells (5 PI)
2753 18:35:05.509175 u1DelayCellOfst[2]=3 cells (3 PI)
2754 18:35:05.512552 u1DelayCellOfst[3]=0 cells (0 PI)
2755 18:35:05.516076 u1DelayCellOfst[4]=5 cells (4 PI)
2756 18:35:05.516200 u1DelayCellOfst[5]=7 cells (6 PI)
2757 18:35:05.519618 u1DelayCellOfst[6]=8 cells (7 PI)
2758 18:35:05.522551 u1DelayCellOfst[7]=5 cells (4 PI)
2759 18:35:05.525939 Byte0, DQ PI dly=983, DQM PI dly= 986
2760 18:35:05.532453 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2761 18:35:05.532743
2762 18:35:05.535831 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2763 18:35:05.536036
2764 18:35:05.539395 u1DelayCellOfst[8]=5 cells (4 PI)
2765 18:35:05.542627 u1DelayCellOfst[9]=3 cells (3 PI)
2766 18:35:05.547835 u1DelayCellOfst[10]=5 cells (4 PI)
2767 18:35:05.549112 u1DelayCellOfst[11]=6 cells (5 PI)
2768 18:35:05.552483 u1DelayCellOfst[12]=6 cells (5 PI)
2769 18:35:05.555641 u1DelayCellOfst[13]=5 cells (4 PI)
2770 18:35:05.559361 u1DelayCellOfst[14]=5 cells (4 PI)
2771 18:35:05.559613 u1DelayCellOfst[15]=0 cells (0 PI)
2772 18:35:05.562834 Byte1, DQ PI dly=975, DQM PI dly= 977
2773 18:35:05.569498 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2774 18:35:05.569712
2775 18:35:05.572291 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2776 18:35:05.572512
2777 18:35:05.575632 Write Rank0 MR14 =0x1a
2778 18:35:05.575834
2779 18:35:05.579140 Final TX Range 0 Vref 26
2780 18:35:05.579343
2781 18:35:05.585552 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2782 18:35:05.585843
2783 18:35:05.589326 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2784 18:35:05.599118 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2785 18:35:05.605794 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2786 18:35:05.605939 Write Rank0 MR3 =0xb0
2787 18:35:05.608712 DramC Write-DBI on
2788 18:35:05.608853 ==
2789 18:35:05.612474 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2790 18:35:05.615577 fsp= 1, odt_onoff= 1, Byte mode= 0
2791 18:35:05.615720 ==
2792 18:35:05.622063 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2793 18:35:05.622188
2794 18:35:05.625193 Begin, DQ Scan Range 697~761
2795 18:35:05.625346
2796 18:35:05.625448
2797 18:35:05.625539 TX Vref Scan disable
2798 18:35:05.628915 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2799 18:35:05.632223 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2800 18:35:05.635501 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2801 18:35:05.642279 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2802 18:35:05.645775 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2803 18:35:05.649016 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2804 18:35:05.652307 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2805 18:35:05.655442 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2806 18:35:05.658844 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2807 18:35:05.662344 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2808 18:35:05.665715 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2809 18:35:05.668902 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2810 18:35:05.672494 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2811 18:35:05.675277 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2812 18:35:05.678934 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2813 18:35:05.682178 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2814 18:35:05.685209 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2815 18:35:05.688796 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2816 18:35:05.692116 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2817 18:35:05.695337 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2818 18:35:05.698998 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2819 18:35:05.702214 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2820 18:35:05.710955 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2821 18:35:05.713974 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2822 18:35:05.717146 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2823 18:35:05.720788 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2824 18:35:05.723903 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2825 18:35:05.727289 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2826 18:35:05.730463 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2827 18:35:05.734047 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2828 18:35:05.737171 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2829 18:35:05.740455 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2830 18:35:05.743982 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2831 18:35:05.747609 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2832 18:35:05.751581 Byte0, DQ PI dly=732, DQM PI dly= 732
2833 18:35:05.757495 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
2834 18:35:05.757925
2835 18:35:05.761219 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
2836 18:35:05.761697
2837 18:35:05.764889 Byte1, DQ PI dly=721, DQM PI dly= 721
2838 18:35:05.767845 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2839 18:35:05.768324
2840 18:35:05.774653 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2841 18:35:05.775082
2842 18:35:05.777909 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2843 18:35:05.787720 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2844 18:35:05.794057 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2845 18:35:05.794249 Write Rank0 MR3 =0x30
2846 18:35:05.797925 DramC Write-DBI off
2847 18:35:05.798077
2848 18:35:05.798198 [DATLAT]
2849 18:35:05.800894 Freq=1600, CH1 RK0, use_rxtx_scan=0
2850 18:35:05.801048
2851 18:35:05.803933 DATLAT Default: 0xf
2852 18:35:05.804064 7, 0xFFFF, sum=0
2853 18:35:05.807375 8, 0xFFFF, sum=0
2854 18:35:05.807493 9, 0xFFFF, sum=0
2855 18:35:05.810544 10, 0xFFFF, sum=0
2856 18:35:05.810662 11, 0xFFFF, sum=0
2857 18:35:05.813759 12, 0xFFFF, sum=0
2858 18:35:05.813865 13, 0xFFFF, sum=0
2859 18:35:05.817115 14, 0x0, sum=1
2860 18:35:05.817209 15, 0x0, sum=2
2861 18:35:05.817291 16, 0x0, sum=3
2862 18:35:05.820769 17, 0x0, sum=4
2863 18:35:05.823794 pattern=2 first_step=14 total pass=5 best_step=16
2864 18:35:05.823886 ==
2865 18:35:05.830630 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2866 18:35:05.833897 fsp= 1, odt_onoff= 1, Byte mode= 0
2867 18:35:05.833980 ==
2868 18:35:05.837176 Start DQ dly to find pass range UseTestEngine =1
2869 18:35:05.840542 x-axis: bit #, y-axis: DQ dly (-127~63)
2870 18:35:05.843669 RX Vref Scan = 1
2871 18:35:05.958040
2872 18:35:05.958554 RX Vref found, early break!
2873 18:35:05.958920
2874 18:35:05.965026 Final RX Vref 13, apply to both rank0 and 1
2875 18:35:05.965648 ==
2876 18:35:05.968134 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2877 18:35:05.971214 fsp= 1, odt_onoff= 1, Byte mode= 0
2878 18:35:05.971678 ==
2879 18:35:05.972035 DQS Delay:
2880 18:35:05.974846 DQS0 = 0, DQS1 = 0
2881 18:35:05.975405 DQM Delay:
2882 18:35:05.977980 DQM0 = 20, DQM1 = 18
2883 18:35:05.978536 DQ Delay:
2884 18:35:05.980932 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2885 18:35:05.984597 DQ4 =18, DQ5 =23, DQ6 =25, DQ7 =19
2886 18:35:05.987917 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2887 18:35:05.991451 DQ12 =20, DQ13 =19, DQ14 =18, DQ15 =16
2888 18:35:05.991911
2889 18:35:05.992466
2890 18:35:05.992899
2891 18:35:05.994709 [DramC_TX_OE_Calibration] TA2
2892 18:35:05.997856 Original DQ_B0 (3 6) =30, OEN = 27
2893 18:35:06.001050 Original DQ_B1 (3 6) =30, OEN = 27
2894 18:35:06.004768 23, 0x0, End_B0=23 End_B1=23
2895 18:35:06.005325 24, 0x0, End_B0=24 End_B1=24
2896 18:35:06.008068 25, 0x0, End_B0=25 End_B1=25
2897 18:35:06.011389 26, 0x0, End_B0=26 End_B1=26
2898 18:35:06.014684 27, 0x0, End_B0=27 End_B1=27
2899 18:35:06.015105 28, 0x0, End_B0=28 End_B1=28
2900 18:35:06.017642 29, 0x0, End_B0=29 End_B1=29
2901 18:35:06.021151 30, 0x0, End_B0=30 End_B1=30
2902 18:35:06.024465 31, 0xFFFF, End_B0=30 End_B1=30
2903 18:35:06.031036 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2904 18:35:06.034338 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2905 18:35:06.034854
2906 18:35:06.035185
2907 18:35:06.037578 Write Rank0 MR23 =0x3f
2908 18:35:06.037996 [DQSOSC]
2909 18:35:06.044439 [DQSOSCAuto] RK0, (LSB)MR18= 0xbe, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2910 18:35:06.051253 CH1_RK0: MR19=0x3, MR18=0xBE, DQSOSC=328, MR23=63, INC=22, DEC=34
2911 18:35:06.054384 Write Rank0 MR23 =0x3f
2912 18:35:06.054803 [DQSOSC]
2913 18:35:06.061139 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2914 18:35:06.064604 CH1 RK0: MR19=3, MR18=C0
2915 18:35:06.067797 [RankSwap] Rank num 2, (Multi 1), Rank 1
2916 18:35:06.070837 Write Rank0 MR2 =0xad
2917 18:35:06.071253 [Write Leveling]
2918 18:35:06.074255 delay byte0 byte1 byte2 byte3
2919 18:35:06.074770
2920 18:35:06.077584 10 0 0
2921 18:35:06.078107 11 0 0
2922 18:35:06.078448 12 0 0
2923 18:35:06.081319 13 0 0
2924 18:35:06.081838 14 0 0
2925 18:35:06.084590 15 0 0
2926 18:35:06.085115 16 0 0
2927 18:35:06.087389 17 0 0
2928 18:35:06.087807 18 0 0
2929 18:35:06.088139 19 0 0
2930 18:35:06.090834 20 0 0
2931 18:35:06.091256 21 0 0
2932 18:35:06.094123 22 0 0
2933 18:35:06.094586 23 0 0
2934 18:35:06.094987 24 0 0
2935 18:35:06.097446 25 0 0
2936 18:35:06.097867 26 0 0
2937 18:35:06.100579 27 0 0
2938 18:35:06.100996 28 0 0
2939 18:35:06.101358 29 0 0
2940 18:35:06.104082 30 0 0
2941 18:35:06.104597 31 0 0
2942 18:35:06.107243 32 0 ff
2943 18:35:06.107661 33 0 ff
2944 18:35:06.111391 34 0 ff
2945 18:35:06.111916 35 0 ff
2946 18:35:06.114145 36 ff ff
2947 18:35:06.114563 37 ff ff
2948 18:35:06.114935 38 ff ff
2949 18:35:06.117308 39 ff ff
2950 18:35:06.117730 40 ff ff
2951 18:35:06.120910 41 ff ff
2952 18:35:06.121621 42 ff ff
2953 18:35:06.127920 pass bytecount = 0xff (0xff: all bytes pass)
2954 18:35:06.128354
2955 18:35:06.128681 DQS0 dly: 36
2956 18:35:06.128988 DQS1 dly: 32
2957 18:35:06.130720 Write Rank0 MR2 =0x2d
2958 18:35:06.134178 [RankSwap] Rank num 2, (Multi 1), Rank 0
2959 18:35:06.137298 Write Rank1 MR1 =0xd6
2960 18:35:06.137712 [Gating]
2961 18:35:06.138038 ==
2962 18:35:06.140526 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2963 18:35:06.143986 fsp= 1, odt_onoff= 1, Byte mode= 0
2964 18:35:06.144406 ==
2965 18:35:06.150833 3 1 0 |2d2c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2966 18:35:06.154188 3 1 4 |2d2c 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2967 18:35:06.157719 3 1 8 |a09 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2968 18:35:06.164051 3 1 12 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2969 18:35:06.167329 3 1 16 |3131 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2970 18:35:06.170480 3 1 20 |3030 3534 |(10 10)(11 11) |(0 1)(0 1)| 0
2971 18:35:06.177442 3 1 24 |3131 3534 |(11 0)(11 11) |(1 1)(0 1)| 0
2972 18:35:06.181220 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2973 18:35:06.184247 3 2 0 |3837 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2974 18:35:06.187644 3 2 4 |3838 3d3d |(10 10)(11 11) |(0 0)(1 1)| 0
2975 18:35:06.194114 3 2 8 |a09 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2976 18:35:06.197434 3 2 12 |3332 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2977 18:35:06.200857 3 2 16 |2121 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2978 18:35:06.207699 3 2 20 |3131 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2979 18:35:06.210800 3 2 24 |1717 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2980 18:35:06.214640 3 2 28 |2121 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2981 18:35:06.220850 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2982 18:35:06.224065 3 3 4 |3534 807 |(11 11)(11 11) |(1 1)(1 1)| 0
2983 18:35:06.227356 [Byte 0] Lead/lag falling Transition (3, 3, 4)
2984 18:35:06.230453 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2985 18:35:06.237238 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2986 18:35:06.241062 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2987 18:35:06.244213 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2988 18:35:06.251168 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2989 18:35:06.253804 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2990 18:35:06.257719 3 3 28 |e0d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2991 18:35:06.263647 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2992 18:35:06.267079 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2993 18:35:06.270512 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2994 18:35:06.273843 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2995 18:35:06.280166 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2996 18:35:06.283777 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2997 18:35:06.287501 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2998 18:35:06.293623 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2999 18:35:06.297106 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3000 18:35:06.300531 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3001 18:35:06.307409 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3002 18:35:06.310750 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3003 18:35:06.313996 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3004 18:35:06.317410 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3005 18:35:06.323613 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3006 18:35:06.326936 [Byte 0] Lead/lag Transition tap number (2)
3007 18:35:06.330344 [Byte 1] Lead/lag falling Transition (3, 5, 20)
3008 18:35:06.336997 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3009 18:35:06.340574 [Byte 1] Lead/lag Transition tap number (2)
3010 18:35:06.343736 3 5 28 |1413 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3011 18:35:06.347166 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3012 18:35:06.350411 [Byte 0]First pass (3, 6, 0)
3013 18:35:06.353743 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3014 18:35:06.356999 [Byte 1]First pass (3, 6, 4)
3015 18:35:06.360409 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3016 18:35:06.363736 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3017 18:35:06.370689 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3018 18:35:06.373830 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3019 18:35:06.377175 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3020 18:35:06.380258 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3021 18:35:06.383891 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3022 18:35:06.390464 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3023 18:35:06.393990 All bytes gating window > 1UI, Early break!
3024 18:35:06.394419
3025 18:35:06.396934 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3026 18:35:06.397502
3027 18:35:06.400430 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 24)
3028 18:35:06.400852
3029 18:35:06.401187
3030 18:35:06.401565
3031 18:35:06.403808 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3032 18:35:06.404232
3033 18:35:06.410325 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3034 18:35:06.410749
3035 18:35:06.411079
3036 18:35:06.411390 Write Rank1 MR1 =0x56
3037 18:35:06.411694
3038 18:35:06.413727 best RODT dly(2T, 0.5T) = (2, 2)
3039 18:35:06.414147
3040 18:35:06.417008 best RODT dly(2T, 0.5T) = (2, 2)
3041 18:35:06.417463 ==
3042 18:35:06.424284 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3043 18:35:06.427085 fsp= 1, odt_onoff= 1, Byte mode= 0
3044 18:35:06.427517 ==
3045 18:35:06.430503 Start DQ dly to find pass range UseTestEngine =0
3046 18:35:06.433745 x-axis: bit #, y-axis: DQ dly (-127~63)
3047 18:35:06.437153 RX Vref Scan = 0
3048 18:35:06.437629 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3049 18:35:06.440436 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3050 18:35:06.443578 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3051 18:35:06.446993 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3052 18:35:06.450266 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3053 18:35:06.453459 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3054 18:35:06.457079 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3055 18:35:06.460307 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3056 18:35:06.463650 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3057 18:35:06.464080 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3058 18:35:06.467016 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3059 18:35:06.470563 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3060 18:35:06.473695 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3061 18:35:06.477075 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3062 18:35:06.480550 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3063 18:35:06.483820 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3064 18:35:06.486939 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3065 18:35:06.487381 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3066 18:35:06.490409 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3067 18:35:06.493564 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3068 18:35:06.497074 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3069 18:35:06.500473 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3070 18:35:06.503606 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3071 18:35:06.507080 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3072 18:35:06.507506 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3073 18:35:06.510837 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3074 18:35:06.513639 0, [0] xxooxxxx xxxxxxxo [MSB]
3075 18:35:06.517423 1, [0] xxoooxxo xxxxxxxo [MSB]
3076 18:35:06.520499 2, [0] xxoooxxo xxxxxxxo [MSB]
3077 18:35:06.523602 3, [0] xxoooxxo ooooxooo [MSB]
3078 18:35:06.524129 4, [0] xxoooxxo ooooxooo [MSB]
3079 18:35:06.527197 5, [0] xoooooxo oooooooo [MSB]
3080 18:35:06.530157 6, [0] xoooooxo oooooooo [MSB]
3081 18:35:06.533560 34, [0] oooxoooo oooooooo [MSB]
3082 18:35:06.537011 35, [0] ooxxoooo ooooooox [MSB]
3083 18:35:06.540755 36, [0] ooxxoooo ooooooox [MSB]
3084 18:35:06.541341 37, [0] ooxxoooo ooxoooox [MSB]
3085 18:35:06.543837 38, [0] ooxxxooo xoxooxox [MSB]
3086 18:35:06.546843 39, [0] ooxxxoox xxxxoxxx [MSB]
3087 18:35:06.550045 40, [0] ooxxxoox xxxxoxxx [MSB]
3088 18:35:06.553712 41, [0] ooxxxoxx xxxxxxxx [MSB]
3089 18:35:06.557507 42, [0] xxxxxxxx xxxxxxxx [MSB]
3090 18:35:06.560625 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3091 18:35:06.563677 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3092 18:35:06.566781 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3093 18:35:06.570342 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3094 18:35:06.573626 iDelay=42, Bit 4, Center 19 (1 ~ 37) 37
3095 18:35:06.577057 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3096 18:35:06.580286 iDelay=42, Bit 6, Center 23 (7 ~ 40) 34
3097 18:35:06.583724 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3098 18:35:06.586898 iDelay=42, Bit 8, Center 20 (3 ~ 37) 35
3099 18:35:06.590621 iDelay=42, Bit 9, Center 20 (3 ~ 38) 36
3100 18:35:06.596599 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3101 18:35:06.600038 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3102 18:35:06.603503 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3103 18:35:06.606750 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3104 18:35:06.610020 iDelay=42, Bit 14, Center 20 (3 ~ 38) 36
3105 18:35:06.613436 iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36
3106 18:35:06.613991 ==
3107 18:35:06.620181 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3108 18:35:06.623882 fsp= 1, odt_onoff= 1, Byte mode= 0
3109 18:35:06.624442 ==
3110 18:35:06.624814 DQS Delay:
3111 18:35:06.625157 DQS0 = 0, DQS1 = 0
3112 18:35:06.627520 DQM Delay:
3113 18:35:06.627992 DQM0 = 20, DQM1 = 19
3114 18:35:06.629855 DQ Delay:
3115 18:35:06.633318 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3116 18:35:06.633779 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
3117 18:35:06.637306 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
3118 18:35:06.640875 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3119 18:35:06.643352
3120 18:35:06.643925
3121 18:35:06.644293 DramC Write-DBI off
3122 18:35:06.644636 ==
3123 18:35:06.650253 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3124 18:35:06.653854 fsp= 1, odt_onoff= 1, Byte mode= 0
3125 18:35:06.654414 ==
3126 18:35:06.657137 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3127 18:35:06.657741
3128 18:35:06.660663 Begin, DQ Scan Range 928~1184
3129 18:35:06.661214
3130 18:35:06.661637
3131 18:35:06.663489 TX Vref Scan disable
3132 18:35:06.666901 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3133 18:35:06.669991 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3134 18:35:06.673898 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3135 18:35:06.676836 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3136 18:35:06.680170 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3137 18:35:06.683885 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3138 18:35:06.686968 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3139 18:35:06.689959 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3140 18:35:06.693409 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3141 18:35:06.696867 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3142 18:35:06.700094 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3143 18:35:06.703353 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3144 18:35:06.706954 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3145 18:35:06.709824 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3146 18:35:06.713403 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3147 18:35:06.720190 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3148 18:35:06.723057 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3149 18:35:06.726901 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3150 18:35:06.729855 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3151 18:35:06.733753 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3152 18:35:06.737239 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3153 18:35:06.740164 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3154 18:35:06.743190 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3155 18:35:06.747090 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3156 18:35:06.749626 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3157 18:35:06.753055 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3158 18:35:06.756254 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3159 18:35:06.759775 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3160 18:35:06.762932 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3161 18:35:06.766698 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3162 18:35:06.769555 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3163 18:35:06.776300 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3164 18:35:06.779697 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3165 18:35:06.782863 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3166 18:35:06.786315 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3167 18:35:06.789707 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3168 18:35:06.792827 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3169 18:35:06.796582 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3170 18:35:06.799645 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3171 18:35:06.803018 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3172 18:35:06.806294 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3173 18:35:06.809604 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3174 18:35:06.813015 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3175 18:35:06.816213 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3176 18:35:06.819767 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3177 18:35:06.822693 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3178 18:35:06.826192 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
3179 18:35:06.829382 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
3180 18:35:06.832815 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3181 18:35:06.836292 977 |3 6 17|[0] xooooooo oooooooo [MSB]
3182 18:35:06.844144 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3183 18:35:06.847779 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3184 18:35:06.851137 991 |3 6 31|[0] oooooooo oxxxxxxx [MSB]
3185 18:35:06.854630 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3186 18:35:06.857816 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3187 18:35:06.861341 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3188 18:35:06.864199 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
3189 18:35:06.867460 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
3190 18:35:06.870876 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
3191 18:35:06.874209 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
3192 18:35:06.877485 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3193 18:35:06.880954 Byte0, DQ PI dly=986, DQM PI dly= 986
3194 18:35:06.887603 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3195 18:35:06.888021
3196 18:35:06.890950 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3197 18:35:06.891364
3198 18:35:06.894209 Byte1, DQ PI dly=978, DQM PI dly= 978
3199 18:35:06.897934 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3200 18:35:06.898352
3201 18:35:06.904474 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3202 18:35:06.904996
3203 18:35:06.905380 ==
3204 18:35:06.908100 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3205 18:35:06.911323 fsp= 1, odt_onoff= 1, Byte mode= 0
3206 18:35:06.911842 ==
3207 18:35:06.914420 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3208 18:35:06.914939
3209 18:35:06.917894 Begin, DQ Scan Range 954~1018
3210 18:35:06.921152 Write Rank1 MR14 =0x0
3211 18:35:06.929415
3212 18:35:06.929934 CH=1, VrefRange= 0, VrefLevel = 0
3213 18:35:06.936399 TX Bit0 (980~998) 19 989, Bit8 (971~987) 17 979,
3214 18:35:06.939954 TX Bit1 (979~997) 19 988, Bit9 (970~986) 17 978,
3215 18:35:06.945856 TX Bit2 (976~992) 17 984, Bit10 (973~986) 14 979,
3216 18:35:06.949451 TX Bit3 (975~991) 17 983, Bit11 (974~990) 17 982,
3217 18:35:06.953676 TX Bit4 (977~993) 17 985, Bit12 (972~988) 17 980,
3218 18:35:06.960015 TX Bit5 (979~997) 19 988, Bit13 (975~987) 13 981,
3219 18:35:06.962897 TX Bit6 (979~998) 20 988, Bit14 (973~987) 15 980,
3220 18:35:06.966341 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
3221 18:35:06.966858
3222 18:35:06.969391 Write Rank1 MR14 =0x2
3223 18:35:06.978547
3224 18:35:06.979085 CH=1, VrefRange= 0, VrefLevel = 2
3225 18:35:06.985455 TX Bit0 (979~998) 20 988, Bit8 (970~987) 18 978,
3226 18:35:06.988279 TX Bit1 (978~997) 20 987, Bit9 (970~986) 17 978,
3227 18:35:06.995073 TX Bit2 (976~992) 17 984, Bit10 (971~987) 17 979,
3228 18:35:06.998205 TX Bit3 (975~991) 17 983, Bit11 (974~991) 18 982,
3229 18:35:07.001856 TX Bit4 (977~994) 18 985, Bit12 (972~989) 18 980,
3230 18:35:07.008832 TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980,
3231 18:35:07.011982 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3232 18:35:07.015927 TX Bit7 (978~993) 16 985, Bit15 (968~985) 18 976,
3233 18:35:07.016445
3234 18:35:07.018402 Write Rank1 MR14 =0x4
3235 18:35:07.027623
3236 18:35:07.028184 CH=1, VrefRange= 0, VrefLevel = 4
3237 18:35:07.034145 TX Bit0 (979~999) 21 989, Bit8 (970~988) 19 979,
3238 18:35:07.037561 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3239 18:35:07.044123 TX Bit2 (976~992) 17 984, Bit10 (971~988) 18 979,
3240 18:35:07.047339 TX Bit3 (975~992) 18 983, Bit11 (973~991) 19 982,
3241 18:35:07.050793 TX Bit4 (977~994) 18 985, Bit12 (972~989) 18 980,
3242 18:35:07.057533 TX Bit5 (978~997) 20 987, Bit13 (974~988) 15 981,
3243 18:35:07.061317 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3244 18:35:07.064444 TX Bit7 (978~993) 16 985, Bit15 (968~985) 18 976,
3245 18:35:07.067308
3246 18:35:07.067764 Write Rank1 MR14 =0x6
3247 18:35:07.077053
3248 18:35:07.077658 CH=1, VrefRange= 0, VrefLevel = 6
3249 18:35:07.083602 TX Bit0 (980~999) 20 989, Bit8 (971~988) 18 979,
3250 18:35:07.087189 TX Bit1 (978~998) 21 988, Bit9 (970~987) 18 978,
3251 18:35:07.093524 TX Bit2 (976~993) 18 984, Bit10 (971~988) 18 979,
3252 18:35:07.096450 TX Bit3 (975~992) 18 983, Bit11 (972~991) 20 981,
3253 18:35:07.100409 TX Bit4 (976~995) 20 985, Bit12 (971~990) 20 980,
3254 18:35:07.106692 TX Bit5 (978~998) 21 988, Bit13 (974~988) 15 981,
3255 18:35:07.109940 TX Bit6 (978~999) 22 988, Bit14 (971~989) 19 980,
3256 18:35:07.113591 TX Bit7 (978~994) 17 986, Bit15 (968~986) 19 977,
3257 18:35:07.114153
3258 18:35:07.116511 Write Rank1 MR14 =0x8
3259 18:35:07.125849
3260 18:35:07.126407 CH=1, VrefRange= 0, VrefLevel = 8
3261 18:35:07.132536 TX Bit0 (979~999) 21 989, Bit8 (969~988) 20 978,
3262 18:35:07.136281 TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978,
3263 18:35:07.142664 TX Bit2 (976~993) 18 984, Bit10 (970~989) 20 979,
3264 18:35:07.145868 TX Bit3 (974~993) 20 983, Bit11 (972~992) 21 982,
3265 18:35:07.149726 TX Bit4 (976~996) 21 986, Bit12 (971~990) 20 980,
3266 18:35:07.155981 TX Bit5 (978~998) 21 988, Bit13 (973~989) 17 981,
3267 18:35:07.159309 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
3268 18:35:07.162428 TX Bit7 (978~994) 17 986, Bit15 (968~986) 19 977,
3269 18:35:07.162890
3270 18:35:07.165958 Write Rank1 MR14 =0xa
3271 18:35:07.175100
3272 18:35:07.178288 CH=1, VrefRange= 0, VrefLevel = 10
3273 18:35:07.182041 TX Bit0 (978~1000) 23 989, Bit8 (970~989) 20 979,
3274 18:35:07.185387 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
3275 18:35:07.191906 TX Bit2 (975~994) 20 984, Bit10 (970~989) 20 979,
3276 18:35:07.195102 TX Bit3 (974~993) 20 983, Bit11 (972~992) 21 982,
3277 18:35:07.198162 TX Bit4 (976~996) 21 986, Bit12 (970~991) 22 980,
3278 18:35:07.204841 TX Bit5 (978~998) 21 988, Bit13 (973~990) 18 981,
3279 18:35:07.208616 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
3280 18:35:07.211830 TX Bit7 (977~995) 19 986, Bit15 (967~986) 20 976,
3281 18:35:07.215263
3282 18:35:07.215821 Write Rank1 MR14 =0xc
3283 18:35:07.224646
3284 18:35:07.227972 CH=1, VrefRange= 0, VrefLevel = 12
3285 18:35:07.231246 TX Bit0 (978~1000) 23 989, Bit8 (970~990) 21 980,
3286 18:35:07.234812 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
3287 18:35:07.241666 TX Bit2 (975~994) 20 984, Bit10 (970~989) 20 979,
3288 18:35:07.244540 TX Bit3 (973~993) 21 983, Bit11 (971~992) 22 981,
3289 18:35:07.247975 TX Bit4 (976~997) 22 986, Bit12 (970~991) 22 980,
3290 18:35:07.254723 TX Bit5 (978~999) 22 988, Bit13 (972~990) 19 981,
3291 18:35:07.258033 TX Bit6 (978~1000) 23 989, Bit14 (971~991) 21 981,
3292 18:35:07.261475 TX Bit7 (977~996) 20 986, Bit15 (967~987) 21 977,
3293 18:35:07.264442
3294 18:35:07.264923 Write Rank1 MR14 =0xe
3295 18:35:07.273604
3296 18:35:07.277413 CH=1, VrefRange= 0, VrefLevel = 14
3297 18:35:07.280387 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
3298 18:35:07.283576 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3299 18:35:07.290605 TX Bit2 (975~995) 21 985, Bit10 (970~991) 22 980,
3300 18:35:07.294046 TX Bit3 (973~994) 22 983, Bit11 (971~992) 22 981,
3301 18:35:07.296948 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
3302 18:35:07.304399 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3303 18:35:07.306957 TX Bit6 (978~1000) 23 989, Bit14 (970~991) 22 980,
3304 18:35:07.310341 TX Bit7 (977~996) 20 986, Bit15 (967~987) 21 977,
3305 18:35:07.313733
3306 18:35:07.313956 Write Rank1 MR14 =0x10
3307 18:35:07.323607
3308 18:35:07.327067 CH=1, VrefRange= 0, VrefLevel = 16
3309 18:35:07.330370 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3310 18:35:07.333760 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3311 18:35:07.340541 TX Bit2 (975~996) 22 985, Bit10 (969~991) 23 980,
3312 18:35:07.343888 TX Bit3 (973~994) 22 983, Bit11 (970~993) 24 981,
3313 18:35:07.347163 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
3314 18:35:07.353934 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3315 18:35:07.357024 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3316 18:35:07.360490 TX Bit7 (976~997) 22 986, Bit15 (967~987) 21 977,
3317 18:35:07.364000
3318 18:35:07.364544 Write Rank1 MR14 =0x12
3319 18:35:07.373887
3320 18:35:07.377292 CH=1, VrefRange= 0, VrefLevel = 18
3321 18:35:07.380463 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3322 18:35:07.383754 TX Bit1 (977~1000) 24 988, Bit9 (969~991) 23 980,
3323 18:35:07.390690 TX Bit2 (974~996) 23 985, Bit10 (969~991) 23 980,
3324 18:35:07.393671 TX Bit3 (972~995) 24 983, Bit11 (970~993) 24 981,
3325 18:35:07.397137 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3326 18:35:07.403888 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3327 18:35:07.406931 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
3328 18:35:07.413653 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3329 18:35:07.414212
3330 18:35:07.414571 Write Rank1 MR14 =0x14
3331 18:35:07.423879
3332 18:35:07.426836 CH=1, VrefRange= 0, VrefLevel = 20
3333 18:35:07.430439 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3334 18:35:07.433792 TX Bit1 (977~1000) 24 988, Bit9 (969~991) 23 980,
3335 18:35:07.440645 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3336 18:35:07.443719 TX Bit3 (972~996) 25 984, Bit11 (970~993) 24 981,
3337 18:35:07.446931 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3338 18:35:07.453521 TX Bit5 (977~1000) 24 988, Bit13 (971~992) 22 981,
3339 18:35:07.456723 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
3340 18:35:07.464000 TX Bit7 (976~998) 23 987, Bit15 (967~988) 22 977,
3341 18:35:07.464571
3342 18:35:07.464938 Write Rank1 MR14 =0x16
3343 18:35:07.473628
3344 18:35:07.474191 CH=1, VrefRange= 0, VrefLevel = 22
3345 18:35:07.480249 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3346 18:35:07.483533 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3347 18:35:07.490395 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3348 18:35:07.494115 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3349 18:35:07.496830 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3350 18:35:07.503944 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3351 18:35:07.507386 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3352 18:35:07.513585 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3353 18:35:07.514140
3354 18:35:07.514506 Write Rank1 MR14 =0x18
3355 18:35:07.524323
3356 18:35:07.527061 CH=1, VrefRange= 0, VrefLevel = 24
3357 18:35:07.530770 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3358 18:35:07.533552 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3359 18:35:07.541053 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3360 18:35:07.543494 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3361 18:35:07.546920 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3362 18:35:07.553722 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3363 18:35:07.557209 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3364 18:35:07.563660 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3365 18:35:07.564245
3366 18:35:07.564614 Write Rank1 MR14 =0x1a
3367 18:35:07.573784
3368 18:35:07.574246 CH=1, VrefRange= 0, VrefLevel = 26
3369 18:35:07.580588 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3370 18:35:07.584188 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3371 18:35:07.590479 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3372 18:35:07.593931 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3373 18:35:07.597404 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3374 18:35:07.603751 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3375 18:35:07.607301 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3376 18:35:07.613835 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3377 18:35:07.614262
3378 18:35:07.614598 Write Rank1 MR14 =0x1c
3379 18:35:07.624120
3380 18:35:07.627424 CH=1, VrefRange= 0, VrefLevel = 28
3381 18:35:07.630871 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3382 18:35:07.633831 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3383 18:35:07.640300 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3384 18:35:07.643781 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3385 18:35:07.647447 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3386 18:35:07.654328 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3387 18:35:07.657046 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3388 18:35:07.663757 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3389 18:35:07.664279
3390 18:35:07.664895 Write Rank1 MR14 =0x1e
3391 18:35:07.674120
3392 18:35:07.677241 CH=1, VrefRange= 0, VrefLevel = 30
3393 18:35:07.680565 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3394 18:35:07.683928 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3395 18:35:07.690822 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3396 18:35:07.693931 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3397 18:35:07.697956 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3398 18:35:07.704124 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3399 18:35:07.707753 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3400 18:35:07.714169 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3401 18:35:07.714690
3402 18:35:07.715024 Write Rank1 MR14 =0x20
3403 18:35:07.724599
3404 18:35:07.727796 CH=1, VrefRange= 0, VrefLevel = 32
3405 18:35:07.730996 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3406 18:35:07.734504 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3407 18:35:07.740913 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3408 18:35:07.744268 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
3409 18:35:07.747774 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3410 18:35:07.754111 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3411 18:35:07.757842 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3412 18:35:07.764569 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3413 18:35:07.765130
3414 18:35:07.765558
3415 18:35:07.767574 TX Vref found, early break! 364< 366
3416 18:35:07.771202 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3417 18:35:07.774229 u1DelayCellOfst[0]=7 cells (6 PI)
3418 18:35:07.778013 u1DelayCellOfst[1]=6 cells (5 PI)
3419 18:35:07.781030 u1DelayCellOfst[2]=2 cells (2 PI)
3420 18:35:07.784615 u1DelayCellOfst[3]=0 cells (0 PI)
3421 18:35:07.787858 u1DelayCellOfst[4]=3 cells (3 PI)
3422 18:35:07.788413 u1DelayCellOfst[5]=6 cells (5 PI)
3423 18:35:07.790675 u1DelayCellOfst[6]=7 cells (6 PI)
3424 18:35:07.794424 u1DelayCellOfst[7]=5 cells (4 PI)
3425 18:35:07.797641 Byte0, DQ PI dly=983, DQM PI dly= 986
3426 18:35:07.804283 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3427 18:35:07.804846
3428 18:35:07.808277 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3429 18:35:07.808858
3430 18:35:07.811123 u1DelayCellOfst[8]=3 cells (3 PI)
3431 18:35:07.814010 u1DelayCellOfst[9]=2 cells (2 PI)
3432 18:35:07.817250 u1DelayCellOfst[10]=2 cells (2 PI)
3433 18:35:07.821158 u1DelayCellOfst[11]=5 cells (4 PI)
3434 18:35:07.824012 u1DelayCellOfst[12]=3 cells (3 PI)
3435 18:35:07.827436 u1DelayCellOfst[13]=5 cells (4 PI)
3436 18:35:07.830746 u1DelayCellOfst[14]=3 cells (3 PI)
3437 18:35:07.831206 u1DelayCellOfst[15]=0 cells (0 PI)
3438 18:35:07.833951 Byte1, DQ PI dly=977, DQM PI dly= 979
3439 18:35:07.840853 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3440 18:35:07.841463
3441 18:35:07.843817 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3442 18:35:07.844331
3443 18:35:07.847461 Write Rank1 MR14 =0x16
3444 18:35:07.847921
3445 18:35:07.850605 Final TX Range 0 Vref 22
3446 18:35:07.851188
3447 18:35:07.857807 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3448 18:35:07.858364
3449 18:35:07.860411 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3450 18:35:07.870610 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3451 18:35:07.877090 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3452 18:35:07.877689 Write Rank1 MR3 =0xb0
3453 18:35:07.880379 DramC Write-DBI on
3454 18:35:07.880954 ==
3455 18:35:07.883998 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3456 18:35:07.887114 fsp= 1, odt_onoff= 1, Byte mode= 0
3457 18:35:07.887702 ==
3458 18:35:07.893925 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3459 18:35:07.894488
3460 18:35:07.897424 Begin, DQ Scan Range 699~763
3461 18:35:07.897998
3462 18:35:07.898363
3463 18:35:07.898699 TX Vref Scan disable
3464 18:35:07.900457 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3465 18:35:07.904302 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3466 18:35:07.907408 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3467 18:35:07.914444 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3468 18:35:07.916924 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3469 18:35:07.920375 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3470 18:35:07.923873 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3471 18:35:07.927238 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3472 18:35:07.930791 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3473 18:35:07.933811 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3474 18:35:07.937223 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3475 18:35:07.940944 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3476 18:35:07.944064 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3477 18:35:07.946817 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3478 18:35:07.950106 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3479 18:35:07.953330 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3480 18:35:07.956928 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3481 18:35:07.960235 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3482 18:35:07.963663 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3483 18:35:07.967059 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3484 18:35:07.969985 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3485 18:35:07.979126 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3486 18:35:07.982343 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3487 18:35:07.985457 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3488 18:35:07.989185 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3489 18:35:07.992101 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3490 18:35:07.995663 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3491 18:35:07.998815 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3492 18:35:08.001991 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3493 18:35:08.006090 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3494 18:35:08.009072 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3495 18:35:08.012764 Byte0, DQ PI dly=732, DQM PI dly= 732
3496 18:35:08.015966 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
3497 18:35:08.016553
3498 18:35:08.022228 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
3499 18:35:08.022782
3500 18:35:08.026033 Byte1, DQ PI dly=723, DQM PI dly= 723
3501 18:35:08.029373 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3502 18:35:08.029934
3503 18:35:08.032531 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3504 18:35:08.033098
3505 18:35:08.039284 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3506 18:35:08.049203 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3507 18:35:08.056033 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3508 18:35:08.056598 Write Rank1 MR3 =0x30
3509 18:35:08.059265 DramC Write-DBI off
3510 18:35:08.059850
3511 18:35:08.060214 [DATLAT]
3512 18:35:08.062611 Freq=1600, CH1 RK1, use_rxtx_scan=0
3513 18:35:08.063172
3514 18:35:08.065433 DATLAT Default: 0x10
3515 18:35:08.065998 7, 0xFFFF, sum=0
3516 18:35:08.068743 8, 0xFFFF, sum=0
3517 18:35:08.069207 9, 0xFFFF, sum=0
3518 18:35:08.071968 10, 0xFFFF, sum=0
3519 18:35:08.072605 11, 0xFFFF, sum=0
3520 18:35:08.075540 12, 0xFFFF, sum=0
3521 18:35:08.076111 13, 0xFFFF, sum=0
3522 18:35:08.076483 14, 0x0, sum=1
3523 18:35:08.079290 15, 0x0, sum=2
3524 18:35:08.079856 16, 0x0, sum=3
3525 18:35:08.082256 17, 0x0, sum=4
3526 18:35:08.085236 pattern=2 first_step=14 total pass=5 best_step=16
3527 18:35:08.085745 ==
3528 18:35:08.091732 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3529 18:35:08.095519 fsp= 1, odt_onoff= 1, Byte mode= 0
3530 18:35:08.096083 ==
3531 18:35:08.098335 Start DQ dly to find pass range UseTestEngine =1
3532 18:35:08.101694 x-axis: bit #, y-axis: DQ dly (-127~63)
3533 18:35:08.105349 RX Vref Scan = 0
3534 18:35:08.105898 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3535 18:35:08.108622 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3536 18:35:08.111916 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3537 18:35:08.114963 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3538 18:35:08.119016 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3539 18:35:08.121639 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3540 18:35:08.125472 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3541 18:35:08.128730 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3542 18:35:08.129339 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3543 18:35:08.131844 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3544 18:35:08.134884 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3545 18:35:08.138543 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3546 18:35:08.142254 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3547 18:35:08.145206 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3548 18:35:08.148766 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3549 18:35:08.151681 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3550 18:35:08.154994 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3551 18:35:08.155557 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3552 18:35:08.158236 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3553 18:35:08.161868 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3554 18:35:08.165340 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3555 18:35:08.168638 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3556 18:35:08.171725 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3557 18:35:08.175020 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3558 18:35:08.175531 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3559 18:35:08.178458 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3560 18:35:08.181820 0, [0] xxooxxxx xxxxxxxo [MSB]
3561 18:35:08.185211 1, [0] xxooxxxx oxxxxxxo [MSB]
3562 18:35:08.188563 2, [0] xxoooxxo oooxxxxo [MSB]
3563 18:35:08.191617 3, [0] xxoooxxo ooooxooo [MSB]
3564 18:35:08.192109 4, [0] xxoooxxo oooooooo [MSB]
3565 18:35:08.195113 5, [0] xooooxxo oooooooo [MSB]
3566 18:35:08.198116 6, [0] xoooooxo oooooooo [MSB]
3567 18:35:08.202442 34, [0] oooxoooo oooooooo [MSB]
3568 18:35:08.205864 35, [0] ooxxoooo ooooooox [MSB]
3569 18:35:08.209156 36, [0] ooxxoooo ooooooox [MSB]
3570 18:35:08.212496 37, [0] ooxxxoox ooxooxxx [MSB]
3571 18:35:08.215645 38, [0] ooxxxoox xxxooxxx [MSB]
3572 18:35:08.219086 39, [0] ooxxxoox xxxxoxxx [MSB]
3573 18:35:08.219648 40, [0] ooxxxoox xxxxxxxx [MSB]
3574 18:35:08.222274 41, [0] oxxxxoox xxxxxxxx [MSB]
3575 18:35:08.225575 42, [0] oxxxxxox xxxxxxxx [MSB]
3576 18:35:08.228973 43, [0] xxxxxxxx xxxxxxxx [MSB]
3577 18:35:08.232357 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3578 18:35:08.235195 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3579 18:35:08.239009 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3580 18:35:08.242285 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3581 18:35:08.245344 iDelay=43, Bit 4, Center 19 (2 ~ 36) 35
3582 18:35:08.249000 iDelay=43, Bit 5, Center 23 (6 ~ 41) 36
3583 18:35:08.252172 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3584 18:35:08.259236 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
3585 18:35:08.262128 iDelay=43, Bit 8, Center 19 (1 ~ 37) 37
3586 18:35:08.266032 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3587 18:35:08.268627 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3588 18:35:08.272235 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3589 18:35:08.275750 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3590 18:35:08.279035 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3591 18:35:08.282485 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3592 18:35:08.285988 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3593 18:35:08.286552 ==
3594 18:35:08.292198 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3595 18:35:08.295832 fsp= 1, odt_onoff= 1, Byte mode= 0
3596 18:35:08.296391 ==
3597 18:35:08.296759 DQS Delay:
3598 18:35:08.298729 DQS0 = 0, DQS1 = 0
3599 18:35:08.299188 DQM Delay:
3600 18:35:08.302398 DQM0 = 20, DQM1 = 19
3601 18:35:08.303080 DQ Delay:
3602 18:35:08.305717 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3603 18:35:08.309179 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3604 18:35:08.312361 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3605 18:35:08.315766 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3606 18:35:08.316228
3607 18:35:08.316591
3608 18:35:08.316923
3609 18:35:08.318507 [DramC_TX_OE_Calibration] TA2
3610 18:35:08.321916 Original DQ_B0 (3 6) =30, OEN = 27
3611 18:35:08.325856 Original DQ_B1 (3 6) =30, OEN = 27
3612 18:35:08.326381 23, 0x0, End_B0=23 End_B1=23
3613 18:35:08.329112 24, 0x0, End_B0=24 End_B1=24
3614 18:35:08.332431 25, 0x0, End_B0=25 End_B1=25
3615 18:35:08.335501 26, 0x0, End_B0=26 End_B1=26
3616 18:35:08.336032 27, 0x0, End_B0=27 End_B1=27
3617 18:35:08.338598 28, 0x0, End_B0=28 End_B1=28
3618 18:35:08.342255 29, 0x0, End_B0=29 End_B1=29
3619 18:35:08.345239 30, 0x0, End_B0=30 End_B1=30
3620 18:35:08.348666 31, 0xFFFF, End_B0=30 End_B1=30
3621 18:35:08.352078 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3622 18:35:08.358682 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3623 18:35:08.359204
3624 18:35:08.359539
3625 18:35:08.361721 Write Rank1 MR23 =0x3f
3626 18:35:08.362163 [DQSOSC]
3627 18:35:08.368938 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3628 18:35:08.375052 CH1_RK1: MR19=0x3, MR18=0xAF, DQSOSC=334, MR23=63, INC=22, DEC=33
3629 18:35:08.378794 Write Rank1 MR23 =0x3f
3630 18:35:08.379254 [DQSOSC]
3631 18:35:08.385416 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3632 18:35:08.388512 CH1 RK1: MR19=3, MR18=B3
3633 18:35:08.392015 [RxdqsGatingPostProcess] freq 1600
3634 18:35:08.395236 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3635 18:35:08.398425 Rank: 0
3636 18:35:08.401984 best DQS0 dly(2T, 0.5T) = (2, 5)
3637 18:35:08.402587 best DQS1 dly(2T, 0.5T) = (2, 5)
3638 18:35:08.405327 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3639 18:35:08.408473 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3640 18:35:08.412308 Rank: 1
3641 18:35:08.412766 best DQS0 dly(2T, 0.5T) = (2, 5)
3642 18:35:08.414878 best DQS1 dly(2T, 0.5T) = (2, 5)
3643 18:35:08.418578 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3644 18:35:08.421930 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3645 18:35:08.428488 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3646 18:35:08.432480 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3647 18:35:08.435218 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3648 18:35:08.435783
3649 18:35:08.436149
3650 18:35:08.438520 [Calibration Summary] Freqency 1600
3651 18:35:08.439085 CH 0, Rank 0
3652 18:35:08.441674 All Pass.
3653 18:35:08.442131
3654 18:35:08.442491 CH 0, Rank 1
3655 18:35:08.442826 All Pass.
3656 18:35:08.445122
3657 18:35:08.445670 CH 1, Rank 0
3658 18:35:08.446040 All Pass.
3659 18:35:08.446384
3660 18:35:08.448385 CH 1, Rank 1
3661 18:35:08.448848 All Pass.
3662 18:35:08.449211
3663 18:35:08.454964 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3664 18:35:08.461927 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3665 18:35:08.468895 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3666 18:35:08.471883 Write Rank0 MR3 =0xb0
3667 18:35:08.478217 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3668 18:35:08.484900 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3669 18:35:08.491409 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3670 18:35:08.494583 Write Rank1 MR3 =0xb0
3671 18:35:08.498282 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3672 18:35:08.508010 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3673 18:35:08.514772 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3674 18:35:08.515355 Write Rank0 MR3 =0xb0
3675 18:35:08.521588 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3676 18:35:08.527828 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3677 18:35:08.534473 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3678 18:35:08.538115 Write Rank1 MR3 =0xb0
3679 18:35:08.541353 DramC Write-DBI on
3680 18:35:08.544823 [GetDramInforAfterCalByMRR] Vendor 1.
3681 18:35:08.548303 [GetDramInforAfterCalByMRR] Revision 7.
3682 18:35:08.548763 MR8 12
3683 18:35:08.551644 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3684 18:35:08.552209 MR8 12
3685 18:35:08.558153 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3686 18:35:08.558717 MR8 12
3687 18:35:08.564688 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3688 18:35:08.565288 MR8 12
3689 18:35:08.568183 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3690 18:35:08.578187 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3691 18:35:08.581762 Write Rank0 MR13 =0xd0
3692 18:35:08.582323 Write Rank1 MR13 =0xd0
3693 18:35:08.584051 Write Rank0 MR13 =0xd0
3694 18:35:08.587831 Write Rank1 MR13 =0xd0
3695 18:35:08.588393 Save calibration result to emmc
3696 18:35:08.588762
3697 18:35:08.589098
3698 18:35:08.590779 [DramcModeReg_Check] Freq_1600, FSP_1
3699 18:35:08.594047 FSP_1, CH_0, RK0
3700 18:35:08.597461 Write Rank0 MR13 =0xd8
3701 18:35:08.600702 MR12 = 0x56 (global = 0x56) match
3702 18:35:08.601119 MR14 = 0x18 (global = 0x18) match
3703 18:35:08.604274 FSP_1, CH_0, RK1
3704 18:35:08.607798 Write Rank1 MR13 =0xd8
3705 18:35:08.610988 MR12 = 0x56 (global = 0x56) match
3706 18:35:08.614040 MR14 = 0x16 (global = 0x16) match
3707 18:35:08.614463 FSP_1, CH_1, RK0
3708 18:35:08.617739 Write Rank0 MR13 =0xd8
3709 18:35:08.621401 MR12 = 0x56 (global = 0x56) match
3710 18:35:08.624118 MR14 = 0x1a (global = 0x1a) match
3711 18:35:08.624666 FSP_1, CH_1, RK1
3712 18:35:08.627516 Write Rank1 MR13 =0xd8
3713 18:35:08.630551 MR12 = 0x58 (global = 0x58) match
3714 18:35:08.634174 MR14 = 0x16 (global = 0x16) match
3715 18:35:08.634592
3716 18:35:08.637467 [MEM_TEST] 02: After DFS, before run time config
3717 18:35:08.647760 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3718 18:35:08.648261
3719 18:35:08.648588 [TA2_TEST]
3720 18:35:08.648890 === TA2 HW
3721 18:35:08.651082 TA2 PAT: XTALK
3722 18:35:08.654839 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3723 18:35:08.661577 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3724 18:35:08.664715 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3725 18:35:08.668499 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3726 18:35:08.669026
3727 18:35:08.670996
3728 18:35:08.671410 Settings after calibration
3729 18:35:08.671737
3730 18:35:08.674890 [DramcRunTimeConfig]
3731 18:35:08.678474 TransferPLLToSPMControl - MODE SW PHYPLL
3732 18:35:08.679005 TX_TRACKING: ON
3733 18:35:08.681470 RX_TRACKING: ON
3734 18:35:08.681989 HW_GATING: ON
3735 18:35:08.684946 HW_GATING DBG: OFF
3736 18:35:08.685497 ddr_geometry:1
3737 18:35:08.688205 ddr_geometry:1
3738 18:35:08.688723 ddr_geometry:1
3739 18:35:08.689054 ddr_geometry:1
3740 18:35:08.691333 ddr_geometry:1
3741 18:35:08.691747 ddr_geometry:1
3742 18:35:08.694771 ddr_geometry:1
3743 18:35:08.695290 ddr_geometry:1
3744 18:35:08.697924 High Freq DUMMY_READ_FOR_TRACKING: ON
3745 18:35:08.701526 ZQCS_ENABLE_LP4: OFF
3746 18:35:08.704358 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3747 18:35:08.707943 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3748 18:35:08.708467 SPM_CONTROL_AFTERK: ON
3749 18:35:08.711931 IMPEDANCE_TRACKING: ON
3750 18:35:08.712450 TEMP_SENSOR: ON
3751 18:35:08.714498 PER_BANK_REFRESH: ON
3752 18:35:08.715016 HW_SAVE_FOR_SR: ON
3753 18:35:08.717778 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3754 18:35:08.721282 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3755 18:35:08.724965 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3756 18:35:08.727727 Read ODT Tracking: ON
3757 18:35:08.731322 =========================
3758 18:35:08.731752
3759 18:35:08.732082 [TA2_TEST]
3760 18:35:08.732388 === TA2 HW
3761 18:35:08.737874 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3762 18:35:08.740967 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3763 18:35:08.747950 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3764 18:35:08.750979 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3765 18:35:08.751400
3766 18:35:08.754110 [MEM_TEST] 03: After run time config
3767 18:35:08.765706 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3768 18:35:08.768666 [complex_mem_test] start addr:0x40024000, len:131072
3769 18:35:08.973440 1st complex R/W mem test pass
3770 18:35:08.979742 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3771 18:35:08.983352 sync preloader write leveling
3772 18:35:08.986288 sync preloader cbt_mr12
3773 18:35:08.990228 sync preloader cbt_clk_dly
3774 18:35:08.990788 sync preloader cbt_cmd_dly
3775 18:35:08.993023 sync preloader cbt_cs
3776 18:35:08.996623 sync preloader cbt_ca_perbit_delay
3777 18:35:08.997192 sync preloader clk_delay
3778 18:35:09.000162 sync preloader dqs_delay
3779 18:35:09.003164 sync preloader u1Gating2T_Save
3780 18:35:09.006514 sync preloader u1Gating05T_Save
3781 18:35:09.009968 sync preloader u1Gatingfine_tune_Save
3782 18:35:09.013332 sync preloader u1Gatingucpass_count_Save
3783 18:35:09.016916 sync preloader u1TxWindowPerbitVref_Save
3784 18:35:09.020023 sync preloader u1TxCenter_min_Save
3785 18:35:09.023007 sync preloader u1TxCenter_max_Save
3786 18:35:09.026452 sync preloader u1Txwin_center_Save
3787 18:35:09.030066 sync preloader u1Txfirst_pass_Save
3788 18:35:09.033601 sync preloader u1Txlast_pass_Save
3789 18:35:09.034213 sync preloader u1RxDatlat_Save
3790 18:35:09.037055 sync preloader u1RxWinPerbitVref_Save
3791 18:35:09.043199 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3792 18:35:09.046543 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3793 18:35:09.049576 sync preloader delay_cell_unit
3794 18:35:09.056421 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3795 18:35:09.060046 sync preloader write leveling
3796 18:35:09.060612 sync preloader cbt_mr12
3797 18:35:09.062818 sync preloader cbt_clk_dly
3798 18:35:09.066217 sync preloader cbt_cmd_dly
3799 18:35:09.066778 sync preloader cbt_cs
3800 18:35:09.069746 sync preloader cbt_ca_perbit_delay
3801 18:35:09.073067 sync preloader clk_delay
3802 18:35:09.076321 sync preloader dqs_delay
3803 18:35:09.076786 sync preloader u1Gating2T_Save
3804 18:35:09.080152 sync preloader u1Gating05T_Save
3805 18:35:09.083224 sync preloader u1Gatingfine_tune_Save
3806 18:35:09.086324 sync preloader u1Gatingucpass_count_Save
3807 18:35:09.093102 sync preloader u1TxWindowPerbitVref_Save
3808 18:35:09.093717 sync preloader u1TxCenter_min_Save
3809 18:35:09.096259 sync preloader u1TxCenter_max_Save
3810 18:35:09.099846 sync preloader u1Txwin_center_Save
3811 18:35:09.102898 sync preloader u1Txfirst_pass_Save
3812 18:35:09.106855 sync preloader u1Txlast_pass_Save
3813 18:35:09.110142 sync preloader u1RxDatlat_Save
3814 18:35:09.112869 sync preloader u1RxWinPerbitVref_Save
3815 18:35:09.116383 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3816 18:35:09.120127 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3817 18:35:09.123054 sync preloader delay_cell_unit
3818 18:35:09.129493 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3819 18:35:09.133084 sync preloader write leveling
3820 18:35:09.136641 sync preloader cbt_mr12
3821 18:35:09.137193 sync preloader cbt_clk_dly
3822 18:35:09.139882 sync preloader cbt_cmd_dly
3823 18:35:09.143119 sync preloader cbt_cs
3824 18:35:09.146123 sync preloader cbt_ca_perbit_delay
3825 18:35:09.146594 sync preloader clk_delay
3826 18:35:09.149654 sync preloader dqs_delay
3827 18:35:09.152799 sync preloader u1Gating2T_Save
3828 18:35:09.156494 sync preloader u1Gating05T_Save
3829 18:35:09.159609 sync preloader u1Gatingfine_tune_Save
3830 18:35:09.163059 sync preloader u1Gatingucpass_count_Save
3831 18:35:09.166292 sync preloader u1TxWindowPerbitVref_Save
3832 18:35:09.169668 sync preloader u1TxCenter_min_Save
3833 18:35:09.172689 sync preloader u1TxCenter_max_Save
3834 18:35:09.176126 sync preloader u1Txwin_center_Save
3835 18:35:09.179533 sync preloader u1Txfirst_pass_Save
3836 18:35:09.182806 sync preloader u1Txlast_pass_Save
3837 18:35:09.183386 sync preloader u1RxDatlat_Save
3838 18:35:09.186146 sync preloader u1RxWinPerbitVref_Save
3839 18:35:09.192686 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3840 18:35:09.196139 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3841 18:35:09.199508 sync preloader delay_cell_unit
3842 18:35:09.203151 just_for_test_dump_coreboot_params dump all params
3843 18:35:09.205948 dump source = 0x0
3844 18:35:09.206410 dump params frequency:1600
3845 18:35:09.209673 dump params rank number:2
3846 18:35:09.210134
3847 18:35:09.212942 dump params write leveling
3848 18:35:09.216156 write leveling[0][0][0] = 0x21
3849 18:35:09.216720 write leveling[0][0][1] = 0x1a
3850 18:35:09.219170 write leveling[0][1][0] = 0x22
3851 18:35:09.222400 write leveling[0][1][1] = 0x1c
3852 18:35:09.226068 write leveling[1][0][0] = 0x25
3853 18:35:09.229742 write leveling[1][0][1] = 0x1f
3854 18:35:09.232742 write leveling[1][1][0] = 0x24
3855 18:35:09.233356 write leveling[1][1][1] = 0x20
3856 18:35:09.235788 dump params cbt_cs
3857 18:35:09.239226 cbt_cs[0][0] = 0xa
3858 18:35:09.239792 cbt_cs[0][1] = 0xa
3859 18:35:09.242235 cbt_cs[1][0] = 0xa
3860 18:35:09.242726 cbt_cs[1][1] = 0xa
3861 18:35:09.245879 dump params cbt_mr12
3862 18:35:09.246443 cbt_mr12[0][0] = 0x16
3863 18:35:09.249017 cbt_mr12[0][1] = 0x16
3864 18:35:09.249532 cbt_mr12[1][0] = 0x16
3865 18:35:09.252893 cbt_mr12[1][1] = 0x18
3866 18:35:09.256094 dump params tx window
3867 18:35:09.256656 tx_center_min[0][0][0] = 980
3868 18:35:09.259718 tx_center_max[0][0][0] = 987
3869 18:35:09.262517 tx_center_min[0][0][1] = 973
3870 18:35:09.265932 tx_center_max[0][0][1] = 979
3871 18:35:09.269171 tx_center_min[0][1][0] = 982
3872 18:35:09.269671 tx_center_max[0][1][0] = 989
3873 18:35:09.272688 tx_center_min[0][1][1] = 976
3874 18:35:09.275966 tx_center_max[0][1][1] = 981
3875 18:35:09.279855 tx_center_min[1][0][0] = 983
3876 18:35:09.280429 tx_center_max[1][0][0] = 990
3877 18:35:09.282937 tx_center_min[1][0][1] = 975
3878 18:35:09.286247 tx_center_max[1][0][1] = 980
3879 18:35:09.289491 tx_center_min[1][1][0] = 983
3880 18:35:09.293099 tx_center_max[1][1][0] = 989
3881 18:35:09.293692 tx_center_min[1][1][1] = 977
3882 18:35:09.296138 tx_center_max[1][1][1] = 981
3883 18:35:09.299158 dump params tx window
3884 18:35:09.302749 tx_win_center[0][0][0] = 987
3885 18:35:09.303214 tx_first_pass[0][0][0] = 975
3886 18:35:09.306894 tx_last_pass[0][0][0] = 999
3887 18:35:09.309418 tx_win_center[0][0][1] = 985
3888 18:35:09.312998 tx_first_pass[0][0][1] = 973
3889 18:35:09.313625 tx_last_pass[0][0][1] = 998
3890 18:35:09.316421 tx_win_center[0][0][2] = 985
3891 18:35:09.319683 tx_first_pass[0][0][2] = 974
3892 18:35:09.322489 tx_last_pass[0][0][2] = 997
3893 18:35:09.326187 tx_win_center[0][0][3] = 980
3894 18:35:09.326649 tx_first_pass[0][0][3] = 968
3895 18:35:09.329197 tx_last_pass[0][0][3] = 992
3896 18:35:09.332966 tx_win_center[0][0][4] = 985
3897 18:35:09.336166 tx_first_pass[0][0][4] = 973
3898 18:35:09.336751 tx_last_pass[0][0][4] = 998
3899 18:35:09.339254 tx_win_center[0][0][5] = 981
3900 18:35:09.342526 tx_first_pass[0][0][5] = 969
3901 18:35:09.346280 tx_last_pass[0][0][5] = 993
3902 18:35:09.349203 tx_win_center[0][0][6] = 981
3903 18:35:09.349659 tx_first_pass[0][0][6] = 969
3904 18:35:09.352860 tx_last_pass[0][0][6] = 994
3905 18:35:09.356165 tx_win_center[0][0][7] = 983
3906 18:35:09.359468 tx_first_pass[0][0][7] = 971
3907 18:35:09.359997 tx_last_pass[0][0][7] = 995
3908 18:35:09.362663 tx_win_center[0][0][8] = 973
3909 18:35:09.366649 tx_first_pass[0][0][8] = 961
3910 18:35:09.369623 tx_last_pass[0][0][8] = 986
3911 18:35:09.370148 tx_win_center[0][0][9] = 976
3912 18:35:09.372452 tx_first_pass[0][0][9] = 963
3913 18:35:09.375838 tx_last_pass[0][0][9] = 989
3914 18:35:09.379780 tx_win_center[0][0][10] = 979
3915 18:35:09.382695 tx_first_pass[0][0][10] = 967
3916 18:35:09.383223 tx_last_pass[0][0][10] = 991
3917 18:35:09.385962 tx_win_center[0][0][11] = 973
3918 18:35:09.389189 tx_first_pass[0][0][11] = 961
3919 18:35:09.392896 tx_last_pass[0][0][11] = 986
3920 18:35:09.395989 tx_win_center[0][0][12] = 974
3921 18:35:09.396513 tx_first_pass[0][0][12] = 962
3922 18:35:09.398985 tx_last_pass[0][0][12] = 987
3923 18:35:09.402821 tx_win_center[0][0][13] = 973
3924 18:35:09.406132 tx_first_pass[0][0][13] = 962
3925 18:35:09.408887 tx_last_pass[0][0][13] = 985
3926 18:35:09.409359 tx_win_center[0][0][14] = 975
3927 18:35:09.412489 tx_first_pass[0][0][14] = 963
3928 18:35:09.416051 tx_last_pass[0][0][14] = 987
3929 18:35:09.418983 tx_win_center[0][0][15] = 978
3930 18:35:09.422387 tx_first_pass[0][0][15] = 966
3931 18:35:09.422815 tx_last_pass[0][0][15] = 990
3932 18:35:09.425991 tx_win_center[0][1][0] = 989
3933 18:35:09.428956 tx_first_pass[0][1][0] = 977
3934 18:35:09.432418 tx_last_pass[0][1][0] = 1001
3935 18:35:09.435693 tx_win_center[0][1][1] = 988
3936 18:35:09.436131 tx_first_pass[0][1][1] = 976
3937 18:35:09.439327 tx_last_pass[0][1][1] = 1000
3938 18:35:09.442460 tx_win_center[0][1][2] = 988
3939 18:35:09.446039 tx_first_pass[0][1][2] = 976
3940 18:35:09.448973 tx_last_pass[0][1][2] = 1000
3941 18:35:09.449449 tx_win_center[0][1][3] = 982
3942 18:35:09.452836 tx_first_pass[0][1][3] = 969
3943 18:35:09.455753 tx_last_pass[0][1][3] = 995
3944 18:35:09.459476 tx_win_center[0][1][4] = 988
3945 18:35:09.460003 tx_first_pass[0][1][4] = 976
3946 18:35:09.462420 tx_last_pass[0][1][4] = 1000
3947 18:35:09.466267 tx_win_center[0][1][5] = 982
3948 18:35:09.469343 tx_first_pass[0][1][5] = 971
3949 18:35:09.472464 tx_last_pass[0][1][5] = 994
3950 18:35:09.472888 tx_win_center[0][1][6] = 984
3951 18:35:09.475381 tx_first_pass[0][1][6] = 971
3952 18:35:09.479485 tx_last_pass[0][1][6] = 997
3953 18:35:09.482640 tx_win_center[0][1][7] = 987
3954 18:35:09.483165 tx_first_pass[0][1][7] = 975
3955 18:35:09.486121 tx_last_pass[0][1][7] = 999
3956 18:35:09.489154 tx_win_center[0][1][8] = 978
3957 18:35:09.492629 tx_first_pass[0][1][8] = 967
3958 18:35:09.495437 tx_last_pass[0][1][8] = 989
3959 18:35:09.495863 tx_win_center[0][1][9] = 978
3960 18:35:09.499014 tx_first_pass[0][1][9] = 967
3961 18:35:09.502289 tx_last_pass[0][1][9] = 989
3962 18:35:09.505684 tx_win_center[0][1][10] = 981
3963 18:35:09.508956 tx_first_pass[0][1][10] = 970
3964 18:35:09.509530 tx_last_pass[0][1][10] = 992
3965 18:35:09.512229 tx_win_center[0][1][11] = 977
3966 18:35:09.515817 tx_first_pass[0][1][11] = 966
3967 18:35:09.519114 tx_last_pass[0][1][11] = 989
3968 18:35:09.522332 tx_win_center[0][1][12] = 978
3969 18:35:09.522860 tx_first_pass[0][1][12] = 967
3970 18:35:09.525595 tx_last_pass[0][1][12] = 989
3971 18:35:09.528833 tx_win_center[0][1][13] = 976
3972 18:35:09.532524 tx_first_pass[0][1][13] = 966
3973 18:35:09.535459 tx_last_pass[0][1][13] = 987
3974 18:35:09.535883 tx_win_center[0][1][14] = 978
3975 18:35:09.539032 tx_first_pass[0][1][14] = 967
3976 18:35:09.542440 tx_last_pass[0][1][14] = 989
3977 18:35:09.545421 tx_win_center[0][1][15] = 979
3978 18:35:09.548787 tx_first_pass[0][1][15] = 969
3979 18:35:09.549234 tx_last_pass[0][1][15] = 990
3980 18:35:09.551967 tx_win_center[1][0][0] = 990
3981 18:35:09.555817 tx_first_pass[1][0][0] = 978
3982 18:35:09.559114 tx_last_pass[1][0][0] = 1003
3983 18:35:09.559633 tx_win_center[1][0][1] = 988
3984 18:35:09.562318 tx_first_pass[1][0][1] = 976
3985 18:35:09.566177 tx_last_pass[1][0][1] = 1000
3986 18:35:09.568886 tx_win_center[1][0][2] = 986
3987 18:35:09.572063 tx_first_pass[1][0][2] = 974
3988 18:35:09.572526 tx_last_pass[1][0][2] = 998
3989 18:35:09.575824 tx_win_center[1][0][3] = 983
3990 18:35:09.579179 tx_first_pass[1][0][3] = 971
3991 18:35:09.582541 tx_last_pass[1][0][3] = 996
3992 18:35:09.583134 tx_win_center[1][0][4] = 987
3993 18:35:09.585698 tx_first_pass[1][0][4] = 975
3994 18:35:09.588985 tx_last_pass[1][0][4] = 999
3995 18:35:09.592199 tx_win_center[1][0][5] = 989
3996 18:35:09.595737 tx_first_pass[1][0][5] = 977
3997 18:35:09.596197 tx_last_pass[1][0][5] = 1001
3998 18:35:09.598939 tx_win_center[1][0][6] = 990
3999 18:35:09.602779 tx_first_pass[1][0][6] = 978
4000 18:35:09.605977 tx_last_pass[1][0][6] = 1002
4001 18:35:09.609006 tx_win_center[1][0][7] = 987
4002 18:35:09.610191 tx_first_pass[1][0][7] = 975
4003 18:35:09.612267 tx_last_pass[1][0][7] = 999
4004 18:35:09.615612 tx_win_center[1][0][8] = 979
4005 18:35:09.619407 tx_first_pass[1][0][8] = 967
4006 18:35:09.619972 tx_last_pass[1][0][8] = 991
4007 18:35:09.622248 tx_win_center[1][0][9] = 978
4008 18:35:09.625725 tx_first_pass[1][0][9] = 967
4009 18:35:09.629126 tx_last_pass[1][0][9] = 990
4010 18:35:09.632621 tx_win_center[1][0][10] = 979
4011 18:35:09.633177 tx_first_pass[1][0][10] = 967
4012 18:35:09.635463 tx_last_pass[1][0][10] = 991
4013 18:35:09.638877 tx_win_center[1][0][11] = 980
4014 18:35:09.642156 tx_first_pass[1][0][11] = 968
4015 18:35:09.645537 tx_last_pass[1][0][11] = 992
4016 18:35:09.646068 tx_win_center[1][0][12] = 980
4017 18:35:09.649038 tx_first_pass[1][0][12] = 968
4018 18:35:09.652327 tx_last_pass[1][0][12] = 992
4019 18:35:09.655873 tx_win_center[1][0][13] = 979
4020 18:35:09.659273 tx_first_pass[1][0][13] = 968
4021 18:35:09.659838 tx_last_pass[1][0][13] = 991
4022 18:35:09.662486 tx_win_center[1][0][14] = 979
4023 18:35:09.666102 tx_first_pass[1][0][14] = 968
4024 18:35:09.668906 tx_last_pass[1][0][14] = 991
4025 18:35:09.672648 tx_win_center[1][0][15] = 975
4026 18:35:09.673116 tx_first_pass[1][0][15] = 963
4027 18:35:09.675767 tx_last_pass[1][0][15] = 987
4028 18:35:09.679377 tx_win_center[1][1][0] = 989
4029 18:35:09.682216 tx_first_pass[1][1][0] = 977
4030 18:35:09.685898 tx_last_pass[1][1][0] = 1002
4031 18:35:09.686472 tx_win_center[1][1][1] = 988
4032 18:35:09.689026 tx_first_pass[1][1][1] = 977
4033 18:35:09.692486 tx_last_pass[1][1][1] = 1000
4034 18:35:09.695804 tx_win_center[1][1][2] = 985
4035 18:35:09.696267 tx_first_pass[1][1][2] = 974
4036 18:35:09.698968 tx_last_pass[1][1][2] = 997
4037 18:35:09.702297 tx_win_center[1][1][3] = 983
4038 18:35:09.705737 tx_first_pass[1][1][3] = 971
4039 18:35:09.706203 tx_last_pass[1][1][3] = 996
4040 18:35:09.708882 tx_win_center[1][1][4] = 986
4041 18:35:09.712457 tx_first_pass[1][1][4] = 975
4042 18:35:09.716011 tx_last_pass[1][1][4] = 998
4043 18:35:09.719152 tx_win_center[1][1][5] = 988
4044 18:35:09.719716 tx_first_pass[1][1][5] = 977
4045 18:35:09.722225 tx_last_pass[1][1][5] = 1000
4046 18:35:09.725800 tx_win_center[1][1][6] = 989
4047 18:35:09.728902 tx_first_pass[1][1][6] = 977
4048 18:35:09.732302 tx_last_pass[1][1][6] = 1001
4049 18:35:09.732885 tx_win_center[1][1][7] = 987
4050 18:35:09.735955 tx_first_pass[1][1][7] = 976
4051 18:35:09.739221 tx_last_pass[1][1][7] = 998
4052 18:35:09.742396 tx_win_center[1][1][8] = 980
4053 18:35:09.742986 tx_first_pass[1][1][8] = 969
4054 18:35:09.746046 tx_last_pass[1][1][8] = 991
4055 18:35:09.749116 tx_win_center[1][1][9] = 979
4056 18:35:09.752622 tx_first_pass[1][1][9] = 968
4057 18:35:09.753193 tx_last_pass[1][1][9] = 991
4058 18:35:09.756270 tx_win_center[1][1][10] = 979
4059 18:35:09.759329 tx_first_pass[1][1][10] = 968
4060 18:35:09.762923 tx_last_pass[1][1][10] = 991
4061 18:35:09.765995 tx_win_center[1][1][11] = 981
4062 18:35:09.766565 tx_first_pass[1][1][11] = 970
4063 18:35:09.769084 tx_last_pass[1][1][11] = 993
4064 18:35:09.772507 tx_win_center[1][1][12] = 980
4065 18:35:09.775713 tx_first_pass[1][1][12] = 969
4066 18:35:09.779086 tx_last_pass[1][1][12] = 992
4067 18:35:09.779655 tx_win_center[1][1][13] = 981
4068 18:35:09.782603 tx_first_pass[1][1][13] = 970
4069 18:35:09.786063 tx_last_pass[1][1][13] = 992
4070 18:35:09.789213 tx_win_center[1][1][14] = 980
4071 18:35:09.792554 tx_first_pass[1][1][14] = 969
4072 18:35:09.795753 tx_last_pass[1][1][14] = 992
4073 18:35:09.796222 tx_win_center[1][1][15] = 977
4074 18:35:09.798898 tx_first_pass[1][1][15] = 966
4075 18:35:09.802196 tx_last_pass[1][1][15] = 989
4076 18:35:09.805984 dump params rx window
4077 18:35:09.806553 rx_firspass[0][0][0] = 9
4078 18:35:09.808826 rx_lastpass[0][0][0] = 41
4079 18:35:09.812387 rx_firspass[0][0][1] = 9
4080 18:35:09.812910 rx_lastpass[0][0][1] = 39
4081 18:35:09.815430 rx_firspass[0][0][2] = 9
4082 18:35:09.819201 rx_lastpass[0][0][2] = 39
4083 18:35:09.819769 rx_firspass[0][0][3] = -1
4084 18:35:09.822259 rx_lastpass[0][0][3] = 31
4085 18:35:09.825544 rx_firspass[0][0][4] = 7
4086 18:35:09.828748 rx_lastpass[0][0][4] = 39
4087 18:35:09.829216 rx_firspass[0][0][5] = 3
4088 18:35:09.832220 rx_lastpass[0][0][5] = 29
4089 18:35:09.835312 rx_firspass[0][0][6] = 2
4090 18:35:09.835800 rx_lastpass[0][0][6] = 32
4091 18:35:09.839096 rx_firspass[0][0][7] = 4
4092 18:35:09.842251 rx_lastpass[0][0][7] = 34
4093 18:35:09.842776 rx_firspass[0][0][8] = 2
4094 18:35:09.845540 rx_lastpass[0][0][8] = 34
4095 18:35:09.848877 rx_firspass[0][0][9] = 5
4096 18:35:09.852169 rx_lastpass[0][0][9] = 35
4097 18:35:09.852700 rx_firspass[0][0][10] = 9
4098 18:35:09.855027 rx_lastpass[0][0][10] = 38
4099 18:35:09.858827 rx_firspass[0][0][11] = 3
4100 18:35:09.859353 rx_lastpass[0][0][11] = 30
4101 18:35:09.862739 rx_firspass[0][0][12] = 5
4102 18:35:09.865545 rx_lastpass[0][0][12] = 34
4103 18:35:09.868973 rx_firspass[0][0][13] = 1
4104 18:35:09.869533 rx_lastpass[0][0][13] = 31
4105 18:35:09.872095 rx_firspass[0][0][14] = 3
4106 18:35:09.875217 rx_lastpass[0][0][14] = 33
4107 18:35:09.875640 rx_firspass[0][0][15] = 4
4108 18:35:09.878667 rx_lastpass[0][0][15] = 35
4109 18:35:09.882374 rx_firspass[0][1][0] = 9
4110 18:35:09.885847 rx_lastpass[0][1][0] = 43
4111 18:35:09.886376 rx_firspass[0][1][1] = 7
4112 18:35:09.889227 rx_lastpass[0][1][1] = 42
4113 18:35:09.892344 rx_firspass[0][1][2] = 7
4114 18:35:09.892766 rx_lastpass[0][1][2] = 42
4115 18:35:09.895871 rx_firspass[0][1][3] = -2
4116 18:35:09.899045 rx_lastpass[0][1][3] = 33
4117 18:35:09.899571 rx_firspass[0][1][4] = 5
4118 18:35:09.902227 rx_lastpass[0][1][4] = 41
4119 18:35:09.905847 rx_firspass[0][1][5] = 1
4120 18:35:09.908900 rx_lastpass[0][1][5] = 34
4121 18:35:09.909354 rx_firspass[0][1][6] = 2
4122 18:35:09.912182 rx_lastpass[0][1][6] = 35
4123 18:35:09.915477 rx_firspass[0][1][7] = 2
4124 18:35:09.915898 rx_lastpass[0][1][7] = 36
4125 18:35:09.918897 rx_firspass[0][1][8] = 0
4126 18:35:09.922605 rx_lastpass[0][1][8] = 36
4127 18:35:09.923131 rx_firspass[0][1][9] = 1
4128 18:35:09.925750 rx_lastpass[0][1][9] = 37
4129 18:35:09.929338 rx_firspass[0][1][10] = 6
4130 18:35:09.932871 rx_lastpass[0][1][10] = 41
4131 18:35:09.933451 rx_firspass[0][1][11] = 1
4132 18:35:09.935394 rx_lastpass[0][1][11] = 33
4133 18:35:09.939441 rx_firspass[0][1][12] = 1
4134 18:35:09.941836 rx_lastpass[0][1][12] = 36
4135 18:35:09.942262 rx_firspass[0][1][13] = -1
4136 18:35:09.945113 rx_lastpass[0][1][13] = 34
4137 18:35:09.948637 rx_firspass[0][1][14] = 1
4138 18:35:09.949068 rx_lastpass[0][1][14] = 36
4139 18:35:09.952279 rx_firspass[0][1][15] = 3
4140 18:35:09.955669 rx_lastpass[0][1][15] = 38
4141 18:35:09.958826 rx_firspass[1][0][0] = 7
4142 18:35:09.959254 rx_lastpass[1][0][0] = 42
4143 18:35:09.962014 rx_firspass[1][0][1] = 6
4144 18:35:09.965422 rx_lastpass[1][0][1] = 39
4145 18:35:09.965850 rx_firspass[1][0][2] = 0
4146 18:35:09.968511 rx_lastpass[1][0][2] = 33
4147 18:35:09.971829 rx_firspass[1][0][3] = 0
4148 18:35:09.975401 rx_lastpass[1][0][3] = 32
4149 18:35:09.975822 rx_firspass[1][0][4] = 4
4150 18:35:09.978627 rx_lastpass[1][0][4] = 34
4151 18:35:09.981913 rx_firspass[1][0][5] = 8
4152 18:35:09.982333 rx_lastpass[1][0][5] = 40
4153 18:35:09.985046 rx_firspass[1][0][6] = 9
4154 18:35:09.988884 rx_lastpass[1][0][6] = 41
4155 18:35:09.989358 rx_firspass[1][0][7] = 4
4156 18:35:09.991892 rx_lastpass[1][0][7] = 34
4157 18:35:09.995041 rx_firspass[1][0][8] = 2
4158 18:35:09.998895 rx_lastpass[1][0][8] = 36
4159 18:35:09.999316 rx_firspass[1][0][9] = 3
4160 18:35:10.001953 rx_lastpass[1][0][9] = 36
4161 18:35:10.005760 rx_firspass[1][0][10] = 1
4162 18:35:10.006296 rx_lastpass[1][0][10] = 35
4163 18:35:10.008357 rx_firspass[1][0][11] = 3
4164 18:35:10.011665 rx_lastpass[1][0][11] = 36
4165 18:35:10.015534 rx_firspass[1][0][12] = 4
4166 18:35:10.016056 rx_lastpass[1][0][12] = 36
4167 18:35:10.018488 rx_firspass[1][0][13] = 4
4168 18:35:10.021976 rx_lastpass[1][0][13] = 34
4169 18:35:10.022397 rx_firspass[1][0][14] = 3
4170 18:35:10.025361 rx_lastpass[1][0][14] = 35
4171 18:35:10.028463 rx_firspass[1][0][15] = 0
4172 18:35:10.031793 rx_lastpass[1][0][15] = 33
4173 18:35:10.032312 rx_firspass[1][1][0] = 7
4174 18:35:10.035134 rx_lastpass[1][1][0] = 42
4175 18:35:10.038327 rx_firspass[1][1][1] = 5
4176 18:35:10.038748 rx_lastpass[1][1][1] = 40
4177 18:35:10.041745 rx_firspass[1][1][2] = 0
4178 18:35:10.044975 rx_lastpass[1][1][2] = 34
4179 18:35:10.048215 rx_firspass[1][1][3] = -2
4180 18:35:10.048639 rx_lastpass[1][1][3] = 33
4181 18:35:10.051894 rx_firspass[1][1][4] = 2
4182 18:35:10.055111 rx_lastpass[1][1][4] = 36
4183 18:35:10.055636 rx_firspass[1][1][5] = 6
4184 18:35:10.058444 rx_lastpass[1][1][5] = 41
4185 18:35:10.061649 rx_firspass[1][1][6] = 7
4186 18:35:10.062072 rx_lastpass[1][1][6] = 42
4187 18:35:10.065040 rx_firspass[1][1][7] = 2
4188 18:35:10.068207 rx_lastpass[1][1][7] = 36
4189 18:35:10.071980 rx_firspass[1][1][8] = 1
4190 18:35:10.072402 rx_lastpass[1][1][8] = 37
4191 18:35:10.074859 rx_firspass[1][1][9] = 2
4192 18:35:10.078320 rx_lastpass[1][1][9] = 37
4193 18:35:10.078742 rx_firspass[1][1][10] = 2
4194 18:35:10.081522 rx_lastpass[1][1][10] = 36
4195 18:35:10.085386 rx_firspass[1][1][11] = 3
4196 18:35:10.088335 rx_lastpass[1][1][11] = 38
4197 18:35:10.088754 rx_firspass[1][1][12] = 4
4198 18:35:10.091538 rx_lastpass[1][1][12] = 39
4199 18:35:10.094697 rx_firspass[1][1][13] = 3
4200 18:35:10.097978 rx_lastpass[1][1][13] = 36
4201 18:35:10.098402 rx_firspass[1][1][14] = 3
4202 18:35:10.101565 rx_lastpass[1][1][14] = 36
4203 18:35:10.105030 rx_firspass[1][1][15] = 0
4204 18:35:10.105482 rx_lastpass[1][1][15] = 34
4205 18:35:10.108069 dump params clk_delay
4206 18:35:10.108487 clk_delay[0] = -1
4207 18:35:10.111974 clk_delay[1] = 0
4208 18:35:10.115113 dump params dqs_delay
4209 18:35:10.115637 dqs_delay[0][0] = 0
4210 18:35:10.118664 dqs_delay[0][1] = -1
4211 18:35:10.119190 dqs_delay[1][0] = -1
4212 18:35:10.122517 dqs_delay[1][1] = 0
4213 18:35:10.124931 dump params delay_cell_unit = 762
4214 18:35:10.125402 dump source = 0x0
4215 18:35:10.128070 dump params frequency:1200
4216 18:35:10.131736 dump params rank number:2
4217 18:35:10.132157
4218 18:35:10.132490 dump params write leveling
4219 18:35:10.134676 write leveling[0][0][0] = 0x0
4220 18:35:10.137939 write leveling[0][0][1] = 0x0
4221 18:35:10.141349 write leveling[0][1][0] = 0x0
4222 18:35:10.144889 write leveling[0][1][1] = 0x0
4223 18:35:10.145455 write leveling[1][0][0] = 0x0
4224 18:35:10.148043 write leveling[1][0][1] = 0x0
4225 18:35:10.151116 write leveling[1][1][0] = 0x0
4226 18:35:10.154767 write leveling[1][1][1] = 0x0
4227 18:35:10.155189 dump params cbt_cs
4228 18:35:10.158215 cbt_cs[0][0] = 0x0
4229 18:35:10.158780 cbt_cs[0][1] = 0x0
4230 18:35:10.161762 cbt_cs[1][0] = 0x0
4231 18:35:10.162184 cbt_cs[1][1] = 0x0
4232 18:35:10.164726 dump params cbt_mr12
4233 18:35:10.168574 cbt_mr12[0][0] = 0x0
4234 18:35:10.169146 cbt_mr12[0][1] = 0x0
4235 18:35:10.171219 cbt_mr12[1][0] = 0x0
4236 18:35:10.171641 cbt_mr12[1][1] = 0x0
4237 18:35:10.174546 dump params tx window
4238 18:35:10.178234 tx_center_min[0][0][0] = 0
4239 18:35:10.178664 tx_center_max[0][0][0] = 0
4240 18:35:10.181586 tx_center_min[0][0][1] = 0
4241 18:35:10.184718 tx_center_max[0][0][1] = 0
4242 18:35:10.185139 tx_center_min[0][1][0] = 0
4243 18:35:10.188268 tx_center_max[0][1][0] = 0
4244 18:35:10.191629 tx_center_min[0][1][1] = 0
4245 18:35:10.194558 tx_center_max[0][1][1] = 0
4246 18:35:10.194989 tx_center_min[1][0][0] = 0
4247 18:35:10.198014 tx_center_max[1][0][0] = 0
4248 18:35:10.201305 tx_center_min[1][0][1] = 0
4249 18:35:10.205378 tx_center_max[1][0][1] = 0
4250 18:35:10.205801 tx_center_min[1][1][0] = 0
4251 18:35:10.208396 tx_center_max[1][1][0] = 0
4252 18:35:10.211569 tx_center_min[1][1][1] = 0
4253 18:35:10.214968 tx_center_max[1][1][1] = 0
4254 18:35:10.215556 dump params tx window
4255 18:35:10.219040 tx_win_center[0][0][0] = 0
4256 18:35:10.221840 tx_first_pass[0][0][0] = 0
4257 18:35:10.222266 tx_last_pass[0][0][0] = 0
4258 18:35:10.224837 tx_win_center[0][0][1] = 0
4259 18:35:10.228547 tx_first_pass[0][0][1] = 0
4260 18:35:10.231485 tx_last_pass[0][0][1] = 0
4261 18:35:10.231912 tx_win_center[0][0][2] = 0
4262 18:35:10.234911 tx_first_pass[0][0][2] = 0
4263 18:35:10.238841 tx_last_pass[0][0][2] = 0
4264 18:35:10.239367 tx_win_center[0][0][3] = 0
4265 18:35:10.241668 tx_first_pass[0][0][3] = 0
4266 18:35:10.245399 tx_last_pass[0][0][3] = 0
4267 18:35:10.248441 tx_win_center[0][0][4] = 0
4268 18:35:10.248967 tx_first_pass[0][0][4] = 0
4269 18:35:10.251696 tx_last_pass[0][0][4] = 0
4270 18:35:10.254701 tx_win_center[0][0][5] = 0
4271 18:35:10.257985 tx_first_pass[0][0][5] = 0
4272 18:35:10.258508 tx_last_pass[0][0][5] = 0
4273 18:35:10.261404 tx_win_center[0][0][6] = 0
4274 18:35:10.264739 tx_first_pass[0][0][6] = 0
4275 18:35:10.265163 tx_last_pass[0][0][6] = 0
4276 18:35:10.268335 tx_win_center[0][0][7] = 0
4277 18:35:10.271676 tx_first_pass[0][0][7] = 0
4278 18:35:10.274913 tx_last_pass[0][0][7] = 0
4279 18:35:10.275399 tx_win_center[0][0][8] = 0
4280 18:35:10.278075 tx_first_pass[0][0][8] = 0
4281 18:35:10.281363 tx_last_pass[0][0][8] = 0
4282 18:35:10.284751 tx_win_center[0][0][9] = 0
4283 18:35:10.285404 tx_first_pass[0][0][9] = 0
4284 18:35:10.287906 tx_last_pass[0][0][9] = 0
4285 18:35:10.291269 tx_win_center[0][0][10] = 0
4286 18:35:10.295060 tx_first_pass[0][0][10] = 0
4287 18:35:10.295485 tx_last_pass[0][0][10] = 0
4288 18:35:10.297965 tx_win_center[0][0][11] = 0
4289 18:35:10.301008 tx_first_pass[0][0][11] = 0
4290 18:35:10.301703 tx_last_pass[0][0][11] = 0
4291 18:35:10.304393 tx_win_center[0][0][12] = 0
4292 18:35:10.307837 tx_first_pass[0][0][12] = 0
4293 18:35:10.311247 tx_last_pass[0][0][12] = 0
4294 18:35:10.311668 tx_win_center[0][0][13] = 0
4295 18:35:10.314750 tx_first_pass[0][0][13] = 0
4296 18:35:10.317775 tx_last_pass[0][0][13] = 0
4297 18:35:10.321406 tx_win_center[0][0][14] = 0
4298 18:35:10.324277 tx_first_pass[0][0][14] = 0
4299 18:35:10.324695 tx_last_pass[0][0][14] = 0
4300 18:35:10.327403 tx_win_center[0][0][15] = 0
4301 18:35:10.330933 tx_first_pass[0][0][15] = 0
4302 18:35:10.334116 tx_last_pass[0][0][15] = 0
4303 18:35:10.334414 tx_win_center[0][1][0] = 0
4304 18:35:10.337704 tx_first_pass[0][1][0] = 0
4305 18:35:10.341171 tx_last_pass[0][1][0] = 0
4306 18:35:10.341607 tx_win_center[0][1][1] = 0
4307 18:35:10.344598 tx_first_pass[0][1][1] = 0
4308 18:35:10.348074 tx_last_pass[0][1][1] = 0
4309 18:35:10.350960 tx_win_center[0][1][2] = 0
4310 18:35:10.351265 tx_first_pass[0][1][2] = 0
4311 18:35:10.354314 tx_last_pass[0][1][2] = 0
4312 18:35:10.357851 tx_win_center[0][1][3] = 0
4313 18:35:10.361169 tx_first_pass[0][1][3] = 0
4314 18:35:10.361537 tx_last_pass[0][1][3] = 0
4315 18:35:10.364917 tx_win_center[0][1][4] = 0
4316 18:35:10.367969 tx_first_pass[0][1][4] = 0
4317 18:35:10.368593 tx_last_pass[0][1][4] = 0
4318 18:35:10.371209 tx_win_center[0][1][5] = 0
4319 18:35:10.374579 tx_first_pass[0][1][5] = 0
4320 18:35:10.377780 tx_last_pass[0][1][5] = 0
4321 18:35:10.378197 tx_win_center[0][1][6] = 0
4322 18:35:10.380956 tx_first_pass[0][1][6] = 0
4323 18:35:10.384215 tx_last_pass[0][1][6] = 0
4324 18:35:10.384635 tx_win_center[0][1][7] = 0
4325 18:35:10.387392 tx_first_pass[0][1][7] = 0
4326 18:35:10.391138 tx_last_pass[0][1][7] = 0
4327 18:35:10.394480 tx_win_center[0][1][8] = 0
4328 18:35:10.394997 tx_first_pass[0][1][8] = 0
4329 18:35:10.397496 tx_last_pass[0][1][8] = 0
4330 18:35:10.400815 tx_win_center[0][1][9] = 0
4331 18:35:10.404204 tx_first_pass[0][1][9] = 0
4332 18:35:10.404625 tx_last_pass[0][1][9] = 0
4333 18:35:10.407361 tx_win_center[0][1][10] = 0
4334 18:35:10.411027 tx_first_pass[0][1][10] = 0
4335 18:35:10.414234 tx_last_pass[0][1][10] = 0
4336 18:35:10.414739 tx_win_center[0][1][11] = 0
4337 18:35:10.417717 tx_first_pass[0][1][11] = 0
4338 18:35:10.421081 tx_last_pass[0][1][11] = 0
4339 18:35:10.424336 tx_win_center[0][1][12] = 0
4340 18:35:10.424890 tx_first_pass[0][1][12] = 0
4341 18:35:10.427625 tx_last_pass[0][1][12] = 0
4342 18:35:10.431271 tx_win_center[0][1][13] = 0
4343 18:35:10.433930 tx_first_pass[0][1][13] = 0
4344 18:35:10.434394 tx_last_pass[0][1][13] = 0
4345 18:35:10.437895 tx_win_center[0][1][14] = 0
4346 18:35:10.441335 tx_first_pass[0][1][14] = 0
4347 18:35:10.444308 tx_last_pass[0][1][14] = 0
4348 18:35:10.444867 tx_win_center[0][1][15] = 0
4349 18:35:10.447755 tx_first_pass[0][1][15] = 0
4350 18:35:10.450861 tx_last_pass[0][1][15] = 0
4351 18:35:10.454519 tx_win_center[1][0][0] = 0
4352 18:35:10.455084 tx_first_pass[1][0][0] = 0
4353 18:35:10.457675 tx_last_pass[1][0][0] = 0
4354 18:35:10.460943 tx_win_center[1][0][1] = 0
4355 18:35:10.461659 tx_first_pass[1][0][1] = 0
4356 18:35:10.464491 tx_last_pass[1][0][1] = 0
4357 18:35:10.467760 tx_win_center[1][0][2] = 0
4358 18:35:10.471132 tx_first_pass[1][0][2] = 0
4359 18:35:10.471695 tx_last_pass[1][0][2] = 0
4360 18:35:10.474197 tx_win_center[1][0][3] = 0
4361 18:35:10.477994 tx_first_pass[1][0][3] = 0
4362 18:35:10.480979 tx_last_pass[1][0][3] = 0
4363 18:35:10.481589 tx_win_center[1][0][4] = 0
4364 18:35:10.484462 tx_first_pass[1][0][4] = 0
4365 18:35:10.487882 tx_last_pass[1][0][4] = 0
4366 18:35:10.488434 tx_win_center[1][0][5] = 0
4367 18:35:10.490740 tx_first_pass[1][0][5] = 0
4368 18:35:10.494044 tx_last_pass[1][0][5] = 0
4369 18:35:10.497541 tx_win_center[1][0][6] = 0
4370 18:35:10.498027 tx_first_pass[1][0][6] = 0
4371 18:35:10.500863 tx_last_pass[1][0][6] = 0
4372 18:35:10.504411 tx_win_center[1][0][7] = 0
4373 18:35:10.507491 tx_first_pass[1][0][7] = 0
4374 18:35:10.507951 tx_last_pass[1][0][7] = 0
4375 18:35:10.510760 tx_win_center[1][0][8] = 0
4376 18:35:10.514190 tx_first_pass[1][0][8] = 0
4377 18:35:10.514850 tx_last_pass[1][0][8] = 0
4378 18:35:10.517225 tx_win_center[1][0][9] = 0
4379 18:35:10.520613 tx_first_pass[1][0][9] = 0
4380 18:35:10.523833 tx_last_pass[1][0][9] = 0
4381 18:35:10.524390 tx_win_center[1][0][10] = 0
4382 18:35:10.527161 tx_first_pass[1][0][10] = 0
4383 18:35:10.530560 tx_last_pass[1][0][10] = 0
4384 18:35:10.533875 tx_win_center[1][0][11] = 0
4385 18:35:10.534296 tx_first_pass[1][0][11] = 0
4386 18:35:10.537228 tx_last_pass[1][0][11] = 0
4387 18:35:10.540416 tx_win_center[1][0][12] = 0
4388 18:35:10.543857 tx_first_pass[1][0][12] = 0
4389 18:35:10.544383 tx_last_pass[1][0][12] = 0
4390 18:35:10.549054 tx_win_center[1][0][13] = 0
4391 18:35:10.550552 tx_first_pass[1][0][13] = 0
4392 18:35:10.553718 tx_last_pass[1][0][13] = 0
4393 18:35:10.554139 tx_win_center[1][0][14] = 0
4394 18:35:10.557236 tx_first_pass[1][0][14] = 0
4395 18:35:10.560563 tx_last_pass[1][0][14] = 0
4396 18:35:10.563747 tx_win_center[1][0][15] = 0
4397 18:35:10.564271 tx_first_pass[1][0][15] = 0
4398 18:35:10.567408 tx_last_pass[1][0][15] = 0
4399 18:35:10.570590 tx_win_center[1][1][0] = 0
4400 18:35:10.574071 tx_first_pass[1][1][0] = 0
4401 18:35:10.574598 tx_last_pass[1][1][0] = 0
4402 18:35:10.577302 tx_win_center[1][1][1] = 0
4403 18:35:10.580921 tx_first_pass[1][1][1] = 0
4404 18:35:10.581487 tx_last_pass[1][1][1] = 0
4405 18:35:10.584062 tx_win_center[1][1][2] = 0
4406 18:35:10.587529 tx_first_pass[1][1][2] = 0
4407 18:35:10.590735 tx_last_pass[1][1][2] = 0
4408 18:35:10.591256 tx_win_center[1][1][3] = 0
4409 18:35:10.593844 tx_first_pass[1][1][3] = 0
4410 18:35:10.597203 tx_last_pass[1][1][3] = 0
4411 18:35:10.597841 tx_win_center[1][1][4] = 0
4412 18:35:10.600925 tx_first_pass[1][1][4] = 0
4413 18:35:10.604415 tx_last_pass[1][1][4] = 0
4414 18:35:10.607587 tx_win_center[1][1][5] = 0
4415 18:35:10.608109 tx_first_pass[1][1][5] = 0
4416 18:35:10.610847 tx_last_pass[1][1][5] = 0
4417 18:35:10.614555 tx_win_center[1][1][6] = 0
4418 18:35:10.617237 tx_first_pass[1][1][6] = 0
4419 18:35:10.617697 tx_last_pass[1][1][6] = 0
4420 18:35:10.620967 tx_win_center[1][1][7] = 0
4421 18:35:10.624270 tx_first_pass[1][1][7] = 0
4422 18:35:10.624791 tx_last_pass[1][1][7] = 0
4423 18:35:10.627406 tx_win_center[1][1][8] = 0
4424 18:35:10.630643 tx_first_pass[1][1][8] = 0
4425 18:35:10.634108 tx_last_pass[1][1][8] = 0
4426 18:35:10.634532 tx_win_center[1][1][9] = 0
4427 18:35:10.637485 tx_first_pass[1][1][9] = 0
4428 18:35:10.640976 tx_last_pass[1][1][9] = 0
4429 18:35:10.641439 tx_win_center[1][1][10] = 0
4430 18:35:10.644193 tx_first_pass[1][1][10] = 0
4431 18:35:10.647865 tx_last_pass[1][1][10] = 0
4432 18:35:10.650829 tx_win_center[1][1][11] = 0
4433 18:35:10.651254 tx_first_pass[1][1][11] = 0
4434 18:35:10.654261 tx_last_pass[1][1][11] = 0
4435 18:35:10.657422 tx_win_center[1][1][12] = 0
4436 18:35:10.661001 tx_first_pass[1][1][12] = 0
4437 18:35:10.661569 tx_last_pass[1][1][12] = 0
4438 18:35:10.664632 tx_win_center[1][1][13] = 0
4439 18:35:10.667489 tx_first_pass[1][1][13] = 0
4440 18:35:10.670653 tx_last_pass[1][1][13] = 0
4441 18:35:10.671079 tx_win_center[1][1][14] = 0
4442 18:35:10.674172 tx_first_pass[1][1][14] = 0
4443 18:35:10.677772 tx_last_pass[1][1][14] = 0
4444 18:35:10.681117 tx_win_center[1][1][15] = 0
4445 18:35:10.684254 tx_first_pass[1][1][15] = 0
4446 18:35:10.684819 tx_last_pass[1][1][15] = 0
4447 18:35:10.687654 dump params rx window
4448 18:35:10.690861 rx_firspass[0][0][0] = 0
4449 18:35:10.691424 rx_lastpass[0][0][0] = 0
4450 18:35:10.694526 rx_firspass[0][0][1] = 0
4451 18:35:10.697755 rx_lastpass[0][0][1] = 0
4452 18:35:10.698395 rx_firspass[0][0][2] = 0
4453 18:35:10.700886 rx_lastpass[0][0][2] = 0
4454 18:35:10.703998 rx_firspass[0][0][3] = 0
4455 18:35:10.704564 rx_lastpass[0][0][3] = 0
4456 18:35:10.707662 rx_firspass[0][0][4] = 0
4457 18:35:10.710753 rx_lastpass[0][0][4] = 0
4458 18:35:10.711223 rx_firspass[0][0][5] = 0
4459 18:35:10.714104 rx_lastpass[0][0][5] = 0
4460 18:35:10.716941 rx_firspass[0][0][6] = 0
4461 18:35:10.720529 rx_lastpass[0][0][6] = 0
4462 18:35:10.721084 rx_firspass[0][0][7] = 0
4463 18:35:10.723587 rx_lastpass[0][0][7] = 0
4464 18:35:10.726919 rx_firspass[0][0][8] = 0
4465 18:35:10.727383 rx_lastpass[0][0][8] = 0
4466 18:35:10.730744 rx_firspass[0][0][9] = 0
4467 18:35:10.733630 rx_lastpass[0][0][9] = 0
4468 18:35:10.734083 rx_firspass[0][0][10] = 0
4469 18:35:10.737164 rx_lastpass[0][0][10] = 0
4470 18:35:10.740417 rx_firspass[0][0][11] = 0
4471 18:35:10.743721 rx_lastpass[0][0][11] = 0
4472 18:35:10.744257 rx_firspass[0][0][12] = 0
4473 18:35:10.747460 rx_lastpass[0][0][12] = 0
4474 18:35:10.750535 rx_firspass[0][0][13] = 0
4475 18:35:10.750961 rx_lastpass[0][0][13] = 0
4476 18:35:10.753490 rx_firspass[0][0][14] = 0
4477 18:35:10.757246 rx_lastpass[0][0][14] = 0
4478 18:35:10.757816 rx_firspass[0][0][15] = 0
4479 18:35:10.760406 rx_lastpass[0][0][15] = 0
4480 18:35:10.764161 rx_firspass[0][1][0] = 0
4481 18:35:10.767095 rx_lastpass[0][1][0] = 0
4482 18:35:10.767516 rx_firspass[0][1][1] = 0
4483 18:35:10.770156 rx_lastpass[0][1][1] = 0
4484 18:35:10.773429 rx_firspass[0][1][2] = 0
4485 18:35:10.773853 rx_lastpass[0][1][2] = 0
4486 18:35:10.777523 rx_firspass[0][1][3] = 0
4487 18:35:10.780689 rx_lastpass[0][1][3] = 0
4488 18:35:10.781112 rx_firspass[0][1][4] = 0
4489 18:35:10.783934 rx_lastpass[0][1][4] = 0
4490 18:35:10.787226 rx_firspass[0][1][5] = 0
4491 18:35:10.787754 rx_lastpass[0][1][5] = 0
4492 18:35:10.790675 rx_firspass[0][1][6] = 0
4493 18:35:10.794254 rx_lastpass[0][1][6] = 0
4494 18:35:10.794781 rx_firspass[0][1][7] = 0
4495 18:35:10.797636 rx_lastpass[0][1][7] = 0
4496 18:35:10.800544 rx_firspass[0][1][8] = 0
4497 18:35:10.803746 rx_lastpass[0][1][8] = 0
4498 18:35:10.804270 rx_firspass[0][1][9] = 0
4499 18:35:10.807767 rx_lastpass[0][1][9] = 0
4500 18:35:10.810303 rx_firspass[0][1][10] = 0
4501 18:35:10.810726 rx_lastpass[0][1][10] = 0
4502 18:35:10.813887 rx_firspass[0][1][11] = 0
4503 18:35:10.816700 rx_lastpass[0][1][11] = 0
4504 18:35:10.817126 rx_firspass[0][1][12] = 0
4505 18:35:10.820667 rx_lastpass[0][1][12] = 0
4506 18:35:10.823958 rx_firspass[0][1][13] = 0
4507 18:35:10.826840 rx_lastpass[0][1][13] = 0
4508 18:35:10.827263 rx_firspass[0][1][14] = 0
4509 18:35:10.830165 rx_lastpass[0][1][14] = 0
4510 18:35:10.833486 rx_firspass[0][1][15] = 0
4511 18:35:10.833908 rx_lastpass[0][1][15] = 0
4512 18:35:10.836567 rx_firspass[1][0][0] = 0
4513 18:35:10.839999 rx_lastpass[1][0][0] = 0
4514 18:35:10.843449 rx_firspass[1][0][1] = 0
4515 18:35:10.843869 rx_lastpass[1][0][1] = 0
4516 18:35:10.846946 rx_firspass[1][0][2] = 0
4517 18:35:10.850029 rx_lastpass[1][0][2] = 0
4518 18:35:10.850462 rx_firspass[1][0][3] = 0
4519 18:35:10.853881 rx_lastpass[1][0][3] = 0
4520 18:35:10.857050 rx_firspass[1][0][4] = 0
4521 18:35:10.857607 rx_lastpass[1][0][4] = 0
4522 18:35:10.860404 rx_firspass[1][0][5] = 0
4523 18:35:10.863424 rx_lastpass[1][0][5] = 0
4524 18:35:10.864085 rx_firspass[1][0][6] = 0
4525 18:35:10.866740 rx_lastpass[1][0][6] = 0
4526 18:35:10.870702 rx_firspass[1][0][7] = 0
4527 18:35:10.871123 rx_lastpass[1][0][7] = 0
4528 18:35:10.873673 rx_firspass[1][0][8] = 0
4529 18:35:10.876863 rx_lastpass[1][0][8] = 0
4530 18:35:10.877306 rx_firspass[1][0][9] = 0
4531 18:35:10.880670 rx_lastpass[1][0][9] = 0
4532 18:35:10.883902 rx_firspass[1][0][10] = 0
4533 18:35:10.887355 rx_lastpass[1][0][10] = 0
4534 18:35:10.887879 rx_firspass[1][0][11] = 0
4535 18:35:10.890836 rx_lastpass[1][0][11] = 0
4536 18:35:10.894026 rx_firspass[1][0][12] = 0
4537 18:35:10.894551 rx_lastpass[1][0][12] = 0
4538 18:35:10.897683 rx_firspass[1][0][13] = 0
4539 18:35:10.900971 rx_lastpass[1][0][13] = 0
4540 18:35:10.901532 rx_firspass[1][0][14] = 0
4541 18:35:10.904168 rx_lastpass[1][0][14] = 0
4542 18:35:10.907654 rx_firspass[1][0][15] = 0
4543 18:35:10.910631 rx_lastpass[1][0][15] = 0
4544 18:35:10.911148 rx_firspass[1][1][0] = 0
4545 18:35:10.914823 rx_lastpass[1][1][0] = 0
4546 18:35:10.916919 rx_firspass[1][1][1] = 0
4547 18:35:10.917385 rx_lastpass[1][1][1] = 0
4548 18:35:10.921088 rx_firspass[1][1][2] = 0
4549 18:35:10.924012 rx_lastpass[1][1][2] = 0
4550 18:35:10.924537 rx_firspass[1][1][3] = 0
4551 18:35:10.927378 rx_lastpass[1][1][3] = 0
4552 18:35:10.930638 rx_firspass[1][1][4] = 0
4553 18:35:10.933907 rx_lastpass[1][1][4] = 0
4554 18:35:10.934456 rx_firspass[1][1][5] = 0
4555 18:35:10.937315 rx_lastpass[1][1][5] = 0
4556 18:35:10.940319 rx_firspass[1][1][6] = 0
4557 18:35:10.940742 rx_lastpass[1][1][6] = 0
4558 18:35:10.943930 rx_firspass[1][1][7] = 0
4559 18:35:10.947425 rx_lastpass[1][1][7] = 0
4560 18:35:10.947953 rx_firspass[1][1][8] = 0
4561 18:35:10.950100 rx_lastpass[1][1][8] = 0
4562 18:35:10.953478 rx_firspass[1][1][9] = 0
4563 18:35:10.953902 rx_lastpass[1][1][9] = 0
4564 18:35:10.956896 rx_firspass[1][1][10] = 0
4565 18:35:10.960405 rx_lastpass[1][1][10] = 0
4566 18:35:10.963736 rx_firspass[1][1][11] = 0
4567 18:35:10.964181 rx_lastpass[1][1][11] = 0
4568 18:35:10.967238 rx_firspass[1][1][12] = 0
4569 18:35:10.970740 rx_lastpass[1][1][12] = 0
4570 18:35:10.971166 rx_firspass[1][1][13] = 0
4571 18:35:10.973229 rx_lastpass[1][1][13] = 0
4572 18:35:10.976884 rx_firspass[1][1][14] = 0
4573 18:35:10.980247 rx_lastpass[1][1][14] = 0
4574 18:35:10.980679 rx_firspass[1][1][15] = 0
4575 18:35:10.983614 rx_lastpass[1][1][15] = 0
4576 18:35:10.987269 dump params clk_delay
4577 18:35:10.987785 clk_delay[0] = 0
4578 18:35:10.988125 clk_delay[1] = 0
4579 18:35:10.990135 dump params dqs_delay
4580 18:35:10.994132 dqs_delay[0][0] = 0
4581 18:35:10.994659 dqs_delay[0][1] = 0
4582 18:35:10.997010 dqs_delay[1][0] = 0
4583 18:35:10.997580 dqs_delay[1][1] = 0
4584 18:35:11.000739 dump params delay_cell_unit = 762
4585 18:35:11.003755 dump source = 0x0
4586 18:35:11.004282 dump params frequency:800
4587 18:35:11.006912 dump params rank number:2
4588 18:35:11.007335
4589 18:35:11.010212 dump params write leveling
4590 18:35:11.013803 write leveling[0][0][0] = 0x0
4591 18:35:11.014326 write leveling[0][0][1] = 0x0
4592 18:35:11.017073 write leveling[0][1][0] = 0x0
4593 18:35:11.020272 write leveling[0][1][1] = 0x0
4594 18:35:11.023846 write leveling[1][0][0] = 0x0
4595 18:35:11.027115 write leveling[1][0][1] = 0x0
4596 18:35:11.027646 write leveling[1][1][0] = 0x0
4597 18:35:11.030136 write leveling[1][1][1] = 0x0
4598 18:35:11.033729 dump params cbt_cs
4599 18:35:11.034252 cbt_cs[0][0] = 0x0
4600 18:35:11.037303 cbt_cs[0][1] = 0x0
4601 18:35:11.037835 cbt_cs[1][0] = 0x0
4602 18:35:11.040502 cbt_cs[1][1] = 0x0
4603 18:35:11.040921 dump params cbt_mr12
4604 18:35:11.043786 cbt_mr12[0][0] = 0x0
4605 18:35:11.044370 cbt_mr12[0][1] = 0x0
4606 18:35:11.047627 cbt_mr12[1][0] = 0x0
4607 18:35:11.050788 cbt_mr12[1][1] = 0x0
4608 18:35:11.051320 dump params tx window
4609 18:35:11.053514 tx_center_min[0][0][0] = 0
4610 18:35:11.057356 tx_center_max[0][0][0] = 0
4611 18:35:11.057878 tx_center_min[0][0][1] = 0
4612 18:35:11.060539 tx_center_max[0][0][1] = 0
4613 18:35:11.063623 tx_center_min[0][1][0] = 0
4614 18:35:11.067333 tx_center_max[0][1][0] = 0
4615 18:35:11.067895 tx_center_min[0][1][1] = 0
4616 18:35:11.069997 tx_center_max[0][1][1] = 0
4617 18:35:11.073963 tx_center_min[1][0][0] = 0
4618 18:35:11.077313 tx_center_max[1][0][0] = 0
4619 18:35:11.077840 tx_center_min[1][0][1] = 0
4620 18:35:11.080056 tx_center_max[1][0][1] = 0
4621 18:35:11.083919 tx_center_min[1][1][0] = 0
4622 18:35:11.086884 tx_center_max[1][1][0] = 0
4623 18:35:11.087416 tx_center_min[1][1][1] = 0
4624 18:35:11.089997 tx_center_max[1][1][1] = 0
4625 18:35:11.093419 dump params tx window
4626 18:35:11.093936 tx_win_center[0][0][0] = 0
4627 18:35:11.096629 tx_first_pass[0][0][0] = 0
4628 18:35:11.099977 tx_last_pass[0][0][0] = 0
4629 18:35:11.103572 tx_win_center[0][0][1] = 0
4630 18:35:11.104101 tx_first_pass[0][0][1] = 0
4631 18:35:11.106591 tx_last_pass[0][0][1] = 0
4632 18:35:11.109935 tx_win_center[0][0][2] = 0
4633 18:35:11.110357 tx_first_pass[0][0][2] = 0
4634 18:35:11.113144 tx_last_pass[0][0][2] = 0
4635 18:35:11.116438 tx_win_center[0][0][3] = 0
4636 18:35:11.120431 tx_first_pass[0][0][3] = 0
4637 18:35:11.120856 tx_last_pass[0][0][3] = 0
4638 18:35:11.123587 tx_win_center[0][0][4] = 0
4639 18:35:11.127404 tx_first_pass[0][0][4] = 0
4640 18:35:11.127827 tx_last_pass[0][0][4] = 0
4641 18:35:11.129795 tx_win_center[0][0][5] = 0
4642 18:35:11.133047 tx_first_pass[0][0][5] = 0
4643 18:35:11.136419 tx_last_pass[0][0][5] = 0
4644 18:35:11.136681 tx_win_center[0][0][6] = 0
4645 18:35:11.139832 tx_first_pass[0][0][6] = 0
4646 18:35:11.143585 tx_last_pass[0][0][6] = 0
4647 18:35:11.146404 tx_win_center[0][0][7] = 0
4648 18:35:11.146667 tx_first_pass[0][0][7] = 0
4649 18:35:11.149609 tx_last_pass[0][0][7] = 0
4650 18:35:11.152844 tx_win_center[0][0][8] = 0
4651 18:35:11.156278 tx_first_pass[0][0][8] = 0
4652 18:35:11.156492 tx_last_pass[0][0][8] = 0
4653 18:35:11.160192 tx_win_center[0][0][9] = 0
4654 18:35:11.163508 tx_first_pass[0][0][9] = 0
4655 18:35:11.163727 tx_last_pass[0][0][9] = 0
4656 18:35:11.166579 tx_win_center[0][0][10] = 0
4657 18:35:11.169671 tx_first_pass[0][0][10] = 0
4658 18:35:11.173052 tx_last_pass[0][0][10] = 0
4659 18:35:11.173312 tx_win_center[0][0][11] = 0
4660 18:35:11.176928 tx_first_pass[0][0][11] = 0
4661 18:35:11.179524 tx_last_pass[0][0][11] = 0
4662 18:35:11.183024 tx_win_center[0][0][12] = 0
4663 18:35:11.183277 tx_first_pass[0][0][12] = 0
4664 18:35:11.186344 tx_last_pass[0][0][12] = 0
4665 18:35:11.189774 tx_win_center[0][0][13] = 0
4666 18:35:11.193057 tx_first_pass[0][0][13] = 0
4667 18:35:11.193398 tx_last_pass[0][0][13] = 0
4668 18:35:11.197165 tx_win_center[0][0][14] = 0
4669 18:35:11.199642 tx_first_pass[0][0][14] = 0
4670 18:35:11.202870 tx_last_pass[0][0][14] = 0
4671 18:35:11.203232 tx_win_center[0][0][15] = 0
4672 18:35:11.206513 tx_first_pass[0][0][15] = 0
4673 18:35:11.209721 tx_last_pass[0][0][15] = 0
4674 18:35:11.212958 tx_win_center[0][1][0] = 0
4675 18:35:11.213563 tx_first_pass[0][1][0] = 0
4676 18:35:11.216632 tx_last_pass[0][1][0] = 0
4677 18:35:11.219563 tx_win_center[0][1][1] = 0
4678 18:35:11.223606 tx_first_pass[0][1][1] = 0
4679 18:35:11.224179 tx_last_pass[0][1][1] = 0
4680 18:35:11.226365 tx_win_center[0][1][2] = 0
4681 18:35:11.229652 tx_first_pass[0][1][2] = 0
4682 18:35:11.230074 tx_last_pass[0][1][2] = 0
4683 18:35:11.233231 tx_win_center[0][1][3] = 0
4684 18:35:11.236853 tx_first_pass[0][1][3] = 0
4685 18:35:11.239758 tx_last_pass[0][1][3] = 0
4686 18:35:11.240182 tx_win_center[0][1][4] = 0
4687 18:35:11.243225 tx_first_pass[0][1][4] = 0
4688 18:35:11.246770 tx_last_pass[0][1][4] = 0
4689 18:35:11.250029 tx_win_center[0][1][5] = 0
4690 18:35:11.250553 tx_first_pass[0][1][5] = 0
4691 18:35:11.253251 tx_last_pass[0][1][5] = 0
4692 18:35:11.256500 tx_win_center[0][1][6] = 0
4693 18:35:11.257029 tx_first_pass[0][1][6] = 0
4694 18:35:11.259904 tx_last_pass[0][1][6] = 0
4695 18:35:11.263213 tx_win_center[0][1][7] = 0
4696 18:35:11.266482 tx_first_pass[0][1][7] = 0
4697 18:35:11.267000 tx_last_pass[0][1][7] = 0
4698 18:35:11.269892 tx_win_center[0][1][8] = 0
4699 18:35:11.273156 tx_first_pass[0][1][8] = 0
4700 18:35:11.276240 tx_last_pass[0][1][8] = 0
4701 18:35:11.276665 tx_win_center[0][1][9] = 0
4702 18:35:11.279505 tx_first_pass[0][1][9] = 0
4703 18:35:11.282872 tx_last_pass[0][1][9] = 0
4704 18:35:11.283293 tx_win_center[0][1][10] = 0
4705 18:35:11.286773 tx_first_pass[0][1][10] = 0
4706 18:35:11.289433 tx_last_pass[0][1][10] = 0
4707 18:35:11.292501 tx_win_center[0][1][11] = 0
4708 18:35:11.292582 tx_first_pass[0][1][11] = 0
4709 18:35:11.296138 tx_last_pass[0][1][11] = 0
4710 18:35:11.299700 tx_win_center[0][1][12] = 0
4711 18:35:11.302536 tx_first_pass[0][1][12] = 0
4712 18:35:11.302708 tx_last_pass[0][1][12] = 0
4713 18:35:11.305899 tx_win_center[0][1][13] = 0
4714 18:35:11.309092 tx_first_pass[0][1][13] = 0
4715 18:35:11.312899 tx_last_pass[0][1][13] = 0
4716 18:35:11.313083 tx_win_center[0][1][14] = 0
4717 18:35:11.315707 tx_first_pass[0][1][14] = 0
4718 18:35:11.319015 tx_last_pass[0][1][14] = 0
4719 18:35:11.322649 tx_win_center[0][1][15] = 0
4720 18:35:11.325673 tx_first_pass[0][1][15] = 0
4721 18:35:11.325838 tx_last_pass[0][1][15] = 0
4722 18:35:11.329019 tx_win_center[1][0][0] = 0
4723 18:35:11.332284 tx_first_pass[1][0][0] = 0
4724 18:35:11.332451 tx_last_pass[1][0][0] = 0
4725 18:35:11.335632 tx_win_center[1][0][1] = 0
4726 18:35:11.338983 tx_first_pass[1][0][1] = 0
4727 18:35:11.342691 tx_last_pass[1][0][1] = 0
4728 18:35:11.343014 tx_win_center[1][0][2] = 0
4729 18:35:11.345617 tx_first_pass[1][0][2] = 0
4730 18:35:11.349371 tx_last_pass[1][0][2] = 0
4731 18:35:11.352575 tx_win_center[1][0][3] = 0
4732 18:35:11.352996 tx_first_pass[1][0][3] = 0
4733 18:35:11.356147 tx_last_pass[1][0][3] = 0
4734 18:35:11.359444 tx_win_center[1][0][4] = 0
4735 18:35:11.359978 tx_first_pass[1][0][4] = 0
4736 18:35:11.363383 tx_last_pass[1][0][4] = 0
4737 18:35:11.366067 tx_win_center[1][0][5] = 0
4738 18:35:11.369358 tx_first_pass[1][0][5] = 0
4739 18:35:11.369882 tx_last_pass[1][0][5] = 0
4740 18:35:11.372713 tx_win_center[1][0][6] = 0
4741 18:35:11.375839 tx_first_pass[1][0][6] = 0
4742 18:35:11.376263 tx_last_pass[1][0][6] = 0
4743 18:35:11.379275 tx_win_center[1][0][7] = 0
4744 18:35:11.382968 tx_first_pass[1][0][7] = 0
4745 18:35:11.386085 tx_last_pass[1][0][7] = 0
4746 18:35:11.386529 tx_win_center[1][0][8] = 0
4747 18:35:11.389171 tx_first_pass[1][0][8] = 0
4748 18:35:11.392782 tx_last_pass[1][0][8] = 0
4749 18:35:11.395906 tx_win_center[1][0][9] = 0
4750 18:35:11.396331 tx_first_pass[1][0][9] = 0
4751 18:35:11.398929 tx_last_pass[1][0][9] = 0
4752 18:35:11.402466 tx_win_center[1][0][10] = 0
4753 18:35:11.405812 tx_first_pass[1][0][10] = 0
4754 18:35:11.406233 tx_last_pass[1][0][10] = 0
4755 18:35:11.409613 tx_win_center[1][0][11] = 0
4756 18:35:11.412662 tx_first_pass[1][0][11] = 0
4757 18:35:11.415733 tx_last_pass[1][0][11] = 0
4758 18:35:11.416156 tx_win_center[1][0][12] = 0
4759 18:35:11.419210 tx_first_pass[1][0][12] = 0
4760 18:35:11.422609 tx_last_pass[1][0][12] = 0
4761 18:35:11.425765 tx_win_center[1][0][13] = 0
4762 18:35:11.426206 tx_first_pass[1][0][13] = 0
4763 18:35:11.428977 tx_last_pass[1][0][13] = 0
4764 18:35:11.432179 tx_win_center[1][0][14] = 0
4765 18:35:11.435745 tx_first_pass[1][0][14] = 0
4766 18:35:11.436172 tx_last_pass[1][0][14] = 0
4767 18:35:11.439279 tx_win_center[1][0][15] = 0
4768 18:35:11.442329 tx_first_pass[1][0][15] = 0
4769 18:35:11.445706 tx_last_pass[1][0][15] = 0
4770 18:35:11.446123 tx_win_center[1][1][0] = 0
4771 18:35:11.449431 tx_first_pass[1][1][0] = 0
4772 18:35:11.452103 tx_last_pass[1][1][0] = 0
4773 18:35:11.452507 tx_win_center[1][1][1] = 0
4774 18:35:11.455554 tx_first_pass[1][1][1] = 0
4775 18:35:11.459597 tx_last_pass[1][1][1] = 0
4776 18:35:11.462069 tx_win_center[1][1][2] = 0
4777 18:35:11.462493 tx_first_pass[1][1][2] = 0
4778 18:35:11.465681 tx_last_pass[1][1][2] = 0
4779 18:35:11.468883 tx_win_center[1][1][3] = 0
4780 18:35:11.472301 tx_first_pass[1][1][3] = 0
4781 18:35:11.472816 tx_last_pass[1][1][3] = 0
4782 18:35:11.475475 tx_win_center[1][1][4] = 0
4783 18:35:11.478649 tx_first_pass[1][1][4] = 0
4784 18:35:11.479064 tx_last_pass[1][1][4] = 0
4785 18:35:11.482703 tx_win_center[1][1][5] = 0
4786 18:35:11.485549 tx_first_pass[1][1][5] = 0
4787 18:35:11.488815 tx_last_pass[1][1][5] = 0
4788 18:35:11.489346 tx_win_center[1][1][6] = 0
4789 18:35:11.492910 tx_first_pass[1][1][6] = 0
4790 18:35:11.495988 tx_last_pass[1][1][6] = 0
4791 18:35:11.496515 tx_win_center[1][1][7] = 0
4792 18:35:11.499633 tx_first_pass[1][1][7] = 0
4793 18:35:11.502754 tx_last_pass[1][1][7] = 0
4794 18:35:11.505684 tx_win_center[1][1][8] = 0
4795 18:35:11.506102 tx_first_pass[1][1][8] = 0
4796 18:35:11.509339 tx_last_pass[1][1][8] = 0
4797 18:35:11.512448 tx_win_center[1][1][9] = 0
4798 18:35:11.515924 tx_first_pass[1][1][9] = 0
4799 18:35:11.516339 tx_last_pass[1][1][9] = 0
4800 18:35:11.518957 tx_win_center[1][1][10] = 0
4801 18:35:11.522677 tx_first_pass[1][1][10] = 0
4802 18:35:11.526109 tx_last_pass[1][1][10] = 0
4803 18:35:11.526626 tx_win_center[1][1][11] = 0
4804 18:35:11.529526 tx_first_pass[1][1][11] = 0
4805 18:35:11.532196 tx_last_pass[1][1][11] = 0
4806 18:35:11.536018 tx_win_center[1][1][12] = 0
4807 18:35:11.536432 tx_first_pass[1][1][12] = 0
4808 18:35:11.538736 tx_last_pass[1][1][12] = 0
4809 18:35:11.542831 tx_win_center[1][1][13] = 0
4810 18:35:11.543348 tx_first_pass[1][1][13] = 0
4811 18:35:11.545699 tx_last_pass[1][1][13] = 0
4812 18:35:11.549047 tx_win_center[1][1][14] = 0
4813 18:35:11.552474 tx_first_pass[1][1][14] = 0
4814 18:35:11.552888 tx_last_pass[1][1][14] = 0
4815 18:35:11.556501 tx_win_center[1][1][15] = 0
4816 18:35:11.559532 tx_first_pass[1][1][15] = 0
4817 18:35:11.562556 tx_last_pass[1][1][15] = 0
4818 18:35:11.563073 dump params rx window
4819 18:35:11.566353 rx_firspass[0][0][0] = 0
4820 18:35:11.569155 rx_lastpass[0][0][0] = 0
4821 18:35:11.569606 rx_firspass[0][0][1] = 0
4822 18:35:11.572552 rx_lastpass[0][0][1] = 0
4823 18:35:11.575841 rx_firspass[0][0][2] = 0
4824 18:35:11.576360 rx_lastpass[0][0][2] = 0
4825 18:35:11.578973 rx_firspass[0][0][3] = 0
4826 18:35:11.582770 rx_lastpass[0][0][3] = 0
4827 18:35:11.585945 rx_firspass[0][0][4] = 0
4828 18:35:11.586455 rx_lastpass[0][0][4] = 0
4829 18:35:11.589069 rx_firspass[0][0][5] = 0
4830 18:35:11.592170 rx_lastpass[0][0][5] = 0
4831 18:35:11.592582 rx_firspass[0][0][6] = 0
4832 18:35:11.596086 rx_lastpass[0][0][6] = 0
4833 18:35:11.599131 rx_firspass[0][0][7] = 0
4834 18:35:11.599545 rx_lastpass[0][0][7] = 0
4835 18:35:11.602444 rx_firspass[0][0][8] = 0
4836 18:35:11.605649 rx_lastpass[0][0][8] = 0
4837 18:35:11.606074 rx_firspass[0][0][9] = 0
4838 18:35:11.608911 rx_lastpass[0][0][9] = 0
4839 18:35:11.612128 rx_firspass[0][0][10] = 0
4840 18:35:11.615646 rx_lastpass[0][0][10] = 0
4841 18:35:11.616168 rx_firspass[0][0][11] = 0
4842 18:35:11.618629 rx_lastpass[0][0][11] = 0
4843 18:35:11.622449 rx_firspass[0][0][12] = 0
4844 18:35:11.622975 rx_lastpass[0][0][12] = 0
4845 18:35:11.625293 rx_firspass[0][0][13] = 0
4846 18:35:11.629094 rx_lastpass[0][0][13] = 0
4847 18:35:11.632516 rx_firspass[0][0][14] = 0
4848 18:35:11.633040 rx_lastpass[0][0][14] = 0
4849 18:35:11.635592 rx_firspass[0][0][15] = 0
4850 18:35:11.638630 rx_lastpass[0][0][15] = 0
4851 18:35:11.639070 rx_firspass[0][1][0] = 0
4852 18:35:11.641893 rx_lastpass[0][1][0] = 0
4853 18:35:11.645855 rx_firspass[0][1][1] = 0
4854 18:35:11.646378 rx_lastpass[0][1][1] = 0
4855 18:35:11.649026 rx_firspass[0][1][2] = 0
4856 18:35:11.652046 rx_lastpass[0][1][2] = 0
4857 18:35:11.652577 rx_firspass[0][1][3] = 0
4858 18:35:11.655143 rx_lastpass[0][1][3] = 0
4859 18:35:11.658922 rx_firspass[0][1][4] = 0
4860 18:35:11.661950 rx_lastpass[0][1][4] = 0
4861 18:35:11.662476 rx_firspass[0][1][5] = 0
4862 18:35:11.665797 rx_lastpass[0][1][5] = 0
4863 18:35:11.668727 rx_firspass[0][1][6] = 0
4864 18:35:11.669534 rx_lastpass[0][1][6] = 0
4865 18:35:11.672290 rx_firspass[0][1][7] = 0
4866 18:35:11.675718 rx_lastpass[0][1][7] = 0
4867 18:35:11.676241 rx_firspass[0][1][8] = 0
4868 18:35:11.679055 rx_lastpass[0][1][8] = 0
4869 18:35:11.682446 rx_firspass[0][1][9] = 0
4870 18:35:11.682970 rx_lastpass[0][1][9] = 0
4871 18:35:11.685425 rx_firspass[0][1][10] = 0
4872 18:35:11.688993 rx_lastpass[0][1][10] = 0
4873 18:35:11.692350 rx_firspass[0][1][11] = 0
4874 18:35:11.692872 rx_lastpass[0][1][11] = 0
4875 18:35:11.695706 rx_firspass[0][1][12] = 0
4876 18:35:11.698543 rx_lastpass[0][1][12] = 0
4877 18:35:11.698966 rx_firspass[0][1][13] = 0
4878 18:35:11.701672 rx_lastpass[0][1][13] = 0
4879 18:35:11.705389 rx_firspass[0][1][14] = 0
4880 18:35:11.708748 rx_lastpass[0][1][14] = 0
4881 18:35:11.709389 rx_firspass[0][1][15] = 0
4882 18:35:11.712234 rx_lastpass[0][1][15] = 0
4883 18:35:11.715028 rx_firspass[1][0][0] = 0
4884 18:35:11.715450 rx_lastpass[1][0][0] = 0
4885 18:35:11.718916 rx_firspass[1][0][1] = 0
4886 18:35:11.721668 rx_lastpass[1][0][1] = 0
4887 18:35:11.722097 rx_firspass[1][0][2] = 0
4888 18:35:11.724975 rx_lastpass[1][0][2] = 0
4889 18:35:11.728731 rx_firspass[1][0][3] = 0
4890 18:35:11.729301 rx_lastpass[1][0][3] = 0
4891 18:35:11.731685 rx_firspass[1][0][4] = 0
4892 18:35:11.735523 rx_lastpass[1][0][4] = 0
4893 18:35:11.738354 rx_firspass[1][0][5] = 0
4894 18:35:11.738776 rx_lastpass[1][0][5] = 0
4895 18:35:11.741938 rx_firspass[1][0][6] = 0
4896 18:35:11.745444 rx_lastpass[1][0][6] = 0
4897 18:35:11.745963 rx_firspass[1][0][7] = 0
4898 18:35:11.749025 rx_lastpass[1][0][7] = 0
4899 18:35:11.751573 rx_firspass[1][0][8] = 0
4900 18:35:11.752013 rx_lastpass[1][0][8] = 0
4901 18:35:11.755350 rx_firspass[1][0][9] = 0
4902 18:35:11.758912 rx_lastpass[1][0][9] = 0
4903 18:35:11.759440 rx_firspass[1][0][10] = 0
4904 18:35:11.761617 rx_lastpass[1][0][10] = 0
4905 18:35:11.765432 rx_firspass[1][0][11] = 0
4906 18:35:11.768534 rx_lastpass[1][0][11] = 0
4907 18:35:11.769057 rx_firspass[1][0][12] = 0
4908 18:35:11.771996 rx_lastpass[1][0][12] = 0
4909 18:35:11.775639 rx_firspass[1][0][13] = 0
4910 18:35:11.776168 rx_lastpass[1][0][13] = 0
4911 18:35:11.778437 rx_firspass[1][0][14] = 0
4912 18:35:11.781726 rx_lastpass[1][0][14] = 0
4913 18:35:11.785208 rx_firspass[1][0][15] = 0
4914 18:35:11.785782 rx_lastpass[1][0][15] = 0
4915 18:35:11.788765 rx_firspass[1][1][0] = 0
4916 18:35:11.792045 rx_lastpass[1][1][0] = 0
4917 18:35:11.792570 rx_firspass[1][1][1] = 0
4918 18:35:11.795654 rx_lastpass[1][1][1] = 0
4919 18:35:11.798204 rx_firspass[1][1][2] = 0
4920 18:35:11.798629 rx_lastpass[1][1][2] = 0
4921 18:35:11.801522 rx_firspass[1][1][3] = 0
4922 18:35:11.805145 rx_lastpass[1][1][3] = 0
4923 18:35:11.805722 rx_firspass[1][1][4] = 0
4924 18:35:11.808381 rx_lastpass[1][1][4] = 0
4925 18:35:11.811971 rx_firspass[1][1][5] = 0
4926 18:35:11.812497 rx_lastpass[1][1][5] = 0
4927 18:35:11.814912 rx_firspass[1][1][6] = 0
4928 18:35:11.818609 rx_lastpass[1][1][6] = 0
4929 18:35:11.821752 rx_firspass[1][1][7] = 0
4930 18:35:11.822175 rx_lastpass[1][1][7] = 0
4931 18:35:11.824976 rx_firspass[1][1][8] = 0
4932 18:35:11.828414 rx_lastpass[1][1][8] = 0
4933 18:35:11.828962 rx_firspass[1][1][9] = 0
4934 18:35:11.831940 rx_lastpass[1][1][9] = 0
4935 18:35:11.835407 rx_firspass[1][1][10] = 0
4936 18:35:11.836007 rx_lastpass[1][1][10] = 0
4937 18:35:11.838210 rx_firspass[1][1][11] = 0
4938 18:35:11.841596 rx_lastpass[1][1][11] = 0
4939 18:35:11.845146 rx_firspass[1][1][12] = 0
4940 18:35:11.845845 rx_lastpass[1][1][12] = 0
4941 18:35:11.848275 rx_firspass[1][1][13] = 0
4942 18:35:11.851580 rx_lastpass[1][1][13] = 0
4943 18:35:11.852167 rx_firspass[1][1][14] = 0
4944 18:35:11.855016 rx_lastpass[1][1][14] = 0
4945 18:35:11.858442 rx_firspass[1][1][15] = 0
4946 18:35:11.861593 rx_lastpass[1][1][15] = 0
4947 18:35:11.862019 dump params clk_delay
4948 18:35:11.865342 clk_delay[0] = 0
4949 18:35:11.865868 clk_delay[1] = 0
4950 18:35:11.868269 dump params dqs_delay
4951 18:35:11.868795 dqs_delay[0][0] = 0
4952 18:35:11.871757 dqs_delay[0][1] = 0
4953 18:35:11.872308 dqs_delay[1][0] = 0
4954 18:35:11.875286 dqs_delay[1][1] = 0
4955 18:35:11.878284 dump params delay_cell_unit = 762
4956 18:35:11.878709 mt_set_emi_preloader end
4957 18:35:11.884850 [mt_mem_init] dram size: 0x100000000, rank number: 2
4958 18:35:11.888163 [complex_mem_test] start addr:0x40000000, len:20480
4959 18:35:11.925694 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4960 18:35:11.932209 [complex_mem_test] start addr:0x80000000, len:20480
4961 18:35:11.968084 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4962 18:35:11.974852 [complex_mem_test] start addr:0xc0000000, len:20480
4963 18:35:12.010569 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4964 18:35:12.017624 [complex_mem_test] start addr:0x56000000, len:8192
4965 18:35:12.033401 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4966 18:35:12.036870 ddr_geometry:1
4967 18:35:12.039775 [complex_mem_test] start addr:0x80000000, len:8192
4968 18:35:12.057905 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4969 18:35:12.060636 dram_init: dram init end (result: 0)
4970 18:35:12.067325 Successfully loaded DRAM blobs and ran DRAM calibration
4971 18:35:12.077476 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4972 18:35:12.078064 CBMEM:
4973 18:35:12.080974 IMD: root @ 00000000fffff000 254 entries.
4974 18:35:12.084084 IMD: root @ 00000000ffffec00 62 entries.
4975 18:35:12.091081 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4976 18:35:12.097449 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4977 18:35:12.100607 in-header: 03 a1 00 00 08 00 00 00
4978 18:35:12.103710 in-data: 84 60 60 10 00 00 00 00
4979 18:35:12.107584 Chrome EC: clear events_b mask to 0x0000000020004000
4980 18:35:12.114788 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4981 18:35:12.117779 in-header: 03 fd 00 00 00 00 00 00
4982 18:35:12.118241 in-data:
4983 18:35:12.124413 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4984 18:35:12.124958 CBFS @ 21000 size 3d4000
4985 18:35:12.131869 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4986 18:35:12.134333 CBFS: Locating 'fallback/ramstage'
4987 18:35:12.137647 CBFS: Found @ offset 10d40 size d563
4988 18:35:12.159149 read SPI 0x31d94 0xd547: 16672 us, 3274 KB/s, 26.192 Mbps
4989 18:35:12.171405 Accumulated console time in romstage 12884 ms
4990 18:35:12.171962
4991 18:35:12.172323
4992 18:35:12.181391 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4993 18:35:12.184668 ARM64: Exception handlers installed.
4994 18:35:12.185233 ARM64: Testing exception
4995 18:35:12.188179 ARM64: Done test exception
4996 18:35:12.191058 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4997 18:35:12.194634 Manufacturer: ef
4998 18:35:12.198038 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4999 18:35:12.204928 WARNING: RO_VPD is uninitialized or empty.
5000 18:35:12.207967 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5001 18:35:12.211120 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5002 18:35:12.221325 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5003 18:35:12.224103 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5004 18:35:12.230903 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5005 18:35:12.231461 Enumerating buses...
5006 18:35:12.237371 Show all devs... Before device enumeration.
5007 18:35:12.237833 Root Device: enabled 1
5008 18:35:12.240809 CPU_CLUSTER: 0: enabled 1
5009 18:35:12.241418 CPU: 00: enabled 1
5010 18:35:12.244457 Compare with tree...
5011 18:35:12.247548 Root Device: enabled 1
5012 18:35:12.248097 CPU_CLUSTER: 0: enabled 1
5013 18:35:12.250951 CPU: 00: enabled 1
5014 18:35:12.254136 Root Device scanning...
5015 18:35:12.254598 root_dev_scan_bus for Root Device
5016 18:35:12.257968 CPU_CLUSTER: 0 enabled
5017 18:35:12.261240 root_dev_scan_bus for Root Device done
5018 18:35:12.267973 scan_bus: scanning of bus Root Device took 10690 usecs
5019 18:35:12.268529 done
5020 18:35:12.270732 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5021 18:35:12.274235 Allocating resources...
5022 18:35:12.274788 Reading resources...
5023 18:35:12.277398 Root Device read_resources bus 0 link: 0
5024 18:35:12.284363 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5025 18:35:12.284920 CPU: 00 missing read_resources
5026 18:35:12.290978 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5027 18:35:12.294479 Root Device read_resources bus 0 link: 0 done
5028 18:35:12.297328 Done reading resources.
5029 18:35:12.300852 Show resources in subtree (Root Device)...After reading.
5030 18:35:12.304154 Root Device child on link 0 CPU_CLUSTER: 0
5031 18:35:12.307360 CPU_CLUSTER: 0 child on link 0 CPU: 00
5032 18:35:12.317415 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5033 18:35:12.317978 CPU: 00
5034 18:35:12.320841 Setting resources...
5035 18:35:12.323923 Root Device assign_resources, bus 0 link: 0
5036 18:35:12.327612 CPU_CLUSTER: 0 missing set_resources
5037 18:35:12.330692 Root Device assign_resources, bus 0 link: 0
5038 18:35:12.333942 Done setting resources.
5039 18:35:12.340795 Show resources in subtree (Root Device)...After assigning values.
5040 18:35:12.344344 Root Device child on link 0 CPU_CLUSTER: 0
5041 18:35:12.347407 CPU_CLUSTER: 0 child on link 0 CPU: 00
5042 18:35:12.357208 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5043 18:35:12.357810 CPU: 00
5044 18:35:12.360810 Done allocating resources.
5045 18:35:12.364390 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5046 18:35:12.367341 Enabling resources...
5047 18:35:12.367906 done.
5048 18:35:12.370352 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5049 18:35:12.373825 Initializing devices...
5050 18:35:12.374386 Root Device init ...
5051 18:35:12.377150 mainboard_init: Starting display init.
5052 18:35:12.380465 ADC[4]: Raw value=76494 ID=0
5053 18:35:12.403573 anx7625_power_on_init: Init interface.
5054 18:35:12.407446 anx7625_disable_pd_protocol: Disabled PD feature.
5055 18:35:12.413340 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5056 18:35:12.460299 anx7625_start_dp_work: Secure OCM version=00
5057 18:35:12.463649 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5058 18:35:12.480994 sp_tx_get_edid_block: EDID Block = 1
5059 18:35:12.598207 Extracted contents:
5060 18:35:12.601026 header: 00 ff ff ff ff ff ff 00
5061 18:35:12.604878 serial number: 06 af 5c 14 00 00 00 00 00 1a
5062 18:35:12.607706 version: 01 04
5063 18:35:12.611353 basic params: 95 1a 0e 78 02
5064 18:35:12.614745 chroma info: 99 85 95 55 56 92 28 22 50 54
5065 18:35:12.617918 established: 00 00 00
5066 18:35:12.625012 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5067 18:35:12.628070 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5068 18:35:12.634623 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5069 18:35:12.641483 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5070 18:35:12.647820 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5071 18:35:12.651301 extensions: 00
5072 18:35:12.651717 checksum: ae
5073 18:35:12.652047
5074 18:35:12.654574 Manufacturer: AUO Model 145c Serial Number 0
5075 18:35:12.657963 Made week 0 of 2016
5076 18:35:12.658374 EDID version: 1.4
5077 18:35:12.661503 Digital display
5078 18:35:12.665424 6 bits per primary color channel
5079 18:35:12.665945 DisplayPort interface
5080 18:35:12.668017 Maximum image size: 26 cm x 14 cm
5081 18:35:12.671083 Gamma: 220%
5082 18:35:12.671602 Check DPMS levels
5083 18:35:12.674708 Supported color formats: RGB 4:4:4
5084 18:35:12.677627 First detailed timing is preferred timing
5085 18:35:12.681368 Established timings supported:
5086 18:35:12.684264 Standard timings supported:
5087 18:35:12.684679 Detailed timings
5088 18:35:12.691237 Hex of detail: ce1d56ea50001a3030204600009010000018
5089 18:35:12.694221 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5090 18:35:12.697383 0556 0586 05a6 0640 hborder 0
5091 18:35:12.700662 0300 0304 030a 031a vborder 0
5092 18:35:12.704101 -hsync -vsync
5093 18:35:12.707302 Did detailed timing
5094 18:35:12.710465 Hex of detail: 0000000f0000000000000000000000000020
5095 18:35:12.713911 Manufacturer-specified data, tag 15
5096 18:35:12.720812 Hex of detail: 000000fe0041554f0a202020202020202020
5097 18:35:12.721230 ASCII string: AUO
5098 18:35:12.723958 Hex of detail: 000000fe004231313658414230312e34200a
5099 18:35:12.727333 ASCII string: B116XAB01.4
5100 18:35:12.727750 Checksum
5101 18:35:12.730581 Checksum: 0xae (valid)
5102 18:35:12.737235 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5103 18:35:12.737682 DSI data_rate: 457800000 bps
5104 18:35:12.745200 anx7625_parse_edid: set default k value to 0x3d for panel
5105 18:35:12.748845 anx7625_parse_edid: pixelclock(76300).
5106 18:35:12.751895 hactive(1366), hsync(32), hfp(48), hbp(154)
5107 18:35:12.755118 vactive(768), vsync(6), vfp(4), vbp(16)
5108 18:35:12.758338 anx7625_dsi_config: config dsi.
5109 18:35:12.766665 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5110 18:35:12.787463 anx7625_dsi_config: success to config DSI
5111 18:35:12.791402 anx7625_dp_start: MIPI phy setup OK.
5112 18:35:12.793986 [SSUSB] Setting up USB HOST controller...
5113 18:35:12.797537 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5114 18:35:12.798092 [SSUSB] phy power-on done.
5115 18:35:12.804371 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5116 18:35:12.807632 in-header: 03 fc 01 00 00 00 00 00
5117 18:35:12.808095 in-data:
5118 18:35:12.811032 handle_proto3_response: EC response with error code: 1
5119 18:35:12.814464 SPM: pcm index = 1
5120 18:35:12.818185 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5121 18:35:12.820942 CBFS @ 21000 size 3d4000
5122 18:35:12.827660 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5123 18:35:12.831049 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5124 18:35:12.834001 CBFS: Found @ offset 1e7c0 size 1026
5125 18:35:12.840932 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5126 18:35:12.844157 SPM: binary array size = 2988
5127 18:35:12.847618 SPM: version = pcm_allinone_v1.17.2_20180829
5128 18:35:12.850985 SPM binary loaded in 32 msecs
5129 18:35:12.858910 spm_kick_im_to_fetch: ptr = 000000004021eec2
5130 18:35:12.861669 spm_kick_im_to_fetch: len = 2988
5131 18:35:12.862269 SPM: spm_kick_pcm_to_run
5132 18:35:12.865178 SPM: spm_kick_pcm_to_run done
5133 18:35:12.868619 SPM: spm_init done in 52 msecs
5134 18:35:12.871802 Root Device init finished in 494996 usecs
5135 18:35:12.874840 CPU_CLUSTER: 0 init ...
5136 18:35:12.885213 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5137 18:35:12.888698 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5138 18:35:12.891783 CBFS @ 21000 size 3d4000
5139 18:35:12.895244 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5140 18:35:12.898067 CBFS: Locating 'sspm.bin'
5141 18:35:12.902129 CBFS: Found @ offset 208c0 size 41cb
5142 18:35:12.911670 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5143 18:35:12.919527 CPU_CLUSTER: 0 init finished in 42798 usecs
5144 18:35:12.920082 Devices initialized
5145 18:35:12.923310 Show all devs... After init.
5146 18:35:12.926210 Root Device: enabled 1
5147 18:35:12.926672 CPU_CLUSTER: 0: enabled 1
5148 18:35:12.929689 CPU: 00: enabled 1
5149 18:35:12.932853 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5150 18:35:12.936399 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5151 18:35:12.939877 ELOG: NV offset 0x558000 size 0x1000
5152 18:35:12.947252 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5153 18:35:12.953392 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5154 18:35:12.956827 ELOG: Event(17) added with size 13 at 2024-06-11 18:35:12 UTC
5155 18:35:12.963424 out: cmd=0x121: 03 db 21 01 00 00 00 00
5156 18:35:12.967300 in-header: 03 00 00 00 2c 00 00 00
5157 18:35:12.977000 in-data: 2a 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 88 44 0a 00 06 80 00 00 99 f6 00 00 06 80 00 00 2f 08 04 00 06 80 00 00 cd c3 04 00
5158 18:35:12.979989 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5159 18:35:12.983368 in-header: 03 19 00 00 08 00 00 00
5160 18:35:12.987339 in-data: a2 e0 47 00 13 00 00 00
5161 18:35:12.990147 Chrome EC: UHEPI supported
5162 18:35:12.996859 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5163 18:35:13.000661 in-header: 03 e1 00 00 08 00 00 00
5164 18:35:13.003622 in-data: 84 20 60 10 00 00 00 00
5165 18:35:13.006706 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5166 18:35:13.013496 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5167 18:35:13.016775 in-header: 03 e1 00 00 08 00 00 00
5168 18:35:13.020082 in-data: 84 20 60 10 00 00 00 00
5169 18:35:13.026954 ELOG: Event(A1) added with size 10 at 2024-06-11 18:35:12 UTC
5170 18:35:13.033554 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5171 18:35:13.036708 ELOG: Event(A0) added with size 9 at 2024-06-11 18:35:12 UTC
5172 18:35:13.043228 elog_add_boot_reason: Logged dev mode boot
5173 18:35:13.043768 Finalize devices...
5174 18:35:13.047195 Devices finalized
5175 18:35:13.049789 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5176 18:35:13.053439 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5177 18:35:13.060041 ELOG: Event(91) added with size 10 at 2024-06-11 18:35:12 UTC
5178 18:35:13.063141 Writing coreboot table at 0xffeda000
5179 18:35:13.066639 0. 0000000000114000-000000000011efff: RAMSTAGE
5180 18:35:13.073384 1. 0000000040000000-000000004023cfff: RAMSTAGE
5181 18:35:13.076971 2. 000000004023d000-00000000545fffff: RAM
5182 18:35:13.079976 3. 0000000054600000-000000005465ffff: BL31
5183 18:35:13.083227 4. 0000000054660000-00000000ffed9fff: RAM
5184 18:35:13.090091 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5185 18:35:13.093253 6. 0000000100000000-000000013fffffff: RAM
5186 18:35:13.097034 Passing 5 GPIOs to payload:
5187 18:35:13.100629 NAME | PORT | POLARITY | VALUE
5188 18:35:13.103559 write protect | 0x00000096 | low | high
5189 18:35:13.109783 EC in RW | 0x000000b1 | high | undefined
5190 18:35:13.113494 EC interrupt | 0x00000097 | low | undefined
5191 18:35:13.120432 TPM interrupt | 0x00000099 | high | undefined
5192 18:35:13.123262 speaker enable | 0x000000af | high | undefined
5193 18:35:13.126192 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5194 18:35:13.129579 in-header: 03 f7 00 00 02 00 00 00
5195 18:35:13.133254 in-data: 04 00
5196 18:35:13.133746 Board ID: 4
5197 18:35:13.136865 ADC[3]: Raw value=1034629 ID=8
5198 18:35:13.137462 RAM code: 8
5199 18:35:13.137830 SKU ID: 16
5200 18:35:13.142747 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5201 18:35:13.143296 CBFS @ 21000 size 3d4000
5202 18:35:13.149857 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5203 18:35:13.156426 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 7128
5204 18:35:13.156915 coreboot table: 940 bytes.
5205 18:35:13.163354 IMD ROOT 0. 00000000fffff000 00001000
5206 18:35:13.166855 IMD SMALL 1. 00000000ffffe000 00001000
5207 18:35:13.169888 CONSOLE 2. 00000000fffde000 00020000
5208 18:35:13.173323 FMAP 3. 00000000fffdd000 0000047c
5209 18:35:13.176706 TIME STAMP 4. 00000000fffdc000 00000910
5210 18:35:13.180003 RAMOOPS 5. 00000000ffedc000 00100000
5211 18:35:13.182894 COREBOOT 6. 00000000ffeda000 00002000
5212 18:35:13.186377 IMD small region:
5213 18:35:13.189740 IMD ROOT 0. 00000000ffffec00 00000400
5214 18:35:13.193230 VBOOT WORK 1. 00000000ffffeb00 00000100
5215 18:35:13.196785 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5216 18:35:13.200081 VPD 3. 00000000ffffea60 0000006c
5217 18:35:13.206132 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5218 18:35:13.213351 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5219 18:35:13.216944 in-header: 03 e1 00 00 08 00 00 00
5220 18:35:13.219511 in-data: 84 20 60 10 00 00 00 00
5221 18:35:13.223017 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5222 18:35:13.226309 CBFS @ 21000 size 3d4000
5223 18:35:13.229576 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5224 18:35:13.233160 CBFS: Locating 'fallback/payload'
5225 18:35:13.241482 CBFS: Found @ offset dc040 size 439a0
5226 18:35:13.328950 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5227 18:35:13.332478 Checking segment from ROM address 0x0000000040003a00
5228 18:35:13.339626 Checking segment from ROM address 0x0000000040003a1c
5229 18:35:13.342362 Loading segment from ROM address 0x0000000040003a00
5230 18:35:13.345802 code (compression=0)
5231 18:35:13.355564 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5232 18:35:13.362362 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5233 18:35:13.365779 it's not compressed!
5234 18:35:13.369111 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5235 18:35:13.375654 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5236 18:35:13.383304 Loading segment from ROM address 0x0000000040003a1c
5237 18:35:13.386560 Entry Point 0x0000000080000000
5238 18:35:13.387029 Loaded segments
5239 18:35:13.393117 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5240 18:35:13.395922 Jumping to boot code at 0000000080000000(00000000ffeda000)
5241 18:35:13.406215 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5242 18:35:13.409289 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5243 18:35:13.412575 CBFS @ 21000 size 3d4000
5244 18:35:13.419726 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5245 18:35:13.422642 CBFS: Locating 'fallback/bl31'
5246 18:35:13.425771 CBFS: Found @ offset 36dc0 size 5820
5247 18:35:13.437263 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5248 18:35:13.439933 Checking segment from ROM address 0x0000000040003a00
5249 18:35:13.446770 Checking segment from ROM address 0x0000000040003a1c
5250 18:35:13.450141 Loading segment from ROM address 0x0000000040003a00
5251 18:35:13.453291 code (compression=1)
5252 18:35:13.459889 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5253 18:35:13.470009 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5254 18:35:13.470123 using LZMA
5255 18:35:13.478491 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5256 18:35:13.485338 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5257 18:35:13.488525 Loading segment from ROM address 0x0000000040003a1c
5258 18:35:13.492360 Entry Point 0x0000000054601000
5259 18:35:13.492453 Loaded segments
5260 18:35:13.495205 NOTICE: MT8183 bl31_setup
5261 18:35:13.502267 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5262 18:35:13.505521 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5263 18:35:13.509057 INFO: [DEVAPC] dump DEVAPC registers:
5264 18:35:13.519157 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5265 18:35:13.525897 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5266 18:35:13.535675 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5267 18:35:13.542427 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5268 18:35:13.552403 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5269 18:35:13.558986 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5270 18:35:13.569122 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5271 18:35:13.575631 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5272 18:35:13.582289 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5273 18:35:13.592615 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5274 18:35:13.598900 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5275 18:35:13.608875 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5276 18:35:13.615244 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5277 18:35:13.622087 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5278 18:35:13.631838 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5279 18:35:13.638773 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5280 18:35:13.645111 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5281 18:35:13.651765 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5282 18:35:13.661797 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5283 18:35:13.668832 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5284 18:35:13.675170 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5285 18:35:13.681666 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5286 18:35:13.685156 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5287 18:35:13.688558 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5288 18:35:13.691618 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5289 18:35:13.695328 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5290 18:35:13.698468 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5291 18:35:13.705054 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5292 18:35:13.711860 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5293 18:35:13.711942 WARNING: region 0:
5294 18:35:13.715141 WARNING: apc:0x168, sa:0x0, ea:0xfff
5295 18:35:13.718298 WARNING: region 1:
5296 18:35:13.721838 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5297 18:35:13.721920 WARNING: region 2:
5298 18:35:13.725159 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5299 18:35:13.728320 WARNING: region 3:
5300 18:35:13.731892 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5301 18:35:13.731974 WARNING: region 4:
5302 18:35:13.738284 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5303 18:35:13.738367 WARNING: region 5:
5304 18:35:13.741605 WARNING: apc:0x0, sa:0x0, ea:0x0
5305 18:35:13.745156 WARNING: region 6:
5306 18:35:13.745239 WARNING: apc:0x0, sa:0x0, ea:0x0
5307 18:35:13.748240 WARNING: region 7:
5308 18:35:13.751610 WARNING: apc:0x0, sa:0x0, ea:0x0
5309 18:35:13.758685 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5310 18:35:13.761923 INFO: SPM: enable SPMC mode
5311 18:35:13.764871 NOTICE: spm_boot_init() start
5312 18:35:13.768240 NOTICE: spm_boot_init() end
5313 18:35:13.771678 INFO: BL31: Initializing runtime services
5314 18:35:13.775093 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5315 18:35:13.781782 INFO: BL31: Preparing for EL3 exit to normal world
5316 18:35:13.784797 INFO: Entry point address = 0x80000000
5317 18:35:13.788176 INFO: SPSR = 0x8
5318 18:35:13.808710
5319 18:35:13.808797
5320 18:35:13.808861
5321 18:35:13.809352 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5322 18:35:13.809449 start: 2.2.4 bootloader-commands (timeout 00:04:39) [common]
5323 18:35:13.809532 Setting prompt string to ['jacuzzi:']
5324 18:35:13.809609 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:39)
5325 18:35:13.811980 Starting depthcharge on Juniper...
5326 18:35:13.812062
5327 18:35:13.815747 vboot_handoff: creating legacy vboot_handoff structure
5328 18:35:13.815829
5329 18:35:13.818898 ec_init(0): CrosEC protocol v3 supported (544, 544)
5330 18:35:13.822087
5331 18:35:13.822168 Wipe memory regions:
5332 18:35:13.822232
5333 18:35:13.825187 [0x00000040000000, 0x00000054600000)
5334 18:35:13.868460
5335 18:35:13.868549 [0x00000054660000, 0x00000080000000)
5336 18:35:13.960158
5337 18:35:13.960273 [0x000000811994a0, 0x000000ffeda000)
5338 18:35:14.220798
5339 18:35:14.220932 [0x00000100000000, 0x00000140000000)
5340 18:35:14.353550
5341 18:35:14.356477 Initializing XHCI USB controller at 0x11200000.
5342 18:35:14.380209
5343 18:35:14.383308 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5344 18:35:14.383394
5345 18:35:14.383460
5346 18:35:14.383747 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5348 18:35:14.484111 jacuzzi: tftpboot 192.168.201.1 14291364/tftp-deploy-q1ya37ds/kernel/image.itb 14291364/tftp-deploy-q1ya37ds/kernel/cmdline
5349 18:35:14.484235 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5350 18:35:14.484317 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
5351 18:35:14.488772 tftpboot 192.168.201.1 14291364/tftp-deploy-q1ya37ds/kernel/image.ittp-deploy-q1ya37ds/kernel/cmdline
5352 18:35:14.488858
5353 18:35:14.488922 Waiting for link
5354 18:35:14.893590
5355 18:35:14.893726 R8152: Initializing
5356 18:35:14.893795
5357 18:35:14.896836 Version 9 (ocp_data = 6010)
5358 18:35:14.896918
5359 18:35:14.900352 R8152: Done initializing
5360 18:35:14.900434
5361 18:35:14.900498 Adding net device
5362 18:35:15.285959
5363 18:35:15.286104 done.
5364 18:35:15.286176
5365 18:35:15.286238 MAC: 00:e0:4c:71:a7:1f
5366 18:35:15.286297
5367 18:35:15.289022 Sending DHCP discover... done.
5368 18:35:15.289106
5369 18:35:15.292242 Waiting for reply... done.
5370 18:35:15.292326
5371 18:35:15.295697 Sending DHCP request... done.
5372 18:35:15.295786
5373 18:35:15.295851 Waiting for reply... done.
5374 18:35:15.295912
5375 18:35:15.299854 My ip is 192.168.201.23
5376 18:35:15.299936
5377 18:35:15.302880 The DHCP server ip is 192.168.201.1
5378 18:35:15.302963
5379 18:35:15.305934 TFTP server IP predefined by user: 192.168.201.1
5380 18:35:15.306017
5381 18:35:15.312475 Bootfile predefined by user: 14291364/tftp-deploy-q1ya37ds/kernel/image.itb
5382 18:35:15.312558
5383 18:35:15.315976 Sending tftp read request... done.
5384 18:35:15.316057
5385 18:35:15.319065 Waiting for the transfer...
5386 18:35:15.319149
5387 18:35:15.618364 00000000 ################################################################
5388 18:35:15.618505
5389 18:35:15.878179 00080000 ################################################################
5390 18:35:15.878323
5391 18:35:16.121523 00100000 ################################################################
5392 18:35:16.121666
5393 18:35:16.369125 00180000 ################################################################
5394 18:35:16.369301
5395 18:35:16.615860 00200000 ################################################################
5396 18:35:16.616009
5397 18:35:16.865548 00280000 ################################################################
5398 18:35:16.865693
5399 18:35:17.122504 00300000 ################################################################
5400 18:35:17.122652
5401 18:35:17.388173 00380000 ################################################################
5402 18:35:17.388323
5403 18:35:17.647189 00400000 ################################################################
5404 18:35:17.647323
5405 18:35:17.899172 00480000 ################################################################
5406 18:35:17.899312
5407 18:35:18.151807 00500000 ################################################################
5408 18:35:18.151944
5409 18:35:18.403812 00580000 ################################################################
5410 18:35:18.403952
5411 18:35:18.656364 00600000 ################################################################
5412 18:35:18.656508
5413 18:35:18.906302 00680000 ################################################################
5414 18:35:18.906448
5415 18:35:19.152867 00700000 ################################################################
5416 18:35:19.153013
5417 18:35:19.403951 00780000 ################################################################
5418 18:35:19.404094
5419 18:35:19.653056 00800000 ################################################################
5420 18:35:19.653198
5421 18:35:19.899518 00880000 ################################################################
5422 18:35:19.899659
5423 18:35:20.145681 00900000 ################################################################
5424 18:35:20.145829
5425 18:35:20.395208 00980000 ################################################################
5426 18:35:20.395369
5427 18:35:20.641019 00a00000 ################################################################
5428 18:35:20.641199
5429 18:35:20.889517 00a80000 ################################################################
5430 18:35:20.889657
5431 18:35:21.142762 00b00000 ################################################################
5432 18:35:21.142901
5433 18:35:21.394662 00b80000 ################################################################
5434 18:35:21.394814
5435 18:35:21.662303 00c00000 ################################################################
5436 18:35:21.662437
5437 18:35:21.926622 00c80000 ################################################################
5438 18:35:21.926751
5439 18:35:22.178801 00d00000 ################################################################
5440 18:35:22.178932
5441 18:35:22.431628 00d80000 ################################################################
5442 18:35:22.431763
5443 18:35:22.680152 00e00000 ################################################################
5444 18:35:22.680314
5445 18:35:22.932208 00e80000 ################################################################
5446 18:35:22.932338
5447 18:35:23.180633 00f00000 ################################################################
5448 18:35:23.180796
5449 18:35:23.430134 00f80000 ################################################################
5450 18:35:23.430265
5451 18:35:23.674843 01000000 ################################################################
5452 18:35:23.674974
5453 18:35:23.925251 01080000 ################################################################
5454 18:35:23.925418
5455 18:35:24.174426 01100000 ################################################################
5456 18:35:24.174552
5457 18:35:24.423069 01180000 ################################################################
5458 18:35:24.423197
5459 18:35:24.669120 01200000 ################################################################
5460 18:35:24.669310
5461 18:35:24.916159 01280000 ################################################################
5462 18:35:24.916283
5463 18:35:25.165357 01300000 ################################################################
5464 18:35:25.165486
5465 18:35:25.414915 01380000 ################################################################
5466 18:35:25.415052
5467 18:35:25.665111 01400000 ################################################################
5468 18:35:25.665244
5469 18:35:25.912475 01480000 ################################################################
5470 18:35:25.912612
5471 18:35:26.162559 01500000 ################################################################
5472 18:35:26.162691
5473 18:35:26.410968 01580000 ################################################################
5474 18:35:26.411101
5475 18:35:26.654215 01600000 ################################################################
5476 18:35:26.654353
5477 18:35:26.907571 01680000 ################################################################
5478 18:35:26.907740
5479 18:35:27.160208 01700000 ################################################################
5480 18:35:27.160393
5481 18:35:27.411861 01780000 ################################################################
5482 18:35:27.411993
5483 18:35:27.661842 01800000 ################################################################
5484 18:35:27.661982
5485 18:35:27.918375 01880000 ################################################################
5486 18:35:27.918504
5487 18:35:28.167181 01900000 ################################################################
5488 18:35:28.167312
5489 18:35:28.410434 01980000 ################################################################
5490 18:35:28.410565
5491 18:35:28.656108 01a00000 ################################################################
5492 18:35:28.656238
5493 18:35:28.907242 01a80000 ################################################################
5494 18:35:28.907369
5495 18:35:29.159326 01b00000 ################################################################
5496 18:35:29.159457
5497 18:35:29.407334 01b80000 ################################################################
5498 18:35:29.407467
5499 18:35:29.653522 01c00000 ################################################################
5500 18:35:29.653652
5501 18:35:29.904682 01c80000 ################################################################
5502 18:35:29.904814
5503 18:35:30.152789 01d00000 ################################################################
5504 18:35:30.152924
5505 18:35:30.399933 01d80000 ################################################################
5506 18:35:30.400069
5507 18:35:30.650852 01e00000 ################################################################
5508 18:35:30.650983
5509 18:35:30.901043 01e80000 ################################################################
5510 18:35:30.901174
5511 18:35:31.149525 01f00000 ################################################################
5512 18:35:31.149653
5513 18:35:31.399474 01f80000 ################################################################
5514 18:35:31.399640
5515 18:35:31.649941 02000000 ################################################################
5516 18:35:31.650079
5517 18:35:31.904819 02080000 ################################################################
5518 18:35:31.904976
5519 18:35:32.157532 02100000 ################################################################
5520 18:35:32.157664
5521 18:35:32.410266 02180000 ################################################################
5522 18:35:32.410420
5523 18:35:32.659772 02200000 ################################################################
5524 18:35:32.659935
5525 18:35:32.907703 02280000 ################################################################
5526 18:35:32.907832
5527 18:35:33.157719 02300000 ################################################################
5528 18:35:33.157895
5529 18:35:33.403062 02380000 ################################################################
5530 18:35:33.403203
5531 18:35:33.656142 02400000 ################################################################
5532 18:35:33.656276
5533 18:35:33.902679 02480000 ################################################################
5534 18:35:33.902819
5535 18:35:34.147682 02500000 ################################################################
5536 18:35:34.147819
5537 18:35:34.395989 02580000 ################################################################
5538 18:35:34.396165
5539 18:35:34.646510 02600000 ################################################################
5540 18:35:34.646640
5541 18:35:34.893908 02680000 ################################################################
5542 18:35:34.894040
5543 18:35:35.144255 02700000 ################################################################
5544 18:35:35.144385
5545 18:35:35.391172 02780000 ################################################################
5546 18:35:35.391304
5547 18:35:35.644498 02800000 ################################################################
5548 18:35:35.644625
5549 18:35:35.894395 02880000 ################################################################
5550 18:35:35.894549
5551 18:35:36.142961 02900000 ################################################################
5552 18:35:36.143086
5553 18:35:36.391044 02980000 ################################################################
5554 18:35:36.391184
5555 18:35:36.644711 02a00000 ################################################################
5556 18:35:36.644845
5557 18:35:36.908359 02a80000 ################################################################
5558 18:35:36.908521
5559 18:35:37.171773 02b00000 ################################################################
5560 18:35:37.171936
5561 18:35:37.433007 02b80000 ################################################################
5562 18:35:37.433140
5563 18:35:37.689901 02c00000 ################################################################
5564 18:35:37.690067
5565 18:35:37.960886 02c80000 ################################################################
5566 18:35:37.961019
5567 18:35:38.221357 02d00000 ################################################################
5568 18:35:38.221491
5569 18:35:38.485338 02d80000 ################################################################
5570 18:35:38.485480
5571 18:35:38.749110 02e00000 ################################################################
5572 18:35:38.749333
5573 18:35:39.010611 02e80000 ################################################################
5574 18:35:39.010752
5575 18:35:39.269773 02f00000 ################################################################
5576 18:35:39.269913
5577 18:35:39.525875 02f80000 ################################################################
5578 18:35:39.526039
5579 18:35:39.785508 03000000 ################################################################
5580 18:35:39.785715
5581 18:35:40.056793 03080000 ################################################################
5582 18:35:40.056961
5583 18:35:40.322978 03100000 ################################################################
5584 18:35:40.323126
5585 18:35:40.573289 03180000 ################################################################
5586 18:35:40.573448
5587 18:35:40.834410 03200000 ################################################################
5588 18:35:40.834552
5589 18:35:41.100362 03280000 ################################################################
5590 18:35:41.100501
5591 18:35:41.367865 03300000 ################################################################
5592 18:35:41.368006
5593 18:35:41.567844 03380000 ################################################# done.
5594 18:35:41.567991
5595 18:35:41.571568 The bootfile was 54397322 bytes long.
5596 18:35:41.571655
5597 18:35:41.574377 Sending tftp read request... done.
5598 18:35:41.574463
5599 18:35:41.577773 Waiting for the transfer...
5600 18:35:41.577855
5601 18:35:41.577921 00000000 # done.
5602 18:35:41.577984
5603 18:35:41.587470 Command line loaded dynamically from TFTP file: 14291364/tftp-deploy-q1ya37ds/kernel/cmdline
5604 18:35:41.587554
5605 18:35:41.604274 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5606 18:35:41.604363
5607 18:35:41.604428 Loading FIT.
5608 18:35:41.604490
5609 18:35:41.607488 Image ramdisk-1 has 41212475 bytes.
5610 18:35:41.607570
5611 18:35:41.610923 Image fdt-1 has 57695 bytes.
5612 18:35:41.611005
5613 18:35:41.614096 Image kernel-1 has 13125101 bytes.
5614 18:35:41.614178
5615 18:35:41.620921 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5616 18:35:41.621026
5617 18:35:41.634032 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5618 18:35:41.634115
5619 18:35:41.640895 Choosing best match conf-1 for compat google,juniper-sku16.
5620 18:35:41.641005
5621 18:35:41.683469 Connected to device vid:did:rid of 1ae0:0028:00
5622 18:35:41.693559
5623 18:35:41.696660 tpm_get_response: command 0x17b, return code 0x0
5624 18:35:41.696744
5625 18:35:41.700149 tpm_cleanup: add release locality here.
5626 18:35:41.700232
5627 18:35:41.703457 Shutting down all USB controllers.
5628 18:35:41.703540
5629 18:35:41.706762 Removing current net device
5630 18:35:41.706844
5631 18:35:41.710108 Exiting depthcharge with code 4 at timestamp: 44345508
5632 18:35:41.710191
5633 18:35:41.714118 LZMA decompressing kernel-1 to 0x80193568
5634 18:35:41.714200
5635 18:35:41.720090 LZMA decompressing kernel-1 to 0x40000000
5636 18:35:43.584726
5637 18:35:43.584870 jumping to kernel
5638 18:35:43.585438 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
5639 18:35:43.585540 start: 2.2.5 auto-login-action (timeout 00:04:09) [common]
5640 18:35:43.585618 Setting prompt string to ['Linux version [0-9]']
5641 18:35:43.585688 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5642 18:35:43.585756 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5643 18:35:43.660183
5644 18:35:43.663148 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5645 18:35:43.666890 start: 2.2.5.1 login-action (timeout 00:04:09) [common]
5646 18:35:43.666987 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5647 18:35:43.667059 Setting prompt string to []
5648 18:35:43.667136 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5649 18:35:43.667209 Using line separator: #'\n'#
5650 18:35:43.667268 No login prompt set.
5651 18:35:43.667328 Parsing kernel messages
5652 18:35:43.667383 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5653 18:35:43.667486 [login-action] Waiting for messages, (timeout 00:04:09)
5654 18:35:43.667551 Waiting using forced prompt support (timeout 00:02:05)
5655 18:35:43.686398 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j225340-arm64-gcc-10-defconfig-arm64-chromebook-x2t4v) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 11 17:44:14 UTC 2024
5656 18:35:43.689716 [ 0.000000] random: crng init done
5657 18:35:43.696520 [ 0.000000] Machine model: Google juniper sku16 board
5658 18:35:43.696604 [ 0.000000] efi: UEFI not found.
5659 18:35:43.706489 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5660 18:35:43.713227 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5661 18:35:43.723216 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5662 18:35:43.726292 [ 0.000000] printk: bootconsole [mtk8250] enabled
5663 18:35:43.734624 [ 0.000000] NUMA: No NUMA configuration found
5664 18:35:43.741524 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5665 18:35:43.747840 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5666 18:35:43.747924 [ 0.000000] Zone ranges:
5667 18:35:43.754221 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5668 18:35:43.757689 [ 0.000000] DMA32 empty
5669 18:35:43.764274 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5670 18:35:43.767826 [ 0.000000] Movable zone start for each node
5671 18:35:43.771266 [ 0.000000] Early memory node ranges
5672 18:35:43.777513 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5673 18:35:43.784166 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5674 18:35:43.791326 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5675 18:35:43.797408 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5676 18:35:43.804420 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5677 18:35:43.810650 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5678 18:35:43.827062 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5679 18:35:43.833877 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5680 18:35:43.840580 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5681 18:35:43.843782 [ 0.000000] psci: probing for conduit method from DT.
5682 18:35:43.850163 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5683 18:35:43.853646 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5684 18:35:43.860063 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5685 18:35:43.863361 [ 0.000000] psci: SMC Calling Convention v1.1
5686 18:35:43.870308 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5687 18:35:43.873227 [ 0.000000] Detected VIPT I-cache on CPU0
5688 18:35:43.880708 [ 0.000000] CPU features: detected: GIC system register CPU interface
5689 18:35:43.886805 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5690 18:35:43.893637 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5691 18:35:43.900338 [ 0.000000] CPU features: detected: ARM erratum 845719
5692 18:35:43.903392 [ 0.000000] alternatives: applying boot alternatives
5693 18:35:43.906581 [ 0.000000] Fallback order for Node 0: 0
5694 18:35:43.913224 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5695 18:35:43.916890 [ 0.000000] Policy zone: Normal
5696 18:35:43.936640 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5697 18:35:43.950079 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5698 18:35:43.956295 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5699 18:35:43.966377 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5700 18:35:43.972815 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5701 18:35:43.975889 <6>[ 0.000000] software IO TLB: area num 8.
5702 18:35:44.001747 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5703 18:35:44.059848 <6>[ 0.000000] Memory: 3874828K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 283636K reserved, 32768K cma-reserved)
5704 18:35:44.066053 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5705 18:35:44.072738 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5706 18:35:44.076070 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5707 18:35:44.083014 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5708 18:35:44.089162 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5709 18:35:44.092911 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5710 18:35:44.102493 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5711 18:35:44.109548 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5712 18:35:44.115977 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5713 18:35:44.125925 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5714 18:35:44.129178 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5715 18:35:44.132561 <6>[ 0.000000] GICv3: 640 SPIs implemented
5716 18:35:44.139106 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5717 18:35:44.142645 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5718 18:35:44.149235 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5719 18:35:44.155673 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5720 18:35:44.166265 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5721 18:35:44.179092 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5722 18:35:44.185652 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5723 18:35:44.196673 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5724 18:35:44.210166 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5725 18:35:44.216561 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5726 18:35:44.223258 <6>[ 0.009480] Console: colour dummy device 80x25
5727 18:35:44.226903 <6>[ 0.014519] printk: console [tty1] enabled
5728 18:35:44.237210 <6>[ 0.018903] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5729 18:35:44.243607 <6>[ 0.029368] pid_max: default: 32768 minimum: 301
5730 18:35:44.246872 <6>[ 0.034249] LSM: Security Framework initializing
5731 18:35:44.257272 <6>[ 0.039166] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5732 18:35:44.263622 <6>[ 0.046789] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5733 18:35:44.270077 <4>[ 0.055666] cacheinfo: Unable to detect cache hierarchy for CPU 0
5734 18:35:44.280008 <6>[ 0.062292] cblist_init_generic: Setting adjustable number of callback queues.
5735 18:35:44.283491 <6>[ 0.069738] cblist_init_generic: Setting shift to 3 and lim to 1.
5736 18:35:44.293294 <6>[ 0.076091] cblist_init_generic: Setting adjustable number of callback queues.
5737 18:35:44.299934 <6>[ 0.083537] cblist_init_generic: Setting shift to 3 and lim to 1.
5738 18:35:44.303276 <6>[ 0.089936] rcu: Hierarchical SRCU implementation.
5739 18:35:44.309984 <6>[ 0.094962] rcu: Max phase no-delay instances is 1000.
5740 18:35:44.316962 <6>[ 0.102896] EFI services will not be available.
5741 18:35:44.320463 <6>[ 0.107843] smp: Bringing up secondary CPUs ...
5742 18:35:44.330520 <6>[ 0.113068] Detected VIPT I-cache on CPU1
5743 18:35:44.337639 <4>[ 0.113114] cacheinfo: Unable to detect cache hierarchy for CPU 1
5744 18:35:44.343692 <6>[ 0.113124] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5745 18:35:44.350572 <6>[ 0.113155] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5746 18:35:44.353617 <6>[ 0.113637] Detected VIPT I-cache on CPU2
5747 18:35:44.360326 <4>[ 0.113668] cacheinfo: Unable to detect cache hierarchy for CPU 2
5748 18:35:44.367225 <6>[ 0.113673] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5749 18:35:44.373469 <6>[ 0.113686] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5750 18:35:44.377047 <6>[ 0.114132] Detected VIPT I-cache on CPU3
5751 18:35:44.383357 <4>[ 0.114162] cacheinfo: Unable to detect cache hierarchy for CPU 3
5752 18:35:44.393379 <6>[ 0.114167] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5753 18:35:44.400005 <6>[ 0.114178] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5754 18:35:44.403599 <6>[ 0.114754] CPU features: detected: Spectre-v2
5755 18:35:44.406694 <6>[ 0.114764] CPU features: detected: Spectre-BHB
5756 18:35:44.413428 <6>[ 0.114768] CPU features: detected: ARM erratum 858921
5757 18:35:44.416803 <6>[ 0.114774] Detected VIPT I-cache on CPU4
5758 18:35:44.423324 <4>[ 0.114822] cacheinfo: Unable to detect cache hierarchy for CPU 4
5759 18:35:44.430050 <6>[ 0.114829] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5760 18:35:44.436553 <6>[ 0.114837] arch_timer: Enabling local workaround for ARM erratum 858921
5761 18:35:44.443619 <6>[ 0.114847] arch_timer: CPU4: Trapping CNTVCT access
5762 18:35:44.450185 <6>[ 0.114855] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5763 18:35:44.453169 <6>[ 0.115340] Detected VIPT I-cache on CPU5
5764 18:35:44.460087 <4>[ 0.115381] cacheinfo: Unable to detect cache hierarchy for CPU 5
5765 18:35:44.467141 <6>[ 0.115387] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5766 18:35:44.473781 <6>[ 0.115394] arch_timer: Enabling local workaround for ARM erratum 858921
5767 18:35:44.480086 <6>[ 0.115400] arch_timer: CPU5: Trapping CNTVCT access
5768 18:35:44.486661 <6>[ 0.115405] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5769 18:35:44.490041 <6>[ 0.115840] Detected VIPT I-cache on CPU6
5770 18:35:44.497067 <4>[ 0.115886] cacheinfo: Unable to detect cache hierarchy for CPU 6
5771 18:35:44.503348 <6>[ 0.115892] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5772 18:35:44.510586 <6>[ 0.115900] arch_timer: Enabling local workaround for ARM erratum 858921
5773 18:35:44.516746 <6>[ 0.115906] arch_timer: CPU6: Trapping CNTVCT access
5774 18:35:44.523048 <6>[ 0.115911] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5775 18:35:44.526766 <6>[ 0.116441] Detected VIPT I-cache on CPU7
5776 18:35:44.533023 <4>[ 0.116484] cacheinfo: Unable to detect cache hierarchy for CPU 7
5777 18:35:44.539948 <6>[ 0.116490] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5778 18:35:44.549449 <6>[ 0.116497] arch_timer: Enabling local workaround for ARM erratum 858921
5779 18:35:44.552658 <6>[ 0.116503] arch_timer: CPU7: Trapping CNTVCT access
5780 18:35:44.559672 <6>[ 0.116508] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5781 18:35:44.562806 <6>[ 0.116556] smp: Brought up 1 node, 8 CPUs
5782 18:35:44.569679 <6>[ 0.355453] SMP: Total of 8 processors activated.
5783 18:35:44.576000 <6>[ 0.360388] CPU features: detected: 32-bit EL0 Support
5784 18:35:44.579716 <6>[ 0.365767] CPU features: detected: 32-bit EL1 Support
5785 18:35:44.586386 <6>[ 0.371136] CPU features: detected: CRC32 instructions
5786 18:35:44.589382 <6>[ 0.376561] CPU: All CPU(s) started at EL2
5787 18:35:44.596224 <6>[ 0.380900] alternatives: applying system-wide alternatives
5788 18:35:44.603624 <6>[ 0.388920] devtmpfs: initialized
5789 18:35:44.615411 <6>[ 0.397863] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5790 18:35:44.624984 <6>[ 0.407811] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5791 18:35:44.628529 <6>[ 0.415540] pinctrl core: initialized pinctrl subsystem
5792 18:35:44.636375 <6>[ 0.422661] DMI not present or invalid.
5793 18:35:44.643115 <6>[ 0.427030] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5794 18:35:44.649855 <6>[ 0.433926] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5795 18:35:44.659939 <6>[ 0.441438] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5796 18:35:44.666502 <6>[ 0.449609] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5797 18:35:44.673088 <6>[ 0.457754] audit: initializing netlink subsys (disabled)
5798 18:35:44.679648 <5>[ 0.463436] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5799 18:35:44.686374 <6>[ 0.464403] thermal_sys: Registered thermal governor 'step_wise'
5800 18:35:44.693049 <6>[ 0.471388] thermal_sys: Registered thermal governor 'power_allocator'
5801 18:35:44.696645 <6>[ 0.477636] cpuidle: using governor menu
5802 18:35:44.703337 <6>[ 0.488580] NET: Registered PF_QIPCRTR protocol family
5803 18:35:44.709774 <6>[ 0.494057] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5804 18:35:44.716329 <6>[ 0.501151] ASID allocator initialised with 32768 entries
5805 18:35:44.719912 <6>[ 0.507934] Serial: AMBA PL011 UART driver
5806 18:35:44.732447 <4>[ 0.518336] Trying to register duplicate clock ID: 113
5807 18:35:44.791471 <6>[ 0.574217] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5808 18:35:44.806085 <6>[ 0.588595] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5809 18:35:44.809419 <6>[ 0.598344] KASLR enabled
5810 18:35:44.823442 <6>[ 0.606358] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5811 18:35:44.830431 <6>[ 0.613363] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5812 18:35:44.837249 <6>[ 0.619843] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5813 18:35:44.843559 <6>[ 0.626834] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5814 18:35:44.850201 <6>[ 0.633308] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5815 18:35:44.856860 <6>[ 0.640298] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5816 18:35:44.863402 <6>[ 0.646771] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5817 18:35:44.869918 <6>[ 0.653761] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5818 18:35:44.873314 <6>[ 0.661335] ACPI: Interpreter disabled.
5819 18:35:44.883118 <6>[ 0.669317] iommu: Default domain type: Translated
5820 18:35:44.889992 <6>[ 0.674424] iommu: DMA domain TLB invalidation policy: strict mode
5821 18:35:44.893365 <5>[ 0.681059] SCSI subsystem initialized
5822 18:35:44.900677 <6>[ 0.685486] usbcore: registered new interface driver usbfs
5823 18:35:44.906704 <6>[ 0.691213] usbcore: registered new interface driver hub
5824 18:35:44.909944 <6>[ 0.696755] usbcore: registered new device driver usb
5825 18:35:44.916947 <6>[ 0.703059] pps_core: LinuxPPS API ver. 1 registered
5826 18:35:44.927119 <6>[ 0.708244] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5827 18:35:44.930464 <6>[ 0.717569] PTP clock support registered
5828 18:35:44.933669 <6>[ 0.721822] EDAC MC: Ver: 3.0.0
5829 18:35:44.941541 <6>[ 0.727468] FPGA manager framework
5830 18:35:44.944538 <6>[ 0.731152] Advanced Linux Sound Architecture Driver Initialized.
5831 18:35:44.948316 <6>[ 0.737903] vgaarb: loaded
5832 18:35:44.955299 <6>[ 0.741019] clocksource: Switched to clocksource arch_sys_counter
5833 18:35:44.962001 <5>[ 0.747449] VFS: Disk quotas dquot_6.6.0
5834 18:35:44.968759 <6>[ 0.751624] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5835 18:35:44.971966 <6>[ 0.758800] pnp: PnP ACPI: disabled
5836 18:35:44.979550 <6>[ 0.765672] NET: Registered PF_INET protocol family
5837 18:35:44.986379 <6>[ 0.770894] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5838 18:35:44.998059 <6>[ 0.780801] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5839 18:35:45.004604 <6>[ 0.789558] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5840 18:35:45.014806 <6>[ 0.797508] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5841 18:35:45.021585 <6>[ 0.805742] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5842 18:35:45.028145 <6>[ 0.813835] TCP: Hash tables configured (established 32768 bind 32768)
5843 18:35:45.038116 <6>[ 0.820662] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5844 18:35:45.045073 <6>[ 0.827634] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5845 18:35:45.051187 <6>[ 0.835112] NET: Registered PF_UNIX/PF_LOCAL protocol family
5846 18:35:45.054856 <6>[ 0.841242] RPC: Registered named UNIX socket transport module.
5847 18:35:45.061215 <6>[ 0.847386] RPC: Registered udp transport module.
5848 18:35:45.064863 <6>[ 0.852312] RPC: Registered tcp transport module.
5849 18:35:45.071676 <6>[ 0.857235] RPC: Registered tcp NFSv4.1 backchannel transport module.
5850 18:35:45.078400 <6>[ 0.863890] PCI: CLS 0 bytes, default 64
5851 18:35:45.081291 <6>[ 0.868176] Unpacking initramfs...
5852 18:35:45.103045 <6>[ 0.885772] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5853 18:35:45.113021 <6>[ 0.894394] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5854 18:35:45.116344 <6>[ 0.903246] kvm [1]: IPA Size Limit: 40 bits
5855 18:35:45.123566 <6>[ 0.909569] kvm [1]: vgic-v2@c420000
5856 18:35:45.126724 <6>[ 0.913386] kvm [1]: GIC system register CPU interface enabled
5857 18:35:45.133464 <6>[ 0.919552] kvm [1]: vgic interrupt IRQ18
5858 18:35:45.137398 <6>[ 0.923902] kvm [1]: Hyp mode initialized successfully
5859 18:35:45.144158 <5>[ 0.930210] Initialise system trusted keyrings
5860 18:35:45.151048 <6>[ 0.935056] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5861 18:35:45.158833 <6>[ 0.945048] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5862 18:35:45.166136 <5>[ 0.951476] NFS: Registering the id_resolver key type
5863 18:35:45.169043 <5>[ 0.956789] Key type id_resolver registered
5864 18:35:45.175927 <5>[ 0.961201] Key type id_legacy registered
5865 18:35:45.182439 <6>[ 0.965513] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5866 18:35:45.189054 <6>[ 0.972435] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5867 18:35:45.195548 <6>[ 0.980184] 9p: Installing v9fs 9p2000 file system support
5868 18:35:45.222826 <5>[ 1.008831] Key type asymmetric registered
5869 18:35:45.226088 <5>[ 1.013177] Asymmetric key parser 'x509' registered
5870 18:35:45.236017 <6>[ 1.018335] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5871 18:35:45.239385 <6>[ 1.025951] io scheduler mq-deadline registered
5872 18:35:45.242524 <6>[ 1.030708] io scheduler kyber registered
5873 18:35:45.265488 <6>[ 1.051476] EINJ: ACPI disabled.
5874 18:35:45.272219 <4>[ 1.055251] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5875 18:35:45.310048 <6>[ 1.095915] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5876 18:35:45.318205 <6>[ 1.104374] printk: console [ttyS0] disabled
5877 18:35:45.346401 <6>[ 1.129027] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5878 18:35:45.352850 <6>[ 1.138500] printk: console [ttyS0] enabled
5879 18:35:45.356521 <6>[ 1.138500] printk: console [ttyS0] enabled
5880 18:35:45.363158 <6>[ 1.147422] printk: bootconsole [mtk8250] disabled
5881 18:35:45.366505 <6>[ 1.147422] printk: bootconsole [mtk8250] disabled
5882 18:35:45.376310 <3>[ 1.157957] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5883 18:35:45.383252 <3>[ 1.166342] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5884 18:35:45.411949 <6>[ 1.194753] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5885 18:35:45.418716 <6>[ 1.204412] serial serial0: tty port ttyS1 registered
5886 18:35:45.425234 <6>[ 1.210983] SuperH (H)SCI(F) driver initialized
5887 18:35:45.428566 <6>[ 1.216522] msm_serial: driver initialized
5888 18:35:45.444350 <6>[ 1.226931] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5889 18:35:45.454058 <6>[ 1.235533] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5890 18:35:45.460673 <6>[ 1.244108] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5891 18:35:45.470910 <6>[ 1.252676] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5892 18:35:45.480511 <6>[ 1.261333] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5893 18:35:45.487271 <6>[ 1.269997] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5894 18:35:45.497326 <6>[ 1.278738] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5895 18:35:45.503705 <6>[ 1.287479] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5896 18:35:45.514075 <6>[ 1.296047] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5897 18:35:45.523768 <6>[ 1.304850] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5898 18:35:45.531488 <4>[ 1.317252] cacheinfo: Unable to detect cache hierarchy for CPU 0
5899 18:35:45.540389 <6>[ 1.326624] loop: module loaded
5900 18:35:45.552720 <6>[ 1.338500] vsim1: Bringing 1800000uV into 2700000-2700000uV
5901 18:35:45.570431 <6>[ 1.356440] megasas: 07.719.03.00-rc1
5902 18:35:45.579078 <6>[ 1.365269] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5903 18:35:45.586566 <6>[ 1.372421] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5904 18:35:45.603603 <6>[ 1.389302] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5905 18:35:45.660059 <6>[ 1.439551] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5906 18:35:46.389410 <6>[ 2.175410] Freeing initrd memory: 40244K
5907 18:35:46.404735 <4>[ 2.187290] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5908 18:35:46.411302 <4>[ 2.196543] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5909 18:35:46.418082 <4>[ 2.203242] Hardware name: Google juniper sku16 board (DT)
5910 18:35:46.421131 <4>[ 2.208981] Call trace:
5911 18:35:46.424490 <4>[ 2.211681] dump_backtrace.part.0+0xe0/0xf0
5912 18:35:46.427883 <4>[ 2.216217] show_stack+0x18/0x30
5913 18:35:46.431275 <4>[ 2.219790] dump_stack_lvl+0x68/0x84
5914 18:35:46.434896 <4>[ 2.223711] dump_stack+0x18/0x34
5915 18:35:46.441562 <4>[ 2.227281] sysfs_warn_dup+0x64/0x80
5916 18:35:46.444764 <4>[ 2.231202] sysfs_do_create_link_sd+0xf0/0x100
5917 18:35:46.448123 <4>[ 2.235990] sysfs_create_link+0x20/0x40
5918 18:35:46.451691 <4>[ 2.240169] bus_add_device+0x68/0x10c
5919 18:35:46.458442 <4>[ 2.244175] device_add+0x340/0x7ac
5920 18:35:46.461708 <4>[ 2.247918] of_device_add+0x44/0x60
5921 18:35:46.464736 <4>[ 2.251752] of_platform_device_create_pdata+0x90/0x120
5922 18:35:46.471535 <4>[ 2.257233] of_platform_bus_create+0x170/0x370
5923 18:35:46.474760 <4>[ 2.262020] of_platform_populate+0x50/0xfc
5924 18:35:46.481779 <4>[ 2.266460] parse_mtd_partitions+0x1dc/0x510
5925 18:35:46.484816 <4>[ 2.271073] mtd_device_parse_register+0xf8/0x2e0
5926 18:35:46.488475 <4>[ 2.276031] spi_nor_probe+0x21c/0x2f0
5927 18:35:46.491462 <4>[ 2.280037] spi_mem_probe+0x6c/0xb0
5928 18:35:46.498646 <4>[ 2.283870] spi_probe+0x84/0xe4
5929 18:35:46.501555 <4>[ 2.287351] really_probe+0xbc/0x2e0
5930 18:35:46.504551 <4>[ 2.291182] __driver_probe_device+0x78/0x11c
5931 18:35:46.507962 <4>[ 2.295794] driver_probe_device+0xd8/0x160
5932 18:35:46.514512 <4>[ 2.300232] __device_attach_driver+0xb8/0x134
5933 18:35:46.517805 <4>[ 2.304931] bus_for_each_drv+0x78/0xd0
5934 18:35:46.521157 <4>[ 2.309021] __device_attach+0xa8/0x1c0
5935 18:35:46.527958 <4>[ 2.313112] device_initial_probe+0x14/0x20
5936 18:35:46.531256 <4>[ 2.317550] bus_probe_device+0x9c/0xa4
5937 18:35:46.534904 <4>[ 2.321640] device_add+0x3ac/0x7ac
5938 18:35:46.538166 <4>[ 2.325383] __spi_add_device+0x78/0x120
5939 18:35:46.541119 <4>[ 2.329561] spi_add_device+0x40/0x7c
5940 18:35:46.548164 <4>[ 2.333479] spi_register_controller+0x610/0xad0
5941 18:35:46.551439 <4>[ 2.338351] devm_spi_register_controller+0x4c/0xa4
5942 18:35:46.557954 <4>[ 2.343485] mtk_spi_probe+0x3f8/0x650
5943 18:35:46.561076 <4>[ 2.347489] platform_probe+0x68/0xe0
5944 18:35:46.564391 <4>[ 2.351408] really_probe+0xbc/0x2e0
5945 18:35:46.568059 <4>[ 2.355238] __driver_probe_device+0x78/0x11c
5946 18:35:46.574474 <4>[ 2.359849] driver_probe_device+0xd8/0x160
5947 18:35:46.578215 <4>[ 2.364287] __driver_attach+0x94/0x19c
5948 18:35:46.581403 <4>[ 2.368377] bus_for_each_dev+0x70/0xd0
5949 18:35:46.584991 <4>[ 2.372467] driver_attach+0x24/0x30
5950 18:35:46.588156 <4>[ 2.376297] bus_add_driver+0x154/0x20c
5951 18:35:46.594725 <4>[ 2.380387] driver_register+0x78/0x130
5952 18:35:46.598335 <4>[ 2.384478] __platform_driver_register+0x28/0x34
5953 18:35:46.601499 <4>[ 2.389438] mtk_spi_driver_init+0x1c/0x28
5954 18:35:46.608592 <4>[ 2.393791] do_one_initcall+0x50/0x1d0
5955 18:35:46.611482 <4>[ 2.397882] kernel_init_freeable+0x21c/0x288
5956 18:35:46.614706 <4>[ 2.402495] kernel_init+0x24/0x12c
5957 18:35:46.617868 <4>[ 2.406240] ret_from_fork+0x10/0x20
5958 18:35:46.629663 <6>[ 2.415173] tun: Universal TUN/TAP device driver, 1.6
5959 18:35:46.632817 <6>[ 2.421487] thunder_xcv, ver 1.0
5960 18:35:46.636118 <6>[ 2.424992] thunder_bgx, ver 1.0
5961 18:35:46.639131 <6>[ 2.428496] nicpf, ver 1.0
5962 18:35:46.650148 <6>[ 2.432869] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5963 18:35:46.653630 <6>[ 2.440356] hns3: Copyright (c) 2017 Huawei Corporation.
5964 18:35:46.657074 <6>[ 2.445964] hclge is initializing
5965 18:35:46.663802 <6>[ 2.449550] e1000: Intel(R) PRO/1000 Network Driver
5966 18:35:46.670172 <6>[ 2.454687] e1000: Copyright (c) 1999-2006 Intel Corporation.
5967 18:35:46.673438 <6>[ 2.460707] e1000e: Intel(R) PRO/1000 Network Driver
5968 18:35:46.680173 <6>[ 2.465928] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5969 18:35:46.686757 <6>[ 2.472123] igb: Intel(R) Gigabit Ethernet Network Driver
5970 18:35:46.693239 <6>[ 2.477780] igb: Copyright (c) 2007-2014 Intel Corporation.
5971 18:35:46.699976 <6>[ 2.483623] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5972 18:35:46.706650 <6>[ 2.490146] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5973 18:35:46.710018 <6>[ 2.496698] sky2: driver version 1.30
5974 18:35:46.716966 <6>[ 2.501954] usbcore: registered new device driver r8152-cfgselector
5975 18:35:46.723078 <6>[ 2.508497] usbcore: registered new interface driver r8152
5976 18:35:46.729368 <6>[ 2.514327] VFIO - User Level meta-driver version: 0.3
5977 18:35:46.736296 <6>[ 2.522138] mtu3 11201000.usb: uwk - reg:0x420, version:101
5978 18:35:46.742913 <4>[ 2.528013] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5979 18:35:46.749638 <6>[ 2.535285] mtu3 11201000.usb: dr_mode: 1, drd: auto
5980 18:35:46.756307 <6>[ 2.540510] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5981 18:35:46.759227 <6>[ 2.546698] mtu3 11201000.usb: usb3-drd: 0
5982 18:35:46.769474 <6>[ 2.552269] mtu3 11201000.usb: xHCI platform device register success...
5983 18:35:46.775978 <4>[ 2.560896] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5984 18:35:46.783194 <6>[ 2.568842] xhci-mtk 11200000.usb: xHCI Host Controller
5985 18:35:46.789422 <6>[ 2.574346] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5986 18:35:46.796296 <6>[ 2.582064] xhci-mtk 11200000.usb: USB3 root hub has no ports
5987 18:35:46.806392 <6>[ 2.588071] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5988 18:35:46.812651 <6>[ 2.597496] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5989 18:35:46.819527 <6>[ 2.603577] xhci-mtk 11200000.usb: xHCI Host Controller
5990 18:35:46.825988 <6>[ 2.609065] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5991 18:35:46.832788 <6>[ 2.616723] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5992 18:35:46.836497 <6>[ 2.623538] hub 1-0:1.0: USB hub found
5993 18:35:46.839456 <6>[ 2.627567] hub 1-0:1.0: 1 port detected
5994 18:35:46.850376 <6>[ 2.632914] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5995 18:35:46.853963 <6>[ 2.641543] hub 2-0:1.0: USB hub found
5996 18:35:46.863620 <3>[ 2.645575] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5997 18:35:46.869965 <6>[ 2.653477] usbcore: registered new interface driver usb-storage
5998 18:35:46.876673 <6>[ 2.660051] usbcore: registered new device driver onboard-usb-hub
5999 18:35:46.886741 <4>[ 2.669145] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6000 18:35:46.895653 <6>[ 2.681395] mt6397-rtc mt6358-rtc: registered as rtc0
6001 18:35:46.905179 <6>[ 2.686877] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-11T18:35:46 UTC (1718130946)
6002 18:35:46.908561 <6>[ 2.696756] i2c_dev: i2c /dev entries driver
6003 18:35:46.920753 <6>[ 2.703193] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6004 18:35:46.930555 <6>[ 2.711519] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6005 18:35:46.934016 <6>[ 2.720424] i2c 4-0058: Fixed dependency cycle(s) with /panel
6006 18:35:46.944070 <6>[ 2.726458] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6007 18:35:46.950412 <3>[ 2.733917] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6008 18:35:46.967849 <6>[ 2.753824] cpu cpu0: EM: created perf domain
6009 18:35:46.978177 <6>[ 2.759324] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6010 18:35:46.984487 <6>[ 2.770616] cpu cpu4: EM: created perf domain
6011 18:35:46.991726 <6>[ 2.777352] sdhci: Secure Digital Host Controller Interface driver
6012 18:35:46.998534 <6>[ 2.783807] sdhci: Copyright(c) Pierre Ossman
6013 18:35:47.004603 <6>[ 2.789197] Synopsys Designware Multimedia Card Interface Driver
6014 18:35:47.011062 <6>[ 2.789687] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6015 18:35:47.014568 <6>[ 2.796273] sdhci-pltfm: SDHCI platform and OF driver helper
6016 18:35:47.023182 <6>[ 2.809381] ledtrig-cpu: registered to indicate activity on CPUs
6017 18:35:47.030999 <6>[ 2.817126] usbcore: registered new interface driver usbhid
6018 18:35:47.034435 <6>[ 2.822966] usbhid: USB HID core driver
6019 18:35:47.045630 <6>[ 2.827227] spi_master spi2: will run message pump with realtime priority
6020 18:35:47.048866 <4>[ 2.827237] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6021 18:35:47.056400 <4>[ 2.841488] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6022 18:35:47.069586 <6>[ 2.845956] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6023 18:35:47.088511 <6>[ 2.864306] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6024 18:35:47.094876 <4>[ 2.873034] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6025 18:35:47.101786 <6>[ 2.885217] cros-ec-spi spi2.0: Chrome EC device registered
6026 18:35:47.108713 <4>[ 2.892200] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6027 18:35:47.120360 <4>[ 2.903051] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6028 18:35:47.127106 <4>[ 2.911743] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6029 18:35:47.139016 <6>[ 2.921585] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6030 18:35:47.196213 <6>[ 2.982031] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6031 18:35:47.205928 <6>[ 2.987412] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6032 18:35:47.212652 <6>[ 2.988274] mmc0: new HS400 MMC card at address 0001
6033 18:35:47.222709 <6>[ 2.998252] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6034 18:35:47.232560 <6>[ 3.002115] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6035 18:35:47.239190 <6>[ 3.003505] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6036 18:35:47.245584 <6>[ 3.009197] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6037 18:35:47.248862 <6>[ 3.011843] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6038 18:35:47.255753 <6>[ 3.013114] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6039 18:35:47.262487 <6>[ 3.014056] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6040 18:35:47.272570 <6>[ 3.014183] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6041 18:35:47.275786 <6>[ 3.026486] NET: Registered PF_PACKET protocol family
6042 18:35:47.282394 <6>[ 3.061133] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6043 18:35:47.288873 <6>[ 3.062814] 9pnet: Installing 9P2000 support
6044 18:35:47.292079 <5>[ 3.079236] Key type dns_resolver registered
6045 18:35:47.298752 <6>[ 3.084580] registered taskstats version 1
6046 18:35:47.302358 <5>[ 3.088946] Loading compiled-in X.509 certificates
6047 18:35:47.341658 <3>[ 3.124578] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6048 18:35:47.370592 <6>[ 3.150012] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6049 18:35:47.380844 <6>[ 3.163557] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6050 18:35:47.391081 <6>[ 3.172127] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6051 18:35:47.397805 <6>[ 3.180655] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6052 18:35:47.407513 <6>[ 3.189180] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6053 18:35:47.414358 <6>[ 3.197702] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6054 18:35:47.424115 <6>[ 3.206223] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6055 18:35:47.431026 <6>[ 3.214742] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6056 18:35:47.437897 <6>[ 3.223948] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6057 18:35:47.444596 <6>[ 3.228416] hub 1-1:1.0: USB hub found
6058 18:35:47.451167 <6>[ 3.231454] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6059 18:35:47.454682 <6>[ 3.235104] hub 1-1:1.0: 3 ports detected
6060 18:35:47.461562 <6>[ 3.241821] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6061 18:35:47.468062 <6>[ 3.252637] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6062 18:35:47.474871 <6>[ 3.260157] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6063 18:35:47.482477 <6>[ 3.268559] panfrost 13040000.gpu: clock rate = 511999970
6064 18:35:47.492605 <6>[ 3.274261] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6065 18:35:47.502928 <6>[ 3.284670] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6066 18:35:47.509164 <6>[ 3.292679] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6067 18:35:47.522739 <6>[ 3.301111] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6068 18:35:47.528903 <6>[ 3.313190] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6069 18:35:47.540588 <6>[ 3.323203] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6070 18:35:47.550632 <6>[ 3.331868] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6071 18:35:47.561024 <6>[ 3.341021] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6072 18:35:47.567284 <6>[ 3.350151] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6073 18:35:47.577018 <6>[ 3.359279] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6074 18:35:47.587169 <6>[ 3.368579] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6075 18:35:47.596840 <6>[ 3.377880] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6076 18:35:47.606684 <6>[ 3.387354] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6077 18:35:47.613811 <6>[ 3.396827] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6078 18:35:47.623391 <6>[ 3.405953] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6079 18:35:47.694757 <6>[ 3.477451] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6080 18:35:47.704728 <6>[ 3.486369] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6081 18:35:47.715392 <6>[ 3.497998] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6082 18:35:47.750206 <6>[ 3.533044] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6083 18:35:48.410925 <6>[ 3.717296] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6084 18:35:48.420624 <4>[ 3.820771] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6085 18:35:48.427459 <4>[ 3.820790] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6086 18:35:48.434487 <6>[ 3.858173] r8152 1-1.2:1.0 eth0: v1.12.13
6087 18:35:48.440767 <6>[ 3.937051] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6088 18:35:48.447305 <6>[ 4.176702] Console: switching to colour frame buffer device 170x48
6089 18:35:48.454059 <6>[ 4.237390] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6090 18:35:48.474297 <6>[ 4.253550] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6091 18:35:48.491917 <6>[ 4.270659] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6092 18:35:48.498083 <6>[ 4.283037] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6093 18:35:48.508878 <6>[ 4.291300] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6094 18:35:48.518953 <6>[ 4.298220] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6095 18:35:48.537864 <6>[ 4.317263] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6096 18:35:49.689461 <6>[ 5.475092] r8152 1-1.2:1.0 eth0: carrier on
6097 18:35:52.403690 <5>[ 5.501051] Sending DHCP requests .., OK
6098 18:35:52.410238 <6>[ 8.193440] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6099 18:35:52.414337 <6>[ 8.201891] IP-Config: Complete:
6100 18:35:52.427122 <6>[ 8.205470] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6101 18:35:52.436610 <6>[ 8.216371] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6102 18:35:52.448879 <6>[ 8.230683] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6103 18:35:52.457333 <6>[ 8.230694] nameserver0=192.168.201.1
6104 18:35:52.465120 <6>[ 8.250533] clk: Disabling unused clocks
6105 18:35:52.469842 <6>[ 8.258495] ALSA device list:
6106 18:35:52.479174 <6>[ 8.264538] No soundcards found.
6107 18:35:52.488006 <6>[ 8.273530] Freeing unused kernel memory: 8512K
6108 18:35:52.494960 <6>[ 8.280581] Run /init as init process
6109 18:35:52.523567 <6>[ 8.308909] NET: Registered PF_INET6 protocol family
6110 18:35:52.531082 <6>[ 8.316714] Segment Routing with IPv6
6111 18:35:52.534415 <6>[ 8.321636] In-situ OAM (IOAM) with IPv6
6112 18:35:52.581238 <30>[ 8.340305] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6113 18:35:52.593526 <30>[ 8.378996] systemd[1]: Detected architecture arm64.
6114 18:35:52.599011
6115 18:35:52.602043 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6116 18:35:52.602460
6117 18:35:52.616290 <30>[ 8.401332] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6118 18:35:52.785593 <30>[ 8.567640] systemd[1]: Queued start job for default target graphical.target.
6119 18:35:52.808805 <30>[ 8.590652] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6120 18:35:52.818864 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6121 18:35:52.836180 <30>[ 8.618350] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6122 18:35:52.846611 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6123 18:35:52.868293 <30>[ 8.650331] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6124 18:35:52.880212 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6125 18:35:52.899968 <30>[ 8.682140] systemd[1]: Created slice user.slice - User and Session Slice.
6126 18:35:52.910441 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6127 18:35:52.931164 <30>[ 8.710093] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6128 18:35:52.943774 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6129 18:35:52.967466 <30>[ 8.746052] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6130 18:35:52.980044 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6131 18:35:53.009134 <30>[ 8.781367] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6132 18:35:53.028779 <30>[ 8.810706] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6133 18:35:53.035885 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6134 18:35:53.055573 <30>[ 8.837258] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6135 18:35:53.068946 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6136 18:35:53.087655 <30>[ 8.869640] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6137 18:35:53.102031 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6138 18:35:53.115755 <30>[ 8.901327] systemd[1]: Reached target paths.target - Path Units.
6139 18:35:53.131056 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6140 18:35:53.147196 <30>[ 8.929575] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6141 18:35:53.160528 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6142 18:35:53.176183 <30>[ 8.961565] systemd[1]: Reached target slices.target - Slice Units.
6143 18:35:53.191868 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6144 18:35:53.204078 <30>[ 8.989279] systemd[1]: Reached target swap.target - Swaps.
6145 18:35:53.214565 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6146 18:35:53.234994 <30>[ 9.017265] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6147 18:35:53.249455 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6148 18:35:53.268112 <30>[ 9.050164] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6149 18:35:53.282313 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6150 18:35:53.301061 <30>[ 9.082969] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6151 18:35:53.314717 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6152 18:35:53.332957 <30>[ 9.114700] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6153 18:35:53.346986 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6154 18:35:53.364010 <30>[ 9.145803] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6155 18:35:53.376850 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6156 18:35:53.396909 <30>[ 9.178826] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6157 18:35:53.411100 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6158 18:35:53.428102 <30>[ 9.210001] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6159 18:35:53.441242 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6160 18:35:53.460688 <30>[ 9.242407] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6161 18:35:53.473880 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6162 18:35:53.523955 <30>[ 9.306128] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6163 18:35:53.534174 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6164 18:35:53.554308 <30>[ 9.336240] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6165 18:35:53.564961 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6166 18:35:53.588440 <30>[ 9.370261] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6167 18:35:53.599220 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6168 18:35:53.626409 <30>[ 9.402149] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6169 18:35:53.668149 <30>[ 9.450341] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6170 18:35:53.681689 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6171 18:35:53.704812 <30>[ 9.487075] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6172 18:35:53.718623 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6173 18:35:53.768070 <30>[ 9.550280] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6174 18:35:53.782538 Startin<6>[ 9.561858] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6175 18:35:53.785898 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6176 18:35:53.813322 <30>[ 9.595454] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6177 18:35:53.826503 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6178 18:35:53.872446 <30>[ 9.654291] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6179 18:35:53.886999 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6180 18:35:53.909061 <30>[ 9.691232] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6181 18:35:53.922265 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6182 18:35:53.948883 <30>[ 9.730753] systemd[1]: Starting systemd-journald.service - Journal Service...
6183 18:35:53.961597 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6184 18:35:54.003757 <30>[ 9.785676] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6185 18:35:54.014628 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6186 18:35:54.039104 <30>[ 9.818115] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6187 18:35:54.052203 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6188 18:35:54.077239 <30>[ 9.858894] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6189 18:35:54.091386 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6190 18:35:54.110339 <30>[ 9.892354] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6191 18:35:54.121704 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6192 18:35:54.143026 <30>[ 9.924845] systemd[1]: Started systemd-journald.service - Journal Service.
6193 18:35:54.152999 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6194 18:35:54.173903 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6195 18:35:54.195940 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6196 18:35:54.220497 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6197 18:35:54.244387 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6198 18:35:54.264596 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6199 18:35:54.288196 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6200 18:35:54.312582 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6201 18:35:54.333001 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6202 18:35:54.354529 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6203 18:35:54.377330 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6204 18:35:54.400013 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6205 18:35:54.422831 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6206 18:35:54.488398 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6207 18:35:54.514833 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6208 18:35:54.538390 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6209 18:35:54.556328 See 'systemctl status systemd-remount-fs.service' for details.
6210 18:35:54.578172 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6211 18:35:54.600643 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6212 18:35:54.625725 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6213 18:35:54.684875 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6214 18:35:54.701210 <46>[ 10.483349] systemd-journald[199]: Received client request to flush runtime journal.
6215 18:35:54.713984 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6216 18:35:54.734684 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6217 18:35:54.756610 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6218 18:35:54.782435 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6219 18:35:54.802480 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6220 18:35:54.852847 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6221 18:35:54.889003 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6222 18:35:54.912655 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6223 18:35:54.935619 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6224 18:35:54.976194 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6225 18:35:55.000392 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6226 18:35:55.023524 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6227 18:35:55.080254 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6228 18:35:55.102510 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6229 18:35:55.119888 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6230 18:35:55.152681 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6231 18:35:55.178085 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6232 18:35:55.195686 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6233 18:35:55.283147 <6>[ 11.065340] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6234 18:35:55.293740 <3>[ 11.075700] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6235 18:35:55.306001 <3>[ 11.087725] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6236 18:35:55.316649 <3>[ 11.096582] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6237 18:35:55.326564 <4>[ 11.096860] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6238 18:35:55.333646 <3>[ 11.113104] elan_i2c 2-0015: Error applying setting, reverse things back
6239 18:35:55.343045 <6>[ 11.122406] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6240 18:35:55.361105 <6>[ 11.139758] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6241 18:35:55.367637 <3>[ 11.144951] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6242 18:35:55.377654 <3>[ 11.162260] mtk-scp 10500000.scp: invalid resource
6243 18:35:55.384622 <4>[ 11.162317] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6244 18:35:55.394583 <3>[ 11.163274] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6245 18:35:55.401318 <6>[ 11.168249] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6246 18:35:55.408132 <4>[ 11.170236] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6247 18:35:55.417467 <3>[ 11.175558] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6248 18:35:55.424439 <6>[ 11.190015] mc: Linux media interface: v0.10
6249 18:35:55.431069 <3>[ 11.193184] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6250 18:35:55.444436 <3>[ 11.193299] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6251 18:35:55.451312 <6>[ 11.212651] remoteproc remoteproc0: scp is available
6252 18:35:55.457841 <3>[ 11.214214] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6253 18:35:55.467823 <4>[ 11.222703] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6254 18:35:55.474870 <3>[ 11.235094] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6255 18:35:55.481503 <6>[ 11.240716] remoteproc remoteproc0: powering up scp
6256 18:35:55.488076 <6>[ 11.242428] cs_system_cfg: CoreSight Configuration manager initialised
6257 18:35:55.494603 <6>[ 11.245747] videodev: Linux video capture interface: v2.00
6258 18:35:55.501322 <5>[ 11.247946] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6259 18:35:55.511050 <3>[ 11.249084] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6260 18:35:55.517943 <6>[ 11.249199] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6261 18:35:55.529240 <6>[ 11.249326] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6262 18:35:55.539055 <6>[ 11.249390] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6263 18:35:55.548991 <6>[ 11.249449] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6264 18:35:55.559362 <6>[ 11.249503] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6265 18:35:55.569227 <6>[ 11.249841] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6266 18:35:55.575430 <5>[ 11.256123] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6267 18:35:55.587590 <5>[ 11.256604] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6268 18:35:55.597710 <4>[ 11.256685] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6269 18:35:55.605227 <6>[ 11.256695] cfg80211: failed to load regulatory.db
6270 18:35:55.615498 <6>[ 11.257279] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6271 18:35:55.625596 <4>[ 11.259356] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6272 18:35:55.632582 <3>[ 11.259369] remoteproc remoteproc0: request_firmware failed: -2
6273 18:35:55.644316 <3>[ 11.265795] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6274 18:35:55.655184 <6>[ 11.271222] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6275 18:35:55.665523 <3>[ 11.278003] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6276 18:35:55.676193 <6>[ 11.291600] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6277 18:35:55.685981 <6>[ 11.298825] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6278 18:35:55.731823 [[0;32m OK [<3>[ 11.510424] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6279 18:35:55.742107 0m] Created slice [0;1;39msyste<3>[ 11.525249] debugfs: File 'Playback' in directory 'dapm' already present!
6280 18:35:55.748501 m-syste…- Slic<6>[ 11.525475] Bluetooth: Core ver 2.22
6281 18:35:55.755575 <3>[ 11.533315] debugfs: File 'Capture' in directory 'dapm' already present!
6282 18:35:55.762167 <6>[ 11.538571] NET: Registered PF_BLUETOOTH protocol family
6283 18:35:55.772180 e /system/system<6>[ 11.547191] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6284 18:35:55.775289 d-backlight.
6285 18:35:55.782265 <6>[ 11.551044] Bluetooth: HCI device and connection manager initialized
6286 18:35:55.785764 <6>[ 11.551064] Bluetooth: HCI socket layer initialized
6287 18:35:55.792705 <3>[ 11.567262] thermal_sys: Failed to find 'trips' node
6288 18:35:55.795362 <6>[ 11.573722] Bluetooth: L2CAP socket layer initialized
6289 18:35:55.805716 <3>[ 11.576212] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6290 18:35:55.808575 <6>[ 11.576980] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6291 18:35:55.818641 <6>[ 11.577266] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6292 18:35:55.825966 <6>[ 11.577896] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6293 18:35:55.829129 <6>[ 11.581452] Bluetooth: SCO socket layer initialized
6294 18:35:55.835953 <6>[ 11.583757] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6295 18:35:55.847401 <6>[ 11.585476] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6296 18:35:55.854011 <3>[ 11.587030] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6297 18:35:55.867163 <6>[ 11.595989] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6298 18:35:55.877404 <4>[ 11.600441] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6299 18:35:55.883982 <6>[ 11.609185] usbcore: registered new interface driver uvcvideo
6300 18:35:55.890596 <3>[ 11.616790] thermal_sys: Failed to find 'trips' node
6301 18:35:55.901368 <6>[ 11.628130] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6302 18:35:55.912844 <3>[ 11.628223] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6303 18:35:55.922882 <6>[ 11.635833] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6304 18:35:55.929729 <6>[ 11.636197] Bluetooth: HCI UART driver ver 2.3
6305 18:35:55.936269 <6>[ 11.636202] Bluetooth: HCI UART protocol H4 registered
6306 18:35:55.942719 <6>[ 11.636245] Bluetooth: HCI UART protocol LL registered
6307 18:35:55.950112 <6>[ 11.636260] Bluetooth: HCI UART protocol Three-wire (H5) registered
6308 18:35:55.958345 <6>[ 11.636578] Bluetooth: HCI UART protocol Broadcom registered
6309 18:35:55.966110 <6>[ 11.636613] Bluetooth: HCI UART protocol QCA registered
6310 18:35:55.973532 <6>[ 11.636625] Bluetooth: HCI UART protocol Marvell registered
6311 18:35:55.980920 <6>[ 11.637447] Bluetooth: hci0: setting up ROME/QCA6390
6312 18:35:55.991472 <3>[ 11.644240] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6313 18:35:56.001482 <4>[ 11.644247] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6314 18:35:56.044720 [[0;32m OK [<6>[ 11.822532] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6315 18:35:56.054529 <4>[ 11.828334] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6316 18:35:56.058004 <4>[ 11.828334] Fallback method does not support PEC.
6317 18:35:56.064953 0m] Reached targ<3>[ 11.845881] Bluetooth: hci0: Frame reassembly failed (-84)
6318 18:35:56.076953 et [0;1;39mtime<3>[ 11.851983] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6319 18:35:56.084147 -set.target[0m <3>[ 11.861480] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6320 18:35:56.095149 - System Time Se<3>[ 11.871758] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6321 18:35:56.095749 t.
6322 18:35:56.104972 <3>[ 11.881357] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6323 18:35:56.126821 <3>[ 11.908996] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6324 18:35:56.145439 <3>[ 11.925030] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6325 18:35:56.150056 <3>[ 11.933064] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6326 18:35:56.167180 Starting [0;1;39msystemd-backlight…e<3>[ 11.947829] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6327 18:35:56.177219 ss of backlight:<3>[ 11.948271] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6328 18:35:56.177803 backlight_lcd0...
6329 18:35:56.195059 <3>[ 11.976138] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6330 18:35:56.201702 <6>[ 11.985269] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6331 18:35:56.212993 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6332 18:35:56.233775 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6333 18:35:56.286138 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6334 18:35:56.304487 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6335 18:35:56.321825 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6336 18:35:56.337676 [[0;32m OK [0m] Reached targ<6>[ 12.120682] Bluetooth: hci0: QCA Product ID :0x00000008
6337 18:35:56.340698 et [0;1;39msound.target[0m - Sound Card.
6338 18:35:56.347840 <6>[ 12.131453] Bluetooth: hci0: QCA SOC Version :0x00000044
6339 18:35:56.355845 <6>[ 12.140910] Bluetooth: hci0: QCA ROM Version :0x00000302
6340 18:35:56.365334 <6>[ 12.150044] Bluetooth: hci0: QCA Patch Version:0x00000111
6341 18:35:56.371876 <6>[ 12.150058] Bluetooth: hci0: QCA controller version 0x00440302
6342 18:35:56.384800 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initiali<6>[ 12.167756] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6343 18:35:56.385244 zation.
6344 18:35:56.396293 <4>[ 12.178102] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6345 18:35:56.407419 <3>[ 12.189530] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6346 18:35:56.418171 [[0;32m OK [0m] Started [0;<3>[ 12.199541] Bluetooth: hci0: QCA Failed to download patch (-2)
6347 18:35:56.421643 1;39mfstrim.timer[0m - Discard unused blocks once a week.
6348 18:35:56.441673 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6349 18:35:56.460450 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6350 18:35:56.476024 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6351 18:35:56.495464 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6352 18:35:56.505129 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6353 18:35:56.522071 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6354 18:35:56.558593 <6>[ 12.340770] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6355 18:35:56.570597 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6356 18:35:56.618615 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6357 18:35:56.641939 <4>[ 12.423694] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6358 18:35:56.652726 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6359 18:35:56.663108 <4>[ 12.445257] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6360 18:35:56.683357 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus Sy<4>[ 12.462545] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6361 18:35:56.683876 stem Message Bus.
6362 18:35:56.707200 [[0;32m OK [<4>[ 12.489359] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6363 18:35:56.713498 0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6364 18:35:56.748705 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6365 18:35:56.790827 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6366 18:35:56.810350 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6367 18:35:56.855837 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6368 18:35:56.879330 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6369 18:35:56.910162 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6370 18:35:56.930725 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6371 18:35:56.948213 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6372 18:35:56.997985 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6373 18:35:57.030180 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6374 18:35:57.094975
6375 18:35:57.098218 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6376 18:35:57.098691
6377 18:35:57.101800 debian-bookworm-arm64 login: root (automatic login)
6378 18:35:57.102431
6379 18:35:57.121839 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 11 17:44:14 UTC 2024 aarch64
6380 18:35:57.122503
6381 18:35:57.127957 The programs included with the Debian GNU/Linux system are free software;
6382 18:35:57.134404 the exact distribution terms for each program are described in the
6383 18:35:57.138047 individual files in /usr/share/doc/*/copyright.
6384 18:35:57.138618
6385 18:35:57.144465 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6386 18:35:57.147456 permitted by applicable law.
6387 18:35:57.148934 Matched prompt #10: / #
6389 18:35:57.150169 Setting prompt string to ['/ #']
6390 18:35:57.150639 end: 2.2.5.1 login-action (duration 00:00:13) [common]
6392 18:35:57.151708 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6393 18:35:57.152187 start: 2.2.6 expect-shell-connection (timeout 00:03:56) [common]
6394 18:35:57.152573 Setting prompt string to ['/ #']
6395 18:35:57.153020 Forcing a shell prompt, looking for ['/ #']
6397 18:35:57.204025 / #
6398 18:35:57.204637 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6399 18:35:57.205086 Waiting using forced prompt support (timeout 00:02:30)
6400 18:35:57.210317
6401 18:35:57.211235 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6402 18:35:57.211769 start: 2.2.7 export-device-env (timeout 00:03:56) [common]
6403 18:35:57.212280 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6404 18:35:57.212752 end: 2.2 depthcharge-retry (duration 00:01:04) [common]
6405 18:35:57.213214 end: 2 depthcharge-action (duration 00:01:04) [common]
6406 18:35:57.213747 start: 3 lava-test-retry (timeout 00:08:35) [common]
6407 18:35:57.214170 start: 3.1 lava-test-shell (timeout 00:08:35) [common]
6408 18:35:57.214548 Using namespace: common
6410 18:35:57.315879 / # #
6411 18:35:57.316635 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6412 18:35:57.322274 #
6413 18:35:57.323163 Using /lava-14291364
6415 18:35:57.424806 / # export SHELL=/bin/sh
6416 18:35:57.431523 export SHELL=/bin/sh
6418 18:35:57.533366 / # . /lava-14291364/environment
6419 18:35:57.540017 . /lava-14291364/environment
6421 18:35:57.641760 / # /lava-14291364/bin/lava-test-runner /lava-14291364/0
6422 18:35:57.642362 Test shell timeout: 10s (minimum of the action and connection timeout)
6423 18:35:57.647891 /lava-14291364/bin/lava-test-runner /lava-14291364/0
6424 18:35:57.676181 + export TESTRUN_ID=0_v4l2-compliance-uvc
6425 18:35:57.679535 + cd /lava-14291364/0/tests/0_v4l2-compliance-uvc
6426 18:35:57.680112 + cat uuid
6427 18:35:57.683018 + UUID=14291364_1.5.2.3.1
6428 18:35:57.683590 + set +x
6429 18:35:57.689093 <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14291364_1.5.2.3.1>
6430 18:35:57.689938 Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14291364_1.5.2.3.1
6431 18:35:57.690460 Starting test lava.0_v4l2-compliance-uvc (14291364_1.5.2.3.1)
6432 18:35:57.690909 Skipping test definition patterns.
6433 18:35:57.692657 + /usr/bin/v4l2-parser.sh -d uvcvideo
6434 18:35:57.699195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>
6435 18:35:57.699725 device: /dev/video2
6436 18:35:57.700332 Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
6438 18:36:04.484634 v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t
6439 18:36:04.496155 v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54
6440 18:36:04.508254
6441 18:36:04.525703 Compliance test for uvcvideo device /dev/video2:
6442 18:36:04.536769
6443 18:36:04.551466 Driver Info:
6444 18:36:04.566901 Driver name : uvcvideo
6445 18:36:04.585847 Card type : HD WebCam: HD WebCam
6446 18:36:04.599660 Bus info : usb-11200000.usb-1.3
6447 18:36:04.610798 Driver version : 6.1.92
6448 18:36:04.625440 Capabilities : 0x84a00001
6449 18:36:04.643276 Metadata Capture
6450 18:36:04.659692 Streaming
6451 18:36:04.675269 Extended Pix Format
6452 18:36:04.691216 Device Capabilities
6453 18:36:04.707437 Device Caps : 0x04200001
6454 18:36:04.728256 Streaming
6455 18:36:04.744223 Extended Pix Format
6456 18:36:04.761410 Media Driver Info:
6457 18:36:04.776471 Driver name : uvcvideo
6458 18:36:04.792912 Model : HD WebCam: HD WebCam
6459 18:36:04.805425 Serial :
6460 18:36:04.822808 Bus info : usb-11200000.usb-1.3
6461 18:36:04.832614 Media version : 6.1.92
6462 18:36:04.850447 Hardware revision: 0x00003269 (12905)
6463 18:36:04.861073 Driver version : 6.1.92
6464 18:36:04.873936 Interface Info:
6465 18:36:04.893576 <LAVA_SIGNAL_TESTSET START Interface-Info>
6466 18:36:04.894434 Received signal: <TESTSET> START Interface-Info
6467 18:36:04.894856 Starting test_set Interface-Info
6468 18:36:04.896964 ID : 0x03000002
6469 18:36:04.906981 Type : V4L Video
6470 18:36:04.921455 Entity Info:
6471 18:36:04.930791 <LAVA_SIGNAL_TESTSET STOP>
6472 18:36:04.931642 Received signal: <TESTSET> STOP
6473 18:36:04.932061 Closing test_set Interface-Info
6474 18:36:04.942035 <LAVA_SIGNAL_TESTSET START Entity-Info>
6475 18:36:04.942883 Received signal: <TESTSET> START Entity-Info
6476 18:36:04.943283 Starting test_set Entity-Info
6477 18:36:04.945123 ID : 0x00000001 (1)
6478 18:36:04.961344 Name : HD WebCam: HD WebCam
6479 18:36:04.973963 Function : V4L2 I/O
6480 18:36:04.989421 Flags : default
6481 18:36:05.005808 Pad 0x01000007 : 0: Sink
6482 18:36:05.034036 Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable
6483 18:36:05.038287
6484 18:36:05.052800 Required ioctls:
6485 18:36:05.062961 <LAVA_SIGNAL_TESTSET STOP>
6486 18:36:05.063812 Received signal: <TESTSET> STOP
6487 18:36:05.064207 Closing test_set Entity-Info
6488 18:36:05.073500 <LAVA_SIGNAL_TESTSET START Required-ioctls>
6489 18:36:05.074338 Received signal: <TESTSET> START Required-ioctls
6490 18:36:05.074777 Starting test_set Required-ioctls
6491 18:36:05.076598 test MC information (see 'Media Driver Info' above): OK
6492 18:36:05.106260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>
6493 18:36:05.107111 Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
6495 18:36:05.109609 test VIDIOC_QUERYCAP: OK
6496 18:36:05.131664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6497 18:36:05.132537 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6499 18:36:05.134357 test invalid ioctls: OK
6500 18:36:05.161422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>
6501 18:36:05.162008
6502 18:36:05.162651 Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
6504 18:36:05.179200 Allow for multiple opens:
6505 18:36:05.189054 <LAVA_SIGNAL_TESTSET STOP>
6506 18:36:05.189985 Received signal: <TESTSET> STOP
6507 18:36:05.190383 Closing test_set Required-ioctls
6508 18:36:05.200297 <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>
6509 18:36:05.201143 Received signal: <TESTSET> START Allow-for-multiple-opens
6510 18:36:05.201599 Starting test_set Allow-for-multiple-opens
6511 18:36:05.203204 test second /dev/video2 open: OK
6512 18:36:05.232502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video2-open RESULT=pass>
6513 18:36:05.233361 Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video2-open RESULT=pass
6515 18:36:05.235443 test VIDIOC_QUERYCAP: OK
6516 18:36:05.263523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6517 18:36:05.264372 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6519 18:36:05.266551 test VIDIOC_G/S_PRIORITY: OK
6520 18:36:05.295810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>
6521 18:36:05.296576 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
6523 18:36:05.299109 test for unlimited opens: OK
6524 18:36:05.329009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>
6525 18:36:05.329612
6526 18:36:05.330223 Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
6528 18:36:05.344199 Debug ioctls:
6529 18:36:05.352568 <LAVA_SIGNAL_TESTSET STOP>
6530 18:36:05.353245 Received signal: <TESTSET> STOP
6531 18:36:05.353656 Closing test_set Allow-for-multiple-opens
6532 18:36:05.363939 <LAVA_SIGNAL_TESTSET START Debug-ioctls>
6533 18:36:05.364680 Received signal: <TESTSET> START Debug-ioctls
6534 18:36:05.365041 Starting test_set Debug-ioctls
6535 18:36:05.367486 test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
6536 18:36:05.395535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>
6537 18:36:05.396443 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
6539 18:36:05.402256 test VIDIOC_LOG_STATUS: OK (Not Supported)
6540 18:36:05.424886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>
6541 18:36:05.425483
6542 18:36:05.426090 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
6544 18:36:05.441043 Input ioctls:
6545 18:36:05.449850 <LAVA_SIGNAL_TESTSET STOP>
6546 18:36:05.450697 Received signal: <TESTSET> STOP
6547 18:36:05.451095 Closing test_set Debug-ioctls
6548 18:36:05.462378 <LAVA_SIGNAL_TESTSET START Input-ioctls>
6549 18:36:05.463490 Received signal: <TESTSET> START Input-ioctls
6550 18:36:05.464062 Starting test_set Input-ioctls
6551 18:36:05.465558 test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
6552 18:36:05.497369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>
6553 18:36:05.498219 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
6555 18:36:05.500623 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6556 18:36:05.522688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6557 18:36:05.523516 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6559 18:36:05.529196 test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
6560 18:36:05.553255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>
6561 18:36:05.554137 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
6563 18:36:05.560207 test VIDIOC_ENUMAUDIO: OK (Not Supported)
6564 18:36:05.586388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>
6565 18:36:05.587212 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
6567 18:36:05.589715 test VIDIOC_G/S/ENUMINPUT: OK
6568 18:36:05.617554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>
6569 18:36:05.618392 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
6571 18:36:05.621010 test VIDIOC_G/S_AUDIO: OK (Not Supported)
6572 18:36:05.649422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>
6573 18:36:05.650272 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
6575 18:36:05.652818 Inputs: 1 Audio Inputs: 0 Tuners: 0
6576 18:36:05.665058
6577 18:36:05.686173 test VIDIOC_G/S_MODULATOR: OK (Not Supported)
6578 18:36:05.712708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>
6579 18:36:05.713591 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
6581 18:36:05.719311 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6582 18:36:05.744596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6583 18:36:05.745407 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6585 18:36:05.751503 test VIDIOC_ENUMAUDOUT: OK (Not Supported)
6586 18:36:05.773845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>
6587 18:36:05.774659 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
6589 18:36:05.780029 test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
6590 18:36:05.803261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>
6591 18:36:05.804079 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
6593 18:36:05.810068 test VIDIOC_G/S_AUDOUT: OK (Not Supported)
6594 18:36:05.832284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>
6595 18:36:05.833106 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
6597 18:36:05.835322
6598 18:36:05.855066 test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
6599 18:36:05.881572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>
6600 18:36:05.882402 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
6602 18:36:05.888357 test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
6603 18:36:05.916391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>
6604 18:36:05.917245 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
6606 18:36:05.920179 test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
6607 18:36:05.943566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>
6608 18:36:05.944413 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
6610 18:36:05.946691 test VIDIOC_G/S_EDID: OK (Not Supported)
6611 18:36:05.972659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>
6612 18:36:05.973555
6613 18:36:05.974295 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
6615 18:36:05.988674 Control ioctls (Input 0):
6616 18:36:05.996605 <LAVA_SIGNAL_TESTSET STOP>
6617 18:36:05.997453 Received signal: <TESTSET> STOP
6618 18:36:05.997850 Closing test_set Input-ioctls
6619 18:36:06.006780 <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>
6620 18:36:06.007640 Received signal: <TESTSET> START Control-ioctls-Input-0
6621 18:36:06.008039 Starting test_set Control-ioctls-Input-0
6622 18:36:06.009942 test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
6623 18:36:06.043215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>
6624 18:36:06.043789 test VIDIOC_QUERYCTRL: OK
6625 18:36:06.044438 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
6627 18:36:06.070160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>
6628 18:36:06.071010 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
6630 18:36:06.073394 test VIDIOC_G/S_CTRL: OK
6631 18:36:06.095586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>
6632 18:36:06.096521 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
6634 18:36:06.098852 test VIDIOC_G/S/TRY_EXT_CTRLS: OK
6635 18:36:06.125987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>
6636 18:36:06.126842 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
6638 18:36:06.132398 test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
6639 18:36:06.158221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>
6640 18:36:06.159071 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
6642 18:36:06.160747 test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
6643 18:36:06.186116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>
6644 18:36:06.186978 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
6646 18:36:06.192516 Standard Controls: 15 Private Controls: 0
6647 18:36:06.201744
6648 18:36:06.215262 Format ioctls (Input 0):
6649 18:36:06.224949 <LAVA_SIGNAL_TESTSET STOP>
6650 18:36:06.225820 Received signal: <TESTSET> STOP
6651 18:36:06.226226 Closing test_set Control-ioctls-Input-0
6652 18:36:06.234864 <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>
6653 18:36:06.235643 Received signal: <TESTSET> START Format-ioctls-Input-0
6654 18:36:06.236005 Starting test_set Format-ioctls-Input-0
6655 18:36:06.238391 test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
6656 18:36:06.270806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>
6657 18:36:06.271661 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
6659 18:36:06.273560 test VIDIOC_G/S_PARM: OK
6660 18:36:06.294251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>
6661 18:36:06.295238 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
6663 18:36:06.297520 test VIDIOC_G_FBUF: OK (Not Supported)
6664 18:36:06.323944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>
6665 18:36:06.324793 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
6667 18:36:06.327116 test VIDIOC_G_FMT: OK
6668 18:36:06.353359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>
6669 18:36:06.354218 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
6671 18:36:06.356268 test VIDIOC_TRY_FMT: OK
6672 18:36:06.383771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>
6673 18:36:06.384547 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
6675 18:36:06.390222 warn: v4l2-test-formats.cpp(1046): Could not set fmt2
6676 18:36:06.397576 test VIDIOC_S_FMT: OK
6677 18:36:06.427714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>
6678 18:36:06.428515 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
6680 18:36:06.430869 test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
6681 18:36:06.462306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>
6682 18:36:06.463172 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
6684 18:36:06.465027 test Cropping: OK (Not Supported)
6685 18:36:06.492941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>
6686 18:36:06.493991 Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
6688 18:36:06.496108 test Composing: OK (Not Supported)
6689 18:36:06.520771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>
6690 18:36:06.521620 Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
6692 18:36:06.524008 test Scaling: OK (Not Supported)
6693 18:36:06.556065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>
6694 18:36:06.556584
6695 18:36:06.557182 Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
6697 18:36:06.570063 Codec ioctls (Input 0):
6698 18:36:06.580063 <LAVA_SIGNAL_TESTSET STOP>
6699 18:36:06.580741 Received signal: <TESTSET> STOP
6700 18:36:06.581094 Closing test_set Format-ioctls-Input-0
6701 18:36:06.590242 <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>
6702 18:36:06.591064 Received signal: <TESTSET> START Codec-ioctls-Input-0
6703 18:36:06.591440 Starting test_set Codec-ioctls-Input-0
6704 18:36:06.593504 test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
6705 18:36:06.620605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>
6706 18:36:06.621394 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
6708 18:36:06.627563 test VIDIOC_G_ENC_INDEX: OK (Not Supported)
6709 18:36:06.651805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>
6710 18:36:06.652563 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
6712 18:36:06.658636 test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
6713 18:36:06.682985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>
6714 18:36:06.683488
6715 18:36:06.684078 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
6717 18:36:06.700361 Buffer ioctls (Input 0):
6718 18:36:06.708899 <LAVA_SIGNAL_TESTSET STOP>
6719 18:36:06.709746 Received signal: <TESTSET> STOP
6720 18:36:06.710128 Closing test_set Codec-ioctls-Input-0
6721 18:36:06.720937 <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>
6722 18:36:06.721816 Received signal: <TESTSET> START Buffer-ioctls-Input-0
6723 18:36:06.722218 Starting test_set Buffer-ioctls-Input-0
6724 18:36:06.724293 test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
6725 18:36:06.754549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>
6726 18:36:06.755319 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
6728 18:36:06.758166 test CREATE_BUFS maximum buffers: OK
6729 18:36:06.780817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>
6730 18:36:06.781682 Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
6732 18:36:06.784340 test VIDIOC_EXPBUF: OK
6733 18:36:06.809907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>
6734 18:36:06.810750 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
6736 18:36:06.813718 test Requests: OK (Not Supported)
6737 18:36:06.838744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>
6738 18:36:06.839293
6739 18:36:06.839937 Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
6741 18:36:06.854912 Test input 0:
6742 18:36:06.867904
6743 18:36:06.881685 Streaming ioctls:
6744 18:36:06.892096 <LAVA_SIGNAL_TESTSET STOP>
6745 18:36:06.892918 Received signal: <TESTSET> STOP
6746 18:36:06.893345 Closing test_set Buffer-ioctls-Input-0
6747 18:36:06.902911 <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>
6748 18:36:06.903743 Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
6749 18:36:06.904139 Starting test_set Streaming-ioctls_Test-input-0
6750 18:36:06.905973 test read/write: OK (Not Supported)
6751 18:36:06.932889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>
6752 18:36:06.933756 Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
6754 18:36:06.936266 test blocking wait: OK
6755 18:36:06.961124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>
6756 18:36:06.962002 Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
6758 18:36:06.967636 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6759 18:36:06.977945 test MMAP (no poll): FAIL
6760 18:36:07.008481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>
6761 18:36:07.009353 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
6763 18:36:07.014731 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6764 18:36:07.021561 test MMAP (select): FAIL
6765 18:36:07.054572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>
6766 18:36:07.055413 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
6768 18:36:07.061058 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6769 18:36:07.068113 test MMAP (epoll): FAIL
6770 18:36:07.098411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>
6771 18:36:07.098964
6772 18:36:07.099590 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
6774 18:36:07.332081
6775 18:36:07.341109 test USERPTR (no poll): OK
6776 18:36:07.368608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>
6777 18:36:07.369186
6778 18:36:07.369850 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
6780 18:36:07.610065
6781 18:36:07.619705 test USERPTR (select): OK
6782 18:36:07.645403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>
6783 18:36:07.646242 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
6785 18:36:07.651599 test DMABUF: Cannot test, specify --expbuf-device
6786 18:36:07.660384
6787 18:36:07.681517 Total for uvcvideo device /dev/video2: 54, Succeeded: 51, Failed: 3, Warnings: 1
6788 18:36:07.688416 <LAVA_TEST_RUNNER EXIT>
6789 18:36:07.689290 ok: lava_test_shell seems to have completed
6790 18:36:07.689891 Marking unfinished test run as failed
6792 18:36:07.695192 CREATE_BUFS-maximum-buffers:
result: pass
set: Buffer-ioctls-Input-0
Composing:
result: pass
set: Format-ioctls-Input-0
Cropping:
result: pass
set: Format-ioctls-Input-0
MC-information-see-Media-Driver-Info-above:
result: pass
set: Required-ioctls
MMAP-epoll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-no-poll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-select:
result: fail
set: Streaming-ioctls_Test-input-0
Requests:
result: pass
set: Buffer-ioctls-Input-0
Scaling:
result: pass
set: Format-ioctls-Input-0
USERPTR-no-poll:
result: pass
set: Streaming-ioctls_Test-input-0
USERPTR-select:
result: pass
set: Streaming-ioctls_Test-input-0
VIDIOC_DBG_G/S_REGISTER:
result: pass
set: Debug-ioctls
VIDIOC_DV_TIMINGS_CAP:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_STD:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDIO:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDOUT:
result: pass
set: Input-ioctls
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
result: pass
set: Format-ioctls-Input-0
VIDIOC_EXPBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_G/S/ENUMINPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/ENUMOUTPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/TRY_EXT_CTRLS:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_AUDIO:
result: pass
set: Input-ioctls
VIDIOC_G/S_AUDOUT:
result: pass
set: Input-ioctls
VIDIOC_G/S_CTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_EDID:
result: pass
set: Input-ioctls
VIDIOC_G/S_FREQUENCY:
result: pass
set: Input-ioctls
VIDIOC_G/S_JPEGCOMP:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_MODULATOR:
result: pass
set: Input-ioctls
VIDIOC_G/S_PARM:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G/S_PRIORITY:
result: pass
set: Allow-for-multiple-opens
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
result: pass
set: Input-ioctls
VIDIOC_G_ENC_INDEX:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_G_FBUF:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_SLICED_VBI_CAP:
result: pass
set: Format-ioctls-Input-0
VIDIOC_LOG_STATUS:
result: pass
set: Debug-ioctls
VIDIOC_QUERYCAP:
result: pass
set: Allow-for-multiple-opens
VIDIOC_QUERYCTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
result: pass
set: Control-ioctls-Input-0
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_S_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_S_HW_FREQ_SEEK:
result: pass
set: Input-ioctls
VIDIOC_TRY_DECODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_ENCODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
result: pass
set: Control-ioctls-Input-0
blocking-wait:
result: pass
set: Streaming-ioctls_Test-input-0
device-presence: pass
for-unlimited-opens:
result: pass
set: Allow-for-multiple-opens
invalid-ioctls:
result: pass
set: Required-ioctls
read/write:
result: pass
set: Streaming-ioctls_Test-input-0
second-/dev/video2-open:
result: pass
set: Allow-for-multiple-opens
6793 18:36:07.695856 end: 3.1 lava-test-shell (duration 00:00:10) [common]
6794 18:36:07.696380 end: 3 lava-test-retry (duration 00:00:10) [common]
6795 18:36:07.696876 start: 4 finalize (timeout 00:08:24) [common]
6796 18:36:07.697401 start: 4.1 power-off (timeout 00:00:30) [common]
6797 18:36:07.698256 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6798 18:36:08.915897 >> Command sent successfully.
6799 18:36:08.926006 Returned 0 in 1 seconds
6800 18:36:09.027459 end: 4.1 power-off (duration 00:00:01) [common]
6802 18:36:09.029078 start: 4.2 read-feedback (timeout 00:08:23) [common]
6803 18:36:09.030663 Listened to connection for namespace 'common' for up to 1s
6804 18:36:10.031165 Finalising connection for namespace 'common'
6805 18:36:10.031829 Disconnecting from shell: Finalise
6806 18:36:10.032234 / #
6807 18:36:10.133190 end: 4.2 read-feedback (duration 00:00:01) [common]
6808 18:36:10.133851 end: 4 finalize (duration 00:00:02) [common]
6809 18:36:10.134468 Cleaning after the job
6810 18:36:10.135063 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/ramdisk
6811 18:36:10.153934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/kernel
6812 18:36:10.183607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/dtb
6813 18:36:10.183890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14291364/tftp-deploy-q1ya37ds/modules
6814 18:36:10.191202 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14291364
6815 18:36:10.253181 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14291364
6816 18:36:10.253529 Job finished correctly