Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 39
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 88
1 00:43:44.414681 lava-dispatcher, installed at version: 2024.03
2 00:43:44.414895 start: 0 validate
3 00:43:44.415043 Start time: 2024-06-16 00:43:44.415034+00:00 (UTC)
4 00:43:44.415169 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:43:44.415317 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 00:43:44.673947 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:43:44.674698 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:43:44.929768 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:43:44.930448 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:43:45.182852 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:43:45.183476 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:43:45.462804 validate duration: 1.05
14 00:43:45.464121 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:43:45.464691 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:43:45.465205 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:43:45.465859 Not decompressing ramdisk as can be used compressed.
18 00:43:45.466291 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 00:43:45.466618 saving as /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/ramdisk/rootfs.cpio.gz
20 00:43:45.466944 total size: 47897469 (45 MB)
21 00:43:45.471705 progress 0 % (0 MB)
22 00:43:45.508859 progress 5 % (2 MB)
23 00:43:45.524757 progress 10 % (4 MB)
24 00:43:45.538297 progress 15 % (6 MB)
25 00:43:45.551888 progress 20 % (9 MB)
26 00:43:45.565665 progress 25 % (11 MB)
27 00:43:45.579326 progress 30 % (13 MB)
28 00:43:45.593043 progress 35 % (16 MB)
29 00:43:45.606636 progress 40 % (18 MB)
30 00:43:45.620307 progress 45 % (20 MB)
31 00:43:45.633868 progress 50 % (22 MB)
32 00:43:45.647439 progress 55 % (25 MB)
33 00:43:45.661158 progress 60 % (27 MB)
34 00:43:45.674774 progress 65 % (29 MB)
35 00:43:45.688478 progress 70 % (32 MB)
36 00:43:45.702120 progress 75 % (34 MB)
37 00:43:45.715669 progress 80 % (36 MB)
38 00:43:45.729164 progress 85 % (38 MB)
39 00:43:45.742702 progress 90 % (41 MB)
40 00:43:45.756055 progress 95 % (43 MB)
41 00:43:45.769308 progress 100 % (45 MB)
42 00:43:45.769556 45 MB downloaded in 0.30 s (150.94 MB/s)
43 00:43:45.769731 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:43:45.769997 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:43:45.770093 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:43:45.770185 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:43:45.770333 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:43:45.770414 saving as /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/kernel/Image
50 00:43:45.770482 total size: 54813184 (52 MB)
51 00:43:45.770550 No compression specified
52 00:43:45.771773 progress 0 % (0 MB)
53 00:43:45.787269 progress 5 % (2 MB)
54 00:43:45.802686 progress 10 % (5 MB)
55 00:43:45.818636 progress 15 % (7 MB)
56 00:43:45.834023 progress 20 % (10 MB)
57 00:43:45.851487 progress 25 % (13 MB)
58 00:43:45.866822 progress 30 % (15 MB)
59 00:43:45.882587 progress 35 % (18 MB)
60 00:43:45.899081 progress 40 % (20 MB)
61 00:43:45.914615 progress 45 % (23 MB)
62 00:43:45.930184 progress 50 % (26 MB)
63 00:43:45.945751 progress 55 % (28 MB)
64 00:43:45.961415 progress 60 % (31 MB)
65 00:43:45.977114 progress 65 % (34 MB)
66 00:43:45.992607 progress 70 % (36 MB)
67 00:43:46.018735 progress 75 % (39 MB)
68 00:43:46.051784 progress 80 % (41 MB)
69 00:43:46.067253 progress 85 % (44 MB)
70 00:43:46.082918 progress 90 % (47 MB)
71 00:43:46.098408 progress 95 % (49 MB)
72 00:43:46.113491 progress 100 % (52 MB)
73 00:43:46.113766 52 MB downloaded in 0.34 s (152.28 MB/s)
74 00:43:46.113951 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:43:46.114387 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:43:46.114517 start: 1.3 download-retry (timeout 00:09:59) [common]
78 00:43:46.114643 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 00:43:46.114828 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:43:46.114941 saving as /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:43:46.115041 total size: 57695 (0 MB)
82 00:43:46.115139 No compression specified
83 00:43:46.117010 progress 56 % (0 MB)
84 00:43:46.117344 progress 100 % (0 MB)
85 00:43:46.117609 0 MB downloaded in 0.00 s (21.45 MB/s)
86 00:43:46.117796 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:43:46.118193 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:43:46.118321 start: 1.4 download-retry (timeout 00:09:59) [common]
90 00:43:46.118446 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 00:43:46.118604 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:43:46.118710 saving as /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/modules/modules.tar
93 00:43:46.118809 total size: 8608736 (8 MB)
94 00:43:46.118908 Using unxz to decompress xz
95 00:43:46.123223 progress 0 % (0 MB)
96 00:43:46.144169 progress 5 % (0 MB)
97 00:43:46.175209 progress 10 % (0 MB)
98 00:43:46.208959 progress 15 % (1 MB)
99 00:43:46.235102 progress 20 % (1 MB)
100 00:43:46.261217 progress 25 % (2 MB)
101 00:43:46.287365 progress 30 % (2 MB)
102 00:43:46.315140 progress 35 % (2 MB)
103 00:43:46.346654 progress 40 % (3 MB)
104 00:43:46.373132 progress 45 % (3 MB)
105 00:43:46.400987 progress 50 % (4 MB)
106 00:43:46.430636 progress 55 % (4 MB)
107 00:43:46.458455 progress 60 % (4 MB)
108 00:43:46.486215 progress 65 % (5 MB)
109 00:43:46.514612 progress 70 % (5 MB)
110 00:43:46.543498 progress 75 % (6 MB)
111 00:43:46.572771 progress 80 % (6 MB)
112 00:43:46.600061 progress 85 % (7 MB)
113 00:43:46.628308 progress 90 % (7 MB)
114 00:43:46.656399 progress 95 % (7 MB)
115 00:43:46.684428 progress 100 % (8 MB)
116 00:43:46.690602 8 MB downloaded in 0.57 s (14.36 MB/s)
117 00:43:46.690880 end: 1.4.1 http-download (duration 00:00:01) [common]
119 00:43:46.691176 end: 1.4 download-retry (duration 00:00:01) [common]
120 00:43:46.691280 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:43:46.691382 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:43:46.691472 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:43:46.691567 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:43:46.691825 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf
125 00:43:46.691975 makedir: /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin
126 00:43:46.692091 makedir: /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/tests
127 00:43:46.692201 makedir: /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/results
128 00:43:46.692327 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-add-keys
129 00:43:46.692497 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-add-sources
130 00:43:46.692659 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-background-process-start
131 00:43:46.692807 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-background-process-stop
132 00:43:46.692967 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-common-functions
133 00:43:46.693108 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-echo-ipv4
134 00:43:46.693249 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-install-packages
135 00:43:46.693388 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-installed-packages
136 00:43:46.693534 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-os-build
137 00:43:46.693675 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-probe-channel
138 00:43:46.693815 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-probe-ip
139 00:43:46.693953 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-target-ip
140 00:43:46.694090 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-target-mac
141 00:43:46.694233 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-target-storage
142 00:43:46.694376 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-case
143 00:43:46.694515 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-event
144 00:43:46.694651 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-feedback
145 00:43:46.694789 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-raise
146 00:43:46.694944 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-reference
147 00:43:46.695083 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-runner
148 00:43:46.695223 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-set
149 00:43:46.695367 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-test-shell
150 00:43:46.695510 Updating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-install-packages (oe)
151 00:43:46.695678 Updating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/bin/lava-installed-packages (oe)
152 00:43:46.695820 Creating /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/environment
153 00:43:46.695935 LAVA metadata
154 00:43:46.696019 - LAVA_JOB_ID=14368378
155 00:43:46.696091 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:43:46.696206 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:43:46.696280 skipped lava-vland-overlay
158 00:43:46.696362 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:43:46.696452 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:43:46.696532 skipped lava-multinode-overlay
161 00:43:46.696613 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:43:46.696706 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:43:46.696790 Loading test definitions
164 00:43:46.696893 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:43:46.697026 Using /lava-14368378 at stage 0
166 00:43:46.697382 uuid=14368378_1.5.2.3.1 testdef=None
167 00:43:46.697495 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:43:46.697589 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:43:46.698205 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:43:46.698458 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:43:46.699157 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:43:46.699430 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:43:46.700100 runner path: /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/0/tests/0_igt-gpu-panfrost test_uuid 14368378_1.5.2.3.1
176 00:43:46.700277 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:43:46.700509 Creating lava-test-runner.conf files
179 00:43:46.700580 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368378/lava-overlay-upz5yyrf/lava-14368378/0 for stage 0
180 00:43:46.700679 - 0_igt-gpu-panfrost
181 00:43:46.700789 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:43:46.700883 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:43:46.708865 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:43:46.708983 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:43:46.709078 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:43:46.709172 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:43:46.709271 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:43:48.640032 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 00:43:48.640447 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 00:43:48.640573 extracting modules file /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368378/extract-overlay-ramdisk-degil7g8/ramdisk
191 00:43:48.887484 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:43:48.887664 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 00:43:48.887771 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368378/compress-overlay-fha1wl90/overlay-1.5.2.4.tar.gz to ramdisk
194 00:43:48.887852 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368378/compress-overlay-fha1wl90/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368378/extract-overlay-ramdisk-degil7g8/ramdisk
195 00:43:48.895252 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:43:48.895385 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 00:43:48.895485 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:43:48.895589 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 00:43:48.895679 Building ramdisk /var/lib/lava/dispatcher/tmp/14368378/extract-overlay-ramdisk-degil7g8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368378/extract-overlay-ramdisk-degil7g8/ramdisk
200 00:43:50.251371 >> 465988 blocks
201 00:43:57.414871 rename /var/lib/lava/dispatcher/tmp/14368378/extract-overlay-ramdisk-degil7g8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/ramdisk/ramdisk.cpio.gz
202 00:43:57.415341 end: 1.5.7 compress-ramdisk (duration 00:00:09) [common]
203 00:43:57.415486 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
204 00:43:57.415590 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
205 00:43:57.415707 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/kernel/Image']
206 00:44:11.556964 Returned 0 in 14 seconds
207 00:44:11.657979 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/kernel/image.itb
208 00:44:12.611115 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:44:12.611517 output: Created: Sun Jun 16 01:44:12 2024
210 00:44:12.611601 output: Image 0 (kernel-1)
211 00:44:12.611672 output: Description:
212 00:44:12.611738 output: Created: Sun Jun 16 01:44:12 2024
213 00:44:12.611808 output: Type: Kernel Image
214 00:44:12.611877 output: Compression: lzma compressed
215 00:44:12.611944 output: Data Size: 13126376 Bytes = 12818.73 KiB = 12.52 MiB
216 00:44:12.612009 output: Architecture: AArch64
217 00:44:12.612074 output: OS: Linux
218 00:44:12.612139 output: Load Address: 0x00000000
219 00:44:12.612202 output: Entry Point: 0x00000000
220 00:44:12.612263 output: Hash algo: crc32
221 00:44:12.612324 output: Hash value: c791a20a
222 00:44:12.612387 output: Image 1 (fdt-1)
223 00:44:12.612450 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:44:12.612537 output: Created: Sun Jun 16 01:44:12 2024
225 00:44:12.612598 output: Type: Flat Device Tree
226 00:44:12.612658 output: Compression: uncompressed
227 00:44:12.612716 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:44:12.612774 output: Architecture: AArch64
229 00:44:12.612841 output: Hash algo: crc32
230 00:44:12.612911 output: Hash value: a9713552
231 00:44:12.612970 output: Image 2 (ramdisk-1)
232 00:44:12.613028 output: Description: unavailable
233 00:44:12.613086 output: Created: Sun Jun 16 01:44:12 2024
234 00:44:12.613144 output: Type: RAMDisk Image
235 00:44:12.613202 output: Compression: Unknown Compression
236 00:44:12.613260 output: Data Size: 60986640 Bytes = 59557.27 KiB = 58.16 MiB
237 00:44:12.613319 output: Architecture: AArch64
238 00:44:12.613377 output: OS: Linux
239 00:44:12.613445 output: Load Address: unavailable
240 00:44:12.613506 output: Entry Point: unavailable
241 00:44:12.613565 output: Hash algo: crc32
242 00:44:12.613622 output: Hash value: 1dc67cdb
243 00:44:12.613679 output: Default Configuration: 'conf-1'
244 00:44:12.613736 output: Configuration 0 (conf-1)
245 00:44:12.613794 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:44:12.613851 output: Kernel: kernel-1
247 00:44:12.613909 output: Init Ramdisk: ramdisk-1
248 00:44:12.613966 output: FDT: fdt-1
249 00:44:12.614024 output: Loadables: kernel-1
250 00:44:12.614081 output:
251 00:44:12.614306 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 00:44:12.614412 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 00:44:12.614527 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
254 00:44:12.614631 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 00:44:12.614718 No LXC device requested
256 00:44:12.614806 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:44:12.614898 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 00:44:12.614983 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:44:12.615059 Checking files for TFTP limit of 4294967296 bytes.
260 00:44:12.615625 end: 1 tftp-deploy (duration 00:00:27) [common]
261 00:44:12.615743 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:44:12.615845 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:44:12.615979 substitutions:
264 00:44:12.616052 - {DTB}: 14368378/tftp-deploy-kyzcmmi4/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:44:12.616124 - {INITRD}: 14368378/tftp-deploy-kyzcmmi4/ramdisk/ramdisk.cpio.gz
266 00:44:12.616189 - {KERNEL}: 14368378/tftp-deploy-kyzcmmi4/kernel/Image
267 00:44:12.616252 - {LAVA_MAC}: None
268 00:44:12.616315 - {PRESEED_CONFIG}: None
269 00:44:12.616375 - {PRESEED_LOCAL}: None
270 00:44:12.616435 - {RAMDISK}: 14368378/tftp-deploy-kyzcmmi4/ramdisk/ramdisk.cpio.gz
271 00:44:12.616496 - {ROOT_PART}: None
272 00:44:12.616556 - {ROOT}: None
273 00:44:12.616616 - {SERVER_IP}: 192.168.201.1
274 00:44:12.616676 - {TEE}: None
275 00:44:12.616736 Parsed boot commands:
276 00:44:12.616794 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:44:12.617057 Parsed boot commands: tftpboot 192.168.201.1 14368378/tftp-deploy-kyzcmmi4/kernel/image.itb 14368378/tftp-deploy-kyzcmmi4/kernel/cmdline
278 00:44:12.617162 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:44:12.617258 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:44:12.617363 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:44:12.617469 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:44:12.617551 Not connected, no need to disconnect.
283 00:44:12.617633 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:44:12.617719 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:44:12.617792 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 00:44:12.621797 Setting prompt string to ['lava-test: # ']
287 00:44:12.622196 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:44:12.622314 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:44:12.622424 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:44:12.622524 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:44:12.622726 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 00:44:35.227546 Returned 0 in 22 seconds
293 00:44:35.328518 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 00:44:35.328851 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 00:44:35.328958 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 00:44:35.329050 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:44:35.329122 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:44:35.329196 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:44:35.329648 [Enter `^Ec?' for help]
301 00:44:35.329739 [DL] 00000000 00000000 010701
302 00:44:35.329809
303 00:44:35.329875
304 00:44:35.329942 F0: 102B 0000
305 00:44:35.330005
306 00:44:35.330070 F3: 1006 0033 [0200]
307 00:44:35.330148
308 00:44:35.330218 F3: 4001 00E0 [0200]
309 00:44:35.330283
310 00:44:35.330343 F3: 0000 0000
311 00:44:35.330404
312 00:44:35.330463 V0: 0000 0000 [0001]
313 00:44:35.330523
314 00:44:35.330582 00: 1027 0002
315 00:44:35.330645
316 00:44:35.330703 01: 0000 0000
317 00:44:35.330763
318 00:44:35.330822 BP: 0C00 0251 [0000]
319 00:44:35.330880
320 00:44:35.330939 G0: 1182 0000
321 00:44:35.330998
322 00:44:35.331056 EC: 0004 0000 [0001]
323 00:44:35.331115
324 00:44:35.331173 S7: 0000 0000 [0000]
325 00:44:35.331232
326 00:44:35.331291 CC: 0000 0000 [0001]
327 00:44:35.331350
328 00:44:35.331408 T0: 0000 00DB [000F]
329 00:44:35.331469
330 00:44:35.331528 Jump to BL
331 00:44:35.331586
332 00:44:35.331645
333 00:44:35.331703
334 00:44:35.331761 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:44:35.331824 ARM64: Exception handlers installed.
336 00:44:35.331884 ARM64: Testing exception
337 00:44:35.331942 ARM64: Done test exception
338 00:44:35.332001 WDT: Last reset was cold boot
339 00:44:35.332059 SPI0(PAD0) initialized at 992727 Hz
340 00:44:35.332118 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:44:35.332178 Manufacturer: ef
342 00:44:35.332237 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:44:35.332296 Probing TPM: . done!
344 00:44:35.332354 TPM ready after 0 ms
345 00:44:35.332413 Connected to device vid:did:rid of 1ae0:0028:00
346 00:44:35.332472 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
347 00:44:35.332532 Initialized TPM device CR50 revision 0
348 00:44:35.332592 tlcl_send_startup: Startup return code is 0
349 00:44:35.332652 TPM: setup succeeded
350 00:44:35.332711 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:44:35.332770 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:44:35.332830 in-header: 03 19 00 00 08 00 00 00
353 00:44:35.332889 in-data: a2 e0 47 00 13 00 00 00
354 00:44:35.332948 Chrome EC: UHEPI supported
355 00:44:35.333006 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:44:35.333065 in-header: 03 a1 00 00 08 00 00 00
357 00:44:35.333124 in-data: 84 60 60 10 00 00 00 00
358 00:44:35.333183 Phase 1
359 00:44:35.333241 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:44:35.333301 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:44:35.333361 VB2:vb2_check_recovery() Recovery was requested manually
362 00:44:35.333420 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:44:35.333489 Recovery requested (1009000e)
364 00:44:35.333550 tlcl_extend: response is 0
365 00:44:35.333609 tlcl_extend: response is 0
366 00:44:35.333668
367 00:44:35.333726
368 00:44:35.333785 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:44:35.333845 ARM64: Exception handlers installed.
370 00:44:35.333903 ARM64: Testing exception
371 00:44:35.333961 ARM64: Done test exception
372 00:44:35.334021 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2000
373 00:44:35.334080 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:44:35.334138 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:44:35.334197 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
376 00:44:35.334256 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
377 00:44:35.334315 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
378 00:44:35.334374 [RTC]rtc_get_frequency_meter,134: input=0x9, output=767
379 00:44:35.334433 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
380 00:44:35.334492 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
381 00:44:35.334550 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
382 00:44:35.334609 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
383 00:44:35.334668 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 00:44:35.334728 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 00:44:35.334787 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 00:44:35.334846 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 00:44:35.334905 in-header: 03 19 00 00 08 00 00 00
388 00:44:35.334964 in-data: a2 e0 47 00 13 00 00 00
389 00:44:35.335022 Chrome EC: UHEPI supported
390 00:44:35.335081 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 00:44:35.335141 in-header: 03 a1 00 00 08 00 00 00
392 00:44:35.335200 in-data: 84 60 60 10 00 00 00 00
393 00:44:35.335259 Skip loading cached calibration data
394 00:44:35.335318 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 00:44:35.335377 in-header: 03 a1 00 00 08 00 00 00
396 00:44:35.335436 in-data: 84 60 60 10 00 00 00 00
397 00:44:35.335494 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 00:44:35.335553 in-header: 03 a1 00 00 08 00 00 00
399 00:44:35.335612 in-data: 84 60 60 10 00 00 00 00
400 00:44:35.335670 ADC[3]: Raw value=216472 ID=1
401 00:44:35.335729 Manufacturer: ef
402 00:44:35.335789 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 00:44:35.335848 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 00:44:35.335908 CBFS @ 21000 size 3d4000
405 00:44:35.335967 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 00:44:35.336026 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 00:44:35.336085 CBFS: Found @ offset 3c700 size 44
408 00:44:35.336144 DRAM-K: Full Calibration
409 00:44:35.336203 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 00:44:35.336262 CBFS @ 21000 size 3d4000
411 00:44:35.336321 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 00:44:35.336380 CBFS: Locating 'fallback/dram'
413 00:44:35.336448 CBFS: Found @ offset 24b00 size 12268
414 00:44:35.336517 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 00:44:35.336577 ddr_geometry: 1, config: 0x0
416 00:44:35.336637 header.status = 0x0
417 00:44:35.336695 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 00:44:35.336754 header.version = 0x5 (expected: 0x5)
419 00:44:35.337005 header.size = 0x8f0 (expected: 0x8f0)
420 00:44:35.337073 header.config = 0x0
421 00:44:35.337134 header.flags = 0x0
422 00:44:35.337193 header.checksum = 0x0
423 00:44:35.337253 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 00:44:35.337313 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 00:44:35.337372 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 00:44:35.337440 ddr_geometry:1
427 00:44:35.337502 [EMI] new MDL number = 1
428 00:44:35.337561 dram_cbt_mode_extern: 0
429 00:44:35.337621 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 00:44:35.337680 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 00:44:35.337740
432 00:44:35.337799
433 00:44:35.337858 [Bianco] ETT version 0.0.0.1
434 00:44:35.337918 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 00:44:35.337977
436 00:44:35.338035 vSetVcoreByFreq with vcore:762500, freq=1600
437 00:44:35.338097
438 00:44:35.338155 [DramcInit]
439 00:44:35.338214 AutoRefreshCKEOff AutoREF OFF
440 00:44:35.338272 DDRPhyPLLSetting-CKEOFF
441 00:44:35.338331 DDRPhyPLLSetting-CKEON
442 00:44:35.338389
443 00:44:35.338448 Enable WDQS
444 00:44:35.338507 [ModeRegInit_LP4] CH0 RK0
445 00:44:35.338565 Write Rank0 MR13 =0x18
446 00:44:35.338624 Write Rank0 MR12 =0x5d
447 00:44:35.338683 Write Rank0 MR1 =0x56
448 00:44:35.338741 Write Rank0 MR2 =0x1a
449 00:44:35.338800 Write Rank0 MR11 =0x0
450 00:44:35.338874 Write Rank0 MR22 =0x38
451 00:44:35.338935 Write Rank0 MR14 =0x5d
452 00:44:35.338994 Write Rank0 MR3 =0x30
453 00:44:35.339053 Write Rank0 MR13 =0x58
454 00:44:35.339111 Write Rank0 MR12 =0x5d
455 00:44:35.339169 Write Rank0 MR1 =0x56
456 00:44:35.339227 Write Rank0 MR2 =0x2d
457 00:44:35.339285 Write Rank0 MR11 =0x23
458 00:44:35.339343 Write Rank0 MR22 =0x34
459 00:44:35.339401 Write Rank0 MR14 =0x10
460 00:44:35.339460 Write Rank0 MR3 =0x30
461 00:44:35.339518 Write Rank0 MR13 =0xd8
462 00:44:35.339577 [ModeRegInit_LP4] CH0 RK1
463 00:44:35.339636 Write Rank1 MR13 =0x18
464 00:44:35.339695 Write Rank1 MR12 =0x5d
465 00:44:35.339754 Write Rank1 MR1 =0x56
466 00:44:35.339812 Write Rank1 MR2 =0x1a
467 00:44:35.339871 Write Rank1 MR11 =0x0
468 00:44:35.339930 Write Rank1 MR22 =0x38
469 00:44:35.339988 Write Rank1 MR14 =0x5d
470 00:44:35.340047 Write Rank1 MR3 =0x30
471 00:44:35.340106 Write Rank1 MR13 =0x58
472 00:44:35.340165 Write Rank1 MR12 =0x5d
473 00:44:35.340224 Write Rank1 MR1 =0x56
474 00:44:35.340282 Write Rank1 MR2 =0x2d
475 00:44:35.340341 Write Rank1 MR11 =0x23
476 00:44:35.340399 Write Rank1 MR22 =0x34
477 00:44:35.340457 Write Rank1 MR14 =0x10
478 00:44:35.340516 Write Rank1 MR3 =0x30
479 00:44:35.340574 Write Rank1 MR13 =0xd8
480 00:44:35.340633 [ModeRegInit_LP4] CH1 RK0
481 00:44:35.340692 Write Rank0 MR13 =0x18
482 00:44:35.340750 Write Rank0 MR12 =0x5d
483 00:44:35.340809 Write Rank0 MR1 =0x56
484 00:44:35.340867 Write Rank0 MR2 =0x1a
485 00:44:35.340926 Write Rank0 MR11 =0x0
486 00:44:35.340984 Write Rank0 MR22 =0x38
487 00:44:35.341043 Write Rank0 MR14 =0x5d
488 00:44:35.341101 Write Rank0 MR3 =0x30
489 00:44:35.341160 Write Rank0 MR13 =0x58
490 00:44:35.341218 Write Rank0 MR12 =0x5d
491 00:44:35.341277 Write Rank0 MR1 =0x56
492 00:44:35.341334 Write Rank0 MR2 =0x2d
493 00:44:35.341393 Write Rank0 MR11 =0x23
494 00:44:35.341456 Write Rank0 MR22 =0x34
495 00:44:35.341516 Write Rank0 MR14 =0x10
496 00:44:35.341574 Write Rank0 MR3 =0x30
497 00:44:35.341633 Write Rank0 MR13 =0xd8
498 00:44:35.341692 [ModeRegInit_LP4] CH1 RK1
499 00:44:35.341751 Write Rank1 MR13 =0x18
500 00:44:35.341808 Write Rank1 MR12 =0x5d
501 00:44:35.341867 Write Rank1 MR1 =0x56
502 00:44:35.341925 Write Rank1 MR2 =0x1a
503 00:44:35.341983 Write Rank1 MR11 =0x0
504 00:44:35.342041 Write Rank1 MR22 =0x38
505 00:44:35.342099 Write Rank1 MR14 =0x5d
506 00:44:35.342157 Write Rank1 MR3 =0x30
507 00:44:35.342215 Write Rank1 MR13 =0x58
508 00:44:35.342273 Write Rank1 MR12 =0x5d
509 00:44:35.342331 Write Rank1 MR1 =0x56
510 00:44:35.342389 Write Rank1 MR2 =0x2d
511 00:44:35.342448 Write Rank1 MR11 =0x23
512 00:44:35.342507 Write Rank1 MR22 =0x34
513 00:44:35.342565 Write Rank1 MR14 =0x10
514 00:44:35.342623 Write Rank1 MR3 =0x30
515 00:44:35.342682 Write Rank1 MR13 =0xd8
516 00:44:35.342741 match AC timing 3
517 00:44:35.342800 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 00:44:35.342860 [MiockJmeterHQA]
519 00:44:35.342919 vSetVcoreByFreq with vcore:762500, freq=1600
520 00:44:35.342978
521 00:44:35.343038 MIOCK jitter meter ch=0
522 00:44:35.343097
523 00:44:35.343155 1T = (101-17) = 84 dly cells
524 00:44:35.343216 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
525 00:44:35.343275 vSetVcoreByFreq with vcore:725000, freq=1200
526 00:44:35.343334
527 00:44:35.343393 MIOCK jitter meter ch=0
528 00:44:35.343452
529 00:44:35.343511 1T = (96-16) = 80 dly cells
530 00:44:35.343571 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
531 00:44:35.343630 vSetVcoreByFreq with vcore:725000, freq=800
532 00:44:35.343689
533 00:44:35.343749 MIOCK jitter meter ch=0
534 00:44:35.343808
535 00:44:35.343866 1T = (96-16) = 80 dly cells
536 00:44:35.343926 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
537 00:44:35.343986 vSetVcoreByFreq with vcore:762500, freq=1600
538 00:44:35.344045 vSetVcoreByFreq with vcore:762500, freq=1600
539 00:44:35.344104
540 00:44:35.344162 K DRVP
541 00:44:35.344221 1. OCD DRVP=0 CALOUT=0
542 00:44:35.344281 1. OCD DRVP=1 CALOUT=0
543 00:44:35.344341 1. OCD DRVP=2 CALOUT=0
544 00:44:35.344401 1. OCD DRVP=3 CALOUT=0
545 00:44:35.344460 1. OCD DRVP=4 CALOUT=0
546 00:44:35.344519 1. OCD DRVP=5 CALOUT=0
547 00:44:35.344579 1. OCD DRVP=6 CALOUT=0
548 00:44:35.344639 1. OCD DRVP=7 CALOUT=0
549 00:44:35.344699 1. OCD DRVP=8 CALOUT=1
550 00:44:35.344759
551 00:44:35.344818 1. OCD DRVP calibration OK! DRVP=8
552 00:44:35.344878
553 00:44:35.344936
554 00:44:35.344995
555 00:44:35.345053 K ODTN
556 00:44:35.345111 3. OCD ODTN=0 ,CALOUT=1
557 00:44:35.345174 3. OCD ODTN=1 ,CALOUT=1
558 00:44:35.345235 3. OCD ODTN=2 ,CALOUT=1
559 00:44:35.345295 3. OCD ODTN=3 ,CALOUT=1
560 00:44:35.345354 3. OCD ODTN=4 ,CALOUT=1
561 00:44:35.345413 3. OCD ODTN=5 ,CALOUT=1
562 00:44:35.345483 3. OCD ODTN=6 ,CALOUT=1
563 00:44:35.345544 3. OCD ODTN=7 ,CALOUT=0
564 00:44:35.345604
565 00:44:35.345662 3. OCD ODTN calibration OK! ODTN=7
566 00:44:35.345723
567 00:44:35.345782 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 00:44:35.345841 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 00:44:35.345901 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 00:44:35.345961
571 00:44:35.346019 K DRVP
572 00:44:35.346078 1. OCD DRVP=0 CALOUT=0
573 00:44:35.346138 1. OCD DRVP=1 CALOUT=0
574 00:44:35.346198 1. OCD DRVP=2 CALOUT=0
575 00:44:35.346257 1. OCD DRVP=3 CALOUT=0
576 00:44:35.346317 1. OCD DRVP=4 CALOUT=0
577 00:44:35.346376 1. OCD DRVP=5 CALOUT=0
578 00:44:35.346437 1. OCD DRVP=6 CALOUT=0
579 00:44:35.346496 1. OCD DRVP=7 CALOUT=0
580 00:44:35.346556 1. OCD DRVP=8 CALOUT=0
581 00:44:35.346615 1. OCD DRVP=9 CALOUT=0
582 00:44:35.346675 1. OCD DRVP=10 CALOUT=1
583 00:44:35.346734
584 00:44:35.346982 1. OCD DRVP calibration OK! DRVP=10
585 00:44:35.347051
586 00:44:35.347111
587 00:44:35.347170
588 00:44:35.347229 K ODTN
589 00:44:35.347287 3. OCD ODTN=0 ,CALOUT=1
590 00:44:35.347347 3. OCD ODTN=1 ,CALOUT=1
591 00:44:35.347408 3. OCD ODTN=2 ,CALOUT=1
592 00:44:35.347468 3. OCD ODTN=3 ,CALOUT=1
593 00:44:35.347527 3. OCD ODTN=4 ,CALOUT=1
594 00:44:35.347588 3. OCD ODTN=5 ,CALOUT=1
595 00:44:35.347647 3. OCD ODTN=6 ,CALOUT=1
596 00:44:35.347707 3. OCD ODTN=7 ,CALOUT=1
597 00:44:35.347766 3. OCD ODTN=8 ,CALOUT=1
598 00:44:35.347827 3. OCD ODTN=9 ,CALOUT=1
599 00:44:35.347887 3. OCD ODTN=10 ,CALOUT=1
600 00:44:35.347947 3. OCD ODTN=11 ,CALOUT=1
601 00:44:35.348007 3. OCD ODTN=12 ,CALOUT=1
602 00:44:35.348066 3. OCD ODTN=13 ,CALOUT=1
603 00:44:35.348126 3. OCD ODTN=14 ,CALOUT=1
604 00:44:35.348185 3. OCD ODTN=15 ,CALOUT=0
605 00:44:35.348245
606 00:44:35.348304 3. OCD ODTN calibration OK! ODTN=15
607 00:44:35.348364
608 00:44:35.348423 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 00:44:35.348483 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 00:44:35.348543 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 00:44:35.348602
612 00:44:35.348661 [DramcInit]
613 00:44:35.348721 AutoRefreshCKEOff AutoREF OFF
614 00:44:35.348780 DDRPhyPLLSetting-CKEOFF
615 00:44:35.348838 DDRPhyPLLSetting-CKEON
616 00:44:35.348896
617 00:44:35.348955 Enable WDQS
618 00:44:35.349013 ==
619 00:44:35.349072 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 00:44:35.349132 fsp= 1, odt_onoff= 1, Byte mode= 0
621 00:44:35.349192 ==
622 00:44:35.349251 [Duty_Offset_Calibration]
623 00:44:35.349310
624 00:44:35.349368 ===========================
625 00:44:35.349428 B0:1 B1:-1 CA:0
626 00:44:35.349498 ==
627 00:44:35.349558 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 00:44:35.349617 fsp= 1, odt_onoff= 1, Byte mode= 0
629 00:44:35.349676 ==
630 00:44:35.349736 [Duty_Offset_Calibration]
631 00:44:35.349795
632 00:44:35.349853 ===========================
633 00:44:35.349913 B0:0 B1:0 CA:0
634 00:44:35.349972 [ModeRegInit_LP4] CH0 RK0
635 00:44:35.350031 Write Rank0 MR13 =0x18
636 00:44:35.350089 Write Rank0 MR12 =0x5d
637 00:44:35.350148 Write Rank0 MR1 =0x56
638 00:44:35.350206 Write Rank0 MR2 =0x1a
639 00:44:35.350264 Write Rank0 MR11 =0x0
640 00:44:35.350322 Write Rank0 MR22 =0x38
641 00:44:35.350381 Write Rank0 MR14 =0x5d
642 00:44:35.350439 Write Rank0 MR3 =0x30
643 00:44:35.350498 Write Rank0 MR13 =0x58
644 00:44:35.350555 Write Rank0 MR12 =0x5d
645 00:44:35.350614 Write Rank0 MR1 =0x56
646 00:44:35.350672 Write Rank0 MR2 =0x2d
647 00:44:35.350730 Write Rank0 MR11 =0x23
648 00:44:35.350789 Write Rank0 MR22 =0x34
649 00:44:35.350848 Write Rank0 MR14 =0x10
650 00:44:35.350906 Write Rank0 MR3 =0x30
651 00:44:35.350964 Write Rank0 MR13 =0xd8
652 00:44:35.351022 [ModeRegInit_LP4] CH0 RK1
653 00:44:35.351080 Write Rank1 MR13 =0x18
654 00:44:35.351139 Write Rank1 MR12 =0x5d
655 00:44:35.351197 Write Rank1 MR1 =0x56
656 00:44:35.351255 Write Rank1 MR2 =0x1a
657 00:44:35.351312 Write Rank1 MR11 =0x0
658 00:44:35.351371 Write Rank1 MR22 =0x38
659 00:44:35.351429 Write Rank1 MR14 =0x5d
660 00:44:35.351488 Write Rank1 MR3 =0x30
661 00:44:35.351546 Write Rank1 MR13 =0x58
662 00:44:35.351604 Write Rank1 MR12 =0x5d
663 00:44:35.351663 Write Rank1 MR1 =0x56
664 00:44:35.351721 Write Rank1 MR2 =0x2d
665 00:44:35.351779 Write Rank1 MR11 =0x23
666 00:44:35.351838 Write Rank1 MR22 =0x34
667 00:44:35.351896 Write Rank1 MR14 =0x10
668 00:44:35.351955 Write Rank1 MR3 =0x30
669 00:44:35.352013 Write Rank1 MR13 =0xd8
670 00:44:35.352072 [ModeRegInit_LP4] CH1 RK0
671 00:44:35.352131 Write Rank0 MR13 =0x18
672 00:44:35.352189 Write Rank0 MR12 =0x5d
673 00:44:35.352248 Write Rank0 MR1 =0x56
674 00:44:35.352306 Write Rank0 MR2 =0x1a
675 00:44:35.352364 Write Rank0 MR11 =0x0
676 00:44:35.352422 Write Rank0 MR22 =0x38
677 00:44:35.352480 Write Rank0 MR14 =0x5d
678 00:44:35.352539 Write Rank0 MR3 =0x30
679 00:44:35.352597 Write Rank0 MR13 =0x58
680 00:44:35.352656 Write Rank0 MR12 =0x5d
681 00:44:35.352715 Write Rank0 MR1 =0x56
682 00:44:35.352773 Write Rank0 MR2 =0x2d
683 00:44:35.352850 Write Rank0 MR11 =0x23
684 00:44:35.352912 Write Rank0 MR22 =0x34
685 00:44:35.352971 Write Rank0 MR14 =0x10
686 00:44:35.353030 Write Rank0 MR3 =0x30
687 00:44:35.353089 Write Rank0 MR13 =0xd8
688 00:44:35.353148 [ModeRegInit_LP4] CH1 RK1
689 00:44:35.353206 Write Rank1 MR13 =0x18
690 00:44:35.353264 Write Rank1 MR12 =0x5d
691 00:44:35.353323 Write Rank1 MR1 =0x56
692 00:44:35.353381 Write Rank1 MR2 =0x1a
693 00:44:35.353453 Write Rank1 MR11 =0x0
694 00:44:35.353514 Write Rank1 MR22 =0x38
695 00:44:35.353572 Write Rank1 MR14 =0x5d
696 00:44:35.353631 Write Rank1 MR3 =0x30
697 00:44:35.353689 Write Rank1 MR13 =0x58
698 00:44:35.353746 Write Rank1 MR12 =0x5d
699 00:44:35.353805 Write Rank1 MR1 =0x56
700 00:44:35.353864 Write Rank1 MR2 =0x2d
701 00:44:35.353922 Write Rank1 MR11 =0x23
702 00:44:35.353981 Write Rank1 MR22 =0x34
703 00:44:35.354039 Write Rank1 MR14 =0x10
704 00:44:35.354097 Write Rank1 MR3 =0x30
705 00:44:35.354155 Write Rank1 MR13 =0xd8
706 00:44:35.354214 match AC timing 3
707 00:44:35.354272 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 00:44:35.354333 DramC Write-DBI off
709 00:44:35.354392 DramC Read-DBI off
710 00:44:35.354451 Write Rank0 MR13 =0x59
711 00:44:35.354509 ==
712 00:44:35.354568 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 00:44:35.354628 fsp= 1, odt_onoff= 1, Byte mode= 0
714 00:44:35.354688 ==
715 00:44:35.354747 === u2Vref_new: 0x56 --> 0x2d
716 00:44:35.354807 === u2Vref_new: 0x58 --> 0x38
717 00:44:35.354866 === u2Vref_new: 0x5a --> 0x39
718 00:44:35.354925 === u2Vref_new: 0x5c --> 0x3c
719 00:44:35.354984 === u2Vref_new: 0x5e --> 0x3d
720 00:44:35.355042 === u2Vref_new: 0x60 --> 0xa0
721 00:44:35.355104 [CA 0] Center 34 (6~63) winsize 58
722 00:44:35.355163 [CA 1] Center 35 (7~63) winsize 57
723 00:44:35.355222 [CA 2] Center 28 (-1~58) winsize 60
724 00:44:35.355281 [CA 3] Center 24 (-4~52) winsize 57
725 00:44:35.355340 [CA 4] Center 25 (-3~53) winsize 57
726 00:44:35.355398 [CA 5] Center 30 (1~59) winsize 59
727 00:44:35.355457
728 00:44:35.355516 [CATrainingPosCal] consider 1 rank data
729 00:44:35.355575 u2DelayCellTimex100 = 744/100 ps
730 00:44:35.355635 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
731 00:44:35.355694 CA1 delay=35 (7~63),Diff = 11 PI (14 cell)
732 00:44:35.355753 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
733 00:44:35.355812 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
734 00:44:35.355871 CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)
735 00:44:35.355938 CA5 delay=30 (1~59),Diff = 6 PI (7 cell)
736 00:44:35.356001
737 00:44:35.356060 CA PerBit enable=1, Macro0, CA PI delay=24
738 00:44:35.356120 === u2Vref_new: 0x5c --> 0x3c
739 00:44:35.356178
740 00:44:35.356237 Vref(ca) range 1: 28
741 00:44:35.356296
742 00:44:35.356355 CS Dly= 8 (39-0-32)
743 00:44:35.356413 Write Rank0 MR13 =0xd8
744 00:44:35.356471 Write Rank0 MR13 =0xd8
745 00:44:35.356529 Write Rank0 MR12 =0x5c
746 00:44:35.356588 Write Rank1 MR13 =0x59
747 00:44:35.356646 ==
748 00:44:35.356912 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 00:44:35.356982 fsp= 1, odt_onoff= 1, Byte mode= 0
750 00:44:35.357043 ==
751 00:44:35.357103 === u2Vref_new: 0x56 --> 0x2d
752 00:44:35.357163 === u2Vref_new: 0x58 --> 0x38
753 00:44:35.357223 === u2Vref_new: 0x5a --> 0x39
754 00:44:35.357281 === u2Vref_new: 0x5c --> 0x3c
755 00:44:35.357344 === u2Vref_new: 0x5e --> 0x3d
756 00:44:35.357411 === u2Vref_new: 0x60 --> 0xa0
757 00:44:35.357481 [CA 0] Center 35 (8~63) winsize 56
758 00:44:35.357541 [CA 1] Center 35 (7~63) winsize 57
759 00:44:35.357600 [CA 2] Center 28 (-1~58) winsize 60
760 00:44:35.357659 [CA 3] Center 23 (-5~51) winsize 57
761 00:44:35.357718 [CA 4] Center 23 (-5~51) winsize 57
762 00:44:35.357777 [CA 5] Center 29 (0~59) winsize 60
763 00:44:35.357836
764 00:44:35.357895 [CATrainingPosCal] consider 2 rank data
765 00:44:35.357954 u2DelayCellTimex100 = 744/100 ps
766 00:44:35.358013 CA0 delay=35 (8~63),Diff = 12 PI (15 cell)
767 00:44:35.358071 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
768 00:44:35.358130 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
769 00:44:35.358189 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 00:44:35.358248 CA4 delay=24 (-3~51),Diff = 1 PI (1 cell)
771 00:44:35.358306 CA5 delay=30 (1~59),Diff = 7 PI (9 cell)
772 00:44:35.358364
773 00:44:35.358423 CA PerBit enable=1, Macro0, CA PI delay=23
774 00:44:35.358481 === u2Vref_new: 0x5e --> 0x3d
775 00:44:35.358540
776 00:44:35.358598 Vref(ca) range 1: 30
777 00:44:35.358656
778 00:44:35.358714 CS Dly= 5 (36-0-32)
779 00:44:35.358773 Write Rank1 MR13 =0xd8
780 00:44:35.358831 Write Rank1 MR13 =0xd8
781 00:44:35.358889 Write Rank1 MR12 =0x5e
782 00:44:35.358948 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 00:44:35.359007 Write Rank0 MR2 =0xad
784 00:44:35.359065 [Write Leveling]
785 00:44:35.359123 delay byte0 byte1 byte2 byte3
786 00:44:35.359182
787 00:44:35.359239 10 0 0
788 00:44:35.359299 11 0 0
789 00:44:35.359358 12 0 0
790 00:44:35.359418 13 0 0
791 00:44:35.359477 14 0 0
792 00:44:35.359537 15 0 0
793 00:44:35.359596 16 0 0
794 00:44:35.359655 17 0 0
795 00:44:35.359714 18 0 0
796 00:44:35.359773 19 0 0
797 00:44:35.359833 20 0 0
798 00:44:35.359892 21 0 0
799 00:44:35.359951 22 0 0
800 00:44:35.360010 23 0 0
801 00:44:35.360070 24 0 0
802 00:44:35.360129 25 0 0
803 00:44:35.360189 26 0 0
804 00:44:35.360248 27 0 ff
805 00:44:35.360307 28 0 ff
806 00:44:35.360367 29 0 ff
807 00:44:35.360426 30 0 ff
808 00:44:35.360486 31 ff ff
809 00:44:35.360545 32 ff ff
810 00:44:35.360605 33 ff ff
811 00:44:35.360664 34 ff ff
812 00:44:35.360723 35 ff ff
813 00:44:35.360783 36 ff ff
814 00:44:35.360842 37 ff ff
815 00:44:35.360901 pass bytecount = 0xff (0xff: all bytes pass)
816 00:44:35.360959
817 00:44:35.361017 DQS0 dly: 31
818 00:44:35.361076 DQS1 dly: 27
819 00:44:35.361134 Write Rank0 MR2 =0x2d
820 00:44:35.361193 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 00:44:35.361252 Write Rank0 MR1 =0xd6
822 00:44:35.361310 [Gating]
823 00:44:35.361369 ==
824 00:44:35.361427 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 00:44:35.361495 fsp= 1, odt_onoff= 1, Byte mode= 0
826 00:44:35.361555 ==
827 00:44:35.361613 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
828 00:44:35.361674 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
829 00:44:35.361734 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
830 00:44:35.361794 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
831 00:44:35.361854 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
832 00:44:35.361914 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 00:44:35.361974 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 00:44:35.362034 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 00:44:35.362094 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 00:44:35.362154 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 00:44:35.362213 3 2 8 |2c2c 2c2b |(11 10)(11 11) |(1 0)(1 0)| 0
838 00:44:35.362273 3 2 12 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
839 00:44:35.362333 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
840 00:44:35.362393 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
841 00:44:35.362453 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 00:44:35.362513 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 00:44:35.362572 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 00:44:35.362632 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 00:44:35.362692 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
846 00:44:35.362751 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:44:35.362810 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 00:44:35.362870 [Byte 0] Lead/lag Transition tap number (1)
849 00:44:35.362929 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
850 00:44:35.362989 [Byte 1] Lead/lag falling Transition (3, 3, 20)
851 00:44:35.363048 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 00:44:35.363108 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 00:44:35.363167 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 00:44:35.363227 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 00:44:35.363287 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 00:44:35.363347 3 4 12 |1716 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 00:44:35.363406 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
858 00:44:35.363466 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:44:35.363526 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:44:35.363586 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:44:35.363646 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:44:35.363706 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:44:35.363765 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:44:35.363825 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:44:35.363884 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:44:35.363944 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:44:35.364003 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:44:35.364064 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:44:35.364123 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 00:44:35.364182 [Byte 0] Lead/lag falling Transition (3, 6, 0)
871 00:44:35.364437 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
872 00:44:35.364504 [Byte 1] Lead/lag falling Transition (3, 6, 4)
873 00:44:35.364565 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
874 00:44:35.364625 [Byte 0] Lead/lag Transition tap number (3)
875 00:44:35.364685 [Byte 1] Lead/lag Transition tap number (2)
876 00:44:35.364743 3 6 12 |808 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
877 00:44:35.364804 3 6 16 |4646 605 |(0 0)(11 11) |(0 0)(0 0)| 0
878 00:44:35.364865 [Byte 0]First pass (3, 6, 16)
879 00:44:35.364924 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
880 00:44:35.364983 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 00:44:35.365043 [Byte 1]First pass (3, 6, 24)
882 00:44:35.365101 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:44:35.365161 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:44:35.365221 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:44:35.365281 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:44:35.365341 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:44:35.365402 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:44:35.365472 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 00:44:35.365532 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 00:44:35.365592 All bytes gating window > 1UI, Early break!
891 00:44:35.365651
892 00:44:35.365710 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
893 00:44:35.365769
894 00:44:35.365828 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
895 00:44:35.365886
896 00:44:35.365944
897 00:44:35.366002
898 00:44:35.366060 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
899 00:44:35.366118
900 00:44:35.366177 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
901 00:44:35.366235
902 00:44:35.366293
903 00:44:35.366351 Write Rank0 MR1 =0x56
904 00:44:35.366409
905 00:44:35.366468 best RODT dly(2T, 0.5T) = (2, 3)
906 00:44:35.366527
907 00:44:35.366585 best RODT dly(2T, 0.5T) = (2, 3)
908 00:44:35.366646 ==
909 00:44:35.366705 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 00:44:35.366764 fsp= 1, odt_onoff= 1, Byte mode= 0
911 00:44:35.366824 ==
912 00:44:35.366883 Start DQ dly to find pass range UseTestEngine =0
913 00:44:35.366943 x-axis: bit #, y-axis: DQ dly (-127~63)
914 00:44:35.367001 RX Vref Scan = 0
915 00:44:35.367060 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:44:35.367122 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:44:35.367183 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:44:35.367243 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:44:35.367302 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:44:35.367361 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:44:35.367421 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:44:35.367480 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:44:35.367540 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:44:35.367600 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:44:35.367659 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:44:35.367718 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:44:35.367778 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:44:35.367837 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:44:35.367896 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:44:35.367955 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:44:35.368015 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:44:35.368075 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:44:35.368135 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:44:35.368194 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:44:35.368254 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:44:35.368313 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:44:35.368372 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 00:44:35.368432 -3, [0] xxxxxxxx oxxxxxxx [MSB]
939 00:44:35.368491 -2, [0] xxxoxxxx oxxoxxxx [MSB]
940 00:44:35.368551 -1, [0] xxxoxxxx oxxoxxxx [MSB]
941 00:44:35.368611 0, [0] xxxoxxxx ooxoooxx [MSB]
942 00:44:35.368671 1, [0] xxxoxoxx ooxoooox [MSB]
943 00:44:35.368735 2, [0] xxxoxoxx ooxoooox [MSB]
944 00:44:35.368794 3, [0] xxxoxoox ooxoooox [MSB]
945 00:44:35.368853 4, [0] xxxoxooo ooxooooo [MSB]
946 00:44:35.368912 5, [0] xxxooooo ooxooooo [MSB]
947 00:44:35.368972 6, [0] oooooooo ooxooooo [MSB]
948 00:44:35.369031 32, [0] oooxoooo oooooooo [MSB]
949 00:44:35.369090 33, [0] oooxoooo xooooooo [MSB]
950 00:44:35.369149 34, [0] oooxoooo xooxoooo [MSB]
951 00:44:35.369209 35, [0] oooxoooo xxoxoooo [MSB]
952 00:44:35.369268 36, [0] oooxoxoo xxoxxoxo [MSB]
953 00:44:35.369327 37, [0] oooxoxxx xxoxxxxo [MSB]
954 00:44:35.369387 38, [0] oooxoxxx xxoxxxxo [MSB]
955 00:44:35.369458 39, [0] oooxoxxx xxoxxxxx [MSB]
956 00:44:35.369520 40, [0] oooxxxxx xxoxxxxx [MSB]
957 00:44:35.369579 41, [0] xxxxxxxx xxoxxxxx [MSB]
958 00:44:35.369640 42, [0] xxxxxxxx xxxxxxxx [MSB]
959 00:44:35.369699 iDelay=42, Bit 0, Center 23 (6 ~ 40) 35
960 00:44:35.369759 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
961 00:44:35.369818 iDelay=42, Bit 2, Center 23 (6 ~ 40) 35
962 00:44:35.369876 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
963 00:44:35.369935 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
964 00:44:35.369994 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
965 00:44:35.370052 iDelay=42, Bit 6, Center 19 (3 ~ 36) 34
966 00:44:35.370110 iDelay=42, Bit 7, Center 20 (4 ~ 36) 33
967 00:44:35.370168 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
968 00:44:35.370227 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
969 00:44:35.370285 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
970 00:44:35.370344 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
971 00:44:35.370402 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
972 00:44:35.370461 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
973 00:44:35.370520 iDelay=42, Bit 14, Center 18 (1 ~ 35) 35
974 00:44:35.370578 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
975 00:44:35.370636 ==
976 00:44:35.370695 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 00:44:35.370754 fsp= 1, odt_onoff= 1, Byte mode= 0
978 00:44:35.370814 ==
979 00:44:35.370872 DQS Delay:
980 00:44:35.370930 DQS0 = 0, DQS1 = 0
981 00:44:35.370988 DQM Delay:
982 00:44:35.371047 DQM0 = 20, DQM1 = 18
983 00:44:35.371104 DQ Delay:
984 00:44:35.371163 DQ0 =23, DQ1 =23, DQ2 =23, DQ3 =14
985 00:44:35.371221 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
986 00:44:35.371279 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
987 00:44:35.371338 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
988 00:44:35.371398
989 00:44:35.371456
990 00:44:35.371514 DramC Write-DBI off
991 00:44:35.371573 ==
992 00:44:35.371632 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
993 00:44:35.371692 fsp= 1, odt_onoff= 1, Byte mode= 0
994 00:44:35.371751 ==
995 00:44:35.371811 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
996 00:44:35.371869
997 00:44:35.371928 Begin, DQ Scan Range 923~1179
998 00:44:35.371987
999 00:44:35.372045
1000 00:44:35.372103 TX Vref Scan disable
1001 00:44:35.372356 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1002 00:44:35.372424 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1003 00:44:35.372486 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1004 00:44:35.372547 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1005 00:44:35.372606 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:44:35.372666 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:44:35.372726 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:44:35.372787 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:44:35.372847 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:44:35.372907 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:44:35.372967 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:44:35.373027 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:44:35.373087 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:44:35.373148 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:44:35.373208 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:44:35.373267 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:44:35.373329 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:44:35.373391 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:44:35.373462 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:44:35.373524 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:44:35.373585 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:44:35.373644 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:44:35.373704 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:44:35.373763 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:44:35.373830 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:44:35.373894 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:44:35.373954 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:44:35.374014 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:44:35.374074 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:44:35.374133 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:44:35.374192 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:44:35.374251 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:44:35.374310 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:44:35.374369 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:44:35.374428 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:44:35.374487 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:44:35.374547 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:44:35.374605 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:44:35.374665 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:44:35.374724 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:44:35.374783 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:44:35.374842 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:44:35.374901 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:44:35.374960 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:44:35.375019 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:44:35.375077 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:44:35.375136 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:44:35.375195 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1049 00:44:35.375253 971 |3 6 11|[0] xxxxxxxx ooxoxxxx [MSB]
1050 00:44:35.375312 972 |3 6 12|[0] xxxxxxxx ooxoxxxx [MSB]
1051 00:44:35.375371 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1052 00:44:35.375429 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1053 00:44:35.375488 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1054 00:44:35.375547 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1055 00:44:35.375606 977 |3 6 17|[0] xxxoooox oooooooo [MSB]
1056 00:44:35.375665 978 |3 6 18|[0] xooooooo oooooooo [MSB]
1057 00:44:35.375724 990 |3 6 30|[0] oooooooo oooxoxoo [MSB]
1058 00:44:35.375784 991 |3 6 31|[0] oooooooo xxoxxxoo [MSB]
1059 00:44:35.375843 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1060 00:44:35.375902 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1061 00:44:35.375962 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1062 00:44:35.376021 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1063 00:44:35.376080 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1064 00:44:35.376138 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1065 00:44:35.376198 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1066 00:44:35.376257 Byte0, DQ PI dly=986, DQM PI dly= 986
1067 00:44:35.376315 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1068 00:44:35.376374
1069 00:44:35.376431 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1070 00:44:35.376491
1071 00:44:35.376548 Byte1, DQ PI dly=981, DQM PI dly= 981
1072 00:44:35.376607 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1073 00:44:35.376665
1074 00:44:35.376723 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1075 00:44:35.376781
1076 00:44:35.376839 ==
1077 00:44:35.376897 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1078 00:44:35.376956 fsp= 1, odt_onoff= 1, Byte mode= 0
1079 00:44:35.377015 ==
1080 00:44:35.377087 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1081 00:44:35.377194
1082 00:44:35.377289 Begin, DQ Scan Range 957~1021
1083 00:44:35.377381 Write Rank0 MR14 =0x0
1084 00:44:35.377472
1085 00:44:35.377533 CH=0, VrefRange= 0, VrefLevel = 0
1086 00:44:35.377593 TX Bit0 (982~993) 12 987, Bit8 (972~985) 14 978,
1087 00:44:35.377656 TX Bit1 (980~993) 14 986, Bit9 (974~987) 14 980,
1088 00:44:35.377715 TX Bit2 (982~994) 13 988, Bit10 (977~991) 15 984,
1089 00:44:35.377775 TX Bit3 (976~990) 15 983, Bit11 (973~983) 11 978,
1090 00:44:35.377834 TX Bit4 (980~992) 13 986, Bit12 (976~985) 10 980,
1091 00:44:35.377893 TX Bit5 (978~991) 14 984, Bit13 (976~984) 9 980,
1092 00:44:35.377952 TX Bit6 (978~991) 14 984, Bit14 (976~989) 14 982,
1093 00:44:35.378011 TX Bit7 (980~993) 14 986, Bit15 (977~991) 15 984,
1094 00:44:35.378070
1095 00:44:35.378128 Write Rank0 MR14 =0x2
1096 00:44:35.378186
1097 00:44:35.378245 CH=0, VrefRange= 0, VrefLevel = 2
1098 00:44:35.378303 TX Bit0 (982~994) 13 988, Bit8 (971~986) 16 978,
1099 00:44:35.378362 TX Bit1 (979~994) 16 986, Bit9 (974~988) 15 981,
1100 00:44:35.378421 TX Bit2 (981~995) 15 988, Bit10 (977~992) 16 984,
1101 00:44:35.378480 TX Bit3 (976~991) 16 983, Bit11 (972~984) 13 978,
1102 00:44:35.378539 TX Bit4 (979~993) 15 986, Bit12 (975~986) 12 980,
1103 00:44:35.378597 TX Bit5 (977~992) 16 984, Bit13 (975~986) 12 980,
1104 00:44:35.378655 TX Bit6 (978~992) 15 985, Bit14 (975~989) 15 982,
1105 00:44:35.378714 TX Bit7 (980~993) 14 986, Bit15 (977~992) 16 984,
1106 00:44:35.378772
1107 00:44:35.379028 Write Rank0 MR14 =0x4
1108 00:44:35.379096
1109 00:44:35.379155 CH=0, VrefRange= 0, VrefLevel = 4
1110 00:44:35.379215 TX Bit0 (981~995) 15 988, Bit8 (971~987) 17 979,
1111 00:44:35.379291 TX Bit1 (979~995) 17 987, Bit9 (973~988) 16 980,
1112 00:44:35.379352 TX Bit2 (980~996) 17 988, Bit10 (977~993) 17 985,
1113 00:44:35.379411 TX Bit3 (976~991) 16 983, Bit11 (972~984) 13 978,
1114 00:44:35.379470 TX Bit4 (979~994) 16 986, Bit12 (975~987) 13 981,
1115 00:44:35.379528 TX Bit5 (977~992) 16 984, Bit13 (975~987) 13 981,
1116 00:44:35.379587 TX Bit6 (978~992) 15 985, Bit14 (975~990) 16 982,
1117 00:44:35.379645 TX Bit7 (979~994) 16 986, Bit15 (976~992) 17 984,
1118 00:44:35.379704
1119 00:44:35.379762 Write Rank0 MR14 =0x6
1120 00:44:35.379840
1121 00:44:35.379900 CH=0, VrefRange= 0, VrefLevel = 6
1122 00:44:35.379959 TX Bit0 (982~996) 15 989, Bit8 (970~988) 19 979,
1123 00:44:35.380018 TX Bit1 (979~996) 18 987, Bit9 (973~989) 17 981,
1124 00:44:35.380076 TX Bit2 (980~997) 18 988, Bit10 (976~994) 19 985,
1125 00:44:35.380135 TX Bit3 (976~991) 16 983, Bit11 (971~985) 15 978,
1126 00:44:35.380194 TX Bit4 (978~994) 17 986, Bit12 (975~988) 14 981,
1127 00:44:35.380252 TX Bit5 (977~992) 16 984, Bit13 (975~988) 14 981,
1128 00:44:35.380310 TX Bit6 (977~993) 17 985, Bit14 (975~990) 16 982,
1129 00:44:35.380369 TX Bit7 (979~995) 17 987, Bit15 (976~993) 18 984,
1130 00:44:35.380428
1131 00:44:35.380486 Write Rank0 MR14 =0x8
1132 00:44:35.380544
1133 00:44:35.380601 CH=0, VrefRange= 0, VrefLevel = 8
1134 00:44:35.380659 TX Bit0 (981~997) 17 989, Bit8 (970~988) 19 979,
1135 00:44:35.380718 TX Bit1 (979~997) 19 988, Bit9 (972~989) 18 980,
1136 00:44:35.380776 TX Bit2 (979~998) 20 988, Bit10 (977~995) 19 986,
1137 00:44:35.380833 TX Bit3 (975~992) 18 983, Bit11 (971~987) 17 979,
1138 00:44:35.380892 TX Bit4 (978~995) 18 986, Bit12 (974~988) 15 981,
1139 00:44:35.380950 TX Bit5 (977~993) 17 985, Bit13 (974~988) 15 981,
1140 00:44:35.381009 TX Bit6 (977~994) 18 985, Bit14 (974~991) 18 982,
1141 00:44:35.381087 TX Bit7 (979~995) 17 987, Bit15 (976~994) 19 985,
1142 00:44:35.381147
1143 00:44:35.381205 Write Rank0 MR14 =0xa
1144 00:44:35.381264
1145 00:44:35.381321 CH=0, VrefRange= 0, VrefLevel = 10
1146 00:44:35.381380 TX Bit0 (981~998) 18 989, Bit8 (969~989) 21 979,
1147 00:44:35.381448 TX Bit1 (978~998) 21 988, Bit9 (972~989) 18 980,
1148 00:44:35.381509 TX Bit2 (979~998) 20 988, Bit10 (976~996) 21 986,
1149 00:44:35.381568 TX Bit3 (975~992) 18 983, Bit11 (970~988) 19 979,
1150 00:44:35.381627 TX Bit4 (978~996) 19 987, Bit12 (974~989) 16 981,
1151 00:44:35.381686 TX Bit5 (977~994) 18 985, Bit13 (974~989) 16 981,
1152 00:44:35.381745 TX Bit6 (977~994) 18 985, Bit14 (974~992) 19 983,
1153 00:44:35.381807 TX Bit7 (978~997) 20 987, Bit15 (976~995) 20 985,
1154 00:44:35.381867
1155 00:44:35.381925 Write Rank0 MR14 =0xc
1156 00:44:35.381983
1157 00:44:35.382041 CH=0, VrefRange= 0, VrefLevel = 12
1158 00:44:35.382099 TX Bit0 (980~998) 19 989, Bit8 (969~989) 21 979,
1159 00:44:35.382157 TX Bit1 (978~998) 21 988, Bit9 (971~990) 20 980,
1160 00:44:35.382216 TX Bit2 (979~998) 20 988, Bit10 (976~996) 21 986,
1161 00:44:35.382275 TX Bit3 (975~992) 18 983, Bit11 (970~988) 19 979,
1162 00:44:35.382333 TX Bit4 (978~997) 20 987, Bit12 (973~989) 17 981,
1163 00:44:35.382391 TX Bit5 (976~994) 19 985, Bit13 (974~989) 16 981,
1164 00:44:35.382450 TX Bit6 (977~995) 19 986, Bit14 (974~992) 19 983,
1165 00:44:35.382508 TX Bit7 (978~998) 21 988, Bit15 (976~995) 20 985,
1166 00:44:35.382566
1167 00:44:35.382624 Write Rank0 MR14 =0xe
1168 00:44:35.382682
1169 00:44:35.382739 CH=0, VrefRange= 0, VrefLevel = 14
1170 00:44:35.382797 TX Bit0 (979~999) 21 989, Bit8 (969~989) 21 979,
1171 00:44:35.382854 TX Bit1 (978~998) 21 988, Bit9 (971~990) 20 980,
1172 00:44:35.382912 TX Bit2 (978~999) 22 988, Bit10 (976~996) 21 986,
1173 00:44:35.382970 TX Bit3 (975~993) 19 984, Bit11 (970~988) 19 979,
1174 00:44:35.383029 TX Bit4 (978~997) 20 987, Bit12 (973~990) 18 981,
1175 00:44:35.383087 TX Bit5 (976~994) 19 985, Bit13 (973~989) 17 981,
1176 00:44:35.383146 TX Bit6 (977~996) 20 986, Bit14 (974~993) 20 983,
1177 00:44:35.383204 TX Bit7 (978~998) 21 988, Bit15 (976~996) 21 986,
1178 00:44:35.383263
1179 00:44:35.383321 Write Rank0 MR14 =0x10
1180 00:44:35.383379
1181 00:44:35.383437 CH=0, VrefRange= 0, VrefLevel = 16
1182 00:44:35.383495 TX Bit0 (979~999) 21 989, Bit8 (969~989) 21 979,
1183 00:44:35.383553 TX Bit1 (978~999) 22 988, Bit9 (971~990) 20 980,
1184 00:44:35.383612 TX Bit2 (979~999) 21 989, Bit10 (975~997) 23 986,
1185 00:44:35.383669 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1186 00:44:35.383727 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
1187 00:44:35.383785 TX Bit5 (976~995) 20 985, Bit13 (973~990) 18 981,
1188 00:44:35.383843 TX Bit6 (977~997) 21 987, Bit14 (973~993) 21 983,
1189 00:44:35.383901 TX Bit7 (978~999) 22 988, Bit15 (975~996) 22 985,
1190 00:44:35.383959
1191 00:44:35.384017 Write Rank0 MR14 =0x12
1192 00:44:35.384075
1193 00:44:35.384132 CH=0, VrefRange= 0, VrefLevel = 18
1194 00:44:35.384190 TX Bit0 (979~1000) 22 989, Bit8 (969~990) 22 979,
1195 00:44:35.384248 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1196 00:44:35.384307 TX Bit2 (978~1000) 23 989, Bit10 (975~997) 23 986,
1197 00:44:35.384365 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1198 00:44:35.384423 TX Bit4 (978~999) 22 988, Bit12 (972~991) 20 981,
1199 00:44:35.384481 TX Bit5 (976~996) 21 986, Bit13 (972~990) 19 981,
1200 00:44:35.384540 TX Bit6 (976~998) 23 987, Bit14 (973~994) 22 983,
1201 00:44:35.384598 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1202 00:44:35.384656
1203 00:44:35.384713 Write Rank0 MR14 =0x14
1204 00:44:35.384771
1205 00:44:35.384828 CH=0, VrefRange= 0, VrefLevel = 20
1206 00:44:35.384886 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
1207 00:44:35.384944 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1208 00:44:35.385198 TX Bit2 (978~1000) 23 989, Bit10 (975~997) 23 986,
1209 00:44:35.385265 TX Bit3 (974~994) 21 984, Bit11 (969~990) 22 979,
1210 00:44:35.385324 TX Bit4 (977~999) 23 988, Bit12 (972~991) 20 981,
1211 00:44:35.385384 TX Bit5 (976~996) 21 986, Bit13 (972~991) 20 981,
1212 00:44:35.385452 TX Bit6 (976~999) 24 987, Bit14 (973~995) 23 984,
1213 00:44:35.385513 TX Bit7 (977~1000) 24 988, Bit15 (975~997) 23 986,
1214 00:44:35.385572
1215 00:44:35.385630 Write Rank0 MR14 =0x16
1216 00:44:35.385688
1217 00:44:35.385745 CH=0, VrefRange= 0, VrefLevel = 22
1218 00:44:35.385808 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
1219 00:44:35.385869 TX Bit1 (978~999) 22 988, Bit9 (969~991) 23 980,
1220 00:44:35.385928 TX Bit2 (978~1000) 23 989, Bit10 (975~997) 23 986,
1221 00:44:35.385987 TX Bit3 (974~994) 21 984, Bit11 (969~990) 22 979,
1222 00:44:35.386046 TX Bit4 (977~999) 23 988, Bit12 (971~992) 22 981,
1223 00:44:35.386104 TX Bit5 (975~997) 23 986, Bit13 (971~991) 21 981,
1224 00:44:35.386162 TX Bit6 (976~999) 24 987, Bit14 (972~995) 24 983,
1225 00:44:35.386221 TX Bit7 (977~1000) 24 988, Bit15 (975~997) 23 986,
1226 00:44:35.386279
1227 00:44:35.386337 Write Rank0 MR14 =0x18
1228 00:44:35.386395
1229 00:44:35.386452 CH=0, VrefRange= 0, VrefLevel = 24
1230 00:44:35.386510 TX Bit0 (979~1000) 22 989, Bit8 (968~991) 24 979,
1231 00:44:35.386569 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1232 00:44:35.386627 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1233 00:44:35.386686 TX Bit3 (973~995) 23 984, Bit11 (969~990) 22 979,
1234 00:44:35.386744 TX Bit4 (977~999) 23 988, Bit12 (971~993) 23 982,
1235 00:44:35.386802 TX Bit5 (975~998) 24 986, Bit13 (971~991) 21 981,
1236 00:44:35.386860 TX Bit6 (976~999) 24 987, Bit14 (972~996) 25 984,
1237 00:44:35.386919 TX Bit7 (977~1000) 24 988, Bit15 (974~997) 24 985,
1238 00:44:35.386977
1239 00:44:35.387034 Write Rank0 MR14 =0x1a
1240 00:44:35.387092
1241 00:44:35.387149 CH=0, VrefRange= 0, VrefLevel = 26
1242 00:44:35.387208 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1243 00:44:35.387266 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1244 00:44:35.387324 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1245 00:44:35.387383 TX Bit3 (973~995) 23 984, Bit11 (968~991) 24 979,
1246 00:44:35.387441 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1247 00:44:35.387500 TX Bit5 (975~998) 24 986, Bit13 (970~992) 23 981,
1248 00:44:35.387558 TX Bit6 (975~999) 25 987, Bit14 (971~996) 26 983,
1249 00:44:35.387616 TX Bit7 (977~1000) 24 988, Bit15 (974~998) 25 986,
1250 00:44:35.387675
1251 00:44:35.387732 Write Rank0 MR14 =0x1c
1252 00:44:35.387795
1253 00:44:35.387866 CH=0, VrefRange= 0, VrefLevel = 28
1254 00:44:35.387925 TX Bit0 (978~1001) 24 989, Bit8 (968~990) 23 979,
1255 00:44:35.387984 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1256 00:44:35.388042 TX Bit2 (977~1001) 25 989, Bit10 (974~998) 25 986,
1257 00:44:35.388101 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1258 00:44:35.388159 TX Bit4 (976~1000) 25 988, Bit12 (970~993) 24 981,
1259 00:44:35.388217 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1260 00:44:35.388275 TX Bit6 (975~999) 25 987, Bit14 (970~996) 27 983,
1261 00:44:35.388334 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1262 00:44:35.388392
1263 00:44:35.388449 Write Rank0 MR14 =0x1e
1264 00:44:35.388506
1265 00:44:35.388564 CH=0, VrefRange= 0, VrefLevel = 30
1266 00:44:35.388622 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1267 00:44:35.388680 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1268 00:44:35.388738 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1269 00:44:35.388796 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1270 00:44:35.388855 TX Bit4 (976~1000) 25 988, Bit12 (970~993) 24 981,
1271 00:44:35.388913 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1272 00:44:35.388971 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1273 00:44:35.389029 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1274 00:44:35.389087
1275 00:44:35.389144 Write Rank0 MR14 =0x20
1276 00:44:35.389201
1277 00:44:35.389258 CH=0, VrefRange= 0, VrefLevel = 32
1278 00:44:35.389316 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1279 00:44:35.389374 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1280 00:44:35.389439 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1281 00:44:35.389501 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1282 00:44:35.389560 TX Bit4 (976~1000) 25 988, Bit12 (970~993) 24 981,
1283 00:44:35.389619 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1284 00:44:35.389677 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1285 00:44:35.389736 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1286 00:44:35.389798
1287 00:44:35.389858 Write Rank0 MR14 =0x22
1288 00:44:35.389916
1289 00:44:35.389974 CH=0, VrefRange= 0, VrefLevel = 34
1290 00:44:35.390032 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1291 00:44:35.390091 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1292 00:44:35.390150 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1293 00:44:35.390208 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1294 00:44:35.390266 TX Bit4 (976~1000) 25 988, Bit12 (970~993) 24 981,
1295 00:44:35.390324 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1296 00:44:35.390382 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1297 00:44:35.390440 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1298 00:44:35.390497
1299 00:44:35.390555 Write Rank0 MR14 =0x24
1300 00:44:35.390612
1301 00:44:35.390670 CH=0, VrefRange= 0, VrefLevel = 36
1302 00:44:35.390727 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1303 00:44:35.390784 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
1304 00:44:35.390842 TX Bit2 (978~1001) 24 989, Bit10 (974~998) 25 986,
1305 00:44:35.390900 TX Bit3 (972~995) 24 983, Bit11 (968~991) 24 979,
1306 00:44:35.390957 TX Bit4 (976~1000) 25 988, Bit12 (970~993) 24 981,
1307 00:44:35.391210 TX Bit5 (974~998) 25 986, Bit13 (970~993) 24 981,
1308 00:44:35.391275 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
1309 00:44:35.391335 TX Bit7 (977~1001) 25 989, Bit15 (973~998) 26 985,
1310 00:44:35.391394
1311 00:44:35.391451
1312 00:44:35.391508 TX Vref found, early break! 372< 374
1313 00:44:35.391566 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1314 00:44:35.391625 u1DelayCellOfst[0]=7 cells (6 PI)
1315 00:44:35.391682 u1DelayCellOfst[1]=7 cells (6 PI)
1316 00:44:35.391740 u1DelayCellOfst[2]=7 cells (6 PI)
1317 00:44:35.391797 u1DelayCellOfst[3]=0 cells (0 PI)
1318 00:44:35.391855 u1DelayCellOfst[4]=6 cells (5 PI)
1319 00:44:35.391912 u1DelayCellOfst[5]=3 cells (3 PI)
1320 00:44:35.391969 u1DelayCellOfst[6]=5 cells (4 PI)
1321 00:44:35.392026 u1DelayCellOfst[7]=7 cells (6 PI)
1322 00:44:35.392084 Byte0, DQ PI dly=983, DQM PI dly= 986
1323 00:44:35.392142 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1324 00:44:35.392200
1325 00:44:35.392257 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1326 00:44:35.392315
1327 00:44:35.392372 u1DelayCellOfst[8]=0 cells (0 PI)
1328 00:44:35.392430 u1DelayCellOfst[9]=2 cells (2 PI)
1329 00:44:35.392487 u1DelayCellOfst[10]=10 cells (8 PI)
1330 00:44:35.392545 u1DelayCellOfst[11]=1 cells (1 PI)
1331 00:44:35.392602 u1DelayCellOfst[12]=3 cells (3 PI)
1332 00:44:35.392661 u1DelayCellOfst[13]=3 cells (3 PI)
1333 00:44:35.392718 u1DelayCellOfst[14]=6 cells (5 PI)
1334 00:44:35.392776 u1DelayCellOfst[15]=9 cells (7 PI)
1335 00:44:35.392833 Byte1, DQ PI dly=978, DQM PI dly= 982
1336 00:44:35.392890 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1337 00:44:35.392948
1338 00:44:35.393005 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1339 00:44:35.393063
1340 00:44:35.393134 Write Rank0 MR14 =0x1e
1341 00:44:35.393192
1342 00:44:35.393250 Final TX Range 0 Vref 30
1343 00:44:35.393307
1344 00:44:35.393364 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1345 00:44:35.393421
1346 00:44:35.393490 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1347 00:44:35.393549 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1348 00:44:35.393607 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1349 00:44:35.393665 Write Rank0 MR3 =0xb0
1350 00:44:35.393722 DramC Write-DBI on
1351 00:44:35.393779 ==
1352 00:44:35.393837 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1353 00:44:35.393894 fsp= 1, odt_onoff= 1, Byte mode= 0
1354 00:44:35.393952 ==
1355 00:44:35.394009 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1356 00:44:35.394067
1357 00:44:35.394124 Begin, DQ Scan Range 702~766
1358 00:44:35.394182
1359 00:44:35.394238
1360 00:44:35.394295 TX Vref Scan disable
1361 00:44:35.394353 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1362 00:44:35.394412 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1363 00:44:35.394470 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1364 00:44:35.394529 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1365 00:44:35.394588 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1366 00:44:35.394646 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1367 00:44:35.394705 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1368 00:44:35.394763 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1369 00:44:35.394821 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1370 00:44:35.394880 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1371 00:44:35.394939 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1372 00:44:35.394998 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1373 00:44:35.395056 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1374 00:44:35.395115 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1375 00:44:35.395173 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1376 00:44:35.395232 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1377 00:44:35.395290 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1378 00:44:35.395348 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1379 00:44:35.395407 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1380 00:44:35.395465 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1381 00:44:35.395523 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1382 00:44:35.395581 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1383 00:44:35.395640 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1384 00:44:35.395698 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1385 00:44:35.395757 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1386 00:44:35.395841 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1387 00:44:35.395940 Byte0, DQ PI dly=732, DQM PI dly= 732
1388 00:44:35.396002 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1389 00:44:35.396061
1390 00:44:35.396118 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1391 00:44:35.396177
1392 00:44:35.396234 Byte1, DQ PI dly=725, DQM PI dly= 725
1393 00:44:35.396292 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1394 00:44:35.396350
1395 00:44:35.396407 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1396 00:44:35.396465
1397 00:44:35.396522 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1398 00:44:35.396580 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1399 00:44:35.396638 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1400 00:44:35.396696 Write Rank0 MR3 =0x30
1401 00:44:35.396753 DramC Write-DBI off
1402 00:44:35.396810
1403 00:44:35.396866 [DATLAT]
1404 00:44:35.396924 Freq=1600, CH0 RK0, use_rxtx_scan=0
1405 00:44:35.396981
1406 00:44:35.397038 DATLAT Default: 0xf
1407 00:44:35.397095 7, 0xFFFF, sum=0
1408 00:44:35.397153 8, 0xFFFF, sum=0
1409 00:44:35.397213 9, 0xFFFF, sum=0
1410 00:44:35.397272 10, 0xFFFF, sum=0
1411 00:44:35.397330 11, 0xFFFF, sum=0
1412 00:44:35.397388 12, 0xFFFF, sum=0
1413 00:44:35.397451 13, 0xFFFF, sum=0
1414 00:44:35.397510 14, 0x0, sum=1
1415 00:44:35.397568 15, 0x0, sum=2
1416 00:44:35.397626 16, 0x0, sum=3
1417 00:44:35.397684 17, 0x0, sum=4
1418 00:44:35.397742 pattern=2 first_step=14 total pass=5 best_step=16
1419 00:44:35.397799 ==
1420 00:44:35.397857 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1421 00:44:35.397915 fsp= 1, odt_onoff= 1, Byte mode= 0
1422 00:44:35.397972 ==
1423 00:44:35.398029 Start DQ dly to find pass range UseTestEngine =1
1424 00:44:35.398086 x-axis: bit #, y-axis: DQ dly (-127~63)
1425 00:44:35.398144 RX Vref Scan = 1
1426 00:44:35.398200
1427 00:44:35.398257 RX Vref found, early break!
1428 00:44:35.398313
1429 00:44:35.398370 Final RX Vref 11, apply to both rank0 and 1
1430 00:44:35.398429 ==
1431 00:44:35.398486 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1432 00:44:35.398544 fsp= 1, odt_onoff= 1, Byte mode= 0
1433 00:44:35.398601 ==
1434 00:44:35.398658 DQS Delay:
1435 00:44:35.398714 DQS0 = 0, DQS1 = 0
1436 00:44:35.398772 DQM Delay:
1437 00:44:35.399029 DQM0 = 19, DQM1 = 17
1438 00:44:35.399097 DQ Delay:
1439 00:44:35.399156 DQ0 =21, DQ1 =22, DQ2 =24, DQ3 =14
1440 00:44:35.399214 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1441 00:44:35.399272 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1442 00:44:35.399330 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1443 00:44:35.399387
1444 00:44:35.399443
1445 00:44:35.399501
1446 00:44:35.399557 [DramC_TX_OE_Calibration] TA2
1447 00:44:35.399615 Original DQ_B0 (3 6) =30, OEN = 27
1448 00:44:35.399673 Original DQ_B1 (3 6) =30, OEN = 27
1449 00:44:35.399731 23, 0x0, End_B0=23 End_B1=23
1450 00:44:35.399790 24, 0x0, End_B0=24 End_B1=24
1451 00:44:35.399849 25, 0x0, End_B0=25 End_B1=25
1452 00:44:35.399908 26, 0x0, End_B0=26 End_B1=26
1453 00:44:35.399967 27, 0x0, End_B0=27 End_B1=27
1454 00:44:35.400025 28, 0x0, End_B0=28 End_B1=28
1455 00:44:35.400083 29, 0x0, End_B0=29 End_B1=29
1456 00:44:35.400141 30, 0x0, End_B0=30 End_B1=30
1457 00:44:35.400199 31, 0xFFFF, End_B0=30 End_B1=30
1458 00:44:35.400258 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1459 00:44:35.400316 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1460 00:44:35.400373
1461 00:44:35.400430
1462 00:44:35.400487 Write Rank0 MR23 =0x3f
1463 00:44:35.400544 [DQSOSC]
1464 00:44:35.400601 [DQSOSCAuto] RK0, (LSB)MR18= 0xc3c3, (MSB)MR19= 0x202, tDQSOscB0 = 445 ps tDQSOscB1 = 445 ps
1465 00:44:35.400661 CH0_RK0: MR19=0x202, MR18=0xC3C3, DQSOSC=445, MR23=63, INC=12, DEC=18
1466 00:44:35.400718 Write Rank0 MR23 =0x3f
1467 00:44:35.400776 [DQSOSC]
1468 00:44:35.400833 [DQSOSCAuto] RK0, (LSB)MR18= 0xbfbf, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
1469 00:44:35.400891 CH0 RK0: MR19=202, MR18=BFBF
1470 00:44:35.400948 [RankSwap] Rank num 2, (Multi 1), Rank 1
1471 00:44:35.401006 Write Rank0 MR2 =0xad
1472 00:44:35.401063 [Write Leveling]
1473 00:44:35.401120 delay byte0 byte1 byte2 byte3
1474 00:44:35.401176
1475 00:44:35.401233 10 0 0
1476 00:44:35.401291 11 0 0
1477 00:44:35.401349 12 0 0
1478 00:44:35.401406 13 0 0
1479 00:44:35.401471 14 0 0
1480 00:44:35.401530 15 0 0
1481 00:44:35.401589 16 0 0
1482 00:44:35.401647 17 0 0
1483 00:44:35.401705 18 0 0
1484 00:44:35.401763 19 0 0
1485 00:44:35.401821 20 0 0
1486 00:44:35.401879 21 0 0
1487 00:44:35.401936 22 0 0
1488 00:44:35.401994 23 0 0
1489 00:44:35.402051 24 0 0
1490 00:44:35.402109 25 0 ff
1491 00:44:35.402167 26 0 ff
1492 00:44:35.402225 27 0 ff
1493 00:44:35.402282 28 ff ff
1494 00:44:35.402342 29 0 ff
1495 00:44:35.402400 30 ff ff
1496 00:44:35.402458 31 ff ff
1497 00:44:35.402516 32 ff ff
1498 00:44:35.402573 33 ff ff
1499 00:44:35.402632 34 ff ff
1500 00:44:35.402690 35 ff ff
1501 00:44:35.402748 36 ff ff
1502 00:44:35.402807 pass bytecount = 0xff (0xff: all bytes pass)
1503 00:44:35.402864
1504 00:44:35.402920 DQS0 dly: 30
1505 00:44:35.402977 DQS1 dly: 25
1506 00:44:35.403034 Write Rank0 MR2 =0x2d
1507 00:44:35.403091 [RankSwap] Rank num 2, (Multi 1), Rank 0
1508 00:44:35.403148 Write Rank1 MR1 =0xd6
1509 00:44:35.403204 [Gating]
1510 00:44:35.403261 ==
1511 00:44:35.403318 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1512 00:44:35.403377 fsp= 1, odt_onoff= 1, Byte mode= 0
1513 00:44:35.403434 ==
1514 00:44:35.403491 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1515 00:44:35.403550 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1516 00:44:35.403609 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1517 00:44:35.403668 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1518 00:44:35.403726 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
1519 00:44:35.403784 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1520 00:44:35.403843 [Byte 1] Lead/lag falling Transition (3, 1, 20)
1521 00:44:35.403901 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1522 00:44:35.403960 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1523 00:44:35.404018 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1524 00:44:35.404076 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1525 00:44:35.404134 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1526 00:44:35.404193 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1527 00:44:35.404252 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1528 00:44:35.404310 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1529 00:44:35.404368 [Byte 0] Lead/lag Transition tap number (7)
1530 00:44:35.404426 [Byte 1] Lead/lag Transition tap number (8)
1531 00:44:35.404483 3 2 20 |2c2c 2c2b |(11 0)(11 11) |(0 0)(0 0)| 0
1532 00:44:35.404542 3 2 24 |606 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1533 00:44:35.404601 3 2 28 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1534 00:44:35.404660 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1535 00:44:35.404718 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1536 00:44:35.404776 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1537 00:44:35.404835 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1538 00:44:35.404894 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1539 00:44:35.404952 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1540 00:44:35.405011 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1541 00:44:35.405069 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1542 00:44:35.405128 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1543 00:44:35.405186 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1544 00:44:35.405244 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1545 00:44:35.405302 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1546 00:44:35.405360 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1547 00:44:35.405417 3 4 20 |807 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1548 00:44:35.405481 3 4 24 |100f 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1549 00:44:35.405540 3 4 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1550 00:44:35.405598 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 00:44:35.405656 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 00:44:35.405714 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 00:44:35.405772 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 00:44:35.405830 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 00:44:35.405888 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 00:44:35.405947 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 00:44:35.406005 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 00:44:35.406261 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 00:44:35.406327 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 00:44:35.406388 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 00:44:35.406447 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 00:44:35.406506 [Byte 0] Lead/lag Transition tap number (1)
1563 00:44:35.406564 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1564 00:44:35.406622 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1565 00:44:35.406681 3 6 20 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1566 00:44:35.406739 [Byte 1] Lead/lag Transition tap number (3)
1567 00:44:35.406798 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1568 00:44:35.406857 [Byte 0]First pass (3, 6, 24)
1569 00:44:35.406914 3 6 28 |4646 d0c |(0 0)(11 11) |(0 0)(0 0)| 0
1570 00:44:35.406973 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1571 00:44:35.407032 [Byte 1]First pass (3, 7, 0)
1572 00:44:35.407089 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1573 00:44:35.407148 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 00:44:35.407206 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 00:44:35.407265 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 00:44:35.407323 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 00:44:35.407381 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 00:44:35.407439 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 00:44:35.407497 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 00:44:35.407555 All bytes gating window > 1UI, Early break!
1581 00:44:35.407612
1582 00:44:35.407669 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
1583 00:44:35.407727
1584 00:44:35.407784 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1585 00:44:35.407842
1586 00:44:35.407898
1587 00:44:35.407954
1588 00:44:35.408012 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1589 00:44:35.408069
1590 00:44:35.408126 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1591 00:44:35.408182
1592 00:44:35.408239
1593 00:44:35.408296 Write Rank1 MR1 =0x56
1594 00:44:35.408353
1595 00:44:35.408409 best RODT dly(2T, 0.5T) = (2, 3)
1596 00:44:35.408466
1597 00:44:35.408523 best RODT dly(2T, 0.5T) = (2, 3)
1598 00:44:35.408580 ==
1599 00:44:35.408638 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1600 00:44:35.408695 fsp= 1, odt_onoff= 1, Byte mode= 0
1601 00:44:35.408753 ==
1602 00:44:35.408810 Start DQ dly to find pass range UseTestEngine =0
1603 00:44:35.408868 x-axis: bit #, y-axis: DQ dly (-127~63)
1604 00:44:35.408925 RX Vref Scan = 0
1605 00:44:35.408982 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1606 00:44:35.409041 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1607 00:44:35.409101 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1608 00:44:35.409160 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1609 00:44:35.409218 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1610 00:44:35.409276 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1611 00:44:35.409334 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1612 00:44:35.409393 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1613 00:44:35.409457 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1614 00:44:35.409517 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1615 00:44:35.409575 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1616 00:44:35.409633 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1617 00:44:35.409691 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1618 00:44:35.409750 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:44:35.409808 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1620 00:44:35.409866 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1621 00:44:35.409924 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1622 00:44:35.409983 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1623 00:44:35.410041 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1624 00:44:35.410099 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1625 00:44:35.410156 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1626 00:44:35.410214 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1627 00:44:35.410272 -4, [0] xxxxxxxx oxxxxxxx [MSB]
1628 00:44:35.410330 -3, [0] xxxoxxxx oxxoxxxx [MSB]
1629 00:44:35.410388 -2, [0] xxxoxxxx ooxoooxx [MSB]
1630 00:44:35.410446 -1, [0] xxxoxoxx ooxoooxx [MSB]
1631 00:44:35.410504 0, [0] xxxoxoox ooxoooox [MSB]
1632 00:44:35.410563 1, [0] xxxoxoox ooxoooox [MSB]
1633 00:44:35.410621 2, [0] xxxooooo ooxoooox [MSB]
1634 00:44:35.410679 3, [0] xxxooooo ooxooooo [MSB]
1635 00:44:35.410738 4, [0] ooxooooo ooxooooo [MSB]
1636 00:44:35.410797 32, [0] oooxoooo oooooooo [MSB]
1637 00:44:35.410855 33, [0] oooxoooo xooooooo [MSB]
1638 00:44:35.410913 34, [0] oooxoooo xooooooo [MSB]
1639 00:44:35.410971 35, [0] oooxoooo xxoxoooo [MSB]
1640 00:44:35.411028 36, [0] oooxoxxo xxoxxxxo [MSB]
1641 00:44:35.411087 37, [0] oooxoxxx xxoxxxxo [MSB]
1642 00:44:35.411145 38, [0] oooxoxxx xxoxxxxx [MSB]
1643 00:44:35.411203 39, [0] ooxxxxxx xxoxxxxx [MSB]
1644 00:44:35.411261 40, [0] xoxxxxxx xxoxxxxx [MSB]
1645 00:44:35.411319 41, [0] xxxxxxxx xxoxxxxx [MSB]
1646 00:44:35.411378 42, [0] xxxxxxxx xxoxxxxx [MSB]
1647 00:44:35.411436 43, [0] xxxxxxxx xxxxxxxx [MSB]
1648 00:44:35.411494 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1649 00:44:35.411551 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1650 00:44:35.411608 iDelay=43, Bit 2, Center 21 (5 ~ 38) 34
1651 00:44:35.411665 iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35
1652 00:44:35.411722 iDelay=43, Bit 4, Center 20 (2 ~ 38) 37
1653 00:44:35.411780 iDelay=43, Bit 5, Center 17 (-1 ~ 35) 37
1654 00:44:35.411837 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1655 00:44:35.411895 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1656 00:44:35.411952 iDelay=43, Bit 8, Center 14 (-4 ~ 32) 37
1657 00:44:35.412009 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
1658 00:44:35.412066 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1659 00:44:35.412123 iDelay=43, Bit 11, Center 15 (-3 ~ 34) 38
1660 00:44:35.412180 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1661 00:44:35.412237 iDelay=43, Bit 13, Center 16 (-2 ~ 35) 38
1662 00:44:35.412295 iDelay=43, Bit 14, Center 17 (0 ~ 35) 36
1663 00:44:35.412352 iDelay=43, Bit 15, Center 20 (3 ~ 37) 35
1664 00:44:35.412409 ==
1665 00:44:35.412466 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1666 00:44:35.412523 fsp= 1, odt_onoff= 1, Byte mode= 0
1667 00:44:35.412580 ==
1668 00:44:35.412637 DQS Delay:
1669 00:44:35.412694 DQS0 = 0, DQS1 = 0
1670 00:44:35.412752 DQM Delay:
1671 00:44:35.412809 DQM0 = 18, DQM1 = 17
1672 00:44:35.412866 DQ Delay:
1673 00:44:35.412922 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =14
1674 00:44:35.412980 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =19
1675 00:44:35.413037 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
1676 00:44:35.413093 DQ12 =16, DQ13 =16, DQ14 =17, DQ15 =20
1677 00:44:35.413150
1678 00:44:35.413207
1679 00:44:35.413264 DramC Write-DBI off
1680 00:44:35.413321 ==
1681 00:44:35.413379 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1682 00:44:35.413635 fsp= 1, odt_onoff= 1, Byte mode= 0
1683 00:44:35.413700 ==
1684 00:44:35.413759 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1685 00:44:35.413817
1686 00:44:35.413875 Begin, DQ Scan Range 921~1177
1687 00:44:35.413933
1688 00:44:35.413990
1689 00:44:35.414046 TX Vref Scan disable
1690 00:44:35.414103 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1691 00:44:35.414162 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1692 00:44:35.414221 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1693 00:44:35.414279 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1694 00:44:35.414338 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1695 00:44:35.414396 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1696 00:44:35.414455 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1697 00:44:35.414513 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1698 00:44:35.414572 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1699 00:44:35.414630 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1700 00:44:35.414688 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1701 00:44:35.414747 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1702 00:44:35.414805 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1703 00:44:35.414863 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1704 00:44:35.414921 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1705 00:44:35.414980 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1706 00:44:35.415038 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1707 00:44:35.415096 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1708 00:44:35.415155 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1709 00:44:35.415213 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:44:35.415271 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1711 00:44:35.415330 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1712 00:44:35.415389 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1713 00:44:35.415447 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1714 00:44:35.415519 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1715 00:44:35.415581 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1716 00:44:35.415639 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:44:35.415697 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:44:35.415755 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:44:35.415814 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:44:35.415872 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:44:35.415931 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:44:35.415990 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:44:35.416048 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:44:35.416108 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:44:35.416167 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1726 00:44:35.416265 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1727 00:44:35.416371 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1728 00:44:35.416480 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:44:35.416545 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1730 00:44:35.416606 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1731 00:44:35.416665 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1732 00:44:35.416725 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1733 00:44:35.416784 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1734 00:44:35.416842 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1735 00:44:35.416901 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1736 00:44:35.416960 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1737 00:44:35.417018 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1738 00:44:35.417077 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1739 00:44:35.417135 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1740 00:44:35.417194 971 |3 6 11|[0] xxxxxxxx oxxxxxxx [MSB]
1741 00:44:35.417252 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1742 00:44:35.417310 973 |3 6 13|[0] xxxxxxxx ooxoooxx [MSB]
1743 00:44:35.417369 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1744 00:44:35.417427 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1745 00:44:35.417497 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1746 00:44:35.417556 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1747 00:44:35.417616 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1748 00:44:35.417674 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1749 00:44:35.417733 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1750 00:44:35.417791 991 |3 6 31|[0] oooooooo xooxoooo [MSB]
1751 00:44:35.417850 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1752 00:44:35.417908 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1753 00:44:35.417966 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1754 00:44:35.418025 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1755 00:44:35.418083 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1756 00:44:35.418141 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1757 00:44:35.418198 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1758 00:44:35.418257 999 |3 6 39|[0] oooxoxxo xxxxxxxx [MSB]
1759 00:44:35.418315 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1760 00:44:35.418374 Byte0, DQ PI dly=987, DQM PI dly= 987
1761 00:44:35.418432 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1762 00:44:35.418491
1763 00:44:35.418548 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1764 00:44:35.418607
1765 00:44:35.418663 Byte1, DQ PI dly=981, DQM PI dly= 981
1766 00:44:35.418720 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1767 00:44:35.418778
1768 00:44:35.418836 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1769 00:44:35.418893
1770 00:44:35.418949 ==
1771 00:44:35.419007 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1772 00:44:35.419065 fsp= 1, odt_onoff= 1, Byte mode= 0
1773 00:44:35.419122 ==
1774 00:44:35.419180 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1775 00:44:35.419237
1776 00:44:35.419294 Begin, DQ Scan Range 957~1021
1777 00:44:35.419351 Write Rank1 MR14 =0x0
1778 00:44:35.419408
1779 00:44:35.419465 CH=0, VrefRange= 0, VrefLevel = 0
1780 00:44:35.419522 TX Bit0 (984~994) 11 989, Bit8 (974~985) 12 979,
1781 00:44:35.419580 TX Bit1 (982~995) 14 988, Bit9 (975~985) 11 980,
1782 00:44:35.419638 TX Bit2 (984~993) 10 988, Bit10 (979~991) 13 985,
1783 00:44:35.419695 TX Bit3 (977~991) 15 984, Bit11 (975~983) 9 979,
1784 00:44:35.419753 TX Bit4 (982~994) 13 988, Bit12 (976~985) 10 980,
1785 00:44:35.419810 TX Bit5 (979~990) 12 984, Bit13 (975~988) 14 981,
1786 00:44:35.419869 TX Bit6 (979~992) 14 985, Bit14 (975~990) 16 982,
1787 00:44:35.419926 TX Bit7 (982~994) 13 988, Bit15 (978~992) 15 985,
1788 00:44:35.419983
1789 00:44:35.420040 wait MRW command Rank1 MR14 =0x2 fired (1)
1790 00:44:35.420098 Write Rank1 MR14 =0x2
1791 00:44:35.420155
1792 00:44:35.420211 CH=0, VrefRange= 0, VrefLevel = 2
1793 00:44:35.420468 TX Bit0 (983~995) 13 989, Bit8 (973~986) 14 979,
1794 00:44:35.420539 TX Bit1 (981~996) 16 988, Bit9 (975~986) 12 980,
1795 00:44:35.420599 TX Bit2 (983~994) 12 988, Bit10 (978~992) 15 985,
1796 00:44:35.420657 TX Bit3 (977~991) 15 984, Bit11 (975~984) 10 979,
1797 00:44:35.420715 TX Bit4 (981~995) 15 988, Bit12 (975~986) 12 980,
1798 00:44:35.420774 TX Bit5 (979~991) 13 985, Bit13 (975~988) 14 981,
1799 00:44:35.420833 TX Bit6 (979~993) 15 986, Bit14 (975~991) 17 983,
1800 00:44:35.420892 TX Bit7 (981~995) 15 988, Bit15 (978~992) 15 985,
1801 00:44:35.420949
1802 00:44:35.421007 Write Rank1 MR14 =0x4
1803 00:44:35.421064
1804 00:44:35.421121 CH=0, VrefRange= 0, VrefLevel = 4
1805 00:44:35.421180 TX Bit0 (983~996) 14 989, Bit8 (972~986) 15 979,
1806 00:44:35.421238 TX Bit1 (981~997) 17 989, Bit9 (975~988) 14 981,
1807 00:44:35.421296 TX Bit2 (983~995) 13 989, Bit10 (978~993) 16 985,
1808 00:44:35.421353 TX Bit3 (976~992) 17 984, Bit11 (974~985) 12 979,
1809 00:44:35.421411 TX Bit4 (981~996) 16 988, Bit12 (975~988) 14 981,
1810 00:44:35.421480 TX Bit5 (979~992) 14 985, Bit13 (975~989) 15 982,
1811 00:44:35.421539 TX Bit6 (979~994) 16 986, Bit14 (975~991) 17 983,
1812 00:44:35.421597 TX Bit7 (981~996) 16 988, Bit15 (977~993) 17 985,
1813 00:44:35.421654
1814 00:44:35.421711 Write Rank1 MR14 =0x6
1815 00:44:35.421768
1816 00:44:35.421825 CH=0, VrefRange= 0, VrefLevel = 6
1817 00:44:35.421883 TX Bit0 (983~997) 15 990, Bit8 (972~988) 17 980,
1818 00:44:35.421941 TX Bit1 (981~998) 18 989, Bit9 (974~988) 15 981,
1819 00:44:35.421998 TX Bit2 (982~996) 15 989, Bit10 (978~994) 17 986,
1820 00:44:35.422056 TX Bit3 (976~992) 17 984, Bit11 (974~986) 13 980,
1821 00:44:35.422114 TX Bit4 (980~996) 17 988, Bit12 (975~988) 14 981,
1822 00:44:35.422172 TX Bit5 (978~992) 15 985, Bit13 (975~989) 15 982,
1823 00:44:35.422230 TX Bit6 (978~994) 17 986, Bit14 (974~992) 19 983,
1824 00:44:35.422288 TX Bit7 (981~997) 17 989, Bit15 (977~994) 18 985,
1825 00:44:35.422345
1826 00:44:35.422402 Write Rank1 MR14 =0x8
1827 00:44:35.422459
1828 00:44:35.422516 CH=0, VrefRange= 0, VrefLevel = 8
1829 00:44:35.422573 TX Bit0 (982~998) 17 990, Bit8 (972~988) 17 980,
1830 00:44:35.422631 TX Bit1 (980~998) 19 989, Bit9 (974~989) 16 981,
1831 00:44:35.422689 TX Bit2 (982~997) 16 989, Bit10 (977~994) 18 985,
1832 00:44:35.422747 TX Bit3 (976~992) 17 984, Bit11 (974~987) 14 980,
1833 00:44:35.422804 TX Bit4 (979~998) 20 988, Bit12 (975~989) 15 982,
1834 00:44:35.422861 TX Bit5 (978~993) 16 985, Bit13 (974~990) 17 982,
1835 00:44:35.422920 TX Bit6 (978~995) 18 986, Bit14 (975~992) 18 983,
1836 00:44:35.422977 TX Bit7 (980~998) 19 989, Bit15 (977~994) 18 985,
1837 00:44:35.423034
1838 00:44:35.423091 Write Rank1 MR14 =0xa
1839 00:44:35.423148
1840 00:44:35.423205 CH=0, VrefRange= 0, VrefLevel = 10
1841 00:44:35.423263 TX Bit0 (982~999) 18 990, Bit8 (971~989) 19 980,
1842 00:44:35.423320 TX Bit1 (979~999) 21 989, Bit9 (974~989) 16 981,
1843 00:44:35.423377 TX Bit2 (982~998) 17 990, Bit10 (977~995) 19 986,
1844 00:44:35.423435 TX Bit3 (976~992) 17 984, Bit11 (973~988) 16 980,
1845 00:44:35.423492 TX Bit4 (979~998) 20 988, Bit12 (975~989) 15 982,
1846 00:44:35.423550 TX Bit5 (978~993) 16 985, Bit13 (974~990) 17 982,
1847 00:44:35.423607 TX Bit6 (978~996) 19 987, Bit14 (974~993) 20 983,
1848 00:44:35.423665 TX Bit7 (980~999) 20 989, Bit15 (977~996) 20 986,
1849 00:44:35.423722
1850 00:44:35.423779 Write Rank1 MR14 =0xc
1851 00:44:35.423836
1852 00:44:35.423893 CH=0, VrefRange= 0, VrefLevel = 12
1853 00:44:35.423950 TX Bit0 (981~999) 19 990, Bit8 (971~989) 19 980,
1854 00:44:35.424008 TX Bit1 (979~999) 21 989, Bit9 (974~990) 17 982,
1855 00:44:35.424066 TX Bit2 (981~999) 19 990, Bit10 (977~996) 20 986,
1856 00:44:35.424123 TX Bit3 (976~993) 18 984, Bit11 (973~988) 16 980,
1857 00:44:35.424187 TX Bit4 (979~999) 21 989, Bit12 (974~990) 17 982,
1858 00:44:35.424248 TX Bit5 (978~994) 17 986, Bit13 (974~991) 18 982,
1859 00:44:35.424306 TX Bit6 (978~997) 20 987, Bit14 (974~994) 21 984,
1860 00:44:35.424364 TX Bit7 (979~999) 21 989, Bit15 (977~996) 20 986,
1861 00:44:35.424422
1862 00:44:35.424479 Write Rank1 MR14 =0xe
1863 00:44:35.424536
1864 00:44:35.424592 CH=0, VrefRange= 0, VrefLevel = 14
1865 00:44:35.424650 TX Bit0 (981~1000) 20 990, Bit8 (970~989) 20 979,
1866 00:44:35.424708 TX Bit1 (979~1000) 22 989, Bit9 (973~990) 18 981,
1867 00:44:35.424766 TX Bit2 (981~999) 19 990, Bit10 (976~996) 21 986,
1868 00:44:35.424824 TX Bit3 (975~994) 20 984, Bit11 (973~989) 17 981,
1869 00:44:35.424881 TX Bit4 (979~999) 21 989, Bit12 (974~990) 17 982,
1870 00:44:35.424939 TX Bit5 (977~995) 19 986, Bit13 (974~991) 18 982,
1871 00:44:35.424998 TX Bit6 (978~998) 21 988, Bit14 (974~994) 21 984,
1872 00:44:35.425055 TX Bit7 (979~999) 21 989, Bit15 (976~997) 22 986,
1873 00:44:35.425112
1874 00:44:35.425168 Write Rank1 MR14 =0x10
1875 00:44:35.425225
1876 00:44:35.425282 CH=0, VrefRange= 0, VrefLevel = 16
1877 00:44:35.425339 TX Bit0 (980~1000) 21 990, Bit8 (970~990) 21 980,
1878 00:44:35.425397 TX Bit1 (979~1000) 22 989, Bit9 (973~991) 19 982,
1879 00:44:35.425466 TX Bit2 (981~999) 19 990, Bit10 (976~997) 22 986,
1880 00:44:35.425525 TX Bit3 (975~994) 20 984, Bit11 (972~989) 18 980,
1881 00:44:35.425583 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
1882 00:44:35.425641 TX Bit5 (977~996) 20 986, Bit13 (974~992) 19 983,
1883 00:44:35.425698 TX Bit6 (978~998) 21 988, Bit14 (974~995) 22 984,
1884 00:44:35.425755 TX Bit7 (979~1000) 22 989, Bit15 (976~997) 22 986,
1885 00:44:35.425812
1886 00:44:35.425869 Write Rank1 MR14 =0x12
1887 00:44:35.425945
1888 00:44:35.426004 CH=0, VrefRange= 0, VrefLevel = 18
1889 00:44:35.426062 TX Bit0 (980~1001) 22 990, Bit8 (969~990) 22 979,
1890 00:44:35.426120 TX Bit1 (979~1000) 22 989, Bit9 (973~991) 19 982,
1891 00:44:35.426178 TX Bit2 (980~1000) 21 990, Bit10 (976~997) 22 986,
1892 00:44:35.426236 TX Bit3 (975~995) 21 985, Bit11 (972~990) 19 981,
1893 00:44:35.426499 TX Bit4 (978~1000) 23 989, Bit12 (973~991) 19 982,
1894 00:44:35.426566 TX Bit5 (977~997) 21 987, Bit13 (973~992) 20 982,
1895 00:44:35.426625 TX Bit6 (977~999) 23 988, Bit14 (974~996) 23 985,
1896 00:44:35.426683 TX Bit7 (979~1000) 22 989, Bit15 (976~997) 22 986,
1897 00:44:35.426741
1898 00:44:35.426798 Write Rank1 MR14 =0x14
1899 00:44:35.426855
1900 00:44:35.426913 CH=0, VrefRange= 0, VrefLevel = 20
1901 00:44:35.426970 TX Bit0 (980~1001) 22 990, Bit8 (969~991) 23 980,
1902 00:44:35.427029 TX Bit1 (979~1001) 23 990, Bit9 (972~991) 20 981,
1903 00:44:35.427086 TX Bit2 (980~1000) 21 990, Bit10 (976~997) 22 986,
1904 00:44:35.427144 TX Bit3 (974~995) 22 984, Bit11 (971~990) 20 980,
1905 00:44:35.427202 TX Bit4 (979~1000) 22 989, Bit12 (973~992) 20 982,
1906 00:44:35.427259 TX Bit5 (977~997) 21 987, Bit13 (973~993) 21 983,
1907 00:44:35.576067 TX Bit6 (978~999) 22 988, Bit14 (973~996) 24 984,
1908 00:44:35.576207 TX Bit7 (979~1000) 22 989, Bit15 (976~997) 22 986,
1909 00:44:35.576280
1910 00:44:35.576346 Write Rank1 MR14 =0x16
1911 00:44:35.576409
1912 00:44:35.576470 CH=0, VrefRange= 0, VrefLevel = 22
1913 00:44:35.576530 TX Bit0 (980~1001) 22 990, Bit8 (969~991) 23 980,
1914 00:44:35.576590 TX Bit1 (978~1001) 24 989, Bit9 (972~993) 22 982,
1915 00:44:35.576649 TX Bit2 (979~1001) 23 990, Bit10 (976~998) 23 987,
1916 00:44:35.576708 TX Bit3 (974~996) 23 985, Bit11 (971~991) 21 981,
1917 00:44:35.576767 TX Bit4 (978~1000) 23 989, Bit12 (973~993) 21 983,
1918 00:44:35.576826 TX Bit5 (977~998) 22 987, Bit13 (972~994) 23 983,
1919 00:44:35.576885 TX Bit6 (977~1000) 24 988, Bit14 (972~996) 25 984,
1920 00:44:35.576944 TX Bit7 (978~1001) 24 989, Bit15 (976~998) 23 987,
1921 00:44:35.577003
1922 00:44:35.577061 Write Rank1 MR14 =0x18
1923 00:44:35.577119
1924 00:44:35.577177 CH=0, VrefRange= 0, VrefLevel = 24
1925 00:44:35.577235 TX Bit0 (979~1002) 24 990, Bit8 (969~992) 24 980,
1926 00:44:35.577293 TX Bit1 (978~1001) 24 989, Bit9 (972~993) 22 982,
1927 00:44:35.577351 TX Bit2 (979~1001) 23 990, Bit10 (975~998) 24 986,
1928 00:44:35.577414 TX Bit3 (974~997) 24 985, Bit11 (970~991) 22 980,
1929 00:44:35.577530 TX Bit4 (978~1000) 23 989, Bit12 (972~993) 22 982,
1930 00:44:35.577599 TX Bit5 (977~998) 22 987, Bit13 (972~994) 23 983,
1931 00:44:35.577659 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1932 00:44:35.577718 TX Bit7 (979~1001) 23 990, Bit15 (976~998) 23 987,
1933 00:44:35.577777
1934 00:44:35.577834 Write Rank1 MR14 =0x1a
1935 00:44:35.577892
1936 00:44:35.577949 CH=0, VrefRange= 0, VrefLevel = 26
1937 00:44:35.578007 TX Bit0 (979~1003) 25 991, Bit8 (969~992) 24 980,
1938 00:44:35.578066 TX Bit1 (978~1002) 25 990, Bit9 (971~993) 23 982,
1939 00:44:35.578123 TX Bit2 (979~1002) 24 990, Bit10 (975~998) 24 986,
1940 00:44:35.578181 TX Bit3 (973~997) 25 985, Bit11 (970~991) 22 980,
1941 00:44:35.578239 TX Bit4 (978~1001) 24 989, Bit12 (972~994) 23 983,
1942 00:44:35.578298 TX Bit5 (976~999) 24 987, Bit13 (971~995) 25 983,
1943 00:44:35.578355 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1944 00:44:35.578413 TX Bit7 (978~1002) 25 990, Bit15 (975~998) 24 986,
1945 00:44:35.578471
1946 00:44:35.578528 Write Rank1 MR14 =0x1c
1947 00:44:35.578586
1948 00:44:35.578643 CH=0, VrefRange= 0, VrefLevel = 28
1949 00:44:35.578700 TX Bit0 (979~1003) 25 991, Bit8 (969~992) 24 980,
1950 00:44:35.578759 TX Bit1 (978~1003) 26 990, Bit9 (971~994) 24 982,
1951 00:44:35.578816 TX Bit2 (979~1002) 24 990, Bit10 (975~999) 25 987,
1952 00:44:35.578873 TX Bit3 (973~998) 26 985, Bit11 (969~992) 24 980,
1953 00:44:35.578931 TX Bit4 (978~1001) 24 989, Bit12 (972~995) 24 983,
1954 00:44:35.578989 TX Bit5 (976~999) 24 987, Bit13 (971~995) 25 983,
1955 00:44:35.579047 TX Bit6 (977~1001) 25 989, Bit14 (972~997) 26 984,
1956 00:44:35.579104 TX Bit7 (978~1002) 25 990, Bit15 (975~998) 24 986,
1957 00:44:35.579161
1958 00:44:35.579218 Write Rank1 MR14 =0x1e
1959 00:44:35.579275
1960 00:44:35.579333 CH=0, VrefRange= 0, VrefLevel = 30
1961 00:44:35.579390 TX Bit0 (979~1004) 26 991, Bit8 (968~992) 25 980,
1962 00:44:35.579448 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
1963 00:44:35.579516 TX Bit2 (979~1003) 25 991, Bit10 (975~999) 25 987,
1964 00:44:35.579576 TX Bit3 (973~997) 25 985, Bit11 (969~992) 24 980,
1965 00:44:35.579634 TX Bit4 (978~1003) 26 990, Bit12 (971~995) 25 983,
1966 00:44:35.579693 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
1967 00:44:35.579750 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1968 00:44:35.579808 TX Bit7 (978~1003) 26 990, Bit15 (975~998) 24 986,
1969 00:44:35.579865
1970 00:44:35.579922 Write Rank1 MR14 =0x20
1971 00:44:35.579979
1972 00:44:35.580036 CH=0, VrefRange= 0, VrefLevel = 32
1973 00:44:35.580094 TX Bit0 (979~1004) 26 991, Bit8 (968~992) 25 980,
1974 00:44:35.580152 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
1975 00:44:35.580210 TX Bit2 (979~1003) 25 991, Bit10 (975~999) 25 987,
1976 00:44:35.580267 TX Bit3 (973~997) 25 985, Bit11 (969~992) 24 980,
1977 00:44:35.580325 TX Bit4 (978~1003) 26 990, Bit12 (971~995) 25 983,
1978 00:44:35.580382 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
1979 00:44:35.580440 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1980 00:44:35.580498 TX Bit7 (978~1003) 26 990, Bit15 (975~998) 24 986,
1981 00:44:35.580556
1982 00:44:35.580612 Write Rank1 MR14 =0x22
1983 00:44:35.580669
1984 00:44:35.580727 CH=0, VrefRange= 0, VrefLevel = 34
1985 00:44:35.580784 TX Bit0 (979~1004) 26 991, Bit8 (968~992) 25 980,
1986 00:44:35.580841 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
1987 00:44:35.580899 TX Bit2 (979~1003) 25 991, Bit10 (975~999) 25 987,
1988 00:44:35.580957 TX Bit3 (973~997) 25 985, Bit11 (969~992) 24 980,
1989 00:44:35.581014 TX Bit4 (978~1003) 26 990, Bit12 (971~995) 25 983,
1990 00:44:35.581072 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
1991 00:44:35.581129 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1992 00:44:35.581402 TX Bit7 (978~1003) 26 990, Bit15 (975~998) 24 986,
1993 00:44:35.581490
1994 00:44:35.581551 Write Rank1 MR14 =0x24
1995 00:44:35.581611
1996 00:44:35.581669 CH=0, VrefRange= 0, VrefLevel = 36
1997 00:44:35.581727 TX Bit0 (979~1004) 26 991, Bit8 (968~992) 25 980,
1998 00:44:35.581786 TX Bit1 (978~1002) 25 990, Bit9 (970~994) 25 982,
1999 00:44:35.581844 TX Bit2 (979~1003) 25 991, Bit10 (975~999) 25 987,
2000 00:44:35.581903 TX Bit3 (973~997) 25 985, Bit11 (969~992) 24 980,
2001 00:44:35.581962 TX Bit4 (978~1003) 26 990, Bit12 (971~995) 25 983,
2002 00:44:35.582020 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2003 00:44:35.582078 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
2004 00:44:35.582136 TX Bit7 (978~1003) 26 990, Bit15 (975~998) 24 986,
2005 00:44:35.582194
2006 00:44:35.582250
2007 00:44:35.582308 TX Vref found, early break! 372< 379
2008 00:44:35.582367 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2009 00:44:35.582425 u1DelayCellOfst[0]=7 cells (6 PI)
2010 00:44:35.582483 u1DelayCellOfst[1]=6 cells (5 PI)
2011 00:44:35.582540 u1DelayCellOfst[2]=7 cells (6 PI)
2012 00:44:35.582598 u1DelayCellOfst[3]=0 cells (0 PI)
2013 00:44:35.582655 u1DelayCellOfst[4]=6 cells (5 PI)
2014 00:44:35.582713 u1DelayCellOfst[5]=2 cells (2 PI)
2015 00:44:35.582770 u1DelayCellOfst[6]=3 cells (3 PI)
2016 00:44:35.582827 u1DelayCellOfst[7]=6 cells (5 PI)
2017 00:44:35.582885 Byte0, DQ PI dly=985, DQM PI dly= 988
2018 00:44:35.582943 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2019 00:44:35.583000
2020 00:44:35.583058 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2021 00:44:35.583117
2022 00:44:35.583175 u1DelayCellOfst[8]=0 cells (0 PI)
2023 00:44:35.583232 u1DelayCellOfst[9]=2 cells (2 PI)
2024 00:44:35.583290 u1DelayCellOfst[10]=9 cells (7 PI)
2025 00:44:35.583347 u1DelayCellOfst[11]=0 cells (0 PI)
2026 00:44:35.583405 u1DelayCellOfst[12]=3 cells (3 PI)
2027 00:44:35.583462 u1DelayCellOfst[13]=2 cells (2 PI)
2028 00:44:35.583520 u1DelayCellOfst[14]=5 cells (4 PI)
2029 00:44:35.583578 u1DelayCellOfst[15]=7 cells (6 PI)
2030 00:44:35.583636 Byte1, DQ PI dly=980, DQM PI dly= 983
2031 00:44:35.583693 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2032 00:44:35.583752
2033 00:44:35.583809 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2034 00:44:35.583867
2035 00:44:35.583924 Write Rank1 MR14 =0x1e
2036 00:44:35.583981
2037 00:44:35.584038 Final TX Range 0 Vref 30
2038 00:44:35.584096
2039 00:44:35.584154 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2040 00:44:35.584213
2041 00:44:35.584270 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2042 00:44:35.584330 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2043 00:44:35.584389 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2044 00:44:35.584448 Write Rank1 MR3 =0xb0
2045 00:44:35.584506 DramC Write-DBI on
2046 00:44:35.584564 ==
2047 00:44:35.584622 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2048 00:44:35.584681 fsp= 1, odt_onoff= 1, Byte mode= 0
2049 00:44:35.584739 ==
2050 00:44:35.584797 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2051 00:44:35.584856
2052 00:44:35.584913 Begin, DQ Scan Range 703~767
2053 00:44:35.584970
2054 00:44:35.585027
2055 00:44:35.585085 TX Vref Scan disable
2056 00:44:35.585142 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2057 00:44:35.585202 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2058 00:44:35.585261 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2059 00:44:35.585321 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2060 00:44:35.585380 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2061 00:44:35.585448 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2062 00:44:35.585509 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2063 00:44:35.585568 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2064 00:44:35.585627 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2065 00:44:35.585687 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2066 00:44:35.585746 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2067 00:44:35.585805 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2068 00:44:35.585864 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2069 00:44:35.585923 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2070 00:44:35.585983 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2071 00:44:35.586041 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2072 00:44:35.586101 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2073 00:44:35.586160 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2074 00:44:35.586218 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2075 00:44:35.586277 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2076 00:44:35.586336 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2077 00:44:35.586395 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2078 00:44:35.586454 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2079 00:44:35.586513 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2080 00:44:35.586573 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2081 00:44:35.586631 748 |2 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
2082 00:44:35.586690 Byte0, DQ PI dly=734, DQM PI dly= 734
2083 00:44:35.586748 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
2084 00:44:35.586806
2085 00:44:35.586864 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
2086 00:44:35.586922
2087 00:44:35.586980 Byte1, DQ PI dly=726, DQM PI dly= 726
2088 00:44:35.587038 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2089 00:44:35.587097
2090 00:44:35.587154 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2091 00:44:35.587213
2092 00:44:35.587271 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2093 00:44:35.587329 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2094 00:44:35.587388 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2095 00:44:35.587446 Write Rank1 MR3 =0x30
2096 00:44:35.587504 DramC Write-DBI off
2097 00:44:35.587561
2098 00:44:35.587618 [DATLAT]
2099 00:44:35.587676 Freq=1600, CH0 RK1, use_rxtx_scan=0
2100 00:44:35.587735
2101 00:44:35.587792 DATLAT Default: 0x10
2102 00:44:35.587850 7, 0xFFFF, sum=0
2103 00:44:35.587909 8, 0xFFFF, sum=0
2104 00:44:35.587968 9, 0xFFFF, sum=0
2105 00:44:35.588027 10, 0xFFFF, sum=0
2106 00:44:35.588087 11, 0xFFFF, sum=0
2107 00:44:35.588146 12, 0xFFFF, sum=0
2108 00:44:35.588204 13, 0xFFFF, sum=0
2109 00:44:35.588262 14, 0x0, sum=1
2110 00:44:35.588321 15, 0x0, sum=2
2111 00:44:35.588379 16, 0x0, sum=3
2112 00:44:35.588438 17, 0x0, sum=4
2113 00:44:35.588496 pattern=2 first_step=14 total pass=5 best_step=16
2114 00:44:35.588553 ==
2115 00:44:35.588806 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2116 00:44:35.588875 fsp= 1, odt_onoff= 1, Byte mode= 0
2117 00:44:35.588936 ==
2118 00:44:35.588996 Start DQ dly to find pass range UseTestEngine =1
2119 00:44:35.589055 x-axis: bit #, y-axis: DQ dly (-127~63)
2120 00:44:35.589114 RX Vref Scan = 0
2121 00:44:35.589172 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2122 00:44:35.589233 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2123 00:44:35.589292 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2124 00:44:35.589352 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2125 00:44:35.589411 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2126 00:44:35.589481 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2127 00:44:35.589541 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2128 00:44:35.589601 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2129 00:44:35.589660 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2130 00:44:35.589719 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2131 00:44:35.589778 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2132 00:44:35.589838 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2133 00:44:35.589897 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2134 00:44:35.589956 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2135 00:44:35.590016 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2136 00:44:35.590075 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2137 00:44:35.590134 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2138 00:44:35.590194 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2139 00:44:35.590253 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2140 00:44:35.590313 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2141 00:44:35.590372 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2142 00:44:35.590432 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2143 00:44:35.590491 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2144 00:44:35.590550 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2145 00:44:35.590609 -2, [0] xxxoxxxx ooxoxxxx [MSB]
2146 00:44:35.590669 -1, [0] xxxoxoxx ooxoooxx [MSB]
2147 00:44:35.590728 0, [0] xxxoxoxx ooxoooxx [MSB]
2148 00:44:35.590788 1, [0] xxxoxoox ooxoooox [MSB]
2149 00:44:35.590847 2, [0] xxxoxoox ooxoooox [MSB]
2150 00:44:35.590906 3, [0] oxxooooo ooxoooox [MSB]
2151 00:44:35.590965 4, [0] ooxooooo ooxoooox [MSB]
2152 00:44:35.591024 5, [0] oooooooo ooxooooo [MSB]
2153 00:44:35.591082 32, [0] oooxoooo oooooooo [MSB]
2154 00:44:35.591141 33, [0] oooxoooo xooxoooo [MSB]
2155 00:44:35.591200 34, [0] oooxoooo xooxoxoo [MSB]
2156 00:44:35.591259 35, [0] oooxoxoo xxoxxxoo [MSB]
2157 00:44:35.591318 36, [0] oooxoxxo xxoxxxxo [MSB]
2158 00:44:35.591376 37, [0] oooxoxxo xxoxxxxo [MSB]
2159 00:44:35.591434 38, [0] oooxoxxx xxoxxxxx [MSB]
2160 00:44:35.591493 39, [0] oxoxxxxx xxoxxxxx [MSB]
2161 00:44:35.591552 40, [0] xxoxxxxx xxoxxxxx [MSB]
2162 00:44:35.591612 41, [0] xxxxxxxx xxxxxxxx [MSB]
2163 00:44:35.591671 iDelay=41, Bit 0, Center 21 (3 ~ 39) 37
2164 00:44:35.591729 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2165 00:44:35.591787 iDelay=41, Bit 2, Center 22 (5 ~ 40) 36
2166 00:44:35.591845 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2167 00:44:35.591903 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
2168 00:44:35.591960 iDelay=41, Bit 5, Center 16 (-1 ~ 34) 36
2169 00:44:35.592018 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2170 00:44:35.592076 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
2171 00:44:35.592134 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2172 00:44:35.592192 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2173 00:44:35.592249 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
2174 00:44:35.592308 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2175 00:44:35.592366 iDelay=41, Bit 12, Center 16 (-1 ~ 34) 36
2176 00:44:35.592424 iDelay=41, Bit 13, Center 16 (-1 ~ 33) 35
2177 00:44:35.592495 iDelay=41, Bit 14, Center 18 (1 ~ 35) 35
2178 00:44:35.594843 iDelay=41, Bit 15, Center 21 (5 ~ 37) 33
2179 00:44:35.594913 ==
2180 00:44:35.597965 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2181 00:44:35.601655 fsp= 1, odt_onoff= 1, Byte mode= 0
2182 00:44:35.601745 ==
2183 00:44:35.604668 DQS Delay:
2184 00:44:35.604757 DQS0 = 0, DQS1 = 0
2185 00:44:35.607752 DQM Delay:
2186 00:44:35.607841 DQM0 = 19, DQM1 = 17
2187 00:44:35.607913 DQ Delay:
2188 00:44:35.611262 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2189 00:44:35.614354 DQ4 =20, DQ5 =16, DQ6 =18, DQ7 =20
2190 00:44:35.617736 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2191 00:44:35.620975 DQ12 =16, DQ13 =16, DQ14 =18, DQ15 =21
2192 00:44:35.621065
2193 00:44:35.624018
2194 00:44:35.624108
2195 00:44:35.624178 [DramC_TX_OE_Calibration] TA2
2196 00:44:35.627320 Original DQ_B0 (3 6) =30, OEN = 27
2197 00:44:35.630932 Original DQ_B1 (3 6) =30, OEN = 27
2198 00:44:35.634003 23, 0x0, End_B0=23 End_B1=23
2199 00:44:35.637308 24, 0x0, End_B0=24 End_B1=24
2200 00:44:35.640390 25, 0x0, End_B0=25 End_B1=25
2201 00:44:35.640481 26, 0x0, End_B0=26 End_B1=26
2202 00:44:35.644294 27, 0x0, End_B0=27 End_B1=27
2203 00:44:35.647494 28, 0x0, End_B0=28 End_B1=28
2204 00:44:35.650269 29, 0x0, End_B0=29 End_B1=29
2205 00:44:35.653455 30, 0x0, End_B0=30 End_B1=30
2206 00:44:35.653547 31, 0xFFFF, End_B0=30 End_B1=30
2207 00:44:35.660337 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2208 00:44:35.666766 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2209 00:44:35.666858
2210 00:44:35.666931
2211 00:44:35.670217 Write Rank1 MR23 =0x3f
2212 00:44:35.670312 [DQSOSC]
2213 00:44:35.676569 [DQSOSCAuto] RK1, (LSB)MR18= 0xa8a8, (MSB)MR19= 0x202, tDQSOscB0 = 463 ps tDQSOscB1 = 463 ps
2214 00:44:35.683056 CH0_RK1: MR19=0x202, MR18=0xA8A8, DQSOSC=463, MR23=63, INC=11, DEC=17
2215 00:44:35.686265 Write Rank1 MR23 =0x3f
2216 00:44:35.686372 [DQSOSC]
2217 00:44:35.696178 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4a4, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2218 00:44:35.696308 CH0 RK1: MR19=202, MR18=A4A4
2219 00:44:35.699550 [RxdqsGatingPostProcess] freq 1600
2220 00:44:35.706356 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2221 00:44:35.706472 Rank: 0
2222 00:44:35.709289 best DQS0 dly(2T, 0.5T) = (2, 6)
2223 00:44:35.712863 best DQS1 dly(2T, 0.5T) = (2, 6)
2224 00:44:35.715980 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2225 00:44:35.719189 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2226 00:44:35.719294 Rank: 1
2227 00:44:35.722393 best DQS0 dly(2T, 0.5T) = (2, 6)
2228 00:44:35.725715 best DQS1 dly(2T, 0.5T) = (2, 6)
2229 00:44:35.729007 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2230 00:44:35.732223 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2231 00:44:35.735388 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2232 00:44:35.738965 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2233 00:44:35.745298 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2234 00:44:35.748673 Write Rank0 MR13 =0x59
2235 00:44:35.748778 ==
2236 00:44:35.751902 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2237 00:44:35.755487 fsp= 1, odt_onoff= 1, Byte mode= 0
2238 00:44:35.755584 ==
2239 00:44:35.758481 === u2Vref_new: 0x56 --> 0x3a
2240 00:44:35.761444 === u2Vref_new: 0x58 --> 0x58
2241 00:44:35.764890 === u2Vref_new: 0x5a --> 0x5a
2242 00:44:35.768101 === u2Vref_new: 0x5c --> 0x78
2243 00:44:35.771565 === u2Vref_new: 0x5e --> 0x7a
2244 00:44:35.774960 === u2Vref_new: 0x60 --> 0x90
2245 00:44:35.777828 [CA 0] Center 38 (13~63) winsize 51
2246 00:44:35.781449 [CA 1] Center 37 (11~63) winsize 53
2247 00:44:35.784433 [CA 2] Center 34 (6~63) winsize 58
2248 00:44:35.787864 [CA 3] Center 34 (6~63) winsize 58
2249 00:44:35.791103 [CA 4] Center 34 (5~63) winsize 59
2250 00:44:35.794178 [CA 5] Center 28 (-1~58) winsize 60
2251 00:44:35.794270
2252 00:44:35.797787 [CATrainingPosCal] consider 1 rank data
2253 00:44:35.800871 u2DelayCellTimex100 = 744/100 ps
2254 00:44:35.804234 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2255 00:44:35.807192 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2256 00:44:35.810573 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2257 00:44:35.813842 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2258 00:44:35.817239 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2259 00:44:35.820361 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2260 00:44:35.820454
2261 00:44:35.826833 CA PerBit enable=1, Macro0, CA PI delay=28
2262 00:44:35.826940 === u2Vref_new: 0x5e --> 0x7a
2263 00:44:35.830133
2264 00:44:35.830224 Vref(ca) range 1: 30
2265 00:44:35.830296
2266 00:44:35.833697 CS Dly= 11 (42-0-32)
2267 00:44:35.833788 Write Rank0 MR13 =0xd8
2268 00:44:35.836812 Write Rank0 MR13 =0xd8
2269 00:44:35.840437 Write Rank0 MR12 =0x5e
2270 00:44:35.840528 Write Rank1 MR13 =0x59
2271 00:44:35.840599 ==
2272 00:44:35.846483 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2273 00:44:35.849799 fsp= 1, odt_onoff= 1, Byte mode= 0
2274 00:44:35.849890 ==
2275 00:44:35.853144 === u2Vref_new: 0x56 --> 0x3a
2276 00:44:35.856503 === u2Vref_new: 0x58 --> 0x58
2277 00:44:35.859856 === u2Vref_new: 0x5a --> 0x5a
2278 00:44:35.862885 === u2Vref_new: 0x5c --> 0x78
2279 00:44:35.866131 === u2Vref_new: 0x5e --> 0x7a
2280 00:44:35.866222 === u2Vref_new: 0x60 --> 0x90
2281 00:44:35.869767 [CA 0] Center 38 (13~63) winsize 51
2282 00:44:35.873141 [CA 1] Center 37 (11~63) winsize 53
2283 00:44:35.876328 [CA 2] Center 34 (5~63) winsize 59
2284 00:44:35.879532 [CA 3] Center 34 (6~63) winsize 58
2285 00:44:35.882865 [CA 4] Center 34 (5~63) winsize 59
2286 00:44:35.886519 [CA 5] Center 29 (0~58) winsize 59
2287 00:44:35.886611
2288 00:44:35.889541 [CATrainingPosCal] consider 2 rank data
2289 00:44:35.892731 u2DelayCellTimex100 = 744/100 ps
2290 00:44:35.895960 CA0 delay=38 (13~63),Diff = 9 PI (11 cell)
2291 00:44:35.902746 CA1 delay=37 (11~63),Diff = 8 PI (10 cell)
2292 00:44:35.905975 CA2 delay=34 (6~63),Diff = 5 PI (6 cell)
2293 00:44:35.909245 CA3 delay=34 (6~63),Diff = 5 PI (6 cell)
2294 00:44:35.912510 CA4 delay=34 (5~63),Diff = 5 PI (6 cell)
2295 00:44:35.915686 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2296 00:44:35.915806
2297 00:44:35.919305 CA PerBit enable=1, Macro0, CA PI delay=29
2298 00:44:35.922234 === u2Vref_new: 0x60 --> 0x90
2299 00:44:35.922325
2300 00:44:35.925385 Vref(ca) range 1: 32
2301 00:44:35.925494
2302 00:44:35.925567 CS Dly= 11 (42-0-32)
2303 00:44:35.929109 Write Rank1 MR13 =0xd8
2304 00:44:35.932267 Write Rank1 MR13 =0xd8
2305 00:44:35.932364 Write Rank1 MR12 =0x60
2306 00:44:35.935432 [RankSwap] Rank num 2, (Multi 1), Rank 0
2307 00:44:35.938624 Write Rank0 MR2 =0xad
2308 00:44:35.938717 [Write Leveling]
2309 00:44:35.942046 delay byte0 byte1 byte2 byte3
2310 00:44:35.942137
2311 00:44:35.945548 10 0 0
2312 00:44:35.945639 11 0 0
2313 00:44:35.948443 12 0 0
2314 00:44:35.948567 13 0 0
2315 00:44:35.948643 14 0 0
2316 00:44:35.951754 15 0 0
2317 00:44:35.951845 16 0 0
2318 00:44:35.955101 17 0 0
2319 00:44:35.955192 18 0 0
2320 00:44:35.958167 19 0 0
2321 00:44:35.958259 20 0 0
2322 00:44:35.958331 21 0 0
2323 00:44:35.961648 22 0 0
2324 00:44:35.961739 23 0 0
2325 00:44:35.964905 24 0 0
2326 00:44:35.964995 25 0 0
2327 00:44:35.968212 26 0 0
2328 00:44:35.968303 27 0 0
2329 00:44:35.968374 28 0 0
2330 00:44:35.971736 29 0 ff
2331 00:44:35.971827 30 0 ff
2332 00:44:35.974682 31 0 0
2333 00:44:35.974773 32 0 ff
2334 00:44:35.978066 33 0 ff
2335 00:44:35.978168 34 0 ff
2336 00:44:35.978285 35 0 ff
2337 00:44:35.981545 36 ff ff
2338 00:44:35.981636 37 ff ff
2339 00:44:35.984426 38 ff ff
2340 00:44:35.984515 39 ff ff
2341 00:44:35.987973 40 ff ff
2342 00:44:35.988065 41 ff ff
2343 00:44:35.991007 42 ff ff
2344 00:44:35.994231 pass bytecount = 0xff (0xff: all bytes pass)
2345 00:44:35.994321
2346 00:44:35.994392 DQS0 dly: 36
2347 00:44:35.997686 DQS1 dly: 32
2348 00:44:35.997775 Write Rank0 MR2 =0x2d
2349 00:44:36.004252 [RankSwap] Rank num 2, (Multi 1), Rank 0
2350 00:44:36.004343 Write Rank0 MR1 =0xd6
2351 00:44:36.004413 [Gating]
2352 00:44:36.004479 ==
2353 00:44:36.010701 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2354 00:44:36.014061 fsp= 1, odt_onoff= 1, Byte mode= 0
2355 00:44:36.014151 ==
2356 00:44:36.017311 3 1 0 |2c2b 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
2357 00:44:36.023790 3 1 4 |2c2b 3737 |(11 11)(11 11) |(1 1)(1 1)| 0
2358 00:44:36.027177 3 1 8 |2c2b b0a |(11 11)(11 11) |(1 1)(1 1)| 0
2359 00:44:36.030874 3 1 12 |2c2b 3434 |(11 11)(11 11) |(0 0)(0 0)| 0
2360 00:44:36.036986 3 1 16 |2c2b 1d1d |(11 11)(11 11) |(1 0)(1 1)| 0
2361 00:44:36.040384 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2362 00:44:36.043401 3 1 24 |2c2b 3232 |(11 11)(11 11) |(1 0)(1 1)| 0
2363 00:44:36.049903 3 1 28 |2c2b 1312 |(11 11)(11 11) |(1 0)(1 1)| 0
2364 00:44:36.053413 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2365 00:44:36.056570 3 2 0 |2c2b 1817 |(11 11)(11 11) |(1 0)(0 1)| 0
2366 00:44:36.062926 3 2 4 |2c2b 3434 |(11 11)(0 0) |(1 0)(0 1)| 0
2367 00:44:36.066417 3 2 8 |2c2b 3434 |(11 11)(11 11) |(1 0)(1 1)| 0
2368 00:44:36.069750 [Byte 1] Lead/lag falling Transition (3, 2, 8)
2369 00:44:36.073230 3 2 12 |2c2b c0c |(11 11)(11 11) |(1 0)(0 1)| 0
2370 00:44:36.079592 3 2 16 |302 2423 |(11 11)(11 11) |(0 0)(0 1)| 0
2371 00:44:36.082744 3 2 20 |3534 3434 |(11 11)(0 0) |(0 0)(0 1)| 0
2372 00:44:36.086008 3 2 24 |3534 e0d |(11 11)(11 11) |(0 0)(1 1)| 0
2373 00:44:36.092480 [Byte 1] Lead/lag Transition tap number (1)
2374 00:44:36.095832 3 2 28 |3534 2727 |(11 11)(11 11) |(0 0)(0 0)| 0
2375 00:44:36.099125 3 3 0 |3534 3a3a |(11 11)(11 11) |(0 0)(0 0)| 0
2376 00:44:36.105567 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2377 00:44:36.109102 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2378 00:44:36.112077 3 3 12 |3534 1010 |(11 11)(11 11) |(1 1)(1 1)| 0
2379 00:44:36.118961 3 3 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2380 00:44:36.122237 3 3 20 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2381 00:44:36.125268 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2382 00:44:36.128733 3 3 24 |3534 0 |(11 11)(11 11) |(0 1)(1 1)| 0
2383 00:44:36.135253 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2384 00:44:36.138492 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2385 00:44:36.141649 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2386 00:44:36.148202 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2387 00:44:36.151526 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2388 00:44:36.154881 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2389 00:44:36.161325 3 4 16 |504 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2390 00:44:36.164523 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2391 00:44:36.167865 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2392 00:44:36.174269 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 00:44:36.177627 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 00:44:36.180848 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 00:44:36.187566 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 00:44:36.190866 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 00:44:36.193995 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 00:44:36.200426 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 00:44:36.204030 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 00:44:36.206926 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 00:44:36.213643 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 00:44:36.216733 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 00:44:36.220163 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2404 00:44:36.226740 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2405 00:44:36.229991 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2406 00:44:36.233382 [Byte 0] Lead/lag Transition tap number (3)
2407 00:44:36.236583 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2408 00:44:36.243133 [Byte 1] Lead/lag Transition tap number (1)
2409 00:44:36.246505 3 6 20 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
2410 00:44:36.249633 [Byte 0]First pass (3, 6, 20)
2411 00:44:36.253045 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2412 00:44:36.256525 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2413 00:44:36.259375 [Byte 1]First pass (3, 6, 28)
2414 00:44:36.262847 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 00:44:36.266013 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2416 00:44:36.272514 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 00:44:36.275747 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2418 00:44:36.279096 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 00:44:36.282328 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 00:44:36.289208 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 00:44:36.292199 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2422 00:44:36.295432 All bytes gating window > 1UI, Early break!
2423 00:44:36.295524
2424 00:44:36.298732 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2425 00:44:36.298822
2426 00:44:36.302281 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
2427 00:44:36.302371
2428 00:44:36.302442
2429 00:44:36.302507
2430 00:44:36.308791 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2431 00:44:36.308883
2432 00:44:36.311918 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2433 00:44:36.312008
2434 00:44:36.312078
2435 00:44:36.314917 Write Rank0 MR1 =0x56
2436 00:44:36.315007
2437 00:44:36.318427 best RODT dly(2T, 0.5T) = (2, 3)
2438 00:44:36.318518
2439 00:44:36.318589 best RODT dly(2T, 0.5T) = (2, 3)
2440 00:44:36.321468 ==
2441 00:44:36.324965 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2442 00:44:36.328222 fsp= 1, odt_onoff= 1, Byte mode= 0
2443 00:44:36.328313 ==
2444 00:44:36.331398 Start DQ dly to find pass range UseTestEngine =0
2445 00:44:36.338023 x-axis: bit #, y-axis: DQ dly (-127~63)
2446 00:44:36.338121 RX Vref Scan = 0
2447 00:44:36.341345 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2448 00:44:36.344750 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2449 00:44:36.347922 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2450 00:44:36.351046 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2451 00:44:36.351138 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2452 00:44:36.354381 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2453 00:44:36.357627 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2454 00:44:36.360900 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2455 00:44:36.364293 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2456 00:44:36.367575 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2457 00:44:36.370584 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2458 00:44:36.373887 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2459 00:44:36.377206 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2460 00:44:36.380678 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2461 00:44:36.380770 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2462 00:44:36.383986 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2463 00:44:36.387164 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2464 00:44:36.390589 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2465 00:44:36.393784 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2466 00:44:36.396825 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2467 00:44:36.400419 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2468 00:44:36.404039 -5, [0] xxxxxxxx xxxxxxxo [MSB]
2469 00:44:36.404131 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2470 00:44:36.406776 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2471 00:44:36.410203 -2, [0] xxxoxxxx ooxxxxxo [MSB]
2472 00:44:36.413632 -1, [0] xxxxxxxx ooxxxxxo [MSB]
2473 00:44:36.416482 0, [0] xxxoxxxx ooxxxxxo [MSB]
2474 00:44:36.419818 1, [0] xxooxxxx ooxxxxxo [MSB]
2475 00:44:36.423249 2, [0] xxooxxxo oooxxxxo [MSB]
2476 00:44:36.423344 3, [0] xxooxxxo ooooxxxo [MSB]
2477 00:44:36.426694 4, [0] xooooxxo oooooooo [MSB]
2478 00:44:36.429805 5, [0] oooooxoo oooooooo [MSB]
2479 00:44:36.432904 6, [0] oooooxoo oooooooo [MSB]
2480 00:44:36.436047 32, [0] oooooooo ooooooox [MSB]
2481 00:44:36.439662 33, [0] oooooooo ooooooox [MSB]
2482 00:44:36.442699 34, [0] oooooooo ooooooox [MSB]
2483 00:44:36.442792 35, [0] ooxooooo oxooooox [MSB]
2484 00:44:36.445898 36, [0] ooxxoooo oxooooox [MSB]
2485 00:44:36.449226 37, [0] ooxxoooo xxooooox [MSB]
2486 00:44:36.452577 38, [0] ooxxoooo xxooooox [MSB]
2487 00:44:36.455698 39, [0] oxxxooox xxxxooox [MSB]
2488 00:44:36.459008 40, [0] oxxxxoox xxxxxoox [MSB]
2489 00:44:36.462558 41, [0] xxxxxoxx xxxxxxxx [MSB]
2490 00:44:36.465693 42, [0] xxxxxoxx xxxxxxxx [MSB]
2491 00:44:36.465786 43, [0] xxxxxxxx xxxxxxxx [MSB]
2492 00:44:36.468795 iDelay=43, Bit 0, Center 22 (5 ~ 40) 36
2493 00:44:36.475451 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
2494 00:44:36.478832 iDelay=43, Bit 2, Center 17 (1 ~ 34) 34
2495 00:44:36.482039 iDelay=43, Bit 3, Center 17 (0 ~ 35) 36
2496 00:44:36.485090 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
2497 00:44:36.488429 iDelay=43, Bit 5, Center 24 (7 ~ 42) 36
2498 00:44:36.491894 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
2499 00:44:36.495080 iDelay=43, Bit 7, Center 20 (2 ~ 38) 37
2500 00:44:36.498656 iDelay=43, Bit 8, Center 17 (-2 ~ 36) 39
2501 00:44:36.501443 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2502 00:44:36.504906 iDelay=43, Bit 10, Center 20 (2 ~ 38) 37
2503 00:44:36.508262 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
2504 00:44:36.514793 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
2505 00:44:36.518172 iDelay=43, Bit 13, Center 22 (4 ~ 40) 37
2506 00:44:36.521207 iDelay=43, Bit 14, Center 22 (4 ~ 40) 37
2507 00:44:36.524344 iDelay=43, Bit 15, Center 13 (-5 ~ 31) 37
2508 00:44:36.524434 ==
2509 00:44:36.530948 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2510 00:44:36.531039 fsp= 1, odt_onoff= 1, Byte mode= 0
2511 00:44:36.534471 ==
2512 00:44:36.534562 DQS Delay:
2513 00:44:36.534634 DQS0 = 0, DQS1 = 0
2514 00:44:36.537422 DQM Delay:
2515 00:44:36.537536 DQM0 = 20, DQM1 = 18
2516 00:44:36.540755 DQ Delay:
2517 00:44:36.544118 DQ0 =22, DQ1 =21, DQ2 =17, DQ3 =17
2518 00:44:36.547471 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
2519 00:44:36.550775 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2520 00:44:36.553978 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
2521 00:44:36.554068
2522 00:44:36.554140
2523 00:44:36.554206 DramC Write-DBI off
2524 00:44:36.554270 ==
2525 00:44:36.560447 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2526 00:44:36.563570 fsp= 1, odt_onoff= 1, Byte mode= 0
2527 00:44:36.563661 ==
2528 00:44:36.566703 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2529 00:44:36.566794
2530 00:44:36.570195 Begin, DQ Scan Range 928~1184
2531 00:44:36.570285
2532 00:44:36.570356
2533 00:44:36.573457 TX Vref Scan disable
2534 00:44:36.576572 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2535 00:44:36.579828 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2536 00:44:36.583357 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2537 00:44:36.586477 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2538 00:44:36.589915 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2539 00:44:36.593019 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2540 00:44:36.596249 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2541 00:44:36.599606 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2542 00:44:36.606251 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2543 00:44:36.609274 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2544 00:44:36.612787 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2545 00:44:36.615910 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2546 00:44:36.619355 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2547 00:44:36.622657 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2548 00:44:36.625844 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2549 00:44:36.629030 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2550 00:44:36.632458 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2551 00:44:36.635782 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2552 00:44:36.638955 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2553 00:44:36.642342 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2554 00:44:36.645439 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2555 00:44:36.651979 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2556 00:44:36.655195 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2557 00:44:36.658589 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2558 00:44:36.661898 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2559 00:44:36.664940 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2560 00:44:36.668470 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2561 00:44:36.671618 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2562 00:44:36.674864 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2563 00:44:36.678257 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2564 00:44:36.681761 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2565 00:44:36.684609 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2566 00:44:36.687991 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2567 00:44:36.691417 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2568 00:44:36.694420 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2569 00:44:36.701141 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2570 00:44:36.704205 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2571 00:44:36.707835 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2572 00:44:36.710931 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2573 00:44:36.714359 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2574 00:44:36.717330 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2575 00:44:36.720913 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2576 00:44:36.723890 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2577 00:44:36.727085 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2578 00:44:36.730474 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2579 00:44:36.733919 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2580 00:44:36.737026 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2581 00:44:36.740471 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2582 00:44:36.743526 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2583 00:44:36.746823 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2584 00:44:36.753422 978 |3 6 18|[0] xxxxxxxx ooxxxxxo [MSB]
2585 00:44:36.756731 979 |3 6 19|[0] xxxxxxxx ooxxxxxo [MSB]
2586 00:44:36.760202 980 |3 6 20|[0] xxxxxxxx oooxxxxo [MSB]
2587 00:44:36.763603 981 |3 6 21|[0] xxxxxxxx oooxxxxo [MSB]
2588 00:44:36.766409 982 |3 6 22|[0] xxxxxxxx oooxoxoo [MSB]
2589 00:44:36.769743 983 |3 6 23|[0] xooooxox oooooooo [MSB]
2590 00:44:36.776208 993 |3 6 33|[0] oooooooo ooooooox [MSB]
2591 00:44:36.779422 994 |3 6 34|[0] oooooooo ooooooox [MSB]
2592 00:44:36.782776 995 |3 6 35|[0] oooooooo ooooooox [MSB]
2593 00:44:36.786111 996 |3 6 36|[0] oooooooo oxooooox [MSB]
2594 00:44:36.789543 997 |3 6 37|[0] oooooooo oxooooox [MSB]
2595 00:44:36.792624 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2596 00:44:36.795963 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2597 00:44:36.799039 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2598 00:44:36.802466 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2599 00:44:36.805821 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2600 00:44:36.809178 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
2601 00:44:36.812420 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2602 00:44:36.818815 1005 |3 6 45|[0] ooxxxoxx xxxxxxxx [MSB]
2603 00:44:36.822416 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2604 00:44:36.825559 Byte0, DQ PI dly=992, DQM PI dly= 992
2605 00:44:36.828835 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2606 00:44:36.828928
2607 00:44:36.832030 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2608 00:44:36.832130
2609 00:44:36.835323 Byte1, DQ PI dly=987, DQM PI dly= 987
2610 00:44:36.841823 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2611 00:44:36.841923
2612 00:44:36.845522 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2613 00:44:36.845608
2614 00:44:36.845677 ==
2615 00:44:36.851910 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2616 00:44:36.855250 fsp= 1, odt_onoff= 1, Byte mode= 0
2617 00:44:36.855343 ==
2618 00:44:36.858501 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2619 00:44:36.858594
2620 00:44:36.861633 Begin, DQ Scan Range 963~1027
2621 00:44:36.864797 Write Rank0 MR14 =0x0
2622 00:44:36.875233
2623 00:44:36.875328 CH=1, VrefRange= 0, VrefLevel = 0
2624 00:44:36.881717 TX Bit0 (986~1000) 15 993, Bit8 (982~993) 12 987,
2625 00:44:36.885078 TX Bit1 (985~1000) 16 992, Bit9 (982~991) 10 986,
2626 00:44:36.891582 TX Bit2 (983~997) 15 990, Bit10 (984~995) 12 989,
2627 00:44:36.895038 TX Bit3 (980~995) 16 987, Bit11 (984~994) 11 989,
2628 00:44:36.898553 TX Bit4 (984~999) 16 991, Bit12 (984~995) 12 989,
2629 00:44:36.904513 TX Bit5 (986~1000) 15 993, Bit13 (984~997) 14 990,
2630 00:44:36.907842 TX Bit6 (985~999) 15 992, Bit14 (984~994) 11 989,
2631 00:44:36.914319 TX Bit7 (985~999) 15 992, Bit15 (980~987) 8 983,
2632 00:44:36.914414
2633 00:44:36.914486 Write Rank0 MR14 =0x2
2634 00:44:36.923250
2635 00:44:36.923351 CH=1, VrefRange= 0, VrefLevel = 2
2636 00:44:36.930022 TX Bit0 (986~1001) 16 993, Bit8 (981~993) 13 987,
2637 00:44:36.933095 TX Bit1 (984~1000) 17 992, Bit9 (981~992) 12 986,
2638 00:44:36.939796 TX Bit2 (983~998) 16 990, Bit10 (983~996) 14 989,
2639 00:44:36.943080 TX Bit3 (980~996) 17 988, Bit11 (985~995) 11 990,
2640 00:44:36.946448 TX Bit4 (984~999) 16 991, Bit12 (984~995) 12 989,
2641 00:44:36.952849 TX Bit5 (986~1001) 16 993, Bit13 (984~998) 15 991,
2642 00:44:36.956085 TX Bit6 (985~999) 15 992, Bit14 (983~995) 13 989,
2643 00:44:36.962444 TX Bit7 (985~999) 15 992, Bit15 (979~988) 10 983,
2644 00:44:36.962543
2645 00:44:36.962615 Write Rank0 MR14 =0x4
2646 00:44:36.972165
2647 00:44:36.974976 CH=1, VrefRange= 0, VrefLevel = 4
2648 00:44:36.978273 TX Bit0 (985~1002) 18 993, Bit8 (981~994) 14 987,
2649 00:44:36.981283 TX Bit1 (984~1001) 18 992, Bit9 (980~992) 13 986,
2650 00:44:36.988109 TX Bit2 (983~998) 16 990, Bit10 (983~997) 15 990,
2651 00:44:36.991384 TX Bit3 (979~997) 19 988, Bit11 (984~995) 12 989,
2652 00:44:36.997868 TX Bit4 (984~1000) 17 992, Bit12 (984~996) 13 990,
2653 00:44:37.000851 TX Bit5 (985~1002) 18 993, Bit13 (984~998) 15 991,
2654 00:44:37.004602 TX Bit6 (985~1000) 16 992, Bit14 (983~995) 13 989,
2655 00:44:37.010759 TX Bit7 (985~1000) 16 992, Bit15 (978~989) 12 983,
2656 00:44:37.010852
2657 00:44:37.010924 Write Rank0 MR14 =0x6
2658 00:44:37.020485
2659 00:44:37.020588 CH=1, VrefRange= 0, VrefLevel = 6
2660 00:44:37.026868 TX Bit0 (985~1003) 19 994, Bit8 (980~994) 15 987,
2661 00:44:37.030753 TX Bit1 (984~1002) 19 993, Bit9 (979~992) 14 985,
2662 00:44:37.036637 TX Bit2 (982~999) 18 990, Bit10 (982~998) 17 990,
2663 00:44:37.039972 TX Bit3 (979~997) 19 988, Bit11 (984~996) 13 990,
2664 00:44:37.043294 TX Bit4 (984~1000) 17 992, Bit12 (983~997) 15 990,
2665 00:44:37.049846 TX Bit5 (985~1002) 18 993, Bit13 (984~999) 16 991,
2666 00:44:37.052941 TX Bit6 (985~1000) 16 992, Bit14 (983~996) 14 989,
2667 00:44:37.059774 TX Bit7 (984~1000) 17 992, Bit15 (978~990) 13 984,
2668 00:44:37.059886
2669 00:44:37.059960 Write Rank0 MR14 =0x8
2670 00:44:37.069337
2671 00:44:37.072294 CH=1, VrefRange= 0, VrefLevel = 8
2672 00:44:37.075668 TX Bit0 (985~1004) 20 994, Bit8 (980~995) 16 987,
2673 00:44:37.079218 TX Bit1 (984~1003) 20 993, Bit9 (979~993) 15 986,
2674 00:44:37.085773 TX Bit2 (981~1000) 20 990, Bit10 (982~998) 17 990,
2675 00:44:37.088844 TX Bit3 (979~998) 20 988, Bit11 (984~998) 15 991,
2676 00:44:37.095498 TX Bit4 (983~1001) 19 992, Bit12 (983~998) 16 990,
2677 00:44:37.098796 TX Bit5 (985~1003) 19 994, Bit13 (984~999) 16 991,
2678 00:44:37.102327 TX Bit6 (984~1001) 18 992, Bit14 (983~997) 15 990,
2679 00:44:37.108672 TX Bit7 (984~1001) 18 992, Bit15 (978~991) 14 984,
2680 00:44:37.108799
2681 00:44:37.108877 Write Rank0 MR14 =0xa
2682 00:44:37.118320
2683 00:44:37.121600 CH=1, VrefRange= 0, VrefLevel = 10
2684 00:44:37.124703 TX Bit0 (985~1004) 20 994, Bit8 (979~996) 18 987,
2685 00:44:37.128034 TX Bit1 (984~1003) 20 993, Bit9 (979~993) 15 986,
2686 00:44:37.134655 TX Bit2 (982~1000) 19 991, Bit10 (982~999) 18 990,
2687 00:44:37.137904 TX Bit3 (978~998) 21 988, Bit11 (983~998) 16 990,
2688 00:44:37.144626 TX Bit4 (983~1002) 20 992, Bit12 (983~999) 17 991,
2689 00:44:37.147660 TX Bit5 (985~1004) 20 994, Bit13 (983~999) 17 991,
2690 00:44:37.150940 TX Bit6 (984~1002) 19 993, Bit14 (983~998) 16 990,
2691 00:44:37.157455 TX Bit7 (984~1001) 18 992, Bit15 (977~991) 15 984,
2692 00:44:37.157557
2693 00:44:37.157630 Write Rank0 MR14 =0xc
2694 00:44:37.167456
2695 00:44:37.170732 CH=1, VrefRange= 0, VrefLevel = 12
2696 00:44:37.174130 TX Bit0 (985~1005) 21 995, Bit8 (979~996) 18 987,
2697 00:44:37.177149 TX Bit1 (983~1004) 22 993, Bit9 (978~994) 17 986,
2698 00:44:37.183612 TX Bit2 (981~1001) 21 991, Bit10 (981~999) 19 990,
2699 00:44:37.186987 TX Bit3 (978~998) 21 988, Bit11 (983~999) 17 991,
2700 00:44:37.193978 TX Bit4 (983~1003) 21 993, Bit12 (983~999) 17 991,
2701 00:44:37.196873 TX Bit5 (985~1004) 20 994, Bit13 (983~999) 17 991,
2702 00:44:37.200318 TX Bit6 (984~1003) 20 993, Bit14 (983~999) 17 991,
2703 00:44:37.206735 TX Bit7 (984~1002) 19 993, Bit15 (977~991) 15 984,
2704 00:44:37.206857
2705 00:44:37.206935 Write Rank0 MR14 =0xe
2706 00:44:37.216847
2707 00:44:37.219917 CH=1, VrefRange= 0, VrefLevel = 14
2708 00:44:37.223270 TX Bit0 (985~1005) 21 995, Bit8 (978~997) 20 987,
2709 00:44:37.226514 TX Bit1 (983~1004) 22 993, Bit9 (977~994) 18 985,
2710 00:44:37.232950 TX Bit2 (981~1002) 22 991, Bit10 (981~999) 19 990,
2711 00:44:37.236392 TX Bit3 (978~998) 21 988, Bit11 (983~999) 17 991,
2712 00:44:37.242900 TX Bit4 (983~1004) 22 993, Bit12 (982~999) 18 990,
2713 00:44:37.246199 TX Bit5 (984~1005) 22 994, Bit13 (983~1000) 18 991,
2714 00:44:37.249408 TX Bit6 (983~1004) 22 993, Bit14 (982~999) 18 990,
2715 00:44:37.256036 TX Bit7 (983~1003) 21 993, Bit15 (976~992) 17 984,
2716 00:44:37.256151
2717 00:44:37.259333 Write Rank0 MR14 =0x10
2718 00:44:37.266205
2719 00:44:37.269311 CH=1, VrefRange= 0, VrefLevel = 16
2720 00:44:37.272543 TX Bit0 (984~1005) 22 994, Bit8 (978~998) 21 988,
2721 00:44:37.276098 TX Bit1 (983~1005) 23 994, Bit9 (978~995) 18 986,
2722 00:44:37.282449 TX Bit2 (981~1002) 22 991, Bit10 (980~999) 20 989,
2723 00:44:37.285632 TX Bit3 (978~999) 22 988, Bit11 (983~1000) 18 991,
2724 00:44:37.292359 TX Bit4 (982~1004) 23 993, Bit12 (982~1000) 19 991,
2725 00:44:37.295512 TX Bit5 (985~1005) 21 995, Bit13 (983~1000) 18 991,
2726 00:44:37.298861 TX Bit6 (984~1004) 21 994, Bit14 (982~999) 18 990,
2727 00:44:37.305571 TX Bit7 (983~1004) 22 993, Bit15 (976~992) 17 984,
2728 00:44:37.305692
2729 00:44:37.308764 Write Rank0 MR14 =0x12
2730 00:44:37.316249
2731 00:44:37.319319 CH=1, VrefRange= 0, VrefLevel = 18
2732 00:44:37.322508 TX Bit0 (984~1006) 23 995, Bit8 (977~999) 23 988,
2733 00:44:37.325726 TX Bit1 (983~1005) 23 994, Bit9 (977~995) 19 986,
2734 00:44:37.332306 TX Bit2 (980~1002) 23 991, Bit10 (980~1000) 21 990,
2735 00:44:37.335619 TX Bit3 (978~999) 22 988, Bit11 (983~1000) 18 991,
2736 00:44:37.342280 TX Bit4 (982~1005) 24 993, Bit12 (981~1000) 20 990,
2737 00:44:37.345405 TX Bit5 (984~1005) 22 994, Bit13 (983~1000) 18 991,
2738 00:44:37.352117 TX Bit6 (983~1004) 22 993, Bit14 (981~1000) 20 990,
2739 00:44:37.355203 TX Bit7 (983~1005) 23 994, Bit15 (975~993) 19 984,
2740 00:44:37.355301
2741 00:44:37.358370 Write Rank0 MR14 =0x14
2742 00:44:37.365826
2743 00:44:37.369276 CH=1, VrefRange= 0, VrefLevel = 20
2744 00:44:37.372346 TX Bit0 (984~1006) 23 995, Bit8 (977~999) 23 988,
2745 00:44:37.375658 TX Bit1 (982~1005) 24 993, Bit9 (977~996) 20 986,
2746 00:44:37.382217 TX Bit2 (979~1004) 26 991, Bit10 (979~1000) 22 989,
2747 00:44:37.385653 TX Bit3 (978~1000) 23 989, Bit11 (982~1000) 19 991,
2748 00:44:37.392309 TX Bit4 (981~1005) 25 993, Bit12 (981~1001) 21 991,
2749 00:44:37.395254 TX Bit5 (984~1005) 22 994, Bit13 (982~1001) 20 991,
2750 00:44:37.402049 TX Bit6 (983~1005) 23 994, Bit14 (981~1000) 20 990,
2751 00:44:37.405243 TX Bit7 (983~1004) 22 993, Bit15 (976~993) 18 984,
2752 00:44:37.405347
2753 00:44:37.408700 Write Rank0 MR14 =0x16
2754 00:44:37.415981
2755 00:44:37.419042 CH=1, VrefRange= 0, VrefLevel = 22
2756 00:44:37.422334 TX Bit0 (984~1006) 23 995, Bit8 (977~999) 23 988,
2757 00:44:37.425636 TX Bit1 (982~1006) 25 994, Bit9 (977~997) 21 987,
2758 00:44:37.432171 TX Bit2 (979~1004) 26 991, Bit10 (979~1000) 22 989,
2759 00:44:37.435343 TX Bit3 (977~1000) 24 988, Bit11 (982~1001) 20 991,
2760 00:44:37.441911 TX Bit4 (981~1005) 25 993, Bit12 (981~1001) 21 991,
2761 00:44:37.445181 TX Bit5 (984~1006) 23 995, Bit13 (982~1001) 20 991,
2762 00:44:37.451967 TX Bit6 (983~1005) 23 994, Bit14 (980~1000) 21 990,
2763 00:44:37.454931 TX Bit7 (983~1005) 23 994, Bit15 (976~994) 19 985,
2764 00:44:37.455022
2765 00:44:37.458214 Write Rank0 MR14 =0x18
2766 00:44:37.465848
2767 00:44:37.469233 CH=1, VrefRange= 0, VrefLevel = 24
2768 00:44:37.472473 TX Bit0 (984~1006) 23 995, Bit8 (977~999) 23 988,
2769 00:44:37.475697 TX Bit1 (982~1006) 25 994, Bit9 (977~998) 22 987,
2770 00:44:37.482272 TX Bit2 (979~1004) 26 991, Bit10 (978~1001) 24 989,
2771 00:44:37.485405 TX Bit3 (978~1001) 24 989, Bit11 (981~1001) 21 991,
2772 00:44:37.491959 TX Bit4 (981~1005) 25 993, Bit12 (980~1001) 22 990,
2773 00:44:37.495412 TX Bit5 (983~1006) 24 994, Bit13 (982~1001) 20 991,
2774 00:44:37.501645 TX Bit6 (982~1005) 24 993, Bit14 (981~1000) 20 990,
2775 00:44:37.504996 TX Bit7 (982~1005) 24 993, Bit15 (975~994) 20 984,
2776 00:44:37.505089
2777 00:44:37.508517 Write Rank0 MR14 =0x1a
2778 00:44:37.515808
2779 00:44:37.519336 CH=1, VrefRange= 0, VrefLevel = 26
2780 00:44:37.522687 TX Bit0 (983~1006) 24 994, Bit8 (977~999) 23 988,
2781 00:44:37.525684 TX Bit1 (981~1006) 26 993, Bit9 (976~998) 23 987,
2782 00:44:37.532310 TX Bit2 (979~1005) 27 992, Bit10 (979~1001) 23 990,
2783 00:44:37.535363 TX Bit3 (977~1001) 25 989, Bit11 (980~1001) 22 990,
2784 00:44:37.542315 TX Bit4 (980~1006) 27 993, Bit12 (980~1002) 23 991,
2785 00:44:37.545366 TX Bit5 (983~1006) 24 994, Bit13 (982~1002) 21 992,
2786 00:44:37.551895 TX Bit6 (982~1006) 25 994, Bit14 (979~1001) 23 990,
2787 00:44:37.555279 TX Bit7 (981~1006) 26 993, Bit15 (975~996) 22 985,
2788 00:44:37.555392
2789 00:44:37.558213 Write Rank0 MR14 =0x1c
2790 00:44:37.566605
2791 00:44:37.569309 CH=1, VrefRange= 0, VrefLevel = 28
2792 00:44:37.572526 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2793 00:44:37.575927 TX Bit1 (981~1006) 26 993, Bit9 (977~998) 22 987,
2794 00:44:37.582428 TX Bit2 (978~1005) 28 991, Bit10 (978~1002) 25 990,
2795 00:44:37.585971 TX Bit3 (977~1002) 26 989, Bit11 (980~1002) 23 991,
2796 00:44:37.592305 TX Bit4 (981~1006) 26 993, Bit12 (980~1002) 23 991,
2797 00:44:37.595671 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
2798 00:44:37.601969 TX Bit6 (982~1006) 25 994, Bit14 (979~1001) 23 990,
2799 00:44:37.605237 TX Bit7 (981~1006) 26 993, Bit15 (975~996) 22 985,
2800 00:44:37.605328
2801 00:44:37.608457 Write Rank0 MR14 =0x1e
2802 00:44:37.616221
2803 00:44:37.619512 CH=1, VrefRange= 0, VrefLevel = 30
2804 00:44:37.622767 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2805 00:44:37.626228 TX Bit1 (981~1006) 26 993, Bit9 (976~999) 24 987,
2806 00:44:37.632875 TX Bit2 (978~1005) 28 991, Bit10 (978~1001) 24 989,
2807 00:44:37.635989 TX Bit3 (977~1002) 26 989, Bit11 (980~1002) 23 991,
2808 00:44:37.642317 TX Bit4 (981~1006) 26 993, Bit12 (979~1001) 23 990,
2809 00:44:37.645751 TX Bit5 (983~1006) 24 994, Bit13 (980~1002) 23 991,
2810 00:44:37.652421 TX Bit6 (981~1006) 26 993, Bit14 (979~1001) 23 990,
2811 00:44:37.655929 TX Bit7 (981~1006) 26 993, Bit15 (975~997) 23 986,
2812 00:44:37.656025
2813 00:44:37.658650 Write Rank0 MR14 =0x20
2814 00:44:37.666503
2815 00:44:37.669873 CH=1, VrefRange= 0, VrefLevel = 32
2816 00:44:37.672845 TX Bit0 (982~1007) 26 994, Bit8 (977~999) 23 988,
2817 00:44:37.676261 TX Bit1 (981~1006) 26 993, Bit9 (976~998) 23 987,
2818 00:44:37.682987 TX Bit2 (978~1005) 28 991, Bit10 (979~1001) 23 990,
2819 00:44:37.686318 TX Bit3 (977~1001) 25 989, Bit11 (979~1002) 24 990,
2820 00:44:37.692674 TX Bit4 (982~1006) 25 994, Bit12 (979~1001) 23 990,
2821 00:44:37.696111 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
2822 00:44:37.702502 TX Bit6 (980~1006) 27 993, Bit14 (978~1001) 24 989,
2823 00:44:37.705844 TX Bit7 (980~1006) 27 993, Bit15 (974~996) 23 985,
2824 00:44:37.705938
2825 00:44:37.709100 Write Rank0 MR14 =0x22
2826 00:44:37.716733
2827 00:44:37.719933 CH=1, VrefRange= 0, VrefLevel = 34
2828 00:44:37.723001 TX Bit0 (982~1007) 26 994, Bit8 (977~999) 23 988,
2829 00:44:37.726602 TX Bit1 (981~1006) 26 993, Bit9 (976~998) 23 987,
2830 00:44:37.733041 TX Bit2 (978~1005) 28 991, Bit10 (979~1001) 23 990,
2831 00:44:37.736277 TX Bit3 (977~1001) 25 989, Bit11 (979~1002) 24 990,
2832 00:44:37.743213 TX Bit4 (982~1006) 25 994, Bit12 (979~1001) 23 990,
2833 00:44:37.745975 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
2834 00:44:37.753251 TX Bit6 (980~1006) 27 993, Bit14 (978~1001) 24 989,
2835 00:44:37.755867 TX Bit7 (980~1006) 27 993, Bit15 (974~996) 23 985,
2836 00:44:37.756073
2837 00:44:37.759468 Write Rank0 MR14 =0x24
2838 00:44:37.767181
2839 00:44:37.769840 CH=1, VrefRange= 0, VrefLevel = 36
2840 00:44:37.773611 TX Bit0 (982~1007) 26 994, Bit8 (977~999) 23 988,
2841 00:44:37.776841 TX Bit1 (981~1006) 26 993, Bit9 (976~998) 23 987,
2842 00:44:37.783590 TX Bit2 (978~1005) 28 991, Bit10 (979~1001) 23 990,
2843 00:44:37.786717 TX Bit3 (977~1001) 25 989, Bit11 (979~1002) 24 990,
2844 00:44:37.793594 TX Bit4 (982~1006) 25 994, Bit12 (979~1001) 23 990,
2845 00:44:37.796096 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
2846 00:44:37.803039 TX Bit6 (980~1006) 27 993, Bit14 (978~1001) 24 989,
2847 00:44:37.806268 TX Bit7 (980~1006) 27 993, Bit15 (974~996) 23 985,
2848 00:44:37.806726
2849 00:44:37.807102
2850 00:44:37.809697 TX Vref found, early break! 374< 376
2851 00:44:37.816354 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2852 00:44:37.816807 u1DelayCellOfst[0]=6 cells (5 PI)
2853 00:44:37.819357 u1DelayCellOfst[1]=5 cells (4 PI)
2854 00:44:37.822306 u1DelayCellOfst[2]=2 cells (2 PI)
2855 00:44:37.825671 u1DelayCellOfst[3]=0 cells (0 PI)
2856 00:44:37.829181 u1DelayCellOfst[4]=6 cells (5 PI)
2857 00:44:37.832708 u1DelayCellOfst[5]=6 cells (5 PI)
2858 00:44:37.836029 u1DelayCellOfst[6]=5 cells (4 PI)
2859 00:44:37.838579 u1DelayCellOfst[7]=5 cells (4 PI)
2860 00:44:37.842040 Byte0, DQ PI dly=989, DQM PI dly= 991
2861 00:44:37.845419 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2862 00:44:37.846032
2863 00:44:37.851905 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2864 00:44:37.852453
2865 00:44:37.854870 u1DelayCellOfst[8]=3 cells (3 PI)
2866 00:44:37.858235 u1DelayCellOfst[9]=2 cells (2 PI)
2867 00:44:37.861523 u1DelayCellOfst[10]=6 cells (5 PI)
2868 00:44:37.861936 u1DelayCellOfst[11]=6 cells (5 PI)
2869 00:44:37.864843 u1DelayCellOfst[12]=6 cells (5 PI)
2870 00:44:37.868381 u1DelayCellOfst[13]=7 cells (6 PI)
2871 00:44:37.871594 u1DelayCellOfst[14]=5 cells (4 PI)
2872 00:44:37.874854 u1DelayCellOfst[15]=0 cells (0 PI)
2873 00:44:37.878346 Byte1, DQ PI dly=985, DQM PI dly= 988
2874 00:44:37.884534 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2875 00:44:37.884885
2876 00:44:37.887753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2877 00:44:37.888100
2878 00:44:37.891062 Write Rank0 MR14 =0x20
2879 00:44:37.891404
2880 00:44:37.891739 Final TX Range 0 Vref 32
2881 00:44:37.892002
2882 00:44:37.897721 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2883 00:44:37.898066
2884 00:44:37.904384 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2885 00:44:37.914256 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2886 00:44:37.921146 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2887 00:44:37.921696 Write Rank0 MR3 =0xb0
2888 00:44:37.923955 DramC Write-DBI on
2889 00:44:37.924402 ==
2890 00:44:37.927207 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2891 00:44:37.930187 fsp= 1, odt_onoff= 1, Byte mode= 0
2892 00:44:37.933585 ==
2893 00:44:37.936867 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2894 00:44:37.937342
2895 00:44:37.940231 Begin, DQ Scan Range 708~772
2896 00:44:37.940601
2897 00:44:37.940911
2898 00:44:37.941173 TX Vref Scan disable
2899 00:44:37.943146 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2900 00:44:37.946673 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2901 00:44:37.953593 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2902 00:44:37.956825 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2903 00:44:37.959722 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2904 00:44:37.963346 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2905 00:44:37.966294 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2906 00:44:37.969847 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2907 00:44:37.973100 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2908 00:44:37.976469 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2909 00:44:37.979182 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2910 00:44:37.982897 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2911 00:44:37.985955 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2912 00:44:37.989461 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2913 00:44:37.992376 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2914 00:44:37.995644 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2915 00:44:38.005759 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2916 00:44:38.008809 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2917 00:44:38.011934 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2918 00:44:38.015402 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2919 00:44:38.018670 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2920 00:44:38.022024 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2921 00:44:38.025155 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2922 00:44:38.028697 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2923 00:44:38.031837 Byte0, DQ PI dly=737, DQM PI dly= 737
2924 00:44:38.035196 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2925 00:44:38.038467
2926 00:44:38.041268 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2927 00:44:38.041685
2928 00:44:38.045183 Byte1, DQ PI dly=731, DQM PI dly= 731
2929 00:44:38.048053 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2930 00:44:38.048438
2931 00:44:38.054416 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2932 00:44:38.054804
2933 00:44:38.060963 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2934 00:44:38.067598 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2935 00:44:38.074313 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2936 00:44:38.077981 Write Rank0 MR3 =0x30
2937 00:44:38.078443 DramC Write-DBI off
2938 00:44:38.078750
2939 00:44:38.079010 [DATLAT]
2940 00:44:38.080912 Freq=1600, CH1 RK0, use_rxtx_scan=0
2941 00:44:38.081361
2942 00:44:38.083921 DATLAT Default: 0xf
2943 00:44:38.084268 7, 0xFFFF, sum=0
2944 00:44:38.087267 8, 0xFFFF, sum=0
2945 00:44:38.087622 9, 0xFFFF, sum=0
2946 00:44:38.090196 10, 0xFFFF, sum=0
2947 00:44:38.090550 11, 0xFFFF, sum=0
2948 00:44:38.093517 12, 0xFFFF, sum=0
2949 00:44:38.093871 13, 0xFFFF, sum=0
2950 00:44:38.096920 14, 0x0, sum=1
2951 00:44:38.097270 15, 0x0, sum=2
2952 00:44:38.100185 16, 0x0, sum=3
2953 00:44:38.100537 17, 0x0, sum=4
2954 00:44:38.103948 pattern=2 first_step=14 total pass=5 best_step=16
2955 00:44:38.106990 ==
2956 00:44:38.110069 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2957 00:44:38.113563 fsp= 1, odt_onoff= 1, Byte mode= 0
2958 00:44:38.114019 ==
2959 00:44:38.116827 Start DQ dly to find pass range UseTestEngine =1
2960 00:44:38.120189 x-axis: bit #, y-axis: DQ dly (-127~63)
2961 00:44:38.122997 RX Vref Scan = 1
2962 00:44:38.229973
2963 00:44:38.230160 RX Vref found, early break!
2964 00:44:38.230269
2965 00:44:38.236406 Final RX Vref 11, apply to both rank0 and 1
2966 00:44:38.236490 ==
2967 00:44:38.239580 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2968 00:44:38.242895 fsp= 1, odt_onoff= 1, Byte mode= 0
2969 00:44:38.242984 ==
2970 00:44:38.246345 DQS Delay:
2971 00:44:38.246424 DQS0 = 0, DQS1 = 0
2972 00:44:38.246531 DQM Delay:
2973 00:44:38.249442 DQM0 = 19, DQM1 = 18
2974 00:44:38.249534 DQ Delay:
2975 00:44:38.252673 DQ0 =20, DQ1 =21, DQ2 =18, DQ3 =16
2976 00:44:38.256079 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =19
2977 00:44:38.259302 DQ8 =16, DQ9 =16, DQ10 =19, DQ11 =20
2978 00:44:38.262708 DQ12 =20, DQ13 =21, DQ14 =20, DQ15 =13
2979 00:44:38.262785
2980 00:44:38.262882
2981 00:44:38.262974
2982 00:44:38.265884 [DramC_TX_OE_Calibration] TA2
2983 00:44:38.269091 Original DQ_B0 (3 6) =30, OEN = 27
2984 00:44:38.272649 Original DQ_B1 (3 6) =30, OEN = 27
2985 00:44:38.275831 23, 0x0, End_B0=23 End_B1=23
2986 00:44:38.279085 24, 0x0, End_B0=24 End_B1=24
2987 00:44:38.279211 25, 0x0, End_B0=25 End_B1=25
2988 00:44:38.282329 26, 0x0, End_B0=26 End_B1=26
2989 00:44:38.285368 27, 0x0, End_B0=27 End_B1=27
2990 00:44:38.288723 28, 0x0, End_B0=28 End_B1=28
2991 00:44:38.292014 29, 0x0, End_B0=29 End_B1=29
2992 00:44:38.292127 30, 0x0, End_B0=30 End_B1=30
2993 00:44:38.295268 31, 0xFFFF, End_B0=30 End_B1=30
2994 00:44:38.301853 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2995 00:44:38.308231 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2996 00:44:38.308355
2997 00:44:38.308428
2998 00:44:38.308495 Write Rank0 MR23 =0x3f
2999 00:44:38.311726 [DQSOSC]
3000 00:44:38.318095 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3001 00:44:38.324679 CH1_RK0: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3002 00:44:38.328027 Write Rank0 MR23 =0x3f
3003 00:44:38.328152 [DQSOSC]
3004 00:44:38.334446 [DQSOSCAuto] RK0, (LSB)MR18= 0xb9b9, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3005 00:44:38.338145 CH1 RK0: MR19=202, MR18=B9B9
3006 00:44:38.341338 [RankSwap] Rank num 2, (Multi 1), Rank 1
3007 00:44:38.344556 Write Rank0 MR2 =0xad
3008 00:44:38.344646 [Write Leveling]
3009 00:44:38.347567 delay byte0 byte1 byte2 byte3
3010 00:44:38.347701
3011 00:44:38.351060 10 0 0
3012 00:44:38.351147 11 0 0
3013 00:44:38.354265 12 0 0
3014 00:44:38.354382 13 0 0
3015 00:44:38.354487 14 0 0
3016 00:44:38.357301 15 0 0
3017 00:44:38.357424 16 0 0
3018 00:44:38.360757 17 0 0
3019 00:44:38.360881 18 0 0
3020 00:44:38.360954 19 0 0
3021 00:44:38.363946 20 0 0
3022 00:44:38.364044 21 0 0
3023 00:44:38.367391 22 0 0
3024 00:44:38.367486 23 0 0
3025 00:44:38.370642 24 0 0
3026 00:44:38.370737 25 0 0
3027 00:44:38.370834 26 0 0
3028 00:44:38.373985 27 0 0
3029 00:44:38.374080 28 0 0
3030 00:44:38.377110 29 0 0
3031 00:44:38.377205 30 0 ff
3032 00:44:38.380271 31 0 ff
3033 00:44:38.380366 32 0 ff
3034 00:44:38.380463 33 0 ff
3035 00:44:38.383626 34 0 ff
3036 00:44:38.383721 35 ff ff
3037 00:44:38.387469 36 ff ff
3038 00:44:38.387566 37 ff ff
3039 00:44:38.390296 38 ff ff
3040 00:44:38.390393 39 ff ff
3041 00:44:38.393367 40 ff ff
3042 00:44:38.393490 41 ff ff
3043 00:44:38.397094 pass bytecount = 0xff (0xff: all bytes pass)
3044 00:44:38.400709
3045 00:44:38.401043 DQS0 dly: 35
3046 00:44:38.401468 DQS1 dly: 30
3047 00:44:38.403839 Write Rank0 MR2 =0x2d
3048 00:44:38.406814 [RankSwap] Rank num 2, (Multi 1), Rank 0
3049 00:44:38.410005 Write Rank1 MR1 =0xd6
3050 00:44:38.410434 [Gating]
3051 00:44:38.410775 ==
3052 00:44:38.413281 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3053 00:44:38.416654 fsp= 1, odt_onoff= 1, Byte mode= 0
3054 00:44:38.420167 ==
3055 00:44:38.423043 3 1 0 |2c2b 3737 |(11 11)(11 11) |(1 1)(1 1)| 0
3056 00:44:38.426250 3 1 4 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3057 00:44:38.429648 3 1 8 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3058 00:44:38.436216 3 1 12 |2c2b e0e |(11 11)(11 11) |(0 0)(1 1)| 0
3059 00:44:38.439422 3 1 16 |2c2b 1716 |(11 11)(11 11) |(1 1)(0 0)| 0
3060 00:44:38.442664 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3061 00:44:38.449305 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3062 00:44:38.452981 3 1 28 |2c2b b0b |(11 11)(11 11) |(1 0)(1 1)| 0
3063 00:44:38.456179 3 2 0 |2c2b 3434 |(11 11)(10 10) |(1 0)(1 1)| 0
3064 00:44:38.462545 [Byte 1] Lead/lag falling Transition (3, 2, 0)
3065 00:44:38.465809 3 2 4 |2c2b 2120 |(11 11)(11 11) |(1 0)(0 1)| 0
3066 00:44:38.469084 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3067 00:44:38.475559 3 2 12 |2c2b 3232 |(11 11)(11 11) |(1 0)(0 1)| 0
3068 00:44:38.478818 3 2 16 |2c2b d0d |(11 11)(11 11) |(1 0)(0 1)| 0
3069 00:44:38.482384 3 2 20 |404 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3070 00:44:38.488509 3 2 24 |1b1b 303 |(11 11)(11 11) |(0 0)(1 1)| 0
3071 00:44:38.491749 3 2 28 |3534 1414 |(11 11)(11 11) |(0 0)(1 1)| 0
3072 00:44:38.495209 3 3 0 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
3073 00:44:38.501639 3 3 4 |3534 302f |(11 11)(11 11) |(0 0)(1 1)| 0
3074 00:44:38.504890 3 3 8 |3534 3b3b |(11 11)(0 0) |(0 0)(1 1)| 0
3075 00:44:38.508494 3 3 12 |3534 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
3076 00:44:38.511769 3 3 16 |3534 2d2c |(11 11)(11 11) |(1 1)(1 1)| 0
3077 00:44:38.517978 3 3 20 |3534 a09 |(11 11)(11 11) |(1 1)(1 1)| 0
3078 00:44:38.521304 3 3 24 |3534 1e1e |(11 11)(11 11) |(1 1)(1 1)| 0
3079 00:44:38.524513 [Byte 0] Lead/lag falling Transition (3, 3, 24)
3080 00:44:38.531229 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3081 00:44:38.534317 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3082 00:44:38.537646 [Byte 1] Lead/lag falling Transition (3, 4, 0)
3083 00:44:38.544220 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3084 00:44:38.547402 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3085 00:44:38.550750 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3086 00:44:38.557216 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3087 00:44:38.560490 3 4 20 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3088 00:44:38.563876 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3089 00:44:38.570450 3 4 28 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
3090 00:44:38.573890 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3091 00:44:38.576822 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3092 00:44:38.583437 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3093 00:44:38.586898 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3094 00:44:38.590086 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3095 00:44:38.596678 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3096 00:44:38.599785 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3097 00:44:38.603329 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3098 00:44:38.609861 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3099 00:44:38.613104 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3100 00:44:38.616585 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3101 00:44:38.619650 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3102 00:44:38.626157 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3103 00:44:38.629446 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3104 00:44:38.632605 [Byte 0] Lead/lag Transition tap number (3)
3105 00:44:38.639186 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3106 00:44:38.642540 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3107 00:44:38.645552 [Byte 1] Lead/lag Transition tap number (2)
3108 00:44:38.649202 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3109 00:44:38.652219 [Byte 0]First pass (3, 6, 24)
3110 00:44:38.658628 3 6 28 |4646 2020 |(0 0)(11 11) |(0 0)(0 0)| 0
3111 00:44:38.662241 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3112 00:44:38.665231 [Byte 1]First pass (3, 7, 0)
3113 00:44:38.668300 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3114 00:44:38.671787 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3115 00:44:38.674828 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3116 00:44:38.678282 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3117 00:44:38.684552 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3118 00:44:38.687873 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3119 00:44:38.691247 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3120 00:44:38.694719 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3121 00:44:38.701208 All bytes gating window > 1UI, Early break!
3122 00:44:38.701306
3123 00:44:38.704467 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
3124 00:44:38.704602
3125 00:44:38.708164 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3126 00:44:38.708596
3127 00:44:38.709092
3128 00:44:38.709609
3129 00:44:38.711318 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3130 00:44:38.711637
3131 00:44:38.714480 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3132 00:44:38.718173
3133 00:44:38.718576
3134 00:44:38.719070 Write Rank1 MR1 =0x56
3135 00:44:38.719558
3136 00:44:38.721397 best RODT dly(2T, 0.5T) = (2, 3)
3137 00:44:38.721733
3138 00:44:38.724223 best RODT dly(2T, 0.5T) = (2, 3)
3139 00:44:38.724637 ==
3140 00:44:38.730789 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3141 00:44:38.734194 fsp= 1, odt_onoff= 1, Byte mode= 0
3142 00:44:38.734554 ==
3143 00:44:38.737182 Start DQ dly to find pass range UseTestEngine =0
3144 00:44:38.740719 x-axis: bit #, y-axis: DQ dly (-127~63)
3145 00:44:38.743865 RX Vref Scan = 0
3146 00:44:38.744173 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3147 00:44:38.746990 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3148 00:44:38.750125 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3149 00:44:38.753596 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3150 00:44:38.757120 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3151 00:44:38.760174 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3152 00:44:38.763072 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3153 00:44:38.766502 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3154 00:44:38.769753 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3155 00:44:38.773152 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3156 00:44:38.773235 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3157 00:44:38.776391 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3158 00:44:38.779717 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3159 00:44:38.782769 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3160 00:44:38.786443 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3161 00:44:38.789539 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3162 00:44:38.792686 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3163 00:44:38.796006 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3164 00:44:38.799131 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3165 00:44:38.799227 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3166 00:44:38.802488 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3167 00:44:38.805616 -5, [0] xxxxxxxx xxxxxxxo [MSB]
3168 00:44:38.808945 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3169 00:44:38.812463 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3170 00:44:38.815487 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3171 00:44:38.818802 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3172 00:44:38.822071 0, [0] xxxoxxxx ooxxxxxo [MSB]
3173 00:44:38.822166 1, [0] xxxoxxxx ooxxxxxo [MSB]
3174 00:44:38.825294 2, [0] xxxoxxxx ooxxoxxo [MSB]
3175 00:44:38.828647 3, [0] xxooxxxo oooxoxxo [MSB]
3176 00:44:38.832098 4, [0] xooooxxo oooooooo [MSB]
3177 00:44:38.835155 32, [0] oooooooo ooooooox [MSB]
3178 00:44:38.838690 33, [0] oooooooo ooooooox [MSB]
3179 00:44:38.842040 34, [0] oooooooo ooooooox [MSB]
3180 00:44:38.842371 35, [0] ooxxoooo oxooooox [MSB]
3181 00:44:38.845184 36, [0] ooxxoooo xxooooox [MSB]
3182 00:44:38.848390 37, [0] ooxxoooo xxooooox [MSB]
3183 00:44:38.851634 38, [0] ooxxoooo xxooooox [MSB]
3184 00:44:38.855019 39, [0] oxxxooox xxooooox [MSB]
3185 00:44:38.858464 40, [0] oxxxooox xxxxxoox [MSB]
3186 00:44:38.861256 41, [0] oxxxxoxx xxxxxoox [MSB]
3187 00:44:38.864804 42, [0] xxxxxoxx xxxxxxxx [MSB]
3188 00:44:38.865070 43, [0] xxxxxxxx xxxxxxxx [MSB]
3189 00:44:38.868195 iDelay=43, Bit 0, Center 23 (5 ~ 41) 37
3190 00:44:38.874399 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
3191 00:44:38.877881 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3192 00:44:38.880791 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
3193 00:44:38.884259 iDelay=43, Bit 4, Center 22 (4 ~ 40) 37
3194 00:44:38.887710 iDelay=43, Bit 5, Center 23 (5 ~ 42) 38
3195 00:44:38.890894 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3196 00:44:38.894110 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3197 00:44:38.897154 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
3198 00:44:38.900592 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
3199 00:44:38.903847 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3200 00:44:38.907423 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3201 00:44:38.913615 iDelay=43, Bit 12, Center 20 (2 ~ 39) 38
3202 00:44:38.917240 iDelay=43, Bit 13, Center 22 (4 ~ 41) 38
3203 00:44:38.920206 iDelay=43, Bit 14, Center 22 (4 ~ 41) 38
3204 00:44:38.923721 iDelay=43, Bit 15, Center 13 (-5 ~ 31) 37
3205 00:44:38.924056 ==
3206 00:44:38.930324 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3207 00:44:38.930706 fsp= 1, odt_onoff= 1, Byte mode= 0
3208 00:44:38.933539 ==
3209 00:44:38.933906 DQS Delay:
3210 00:44:38.934322 DQS0 = 0, DQS1 = 0
3211 00:44:38.936818 DQM Delay:
3212 00:44:38.937154 DQM0 = 20, DQM1 = 19
3213 00:44:38.939809 DQ Delay:
3214 00:44:38.943170 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3215 00:44:38.943504 DQ4 =22, DQ5 =23, DQ6 =22, DQ7 =20
3216 00:44:38.946505 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =21
3217 00:44:38.952804 DQ12 =20, DQ13 =22, DQ14 =22, DQ15 =13
3218 00:44:38.953000
3219 00:44:38.953231
3220 00:44:38.953482 DramC Write-DBI off
3221 00:44:38.953721 ==
3222 00:44:38.959437 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3223 00:44:38.963010 fsp= 1, odt_onoff= 1, Byte mode= 0
3224 00:44:38.963144 ==
3225 00:44:38.966089 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3226 00:44:38.966223
3227 00:44:38.969232 Begin, DQ Scan Range 926~1182
3228 00:44:38.969366
3229 00:44:38.969484
3230 00:44:38.972497 TX Vref Scan disable
3231 00:44:38.975887 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3232 00:44:38.979067 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3233 00:44:38.982221 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3234 00:44:38.985604 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3235 00:44:38.989136 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3236 00:44:38.992271 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3237 00:44:38.995564 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3238 00:44:38.998864 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3239 00:44:39.002062 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3240 00:44:39.008682 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3241 00:44:39.012101 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3242 00:44:39.015258 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3243 00:44:39.018449 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3244 00:44:39.021500 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3245 00:44:39.024864 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3246 00:44:39.028393 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3247 00:44:39.031823 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3248 00:44:39.034668 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3249 00:44:39.038683 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3250 00:44:39.041471 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3251 00:44:39.044858 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3252 00:44:39.047944 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3253 00:44:39.054661 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3254 00:44:39.057826 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3255 00:44:39.061264 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3256 00:44:39.064371 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3257 00:44:39.067430 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3258 00:44:39.070962 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3259 00:44:39.074112 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3260 00:44:39.077213 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3261 00:44:39.080662 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3262 00:44:39.083844 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3263 00:44:39.087447 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3264 00:44:39.090892 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3265 00:44:39.094043 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3266 00:44:39.100483 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3267 00:44:39.103696 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3268 00:44:39.107007 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3269 00:44:39.110472 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3270 00:44:39.113583 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3271 00:44:39.116631 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3272 00:44:39.119995 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3273 00:44:39.123260 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3274 00:44:39.126595 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3275 00:44:39.129461 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3276 00:44:39.133101 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3277 00:44:39.136209 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3278 00:44:39.139596 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3279 00:44:39.142587 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3280 00:44:39.146011 975 |3 6 15|[0] xxxxxxxx xxxxxxxo [MSB]
3281 00:44:39.152464 976 |3 6 16|[0] xxxxxxxx xoxxxxxo [MSB]
3282 00:44:39.155978 977 |3 6 17|[0] xxxxxxxx oooxxxoo [MSB]
3283 00:44:39.159138 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3284 00:44:39.162194 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3285 00:44:39.165545 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3286 00:44:39.168737 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3287 00:44:39.172205 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3288 00:44:39.175417 983 |3 6 23|[0] xxoooxoo oooooooo [MSB]
3289 00:44:39.181732 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3290 00:44:39.185110 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3291 00:44:39.188730 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3292 00:44:39.191534 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3293 00:44:39.194967 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3294 00:44:39.198052 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3295 00:44:39.201515 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3296 00:44:39.204579 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3297 00:44:39.207985 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3298 00:44:39.211624 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3299 00:44:39.218192 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3300 00:44:39.220996 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3301 00:44:39.224311 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3302 00:44:39.227616 1005 |3 6 45|[0] ooxxooox xxxxxxxx [MSB]
3303 00:44:39.230656 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3304 00:44:39.234094 Byte0, DQ PI dly=992, DQM PI dly= 992
3305 00:44:39.237403 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3306 00:44:39.237869
3307 00:44:39.244247 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3308 00:44:39.244601
3309 00:44:39.247445 Byte1, DQ PI dly=985, DQM PI dly= 985
3310 00:44:39.250544 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3311 00:44:39.250909
3312 00:44:39.253835 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3313 00:44:39.254187
3314 00:44:39.257210 ==
3315 00:44:39.260433 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3316 00:44:39.263649 fsp= 1, odt_onoff= 1, Byte mode= 0
3317 00:44:39.264002 ==
3318 00:44:39.267033 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3319 00:44:39.267383
3320 00:44:39.270375 Begin, DQ Scan Range 961~1025
3321 00:44:39.273498 Write Rank1 MR14 =0x0
3322 00:44:39.281281
3323 00:44:39.281567 CH=1, VrefRange= 0, VrefLevel = 0
3324 00:44:39.288009 TX Bit0 (985~1001) 17 993, Bit8 (979~990) 12 984,
3325 00:44:39.291099 TX Bit1 (985~999) 15 992, Bit9 (978~989) 12 983,
3326 00:44:39.297654 TX Bit2 (983~997) 15 990, Bit10 (979~993) 15 986,
3327 00:44:39.300873 TX Bit3 (981~993) 13 987, Bit11 (981~993) 13 987,
3328 00:44:39.304322 TX Bit4 (984~1000) 17 992, Bit12 (983~991) 9 987,
3329 00:44:39.310502 TX Bit5 (985~1001) 17 993, Bit13 (982~994) 13 988,
3330 00:44:39.313740 TX Bit6 (985~999) 15 992, Bit14 (980~992) 13 986,
3331 00:44:39.320110 TX Bit7 (985~998) 14 991, Bit15 (975~985) 11 980,
3332 00:44:39.320201
3333 00:44:39.320272 Write Rank1 MR14 =0x2
3334 00:44:39.330014
3335 00:44:39.330104 CH=1, VrefRange= 0, VrefLevel = 2
3336 00:44:39.336523 TX Bit0 (985~1003) 19 994, Bit8 (978~991) 14 984,
3337 00:44:39.339637 TX Bit1 (985~999) 15 992, Bit9 (977~990) 14 983,
3338 00:44:39.346291 TX Bit2 (983~998) 16 990, Bit10 (978~994) 17 986,
3339 00:44:39.349599 TX Bit3 (980~995) 16 987, Bit11 (980~994) 15 987,
3340 00:44:39.353169 TX Bit4 (984~1000) 17 992, Bit12 (982~992) 11 987,
3341 00:44:39.359573 TX Bit5 (985~1002) 18 993, Bit13 (981~995) 15 988,
3342 00:44:39.363276 TX Bit6 (985~1000) 16 992, Bit14 (979~993) 15 986,
3343 00:44:39.369356 TX Bit7 (985~998) 14 991, Bit15 (975~986) 12 980,
3344 00:44:39.369751
3345 00:44:39.370033 Write Rank1 MR14 =0x4
3346 00:44:39.379134
3347 00:44:39.379483 CH=1, VrefRange= 0, VrefLevel = 4
3348 00:44:39.385506 TX Bit0 (985~1003) 19 994, Bit8 (978~991) 14 984,
3349 00:44:39.388708 TX Bit1 (985~1000) 16 992, Bit9 (976~990) 15 983,
3350 00:44:39.395178 TX Bit2 (983~998) 16 990, Bit10 (978~995) 18 986,
3351 00:44:39.398537 TX Bit3 (979~996) 18 987, Bit11 (979~995) 17 987,
3352 00:44:39.401924 TX Bit4 (984~1001) 18 992, Bit12 (980~993) 14 986,
3353 00:44:39.408377 TX Bit5 (985~1002) 18 993, Bit13 (981~996) 16 988,
3354 00:44:39.412219 TX Bit6 (984~1001) 18 992, Bit14 (979~993) 15 986,
3355 00:44:39.418078 TX Bit7 (984~999) 16 991, Bit15 (975~987) 13 981,
3356 00:44:39.418334
3357 00:44:39.418533 Write Rank1 MR14 =0x6
3358 00:44:39.428083
3359 00:44:39.428245 CH=1, VrefRange= 0, VrefLevel = 6
3360 00:44:39.434629 TX Bit0 (985~1004) 20 994, Bit8 (978~991) 14 984,
3361 00:44:39.438217 TX Bit1 (984~1001) 18 992, Bit9 (977~991) 15 984,
3362 00:44:39.444577 TX Bit2 (982~999) 18 990, Bit10 (978~995) 18 986,
3363 00:44:39.447976 TX Bit3 (980~996) 17 988, Bit11 (980~995) 16 987,
3364 00:44:39.451264 TX Bit4 (984~1001) 18 992, Bit12 (980~993) 14 986,
3365 00:44:39.457461 TX Bit5 (985~1003) 19 994, Bit13 (980~997) 18 988,
3366 00:44:39.460855 TX Bit6 (984~1001) 18 992, Bit14 (978~994) 17 986,
3367 00:44:39.467649 TX Bit7 (984~1000) 17 992, Bit15 (975~989) 15 982,
3368 00:44:39.467814
3369 00:44:39.467941 Write Rank1 MR14 =0x8
3370 00:44:39.477410
3371 00:44:39.477586 CH=1, VrefRange= 0, VrefLevel = 8
3372 00:44:39.484139 TX Bit0 (984~1005) 22 994, Bit8 (977~991) 15 984,
3373 00:44:39.488066 TX Bit1 (984~1002) 19 993, Bit9 (977~991) 15 984,
3374 00:44:39.493974 TX Bit2 (982~999) 18 990, Bit10 (978~996) 19 987,
3375 00:44:39.497360 TX Bit3 (979~997) 19 988, Bit11 (979~996) 18 987,
3376 00:44:39.503875 TX Bit4 (984~1002) 19 993, Bit12 (980~994) 15 987,
3377 00:44:39.507099 TX Bit5 (984~1004) 21 994, Bit13 (980~998) 19 989,
3378 00:44:39.510401 TX Bit6 (984~1002) 19 993, Bit14 (978~995) 18 986,
3379 00:44:39.516874 TX Bit7 (984~1000) 17 992, Bit15 (974~990) 17 982,
3380 00:44:39.517339
3381 00:44:39.517679 Write Rank1 MR14 =0xa
3382 00:44:39.527256
3383 00:44:39.530212 CH=1, VrefRange= 0, VrefLevel = 10
3384 00:44:39.533492 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3385 00:44:39.536908 TX Bit1 (983~1002) 20 992, Bit9 (976~991) 16 983,
3386 00:44:39.543438 TX Bit2 (982~1000) 19 991, Bit10 (977~997) 21 987,
3387 00:44:39.547079 TX Bit3 (978~997) 20 987, Bit11 (978~998) 21 988,
3388 00:44:39.553379 TX Bit4 (983~1003) 21 993, Bit12 (979~995) 17 987,
3389 00:44:39.556556 TX Bit5 (984~1004) 21 994, Bit13 (979~998) 20 988,
3390 00:44:39.559992 TX Bit6 (984~1003) 20 993, Bit14 (978~995) 18 986,
3391 00:44:39.566292 TX Bit7 (984~1001) 18 992, Bit15 (974~990) 17 982,
3392 00:44:39.566500
3393 00:44:39.566682 Write Rank1 MR14 =0xc
3394 00:44:39.576849
3395 00:44:39.579906 CH=1, VrefRange= 0, VrefLevel = 12
3396 00:44:39.583561 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3397 00:44:39.586384 TX Bit1 (983~1004) 22 993, Bit9 (976~992) 17 984,
3398 00:44:39.593127 TX Bit2 (981~1001) 21 991, Bit10 (977~998) 22 987,
3399 00:44:39.596553 TX Bit3 (979~997) 19 988, Bit11 (978~998) 21 988,
3400 00:44:39.602685 TX Bit4 (983~1004) 22 993, Bit12 (979~997) 19 988,
3401 00:44:39.606070 TX Bit5 (984~1005) 22 994, Bit13 (979~998) 20 988,
3402 00:44:39.609246 TX Bit6 (983~1004) 22 993, Bit14 (978~997) 20 987,
3403 00:44:39.616220 TX Bit7 (984~1002) 19 993, Bit15 (974~991) 18 982,
3404 00:44:39.616571
3405 00:44:39.616846 Write Rank1 MR14 =0xe
3406 00:44:39.626798
3407 00:44:39.629755 CH=1, VrefRange= 0, VrefLevel = 14
3408 00:44:39.633019 TX Bit0 (984~1005) 22 994, Bit8 (976~993) 18 984,
3409 00:44:39.636350 TX Bit1 (983~1004) 22 993, Bit9 (976~992) 17 984,
3410 00:44:39.642647 TX Bit2 (981~1001) 21 991, Bit10 (977~998) 22 987,
3411 00:44:39.646067 TX Bit3 (978~998) 21 988, Bit11 (978~998) 21 988,
3412 00:44:39.652428 TX Bit4 (982~1004) 23 993, Bit12 (979~997) 19 988,
3413 00:44:39.655728 TX Bit5 (984~1005) 22 994, Bit13 (979~999) 21 989,
3414 00:44:39.659197 TX Bit6 (983~1004) 22 993, Bit14 (978~997) 20 987,
3415 00:44:39.665508 TX Bit7 (984~1002) 19 993, Bit15 (973~991) 19 982,
3416 00:44:39.665726
3417 00:44:39.668570 Write Rank1 MR14 =0x10
3418 00:44:39.676492
3419 00:44:39.679642 CH=1, VrefRange= 0, VrefLevel = 16
3420 00:44:39.682849 TX Bit0 (984~1006) 23 995, Bit8 (976~993) 18 984,
3421 00:44:39.686539 TX Bit1 (983~1005) 23 994, Bit9 (976~992) 17 984,
3422 00:44:39.693176 TX Bit2 (981~1002) 22 991, Bit10 (977~999) 23 988,
3423 00:44:39.696005 TX Bit3 (978~999) 22 988, Bit11 (978~999) 22 988,
3424 00:44:39.702884 TX Bit4 (982~1005) 24 993, Bit12 (978~997) 20 987,
3425 00:44:39.705854 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3426 00:44:39.709224 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
3427 00:44:39.716109 TX Bit7 (983~1003) 21 993, Bit15 (973~991) 19 982,
3428 00:44:39.716476
3429 00:44:39.716756 Write Rank1 MR14 =0x12
3430 00:44:39.726506
3431 00:44:39.729720 CH=1, VrefRange= 0, VrefLevel = 18
3432 00:44:39.732804 TX Bit0 (984~1006) 23 995, Bit8 (976~994) 19 985,
3433 00:44:39.736000 TX Bit1 (982~1005) 24 993, Bit9 (975~993) 19 984,
3434 00:44:39.742631 TX Bit2 (979~1003) 25 991, Bit10 (976~999) 24 987,
3435 00:44:39.746018 TX Bit3 (978~999) 22 988, Bit11 (978~999) 22 988,
3436 00:44:39.752496 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3437 00:44:39.755690 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3438 00:44:39.758993 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
3439 00:44:39.765501 TX Bit7 (983~1004) 22 993, Bit15 (972~992) 21 982,
3440 00:44:39.765955
3441 00:44:39.766345 Write Rank1 MR14 =0x14
3442 00:44:39.775986
3443 00:44:39.779352 CH=1, VrefRange= 0, VrefLevel = 20
3444 00:44:39.782657 TX Bit0 (983~1006) 24 994, Bit8 (976~995) 20 985,
3445 00:44:39.786068 TX Bit1 (982~1005) 24 993, Bit9 (975~994) 20 984,
3446 00:44:39.792598 TX Bit2 (979~1003) 25 991, Bit10 (976~999) 24 987,
3447 00:44:39.796003 TX Bit3 (978~999) 22 988, Bit11 (977~999) 23 988,
3448 00:44:39.802558 TX Bit4 (981~1005) 25 993, Bit12 (978~998) 21 988,
3449 00:44:39.805893 TX Bit5 (983~1006) 24 994, Bit13 (978~1000) 23 989,
3450 00:44:39.809019 TX Bit6 (982~1005) 24 993, Bit14 (977~998) 22 987,
3451 00:44:39.815863 TX Bit7 (983~1005) 23 994, Bit15 (972~992) 21 982,
3452 00:44:39.816217
3453 00:44:39.818714 Write Rank1 MR14 =0x16
3454 00:44:39.826272
3455 00:44:39.829651 CH=1, VrefRange= 0, VrefLevel = 22
3456 00:44:39.832899 TX Bit0 (983~1006) 24 994, Bit8 (976~996) 21 986,
3457 00:44:39.836066 TX Bit1 (982~1005) 24 993, Bit9 (975~994) 20 984,
3458 00:44:39.842620 TX Bit2 (979~1004) 26 991, Bit10 (976~999) 24 987,
3459 00:44:39.845818 TX Bit3 (977~1000) 24 988, Bit11 (977~1000) 24 988,
3460 00:44:39.852337 TX Bit4 (981~1005) 25 993, Bit12 (977~999) 23 988,
3461 00:44:39.855785 TX Bit5 (983~1006) 24 994, Bit13 (978~1000) 23 989,
3462 00:44:39.858650 TX Bit6 (982~1005) 24 993, Bit14 (977~999) 23 988,
3463 00:44:39.865346 TX Bit7 (982~1005) 24 993, Bit15 (971~992) 22 981,
3464 00:44:39.865629
3465 00:44:39.868614 wait MRW command Rank1 MR14 =0x18 fired (1)
3466 00:44:39.872009 Write Rank1 MR14 =0x18
3467 00:44:39.880042
3468 00:44:39.883445 CH=1, VrefRange= 0, VrefLevel = 24
3469 00:44:39.886607 TX Bit0 (984~1006) 23 995, Bit8 (976~997) 22 986,
3470 00:44:39.889854 TX Bit1 (982~1006) 25 994, Bit9 (975~995) 21 985,
3471 00:44:39.896541 TX Bit2 (979~1004) 26 991, Bit10 (976~1000) 25 988,
3472 00:44:39.899829 TX Bit3 (977~1000) 24 988, Bit11 (977~1000) 24 988,
3473 00:44:39.906312 TX Bit4 (981~1005) 25 993, Bit12 (977~999) 23 988,
3474 00:44:39.909545 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3475 00:44:39.912882 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
3476 00:44:39.919261 TX Bit7 (982~1005) 24 993, Bit15 (971~993) 23 982,
3477 00:44:39.919509
3478 00:44:39.922598 Write Rank1 MR14 =0x1a
3479 00:44:39.930516
3480 00:44:39.933636 CH=1, VrefRange= 0, VrefLevel = 26
3481 00:44:39.936976 TX Bit0 (983~1007) 25 995, Bit8 (975~997) 23 986,
3482 00:44:39.940335 TX Bit1 (981~1006) 26 993, Bit9 (975~996) 22 985,
3483 00:44:39.947084 TX Bit2 (979~1005) 27 992, Bit10 (976~1000) 25 988,
3484 00:44:39.950309 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3485 00:44:39.956767 TX Bit4 (980~1006) 27 993, Bit12 (977~999) 23 988,
3486 00:44:39.960591 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3487 00:44:39.963133 TX Bit6 (982~1006) 25 994, Bit14 (977~999) 23 988,
3488 00:44:39.970005 TX Bit7 (981~1005) 25 993, Bit15 (970~994) 25 982,
3489 00:44:39.970254
3490 00:44:39.972934 Write Rank1 MR14 =0x1c
3491 00:44:39.980915
3492 00:44:39.984256 CH=1, VrefRange= 0, VrefLevel = 28
3493 00:44:39.987393 TX Bit0 (983~1007) 25 995, Bit8 (975~998) 24 986,
3494 00:44:39.990773 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3495 00:44:39.997191 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3496 00:44:40.000689 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3497 00:44:40.007064 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3498 00:44:40.010416 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3499 00:44:40.016978 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3500 00:44:40.020316 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3501 00:44:40.020567
3502 00:44:40.023203 Write Rank1 MR14 =0x1e
3503 00:44:40.031513
3504 00:44:40.034709 CH=1, VrefRange= 0, VrefLevel = 30
3505 00:44:40.037939 TX Bit0 (983~1007) 25 995, Bit8 (975~998) 24 986,
3506 00:44:40.041272 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3507 00:44:40.047720 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3508 00:44:40.051213 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3509 00:44:40.057546 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3510 00:44:40.060797 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3511 00:44:40.067355 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3512 00:44:40.070804 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3513 00:44:40.071163
3514 00:44:40.073681 Write Rank1 MR14 =0x20
3515 00:44:40.081851
3516 00:44:40.085281 CH=1, VrefRange= 0, VrefLevel = 32
3517 00:44:40.088194 TX Bit0 (983~1007) 25 995, Bit8 (975~998) 24 986,
3518 00:44:40.091666 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3519 00:44:40.098107 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3520 00:44:40.101764 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3521 00:44:40.107947 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3522 00:44:40.111404 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3523 00:44:40.117676 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3524 00:44:40.121365 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3525 00:44:40.121652
3526 00:44:40.124084 Write Rank1 MR14 =0x22
3527 00:44:40.132316
3528 00:44:40.135628 CH=1, VrefRange= 0, VrefLevel = 34
3529 00:44:40.139139 TX Bit0 (983~1007) 25 995, Bit8 (975~998) 24 986,
3530 00:44:40.142065 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3531 00:44:40.148690 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3532 00:44:40.152069 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3533 00:44:40.158326 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3534 00:44:40.161764 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3535 00:44:40.168187 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3536 00:44:40.171669 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3537 00:44:40.171868
3538 00:44:40.174733 Write Rank1 MR14 =0x24
3539 00:44:40.182657
3540 00:44:40.186056 CH=1, VrefRange= 0, VrefLevel = 36
3541 00:44:40.189127 TX Bit0 (983~1007) 25 995, Bit8 (975~998) 24 986,
3542 00:44:40.192601 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3543 00:44:40.198977 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3544 00:44:40.202071 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3545 00:44:40.208711 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3546 00:44:40.212299 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3547 00:44:40.218627 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3548 00:44:40.221873 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3549 00:44:40.221965
3550 00:44:40.224930 Write Rank1 MR14 =0x26
3551 00:44:40.232915
3552 00:44:40.236155 CH=1, VrefRange= 0, VrefLevel = 38
3553 00:44:40.239424 TX Bit0 (983~1007) 25 995, Bit8 (975~998) 24 986,
3554 00:44:40.242674 TX Bit1 (980~1006) 27 993, Bit9 (974~997) 24 985,
3555 00:44:40.249374 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3556 00:44:40.252818 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3557 00:44:40.259152 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3558 00:44:40.262301 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3559 00:44:40.268927 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3560 00:44:40.272113 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3561 00:44:40.272205
3562 00:44:40.272277
3563 00:44:40.275592 TX Vref found, early break! 370< 382
3564 00:44:40.278841 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3565 00:44:40.281978 u1DelayCellOfst[0]=7 cells (6 PI)
3566 00:44:40.285394 u1DelayCellOfst[1]=5 cells (4 PI)
3567 00:44:40.288570 u1DelayCellOfst[2]=2 cells (2 PI)
3568 00:44:40.291928 u1DelayCellOfst[3]=0 cells (0 PI)
3569 00:44:40.295099 u1DelayCellOfst[4]=5 cells (4 PI)
3570 00:44:40.298420 u1DelayCellOfst[5]=6 cells (5 PI)
3571 00:44:40.301747 u1DelayCellOfst[6]=5 cells (4 PI)
3572 00:44:40.304972 u1DelayCellOfst[7]=5 cells (4 PI)
3573 00:44:40.308141 Byte0, DQ PI dly=989, DQM PI dly= 992
3574 00:44:40.311329 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3575 00:44:40.311421
3576 00:44:40.317898 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3577 00:44:40.317989
3578 00:44:40.321268 u1DelayCellOfst[8]=5 cells (4 PI)
3579 00:44:40.321359 u1DelayCellOfst[9]=3 cells (3 PI)
3580 00:44:40.324422 u1DelayCellOfst[10]=6 cells (5 PI)
3581 00:44:40.327891 u1DelayCellOfst[11]=7 cells (6 PI)
3582 00:44:40.331150 u1DelayCellOfst[12]=7 cells (6 PI)
3583 00:44:40.334246 u1DelayCellOfst[13]=7 cells (6 PI)
3584 00:44:40.337535 u1DelayCellOfst[14]=7 cells (6 PI)
3585 00:44:40.340836 u1DelayCellOfst[15]=0 cells (0 PI)
3586 00:44:40.344106 Byte1, DQ PI dly=982, DQM PI dly= 985
3587 00:44:40.350550 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3588 00:44:40.350643
3589 00:44:40.353764 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3590 00:44:40.353856
3591 00:44:40.357275 Write Rank1 MR14 =0x1c
3592 00:44:40.357365
3593 00:44:40.357443 Final TX Range 0 Vref 28
3594 00:44:40.357512
3595 00:44:40.363750 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3596 00:44:40.363842
3597 00:44:40.370269 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3598 00:44:40.376941 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3599 00:44:40.386482 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3600 00:44:40.386677 Write Rank1 MR3 =0xb0
3601 00:44:40.389994 DramC Write-DBI on
3602 00:44:40.390135 ==
3603 00:44:40.393017 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3604 00:44:40.396269 fsp= 1, odt_onoff= 1, Byte mode= 0
3605 00:44:40.396398 ==
3606 00:44:40.402859 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3607 00:44:40.403015
3608 00:44:40.406290 Begin, DQ Scan Range 705~769
3609 00:44:40.406420
3610 00:44:40.406523
3611 00:44:40.406620 TX Vref Scan disable
3612 00:44:40.409545 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3613 00:44:40.412875 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3614 00:44:40.416314 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3615 00:44:40.419309 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3616 00:44:40.425717 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3617 00:44:40.429097 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3618 00:44:40.432520 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3619 00:44:40.436055 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3620 00:44:40.439038 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3621 00:44:40.442203 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3622 00:44:40.445701 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3623 00:44:40.448864 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3624 00:44:40.452305 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3625 00:44:40.455715 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3626 00:44:40.459003 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3627 00:44:40.462346 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3628 00:44:40.465563 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3629 00:44:40.468924 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3630 00:44:40.475524 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3631 00:44:40.478522 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3632 00:44:40.485227 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3633 00:44:40.488510 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3634 00:44:40.491870 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3635 00:44:40.495043 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3636 00:44:40.498294 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3637 00:44:40.501871 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3638 00:44:40.505267 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3639 00:44:40.508084 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3640 00:44:40.511215 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3641 00:44:40.514409 Byte0, DQ PI dly=737, DQM PI dly= 737
3642 00:44:40.520926 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3643 00:44:40.521097
3644 00:44:40.524170 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3645 00:44:40.524313
3646 00:44:40.527573 Byte1, DQ PI dly=729, DQM PI dly= 729
3647 00:44:40.530695 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3648 00:44:40.530818
3649 00:44:40.537119 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3650 00:44:40.537219
3651 00:44:40.543719 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3652 00:44:40.550323 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3653 00:44:40.556705 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3654 00:44:40.560289 Write Rank1 MR3 =0x30
3655 00:44:40.560378 DramC Write-DBI off
3656 00:44:40.560447
3657 00:44:40.563366 [DATLAT]
3658 00:44:40.563455 Freq=1600, CH1 RK1, use_rxtx_scan=0
3659 00:44:40.566450
3660 00:44:40.566537 DATLAT Default: 0x10
3661 00:44:40.569851 7, 0xFFFF, sum=0
3662 00:44:40.569940 8, 0xFFFF, sum=0
3663 00:44:40.573269 9, 0xFFFF, sum=0
3664 00:44:40.573361 10, 0xFFFF, sum=0
3665 00:44:40.576424 11, 0xFFFF, sum=0
3666 00:44:40.576515 12, 0xFFFF, sum=0
3667 00:44:40.579867 13, 0xFFFF, sum=0
3668 00:44:40.579958 14, 0x0, sum=1
3669 00:44:40.580031 15, 0x0, sum=2
3670 00:44:40.583273 16, 0x0, sum=3
3671 00:44:40.583364 17, 0x0, sum=4
3672 00:44:40.589609 pattern=2 first_step=14 total pass=5 best_step=16
3673 00:44:40.589700 ==
3674 00:44:40.592781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3675 00:44:40.595909 fsp= 1, odt_onoff= 1, Byte mode= 0
3676 00:44:40.596000 ==
3677 00:44:40.602564 Start DQ dly to find pass range UseTestEngine =1
3678 00:44:40.605785 x-axis: bit #, y-axis: DQ dly (-127~63)
3679 00:44:40.605877 RX Vref Scan = 0
3680 00:44:40.609239 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3681 00:44:40.612476 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3682 00:44:40.615776 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3683 00:44:40.618785 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3684 00:44:40.622159 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3685 00:44:40.622253 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3686 00:44:40.625390 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3687 00:44:40.629193 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3688 00:44:40.632007 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3689 00:44:40.635457 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3690 00:44:40.638490 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3691 00:44:40.642039 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3692 00:44:40.645136 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3693 00:44:40.648165 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3694 00:44:40.651824 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3695 00:44:40.651920 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3696 00:44:40.655040 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3697 00:44:40.658378 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3698 00:44:40.661301 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3699 00:44:40.664808 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3700 00:44:40.668093 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3701 00:44:40.671302 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3702 00:44:40.674888 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3703 00:44:40.674984 -3, [0] xxxxxxxx xoxxxxxo [MSB]
3704 00:44:40.677901 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3705 00:44:40.681114 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3706 00:44:40.684283 0, [0] xxxoxxxx ooxxxxxo [MSB]
3707 00:44:40.687628 1, [0] xxxoxxxx ooxxxxxo [MSB]
3708 00:44:40.690873 2, [0] xxxoxxxx oooxxxxo [MSB]
3709 00:44:40.694217 3, [0] ooooxxxo ooooooxo [MSB]
3710 00:44:40.694314 4, [0] oooooxxo oooooooo [MSB]
3711 00:44:40.697393 5, [0] ooooooxo oooooooo [MSB]
3712 00:44:40.702081 32, [0] oooooooo ooooooox [MSB]
3713 00:44:40.705395 33, [0] oooooooo ooooooox [MSB]
3714 00:44:40.708554 34, [0] oooxoooo oxooooox [MSB]
3715 00:44:40.711622 35, [0] ooxxoooo oxooooox [MSB]
3716 00:44:40.714838 36, [0] ooxxoooo xxooooox [MSB]
3717 00:44:40.718211 37, [0] ooxxoooo xxooooox [MSB]
3718 00:44:40.721398 38, [0] ooxxoooo xxooxoox [MSB]
3719 00:44:40.721500 39, [0] ooxxooox xxxxxoox [MSB]
3720 00:44:40.724737 40, [0] oxxxxoox xxxxxxox [MSB]
3721 00:44:40.728051 41, [0] xxxxxxxx xxxxxxxx [MSB]
3722 00:44:40.731287 iDelay=41, Bit 0, Center 21 (3 ~ 40) 38
3723 00:44:40.734538 iDelay=41, Bit 1, Center 21 (3 ~ 39) 37
3724 00:44:40.737897 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3725 00:44:40.744596 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3726 00:44:40.747698 iDelay=41, Bit 4, Center 21 (4 ~ 39) 36
3727 00:44:40.750836 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3728 00:44:40.754307 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3729 00:44:40.757453 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3730 00:44:40.760649 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3731 00:44:40.764138 iDelay=41, Bit 9, Center 15 (-3 ~ 33) 37
3732 00:44:40.767347 iDelay=41, Bit 10, Center 20 (2 ~ 38) 37
3733 00:44:40.770597 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3734 00:44:40.773895 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3735 00:44:40.777308 iDelay=41, Bit 13, Center 21 (3 ~ 39) 37
3736 00:44:40.783689 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3737 00:44:40.787057 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3738 00:44:40.787149 ==
3739 00:44:40.790169 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3740 00:44:40.793448 fsp= 1, odt_onoff= 1, Byte mode= 0
3741 00:44:40.793538 ==
3742 00:44:40.796982 DQS Delay:
3743 00:44:40.797071 DQS0 = 0, DQS1 = 0
3744 00:44:40.800195 DQM Delay:
3745 00:44:40.800283 DQM0 = 20, DQM1 = 18
3746 00:44:40.800354 DQ Delay:
3747 00:44:40.803366 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =15
3748 00:44:40.806442 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3749 00:44:40.809849 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3750 00:44:40.813095 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3751 00:44:40.813213
3752 00:44:40.813315
3753 00:44:40.816745
3754 00:44:40.816863 [DramC_TX_OE_Calibration] TA2
3755 00:44:40.819807 Original DQ_B0 (3 6) =30, OEN = 27
3756 00:44:40.822956 Original DQ_B1 (3 6) =30, OEN = 27
3757 00:44:40.826470 23, 0x0, End_B0=23 End_B1=23
3758 00:44:40.829403 24, 0x0, End_B0=24 End_B1=24
3759 00:44:40.832986 25, 0x0, End_B0=25 End_B1=25
3760 00:44:40.833079 26, 0x0, End_B0=26 End_B1=26
3761 00:44:40.836200 27, 0x0, End_B0=27 End_B1=27
3762 00:44:40.839334 28, 0x0, End_B0=28 End_B1=28
3763 00:44:40.842865 29, 0x0, End_B0=29 End_B1=29
3764 00:44:40.845944 30, 0x0, End_B0=30 End_B1=30
3765 00:44:40.846036 31, 0xFFFF, End_B0=30 End_B1=30
3766 00:44:40.852496 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3767 00:44:40.859126 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3768 00:44:40.859218
3769 00:44:40.859289
3770 00:44:40.862434 Write Rank1 MR23 =0x3f
3771 00:44:40.862525 [DQSOSC]
3772 00:44:40.868844 [DQSOSCAuto] RK1, (LSB)MR18= 0xb9b9, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3773 00:44:40.875323 CH1_RK1: MR19=0x202, MR18=0xB9B9, DQSOSC=451, MR23=63, INC=12, DEC=18
3774 00:44:40.878629 Write Rank1 MR23 =0x3f
3775 00:44:40.878719 [DQSOSC]
3776 00:44:40.885213 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3777 00:44:40.888434 CH1 RK1: MR19=202, MR18=B7B7
3778 00:44:40.891923 [RxdqsGatingPostProcess] freq 1600
3779 00:44:40.898289 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3780 00:44:40.898378 Rank: 0
3781 00:44:40.901540 best DQS0 dly(2T, 0.5T) = (2, 6)
3782 00:44:40.904692 best DQS1 dly(2T, 0.5T) = (2, 6)
3783 00:44:40.908133 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3784 00:44:40.911476 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3785 00:44:40.911565 Rank: 1
3786 00:44:40.914703 best DQS0 dly(2T, 0.5T) = (2, 6)
3787 00:44:40.917925 best DQS1 dly(2T, 0.5T) = (2, 6)
3788 00:44:40.921217 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3789 00:44:40.924816 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3790 00:44:40.927698 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3791 00:44:40.930954 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3792 00:44:40.937543 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3793 00:44:40.937644
3794 00:44:40.937716
3795 00:44:40.941140 [Calibration Summary] Freqency 1600
3796 00:44:40.941231 CH 0, Rank 0
3797 00:44:40.943989 All Pass.
3798 00:44:40.944079
3799 00:44:40.944150 CH 0, Rank 1
3800 00:44:40.944215 All Pass.
3801 00:44:40.944279
3802 00:44:40.947611 CH 1, Rank 0
3803 00:44:40.947704 All Pass.
3804 00:44:40.947776
3805 00:44:40.947858 CH 1, Rank 1
3806 00:44:40.950720 All Pass.
3807 00:44:40.950835
3808 00:44:40.957233 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3809 00:44:40.963692 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3810 00:44:40.970283 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3811 00:44:40.973736 Write Rank0 MR3 =0xb0
3812 00:44:40.980113 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3813 00:44:40.986655 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3814 00:44:40.993117 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3815 00:44:40.993207 Write Rank1 MR3 =0xb0
3816 00:44:40.999760 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3817 00:44:41.009761 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3818 00:44:41.016382 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3819 00:44:41.016472 Write Rank0 MR3 =0xb0
3820 00:44:41.022841 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3821 00:44:41.029215 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3822 00:44:41.039018 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3823 00:44:41.039109 Write Rank1 MR3 =0xb0
3824 00:44:41.042413 DramC Write-DBI on
3825 00:44:41.045555 [GetDramInforAfterCalByMRR] Vendor 6.
3826 00:44:41.048933 [GetDramInforAfterCalByMRR] Revision 505.
3827 00:44:41.049022 MR8 1111
3828 00:44:41.055531 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3829 00:44:41.055621 MR8 1111
3830 00:44:41.058807 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3831 00:44:41.061883 MR8 1111
3832 00:44:41.065085 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3833 00:44:41.065203 MR8 1111
3834 00:44:41.071684 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3835 00:44:41.081621 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3836 00:44:41.081718 Write Rank0 MR13 =0xd0
3837 00:44:41.084995 Write Rank1 MR13 =0xd0
3838 00:44:41.085084 Write Rank0 MR13 =0xd0
3839 00:44:41.088283 Write Rank1 MR13 =0xd0
3840 00:44:41.091522 Save calibration result to emmc
3841 00:44:41.091627
3842 00:44:41.091710
3843 00:44:41.094830 [DramcModeReg_Check] Freq_1600, FSP_1
3844 00:44:41.098130 FSP_1, CH_0, RK0
3845 00:44:41.098219 Write Rank0 MR13 =0xd8
3846 00:44:41.101412 MR12 = 0x5c (global = 0x5c) match
3847 00:44:41.104736 MR14 = 0x1e (global = 0x1e) match
3848 00:44:41.107659 FSP_1, CH_0, RK1
3849 00:44:41.107747 Write Rank1 MR13 =0xd8
3850 00:44:41.111216 MR12 = 0x5e (global = 0x5e) match
3851 00:44:41.114113 MR14 = 0x1e (global = 0x1e) match
3852 00:44:41.117991 FSP_1, CH_1, RK0
3853 00:44:41.118080 Write Rank0 MR13 =0xd8
3854 00:44:41.120952 MR12 = 0x5e (global = 0x5e) match
3855 00:44:41.124252 MR14 = 0x20 (global = 0x20) match
3856 00:44:41.127585 FSP_1, CH_1, RK1
3857 00:44:41.127675 Write Rank1 MR13 =0xd8
3858 00:44:41.130622 MR12 = 0x60 (global = 0x60) match
3859 00:44:41.133879 MR14 = 0x1c (global = 0x1c) match
3860 00:44:41.133967
3861 00:44:41.140615 [MEM_TEST] 02: After DFS, before run time config
3862 00:44:41.150187 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3863 00:44:41.150277
3864 00:44:41.150347 [TA2_TEST]
3865 00:44:41.150412 === TA2 HW
3866 00:44:41.153415 TA2 PAT: XTALK
3867 00:44:41.156862 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3868 00:44:41.163207 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3869 00:44:41.166722 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3870 00:44:41.173021 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3871 00:44:41.173110
3872 00:44:41.173180
3873 00:44:41.173244 Settings after calibration
3874 00:44:41.176307
3875 00:44:41.176395 [DramcRunTimeConfig]
3876 00:44:41.179924 TransferPLLToSPMControl - MODE SW PHYPLL
3877 00:44:41.182898 TX_TRACKING: ON
3878 00:44:41.183001 RX_TRACKING: ON
3879 00:44:41.183091 HW_GATING: ON
3880 00:44:41.186133 HW_GATING DBG: OFF
3881 00:44:41.186222 ddr_geometry:1
3882 00:44:41.189553 ddr_geometry:1
3883 00:44:41.189642 ddr_geometry:1
3884 00:44:41.192851 ddr_geometry:1
3885 00:44:41.192940 ddr_geometry:1
3886 00:44:41.196228 ddr_geometry:1
3887 00:44:41.196337 ddr_geometry:1
3888 00:44:41.196410 ddr_geometry:1
3889 00:44:41.199328 High Freq DUMMY_READ_FOR_TRACKING: ON
3890 00:44:41.202606 ZQCS_ENABLE_LP4: OFF
3891 00:44:41.206043 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3892 00:44:41.209390 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3893 00:44:41.212387 SPM_CONTROL_AFTERK: ON
3894 00:44:41.212477 IMPEDANCE_TRACKING: ON
3895 00:44:41.215802 TEMP_SENSOR: ON
3896 00:44:41.215893 PER_BANK_REFRESH: ON
3897 00:44:41.219103 HW_SAVE_FOR_SR: ON
3898 00:44:41.222104 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3899 00:44:41.225912 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3900 00:44:41.228802 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3901 00:44:41.228893 Read ODT Tracking: ON
3902 00:44:41.232001 =========================
3903 00:44:41.232092
3904 00:44:41.232163 [TA2_TEST]
3905 00:44:41.235362 === TA2 HW
3906 00:44:41.238699 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3907 00:44:41.245128 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3908 00:44:41.248521 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3909 00:44:41.254894 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3910 00:44:41.254985
3911 00:44:41.257956 [MEM_TEST] 03: After run time config
3912 00:44:41.268230 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3913 00:44:41.271191 [complex_mem_test] start addr:0x40024000, len:131072
3914 00:44:41.475748 1st complex R/W mem test pass
3915 00:44:41.482328 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3916 00:44:41.485565 sync preloader write leveling
3917 00:44:41.488946 sync preloader cbt_mr12
3918 00:44:41.491968 sync preloader cbt_clk_dly
3919 00:44:41.492057 sync preloader cbt_cmd_dly
3920 00:44:41.495151 sync preloader cbt_cs
3921 00:44:41.498527 sync preloader cbt_ca_perbit_delay
3922 00:44:41.502099 sync preloader clk_delay
3923 00:44:41.502187 sync preloader dqs_delay
3924 00:44:41.505066 sync preloader u1Gating2T_Save
3925 00:44:41.508364 sync preloader u1Gating05T_Save
3926 00:44:41.511691 sync preloader u1Gatingfine_tune_Save
3927 00:44:41.515130 sync preloader u1Gatingucpass_count_Save
3928 00:44:41.518691 sync preloader u1TxWindowPerbitVref_Save
3929 00:44:41.521936 sync preloader u1TxCenter_min_Save
3930 00:44:41.524788 sync preloader u1TxCenter_max_Save
3931 00:44:41.528088 sync preloader u1Txwin_center_Save
3932 00:44:41.531169 sync preloader u1Txfirst_pass_Save
3933 00:44:41.534990 sync preloader u1Txlast_pass_Save
3934 00:44:41.537941 sync preloader u1RxDatlat_Save
3935 00:44:41.541028 sync preloader u1RxWinPerbitVref_Save
3936 00:44:41.544458 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3937 00:44:41.547697 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3938 00:44:41.551013 sync preloader delay_cell_unit
3939 00:44:41.557685 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3940 00:44:41.560629 sync preloader write leveling
3941 00:44:41.564066 sync preloader cbt_mr12
3942 00:44:41.564154 sync preloader cbt_clk_dly
3943 00:44:41.567375 sync preloader cbt_cmd_dly
3944 00:44:41.570571 sync preloader cbt_cs
3945 00:44:41.573731 sync preloader cbt_ca_perbit_delay
3946 00:44:41.573822 sync preloader clk_delay
3947 00:44:41.577170 sync preloader dqs_delay
3948 00:44:41.580403 sync preloader u1Gating2T_Save
3949 00:44:41.583789 sync preloader u1Gating05T_Save
3950 00:44:41.587093 sync preloader u1Gatingfine_tune_Save
3951 00:44:41.590201 sync preloader u1Gatingucpass_count_Save
3952 00:44:41.593544 sync preloader u1TxWindowPerbitVref_Save
3953 00:44:41.596862 sync preloader u1TxCenter_min_Save
3954 00:44:41.599983 sync preloader u1TxCenter_max_Save
3955 00:44:41.603405 sync preloader u1Txwin_center_Save
3956 00:44:41.606691 sync preloader u1Txfirst_pass_Save
3957 00:44:41.609957 sync preloader u1Txlast_pass_Save
3958 00:44:41.613564 sync preloader u1RxDatlat_Save
3959 00:44:41.616527 sync preloader u1RxWinPerbitVref_Save
3960 00:44:41.619555 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3961 00:44:41.623005 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3962 00:44:41.626040 sync preloader delay_cell_unit
3963 00:44:41.632650 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3964 00:44:41.636153 sync preloader write leveling
3965 00:44:41.639242 sync preloader cbt_mr12
3966 00:44:41.639333 sync preloader cbt_clk_dly
3967 00:44:41.642504 sync preloader cbt_cmd_dly
3968 00:44:41.645890 sync preloader cbt_cs
3969 00:44:41.649135 sync preloader cbt_ca_perbit_delay
3970 00:44:41.649226 sync preloader clk_delay
3971 00:44:41.652372 sync preloader dqs_delay
3972 00:44:41.655507 sync preloader u1Gating2T_Save
3973 00:44:41.658886 sync preloader u1Gating05T_Save
3974 00:44:41.662076 sync preloader u1Gatingfine_tune_Save
3975 00:44:41.665589 sync preloader u1Gatingucpass_count_Save
3976 00:44:41.668589 sync preloader u1TxWindowPerbitVref_Save
3977 00:44:41.672162 sync preloader u1TxCenter_min_Save
3978 00:44:41.675118 sync preloader u1TxCenter_max_Save
3979 00:44:41.678646 sync preloader u1Txwin_center_Save
3980 00:44:41.681849 sync preloader u1Txfirst_pass_Save
3981 00:44:41.684993 sync preloader u1Txlast_pass_Save
3982 00:44:41.685083 sync preloader u1RxDatlat_Save
3983 00:44:41.688423 sync preloader u1RxWinPerbitVref_Save
3984 00:44:41.694912 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3985 00:44:41.698270 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3986 00:44:41.701686 sync preloader delay_cell_unit
3987 00:44:41.704858 just_for_test_dump_coreboot_params dump all params
3988 00:44:41.708126 dump source = 0x0
3989 00:44:41.708216 dump params frequency:1600
3990 00:44:41.711360 dump params rank number:2
3991 00:44:41.711450
3992 00:44:41.714675 dump params write leveling
3993 00:44:41.717821 write leveling[0][0][0] = 0x1f
3994 00:44:41.721086 write leveling[0][0][1] = 0x1b
3995 00:44:41.721176 write leveling[0][1][0] = 0x1e
3996 00:44:41.724398 write leveling[0][1][1] = 0x19
3997 00:44:41.727732 write leveling[1][0][0] = 0x24
3998 00:44:41.730808 write leveling[1][0][1] = 0x20
3999 00:44:41.734606 write leveling[1][1][0] = 0x23
4000 00:44:41.737692 write leveling[1][1][1] = 0x1e
4001 00:44:41.737782 dump params cbt_cs
4002 00:44:41.740904 cbt_cs[0][0] = 0x6
4003 00:44:41.740993 cbt_cs[0][1] = 0x6
4004 00:44:41.743992 cbt_cs[1][0] = 0xb
4005 00:44:41.744082 cbt_cs[1][1] = 0xb
4006 00:44:41.747216 dump params cbt_mr12
4007 00:44:41.750548 cbt_mr12[0][0] = 0x1c
4008 00:44:41.750638 cbt_mr12[0][1] = 0x1e
4009 00:44:41.753875 cbt_mr12[1][0] = 0x1e
4010 00:44:41.753965 cbt_mr12[1][1] = 0x20
4011 00:44:41.757124 dump params tx window
4012 00:44:41.760698 tx_center_min[0][0][0] = 983
4013 00:44:41.763690 tx_center_max[0][0][0] = 989
4014 00:44:41.763782 tx_center_min[0][0][1] = 978
4015 00:44:41.767143 tx_center_max[0][0][1] = 986
4016 00:44:41.770212 tx_center_min[0][1][0] = 985
4017 00:44:41.773399 tx_center_max[0][1][0] = 991
4018 00:44:41.776896 tx_center_min[0][1][1] = 980
4019 00:44:41.776986 tx_center_max[0][1][1] = 987
4020 00:44:41.780115 tx_center_min[1][0][0] = 989
4021 00:44:41.783615 tx_center_max[1][0][0] = 994
4022 00:44:41.786606 tx_center_min[1][0][1] = 985
4023 00:44:41.789810 tx_center_max[1][0][1] = 991
4024 00:44:41.789901 tx_center_min[1][1][0] = 989
4025 00:44:41.793137 tx_center_max[1][1][0] = 995
4026 00:44:41.796676 tx_center_min[1][1][1] = 982
4027 00:44:41.799952 tx_center_max[1][1][1] = 988
4028 00:44:41.800044 dump params tx window
4029 00:44:41.803102 tx_win_center[0][0][0] = 989
4030 00:44:41.806201 tx_first_pass[0][0][0] = 978
4031 00:44:41.809360 tx_last_pass[0][0][0] = 1001
4032 00:44:41.812686 tx_win_center[0][0][1] = 989
4033 00:44:41.812777 tx_first_pass[0][0][1] = 977
4034 00:44:41.816006 tx_last_pass[0][0][1] = 1001
4035 00:44:41.819364 tx_win_center[0][0][2] = 989
4036 00:44:41.822716 tx_first_pass[0][0][2] = 978
4037 00:44:41.825906 tx_last_pass[0][0][2] = 1001
4038 00:44:41.825997 tx_win_center[0][0][3] = 983
4039 00:44:41.829399 tx_first_pass[0][0][3] = 972
4040 00:44:41.832369 tx_last_pass[0][0][3] = 995
4041 00:44:41.835717 tx_win_center[0][0][4] = 988
4042 00:44:41.839072 tx_first_pass[0][0][4] = 976
4043 00:44:41.839163 tx_last_pass[0][0][4] = 1000
4044 00:44:41.842333 tx_win_center[0][0][5] = 986
4045 00:44:41.845364 tx_first_pass[0][0][5] = 974
4046 00:44:41.849016 tx_last_pass[0][0][5] = 998
4047 00:44:41.849107 tx_win_center[0][0][6] = 987
4048 00:44:41.852189 tx_first_pass[0][0][6] = 976
4049 00:44:41.855305 tx_last_pass[0][0][6] = 999
4050 00:44:41.858740 tx_win_center[0][0][7] = 989
4051 00:44:41.861784 tx_first_pass[0][0][7] = 977
4052 00:44:41.861875 tx_last_pass[0][0][7] = 1001
4053 00:44:41.865223 tx_win_center[0][0][8] = 978
4054 00:44:41.868298 tx_first_pass[0][0][8] = 967
4055 00:44:41.872021 tx_last_pass[0][0][8] = 990
4056 00:44:41.874806 tx_win_center[0][0][9] = 980
4057 00:44:41.874956 tx_first_pass[0][0][9] = 969
4058 00:44:41.878385 tx_last_pass[0][0][9] = 992
4059 00:44:41.881638 tx_win_center[0][0][10] = 986
4060 00:44:41.884884 tx_first_pass[0][0][10] = 974
4061 00:44:41.887993 tx_last_pass[0][0][10] = 998
4062 00:44:41.888114 tx_win_center[0][0][11] = 979
4063 00:44:41.891421 tx_first_pass[0][0][11] = 968
4064 00:44:41.894736 tx_last_pass[0][0][11] = 991
4065 00:44:41.897850 tx_win_center[0][0][12] = 981
4066 00:44:41.901203 tx_first_pass[0][0][12] = 970
4067 00:44:41.904476 tx_last_pass[0][0][12] = 993
4068 00:44:41.904563 tx_win_center[0][0][13] = 981
4069 00:44:41.907965 tx_first_pass[0][0][13] = 970
4070 00:44:41.911027 tx_last_pass[0][0][13] = 993
4071 00:44:41.914340 tx_win_center[0][0][14] = 983
4072 00:44:41.917763 tx_first_pass[0][0][14] = 970
4073 00:44:41.917850 tx_last_pass[0][0][14] = 996
4074 00:44:41.920773 tx_win_center[0][0][15] = 985
4075 00:44:41.924185 tx_first_pass[0][0][15] = 973
4076 00:44:41.927318 tx_last_pass[0][0][15] = 998
4077 00:44:41.930855 tx_win_center[0][1][0] = 991
4078 00:44:41.930941 tx_first_pass[0][1][0] = 979
4079 00:44:41.933882 tx_last_pass[0][1][0] = 1004
4080 00:44:41.937024 tx_win_center[0][1][1] = 990
4081 00:44:41.940529 tx_first_pass[0][1][1] = 978
4082 00:44:41.943607 tx_last_pass[0][1][1] = 1002
4083 00:44:41.943694 tx_win_center[0][1][2] = 991
4084 00:44:41.947012 tx_first_pass[0][1][2] = 979
4085 00:44:41.950242 tx_last_pass[0][1][2] = 1003
4086 00:44:41.953353 tx_win_center[0][1][3] = 985
4087 00:44:41.957084 tx_first_pass[0][1][3] = 973
4088 00:44:41.957171 tx_last_pass[0][1][3] = 997
4089 00:44:41.960261 tx_win_center[0][1][4] = 990
4090 00:44:41.963421 tx_first_pass[0][1][4] = 978
4091 00:44:41.966648 tx_last_pass[0][1][4] = 1003
4092 00:44:41.969947 tx_win_center[0][1][5] = 987
4093 00:44:41.970034 tx_first_pass[0][1][5] = 976
4094 00:44:41.973402 tx_last_pass[0][1][5] = 999
4095 00:44:41.976354 tx_win_center[0][1][6] = 988
4096 00:44:41.979821 tx_first_pass[0][1][6] = 977
4097 00:44:41.983053 tx_last_pass[0][1][6] = 1000
4098 00:44:41.983143 tx_win_center[0][1][7] = 990
4099 00:44:41.986517 tx_first_pass[0][1][7] = 978
4100 00:44:41.989414 tx_last_pass[0][1][7] = 1003
4101 00:44:41.992650 tx_win_center[0][1][8] = 980
4102 00:44:41.996274 tx_first_pass[0][1][8] = 968
4103 00:44:41.996366 tx_last_pass[0][1][8] = 992
4104 00:44:41.999328 tx_win_center[0][1][9] = 982
4105 00:44:42.002624 tx_first_pass[0][1][9] = 970
4106 00:44:42.005933 tx_last_pass[0][1][9] = 994
4107 00:44:42.009142 tx_win_center[0][1][10] = 987
4108 00:44:42.009294 tx_first_pass[0][1][10] = 975
4109 00:44:42.012826 tx_last_pass[0][1][10] = 999
4110 00:44:42.015867 tx_win_center[0][1][11] = 980
4111 00:44:42.019674 tx_first_pass[0][1][11] = 969
4112 00:44:42.022392 tx_last_pass[0][1][11] = 992
4113 00:44:42.022483 tx_win_center[0][1][12] = 983
4114 00:44:42.025852 tx_first_pass[0][1][12] = 971
4115 00:44:42.029029 tx_last_pass[0][1][12] = 995
4116 00:44:42.032158 tx_win_center[0][1][13] = 982
4117 00:44:42.035470 tx_first_pass[0][1][13] = 971
4118 00:44:42.035560 tx_last_pass[0][1][13] = 994
4119 00:44:42.038680 tx_win_center[0][1][14] = 984
4120 00:44:42.041878 tx_first_pass[0][1][14] = 972
4121 00:44:42.045290 tx_last_pass[0][1][14] = 997
4122 00:44:42.048795 tx_win_center[0][1][15] = 986
4123 00:44:42.051870 tx_first_pass[0][1][15] = 975
4124 00:44:42.051963 tx_last_pass[0][1][15] = 998
4125 00:44:42.055048 tx_win_center[1][0][0] = 994
4126 00:44:42.058675 tx_first_pass[1][0][0] = 982
4127 00:44:42.061803 tx_last_pass[1][0][0] = 1007
4128 00:44:42.064787 tx_win_center[1][0][1] = 993
4129 00:44:42.064876 tx_first_pass[1][0][1] = 981
4130 00:44:42.068206 tx_last_pass[1][0][1] = 1006
4131 00:44:42.071449 tx_win_center[1][0][2] = 991
4132 00:44:42.074590 tx_first_pass[1][0][2] = 978
4133 00:44:42.078098 tx_last_pass[1][0][2] = 1005
4134 00:44:42.078188 tx_win_center[1][0][3] = 989
4135 00:44:42.081401 tx_first_pass[1][0][3] = 977
4136 00:44:42.084589 tx_last_pass[1][0][3] = 1001
4137 00:44:42.087961 tx_win_center[1][0][4] = 994
4138 00:44:42.090952 tx_first_pass[1][0][4] = 982
4139 00:44:42.091071 tx_last_pass[1][0][4] = 1006
4140 00:44:42.094243 tx_win_center[1][0][5] = 994
4141 00:44:42.097774 tx_first_pass[1][0][5] = 982
4142 00:44:42.100965 tx_last_pass[1][0][5] = 1007
4143 00:44:42.104527 tx_win_center[1][0][6] = 993
4144 00:44:42.104616 tx_first_pass[1][0][6] = 980
4145 00:44:42.107636 tx_last_pass[1][0][6] = 1006
4146 00:44:42.110753 tx_win_center[1][0][7] = 993
4147 00:44:42.113812 tx_first_pass[1][0][7] = 980
4148 00:44:42.117106 tx_last_pass[1][0][7] = 1006
4149 00:44:42.117236 tx_win_center[1][0][8] = 988
4150 00:44:42.120684 tx_first_pass[1][0][8] = 977
4151 00:44:42.123667 tx_last_pass[1][0][8] = 999
4152 00:44:42.127184 tx_win_center[1][0][9] = 987
4153 00:44:42.130408 tx_first_pass[1][0][9] = 976
4154 00:44:42.130497 tx_last_pass[1][0][9] = 998
4155 00:44:42.133671 tx_win_center[1][0][10] = 990
4156 00:44:42.137004 tx_first_pass[1][0][10] = 979
4157 00:44:42.140142 tx_last_pass[1][0][10] = 1001
4158 00:44:42.143387 tx_win_center[1][0][11] = 990
4159 00:44:42.143506 tx_first_pass[1][0][11] = 979
4160 00:44:42.146686 tx_last_pass[1][0][11] = 1002
4161 00:44:42.150338 tx_win_center[1][0][12] = 990
4162 00:44:42.153333 tx_first_pass[1][0][12] = 979
4163 00:44:42.156769 tx_last_pass[1][0][12] = 1001
4164 00:44:42.159979 tx_win_center[1][0][13] = 991
4165 00:44:42.160072 tx_first_pass[1][0][13] = 980
4166 00:44:42.163205 tx_last_pass[1][0][13] = 1002
4167 00:44:42.166400 tx_win_center[1][0][14] = 989
4168 00:44:42.169681 tx_first_pass[1][0][14] = 978
4169 00:44:42.172909 tx_last_pass[1][0][14] = 1001
4170 00:44:42.172999 tx_win_center[1][0][15] = 985
4171 00:44:42.176616 tx_first_pass[1][0][15] = 974
4172 00:44:42.179693 tx_last_pass[1][0][15] = 996
4173 00:44:42.182748 tx_win_center[1][1][0] = 995
4174 00:44:42.186147 tx_first_pass[1][1][0] = 983
4175 00:44:42.186235 tx_last_pass[1][1][0] = 1007
4176 00:44:42.189524 tx_win_center[1][1][1] = 993
4177 00:44:42.192806 tx_first_pass[1][1][1] = 980
4178 00:44:42.195973 tx_last_pass[1][1][1] = 1006
4179 00:44:42.199307 tx_win_center[1][1][2] = 991
4180 00:44:42.199429 tx_first_pass[1][1][2] = 978
4181 00:44:42.202430 tx_last_pass[1][1][2] = 1005
4182 00:44:42.205752 tx_win_center[1][1][3] = 989
4183 00:44:42.209296 tx_first_pass[1][1][3] = 977
4184 00:44:42.212456 tx_last_pass[1][1][3] = 1001
4185 00:44:42.212545 tx_win_center[1][1][4] = 993
4186 00:44:42.215841 tx_first_pass[1][1][4] = 980
4187 00:44:42.218861 tx_last_pass[1][1][4] = 1006
4188 00:44:42.222171 tx_win_center[1][1][5] = 994
4189 00:44:42.225408 tx_first_pass[1][1][5] = 982
4190 00:44:42.225536 tx_last_pass[1][1][5] = 1007
4191 00:44:42.228665 tx_win_center[1][1][6] = 993
4192 00:44:42.232042 tx_first_pass[1][1][6] = 981
4193 00:44:42.235585 tx_last_pass[1][1][6] = 1006
4194 00:44:42.238649 tx_win_center[1][1][7] = 993
4195 00:44:42.238748 tx_first_pass[1][1][7] = 981
4196 00:44:42.241659 tx_last_pass[1][1][7] = 1006
4197 00:44:42.245013 tx_win_center[1][1][8] = 986
4198 00:44:42.248170 tx_first_pass[1][1][8] = 975
4199 00:44:42.251642 tx_last_pass[1][1][8] = 998
4200 00:44:42.251731 tx_win_center[1][1][9] = 985
4201 00:44:42.254930 tx_first_pass[1][1][9] = 974
4202 00:44:42.258150 tx_last_pass[1][1][9] = 997
4203 00:44:42.261323 tx_win_center[1][1][10] = 987
4204 00:44:42.264590 tx_first_pass[1][1][10] = 976
4205 00:44:42.264680 tx_last_pass[1][1][10] = 999
4206 00:44:42.268177 tx_win_center[1][1][11] = 988
4207 00:44:42.271165 tx_first_pass[1][1][11] = 977
4208 00:44:42.274572 tx_last_pass[1][1][11] = 1000
4209 00:44:42.277739 tx_win_center[1][1][12] = 988
4210 00:44:42.281115 tx_first_pass[1][1][12] = 977
4211 00:44:42.281205 tx_last_pass[1][1][12] = 1000
4212 00:44:42.284353 tx_win_center[1][1][13] = 988
4213 00:44:42.287836 tx_first_pass[1][1][13] = 977
4214 00:44:42.290896 tx_last_pass[1][1][13] = 1000
4215 00:44:42.294162 tx_win_center[1][1][14] = 988
4216 00:44:42.297362 tx_first_pass[1][1][14] = 977
4217 00:44:42.297460 tx_last_pass[1][1][14] = 1000
4218 00:44:42.301137 tx_win_center[1][1][15] = 982
4219 00:44:42.303952 tx_first_pass[1][1][15] = 970
4220 00:44:42.307220 tx_last_pass[1][1][15] = 994
4221 00:44:42.307309 dump params rx window
4222 00:44:42.311100 rx_firspass[0][0][0] = 7
4223 00:44:42.313719 rx_lastpass[0][0][0] = 37
4224 00:44:42.313808 rx_firspass[0][0][1] = 8
4225 00:44:42.316951 rx_lastpass[0][0][1] = 36
4226 00:44:42.320378 rx_firspass[0][0][2] = 6
4227 00:44:42.323501 rx_lastpass[0][0][2] = 39
4228 00:44:42.323590 rx_firspass[0][0][3] = -3
4229 00:44:42.327127 rx_lastpass[0][0][3] = 30
4230 00:44:42.330078 rx_firspass[0][0][4] = 6
4231 00:44:42.333423 rx_lastpass[0][0][4] = 36
4232 00:44:42.333521 rx_firspass[0][0][5] = 3
4233 00:44:42.336835 rx_lastpass[0][0][5] = 33
4234 00:44:42.340210 rx_firspass[0][0][6] = 3
4235 00:44:42.340299 rx_lastpass[0][0][6] = 33
4236 00:44:42.343196 rx_firspass[0][0][7] = 4
4237 00:44:42.346423 rx_lastpass[0][0][7] = 36
4238 00:44:42.346511 rx_firspass[0][0][8] = -2
4239 00:44:42.350017 rx_lastpass[0][0][8] = 30
4240 00:44:42.353022 rx_firspass[0][0][9] = 2
4241 00:44:42.356397 rx_lastpass[0][0][9] = 32
4242 00:44:42.356485 rx_firspass[0][0][10] = 9
4243 00:44:42.359756 rx_lastpass[0][0][10] = 37
4244 00:44:42.362893 rx_firspass[0][0][11] = 0
4245 00:44:42.366434 rx_lastpass[0][0][11] = 30
4246 00:44:42.366523 rx_firspass[0][0][12] = 3
4247 00:44:42.369546 rx_lastpass[0][0][12] = 31
4248 00:44:42.372766 rx_firspass[0][0][13] = 1
4249 00:44:42.375982 rx_lastpass[0][0][13] = 31
4250 00:44:42.376071 rx_firspass[0][0][14] = 0
4251 00:44:42.379144 rx_lastpass[0][0][14] = 35
4252 00:44:42.382502 rx_firspass[0][0][15] = 4
4253 00:44:42.382591 rx_lastpass[0][0][15] = 36
4254 00:44:42.385957 rx_firspass[0][1][0] = 3
4255 00:44:42.389171 rx_lastpass[0][1][0] = 39
4256 00:44:42.392209 rx_firspass[0][1][1] = 4
4257 00:44:42.392298 rx_lastpass[0][1][1] = 38
4258 00:44:42.395540 rx_firspass[0][1][2] = 5
4259 00:44:42.399125 rx_lastpass[0][1][2] = 40
4260 00:44:42.399213 rx_firspass[0][1][3] = -2
4261 00:44:42.402178 rx_lastpass[0][1][3] = 31
4262 00:44:42.405529 rx_firspass[0][1][4] = 3
4263 00:44:42.408812 rx_lastpass[0][1][4] = 38
4264 00:44:42.408901 rx_firspass[0][1][5] = -1
4265 00:44:42.412208 rx_lastpass[0][1][5] = 34
4266 00:44:42.415500 rx_firspass[0][1][6] = 1
4267 00:44:42.415590 rx_lastpass[0][1][6] = 35
4268 00:44:42.418507 rx_firspass[0][1][7] = 3
4269 00:44:42.421882 rx_lastpass[0][1][7] = 37
4270 00:44:42.425236 rx_firspass[0][1][8] = -4
4271 00:44:42.425325 rx_lastpass[0][1][8] = 32
4272 00:44:42.428505 rx_firspass[0][1][9] = -2
4273 00:44:42.431664 rx_lastpass[0][1][9] = 34
4274 00:44:42.435171 rx_firspass[0][1][10] = 6
4275 00:44:42.435260 rx_lastpass[0][1][10] = 40
4276 00:44:42.438409 rx_firspass[0][1][11] = -2
4277 00:44:42.441631 rx_lastpass[0][1][11] = 32
4278 00:44:42.444921 rx_firspass[0][1][12] = -1
4279 00:44:42.445008 rx_lastpass[0][1][12] = 34
4280 00:44:42.448009 rx_firspass[0][1][13] = -1
4281 00:44:42.451292 rx_lastpass[0][1][13] = 33
4282 00:44:42.451381 rx_firspass[0][1][14] = 1
4283 00:44:42.454928 rx_lastpass[0][1][14] = 35
4284 00:44:42.457885 rx_firspass[0][1][15] = 5
4285 00:44:42.461152 rx_lastpass[0][1][15] = 37
4286 00:44:42.461251 rx_firspass[1][0][0] = 6
4287 00:44:42.464621 rx_lastpass[1][0][0] = 36
4288 00:44:42.467486 rx_firspass[1][0][1] = 4
4289 00:44:42.471144 rx_lastpass[1][0][1] = 36
4290 00:44:42.471232 rx_firspass[1][0][2] = 1
4291 00:44:42.474465 rx_lastpass[1][0][2] = 34
4292 00:44:42.477900 rx_firspass[1][0][3] = 1
4293 00:44:42.477988 rx_lastpass[1][0][3] = 31
4294 00:44:42.480895 rx_firspass[1][0][4] = 5
4295 00:44:42.484227 rx_lastpass[1][0][4] = 35
4296 00:44:42.487250 rx_firspass[1][0][5] = 9
4297 00:44:42.487339 rx_lastpass[1][0][5] = 38
4298 00:44:42.490712 rx_firspass[1][0][6] = 6
4299 00:44:42.494153 rx_lastpass[1][0][6] = 38
4300 00:44:42.494240 rx_firspass[1][0][7] = 5
4301 00:44:42.497315 rx_lastpass[1][0][7] = 34
4302 00:44:42.500276 rx_firspass[1][0][8] = 0
4303 00:44:42.503618 rx_lastpass[1][0][8] = 33
4304 00:44:42.503707 rx_firspass[1][0][9] = 0
4305 00:44:42.506728 rx_lastpass[1][0][9] = 31
4306 00:44:42.510040 rx_firspass[1][0][10] = 3
4307 00:44:42.510128 rx_lastpass[1][0][10] = 36
4308 00:44:42.513338 rx_firspass[1][0][11] = 4
4309 00:44:42.516704 rx_lastpass[1][0][11] = 36
4310 00:44:42.520209 rx_firspass[1][0][12] = 6
4311 00:44:42.520297 rx_lastpass[1][0][12] = 34
4312 00:44:42.523298 rx_firspass[1][0][13] = 6
4313 00:44:42.526579 rx_lastpass[1][0][13] = 35
4314 00:44:42.529719 rx_firspass[1][0][14] = 5
4315 00:44:42.529807 rx_lastpass[1][0][14] = 36
4316 00:44:42.533186 rx_firspass[1][0][15] = -2
4317 00:44:42.536272 rx_lastpass[1][0][15] = 29
4318 00:44:42.539620 rx_firspass[1][1][0] = 3
4319 00:44:42.539711 rx_lastpass[1][1][0] = 40
4320 00:44:42.543151 rx_firspass[1][1][1] = 3
4321 00:44:42.546007 rx_lastpass[1][1][1] = 39
4322 00:44:42.546095 rx_firspass[1][1][2] = 3
4323 00:44:42.549349 rx_lastpass[1][1][2] = 34
4324 00:44:42.552723 rx_firspass[1][1][3] = -2
4325 00:44:42.555958 rx_lastpass[1][1][3] = 33
4326 00:44:42.556045 rx_firspass[1][1][4] = 4
4327 00:44:42.559175 rx_lastpass[1][1][4] = 39
4328 00:44:42.562542 rx_firspass[1][1][5] = 5
4329 00:44:42.562630 rx_lastpass[1][1][5] = 40
4330 00:44:42.565697 rx_firspass[1][1][6] = 6
4331 00:44:42.569055 rx_lastpass[1][1][6] = 40
4332 00:44:42.569143 rx_firspass[1][1][7] = 3
4333 00:44:42.572316 rx_lastpass[1][1][7] = 38
4334 00:44:42.575535 rx_firspass[1][1][8] = -1
4335 00:44:42.579137 rx_lastpass[1][1][8] = 35
4336 00:44:42.579226 rx_firspass[1][1][9] = -3
4337 00:44:42.582283 rx_lastpass[1][1][9] = 33
4338 00:44:42.585469 rx_firspass[1][1][10] = 2
4339 00:44:42.588741 rx_lastpass[1][1][10] = 38
4340 00:44:42.588828 rx_firspass[1][1][11] = 3
4341 00:44:42.591944 rx_lastpass[1][1][11] = 38
4342 00:44:42.595094 rx_firspass[1][1][12] = 3
4343 00:44:42.598434 rx_lastpass[1][1][12] = 37
4344 00:44:42.598522 rx_firspass[1][1][13] = 3
4345 00:44:42.601804 rx_lastpass[1][1][13] = 39
4346 00:44:42.604990 rx_firspass[1][1][14] = 4
4347 00:44:42.605077 rx_lastpass[1][1][14] = 40
4348 00:44:42.608534 rx_firspass[1][1][15] = -4
4349 00:44:42.611706 rx_lastpass[1][1][15] = 31
4350 00:44:42.614921 dump params clk_delay
4351 00:44:42.615009 clk_delay[0] = -1
4352 00:44:42.618366 clk_delay[1] = 0
4353 00:44:42.618453 dump params dqs_delay
4354 00:44:42.621584 dqs_delay[0][0] = -1
4355 00:44:42.621671 dqs_delay[0][1] = 0
4356 00:44:42.624703 dqs_delay[1][0] = 0
4357 00:44:42.624790 dqs_delay[1][1] = -1
4358 00:44:42.628124 dump params delay_cell_unit = 744
4359 00:44:42.631248 dump source = 0x0
4360 00:44:42.634534 dump params frequency:1200
4361 00:44:42.634622 dump params rank number:2
4362 00:44:42.634691
4363 00:44:42.637833 dump params write leveling
4364 00:44:42.641212 write leveling[0][0][0] = 0x0
4365 00:44:42.644369 write leveling[0][0][1] = 0x0
4366 00:44:42.647518 write leveling[0][1][0] = 0x0
4367 00:44:42.647607 write leveling[0][1][1] = 0x0
4368 00:44:42.651005 write leveling[1][0][0] = 0x0
4369 00:44:42.654385 write leveling[1][0][1] = 0x0
4370 00:44:42.657719 write leveling[1][1][0] = 0x0
4371 00:44:42.660974 write leveling[1][1][1] = 0x0
4372 00:44:42.661063 dump params cbt_cs
4373 00:44:42.664075 cbt_cs[0][0] = 0x0
4374 00:44:42.664164 cbt_cs[0][1] = 0x0
4375 00:44:42.667444 cbt_cs[1][0] = 0x0
4376 00:44:42.667533 cbt_cs[1][1] = 0x0
4377 00:44:42.670658 dump params cbt_mr12
4378 00:44:42.670746 cbt_mr12[0][0] = 0x0
4379 00:44:42.673992 cbt_mr12[0][1] = 0x0
4380 00:44:42.677057 cbt_mr12[1][0] = 0x0
4381 00:44:42.677153 cbt_mr12[1][1] = 0x0
4382 00:44:42.680349 dump params tx window
4383 00:44:42.683633 tx_center_min[0][0][0] = 0
4384 00:44:42.683722 tx_center_max[0][0][0] = 0
4385 00:44:42.687087 tx_center_min[0][0][1] = 0
4386 00:44:42.690463 tx_center_max[0][0][1] = 0
4387 00:44:42.693315 tx_center_min[0][1][0] = 0
4388 00:44:42.693407 tx_center_max[0][1][0] = 0
4389 00:44:42.696629 tx_center_min[0][1][1] = 0
4390 00:44:42.700119 tx_center_max[0][1][1] = 0
4391 00:44:42.703392 tx_center_min[1][0][0] = 0
4392 00:44:42.703481 tx_center_max[1][0][0] = 0
4393 00:44:42.706578 tx_center_min[1][0][1] = 0
4394 00:44:42.709710 tx_center_max[1][0][1] = 0
4395 00:44:42.712885 tx_center_min[1][1][0] = 0
4396 00:44:42.712975 tx_center_max[1][1][0] = 0
4397 00:44:42.716257 tx_center_min[1][1][1] = 0
4398 00:44:42.719519 tx_center_max[1][1][1] = 0
4399 00:44:42.719610 dump params tx window
4400 00:44:42.723084 tx_win_center[0][0][0] = 0
4401 00:44:42.726093 tx_first_pass[0][0][0] = 0
4402 00:44:42.729367 tx_last_pass[0][0][0] = 0
4403 00:44:42.729467 tx_win_center[0][0][1] = 0
4404 00:44:42.732659 tx_first_pass[0][0][1] = 0
4405 00:44:42.735991 tx_last_pass[0][0][1] = 0
4406 00:44:42.739275 tx_win_center[0][0][2] = 0
4407 00:44:42.739366 tx_first_pass[0][0][2] = 0
4408 00:44:42.742671 tx_last_pass[0][0][2] = 0
4409 00:44:42.746100 tx_win_center[0][0][3] = 0
4410 00:44:42.749109 tx_first_pass[0][0][3] = 0
4411 00:44:42.749202 tx_last_pass[0][0][3] = 0
4412 00:44:42.752363 tx_win_center[0][0][4] = 0
4413 00:44:42.755676 tx_first_pass[0][0][4] = 0
4414 00:44:42.755766 tx_last_pass[0][0][4] = 0
4415 00:44:42.758917 tx_win_center[0][0][5] = 0
4416 00:44:42.762310 tx_first_pass[0][0][5] = 0
4417 00:44:42.765814 tx_last_pass[0][0][5] = 0
4418 00:44:42.765904 tx_win_center[0][0][6] = 0
4419 00:44:42.768676 tx_first_pass[0][0][6] = 0
4420 00:44:42.772176 tx_last_pass[0][0][6] = 0
4421 00:44:42.775481 tx_win_center[0][0][7] = 0
4422 00:44:42.775571 tx_first_pass[0][0][7] = 0
4423 00:44:42.778549 tx_last_pass[0][0][7] = 0
4424 00:44:42.781875 tx_win_center[0][0][8] = 0
4425 00:44:42.785130 tx_first_pass[0][0][8] = 0
4426 00:44:42.785219 tx_last_pass[0][0][8] = 0
4427 00:44:42.788389 tx_win_center[0][0][9] = 0
4428 00:44:42.791822 tx_first_pass[0][0][9] = 0
4429 00:44:42.791911 tx_last_pass[0][0][9] = 0
4430 00:44:42.794848 tx_win_center[0][0][10] = 0
4431 00:44:42.798554 tx_first_pass[0][0][10] = 0
4432 00:44:42.801455 tx_last_pass[0][0][10] = 0
4433 00:44:42.805140 tx_win_center[0][0][11] = 0
4434 00:44:42.805230 tx_first_pass[0][0][11] = 0
4435 00:44:42.808130 tx_last_pass[0][0][11] = 0
4436 00:44:42.811514 tx_win_center[0][0][12] = 0
4437 00:44:42.814702 tx_first_pass[0][0][12] = 0
4438 00:44:42.814792 tx_last_pass[0][0][12] = 0
4439 00:44:42.818034 tx_win_center[0][0][13] = 0
4440 00:44:42.821267 tx_first_pass[0][0][13] = 0
4441 00:44:42.824465 tx_last_pass[0][0][13] = 0
4442 00:44:42.824555 tx_win_center[0][0][14] = 0
4443 00:44:42.827674 tx_first_pass[0][0][14] = 0
4444 00:44:42.830949 tx_last_pass[0][0][14] = 0
4445 00:44:42.834283 tx_win_center[0][0][15] = 0
4446 00:44:42.834372 tx_first_pass[0][0][15] = 0
4447 00:44:42.837357 tx_last_pass[0][0][15] = 0
4448 00:44:42.840901 tx_win_center[0][1][0] = 0
4449 00:44:42.844097 tx_first_pass[0][1][0] = 0
4450 00:44:42.844187 tx_last_pass[0][1][0] = 0
4451 00:44:42.847423 tx_win_center[0][1][1] = 0
4452 00:44:42.850805 tx_first_pass[0][1][1] = 0
4453 00:44:42.853819 tx_last_pass[0][1][1] = 0
4454 00:44:42.853908 tx_win_center[0][1][2] = 0
4455 00:44:42.857412 tx_first_pass[0][1][2] = 0
4456 00:44:42.860511 tx_last_pass[0][1][2] = 0
4457 00:44:42.864002 tx_win_center[0][1][3] = 0
4458 00:44:42.864092 tx_first_pass[0][1][3] = 0
4459 00:44:42.867156 tx_last_pass[0][1][3] = 0
4460 00:44:42.870233 tx_win_center[0][1][4] = 0
4461 00:44:42.873546 tx_first_pass[0][1][4] = 0
4462 00:44:42.873640 tx_last_pass[0][1][4] = 0
4463 00:44:42.876809 tx_win_center[0][1][5] = 0
4464 00:44:42.880135 tx_first_pass[0][1][5] = 0
4465 00:44:42.880229 tx_last_pass[0][1][5] = 0
4466 00:44:42.883324 tx_win_center[0][1][6] = 0
4467 00:44:42.886717 tx_first_pass[0][1][6] = 0
4468 00:44:42.890181 tx_last_pass[0][1][6] = 0
4469 00:44:42.890275 tx_win_center[0][1][7] = 0
4470 00:44:42.893101 tx_first_pass[0][1][7] = 0
4471 00:44:42.896717 tx_last_pass[0][1][7] = 0
4472 00:44:42.899671 tx_win_center[0][1][8] = 0
4473 00:44:42.899764 tx_first_pass[0][1][8] = 0
4474 00:44:42.902835 tx_last_pass[0][1][8] = 0
4475 00:44:42.906226 tx_win_center[0][1][9] = 0
4476 00:44:42.909775 tx_first_pass[0][1][9] = 0
4477 00:44:42.909868 tx_last_pass[0][1][9] = 0
4478 00:44:42.912690 tx_win_center[0][1][10] = 0
4479 00:44:42.916187 tx_first_pass[0][1][10] = 0
4480 00:44:42.919612 tx_last_pass[0][1][10] = 0
4481 00:44:42.919706 tx_win_center[0][1][11] = 0
4482 00:44:42.922571 tx_first_pass[0][1][11] = 0
4483 00:44:42.926116 tx_last_pass[0][1][11] = 0
4484 00:44:42.929102 tx_win_center[0][1][12] = 0
4485 00:44:42.929195 tx_first_pass[0][1][12] = 0
4486 00:44:42.932426 tx_last_pass[0][1][12] = 0
4487 00:44:42.935642 tx_win_center[0][1][13] = 0
4488 00:44:42.939031 tx_first_pass[0][1][13] = 0
4489 00:44:42.939124 tx_last_pass[0][1][13] = 0
4490 00:44:42.942256 tx_win_center[0][1][14] = 0
4491 00:44:42.945396 tx_first_pass[0][1][14] = 0
4492 00:44:42.948840 tx_last_pass[0][1][14] = 0
4493 00:44:42.952209 tx_win_center[0][1][15] = 0
4494 00:44:42.952332 tx_first_pass[0][1][15] = 0
4495 00:44:42.955573 tx_last_pass[0][1][15] = 0
4496 00:44:42.958671 tx_win_center[1][0][0] = 0
4497 00:44:42.961934 tx_first_pass[1][0][0] = 0
4498 00:44:42.962027 tx_last_pass[1][0][0] = 0
4499 00:44:42.965106 tx_win_center[1][0][1] = 0
4500 00:44:42.968692 tx_first_pass[1][0][1] = 0
4501 00:44:42.968786 tx_last_pass[1][0][1] = 0
4502 00:44:42.971774 tx_win_center[1][0][2] = 0
4503 00:44:42.974927 tx_first_pass[1][0][2] = 0
4504 00:44:42.978336 tx_last_pass[1][0][2] = 0
4505 00:44:42.978429 tx_win_center[1][0][3] = 0
4506 00:44:42.981378 tx_first_pass[1][0][3] = 0
4507 00:44:42.984908 tx_last_pass[1][0][3] = 0
4508 00:44:42.988307 tx_win_center[1][0][4] = 0
4509 00:44:42.988401 tx_first_pass[1][0][4] = 0
4510 00:44:42.991470 tx_last_pass[1][0][4] = 0
4511 00:44:42.994599 tx_win_center[1][0][5] = 0
4512 00:44:42.998051 tx_first_pass[1][0][5] = 0
4513 00:44:42.998144 tx_last_pass[1][0][5] = 0
4514 00:44:43.001185 tx_win_center[1][0][6] = 0
4515 00:44:43.004486 tx_first_pass[1][0][6] = 0
4516 00:44:43.007934 tx_last_pass[1][0][6] = 0
4517 00:44:43.008028 tx_win_center[1][0][7] = 0
4518 00:44:43.011109 tx_first_pass[1][0][7] = 0
4519 00:44:43.014462 tx_last_pass[1][0][7] = 0
4520 00:44:43.014582 tx_win_center[1][0][8] = 0
4521 00:44:43.017401 tx_first_pass[1][0][8] = 0
4522 00:44:43.020924 tx_last_pass[1][0][8] = 0
4523 00:44:43.023966 tx_win_center[1][0][9] = 0
4524 00:44:43.024058 tx_first_pass[1][0][9] = 0
4525 00:44:43.027388 tx_last_pass[1][0][9] = 0
4526 00:44:43.030712 tx_win_center[1][0][10] = 0
4527 00:44:43.033859 tx_first_pass[1][0][10] = 0
4528 00:44:43.033953 tx_last_pass[1][0][10] = 0
4529 00:44:43.037222 tx_win_center[1][0][11] = 0
4530 00:44:43.040381 tx_first_pass[1][0][11] = 0
4531 00:44:43.043661 tx_last_pass[1][0][11] = 0
4532 00:44:43.047018 tx_win_center[1][0][12] = 0
4533 00:44:43.047131 tx_first_pass[1][0][12] = 0
4534 00:44:43.050406 tx_last_pass[1][0][12] = 0
4535 00:44:43.053760 tx_win_center[1][0][13] = 0
4536 00:44:43.056925 tx_first_pass[1][0][13] = 0
4537 00:44:43.057075 tx_last_pass[1][0][13] = 0
4538 00:44:43.059973 tx_win_center[1][0][14] = 0
4539 00:44:43.063555 tx_first_pass[1][0][14] = 0
4540 00:44:43.066867 tx_last_pass[1][0][14] = 0
4541 00:44:43.066963 tx_win_center[1][0][15] = 0
4542 00:44:43.070057 tx_first_pass[1][0][15] = 0
4543 00:44:43.073236 tx_last_pass[1][0][15] = 0
4544 00:44:43.076798 tx_win_center[1][1][0] = 0
4545 00:44:43.076889 tx_first_pass[1][1][0] = 0
4546 00:44:43.079630 tx_last_pass[1][1][0] = 0
4547 00:44:43.082946 tx_win_center[1][1][1] = 0
4548 00:44:43.086444 tx_first_pass[1][1][1] = 0
4549 00:44:43.086534 tx_last_pass[1][1][1] = 0
4550 00:44:43.089445 tx_win_center[1][1][2] = 0
4551 00:44:43.092955 tx_first_pass[1][1][2] = 0
4552 00:44:43.095992 tx_last_pass[1][1][2] = 0
4553 00:44:43.096083 tx_win_center[1][1][3] = 0
4554 00:44:43.099362 tx_first_pass[1][1][3] = 0
4555 00:44:43.102777 tx_last_pass[1][1][3] = 0
4556 00:44:43.102868 tx_win_center[1][1][4] = 0
4557 00:44:43.106185 tx_first_pass[1][1][4] = 0
4558 00:44:43.109196 tx_last_pass[1][1][4] = 0
4559 00:44:43.112333 tx_win_center[1][1][5] = 0
4560 00:44:43.112424 tx_first_pass[1][1][5] = 0
4561 00:44:43.115672 tx_last_pass[1][1][5] = 0
4562 00:44:43.118976 tx_win_center[1][1][6] = 0
4563 00:44:43.122186 tx_first_pass[1][1][6] = 0
4564 00:44:43.122276 tx_last_pass[1][1][6] = 0
4565 00:44:43.125598 tx_win_center[1][1][7] = 0
4566 00:44:43.128812 tx_first_pass[1][1][7] = 0
4567 00:44:43.132035 tx_last_pass[1][1][7] = 0
4568 00:44:43.132126 tx_win_center[1][1][8] = 0
4569 00:44:43.135339 tx_first_pass[1][1][8] = 0
4570 00:44:43.138733 tx_last_pass[1][1][8] = 0
4571 00:44:43.141901 tx_win_center[1][1][9] = 0
4572 00:44:43.141992 tx_first_pass[1][1][9] = 0
4573 00:44:43.145149 tx_last_pass[1][1][9] = 0
4574 00:44:43.148523 tx_win_center[1][1][10] = 0
4575 00:44:43.151809 tx_first_pass[1][1][10] = 0
4576 00:44:43.151899 tx_last_pass[1][1][10] = 0
4577 00:44:43.155111 tx_win_center[1][1][11] = 0
4578 00:44:43.158353 tx_first_pass[1][1][11] = 0
4579 00:44:43.161694 tx_last_pass[1][1][11] = 0
4580 00:44:43.161784 tx_win_center[1][1][12] = 0
4581 00:44:43.164817 tx_first_pass[1][1][12] = 0
4582 00:44:43.167991 tx_last_pass[1][1][12] = 0
4583 00:44:43.171371 tx_win_center[1][1][13] = 0
4584 00:44:43.171462 tx_first_pass[1][1][13] = 0
4585 00:44:43.174686 tx_last_pass[1][1][13] = 0
4586 00:44:43.178097 tx_win_center[1][1][14] = 0
4587 00:44:43.181158 tx_first_pass[1][1][14] = 0
4588 00:44:43.181246 tx_last_pass[1][1][14] = 0
4589 00:44:43.184494 tx_win_center[1][1][15] = 0
4590 00:44:43.187795 tx_first_pass[1][1][15] = 0
4591 00:44:43.190937 tx_last_pass[1][1][15] = 0
4592 00:44:43.191026 dump params rx window
4593 00:44:43.194332 rx_firspass[0][0][0] = 0
4594 00:44:43.197698 rx_lastpass[0][0][0] = 0
4595 00:44:43.197786 rx_firspass[0][0][1] = 0
4596 00:44:43.201000 rx_lastpass[0][0][1] = 0
4597 00:44:43.204139 rx_firspass[0][0][2] = 0
4598 00:44:43.207245 rx_lastpass[0][0][2] = 0
4599 00:44:43.207333 rx_firspass[0][0][3] = 0
4600 00:44:43.210733 rx_lastpass[0][0][3] = 0
4601 00:44:43.213848 rx_firspass[0][0][4] = 0
4602 00:44:43.213937 rx_lastpass[0][0][4] = 0
4603 00:44:43.217564 rx_firspass[0][0][5] = 0
4604 00:44:43.220597 rx_lastpass[0][0][5] = 0
4605 00:44:43.220685 rx_firspass[0][0][6] = 0
4606 00:44:43.223718 rx_lastpass[0][0][6] = 0
4607 00:44:43.227123 rx_firspass[0][0][7] = 0
4608 00:44:43.230539 rx_lastpass[0][0][7] = 0
4609 00:44:43.230628 rx_firspass[0][0][8] = 0
4610 00:44:43.233622 rx_lastpass[0][0][8] = 0
4611 00:44:43.236764 rx_firspass[0][0][9] = 0
4612 00:44:43.236851 rx_lastpass[0][0][9] = 0
4613 00:44:43.240094 rx_firspass[0][0][10] = 0
4614 00:44:43.243599 rx_lastpass[0][0][10] = 0
4615 00:44:43.243687 rx_firspass[0][0][11] = 0
4616 00:44:43.246743 rx_lastpass[0][0][11] = 0
4617 00:44:43.249826 rx_firspass[0][0][12] = 0
4618 00:44:43.253240 rx_lastpass[0][0][12] = 0
4619 00:44:43.253343 rx_firspass[0][0][13] = 0
4620 00:44:43.256558 rx_lastpass[0][0][13] = 0
4621 00:44:43.259836 rx_firspass[0][0][14] = 0
4622 00:44:43.263425 rx_lastpass[0][0][14] = 0
4623 00:44:43.263512 rx_firspass[0][0][15] = 0
4624 00:44:43.266389 rx_lastpass[0][0][15] = 0
4625 00:44:43.269386 rx_firspass[0][1][0] = 0
4626 00:44:43.269497 rx_lastpass[0][1][0] = 0
4627 00:44:43.272817 rx_firspass[0][1][1] = 0
4628 00:44:43.275934 rx_lastpass[0][1][1] = 0
4629 00:44:43.276023 rx_firspass[0][1][2] = 0
4630 00:44:43.279375 rx_lastpass[0][1][2] = 0
4631 00:44:43.282748 rx_firspass[0][1][3] = 0
4632 00:44:43.285919 rx_lastpass[0][1][3] = 0
4633 00:44:43.286009 rx_firspass[0][1][4] = 0
4634 00:44:43.289420 rx_lastpass[0][1][4] = 0
4635 00:44:43.292606 rx_firspass[0][1][5] = 0
4636 00:44:43.292695 rx_lastpass[0][1][5] = 0
4637 00:44:43.295711 rx_firspass[0][1][6] = 0
4638 00:44:43.299154 rx_lastpass[0][1][6] = 0
4639 00:44:43.299244 rx_firspass[0][1][7] = 0
4640 00:44:43.302498 rx_lastpass[0][1][7] = 0
4641 00:44:43.305452 rx_firspass[0][1][8] = 0
4642 00:44:43.308660 rx_lastpass[0][1][8] = 0
4643 00:44:43.308749 rx_firspass[0][1][9] = 0
4644 00:44:43.312066 rx_lastpass[0][1][9] = 0
4645 00:44:43.315341 rx_firspass[0][1][10] = 0
4646 00:44:43.315434 rx_lastpass[0][1][10] = 0
4647 00:44:43.318788 rx_firspass[0][1][11] = 0
4648 00:44:43.321799 rx_lastpass[0][1][11] = 0
4649 00:44:43.325317 rx_firspass[0][1][12] = 0
4650 00:44:43.325406 rx_lastpass[0][1][12] = 0
4651 00:44:43.328395 rx_firspass[0][1][13] = 0
4652 00:44:43.331741 rx_lastpass[0][1][13] = 0
4653 00:44:43.331830 rx_firspass[0][1][14] = 0
4654 00:44:43.334992 rx_lastpass[0][1][14] = 0
4655 00:44:43.338275 rx_firspass[0][1][15] = 0
4656 00:44:43.341821 rx_lastpass[0][1][15] = 0
4657 00:44:43.341911 rx_firspass[1][0][0] = 0
4658 00:44:43.344908 rx_lastpass[1][0][0] = 0
4659 00:44:43.348132 rx_firspass[1][0][1] = 0
4660 00:44:43.348222 rx_lastpass[1][0][1] = 0
4661 00:44:43.351655 rx_firspass[1][0][2] = 0
4662 00:44:43.354502 rx_lastpass[1][0][2] = 0
4663 00:44:43.358026 rx_firspass[1][0][3] = 0
4664 00:44:43.358120 rx_lastpass[1][0][3] = 0
4665 00:44:43.361152 rx_firspass[1][0][4] = 0
4666 00:44:43.364562 rx_lastpass[1][0][4] = 0
4667 00:44:43.364656 rx_firspass[1][0][5] = 0
4668 00:44:43.367514 rx_lastpass[1][0][5] = 0
4669 00:44:43.371151 rx_firspass[1][0][6] = 0
4670 00:44:43.371244 rx_lastpass[1][0][6] = 0
4671 00:44:43.374384 rx_firspass[1][0][7] = 0
4672 00:44:43.377744 rx_lastpass[1][0][7] = 0
4673 00:44:43.380699 rx_firspass[1][0][8] = 0
4674 00:44:43.380793 rx_lastpass[1][0][8] = 0
4675 00:44:43.384079 rx_firspass[1][0][9] = 0
4676 00:44:43.387411 rx_lastpass[1][0][9] = 0
4677 00:44:43.387505 rx_firspass[1][0][10] = 0
4678 00:44:43.390877 rx_lastpass[1][0][10] = 0
4679 00:44:43.394120 rx_firspass[1][0][11] = 0
4680 00:44:43.397010 rx_lastpass[1][0][11] = 0
4681 00:44:43.397104 rx_firspass[1][0][12] = 0
4682 00:44:43.400293 rx_lastpass[1][0][12] = 0
4683 00:44:43.403656 rx_firspass[1][0][13] = 0
4684 00:44:43.403751 rx_lastpass[1][0][13] = 0
4685 00:44:43.406959 rx_firspass[1][0][14] = 0
4686 00:44:43.410342 rx_lastpass[1][0][14] = 0
4687 00:44:43.413409 rx_firspass[1][0][15] = 0
4688 00:44:43.413518 rx_lastpass[1][0][15] = 0
4689 00:44:43.416842 rx_firspass[1][1][0] = 0
4690 00:44:43.420137 rx_lastpass[1][1][0] = 0
4691 00:44:43.420231 rx_firspass[1][1][1] = 0
4692 00:44:43.423561 rx_lastpass[1][1][1] = 0
4693 00:44:43.426644 rx_firspass[1][1][2] = 0
4694 00:44:43.430023 rx_lastpass[1][1][2] = 0
4695 00:44:43.430116 rx_firspass[1][1][3] = 0
4696 00:44:43.433323 rx_lastpass[1][1][3] = 0
4697 00:44:43.436505 rx_firspass[1][1][4] = 0
4698 00:44:43.436599 rx_lastpass[1][1][4] = 0
4699 00:44:43.439558 rx_firspass[1][1][5] = 0
4700 00:44:43.443005 rx_lastpass[1][1][5] = 0
4701 00:44:43.443098 rx_firspass[1][1][6] = 0
4702 00:44:43.446499 rx_lastpass[1][1][6] = 0
4703 00:44:43.449326 rx_firspass[1][1][7] = 0
4704 00:44:43.449420 rx_lastpass[1][1][7] = 0
4705 00:44:43.452774 rx_firspass[1][1][8] = 0
4706 00:44:43.455946 rx_lastpass[1][1][8] = 0
4707 00:44:43.459052 rx_firspass[1][1][9] = 0
4708 00:44:43.459138 rx_lastpass[1][1][9] = 0
4709 00:44:43.462827 rx_firspass[1][1][10] = 0
4710 00:44:43.466039 rx_lastpass[1][1][10] = 0
4711 00:44:43.466133 rx_firspass[1][1][11] = 0
4712 00:44:43.469158 rx_lastpass[1][1][11] = 0
4713 00:44:43.472325 rx_firspass[1][1][12] = 0
4714 00:44:43.475677 rx_lastpass[1][1][12] = 0
4715 00:44:43.475771 rx_firspass[1][1][13] = 0
4716 00:44:43.479099 rx_lastpass[1][1][13] = 0
4717 00:44:43.482313 rx_firspass[1][1][14] = 0
4718 00:44:43.485316 rx_lastpass[1][1][14] = 0
4719 00:44:43.485410 rx_firspass[1][1][15] = 0
4720 00:44:43.488846 rx_lastpass[1][1][15] = 0
4721 00:44:43.491819 dump params clk_delay
4722 00:44:43.491913 clk_delay[0] = 0
4723 00:44:43.495203 clk_delay[1] = 0
4724 00:44:43.495296 dump params dqs_delay
4725 00:44:43.498414 dqs_delay[0][0] = 0
4726 00:44:43.498507 dqs_delay[0][1] = 0
4727 00:44:43.501936 dqs_delay[1][0] = 0
4728 00:44:43.502030 dqs_delay[1][1] = 0
4729 00:44:43.505292 dump params delay_cell_unit = 744
4730 00:44:43.508553 dump source = 0x0
4731 00:44:43.508647 dump params frequency:800
4732 00:44:43.511636 dump params rank number:2
4733 00:44:43.511730
4734 00:44:43.514798 dump params write leveling
4735 00:44:43.518203 write leveling[0][0][0] = 0x0
4736 00:44:43.521265 write leveling[0][0][1] = 0x0
4737 00:44:43.521358 write leveling[0][1][0] = 0x0
4738 00:44:43.524723 write leveling[0][1][1] = 0x0
4739 00:44:43.528122 write leveling[1][0][0] = 0x0
4740 00:44:43.531236 write leveling[1][0][1] = 0x0
4741 00:44:43.534562 write leveling[1][1][0] = 0x0
4742 00:44:43.537944 write leveling[1][1][1] = 0x0
4743 00:44:43.538037 dump params cbt_cs
4744 00:44:43.541134 cbt_cs[0][0] = 0x0
4745 00:44:43.541228 cbt_cs[0][1] = 0x0
4746 00:44:43.544529 cbt_cs[1][0] = 0x0
4747 00:44:43.544623 cbt_cs[1][1] = 0x0
4748 00:44:43.547515 dump params cbt_mr12
4749 00:44:43.547608 cbt_mr12[0][0] = 0x0
4750 00:44:43.551361 cbt_mr12[0][1] = 0x0
4751 00:44:43.551454 cbt_mr12[1][0] = 0x0
4752 00:44:43.554172 cbt_mr12[1][1] = 0x0
4753 00:44:43.557452 dump params tx window
4754 00:44:43.557546 tx_center_min[0][0][0] = 0
4755 00:44:43.560880 tx_center_max[0][0][0] = 0
4756 00:44:43.564136 tx_center_min[0][0][1] = 0
4757 00:44:43.567154 tx_center_max[0][0][1] = 0
4758 00:44:43.567248 tx_center_min[0][1][0] = 0
4759 00:44:43.570442 tx_center_max[0][1][0] = 0
4760 00:44:43.573984 tx_center_min[0][1][1] = 0
4761 00:44:43.576962 tx_center_max[0][1][1] = 0
4762 00:44:43.577055 tx_center_min[1][0][0] = 0
4763 00:44:43.580218 tx_center_max[1][0][0] = 0
4764 00:44:43.583682 tx_center_min[1][0][1] = 0
4765 00:44:43.587038 tx_center_max[1][0][1] = 0
4766 00:44:43.587132 tx_center_min[1][1][0] = 0
4767 00:44:43.590181 tx_center_max[1][1][0] = 0
4768 00:44:43.593314 tx_center_min[1][1][1] = 0
4769 00:44:43.596827 tx_center_max[1][1][1] = 0
4770 00:44:43.596920 dump params tx window
4771 00:44:43.599919 tx_win_center[0][0][0] = 0
4772 00:44:43.603202 tx_first_pass[0][0][0] = 0
4773 00:44:43.606436 tx_last_pass[0][0][0] = 0
4774 00:44:43.606531 tx_win_center[0][0][1] = 0
4775 00:44:43.609878 tx_first_pass[0][0][1] = 0
4776 00:44:43.613002 tx_last_pass[0][0][1] = 0
4777 00:44:43.613096 tx_win_center[0][0][2] = 0
4778 00:44:43.616320 tx_first_pass[0][0][2] = 0
4779 00:44:43.619593 tx_last_pass[0][0][2] = 0
4780 00:44:43.622987 tx_win_center[0][0][3] = 0
4781 00:44:43.623081 tx_first_pass[0][0][3] = 0
4782 00:44:43.626095 tx_last_pass[0][0][3] = 0
4783 00:44:43.629449 tx_win_center[0][0][4] = 0
4784 00:44:43.632973 tx_first_pass[0][0][4] = 0
4785 00:44:43.633067 tx_last_pass[0][0][4] = 0
4786 00:44:43.636051 tx_win_center[0][0][5] = 0
4787 00:44:43.639324 tx_first_pass[0][0][5] = 0
4788 00:44:43.642346 tx_last_pass[0][0][5] = 0
4789 00:44:43.642440 tx_win_center[0][0][6] = 0
4790 00:44:43.645798 tx_first_pass[0][0][6] = 0
4791 00:44:43.649027 tx_last_pass[0][0][6] = 0
4792 00:44:43.652278 tx_win_center[0][0][7] = 0
4793 00:44:43.652372 tx_first_pass[0][0][7] = 0
4794 00:44:43.655603 tx_last_pass[0][0][7] = 0
4795 00:44:43.658817 tx_win_center[0][0][8] = 0
4796 00:44:43.658910 tx_first_pass[0][0][8] = 0
4797 00:44:43.662210 tx_last_pass[0][0][8] = 0
4798 00:44:43.665458 tx_win_center[0][0][9] = 0
4799 00:44:43.668702 tx_first_pass[0][0][9] = 0
4800 00:44:43.668795 tx_last_pass[0][0][9] = 0
4801 00:44:43.672311 tx_win_center[0][0][10] = 0
4802 00:44:43.675104 tx_first_pass[0][0][10] = 0
4803 00:44:43.678351 tx_last_pass[0][0][10] = 0
4804 00:44:43.678445 tx_win_center[0][0][11] = 0
4805 00:44:43.681919 tx_first_pass[0][0][11] = 0
4806 00:44:43.685036 tx_last_pass[0][0][11] = 0
4807 00:44:43.688506 tx_win_center[0][0][12] = 0
4808 00:44:43.691754 tx_first_pass[0][0][12] = 0
4809 00:44:43.691848 tx_last_pass[0][0][12] = 0
4810 00:44:43.694767 tx_win_center[0][0][13] = 0
4811 00:44:43.698260 tx_first_pass[0][0][13] = 0
4812 00:44:43.701413 tx_last_pass[0][0][13] = 0
4813 00:44:43.701511 tx_win_center[0][0][14] = 0
4814 00:44:43.704578 tx_first_pass[0][0][14] = 0
4815 00:44:43.708169 tx_last_pass[0][0][14] = 0
4816 00:44:43.711144 tx_win_center[0][0][15] = 0
4817 00:44:43.711234 tx_first_pass[0][0][15] = 0
4818 00:44:43.714678 tx_last_pass[0][0][15] = 0
4819 00:44:43.717649 tx_win_center[0][1][0] = 0
4820 00:44:43.721265 tx_first_pass[0][1][0] = 0
4821 00:44:43.721356 tx_last_pass[0][1][0] = 0
4822 00:44:43.724210 tx_win_center[0][1][1] = 0
4823 00:44:43.727598 tx_first_pass[0][1][1] = 0
4824 00:44:43.731009 tx_last_pass[0][1][1] = 0
4825 00:44:43.731099 tx_win_center[0][1][2] = 0
4826 00:44:43.734339 tx_first_pass[0][1][2] = 0
4827 00:44:43.737265 tx_last_pass[0][1][2] = 0
4828 00:44:43.740614 tx_win_center[0][1][3] = 0
4829 00:44:43.740704 tx_first_pass[0][1][3] = 0
4830 00:44:43.743889 tx_last_pass[0][1][3] = 0
4831 00:44:43.747360 tx_win_center[0][1][4] = 0
4832 00:44:43.747450 tx_first_pass[0][1][4] = 0
4833 00:44:43.750496 tx_last_pass[0][1][4] = 0
4834 00:44:43.753756 tx_win_center[0][1][5] = 0
4835 00:44:43.757415 tx_first_pass[0][1][5] = 0
4836 00:44:43.757514 tx_last_pass[0][1][5] = 0
4837 00:44:43.760367 tx_win_center[0][1][6] = 0
4838 00:44:43.763696 tx_first_pass[0][1][6] = 0
4839 00:44:43.766821 tx_last_pass[0][1][6] = 0
4840 00:44:43.766911 tx_win_center[0][1][7] = 0
4841 00:44:43.770285 tx_first_pass[0][1][7] = 0
4842 00:44:43.773290 tx_last_pass[0][1][7] = 0
4843 00:44:43.776458 tx_win_center[0][1][8] = 0
4844 00:44:43.776547 tx_first_pass[0][1][8] = 0
4845 00:44:43.780060 tx_last_pass[0][1][8] = 0
4846 00:44:43.783292 tx_win_center[0][1][9] = 0
4847 00:44:43.786614 tx_first_pass[0][1][9] = 0
4848 00:44:43.786703 tx_last_pass[0][1][9] = 0
4849 00:44:43.789613 tx_win_center[0][1][10] = 0
4850 00:44:43.793167 tx_first_pass[0][1][10] = 0
4851 00:44:43.796372 tx_last_pass[0][1][10] = 0
4852 00:44:43.796462 tx_win_center[0][1][11] = 0
4853 00:44:43.799561 tx_first_pass[0][1][11] = 0
4854 00:44:43.802847 tx_last_pass[0][1][11] = 0
4855 00:44:43.806139 tx_win_center[0][1][12] = 0
4856 00:44:43.806229 tx_first_pass[0][1][12] = 0
4857 00:44:43.809361 tx_last_pass[0][1][12] = 0
4858 00:44:43.812862 tx_win_center[0][1][13] = 0
4859 00:44:43.816161 tx_first_pass[0][1][13] = 0
4860 00:44:43.816250 tx_last_pass[0][1][13] = 0
4861 00:44:43.819126 tx_win_center[0][1][14] = 0
4862 00:44:43.822554 tx_first_pass[0][1][14] = 0
4863 00:44:43.825837 tx_last_pass[0][1][14] = 0
4864 00:44:43.825928 tx_win_center[0][1][15] = 0
4865 00:44:43.829396 tx_first_pass[0][1][15] = 0
4866 00:44:43.832197 tx_last_pass[0][1][15] = 0
4867 00:44:43.835626 tx_win_center[1][0][0] = 0
4868 00:44:43.838893 tx_first_pass[1][0][0] = 0
4869 00:44:43.838983 tx_last_pass[1][0][0] = 0
4870 00:44:43.842140 tx_win_center[1][0][1] = 0
4871 00:44:43.845359 tx_first_pass[1][0][1] = 0
4872 00:44:43.845454 tx_last_pass[1][0][1] = 0
4873 00:44:43.848920 tx_win_center[1][0][2] = 0
4874 00:44:43.852195 tx_first_pass[1][0][2] = 0
4875 00:44:43.855183 tx_last_pass[1][0][2] = 0
4876 00:44:43.855273 tx_win_center[1][0][3] = 0
4877 00:44:43.858469 tx_first_pass[1][0][3] = 0
4878 00:44:43.861900 tx_last_pass[1][0][3] = 0
4879 00:44:43.864938 tx_win_center[1][0][4] = 0
4880 00:44:43.865028 tx_first_pass[1][0][4] = 0
4881 00:44:43.868518 tx_last_pass[1][0][4] = 0
4882 00:44:43.871655 tx_win_center[1][0][5] = 0
4883 00:44:43.874918 tx_first_pass[1][0][5] = 0
4884 00:44:43.875007 tx_last_pass[1][0][5] = 0
4885 00:44:43.878003 tx_win_center[1][0][6] = 0
4886 00:44:43.881480 tx_first_pass[1][0][6] = 0
4887 00:44:43.881571 tx_last_pass[1][0][6] = 0
4888 00:44:43.884546 tx_win_center[1][0][7] = 0
4889 00:44:43.887898 tx_first_pass[1][0][7] = 0
4890 00:44:43.891149 tx_last_pass[1][0][7] = 0
4891 00:44:43.891240 tx_win_center[1][0][8] = 0
4892 00:44:43.894670 tx_first_pass[1][0][8] = 0
4893 00:44:43.897604 tx_last_pass[1][0][8] = 0
4894 00:44:43.901123 tx_win_center[1][0][9] = 0
4895 00:44:43.901212 tx_first_pass[1][0][9] = 0
4896 00:44:43.904350 tx_last_pass[1][0][9] = 0
4897 00:44:43.907545 tx_win_center[1][0][10] = 0
4898 00:44:43.910834 tx_first_pass[1][0][10] = 0
4899 00:44:43.910923 tx_last_pass[1][0][10] = 0
4900 00:44:43.914163 tx_win_center[1][0][11] = 0
4901 00:44:43.917337 tx_first_pass[1][0][11] = 0
4902 00:44:43.920655 tx_last_pass[1][0][11] = 0
4903 00:44:43.920744 tx_win_center[1][0][12] = 0
4904 00:44:43.923906 tx_first_pass[1][0][12] = 0
4905 00:44:43.927357 tx_last_pass[1][0][12] = 0
4906 00:44:43.930391 tx_win_center[1][0][13] = 0
4907 00:44:43.933659 tx_first_pass[1][0][13] = 0
4908 00:44:43.933748 tx_last_pass[1][0][13] = 0
4909 00:44:43.937496 tx_win_center[1][0][14] = 0
4910 00:44:43.940338 tx_first_pass[1][0][14] = 0
4911 00:44:43.943385 tx_last_pass[1][0][14] = 0
4912 00:44:43.943475 tx_win_center[1][0][15] = 0
4913 00:44:43.946796 tx_first_pass[1][0][15] = 0
4914 00:44:43.950330 tx_last_pass[1][0][15] = 0
4915 00:44:43.953584 tx_win_center[1][1][0] = 0
4916 00:44:43.953674 tx_first_pass[1][1][0] = 0
4917 00:44:43.956601 tx_last_pass[1][1][0] = 0
4918 00:44:43.959890 tx_win_center[1][1][1] = 0
4919 00:44:43.962951 tx_first_pass[1][1][1] = 0
4920 00:44:43.963041 tx_last_pass[1][1][1] = 0
4921 00:44:43.966511 tx_win_center[1][1][2] = 0
4922 00:44:43.969710 tx_first_pass[1][1][2] = 0
4923 00:44:43.973116 tx_last_pass[1][1][2] = 0
4924 00:44:43.973205 tx_win_center[1][1][3] = 0
4925 00:44:43.976296 tx_first_pass[1][1][3] = 0
4926 00:44:43.979616 tx_last_pass[1][1][3] = 0
4927 00:44:43.979705 tx_win_center[1][1][4] = 0
4928 00:44:43.982791 tx_first_pass[1][1][4] = 0
4929 00:44:43.986108 tx_last_pass[1][1][4] = 0
4930 00:44:43.989346 tx_win_center[1][1][5] = 0
4931 00:44:43.989442 tx_first_pass[1][1][5] = 0
4932 00:44:43.992570 tx_last_pass[1][1][5] = 0
4933 00:44:43.995875 tx_win_center[1][1][6] = 0
4934 00:44:43.999123 tx_first_pass[1][1][6] = 0
4935 00:44:43.999212 tx_last_pass[1][1][6] = 0
4936 00:44:44.002619 tx_win_center[1][1][7] = 0
4937 00:44:44.005932 tx_first_pass[1][1][7] = 0
4938 00:44:44.008988 tx_last_pass[1][1][7] = 0
4939 00:44:44.009077 tx_win_center[1][1][8] = 0
4940 00:44:44.012251 tx_first_pass[1][1][8] = 0
4941 00:44:44.015534 tx_last_pass[1][1][8] = 0
4942 00:44:44.018693 tx_win_center[1][1][9] = 0
4943 00:44:44.018783 tx_first_pass[1][1][9] = 0
4944 00:44:44.022170 tx_last_pass[1][1][9] = 0
4945 00:44:44.025540 tx_win_center[1][1][10] = 0
4946 00:44:44.028598 tx_first_pass[1][1][10] = 0
4947 00:44:44.028687 tx_last_pass[1][1][10] = 0
4948 00:44:44.032020 tx_win_center[1][1][11] = 0
4949 00:44:44.035136 tx_first_pass[1][1][11] = 0
4950 00:44:44.038497 tx_last_pass[1][1][11] = 0
4951 00:44:44.038587 tx_win_center[1][1][12] = 0
4952 00:44:44.041863 tx_first_pass[1][1][12] = 0
4953 00:44:44.044995 tx_last_pass[1][1][12] = 0
4954 00:44:44.048405 tx_win_center[1][1][13] = 0
4955 00:44:44.048499 tx_first_pass[1][1][13] = 0
4956 00:44:44.051584 tx_last_pass[1][1][13] = 0
4957 00:44:44.054919 tx_win_center[1][1][14] = 0
4958 00:44:44.058146 tx_first_pass[1][1][14] = 0
4959 00:44:44.058237 tx_last_pass[1][1][14] = 0
4960 00:44:44.061609 tx_win_center[1][1][15] = 0
4961 00:44:44.064877 tx_first_pass[1][1][15] = 0
4962 00:44:44.067932 tx_last_pass[1][1][15] = 0
4963 00:44:44.068021 dump params rx window
4964 00:44:44.071243 rx_firspass[0][0][0] = 0
4965 00:44:44.074562 rx_lastpass[0][0][0] = 0
4966 00:44:44.074651 rx_firspass[0][0][1] = 0
4967 00:44:44.077928 rx_lastpass[0][0][1] = 0
4968 00:44:44.081110 rx_firspass[0][0][2] = 0
4969 00:44:44.081199 rx_lastpass[0][0][2] = 0
4970 00:44:44.084546 rx_firspass[0][0][3] = 0
4971 00:44:44.087751 rx_lastpass[0][0][3] = 0
4972 00:44:44.090968 rx_firspass[0][0][4] = 0
4973 00:44:44.091057 rx_lastpass[0][0][4] = 0
4974 00:44:44.094106 rx_firspass[0][0][5] = 0
4975 00:44:44.097785 rx_lastpass[0][0][5] = 0
4976 00:44:44.097875 rx_firspass[0][0][6] = 0
4977 00:44:44.100698 rx_lastpass[0][0][6] = 0
4978 00:44:44.104041 rx_firspass[0][0][7] = 0
4979 00:44:44.104129 rx_lastpass[0][0][7] = 0
4980 00:44:44.107234 rx_firspass[0][0][8] = 0
4981 00:44:44.110459 rx_lastpass[0][0][8] = 0
4982 00:44:44.113884 rx_firspass[0][0][9] = 0
4983 00:44:44.113973 rx_lastpass[0][0][9] = 0
4984 00:44:44.116972 rx_firspass[0][0][10] = 0
4985 00:44:44.120303 rx_lastpass[0][0][10] = 0
4986 00:44:44.120392 rx_firspass[0][0][11] = 0
4987 00:44:44.123674 rx_lastpass[0][0][11] = 0
4988 00:44:44.126982 rx_firspass[0][0][12] = 0
4989 00:44:44.130286 rx_lastpass[0][0][12] = 0
4990 00:44:44.130375 rx_firspass[0][0][13] = 0
4991 00:44:44.133548 rx_lastpass[0][0][13] = 0
4992 00:44:44.136994 rx_firspass[0][0][14] = 0
4993 00:44:44.137084 rx_lastpass[0][0][14] = 0
4994 00:44:44.139959 rx_firspass[0][0][15] = 0
4995 00:44:44.143289 rx_lastpass[0][0][15] = 0
4996 00:44:44.146694 rx_firspass[0][1][0] = 0
4997 00:44:44.146784 rx_lastpass[0][1][0] = 0
4998 00:44:44.149699 rx_firspass[0][1][1] = 0
4999 00:44:44.153139 rx_lastpass[0][1][1] = 0
5000 00:44:44.153228 rx_firspass[0][1][2] = 0
5001 00:44:44.156785 rx_lastpass[0][1][2] = 0
5002 00:44:44.159667 rx_firspass[0][1][3] = 0
5003 00:44:44.162919 rx_lastpass[0][1][3] = 0
5004 00:44:44.163008 rx_firspass[0][1][4] = 0
5005 00:44:44.166156 rx_lastpass[0][1][4] = 0
5006 00:44:44.169643 rx_firspass[0][1][5] = 0
5007 00:44:44.169733 rx_lastpass[0][1][5] = 0
5008 00:44:44.172878 rx_firspass[0][1][6] = 0
5009 00:44:44.176490 rx_lastpass[0][1][6] = 0
5010 00:44:44.176580 rx_firspass[0][1][7] = 0
5011 00:44:44.179317 rx_lastpass[0][1][7] = 0
5012 00:44:44.182672 rx_firspass[0][1][8] = 0
5013 00:44:44.182761 rx_lastpass[0][1][8] = 0
5014 00:44:44.185794 rx_firspass[0][1][9] = 0
5015 00:44:44.189440 rx_lastpass[0][1][9] = 0
5016 00:44:44.192447 rx_firspass[0][1][10] = 0
5017 00:44:44.192544 rx_lastpass[0][1][10] = 0
5018 00:44:44.195711 rx_firspass[0][1][11] = 0
5019 00:44:44.198924 rx_lastpass[0][1][11] = 0
5020 00:44:44.199013 rx_firspass[0][1][12] = 0
5021 00:44:44.202120 rx_lastpass[0][1][12] = 0
5022 00:44:44.205545 rx_firspass[0][1][13] = 0
5023 00:44:44.208668 rx_lastpass[0][1][13] = 0
5024 00:44:44.208757 rx_firspass[0][1][14] = 0
5025 00:44:44.212044 rx_lastpass[0][1][14] = 0
5026 00:44:44.215655 rx_firspass[0][1][15] = 0
5027 00:44:44.218613 rx_lastpass[0][1][15] = 0
5028 00:44:44.218702 rx_firspass[1][0][0] = 0
5029 00:44:44.221792 rx_lastpass[1][0][0] = 0
5030 00:44:44.225439 rx_firspass[1][0][1] = 0
5031 00:44:44.225530 rx_lastpass[1][0][1] = 0
5032 00:44:44.228307 rx_firspass[1][0][2] = 0
5033 00:44:44.231692 rx_lastpass[1][0][2] = 0
5034 00:44:44.231781 rx_firspass[1][0][3] = 0
5035 00:44:44.234966 rx_lastpass[1][0][3] = 0
5036 00:44:44.238321 rx_firspass[1][0][4] = 0
5037 00:44:44.241457 rx_lastpass[1][0][4] = 0
5038 00:44:44.241546 rx_firspass[1][0][5] = 0
5039 00:44:44.244657 rx_lastpass[1][0][5] = 0
5040 00:44:44.248338 rx_firspass[1][0][6] = 0
5041 00:44:44.248428 rx_lastpass[1][0][6] = 0
5042 00:44:44.251358 rx_firspass[1][0][7] = 0
5043 00:44:44.254512 rx_lastpass[1][0][7] = 0
5044 00:44:44.254602 rx_firspass[1][0][8] = 0
5045 00:44:44.257738 rx_lastpass[1][0][8] = 0
5046 00:44:44.260918 rx_firspass[1][0][9] = 0
5047 00:44:44.264525 rx_lastpass[1][0][9] = 0
5048 00:44:44.264614 rx_firspass[1][0][10] = 0
5049 00:44:44.267669 rx_lastpass[1][0][10] = 0
5050 00:44:44.271053 rx_firspass[1][0][11] = 0
5051 00:44:44.271142 rx_lastpass[1][0][11] = 0
5052 00:44:44.274228 rx_firspass[1][0][12] = 0
5053 00:44:44.277640 rx_lastpass[1][0][12] = 0
5054 00:44:44.280981 rx_firspass[1][0][13] = 0
5055 00:44:44.281070 rx_lastpass[1][0][13] = 0
5056 00:44:44.283898 rx_firspass[1][0][14] = 0
5057 00:44:44.287267 rx_lastpass[1][0][14] = 0
5058 00:44:44.287357 rx_firspass[1][0][15] = 0
5059 00:44:44.290594 rx_lastpass[1][0][15] = 0
5060 00:44:44.293766 rx_firspass[1][1][0] = 0
5061 00:44:44.297067 rx_lastpass[1][1][0] = 0
5062 00:44:44.297157 rx_firspass[1][1][1] = 0
5063 00:44:44.300373 rx_lastpass[1][1][1] = 0
5064 00:44:44.303920 rx_firspass[1][1][2] = 0
5065 00:44:44.304010 rx_lastpass[1][1][2] = 0
5066 00:44:44.307123 rx_firspass[1][1][3] = 0
5067 00:44:44.310350 rx_lastpass[1][1][3] = 0
5068 00:44:44.310441 rx_firspass[1][1][4] = 0
5069 00:44:44.313700 rx_lastpass[1][1][4] = 0
5070 00:44:44.316796 rx_firspass[1][1][5] = 0
5071 00:44:44.320094 rx_lastpass[1][1][5] = 0
5072 00:44:44.320184 rx_firspass[1][1][6] = 0
5073 00:44:44.323230 rx_lastpass[1][1][6] = 0
5074 00:44:44.326501 rx_firspass[1][1][7] = 0
5075 00:44:44.326591 rx_lastpass[1][1][7] = 0
5076 00:44:44.329991 rx_firspass[1][1][8] = 0
5077 00:44:44.333330 rx_lastpass[1][1][8] = 0
5078 00:44:44.333421 rx_firspass[1][1][9] = 0
5079 00:44:44.336435 rx_lastpass[1][1][9] = 0
5080 00:44:44.339912 rx_firspass[1][1][10] = 0
5081 00:44:44.342980 rx_lastpass[1][1][10] = 0
5082 00:44:44.343071 rx_firspass[1][1][11] = 0
5083 00:44:44.346194 rx_lastpass[1][1][11] = 0
5084 00:44:44.349307 rx_firspass[1][1][12] = 0
5085 00:44:44.352750 rx_lastpass[1][1][12] = 0
5086 00:44:44.352840 rx_firspass[1][1][13] = 0
5087 00:44:44.356155 rx_lastpass[1][1][13] = 0
5088 00:44:44.359283 rx_firspass[1][1][14] = 0
5089 00:44:44.359373 rx_lastpass[1][1][14] = 0
5090 00:44:44.362422 rx_firspass[1][1][15] = 0
5091 00:44:44.365935 rx_lastpass[1][1][15] = 0
5092 00:44:44.366026 dump params clk_delay
5093 00:44:44.369133 clk_delay[0] = 0
5094 00:44:44.369224 clk_delay[1] = 0
5095 00:44:44.372368 dump params dqs_delay
5096 00:44:44.375566 dqs_delay[0][0] = 0
5097 00:44:44.375653 dqs_delay[0][1] = 0
5098 00:44:44.379197 dqs_delay[1][0] = 0
5099 00:44:44.379283 dqs_delay[1][1] = 0
5100 00:44:44.382008 dump params delay_cell_unit = 744
5101 00:44:44.385283 mt_set_emi_preloader end
5102 00:44:44.388814 [mt_mem_init] dram size: 0x100000000, rank number: 2
5103 00:44:44.395260 [complex_mem_test] start addr:0x40000000, len:20480
5104 00:44:44.430844 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5105 00:44:44.437418 [complex_mem_test] start addr:0x80000000, len:20480
5106 00:44:44.472929 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5107 00:44:44.479704 [complex_mem_test] start addr:0xc0000000, len:20480
5108 00:44:44.515370 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5109 00:44:44.522045 [complex_mem_test] start addr:0x56000000, len:8192
5110 00:44:44.538589 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5111 00:44:44.542004 ddr_geometry:1
5112 00:44:44.544983 [complex_mem_test] start addr:0x80000000, len:8192
5113 00:44:44.562531 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5114 00:44:44.565576 dram_init: dram init end (result: 0)
5115 00:44:44.572176 Successfully loaded DRAM blobs and ran DRAM calibration
5116 00:44:44.582335 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5117 00:44:44.582428 CBMEM:
5118 00:44:44.585278 IMD: root @ 00000000fffff000 254 entries.
5119 00:44:44.588550 IMD: root @ 00000000ffffec00 62 entries.
5120 00:44:44.595479 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5121 00:44:44.601883 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5122 00:44:44.605183 in-header: 03 a1 00 00 08 00 00 00
5123 00:44:44.608428 in-data: 84 60 60 10 00 00 00 00
5124 00:44:44.611676 Chrome EC: clear events_b mask to 0x0000000020004000
5125 00:44:44.618124 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5126 00:44:44.622099 in-header: 03 fd 00 00 00 00 00 00
5127 00:44:44.625732 in-data:
5128 00:44:44.628359 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5129 00:44:44.631672 CBFS @ 21000 size 3d4000
5130 00:44:44.635120 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5131 00:44:44.638435 CBFS: Locating 'fallback/ramstage'
5132 00:44:44.641911 CBFS: Found @ offset 10d40 size d563
5133 00:44:44.664273 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5134 00:44:44.676494 Accumulated console time in romstage 13479 ms
5135 00:44:44.676586
5136 00:44:44.676657
5137 00:44:44.686411 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5138 00:44:44.689454 ARM64: Exception handlers installed.
5139 00:44:44.689544 ARM64: Testing exception
5140 00:44:44.692913 ARM64: Done test exception
5141 00:44:44.696205 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5142 00:44:44.699436 Manufacturer: ef
5143 00:44:44.705976 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5144 00:44:44.709290 WARNING: RO_VPD is uninitialized or empty.
5145 00:44:44.712510 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5146 00:44:44.715797 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5147 00:44:44.726286 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5148 00:44:44.729318 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5149 00:44:44.736012 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5150 00:44:44.736106 Enumerating buses...
5151 00:44:44.742563 Show all devs... Before device enumeration.
5152 00:44:44.742658 Root Device: enabled 1
5153 00:44:44.745931 CPU_CLUSTER: 0: enabled 1
5154 00:44:44.746025 CPU: 00: enabled 1
5155 00:44:44.749010 Compare with tree...
5156 00:44:44.752487 Root Device: enabled 1
5157 00:44:44.752581 CPU_CLUSTER: 0: enabled 1
5158 00:44:44.755771 CPU: 00: enabled 1
5159 00:44:44.759037 Root Device scanning...
5160 00:44:44.762403 root_dev_scan_bus for Root Device
5161 00:44:44.762497 CPU_CLUSTER: 0 enabled
5162 00:44:44.765826 root_dev_scan_bus for Root Device done
5163 00:44:44.772091 scan_bus: scanning of bus Root Device took 10690 usecs
5164 00:44:44.772185 done
5165 00:44:44.775468 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5166 00:44:44.778846 Allocating resources...
5167 00:44:44.781921 Reading resources...
5168 00:44:44.785305 Root Device read_resources bus 0 link: 0
5169 00:44:44.788586 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5170 00:44:44.791906 CPU: 00 missing read_resources
5171 00:44:44.795131 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5172 00:44:44.798257 Root Device read_resources bus 0 link: 0 done
5173 00:44:44.801580 Done reading resources.
5174 00:44:44.804850 Show resources in subtree (Root Device)...After reading.
5175 00:44:44.811537 Root Device child on link 0 CPU_CLUSTER: 0
5176 00:44:44.814595 CPU_CLUSTER: 0 child on link 0 CPU: 00
5177 00:44:44.821292 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5178 00:44:44.824562 CPU: 00
5179 00:44:44.824656 Setting resources...
5180 00:44:44.827739 Root Device assign_resources, bus 0 link: 0
5181 00:44:44.831043 CPU_CLUSTER: 0 missing set_resources
5182 00:44:44.837714 Root Device assign_resources, bus 0 link: 0
5183 00:44:44.837809 Done setting resources.
5184 00:44:44.844509 Show resources in subtree (Root Device)...After assigning values.
5185 00:44:44.847492 Root Device child on link 0 CPU_CLUSTER: 0
5186 00:44:44.851016 CPU_CLUSTER: 0 child on link 0 CPU: 00
5187 00:44:44.860536 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5188 00:44:44.860632 CPU: 00
5189 00:44:44.864229 Done allocating resources.
5190 00:44:44.870635 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5191 00:44:44.870730 Enabling resources...
5192 00:44:44.870851 done.
5193 00:44:44.876944 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5194 00:44:44.877036 Initializing devices...
5195 00:44:44.880045 Root Device init ...
5196 00:44:44.883396 mainboard_init: Starting display init.
5197 00:44:44.886821 ADC[4]: Raw value=76192 ID=0
5198 00:44:44.908904 anx7625_power_on_init: Init interface.
5199 00:44:44.912208 anx7625_disable_pd_protocol: Disabled PD feature.
5200 00:44:44.918853 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5201 00:44:44.975614 anx7625_start_dp_work: Secure OCM version=00
5202 00:44:44.978839 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5203 00:44:44.996324 sp_tx_get_edid_block: EDID Block = 1
5204 00:44:45.113573 Extracted contents:
5205 00:44:45.116623 header: 00 ff ff ff ff ff ff 00
5206 00:44:45.120252 serial number: 06 af 5c 14 00 00 00 00 00 1a
5207 00:44:45.123196 version: 01 04
5208 00:44:45.126478 basic params: 95 1a 0e 78 02
5209 00:44:45.129882 chroma info: 99 85 95 55 56 92 28 22 50 54
5210 00:44:45.133320 established: 00 00 00
5211 00:44:45.139796 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5212 00:44:45.146461 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5213 00:44:45.149737 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5214 00:44:45.156210 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5215 00:44:45.162668 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5216 00:44:45.165742 extensions: 00
5217 00:44:45.165830 checksum: ae
5218 00:44:45.165899
5219 00:44:45.172432 Manufacturer: AUO Model 145c Serial Number 0
5220 00:44:45.172520 Made week 0 of 2016
5221 00:44:45.175710 EDID version: 1.4
5222 00:44:45.175800 Digital display
5223 00:44:45.178967 6 bits per primary color channel
5224 00:44:45.182115 DisplayPort interface
5225 00:44:45.185462 Maximum image size: 26 cm x 14 cm
5226 00:44:45.185556 Gamma: 220%
5227 00:44:45.185651 Check DPMS levels
5228 00:44:45.189137 Supported color formats: RGB 4:4:4
5229 00:44:45.192058 First detailed timing is preferred timing
5230 00:44:45.195311 Established timings supported:
5231 00:44:45.198717 Standard timings supported:
5232 00:44:45.201888 Detailed timings
5233 00:44:45.205104 Hex of detail: ce1d56ea50001a3030204600009010000018
5234 00:44:45.208539 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5235 00:44:45.215167 0556 0586 05a6 0640 hborder 0
5236 00:44:45.218644 0300 0304 030a 031a vborder 0
5237 00:44:45.221717 -hsync -vsync
5238 00:44:45.221811 Did detailed timing
5239 00:44:45.228013 Hex of detail: 0000000f0000000000000000000000000020
5240 00:44:45.231437 Manufacturer-specified data, tag 15
5241 00:44:45.234906 Hex of detail: 000000fe0041554f0a202020202020202020
5242 00:44:45.237971 ASCII string: AUO
5243 00:44:45.241165 Hex of detail: 000000fe004231313658414230312e34200a
5244 00:44:45.244705 ASCII string: B116XAB01.4
5245 00:44:45.244798 Checksum
5246 00:44:45.247763 Checksum: 0xae (valid)
5247 00:44:45.251135 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5248 00:44:45.254143 DSI data_rate: 457800000 bps
5249 00:44:45.260754 anx7625_parse_edid: set default k value to 0x3d for panel
5250 00:44:45.264142 anx7625_parse_edid: pixelclock(76300).
5251 00:44:45.267362 hactive(1366), hsync(32), hfp(48), hbp(154)
5252 00:44:45.270664 vactive(768), vsync(6), vfp(4), vbp(16)
5253 00:44:45.273818 anx7625_dsi_config: config dsi.
5254 00:44:45.281667 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5255 00:44:45.302808 anx7625_dsi_config: success to config DSI
5256 00:44:45.306124 anx7625_dp_start: MIPI phy setup OK.
5257 00:44:45.309303 [SSUSB] Setting up USB HOST controller...
5258 00:44:45.312615 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5259 00:44:45.315932 [SSUSB] phy power-on done.
5260 00:44:45.319682 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5261 00:44:45.322859 in-header: 03 fc 01 00 00 00 00 00
5262 00:44:45.322950 in-data:
5263 00:44:45.329707 handle_proto3_response: EC response with error code: 1
5264 00:44:45.329798 SPM: pcm index = 1
5265 00:44:45.335825 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5266 00:44:45.335917 CBFS @ 21000 size 3d4000
5267 00:44:45.342460 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5268 00:44:45.345974 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5269 00:44:45.349012 CBFS: Found @ offset 1e7c0 size 1026
5270 00:44:45.355496 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5271 00:44:45.358736 SPM: binary array size = 2988
5272 00:44:45.362030 SPM: version = pcm_allinone_v1.17.2_20180829
5273 00:44:45.365230 SPM binary loaded in 32 msecs
5274 00:44:45.373736 spm_kick_im_to_fetch: ptr = 000000004021eec2
5275 00:44:45.377203 spm_kick_im_to_fetch: len = 2988
5276 00:44:45.377297 SPM: spm_kick_pcm_to_run
5277 00:44:45.380354 SPM: spm_kick_pcm_to_run done
5278 00:44:45.383827 SPM: spm_init done in 52 msecs
5279 00:44:45.387110 Root Device init finished in 505265 usecs
5280 00:44:45.390418 CPU_CLUSTER: 0 init ...
5281 00:44:45.399948 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5282 00:44:45.403287 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5283 00:44:45.406680 CBFS @ 21000 size 3d4000
5284 00:44:45.410003 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5285 00:44:45.413137 CBFS: Locating 'sspm.bin'
5286 00:44:45.416562 CBFS: Found @ offset 208c0 size 41cb
5287 00:44:45.427069 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5288 00:44:45.435032 CPU_CLUSTER: 0 init finished in 42802 usecs
5289 00:44:45.435125 Devices initialized
5290 00:44:45.438130 Show all devs... After init.
5291 00:44:45.441568 Root Device: enabled 1
5292 00:44:45.441661 CPU_CLUSTER: 0: enabled 1
5293 00:44:45.444692 CPU: 00: enabled 1
5294 00:44:45.448243 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5295 00:44:45.454502 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5296 00:44:45.457923 ELOG: NV offset 0x558000 size 0x1000
5297 00:44:45.461214 read SPI 0x558000 0x1000: 1262 us, 3245 KB/s, 25.960 Mbps
5298 00:44:45.468948 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5299 00:44:45.474513 ELOG: Event(17) added with size 13 at 2024-06-16 00:44:45 UTC
5300 00:44:45.477541 out: cmd=0x121: 03 db 21 01 00 00 00 00
5301 00:44:45.480678 in-header: 03 9f 00 00 2c 00 00 00
5302 00:44:45.493734 in-data: ae 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 37 87 08 00 06 80 00 00 08 67 23 00 06 80 00 00 23 df 01 00 06 80 00 00 c6 ed 02 00
5303 00:44:45.496847 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5304 00:44:45.500117 in-header: 03 19 00 00 08 00 00 00
5305 00:44:45.503621 in-data: a2 e0 47 00 13 00 00 00
5306 00:44:45.506849 Chrome EC: UHEPI supported
5307 00:44:45.513208 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5308 00:44:45.516722 in-header: 03 e1 00 00 08 00 00 00
5309 00:44:45.519992 in-data: 84 20 60 10 00 00 00 00
5310 00:44:45.523137 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5311 00:44:45.529568 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5312 00:44:45.532802 in-header: 03 e1 00 00 08 00 00 00
5313 00:44:45.536369 in-data: 84 20 60 10 00 00 00 00
5314 00:44:45.542561 ELOG: Event(A1) added with size 10 at 2024-06-16 00:44:45 UTC
5315 00:44:45.549046 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5316 00:44:45.552514 ELOG: Event(A0) added with size 9 at 2024-06-16 00:44:45 UTC
5317 00:44:45.559239 elog_add_boot_reason: Logged dev mode boot
5318 00:44:45.559328 Finalize devices...
5319 00:44:45.562184 Devices finalized
5320 00:44:45.565457 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5321 00:44:45.571877 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5322 00:44:45.575177 ELOG: Event(91) added with size 10 at 2024-06-16 00:44:45 UTC
5323 00:44:45.578635 Writing coreboot table at 0xffeda000
5324 00:44:45.585157 0. 0000000000114000-000000000011efff: RAMSTAGE
5325 00:44:45.588514 1. 0000000040000000-000000004023cfff: RAMSTAGE
5326 00:44:45.591553 2. 000000004023d000-00000000545fffff: RAM
5327 00:44:45.594956 3. 0000000054600000-000000005465ffff: BL31
5328 00:44:45.598092 4. 0000000054660000-00000000ffed9fff: RAM
5329 00:44:45.604595 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5330 00:44:45.607983 6. 0000000100000000-000000013fffffff: RAM
5331 00:44:45.611315 Passing 5 GPIOs to payload:
5332 00:44:45.614629 NAME | PORT | POLARITY | VALUE
5333 00:44:45.621246 write protect | 0x00000096 | low | high
5334 00:44:45.624399 EC in RW | 0x000000b1 | high | undefined
5335 00:44:45.630965 EC interrupt | 0x00000097 | low | undefined
5336 00:44:45.634157 TPM interrupt | 0x00000099 | high | undefined
5337 00:44:45.637597 speaker enable | 0x000000af | high | undefined
5338 00:44:45.640905 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5339 00:44:45.644162 in-header: 03 f7 00 00 02 00 00 00
5340 00:44:45.647446 in-data: 04 00
5341 00:44:45.647541 Board ID: 4
5342 00:44:45.650474 ADC[3]: Raw value=215404 ID=1
5343 00:44:45.650568 RAM code: 1
5344 00:44:45.653963 SKU ID: 16
5345 00:44:45.657259 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5346 00:44:45.660144 CBFS @ 21000 size 3d4000
5347 00:44:45.663440 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5348 00:44:45.670121 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 3f41
5349 00:44:45.673403 coreboot table: 940 bytes.
5350 00:44:45.676733 IMD ROOT 0. 00000000fffff000 00001000
5351 00:44:45.680063 IMD SMALL 1. 00000000ffffe000 00001000
5352 00:44:45.683321 CONSOLE 2. 00000000fffde000 00020000
5353 00:44:45.686560 FMAP 3. 00000000fffdd000 0000047c
5354 00:44:45.693010 TIME STAMP 4. 00000000fffdc000 00000910
5355 00:44:45.696542 RAMOOPS 5. 00000000ffedc000 00100000
5356 00:44:45.699795 COREBOOT 6. 00000000ffeda000 00002000
5357 00:44:45.699890 IMD small region:
5358 00:44:45.702843 IMD ROOT 0. 00000000ffffec00 00000400
5359 00:44:45.709771 VBOOT WORK 1. 00000000ffffeb00 00000100
5360 00:44:45.712897 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5361 00:44:45.716115 VPD 3. 00000000ffffea60 0000006c
5362 00:44:45.719253 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5363 00:44:45.725644 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5364 00:44:45.729303 in-header: 03 e1 00 00 08 00 00 00
5365 00:44:45.732428 in-data: 84 20 60 10 00 00 00 00
5366 00:44:45.739015 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5367 00:44:45.739111 CBFS @ 21000 size 3d4000
5368 00:44:45.745260 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5369 00:44:45.748543 CBFS: Locating 'fallback/payload'
5370 00:44:45.756809 CBFS: Found @ offset dc040 size 439a0
5371 00:44:45.844469 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5372 00:44:45.847823 Checking segment from ROM address 0x0000000040003a00
5373 00:44:45.854285 Checking segment from ROM address 0x0000000040003a1c
5374 00:44:45.857572 Loading segment from ROM address 0x0000000040003a00
5375 00:44:45.860902 code (compression=0)
5376 00:44:45.870872 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5377 00:44:45.877236 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5378 00:44:45.880423 it's not compressed!
5379 00:44:45.883689 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5380 00:44:45.890203 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5381 00:44:45.899372 Loading segment from ROM address 0x0000000040003a1c
5382 00:44:45.902061 Entry Point 0x0000000080000000
5383 00:44:45.902155 Loaded segments
5384 00:44:45.908613 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5385 00:44:45.911864 Jumping to boot code at 0000000080000000(00000000ffeda000)
5386 00:44:45.921877 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5387 00:44:45.928418 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5388 00:44:45.928514 CBFS @ 21000 size 3d4000
5389 00:44:45.934895 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5390 00:44:45.938029 CBFS: Locating 'fallback/bl31'
5391 00:44:45.941318 CBFS: Found @ offset 36dc0 size 5820
5392 00:44:45.952904 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5393 00:44:45.956210 Checking segment from ROM address 0x0000000040003a00
5394 00:44:45.962469 Checking segment from ROM address 0x0000000040003a1c
5395 00:44:45.965885 Loading segment from ROM address 0x0000000040003a00
5396 00:44:45.969095 code (compression=1)
5397 00:44:45.978774 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5398 00:44:45.985323 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5399 00:44:45.985454 using LZMA
5400 00:44:45.994657 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5401 00:44:46.001225 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5402 00:44:46.004279 Loading segment from ROM address 0x0000000040003a1c
5403 00:44:46.007780 Entry Point 0x0000000054601000
5404 00:44:46.007874 Loaded segments
5405 00:44:46.010840 NOTICE: MT8183 bl31_setup
5406 00:44:46.018423 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5407 00:44:46.021404 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5408 00:44:46.024944 INFO: [DEVAPC] dump DEVAPC registers:
5409 00:44:46.034617 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5410 00:44:46.041102 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5411 00:44:46.051049 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5412 00:44:46.057675 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5413 00:44:46.067514 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5414 00:44:46.074076 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5415 00:44:46.083932 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5416 00:44:46.090309 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5417 00:44:46.100308 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5418 00:44:46.107121 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5419 00:44:46.116837 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5420 00:44:46.123347 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5421 00:44:46.132880 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5422 00:44:46.139456 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5423 00:44:46.146258 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5424 00:44:46.155857 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5425 00:44:46.162508 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5426 00:44:46.169257 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5427 00:44:46.175955 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5428 00:44:46.182249 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5429 00:44:46.191856 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5430 00:44:46.198483 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5431 00:44:46.201848 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5432 00:44:46.205260 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5433 00:44:46.208365 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5434 00:44:46.211396 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5435 00:44:46.214991 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5436 00:44:46.221378 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5437 00:44:46.224709 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5438 00:44:46.228275 WARNING: region 0:
5439 00:44:46.231208 WARNING: apc:0x168, sa:0x0, ea:0xfff
5440 00:44:46.231295 WARNING: region 1:
5441 00:44:46.237950 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5442 00:44:46.238037 WARNING: region 2:
5443 00:44:46.241295 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5444 00:44:46.244452 WARNING: region 3:
5445 00:44:46.248039 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5446 00:44:46.248126 WARNING: region 4:
5447 00:44:46.254287 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5448 00:44:46.254374 WARNING: region 5:
5449 00:44:46.257625 WARNING: apc:0x0, sa:0x0, ea:0x0
5450 00:44:46.260844 WARNING: region 6:
5451 00:44:46.260930 WARNING: apc:0x0, sa:0x0, ea:0x0
5452 00:44:46.264238 WARNING: region 7:
5453 00:44:46.267563 WARNING: apc:0x0, sa:0x0, ea:0x0
5454 00:44:46.274102 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5455 00:44:46.277259 INFO: SPM: enable SPMC mode
5456 00:44:46.280735 NOTICE: spm_boot_init() start
5457 00:44:46.283898 NOTICE: spm_boot_init() end
5458 00:44:46.287121 INFO: BL31: Initializing runtime services
5459 00:44:46.293682 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5460 00:44:46.296853 INFO: BL31: Preparing for EL3 exit to normal world
5461 00:44:46.300250 INFO: Entry point address = 0x80000000
5462 00:44:46.303302 INFO: SPSR = 0x8
5463 00:44:46.324860
5464 00:44:46.324949
5465 00:44:46.325018
5466 00:44:46.325500 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5467 00:44:46.325609 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5468 00:44:46.325698 Setting prompt string to ['jacuzzi:']
5469 00:44:46.325785 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5470 00:44:46.328149 Starting depthcharge on Juniper...
5471 00:44:46.328238
5472 00:44:46.331509 vboot_handoff: creating legacy vboot_handoff structure
5473 00:44:46.331598
5474 00:44:46.334777 ec_init(0): CrosEC protocol v3 supported (544, 544)
5475 00:44:46.338117
5476 00:44:46.338205 Wipe memory regions:
5477 00:44:46.338275
5478 00:44:46.341272 [0x00000040000000, 0x00000054600000)
5479 00:44:46.384472
5480 00:44:46.384562 [0x00000054660000, 0x00000080000000)
5481 00:44:46.475730
5482 00:44:46.475835 [0x000000811994a0, 0x000000ffeda000)
5483 00:44:46.735656
5484 00:44:46.735790 [0x00000100000000, 0x00000140000000)
5485 00:44:46.868115
5486 00:44:46.871320 Initializing XHCI USB controller at 0x11200000.
5487 00:44:46.894254
5488 00:44:46.897788 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5489 00:44:46.897876
5490 00:44:46.897944
5491 00:44:46.898229 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5493 00:44:46.998588 jacuzzi: tftpboot 192.168.201.1 14368378/tftp-deploy-kyzcmmi4/kernel/image.itb 14368378/tftp-deploy-kyzcmmi4/kernel/cmdline
5494 00:44:46.998732 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5495 00:44:46.998819 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5496 00:44:47.002835 tftpboot 192.168.201.1 14368378/tftp-deploy-kyzcmmi4/kernel/image.itp-deploy-kyzcmmi4/kernel/cmdline
5497 00:44:47.002927
5498 00:44:47.002999 Waiting for link
5499 00:44:47.408358
5500 00:44:47.408506 R8152: Initializing
5501 00:44:47.408579
5502 00:44:47.411537 Version 9 (ocp_data = 6010)
5503 00:44:47.411624
5504 00:44:47.414836 R8152: Done initializing
5505 00:44:47.414923
5506 00:44:47.414992 Adding net device
5507 00:44:47.800709
5508 00:44:47.800853 done.
5509 00:44:47.800925
5510 00:44:47.800988 MAC: 00:e0:4c:78:85:cb
5511 00:44:47.801051
5512 00:44:47.803772 Sending DHCP discover... done.
5513 00:44:47.803861
5514 00:44:47.807081 Waiting for reply... done.
5515 00:44:47.807168
5516 00:44:47.810126 Sending DHCP request... done.
5517 00:44:47.810216
5518 00:44:47.815383 Waiting for reply... done.
5519 00:44:47.815470
5520 00:44:47.815539 My ip is 192.168.201.22
5521 00:44:47.815603
5522 00:44:47.818946 The DHCP server ip is 192.168.201.1
5523 00:44:47.819033
5524 00:44:47.825263 TFTP server IP predefined by user: 192.168.201.1
5525 00:44:47.825379
5526 00:44:47.832140 Bootfile predefined by user: 14368378/tftp-deploy-kyzcmmi4/kernel/image.itb
5527 00:44:47.832227
5528 00:44:47.835400 Sending tftp read request... done.
5529 00:44:47.835487
5530 00:44:47.839036 Waiting for the transfer...
5531 00:44:47.839125
5532 00:44:48.101316 00000000 ################################################################
5533 00:44:48.101476
5534 00:44:48.373224 00080000 ################################################################
5535 00:44:48.373379
5536 00:44:48.630044 00100000 ################################################################
5537 00:44:48.630186
5538 00:44:48.894429 00180000 ################################################################
5539 00:44:48.894626
5540 00:44:49.200661 00200000 ################################################################
5541 00:44:49.200863
5542 00:44:49.492179 00280000 ################################################################
5543 00:44:49.492325
5544 00:44:49.783732 00300000 ################################################################
5545 00:44:49.783876
5546 00:44:50.087156 00380000 ################################################################
5547 00:44:50.087305
5548 00:44:50.380889 00400000 ################################################################
5549 00:44:50.381057
5550 00:44:50.670452 00480000 ################################################################
5551 00:44:50.670608
5552 00:44:50.949949 00500000 ################################################################
5553 00:44:50.950107
5554 00:44:51.227189 00580000 ################################################################
5555 00:44:51.227346
5556 00:44:51.486294 00600000 ################################################################
5557 00:44:51.486447
5558 00:44:51.742180 00680000 ################################################################
5559 00:44:51.742334
5560 00:44:51.995713 00700000 ################################################################
5561 00:44:51.995862
5562 00:44:52.253079 00780000 ################################################################
5563 00:44:52.253239
5564 00:44:52.508792 00800000 ################################################################
5565 00:44:52.508947
5566 00:44:52.764330 00880000 ################################################################
5567 00:44:52.764476
5568 00:44:53.022309 00900000 ################################################################
5569 00:44:53.022463
5570 00:44:53.278576 00980000 ################################################################
5571 00:44:53.278722
5572 00:44:53.532348 00a00000 ################################################################
5573 00:44:53.532502
5574 00:44:53.787825 00a80000 ################################################################
5575 00:44:53.787980
5576 00:44:54.054985 00b00000 ################################################################
5577 00:44:54.055140
5578 00:44:54.315328 00b80000 ################################################################
5579 00:44:54.315490
5580 00:44:54.595461 00c00000 ################################################################
5581 00:44:54.595621
5582 00:44:54.851290 00c80000 ################################################################
5583 00:44:54.851450
5584 00:44:55.106207 00d00000 ################################################################
5585 00:44:55.106369
5586 00:44:55.361335 00d80000 ################################################################
5587 00:44:55.361517
5588 00:44:55.637144 00e00000 ################################################################
5589 00:44:55.637331
5590 00:44:55.894073 00e80000 ################################################################
5591 00:44:55.894230
5592 00:44:56.150210 00f00000 ################################################################
5593 00:44:56.150366
5594 00:44:56.429358 00f80000 ################################################################
5595 00:44:56.429527
5596 00:44:56.716748 01000000 ################################################################
5597 00:44:56.716913
5598 00:44:56.994236 01080000 ################################################################
5599 00:44:56.994398
5600 00:44:57.274947 01100000 ################################################################
5601 00:44:57.275108
5602 00:44:57.530586 01180000 ################################################################
5603 00:44:57.530749
5604 00:44:57.786193 01200000 ################################################################
5605 00:44:57.786351
5606 00:44:58.040994 01280000 ################################################################
5607 00:44:58.041154
5608 00:44:58.293038 01300000 ################################################################
5609 00:44:58.293225
5610 00:44:58.535485 01380000 ################################################################
5611 00:44:58.535645
5612 00:44:58.776008 01400000 ################################################################
5613 00:44:58.776182
5614 00:44:59.030852 01480000 ################################################################
5615 00:44:59.031021
5616 00:44:59.286179 01500000 ################################################################
5617 00:44:59.286372
5618 00:44:59.539469 01580000 ################################################################
5619 00:44:59.539661
5620 00:44:59.794723 01600000 ################################################################
5621 00:44:59.794915
5622 00:45:00.049791 01680000 ################################################################
5623 00:45:00.049952
5624 00:45:00.304891 01700000 ################################################################
5625 00:45:00.305052
5626 00:45:00.560059 01780000 ################################################################
5627 00:45:00.560247
5628 00:45:00.812899 01800000 ################################################################
5629 00:45:00.813060
5630 00:45:01.067508 01880000 ################################################################
5631 00:45:01.067710
5632 00:45:01.341755 01900000 ################################################################
5633 00:45:01.341926
5634 00:45:01.609016 01980000 ################################################################
5635 00:45:01.609176
5636 00:45:01.864039 01a00000 ################################################################
5637 00:45:01.864198
5638 00:45:02.127102 01a80000 ################################################################
5639 00:45:02.127263
5640 00:45:02.415938 01b00000 ################################################################
5641 00:45:02.416103
5642 00:45:02.703974 01b80000 ################################################################
5643 00:45:02.704134
5644 00:45:02.985280 01c00000 ################################################################
5645 00:45:02.985446
5646 00:45:03.262828 01c80000 ################################################################
5647 00:45:03.262987
5648 00:45:03.535101 01d00000 ################################################################
5649 00:45:03.535259
5650 00:45:03.834072 01d80000 ################################################################
5651 00:45:03.834232
5652 00:45:04.121164 01e00000 ################################################################
5653 00:45:04.121326
5654 00:45:04.404156 01e80000 ################################################################
5655 00:45:04.404312
5656 00:45:04.668140 01f00000 ################################################################
5657 00:45:04.668302
5658 00:45:04.948625 01f80000 ################################################################
5659 00:45:04.948780
5660 00:45:05.235528 02000000 ################################################################
5661 00:45:05.235686
5662 00:45:05.492137 02080000 ################################################################
5663 00:45:05.492295
5664 00:45:05.750030 02100000 ################################################################
5665 00:45:05.750183
5666 00:45:06.004733 02180000 ################################################################
5667 00:45:06.004896
5668 00:45:06.259287 02200000 ################################################################
5669 00:45:06.259445
5670 00:45:06.513698 02280000 ################################################################
5671 00:45:06.513859
5672 00:45:06.769226 02300000 ################################################################
5673 00:45:06.769382
5674 00:45:07.023087 02380000 ################################################################
5675 00:45:07.023246
5676 00:45:07.279015 02400000 ################################################################
5677 00:45:07.279174
5678 00:45:07.534650 02480000 ################################################################
5679 00:45:07.534804
5680 00:45:07.791195 02500000 ################################################################
5681 00:45:07.791385
5682 00:45:08.049132 02580000 ################################################################
5683 00:45:08.049418
5684 00:45:08.308444 02600000 ################################################################
5685 00:45:08.308602
5686 00:45:08.593393 02680000 ################################################################
5687 00:45:08.593584
5688 00:45:08.881222 02700000 ################################################################
5689 00:45:08.881411
5690 00:45:09.138628 02780000 ################################################################
5691 00:45:09.138783
5692 00:45:09.398539 02800000 ################################################################
5693 00:45:09.398721
5694 00:45:09.686823 02880000 ################################################################
5695 00:45:09.686996
5696 00:45:09.981131 02900000 ################################################################
5697 00:45:09.981298
5698 00:45:10.285908 02980000 ################################################################
5699 00:45:10.286050
5700 00:45:10.589977 02a00000 ################################################################
5701 00:45:10.590135
5702 00:45:10.897063 02a80000 ################################################################
5703 00:45:10.897236
5704 00:45:11.203692 02b00000 ################################################################
5705 00:45:11.203835
5706 00:45:11.510093 02b80000 ################################################################
5707 00:45:11.510236
5708 00:45:11.813279 02c00000 ################################################################
5709 00:45:11.813461
5710 00:45:12.114451 02c80000 ################################################################
5711 00:45:12.114592
5712 00:45:12.414461 02d00000 ################################################################
5713 00:45:12.414601
5714 00:45:12.722495 02d80000 ################################################################
5715 00:45:12.722642
5716 00:45:13.010208 02e00000 ################################################################
5717 00:45:13.010357
5718 00:45:13.290899 02e80000 ################################################################
5719 00:45:13.291034
5720 00:45:13.572187 02f00000 ################################################################
5721 00:45:13.572323
5722 00:45:13.852928 02f80000 ################################################################
5723 00:45:13.853064
5724 00:45:14.143248 03000000 ################################################################
5725 00:45:14.143397
5726 00:45:14.480750 03080000 ################################################################
5727 00:45:14.481267
5728 00:45:14.914371 03100000 ################################################################
5729 00:45:14.914881
5730 00:45:15.302617 03180000 ################################################################
5731 00:45:15.303326
5732 00:45:15.652356 03200000 ################################################################
5733 00:45:15.652512
5734 00:45:15.915094 03280000 ################################################################
5735 00:45:15.915236
5736 00:45:16.170004 03300000 ################################################################
5737 00:45:16.170144
5738 00:45:16.441241 03380000 ################################################################
5739 00:45:16.441383
5740 00:45:16.703866 03400000 ################################################################
5741 00:45:16.704016
5742 00:45:16.958924 03480000 ################################################################
5743 00:45:16.959065
5744 00:45:17.213955 03500000 ################################################################
5745 00:45:17.214093
5746 00:45:17.470095 03580000 ################################################################
5747 00:45:17.470230
5748 00:45:17.726157 03600000 ################################################################
5749 00:45:17.726296
5750 00:45:17.980991 03680000 ################################################################
5751 00:45:17.981134
5752 00:45:18.237538 03700000 ################################################################
5753 00:45:18.237680
5754 00:45:18.522471 03780000 ################################################################
5755 00:45:18.522615
5756 00:45:18.815136 03800000 ################################################################
5757 00:45:18.815274
5758 00:45:19.103356 03880000 ################################################################
5759 00:45:19.103509
5760 00:45:19.394949 03900000 ################################################################
5761 00:45:19.395099
5762 00:45:19.682679 03980000 ################################################################
5763 00:45:19.682826
5764 00:45:19.966824 03a00000 ################################################################
5765 00:45:19.966973
5766 00:45:20.251514 03a80000 ################################################################
5767 00:45:20.251669
5768 00:45:20.523826 03b00000 ################################################################
5769 00:45:20.523979
5770 00:45:20.809781 03b80000 ################################################################
5771 00:45:20.809929
5772 00:45:21.065884 03c00000 ################################################################
5773 00:45:21.066027
5774 00:45:21.324388 03c80000 ################################################################
5775 00:45:21.324531
5776 00:45:21.577443 03d00000 ################################################################
5777 00:45:21.577585
5778 00:45:21.832127 03d80000 ################################################################
5779 00:45:21.832268
5780 00:45:22.087325 03e00000 ################################################################
5781 00:45:22.087471
5782 00:45:22.345536 03e80000 ################################################################
5783 00:45:22.345678
5784 00:45:22.647707 03f00000 ################################################################
5785 00:45:22.647851
5786 00:45:22.913847 03f80000 ################################################################
5787 00:45:22.913991
5788 00:45:23.169690 04000000 ################################################################
5789 00:45:23.169833
5790 00:45:23.424805 04080000 ################################################################
5791 00:45:23.424944
5792 00:45:23.680174 04100000 ################################################################
5793 00:45:23.680303
5794 00:45:23.935355 04180000 ################################################################
5795 00:45:23.935498
5796 00:45:24.189351 04200000 ################################################################
5797 00:45:24.189523
5798 00:45:24.445096 04280000 ################################################################
5799 00:45:24.445238
5800 00:45:24.710958 04300000 ################################################################
5801 00:45:24.711114
5802 00:45:25.016229 04380000 ################################################################
5803 00:45:25.016371
5804 00:45:25.310142 04400000 ################################################################
5805 00:45:25.310292
5806 00:45:25.569922 04480000 ################################################################
5807 00:45:25.570078
5808 00:45:25.850519 04500000 ################################################################
5809 00:45:25.850659
5810 00:45:26.151473 04580000 ################################################################
5811 00:45:26.151619
5812 00:45:26.427437 04600000 ################################################################
5813 00:45:26.427613
5814 00:45:26.547030 04680000 ############################### done.
5815 00:45:26.547167
5816 00:45:26.550077 The bootfile was 74172758 bytes long.
5817 00:45:26.550220
5818 00:45:26.553416 Sending tftp read request... done.
5819 00:45:26.553534
5820 00:45:26.556579 Waiting for the transfer...
5821 00:45:26.556684
5822 00:45:26.556766 00000000 # done.
5823 00:45:26.556844
5824 00:45:26.566604 Command line loaded dynamically from TFTP file: 14368378/tftp-deploy-kyzcmmi4/kernel/cmdline
5825 00:45:26.566812
5826 00:45:26.583150 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5827 00:45:26.583426
5828 00:45:26.583587 Loading FIT.
5829 00:45:26.583731
5830 00:45:26.586466 Image ramdisk-1 has 60986640 bytes.
5831 00:45:26.586769
5832 00:45:26.589597 Image fdt-1 has 57695 bytes.
5833 00:45:26.589897
5834 00:45:26.593383 Image kernel-1 has 13126376 bytes.
5835 00:45:26.593766
5836 00:45:26.602869 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5837 00:45:26.603385
5838 00:45:26.612604 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5839 00:45:26.613158
5840 00:45:26.619002 Choosing best match conf-1 for compat google,juniper-sku16.
5841 00:45:26.622875
5842 00:45:26.627122 Connected to device vid:did:rid of 1ae0:0028:00
5843 00:45:26.634256
5844 00:45:26.637936 tpm_get_response: command 0x17b, return code 0x0
5845 00:45:26.638344
5846 00:45:26.641179 tpm_cleanup: add release locality here.
5847 00:45:26.641802
5848 00:45:26.644419 Shutting down all USB controllers.
5849 00:45:26.644918
5850 00:45:26.647348 Removing current net device
5851 00:45:26.647754
5852 00:45:26.650976 Exiting depthcharge with code 4 at timestamp: 57405072
5853 00:45:26.651483
5854 00:45:26.657572 LZMA decompressing kernel-1 to 0x80193568
5855 00:45:26.658070
5856 00:45:26.660776 LZMA decompressing kernel-1 to 0x40000000
5857 00:45:28.525523
5858 00:45:28.526146 jumping to kernel
5859 00:45:28.528339 end: 2.2.4 bootloader-commands (duration 00:00:42) [common]
5860 00:45:28.528930 start: 2.2.5 auto-login-action (timeout 00:03:44) [common]
5861 00:45:28.529311 Setting prompt string to ['Linux version [0-9]']
5862 00:45:28.529767 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5863 00:45:28.530293 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5864 00:45:28.600894
5865 00:45:28.604568 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5866 00:45:28.607811 start: 2.2.5.1 login-action (timeout 00:03:44) [common]
5867 00:45:28.608384 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5868 00:45:28.608786 Setting prompt string to []
5869 00:45:28.609197 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5870 00:45:28.609676 Using line separator: #'\n'#
5871 00:45:28.610023 No login prompt set.
5872 00:45:28.610389 Parsing kernel messages
5873 00:45:28.610691 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5874 00:45:28.611257 [login-action] Waiting for messages, (timeout 00:03:44)
5875 00:45:28.611645 Waiting using forced prompt support (timeout 00:01:52)
5876 00:45:28.626998 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024
5877 00:45:28.629971 [ 0.000000] random: crng init done
5878 00:45:28.636743 [ 0.000000] Machine model: Google juniper sku16 board
5879 00:45:28.640229 [ 0.000000] efi: UEFI not found.
5880 00:45:28.646891 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5881 00:45:28.656636 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5882 00:45:28.663102 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5883 00:45:28.666089 [ 0.000000] printk: bootconsole [mtk8250] enabled
5884 00:45:28.675627 [ 0.000000] NUMA: No NUMA configuration found
5885 00:45:28.682265 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5886 00:45:28.688850 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5887 00:45:28.689338 [ 0.000000] Zone ranges:
5888 00:45:28.695236 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5889 00:45:28.698489 [ 0.000000] DMA32 empty
5890 00:45:28.705044 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5891 00:45:28.708888 [ 0.000000] Movable zone start for each node
5892 00:45:28.711962 [ 0.000000] Early memory node ranges
5893 00:45:28.718462 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5894 00:45:28.725009 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5895 00:45:28.731594 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5896 00:45:28.738332 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5897 00:45:28.744725 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5898 00:45:28.751150 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5899 00:45:28.768144 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5900 00:45:28.774546 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5901 00:45:28.781086 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5902 00:45:28.784123 [ 0.000000] psci: probing for conduit method from DT.
5903 00:45:28.790982 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5904 00:45:28.794382 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5905 00:45:28.800563 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5906 00:45:28.803984 [ 0.000000] psci: SMC Calling Convention v1.1
5907 00:45:28.810617 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5908 00:45:28.813510 [ 0.000000] Detected VIPT I-cache on CPU0
5909 00:45:28.820121 [ 0.000000] CPU features: detected: GIC system register CPU interface
5910 00:45:28.826684 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5911 00:45:28.833228 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5912 00:45:28.839738 [ 0.000000] CPU features: detected: ARM erratum 845719
5913 00:45:28.843236 [ 0.000000] alternatives: applying boot alternatives
5914 00:45:28.849991 [ 0.000000] Fallback order for Node 0: 0
5915 00:45:28.856407 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5916 00:45:28.859357 [ 0.000000] Policy zone: Normal
5917 00:45:28.875940 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5918 00:45:28.889076 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5919 00:45:28.898695 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5920 00:45:28.905240 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5921 00:45:28.912269 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5922 00:45:28.918096 <6>[ 0.000000] software IO TLB: area num 8.
5923 00:45:28.942648 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5924 00:45:29.000692 <6>[ 0.000000] Memory: 3855516K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 302948K reserved, 32768K cma-reserved)
5925 00:45:29.006869 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5926 00:45:29.013801 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5927 00:45:29.016528 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5928 00:45:29.022927 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5929 00:45:29.029722 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5930 00:45:29.036298 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5931 00:45:29.042798 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5932 00:45:29.049414 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5933 00:45:29.056339 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5934 00:45:29.065857 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5935 00:45:29.072669 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5936 00:45:29.076043 <6>[ 0.000000] GICv3: 640 SPIs implemented
5937 00:45:29.078866 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5938 00:45:29.085675 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5939 00:45:29.088591 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5940 00:45:29.095766 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5941 00:45:29.108129 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5942 00:45:29.121371 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5943 00:45:29.127903 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5944 00:45:29.138029 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5945 00:45:29.150921 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5946 00:45:29.157466 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5947 00:45:29.164409 <6>[ 0.009484] Console: colour dummy device 80x25
5948 00:45:29.167871 <6>[ 0.014522] printk: console [tty1] enabled
5949 00:45:29.180799 <6>[ 0.018909] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5950 00:45:29.183935 <6>[ 0.029373] pid_max: default: 32768 minimum: 301
5951 00:45:29.190681 <6>[ 0.034254] LSM: Security Framework initializing
5952 00:45:29.197049 <6>[ 0.039170] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5953 00:45:29.203712 <6>[ 0.046793] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5954 00:45:29.210757 <4>[ 0.055672] cacheinfo: Unable to detect cache hierarchy for CPU 0
5955 00:45:29.220484 <6>[ 0.062298] cblist_init_generic: Setting adjustable number of callback queues.
5956 00:45:29.226913 <6>[ 0.069744] cblist_init_generic: Setting shift to 3 and lim to 1.
5957 00:45:29.233835 <6>[ 0.076096] cblist_init_generic: Setting adjustable number of callback queues.
5958 00:45:29.240097 <6>[ 0.083540] cblist_init_generic: Setting shift to 3 and lim to 1.
5959 00:45:29.246779 <6>[ 0.089939] rcu: Hierarchical SRCU implementation.
5960 00:45:29.250042 <6>[ 0.094966] rcu: Max phase no-delay instances is 1000.
5961 00:45:29.257719 <6>[ 0.102910] EFI services will not be available.
5962 00:45:29.261467 <6>[ 0.107859] smp: Bringing up secondary CPUs ...
5963 00:45:29.271669 <6>[ 0.113134] Detected VIPT I-cache on CPU1
5964 00:45:29.277967 <4>[ 0.113181] cacheinfo: Unable to detect cache hierarchy for CPU 1
5965 00:45:29.284539 <6>[ 0.113189] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5966 00:45:29.291581 <6>[ 0.113221] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5967 00:45:29.294788 <6>[ 0.113703] Detected VIPT I-cache on CPU2
5968 00:45:29.301133 <4>[ 0.113736] cacheinfo: Unable to detect cache hierarchy for CPU 2
5969 00:45:29.307600 <6>[ 0.113742] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5970 00:45:29.314412 <6>[ 0.113754] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5971 00:45:29.320595 <6>[ 0.114198] Detected VIPT I-cache on CPU3
5972 00:45:29.327154 <4>[ 0.114228] cacheinfo: Unable to detect cache hierarchy for CPU 3
5973 00:45:29.333954 <6>[ 0.114233] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5974 00:45:29.340470 <6>[ 0.114244] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5975 00:45:29.343914 <6>[ 0.114819] CPU features: detected: Spectre-v2
5976 00:45:29.350329 <6>[ 0.114829] CPU features: detected: Spectre-BHB
5977 00:45:29.353609 <6>[ 0.114833] CPU features: detected: ARM erratum 858921
5978 00:45:29.359965 <6>[ 0.114838] Detected VIPT I-cache on CPU4
5979 00:45:29.366539 <4>[ 0.114885] cacheinfo: Unable to detect cache hierarchy for CPU 4
5980 00:45:29.372824 <6>[ 0.114893] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5981 00:45:29.379329 <6>[ 0.114901] arch_timer: Enabling local workaround for ARM erratum 858921
5982 00:45:29.386028 <6>[ 0.114912] arch_timer: CPU4: Trapping CNTVCT access
5983 00:45:29.392774 <6>[ 0.114919] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5984 00:45:29.396213 <6>[ 0.115406] Detected VIPT I-cache on CPU5
5985 00:45:29.402587 <4>[ 0.115446] cacheinfo: Unable to detect cache hierarchy for CPU 5
5986 00:45:29.409230 <6>[ 0.115451] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5987 00:45:29.415676 <6>[ 0.115458] arch_timer: Enabling local workaround for ARM erratum 858921
5988 00:45:29.422021 <6>[ 0.115464] arch_timer: CPU5: Trapping CNTVCT access
5989 00:45:29.428557 <6>[ 0.115469] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5990 00:45:29.431819 <6>[ 0.115906] Detected VIPT I-cache on CPU6
5991 00:45:29.438728 <4>[ 0.115952] cacheinfo: Unable to detect cache hierarchy for CPU 6
5992 00:45:29.445110 <6>[ 0.115957] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5993 00:45:29.451909 <6>[ 0.115965] arch_timer: Enabling local workaround for ARM erratum 858921
5994 00:45:29.458066 <6>[ 0.115971] arch_timer: CPU6: Trapping CNTVCT access
5995 00:45:29.464633 <6>[ 0.115976] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5996 00:45:29.468425 <6>[ 0.116506] Detected VIPT I-cache on CPU7
5997 00:45:29.474888 <4>[ 0.116550] cacheinfo: Unable to detect cache hierarchy for CPU 7
5998 00:45:29.481289 <6>[ 0.116556] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5999 00:45:29.488096 <6>[ 0.116563] arch_timer: Enabling local workaround for ARM erratum 858921
6000 00:45:29.494381 <6>[ 0.116569] arch_timer: CPU7: Trapping CNTVCT access
6001 00:45:29.501022 <6>[ 0.116574] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6002 00:45:29.504220 <6>[ 0.116646] smp: Brought up 1 node, 8 CPUs
6003 00:45:29.510775 <6>[ 0.355508] SMP: Total of 8 processors activated.
6004 00:45:29.517371 <6>[ 0.360444] CPU features: detected: 32-bit EL0 Support
6005 00:45:29.520410 <6>[ 0.365816] CPU features: detected: 32-bit EL1 Support
6006 00:45:29.526956 <6>[ 0.371181] CPU features: detected: CRC32 instructions
6007 00:45:29.530033 <6>[ 0.376607] CPU: All CPU(s) started at EL2
6008 00:45:29.536948 <6>[ 0.380945] alternatives: applying system-wide alternatives
6009 00:45:29.543852 <6>[ 0.388925] devtmpfs: initialized
6010 00:45:29.559631 <6>[ 0.397861] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6011 00:45:29.565618 <6>[ 0.407809] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6012 00:45:29.572526 <6>[ 0.415537] pinctrl core: initialized pinctrl subsystem
6013 00:45:29.575814 <6>[ 0.422651] DMI not present or invalid.
6014 00:45:29.581858 <6>[ 0.427021] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6015 00:45:29.592448 <6>[ 0.433920] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6016 00:45:29.598916 <6>[ 0.441448] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6017 00:45:29.608764 <6>[ 0.449699] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6018 00:45:29.615089 <6>[ 0.457875] audit: initializing netlink subsys (disabled)
6019 00:45:29.621765 <5>[ 0.463581] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6020 00:45:29.628098 <6>[ 0.464565] thermal_sys: Registered thermal governor 'step_wise'
6021 00:45:29.634939 <6>[ 0.471548] thermal_sys: Registered thermal governor 'power_allocator'
6022 00:45:29.638034 <6>[ 0.477846] cpuidle: using governor menu
6023 00:45:29.644667 <6>[ 0.488811] NET: Registered PF_QIPCRTR protocol family
6024 00:45:29.651144 <6>[ 0.494294] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6025 00:45:29.657276 <6>[ 0.501392] ASID allocator initialised with 32768 entries
6026 00:45:29.663904 <6>[ 0.508164] Serial: AMBA PL011 UART driver
6027 00:45:29.673611 <4>[ 0.518586] Trying to register duplicate clock ID: 113
6028 00:45:29.733325 <6>[ 0.574775] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6029 00:45:29.747540 <6>[ 0.589140] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6030 00:45:29.750648 <6>[ 0.598885] KASLR enabled
6031 00:45:29.765014 <6>[ 0.606885] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6032 00:45:29.771494 <6>[ 0.613887] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6033 00:45:29.778296 <6>[ 0.620364] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6034 00:45:29.784850 <6>[ 0.627355] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6035 00:45:29.791555 <6>[ 0.633828] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6036 00:45:29.797898 <6>[ 0.640818] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6037 00:45:29.804539 <6>[ 0.647291] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6038 00:45:29.811181 <6>[ 0.654281] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6039 00:45:29.817786 <6>[ 0.661849] ACPI: Interpreter disabled.
6040 00:45:29.824655 <6>[ 0.669849] iommu: Default domain type: Translated
6041 00:45:29.831364 <6>[ 0.674955] iommu: DMA domain TLB invalidation policy: strict mode
6042 00:45:29.834450 <5>[ 0.681589] SCSI subsystem initialized
6043 00:45:29.840886 <6>[ 0.686002] usbcore: registered new interface driver usbfs
6044 00:45:29.847723 <6>[ 0.691729] usbcore: registered new interface driver hub
6045 00:45:29.854244 <6>[ 0.697271] usbcore: registered new device driver usb
6046 00:45:29.857632 <6>[ 0.703576] pps_core: LinuxPPS API ver. 1 registered
6047 00:45:29.867201 <6>[ 0.708760] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6048 00:45:29.873493 <6>[ 0.718084] PTP clock support registered
6049 00:45:29.877014 <6>[ 0.722338] EDAC MC: Ver: 3.0.0
6050 00:45:29.880235 <6>[ 0.727989] FPGA manager framework
6051 00:45:29.886595 <6>[ 0.731672] Advanced Linux Sound Architecture Driver Initialized.
6052 00:45:29.889925 <6>[ 0.738427] vgaarb: loaded
6053 00:45:29.896543 <6>[ 0.741544] clocksource: Switched to clocksource arch_sys_counter
6054 00:45:29.902911 <5>[ 0.747974] VFS: Disk quotas dquot_6.6.0
6055 00:45:29.909607 <6>[ 0.752149] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6056 00:45:29.912818 <6>[ 0.759322] pnp: PnP ACPI: disabled
6057 00:45:29.920802 <6>[ 0.766184] NET: Registered PF_INET protocol family
6058 00:45:29.927552 <6>[ 0.771409] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6059 00:45:29.939409 <6>[ 0.781305] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6060 00:45:29.949097 <6>[ 0.790057] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6061 00:45:29.955654 <6>[ 0.798007] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6062 00:45:29.962035 <6>[ 0.806241] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6063 00:45:29.972476 <6>[ 0.814336] TCP: Hash tables configured (established 32768 bind 32768)
6064 00:45:29.978844 <6>[ 0.821163] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6065 00:45:29.985261 <6>[ 0.828135] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6066 00:45:29.992023 <6>[ 0.835614] NET: Registered PF_UNIX/PF_LOCAL protocol family
6067 00:45:29.998403 <6>[ 0.841731] RPC: Registered named UNIX socket transport module.
6068 00:45:30.001862 <6>[ 0.847874] RPC: Registered udp transport module.
6069 00:45:30.008423 <6>[ 0.852799] RPC: Registered tcp transport module.
6070 00:45:30.015310 <6>[ 0.857723] RPC: Registered tcp NFSv4.1 backchannel transport module.
6071 00:45:30.018374 <6>[ 0.864375] PCI: CLS 0 bytes, default 64
6072 00:45:30.021369 <6>[ 0.868659] Unpacking initramfs...
6073 00:45:30.044026 <6>[ 0.885739] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6074 00:45:30.053493 <6>[ 0.894369] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6075 00:45:30.056774 <6>[ 0.903218] kvm [1]: IPA Size Limit: 40 bits
6076 00:45:30.064631 <6>[ 0.909545] kvm [1]: vgic-v2@c420000
6077 00:45:30.067710 <6>[ 0.913354] kvm [1]: GIC system register CPU interface enabled
6078 00:45:30.074402 <6>[ 0.919520] kvm [1]: vgic interrupt IRQ18
6079 00:45:30.077479 <6>[ 0.923877] kvm [1]: Hyp mode initialized successfully
6080 00:45:30.084983 <5>[ 0.930228] Initialise system trusted keyrings
6081 00:45:30.091769 <6>[ 0.935094] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6082 00:45:30.099743 <6>[ 0.945078] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6083 00:45:30.106481 <5>[ 0.951516] NFS: Registering the id_resolver key type
6084 00:45:30.109609 <5>[ 0.956830] Key type id_resolver registered
6085 00:45:30.116647 <5>[ 0.961242] Key type id_legacy registered
6086 00:45:30.123035 <6>[ 0.965559] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6087 00:45:30.129248 <6>[ 0.972481] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6088 00:45:30.135894 <6>[ 0.980244] 9p: Installing v9fs 9p2000 file system support
6089 00:45:30.164585 <5>[ 1.009570] Key type asymmetric registered
6090 00:45:30.167671 <5>[ 1.013914] Asymmetric key parser 'x509' registered
6091 00:45:30.177942 <6>[ 1.019066] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6092 00:45:30.181128 <6>[ 1.026685] io scheduler mq-deadline registered
6093 00:45:30.184188 <6>[ 1.031444] io scheduler kyber registered
6094 00:45:30.207113 <6>[ 1.052244] EINJ: ACPI disabled.
6095 00:45:30.213490 <4>[ 1.056009] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6096 00:45:30.252126 <6>[ 1.096926] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6097 00:45:30.260397 <6>[ 1.105388] printk: console [ttyS0] disabled
6098 00:45:30.288320 <6>[ 1.130040] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6099 00:45:30.294913 <6>[ 1.139513] printk: console [ttyS0] enabled
6100 00:45:30.298150 <6>[ 1.139513] printk: console [ttyS0] enabled
6101 00:45:30.304895 <6>[ 1.148431] printk: bootconsole [mtk8250] disabled
6102 00:45:30.307913 <6>[ 1.148431] printk: bootconsole [mtk8250] disabled
6103 00:45:30.317655 <3>[ 1.158960] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6104 00:45:30.323902 <3>[ 1.167343] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6105 00:45:30.354167 <6>[ 1.195752] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6106 00:45:30.361025 <6>[ 1.205413] serial serial0: tty port ttyS1 registered
6107 00:45:30.366857 <6>[ 1.211991] SuperH (H)SCI(F) driver initialized
6108 00:45:30.370463 <6>[ 1.217497] msm_serial: driver initialized
6109 00:45:30.386133 <6>[ 1.227863] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6110 00:45:30.395942 <6>[ 1.236462] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6111 00:45:30.402432 <6>[ 1.245047] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6112 00:45:30.412487 <6>[ 1.253619] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6113 00:45:30.421852 <6>[ 1.262272] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6114 00:45:30.428489 <6>[ 1.270933] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6115 00:45:30.438311 <6>[ 1.279670] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6116 00:45:30.448231 <6>[ 1.288409] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6117 00:45:30.454212 <6>[ 1.296974] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6118 00:45:30.464475 <6>[ 1.305773] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6119 00:45:30.473353 <4>[ 1.318200] cacheinfo: Unable to detect cache hierarchy for CPU 0
6120 00:45:30.482447 <6>[ 1.327578] loop: module loaded
6121 00:45:30.494467 <6>[ 1.339568] vsim1: Bringing 1800000uV into 2700000-2700000uV
6122 00:45:30.512735 <6>[ 1.357671] megasas: 07.719.03.00-rc1
6123 00:45:30.521320 <6>[ 1.366507] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6124 00:45:30.535305 <6>[ 1.376932] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6125 00:45:30.548824 <6>[ 1.393480] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6126 00:45:30.608703 <6>[ 1.446966] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6127 00:45:32.057629 <6>[ 2.902933] Freeing initrd memory: 59556K
6128 00:45:32.073180 <4>[ 2.914873] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6129 00:45:32.079807 <4>[ 2.924125] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6130 00:45:32.086296 <4>[ 2.930824] Hardware name: Google juniper sku16 board (DT)
6131 00:45:32.089205 <4>[ 2.936564] Call trace:
6132 00:45:32.092501 <4>[ 2.939264] dump_backtrace.part.0+0xe0/0xf0
6133 00:45:32.096472 <4>[ 2.943800] show_stack+0x18/0x30
6134 00:45:32.102779 <4>[ 2.947372] dump_stack_lvl+0x68/0x84
6135 00:45:32.105902 <4>[ 2.951293] dump_stack+0x18/0x34
6136 00:45:32.109090 <4>[ 2.954863] sysfs_warn_dup+0x64/0x80
6137 00:45:32.112550 <4>[ 2.958785] sysfs_do_create_link_sd+0xf0/0x100
6138 00:45:32.119003 <4>[ 2.963572] sysfs_create_link+0x20/0x40
6139 00:45:32.122353 <4>[ 2.967752] bus_add_device+0x68/0x10c
6140 00:45:32.125320 <4>[ 2.971758] device_add+0x340/0x7ac
6141 00:45:32.128584 <4>[ 2.975501] of_device_add+0x44/0x60
6142 00:45:32.134959 <4>[ 2.979336] of_platform_device_create_pdata+0x90/0x120
6143 00:45:32.138132 <4>[ 2.984817] of_platform_bus_create+0x170/0x370
6144 00:45:32.144759 <4>[ 2.989604] of_platform_populate+0x50/0xfc
6145 00:45:32.148003 <4>[ 2.994044] parse_mtd_partitions+0x1dc/0x510
6146 00:45:32.154529 <4>[ 2.998657] mtd_device_parse_register+0xf8/0x2e0
6147 00:45:32.158389 <4>[ 3.003615] spi_nor_probe+0x21c/0x2f0
6148 00:45:32.161043 <4>[ 3.007621] spi_mem_probe+0x6c/0xb0
6149 00:45:32.164272 <4>[ 3.011454] spi_probe+0x84/0xe4
6150 00:45:32.167580 <4>[ 3.014936] really_probe+0xbc/0x2e0
6151 00:45:32.174271 <4>[ 3.018766] __driver_probe_device+0x78/0x11c
6152 00:45:32.177884 <4>[ 3.023378] driver_probe_device+0xd8/0x160
6153 00:45:32.184253 <4>[ 3.027816] __device_attach_driver+0xb8/0x134
6154 00:45:32.187606 <4>[ 3.032515] bus_for_each_drv+0x78/0xd0
6155 00:45:32.190853 <4>[ 3.036605] __device_attach+0xa8/0x1c0
6156 00:45:32.193890 <4>[ 3.040695] device_initial_probe+0x14/0x20
6157 00:45:32.200447 <4>[ 3.045134] bus_probe_device+0x9c/0xa4
6158 00:45:32.203965 <4>[ 3.049224] device_add+0x3ac/0x7ac
6159 00:45:32.207146 <4>[ 3.052966] __spi_add_device+0x78/0x120
6160 00:45:32.210074 <4>[ 3.057145] spi_add_device+0x40/0x7c
6161 00:45:32.216864 <4>[ 3.061062] spi_register_controller+0x610/0xad0
6162 00:45:32.220296 <4>[ 3.065935] devm_spi_register_controller+0x4c/0xa4
6163 00:45:32.226764 <4>[ 3.071068] mtk_spi_probe+0x3f8/0x650
6164 00:45:32.230025 <4>[ 3.075072] platform_probe+0x68/0xe0
6165 00:45:32.233055 <4>[ 3.078990] really_probe+0xbc/0x2e0
6166 00:45:32.235972 <4>[ 3.082821] __driver_probe_device+0x78/0x11c
6167 00:45:32.242988 <4>[ 3.087432] driver_probe_device+0xd8/0x160
6168 00:45:32.246130 <4>[ 3.091870] __driver_attach+0x94/0x19c
6169 00:45:32.249381 <4>[ 3.095960] bus_for_each_dev+0x70/0xd0
6170 00:45:32.252470 <4>[ 3.100050] driver_attach+0x24/0x30
6171 00:45:32.258908 <4>[ 3.103880] bus_add_driver+0x154/0x20c
6172 00:45:32.262165 <4>[ 3.107970] driver_register+0x78/0x130
6173 00:45:32.266050 <4>[ 3.112061] __platform_driver_register+0x28/0x34
6174 00:45:32.272063 <4>[ 3.117021] mtk_spi_driver_init+0x1c/0x28
6175 00:45:32.275602 <4>[ 3.121374] do_one_initcall+0x50/0x1d0
6176 00:45:32.278553 <4>[ 3.125464] kernel_init_freeable+0x21c/0x288
6177 00:45:32.284905 <4>[ 3.130078] kernel_init+0x24/0x12c
6178 00:45:32.288076 <4>[ 3.133823] ret_from_fork+0x10/0x20
6179 00:45:32.297644 <6>[ 3.142761] tun: Universal TUN/TAP device driver, 1.6
6180 00:45:32.300686 <6>[ 3.149046] thunder_xcv, ver 1.0
6181 00:45:32.307878 <6>[ 3.152564] thunder_bgx, ver 1.0
6182 00:45:32.308385 <6>[ 3.156069] nicpf, ver 1.0
6183 00:45:32.319053 <6>[ 3.160435] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6184 00:45:32.321834 <6>[ 3.167919] hns3: Copyright (c) 2017 Huawei Corporation.
6185 00:45:32.328572 <6>[ 3.173515] hclge is initializing
6186 00:45:32.331616 <6>[ 3.177104] e1000: Intel(R) PRO/1000 Network Driver
6187 00:45:32.338253 <6>[ 3.182239] e1000: Copyright (c) 1999-2006 Intel Corporation.
6188 00:45:32.344928 <6>[ 3.188264] e1000e: Intel(R) PRO/1000 Network Driver
6189 00:45:32.351175 <6>[ 3.193485] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6190 00:45:32.354834 <6>[ 3.199678] igb: Intel(R) Gigabit Ethernet Network Driver
6191 00:45:32.361661 <6>[ 3.205333] igb: Copyright (c) 2007-2014 Intel Corporation.
6192 00:45:32.367984 <6>[ 3.211176] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6193 00:45:32.374248 <6>[ 3.217699] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6194 00:45:32.377492 <6>[ 3.224257] sky2: driver version 1.30
6195 00:45:32.384738 <6>[ 3.229507] usbcore: registered new device driver r8152-cfgselector
6196 00:45:32.391239 <6>[ 3.236050] usbcore: registered new interface driver r8152
6197 00:45:32.397398 <6>[ 3.241878] VFIO - User Level meta-driver version: 0.3
6198 00:45:32.404409 <6>[ 3.249699] mtu3 11201000.usb: uwk - reg:0x420, version:101
6199 00:45:32.414660 <4>[ 3.255570] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6200 00:45:32.417546 <6>[ 3.262843] mtu3 11201000.usb: dr_mode: 1, drd: auto
6201 00:45:32.424372 <6>[ 3.268068] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6202 00:45:32.427588 <6>[ 3.274252] mtu3 11201000.usb: usb3-drd: 0
6203 00:45:32.437652 <6>[ 3.279789] mtu3 11201000.usb: xHCI platform device register success...
6204 00:45:32.444111 <4>[ 3.288403] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6205 00:45:32.451180 <6>[ 3.296364] xhci-mtk 11200000.usb: xHCI Host Controller
6206 00:45:32.460954 <6>[ 3.301895] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6207 00:45:32.464256 <6>[ 3.309615] xhci-mtk 11200000.usb: USB3 root hub has no ports
6208 00:45:32.474084 <6>[ 3.315623] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6209 00:45:32.480669 <6>[ 3.325050] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6210 00:45:32.487207 <6>[ 3.331122] xhci-mtk 11200000.usb: xHCI Host Controller
6211 00:45:32.493707 <6>[ 3.336610] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6212 00:45:32.500178 <6>[ 3.344267] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6213 00:45:32.506543 <6>[ 3.351096] hub 1-0:1.0: USB hub found
6214 00:45:32.509789 <6>[ 3.355125] hub 1-0:1.0: 1 port detected
6215 00:45:32.519444 <6>[ 3.360462] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6216 00:45:32.522957 <6>[ 3.369075] hub 2-0:1.0: USB hub found
6217 00:45:32.529397 <3>[ 3.373105] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6218 00:45:32.535914 <6>[ 3.380996] usbcore: registered new interface driver usb-storage
6219 00:45:32.542353 <6>[ 3.387603] usbcore: registered new device driver onboard-usb-hub
6220 00:45:32.559547 <4>[ 3.401644] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6221 00:45:32.568888 <6>[ 3.413882] mt6397-rtc mt6358-rtc: registered as rtc0
6222 00:45:32.578601 <6>[ 3.419361] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:45:32 UTC (1718498732)
6223 00:45:32.585405 <6>[ 3.429252] i2c_dev: i2c /dev entries driver
6224 00:45:32.595149 <6>[ 3.435684] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6225 00:45:32.601535 <6>[ 3.444006] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6226 00:45:32.608107 <6>[ 3.452911] i2c 4-0058: Fixed dependency cycle(s) with /panel
6227 00:45:32.614392 <6>[ 3.458941] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6228 00:45:32.624309 <3>[ 3.466403] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6229 00:45:32.641598 <6>[ 3.486324] cpu cpu0: EM: created perf domain
6230 00:45:32.654165 <6>[ 3.491800] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6231 00:45:32.657553 <6>[ 3.503086] cpu cpu4: EM: created perf domain
6232 00:45:32.665010 <6>[ 3.509849] sdhci: Secure Digital Host Controller Interface driver
6233 00:45:32.671323 <6>[ 3.516302] sdhci: Copyright(c) Pierre Ossman
6234 00:45:32.678128 <6>[ 3.521710] Synopsys Designware Multimedia Card Interface Driver
6235 00:45:32.684180 <6>[ 3.522221] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6236 00:45:32.690986 <6>[ 3.528789] sdhci-pltfm: SDHCI platform and OF driver helper
6237 00:45:32.697339 <6>[ 3.541879] ledtrig-cpu: registered to indicate activity on CPUs
6238 00:45:32.704577 <6>[ 3.549655] usbcore: registered new interface driver usbhid
6239 00:45:32.710839 <6>[ 3.555495] usbhid: USB HID core driver
6240 00:45:32.717873 <6>[ 3.559760] spi_master spi2: will run message pump with realtime priority
6241 00:45:32.725005 <4>[ 3.559767] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6242 00:45:32.731210 <4>[ 3.574048] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6243 00:45:32.744361 <6>[ 3.579508] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6244 00:45:32.761125 <6>[ 3.596305] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6245 00:45:32.767591 <4>[ 3.604548] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6246 00:45:32.773898 <6>[ 3.617110] cros-ec-spi spi2.0: Chrome EC device registered
6247 00:45:32.780503 <4>[ 3.624268] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6248 00:45:32.792916 <4>[ 3.634729] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6249 00:45:32.799735 <4>[ 3.643399] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6250 00:45:32.812435 <6>[ 3.654037] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6251 00:45:32.825563 <6>[ 3.670393] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6252 00:45:32.832924 <6>[ 3.678056] mmc0: new HS400 MMC card at address 0001
6253 00:45:32.839465 <6>[ 3.684189] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6254 00:45:32.848641 <6>[ 3.693705] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6255 00:45:32.856641 <6>[ 3.701268] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6256 00:45:32.865901 <6>[ 3.705577] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6257 00:45:32.869242 <6>[ 3.707910] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6258 00:45:32.882411 <6>[ 3.719455] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6259 00:45:32.889145 <6>[ 3.721576] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6260 00:45:32.892180 <6>[ 3.733046] NET: Registered PF_PACKET protocol family
6261 00:45:32.905275 <6>[ 3.735786] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6262 00:45:32.915053 <6>[ 3.736037] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6263 00:45:32.918531 <6>[ 3.765305] 9pnet: Installing 9P2000 support
6264 00:45:32.925372 <5>[ 3.770326] Key type dns_resolver registered
6265 00:45:32.928542 <6>[ 3.775510] registered taskstats version 1
6266 00:45:32.938101 <6>[ 3.779885] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6267 00:45:32.941405 <5>[ 3.786696] Loading compiled-in X.509 certificates
6268 00:45:32.989241 <3>[ 3.831164] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6269 00:45:33.018708 <6>[ 3.857938] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6270 00:45:33.029099 <6>[ 3.871385] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6271 00:45:33.038910 <6>[ 3.879957] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6272 00:45:33.045662 <6>[ 3.888484] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6273 00:45:33.055442 <6>[ 3.897007] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6274 00:45:33.065071 <6>[ 3.905530] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6275 00:45:33.071763 <6>[ 3.914051] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6276 00:45:33.081397 <6>[ 3.922572] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6277 00:45:33.087936 <6>[ 3.931624] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6278 00:45:33.094792 <6>[ 3.938964] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6279 00:45:33.097741 <6>[ 3.940569] hub 1-1:1.0: USB hub found
6280 00:45:33.104138 <6>[ 3.946178] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6281 00:45:33.110702 <6>[ 3.949877] hub 1-1:1.0: 3 ports detected
6282 00:45:33.117274 <6>[ 3.956654] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6283 00:45:33.123635 <6>[ 3.967652] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6284 00:45:33.130252 <6>[ 3.975837] panfrost 13040000.gpu: clock rate = 511999970
6285 00:45:33.140060 <6>[ 3.981529] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6286 00:45:33.150107 <6>[ 3.991555] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6287 00:45:33.156396 <6>[ 3.999578] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6288 00:45:33.169418 <6>[ 4.008012] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6289 00:45:33.175807 <6>[ 4.020089] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6290 00:45:33.186527 <6>[ 4.028878] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6291 00:45:33.196755 <6>[ 4.037417] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6292 00:45:33.206657 <6>[ 4.046570] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6293 00:45:33.212769 <6>[ 4.055700] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6294 00:45:33.222446 <6>[ 4.064829] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6295 00:45:33.232478 <6>[ 4.074130] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6296 00:45:33.242473 <6>[ 4.083430] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6297 00:45:33.252162 <6>[ 4.092903] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6298 00:45:33.261732 <6>[ 4.102378] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6299 00:45:33.271730 <6>[ 4.111504] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6300 00:45:33.342665 <6>[ 4.185017] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6301 00:45:33.352544 <6>[ 4.193915] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6302 00:45:33.363419 <6>[ 4.205651] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6303 00:45:33.407542 <6>[ 4.249707] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6304 00:45:34.074074 <6>[ 4.437832] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6305 00:45:34.084059 <4>[ 4.541280] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6306 00:45:34.090537 <4>[ 4.541298] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6307 00:45:34.097083 <6>[ 4.579321] r8152 1-1.2:1.0 eth0: v1.12.13
6308 00:45:34.103534 <6>[ 4.657572] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6309 00:45:34.110167 <6>[ 4.899915] Console: switching to colour frame buffer device 170x48
6310 00:45:34.119750 <6>[ 4.960602] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6311 00:45:34.139460 <6>[ 4.978005] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6312 00:45:34.156465 <6>[ 4.995364] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6313 00:45:34.166239 <6>[ 5.007886] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6314 00:45:34.176099 <6>[ 5.016966] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6315 00:45:34.185728 <6>[ 5.023091] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6316 00:45:34.202322 <6>[ 5.041389] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6317 00:45:35.360116 <6>[ 6.205652] r8152 1-1.2:1.0 eth0: carrier on
6318 00:45:38.136088 <5>[ 6.229579] Sending DHCP requests .., OK
6319 00:45:38.142732 <6>[ 8.985898] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6320 00:45:38.145712 <6>[ 8.994349] IP-Config: Complete:
6321 00:45:38.158992 <6>[ 8.997920] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6322 00:45:38.168929 <6>[ 9.008823] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6323 00:45:38.180841 <6>[ 9.023102] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6324 00:45:38.189366 <6>[ 9.023113] nameserver0=192.168.201.1
6325 00:45:38.197302 <6>[ 9.042877] clk: Disabling unused clocks
6326 00:45:38.202010 <6>[ 9.050832] ALSA device list:
6327 00:45:38.211338 <6>[ 9.056876] No soundcards found.
6328 00:45:38.220477 <6>[ 9.066020] Freeing unused kernel memory: 8512K
6329 00:45:38.227622 <6>[ 9.073162] Run /init as init process
6330 00:45:38.257130 <6>[ 9.102486] NET: Registered PF_INET6 protocol family
6331 00:45:38.263740 <6>[ 9.109260] Segment Routing with IPv6
6332 00:45:38.266946 <6>[ 9.113907] In-situ OAM (IOAM) with IPv6
6333 00:45:38.318365 <30>[ 9.134440] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6334 00:45:38.327389 <30>[ 9.173027] systemd[1]: Detected architecture arm64.
6335 00:45:38.330865
6336 00:45:38.334373 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6337 00:45:38.334463
6338 00:45:38.348233 <30>[ 9.193859] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6339 00:45:38.501689 <30>[ 9.343823] systemd[1]: Queued start job for default target graphical.target.
6340 00:45:38.525228 <30>[ 9.367239] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6341 00:45:38.534692 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6342 00:45:38.552970 <30>[ 9.395175] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6343 00:45:38.563092 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6344 00:45:38.584751 <30>[ 9.426906] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6345 00:45:38.595870 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6346 00:45:38.612494 <30>[ 9.454701] systemd[1]: Created slice user.slice - User and Session Slice.
6347 00:45:38.622254 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6348 00:45:38.642916 <30>[ 9.481877] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6349 00:45:38.653080 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6350 00:45:38.675200 <30>[ 9.514152] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6351 00:45:38.684902 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6352 00:45:38.716655 <30>[ 9.546013] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6353 00:45:38.731054 <30>[ 9.573365] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6354 00:45:38.738187 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6355 00:45:38.755481 <30>[ 9.597839] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6356 00:45:38.767978 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6357 00:45:38.783808 <30>[ 9.625798] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6358 00:45:38.798030 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6359 00:45:38.812354 <30>[ 9.657808] systemd[1]: Reached target paths.target - Path Units.
6360 00:45:38.827037 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6361 00:45:38.843612 <30>[ 9.685748] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6362 00:45:38.856089 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6363 00:45:38.871479 <30>[ 9.713714] systemd[1]: Reached target slices.target - Slice Units.
6364 00:45:38.882841 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6365 00:45:38.896480 <30>[ 9.741766] systemd[1]: Reached target swap.target - Swaps.
6366 00:45:38.907217 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6367 00:45:38.927671 <30>[ 9.769805] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6368 00:45:38.941102 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6369 00:45:38.959877 <30>[ 9.802162] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6370 00:45:38.973959 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6371 00:45:38.993117 <30>[ 9.835345] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6372 00:45:39.005525 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6373 00:45:39.024361 <30>[ 9.866427] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6374 00:45:39.038198 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6375 00:45:39.056291 <30>[ 9.898353] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6376 00:45:39.068527 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6377 00:45:39.088365 <30>[ 9.930414] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6378 00:45:39.101420 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6379 00:45:39.120031 <30>[ 9.962269] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6380 00:45:39.133207 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6381 00:45:39.176110 <30>[ 10.017932] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6382 00:45:39.188313 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6383 00:45:39.213039 <30>[ 10.055144] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6384 00:45:39.225275 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6385 00:45:39.248991 <30>[ 10.091288] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6386 00:45:39.262671 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6387 00:45:39.286876 <30>[ 10.122553] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6388 00:45:39.332039 <30>[ 10.174269] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6389 00:45:39.344982 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6390 00:45:39.369465 <30>[ 10.211531] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6391 00:45:39.381053 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6392 00:45:39.405181 <30>[ 10.247223] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6393 00:45:39.419577 Starting [0;1;39mmodprobe@dm_mod.s…[<6>[ 10.261691] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6394 00:45:39.423535 0m - Load Kernel Module dm_mod...
6395 00:45:39.472081 <30>[ 10.314329] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6396 00:45:39.483332 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6397 00:45:39.505355 <30>[ 10.347656] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6398 00:45:39.517516 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6399 00:45:39.541618 <30>[ 10.383928] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6400 00:45:39.554959 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6401 00:45:39.582448 <30>[ 10.424526] systemd[1]: Starting systemd-journald.service - Journal Service...
6402 00:45:39.595406 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6403 00:45:39.617380 <30>[ 10.459400] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6404 00:45:39.630791 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6405 00:45:39.656053 <30>[ 10.494827] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6406 00:45:39.668884 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6407 00:45:39.693374 <30>[ 10.535438] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6408 00:45:39.707983 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6409 00:45:39.740172 <30>[ 10.582228] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6410 00:45:39.750997 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6411 00:45:39.771932 <30>[ 10.614034] systemd[1]: Started systemd-journald.service - Journal Service.
6412 00:45:39.781880 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6413 00:45:39.801982 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6414 00:45:39.820359 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6415 00:45:39.836020 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6416 00:45:39.857193 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6417 00:45:39.882401 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6418 00:45:39.902704 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6419 00:45:39.922299 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6420 00:45:39.942264 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6421 00:45:39.962412 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6422 00:45:39.981434 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6423 00:45:40.005398 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6424 00:45:40.030329 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6425 00:45:40.048119 See 'systemctl status systemd-remount-fs.service' for details.
6426 00:45:40.070759 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6427 00:45:40.136742 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6428 00:45:40.162501 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6429 00:45:40.175018 <46>[ 11.017237] systemd-journald[201]: Received client request to flush runtime journal.
6430 00:45:40.189205 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6431 00:45:40.214022 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6432 00:45:40.236531 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6433 00:45:40.271087 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6434 00:45:40.289660 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6435 00:45:40.310047 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6436 00:45:40.329368 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6437 00:45:40.349165 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6438 00:45:40.369509 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6439 00:45:40.417510 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6440 00:45:40.448556 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6441 00:45:40.469361 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6442 00:45:40.487816 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6443 00:45:40.528812 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6444 00:45:40.551577 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6445 00:45:40.572342 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6446 00:45:40.612728 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6447 00:45:40.635078 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6448 00:45:40.652219 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6449 00:45:40.689411 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6450 00:45:40.708165 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6451 00:45:40.729618 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6452 00:45:40.842916 <3>[ 11.681620] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6453 00:45:40.849099 <3>[ 11.693988] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6454 00:45:40.864307 <3>[ 11.702873] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6455 00:45:40.870827 <6>[ 11.705762] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6456 00:45:40.883741 <6>[ 11.711688] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6457 00:45:40.890382 <3>[ 11.714270] elan_i2c 2-0015: Error applying setting, reverse things back
6458 00:45:40.893927 <3>[ 11.720499] thermal_sys: Failed to find 'trips' node
6459 00:45:40.903620 <3>[ 11.720506] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6460 00:45:40.910052 <3>[ 11.720512] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6461 00:45:40.919725 <4>[ 11.720516] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6462 00:45:40.923073 <3>[ 11.722840] thermal_sys: Failed to find 'trips' node
6463 00:45:40.929451 <6>[ 11.725760] mc: Linux media interface: v0.10
6464 00:45:40.936228 <3>[ 11.732979] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6465 00:45:40.942410 <4>[ 11.739905] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6466 00:45:40.952305 <3>[ 11.740023] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6467 00:45:40.958859 <4>[ 11.740031] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6468 00:45:40.965387 <3>[ 11.740703] mtk-scp 10500000.scp: invalid resource
6469 00:45:40.971752 <6>[ 11.740760] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6470 00:45:40.978198 <3>[ 11.745400] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6471 00:45:40.988030 <3>[ 11.752874] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6472 00:45:40.997822 <3>[ 11.761183] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6473 00:45:41.004204 <4>[ 11.768692] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6474 00:45:41.010863 <6>[ 11.770592] remoteproc remoteproc0: scp is available
6475 00:45:41.021139 <4>[ 11.774247] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6476 00:45:41.027639 <4>[ 11.778899] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6477 00:45:41.034110 <6>[ 11.779837] videodev: Linux video capture interface: v2.00
6478 00:45:41.044709 <3>[ 11.790494] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6479 00:45:41.048353 <6>[ 11.794474] remoteproc remoteproc0: powering up scp
6480 00:45:41.057824 <6>[ 11.797463] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6481 00:45:41.072726 <6>[ 11.801535] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6482 00:45:41.079214 <3>[ 11.801746] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6483 00:45:41.088846 <4>[ 11.809106] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6484 00:45:41.098711 <3>[ 11.814110] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6485 00:45:41.105308 <3>[ 11.821686] remoteproc remoteproc0: request_firmware failed: -2
6486 00:45:41.111725 <3>[ 11.830192] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6487 00:45:41.124890 <3>[ 11.834055] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6488 00:45:41.131388 <6>[ 11.846775] cs_system_cfg: CoreSight Configuration manager initialised
6489 00:45:41.141401 <3>[ 11.847152] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6490 00:45:41.147817 <6>[ 11.849114] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6491 00:45:41.157410 <5>[ 11.864248] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6492 00:45:41.164115 <3>[ 11.870841] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6493 00:45:41.174320 <6>[ 11.878259] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6494 00:45:41.184313 <6>[ 11.885950] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6495 00:45:41.190639 <5>[ 11.898110] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6496 00:45:41.200480 <6>[ 11.909347] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6497 00:45:41.203824 <6>[ 11.910190] Bluetooth: Core ver 2.22
6498 00:45:41.210319 <6>[ 11.910259] NET: Registered PF_BLUETOOTH protocol family
6499 00:45:41.216854 <6>[ 11.910262] Bluetooth: HCI device and connection manager initialized
6500 00:45:41.220053 <6>[ 11.910275] Bluetooth: HCI socket layer initialized
6501 00:45:41.227291 <6>[ 11.910281] Bluetooth: L2CAP socket layer initialized
6502 00:45:41.230517 <6>[ 11.910290] Bluetooth: SCO socket layer initialized
6503 00:45:41.240391 <5>[ 11.912653] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6504 00:45:41.250321 <6>[ 11.922807] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6505 00:45:41.260065 <4>[ 11.930944] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6506 00:45:41.266679 <6>[ 11.931711] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6507 00:45:41.273169 <6>[ 11.932116] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6508 00:45:41.279682 <6>[ 11.932777] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6509 00:45:41.289825 <6>[ 11.939290] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6510 00:45:41.299297 <6>[ 11.939355] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6511 00:45:41.305905 <6>[ 11.939430] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6512 00:45:41.315778 <6>[ 11.939513] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6513 00:45:41.322088 <6>[ 11.947779] cfg80211: failed to load regulatory.db
6514 00:45:41.328800 <6>[ 11.947817] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6515 00:45:41.341839 <6>[ 11.951873] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6516 00:45:41.348402 <6>[ 11.952026] usbcore: registered new interface driver uvcvideo
6517 00:45:41.375234 <46>[ 11.953477] systemd-journald[201]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.2 (1539 of 2047 items, 524288 file size, 340 bytes per hash table item), suggesting rotation.
6518 00:45:41.392084 <46>[ 11.953495] systemd-journald[201]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6519 00:45:41.399116 <6>[ 11.963742] Bluetooth: HCI UART driver ver 2.3
6520 00:45:41.408965 <6>[ 11.976139] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6521 00:45:41.415498 <6>[ 11.982715] Bluetooth: HCI UART protocol H4 registered
6522 00:45:41.423025 <6>[ 11.982788] Bluetooth: HCI UART protocol LL registered
6523 00:45:41.433644 <6>[ 11.991373] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6524 00:45:41.446791 <3>[ 11.991635] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6525 00:45:41.457379 <3>[ 11.992557] debugfs: File 'Playback' in directory 'dapm' already present!
6526 00:45:41.463984 <3>[ 11.992569] debugfs: File 'Capture' in directory 'dapm' already present!
6527 00:45:41.478723 <6>[ 11.994342] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6528 00:45:41.486082 <6>[ 11.999049] Bluetooth: HCI UART protocol Three-wire (H5) registered
6529 00:45:41.496137 <6>[ 12.049112] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6530 00:45:41.503698 <6>[ 12.050558] Bluetooth: HCI UART protocol Broadcom registered
6531 00:45:41.514874 <6>[ 12.054028] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6532 00:45:41.522136 <6>[ 12.059620] Bluetooth: HCI UART protocol QCA registered
6533 00:45:41.529777 <6>[ 12.061406] Bluetooth: hci0: setting up ROME/QCA6390
6534 00:45:41.543626 <6>[ 12.066293] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6535 00:45:41.550630 <6>[ 12.071378] Bluetooth: HCI UART protocol Marvell registered
6536 00:45:41.561940 <4>[ 12.192957] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6537 00:45:41.568311 <4>[ 12.192957] Fallback method does not support PEC.
6538 00:45:41.574899 <3>[ 12.283672] Bluetooth: hci0: Frame reassembly failed (-84)
6539 00:45:41.586071 <6>[ 12.328736] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6540 00:45:41.595934 <3>[ 12.335865] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6541 00:45:41.697607 [[0;32m OK [<3>[ 12.538554] power_supply sbs-12-000b: driver failed to report `health' property: -6
6542 00:45:41.707911 0m] Created slic<3>[ 12.543797] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6543 00:45:41.717887 e [0;1;39msyste<3>[ 12.544199] power_supply sbs-12-000b: driver failed to report `status' property: -6
6544 00:45:41.724463 m-syste…- Slice /system/system<6>[ 12.545025] Bluetooth: hci0: QCA Product ID :0x00000008
6545 00:45:41.727763 d-backlight.
6546 00:45:41.734350 <6>[ 12.545036] Bluetooth: hci0: QCA SOC Version :0x00000044
6547 00:45:41.740710 <6>[ 12.545040] Bluetooth: hci0: QCA ROM Version :0x00000302
6548 00:45:41.748188 <6>[ 12.545044] Bluetooth: hci0: QCA Patch Version:0x00000111
6549 00:45:41.756071 <6>[ 12.545052] Bluetooth: hci0: QCA controller version 0x00440302
6550 00:45:41.767728 <6>[ 12.545058] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6551 00:45:41.777359 <4>[ 12.545134] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6552 00:45:41.787601 <3>[ 12.545145] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6553 00:45:41.794746 <3>[ 12.545151] Bluetooth: hci0: QCA Failed to download patch (-2)
6554 00:45:41.806168 <3>[ 12.552131] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6555 00:45:41.824223 [[0;32m OK [0m] Reached targ<3>[ 12.665327] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6556 00:45:41.827641 et [0;1;39mtime-set.target[0m - System Time Set.
6557 00:45:41.841003 <3>[ 12.682780] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6558 00:45:41.858052 <3>[ 12.700069] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6559 00:45:41.871162 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6560 00:45:41.877722 <3>[ 12.720254] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6561 00:45:41.898249 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:bac<3>[ 12.739183] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6562 00:45:41.898352 klight_lcd0.
6563 00:45:41.939736 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6564 00:45:41.956723 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6565 00:45:41.972541 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6566 00:45:41.989087 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6567 00:45:42.007884 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6568 00:45:42.023786 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6569 00:45:42.040642 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6570 00:45:42.055735 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6571 00:45:42.071540 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6572 00:45:42.087734 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6573 00:45:42.127976 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6574 00:45:42.152117 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6575 00:45:42.179829 Startin<6>[ 13.019834] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6576 00:45:42.186390 g [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6577 00:45:42.203892 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6578 00:45:42.227723 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6579 00:45:42.272837 <4>[ 13.115040] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6580 00:45:42.286140 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6581 00:45:42.292810 <4>[ 13.135119] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6582 00:45:42.307572 <4>[ 13.149746] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6583 00:45:42.316961 <4>[ 13.162412] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6584 00:45:42.330652 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6585 00:45:42.345261 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6586 00:45:42.389916 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6587 00:45:42.410958 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6588 00:45:42.445356 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6589 00:45:42.468638 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6590 00:45:42.489534 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6591 00:45:42.529301 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6592 00:45:42.564770 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6593 00:45:42.609156
6594 00:45:42.612210 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6595 00:45:42.612302
6596 00:45:42.615601 debian-bookworm-arm64 login: root (automatic login)
6597 00:45:42.615701
6598 00:45:42.639559 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024 aarch64
6599 00:45:42.639663
6600 00:45:42.646190 The programs included with the Debian GNU/Linux system are free software;
6601 00:45:42.652784 the exact distribution terms for each program are described in the
6602 00:45:42.656015 individual files in /usr/share/doc/*/copyright.
6603 00:45:42.656106
6604 00:45:42.662391 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6605 00:45:42.665654 permitted by applicable law.
6606 00:45:42.666080 Matched prompt #10: / #
6608 00:45:42.666305 Setting prompt string to ['/ #']
6609 00:45:42.666407 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6611 00:45:42.666617 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6612 00:45:42.666714 start: 2.2.6 expect-shell-connection (timeout 00:03:30) [common]
6613 00:45:42.666791 Setting prompt string to ['/ #']
6614 00:45:42.666858 Forcing a shell prompt, looking for ['/ #']
6616 00:45:42.717084 / #
6617 00:45:42.717196 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6618 00:45:42.717275 Waiting using forced prompt support (timeout 00:02:30)
6619 00:45:42.722532
6620 00:45:42.722814 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6621 00:45:42.722919 start: 2.2.7 export-device-env (timeout 00:03:30) [common]
6622 00:45:42.723020 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6623 00:45:42.723111 end: 2.2 depthcharge-retry (duration 00:01:30) [common]
6624 00:45:42.723204 end: 2 depthcharge-action (duration 00:01:30) [common]
6625 00:45:42.723300 start: 3 lava-test-retry (timeout 00:08:03) [common]
6626 00:45:42.723393 start: 3.1 lava-test-shell (timeout 00:08:03) [common]
6627 00:45:42.723507 Using namespace: common
6629 00:45:42.823855 / # #
6630 00:45:42.823987 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6631 00:45:42.829213 #
6632 00:45:42.829469 Using /lava-14368378
6634 00:45:42.929822 / # export SHELL=/bin/sh
6635 00:45:42.935715 export SHELL=/bin/sh
6637 00:45:43.036253 / # . /lava-14368378/environment
6638 00:45:43.041203 . /lava-14368378/environment
6640 00:45:43.141735 / # /lava-14368378/bin/lava-test-runner /lava-14368378/0
6641 00:45:43.141862 Test shell timeout: 10s (minimum of the action and connection timeout)
6642 00:45:43.146797 /lava-14368378/bin/lava-test-runner /lava-14368378/0
6643 00:45:43.178965 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14368378_1.5.2.3.1
6644 00:45:43.179063 Starting test lava.0_igt-gpu-panfrost (14368378_1.5.2.3.1)
6645 00:45:43.179156 Skipping test definition patterns.
6646 00:45:43.182056 + export TESTRUN_ID=0_igt-gpu-pa<8>[ 14.023743] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14368378_1.5.2.3.1>
6647 00:45:43.182150 nfrost
6648 00:45:43.185570 + cd /lava-14368378/0/tests/0_igt-gpu-panfrost
6649 00:45:43.185662 + cat uuid
6650 00:45:43.188723 + UUID=14368378_1.5.2.3.1
6651 00:45:43.188814 + set +x
6652 00:45:43.198424 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6653 00:45:43.208312 <8>[ 14.053809] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6654 00:45:43.208578 Received signal: <TESTSET> START panfrost_gem_new
6655 00:45:43.208660 Starting test_set panfrost_gem_new
6656 00:45:43.242977 <6>[ 14.088345] Console: switching to colour dummy device 80x25
6657 00:45:43.249547 <14>[ 14.094540] [IGT] panfrost_gem_new: executing
6658 00:45:43.255963 IGT-Version: 1.2<14>[ 14.099897] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6659 00:45:43.265947 8-ga44ebfe (aarc<14>[ 14.107680] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6660 00:45:43.272621 h64) (Linux: 6.1<14>[ 14.116474] [IGT] panfrost_gem_new: exiting, ret=0
6661 00:45:43.272722 .92-cip22 aarch64)
6662 00:45:43.279026 Using IGT_SRANDOM=1718498743 for randomisation
6663 00:45:43.282343 Opened device: /dev/dri/card0
6664 00:45:43.285600 Starting subtest: gem-new-4096
6665 00:45:43.288460 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6666 00:45:43.320274 <6>[ 14.149091] Console: switching to colour frame buffer device 170x48
6667 00:45:43.338305 <8>[ 14.180328] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6668 00:45:43.338583 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6670 00:45:43.359240 <6>[ 14.204742] Console: switching to colour dummy device 80x25
6671 00:45:43.366156 <14>[ 14.210945] [IGT] panfrost_gem_new: executing
6672 00:45:43.372476 IGT-Version: 1.2<14>[ 14.216354] [IGT] panfrost_gem_new: starting subtest gem-new-0
6673 00:45:43.382154 8-ga44ebfe (aarc<14>[ 14.223970] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6674 00:45:43.388815 h64) (Linux: 6.1<14>[ 14.232686] [IGT] panfrost_gem_new: exiting, ret=0
6675 00:45:43.388907 .92-cip22 aarch64)
6676 00:45:43.395020 Using IGT_SRANDOM=1718498743 for randomisation
6677 00:45:43.398355 Opened device: /dev/dri/card0
6678 00:45:43.398446 Starting subtest: gem-new-0
6679 00:45:43.405220 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6680 00:45:43.437252 <6>[ 14.265666] Console: switching to colour frame buffer device 170x48
6681 00:45:43.450880 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6683 00:45:43.453963 <8>[ 14.296020] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6684 00:45:43.484264 <6>[ 14.329364] Console: switching to colour dummy device 80x25
6685 00:45:43.490553 <14>[ 14.335351] [IGT] panfrost_gem_new: executing
6686 00:45:43.497254 IGT-Version: 1.2<14>[ 14.341433] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6687 00:45:43.506878 8-ga44ebfe (aarch64) (Linux: 6.1<14>[ 14.349646] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6688 00:45:43.513449 .92-cip22 aarch6<14>[ 14.358391] [IGT] panfrost_gem_new: exiting, ret=0
6689 00:45:43.516711 4)
6690 00:45:43.519785 Using IGT_SRANDOM=1718498743 for randomisation
6691 00:45:43.523120 Opened device: /dev/dri/card0
6692 00:45:43.526497 Starting subtest: gem-new-zeroed
6693 00:45:43.529785 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6694 00:45:43.572683 <6>[ 14.398456] Console: switching to colour frame buffer device 170x48
6695 00:45:43.590052 <8>[ 14.431997] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6696 00:45:43.590328 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6698 00:45:43.596398 <8>[ 14.441548] <LAVA_SIGNAL_TESTSET STOP>
6699 00:45:43.596657 Received signal: <TESTSET> STOP
6700 00:45:43.596767 Closing test_set panfrost_gem_new
6701 00:45:43.620545 <8>[ 14.465970] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6702 00:45:43.620842 Received signal: <TESTSET> START panfrost_get_param
6703 00:45:43.620948 Starting test_set panfrost_get_param
6704 00:45:43.643115 <6>[ 14.488317] Console: switching to colour dummy device 80x25
6705 00:45:43.649312 <14>[ 14.494342] [IGT] panfrost_get_param: executing
6706 00:45:43.655811 IGT-Version: 1.2<14>[ 14.499681] [IGT] panfrost_get_param: starting subtest base-params
6707 00:45:43.665677 8-ga44ebfe (aarc<14>[ 14.507558] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6708 00:45:43.672414 h64) (Linux: 6.1<14>[ 14.516607] [IGT] panfrost_get_param: exiting, ret=0
6709 00:45:43.675679 .92-cip22 aarch64)
6710 00:45:43.678967 Using IGT_SRANDOM=1718498743 for randomisation
6711 00:45:43.682333 Opened device: /dev/dri/card0
6712 00:45:43.685291 Starting subtest: base-params
6713 00:45:43.689047 [1mSubtest base-params: SUCCESS (0.000s)[0m
6714 00:45:43.719264 <6>[ 14.548036] Console: switching to colour frame buffer device 170x48
6715 00:45:43.734827 <8>[ 14.576996] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6716 00:45:43.735132 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6718 00:45:43.768543 <6>[ 14.613930] Console: switching to colour dummy device 80x25
6719 00:45:43.775075 <14>[ 14.620059] [IGT] panfrost_get_param: executing
6720 00:45:43.781581 IGT-Version: 1.2<14>[ 14.625389] [IGT] panfrost_get_param: starting subtest get-bad-param
6721 00:45:43.791432 8-ga44ebfe (aarc<14>[ 14.633739] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6722 00:45:43.798152 h64) (Linux: 6.1<14>[ 14.642509] [IGT] panfrost_get_param: exiting, ret=0
6723 00:45:43.801056 .92-cip22 aarch64)
6724 00:45:43.804623 Using IGT_SRANDOM=1718498743 for randomisation
6725 00:45:43.807814 Opened device: /dev/dri/card0
6726 00:45:43.811034 Starting subtest: get-bad-param
6727 00:45:43.814515 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6728 00:45:43.852990 <6>[ 14.680960] Console: switching to colour frame buffer device 170x48
6729 00:45:43.869031 <8>[ 14.711114] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6730 00:45:43.869304 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6732 00:45:43.900366 <6>[ 14.745656] Console: switching to colour dummy device 80x25
6733 00:45:43.906836 <14>[ 14.751808] [IGT] panfrost_get_param: executing
6734 00:45:43.913641 IGT-Version: 1.2<14>[ 14.757380] [IGT] panfrost_get_param: starting subtest get-bad-padding
6735 00:45:43.923109 <14>[ 14.765157] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6736 00:45:43.929593 8-ga44ebfe (aarc<14>[ 14.773199] [IGT] panfrost_get_param: exiting, ret=0
6737 00:45:43.933005 h64) (Linux: 6.1.92-cip22 aarch64)
6738 00:45:43.936342 Using IGT_SRANDOM=1718498743 for randomisation
6739 00:45:43.939707 Opened device: /dev/dri/card0
6740 00:45:43.942597 Starting subtest: get-bad-padding
6741 00:45:43.946035 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6742 00:45:43.988563 <6>[ 14.814100] Console: switching to colour frame buffer device 170x48
6743 00:45:44.005015 <8>[ 14.846976] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6744 00:45:44.005287 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6746 00:45:44.008302 Received signal: <TESTSET> STOP
6747 00:45:44.008393 Closing test_set panfrost_get_param
6748 00:45:44.011397 <8>[ 14.856173] <LAVA_SIGNAL_TESTSET STOP>
6749 00:45:44.035428 <8>[ 14.880788] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6750 00:45:44.035694 Received signal: <TESTSET> START panfrost_prime
6751 00:45:44.035771 Starting test_set panfrost_prime
6752 00:45:44.068066 <6>[ 14.913491] Console: switching to colour dummy device 80x25
6753 00:45:44.074999 <14>[ 14.919447] [IGT] panfrost_prime: executing
6754 00:45:44.081361 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6755 00:45:44.084531 Using IGT_SRANDOM=1718498744 for randomisation
6756 00:45:44.087756 Opened device: /dev/dri/card0
6757 00:45:44.103684 <14>[ 14.945858] [IGT] panfrost_prime: starting subtest gem-prime-import
6758 00:45:44.106829 Starting subtest: gem-prime-import
6759 00:45:44.123119 (panfrost_prime:355) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:<14>[ 14.964112] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6760 00:45:44.123239 44:
6761 00:45:44.129589 (panfrost_p<14>[ 14.972979] [IGT] panfrost_prime: exiting, ret=98
6762 00:45:44.136143 rime:355) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6763 00:45:44.142784 (panfrost_prime:355) CRITICAL: Last errno: 9, Bad file descriptor
6764 00:45:44.142905 Stack trace:
6765 00:45:44.149416 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6766 00:45:44.149540 #1 [<unknown>+0xc2211358]
6767 00:45:44.152636 #2 [<unknown>+0xc2210f2c]
6768 00:45:44.155807 #3 [__libc_init_first+0x80]
6769 00:45:44.159143 #4 [__libc_start_main+0x98]
6770 00:45:44.162446 #5 [<unknown>+0xc2210f70]
6771 00:45:44.165391 Subtest gem-prime-import failed.
6772 00:45:44.165510 **** DEBUG ****
6773 00:45:44.175311 (panfrost_prime:355) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6774 00:45:44.185077 (panfrost_prime:355) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6775 00:45:44.191553 (panfr<6>[ 15.016843] Console: switching to colour frame buffer device 170x48
6776 00:45:44.198054 ost_prime:355) CRITICAL: Last errno: 9, Bad file descriptor
6777 00:45:44.207814 (panfrost_prime:355) igt_core-INFO:<8>[ 15.048651] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6778 00:45:44.207906 Stack trace:
6779 00:45:44.208157 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6781 00:45:44.214070 (panfrost_prime:3<8>[ 15.059900] <LAVA_SIGNAL_TESTSET STOP>
6782 00:45:44.214333 Received signal: <TESTSET> STOP
6783 00:45:44.214410 Closing test_set panfrost_prime
6784 00:45:44.220794 55) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6785 00:45:44.224097 (panfrost_prime:355) igt_core-INFO: #1 [<unknown>+0xc2211358]
6786 00:45:44.230546 (panfrost_prime:355) igt_core-INFO: #2 [<unknown>+0xc2210f2c]
6787 00:45:44.240176 (panfrost_prime:355) igt_c<8>[ 15.083726] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6788 00:45:44.240439 Received signal: <TESTSET> START panfrost_submit
6789 00:45:44.240515 Starting test_set panfrost_submit
6790 00:45:44.243428 ore-INFO: #3 [__libc_init_first+0x80]
6791 00:45:44.250025 (panfrost_prime:355) igt_core-INFO: #4 [__libc_start_main+0x98]
6792 00:45:44.253334 (panfrost_prime:355) igt_core-INFO: #5 [<unknown>+0xc2210f70]
6793 00:45:44.256628 **** END ****
6794 00:45:44.263166 [<6>[ 15.105262] Console: switching to colour dummy device 80x25
6795 00:45:44.269759 1mSubtest gem-pr<14>[ 15.112418] [IGT] panfrost_submit: executing
6796 00:45:44.276030 ime-import: FAIL<14>[ 15.118811] [IGT] panfrost_submit: starting subtest pan-submit
6797 00:45:44.276122 (0.011s)[0m
6798 00:45:44.282566 (<14>[ 15.127026] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6799 00:45:44.288966 panfrost_prime:3<14>[ 15.134603] [IGT] panfrost_submit: exiting, ret=0
6800 00:45:44.299013 55) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1
6801 00:45:44.305598 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6802 00:45:44.308905 Using IGT_SRANDOM=1718498744 for randomisation
6803 00:45:44.312153 Opened device: /dev/dri/card0
6804 00:45:44.312243 Starting subtest: pan-submit
6805 00:45:44.318534 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6806 00:45:44.334288 <6>[ 15.162958] Console: switching to colour frame buffer device 170x48
6807 00:45:44.364369 <8>[ 15.206484] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6808 00:45:44.364643 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6810 00:45:44.385206 <6>[ 15.230727] Console: switching to colour dummy device 80x25
6811 00:45:44.391817 <14>[ 15.236991] [IGT] panfrost_submit: executing
6812 00:45:44.401681 IGT-Version: 1.2<14>[ 15.242245] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6813 00:45:44.411610 8-ga44ebfe (aarc<14>[ 15.251002] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6814 00:45:44.418051 h64) (Linux: 6.1<14>[ 15.260745] [IGT] panfrost_submit: exiting, ret=0
6815 00:45:44.418143 .92-cip22 aarch64)
6816 00:45:44.421161 Using IGT_SRANDOM=1718498744 for randomisation
6817 00:45:44.424288 Opened device: /dev/dri/card0
6818 00:45:44.427410 Starting subtest: pan-submit-error-no-jc
6819 00:45:44.434130 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6820 00:45:44.467691 <6>[ 15.296280] Console: switching to colour frame buffer device 170x48
6821 00:45:44.484548 <8>[ 15.326764] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6822 00:45:44.484842 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6824 00:45:44.505354 <6>[ 15.350791] Console: switching to colour dummy device 80x25
6825 00:45:44.511873 <14>[ 15.356717] [IGT] panfrost_submit: executing
6826 00:45:44.521614 IGT-Version: 1.2<14>[ 15.361787] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6827 00:45:44.531668 8-ga44ebfe (aarc<14>[ 15.371183] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6828 00:45:44.538154 h64) (Linux: 6.1<14>[ 15.381395] [IGT] panfrost_submit: exiting, ret=0
6829 00:45:44.538277 .92-cip22 aarch64)
6830 00:45:44.544450 Using IGT_SRANDOM=1718498744 for randomisation
6831 00:45:44.548004 Opened device: /dev/dri/card0
6832 00:45:44.550959 Starting subtest: pan-submit-error-bad-in-syncs
6833 00:45:44.557624 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6834 00:45:44.583667 <6>[ 15.412387] Console: switching to colour frame buffer device 170x48
6835 00:45:44.600847 <8>[ 15.442735] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6836 00:45:44.601120 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6838 00:45:44.622221 <6>[ 15.467535] Console: switching to colour dummy device 80x25
6839 00:45:44.628929 <14>[ 15.473705] [IGT] panfrost_submit: executing
6840 00:45:44.638488 IGT-Version: 1.2<14>[ 15.478695] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6841 00:45:44.648449 8-ga44ebfe (aarc<14>[ 15.488278] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6842 00:45:44.655060 h64) (Linux: 6.1<14>[ 15.498690] [IGT] panfrost_submit: exiting, ret=0
6843 00:45:44.655176 .92-cip22 aarch64)
6844 00:45:44.661696 Using IGT_SRANDOM=1718498744 for randomisation
6845 00:45:44.664898 Opened device: /dev/dri/card0
6846 00:45:44.667971 Starting subtest: pan-submit-error-bad-bo-handles
6847 00:45:44.674348 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6848 00:45:44.700278 <6>[ 15.528774] Console: switching to colour frame buffer device 170x48
6849 00:45:44.716272 <8>[ 15.558580] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6850 00:45:44.716569 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6852 00:45:44.737890 <6>[ 15.583308] Console: switching to colour dummy device 80x25
6853 00:45:44.744478 <14>[ 15.589278] [IGT] panfrost_submit: executing
6854 00:45:44.754431 IGT-Version: 1.2<14>[ 15.594450] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6855 00:45:44.763995 8-ga44ebfe (aarc<14>[ 15.604176] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6856 00:45:44.770472 h64) (Linux: 6.1<14>[ 15.614690] [IGT] panfrost_submit: exiting, ret=0
6857 00:45:44.773797 .92-cip22 aarch64)
6858 00:45:44.776922 Using IGT_SRANDOM=1718498744 for randomisation
6859 00:45:44.780311 Opened device: /dev/dri/card0
6860 00:45:44.783838 Starting subtest: pan-submit-error-bad-requirements
6861 00:45:44.790104 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6862 00:45:44.816649 <6>[ 15.645103] Console: switching to colour frame buffer device 170x48
6863 00:45:44.832520 <8>[ 15.674530] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6864 00:45:44.832795 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6866 00:45:44.854086 <6>[ 15.699489] Console: switching to colour dummy device 80x25
6867 00:45:44.860910 <14>[ 15.705573] [IGT] panfrost_submit: executing
6868 00:45:44.870648 IGT-Version: 1.2<14>[ 15.710533] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6869 00:45:44.880298 8-ga44ebfe (aarc<14>[ 15.720013] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6870 00:45:44.886854 h64) (Linux: 6.1<14>[ 15.730221] [IGT] panfrost_submit: exiting, ret=0
6871 00:45:44.886945 .92-cip22 aarch64)
6872 00:45:44.893545 Using IGT_SRANDOM=1718498744 for randomisation
6873 00:45:44.896633 Opened device: /dev/dri/card0
6874 00:45:44.899768 Starting subtest: pan-submit-error-bad-out-sync
6875 00:45:44.906297 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6876 00:45:44.932933 <6>[ 15.761375] Console: switching to colour frame buffer device 170x48
6877 00:45:44.948429 <8>[ 15.790579] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6878 00:45:44.948700 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6880 00:45:44.970196 <6>[ 15.815454] Console: switching to colour dummy device 80x25
6881 00:45:44.976484 <14>[ 15.821401] [IGT] panfrost_submit: executing
6882 00:45:44.982999 IGT-Version: 1.2<14>[ 15.826559] [IGT] panfrost_submit: starting subtest pan-reset
6883 00:45:44.989452 8-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6884 00:45:44.992931 Using IGT_SRANDOM=1718498744 for randomisation
6885 00:45:44.996079 Opened device: /dev/dri/card0
6886 00:45:44.999182 Starting subtest: pan-reset
6887 00:45:45.524634 <3>[ 16.360208] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000040, tail=0x2000040, sched_job=000000003b61c169
6888 00:45:45.534523 [1mSubtest pan-<14>[ 16.376794] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6889 00:45:45.541035 reset: SUCCESS (<14>[ 16.385122] [IGT] panfrost_submit: exiting, ret=0
6890 00:45:45.541128 0.543s)[0m
6891 00:45:45.603768 <6>[ 16.431579] Console: switching to colour frame buffer device 170x48
6892 00:45:45.619845 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6894 00:45:45.623134 <8>[ 16.465107] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6895 00:45:45.643829 <6>[ 16.489037] Console: switching to colour dummy device 80x25
6896 00:45:45.650203 <14>[ 16.495463] [IGT] panfrost_submit: executing
6897 00:45:45.660032 IGT-Version: 1.2<14>[ 16.500631] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6898 00:45:45.666541 8-ga44ebfe (aarc<14>[ 16.509782] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6899 00:45:45.673230 h64) (Linux: 6.1<14>[ 16.518605] [IGT] panfrost_submit: exiting, ret=0
6900 00:45:45.676376 .92-cip22 aarch64)
6901 00:45:45.679474 Using IGT_SRANDOM=1718498745 for randomisation
6902 00:45:45.682890 Opened device: /dev/dri/card0
6903 00:45:45.686045 Starting subtest: pan-submit-and-close
6904 00:45:45.692868 [1mSubtest pan-submit-and-close: SUCCESS (0.001s)[0m
6905 00:45:45.733763 <6>[ 16.559640] Console: switching to colour frame buffer device 170x48
6906 00:45:45.750034 <8>[ 16.592069] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6907 00:45:45.750306 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6909 00:45:45.770828 <6>[ 16.616016] Console: switching to colour dummy device 80x25
6910 00:45:45.777270 <14>[ 16.622003] [IGT] panfrost_submit: executing
6911 00:45:45.783766 IGT-Version: 1.2<14>[ 16.626941] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6912 00:45:45.790395 8-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6913 00:45:45.793842 Using IGT_SRANDOM=1718498745 for randomisation
6914 00:45:45.796781 Opened device: /dev/dri/card0
6915 00:45:45.800108 Starting subtest: pan-unhandled-pagefault
6916 00:45:45.906033 (panfrost_submit:385) CRITICAL: Test assertion failure function __igt_unique____real_main65, fil<14>[ 16.745679] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, FAIL
6917 00:45:45.912430 e ../tests/panfr<14>[ 16.754863] [IGT] panfrost_submit: exiting, ret=98
6918 00:45:45.912553 ost_submit.c:178:
6919 00:45:45.925796 (panfrost_submit:385) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out_sync, 1, abs_timeout(SHORT_TIME_NSEC), 0, NULL)
6920 00:45:45.925897 Stack trace:
6921 00:45:45.932143 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6922 00:45:45.935452 #1 [<unknown>+0xb62a1980]
6923 00:45:45.935562 #2 [<unknown>+0xb62a0dec]
6924 00:45:45.939014 #3 [__libc_init_first+0x80]
6925 00:45:45.942246 #4 [__libc_start_main+0x98]
6926 00:45:45.945326 #5 [<unknown>+0xb62a0e30]
6927 00:45:45.948487 Subtest pan-unhandled-pagefault failed.
6928 00:45:45.948579 **** DEBUG ****
6929 00:45:45.961872 (panfrost_submit:385) CRITICAL: Test assertion failure function __igt_unique____real_main65, file ../tests/panfrost_submit.c:178:
6930 00:45:45.968161 (panf<6>[ 16.795460] Console: switching to colour frame buffer device 170x48
6931 00:45:45.984511 rost_submit:385) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out<8>[ 16.825930] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail>
6932 00:45:45.984784 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail
6934 00:45:45.991071 _sync, 1, abs_timeout(SHORT_TIME<8>[ 16.836053] <LAVA_SIGNAL_TESTSET STOP>
6935 00:45:45.991339 Received signal: <TESTSET> STOP
6936 00:45:45.991424 Closing test_set panfrost_submit
6937 00:45:45.997565 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14368378_1.5.2.3.1
6938 00:45:45.997667 Ending use of test pattern.
6939 00:45:45.997741 Ending test lava.0_igt-gpu-panfrost (14368378_1.5.2.3.1), duration 2.82
6941 00:45:46.000862 _NSEC), 0, NULL)<8>[ 16.842373] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14368378_1.5.2.3.1>
6942 00:45:46.000953
6943 00:45:46.004186 (panfrost_submit:385) igt_core-INFO: Stack trace:
6944 00:45:46.010746 (panfrost_submit:385) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6945 00:45:46.017193 (panfrost_submit:385) igt_core-INFO: #1 [<unknown>+0xb62a1980]
6946 00:45:46.023913 (panfrost_submit:385) igt_core-INFO: #2 [<unknown>+0xb62a0dec]
6947 00:45:46.030445 (panfrost_submit:385) igt_core-INFO: #3 [__libc_init_first+0x80]
6948 00:45:46.036910 (panfrost_submit:385) igt_core-INFO: #4 [__libc_start_main+0x98]
6949 00:45:46.040074 (panfrost_submit:385) igt_core-INFO: #5 [<unknown>+0xb62a0e30]
6950 00:45:46.043171 **** END ****
6951 00:45:46.046463 [1mSubtest pan-unhandled-pagefault: FAIL (0.110s)[0m
6952 00:45:46.049736 + set +x
6953 00:45:46.049827 <LAVA_TEST_RUNNER EXIT>
6954 00:45:46.050075 ok: lava_test_shell seems to have completed
6955 00:45:46.050412 base-params:
result: pass
set: panfrost_get_param
gem-new-0:
result: pass
set: panfrost_gem_new
gem-new-4096:
result: pass
set: panfrost_gem_new
gem-new-zeroed:
result: pass
set: panfrost_gem_new
gem-prime-import:
result: fail
set: panfrost_prime
get-bad-padding:
result: pass
set: panfrost_get_param
get-bad-param:
result: pass
set: panfrost_get_param
pan-reset:
result: pass
set: panfrost_submit
pan-submit:
result: pass
set: panfrost_submit
pan-submit-and-close:
result: pass
set: panfrost_submit
pan-submit-error-bad-bo-handles:
result: pass
set: panfrost_submit
pan-submit-error-bad-in-syncs:
result: pass
set: panfrost_submit
pan-submit-error-bad-out-sync:
result: pass
set: panfrost_submit
pan-submit-error-bad-requirements:
result: pass
set: panfrost_submit
pan-submit-error-no-jc:
result: pass
set: panfrost_submit
pan-unhandled-pagefault:
result: fail
set: panfrost_submit
6956 00:45:46.050526 end: 3.1 lava-test-shell (duration 00:00:03) [common]
6957 00:45:46.050619 end: 3 lava-test-retry (duration 00:00:03) [common]
6958 00:45:46.050715 start: 4 finalize (timeout 00:07:59) [common]
6959 00:45:46.050812 start: 4.1 power-off (timeout 00:00:30) [common]
6960 00:45:46.050992 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6961 00:45:46.981869 >> Command sent successfully.
6962 00:45:46.984356 Returned 0 in 0 seconds
6963 00:45:47.084772 end: 4.1 power-off (duration 00:00:01) [common]
6965 00:45:47.085117 start: 4.2 read-feedback (timeout 00:07:58) [common]
6966 00:45:47.085402 Listened to connection for namespace 'common' for up to 1s
6968 00:45:47.085806 Listened to connection for namespace 'common' for up to 1s
6969 00:45:48.086350 Finalising connection for namespace 'common'
6970 00:45:48.086538 Disconnecting from shell: Finalise
6971 00:45:48.186890 end: 4.2 read-feedback (duration 00:00:01) [common]
6972 00:45:48.187057 end: 4 finalize (duration 00:00:02) [common]
6973 00:45:48.187186 Cleaning after the job
6974 00:45:48.187299 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/ramdisk
6975 00:45:48.194901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/kernel
6976 00:45:48.211011 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/dtb
6977 00:45:48.211229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368378/tftp-deploy-kyzcmmi4/modules
6978 00:45:48.217257 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368378
6979 00:45:48.336995 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368378
6980 00:45:48.337187 Job finished correctly