Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 49
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 00:39:24.511776 lava-dispatcher, installed at version: 2024.03
2 00:39:24.512052 start: 0 validate
3 00:39:24.512205 Start time: 2024-06-16 00:39:24.512199+00:00 (UTC)
4 00:39:24.512375 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:39:24.512569 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:39:24.766622 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:39:24.767325 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:39:56.285278 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:39:56.286176 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:39:56.539768 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:39:56.540411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:39:57.035977 Using caching service: 'http://localhost/cache/?uri=%s'
13 00:39:57.036141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 00:39:59.546228 validate duration: 35.03
16 00:39:59.547427 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:39:59.547972 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:39:59.548462 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:39:59.549151 Not decompressing ramdisk as can be used compressed.
20 00:39:59.549637 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:39:59.550033 saving as /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/ramdisk/initrd.cpio.gz
22 00:39:59.550388 total size: 5628169 (5 MB)
23 00:39:59.802161 progress 0 % (0 MB)
24 00:39:59.803770 progress 5 % (0 MB)
25 00:39:59.805447 progress 10 % (0 MB)
26 00:39:59.806851 progress 15 % (0 MB)
27 00:39:59.808364 progress 20 % (1 MB)
28 00:39:59.809736 progress 25 % (1 MB)
29 00:39:59.811261 progress 30 % (1 MB)
30 00:39:59.812784 progress 35 % (1 MB)
31 00:39:59.814163 progress 40 % (2 MB)
32 00:39:59.815665 progress 45 % (2 MB)
33 00:39:59.817032 progress 50 % (2 MB)
34 00:39:59.818537 progress 55 % (2 MB)
35 00:39:59.820028 progress 60 % (3 MB)
36 00:39:59.821357 progress 65 % (3 MB)
37 00:39:59.822867 progress 70 % (3 MB)
38 00:39:59.824236 progress 75 % (4 MB)
39 00:39:59.825729 progress 80 % (4 MB)
40 00:39:59.827139 progress 85 % (4 MB)
41 00:39:59.828646 progress 90 % (4 MB)
42 00:39:59.830196 progress 95 % (5 MB)
43 00:39:59.831553 progress 100 % (5 MB)
44 00:39:59.831766 5 MB downloaded in 0.28 s (19.08 MB/s)
45 00:39:59.831913 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:39:59.832135 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:39:59.832216 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:39:59.832292 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:39:59.832434 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 00:39:59.832497 saving as /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/kernel/Image
52 00:39:59.832553 total size: 54813184 (52 MB)
53 00:39:59.832608 No compression specified
54 00:39:59.833607 progress 0 % (0 MB)
55 00:39:59.847357 progress 5 % (2 MB)
56 00:39:59.861248 progress 10 % (5 MB)
57 00:39:59.874933 progress 15 % (7 MB)
58 00:39:59.888652 progress 20 % (10 MB)
59 00:39:59.902409 progress 25 % (13 MB)
60 00:39:59.916028 progress 30 % (15 MB)
61 00:39:59.929768 progress 35 % (18 MB)
62 00:39:59.943975 progress 40 % (20 MB)
63 00:39:59.957947 progress 45 % (23 MB)
64 00:39:59.972306 progress 50 % (26 MB)
65 00:39:59.986526 progress 55 % (28 MB)
66 00:40:00.000196 progress 60 % (31 MB)
67 00:40:00.014079 progress 65 % (34 MB)
68 00:40:00.027798 progress 70 % (36 MB)
69 00:40:00.042190 progress 75 % (39 MB)
70 00:40:00.056558 progress 80 % (41 MB)
71 00:40:00.070384 progress 85 % (44 MB)
72 00:40:00.084413 progress 90 % (47 MB)
73 00:40:00.098248 progress 95 % (49 MB)
74 00:40:00.111795 progress 100 % (52 MB)
75 00:40:00.112037 52 MB downloaded in 0.28 s (187.04 MB/s)
76 00:40:00.112194 end: 1.2.1 http-download (duration 00:00:00) [common]
78 00:40:00.112406 end: 1.2 download-retry (duration 00:00:00) [common]
79 00:40:00.112489 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:40:00.112566 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:40:00.112701 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 00:40:00.112766 saving as /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 00:40:00.112820 total size: 57695 (0 MB)
84 00:40:00.112874 No compression specified
85 00:40:00.114010 progress 56 % (0 MB)
86 00:40:00.114280 progress 100 % (0 MB)
87 00:40:00.114482 0 MB downloaded in 0.00 s (33.15 MB/s)
88 00:40:00.114599 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:40:00.114806 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:40:00.114885 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:40:00.114962 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:40:00.115069 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:40:00.115131 saving as /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/nfsrootfs/full.rootfs.tar
95 00:40:00.115184 total size: 120894716 (115 MB)
96 00:40:00.115239 Using unxz to decompress xz
97 00:40:00.116418 progress 0 % (0 MB)
98 00:40:00.466189 progress 5 % (5 MB)
99 00:40:00.826794 progress 10 % (11 MB)
100 00:40:01.171151 progress 15 % (17 MB)
101 00:40:01.498125 progress 20 % (23 MB)
102 00:40:01.808351 progress 25 % (28 MB)
103 00:40:02.153881 progress 30 % (34 MB)
104 00:40:02.477420 progress 35 % (40 MB)
105 00:40:02.648900 progress 40 % (46 MB)
106 00:40:02.848803 progress 45 % (51 MB)
107 00:40:03.163753 progress 50 % (57 MB)
108 00:40:03.525187 progress 55 % (63 MB)
109 00:40:03.870303 progress 60 % (69 MB)
110 00:40:04.214613 progress 65 % (74 MB)
111 00:40:04.561219 progress 70 % (80 MB)
112 00:40:04.937024 progress 75 % (86 MB)
113 00:40:05.275483 progress 80 % (92 MB)
114 00:40:05.622628 progress 85 % (98 MB)
115 00:40:05.969059 progress 90 % (103 MB)
116 00:40:06.300862 progress 95 % (109 MB)
117 00:40:06.671748 progress 100 % (115 MB)
118 00:40:06.677685 115 MB downloaded in 6.56 s (17.57 MB/s)
119 00:40:06.677878 end: 1.4.1 http-download (duration 00:00:07) [common]
121 00:40:06.678132 end: 1.4 download-retry (duration 00:00:07) [common]
122 00:40:06.678239 start: 1.5 download-retry (timeout 00:09:53) [common]
123 00:40:06.678314 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 00:40:06.678437 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 00:40:06.678498 saving as /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/modules/modules.tar
126 00:40:06.678552 total size: 8608736 (8 MB)
127 00:40:06.678607 Using unxz to decompress xz
128 00:40:06.679843 progress 0 % (0 MB)
129 00:40:06.699892 progress 5 % (0 MB)
130 00:40:06.726400 progress 10 % (0 MB)
131 00:40:06.753917 progress 15 % (1 MB)
132 00:40:06.777613 progress 20 % (1 MB)
133 00:40:06.801366 progress 25 % (2 MB)
134 00:40:06.825094 progress 30 % (2 MB)
135 00:40:06.850164 progress 35 % (2 MB)
136 00:40:06.876924 progress 40 % (3 MB)
137 00:40:06.899940 progress 45 % (3 MB)
138 00:40:06.924121 progress 50 % (4 MB)
139 00:40:06.950244 progress 55 % (4 MB)
140 00:40:06.975411 progress 60 % (4 MB)
141 00:40:06.999949 progress 65 % (5 MB)
142 00:40:07.024963 progress 70 % (5 MB)
143 00:40:07.050785 progress 75 % (6 MB)
144 00:40:07.077145 progress 80 % (6 MB)
145 00:40:07.101465 progress 85 % (7 MB)
146 00:40:07.126557 progress 90 % (7 MB)
147 00:40:07.151459 progress 95 % (7 MB)
148 00:40:07.176133 progress 100 % (8 MB)
149 00:40:07.181706 8 MB downloaded in 0.50 s (16.32 MB/s)
150 00:40:07.181927 end: 1.5.1 http-download (duration 00:00:01) [common]
152 00:40:07.182164 end: 1.5 download-retry (duration 00:00:01) [common]
153 00:40:07.182246 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 00:40:07.182325 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 00:40:10.743001 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai
156 00:40:10.743193 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 00:40:10.743288 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 00:40:10.743465 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n
159 00:40:10.743585 makedir: /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin
160 00:40:10.743678 makedir: /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/tests
161 00:40:10.743767 makedir: /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/results
162 00:40:10.743853 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-add-keys
163 00:40:10.743982 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-add-sources
164 00:40:10.744102 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-background-process-start
165 00:40:10.744219 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-background-process-stop
166 00:40:10.744344 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-common-functions
167 00:40:10.744461 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-echo-ipv4
168 00:40:10.744576 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-install-packages
169 00:40:10.744688 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-installed-packages
170 00:40:10.744801 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-os-build
171 00:40:10.744914 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-probe-channel
172 00:40:10.745027 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-probe-ip
173 00:40:10.745141 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-target-ip
174 00:40:10.745253 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-target-mac
175 00:40:10.745366 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-target-storage
176 00:40:10.745483 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-case
177 00:40:10.745595 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-event
178 00:40:10.745706 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-feedback
179 00:40:10.745819 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-raise
180 00:40:10.745930 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-reference
181 00:40:10.746082 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-runner
182 00:40:10.746195 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-set
183 00:40:10.746305 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-test-shell
184 00:40:10.746436 Updating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-add-keys (debian)
185 00:40:10.746603 Updating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-add-sources (debian)
186 00:40:10.746739 Updating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-install-packages (debian)
187 00:40:10.746870 Updating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-installed-packages (debian)
188 00:40:10.746999 Updating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/bin/lava-os-build (debian)
189 00:40:10.747113 Creating /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/environment
190 00:40:10.747204 LAVA metadata
191 00:40:10.747276 - LAVA_JOB_ID=14368351
192 00:40:10.747345 - LAVA_DISPATCHER_IP=192.168.201.1
193 00:40:10.747450 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 00:40:10.747507 skipped lava-vland-overlay
195 00:40:10.747575 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 00:40:10.747649 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 00:40:10.747706 skipped lava-multinode-overlay
198 00:40:10.747772 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 00:40:10.747842 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 00:40:10.747909 Loading test definitions
201 00:40:10.747987 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 00:40:10.748046 Using /lava-14368351 at stage 0
203 00:40:10.748322 uuid=14368351_1.6.2.3.1 testdef=None
204 00:40:10.748403 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 00:40:10.748480 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 00:40:10.748880 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 00:40:10.749085 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 00:40:10.749657 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 00:40:10.749875 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 00:40:10.750596 runner path: /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/0/tests/0_timesync-off test_uuid 14368351_1.6.2.3.1
213 00:40:10.750744 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 00:40:10.750948 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 00:40:10.751015 Using /lava-14368351 at stage 0
217 00:40:10.751103 Fetching tests from https://github.com/kernelci/test-definitions.git
218 00:40:10.751179 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/0/tests/1_kselftest-arm64'
219 00:40:12.974313 Running '/usr/bin/git checkout kernelci.org
220 00:40:13.125863 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/0/tests/1_kselftest-arm64/automated/linux/kselftest/kselftest.yaml
221 00:40:13.126361 uuid=14368351_1.6.2.3.5 testdef=None
222 00:40:13.126474 end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
224 00:40:13.126672 start: 1.6.2.3.6 test-overlay (timeout 00:09:46) [common]
225 00:40:13.127310 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 00:40:13.127514 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:46) [common]
228 00:40:13.128396 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 00:40:13.128613 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
231 00:40:13.129449 runner path: /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/0/tests/1_kselftest-arm64 test_uuid 14368351_1.6.2.3.5
232 00:40:13.129528 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 00:40:13.129587 BRANCH='cip'
234 00:40:13.129641 SKIPFILE='/dev/null'
235 00:40:13.129692 SKIP_INSTALL='True'
236 00:40:13.129741 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 00:40:13.129793 TST_CASENAME=''
238 00:40:13.129843 TST_CMDFILES='arm64'
239 00:40:13.129976 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 00:40:13.130200 Creating lava-test-runner.conf files
242 00:40:13.130255 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368351/lava-overlay-sk0oxn3n/lava-14368351/0 for stage 0
243 00:40:13.130338 - 0_timesync-off
244 00:40:13.130398 - 1_kselftest-arm64
245 00:40:13.130485 end: 1.6.2.3 test-definition (duration 00:00:02) [common]
246 00:40:13.130563 start: 1.6.2.4 compress-overlay (timeout 00:09:46) [common]
247 00:40:20.345287 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 00:40:20.345429 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
249 00:40:20.345516 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 00:40:20.345599 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 00:40:20.345679 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
252 00:40:20.504039 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 00:40:20.504193 start: 1.6.4 extract-modules (timeout 00:09:39) [common]
254 00:40:20.504275 extracting modules file /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai
255 00:40:20.726333 extracting modules file /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368351/extract-overlay-ramdisk-w_5t39ac/ramdisk
256 00:40:20.954764 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 00:40:20.954915 start: 1.6.5 apply-overlay-tftp (timeout 00:09:39) [common]
258 00:40:20.954995 [common] Applying overlay to NFS
259 00:40:20.955055 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368351/compress-overlay-lbzy3gsr/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai
260 00:40:21.790652 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 00:40:21.790798 start: 1.6.6 configure-preseed-file (timeout 00:09:38) [common]
262 00:40:21.790883 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 00:40:21.790962 start: 1.6.7 compress-ramdisk (timeout 00:09:38) [common]
264 00:40:21.791031 Building ramdisk /var/lib/lava/dispatcher/tmp/14368351/extract-overlay-ramdisk-w_5t39ac/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368351/extract-overlay-ramdisk-w_5t39ac/ramdisk
265 00:40:22.127398 >> 130405 blocks
266 00:40:24.182260 rename /var/lib/lava/dispatcher/tmp/14368351/extract-overlay-ramdisk-w_5t39ac/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/ramdisk/ramdisk.cpio.gz
267 00:40:24.182458 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 00:40:24.182548 start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
269 00:40:24.182628 start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
270 00:40:24.182707 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/kernel/Image']
271 00:40:38.015201 Returned 0 in 13 seconds
272 00:40:38.115746 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/kernel/image.itb
273 00:40:38.525279 output: FIT description: Kernel Image image with one or more FDT blobs
274 00:40:38.525424 output: Created: Sun Jun 16 01:40:38 2024
275 00:40:38.525496 output: Image 0 (kernel-1)
276 00:40:38.525557 output: Description:
277 00:40:38.525616 output: Created: Sun Jun 16 01:40:38 2024
278 00:40:38.525676 output: Type: Kernel Image
279 00:40:38.525732 output: Compression: lzma compressed
280 00:40:38.525788 output: Data Size: 13126376 Bytes = 12818.73 KiB = 12.52 MiB
281 00:40:38.525841 output: Architecture: AArch64
282 00:40:38.525915 output: OS: Linux
283 00:40:38.526019 output: Load Address: 0x00000000
284 00:40:38.526086 output: Entry Point: 0x00000000
285 00:40:38.526137 output: Hash algo: crc32
286 00:40:38.526187 output: Hash value: c791a20a
287 00:40:38.526236 output: Image 1 (fdt-1)
288 00:40:38.526284 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 00:40:38.526332 output: Created: Sun Jun 16 01:40:38 2024
290 00:40:38.526381 output: Type: Flat Device Tree
291 00:40:38.526429 output: Compression: uncompressed
292 00:40:38.526479 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 00:40:38.526528 output: Architecture: AArch64
294 00:40:38.526593 output: Hash algo: crc32
295 00:40:38.526681 output: Hash value: a9713552
296 00:40:38.526739 output: Image 2 (ramdisk-1)
297 00:40:38.526791 output: Description: unavailable
298 00:40:38.526843 output: Created: Sun Jun 16 01:40:38 2024
299 00:40:38.526892 output: Type: RAMDisk Image
300 00:40:38.526941 output: Compression: uncompressed
301 00:40:38.526988 output: Data Size: 18738390 Bytes = 18299.21 KiB = 17.87 MiB
302 00:40:38.527035 output: Architecture: AArch64
303 00:40:38.527083 output: OS: Linux
304 00:40:38.527131 output: Load Address: unavailable
305 00:40:38.527194 output: Entry Point: unavailable
306 00:40:38.527246 output: Hash algo: crc32
307 00:40:38.527294 output: Hash value: 2563abfc
308 00:40:38.527342 output: Default Configuration: 'conf-1'
309 00:40:38.527389 output: Configuration 0 (conf-1)
310 00:40:38.527437 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 00:40:38.527485 output: Kernel: kernel-1
312 00:40:38.527532 output: Init Ramdisk: ramdisk-1
313 00:40:38.527579 output: FDT: fdt-1
314 00:40:38.527626 output: Loadables: kernel-1
315 00:40:38.527672 output:
316 00:40:38.527806 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 00:40:38.527896 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 00:40:38.527990 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
319 00:40:38.528075 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:21) [common]
320 00:40:38.528141 No LXC device requested
321 00:40:38.528210 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 00:40:38.528286 start: 1.8 deploy-device-env (timeout 00:09:21) [common]
323 00:40:38.528355 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 00:40:38.528417 Checking files for TFTP limit of 4294967296 bytes.
325 00:40:38.528875 end: 1 tftp-deploy (duration 00:00:39) [common]
326 00:40:38.528979 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 00:40:38.529076 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 00:40:38.529189 substitutions:
329 00:40:38.529251 - {DTB}: 14368351/tftp-deploy-n4d0cf2c/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 00:40:38.529309 - {INITRD}: 14368351/tftp-deploy-n4d0cf2c/ramdisk/ramdisk.cpio.gz
331 00:40:38.529362 - {KERNEL}: 14368351/tftp-deploy-n4d0cf2c/kernel/Image
332 00:40:38.529414 - {LAVA_MAC}: None
333 00:40:38.529464 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai
334 00:40:38.529515 - {NFS_SERVER_IP}: 192.168.201.1
335 00:40:38.529565 - {PRESEED_CONFIG}: None
336 00:40:38.529622 - {PRESEED_LOCAL}: None
337 00:40:38.529672 - {RAMDISK}: 14368351/tftp-deploy-n4d0cf2c/ramdisk/ramdisk.cpio.gz
338 00:40:38.529721 - {ROOT_PART}: None
339 00:40:38.529768 - {ROOT}: None
340 00:40:38.529816 - {SERVER_IP}: 192.168.201.1
341 00:40:38.529864 - {TEE}: None
342 00:40:38.529912 Parsed boot commands:
343 00:40:38.529959 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 00:40:38.530150 Parsed boot commands: tftpboot 192.168.201.1 14368351/tftp-deploy-n4d0cf2c/kernel/image.itb 14368351/tftp-deploy-n4d0cf2c/kernel/cmdline
345 00:40:38.530232 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 00:40:38.530309 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 00:40:38.530388 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 00:40:38.530462 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 00:40:38.530533 Not connected, no need to disconnect.
350 00:40:38.530632 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 00:40:38.530739 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 00:40:38.530817 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-1'
353 00:40:38.534226 Setting prompt string to ['lava-test: # ']
354 00:40:38.534541 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 00:40:38.534639 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 00:40:38.534733 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 00:40:38.534816 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 00:40:38.534989 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-1']
359 00:41:00.889793 Returned 0 in 22 seconds
360 00:41:00.990371 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
362 00:41:00.990718 end: 2.2.2 reset-device (duration 00:00:22) [common]
363 00:41:00.990851 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
364 00:41:00.990962 Setting prompt string to 'Starting depthcharge on Juniper...'
365 00:41:00.991046 Changing prompt to 'Starting depthcharge on Juniper...'
366 00:41:00.991135 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 00:41:00.991602 [Enter `^Ec?' for help]
368 00:41:00.991701 [DL] 00000000 00000000 010701
369 00:41:00.991806
370 00:41:00.991890
371 00:41:00.991968 F0: 102B 0000
372 00:41:00.992045
373 00:41:00.992124 F3: 1006 0033 [0200]
374 00:41:00.992203
375 00:41:00.992280 F3: 4001 00E0 [0200]
376 00:41:00.992358
377 00:41:00.992431 F3: 0000 0000
378 00:41:00.992509
379 00:41:00.992586 V0: 0000 0000 [0001]
380 00:41:00.992662
381 00:41:00.992737 00: 1027 0002
382 00:41:00.992819
383 00:41:00.992900 01: 0000 0000
384 00:41:00.992981
385 00:41:00.993065 BP: 0C00 0251 [0000]
386 00:41:00.993140
387 00:41:00.993213 G0: 1182 0000
388 00:41:00.993285
389 00:41:00.993356 EC: 0004 0000 [0001]
390 00:41:00.993427
391 00:41:00.993498 S7: 0000 0000 [0000]
392 00:41:00.993574
393 00:41:00.993647 CC: 0000 0000 [0001]
394 00:41:00.993719
395 00:41:00.993789 T0: 0000 00DB [000F]
396 00:41:00.993860
397 00:41:00.993931 Jump to BL
398 00:41:00.994023
399 00:41:00.994138
400 00:41:00.994263
401 00:41:00.994384 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 00:41:00.994467 ARM64: Exception handlers installed.
403 00:41:00.994542 ARM64: Testing exception
404 00:41:00.994616 ARM64: Done test exception
405 00:41:00.994689 WDT: Last reset was cold boot
406 00:41:00.994761 SPI0(PAD0) initialized at 992727 Hz
407 00:41:00.994834 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 00:41:00.994908 Manufacturer: ef
409 00:41:00.994981 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 00:41:00.995056 Probing TPM: . done!
411 00:41:00.995129 TPM ready after 0 ms
412 00:41:00.995202 Connected to device vid:did:rid of 1ae0:0028:00
413 00:41:00.995276 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 00:41:00.995350 Initialized TPM device CR50 revision 0
415 00:41:00.995425 tlcl_send_startup: Startup return code is 0
416 00:41:00.995500 TPM: setup succeeded
417 00:41:00.995573 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 00:41:00.995647 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 00:41:00.995721 in-header: 03 19 00 00 08 00 00 00
420 00:41:00.995795 in-data: a2 e0 47 00 13 00 00 00
421 00:41:00.995868 Chrome EC: UHEPI supported
422 00:41:00.995917 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 00:41:00.995966 in-header: 03 a1 00 00 08 00 00 00
424 00:41:00.996016 in-data: 84 60 60 10 00 00 00 00
425 00:41:00.996064 Phase 1
426 00:41:00.996112 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 00:41:00.996160 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 00:41:00.996210 VB2:vb2_check_recovery() Recovery was requested manually
429 00:41:00.996260 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 00:41:00.996309 Recovery requested (1009000e)
431 00:41:00.996358 tlcl_extend: response is 0
432 00:41:00.996407 tlcl_extend: response is 0
433 00:41:00.996455
434 00:41:00.996503
435 00:41:00.996551 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 00:41:00.996601 ARM64: Exception handlers installed.
437 00:41:00.996649 ARM64: Testing exception
438 00:41:00.996698 ARM64: Done test exception
439 00:41:00.996746 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x826a, sec=0x2011
440 00:41:00.996795 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 00:41:00.996844 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 00:41:00.996893 [RTC]rtc_get_frequency_meter,134: input=0xf, output=875
443 00:41:00.996942 [RTC]rtc_get_frequency_meter,134: input=0x7, output=742
444 00:41:00.996991 [RTC]rtc_get_frequency_meter,134: input=0xb, output=809
445 00:41:00.997040 [RTC]rtc_get_frequency_meter,134: input=0x9, output=775
446 00:41:00.997089 [RTC]rtc_get_frequency_meter,134: input=0xa, output=794
447 00:41:00.997137 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x826a
448 00:41:00.997187 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
449 00:41:00.997236 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
450 00:41:00.997285 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
451 00:41:00.997333 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
452 00:41:00.997382 in-header: 03 19 00 00 08 00 00 00
453 00:41:00.997430 in-data: a2 e0 47 00 13 00 00 00
454 00:41:00.997478 Chrome EC: UHEPI supported
455 00:41:00.997527 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
456 00:41:00.997577 in-header: 03 a1 00 00 08 00 00 00
457 00:41:00.997625 in-data: 84 60 60 10 00 00 00 00
458 00:41:00.997674 Skip loading cached calibration data
459 00:41:00.997723 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
460 00:41:00.997771 in-header: 03 a1 00 00 08 00 00 00
461 00:41:00.997819 in-data: 84 60 60 10 00 00 00 00
462 00:41:00.997868 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
463 00:41:00.997917 in-header: 03 a1 00 00 08 00 00 00
464 00:41:00.997989 in-data: 84 60 60 10 00 00 00 00
465 00:41:00.998073 ADC[3]: Raw value=216425 ID=1
466 00:41:00.998206 Manufacturer: ef
467 00:41:00.998272 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
468 00:41:00.998322 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
469 00:41:00.998371 CBFS @ 21000 size 3d4000
470 00:41:00.998420 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
471 00:41:00.998470 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
472 00:41:00.998519 CBFS: Found @ offset 3c700 size 44
473 00:41:00.998569 DRAM-K: Full Calibration
474 00:41:00.998617 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
475 00:41:00.998666 CBFS @ 21000 size 3d4000
476 00:41:00.998715 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
477 00:41:00.998764 CBFS: Locating 'fallback/dram'
478 00:41:00.998813 CBFS: Found @ offset 24b00 size 12268
479 00:41:00.998861 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
480 00:41:00.998910 ddr_geometry: 1, config: 0x0
481 00:41:00.998959 header.status = 0x0
482 00:41:00.999007 header.magic = 0x44524d4b (expected: 0x44524d4b)
483 00:41:00.999056 header.version = 0x5 (expected: 0x5)
484 00:41:00.999104 header.size = 0x8f0 (expected: 0x8f0)
485 00:41:00.999153 header.config = 0x0
486 00:41:00.999202 header.flags = 0x0
487 00:41:00.999250 header.checksum = 0x0
488 00:41:00.999574 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
489 00:41:00.999691 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
490 00:41:00.999763 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
491 00:41:00.999819 ddr_geometry:1
492 00:41:00.999869 [EMI] new MDL number = 1
493 00:41:00.999921 dram_cbt_mode_extern: 0
494 00:41:00.999973 dram_cbt_mode [RK0]: 0, [RK1]: 0
495 00:41:01.000047 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
496 00:41:01.000139
497 00:41:01.000215
498 00:41:01.000291 [Bianco] ETT version 0.0.0.1
499 00:41:01.000369 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
500 00:41:01.000446
501 00:41:01.000523 vSetVcoreByFreq with vcore:762500, freq=1600
502 00:41:01.000599
503 00:41:01.000674 [DramcInit]
504 00:41:01.000750 AutoRefreshCKEOff AutoREF OFF
505 00:41:01.000826 DDRPhyPLLSetting-CKEOFF
506 00:41:01.000902 DDRPhyPLLSetting-CKEON
507 00:41:01.000977
508 00:41:01.001052 Enable WDQS
509 00:41:01.001128 [ModeRegInit_LP4] CH0 RK0
510 00:41:01.001204 Write Rank0 MR13 =0x18
511 00:41:01.001282 Write Rank0 MR12 =0x5d
512 00:41:01.001368 Write Rank0 MR1 =0x56
513 00:41:01.001446 Write Rank0 MR2 =0x1a
514 00:41:01.001522 Write Rank0 MR11 =0x0
515 00:41:01.001597 Write Rank0 MR22 =0x38
516 00:41:01.001712 Write Rank0 MR14 =0x5d
517 00:41:01.001787 Write Rank0 MR3 =0x30
518 00:41:01.001863 Write Rank0 MR13 =0x58
519 00:41:01.001956 Write Rank0 MR12 =0x5d
520 00:41:01.002042 Write Rank0 MR1 =0x56
521 00:41:01.002093 Write Rank0 MR2 =0x2d
522 00:41:01.002142 Write Rank0 MR11 =0x23
523 00:41:01.002190 Write Rank0 MR22 =0x34
524 00:41:01.002238 Write Rank0 MR14 =0x10
525 00:41:01.002285 Write Rank0 MR3 =0x30
526 00:41:01.002333 Write Rank0 MR13 =0xd8
527 00:41:01.002382 [ModeRegInit_LP4] CH0 RK1
528 00:41:01.002429 Write Rank1 MR13 =0x18
529 00:41:01.002478 Write Rank1 MR12 =0x5d
530 00:41:01.002526 Write Rank1 MR1 =0x56
531 00:41:01.002574 Write Rank1 MR2 =0x1a
532 00:41:01.002623 Write Rank1 MR11 =0x0
533 00:41:01.002671 Write Rank1 MR22 =0x38
534 00:41:01.002719 Write Rank1 MR14 =0x5d
535 00:41:01.002767 Write Rank1 MR3 =0x30
536 00:41:01.002815 Write Rank1 MR13 =0x58
537 00:41:01.002864 Write Rank1 MR12 =0x5d
538 00:41:01.002911 Write Rank1 MR1 =0x56
539 00:41:01.002959 Write Rank1 MR2 =0x2d
540 00:41:01.003006 Write Rank1 MR11 =0x23
541 00:41:01.003054 Write Rank1 MR22 =0x34
542 00:41:01.003103 Write Rank1 MR14 =0x10
543 00:41:01.003151 Write Rank1 MR3 =0x30
544 00:41:01.003199 Write Rank1 MR13 =0xd8
545 00:41:01.003247 [ModeRegInit_LP4] CH1 RK0
546 00:41:01.003295 Write Rank0 MR13 =0x18
547 00:41:01.003344 Write Rank0 MR12 =0x5d
548 00:41:01.003392 Write Rank0 MR1 =0x56
549 00:41:01.003440 Write Rank0 MR2 =0x1a
550 00:41:01.003488 Write Rank0 MR11 =0x0
551 00:41:01.003536 Write Rank0 MR22 =0x38
552 00:41:01.003584 Write Rank0 MR14 =0x5d
553 00:41:01.003632 Write Rank0 MR3 =0x30
554 00:41:01.003679 Write Rank0 MR13 =0x58
555 00:41:01.003728 Write Rank0 MR12 =0x5d
556 00:41:01.003775 Write Rank0 MR1 =0x56
557 00:41:01.003823 Write Rank0 MR2 =0x2d
558 00:41:01.003871 Write Rank0 MR11 =0x23
559 00:41:01.003918 Write Rank0 MR22 =0x34
560 00:41:01.003965 Write Rank0 MR14 =0x10
561 00:41:01.004013 Write Rank0 MR3 =0x30
562 00:41:01.004061 Write Rank0 MR13 =0xd8
563 00:41:01.004109 [ModeRegInit_LP4] CH1 RK1
564 00:41:01.004157 Write Rank1 MR13 =0x18
565 00:41:01.004205 Write Rank1 MR12 =0x5d
566 00:41:01.004253 Write Rank1 MR1 =0x56
567 00:41:01.004300 Write Rank1 MR2 =0x1a
568 00:41:01.004348 Write Rank1 MR11 =0x0
569 00:41:01.004415 Write Rank1 MR22 =0x38
570 00:41:01.004466 Write Rank1 MR14 =0x5d
571 00:41:01.004515 Write Rank1 MR3 =0x30
572 00:41:01.004563 Write Rank1 MR13 =0x58
573 00:41:01.004611 Write Rank1 MR12 =0x5d
574 00:41:01.004659 Write Rank1 MR1 =0x56
575 00:41:01.004707 Write Rank1 MR2 =0x2d
576 00:41:01.004755 Write Rank1 MR11 =0x23
577 00:41:01.004802 Write Rank1 MR22 =0x34
578 00:41:01.004850 Write Rank1 MR14 =0x10
579 00:41:01.004898 Write Rank1 MR3 =0x30
580 00:41:01.004946 Write Rank1 MR13 =0xd8
581 00:41:01.004993 match AC timing 3
582 00:41:01.005041 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
583 00:41:01.005092 [MiockJmeterHQA]
584 00:41:01.005140 vSetVcoreByFreq with vcore:762500, freq=1600
585 00:41:01.005189
586 00:41:01.005237 MIOCK jitter meter ch=0
587 00:41:01.005285
588 00:41:01.005333 1T = (89-15) = 74 dly cells
589 00:41:01.005383 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 844/100 ps
590 00:41:01.005431 vSetVcoreByFreq with vcore:725000, freq=1200
591 00:41:01.005480
592 00:41:01.005528 MIOCK jitter meter ch=0
593 00:41:01.005576
594 00:41:01.005624 1T = (84-13) = 71 dly cells
595 00:41:01.005674 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 880/100 ps
596 00:41:01.005723 vSetVcoreByFreq with vcore:725000, freq=800
597 00:41:01.005772
598 00:41:01.005820 MIOCK jitter meter ch=0
599 00:41:01.005868
600 00:41:01.005916 1T = (84-13) = 71 dly cells
601 00:41:01.005965 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 880/100 ps
602 00:41:01.006105 vSetVcoreByFreq with vcore:762500, freq=1600
603 00:41:01.006199 vSetVcoreByFreq with vcore:762500, freq=1600
604 00:41:01.006248
605 00:41:01.006296 K DRVP
606 00:41:01.006345 1. OCD DRVP=0 CALOUT=0
607 00:41:01.006395 1. OCD DRVP=1 CALOUT=0
608 00:41:01.006445 1. OCD DRVP=2 CALOUT=0
609 00:41:01.006494 1. OCD DRVP=3 CALOUT=0
610 00:41:01.006543 1. OCD DRVP=4 CALOUT=0
611 00:41:01.006593 1. OCD DRVP=5 CALOUT=0
612 00:41:01.006642 1. OCD DRVP=6 CALOUT=0
613 00:41:01.006690 1. OCD DRVP=7 CALOUT=0
614 00:41:01.006739 1. OCD DRVP=8 CALOUT=0
615 00:41:01.006788 1. OCD DRVP=9 CALOUT=1
616 00:41:01.006837
617 00:41:01.006886 1. OCD DRVP calibration OK! DRVP=9
618 00:41:01.006936
619 00:41:01.006984
620 00:41:01.007032
621 00:41:01.007080 K ODTN
622 00:41:01.007128 3. OCD ODTN=0 ,CALOUT=1
623 00:41:01.007181 3. OCD ODTN=1 ,CALOUT=1
624 00:41:01.007231 3. OCD ODTN=2 ,CALOUT=1
625 00:41:01.007280 3. OCD ODTN=3 ,CALOUT=1
626 00:41:01.007329 3. OCD ODTN=4 ,CALOUT=1
627 00:41:01.007378 3. OCD ODTN=5 ,CALOUT=1
628 00:41:01.007427 3. OCD ODTN=6 ,CALOUT=1
629 00:41:01.007476 3. OCD ODTN=7 ,CALOUT=1
630 00:41:01.007525 3. OCD ODTN=8 ,CALOUT=0
631 00:41:01.007574
632 00:41:01.007621 3. OCD ODTN calibration OK! ODTN=8
633 00:41:01.007671
634 00:41:01.007719 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=8
635 00:41:01.007768 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15
636 00:41:01.007817 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15 (After Adjust)
637 00:41:01.007865
638 00:41:01.007913 K DRVP
639 00:41:01.007960 1. OCD DRVP=0 CALOUT=0
640 00:41:01.008010 1. OCD DRVP=1 CALOUT=0
641 00:41:01.008058 1. OCD DRVP=2 CALOUT=0
642 00:41:01.008107 1. OCD DRVP=3 CALOUT=0
643 00:41:01.008177 1. OCD DRVP=4 CALOUT=0
644 00:41:01.008230 1. OCD DRVP=5 CALOUT=0
645 00:41:01.008279 1. OCD DRVP=6 CALOUT=0
646 00:41:01.008328 1. OCD DRVP=7 CALOUT=0
647 00:41:01.008378 1. OCD DRVP=8 CALOUT=0
648 00:41:01.008427 1. OCD DRVP=9 CALOUT=0
649 00:41:01.008476 1. OCD DRVP=10 CALOUT=1
650 00:41:01.008525
651 00:41:01.008573 1. OCD DRVP calibration OK! DRVP=10
652 00:41:01.008623
653 00:41:01.008671
654 00:41:01.008719
655 00:41:01.008767 K ODTN
656 00:41:01.008815 3. OCD ODTN=0 ,CALOUT=1
657 00:41:01.009068 3. OCD ODTN=1 ,CALOUT=1
658 00:41:01.009126 3. OCD ODTN=2 ,CALOUT=1
659 00:41:01.009178 3. OCD ODTN=3 ,CALOUT=1
660 00:41:01.009229 3. OCD ODTN=4 ,CALOUT=1
661 00:41:01.009279 3. OCD ODTN=5 ,CALOUT=1
662 00:41:01.009330 3. OCD ODTN=6 ,CALOUT=1
663 00:41:01.009380 3. OCD ODTN=7 ,CALOUT=1
664 00:41:01.009430 3. OCD ODTN=8 ,CALOUT=1
665 00:41:01.009480 3. OCD ODTN=9 ,CALOUT=1
666 00:41:01.009531 3. OCD ODTN=10 ,CALOUT=1
667 00:41:01.009594 3. OCD ODTN=11 ,CALOUT=1
668 00:41:01.009644 3. OCD ODTN=12 ,CALOUT=1
669 00:41:01.009694 3. OCD ODTN=13 ,CALOUT=1
670 00:41:01.009743 3. OCD ODTN=14 ,CALOUT=1
671 00:41:01.009792 3. OCD ODTN=15 ,CALOUT=0
672 00:41:01.009841
673 00:41:01.009889 3. OCD ODTN calibration OK! ODTN=15
674 00:41:01.009939
675 00:41:01.010014 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
676 00:41:01.010105 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
677 00:41:01.010156 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
678 00:41:01.010206
679 00:41:01.010255 [DramcInit]
680 00:41:01.010304 AutoRefreshCKEOff AutoREF OFF
681 00:41:01.010354 DDRPhyPLLSetting-CKEOFF
682 00:41:01.010403 DDRPhyPLLSetting-CKEON
683 00:41:01.010466
684 00:41:01.010514 Enable WDQS
685 00:41:01.010561 ==
686 00:41:01.010612 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 00:41:01.010661 fsp= 1, odt_onoff= 1, Byte mode= 0
688 00:41:01.010711 ==
689 00:41:01.010759 [Duty_Offset_Calibration]
690 00:41:01.010807
691 00:41:01.010855 ===========================
692 00:41:01.010903 B0:0 B1:0 CA:2
693 00:41:01.010951 ==
694 00:41:01.010998 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 00:41:01.011048 fsp= 1, odt_onoff= 1, Byte mode= 0
696 00:41:01.011096 ==
697 00:41:01.011144 [Duty_Offset_Calibration]
698 00:41:01.011192
699 00:41:01.011258 ===========================
700 00:41:01.011311 B0:0 B1:1 CA:1
701 00:41:01.011360 [ModeRegInit_LP4] CH0 RK0
702 00:41:01.011408 Write Rank0 MR13 =0x18
703 00:41:01.011457 Write Rank0 MR12 =0x5d
704 00:41:01.011506 Write Rank0 MR1 =0x56
705 00:41:01.011555 Write Rank0 MR2 =0x1a
706 00:41:01.011604 Write Rank0 MR11 =0x0
707 00:41:01.011652 Write Rank0 MR22 =0x38
708 00:41:01.011700 Write Rank0 MR14 =0x5d
709 00:41:01.011749 Write Rank0 MR3 =0x30
710 00:41:01.011796 Write Rank0 MR13 =0x58
711 00:41:01.011844 Write Rank0 MR12 =0x5d
712 00:41:01.011892 Write Rank0 MR1 =0x56
713 00:41:01.011941 Write Rank0 MR2 =0x2d
714 00:41:01.011989 Write Rank0 MR11 =0x23
715 00:41:01.012038 Write Rank0 MR22 =0x34
716 00:41:01.012086 Write Rank0 MR14 =0x10
717 00:41:01.012134 Write Rank0 MR3 =0x30
718 00:41:01.012182 Write Rank0 MR13 =0xd8
719 00:41:01.012231 [ModeRegInit_LP4] CH0 RK1
720 00:41:01.012278 Write Rank1 MR13 =0x18
721 00:41:01.012326 Write Rank1 MR12 =0x5d
722 00:41:01.012374 Write Rank1 MR1 =0x56
723 00:41:01.012422 Write Rank1 MR2 =0x1a
724 00:41:01.012470 Write Rank1 MR11 =0x0
725 00:41:01.012519 Write Rank1 MR22 =0x38
726 00:41:01.012566 Write Rank1 MR14 =0x5d
727 00:41:01.012614 Write Rank1 MR3 =0x30
728 00:41:01.012663 Write Rank1 MR13 =0x58
729 00:41:01.012711 Write Rank1 MR12 =0x5d
730 00:41:01.012759 Write Rank1 MR1 =0x56
731 00:41:01.012807 Write Rank1 MR2 =0x2d
732 00:41:01.012854 Write Rank1 MR11 =0x23
733 00:41:01.012902 Write Rank1 MR22 =0x34
734 00:41:01.012950 Write Rank1 MR14 =0x10
735 00:41:01.012998 Write Rank1 MR3 =0x30
736 00:41:01.013046 Write Rank1 MR13 =0xd8
737 00:41:01.013093 [ModeRegInit_LP4] CH1 RK0
738 00:41:01.013141 Write Rank0 MR13 =0x18
739 00:41:01.013189 Write Rank0 MR12 =0x5d
740 00:41:01.013237 Write Rank0 MR1 =0x56
741 00:41:01.013285 Write Rank0 MR2 =0x1a
742 00:41:01.013333 Write Rank0 MR11 =0x0
743 00:41:01.013381 Write Rank0 MR22 =0x38
744 00:41:01.013429 Write Rank0 MR14 =0x5d
745 00:41:01.013477 Write Rank0 MR3 =0x30
746 00:41:01.013526 Write Rank0 MR13 =0x58
747 00:41:01.013573 Write Rank0 MR12 =0x5d
748 00:41:01.013621 Write Rank0 MR1 =0x56
749 00:41:01.013669 Write Rank0 MR2 =0x2d
750 00:41:01.013716 Write Rank0 MR11 =0x23
751 00:41:01.013765 Write Rank0 MR22 =0x34
752 00:41:01.013813 Write Rank0 MR14 =0x10
753 00:41:01.013861 Write Rank0 MR3 =0x30
754 00:41:01.013909 Write Rank0 MR13 =0xd8
755 00:41:01.013957 [ModeRegInit_LP4] CH1 RK1
756 00:41:01.014049 Write Rank1 MR13 =0x18
757 00:41:01.014100 Write Rank1 MR12 =0x5d
758 00:41:01.014148 Write Rank1 MR1 =0x56
759 00:41:01.014242 Write Rank1 MR2 =0x1a
760 00:41:01.014292 Write Rank1 MR11 =0x0
761 00:41:01.014355 Write Rank1 MR22 =0x38
762 00:41:01.014403 Write Rank1 MR14 =0x5d
763 00:41:01.014451 Write Rank1 MR3 =0x30
764 00:41:01.014504 Write Rank1 MR13 =0x58
765 00:41:01.014553 Write Rank1 MR12 =0x5d
766 00:41:01.014601 Write Rank1 MR1 =0x56
767 00:41:01.014656 Write Rank1 MR2 =0x2d
768 00:41:01.014809 Write Rank1 MR11 =0x23
769 00:41:01.014907 Write Rank1 MR22 =0x34
770 00:41:01.014981 Write Rank1 MR14 =0x10
771 00:41:01.015034 Write Rank1 MR3 =0x30
772 00:41:01.015087 Write Rank1 MR13 =0xd8
773 00:41:01.015139 match AC timing 3
774 00:41:01.015192 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 00:41:01.015242 DramC Write-DBI off
776 00:41:01.015290 DramC Read-DBI off
777 00:41:01.015339 Write Rank0 MR13 =0x59
778 00:41:01.015387 ==
779 00:41:01.015436 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 00:41:01.015485 fsp= 1, odt_onoff= 1, Byte mode= 0
781 00:41:01.015534 ==
782 00:41:01.015583 === u2Vref_new: 0x56 --> 0x2d
783 00:41:01.015633 === u2Vref_new: 0x58 --> 0x38
784 00:41:01.015681 === u2Vref_new: 0x5a --> 0x39
785 00:41:01.015730 === u2Vref_new: 0x5c --> 0x3c
786 00:41:01.015778 === u2Vref_new: 0x5e --> 0x3d
787 00:41:01.015826 === u2Vref_new: 0x60 --> 0xa0
788 00:41:01.015874 [CA 0] Center 34 (6~63) winsize 58
789 00:41:01.015922 [CA 1] Center 36 (10~63) winsize 54
790 00:41:01.015971 [CA 2] Center 30 (2~59) winsize 58
791 00:41:01.016022 [CA 3] Center 25 (-2~53) winsize 56
792 00:41:01.016127 [CA 4] Center 26 (-2~55) winsize 58
793 00:41:01.016212 [CA 5] Center 31 (1~61) winsize 61
794 00:41:01.016292
795 00:41:01.016369 [CATrainingPosCal] consider 1 rank data
796 00:41:01.016446 u2DelayCellTimex100 = 844/100 ps
797 00:41:01.016523 CA0 delay=34 (6~63),Diff = 9 PI (10 cell)
798 00:41:01.016599 CA1 delay=36 (10~63),Diff = 11 PI (12 cell)
799 00:41:01.016676 CA2 delay=30 (2~59),Diff = 5 PI (5 cell)
800 00:41:01.016752 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
801 00:41:01.016829 CA4 delay=26 (-2~55),Diff = 1 PI (1 cell)
802 00:41:01.016905 CA5 delay=31 (1~61),Diff = 6 PI (6 cell)
803 00:41:01.016980
804 00:41:01.017056 CA PerBit enable=1, Macro0, CA PI delay=25
805 00:41:01.017132 === u2Vref_new: 0x5e --> 0x3d
806 00:41:01.017208
807 00:41:01.017283 Vref(ca) range 1: 30
808 00:41:01.017359
809 00:41:01.017434 CS Dly= 9 (40-0-32)
810 00:41:01.017510 Write Rank0 MR13 =0xd8
811 00:41:01.017586 Write Rank0 MR13 =0xd8
812 00:41:01.017661 Write Rank0 MR12 =0x5e
813 00:41:01.017737 Write Rank1 MR13 =0x59
814 00:41:01.017812 ==
815 00:41:01.017889 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
816 00:41:01.018221 fsp= 1, odt_onoff= 1, Byte mode= 0
817 00:41:01.018305 ==
818 00:41:01.018384 === u2Vref_new: 0x56 --> 0x2d
819 00:41:01.018463 === u2Vref_new: 0x58 --> 0x38
820 00:41:01.018541 === u2Vref_new: 0x5a --> 0x39
821 00:41:01.018619 === u2Vref_new: 0x5c --> 0x3c
822 00:41:01.018711 === u2Vref_new: 0x5e --> 0x3d
823 00:41:01.018787 === u2Vref_new: 0x60 --> 0xa0
824 00:41:01.018864 [CA 0] Center 36 (10~63) winsize 54
825 00:41:01.018939 [CA 1] Center 36 (10~63) winsize 54
826 00:41:01.019016 [CA 2] Center 31 (2~60) winsize 59
827 00:41:01.019092 [CA 3] Center 26 (-2~54) winsize 57
828 00:41:01.019168 [CA 4] Center 25 (-3~53) winsize 57
829 00:41:01.019244 [CA 5] Center 30 (1~60) winsize 60
830 00:41:01.019319
831 00:41:01.019395 [CATrainingPosCal] consider 2 rank data
832 00:41:01.019471 u2DelayCellTimex100 = 844/100 ps
833 00:41:01.019547 CA0 delay=36 (10~63),Diff = 11 PI (12 cell)
834 00:41:01.019623 CA1 delay=36 (10~63),Diff = 11 PI (12 cell)
835 00:41:01.019701 CA2 delay=30 (2~59),Diff = 5 PI (5 cell)
836 00:41:01.019777 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
837 00:41:01.019854 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
838 00:41:01.019930 CA5 delay=30 (1~60),Diff = 5 PI (5 cell)
839 00:41:01.020005
840 00:41:01.020081 CA PerBit enable=1, Macro0, CA PI delay=25
841 00:41:01.020157 === u2Vref_new: 0x5c --> 0x3c
842 00:41:01.020232
843 00:41:01.020308 Vref(ca) range 1: 28
844 00:41:01.020383
845 00:41:01.020458 CS Dly= 7 (38-0-32)
846 00:41:01.020534 Write Rank1 MR13 =0xd8
847 00:41:01.020609 Write Rank1 MR13 =0xd8
848 00:41:01.020684 Write Rank1 MR12 =0x5c
849 00:41:01.020761 [RankSwap] Rank num 2, (Multi 1), Rank 0
850 00:41:01.020836 Write Rank0 MR2 =0xad
851 00:41:01.020912 [Write Leveling]
852 00:41:01.020987 delay byte0 byte1 byte2 byte3
853 00:41:01.021062
854 00:41:01.021138 10 0 0
855 00:41:01.021216 11 0 0
856 00:41:01.021293 12 0 0
857 00:41:01.021371 13 0 0
858 00:41:01.021448 14 0 0
859 00:41:01.021525 15 0 0
860 00:41:01.021603 16 0 0
861 00:41:01.021680 17 0 0
862 00:41:01.021757 18 0 0
863 00:41:01.021835 19 0 0
864 00:41:01.021913 20 0 0
865 00:41:01.021997 21 0 0
866 00:41:01.022120 22 0 0
867 00:41:01.022218 23 0 0
868 00:41:01.022312 24 0 ff
869 00:41:01.022391 25 0 ff
870 00:41:01.022462 26 0 ff
871 00:41:01.022515 27 0 ff
872 00:41:01.022565 28 0 ff
873 00:41:01.022615 29 0 ff
874 00:41:01.022664 30 0 ff
875 00:41:01.022713 31 0 ff
876 00:41:01.022762 32 ff ff
877 00:41:01.022812 33 ff ff
878 00:41:01.022862 34 ff ff
879 00:41:01.022912 35 ff ff
880 00:41:01.022961 36 ff ff
881 00:41:01.023010 37 ff ff
882 00:41:01.023059 38 ff ff
883 00:41:01.023108 pass bytecount = 0xff (0xff: all bytes pass)
884 00:41:01.023157
885 00:41:01.023205 DQS0 dly: 32
886 00:41:01.023254 DQS1 dly: 24
887 00:41:01.023302 Write Rank0 MR2 =0x2d
888 00:41:01.023351 [RankSwap] Rank num 2, (Multi 1), Rank 0
889 00:41:01.023400 Write Rank0 MR1 =0xd6
890 00:41:01.023448 [Gating]
891 00:41:01.023496 ==
892 00:41:01.023545 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
893 00:41:01.023594 fsp= 1, odt_onoff= 1, Byte mode= 0
894 00:41:01.023642 ==
895 00:41:01.023691 3 1 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
896 00:41:01.023741 3 1 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
897 00:41:01.023791 3 1 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
898 00:41:01.023840 3 1 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
899 00:41:01.023891 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
900 00:41:01.023940 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
901 00:41:01.023989 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
902 00:41:01.024077 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
903 00:41:01.024128 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
904 00:41:01.024178 3 2 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
905 00:41:01.024228 3 2 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 0)| 0
906 00:41:01.024277 3 2 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
907 00:41:01.024327 3 2 16 |403 403 |(11 11)(11 11) |(1 1)(1 1)| 0
908 00:41:01.024376 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
909 00:41:01.024425 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
910 00:41:01.024474 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
911 00:41:01.024524 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
912 00:41:01.024573 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
913 00:41:01.024622 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
914 00:41:01.024671 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
915 00:41:01.024720 3 3 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
916 00:41:01.024768 3 3 20 |3534 403 |(11 11)(11 11) |(1 1)(1 1)| 0
917 00:41:01.024817 3 3 24 |3534 2322 |(11 11)(11 11) |(1 1)(1 1)| 0
918 00:41:01.024866 [Byte 0] Lead/lag Transition tap number (1)
919 00:41:01.024916 [Byte 1] Lead/lag Transition tap number (1)
920 00:41:01.024965 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
921 00:41:01.025015 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
922 00:41:01.025064 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
923 00:41:01.025113 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
924 00:41:01.025163 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
925 00:41:01.025212 3 4 16 |707 908 |(11 11)(11 11) |(1 1)(1 1)| 0
926 00:41:01.025261 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 00:41:01.025310 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 00:41:01.025360 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 00:41:01.025409 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 00:41:01.025459 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 00:41:01.025508 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 00:41:01.025558 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 00:41:01.025608 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 00:41:01.025658 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 00:41:01.025707 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 00:41:01.025756 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 00:41:01.025806 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
938 00:41:01.025855 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
939 00:41:01.025905 [Byte 0] Lead/lag falling Transition (3, 6, 4)
940 00:41:01.026193 [Byte 1] Lead/lag falling Transition (3, 6, 4)
941 00:41:01.026328 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
942 00:41:01.026415 [Byte 0] Lead/lag Transition tap number (2)
943 00:41:01.026469 3 6 12 |403 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
944 00:41:01.026527 [Byte 1] Lead/lag Transition tap number (3)
945 00:41:01.026591 3 6 16 |4646 2828 |(0 0)(11 11) |(0 0)(0 0)| 0
946 00:41:01.026643 [Byte 0]First pass (3, 6, 16)
947 00:41:01.026694 3 6 20 |4646 3e3e |(0 0)(11 11) |(0 0)(0 0)| 0
948 00:41:01.026744 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 00:41:01.026794 [Byte 1]First pass (3, 6, 24)
950 00:41:01.026842 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 00:41:01.026892 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 00:41:01.026941 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 00:41:01.026991 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 00:41:01.027041 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 00:41:01.027091 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 00:41:01.027141 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
957 00:41:01.027191 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
958 00:41:01.027240 All bytes gating window > 1UI, Early break!
959 00:41:01.027288
960 00:41:01.027336 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
961 00:41:01.027385
962 00:41:01.027433 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
963 00:41:01.027482
964 00:41:01.027530
965 00:41:01.027676
966 00:41:01.027787 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
967 00:41:01.027860
968 00:41:01.027911 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
969 00:41:01.027960
970 00:41:01.028008
971 00:41:01.028057 Write Rank0 MR1 =0x56
972 00:41:01.028105
973 00:41:01.028154 best RODT dly(2T, 0.5T) = (2, 3)
974 00:41:01.028202
975 00:41:01.028250 best RODT dly(2T, 0.5T) = (2, 3)
976 00:41:01.028299 ==
977 00:41:01.028346 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 00:41:01.028395 fsp= 1, odt_onoff= 1, Byte mode= 0
979 00:41:01.028443 ==
980 00:41:01.028492 Start DQ dly to find pass range UseTestEngine =0
981 00:41:01.028541 x-axis: bit #, y-axis: DQ dly (-127~63)
982 00:41:01.028590 RX Vref Scan = 0
983 00:41:01.028638 -26, [0] xxxxxxxx xxxxxxxx [MSB]
984 00:41:01.028687 -25, [0] xxxxxxxx xxxxxxxx [MSB]
985 00:41:01.028737 -24, [0] xxxxxxxx xxxxxxxx [MSB]
986 00:41:01.028786 -23, [0] xxxxxxxx xxxxxxxx [MSB]
987 00:41:01.028835 -22, [0] xxxxxxxx xxxxxxxx [MSB]
988 00:41:01.028885 -21, [0] xxxxxxxx xxxxxxxx [MSB]
989 00:41:01.028934 -20, [0] xxxxxxxx xxxxxxxx [MSB]
990 00:41:01.028983 -19, [0] xxxxxxxx xxxxxxxx [MSB]
991 00:41:01.029032 -18, [0] xxxxxxxx xxxxxxxx [MSB]
992 00:41:01.029082 -17, [0] xxxxxxxx xxxxxxxx [MSB]
993 00:41:01.029130 -16, [0] xxxxxxxx xxxxxxxx [MSB]
994 00:41:01.029179 -15, [0] xxxxxxxx xxxxxxxx [MSB]
995 00:41:01.029228 -14, [0] xxxxxxxx xxxxxxxx [MSB]
996 00:41:01.029277 -13, [0] xxxxxxxx xxxxxxxx [MSB]
997 00:41:01.029326 -12, [0] xxxxxxxx xxxxxxxx [MSB]
998 00:41:01.029375 -11, [0] xxxxxxxx xxxxxxxx [MSB]
999 00:41:01.029424 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1000 00:41:01.029473 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1001 00:41:01.029522 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1002 00:41:01.029571 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1003 00:41:01.029621 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1004 00:41:01.029670 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1005 00:41:01.029719 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1006 00:41:01.029769 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1007 00:41:01.029818 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1008 00:41:01.029867 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1009 00:41:01.029916 0, [0] xxxxxxxx xxxxxxxx [MSB]
1010 00:41:01.029966 1, [0] xxxxxxxx oxxxxxxx [MSB]
1011 00:41:01.030066 2, [0] xxxxxxxx oxxxxxxx [MSB]
1012 00:41:01.030151 3, [0] xxxoxxxx oxxoxxxx [MSB]
1013 00:41:01.030241 4, [0] xxxoxoxx ooxoxoxx [MSB]
1014 00:41:01.030320 5, [0] xxxoxoxx ooxoxoox [MSB]
1015 00:41:01.030398 6, [0] xxxoxoxx ooxoooox [MSB]
1016 00:41:01.030476 7, [0] xxxoxooo ooxooooo [MSB]
1017 00:41:01.030555 8, [0] xoxoxooo ooxooooo [MSB]
1018 00:41:01.030633 9, [0] ooxoxooo ooxooooo [MSB]
1019 00:41:01.030711 31, [0] oooooooo oooooooo [MSB]
1020 00:41:01.030790 32, [0] oooxoooo oooooooo [MSB]
1021 00:41:01.030927 33, [0] oooxoooo xooooooo [MSB]
1022 00:41:01.031008 34, [0] oooxoooo xooooooo [MSB]
1023 00:41:01.031086 35, [0] oooxoxxo xooxoooo [MSB]
1024 00:41:01.031165 36, [0] oooxoxxo xxoxxooo [MSB]
1025 00:41:01.031271 37, [0] oooxoxxo xxoxxooo [MSB]
1026 00:41:01.031349 38, [0] oxoxoxxo xxoxxxxo [MSB]
1027 00:41:01.031427 39, [0] oxoxoxxx xxoxxxxo [MSB]
1028 00:41:01.031505 40, [0] xxoxxxxx xxoxxxxo [MSB]
1029 00:41:01.031582 41, [0] xxoxxxxx xxoxxxxx [MSB]
1030 00:41:01.031660 42, [0] xxxxxxxx xxxxxxxx [MSB]
1031 00:41:01.031739 iDelay=42, Bit 0, Center 24 (9 ~ 39) 31
1032 00:41:01.031815 iDelay=42, Bit 1, Center 22 (8 ~ 37) 30
1033 00:41:01.031892 iDelay=42, Bit 2, Center 25 (10 ~ 41) 32
1034 00:41:01.031968 iDelay=42, Bit 3, Center 17 (3 ~ 31) 29
1035 00:41:01.032044 iDelay=42, Bit 4, Center 24 (10 ~ 39) 30
1036 00:41:01.032120 iDelay=42, Bit 5, Center 19 (4 ~ 34) 31
1037 00:41:01.032196 iDelay=42, Bit 6, Center 20 (7 ~ 34) 28
1038 00:41:01.032273 iDelay=42, Bit 7, Center 22 (7 ~ 38) 32
1039 00:41:01.032349 iDelay=42, Bit 8, Center 16 (1 ~ 32) 32
1040 00:41:01.032425 iDelay=42, Bit 9, Center 19 (4 ~ 35) 32
1041 00:41:01.032501 iDelay=42, Bit 10, Center 25 (10 ~ 41) 32
1042 00:41:01.032576 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
1043 00:41:01.032652 iDelay=42, Bit 12, Center 20 (6 ~ 35) 30
1044 00:41:01.032728 iDelay=42, Bit 13, Center 20 (4 ~ 37) 34
1045 00:41:01.032805 iDelay=42, Bit 14, Center 21 (5 ~ 37) 33
1046 00:41:01.032881 iDelay=42, Bit 15, Center 23 (7 ~ 40) 34
1047 00:41:01.032956 ==
1048 00:41:01.033032 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1049 00:41:01.033109 fsp= 1, odt_onoff= 1, Byte mode= 0
1050 00:41:01.033185 ==
1051 00:41:01.033261 DQS Delay:
1052 00:41:01.033336 DQS0 = 0, DQS1 = 0
1053 00:41:01.033411 DQM Delay:
1054 00:41:01.033486 DQM0 = 21, DQM1 = 20
1055 00:41:01.033562 DQ Delay:
1056 00:41:01.033637 DQ0 =24, DQ1 =22, DQ2 =25, DQ3 =17
1057 00:41:01.033713 DQ4 =24, DQ5 =19, DQ6 =20, DQ7 =22
1058 00:41:01.033788 DQ8 =16, DQ9 =19, DQ10 =25, DQ11 =18
1059 00:41:01.033864 DQ12 =20, DQ13 =20, DQ14 =21, DQ15 =23
1060 00:41:01.033939
1061 00:41:01.034043
1062 00:41:01.034093 DramC Write-DBI off
1063 00:41:01.034141 ==
1064 00:41:01.034190 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1065 00:41:01.034239 fsp= 1, odt_onoff= 1, Byte mode= 0
1066 00:41:01.034287 ==
1067 00:41:01.034544 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1068 00:41:01.034600
1069 00:41:01.034650 Begin, DQ Scan Range 920~1176
1070 00:41:01.034699
1071 00:41:01.034747
1072 00:41:01.034794 TX Vref Scan disable
1073 00:41:01.034843 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1074 00:41:01.034893 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1075 00:41:01.034942 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1076 00:41:01.034991 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1077 00:41:01.035041 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1078 00:41:01.035089 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1079 00:41:01.035138 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1080 00:41:01.035187 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1081 00:41:01.035236 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1082 00:41:01.035286 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1083 00:41:01.035335 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1084 00:41:01.035384 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1085 00:41:01.035434 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1086 00:41:01.035483 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1087 00:41:01.035533 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1088 00:41:01.035583 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1089 00:41:01.035633 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1090 00:41:01.035682 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1091 00:41:01.035731 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1092 00:41:01.035780 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1093 00:41:01.035829 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1094 00:41:01.035879 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1095 00:41:01.035929 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1096 00:41:01.035978 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1097 00:41:01.036027 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1098 00:41:01.036076 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1099 00:41:01.036126 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1100 00:41:01.036175 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1101 00:41:01.036225 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1102 00:41:01.036275 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1103 00:41:01.036325 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1104 00:41:01.036374 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1105 00:41:01.036424 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1106 00:41:01.036473 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1107 00:41:01.036522 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1108 00:41:01.036572 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1109 00:41:01.036621 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1110 00:41:01.036670 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1111 00:41:01.036720 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1112 00:41:01.036769 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1113 00:41:01.036818 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1114 00:41:01.036867 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1115 00:41:01.036917 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1116 00:41:01.036966 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1117 00:41:01.037015 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1118 00:41:01.037065 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1119 00:41:01.037114 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1120 00:41:01.037162 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1121 00:41:01.037212 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1122 00:41:01.037261 969 |3 6 9|[0] xxxxxxxx ooxooxxx [MSB]
1123 00:41:01.037311 970 |3 6 10|[0] xxxxxxxx ooxoooxx [MSB]
1124 00:41:01.037360 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1125 00:41:01.037410 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1126 00:41:01.037458 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1127 00:41:01.037507 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1128 00:41:01.037556 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1129 00:41:01.037606 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1130 00:41:01.037655 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1131 00:41:01.037704 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1132 00:41:01.037753 979 |3 6 19|[0] xxxoxooo oooooooo [MSB]
1133 00:41:01.037801 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1134 00:41:01.037851 981 |3 6 21|[0] ooxooooo oooooooo [MSB]
1135 00:41:01.037900 989 |3 6 29|[0] oooooooo xooooooo [MSB]
1136 00:41:01.037949 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1137 00:41:01.038038 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1138 00:41:01.038090 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1139 00:41:01.038139 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1140 00:41:01.038191 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1141 00:41:01.038240 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1142 00:41:01.038289 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1143 00:41:01.038338 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1144 00:41:01.038387 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1145 00:41:01.038436 999 |3 6 39|[0] oooxxxxx xxxxxxxx [MSB]
1146 00:41:01.038485 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1147 00:41:01.038535 Byte0, DQ PI dly=988, DQM PI dly= 988
1148 00:41:01.038583 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1149 00:41:01.038632
1150 00:41:01.038680 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1151 00:41:01.038729
1152 00:41:01.038776 Byte1, DQ PI dly=980, DQM PI dly= 980
1153 00:41:01.038825 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1154 00:41:01.038873
1155 00:41:01.038921 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1156 00:41:01.038969
1157 00:41:01.039018 ==
1158 00:41:01.039066 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1159 00:41:01.039115 fsp= 1, odt_onoff= 1, Byte mode= 0
1160 00:41:01.039163 ==
1161 00:41:01.039212 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1162 00:41:01.039260
1163 00:41:01.039311 Begin, DQ Scan Range 956~1020
1164 00:41:01.039362 Write Rank0 MR14 =0x0
1165 00:41:01.039411
1166 00:41:01.039461 CH=0, VrefRange= 0, VrefLevel = 0
1167 00:41:01.039617 TX Bit0 (985~994) 10 989, Bit8 (971~982) 12 976,
1168 00:41:01.039725 TX Bit1 (982~995) 14 988, Bit9 (972~985) 14 978,
1169 00:41:01.039797 TX Bit2 (984~994) 11 989, Bit10 (979~988) 10 983,
1170 00:41:01.039852 TX Bit3 (979~989) 11 984, Bit11 (972~983) 12 977,
1171 00:41:01.039907 TX Bit4 (981~993) 13 987, Bit12 (972~986) 15 979,
1172 00:41:01.039958 TX Bit5 (982~991) 10 986, Bit13 (973~985) 13 979,
1173 00:41:01.040038 TX Bit6 (980~993) 14 986, Bit14 (974~987) 14 980,
1174 00:41:01.040116 TX Bit7 (981~993) 13 987, Bit15 (978~989) 12 983,
1175 00:41:01.040192
1176 00:41:01.040267 Write Rank0 MR14 =0x2
1177 00:41:01.040343
1178 00:41:01.040636 CH=0, VrefRange= 0, VrefLevel = 2
1179 00:41:01.040783 TX Bit0 (984~995) 12 989, Bit8 (970~983) 14 976,
1180 00:41:01.040861 TX Bit1 (981~995) 15 988, Bit9 (972~986) 15 979,
1181 00:41:01.040939 TX Bit2 (983~995) 13 989, Bit10 (977~989) 13 983,
1182 00:41:01.041016 TX Bit3 (978~991) 14 984, Bit11 (971~984) 14 977,
1183 00:41:01.041092 TX Bit4 (981~994) 14 987, Bit12 (972~986) 15 979,
1184 00:41:01.041169 TX Bit5 (981~992) 12 986, Bit13 (972~986) 15 979,
1185 00:41:01.041246 TX Bit6 (980~993) 14 986, Bit14 (974~988) 15 981,
1186 00:41:01.041323 TX Bit7 (981~994) 14 987, Bit15 (977~990) 14 983,
1187 00:41:01.041404
1188 00:41:01.041481 Write Rank0 MR14 =0x4
1189 00:41:01.041556
1190 00:41:01.041631 CH=0, VrefRange= 0, VrefLevel = 4
1191 00:41:01.041708 TX Bit0 (984~996) 13 990, Bit8 (970~984) 15 977,
1192 00:41:01.041785 TX Bit1 (981~996) 16 988, Bit9 (972~987) 16 979,
1193 00:41:01.041862 TX Bit2 (983~995) 13 989, Bit10 (976~989) 14 982,
1194 00:41:01.041939 TX Bit3 (979~991) 13 985, Bit11 (971~985) 15 978,
1195 00:41:01.042058 TX Bit4 (981~994) 14 987, Bit12 (972~987) 16 979,
1196 00:41:01.042137 TX Bit5 (980~993) 14 986, Bit13 (972~987) 16 979,
1197 00:41:01.042213 TX Bit6 (980~993) 14 986, Bit14 (974~988) 15 981,
1198 00:41:01.042290 TX Bit7 (980~994) 15 987, Bit15 (977~991) 15 984,
1199 00:41:01.042366
1200 00:41:01.042442 Write Rank0 MR14 =0x6
1201 00:41:01.042516
1202 00:41:01.042592 CH=0, VrefRange= 0, VrefLevel = 6
1203 00:41:01.042669 TX Bit0 (984~996) 13 990, Bit8 (969~984) 16 976,
1204 00:41:01.042749 TX Bit1 (981~996) 16 988, Bit9 (971~988) 18 979,
1205 00:41:01.042803 TX Bit2 (983~996) 14 989, Bit10 (977~990) 14 983,
1206 00:41:01.042852 TX Bit3 (978~992) 15 985, Bit11 (970~985) 16 977,
1207 00:41:01.042901 TX Bit4 (980~994) 15 987, Bit12 (971~988) 18 979,
1208 00:41:01.042950 TX Bit5 (980~993) 14 986, Bit13 (971~987) 17 979,
1209 00:41:01.042999 TX Bit6 (979~994) 16 986, Bit14 (973~989) 17 981,
1210 00:41:01.043047 TX Bit7 (981~994) 14 987, Bit15 (977~991) 15 984,
1211 00:41:01.043095
1212 00:41:01.043142 Write Rank0 MR14 =0x8
1213 00:41:01.043190
1214 00:41:01.043237 CH=0, VrefRange= 0, VrefLevel = 8
1215 00:41:01.043286 TX Bit0 (982~997) 16 989, Bit8 (969~985) 17 977,
1216 00:41:01.043335 TX Bit1 (981~997) 17 989, Bit9 (971~988) 18 979,
1217 00:41:01.043383 TX Bit2 (982~997) 16 989, Bit10 (976~991) 16 983,
1218 00:41:01.043432 TX Bit3 (978~992) 15 985, Bit11 (970~986) 17 978,
1219 00:41:01.043481 TX Bit4 (980~995) 16 987, Bit12 (971~988) 18 979,
1220 00:41:01.043529 TX Bit5 (980~993) 14 986, Bit13 (971~988) 18 979,
1221 00:41:01.043578 TX Bit6 (980~994) 15 987, Bit14 (972~989) 18 980,
1222 00:41:01.043626 TX Bit7 (980~995) 16 987, Bit15 (977~992) 16 984,
1223 00:41:01.043675
1224 00:41:01.043723 Write Rank0 MR14 =0xa
1225 00:41:01.043771
1226 00:41:01.043818 CH=0, VrefRange= 0, VrefLevel = 10
1227 00:41:01.043867 TX Bit0 (982~998) 17 990, Bit8 (968~985) 18 976,
1228 00:41:01.043916 TX Bit1 (980~997) 18 988, Bit9 (971~989) 19 980,
1229 00:41:01.043964 TX Bit2 (982~997) 16 989, Bit10 (976~992) 17 984,
1230 00:41:01.044011 TX Bit3 (978~993) 16 985, Bit11 (969~987) 19 978,
1231 00:41:01.044059 TX Bit4 (980~996) 17 988, Bit12 (970~988) 19 979,
1232 00:41:01.044107 TX Bit5 (980~994) 15 987, Bit13 (971~988) 18 979,
1233 00:41:01.044156 TX Bit6 (979~995) 17 987, Bit14 (972~990) 19 981,
1234 00:41:01.044210 TX Bit7 (980~996) 17 988, Bit15 (976~992) 17 984,
1235 00:41:01.044258
1236 00:41:01.044306 Write Rank0 MR14 =0xc
1237 00:41:01.044482
1238 00:41:01.044593 CH=0, VrefRange= 0, VrefLevel = 12
1239 00:41:01.044675 TX Bit0 (982~999) 18 990, Bit8 (968~986) 19 977,
1240 00:41:01.044731 TX Bit1 (980~998) 19 989, Bit9 (970~989) 20 979,
1241 00:41:01.044784 TX Bit2 (981~998) 18 989, Bit10 (975~992) 18 983,
1242 00:41:01.044835 TX Bit3 (977~993) 17 985, Bit11 (969~986) 18 977,
1243 00:41:01.044884 TX Bit4 (980~997) 18 988, Bit12 (970~989) 20 979,
1244 00:41:01.044932 TX Bit5 (979~994) 16 986, Bit13 (970~989) 20 979,
1245 00:41:01.044980 TX Bit6 (979~995) 17 987, Bit14 (971~990) 20 980,
1246 00:41:01.045029 TX Bit7 (980~997) 18 988, Bit15 (975~993) 19 984,
1247 00:41:01.045077
1248 00:41:01.045125 Write Rank0 MR14 =0xe
1249 00:41:01.045173
1250 00:41:01.045220 CH=0, VrefRange= 0, VrefLevel = 14
1251 00:41:01.045269 TX Bit0 (982~1000) 19 991, Bit8 (968~988) 21 978,
1252 00:41:01.045317 TX Bit1 (980~999) 20 989, Bit9 (969~989) 21 979,
1253 00:41:01.045365 TX Bit2 (981~999) 19 990, Bit10 (975~993) 19 984,
1254 00:41:01.045413 TX Bit3 (977~993) 17 985, Bit11 (969~988) 20 978,
1255 00:41:01.045462 TX Bit4 (980~997) 18 988, Bit12 (969~989) 21 979,
1256 00:41:01.045511 TX Bit5 (979~995) 17 987, Bit13 (969~989) 21 979,
1257 00:41:01.045560 TX Bit6 (979~996) 18 987, Bit14 (971~990) 20 980,
1258 00:41:01.045609 TX Bit7 (979~997) 19 988, Bit15 (975~993) 19 984,
1259 00:41:01.045657
1260 00:41:01.045704 Write Rank0 MR14 =0x10
1261 00:41:01.045751
1262 00:41:01.045799 CH=0, VrefRange= 0, VrefLevel = 16
1263 00:41:01.045847 TX Bit0 (981~1000) 20 990, Bit8 (968~988) 21 978,
1264 00:41:01.045896 TX Bit1 (980~1000) 21 990, Bit9 (969~989) 21 979,
1265 00:41:01.045945 TX Bit2 (981~999) 19 990, Bit10 (975~993) 19 984,
1266 00:41:01.046022 TX Bit3 (977~993) 17 985, Bit11 (968~988) 21 978,
1267 00:41:01.046143 TX Bit4 (979~998) 20 988, Bit12 (969~990) 22 979,
1268 00:41:01.046220 TX Bit5 (979~995) 17 987, Bit13 (969~989) 21 979,
1269 00:41:01.046289 TX Bit6 (979~996) 18 987, Bit14 (971~991) 21 981,
1270 00:41:01.046339 TX Bit7 (979~998) 20 988, Bit15 (975~994) 20 984,
1271 00:41:01.046388
1272 00:41:01.046437 Write Rank0 MR14 =0x12
1273 00:41:01.046485
1274 00:41:01.046532 CH=0, VrefRange= 0, VrefLevel = 18
1275 00:41:01.046581 TX Bit0 (982~1001) 20 991, Bit8 (968~988) 21 978,
1276 00:41:01.046631 TX Bit1 (980~1000) 21 990, Bit9 (969~990) 22 979,
1277 00:41:01.046679 TX Bit2 (981~1000) 20 990, Bit10 (974~993) 20 983,
1278 00:41:01.046917 TX Bit3 (977~994) 18 985, Bit11 (968~989) 22 978,
1279 00:41:01.046972 TX Bit4 (979~999) 21 989, Bit12 (969~990) 22 979,
1280 00:41:01.047022 TX Bit5 (979~995) 17 987, Bit13 (969~990) 22 979,
1281 00:41:01.047071 TX Bit6 (979~997) 19 988, Bit14 (970~992) 23 981,
1282 00:41:01.047119 TX Bit7 (979~999) 21 989, Bit15 (975~993) 19 984,
1283 00:41:01.047168
1284 00:41:01.047216 Write Rank0 MR14 =0x14
1285 00:41:01.047263
1286 00:41:01.047311 CH=0, VrefRange= 0, VrefLevel = 20
1287 00:41:01.047360 TX Bit0 (981~1001) 21 991, Bit8 (968~988) 21 978,
1288 00:41:01.047409 TX Bit1 (980~1000) 21 990, Bit9 (969~990) 22 979,
1289 00:41:01.047458 TX Bit2 (981~1000) 20 990, Bit10 (974~994) 21 984,
1290 00:41:01.047507 TX Bit3 (977~994) 18 985, Bit11 (968~989) 22 978,
1291 00:41:01.047556 TX Bit4 (979~999) 21 989, Bit12 (969~991) 23 980,
1292 00:41:01.047605 TX Bit5 (979~996) 18 987, Bit13 (969~990) 22 979,
1293 00:41:01.047653 TX Bit6 (979~998) 20 988, Bit14 (970~992) 23 981,
1294 00:41:01.047701 TX Bit7 (979~999) 21 989, Bit15 (975~995) 21 985,
1295 00:41:01.047772
1296 00:41:01.047860 wait MRW command Rank0 MR14 =0x16 fired (1)
1297 00:41:01.047952 Write Rank0 MR14 =0x16
1298 00:41:01.048003
1299 00:41:01.048052 CH=0, VrefRange= 0, VrefLevel = 22
1300 00:41:01.048102 TX Bit0 (981~1002) 22 991, Bit8 (967~989) 23 978,
1301 00:41:01.048151 TX Bit1 (980~1001) 22 990, Bit9 (969~991) 23 980,
1302 00:41:01.048214 TX Bit2 (980~1001) 22 990, Bit10 (974~995) 22 984,
1303 00:41:01.048262 TX Bit3 (976~994) 19 985, Bit11 (968~989) 22 978,
1304 00:41:01.048311 TX Bit4 (979~1000) 22 989, Bit12 (968~991) 24 979,
1305 00:41:01.048359 TX Bit5 (978~997) 20 987, Bit13 (968~991) 24 979,
1306 00:41:01.048407 TX Bit6 (979~998) 20 988, Bit14 (969~993) 25 981,
1307 00:41:01.048456 TX Bit7 (979~1000) 22 989, Bit15 (974~995) 22 984,
1308 00:41:01.048504
1309 00:41:01.048551 Write Rank0 MR14 =0x18
1310 00:41:01.048598
1311 00:41:01.048646 CH=0, VrefRange= 0, VrefLevel = 24
1312 00:41:01.048694 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1313 00:41:01.048743 TX Bit1 (980~1001) 22 990, Bit9 (968~991) 24 979,
1314 00:41:01.048791 TX Bit2 (980~1002) 23 991, Bit10 (974~995) 22 984,
1315 00:41:01.048840 TX Bit3 (976~995) 20 985, Bit11 (968~990) 23 979,
1316 00:41:01.048888 TX Bit4 (979~1000) 22 989, Bit12 (968~991) 24 979,
1317 00:41:01.048936 TX Bit5 (979~997) 19 988, Bit13 (968~991) 24 979,
1318 00:41:01.048984 TX Bit6 (978~999) 22 988, Bit14 (969~993) 25 981,
1319 00:41:01.049032 TX Bit7 (979~1000) 22 989, Bit15 (974~996) 23 985,
1320 00:41:01.049080
1321 00:41:01.049127 Write Rank0 MR14 =0x1a
1322 00:41:01.049174
1323 00:41:01.049222 CH=0, VrefRange= 0, VrefLevel = 26
1324 00:41:01.049270 TX Bit0 (980~1002) 23 991, Bit8 (967~990) 24 978,
1325 00:41:01.049318 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1326 00:41:01.049367 TX Bit2 (980~1002) 23 991, Bit10 (974~996) 23 985,
1327 00:41:01.049416 TX Bit3 (976~995) 20 985, Bit11 (967~990) 24 978,
1328 00:41:01.049465 TX Bit4 (979~1001) 23 990, Bit12 (968~992) 25 980,
1329 00:41:01.049513 TX Bit5 (978~998) 21 988, Bit13 (968~991) 24 979,
1330 00:41:01.049560 TX Bit6 (978~999) 22 988, Bit14 (969~993) 25 981,
1331 00:41:01.049608 TX Bit7 (979~1001) 23 990, Bit15 (973~996) 24 984,
1332 00:41:01.049657
1333 00:41:01.049704 Write Rank0 MR14 =0x1c
1334 00:41:01.049752
1335 00:41:01.049833 CH=0, VrefRange= 0, VrefLevel = 28
1336 00:41:01.049910 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1337 00:41:01.049994 TX Bit1 (979~1002) 24 990, Bit9 (968~990) 23 979,
1338 00:41:01.050131 TX Bit2 (980~1003) 24 991, Bit10 (973~996) 24 984,
1339 00:41:01.050277 TX Bit3 (976~995) 20 985, Bit11 (967~990) 24 978,
1340 00:41:01.050375 TX Bit4 (979~1001) 23 990, Bit12 (968~992) 25 980,
1341 00:41:01.050453 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1342 00:41:01.050609 TX Bit6 (978~1000) 23 989, Bit14 (968~993) 26 980,
1343 00:41:01.050703 TX Bit7 (979~1002) 24 990, Bit15 (973~996) 24 984,
1344 00:41:01.050786
1345 00:41:01.050862 Write Rank0 MR14 =0x1e
1346 00:41:01.050938
1347 00:41:01.051014 CH=0, VrefRange= 0, VrefLevel = 30
1348 00:41:01.051091 TX Bit0 (979~1004) 26 991, Bit8 (966~989) 24 977,
1349 00:41:01.051168 TX Bit1 (979~1002) 24 990, Bit9 (967~990) 24 978,
1350 00:41:01.051245 TX Bit2 (980~1003) 24 991, Bit10 (973~996) 24 984,
1351 00:41:01.051321 TX Bit3 (975~996) 22 985, Bit11 (967~990) 24 978,
1352 00:41:01.051403 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1353 00:41:01.051481 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1354 00:41:01.051559 TX Bit6 (978~1000) 23 989, Bit14 (968~993) 26 980,
1355 00:41:01.051636 TX Bit7 (979~1002) 24 990, Bit15 (972~997) 26 984,
1356 00:41:01.051711
1357 00:41:01.051787 Write Rank0 MR14 =0x20
1358 00:41:01.051862
1359 00:41:01.051938 CH=0, VrefRange= 0, VrefLevel = 32
1360 00:41:01.052025 TX Bit0 (979~1004) 26 991, Bit8 (966~989) 24 977,
1361 00:41:01.052109 TX Bit1 (979~1002) 24 990, Bit9 (967~990) 24 978,
1362 00:41:01.052191 TX Bit2 (980~1003) 24 991, Bit10 (973~996) 24 984,
1363 00:41:01.052268 TX Bit3 (975~996) 22 985, Bit11 (967~990) 24 978,
1364 00:41:01.052344 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1365 00:41:01.052422 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1366 00:41:01.052501 TX Bit6 (978~1000) 23 989, Bit14 (968~993) 26 980,
1367 00:41:01.052582 TX Bit7 (979~1002) 24 990, Bit15 (972~997) 26 984,
1368 00:41:01.052666
1369 00:41:01.052741 Write Rank0 MR14 =0x22
1370 00:41:01.052816
1371 00:41:01.052891 CH=0, VrefRange= 0, VrefLevel = 34
1372 00:41:01.052967 TX Bit0 (979~1004) 26 991, Bit8 (966~989) 24 977,
1373 00:41:01.053044 TX Bit1 (979~1002) 24 990, Bit9 (967~990) 24 978,
1374 00:41:01.053121 TX Bit2 (980~1003) 24 991, Bit10 (973~996) 24 984,
1375 00:41:01.053197 TX Bit3 (975~996) 22 985, Bit11 (967~990) 24 978,
1376 00:41:01.053274 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1377 00:41:01.053545 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1378 00:41:01.053628 TX Bit6 (978~1000) 23 989, Bit14 (968~993) 26 980,
1379 00:41:01.053706 TX Bit7 (979~1002) 24 990, Bit15 (972~997) 26 984,
1380 00:41:01.053780
1381 00:41:01.053856 Write Rank0 MR14 =0x24
1382 00:41:01.053931
1383 00:41:01.054046 CH=0, VrefRange= 0, VrefLevel = 36
1384 00:41:01.054131 TX Bit0 (979~1004) 26 991, Bit8 (966~989) 24 977,
1385 00:41:01.054209 TX Bit1 (979~1002) 24 990, Bit9 (967~990) 24 978,
1386 00:41:01.054286 TX Bit2 (980~1003) 24 991, Bit10 (973~996) 24 984,
1387 00:41:01.054363 TX Bit3 (975~996) 22 985, Bit11 (967~990) 24 978,
1388 00:41:01.054440 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1389 00:41:01.054517 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1390 00:41:01.054593 TX Bit6 (978~1000) 23 989, Bit14 (968~993) 26 980,
1391 00:41:01.054670 TX Bit7 (979~1002) 24 990, Bit15 (972~997) 26 984,
1392 00:41:01.054745
1393 00:41:01.054827
1394 00:41:01.054903 TX Vref found, early break! 363< 366
1395 00:41:01.054970 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
1396 00:41:01.055026 u1DelayCellOfst[0]=6 cells (6 PI)
1397 00:41:01.055076 u1DelayCellOfst[1]=5 cells (5 PI)
1398 00:41:01.055124 u1DelayCellOfst[2]=6 cells (6 PI)
1399 00:41:01.055172 u1DelayCellOfst[3]=0 cells (0 PI)
1400 00:41:01.055220 u1DelayCellOfst[4]=5 cells (5 PI)
1401 00:41:01.055268 u1DelayCellOfst[5]=3 cells (3 PI)
1402 00:41:01.055316 u1DelayCellOfst[6]=4 cells (4 PI)
1403 00:41:01.055376 u1DelayCellOfst[7]=5 cells (5 PI)
1404 00:41:01.055430 Byte0, DQ PI dly=985, DQM PI dly= 988
1405 00:41:01.055478 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1406 00:41:01.055526
1407 00:41:01.055574 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1408 00:41:01.055622
1409 00:41:01.055671 u1DelayCellOfst[8]=0 cells (0 PI)
1410 00:41:01.055719 u1DelayCellOfst[9]=1 cells (1 PI)
1411 00:41:01.055766 u1DelayCellOfst[10]=8 cells (7 PI)
1412 00:41:01.055813 u1DelayCellOfst[11]=1 cells (1 PI)
1413 00:41:01.055861 u1DelayCellOfst[12]=3 cells (3 PI)
1414 00:41:01.055938 u1DelayCellOfst[13]=3 cells (3 PI)
1415 00:41:01.055984 u1DelayCellOfst[14]=3 cells (3 PI)
1416 00:41:01.056031 u1DelayCellOfst[15]=8 cells (7 PI)
1417 00:41:01.056078 Byte1, DQ PI dly=977, DQM PI dly= 980
1418 00:41:01.056126 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1419 00:41:01.056174
1420 00:41:01.056222 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1421 00:41:01.056270
1422 00:41:01.056316 Write Rank0 MR14 =0x1e
1423 00:41:01.056365
1424 00:41:01.056412 Final TX Range 0 Vref 30
1425 00:41:01.056460
1426 00:41:01.056507 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1427 00:41:01.056555
1428 00:41:01.056602 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1429 00:41:01.056651 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1430 00:41:01.056700 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1431 00:41:01.056748 Write Rank0 MR3 =0xb0
1432 00:41:01.056796 DramC Write-DBI on
1433 00:41:01.056843 ==
1434 00:41:01.056891 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1435 00:41:01.056939 fsp= 1, odt_onoff= 1, Byte mode= 0
1436 00:41:01.056987 ==
1437 00:41:01.057036 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1438 00:41:01.057083
1439 00:41:01.057130 Begin, DQ Scan Range 700~764
1440 00:41:01.057178
1441 00:41:01.057224
1442 00:41:01.057271 TX Vref Scan disable
1443 00:41:01.057319 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1444 00:41:01.057369 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1445 00:41:01.057418 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1446 00:41:01.057489 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1447 00:41:01.057540 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1448 00:41:01.057589 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1449 00:41:01.057653 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1450 00:41:01.057716 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1451 00:41:01.057765 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1452 00:41:01.057814 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1453 00:41:01.057863 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1454 00:41:01.057912 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1455 00:41:01.057961 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1456 00:41:01.058066 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1457 00:41:01.058117 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1458 00:41:01.058166 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1459 00:41:01.058216 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1460 00:41:01.058265 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1461 00:41:01.058314 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1462 00:41:01.058363 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1463 00:41:01.058549 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1464 00:41:01.058663 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
1465 00:41:01.058736 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
1466 00:41:01.058787 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1467 00:41:01.058837 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1468 00:41:01.058886 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1469 00:41:01.058935 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1470 00:41:01.058984 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1471 00:41:01.059033 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1472 00:41:01.059082 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1473 00:41:01.059131 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1474 00:41:01.059181 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1475 00:41:01.059230 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
1476 00:41:01.059278 748 |2 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
1477 00:41:01.059327 Byte0, DQ PI dly=735, DQM PI dly= 735
1478 00:41:01.059375 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
1479 00:41:01.059424
1480 00:41:01.059472 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
1481 00:41:01.059520
1482 00:41:01.059567 Byte1, DQ PI dly=724, DQM PI dly= 724
1483 00:41:01.059615 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1484 00:41:01.059663
1485 00:41:01.059711 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1486 00:41:01.059759
1487 00:41:01.059806 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1488 00:41:01.059854 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1489 00:41:01.060096 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1490 00:41:01.060150 Write Rank0 MR3 =0x30
1491 00:41:01.060199 DramC Write-DBI off
1492 00:41:01.060247
1493 00:41:01.060295 [DATLAT]
1494 00:41:01.060342 Freq=1600, CH0 RK0, use_rxtx_scan=0
1495 00:41:01.060390
1496 00:41:01.060437 DATLAT Default: 0xf
1497 00:41:01.060485 7, 0xFFFF, sum=0
1498 00:41:01.060534 8, 0xFFFF, sum=0
1499 00:41:01.060582 9, 0xFFFF, sum=0
1500 00:41:01.060629 10, 0xFFFF, sum=0
1501 00:41:01.060677 11, 0xFFFF, sum=0
1502 00:41:01.060725 12, 0xFFFF, sum=0
1503 00:41:01.060773 13, 0xFFFF, sum=0
1504 00:41:01.060824 14, 0x0, sum=1
1505 00:41:01.060887 15, 0x0, sum=2
1506 00:41:01.060936 16, 0x0, sum=3
1507 00:41:01.060985 17, 0x0, sum=4
1508 00:41:01.061034 pattern=2 first_step=14 total pass=5 best_step=16
1509 00:41:01.061112 ==
1510 00:41:01.061160 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1511 00:41:01.061209 fsp= 1, odt_onoff= 1, Byte mode= 0
1512 00:41:01.061257 ==
1513 00:41:01.061305 Start DQ dly to find pass range UseTestEngine =1
1514 00:41:01.061354 x-axis: bit #, y-axis: DQ dly (-127~63)
1515 00:41:01.061403 RX Vref Scan = 1
1516 00:41:01.061451
1517 00:41:01.061498 RX Vref found, early break!
1518 00:41:01.061546
1519 00:41:01.061593 Final RX Vref 12, apply to both rank0 and 1
1520 00:41:01.061642 ==
1521 00:41:01.061690 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1522 00:41:01.061738 fsp= 1, odt_onoff= 1, Byte mode= 0
1523 00:41:01.061786 ==
1524 00:41:01.061833 DQS Delay:
1525 00:41:01.061880 DQS0 = 0, DQS1 = 0
1526 00:41:01.061927 DQM Delay:
1527 00:41:01.061974 DQM0 = 21, DQM1 = 20
1528 00:41:01.062066 DQ Delay:
1529 00:41:01.062114 DQ0 =23, DQ1 =22, DQ2 =24, DQ3 =17
1530 00:41:01.062163 DQ4 =23, DQ5 =19, DQ6 =20, DQ7 =23
1531 00:41:01.062211 DQ8 =17, DQ9 =18, DQ10 =25, DQ11 =18
1532 00:41:01.062259 DQ12 =20, DQ13 =19, DQ14 =21, DQ15 =22
1533 00:41:01.062307
1534 00:41:01.062354
1535 00:41:01.062402
1536 00:41:01.062448 [DramC_TX_OE_Calibration] TA2
1537 00:41:01.062496 Original DQ_B0 (3 6) =30, OEN = 27
1538 00:41:01.062543 Original DQ_B1 (3 6) =30, OEN = 27
1539 00:41:01.062591 23, 0x0, End_B0=23 End_B1=23
1540 00:41:01.062640 24, 0x0, End_B0=24 End_B1=24
1541 00:41:01.062688 25, 0x0, End_B0=25 End_B1=25
1542 00:41:01.062736 26, 0x0, End_B0=26 End_B1=26
1543 00:41:01.062784 27, 0x0, End_B0=27 End_B1=27
1544 00:41:01.062833 28, 0x0, End_B0=28 End_B1=28
1545 00:41:01.062881 29, 0x0, End_B0=29 End_B1=29
1546 00:41:01.062928 30, 0x0, End_B0=30 End_B1=30
1547 00:41:01.062977 31, 0xFFFF, End_B0=30 End_B1=30
1548 00:41:01.063026 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1549 00:41:01.063074 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1550 00:41:01.063122
1551 00:41:01.063168
1552 00:41:01.063215 Write Rank0 MR23 =0x3f
1553 00:41:01.063262 [DQSOSC]
1554 00:41:01.063309 [DQSOSCAuto] RK0, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
1555 00:41:01.063360 CH0_RK0: MR19=0x202, MR18=0xCECE, DQSOSC=438, MR23=63, INC=12, DEC=19
1556 00:41:01.063410 Write Rank0 MR23 =0x3f
1557 00:41:01.063458 [DQSOSC]
1558 00:41:01.063505 [DQSOSCAuto] RK0, (LSB)MR18= 0xcaca, (MSB)MR19= 0x202, tDQSOscB0 = 441 ps tDQSOscB1 = 441 ps
1559 00:41:01.063554 CH0 RK0: MR19=202, MR18=CACA
1560 00:41:01.063602 [RankSwap] Rank num 2, (Multi 1), Rank 1
1561 00:41:01.063649 Write Rank0 MR2 =0xad
1562 00:41:01.063695 [Write Leveling]
1563 00:41:01.063742 delay byte0 byte1 byte2 byte3
1564 00:41:01.063789
1565 00:41:01.063837 10 0 0
1566 00:41:01.063886 11 0 0
1567 00:41:01.063935 12 0 0
1568 00:41:01.063983 13 0 0
1569 00:41:01.064032 14 0 0
1570 00:41:01.064080 15 0 0
1571 00:41:01.064128 16 0 0
1572 00:41:01.064188 17 0 0
1573 00:41:01.064240 18 0 0
1574 00:41:01.064289 19 0 0
1575 00:41:01.064336 20 0 0
1576 00:41:01.064384 21 0 0
1577 00:41:01.064433 22 0 0
1578 00:41:01.064481 23 0 ff
1579 00:41:01.064529 24 0 ff
1580 00:41:01.064577 25 0 ff
1581 00:41:01.064625 26 0 ff
1582 00:41:01.064674 27 0 ff
1583 00:41:01.064721 28 0 ff
1584 00:41:01.064769 29 0 ff
1585 00:41:01.064817 30 0 ff
1586 00:41:01.064864 31 0 ff
1587 00:41:01.064912 32 0 ff
1588 00:41:01.064960 33 ff ff
1589 00:41:01.065008 34 ff ff
1590 00:41:01.065056 35 ff ff
1591 00:41:01.065105 36 ff ff
1592 00:41:01.065153 37 ff ff
1593 00:41:01.065201 38 ff ff
1594 00:41:01.065248 39 ff ff
1595 00:41:01.065296 pass bytecount = 0xff (0xff: all bytes pass)
1596 00:41:01.065348
1597 00:41:01.065395 DQS0 dly: 33
1598 00:41:01.065456 DQS1 dly: 23
1599 00:41:01.065506 Write Rank0 MR2 =0x2d
1600 00:41:01.065558 [RankSwap] Rank num 2, (Multi 1), Rank 0
1601 00:41:01.065619 Write Rank1 MR1 =0xd6
1602 00:41:01.065725 [Gating]
1603 00:41:01.065866 ==
1604 00:41:01.065961 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1605 00:41:01.066083 fsp= 1, odt_onoff= 1, Byte mode= 0
1606 00:41:01.066159 ==
1607 00:41:01.066236 3 1 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1608 00:41:01.066315 3 1 4 |3534 3636 |(11 11)(11 11) |(0 0)(0 0)| 0
1609 00:41:01.066393 3 1 8 |3534 3636 |(11 11)(0 0) |(0 0)(0 0)| 0
1610 00:41:01.066471 3 1 12 |3534 1c1b |(11 11)(11 11) |(1 1)(1 1)| 0
1611 00:41:01.066550 3 1 16 |3534 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
1612 00:41:01.066627 3 1 20 |3534 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
1613 00:41:01.066706 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1614 00:41:01.066783 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1615 00:41:01.066861 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1616 00:41:01.066939 3 2 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1617 00:41:01.067017 3 2 8 |3534 3535 |(11 11)(10 10) |(0 1)(0 0)| 0
1618 00:41:01.067095 3 2 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1619 00:41:01.067182 3 2 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1620 00:41:01.067262 3 2 20 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1621 00:41:01.067340 3 2 24 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1622 00:41:01.067418 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1623 00:41:01.067497 3 3 0 |3d3d 1b1a |(11 11)(11 11) |(1 1)(1 1)| 0
1624 00:41:01.067575 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1625 00:41:01.067653 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1626 00:41:01.067732 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1627 00:41:01.067810 3 3 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1628 00:41:01.067888 3 3 20 |201 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1629 00:41:01.067966 3 3 24 |3534 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1630 00:41:01.068044 [Byte 0] Lead/lag Transition tap number (1)
1631 00:41:01.068120 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1632 00:41:01.068197 [Byte 1] Lead/lag Transition tap number (1)
1633 00:41:01.068468 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1634 00:41:01.068553 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1635 00:41:01.068633 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1636 00:41:01.068712 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
1637 00:41:01.068790 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1638 00:41:01.068869 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(0 1)| 0
1639 00:41:01.068947 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1640 00:41:01.069025 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1641 00:41:01.069104 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1642 00:41:01.069182 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1643 00:41:01.069260 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1644 00:41:01.069337 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1645 00:41:01.069415 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1646 00:41:01.069493 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1647 00:41:01.069571 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1648 00:41:01.069649 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1649 00:41:01.069727 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1650 00:41:01.069805 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1651 00:41:01.069883 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1652 00:41:01.069959 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1653 00:41:01.070079 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1654 00:41:01.070156 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1655 00:41:01.070234 [Byte 0] Lead/lag Transition tap number (3)
1656 00:41:01.070309 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1657 00:41:01.070387 [Byte 1] Lead/lag Transition tap number (3)
1658 00:41:01.070462 3 6 20 |606 1413 |(11 11)(11 11) |(0 0)(0 0)| 0
1659 00:41:01.070540 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1660 00:41:01.070617 [Byte 0]First pass (3, 6, 24)
1661 00:41:01.070692 [Byte 1]First pass (3, 6, 24)
1662 00:41:01.070768 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1663 00:41:01.070848 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1664 00:41:01.070926 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1665 00:41:01.071004 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1666 00:41:01.071082 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1667 00:41:01.071159 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1668 00:41:01.071237 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1669 00:41:01.071315 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1670 00:41:01.071392 All bytes gating window > 1UI, Early break!
1671 00:41:01.071467
1672 00:41:01.071542 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1673 00:41:01.071617
1674 00:41:01.071692 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1675 00:41:01.071767
1676 00:41:01.071842
1677 00:41:01.071916
1678 00:41:01.071991 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1679 00:41:01.072066
1680 00:41:01.072141 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1681 00:41:01.072216
1682 00:41:01.072290
1683 00:41:01.072364 Write Rank1 MR1 =0x56
1684 00:41:01.072442
1685 00:41:01.072501 best RODT dly(2T, 0.5T) = (2, 3)
1686 00:41:01.072550
1687 00:41:01.072598 best RODT dly(2T, 0.5T) = (2, 3)
1688 00:41:01.072645 ==
1689 00:41:01.072694 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1690 00:41:01.072742 fsp= 1, odt_onoff= 1, Byte mode= 0
1691 00:41:01.072789 ==
1692 00:41:01.072837 Start DQ dly to find pass range UseTestEngine =0
1693 00:41:01.072886 x-axis: bit #, y-axis: DQ dly (-127~63)
1694 00:41:01.072933 RX Vref Scan = 0
1695 00:41:01.072981 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1696 00:41:01.073030 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1697 00:41:01.073078 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1698 00:41:01.073127 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1699 00:41:01.073175 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1700 00:41:01.073223 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1701 00:41:01.073272 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1702 00:41:01.073320 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1703 00:41:01.073369 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1704 00:41:01.073417 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1705 00:41:01.073465 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1706 00:41:01.073513 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1707 00:41:01.073562 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1708 00:41:01.073610 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1709 00:41:01.073659 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1710 00:41:01.073707 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1711 00:41:01.073756 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1712 00:41:01.073805 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1713 00:41:01.073854 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1714 00:41:01.073902 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1715 00:41:01.073950 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1716 00:41:01.074041 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1717 00:41:01.074092 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1718 00:41:01.074140 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1719 00:41:01.074189 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1720 00:41:01.074238 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1721 00:41:01.074286 0, [0] xxxxxxxx xxxxxxxx [MSB]
1722 00:41:01.074334 1, [0] xxxxxxxx xxxxxxxx [MSB]
1723 00:41:01.074383 2, [0] xxxoxxxx oxxxxxxx [MSB]
1724 00:41:01.074431 3, [0] xxxoxxxx oxxoxxxx [MSB]
1725 00:41:01.074479 4, [0] xxxoxoox oxxoxxxx [MSB]
1726 00:41:01.074527 5, [0] xxxoxoox ooxoxxxx [MSB]
1727 00:41:01.074577 6, [0] xxxoxooo ooxoxxxx [MSB]
1728 00:41:01.074625 7, [0] xooooooo ooxoooox [MSB]
1729 00:41:01.074673 8, [0] oooooooo ooxoooox [MSB]
1730 00:41:01.074721 9, [0] oooooooo ooxooooo [MSB]
1731 00:41:01.074770 10, [0] oooooooo ooxooooo [MSB]
1732 00:41:01.074818 32, [0] oooooooo oooooooo [MSB]
1733 00:41:01.074866 33, [0] oooxoooo xooooooo [MSB]
1734 00:41:01.074915 34, [0] oooxoooo xooooooo [MSB]
1735 00:41:01.074963 35, [0] oooxoooo xooxoooo [MSB]
1736 00:41:01.075011 36, [0] oooxooxo xxoxxooo [MSB]
1737 00:41:01.075059 37, [0] oooxoxxo xxoxxxoo [MSB]
1738 00:41:01.075108 38, [0] oooxoxxo xxoxxxxo [MSB]
1739 00:41:01.075157 39, [0] oooxoxxx xxoxxxxo [MSB]
1740 00:41:01.075205 40, [0] oxoxxxxx xxoxxxxo [MSB]
1741 00:41:01.075253 41, [0] xxxxxxxx xxoxxxxx [MSB]
1742 00:41:01.075301 42, [0] xxxxxxxx xxoxxxxx [MSB]
1743 00:41:01.075349 43, [0] xxxxxxxx xxoxxxxx [MSB]
1744 00:41:01.075397 44, [0] xxxxxxxx xxxxxxxx [MSB]
1745 00:41:01.075446 iDelay=44, Bit 0, Center 24 (8 ~ 40) 33
1746 00:41:01.075494 iDelay=44, Bit 1, Center 23 (7 ~ 39) 33
1747 00:41:01.075542 iDelay=44, Bit 2, Center 23 (7 ~ 40) 34
1748 00:41:01.075779 iDelay=44, Bit 3, Center 17 (2 ~ 32) 31
1749 00:41:01.075835 iDelay=44, Bit 4, Center 23 (7 ~ 39) 33
1750 00:41:01.075885 iDelay=44, Bit 5, Center 20 (4 ~ 36) 33
1751 00:41:01.075934 iDelay=44, Bit 6, Center 19 (4 ~ 35) 32
1752 00:41:01.075982 iDelay=44, Bit 7, Center 22 (6 ~ 38) 33
1753 00:41:01.076030 iDelay=44, Bit 8, Center 17 (2 ~ 32) 31
1754 00:41:01.076078 iDelay=44, Bit 9, Center 20 (5 ~ 35) 31
1755 00:41:01.076126 iDelay=44, Bit 10, Center 27 (11 ~ 43) 33
1756 00:41:01.076174 iDelay=44, Bit 11, Center 18 (3 ~ 34) 32
1757 00:41:01.076222 iDelay=44, Bit 12, Center 21 (7 ~ 35) 29
1758 00:41:01.076269 iDelay=44, Bit 13, Center 21 (7 ~ 36) 30
1759 00:41:01.076318 iDelay=44, Bit 14, Center 22 (7 ~ 37) 31
1760 00:41:01.076366 iDelay=44, Bit 15, Center 24 (9 ~ 40) 32
1761 00:41:01.076413 ==
1762 00:41:01.076461 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1763 00:41:01.076510 fsp= 1, odt_onoff= 1, Byte mode= 0
1764 00:41:01.076557 ==
1765 00:41:01.076605 DQS Delay:
1766 00:41:01.076652 DQS0 = 0, DQS1 = 0
1767 00:41:01.076699 DQM Delay:
1768 00:41:01.076746 DQM0 = 21, DQM1 = 21
1769 00:41:01.076796 DQ Delay:
1770 00:41:01.076844 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =17
1771 00:41:01.076891 DQ4 =23, DQ5 =20, DQ6 =19, DQ7 =22
1772 00:41:01.076939 DQ8 =17, DQ9 =20, DQ10 =27, DQ11 =18
1773 00:41:01.076988 DQ12 =21, DQ13 =21, DQ14 =22, DQ15 =24
1774 00:41:01.077035
1775 00:41:01.077082
1776 00:41:01.077128 DramC Write-DBI off
1777 00:41:01.077176 ==
1778 00:41:01.077223 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1779 00:41:01.077271 fsp= 1, odt_onoff= 1, Byte mode= 0
1780 00:41:01.077318 ==
1781 00:41:01.077366 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1782 00:41:01.077414
1783 00:41:01.077461 Begin, DQ Scan Range 919~1175
1784 00:41:01.077509
1785 00:41:01.077556
1786 00:41:01.077603 TX Vref Scan disable
1787 00:41:01.077651 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1788 00:41:01.077702 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1789 00:41:01.077750 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1790 00:41:01.077799 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1791 00:41:01.077849 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1792 00:41:01.077898 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1793 00:41:01.077947 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1794 00:41:01.078040 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1795 00:41:01.078092 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1796 00:41:01.078140 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1797 00:41:01.078189 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1798 00:41:01.078238 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1799 00:41:01.078286 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1800 00:41:01.078335 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1801 00:41:01.078386 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1802 00:41:01.078435 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1803 00:41:01.078483 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1804 00:41:01.078532 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1805 00:41:01.078580 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1806 00:41:01.078629 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1807 00:41:01.078678 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1808 00:41:01.078726 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1809 00:41:01.078774 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1810 00:41:01.078822 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1811 00:41:01.078871 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1812 00:41:01.078919 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1813 00:41:01.078967 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1814 00:41:01.079016 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1815 00:41:01.079064 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1816 00:41:01.079112 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1817 00:41:01.079160 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1818 00:41:01.079209 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1819 00:41:01.079257 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1820 00:41:01.079305 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1821 00:41:01.079354 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1822 00:41:01.079402 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1823 00:41:01.079451 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1824 00:41:01.079499 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1825 00:41:01.079548 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1826 00:41:01.079595 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1827 00:41:01.079644 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1828 00:41:01.079692 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1829 00:41:01.079740 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1830 00:41:01.079788 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1831 00:41:01.079837 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1832 00:41:01.079885 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1833 00:41:01.079933 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1834 00:41:01.079982 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1835 00:41:01.080029 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1836 00:41:01.080077 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1837 00:41:01.080126 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1838 00:41:01.080174 970 |3 6 10|[0] xxxxxxxx ooxoooxx [MSB]
1839 00:41:01.080223 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1840 00:41:01.080272 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1841 00:41:01.080320 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1842 00:41:01.080368 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1843 00:41:01.080417 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1844 00:41:01.080469 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1845 00:41:01.080519 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1846 00:41:01.080567 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1847 00:41:01.080644 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
1848 00:41:01.080703 980 |3 6 20|[0] xxxoxoox oooooooo [MSB]
1849 00:41:01.080759 981 |3 6 21|[0] xoxoooox oooooooo [MSB]
1850 00:41:01.080810 982 |3 6 22|[0] xoxooooo oooooooo [MSB]
1851 00:41:01.080862 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1852 00:41:01.080912 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1853 00:41:01.080960 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1854 00:41:01.081009 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1855 00:41:01.081057 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1856 00:41:01.081106 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1857 00:41:01.081154 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1858 00:41:01.081203 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1859 00:41:01.081251 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1860 00:41:01.081487 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1861 00:41:01.081542 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1862 00:41:01.081591 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1863 00:41:01.081640 1000 |3 6 40|[0] oooxoxxx xxxxxxxx [MSB]
1864 00:41:01.081689 1001 |3 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1865 00:41:01.081738 Byte0, DQ PI dly=989, DQM PI dly= 989
1866 00:41:01.081786 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
1867 00:41:01.081834
1868 00:41:01.081882 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
1869 00:41:01.081930
1870 00:41:01.081977 Byte1, DQ PI dly=979, DQM PI dly= 979
1871 00:41:01.082068 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1872 00:41:01.082116
1873 00:41:01.082163 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1874 00:41:01.082218
1875 00:41:01.082265 ==
1876 00:41:01.082313 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1877 00:41:01.082362 fsp= 1, odt_onoff= 1, Byte mode= 0
1878 00:41:01.082410 ==
1879 00:41:01.082457 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1880 00:41:01.082505
1881 00:41:01.082553 Begin, DQ Scan Range 955~1019
1882 00:41:01.082600 Write Rank1 MR14 =0x0
1883 00:41:01.082647
1884 00:41:01.082694 CH=0, VrefRange= 0, VrefLevel = 0
1885 00:41:01.082741 TX Bit0 (985~998) 14 991, Bit8 (969~982) 14 975,
1886 00:41:01.082790 TX Bit1 (984~995) 12 989, Bit9 (972~984) 13 978,
1887 00:41:01.082838 TX Bit2 (985~996) 12 990, Bit10 (977~989) 13 983,
1888 00:41:01.082886 TX Bit3 (980~988) 9 984, Bit11 (972~982) 11 977,
1889 00:41:01.082934 TX Bit4 (984~996) 13 990, Bit12 (973~984) 12 978,
1890 00:41:01.082982 TX Bit5 (981~993) 13 987, Bit13 (974~984) 11 979,
1891 00:41:01.083030 TX Bit6 (981~994) 14 987, Bit14 (974~986) 13 980,
1892 00:41:01.083077 TX Bit7 (985~994) 10 989, Bit15 (977~989) 13 983,
1893 00:41:01.083124
1894 00:41:01.083171 Write Rank1 MR14 =0x2
1895 00:41:01.083219
1896 00:41:01.083266 CH=0, VrefRange= 0, VrefLevel = 2
1897 00:41:01.083314 TX Bit0 (985~998) 14 991, Bit8 (969~983) 15 976,
1898 00:41:01.083362 TX Bit1 (984~996) 13 990, Bit9 (972~986) 15 979,
1899 00:41:01.083411 TX Bit2 (985~997) 13 991, Bit10 (977~990) 14 983,
1900 00:41:01.083459 TX Bit3 (979~989) 11 984, Bit11 (971~982) 12 976,
1901 00:41:01.083507 TX Bit4 (983~996) 14 989, Bit12 (973~985) 13 979,
1902 00:41:01.083555 TX Bit5 (981~993) 13 987, Bit13 (973~985) 13 979,
1903 00:41:01.083603 TX Bit6 (981~994) 14 987, Bit14 (973~987) 15 980,
1904 00:41:01.083650 TX Bit7 (985~994) 10 989, Bit15 (976~990) 15 983,
1905 00:41:01.083698
1906 00:41:01.083745 Write Rank1 MR14 =0x4
1907 00:41:01.083792
1908 00:41:01.083839 CH=0, VrefRange= 0, VrefLevel = 4
1909 00:41:01.083886 TX Bit0 (985~999) 15 992, Bit8 (969~983) 15 976,
1910 00:41:01.083934 TX Bit1 (983~996) 14 989, Bit9 (972~986) 15 979,
1911 00:41:01.083981 TX Bit2 (985~998) 14 991, Bit10 (976~991) 16 983,
1912 00:41:01.084028 TX Bit3 (979~991) 13 985, Bit11 (970~983) 14 976,
1913 00:41:01.084076 TX Bit4 (983~997) 15 990, Bit12 (973~985) 13 979,
1914 00:41:01.084124 TX Bit5 (980~994) 15 987, Bit13 (973~986) 14 979,
1915 00:41:01.084172 TX Bit6 (982~995) 14 988, Bit14 (973~988) 16 980,
1916 00:41:01.084220 TX Bit7 (984~995) 12 989, Bit15 (976~990) 15 983,
1917 00:41:01.084267
1918 00:41:01.084330 Write Rank1 MR14 =0x6
1919 00:41:01.084391
1920 00:41:01.084442 CH=0, VrefRange= 0, VrefLevel = 6
1921 00:41:01.084491 TX Bit0 (985~1000) 16 992, Bit8 (969~984) 16 976,
1922 00:41:01.084538 TX Bit1 (983~998) 16 990, Bit9 (971~988) 18 979,
1923 00:41:01.084586 TX Bit2 (984~999) 16 991, Bit10 (975~991) 17 983,
1924 00:41:01.084635 TX Bit3 (979~992) 14 985, Bit11 (970~983) 14 976,
1925 00:41:01.084683 TX Bit4 (982~998) 17 990, Bit12 (972~986) 15 979,
1926 00:41:01.084731 TX Bit5 (980~994) 15 987, Bit13 (973~987) 15 980,
1927 00:41:01.084779 TX Bit6 (980~995) 16 987, Bit14 (973~989) 17 981,
1928 00:41:01.084827 TX Bit7 (984~996) 13 990, Bit15 (976~991) 16 983,
1929 00:41:01.084875
1930 00:41:01.084921 Write Rank1 MR14 =0x8
1931 00:41:01.084968
1932 00:41:01.085023 CH=0, VrefRange= 0, VrefLevel = 8
1933 00:41:01.085110 TX Bit0 (984~1001) 18 992, Bit8 (968~984) 17 976,
1934 00:41:01.085159 TX Bit1 (983~998) 16 990, Bit9 (971~988) 18 979,
1935 00:41:01.085221 TX Bit2 (985~1000) 16 992, Bit10 (976~992) 17 984,
1936 00:41:01.085283 TX Bit3 (979~992) 14 985, Bit11 (970~983) 14 976,
1937 00:41:01.085331 TX Bit4 (982~998) 17 990, Bit12 (972~988) 17 980,
1938 00:41:01.085379 TX Bit5 (980~995) 16 987, Bit13 (972~988) 17 980,
1939 00:41:01.085426 TX Bit6 (980~996) 17 988, Bit14 (973~989) 17 981,
1940 00:41:01.085488 TX Bit7 (983~996) 14 989, Bit15 (976~991) 16 983,
1941 00:41:01.085550
1942 00:41:01.085598 Write Rank1 MR14 =0xa
1943 00:41:01.085645
1944 00:41:01.085692 CH=0, VrefRange= 0, VrefLevel = 10
1945 00:41:01.085739 TX Bit0 (985~1001) 17 993, Bit8 (968~984) 17 976,
1946 00:41:01.085787 TX Bit1 (983~999) 17 991, Bit9 (970~988) 19 979,
1947 00:41:01.085834 TX Bit2 (984~1000) 17 992, Bit10 (975~992) 18 983,
1948 00:41:01.085881 TX Bit3 (978~993) 16 985, Bit11 (969~984) 16 976,
1949 00:41:01.085928 TX Bit4 (982~999) 18 990, Bit12 (971~988) 18 979,
1950 00:41:01.085976 TX Bit5 (980~995) 16 987, Bit13 (972~988) 17 980,
1951 00:41:01.086066 TX Bit6 (980~997) 18 988, Bit14 (972~990) 19 981,
1952 00:41:01.086114 TX Bit7 (983~997) 15 990, Bit15 (975~992) 18 983,
1953 00:41:01.086162
1954 00:41:01.086209 Write Rank1 MR14 =0xc
1955 00:41:01.086258
1956 00:41:01.086304 CH=0, VrefRange= 0, VrefLevel = 12
1957 00:41:01.086352 TX Bit0 (984~1002) 19 993, Bit8 (968~985) 18 976,
1958 00:41:01.086400 TX Bit1 (982~1000) 19 991, Bit9 (969~989) 21 979,
1959 00:41:01.086449 TX Bit2 (983~1001) 19 992, Bit10 (975~992) 18 983,
1960 00:41:01.086497 TX Bit3 (979~993) 15 986, Bit11 (969~985) 17 977,
1961 00:41:01.086546 TX Bit4 (981~1000) 20 990, Bit12 (971~988) 18 979,
1962 00:41:01.086593 TX Bit5 (980~996) 17 988, Bit13 (971~988) 18 979,
1963 00:41:01.086641 TX Bit6 (980~997) 18 988, Bit14 (972~990) 19 981,
1964 00:41:01.086688 TX Bit7 (983~998) 16 990, Bit15 (975~992) 18 983,
1965 00:41:01.086736
1966 00:41:01.086783 Write Rank1 MR14 =0xe
1967 00:41:01.086830
1968 00:41:01.087065 CH=0, VrefRange= 0, VrefLevel = 14
1969 00:41:01.087119 TX Bit0 (983~1002) 20 992, Bit8 (968~986) 19 977,
1970 00:41:01.087168 TX Bit1 (981~1000) 20 990, Bit9 (970~989) 20 979,
1971 00:41:01.087216 TX Bit2 (983~1001) 19 992, Bit10 (974~993) 20 983,
1972 00:41:01.087264 TX Bit3 (978~993) 16 985, Bit11 (968~985) 18 976,
1973 00:41:01.087312 TX Bit4 (980~1001) 22 990, Bit12 (970~989) 20 979,
1974 00:41:01.234335 TX Bit5 (979~996) 18 987, Bit13 (971~989) 19 980,
1975 00:41:01.234769 TX Bit6 (980~998) 19 989, Bit14 (971~990) 20 980,
1976 00:41:01.235080 TX Bit7 (982~999) 18 990, Bit15 (975~992) 18 983,
1977 00:41:01.235364
1978 00:41:01.235634 Write Rank1 MR14 =0x10
1979 00:41:01.235911
1980 00:41:01.236176 CH=0, VrefRange= 0, VrefLevel = 16
1981 00:41:01.236432 TX Bit0 (984~1003) 20 993, Bit8 (968~987) 20 977,
1982 00:41:01.236689 TX Bit1 (982~1001) 20 991, Bit9 (969~989) 21 979,
1983 00:41:01.236948 TX Bit2 (983~1002) 20 992, Bit10 (975~993) 19 984,
1984 00:41:01.237204 TX Bit3 (978~994) 17 986, Bit11 (968~986) 19 977,
1985 00:41:01.237460 TX Bit4 (981~1001) 21 991, Bit12 (970~989) 20 979,
1986 00:41:01.237714 TX Bit5 (979~997) 19 988, Bit13 (970~989) 20 979,
1987 00:41:01.237966 TX Bit6 (979~999) 21 989, Bit14 (971~991) 21 981,
1988 00:41:01.238278 TX Bit7 (981~999) 19 990, Bit15 (975~993) 19 984,
1989 00:41:01.238533
1990 00:41:01.238779 Write Rank1 MR14 =0x12
1991 00:41:01.239026
1992 00:41:01.239276 CH=0, VrefRange= 0, VrefLevel = 18
1993 00:41:01.239529 TX Bit0 (982~1004) 23 993, Bit8 (967~987) 21 977,
1994 00:41:01.239784 TX Bit1 (982~1002) 21 992, Bit9 (969~990) 22 979,
1995 00:41:01.240136 TX Bit2 (984~1002) 19 993, Bit10 (974~994) 21 984,
1996 00:41:01.240480 TX Bit3 (978~994) 17 986, Bit11 (968~987) 20 977,
1997 00:41:01.240857 TX Bit4 (980~1002) 23 991, Bit12 (969~990) 22 979,
1998 00:41:01.241172 TX Bit5 (979~998) 20 988, Bit13 (970~990) 21 980,
1999 00:41:01.241452 TX Bit6 (979~999) 21 989, Bit14 (971~991) 21 981,
2000 00:41:01.241713 TX Bit7 (981~1000) 20 990, Bit15 (974~993) 20 983,
2001 00:41:01.242036
2002 00:41:01.242404 Write Rank1 MR14 =0x14
2003 00:41:01.242765
2004 00:41:01.243029 CH=0, VrefRange= 0, VrefLevel = 20
2005 00:41:01.243286 TX Bit0 (982~1004) 23 993, Bit8 (967~988) 22 977,
2006 00:41:01.243540 TX Bit1 (981~1002) 22 991, Bit9 (968~990) 23 979,
2007 00:41:01.243793 TX Bit2 (982~1003) 22 992, Bit10 (974~995) 22 984,
2008 00:41:01.244045 TX Bit3 (978~994) 17 986, Bit11 (968~988) 21 978,
2009 00:41:01.244295 TX Bit4 (980~1002) 23 991, Bit12 (969~990) 22 979,
2010 00:41:01.244545 TX Bit5 (979~998) 20 988, Bit13 (970~990) 21 980,
2011 00:41:01.244801 TX Bit6 (979~1000) 22 989, Bit14 (970~992) 23 981,
2012 00:41:01.245055 TX Bit7 (981~1001) 21 991, Bit15 (974~994) 21 984,
2013 00:41:01.245305
2014 00:41:01.245553 Write Rank1 MR14 =0x16
2015 00:41:01.245868
2016 00:41:01.246192 CH=0, VrefRange= 0, VrefLevel = 22
2017 00:41:01.246455 TX Bit0 (982~1005) 24 993, Bit8 (967~989) 23 978,
2018 00:41:01.246707 TX Bit1 (981~1003) 23 992, Bit9 (968~990) 23 979,
2019 00:41:01.246916 TX Bit2 (982~1004) 23 993, Bit10 (973~995) 23 984,
2020 00:41:01.247096 TX Bit3 (977~995) 19 986, Bit11 (967~988) 22 977,
2021 00:41:01.247277 TX Bit4 (980~1003) 24 991, Bit12 (969~990) 22 979,
2022 00:41:01.247456 TX Bit5 (979~998) 20 988, Bit13 (969~990) 22 979,
2023 00:41:01.247635 TX Bit6 (979~1001) 23 990, Bit14 (970~992) 23 981,
2024 00:41:01.247813 TX Bit7 (981~1001) 21 991, Bit15 (973~994) 22 983,
2025 00:41:01.247992
2026 00:41:01.248169 Write Rank1 MR14 =0x18
2027 00:41:01.248345
2028 00:41:01.248522 CH=0, VrefRange= 0, VrefLevel = 24
2029 00:41:01.248701 TX Bit0 (982~1005) 24 993, Bit8 (967~989) 23 978,
2030 00:41:01.248880 TX Bit1 (981~1003) 23 992, Bit9 (968~990) 23 979,
2031 00:41:01.249060 TX Bit2 (981~1004) 24 992, Bit10 (973~996) 24 984,
2032 00:41:01.249242 TX Bit3 (977~995) 19 986, Bit11 (967~989) 23 978,
2033 00:41:01.249421 TX Bit4 (980~1003) 24 991, Bit12 (969~990) 22 979,
2034 00:41:01.249601 TX Bit5 (979~999) 21 989, Bit13 (969~990) 22 979,
2035 00:41:01.249778 TX Bit6 (979~1001) 23 990, Bit14 (969~992) 24 980,
2036 00:41:01.250026 TX Bit7 (981~1002) 22 991, Bit15 (974~995) 22 984,
2037 00:41:01.250219
2038 00:41:01.250398 Write Rank1 MR14 =0x1a
2039 00:41:01.250577
2040 00:41:01.250755 CH=0, VrefRange= 0, VrefLevel = 26
2041 00:41:01.250935 TX Bit0 (981~1006) 26 993, Bit8 (967~990) 24 978,
2042 00:41:01.251114 TX Bit1 (980~1004) 25 992, Bit9 (968~991) 24 979,
2043 00:41:01.251293 TX Bit2 (980~1005) 26 992, Bit10 (973~996) 24 984,
2044 00:41:01.251472 TX Bit3 (977~996) 20 986, Bit11 (967~989) 23 978,
2045 00:41:01.251660 TX Bit4 (979~1004) 26 991, Bit12 (968~991) 24 979,
2046 00:41:01.251852 TX Bit5 (978~999) 22 988, Bit13 (969~991) 23 980,
2047 00:41:01.251990 TX Bit6 (979~1001) 23 990, Bit14 (969~992) 24 980,
2048 00:41:01.252125 TX Bit7 (980~1002) 23 991, Bit15 (972~996) 25 984,
2049 00:41:01.252258
2050 00:41:01.252392 Write Rank1 MR14 =0x1c
2051 00:41:01.252525
2052 00:41:01.252658 CH=0, VrefRange= 0, VrefLevel = 28
2053 00:41:01.252792 TX Bit0 (981~1006) 26 993, Bit8 (966~990) 25 978,
2054 00:41:01.252925 TX Bit1 (980~1004) 25 992, Bit9 (968~990) 23 979,
2055 00:41:01.253060 TX Bit2 (981~1006) 26 993, Bit10 (973~996) 24 984,
2056 00:41:01.253195 TX Bit3 (977~996) 20 986, Bit11 (967~990) 24 978,
2057 00:41:01.253330 TX Bit4 (980~1004) 25 992, Bit12 (968~991) 24 979,
2058 00:41:01.253464 TX Bit5 (978~1000) 23 989, Bit13 (968~991) 24 979,
2059 00:41:01.253597 TX Bit6 (979~1002) 24 990, Bit14 (969~992) 24 980,
2060 00:41:01.253732 TX Bit7 (980~1003) 24 991, Bit15 (972~996) 25 984,
2061 00:41:01.253867
2062 00:41:01.254024 Write Rank1 MR14 =0x1e
2063 00:41:01.254169
2064 00:41:01.254304 CH=0, VrefRange= 0, VrefLevel = 30
2065 00:41:01.254438 TX Bit0 (982~1006) 25 994, Bit8 (967~989) 23 978,
2066 00:41:01.254574 TX Bit1 (980~1004) 25 992, Bit9 (968~991) 24 979,
2067 00:41:01.254973 TX Bit2 (981~1005) 25 993, Bit10 (973~996) 24 984,
2068 00:41:01.255129 TX Bit3 (977~997) 21 987, Bit11 (967~990) 24 978,
2069 00:41:01.255268 TX Bit4 (981~1005) 25 993, Bit12 (968~991) 24 979,
2070 00:41:01.255404 TX Bit5 (978~1000) 23 989, Bit13 (968~991) 24 979,
2071 00:41:01.255540 TX Bit6 (979~1002) 24 990, Bit14 (969~993) 25 981,
2072 00:41:01.255676 TX Bit7 (980~1003) 24 991, Bit15 (972~996) 25 984,
2073 00:41:01.255812
2074 00:41:01.255946 Write Rank1 MR14 =0x20
2075 00:41:01.256081
2076 00:41:01.256215 CH=0, VrefRange= 0, VrefLevel = 32
2077 00:41:01.256349 TX Bit0 (982~1006) 25 994, Bit8 (967~989) 23 978,
2078 00:41:01.256484 TX Bit1 (980~1004) 25 992, Bit9 (968~991) 24 979,
2079 00:41:01.256617 TX Bit2 (981~1005) 25 993, Bit10 (973~996) 24 984,
2080 00:41:01.256751 TX Bit3 (977~997) 21 987, Bit11 (967~990) 24 978,
2081 00:41:01.256888 TX Bit4 (981~1005) 25 993, Bit12 (968~991) 24 979,
2082 00:41:01.256997 TX Bit5 (978~1000) 23 989, Bit13 (968~991) 24 979,
2083 00:41:01.257106 TX Bit6 (979~1002) 24 990, Bit14 (969~993) 25 981,
2084 00:41:01.257214 TX Bit7 (980~1003) 24 991, Bit15 (972~996) 25 984,
2085 00:41:01.257321
2086 00:41:01.257427 Write Rank1 MR14 =0x22
2087 00:41:01.257534
2088 00:41:01.257639 CH=0, VrefRange= 0, VrefLevel = 34
2089 00:41:01.257744 TX Bit0 (982~1006) 25 994, Bit8 (967~989) 23 978,
2090 00:41:01.257851 TX Bit1 (980~1004) 25 992, Bit9 (968~991) 24 979,
2091 00:41:01.257958 TX Bit2 (981~1005) 25 993, Bit10 (973~996) 24 984,
2092 00:41:01.258109 TX Bit3 (977~997) 21 987, Bit11 (967~990) 24 978,
2093 00:41:01.258220 TX Bit4 (981~1005) 25 993, Bit12 (968~991) 24 979,
2094 00:41:01.258328 TX Bit5 (978~1000) 23 989, Bit13 (968~991) 24 979,
2095 00:41:01.258438 TX Bit6 (979~1002) 24 990, Bit14 (969~993) 25 981,
2096 00:41:01.258548 TX Bit7 (980~1003) 24 991, Bit15 (972~996) 25 984,
2097 00:41:01.258656
2098 00:41:01.258763 Write Rank1 MR14 =0x24
2099 00:41:01.258869
2100 00:41:01.258977 CH=0, VrefRange= 0, VrefLevel = 36
2101 00:41:01.259086 TX Bit0 (982~1006) 25 994, Bit8 (967~989) 23 978,
2102 00:41:01.259195 TX Bit1 (980~1004) 25 992, Bit9 (968~991) 24 979,
2103 00:41:01.259304 TX Bit2 (981~1005) 25 993, Bit10 (973~996) 24 984,
2104 00:41:01.259412 TX Bit3 (977~997) 21 987, Bit11 (967~990) 24 978,
2105 00:41:01.259521 TX Bit4 (981~1005) 25 993, Bit12 (968~991) 24 979,
2106 00:41:01.259628 TX Bit5 (978~1000) 23 989, Bit13 (968~991) 24 979,
2107 00:41:01.259734 TX Bit6 (979~1002) 24 990, Bit14 (969~993) 25 981,
2108 00:41:01.259842 TX Bit7 (980~1003) 24 991, Bit15 (972~996) 25 984,
2109 00:41:01.259949
2110 00:41:01.260055
2111 00:41:01.260160 TX Vref found, early break! 353< 365
2112 00:41:01.260268 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
2113 00:41:01.260377 u1DelayCellOfst[0]=8 cells (7 PI)
2114 00:41:01.260485 u1DelayCellOfst[1]=5 cells (5 PI)
2115 00:41:01.260591 u1DelayCellOfst[2]=6 cells (6 PI)
2116 00:41:01.260697 u1DelayCellOfst[3]=0 cells (0 PI)
2117 00:41:01.260805 u1DelayCellOfst[4]=6 cells (6 PI)
2118 00:41:01.260911 u1DelayCellOfst[5]=2 cells (2 PI)
2119 00:41:01.261019 u1DelayCellOfst[6]=3 cells (3 PI)
2120 00:41:01.261126 u1DelayCellOfst[7]=4 cells (4 PI)
2121 00:41:01.261232 Byte0, DQ PI dly=987, DQM PI dly= 990
2122 00:41:01.261339 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2123 00:41:01.261447
2124 00:41:01.261555 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2125 00:41:01.261662
2126 00:41:01.261767 u1DelayCellOfst[8]=0 cells (0 PI)
2127 00:41:01.261875 u1DelayCellOfst[9]=1 cells (1 PI)
2128 00:41:01.261965 u1DelayCellOfst[10]=6 cells (6 PI)
2129 00:41:01.262071 u1DelayCellOfst[11]=0 cells (0 PI)
2130 00:41:01.262162 u1DelayCellOfst[12]=1 cells (1 PI)
2131 00:41:01.262252 u1DelayCellOfst[13]=1 cells (1 PI)
2132 00:41:01.262343 u1DelayCellOfst[14]=3 cells (3 PI)
2133 00:41:01.262433 u1DelayCellOfst[15]=6 cells (6 PI)
2134 00:41:01.262523 Byte1, DQ PI dly=978, DQM PI dly= 981
2135 00:41:01.262613 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2136 00:41:01.262702
2137 00:41:01.262790 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2138 00:41:01.262881
2139 00:41:01.262971 Write Rank1 MR14 =0x1e
2140 00:41:01.263060
2141 00:41:01.263149 Final TX Range 0 Vref 30
2142 00:41:01.263237
2143 00:41:01.263326 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2144 00:41:01.263418
2145 00:41:01.263508 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2146 00:41:01.263598 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2147 00:41:01.263690 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2148 00:41:01.263782 wait MRW command Rank1 MR3 =0xb0 fired (1)
2149 00:41:01.263872 Write Rank1 MR3 =0xb0
2150 00:41:01.263961 DramC Write-DBI on
2151 00:41:01.264051 ==
2152 00:41:01.264141 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2153 00:41:01.264232 fsp= 1, odt_onoff= 1, Byte mode= 0
2154 00:41:01.264322 ==
2155 00:41:01.264411 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2156 00:41:01.264501
2157 00:41:01.264589 Begin, DQ Scan Range 701~765
2158 00:41:01.264680
2159 00:41:01.264769
2160 00:41:01.264857 TX Vref Scan disable
2161 00:41:01.264947 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2162 00:41:01.265039 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2163 00:41:01.265131 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2164 00:41:01.265222 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2165 00:41:01.265314 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2166 00:41:01.265405 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2167 00:41:01.265497 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2168 00:41:01.265588 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2169 00:41:01.265679 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2170 00:41:01.265770 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2171 00:41:01.265860 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2172 00:41:01.265950 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2173 00:41:01.266067 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2174 00:41:01.266160 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2175 00:41:01.266252 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2176 00:41:01.266344 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2177 00:41:01.266436 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2178 00:41:01.266748 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2179 00:41:01.266859 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2180 00:41:01.266941 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2181 00:41:01.267021 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2182 00:41:01.267102 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2183 00:41:01.267181 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2184 00:41:01.267259 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2185 00:41:01.267338 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2186 00:41:01.267416 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2187 00:41:01.267494 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2188 00:41:01.267573 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2189 00:41:01.267652 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2190 00:41:01.267730 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2191 00:41:01.267808 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2192 00:41:01.267887 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2193 00:41:01.267967 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2194 00:41:01.268046 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2195 00:41:01.268125 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2196 00:41:01.268203 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2197 00:41:01.268281 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2198 00:41:01.268359 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2199 00:41:01.268438 Byte0, DQ PI dly=736, DQM PI dly= 736
2200 00:41:01.268515 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2201 00:41:01.268593
2202 00:41:01.268671 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2203 00:41:01.268748
2204 00:41:01.268823 Byte1, DQ PI dly=724, DQM PI dly= 724
2205 00:41:01.268900 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2206 00:41:01.268977
2207 00:41:01.269061 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2208 00:41:01.269150
2209 00:41:01.269229 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2210 00:41:01.269309 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2211 00:41:01.269389 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2212 00:41:01.269467 Write Rank1 MR3 =0x30
2213 00:41:01.269545 DramC Write-DBI off
2214 00:41:01.269623
2215 00:41:01.269701 [DATLAT]
2216 00:41:01.269780 Freq=1600, CH0 RK1, use_rxtx_scan=0
2217 00:41:01.269859
2218 00:41:01.269936 DATLAT Default: 0x10
2219 00:41:01.270031 7, 0xFFFF, sum=0
2220 00:41:01.270113 8, 0xFFFF, sum=0
2221 00:41:01.270194 9, 0xFFFF, sum=0
2222 00:41:01.270273 10, 0xFFFF, sum=0
2223 00:41:01.270352 11, 0xFFFF, sum=0
2224 00:41:01.270433 12, 0xFFFF, sum=0
2225 00:41:01.270512 13, 0xFFFF, sum=0
2226 00:41:01.270590 14, 0x0, sum=1
2227 00:41:01.270670 15, 0x0, sum=2
2228 00:41:01.270749 16, 0x0, sum=3
2229 00:41:01.270827 17, 0x0, sum=4
2230 00:41:01.270905 pattern=2 first_step=14 total pass=5 best_step=16
2231 00:41:01.270982 ==
2232 00:41:01.271060 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2233 00:41:01.271139 fsp= 1, odt_onoff= 1, Byte mode= 0
2234 00:41:01.271217 ==
2235 00:41:01.271296 Start DQ dly to find pass range UseTestEngine =1
2236 00:41:01.271375 x-axis: bit #, y-axis: DQ dly (-127~63)
2237 00:41:01.271453 RX Vref Scan = 0
2238 00:41:01.271530 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2239 00:41:01.271609 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2240 00:41:01.271689 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2241 00:41:01.271768 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2242 00:41:01.271858 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2243 00:41:01.271928 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2244 00:41:01.271997 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2245 00:41:01.272065 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2246 00:41:01.272134 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2247 00:41:01.272203 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2248 00:41:01.272272 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2249 00:41:01.272341 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2250 00:41:01.272411 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2251 00:41:01.272479 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2252 00:41:01.272548 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2253 00:41:01.272617 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2254 00:41:01.272686 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2255 00:41:01.272755 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2256 00:41:01.272825 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2257 00:41:01.272894 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2258 00:41:01.272962 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2259 00:41:01.273031 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2260 00:41:01.273100 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2261 00:41:01.273168 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2262 00:41:01.273236 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2263 00:41:01.273306 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2264 00:41:01.273375 0, [0] xxxxxxxx xxxxxxxx [MSB]
2265 00:41:01.273445 1, [0] xxxoxxxx xxxxxxxx [MSB]
2266 00:41:01.273514 2, [0] xxxoxxxx oxxxxxxx [MSB]
2267 00:41:01.273583 3, [0] xxxoxoxx oxxoxxxx [MSB]
2268 00:41:01.273653 4, [0] xxxoxoox oxxoxxxx [MSB]
2269 00:41:01.273722 5, [0] xxxoxoox ooxoxxxx [MSB]
2270 00:41:01.273791 6, [0] xxxoxoox ooxooxxx [MSB]
2271 00:41:01.273860 7, [0] xoxoxooo ooxooxox [MSB]
2272 00:41:01.273930 8, [0] xoxoxooo ooxoooox [MSB]
2273 00:41:01.274013 9, [0] oooooooo ooxoooox [MSB]
2274 00:41:01.274088 10, [0] oooooooo ooxooooo [MSB]
2275 00:41:01.274158 11, [0] oooooooo ooxooooo [MSB]
2276 00:41:01.274227 33, [0] oooxoooo xooxoooo [MSB]
2277 00:41:01.274296 34, [0] oooxoooo xooxoooo [MSB]
2278 00:41:01.274365 35, [0] oooxoxoo xxoxoxoo [MSB]
2279 00:41:01.274435 36, [0] oooxoxxo xxoxoxoo [MSB]
2280 00:41:01.274504 37, [0] oooxoxxo xxoxxxoo [MSB]
2281 00:41:01.274574 38, [0] oooxxxxx xxoxxxxo [MSB]
2282 00:41:01.274645 39, [0] oooxxxxx xxoxxxxx [MSB]
2283 00:41:01.274714 40, [0] xxxxxxxx xxoxxxxx [MSB]
2284 00:41:01.274783 41, [0] xxxxxxxx xxoxxxxx [MSB]
2285 00:41:01.274853 42, [0] xxxxxxxx xxxxxxxx [MSB]
2286 00:41:01.274923 iDelay=42, Bit 0, Center 24 (9 ~ 39) 31
2287 00:41:01.274992 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
2288 00:41:01.275061 iDelay=42, Bit 2, Center 24 (9 ~ 39) 31
2289 00:41:01.275172 iDelay=42, Bit 3, Center 16 (1 ~ 32) 32
2290 00:41:01.275245 iDelay=42, Bit 4, Center 23 (9 ~ 37) 29
2291 00:41:01.275316 iDelay=42, Bit 5, Center 18 (3 ~ 34) 32
2292 00:41:01.275386 iDelay=42, Bit 6, Center 19 (4 ~ 35) 32
2293 00:41:01.275455 iDelay=42, Bit 7, Center 22 (7 ~ 37) 31
2294 00:41:01.275523 iDelay=42, Bit 8, Center 17 (2 ~ 32) 31
2295 00:41:01.275591 iDelay=42, Bit 9, Center 19 (5 ~ 34) 30
2296 00:41:01.275659 iDelay=42, Bit 10, Center 26 (12 ~ 41) 30
2297 00:41:01.275729 iDelay=42, Bit 11, Center 17 (3 ~ 32) 30
2298 00:41:01.275797 iDelay=42, Bit 12, Center 21 (6 ~ 36) 31
2299 00:41:01.276070 iDelay=42, Bit 13, Center 21 (8 ~ 34) 27
2300 00:41:01.276147 iDelay=42, Bit 14, Center 22 (7 ~ 37) 31
2301 00:41:01.276219 iDelay=42, Bit 15, Center 24 (10 ~ 38) 29
2302 00:41:01.276288 ==
2303 00:41:01.276357 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2304 00:41:01.276427 fsp= 1, odt_onoff= 1, Byte mode= 0
2305 00:41:01.276497 ==
2306 00:41:01.276565 DQS Delay:
2307 00:41:01.276633 DQS0 = 0, DQS1 = 0
2308 00:41:01.276702 DQM Delay:
2309 00:41:01.276770 DQM0 = 21, DQM1 = 20
2310 00:41:01.276849 DQ Delay:
2311 00:41:01.276910 DQ0 =24, DQ1 =23, DQ2 =24, DQ3 =16
2312 00:41:01.276971 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =22
2313 00:41:01.277033 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17
2314 00:41:01.277095 DQ12 =21, DQ13 =21, DQ14 =22, DQ15 =24
2315 00:41:01.277157
2316 00:41:01.277216
2317 00:41:01.277275
2318 00:41:01.277335 [DramC_TX_OE_Calibration] TA2
2319 00:41:01.277396 Original DQ_B0 (3 6) =30, OEN = 27
2320 00:41:01.277458 Original DQ_B1 (3 6) =30, OEN = 27
2321 00:41:01.277519 23, 0x0, End_B0=23 End_B1=23
2322 00:41:01.277581 24, 0x0, End_B0=24 End_B1=24
2323 00:41:01.277642 25, 0x0, End_B0=25 End_B1=25
2324 00:41:01.277704 26, 0x0, End_B0=26 End_B1=26
2325 00:41:01.277766 27, 0x0, End_B0=27 End_B1=27
2326 00:41:01.277827 28, 0x0, End_B0=28 End_B1=28
2327 00:41:01.277889 29, 0x0, End_B0=29 End_B1=29
2328 00:41:01.277951 30, 0x0, End_B0=30 End_B1=30
2329 00:41:01.278035 31, 0xFFFF, End_B0=30 End_B1=30
2330 00:41:01.278101 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2331 00:41:01.278164 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2332 00:41:01.278226
2333 00:41:01.278286
2334 00:41:01.278346 Write Rank1 MR23 =0x3f
2335 00:41:01.278455 [DQSOSC]
2336 00:41:01.278538 [DQSOSCAuto] RK1, (LSB)MR18= 0xb9b9, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
2337 00:41:01.278604 CH0_RK1: MR19=0x202, MR18=0xB9B9, DQSOSC=451, MR23=63, INC=12, DEC=18
2338 00:41:01.278667 Write Rank1 MR23 =0x3f
2339 00:41:01.278728 [DQSOSC]
2340 00:41:01.278789 [DQSOSCAuto] RK1, (LSB)MR18= 0xb8b8, (MSB)MR19= 0x202, tDQSOscB0 = 452 ps tDQSOscB1 = 452 ps
2341 00:41:01.278851 CH0 RK1: MR19=202, MR18=B8B8
2342 00:41:01.278913 [RxdqsGatingPostProcess] freq 1600
2343 00:41:01.278975 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2344 00:41:01.279036 Rank: 0
2345 00:41:01.279097 best DQS0 dly(2T, 0.5T) = (2, 6)
2346 00:41:01.279159 best DQS1 dly(2T, 0.5T) = (2, 6)
2347 00:41:01.279221 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2348 00:41:01.279283 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2349 00:41:01.279343 Rank: 1
2350 00:41:01.279404 best DQS0 dly(2T, 0.5T) = (2, 6)
2351 00:41:01.279466 best DQS1 dly(2T, 0.5T) = (2, 6)
2352 00:41:01.279528 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2353 00:41:01.279589 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2354 00:41:01.279650 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2355 00:41:01.279712 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2356 00:41:01.279773 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2357 00:41:01.279835 Write Rank0 MR13 =0x59
2358 00:41:01.279896 ==
2359 00:41:01.279956 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2360 00:41:01.280018 fsp= 1, odt_onoff= 1, Byte mode= 0
2361 00:41:01.280079 ==
2362 00:41:01.280140 === u2Vref_new: 0x56 --> 0x3a
2363 00:41:01.280201 === u2Vref_new: 0x58 --> 0x58
2364 00:41:01.280262 === u2Vref_new: 0x5a --> 0x5a
2365 00:41:01.280322 === u2Vref_new: 0x5c --> 0x78
2366 00:41:01.280383 === u2Vref_new: 0x5e --> 0x7a
2367 00:41:01.280443 === u2Vref_new: 0x60 --> 0x90
2368 00:41:01.280504 [CA 0] Center 37 (12~63) winsize 52
2369 00:41:01.280564 [CA 1] Center 37 (11~63) winsize 53
2370 00:41:01.280625 [CA 2] Center 35 (7~63) winsize 57
2371 00:41:01.280685 [CA 3] Center 35 (7~63) winsize 57
2372 00:41:01.280746 [CA 4] Center 34 (6~63) winsize 58
2373 00:41:01.280807 [CA 5] Center 29 (0~58) winsize 59
2374 00:41:01.280867
2375 00:41:01.280928 [CATrainingPosCal] consider 1 rank data
2376 00:41:01.280989 u2DelayCellTimex100 = 844/100 ps
2377 00:41:01.281050 CA0 delay=37 (12~63),Diff = 8 PI (9 cell)
2378 00:41:01.281111 CA1 delay=37 (11~63),Diff = 8 PI (9 cell)
2379 00:41:01.281171 CA2 delay=35 (7~63),Diff = 6 PI (6 cell)
2380 00:41:01.281232 CA3 delay=35 (7~63),Diff = 6 PI (6 cell)
2381 00:41:01.281293 CA4 delay=34 (6~63),Diff = 5 PI (5 cell)
2382 00:41:01.281354 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2383 00:41:01.281414
2384 00:41:01.281474 CA PerBit enable=1, Macro0, CA PI delay=29
2385 00:41:01.281536 === u2Vref_new: 0x60 --> 0x90
2386 00:41:01.281596
2387 00:41:01.281656 Vref(ca) range 1: 32
2388 00:41:01.281716
2389 00:41:01.281820 CS Dly= 10 (41-0-32)
2390 00:41:01.281914 Write Rank0 MR13 =0xd8
2391 00:41:01.282015 Write Rank0 MR13 =0xd8
2392 00:41:01.282075 Write Rank0 MR12 =0x60
2393 00:41:01.282132 Write Rank1 MR13 =0x59
2394 00:41:01.282186 ==
2395 00:41:01.282241 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2396 00:41:01.282297 fsp= 1, odt_onoff= 1, Byte mode= 0
2397 00:41:01.282353 ==
2398 00:41:01.282408 === u2Vref_new: 0x56 --> 0x3a
2399 00:41:01.282464 === u2Vref_new: 0x58 --> 0x58
2400 00:41:01.282519 === u2Vref_new: 0x5a --> 0x5a
2401 00:41:01.282573 === u2Vref_new: 0x5c --> 0x78
2402 00:41:01.282629 === u2Vref_new: 0x5e --> 0x7a
2403 00:41:01.282685 === u2Vref_new: 0x60 --> 0x90
2404 00:41:01.282740 [CA 0] Center 37 (11~63) winsize 53
2405 00:41:01.282794 [CA 1] Center 36 (10~63) winsize 54
2406 00:41:01.282848 [CA 2] Center 34 (6~63) winsize 58
2407 00:41:01.282902 [CA 3] Center 34 (5~63) winsize 59
2408 00:41:01.282957 [CA 4] Center 33 (4~63) winsize 60
2409 00:41:01.283012 [CA 5] Center 28 (-1~57) winsize 59
2410 00:41:01.283066
2411 00:41:01.283120 [CATrainingPosCal] consider 2 rank data
2412 00:41:01.283175 u2DelayCellTimex100 = 844/100 ps
2413 00:41:01.283230 CA0 delay=37 (12~63),Diff = 9 PI (10 cell)
2414 00:41:01.283284 CA1 delay=37 (11~63),Diff = 9 PI (10 cell)
2415 00:41:01.283339 CA2 delay=35 (7~63),Diff = 7 PI (8 cell)
2416 00:41:01.283393 CA3 delay=35 (7~63),Diff = 7 PI (8 cell)
2417 00:41:01.283448 CA4 delay=34 (6~63),Diff = 6 PI (6 cell)
2418 00:41:01.283503 CA5 delay=28 (0~57),Diff = 0 PI (0 cell)
2419 00:41:01.283557
2420 00:41:01.283611 CA PerBit enable=1, Macro0, CA PI delay=28
2421 00:41:01.283666 === u2Vref_new: 0x60 --> 0x90
2422 00:41:01.283720
2423 00:41:01.283775 Vref(ca) range 1: 32
2424 00:41:01.283828
2425 00:41:01.283882 CS Dly= 11 (42-0-32)
2426 00:41:01.283936 Write Rank1 MR13 =0xd8
2427 00:41:01.283991 Write Rank1 MR13 =0xd8
2428 00:41:01.284045 Write Rank1 MR12 =0x60
2429 00:41:01.284099 [RankSwap] Rank num 2, (Multi 1), Rank 0
2430 00:41:01.284153 Write Rank0 MR2 =0xad
2431 00:41:01.284209 [Write Leveling]
2432 00:41:01.284457 delay byte0 byte1 byte2 byte3
2433 00:41:01.284519
2434 00:41:01.284574 10 0 0
2435 00:41:01.284630 11 0 0
2436 00:41:01.284687 12 0 0
2437 00:41:01.284775 13 0 0
2438 00:41:01.284833 14 0 0
2439 00:41:01.284889 15 0 0
2440 00:41:01.284946 16 0 0
2441 00:41:01.285001 17 0 0
2442 00:41:01.285057 18 0 0
2443 00:41:01.285113 19 0 0
2444 00:41:01.285170 20 0 0
2445 00:41:01.285226 21 0 0
2446 00:41:01.285282 22 0 0
2447 00:41:01.285337 23 0 0
2448 00:41:01.285392 24 0 0
2449 00:41:01.285446 25 0 0
2450 00:41:01.285501 26 0 0
2451 00:41:01.285557 27 0 0
2452 00:41:01.285612 28 0 0
2453 00:41:01.285668 29 0 0
2454 00:41:01.285723 30 0 0
2455 00:41:01.285779 31 0 0
2456 00:41:01.285834 32 0 0
2457 00:41:01.285903 33 0 ff
2458 00:41:01.285962 34 ff ff
2459 00:41:01.288163 35 ff ff
2460 00:41:01.288242 36 ff ff
2461 00:41:01.291597 37 ff ff
2462 00:41:01.291677 38 ff ff
2463 00:41:01.294893 39 ff ff
2464 00:41:01.294970 40 ff ff
2465 00:41:01.298344 pass bytecount = 0xff (0xff: all bytes pass)
2466 00:41:01.298420
2467 00:41:01.301803 DQS0 dly: 34
2468 00:41:01.301878 DQS1 dly: 33
2469 00:41:01.305280 Write Rank0 MR2 =0x2d
2470 00:41:01.308429 [RankSwap] Rank num 2, (Multi 1), Rank 0
2471 00:41:01.308505 Write Rank0 MR1 =0xd6
2472 00:41:01.311990 [Gating]
2473 00:41:01.312091 ==
2474 00:41:01.315482 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2475 00:41:01.318248 fsp= 1, odt_onoff= 1, Byte mode= 0
2476 00:41:01.318323 ==
2477 00:41:01.325169 3 1 0 |3534 707 |(11 11)(11 11) |(0 0)(0 0)| 0
2478 00:41:01.328580 3 1 4 |3534 3232 |(11 11)(10 10) |(0 0)(1 1)| 0
2479 00:41:01.331764 3 1 8 |3534 1717 |(11 11)(11 11) |(0 0)(0 0)| 0
2480 00:41:01.335037 3 1 12 |3534 3434 |(11 11)(11 11) |(1 1)(0 0)| 0
2481 00:41:01.342257 3 1 16 |3534 d0d |(11 11)(11 11) |(1 1)(0 0)| 0
2482 00:41:01.345150 3 1 20 |3534 3332 |(11 11)(11 11) |(1 1)(0 0)| 0
2483 00:41:01.348651 3 1 24 |3534 2322 |(11 11)(11 11) |(0 1)(1 1)| 0
2484 00:41:01.355058 3 1 28 |3534 2c2c |(11 11)(11 11) |(0 1)(1 0)| 0
2485 00:41:01.358633 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2486 00:41:01.361646 3 2 4 |3534 1c1b |(11 11)(11 11) |(0 1)(0 1)| 0
2487 00:41:01.368354 3 2 8 |3534 3130 |(11 11)(11 11) |(0 1)(1 0)| 0
2488 00:41:01.371856 3 2 12 |3534 2827 |(11 11)(11 11) |(0 1)(0 1)| 0
2489 00:41:01.374997 3 2 16 |3534 2d2d |(11 11)(11 11) |(0 1)(1 0)| 0
2490 00:41:01.382206 3 2 20 |505 302f |(11 11)(11 11) |(1 1)(0 1)| 0
2491 00:41:01.384894 3 2 24 |3d3d 3030 |(11 11)(0 10) |(1 1)(1 0)| 0
2492 00:41:01.388389 3 2 28 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2493 00:41:01.391598 3 3 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2494 00:41:01.398777 3 3 4 |3d3d 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2495 00:41:01.401681 3 3 8 |3d3d 808 |(11 11)(11 11) |(1 1)(0 0)| 0
2496 00:41:01.404969 3 3 12 |3d3d 1211 |(11 11)(11 11) |(1 1)(1 1)| 0
2497 00:41:01.412003 3 3 16 |3d3d 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
2498 00:41:01.415401 [Byte 1] Lead/lag Transition tap number (1)
2499 00:41:01.418291 3 3 20 |3d3d 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2500 00:41:01.422075 3 3 24 |0 202 |(11 11)(11 11) |(1 1)(1 1)| 0
2501 00:41:01.428376 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2502 00:41:01.431660 [Byte 0] Lead/lag falling Transition (3, 3, 28)
2503 00:41:01.435107 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2504 00:41:01.441851 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2505 00:41:01.445531 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2506 00:41:01.448151 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2507 00:41:01.451629 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2508 00:41:01.458309 3 4 20 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2509 00:41:01.461340 3 4 24 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2510 00:41:01.464944 3 4 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2511 00:41:01.471540 3 5 0 |3d3d 908 |(11 11)(11 11) |(1 1)(1 1)| 0
2512 00:41:01.474741 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2513 00:41:01.478319 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2514 00:41:01.484796 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2515 00:41:01.488423 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2516 00:41:01.491745 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2517 00:41:01.498031 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2518 00:41:01.501330 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2519 00:41:01.504957 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2520 00:41:01.508515 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2521 00:41:01.514695 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2522 00:41:01.518126 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2523 00:41:01.521425 [Byte 0] Lead/lag falling Transition (3, 6, 12)
2524 00:41:01.528282 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2525 00:41:01.531125 [Byte 0] Lead/lag Transition tap number (2)
2526 00:41:01.534468 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2527 00:41:01.537939 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2528 00:41:01.544618 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(1 0)| 0
2529 00:41:01.544906 [Byte 0]First pass (3, 6, 24)
2530 00:41:01.551239 [Byte 1] Lead/lag Transition tap number (2)
2531 00:41:01.554517 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2532 00:41:01.557714 3 7 0 |4646 202 |(0 0)(1 1) |(0 0)(0 0)| 0
2533 00:41:01.561439 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2534 00:41:01.564512 [Byte 1]First pass (3, 7, 4)
2535 00:41:01.567693 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2536 00:41:01.571029 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2537 00:41:01.577566 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2538 00:41:01.580890 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2539 00:41:01.584612 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2540 00:41:01.587456 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2541 00:41:01.591319 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2542 00:41:01.597360 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2543 00:41:01.600867 All bytes gating window > 1UI, Early break!
2544 00:41:01.601145
2545 00:41:01.604296 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
2546 00:41:01.604576
2547 00:41:01.607633 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)
2548 00:41:01.607912
2549 00:41:01.608234
2550 00:41:01.608536
2551 00:41:01.611088 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2552 00:41:01.611366
2553 00:41:01.617959 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)
2554 00:41:01.618385
2555 00:41:01.618693
2556 00:41:01.618973 Write Rank0 MR1 =0x56
2557 00:41:01.619180
2558 00:41:01.620771 best RODT dly(2T, 0.5T) = (2, 3)
2559 00:41:01.621047
2560 00:41:01.624203 best RODT dly(2T, 0.5T) = (2, 3)
2561 00:41:01.624488 ==
2562 00:41:01.631078 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2563 00:41:01.634389 fsp= 1, odt_onoff= 1, Byte mode= 0
2564 00:41:01.634752 ==
2565 00:41:01.637934 Start DQ dly to find pass range UseTestEngine =0
2566 00:41:01.640699 x-axis: bit #, y-axis: DQ dly (-127~63)
2567 00:41:01.644084 RX Vref Scan = 0
2568 00:41:01.647690 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2569 00:41:01.648072 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2570 00:41:01.650997 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2571 00:41:01.654508 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2572 00:41:01.657591 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2573 00:41:01.660610 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2574 00:41:01.664299 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2575 00:41:01.667544 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2576 00:41:01.670939 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2577 00:41:01.671228 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2578 00:41:01.674314 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2579 00:41:01.677215 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2580 00:41:01.681069 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2581 00:41:01.684313 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2582 00:41:01.687667 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2583 00:41:01.690918 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2584 00:41:01.694326 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2585 00:41:01.694478 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2586 00:41:01.697254 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2587 00:41:01.700929 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2588 00:41:01.704281 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2589 00:41:01.707360 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2590 00:41:01.711011 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2591 00:41:01.714392 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2592 00:41:01.714538 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2593 00:41:01.717294 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2594 00:41:01.720714 0, [0] xxxxxxxx xxxxxxxo [MSB]
2595 00:41:01.723934 1, [0] xxxxxxxx xxxxxxxo [MSB]
2596 00:41:01.727354 2, [0] xxxxxxxx xxxxxxxo [MSB]
2597 00:41:01.730795 3, [0] xxxoxxxx xoxxxxxo [MSB]
2598 00:41:01.730939 4, [0] xxxoxxxx ooxxxxxo [MSB]
2599 00:41:01.734128 5, [0] xoooxxxx ooxxxxxo [MSB]
2600 00:41:01.737650 6, [0] xoooxxxo oooxxxxo [MSB]
2601 00:41:01.740846 7, [0] xooooxxo oooooxoo [MSB]
2602 00:41:01.743776 8, [0] oooooxoo oooooooo [MSB]
2603 00:41:01.747176 31, [0] oooooooo ooooooox [MSB]
2604 00:41:01.747321 32, [0] oooooooo ooooooox [MSB]
2605 00:41:01.750611 33, [0] oooooooo ooooooox [MSB]
2606 00:41:01.753949 34, [0] oooooooo oxooooox [MSB]
2607 00:41:01.757490 35, [0] ooxxoooo xxooooox [MSB]
2608 00:41:01.760327 36, [0] ooxxoooo xxooooox [MSB]
2609 00:41:01.764247 37, [0] ooxxxooo xxxoooox [MSB]
2610 00:41:01.767380 38, [0] ooxxxooo xxxxoxxx [MSB]
2611 00:41:01.770127 39, [0] oxxxxxox xxxxxxxx [MSB]
2612 00:41:01.770272 40, [0] oxxxxxox xxxxxxxx [MSB]
2613 00:41:01.773665 41, [0] xxxxxxxx xxxxxxxx [MSB]
2614 00:41:01.777020 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2615 00:41:01.780404 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2616 00:41:01.783646 iDelay=41, Bit 2, Center 19 (5 ~ 34) 30
2617 00:41:01.790299 iDelay=41, Bit 3, Center 18 (3 ~ 34) 32
2618 00:41:01.793469 iDelay=41, Bit 4, Center 21 (7 ~ 36) 30
2619 00:41:01.796680 iDelay=41, Bit 5, Center 23 (9 ~ 38) 30
2620 00:41:01.799876 iDelay=41, Bit 6, Center 24 (8 ~ 40) 33
2621 00:41:01.803300 iDelay=41, Bit 7, Center 22 (6 ~ 38) 33
2622 00:41:01.806959 iDelay=41, Bit 8, Center 19 (4 ~ 34) 31
2623 00:41:01.810120 iDelay=41, Bit 9, Center 18 (3 ~ 33) 31
2624 00:41:01.813690 iDelay=41, Bit 10, Center 21 (6 ~ 36) 31
2625 00:41:01.816748 iDelay=41, Bit 11, Center 22 (7 ~ 37) 31
2626 00:41:01.820073 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
2627 00:41:01.823553 iDelay=41, Bit 13, Center 22 (8 ~ 37) 30
2628 00:41:01.826706 iDelay=41, Bit 14, Center 22 (7 ~ 37) 31
2629 00:41:01.833723 iDelay=41, Bit 15, Center 14 (-1 ~ 30) 32
2630 00:41:01.834236 ==
2631 00:41:01.836672 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2632 00:41:01.840069 fsp= 1, odt_onoff= 1, Byte mode= 0
2633 00:41:01.840506 ==
2634 00:41:01.840823 DQS Delay:
2635 00:41:01.843298 DQS0 = 0, DQS1 = 0
2636 00:41:01.843696 DQM Delay:
2637 00:41:01.846679 DQM0 = 21, DQM1 = 20
2638 00:41:01.847077 DQ Delay:
2639 00:41:01.849857 DQ0 =24, DQ1 =21, DQ2 =19, DQ3 =18
2640 00:41:01.853274 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
2641 00:41:01.857019 DQ8 =19, DQ9 =18, DQ10 =21, DQ11 =22
2642 00:41:01.859555 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
2643 00:41:01.860107
2644 00:41:01.860424
2645 00:41:01.863112 DramC Write-DBI off
2646 00:41:01.863565 ==
2647 00:41:01.866230 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2648 00:41:01.869451 fsp= 1, odt_onoff= 1, Byte mode= 0
2649 00:41:01.869958 ==
2650 00:41:01.876456 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2651 00:41:01.877023
2652 00:41:01.879778 Begin, DQ Scan Range 929~1185
2653 00:41:01.880336
2654 00:41:01.880851
2655 00:41:01.881340 TX Vref Scan disable
2656 00:41:01.883429 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2657 00:41:01.886469 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2658 00:41:01.889639 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2659 00:41:01.893148 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2660 00:41:01.899497 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2661 00:41:01.903342 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2662 00:41:01.906231 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2663 00:41:01.909786 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2664 00:41:01.913074 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2665 00:41:01.916097 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2666 00:41:01.919638 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2667 00:41:01.923114 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2668 00:41:01.926350 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2669 00:41:01.929292 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2670 00:41:01.932993 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2671 00:41:01.936329 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2672 00:41:01.939386 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2673 00:41:01.942923 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2674 00:41:01.946420 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2675 00:41:01.949820 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2676 00:41:01.955964 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2677 00:41:01.959383 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2678 00:41:01.962800 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2679 00:41:01.966226 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2680 00:41:01.969238 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2681 00:41:01.973092 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2682 00:41:01.976107 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2683 00:41:01.979255 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2684 00:41:01.982534 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2685 00:41:01.985910 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2686 00:41:01.989243 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2687 00:41:01.992687 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2688 00:41:01.995821 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2689 00:41:01.999490 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2690 00:41:02.003010 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2691 00:41:02.006169 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2692 00:41:02.009083 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2693 00:41:02.012281 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2694 00:41:02.015970 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2695 00:41:02.022792 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2696 00:41:02.025917 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2697 00:41:02.029171 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2698 00:41:02.032453 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2699 00:41:02.035719 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2700 00:41:02.038948 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2701 00:41:02.042438 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2702 00:41:02.045909 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2703 00:41:02.048957 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2704 00:41:02.052550 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2705 00:41:02.055806 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2706 00:41:02.059454 979 |3 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2707 00:41:02.062462 980 |3 6 20|[0] xxxxxxxx xxxxxxxx [MSB]
2708 00:41:02.065643 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2709 00:41:02.069205 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2710 00:41:02.072167 983 |3 6 23|[0] xxxxxxxx oooxoxoo [MSB]
2711 00:41:02.078776 984 |3 6 24|[0] xooooxoo oooooooo [MSB]
2712 00:41:02.082184 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2713 00:41:02.085955 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2714 00:41:02.088714 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2715 00:41:02.092004 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2716 00:41:02.095665 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2717 00:41:02.102266 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2718 00:41:02.105542 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2719 00:41:02.109054 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2720 00:41:02.112293 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2721 00:41:02.115301 1005 |3 6 45|[0] oxxxooox xxxxxxxx [MSB]
2722 00:41:02.118673 1006 |3 6 46|[0] oxxxxoox xxxxxxxx [MSB]
2723 00:41:02.122459 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2724 00:41:02.125772 Byte0, DQ PI dly=993, DQM PI dly= 993
2725 00:41:02.129302 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2726 00:41:02.129751
2727 00:41:02.135669 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2728 00:41:02.136070
2729 00:41:02.138631 Byte1, DQ PI dly=989, DQM PI dly= 989
2730 00:41:02.142074 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2731 00:41:02.142620
2732 00:41:02.145691 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2733 00:41:02.146165
2734 00:41:02.149326 ==
2735 00:41:02.152118 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2736 00:41:02.155293 fsp= 1, odt_onoff= 1, Byte mode= 0
2737 00:41:02.155703 ==
2738 00:41:02.158954 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2739 00:41:02.159433
2740 00:41:02.161770 Begin, DQ Scan Range 965~1029
2741 00:41:02.165629 Write Rank0 MR14 =0x0
2742 00:41:02.172227
2743 00:41:02.172622 CH=1, VrefRange= 0, VrefLevel = 0
2744 00:41:02.178740 TX Bit0 (986~1002) 17 994, Bit8 (983~994) 12 988,
2745 00:41:02.182307 TX Bit1 (985~999) 15 992, Bit9 (983~994) 12 988,
2746 00:41:02.189346 TX Bit2 (984~999) 16 991, Bit10 (985~996) 12 990,
2747 00:41:02.192240 TX Bit3 (982~994) 13 988, Bit11 (985~998) 14 991,
2748 00:41:02.195684 TX Bit4 (985~1000) 16 992, Bit12 (985~998) 14 991,
2749 00:41:02.202238 TX Bit5 (987~1000) 14 993, Bit13 (986~995) 10 990,
2750 00:41:02.205879 TX Bit6 (985~1001) 17 993, Bit14 (985~997) 13 991,
2751 00:41:02.212120 TX Bit7 (985~1000) 16 992, Bit15 (980~990) 11 985,
2752 00:41:02.212519
2753 00:41:02.212833 Write Rank0 MR14 =0x2
2754 00:41:02.220206
2755 00:41:02.220636 CH=1, VrefRange= 0, VrefLevel = 2
2756 00:41:02.226950 TX Bit0 (986~1002) 17 994, Bit8 (982~995) 14 988,
2757 00:41:02.230694 TX Bit1 (985~999) 15 992, Bit9 (983~994) 12 988,
2758 00:41:02.236894 TX Bit2 (983~1000) 18 991, Bit10 (985~998) 14 991,
2759 00:41:02.240544 TX Bit3 (981~995) 15 988, Bit11 (985~999) 15 992,
2760 00:41:02.243594 TX Bit4 (985~1001) 17 993, Bit12 (985~999) 15 992,
2761 00:41:02.250645 TX Bit5 (986~1001) 16 993, Bit13 (986~997) 12 991,
2762 00:41:02.253600 TX Bit6 (985~1001) 17 993, Bit14 (985~998) 14 991,
2763 00:41:02.260053 TX Bit7 (985~1000) 16 992, Bit15 (979~991) 13 985,
2764 00:41:02.260456
2765 00:41:02.260769 Write Rank0 MR14 =0x4
2766 00:41:02.268718
2767 00:41:02.269118 CH=1, VrefRange= 0, VrefLevel = 4
2768 00:41:02.275671 TX Bit0 (986~1002) 17 994, Bit8 (982~995) 14 988,
2769 00:41:02.278848 TX Bit1 (985~1000) 16 992, Bit9 (982~995) 14 988,
2770 00:41:02.285513 TX Bit2 (983~1000) 18 991, Bit10 (985~998) 14 991,
2771 00:41:02.288762 TX Bit3 (981~996) 16 988, Bit11 (985~999) 15 992,
2772 00:41:02.292079 TX Bit4 (984~1001) 18 992, Bit12 (985~999) 15 992,
2773 00:41:02.298759 TX Bit5 (986~1002) 17 994, Bit13 (986~998) 13 992,
2774 00:41:02.301901 TX Bit6 (985~1002) 18 993, Bit14 (985~999) 15 992,
2775 00:41:02.308796 TX Bit7 (985~1001) 17 993, Bit15 (978~992) 15 985,
2776 00:41:02.309394
2777 00:41:02.309712 Write Rank0 MR14 =0x6
2778 00:41:02.317649
2779 00:41:02.318097 CH=1, VrefRange= 0, VrefLevel = 6
2780 00:41:02.323879 TX Bit0 (986~1003) 18 994, Bit8 (982~997) 16 989,
2781 00:41:02.327251 TX Bit1 (985~1001) 17 993, Bit9 (982~996) 15 989,
2782 00:41:02.333708 TX Bit2 (982~1001) 20 991, Bit10 (984~999) 16 991,
2783 00:41:02.337454 TX Bit3 (980~997) 18 988, Bit11 (985~999) 15 992,
2784 00:41:02.340909 TX Bit4 (984~1002) 19 993, Bit12 (985~999) 15 992,
2785 00:41:02.346939 TX Bit5 (986~1002) 17 994, Bit13 (985~999) 15 992,
2786 00:41:02.350587 TX Bit6 (984~1002) 19 993, Bit14 (984~999) 16 991,
2787 00:41:02.356735 TX Bit7 (985~1001) 17 993, Bit15 (979~992) 14 985,
2788 00:41:02.357137
2789 00:41:02.357446 Write Rank0 MR14 =0x8
2790 00:41:02.365862
2791 00:41:02.366350 CH=1, VrefRange= 0, VrefLevel = 8
2792 00:41:02.372675 TX Bit0 (986~1004) 19 995, Bit8 (981~998) 18 989,
2793 00:41:02.376152 TX Bit1 (984~1001) 18 992, Bit9 (981~996) 16 988,
2794 00:41:02.382776 TX Bit2 (982~1001) 20 991, Bit10 (984~999) 16 991,
2795 00:41:02.385757 TX Bit3 (980~997) 18 988, Bit11 (985~1000) 16 992,
2796 00:41:02.389238 TX Bit4 (984~1003) 20 993, Bit12 (984~1000) 17 992,
2797 00:41:02.395753 TX Bit5 (986~1003) 18 994, Bit13 (985~999) 15 992,
2798 00:41:02.399532 TX Bit6 (984~1003) 20 993, Bit14 (984~999) 16 991,
2799 00:41:02.405751 TX Bit7 (984~1002) 19 993, Bit15 (978~993) 16 985,
2800 00:41:02.406202
2801 00:41:02.406589 Write Rank0 MR14 =0xa
2802 00:41:02.415062
2803 00:41:02.418154 CH=1, VrefRange= 0, VrefLevel = 10
2804 00:41:02.422018 TX Bit0 (985~1005) 21 995, Bit8 (981~998) 18 989,
2805 00:41:02.424776 TX Bit1 (984~1002) 19 993, Bit9 (982~998) 17 990,
2806 00:41:02.431457 TX Bit2 (981~1002) 22 991, Bit10 (984~1000) 17 992,
2807 00:41:02.434704 TX Bit3 (979~998) 20 988, Bit11 (984~1000) 17 992,
2808 00:41:02.441138 TX Bit4 (984~1004) 21 994, Bit12 (985~1000) 16 992,
2809 00:41:02.444512 TX Bit5 (986~1004) 19 995, Bit13 (985~1000) 16 992,
2810 00:41:02.447844 TX Bit6 (984~1004) 21 994, Bit14 (984~1000) 17 992,
2811 00:41:02.454755 TX Bit7 (984~1002) 19 993, Bit15 (977~993) 17 985,
2812 00:41:02.455115
2813 00:41:02.455480 Write Rank0 MR14 =0xc
2814 00:41:02.464374
2815 00:41:02.467779 CH=1, VrefRange= 0, VrefLevel = 12
2816 00:41:02.470862 TX Bit0 (985~1005) 21 995, Bit8 (980~998) 19 989,
2817 00:41:02.474172 TX Bit1 (984~1003) 20 993, Bit9 (980~998) 19 989,
2818 00:41:02.480927 TX Bit2 (981~1002) 22 991, Bit10 (984~1000) 17 992,
2819 00:41:02.484125 TX Bit3 (979~999) 21 989, Bit11 (984~1001) 18 992,
2820 00:41:02.491033 TX Bit4 (983~1004) 22 993, Bit12 (984~1000) 17 992,
2821 00:41:02.494034 TX Bit5 (985~1005) 21 995, Bit13 (985~1000) 16 992,
2822 00:41:02.497260 TX Bit6 (983~1004) 22 993, Bit14 (984~1000) 17 992,
2823 00:41:02.504313 TX Bit7 (984~1003) 20 993, Bit15 (977~994) 18 985,
2824 00:41:02.504762
2825 00:41:02.505129 Write Rank0 MR14 =0xe
2826 00:41:02.513621
2827 00:41:02.516912 CH=1, VrefRange= 0, VrefLevel = 14
2828 00:41:02.520359 TX Bit0 (985~1006) 22 995, Bit8 (980~999) 20 989,
2829 00:41:02.523548 TX Bit1 (984~1003) 20 993, Bit9 (980~998) 19 989,
2830 00:41:02.530295 TX Bit2 (981~1003) 23 992, Bit10 (983~1000) 18 991,
2831 00:41:02.533648 TX Bit3 (979~1000) 22 989, Bit11 (984~1001) 18 992,
2832 00:41:02.540546 TX Bit4 (983~1005) 23 994, Bit12 (984~1001) 18 992,
2833 00:41:02.544014 TX Bit5 (985~1005) 21 995, Bit13 (985~1000) 16 992,
2834 00:41:02.546953 TX Bit6 (983~1005) 23 994, Bit14 (983~1001) 19 992,
2835 00:41:02.553537 TX Bit7 (984~1004) 21 994, Bit15 (977~994) 18 985,
2836 00:41:02.553933
2837 00:41:02.554371 Write Rank0 MR14 =0x10
2838 00:41:02.563791
2839 00:41:02.567066 CH=1, VrefRange= 0, VrefLevel = 16
2840 00:41:02.570585 TX Bit0 (985~1006) 22 995, Bit8 (980~999) 20 989,
2841 00:41:02.573417 TX Bit1 (983~1004) 22 993, Bit9 (980~999) 20 989,
2842 00:41:02.580063 TX Bit2 (980~1003) 24 991, Bit10 (983~1001) 19 992,
2843 00:41:02.583193 TX Bit3 (979~1000) 22 989, Bit11 (984~1001) 18 992,
2844 00:41:02.589891 TX Bit4 (983~1006) 24 994, Bit12 (984~1001) 18 992,
2845 00:41:02.593267 TX Bit5 (985~1006) 22 995, Bit13 (984~1001) 18 992,
2846 00:41:02.596336 TX Bit6 (983~1006) 24 994, Bit14 (984~1001) 18 992,
2847 00:41:02.603029 TX Bit7 (983~1004) 22 993, Bit15 (977~995) 19 986,
2848 00:41:02.603314
2849 00:41:02.603534 Write Rank0 MR14 =0x12
2850 00:41:02.613208
2851 00:41:02.616558 CH=1, VrefRange= 0, VrefLevel = 18
2852 00:41:02.619526 TX Bit0 (984~1006) 23 995, Bit8 (979~999) 21 989,
2853 00:41:02.623526 TX Bit1 (983~1005) 23 994, Bit9 (979~999) 21 989,
2854 00:41:02.630087 TX Bit2 (980~1004) 25 992, Bit10 (983~1001) 19 992,
2855 00:41:02.632813 TX Bit3 (979~1001) 23 990, Bit11 (984~1002) 19 993,
2856 00:41:02.639928 TX Bit4 (982~1006) 25 994, Bit12 (984~1001) 18 992,
2857 00:41:02.643272 TX Bit5 (985~1006) 22 995, Bit13 (984~1001) 18 992,
2858 00:41:02.646476 TX Bit6 (983~1006) 24 994, Bit14 (983~1001) 19 992,
2859 00:41:02.653550 TX Bit7 (983~1005) 23 994, Bit15 (976~996) 21 986,
2860 00:41:02.653935
2861 00:41:02.654255 Write Rank0 MR14 =0x14
2862 00:41:02.662970
2863 00:41:02.666257 CH=1, VrefRange= 0, VrefLevel = 20
2864 00:41:02.669580 TX Bit0 (985~1007) 23 996, Bit8 (979~1000) 22 989,
2865 00:41:02.672934 TX Bit1 (983~1006) 24 994, Bit9 (979~999) 21 989,
2866 00:41:02.679859 TX Bit2 (980~1004) 25 992, Bit10 (983~1001) 19 992,
2867 00:41:02.682981 TX Bit3 (978~1001) 24 989, Bit11 (983~1002) 20 992,
2868 00:41:02.689785 TX Bit4 (982~1006) 25 994, Bit12 (983~1002) 20 992,
2869 00:41:02.693140 TX Bit5 (984~1006) 23 995, Bit13 (984~1001) 18 992,
2870 00:41:02.696562 TX Bit6 (982~1006) 25 994, Bit14 (983~1001) 19 992,
2871 00:41:02.703082 TX Bit7 (983~1006) 24 994, Bit15 (976~996) 21 986,
2872 00:41:02.703363
2873 00:41:02.703581 Write Rank0 MR14 =0x16
2874 00:41:02.712819
2875 00:41:02.716282 CH=1, VrefRange= 0, VrefLevel = 22
2876 00:41:02.719743 TX Bit0 (984~1007) 24 995, Bit8 (978~1000) 23 989,
2877 00:41:02.722915 TX Bit1 (983~1006) 24 994, Bit9 (978~1000) 23 989,
2878 00:41:02.729814 TX Bit2 (980~1005) 26 992, Bit10 (983~1002) 20 992,
2879 00:41:02.733113 TX Bit3 (978~1002) 25 990, Bit11 (983~1003) 21 993,
2880 00:41:02.740162 TX Bit4 (982~1007) 26 994, Bit12 (983~1002) 20 992,
2881 00:41:02.742940 TX Bit5 (984~1007) 24 995, Bit13 (984~1002) 19 993,
2882 00:41:02.746424 TX Bit6 (982~1007) 26 994, Bit14 (982~1002) 21 992,
2883 00:41:02.753031 TX Bit7 (982~1006) 25 994, Bit15 (975~998) 24 986,
2884 00:41:02.753311
2885 00:41:02.753530 Write Rank0 MR14 =0x18
2886 00:41:02.762866
2887 00:41:02.766589 CH=1, VrefRange= 0, VrefLevel = 24
2888 00:41:02.769800 TX Bit0 (984~1007) 24 995, Bit8 (978~1000) 23 989,
2889 00:41:02.772858 TX Bit1 (982~1006) 25 994, Bit9 (978~1000) 23 989,
2890 00:41:02.779494 TX Bit2 (979~1006) 28 992, Bit10 (982~1002) 21 992,
2891 00:41:02.783136 TX Bit3 (978~1002) 25 990, Bit11 (983~1004) 22 993,
2892 00:41:02.789439 TX Bit4 (981~1007) 27 994, Bit12 (983~1003) 21 993,
2893 00:41:02.792855 TX Bit5 (984~1007) 24 995, Bit13 (983~1002) 20 992,
2894 00:41:02.796069 TX Bit6 (981~1007) 27 994, Bit14 (982~1002) 21 992,
2895 00:41:02.803087 TX Bit7 (982~1006) 25 994, Bit15 (974~998) 25 986,
2896 00:41:02.803448
2897 00:41:02.805843 Write Rank0 MR14 =0x1a
2898 00:41:02.813298
2899 00:41:02.816159 CH=1, VrefRange= 0, VrefLevel = 26
2900 00:41:02.819970 TX Bit0 (984~1007) 24 995, Bit8 (977~1000) 24 988,
2901 00:41:02.822868 TX Bit1 (982~1007) 26 994, Bit9 (978~1000) 23 989,
2902 00:41:02.829762 TX Bit2 (979~1006) 28 992, Bit10 (982~1003) 22 992,
2903 00:41:02.832835 TX Bit3 (978~1003) 26 990, Bit11 (982~1004) 23 993,
2904 00:41:02.840106 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2905 00:41:02.843055 TX Bit5 (984~1007) 24 995, Bit13 (983~1003) 21 993,
2906 00:41:02.846493 TX Bit6 (981~1007) 27 994, Bit14 (982~1003) 22 992,
2907 00:41:02.853102 TX Bit7 (981~1006) 26 993, Bit15 (975~999) 25 987,
2908 00:41:02.853601
2909 00:41:02.854096 Write Rank0 MR14 =0x1c
2910 00:41:02.863546
2911 00:41:02.866566 CH=1, VrefRange= 0, VrefLevel = 28
2912 00:41:02.870013 TX Bit0 (983~1008) 26 995, Bit8 (977~1001) 25 989,
2913 00:41:02.873032 TX Bit1 (981~1007) 27 994, Bit9 (977~1000) 24 988,
2914 00:41:02.879750 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2915 00:41:02.883420 TX Bit3 (978~1003) 26 990, Bit11 (982~1004) 23 993,
2916 00:41:02.890178 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2917 00:41:02.893325 TX Bit5 (984~1007) 24 995, Bit13 (983~1003) 21 993,
2918 00:41:02.896620 TX Bit6 (981~1007) 27 994, Bit14 (981~1003) 23 992,
2919 00:41:02.903431 TX Bit7 (981~1007) 27 994, Bit15 (974~999) 26 986,
2920 00:41:02.903790
2921 00:41:02.904069 Write Rank0 MR14 =0x1e
2922 00:41:02.913720
2923 00:41:02.916626 CH=1, VrefRange= 0, VrefLevel = 30
2924 00:41:02.920237 TX Bit0 (983~1008) 26 995, Bit8 (977~1001) 25 989,
2925 00:41:02.923293 TX Bit1 (981~1007) 27 994, Bit9 (978~1000) 23 989,
2926 00:41:02.930011 TX Bit2 (979~1005) 27 992, Bit10 (981~1003) 23 992,
2927 00:41:02.933318 TX Bit3 (978~1002) 25 990, Bit11 (982~1003) 22 992,
2928 00:41:02.940166 TX Bit4 (982~1007) 26 994, Bit12 (982~1003) 22 992,
2929 00:41:02.943078 TX Bit5 (983~1007) 25 995, Bit13 (983~1004) 22 993,
2930 00:41:02.946881 TX Bit6 (982~1007) 26 994, Bit14 (981~1003) 23 992,
2931 00:41:02.953633 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2932 00:41:02.954045
2933 00:41:02.956588 Write Rank0 MR14 =0x20
2934 00:41:02.963796
2935 00:41:02.967150 CH=1, VrefRange= 0, VrefLevel = 32
2936 00:41:02.970495 TX Bit0 (983~1008) 26 995, Bit8 (977~1001) 25 989,
2937 00:41:02.973732 TX Bit1 (981~1007) 27 994, Bit9 (978~1000) 23 989,
2938 00:41:02.980238 TX Bit2 (979~1005) 27 992, Bit10 (981~1003) 23 992,
2939 00:41:02.983521 TX Bit3 (978~1002) 25 990, Bit11 (982~1003) 22 992,
2940 00:41:02.990331 TX Bit4 (982~1007) 26 994, Bit12 (982~1003) 22 992,
2941 00:41:02.993896 TX Bit5 (983~1007) 25 995, Bit13 (983~1004) 22 993,
2942 00:41:02.996628 TX Bit6 (982~1007) 26 994, Bit14 (981~1003) 23 992,
2943 00:41:03.003636 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2944 00:41:03.004001
2945 00:41:03.006414 Write Rank0 MR14 =0x22
2946 00:41:03.013673
2947 00:41:03.016665 CH=1, VrefRange= 0, VrefLevel = 34
2948 00:41:03.020361 TX Bit0 (983~1008) 26 995, Bit8 (977~1001) 25 989,
2949 00:41:03.023276 TX Bit1 (981~1007) 27 994, Bit9 (978~1000) 23 989,
2950 00:41:03.030393 TX Bit2 (979~1005) 27 992, Bit10 (981~1003) 23 992,
2951 00:41:03.033219 TX Bit3 (978~1002) 25 990, Bit11 (982~1003) 22 992,
2952 00:41:03.040095 TX Bit4 (982~1007) 26 994, Bit12 (982~1003) 22 992,
2953 00:41:03.043811 TX Bit5 (983~1007) 25 995, Bit13 (983~1004) 22 993,
2954 00:41:03.046751 TX Bit6 (982~1007) 26 994, Bit14 (981~1003) 23 992,
2955 00:41:03.053383 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2956 00:41:03.053584
2957 00:41:03.056790 Write Rank0 MR14 =0x24
2958 00:41:03.063352
2959 00:41:03.067036 CH=1, VrefRange= 0, VrefLevel = 36
2960 00:41:03.070264 TX Bit0 (983~1008) 26 995, Bit8 (977~1001) 25 989,
2961 00:41:03.073610 TX Bit1 (981~1007) 27 994, Bit9 (978~1000) 23 989,
2962 00:41:03.079819 TX Bit2 (979~1005) 27 992, Bit10 (981~1003) 23 992,
2963 00:41:03.083076 TX Bit3 (978~1002) 25 990, Bit11 (982~1003) 22 992,
2964 00:41:03.090257 TX Bit4 (982~1007) 26 994, Bit12 (982~1003) 22 992,
2965 00:41:03.093135 TX Bit5 (983~1007) 25 995, Bit13 (983~1004) 22 993,
2966 00:41:03.096435 TX Bit6 (982~1007) 26 994, Bit14 (981~1003) 23 992,
2967 00:41:03.103218 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2968 00:41:03.103295
2969 00:41:03.106370 Write Rank0 MR14 =0x26
2970 00:41:03.113737
2971 00:41:03.116582 CH=1, VrefRange= 0, VrefLevel = 38
2972 00:41:03.119994 TX Bit0 (983~1008) 26 995, Bit8 (977~1001) 25 989,
2973 00:41:03.123206 TX Bit1 (981~1007) 27 994, Bit9 (978~1000) 23 989,
2974 00:41:03.130128 TX Bit2 (979~1005) 27 992, Bit10 (981~1003) 23 992,
2975 00:41:03.133200 TX Bit3 (978~1002) 25 990, Bit11 (982~1003) 22 992,
2976 00:41:03.139634 TX Bit4 (982~1007) 26 994, Bit12 (982~1003) 22 992,
2977 00:41:03.143562 TX Bit5 (983~1007) 25 995, Bit13 (983~1004) 22 993,
2978 00:41:03.146597 TX Bit6 (982~1007) 26 994, Bit14 (981~1003) 23 992,
2979 00:41:03.153120 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2980 00:41:03.153198
2981 00:41:03.153257
2982 00:41:03.156760 TX Vref found, early break! 363< 376
2983 00:41:03.159606 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
2984 00:41:03.163337 u1DelayCellOfst[0]=5 cells (5 PI)
2985 00:41:03.166406 u1DelayCellOfst[1]=4 cells (4 PI)
2986 00:41:03.169651 u1DelayCellOfst[2]=2 cells (2 PI)
2987 00:41:03.173308 u1DelayCellOfst[3]=0 cells (0 PI)
2988 00:41:03.176722 u1DelayCellOfst[4]=4 cells (4 PI)
2989 00:41:03.179795 u1DelayCellOfst[5]=5 cells (5 PI)
2990 00:41:03.183154 u1DelayCellOfst[6]=4 cells (4 PI)
2991 00:41:03.186654 u1DelayCellOfst[7]=3 cells (3 PI)
2992 00:41:03.190126 Byte0, DQ PI dly=990, DQM PI dly= 992
2993 00:41:03.193191 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2994 00:41:03.193268
2995 00:41:03.196523 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2996 00:41:03.196601
2997 00:41:03.199971 u1DelayCellOfst[8]=3 cells (3 PI)
2998 00:41:03.203326 u1DelayCellOfst[9]=3 cells (3 PI)
2999 00:41:03.206163 u1DelayCellOfst[10]=6 cells (6 PI)
3000 00:41:03.209505 u1DelayCellOfst[11]=6 cells (6 PI)
3001 00:41:03.212763 u1DelayCellOfst[12]=6 cells (6 PI)
3002 00:41:03.216182 u1DelayCellOfst[13]=8 cells (7 PI)
3003 00:41:03.219493 u1DelayCellOfst[14]=6 cells (6 PI)
3004 00:41:03.223104 u1DelayCellOfst[15]=0 cells (0 PI)
3005 00:41:03.226457 Byte1, DQ PI dly=986, DQM PI dly= 989
3006 00:41:03.229896 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3007 00:41:03.229974
3008 00:41:03.233111 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3009 00:41:03.233194
3010 00:41:03.236462 Write Rank0 MR14 =0x1e
3011 00:41:03.236543
3012 00:41:03.239543 Final TX Range 0 Vref 30
3013 00:41:03.239632
3014 00:41:03.246314 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3015 00:41:03.246411
3016 00:41:03.252690 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3017 00:41:03.259688 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3018 00:41:03.266070 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3019 00:41:03.269782 Write Rank0 MR3 =0xb0
3020 00:41:03.269925 DramC Write-DBI on
3021 00:41:03.270105 ==
3022 00:41:03.276097 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3023 00:41:03.279976 fsp= 1, odt_onoff= 1, Byte mode= 0
3024 00:41:03.280124 ==
3025 00:41:03.283229 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3026 00:41:03.283375
3027 00:41:03.286353 Begin, DQ Scan Range 709~773
3028 00:41:03.286505
3029 00:41:03.286625
3030 00:41:03.289266 TX Vref Scan disable
3031 00:41:03.292777 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3032 00:41:03.295918 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3033 00:41:03.299302 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3034 00:41:03.302876 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3035 00:41:03.306122 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3036 00:41:03.309595 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3037 00:41:03.313020 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3038 00:41:03.316170 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3039 00:41:03.319590 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3040 00:41:03.322886 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3041 00:41:03.326114 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
3042 00:41:03.329357 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
3043 00:41:03.332387 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
3044 00:41:03.336331 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3045 00:41:03.339550 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3046 00:41:03.342655 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3047 00:41:03.349470 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3048 00:41:03.352755 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3049 00:41:03.359449 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3050 00:41:03.362599 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3051 00:41:03.366000 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3052 00:41:03.369274 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3053 00:41:03.372431 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3054 00:41:03.375656 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3055 00:41:03.379081 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3056 00:41:03.382111 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3057 00:41:03.385925 Byte0, DQ PI dly=739, DQM PI dly= 739
3058 00:41:03.389244 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
3059 00:41:03.389341
3060 00:41:03.395858 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
3061 00:41:03.395961
3062 00:41:03.398662 Byte1, DQ PI dly=733, DQM PI dly= 733
3063 00:41:03.402312 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
3064 00:41:03.402466
3065 00:41:03.405788 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
3066 00:41:03.405904
3067 00:41:03.411912 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3068 00:41:03.422225 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3069 00:41:03.428538 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3070 00:41:03.428617 Write Rank0 MR3 =0x30
3071 00:41:03.431826 DramC Write-DBI off
3072 00:41:03.431926
3073 00:41:03.431994 [DATLAT]
3074 00:41:03.435230 Freq=1600, CH1 RK0, use_rxtx_scan=0
3075 00:41:03.435308
3076 00:41:03.438715 DATLAT Default: 0xf
3077 00:41:03.438792 7, 0xFFFF, sum=0
3078 00:41:03.441988 8, 0xFFFF, sum=0
3079 00:41:03.442100 9, 0xFFFF, sum=0
3080 00:41:03.445408 10, 0xFFFF, sum=0
3081 00:41:03.445605 11, 0xFFFF, sum=0
3082 00:41:03.448731 12, 0xFFFF, sum=0
3083 00:41:03.448810 13, 0xFFFF, sum=0
3084 00:41:03.448872 14, 0x0, sum=1
3085 00:41:03.451526 15, 0x0, sum=2
3086 00:41:03.451603 16, 0x0, sum=3
3087 00:41:03.455207 17, 0x0, sum=4
3088 00:41:03.458630 pattern=2 first_step=14 total pass=5 best_step=16
3089 00:41:03.458773 ==
3090 00:41:03.465220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3091 00:41:03.468483 fsp= 1, odt_onoff= 1, Byte mode= 0
3092 00:41:03.468623 ==
3093 00:41:03.471736 Start DQ dly to find pass range UseTestEngine =1
3094 00:41:03.475140 x-axis: bit #, y-axis: DQ dly (-127~63)
3095 00:41:03.475218 RX Vref Scan = 1
3096 00:41:03.591467
3097 00:41:03.591582 RX Vref found, early break!
3098 00:41:03.591677
3099 00:41:03.598164 Final RX Vref 12, apply to both rank0 and 1
3100 00:41:03.598242 ==
3101 00:41:03.601633 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3102 00:41:03.605203 fsp= 1, odt_onoff= 1, Byte mode= 0
3103 00:41:03.605307 ==
3104 00:41:03.605400 DQS Delay:
3105 00:41:03.608068 DQS0 = 0, DQS1 = 0
3106 00:41:03.608145 DQM Delay:
3107 00:41:03.611422 DQM0 = 21, DQM1 = 19
3108 00:41:03.611500 DQ Delay:
3109 00:41:03.614728 DQ0 =23, DQ1 =21, DQ2 =20, DQ3 =19
3110 00:41:03.618469 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =23
3111 00:41:03.621445 DQ8 =18, DQ9 =17, DQ10 =21, DQ11 =21
3112 00:41:03.624957 DQ12 =22, DQ13 =22, DQ14 =21, DQ15 =16
3113 00:41:03.625035
3114 00:41:03.625099
3115 00:41:03.625192
3116 00:41:03.627913 [DramC_TX_OE_Calibration] TA2
3117 00:41:03.631523 Original DQ_B0 (3 6) =30, OEN = 27
3118 00:41:03.634778 Original DQ_B1 (3 6) =30, OEN = 27
3119 00:41:03.637928 23, 0x0, End_B0=23 End_B1=23
3120 00:41:03.638042 24, 0x0, End_B0=24 End_B1=24
3121 00:41:03.641429 25, 0x0, End_B0=25 End_B1=25
3122 00:41:03.644850 26, 0x0, End_B0=26 End_B1=26
3123 00:41:03.648194 27, 0x0, End_B0=27 End_B1=27
3124 00:41:03.651690 28, 0x0, End_B0=28 End_B1=28
3125 00:41:03.651784 29, 0x0, End_B0=29 End_B1=29
3126 00:41:03.654607 30, 0x0, End_B0=30 End_B1=30
3127 00:41:03.657910 31, 0xFFFF, End_B0=30 End_B1=30
3128 00:41:03.664768 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3129 00:41:03.668177 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3130 00:41:03.668255
3131 00:41:03.668316
3132 00:41:03.671121 Write Rank0 MR23 =0x3f
3133 00:41:03.671198 [DQSOSC]
3134 00:41:03.681265 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3135 00:41:03.688117 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3136 00:41:03.688196 Write Rank0 MR23 =0x3f
3137 00:41:03.688257 [DQSOSC]
3138 00:41:03.698046 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3139 00:41:03.701250 CH1 RK0: MR19=202, MR18=C0C0
3140 00:41:03.704823 [RankSwap] Rank num 2, (Multi 1), Rank 1
3141 00:41:03.704905 Write Rank0 MR2 =0xad
3142 00:41:03.708298 [Write Leveling]
3143 00:41:03.711119 delay byte0 byte1 byte2 byte3
3144 00:41:03.711196
3145 00:41:03.711258 10 0 0
3146 00:41:03.714743 11 0 0
3147 00:41:03.714853 12 0 0
3148 00:41:03.714947 13 0 0
3149 00:41:03.718144 14 0 0
3150 00:41:03.718253 15 0 0
3151 00:41:03.721389 16 0 0
3152 00:41:03.721467 17 0 0
3153 00:41:03.721530 18 0 0
3154 00:41:03.724393 19 0 0
3155 00:41:03.724472 20 0 0
3156 00:41:03.727908 21 0 0
3157 00:41:03.727986 22 0 0
3158 00:41:03.731239 23 0 0
3159 00:41:03.731328 24 0 0
3160 00:41:03.731389 25 0 0
3161 00:41:03.734395 26 0 0
3162 00:41:03.734473 27 0 0
3163 00:41:03.737942 28 0 0
3164 00:41:03.738065 29 0 0
3165 00:41:03.738126 30 0 0
3166 00:41:03.741814 31 0 0
3167 00:41:03.741917 32 0 ff
3168 00:41:03.744876 33 0 ff
3169 00:41:03.744954 34 0 ff
3170 00:41:03.747946 35 0 ff
3171 00:41:03.748025 36 0 ff
3172 00:41:03.748087 37 0 ff
3173 00:41:03.751076 38 ff ff
3174 00:41:03.751154 39 0 ff
3175 00:41:03.755112 40 ff ff
3176 00:41:03.755191 41 ff ff
3177 00:41:03.757867 42 ff ff
3178 00:41:03.757970 43 ff ff
3179 00:41:03.761395 44 ff ff
3180 00:41:03.761474 45 ff ff
3181 00:41:03.764870 46 ff ff
3182 00:41:03.768349 pass bytecount = 0xff (0xff: all bytes pass)
3183 00:41:03.768428
3184 00:41:03.768488 DQS0 dly: 40
3185 00:41:03.771364 DQS1 dly: 32
3186 00:41:03.771441 Write Rank0 MR2 =0x2d
3187 00:41:03.774536 [RankSwap] Rank num 2, (Multi 1), Rank 0
3188 00:41:03.777953 Write Rank1 MR1 =0xd6
3189 00:41:03.778073 [Gating]
3190 00:41:03.778135 ==
3191 00:41:03.784847 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3192 00:41:03.788072 fsp= 1, odt_onoff= 1, Byte mode= 0
3193 00:41:03.788150 ==
3194 00:41:03.790961 3 1 0 |3534 1918 |(11 11)(11 11) |(0 0)(0 0)| 0
3195 00:41:03.794721 3 1 4 |3534 2f2f |(11 11)(0 0) |(0 0)(1 1)| 0
3196 00:41:03.800785 3 1 8 |3534 f0e |(11 11)(11 11) |(1 1)(1 1)| 0
3197 00:41:03.804309 3 1 12 |3534 d0d |(11 11)(11 11) |(1 1)(1 1)| 0
3198 00:41:03.807768 3 1 16 |3534 2f2f |(11 11)(11 11) |(0 1)(1 1)| 0
3199 00:41:03.814144 3 1 20 |3534 2525 |(11 11)(11 11) |(0 1)(1 1)| 0
3200 00:41:03.817393 3 1 24 |3534 504 |(11 11)(11 11) |(0 1)(1 1)| 0
3201 00:41:03.820960 [Byte 1] Lead/lag falling Transition (3, 1, 24)
3202 00:41:03.824344 3 1 28 |3534 2e2d |(11 11)(11 11) |(0 1)(0 1)| 0
3203 00:41:03.830828 3 2 0 |3534 707 |(11 11)(11 11) |(0 1)(1 1)| 0
3204 00:41:03.834240 [Byte 1] Lead/lag falling Transition (3, 2, 0)
3205 00:41:03.837602 3 2 4 |3534 2e2d |(11 11)(11 11) |(0 1)(0 1)| 0
3206 00:41:03.844161 3 2 8 |3534 2e2e |(11 11)(11 11) |(0 1)(1 0)| 0
3207 00:41:03.847304 3 2 12 |201 1717 |(11 11)(11 11) |(1 1)(0 1)| 0
3208 00:41:03.850702 3 2 16 |3d3d 2e2d |(11 11)(1 11) |(1 1)(1 0)| 0
3209 00:41:03.853918 [Byte 1] Lead/lag Transition tap number (5)
3210 00:41:03.861188 3 2 20 |3d3d 3131 |(11 11)(0 11) |(1 1)(0 0)| 0
3211 00:41:03.864256 3 2 24 |3d3d 909 |(11 11)(11 11) |(1 1)(0 0)| 0
3212 00:41:03.867401 3 2 28 |3d3d 3636 |(11 11)(11 11) |(1 1)(0 0)| 0
3213 00:41:03.874055 3 3 0 |3d3d 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
3214 00:41:03.877410 3 3 4 |3d3d 3535 |(11 11)(10 10) |(1 1)(0 0)| 0
3215 00:41:03.880802 3 3 8 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3216 00:41:03.884330 3 3 12 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3217 00:41:03.890447 3 3 16 |505 1717 |(11 11)(11 11) |(1 1)(0 0)| 0
3218 00:41:03.894293 3 3 20 |3534 b0a |(11 11)(11 11) |(1 1)(1 1)| 0
3219 00:41:03.897515 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3220 00:41:03.903890 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3221 00:41:03.907197 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3222 00:41:03.910485 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3223 00:41:03.916866 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3224 00:41:03.920194 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3225 00:41:03.923554 3 4 12 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3226 00:41:03.930525 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3227 00:41:03.933428 3 4 20 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3228 00:41:03.936785 3 4 24 |3d3d 1211 |(11 11)(11 11) |(1 1)(1 1)| 0
3229 00:41:03.940408 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3230 00:41:03.947032 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3231 00:41:03.950495 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3232 00:41:03.953458 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3233 00:41:03.960093 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3234 00:41:03.963406 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3235 00:41:03.966820 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3236 00:41:03.973837 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3237 00:41:03.976743 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3238 00:41:03.980451 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3239 00:41:03.986760 [Byte 0] Lead/lag falling Transition (3, 6, 0)
3240 00:41:03.990131 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3241 00:41:03.993473 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3242 00:41:03.996625 [Byte 0] Lead/lag Transition tap number (3)
3243 00:41:04.003636 [Byte 1] Lead/lag falling Transition (3, 6, 8)
3244 00:41:04.007269 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3245 00:41:04.010116 [Byte 1] Lead/lag Transition tap number (2)
3246 00:41:04.013459 3 6 16 |a0a 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3247 00:41:04.020216 3 6 20 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3248 00:41:04.020294 [Byte 0]First pass (3, 6, 20)
3249 00:41:04.026764 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3250 00:41:04.029886 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3251 00:41:04.033436 [Byte 1]First pass (3, 6, 28)
3252 00:41:04.036914 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3253 00:41:04.040318 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3254 00:41:04.043176 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3255 00:41:04.046645 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3256 00:41:04.053483 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3257 00:41:04.056450 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3258 00:41:04.059636 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3259 00:41:04.063163 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3260 00:41:04.066470 All bytes gating window > 1UI, Early break!
3261 00:41:04.069999
3262 00:41:04.073008 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
3263 00:41:04.073085
3264 00:41:04.076556 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
3265 00:41:04.076635
3266 00:41:04.076695
3267 00:41:04.076770
3268 00:41:04.079705 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3269 00:41:04.079783
3270 00:41:04.083236 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3271 00:41:04.083314
3272 00:41:04.083374
3273 00:41:04.086708 Write Rank1 MR1 =0x56
3274 00:41:04.086786
3275 00:41:04.089831 best RODT dly(2T, 0.5T) = (2, 3)
3276 00:41:04.089931
3277 00:41:04.093271 best RODT dly(2T, 0.5T) = (2, 3)
3278 00:41:04.093350 ==
3279 00:41:04.096676 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3280 00:41:04.099519 fsp= 1, odt_onoff= 1, Byte mode= 0
3281 00:41:04.099613 ==
3282 00:41:04.106562 Start DQ dly to find pass range UseTestEngine =0
3283 00:41:04.109620 x-axis: bit #, y-axis: DQ dly (-127~63)
3284 00:41:04.109697 RX Vref Scan = 0
3285 00:41:04.113021 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3286 00:41:04.116211 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3287 00:41:04.119670 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3288 00:41:04.123232 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3289 00:41:04.126644 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3290 00:41:04.130071 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3291 00:41:04.130152 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3292 00:41:04.133182 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3293 00:41:04.136249 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3294 00:41:04.139481 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3295 00:41:04.142822 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3296 00:41:04.146409 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3297 00:41:04.149569 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3298 00:41:04.152647 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3299 00:41:04.152752 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3300 00:41:04.156207 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3301 00:41:04.159811 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3302 00:41:04.163327 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3303 00:41:04.166428 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3304 00:41:04.169492 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3305 00:41:04.172905 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3306 00:41:04.172986 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3307 00:41:04.176127 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3308 00:41:04.179620 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3309 00:41:04.182964 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3310 00:41:04.186331 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3311 00:41:04.189739 0, [0] xxxxxxxx xxxxxxxx [MSB]
3312 00:41:04.192711 1, [0] xxxxxxxx xoxxxxxo [MSB]
3313 00:41:04.192791 2, [0] xxxoxxxx xoxxxxxo [MSB]
3314 00:41:04.196150 3, [0] xxxoxxxx ooxxxxxo [MSB]
3315 00:41:04.199495 4, [0] xxooxxxx oooxxxxo [MSB]
3316 00:41:04.202977 5, [0] xxoooxxx oooooxoo [MSB]
3317 00:41:04.206377 6, [0] xxoooxxx oooooooo [MSB]
3318 00:41:04.209536 7, [0] xooooxxo oooooooo [MSB]
3319 00:41:04.209605 8, [0] ooooooxo oooooooo [MSB]
3320 00:41:04.213088 31, [0] oooooooo ooooooox [MSB]
3321 00:41:04.216067 32, [0] oooooooo ooooooox [MSB]
3322 00:41:04.219438 33, [0] oooooooo ooooooox [MSB]
3323 00:41:04.222972 34, [0] oooooooo oxooooox [MSB]
3324 00:41:04.226713 35, [0] oooooooo xxooooox [MSB]
3325 00:41:04.229495 36, [0] ooxxoooo xxooooox [MSB]
3326 00:41:04.229573 37, [0] ooxxoooo xxooooox [MSB]
3327 00:41:04.232529 38, [0] ooxxxooo xxxoooox [MSB]
3328 00:41:04.236203 39, [0] ooxxxoox xxxxxxxx [MSB]
3329 00:41:04.239532 40, [0] oxxxxoox xxxxxxxx [MSB]
3330 00:41:04.242668 41, [0] xxxxxxox xxxxxxxx [MSB]
3331 00:41:04.246370 42, [0] xxxxxxxx xxxxxxxx [MSB]
3332 00:41:04.249275 iDelay=42, Bit 0, Center 24 (8 ~ 40) 33
3333 00:41:04.252649 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
3334 00:41:04.255912 iDelay=42, Bit 2, Center 19 (4 ~ 35) 32
3335 00:41:04.259371 iDelay=42, Bit 3, Center 18 (2 ~ 35) 34
3336 00:41:04.262786 iDelay=42, Bit 4, Center 21 (5 ~ 37) 33
3337 00:41:04.265852 iDelay=42, Bit 5, Center 24 (8 ~ 40) 33
3338 00:41:04.269335 iDelay=42, Bit 6, Center 25 (9 ~ 41) 33
3339 00:41:04.272763 iDelay=42, Bit 7, Center 22 (7 ~ 38) 32
3340 00:41:04.275828 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
3341 00:41:04.279666 iDelay=42, Bit 9, Center 17 (1 ~ 33) 33
3342 00:41:04.282407 iDelay=42, Bit 10, Center 20 (4 ~ 37) 34
3343 00:41:04.285814 iDelay=42, Bit 11, Center 21 (5 ~ 38) 34
3344 00:41:04.292570 iDelay=42, Bit 12, Center 21 (5 ~ 38) 34
3345 00:41:04.296070 iDelay=42, Bit 13, Center 22 (6 ~ 38) 33
3346 00:41:04.298947 iDelay=42, Bit 14, Center 21 (5 ~ 38) 34
3347 00:41:04.302313 iDelay=42, Bit 15, Center 15 (1 ~ 30) 30
3348 00:41:04.302390 ==
3349 00:41:04.305862 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3350 00:41:04.309437 fsp= 1, odt_onoff= 1, Byte mode= 0
3351 00:41:04.309515 ==
3352 00:41:04.312667 DQS Delay:
3353 00:41:04.312741 DQS0 = 0, DQS1 = 0
3354 00:41:04.315924 DQM Delay:
3355 00:41:04.316002 DQM0 = 22, DQM1 = 19
3356 00:41:04.316063 DQ Delay:
3357 00:41:04.318905 DQ0 =24, DQ1 =23, DQ2 =19, DQ3 =18
3358 00:41:04.322172 DQ4 =21, DQ5 =24, DQ6 =25, DQ7 =22
3359 00:41:04.325744 DQ8 =18, DQ9 =17, DQ10 =20, DQ11 =21
3360 00:41:04.328958 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =15
3361 00:41:04.329035
3362 00:41:04.329094
3363 00:41:04.332515 DramC Write-DBI off
3364 00:41:04.332593 ==
3365 00:41:04.339304 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3366 00:41:04.339381 fsp= 1, odt_onoff= 1, Byte mode= 0
3367 00:41:04.342365 ==
3368 00:41:04.345738 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3369 00:41:04.345815
3370 00:41:04.349094 Begin, DQ Scan Range 928~1184
3371 00:41:04.349171
3372 00:41:04.349231
3373 00:41:04.349286 TX Vref Scan disable
3374 00:41:04.352528 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3375 00:41:04.358913 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3376 00:41:04.362398 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3377 00:41:04.365685 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3378 00:41:04.369180 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3379 00:41:04.372287 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3380 00:41:04.375553 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3381 00:41:04.378799 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3382 00:41:04.382339 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3383 00:41:04.385388 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3384 00:41:04.389169 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3385 00:41:04.392005 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3386 00:41:04.395319 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3387 00:41:04.398767 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3388 00:41:04.402213 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3389 00:41:04.405500 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3390 00:41:04.412304 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3391 00:41:04.415713 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3392 00:41:04.418642 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3393 00:41:04.421883 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3394 00:41:04.425632 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3395 00:41:04.428503 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3396 00:41:04.432339 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3397 00:41:04.435239 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3398 00:41:04.438784 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3399 00:41:04.441874 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3400 00:41:04.445579 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3401 00:41:04.448557 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3402 00:41:04.451968 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3403 00:41:04.455480 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3404 00:41:04.458790 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3405 00:41:04.462474 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3406 00:41:04.465126 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3407 00:41:04.472103 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3408 00:41:04.475449 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3409 00:41:04.478573 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3410 00:41:04.482200 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3411 00:41:04.485446 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3412 00:41:04.488787 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3413 00:41:04.491717 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3414 00:41:04.495450 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3415 00:41:04.498726 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3416 00:41:04.501777 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3417 00:41:04.505146 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3418 00:41:04.508733 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3419 00:41:04.512139 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3420 00:41:04.515543 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3421 00:41:04.518593 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
3422 00:41:04.522274 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
3423 00:41:04.525591 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3424 00:41:04.528476 978 |3 6 18|[0] xxxxxxxx ooxxxxxo [MSB]
3425 00:41:04.532000 979 |3 6 19|[0] xxxxxxxx oooxxxxo [MSB]
3426 00:41:04.538780 980 |3 6 20|[0] xxxxxxxx ooooxxoo [MSB]
3427 00:41:04.541763 981 |3 6 21|[0] xxxxxxxx oooooxoo [MSB]
3428 00:41:04.545245 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3429 00:41:04.548409 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
3430 00:41:04.551994 984 |3 6 24|[0] xxxxxxxx oooooooo [MSB]
3431 00:41:04.555245 985 |3 6 25|[0] xxoooxoo oooooooo [MSB]
3432 00:41:04.558634 986 |3 6 26|[0] xooooooo oooooooo [MSB]
3433 00:41:04.562279 994 |3 6 34|[0] oooooooo ooooooox [MSB]
3434 00:41:04.565409 995 |3 6 35|[0] oooooooo oxooooox [MSB]
3435 00:41:04.568688 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3436 00:41:04.572237 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3437 00:41:04.578670 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3438 00:41:04.581626 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3439 00:41:04.585018 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
3440 00:41:04.588274 1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]
3441 00:41:04.591560 1002 |3 6 42|[0] oooooooo xxxxxxxx [MSB]
3442 00:41:04.594739 1003 |3 6 43|[0] oooooooo xxxxxxxx [MSB]
3443 00:41:04.597978 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
3444 00:41:04.601514 1005 |3 6 45|[0] oooxoooo xxxxxxxx [MSB]
3445 00:41:04.604650 1006 |3 6 46|[0] oooxoooo xxxxxxxx [MSB]
3446 00:41:04.608268 1007 |3 6 47|[0] ooxxooxo xxxxxxxx [MSB]
3447 00:41:04.611278 1008 |3 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3448 00:41:04.614743 Byte0, DQ PI dly=995, DQM PI dly= 995
3449 00:41:04.621838 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 35)
3450 00:41:04.621940
3451 00:41:04.625115 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 35)
3452 00:41:04.625195
3453 00:41:04.628309 Byte1, DQ PI dly=986, DQM PI dly= 986
3454 00:41:04.631312 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3455 00:41:04.631392
3456 00:41:04.637914 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3457 00:41:04.638022
3458 00:41:04.638116 ==
3459 00:41:04.641570 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3460 00:41:04.645052 fsp= 1, odt_onoff= 1, Byte mode= 0
3461 00:41:04.645132 ==
3462 00:41:04.651705 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3463 00:41:04.651789
3464 00:41:04.654651 Begin, DQ Scan Range 962~1026
3465 00:41:04.654755 Write Rank1 MR14 =0x0
3466 00:41:04.663576
3467 00:41:04.663654 CH=1, VrefRange= 0, VrefLevel = 0
3468 00:41:04.670170 TX Bit0 (990~1003) 14 996, Bit8 (981~991) 11 986,
3469 00:41:04.673538 TX Bit1 (988~1001) 14 994, Bit9 (980~990) 11 985,
3470 00:41:04.680298 TX Bit2 (986~1000) 15 993, Bit10 (983~993) 11 988,
3471 00:41:04.683636 TX Bit3 (984~997) 14 990, Bit11 (983~995) 13 989,
3472 00:41:04.686813 TX Bit4 (986~1003) 18 994, Bit12 (984~994) 11 989,
3473 00:41:04.693951 TX Bit5 (990~1001) 12 995, Bit13 (984~993) 10 988,
3474 00:41:04.696741 TX Bit6 (987~1001) 15 994, Bit14 (983~994) 12 988,
3475 00:41:04.703645 TX Bit7 (988~1002) 15 995, Bit15 (976~987) 12 981,
3476 00:41:04.703723
3477 00:41:04.703783 Write Rank1 MR14 =0x2
3478 00:41:04.712798
3479 00:41:04.712874 CH=1, VrefRange= 0, VrefLevel = 2
3480 00:41:04.719542 TX Bit0 (990~1003) 14 996, Bit8 (980~992) 13 986,
3481 00:41:04.723214 TX Bit1 (988~1001) 14 994, Bit9 (980~991) 12 985,
3482 00:41:04.729517 TX Bit2 (985~1001) 17 993, Bit10 (982~994) 13 988,
3483 00:41:04.733246 TX Bit3 (984~999) 16 991, Bit11 (983~996) 14 989,
3484 00:41:04.736529 TX Bit4 (986~1004) 19 995, Bit12 (983~995) 13 989,
3485 00:41:04.742621 TX Bit5 (989~1002) 14 995, Bit13 (984~994) 11 989,
3486 00:41:04.745850 TX Bit6 (987~1002) 16 994, Bit14 (983~995) 13 989,
3487 00:41:04.752577 TX Bit7 (988~1003) 16 995, Bit15 (975~989) 15 982,
3488 00:41:04.752660
3489 00:41:04.752739 Write Rank1 MR14 =0x4
3490 00:41:04.762285
3491 00:41:04.762364 CH=1, VrefRange= 0, VrefLevel = 4
3492 00:41:04.768865 TX Bit0 (989~1005) 17 997, Bit8 (978~992) 15 985,
3493 00:41:04.772213 TX Bit1 (987~1003) 17 995, Bit9 (979~991) 13 985,
3494 00:41:04.778993 TX Bit2 (985~1002) 18 993, Bit10 (982~995) 14 988,
3495 00:41:04.782983 TX Bit3 (983~1000) 18 991, Bit11 (983~996) 14 989,
3496 00:41:04.785411 TX Bit4 (986~1004) 19 995, Bit12 (983~995) 13 989,
3497 00:41:04.792288 TX Bit5 (989~1003) 15 996, Bit13 (983~995) 13 989,
3498 00:41:04.795527 TX Bit6 (986~1003) 18 994, Bit14 (982~995) 14 988,
3499 00:41:04.801804 TX Bit7 (987~1003) 17 995, Bit15 (975~990) 16 982,
3500 00:41:04.801917
3501 00:41:04.802047 Write Rank1 MR14 =0x6
3502 00:41:04.811794
3503 00:41:04.811872 CH=1, VrefRange= 0, VrefLevel = 6
3504 00:41:04.818794 TX Bit0 (989~1006) 18 997, Bit8 (979~993) 15 986,
3505 00:41:04.821955 TX Bit1 (987~1004) 18 995, Bit9 (978~992) 15 985,
3506 00:41:04.828269 TX Bit2 (985~1002) 18 993, Bit10 (981~995) 15 988,
3507 00:41:04.831757 TX Bit3 (983~1000) 18 991, Bit11 (982~998) 17 990,
3508 00:41:04.835273 TX Bit4 (986~1005) 20 995, Bit12 (983~996) 14 989,
3509 00:41:04.841863 TX Bit5 (988~1004) 17 996, Bit13 (983~996) 14 989,
3510 00:41:04.845222 TX Bit6 (986~1004) 19 995, Bit14 (982~996) 15 989,
3511 00:41:04.851378 TX Bit7 (987~1004) 18 995, Bit15 (975~991) 17 983,
3512 00:41:04.851457
3513 00:41:04.851518 Write Rank1 MR14 =0x8
3514 00:41:04.861803
3515 00:41:04.861880 CH=1, VrefRange= 0, VrefLevel = 8
3516 00:41:04.868365 TX Bit0 (989~1006) 18 997, Bit8 (977~993) 17 985,
3517 00:41:04.871556 TX Bit1 (987~1005) 19 996, Bit9 (978~992) 15 985,
3518 00:41:04.878222 TX Bit2 (985~1003) 19 994, Bit10 (981~996) 16 988,
3519 00:41:04.881709 TX Bit3 (983~1001) 19 992, Bit11 (982~998) 17 990,
3520 00:41:04.885214 TX Bit4 (985~1006) 22 995, Bit12 (982~997) 16 989,
3521 00:41:04.891753 TX Bit5 (987~1006) 20 996, Bit13 (983~996) 14 989,
3522 00:41:04.895007 TX Bit6 (986~1005) 20 995, Bit14 (982~996) 15 989,
3523 00:41:04.901278 TX Bit7 (986~1005) 20 995, Bit15 (974~991) 18 982,
3524 00:41:04.901357
3525 00:41:04.901418 Write Rank1 MR14 =0xa
3526 00:41:04.911438
3527 00:41:04.914467 CH=1, VrefRange= 0, VrefLevel = 10
3528 00:41:04.917920 TX Bit0 (988~1006) 19 997, Bit8 (977~993) 17 985,
3529 00:41:04.921560 TX Bit1 (986~1006) 21 996, Bit9 (977~993) 17 985,
3530 00:41:04.927999 TX Bit2 (985~1004) 20 994, Bit10 (980~997) 18 988,
3531 00:41:04.931409 TX Bit3 (982~1001) 20 991, Bit11 (982~999) 18 990,
3532 00:41:04.934897 TX Bit4 (985~1006) 22 995, Bit12 (982~997) 16 989,
3533 00:41:04.940952 TX Bit5 (987~1006) 20 996, Bit13 (983~997) 15 990,
3534 00:41:04.944733 TX Bit6 (986~1006) 21 996, Bit14 (981~997) 17 989,
3535 00:41:04.951000 TX Bit7 (986~1006) 21 996, Bit15 (974~992) 19 983,
3536 00:41:04.951075
3537 00:41:04.951134 Write Rank1 MR14 =0xc
3538 00:41:04.961331
3539 00:41:04.964667 CH=1, VrefRange= 0, VrefLevel = 12
3540 00:41:04.967444 TX Bit0 (987~1007) 21 997, Bit8 (976~994) 19 985,
3541 00:41:04.970997 TX Bit1 (986~1006) 21 996, Bit9 (977~993) 17 985,
3542 00:41:04.977663 TX Bit2 (985~1005) 21 995, Bit10 (980~998) 19 989,
3543 00:41:04.981326 TX Bit3 (982~1001) 20 991, Bit11 (981~999) 19 990,
3544 00:41:04.985258 TX Bit4 (985~1006) 22 995, Bit12 (982~998) 17 990,
3545 00:41:04.991424 TX Bit5 (987~1007) 21 997, Bit13 (982~998) 17 990,
3546 00:41:04.994283 TX Bit6 (986~1006) 21 996, Bit14 (980~998) 19 989,
3547 00:41:05.001443 TX Bit7 (986~1006) 21 996, Bit15 (973~992) 20 982,
3548 00:41:05.001525
3549 00:41:05.001603 Write Rank1 MR14 =0xe
3550 00:41:05.010801
3551 00:41:05.014335 CH=1, VrefRange= 0, VrefLevel = 14
3552 00:41:05.017664 TX Bit0 (987~1007) 21 997, Bit8 (976~994) 19 985,
3553 00:41:05.020872 TX Bit1 (986~1006) 21 996, Bit9 (977~994) 18 985,
3554 00:41:05.027652 TX Bit2 (984~1006) 23 995, Bit10 (979~998) 20 988,
3555 00:41:05.030887 TX Bit3 (982~1002) 21 992, Bit11 (981~999) 19 990,
3556 00:41:05.034243 TX Bit4 (985~1007) 23 996, Bit12 (981~998) 18 989,
3557 00:41:05.041200 TX Bit5 (986~1007) 22 996, Bit13 (982~999) 18 990,
3558 00:41:05.044360 TX Bit6 (986~1006) 21 996, Bit14 (981~998) 18 989,
3559 00:41:05.050644 TX Bit7 (986~1006) 21 996, Bit15 (973~992) 20 982,
3560 00:41:05.050723
3561 00:41:05.050784 Write Rank1 MR14 =0x10
3562 00:41:05.060870
3563 00:41:05.064257 CH=1, VrefRange= 0, VrefLevel = 16
3564 00:41:05.067822 TX Bit0 (987~1007) 21 997, Bit8 (976~995) 20 985,
3565 00:41:05.071079 TX Bit1 (986~1007) 22 996, Bit9 (977~994) 18 985,
3566 00:41:05.077407 TX Bit2 (984~1006) 23 995, Bit10 (979~999) 21 989,
3567 00:41:05.080806 TX Bit3 (981~1003) 23 992, Bit11 (980~1000) 21 990,
3568 00:41:05.087163 TX Bit4 (985~1007) 23 996, Bit12 (981~999) 19 990,
3569 00:41:05.090885 TX Bit5 (986~1007) 22 996, Bit13 (982~999) 18 990,
3570 00:41:05.094246 TX Bit6 (986~1007) 22 996, Bit14 (980~999) 20 989,
3571 00:41:05.100393 TX Bit7 (986~1007) 22 996, Bit15 (973~993) 21 983,
3572 00:41:05.100474
3573 00:41:05.100553 Write Rank1 MR14 =0x12
3574 00:41:05.111247
3575 00:41:05.114291 CH=1, VrefRange= 0, VrefLevel = 18
3576 00:41:05.117852 TX Bit0 (987~1007) 21 997, Bit8 (976~995) 20 985,
3577 00:41:05.121380 TX Bit1 (986~1007) 22 996, Bit9 (976~994) 19 985,
3578 00:41:05.127822 TX Bit2 (984~1006) 23 995, Bit10 (978~999) 22 988,
3579 00:41:05.130943 TX Bit3 (981~1003) 23 992, Bit11 (980~1000) 21 990,
3580 00:41:05.134117 TX Bit4 (984~1007) 24 995, Bit12 (981~999) 19 990,
3581 00:41:05.141125 TX Bit5 (986~1007) 22 996, Bit13 (982~1000) 19 991,
3582 00:41:05.144394 TX Bit6 (985~1007) 23 996, Bit14 (979~999) 21 989,
3583 00:41:05.150800 TX Bit7 (986~1007) 22 996, Bit15 (972~993) 22 982,
3584 00:41:05.150879
3585 00:41:05.150940 Write Rank1 MR14 =0x14
3586 00:41:05.161404
3587 00:41:05.164750 CH=1, VrefRange= 0, VrefLevel = 20
3588 00:41:05.168112 TX Bit0 (986~1008) 23 997, Bit8 (976~996) 21 986,
3589 00:41:05.171117 TX Bit1 (986~1007) 22 996, Bit9 (976~995) 20 985,
3590 00:41:05.177672 TX Bit2 (984~1006) 23 995, Bit10 (978~999) 22 988,
3591 00:41:05.181386 TX Bit3 (981~1004) 24 992, Bit11 (979~1000) 22 989,
3592 00:41:05.187533 TX Bit4 (984~1007) 24 995, Bit12 (980~1000) 21 990,
3593 00:41:05.191069 TX Bit5 (986~1007) 22 996, Bit13 (981~1000) 20 990,
3594 00:41:05.194240 TX Bit6 (985~1007) 23 996, Bit14 (979~999) 21 989,
3595 00:41:05.200848 TX Bit7 (985~1007) 23 996, Bit15 (971~994) 24 982,
3596 00:41:05.200925
3597 00:41:05.200985 Write Rank1 MR14 =0x16
3598 00:41:05.211801
3599 00:41:05.215104 CH=1, VrefRange= 0, VrefLevel = 22
3600 00:41:05.218276 TX Bit0 (986~1008) 23 997, Bit8 (975~997) 23 986,
3601 00:41:05.221595 TX Bit1 (985~1007) 23 996, Bit9 (976~995) 20 985,
3602 00:41:05.228192 TX Bit2 (983~1007) 25 995, Bit10 (978~999) 22 988,
3603 00:41:05.231734 TX Bit3 (980~1005) 26 992, Bit11 (979~1001) 23 990,
3604 00:41:05.238227 TX Bit4 (984~1007) 24 995, Bit12 (980~1000) 21 990,
3605 00:41:05.241263 TX Bit5 (985~1008) 24 996, Bit13 (981~1000) 20 990,
3606 00:41:05.244540 TX Bit6 (985~1007) 23 996, Bit14 (979~999) 21 989,
3607 00:41:05.251255 TX Bit7 (985~1007) 23 996, Bit15 (971~995) 25 983,
3608 00:41:05.251334
3609 00:41:05.251394 Write Rank1 MR14 =0x18
3610 00:41:05.262135
3611 00:41:05.265665 CH=1, VrefRange= 0, VrefLevel = 24
3612 00:41:05.268506 TX Bit0 (986~1008) 23 997, Bit8 (975~998) 24 986,
3613 00:41:05.271841 TX Bit1 (985~1008) 24 996, Bit9 (975~997) 23 986,
3614 00:41:05.278992 TX Bit2 (983~1007) 25 995, Bit10 (978~1000) 23 989,
3615 00:41:05.281865 TX Bit3 (980~1006) 27 993, Bit11 (978~1001) 24 989,
3616 00:41:05.288702 TX Bit4 (984~1008) 25 996, Bit12 (979~1000) 22 989,
3617 00:41:05.292061 TX Bit5 (985~1008) 24 996, Bit13 (981~1001) 21 991,
3618 00:41:05.295398 TX Bit6 (985~1007) 23 996, Bit14 (978~1000) 23 989,
3619 00:41:05.301959 TX Bit7 (985~1007) 23 996, Bit15 (971~995) 25 983,
3620 00:41:05.302080
3621 00:41:05.302182 Write Rank1 MR14 =0x1a
3622 00:41:05.312719
3623 00:41:05.316056 CH=1, VrefRange= 0, VrefLevel = 26
3624 00:41:05.319469 TX Bit0 (986~1009) 24 997, Bit8 (974~998) 25 986,
3625 00:41:05.322631 TX Bit1 (984~1008) 25 996, Bit9 (975~998) 24 986,
3626 00:41:05.329592 TX Bit2 (982~1007) 26 994, Bit10 (977~1000) 24 988,
3627 00:41:05.333318 TX Bit3 (979~1006) 28 992, Bit11 (978~1001) 24 989,
3628 00:41:05.339501 TX Bit4 (984~1008) 25 996, Bit12 (979~1000) 22 989,
3629 00:41:05.342777 TX Bit5 (985~1008) 24 996, Bit13 (980~1001) 22 990,
3630 00:41:05.346267 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3631 00:41:05.352405 TX Bit7 (985~1008) 24 996, Bit15 (970~996) 27 983,
3632 00:41:05.352483
3633 00:41:05.352543 Write Rank1 MR14 =0x1c
3634 00:41:05.363366
3635 00:41:05.363443 CH=1, VrefRange= 0, VrefLevel = 28
3636 00:41:05.370280 TX Bit0 (986~1009) 24 997, Bit8 (974~999) 26 986,
3637 00:41:05.373712 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3638 00:41:05.380675 TX Bit2 (983~1007) 25 995, Bit10 (977~1000) 24 988,
3639 00:41:05.383280 TX Bit3 (979~1006) 28 992, Bit11 (978~1001) 24 989,
3640 00:41:05.390227 TX Bit4 (984~1008) 25 996, Bit12 (979~1001) 23 990,
3641 00:41:05.393297 TX Bit5 (985~1008) 24 996, Bit13 (979~1001) 23 990,
3642 00:41:05.396570 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3643 00:41:05.403361 TX Bit7 (985~1008) 24 996, Bit15 (970~996) 27 983,
3644 00:41:05.403474
3645 00:41:05.403561 Write Rank1 MR14 =0x1e
3646 00:41:05.414056
3647 00:41:05.417455 CH=1, VrefRange= 0, VrefLevel = 30
3648 00:41:05.420904 TX Bit0 (985~1009) 25 997, Bit8 (975~999) 25 987,
3649 00:41:05.423907 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3650 00:41:05.430604 TX Bit2 (982~1007) 26 994, Bit10 (977~1001) 25 989,
3651 00:41:05.433942 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3652 00:41:05.440659 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3653 00:41:05.444125 TX Bit5 (985~1009) 25 997, Bit13 (978~1001) 24 989,
3654 00:41:05.447074 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3655 00:41:05.454195 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3656 00:41:05.454277
3657 00:41:05.454365 Write Rank1 MR14 =0x20
3658 00:41:05.465019
3659 00:41:05.465098 CH=1, VrefRange= 0, VrefLevel = 32
3660 00:41:05.471741 TX Bit0 (985~1009) 25 997, Bit8 (975~999) 25 987,
3661 00:41:05.475034 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3662 00:41:05.481230 TX Bit2 (982~1007) 26 994, Bit10 (977~1001) 25 989,
3663 00:41:05.484633 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3664 00:41:05.491208 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3665 00:41:05.495058 TX Bit5 (985~1009) 25 997, Bit13 (978~1001) 24 989,
3666 00:41:05.497866 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3667 00:41:05.504554 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3668 00:41:05.504648
3669 00:41:05.504738 Write Rank1 MR14 =0x22
3670 00:41:05.515529
3671 00:41:05.518780 CH=1, VrefRange= 0, VrefLevel = 34
3672 00:41:05.522278 TX Bit0 (985~1009) 25 997, Bit8 (975~999) 25 987,
3673 00:41:05.525780 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3674 00:41:05.532134 TX Bit2 (982~1007) 26 994, Bit10 (977~1001) 25 989,
3675 00:41:05.535605 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3676 00:41:05.541937 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3677 00:41:05.545349 TX Bit5 (985~1009) 25 997, Bit13 (978~1001) 24 989,
3678 00:41:05.548954 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3679 00:41:05.555472 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3680 00:41:05.555551
3681 00:41:05.555612 Write Rank1 MR14 =0x24
3682 00:41:05.566099
3683 00:41:05.569656 CH=1, VrefRange= 0, VrefLevel = 36
3684 00:41:05.572923 TX Bit0 (985~1009) 25 997, Bit8 (975~999) 25 987,
3685 00:41:05.576411 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3686 00:41:05.582680 TX Bit2 (982~1007) 26 994, Bit10 (977~1001) 25 989,
3687 00:41:05.586191 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3688 00:41:05.592537 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3689 00:41:05.596324 TX Bit5 (985~1009) 25 997, Bit13 (978~1001) 24 989,
3690 00:41:05.599512 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3691 00:41:05.606340 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3692 00:41:05.606455
3693 00:41:05.606526 Write Rank1 MR14 =0x26
3694 00:41:05.617451
3695 00:41:05.620064 CH=1, VrefRange= 0, VrefLevel = 38
3696 00:41:05.623659 TX Bit0 (985~1009) 25 997, Bit8 (975~999) 25 987,
3697 00:41:05.627251 TX Bit1 (985~1008) 24 996, Bit9 (974~998) 25 986,
3698 00:41:05.633701 TX Bit2 (982~1007) 26 994, Bit10 (977~1001) 25 989,
3699 00:41:05.637116 TX Bit3 (979~1006) 28 992, Bit11 (977~1000) 24 988,
3700 00:41:05.640457 TX Bit4 (985~1008) 24 996, Bit12 (978~1001) 24 989,
3701 00:41:05.647024 TX Bit5 (985~1009) 25 997, Bit13 (978~1001) 24 989,
3702 00:41:05.650298 TX Bit6 (984~1008) 25 996, Bit14 (978~1000) 23 989,
3703 00:41:05.657211 TX Bit7 (984~1008) 25 996, Bit15 (970~995) 26 982,
3704 00:41:05.657293
3705 00:41:05.657354
3706 00:41:05.660588 TX Vref found, early break! 368< 378
3707 00:41:05.663843 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
3708 00:41:05.666709 u1DelayCellOfst[0]=5 cells (5 PI)
3709 00:41:05.670262 u1DelayCellOfst[1]=4 cells (4 PI)
3710 00:41:05.673894 u1DelayCellOfst[2]=2 cells (2 PI)
3711 00:41:05.676947 u1DelayCellOfst[3]=0 cells (0 PI)
3712 00:41:05.680022 u1DelayCellOfst[4]=4 cells (4 PI)
3713 00:41:05.683359 u1DelayCellOfst[5]=5 cells (5 PI)
3714 00:41:05.686810 u1DelayCellOfst[6]=4 cells (4 PI)
3715 00:41:05.690252 u1DelayCellOfst[7]=4 cells (4 PI)
3716 00:41:05.693140 Byte0, DQ PI dly=992, DQM PI dly= 994
3717 00:41:05.696504 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3718 00:41:05.696582
3719 00:41:05.699855 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3720 00:41:05.699933
3721 00:41:05.703366 u1DelayCellOfst[8]=5 cells (5 PI)
3722 00:41:05.706682 u1DelayCellOfst[9]=4 cells (4 PI)
3723 00:41:05.710326 u1DelayCellOfst[10]=8 cells (7 PI)
3724 00:41:05.713561 u1DelayCellOfst[11]=6 cells (6 PI)
3725 00:41:05.716748 u1DelayCellOfst[12]=8 cells (7 PI)
3726 00:41:05.720199 u1DelayCellOfst[13]=8 cells (7 PI)
3727 00:41:05.723617 u1DelayCellOfst[14]=8 cells (7 PI)
3728 00:41:05.726983 u1DelayCellOfst[15]=0 cells (0 PI)
3729 00:41:05.730017 Byte1, DQ PI dly=982, DQM PI dly= 985
3730 00:41:05.733193 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3731 00:41:05.733271
3732 00:41:05.736624 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3733 00:41:05.736702
3734 00:41:05.740264 Write Rank1 MR14 =0x1e
3735 00:41:05.740342
3736 00:41:05.743460 Final TX Range 0 Vref 30
3737 00:41:05.743538
3738 00:41:05.749768 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3739 00:41:05.749847
3740 00:41:05.757004 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3741 00:41:05.763341 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3742 00:41:05.769744 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3743 00:41:05.772956 Write Rank1 MR3 =0xb0
3744 00:41:05.773033 DramC Write-DBI on
3745 00:41:05.773094 ==
3746 00:41:05.780062 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3747 00:41:05.783271 fsp= 1, odt_onoff= 1, Byte mode= 0
3748 00:41:05.783349 ==
3749 00:41:05.786859 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3750 00:41:05.786936
3751 00:41:05.789908 Begin, DQ Scan Range 705~769
3752 00:41:05.789992
3753 00:41:05.790056
3754 00:41:05.790111 TX Vref Scan disable
3755 00:41:05.796337 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3756 00:41:05.799569 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3757 00:41:05.803051 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3758 00:41:05.806257 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3759 00:41:05.809673 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3760 00:41:05.813185 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3761 00:41:05.816301 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3762 00:41:05.819765 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3763 00:41:05.823087 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3764 00:41:05.826457 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3765 00:41:05.829749 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3766 00:41:05.832930 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3767 00:41:05.836204 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3768 00:41:05.839487 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3769 00:41:05.843429 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3770 00:41:05.846353 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3771 00:41:05.849798 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3772 00:41:05.853106 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3773 00:41:05.856105 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3774 00:41:05.859570 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3775 00:41:05.866513 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3776 00:41:05.869554 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3777 00:41:05.872940 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
3778 00:41:05.876792 728 |2 6 24|[0] xxxxxxxx oooooooo [MSB]
3779 00:41:05.879958 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3780 00:41:05.886321 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3781 00:41:05.889523 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3782 00:41:05.892756 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3783 00:41:05.896408 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3784 00:41:05.899673 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3785 00:41:05.903292 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3786 00:41:05.906059 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3787 00:41:05.909528 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3788 00:41:05.912947 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
3789 00:41:05.916396 754 |2 6 50|[0] oooooooo xxxxxxxx [MSB]
3790 00:41:05.919930 755 |2 6 51|[0] oooooooo xxxxxxxx [MSB]
3791 00:41:05.922859 756 |2 6 52|[0] xxxxxxxx xxxxxxxx [MSB]
3792 00:41:05.926595 Byte0, DQ PI dly=742, DQM PI dly= 742
3793 00:41:05.932941 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 38)
3794 00:41:05.933007
3795 00:41:05.936415 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 38)
3796 00:41:05.936504
3797 00:41:05.939608 Byte1, DQ PI dly=730, DQM PI dly= 730
3798 00:41:05.943016 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3799 00:41:05.943082
3800 00:41:05.949196 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3801 00:41:05.949279
3802 00:41:05.955854 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3803 00:41:05.962610 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3804 00:41:05.969446 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3805 00:41:05.969524 Write Rank1 MR3 =0x30
3806 00:41:05.972784 DramC Write-DBI off
3807 00:41:05.972862
3808 00:41:05.972922 [DATLAT]
3809 00:41:05.976275 Freq=1600, CH1 RK1, use_rxtx_scan=0
3810 00:41:05.976353
3811 00:41:05.979612 DATLAT Default: 0x10
3812 00:41:05.979689 7, 0xFFFF, sum=0
3813 00:41:05.982928 8, 0xFFFF, sum=0
3814 00:41:05.983008 9, 0xFFFF, sum=0
3815 00:41:05.985740 10, 0xFFFF, sum=0
3816 00:41:05.985818 11, 0xFFFF, sum=0
3817 00:41:05.989020 12, 0xFFFF, sum=0
3818 00:41:05.989099 13, 0xFFFF, sum=0
3819 00:41:05.992700 14, 0x0, sum=1
3820 00:41:05.992778 15, 0x0, sum=2
3821 00:41:05.992839 16, 0x0, sum=3
3822 00:41:05.996126 17, 0x0, sum=4
3823 00:41:05.999035 pattern=2 first_step=14 total pass=5 best_step=16
3824 00:41:05.999113 ==
3825 00:41:06.006244 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3826 00:41:06.009056 fsp= 1, odt_onoff= 1, Byte mode= 0
3827 00:41:06.009135 ==
3828 00:41:06.012403 Start DQ dly to find pass range UseTestEngine =1
3829 00:41:06.015811 x-axis: bit #, y-axis: DQ dly (-127~63)
3830 00:41:06.019120 RX Vref Scan = 0
3831 00:41:06.022658 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3832 00:41:06.022736 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3833 00:41:06.025925 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3834 00:41:06.029160 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3835 00:41:06.032516 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3836 00:41:06.036079 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3837 00:41:06.039309 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3838 00:41:06.042307 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3839 00:41:06.045738 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3840 00:41:06.045813 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3841 00:41:06.049514 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3842 00:41:06.052865 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3843 00:41:06.055696 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3844 00:41:06.059136 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3845 00:41:06.062387 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3846 00:41:06.065694 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3847 00:41:06.069110 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3848 00:41:06.072375 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3849 00:41:06.072447 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3850 00:41:06.075666 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3851 00:41:06.079024 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3852 00:41:06.082703 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3853 00:41:06.085889 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3854 00:41:06.089436 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3855 00:41:06.092490 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3856 00:41:06.092592 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3857 00:41:06.095521 0, [0] xxxxxxxx xxxxxxxo [MSB]
3858 00:41:06.099024 1, [0] xxxxxxxx xoxxxxxo [MSB]
3859 00:41:06.102170 2, [0] xxxxxxxx xoxxxxxo [MSB]
3860 00:41:06.105314 3, [0] xxxoxxxx ooxxxxxo [MSB]
3861 00:41:06.108786 4, [0] xxooxxxx ooxxxxxo [MSB]
3862 00:41:06.108888 5, [0] xxooxxxx ooxxxxxo [MSB]
3863 00:41:06.111755 6, [0] xxoooxxx oooxxxxo [MSB]
3864 00:41:06.115457 7, [0] oooooxxx oooooooo [MSB]
3865 00:41:06.118608 8, [0] ooooooxo oooooooo [MSB]
3866 00:41:06.121945 30, [0] oooooooo ooooooox [MSB]
3867 00:41:06.125116 31, [0] oooooooo ooooooox [MSB]
3868 00:41:06.128581 32, [0] oooooooo ooooooox [MSB]
3869 00:41:06.131883 33, [0] oooooooo oxooooox [MSB]
3870 00:41:06.135114 34, [0] oooooooo xxooooox [MSB]
3871 00:41:06.138568 35, [0] oooxoooo xxooooox [MSB]
3872 00:41:06.138647 36, [0] ooxxoooo xxooooox [MSB]
3873 00:41:06.142129 37, [0] ooxxooox xxooxoxx [MSB]
3874 00:41:06.144980 38, [0] oxxxxoox xxxxxxxx [MSB]
3875 00:41:06.148438 39, [0] xxxxxoox xxxxxxxx [MSB]
3876 00:41:06.151707 40, [0] xxxxxxox xxxxxxxx [MSB]
3877 00:41:06.154973 41, [0] xxxxxxxx xxxxxxxx [MSB]
3878 00:41:06.158235 iDelay=41, Bit 0, Center 22 (7 ~ 38) 32
3879 00:41:06.161681 iDelay=41, Bit 1, Center 22 (7 ~ 37) 31
3880 00:41:06.165181 iDelay=41, Bit 2, Center 19 (4 ~ 35) 32
3881 00:41:06.168573 iDelay=41, Bit 3, Center 18 (3 ~ 34) 32
3882 00:41:06.171799 iDelay=41, Bit 4, Center 21 (6 ~ 37) 32
3883 00:41:06.174928 iDelay=41, Bit 5, Center 23 (8 ~ 39) 32
3884 00:41:06.178468 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
3885 00:41:06.181461 iDelay=41, Bit 7, Center 22 (8 ~ 36) 29
3886 00:41:06.184771 iDelay=41, Bit 8, Center 18 (3 ~ 33) 31
3887 00:41:06.188265 iDelay=41, Bit 9, Center 16 (1 ~ 32) 32
3888 00:41:06.191595 iDelay=41, Bit 10, Center 21 (6 ~ 37) 32
3889 00:41:06.198376 iDelay=41, Bit 11, Center 22 (7 ~ 37) 31
3890 00:41:06.201405 iDelay=41, Bit 12, Center 21 (7 ~ 36) 30
3891 00:41:06.204800 iDelay=41, Bit 13, Center 22 (7 ~ 37) 31
3892 00:41:06.208304 iDelay=41, Bit 14, Center 21 (7 ~ 36) 30
3893 00:41:06.211511 iDelay=41, Bit 15, Center 14 (0 ~ 29) 30
3894 00:41:06.211588 ==
3895 00:41:06.218482 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3896 00:41:06.218560 fsp= 1, odt_onoff= 1, Byte mode= 0
3897 00:41:06.221590 ==
3898 00:41:06.221667 DQS Delay:
3899 00:41:06.221727 DQS0 = 0, DQS1 = 0
3900 00:41:06.224910 DQM Delay:
3901 00:41:06.225031 DQM0 = 21, DQM1 = 19
3902 00:41:06.227932 DQ Delay:
3903 00:41:06.231006 DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =18
3904 00:41:06.231083 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
3905 00:41:06.234766 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =22
3906 00:41:06.238168 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =14
3907 00:41:06.241269
3908 00:41:06.241345
3909 00:41:06.241406
3910 00:41:06.241461 [DramC_TX_OE_Calibration] TA2
3911 00:41:06.244452 Original DQ_B0 (3 6) =30, OEN = 27
3912 00:41:06.248038 Original DQ_B1 (3 6) =30, OEN = 27
3913 00:41:06.251538 23, 0x0, End_B0=23 End_B1=23
3914 00:41:06.254866 24, 0x0, End_B0=24 End_B1=24
3915 00:41:06.257697 25, 0x0, End_B0=25 End_B1=25
3916 00:41:06.257776 26, 0x0, End_B0=26 End_B1=26
3917 00:41:06.261484 27, 0x0, End_B0=27 End_B1=27
3918 00:41:06.264780 28, 0x0, End_B0=28 End_B1=28
3919 00:41:06.267574 29, 0x0, End_B0=29 End_B1=29
3920 00:41:06.271121 30, 0x0, End_B0=30 End_B1=30
3921 00:41:06.271200 31, 0xFFFF, End_B0=30 End_B1=30
3922 00:41:06.277659 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3923 00:41:06.284099 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3924 00:41:06.284177
3925 00:41:06.284237
3926 00:41:06.284293 Write Rank1 MR23 =0x3f
3927 00:41:06.287850 [DQSOSC]
3928 00:41:06.294269 [DQSOSCAuto] RK1, (LSB)MR18= 0xd3d3, (MSB)MR19= 0x202, tDQSOscB0 = 435 ps tDQSOscB1 = 435 ps
3929 00:41:06.301202 CH1_RK1: MR19=0x202, MR18=0xD3D3, DQSOSC=435, MR23=63, INC=13, DEC=19
3930 00:41:06.304094 Write Rank1 MR23 =0x3f
3931 00:41:06.304170 [DQSOSC]
3932 00:41:06.310922 [DQSOSCAuto] RK1, (LSB)MR18= 0xd3d3, (MSB)MR19= 0x202, tDQSOscB0 = 435 ps tDQSOscB1 = 435 ps
3933 00:41:06.314482 CH1 RK1: MR19=202, MR18=D3D3
3934 00:41:06.317708 [RxdqsGatingPostProcess] freq 1600
3935 00:41:06.324650 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3936 00:41:06.324727 Rank: 0
3937 00:41:06.327959 best DQS0 dly(2T, 0.5T) = (2, 6)
3938 00:41:06.330963 best DQS1 dly(2T, 0.5T) = (2, 6)
3939 00:41:06.334299 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3940 00:41:06.337706 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3941 00:41:06.337784 Rank: 1
3942 00:41:06.341247 best DQS0 dly(2T, 0.5T) = (2, 6)
3943 00:41:06.344317 best DQS1 dly(2T, 0.5T) = (2, 6)
3944 00:41:06.347619 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3945 00:41:06.347697 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3946 00:41:06.354188 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3947 00:41:06.357571 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3948 00:41:06.361255 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3949 00:41:06.361333
3950 00:41:06.364038
3951 00:41:06.364115 [Calibration Summary] Freqency 1600
3952 00:41:06.367206 CH 0, Rank 0
3953 00:41:06.367284 All Pass.
3954 00:41:06.367344
3955 00:41:06.370820 CH 0, Rank 1
3956 00:41:06.370897 All Pass.
3957 00:41:06.370958
3958 00:41:06.371014 CH 1, Rank 0
3959 00:41:06.374126 All Pass.
3960 00:41:06.374202
3961 00:41:06.374262 CH 1, Rank 1
3962 00:41:06.374319 All Pass.
3963 00:41:06.374372
3964 00:41:06.380589 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3965 00:41:06.387365 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3966 00:41:06.394251 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3967 00:41:06.396969 Write Rank0 MR3 =0xb0
3968 00:41:06.403794 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3969 00:41:06.410790 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3970 00:41:06.416924 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3971 00:41:06.420618 Write Rank1 MR3 =0xb0
3972 00:41:06.426764 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3973 00:41:06.433925 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3974 00:41:06.440731 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3975 00:41:06.443529 Write Rank0 MR3 =0xb0
3976 00:41:06.450355 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3977 00:41:06.456834 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3978 00:41:06.463430 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3979 00:41:06.463508 Write Rank1 MR3 =0xb0
3980 00:41:06.466601 DramC Write-DBI on
3981 00:41:06.470287 [GetDramInforAfterCalByMRR] Vendor 6.
3982 00:41:06.473171 [GetDramInforAfterCalByMRR] Revision 505.
3983 00:41:06.473248 MR8 1111
3984 00:41:06.480239 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3985 00:41:06.480317 MR8 1111
3986 00:41:06.486874 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3987 00:41:06.486952 MR8 1111
3988 00:41:06.489761 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3989 00:41:06.493027 MR8 1111
3990 00:41:06.496533 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3991 00:41:06.506384 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3992 00:41:06.506463 Write Rank0 MR13 =0xd0
3993 00:41:06.509959 Write Rank1 MR13 =0xd0
3994 00:41:06.513277 Write Rank0 MR13 =0xd0
3995 00:41:06.513354 Write Rank1 MR13 =0xd0
3996 00:41:06.516232 Save calibration result to emmc
3997 00:41:06.516310
3998 00:41:06.516369
3999 00:41:06.519643 [DramcModeReg_Check] Freq_1600, FSP_1
4000 00:41:06.523149 FSP_1, CH_0, RK0
4001 00:41:06.523227 Write Rank0 MR13 =0xd8
4002 00:41:06.526323 MR12 = 0x5e (global = 0x5e) match
4003 00:41:06.529874 MR14 = 0x1e (global = 0x1e) match
4004 00:41:06.532959 FSP_1, CH_0, RK1
4005 00:41:06.533036 Write Rank1 MR13 =0xd8
4006 00:41:06.536121 MR12 = 0x5c (global = 0x5c) match
4007 00:41:06.539610 MR14 = 0x1e (global = 0x1e) match
4008 00:41:06.543032 FSP_1, CH_1, RK0
4009 00:41:06.543109 Write Rank0 MR13 =0xd8
4010 00:41:06.546500 MR12 = 0x60 (global = 0x60) match
4011 00:41:06.549493 MR14 = 0x1e (global = 0x1e) match
4012 00:41:06.552973 FSP_1, CH_1, RK1
4013 00:41:06.553051 Write Rank1 MR13 =0xd8
4014 00:41:06.556485 MR12 = 0x60 (global = 0x60) match
4015 00:41:06.559589 MR14 = 0x1e (global = 0x1e) match
4016 00:41:06.559666
4017 00:41:06.566386 [MEM_TEST] 02: After DFS, before run time config
4018 00:41:06.572696 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4019 00:41:06.572775
4020 00:41:06.576159 [TA2_TEST]
4021 00:41:06.576236 === TA2 HW
4022 00:41:06.579577 TA2 PAT: XTALK
4023 00:41:06.582590 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
4024 00:41:06.585804 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
4025 00:41:06.592679 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
4026 00:41:06.596279 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
4027 00:41:06.596357
4028 00:41:06.596417
4029 00:41:06.599483 Settings after calibration
4030 00:41:06.599560
4031 00:41:06.603043 [DramcRunTimeConfig]
4032 00:41:06.606239 TransferPLLToSPMControl - MODE SW PHYPLL
4033 00:41:06.606317 TX_TRACKING: ON
4034 00:41:06.609177 RX_TRACKING: ON
4035 00:41:06.609254 HW_GATING: ON
4036 00:41:06.612555 HW_GATING DBG: OFF
4037 00:41:06.612632 ddr_geometry:1
4038 00:41:06.612692 ddr_geometry:1
4039 00:41:06.616116 ddr_geometry:1
4040 00:41:06.616193 ddr_geometry:1
4041 00:41:06.619498 ddr_geometry:1
4042 00:41:06.619575 ddr_geometry:1
4043 00:41:06.622363 ddr_geometry:1
4044 00:41:06.622441 ddr_geometry:1
4045 00:41:06.625936 High Freq DUMMY_READ_FOR_TRACKING: ON
4046 00:41:06.629083 ZQCS_ENABLE_LP4: OFF
4047 00:41:06.629161 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
4048 00:41:06.632422 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
4049 00:41:06.636047 SPM_CONTROL_AFTERK: ON
4050 00:41:06.639262 IMPEDANCE_TRACKING: ON
4051 00:41:06.639339 TEMP_SENSOR: ON
4052 00:41:06.642501 PER_BANK_REFRESH: ON
4053 00:41:06.642578 HW_SAVE_FOR_SR: ON
4054 00:41:06.646083 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4055 00:41:06.649514 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
4056 00:41:06.652875 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
4057 00:41:06.656264 Read ODT Tracking: ON
4058 00:41:06.659072 =========================
4059 00:41:06.659150
4060 00:41:06.659210 [TA2_TEST]
4061 00:41:06.659266 === TA2 HW
4062 00:41:06.665775 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4063 00:41:06.668899 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4064 00:41:06.675825 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4065 00:41:06.679208 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4066 00:41:06.679286
4067 00:41:06.682545 [MEM_TEST] 03: After run time config
4068 00:41:06.693274 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4069 00:41:06.696590 [complex_mem_test] start addr:0x40024000, len:131072
4070 00:41:06.901376 1st complex R/W mem test pass
4071 00:41:06.908020 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4072 00:41:06.911314 sync preloader write leveling
4073 00:41:06.914609 sync preloader cbt_mr12
4074 00:41:06.917930 sync preloader cbt_clk_dly
4075 00:41:06.918018 sync preloader cbt_cmd_dly
4076 00:41:06.921326 sync preloader cbt_cs
4077 00:41:06.924236 sync preloader cbt_ca_perbit_delay
4078 00:41:06.924313 sync preloader clk_delay
4079 00:41:06.927666 sync preloader dqs_delay
4080 00:41:06.931059 sync preloader u1Gating2T_Save
4081 00:41:06.934623 sync preloader u1Gating05T_Save
4082 00:41:06.937533 sync preloader u1Gatingfine_tune_Save
4083 00:41:06.940970 sync preloader u1Gatingucpass_count_Save
4084 00:41:06.944373 sync preloader u1TxWindowPerbitVref_Save
4085 00:41:06.947843 sync preloader u1TxCenter_min_Save
4086 00:41:06.950689 sync preloader u1TxCenter_max_Save
4087 00:41:06.954272 sync preloader u1Txwin_center_Save
4088 00:41:06.957352 sync preloader u1Txfirst_pass_Save
4089 00:41:06.960770 sync preloader u1Txlast_pass_Save
4090 00:41:06.964222 sync preloader u1RxDatlat_Save
4091 00:41:06.967295 sync preloader u1RxWinPerbitVref_Save
4092 00:41:06.970557 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4093 00:41:06.973953 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4094 00:41:06.977383 sync preloader delay_cell_unit
4095 00:41:06.984669 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4096 00:41:06.987371 sync preloader write leveling
4097 00:41:06.987449 sync preloader cbt_mr12
4098 00:41:06.990673 sync preloader cbt_clk_dly
4099 00:41:06.994118 sync preloader cbt_cmd_dly
4100 00:41:06.994219 sync preloader cbt_cs
4101 00:41:06.997134 sync preloader cbt_ca_perbit_delay
4102 00:41:07.000612 sync preloader clk_delay
4103 00:41:07.004056 sync preloader dqs_delay
4104 00:41:07.007521 sync preloader u1Gating2T_Save
4105 00:41:07.007600 sync preloader u1Gating05T_Save
4106 00:41:07.010682 sync preloader u1Gatingfine_tune_Save
4107 00:41:07.013874 sync preloader u1Gatingucpass_count_Save
4108 00:41:07.020987 sync preloader u1TxWindowPerbitVref_Save
4109 00:41:07.021064 sync preloader u1TxCenter_min_Save
4110 00:41:07.024146 sync preloader u1TxCenter_max_Save
4111 00:41:07.027562 sync preloader u1Txwin_center_Save
4112 00:41:07.030356 sync preloader u1Txfirst_pass_Save
4113 00:41:07.033819 sync preloader u1Txlast_pass_Save
4114 00:41:07.037246 sync preloader u1RxDatlat_Save
4115 00:41:07.040513 sync preloader u1RxWinPerbitVref_Save
4116 00:41:07.043967 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4117 00:41:07.050692 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4118 00:41:07.050774 sync preloader delay_cell_unit
4119 00:41:07.056973 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4120 00:41:07.060361 sync preloader write leveling
4121 00:41:07.063538 sync preloader cbt_mr12
4122 00:41:07.067190 sync preloader cbt_clk_dly
4123 00:41:07.067265 sync preloader cbt_cmd_dly
4124 00:41:07.070387 sync preloader cbt_cs
4125 00:41:07.073757 sync preloader cbt_ca_perbit_delay
4126 00:41:07.076958 sync preloader clk_delay
4127 00:41:07.077061 sync preloader dqs_delay
4128 00:41:07.080231 sync preloader u1Gating2T_Save
4129 00:41:07.083375 sync preloader u1Gating05T_Save
4130 00:41:07.087188 sync preloader u1Gatingfine_tune_Save
4131 00:41:07.089920 sync preloader u1Gatingucpass_count_Save
4132 00:41:07.093925 sync preloader u1TxWindowPerbitVref_Save
4133 00:41:07.096565 sync preloader u1TxCenter_min_Save
4134 00:41:07.100200 sync preloader u1TxCenter_max_Save
4135 00:41:07.103705 sync preloader u1Txwin_center_Save
4136 00:41:07.106973 sync preloader u1Txfirst_pass_Save
4137 00:41:07.110394 sync preloader u1Txlast_pass_Save
4138 00:41:07.113471 sync preloader u1RxDatlat_Save
4139 00:41:07.116727 sync preloader u1RxWinPerbitVref_Save
4140 00:41:07.119760 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4141 00:41:07.123020 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4142 00:41:07.126907 sync preloader delay_cell_unit
4143 00:41:07.130282 just_for_test_dump_coreboot_params dump all params
4144 00:41:07.133278 dump source = 0x0
4145 00:41:07.133357 dump params frequency:1600
4146 00:41:07.136426 dump params rank number:2
4147 00:41:07.136503
4148 00:41:07.139895 dump params write leveling
4149 00:41:07.143486 write leveling[0][0][0] = 0x20
4150 00:41:07.146747 write leveling[0][0][1] = 0x18
4151 00:41:07.149572 write leveling[0][1][0] = 0x21
4152 00:41:07.149653 write leveling[0][1][1] = 0x17
4153 00:41:07.152972 write leveling[1][0][0] = 0x22
4154 00:41:07.156773 write leveling[1][0][1] = 0x21
4155 00:41:07.159646 write leveling[1][1][0] = 0x28
4156 00:41:07.163164 write leveling[1][1][1] = 0x20
4157 00:41:07.163241 dump params cbt_cs
4158 00:41:07.166485 cbt_cs[0][0] = 0x8
4159 00:41:07.166562 cbt_cs[0][1] = 0x8
4160 00:41:07.169733 cbt_cs[1][0] = 0xa
4161 00:41:07.169811 cbt_cs[1][1] = 0xa
4162 00:41:07.173476 dump params cbt_mr12
4163 00:41:07.173552 cbt_mr12[0][0] = 0x1e
4164 00:41:07.176280 cbt_mr12[0][1] = 0x1c
4165 00:41:07.179725 cbt_mr12[1][0] = 0x20
4166 00:41:07.179803 cbt_mr12[1][1] = 0x20
4167 00:41:07.183027 dump params tx window
4168 00:41:07.186474 tx_center_min[0][0][0] = 985
4169 00:41:07.186551 tx_center_max[0][0][0] = 991
4170 00:41:07.189582 tx_center_min[0][0][1] = 977
4171 00:41:07.192963 tx_center_max[0][0][1] = 984
4172 00:41:07.196447 tx_center_min[0][1][0] = 987
4173 00:41:07.199717 tx_center_max[0][1][0] = 994
4174 00:41:07.199818 tx_center_min[0][1][1] = 978
4175 00:41:07.203319 tx_center_max[0][1][1] = 984
4176 00:41:07.205973 tx_center_min[1][0][0] = 990
4177 00:41:07.209921 tx_center_max[1][0][0] = 995
4178 00:41:07.210052 tx_center_min[1][0][1] = 986
4179 00:41:07.212803 tx_center_max[1][0][1] = 993
4180 00:41:07.216299 tx_center_min[1][1][0] = 992
4181 00:41:07.219959 tx_center_max[1][1][0] = 997
4182 00:41:07.222938 tx_center_min[1][1][1] = 982
4183 00:41:07.223014 tx_center_max[1][1][1] = 989
4184 00:41:07.226324 dump params tx window
4185 00:41:07.229386 tx_win_center[0][0][0] = 991
4186 00:41:07.232648 tx_first_pass[0][0][0] = 979
4187 00:41:07.232724 tx_last_pass[0][0][0] = 1004
4188 00:41:07.236382 tx_win_center[0][0][1] = 990
4189 00:41:07.239699 tx_first_pass[0][0][1] = 979
4190 00:41:07.242601 tx_last_pass[0][0][1] = 1002
4191 00:41:07.246135 tx_win_center[0][0][2] = 991
4192 00:41:07.246211 tx_first_pass[0][0][2] = 980
4193 00:41:07.249564 tx_last_pass[0][0][2] = 1003
4194 00:41:07.252886 tx_win_center[0][0][3] = 985
4195 00:41:07.256342 tx_first_pass[0][0][3] = 975
4196 00:41:07.256419 tx_last_pass[0][0][3] = 996
4197 00:41:07.259506 tx_win_center[0][0][4] = 990
4198 00:41:07.262786 tx_first_pass[0][0][4] = 979
4199 00:41:07.265867 tx_last_pass[0][0][4] = 1002
4200 00:41:07.269284 tx_win_center[0][0][5] = 988
4201 00:41:07.269362 tx_first_pass[0][0][5] = 978
4202 00:41:07.272702 tx_last_pass[0][0][5] = 998
4203 00:41:07.276160 tx_win_center[0][0][6] = 989
4204 00:41:07.279361 tx_first_pass[0][0][6] = 978
4205 00:41:07.282832 tx_last_pass[0][0][6] = 1000
4206 00:41:07.282909 tx_win_center[0][0][7] = 990
4207 00:41:07.285887 tx_first_pass[0][0][7] = 979
4208 00:41:07.289435 tx_last_pass[0][0][7] = 1002
4209 00:41:07.292595 tx_win_center[0][0][8] = 977
4210 00:41:07.292673 tx_first_pass[0][0][8] = 966
4211 00:41:07.296498 tx_last_pass[0][0][8] = 989
4212 00:41:07.299665 tx_win_center[0][0][9] = 978
4213 00:41:07.302873 tx_first_pass[0][0][9] = 967
4214 00:41:07.306348 tx_last_pass[0][0][9] = 990
4215 00:41:07.306426 tx_win_center[0][0][10] = 984
4216 00:41:07.309478 tx_first_pass[0][0][10] = 973
4217 00:41:07.312539 tx_last_pass[0][0][10] = 996
4218 00:41:07.315866 tx_win_center[0][0][11] = 978
4219 00:41:07.319238 tx_first_pass[0][0][11] = 967
4220 00:41:07.319315 tx_last_pass[0][0][11] = 990
4221 00:41:07.322657 tx_win_center[0][0][12] = 980
4222 00:41:07.325963 tx_first_pass[0][0][12] = 968
4223 00:41:07.329494 tx_last_pass[0][0][12] = 992
4224 00:41:07.332565 tx_win_center[0][0][13] = 980
4225 00:41:07.332643 tx_first_pass[0][0][13] = 968
4226 00:41:07.335778 tx_last_pass[0][0][13] = 992
4227 00:41:07.339159 tx_win_center[0][0][14] = 980
4228 00:41:07.342724 tx_first_pass[0][0][14] = 968
4229 00:41:07.346096 tx_last_pass[0][0][14] = 993
4230 00:41:07.346174 tx_win_center[0][0][15] = 984
4231 00:41:07.348941 tx_first_pass[0][0][15] = 972
4232 00:41:07.352709 tx_last_pass[0][0][15] = 997
4233 00:41:07.355639 tx_win_center[0][1][0] = 994
4234 00:41:07.359021 tx_first_pass[0][1][0] = 982
4235 00:41:07.359100 tx_last_pass[0][1][0] = 1006
4236 00:41:07.362334 tx_win_center[0][1][1] = 992
4237 00:41:07.365718 tx_first_pass[0][1][1] = 980
4238 00:41:07.369289 tx_last_pass[0][1][1] = 1004
4239 00:41:07.372616 tx_win_center[0][1][2] = 993
4240 00:41:07.372693 tx_first_pass[0][1][2] = 981
4241 00:41:07.375655 tx_last_pass[0][1][2] = 1005
4242 00:41:07.379346 tx_win_center[0][1][3] = 987
4243 00:41:07.382441 tx_first_pass[0][1][3] = 977
4244 00:41:07.382517 tx_last_pass[0][1][3] = 997
4245 00:41:07.385507 tx_win_center[0][1][4] = 993
4246 00:41:07.389248 tx_first_pass[0][1][4] = 981
4247 00:41:07.392356 tx_last_pass[0][1][4] = 1005
4248 00:41:07.395775 tx_win_center[0][1][5] = 989
4249 00:41:07.395851 tx_first_pass[0][1][5] = 978
4250 00:41:07.399201 tx_last_pass[0][1][5] = 1000
4251 00:41:07.402237 tx_win_center[0][1][6] = 990
4252 00:41:07.405682 tx_first_pass[0][1][6] = 979
4253 00:41:07.408906 tx_last_pass[0][1][6] = 1002
4254 00:41:07.408981 tx_win_center[0][1][7] = 991
4255 00:41:07.412366 tx_first_pass[0][1][7] = 980
4256 00:41:07.415740 tx_last_pass[0][1][7] = 1003
4257 00:41:07.418683 tx_win_center[0][1][8] = 978
4258 00:41:07.418759 tx_first_pass[0][1][8] = 967
4259 00:41:07.422309 tx_last_pass[0][1][8] = 989
4260 00:41:07.425518 tx_win_center[0][1][9] = 979
4261 00:41:07.429038 tx_first_pass[0][1][9] = 968
4262 00:41:07.432499 tx_last_pass[0][1][9] = 991
4263 00:41:07.432575 tx_win_center[0][1][10] = 984
4264 00:41:07.435525 tx_first_pass[0][1][10] = 973
4265 00:41:07.438477 tx_last_pass[0][1][10] = 996
4266 00:41:07.442366 tx_win_center[0][1][11] = 978
4267 00:41:07.445265 tx_first_pass[0][1][11] = 967
4268 00:41:07.445341 tx_last_pass[0][1][11] = 990
4269 00:41:07.449272 tx_win_center[0][1][12] = 979
4270 00:41:07.451800 tx_first_pass[0][1][12] = 968
4271 00:41:07.455417 tx_last_pass[0][1][12] = 991
4272 00:41:07.458799 tx_win_center[0][1][13] = 979
4273 00:41:07.458876 tx_first_pass[0][1][13] = 968
4274 00:41:07.461953 tx_last_pass[0][1][13] = 991
4275 00:41:07.465558 tx_win_center[0][1][14] = 981
4276 00:41:07.468823 tx_first_pass[0][1][14] = 969
4277 00:41:07.472165 tx_last_pass[0][1][14] = 993
4278 00:41:07.472241 tx_win_center[0][1][15] = 984
4279 00:41:07.475447 tx_first_pass[0][1][15] = 972
4280 00:41:07.479011 tx_last_pass[0][1][15] = 996
4281 00:41:07.482259 tx_win_center[1][0][0] = 995
4282 00:41:07.485368 tx_first_pass[1][0][0] = 983
4283 00:41:07.485445 tx_last_pass[1][0][0] = 1008
4284 00:41:07.489008 tx_win_center[1][0][1] = 994
4285 00:41:07.491872 tx_first_pass[1][0][1] = 981
4286 00:41:07.495401 tx_last_pass[1][0][1] = 1007
4287 00:41:07.498691 tx_win_center[1][0][2] = 992
4288 00:41:07.498769 tx_first_pass[1][0][2] = 979
4289 00:41:07.501824 tx_last_pass[1][0][2] = 1005
4290 00:41:07.505391 tx_win_center[1][0][3] = 990
4291 00:41:07.508498 tx_first_pass[1][0][3] = 978
4292 00:41:07.508576 tx_last_pass[1][0][3] = 1002
4293 00:41:07.511844 tx_win_center[1][0][4] = 994
4294 00:41:07.515409 tx_first_pass[1][0][4] = 982
4295 00:41:07.518538 tx_last_pass[1][0][4] = 1007
4296 00:41:07.521737 tx_win_center[1][0][5] = 995
4297 00:41:07.521815 tx_first_pass[1][0][5] = 983
4298 00:41:07.525206 tx_last_pass[1][0][5] = 1007
4299 00:41:07.528537 tx_win_center[1][0][6] = 994
4300 00:41:07.532080 tx_first_pass[1][0][6] = 982
4301 00:41:07.534961 tx_last_pass[1][0][6] = 1007
4302 00:41:07.535040 tx_win_center[1][0][7] = 993
4303 00:41:07.538804 tx_first_pass[1][0][7] = 980
4304 00:41:07.541739 tx_last_pass[1][0][7] = 1007
4305 00:41:07.545248 tx_win_center[1][0][8] = 989
4306 00:41:07.545326 tx_first_pass[1][0][8] = 977
4307 00:41:07.548660 tx_last_pass[1][0][8] = 1001
4308 00:41:07.551972 tx_win_center[1][0][9] = 989
4309 00:41:07.555474 tx_first_pass[1][0][9] = 978
4310 00:41:07.558181 tx_last_pass[1][0][9] = 1000
4311 00:41:07.558259 tx_win_center[1][0][10] = 992
4312 00:41:07.561610 tx_first_pass[1][0][10] = 981
4313 00:41:07.564881 tx_last_pass[1][0][10] = 1003
4314 00:41:07.568256 tx_win_center[1][0][11] = 992
4315 00:41:07.571454 tx_first_pass[1][0][11] = 982
4316 00:41:07.575006 tx_last_pass[1][0][11] = 1003
4317 00:41:07.575085 tx_win_center[1][0][12] = 992
4318 00:41:07.578346 tx_first_pass[1][0][12] = 982
4319 00:41:07.581642 tx_last_pass[1][0][12] = 1003
4320 00:41:07.585092 tx_win_center[1][0][13] = 993
4321 00:41:07.587984 tx_first_pass[1][0][13] = 983
4322 00:41:07.588061 tx_last_pass[1][0][13] = 1004
4323 00:41:07.591343 tx_win_center[1][0][14] = 992
4324 00:41:07.594619 tx_first_pass[1][0][14] = 981
4325 00:41:07.598535 tx_last_pass[1][0][14] = 1003
4326 00:41:07.601612 tx_win_center[1][0][15] = 986
4327 00:41:07.601690 tx_first_pass[1][0][15] = 974
4328 00:41:07.604658 tx_last_pass[1][0][15] = 999
4329 00:41:07.608263 tx_win_center[1][1][0] = 997
4330 00:41:07.611832 tx_first_pass[1][1][0] = 985
4331 00:41:07.615155 tx_last_pass[1][1][0] = 1009
4332 00:41:07.615233 tx_win_center[1][1][1] = 996
4333 00:41:07.618383 tx_first_pass[1][1][1] = 985
4334 00:41:07.621366 tx_last_pass[1][1][1] = 1008
4335 00:41:07.624854 tx_win_center[1][1][2] = 994
4336 00:41:07.628150 tx_first_pass[1][1][2] = 982
4337 00:41:07.628228 tx_last_pass[1][1][2] = 1007
4338 00:41:07.631345 tx_win_center[1][1][3] = 992
4339 00:41:07.634847 tx_first_pass[1][1][3] = 979
4340 00:41:07.637818 tx_last_pass[1][1][3] = 1006
4341 00:41:07.637896 tx_win_center[1][1][4] = 996
4342 00:41:07.641245 tx_first_pass[1][1][4] = 985
4343 00:41:07.644869 tx_last_pass[1][1][4] = 1008
4344 00:41:07.647922 tx_win_center[1][1][5] = 997
4345 00:41:07.651365 tx_first_pass[1][1][5] = 985
4346 00:41:07.651442 tx_last_pass[1][1][5] = 1009
4347 00:41:07.654711 tx_win_center[1][1][6] = 996
4348 00:41:07.658166 tx_first_pass[1][1][6] = 984
4349 00:41:07.661404 tx_last_pass[1][1][6] = 1008
4350 00:41:07.664868 tx_win_center[1][1][7] = 996
4351 00:41:07.664945 tx_first_pass[1][1][7] = 984
4352 00:41:07.668218 tx_last_pass[1][1][7] = 1008
4353 00:41:07.671231 tx_win_center[1][1][8] = 987
4354 00:41:07.675059 tx_first_pass[1][1][8] = 975
4355 00:41:07.675136 tx_last_pass[1][1][8] = 999
4356 00:41:07.678437 tx_win_center[1][1][9] = 986
4357 00:41:07.681179 tx_first_pass[1][1][9] = 974
4358 00:41:07.684798 tx_last_pass[1][1][9] = 998
4359 00:41:07.687834 tx_win_center[1][1][10] = 989
4360 00:41:07.687912 tx_first_pass[1][1][10] = 977
4361 00:41:07.691311 tx_last_pass[1][1][10] = 1001
4362 00:41:07.694348 tx_win_center[1][1][11] = 988
4363 00:41:07.698393 tx_first_pass[1][1][11] = 977
4364 00:41:07.701410 tx_last_pass[1][1][11] = 1000
4365 00:41:07.701485 tx_win_center[1][1][12] = 989
4366 00:41:07.704376 tx_first_pass[1][1][12] = 978
4367 00:41:07.707774 tx_last_pass[1][1][12] = 1001
4368 00:41:07.711647 tx_win_center[1][1][13] = 989
4369 00:41:07.714579 tx_first_pass[1][1][13] = 978
4370 00:41:07.717626 tx_last_pass[1][1][13] = 1001
4371 00:41:07.717706 tx_win_center[1][1][14] = 989
4372 00:41:07.720942 tx_first_pass[1][1][14] = 978
4373 00:41:07.724470 tx_last_pass[1][1][14] = 1000
4374 00:41:07.727841 tx_win_center[1][1][15] = 982
4375 00:41:07.731354 tx_first_pass[1][1][15] = 970
4376 00:41:07.731429 tx_last_pass[1][1][15] = 995
4377 00:41:07.734707 dump params rx window
4378 00:41:07.737472 rx_firspass[0][0][0] = 8
4379 00:41:07.737547 rx_lastpass[0][0][0] = 38
4380 00:41:07.740820 rx_firspass[0][0][1] = 8
4381 00:41:07.744325 rx_lastpass[0][0][1] = 37
4382 00:41:07.747578 rx_firspass[0][0][2] = 11
4383 00:41:07.747654 rx_lastpass[0][0][2] = 38
4384 00:41:07.750813 rx_firspass[0][0][3] = 2
4385 00:41:07.754263 rx_lastpass[0][0][3] = 32
4386 00:41:07.754338 rx_firspass[0][0][4] = 9
4387 00:41:07.757808 rx_lastpass[0][0][4] = 38
4388 00:41:07.761383 rx_firspass[0][0][5] = 5
4389 00:41:07.761459 rx_lastpass[0][0][5] = 33
4390 00:41:07.764755 rx_firspass[0][0][6] = 6
4391 00:41:07.767600 rx_lastpass[0][0][6] = 35
4392 00:41:07.770884 rx_firspass[0][0][7] = 10
4393 00:41:07.770959 rx_lastpass[0][0][7] = 36
4394 00:41:07.774414 rx_firspass[0][0][8] = 2
4395 00:41:07.777922 rx_lastpass[0][0][8] = 32
4396 00:41:07.778005 rx_firspass[0][0][9] = 5
4397 00:41:07.781022 rx_lastpass[0][0][9] = 33
4398 00:41:07.784669 rx_firspass[0][0][10] = 10
4399 00:41:07.787379 rx_lastpass[0][0][10] = 40
4400 00:41:07.787454 rx_firspass[0][0][11] = 4
4401 00:41:07.790868 rx_lastpass[0][0][11] = 32
4402 00:41:07.794443 rx_firspass[0][0][12] = 5
4403 00:41:07.794518 rx_lastpass[0][0][12] = 35
4404 00:41:07.797529 rx_firspass[0][0][13] = 6
4405 00:41:07.801246 rx_lastpass[0][0][13] = 33
4406 00:41:07.804499 rx_firspass[0][0][14] = 6
4407 00:41:07.804602 rx_lastpass[0][0][14] = 36
4408 00:41:07.807565 rx_firspass[0][0][15] = 9
4409 00:41:07.811019 rx_lastpass[0][0][15] = 37
4410 00:41:07.811095 rx_firspass[0][1][0] = 9
4411 00:41:07.814484 rx_lastpass[0][1][0] = 39
4412 00:41:07.817326 rx_firspass[0][1][1] = 7
4413 00:41:07.821102 rx_lastpass[0][1][1] = 39
4414 00:41:07.821178 rx_firspass[0][1][2] = 9
4415 00:41:07.823989 rx_lastpass[0][1][2] = 39
4416 00:41:07.827643 rx_firspass[0][1][3] = 1
4417 00:41:07.827719 rx_lastpass[0][1][3] = 32
4418 00:41:07.830825 rx_firspass[0][1][4] = 9
4419 00:41:07.833927 rx_lastpass[0][1][4] = 37
4420 00:41:07.834024 rx_firspass[0][1][5] = 3
4421 00:41:07.837375 rx_lastpass[0][1][5] = 34
4422 00:41:07.840528 rx_firspass[0][1][6] = 4
4423 00:41:07.844468 rx_lastpass[0][1][6] = 35
4424 00:41:07.844543 rx_firspass[0][1][7] = 7
4425 00:41:07.847534 rx_lastpass[0][1][7] = 37
4426 00:41:07.851257 rx_firspass[0][1][8] = 2
4427 00:41:07.851332 rx_lastpass[0][1][8] = 32
4428 00:41:07.853929 rx_firspass[0][1][9] = 5
4429 00:41:07.857270 rx_lastpass[0][1][9] = 34
4430 00:41:07.860490 rx_firspass[0][1][10] = 12
4431 00:41:07.860565 rx_lastpass[0][1][10] = 41
4432 00:41:07.863850 rx_firspass[0][1][11] = 3
4433 00:41:07.867432 rx_lastpass[0][1][11] = 32
4434 00:41:07.867507 rx_firspass[0][1][12] = 6
4435 00:41:07.870897 rx_lastpass[0][1][12] = 36
4436 00:41:07.873857 rx_firspass[0][1][13] = 8
4437 00:41:07.877069 rx_lastpass[0][1][13] = 34
4438 00:41:07.877144 rx_firspass[0][1][14] = 7
4439 00:41:07.880365 rx_lastpass[0][1][14] = 37
4440 00:41:07.883922 rx_firspass[0][1][15] = 10
4441 00:41:07.887313 rx_lastpass[0][1][15] = 38
4442 00:41:07.887389 rx_firspass[1][0][0] = 8
4443 00:41:07.890445 rx_lastpass[1][0][0] = 37
4444 00:41:07.893795 rx_firspass[1][0][1] = 7
4445 00:41:07.893872 rx_lastpass[1][0][1] = 35
4446 00:41:07.897423 rx_firspass[1][0][2] = 6
4447 00:41:07.900760 rx_lastpass[1][0][2] = 35
4448 00:41:07.900835 rx_firspass[1][0][3] = 5
4449 00:41:07.904166 rx_lastpass[1][0][3] = 32
4450 00:41:07.907029 rx_firspass[1][0][4] = 7
4451 00:41:07.910311 rx_lastpass[1][0][4] = 36
4452 00:41:07.910404 rx_firspass[1][0][5] = 9
4453 00:41:07.913692 rx_lastpass[1][0][5] = 38
4454 00:41:07.917606 rx_firspass[1][0][6] = 11
4455 00:41:07.917707 rx_lastpass[1][0][6] = 37
4456 00:41:07.920527 rx_firspass[1][0][7] = 9
4457 00:41:07.923851 rx_lastpass[1][0][7] = 36
4458 00:41:07.923923 rx_firspass[1][0][8] = 5
4459 00:41:07.927213 rx_lastpass[1][0][8] = 32
4460 00:41:07.930191 rx_firspass[1][0][9] = 3
4461 00:41:07.933535 rx_lastpass[1][0][9] = 31
4462 00:41:07.933638 rx_firspass[1][0][10] = 6
4463 00:41:07.937234 rx_lastpass[1][0][10] = 36
4464 00:41:07.940236 rx_firspass[1][0][11] = 7
4465 00:41:07.943501 rx_lastpass[1][0][11] = 36
4466 00:41:07.943602 rx_firspass[1][0][12] = 9
4467 00:41:07.946988 rx_lastpass[1][0][12] = 35
4468 00:41:07.950143 rx_firspass[1][0][13] = 8
4469 00:41:07.950245 rx_lastpass[1][0][13] = 36
4470 00:41:07.953370 rx_firspass[1][0][14] = 8
4471 00:41:07.957267 rx_lastpass[1][0][14] = 34
4472 00:41:07.960670 rx_firspass[1][0][15] = 3
4473 00:41:07.960788 rx_lastpass[1][0][15] = 28
4474 00:41:07.963555 rx_firspass[1][1][0] = 7
4475 00:41:07.966874 rx_lastpass[1][1][0] = 38
4476 00:41:07.966974 rx_firspass[1][1][1] = 7
4477 00:41:07.970210 rx_lastpass[1][1][1] = 37
4478 00:41:07.973817 rx_firspass[1][1][2] = 4
4479 00:41:07.976535 rx_lastpass[1][1][2] = 35
4480 00:41:07.976611 rx_firspass[1][1][3] = 3
4481 00:41:07.980592 rx_lastpass[1][1][3] = 34
4482 00:41:07.983348 rx_firspass[1][1][4] = 6
4483 00:41:07.983425 rx_lastpass[1][1][4] = 37
4484 00:41:07.987075 rx_firspass[1][1][5] = 8
4485 00:41:07.990579 rx_lastpass[1][1][5] = 39
4486 00:41:07.990655 rx_firspass[1][1][6] = 9
4487 00:41:07.993431 rx_lastpass[1][1][6] = 40
4488 00:41:07.996906 rx_firspass[1][1][7] = 8
4489 00:41:07.999928 rx_lastpass[1][1][7] = 36
4490 00:41:08.000005 rx_firspass[1][1][8] = 3
4491 00:41:08.003456 rx_lastpass[1][1][8] = 33
4492 00:41:08.006562 rx_firspass[1][1][9] = 1
4493 00:41:08.006639 rx_lastpass[1][1][9] = 32
4494 00:41:08.010292 rx_firspass[1][1][10] = 6
4495 00:41:08.013461 rx_lastpass[1][1][10] = 37
4496 00:41:08.013560 rx_firspass[1][1][11] = 7
4497 00:41:08.016732 rx_lastpass[1][1][11] = 37
4498 00:41:08.020266 rx_firspass[1][1][12] = 7
4499 00:41:08.023831 rx_lastpass[1][1][12] = 36
4500 00:41:08.023956 rx_firspass[1][1][13] = 7
4501 00:41:08.026965 rx_lastpass[1][1][13] = 37
4502 00:41:08.029877 rx_firspass[1][1][14] = 7
4503 00:41:08.033642 rx_lastpass[1][1][14] = 36
4504 00:41:08.033718 rx_firspass[1][1][15] = 0
4505 00:41:08.036866 rx_lastpass[1][1][15] = 29
4506 00:41:08.040122 dump params clk_delay
4507 00:41:08.040198 clk_delay[0] = 0
4508 00:41:08.043446 clk_delay[1] = 0
4509 00:41:08.043523 dump params dqs_delay
4510 00:41:08.046499 dqs_delay[0][0] = 0
4511 00:41:08.046576 dqs_delay[0][1] = 0
4512 00:41:08.049779 dqs_delay[1][0] = 0
4513 00:41:08.049855 dqs_delay[1][1] = 0
4514 00:41:08.053211 dump params delay_cell_unit = 844
4515 00:41:08.056357 dump source = 0x0
4516 00:41:08.056432 dump params frequency:1200
4517 00:41:08.060091 dump params rank number:2
4518 00:41:08.060167
4519 00:41:08.063092 dump params write leveling
4520 00:41:08.066318 write leveling[0][0][0] = 0x0
4521 00:41:08.069892 write leveling[0][0][1] = 0x0
4522 00:41:08.070001 write leveling[0][1][0] = 0x0
4523 00:41:08.073201 write leveling[0][1][1] = 0x0
4524 00:41:08.076582 write leveling[1][0][0] = 0x0
4525 00:41:08.079966 write leveling[1][0][1] = 0x0
4526 00:41:08.082850 write leveling[1][1][0] = 0x0
4527 00:41:08.082926 write leveling[1][1][1] = 0x0
4528 00:41:08.086883 dump params cbt_cs
4529 00:41:08.086984 cbt_cs[0][0] = 0x0
4530 00:41:08.089671 cbt_cs[0][1] = 0x0
4531 00:41:08.093067 cbt_cs[1][0] = 0x0
4532 00:41:08.093144 cbt_cs[1][1] = 0x0
4533 00:41:08.097035 dump params cbt_mr12
4534 00:41:08.097111 cbt_mr12[0][0] = 0x0
4535 00:41:08.099437 cbt_mr12[0][1] = 0x0
4536 00:41:08.099514 cbt_mr12[1][0] = 0x0
4537 00:41:08.103498 cbt_mr12[1][1] = 0x0
4538 00:41:08.103574 dump params tx window
4539 00:41:08.106236 tx_center_min[0][0][0] = 0
4540 00:41:08.109580 tx_center_max[0][0][0] = 0
4541 00:41:08.113185 tx_center_min[0][0][1] = 0
4542 00:41:08.113261 tx_center_max[0][0][1] = 0
4543 00:41:08.116501 tx_center_min[0][1][0] = 0
4544 00:41:08.119985 tx_center_max[0][1][0] = 0
4545 00:41:08.122949 tx_center_min[0][1][1] = 0
4546 00:41:08.123024 tx_center_max[0][1][1] = 0
4547 00:41:08.126230 tx_center_min[1][0][0] = 0
4548 00:41:08.129963 tx_center_max[1][0][0] = 0
4549 00:41:08.133217 tx_center_min[1][0][1] = 0
4550 00:41:08.133293 tx_center_max[1][0][1] = 0
4551 00:41:08.136368 tx_center_min[1][1][0] = 0
4552 00:41:08.139795 tx_center_max[1][1][0] = 0
4553 00:41:08.142902 tx_center_min[1][1][1] = 0
4554 00:41:08.142979 tx_center_max[1][1][1] = 0
4555 00:41:08.146218 dump params tx window
4556 00:41:08.149691 tx_win_center[0][0][0] = 0
4557 00:41:08.149767 tx_first_pass[0][0][0] = 0
4558 00:41:08.152947 tx_last_pass[0][0][0] = 0
4559 00:41:08.156716 tx_win_center[0][0][1] = 0
4560 00:41:08.159459 tx_first_pass[0][0][1] = 0
4561 00:41:08.159536 tx_last_pass[0][0][1] = 0
4562 00:41:08.162950 tx_win_center[0][0][2] = 0
4563 00:41:08.166236 tx_first_pass[0][0][2] = 0
4564 00:41:08.166312 tx_last_pass[0][0][2] = 0
4565 00:41:08.169547 tx_win_center[0][0][3] = 0
4566 00:41:08.173136 tx_first_pass[0][0][3] = 0
4567 00:41:08.176437 tx_last_pass[0][0][3] = 0
4568 00:41:08.176513 tx_win_center[0][0][4] = 0
4569 00:41:08.179869 tx_first_pass[0][0][4] = 0
4570 00:41:08.182915 tx_last_pass[0][0][4] = 0
4571 00:41:08.182991 tx_win_center[0][0][5] = 0
4572 00:41:08.185965 tx_first_pass[0][0][5] = 0
4573 00:41:08.189616 tx_last_pass[0][0][5] = 0
4574 00:41:08.192799 tx_win_center[0][0][6] = 0
4575 00:41:08.192875 tx_first_pass[0][0][6] = 0
4576 00:41:08.196310 tx_last_pass[0][0][6] = 0
4577 00:41:08.199149 tx_win_center[0][0][7] = 0
4578 00:41:08.202546 tx_first_pass[0][0][7] = 0
4579 00:41:08.202623 tx_last_pass[0][0][7] = 0
4580 00:41:08.206015 tx_win_center[0][0][8] = 0
4581 00:41:08.209235 tx_first_pass[0][0][8] = 0
4582 00:41:08.212313 tx_last_pass[0][0][8] = 0
4583 00:41:08.212390 tx_win_center[0][0][9] = 0
4584 00:41:08.215629 tx_first_pass[0][0][9] = 0
4585 00:41:08.218841 tx_last_pass[0][0][9] = 0
4586 00:41:08.222159 tx_win_center[0][0][10] = 0
4587 00:41:08.222237 tx_first_pass[0][0][10] = 0
4588 00:41:08.225961 tx_last_pass[0][0][10] = 0
4589 00:41:08.228877 tx_win_center[0][0][11] = 0
4590 00:41:08.232307 tx_first_pass[0][0][11] = 0
4591 00:41:08.232384 tx_last_pass[0][0][11] = 0
4592 00:41:08.235882 tx_win_center[0][0][12] = 0
4593 00:41:08.239209 tx_first_pass[0][0][12] = 0
4594 00:41:08.242401 tx_last_pass[0][0][12] = 0
4595 00:41:08.242478 tx_win_center[0][0][13] = 0
4596 00:41:08.245526 tx_first_pass[0][0][13] = 0
4597 00:41:08.248762 tx_last_pass[0][0][13] = 0
4598 00:41:08.251919 tx_win_center[0][0][14] = 0
4599 00:41:08.251996 tx_first_pass[0][0][14] = 0
4600 00:41:08.255209 tx_last_pass[0][0][14] = 0
4601 00:41:08.258787 tx_win_center[0][0][15] = 0
4602 00:41:08.262617 tx_first_pass[0][0][15] = 0
4603 00:41:08.262689 tx_last_pass[0][0][15] = 0
4604 00:41:08.266173 tx_win_center[0][1][0] = 0
4605 00:41:08.268709 tx_first_pass[0][1][0] = 0
4606 00:41:08.271810 tx_last_pass[0][1][0] = 0
4607 00:41:08.271927 tx_win_center[0][1][1] = 0
4608 00:41:08.275217 tx_first_pass[0][1][1] = 0
4609 00:41:08.278363 tx_last_pass[0][1][1] = 0
4610 00:41:08.278446 tx_win_center[0][1][2] = 0
4611 00:41:08.282056 tx_first_pass[0][1][2] = 0
4612 00:41:08.285321 tx_last_pass[0][1][2] = 0
4613 00:41:08.288754 tx_win_center[0][1][3] = 0
4614 00:41:08.288856 tx_first_pass[0][1][3] = 0
4615 00:41:08.291956 tx_last_pass[0][1][3] = 0
4616 00:41:08.295473 tx_win_center[0][1][4] = 0
4617 00:41:08.298546 tx_first_pass[0][1][4] = 0
4618 00:41:08.298624 tx_last_pass[0][1][4] = 0
4619 00:41:08.301564 tx_win_center[0][1][5] = 0
4620 00:41:08.305085 tx_first_pass[0][1][5] = 0
4621 00:41:08.305163 tx_last_pass[0][1][5] = 0
4622 00:41:08.308493 tx_win_center[0][1][6] = 0
4623 00:41:08.311828 tx_first_pass[0][1][6] = 0
4624 00:41:08.314863 tx_last_pass[0][1][6] = 0
4625 00:41:08.314939 tx_win_center[0][1][7] = 0
4626 00:41:08.318385 tx_first_pass[0][1][7] = 0
4627 00:41:08.321829 tx_last_pass[0][1][7] = 0
4628 00:41:08.325106 tx_win_center[0][1][8] = 0
4629 00:41:08.325184 tx_first_pass[0][1][8] = 0
4630 00:41:08.328145 tx_last_pass[0][1][8] = 0
4631 00:41:08.331376 tx_win_center[0][1][9] = 0
4632 00:41:08.334729 tx_first_pass[0][1][9] = 0
4633 00:41:08.334831 tx_last_pass[0][1][9] = 0
4634 00:41:08.338209 tx_win_center[0][1][10] = 0
4635 00:41:08.341584 tx_first_pass[0][1][10] = 0
4636 00:41:08.341661 tx_last_pass[0][1][10] = 0
4637 00:41:08.344997 tx_win_center[0][1][11] = 0
4638 00:41:08.348474 tx_first_pass[0][1][11] = 0
4639 00:41:08.351212 tx_last_pass[0][1][11] = 0
4640 00:41:08.355003 tx_win_center[0][1][12] = 0
4641 00:41:08.355080 tx_first_pass[0][1][12] = 0
4642 00:41:08.357784 tx_last_pass[0][1][12] = 0
4643 00:41:08.361112 tx_win_center[0][1][13] = 0
4644 00:41:08.364536 tx_first_pass[0][1][13] = 0
4645 00:41:08.364614 tx_last_pass[0][1][13] = 0
4646 00:41:08.367872 tx_win_center[0][1][14] = 0
4647 00:41:08.371316 tx_first_pass[0][1][14] = 0
4648 00:41:08.374231 tx_last_pass[0][1][14] = 0
4649 00:41:08.374302 tx_win_center[0][1][15] = 0
4650 00:41:08.377975 tx_first_pass[0][1][15] = 0
4651 00:41:08.381187 tx_last_pass[0][1][15] = 0
4652 00:41:08.384493 tx_win_center[1][0][0] = 0
4653 00:41:08.384571 tx_first_pass[1][0][0] = 0
4654 00:41:08.388076 tx_last_pass[1][0][0] = 0
4655 00:41:08.391123 tx_win_center[1][0][1] = 0
4656 00:41:08.391200 tx_first_pass[1][0][1] = 0
4657 00:41:08.394296 tx_last_pass[1][0][1] = 0
4658 00:41:08.397839 tx_win_center[1][0][2] = 0
4659 00:41:08.401193 tx_first_pass[1][0][2] = 0
4660 00:41:08.401269 tx_last_pass[1][0][2] = 0
4661 00:41:08.404180 tx_win_center[1][0][3] = 0
4662 00:41:08.408113 tx_first_pass[1][0][3] = 0
4663 00:41:08.411285 tx_last_pass[1][0][3] = 0
4664 00:41:08.411362 tx_win_center[1][0][4] = 0
4665 00:41:08.414064 tx_first_pass[1][0][4] = 0
4666 00:41:08.417579 tx_last_pass[1][0][4] = 0
4667 00:41:08.417647 tx_win_center[1][0][5] = 0
4668 00:41:08.421297 tx_first_pass[1][0][5] = 0
4669 00:41:08.424220 tx_last_pass[1][0][5] = 0
4670 00:41:08.428085 tx_win_center[1][0][6] = 0
4671 00:41:08.428191 tx_first_pass[1][0][6] = 0
4672 00:41:08.430914 tx_last_pass[1][0][6] = 0
4673 00:41:08.434715 tx_win_center[1][0][7] = 0
4674 00:41:08.437654 tx_first_pass[1][0][7] = 0
4675 00:41:08.437730 tx_last_pass[1][0][7] = 0
4676 00:41:08.441039 tx_win_center[1][0][8] = 0
4677 00:41:08.444673 tx_first_pass[1][0][8] = 0
4678 00:41:08.444749 tx_last_pass[1][0][8] = 0
4679 00:41:08.448014 tx_win_center[1][0][9] = 0
4680 00:41:08.450829 tx_first_pass[1][0][9] = 0
4681 00:41:08.454356 tx_last_pass[1][0][9] = 0
4682 00:41:08.454432 tx_win_center[1][0][10] = 0
4683 00:41:08.457821 tx_first_pass[1][0][10] = 0
4684 00:41:08.461163 tx_last_pass[1][0][10] = 0
4685 00:41:08.464420 tx_win_center[1][0][11] = 0
4686 00:41:08.464496 tx_first_pass[1][0][11] = 0
4687 00:41:08.468072 tx_last_pass[1][0][11] = 0
4688 00:41:08.471132 tx_win_center[1][0][12] = 0
4689 00:41:08.474373 tx_first_pass[1][0][12] = 0
4690 00:41:08.474450 tx_last_pass[1][0][12] = 0
4691 00:41:08.477826 tx_win_center[1][0][13] = 0
4692 00:41:08.481106 tx_first_pass[1][0][13] = 0
4693 00:41:08.484609 tx_last_pass[1][0][13] = 0
4694 00:41:08.484685 tx_win_center[1][0][14] = 0
4695 00:41:08.487700 tx_first_pass[1][0][14] = 0
4696 00:41:08.490832 tx_last_pass[1][0][14] = 0
4697 00:41:08.494590 tx_win_center[1][0][15] = 0
4698 00:41:08.494667 tx_first_pass[1][0][15] = 0
4699 00:41:08.497359 tx_last_pass[1][0][15] = 0
4700 00:41:08.500539 tx_win_center[1][1][0] = 0
4701 00:41:08.503942 tx_first_pass[1][1][0] = 0
4702 00:41:08.504019 tx_last_pass[1][1][0] = 0
4703 00:41:08.507722 tx_win_center[1][1][1] = 0
4704 00:41:08.510878 tx_first_pass[1][1][1] = 0
4705 00:41:08.510957 tx_last_pass[1][1][1] = 0
4706 00:41:08.514198 tx_win_center[1][1][2] = 0
4707 00:41:08.517297 tx_first_pass[1][1][2] = 0
4708 00:41:08.520776 tx_last_pass[1][1][2] = 0
4709 00:41:08.520845 tx_win_center[1][1][3] = 0
4710 00:41:08.523815 tx_first_pass[1][1][3] = 0
4711 00:41:08.527503 tx_last_pass[1][1][3] = 0
4712 00:41:08.530403 tx_win_center[1][1][4] = 0
4713 00:41:08.530481 tx_first_pass[1][1][4] = 0
4714 00:41:08.533954 tx_last_pass[1][1][4] = 0
4715 00:41:08.537156 tx_win_center[1][1][5] = 0
4716 00:41:08.540670 tx_first_pass[1][1][5] = 0
4717 00:41:08.540748 tx_last_pass[1][1][5] = 0
4718 00:41:08.543685 tx_win_center[1][1][6] = 0
4719 00:41:08.547627 tx_first_pass[1][1][6] = 0
4720 00:41:08.547705 tx_last_pass[1][1][6] = 0
4721 00:41:08.550452 tx_win_center[1][1][7] = 0
4722 00:41:08.553890 tx_first_pass[1][1][7] = 0
4723 00:41:08.557401 tx_last_pass[1][1][7] = 0
4724 00:41:08.557479 tx_win_center[1][1][8] = 0
4725 00:41:08.560775 tx_first_pass[1][1][8] = 0
4726 00:41:08.564118 tx_last_pass[1][1][8] = 0
4727 00:41:08.564196 tx_win_center[1][1][9] = 0
4728 00:41:08.567600 tx_first_pass[1][1][9] = 0
4729 00:41:08.570754 tx_last_pass[1][1][9] = 0
4730 00:41:08.574087 tx_win_center[1][1][10] = 0
4731 00:41:08.574164 tx_first_pass[1][1][10] = 0
4732 00:41:08.577176 tx_last_pass[1][1][10] = 0
4733 00:41:08.580381 tx_win_center[1][1][11] = 0
4734 00:41:08.583898 tx_first_pass[1][1][11] = 0
4735 00:41:08.583976 tx_last_pass[1][1][11] = 0
4736 00:41:08.587661 tx_win_center[1][1][12] = 0
4737 00:41:08.590578 tx_first_pass[1][1][12] = 0
4738 00:41:08.593932 tx_last_pass[1][1][12] = 0
4739 00:41:08.594062 tx_win_center[1][1][13] = 0
4740 00:41:08.597433 tx_first_pass[1][1][13] = 0
4741 00:41:08.600519 tx_last_pass[1][1][13] = 0
4742 00:41:08.603688 tx_win_center[1][1][14] = 0
4743 00:41:08.603789 tx_first_pass[1][1][14] = 0
4744 00:41:08.607045 tx_last_pass[1][1][14] = 0
4745 00:41:08.610477 tx_win_center[1][1][15] = 0
4746 00:41:08.613543 tx_first_pass[1][1][15] = 0
4747 00:41:08.613621 tx_last_pass[1][1][15] = 0
4748 00:41:08.617033 dump params rx window
4749 00:41:08.620357 rx_firspass[0][0][0] = 0
4750 00:41:08.620434 rx_lastpass[0][0][0] = 0
4751 00:41:08.623769 rx_firspass[0][0][1] = 0
4752 00:41:08.626956 rx_lastpass[0][0][1] = 0
4753 00:41:08.627034 rx_firspass[0][0][2] = 0
4754 00:41:08.630472 rx_lastpass[0][0][2] = 0
4755 00:41:08.634018 rx_firspass[0][0][3] = 0
4756 00:41:08.637168 rx_lastpass[0][0][3] = 0
4757 00:41:08.637244 rx_firspass[0][0][4] = 0
4758 00:41:08.640262 rx_lastpass[0][0][4] = 0
4759 00:41:08.643739 rx_firspass[0][0][5] = 0
4760 00:41:08.643817 rx_lastpass[0][0][5] = 0
4761 00:41:08.647258 rx_firspass[0][0][6] = 0
4762 00:41:08.650385 rx_lastpass[0][0][6] = 0
4763 00:41:08.650463 rx_firspass[0][0][7] = 0
4764 00:41:08.653243 rx_lastpass[0][0][7] = 0
4765 00:41:08.656877 rx_firspass[0][0][8] = 0
4766 00:41:08.656954 rx_lastpass[0][0][8] = 0
4767 00:41:08.660168 rx_firspass[0][0][9] = 0
4768 00:41:08.663797 rx_lastpass[0][0][9] = 0
4769 00:41:08.667182 rx_firspass[0][0][10] = 0
4770 00:41:08.667259 rx_lastpass[0][0][10] = 0
4771 00:41:08.670449 rx_firspass[0][0][11] = 0
4772 00:41:08.673473 rx_lastpass[0][0][11] = 0
4773 00:41:08.673569 rx_firspass[0][0][12] = 0
4774 00:41:08.676668 rx_lastpass[0][0][12] = 0
4775 00:41:08.680283 rx_firspass[0][0][13] = 0
4776 00:41:08.683709 rx_lastpass[0][0][13] = 0
4777 00:41:08.683785 rx_firspass[0][0][14] = 0
4778 00:41:08.687067 rx_lastpass[0][0][14] = 0
4779 00:41:08.689901 rx_firspass[0][0][15] = 0
4780 00:41:08.690023 rx_lastpass[0][0][15] = 0
4781 00:41:08.693288 rx_firspass[0][1][0] = 0
4782 00:41:08.696775 rx_lastpass[0][1][0] = 0
4783 00:41:08.696854 rx_firspass[0][1][1] = 0
4784 00:41:08.700194 rx_lastpass[0][1][1] = 0
4785 00:41:08.703582 rx_firspass[0][1][2] = 0
4786 00:41:08.703697 rx_lastpass[0][1][2] = 0
4787 00:41:08.706958 rx_firspass[0][1][3] = 0
4788 00:41:08.709905 rx_lastpass[0][1][3] = 0
4789 00:41:08.713340 rx_firspass[0][1][4] = 0
4790 00:41:08.713449 rx_lastpass[0][1][4] = 0
4791 00:41:08.716859 rx_firspass[0][1][5] = 0
4792 00:41:08.719916 rx_lastpass[0][1][5] = 0
4793 00:41:08.719993 rx_firspass[0][1][6] = 0
4794 00:41:08.723102 rx_lastpass[0][1][6] = 0
4795 00:41:08.727015 rx_firspass[0][1][7] = 0
4796 00:41:08.727108 rx_lastpass[0][1][7] = 0
4797 00:41:08.729842 rx_firspass[0][1][8] = 0
4798 00:41:08.733010 rx_lastpass[0][1][8] = 0
4799 00:41:08.733087 rx_firspass[0][1][9] = 0
4800 00:41:08.736411 rx_lastpass[0][1][9] = 0
4801 00:41:08.739743 rx_firspass[0][1][10] = 0
4802 00:41:08.743159 rx_lastpass[0][1][10] = 0
4803 00:41:08.743238 rx_firspass[0][1][11] = 0
4804 00:41:08.746369 rx_lastpass[0][1][11] = 0
4805 00:41:08.749925 rx_firspass[0][1][12] = 0
4806 00:41:08.750044 rx_lastpass[0][1][12] = 0
4807 00:41:08.753462 rx_firspass[0][1][13] = 0
4808 00:41:08.756802 rx_lastpass[0][1][13] = 0
4809 00:41:08.759941 rx_firspass[0][1][14] = 0
4810 00:41:08.760017 rx_lastpass[0][1][14] = 0
4811 00:41:08.763120 rx_firspass[0][1][15] = 0
4812 00:41:08.766430 rx_lastpass[0][1][15] = 0
4813 00:41:08.766533 rx_firspass[1][0][0] = 0
4814 00:41:08.769635 rx_lastpass[1][0][0] = 0
4815 00:41:08.773346 rx_firspass[1][0][1] = 0
4816 00:41:08.773423 rx_lastpass[1][0][1] = 0
4817 00:41:08.776705 rx_firspass[1][0][2] = 0
4818 00:41:08.779575 rx_lastpass[1][0][2] = 0
4819 00:41:08.779653 rx_firspass[1][0][3] = 0
4820 00:41:08.783149 rx_lastpass[1][0][3] = 0
4821 00:41:08.786575 rx_firspass[1][0][4] = 0
4822 00:41:08.789878 rx_lastpass[1][0][4] = 0
4823 00:41:08.789973 rx_firspass[1][0][5] = 0
4824 00:41:08.792699 rx_lastpass[1][0][5] = 0
4825 00:41:08.796415 rx_firspass[1][0][6] = 0
4826 00:41:08.796492 rx_lastpass[1][0][6] = 0
4827 00:41:08.799685 rx_firspass[1][0][7] = 0
4828 00:41:08.802740 rx_lastpass[1][0][7] = 0
4829 00:41:08.802817 rx_firspass[1][0][8] = 0
4830 00:41:08.806429 rx_lastpass[1][0][8] = 0
4831 00:41:08.809800 rx_firspass[1][0][9] = 0
4832 00:41:08.809878 rx_lastpass[1][0][9] = 0
4833 00:41:08.813326 rx_firspass[1][0][10] = 0
4834 00:41:08.816258 rx_lastpass[1][0][10] = 0
4835 00:41:08.819405 rx_firspass[1][0][11] = 0
4836 00:41:08.819483 rx_lastpass[1][0][11] = 0
4837 00:41:08.823178 rx_firspass[1][0][12] = 0
4838 00:41:08.826132 rx_lastpass[1][0][12] = 0
4839 00:41:08.826211 rx_firspass[1][0][13] = 0
4840 00:41:08.830028 rx_lastpass[1][0][13] = 0
4841 00:41:08.832758 rx_firspass[1][0][14] = 0
4842 00:41:08.836101 rx_lastpass[1][0][14] = 0
4843 00:41:08.836178 rx_firspass[1][0][15] = 0
4844 00:41:08.839557 rx_lastpass[1][0][15] = 0
4845 00:41:08.843182 rx_firspass[1][1][0] = 0
4846 00:41:08.843288 rx_lastpass[1][1][0] = 0
4847 00:41:08.846282 rx_firspass[1][1][1] = 0
4848 00:41:08.849815 rx_lastpass[1][1][1] = 0
4849 00:41:08.849896 rx_firspass[1][1][2] = 0
4850 00:41:08.853067 rx_lastpass[1][1][2] = 0
4851 00:41:08.856102 rx_firspass[1][1][3] = 0
4852 00:41:08.856178 rx_lastpass[1][1][3] = 0
4853 00:41:08.859582 rx_firspass[1][1][4] = 0
4854 00:41:08.862843 rx_lastpass[1][1][4] = 0
4855 00:41:08.866247 rx_firspass[1][1][5] = 0
4856 00:41:08.866324 rx_lastpass[1][1][5] = 0
4857 00:41:08.869525 rx_firspass[1][1][6] = 0
4858 00:41:08.872857 rx_lastpass[1][1][6] = 0
4859 00:41:08.872966 rx_firspass[1][1][7] = 0
4860 00:41:08.876258 rx_lastpass[1][1][7] = 0
4861 00:41:08.879769 rx_firspass[1][1][8] = 0
4862 00:41:08.879862 rx_lastpass[1][1][8] = 0
4863 00:41:08.882672 rx_firspass[1][1][9] = 0
4864 00:41:08.886575 rx_lastpass[1][1][9] = 0
4865 00:41:08.886670 rx_firspass[1][1][10] = 0
4866 00:41:08.889769 rx_lastpass[1][1][10] = 0
4867 00:41:08.893048 rx_firspass[1][1][11] = 0
4868 00:41:08.896447 rx_lastpass[1][1][11] = 0
4869 00:41:08.896539 rx_firspass[1][1][12] = 0
4870 00:41:08.899748 rx_lastpass[1][1][12] = 0
4871 00:41:08.903179 rx_firspass[1][1][13] = 0
4872 00:41:08.903310 rx_lastpass[1][1][13] = 0
4873 00:41:08.905958 rx_firspass[1][1][14] = 0
4874 00:41:08.909510 rx_lastpass[1][1][14] = 0
4875 00:41:08.912881 rx_firspass[1][1][15] = 0
4876 00:41:08.912978 rx_lastpass[1][1][15] = 0
4877 00:41:08.915666 dump params clk_delay
4878 00:41:08.915763 clk_delay[0] = 0
4879 00:41:08.919616 clk_delay[1] = 0
4880 00:41:08.919723 dump params dqs_delay
4881 00:41:08.922802 dqs_delay[0][0] = 0
4882 00:41:08.922898 dqs_delay[0][1] = 0
4883 00:41:08.926167 dqs_delay[1][0] = 0
4884 00:41:08.929521 dqs_delay[1][1] = 0
4885 00:41:08.929617 dump params delay_cell_unit = 844
4886 00:41:08.932783 dump source = 0x0
4887 00:41:08.935772 dump params frequency:800
4888 00:41:08.935902 dump params rank number:2
4889 00:41:08.936011
4890 00:41:08.939273 dump params write leveling
4891 00:41:08.942497 write leveling[0][0][0] = 0x0
4892 00:41:08.945703 write leveling[0][0][1] = 0x0
4893 00:41:08.948951 write leveling[0][1][0] = 0x0
4894 00:41:08.949049 write leveling[0][1][1] = 0x0
4895 00:41:08.952666 write leveling[1][0][0] = 0x0
4896 00:41:08.956147 write leveling[1][0][1] = 0x0
4897 00:41:08.959386 write leveling[1][1][0] = 0x0
4898 00:41:08.962612 write leveling[1][1][1] = 0x0
4899 00:41:08.962690 dump params cbt_cs
4900 00:41:08.965721 cbt_cs[0][0] = 0x0
4901 00:41:08.965799 cbt_cs[0][1] = 0x0
4902 00:41:08.969174 cbt_cs[1][0] = 0x0
4903 00:41:08.969252 cbt_cs[1][1] = 0x0
4904 00:41:08.972896 dump params cbt_mr12
4905 00:41:08.972974 cbt_mr12[0][0] = 0x0
4906 00:41:08.975611 cbt_mr12[0][1] = 0x0
4907 00:41:08.978911 cbt_mr12[1][0] = 0x0
4908 00:41:08.978993 cbt_mr12[1][1] = 0x0
4909 00:41:08.982695 dump params tx window
4910 00:41:08.983094 tx_center_min[0][0][0] = 0
4911 00:41:08.985825 tx_center_max[0][0][0] = 0
4912 00:41:08.989296 tx_center_min[0][0][1] = 0
4913 00:41:08.992517 tx_center_max[0][0][1] = 0
4914 00:41:08.992917 tx_center_min[0][1][0] = 0
4915 00:41:08.996551 tx_center_max[0][1][0] = 0
4916 00:41:08.999489 tx_center_min[0][1][1] = 0
4917 00:41:09.002911 tx_center_max[0][1][1] = 0
4918 00:41:09.003384 tx_center_min[1][0][0] = 0
4919 00:41:09.005778 tx_center_max[1][0][0] = 0
4920 00:41:09.009658 tx_center_min[1][0][1] = 0
4921 00:41:09.012665 tx_center_max[1][0][1] = 0
4922 00:41:09.012949 tx_center_min[1][1][0] = 0
4923 00:41:09.015913 tx_center_max[1][1][0] = 0
4924 00:41:09.019100 tx_center_min[1][1][1] = 0
4925 00:41:09.022564 tx_center_max[1][1][1] = 0
4926 00:41:09.022779 dump params tx window
4927 00:41:09.025455 tx_win_center[0][0][0] = 0
4928 00:41:09.028849 tx_first_pass[0][0][0] = 0
4929 00:41:09.029070 tx_last_pass[0][0][0] = 0
4930 00:41:09.032147 tx_win_center[0][0][1] = 0
4931 00:41:09.035617 tx_first_pass[0][0][1] = 0
4932 00:41:09.035828 tx_last_pass[0][0][1] = 0
4933 00:41:09.038814 tx_win_center[0][0][2] = 0
4934 00:41:09.042074 tx_first_pass[0][0][2] = 0
4935 00:41:09.045578 tx_last_pass[0][0][2] = 0
4936 00:41:09.045792 tx_win_center[0][0][3] = 0
4937 00:41:09.048436 tx_first_pass[0][0][3] = 0
4938 00:41:09.052316 tx_last_pass[0][0][3] = 0
4939 00:41:09.055947 tx_win_center[0][0][4] = 0
4940 00:41:09.056025 tx_first_pass[0][0][4] = 0
4941 00:41:09.058559 tx_last_pass[0][0][4] = 0
4942 00:41:09.061745 tx_win_center[0][0][5] = 0
4943 00:41:09.065205 tx_first_pass[0][0][5] = 0
4944 00:41:09.065283 tx_last_pass[0][0][5] = 0
4945 00:41:09.068553 tx_win_center[0][0][6] = 0
4946 00:41:09.071784 tx_first_pass[0][0][6] = 0
4947 00:41:09.071878 tx_last_pass[0][0][6] = 0
4948 00:41:09.075135 tx_win_center[0][0][7] = 0
4949 00:41:09.078676 tx_first_pass[0][0][7] = 0
4950 00:41:09.082172 tx_last_pass[0][0][7] = 0
4951 00:41:09.082254 tx_win_center[0][0][8] = 0
4952 00:41:09.085049 tx_first_pass[0][0][8] = 0
4953 00:41:09.088223 tx_last_pass[0][0][8] = 0
4954 00:41:09.091550 tx_win_center[0][0][9] = 0
4955 00:41:09.091629 tx_first_pass[0][0][9] = 0
4956 00:41:09.095492 tx_last_pass[0][0][9] = 0
4957 00:41:09.098472 tx_win_center[0][0][10] = 0
4958 00:41:09.098550 tx_first_pass[0][0][10] = 0
4959 00:41:09.101900 tx_last_pass[0][0][10] = 0
4960 00:41:09.104823 tx_win_center[0][0][11] = 0
4961 00:41:09.108500 tx_first_pass[0][0][11] = 0
4962 00:41:09.108578 tx_last_pass[0][0][11] = 0
4963 00:41:09.111430 tx_win_center[0][0][12] = 0
4964 00:41:09.115142 tx_first_pass[0][0][12] = 0
4965 00:41:09.118610 tx_last_pass[0][0][12] = 0
4966 00:41:09.118687 tx_win_center[0][0][13] = 0
4967 00:41:09.121907 tx_first_pass[0][0][13] = 0
4968 00:41:09.125198 tx_last_pass[0][0][13] = 0
4969 00:41:09.128450 tx_win_center[0][0][14] = 0
4970 00:41:09.131421 tx_first_pass[0][0][14] = 0
4971 00:41:09.131500 tx_last_pass[0][0][14] = 0
4972 00:41:09.134766 tx_win_center[0][0][15] = 0
4973 00:41:09.138221 tx_first_pass[0][0][15] = 0
4974 00:41:09.141528 tx_last_pass[0][0][15] = 0
4975 00:41:09.141606 tx_win_center[0][1][0] = 0
4976 00:41:09.144940 tx_first_pass[0][1][0] = 0
4977 00:41:09.148647 tx_last_pass[0][1][0] = 0
4978 00:41:09.148724 tx_win_center[0][1][1] = 0
4979 00:41:09.151383 tx_first_pass[0][1][1] = 0
4980 00:41:09.154820 tx_last_pass[0][1][1] = 0
4981 00:41:09.158434 tx_win_center[0][1][2] = 0
4982 00:41:09.158512 tx_first_pass[0][1][2] = 0
4983 00:41:09.161583 tx_last_pass[0][1][2] = 0
4984 00:41:09.165398 tx_win_center[0][1][3] = 0
4985 00:41:09.168434 tx_first_pass[0][1][3] = 0
4986 00:41:09.168512 tx_last_pass[0][1][3] = 0
4987 00:41:09.171286 tx_win_center[0][1][4] = 0
4988 00:41:09.174848 tx_first_pass[0][1][4] = 0
4989 00:41:09.174931 tx_last_pass[0][1][4] = 0
4990 00:41:09.178128 tx_win_center[0][1][5] = 0
4991 00:41:09.181773 tx_first_pass[0][1][5] = 0
4992 00:41:09.185394 tx_last_pass[0][1][5] = 0
4993 00:41:09.185559 tx_win_center[0][1][6] = 0
4994 00:41:09.188497 tx_first_pass[0][1][6] = 0
4995 00:41:09.191577 tx_last_pass[0][1][6] = 0
4996 00:41:09.191762 tx_win_center[0][1][7] = 0
4997 00:41:09.194869 tx_first_pass[0][1][7] = 0
4998 00:41:09.198394 tx_last_pass[0][1][7] = 0
4999 00:41:09.201401 tx_win_center[0][1][8] = 0
5000 00:41:09.201520 tx_first_pass[0][1][8] = 0
5001 00:41:09.204830 tx_last_pass[0][1][8] = 0
5002 00:41:09.207984 tx_win_center[0][1][9] = 0
5003 00:41:09.211658 tx_first_pass[0][1][9] = 0
5004 00:41:09.211847 tx_last_pass[0][1][9] = 0
5005 00:41:09.214994 tx_win_center[0][1][10] = 0
5006 00:41:09.217870 tx_first_pass[0][1][10] = 0
5007 00:41:09.221325 tx_last_pass[0][1][10] = 0
5008 00:41:09.221551 tx_win_center[0][1][11] = 0
5009 00:41:09.224835 tx_first_pass[0][1][11] = 0
5010 00:41:09.228545 tx_last_pass[0][1][11] = 0
5011 00:41:09.231574 tx_win_center[0][1][12] = 0
5012 00:41:09.231873 tx_first_pass[0][1][12] = 0
5013 00:41:09.234859 tx_last_pass[0][1][12] = 0
5014 00:41:09.238203 tx_win_center[0][1][13] = 0
5015 00:41:09.241331 tx_first_pass[0][1][13] = 0
5016 00:41:09.241557 tx_last_pass[0][1][13] = 0
5017 00:41:09.244910 tx_win_center[0][1][14] = 0
5018 00:41:09.247974 tx_first_pass[0][1][14] = 0
5019 00:41:09.251527 tx_last_pass[0][1][14] = 0
5020 00:41:09.251822 tx_win_center[0][1][15] = 0
5021 00:41:09.254874 tx_first_pass[0][1][15] = 0
5022 00:41:09.258332 tx_last_pass[0][1][15] = 0
5023 00:41:09.261438 tx_win_center[1][0][0] = 0
5024 00:41:09.261667 tx_first_pass[1][0][0] = 0
5025 00:41:09.264608 tx_last_pass[1][0][0] = 0
5026 00:41:09.268075 tx_win_center[1][0][1] = 0
5027 00:41:09.268360 tx_first_pass[1][0][1] = 0
5028 00:41:09.271509 tx_last_pass[1][0][1] = 0
5029 00:41:09.274739 tx_win_center[1][0][2] = 0
5030 00:41:09.278145 tx_first_pass[1][0][2] = 0
5031 00:41:09.278550 tx_last_pass[1][0][2] = 0
5032 00:41:09.281726 tx_win_center[1][0][3] = 0
5033 00:41:09.285004 tx_first_pass[1][0][3] = 0
5034 00:41:09.288125 tx_last_pass[1][0][3] = 0
5035 00:41:09.288530 tx_win_center[1][0][4] = 0
5036 00:41:09.291799 tx_first_pass[1][0][4] = 0
5037 00:41:09.294716 tx_last_pass[1][0][4] = 0
5038 00:41:09.295114 tx_win_center[1][0][5] = 0
5039 00:41:09.298058 tx_first_pass[1][0][5] = 0
5040 00:41:09.301457 tx_last_pass[1][0][5] = 0
5041 00:41:09.304653 tx_win_center[1][0][6] = 0
5042 00:41:09.305055 tx_first_pass[1][0][6] = 0
5043 00:41:09.308292 tx_last_pass[1][0][6] = 0
5044 00:41:09.311276 tx_win_center[1][0][7] = 0
5045 00:41:09.314757 tx_first_pass[1][0][7] = 0
5046 00:41:09.315155 tx_last_pass[1][0][7] = 0
5047 00:41:09.318148 tx_win_center[1][0][8] = 0
5048 00:41:09.321673 tx_first_pass[1][0][8] = 0
5049 00:41:09.322196 tx_last_pass[1][0][8] = 0
5050 00:41:09.324912 tx_win_center[1][0][9] = 0
5051 00:41:09.327957 tx_first_pass[1][0][9] = 0
5052 00:41:09.331202 tx_last_pass[1][0][9] = 0
5053 00:41:09.331608 tx_win_center[1][0][10] = 0
5054 00:41:09.334490 tx_first_pass[1][0][10] = 0
5055 00:41:09.338042 tx_last_pass[1][0][10] = 0
5056 00:41:09.341054 tx_win_center[1][0][11] = 0
5057 00:41:09.341588 tx_first_pass[1][0][11] = 0
5058 00:41:09.344452 tx_last_pass[1][0][11] = 0
5059 00:41:09.347833 tx_win_center[1][0][12] = 0
5060 00:41:09.351304 tx_first_pass[1][0][12] = 0
5061 00:41:09.351715 tx_last_pass[1][0][12] = 0
5062 00:41:09.354606 tx_win_center[1][0][13] = 0
5063 00:41:09.357836 tx_first_pass[1][0][13] = 0
5064 00:41:09.361202 tx_last_pass[1][0][13] = 0
5065 00:41:09.361610 tx_win_center[1][0][14] = 0
5066 00:41:09.364377 tx_first_pass[1][0][14] = 0
5067 00:41:09.368090 tx_last_pass[1][0][14] = 0
5068 00:41:09.371406 tx_win_center[1][0][15] = 0
5069 00:41:09.371808 tx_first_pass[1][0][15] = 0
5070 00:41:09.374775 tx_last_pass[1][0][15] = 0
5071 00:41:09.378256 tx_win_center[1][1][0] = 0
5072 00:41:09.380781 tx_first_pass[1][1][0] = 0
5073 00:41:09.381182 tx_last_pass[1][1][0] = 0
5074 00:41:09.384538 tx_win_center[1][1][1] = 0
5075 00:41:09.388284 tx_first_pass[1][1][1] = 0
5076 00:41:09.388806 tx_last_pass[1][1][1] = 0
5077 00:41:09.391252 tx_win_center[1][1][2] = 0
5078 00:41:09.394450 tx_first_pass[1][1][2] = 0
5079 00:41:09.397978 tx_last_pass[1][1][2] = 0
5080 00:41:09.398431 tx_win_center[1][1][3] = 0
5081 00:41:09.401358 tx_first_pass[1][1][3] = 0
5082 00:41:09.404742 tx_last_pass[1][1][3] = 0
5083 00:41:09.407766 tx_win_center[1][1][4] = 0
5084 00:41:09.408169 tx_first_pass[1][1][4] = 0
5085 00:41:09.411590 tx_last_pass[1][1][4] = 0
5086 00:41:09.414460 tx_win_center[1][1][5] = 0
5087 00:41:09.414859 tx_first_pass[1][1][5] = 0
5088 00:41:09.417935 tx_last_pass[1][1][5] = 0
5089 00:41:09.420811 tx_win_center[1][1][6] = 0
5090 00:41:09.424418 tx_first_pass[1][1][6] = 0
5091 00:41:09.424818 tx_last_pass[1][1][6] = 0
5092 00:41:09.427806 tx_win_center[1][1][7] = 0
5093 00:41:09.431265 tx_first_pass[1][1][7] = 0
5094 00:41:09.434106 tx_last_pass[1][1][7] = 0
5095 00:41:09.434513 tx_win_center[1][1][8] = 0
5096 00:41:09.437287 tx_first_pass[1][1][8] = 0
5097 00:41:09.440868 tx_last_pass[1][1][8] = 0
5098 00:41:09.444176 tx_win_center[1][1][9] = 0
5099 00:41:09.444795 tx_first_pass[1][1][9] = 0
5100 00:41:09.447532 tx_last_pass[1][1][9] = 0
5101 00:41:09.450805 tx_win_center[1][1][10] = 0
5102 00:41:09.451201 tx_first_pass[1][1][10] = 0
5103 00:41:09.454022 tx_last_pass[1][1][10] = 0
5104 00:41:09.457534 tx_win_center[1][1][11] = 0
5105 00:41:09.460481 tx_first_pass[1][1][11] = 0
5106 00:41:09.464063 tx_last_pass[1][1][11] = 0
5107 00:41:09.464466 tx_win_center[1][1][12] = 0
5108 00:41:09.466965 tx_first_pass[1][1][12] = 0
5109 00:41:09.470667 tx_last_pass[1][1][12] = 0
5110 00:41:09.474181 tx_win_center[1][1][13] = 0
5111 00:41:09.474582 tx_first_pass[1][1][13] = 0
5112 00:41:09.477145 tx_last_pass[1][1][13] = 0
5113 00:41:09.480443 tx_win_center[1][1][14] = 0
5114 00:41:09.484287 tx_first_pass[1][1][14] = 0
5115 00:41:09.484689 tx_last_pass[1][1][14] = 0
5116 00:41:09.487213 tx_win_center[1][1][15] = 0
5117 00:41:09.490094 tx_first_pass[1][1][15] = 0
5118 00:41:09.493446 tx_last_pass[1][1][15] = 0
5119 00:41:09.493849 dump params rx window
5120 00:41:09.497223 rx_firspass[0][0][0] = 0
5121 00:41:09.500687 rx_lastpass[0][0][0] = 0
5122 00:41:09.501086 rx_firspass[0][0][1] = 0
5123 00:41:09.503751 rx_lastpass[0][0][1] = 0
5124 00:41:09.506904 rx_firspass[0][0][2] = 0
5125 00:41:09.507297 rx_lastpass[0][0][2] = 0
5126 00:41:09.510139 rx_firspass[0][0][3] = 0
5127 00:41:09.513668 rx_lastpass[0][0][3] = 0
5128 00:41:09.514099 rx_firspass[0][0][4] = 0
5129 00:41:09.517192 rx_lastpass[0][0][4] = 0
5130 00:41:09.520635 rx_firspass[0][0][5] = 0
5131 00:41:09.521109 rx_lastpass[0][0][5] = 0
5132 00:41:09.523889 rx_firspass[0][0][6] = 0
5133 00:41:09.527015 rx_lastpass[0][0][6] = 0
5134 00:41:09.527406 rx_firspass[0][0][7] = 0
5135 00:41:09.530329 rx_lastpass[0][0][7] = 0
5136 00:41:09.533390 rx_firspass[0][0][8] = 0
5137 00:41:09.537083 rx_lastpass[0][0][8] = 0
5138 00:41:09.537561 rx_firspass[0][0][9] = 0
5139 00:41:09.540618 rx_lastpass[0][0][9] = 0
5140 00:41:09.543776 rx_firspass[0][0][10] = 0
5141 00:41:09.544216 rx_lastpass[0][0][10] = 0
5142 00:41:09.547194 rx_firspass[0][0][11] = 0
5143 00:41:09.550145 rx_lastpass[0][0][11] = 0
5144 00:41:09.550583 rx_firspass[0][0][12] = 0
5145 00:41:09.553578 rx_lastpass[0][0][12] = 0
5146 00:41:09.557172 rx_firspass[0][0][13] = 0
5147 00:41:09.560407 rx_lastpass[0][0][13] = 0
5148 00:41:09.560924 rx_firspass[0][0][14] = 0
5149 00:41:09.563476 rx_lastpass[0][0][14] = 0
5150 00:41:09.566740 rx_firspass[0][0][15] = 0
5151 00:41:09.570616 rx_lastpass[0][0][15] = 0
5152 00:41:09.571126 rx_firspass[0][1][0] = 0
5153 00:41:09.573584 rx_lastpass[0][1][0] = 0
5154 00:41:09.577051 rx_firspass[0][1][1] = 0
5155 00:41:09.577541 rx_lastpass[0][1][1] = 0
5156 00:41:09.579946 rx_firspass[0][1][2] = 0
5157 00:41:09.583538 rx_lastpass[0][1][2] = 0
5158 00:41:09.583976 rx_firspass[0][1][3] = 0
5159 00:41:09.586688 rx_lastpass[0][1][3] = 0
5160 00:41:09.590161 rx_firspass[0][1][4] = 0
5161 00:41:09.590619 rx_lastpass[0][1][4] = 0
5162 00:41:09.593226 rx_firspass[0][1][5] = 0
5163 00:41:09.596875 rx_lastpass[0][1][5] = 0
5164 00:41:09.597272 rx_firspass[0][1][6] = 0
5165 00:41:09.600515 rx_lastpass[0][1][6] = 0
5166 00:41:09.603583 rx_firspass[0][1][7] = 0
5167 00:41:09.604027 rx_lastpass[0][1][7] = 0
5168 00:41:09.606758 rx_firspass[0][1][8] = 0
5169 00:41:09.610348 rx_lastpass[0][1][8] = 0
5170 00:41:09.610749 rx_firspass[0][1][9] = 0
5171 00:41:09.613691 rx_lastpass[0][1][9] = 0
5172 00:41:09.616815 rx_firspass[0][1][10] = 0
5173 00:41:09.620462 rx_lastpass[0][1][10] = 0
5174 00:41:09.620916 rx_firspass[0][1][11] = 0
5175 00:41:09.624075 rx_lastpass[0][1][11] = 0
5176 00:41:09.626734 rx_firspass[0][1][12] = 0
5177 00:41:09.627132 rx_lastpass[0][1][12] = 0
5178 00:41:09.630578 rx_firspass[0][1][13] = 0
5179 00:41:09.633473 rx_lastpass[0][1][13] = 0
5180 00:41:09.636968 rx_firspass[0][1][14] = 0
5181 00:41:09.637446 rx_lastpass[0][1][14] = 0
5182 00:41:09.640666 rx_firspass[0][1][15] = 0
5183 00:41:09.644099 rx_lastpass[0][1][15] = 0
5184 00:41:09.644537 rx_firspass[1][0][0] = 0
5185 00:41:09.646916 rx_lastpass[1][0][0] = 0
5186 00:41:09.650134 rx_firspass[1][0][1] = 0
5187 00:41:09.650535 rx_lastpass[1][0][1] = 0
5188 00:41:09.653754 rx_firspass[1][0][2] = 0
5189 00:41:09.656970 rx_lastpass[1][0][2] = 0
5190 00:41:09.659975 rx_firspass[1][0][3] = 0
5191 00:41:09.660378 rx_lastpass[1][0][3] = 0
5192 00:41:09.663079 rx_firspass[1][0][4] = 0
5193 00:41:09.666533 rx_lastpass[1][0][4] = 0
5194 00:41:09.666925 rx_firspass[1][0][5] = 0
5195 00:41:09.670400 rx_lastpass[1][0][5] = 0
5196 00:41:09.673407 rx_firspass[1][0][6] = 0
5197 00:41:09.673848 rx_lastpass[1][0][6] = 0
5198 00:41:09.677207 rx_firspass[1][0][7] = 0
5199 00:41:09.679828 rx_lastpass[1][0][7] = 0
5200 00:41:09.680269 rx_firspass[1][0][8] = 0
5201 00:41:09.683468 rx_lastpass[1][0][8] = 0
5202 00:41:09.686546 rx_firspass[1][0][9] = 0
5203 00:41:09.686992 rx_lastpass[1][0][9] = 0
5204 00:41:09.689834 rx_firspass[1][0][10] = 0
5205 00:41:09.693651 rx_lastpass[1][0][10] = 0
5206 00:41:09.696812 rx_firspass[1][0][11] = 0
5207 00:41:09.697312 rx_lastpass[1][0][11] = 0
5208 00:41:09.699881 rx_firspass[1][0][12] = 0
5209 00:41:09.703423 rx_lastpass[1][0][12] = 0
5210 00:41:09.703825 rx_firspass[1][0][13] = 0
5211 00:41:09.706683 rx_lastpass[1][0][13] = 0
5212 00:41:09.710143 rx_firspass[1][0][14] = 0
5213 00:41:09.713237 rx_lastpass[1][0][14] = 0
5214 00:41:09.713637 rx_firspass[1][0][15] = 0
5215 00:41:09.717262 rx_lastpass[1][0][15] = 0
5216 00:41:09.720592 rx_firspass[1][1][0] = 0
5217 00:41:09.721064 rx_lastpass[1][1][0] = 0
5218 00:41:09.724174 rx_firspass[1][1][1] = 0
5219 00:41:09.726571 rx_lastpass[1][1][1] = 0
5220 00:41:09.726967 rx_firspass[1][1][2] = 0
5221 00:41:09.730098 rx_lastpass[1][1][2] = 0
5222 00:41:09.733353 rx_firspass[1][1][3] = 0
5223 00:41:09.736839 rx_lastpass[1][1][3] = 0
5224 00:41:09.737328 rx_firspass[1][1][4] = 0
5225 00:41:09.740053 rx_lastpass[1][1][4] = 0
5226 00:41:09.743105 rx_firspass[1][1][5] = 0
5227 00:41:09.743502 rx_lastpass[1][1][5] = 0
5228 00:41:09.746687 rx_firspass[1][1][6] = 0
5229 00:41:09.749791 rx_lastpass[1][1][6] = 0
5230 00:41:09.750330 rx_firspass[1][1][7] = 0
5231 00:41:09.753282 rx_lastpass[1][1][7] = 0
5232 00:41:09.756327 rx_firspass[1][1][8] = 0
5233 00:41:09.756723 rx_lastpass[1][1][8] = 0
5234 00:41:09.760079 rx_firspass[1][1][9] = 0
5235 00:41:09.762942 rx_lastpass[1][1][9] = 0
5236 00:41:09.763335 rx_firspass[1][1][10] = 0
5237 00:41:09.766359 rx_lastpass[1][1][10] = 0
5238 00:41:09.770542 rx_firspass[1][1][11] = 0
5239 00:41:09.773187 rx_lastpass[1][1][11] = 0
5240 00:41:09.773585 rx_firspass[1][1][12] = 0
5241 00:41:09.776358 rx_lastpass[1][1][12] = 0
5242 00:41:09.780029 rx_firspass[1][1][13] = 0
5243 00:41:09.780421 rx_lastpass[1][1][13] = 0
5244 00:41:09.783206 rx_firspass[1][1][14] = 0
5245 00:41:09.786569 rx_lastpass[1][1][14] = 0
5246 00:41:09.789940 rx_firspass[1][1][15] = 0
5247 00:41:09.790461 rx_lastpass[1][1][15] = 0
5248 00:41:09.793033 dump params clk_delay
5249 00:41:09.793432 clk_delay[0] = 0
5250 00:41:09.796100 clk_delay[1] = 0
5251 00:41:09.796496 dump params dqs_delay
5252 00:41:09.799685 dqs_delay[0][0] = 0
5253 00:41:09.803220 dqs_delay[0][1] = 0
5254 00:41:09.803616 dqs_delay[1][0] = 0
5255 00:41:09.806087 dqs_delay[1][1] = 0
5256 00:41:09.809623 dump params delay_cell_unit = 844
5257 00:41:09.810180 mt_set_emi_preloader end
5258 00:41:09.816544 [mt_mem_init] dram size: 0x100000000, rank number: 2
5259 00:41:09.819771 [complex_mem_test] start addr:0x40000000, len:20480
5260 00:41:09.856126 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5261 00:41:09.862813 [complex_mem_test] start addr:0x80000000, len:20480
5262 00:41:09.898871 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5263 00:41:09.905001 [complex_mem_test] start addr:0xc0000000, len:20480
5264 00:41:09.941094 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5265 00:41:09.947791 [complex_mem_test] start addr:0x56000000, len:8192
5266 00:41:09.964629 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5267 00:41:09.965116 ddr_geometry:1
5268 00:41:09.970874 [complex_mem_test] start addr:0x80000000, len:8192
5269 00:41:09.987838 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5270 00:41:09.991280 dram_init: dram init end (result: 0)
5271 00:41:09.998104 Successfully loaded DRAM blobs and ran DRAM calibration
5272 00:41:10.007779 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5273 00:41:10.008240 CBMEM:
5274 00:41:10.011220 IMD: root @ 00000000fffff000 254 entries.
5275 00:41:10.014379 IMD: root @ 00000000ffffec00 62 entries.
5276 00:41:10.021634 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5277 00:41:10.028089 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5278 00:41:10.031327 in-header: 03 a1 00 00 08 00 00 00
5279 00:41:10.034382 in-data: 84 60 60 10 00 00 00 00
5280 00:41:10.037847 Chrome EC: clear events_b mask to 0x0000000020004000
5281 00:41:10.044496 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5282 00:41:10.048272 in-header: 03 fd 00 00 00 00 00 00
5283 00:41:10.051660 in-data:
5284 00:41:10.054965 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5285 00:41:10.058567 CBFS @ 21000 size 3d4000
5286 00:41:10.061376 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5287 00:41:10.064854 CBFS: Locating 'fallback/ramstage'
5288 00:41:10.068211 CBFS: Found @ offset 10d40 size d563
5289 00:41:10.090942 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5290 00:41:10.102071 Accumulated console time in romstage 13749 ms
5291 00:41:10.102561
5292 00:41:10.102904
5293 00:41:10.111909 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5294 00:41:10.115386 ARM64: Exception handlers installed.
5295 00:41:10.115831 ARM64: Testing exception
5296 00:41:10.118603 ARM64: Done test exception
5297 00:41:10.122241 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5298 00:41:10.125235 Manufacturer: ef
5299 00:41:10.129007 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5300 00:41:10.136138 WARNING: RO_VPD is uninitialized or empty.
5301 00:41:10.138594 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5302 00:41:10.142128 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5303 00:41:10.151791 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5304 00:41:10.155469 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5305 00:41:10.161647 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5306 00:41:10.162134 Enumerating buses...
5307 00:41:10.168697 Show all devs... Before device enumeration.
5308 00:41:10.169147 Root Device: enabled 1
5309 00:41:10.171869 CPU_CLUSTER: 0: enabled 1
5310 00:41:10.172273 CPU: 00: enabled 1
5311 00:41:10.175479 Compare with tree...
5312 00:41:10.178443 Root Device: enabled 1
5313 00:41:10.178913 CPU_CLUSTER: 0: enabled 1
5314 00:41:10.181889 CPU: 00: enabled 1
5315 00:41:10.185037 Root Device scanning...
5316 00:41:10.185438 root_dev_scan_bus for Root Device
5317 00:41:10.188736 CPU_CLUSTER: 0 enabled
5318 00:41:10.191970 root_dev_scan_bus for Root Device done
5319 00:41:10.198208 scan_bus: scanning of bus Root Device took 10689 usecs
5320 00:41:10.198614 done
5321 00:41:10.202075 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5322 00:41:10.205558 Allocating resources...
5323 00:41:10.206056 Reading resources...
5324 00:41:10.208633 Root Device read_resources bus 0 link: 0
5325 00:41:10.215298 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5326 00:41:10.215766 CPU: 00 missing read_resources
5327 00:41:10.222145 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5328 00:41:10.225401 Root Device read_resources bus 0 link: 0 done
5329 00:41:10.228654 Done reading resources.
5330 00:41:10.231534 Show resources in subtree (Root Device)...After reading.
5331 00:41:10.235540 Root Device child on link 0 CPU_CLUSTER: 0
5332 00:41:10.238799 CPU_CLUSTER: 0 child on link 0 CPU: 00
5333 00:41:10.248988 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5334 00:41:10.249482 CPU: 00
5335 00:41:10.251869 Setting resources...
5336 00:41:10.255260 Root Device assign_resources, bus 0 link: 0
5337 00:41:10.258569 CPU_CLUSTER: 0 missing set_resources
5338 00:41:10.262761 Root Device assign_resources, bus 0 link: 0
5339 00:41:10.265757 Done setting resources.
5340 00:41:10.271891 Show resources in subtree (Root Device)...After assigning values.
5341 00:41:10.275440 Root Device child on link 0 CPU_CLUSTER: 0
5342 00:41:10.278630 CPU_CLUSTER: 0 child on link 0 CPU: 00
5343 00:41:10.285204 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5344 00:41:10.288830 CPU: 00
5345 00:41:10.289308 Done allocating resources.
5346 00:41:10.295174 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5347 00:41:10.298696 Enabling resources...
5348 00:41:10.299090 done.
5349 00:41:10.301583 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5350 00:41:10.305234 Initializing devices...
5351 00:41:10.305711 Root Device init ...
5352 00:41:10.308317 mainboard_init: Starting display init.
5353 00:41:10.311792 ADC[4]: Raw value=76301 ID=0
5354 00:41:10.334632 anx7625_power_on_init: Init interface.
5355 00:41:10.338142 anx7625_disable_pd_protocol: Disabled PD feature.
5356 00:41:10.344931 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5357 00:41:10.401504 anx7625_start_dp_work: Secure OCM version=00
5358 00:41:10.404620 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5359 00:41:10.422100 sp_tx_get_edid_block: EDID Block = 1
5360 00:41:10.538930 Extracted contents:
5361 00:41:10.542202 header: 00 ff ff ff ff ff ff 00
5362 00:41:10.545573 serial number: 06 af 5c 14 00 00 00 00 00 1a
5363 00:41:10.549246 version: 01 04
5364 00:41:10.551974 basic params: 95 1a 0e 78 02
5365 00:41:10.555544 chroma info: 99 85 95 55 56 92 28 22 50 54
5366 00:41:10.559134 established: 00 00 00
5367 00:41:10.565973 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5368 00:41:10.568883 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5369 00:41:10.576074 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5370 00:41:10.582164 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5371 00:41:10.588879 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5372 00:41:10.592336 extensions: 00
5373 00:41:10.592756 checksum: ae
5374 00:41:10.593067
5375 00:41:10.595751 Manufacturer: AUO Model 145c Serial Number 0
5376 00:41:10.599473 Made week 0 of 2016
5377 00:41:10.599946 EDID version: 1.4
5378 00:41:10.602707 Digital display
5379 00:41:10.605536 6 bits per primary color channel
5380 00:41:10.606189 DisplayPort interface
5381 00:41:10.609038 Maximum image size: 26 cm x 14 cm
5382 00:41:10.612203 Gamma: 220%
5383 00:41:10.612598 Check DPMS levels
5384 00:41:10.615691 Supported color formats: RGB 4:4:4
5385 00:41:10.618758 First detailed timing is preferred timing
5386 00:41:10.622107 Established timings supported:
5387 00:41:10.626329 Standard timings supported:
5388 00:41:10.626824 Detailed timings
5389 00:41:10.632051 Hex of detail: ce1d56ea50001a3030204600009010000018
5390 00:41:10.635824 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5391 00:41:10.638981 0556 0586 05a6 0640 hborder 0
5392 00:41:10.641856 0300 0304 030a 031a vborder 0
5393 00:41:10.645727 -hsync -vsync
5394 00:41:10.648455 Did detailed timing
5395 00:41:10.651782 Hex of detail: 0000000f0000000000000000000000000020
5396 00:41:10.655156 Manufacturer-specified data, tag 15
5397 00:41:10.662255 Hex of detail: 000000fe0041554f0a202020202020202020
5398 00:41:10.662690 ASCII string: AUO
5399 00:41:10.665124 Hex of detail: 000000fe004231313658414230312e34200a
5400 00:41:10.668541 ASCII string: B116XAB01.4
5401 00:41:10.669012 Checksum
5402 00:41:10.672032 Checksum: 0xae (valid)
5403 00:41:10.678169 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5404 00:41:10.678627 DSI data_rate: 457800000 bps
5405 00:41:10.685912 anx7625_parse_edid: set default k value to 0x3d for panel
5406 00:41:10.689089 anx7625_parse_edid: pixelclock(76300).
5407 00:41:10.692529 hactive(1366), hsync(32), hfp(48), hbp(154)
5408 00:41:10.695947 vactive(768), vsync(6), vfp(4), vbp(16)
5409 00:41:10.699458 anx7625_dsi_config: config dsi.
5410 00:41:10.707543 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5411 00:41:10.728170 anx7625_dsi_config: success to config DSI
5412 00:41:10.731259 anx7625_dp_start: MIPI phy setup OK.
5413 00:41:10.734895 [SSUSB] Setting up USB HOST controller...
5414 00:41:10.738000 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5415 00:41:10.741961 [SSUSB] phy power-on done.
5416 00:41:10.745240 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5417 00:41:10.748577 in-header: 03 fc 01 00 00 00 00 00
5418 00:41:10.748719 in-data:
5419 00:41:10.755337 handle_proto3_response: EC response with error code: 1
5420 00:41:10.755510 SPM: pcm index = 1
5421 00:41:10.758394 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5422 00:41:10.761531 CBFS @ 21000 size 3d4000
5423 00:41:10.768417 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5424 00:41:10.771594 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5425 00:41:10.775372 CBFS: Found @ offset 1e7c0 size 1026
5426 00:41:10.781718 read SPI 0x3f808 0x1026: 1270 us, 3255 KB/s, 26.040 Mbps
5427 00:41:10.784819 SPM: binary array size = 2988
5428 00:41:10.788353 SPM: version = pcm_allinone_v1.17.2_20180829
5429 00:41:10.791610 SPM binary loaded in 32 msecs
5430 00:41:10.799629 spm_kick_im_to_fetch: ptr = 000000004021eec2
5431 00:41:10.802665 spm_kick_im_to_fetch: len = 2988
5432 00:41:10.802808 SPM: spm_kick_pcm_to_run
5433 00:41:10.806109 SPM: spm_kick_pcm_to_run done
5434 00:41:10.809514 SPM: spm_init done in 52 msecs
5435 00:41:10.813130 Root Device init finished in 505260 usecs
5436 00:41:10.816321 CPU_CLUSTER: 0 init ...
5437 00:41:10.825858 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5438 00:41:10.829934 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5439 00:41:10.832798 CBFS @ 21000 size 3d4000
5440 00:41:10.836496 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5441 00:41:10.839967 CBFS: Locating 'sspm.bin'
5442 00:41:10.843270 CBFS: Found @ offset 208c0 size 41cb
5443 00:41:10.852922 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5444 00:41:10.860371 CPU_CLUSTER: 0 init finished in 42801 usecs
5445 00:41:10.860771 Devices initialized
5446 00:41:10.863778 Show all devs... After init.
5447 00:41:10.867695 Root Device: enabled 1
5448 00:41:10.868088 CPU_CLUSTER: 0: enabled 1
5449 00:41:10.870415 CPU: 00: enabled 1
5450 00:41:10.873914 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5451 00:41:10.876977 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5452 00:41:10.880427 ELOG: NV offset 0x558000 size 0x1000
5453 00:41:10.888405 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5454 00:41:10.895578 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5455 00:41:10.897955 ELOG: Event(17) added with size 13 at 2024-06-16 00:41:10 UTC
5456 00:41:10.901545 out: cmd=0x121: 03 db 21 01 00 00 00 00
5457 00:41:10.904602 in-header: 03 43 00 00 2c 00 00 00
5458 00:41:10.917974 in-data: a3 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 0e 2f 07 00 06 80 00 00 ac 0b 08 00 06 80 00 00 29 08 02 00 06 80 00 00 a9 79 1e 00
5459 00:41:10.921039 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5460 00:41:10.924503 in-header: 03 19 00 00 08 00 00 00
5461 00:41:10.927739 in-data: a2 e0 47 00 13 00 00 00
5462 00:41:10.931325 Chrome EC: UHEPI supported
5463 00:41:10.937937 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5464 00:41:10.941446 in-header: 03 e1 00 00 08 00 00 00
5465 00:41:10.944758 in-data: 84 20 60 10 00 00 00 00
5466 00:41:10.948103 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5467 00:41:10.954279 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5468 00:41:10.957865 in-header: 03 e1 00 00 08 00 00 00
5469 00:41:10.960798 in-data: 84 20 60 10 00 00 00 00
5470 00:41:10.967866 ELOG: Event(A1) added with size 10 at 2024-06-16 00:41:11 UTC
5471 00:41:10.974765 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5472 00:41:10.977778 ELOG: Event(A0) added with size 9 at 2024-06-16 00:41:11 UTC
5473 00:41:10.984654 elog_add_boot_reason: Logged dev mode boot
5474 00:41:10.984926 Finalize devices...
5475 00:41:10.987740 Devices finalized
5476 00:41:10.990709 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5477 00:41:10.997886 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5478 00:41:11.001190 ELOG: Event(91) added with size 10 at 2024-06-16 00:41:11 UTC
5479 00:41:11.007768 ELOG: Event(16) added with size 11 at 2024-06-16 00:41:11 UTC
5480 00:41:11.104739 SF: Successfully erased 4096 bytes @ 0x558000
5481 00:41:11.116609 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5482 00:41:11.119843 Writing coreboot table at 0xffeda000
5483 00:41:11.123535 0. 0000000000114000-000000000011efff: RAMSTAGE
5484 00:41:11.130391 1. 0000000040000000-000000004023cfff: RAMSTAGE
5485 00:41:11.133281 2. 000000004023d000-00000000545fffff: RAM
5486 00:41:11.137027 3. 0000000054600000-000000005465ffff: BL31
5487 00:41:11.139647 4. 0000000054660000-00000000ffed9fff: RAM
5488 00:41:11.147125 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5489 00:41:11.149742 6. 0000000100000000-000000013fffffff: RAM
5490 00:41:11.150306 Passing 5 GPIOs to payload:
5491 00:41:11.156370 NAME | PORT | POLARITY | VALUE
5492 00:41:11.159961 write protect | 0x00000096 | low | low
5493 00:41:11.166750 EC in RW | 0x000000b1 | high | undefined
5494 00:41:11.170169 EC interrupt | 0x00000097 | low | undefined
5495 00:41:11.173224 TPM interrupt | 0x00000099 | high | undefined
5496 00:41:11.180379 speaker enable | 0x000000af | high | undefined
5497 00:41:11.183948 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5498 00:41:11.186784 in-header: 03 f7 00 00 02 00 00 00
5499 00:41:11.187182 in-data: 04 00
5500 00:41:11.189498 Board ID: 4
5501 00:41:11.193298 ADC[3]: Raw value=216068 ID=1
5502 00:41:11.193816 RAM code: 1
5503 00:41:11.194197 SKU ID: 16
5504 00:41:11.199572 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5505 00:41:11.199973 CBFS @ 21000 size 3d4000
5506 00:41:11.206253 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5507 00:41:11.212770 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum ccd0
5508 00:41:11.213237 coreboot table: 940 bytes.
5509 00:41:11.218998 IMD ROOT 0. 00000000fffff000 00001000
5510 00:41:11.222768 IMD SMALL 1. 00000000ffffe000 00001000
5511 00:41:11.225923 CONSOLE 2. 00000000fffde000 00020000
5512 00:41:11.229222 FMAP 3. 00000000fffdd000 0000047c
5513 00:41:11.232896 TIME STAMP 4. 00000000fffdc000 00000910
5514 00:41:11.236037 RAMOOPS 5. 00000000ffedc000 00100000
5515 00:41:11.238815 COREBOOT 6. 00000000ffeda000 00002000
5516 00:41:11.242490 IMD small region:
5517 00:41:11.245976 IMD ROOT 0. 00000000ffffec00 00000400
5518 00:41:11.249060 VBOOT WORK 1. 00000000ffffeb00 00000100
5519 00:41:11.252397 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5520 00:41:11.255841 VPD 3. 00000000ffffea60 0000006c
5521 00:41:11.262708 BS: BS_WRITE_TABLES times (ms): entry 100 run 0 exit 0
5522 00:41:11.269201 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5523 00:41:11.272731 in-header: 03 e1 00 00 08 00 00 00
5524 00:41:11.275755 in-data: 84 20 60 10 00 00 00 00
5525 00:41:11.279263 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5526 00:41:11.282706 CBFS @ 21000 size 3d4000
5527 00:41:11.285371 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5528 00:41:11.288424 CBFS: Locating 'fallback/payload'
5529 00:41:11.297400 CBFS: Found @ offset dc040 size 439a0
5530 00:41:11.385273 read SPI 0xfd078 0x439a0: 84387 us, 3281 KB/s, 26.248 Mbps
5531 00:41:11.388713 Checking segment from ROM address 0x0000000040003a00
5532 00:41:11.395172 Checking segment from ROM address 0x0000000040003a1c
5533 00:41:11.398203 Loading segment from ROM address 0x0000000040003a00
5534 00:41:11.401684 code (compression=0)
5535 00:41:11.411417 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5536 00:41:11.417771 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5537 00:41:11.421029 it's not compressed!
5538 00:41:11.424645 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5539 00:41:11.431231 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5540 00:41:11.439251 Loading segment from ROM address 0x0000000040003a1c
5541 00:41:11.442199 Entry Point 0x0000000080000000
5542 00:41:11.442344 Loaded segments
5543 00:41:11.449150 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5544 00:41:11.452495 Jumping to boot code at 0000000080000000(00000000ffeda000)
5545 00:41:11.462132 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5546 00:41:11.465882 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5547 00:41:11.469233 CBFS @ 21000 size 3d4000
5548 00:41:11.476142 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5549 00:41:11.476331 CBFS: Locating 'fallback/bl31'
5550 00:41:11.479806 CBFS: Found @ offset 36dc0 size 5820
5551 00:41:11.492990 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5552 00:41:11.496395 Checking segment from ROM address 0x0000000040003a00
5553 00:41:11.503330 Checking segment from ROM address 0x0000000040003a1c
5554 00:41:11.506382 Loading segment from ROM address 0x0000000040003a00
5555 00:41:11.509324 code (compression=1)
5556 00:41:11.516380 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5557 00:41:11.525872 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5558 00:41:11.526059 using LZMA
5559 00:41:11.535082 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5560 00:41:11.541620 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5561 00:41:11.544865 Loading segment from ROM address 0x0000000040003a1c
5562 00:41:11.548180 Entry Point 0x0000000054601000
5563 00:41:11.548325 Loaded segments
5564 00:41:11.551711 NOTICE: MT8183 bl31_setup
5565 00:41:11.559110 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5566 00:41:11.562055 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5567 00:41:11.565238 INFO: [DEVAPC] dump DEVAPC registers:
5568 00:41:11.575510 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5569 00:41:11.581667 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5570 00:41:11.591669 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5571 00:41:11.598295 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5572 00:41:11.608549 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5573 00:41:11.614958 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5574 00:41:11.624828 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5575 00:41:11.631930 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5576 00:41:11.641947 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5577 00:41:11.648405 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5578 00:41:11.658656 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5579 00:41:11.664725 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5580 00:41:11.671856 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5581 00:41:11.681224 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5582 00:41:11.687906 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5583 00:41:11.694750 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5584 00:41:11.701097 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5585 00:41:11.711032 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5586 00:41:11.717866 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5587 00:41:11.724570 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5588 00:41:11.730925 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5589 00:41:11.737498 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5590 00:41:11.740978 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5591 00:41:11.744101 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5592 00:41:11.747327 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5593 00:41:11.750830 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5594 00:41:11.753828 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5595 00:41:11.760387 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5596 00:41:11.767030 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5597 00:41:11.767155 WARNING: region 0:
5598 00:41:11.770418 WARNING: apc:0x168, sa:0x0, ea:0xfff
5599 00:41:11.773342 WARNING: region 1:
5600 00:41:11.777103 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5601 00:41:11.780284 WARNING: region 2:
5602 00:41:11.783391 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5603 00:41:11.783516 WARNING: region 3:
5604 00:41:11.786979 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5605 00:41:11.790268 WARNING: region 4:
5606 00:41:11.793318 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5607 00:41:11.793398 WARNING: region 5:
5608 00:41:11.796475 WARNING: apc:0x0, sa:0x0, ea:0x0
5609 00:41:11.799830 WARNING: region 6:
5610 00:41:11.803030 WARNING: apc:0x0, sa:0x0, ea:0x0
5611 00:41:11.803114 WARNING: region 7:
5612 00:41:11.806641 WARNING: apc:0x0, sa:0x0, ea:0x0
5613 00:41:11.813362 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5614 00:41:11.816487 INFO: SPM: enable SPMC mode
5615 00:41:11.820256 NOTICE: spm_boot_init() start
5616 00:41:11.823487 NOTICE: spm_boot_init() end
5617 00:41:11.826388 INFO: BL31: Initializing runtime services
5618 00:41:11.832846 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5619 00:41:11.836267 INFO: BL31: Preparing for EL3 exit to normal world
5620 00:41:11.839601 INFO: Entry point address = 0x80000000
5621 00:41:11.842955 INFO: SPSR = 0x8
5622 00:41:11.865133
5623 00:41:11.865563
5624 00:41:11.865914
5625 00:41:11.867387 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5626 00:41:11.867867 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5627 00:41:11.868236 Setting prompt string to ['jacuzzi:']
5628 00:41:11.868639 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5629 00:41:11.869291 Starting depthcharge on Juniper...
5630 00:41:11.869625
5631 00:41:11.872062 vboot_handoff: creating legacy vboot_handoff structure
5632 00:41:11.872349
5633 00:41:11.875195 ec_init(0): CrosEC protocol v3 supported (544, 544)
5634 00:41:11.875501
5635 00:41:11.878221 Wipe memory regions:
5636 00:41:11.878447
5637 00:41:11.881754 [0x00000040000000, 0x00000054600000)
5638 00:41:11.925394
5639 00:41:11.925735 [0x00000054660000, 0x00000080000000)
5640 00:41:12.016269
5641 00:41:12.016731 [0x000000811994a0, 0x000000ffeda000)
5642 00:41:12.276648
5643 00:41:12.277110 [0x00000100000000, 0x00000140000000)
5644 00:41:12.409037
5645 00:41:12.412680 Initializing XHCI USB controller at 0x11200000.
5646 00:41:12.435341
5647 00:41:12.438419 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5648 00:41:12.438861
5649 00:41:12.439203
5650 00:41:12.439963 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5652 00:41:12.541109 jacuzzi: tftpboot 192.168.201.1 14368351/tftp-deploy-n4d0cf2c/kernel/image.itb 14368351/tftp-deploy-n4d0cf2c/kernel/cmdline
5653 00:41:12.541761 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5654 00:41:12.542325 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5655 00:41:12.547123 tftpboot 192.168.201.1 14368351/tftp-deploy-n4d0cf2c/kernel/image.itp-deploy-n4d0cf2c/kernel/cmdline
5656 00:41:12.547631
5657 00:41:12.547958 Waiting for link
5658 00:41:12.949009
5659 00:41:12.949454 R8152: Initializing
5660 00:41:12.949772
5661 00:41:12.952136 Version 9 (ocp_data = 6010)
5662 00:41:12.952556
5663 00:41:12.955492 R8152: Done initializing
5664 00:41:12.955908
5665 00:41:12.956226 Adding net device
5666 00:41:13.341324
5667 00:41:13.341766 done.
5668 00:41:13.342130
5669 00:41:13.342435 MAC: 00:e0:4c:72:3d:67
5670 00:41:13.342818
5671 00:41:13.344498 Sending DHCP discover... done.
5672 00:41:13.344895
5673 00:41:13.347823 Waiting for reply... done.
5674 00:41:13.348315
5675 00:41:13.350874 Sending DHCP request... done.
5676 00:41:13.351273
5677 00:41:13.356569 Waiting for reply... done.
5678 00:41:13.356967
5679 00:41:13.357283 My ip is 192.168.201.13
5680 00:41:13.357574
5681 00:41:13.359888 The DHCP server ip is 192.168.201.1
5682 00:41:13.360290
5683 00:41:13.366291 TFTP server IP predefined by user: 192.168.201.1
5684 00:41:13.366765
5685 00:41:13.373035 Bootfile predefined by user: 14368351/tftp-deploy-n4d0cf2c/kernel/image.itb
5686 00:41:13.373437
5687 00:41:13.373813 Sending tftp read request... done.
5688 00:41:13.375919
5689 00:41:13.383280 Waiting for the transfer...
5690 00:41:13.383680
5691 00:41:13.682412 00000000 ################################################################
5692 00:41:13.682528
5693 00:41:13.972184 00080000 ################################################################
5694 00:41:13.972301
5695 00:41:14.260176 00100000 ################################################################
5696 00:41:14.260300
5697 00:41:14.547484 00180000 ################################################################
5698 00:41:14.547600
5699 00:41:14.840048 00200000 ################################################################
5700 00:41:14.840166
5701 00:41:15.142193 00280000 ################################################################
5702 00:41:15.142307
5703 00:41:15.433423 00300000 ################################################################
5704 00:41:15.433540
5705 00:41:15.804952 00380000 ################################################################
5706 00:41:15.805415
5707 00:41:16.187106 00400000 ################################################################
5708 00:41:16.187573
5709 00:41:16.508534 00480000 ################################################################
5710 00:41:16.508646
5711 00:41:16.783611 00500000 ################################################################
5712 00:41:16.783751
5713 00:41:17.073091 00580000 ################################################################
5714 00:41:17.073214
5715 00:41:17.354922 00600000 ################################################################
5716 00:41:17.355046
5717 00:41:17.631588 00680000 ################################################################
5718 00:41:17.631707
5719 00:41:17.911855 00700000 ################################################################
5720 00:41:17.911994
5721 00:41:18.162754 00780000 ################################################################
5722 00:41:18.162930
5723 00:41:18.414476 00800000 ################################################################
5724 00:41:18.414621
5725 00:41:18.663808 00880000 ################################################################
5726 00:41:18.663947
5727 00:41:18.914959 00900000 ################################################################
5728 00:41:18.915098
5729 00:41:19.165196 00980000 ################################################################
5730 00:41:19.165318
5731 00:41:19.416766 00a00000 ################################################################
5732 00:41:19.416899
5733 00:41:19.669555 00a80000 ################################################################
5734 00:41:19.669666
5735 00:41:19.926172 00b00000 ################################################################
5736 00:41:19.926287
5737 00:41:20.181911 00b80000 ################################################################
5738 00:41:20.182060
5739 00:41:20.438637 00c00000 ################################################################
5740 00:41:20.438771
5741 00:41:20.697694 00c80000 ################################################################
5742 00:41:20.697809
5743 00:41:20.960993 00d00000 ################################################################
5744 00:41:20.961131
5745 00:41:21.217409 00d80000 ################################################################
5746 00:41:21.217551
5747 00:41:21.472835 00e00000 ################################################################
5748 00:41:21.472972
5749 00:41:21.736106 00e80000 ################################################################
5750 00:41:21.736228
5751 00:41:21.996020 00f00000 ################################################################
5752 00:41:21.996137
5753 00:41:22.256834 00f80000 ################################################################
5754 00:41:22.256979
5755 00:41:22.529841 01000000 ################################################################
5756 00:41:22.529989
5757 00:41:22.799572 01080000 ################################################################
5758 00:41:22.799700
5759 00:41:23.050820 01100000 ################################################################
5760 00:41:23.050958
5761 00:41:23.309514 01180000 ################################################################
5762 00:41:23.309635
5763 00:41:23.579564 01200000 ################################################################
5764 00:41:23.579678
5765 00:41:23.891606 01280000 ################################################################
5766 00:41:23.891733
5767 00:41:24.176438 01300000 ################################################################
5768 00:41:24.176559
5769 00:41:24.454577 01380000 ################################################################
5770 00:41:24.454706
5771 00:41:24.733200 01400000 ################################################################
5772 00:41:24.733309
5773 00:41:25.009540 01480000 ################################################################
5774 00:41:25.009667
5775 00:41:25.273946 01500000 ################################################################
5776 00:41:25.274086
5777 00:41:25.551034 01580000 ################################################################
5778 00:41:25.551166
5779 00:41:25.814742 01600000 ################################################################
5780 00:41:25.814852
5781 00:41:26.087734 01680000 ################################################################
5782 00:41:26.087859
5783 00:41:26.336662 01700000 ################################################################
5784 00:41:26.336778
5785 00:41:26.586648 01780000 ################################################################
5786 00:41:26.586770
5787 00:41:26.841562 01800000 ################################################################
5788 00:41:26.841684
5789 00:41:27.095706 01880000 ################################################################
5790 00:41:27.095825
5791 00:41:27.354154 01900000 ################################################################
5792 00:41:27.354279
5793 00:41:27.603347 01980000 ################################################################
5794 00:41:27.603475
5795 00:41:27.868127 01a00000 ################################################################
5796 00:41:27.868266
5797 00:41:28.131322 01a80000 ################################################################
5798 00:41:28.131442
5799 00:41:28.421393 01b00000 ################################################################
5800 00:41:28.421520
5801 00:41:28.706998 01b80000 ################################################################
5802 00:41:28.707127
5803 00:41:28.983937 01c00000 ################################################################
5804 00:41:28.984067
5805 00:41:29.262262 01c80000 ################################################################
5806 00:41:29.262375
5807 00:41:29.532422 01d00000 ################################################################
5808 00:41:29.532537
5809 00:41:29.785702 01d80000 ################################################################
5810 00:41:29.785813
5811 00:41:30.012265 01e00000 ########################################################## done.
5812 00:41:30.012381
5813 00:41:30.015911 The bootfile was 31924502 bytes long.
5814 00:41:30.015996
5815 00:41:30.019299 Sending tftp read request... done.
5816 00:41:30.019382
5817 00:41:30.019447 Waiting for the transfer...
5818 00:41:30.019508
5819 00:41:30.022251 00000000 # done.
5820 00:41:30.022331
5821 00:41:30.029025 Command line loaded dynamically from TFTP file: 14368351/tftp-deploy-n4d0cf2c/kernel/cmdline
5822 00:41:30.029111
5823 00:41:30.055073 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5824 00:41:30.055251
5825 00:41:30.055396 Loading FIT.
5826 00:41:30.055533
5827 00:41:30.059330 Image ramdisk-1 has 18738390 bytes.
5828 00:41:30.059476
5829 00:41:30.062062 Image fdt-1 has 57695 bytes.
5830 00:41:30.062227
5831 00:41:30.065091 Image kernel-1 has 13126376 bytes.
5832 00:41:30.065308
5833 00:41:30.075424 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5834 00:41:30.075686
5835 00:41:30.085299 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5836 00:41:30.085704
5837 00:41:30.091924 Choosing best match conf-1 for compat google,juniper-sku16.
5838 00:41:30.096164
5839 00:41:30.101043 Connected to device vid:did:rid of 1ae0:0028:00
5840 00:41:30.108028
5841 00:41:30.111476 tpm_get_response: command 0x17b, return code 0x0
5842 00:41:30.111895
5843 00:41:30.114463 tpm_cleanup: add release locality here.
5844 00:41:30.114871
5845 00:41:30.118212 Shutting down all USB controllers.
5846 00:41:30.118713
5847 00:41:30.121521 Removing current net device
5848 00:41:30.121941
5849 00:41:30.124590 Exiting depthcharge with code 4 at timestamp: 35725650
5850 00:41:30.125107
5851 00:41:30.128165 LZMA decompressing kernel-1 to 0x80193568
5852 00:41:30.128689
5853 00:41:30.134476 LZMA decompressing kernel-1 to 0x40000000
5854 00:41:31.999445
5855 00:41:31.999907 jumping to kernel
5856 00:41:32.001521 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5857 00:41:32.002033 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5858 00:41:32.002423 Setting prompt string to ['Linux version [0-9]']
5859 00:41:32.002760 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5860 00:41:32.003094 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5861 00:41:32.074822
5862 00:41:32.077927 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5863 00:41:32.081824 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5864 00:41:32.082334 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5865 00:41:32.082717 Setting prompt string to []
5866 00:41:32.083114 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5867 00:41:32.083457 Using line separator: #'\n'#
5868 00:41:32.083755 No login prompt set.
5869 00:41:32.084051 Parsing kernel messages
5870 00:41:32.084335 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5871 00:41:32.084836 [login-action] Waiting for messages, (timeout 00:04:06)
5872 00:41:32.085148 Waiting using forced prompt support (timeout 00:02:03)
5873 00:41:32.101375 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024
5874 00:41:32.104472 [ 0.000000] random: crng init done
5875 00:41:32.111551 [ 0.000000] Machine model: Google juniper sku16 board
5876 00:41:32.114597 [ 0.000000] efi: UEFI not found.
5877 00:41:32.121090 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5878 00:41:32.128438 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5879 00:41:32.138078 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5880 00:41:32.141798 [ 0.000000] printk: bootconsole [mtk8250] enabled
5881 00:41:32.149670 [ 0.000000] NUMA: No NUMA configuration found
5882 00:41:32.156095 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5883 00:41:32.163124 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5884 00:41:32.163642 [ 0.000000] Zone ranges:
5885 00:41:32.169442 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5886 00:41:32.172997 [ 0.000000] DMA32 empty
5887 00:41:32.179107 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5888 00:41:32.182870 [ 0.000000] Movable zone start for each node
5889 00:41:32.186179 [ 0.000000] Early memory node ranges
5890 00:41:32.192610 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5891 00:41:32.199201 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5892 00:41:32.205889 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5893 00:41:32.212729 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5894 00:41:32.219272 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5895 00:41:32.225907 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5896 00:41:32.242109 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5897 00:41:32.248884 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5898 00:41:32.255267 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5899 00:41:32.258846 [ 0.000000] psci: probing for conduit method from DT.
5900 00:41:32.265666 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5901 00:41:32.268666 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5902 00:41:32.275064 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5903 00:41:32.278297 [ 0.000000] psci: SMC Calling Convention v1.1
5904 00:41:32.285295 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5905 00:41:32.288522 [ 0.000000] Detected VIPT I-cache on CPU0
5906 00:41:32.294942 [ 0.000000] CPU features: detected: GIC system register CPU interface
5907 00:41:32.301355 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5908 00:41:32.308369 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5909 00:41:32.314637 [ 0.000000] CPU features: detected: ARM erratum 845719
5910 00:41:32.318172 [ 0.000000] alternatives: applying boot alternatives
5911 00:41:32.321751 [ 0.000000] Fallback order for Node 0: 0
5912 00:41:32.328442 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5913 00:41:32.331663 [ 0.000000] Policy zone: Normal
5914 00:41:32.361511 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5915 00:41:32.371436 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5916 00:41:32.381183 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5917 00:41:32.387812 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5918 00:41:32.394301 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5919 00:41:32.400890 <6>[ 0.000000] software IO TLB: area num 8.
5920 00:41:32.425436 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5921 00:41:32.483368 <6>[ 0.000000] Memory: 3896772K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261692K reserved, 32768K cma-reserved)
5922 00:41:32.489957 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5923 00:41:32.496880 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5924 00:41:32.500230 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5925 00:41:32.506955 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5926 00:41:32.513388 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5927 00:41:32.517089 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5928 00:41:32.526393 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5929 00:41:32.533224 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5930 00:41:32.539536 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5931 00:41:32.549540 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5932 00:41:32.553363 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5933 00:41:32.556535 <6>[ 0.000000] GICv3: 640 SPIs implemented
5934 00:41:32.563010 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5935 00:41:32.566135 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5936 00:41:32.572912 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5937 00:41:32.579654 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5938 00:41:32.589405 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5939 00:41:32.602600 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5940 00:41:32.609858 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5941 00:41:32.620653 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5942 00:41:32.633698 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5943 00:41:32.640478 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5944 00:41:32.647202 <6>[ 0.009470] Console: colour dummy device 80x25
5945 00:41:32.650469 <6>[ 0.014515] printk: console [tty1] enabled
5946 00:41:32.660793 <6>[ 0.018903] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5947 00:41:32.667277 <6>[ 0.029367] pid_max: default: 32768 minimum: 301
5948 00:41:32.670708 <6>[ 0.034248] LSM: Security Framework initializing
5949 00:41:32.680745 <6>[ 0.039164] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5950 00:41:32.687111 <6>[ 0.046788] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5951 00:41:32.693719 <4>[ 0.055662] cacheinfo: Unable to detect cache hierarchy for CPU 0
5952 00:41:32.703496 <6>[ 0.062291] cblist_init_generic: Setting adjustable number of callback queues.
5953 00:41:32.710423 <6>[ 0.069736] cblist_init_generic: Setting shift to 3 and lim to 1.
5954 00:41:32.717518 <6>[ 0.076089] cblist_init_generic: Setting adjustable number of callback queues.
5955 00:41:32.723552 <6>[ 0.083534] cblist_init_generic: Setting shift to 3 and lim to 1.
5956 00:41:32.727129 <6>[ 0.089932] rcu: Hierarchical SRCU implementation.
5957 00:41:32.733940 <6>[ 0.094958] rcu: Max phase no-delay instances is 1000.
5958 00:41:32.740891 <6>[ 0.102884] EFI services will not be available.
5959 00:41:32.743918 <6>[ 0.107832] smp: Bringing up secondary CPUs ...
5960 00:41:32.754088 <6>[ 0.113078] Detected VIPT I-cache on CPU1
5961 00:41:32.761291 <4>[ 0.113122] cacheinfo: Unable to detect cache hierarchy for CPU 1
5962 00:41:32.767423 <6>[ 0.113131] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5963 00:41:32.774762 <6>[ 0.113163] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5964 00:41:32.777256 <6>[ 0.113646] Detected VIPT I-cache on CPU2
5965 00:41:32.784052 <4>[ 0.113678] cacheinfo: Unable to detect cache hierarchy for CPU 2
5966 00:41:32.790745 <6>[ 0.113683] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5967 00:41:32.798244 <6>[ 0.113694] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5968 00:41:32.804138 <6>[ 0.114143] Detected VIPT I-cache on CPU3
5969 00:41:32.807388 <4>[ 0.114174] cacheinfo: Unable to detect cache hierarchy for CPU 3
5970 00:41:32.817127 <6>[ 0.114179] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5971 00:41:32.823821 <6>[ 0.114190] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5972 00:41:32.827453 <6>[ 0.114763] CPU features: detected: Spectre-v2
5973 00:41:32.830459 <6>[ 0.114773] CPU features: detected: Spectre-BHB
5974 00:41:32.837233 <6>[ 0.114777] CPU features: detected: ARM erratum 858921
5975 00:41:32.840092 <6>[ 0.114783] Detected VIPT I-cache on CPU4
5976 00:41:32.846908 <4>[ 0.114831] cacheinfo: Unable to detect cache hierarchy for CPU 4
5977 00:41:32.853791 <6>[ 0.114839] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5978 00:41:32.863524 <6>[ 0.114847] arch_timer: Enabling local workaround for ARM erratum 858921
5979 00:41:32.866482 <6>[ 0.114858] arch_timer: CPU4: Trapping CNTVCT access
5980 00:41:32.873436 <6>[ 0.114865] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5981 00:41:32.879950 <6>[ 0.115350] Detected VIPT I-cache on CPU5
5982 00:41:32.883661 <4>[ 0.115391] cacheinfo: Unable to detect cache hierarchy for CPU 5
5983 00:41:32.893359 <6>[ 0.115396] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5984 00:41:32.899680 <6>[ 0.115403] arch_timer: Enabling local workaround for ARM erratum 858921
5985 00:41:32.903216 <6>[ 0.115410] arch_timer: CPU5: Trapping CNTVCT access
5986 00:41:32.909750 <6>[ 0.115415] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5987 00:41:32.916383 <6>[ 0.115850] Detected VIPT I-cache on CPU6
5988 00:41:32.919625 <4>[ 0.115895] cacheinfo: Unable to detect cache hierarchy for CPU 6
5989 00:41:32.929919 <6>[ 0.115901] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5990 00:41:32.936441 <6>[ 0.115908] arch_timer: Enabling local workaround for ARM erratum 858921
5991 00:41:32.939320 <6>[ 0.115914] arch_timer: CPU6: Trapping CNTVCT access
5992 00:41:32.946290 <6>[ 0.115919] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5993 00:41:32.952677 <6>[ 0.116450] Detected VIPT I-cache on CPU7
5994 00:41:32.959585 <4>[ 0.116495] cacheinfo: Unable to detect cache hierarchy for CPU 7
5995 00:41:32.966028 <6>[ 0.116501] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5996 00:41:32.973183 <6>[ 0.116508] arch_timer: Enabling local workaround for ARM erratum 858921
5997 00:41:32.976180 <6>[ 0.116514] arch_timer: CPU7: Trapping CNTVCT access
5998 00:41:32.982897 <6>[ 0.116519] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5999 00:41:32.989632 <6>[ 0.116567] smp: Brought up 1 node, 8 CPUs
6000 00:41:32.992742 <6>[ 0.355464] SMP: Total of 8 processors activated.
6001 00:41:32.999079 <6>[ 0.360399] CPU features: detected: 32-bit EL0 Support
6002 00:41:33.002418 <6>[ 0.365776] CPU features: detected: 32-bit EL1 Support
6003 00:41:33.009256 <6>[ 0.371144] CPU features: detected: CRC32 instructions
6004 00:41:33.013095 <6>[ 0.376570] CPU: All CPU(s) started at EL2
6005 00:41:33.019383 <6>[ 0.380908] alternatives: applying system-wide alternatives
6006 00:41:33.026756 <6>[ 0.388926] devtmpfs: initialized
6007 00:41:33.039018 <6>[ 0.397898] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6008 00:41:33.049126 <6>[ 0.407847] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6009 00:41:33.052501 <6>[ 0.415577] pinctrl core: initialized pinctrl subsystem
6010 00:41:33.060668 <6>[ 0.422687] DMI not present or invalid.
6011 00:41:33.066836 <6>[ 0.427055] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6012 00:41:33.073727 <6>[ 0.433964] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6013 00:41:33.083568 <6>[ 0.441492] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6014 00:41:33.090471 <6>[ 0.449742] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6015 00:41:33.097015 <6>[ 0.457918] audit: initializing netlink subsys (disabled)
6016 00:41:33.103367 <5>[ 0.463623] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
6017 00:41:33.110124 <6>[ 0.464602] thermal_sys: Registered thermal governor 'step_wise'
6018 00:41:33.116913 <6>[ 0.471588] thermal_sys: Registered thermal governor 'power_allocator'
6019 00:41:33.120029 <6>[ 0.477887] cpuidle: using governor menu
6020 00:41:33.127191 <6>[ 0.488848] NET: Registered PF_QIPCRTR protocol family
6021 00:41:33.133063 <6>[ 0.494343] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6022 00:41:33.140410 <6>[ 0.501439] ASID allocator initialised with 32768 entries
6023 00:41:33.146277 <6>[ 0.508207] Serial: AMBA PL011 UART driver
6024 00:41:33.156575 <4>[ 0.518608] Trying to register duplicate clock ID: 113
6025 00:41:33.216028 <6>[ 0.574876] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6026 00:41:33.230377 <6>[ 0.589234] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6027 00:41:33.234032 <6>[ 0.598986] KASLR enabled
6028 00:41:33.248044 <6>[ 0.606992] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6029 00:41:33.254903 <6>[ 0.613993] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6030 00:41:33.261288 <6>[ 0.620471] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6031 00:41:33.268252 <6>[ 0.627462] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6032 00:41:33.274567 <6>[ 0.633936] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6033 00:41:33.280938 <6>[ 0.640926] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6034 00:41:33.287664 <6>[ 0.647400] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6035 00:41:33.294885 <6>[ 0.654390] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6036 00:41:33.297547 <6>[ 0.661959] ACPI: Interpreter disabled.
6037 00:41:33.307519 <6>[ 0.669954] iommu: Default domain type: Translated
6038 00:41:33.314598 <6>[ 0.675061] iommu: DMA domain TLB invalidation policy: strict mode
6039 00:41:33.317878 <5>[ 0.681693] SCSI subsystem initialized
6040 00:41:33.324090 <6>[ 0.686110] usbcore: registered new interface driver usbfs
6041 00:41:33.330483 <6>[ 0.691837] usbcore: registered new interface driver hub
6042 00:41:33.334343 <6>[ 0.697380] usbcore: registered new device driver usb
6043 00:41:33.341379 <6>[ 0.703689] pps_core: LinuxPPS API ver. 1 registered
6044 00:41:33.351377 <6>[ 0.708875] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6045 00:41:33.355259 <6>[ 0.718199] PTP clock support registered
6046 00:41:33.358322 <6>[ 0.722452] EDAC MC: Ver: 3.0.0
6047 00:41:33.365906 <6>[ 0.728091] FPGA manager framework
6048 00:41:33.372244 <6>[ 0.731774] Advanced Linux Sound Architecture Driver Initialized.
6049 00:41:33.375593 <6>[ 0.738528] vgaarb: loaded
6050 00:41:33.382466 <6>[ 0.741656] clocksource: Switched to clocksource arch_sys_counter
6051 00:41:33.385452 <5>[ 0.748089] VFS: Disk quotas dquot_6.6.0
6052 00:41:33.392196 <6>[ 0.752264] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6053 00:41:33.395573 <6>[ 0.759441] pnp: PnP ACPI: disabled
6054 00:41:33.404417 <6>[ 0.766338] NET: Registered PF_INET protocol family
6055 00:41:33.410560 <6>[ 0.771568] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6056 00:41:33.422779 <6>[ 0.781484] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6057 00:41:33.432586 <6>[ 0.790237] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6058 00:41:33.439537 <6>[ 0.798187] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6059 00:41:33.445883 <6>[ 0.806419] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6060 00:41:33.452569 <6>[ 0.814512] TCP: Hash tables configured (established 32768 bind 32768)
6061 00:41:33.462841 <6>[ 0.821339] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6062 00:41:33.469162 <6>[ 0.828310] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6063 00:41:33.475681 <6>[ 0.835789] NET: Registered PF_UNIX/PF_LOCAL protocol family
6064 00:41:33.482076 <6>[ 0.841878] RPC: Registered named UNIX socket transport module.
6065 00:41:33.485798 <6>[ 0.848022] RPC: Registered udp transport module.
6066 00:41:33.492270 <6>[ 0.852948] RPC: Registered tcp transport module.
6067 00:41:33.495590 <6>[ 0.857871] RPC: Registered tcp NFSv4.1 backchannel transport module.
6068 00:41:33.502452 <6>[ 0.864523] PCI: CLS 0 bytes, default 64
6069 00:41:33.505837 <6>[ 0.868772] Unpacking initramfs...
6070 00:41:33.515413 <6>[ 0.872832] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6071 00:41:33.522083 <6>[ 0.881544] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6072 00:41:33.528926 <6>[ 0.890433] kvm [1]: IPA Size Limit: 40 bits
6073 00:41:33.532332 <6>[ 0.896768] kvm [1]: vgic-v2@c420000
6074 00:41:33.539112 <6>[ 0.900593] kvm [1]: GIC system register CPU interface enabled
6075 00:41:33.545569 <6>[ 0.906771] kvm [1]: vgic interrupt IRQ18
6076 00:41:33.548814 <6>[ 0.911133] kvm [1]: Hyp mode initialized successfully
6077 00:41:33.555458 <5>[ 0.917421] Initialise system trusted keyrings
6078 00:41:33.562224 <6>[ 0.922189] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6079 00:41:33.570029 <6>[ 0.932127] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6080 00:41:33.576749 <5>[ 0.938537] NFS: Registering the id_resolver key type
6081 00:41:33.580289 <5>[ 0.943840] Key type id_resolver registered
6082 00:41:33.586251 <5>[ 0.948251] Key type id_legacy registered
6083 00:41:33.593075 <6>[ 0.952548] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6084 00:41:33.600470 <6>[ 0.959463] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6085 00:41:33.606442 <6>[ 0.967189] 9p: Installing v9fs 9p2000 file system support
6086 00:41:33.633919 <5>[ 0.996053] Key type asymmetric registered
6087 00:41:33.637403 <5>[ 1.000388] Asymmetric key parser 'x509' registered
6088 00:41:33.647278 <6>[ 1.005534] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6089 00:41:33.650278 <6>[ 1.013141] io scheduler mq-deadline registered
6090 00:41:33.653716 <6>[ 1.017895] io scheduler kyber registered
6091 00:41:33.676809 <6>[ 1.038539] EINJ: ACPI disabled.
6092 00:41:33.683176 <4>[ 1.042307] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6093 00:41:33.720991 <6>[ 1.083108] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6094 00:41:33.729423 <6>[ 1.091578] printk: console [ttyS0] disabled
6095 00:41:33.757654 <6>[ 1.116226] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6096 00:41:33.764229 <6>[ 1.125697] printk: console [ttyS0] enabled
6097 00:41:33.767290 <6>[ 1.125697] printk: console [ttyS0] enabled
6098 00:41:33.773958 <6>[ 1.134616] printk: bootconsole [mtk8250] disabled
6099 00:41:33.777195 <6>[ 1.134616] printk: bootconsole [mtk8250] disabled
6100 00:41:33.787333 <3>[ 1.145143] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6101 00:41:33.793820 <3>[ 1.153519] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6102 00:41:33.823127 <6>[ 1.181922] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6103 00:41:33.830715 <6>[ 1.191564] serial serial0: tty port ttyS1 registered
6104 00:41:33.835992 <6>[ 1.198145] SuperH (H)SCI(F) driver initialized
6105 00:41:33.839231 <6>[ 1.203628] msm_serial: driver initialized
6106 00:41:33.855173 <6>[ 1.213989] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6107 00:41:33.864946 <6>[ 1.222584] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6108 00:41:33.871961 <6>[ 1.231159] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6109 00:41:33.881568 <6>[ 1.239727] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6110 00:41:33.888076 <6>[ 1.248377] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6111 00:41:33.898183 <6>[ 1.257038] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6112 00:41:33.908073 <6>[ 1.265775] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6113 00:41:33.914736 <6>[ 1.274514] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6114 00:41:33.925158 <6>[ 1.283078] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6115 00:41:33.934946 <6>[ 1.291877] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6116 00:41:33.942413 <4>[ 1.304249] cacheinfo: Unable to detect cache hierarchy for CPU 0
6117 00:41:33.951349 <6>[ 1.313567] loop: module loaded
6118 00:41:33.963007 <6>[ 1.325449] vsim1: Bringing 1800000uV into 2700000-2700000uV
6119 00:41:33.981342 <6>[ 1.343538] megasas: 07.719.03.00-rc1
6120 00:41:33.990236 <6>[ 1.352334] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6121 00:41:33.999342 <6>[ 1.361025] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6122 00:41:34.015523 <6>[ 1.377703] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6123 00:41:34.072455 <6>[ 1.427762] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6124 00:41:34.130320 <6>[ 1.492467] Freeing initrd memory: 18296K
6125 00:41:34.146132 <4>[ 1.504328] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6126 00:41:34.152381 <4>[ 1.513555] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6127 00:41:34.159084 <4>[ 1.520254] Hardware name: Google juniper sku16 board (DT)
6128 00:41:34.162337 <4>[ 1.525992] Call trace:
6129 00:41:34.165944 <4>[ 1.528693] dump_backtrace.part.0+0xe0/0xf0
6130 00:41:34.169077 <4>[ 1.533229] show_stack+0x18/0x30
6131 00:41:34.172179 <4>[ 1.536802] dump_stack_lvl+0x68/0x84
6132 00:41:34.175479 <4>[ 1.540723] dump_stack+0x18/0x34
6133 00:41:34.182545 <4>[ 1.544293] sysfs_warn_dup+0x64/0x80
6134 00:41:34.185875 <4>[ 1.548215] sysfs_do_create_link_sd+0xf0/0x100
6135 00:41:34.188980 <4>[ 1.553002] sysfs_create_link+0x20/0x40
6136 00:41:34.192697 <4>[ 1.557181] bus_add_device+0x68/0x10c
6137 00:41:34.199101 <4>[ 1.561187] device_add+0x340/0x7ac
6138 00:41:34.202251 <4>[ 1.564930] of_device_add+0x44/0x60
6139 00:41:34.205801 <4>[ 1.568764] of_platform_device_create_pdata+0x90/0x120
6140 00:41:34.212561 <4>[ 1.574246] of_platform_bus_create+0x170/0x370
6141 00:41:34.216495 <4>[ 1.579032] of_platform_populate+0x50/0xfc
6142 00:41:34.219793 <4>[ 1.583472] parse_mtd_partitions+0x1dc/0x510
6143 00:41:34.226778 <4>[ 1.588085] mtd_device_parse_register+0xf8/0x2e0
6144 00:41:34.230333 <4>[ 1.593043] spi_nor_probe+0x21c/0x2f0
6145 00:41:34.233607 <4>[ 1.597049] spi_mem_probe+0x6c/0xb0
6146 00:41:34.236532 <4>[ 1.600881] spi_probe+0x84/0xe4
6147 00:41:34.240188 <4>[ 1.604363] really_probe+0xbc/0x2e0
6148 00:41:34.246810 <4>[ 1.608193] __driver_probe_device+0x78/0x11c
6149 00:41:34.249777 <4>[ 1.612805] driver_probe_device+0xd8/0x160
6150 00:41:34.253062 <4>[ 1.617243] __device_attach_driver+0xb8/0x134
6151 00:41:34.259883 <4>[ 1.621942] bus_for_each_drv+0x78/0xd0
6152 00:41:34.263307 <4>[ 1.626032] __device_attach+0xa8/0x1c0
6153 00:41:34.266363 <4>[ 1.630122] device_initial_probe+0x14/0x20
6154 00:41:34.273289 <4>[ 1.634561] bus_probe_device+0x9c/0xa4
6155 00:41:34.276450 <4>[ 1.638651] device_add+0x3ac/0x7ac
6156 00:41:34.280223 <4>[ 1.642393] __spi_add_device+0x78/0x120
6157 00:41:34.283583 <4>[ 1.646571] spi_add_device+0x40/0x7c
6158 00:41:34.289376 <4>[ 1.650489] spi_register_controller+0x610/0xad0
6159 00:41:34.293457 <4>[ 1.655362] devm_spi_register_controller+0x4c/0xa4
6160 00:41:34.296512 <4>[ 1.660495] mtk_spi_probe+0x3f8/0x650
6161 00:41:34.299819 <4>[ 1.664499] platform_probe+0x68/0xe0
6162 00:41:34.306236 <4>[ 1.668417] really_probe+0xbc/0x2e0
6163 00:41:34.309595 <4>[ 1.672247] __driver_probe_device+0x78/0x11c
6164 00:41:34.312910 <4>[ 1.676859] driver_probe_device+0xd8/0x160
6165 00:41:34.319733 <4>[ 1.681297] __driver_attach+0x94/0x19c
6166 00:41:34.323162 <4>[ 1.685387] bus_for_each_dev+0x70/0xd0
6167 00:41:34.326821 <4>[ 1.689477] driver_attach+0x24/0x30
6168 00:41:34.329848 <4>[ 1.693307] bus_add_driver+0x154/0x20c
6169 00:41:34.333281 <4>[ 1.697398] driver_register+0x78/0x130
6170 00:41:34.339799 <4>[ 1.701488] __platform_driver_register+0x28/0x34
6171 00:41:34.342959 <4>[ 1.706448] mtk_spi_driver_init+0x1c/0x28
6172 00:41:34.346398 <4>[ 1.710801] do_one_initcall+0x50/0x1d0
6173 00:41:34.353475 <4>[ 1.714892] kernel_init_freeable+0x21c/0x288
6174 00:41:34.356801 <4>[ 1.719505] kernel_init+0x24/0x12c
6175 00:41:34.359784 <4>[ 1.723251] ret_from_fork+0x10/0x20
6176 00:41:34.370427 <6>[ 1.732167] tun: Universal TUN/TAP device driver, 1.6
6177 00:41:34.373280 <6>[ 1.738471] thunder_xcv, ver 1.0
6178 00:41:34.376952 <6>[ 1.741984] thunder_bgx, ver 1.0
6179 00:41:34.380534 <6>[ 1.745491] nicpf, ver 1.0
6180 00:41:34.391472 <6>[ 1.749872] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6181 00:41:34.394542 <6>[ 1.757355] hns3: Copyright (c) 2017 Huawei Corporation.
6182 00:41:34.401073 <6>[ 1.762953] hclge is initializing
6183 00:41:34.404369 <6>[ 1.766538] e1000: Intel(R) PRO/1000 Network Driver
6184 00:41:34.411402 <6>[ 1.771673] e1000: Copyright (c) 1999-2006 Intel Corporation.
6185 00:41:34.414469 <6>[ 1.777694] e1000e: Intel(R) PRO/1000 Network Driver
6186 00:41:34.420947 <6>[ 1.782915] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6187 00:41:34.427783 <6>[ 1.789107] igb: Intel(R) Gigabit Ethernet Network Driver
6188 00:41:34.434274 <6>[ 1.794763] igb: Copyright (c) 2007-2014 Intel Corporation.
6189 00:41:34.441027 <6>[ 1.800605] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6190 00:41:34.448386 <6>[ 1.807128] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6191 00:41:34.450812 <6>[ 1.813688] sky2: driver version 1.30
6192 00:41:34.457809 <6>[ 1.818939] usbcore: registered new device driver r8152-cfgselector
6193 00:41:34.464599 <6>[ 1.825484] usbcore: registered new interface driver r8152
6194 00:41:34.471453 <6>[ 1.831317] VFIO - User Level meta-driver version: 0.3
6195 00:41:34.477914 <6>[ 1.839117] mtu3 11201000.usb: uwk - reg:0x420, version:101
6196 00:41:34.484769 <4>[ 1.844989] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6197 00:41:34.491037 <6>[ 1.852263] mtu3 11201000.usb: dr_mode: 1, drd: auto
6198 00:41:34.497928 <6>[ 1.857488] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6199 00:41:34.501217 <6>[ 1.863675] mtu3 11201000.usb: usb3-drd: 0
6200 00:41:34.507718 <6>[ 1.869237] mtu3 11201000.usb: xHCI platform device register success...
6201 00:41:34.518949 <4>[ 1.877875] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6202 00:41:34.525921 <6>[ 1.885819] xhci-mtk 11200000.usb: xHCI Host Controller
6203 00:41:34.532595 <6>[ 1.891322] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6204 00:41:34.539154 <6>[ 1.899043] xhci-mtk 11200000.usb: USB3 root hub has no ports
6205 00:41:34.545566 <6>[ 1.905051] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6206 00:41:34.552454 <6>[ 1.914475] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6207 00:41:34.559138 <6>[ 1.920550] xhci-mtk 11200000.usb: xHCI Host Controller
6208 00:41:34.565748 <6>[ 1.926037] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6209 00:41:34.572654 <6>[ 1.933715] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6210 00:41:34.575615 <6>[ 1.940532] hub 1-0:1.0: USB hub found
6211 00:41:34.582542 <6>[ 1.944564] hub 1-0:1.0: 1 port detected
6212 00:41:34.592284 <6>[ 1.949935] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6213 00:41:34.595963 <6>[ 1.958544] hub 2-0:1.0: USB hub found
6214 00:41:34.602363 <3>[ 1.962573] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6215 00:41:34.608982 <6>[ 1.970464] usbcore: registered new interface driver usb-storage
6216 00:41:34.615625 <6>[ 1.977047] usbcore: registered new device driver onboard-usb-hub
6217 00:41:34.627394 <4>[ 1.985775] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6218 00:41:34.635802 <6>[ 1.997997] mt6397-rtc mt6358-rtc: registered as rtc0
6219 00:41:34.646100 <6>[ 2.003508] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:41:34 UTC (1718498494)
6220 00:41:34.649384 <6>[ 2.013411] i2c_dev: i2c /dev entries driver
6221 00:41:34.661320 <6>[ 2.019835] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6222 00:41:34.671129 <6>[ 2.028221] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6223 00:41:34.674660 <6>[ 2.037129] i2c 4-0058: Fixed dependency cycle(s) with /panel
6224 00:41:34.684743 <6>[ 2.043199] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6225 00:41:34.691240 <3>[ 2.050665] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6226 00:41:34.708478 <6>[ 2.070635] cpu cpu0: EM: created perf domain
6227 00:41:34.717895 <6>[ 2.076072] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6228 00:41:34.725583 <6>[ 2.087364] cpu cpu4: EM: created perf domain
6229 00:41:34.731870 <6>[ 2.094446] sdhci: Secure Digital Host Controller Interface driver
6230 00:41:34.738661 <6>[ 2.100904] sdhci: Copyright(c) Pierre Ossman
6231 00:41:34.745766 <6>[ 2.106309] Synopsys Designware Multimedia Card Interface Driver
6232 00:41:34.752092 <6>[ 2.106863] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6233 00:41:34.755358 <6>[ 2.113362] sdhci-pltfm: SDHCI platform and OF driver helper
6234 00:41:34.763213 <6>[ 2.125861] ledtrig-cpu: registered to indicate activity on CPUs
6235 00:41:34.771232 <6>[ 2.133584] usbcore: registered new interface driver usbhid
6236 00:41:34.774496 <6>[ 2.139427] usbhid: USB HID core driver
6237 00:41:34.785195 <6>[ 2.143691] spi_master spi2: will run message pump with realtime priority
6238 00:41:34.789043 <4>[ 2.143695] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6239 00:41:34.796190 <4>[ 2.157946] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6240 00:41:34.809390 <6>[ 2.162884] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6241 00:41:34.828419 <6>[ 2.180802] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6242 00:41:34.835172 <4>[ 2.191311] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6243 00:41:34.841971 <6>[ 2.201694] cros-ec-spi spi2.0: Chrome EC device registered
6244 00:41:34.851642 <4>[ 2.210145] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6245 00:41:34.858626 <6>[ 2.218157] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x12c14
6246 00:41:34.865359 <4>[ 2.224153] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6247 00:41:34.869004 <6>[ 2.226174] mmc0: new HS400 MMC card at address 0001
6248 00:41:34.874928 <4>[ 2.233490] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6249 00:41:34.881816 <6>[ 2.244212] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6250 00:41:34.895839 <6>[ 2.254062] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6251 00:41:34.898661 <6>[ 2.256724] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6252 00:41:34.907939 <6>[ 2.270345] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6253 00:41:34.914558 <6>[ 2.277075] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6254 00:41:34.921630 <6>[ 2.283550] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6255 00:41:34.955160 <6>[ 2.310212] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6256 00:41:34.964578 <6>[ 2.311084] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6257 00:41:34.974519 <6>[ 2.322446] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6258 00:41:34.984296 <6>[ 2.336380] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6259 00:41:34.991068 <6>[ 2.353233] NET: Registered PF_PACKET protocol family
6260 00:41:34.994624 <6>[ 2.358648] 9pnet: Installing 9P2000 support
6261 00:41:35.001377 <5>[ 2.363225] Key type dns_resolver registered
6262 00:41:35.007485 <6>[ 2.365679] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6263 00:41:35.011497 <6>[ 2.368228] registered taskstats version 1
6264 00:41:35.017772 <5>[ 2.378897] Loading compiled-in X.509 certificates
6265 00:41:35.063475 <3>[ 2.422337] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6266 00:41:35.091249 <6>[ 2.446826] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6267 00:41:35.101760 <6>[ 2.460327] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6268 00:41:35.111685 <6>[ 2.468900] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6269 00:41:35.118021 <6>[ 2.477429] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6270 00:41:35.128196 <6>[ 2.485953] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6271 00:41:35.134847 <6>[ 2.494474] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6272 00:41:35.144758 <6>[ 2.503012] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6273 00:41:35.152143 <6>[ 2.511547] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6274 00:41:35.158510 <6>[ 2.520681] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6275 00:41:35.166105 <6>[ 2.528077] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6276 00:41:35.173339 <6>[ 2.535266] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6277 00:41:35.183430 <6>[ 2.542506] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6278 00:41:35.190379 <6>[ 2.549973] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6279 00:41:35.193960 <6>[ 2.557151] hub 1-1:1.0: USB hub found
6280 00:41:35.200089 <6>[ 2.561447] hub 1-1:1.0: 3 ports detected
6281 00:41:35.206722 <6>[ 2.567525] panfrost 13040000.gpu: clock rate = 511999970
6282 00:41:35.216725 <6>[ 2.573228] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6283 00:41:35.223537 <6>[ 2.583444] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6284 00:41:35.233429 <6>[ 2.591459] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6285 00:41:35.243064 <6>[ 2.599894] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6286 00:41:35.250053 <6>[ 2.611973] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6287 00:41:35.264013 <6>[ 2.622904] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6288 00:41:35.273931 <6>[ 2.631783] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6289 00:41:35.283897 <6>[ 2.640933] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6290 00:41:35.291143 <6>[ 2.650062] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6291 00:41:35.300697 <6>[ 2.659189] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6292 00:41:35.310625 <6>[ 2.668491] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6293 00:41:35.320235 <6>[ 2.677790] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6294 00:41:35.330610 <6>[ 2.687263] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6295 00:41:35.340187 <6>[ 2.696736] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6296 00:41:35.346963 <6>[ 2.705864] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6297 00:41:35.420313 <6>[ 2.778836] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6298 00:41:35.429794 <6>[ 2.787703] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6299 00:41:35.440858 <6>[ 2.799766] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6300 00:41:35.498962 <6>[ 2.857687] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6301 00:41:36.167262 <6>[ 3.046016] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6302 00:41:36.176387 <4>[ 3.162840] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6303 00:41:36.182854 <4>[ 3.162858] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6304 00:41:36.189797 <6>[ 3.203115] r8152 1-1.2:1.0 eth0: v1.12.13
6305 00:41:36.196128 <6>[ 3.281686] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6306 00:41:36.202539 <6>[ 3.508460] Console: switching to colour frame buffer device 170x48
6307 00:41:36.209288 <6>[ 3.569102] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6308 00:41:36.231700 <6>[ 3.586884] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6309 00:41:36.248305 <6>[ 3.603571] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6310 00:41:36.258027 <6>[ 3.616684] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6311 00:41:36.265247 <6>[ 3.624805] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6312 00:41:36.277795 <6>[ 3.631872] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6313 00:41:36.295758 <6>[ 3.651312] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6314 00:41:37.464969 <6>[ 4.826907] r8152 1-1.2:1.0 eth0: carrier on
6315 00:41:37.503725 <5>[ 4.849798] Sending DHCP requests ., OK
6316 00:41:37.510239 <6>[ 4.870055] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6317 00:41:37.513880 <6>[ 4.878488] IP-Config: Complete:
6318 00:41:37.526974 <6>[ 4.882059] device=eth0, hwaddr=00:e0:4c:72:3d:67, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6319 00:41:37.533841 <6>[ 4.892959] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1, domain=lava-rack, nis-domain=(none)
6320 00:41:37.548867 <6>[ 4.907232] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6321 00:41:37.557263 <6>[ 4.907242] nameserver0=192.168.201.1
6322 00:41:37.564676 <6>[ 4.927019] clk: Disabling unused clocks
6323 00:41:37.569783 <6>[ 4.934955] ALSA device list:
6324 00:41:37.579300 <6>[ 4.940997] No soundcards found.
6325 00:41:37.588547 <6>[ 4.950062] Freeing unused kernel memory: 8512K
6326 00:41:37.595349 <6>[ 4.957203] Run /init as init process
6327 00:41:37.607428 Loading, please wait...
6328 00:41:37.643296 Starting systemd-udevd version 252.22-1~deb12u1
6329 00:41:37.950759 <6>[ 5.309302] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6330 00:41:37.958700 <3>[ 5.320743] thermal_sys: Failed to find 'trips' node
6331 00:41:37.965168 <3>[ 5.320767] mtk-scp 10500000.scp: invalid resource
6332 00:41:37.972007 <3>[ 5.326046] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6333 00:41:37.982114 <3>[ 5.326069] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6334 00:41:37.988487 <4>[ 5.326075] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6335 00:41:37.995028 <3>[ 5.335527] thermal_sys: Failed to find 'trips' node
6336 00:41:38.001595 <6>[ 5.339389] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6337 00:41:38.008465 <3>[ 5.347749] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6338 00:41:38.018386 <3>[ 5.374286] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6339 00:41:38.027980 <3>[ 5.376958] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6340 00:41:38.034981 <3>[ 5.386932] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6341 00:41:38.044819 <3>[ 5.390643] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6342 00:41:38.051622 <3>[ 5.392760] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6343 00:41:38.061239 <3>[ 5.392771] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6344 00:41:38.064424 <6>[ 5.393507] remoteproc remoteproc0: scp is available
6345 00:41:38.074453 <4>[ 5.393577] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6346 00:41:38.081372 <6>[ 5.393584] remoteproc remoteproc0: powering up scp
6347 00:41:38.091011 <4>[ 5.393603] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6348 00:41:38.097714 <3>[ 5.393606] remoteproc remoteproc0: request_firmware failed: -2
6349 00:41:38.104255 <4>[ 5.395273] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6350 00:41:38.114662 <4>[ 5.400183] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6351 00:41:38.120728 <4>[ 5.400817] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6352 00:41:38.135242 <3>[ 5.402076] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6353 00:41:38.141137 <3>[ 5.402910] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6354 00:41:38.150885 <3>[ 5.402989] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6355 00:41:38.157555 <3>[ 5.402997] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6356 00:41:38.168208 <3>[ 5.403004] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6357 00:41:38.178283 <3>[ 5.403009] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6358 00:41:38.181547 <6>[ 5.407607] mc: Linux media interface: v0.10
6359 00:41:38.192113 <4>[ 5.412508] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6360 00:41:38.198590 <3>[ 5.419124] elan_i2c 2-0015: Error applying setting, reverse things back
6361 00:41:38.208549 <3>[ 5.425566] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6362 00:41:38.218136 <6>[ 5.430794] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6363 00:41:38.224820 <6>[ 5.464567] cs_system_cfg: CoreSight Configuration manager initialised
6364 00:41:38.231164 <6>[ 5.467769] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6365 00:41:38.245209 <6>[ 5.473359] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6366 00:41:38.248377 <6>[ 5.482899] videodev: Linux video capture interface: v2.00
6367 00:41:38.261638 <3>[ 5.489301] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6368 00:41:38.272363 <6>[ 5.500151] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6369 00:41:38.278532 <6>[ 5.566815] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6370 00:41:38.288386 <6>[ 5.574774] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6371 00:41:38.295020 <5>[ 5.604051] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6372 00:41:38.305198 <6>[ 5.611828] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6373 00:41:38.308547 <6>[ 5.617777] Bluetooth: Core ver 2.22
6374 00:41:38.315104 <6>[ 5.629781] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6375 00:41:38.321749 <5>[ 5.634422] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6376 00:41:38.332140 <5>[ 5.634991] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6377 00:41:38.341266 <4>[ 5.635193] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6378 00:41:38.344870 <6>[ 5.635203] cfg80211: failed to load regulatory.db
6379 00:41:38.351591 <6>[ 5.637704] NET: Registered PF_BLUETOOTH protocol family
6380 00:41:38.361658 <6>[ 5.647011] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6381 00:41:38.368133 <6>[ 5.647792] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6382 00:41:38.375132 <6>[ 5.647865] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6383 00:41:38.382244 <6>[ 5.648508] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6384 00:41:38.391773 <6>[ 5.648577] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6385 00:41:38.398563 <6>[ 5.649643] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6386 00:41:38.404979 <6>[ 5.654784] Bluetooth: HCI device and connection manager initialized
6387 00:41:38.418133 <6>[ 5.666791] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6388 00:41:38.424843 <6>[ 5.670728] Bluetooth: HCI socket layer initialized
6389 00:41:38.435116 <6>[ 5.670729] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6390 00:41:38.445209 <6>[ 5.670865] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6391 00:41:38.451917 <6>[ 5.674551] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6392 00:41:38.458224 <6>[ 5.674741] usbcore: registered new interface driver uvcvideo
6393 00:41:38.465137 <6>[ 5.682661] Bluetooth: L2CAP socket layer initialized
6394 00:41:38.474726 <6>[ 5.755722] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6395 00:41:38.481691 <6>[ 5.758388] Bluetooth: SCO socket layer initialized
6396 00:41:38.491201 <3>[ 5.759251] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6397 00:41:38.501749 <3>[ 5.760194] debugfs: File 'Playback' in directory 'dapm' already present!
6398 00:41:38.505310 <3>[ 5.760199] debugfs: File 'Capture' in directory 'dapm' already present!
6399 00:41:38.518772 <6>[ 5.761536] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6400 00:41:38.526910 <6>[ 5.765862] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6401 00:41:38.529956 <6>[ 5.801969] Bluetooth: HCI UART driver ver 2.3
6402 00:41:38.543194 <6>[ 5.803910] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6403 00:41:38.546970 <6>[ 5.811491] Bluetooth: HCI UART protocol H4 registered
6404 00:41:38.553850 <6>[ 5.811532] Bluetooth: HCI UART protocol LL registered
6405 00:41:38.563687 <4>[ 5.853093] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6406 00:41:38.566872 <4>[ 5.853093] Fallback method does not support PEC.
6407 00:41:38.574028 <6>[ 5.860055] Bluetooth: HCI UART protocol Three-wire (H5) registered
6408 00:41:38.584635 <3>[ 5.869623] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6409 00:41:38.591281 <6>[ 5.874343] Bluetooth: HCI UART protocol Broadcom registered
6410 00:41:38.601486 <3>[ 5.891789] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6411 00:41:38.607785 <6>[ 5.893162] Bluetooth: HCI UART protocol QCA registered
6412 00:41:38.610873 <6>[ 5.894086] Bluetooth: hci0: setting up ROME/QCA6390
6413 00:41:38.617181 <6>[ 5.969746] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6414 00:41:38.624311 <6>[ 5.973157] Bluetooth: HCI UART protocol Marvell registered
6415 00:41:38.668524 Begin: Loading essential drivers ... done.
6416 00:41:38.671570 Begin: Running /scripts/init-premount ... done.
6417 00:41:38.678674 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6418 00:41:38.688384 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6419 00:41:38.691805 Device /sys/class/net/eth0 found
6420 00:41:38.692195 done.
6421 00:41:38.704284 Begin: Waiting up to 180 secs for any network device to become available ... done.
6422 00:41:38.746784 <3>[ 6.108717] Bluetooth: hci0: Frame reassembly failed (-84)
6423 00:41:38.755547 IP-Config: eth0 hardware address 00:e0:4c:72:3d:67 mtu 1500 DHCP
6424 00:41:38.762589 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6425 00:41:38.768826 address: 192.168.201.13 broadcast: 192.168.201.255 netmask: 255.255.255.0
6426 00:41:38.775775 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6427 00:41:38.782240 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-1
6428 00:41:38.789260 domain : lava-rack
6429 00:41:38.791841 rootserver: 192.168.201.1 rootpath:
6430 00:41:38.795201 filename :
6431 00:41:38.804133 done.
6432 00:41:38.812423 Begin: Running /scripts/nfs-bottom ... done.
6433 00:41:38.844857 Begin: Running /scripts/init-bottom ... done.
6434 00:41:39.005860 <6>[ 6.364598] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6435 00:41:39.016752 <6>[ 6.379122] Bluetooth: hci0: QCA Product ID :0x00000008
6436 00:41:39.027293 <6>[ 6.389416] Bluetooth: hci0: QCA SOC Version :0x00000044
6437 00:41:39.037777 <6>[ 6.399857] Bluetooth: hci0: QCA ROM Version :0x00000302
6438 00:41:39.048241 <6>[ 6.410206] Bluetooth: hci0: QCA Patch Version:0x00000111
6439 00:41:39.058887 <6>[ 6.420489] Bluetooth: hci0: QCA controller version 0x00440302
6440 00:41:39.071296 <6>[ 6.430212] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6441 00:41:39.082873 <4>[ 6.441251] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6442 00:41:39.089534 <4>[ 6.445177] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6443 00:41:39.099180 <3>[ 6.450588] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6444 00:41:39.109825 <4>[ 6.465959] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6445 00:41:39.116677 <3>[ 6.468499] Bluetooth: hci0: QCA Failed to download patch (-2)
6446 00:41:39.123036 <4>[ 6.479464] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6447 00:41:39.147285 <4>[ 6.509236] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6448 00:41:40.260546 <6>[ 7.623150] NET: Registered PF_INET6 protocol family
6449 00:41:40.273223 <6>[ 7.635823] Segment Routing with IPv6
6450 00:41:40.281884 <6>[ 7.644180] In-situ OAM (IOAM) with IPv6
6451 00:41:40.464756 <30>[ 7.800466] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6452 00:41:40.484537 <30>[ 7.846806] systemd[1]: Detected architecture arm64.
6453 00:41:40.496652
6454 00:41:40.499788 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6455 00:41:40.500193
6456 00:41:40.530129 <30>[ 7.891913] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6457 00:41:41.627883 <30>[ 8.986645] systemd[1]: Queued start job for default target graphical.target.
6458 00:41:41.668122 <30>[ 9.026931] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6459 00:41:41.681143 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6460 00:41:41.701353 <30>[ 9.059879] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6461 00:41:41.714852 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6462 00:41:41.733352 <30>[ 9.092158] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6463 00:41:41.747502 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6464 00:41:41.764769 <30>[ 9.123270] systemd[1]: Created slice user.slice - User and Session Slice.
6465 00:41:41.776527 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6466 00:41:41.798741 <30>[ 9.154247] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6467 00:41:41.811644 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6468 00:41:41.834821 <30>[ 9.190096] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6469 00:41:41.847815 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6470 00:41:41.873801 <30>[ 9.222056] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6471 00:41:41.892350 <30>[ 9.251219] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6472 00:41:41.900353 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6473 00:41:41.919105 <30>[ 9.278016] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6474 00:41:41.932200 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6475 00:41:41.950970 <30>[ 9.309918] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6476 00:41:41.965544 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6477 00:41:41.979923 <30>[ 9.341933] systemd[1]: Reached target paths.target - Path Units.
6478 00:41:41.995088 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6479 00:41:42.010959 <30>[ 9.369868] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6480 00:41:42.023469 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6481 00:41:42.036071 <30>[ 9.397830] systemd[1]: Reached target slices.target - Slice Units.
6482 00:41:42.050763 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6483 00:41:42.064378 <30>[ 9.425900] systemd[1]: Reached target swap.target - Swaps.
6484 00:41:42.075350 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6485 00:41:42.095971 <30>[ 9.453906] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6486 00:41:42.108922 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6487 00:41:42.128208 <30>[ 9.486347] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6488 00:41:42.141413 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6489 00:41:42.162056 <30>[ 9.520856] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6490 00:41:42.176270 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6491 00:41:42.197301 <30>[ 9.555811] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6492 00:41:42.211501 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6493 00:41:42.228319 <30>[ 9.586598] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6494 00:41:42.240445 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6495 00:41:42.261100 <30>[ 9.619578] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6496 00:41:42.274443 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6497 00:41:42.294678 <30>[ 9.653093] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6498 00:41:42.307540 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6499 00:41:42.323509 <30>[ 9.682461] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6500 00:41:42.336973 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6501 00:41:42.387445 <30>[ 9.746216] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6502 00:41:42.400153 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6503 00:41:42.413163 <30>[ 9.772017] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6504 00:41:42.425871 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6505 00:41:42.446938 <30>[ 9.805409] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6506 00:41:42.457919 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6507 00:41:42.482595 <30>[ 9.834536] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6508 00:41:42.524218 <30>[ 9.882627] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6509 00:41:42.536889 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6510 00:41:42.559786 <30>[ 9.918431] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6511 00:41:42.571117 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6512 00:41:42.593397 <30>[ 9.951924] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6513 00:41:42.605780 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6514 00:41:42.628706 <30>[ 9.987360] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6515 00:41:42.640754 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6516 00:41:42.655222 <6>[ 10.013743] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6517 00:41:42.703988 <30>[ 10.062761] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6518 00:41:42.716849 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6519 00:41:42.741866 <30>[ 10.100086] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6520 00:41:42.753135 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6521 00:41:42.787312 <6>[ 10.148418] fuse: init (API version 7.37)
6522 00:41:42.804426 <30>[ 10.162697] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6523 00:41:42.816109 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6524 00:41:42.841589 <30>[ 10.200265] systemd[1]: Starting systemd-journald.service - Journal Service...
6525 00:41:42.854366 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6526 00:41:42.881971 <30>[ 10.240694] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6527 00:41:42.892715 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6528 00:41:42.918328 <30>[ 10.274142] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6529 00:41:42.929302 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6530 00:41:42.951688 <30>[ 10.310528] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6531 00:41:42.964227 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6532 00:41:42.986545 <30>[ 10.345402] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6533 00:41:42.997392 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6534 00:41:43.020544 <30>[ 10.379698] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6535 00:41:43.037026 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - H<3>[ 10.395813] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6536 00:41:43.040461 uge Pages File System.
6537 00:41:43.055015 <3>[ 10.413026] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6538 00:41:43.064207 <30>[ 10.422335] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6539 00:41:43.075246 <3>[ 10.433171] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6540 00:41:43.085747 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6541 00:41:43.092258 <3>[ 10.451905] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6542 00:41:43.103202 <30>[ 10.462341] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6543 00:41:43.120538 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 10.478370] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6544 00:41:43.120630 File System.
6545 00:41:43.138463 <3>[ 10.496760] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6546 00:41:43.148441 <30>[ 10.506446] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6547 00:41:43.163510 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate <3>[ 10.523769] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6548 00:41:43.167253 List of Static Device Nodes.
6549 00:41:43.183104 <3>[ 10.540876] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6550 00:41:43.189221 <30>[ 10.550438] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6551 00:41:43.201872 <30>[ 10.559201] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6552 00:41:43.208640 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6553 00:41:43.228213 <30>[ 10.586826] systemd[1]: Started systemd-journald.service - Journal Service.
6554 00:41:43.238449 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6555 00:41:43.264543 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6556 00:41:43.287116 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6557 00:41:43.306546 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6558 00:41:43.326481 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6559 00:41:43.346167 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6560 00:41:43.368811 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6561 00:41:43.389427 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6562 00:41:43.412770 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6563 00:41:43.434991 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6564 00:41:43.478561 <4>[ 10.830797] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6565 00:41:43.490012 <3>[ 10.848565] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6566 00:41:43.504380 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6567 00:41:43.533301 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6568 00:41:43.562205 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6569 00:41:43.585308 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6570 00:41:43.625441 <46>[ 10.984413] systemd-journald[321]: Received client request to flush runtime journal.
6571 00:41:43.637467 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6572 00:41:43.660384 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6573 00:41:43.956487 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6574 00:41:43.977362 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6575 00:41:43.996942 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6576 00:41:44.017916 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6577 00:41:44.406645 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6578 00:41:44.765919 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6579 00:41:44.812392 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6580 00:41:45.090380 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6581 00:41:45.219455 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6582 00:41:45.236062 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6583 00:41:45.255628 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6584 00:41:45.300913 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6585 00:41:45.330491 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6586 00:41:45.578970 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6587 00:41:45.651835 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6588 00:41:45.672406 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6589 00:41:45.721189 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6590 00:41:45.866453 <4>[ 13.228730] power_supply_show_property: 4 callbacks suppressed
6591 00:41:45.878479 <3>[ 13.228740] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6592 00:41:45.886344 <3>[ 13.243523] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6593 00:41:45.892383 <3>[ 13.246031] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6594 00:41:45.909943 <3>[ 13.268592] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6595 00:41:45.926565 <3>[ 13.285305] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6596 00:41:45.944063 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 13.301748] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6597 00:41:45.944145 d-backlight.
6598 00:41:45.960083 <3>[ 13.318919] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6599 00:41:45.977828 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Sup<3>[ 13.334781] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6600 00:41:45.977906 port.
6601 00:41:45.992558 <3>[ 13.351375] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6602 00:41:46.007957 <3>[ 13.366506] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6603 00:41:46.032008 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6604 00:41:46.071267 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6605 00:41:46.090385 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6606 00:41:46.155723 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6607 00:41:46.207925 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6608 00:41:46.243234 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6609 00:41:46.302253 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6610 00:41:46.320509 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6611 00:41:46.384237 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6612 00:41:46.407712 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6613 00:41:46.428033 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6614 00:41:46.452503 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6615 00:41:46.474851 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6616 00:41:46.493339 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6617 00:41:46.514367 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6618 00:41:46.534137 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6619 00:41:46.549488 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6620 00:41:46.567600 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6621 00:41:46.583984 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6622 00:41:46.607432 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6623 00:41:46.654687 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6624 00:41:46.672350 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6625 00:41:46.690263 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6626 00:41:46.710434 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6627 00:41:46.727792 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6628 00:41:46.743456 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6629 00:41:46.762114 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6630 00:41:46.779538 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6631 00:41:46.796011 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6632 00:41:46.836207 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6633 00:41:46.859692 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6634 00:41:46.889672 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6635 00:41:46.996368 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6636 00:41:47.016798 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6637 00:41:47.038456 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6638 00:41:47.060713 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6639 00:41:47.207246 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6640 00:41:47.268452 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6641 00:41:47.292542 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6642 00:41:47.308641 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6643 00:41:47.330421 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6644 00:41:47.350067 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6645 00:41:47.373185 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6646 00:41:47.396369 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6647 00:41:47.419638 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6648 00:41:47.462584 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6649 00:41:47.523564 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6650 00:41:47.613524
6651 00:41:47.616772 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6652 00:41:47.617291
6653 00:41:47.620150 debian-bookworm-arm64 login: root (automatic login)
6654 00:41:47.620541
6655 00:41:47.930359 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024 aarch64
6656 00:41:47.930860
6657 00:41:47.936367 The programs included with the Debian GNU/Linux system are free software;
6658 00:41:47.943530 the exact distribution terms for each program are described in the
6659 00:41:47.946913 individual files in /usr/share/doc/*/copyright.
6660 00:41:47.947336
6661 00:41:47.953112 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6662 00:41:47.956660 permitted by applicable law.
6663 00:41:49.130679 Matched prompt #10: / #
6665 00:41:49.131772 Setting prompt string to ['/ #']
6666 00:41:49.132257 end: 2.2.5.1 login-action (duration 00:00:17) [common]
6668 00:41:49.133471 end: 2.2.5 auto-login-action (duration 00:00:17) [common]
6669 00:41:49.133906 start: 2.2.6 expect-shell-connection (timeout 00:03:49) [common]
6670 00:41:49.134305 Setting prompt string to ['/ #']
6671 00:41:49.134600 Forcing a shell prompt, looking for ['/ #']
6673 00:41:49.185371 / #
6674 00:41:49.186073 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6675 00:41:49.186528 Waiting using forced prompt support (timeout 00:02:30)
6676 00:41:49.191716
6677 00:41:49.192617 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6678 00:41:49.193171 start: 2.2.7 export-device-env (timeout 00:03:49) [common]
6680 00:41:49.294301 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai'
6681 00:41:49.301243 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368351/extract-nfsrootfs-xmxdlrai'
6683 00:41:49.402818 / # export NFS_SERVER_IP='192.168.201.1'
6684 00:41:49.409036 export NFS_SERVER_IP='192.168.201.1'
6685 00:41:49.409799 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6686 00:41:49.410404 end: 2.2 depthcharge-retry (duration 00:01:11) [common]
6687 00:41:49.410929 end: 2 depthcharge-action (duration 00:01:11) [common]
6688 00:41:49.411392 start: 3 lava-test-retry (timeout 00:08:10) [common]
6689 00:41:49.411874 start: 3.1 lava-test-shell (timeout 00:08:10) [common]
6690 00:41:49.412255 Using namespace: common
6692 00:41:49.513227 / # #
6693 00:41:49.513816 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6694 00:41:49.519831 #
6695 00:41:49.520492 Using /lava-14368351
6697 00:41:49.621511 / # export SHELL=/bin/bash
6698 00:41:49.627721 export SHELL=/bin/bash
6700 00:41:49.729195 / # . /lava-14368351/environment
6701 00:41:49.735404 . /lava-14368351/environment
6703 00:41:49.842385 / # /lava-14368351/bin/lava-test-runner /lava-14368351/0
6704 00:41:49.842999 Test shell timeout: 10s (minimum of the action and connection timeout)
6705 00:41:49.848740 /lava-14368351/bin/lava-test-runner /lava-14368351/0
6706 00:41:50.106269 + export TESTRUN_ID=0_timesync-off
6707 00:41:50.109443 + TESTRUN_ID=0_timesync-off
6708 00:41:50.112924 + cd /lava-14368351/0/tests/0_timesync-off
6709 00:41:50.115975 ++ cat uuid
6710 00:41:50.121612 + UUID=14368351_1.6.2.3.1
6711 00:41:50.122099 + set +x
6712 00:41:50.128335 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14368351_1.6.2.3.1>
6713 00:41:50.129058 Received signal: <STARTRUN> 0_timesync-off 14368351_1.6.2.3.1
6714 00:41:50.129430 Starting test lava.0_timesync-off (14368351_1.6.2.3.1)
6715 00:41:50.129854 Skipping test definition patterns.
6716 00:41:50.131350 + systemctl stop systemd-timesyncd
6717 00:41:50.191393 + set +x
6718 00:41:50.194068 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14368351_1.6.2.3.1>
6719 00:41:50.194719 Received signal: <ENDRUN> 0_timesync-off 14368351_1.6.2.3.1
6720 00:41:50.195118 Ending use of test pattern.
6721 00:41:50.195450 Ending test lava.0_timesync-off (14368351_1.6.2.3.1), duration 0.07
6723 00:41:50.269349 + export TESTRUN_ID=1_kselftest-arm64
6724 00:41:50.269448 + TESTRUN_ID=1_kselftest-arm64
6725 00:41:50.276508 + cd /lava-14368351/0/tests/1_kselftest-arm64
6726 00:41:50.276582 ++ cat uuid
6727 00:41:50.279491 + UUID=14368351_1.6.2.3.5
6728 00:41:50.279563 + set +x
6729 00:41:50.282689 Received signal: <STARTRUN> 1_kselftest-arm64 14368351_1.6.2.3.5
6730 00:41:50.282759 Starting test lava.1_kselftest-arm64 (14368351_1.6.2.3.5)
6731 00:41:50.282833 Skipping test definition patterns.
6732 00:41:50.286183 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64 14368351_1.6.2.3.5>
6733 00:41:50.286254 + cd ./automated/linux/kselftest/
6734 00:41:50.315359 + ./kselftest.sh -c arm64 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6735 00:41:50.351857 INFO: install_deps skipped
6736 00:41:50.865183 --2024-06-16 00:41:50-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6737 00:41:50.871419 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6738 00:41:50.992534 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6739 00:41:51.116946 HTTP request sent, awaiting response... 200 OK
6740 00:41:51.120319 Length: 1647580 (1.6M) [application/octet-stream]
6741 00:41:51.124119 Saving to: 'kselftest_armhf.tar.gz'
6742 00:41:51.124529
6743 00:41:51.124840
6744 00:41:51.367360 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6745 00:41:51.616949 kselftest_armhf.tar 2%[ ] 47.81K 192KB/s
6746 00:41:51.926386 kselftest_armhf.tar 13%[=> ] 214.67K 430KB/s
6747 00:41:52.051312 kselftest_armhf.tar 52%[=========> ] 851.00K 1.03MB/s
6748 00:41:52.057760 kselftest_armhf.tar 100%[===================>] 1.57M 1.68MB/s in 0.9s
6749 00:41:52.057839
6750 00:41:52.202231 2024-06-16 00:41:51 (1.68 MB/s) - 'kselftest_armhf.tar.gz' saved [1647580/1647580]
6751 00:41:52.202366
6752 00:41:56.831292 skiplist:
6753 00:41:56.834595 ========================================
6754 00:41:56.837872 ========================================
6755 00:41:56.885449 arm64:tags_test
6756 00:41:56.889091 arm64:run_tags_test.sh
6757 00:41:56.889512 arm64:fake_sigreturn_bad_magic
6758 00:41:56.891998 arm64:fake_sigreturn_bad_size
6759 00:41:56.895308 arm64:fake_sigreturn_bad_size_for_magic0
6760 00:41:56.898434 arm64:fake_sigreturn_duplicated_fpsimd
6761 00:41:56.902059 arm64:fake_sigreturn_misaligned_sp
6762 00:41:56.905305 arm64:fake_sigreturn_missing_fpsimd
6763 00:41:56.908380 arm64:fake_sigreturn_sme_change_vl
6764 00:41:56.912264 arm64:fake_sigreturn_sve_change_vl
6765 00:41:56.915098 arm64:mangle_pstate_invalid_compat_toggle
6766 00:41:56.918332 arm64:mangle_pstate_invalid_daif_bits
6767 00:41:56.921548 arm64:mangle_pstate_invalid_mode_el1h
6768 00:41:56.924883 arm64:mangle_pstate_invalid_mode_el1t
6769 00:41:56.928277 arm64:mangle_pstate_invalid_mode_el2h
6770 00:41:56.931934 arm64:mangle_pstate_invalid_mode_el2t
6771 00:41:56.935077 arm64:mangle_pstate_invalid_mode_el3h
6772 00:41:56.941717 arm64:mangle_pstate_invalid_mode_el3t
6773 00:41:56.942294 arm64:sme_trap_no_sm
6774 00:41:56.944959 arm64:sme_trap_non_streaming
6775 00:41:56.945374 arm64:sme_trap_za
6776 00:41:56.948547 arm64:sme_vl
6777 00:41:56.948966 arm64:ssve_regs
6778 00:41:56.951350 arm64:sve_regs
6779 00:41:56.951780 arm64:sve_vl
6780 00:41:56.952086 arm64:za_no_regs
6781 00:41:56.954775 arm64:za_regs
6782 00:41:56.955318 arm64:pac
6783 00:41:56.958655 arm64:fp-stress
6784 00:41:56.959072 arm64:sve-ptrace
6785 00:41:56.961604 arm64:sve-probe-vls
6786 00:41:56.962106 arm64:vec-syscfg
6787 00:41:56.962457 arm64:za-fork
6788 00:41:56.965247 arm64:za-ptrace
6789 00:41:56.968341 arm64:check_buffer_fill
6790 00:41:56.968756 arm64:check_child_memory
6791 00:41:56.971746 arm64:check_gcr_el1_cswitch
6792 00:41:56.975014 arm64:check_ksm_options
6793 00:41:56.975434 arm64:check_mmap_options
6794 00:41:56.978178 arm64:check_prctl
6795 00:41:56.981607 arm64:check_tags_inclusion
6796 00:41:56.982061 arm64:check_user_mem
6797 00:41:56.982384 arm64:btitest
6798 00:41:56.984686 arm64:nobtitest
6799 00:41:56.985085 arm64:hwcap
6800 00:41:56.988145 arm64:ptrace
6801 00:41:56.988567 arm64:syscall-abi
6802 00:41:56.991610 arm64:tpidr2
6803 00:41:56.994973 ============== Tests to run ===============
6804 00:41:56.995379 arm64:tags_test
6805 00:41:56.998263 arm64:run_tags_test.sh
6806 00:41:57.001443 arm64:fake_sigreturn_bad_magic
6807 00:41:57.001834 arm64:fake_sigreturn_bad_size
6808 00:41:57.007928 arm64:fake_sigreturn_bad_size_for_magic0
6809 00:41:57.011207 arm64:fake_sigreturn_duplicated_fpsimd
6810 00:41:57.014176 arm64:fake_sigreturn_misaligned_sp
6811 00:41:57.017661 arm64:fake_sigreturn_missing_fpsimd
6812 00:41:57.018209 arm64:fake_sigreturn_sme_change_vl
6813 00:41:57.021071 arm64:fake_sigreturn_sve_change_vl
6814 00:41:57.027643 arm64:mangle_pstate_invalid_compat_toggle
6815 00:41:57.031118 arm64:mangle_pstate_invalid_daif_bits
6816 00:41:57.034223 arm64:mangle_pstate_invalid_mode_el1h
6817 00:41:57.037453 arm64:mangle_pstate_invalid_mode_el1t
6818 00:41:57.041696 arm64:mangle_pstate_invalid_mode_el2h
6819 00:41:57.043979 arm64:mangle_pstate_invalid_mode_el2t
6820 00:41:57.047760 arm64:mangle_pstate_invalid_mode_el3h
6821 00:41:57.051072 arm64:mangle_pstate_invalid_mode_el3t
6822 00:41:57.051516 arm64:sme_trap_no_sm
6823 00:41:57.054076 arm64:sme_trap_non_streaming
6824 00:41:57.057159 arm64:sme_trap_za
6825 00:41:57.057799 arm64:sme_vl
6826 00:41:57.058282 arm64:ssve_regs
6827 00:41:57.060646 arm64:sve_regs
6828 00:41:57.061046 arm64:sve_vl
6829 00:41:57.064057 arm64:za_no_regs
6830 00:41:57.064630 arm64:za_regs
6831 00:41:57.064965 arm64:pac
6832 00:41:57.067436 arm64:fp-stress
6833 00:41:57.067829 arm64:sve-ptrace
6834 00:41:57.070510 arm64:sve-probe-vls
6835 00:41:57.070905 arm64:vec-syscfg
6836 00:41:57.074037 arm64:za-fork
6837 00:41:57.074541 arm64:za-ptrace
6838 00:41:57.077235 arm64:check_buffer_fill
6839 00:41:57.077626 arm64:check_child_memory
6840 00:41:57.080498 arm64:check_gcr_el1_cswitch
6841 00:41:57.084121 arm64:check_ksm_options
6842 00:41:57.087659 arm64:check_mmap_options
6843 00:41:57.088051 arm64:check_prctl
6844 00:41:57.090351 arm64:check_tags_inclusion
6845 00:41:57.090741 arm64:check_user_mem
6846 00:41:57.094045 arm64:btitest
6847 00:41:57.094442 arm64:nobtitest
6848 00:41:57.097272 arm64:hwcap
6849 00:41:57.097667 arm64:ptrace
6850 00:41:57.097976 arm64:syscall-abi
6851 00:41:57.100689 arm64:tpidr2
6852 00:41:57.103818 ===========End Tests to run ===============
6853 00:41:57.106890 shardfile-arm64 pass
6854 00:41:57.379467 <12>[ 24.741319] kselftest: Running tests in arm64
6855 00:41:57.390635 TAP version 13
6856 00:41:57.404527 1..48
6857 00:41:57.421410 # selftests: arm64: tags_test
6858 00:41:57.899805 ok 1 selftests: arm64: tags_test
6859 00:41:57.917806 # selftests: arm64: run_tags_test.sh
6860 00:41:57.988675 # --------------------
6861 00:41:57.991970 # running tags test
6862 00:41:57.992390 # --------------------
6863 00:41:57.995648 # [PASS]
6864 00:41:57.998503 ok 2 selftests: arm64: run_tags_test.sh
6865 00:41:58.014637 # selftests: arm64: fake_sigreturn_bad_magic
6866 00:41:58.088356 # Registered handlers for all signals.
6867 00:41:58.089023 # Detected MINSTKSIGSZ:4720
6868 00:41:58.091525 # Testcase initialized.
6869 00:41:58.094440 # uc context validated.
6870 00:41:58.097867 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6871 00:41:58.101146 # Handled SIG_COPYCTX
6872 00:41:58.101565 # Available space:3568
6873 00:41:58.107832 # Using badly built context - ERR: BAD MAGIC !
6874 00:41:58.114667 # SIG_OK -- SP:0xFFFFDCF7C820 si_addr@:0xffffdcf7c820 si_code:2 token@:0xffffdcf7b5c0 offset:-4704
6875 00:41:58.117491 # ==>> completed. PASS(1)
6876 00:41:58.124237 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
6877 00:41:58.130759 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDCF7B5C0
6878 00:41:58.138384 ok 3 selftests: arm64: fake_sigreturn_bad_magic
6879 00:41:58.141423 # selftests: arm64: fake_sigreturn_bad_size
6880 00:41:58.192462 # Registered handlers for all signals.
6881 00:41:58.192996 # Detected MINSTKSIGSZ:4720
6882 00:41:58.196447 # Testcase initialized.
6883 00:41:58.199120 # uc context validated.
6884 00:41:58.202998 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6885 00:41:58.205661 # Handled SIG_COPYCTX
6886 00:41:58.206193 # Available space:3568
6887 00:41:58.209685 # uc context validated.
6888 00:41:58.215391 # Using badly built context - ERR: Bad size for esr_context
6889 00:41:58.222242 # SIG_OK -- SP:0xFFFFCBBDFB30 si_addr@:0xffffcbbdfb30 si_code:2 token@:0xffffcbbde8d0 offset:-4704
6890 00:41:58.225517 # ==>> completed. PASS(1)
6891 00:41:58.232364 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
6892 00:41:58.238877 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCBBDE8D0
6893 00:41:58.242314 ok 4 selftests: arm64: fake_sigreturn_bad_size
6894 00:41:58.249156 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
6895 00:41:58.301070 # Registered handlers for all signals.
6896 00:41:58.301496 # Detected MINSTKSIGSZ:4720
6897 00:41:58.304716 # Testcase initialized.
6898 00:41:58.307985 # uc context validated.
6899 00:41:58.311231 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6900 00:41:58.314232 # Handled SIG_COPYCTX
6901 00:41:58.314639 # Available space:3568
6902 00:41:58.320762 # Using badly built context - ERR: Bad size for terminator
6903 00:41:58.330843 # SIG_OK -- SP:0xFFFFDFB8E630 si_addr@:0xffffdfb8e630 si_code:2 token@:0xffffdfb8d3d0 offset:-4704
6904 00:41:58.331313 # ==>> completed. PASS(1)
6905 00:41:58.341056 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
6906 00:41:58.347434 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDFB8D3D0
6907 00:41:58.350929 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
6908 00:41:58.357844 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
6909 00:41:58.424794 # Registered handlers for all signals.
6910 00:41:58.425253 # Detected MINSTKSIGSZ:4720
6911 00:41:58.428225 # Testcase initialized.
6912 00:41:58.432040 # uc context validated.
6913 00:41:58.434949 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6914 00:41:58.438264 # Handled SIG_COPYCTX
6915 00:41:58.438664 # Available space:3568
6916 00:41:58.445156 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
6917 00:41:58.454642 # SIG_OK -- SP:0xFFFFE026BBF0 si_addr@:0xffffe026bbf0 si_code:2 token@:0xffffe026a990 offset:-4704
6918 00:41:58.455047 # ==>> completed. PASS(1)
6919 00:41:58.464414 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
6920 00:41:58.471959 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE026A990
6921 00:41:58.474836 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
6922 00:41:58.480813 # selftests: arm64: fake_sigreturn_misaligned_sp
6923 00:41:58.513791 # Registered handlers for all signals.
6924 00:41:58.514293 # Detected MINSTKSIGSZ:4720
6925 00:41:58.517712 # Testcase initialized.
6926 00:41:58.520546 # uc context validated.
6927 00:41:58.524149 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6928 00:41:58.527166 # Handled SIG_COPYCTX
6929 00:41:58.533723 # SIG_OK -- SP:0xFFFFC7521713 si_addr@:0xffffc7521713 si_code:2 token@:0xffffc7521713 offset:0
6930 00:41:58.537179 # ==>> completed. PASS(1)
6931 00:41:58.543468 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
6932 00:41:58.550594 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC7521713
6933 00:41:58.557137 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
6934 00:41:58.560288 # selftests: arm64: fake_sigreturn_missing_fpsimd
6935 00:41:58.623992 # Registered handlers for all signals.
6936 00:41:58.624485 # Detected MINSTKSIGSZ:4720
6937 00:41:58.627423 # Testcase initialized.
6938 00:41:58.630993 # uc context validated.
6939 00:41:58.633658 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6940 00:41:58.637435 # Handled SIG_COPYCTX
6941 00:41:58.640449 # Mangling template header. Spare space:4096
6942 00:41:58.644094 # Using badly built context - ERR: Missing FPSIMD
6943 00:41:58.654155 # SIG_OK -- SP:0xFFFFFF5862A0 si_addr@:0xffffff5862a0 si_code:2 token@:0xffffff585040 offset:-4704
6944 00:41:58.657164 # ==>> completed. PASS(1)
6945 00:41:58.663708 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
6946 00:41:58.670470 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFF585040
6947 00:41:58.673602 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
6948 00:41:58.680463 # selftests: arm64: fake_sigreturn_sme_change_vl
6949 00:41:58.722099 # Registered handlers for all signals.
6950 00:41:58.722588 # Detected MINSTKSIGSZ:4720
6951 00:41:58.725517 # ==>> completed. SKIP.
6952 00:41:58.732289 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
6953 00:41:58.735723 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl # SKIP
6954 00:41:58.743347 # selftests: arm64: fake_sigreturn_sve_change_vl
6955 00:41:58.810056 # Registered handlers for all signals.
6956 00:41:58.810558 # Detected MINSTKSIGSZ:4720
6957 00:41:58.813882 # ==>> completed. SKIP.
6958 00:41:58.817626 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
6959 00:41:58.823121 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl # SKIP
6960 00:41:58.835148 # selftests: arm64: mangle_pstate_invalid_compat_toggle
6961 00:41:58.920033 # Registered handlers for all signals.
6962 00:41:58.920556 # Detected MINSTKSIGSZ:4720
6963 00:41:58.922972 # Testcase initialized.
6964 00:41:58.926199 # uc context validated.
6965 00:41:58.926680 # Handled SIG_TRIG
6966 00:41:58.936401 # SIG_OK -- SP:0xFFFFE2CC6220 si_addr@:0xffffe2cc6220 si_code:2 token@:(nil) offset:-281474486788640
6967 00:41:58.939669 # ==>> completed. PASS(1)
6968 00:41:58.946655 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
6969 00:41:58.952957 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
6970 00:41:58.957787 # selftests: arm64: mangle_pstate_invalid_daif_bits
6971 00:41:59.025430 # Registered handlers for all signals.
6972 00:41:59.025889 # Detected MINSTKSIGSZ:4720
6973 00:41:59.028661 # Testcase initialized.
6974 00:41:59.031799 # uc context validated.
6975 00:41:59.032191 # Handled SIG_TRIG
6976 00:41:59.042022 # SIG_OK -- SP:0xFFFFDD994A70 si_addr@:0xffffdd994a70 si_code:2 token@:(nil) offset:-281474399554160
6977 00:41:59.045749 # ==>> completed. PASS(1)
6978 00:41:59.051818 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
6979 00:41:59.054916 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
6980 00:41:59.061854 # selftests: arm64: mangle_pstate_invalid_mode_el1h
6981 00:41:59.113646 # Registered handlers for all signals.
6982 00:41:59.114135 # Detected MINSTKSIGSZ:4720
6983 00:41:59.117019 # Testcase initialized.
6984 00:41:59.120630 # uc context validated.
6985 00:41:59.121026 # Handled SIG_TRIG
6986 00:41:59.130101 # SIG_OK -- SP:0xFFFFCCCB2F90 si_addr@:0xffffcccb2f90 si_code:2 token@:(nil) offset:-281474117611408
6987 00:41:59.133649 # ==>> completed. PASS(1)
6988 00:41:59.140277 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
6989 00:41:59.143379 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
6990 00:41:59.149842 # selftests: arm64: mangle_pstate_invalid_mode_el1t
6991 00:41:59.221165 # Registered handlers for all signals.
6992 00:41:59.221573 # Detected MINSTKSIGSZ:4720
6993 00:41:59.223668 # Testcase initialized.
6994 00:41:59.227063 # uc context validated.
6995 00:41:59.227456 # Handled SIG_TRIG
6996 00:41:59.236754 # SIG_OK -- SP:0xFFFFC79D22E0 si_addr@:0xffffc79d22e0 si_code:2 token@:(nil) offset:-281474030707424
6997 00:41:59.240732 # ==>> completed. PASS(1)
6998 00:41:59.247014 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
6999 00:41:59.249895 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
7000 00:41:59.256509 # selftests: arm64: mangle_pstate_invalid_mode_el2h
7001 00:41:59.320756 # Registered handlers for all signals.
7002 00:41:59.321175 # Detected MINSTKSIGSZ:4720
7003 00:41:59.323957 # Testcase initialized.
7004 00:41:59.326801 # uc context validated.
7005 00:41:59.327200 # Handled SIG_TRIG
7006 00:41:59.336538 # SIG_OK -- SP:0xFFFFD3E22E90 si_addr@:0xffffd3e22e90 si_code:2 token@:(nil) offset:-281474236558992
7007 00:41:59.339976 # ==>> completed. PASS(1)
7008 00:41:59.346495 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
7009 00:41:59.350055 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
7010 00:41:59.356370 # selftests: arm64: mangle_pstate_invalid_mode_el2t
7011 00:41:59.421317 # Registered handlers for all signals.
7012 00:41:59.421730 # Detected MINSTKSIGSZ:4720
7013 00:41:59.424414 # Testcase initialized.
7014 00:41:59.427757 # uc context validated.
7015 00:41:59.428151 # Handled SIG_TRIG
7016 00:41:59.437542 # SIG_OK -- SP:0xFFFFECA39DF0 si_addr@:0xffffeca39df0 si_code:2 token@:(nil) offset:-281474651889136
7017 00:41:59.441312 # ==>> completed. PASS(1)
7018 00:41:59.447818 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
7019 00:41:59.450952 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
7020 00:41:59.457120 # selftests: arm64: mangle_pstate_invalid_mode_el3h
7021 00:41:59.512536 # Registered handlers for all signals.
7022 00:41:59.512941 # Detected MINSTKSIGSZ:4720
7023 00:41:59.515801 # Testcase initialized.
7024 00:41:59.519082 # uc context validated.
7025 00:41:59.519499 # Handled SIG_TRIG
7026 00:41:59.529060 # SIG_OK -- SP:0xFFFFD94A3710 si_addr@:0xffffd94a3710 si_code:2 token@:(nil) offset:-281474327262992
7027 00:41:59.532429 # ==>> completed. PASS(1)
7028 00:41:59.538999 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
7029 00:41:59.542211 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
7030 00:41:59.549497 # selftests: arm64: mangle_pstate_invalid_mode_el3t
7031 00:41:59.611334 # Registered handlers for all signals.
7032 00:41:59.611740 # Detected MINSTKSIGSZ:4720
7033 00:41:59.614427 # Testcase initialized.
7034 00:41:59.617905 # uc context validated.
7035 00:41:59.618325 # Handled SIG_TRIG
7036 00:41:59.627312 # SIG_OK -- SP:0xFFFFD8FB6D40 si_addr@:0xffffd8fb6d40 si_code:2 token@:(nil) offset:-281474322099520
7037 00:41:59.630656 # ==>> completed. PASS(1)
7038 00:41:59.637274 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
7039 00:41:59.640538 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
7040 00:41:59.644523 # selftests: arm64: sme_trap_no_sm
7041 00:41:59.720500 # Registered handlers for all signals.
7042 00:41:59.721004 # Detected MINSTKSIGSZ:4720
7043 00:41:59.723823 # ==>> completed. SKIP.
7044 00:41:59.733872 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
7045 00:41:59.737305 ok 19 selftests: arm64: sme_trap_no_sm # SKIP
7046 00:41:59.743821 # selftests: arm64: sme_trap_non_streaming
7047 00:41:59.826379 # Registered handlers for all signals.
7048 00:41:59.826861 # Detected MINSTKSIGSZ:4720
7049 00:41:59.828873 # ==>> completed. SKIP.
7050 00:41:59.839190 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
7051 00:41:59.846047 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
7052 00:41:59.848767 # selftests: arm64: sme_trap_za
7053 00:41:59.923077 # Registered handlers for all signals.
7054 00:41:59.923617 # Detected MINSTKSIGSZ:4720
7055 00:41:59.926756 # Testcase initialized.
7056 00:41:59.936689 # SIG_OK -- SP:0xFFFFFFD23670 si_addr@:0xaaaab4d72510 si_code:1 token@:(nil) offset:-187650155160848
7057 00:41:59.937193 # ==>> completed. PASS(1)
7058 00:41:59.946336 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
7059 00:41:59.949280 ok 21 selftests: arm64: sme_trap_za
7060 00:41:59.949798 # selftests: arm64: sme_vl
7061 00:42:00.007735 # Registered handlers for all signals.
7062 00:42:00.008194 # Detected MINSTKSIGSZ:4720
7063 00:42:00.010979 # ==>> completed. SKIP.
7064 00:42:00.017825 # # SME VL :: Check that we get the right SME VL reported
7065 00:42:00.020714 ok 22 selftests: arm64: sme_vl # SKIP
7066 00:42:00.026709 # selftests: arm64: ssve_regs
7067 00:42:00.101761 # Registered handlers for all signals.
7068 00:42:00.102280 # Detected MINSTKSIGSZ:4720
7069 00:42:00.104983 # ==>> completed. SKIP.
7070 00:42:00.111600 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
7071 00:42:00.114576 ok 23 selftests: arm64: ssve_regs # SKIP
7072 00:42:00.121464 # selftests: arm64: sve_regs
7073 00:42:00.194366 # Registered handlers for all signals.
7074 00:42:00.194847 # Detected MINSTKSIGSZ:4720
7075 00:42:00.197672 # ==>> completed. SKIP.
7076 00:42:00.204503 # # SVE registers :: Check that we get the right SVE registers reported
7077 00:42:00.207406 ok 24 selftests: arm64: sve_regs # SKIP
7078 00:42:00.215907 # selftests: arm64: sve_vl
7079 00:42:00.293286 # Registered handlers for all signals.
7080 00:42:00.293776 # Detected MINSTKSIGSZ:4720
7081 00:42:00.296095 # ==>> completed. SKIP.
7082 00:42:00.302808 # # SVE VL :: Check that we get the right SVE VL reported
7083 00:42:00.305596 ok 25 selftests: arm64: sve_vl # SKIP
7084 00:42:00.313507 # selftests: arm64: za_no_regs
7085 00:42:00.394763 # Registered handlers for all signals.
7086 00:42:00.395296 # Detected MINSTKSIGSZ:4720
7087 00:42:00.398607 # ==>> completed. SKIP.
7088 00:42:00.404510 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
7089 00:42:00.407990 ok 26 selftests: arm64: za_no_regs # SKIP
7090 00:42:00.417663 # selftests: arm64: za_regs
7091 00:42:00.497322 # Registered handlers for all signals.
7092 00:42:00.497823 # Detected MINSTKSIGSZ:4720
7093 00:42:00.500548 # ==>> completed. SKIP.
7094 00:42:00.507268 # # ZA register :: Check that we get the right ZA registers reported
7095 00:42:00.510899 ok 27 selftests: arm64: za_regs # SKIP
7096 00:42:00.516273 # selftests: arm64: pac
7097 00:42:00.575711 # TAP version 13
7098 00:42:00.576126 # 1..7
7099 00:42:00.579301 # # Starting 7 tests from 1 test cases.
7100 00:42:00.582441 # # RUN global.corrupt_pac ...
7101 00:42:00.585621 # # SKIP PAUTH not enabled
7102 00:42:00.589255 # # OK global.corrupt_pac
7103 00:42:00.592152 # ok 1 # SKIP PAUTH not enabled
7104 00:42:00.599127 # # RUN global.pac_instructions_not_nop ...
7105 00:42:00.602109 # # SKIP PAUTH not enabled
7106 00:42:00.605288 # # OK global.pac_instructions_not_nop
7107 00:42:00.608690 # ok 2 # SKIP PAUTH not enabled
7108 00:42:00.615656 # # RUN global.pac_instructions_not_nop_generic ...
7109 00:42:00.619362 # # SKIP Generic PAUTH not enabled
7110 00:42:00.622352 # # OK global.pac_instructions_not_nop_generic
7111 00:42:00.625783 # ok 3 # SKIP Generic PAUTH not enabled
7112 00:42:00.632085 # # RUN global.single_thread_different_keys ...
7113 00:42:00.636190 # # SKIP PAUTH not enabled
7114 00:42:00.638915 # # OK global.single_thread_different_keys
7115 00:42:00.641954 # ok 4 # SKIP PAUTH not enabled
7116 00:42:00.648491 # # RUN global.exec_changed_keys ...
7117 00:42:00.652079 # # SKIP PAUTH not enabled
7118 00:42:00.656049 # # OK global.exec_changed_keys
7119 00:42:00.658862 # ok 5 # SKIP PAUTH not enabled
7120 00:42:00.662401 # # RUN global.context_switch_keep_keys ...
7121 00:42:00.665136 # # SKIP PAUTH not enabled
7122 00:42:00.672102 # # OK global.context_switch_keep_keys
7123 00:42:00.672524 # ok 6 # SKIP PAUTH not enabled
7124 00:42:00.678420 # # RUN global.context_switch_keep_keys_generic ...
7125 00:42:00.682048 # # SKIP Generic PAUTH not enabled
7126 00:42:00.688583 # # OK global.context_switch_keep_keys_generic
7127 00:42:00.691900 # ok 7 # SKIP Generic PAUTH not enabled
7128 00:42:00.695168 # # PASSED: 7 / 7 tests passed.
7129 00:42:00.698323 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:7 error:0
7130 00:42:00.701711 ok 28 selftests: arm64: pac
7131 00:42:00.705232 # selftests: arm64: fp-stress
7132 00:42:08.584981 <6>[ 35.949937] vaux18: disabling
7133 00:42:08.588249 <6>[ 35.953306] vio28: disabling
7134 00:42:10.654654 # TAP version 13
7135 00:42:10.654839 # 1..16
7136 00:42:10.656984 # # 8 CPUs, 0 SVE VLs, 0 SME VLs
7137 00:42:10.660191 # # Will run for 10s
7138 00:42:10.660337 # # Started FPSIMD-0-0
7139 00:42:10.663801 # # Started FPSIMD-0-1
7140 00:42:10.667170 # # Started FPSIMD-1-0
7141 00:42:10.667282 # # Started FPSIMD-1-1
7142 00:42:10.670435 # # Started FPSIMD-2-0
7143 00:42:10.674116 # # Started FPSIMD-2-1
7144 00:42:10.674227 # # Started FPSIMD-3-0
7145 00:42:10.677413 # # Started FPSIMD-3-1
7146 00:42:10.677518 # # Started FPSIMD-4-0
7147 00:42:10.680609 # # Started FPSIMD-4-1
7148 00:42:10.683562 # # Started FPSIMD-5-0
7149 00:42:10.683663 # # Started FPSIMD-5-1
7150 00:42:10.686866 # # Started FPSIMD-6-0
7151 00:42:10.690216 # # Started FPSIMD-6-1
7152 00:42:10.690295 # # Started FPSIMD-7-0
7153 00:42:10.694066 # # Started FPSIMD-7-1
7154 00:42:10.696758 # # FPSIMD-0-0: Vector length: 128 bits
7155 00:42:10.700328 # # FPSIMD-0-0: PID: 1188
7156 00:42:10.703740 # # FPSIMD-0-1: Vector length: 128 bits
7157 00:42:10.703852 # # FPSIMD-0-1: PID: 1189
7158 00:42:10.707159 # # FPSIMD-1-0: Vector length: 128 bits
7159 00:42:10.710041 # # FPSIMD-1-0: PID: 1190
7160 00:42:10.713053 # # FPSIMD-2-0: Vector length: 128 bits
7161 00:42:10.716571 # # FPSIMD-2-0: PID: 1192
7162 00:42:10.719790 # # FPSIMD-1-1: Vector length: 128 bits
7163 00:42:10.723337 # # FPSIMD-1-1: PID: 1191
7164 00:42:10.726532 # # FPSIMD-3-0: Vector length: 128 bits
7165 00:42:10.730203 # # FPSIMD-3-0: PID: 1194
7166 00:42:10.733030 # # FPSIMD-4-0: Vector length: 128 bits
7167 00:42:10.733106 # # FPSIMD-4-0: PID: 1196
7168 00:42:10.736534 # # FPSIMD-7-0: Vector length: 128 bits
7169 00:42:10.739745 # # FPSIMD-7-0: PID: 1202
7170 00:42:10.743234 # # FPSIMD-6-1: Vector length: 128 bits
7171 00:42:10.746591 # # FPSIMD-6-1: PID: 1201
7172 00:42:10.749776 # # FPSIMD-3-1: Vector length: 128 bits
7173 00:42:10.753529 # # FPSIMD-3-1: PID: 1195
7174 00:42:10.756501 # # FPSIMD-7-1: Vector length: 128 bits
7175 00:42:10.756569 # # FPSIMD-7-1: PID: 1203
7176 00:42:10.763673 # # FPSIMD-4-1: Vector length: 128 bits
7177 00:42:10.763765 # # FPSIMD-4-1: PID: 1197
7178 00:42:10.766538 # # FPSIMD-5-0: Vector length: 128 bits
7179 00:42:10.769908 # # FPSIMD-5-0: PID: 1198
7180 00:42:10.772774 # # FPSIMD-5-1: Vector length: 128 bits
7181 00:42:10.776924 # # FPSIMD-5-1: PID: 1199
7182 00:42:10.779745 # # FPSIMD-6-0: Vector length: 128 bits
7183 00:42:10.782860 # # FPSIMD-6-0: PID: 1200
7184 00:42:10.786442 # # FPSIMD-2-1: Vector length: 128 bits
7185 00:42:10.786509 # # FPSIMD-2-1: PID: 1193
7186 00:42:10.789559 # # Finishing up...
7187 00:42:10.796370 # # FPSIMD-2-0: Terminated by signal 15, no error, iterations=842484, signals=10
7188 00:42:10.803217 # # FPSIMD-3-0: Terminated by signal 15, no error, iterations=690068, signals=10
7189 00:42:10.809694 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=746388, signals=10
7190 00:42:10.819536 # # FPSIMD-1-0: Terminated by signal 15, no error, iterations=845372, signals=10
7191 00:42:10.825782 # # FPSIMD-2-1: Terminated by signal 15, no error, iterations=822229, signals=10
7192 00:42:10.832742 # # FPSIMD-5-1: Terminated by signal 15, no error, iterations=866960, signals=10
7193 00:42:10.839037 # # FPSIMD-6-0: Terminated by signal 15, no error, iterations=774347, signals=10
7194 00:42:10.842547 # ok 1 FPSIMD-0-0
7195 00:42:10.842618 # ok 2 FPSIMD-0-1
7196 00:42:10.845864 # ok 3 FPSIMD-1-0
7197 00:42:10.845953 # ok 4 FPSIMD-1-1
7198 00:42:10.849144 # ok 5 FPSIMD-2-0
7199 00:42:10.849212 # ok 6 FPSIMD-2-1
7200 00:42:10.852600 # ok 7 FPSIMD-3-0
7201 00:42:10.852691 # ok 8 FPSIMD-3-1
7202 00:42:10.855734 # ok 9 FPSIMD-4-0
7203 00:42:10.855799 # ok 10 FPSIMD-4-1
7204 00:42:10.859396 # ok 11 FPSIMD-5-0
7205 00:42:10.859463 # ok 12 FPSIMD-5-1
7206 00:42:10.862179 # ok 13 FPSIMD-6-0
7207 00:42:10.862243 # ok 14 FPSIMD-6-1
7208 00:42:10.865814 # ok 15 FPSIMD-7-0
7209 00:42:10.865917 # ok 16 FPSIMD-7-1
7210 00:42:10.872833 # # FPSIMD-7-0: Terminated by signal 15, no error, iterations=786314, signals=9
7211 00:42:10.882502 # # FPSIMD-1-1: Terminated by signal 15, no error, iterations=783620, signals=10
7212 00:42:10.888836 # # FPSIMD-3-1: Terminated by signal 15, no error, iterations=920148, signals=10
7213 00:42:10.895675 # # FPSIMD-7-1: Terminated by signal 15, no error, iterations=783255, signals=10
7214 00:42:10.902297 # # FPSIMD-4-1: Terminated by signal 15, no error, iterations=716306, signals=10
7215 00:42:10.908496 # # FPSIMD-4-0: Terminated by signal 15, no error, iterations=685826, signals=10
7216 00:42:10.915883 # # FPSIMD-0-1: Terminated by signal 15, no error, iterations=833599, signals=9
7217 00:42:10.922372 # # FPSIMD-6-1: Terminated by signal 15, no error, iterations=723903, signals=10
7218 00:42:10.932645 # # FPSIMD-5-0: Terminated by signal 15, no error, iterations=837972, signals=10
7219 00:42:10.935653 # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:0 error:0
7220 00:42:10.938934 ok 29 selftests: arm64: fp-stress
7221 00:42:10.942419 # selftests: arm64: sve-ptrace
7222 00:42:10.942514 # TAP version 13
7223 00:42:10.945326 # 1..4104
7224 00:42:10.948643 # ok 2 # SKIP SVE not available
7225 00:42:10.952371 # # Planned tests != run tests (4104 != 1)
7226 00:42:10.955396 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7227 00:42:10.958409 ok 30 selftests: arm64: sve-ptrace # SKIP
7228 00:42:10.962152 # selftests: arm64: sve-probe-vls
7229 00:42:10.965284 # TAP version 13
7230 00:42:10.965368 # 1..2
7231 00:42:10.969019 # ok 2 # SKIP SVE not available
7232 00:42:10.972115 # # Planned tests != run tests (2 != 1)
7233 00:42:10.975739 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7234 00:42:10.982264 ok 31 selftests: arm64: sve-probe-vls # SKIP
7235 00:42:10.982372 # selftests: arm64: vec-syscfg
7236 00:42:10.985649 # TAP version 13
7237 00:42:10.985730 # 1..20
7238 00:42:10.988952 # ok 1 # SKIP SVE not supported
7239 00:42:10.991988 # ok 2 # SKIP SVE not supported
7240 00:42:10.995438 # ok 3 # SKIP SVE not supported
7241 00:42:10.999317 # ok 4 # SKIP SVE not supported
7242 00:42:11.001903 # ok 5 # SKIP SVE not supported
7243 00:42:11.002010 # ok 6 # SKIP SVE not supported
7244 00:42:11.005839 # ok 7 # SKIP SVE not supported
7245 00:42:11.008438 # ok 8 # SKIP SVE not supported
7246 00:42:11.011845 # ok 9 # SKIP SVE not supported
7247 00:42:11.015443 # ok 10 # SKIP SVE not supported
7248 00:42:11.018451 # ok 11 # SKIP SME not supported
7249 00:42:11.021776 # ok 12 # SKIP SME not supported
7250 00:42:11.025004 # ok 13 # SKIP SME not supported
7251 00:42:11.025085 # ok 14 # SKIP SME not supported
7252 00:42:11.028508 # ok 15 # SKIP SME not supported
7253 00:42:11.031650 # ok 16 # SKIP SME not supported
7254 00:42:11.034908 # ok 17 # SKIP SME not supported
7255 00:42:11.038497 # ok 18 # SKIP SME not supported
7256 00:42:11.041831 # ok 19 # SKIP SME not supported
7257 00:42:11.045020 # ok 20 # SKIP SME not supported
7258 00:42:11.048481 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:20 error:0
7259 00:42:11.051833 ok 32 selftests: arm64: vec-syscfg
7260 00:42:11.055069 # selftests: arm64: za-fork
7261 00:42:11.058249 # TAP version 13
7262 00:42:11.058351 # 1..1
7263 00:42:11.058437 # # PID: 1280
7264 00:42:11.061723 # # SME support not present
7265 00:42:11.061814 # ok 0 skipped
7266 00:42:11.068276 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7267 00:42:11.071292 ok 33 selftests: arm64: za-fork
7268 00:42:11.075048 # selftests: arm64: za-ptrace
7269 00:42:11.138221 # TAP version 13
7270 00:42:11.138349 # 1..1
7271 00:42:11.141169 # ok 2 # SKIP SME not available
7272 00:42:11.147512 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7273 00:42:11.151126 ok 34 selftests: arm64: za-ptrace # SKIP
7274 00:42:11.162826 # selftests: arm64: check_buffer_fill
7275 00:42:11.245345 # # SKIP: MTE features unavailable
7276 00:42:11.253800 ok 35 selftests: arm64: check_buffer_fill # SKIP
7277 00:42:11.271068 # selftests: arm64: check_child_memory
7278 00:42:11.339867 # # SKIP: MTE features unavailable
7279 00:42:11.347326 ok 36 selftests: arm64: check_child_memory # SKIP
7280 00:42:11.362992 # selftests: arm64: check_gcr_el1_cswitch
7281 00:42:11.441264 # # SKIP: MTE features unavailable
7282 00:42:11.450444 ok 37 selftests: arm64: check_gcr_el1_cswitch # SKIP
7283 00:42:11.466681 # selftests: arm64: check_ksm_options
7284 00:42:11.528048 # # SKIP: MTE features unavailable
7285 00:42:11.536332 ok 38 selftests: arm64: check_ksm_options # SKIP
7286 00:42:11.550189 # selftests: arm64: check_mmap_options
7287 00:42:11.602640 # # SKIP: MTE features unavailable
7288 00:42:11.609701 ok 39 selftests: arm64: check_mmap_options # SKIP
7289 00:42:11.621483 # selftests: arm64: check_prctl
7290 00:42:11.702882 # TAP version 13
7291 00:42:11.703007 # 1..5
7292 00:42:11.705727 # ok 1 check_basic_read
7293 00:42:11.705817 # ok 2 NONE
7294 00:42:11.708686 # ok 3 # SKIP SYNC
7295 00:42:11.708767 # ok 4 # SKIP ASYNC
7296 00:42:11.712002 # ok 5 # SKIP SYNC+ASYNC
7297 00:42:11.718746 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:3 error:0
7298 00:42:11.718975 ok 40 selftests: arm64: check_prctl
7299 00:42:11.732262 # selftests: arm64: check_tags_inclusion
7300 00:42:11.789663 # # SKIP: MTE features unavailable
7301 00:42:11.797298 ok 41 selftests: arm64: check_tags_inclusion # SKIP
7302 00:42:11.809581 # selftests: arm64: check_user_mem
7303 00:42:11.883498 # # SKIP: MTE features unavailable
7304 00:42:11.891659 ok 42 selftests: arm64: check_user_mem # SKIP
7305 00:42:11.904182 # selftests: arm64: btitest
7306 00:42:11.977013 # TAP version 13
7307 00:42:11.977134 # 1..18
7308 00:42:11.980631 # # HWCAP_PACA not present
7309 00:42:11.984149 # # HWCAP2_BTI not present
7310 00:42:11.984228 # # Test binary built for BTI
7311 00:42:11.990631 # ok 1 nohint_func/call_using_br_x0 # SKIP
7312 00:42:11.993996 # ok 1 nohint_func/call_using_br_x16 # SKIP
7313 00:42:11.996898 # ok 1 nohint_func/call_using_blr # SKIP
7314 00:42:12.000068 # ok 1 bti_none_func/call_using_br_x0 # SKIP
7315 00:42:12.003577 # ok 1 bti_none_func/call_using_br_x16 # SKIP
7316 00:42:12.010170 # ok 1 bti_none_func/call_using_blr # SKIP
7317 00:42:12.013712 # ok 1 bti_c_func/call_using_br_x0 # SKIP
7318 00:42:12.017071 # ok 1 bti_c_func/call_using_br_x16 # SKIP
7319 00:42:12.020038 # ok 1 bti_c_func/call_using_blr # SKIP
7320 00:42:12.023633 # ok 1 bti_j_func/call_using_br_x0 # SKIP
7321 00:42:12.026745 # ok 1 bti_j_func/call_using_br_x16 # SKIP
7322 00:42:12.029826 # ok 1 bti_j_func/call_using_blr # SKIP
7323 00:42:12.033326 # ok 1 bti_jc_func/call_using_br_x0 # SKIP
7324 00:42:12.039823 # ok 1 bti_jc_func/call_using_br_x16 # SKIP
7325 00:42:12.043264 # ok 1 bti_jc_func/call_using_blr # SKIP
7326 00:42:12.046467 # ok 1 paciasp_func/call_using_br_x0 # SKIP
7327 00:42:12.050267 # ok 1 paciasp_func/call_using_br_x16 # SKIP
7328 00:42:12.053194 # ok 1 paciasp_func/call_using_blr # SKIP
7329 00:42:12.060701 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0
7330 00:42:12.063321 # # WARNING - EXPECTED TEST COUNT WRONG
7331 00:42:12.066330 ok 43 selftests: arm64: btitest
7332 00:42:12.069757 # selftests: arm64: nobtitest
7333 00:42:12.069836 # TAP version 13
7334 00:42:12.069897 # 1..18
7335 00:42:12.072952 # # HWCAP_PACA not present
7336 00:42:12.076359 # # HWCAP2_BTI not present
7337 00:42:12.079820 # # Test binary not built for BTI
7338 00:42:12.083011 # ok 1 nohint_func/call_using_br_x0 # SKIP
7339 00:42:12.086255 # ok 1 nohint_func/call_using_br_x16 # SKIP
7340 00:42:12.089698 # ok 1 nohint_func/call_using_blr # SKIP
7341 00:42:12.093263 # ok 1 bti_none_func/call_using_br_x0 # SKIP
7342 00:42:12.099691 # ok 1 bti_none_func/call_using_br_x16 # SKIP
7343 00:42:12.102938 # ok 1 bti_none_func/call_using_blr # SKIP
7344 00:42:12.106353 # ok 1 bti_c_func/call_using_br_x0 # SKIP
7345 00:42:12.109696 # ok 1 bti_c_func/call_using_br_x16 # SKIP
7346 00:42:12.113168 # ok 1 bti_c_func/call_using_blr # SKIP
7347 00:42:12.115710 # ok 1 bti_j_func/call_using_br_x0 # SKIP
7348 00:42:12.119196 # ok 1 bti_j_func/call_using_br_x16 # SKIP
7349 00:42:12.122841 # ok 1 bti_j_func/call_using_blr # SKIP
7350 00:42:12.129417 # ok 1 bti_jc_func/call_using_br_x0 # SKIP
7351 00:42:12.132552 # ok 1 bti_jc_func/call_using_br_x16 # SKIP
7352 00:42:12.136189 # ok 1 bti_jc_func/call_using_blr # SKIP
7353 00:42:12.139156 # ok 1 paciasp_func/call_using_br_x0 # SKIP
7354 00:42:12.142263 # ok 1 paciasp_func/call_using_br_x16 # SKIP
7355 00:42:12.149333 # ok 1 paciasp_func/call_using_blr # SKIP
7356 00:42:12.152492 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0
7357 00:42:12.155676 # # WARNING - EXPECTED TEST COUNT WRONG
7358 00:42:12.159123 ok 44 selftests: arm64: nobtitest
7359 00:42:12.163053 # selftests: arm64: hwcap
7360 00:42:12.163132 # TAP version 13
7361 00:42:12.163192 # 1..28
7362 00:42:12.166113 # ok 1 cpuinfo_match_RNG
7363 00:42:12.169194 # # SIGILL reported for RNG
7364 00:42:12.172445 # ok 2 # SKIP sigill_RNG
7365 00:42:12.172548 # ok 3 cpuinfo_match_SME
7366 00:42:12.175815 # ok 4 sigill_SME
7367 00:42:12.175892 # ok 5 cpuinfo_match_SVE
7368 00:42:12.178968 # ok 6 sigill_SVE
7369 00:42:12.182058 # ok 7 cpuinfo_match_SVE 2
7370 00:42:12.185573 # # SIGILL reported for SVE 2
7371 00:42:12.185654 # ok 8 # SKIP sigill_SVE 2
7372 00:42:12.188877 # ok 9 cpuinfo_match_SVE AES
7373 00:42:12.192203 # # SIGILL reported for SVE AES
7374 00:42:12.195264 # ok 10 # SKIP sigill_SVE AES
7375 00:42:12.198835 # ok 11 cpuinfo_match_SVE2 PMULL
7376 00:42:12.202104 # # SIGILL reported for SVE2 PMULL
7377 00:42:12.202182 # ok 12 # SKIP sigill_SVE2 PMULL
7378 00:42:12.205230 # ok 13 cpuinfo_match_SVE2 BITPERM
7379 00:42:12.208992 # # SIGILL reported for SVE2 BITPERM
7380 00:42:12.211963 # ok 14 # SKIP sigill_SVE2 BITPERM
7381 00:42:12.215687 # ok 15 cpuinfo_match_SVE2 SHA3
7382 00:42:12.218902 # # SIGILL reported for SVE2 SHA3
7383 00:42:12.221943 # ok 16 # SKIP sigill_SVE2 SHA3
7384 00:42:12.225589 # ok 17 cpuinfo_match_SVE2 SM4
7385 00:42:12.228548 # # SIGILL reported for SVE2 SM4
7386 00:42:12.232058 # ok 18 # SKIP sigill_SVE2 SM4
7387 00:42:12.232134 # ok 19 cpuinfo_match_SVE2 I8MM
7388 00:42:12.235148 # # SIGILL reported for SVE2 I8MM
7389 00:42:12.238700 # ok 20 # SKIP sigill_SVE2 I8MM
7390 00:42:12.241834 # ok 21 cpuinfo_match_SVE2 F32MM
7391 00:42:12.245455 # # SIGILL reported for SVE2 F32MM
7392 00:42:12.248789 # ok 22 # SKIP sigill_SVE2 F32MM
7393 00:42:12.252064 # ok 23 cpuinfo_match_SVE2 F64MM
7394 00:42:12.255509 # # SIGILL reported for SVE2 F64MM
7395 00:42:12.258690 # ok 24 # SKIP sigill_SVE2 F64MM
7396 00:42:12.261830 # ok 25 cpuinfo_match_SVE2 BF16
7397 00:42:12.264842 # # SIGILL reported for SVE2 BF16
7398 00:42:12.264914 # ok 26 # SKIP sigill_SVE2 BF16
7399 00:42:12.268398 # ok 27 cpuinfo_match_SVE2 EBF16
7400 00:42:12.271610 # ok 28 # SKIP sigill_SVE2 EBF16
7401 00:42:12.278322 # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:12 error:0
7402 00:42:12.281810 ok 45 selftests: arm64: hwcap
7403 00:42:12.281878 # selftests: arm64: ptrace
7404 00:42:12.285076 # TAP version 13
7405 00:42:12.285151 # 1..7
7406 00:42:12.288000 # # Parent is 1523, child is 1524
7407 00:42:12.291282 # ok 1 read_tpidr_one
7408 00:42:12.291360 # ok 2 write_tpidr_one
7409 00:42:12.295146 # ok 3 verify_tpidr_one
7410 00:42:12.295225 # ok 4 count_tpidrs
7411 00:42:12.298278 # ok 5 tpidr2_write
7412 00:42:12.298380 # ok 6 tpidr2_read
7413 00:42:12.301542 # ok 7 write_tpidr_only
7414 00:42:12.308155 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
7415 00:42:12.308240 ok 46 selftests: arm64: ptrace
7416 00:42:12.311109 # selftests: arm64: syscall-abi
7417 00:42:12.323619 # TAP version 13
7418 00:42:12.323715 # 1..2
7419 00:42:12.326156 # ok 1 getpid() FPSIMD
7420 00:42:12.329940 # ok 2 sched_yield() FPSIMD
7421 00:42:12.332801 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
7422 00:42:12.336314 ok 47 selftests: arm64: syscall-abi
7423 00:42:12.343284 # selftests: arm64: tpidr2
7424 00:42:12.388211 # TAP version 13
7425 00:42:12.388337 # 1..5
7426 00:42:12.391523 # # PID: 1560
7427 00:42:12.391602 # # SME support not present
7428 00:42:12.394853 # ok 0 skipped, TPIDR2 not supported
7429 00:42:12.397992 # ok 1 skipped, TPIDR2 not supported
7430 00:42:12.401713 # ok 2 skipped, TPIDR2 not supported
7431 00:42:12.404789 # ok 3 skipped, TPIDR2 not supported
7432 00:42:12.408378 # ok 4 skipped, TPIDR2 not supported
7433 00:42:12.414840 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:5 error:0
7434 00:42:12.417962 ok 48 selftests: arm64: tpidr2
7435 00:42:14.007673 arm64_tags_test pass
7436 00:42:14.011065 arm64_run_tags_test_sh pass
7437 00:42:14.014539 arm64_fake_sigreturn_bad_magic pass
7438 00:42:14.017447 arm64_fake_sigreturn_bad_size pass
7439 00:42:14.020710 arm64_fake_sigreturn_bad_size_for_magic0 pass
7440 00:42:14.024104 arm64_fake_sigreturn_duplicated_fpsimd pass
7441 00:42:14.028119 arm64_fake_sigreturn_misaligned_sp pass
7442 00:42:14.030835 arm64_fake_sigreturn_missing_fpsimd pass
7443 00:42:14.033829 arm64_fake_sigreturn_sme_change_vl skip
7444 00:42:14.037457 arm64_fake_sigreturn_sve_change_vl skip
7445 00:42:14.043980 arm64_mangle_pstate_invalid_compat_toggle pass
7446 00:42:14.047222 arm64_mangle_pstate_invalid_daif_bits pass
7447 00:42:14.050648 arm64_mangle_pstate_invalid_mode_el1h pass
7448 00:42:14.053804 arm64_mangle_pstate_invalid_mode_el1t pass
7449 00:42:14.057731 arm64_mangle_pstate_invalid_mode_el2h pass
7450 00:42:14.060518 arm64_mangle_pstate_invalid_mode_el2t pass
7451 00:42:14.067470 arm64_mangle_pstate_invalid_mode_el3h pass
7452 00:42:14.070539 arm64_mangle_pstate_invalid_mode_el3t pass
7453 00:42:14.073802 arm64_sme_trap_no_sm skip
7454 00:42:14.073879 arm64_sme_trap_non_streaming skip
7455 00:42:14.077203 arm64_sme_trap_za pass
7456 00:42:14.080591 arm64_sme_vl skip
7457 00:42:14.080667 arm64_ssve_regs skip
7458 00:42:14.083974 arm64_sve_regs skip
7459 00:42:14.084050 arm64_sve_vl skip
7460 00:42:14.086992 arm64_za_no_regs skip
7461 00:42:14.087068 arm64_za_regs skip
7462 00:42:14.090787 arm64_pac_PAUTH_not_enabled skip
7463 00:42:14.093849 arm64_pac_PAUTH_not_enabled_dup2 skip
7464 00:42:14.096878 arm64_pac_Generic_PAUTH_not_enabled skip
7465 00:42:14.103721 arm64_pac_PAUTH_not_enabled_dup3 skip
7466 00:42:14.107229 arm64_pac_PAUTH_not_enabled_dup4 skip
7467 00:42:14.110454 arm64_pac_PAUTH_not_enabled_dup5 skip
7468 00:42:14.113393 arm64_pac_Generic_PAUTH_not_enabled_dup2 skip
7469 00:42:14.113469 arm64_pac pass
7470 00:42:14.116744 arm64_fp-stress_FPSIMD-0-0 pass
7471 00:42:14.120102 arm64_fp-stress_FPSIMD-0-1 pass
7472 00:42:14.123412 arm64_fp-stress_FPSIMD-1-0 pass
7473 00:42:14.126743 arm64_fp-stress_FPSIMD-1-1 pass
7474 00:42:14.130193 arm64_fp-stress_FPSIMD-2-0 pass
7475 00:42:14.133592 arm64_fp-stress_FPSIMD-2-1 pass
7476 00:42:14.137370 arm64_fp-stress_FPSIMD-3-0 pass
7477 00:42:14.137447 arm64_fp-stress_FPSIMD-3-1 pass
7478 00:42:14.140231 arm64_fp-stress_FPSIMD-4-0 pass
7479 00:42:14.143402 arm64_fp-stress_FPSIMD-4-1 pass
7480 00:42:14.146878 arm64_fp-stress_FPSIMD-5-0 pass
7481 00:42:14.150142 arm64_fp-stress_FPSIMD-5-1 pass
7482 00:42:14.153914 arm64_fp-stress_FPSIMD-6-0 pass
7483 00:42:14.156612 arm64_fp-stress_FPSIMD-6-1 pass
7484 00:42:14.160240 arm64_fp-stress_FPSIMD-7-0 pass
7485 00:42:14.163424 arm64_fp-stress_FPSIMD-7-1 pass
7486 00:42:14.163500 arm64_fp-stress pass
7487 00:42:14.167071 arm64_sve-ptrace_SVE_not_available skip
7488 00:42:14.170587 arm64_sve-ptrace skip
7489 00:42:14.173541 arm64_sve-probe-vls_SVE_not_available skip
7490 00:42:14.176555 arm64_sve-probe-vls skip
7491 00:42:14.180408 arm64_vec-syscfg_SVE_not_supported skip
7492 00:42:14.183145 arm64_vec-syscfg_SVE_not_supported_dup2 skip
7493 00:42:14.189718 arm64_vec-syscfg_SVE_not_supported_dup3 skip
7494 00:42:14.193047 arm64_vec-syscfg_SVE_not_supported_dup4 skip
7495 00:42:14.196521 arm64_vec-syscfg_SVE_not_supported_dup5 skip
7496 00:42:14.200121 arm64_vec-syscfg_SVE_not_supported_dup6 skip
7497 00:42:14.203415 arm64_vec-syscfg_SVE_not_supported_dup7 skip
7498 00:42:14.209861 arm64_vec-syscfg_SVE_not_supported_dup8 skip
7499 00:42:14.213147 arm64_vec-syscfg_SVE_not_supported_dup9 skip
7500 00:42:14.216266 arm64_vec-syscfg_SVE_not_supported_dup10 skip
7501 00:42:14.220126 arm64_vec-syscfg_SME_not_supported skip
7502 00:42:14.226805 arm64_vec-syscfg_SME_not_supported_dup2 skip
7503 00:42:14.229578 arm64_vec-syscfg_SME_not_supported_dup3 skip
7504 00:42:14.233022 arm64_vec-syscfg_SME_not_supported_dup4 skip
7505 00:42:14.236181 arm64_vec-syscfg_SME_not_supported_dup5 skip
7506 00:42:14.242921 arm64_vec-syscfg_SME_not_supported_dup6 skip
7507 00:42:14.246382 arm64_vec-syscfg_SME_not_supported_dup7 skip
7508 00:42:14.249764 arm64_vec-syscfg_SME_not_supported_dup8 skip
7509 00:42:14.252791 arm64_vec-syscfg_SME_not_supported_dup9 skip
7510 00:42:14.259478 arm64_vec-syscfg_SME_not_supported_dup10 skip
7511 00:42:14.259554 arm64_vec-syscfg pass
7512 00:42:14.262602 arm64_za-fork_skipped pass
7513 00:42:14.266711 arm64_za-fork pass
7514 00:42:14.269412 arm64_za-ptrace_SME_not_available skip
7515 00:42:14.269488 arm64_za-ptrace skip
7516 00:42:14.272600 arm64_check_buffer_fill skip
7517 00:42:14.276254 arm64_check_child_memory skip
7518 00:42:14.279559 arm64_check_gcr_el1_cswitch skip
7519 00:42:14.283007 arm64_check_ksm_options skip
7520 00:42:14.283127 arm64_check_mmap_options skip
7521 00:42:14.289572 arm64_check_prctl_check_basic_read pass
7522 00:42:14.289648 arm64_check_prctl_NONE pass
7523 00:42:14.292763 arm64_check_prctl_SYNC skip
7524 00:42:14.296411 arm64_check_prctl_ASYNC skip
7525 00:42:14.299287 arm64_check_prctl_SYNC_ASYNC skip
7526 00:42:14.303268 arm64_check_prctl pass
7527 00:42:14.303345 arm64_check_tags_inclusion skip
7528 00:42:14.306029 arm64_check_user_mem skip
7529 00:42:14.309461 arm64_btitest_nohint_func_call_using_br_x0 skip
7530 00:42:14.315856 arm64_btitest_nohint_func_call_using_br_x16 skip
7531 00:42:14.319203 arm64_btitest_nohint_func_call_using_blr skip
7532 00:42:14.322501 arm64_btitest_bti_none_func_call_using_br_x0 skip
7533 00:42:14.329385 arm64_btitest_bti_none_func_call_using_br_x16 skip
7534 00:42:14.333452 arm64_btitest_bti_none_func_call_using_blr skip
7535 00:42:14.339455 arm64_btitest_bti_c_func_call_using_br_x0 skip
7536 00:42:14.343114 arm64_btitest_bti_c_func_call_using_br_x16 skip
7537 00:42:14.346111 arm64_btitest_bti_c_func_call_using_blr skip
7538 00:42:14.349122 arm64_btitest_bti_j_func_call_using_br_x0 skip
7539 00:42:14.355652 arm64_btitest_bti_j_func_call_using_br_x16 skip
7540 00:42:14.359728 arm64_btitest_bti_j_func_call_using_blr skip
7541 00:42:14.362259 arm64_btitest_bti_jc_func_call_using_br_x0 skip
7542 00:42:14.369272 arm64_btitest_bti_jc_func_call_using_br_x16 skip
7543 00:42:14.372843 arm64_btitest_bti_jc_func_call_using_blr skip
7544 00:42:14.376017 arm64_btitest_paciasp_func_call_using_br_x0 skip
7545 00:42:14.379088 arm64_btitest_paciasp_func_call_using_br_x16 skip
7546 00:42:14.385917 arm64_btitest_paciasp_func_call_using_blr skip
7547 00:42:14.386032 arm64_btitest pass
7548 00:42:14.392792 arm64_nobtitest_nohint_func_call_using_br_x0 skip
7549 00:42:14.395491 arm64_nobtitest_nohint_func_call_using_br_x16 skip
7550 00:42:14.398870 arm64_nobtitest_nohint_func_call_using_blr skip
7551 00:42:14.405976 arm64_nobtitest_bti_none_func_call_using_br_x0 skip
7552 00:42:14.409031 arm64_nobtitest_bti_none_func_call_using_br_x16 skip
7553 00:42:14.412264 arm64_nobtitest_bti_none_func_call_using_blr skip
7554 00:42:14.419194 arm64_nobtitest_bti_c_func_call_using_br_x0 skip
7555 00:42:14.422592 arm64_nobtitest_bti_c_func_call_using_br_x16 skip
7556 00:42:14.425389 arm64_nobtitest_bti_c_func_call_using_blr skip
7557 00:42:14.432139 arm64_nobtitest_bti_j_func_call_using_br_x0 skip
7558 00:42:14.435820 arm64_nobtitest_bti_j_func_call_using_br_x16 skip
7559 00:42:14.438677 arm64_nobtitest_bti_j_func_call_using_blr skip
7560 00:42:14.445820 arm64_nobtitest_bti_jc_func_call_using_br_x0 skip
7561 00:42:14.449145 arm64_nobtitest_bti_jc_func_call_using_br_x16 skip
7562 00:42:14.452369 arm64_nobtitest_bti_jc_func_call_using_blr skip
7563 00:42:14.458447 arm64_nobtitest_paciasp_func_call_using_br_x0 skip
7564 00:42:14.462331 arm64_nobtitest_paciasp_func_call_using_br_x16 skip
7565 00:42:14.465311 arm64_nobtitest_paciasp_func_call_using_blr skip
7566 00:42:14.468427 arm64_nobtitest pass
7567 00:42:14.471765 arm64_hwcap_cpuinfo_match_RNG pass
7568 00:42:14.475052 arm64_hwcap_sigill_RNG skip
7569 00:42:14.478379 arm64_hwcap_cpuinfo_match_SME pass
7570 00:42:14.478456 arm64_hwcap_sigill_SME pass
7571 00:42:14.481638 arm64_hwcap_cpuinfo_match_SVE pass
7572 00:42:14.485138 arm64_hwcap_sigill_SVE pass
7573 00:42:14.488276 arm64_hwcap_cpuinfo_match_SVE_2 pass
7574 00:42:14.491776 arm64_hwcap_sigill_SVE_2 skip
7575 00:42:14.494968 arm64_hwcap_cpuinfo_match_SVE_AES pass
7576 00:42:14.497966 arm64_hwcap_sigill_SVE_AES skip
7577 00:42:14.501496 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
7578 00:42:14.504853 arm64_hwcap_sigill_SVE2_PMULL skip
7579 00:42:14.508396 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
7580 00:42:14.511739 arm64_hwcap_sigill_SVE2_BITPERM skip
7581 00:42:14.514957 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
7582 00:42:14.518156 arm64_hwcap_sigill_SVE2_SHA3 skip
7583 00:42:14.521352 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
7584 00:42:14.524961 arm64_hwcap_sigill_SVE2_SM4 skip
7585 00:42:14.527894 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
7586 00:42:14.531523 arm64_hwcap_sigill_SVE2_I8MM skip
7587 00:42:14.534836 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
7588 00:42:14.537801 arm64_hwcap_sigill_SVE2_F32MM skip
7589 00:42:14.541019 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
7590 00:42:14.544522 arm64_hwcap_sigill_SVE2_F64MM skip
7591 00:42:14.547803 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
7592 00:42:14.551209 arm64_hwcap_sigill_SVE2_BF16 skip
7593 00:42:14.554542 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
7594 00:42:14.557972 arm64_hwcap_sigill_SVE2_EBF16 skip
7595 00:42:14.561049 arm64_hwcap pass
7596 00:42:14.564351 arm64_ptrace_read_tpidr_one pass
7597 00:42:14.568495 arm64_ptrace_write_tpidr_one pass
7598 00:42:14.568572 arm64_ptrace_verify_tpidr_one pass
7599 00:42:14.570747 arm64_ptrace_count_tpidrs pass
7600 00:42:14.574639 arm64_ptrace_tpidr2_write pass
7601 00:42:14.577621 arm64_ptrace_tpidr2_read pass
7602 00:42:14.581025 arm64_ptrace_write_tpidr_only pass
7603 00:42:14.581101 arm64_ptrace pass
7604 00:42:14.584086 arm64_syscall-abi_getpid_FPSIMD pass
7605 00:42:14.587642 arm64_syscall-abi_sched_yield_FPSIMD pass
7606 00:42:14.590918 arm64_syscall-abi pass
7607 00:42:14.594104 arm64_tpidr2_skipped_TPIDR2_not_supported pass
7608 00:42:14.601279 arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 pass
7609 00:42:14.604113 arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 pass
7610 00:42:14.607582 arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 pass
7611 00:42:14.614179 arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 pass
7612 00:42:14.614256 arm64_tpidr2 pass
7613 00:42:14.621041 + ../../utils/send-to-lava.sh ./output/result.txt
7614 00:42:14.624199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-arm64 RESULT=pass>
7615 00:42:14.624468 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-arm64 RESULT=pass
7617 00:42:14.630996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
7618 00:42:14.631266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
7620 00:42:14.637711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
7621 00:42:14.637995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
7623 00:42:14.644261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
7624 00:42:14.644506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
7626 00:42:14.650520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
7627 00:42:14.650765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
7629 00:42:14.660835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
7630 00:42:14.661121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
7632 00:42:14.667243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
7633 00:42:14.667487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
7635 00:42:14.689694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
7636 00:42:14.690004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
7638 00:42:14.731217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
7639 00:42:14.731511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
7641 00:42:14.773221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip>
7642 00:42:14.773473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip
7644 00:42:14.811512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip>
7645 00:42:14.811825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip
7647 00:42:14.849634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
7648 00:42:14.849936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
7650 00:42:14.888950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
7651 00:42:14.889239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
7653 00:42:14.930420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
7654 00:42:14.930714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
7656 00:42:14.968338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
7657 00:42:14.968656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
7659 00:42:15.003438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
7660 00:42:15.003733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
7662 00:42:15.042443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
7663 00:42:15.042742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
7665 00:42:15.085399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
7666 00:42:15.085697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
7668 00:42:15.124954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
7669 00:42:15.125254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
7671 00:42:15.159639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip>
7672 00:42:15.159937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip
7674 00:42:15.202177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
7676 00:42:15.205168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
7677 00:42:15.243178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
7678 00:42:15.243479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
7680 00:42:15.282614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=skip>
7681 00:42:15.282914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=skip
7683 00:42:15.321933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=skip>
7684 00:42:15.322352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=skip
7686 00:42:15.359735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=skip>
7687 00:42:15.360049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=skip
7689 00:42:15.399185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=skip>
7690 00:42:15.399484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=skip
7692 00:42:15.439176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=skip>
7693 00:42:15.439501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=skip
7695 00:42:15.474729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=skip>
7696 00:42:15.475029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=skip
7698 00:42:15.514038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip
7700 00:42:15.517363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip>
7701 00:42:15.554757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip>
7702 00:42:15.555053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip
7704 00:42:15.590586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip>
7705 00:42:15.590878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip
7707 00:42:15.633518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip>
7708 00:42:15.633813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip
7710 00:42:15.675417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip>
7711 00:42:15.675712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip
7713 00:42:15.716006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip>
7714 00:42:15.716301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip
7716 00:42:15.752888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip>
7717 00:42:15.753191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip
7719 00:42:15.787920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
7720 00:42:15.788225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
7722 00:42:15.826108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
7723 00:42:15.826410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
7725 00:42:15.865218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass>
7726 00:42:15.865526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass
7728 00:42:15.904274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass>
7729 00:42:15.904567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass
7731 00:42:15.944382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass>
7732 00:42:15.944686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass
7734 00:42:15.984968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass
7736 00:42:15.987138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass>
7737 00:42:16.021618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass>
7738 00:42:16.021916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass
7740 00:42:16.059084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass>
7741 00:42:16.059406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass
7743 00:42:16.094799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass>
7744 00:42:16.095122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass
7746 00:42:16.131715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass>
7747 00:42:16.132021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass
7749 00:42:16.169749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass>
7750 00:42:16.170055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass
7752 00:42:16.210421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass
7754 00:42:16.213181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass>
7755 00:42:16.247414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass
7757 00:42:16.250207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass>
7758 00:42:16.286559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass>
7759 00:42:16.286858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass
7761 00:42:16.325261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass>
7762 00:42:16.325565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass
7764 00:42:16.364443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass>
7765 00:42:16.364786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass
7767 00:42:16.407076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass>
7768 00:42:16.407392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass
7770 00:42:16.446431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
7771 00:42:16.446732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
7773 00:42:16.491108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip>
7774 00:42:16.491417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip
7776 00:42:16.531399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=skip>
7777 00:42:16.531734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=skip
7779 00:42:16.578660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip>
7780 00:42:16.578957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip
7782 00:42:16.617577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip>
7783 00:42:16.617880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip
7785 00:42:16.661732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip>
7786 00:42:16.662022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip
7788 00:42:16.701298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip>
7789 00:42:16.701595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip
7791 00:42:16.738099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip>
7792 00:42:16.738383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip
7794 00:42:16.779165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip>
7795 00:42:16.779465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip
7797 00:42:16.821757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip>
7798 00:42:16.822077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip
7800 00:42:16.861040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip>
7801 00:42:16.861339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip
7803 00:42:16.899892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip>
7804 00:42:16.900195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip
7806 00:42:16.938143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip>
7807 00:42:16.938443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip
7809 00:42:16.977573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip>
7810 00:42:16.977874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip
7812 00:42:17.018792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip>
7813 00:42:17.019093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip
7815 00:42:17.059289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip>
7816 00:42:17.059587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip
7818 00:42:17.097340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip>
7819 00:42:17.097639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip
7821 00:42:17.138164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip>
7822 00:42:17.138478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip
7824 00:42:17.175815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip>
7825 00:42:17.176114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip
7827 00:42:17.211547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip>
7828 00:42:17.211843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip
7830 00:42:17.251740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip>
7831 00:42:17.252039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip
7833 00:42:17.287792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip>
7834 00:42:17.288092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip
7836 00:42:17.325189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip>
7837 00:42:17.325489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip
7839 00:42:17.366118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip>
7840 00:42:17.366416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip
7842 00:42:17.410713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip>
7843 00:42:17.411032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip
7845 00:42:17.447562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
7846 00:42:17.447863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
7848 00:42:17.490037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass>
7849 00:42:17.490340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass
7851 00:42:17.534755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
7852 00:42:17.535066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
7854 00:42:17.578693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip>
7855 00:42:17.578998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip
7857 00:42:17.618982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=skip>
7858 00:42:17.619289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=skip
7860 00:42:17.661111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip>
7861 00:42:17.661412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip
7863 00:42:17.702263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=skip>
7864 00:42:17.702570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=skip
7866 00:42:17.742407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip
7868 00:42:17.745323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip>
7869 00:42:17.783663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=skip>
7870 00:42:17.783988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=skip
7872 00:42:17.826281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=skip>
7873 00:42:17.826594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=skip
7875 00:42:17.869812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
7876 00:42:17.870115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
7878 00:42:17.910682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
7879 00:42:17.911010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
7881 00:42:17.951801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip>
7882 00:42:17.952101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip
7884 00:42:17.991655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip>
7885 00:42:17.991952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip
7887 00:42:18.032301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip
7889 00:42:18.035486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip>
7890 00:42:18.071406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
7891 00:42:18.071704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
7893 00:42:18.108242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip>
7894 00:42:18.108541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip
7896 00:42:18.146224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=skip>
7897 00:42:18.146563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=skip
7899 00:42:18.189961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip>
7900 00:42:18.190300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip
7902 00:42:18.230394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip>
7903 00:42:18.230693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip
7905 00:42:18.269293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip>
7906 00:42:18.269613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip
7908 00:42:18.309219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip>
7909 00:42:18.309519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip
7911 00:42:18.355561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip>
7912 00:42:18.355867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip
7914 00:42:18.395817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip>
7915 00:42:18.396114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip
7917 00:42:18.438397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip>
7918 00:42:18.438696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip
7920 00:42:18.478338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip>
7921 00:42:18.478634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip
7923 00:42:18.518802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip>
7924 00:42:18.519106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip
7926 00:42:18.557423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip>
7927 00:42:18.557723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip
7929 00:42:18.598719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip>
7930 00:42:18.599018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip
7932 00:42:18.643270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip>
7933 00:42:18.643564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip
7935 00:42:18.684608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip>
7936 00:42:18.684908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip
7938 00:42:18.725000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip>
7939 00:42:18.725299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip
7941 00:42:18.766794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip>
7942 00:42:18.767106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip
7944 00:42:18.805934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip>
7945 00:42:18.806258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip
7947 00:42:18.846034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip>
7948 00:42:18.846332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip
7950 00:42:18.885992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip>
7951 00:42:18.886306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip
7953 00:42:18.919983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
7954 00:42:18.920278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
7956 00:42:18.962616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip>
7957 00:42:18.962935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip
7959 00:42:19.003113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip>
7960 00:42:19.003411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip
7962 00:42:19.044504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip>
7963 00:42:19.044801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip
7965 00:42:19.086658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip>
7966 00:42:19.086955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip
7968 00:42:19.132916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip>
7969 00:42:19.133214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip
7971 00:42:19.175147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip>
7972 00:42:19.175447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip
7974 00:42:19.217223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip>
7975 00:42:19.217522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip
7977 00:42:19.263271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip>
7978 00:42:19.263566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip
7980 00:42:19.303166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip>
7981 00:42:19.303467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip
7983 00:42:19.346445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip>
7984 00:42:19.346743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip
7986 00:42:19.386429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip>
7987 00:42:19.386729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip
7989 00:42:19.426690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip>
7990 00:42:19.426987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip
7992 00:42:19.463928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip>
7993 00:42:19.464232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip
7995 00:42:19.502962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip>
7996 00:42:19.503260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip
7998 00:42:19.543161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip>
7999 00:42:19.543440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip
8001 00:42:19.582865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip>
8002 00:42:19.583164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip
8004 00:42:19.623807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip>
8005 00:42:19.624105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip
8007 00:42:19.663986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip>
8008 00:42:19.664307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip
8010 00:42:19.699973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
8011 00:42:19.700269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
8013 00:42:19.741941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
8014 00:42:19.742272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
8016 00:42:19.777926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip>
8017 00:42:19.778261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip
8019 00:42:19.824716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
8020 00:42:19.825018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
8022 00:42:19.864546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
8023 00:42:19.864849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
8025 00:42:19.909485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
8026 00:42:19.909779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
8028 00:42:19.951234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
8029 00:42:19.951531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
8031 00:42:19.997332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
8032 00:42:19.997630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
8034 00:42:20.038164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip>
8035 00:42:20.038461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip
8037 00:42:20.083857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
8038 00:42:20.084161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
8040 00:42:20.121514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip>
8041 00:42:20.121836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip
8043 00:42:20.168272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
8044 00:42:20.168589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
8046 00:42:20.210991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip>
8047 00:42:20.211292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip
8049 00:42:20.249577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
8050 00:42:20.249873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
8052 00:42:20.291357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip>
8053 00:42:20.291659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip
8055 00:42:20.327847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
8056 00:42:20.328145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
8058 00:42:20.366351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip
8060 00:42:20.369502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip>
8061 00:42:20.410288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
8062 00:42:20.410603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
8064 00:42:20.448094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip>
8065 00:42:20.448391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip
8067 00:42:20.487036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
8068 00:42:20.487336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
8070 00:42:20.519153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip
8072 00:42:20.522290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip>
8073 00:42:20.559051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
8074 00:42:20.559351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
8076 00:42:20.595973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip>
8077 00:42:20.596272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip
8079 00:42:20.632671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
8080 00:42:20.632971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
8082 00:42:20.671477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip
8084 00:42:20.674270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip>
8085 00:42:20.715154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
8086 00:42:20.715479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
8088 00:42:20.752429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip
8090 00:42:20.755211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip>
8091 00:42:20.797210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
8092 00:42:20.797528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
8094 00:42:20.834188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
8095 00:42:20.834487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
8097 00:42:20.871088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
8098 00:42:20.871384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
8100 00:42:20.913836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
8102 00:42:20.916402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
8103 00:42:20.957156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
8105 00:42:20.960336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
8106 00:42:20.998679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
8107 00:42:20.998977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
8109 00:42:21.038967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
8110 00:42:21.039265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
8112 00:42:21.083538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
8113 00:42:21.083831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
8115 00:42:21.122695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
8116 00:42:21.122996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
8118 00:42:21.166159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
8119 00:42:21.166455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
8121 00:42:21.200779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
8122 00:42:21.201070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
8124 00:42:21.241815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
8125 00:42:21.242131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
8127 00:42:21.282311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
8128 00:42:21.282607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
8130 00:42:21.318957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
8131 00:42:21.319260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
8133 00:42:21.360974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass>
8134 00:42:21.361272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass
8136 00:42:21.401029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass>
8137 00:42:21.401327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass
8139 00:42:21.441259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass>
8140 00:42:21.441557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass
8142 00:42:21.486985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass>
8143 00:42:21.487287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass
8145 00:42:21.524896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass>
8146 00:42:21.525217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass
8148 00:42:21.559108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
8149 00:42:21.559235 + set +x
8150 00:42:21.559470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
8152 00:42:21.565569 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64 14368351_1.6.2.3.5>
8153 00:42:21.565819 Received signal: <ENDRUN> 1_kselftest-arm64 14368351_1.6.2.3.5
8154 00:42:21.565887 Ending use of test pattern.
8155 00:42:21.565943 Ending test lava.1_kselftest-arm64 (14368351_1.6.2.3.5), duration 31.28
8157 00:42:21.569243 <LAVA_TEST_RUNNER EXIT>
8158 00:42:21.569477 ok: lava_test_shell seems to have completed
8159 00:42:21.570458 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: skip
arm64_btitest_bti_c_func_call_using_br_x0: skip
arm64_btitest_bti_c_func_call_using_br_x16: skip
arm64_btitest_bti_j_func_call_using_blr: skip
arm64_btitest_bti_j_func_call_using_br_x0: skip
arm64_btitest_bti_j_func_call_using_br_x16: skip
arm64_btitest_bti_jc_func_call_using_blr: skip
arm64_btitest_bti_jc_func_call_using_br_x0: skip
arm64_btitest_bti_jc_func_call_using_br_x16: skip
arm64_btitest_bti_none_func_call_using_blr: skip
arm64_btitest_bti_none_func_call_using_br_x0: skip
arm64_btitest_bti_none_func_call_using_br_x16: skip
arm64_btitest_nohint_func_call_using_blr: skip
arm64_btitest_nohint_func_call_using_br_x0: skip
arm64_btitest_nohint_func_call_using_br_x16: skip
arm64_btitest_paciasp_func_call_using_blr: skip
arm64_btitest_paciasp_func_call_using_br_x0: skip
arm64_btitest_paciasp_func_call_using_br_x16: skip
arm64_check_buffer_fill: skip
arm64_check_child_memory: skip
arm64_check_gcr_el1_cswitch: skip
arm64_check_ksm_options: skip
arm64_check_mmap_options: skip
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: skip
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: skip
arm64_check_prctl_SYNC_ASYNC: skip
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: skip
arm64_check_user_mem: skip
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: skip
arm64_fake_sigreturn_sve_change_vl: skip
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_FPSIMD-0-1: pass
arm64_fp-stress_FPSIMD-1-0: pass
arm64_fp-stress_FPSIMD-1-1: pass
arm64_fp-stress_FPSIMD-2-0: pass
arm64_fp-stress_FPSIMD-2-1: pass
arm64_fp-stress_FPSIMD-3-0: pass
arm64_fp-stress_FPSIMD-3-1: pass
arm64_fp-stress_FPSIMD-4-0: pass
arm64_fp-stress_FPSIMD-4-1: pass
arm64_fp-stress_FPSIMD-5-0: pass
arm64_fp-stress_FPSIMD-5-1: pass
arm64_fp-stress_FPSIMD-6-0: pass
arm64_fp-stress_FPSIMD-6-1: pass
arm64_fp-stress_FPSIMD-7-0: pass
arm64_fp-stress_FPSIMD-7-1: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: skip
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: skip
arm64_hwcap_sigill_SVE2_BITPERM: skip
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: skip
arm64_hwcap_sigill_SVE2_F64MM: skip
arm64_hwcap_sigill_SVE2_I8MM: skip
arm64_hwcap_sigill_SVE2_PMULL: skip
arm64_hwcap_sigill_SVE2_SHA3: skip
arm64_hwcap_sigill_SVE2_SM4: skip
arm64_hwcap_sigill_SVE_2: skip
arm64_hwcap_sigill_SVE_AES: skip
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: skip
arm64_nobtitest_bti_c_func_call_using_br_x0: skip
arm64_nobtitest_bti_c_func_call_using_br_x16: skip
arm64_nobtitest_bti_j_func_call_using_blr: skip
arm64_nobtitest_bti_j_func_call_using_br_x0: skip
arm64_nobtitest_bti_j_func_call_using_br_x16: skip
arm64_nobtitest_bti_jc_func_call_using_blr: skip
arm64_nobtitest_bti_jc_func_call_using_br_x0: skip
arm64_nobtitest_bti_jc_func_call_using_br_x16: skip
arm64_nobtitest_bti_none_func_call_using_blr: skip
arm64_nobtitest_bti_none_func_call_using_br_x0: skip
arm64_nobtitest_bti_none_func_call_using_br_x16: skip
arm64_nobtitest_nohint_func_call_using_blr: skip
arm64_nobtitest_nohint_func_call_using_br_x0: skip
arm64_nobtitest_nohint_func_call_using_br_x16: skip
arm64_nobtitest_paciasp_func_call_using_blr: skip
arm64_nobtitest_paciasp_func_call_using_br_x0: skip
arm64_nobtitest_paciasp_func_call_using_br_x16: skip
arm64_pac: pass
arm64_pac_Generic_PAUTH_not_enabled: skip
arm64_pac_Generic_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled: skip
arm64_pac_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled_dup3: skip
arm64_pac_PAUTH_not_enabled_dup4: skip
arm64_pac_PAUTH_not_enabled_dup5: skip
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: skip
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: skip
arm64_ssve_regs: skip
arm64_sve-probe-vls: skip
arm64_sve-probe-vls_SVE_not_available: skip
arm64_sve-ptrace: skip
arm64_sve-ptrace_SVE_not_available: skip
arm64_sve_regs: skip
arm64_sve_vl: skip
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup3: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup4: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup5: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_not_supported: skip
arm64_vec-syscfg_SME_not_supported_dup10: skip
arm64_vec-syscfg_SME_not_supported_dup2: skip
arm64_vec-syscfg_SME_not_supported_dup3: skip
arm64_vec-syscfg_SME_not_supported_dup4: skip
arm64_vec-syscfg_SME_not_supported_dup5: skip
arm64_vec-syscfg_SME_not_supported_dup6: skip
arm64_vec-syscfg_SME_not_supported_dup7: skip
arm64_vec-syscfg_SME_not_supported_dup8: skip
arm64_vec-syscfg_SME_not_supported_dup9: skip
arm64_vec-syscfg_SVE_not_supported: skip
arm64_vec-syscfg_SVE_not_supported_dup10: skip
arm64_vec-syscfg_SVE_not_supported_dup2: skip
arm64_vec-syscfg_SVE_not_supported_dup3: skip
arm64_vec-syscfg_SVE_not_supported_dup4: skip
arm64_vec-syscfg_SVE_not_supported_dup5: skip
arm64_vec-syscfg_SVE_not_supported_dup6: skip
arm64_vec-syscfg_SVE_not_supported_dup7: skip
arm64_vec-syscfg_SVE_not_supported_dup8: skip
arm64_vec-syscfg_SVE_not_supported_dup9: skip
arm64_za-fork: pass
arm64_za-fork_skipped: pass
arm64_za-ptrace: skip
arm64_za-ptrace_SME_not_available: skip
arm64_za_no_regs: skip
arm64_za_regs: skip
shardfile-arm64: pass
8160 00:42:21.570636 end: 3.1 lava-test-shell (duration 00:00:32) [common]
8161 00:42:21.570725 end: 3 lava-test-retry (duration 00:00:32) [common]
8162 00:42:21.570812 start: 4 finalize (timeout 00:07:38) [common]
8163 00:42:21.570899 start: 4.1 power-off (timeout 00:00:30) [common]
8164 00:42:21.571039 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1', '--port=1', '--command=off']
8165 00:42:22.760296 >> Command sent successfully.
8166 00:42:22.763260 Returned 0 in 1 seconds
8167 00:42:22.863582 end: 4.1 power-off (duration 00:00:01) [common]
8169 00:42:22.863918 start: 4.2 read-feedback (timeout 00:07:37) [common]
8170 00:42:22.864168 Listened to connection for namespace 'common' for up to 1s
8171 00:42:23.865111 Finalising connection for namespace 'common'
8172 00:42:23.865265 Disconnecting from shell: Finalise
8173 00:42:23.865345 / #
8174 00:42:23.965638 end: 4.2 read-feedback (duration 00:00:01) [common]
8175 00:42:23.965825 end: 4 finalize (duration 00:00:02) [common]
8176 00:42:23.965976 Cleaning after the job
8177 00:42:23.966337 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/ramdisk
8178 00:42:23.968511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/kernel
8179 00:42:23.979365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/dtb
8180 00:42:23.979571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/nfsrootfs
8181 00:42:24.044392 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368351/tftp-deploy-n4d0cf2c/modules
8182 00:42:24.050111 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368351
8183 00:42:24.611155 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368351
8184 00:42:24.611334 Job finished correctly