Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 52
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 00:39:24.997577 lava-dispatcher, installed at version: 2024.03
2 00:39:24.997785 start: 0 validate
3 00:39:24.997957 Start time: 2024-06-16 00:39:24.997946+00:00 (UTC)
4 00:39:24.998163 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:39:24.998331 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:39:25.255055 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:39:25.255795 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:39:41.272546 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:39:41.273293 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:39:41.530014 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:39:41.530698 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:39:42.026964 Using caching service: 'http://localhost/cache/?uri=%s'
13 00:39:42.027705 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 00:39:44.038615 validate duration: 19.04
16 00:39:44.038879 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:39:44.038981 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:39:44.039068 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:39:44.039191 Not decompressing ramdisk as can be used compressed.
20 00:39:44.039276 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/initrd.cpio.gz
21 00:39:44.039341 saving as /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/ramdisk/initrd.cpio.gz
22 00:39:44.039406 total size: 5628151 (5 MB)
23 00:39:44.290324 progress 0 % (0 MB)
24 00:39:44.292062 progress 5 % (0 MB)
25 00:39:44.293735 progress 10 % (0 MB)
26 00:39:44.295230 progress 15 % (0 MB)
27 00:39:44.296846 progress 20 % (1 MB)
28 00:39:44.298323 progress 25 % (1 MB)
29 00:39:44.299896 progress 30 % (1 MB)
30 00:39:44.301531 progress 35 % (1 MB)
31 00:39:44.302907 progress 40 % (2 MB)
32 00:39:44.304438 progress 45 % (2 MB)
33 00:39:44.305881 progress 50 % (2 MB)
34 00:39:44.307461 progress 55 % (2 MB)
35 00:39:44.309183 progress 60 % (3 MB)
36 00:39:44.310588 progress 65 % (3 MB)
37 00:39:44.312139 progress 70 % (3 MB)
38 00:39:44.313748 progress 75 % (4 MB)
39 00:39:44.315312 progress 80 % (4 MB)
40 00:39:44.316675 progress 85 % (4 MB)
41 00:39:44.318358 progress 90 % (4 MB)
42 00:39:44.319890 progress 95 % (5 MB)
43 00:39:44.321303 progress 100 % (5 MB)
44 00:39:44.321529 5 MB downloaded in 0.28 s (19.03 MB/s)
45 00:39:44.321683 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:39:44.321974 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:39:44.322066 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:39:44.322153 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:39:44.322290 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 00:39:44.322361 saving as /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/kernel/Image
52 00:39:44.322424 total size: 54813184 (52 MB)
53 00:39:44.322486 No compression specified
54 00:39:44.323675 progress 0 % (0 MB)
55 00:39:44.337995 progress 5 % (2 MB)
56 00:39:44.352802 progress 10 % (5 MB)
57 00:39:44.367183 progress 15 % (7 MB)
58 00:39:44.381570 progress 20 % (10 MB)
59 00:39:44.395837 progress 25 % (13 MB)
60 00:39:44.410163 progress 30 % (15 MB)
61 00:39:44.424848 progress 35 % (18 MB)
62 00:39:44.439312 progress 40 % (20 MB)
63 00:39:44.454111 progress 45 % (23 MB)
64 00:39:44.468931 progress 50 % (26 MB)
65 00:39:44.483629 progress 55 % (28 MB)
66 00:39:44.498205 progress 60 % (31 MB)
67 00:39:44.512841 progress 65 % (34 MB)
68 00:39:44.527810 progress 70 % (36 MB)
69 00:39:44.542789 progress 75 % (39 MB)
70 00:39:44.557600 progress 80 % (41 MB)
71 00:39:44.572747 progress 85 % (44 MB)
72 00:39:44.587323 progress 90 % (47 MB)
73 00:39:44.601720 progress 95 % (49 MB)
74 00:39:44.615699 progress 100 % (52 MB)
75 00:39:44.615980 52 MB downloaded in 0.29 s (178.07 MB/s)
76 00:39:44.616148 end: 1.2.1 http-download (duration 00:00:00) [common]
78 00:39:44.616401 end: 1.2 download-retry (duration 00:00:00) [common]
79 00:39:44.616493 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:39:44.616580 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:39:44.616721 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 00:39:44.616795 saving as /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 00:39:44.616859 total size: 57695 (0 MB)
84 00:39:44.616922 No compression specified
85 00:39:44.618103 progress 56 % (0 MB)
86 00:39:44.618401 progress 100 % (0 MB)
87 00:39:44.618608 0 MB downloaded in 0.00 s (31.50 MB/s)
88 00:39:44.618736 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:39:44.618969 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:39:44.619058 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:39:44.619144 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:39:44.619260 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/full.rootfs.tar.xz
94 00:39:44.619330 saving as /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/nfsrootfs/full.rootfs.tar
95 00:39:44.619394 total size: 69067788 (65 MB)
96 00:39:44.619459 Using unxz to decompress xz
97 00:39:44.623711 progress 0 % (0 MB)
98 00:39:44.820137 progress 5 % (3 MB)
99 00:39:45.026821 progress 10 % (6 MB)
100 00:39:45.236941 progress 15 % (9 MB)
101 00:39:45.409683 progress 20 % (13 MB)
102 00:39:45.590558 progress 25 % (16 MB)
103 00:39:45.800737 progress 30 % (19 MB)
104 00:39:45.925392 progress 35 % (23 MB)
105 00:39:46.029430 progress 40 % (26 MB)
106 00:39:46.235178 progress 45 % (29 MB)
107 00:39:46.448809 progress 50 % (32 MB)
108 00:39:46.658073 progress 55 % (36 MB)
109 00:39:46.903316 progress 60 % (39 MB)
110 00:39:47.112563 progress 65 % (42 MB)
111 00:39:47.321388 progress 70 % (46 MB)
112 00:39:47.526931 progress 75 % (49 MB)
113 00:39:47.750440 progress 80 % (52 MB)
114 00:39:47.933044 progress 85 % (56 MB)
115 00:39:48.131220 progress 90 % (59 MB)
116 00:39:48.338930 progress 95 % (62 MB)
117 00:39:48.550022 progress 100 % (65 MB)
118 00:39:48.556399 65 MB downloaded in 3.94 s (16.73 MB/s)
119 00:39:48.556757 end: 1.4.1 http-download (duration 00:00:04) [common]
121 00:39:48.557191 end: 1.4 download-retry (duration 00:00:04) [common]
122 00:39:48.557335 start: 1.5 download-retry (timeout 00:09:55) [common]
123 00:39:48.557466 start: 1.5.1 http-download (timeout 00:09:55) [common]
124 00:39:48.557672 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 00:39:48.557781 saving as /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/modules/modules.tar
126 00:39:48.557880 total size: 8608736 (8 MB)
127 00:39:48.557980 Using unxz to decompress xz
128 00:39:48.563337 progress 0 % (0 MB)
129 00:39:48.582710 progress 5 % (0 MB)
130 00:39:48.610444 progress 10 % (0 MB)
131 00:39:48.640990 progress 15 % (1 MB)
132 00:39:48.665273 progress 20 % (1 MB)
133 00:39:48.689473 progress 25 % (2 MB)
134 00:39:48.713873 progress 30 % (2 MB)
135 00:39:48.738988 progress 35 % (2 MB)
136 00:39:48.767057 progress 40 % (3 MB)
137 00:39:48.790374 progress 45 % (3 MB)
138 00:39:48.815036 progress 50 % (4 MB)
139 00:39:48.840953 progress 55 % (4 MB)
140 00:39:48.866119 progress 60 % (4 MB)
141 00:39:48.891153 progress 65 % (5 MB)
142 00:39:48.917570 progress 70 % (5 MB)
143 00:39:48.944613 progress 75 % (6 MB)
144 00:39:48.971538 progress 80 % (6 MB)
145 00:39:48.996815 progress 85 % (7 MB)
146 00:39:49.023131 progress 90 % (7 MB)
147 00:39:49.048995 progress 95 % (7 MB)
148 00:39:49.075270 progress 100 % (8 MB)
149 00:39:49.080934 8 MB downloaded in 0.52 s (15.70 MB/s)
150 00:39:49.081297 end: 1.5.1 http-download (duration 00:00:01) [common]
152 00:39:49.081748 end: 1.5 download-retry (duration 00:00:01) [common]
153 00:39:49.081897 start: 1.6 prepare-tftp-overlay (timeout 00:09:55) [common]
154 00:39:49.082045 start: 1.6.1 extract-nfsrootfs (timeout 00:09:55) [common]
155 00:39:50.685108 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get
156 00:39:50.685548 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 00:39:50.685665 start: 1.6.2 lava-overlay (timeout 00:09:53) [common]
158 00:39:50.685842 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb
159 00:39:50.685975 makedir: /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin
160 00:39:50.686085 makedir: /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/tests
161 00:39:50.686186 makedir: /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/results
162 00:39:50.686291 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-add-keys
163 00:39:50.686440 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-add-sources
164 00:39:50.686573 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-background-process-start
165 00:39:50.686706 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-background-process-stop
166 00:39:50.686837 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-common-functions
167 00:39:50.686966 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-echo-ipv4
168 00:39:50.687097 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-install-packages
169 00:39:50.687232 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-installed-packages
170 00:39:50.687362 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-os-build
171 00:39:50.687492 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-probe-channel
172 00:39:50.687622 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-probe-ip
173 00:39:50.687759 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-target-ip
174 00:39:50.687889 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-target-mac
175 00:39:50.688016 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-target-storage
176 00:39:50.688148 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-case
177 00:39:50.688299 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-event
178 00:39:50.688471 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-feedback
179 00:39:50.688605 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-raise
180 00:39:50.688738 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-reference
181 00:39:50.688866 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-runner
182 00:39:50.688995 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-set
183 00:39:50.689123 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-test-shell
184 00:39:50.689269 Updating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-install-packages (oe)
185 00:39:50.689434 Updating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/bin/lava-installed-packages (oe)
186 00:39:50.689563 Creating /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/environment
187 00:39:50.689668 LAVA metadata
188 00:39:50.689744 - LAVA_JOB_ID=14368350
189 00:39:50.689811 - LAVA_DISPATCHER_IP=192.168.201.1
190 00:39:50.689917 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:53) [common]
191 00:39:50.689988 skipped lava-vland-overlay
192 00:39:50.690066 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 00:39:50.690147 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:53) [common]
194 00:39:50.690210 skipped lava-multinode-overlay
195 00:39:50.690288 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 00:39:50.690417 start: 1.6.2.3 test-definition (timeout 00:09:53) [common]
197 00:39:50.690523 Loading test definitions
198 00:39:50.690623 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:53) [common]
199 00:39:50.690699 Using /lava-14368350 at stage 0
200 00:39:50.690999 uuid=14368350_1.6.2.3.1 testdef=None
201 00:39:50.691091 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 00:39:50.691183 start: 1.6.2.3.2 test-overlay (timeout 00:09:53) [common]
203 00:39:50.691691 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 00:39:50.691925 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:53) [common]
206 00:39:50.692628 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 00:39:50.692868 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:53) [common]
209 00:39:50.693682 runner path: /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/0/tests/0_lc-compliance test_uuid 14368350_1.6.2.3.1
210 00:39:50.693846 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 00:39:50.694062 Creating lava-test-runner.conf files
213 00:39:50.694128 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368350/lava-overlay-_p0gzhqb/lava-14368350/0 for stage 0
214 00:39:50.694221 - 0_lc-compliance
215 00:39:50.694322 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 00:39:50.694416 start: 1.6.2.4 compress-overlay (timeout 00:09:53) [common]
217 00:39:50.700813 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 00:39:50.700935 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
219 00:39:50.701027 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 00:39:50.701117 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 00:39:50.701205 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
222 00:39:50.870919 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 00:39:50.871296 start: 1.6.4 extract-modules (timeout 00:09:53) [common]
224 00:39:50.871416 extracting modules file /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get
225 00:39:51.091650 extracting modules file /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368350/extract-overlay-ramdisk-wd3kojco/ramdisk
226 00:39:51.316936 end: 1.6.4 extract-modules (duration 00:00:00) [common]
227 00:39:51.317109 start: 1.6.5 apply-overlay-tftp (timeout 00:09:53) [common]
228 00:39:51.317211 [common] Applying overlay to NFS
229 00:39:51.317303 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368350/compress-overlay-7yc7uzig/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get
230 00:39:51.323832 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 00:39:51.323967 start: 1.6.6 configure-preseed-file (timeout 00:09:53) [common]
232 00:39:51.324063 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 00:39:51.324190 start: 1.6.7 compress-ramdisk (timeout 00:09:53) [common]
234 00:39:51.324290 Building ramdisk /var/lib/lava/dispatcher/tmp/14368350/extract-overlay-ramdisk-wd3kojco/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368350/extract-overlay-ramdisk-wd3kojco/ramdisk
235 00:39:51.675971 >> 130405 blocks
236 00:39:53.788469 rename /var/lib/lava/dispatcher/tmp/14368350/extract-overlay-ramdisk-wd3kojco/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/ramdisk/ramdisk.cpio.gz
237 00:39:53.788917 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
238 00:39:53.789049 start: 1.6.8 prepare-kernel (timeout 00:09:50) [common]
239 00:39:53.789156 start: 1.6.8.1 prepare-fit (timeout 00:09:50) [common]
240 00:39:53.789281 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/kernel/Image']
241 00:40:08.095160 Returned 0 in 14 seconds
242 00:40:08.195860 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/kernel/image.itb
243 00:40:08.573388 output: FIT description: Kernel Image image with one or more FDT blobs
244 00:40:08.573818 output: Created: Sun Jun 16 01:40:08 2024
245 00:40:08.573902 output: Image 0 (kernel-1)
246 00:40:08.574026 output: Description:
247 00:40:08.574091 output: Created: Sun Jun 16 01:40:08 2024
248 00:40:08.574156 output: Type: Kernel Image
249 00:40:08.574219 output: Compression: lzma compressed
250 00:40:08.574282 output: Data Size: 13126376 Bytes = 12818.73 KiB = 12.52 MiB
251 00:40:08.574341 output: Architecture: AArch64
252 00:40:08.574401 output: OS: Linux
253 00:40:08.574489 output: Load Address: 0x00000000
254 00:40:08.574548 output: Entry Point: 0x00000000
255 00:40:08.574607 output: Hash algo: crc32
256 00:40:08.574665 output: Hash value: c791a20a
257 00:40:08.574748 output: Image 1 (fdt-1)
258 00:40:08.574814 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 00:40:08.574875 output: Created: Sun Jun 16 01:40:08 2024
260 00:40:08.574974 output: Type: Flat Device Tree
261 00:40:08.575059 output: Compression: uncompressed
262 00:40:08.575144 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 00:40:08.575229 output: Architecture: AArch64
264 00:40:08.575313 output: Hash algo: crc32
265 00:40:08.575400 output: Hash value: a9713552
266 00:40:08.575491 output: Image 2 (ramdisk-1)
267 00:40:08.575576 output: Description: unavailable
268 00:40:08.575660 output: Created: Sun Jun 16 01:40:08 2024
269 00:40:08.575745 output: Type: RAMDisk Image
270 00:40:08.575842 output: Compression: Unknown Compression
271 00:40:08.575923 output: Data Size: 18727491 Bytes = 18288.57 KiB = 17.86 MiB
272 00:40:08.576006 output: Architecture: AArch64
273 00:40:08.576088 output: OS: Linux
274 00:40:08.576159 output: Load Address: unavailable
275 00:40:08.576229 output: Entry Point: unavailable
276 00:40:08.576283 output: Hash algo: crc32
277 00:40:08.576349 output: Hash value: 6e05676b
278 00:40:08.576402 output: Default Configuration: 'conf-1'
279 00:40:08.576454 output: Configuration 0 (conf-1)
280 00:40:08.576507 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 00:40:08.576560 output: Kernel: kernel-1
282 00:40:08.576612 output: Init Ramdisk: ramdisk-1
283 00:40:08.576709 output: FDT: fdt-1
284 00:40:08.576793 output: Loadables: kernel-1
285 00:40:08.576877 output:
286 00:40:08.577129 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
287 00:40:08.577286 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
288 00:40:08.577413 end: 1.6 prepare-tftp-overlay (duration 00:00:19) [common]
289 00:40:08.577513 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:35) [common]
290 00:40:08.577592 No LXC device requested
291 00:40:08.577679 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 00:40:08.577765 start: 1.8 deploy-device-env (timeout 00:09:35) [common]
293 00:40:08.577842 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 00:40:08.577912 Checking files for TFTP limit of 4294967296 bytes.
295 00:40:08.578460 end: 1 tftp-deploy (duration 00:00:25) [common]
296 00:40:08.578562 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 00:40:08.578671 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 00:40:08.578879 substitutions:
299 00:40:08.578951 - {DTB}: 14368350/tftp-deploy-t5a5n4a3/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 00:40:08.579021 - {INITRD}: 14368350/tftp-deploy-t5a5n4a3/ramdisk/ramdisk.cpio.gz
301 00:40:08.579083 - {KERNEL}: 14368350/tftp-deploy-t5a5n4a3/kernel/Image
302 00:40:08.579141 - {LAVA_MAC}: None
303 00:40:08.579199 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get
304 00:40:08.579256 - {NFS_SERVER_IP}: 192.168.201.1
305 00:40:08.579312 - {PRESEED_CONFIG}: None
306 00:40:08.579368 - {PRESEED_LOCAL}: None
307 00:40:08.579440 - {RAMDISK}: 14368350/tftp-deploy-t5a5n4a3/ramdisk/ramdisk.cpio.gz
308 00:40:08.579509 - {ROOT_PART}: None
309 00:40:08.579579 - {ROOT}: None
310 00:40:08.579634 - {SERVER_IP}: 192.168.201.1
311 00:40:08.579701 - {TEE}: None
312 00:40:08.579755 Parsed boot commands:
313 00:40:08.579807 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 00:40:08.580036 Parsed boot commands: tftpboot 192.168.201.1 14368350/tftp-deploy-t5a5n4a3/kernel/image.itb 14368350/tftp-deploy-t5a5n4a3/kernel/cmdline
315 00:40:08.580166 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 00:40:08.580284 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 00:40:08.580405 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 00:40:08.580551 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 00:40:08.580653 Not connected, no need to disconnect.
320 00:40:08.580758 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 00:40:08.580873 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 00:40:08.580970 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
323 00:40:08.584795 Setting prompt string to ['lava-test: # ']
324 00:40:08.585213 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 00:40:08.585374 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 00:40:08.585477 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 00:40:08.585568 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 00:40:08.585750 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
329 00:40:33.604043 Returned 0 in 25 seconds
330 00:40:33.705112 end: 2.2.2.1 pdu-reboot (duration 00:00:25) [common]
332 00:40:33.706713 end: 2.2.2 reset-device (duration 00:00:25) [common]
333 00:40:33.707227 start: 2.2.3 depthcharge-start (timeout 00:04:35) [common]
334 00:40:33.707653 Setting prompt string to 'Starting depthcharge on Juniper...'
335 00:40:33.708093 Changing prompt to 'Starting depthcharge on Juniper...'
336 00:40:33.708441 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
337 00:40:33.710463 [Enter `^Ec?' for help]
338 00:40:33.710877 [DL] 00000000 00000000 010701
339 00:40:33.711289
340 00:40:33.711645
341 00:40:33.712103 F0: 102B 0000
342 00:40:33.712445
343 00:40:33.712764 F3: 1006 0033 [0200]
344 00:40:33.713076
345 00:40:33.713560 F3: 4001 00E0 [0200]
346 00:40:33.713967
347 00:40:33.714338 F3: 0000 0000
348 00:40:33.714708
349 00:40:33.715104 V0: 0000 0000 [0001]
350 00:40:33.715451
351 00:40:33.715982 00: 1027 0002
352 00:40:33.716309
353 00:40:33.716681 01: 0000 0000
354 00:40:33.716982
355 00:40:33.717351 BP: 0C00 0251 [0000]
356 00:40:33.717774
357 00:40:33.718156 G0: 1182 0000
358 00:40:33.718448
359 00:40:33.718732 EC: 0004 0000 [0001]
360 00:40:33.719145
361 00:40:33.719450 S7: 0000 0000 [0000]
362 00:40:33.719739
363 00:40:33.720153 CC: 0000 0000 [0001]
364 00:40:33.720453
365 00:40:33.720731 T0: 0000 00DB [000F]
366 00:40:33.721094
367 00:40:33.721424 Jump to BL
368 00:40:33.721710
369 00:40:33.722128
370 00:40:33.722418
371 00:40:33.722701 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
372 00:40:33.723000 ARM64: Exception handlers installed.
373 00:40:33.723286 ARM64: Testing exception
374 00:40:33.723677 ARM64: Done test exception
375 00:40:33.724131 WDT: Last reset was cold boot
376 00:40:33.724438 SPI0(PAD0) initialized at 992727 Hz
377 00:40:33.724722 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
378 00:40:33.725007 Manufacturer: ef
379 00:40:33.725332 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
380 00:40:33.725753 Probing TPM: . done!
381 00:40:33.726043 TPM ready after 0 ms
382 00:40:33.726582 Connected to device vid:did:rid of 1ae0:0028:00
383 00:40:33.726898 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
384 00:40:33.727201 Initialized TPM device CR50 revision 0
385 00:40:33.727480 tlcl_send_startup: Startup return code is 0
386 00:40:33.727828 TPM: setup succeeded
387 00:40:33.728293 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
388 00:40:33.728799 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
389 00:40:33.729305 in-header: 03 19 00 00 08 00 00 00
390 00:40:33.729807 in-data: a2 e0 47 00 13 00 00 00
391 00:40:33.730250 Chrome EC: UHEPI supported
392 00:40:33.730689 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
393 00:40:33.731129 in-header: 03 a1 00 00 08 00 00 00
394 00:40:33.731562 in-data: 84 60 60 10 00 00 00 00
395 00:40:33.731990 Phase 1
396 00:40:33.732478 FMAP: area GBB found @ 3f5000 (12032 bytes)
397 00:40:33.732939 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
398 00:40:33.733391 VB2:vb2_check_recovery() Recovery was requested manually
399 00:40:33.733626 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
400 00:40:33.733830 Recovery requested (1009000e)
401 00:40:33.734030 tlcl_extend: response is 0
402 00:40:33.734228 tlcl_extend: response is 0
403 00:40:33.734425
404 00:40:33.734621
405 00:40:33.734819 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
406 00:40:33.735087 ARM64: Exception handlers installed.
407 00:40:33.735305 ARM64: Testing exception
408 00:40:33.735504 ARM64: Done test exception
409 00:40:33.735701 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2033
410 00:40:33.735900 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
411 00:40:33.736098 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
412 00:40:33.736293 [RTC]rtc_get_frequency_meter,134: input=0xf, output=861
413 00:40:33.736492 [RTC]rtc_get_frequency_meter,134: input=0x7, output=735
414 00:40:33.736691 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
415 00:40:33.736888 [RTC]rtc_get_frequency_meter,134: input=0x9, output=764
416 00:40:33.737085 [RTC]rtc_get_frequency_meter,134: input=0xa, output=780
417 00:40:33.737299 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
418 00:40:33.737500 [RTC]rtc_get_frequency_meter,134: input=0xb, output=796
419 00:40:33.737696 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
420 00:40:33.737957 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
421 00:40:33.738162 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
422 00:40:33.738479 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
423 00:40:33.738639 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
424 00:40:33.738790 in-header: 03 19 00 00 08 00 00 00
425 00:40:33.738940 in-data: a2 e0 47 00 13 00 00 00
426 00:40:33.739089 Chrome EC: UHEPI supported
427 00:40:33.739238 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
428 00:40:33.739388 in-header: 03 a1 00 00 08 00 00 00
429 00:40:33.739537 in-data: 84 60 60 10 00 00 00 00
430 00:40:33.739684 Skip loading cached calibration data
431 00:40:33.739832 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
432 00:40:33.739980 in-header: 03 a1 00 00 08 00 00 00
433 00:40:33.740128 in-data: 84 60 60 10 00 00 00 00
434 00:40:33.740276 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
435 00:40:33.740424 in-header: 03 a1 00 00 08 00 00 00
436 00:40:33.740571 in-data: 84 60 60 10 00 00 00 00
437 00:40:33.740715 ADC[3]: Raw value=1034274 ID=8
438 00:40:33.740862 Manufacturer: ef
439 00:40:33.741008 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
440 00:40:33.741157 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
441 00:40:33.741326 CBFS @ 21000 size 3d4000
442 00:40:33.741479 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
443 00:40:33.741629 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
444 00:40:33.741779 CBFS: Found @ offset 3c880 size 4b
445 00:40:33.741926 DRAM-K: Full Calibration
446 00:40:33.742128 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
447 00:40:33.742293 CBFS @ 21000 size 3d4000
448 00:40:33.742441 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
449 00:40:33.742590 CBFS: Locating 'fallback/dram'
450 00:40:33.742737 CBFS: Found @ offset 24b00 size 12268
451 00:40:33.742886 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
452 00:40:33.743035 ddr_geometry: 1, config: 0x0
453 00:40:33.743182 header.status = 0x0
454 00:40:33.743329 header.magic = 0x44524d4b (expected: 0x44524d4b)
455 00:40:33.743470 header.version = 0x5 (expected: 0x5)
456 00:40:33.743842 header.size = 0x8f0 (expected: 0x8f0)
457 00:40:33.744147 header.config = 0x0
458 00:40:33.744458 header.flags = 0x0
459 00:40:33.744756 header.checksum = 0x0
460 00:40:33.745048 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
461 00:40:33.745367 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
462 00:40:33.745662 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
463 00:40:33.745956 ddr_geometry:1
464 00:40:33.746199 [EMI] new MDL number = 1
465 00:40:33.746330 dram_cbt_mode_extern: 0
466 00:40:33.746453 dram_cbt_mode [RK0]: 0, [RK1]: 0
467 00:40:33.746574 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
468 00:40:33.746695
469 00:40:33.746813
470 00:40:33.746939 [Bianco] ETT version 0.0.0.1
471 00:40:33.747088 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
472 00:40:33.747210
473 00:40:33.747328 vSetVcoreByFreq with vcore:762500, freq=1600
474 00:40:33.747453
475 00:40:33.747570 [DramcInit]
476 00:40:33.747688 AutoRefreshCKEOff AutoREF OFF
477 00:40:33.747806 DDRPhyPLLSetting-CKEOFF
478 00:40:33.747924 DDRPhyPLLSetting-CKEON
479 00:40:33.748057
480 00:40:33.748183 Enable WDQS
481 00:40:33.748304 [ModeRegInit_LP4] CH0 RK0
482 00:40:33.748428 Write Rank0 MR13 =0x18
483 00:40:33.748533 Write Rank0 MR12 =0x5d
484 00:40:33.748643 Write Rank0 MR1 =0x56
485 00:40:33.748751 Write Rank0 MR2 =0x1a
486 00:40:33.748851 Write Rank0 MR11 =0x0
487 00:40:33.748949 Write Rank0 MR22 =0x38
488 00:40:33.749048 Write Rank0 MR14 =0x5d
489 00:40:33.749146 Write Rank0 MR3 =0x30
490 00:40:33.749244 Write Rank0 MR13 =0x58
491 00:40:33.749360 Write Rank0 MR12 =0x5d
492 00:40:33.749459 Write Rank0 MR1 =0x56
493 00:40:33.749558 Write Rank0 MR2 =0x2d
494 00:40:33.749656 Write Rank0 MR11 =0x23
495 00:40:33.749763 Write Rank0 MR22 =0x34
496 00:40:33.749867 Write Rank0 MR14 =0x10
497 00:40:33.749966 Write Rank0 MR3 =0x30
498 00:40:33.750064 Write Rank0 MR13 =0xd8
499 00:40:33.750162 [ModeRegInit_LP4] CH0 RK1
500 00:40:33.750266 Write Rank1 MR13 =0x18
501 00:40:33.750376 Write Rank1 MR12 =0x5d
502 00:40:33.750480 Write Rank1 MR1 =0x56
503 00:40:33.750586 Write Rank1 MR2 =0x1a
504 00:40:33.750708 Write Rank1 MR11 =0x0
505 00:40:33.750831 Write Rank1 MR22 =0x38
506 00:40:33.751001 Write Rank1 MR14 =0x5d
507 00:40:33.751157 Write Rank1 MR3 =0x30
508 00:40:33.751317 Write Rank1 MR13 =0x58
509 00:40:33.751488 Write Rank1 MR12 =0x5d
510 00:40:33.751644 Write Rank1 MR1 =0x56
511 00:40:33.751798 Write Rank1 MR2 =0x2d
512 00:40:33.751952 Write Rank1 MR11 =0x23
513 00:40:33.752106 Write Rank1 MR22 =0x34
514 00:40:33.752260 Write Rank1 MR14 =0x10
515 00:40:33.752413 Write Rank1 MR3 =0x30
516 00:40:33.752567 Write Rank1 MR13 =0xd8
517 00:40:33.752721 [ModeRegInit_LP4] CH1 RK0
518 00:40:33.752875 Write Rank0 MR13 =0x18
519 00:40:33.753029 Write Rank0 MR12 =0x5d
520 00:40:33.753182 Write Rank0 MR1 =0x56
521 00:40:33.753351 Write Rank0 MR2 =0x1a
522 00:40:33.753502 Write Rank0 MR11 =0x0
523 00:40:33.753635 Write Rank0 MR22 =0x38
524 00:40:33.753767 Write Rank0 MR14 =0x5d
525 00:40:33.753898 Write Rank0 MR3 =0x30
526 00:40:33.754030 Write Rank0 MR13 =0x58
527 00:40:33.754162 Write Rank0 MR12 =0x5d
528 00:40:33.754294 Write Rank0 MR1 =0x56
529 00:40:33.754426 Write Rank0 MR2 =0x2d
530 00:40:33.754558 Write Rank0 MR11 =0x23
531 00:40:33.754689 Write Rank0 MR22 =0x34
532 00:40:33.754820 Write Rank0 MR14 =0x10
533 00:40:33.754952 Write Rank0 MR3 =0x30
534 00:40:33.755084 Write Rank0 MR13 =0xd8
535 00:40:33.755205 [ModeRegInit_LP4] CH1 RK1
536 00:40:33.755433 Write Rank1 MR13 =0x18
537 00:40:33.755590 Write Rank1 MR12 =0x5d
538 00:40:33.755685 Write Rank1 MR1 =0x56
539 00:40:33.755774 Write Rank1 MR2 =0x1a
540 00:40:33.755860 Write Rank1 MR11 =0x0
541 00:40:33.755945 Write Rank1 MR22 =0x38
542 00:40:33.756030 Write Rank1 MR14 =0x5d
543 00:40:33.756115 Write Rank1 MR3 =0x30
544 00:40:33.756200 Write Rank1 MR13 =0x58
545 00:40:33.756285 Write Rank1 MR12 =0x5d
546 00:40:33.756369 Write Rank1 MR1 =0x56
547 00:40:33.756453 Write Rank1 MR2 =0x2d
548 00:40:33.756537 Write Rank1 MR11 =0x23
549 00:40:33.756621 Write Rank1 MR22 =0x34
550 00:40:33.756705 Write Rank1 MR14 =0x10
551 00:40:33.756790 Write Rank1 MR3 =0x30
552 00:40:33.756874 Write Rank1 MR13 =0xd8
553 00:40:33.756959 match AC timing 3
554 00:40:33.757043 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
555 00:40:33.757130 [MiockJmeterHQA]
556 00:40:33.757214 vSetVcoreByFreq with vcore:762500, freq=1600
557 00:40:33.757316
558 00:40:33.757402 MIOCK jitter meter ch=0
559 00:40:33.757488
560 00:40:33.757572 1T = (99-17) = 82 dly cells
561 00:40:33.757659 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
562 00:40:33.757746 vSetVcoreByFreq with vcore:725000, freq=1200
563 00:40:33.757831
564 00:40:33.757917 MIOCK jitter meter ch=0
565 00:40:33.758000
566 00:40:33.758084 1T = (94-16) = 78 dly cells
567 00:40:33.758170 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
568 00:40:33.758254 vSetVcoreByFreq with vcore:725000, freq=800
569 00:40:33.758338
570 00:40:33.758433 MIOCK jitter meter ch=0
571 00:40:33.758507
572 00:40:33.758580 1T = (94-16) = 78 dly cells
573 00:40:33.758656 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
574 00:40:33.758730 vSetVcoreByFreq with vcore:762500, freq=1600
575 00:40:33.758805 vSetVcoreByFreq with vcore:762500, freq=1600
576 00:40:33.758879
577 00:40:33.758952 K DRVP
578 00:40:33.759027 1. OCD DRVP=0 CALOUT=0
579 00:40:33.759103 1. OCD DRVP=1 CALOUT=0
580 00:40:33.759179 1. OCD DRVP=2 CALOUT=0
581 00:40:33.759255 1. OCD DRVP=3 CALOUT=0
582 00:40:33.759330 1. OCD DRVP=4 CALOUT=0
583 00:40:33.759406 1. OCD DRVP=5 CALOUT=0
584 00:40:33.759480 1. OCD DRVP=6 CALOUT=0
585 00:40:33.759555 1. OCD DRVP=7 CALOUT=0
586 00:40:33.759630 1. OCD DRVP=8 CALOUT=0
587 00:40:33.759706 1. OCD DRVP=9 CALOUT=1
588 00:40:33.759781
589 00:40:33.759855 1. OCD DRVP calibration OK! DRVP=9
590 00:40:33.759931
591 00:40:33.760004
592 00:40:33.760077
593 00:40:33.760151 K ODTN
594 00:40:33.760224 3. OCD ODTN=0 ,CALOUT=1
595 00:40:33.760302 3. OCD ODTN=1 ,CALOUT=1
596 00:40:33.760377 3. OCD ODTN=2 ,CALOUT=1
597 00:40:33.760452 3. OCD ODTN=3 ,CALOUT=1
598 00:40:33.760528 3. OCD ODTN=4 ,CALOUT=1
599 00:40:33.760603 3. OCD ODTN=5 ,CALOUT=1
600 00:40:33.760678 3. OCD ODTN=6 ,CALOUT=1
601 00:40:33.760753 3. OCD ODTN=7 ,CALOUT=0
602 00:40:33.760828
603 00:40:33.760902 3. OCD ODTN calibration OK! ODTN=7
604 00:40:33.760977
605 00:40:33.761052 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
606 00:40:33.761126 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
607 00:40:33.761201 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
608 00:40:33.761286
609 00:40:33.761362 K DRVP
610 00:40:33.761436 1. OCD DRVP=0 CALOUT=0
611 00:40:33.761511 1. OCD DRVP=1 CALOUT=0
612 00:40:33.761587 1. OCD DRVP=2 CALOUT=0
613 00:40:33.761662 1. OCD DRVP=3 CALOUT=0
614 00:40:33.761737 1. OCD DRVP=4 CALOUT=0
615 00:40:33.761813 1. OCD DRVP=5 CALOUT=0
616 00:40:33.761887 1. OCD DRVP=6 CALOUT=0
617 00:40:33.761962 1. OCD DRVP=7 CALOUT=0
618 00:40:33.762037 1. OCD DRVP=8 CALOUT=0
619 00:40:33.762113 1. OCD DRVP=9 CALOUT=0
620 00:40:33.762394 1. OCD DRVP=10 CALOUT=1
621 00:40:33.762484
622 00:40:33.762561 1. OCD DRVP calibration OK! DRVP=10
623 00:40:33.762639
624 00:40:33.762714
625 00:40:33.762788
626 00:40:33.762862 K ODTN
627 00:40:33.762936 3. OCD ODTN=0 ,CALOUT=1
628 00:40:33.763014 3. OCD ODTN=1 ,CALOUT=1
629 00:40:33.763090 3. OCD ODTN=2 ,CALOUT=1
630 00:40:33.763166 3. OCD ODTN=3 ,CALOUT=1
631 00:40:33.763242 3. OCD ODTN=4 ,CALOUT=1
632 00:40:33.763318 3. OCD ODTN=5 ,CALOUT=1
633 00:40:33.763407 3. OCD ODTN=6 ,CALOUT=1
634 00:40:33.763477 3. OCD ODTN=7 ,CALOUT=1
635 00:40:33.763545 3. OCD ODTN=8 ,CALOUT=1
636 00:40:33.763612 3. OCD ODTN=9 ,CALOUT=1
637 00:40:33.763678 3. OCD ODTN=10 ,CALOUT=1
638 00:40:33.763746 3. OCD ODTN=11 ,CALOUT=1
639 00:40:33.763813 3. OCD ODTN=12 ,CALOUT=1
640 00:40:33.763881 3. OCD ODTN=13 ,CALOUT=1
641 00:40:33.763948 3. OCD ODTN=14 ,CALOUT=0
642 00:40:33.764015
643 00:40:33.764082 3. OCD ODTN calibration OK! ODTN=14
644 00:40:33.764148
645 00:40:33.764214 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
646 00:40:33.764281 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
647 00:40:33.764349 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
648 00:40:33.764416
649 00:40:33.764482 [DramcInit]
650 00:40:33.764548 AutoRefreshCKEOff AutoREF OFF
651 00:40:33.764613 DDRPhyPLLSetting-CKEOFF
652 00:40:33.764679 DDRPhyPLLSetting-CKEON
653 00:40:33.764757
654 00:40:33.764967 Enable WDQS
655 00:40:33.765091 ==
656 00:40:33.765202 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
657 00:40:33.765341 fsp= 1, odt_onoff= 1, Byte mode= 0
658 00:40:33.765452 ==
659 00:40:33.765558 [Duty_Offset_Calibration]
660 00:40:33.765677
661 00:40:33.765804 ===========================
662 00:40:33.765880 B0:0 B1:1 CA:1
663 00:40:33.765954 ==
664 00:40:33.766025 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
665 00:40:33.766095 fsp= 1, odt_onoff= 1, Byte mode= 0
666 00:40:33.766171 ==
667 00:40:33.766239 [Duty_Offset_Calibration]
668 00:40:33.766305
669 00:40:33.766372 ===========================
670 00:40:33.766439 B0:1 B1:2 CA:0
671 00:40:33.766506 [ModeRegInit_LP4] CH0 RK0
672 00:40:33.766574 Write Rank0 MR13 =0x18
673 00:40:33.766640 Write Rank0 MR12 =0x5d
674 00:40:33.766707 Write Rank0 MR1 =0x56
675 00:40:33.766773 Write Rank0 MR2 =0x1a
676 00:40:33.766840 Write Rank0 MR11 =0x0
677 00:40:33.766906 Write Rank0 MR22 =0x38
678 00:40:33.766972 Write Rank0 MR14 =0x5d
679 00:40:33.767039 Write Rank0 MR3 =0x30
680 00:40:33.767105 Write Rank0 MR13 =0x58
681 00:40:33.767170 Write Rank0 MR12 =0x5d
682 00:40:33.767237 Write Rank0 MR1 =0x56
683 00:40:33.767303 Write Rank0 MR2 =0x2d
684 00:40:33.767369 Write Rank0 MR11 =0x23
685 00:40:33.767434 Write Rank0 MR22 =0x34
686 00:40:33.767500 Write Rank0 MR14 =0x10
687 00:40:33.767566 Write Rank0 MR3 =0x30
688 00:40:33.767632 Write Rank0 MR13 =0xd8
689 00:40:33.767697 [ModeRegInit_LP4] CH0 RK1
690 00:40:33.767762 Write Rank1 MR13 =0x18
691 00:40:33.767828 Write Rank1 MR12 =0x5d
692 00:40:33.767895 Write Rank1 MR1 =0x56
693 00:40:33.767960 Write Rank1 MR2 =0x1a
694 00:40:33.768025 Write Rank1 MR11 =0x0
695 00:40:33.768090 Write Rank1 MR22 =0x38
696 00:40:33.768157 Write Rank1 MR14 =0x5d
697 00:40:33.768222 Write Rank1 MR3 =0x30
698 00:40:33.768288 Write Rank1 MR13 =0x58
699 00:40:33.768354 Write Rank1 MR12 =0x5d
700 00:40:33.768431 Write Rank1 MR1 =0x56
701 00:40:33.768491 Write Rank1 MR2 =0x2d
702 00:40:33.768550 Write Rank1 MR11 =0x23
703 00:40:33.768609 Write Rank1 MR22 =0x34
704 00:40:33.768668 Write Rank1 MR14 =0x10
705 00:40:33.768727 Write Rank1 MR3 =0x30
706 00:40:33.768787 Write Rank1 MR13 =0xd8
707 00:40:33.768846 [ModeRegInit_LP4] CH1 RK0
708 00:40:33.768906 Write Rank0 MR13 =0x18
709 00:40:33.768965 Write Rank0 MR12 =0x5d
710 00:40:33.769024 Write Rank0 MR1 =0x56
711 00:40:33.769083 Write Rank0 MR2 =0x1a
712 00:40:33.769143 Write Rank0 MR11 =0x0
713 00:40:33.769201 Write Rank0 MR22 =0x38
714 00:40:33.769267 Write Rank0 MR14 =0x5d
715 00:40:33.769329 Write Rank0 MR3 =0x30
716 00:40:33.769389 Write Rank0 MR13 =0x58
717 00:40:33.769449 Write Rank0 MR12 =0x5d
718 00:40:33.769508 Write Rank0 MR1 =0x56
719 00:40:33.769567 Write Rank0 MR2 =0x2d
720 00:40:33.769627 Write Rank0 MR11 =0x23
721 00:40:33.769686 Write Rank0 MR22 =0x34
722 00:40:33.769746 Write Rank0 MR14 =0x10
723 00:40:33.769805 Write Rank0 MR3 =0x30
724 00:40:33.769864 Write Rank0 MR13 =0xd8
725 00:40:33.769923 [ModeRegInit_LP4] CH1 RK1
726 00:40:33.769982 Write Rank1 MR13 =0x18
727 00:40:33.770041 Write Rank1 MR12 =0x5d
728 00:40:33.770101 Write Rank1 MR1 =0x56
729 00:40:33.770160 Write Rank1 MR2 =0x1a
730 00:40:33.770219 Write Rank1 MR11 =0x0
731 00:40:33.770278 Write Rank1 MR22 =0x38
732 00:40:33.770337 Write Rank1 MR14 =0x5d
733 00:40:33.770396 Write Rank1 MR3 =0x30
734 00:40:33.770455 Write Rank1 MR13 =0x58
735 00:40:33.770514 Write Rank1 MR12 =0x5d
736 00:40:33.770574 Write Rank1 MR1 =0x56
737 00:40:33.770632 Write Rank1 MR2 =0x2d
738 00:40:33.770691 Write Rank1 MR11 =0x23
739 00:40:33.770750 Write Rank1 MR22 =0x34
740 00:40:33.770810 Write Rank1 MR14 =0x10
741 00:40:33.770869 Write Rank1 MR3 =0x30
742 00:40:33.770928 Write Rank1 MR13 =0xd8
743 00:40:33.770987 match AC timing 3
744 00:40:33.771047 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
745 00:40:33.771108 DramC Write-DBI off
746 00:40:33.771167 DramC Read-DBI off
747 00:40:33.771227 Write Rank0 MR13 =0x59
748 00:40:33.771286 ==
749 00:40:33.771345 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
750 00:40:33.771406 fsp= 1, odt_onoff= 1, Byte mode= 0
751 00:40:33.771466 ==
752 00:40:33.771526 === u2Vref_new: 0x56 --> 0x2d
753 00:40:33.771586 === u2Vref_new: 0x58 --> 0x38
754 00:40:33.771646 === u2Vref_new: 0x5a --> 0x39
755 00:40:33.771706 === u2Vref_new: 0x5c --> 0x3c
756 00:40:33.771765 === u2Vref_new: 0x5e --> 0x3d
757 00:40:33.771825 === u2Vref_new: 0x60 --> 0xa0
758 00:40:33.771885 [CA 0] Center 33 (4~63) winsize 60
759 00:40:33.771944 [CA 1] Center 34 (5~63) winsize 59
760 00:40:33.772003 [CA 2] Center 29 (1~57) winsize 57
761 00:40:33.772063 [CA 3] Center 24 (-3~51) winsize 55
762 00:40:33.772122 [CA 4] Center 25 (-2~52) winsize 55
763 00:40:33.772181 [CA 5] Center 30 (2~58) winsize 57
764 00:40:33.772240
765 00:40:33.772299 [CATrainingPosCal] consider 1 rank data
766 00:40:33.772358 u2DelayCellTimex100 = 762/100 ps
767 00:40:33.772418 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
768 00:40:33.772477 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
769 00:40:33.772537 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
770 00:40:33.772596 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
771 00:40:33.772656 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
772 00:40:33.772714 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
773 00:40:33.772773
774 00:40:33.772832 CA PerBit enable=1, Macro0, CA PI delay=24
775 00:40:33.772892 === u2Vref_new: 0x56 --> 0x2d
776 00:40:33.772960
777 00:40:33.773064 Vref(ca) range 1: 22
778 00:40:33.773172
779 00:40:33.773275 CS Dly= 10 (41-0-32)
780 00:40:33.773340 Write Rank0 MR13 =0xd8
781 00:40:33.773402 Write Rank0 MR13 =0xd8
782 00:40:33.773473 Write Rank0 MR12 =0x56
783 00:40:33.773528 Write Rank1 MR13 =0x59
784 00:40:33.773582 ==
785 00:40:33.773941 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
786 00:40:33.774055 fsp= 1, odt_onoff= 1, Byte mode= 0
787 00:40:33.774151 ==
788 00:40:33.774242 === u2Vref_new: 0x56 --> 0x2d
789 00:40:33.774335 === u2Vref_new: 0x58 --> 0x38
790 00:40:33.774423 === u2Vref_new: 0x5a --> 0x39
791 00:40:33.774517 === u2Vref_new: 0x5c --> 0x3c
792 00:40:33.774610 === u2Vref_new: 0x5e --> 0x3d
793 00:40:33.774706 === u2Vref_new: 0x60 --> 0xa0
794 00:40:33.774793 [CA 0] Center 34 (5~63) winsize 59
795 00:40:33.774880 [CA 1] Center 34 (6~63) winsize 58
796 00:40:33.774967 [CA 2] Center 29 (0~58) winsize 59
797 00:40:33.775042 [CA 3] Center 23 (-4~51) winsize 56
798 00:40:33.775102 [CA 4] Center 24 (-3~52) winsize 56
799 00:40:33.775157 [CA 5] Center 30 (1~59) winsize 59
800 00:40:33.775212
801 00:40:33.775268 [CATrainingPosCal] consider 2 rank data
802 00:40:33.775344 u2DelayCellTimex100 = 762/100 ps
803 00:40:33.775431 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
804 00:40:33.775516 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
805 00:40:33.775602 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
806 00:40:33.775688 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
807 00:40:33.775773 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
808 00:40:33.775859 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
809 00:40:33.775943
810 00:40:33.776028 CA PerBit enable=1, Macro0, CA PI delay=24
811 00:40:33.776114 === u2Vref_new: 0x56 --> 0x2d
812 00:40:33.776198
813 00:40:33.776283 Vref(ca) range 1: 22
814 00:40:33.776367
815 00:40:33.776452 CS Dly= 11 (42-0-32)
816 00:40:33.776537 Write Rank1 MR13 =0xd8
817 00:40:33.776622 Write Rank1 MR13 =0xd8
818 00:40:33.776707 Write Rank1 MR12 =0x56
819 00:40:33.776792 [RankSwap] Rank num 2, (Multi 1), Rank 0
820 00:40:33.776877 Write Rank0 MR2 =0xad
821 00:40:33.776962 [Write Leveling]
822 00:40:33.777046 delay byte0 byte1 byte2 byte3
823 00:40:33.777131
824 00:40:33.777222 10 0 0
825 00:40:33.777403 11 0 0
826 00:40:33.777511 12 0 0
827 00:40:33.777574 13 0 0
828 00:40:33.777631 14 0 0
829 00:40:33.777688 15 0 0
830 00:40:33.777744 16 0 0
831 00:40:33.777800 17 0 0
832 00:40:33.777855 18 0 0
833 00:40:33.777916 19 0 0
834 00:40:33.777971 20 0 0
835 00:40:33.778026 21 0 0
836 00:40:33.778081 22 0 0
837 00:40:33.778136 23 0 0
838 00:40:33.778192 24 0 0
839 00:40:33.778248 25 0 0
840 00:40:33.778302 26 0 ff
841 00:40:33.778358 27 0 0
842 00:40:33.778413 28 0 0
843 00:40:33.778480 29 0 ff
844 00:40:33.778534 30 0 ff
845 00:40:33.778588 31 0 ff
846 00:40:33.778642 32 ff ff
847 00:40:33.778696 33 ff ff
848 00:40:33.778749 34 ff ff
849 00:40:33.778803 35 ff ff
850 00:40:33.778857 36 ff ff
851 00:40:33.778910 37 ff ff
852 00:40:33.778964 38 ff ff
853 00:40:33.779083 pass bytecount = 0xff (0xff: all bytes pass)
854 00:40:33.779223
855 00:40:33.779284 DQS0 dly: 32
856 00:40:33.779338 DQS1 dly: 29
857 00:40:33.779392 Write Rank0 MR2 =0x2d
858 00:40:33.779445 [RankSwap] Rank num 2, (Multi 1), Rank 0
859 00:40:33.779499 Write Rank0 MR1 =0xd6
860 00:40:33.779552 [Gating]
861 00:40:33.779605 ==
862 00:40:33.779659 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
863 00:40:33.779713 fsp= 1, odt_onoff= 1, Byte mode= 0
864 00:40:33.779767 ==
865 00:40:33.779820 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
866 00:40:33.779874 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
867 00:40:33.779929 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
868 00:40:33.779984 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
869 00:40:33.780039 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
870 00:40:33.780093 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
871 00:40:33.780147 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
872 00:40:33.780201 3 1 28 |1c1b 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
873 00:40:33.780256 3 2 0 |201 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
874 00:40:33.780310 3 2 4 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
875 00:40:33.780363 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
876 00:40:33.780417 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
877 00:40:33.780471 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
878 00:40:33.780525 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
879 00:40:33.780579 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
880 00:40:33.780633 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
881 00:40:33.780687 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
882 00:40:33.780741 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
883 00:40:33.780796 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
884 00:40:33.780850 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
885 00:40:33.780904 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
886 00:40:33.780958 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
887 00:40:33.781012 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
888 00:40:33.781066 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
889 00:40:33.781121 3 4 0 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
890 00:40:33.781175 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
891 00:40:33.781229 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
892 00:40:33.781323 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
893 00:40:33.781380 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
894 00:40:33.781434 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 00:40:33.781489 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 00:40:33.781543 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 00:40:33.781598 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 00:40:33.781651 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 00:40:33.781706 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 00:40:33.781759 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 00:40:33.781814 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 00:40:33.781868 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 00:40:33.781923 [Byte 0] Lead/lag falling Transition (3, 5, 20)
904 00:40:33.781976 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
905 00:40:33.782031 [Byte 1] Lead/lag falling Transition (3, 5, 24)
906 00:40:33.782084 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
907 00:40:33.782139 [Byte 0] Lead/lag Transition tap number (3)
908 00:40:33.782386 [Byte 1] Lead/lag Transition tap number (2)
909 00:40:33.782450 3 6 0 |403 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
910 00:40:33.782507 3 6 4 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
911 00:40:33.782563 [Byte 0]First pass (3, 6, 4)
912 00:40:33.782617 3 6 8 |4646 1010 |(0 0)(11 11) |(0 0)(0 0)| 0
913 00:40:33.782672 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
914 00:40:33.782727 [Byte 1]First pass (3, 6, 12)
915 00:40:33.782781 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
916 00:40:33.782836 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 00:40:33.782890 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 00:40:33.782944 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 00:40:33.782999 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 00:40:33.783054 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 00:40:33.783109 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 00:40:33.783163 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 00:40:33.783217 All bytes gating window > 1UI, Early break!
924 00:40:33.783271
925 00:40:33.783324 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
926 00:40:33.783378
927 00:40:33.783430 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
928 00:40:33.783483
929 00:40:33.783536
930 00:40:33.783589
931 00:40:33.783642 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
932 00:40:33.783695
933 00:40:33.783748 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
934 00:40:33.783801
935 00:40:33.783854
936 00:40:33.783906 Write Rank0 MR1 =0x56
937 00:40:33.783959
938 00:40:33.784012 best RODT dly(2T, 0.5T) = (2, 2)
939 00:40:33.784069
940 00:40:33.784122 best RODT dly(2T, 0.5T) = (2, 2)
941 00:40:33.784175 ==
942 00:40:33.784228 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
943 00:40:33.784282 fsp= 1, odt_onoff= 1, Byte mode= 0
944 00:40:33.784336 ==
945 00:40:33.784389 Start DQ dly to find pass range UseTestEngine =0
946 00:40:33.784442 x-axis: bit #, y-axis: DQ dly (-127~63)
947 00:40:33.784495 RX Vref Scan = 0
948 00:40:33.784548 -26, [0] xxxxxxxx xxxxxxxx [MSB]
949 00:40:33.784604 -25, [0] xxxxxxxx xxxxxxxx [MSB]
950 00:40:33.784659 -24, [0] xxxxxxxx xxxxxxxx [MSB]
951 00:40:33.784713 -23, [0] xxxxxxxx xxxxxxxx [MSB]
952 00:40:33.784767 -22, [0] xxxxxxxx xxxxxxxx [MSB]
953 00:40:33.784821 -21, [0] xxxxxxxx xxxxxxxx [MSB]
954 00:40:33.784876 -20, [0] xxxxxxxx xxxxxxxx [MSB]
955 00:40:33.784929 -19, [0] xxxxxxxx xxxxxxxx [MSB]
956 00:40:33.784983 -18, [0] xxxxxxxx xxxxxxxx [MSB]
957 00:40:33.785037 -17, [0] xxxxxxxx xxxxxxxx [MSB]
958 00:40:33.785091 -16, [0] xxxxxxxx xxxxxxxx [MSB]
959 00:40:33.785145 -15, [0] xxxxxxxx xxxxxxxx [MSB]
960 00:40:33.785199 -14, [0] xxxxxxxx xxxxxxxx [MSB]
961 00:40:33.785253 -13, [0] xxxxxxxx xxxxxxxx [MSB]
962 00:40:33.785350 -12, [0] xxxxxxxx xxxxxxxx [MSB]
963 00:40:33.785404 -11, [0] xxxxxxxx xxxxxxxx [MSB]
964 00:40:33.785457 -10, [0] xxxxxxxx xxxxxxxx [MSB]
965 00:40:33.785510 -9, [0] xxxxxxxx xxxxxxxx [MSB]
966 00:40:33.785564 -8, [0] xxxxxxxx xxxxxxxx [MSB]
967 00:40:33.785618 -7, [0] xxxxxxxx xxxxxxxx [MSB]
968 00:40:33.785672 -6, [0] xxxxxxxx xxxxxxxx [MSB]
969 00:40:33.785726 -5, [0] xxxxxxxx xxxxxxxx [MSB]
970 00:40:33.785779 -4, [0] xxxxxxxx xxxxxxxx [MSB]
971 00:40:33.785833 -3, [0] xxxxxxxx xxxxxxxx [MSB]
972 00:40:33.785887 -2, [0] xxxxxxxx xxxxxxxx [MSB]
973 00:40:33.785941 -1, [0] xxxxxxxx xxxxxxxx [MSB]
974 00:40:33.785995 0, [0] xxxoxoxx xxxxxxxx [MSB]
975 00:40:33.786049 1, [0] xxxoxoxx xxxoxxxx [MSB]
976 00:40:33.786103 2, [0] xxxoxoxo xxxoxoxx [MSB]
977 00:40:33.786157 3, [0] xxxoxooo oxxoxoox [MSB]
978 00:40:33.786210 4, [0] xxxoxooo ooxoxooo [MSB]
979 00:40:33.786264 5, [0] xxxoxooo ooxooooo [MSB]
980 00:40:33.786318 6, [0] xxxoxooo ooxooooo [MSB]
981 00:40:33.786372 7, [0] xooooooo ooxooooo [MSB]
982 00:40:33.786426 8, [0] xooooooo oooooooo [MSB]
983 00:40:33.786481 9, [0] xooooooo oooooooo [MSB]
984 00:40:33.786535 10, [0] xooooooo oooooooo [MSB]
985 00:40:33.786589 32, [0] oooxoooo oooooooo [MSB]
986 00:40:33.786643 33, [0] oooxoooo oooooxoo [MSB]
987 00:40:33.786696 34, [0] oooxoxxo oooooxxo [MSB]
988 00:40:33.786750 35, [0] oooxoxxx xooooxxo [MSB]
989 00:40:33.786804 36, [0] oooxoxxx xooxoxxo [MSB]
990 00:40:33.786857 37, [0] oooxoxxx xxoxxxxx [MSB]
991 00:40:33.786910 38, [0] oooxoxxx xxoxxxxx [MSB]
992 00:40:33.786964 39, [0] oooxoxxx xxoxxxxx [MSB]
993 00:40:33.787018 40, [0] oooxxxxx xxoxxxxx [MSB]
994 00:40:33.787072 41, [0] xoxxxxxx xxoxxxxx [MSB]
995 00:40:33.787126 42, [0] xxxxxxxx xxxxxxxx [MSB]
996 00:40:33.787180 iDelay=42, Bit 0, Center 25 (11 ~ 40) 30
997 00:40:33.787233 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
998 00:40:33.787286 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
999 00:40:33.787339 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
1000 00:40:33.787392 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
1001 00:40:33.787445 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
1002 00:40:33.787497 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
1003 00:40:33.787550 iDelay=42, Bit 7, Center 18 (2 ~ 34) 33
1004 00:40:33.787602 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
1005 00:40:33.787655 iDelay=42, Bit 9, Center 20 (4 ~ 36) 33
1006 00:40:33.787707 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
1007 00:40:33.787760 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
1008 00:40:33.787813 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
1009 00:40:33.787866 iDelay=42, Bit 13, Center 17 (2 ~ 32) 31
1010 00:40:33.787918 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1011 00:40:33.787971 iDelay=42, Bit 15, Center 20 (4 ~ 36) 33
1012 00:40:33.788024 ==
1013 00:40:33.788077 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1014 00:40:33.788131 fsp= 1, odt_onoff= 1, Byte mode= 0
1015 00:40:33.788184 ==
1016 00:40:33.788237 DQS Delay:
1017 00:40:33.788290 DQS0 = 0, DQS1 = 0
1018 00:40:33.788344 DQM Delay:
1019 00:40:33.788397 DQM0 = 20, DQM1 = 19
1020 00:40:33.788449 DQ Delay:
1021 00:40:33.788502 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1022 00:40:33.788555 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1023 00:40:33.788607 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
1024 00:40:33.788661 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1025 00:40:33.788723
1026 00:40:33.788779
1027 00:40:33.788832 DramC Write-DBI off
1028 00:40:33.788886 ==
1029 00:40:33.788939 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1030 00:40:33.788992 fsp= 1, odt_onoff= 1, Byte mode= 0
1031 00:40:33.789045 ==
1032 00:40:33.789098 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1033 00:40:33.789150
1034 00:40:33.789202 Begin, DQ Scan Range 925~1181
1035 00:40:33.789255
1036 00:40:33.789352
1037 00:40:33.789405 TX Vref Scan disable
1038 00:40:33.789458 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:40:33.789512 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:40:33.789756 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:40:33.789819 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:40:33.789874 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:40:33.789929 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:40:33.789982 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:40:33.790037 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:40:33.790090 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:40:33.790144 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:40:33.790199 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1049 00:40:33.790252 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1050 00:40:33.790305 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1051 00:40:33.790359 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1052 00:40:33.790413 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1053 00:40:33.790467 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1054 00:40:33.790520 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1055 00:40:33.790573 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1056 00:40:33.790627 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1057 00:40:33.790681 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1058 00:40:33.790734 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1059 00:40:33.790788 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1060 00:40:33.790842 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1061 00:40:33.790895 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1062 00:40:33.790949 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1063 00:40:33.791002 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1064 00:40:33.791084 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1065 00:40:33.791181 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1066 00:40:33.791268 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1067 00:40:33.791353 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1068 00:40:33.791431 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1069 00:40:33.791518 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1070 00:40:33.791597 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1071 00:40:33.791654 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1072 00:40:33.791708 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1073 00:40:33.791762 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1074 00:40:33.791816 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1075 00:40:33.791869 962 |3 6 2|[0] xxxxxxxx xxxoxxxx [MSB]
1076 00:40:33.791923 963 |3 6 3|[0] xxxxxxxx xxxoxxxx [MSB]
1077 00:40:33.791977 964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]
1078 00:40:33.792031 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1079 00:40:33.792084 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1080 00:40:33.792137 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1081 00:40:33.792190 968 |3 6 8|[0] xxxoxxxx ooxooooo [MSB]
1082 00:40:33.792243 969 |3 6 9|[0] xxxoxoox oooooooo [MSB]
1083 00:40:33.792297 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1084 00:40:33.792350 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1085 00:40:33.792403 972 |3 6 12|[0] xxxoooox oooooooo [MSB]
1086 00:40:33.792456 973 |3 6 13|[0] xxxooooo oooooooo [MSB]
1087 00:40:33.792510 974 |3 6 14|[0] xxoooooo oooooooo [MSB]
1088 00:40:33.792563 987 |3 6 27|[0] oooooooo oooooxoo [MSB]
1089 00:40:33.792616 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1090 00:40:33.792669 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1091 00:40:33.792722 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1092 00:40:33.792775 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1093 00:40:33.792828 992 |3 6 32|[0] oooxoxxo xxxxxxxx [MSB]
1094 00:40:33.792882 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1095 00:40:33.792935 Byte0, DQ PI dly=980, DQM PI dly= 980
1096 00:40:33.792988 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1097 00:40:33.793041
1098 00:40:33.793094 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1099 00:40:33.793147
1100 00:40:33.793199 Byte1, DQ PI dly=976, DQM PI dly= 976
1101 00:40:33.793252 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1102 00:40:33.793348
1103 00:40:33.793401 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1104 00:40:33.793453
1105 00:40:33.793506 ==
1106 00:40:33.793559 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1107 00:40:33.793613 fsp= 1, odt_onoff= 1, Byte mode= 0
1108 00:40:33.793666 ==
1109 00:40:33.793718 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1110 00:40:33.793771
1111 00:40:33.793823 Begin, DQ Scan Range 952~1016
1112 00:40:33.793876 Write Rank0 MR14 =0x0
1113 00:40:33.793928
1114 00:40:33.793980 CH=0, VrefRange= 0, VrefLevel = 0
1115 00:40:33.794033 TX Bit0 (977~993) 17 985, Bit8 (966~984) 19 975,
1116 00:40:33.794087 TX Bit1 (977~992) 16 984, Bit9 (968~984) 17 976,
1117 00:40:33.794139 TX Bit2 (976~992) 17 984, Bit10 (970~990) 21 980,
1118 00:40:33.794192 TX Bit3 (969~985) 17 977, Bit11 (965~984) 20 974,
1119 00:40:33.794245 TX Bit4 (975~992) 18 983, Bit12 (967~984) 18 975,
1120 00:40:33.794298 TX Bit5 (971~986) 16 978, Bit13 (966~983) 18 974,
1121 00:40:33.794351 TX Bit6 (972~987) 16 979, Bit14 (968~984) 17 976,
1122 00:40:33.794404 TX Bit7 (976~990) 15 983, Bit15 (970~986) 17 978,
1123 00:40:33.794457
1124 00:40:33.794509 Write Rank0 MR14 =0x2
1125 00:40:33.794561
1126 00:40:33.794613 CH=0, VrefRange= 0, VrefLevel = 2
1127 00:40:33.794665 TX Bit0 (977~993) 17 985, Bit8 (966~985) 20 975,
1128 00:40:33.794719 TX Bit1 (976~992) 17 984, Bit9 (967~984) 18 975,
1129 00:40:33.794771 TX Bit2 (976~992) 17 984, Bit10 (971~990) 20 980,
1130 00:40:33.794824 TX Bit3 (969~985) 17 977, Bit11 (965~984) 20 974,
1131 00:40:33.794877 TX Bit4 (975~993) 19 984, Bit12 (967~984) 18 975,
1132 00:40:33.794930 TX Bit5 (971~986) 16 978, Bit13 (966~983) 18 974,
1133 00:40:33.794986 TX Bit6 (972~987) 16 979, Bit14 (967~984) 18 975,
1134 00:40:33.795041 TX Bit7 (976~990) 15 983, Bit15 (970~986) 17 978,
1135 00:40:33.795111
1136 00:40:33.795278 Write Rank0 MR14 =0x4
1137 00:40:33.795382
1138 00:40:33.795472 CH=0, VrefRange= 0, VrefLevel = 4
1139 00:40:33.795560 TX Bit0 (977~994) 18 985, Bit8 (966~985) 20 975,
1140 00:40:33.795645 TX Bit1 (976~992) 17 984, Bit9 (967~985) 19 976,
1141 00:40:33.795729 TX Bit2 (976~992) 17 984, Bit10 (970~990) 21 980,
1142 00:40:33.795812 TX Bit3 (969~986) 18 977, Bit11 (965~984) 20 974,
1143 00:40:33.795896 TX Bit4 (975~993) 19 984, Bit12 (966~985) 20 975,
1144 00:40:33.795979 TX Bit5 (970~987) 18 978, Bit13 (966~984) 19 975,
1145 00:40:33.796064 TX Bit6 (971~988) 18 979, Bit14 (967~985) 19 976,
1146 00:40:33.796389 TX Bit7 (975~991) 17 983, Bit15 (969~988) 20 978,
1147 00:40:33.796497
1148 00:40:33.796588 Write Rank0 MR14 =0x6
1149 00:40:33.796674
1150 00:40:33.796761 CH=0, VrefRange= 0, VrefLevel = 6
1151 00:40:33.796846 TX Bit0 (976~994) 19 985, Bit8 (965~985) 21 975,
1152 00:40:33.796931 TX Bit1 (976~993) 18 984, Bit9 (967~986) 20 976,
1153 00:40:33.797014 TX Bit2 (976~992) 17 984, Bit10 (970~990) 21 980,
1154 00:40:33.797098 TX Bit3 (969~986) 18 977, Bit11 (964~985) 22 974,
1155 00:40:33.797182 TX Bit4 (974~993) 20 983, Bit12 (966~985) 20 975,
1156 00:40:33.797269 TX Bit5 (970~987) 18 978, Bit13 (966~984) 19 975,
1157 00:40:33.797357 TX Bit6 (971~989) 19 980, Bit14 (967~985) 19 976,
1158 00:40:33.797411 TX Bit7 (975~991) 17 983, Bit15 (969~988) 20 978,
1159 00:40:33.797465
1160 00:40:33.797518 Write Rank0 MR14 =0x8
1161 00:40:33.797571
1162 00:40:33.797624 CH=0, VrefRange= 0, VrefLevel = 8
1163 00:40:33.797677 TX Bit0 (976~994) 19 985, Bit8 (965~986) 22 975,
1164 00:40:33.797731 TX Bit1 (976~993) 18 984, Bit9 (966~986) 21 976,
1165 00:40:33.797783 TX Bit2 (976~993) 18 984, Bit10 (970~991) 22 980,
1166 00:40:33.797836 TX Bit3 (969~987) 19 978, Bit11 (964~986) 23 975,
1167 00:40:33.797890 TX Bit4 (974~993) 20 983, Bit12 (966~986) 21 976,
1168 00:40:33.797943 TX Bit5 (970~988) 19 979, Bit13 (966~984) 19 975,
1169 00:40:33.797997 TX Bit6 (971~990) 20 980, Bit14 (967~986) 20 976,
1170 00:40:33.798049 TX Bit7 (975~991) 17 983, Bit15 (969~989) 21 979,
1171 00:40:33.798102
1172 00:40:33.798154 Write Rank0 MR14 =0xa
1173 00:40:33.798207
1174 00:40:33.798258 CH=0, VrefRange= 0, VrefLevel = 10
1175 00:40:33.798311 TX Bit0 (976~994) 19 985, Bit8 (965~986) 22 975,
1176 00:40:33.798364 TX Bit1 (976~993) 18 984, Bit9 (966~986) 21 976,
1177 00:40:33.798417 TX Bit2 (974~993) 20 983, Bit10 (969~991) 23 980,
1178 00:40:33.798470 TX Bit3 (969~987) 19 978, Bit11 (964~986) 23 975,
1179 00:40:33.798522 TX Bit4 (973~994) 22 983, Bit12 (966~986) 21 976,
1180 00:40:33.798575 TX Bit5 (970~989) 20 979, Bit13 (965~985) 21 975,
1181 00:40:33.798628 TX Bit6 (970~991) 22 980, Bit14 (966~987) 22 976,
1182 00:40:33.798680 TX Bit7 (974~992) 19 983, Bit15 (968~989) 22 978,
1183 00:40:33.798733
1184 00:40:33.798785 Write Rank0 MR14 =0xc
1185 00:40:33.798837
1186 00:40:33.798889 CH=0, VrefRange= 0, VrefLevel = 12
1187 00:40:33.798941 TX Bit0 (976~995) 20 985, Bit8 (964~987) 24 975,
1188 00:40:33.798995 TX Bit1 (975~994) 20 984, Bit9 (966~987) 22 976,
1189 00:40:33.799052 TX Bit2 (974~993) 20 983, Bit10 (969~991) 23 980,
1190 00:40:33.799141 TX Bit3 (968~988) 21 978, Bit11 (963~986) 24 974,
1191 00:40:33.799236 TX Bit4 (973~994) 22 983, Bit12 (965~988) 24 976,
1192 00:40:33.799320 TX Bit5 (969~990) 22 979, Bit13 (964~985) 22 974,
1193 00:40:33.799404 TX Bit6 (970~991) 22 980, Bit14 (966~988) 23 977,
1194 00:40:33.799487 TX Bit7 (974~992) 19 983, Bit15 (968~989) 22 978,
1195 00:40:33.799570
1196 00:40:33.799627 Write Rank0 MR14 =0xe
1197 00:40:33.799680
1198 00:40:33.799734 CH=0, VrefRange= 0, VrefLevel = 14
1199 00:40:33.799787 TX Bit0 (975~995) 21 985, Bit8 (963~987) 25 975,
1200 00:40:33.799840 TX Bit1 (975~994) 20 984, Bit9 (966~988) 23 977,
1201 00:40:33.799893 TX Bit2 (974~994) 21 984, Bit10 (969~991) 23 980,
1202 00:40:33.799946 TX Bit3 (968~988) 21 978, Bit11 (963~987) 25 975,
1203 00:40:33.799999 TX Bit4 (972~994) 23 983, Bit12 (965~988) 24 976,
1204 00:40:33.800052 TX Bit5 (969~990) 22 979, Bit13 (964~986) 23 975,
1205 00:40:33.800104 TX Bit6 (970~991) 22 980, Bit14 (965~989) 25 977,
1206 00:40:33.800157 TX Bit7 (974~992) 19 983, Bit15 (968~989) 22 978,
1207 00:40:33.800209
1208 00:40:33.800262 Write Rank0 MR14 =0x10
1209 00:40:33.800314
1210 00:40:33.800367 CH=0, VrefRange= 0, VrefLevel = 16
1211 00:40:33.800419 TX Bit0 (975~996) 22 985, Bit8 (963~988) 26 975,
1212 00:40:33.800472 TX Bit1 (975~994) 20 984, Bit9 (965~988) 24 976,
1213 00:40:33.800524 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
1214 00:40:33.800577 TX Bit3 (968~988) 21 978, Bit11 (962~988) 27 975,
1215 00:40:33.800643 TX Bit4 (972~995) 24 983, Bit12 (965~988) 24 976,
1216 00:40:33.800698 TX Bit5 (969~991) 23 980, Bit13 (963~986) 24 974,
1217 00:40:33.800781 TX Bit6 (970~992) 23 981, Bit14 (965~989) 25 977,
1218 00:40:33.800866 TX Bit7 (973~993) 21 983, Bit15 (968~990) 23 979,
1219 00:40:33.800948
1220 00:40:33.801030 Write Rank0 MR14 =0x12
1221 00:40:33.801114
1222 00:40:33.801218 CH=0, VrefRange= 0, VrefLevel = 18
1223 00:40:33.801310 TX Bit0 (975~996) 22 985, Bit8 (963~989) 27 976,
1224 00:40:33.801365 TX Bit1 (974~995) 22 984, Bit9 (965~989) 25 977,
1225 00:40:33.801419 TX Bit2 (973~994) 22 983, Bit10 (969~992) 24 980,
1226 00:40:33.801472 TX Bit3 (968~990) 23 979, Bit11 (962~988) 27 975,
1227 00:40:33.801526 TX Bit4 (972~996) 25 984, Bit12 (965~989) 25 977,
1228 00:40:33.801579 TX Bit5 (969~991) 23 980, Bit13 (964~987) 24 975,
1229 00:40:33.801632 TX Bit6 (969~992) 24 980, Bit14 (965~989) 25 977,
1230 00:40:33.801685 TX Bit7 (972~993) 22 982, Bit15 (968~990) 23 979,
1231 00:40:33.801738
1232 00:40:33.801790 Write Rank0 MR14 =0x14
1233 00:40:33.801842
1234 00:40:33.801894 CH=0, VrefRange= 0, VrefLevel = 20
1235 00:40:33.801947 TX Bit0 (975~997) 23 986, Bit8 (963~988) 26 975,
1236 00:40:33.801999 TX Bit1 (974~995) 22 984, Bit9 (965~989) 25 977,
1237 00:40:33.802053 TX Bit2 (973~995) 23 984, Bit10 (968~992) 25 980,
1238 00:40:33.802106 TX Bit3 (967~990) 24 978, Bit11 (962~988) 27 975,
1239 00:40:33.802158 TX Bit4 (972~996) 25 984, Bit12 (964~989) 26 976,
1240 00:40:33.802211 TX Bit5 (969~991) 23 980, Bit13 (963~988) 26 975,
1241 00:40:33.802264 TX Bit6 (969~992) 24 980, Bit14 (965~989) 25 977,
1242 00:40:33.802316 TX Bit7 (972~993) 22 982, Bit15 (967~991) 25 979,
1243 00:40:33.802368
1244 00:40:33.802419 Write Rank0 MR14 =0x16
1245 00:40:33.802471
1246 00:40:33.802523 CH=0, VrefRange= 0, VrefLevel = 22
1247 00:40:33.802576 TX Bit0 (974~998) 25 986, Bit8 (962~988) 27 975,
1248 00:40:33.802819 TX Bit1 (974~996) 23 985, Bit9 (964~989) 26 976,
1249 00:40:33.802884 TX Bit2 (973~995) 23 984, Bit10 (968~992) 25 980,
1250 00:40:33.802939 TX Bit3 (967~991) 25 979, Bit11 (962~989) 28 975,
1251 00:40:33.802992 TX Bit4 (972~996) 25 984, Bit12 (964~989) 26 976,
1252 00:40:33.803045 TX Bit5 (968~992) 25 980, Bit13 (962~988) 27 975,
1253 00:40:33.803099 TX Bit6 (969~992) 24 980, Bit14 (964~989) 26 976,
1254 00:40:33.803152 TX Bit7 (971~994) 24 982, Bit15 (967~990) 24 978,
1255 00:40:33.803204
1256 00:40:33.803256 Write Rank0 MR14 =0x18
1257 00:40:33.803309
1258 00:40:33.803362 CH=0, VrefRange= 0, VrefLevel = 24
1259 00:40:33.803415 TX Bit0 (974~998) 25 986, Bit8 (962~987) 26 974,
1260 00:40:33.803467 TX Bit1 (973~996) 24 984, Bit9 (965~989) 25 977,
1261 00:40:33.803521 TX Bit2 (972~996) 25 984, Bit10 (968~992) 25 980,
1262 00:40:33.803574 TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975,
1263 00:40:33.803626 TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976,
1264 00:40:33.803679 TX Bit5 (968~992) 25 980, Bit13 (962~988) 27 975,
1265 00:40:33.803732 TX Bit6 (969~992) 24 980, Bit14 (964~989) 26 976,
1266 00:40:33.803785 TX Bit7 (971~994) 24 982, Bit15 (967~991) 25 979,
1267 00:40:33.803837
1268 00:40:33.803889 Write Rank0 MR14 =0x1a
1269 00:40:33.803941
1270 00:40:33.803993 CH=0, VrefRange= 0, VrefLevel = 26
1271 00:40:33.804046 TX Bit0 (974~998) 25 986, Bit8 (962~987) 26 974,
1272 00:40:33.804099 TX Bit1 (973~996) 24 984, Bit9 (965~989) 25 977,
1273 00:40:33.804151 TX Bit2 (972~996) 25 984, Bit10 (968~992) 25 980,
1274 00:40:33.804204 TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975,
1275 00:40:33.804256 TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976,
1276 00:40:33.804309 TX Bit5 (968~992) 25 980, Bit13 (962~988) 27 975,
1277 00:40:33.804362 TX Bit6 (969~992) 24 980, Bit14 (964~989) 26 976,
1278 00:40:33.804414 TX Bit7 (971~994) 24 982, Bit15 (967~991) 25 979,
1279 00:40:33.804467
1280 00:40:33.804519 Write Rank0 MR14 =0x1c
1281 00:40:33.804571
1282 00:40:33.804623 CH=0, VrefRange= 0, VrefLevel = 28
1283 00:40:33.804675 TX Bit0 (974~998) 25 986, Bit8 (962~987) 26 974,
1284 00:40:33.804727 TX Bit1 (973~996) 24 984, Bit9 (965~989) 25 977,
1285 00:40:33.804780 TX Bit2 (972~996) 25 984, Bit10 (968~992) 25 980,
1286 00:40:33.804833 TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975,
1287 00:40:33.804885 TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976,
1288 00:40:33.804938 TX Bit5 (968~992) 25 980, Bit13 (962~988) 27 975,
1289 00:40:33.804991 TX Bit6 (969~992) 24 980, Bit14 (964~989) 26 976,
1290 00:40:33.805043 TX Bit7 (971~994) 24 982, Bit15 (967~991) 25 979,
1291 00:40:33.805096
1292 00:40:33.805179 Write Rank0 MR14 =0x1e
1293 00:40:33.805267
1294 00:40:33.805382 CH=0, VrefRange= 0, VrefLevel = 30
1295 00:40:33.805464 TX Bit0 (974~998) 25 986, Bit8 (962~987) 26 974,
1296 00:40:33.805562 TX Bit1 (973~996) 24 984, Bit9 (965~989) 25 977,
1297 00:40:33.805619 TX Bit2 (972~996) 25 984, Bit10 (968~992) 25 980,
1298 00:40:33.805700 TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975,
1299 00:40:33.805768 TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976,
1300 00:40:33.805821 TX Bit5 (968~992) 25 980, Bit13 (962~988) 27 975,
1301 00:40:33.805874 TX Bit6 (969~992) 24 980, Bit14 (964~989) 26 976,
1302 00:40:33.805927 TX Bit7 (971~994) 24 982, Bit15 (967~991) 25 979,
1303 00:40:33.805979
1304 00:40:33.806031
1305 00:40:33.806083 TX Vref found, early break! 376< 384
1306 00:40:33.806137 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1307 00:40:33.806190 u1DelayCellOfst[0]=8 cells (7 PI)
1308 00:40:33.806242 u1DelayCellOfst[1]=6 cells (5 PI)
1309 00:40:33.806295 u1DelayCellOfst[2]=6 cells (5 PI)
1310 00:40:33.806348 u1DelayCellOfst[3]=0 cells (0 PI)
1311 00:40:33.806400 u1DelayCellOfst[4]=6 cells (5 PI)
1312 00:40:33.806452 u1DelayCellOfst[5]=1 cells (1 PI)
1313 00:40:33.806504 u1DelayCellOfst[6]=1 cells (1 PI)
1314 00:40:33.806556 u1DelayCellOfst[7]=3 cells (3 PI)
1315 00:40:33.806609 Byte0, DQ PI dly=979, DQM PI dly= 982
1316 00:40:33.806661 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1317 00:40:33.806714
1318 00:40:33.806767 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1319 00:40:33.806820
1320 00:40:33.806872 u1DelayCellOfst[8]=0 cells (0 PI)
1321 00:40:33.806925 u1DelayCellOfst[9]=3 cells (3 PI)
1322 00:40:33.806977 u1DelayCellOfst[10]=7 cells (6 PI)
1323 00:40:33.807029 u1DelayCellOfst[11]=1 cells (1 PI)
1324 00:40:33.807080 u1DelayCellOfst[12]=2 cells (2 PI)
1325 00:40:33.807132 u1DelayCellOfst[13]=1 cells (1 PI)
1326 00:40:33.807184 u1DelayCellOfst[14]=2 cells (2 PI)
1327 00:40:33.807236 u1DelayCellOfst[15]=6 cells (5 PI)
1328 00:40:33.807288 Byte1, DQ PI dly=974, DQM PI dly= 977
1329 00:40:33.807341 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1330 00:40:33.807394
1331 00:40:33.807446 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1332 00:40:33.807498
1333 00:40:33.807549 wait MRW command Rank0 MR14 =0x18 fired (1)
1334 00:40:33.807601 Write Rank0 MR14 =0x18
1335 00:40:33.807652
1336 00:40:33.807704 Final TX Range 0 Vref 24
1337 00:40:33.807756
1338 00:40:33.807808 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1339 00:40:33.807860
1340 00:40:33.807911 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1341 00:40:33.807963 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1342 00:40:33.808015 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1343 00:40:33.808067 Write Rank0 MR3 =0xb0
1344 00:40:33.808119 DramC Write-DBI on
1345 00:40:33.808170 ==
1346 00:40:33.808222 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1347 00:40:33.808274 fsp= 1, odt_onoff= 1, Byte mode= 0
1348 00:40:33.808327 ==
1349 00:40:33.808379 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1350 00:40:33.808430
1351 00:40:33.808481 Begin, DQ Scan Range 697~761
1352 00:40:33.808533
1353 00:40:33.808584
1354 00:40:33.808635 TX Vref Scan disable
1355 00:40:33.808686 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1356 00:40:33.808740 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1357 00:40:33.808793 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1358 00:40:33.808846 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1359 00:40:33.809141 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1360 00:40:33.809253 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1361 00:40:33.809336 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1362 00:40:33.809394 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1363 00:40:33.809450 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1364 00:40:33.809505 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1365 00:40:33.809559 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1366 00:40:33.809613 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1367 00:40:33.809666 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1368 00:40:33.809719 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1369 00:40:33.809772 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1370 00:40:33.809826 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1371 00:40:33.809879 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1372 00:40:33.809932 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1373 00:40:33.809984 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1374 00:40:33.810037 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1375 00:40:33.810089 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1376 00:40:33.810142 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1377 00:40:33.810195 739 |2 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1378 00:40:33.810248 Byte0, DQ PI dly=726, DQM PI dly= 726
1379 00:40:33.810300 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
1380 00:40:33.810352
1381 00:40:33.810404 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
1382 00:40:33.810457
1383 00:40:33.810509 Byte1, DQ PI dly=719, DQM PI dly= 719
1384 00:40:33.810575 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1385 00:40:33.810629
1386 00:40:33.810782 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1387 00:40:33.810901
1388 00:40:33.810980 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1389 00:40:33.811036 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1390 00:40:33.811098 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1391 00:40:33.811165 Write Rank0 MR3 =0x30
1392 00:40:33.811249 DramC Write-DBI off
1393 00:40:33.811330
1394 00:40:33.811411 [DATLAT]
1395 00:40:33.811493 Freq=1600, CH0 RK0, use_rxtx_scan=0
1396 00:40:33.811575
1397 00:40:33.811657 DATLAT Default: 0xf
1398 00:40:33.811738 7, 0xFFFF, sum=0
1399 00:40:33.811822 8, 0xFFFF, sum=0
1400 00:40:33.811905 9, 0xFFFF, sum=0
1401 00:40:33.811988 10, 0xFFFF, sum=0
1402 00:40:33.812072 11, 0xFFFF, sum=0
1403 00:40:33.812155 12, 0xFFFF, sum=0
1404 00:40:33.812238 13, 0xFFFF, sum=0
1405 00:40:33.812322 14, 0x0, sum=1
1406 00:40:33.812405 15, 0x0, sum=2
1407 00:40:33.812488 16, 0x0, sum=3
1408 00:40:33.812571 17, 0x0, sum=4
1409 00:40:33.812655 pattern=2 first_step=14 total pass=5 best_step=16
1410 00:40:33.812738 ==
1411 00:40:33.812827 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1412 00:40:33.812920 fsp= 1, odt_onoff= 1, Byte mode= 0
1413 00:40:33.813003 ==
1414 00:40:33.813086 Start DQ dly to find pass range UseTestEngine =1
1415 00:40:33.813169 x-axis: bit #, y-axis: DQ dly (-127~63)
1416 00:40:33.813250 RX Vref Scan = 1
1417 00:40:33.813382
1418 00:40:33.813465 RX Vref found, early break!
1419 00:40:33.813546
1420 00:40:33.813629 Final RX Vref 12, apply to both rank0 and 1
1421 00:40:33.813693 ==
1422 00:40:33.813746 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1423 00:40:33.813798 fsp= 1, odt_onoff= 1, Byte mode= 0
1424 00:40:33.813851 ==
1425 00:40:33.813903 DQS Delay:
1426 00:40:33.813956 DQS0 = 0, DQS1 = 0
1427 00:40:33.814008 DQM Delay:
1428 00:40:33.814060 DQM0 = 20, DQM1 = 19
1429 00:40:33.814112 DQ Delay:
1430 00:40:33.814164 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =15
1431 00:40:33.814216 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1432 00:40:33.814267 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1433 00:40:33.814319 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1434 00:40:33.814371
1435 00:40:33.814422
1436 00:40:33.814473
1437 00:40:33.814524 [DramC_TX_OE_Calibration] TA2
1438 00:40:33.814575 Original DQ_B0 (3 6) =30, OEN = 27
1439 00:40:33.814628 Original DQ_B1 (3 6) =30, OEN = 27
1440 00:40:33.814680 23, 0x0, End_B0=23 End_B1=23
1441 00:40:33.814733 24, 0x0, End_B0=24 End_B1=24
1442 00:40:33.814785 25, 0x0, End_B0=25 End_B1=25
1443 00:40:33.814838 26, 0x0, End_B0=26 End_B1=26
1444 00:40:33.814890 27, 0x0, End_B0=27 End_B1=27
1445 00:40:33.814943 28, 0x0, End_B0=28 End_B1=28
1446 00:40:33.814995 29, 0x0, End_B0=29 End_B1=29
1447 00:40:33.815048 30, 0x0, End_B0=30 End_B1=30
1448 00:40:33.815100 31, 0xFFFF, End_B0=30 End_B1=30
1449 00:40:33.815153 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1450 00:40:33.815205 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1451 00:40:33.815258
1452 00:40:33.815310
1453 00:40:33.815361 Write Rank0 MR23 =0x3f
1454 00:40:33.815413 [DQSOSC]
1455 00:40:33.815465 [DQSOSCAuto] RK0, (LSB)MR18= 0xae, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
1456 00:40:33.815518 CH0_RK0: MR19=0x3, MR18=0xAE, DQSOSC=334, MR23=63, INC=22, DEC=33
1457 00:40:33.815570 Write Rank0 MR23 =0x3f
1458 00:40:33.815622 [DQSOSC]
1459 00:40:33.815673 [DQSOSCAuto] RK0, (LSB)MR18= 0xab, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1460 00:40:33.815732 CH0 RK0: MR19=3, MR18=AB
1461 00:40:33.815794 [RankSwap] Rank num 2, (Multi 1), Rank 1
1462 00:40:33.815847 Write Rank0 MR2 =0xad
1463 00:40:33.815898 [Write Leveling]
1464 00:40:33.815949 delay byte0 byte1 byte2 byte3
1465 00:40:33.816001
1466 00:40:33.816053 10 0 0
1467 00:40:33.816106 11 0 0
1468 00:40:33.816159 12 0 0
1469 00:40:33.816211 13 0 0
1470 00:40:33.816263 14 0 0
1471 00:40:33.816316 15 0 0
1472 00:40:33.816368 16 0 0
1473 00:40:33.816421 17 0 0
1474 00:40:33.816473 18 0 0
1475 00:40:33.816525 19 0 0
1476 00:40:33.816578 20 0 0
1477 00:40:33.816630 21 0 0
1478 00:40:33.816683 22 0 0
1479 00:40:33.816736 23 0 0
1480 00:40:33.816788 24 0 0
1481 00:40:33.816840 25 0 0
1482 00:40:33.816924 26 0 0
1483 00:40:33.817007 27 0 0
1484 00:40:33.817091 28 0 0
1485 00:40:33.817173 29 0 0
1486 00:40:33.817264 30 0 ff
1487 00:40:33.817355 31 0 ff
1488 00:40:33.817409 32 0 ff
1489 00:40:33.817462 33 0 ff
1490 00:40:33.817514 34 ff ff
1491 00:40:33.817567 35 ff ff
1492 00:40:33.817620 36 ff ff
1493 00:40:33.817672 37 ff ff
1494 00:40:33.817724 38 ff ff
1495 00:40:33.817777 39 ff ff
1496 00:40:33.817830 40 ff ff
1497 00:40:33.817882 pass bytecount = 0xff (0xff: all bytes pass)
1498 00:40:33.817935
1499 00:40:33.817987 DQS0 dly: 34
1500 00:40:33.818038 DQS1 dly: 30
1501 00:40:33.818090 Write Rank0 MR2 =0x2d
1502 00:40:33.818142 [RankSwap] Rank num 2, (Multi 1), Rank 0
1503 00:40:33.818194 Write Rank1 MR1 =0xd6
1504 00:40:33.818245 [Gating]
1505 00:40:33.818297 ==
1506 00:40:33.818348 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1507 00:40:33.818401 fsp= 1, odt_onoff= 1, Byte mode= 0
1508 00:40:33.818453 ==
1509 00:40:33.818505 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1510 00:40:33.818807 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1511 00:40:33.818936 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0
1512 00:40:33.819012 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1513 00:40:33.819073 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1514 00:40:33.819133 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1515 00:40:33.819192 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1516 00:40:33.819247 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1517 00:40:33.819302 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1518 00:40:33.819358 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1519 00:40:33.819412 3 2 8 |1818 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1520 00:40:33.819471 3 2 12 |606 2c2b |(11 11)(11 1) |(0 0)(0 0)| 0
1521 00:40:33.819559 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1522 00:40:33.819644 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1523 00:40:33.819769 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1524 00:40:33.819869 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1525 00:40:33.819957 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1526 00:40:33.820043 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1527 00:40:33.820126 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1528 00:40:33.820211 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1529 00:40:33.820295 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1530 00:40:33.820379 [Byte 1] Lead/lag falling Transition (3, 3, 16)
1531 00:40:33.820461 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1532 00:40:33.820546 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1533 00:40:33.820630 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1534 00:40:33.820714 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1535 00:40:33.820797 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1536 00:40:33.820882 3 4 8 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1537 00:40:33.820965 3 4 12 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1538 00:40:33.821050 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1539 00:40:33.821133 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1540 00:40:33.821217 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 00:40:33.821324 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1542 00:40:33.821393 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 00:40:33.821446 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 00:40:33.821499 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1545 00:40:33.821551 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1546 00:40:33.821605 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1547 00:40:33.821657 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1548 00:40:33.821711 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 00:40:33.821763 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 00:40:33.821816 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 00:40:33.821869 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1552 00:40:33.821921 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1553 00:40:33.821973 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1554 00:40:33.822025 [Byte 0] Lead/lag Transition tap number (2)
1555 00:40:33.822077 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1556 00:40:33.822130 [Byte 1] Lead/lag Transition tap number (3)
1557 00:40:33.822182 3 6 12 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1558 00:40:33.822235 3 6 16 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
1559 00:40:33.822288 [Byte 0]First pass (3, 6, 16)
1560 00:40:33.822341 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1561 00:40:33.822394 [Byte 1]First pass (3, 6, 20)
1562 00:40:33.822445 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1563 00:40:33.822497 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1564 00:40:33.822550 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1565 00:40:33.822603 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1566 00:40:33.822657 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1567 00:40:33.822710 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1568 00:40:33.822764 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1569 00:40:33.822816 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1570 00:40:33.822869 All bytes gating window > 1UI, Early break!
1571 00:40:33.822921
1572 00:40:33.822973 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1573 00:40:33.823025
1574 00:40:33.823076 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1575 00:40:33.823128
1576 00:40:33.823179
1577 00:40:33.823230
1578 00:40:33.823281 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1579 00:40:33.823333
1580 00:40:33.823384 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1581 00:40:33.823435
1582 00:40:33.823486
1583 00:40:33.823537 Write Rank1 MR1 =0x56
1584 00:40:33.823588
1585 00:40:33.823639 best RODT dly(2T, 0.5T) = (2, 3)
1586 00:40:33.823706
1587 00:40:33.823759 best RODT dly(2T, 0.5T) = (2, 3)
1588 00:40:33.823812 ==
1589 00:40:33.823878 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1590 00:40:33.823933 fsp= 1, odt_onoff= 1, Byte mode= 0
1591 00:40:33.823986 ==
1592 00:40:33.824038 Start DQ dly to find pass range UseTestEngine =0
1593 00:40:33.824090 x-axis: bit #, y-axis: DQ dly (-127~63)
1594 00:40:33.824142 RX Vref Scan = 0
1595 00:40:33.824194 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1596 00:40:33.824261 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1597 00:40:33.824334 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1598 00:40:33.824389 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1599 00:40:33.824441 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1600 00:40:33.824494 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1601 00:40:33.824547 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1602 00:40:33.824600 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1603 00:40:33.824653 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1604 00:40:33.824721 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1605 00:40:33.824777 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1606 00:40:33.824830 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1607 00:40:33.824911 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1608 00:40:33.824996 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1609 00:40:33.825085 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1610 00:40:33.825171 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1611 00:40:33.825255 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1612 00:40:33.825368 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1613 00:40:33.825453 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1614 00:40:33.825733 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1615 00:40:33.825824 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1616 00:40:33.825909 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1617 00:40:33.825993 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1618 00:40:33.826077 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:40:33.826160 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1620 00:40:33.826243 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1621 00:40:33.826326 0, [0] xxxxxxxx xxxoxxxx [MSB]
1622 00:40:33.826410 1, [0] xxxoxoxx oxxoxoox [MSB]
1623 00:40:33.826494 2, [0] xxxoxoxx ooxoooox [MSB]
1624 00:40:33.826577 3, [0] xxxoxooo ooxoooox [MSB]
1625 00:40:33.826680 4, [0] xxxoxooo ooxooooo [MSB]
1626 00:40:33.826746 5, [0] xxxoxooo oooooooo [MSB]
1627 00:40:33.826800 6, [0] xxxoxooo oooooooo [MSB]
1628 00:40:33.826854 7, [0] xooooooo oooooooo [MSB]
1629 00:40:33.826907 8, [0] xooooooo oooooooo [MSB]
1630 00:40:33.826960 9, [0] xooooooo oooooooo [MSB]
1631 00:40:33.827012 33, [0] oooooooo oooooooo [MSB]
1632 00:40:33.827066 34, [0] oooxoooo oooooxoo [MSB]
1633 00:40:33.827118 35, [0] oooxooxo oooooxxo [MSB]
1634 00:40:33.827171 36, [0] oooxooxx xooxoxxo [MSB]
1635 00:40:33.827224 37, [0] oooxoxxx xxoxxxxo [MSB]
1636 00:40:33.827277 38, [0] oooxoxxx xxoxxxxo [MSB]
1637 00:40:33.827330 39, [0] oooxoxxx xxoxxxxx [MSB]
1638 00:40:33.827383 40, [0] oooxoxxx xxoxxxxx [MSB]
1639 00:40:33.827435 41, [0] xooxxxxx xxoxxxxx [MSB]
1640 00:40:33.827488 42, [0] xoxxxxxx xxoxxxxx [MSB]
1641 00:40:33.827541 43, [0] xxxxxxxx xxxxxxxx [MSB]
1642 00:40:33.827594 iDelay=43, Bit 0, Center 25 (10 ~ 40) 31
1643 00:40:33.827646 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
1644 00:40:33.827698 iDelay=43, Bit 2, Center 24 (7 ~ 41) 35
1645 00:40:33.827786 iDelay=43, Bit 3, Center 17 (1 ~ 33) 33
1646 00:40:33.827945 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34
1647 00:40:33.828064 iDelay=43, Bit 5, Center 18 (1 ~ 36) 36
1648 00:40:33.828162 iDelay=43, Bit 6, Center 18 (3 ~ 34) 32
1649 00:40:33.828261 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
1650 00:40:33.828325 iDelay=43, Bit 8, Center 18 (1 ~ 35) 35
1651 00:40:33.828406 iDelay=43, Bit 9, Center 19 (2 ~ 36) 35
1652 00:40:33.828488 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1653 00:40:33.828570 iDelay=43, Bit 11, Center 17 (0 ~ 35) 36
1654 00:40:33.828652 iDelay=43, Bit 12, Center 19 (2 ~ 36) 35
1655 00:40:33.828733 iDelay=43, Bit 13, Center 17 (1 ~ 33) 33
1656 00:40:33.828814 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1657 00:40:33.828896 iDelay=43, Bit 15, Center 21 (4 ~ 38) 35
1658 00:40:33.828977 ==
1659 00:40:33.829059 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1660 00:40:33.829141 fsp= 1, odt_onoff= 1, Byte mode= 0
1661 00:40:33.829222 ==
1662 00:40:33.829346 DQS Delay:
1663 00:40:33.829428 DQS0 = 0, DQS1 = 0
1664 00:40:33.829509 DQM Delay:
1665 00:40:33.829590 DQM0 = 21, DQM1 = 18
1666 00:40:33.829671 DQ Delay:
1667 00:40:33.829752 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =17
1668 00:40:33.829834 DQ4 =23, DQ5 =18, DQ6 =18, DQ7 =19
1669 00:40:33.829915 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
1670 00:40:33.829996 DQ12 =19, DQ13 =17, DQ14 =17, DQ15 =21
1671 00:40:33.830077
1672 00:40:33.830157
1673 00:40:33.830238 DramC Write-DBI off
1674 00:40:33.830319 ==
1675 00:40:33.830401 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1676 00:40:33.830482 fsp= 1, odt_onoff= 1, Byte mode= 0
1677 00:40:33.830563 ==
1678 00:40:33.830645 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1679 00:40:33.830726
1680 00:40:33.830807 Begin, DQ Scan Range 926~1182
1681 00:40:33.830888
1682 00:40:33.830968
1683 00:40:33.831049 TX Vref Scan disable
1684 00:40:33.831130 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1685 00:40:33.831214 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1686 00:40:33.831298 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1687 00:40:33.831383 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1688 00:40:33.831467 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1689 00:40:33.831551 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1690 00:40:33.831635 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1691 00:40:33.831718 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1692 00:40:33.831802 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1693 00:40:33.831885 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1694 00:40:33.831969 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1695 00:40:33.832052 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1696 00:40:33.832136 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1697 00:40:33.832220 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1698 00:40:33.832303 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1699 00:40:33.832387 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1700 00:40:33.832470 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1701 00:40:33.832554 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1702 00:40:33.832637 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1703 00:40:33.832721 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1704 00:40:33.832804 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1705 00:40:33.832888 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1706 00:40:33.832972 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1707 00:40:33.833056 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1708 00:40:33.833139 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1709 00:40:33.833222 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:40:33.833313 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1711 00:40:33.833397 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1712 00:40:33.833481 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1713 00:40:33.833565 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1714 00:40:33.833649 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1715 00:40:33.833737 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1716 00:40:33.833804 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:40:33.833894 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:40:33.833952 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:40:33.834006 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:40:33.834058 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:40:33.834111 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:40:33.834164 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:40:33.834218 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:40:33.834270 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:40:33.834323 967 |3 6 7|[0] xxxxxxxx oxxoxoxx [MSB]
1726 00:40:33.834375 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1727 00:40:33.834428 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1728 00:40:33.834481 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1729 00:40:33.834533 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1730 00:40:33.834586 972 |3 6 12|[0] xxxoxxxx ooxooooo [MSB]
1731 00:40:33.834639 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1732 00:40:33.834884 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1733 00:40:33.834943 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1734 00:40:33.835000 976 |3 6 16|[0] xxxoxooo oooooooo [MSB]
1735 00:40:33.835069 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1736 00:40:33.835182 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1737 00:40:33.835372 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1738 00:40:33.835484 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1739 00:40:33.835550 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1740 00:40:33.835637 995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]
1741 00:40:33.835729 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1742 00:40:33.835816 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1743 00:40:33.835907 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1744 00:40:33.835991 Byte0, DQ PI dly=985, DQM PI dly= 985
1745 00:40:33.836080 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1746 00:40:33.836163
1747 00:40:33.836245 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1748 00:40:33.836328
1749 00:40:33.836409 Byte1, DQ PI dly=979, DQM PI dly= 979
1750 00:40:33.836492 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1751 00:40:33.836573
1752 00:40:33.836655 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1753 00:40:33.836736
1754 00:40:33.836816 ==
1755 00:40:33.836898 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1756 00:40:33.836980 fsp= 1, odt_onoff= 1, Byte mode= 0
1757 00:40:33.837061 ==
1758 00:40:33.837143 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1759 00:40:33.837224
1760 00:40:33.837331 Begin, DQ Scan Range 955~1019
1761 00:40:33.837386 Write Rank1 MR14 =0x0
1762 00:40:33.837439
1763 00:40:33.837491 CH=0, VrefRange= 0, VrefLevel = 0
1764 00:40:33.837543 TX Bit0 (980~999) 20 989, Bit8 (969~986) 18 977,
1765 00:40:33.837596 TX Bit1 (979~996) 18 987, Bit9 (970~987) 18 978,
1766 00:40:33.837649 TX Bit2 (979~996) 18 987, Bit10 (975~991) 17 983,
1767 00:40:33.837702 TX Bit3 (974~991) 18 982, Bit11 (968~986) 19 977,
1768 00:40:33.837754 TX Bit4 (979~997) 19 988, Bit12 (969~987) 19 978,
1769 00:40:33.837806 TX Bit5 (977~991) 15 984, Bit13 (969~985) 17 977,
1770 00:40:33.837858 TX Bit6 (976~992) 17 984, Bit14 (969~986) 18 977,
1771 00:40:33.837918 TX Bit7 (978~993) 16 985, Bit15 (973~989) 17 981,
1772 00:40:33.837978
1773 00:40:33.838030 Write Rank1 MR14 =0x2
1774 00:40:33.838081
1775 00:40:33.838133 CH=0, VrefRange= 0, VrefLevel = 2
1776 00:40:33.838185 TX Bit0 (980~999) 20 989, Bit8 (969~987) 19 978,
1777 00:40:33.838237 TX Bit1 (978~997) 20 987, Bit9 (969~987) 19 978,
1778 00:40:33.838289 TX Bit2 (979~996) 18 987, Bit10 (975~991) 17 983,
1779 00:40:33.838342 TX Bit3 (974~992) 19 983, Bit11 (968~987) 20 977,
1780 00:40:33.838393 TX Bit4 (979~998) 20 988, Bit12 (969~988) 20 978,
1781 00:40:33.838446 TX Bit5 (976~991) 16 983, Bit13 (968~986) 19 977,
1782 00:40:33.838498 TX Bit6 (976~992) 17 984, Bit14 (970~987) 18 978,
1783 00:40:33.838550 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1784 00:40:33.838601
1785 00:40:33.838652 Write Rank1 MR14 =0x4
1786 00:40:33.838704
1787 00:40:33.838756 CH=0, VrefRange= 0, VrefLevel = 4
1788 00:40:33.838808 TX Bit0 (980~999) 20 989, Bit8 (969~988) 20 978,
1789 00:40:33.838860 TX Bit1 (979~998) 20 988, Bit9 (969~989) 21 979,
1790 00:40:33.838912 TX Bit2 (978~998) 21 988, Bit10 (974~991) 18 982,
1791 00:40:33.838965 TX Bit3 (974~992) 19 983, Bit11 (968~987) 20 977,
1792 00:40:33.839016 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1793 00:40:33.839068 TX Bit5 (976~991) 16 983, Bit13 (968~987) 20 977,
1794 00:40:33.839120 TX Bit6 (976~993) 18 984, Bit14 (969~988) 20 978,
1795 00:40:33.839172 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1796 00:40:33.839224
1797 00:40:33.839275 Write Rank1 MR14 =0x6
1798 00:40:33.839327
1799 00:40:33.839378 CH=0, VrefRange= 0, VrefLevel = 6
1800 00:40:33.839430 TX Bit0 (979~999) 21 989, Bit8 (968~988) 21 978,
1801 00:40:33.839482 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
1802 00:40:33.839534 TX Bit2 (978~998) 21 988, Bit10 (975~992) 18 983,
1803 00:40:33.839585 TX Bit3 (973~992) 20 982, Bit11 (968~988) 21 978,
1804 00:40:33.839637 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1805 00:40:33.839689 TX Bit5 (976~992) 17 984, Bit13 (968~987) 20 977,
1806 00:40:33.839741 TX Bit6 (976~994) 19 985, Bit14 (969~989) 21 979,
1807 00:40:33.839793 TX Bit7 (978~996) 19 987, Bit15 (974~990) 17 982,
1808 00:40:33.839845
1809 00:40:33.839897 Write Rank1 MR14 =0x8
1810 00:40:33.839948
1811 00:40:33.839999 CH=0, VrefRange= 0, VrefLevel = 8
1812 00:40:33.840051 TX Bit0 (979~1000) 22 989, Bit8 (968~989) 22 978,
1813 00:40:33.840103 TX Bit1 (978~998) 21 988, Bit9 (969~990) 22 979,
1814 00:40:33.840155 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1815 00:40:33.840207 TX Bit3 (972~993) 22 982, Bit11 (967~989) 23 978,
1816 00:40:33.840259 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1817 00:40:33.840310 TX Bit5 (975~992) 18 983, Bit13 (968~988) 21 978,
1818 00:40:33.840363 TX Bit6 (976~994) 19 985, Bit14 (969~989) 21 979,
1819 00:40:33.840414 TX Bit7 (978~995) 18 986, Bit15 (971~991) 21 981,
1820 00:40:33.840466
1821 00:40:33.840516 Write Rank1 MR14 =0xa
1822 00:40:33.840567
1823 00:40:33.840618 CH=0, VrefRange= 0, VrefLevel = 10
1824 00:40:33.840669 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1825 00:40:33.840721 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1826 00:40:33.840773 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1827 00:40:33.840826 TX Bit3 (972~993) 22 982, Bit11 (967~989) 23 978,
1828 00:40:33.840878 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1829 00:40:33.840929 TX Bit5 (975~992) 18 983, Bit13 (968~989) 22 978,
1830 00:40:33.840981 TX Bit6 (975~995) 21 985, Bit14 (968~990) 23 979,
1831 00:40:33.841033 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1832 00:40:33.841085
1833 00:40:33.841135 Write Rank1 MR14 =0xc
1834 00:40:33.841187
1835 00:40:33.841238 CH=0, VrefRange= 0, VrefLevel = 12
1836 00:40:33.841324 TX Bit0 (979~1000) 22 989, Bit8 (968~989) 22 978,
1837 00:40:33.841391 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1838 00:40:33.841443 TX Bit2 (978~999) 22 988, Bit10 (974~993) 20 983,
1839 00:40:33.841692 TX Bit3 (971~994) 24 982, Bit11 (967~990) 24 978,
1840 00:40:33.841752 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1841 00:40:33.841806 TX Bit5 (975~993) 19 984, Bit13 (968~989) 22 978,
1842 00:40:33.841858 TX Bit6 (974~995) 22 984, Bit14 (969~990) 22 979,
1843 00:40:33.841911 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1844 00:40:33.841963
1845 00:40:33.842014 Write Rank1 MR14 =0xe
1846 00:40:33.842066
1847 00:40:33.842118 CH=0, VrefRange= 0, VrefLevel = 14
1848 00:40:33.842170 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1849 00:40:33.842223 TX Bit1 (978~999) 22 988, Bit9 (968~990) 23 979,
1850 00:40:33.842275 TX Bit2 (977~999) 23 988, Bit10 (973~993) 21 983,
1851 00:40:33.842327 TX Bit3 (971~994) 24 982, Bit11 (967~990) 24 978,
1852 00:40:33.842379 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1853 00:40:33.842431 TX Bit5 (974~993) 20 983, Bit13 (967~989) 23 978,
1854 00:40:33.842483 TX Bit6 (974~995) 22 984, Bit14 (968~990) 23 979,
1855 00:40:33.842536 TX Bit7 (976~998) 23 987, Bit15 (970~991) 22 980,
1856 00:40:33.842588
1857 00:40:33.842639 Write Rank1 MR14 =0x10
1858 00:40:33.842690
1859 00:40:33.842741 CH=0, VrefRange= 0, VrefLevel = 16
1860 00:40:33.842793 TX Bit0 (978~1001) 24 989, Bit8 (968~990) 23 979,
1861 00:40:33.842845 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1862 00:40:33.842896 TX Bit2 (977~999) 23 988, Bit10 (973~994) 22 983,
1863 00:40:33.842948 TX Bit3 (970~994) 25 982, Bit11 (966~990) 25 978,
1864 00:40:33.843000 TX Bit4 (978~1000) 23 989, Bit12 (967~991) 25 979,
1865 00:40:33.843052 TX Bit5 (974~994) 21 984, Bit13 (967~990) 24 978,
1866 00:40:33.843104 TX Bit6 (974~997) 24 985, Bit14 (968~990) 23 979,
1867 00:40:33.843156 TX Bit7 (976~998) 23 987, Bit15 (971~992) 22 981,
1868 00:40:33.843207
1869 00:40:33.843259 Write Rank1 MR14 =0x12
1870 00:40:33.843309
1871 00:40:33.843361 CH=0, VrefRange= 0, VrefLevel = 18
1872 00:40:33.843412 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1873 00:40:33.843466 TX Bit1 (978~999) 22 988, Bit9 (968~991) 24 979,
1874 00:40:33.843517 TX Bit2 (978~999) 22 988, Bit10 (972~994) 23 983,
1875 00:40:33.843569 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1876 00:40:33.843622 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
1877 00:40:33.843674 TX Bit5 (973~994) 22 983, Bit13 (967~990) 24 978,
1878 00:40:33.843726 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1879 00:40:33.843778 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1880 00:40:33.843830
1881 00:40:33.843881 Write Rank1 MR14 =0x14
1882 00:40:33.843932
1883 00:40:33.843984 CH=0, VrefRange= 0, VrefLevel = 20
1884 00:40:33.844035 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1885 00:40:33.844087 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1886 00:40:33.844140 TX Bit2 (978~1000) 23 989, Bit10 (972~995) 24 983,
1887 00:40:33.844191 TX Bit3 (970~995) 26 982, Bit11 (966~991) 26 978,
1888 00:40:33.844244 TX Bit4 (977~1000) 24 988, Bit12 (967~991) 25 979,
1889 00:40:33.844296 TX Bit5 (972~995) 24 983, Bit13 (967~990) 24 978,
1890 00:40:33.844348 TX Bit6 (973~997) 25 985, Bit14 (968~991) 24 979,
1891 00:40:33.844399 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1892 00:40:33.844451
1893 00:40:33.844502 Write Rank1 MR14 =0x16
1894 00:40:33.844553
1895 00:40:33.844604 CH=0, VrefRange= 0, VrefLevel = 22
1896 00:40:33.844656 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1897 00:40:33.844707 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1898 00:40:33.844760 TX Bit2 (977~1000) 24 988, Bit10 (971~994) 24 982,
1899 00:40:33.844812 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1900 00:40:33.844863 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1901 00:40:33.844915 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1902 00:40:33.844968 TX Bit6 (972~998) 27 985, Bit14 (968~991) 24 979,
1903 00:40:33.845019 TX Bit7 (975~999) 25 987, Bit15 (969~992) 24 980,
1904 00:40:33.845071
1905 00:40:33.845122 Write Rank1 MR14 =0x18
1906 00:40:33.845174
1907 00:40:33.845225 CH=0, VrefRange= 0, VrefLevel = 24
1908 00:40:33.845311 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1909 00:40:33.845379 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1910 00:40:33.845432 TX Bit2 (977~1000) 24 988, Bit10 (971~994) 24 982,
1911 00:40:33.845485 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1912 00:40:33.845537 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1913 00:40:33.845595 TX Bit5 (972~996) 25 984, Bit13 (966~990) 25 978,
1914 00:40:33.845657 TX Bit6 (972~998) 27 985, Bit14 (968~991) 24 979,
1915 00:40:33.845720 TX Bit7 (975~999) 25 987, Bit15 (969~992) 24 980,
1916 00:40:33.845789
1917 00:40:33.845848 wait MRW command Rank1 MR14 =0x1a fired (1)
1918 00:40:33.845914 Write Rank1 MR14 =0x1a
1919 00:40:33.846002
1920 00:40:33.846086 CH=0, VrefRange= 0, VrefLevel = 26
1921 00:40:33.846174 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1922 00:40:33.846265 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
1923 00:40:33.846349 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1924 00:40:33.846436 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1925 00:40:33.846527 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1926 00:40:33.846611 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1927 00:40:33.846700 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1928 00:40:33.846783 TX Bit7 (974~999) 26 986, Bit15 (968~992) 25 980,
1929 00:40:33.846865
1930 00:40:33.846952 Write Rank1 MR14 =0x1c
1931 00:40:33.847033
1932 00:40:33.847120 CH=0, VrefRange= 0, VrefLevel = 28
1933 00:40:33.847177 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1934 00:40:33.847230 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
1935 00:40:33.847283 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1936 00:40:33.847335 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1937 00:40:33.847388 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1938 00:40:33.847631 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1939 00:40:33.847693 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1940 00:40:33.847748 TX Bit7 (974~999) 26 986, Bit15 (968~992) 25 980,
1941 00:40:33.847801
1942 00:40:33.847854 Write Rank1 MR14 =0x1e
1943 00:40:33.847906
1944 00:40:33.847959 CH=0, VrefRange= 0, VrefLevel = 30
1945 00:40:34.017464 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1946 00:40:34.017690 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
1947 00:40:34.017853 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1948 00:40:34.017995 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
1949 00:40:34.018119 TX Bit4 (976~1000) 25 988, Bit12 (967~991) 25 979,
1950 00:40:34.018203 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1951 00:40:34.018296 TX Bit6 (971~997) 27 984, Bit14 (967~991) 25 979,
1952 00:40:34.018432 TX Bit7 (974~999) 26 986, Bit15 (968~992) 25 980,
1953 00:40:34.018558
1954 00:40:34.018676
1955 00:40:34.018790 TX Vref found, early break! 378< 382
1956 00:40:34.018903 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1957 00:40:34.019026 u1DelayCellOfst[0]=8 cells (7 PI)
1958 00:40:34.019149 u1DelayCellOfst[1]=8 cells (7 PI)
1959 00:40:34.019256 u1DelayCellOfst[2]=8 cells (7 PI)
1960 00:40:34.019378 u1DelayCellOfst[3]=0 cells (0 PI)
1961 00:40:34.019491 u1DelayCellOfst[4]=7 cells (6 PI)
1962 00:40:34.019595 u1DelayCellOfst[5]=1 cells (1 PI)
1963 00:40:34.019698 u1DelayCellOfst[6]=2 cells (2 PI)
1964 00:40:34.019800 u1DelayCellOfst[7]=5 cells (4 PI)
1965 00:40:34.019901 Byte0, DQ PI dly=982, DQM PI dly= 985
1966 00:40:34.020004 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1967 00:40:34.020110
1968 00:40:34.020214 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1969 00:40:34.020317
1970 00:40:34.020418 u1DelayCellOfst[8]=1 cells (1 PI)
1971 00:40:34.020520 u1DelayCellOfst[9]=2 cells (2 PI)
1972 00:40:34.020621 u1DelayCellOfst[10]=6 cells (5 PI)
1973 00:40:34.020723 u1DelayCellOfst[11]=1 cells (1 PI)
1974 00:40:34.020824 u1DelayCellOfst[12]=2 cells (2 PI)
1975 00:40:34.020925 u1DelayCellOfst[13]=0 cells (0 PI)
1976 00:40:34.021026 u1DelayCellOfst[14]=2 cells (2 PI)
1977 00:40:34.021128 u1DelayCellOfst[15]=3 cells (3 PI)
1978 00:40:34.021230 Byte1, DQ PI dly=977, DQM PI dly= 979
1979 00:40:34.021325 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1980 00:40:34.021393
1981 00:40:34.021459 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1982 00:40:34.021525
1983 00:40:34.021589 Write Rank1 MR14 =0x1a
1984 00:40:34.021653
1985 00:40:34.021718 Final TX Range 0 Vref 26
1986 00:40:34.021783
1987 00:40:34.021848 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1988 00:40:34.021913
1989 00:40:34.021978 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1990 00:40:34.022043 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1991 00:40:34.022109 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1992 00:40:34.022174 Write Rank1 MR3 =0xb0
1993 00:40:34.022238 DramC Write-DBI on
1994 00:40:34.022303 ==
1995 00:40:34.022368 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1996 00:40:34.022450 fsp= 1, odt_onoff= 1, Byte mode= 0
1997 00:40:34.022521 ==
1998 00:40:34.022588 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1999 00:40:34.022666
2000 00:40:34.022745 Begin, DQ Scan Range 699~763
2001 00:40:34.022812
2002 00:40:34.022876
2003 00:40:34.022941 TX Vref Scan disable
2004 00:40:34.023006 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2005 00:40:34.023073 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2006 00:40:34.023139 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2007 00:40:34.023205 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2008 00:40:34.023270 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2009 00:40:34.023336 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2010 00:40:34.023415 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2011 00:40:34.023475 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2012 00:40:34.023534 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2013 00:40:34.023593 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2014 00:40:34.023653 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2015 00:40:34.023712 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2016 00:40:34.023771 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2017 00:40:34.023830 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2018 00:40:34.023889 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2019 00:40:34.023949 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2020 00:40:34.024008 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2021 00:40:34.024067 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2022 00:40:34.024126 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2023 00:40:34.024185 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2024 00:40:34.024244 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2025 00:40:34.024303 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2026 00:40:34.024362 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2027 00:40:34.024421 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2028 00:40:34.024480 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2029 00:40:34.024539 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2030 00:40:34.024599 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2031 00:40:34.024659 Byte0, DQ PI dly=730, DQM PI dly= 730
2032 00:40:34.024717 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2033 00:40:34.024776
2034 00:40:34.024834 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2035 00:40:34.024893
2036 00:40:34.024950 Byte1, DQ PI dly=722, DQM PI dly= 722
2037 00:40:34.025008 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2038 00:40:34.025067
2039 00:40:34.025125 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2040 00:40:34.025183
2041 00:40:34.025241 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2042 00:40:34.025309 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2043 00:40:34.025368 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2044 00:40:34.025426 Write Rank1 MR3 =0x30
2045 00:40:34.025484 DramC Write-DBI off
2046 00:40:34.025542
2047 00:40:34.025600 [DATLAT]
2048 00:40:34.025659 Freq=1600, CH0 RK1, use_rxtx_scan=0
2049 00:40:34.025717
2050 00:40:34.025775 DATLAT Default: 0x10
2051 00:40:34.025832 7, 0xFFFF, sum=0
2052 00:40:34.025892 8, 0xFFFF, sum=0
2053 00:40:34.025951 9, 0xFFFF, sum=0
2054 00:40:34.026010 10, 0xFFFF, sum=0
2055 00:40:34.026085 11, 0xFFFF, sum=0
2056 00:40:34.026148 12, 0xFFFF, sum=0
2057 00:40:34.026208 13, 0xFFFF, sum=0
2058 00:40:34.026268 14, 0x0, sum=1
2059 00:40:34.026327 15, 0x0, sum=2
2060 00:40:34.026592 16, 0x0, sum=3
2061 00:40:34.026659 17, 0x0, sum=4
2062 00:40:34.026722 pattern=2 first_step=14 total pass=5 best_step=16
2063 00:40:34.026781 ==
2064 00:40:34.026841 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2065 00:40:34.026900 fsp= 1, odt_onoff= 1, Byte mode= 0
2066 00:40:34.026960 ==
2067 00:40:34.027018 Start DQ dly to find pass range UseTestEngine =1
2068 00:40:34.027081 x-axis: bit #, y-axis: DQ dly (-127~63)
2069 00:40:34.027141 RX Vref Scan = 0
2070 00:40:34.027200 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2071 00:40:34.027261 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2072 00:40:34.027321 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2073 00:40:34.027381 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2074 00:40:34.027440 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2075 00:40:34.027499 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2076 00:40:34.027558 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2077 00:40:34.027618 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2078 00:40:34.027677 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2079 00:40:34.027736 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2080 00:40:34.027795 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2081 00:40:34.027854 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2082 00:40:34.027914 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2083 00:40:34.027972 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2084 00:40:34.028032 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2085 00:40:34.028091 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2086 00:40:34.028154 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2087 00:40:34.028213 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2088 00:40:34.028273 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2089 00:40:34.028333 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2090 00:40:34.028401 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2091 00:40:34.028455 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2092 00:40:34.028509 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2093 00:40:34.028563 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2094 00:40:34.028619 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2095 00:40:34.028673 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2096 00:40:34.028727 0, [0] xxxoxoxx xxxoxoxx [MSB]
2097 00:40:34.028782 1, [0] xxxoxoxx oxxoxoxx [MSB]
2098 00:40:34.028836 2, [0] xxxoxoxx ooxoxoox [MSB]
2099 00:40:34.028890 3, [0] xxxoxooo ooxoooox [MSB]
2100 00:40:34.028944 4, [0] xxxoxooo ooxooooo [MSB]
2101 00:40:34.028998 5, [0] xxxoxooo oooooooo [MSB]
2102 00:40:34.029068 6, [0] xxxooooo oooooooo [MSB]
2103 00:40:34.029156 7, [0] xoxooooo oooooooo [MSB]
2104 00:40:34.029250 8, [0] xooooooo oooooooo [MSB]
2105 00:40:34.029323 33, [0] oooxoooo oooooooo [MSB]
2106 00:40:34.029379 34, [0] oooxoooo oooooxoo [MSB]
2107 00:40:34.029433 35, [0] oooxoooo oooxoxoo [MSB]
2108 00:40:34.029488 36, [0] oooxoxox oooxoxxo [MSB]
2109 00:40:34.029542 37, [0] oooxoxxx xooxoxxo [MSB]
2110 00:40:34.029596 38, [0] oooxoxxx xxoxxxxx [MSB]
2111 00:40:34.029649 39, [0] oooxoxxx xxoxxxxx [MSB]
2112 00:40:34.029704 40, [0] oooxoxxx xxoxxxxx [MSB]
2113 00:40:34.029758 41, [0] oooxxxxx xxoxxxxx [MSB]
2114 00:40:34.029812 42, [0] oooxxxxx xxoxxxxx [MSB]
2115 00:40:34.029866 43, [0] xxxxxxxx xxxxxxxx [MSB]
2116 00:40:34.029920 iDelay=43, Bit 0, Center 25 (9 ~ 42) 34
2117 00:40:34.029974 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2118 00:40:34.030027 iDelay=43, Bit 2, Center 25 (8 ~ 42) 35
2119 00:40:34.030080 iDelay=43, Bit 3, Center 15 (-1 ~ 32) 34
2120 00:40:34.030133 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2121 00:40:34.030185 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
2122 00:40:34.030238 iDelay=43, Bit 6, Center 19 (3 ~ 36) 34
2123 00:40:34.030291 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
2124 00:40:34.030343 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
2125 00:40:34.030396 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
2126 00:40:34.030449 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
2127 00:40:34.030502 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2128 00:40:34.030555 iDelay=43, Bit 12, Center 20 (3 ~ 37) 35
2129 00:40:34.030608 iDelay=43, Bit 13, Center 16 (0 ~ 33) 34
2130 00:40:34.030661 iDelay=43, Bit 14, Center 18 (2 ~ 35) 34
2131 00:40:34.030713 iDelay=43, Bit 15, Center 20 (4 ~ 37) 34
2132 00:40:34.030767 ==
2133 00:40:34.030820 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2134 00:40:34.030874 fsp= 1, odt_onoff= 1, Byte mode= 0
2135 00:40:34.030928 ==
2136 00:40:34.030981 DQS Delay:
2137 00:40:34.031033 DQS0 = 0, DQS1 = 0
2138 00:40:34.031086 DQM Delay:
2139 00:40:34.031139 DQM0 = 20, DQM1 = 18
2140 00:40:34.031192 DQ Delay:
2141 00:40:34.031244 DQ0 =25, DQ1 =24, DQ2 =25, DQ3 =15
2142 00:40:34.031297 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
2143 00:40:34.031349 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2144 00:40:34.031402 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
2145 00:40:34.031455
2146 00:40:34.031508
2147 00:40:34.031561
2148 00:40:34.031613 [DramC_TX_OE_Calibration] TA2
2149 00:40:34.031666 Original DQ_B0 (3 6) =30, OEN = 27
2150 00:40:34.031720 Original DQ_B1 (3 6) =30, OEN = 27
2151 00:40:34.031773 23, 0x0, End_B0=23 End_B1=23
2152 00:40:34.031827 24, 0x0, End_B0=24 End_B1=24
2153 00:40:34.031880 25, 0x0, End_B0=25 End_B1=25
2154 00:40:34.031934 26, 0x0, End_B0=26 End_B1=26
2155 00:40:34.031987 27, 0x0, End_B0=27 End_B1=27
2156 00:40:34.032041 28, 0x0, End_B0=28 End_B1=28
2157 00:40:34.032095 29, 0x0, End_B0=29 End_B1=29
2158 00:40:34.032149 30, 0x0, End_B0=30 End_B1=30
2159 00:40:34.032203 31, 0xFFFF, End_B0=30 End_B1=30
2160 00:40:34.032257 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2161 00:40:34.032310 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2162 00:40:34.032364
2163 00:40:34.032416
2164 00:40:34.032468 Write Rank1 MR23 =0x3f
2165 00:40:34.032521 [DQSOSC]
2166 00:40:34.032574 [DQSOSCAuto] RK1, (LSB)MR18= 0x7b, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2167 00:40:34.032629 CH0_RK1: MR19=0x3, MR18=0x7B, DQSOSC=353, MR23=63, INC=19, DEC=29
2168 00:40:34.032683 Write Rank1 MR23 =0x3f
2169 00:40:34.032736 [DQSOSC]
2170 00:40:34.032788 [DQSOSCAuto] RK1, (LSB)MR18= 0x7c, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2171 00:40:34.032842 CH0 RK1: MR19=3, MR18=7C
2172 00:40:34.032915 [RxdqsGatingPostProcess] freq 1600
2173 00:40:34.032971 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2174 00:40:34.033025 Rank: 0
2175 00:40:34.033101 best DQS0 dly(2T, 0.5T) = (2, 5)
2176 00:40:34.033196 best DQS1 dly(2T, 0.5T) = (2, 5)
2177 00:40:34.033286 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2178 00:40:34.033344 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2179 00:40:34.033398 Rank: 1
2180 00:40:34.033464 best DQS0 dly(2T, 0.5T) = (2, 6)
2181 00:40:34.033516 best DQS1 dly(2T, 0.5T) = (2, 6)
2182 00:40:34.033569 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2183 00:40:34.033621 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2184 00:40:34.033868 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2185 00:40:34.033930 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2186 00:40:34.033985 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2187 00:40:34.034038 Write Rank0 MR13 =0x59
2188 00:40:34.034091 ==
2189 00:40:34.034143 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2190 00:40:34.034196 fsp= 1, odt_onoff= 1, Byte mode= 0
2191 00:40:34.034248 ==
2192 00:40:34.034300 === u2Vref_new: 0x56 --> 0x3a
2193 00:40:34.034352 === u2Vref_new: 0x58 --> 0x58
2194 00:40:34.034404 === u2Vref_new: 0x5a --> 0x5a
2195 00:40:34.034456 === u2Vref_new: 0x5c --> 0x78
2196 00:40:34.034508 === u2Vref_new: 0x5e --> 0x7a
2197 00:40:34.034560 === u2Vref_new: 0x60 --> 0x90
2198 00:40:34.034612 [CA 0] Center 36 (9~63) winsize 55
2199 00:40:34.034665 [CA 1] Center 34 (6~63) winsize 58
2200 00:40:34.034716 [CA 2] Center 32 (3~61) winsize 59
2201 00:40:34.034768 [CA 3] Center 32 (3~62) winsize 60
2202 00:40:34.034820 [CA 4] Center 33 (3~63) winsize 61
2203 00:40:34.034871 [CA 5] Center 25 (-1~52) winsize 54
2204 00:40:34.034923
2205 00:40:34.034974 [CATrainingPosCal] consider 1 rank data
2206 00:40:34.035026 u2DelayCellTimex100 = 762/100 ps
2207 00:40:34.035079 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2208 00:40:34.035131 CA1 delay=34 (6~63),Diff = 9 PI (11 cell)
2209 00:40:34.035183 CA2 delay=32 (3~61),Diff = 7 PI (8 cell)
2210 00:40:34.035234 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2211 00:40:34.035286 CA4 delay=33 (3~63),Diff = 8 PI (10 cell)
2212 00:40:34.035338 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2213 00:40:34.035390
2214 00:40:34.035441 CA PerBit enable=1, Macro0, CA PI delay=25
2215 00:40:34.035494 === u2Vref_new: 0x56 --> 0x3a
2216 00:40:34.035546
2217 00:40:34.035598 Vref(ca) range 1: 22
2218 00:40:34.035650
2219 00:40:34.035701 CS Dly= 10 (41-0-32)
2220 00:40:34.035762 Write Rank0 MR13 =0xd8
2221 00:40:34.035822 Write Rank0 MR13 =0xd8
2222 00:40:34.035874 Write Rank0 MR12 =0x56
2223 00:40:34.035934 Write Rank1 MR13 =0x59
2224 00:40:34.035999 ==
2225 00:40:34.036053 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2226 00:40:34.036106 fsp= 1, odt_onoff= 1, Byte mode= 0
2227 00:40:34.036160 ==
2228 00:40:34.036212 === u2Vref_new: 0x56 --> 0x3a
2229 00:40:34.036266 === u2Vref_new: 0x58 --> 0x58
2230 00:40:34.036368 === u2Vref_new: 0x5a --> 0x5a
2231 00:40:34.036435 === u2Vref_new: 0x5c --> 0x78
2232 00:40:34.036486 === u2Vref_new: 0x5e --> 0x7a
2233 00:40:34.036538 === u2Vref_new: 0x60 --> 0x90
2234 00:40:34.036589 [CA 0] Center 36 (10~63) winsize 54
2235 00:40:34.036641 [CA 1] Center 35 (8~63) winsize 56
2236 00:40:34.036693 [CA 2] Center 33 (3~63) winsize 61
2237 00:40:34.036745 [CA 3] Center 33 (3~63) winsize 61
2238 00:40:34.036796 [CA 4] Center 33 (4~63) winsize 60
2239 00:40:34.036847 [CA 5] Center 26 (-2~54) winsize 57
2240 00:40:34.036900
2241 00:40:34.036951 [CATrainingPosCal] consider 2 rank data
2242 00:40:34.037003 u2DelayCellTimex100 = 762/100 ps
2243 00:40:34.037055 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2244 00:40:34.037108 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2245 00:40:34.037160 CA2 delay=32 (3~61),Diff = 7 PI (8 cell)
2246 00:40:34.037212 CA3 delay=32 (3~62),Diff = 7 PI (8 cell)
2247 00:40:34.037294 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2248 00:40:34.037363 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2249 00:40:34.037415
2250 00:40:34.037467 CA PerBit enable=1, Macro0, CA PI delay=25
2251 00:40:34.037519 === u2Vref_new: 0x58 --> 0x58
2252 00:40:34.037572
2253 00:40:34.037624 Vref(ca) range 1: 24
2254 00:40:34.037676
2255 00:40:34.037728 CS Dly= 12 (43-0-32)
2256 00:40:34.037779 Write Rank1 MR13 =0xd8
2257 00:40:34.037831 Write Rank1 MR13 =0xd8
2258 00:40:34.037883 Write Rank1 MR12 =0x58
2259 00:40:34.037934 [RankSwap] Rank num 2, (Multi 1), Rank 0
2260 00:40:34.037986 Write Rank0 MR2 =0xad
2261 00:40:34.038038 [Write Leveling]
2262 00:40:34.038090 delay byte0 byte1 byte2 byte3
2263 00:40:34.038142
2264 00:40:34.038196 10 0 0
2265 00:40:34.038249 11 0 0
2266 00:40:34.038302 12 0 0
2267 00:40:34.038355 13 0 0
2268 00:40:34.038408 14 0 0
2269 00:40:34.038461 15 0 0
2270 00:40:34.038513 16 0 0
2271 00:40:34.038566 17 0 0
2272 00:40:34.038619 18 0 0
2273 00:40:34.038672 19 0 0
2274 00:40:34.038725 20 0 0
2275 00:40:34.038777 21 0 0
2276 00:40:34.038830 22 0 0
2277 00:40:34.038882 23 0 0
2278 00:40:34.038934 24 0 0
2279 00:40:34.038986 25 0 0
2280 00:40:34.039039 26 0 0
2281 00:40:34.039092 27 0 0
2282 00:40:34.039144 28 0 0
2283 00:40:34.039197 29 0 0
2284 00:40:34.039250 30 0 0
2285 00:40:34.039303 31 0 ff
2286 00:40:34.039376 32 0 ff
2287 00:40:34.039431 33 0 ff
2288 00:40:34.039484 34 0 ff
2289 00:40:34.039537 35 ff ff
2290 00:40:34.039603 36 ff ff
2291 00:40:34.039659 37 ff ff
2292 00:40:34.040080 38 ff ff
2293 00:40:34.040140 39 ff ff
2294 00:40:34.044367 40 ff ff
2295 00:40:34.044790 41 ff ff
2296 00:40:34.047217 pass bytecount = 0xff (0xff: all bytes pass)
2297 00:40:34.047652
2298 00:40:34.050373 DQS0 dly: 35
2299 00:40:34.050788 DQS1 dly: 31
2300 00:40:34.054042 Write Rank0 MR2 =0x2d
2301 00:40:34.057650 [RankSwap] Rank num 2, (Multi 1), Rank 0
2302 00:40:34.058137 Write Rank0 MR1 =0xd6
2303 00:40:34.058472 [Gating]
2304 00:40:34.060548 ==
2305 00:40:34.063964 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2306 00:40:34.067318 fsp= 1, odt_onoff= 1, Byte mode= 0
2307 00:40:34.067768 ==
2308 00:40:34.070373 3 1 0 |2625 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2309 00:40:34.077202 3 1 4 |3333 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2310 00:40:34.080604 3 1 8 |302f 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2311 00:40:34.083937 3 1 12 |3332 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2312 00:40:34.090866 3 1 16 |3232 3534 |(0 0)(11 11) |(0 1)(0 1)| 0
2313 00:40:34.093879 3 1 20 |1313 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2314 00:40:34.097534 3 1 24 |3231 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2315 00:40:34.100838 3 1 28 |1e1d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2316 00:40:34.107330 3 2 0 |202 505 |(11 11)(11 11) |(0 0)(1 1)| 0
2317 00:40:34.110657 3 2 4 |3837 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2318 00:40:34.114262 3 2 8 |3c3c 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2319 00:40:34.120901 3 2 12 |1211 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2320 00:40:34.124003 3 2 16 |3939 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2321 00:40:34.127196 [Byte 0] Lead/lag Transition tap number (1)
2322 00:40:34.130528 3 2 20 |2625 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2323 00:40:34.137743 3 2 24 |3b3b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2324 00:40:34.140610 3 2 28 |2a2a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2325 00:40:34.143886 3 3 0 |807 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2326 00:40:34.150434 3 3 4 |3534 1b1a |(11 11)(11 11) |(0 1)(1 1)| 0
2327 00:40:34.154092 3 3 8 |3534 504 |(11 11)(11 11) |(0 1)(1 1)| 0
2328 00:40:34.157238 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2329 00:40:34.160521 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2330 00:40:34.167392 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2331 00:40:34.170477 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2332 00:40:34.174056 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2333 00:40:34.180983 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2334 00:40:34.183811 3 4 0 |3d3d 1414 |(11 11)(11 11) |(1 1)(1 1)| 0
2335 00:40:34.187066 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2336 00:40:34.190553 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2337 00:40:34.197583 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2338 00:40:34.200992 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2339 00:40:34.204243 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2340 00:40:34.211191 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2341 00:40:34.213926 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2342 00:40:34.217429 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2343 00:40:34.224705 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2344 00:40:34.227624 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2345 00:40:34.231532 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2346 00:40:34.237564 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2347 00:40:34.240718 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2348 00:40:34.244826 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2349 00:40:34.247688 [Byte 0] Lead/lag Transition tap number (2)
2350 00:40:34.254631 [Byte 1] Lead/lag falling Transition (3, 5, 20)
2351 00:40:34.258417 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2352 00:40:34.261493 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2353 00:40:34.264525 [Byte 1] Lead/lag Transition tap number (3)
2354 00:40:34.268105 3 6 0 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
2355 00:40:34.271639 [Byte 0]First pass (3, 6, 0)
2356 00:40:34.275045 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2357 00:40:34.277905 [Byte 1]First pass (3, 6, 4)
2358 00:40:34.281748 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2359 00:40:34.288122 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2360 00:40:34.291827 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2361 00:40:34.295024 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2362 00:40:34.298263 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2363 00:40:34.301764 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2364 00:40:34.308378 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2365 00:40:34.311489 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2366 00:40:34.315234 All bytes gating window > 1UI, Early break!
2367 00:40:34.315718
2368 00:40:34.317857 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2369 00:40:34.318305
2370 00:40:34.321752 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
2371 00:40:34.322171
2372 00:40:34.322505
2373 00:40:34.322811
2374 00:40:34.327930 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2375 00:40:34.328386
2376 00:40:34.331618 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
2377 00:40:34.332348
2378 00:40:34.332700
2379 00:40:34.335241 Write Rank0 MR1 =0x56
2380 00:40:34.335813
2381 00:40:34.336298 best RODT dly(2T, 0.5T) = (2, 2)
2382 00:40:34.336800
2383 00:40:34.337772 best RODT dly(2T, 0.5T) = (2, 2)
2384 00:40:34.338157 ==
2385 00:40:34.344725 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2386 00:40:34.348421 fsp= 1, odt_onoff= 1, Byte mode= 0
2387 00:40:34.348842 ==
2388 00:40:34.351731 Start DQ dly to find pass range UseTestEngine =0
2389 00:40:34.354955 x-axis: bit #, y-axis: DQ dly (-127~63)
2390 00:40:34.358197 RX Vref Scan = 0
2391 00:40:34.361798 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2392 00:40:34.365100 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2393 00:40:34.365644 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2394 00:40:34.367998 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2395 00:40:34.371678 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2396 00:40:34.375064 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2397 00:40:34.378141 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2398 00:40:34.381741 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2399 00:40:34.385040 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2400 00:40:34.388891 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2401 00:40:34.389482 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2402 00:40:34.391761 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2403 00:40:34.395000 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2404 00:40:34.398501 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2405 00:40:34.401994 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2406 00:40:34.405117 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2407 00:40:34.408525 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2408 00:40:34.408947 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2409 00:40:34.412185 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2410 00:40:34.415545 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2411 00:40:34.418850 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2412 00:40:34.422249 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2413 00:40:34.425169 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2414 00:40:34.428634 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2415 00:40:34.429071 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2416 00:40:34.431810 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2417 00:40:34.435263 0, [0] xxxoxxxx xxxxxxxx [MSB]
2418 00:40:34.438713 1, [0] xxxoxxxx xxxxxxxo [MSB]
2419 00:40:34.442077 2, [0] xxooxxxx xxxxxxxo [MSB]
2420 00:40:34.445744 3, [0] xxooxxxo xxxxxxxo [MSB]
2421 00:40:34.446263 4, [0] xxoooxxo oooxxoxo [MSB]
2422 00:40:34.448439 5, [0] xxoooxxo oooooooo [MSB]
2423 00:40:34.452422 6, [0] xoooooxo oooooooo [MSB]
2424 00:40:34.455141 7, [0] xoooooxo oooooooo [MSB]
2425 00:40:34.459101 8, [0] ooooooxo oooooooo [MSB]
2426 00:40:34.462175 32, [0] ooxxoooo oooooooo [MSB]
2427 00:40:34.462732 33, [0] ooxxoooo ooooooox [MSB]
2428 00:40:34.465447 34, [0] ooxxoooo ooooooox [MSB]
2429 00:40:34.468812 35, [0] ooxxxooo ooxoooox [MSB]
2430 00:40:34.472728 36, [0] ooxxxoox xoxoooox [MSB]
2431 00:40:34.476125 37, [0] ooxxxoox xxxoooxx [MSB]
2432 00:40:34.479391 38, [0] ooxxxoox xxxxoxxx [MSB]
2433 00:40:34.479909 39, [0] ooxxxoox xxxxxxxx [MSB]
2434 00:40:34.482510 40, [0] oxxxxoox xxxxxxxx [MSB]
2435 00:40:34.485651 41, [0] xxxxxxxx xxxxxxxx [MSB]
2436 00:40:34.489115 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2437 00:40:34.492176 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2438 00:40:34.495391 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2439 00:40:34.499016 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2440 00:40:34.502765 iDelay=41, Bit 4, Center 19 (4 ~ 34) 31
2441 00:40:34.505719 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
2442 00:40:34.509162 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2443 00:40:34.515995 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2444 00:40:34.519758 iDelay=41, Bit 8, Center 19 (4 ~ 35) 32
2445 00:40:34.522775 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2446 00:40:34.526161 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2447 00:40:34.529385 iDelay=41, Bit 11, Center 21 (5 ~ 37) 33
2448 00:40:34.532784 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2449 00:40:34.536210 iDelay=41, Bit 13, Center 20 (4 ~ 37) 34
2450 00:40:34.539422 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2451 00:40:34.542946 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2452 00:40:34.543367 ==
2453 00:40:34.549873 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2454 00:40:34.553066 fsp= 1, odt_onoff= 1, Byte mode= 0
2455 00:40:34.553623 ==
2456 00:40:34.553968 DQS Delay:
2457 00:40:34.556324 DQS0 = 0, DQS1 = 0
2458 00:40:34.556822 DQM Delay:
2459 00:40:34.557159 DQM0 = 20, DQM1 = 19
2460 00:40:34.559540 DQ Delay:
2461 00:40:34.563227 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2462 00:40:34.566348 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
2463 00:40:34.569886 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21
2464 00:40:34.572822 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2465 00:40:34.573208
2466 00:40:34.573573
2467 00:40:34.573878 DramC Write-DBI off
2468 00:40:34.574174 ==
2469 00:40:34.579662 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2470 00:40:34.582878 fsp= 1, odt_onoff= 1, Byte mode= 0
2471 00:40:34.583316 ==
2472 00:40:34.586476 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2473 00:40:34.586899
2474 00:40:34.589688 Begin, DQ Scan Range 927~1183
2475 00:40:34.590107
2476 00:40:34.590436
2477 00:40:34.593301 TX Vref Scan disable
2478 00:40:34.596139 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2479 00:40:34.599709 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2480 00:40:34.602986 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2481 00:40:34.606195 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2482 00:40:34.609901 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2483 00:40:34.612843 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2484 00:40:34.616376 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2485 00:40:34.619894 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2486 00:40:34.623023 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2487 00:40:34.626255 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2488 00:40:34.629986 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2489 00:40:34.632788 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2490 00:40:34.636476 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2491 00:40:34.639327 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2492 00:40:34.646520 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2493 00:40:34.649550 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2494 00:40:34.652954 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2495 00:40:34.656164 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2496 00:40:34.659758 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2497 00:40:34.663030 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2498 00:40:34.666421 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2499 00:40:34.669987 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2500 00:40:34.673397 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2501 00:40:34.675986 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2502 00:40:34.680031 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2503 00:40:34.682702 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2504 00:40:34.686239 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2505 00:40:34.689378 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2506 00:40:34.692989 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2507 00:40:34.695918 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2508 00:40:34.703135 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2509 00:40:34.706102 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2510 00:40:34.709106 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2511 00:40:34.712546 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2512 00:40:34.716309 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2513 00:40:34.719170 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2514 00:40:34.722596 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2515 00:40:34.725710 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2516 00:40:34.729379 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2517 00:40:34.732831 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2518 00:40:34.736538 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
2519 00:40:34.739073 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2520 00:40:34.742692 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2521 00:40:34.746411 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2522 00:40:34.749229 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2523 00:40:34.752408 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2524 00:40:34.756317 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2525 00:40:34.759441 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2526 00:40:34.762895 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
2527 00:40:34.765901 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2528 00:40:34.769577 977 |3 6 17|[0] ooooooxo oooooooo [MSB]
2529 00:40:34.777566 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2530 00:40:34.780970 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2531 00:40:34.784811 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2532 00:40:34.787753 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2533 00:40:34.791329 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2534 00:40:34.794640 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2535 00:40:34.797586 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2536 00:40:34.800806 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2537 00:40:34.804021 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
2538 00:40:34.807571 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2539 00:40:34.810579 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2540 00:40:34.814465 Byte0, DQ PI dly=986, DQM PI dly= 986
2541 00:40:34.820977 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2542 00:40:34.821434
2543 00:40:34.824262 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2544 00:40:34.824688
2545 00:40:34.827848 Byte1, DQ PI dly=978, DQM PI dly= 978
2546 00:40:34.830693 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2547 00:40:34.831187
2548 00:40:34.838107 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2549 00:40:34.838596
2550 00:40:34.838931 ==
2551 00:40:34.840911 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2552 00:40:34.844002 fsp= 1, odt_onoff= 1, Byte mode= 0
2553 00:40:34.844441 ==
2554 00:40:34.848045 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2555 00:40:34.851004
2556 00:40:34.851443 Begin, DQ Scan Range 954~1018
2557 00:40:34.854207 Write Rank0 MR14 =0x0
2558 00:40:34.862492
2559 00:40:34.862931 CH=1, VrefRange= 0, VrefLevel = 0
2560 00:40:34.869386 TX Bit0 (978~997) 20 987, Bit8 (969~985) 17 977,
2561 00:40:34.872571 TX Bit1 (977~995) 19 986, Bit9 (969~985) 17 977,
2562 00:40:34.879043 TX Bit2 (977~991) 15 984, Bit10 (970~985) 16 977,
2563 00:40:34.882720 TX Bit3 (975~990) 16 982, Bit11 (971~988) 18 979,
2564 00:40:34.885965 TX Bit4 (977~992) 16 984, Bit12 (970~988) 19 979,
2565 00:40:34.892821 TX Bit5 (978~997) 20 987, Bit13 (972~988) 17 980,
2566 00:40:34.895874 TX Bit6 (979~997) 19 988, Bit14 (970~986) 17 978,
2567 00:40:34.899177 TX Bit7 (977~991) 15 984, Bit15 (967~985) 19 976,
2568 00:40:34.899606
2569 00:40:34.902708 Write Rank0 MR14 =0x2
2570 00:40:34.911246
2571 00:40:34.911768 CH=1, VrefRange= 0, VrefLevel = 2
2572 00:40:34.918283 TX Bit0 (978~997) 20 987, Bit8 (968~985) 18 976,
2573 00:40:34.921324 TX Bit1 (977~995) 19 986, Bit9 (969~985) 17 977,
2574 00:40:34.928229 TX Bit2 (976~992) 17 984, Bit10 (970~986) 17 978,
2575 00:40:34.931329 TX Bit3 (975~990) 16 982, Bit11 (971~989) 19 980,
2576 00:40:34.934707 TX Bit4 (977~993) 17 985, Bit12 (970~989) 20 979,
2577 00:40:34.941506 TX Bit5 (977~997) 21 987, Bit13 (972~988) 17 980,
2578 00:40:34.944933 TX Bit6 (978~997) 20 987, Bit14 (970~986) 17 978,
2579 00:40:34.948048 TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976,
2580 00:40:34.948748
2581 00:40:34.951344 Write Rank0 MR14 =0x4
2582 00:40:34.960422
2583 00:40:34.960907 CH=1, VrefRange= 0, VrefLevel = 4
2584 00:40:34.967027 TX Bit0 (978~998) 21 988, Bit8 (968~986) 19 977,
2585 00:40:34.969874 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
2586 00:40:34.976807 TX Bit2 (976~992) 17 984, Bit10 (969~986) 18 977,
2587 00:40:34.980422 TX Bit3 (974~990) 17 982, Bit11 (971~989) 19 980,
2588 00:40:34.983887 TX Bit4 (977~993) 17 985, Bit12 (970~989) 20 979,
2589 00:40:34.989798 TX Bit5 (978~997) 20 987, Bit13 (971~989) 19 980,
2590 00:40:34.993231 TX Bit6 (978~997) 20 987, Bit14 (970~987) 18 978,
2591 00:40:34.996783 TX Bit7 (976~992) 17 984, Bit15 (967~985) 19 976,
2592 00:40:34.997237
2593 00:40:35.003191 wait MRW command Rank0 MR14 =0x6 fired (1)
2594 00:40:35.003622 Write Rank0 MR14 =0x6
2595 00:40:35.012530
2596 00:40:35.012947 CH=1, VrefRange= 0, VrefLevel = 6
2597 00:40:35.019221 TX Bit0 (978~998) 21 988, Bit8 (968~986) 19 977,
2598 00:40:35.022837 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
2599 00:40:35.030059 TX Bit2 (976~992) 17 984, Bit10 (969~987) 19 978,
2600 00:40:35.033224 TX Bit3 (973~991) 19 982, Bit11 (970~990) 21 980,
2601 00:40:35.036377 TX Bit4 (976~994) 19 985, Bit12 (970~990) 21 980,
2602 00:40:35.043360 TX Bit5 (977~998) 22 987, Bit13 (971~990) 20 980,
2603 00:40:35.046075 TX Bit6 (978~998) 21 988, Bit14 (970~988) 19 979,
2604 00:40:35.049670 TX Bit7 (976~993) 18 984, Bit15 (966~986) 21 976,
2605 00:40:35.050179
2606 00:40:35.052591 Write Rank0 MR14 =0x8
2607 00:40:35.061721
2608 00:40:35.062218 CH=1, VrefRange= 0, VrefLevel = 8
2609 00:40:35.068331 TX Bit0 (977~998) 22 987, Bit8 (968~987) 20 977,
2610 00:40:35.071881 TX Bit1 (976~997) 22 986, Bit9 (967~987) 21 977,
2611 00:40:35.078847 TX Bit2 (975~993) 19 984, Bit10 (969~987) 19 978,
2612 00:40:35.082034 TX Bit3 (973~991) 19 982, Bit11 (970~990) 21 980,
2613 00:40:35.084971 TX Bit4 (976~994) 19 985, Bit12 (969~990) 22 979,
2614 00:40:35.091988 TX Bit5 (977~998) 22 987, Bit13 (970~990) 21 980,
2615 00:40:35.095230 TX Bit6 (978~998) 21 988, Bit14 (970~988) 19 979,
2616 00:40:35.098880 TX Bit7 (976~993) 18 984, Bit15 (966~986) 21 976,
2617 00:40:35.099412
2618 00:40:35.101578 Write Rank0 MR14 =0xa
2619 00:40:35.110646
2620 00:40:35.114027 CH=1, VrefRange= 0, VrefLevel = 10
2621 00:40:35.117471 TX Bit0 (977~999) 23 988, Bit8 (968~987) 20 977,
2622 00:40:35.120572 TX Bit1 (976~997) 22 986, Bit9 (968~987) 20 977,
2623 00:40:35.127254 TX Bit2 (975~993) 19 984, Bit10 (969~988) 20 978,
2624 00:40:35.130624 TX Bit3 (972~992) 21 982, Bit11 (970~991) 22 980,
2625 00:40:35.133655 TX Bit4 (976~995) 20 985, Bit12 (969~991) 23 980,
2626 00:40:35.140522 TX Bit5 (977~998) 22 987, Bit13 (970~991) 22 980,
2627 00:40:35.143713 TX Bit6 (978~999) 22 988, Bit14 (969~989) 21 979,
2628 00:40:35.147334 TX Bit7 (976~994) 19 985, Bit15 (966~986) 21 976,
2629 00:40:35.150389
2630 00:40:35.150804 Write Rank0 MR14 =0xc
2631 00:40:35.159998
2632 00:40:35.162967 CH=1, VrefRange= 0, VrefLevel = 12
2633 00:40:35.166442 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
2634 00:40:35.169811 TX Bit1 (976~998) 23 987, Bit9 (968~988) 21 978,
2635 00:40:35.176487 TX Bit2 (975~994) 20 984, Bit10 (969~989) 21 979,
2636 00:40:35.179957 TX Bit3 (972~992) 21 982, Bit11 (970~991) 22 980,
2637 00:40:35.183067 TX Bit4 (976~996) 21 986, Bit12 (969~991) 23 980,
2638 00:40:35.189918 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
2639 00:40:35.193231 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2640 00:40:35.196171 TX Bit7 (976~994) 19 985, Bit15 (966~987) 22 976,
2641 00:40:35.196588
2642 00:40:35.199716 Write Rank0 MR14 =0xe
2643 00:40:35.208828
2644 00:40:35.212233 CH=1, VrefRange= 0, VrefLevel = 14
2645 00:40:35.215490 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
2646 00:40:35.219044 TX Bit1 (976~998) 23 987, Bit9 (967~989) 23 978,
2647 00:40:35.225536 TX Bit2 (974~994) 21 984, Bit10 (968~989) 22 978,
2648 00:40:35.228893 TX Bit3 (972~992) 21 982, Bit11 (969~991) 23 980,
2649 00:40:35.232292 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2650 00:40:35.238759 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
2651 00:40:35.242038 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2652 00:40:35.245434 TX Bit7 (976~995) 20 985, Bit15 (965~988) 24 976,
2653 00:40:35.245937
2654 00:40:35.248807 Write Rank0 MR14 =0x10
2655 00:40:35.258460
2656 00:40:35.261503 CH=1, VrefRange= 0, VrefLevel = 16
2657 00:40:35.264780 TX Bit0 (977~1000) 24 988, Bit8 (967~989) 23 978,
2658 00:40:35.268327 TX Bit1 (976~998) 23 987, Bit9 (966~989) 24 977,
2659 00:40:35.275116 TX Bit2 (974~995) 22 984, Bit10 (968~990) 23 979,
2660 00:40:35.278472 TX Bit3 (971~992) 22 981, Bit11 (969~991) 23 980,
2661 00:40:35.281887 TX Bit4 (975~997) 23 986, Bit12 (969~991) 23 980,
2662 00:40:35.288948 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2663 00:40:35.291366 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
2664 00:40:35.294748 TX Bit7 (975~996) 22 985, Bit15 (964~988) 25 976,
2665 00:40:35.298249
2666 00:40:35.298669 Write Rank0 MR14 =0x12
2667 00:40:35.307786
2668 00:40:35.311108 CH=1, VrefRange= 0, VrefLevel = 18
2669 00:40:35.314321 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
2670 00:40:35.317892 TX Bit1 (976~999) 24 987, Bit9 (967~989) 23 978,
2671 00:40:35.324525 TX Bit2 (974~996) 23 985, Bit10 (968~990) 23 979,
2672 00:40:35.327979 TX Bit3 (971~993) 23 982, Bit11 (969~992) 24 980,
2673 00:40:35.331337 TX Bit4 (975~998) 24 986, Bit12 (968~992) 25 980,
2674 00:40:35.338079 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2675 00:40:35.341602 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2676 00:40:35.344847 TX Bit7 (975~996) 22 985, Bit15 (965~988) 24 976,
2677 00:40:35.345294
2678 00:40:35.347781 Write Rank0 MR14 =0x14
2679 00:40:35.357206
2680 00:40:35.360477 CH=1, VrefRange= 0, VrefLevel = 20
2681 00:40:35.363815 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2682 00:40:35.367316 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
2683 00:40:35.373805 TX Bit2 (973~996) 24 984, Bit10 (967~991) 25 979,
2684 00:40:35.377317 TX Bit3 (971~994) 24 982, Bit11 (969~992) 24 980,
2685 00:40:35.380472 TX Bit4 (975~998) 24 986, Bit12 (968~992) 25 980,
2686 00:40:35.387467 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2687 00:40:35.390742 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2688 00:40:35.394281 TX Bit7 (975~997) 23 986, Bit15 (964~989) 26 976,
2689 00:40:35.397085
2690 00:40:35.397550 Write Rank0 MR14 =0x16
2691 00:40:35.406983
2692 00:40:35.410096 CH=1, VrefRange= 0, VrefLevel = 22
2693 00:40:35.413377 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2694 00:40:35.417029 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2695 00:40:35.423596 TX Bit2 (973~997) 25 985, Bit10 (967~991) 25 979,
2696 00:40:35.427323 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2697 00:40:35.430507 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2698 00:40:35.436890 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2699 00:40:35.440765 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2700 00:40:35.444204 TX Bit7 (974~998) 25 986, Bit15 (964~988) 25 976,
2701 00:40:35.446980
2702 00:40:35.447403 Write Rank0 MR14 =0x18
2703 00:40:35.457100
2704 00:40:35.459882 CH=1, VrefRange= 0, VrefLevel = 24
2705 00:40:35.463344 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
2706 00:40:35.466808 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2707 00:40:35.473443 TX Bit2 (972~996) 25 984, Bit10 (968~991) 24 979,
2708 00:40:35.476751 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2709 00:40:35.480583 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2710 00:40:35.487127 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2711 00:40:35.490145 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2712 00:40:35.493857 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2713 00:40:35.496949
2714 00:40:35.497650 Write Rank0 MR14 =0x1a
2715 00:40:35.506802
2716 00:40:35.510143 CH=1, VrefRange= 0, VrefLevel = 26
2717 00:40:35.513741 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
2718 00:40:35.516542 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2719 00:40:35.523192 TX Bit2 (972~996) 25 984, Bit10 (968~991) 24 979,
2720 00:40:35.526547 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2721 00:40:35.529711 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2722 00:40:35.536320 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2723 00:40:35.540112 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2724 00:40:35.543068 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2725 00:40:35.546505
2726 00:40:35.546925 Write Rank0 MR14 =0x1c
2727 00:40:35.556512
2728 00:40:35.559524 CH=1, VrefRange= 0, VrefLevel = 28
2729 00:40:35.562908 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
2730 00:40:35.566091 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2731 00:40:35.573156 TX Bit2 (972~996) 25 984, Bit10 (968~991) 24 979,
2732 00:40:35.576459 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2733 00:40:35.579364 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2734 00:40:35.586200 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2735 00:40:35.589568 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2736 00:40:35.592733 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2737 00:40:35.596017
2738 00:40:35.596576 Write Rank0 MR14 =0x1e
2739 00:40:35.605570
2740 00:40:35.609312 CH=1, VrefRange= 0, VrefLevel = 30
2741 00:40:35.612737 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
2742 00:40:35.615989 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2743 00:40:35.622990 TX Bit2 (972~996) 25 984, Bit10 (968~991) 24 979,
2744 00:40:35.625599 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2745 00:40:35.628923 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2746 00:40:35.635981 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2747 00:40:35.639062 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2748 00:40:35.642397 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2749 00:40:35.645583
2750 00:40:35.646162 Write Rank0 MR14 =0x20
2751 00:40:35.655432
2752 00:40:35.658383 CH=1, VrefRange= 0, VrefLevel = 32
2753 00:40:35.661900 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
2754 00:40:35.665388 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
2755 00:40:35.672179 TX Bit2 (972~996) 25 984, Bit10 (968~991) 24 979,
2756 00:40:35.675259 TX Bit3 (970~994) 25 982, Bit11 (968~992) 25 980,
2757 00:40:35.678546 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
2758 00:40:35.685175 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2759 00:40:35.688567 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2760 00:40:35.695162 TX Bit7 (974~998) 25 986, Bit15 (963~988) 26 975,
2761 00:40:35.695590
2762 00:40:35.695994
2763 00:40:35.698516 TX Vref found, early break! 371< 380
2764 00:40:35.702022 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2765 00:40:35.705106 u1DelayCellOfst[0]=7 cells (6 PI)
2766 00:40:35.708425 u1DelayCellOfst[1]=6 cells (5 PI)
2767 00:40:35.711572 u1DelayCellOfst[2]=2 cells (2 PI)
2768 00:40:35.714973 u1DelayCellOfst[3]=0 cells (0 PI)
2769 00:40:35.718877 u1DelayCellOfst[4]=5 cells (4 PI)
2770 00:40:35.719059 u1DelayCellOfst[5]=7 cells (6 PI)
2771 00:40:35.721582 u1DelayCellOfst[6]=7 cells (6 PI)
2772 00:40:35.724895 u1DelayCellOfst[7]=5 cells (4 PI)
2773 00:40:35.728742 Byte0, DQ PI dly=982, DQM PI dly= 985
2774 00:40:35.734981 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2775 00:40:35.735181
2776 00:40:35.738260 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2777 00:40:35.738441
2778 00:40:35.742003 u1DelayCellOfst[8]=3 cells (3 PI)
2779 00:40:35.744902 u1DelayCellOfst[9]=3 cells (3 PI)
2780 00:40:35.748391 u1DelayCellOfst[10]=5 cells (4 PI)
2781 00:40:35.752179 u1DelayCellOfst[11]=6 cells (5 PI)
2782 00:40:35.755481 u1DelayCellOfst[12]=6 cells (5 PI)
2783 00:40:35.756025 u1DelayCellOfst[13]=6 cells (5 PI)
2784 00:40:35.758925 u1DelayCellOfst[14]=5 cells (4 PI)
2785 00:40:35.761876 u1DelayCellOfst[15]=0 cells (0 PI)
2786 00:40:35.765348 Byte1, DQ PI dly=975, DQM PI dly= 977
2787 00:40:35.772042 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2788 00:40:35.772531
2789 00:40:35.775292 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2790 00:40:35.775728
2791 00:40:35.778610 Write Rank0 MR14 =0x18
2792 00:40:35.779034
2793 00:40:35.779367 Final TX Range 0 Vref 24
2794 00:40:35.779681
2795 00:40:35.785144 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2796 00:40:35.785597
2797 00:40:35.791836 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2798 00:40:35.802143 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2799 00:40:35.808610 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2800 00:40:35.809102 Write Rank0 MR3 =0xb0
2801 00:40:35.811899 DramC Write-DBI on
2802 00:40:35.812314 ==
2803 00:40:35.814937 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2804 00:40:35.818645 fsp= 1, odt_onoff= 1, Byte mode= 0
2805 00:40:35.819079 ==
2806 00:40:35.825412 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2807 00:40:35.825832
2808 00:40:35.826166 Begin, DQ Scan Range 697~761
2809 00:40:35.826480
2810 00:40:35.828610
2811 00:40:35.829023 TX Vref Scan disable
2812 00:40:35.831834 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2813 00:40:35.835195 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2814 00:40:35.838538 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2815 00:40:35.841830 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2816 00:40:35.845474 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2817 00:40:35.848917 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2818 00:40:35.855036 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2819 00:40:35.858565 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2820 00:40:35.861685 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2821 00:40:35.865028 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2822 00:40:35.869041 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2823 00:40:35.872070 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2824 00:40:35.875032 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2825 00:40:35.878678 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2826 00:40:35.882264 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2827 00:40:35.885289 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2828 00:40:35.888354 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2829 00:40:35.891992 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2830 00:40:35.895077 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2831 00:40:35.898455 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2832 00:40:35.901728 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2833 00:40:35.909871 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2834 00:40:35.913593 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2835 00:40:35.916647 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2836 00:40:35.919998 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2837 00:40:35.923366 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2838 00:40:35.926800 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2839 00:40:35.930230 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2840 00:40:35.933670 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2841 00:40:35.936910 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2842 00:40:35.939948 Byte0, DQ PI dly=730, DQM PI dly= 730
2843 00:40:35.943242 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2844 00:40:35.943668
2845 00:40:35.949864 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2846 00:40:35.950383
2847 00:40:35.953312 Byte1, DQ PI dly=721, DQM PI dly= 721
2848 00:40:35.956804 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2849 00:40:35.957329
2850 00:40:35.960442 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2851 00:40:35.960985
2852 00:40:35.966734 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2853 00:40:35.973351 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2854 00:40:35.983342 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2855 00:40:35.983763 Write Rank0 MR3 =0x30
2856 00:40:35.986616 DramC Write-DBI off
2857 00:40:35.987032
2858 00:40:35.987367 [DATLAT]
2859 00:40:35.990401 Freq=1600, CH1 RK0, use_rxtx_scan=0
2860 00:40:35.990922
2861 00:40:35.993502 DATLAT Default: 0xf
2862 00:40:35.993922 7, 0xFFFF, sum=0
2863 00:40:35.996647 8, 0xFFFF, sum=0
2864 00:40:35.997072 9, 0xFFFF, sum=0
2865 00:40:35.997453 10, 0xFFFF, sum=0
2866 00:40:36.000077 11, 0xFFFF, sum=0
2867 00:40:36.000519 12, 0xFFFF, sum=0
2868 00:40:36.003453 13, 0xFFFF, sum=0
2869 00:40:36.003883 14, 0x0, sum=1
2870 00:40:36.006645 15, 0x0, sum=2
2871 00:40:36.007076 16, 0x0, sum=3
2872 00:40:36.009986 17, 0x0, sum=4
2873 00:40:36.013451 pattern=2 first_step=14 total pass=5 best_step=16
2874 00:40:36.013878 ==
2875 00:40:36.019968 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2876 00:40:36.020399 fsp= 1, odt_onoff= 1, Byte mode= 0
2877 00:40:36.023572 ==
2878 00:40:36.026433 Start DQ dly to find pass range UseTestEngine =1
2879 00:40:36.029859 x-axis: bit #, y-axis: DQ dly (-127~63)
2880 00:40:36.030283 RX Vref Scan = 1
2881 00:40:36.154026
2882 00:40:36.154523 RX Vref found, early break!
2883 00:40:36.154861
2884 00:40:36.160280 Final RX Vref 13, apply to both rank0 and 1
2885 00:40:36.160780 ==
2886 00:40:36.164011 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2887 00:40:36.167251 fsp= 1, odt_onoff= 1, Byte mode= 0
2888 00:40:36.167805 ==
2889 00:40:36.168290 DQS Delay:
2890 00:40:36.170778 DQS0 = 0, DQS1 = 0
2891 00:40:36.171274 DQM Delay:
2892 00:40:36.173996 DQM0 = 20, DQM1 = 18
2893 00:40:36.174481 DQ Delay:
2894 00:40:36.176971 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2895 00:40:36.180092 DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =19
2896 00:40:36.183755 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2897 00:40:36.186866 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2898 00:40:36.187294
2899 00:40:36.187628
2900 00:40:36.188013
2901 00:40:36.190382 [DramC_TX_OE_Calibration] TA2
2902 00:40:36.193483 Original DQ_B0 (3 6) =30, OEN = 27
2903 00:40:36.196848 Original DQ_B1 (3 6) =30, OEN = 27
2904 00:40:36.200626 23, 0x0, End_B0=23 End_B1=23
2905 00:40:36.201133 24, 0x0, End_B0=24 End_B1=24
2906 00:40:36.203686 25, 0x0, End_B0=25 End_B1=25
2907 00:40:36.206896 26, 0x0, End_B0=26 End_B1=26
2908 00:40:36.210281 27, 0x0, End_B0=27 End_B1=27
2909 00:40:36.210705 28, 0x0, End_B0=28 End_B1=28
2910 00:40:36.213803 29, 0x0, End_B0=29 End_B1=29
2911 00:40:36.217099 30, 0x0, End_B0=30 End_B1=30
2912 00:40:36.220542 31, 0xFFFF, End_B0=30 End_B1=30
2913 00:40:36.227072 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2914 00:40:36.230510 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2915 00:40:36.231049
2916 00:40:36.231498
2917 00:40:36.233989 Write Rank0 MR23 =0x3f
2918 00:40:36.234429 [DQSOSC]
2919 00:40:36.241157 [DQSOSCAuto] RK0, (LSB)MR18= 0xbf, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2920 00:40:36.247699 CH1_RK0: MR19=0x3, MR18=0xBF, DQSOSC=328, MR23=63, INC=22, DEC=34
2921 00:40:36.250790 Write Rank0 MR23 =0x3f
2922 00:40:36.251320 [DQSOSC]
2923 00:40:36.257443 [DQSOSCAuto] RK0, (LSB)MR18= 0xbe, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2924 00:40:36.260807 CH1 RK0: MR19=3, MR18=BE
2925 00:40:36.264264 [RankSwap] Rank num 2, (Multi 1), Rank 1
2926 00:40:36.267433 Write Rank0 MR2 =0xad
2927 00:40:36.267873 [Write Leveling]
2928 00:40:36.271009 delay byte0 byte1 byte2 byte3
2929 00:40:36.271532
2930 00:40:36.271986 10 0 0
2931 00:40:36.274178 11 0 0
2932 00:40:36.274684 12 0 0
2933 00:40:36.277442 13 0 0
2934 00:40:36.277885 14 0 0
2935 00:40:36.278328 15 0 0
2936 00:40:36.280658 16 0 0
2937 00:40:36.281106 17 0 0
2938 00:40:36.283927 18 0 0
2939 00:40:36.284370 19 0 0
2940 00:40:36.287622 20 0 0
2941 00:40:36.288154 21 0 0
2942 00:40:36.288605 22 0 0
2943 00:40:36.290641 23 0 0
2944 00:40:36.291085 24 0 0
2945 00:40:36.293881 25 0 0
2946 00:40:36.294324 26 0 0
2947 00:40:36.294770 27 0 0
2948 00:40:36.297692 28 0 0
2949 00:40:36.298134 29 0 0
2950 00:40:36.300727 30 0 0
2951 00:40:36.301168 31 0 ff
2952 00:40:36.303756 32 0 ff
2953 00:40:36.304181 33 0 ff
2954 00:40:36.304565 34 0 ff
2955 00:40:36.307696 35 ff ff
2956 00:40:36.308210 36 ff ff
2957 00:40:36.310452 37 ff ff
2958 00:40:36.310884 38 ff ff
2959 00:40:36.314092 39 ff ff
2960 00:40:36.314536 40 ff ff
2961 00:40:36.317286 41 ff ff
2962 00:40:36.321158 pass bytecount = 0xff (0xff: all bytes pass)
2963 00:40:36.321707
2964 00:40:36.322061 DQS0 dly: 35
2965 00:40:36.324037 DQS1 dly: 31
2966 00:40:36.324457 Write Rank0 MR2 =0x2d
2967 00:40:36.327252 [RankSwap] Rank num 2, (Multi 1), Rank 0
2968 00:40:36.330692 Write Rank1 MR1 =0xd6
2969 00:40:36.331209 [Gating]
2970 00:40:36.331552 ==
2971 00:40:36.337442 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2972 00:40:36.340480 fsp= 1, odt_onoff= 1, Byte mode= 0
2973 00:40:36.340901 ==
2974 00:40:36.343838 3 1 0 |3433 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2975 00:40:36.347329 3 1 4 |3434 3534 |(10 10)(11 11) |(0 1)(1 1)| 0
2976 00:40:36.354029 3 1 8 |2e2e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2977 00:40:36.356911 3 1 12 |3030 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2978 00:40:36.360228 3 1 16 |3130 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2979 00:40:36.366933 3 1 20 |2e2e 3534 |(10 10)(11 11) |(0 1)(0 1)| 0
2980 00:40:36.370180 3 1 24 |3131 3534 |(11 10)(11 11) |(1 1)(0 1)| 0
2981 00:40:36.373438 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2982 00:40:36.380213 3 2 0 |3737 201 |(0 0)(11 11) |(0 0)(1 1)| 0
2983 00:40:36.384190 3 2 4 |3b3b 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2984 00:40:36.387160 3 2 8 |3636 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2985 00:40:36.390159 3 2 12 |1d1c 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2986 00:40:36.396956 3 2 16 |3d3c 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2987 00:40:36.400397 3 2 20 |3939 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2988 00:40:36.403702 3 2 24 |d0c 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2989 00:40:36.410318 3 2 28 |706 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2990 00:40:36.413839 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2991 00:40:36.417515 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2992 00:40:36.420701 3 3 4 |3534 403 |(11 11)(11 11) |(0 1)(1 1)| 0
2993 00:40:36.427207 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2994 00:40:36.430731 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2995 00:40:36.433709 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2996 00:40:36.440148 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2997 00:40:36.444161 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2998 00:40:36.446784 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2999 00:40:36.453701 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3000 00:40:36.456812 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(0 1)| 0
3001 00:40:36.460419 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3002 00:40:36.463841 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3003 00:40:36.470151 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3004 00:40:36.473615 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3005 00:40:36.477384 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3006 00:40:36.483676 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3007 00:40:36.486865 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3008 00:40:36.490275 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3009 00:40:36.497201 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3010 00:40:36.500218 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3011 00:40:36.503455 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3012 00:40:36.506913 [Byte 0] Lead/lag falling Transition (3, 5, 12)
3013 00:40:36.513888 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3014 00:40:36.517020 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3015 00:40:36.520526 [Byte 0] Lead/lag Transition tap number (3)
3016 00:40:36.526689 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3017 00:40:36.530292 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3018 00:40:36.533406 3 5 28 |403 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
3019 00:40:36.537142 [Byte 1] Lead/lag Transition tap number (2)
3020 00:40:36.543894 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3021 00:40:36.544420 [Byte 0]First pass (3, 6, 0)
3022 00:40:36.546988 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3023 00:40:36.550491 [Byte 1]First pass (3, 6, 4)
3024 00:40:36.553332 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3025 00:40:36.560074 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3026 00:40:36.563801 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3027 00:40:36.566927 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3028 00:40:36.570126 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3029 00:40:36.576876 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3030 00:40:36.580389 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3031 00:40:36.583604 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3032 00:40:36.587061 All bytes gating window > 1UI, Early break!
3033 00:40:36.587531
3034 00:40:36.590347 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 18)
3035 00:40:36.590762
3036 00:40:36.593385 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
3037 00:40:36.593802
3038 00:40:36.594134
3039 00:40:36.596760
3040 00:40:36.599960 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 18)
3041 00:40:36.600380
3042 00:40:36.603234 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3043 00:40:36.603653
3044 00:40:36.603985
3045 00:40:36.606739 Write Rank1 MR1 =0x56
3046 00:40:36.607158
3047 00:40:36.610188 best RODT dly(2T, 0.5T) = (2, 2)
3048 00:40:36.610702
3049 00:40:36.611053 best RODT dly(2T, 0.5T) = (2, 2)
3050 00:40:36.613341 ==
3051 00:40:36.617040 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3052 00:40:36.620462 fsp= 1, odt_onoff= 1, Byte mode= 0
3053 00:40:36.620962 ==
3054 00:40:36.623199 Start DQ dly to find pass range UseTestEngine =0
3055 00:40:36.626883 x-axis: bit #, y-axis: DQ dly (-127~63)
3056 00:40:36.630576 RX Vref Scan = 0
3057 00:40:36.633415 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3058 00:40:36.637035 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3059 00:40:36.640066 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3060 00:40:36.640505 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3061 00:40:36.643628 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3062 00:40:36.646743 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3063 00:40:36.650162 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3064 00:40:36.653455 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3065 00:40:36.656770 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3066 00:40:36.660168 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3067 00:40:36.663723 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3068 00:40:36.664249 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3069 00:40:36.667103 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3070 00:40:36.669931 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3071 00:40:36.673499 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3072 00:40:36.676791 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3073 00:40:36.680011 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3074 00:40:36.683700 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3075 00:40:36.686905 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3076 00:40:36.687330 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3077 00:40:36.689817 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3078 00:40:36.693709 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3079 00:40:36.697047 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3080 00:40:36.700049 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3081 00:40:36.703570 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3082 00:40:36.703989 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3083 00:40:36.706812 0, [0] xxooxxxo xxxxxxxo [MSB]
3084 00:40:36.709989 1, [0] xxooxxxo xxxxxxxo [MSB]
3085 00:40:36.713500 2, [0] xxoooxxo xxxxxxxo [MSB]
3086 00:40:36.716997 3, [0] xxoooxxo oooxxooo [MSB]
3087 00:40:36.720913 4, [0] xxoooxxo ooooxooo [MSB]
3088 00:40:36.721452 5, [0] xoooooxo oooooooo [MSB]
3089 00:40:36.723972 6, [0] xoooooxo oooooooo [MSB]
3090 00:40:36.727368 34, [0] oooxoooo oooooooo [MSB]
3091 00:40:36.730418 35, [0] ooxxoooo ooooooox [MSB]
3092 00:40:36.733376 36, [0] ooxxoooo ooooooox [MSB]
3093 00:40:36.736694 37, [0] ooxxoooo ooxoooox [MSB]
3094 00:40:36.740349 38, [0] ooxxxooo xoxooxox [MSB]
3095 00:40:36.740821 39, [0] ooxxxoox xxxxoxxx [MSB]
3096 00:40:36.743752 40, [0] ooxxxoox xxxxoxxx [MSB]
3097 00:40:36.747260 41, [0] ooxxxoox xxxxxxxx [MSB]
3098 00:40:36.750167 42, [0] oxxxxxxx xxxxxxxx [MSB]
3099 00:40:36.753478 43, [0] xxxxxxxx xxxxxxxx [MSB]
3100 00:40:36.757434 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3101 00:40:36.760554 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
3102 00:40:36.763910 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3103 00:40:36.767605 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3104 00:40:36.769881 iDelay=43, Bit 4, Center 19 (2 ~ 37) 36
3105 00:40:36.773479 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3106 00:40:36.776866 iDelay=43, Bit 6, Center 24 (7 ~ 41) 35
3107 00:40:36.780518 iDelay=43, Bit 7, Center 19 (0 ~ 38) 39
3108 00:40:36.783719 iDelay=43, Bit 8, Center 20 (3 ~ 37) 35
3109 00:40:36.790216 iDelay=43, Bit 9, Center 20 (3 ~ 38) 36
3110 00:40:36.793780 iDelay=43, Bit 10, Center 19 (3 ~ 36) 34
3111 00:40:36.796628 iDelay=43, Bit 11, Center 21 (4 ~ 38) 35
3112 00:40:36.800422 iDelay=43, Bit 12, Center 22 (5 ~ 40) 36
3113 00:40:36.803613 iDelay=43, Bit 13, Center 20 (3 ~ 37) 35
3114 00:40:36.806760 iDelay=43, Bit 14, Center 20 (3 ~ 38) 36
3115 00:40:36.810264 iDelay=43, Bit 15, Center 16 (-1 ~ 34) 36
3116 00:40:36.810683 ==
3117 00:40:36.816838 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3118 00:40:36.819999 fsp= 1, odt_onoff= 1, Byte mode= 0
3119 00:40:36.820528 ==
3120 00:40:36.820869 DQS Delay:
3121 00:40:36.823398 DQS0 = 0, DQS1 = 0
3122 00:40:36.823846 DQM Delay:
3123 00:40:36.824208 DQM0 = 20, DQM1 = 19
3124 00:40:36.827260 DQ Delay:
3125 00:40:36.829795 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3126 00:40:36.833760 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3127 00:40:36.836514 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =21
3128 00:40:36.839998 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3129 00:40:36.840588
3130 00:40:36.840927
3131 00:40:36.841232 DramC Write-DBI off
3132 00:40:36.841595 ==
3133 00:40:36.846381 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3134 00:40:36.850173 fsp= 1, odt_onoff= 1, Byte mode= 0
3135 00:40:36.850614 ==
3136 00:40:36.853121 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3137 00:40:36.853629
3138 00:40:36.856927 Begin, DQ Scan Range 927~1183
3139 00:40:36.857504
3140 00:40:36.857848
3141 00:40:36.859690 TX Vref Scan disable
3142 00:40:36.863502 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3143 00:40:36.866511 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3144 00:40:36.870111 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3145 00:40:36.873324 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3146 00:40:36.876477 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3147 00:40:36.880276 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3148 00:40:36.883184 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3149 00:40:36.886574 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3150 00:40:36.889838 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3151 00:40:36.893112 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3152 00:40:36.896450 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3153 00:40:36.899651 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3154 00:40:36.902972 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3155 00:40:36.909523 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3156 00:40:36.913072 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3157 00:40:36.916463 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3158 00:40:36.919688 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3159 00:40:36.922886 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3160 00:40:36.926237 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3161 00:40:36.929797 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3162 00:40:36.932762 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3163 00:40:36.936148 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3164 00:40:36.939734 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3165 00:40:36.942752 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3166 00:40:36.945948 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3167 00:40:36.949729 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3168 00:40:36.952650 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3169 00:40:36.956337 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3170 00:40:36.963186 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3171 00:40:36.966255 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3172 00:40:36.969237 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3173 00:40:36.972880 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3174 00:40:36.976284 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3175 00:40:36.979739 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3176 00:40:36.982508 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3177 00:40:36.986313 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3178 00:40:36.989709 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3179 00:40:36.992785 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3180 00:40:36.996372 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
3181 00:40:36.999546 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3182 00:40:37.003191 967 |3 6 7|[0] xxxxxxxx xoxxxxxo [MSB]
3183 00:40:37.006337 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
3184 00:40:37.009505 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
3185 00:40:37.012728 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3186 00:40:37.016246 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3187 00:40:37.020153 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3188 00:40:37.022819 973 |3 6 13|[0] xxooxxxx oooooooo [MSB]
3189 00:40:37.026346 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3190 00:40:37.029716 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3191 00:40:37.033050 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3192 00:40:37.041468 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3193 00:40:37.044198 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3194 00:40:37.047782 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3195 00:40:37.051351 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3196 00:40:37.054380 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3197 00:40:37.057718 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3198 00:40:37.061308 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3199 00:40:37.064213 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3200 00:40:37.067922 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
3201 00:40:37.071228 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3202 00:40:37.074415 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3203 00:40:37.077939 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3204 00:40:37.081425 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3205 00:40:37.084733 Byte0, DQ PI dly=985, DQM PI dly= 985
3206 00:40:37.090993 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3207 00:40:37.091422
3208 00:40:37.094687 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3209 00:40:37.095117
3210 00:40:37.097617 Byte1, DQ PI dly=977, DQM PI dly= 977
3211 00:40:37.101242 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3212 00:40:37.101713
3213 00:40:37.107560 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3214 00:40:37.107986
3215 00:40:37.108320 ==
3216 00:40:37.111017 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3217 00:40:37.114223 fsp= 1, odt_onoff= 1, Byte mode= 0
3218 00:40:37.114651 ==
3219 00:40:37.121046 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3220 00:40:37.121513
3221 00:40:37.121854 Begin, DQ Scan Range 953~1017
3222 00:40:37.124258 Write Rank1 MR14 =0x0
3223 00:40:37.133371
3224 00:40:37.133798 CH=1, VrefRange= 0, VrefLevel = 0
3225 00:40:37.140159 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
3226 00:40:37.143347 TX Bit1 (978~995) 18 986, Bit9 (969~985) 17 977,
3227 00:40:37.150308 TX Bit2 (976~991) 16 983, Bit10 (970~985) 16 977,
3228 00:40:37.153551 TX Bit3 (975~990) 16 982, Bit11 (971~988) 18 979,
3229 00:40:37.156940 TX Bit4 (976~992) 17 984, Bit12 (970~986) 17 978,
3230 00:40:37.163507 TX Bit5 (978~996) 19 987, Bit13 (971~985) 15 978,
3231 00:40:37.166952 TX Bit6 (979~998) 20 988, Bit14 (970~986) 17 978,
3232 00:40:37.170075 TX Bit7 (978~992) 15 985, Bit15 (967~984) 18 975,
3233 00:40:37.170596
3234 00:40:37.173469 Write Rank1 MR14 =0x2
3235 00:40:37.182575
3236 00:40:37.183063 CH=1, VrefRange= 0, VrefLevel = 2
3237 00:40:37.189471 TX Bit0 (979~998) 20 988, Bit8 (969~986) 18 977,
3238 00:40:37.192661 TX Bit1 (978~996) 19 987, Bit9 (969~985) 17 977,
3239 00:40:37.198970 TX Bit2 (976~991) 16 983, Bit10 (970~985) 16 977,
3240 00:40:37.202677 TX Bit3 (974~991) 18 982, Bit11 (970~989) 20 979,
3241 00:40:37.205888 TX Bit4 (976~993) 18 984, Bit12 (970~987) 18 978,
3242 00:40:37.212549 TX Bit5 (978~997) 20 987, Bit13 (971~986) 16 978,
3243 00:40:37.215713 TX Bit6 (978~998) 21 988, Bit14 (970~986) 17 978,
3244 00:40:37.219162 TX Bit7 (977~992) 16 984, Bit15 (967~984) 18 975,
3245 00:40:37.219582
3246 00:40:37.222958 Write Rank1 MR14 =0x4
3247 00:40:37.231494
3248 00:40:37.231917 CH=1, VrefRange= 0, VrefLevel = 4
3249 00:40:37.238258 TX Bit0 (978~998) 21 988, Bit8 (969~986) 18 977,
3250 00:40:37.241507 TX Bit1 (978~997) 20 987, Bit9 (968~985) 18 976,
3251 00:40:37.248348 TX Bit2 (975~992) 18 983, Bit10 (969~986) 18 977,
3252 00:40:37.251857 TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980,
3253 00:40:37.254959 TX Bit4 (976~993) 18 984, Bit12 (969~988) 20 978,
3254 00:40:37.261814 TX Bit5 (978~997) 20 987, Bit13 (971~987) 17 979,
3255 00:40:37.265320 TX Bit6 (978~998) 21 988, Bit14 (970~987) 18 978,
3256 00:40:37.268405 TX Bit7 (977~992) 16 984, Bit15 (966~984) 19 975,
3257 00:40:37.268955
3258 00:40:37.271956 Write Rank1 MR14 =0x6
3259 00:40:37.280779
3260 00:40:37.281197 CH=1, VrefRange= 0, VrefLevel = 6
3261 00:40:37.287222 TX Bit0 (978~998) 21 988, Bit8 (969~987) 19 978,
3262 00:40:37.290699 TX Bit1 (978~997) 20 987, Bit9 (968~986) 19 977,
3263 00:40:37.297293 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
3264 00:40:37.300810 TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980,
3265 00:40:37.304449 TX Bit4 (976~994) 19 985, Bit12 (969~988) 20 978,
3266 00:40:37.310913 TX Bit5 (978~998) 21 988, Bit13 (971~987) 17 979,
3267 00:40:37.314339 TX Bit6 (978~998) 21 988, Bit14 (969~988) 20 978,
3268 00:40:37.317696 TX Bit7 (977~993) 17 985, Bit15 (966~985) 20 975,
3269 00:40:37.318118
3270 00:40:37.320661 Write Rank1 MR14 =0x8
3271 00:40:37.330367
3272 00:40:37.330858 CH=1, VrefRange= 0, VrefLevel = 8
3273 00:40:37.336787 TX Bit0 (978~999) 22 988, Bit8 (969~987) 19 978,
3274 00:40:37.340049 TX Bit1 (977~997) 21 987, Bit9 (968~987) 20 977,
3275 00:40:37.346442 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
3276 00:40:37.349860 TX Bit3 (973~992) 20 982, Bit11 (970~991) 22 980,
3277 00:40:37.353510 TX Bit4 (976~994) 19 985, Bit12 (969~989) 21 979,
3278 00:40:37.359765 TX Bit5 (977~998) 22 987, Bit13 (969~988) 20 978,
3279 00:40:37.363545 TX Bit6 (978~999) 22 988, Bit14 (969~988) 20 978,
3280 00:40:37.367055 TX Bit7 (977~994) 18 985, Bit15 (966~985) 20 975,
3281 00:40:37.367588
3282 00:40:37.370332 Write Rank1 MR14 =0xa
3283 00:40:37.379502
3284 00:40:37.382431 CH=1, VrefRange= 0, VrefLevel = 10
3285 00:40:37.385931 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978,
3286 00:40:37.389225 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
3287 00:40:37.396200 TX Bit2 (975~993) 19 984, Bit10 (969~988) 20 978,
3288 00:40:37.399142 TX Bit3 (973~992) 20 982, Bit11 (969~991) 23 980,
3289 00:40:37.402733 TX Bit4 (975~995) 21 985, Bit12 (969~990) 22 979,
3290 00:40:37.409379 TX Bit5 (977~998) 22 987, Bit13 (970~988) 19 979,
3291 00:40:37.412548 TX Bit6 (978~999) 22 988, Bit14 (969~989) 21 979,
3292 00:40:37.416024 TX Bit7 (976~994) 19 985, Bit15 (966~985) 20 975,
3293 00:40:37.419309
3294 00:40:37.419832 Write Rank1 MR14 =0xc
3295 00:40:37.429000
3296 00:40:37.432191 CH=1, VrefRange= 0, VrefLevel = 12
3297 00:40:37.435969 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
3298 00:40:37.439034 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
3299 00:40:37.445604 TX Bit2 (974~993) 20 983, Bit10 (969~988) 20 978,
3300 00:40:37.448667 TX Bit3 (973~993) 21 983, Bit11 (969~991) 23 980,
3301 00:40:37.452559 TX Bit4 (975~996) 22 985, Bit12 (969~990) 22 979,
3302 00:40:37.458991 TX Bit5 (977~998) 22 987, Bit13 (970~989) 20 979,
3303 00:40:37.462418 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
3304 00:40:37.465767 TX Bit7 (976~995) 20 985, Bit15 (965~985) 21 975,
3305 00:40:37.466190
3306 00:40:37.469061 Write Rank1 MR14 =0xe
3307 00:40:37.478563
3308 00:40:37.481914 CH=1, VrefRange= 0, VrefLevel = 14
3309 00:40:37.485599 TX Bit0 (977~1000) 24 988, Bit8 (968~989) 22 978,
3310 00:40:37.488148 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
3311 00:40:37.494953 TX Bit2 (974~994) 21 984, Bit10 (968~989) 22 978,
3312 00:40:37.498338 TX Bit3 (971~993) 23 982, Bit11 (969~991) 23 980,
3313 00:40:37.501607 TX Bit4 (975~997) 23 986, Bit12 (969~990) 22 979,
3314 00:40:37.508505 TX Bit5 (977~998) 22 987, Bit13 (969~990) 22 979,
3315 00:40:37.511677 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
3316 00:40:37.514828 TX Bit7 (976~996) 21 986, Bit15 (965~986) 22 975,
3317 00:40:37.515252
3318 00:40:37.518498 Write Rank1 MR14 =0x10
3319 00:40:37.527940
3320 00:40:37.528496 CH=1, VrefRange= 0, VrefLevel = 16
3321 00:40:37.535205 TX Bit0 (977~1000) 24 988, Bit8 (968~989) 22 978,
3322 00:40:37.538166 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
3323 00:40:37.544954 TX Bit2 (973~994) 22 983, Bit10 (968~990) 23 979,
3324 00:40:37.548024 TX Bit3 (971~994) 24 982, Bit11 (969~992) 24 980,
3325 00:40:37.551736 TX Bit4 (975~997) 23 986, Bit12 (968~991) 24 979,
3326 00:40:37.558044 TX Bit5 (977~999) 23 988, Bit13 (969~990) 22 979,
3327 00:40:37.561020 TX Bit6 (977~1000) 24 988, Bit14 (969~990) 22 979,
3328 00:40:37.564872 TX Bit7 (976~996) 21 986, Bit15 (965~986) 22 975,
3329 00:40:37.568236
3330 00:40:37.568763 Write Rank1 MR14 =0x12
3331 00:40:37.578264
3332 00:40:37.581406 CH=1, VrefRange= 0, VrefLevel = 18
3333 00:40:37.584313 TX Bit0 (977~1000) 24 988, Bit8 (968~990) 23 979,
3334 00:40:37.588132 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
3335 00:40:37.594373 TX Bit2 (973~995) 23 984, Bit10 (968~990) 23 979,
3336 00:40:37.597625 TX Bit3 (971~994) 24 982, Bit11 (968~992) 25 980,
3337 00:40:37.601296 TX Bit4 (974~997) 24 985, Bit12 (968~991) 24 979,
3338 00:40:37.607769 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
3339 00:40:37.611135 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
3340 00:40:37.614587 TX Bit7 (976~997) 22 986, Bit15 (965~987) 23 976,
3341 00:40:37.617990
3342 00:40:37.618400 Write Rank1 MR14 =0x14
3343 00:40:37.627614
3344 00:40:37.631179 CH=1, VrefRange= 0, VrefLevel = 20
3345 00:40:37.634723 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
3346 00:40:37.637806 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
3347 00:40:37.644824 TX Bit2 (973~996) 24 984, Bit10 (967~990) 24 978,
3348 00:40:37.648016 TX Bit3 (970~995) 26 982, Bit11 (969~992) 24 980,
3349 00:40:37.651298 TX Bit4 (974~997) 24 985, Bit12 (968~991) 24 979,
3350 00:40:37.657764 TX Bit5 (977~999) 23 988, Bit13 (969~991) 23 980,
3351 00:40:37.661371 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
3352 00:40:37.664579 TX Bit7 (976~997) 22 986, Bit15 (964~987) 24 975,
3353 00:40:37.667631
3354 00:40:37.668124 Write Rank1 MR14 =0x16
3355 00:40:37.677537
3356 00:40:37.681022 CH=1, VrefRange= 0, VrefLevel = 22
3357 00:40:37.684272 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
3358 00:40:37.687534 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
3359 00:40:37.694123 TX Bit2 (972~996) 25 984, Bit10 (968~989) 22 978,
3360 00:40:37.697811 TX Bit3 (970~995) 26 982, Bit11 (968~992) 25 980,
3361 00:40:37.701349 TX Bit4 (974~998) 25 986, Bit12 (968~991) 24 979,
3362 00:40:37.708089 TX Bit5 (977~999) 23 988, Bit13 (969~991) 23 980,
3363 00:40:37.711209 TX Bit6 (976~1001) 26 988, Bit14 (968~991) 24 979,
3364 00:40:37.714619 TX Bit7 (975~997) 23 986, Bit15 (964~988) 25 976,
3365 00:40:37.715042
3366 00:40:37.717914 Write Rank1 MR14 =0x18
3367 00:40:37.727964
3368 00:40:37.731111 CH=1, VrefRange= 0, VrefLevel = 24
3369 00:40:37.734647 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3370 00:40:37.737863 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
3371 00:40:37.744224 TX Bit2 (973~997) 25 985, Bit10 (967~988) 22 977,
3372 00:40:37.747617 TX Bit3 (970~995) 26 982, Bit11 (968~991) 24 979,
3373 00:40:37.751187 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
3374 00:40:37.757961 TX Bit5 (976~1000) 25 988, Bit13 (969~990) 22 979,
3375 00:40:37.760760 TX Bit6 (976~1001) 26 988, Bit14 (968~990) 23 979,
3376 00:40:37.767484 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3377 00:40:37.767974
3378 00:40:37.768305 Write Rank1 MR14 =0x1a
3379 00:40:37.778608
3380 00:40:37.779165 CH=1, VrefRange= 0, VrefLevel = 26
3381 00:40:37.785219 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3382 00:40:37.788385 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
3383 00:40:37.795217 TX Bit2 (971~996) 26 983, Bit10 (967~989) 23 978,
3384 00:40:37.798194 TX Bit3 (970~994) 25 982, Bit11 (968~991) 24 979,
3385 00:40:37.801830 TX Bit4 (973~998) 26 985, Bit12 (968~991) 24 979,
3386 00:40:37.808388 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3387 00:40:37.811640 TX Bit6 (976~1000) 25 988, Bit14 (968~990) 23 979,
3388 00:40:37.814806 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3389 00:40:37.818144
3390 00:40:37.818648 Write Rank1 MR14 =0x1c
3391 00:40:37.828374
3392 00:40:37.831349 CH=1, VrefRange= 0, VrefLevel = 28
3393 00:40:37.834767 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3394 00:40:37.838039 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
3395 00:40:37.844934 TX Bit2 (971~996) 26 983, Bit10 (967~989) 23 978,
3396 00:40:37.848236 TX Bit3 (970~994) 25 982, Bit11 (968~991) 24 979,
3397 00:40:37.851504 TX Bit4 (973~998) 26 985, Bit12 (968~991) 24 979,
3398 00:40:37.858279 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3399 00:40:37.861391 TX Bit6 (976~1000) 25 988, Bit14 (968~990) 23 979,
3400 00:40:37.864856 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3401 00:40:37.868106
3402 00:40:37.868522 Write Rank1 MR14 =0x1e
3403 00:40:37.878712
3404 00:40:37.881519 CH=1, VrefRange= 0, VrefLevel = 30
3405 00:40:37.884783 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3406 00:40:37.888330 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
3407 00:40:37.895288 TX Bit2 (971~996) 26 983, Bit10 (967~989) 23 978,
3408 00:40:37.898432 TX Bit3 (970~994) 25 982, Bit11 (968~991) 24 979,
3409 00:40:37.901860 TX Bit4 (973~998) 26 985, Bit12 (968~991) 24 979,
3410 00:40:37.908182 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3411 00:40:37.911465 TX Bit6 (976~1000) 25 988, Bit14 (968~990) 23 979,
3412 00:40:37.917986 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3413 00:40:37.918501
3414 00:40:37.918836 Write Rank1 MR14 =0x20
3415 00:40:37.928311
3416 00:40:37.931719 CH=1, VrefRange= 0, VrefLevel = 32
3417 00:40:37.935355 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3418 00:40:37.938820 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
3419 00:40:37.945607 TX Bit2 (971~996) 26 983, Bit10 (967~989) 23 978,
3420 00:40:37.948559 TX Bit3 (970~994) 25 982, Bit11 (968~991) 24 979,
3421 00:40:37.952119 TX Bit4 (973~998) 26 985, Bit12 (968~991) 24 979,
3422 00:40:37.958638 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3423 00:40:37.961732 TX Bit6 (976~1000) 25 988, Bit14 (968~990) 23 979,
3424 00:40:37.965015 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3425 00:40:37.968200
3426 00:40:37.968788
3427 00:40:37.971761 TX Vref found, early break! 360< 371
3428 00:40:37.975084 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3429 00:40:37.979137 u1DelayCellOfst[0]=8 cells (7 PI)
3430 00:40:37.981829 u1DelayCellOfst[1]=7 cells (6 PI)
3431 00:40:37.985359 u1DelayCellOfst[2]=1 cells (1 PI)
3432 00:40:37.988333 u1DelayCellOfst[3]=0 cells (0 PI)
3433 00:40:37.991575 u1DelayCellOfst[4]=3 cells (3 PI)
3434 00:40:37.992011 u1DelayCellOfst[5]=7 cells (6 PI)
3435 00:40:37.994984 u1DelayCellOfst[6]=7 cells (6 PI)
3436 00:40:37.998455 u1DelayCellOfst[7]=5 cells (4 PI)
3437 00:40:38.001567 Byte0, DQ PI dly=982, DQM PI dly= 985
3438 00:40:38.008922 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3439 00:40:38.009501
3440 00:40:38.012033 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3441 00:40:38.012456
3442 00:40:38.015593 u1DelayCellOfst[8]=3 cells (3 PI)
3443 00:40:38.018935 u1DelayCellOfst[9]=3 cells (3 PI)
3444 00:40:38.021580 u1DelayCellOfst[10]=3 cells (3 PI)
3445 00:40:38.025805 u1DelayCellOfst[11]=5 cells (4 PI)
3446 00:40:38.028891 u1DelayCellOfst[12]=5 cells (4 PI)
3447 00:40:38.029467 u1DelayCellOfst[13]=5 cells (4 PI)
3448 00:40:38.031501 u1DelayCellOfst[14]=5 cells (4 PI)
3449 00:40:38.034926 u1DelayCellOfst[15]=0 cells (0 PI)
3450 00:40:38.038629 Byte1, DQ PI dly=975, DQM PI dly= 977
3451 00:40:38.044958 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3452 00:40:38.045498
3453 00:40:38.048498 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3454 00:40:38.048919
3455 00:40:38.051937 Write Rank1 MR14 =0x1a
3456 00:40:38.052458
3457 00:40:38.052792 Final TX Range 0 Vref 26
3458 00:40:38.053107
3459 00:40:38.058619 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3460 00:40:38.059040
3461 00:40:38.064974 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3462 00:40:38.071592 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3463 00:40:38.081578 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3464 00:40:38.082070 Write Rank1 MR3 =0xb0
3465 00:40:38.085120 DramC Write-DBI on
3466 00:40:38.085568 ==
3467 00:40:38.088253 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3468 00:40:38.091600 fsp= 1, odt_onoff= 1, Byte mode= 0
3469 00:40:38.092024 ==
3470 00:40:38.098171 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3471 00:40:38.098657
3472 00:40:38.099106 Begin, DQ Scan Range 697~761
3473 00:40:38.099608
3474 00:40:38.102057
3475 00:40:38.102490 TX Vref Scan disable
3476 00:40:38.104916 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3477 00:40:38.108589 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3478 00:40:38.111682 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3479 00:40:38.114963 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3480 00:40:38.118197 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3481 00:40:38.121875 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3482 00:40:38.128209 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3483 00:40:38.131689 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3484 00:40:38.135082 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3485 00:40:38.138097 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3486 00:40:38.141641 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
3487 00:40:38.145316 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3488 00:40:38.148233 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3489 00:40:38.151558 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3490 00:40:38.155072 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3491 00:40:38.158176 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3492 00:40:38.161729 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3493 00:40:38.164938 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3494 00:40:38.168461 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3495 00:40:38.171677 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3496 00:40:38.174748 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3497 00:40:38.182822 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
3498 00:40:38.186631 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3499 00:40:38.189568 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3500 00:40:38.193024 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3501 00:40:38.196372 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3502 00:40:38.199841 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3503 00:40:38.203316 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3504 00:40:38.206302 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3505 00:40:38.209518 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3506 00:40:38.212878 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3507 00:40:38.216220 Byte0, DQ PI dly=730, DQM PI dly= 730
3508 00:40:38.219776 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3509 00:40:38.220206
3510 00:40:38.226512 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3511 00:40:38.226940
3512 00:40:38.229814 Byte1, DQ PI dly=720, DQM PI dly= 720
3513 00:40:38.233043 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
3514 00:40:38.233489
3515 00:40:38.236470 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
3516 00:40:38.236898
3517 00:40:38.243112 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3518 00:40:38.252645 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3519 00:40:38.259563 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3520 00:40:38.260059 Write Rank1 MR3 =0x30
3521 00:40:38.262762 DramC Write-DBI off
3522 00:40:38.263185
3523 00:40:38.263524 [DATLAT]
3524 00:40:38.266111 Freq=1600, CH1 RK1, use_rxtx_scan=0
3525 00:40:38.266539
3526 00:40:38.269362 DATLAT Default: 0x10
3527 00:40:38.269788 7, 0xFFFF, sum=0
3528 00:40:38.273016 8, 0xFFFF, sum=0
3529 00:40:38.273514 9, 0xFFFF, sum=0
3530 00:40:38.276717 10, 0xFFFF, sum=0
3531 00:40:38.277248 11, 0xFFFF, sum=0
3532 00:40:38.279731 12, 0xFFFF, sum=0
3533 00:40:38.280179 13, 0xFFFF, sum=0
3534 00:40:38.280524 14, 0x0, sum=1
3535 00:40:38.283132 15, 0x0, sum=2
3536 00:40:38.283562 16, 0x0, sum=3
3537 00:40:38.286370 17, 0x0, sum=4
3538 00:40:38.289796 pattern=2 first_step=14 total pass=5 best_step=16
3539 00:40:38.290234 ==
3540 00:40:38.296039 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3541 00:40:38.299349 fsp= 1, odt_onoff= 1, Byte mode= 0
3542 00:40:38.299792 ==
3543 00:40:38.302606 Start DQ dly to find pass range UseTestEngine =1
3544 00:40:38.306215 x-axis: bit #, y-axis: DQ dly (-127~63)
3545 00:40:38.306638 RX Vref Scan = 0
3546 00:40:38.309742 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3547 00:40:38.312955 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3548 00:40:38.316469 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3549 00:40:38.319462 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3550 00:40:38.323392 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3551 00:40:38.326049 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3552 00:40:38.329892 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3553 00:40:38.333055 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3554 00:40:38.333580 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3555 00:40:38.336447 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3556 00:40:38.339378 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3557 00:40:38.343043 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3558 00:40:38.345952 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3559 00:40:38.349424 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3560 00:40:38.353169 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3561 00:40:38.356114 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3562 00:40:38.356546 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3563 00:40:38.359265 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3564 00:40:38.363117 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3565 00:40:38.366127 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3566 00:40:38.369347 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3567 00:40:38.373022 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3568 00:40:38.376421 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3569 00:40:38.376853 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3570 00:40:38.379877 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3571 00:40:38.382909 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3572 00:40:38.385937 0, [0] xxooxxxx xxxxxxxo [MSB]
3573 00:40:38.389709 1, [0] xxoooxxo xxxxxxxo [MSB]
3574 00:40:38.392496 2, [0] xxoooxxo ooxxxxxo [MSB]
3575 00:40:38.392968 3, [0] xxoooxxo ooooxooo [MSB]
3576 00:40:38.396010 4, [0] xxoooxxo oooooooo [MSB]
3577 00:40:38.399471 5, [0] xoooooxo oooooooo [MSB]
3578 00:40:38.402780 6, [0] xoooooxo oooooooo [MSB]
3579 00:40:38.406411 34, [0] oooxoooo oooooooo [MSB]
3580 00:40:38.409755 35, [0] oooxoooo ooooooox [MSB]
3581 00:40:38.412849 36, [0] ooxxoooo ooooooox [MSB]
3582 00:40:38.416441 37, [0] ooxxxoox ooxooxxx [MSB]
3583 00:40:38.419458 38, [0] ooxxxoox xxxooxxx [MSB]
3584 00:40:38.423210 39, [0] ooxxxoox xxxxoxxx [MSB]
3585 00:40:38.423884 40, [0] ooxxxoox xxxxxxxx [MSB]
3586 00:40:38.426132 41, [0] ooxxxoox xxxxxxxx [MSB]
3587 00:40:38.430062 42, [0] oxxxxxox xxxxxxxx [MSB]
3588 00:40:38.432763 43, [0] xxxxxxxx xxxxxxxx [MSB]
3589 00:40:38.436371 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3590 00:40:38.439486 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
3591 00:40:38.442747 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3592 00:40:38.446346 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3593 00:40:38.449383 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3594 00:40:38.453049 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3595 00:40:38.456308 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3596 00:40:38.462678 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3597 00:40:38.466615 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3598 00:40:38.469826 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3599 00:40:38.473032 iDelay=43, Bit 10, Center 19 (3 ~ 36) 34
3600 00:40:38.476596 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3601 00:40:38.479732 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3602 00:40:38.483427 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3603 00:40:38.486332 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3604 00:40:38.489775 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3605 00:40:38.490203 ==
3606 00:40:38.496608 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3607 00:40:38.499830 fsp= 1, odt_onoff= 1, Byte mode= 0
3608 00:40:38.500303 ==
3609 00:40:38.500689 DQS Delay:
3610 00:40:38.502818 DQS0 = 0, DQS1 = 0
3611 00:40:38.503242 DQM Delay:
3612 00:40:38.506378 DQM0 = 20, DQM1 = 19
3613 00:40:38.506889 DQ Delay:
3614 00:40:38.509411 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3615 00:40:38.512585 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3616 00:40:38.516160 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3617 00:40:38.519469 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3618 00:40:38.519893
3619 00:40:38.520228
3620 00:40:38.520538
3621 00:40:38.523301 [DramC_TX_OE_Calibration] TA2
3622 00:40:38.526930 Original DQ_B0 (3 6) =30, OEN = 27
3623 00:40:38.527386 Original DQ_B1 (3 6) =30, OEN = 27
3624 00:40:38.529608 23, 0x0, End_B0=23 End_B1=23
3625 00:40:38.533150 24, 0x0, End_B0=24 End_B1=24
3626 00:40:38.536918 25, 0x0, End_B0=25 End_B1=25
3627 00:40:38.539652 26, 0x0, End_B0=26 End_B1=26
3628 00:40:38.540185 27, 0x0, End_B0=27 End_B1=27
3629 00:40:38.543217 28, 0x0, End_B0=28 End_B1=28
3630 00:40:38.546218 29, 0x0, End_B0=29 End_B1=29
3631 00:40:38.549596 30, 0x0, End_B0=30 End_B1=30
3632 00:40:38.553199 31, 0xFFFF, End_B0=30 End_B1=30
3633 00:40:38.556243 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3634 00:40:38.562893 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3635 00:40:38.563319
3636 00:40:38.563650
3637 00:40:38.566162 Write Rank1 MR23 =0x3f
3638 00:40:38.566586 [DQSOSC]
3639 00:40:38.572896 [DQSOSCAuto] RK1, (LSB)MR18= 0xb5, (MSB)MR19= 0x3, tDQSOscB0 = 331 ps tDQSOscB1 = 0 ps
3640 00:40:38.579363 CH1_RK1: MR19=0x3, MR18=0xB5, DQSOSC=331, MR23=63, INC=22, DEC=33
3641 00:40:38.579785 Write Rank1 MR23 =0x3f
3642 00:40:38.582689 [DQSOSC]
3643 00:40:38.589798 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3644 00:40:38.592996 CH1 RK1: MR19=3, MR18=B2
3645 00:40:38.596687 [RxdqsGatingPostProcess] freq 1600
3646 00:40:38.599622 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3647 00:40:38.602916 Rank: 0
3648 00:40:38.603334 best DQS0 dly(2T, 0.5T) = (2, 5)
3649 00:40:38.606020 best DQS1 dly(2T, 0.5T) = (2, 5)
3650 00:40:38.609946 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3651 00:40:38.612761 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3652 00:40:38.613411 Rank: 1
3653 00:40:38.615989 best DQS0 dly(2T, 0.5T) = (2, 5)
3654 00:40:38.619555 best DQS1 dly(2T, 0.5T) = (2, 5)
3655 00:40:38.622625 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3656 00:40:38.626059 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3657 00:40:38.632671 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3658 00:40:38.635940 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3659 00:40:38.639540 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3660 00:40:38.639986
3661 00:40:38.640384
3662 00:40:38.642459 [Calibration Summary] Freqency 1600
3663 00:40:38.642874 CH 0, Rank 0
3664 00:40:38.645896 All Pass.
3665 00:40:38.646308
3666 00:40:38.646639 CH 0, Rank 1
3667 00:40:38.646992 All Pass.
3668 00:40:38.647308
3669 00:40:38.649539 CH 1, Rank 0
3670 00:40:38.649969 All Pass.
3671 00:40:38.650301
3672 00:40:38.652586 CH 1, Rank 1
3673 00:40:38.653001 All Pass.
3674 00:40:38.653374
3675 00:40:38.659392 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3676 00:40:38.665975 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3677 00:40:38.672650 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3678 00:40:38.676059 Write Rank0 MR3 =0xb0
3679 00:40:38.682410 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3680 00:40:38.689911 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3681 00:40:38.695709 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3682 00:40:38.696134 Write Rank1 MR3 =0xb0
3683 00:40:38.703132 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3684 00:40:38.709376 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3685 00:40:38.718875 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3686 00:40:38.719348 Write Rank0 MR3 =0xb0
3687 00:40:38.725822 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3688 00:40:38.732351 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3689 00:40:38.739398 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3690 00:40:38.742659 Write Rank1 MR3 =0xb0
3691 00:40:38.743181 DramC Write-DBI on
3692 00:40:38.745750 [GetDramInforAfterCalByMRR] Vendor 1.
3693 00:40:38.752219 [GetDramInforAfterCalByMRR] Revision 7.
3694 00:40:38.752638 MR8 12
3695 00:40:38.756159 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3696 00:40:38.756683 MR8 12
3697 00:40:38.762689 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3698 00:40:38.763181 MR8 12
3699 00:40:38.769478 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3700 00:40:38.770010 MR8 12
3701 00:40:38.772677 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3702 00:40:38.781925 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3703 00:40:38.785445 Write Rank0 MR13 =0xd0
3704 00:40:38.785951 Write Rank1 MR13 =0xd0
3705 00:40:38.788679 Write Rank0 MR13 =0xd0
3706 00:40:38.789096 Write Rank1 MR13 =0xd0
3707 00:40:38.792020 Save calibration result to emmc
3708 00:40:38.792439
3709 00:40:38.792772
3710 00:40:38.795358 [DramcModeReg_Check] Freq_1600, FSP_1
3711 00:40:38.798923 FSP_1, CH_0, RK0
3712 00:40:38.799362 Write Rank0 MR13 =0xd8
3713 00:40:38.802371 MR12 = 0x56 (global = 0x56) match
3714 00:40:38.805687 MR14 = 0x18 (global = 0x18) match
3715 00:40:38.809338 FSP_1, CH_0, RK1
3716 00:40:38.809891 Write Rank1 MR13 =0xd8
3717 00:40:38.812412 MR12 = 0x56 (global = 0x56) match
3718 00:40:38.815875 MR14 = 0x1a (global = 0x1a) match
3719 00:40:38.819102 FSP_1, CH_1, RK0
3720 00:40:38.819526 Write Rank0 MR13 =0xd8
3721 00:40:38.822296 MR12 = 0x56 (global = 0x56) match
3722 00:40:38.825433 MR14 = 0x18 (global = 0x18) match
3723 00:40:38.829003 FSP_1, CH_1, RK1
3724 00:40:38.829463 Write Rank1 MR13 =0xd8
3725 00:40:38.832820 MR12 = 0x58 (global = 0x58) match
3726 00:40:38.835746 MR14 = 0x1a (global = 0x1a) match
3727 00:40:38.836206
3728 00:40:38.842733 [MEM_TEST] 02: After DFS, before run time config
3729 00:40:38.849369 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3730 00:40:38.849801
3731 00:40:38.852245 [TA2_TEST]
3732 00:40:38.852662 === TA2 HW
3733 00:40:38.855929 TA2 PAT: XTALK
3734 00:40:38.858903 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3735 00:40:38.862597 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3736 00:40:38.869026 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3737 00:40:38.872455 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3738 00:40:38.872876
3739 00:40:38.873206
3740 00:40:38.875762 Settings after calibration
3741 00:40:38.876272
3742 00:40:38.879001 [DramcRunTimeConfig]
3743 00:40:38.882437 TransferPLLToSPMControl - MODE SW PHYPLL
3744 00:40:38.882966 TX_TRACKING: ON
3745 00:40:38.885527 RX_TRACKING: ON
3746 00:40:38.886027 HW_GATING: ON
3747 00:40:38.889145 HW_GATING DBG: OFF
3748 00:40:38.889609 ddr_geometry:1
3749 00:40:38.891949 ddr_geometry:1
3750 00:40:38.892368 ddr_geometry:1
3751 00:40:38.892699 ddr_geometry:1
3752 00:40:38.895860 ddr_geometry:1
3753 00:40:38.896371 ddr_geometry:1
3754 00:40:38.898938 ddr_geometry:1
3755 00:40:38.899359 ddr_geometry:1
3756 00:40:38.902398 High Freq DUMMY_READ_FOR_TRACKING: ON
3757 00:40:38.905498 ZQCS_ENABLE_LP4: OFF
3758 00:40:38.908415 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3759 00:40:38.911992 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3760 00:40:38.912412 SPM_CONTROL_AFTERK: ON
3761 00:40:38.915159 IMPEDANCE_TRACKING: ON
3762 00:40:38.915747 TEMP_SENSOR: ON
3763 00:40:38.918527 PER_BANK_REFRESH: ON
3764 00:40:38.919118 HW_SAVE_FOR_SR: ON
3765 00:40:38.921896 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3766 00:40:38.925377 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3767 00:40:38.928950 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3768 00:40:38.932244 Read ODT Tracking: ON
3769 00:40:38.935516 =========================
3770 00:40:38.936200
3771 00:40:38.936741 [TA2_TEST]
3772 00:40:38.937079 === TA2 HW
3773 00:40:38.942125 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3774 00:40:38.945326 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3775 00:40:38.952277 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3776 00:40:38.955568 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3777 00:40:38.956147
3778 00:40:38.958649 [MEM_TEST] 03: After run time config
3779 00:40:38.970023 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3780 00:40:38.973178 [complex_mem_test] start addr:0x40024000, len:131072
3781 00:40:39.177728 1st complex R/W mem test pass
3782 00:40:39.184591 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3783 00:40:39.187284 sync preloader write leveling
3784 00:40:39.191384 sync preloader cbt_mr12
3785 00:40:39.192031 sync preloader cbt_clk_dly
3786 00:40:39.194287 sync preloader cbt_cmd_dly
3787 00:40:39.197312 sync preloader cbt_cs
3788 00:40:39.200616 sync preloader cbt_ca_perbit_delay
3789 00:40:39.201233 sync preloader clk_delay
3790 00:40:39.204139 sync preloader dqs_delay
3791 00:40:39.207960 sync preloader u1Gating2T_Save
3792 00:40:39.210719 sync preloader u1Gating05T_Save
3793 00:40:39.214321 sync preloader u1Gatingfine_tune_Save
3794 00:40:39.217158 sync preloader u1Gatingucpass_count_Save
3795 00:40:39.220608 sync preloader u1TxWindowPerbitVref_Save
3796 00:40:39.224371 sync preloader u1TxCenter_min_Save
3797 00:40:39.227600 sync preloader u1TxCenter_max_Save
3798 00:40:39.230972 sync preloader u1Txwin_center_Save
3799 00:40:39.233895 sync preloader u1Txfirst_pass_Save
3800 00:40:39.237674 sync preloader u1Txlast_pass_Save
3801 00:40:39.238329 sync preloader u1RxDatlat_Save
3802 00:40:39.240684 sync preloader u1RxWinPerbitVref_Save
3803 00:40:39.247514 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3804 00:40:39.250779 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3805 00:40:39.254248 sync preloader delay_cell_unit
3806 00:40:39.260989 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3807 00:40:39.264256 sync preloader write leveling
3808 00:40:39.264670 sync preloader cbt_mr12
3809 00:40:39.267452 sync preloader cbt_clk_dly
3810 00:40:39.270514 sync preloader cbt_cmd_dly
3811 00:40:39.270926 sync preloader cbt_cs
3812 00:40:39.274071 sync preloader cbt_ca_perbit_delay
3813 00:40:39.277593 sync preloader clk_delay
3814 00:40:39.280381 sync preloader dqs_delay
3815 00:40:39.280792 sync preloader u1Gating2T_Save
3816 00:40:39.284129 sync preloader u1Gating05T_Save
3817 00:40:39.287078 sync preloader u1Gatingfine_tune_Save
3818 00:40:39.290627 sync preloader u1Gatingucpass_count_Save
3819 00:40:39.293558 sync preloader u1TxWindowPerbitVref_Save
3820 00:40:39.297290 sync preloader u1TxCenter_min_Save
3821 00:40:39.300305 sync preloader u1TxCenter_max_Save
3822 00:40:39.304013 sync preloader u1Txwin_center_Save
3823 00:40:39.307037 sync preloader u1Txfirst_pass_Save
3824 00:40:39.310471 sync preloader u1Txlast_pass_Save
3825 00:40:39.313734 sync preloader u1RxDatlat_Save
3826 00:40:39.317043 sync preloader u1RxWinPerbitVref_Save
3827 00:40:39.320294 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3828 00:40:39.323785 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3829 00:40:39.327400 sync preloader delay_cell_unit
3830 00:40:39.334088 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3831 00:40:39.337226 sync preloader write leveling
3832 00:40:39.340458 sync preloader cbt_mr12
3833 00:40:39.340785 sync preloader cbt_clk_dly
3834 00:40:39.343845 sync preloader cbt_cmd_dly
3835 00:40:39.347282 sync preloader cbt_cs
3836 00:40:39.350409 sync preloader cbt_ca_perbit_delay
3837 00:40:39.350589 sync preloader clk_delay
3838 00:40:39.353811 sync preloader dqs_delay
3839 00:40:39.356887 sync preloader u1Gating2T_Save
3840 00:40:39.360350 sync preloader u1Gating05T_Save
3841 00:40:39.363604 sync preloader u1Gatingfine_tune_Save
3842 00:40:39.367064 sync preloader u1Gatingucpass_count_Save
3843 00:40:39.370709 sync preloader u1TxWindowPerbitVref_Save
3844 00:40:39.374324 sync preloader u1TxCenter_min_Save
3845 00:40:39.377221 sync preloader u1TxCenter_max_Save
3846 00:40:39.380345 sync preloader u1Txwin_center_Save
3847 00:40:39.380474 sync preloader u1Txfirst_pass_Save
3848 00:40:39.383748 sync preloader u1Txlast_pass_Save
3849 00:40:39.387260 sync preloader u1RxDatlat_Save
3850 00:40:39.390869 sync preloader u1RxWinPerbitVref_Save
3851 00:40:39.393853 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3852 00:40:39.400672 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3853 00:40:39.400817 sync preloader delay_cell_unit
3854 00:40:39.407524 just_for_test_dump_coreboot_params dump all params
3855 00:40:39.407672 dump source = 0x0
3856 00:40:39.410403 dump params frequency:1600
3857 00:40:39.414004 dump params rank number:2
3858 00:40:39.414139
3859 00:40:39.417337 dump params write leveling
3860 00:40:39.417482 write leveling[0][0][0] = 0x20
3861 00:40:39.420897 write leveling[0][0][1] = 0x1d
3862 00:40:39.423940 write leveling[0][1][0] = 0x22
3863 00:40:39.427269 write leveling[0][1][1] = 0x1e
3864 00:40:39.430872 write leveling[1][0][0] = 0x23
3865 00:40:39.433913 write leveling[1][0][1] = 0x1f
3866 00:40:39.434136 write leveling[1][1][0] = 0x23
3867 00:40:39.437485 write leveling[1][1][1] = 0x1f
3868 00:40:39.440592 dump params cbt_cs
3869 00:40:39.440776 cbt_cs[0][0] = 0xa
3870 00:40:39.443853 cbt_cs[0][1] = 0xa
3871 00:40:39.444024 cbt_cs[1][0] = 0xb
3872 00:40:39.447295 cbt_cs[1][1] = 0xb
3873 00:40:39.447467 dump params cbt_mr12
3874 00:40:39.450825 cbt_mr12[0][0] = 0x16
3875 00:40:39.454119 cbt_mr12[0][1] = 0x16
3876 00:40:39.454277 cbt_mr12[1][0] = 0x16
3877 00:40:39.457043 cbt_mr12[1][1] = 0x18
3878 00:40:39.457277 dump params tx window
3879 00:40:39.460506 tx_center_min[0][0][0] = 979
3880 00:40:39.463823 tx_center_max[0][0][0] = 986
3881 00:40:39.467035 tx_center_min[0][0][1] = 974
3882 00:40:39.467225 tx_center_max[0][0][1] = 980
3883 00:40:39.471014 tx_center_min[0][1][0] = 982
3884 00:40:39.473845 tx_center_max[0][1][0] = 989
3885 00:40:39.477502 tx_center_min[0][1][1] = 977
3886 00:40:39.480687 tx_center_max[0][1][1] = 982
3887 00:40:39.481102 tx_center_min[1][0][0] = 982
3888 00:40:39.484172 tx_center_max[1][0][0] = 988
3889 00:40:39.487503 tx_center_min[1][0][1] = 975
3890 00:40:39.491114 tx_center_max[1][0][1] = 980
3891 00:40:39.494277 tx_center_min[1][1][0] = 982
3892 00:40:39.494698 tx_center_max[1][1][0] = 989
3893 00:40:39.497590 tx_center_min[1][1][1] = 975
3894 00:40:39.500995 tx_center_max[1][1][1] = 979
3895 00:40:39.501463 dump params tx window
3896 00:40:39.504404 tx_win_center[0][0][0] = 986
3897 00:40:39.507603 tx_first_pass[0][0][0] = 974
3898 00:40:39.510891 tx_last_pass[0][0][0] = 998
3899 00:40:39.514680 tx_win_center[0][0][1] = 984
3900 00:40:39.515098 tx_first_pass[0][0][1] = 973
3901 00:40:39.517639 tx_last_pass[0][0][1] = 996
3902 00:40:39.520899 tx_win_center[0][0][2] = 984
3903 00:40:39.524246 tx_first_pass[0][0][2] = 972
3904 00:40:39.524678 tx_last_pass[0][0][2] = 996
3905 00:40:39.527479 tx_win_center[0][0][3] = 979
3906 00:40:39.530832 tx_first_pass[0][0][3] = 967
3907 00:40:39.534169 tx_last_pass[0][0][3] = 991
3908 00:40:39.537153 tx_win_center[0][0][4] = 984
3909 00:40:39.537615 tx_first_pass[0][0][4] = 972
3910 00:40:39.540960 tx_last_pass[0][0][4] = 996
3911 00:40:39.544176 tx_win_center[0][0][5] = 980
3912 00:40:39.547628 tx_first_pass[0][0][5] = 968
3913 00:40:39.548046 tx_last_pass[0][0][5] = 992
3914 00:40:39.550755 tx_win_center[0][0][6] = 980
3915 00:40:39.554131 tx_first_pass[0][0][6] = 969
3916 00:40:39.557327 tx_last_pass[0][0][6] = 992
3917 00:40:39.560753 tx_win_center[0][0][7] = 982
3918 00:40:39.560986 tx_first_pass[0][0][7] = 971
3919 00:40:39.563948 tx_last_pass[0][0][7] = 994
3920 00:40:39.567195 tx_win_center[0][0][8] = 974
3921 00:40:39.570435 tx_first_pass[0][0][8] = 962
3922 00:40:39.570623 tx_last_pass[0][0][8] = 987
3923 00:40:39.573761 tx_win_center[0][0][9] = 977
3924 00:40:39.577512 tx_first_pass[0][0][9] = 965
3925 00:40:39.580337 tx_last_pass[0][0][9] = 989
3926 00:40:39.583485 tx_win_center[0][0][10] = 980
3927 00:40:39.583603 tx_first_pass[0][0][10] = 968
3928 00:40:39.587150 tx_last_pass[0][0][10] = 992
3929 00:40:39.590625 tx_win_center[0][0][11] = 975
3930 00:40:39.593491 tx_first_pass[0][0][11] = 962
3931 00:40:39.597198 tx_last_pass[0][0][11] = 988
3932 00:40:39.597321 tx_win_center[0][0][12] = 976
3933 00:40:39.600651 tx_first_pass[0][0][12] = 963
3934 00:40:39.604226 tx_last_pass[0][0][12] = 989
3935 00:40:39.607129 tx_win_center[0][0][13] = 975
3936 00:40:39.610394 tx_first_pass[0][0][13] = 962
3937 00:40:39.610477 tx_last_pass[0][0][13] = 988
3938 00:40:39.613878 tx_win_center[0][0][14] = 976
3939 00:40:39.617213 tx_first_pass[0][0][14] = 964
3940 00:40:39.620453 tx_last_pass[0][0][14] = 989
3941 00:40:39.623537 tx_win_center[0][0][15] = 979
3942 00:40:39.623620 tx_first_pass[0][0][15] = 967
3943 00:40:39.627267 tx_last_pass[0][0][15] = 991
3944 00:40:39.630629 tx_win_center[0][1][0] = 989
3945 00:40:39.633666 tx_first_pass[0][1][0] = 977
3946 00:40:39.636942 tx_last_pass[0][1][0] = 1002
3947 00:40:39.637024 tx_win_center[0][1][1] = 989
3948 00:40:39.640305 tx_first_pass[0][1][1] = 977
3949 00:40:39.643656 tx_last_pass[0][1][1] = 1001
3950 00:40:39.647184 tx_win_center[0][1][2] = 989
3951 00:40:39.647276 tx_first_pass[0][1][2] = 977
3952 00:40:39.650635 tx_last_pass[0][1][2] = 1001
3953 00:40:39.653952 tx_win_center[0][1][3] = 982
3954 00:40:39.657075 tx_first_pass[0][1][3] = 970
3955 00:40:39.660337 tx_last_pass[0][1][3] = 994
3956 00:40:39.660438 tx_win_center[0][1][4] = 988
3957 00:40:39.663773 tx_first_pass[0][1][4] = 976
3958 00:40:39.667025 tx_last_pass[0][1][4] = 1000
3959 00:40:39.670851 tx_win_center[0][1][5] = 983
3960 00:40:39.673605 tx_first_pass[0][1][5] = 971
3961 00:40:39.673702 tx_last_pass[0][1][5] = 996
3962 00:40:39.677180 tx_win_center[0][1][6] = 984
3963 00:40:39.680661 tx_first_pass[0][1][6] = 971
3964 00:40:39.684088 tx_last_pass[0][1][6] = 997
3965 00:40:39.684195 tx_win_center[0][1][7] = 986
3966 00:40:39.687384 tx_first_pass[0][1][7] = 974
3967 00:40:39.690561 tx_last_pass[0][1][7] = 999
3968 00:40:39.693896 tx_win_center[0][1][8] = 978
3969 00:40:39.693992 tx_first_pass[0][1][8] = 967
3970 00:40:39.697565 tx_last_pass[0][1][8] = 990
3971 00:40:39.700899 tx_win_center[0][1][9] = 979
3972 00:40:39.703924 tx_first_pass[0][1][9] = 968
3973 00:40:39.707183 tx_last_pass[0][1][9] = 991
3974 00:40:39.707315 tx_win_center[0][1][10] = 982
3975 00:40:39.710282 tx_first_pass[0][1][10] = 970
3976 00:40:39.713781 tx_last_pass[0][1][10] = 994
3977 00:40:39.717116 tx_win_center[0][1][11] = 978
3978 00:40:39.720643 tx_first_pass[0][1][11] = 967
3979 00:40:39.720782 tx_last_pass[0][1][11] = 990
3980 00:40:39.724129 tx_win_center[0][1][12] = 979
3981 00:40:39.727551 tx_first_pass[0][1][12] = 967
3982 00:40:39.730810 tx_last_pass[0][1][12] = 991
3983 00:40:39.734107 tx_win_center[0][1][13] = 977
3984 00:40:39.734366 tx_first_pass[0][1][13] = 965
3985 00:40:39.737316 tx_last_pass[0][1][13] = 990
3986 00:40:39.740596 tx_win_center[0][1][14] = 979
3987 00:40:39.743753 tx_first_pass[0][1][14] = 967
3988 00:40:39.747219 tx_last_pass[0][1][14] = 991
3989 00:40:39.747519 tx_win_center[0][1][15] = 980
3990 00:40:39.750933 tx_first_pass[0][1][15] = 968
3991 00:40:39.754053 tx_last_pass[0][1][15] = 992
3992 00:40:39.757127 tx_win_center[1][0][0] = 988
3993 00:40:39.761010 tx_first_pass[1][0][0] = 976
3994 00:40:39.761475 tx_last_pass[1][0][0] = 1001
3995 00:40:39.764166 tx_win_center[1][0][1] = 987
3996 00:40:39.767329 tx_first_pass[1][0][1] = 975
3997 00:40:39.770856 tx_last_pass[1][0][1] = 999
3998 00:40:39.771346 tx_win_center[1][0][2] = 984
3999 00:40:39.774244 tx_first_pass[1][0][2] = 972
4000 00:40:39.777559 tx_last_pass[1][0][2] = 996
4001 00:40:39.780922 tx_win_center[1][0][3] = 982
4002 00:40:39.784171 tx_first_pass[1][0][3] = 970
4003 00:40:39.784599 tx_last_pass[1][0][3] = 994
4004 00:40:39.787471 tx_win_center[1][0][4] = 986
4005 00:40:39.791078 tx_first_pass[1][0][4] = 974
4006 00:40:39.793861 tx_last_pass[1][0][4] = 998
4007 00:40:39.794285 tx_win_center[1][0][5] = 988
4008 00:40:39.797403 tx_first_pass[1][0][5] = 976
4009 00:40:39.800438 tx_last_pass[1][0][5] = 1000
4010 00:40:39.804027 tx_win_center[1][0][6] = 988
4011 00:40:39.807330 tx_first_pass[1][0][6] = 976
4012 00:40:39.807771 tx_last_pass[1][0][6] = 1000
4013 00:40:39.810713 tx_win_center[1][0][7] = 986
4014 00:40:39.813745 tx_first_pass[1][0][7] = 974
4015 00:40:39.817150 tx_last_pass[1][0][7] = 998
4016 00:40:39.820370 tx_win_center[1][0][8] = 978
4017 00:40:39.820844 tx_first_pass[1][0][8] = 966
4018 00:40:39.824286 tx_last_pass[1][0][8] = 991
4019 00:40:39.827076 tx_win_center[1][0][9] = 978
4020 00:40:39.830626 tx_first_pass[1][0][9] = 966
4021 00:40:39.831051 tx_last_pass[1][0][9] = 991
4022 00:40:39.834305 tx_win_center[1][0][10] = 979
4023 00:40:39.836883 tx_first_pass[1][0][10] = 968
4024 00:40:39.840664 tx_last_pass[1][0][10] = 991
4025 00:40:39.844171 tx_win_center[1][0][11] = 980
4026 00:40:39.844665 tx_first_pass[1][0][11] = 968
4027 00:40:39.847055 tx_last_pass[1][0][11] = 992
4028 00:40:39.850439 tx_win_center[1][0][12] = 980
4029 00:40:39.854232 tx_first_pass[1][0][12] = 968
4030 00:40:39.857068 tx_last_pass[1][0][12] = 992
4031 00:40:39.857547 tx_win_center[1][0][13] = 980
4032 00:40:39.860530 tx_first_pass[1][0][13] = 969
4033 00:40:39.863879 tx_last_pass[1][0][13] = 991
4034 00:40:39.867096 tx_win_center[1][0][14] = 979
4035 00:40:39.870487 tx_first_pass[1][0][14] = 968
4036 00:40:39.870913 tx_last_pass[1][0][14] = 991
4037 00:40:39.873852 tx_win_center[1][0][15] = 975
4038 00:40:39.876953 tx_first_pass[1][0][15] = 963
4039 00:40:39.880424 tx_last_pass[1][0][15] = 988
4040 00:40:39.884074 tx_win_center[1][1][0] = 989
4041 00:40:39.884495 tx_first_pass[1][1][0] = 977
4042 00:40:39.887174 tx_last_pass[1][1][0] = 1002
4043 00:40:39.890256 tx_win_center[1][1][1] = 988
4044 00:40:39.894127 tx_first_pass[1][1][1] = 976
4045 00:40:39.897377 tx_last_pass[1][1][1] = 1000
4046 00:40:39.897861 tx_win_center[1][1][2] = 983
4047 00:40:39.900614 tx_first_pass[1][1][2] = 971
4048 00:40:39.904030 tx_last_pass[1][1][2] = 996
4049 00:40:39.907375 tx_win_center[1][1][3] = 982
4050 00:40:39.907802 tx_first_pass[1][1][3] = 970
4051 00:40:39.910602 tx_last_pass[1][1][3] = 994
4052 00:40:39.914387 tx_win_center[1][1][4] = 985
4053 00:40:39.917107 tx_first_pass[1][1][4] = 973
4054 00:40:39.917561 tx_last_pass[1][1][4] = 998
4055 00:40:39.920726 tx_win_center[1][1][5] = 988
4056 00:40:39.923726 tx_first_pass[1][1][5] = 976
4057 00:40:39.927161 tx_last_pass[1][1][5] = 1000
4058 00:40:39.930686 tx_win_center[1][1][6] = 988
4059 00:40:39.931113 tx_first_pass[1][1][6] = 976
4060 00:40:39.934046 tx_last_pass[1][1][6] = 1000
4061 00:40:39.937614 tx_win_center[1][1][7] = 986
4062 00:40:39.940910 tx_first_pass[1][1][7] = 975
4063 00:40:39.944360 tx_last_pass[1][1][7] = 998
4064 00:40:39.944785 tx_win_center[1][1][8] = 978
4065 00:40:39.947350 tx_first_pass[1][1][8] = 967
4066 00:40:39.950326 tx_last_pass[1][1][8] = 990
4067 00:40:39.953927 tx_win_center[1][1][9] = 978
4068 00:40:39.954351 tx_first_pass[1][1][9] = 967
4069 00:40:39.957151 tx_last_pass[1][1][9] = 989
4070 00:40:39.960521 tx_win_center[1][1][10] = 978
4071 00:40:39.963840 tx_first_pass[1][1][10] = 967
4072 00:40:39.967559 tx_last_pass[1][1][10] = 989
4073 00:40:39.967983 tx_win_center[1][1][11] = 979
4074 00:40:39.970754 tx_first_pass[1][1][11] = 968
4075 00:40:39.974099 tx_last_pass[1][1][11] = 991
4076 00:40:39.977600 tx_win_center[1][1][12] = 979
4077 00:40:39.980690 tx_first_pass[1][1][12] = 968
4078 00:40:39.981244 tx_last_pass[1][1][12] = 991
4079 00:40:39.984109 tx_win_center[1][1][13] = 979
4080 00:40:39.987232 tx_first_pass[1][1][13] = 968
4081 00:40:39.990781 tx_last_pass[1][1][13] = 990
4082 00:40:39.994079 tx_win_center[1][1][14] = 979
4083 00:40:39.994504 tx_first_pass[1][1][14] = 968
4084 00:40:39.997359 tx_last_pass[1][1][14] = 990
4085 00:40:40.000759 tx_win_center[1][1][15] = 975
4086 00:40:40.003913 tx_first_pass[1][1][15] = 963
4087 00:40:40.007723 tx_last_pass[1][1][15] = 987
4088 00:40:40.008267 dump params rx window
4089 00:40:40.010854 rx_firspass[0][0][0] = 9
4090 00:40:40.014079 rx_lastpass[0][0][0] = 42
4091 00:40:40.014503 rx_firspass[0][0][1] = 9
4092 00:40:40.017429 rx_lastpass[0][0][1] = 40
4093 00:40:40.021365 rx_firspass[0][0][2] = 9
4094 00:40:40.021791 rx_lastpass[0][0][2] = 39
4095 00:40:40.024172 rx_firspass[0][0][3] = -1
4096 00:40:40.027704 rx_lastpass[0][0][3] = 31
4097 00:40:40.028129 rx_firspass[0][0][4] = 7
4098 00:40:40.031136 rx_lastpass[0][0][4] = 39
4099 00:40:40.034503 rx_firspass[0][0][5] = 3
4100 00:40:40.037350 rx_lastpass[0][0][5] = 29
4101 00:40:40.037777 rx_firspass[0][0][6] = 3
4102 00:40:40.040880 rx_lastpass[0][0][6] = 32
4103 00:40:40.044006 rx_firspass[0][0][7] = 5
4104 00:40:40.044428 rx_lastpass[0][0][7] = 34
4105 00:40:40.047518 rx_firspass[0][0][8] = 3
4106 00:40:40.051148 rx_lastpass[0][0][8] = 34
4107 00:40:40.051606 rx_firspass[0][0][9] = 5
4108 00:40:40.054358 rx_lastpass[0][0][9] = 35
4109 00:40:40.057402 rx_firspass[0][0][10] = 9
4110 00:40:40.061085 rx_lastpass[0][0][10] = 38
4111 00:40:40.061548 rx_firspass[0][0][11] = 3
4112 00:40:40.064556 rx_lastpass[0][0][11] = 30
4113 00:40:40.067382 rx_firspass[0][0][12] = 5
4114 00:40:40.067813 rx_lastpass[0][0][12] = 34
4115 00:40:40.070875 rx_firspass[0][0][13] = 2
4116 00:40:40.074002 rx_lastpass[0][0][13] = 31
4117 00:40:40.077359 rx_firspass[0][0][14] = 3
4118 00:40:40.077960 rx_lastpass[0][0][14] = 32
4119 00:40:40.081171 rx_firspass[0][0][15] = 4
4120 00:40:40.084731 rx_lastpass[0][0][15] = 35
4121 00:40:40.085162 rx_firspass[0][1][0] = 9
4122 00:40:40.087808 rx_lastpass[0][1][0] = 42
4123 00:40:40.091084 rx_firspass[0][1][1] = 7
4124 00:40:40.094236 rx_lastpass[0][1][1] = 42
4125 00:40:40.094670 rx_firspass[0][1][2] = 8
4126 00:40:40.097701 rx_lastpass[0][1][2] = 42
4127 00:40:40.101007 rx_firspass[0][1][3] = -1
4128 00:40:40.101596 rx_lastpass[0][1][3] = 32
4129 00:40:40.103970 rx_firspass[0][1][4] = 6
4130 00:40:40.107714 rx_lastpass[0][1][4] = 40
4131 00:40:40.108248 rx_firspass[0][1][5] = 0
4132 00:40:40.110728 rx_lastpass[0][1][5] = 35
4133 00:40:40.114415 rx_firspass[0][1][6] = 3
4134 00:40:40.117672 rx_lastpass[0][1][6] = 36
4135 00:40:40.118106 rx_firspass[0][1][7] = 3
4136 00:40:40.120967 rx_lastpass[0][1][7] = 35
4137 00:40:40.123983 rx_firspass[0][1][8] = 1
4138 00:40:40.124492 rx_lastpass[0][1][8] = 36
4139 00:40:40.127386 rx_firspass[0][1][9] = 2
4140 00:40:40.130708 rx_lastpass[0][1][9] = 37
4141 00:40:40.131144 rx_firspass[0][1][10] = 5
4142 00:40:40.134240 rx_lastpass[0][1][10] = 42
4143 00:40:40.137341 rx_firspass[0][1][11] = 0
4144 00:40:40.141011 rx_lastpass[0][1][11] = 34
4145 00:40:40.141578 rx_firspass[0][1][12] = 3
4146 00:40:40.144166 rx_lastpass[0][1][12] = 37
4147 00:40:40.147528 rx_firspass[0][1][13] = 0
4148 00:40:40.151034 rx_lastpass[0][1][13] = 33
4149 00:40:40.151467 rx_firspass[0][1][14] = 2
4150 00:40:40.154018 rx_lastpass[0][1][14] = 35
4151 00:40:40.157388 rx_firspass[0][1][15] = 4
4152 00:40:40.157825 rx_lastpass[0][1][15] = 37
4153 00:40:40.160969 rx_firspass[1][0][0] = 8
4154 00:40:40.164539 rx_lastpass[1][0][0] = 40
4155 00:40:40.167831 rx_firspass[1][0][1] = 6
4156 00:40:40.168337 rx_lastpass[1][0][1] = 38
4157 00:40:40.170946 rx_firspass[1][0][2] = 0
4158 00:40:40.174439 rx_lastpass[1][0][2] = 32
4159 00:40:40.174872 rx_firspass[1][0][3] = -1
4160 00:40:40.177692 rx_lastpass[1][0][3] = 31
4161 00:40:40.180746 rx_firspass[1][0][4] = 3
4162 00:40:40.181246 rx_lastpass[1][0][4] = 33
4163 00:40:40.184379 rx_firspass[1][0][5] = 9
4164 00:40:40.187408 rx_lastpass[1][0][5] = 38
4165 00:40:40.190481 rx_firspass[1][0][6] = 10
4166 00:40:40.190905 rx_lastpass[1][0][6] = 40
4167 00:40:40.194298 rx_firspass[1][0][7] = 5
4168 00:40:40.197232 rx_lastpass[1][0][7] = 33
4169 00:40:40.197696 rx_firspass[1][0][8] = 3
4170 00:40:40.201433 rx_lastpass[1][0][8] = 35
4171 00:40:40.204165 rx_firspass[1][0][9] = 4
4172 00:40:40.207292 rx_lastpass[1][0][9] = 35
4173 00:40:40.207714 rx_firspass[1][0][10] = 3
4174 00:40:40.210968 rx_lastpass[1][0][10] = 34
4175 00:40:40.213995 rx_firspass[1][0][11] = 5
4176 00:40:40.214420 rx_lastpass[1][0][11] = 34
4177 00:40:40.217372 rx_firspass[1][0][12] = 5
4178 00:40:40.220957 rx_lastpass[1][0][12] = 35
4179 00:40:40.224022 rx_firspass[1][0][13] = 6
4180 00:40:40.224452 rx_lastpass[1][0][13] = 32
4181 00:40:40.226949 rx_firspass[1][0][14] = 3
4182 00:40:40.230352 rx_lastpass[1][0][14] = 34
4183 00:40:40.230732 rx_firspass[1][0][15] = 1
4184 00:40:40.233616 rx_lastpass[1][0][15] = 32
4185 00:40:40.237591 rx_firspass[1][1][0] = 7
4186 00:40:40.240738 rx_lastpass[1][1][0] = 42
4187 00:40:40.241146 rx_firspass[1][1][1] = 5
4188 00:40:40.243951 rx_lastpass[1][1][1] = 41
4189 00:40:40.247462 rx_firspass[1][1][2] = 0
4190 00:40:40.248048 rx_lastpass[1][1][2] = 35
4191 00:40:40.250986 rx_firspass[1][1][3] = -2
4192 00:40:40.254268 rx_lastpass[1][1][3] = 33
4193 00:40:40.254707 rx_firspass[1][1][4] = 1
4194 00:40:40.257097 rx_lastpass[1][1][4] = 36
4195 00:40:40.260921 rx_firspass[1][1][5] = 5
4196 00:40:40.263839 rx_lastpass[1][1][5] = 41
4197 00:40:40.264270 rx_firspass[1][1][6] = 7
4198 00:40:40.267447 rx_lastpass[1][1][6] = 42
4199 00:40:40.270761 rx_firspass[1][1][7] = 1
4200 00:40:40.271405 rx_lastpass[1][1][7] = 36
4201 00:40:40.274262 rx_firspass[1][1][8] = 2
4202 00:40:40.277080 rx_lastpass[1][1][8] = 37
4203 00:40:40.277517 rx_firspass[1][1][9] = 2
4204 00:40:40.280567 rx_lastpass[1][1][9] = 37
4205 00:40:40.283898 rx_firspass[1][1][10] = 3
4206 00:40:40.287661 rx_lastpass[1][1][10] = 36
4207 00:40:40.288089 rx_firspass[1][1][11] = 3
4208 00:40:40.290973 rx_lastpass[1][1][11] = 38
4209 00:40:40.293816 rx_firspass[1][1][12] = 4
4210 00:40:40.297777 rx_lastpass[1][1][12] = 39
4211 00:40:40.298214 rx_firspass[1][1][13] = 3
4212 00:40:40.300793 rx_lastpass[1][1][13] = 36
4213 00:40:40.304368 rx_firspass[1][1][14] = 3
4214 00:40:40.304918 rx_lastpass[1][1][14] = 36
4215 00:40:40.307357 rx_firspass[1][1][15] = 0
4216 00:40:40.310829 rx_lastpass[1][1][15] = 34
4217 00:40:40.311365 dump params clk_delay
4218 00:40:40.314464 clk_delay[0] = -1
4219 00:40:40.314999 clk_delay[1] = 0
4220 00:40:40.317586 dump params dqs_delay
4221 00:40:40.320854 dqs_delay[0][0] = -1
4222 00:40:40.321335 dqs_delay[0][1] = 0
4223 00:40:40.324035 dqs_delay[1][0] = -1
4224 00:40:40.324468 dqs_delay[1][1] = 0
4225 00:40:40.327442 dump params delay_cell_unit = 762
4226 00:40:40.330678 dump source = 0x0
4227 00:40:40.331110 dump params frequency:1200
4228 00:40:40.334439 dump params rank number:2
4229 00:40:40.334979
4230 00:40:40.337298 dump params write leveling
4231 00:40:40.340772 write leveling[0][0][0] = 0x0
4232 00:40:40.341206 write leveling[0][0][1] = 0x0
4233 00:40:40.344161 write leveling[0][1][0] = 0x0
4234 00:40:40.347816 write leveling[0][1][1] = 0x0
4235 00:40:40.350760 write leveling[1][0][0] = 0x0
4236 00:40:40.354061 write leveling[1][0][1] = 0x0
4237 00:40:40.354496 write leveling[1][1][0] = 0x0
4238 00:40:40.357648 write leveling[1][1][1] = 0x0
4239 00:40:40.360533 dump params cbt_cs
4240 00:40:40.360967 cbt_cs[0][0] = 0x0
4241 00:40:40.364149 cbt_cs[0][1] = 0x0
4242 00:40:40.364666 cbt_cs[1][0] = 0x0
4243 00:40:40.367793 cbt_cs[1][1] = 0x0
4244 00:40:40.368321 dump params cbt_mr12
4245 00:40:40.370925 cbt_mr12[0][0] = 0x0
4246 00:40:40.374352 cbt_mr12[0][1] = 0x0
4247 00:40:40.374878 cbt_mr12[1][0] = 0x0
4248 00:40:40.377350 cbt_mr12[1][1] = 0x0
4249 00:40:40.377785 dump params tx window
4250 00:40:40.380768 tx_center_min[0][0][0] = 0
4251 00:40:40.384362 tx_center_max[0][0][0] = 0
4252 00:40:40.384928 tx_center_min[0][0][1] = 0
4253 00:40:40.387867 tx_center_max[0][0][1] = 0
4254 00:40:40.390894 tx_center_min[0][1][0] = 0
4255 00:40:40.394706 tx_center_max[0][1][0] = 0
4256 00:40:40.395122 tx_center_min[0][1][1] = 0
4257 00:40:40.397422 tx_center_max[0][1][1] = 0
4258 00:40:40.400785 tx_center_min[1][0][0] = 0
4259 00:40:40.404225 tx_center_max[1][0][0] = 0
4260 00:40:40.404755 tx_center_min[1][0][1] = 0
4261 00:40:40.407669 tx_center_max[1][0][1] = 0
4262 00:40:40.411112 tx_center_min[1][1][0] = 0
4263 00:40:40.414299 tx_center_max[1][1][0] = 0
4264 00:40:40.414743 tx_center_min[1][1][1] = 0
4265 00:40:40.417495 tx_center_max[1][1][1] = 0
4266 00:40:40.421165 dump params tx window
4267 00:40:40.421642 tx_win_center[0][0][0] = 0
4268 00:40:40.424325 tx_first_pass[0][0][0] = 0
4269 00:40:40.427717 tx_last_pass[0][0][0] = 0
4270 00:40:40.428272 tx_win_center[0][0][1] = 0
4271 00:40:40.431204 tx_first_pass[0][0][1] = 0
4272 00:40:40.434173 tx_last_pass[0][0][1] = 0
4273 00:40:40.437499 tx_win_center[0][0][2] = 0
4274 00:40:40.438054 tx_first_pass[0][0][2] = 0
4275 00:40:40.440940 tx_last_pass[0][0][2] = 0
4276 00:40:40.444329 tx_win_center[0][0][3] = 0
4277 00:40:40.447646 tx_first_pass[0][0][3] = 0
4278 00:40:40.448251 tx_last_pass[0][0][3] = 0
4279 00:40:40.451082 tx_win_center[0][0][4] = 0
4280 00:40:40.454816 tx_first_pass[0][0][4] = 0
4281 00:40:40.455237 tx_last_pass[0][0][4] = 0
4282 00:40:40.457898 tx_win_center[0][0][5] = 0
4283 00:40:40.461225 tx_first_pass[0][0][5] = 0
4284 00:40:40.464819 tx_last_pass[0][0][5] = 0
4285 00:40:40.465348 tx_win_center[0][0][6] = 0
4286 00:40:40.467673 tx_first_pass[0][0][6] = 0
4287 00:40:40.470982 tx_last_pass[0][0][6] = 0
4288 00:40:40.474502 tx_win_center[0][0][7] = 0
4289 00:40:40.474901 tx_first_pass[0][0][7] = 0
4290 00:40:40.477793 tx_last_pass[0][0][7] = 0
4291 00:40:40.481294 tx_win_center[0][0][8] = 0
4292 00:40:40.481759 tx_first_pass[0][0][8] = 0
4293 00:40:40.484308 tx_last_pass[0][0][8] = 0
4294 00:40:40.487606 tx_win_center[0][0][9] = 0
4295 00:40:40.490887 tx_first_pass[0][0][9] = 0
4296 00:40:40.491283 tx_last_pass[0][0][9] = 0
4297 00:40:40.494282 tx_win_center[0][0][10] = 0
4298 00:40:40.497480 tx_first_pass[0][0][10] = 0
4299 00:40:40.501163 tx_last_pass[0][0][10] = 0
4300 00:40:40.501627 tx_win_center[0][0][11] = 0
4301 00:40:40.504083 tx_first_pass[0][0][11] = 0
4302 00:40:40.507894 tx_last_pass[0][0][11] = 0
4303 00:40:40.511336 tx_win_center[0][0][12] = 0
4304 00:40:40.511854 tx_first_pass[0][0][12] = 0
4305 00:40:40.514168 tx_last_pass[0][0][12] = 0
4306 00:40:40.517452 tx_win_center[0][0][13] = 0
4307 00:40:40.520683 tx_first_pass[0][0][13] = 0
4308 00:40:40.521104 tx_last_pass[0][0][13] = 0
4309 00:40:40.524313 tx_win_center[0][0][14] = 0
4310 00:40:40.527288 tx_first_pass[0][0][14] = 0
4311 00:40:40.531045 tx_last_pass[0][0][14] = 0
4312 00:40:40.531466 tx_win_center[0][0][15] = 0
4313 00:40:40.534060 tx_first_pass[0][0][15] = 0
4314 00:40:40.537707 tx_last_pass[0][0][15] = 0
4315 00:40:40.541278 tx_win_center[0][1][0] = 0
4316 00:40:40.541702 tx_first_pass[0][1][0] = 0
4317 00:40:40.544609 tx_last_pass[0][1][0] = 0
4318 00:40:40.547877 tx_win_center[0][1][1] = 0
4319 00:40:40.548418 tx_first_pass[0][1][1] = 0
4320 00:40:40.550915 tx_last_pass[0][1][1] = 0
4321 00:40:40.554274 tx_win_center[0][1][2] = 0
4322 00:40:40.557385 tx_first_pass[0][1][2] = 0
4323 00:40:40.557811 tx_last_pass[0][1][2] = 0
4324 00:40:40.560959 tx_win_center[0][1][3] = 0
4325 00:40:40.564017 tx_first_pass[0][1][3] = 0
4326 00:40:40.564431 tx_last_pass[0][1][3] = 0
4327 00:40:40.567491 tx_win_center[0][1][4] = 0
4328 00:40:40.570838 tx_first_pass[0][1][4] = 0
4329 00:40:40.574977 tx_last_pass[0][1][4] = 0
4330 00:40:40.575510 tx_win_center[0][1][5] = 0
4331 00:40:40.577991 tx_first_pass[0][1][5] = 0
4332 00:40:40.580998 tx_last_pass[0][1][5] = 0
4333 00:40:40.584321 tx_win_center[0][1][6] = 0
4334 00:40:40.584731 tx_first_pass[0][1][6] = 0
4335 00:40:40.587479 tx_last_pass[0][1][6] = 0
4336 00:40:40.590718 tx_win_center[0][1][7] = 0
4337 00:40:40.593825 tx_first_pass[0][1][7] = 0
4338 00:40:40.594238 tx_last_pass[0][1][7] = 0
4339 00:40:40.597688 tx_win_center[0][1][8] = 0
4340 00:40:40.601111 tx_first_pass[0][1][8] = 0
4341 00:40:40.601696 tx_last_pass[0][1][8] = 0
4342 00:40:40.603958 tx_win_center[0][1][9] = 0
4343 00:40:40.607917 tx_first_pass[0][1][9] = 0
4344 00:40:40.610830 tx_last_pass[0][1][9] = 0
4345 00:40:40.611329 tx_win_center[0][1][10] = 0
4346 00:40:40.613724 tx_first_pass[0][1][10] = 0
4347 00:40:40.617400 tx_last_pass[0][1][10] = 0
4348 00:40:40.620698 tx_win_center[0][1][11] = 0
4349 00:40:40.621294 tx_first_pass[0][1][11] = 0
4350 00:40:40.624005 tx_last_pass[0][1][11] = 0
4351 00:40:40.627461 tx_win_center[0][1][12] = 0
4352 00:40:40.631347 tx_first_pass[0][1][12] = 0
4353 00:40:40.631929 tx_last_pass[0][1][12] = 0
4354 00:40:40.634573 tx_win_center[0][1][13] = 0
4355 00:40:40.637364 tx_first_pass[0][1][13] = 0
4356 00:40:40.640876 tx_last_pass[0][1][13] = 0
4357 00:40:40.641325 tx_win_center[0][1][14] = 0
4358 00:40:40.644395 tx_first_pass[0][1][14] = 0
4359 00:40:40.647418 tx_last_pass[0][1][14] = 0
4360 00:40:40.650774 tx_win_center[0][1][15] = 0
4361 00:40:40.651200 tx_first_pass[0][1][15] = 0
4362 00:40:40.654202 tx_last_pass[0][1][15] = 0
4363 00:40:40.657565 tx_win_center[1][0][0] = 0
4364 00:40:40.660740 tx_first_pass[1][0][0] = 0
4365 00:40:40.661159 tx_last_pass[1][0][0] = 0
4366 00:40:40.664414 tx_win_center[1][0][1] = 0
4367 00:40:40.667605 tx_first_pass[1][0][1] = 0
4368 00:40:40.668130 tx_last_pass[1][0][1] = 0
4369 00:40:40.670908 tx_win_center[1][0][2] = 0
4370 00:40:40.674012 tx_first_pass[1][0][2] = 0
4371 00:40:40.677227 tx_last_pass[1][0][2] = 0
4372 00:40:40.677701 tx_win_center[1][0][3] = 0
4373 00:40:40.680594 tx_first_pass[1][0][3] = 0
4374 00:40:40.684043 tx_last_pass[1][0][3] = 0
4375 00:40:40.684464 tx_win_center[1][0][4] = 0
4376 00:40:40.687422 tx_first_pass[1][0][4] = 0
4377 00:40:40.690583 tx_last_pass[1][0][4] = 0
4378 00:40:40.693830 tx_win_center[1][0][5] = 0
4379 00:40:40.694347 tx_first_pass[1][0][5] = 0
4380 00:40:40.697833 tx_last_pass[1][0][5] = 0
4381 00:40:40.700624 tx_win_center[1][0][6] = 0
4382 00:40:40.704030 tx_first_pass[1][0][6] = 0
4383 00:40:40.704456 tx_last_pass[1][0][6] = 0
4384 00:40:40.707309 tx_win_center[1][0][7] = 0
4385 00:40:40.710417 tx_first_pass[1][0][7] = 0
4386 00:40:40.710949 tx_last_pass[1][0][7] = 0
4387 00:40:40.714084 tx_win_center[1][0][8] = 0
4388 00:40:40.717139 tx_first_pass[1][0][8] = 0
4389 00:40:40.720703 tx_last_pass[1][0][8] = 0
4390 00:40:40.721119 tx_win_center[1][0][9] = 0
4391 00:40:40.723828 tx_first_pass[1][0][9] = 0
4392 00:40:40.727258 tx_last_pass[1][0][9] = 0
4393 00:40:40.731063 tx_win_center[1][0][10] = 0
4394 00:40:40.731477 tx_first_pass[1][0][10] = 0
4395 00:40:40.733740 tx_last_pass[1][0][10] = 0
4396 00:40:40.737369 tx_win_center[1][0][11] = 0
4397 00:40:40.741197 tx_first_pass[1][0][11] = 0
4398 00:40:40.741687 tx_last_pass[1][0][11] = 0
4399 00:40:40.744393 tx_win_center[1][0][12] = 0
4400 00:40:40.747477 tx_first_pass[1][0][12] = 0
4401 00:40:40.747890 tx_last_pass[1][0][12] = 0
4402 00:40:40.751013 tx_win_center[1][0][13] = 0
4403 00:40:40.753993 tx_first_pass[1][0][13] = 0
4404 00:40:40.757561 tx_last_pass[1][0][13] = 0
4405 00:40:40.757975 tx_win_center[1][0][14] = 0
4406 00:40:40.761083 tx_first_pass[1][0][14] = 0
4407 00:40:40.764046 tx_last_pass[1][0][14] = 0
4408 00:40:40.767436 tx_win_center[1][0][15] = 0
4409 00:40:40.767904 tx_first_pass[1][0][15] = 0
4410 00:40:40.770773 tx_last_pass[1][0][15] = 0
4411 00:40:40.774613 tx_win_center[1][1][0] = 0
4412 00:40:40.777816 tx_first_pass[1][1][0] = 0
4413 00:40:40.778241 tx_last_pass[1][1][0] = 0
4414 00:40:40.780899 tx_win_center[1][1][1] = 0
4415 00:40:40.784624 tx_first_pass[1][1][1] = 0
4416 00:40:40.787688 tx_last_pass[1][1][1] = 0
4417 00:40:40.788099 tx_win_center[1][1][2] = 0
4418 00:40:40.791040 tx_first_pass[1][1][2] = 0
4419 00:40:40.794176 tx_last_pass[1][1][2] = 0
4420 00:40:40.794714 tx_win_center[1][1][3] = 0
4421 00:40:40.798051 tx_first_pass[1][1][3] = 0
4422 00:40:40.801079 tx_last_pass[1][1][3] = 0
4423 00:40:40.804443 tx_win_center[1][1][4] = 0
4424 00:40:40.804855 tx_first_pass[1][1][4] = 0
4425 00:40:40.808220 tx_last_pass[1][1][4] = 0
4426 00:40:40.811482 tx_win_center[1][1][5] = 0
4427 00:40:40.812039 tx_first_pass[1][1][5] = 0
4428 00:40:40.814743 tx_last_pass[1][1][5] = 0
4429 00:40:40.817527 tx_win_center[1][1][6] = 0
4430 00:40:40.821359 tx_first_pass[1][1][6] = 0
4431 00:40:40.821778 tx_last_pass[1][1][6] = 0
4432 00:40:40.824433 tx_win_center[1][1][7] = 0
4433 00:40:40.828176 tx_first_pass[1][1][7] = 0
4434 00:40:40.828710 tx_last_pass[1][1][7] = 0
4435 00:40:40.831334 tx_win_center[1][1][8] = 0
4436 00:40:40.834666 tx_first_pass[1][1][8] = 0
4437 00:40:40.837664 tx_last_pass[1][1][8] = 0
4438 00:40:40.838080 tx_win_center[1][1][9] = 0
4439 00:40:40.841127 tx_first_pass[1][1][9] = 0
4440 00:40:40.844413 tx_last_pass[1][1][9] = 0
4441 00:40:40.847910 tx_win_center[1][1][10] = 0
4442 00:40:40.848482 tx_first_pass[1][1][10] = 0
4443 00:40:40.851283 tx_last_pass[1][1][10] = 0
4444 00:40:40.854781 tx_win_center[1][1][11] = 0
4445 00:40:40.857823 tx_first_pass[1][1][11] = 0
4446 00:40:40.858235 tx_last_pass[1][1][11] = 0
4447 00:40:40.861235 tx_win_center[1][1][12] = 0
4448 00:40:40.864524 tx_first_pass[1][1][12] = 0
4449 00:40:40.868232 tx_last_pass[1][1][12] = 0
4450 00:40:40.868746 tx_win_center[1][1][13] = 0
4451 00:40:40.871617 tx_first_pass[1][1][13] = 0
4452 00:40:40.874858 tx_last_pass[1][1][13] = 0
4453 00:40:40.878444 tx_win_center[1][1][14] = 0
4454 00:40:40.878870 tx_first_pass[1][1][14] = 0
4455 00:40:40.881782 tx_last_pass[1][1][14] = 0
4456 00:40:40.884950 tx_win_center[1][1][15] = 0
4457 00:40:40.888486 tx_first_pass[1][1][15] = 0
4458 00:40:40.889013 tx_last_pass[1][1][15] = 0
4459 00:40:40.891389 dump params rx window
4460 00:40:40.894704 rx_firspass[0][0][0] = 0
4461 00:40:40.895281 rx_lastpass[0][0][0] = 0
4462 00:40:40.898024 rx_firspass[0][0][1] = 0
4463 00:40:40.900975 rx_lastpass[0][0][1] = 0
4464 00:40:40.901438 rx_firspass[0][0][2] = 0
4465 00:40:40.904674 rx_lastpass[0][0][2] = 0
4466 00:40:40.908510 rx_firspass[0][0][3] = 0
4467 00:40:40.909026 rx_lastpass[0][0][3] = 0
4468 00:40:40.911241 rx_firspass[0][0][4] = 0
4469 00:40:40.914600 rx_lastpass[0][0][4] = 0
4470 00:40:40.915020 rx_firspass[0][0][5] = 0
4471 00:40:40.917700 rx_lastpass[0][0][5] = 0
4472 00:40:40.921300 rx_firspass[0][0][6] = 0
4473 00:40:40.924498 rx_lastpass[0][0][6] = 0
4474 00:40:40.924922 rx_firspass[0][0][7] = 0
4475 00:40:40.927810 rx_lastpass[0][0][7] = 0
4476 00:40:40.931684 rx_firspass[0][0][8] = 0
4477 00:40:40.932215 rx_lastpass[0][0][8] = 0
4478 00:40:40.934692 rx_firspass[0][0][9] = 0
4479 00:40:40.937952 rx_lastpass[0][0][9] = 0
4480 00:40:40.938422 rx_firspass[0][0][10] = 0
4481 00:40:40.941055 rx_lastpass[0][0][10] = 0
4482 00:40:40.945159 rx_firspass[0][0][11] = 0
4483 00:40:40.945717 rx_lastpass[0][0][11] = 0
4484 00:40:40.947925 rx_firspass[0][0][12] = 0
4485 00:40:40.951496 rx_lastpass[0][0][12] = 0
4486 00:40:40.954547 rx_firspass[0][0][13] = 0
4487 00:40:40.954973 rx_lastpass[0][0][13] = 0
4488 00:40:40.958343 rx_firspass[0][0][14] = 0
4489 00:40:40.961533 rx_lastpass[0][0][14] = 0
4490 00:40:40.961958 rx_firspass[0][0][15] = 0
4491 00:40:40.964921 rx_lastpass[0][0][15] = 0
4492 00:40:40.967820 rx_firspass[0][1][0] = 0
4493 00:40:40.971600 rx_lastpass[0][1][0] = 0
4494 00:40:40.972024 rx_firspass[0][1][1] = 0
4495 00:40:40.974896 rx_lastpass[0][1][1] = 0
4496 00:40:40.978349 rx_firspass[0][1][2] = 0
4497 00:40:40.978772 rx_lastpass[0][1][2] = 0
4498 00:40:40.981575 rx_firspass[0][1][3] = 0
4499 00:40:40.985177 rx_lastpass[0][1][3] = 0
4500 00:40:40.985719 rx_firspass[0][1][4] = 0
4501 00:40:40.988289 rx_lastpass[0][1][4] = 0
4502 00:40:40.991277 rx_firspass[0][1][5] = 0
4503 00:40:40.991792 rx_lastpass[0][1][5] = 0
4504 00:40:40.994974 rx_firspass[0][1][6] = 0
4505 00:40:40.998214 rx_lastpass[0][1][6] = 0
4506 00:40:40.998636 rx_firspass[0][1][7] = 0
4507 00:40:41.001384 rx_lastpass[0][1][7] = 0
4508 00:40:41.004449 rx_firspass[0][1][8] = 0
4509 00:40:41.004870 rx_lastpass[0][1][8] = 0
4510 00:40:41.007988 rx_firspass[0][1][9] = 0
4511 00:40:41.011402 rx_lastpass[0][1][9] = 0
4512 00:40:41.015415 rx_firspass[0][1][10] = 0
4513 00:40:41.016001 rx_lastpass[0][1][10] = 0
4514 00:40:41.018139 rx_firspass[0][1][11] = 0
4515 00:40:41.021561 rx_lastpass[0][1][11] = 0
4516 00:40:41.021982 rx_firspass[0][1][12] = 0
4517 00:40:41.024769 rx_lastpass[0][1][12] = 0
4518 00:40:41.028381 rx_firspass[0][1][13] = 0
4519 00:40:41.028804 rx_lastpass[0][1][13] = 0
4520 00:40:41.031167 rx_firspass[0][1][14] = 0
4521 00:40:41.034836 rx_lastpass[0][1][14] = 0
4522 00:40:41.038057 rx_firspass[0][1][15] = 0
4523 00:40:41.038550 rx_lastpass[0][1][15] = 0
4524 00:40:41.041344 rx_firspass[1][0][0] = 0
4525 00:40:41.044945 rx_lastpass[1][0][0] = 0
4526 00:40:41.045484 rx_firspass[1][0][1] = 0
4527 00:40:41.047984 rx_lastpass[1][0][1] = 0
4528 00:40:41.051942 rx_firspass[1][0][2] = 0
4529 00:40:41.052467 rx_lastpass[1][0][2] = 0
4530 00:40:41.054713 rx_firspass[1][0][3] = 0
4531 00:40:41.058993 rx_lastpass[1][0][3] = 0
4532 00:40:41.059528 rx_firspass[1][0][4] = 0
4533 00:40:41.061936 rx_lastpass[1][0][4] = 0
4534 00:40:41.065127 rx_firspass[1][0][5] = 0
4535 00:40:41.068463 rx_lastpass[1][0][5] = 0
4536 00:40:41.068885 rx_firspass[1][0][6] = 0
4537 00:40:41.071902 rx_lastpass[1][0][6] = 0
4538 00:40:41.075145 rx_firspass[1][0][7] = 0
4539 00:40:41.075669 rx_lastpass[1][0][7] = 0
4540 00:40:41.078300 rx_firspass[1][0][8] = 0
4541 00:40:41.081896 rx_lastpass[1][0][8] = 0
4542 00:40:41.082434 rx_firspass[1][0][9] = 0
4543 00:40:41.085045 rx_lastpass[1][0][9] = 0
4544 00:40:41.088208 rx_firspass[1][0][10] = 0
4545 00:40:41.088676 rx_lastpass[1][0][10] = 0
4546 00:40:41.092106 rx_firspass[1][0][11] = 0
4547 00:40:41.095054 rx_lastpass[1][0][11] = 0
4548 00:40:41.098821 rx_firspass[1][0][12] = 0
4549 00:40:41.099354 rx_lastpass[1][0][12] = 0
4550 00:40:41.101699 rx_firspass[1][0][13] = 0
4551 00:40:41.104760 rx_lastpass[1][0][13] = 0
4552 00:40:41.105182 rx_firspass[1][0][14] = 0
4553 00:40:41.108434 rx_lastpass[1][0][14] = 0
4554 00:40:41.111659 rx_firspass[1][0][15] = 0
4555 00:40:41.115526 rx_lastpass[1][0][15] = 0
4556 00:40:41.116064 rx_firspass[1][1][0] = 0
4557 00:40:41.118712 rx_lastpass[1][1][0] = 0
4558 00:40:41.121742 rx_firspass[1][1][1] = 0
4559 00:40:41.122211 rx_lastpass[1][1][1] = 0
4560 00:40:41.124730 rx_firspass[1][1][2] = 0
4561 00:40:41.128312 rx_lastpass[1][1][2] = 0
4562 00:40:41.128800 rx_firspass[1][1][3] = 0
4563 00:40:41.131711 rx_lastpass[1][1][3] = 0
4564 00:40:41.134959 rx_firspass[1][1][4] = 0
4565 00:40:41.135505 rx_lastpass[1][1][4] = 0
4566 00:40:41.138438 rx_firspass[1][1][5] = 0
4567 00:40:41.141547 rx_lastpass[1][1][5] = 0
4568 00:40:41.141967 rx_firspass[1][1][6] = 0
4569 00:40:41.145050 rx_lastpass[1][1][6] = 0
4570 00:40:41.148508 rx_firspass[1][1][7] = 0
4571 00:40:41.149048 rx_lastpass[1][1][7] = 0
4572 00:40:41.151891 rx_firspass[1][1][8] = 0
4573 00:40:41.154730 rx_lastpass[1][1][8] = 0
4574 00:40:41.158140 rx_firspass[1][1][9] = 0
4575 00:40:41.158558 rx_lastpass[1][1][9] = 0
4576 00:40:41.161977 rx_firspass[1][1][10] = 0
4577 00:40:41.165114 rx_lastpass[1][1][10] = 0
4578 00:40:41.165612 rx_firspass[1][1][11] = 0
4579 00:40:41.168776 rx_lastpass[1][1][11] = 0
4580 00:40:41.171597 rx_firspass[1][1][12] = 0
4581 00:40:41.172052 rx_lastpass[1][1][12] = 0
4582 00:40:41.174978 rx_firspass[1][1][13] = 0
4583 00:40:41.177969 rx_lastpass[1][1][13] = 0
4584 00:40:41.181431 rx_firspass[1][1][14] = 0
4585 00:40:41.181963 rx_lastpass[1][1][14] = 0
4586 00:40:41.185042 rx_firspass[1][1][15] = 0
4587 00:40:41.188433 rx_lastpass[1][1][15] = 0
4588 00:40:41.188946 dump params clk_delay
4589 00:40:41.191719 clk_delay[0] = 0
4590 00:40:41.192288 clk_delay[1] = 0
4591 00:40:41.194967 dump params dqs_delay
4592 00:40:41.195575 dqs_delay[0][0] = 0
4593 00:40:41.198393 dqs_delay[0][1] = 0
4594 00:40:41.198821 dqs_delay[1][0] = 0
4595 00:40:41.201890 dqs_delay[1][1] = 0
4596 00:40:41.205205 dump params delay_cell_unit = 762
4597 00:40:41.205936 dump source = 0x0
4598 00:40:41.208078 dump params frequency:800
4599 00:40:41.211851 dump params rank number:2
4600 00:40:41.212448
4601 00:40:41.215096 dump params write leveling
4602 00:40:41.215701 write leveling[0][0][0] = 0x0
4603 00:40:41.218362 write leveling[0][0][1] = 0x0
4604 00:40:41.221434 write leveling[0][1][0] = 0x0
4605 00:40:41.224777 write leveling[0][1][1] = 0x0
4606 00:40:41.228230 write leveling[1][0][0] = 0x0
4607 00:40:41.228802 write leveling[1][0][1] = 0x0
4608 00:40:41.231956 write leveling[1][1][0] = 0x0
4609 00:40:41.234999 write leveling[1][1][1] = 0x0
4610 00:40:41.237968 dump params cbt_cs
4611 00:40:41.238498 cbt_cs[0][0] = 0x0
4612 00:40:41.241554 cbt_cs[0][1] = 0x0
4613 00:40:41.241970 cbt_cs[1][0] = 0x0
4614 00:40:41.245093 cbt_cs[1][1] = 0x0
4615 00:40:41.245778 dump params cbt_mr12
4616 00:40:41.248175 cbt_mr12[0][0] = 0x0
4617 00:40:41.248844 cbt_mr12[0][1] = 0x0
4618 00:40:41.251477 cbt_mr12[1][0] = 0x0
4619 00:40:41.251893 cbt_mr12[1][1] = 0x0
4620 00:40:41.254863 dump params tx window
4621 00:40:41.258033 tx_center_min[0][0][0] = 0
4622 00:40:41.261212 tx_center_max[0][0][0] = 0
4623 00:40:41.261822 tx_center_min[0][0][1] = 0
4624 00:40:41.265371 tx_center_max[0][0][1] = 0
4625 00:40:41.267892 tx_center_min[0][1][0] = 0
4626 00:40:41.268433 tx_center_max[0][1][0] = 0
4627 00:40:41.271487 tx_center_min[0][1][1] = 0
4628 00:40:41.275215 tx_center_max[0][1][1] = 0
4629 00:40:41.278346 tx_center_min[1][0][0] = 0
4630 00:40:41.278768 tx_center_max[1][0][0] = 0
4631 00:40:41.281717 tx_center_min[1][0][1] = 0
4632 00:40:41.284636 tx_center_max[1][0][1] = 0
4633 00:40:41.288250 tx_center_min[1][1][0] = 0
4634 00:40:41.288760 tx_center_max[1][1][0] = 0
4635 00:40:41.291279 tx_center_min[1][1][1] = 0
4636 00:40:41.294888 tx_center_max[1][1][1] = 0
4637 00:40:41.295397 dump params tx window
4638 00:40:41.297762 tx_win_center[0][0][0] = 0
4639 00:40:41.301742 tx_first_pass[0][0][0] = 0
4640 00:40:41.304713 tx_last_pass[0][0][0] = 0
4641 00:40:41.305217 tx_win_center[0][0][1] = 0
4642 00:40:41.307820 tx_first_pass[0][0][1] = 0
4643 00:40:41.311651 tx_last_pass[0][0][1] = 0
4644 00:40:41.314807 tx_win_center[0][0][2] = 0
4645 00:40:41.315228 tx_first_pass[0][0][2] = 0
4646 00:40:41.318384 tx_last_pass[0][0][2] = 0
4647 00:40:41.321372 tx_win_center[0][0][3] = 0
4648 00:40:41.321800 tx_first_pass[0][0][3] = 0
4649 00:40:41.324791 tx_last_pass[0][0][3] = 0
4650 00:40:41.328036 tx_win_center[0][0][4] = 0
4651 00:40:41.331484 tx_first_pass[0][0][4] = 0
4652 00:40:41.331908 tx_last_pass[0][0][4] = 0
4653 00:40:41.335124 tx_win_center[0][0][5] = 0
4654 00:40:41.338111 tx_first_pass[0][0][5] = 0
4655 00:40:41.341508 tx_last_pass[0][0][5] = 0
4656 00:40:41.341932 tx_win_center[0][0][6] = 0
4657 00:40:41.344938 tx_first_pass[0][0][6] = 0
4658 00:40:41.348201 tx_last_pass[0][0][6] = 0
4659 00:40:41.348698 tx_win_center[0][0][7] = 0
4660 00:40:41.351875 tx_first_pass[0][0][7] = 0
4661 00:40:41.354994 tx_last_pass[0][0][7] = 0
4662 00:40:41.357970 tx_win_center[0][0][8] = 0
4663 00:40:41.358394 tx_first_pass[0][0][8] = 0
4664 00:40:41.361383 tx_last_pass[0][0][8] = 0
4665 00:40:41.364760 tx_win_center[0][0][9] = 0
4666 00:40:41.365183 tx_first_pass[0][0][9] = 0
4667 00:40:41.368194 tx_last_pass[0][0][9] = 0
4668 00:40:41.371377 tx_win_center[0][0][10] = 0
4669 00:40:41.374796 tx_first_pass[0][0][10] = 0
4670 00:40:41.375330 tx_last_pass[0][0][10] = 0
4671 00:40:41.378573 tx_win_center[0][0][11] = 0
4672 00:40:41.381583 tx_first_pass[0][0][11] = 0
4673 00:40:41.385190 tx_last_pass[0][0][11] = 0
4674 00:40:41.385822 tx_win_center[0][0][12] = 0
4675 00:40:41.388201 tx_first_pass[0][0][12] = 0
4676 00:40:41.391408 tx_last_pass[0][0][12] = 0
4677 00:40:41.394770 tx_win_center[0][0][13] = 0
4678 00:40:41.395193 tx_first_pass[0][0][13] = 0
4679 00:40:41.398194 tx_last_pass[0][0][13] = 0
4680 00:40:41.401628 tx_win_center[0][0][14] = 0
4681 00:40:41.405036 tx_first_pass[0][0][14] = 0
4682 00:40:41.405494 tx_last_pass[0][0][14] = 0
4683 00:40:41.408357 tx_win_center[0][0][15] = 0
4684 00:40:41.412067 tx_first_pass[0][0][15] = 0
4685 00:40:41.415042 tx_last_pass[0][0][15] = 0
4686 00:40:41.415473 tx_win_center[0][1][0] = 0
4687 00:40:41.418609 tx_first_pass[0][1][0] = 0
4688 00:40:41.421858 tx_last_pass[0][1][0] = 0
4689 00:40:41.422386 tx_win_center[0][1][1] = 0
4690 00:40:41.425174 tx_first_pass[0][1][1] = 0
4691 00:40:41.428450 tx_last_pass[0][1][1] = 0
4692 00:40:41.431970 tx_win_center[0][1][2] = 0
4693 00:40:41.432544 tx_first_pass[0][1][2] = 0
4694 00:40:41.434957 tx_last_pass[0][1][2] = 0
4695 00:40:41.438578 tx_win_center[0][1][3] = 0
4696 00:40:41.442094 tx_first_pass[0][1][3] = 0
4697 00:40:41.442532 tx_last_pass[0][1][3] = 0
4698 00:40:41.445288 tx_win_center[0][1][4] = 0
4699 00:40:41.448587 tx_first_pass[0][1][4] = 0
4700 00:40:41.449012 tx_last_pass[0][1][4] = 0
4701 00:40:41.452141 tx_win_center[0][1][5] = 0
4702 00:40:41.454840 tx_first_pass[0][1][5] = 0
4703 00:40:41.458508 tx_last_pass[0][1][5] = 0
4704 00:40:41.458933 tx_win_center[0][1][6] = 0
4705 00:40:41.461771 tx_first_pass[0][1][6] = 0
4706 00:40:41.465145 tx_last_pass[0][1][6] = 0
4707 00:40:41.468561 tx_win_center[0][1][7] = 0
4708 00:40:41.468986 tx_first_pass[0][1][7] = 0
4709 00:40:41.471496 tx_last_pass[0][1][7] = 0
4710 00:40:41.475077 tx_win_center[0][1][8] = 0
4711 00:40:41.475501 tx_first_pass[0][1][8] = 0
4712 00:40:41.478354 tx_last_pass[0][1][8] = 0
4713 00:40:41.481489 tx_win_center[0][1][9] = 0
4714 00:40:41.485236 tx_first_pass[0][1][9] = 0
4715 00:40:41.485803 tx_last_pass[0][1][9] = 0
4716 00:40:41.488608 tx_win_center[0][1][10] = 0
4717 00:40:41.491699 tx_first_pass[0][1][10] = 0
4718 00:40:41.495205 tx_last_pass[0][1][10] = 0
4719 00:40:41.495734 tx_win_center[0][1][11] = 0
4720 00:40:41.498673 tx_first_pass[0][1][11] = 0
4721 00:40:41.502167 tx_last_pass[0][1][11] = 0
4722 00:40:41.505023 tx_win_center[0][1][12] = 0
4723 00:40:41.505488 tx_first_pass[0][1][12] = 0
4724 00:40:41.508580 tx_last_pass[0][1][12] = 0
4725 00:40:41.512009 tx_win_center[0][1][13] = 0
4726 00:40:41.514949 tx_first_pass[0][1][13] = 0
4727 00:40:41.515377 tx_last_pass[0][1][13] = 0
4728 00:40:41.518531 tx_win_center[0][1][14] = 0
4729 00:40:41.521609 tx_first_pass[0][1][14] = 0
4730 00:40:41.525104 tx_last_pass[0][1][14] = 0
4731 00:40:41.525830 tx_win_center[0][1][15] = 0
4732 00:40:41.528363 tx_first_pass[0][1][15] = 0
4733 00:40:41.532072 tx_last_pass[0][1][15] = 0
4734 00:40:41.534928 tx_win_center[1][0][0] = 0
4735 00:40:41.535362 tx_first_pass[1][0][0] = 0
4736 00:40:41.538189 tx_last_pass[1][0][0] = 0
4737 00:40:41.541875 tx_win_center[1][0][1] = 0
4738 00:40:41.542301 tx_first_pass[1][0][1] = 0
4739 00:40:41.545051 tx_last_pass[1][0][1] = 0
4740 00:40:41.548241 tx_win_center[1][0][2] = 0
4741 00:40:41.552001 tx_first_pass[1][0][2] = 0
4742 00:40:41.552503 tx_last_pass[1][0][2] = 0
4743 00:40:41.554683 tx_win_center[1][0][3] = 0
4744 00:40:41.558524 tx_first_pass[1][0][3] = 0
4745 00:40:41.561645 tx_last_pass[1][0][3] = 0
4746 00:40:41.562149 tx_win_center[1][0][4] = 0
4747 00:40:41.564751 tx_first_pass[1][0][4] = 0
4748 00:40:41.568324 tx_last_pass[1][0][4] = 0
4749 00:40:41.568824 tx_win_center[1][0][5] = 0
4750 00:40:41.571415 tx_first_pass[1][0][5] = 0
4751 00:40:41.574904 tx_last_pass[1][0][5] = 0
4752 00:40:41.578092 tx_win_center[1][0][6] = 0
4753 00:40:41.578517 tx_first_pass[1][0][6] = 0
4754 00:40:41.581668 tx_last_pass[1][0][6] = 0
4755 00:40:41.584731 tx_win_center[1][0][7] = 0
4756 00:40:41.588410 tx_first_pass[1][0][7] = 0
4757 00:40:41.588926 tx_last_pass[1][0][7] = 0
4758 00:40:41.591746 tx_win_center[1][0][8] = 0
4759 00:40:41.595084 tx_first_pass[1][0][8] = 0
4760 00:40:41.595511 tx_last_pass[1][0][8] = 0
4761 00:40:41.598103 tx_win_center[1][0][9] = 0
4762 00:40:41.601778 tx_first_pass[1][0][9] = 0
4763 00:40:41.605119 tx_last_pass[1][0][9] = 0
4764 00:40:41.605662 tx_win_center[1][0][10] = 0
4765 00:40:41.608124 tx_first_pass[1][0][10] = 0
4766 00:40:41.611429 tx_last_pass[1][0][10] = 0
4767 00:40:41.615512 tx_win_center[1][0][11] = 0
4768 00:40:41.615939 tx_first_pass[1][0][11] = 0
4769 00:40:41.618223 tx_last_pass[1][0][11] = 0
4770 00:40:41.621677 tx_win_center[1][0][12] = 0
4771 00:40:41.624997 tx_first_pass[1][0][12] = 0
4772 00:40:41.625472 tx_last_pass[1][0][12] = 0
4773 00:40:41.628468 tx_win_center[1][0][13] = 0
4774 00:40:41.631523 tx_first_pass[1][0][13] = 0
4775 00:40:41.634993 tx_last_pass[1][0][13] = 0
4776 00:40:41.635472 tx_win_center[1][0][14] = 0
4777 00:40:41.638145 tx_first_pass[1][0][14] = 0
4778 00:40:41.641801 tx_last_pass[1][0][14] = 0
4779 00:40:41.644798 tx_win_center[1][0][15] = 0
4780 00:40:41.645225 tx_first_pass[1][0][15] = 0
4781 00:40:41.648307 tx_last_pass[1][0][15] = 0
4782 00:40:41.651448 tx_win_center[1][1][0] = 0
4783 00:40:41.654971 tx_first_pass[1][1][0] = 0
4784 00:40:41.655415 tx_last_pass[1][1][0] = 0
4785 00:40:41.658384 tx_win_center[1][1][1] = 0
4786 00:40:41.661377 tx_first_pass[1][1][1] = 0
4787 00:40:41.661896 tx_last_pass[1][1][1] = 0
4788 00:40:41.664680 tx_win_center[1][1][2] = 0
4789 00:40:41.668044 tx_first_pass[1][1][2] = 0
4790 00:40:41.671615 tx_last_pass[1][1][2] = 0
4791 00:40:41.672036 tx_win_center[1][1][3] = 0
4792 00:40:41.674963 tx_first_pass[1][1][3] = 0
4793 00:40:41.678095 tx_last_pass[1][1][3] = 0
4794 00:40:41.681383 tx_win_center[1][1][4] = 0
4795 00:40:41.681807 tx_first_pass[1][1][4] = 0
4796 00:40:41.684750 tx_last_pass[1][1][4] = 0
4797 00:40:41.688079 tx_win_center[1][1][5] = 0
4798 00:40:41.688503 tx_first_pass[1][1][5] = 0
4799 00:40:41.691305 tx_last_pass[1][1][5] = 0
4800 00:40:41.695232 tx_win_center[1][1][6] = 0
4801 00:40:41.698209 tx_first_pass[1][1][6] = 0
4802 00:40:41.698634 tx_last_pass[1][1][6] = 0
4803 00:40:41.701320 tx_win_center[1][1][7] = 0
4804 00:40:41.704555 tx_first_pass[1][1][7] = 0
4805 00:40:41.707662 tx_last_pass[1][1][7] = 0
4806 00:40:41.708090 tx_win_center[1][1][8] = 0
4807 00:40:41.711080 tx_first_pass[1][1][8] = 0
4808 00:40:41.714157 tx_last_pass[1][1][8] = 0
4809 00:40:41.714573 tx_win_center[1][1][9] = 0
4810 00:40:41.717479 tx_first_pass[1][1][9] = 0
4811 00:40:41.720887 tx_last_pass[1][1][9] = 0
4812 00:40:41.724749 tx_win_center[1][1][10] = 0
4813 00:40:41.725182 tx_first_pass[1][1][10] = 0
4814 00:40:41.727578 tx_last_pass[1][1][10] = 0
4815 00:40:41.730877 tx_win_center[1][1][11] = 0
4816 00:40:41.734325 tx_first_pass[1][1][11] = 0
4817 00:40:41.734762 tx_last_pass[1][1][11] = 0
4818 00:40:41.737851 tx_win_center[1][1][12] = 0
4819 00:40:41.740839 tx_first_pass[1][1][12] = 0
4820 00:40:41.744099 tx_last_pass[1][1][12] = 0
4821 00:40:41.744563 tx_win_center[1][1][13] = 0
4822 00:40:41.747535 tx_first_pass[1][1][13] = 0
4823 00:40:41.751106 tx_last_pass[1][1][13] = 0
4824 00:40:41.754804 tx_win_center[1][1][14] = 0
4825 00:40:41.755238 tx_first_pass[1][1][14] = 0
4826 00:40:41.757563 tx_last_pass[1][1][14] = 0
4827 00:40:41.760964 tx_win_center[1][1][15] = 0
4828 00:40:41.764466 tx_first_pass[1][1][15] = 0
4829 00:40:41.764953 tx_last_pass[1][1][15] = 0
4830 00:40:41.767765 dump params rx window
4831 00:40:41.771054 rx_firspass[0][0][0] = 0
4832 00:40:41.771475 rx_lastpass[0][0][0] = 0
4833 00:40:41.774338 rx_firspass[0][0][1] = 0
4834 00:40:41.777521 rx_lastpass[0][0][1] = 0
4835 00:40:41.777941 rx_firspass[0][0][2] = 0
4836 00:40:41.780768 rx_lastpass[0][0][2] = 0
4837 00:40:41.784481 rx_firspass[0][0][3] = 0
4838 00:40:41.787279 rx_lastpass[0][0][3] = 0
4839 00:40:41.787866 rx_firspass[0][0][4] = 0
4840 00:40:41.791142 rx_lastpass[0][0][4] = 0
4841 00:40:41.794108 rx_firspass[0][0][5] = 0
4842 00:40:41.794543 rx_lastpass[0][0][5] = 0
4843 00:40:41.797365 rx_firspass[0][0][6] = 0
4844 00:40:41.800910 rx_lastpass[0][0][6] = 0
4845 00:40:41.801374 rx_firspass[0][0][7] = 0
4846 00:40:41.804121 rx_lastpass[0][0][7] = 0
4847 00:40:41.807171 rx_firspass[0][0][8] = 0
4848 00:40:41.807764 rx_lastpass[0][0][8] = 0
4849 00:40:41.810688 rx_firspass[0][0][9] = 0
4850 00:40:41.814154 rx_lastpass[0][0][9] = 0
4851 00:40:41.814582 rx_firspass[0][0][10] = 0
4852 00:40:41.817352 rx_lastpass[0][0][10] = 0
4853 00:40:41.820601 rx_firspass[0][0][11] = 0
4854 00:40:41.824037 rx_lastpass[0][0][11] = 0
4855 00:40:41.824467 rx_firspass[0][0][12] = 0
4856 00:40:41.827558 rx_lastpass[0][0][12] = 0
4857 00:40:41.830581 rx_firspass[0][0][13] = 0
4858 00:40:41.831041 rx_lastpass[0][0][13] = 0
4859 00:40:41.833957 rx_firspass[0][0][14] = 0
4860 00:40:41.837598 rx_lastpass[0][0][14] = 0
4861 00:40:41.840915 rx_firspass[0][0][15] = 0
4862 00:40:41.841502 rx_lastpass[0][0][15] = 0
4863 00:40:41.843794 rx_firspass[0][1][0] = 0
4864 00:40:41.847329 rx_lastpass[0][1][0] = 0
4865 00:40:41.847748 rx_firspass[0][1][1] = 0
4866 00:40:41.850722 rx_lastpass[0][1][1] = 0
4867 00:40:41.854008 rx_firspass[0][1][2] = 0
4868 00:40:41.854437 rx_lastpass[0][1][2] = 0
4869 00:40:41.857634 rx_firspass[0][1][3] = 0
4870 00:40:41.860895 rx_lastpass[0][1][3] = 0
4871 00:40:41.861347 rx_firspass[0][1][4] = 0
4872 00:40:41.863840 rx_lastpass[0][1][4] = 0
4873 00:40:41.867352 rx_firspass[0][1][5] = 0
4874 00:40:41.870683 rx_lastpass[0][1][5] = 0
4875 00:40:41.871148 rx_firspass[0][1][6] = 0
4876 00:40:41.874221 rx_lastpass[0][1][6] = 0
4877 00:40:41.877365 rx_firspass[0][1][7] = 0
4878 00:40:41.877846 rx_lastpass[0][1][7] = 0
4879 00:40:41.880940 rx_firspass[0][1][8] = 0
4880 00:40:41.884129 rx_lastpass[0][1][8] = 0
4881 00:40:41.884548 rx_firspass[0][1][9] = 0
4882 00:40:41.887525 rx_lastpass[0][1][9] = 0
4883 00:40:41.890509 rx_firspass[0][1][10] = 0
4884 00:40:41.890934 rx_lastpass[0][1][10] = 0
4885 00:40:41.894139 rx_firspass[0][1][11] = 0
4886 00:40:41.897986 rx_lastpass[0][1][11] = 0
4887 00:40:41.898405 rx_firspass[0][1][12] = 0
4888 00:40:41.900907 rx_lastpass[0][1][12] = 0
4889 00:40:41.904111 rx_firspass[0][1][13] = 0
4890 00:40:41.907227 rx_lastpass[0][1][13] = 0
4891 00:40:41.907660 rx_firspass[0][1][14] = 0
4892 00:40:41.911197 rx_lastpass[0][1][14] = 0
4893 00:40:41.914034 rx_firspass[0][1][15] = 0
4894 00:40:41.917694 rx_lastpass[0][1][15] = 0
4895 00:40:41.918224 rx_firspass[1][0][0] = 0
4896 00:40:41.920781 rx_lastpass[1][0][0] = 0
4897 00:40:41.924129 rx_firspass[1][0][1] = 0
4898 00:40:41.924608 rx_lastpass[1][0][1] = 0
4899 00:40:41.927351 rx_firspass[1][0][2] = 0
4900 00:40:41.930848 rx_lastpass[1][0][2] = 0
4901 00:40:41.931438 rx_firspass[1][0][3] = 0
4902 00:40:41.934329 rx_lastpass[1][0][3] = 0
4903 00:40:41.937446 rx_firspass[1][0][4] = 0
4904 00:40:41.937861 rx_lastpass[1][0][4] = 0
4905 00:40:41.940639 rx_firspass[1][0][5] = 0
4906 00:40:41.944301 rx_lastpass[1][0][5] = 0
4907 00:40:41.944729 rx_firspass[1][0][6] = 0
4908 00:40:41.947225 rx_lastpass[1][0][6] = 0
4909 00:40:41.950632 rx_firspass[1][0][7] = 0
4910 00:40:41.951048 rx_lastpass[1][0][7] = 0
4911 00:40:41.954119 rx_firspass[1][0][8] = 0
4912 00:40:41.958052 rx_lastpass[1][0][8] = 0
4913 00:40:41.960769 rx_firspass[1][0][9] = 0
4914 00:40:41.961183 rx_lastpass[1][0][9] = 0
4915 00:40:41.964002 rx_firspass[1][0][10] = 0
4916 00:40:41.967419 rx_lastpass[1][0][10] = 0
4917 00:40:41.967840 rx_firspass[1][0][11] = 0
4918 00:40:41.970850 rx_lastpass[1][0][11] = 0
4919 00:40:41.973964 rx_firspass[1][0][12] = 0
4920 00:40:41.974400 rx_lastpass[1][0][12] = 0
4921 00:40:41.977428 rx_firspass[1][0][13] = 0
4922 00:40:41.980800 rx_lastpass[1][0][13] = 0
4923 00:40:41.984289 rx_firspass[1][0][14] = 0
4924 00:40:41.984810 rx_lastpass[1][0][14] = 0
4925 00:40:41.987741 rx_firspass[1][0][15] = 0
4926 00:40:41.991074 rx_lastpass[1][0][15] = 0
4927 00:40:41.991685 rx_firspass[1][1][0] = 0
4928 00:40:41.994122 rx_lastpass[1][1][0] = 0
4929 00:40:41.997145 rx_firspass[1][1][1] = 0
4930 00:40:42.001314 rx_lastpass[1][1][1] = 0
4931 00:40:42.001764 rx_firspass[1][1][2] = 0
4932 00:40:42.003963 rx_lastpass[1][1][2] = 0
4933 00:40:42.007653 rx_firspass[1][1][3] = 0
4934 00:40:42.008234 rx_lastpass[1][1][3] = 0
4935 00:40:42.010922 rx_firspass[1][1][4] = 0
4936 00:40:42.014077 rx_lastpass[1][1][4] = 0
4937 00:40:42.014495 rx_firspass[1][1][5] = 0
4938 00:40:42.017439 rx_lastpass[1][1][5] = 0
4939 00:40:42.020931 rx_firspass[1][1][6] = 0
4940 00:40:42.021403 rx_lastpass[1][1][6] = 0
4941 00:40:42.024281 rx_firspass[1][1][7] = 0
4942 00:40:42.027544 rx_lastpass[1][1][7] = 0
4943 00:40:42.027960 rx_firspass[1][1][8] = 0
4944 00:40:42.030715 rx_lastpass[1][1][8] = 0
4945 00:40:42.034011 rx_firspass[1][1][9] = 0
4946 00:40:42.034479 rx_lastpass[1][1][9] = 0
4947 00:40:42.037484 rx_firspass[1][1][10] = 0
4948 00:40:42.040566 rx_lastpass[1][1][10] = 0
4949 00:40:42.043802 rx_firspass[1][1][11] = 0
4950 00:40:42.044363 rx_lastpass[1][1][11] = 0
4951 00:40:42.047575 rx_firspass[1][1][12] = 0
4952 00:40:42.051088 rx_lastpass[1][1][12] = 0
4953 00:40:42.051504 rx_firspass[1][1][13] = 0
4954 00:40:42.054036 rx_lastpass[1][1][13] = 0
4955 00:40:42.057349 rx_firspass[1][1][14] = 0
4956 00:40:42.061041 rx_lastpass[1][1][14] = 0
4957 00:40:42.061506 rx_firspass[1][1][15] = 0
4958 00:40:42.064807 rx_lastpass[1][1][15] = 0
4959 00:40:42.067779 dump params clk_delay
4960 00:40:42.068197 clk_delay[0] = 0
4961 00:40:42.068527 clk_delay[1] = 0
4962 00:40:42.071260 dump params dqs_delay
4963 00:40:42.074149 dqs_delay[0][0] = 0
4964 00:40:42.074708 dqs_delay[0][1] = 0
4965 00:40:42.078019 dqs_delay[1][0] = 0
4966 00:40:42.078435 dqs_delay[1][1] = 0
4967 00:40:42.080836 dump params delay_cell_unit = 762
4968 00:40:42.084588 mt_set_emi_preloader end
4969 00:40:42.087807 [mt_mem_init] dram size: 0x100000000, rank number: 2
4970 00:40:42.094096 [complex_mem_test] start addr:0x40000000, len:20480
4971 00:40:42.129654 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4972 00:40:42.136166 [complex_mem_test] start addr:0x80000000, len:20480
4973 00:40:42.171748 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4974 00:40:42.178376 [complex_mem_test] start addr:0xc0000000, len:20480
4975 00:40:42.214130 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4976 00:40:42.220806 [complex_mem_test] start addr:0x56000000, len:8192
4977 00:40:42.237178 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4978 00:40:42.237682 ddr_geometry:1
4979 00:40:42.244110 [complex_mem_test] start addr:0x80000000, len:8192
4980 00:40:42.261177 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4981 00:40:42.264593 dram_init: dram init end (result: 0)
4982 00:40:42.271008 Successfully loaded DRAM blobs and ran DRAM calibration
4983 00:40:42.281447 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4984 00:40:42.281870 CBMEM:
4985 00:40:42.284166 IMD: root @ 00000000fffff000 254 entries.
4986 00:40:42.287456 IMD: root @ 00000000ffffec00 62 entries.
4987 00:40:42.294622 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4988 00:40:42.300883 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4989 00:40:42.304205 in-header: 03 a1 00 00 08 00 00 00
4990 00:40:42.307607 in-data: 84 60 60 10 00 00 00 00
4991 00:40:42.310938 Chrome EC: clear events_b mask to 0x0000000020004000
4992 00:40:42.318472 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4993 00:40:42.321439 in-header: 03 fd 00 00 00 00 00 00
4994 00:40:42.321856 in-data:
4995 00:40:42.328588 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4996 00:40:42.329007 CBFS @ 21000 size 3d4000
4997 00:40:42.334850 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4998 00:40:42.338365 CBFS: Locating 'fallback/ramstage'
4999 00:40:42.341642 CBFS: Found @ offset 10d40 size d563
5000 00:40:42.362941 read SPI 0x31d94 0xd547: 16639 us, 3281 KB/s, 26.248 Mbps
5001 00:40:42.375275 Accumulated console time in romstage 12808 ms
5002 00:40:42.375727
5003 00:40:42.376064
5004 00:40:42.384921 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5005 00:40:42.388622 ARM64: Exception handlers installed.
5006 00:40:42.389037 ARM64: Testing exception
5007 00:40:42.391931 ARM64: Done test exception
5008 00:40:42.395419 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5009 00:40:42.398586 Manufacturer: ef
5010 00:40:42.401590 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5011 00:40:42.408486 WARNING: RO_VPD is uninitialized or empty.
5012 00:40:42.412065 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5013 00:40:42.415322 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5014 00:40:42.424854 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5015 00:40:42.428291 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5016 00:40:42.435102 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5017 00:40:42.435519 Enumerating buses...
5018 00:40:42.441195 Show all devs... Before device enumeration.
5019 00:40:42.441665 Root Device: enabled 1
5020 00:40:42.444778 CPU_CLUSTER: 0: enabled 1
5021 00:40:42.445190 CPU: 00: enabled 1
5022 00:40:42.447848 Compare with tree...
5023 00:40:42.451174 Root Device: enabled 1
5024 00:40:42.451600 CPU_CLUSTER: 0: enabled 1
5025 00:40:42.454717 CPU: 00: enabled 1
5026 00:40:42.457975 Root Device scanning...
5027 00:40:42.458390 root_dev_scan_bus for Root Device
5028 00:40:42.461068 CPU_CLUSTER: 0 enabled
5029 00:40:42.464441 root_dev_scan_bus for Root Device done
5030 00:40:42.471418 scan_bus: scanning of bus Root Device took 10689 usecs
5031 00:40:42.471834 done
5032 00:40:42.474744 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5033 00:40:42.478574 Allocating resources...
5034 00:40:42.478992 Reading resources...
5035 00:40:42.481369 Root Device read_resources bus 0 link: 0
5036 00:40:42.488126 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5037 00:40:42.488559 CPU: 00 missing read_resources
5038 00:40:42.494834 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5039 00:40:42.498677 Root Device read_resources bus 0 link: 0 done
5040 00:40:42.501524 Done reading resources.
5041 00:40:42.505289 Show resources in subtree (Root Device)...After reading.
5042 00:40:42.508397 Root Device child on link 0 CPU_CLUSTER: 0
5043 00:40:42.511485 CPU_CLUSTER: 0 child on link 0 CPU: 00
5044 00:40:42.522137 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5045 00:40:42.522585 CPU: 00
5046 00:40:42.524695 Setting resources...
5047 00:40:42.528184 Root Device assign_resources, bus 0 link: 0
5048 00:40:42.531481 CPU_CLUSTER: 0 missing set_resources
5049 00:40:42.534825 Root Device assign_resources, bus 0 link: 0
5050 00:40:42.538067 Done setting resources.
5051 00:40:42.541880 Show resources in subtree (Root Device)...After assigning values.
5052 00:40:42.548376 Root Device child on link 0 CPU_CLUSTER: 0
5053 00:40:42.551717 CPU_CLUSTER: 0 child on link 0 CPU: 00
5054 00:40:42.558019 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5055 00:40:42.561333 CPU: 00
5056 00:40:42.561786 Done allocating resources.
5057 00:40:42.568146 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5058 00:40:42.568687 Enabling resources...
5059 00:40:42.571393 done.
5060 00:40:42.574824 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5061 00:40:42.578261 Initializing devices...
5062 00:40:42.578679 Root Device init ...
5063 00:40:42.581603 mainboard_init: Starting display init.
5064 00:40:42.585092 ADC[4]: Raw value=76494 ID=0
5065 00:40:42.607691 anx7625_power_on_init: Init interface.
5066 00:40:42.610792 anx7625_disable_pd_protocol: Disabled PD feature.
5067 00:40:42.617707 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5068 00:40:42.663985 anx7625_start_dp_work: Secure OCM version=00
5069 00:40:42.667276 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5070 00:40:42.684308 sp_tx_get_edid_block: EDID Block = 1
5071 00:40:42.801271 Extracted contents:
5072 00:40:42.804842 header: 00 ff ff ff ff ff ff 00
5073 00:40:42.808172 serial number: 06 af 5c 14 00 00 00 00 00 1a
5074 00:40:42.811359 version: 01 04
5075 00:40:42.814772 basic params: 95 1a 0e 78 02
5076 00:40:42.818684 chroma info: 99 85 95 55 56 92 28 22 50 54
5077 00:40:42.821551 established: 00 00 00
5078 00:40:42.828563 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5079 00:40:42.831739 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5080 00:40:42.838066 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5081 00:40:42.844615 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5082 00:40:42.852066 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5083 00:40:42.854715 extensions: 00
5084 00:40:42.854796 checksum: ae
5085 00:40:42.854860
5086 00:40:42.858290 Manufacturer: AUO Model 145c Serial Number 0
5087 00:40:42.861891 Made week 0 of 2016
5088 00:40:42.861973 EDID version: 1.4
5089 00:40:42.865060 Digital display
5090 00:40:42.868388 6 bits per primary color channel
5091 00:40:42.868472 DisplayPort interface
5092 00:40:42.871638 Maximum image size: 26 cm x 14 cm
5093 00:40:42.871720 Gamma: 220%
5094 00:40:42.874960 Check DPMS levels
5095 00:40:42.878543 Supported color formats: RGB 4:4:4
5096 00:40:42.881764 First detailed timing is preferred timing
5097 00:40:42.884933 Established timings supported:
5098 00:40:42.888181 Standard timings supported:
5099 00:40:42.888297 Detailed timings
5100 00:40:42.891586 Hex of detail: ce1d56ea50001a3030204600009010000018
5101 00:40:42.898561 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5102 00:40:42.901988 0556 0586 05a6 0640 hborder 0
5103 00:40:42.905533 0300 0304 030a 031a vborder 0
5104 00:40:42.908375 -hsync -vsync
5105 00:40:42.911665 Did detailed timing
5106 00:40:42.915101 Hex of detail: 0000000f0000000000000000000000000020
5107 00:40:42.918652 Manufacturer-specified data, tag 15
5108 00:40:42.921808 Hex of detail: 000000fe0041554f0a202020202020202020
5109 00:40:42.925064 ASCII string: AUO
5110 00:40:42.928697 Hex of detail: 000000fe004231313658414230312e34200a
5111 00:40:42.931572 ASCII string: B116XAB01.4
5112 00:40:42.931644 Checksum
5113 00:40:42.934979 Checksum: 0xae (valid)
5114 00:40:42.938346 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5115 00:40:42.941536 DSI data_rate: 457800000 bps
5116 00:40:42.948607 anx7625_parse_edid: set default k value to 0x3d for panel
5117 00:40:42.951731 anx7625_parse_edid: pixelclock(76300).
5118 00:40:42.955659 hactive(1366), hsync(32), hfp(48), hbp(154)
5119 00:40:42.958667 vactive(768), vsync(6), vfp(4), vbp(16)
5120 00:40:42.961644 anx7625_dsi_config: config dsi.
5121 00:40:42.970032 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5122 00:40:42.990921 anx7625_dsi_config: success to config DSI
5123 00:40:42.994319 anx7625_dp_start: MIPI phy setup OK.
5124 00:40:42.997174 [SSUSB] Setting up USB HOST controller...
5125 00:40:43.000809 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5126 00:40:43.004315 [SSUSB] phy power-on done.
5127 00:40:43.008209 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5128 00:40:43.011183 in-header: 03 fc 01 00 00 00 00 00
5129 00:40:43.011264 in-data:
5130 00:40:43.014884 handle_proto3_response: EC response with error code: 1
5131 00:40:43.018077 SPM: pcm index = 1
5132 00:40:43.021443 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5133 00:40:43.024538 CBFS @ 21000 size 3d4000
5134 00:40:43.031498 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5135 00:40:43.034558 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5136 00:40:43.037848 CBFS: Found @ offset 1e7c0 size 1026
5137 00:40:43.044700 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5138 00:40:43.047932 SPM: binary array size = 2988
5139 00:40:43.051685 SPM: version = pcm_allinone_v1.17.2_20180829
5140 00:40:43.054290 SPM binary loaded in 32 msecs
5141 00:40:43.062125 spm_kick_im_to_fetch: ptr = 000000004021eec2
5142 00:40:43.065224 spm_kick_im_to_fetch: len = 2988
5143 00:40:43.065328 SPM: spm_kick_pcm_to_run
5144 00:40:43.068390 SPM: spm_kick_pcm_to_run done
5145 00:40:43.071569 SPM: spm_init done in 52 msecs
5146 00:40:43.075377 Root Device init finished in 494996 usecs
5147 00:40:43.078341 CPU_CLUSTER: 0 init ...
5148 00:40:43.088310 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5149 00:40:43.091997 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5150 00:40:43.094840 CBFS @ 21000 size 3d4000
5151 00:40:43.098216 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5152 00:40:43.101689 CBFS: Locating 'sspm.bin'
5153 00:40:43.104925 CBFS: Found @ offset 208c0 size 41cb
5154 00:40:43.114986 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5155 00:40:43.122894 CPU_CLUSTER: 0 init finished in 42799 usecs
5156 00:40:43.122978 Devices initialized
5157 00:40:43.126009 Show all devs... After init.
5158 00:40:43.129495 Root Device: enabled 1
5159 00:40:43.129577 CPU_CLUSTER: 0: enabled 1
5160 00:40:43.133338 CPU: 00: enabled 1
5161 00:40:43.136610 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5162 00:40:43.139554 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5163 00:40:43.142759 ELOG: NV offset 0x558000 size 0x1000
5164 00:40:43.150647 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5165 00:40:43.157068 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5166 00:40:43.160978 ELOG: Event(17) added with size 13 at 2024-06-16 00:40:42 UTC
5167 00:40:43.163734 out: cmd=0x121: 03 db 21 01 00 00 00 00
5168 00:40:43.167577 in-header: 03 92 00 00 2c 00 00 00
5169 00:40:43.180899 in-data: 0c 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 ff b7 02 00 06 80 00 00 68 ac 03 00 06 80 00 00 e9 48 04 00 06 80 00 00 25 77 21 00
5170 00:40:43.183830 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5171 00:40:43.187426 in-header: 03 19 00 00 08 00 00 00
5172 00:40:43.190499 in-data: a2 e0 47 00 13 00 00 00
5173 00:40:43.194340 Chrome EC: UHEPI supported
5174 00:40:43.200868 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5175 00:40:43.204510 in-header: 03 e1 00 00 08 00 00 00
5176 00:40:43.207307 in-data: 84 20 60 10 00 00 00 00
5177 00:40:43.210557 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5178 00:40:43.217098 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5179 00:40:43.220647 in-header: 03 e1 00 00 08 00 00 00
5180 00:40:43.223994 in-data: 84 20 60 10 00 00 00 00
5181 00:40:43.230756 ELOG: Event(A1) added with size 10 at 2024-06-16 00:40:42 UTC
5182 00:40:43.237156 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5183 00:40:43.240441 ELOG: Event(A0) added with size 9 at 2024-06-16 00:40:42 UTC
5184 00:40:43.246989 elog_add_boot_reason: Logged dev mode boot
5185 00:40:43.247098 Finalize devices...
5186 00:40:43.250164 Devices finalized
5187 00:40:43.253528 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5188 00:40:43.257124 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5189 00:40:43.263570 ELOG: Event(91) added with size 10 at 2024-06-16 00:40:42 UTC
5190 00:40:43.266728 Writing coreboot table at 0xffeda000
5191 00:40:43.270448 0. 0000000000114000-000000000011efff: RAMSTAGE
5192 00:40:43.277137 1. 0000000040000000-000000004023cfff: RAMSTAGE
5193 00:40:43.280282 2. 000000004023d000-00000000545fffff: RAM
5194 00:40:43.283551 3. 0000000054600000-000000005465ffff: BL31
5195 00:40:43.287089 4. 0000000054660000-00000000ffed9fff: RAM
5196 00:40:43.293520 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5197 00:40:43.297516 6. 0000000100000000-000000013fffffff: RAM
5198 00:40:43.300345 Passing 5 GPIOs to payload:
5199 00:40:43.303620 NAME | PORT | POLARITY | VALUE
5200 00:40:43.307075 write protect | 0x00000096 | low | high
5201 00:40:43.313500 EC in RW | 0x000000b1 | high | undefined
5202 00:40:43.316796 EC interrupt | 0x00000097 | low | undefined
5203 00:40:43.323778 TPM interrupt | 0x00000099 | high | undefined
5204 00:40:43.327273 speaker enable | 0x000000af | high | undefined
5205 00:40:43.330281 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5206 00:40:43.333664 in-header: 03 f7 00 00 02 00 00 00
5207 00:40:43.333746 in-data: 04 00
5208 00:40:43.337467 Board ID: 4
5209 00:40:43.340439 ADC[3]: Raw value=1034629 ID=8
5210 00:40:43.340522 RAM code: 8
5211 00:40:43.340587 SKU ID: 16
5212 00:40:43.347108 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5213 00:40:43.347212 CBFS @ 21000 size 3d4000
5214 00:40:43.353908 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5215 00:40:43.360654 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 2258
5216 00:40:43.360737 coreboot table: 940 bytes.
5217 00:40:43.363715 IMD ROOT 0. 00000000fffff000 00001000
5218 00:40:43.370363 IMD SMALL 1. 00000000ffffe000 00001000
5219 00:40:43.374003 CONSOLE 2. 00000000fffde000 00020000
5220 00:40:43.377065 FMAP 3. 00000000fffdd000 0000047c
5221 00:40:43.380629 TIME STAMP 4. 00000000fffdc000 00000910
5222 00:40:43.383779 RAMOOPS 5. 00000000ffedc000 00100000
5223 00:40:43.387338 COREBOOT 6. 00000000ffeda000 00002000
5224 00:40:43.387421 IMD small region:
5225 00:40:43.393446 IMD ROOT 0. 00000000ffffec00 00000400
5226 00:40:43.397174 VBOOT WORK 1. 00000000ffffeb00 00000100
5227 00:40:43.400630 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5228 00:40:43.403721 VPD 3. 00000000ffffea60 0000006c
5229 00:40:43.406836 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5230 00:40:43.413851 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5231 00:40:43.416838 in-header: 03 e1 00 00 08 00 00 00
5232 00:40:43.420423 in-data: 84 20 60 10 00 00 00 00
5233 00:40:43.427084 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5234 00:40:43.427188 CBFS @ 21000 size 3d4000
5235 00:40:43.433495 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5236 00:40:43.437228 CBFS: Locating 'fallback/payload'
5237 00:40:43.445010 CBFS: Found @ offset dc040 size 439a0
5238 00:40:43.532800 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5239 00:40:43.535996 Checking segment from ROM address 0x0000000040003a00
5240 00:40:43.542724 Checking segment from ROM address 0x0000000040003a1c
5241 00:40:43.546077 Loading segment from ROM address 0x0000000040003a00
5242 00:40:43.549442 code (compression=0)
5243 00:40:43.559431 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5244 00:40:43.565992 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5245 00:40:43.569382 it's not compressed!
5246 00:40:43.573048 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5247 00:40:43.579433 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5248 00:40:43.586877 Loading segment from ROM address 0x0000000040003a1c
5249 00:40:43.590246 Entry Point 0x0000000080000000
5250 00:40:43.590321 Loaded segments
5251 00:40:43.597064 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5252 00:40:43.600402 Jumping to boot code at 0000000080000000(00000000ffeda000)
5253 00:40:43.610233 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5254 00:40:43.613912 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5255 00:40:43.616921 CBFS @ 21000 size 3d4000
5256 00:40:43.623935 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5257 00:40:43.627064 CBFS: Locating 'fallback/bl31'
5258 00:40:43.630424 CBFS: Found @ offset 36dc0 size 5820
5259 00:40:43.641136 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5260 00:40:43.644736 Checking segment from ROM address 0x0000000040003a00
5261 00:40:43.651267 Checking segment from ROM address 0x0000000040003a1c
5262 00:40:43.654352 Loading segment from ROM address 0x0000000040003a00
5263 00:40:43.657795 code (compression=1)
5264 00:40:43.664251 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5265 00:40:43.673990 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5266 00:40:43.674073 using LZMA
5267 00:40:43.682779 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5268 00:40:43.689214 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5269 00:40:43.693406 Loading segment from ROM address 0x0000000040003a1c
5270 00:40:43.696425 Entry Point 0x0000000054601000
5271 00:40:43.696506 Loaded segments
5272 00:40:43.699685 NOTICE: MT8183 bl31_setup
5273 00:40:43.706517 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5274 00:40:43.709729 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5275 00:40:43.713219 INFO: [DEVAPC] dump DEVAPC registers:
5276 00:40:43.723100 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5277 00:40:43.729735 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5278 00:40:43.739895 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5279 00:40:43.746721 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5280 00:40:43.756661 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5281 00:40:43.763287 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5282 00:40:43.773144 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5283 00:40:43.779668 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5284 00:40:43.786583 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5285 00:40:43.796732 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5286 00:40:43.803270 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5287 00:40:43.813251 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5288 00:40:43.819803 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5289 00:40:43.826902 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5290 00:40:43.836281 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5291 00:40:43.842885 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5292 00:40:43.849819 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5293 00:40:43.856449 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5294 00:40:43.862983 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5295 00:40:43.872973 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5296 00:40:43.879564 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5297 00:40:43.886241 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5298 00:40:43.889213 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5299 00:40:43.893120 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5300 00:40:43.896137 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5301 00:40:43.899990 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5302 00:40:43.902873 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5303 00:40:43.909472 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5304 00:40:43.912569 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5305 00:40:43.915980 WARNING: region 0:
5306 00:40:43.919375 WARNING: apc:0x168, sa:0x0, ea:0xfff
5307 00:40:43.922886 WARNING: region 1:
5308 00:40:43.926345 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5309 00:40:43.926426 WARNING: region 2:
5310 00:40:43.929078 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5311 00:40:43.932728 WARNING: region 3:
5312 00:40:43.935993 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5313 00:40:43.936074 WARNING: region 4:
5314 00:40:43.942594 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5315 00:40:43.942675 WARNING: region 5:
5316 00:40:43.946090 WARNING: apc:0x0, sa:0x0, ea:0x0
5317 00:40:43.946171 WARNING: region 6:
5318 00:40:43.949371 WARNING: apc:0x0, sa:0x0, ea:0x0
5319 00:40:43.952783 WARNING: region 7:
5320 00:40:43.956080 WARNING: apc:0x0, sa:0x0, ea:0x0
5321 00:40:43.963152 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5322 00:40:43.966211 INFO: SPM: enable SPMC mode
5323 00:40:43.969526 NOTICE: spm_boot_init() start
5324 00:40:43.969609 NOTICE: spm_boot_init() end
5325 00:40:43.976071 INFO: BL31: Initializing runtime services
5326 00:40:43.979183 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5327 00:40:43.986234 INFO: BL31: Preparing for EL3 exit to normal world
5328 00:40:43.989533 INFO: Entry point address = 0x80000000
5329 00:40:43.989614 INFO: SPSR = 0x8
5330 00:40:44.013042
5331 00:40:44.013128
5332 00:40:44.013194
5333 00:40:44.013254 Starting depthcharge on Juniper...
5334 00:40:44.013731 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5335 00:40:44.013829 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5336 00:40:44.013914 Setting prompt string to ['jacuzzi:']
5337 00:40:44.013996 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5338 00:40:44.016127
5339 00:40:44.019813 vboot_handoff: creating legacy vboot_handoff structure
5340 00:40:44.019894
5341 00:40:44.023168 ec_init(0): CrosEC protocol v3 supported (544, 544)
5342 00:40:44.023253
5343 00:40:44.026569 Wipe memory regions:
5344 00:40:44.026649
5345 00:40:44.029521 [0x00000040000000, 0x00000054600000)
5346 00:40:44.072296
5347 00:40:44.072381 [0x00000054660000, 0x00000080000000)
5348 00:40:44.163968
5349 00:40:44.164066 [0x000000811994a0, 0x000000ffeda000)
5350 00:40:44.424400
5351 00:40:44.424536 [0x00000100000000, 0x00000140000000)
5352 00:40:44.557032
5353 00:40:44.560247 Initializing XHCI USB controller at 0x11200000.
5354 00:40:44.583566
5355 00:40:44.586597 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5356 00:40:44.586693
5357 00:40:44.586787
5358 00:40:44.587083 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5360 00:40:44.687469 jacuzzi: tftpboot 192.168.201.1 14368350/tftp-deploy-t5a5n4a3/kernel/image.itb 14368350/tftp-deploy-t5a5n4a3/kernel/cmdline
5361 00:40:44.687603 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5362 00:40:44.687687 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5363 00:40:44.692184 tftpboot 192.168.201.1 14368350/tftp-deploy-t5a5n4a3/kernel/image.ittp-deploy-t5a5n4a3/kernel/cmdline
5364 00:40:44.692268
5365 00:40:44.692333 Waiting for link
5366 00:40:45.097093
5367 00:40:45.097251 R8152: Initializing
5368 00:40:45.097360
5369 00:40:45.100524 Version 9 (ocp_data = 6010)
5370 00:40:45.100620
5371 00:40:45.103857 R8152: Done initializing
5372 00:40:45.103951
5373 00:40:45.104043 Adding net device
5374 00:40:45.489613
5375 00:40:45.489750 done.
5376 00:40:45.489817
5377 00:40:45.489878 MAC: 00:e0:4c:71:a7:1f
5378 00:40:45.489937
5379 00:40:45.492948 Sending DHCP discover... done.
5380 00:40:45.493039
5381 00:40:45.496147 Waiting for reply... done.
5382 00:40:45.496230
5383 00:40:45.499256 Sending DHCP request... done.
5384 00:40:45.499338
5385 00:40:45.499404 Waiting for reply... done.
5386 00:40:45.499465
5387 00:40:45.502899 My ip is 192.168.201.23
5388 00:40:45.502981
5389 00:40:45.506020 The DHCP server ip is 192.168.201.1
5390 00:40:45.506103
5391 00:40:45.509171 TFTP server IP predefined by user: 192.168.201.1
5392 00:40:45.509262
5393 00:40:45.516222 Bootfile predefined by user: 14368350/tftp-deploy-t5a5n4a3/kernel/image.itb
5394 00:40:45.516305
5395 00:40:45.519751 Sending tftp read request... done.
5396 00:40:45.519833
5397 00:40:45.522818 Waiting for the transfer...
5398 00:40:45.522928
5399 00:40:45.782074 00000000 ################################################################
5400 00:40:45.782239
5401 00:40:46.034684 00080000 ################################################################
5402 00:40:46.034820
5403 00:40:46.286451 00100000 ################################################################
5404 00:40:46.286585
5405 00:40:46.539246 00180000 ################################################################
5406 00:40:46.539380
5407 00:40:46.787521 00200000 ################################################################
5408 00:40:46.787691
5409 00:40:47.035223 00280000 ################################################################
5410 00:40:47.035362
5411 00:40:47.282340 00300000 ################################################################
5412 00:40:47.282476
5413 00:40:47.528600 00380000 ################################################################
5414 00:40:47.528737
5415 00:40:47.777504 00400000 ################################################################
5416 00:40:47.777643
5417 00:40:48.025263 00480000 ################################################################
5418 00:40:48.025426
5419 00:40:48.269009 00500000 ################################################################
5420 00:40:48.269175
5421 00:40:48.512549 00580000 ################################################################
5422 00:40:48.512709
5423 00:40:48.753732 00600000 ################################################################
5424 00:40:48.753874
5425 00:40:48.996693 00680000 ################################################################
5426 00:40:48.996840
5427 00:40:49.239395 00700000 ################################################################
5428 00:40:49.239540
5429 00:40:49.482240 00780000 ################################################################
5430 00:40:49.482394
5431 00:40:49.722938 00800000 ################################################################
5432 00:40:49.723114
5433 00:40:49.963406 00880000 ################################################################
5434 00:40:49.963573
5435 00:40:50.205352 00900000 ################################################################
5436 00:40:50.205515
5437 00:40:50.446742 00980000 ################################################################
5438 00:40:50.446916
5439 00:40:50.687526 00a00000 ################################################################
5440 00:40:50.687695
5441 00:40:50.927187 00a80000 ################################################################
5442 00:40:50.927355
5443 00:40:51.168660 00b00000 ################################################################
5444 00:40:51.168821
5445 00:40:51.416098 00b80000 ################################################################
5446 00:40:51.416260
5447 00:40:51.658576 00c00000 ################################################################
5448 00:40:51.658745
5449 00:40:51.899928 00c80000 ################################################################
5450 00:40:51.900095
5451 00:40:52.141782 00d00000 ################################################################
5452 00:40:52.141948
5453 00:40:52.387558 00d80000 ################################################################
5454 00:40:52.387768
5455 00:40:52.632169 00e00000 ################################################################
5456 00:40:52.632338
5457 00:40:52.873934 00e80000 ################################################################
5458 00:40:52.874095
5459 00:40:53.115234 00f00000 ################################################################
5460 00:40:53.115414
5461 00:40:53.354959 00f80000 ################################################################
5462 00:40:53.355122
5463 00:40:53.594855 01000000 ################################################################
5464 00:40:53.595089
5465 00:40:53.838161 01080000 ################################################################
5466 00:40:53.838332
5467 00:40:54.082331 01100000 ################################################################
5468 00:40:54.082506
5469 00:40:54.324174 01180000 ################################################################
5470 00:40:54.324352
5471 00:40:54.568550 01200000 ################################################################
5472 00:40:54.568737
5473 00:40:54.811815 01280000 ################################################################
5474 00:40:54.811993
5475 00:40:55.049508 01300000 ################################################################
5476 00:40:55.049689
5477 00:40:55.290456 01380000 ################################################################
5478 00:40:55.290641
5479 00:40:55.537014 01400000 ################################################################
5480 00:40:55.537200
5481 00:40:55.780479 01480000 ################################################################
5482 00:40:55.780660
5483 00:40:56.024373 01500000 ################################################################
5484 00:40:56.024536
5485 00:40:56.267266 01580000 ################################################################
5486 00:40:56.267445
5487 00:40:56.509472 01600000 ################################################################
5488 00:40:56.509654
5489 00:40:56.753843 01680000 ################################################################
5490 00:40:56.754022
5491 00:40:56.996477 01700000 ################################################################
5492 00:40:56.996656
5493 00:40:57.239651 01780000 ################################################################
5494 00:40:57.239831
5495 00:40:57.486430 01800000 ################################################################
5496 00:40:57.486598
5497 00:40:57.734289 01880000 ################################################################
5498 00:40:57.734463
5499 00:40:57.981721 01900000 ################################################################
5500 00:40:57.981854
5501 00:40:58.229972 01980000 ################################################################
5502 00:40:58.230134
5503 00:40:58.478453 01a00000 ################################################################
5504 00:40:58.478612
5505 00:40:58.725453 01a80000 ################################################################
5506 00:40:58.725615
5507 00:40:58.972294 01b00000 ################################################################
5508 00:40:58.972441
5509 00:40:59.222279 01b80000 ################################################################
5510 00:40:59.222444
5511 00:40:59.471799 01c00000 ################################################################
5512 00:40:59.471999
5513 00:40:59.719669 01c80000 ################################################################
5514 00:40:59.719829
5515 00:40:59.970072 01d00000 ################################################################
5516 00:40:59.970229
5517 00:41:00.220341 01d80000 ################################################################
5518 00:41:00.220479
5519 00:41:00.438019 01e00000 ######################################################## done.
5520 00:41:00.440876
5521 00:41:00.440995 The bootfile was 31913610 bytes long.
5522 00:41:00.444020
5523 00:41:00.444130 Sending tftp read request... done.
5524 00:41:00.444228
5525 00:41:00.447392 Waiting for the transfer...
5526 00:41:00.447514
5527 00:41:00.450721 00000000 # done.
5528 00:41:00.450832
5529 00:41:00.457474 Command line loaded dynamically from TFTP file: 14368350/tftp-deploy-t5a5n4a3/kernel/cmdline
5530 00:41:00.457584
5531 00:41:00.484180 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5532 00:41:00.484296
5533 00:41:00.484375 Loading FIT.
5534 00:41:00.484468
5535 00:41:00.487352 Image ramdisk-1 has 18727491 bytes.
5536 00:41:00.487455
5537 00:41:00.490736 Image fdt-1 has 57695 bytes.
5538 00:41:00.490837
5539 00:41:00.494137 Image kernel-1 has 13126376 bytes.
5540 00:41:00.494237
5541 00:41:00.500969 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5542 00:41:00.504173
5543 00:41:00.514443 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5544 00:41:00.514529
5545 00:41:00.521125 Choosing best match conf-1 for compat google,juniper-sku16.
5546 00:41:00.521209
5547 00:41:00.528886 Connected to device vid:did:rid of 1ae0:0028:00
5548 00:41:00.536465
5549 00:41:00.540173 tpm_get_response: command 0x17b, return code 0x0
5550 00:41:00.540256
5551 00:41:00.543329 tpm_cleanup: add release locality here.
5552 00:41:00.543413
5553 00:41:00.547079 Shutting down all USB controllers.
5554 00:41:00.547161
5555 00:41:00.550326 Removing current net device
5556 00:41:00.550408
5557 00:41:00.553469 Exiting depthcharge with code 4 at timestamp: 32901098
5558 00:41:00.553553
5559 00:41:00.557194 LZMA decompressing kernel-1 to 0x80193568
5560 00:41:00.557315
5561 00:41:00.560060 LZMA decompressing kernel-1 to 0x40000000
5562 00:41:02.427992
5563 00:41:02.428131 jumping to kernel
5564 00:41:02.428603 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
5565 00:41:02.428705 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5566 00:41:02.428784 Setting prompt string to ['Linux version [0-9]']
5567 00:41:02.428854 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5568 00:41:02.428921 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5569 00:41:02.502786
5570 00:41:02.506026 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5571 00:41:02.509559 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5572 00:41:02.509660 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5573 00:41:02.509735 Setting prompt string to []
5574 00:41:02.509811 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5575 00:41:02.509884 Using line separator: #'\n'#
5576 00:41:02.509943 No login prompt set.
5577 00:41:02.510004 Parsing kernel messages
5578 00:41:02.510060 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5579 00:41:02.510160 [login-action] Waiting for messages, (timeout 00:04:06)
5580 00:41:02.510225 Waiting using forced prompt support (timeout 00:02:03)
5581 00:41:02.529566 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024
5582 00:41:02.533116 [ 0.000000] random: crng init done
5583 00:41:02.539748 [ 0.000000] Machine model: Google juniper sku16 board
5584 00:41:02.539830 [ 0.000000] efi: UEFI not found.
5585 00:41:02.549436 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5586 00:41:02.556010 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5587 00:41:02.566016 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5588 00:41:02.569718 [ 0.000000] printk: bootconsole [mtk8250] enabled
5589 00:41:02.578079 [ 0.000000] NUMA: No NUMA configuration found
5590 00:41:02.584710 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5591 00:41:02.591414 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5592 00:41:02.591497 [ 0.000000] Zone ranges:
5593 00:41:02.598173 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5594 00:41:02.601004 [ 0.000000] DMA32 empty
5595 00:41:02.607898 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5596 00:41:02.610865 [ 0.000000] Movable zone start for each node
5597 00:41:02.614273 [ 0.000000] Early memory node ranges
5598 00:41:02.621228 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5599 00:41:02.627776 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5600 00:41:02.634189 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5601 00:41:02.641003 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5602 00:41:02.647754 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5603 00:41:02.654153 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5604 00:41:02.670402 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5605 00:41:02.676939 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5606 00:41:02.683476 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5607 00:41:02.686855 [ 0.000000] psci: probing for conduit method from DT.
5608 00:41:02.693441 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5609 00:41:02.696728 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5610 00:41:02.703377 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5611 00:41:02.706947 [ 0.000000] psci: SMC Calling Convention v1.1
5612 00:41:02.713146 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5613 00:41:02.716906 [ 0.000000] Detected VIPT I-cache on CPU0
5614 00:41:02.723313 [ 0.000000] CPU features: detected: GIC system register CPU interface
5615 00:41:02.730252 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5616 00:41:02.736840 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5617 00:41:02.740124 [ 0.000000] CPU features: detected: ARM erratum 845719
5618 00:41:02.746543 [ 0.000000] alternatives: applying boot alternatives
5619 00:41:02.750218 [ 0.000000] Fallback order for Node 0: 0
5620 00:41:02.757029 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5621 00:41:02.759801 [ 0.000000] Policy zone: Normal
5622 00:41:02.786680 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5623 00:41:02.800097 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5624 00:41:02.809864 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5625 00:41:02.816613 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5626 00:41:02.823357 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5627 00:41:02.826589 <6>[ 0.000000] software IO TLB: area num 8.
5628 00:41:02.853751 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5629 00:41:02.911668 <6>[ 0.000000] Memory: 3896780K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261684K reserved, 32768K cma-reserved)
5630 00:41:02.918382 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5631 00:41:02.924785 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5632 00:41:02.928212 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5633 00:41:02.934737 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5634 00:41:02.941443 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5635 00:41:02.944803 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5636 00:41:02.955035 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5637 00:41:02.961393 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5638 00:41:02.964720 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5639 00:41:02.976491 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5640 00:41:02.983118 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5641 00:41:02.986909 <6>[ 0.000000] GICv3: 640 SPIs implemented
5642 00:41:02.989844 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5643 00:41:02.996316 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5644 00:41:02.999853 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5645 00:41:03.006610 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5646 00:41:03.016662 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5647 00:41:03.029998 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5648 00:41:03.036745 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5649 00:41:03.048382 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5650 00:41:03.061965 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5651 00:41:03.068512 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5652 00:41:03.075215 <6>[ 0.009471] Console: colour dummy device 80x25
5653 00:41:03.078464 <6>[ 0.014511] printk: console [tty1] enabled
5654 00:41:03.089027 <6>[ 0.018896] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5655 00:41:03.095524 <6>[ 0.029361] pid_max: default: 32768 minimum: 301
5656 00:41:03.098428 <6>[ 0.034243] LSM: Security Framework initializing
5657 00:41:03.108585 <6>[ 0.039159] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5658 00:41:03.115157 <6>[ 0.046781] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5659 00:41:03.121860 <4>[ 0.055655] cacheinfo: Unable to detect cache hierarchy for CPU 0
5660 00:41:03.132288 <6>[ 0.062282] cblist_init_generic: Setting adjustable number of callback queues.
5661 00:41:03.135525 <6>[ 0.069728] cblist_init_generic: Setting shift to 3 and lim to 1.
5662 00:41:03.145178 <6>[ 0.076080] cblist_init_generic: Setting adjustable number of callback queues.
5663 00:41:03.152203 <6>[ 0.083524] cblist_init_generic: Setting shift to 3 and lim to 1.
5664 00:41:03.155362 <6>[ 0.089922] rcu: Hierarchical SRCU implementation.
5665 00:41:03.161987 <6>[ 0.094948] rcu: Max phase no-delay instances is 1000.
5666 00:41:03.168453 <6>[ 0.102870] EFI services will not be available.
5667 00:41:03.171744 <6>[ 0.107818] smp: Bringing up secondary CPUs ...
5668 00:41:03.182617 <6>[ 0.113055] Detected VIPT I-cache on CPU1
5669 00:41:03.188798 <4>[ 0.113100] cacheinfo: Unable to detect cache hierarchy for CPU 1
5670 00:41:03.195461 <6>[ 0.113109] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5671 00:41:03.202361 <6>[ 0.113141] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5672 00:41:03.205737 <6>[ 0.113626] Detected VIPT I-cache on CPU2
5673 00:41:03.211940 <4>[ 0.113659] cacheinfo: Unable to detect cache hierarchy for CPU 2
5674 00:41:03.218921 <6>[ 0.113664] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5675 00:41:03.225363 <6>[ 0.113677] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5676 00:41:03.228755 <6>[ 0.114120] Detected VIPT I-cache on CPU3
5677 00:41:03.235573 <4>[ 0.114150] cacheinfo: Unable to detect cache hierarchy for CPU 3
5678 00:41:03.245282 <6>[ 0.114155] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5679 00:41:03.251897 <6>[ 0.114166] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5680 00:41:03.255325 <6>[ 0.114741] CPU features: detected: Spectre-v2
5681 00:41:03.258949 <6>[ 0.114751] CPU features: detected: Spectre-BHB
5682 00:41:03.265367 <6>[ 0.114755] CPU features: detected: ARM erratum 858921
5683 00:41:03.268297 <6>[ 0.114760] Detected VIPT I-cache on CPU4
5684 00:41:03.275162 <4>[ 0.114808] cacheinfo: Unable to detect cache hierarchy for CPU 4
5685 00:41:03.282032 <6>[ 0.114816] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5686 00:41:03.288089 <6>[ 0.114824] arch_timer: Enabling local workaround for ARM erratum 858921
5687 00:41:03.295334 <6>[ 0.114835] arch_timer: CPU4: Trapping CNTVCT access
5688 00:41:03.301504 <6>[ 0.114842] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5689 00:41:03.305137 <6>[ 0.115327] Detected VIPT I-cache on CPU5
5690 00:41:03.311779 <4>[ 0.115367] cacheinfo: Unable to detect cache hierarchy for CPU 5
5691 00:41:03.318153 <6>[ 0.115373] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5692 00:41:03.329008 <6>[ 0.115380] arch_timer: Enabling local workaround for ARM erratum 858921
5693 00:41:03.332061 <6>[ 0.115386] arch_timer: CPU5: Trapping CNTVCT access
5694 00:41:03.338487 <6>[ 0.115391] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5695 00:41:03.341764 <6>[ 0.115828] Detected VIPT I-cache on CPU6
5696 00:41:03.348216 <4>[ 0.115874] cacheinfo: Unable to detect cache hierarchy for CPU 6
5697 00:41:03.354744 <6>[ 0.115880] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5698 00:41:03.364897 <6>[ 0.115887] arch_timer: Enabling local workaround for ARM erratum 858921
5699 00:41:03.368439 <6>[ 0.115893] arch_timer: CPU6: Trapping CNTVCT access
5700 00:41:03.374883 <6>[ 0.115898] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5701 00:41:03.378345 <6>[ 0.116428] Detected VIPT I-cache on CPU7
5702 00:41:03.385151 <4>[ 0.116472] cacheinfo: Unable to detect cache hierarchy for CPU 7
5703 00:41:03.391585 <6>[ 0.116478] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5704 00:41:03.401431 <6>[ 0.116485] arch_timer: Enabling local workaround for ARM erratum 858921
5705 00:41:03.405082 <6>[ 0.116491] arch_timer: CPU7: Trapping CNTVCT access
5706 00:41:03.411337 <6>[ 0.116497] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5707 00:41:03.414719 <6>[ 0.116544] smp: Brought up 1 node, 8 CPUs
5708 00:41:03.421159 <6>[ 0.355443] SMP: Total of 8 processors activated.
5709 00:41:03.428049 <6>[ 0.360378] CPU features: detected: 32-bit EL0 Support
5710 00:41:03.431405 <6>[ 0.365757] CPU features: detected: 32-bit EL1 Support
5711 00:41:03.438001 <6>[ 0.371125] CPU features: detected: CRC32 instructions
5712 00:41:03.441774 <6>[ 0.376549] CPU: All CPU(s) started at EL2
5713 00:41:03.448247 <6>[ 0.380886] alternatives: applying system-wide alternatives
5714 00:41:03.454531 <6>[ 0.388873] devtmpfs: initialized
5715 00:41:03.466677 <6>[ 0.397835] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5716 00:41:03.476736 <6>[ 0.407785] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5717 00:41:03.480179 <6>[ 0.415516] pinctrl core: initialized pinctrl subsystem
5718 00:41:03.488665 <6>[ 0.422620] DMI not present or invalid.
5719 00:41:03.495028 <6>[ 0.426992] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5720 00:41:03.501586 <6>[ 0.433891] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5721 00:41:03.511953 <6>[ 0.441406] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5722 00:41:03.518541 <6>[ 0.449576] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5723 00:41:03.524877 <6>[ 0.457721] audit: initializing netlink subsys (disabled)
5724 00:41:03.531493 <5>[ 0.463403] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5725 00:41:03.538159 <6>[ 0.464364] thermal_sys: Registered thermal governor 'step_wise'
5726 00:41:03.544838 <6>[ 0.471355] thermal_sys: Registered thermal governor 'power_allocator'
5727 00:41:03.548587 <6>[ 0.477602] cpuidle: using governor menu
5728 00:41:03.555038 <6>[ 0.488549] NET: Registered PF_QIPCRTR protocol family
5729 00:41:03.561611 <6>[ 0.494036] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5730 00:41:03.568490 <6>[ 0.501129] ASID allocator initialised with 32768 entries
5731 00:41:03.571715 <6>[ 0.507902] Serial: AMBA PL011 UART driver
5732 00:41:03.584138 <4>[ 0.518296] Trying to register duplicate clock ID: 113
5733 00:41:03.643622 <6>[ 0.574434] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5734 00:41:03.658218 <6>[ 0.588794] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5735 00:41:03.661412 <6>[ 0.598546] KASLR enabled
5736 00:41:03.675511 <6>[ 0.606564] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5737 00:41:03.682796 <6>[ 0.613566] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5738 00:41:03.688923 <6>[ 0.620045] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5739 00:41:03.696073 <6>[ 0.627035] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5740 00:41:03.702714 <6>[ 0.633509] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5741 00:41:03.708955 <6>[ 0.640499] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5742 00:41:03.715869 <6>[ 0.646973] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5743 00:41:03.722347 <6>[ 0.653963] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5744 00:41:03.725515 <6>[ 0.661534] ACPI: Interpreter disabled.
5745 00:41:03.735392 <6>[ 0.669520] iommu: Default domain type: Translated
5746 00:41:03.742072 <6>[ 0.674628] iommu: DMA domain TLB invalidation policy: strict mode
5747 00:41:03.745165 <5>[ 0.681262] SCSI subsystem initialized
5748 00:41:03.751794 <6>[ 0.685688] usbcore: registered new interface driver usbfs
5749 00:41:03.758576 <6>[ 0.691416] usbcore: registered new interface driver hub
5750 00:41:03.762070 <6>[ 0.696957] usbcore: registered new device driver usb
5751 00:41:03.769065 <6>[ 0.703256] pps_core: LinuxPPS API ver. 1 registered
5752 00:41:03.779300 <6>[ 0.708441] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5753 00:41:03.782283 <6>[ 0.717766] PTP clock support registered
5754 00:41:03.785416 <6>[ 0.722018] EDAC MC: Ver: 3.0.0
5755 00:41:03.793269 <6>[ 0.727658] FPGA manager framework
5756 00:41:03.796782 <6>[ 0.731341] Advanced Linux Sound Architecture Driver Initialized.
5757 00:41:03.800578 <6>[ 0.738092] vgaarb: loaded
5758 00:41:03.807070 <6>[ 0.741218] clocksource: Switched to clocksource arch_sys_counter
5759 00:41:03.814239 <5>[ 0.747650] VFS: Disk quotas dquot_6.6.0
5760 00:41:03.820733 <6>[ 0.751823] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5761 00:41:03.823747 <6>[ 0.759000] pnp: PnP ACPI: disabled
5762 00:41:03.831640 <6>[ 0.765879] NET: Registered PF_INET protocol family
5763 00:41:03.838267 <6>[ 0.771113] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5764 00:41:03.850042 <6>[ 0.781033] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5765 00:41:03.860076 <6>[ 0.789786] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5766 00:41:03.866686 <6>[ 0.797735] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5767 00:41:03.873708 <6>[ 0.805966] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5768 00:41:03.880130 <6>[ 0.814060] TCP: Hash tables configured (established 32768 bind 32768)
5769 00:41:03.890131 <6>[ 0.820888] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5770 00:41:03.896640 <6>[ 0.827860] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5771 00:41:03.903152 <6>[ 0.835341] NET: Registered PF_UNIX/PF_LOCAL protocol family
5772 00:41:03.910046 <6>[ 0.841476] RPC: Registered named UNIX socket transport module.
5773 00:41:03.913167 <6>[ 0.847620] RPC: Registered udp transport module.
5774 00:41:03.916747 <6>[ 0.852545] RPC: Registered tcp transport module.
5775 00:41:03.923614 <6>[ 0.857468] RPC: Registered tcp NFSv4.1 backchannel transport module.
5776 00:41:03.930209 <6>[ 0.864123] PCI: CLS 0 bytes, default 64
5777 00:41:03.933197 <6>[ 0.868408] Unpacking initramfs...
5778 00:41:03.951059 <6>[ 0.881787] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5779 00:41:03.960676 <6>[ 0.890525] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5780 00:41:03.963919 <6>[ 0.899443] kvm [1]: IPA Size Limit: 40 bits
5781 00:41:03.971643 <6>[ 0.905814] kvm [1]: vgic-v2@c420000
5782 00:41:03.974801 <6>[ 0.909648] kvm [1]: GIC system register CPU interface enabled
5783 00:41:03.981795 <6>[ 0.915842] kvm [1]: vgic interrupt IRQ18
5784 00:41:03.985003 <6>[ 0.920226] kvm [1]: Hyp mode initialized successfully
5785 00:41:03.992163 <5>[ 0.926605] Initialise system trusted keyrings
5786 00:41:03.999114 <6>[ 0.931392] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5787 00:41:04.006857 <6>[ 0.941391] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5788 00:41:04.014028 <5>[ 0.947851] NFS: Registering the id_resolver key type
5789 00:41:04.016857 <5>[ 0.953169] Key type id_resolver registered
5790 00:41:04.023528 <5>[ 0.957584] Key type id_legacy registered
5791 00:41:04.030309 <6>[ 0.961891] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5792 00:41:04.037419 <6>[ 0.968810] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5793 00:41:04.043914 <6>[ 0.976561] 9p: Installing v9fs 9p2000 file system support
5794 00:41:04.071695 <5>[ 1.005817] Key type asymmetric registered
5795 00:41:04.074917 <5>[ 1.010162] Asymmetric key parser 'x509' registered
5796 00:41:04.084962 <6>[ 1.015314] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5797 00:41:04.088693 <6>[ 1.022936] io scheduler mq-deadline registered
5798 00:41:04.091702 <6>[ 1.027697] io scheduler kyber registered
5799 00:41:04.114097 <6>[ 1.048340] EINJ: ACPI disabled.
5800 00:41:04.121066 <4>[ 1.052100] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5801 00:41:04.158782 <6>[ 1.092759] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5802 00:41:04.167480 <6>[ 1.101294] printk: console [ttyS0] disabled
5803 00:41:04.195479 <6>[ 1.125958] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5804 00:41:04.201688 <6>[ 1.135440] printk: console [ttyS0] enabled
5805 00:41:04.206042 <6>[ 1.135440] printk: console [ttyS0] enabled
5806 00:41:04.211995 <6>[ 1.144351] printk: bootconsole [mtk8250] disabled
5807 00:41:04.215087 <6>[ 1.144351] printk: bootconsole [mtk8250] disabled
5808 00:41:04.225077 <3>[ 1.154890] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5809 00:41:04.231583 <3>[ 1.163277] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5810 00:41:04.261090 <6>[ 1.191687] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5811 00:41:04.268531 <6>[ 1.201338] serial serial0: tty port ttyS1 registered
5812 00:41:04.274813 <6>[ 1.207939] SuperH (H)SCI(F) driver initialized
5813 00:41:04.278081 <6>[ 1.213429] msm_serial: driver initialized
5814 00:41:04.293355 <6>[ 1.223695] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5815 00:41:04.302991 <6>[ 1.232289] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5816 00:41:04.309991 <6>[ 1.240864] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5817 00:41:04.320215 <6>[ 1.249435] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5818 00:41:04.326379 <6>[ 1.258091] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5819 00:41:04.336758 <6>[ 1.266760] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5820 00:41:04.346404 <6>[ 1.275507] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5821 00:41:04.352996 <6>[ 1.284246] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5822 00:41:04.363158 <6>[ 1.292815] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5823 00:41:04.373025 <6>[ 1.301617] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5824 00:41:04.380537 <4>[ 1.314009] cacheinfo: Unable to detect cache hierarchy for CPU 0
5825 00:41:04.389314 <6>[ 1.323354] loop: module loaded
5826 00:41:04.401531 <6>[ 1.335311] vsim1: Bringing 1800000uV into 2700000-2700000uV
5827 00:41:04.419692 <6>[ 1.353353] megasas: 07.719.03.00-rc1
5828 00:41:04.428159 <6>[ 1.362058] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5829 00:41:04.442890 <6>[ 1.376617] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5830 00:41:04.459572 <6>[ 1.393376] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5831 00:41:04.516761 <6>[ 1.443637] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5832 00:41:04.555589 <6>[ 1.489584] Freeing initrd memory: 18288K
5833 00:41:04.570808 <4>[ 1.501389] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5834 00:41:04.577650 <4>[ 1.510619] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5835 00:41:04.584774 <4>[ 1.517318] Hardware name: Google juniper sku16 board (DT)
5836 00:41:04.587848 <4>[ 1.523057] Call trace:
5837 00:41:04.590973 <4>[ 1.525757] dump_backtrace.part.0+0xe0/0xf0
5838 00:41:04.594129 <4>[ 1.530294] show_stack+0x18/0x30
5839 00:41:04.597943 <4>[ 1.533866] dump_stack_lvl+0x68/0x84
5840 00:41:04.601122 <4>[ 1.537786] dump_stack+0x18/0x34
5841 00:41:04.607707 <4>[ 1.541357] sysfs_warn_dup+0x64/0x80
5842 00:41:04.610921 <4>[ 1.545278] sysfs_do_create_link_sd+0xf0/0x100
5843 00:41:04.614282 <4>[ 1.550065] sysfs_create_link+0x20/0x40
5844 00:41:04.621045 <4>[ 1.554244] bus_add_device+0x68/0x10c
5845 00:41:04.624148 <4>[ 1.558250] device_add+0x340/0x7ac
5846 00:41:04.627555 <4>[ 1.561993] of_device_add+0x44/0x60
5847 00:41:04.631067 <4>[ 1.565827] of_platform_device_create_pdata+0x90/0x120
5848 00:41:04.637870 <4>[ 1.571308] of_platform_bus_create+0x170/0x370
5849 00:41:04.641330 <4>[ 1.576095] of_platform_populate+0x50/0xfc
5850 00:41:04.647911 <4>[ 1.580534] parse_mtd_partitions+0x1dc/0x510
5851 00:41:04.651068 <4>[ 1.585147] mtd_device_parse_register+0xf8/0x2e0
5852 00:41:04.654358 <4>[ 1.590105] spi_nor_probe+0x21c/0x2f0
5853 00:41:04.657647 <4>[ 1.594110] spi_mem_probe+0x6c/0xb0
5854 00:41:04.661149 <4>[ 1.597943] spi_probe+0x84/0xe4
5855 00:41:04.667863 <4>[ 1.601425] really_probe+0xbc/0x2e0
5856 00:41:04.671112 <4>[ 1.605255] __driver_probe_device+0x78/0x11c
5857 00:41:04.674339 <4>[ 1.609867] driver_probe_device+0xd8/0x160
5858 00:41:04.680889 <4>[ 1.614305] __device_attach_driver+0xb8/0x134
5859 00:41:04.684281 <4>[ 1.619004] bus_for_each_drv+0x78/0xd0
5860 00:41:04.687711 <4>[ 1.623094] __device_attach+0xa8/0x1c0
5861 00:41:04.690884 <4>[ 1.627184] device_initial_probe+0x14/0x20
5862 00:41:04.697952 <4>[ 1.631622] bus_probe_device+0x9c/0xa4
5863 00:41:04.701220 <4>[ 1.635712] device_add+0x3ac/0x7ac
5864 00:41:04.704548 <4>[ 1.639454] __spi_add_device+0x78/0x120
5865 00:41:04.708013 <4>[ 1.643633] spi_add_device+0x40/0x7c
5866 00:41:04.714597 <4>[ 1.647550] spi_register_controller+0x610/0xad0
5867 00:41:04.717697 <4>[ 1.652423] devm_spi_register_controller+0x4c/0xa4
5868 00:41:04.721133 <4>[ 1.657557] mtk_spi_probe+0x3f8/0x650
5869 00:41:04.727835 <4>[ 1.661561] platform_probe+0x68/0xe0
5870 00:41:04.731181 <4>[ 1.665479] really_probe+0xbc/0x2e0
5871 00:41:04.734440 <4>[ 1.669310] __driver_probe_device+0x78/0x11c
5872 00:41:04.741034 <4>[ 1.673921] driver_probe_device+0xd8/0x160
5873 00:41:04.744222 <4>[ 1.678359] __driver_attach+0x94/0x19c
5874 00:41:04.748197 <4>[ 1.682450] bus_for_each_dev+0x70/0xd0
5875 00:41:04.751389 <4>[ 1.686540] driver_attach+0x24/0x30
5876 00:41:04.754608 <4>[ 1.690370] bus_add_driver+0x154/0x20c
5877 00:41:04.761075 <4>[ 1.694460] driver_register+0x78/0x130
5878 00:41:04.764435 <4>[ 1.698551] __platform_driver_register+0x28/0x34
5879 00:41:04.768014 <4>[ 1.703510] mtk_spi_driver_init+0x1c/0x28
5880 00:41:04.774890 <4>[ 1.707864] do_one_initcall+0x50/0x1d0
5881 00:41:04.777679 <4>[ 1.711954] kernel_init_freeable+0x21c/0x288
5882 00:41:04.781109 <4>[ 1.716567] kernel_init+0x24/0x12c
5883 00:41:04.784739 <4>[ 1.720312] ret_from_fork+0x10/0x20
5884 00:41:04.795280 <6>[ 1.729189] tun: Universal TUN/TAP device driver, 1.6
5885 00:41:04.799057 <6>[ 1.735479] thunder_xcv, ver 1.0
5886 00:41:04.801916 <6>[ 1.738993] thunder_bgx, ver 1.0
5887 00:41:04.805423 <6>[ 1.742497] nicpf, ver 1.0
5888 00:41:04.816030 <6>[ 1.746863] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5889 00:41:04.820290 <6>[ 1.754348] hns3: Copyright (c) 2017 Huawei Corporation.
5890 00:41:04.822917 <6>[ 1.759943] hclge is initializing
5891 00:41:04.829901 <6>[ 1.763527] e1000: Intel(R) PRO/1000 Network Driver
5892 00:41:04.836351 <6>[ 1.768662] e1000: Copyright (c) 1999-2006 Intel Corporation.
5893 00:41:04.840039 <6>[ 1.774686] e1000e: Intel(R) PRO/1000 Network Driver
5894 00:41:04.846657 <6>[ 1.779907] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5895 00:41:04.853045 <6>[ 1.786100] igb: Intel(R) Gigabit Ethernet Network Driver
5896 00:41:04.859781 <6>[ 1.791755] igb: Copyright (c) 2007-2014 Intel Corporation.
5897 00:41:04.866748 <6>[ 1.797599] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5898 00:41:04.869805 <6>[ 1.804122] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5899 00:41:04.877084 <6>[ 1.810676] sky2: driver version 1.30
5900 00:41:04.883635 <6>[ 1.815922] usbcore: registered new device driver r8152-cfgselector
5901 00:41:04.890071 <6>[ 1.822466] usbcore: registered new interface driver r8152
5902 00:41:04.893680 <6>[ 1.828293] VFIO - User Level meta-driver version: 0.3
5903 00:41:04.902521 <6>[ 1.836078] mtu3 11201000.usb: uwk - reg:0x420, version:101
5904 00:41:04.908850 <4>[ 1.841952] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5905 00:41:04.915739 <6>[ 1.849229] mtu3 11201000.usb: dr_mode: 1, drd: auto
5906 00:41:04.922205 <6>[ 1.854453] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5907 00:41:04.925784 <6>[ 1.860636] mtu3 11201000.usb: usb3-drd: 0
5908 00:41:04.935852 <6>[ 1.866194] mtu3 11201000.usb: xHCI platform device register success...
5909 00:41:04.942170 <4>[ 1.874830] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5910 00:41:04.949468 <6>[ 1.882784] xhci-mtk 11200000.usb: xHCI Host Controller
5911 00:41:04.956141 <6>[ 1.888307] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5912 00:41:04.962441 <6>[ 1.896047] xhci-mtk 11200000.usb: USB3 root hub has no ports
5913 00:41:04.972222 <6>[ 1.902056] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5914 00:41:04.979311 <6>[ 1.911480] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5915 00:41:04.985569 <6>[ 1.917565] xhci-mtk 11200000.usb: xHCI Host Controller
5916 00:41:04.991986 <6>[ 1.923055] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5917 00:41:04.998726 <6>[ 1.930712] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5918 00:41:05.002189 <6>[ 1.937525] hub 1-0:1.0: USB hub found
5919 00:41:05.005461 <6>[ 1.941554] hub 1-0:1.0: 1 port detected
5920 00:41:05.016203 <6>[ 1.946921] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5921 00:41:05.019609 <6>[ 1.955536] hub 2-0:1.0: USB hub found
5922 00:41:05.026462 <3>[ 1.959563] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5923 00:41:05.033695 <6>[ 1.967446] usbcore: registered new interface driver usb-storage
5924 00:41:05.040162 <6>[ 1.974055] usbcore: registered new device driver onboard-usb-hub
5925 00:41:05.058829 <4>[ 1.989333] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5926 00:41:05.067779 <6>[ 2.001578] mt6397-rtc mt6358-rtc: registered as rtc0
5927 00:41:05.077810 <6>[ 2.007059] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:41:04 UTC (1718498464)
5928 00:41:05.081275 <6>[ 2.016938] i2c_dev: i2c /dev entries driver
5929 00:41:05.092785 <6>[ 2.023363] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5930 00:41:05.102937 <6>[ 2.031684] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5931 00:41:05.106479 <6>[ 2.040591] i2c 4-0058: Fixed dependency cycle(s) with /panel
5932 00:41:05.116455 <6>[ 2.046620] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5933 00:41:05.122882 <3>[ 2.054076] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5934 00:41:05.140447 <6>[ 2.073908] cpu cpu0: EM: created perf domain
5935 00:41:05.149958 <6>[ 2.079432] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5936 00:41:05.156984 <6>[ 2.090732] cpu cpu4: EM: created perf domain
5937 00:41:05.163551 <6>[ 2.097481] sdhci: Secure Digital Host Controller Interface driver
5938 00:41:05.170577 <6>[ 2.103933] sdhci: Copyright(c) Pierre Ossman
5939 00:41:05.177480 <6>[ 2.109336] Synopsys Designware Multimedia Card Interface Driver
5940 00:41:05.184020 <6>[ 2.109881] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5941 00:41:05.186991 <6>[ 2.116413] sdhci-pltfm: SDHCI platform and OF driver helper
5942 00:41:05.195252 <6>[ 2.128953] ledtrig-cpu: registered to indicate activity on CPUs
5943 00:41:05.202876 <6>[ 2.136660] usbcore: registered new interface driver usbhid
5944 00:41:05.206419 <6>[ 2.142501] usbhid: USB HID core driver
5945 00:41:05.216281 <6>[ 2.146792] spi_master spi2: will run message pump with realtime priority
5946 00:41:05.224403 <4>[ 2.147029] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5947 00:41:05.230674 <4>[ 2.161286] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5948 00:41:05.254355 <6>[ 2.181676] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5949 00:41:05.273809 <6>[ 2.197530] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5950 00:41:05.280468 <4>[ 2.209715] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5951 00:41:05.287660 <6>[ 2.219457] cros-ec-spi spi2.0: Chrome EC device registered
5952 00:41:05.294196 <4>[ 2.227251] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5953 00:41:05.307954 <4>[ 2.238277] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5954 00:41:05.315055 <6>[ 2.242611] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5955 00:41:05.318011 <4>[ 2.246916] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5956 00:41:05.324185 <6>[ 2.252610] mmc0: new HS400 MMC card at address 0001
5957 00:41:05.331378 <6>[ 2.264419] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5958 00:41:05.337714 <6>[ 2.266929] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5959 00:41:05.347359 <6>[ 2.280876] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5960 00:41:05.357073 <6>[ 2.284886] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5961 00:41:05.360853 <6>[ 2.289200] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5962 00:41:05.374003 <6>[ 2.299856] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5963 00:41:05.377140 <6>[ 2.302102] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5964 00:41:05.384238 <6>[ 2.313200] NET: Registered PF_PACKET protocol family
5965 00:41:05.394203 <6>[ 2.315816] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5966 00:41:05.404093 <6>[ 2.316127] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5967 00:41:05.410793 <6>[ 2.317695] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5968 00:41:05.417361 <6>[ 2.322232] 9pnet: Installing 9P2000 support
5969 00:41:05.420808 <5>[ 2.355261] Key type dns_resolver registered
5970 00:41:05.424208 <6>[ 2.360057] registered taskstats version 1
5971 00:41:05.430686 <5>[ 2.364423] Loading compiled-in X.509 certificates
5972 00:41:05.437561 <6>[ 2.369488] usb 1-1: new high-speed USB device number 2 using xhci-mtk
5973 00:41:05.482523 <3>[ 2.412798] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
5974 00:41:05.516249 <6>[ 2.443156] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5975 00:41:05.527048 <6>[ 2.457530] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
5976 00:41:05.537156 <6>[ 2.466096] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
5977 00:41:05.543676 <6>[ 2.474748] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
5978 00:41:05.553551 <6>[ 2.483305] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
5979 00:41:05.560143 <6>[ 2.491827] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
5980 00:41:05.570024 <6>[ 2.500349] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
5981 00:41:05.580333 <6>[ 2.508869] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
5982 00:41:05.586493 <6>[ 2.518024] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
5983 00:41:05.589997 <6>[ 2.524020] hub 1-1:1.0: USB hub found
5984 00:41:05.596826 <6>[ 2.525556] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
5985 00:41:05.599918 <6>[ 2.528991] hub 1-1:1.0: 3 ports detected
5986 00:41:05.606560 <6>[ 2.535845] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
5987 00:41:05.613640 <6>[ 2.546678] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
5988 00:41:05.620852 <6>[ 2.554213] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
5989 00:41:05.629022 <6>[ 2.562614] panfrost 13040000.gpu: clock rate = 511999970
5990 00:41:05.639152 <6>[ 2.568308] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
5991 00:41:05.648564 <6>[ 2.578557] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
5992 00:41:05.655464 <6>[ 2.586571] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
5993 00:41:05.668780 <6>[ 2.595006] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
5994 00:41:05.675376 <6>[ 2.607091] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
5995 00:41:05.687506 <6>[ 2.617961] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
5996 00:41:05.697484 <6>[ 2.627124] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
5997 00:41:05.707460 <6>[ 2.636301] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
5998 00:41:05.717491 <6>[ 2.645429] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
5999 00:41:05.723943 <6>[ 2.654560] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6000 00:41:05.733915 <6>[ 2.663860] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6001 00:41:05.744197 <6>[ 2.673162] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6002 00:41:05.753813 <6>[ 2.682634] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6003 00:41:05.763887 <6>[ 2.692108] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6004 00:41:05.770568 <6>[ 2.701236] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6005 00:41:05.845032 <6>[ 2.775183] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6006 00:41:05.854718 <6>[ 2.784081] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6007 00:41:05.866032 <6>[ 2.796563] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6008 00:41:05.898984 <6>[ 2.829263] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6009 00:41:06.551496 <6>[ 3.021858] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6010 00:41:06.561568 <4>[ 3.138445] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6011 00:41:06.567886 <4>[ 3.138465] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6012 00:41:06.574671 <6>[ 3.178923] r8152 1-1.2:1.0 eth0: v1.12.13
6013 00:41:06.581482 <6>[ 3.257248] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6014 00:41:06.587983 <6>[ 3.465705] Console: switching to colour frame buffer device 170x48
6015 00:41:06.594253 <6>[ 3.526371] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6016 00:41:06.616472 <6>[ 3.543710] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6017 00:41:06.633424 <6>[ 3.561036] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6018 00:41:06.643346 <6>[ 3.573910] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6019 00:41:06.649805 <6>[ 3.582149] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6020 00:41:06.663442 <6>[ 3.589399] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6021 00:41:06.681346 <6>[ 3.608686] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6022 00:41:07.904069 <6>[ 4.838153] r8152 1-1.2:1.0 eth0: carrier on
6023 00:41:07.943160 <5>[ 4.861255] Sending DHCP requests ., OK
6024 00:41:07.949841 <6>[ 4.881472] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6025 00:41:07.952924 <6>[ 4.889916] IP-Config: Complete:
6026 00:41:07.966312 <6>[ 4.893487] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6027 00:41:07.973069 <6>[ 4.904387] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6028 00:41:07.987834 <6>[ 4.918660] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6029 00:41:07.996179 <6>[ 4.918671] nameserver0=192.168.201.1
6030 00:41:08.004403 <6>[ 4.938465] clk: Disabling unused clocks
6031 00:41:08.008885 <6>[ 4.946398] ALSA device list:
6032 00:41:08.018294 <6>[ 4.952440] No soundcards found.
6033 00:41:08.027515 <6>[ 4.961467] Freeing unused kernel memory: 8512K
6034 00:41:08.034343 <6>[ 4.968585] Run /init as init process
6035 00:41:08.045926 Loading, please wait...
6036 00:41:08.083088 Starting systemd-udevd version 252.22-1~deb12u1
6037 00:41:08.382115 <3>[ 5.316462] mtk-scp 10500000.scp: invalid resource
6038 00:41:08.392509 <6>[ 5.322802] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6039 00:41:08.395537 <3>[ 5.324411] thermal_sys: Failed to find 'trips' node
6040 00:41:08.402559 <6>[ 5.332383] remoteproc remoteproc0: scp is available
6041 00:41:08.409227 <6>[ 5.333350] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6042 00:41:08.415788 <3>[ 5.335627] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6043 00:41:08.425669 <3>[ 5.335637] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6044 00:41:08.432545 <4>[ 5.340973] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6045 00:41:08.443010 <4>[ 5.348863] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6046 00:41:08.446076 <3>[ 5.351697] thermal_sys: Failed to find 'trips' node
6047 00:41:08.453001 <6>[ 5.356236] remoteproc remoteproc0: powering up scp
6048 00:41:08.459347 <4>[ 5.357788] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6049 00:41:08.465492 <4>[ 5.357992] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6050 00:41:08.480263 <3>[ 5.358457] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6051 00:41:08.487025 <3>[ 5.358461] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6052 00:41:08.496606 <3>[ 5.358466] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6053 00:41:08.503224 <3>[ 5.358471] elan_i2c 2-0015: Error applying setting, reverse things back
6054 00:41:08.513409 <3>[ 5.359208] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6055 00:41:08.523198 <3>[ 5.359226] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6056 00:41:08.533490 <3>[ 5.359234] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6057 00:41:08.539897 <3>[ 5.359306] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6058 00:41:08.550265 <3>[ 5.359315] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6059 00:41:08.560152 <3>[ 5.359323] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6060 00:41:08.570565 <3>[ 5.359332] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6061 00:41:08.580363 <3>[ 5.359340] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6062 00:41:08.590232 <3>[ 5.360280] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6063 00:41:08.600672 <3>[ 5.364658] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6064 00:41:08.610274 <6>[ 5.366748] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6065 00:41:08.620497 <4>[ 5.373145] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6066 00:41:08.630445 <3>[ 5.380686] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6067 00:41:08.634017 <6>[ 5.380977] mc: Linux media interface: v0.10
6068 00:41:08.642062 <3>[ 5.385906] remoteproc remoteproc0: request_firmware failed: -2
6069 00:41:08.652969 <4>[ 5.391033] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6070 00:41:08.663297 <5>[ 5.392220] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6071 00:41:08.669773 <6>[ 5.407413] cs_system_cfg: CoreSight Configuration manager initialised
6072 00:41:08.677409 <6>[ 5.407973] videodev: Linux video capture interface: v2.00
6073 00:41:08.687493 <5>[ 5.408290] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6074 00:41:08.694145 <5>[ 5.408773] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6075 00:41:08.705416 <4>[ 5.408853] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6076 00:41:08.712329 <6>[ 5.408862] cfg80211: failed to load regulatory.db
6077 00:41:08.722728 <4>[ 5.411053] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6078 00:41:08.736770 <6>[ 5.411683] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6079 00:41:08.746489 <6>[ 5.414858] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6080 00:41:08.760765 <3>[ 5.415372] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6081 00:41:08.771021 <6>[ 5.489718] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6082 00:41:08.805242 <3>[ 5.732803] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6083 00:41:08.812565 <6>[ 5.732926] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6084 00:41:08.822537 <3>[ 5.745726] debugfs: File 'Playback' in directory 'dapm' already present!
6085 00:41:08.825389 <6>[ 5.753838] Bluetooth: Core ver 2.22
6086 00:41:08.832031 <6>[ 5.759707] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6087 00:41:08.838969 <3>[ 5.759722] debugfs: File 'Capture' in directory 'dapm' already present!
6088 00:41:08.848931 <6>[ 5.759845] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6089 00:41:08.858309 <6>[ 5.761801] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6090 00:41:08.865498 <6>[ 5.764614] NET: Registered PF_BLUETOOTH protocol family
6091 00:41:08.871849 <6>[ 5.771745] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6092 00:41:08.878854 <6>[ 5.778529] Bluetooth: HCI device and connection manager initialized
6093 00:41:08.888389 <6>[ 5.797074] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6094 00:41:08.891626 <6>[ 5.798001] Bluetooth: HCI socket layer initialized
6095 00:41:08.898509 <6>[ 5.798936] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6096 00:41:08.904833 <6>[ 5.803635] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6097 00:41:08.912348 <6>[ 5.811515] Bluetooth: L2CAP socket layer initialized
6098 00:41:08.919032 <6>[ 5.812236] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6099 00:41:08.925629 <6>[ 5.812305] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6100 00:41:08.936232 <6>[ 5.812950] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6101 00:41:08.943064 <6>[ 5.813686] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6102 00:41:08.956558 <6>[ 5.816876] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6103 00:41:08.963147 <6>[ 5.816995] usbcore: registered new interface driver uvcvideo
6104 00:41:08.973221 <6>[ 5.818342] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6105 00:41:08.976372 <6>[ 5.826053] Bluetooth: SCO socket layer initialized
6106 00:41:08.986918 <6>[ 5.827496] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6107 00:41:08.997460 <6>[ 5.827501] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6108 00:41:09.010764 <6>[ 5.827589] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6109 00:41:09.017263 <6>[ 5.831252] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6110 00:41:09.024097 <6>[ 5.866238] Bluetooth: HCI UART driver ver 2.3
6111 00:41:09.039055 <6>[ 5.972654] Bluetooth: HCI UART protocol H4 registered
6112 00:41:09.045350 <6>[ 5.976115] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6113 00:41:09.051956 <6>[ 5.978182] Bluetooth: HCI UART protocol LL registered
6114 00:41:09.061577 <4>[ 5.992077] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6115 00:41:09.069166 <4>[ 5.992077] Fallback method does not support PEC.
6116 00:41:09.072636 <6>[ 5.992567] Bluetooth: HCI UART protocol Three-wire (H5) registered
6117 00:41:09.082253 <3>[ 6.008679] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6118 00:41:09.086770 <6>[ 6.013107] Bluetooth: HCI UART protocol Broadcom registered
6119 00:41:09.097744 <3>[ 6.027533] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6120 00:41:09.103849 <6>[ 6.027745] Bluetooth: HCI UART protocol QCA registered
6121 00:41:09.110186 <6>[ 6.028929] Bluetooth: hci0: setting up ROME/QCA6390
6122 00:41:09.118755 <6>[ 6.052811] Bluetooth: HCI UART protocol Marvell registered
6123 00:41:09.143967 Begin: Loading essential drivers ... done.
6124 00:41:09.147472 Begin: Running /scripts/init-premount ... done.
6125 00:41:09.154096 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6126 00:41:09.164103 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6127 00:41:09.164185 Device /sys/class/net/eth0 found
6128 00:41:09.167752 done.
6129 00:41:09.195214 Begin: Waiting up to 180 secs for any network device to become available ... done.
6130 00:41:09.251134 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6131 00:41:09.257984 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6132 00:41:09.264561 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6133 00:41:09.271229 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6134 00:41:09.277915 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6135 00:41:09.284996 domain : lava-rack
6136 00:41:09.288074 rootserver: 192.168.201.1 rootpath:
6137 00:41:09.288181 filename :
6138 00:41:09.306385 <3>[ 6.240419] Bluetooth: hci0: Frame reassembly failed (-84)
6139 00:41:09.392819 <6>[ 6.323642] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6140 00:41:09.402148 done.
6141 00:41:09.409232 Begin: Running /scripts/nfs-bottom ... done.
6142 00:41:09.422559 Begin: Running /scripts/init-bottom ... done.
6143 00:41:09.478226 <4>[ 6.408863] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6144 00:41:09.496373 <4>[ 6.426911] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6145 00:41:09.510166 <4>[ 6.440887] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6146 00:41:09.517875 <4>[ 6.451989] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6147 00:41:09.600482 <6>[ 6.534401] Bluetooth: hci0: QCA Product ID :0x00000008
6148 00:41:09.610849 <6>[ 6.544795] Bluetooth: hci0: QCA SOC Version :0x00000044
6149 00:41:09.621514 <6>[ 6.555064] Bluetooth: hci0: QCA ROM Version :0x00000302
6150 00:41:09.631156 <6>[ 6.565252] Bluetooth: hci0: QCA Patch Version:0x00000111
6151 00:41:09.641148 <6>[ 6.575287] Bluetooth: hci0: QCA controller version 0x00440302
6152 00:41:09.654185 <6>[ 6.585161] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6153 00:41:09.666490 <4>[ 6.597113] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6154 00:41:09.678804 <3>[ 6.609502] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6155 00:41:09.686495 <3>[ 6.620795] Bluetooth: hci0: QCA Failed to download patch (-2)
6156 00:41:10.725813 <6>[ 7.659775] NET: Registered PF_INET6 protocol family
6157 00:41:10.737710 <6>[ 7.671851] Segment Routing with IPv6
6158 00:41:10.745804 <6>[ 7.680088] In-situ OAM (IOAM) with IPv6
6159 00:41:10.919972 <30>[ 7.827376] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6160 00:41:10.941425 <30>[ 7.875122] systemd[1]: Detected architecture arm64.
6161 00:41:10.954155
6162 00:41:10.957564 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6163 00:41:10.957643
6164 00:41:10.980246 <30>[ 7.914311] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6165 00:41:11.988894 <30>[ 8.919653] systemd[1]: Queued start job for default target graphical.target.
6166 00:41:12.024548 <30>[ 8.954945] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6167 00:41:12.037478 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6168 00:41:12.057360 <30>[ 8.987644] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6169 00:41:12.070338 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6170 00:41:12.089616 <30>[ 9.019765] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6171 00:41:12.103237 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6172 00:41:12.120668 <30>[ 9.050800] systemd[1]: Created slice user.slice - User and Session Slice.
6173 00:41:12.131983 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6174 00:41:12.154894 <30>[ 9.081809] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6175 00:41:12.167634 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6176 00:41:12.186411 <30>[ 9.113639] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6177 00:41:12.198904 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6178 00:41:12.225360 <30>[ 9.145744] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6179 00:41:12.244921 <30>[ 9.175227] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6180 00:41:12.253351 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6181 00:41:12.271095 <30>[ 9.201432] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6182 00:41:12.284090 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6183 00:41:12.303259 <30>[ 9.233486] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6184 00:41:12.317304 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6185 00:41:12.331882 <30>[ 9.265523] systemd[1]: Reached target paths.target - Path Units.
6186 00:41:12.346141 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6187 00:41:12.363097 <30>[ 9.293407] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6188 00:41:12.375458 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6189 00:41:12.387558 <30>[ 9.321380] systemd[1]: Reached target slices.target - Slice Units.
6190 00:41:12.402256 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6191 00:41:12.415745 <30>[ 9.349465] systemd[1]: Reached target swap.target - Swaps.
6192 00:41:12.426313 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6193 00:41:12.447109 <30>[ 9.377456] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6194 00:41:12.460382 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6195 00:41:12.479598 <30>[ 9.409831] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6196 00:41:12.493095 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6197 00:41:12.514920 <30>[ 9.445303] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6198 00:41:12.528140 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6199 00:41:12.548593 <30>[ 9.478977] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6200 00:41:12.562421 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6201 00:41:12.580087 <30>[ 9.510138] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6202 00:41:12.592203 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6203 00:41:12.613073 <30>[ 9.543283] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6204 00:41:12.626428 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6205 00:41:12.646309 <30>[ 9.576565] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6206 00:41:12.659422 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6207 00:41:12.675651 <30>[ 9.606024] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6208 00:41:12.688743 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6209 00:41:12.739871 <30>[ 9.670028] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6210 00:41:12.751685 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6211 00:41:12.772929 <30>[ 9.703254] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6212 00:41:12.785912 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6213 00:41:12.808743 <30>[ 9.739043] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6214 00:41:12.822555 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6215 00:41:12.847039 <30>[ 9.770538] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6216 00:41:12.887920 <30>[ 9.818345] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6217 00:41:12.903571 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6218 00:41:12.929369 <30>[ 9.859942] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6219 00:41:12.943756 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6220 00:41:12.969590 <30>[ 9.900222] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6221 00:41:12.983941 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6222 00:41:13.019629 <6>[ 9.950206] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6223 00:41:13.026393 <30>[ 9.954529] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6224 00:41:13.043102 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6225 00:41:13.065649 <30>[ 9.996110] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6226 00:41:13.080888 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6227 00:41:13.128710 <30>[ 10.058710] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6228 00:41:13.139650 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6229 00:41:13.161477 <30>[ 10.091743] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6230 00:41:13.170893 Startin<6>[ 10.105017] fuse: init (API version 7.37)
6231 00:41:13.177720 g [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6232 00:41:13.231497 <30>[ 10.162109] systemd[1]: Starting systemd-journald.service - Journal Service...
6233 00:41:13.244485 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6234 00:41:13.267766 <30>[ 10.198233] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6235 00:41:13.278804 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6236 00:41:13.335020 <30>[ 10.262545] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6237 00:41:13.347289 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6238 00:41:13.366917 <30>[ 10.297449] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6239 00:41:13.379650 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6240 00:41:13.403152 <30>[ 10.333963] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6241 00:41:13.421730 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug Al<3>[ 10.352837] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6242 00:41:13.424960 l udev Devices...
6243 00:41:13.437975 <3>[ 10.368500] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6244 00:41:13.454786 <30>[ 10.384398] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6245 00:41:13.460776 <3>[ 10.386566] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6246 00:41:13.478952 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File S<3>[ 10.407787] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6247 00:41:13.479039 ystem.
6248 00:41:13.494080 <3>[ 10.424243] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6249 00:41:13.502076 <30>[ 10.433514] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6250 00:41:13.511668 <3>[ 10.439334] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6251 00:41:13.530928 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 10.459948] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6252 00:41:13.531016 File System.
6253 00:41:13.547498 <3>[ 10.477698] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6254 00:41:13.554691 <30>[ 10.486705] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6255 00:41:13.566567 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6256 00:41:13.587685 <30>[ 10.517888] systemd[1]: Started systemd-journald.service - Journal Service.
6257 00:41:13.598815 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6258 00:41:13.625744 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6259 00:41:13.646046 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6260 00:41:13.666136 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6261 00:41:13.686025 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6262 00:41:13.704102 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6263 00:41:13.728037 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6264 00:41:13.752323 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6265 00:41:13.776643 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6266 00:41:13.796849 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6267 00:41:13.817528 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6268 00:41:13.838390 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6269 00:41:13.871749 <4>[ 10.795804] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6270 00:41:13.883000 <3>[ 10.813544] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6271 00:41:13.892834 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6272 00:41:13.920562 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6273 00:41:13.943807 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6274 00:41:13.967495 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6275 00:41:13.990294 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6276 00:41:14.011440 <46>[ 10.942328] systemd-journald[319]: Received client request to flush runtime journal.
6277 00:41:14.026981 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6278 00:41:14.056205 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6279 00:41:14.080399 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6280 00:41:14.104570 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6281 00:41:14.125640 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6282 00:41:14.145468 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6283 00:41:15.126460 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6284 00:41:15.172088 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6285 00:41:15.468357 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6286 00:41:15.584484 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6287 00:41:15.603936 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6288 00:41:15.623389 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6289 00:41:15.664054 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6290 00:41:15.688906 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6291 00:41:15.954882 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6292 00:41:16.011438 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6293 00:41:16.027883 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6294 00:41:16.075035 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6295 00:41:16.239164 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6296 00:41:16.258774 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6297 00:41:16.285816 <4>[ 13.219635] power_supply_show_property: 4 callbacks suppressed
6298 00:41:16.295556 <3>[ 13.219650] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6299 00:41:16.305878 <3>[ 13.220140] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6300 00:41:16.324269 <3>[ 13.254445] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6301 00:41:16.340130 <3>[ 13.270348] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6302 00:41:16.357752 <3>[ 13.288184] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6303 00:41:16.372420 <3>[ 13.303286] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6304 00:41:16.389004 <3>[ 13.319339] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6305 00:41:16.404035 <3>[ 13.334419] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6306 00:41:16.419128 <3>[ 13.349507] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6307 00:41:16.433660 <3>[ 13.364205] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6308 00:41:16.441273 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6309 00:41:16.463684 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6310 00:41:16.480141 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6311 00:41:16.496121 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6312 00:41:16.545815 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6313 00:41:16.575972 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6314 00:41:16.598085 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6315 00:41:16.656255 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6316 00:41:16.675878 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6317 00:41:16.696823 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6318 00:41:16.717466 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6319 00:41:16.738535 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6320 00:41:16.759200 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6321 00:41:16.775546 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6322 00:41:16.790964 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6323 00:41:16.811921 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6324 00:41:16.833068 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6325 00:41:16.851785 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6326 00:41:16.884736 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6327 00:41:16.905370 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6328 00:41:16.923255 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6329 00:41:16.940557 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6330 00:41:16.958927 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6331 00:41:16.975429 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6332 00:41:17.012402 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6333 00:41:17.049438 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6334 00:41:17.140193 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6335 00:41:17.163700 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6336 00:41:17.313984 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6337 00:41:17.364437 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6338 00:41:17.424855 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6339 00:41:17.443868 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6340 00:41:17.467761 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6341 00:41:17.513052 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6342 00:41:17.535482 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6343 00:41:17.557829 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6344 00:41:17.576497 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6345 00:41:17.620409 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6346 00:41:17.666247 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6347 00:41:17.750310
6348 00:41:17.753506 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6349 00:41:17.753588
6350 00:41:17.756691 debian-bookworm-arm64 login: root (automatic login)
6351 00:41:17.756775
6352 00:41:18.013911 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024 aarch64
6353 00:41:18.014041
6354 00:41:18.020049 The programs included with the Debian GNU/Linux system are free software;
6355 00:41:18.026841 the exact distribution terms for each program are described in the
6356 00:41:18.030136 individual files in /usr/share/doc/*/copyright.
6357 00:41:18.030225
6358 00:41:18.036592 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6359 00:41:18.039619 permitted by applicable law.
6360 00:41:18.090105 Matched prompt #10: / #
6362 00:41:18.090339 Setting prompt string to ['/ #']
6363 00:41:18.090437 end: 2.2.5.1 login-action (duration 00:00:16) [common]
6365 00:41:18.090667 end: 2.2.5 auto-login-action (duration 00:00:16) [common]
6366 00:41:18.090754 start: 2.2.6 expect-shell-connection (timeout 00:03:50) [common]
6367 00:41:18.090826 Setting prompt string to ['/ #']
6368 00:41:18.090886 Forcing a shell prompt, looking for ['/ #']
6370 00:41:18.141079 / #
6371 00:41:18.141188 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6372 00:41:18.141293 Waiting using forced prompt support (timeout 00:02:30)
6373 00:41:18.146613
6374 00:41:18.146872 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6375 00:41:18.146965 start: 2.2.7 export-device-env (timeout 00:03:50) [common]
6377 00:41:18.247246 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get'
6378 00:41:18.252168 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368350/extract-nfsrootfs-qzki0get'
6380 00:41:18.352631 / # export NFS_SERVER_IP='192.168.201.1'
6381 00:41:18.357706 export NFS_SERVER_IP='192.168.201.1'
6382 00:41:18.357986 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6383 00:41:18.358086 end: 2.2 depthcharge-retry (duration 00:01:10) [common]
6384 00:41:18.358172 end: 2 depthcharge-action (duration 00:01:10) [common]
6385 00:41:18.358262 start: 3 lava-test-retry (timeout 00:30:00) [common]
6386 00:41:18.358348 start: 3.1 lava-test-shell (timeout 00:30:00) [common]
6387 00:41:18.358423 Using namespace: common
6389 00:41:18.458797 / # #
6390 00:41:18.458915 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:30:00)
6391 00:41:18.463941 #
6392 00:41:18.464204 Using /lava-14368350
6394 00:41:18.564541 / # export SHELL=/bin/sh
6395 00:41:18.569619 export SHELL=/bin/sh
6397 00:41:18.670085 / # . /lava-14368350/environment
6398 00:41:18.675035 . /lava-14368350/environment
6400 00:41:18.779640 / # /lava-14368350/bin/lava-test-runner /lava-14368350/0
6401 00:41:18.779760 Test shell timeout: 10s (minimum of the action and connection timeout)
6402 00:41:18.784475 /lava-14368350/bin/lava-test-runner /lava-14368350/0
6403 00:41:18.981037 + export TESTRUN_ID=0_lc-compliance
6404 00:41:18.987625 + cd /lava-14368350/0/tests/0_lc-compliance
6405 00:41:18.987712 + cat uuid
6406 00:41:18.990794 + UUID=14368350_1.6.2.3.1
6407 00:41:18.990873 + set +x
6408 00:41:18.997450 <LAVA_SIGNAL_STARTRUN 0_lc-compliance 14368350_1.6.2.3.1>
6409 00:41:18.997704 Received signal: <STARTRUN> 0_lc-compliance 14368350_1.6.2.3.1
6410 00:41:18.997781 Starting test lava.0_lc-compliance (14368350_1.6.2.3.1)
6411 00:41:18.997864 Skipping test definition patterns.
6412 00:41:19.001041 + /usr/bin/lc-compliance-parser.sh
6413 00:41:20.671615 [0:00:17.461270769] [428] [1;32m INFO [1;37mCamera [1;34mcamera_manager.cpp:284 [0mlibcamera v0.0.0+1-01935edb
6414 00:41:20.678360 Using camera /base/soc/usb@11201000/usb@11200000/hub@1-1.3:1.0-04f2:b567
6415 00:41:20.728234 [0:00:17.517995846] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6416 00:41:20.731464 [==========] Running 120 tests from 1 test suite.
6417 00:41:20.750450 <3>[ 17.684366] uvcvideo 1-1.3:1.1: Failed to resubmit video URB (-1).
6418 00:41:20.801276 [----------] Global test environment set-up.
6419 00:41:20.811739 [0:00:17.602610462] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6420 00:41:20.857073 [----------] 120 tests from CaptureTests/SingleStream
6421 00:41:20.876696 [0:00:17.666713154] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6422 00:41:20.921253 [ RUN ] CaptureTests/SingleStream.Capture/Raw_1
6423 00:41:20.942707 [0:00:17.732727769] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6424 00:41:20.976606 <LAVA_SIGNAL_TESTSET START CaptureTests/SingleStream>
6425 00:41:20.976875 Received signal: <TESTSET> START CaptureTests/SingleStream
6426 00:41:20.976950 Starting test_set CaptureTests/SingleStream
6427 00:41:20.979821 Camera needs 4 requests, can't test only 1
6428 00:41:21.032982 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6429 00:41:21.082096
6430 00:41:21.135228 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_1 (81 ms)
6431 00:41:21.200034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_1 RESULT=skip>
6432 00:41:21.200367 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_1 RESULT=skip
6434 00:41:21.210109 [ RUN ] CaptureTests/SingleStream.Capture/Raw_2
6435 00:41:21.246426 Camera needs 4 requests, can't test only 2
6436 00:41:21.302559 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6437 00:41:21.351619
6438 00:41:21.409863 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_2 (67 ms)
6439 00:41:21.475154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_2 RESULT=skip>
6440 00:41:21.475480 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_2 RESULT=skip
6442 00:41:21.485466 [ RUN ] CaptureTests/SingleStream.Capture/Raw_3
6443 00:41:21.526836 Camera needs 4 requests, can't test only 3
6444 00:41:21.577473 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6445 00:41:21.630618
6446 00:41:21.688887 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_3 (65 ms)
6447 00:41:21.747803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_3 RESULT=skip>
6448 00:41:21.748121 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_3 RESULT=skip
6450 00:41:21.757898 [ RUN ] CaptureTests/SingleStream.Capture/Raw_5
6451 00:41:21.781445 [0:00:18.571318308] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6452 00:41:21.798628 [ OK ] CaptureTests/SingleStream.Capture/Raw_5 (725 ms)
6453 00:41:21.865249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_5 RESULT=pass>
6454 00:41:21.865613 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_5 RESULT=pass
6456 00:41:21.877390 [ RUN ] CaptureTests/SingleStream.Capture/Raw_8
6457 00:41:22.292444 [ OK ] CaptureTests/SingleStream.Capture/Raw_8 (669 ms)
6458 00:41:22.336693 [0:00:19.126571539] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6459 00:41:22.355458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_8 RESULT=pass>
6460 00:41:22.355738 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_8 RESULT=pass
6462 00:41:22.367029 [ RUN ] CaptureTests/SingleStream.Capture/Raw_13
6463 00:41:23.263831 [ OK ] CaptureTests/SingleStream.Capture/Raw_13 (970 ms)
6464 00:41:23.307594 [0:00:20.097707077] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6465 00:41:23.339953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_13 RESULT=pass>
6466 00:41:23.340261 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_13 RESULT=pass
6468 00:41:23.351544 [ RUN ] CaptureTests/SingleStream.Capture/Raw_21
6469 00:41:25.780301 [ OK ] CaptureTests/SingleStream.Capture/Raw_21 (2517 ms)
6470 00:41:25.825624 [0:00:22.615465770] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6471 00:41:25.850646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_21 RESULT=pass>
6472 00:41:25.850933 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_21 RESULT=pass
6474 00:41:25.862995 [ RUN ] CaptureTests/SingleStream.Capture/Raw_34
6475 00:41:29.594457 [ OK ] CaptureTests/SingleStream.Capture/Raw_34 (3813 ms)
6476 00:41:29.639049 [0:00:26.428327385] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6477 00:41:29.677069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_34 RESULT=pass>
6478 00:41:29.677366 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_34 RESULT=pass
6480 00:41:29.690120 [ RUN ] CaptureTests/SingleStream.Capture/Raw_55
6481 00:41:35.499653 [ OK ] CaptureTests/SingleStream.Capture/Raw_55 (5905 ms)
6482 00:41:35.544415 [0:00:32.333967770] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6483 00:41:35.574796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_55 RESULT=pass>
6484 00:41:35.575159 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_55 RESULT=pass
6486 00:41:35.585060 [ RUN ] CaptureTests/SingleStream.Capture/Raw_89
6487 00:41:39.005231 <6>[ 35.941877] vaux18: disabling
6488 00:41:39.009619 <6>[ 35.945393] vio28: disabling
6489 00:41:44.796501 [ OK ] CaptureTests/SingleStream.Capture/Raw_89 (9296 ms)
6490 00:41:44.841649 [0:00:41.630975694] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6491 00:41:44.874459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_89 RESULT=pass>
6492 00:41:44.874757 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_89 RESULT=pass
6494 00:41:44.885837 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_1
6495 00:41:44.904054 [0:00:41.693569309] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6496 00:41:44.930312 Camera needs 4 requests, can't test only 1
6497 00:41:44.967403 [0:00:41.756859463] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6498 00:41:44.988864 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6499 00:41:45.028902 [0:00:41.818248386] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6500 00:41:45.051403
6501 00:41:45.117131 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_1 (62 ms)
6502 00:41:45.182908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip>
6503 00:41:45.183186 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip
6505 00:41:45.194816 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_2
6506 00:41:45.238198 Camera needs 4 requests, can't test only 2
6507 00:41:45.298670 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6508 00:41:45.357215
6509 00:41:45.425672 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_2 (63 ms)
6510 00:41:45.495665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip>
6511 00:41:45.495944 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip
6513 00:41:45.509720 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_3
6514 00:41:45.547070 Camera needs 4 requests, can't test only 3
6515 00:41:45.606016 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6516 00:41:45.664010
6517 00:41:45.726381 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_3 (61 ms)
6518 00:41:45.808548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip>
6519 00:41:45.809440 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip
6521 00:41:45.823132 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_5
6522 00:41:46.376076 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_5 (1391 ms)
6523 00:41:46.421062 [0:00:43.209815771] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6524 00:41:46.456132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass>
6525 00:41:46.456875 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass
6527 00:41:46.469623 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_8
6528 00:41:47.595271 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_8 (1219 ms)
6529 00:41:47.640334 [0:00:44.429457079] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6530 00:41:47.663086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass>
6531 00:41:47.663376 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass
6533 00:41:47.673883 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_13
6534 00:41:49.317184 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_13 (1721 ms)
6535 00:41:49.362567 [0:00:46.151573617] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6536 00:41:49.404053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass>
6537 00:41:49.404365 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass
6539 00:41:49.414382 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_21
6540 00:41:51.836400 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_21 (2519 ms)
6541 00:41:51.881296 [0:00:48.670591848] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6542 00:41:51.906620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass>
6543 00:41:51.906934 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass
6545 00:41:51.920725 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_34
6546 00:41:55.650841 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_34 (3813 ms)
6547 00:41:55.695731 [0:00:52.484431771] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6548 00:41:55.730808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass>
6549 00:41:55.731514 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass
6551 00:41:55.744788 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_55
6552 00:42:01.555977 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_55 (5904 ms)
6553 00:42:01.601321 [0:00:58.389743926] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6554 00:42:01.643837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass>
6555 00:42:01.644607 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass
6557 00:42:01.657877 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_89
6558 00:42:10.854711 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_89 (9296 ms)
6559 00:42:10.898311 [0:01:07.686543234] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6560 00:42:10.935547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass>
6561 00:42:10.936259 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass
6563 00:42:10.951989 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_1
6564 00:42:10.961635 [0:01:07.748883157] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6565 00:42:10.998284 Camera needs 4 requests, can't test only 1
6566 00:42:11.023960 [0:01:07.812114157] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6567 00:42:11.069371 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6568 00:42:11.087799 [0:01:07.876174157] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6569 00:42:11.138480
6570 00:42:11.217527 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_1 (61 ms)
6571 00:42:11.292436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip>
6572 00:42:11.293159 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip
6574 00:42:11.305428 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_2
6575 00:42:11.358077 Camera needs 4 requests, can't test only 2
6576 00:42:11.432086 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6577 00:42:11.500602
6578 00:42:11.574030 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_2 (62 ms)
6579 00:42:11.637360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip>
6580 00:42:11.637648 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip
6582 00:42:11.648789 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_3
6583 00:42:11.688464 Camera needs 4 requests, can't test only 3
6584 00:42:11.753295 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6585 00:42:11.819119
6586 00:42:11.896135 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_3 (65 ms)
6587 00:42:11.979660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip>
6588 00:42:11.980565 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip
6590 00:42:11.995734 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_5
6591 00:42:12.431453 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_5 (1388 ms)
6592 00:42:12.476061 [0:01:09.264464696] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6593 00:42:12.517178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass>
6594 00:42:12.518004 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass
6596 00:42:12.530795 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_8
6597 00:42:13.651495 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_8 (1220 ms)
6598 00:42:13.697290 [0:01:10.485413157] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6599 00:42:13.738544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass>
6600 00:42:13.739256 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass
6602 00:42:13.753736 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_13
6603 00:42:15.373342 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_13 (1721 ms)
6604 00:42:15.418154 [0:01:12.206318080] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6605 00:42:15.462203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass>
6606 00:42:15.462999 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass
6608 00:42:15.478056 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_21
6609 00:42:17.889647 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_21 (2515 ms)
6610 00:42:17.933556 [0:01:14.722024465] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6611 00:42:17.969984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass>
6612 00:42:17.970682 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass
6614 00:42:17.986074 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_34
6615 00:42:21.703165 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_34 (3813 ms)
6616 00:42:21.747927 [0:01:18.535950927] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6617 00:42:21.783895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass>
6618 00:42:21.784602 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass
6620 00:42:21.799034 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_55
6621 00:42:27.607301 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_55 (5903 ms)
6622 00:42:27.651031 [0:01:24.439382081] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6623 00:42:27.680126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass>
6624 00:42:27.680522 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass
6626 00:42:27.691627 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_89
6627 00:42:36.901110 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_89 (9293 ms)
6628 00:42:36.945099 [0:01:33.732961620] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6629 00:42:36.976399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass>
6630 00:42:36.977027 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass
6632 00:42:36.990155 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_1
6633 00:42:37.009380 [0:01:33.796802005] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6634 00:42:37.038941 Camera needs 4 requests, can't test only 1
6635 00:42:37.071930 [0:01:33.859493774] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6636 00:42:37.114073 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6637 00:42:37.138992 [0:01:33.926884851] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6638 00:42:37.187564
6639 00:42:37.266447 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_1 (62 ms)
6640 00:42:37.352618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip>
6641 00:42:37.353381 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip
6643 00:42:37.367969 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_2
6644 00:42:37.415484 Camera needs 4 requests, can't test only 2
6645 00:42:37.487937 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6646 00:42:37.551123
6647 00:42:37.619551 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_2 (63 ms)
6648 00:42:37.698599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip>
6649 00:42:37.698915 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip
6651 00:42:37.711833 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_3
6652 00:42:37.756330 Camera needs 4 requests, can't test only 3
6653 00:42:37.824214 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6654 00:42:37.887940
6655 00:42:37.956924 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_3 (65 ms)
6656 00:42:38.036309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip>
6657 00:42:38.036669 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip
6659 00:42:38.047967 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_5
6660 00:42:38.465633 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_5 (1373 ms)
6661 00:42:38.509219 [0:01:35.297432389] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6662 00:42:38.533032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass>
6663 00:42:38.533345 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass
6665 00:42:38.544709 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_8
6666 00:42:39.684003 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_8 (1218 ms)
6667 00:42:39.728167 [0:01:36.515997928] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6668 00:42:39.755590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass>
6669 00:42:39.755931 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass
6671 00:42:39.767177 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_13
6672 00:42:41.403859 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_13 (1719 ms)
6673 00:42:41.449069 [0:01:38.237256928] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6674 00:42:41.468985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass>
6675 00:42:41.469319 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass
6677 00:42:41.481098 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_21
6678 00:42:43.922565 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_21 (2518 ms)
6679 00:42:43.966948 [0:01:40.755179005] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6680 00:42:43.996459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass>
6681 00:42:43.996775 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass
6683 00:42:44.009756 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_34
6684 00:42:47.736142 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_34 (3812 ms)
6685 00:42:47.780266 [0:01:44.568212467] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6686 00:42:47.803832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass>
6687 00:42:47.804165 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass
6689 00:42:47.814063 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_55
6690 00:42:53.640580 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_55 (5904 ms)
6691 00:42:53.684958 [0:01:50.472563698] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6692 00:42:53.720499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass>
6693 00:42:53.720841 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass
6695 00:42:53.731532 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_89
6696 00:43:02.937167 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_89 (9296 ms)
6697 00:43:02.981472 [0:01:59.768622391] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6698 00:43:03.015686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass>
6699 00:43:03.015997 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass
6701 00:43:03.029781 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_1
6702 00:43:03.044433 [0:01:59.831503699] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6703 00:43:03.074271 Camera needs 4 requests, can't test only 1
6704 00:43:03.106955 [0:01:59.894354237] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6705 00:43:03.144888 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6706 00:43:03.172002 [0:01:59.959576699] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6707 00:43:03.206474
6708 00:43:03.269611 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_1 (61 ms)
6709 00:43:03.340087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip>
6710 00:43:03.340437 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip
6712 00:43:03.351698 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_2
6713 00:43:03.394323 Camera needs 4 requests, can't test only 2
6714 00:43:03.455546 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6715 00:43:03.514326
6716 00:43:03.575861 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_2 (63 ms)
6717 00:43:03.651477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip>
6718 00:43:03.651805 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip
6720 00:43:03.665213 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_3
6721 00:43:03.705176 Camera needs 4 requests, can't test only 3
6722 00:43:03.769546 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6723 00:43:03.830168
6724 00:43:03.899230 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_3 (63 ms)
6725 00:43:03.964162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip>
6726 00:43:03.964916 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip
6728 00:43:03.979182 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_5
6729 00:43:06.241660 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_5 (3114 ms)
6730 00:43:06.287267 [0:02:03.073832622] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6731 00:43:06.328131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass>
6732 00:43:06.328818 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass
6734 00:43:06.343363 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_8
6735 00:43:09.801806 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_8 (3560 ms)
6736 00:43:09.847450 [0:02:06.634632545] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6737 00:43:09.888599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass>
6738 00:43:09.889344 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass
6740 00:43:09.905095 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_13
6741 00:43:14.863428 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_13 (5061 ms)
6742 00:43:14.907933 [0:02:11.694525007] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6743 00:43:14.946104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass>
6744 00:43:14.946954 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass
6746 00:43:14.960262 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_21
6747 00:43:22.311187 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_21 (7447 ms)
6748 00:43:22.355621 [0:02:19.142079777] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6749 00:43:22.397990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass>
6750 00:43:22.398701 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass
6752 00:43:22.411769 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_34
6753 00:43:33.646433 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_34 (11335 ms)
6754 00:43:33.692864 [0:02:30.479180239] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6755 00:43:33.726293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass>
6756 00:43:33.726558 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass
6758 00:43:33.739922 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_55
6759 00:43:51.266239 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_55 (17619 ms)
6760 00:43:51.313835 [0:02:48.099900778] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6761 00:43:51.343815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass>
6762 00:43:51.344560 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass
6764 00:43:51.358197 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_89
6765 00:44:19.062323 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_89 (27793 ms)
6766 00:44:19.108678 [0:03:15.894139242] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6767 00:44:19.137267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass>
6768 00:44:19.137551 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass
6770 00:44:19.148868 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1
6771 00:44:19.171626 [0:03:15.957186011] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6772 00:44:19.188382 Camera needs 4 requests, can't test only 1
6773 00:44:19.236172 [0:03:16.021609318] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6774 00:44:19.248964 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6775 00:44:19.299426 [0:03:16.085114472] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6776 00:44:19.299529
6777 00:44:19.372227 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1 (61 ms)
6778 00:44:19.436460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip>
6779 00:44:19.436835 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip
6781 00:44:19.446187 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2
6782 00:44:19.489684 Camera needs 4 requests, can't test only 2
6783 00:44:19.557222 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6784 00:44:19.622241
6785 00:44:19.687635 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2 (63 ms)
6786 00:44:19.765901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip>
6787 00:44:19.766658 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip
6789 00:44:19.777440 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3
6790 00:44:19.828905 Camera needs 4 requests, can't test only 3
6791 00:44:19.889338 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6792 00:44:19.952466
6793 00:44:20.024466 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3 (65 ms)
6794 00:44:20.102218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip>
6795 00:44:20.102978 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip
6797 00:44:20.115003 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5
6798 00:44:22.371213 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5 (3112 ms)
6799 00:44:22.412007 [0:03:19.197197396] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6800 00:44:22.448035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass>
6801 00:44:22.448853 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass
6803 00:44:22.459053 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8
6804 00:44:25.935158 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8 (3563 ms)
6805 00:44:25.978975 [0:03:22.764539703] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6806 00:44:26.004227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass>
6807 00:44:26.004509 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass
6809 00:44:26.013951 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13
6810 00:44:30.999712 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13 (5061 ms)
6811 00:44:31.040295 [0:03:27.825600935] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6812 00:44:31.082355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass>
6813 00:44:31.083066 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass
6815 00:44:31.094021 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21
6816 00:44:38.446908 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21 (7446 ms)
6817 00:44:38.488038 [0:03:35.273063473] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6818 00:44:38.531585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass>
6819 00:44:38.532325 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass
6821 00:44:38.543438 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34
6822 00:44:49.784628 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34 (11338 ms)
6823 00:44:49.825223 [0:03:46.610320166] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6824 00:44:49.850773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass>
6825 00:44:49.851046 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass
6827 00:44:49.861837 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55
6828 00:45:07.403776 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55 (17618 ms)
6829 00:45:07.445204 [0:04:04.229536167] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6830 00:45:07.482033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass>
6831 00:45:07.482521 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass
6833 00:45:07.493111 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89
6834 00:45:35.199538 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89 (27795 ms)
6835 00:45:35.240948 [0:04:32.024637400] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6836 00:45:35.268850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass>
6837 00:45:35.269172 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass
6839 00:45:35.277207 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1
6840 00:45:35.304127 [0:04:32.087413938] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6841 00:45:35.315240 Camera needs 4 requests, can't test only 1
6842 00:45:35.369547 [0:04:32.153560631] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6843 00:45:35.373252 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6844 00:45:35.418856
6845 00:45:35.435611 [0:04:32.219622092] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6846 00:45:35.487388 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1 (62 ms)
6847 00:45:35.550408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip>
6848 00:45:35.550724 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip
6850 00:45:35.559140 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2
6851 00:45:35.600021 Camera needs 4 requests, can't test only 2
6852 00:45:35.652345 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6853 00:45:35.708103
6854 00:45:35.768004 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2 (63 ms)
6855 00:45:35.835396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip>
6856 00:45:35.835717 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip
6858 00:45:35.843134 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3
6859 00:45:35.883401 Camera needs 4 requests, can't test only 3
6860 00:45:35.937207 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6861 00:45:35.988938
6862 00:45:36.051048 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3 (68 ms)
6863 00:45:36.111761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip>
6864 00:45:36.112063 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip
6866 00:45:36.119412 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5
6867 00:45:38.496710 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5 (3101 ms)
6868 00:45:38.537511 [0:04:35.320709092] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6869 00:45:38.561140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass>
6870 00:45:38.561450 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass
6872 00:45:38.569368 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8
6873 00:45:42.054580 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8 (3557 ms)
6874 00:45:42.095171 [0:04:38.878894477] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6875 00:45:42.119633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass>
6876 00:45:42.119986 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass
6878 00:45:42.128243 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13
6879 00:45:47.112513 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13 (5057 ms)
6880 00:45:47.154606 [0:04:43.938238939] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6881 00:45:47.182024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass>
6882 00:45:47.182305 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass
6884 00:45:47.191574 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21
6885 00:45:54.562952 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21 (7449 ms)
6886 00:45:54.604667 [0:04:51.388207632] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6887 00:45:54.623994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass>
6888 00:45:54.624322 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass
6890 00:45:54.634453 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34
6891 00:46:05.906318 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34 (11343 ms)
6892 00:46:05.949823 [0:05:02.732913248] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6893 00:46:05.994640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass>
6894 00:46:05.995373 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass
6896 00:46:06.005253 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55
6897 00:46:23.524630 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55 (17615 ms)
6898 00:46:23.566777 [0:05:20.349587557] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6899 00:46:23.597463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass>
6900 00:46:23.597807 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass
6902 00:46:23.606474 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89
6903 00:46:51.315284 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89 (27788 ms)
6904 00:46:51.359807 [0:05:48.141292789] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6905 00:46:51.402811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass>
6906 00:46:51.403420 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass
6908 00:46:51.412717 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1
6909 00:46:51.422072 [0:05:48.205407020] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6910 00:46:51.455362 Camera needs 4 requests, can't test only 1
6911 00:46:51.489463 [0:05:48.271269635] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6912 00:46:51.513772 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6913 00:46:51.557265 [0:05:48.339237866] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6914 00:46:51.566819
6915 00:46:51.626302 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1 (63 ms)
6916 00:46:51.699272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip>
6917 00:46:51.700129 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip
6919 00:46:51.710118 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2
6920 00:46:51.756451 Camera needs 4 requests, can't test only 2
6921 00:46:51.815827 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6922 00:46:51.872906
6923 00:46:51.940287 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2 (64 ms)
6924 00:46:52.025447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip>
6925 00:46:52.026187 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip
6927 00:46:52.036989 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3
6928 00:46:52.082356 Camera needs 4 requests, can't test only 3
6929 00:46:52.149584 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6930 00:46:52.218546
6931 00:46:52.292220 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3 (66 ms)
6932 00:46:52.367080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip>
6933 00:46:52.367407 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip
6935 00:46:52.377861 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5
6936 00:46:54.614269 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5 (3100 ms)
6937 00:46:54.654852 [0:05:51.436851020] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6938 00:46:54.699825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass>
6939 00:46:54.700553 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass
6941 00:46:54.713135 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8
6942 00:46:58.173650 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8 (3559 ms)
6943 00:46:58.214755 [0:05:54.996311789] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6944 00:46:58.258017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass>
6945 00:46:58.258754 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass
6947 00:46:58.268365 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13
6948 00:47:03.233159 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13 (5058 ms)
6949 00:47:03.273496 [0:06:00.055115713] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6950 00:47:03.305593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass>
6951 00:47:03.305877 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass
6953 00:47:03.314292 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21
6954 00:47:10.678982 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21 (7446 ms)
6955 00:47:10.720327 [0:06:07.502036098] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6956 00:47:10.749940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass>
6957 00:47:10.750236 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass
6959 00:47:10.759112 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34
6960 00:47:22.014613 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34 (11334 ms)
6961 00:47:22.056762 [0:06:18.838076945] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6962 00:47:22.090043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass>
6963 00:47:22.090341 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass
6965 00:47:22.098542 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55
6966 00:47:39.628123 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55 (17613 ms)
6967 00:47:39.672327 [0:06:36.452958407] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6968 00:47:39.698382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass>
6969 00:47:39.698706 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass
6971 00:47:39.707705 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89
6972 00:48:07.419314 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89 (27790 ms)
6973 00:48:07.461817 [0:07:04.241819409] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6974 00:48:07.492374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass>
6975 00:48:07.492670 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass
6977 00:48:07.500343 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_1
6978 00:48:07.941561 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_1 (525 ms)
6979 00:48:08.001100 [0:07:04.781155255] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6980 00:48:08.007593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass>
6981 00:48:08.007863 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass
6983 00:48:08.019438 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_2
6984 00:48:08.581166 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_2 (640 ms)
6985 00:48:08.626119 [0:07:05.406230640] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6986 00:48:08.651546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass>
6987 00:48:08.651848 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass
6989 00:48:08.663989 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_3
6990 00:48:09.306673 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_3 (724 ms)
6991 00:48:09.350541 [0:07:06.130944101] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6992 00:48:09.369364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass>
6993 00:48:09.369641 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass
6995 00:48:09.379764 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_5
6996 00:48:10.230394 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_5 (923 ms)
6997 00:48:10.274569 [0:07:07.054600255] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6998 00:48:10.295139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass>
6999 00:48:10.295429 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass
7001 00:48:10.307543 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_8
7002 00:48:11.448678 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_8 (1218 ms)
7003 00:48:11.493775 [0:07:08.273559640] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7004 00:48:11.514113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass>
7005 00:48:11.514404 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass
7007 00:48:11.524222 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_13
7008 00:48:13.168964 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_13 (1719 ms)
7009 00:48:13.213452 [0:07:09.993615102] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7010 00:48:13.233647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass>
7011 00:48:13.233911 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass
7013 00:48:13.244809 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_21
7014 00:48:15.685462 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_21 (2516 ms)
7015 00:48:15.730160 [0:07:12.510029333] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7016 00:48:15.754854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass>
7017 00:48:15.755164 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass
7019 00:48:15.767867 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_34
7020 00:48:19.497655 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_34 (3811 ms)
7021 00:48:19.541502 [0:07:16.321312871] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7022 00:48:19.585141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass>
7023 00:48:19.585977 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass
7025 00:48:19.601034 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_55
7026 00:48:25.400384 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_55 (5902 ms)
7027 00:48:25.445420 [0:07:22.225065487] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7028 00:48:25.482097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass>
7029 00:48:25.482804 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass
7031 00:48:25.497678 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_89
7032 00:48:34.697208 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_89 (9296 ms)
7033 00:48:34.743460 [0:07:31.522739949] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7034 00:48:34.776427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass>
7035 00:48:34.776808 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass
7037 00:48:34.789580 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1
7038 00:48:35.229562 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1 (528 ms)
7039 00:48:35.295543 [0:07:32.074524564] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7040 00:48:35.316680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass>
7041 00:48:35.317471 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass
7043 00:48:35.328200 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2
7044 00:48:35.878492 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2 (648 ms)
7045 00:48:35.919104 [0:07:32.698362872] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7046 00:48:35.962236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass>
7047 00:48:35.962956 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass
7049 00:48:35.973838 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3
7050 00:48:36.601172 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3 (722 ms)
7051 00:48:36.642361 [0:07:33.421511180] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7052 00:48:36.686569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass>
7053 00:48:36.687294 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass
7055 00:48:36.695822 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5
7056 00:48:37.524534 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5 (922 ms)
7057 00:48:37.564936 [0:07:34.344257103] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7058 00:48:37.615016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass>
7059 00:48:37.615725 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass
7061 00:48:37.627017 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8
7062 00:48:38.743330 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8 (1218 ms)
7063 00:48:38.783364 [0:07:35.562982180] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7064 00:48:38.815773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass>
7065 00:48:38.816050 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass
7067 00:48:38.825690 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13
7068 00:48:40.461693 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13 (1718 ms)
7069 00:48:40.502593 [0:07:37.281906796] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7070 00:48:40.533754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass>
7071 00:48:40.534059 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass
7073 00:48:40.545598 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21
7074 00:48:42.978338 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21 (2515 ms)
7075 00:48:43.019160 [0:07:39.798239950] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7076 00:48:43.064100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass>
7077 00:48:43.064859 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass
7079 00:48:43.076156 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34
7080 00:48:46.790205 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34 (3811 ms)
7081 00:48:46.832790 [0:07:43.611585104] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7082 00:48:46.868013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass>
7083 00:48:46.868726 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass
7085 00:48:46.877890 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55
7086 00:48:52.695514 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55 (5905 ms)
7087 00:48:52.736938 [0:07:49.515693719] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7088 00:48:52.777186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass>
7089 00:48:52.778034 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass
7091 00:48:52.790617 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89
7092 00:49:01.992137 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89 (9296 ms)
7093 00:49:02.033038 [0:07:58.811880181] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7094 00:49:02.073751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass>
7095 00:49:02.074461 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass
7097 00:49:02.086781 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1
7098 00:49:02.518040 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1 (525 ms)
7099 00:49:02.579465 [0:07:59.358009643] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7100 00:49:02.598702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass>
7101 00:49:02.599398 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass
7103 00:49:02.610043 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2
7104 00:49:03.161696 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2 (643 ms)
7105 00:49:03.202974 [0:07:59.981083182] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7106 00:49:03.243922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass>
7107 00:49:03.244652 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass
7109 00:49:03.256676 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3
7110 00:49:03.885416 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3 (723 ms)
7111 00:49:03.925916 [0:08:00.704326643] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7112 00:49:03.968592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass>
7113 00:49:03.969326 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass
7115 00:49:03.979158 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5
7116 00:49:04.808248 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5 (922 ms)
7117 00:49:04.849064 [0:08:01.627245489] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7118 00:49:04.895427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass>
7119 00:49:04.896123 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass
7121 00:49:04.908144 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8
7122 00:49:06.027365 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8 (1219 ms)
7123 00:49:06.068460 [0:08:02.847153951] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7124 00:49:06.130328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass>
7125 00:49:06.130662 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass
7127 00:49:06.141333 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13
7128 00:49:07.746333 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13 (1718 ms)
7129 00:49:07.787976 [0:08:04.566775566] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7130 00:49:07.829995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass>
7131 00:49:07.830318 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass
7133 00:49:07.839439 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21
7134 00:49:10.263400 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21 (2517 ms)
7135 00:49:10.304989 [0:08:07.083225490] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7136 00:49:10.363013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass>
7137 00:49:10.363893 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass
7139 00:49:10.374713 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34
7140 00:49:14.075135 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34 (3811 ms)
7141 00:49:14.116178 [0:08:10.894359721] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7142 00:49:14.166383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass>
7143 00:49:14.167103 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass
7145 00:49:14.177759 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55
7146 00:49:19.978365 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55 (5902 ms)
7147 00:49:20.020476 [0:08:16.798228106] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7148 00:49:20.065842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass>
7149 00:49:20.066114 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass
7151 00:49:20.075574 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89
7152 00:49:29.275026 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89 (9296 ms)
7153 00:49:29.316341 [0:08:26.094722952] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7154 00:49:29.358950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass>
7155 00:49:29.359272 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass
7157 00:49:29.369148 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1
7158 00:49:29.799287 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1 (524 ms)
7159 00:49:29.871271 [0:08:26.649306722] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7160 00:49:29.881935 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass
7162 00:49:29.884920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass>
7163 00:49:29.898454 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2
7164 00:49:30.455233 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2 (655 ms)
7165 00:49:30.495748 [0:08:27.273521029] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7166 00:49:30.531067 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass
7168 00:49:30.534143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass>
7169 00:49:30.544198 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3
7170 00:49:31.174690 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3 (722 ms)
7171 00:49:31.219076 [0:08:27.996698722] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7172 00:49:31.268944 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass
7174 00:49:31.271731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass>
7175 00:49:31.283225 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5
7176 00:49:32.101109 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5 (923 ms)
7177 00:49:32.141955 [0:08:28.919832952] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7178 00:49:32.179286 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass
7180 00:49:32.182716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass>
7181 00:49:32.192900 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8
7182 00:49:33.322130 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8 (1220 ms)
7183 00:49:33.362905 [0:08:30.140761491] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7184 00:49:33.404722 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass
7186 00:49:33.407477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass>
7187 00:49:33.420936 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13
7188 00:49:35.043691 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13 (1721 ms)
7189 00:49:35.084894 [0:08:31.862185568] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7190 00:49:35.129511 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass
7192 00:49:35.132136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass>
7193 00:49:35.143989 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21
7194 00:49:37.561693 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21 (2517 ms)
7195 00:49:37.602172 [0:08:34.380157799] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7196 00:49:37.646583 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass
7198 00:49:37.649412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass>
7199 00:49:37.661730 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34
7200 00:49:41.373313 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34 (3812 ms)
7201 00:49:41.415583 [0:08:38.193106184] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7202 00:49:41.456366 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass
7204 00:49:41.459450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass>
7205 00:49:41.471415 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55
7206 00:49:47.277255 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55 (5903 ms)
7207 00:49:47.319421 [0:08:44.096632415] [428] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7208 00:49:47.355830 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass
7210 00:49:47.358725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass>
7211 00:49:47.369232 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89
7212 00:49:56.575230 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89 (9297 ms)
7213 00:49:56.656273 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass
7215 00:49:56.659320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass>
7216 00:49:56.670554 [----------] 120 tests from CaptureTests/SingleStream (515877 ms total)
7217 00:49:56.732383
7218 00:49:56.812409 [----------] Global test environment tear-down
7219 00:49:56.890905 [==========] 120 tests from 1 test suite ran. (515877 ms total)
7220 00:49:56.970694 <LAVA_SIGNAL_TESTSET STOP>
7221 00:49:56.971398 Received signal: <TESTSET> STOP
7222 00:49:56.971775 Closing test_set CaptureTests/SingleStream
7223 00:49:56.974277 + set +x
7224 00:49:56.977555 <LAVA_SIGNAL_ENDRUN 0_lc-compliance 14368350_1.6.2.3.1>
7225 00:49:56.978297 Received signal: <ENDRUN> 0_lc-compliance 14368350_1.6.2.3.1
7226 00:49:56.978849 Ending use of test pattern.
7227 00:49:56.979276 Ending test lava.0_lc-compliance (14368350_1.6.2.3.1), duration 517.98
7229 00:49:56.980878 <LAVA_TEST_RUNNER EXIT>
7230 00:49:56.981481 ok: lava_test_shell seems to have completed
7231 00:49:56.991119 Capture/Raw_1:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_13:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_2:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_21:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_3:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_34:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_5:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_55:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_8:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_89:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
7232 00:49:56.992033 end: 3.1 lava-test-shell (duration 00:08:39) [common]
7233 00:49:56.992493 end: 3 lava-test-retry (duration 00:08:39) [common]
7234 00:49:56.992938 start: 4 finalize (timeout 00:10:00) [common]
7235 00:49:56.993438 start: 4.1 power-off (timeout 00:00:30) [common]
7236 00:49:56.994198 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
7237 00:49:58.277809 >> Command sent successfully.
7238 00:49:58.289379 Returned 0 in 1 seconds
7239 00:49:58.390717 end: 4.1 power-off (duration 00:00:01) [common]
7241 00:49:58.392189 start: 4.2 read-feedback (timeout 00:09:59) [common]
7242 00:49:58.393573 Listened to connection for namespace 'common' for up to 1s
7243 00:49:59.394143 Finalising connection for namespace 'common'
7244 00:49:59.394834 Disconnecting from shell: Finalise
7245 00:49:59.395265 / #
7246 00:49:59.496220 end: 4.2 read-feedback (duration 00:00:01) [common]
7247 00:49:59.496939 end: 4 finalize (duration 00:00:03) [common]
7248 00:49:59.497578 Cleaning after the job
7249 00:49:59.498204 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/ramdisk
7250 00:49:59.508571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/kernel
7251 00:49:59.542424 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/dtb
7252 00:49:59.542767 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/nfsrootfs
7253 00:49:59.589109 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368350/tftp-deploy-t5a5n4a3/modules
7254 00:49:59.594696 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368350
7255 00:49:59.854394 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368350
7256 00:49:59.854576 Job finished correctly