Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 43
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 89
1 00:45:26.525306 lava-dispatcher, installed at version: 2024.03
2 00:45:26.525520 start: 0 validate
3 00:45:26.525638 Start time: 2024-06-16 00:45:26.525633+00:00 (UTC)
4 00:45:26.525773 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:45:26.525906 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 00:45:26.780358 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:45:26.781349 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:45:27.038258 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:45:27.039109 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:45:27.292555 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:45:27.293198 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:45:27.554297 validate duration: 1.03
14 00:45:27.555556 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:45:27.556119 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:45:27.556591 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:45:27.557372 Not decompressing ramdisk as can be used compressed.
18 00:45:27.557939 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
19 00:45:27.558734 saving as /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/ramdisk/rootfs.cpio.gz
20 00:45:27.559462 total size: 28105535 (26 MB)
21 00:45:27.564305 progress 0 % (0 MB)
22 00:45:27.587754 progress 5 % (1 MB)
23 00:45:27.599572 progress 10 % (2 MB)
24 00:45:27.608612 progress 15 % (4 MB)
25 00:45:27.616528 progress 20 % (5 MB)
26 00:45:27.623500 progress 25 % (6 MB)
27 00:45:27.630753 progress 30 % (8 MB)
28 00:45:27.638531 progress 35 % (9 MB)
29 00:45:27.646154 progress 40 % (10 MB)
30 00:45:27.653304 progress 45 % (12 MB)
31 00:45:27.660495 progress 50 % (13 MB)
32 00:45:27.667552 progress 55 % (14 MB)
33 00:45:27.674575 progress 60 % (16 MB)
34 00:45:27.681688 progress 65 % (17 MB)
35 00:45:27.688885 progress 70 % (18 MB)
36 00:45:27.695908 progress 75 % (20 MB)
37 00:45:27.702881 progress 80 % (21 MB)
38 00:45:27.709796 progress 85 % (22 MB)
39 00:45:27.716546 progress 90 % (24 MB)
40 00:45:27.723534 progress 95 % (25 MB)
41 00:45:27.730466 progress 100 % (26 MB)
42 00:45:27.730668 26 MB downloaded in 0.17 s (156.55 MB/s)
43 00:45:27.730822 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:45:27.731042 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:45:27.731121 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:45:27.731195 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:45:27.731322 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:45:27.731387 saving as /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/kernel/Image
50 00:45:27.731440 total size: 54813184 (52 MB)
51 00:45:27.731494 No compression specified
52 00:45:27.732506 progress 0 % (0 MB)
53 00:45:27.745932 progress 5 % (2 MB)
54 00:45:27.759437 progress 10 % (5 MB)
55 00:45:27.772859 progress 15 % (7 MB)
56 00:45:27.786688 progress 20 % (10 MB)
57 00:45:27.800382 progress 25 % (13 MB)
58 00:45:27.813951 progress 30 % (15 MB)
59 00:45:27.827708 progress 35 % (18 MB)
60 00:45:27.841161 progress 40 % (20 MB)
61 00:45:27.854615 progress 45 % (23 MB)
62 00:45:27.868266 progress 50 % (26 MB)
63 00:45:27.881959 progress 55 % (28 MB)
64 00:45:27.895490 progress 60 % (31 MB)
65 00:45:27.909131 progress 65 % (34 MB)
66 00:45:27.922799 progress 70 % (36 MB)
67 00:45:27.936414 progress 75 % (39 MB)
68 00:45:27.949894 progress 80 % (41 MB)
69 00:45:27.963319 progress 85 % (44 MB)
70 00:45:27.976840 progress 90 % (47 MB)
71 00:45:27.990414 progress 95 % (49 MB)
72 00:45:28.003651 progress 100 % (52 MB)
73 00:45:28.003864 52 MB downloaded in 0.27 s (191.89 MB/s)
74 00:45:28.004010 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:45:28.004217 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:45:28.004297 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:45:28.004372 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:45:28.004498 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:45:28.004558 saving as /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:45:28.004611 total size: 57695 (0 MB)
82 00:45:28.004664 No compression specified
83 00:45:28.005643 progress 56 % (0 MB)
84 00:45:28.005902 progress 100 % (0 MB)
85 00:45:28.006095 0 MB downloaded in 0.00 s (37.15 MB/s)
86 00:45:28.006207 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:45:28.006414 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:45:28.006489 start: 1.4 download-retry (timeout 00:10:00) [common]
90 00:45:28.006564 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 00:45:28.006665 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:45:28.006726 saving as /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/modules/modules.tar
93 00:45:28.006779 total size: 8608736 (8 MB)
94 00:45:28.006832 Using unxz to decompress xz
95 00:45:28.008092 progress 0 % (0 MB)
96 00:45:28.026471 progress 5 % (0 MB)
97 00:45:28.052325 progress 10 % (0 MB)
98 00:45:28.079054 progress 15 % (1 MB)
99 00:45:28.101908 progress 20 % (1 MB)
100 00:45:28.124621 progress 25 % (2 MB)
101 00:45:28.147479 progress 30 % (2 MB)
102 00:45:28.171038 progress 35 % (2 MB)
103 00:45:28.196773 progress 40 % (3 MB)
104 00:45:28.218685 progress 45 % (3 MB)
105 00:45:28.241705 progress 50 % (4 MB)
106 00:45:28.265574 progress 55 % (4 MB)
107 00:45:28.288953 progress 60 % (4 MB)
108 00:45:28.312293 progress 65 % (5 MB)
109 00:45:28.336134 progress 70 % (5 MB)
110 00:45:28.360719 progress 75 % (6 MB)
111 00:45:28.385591 progress 80 % (6 MB)
112 00:45:28.408983 progress 85 % (7 MB)
113 00:45:28.433211 progress 90 % (7 MB)
114 00:45:28.457189 progress 95 % (7 MB)
115 00:45:28.480920 progress 100 % (8 MB)
116 00:45:28.486260 8 MB downloaded in 0.48 s (17.12 MB/s)
117 00:45:28.486429 end: 1.4.1 http-download (duration 00:00:00) [common]
119 00:45:28.486656 end: 1.4 download-retry (duration 00:00:00) [common]
120 00:45:28.486736 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:45:28.486812 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:45:28.486886 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:45:28.486958 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:45:28.487120 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv
125 00:45:28.487233 makedir: /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin
126 00:45:28.487322 makedir: /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/tests
127 00:45:28.487405 makedir: /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/results
128 00:45:28.487488 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-add-keys
129 00:45:28.487611 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-add-sources
130 00:45:28.487722 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-background-process-start
131 00:45:28.487834 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-background-process-stop
132 00:45:28.487954 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-common-functions
133 00:45:28.488075 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-echo-ipv4
134 00:45:28.488192 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-install-packages
135 00:45:28.488300 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-installed-packages
136 00:45:28.488407 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-os-build
137 00:45:28.488515 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-probe-channel
138 00:45:28.488624 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-probe-ip
139 00:45:28.488731 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-target-ip
140 00:45:28.488839 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-target-mac
141 00:45:28.488946 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-target-storage
142 00:45:28.489054 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-case
143 00:45:28.489164 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-event
144 00:45:28.489270 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-feedback
145 00:45:28.489377 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-raise
146 00:45:28.489485 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-reference
147 00:45:28.489597 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-runner
148 00:45:28.489706 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-set
149 00:45:28.489815 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-test-shell
150 00:45:28.489924 Updating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-install-packages (oe)
151 00:45:28.490057 Updating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/bin/lava-installed-packages (oe)
152 00:45:28.490163 Creating /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/environment
153 00:45:28.490273 LAVA metadata
154 00:45:28.490351 - LAVA_JOB_ID=14368395
155 00:45:28.490406 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:45:28.490493 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:45:28.490548 skipped lava-vland-overlay
158 00:45:28.490612 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:45:28.490680 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:45:28.490731 skipped lava-multinode-overlay
161 00:45:28.490794 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:45:28.490861 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:45:28.490927 Loading test definitions
164 00:45:28.491000 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:45:28.491058 Using /lava-14368395 at stage 0
166 00:45:28.491341 uuid=14368395_1.5.2.3.1 testdef=None
167 00:45:28.491420 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:45:28.491494 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:45:28.491916 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:45:28.492133 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:45:28.492685 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:45:28.492891 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:45:28.493413 runner path: /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/0/tests/0_v4l2-compliance-uvc test_uuid 14368395_1.5.2.3.1
176 00:45:28.493554 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:45:28.493742 Creating lava-test-runner.conf files
179 00:45:28.493798 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368395/lava-overlay-jh7uh_vv/lava-14368395/0 for stage 0
180 00:45:28.493877 - 0_v4l2-compliance-uvc
181 00:45:28.493965 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:45:28.494040 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:45:28.499985 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:45:28.500077 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:45:28.500154 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:45:28.500229 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:45:28.500308 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:45:29.360297 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 00:45:29.360461 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 00:45:29.360537 extracting modules file /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368395/extract-overlay-ramdisk-v0j7nxy2/ramdisk
191 00:45:29.580128 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:45:29.580271 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 00:45:29.580356 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368395/compress-overlay-72d6ea6p/overlay-1.5.2.4.tar.gz to ramdisk
194 00:45:29.580417 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368395/compress-overlay-72d6ea6p/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368395/extract-overlay-ramdisk-v0j7nxy2/ramdisk
195 00:45:29.586632 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:45:29.586728 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 00:45:29.586808 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:45:29.586886 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 00:45:29.586954 Building ramdisk /var/lib/lava/dispatcher/tmp/14368395/extract-overlay-ramdisk-v0j7nxy2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368395/extract-overlay-ramdisk-v0j7nxy2/ramdisk
200 00:45:30.301160 >> 275951 blocks
201 00:45:34.436356 rename /var/lib/lava/dispatcher/tmp/14368395/extract-overlay-ramdisk-v0j7nxy2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/ramdisk/ramdisk.cpio.gz
202 00:45:34.436536 end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
203 00:45:34.436625 start: 1.5.8 prepare-kernel (timeout 00:09:53) [common]
204 00:45:34.436703 start: 1.5.8.1 prepare-fit (timeout 00:09:53) [common]
205 00:45:34.436775 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/kernel/Image']
206 00:45:48.142350 Returned 0 in 13 seconds
207 00:45:48.242827 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/kernel/image.itb
208 00:45:48.954894 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:45:48.955024 output: Created: Sun Jun 16 01:45:48 2024
210 00:45:48.955092 output: Image 0 (kernel-1)
211 00:45:48.955164 output: Description:
212 00:45:48.955225 output: Created: Sun Jun 16 01:45:48 2024
213 00:45:48.955283 output: Type: Kernel Image
214 00:45:48.955342 output: Compression: lzma compressed
215 00:45:48.955413 output: Data Size: 13126376 Bytes = 12818.73 KiB = 12.52 MiB
216 00:45:48.955492 output: Architecture: AArch64
217 00:45:48.955550 output: OS: Linux
218 00:45:48.955606 output: Load Address: 0x00000000
219 00:45:48.955670 output: Entry Point: 0x00000000
220 00:45:48.955730 output: Hash algo: crc32
221 00:45:48.955782 output: Hash value: c791a20a
222 00:45:48.955833 output: Image 1 (fdt-1)
223 00:45:48.955884 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:45:48.955953 output: Created: Sun Jun 16 01:45:48 2024
225 00:45:48.956004 output: Type: Flat Device Tree
226 00:45:48.956053 output: Compression: uncompressed
227 00:45:48.956102 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:45:48.956150 output: Architecture: AArch64
229 00:45:48.956207 output: Hash algo: crc32
230 00:45:48.956258 output: Hash value: a9713552
231 00:45:48.956306 output: Image 2 (ramdisk-1)
232 00:45:48.956353 output: Description: unavailable
233 00:45:48.956402 output: Created: Sun Jun 16 01:45:48 2024
234 00:45:48.956449 output: Type: RAMDisk Image
235 00:45:48.956519 output: Compression: uncompressed
236 00:45:48.956595 output: Data Size: 41218111 Bytes = 40252.06 KiB = 39.31 MiB
237 00:45:48.956670 output: Architecture: AArch64
238 00:45:48.956744 output: OS: Linux
239 00:45:48.956833 output: Load Address: unavailable
240 00:45:48.956908 output: Entry Point: unavailable
241 00:45:48.956983 output: Hash algo: crc32
242 00:45:48.957065 output: Hash value: ad073bbf
243 00:45:48.957141 output: Default Configuration: 'conf-1'
244 00:45:48.957216 output: Configuration 0 (conf-1)
245 00:45:48.957290 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:45:48.957373 output: Kernel: kernel-1
247 00:45:48.957453 output: Init Ramdisk: ramdisk-1
248 00:45:48.957538 output: FDT: fdt-1
249 00:45:48.957621 output: Loadables: kernel-1
250 00:45:48.957697 output:
251 00:45:48.957867 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 00:45:48.957988 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 00:45:48.958104 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 00:45:48.958261 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
255 00:45:48.958356 No LXC device requested
256 00:45:48.958462 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:45:48.958542 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
258 00:45:48.958612 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:45:48.958672 Checking files for TFTP limit of 4294967296 bytes.
260 00:45:48.959188 end: 1 tftp-deploy (duration 00:00:21) [common]
261 00:45:48.959316 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:45:48.959422 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:45:48.959558 substitutions:
264 00:45:48.959622 - {DTB}: 14368395/tftp-deploy-04cx3o6c/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:45:48.959681 - {INITRD}: 14368395/tftp-deploy-04cx3o6c/ramdisk/ramdisk.cpio.gz
266 00:45:48.959733 - {KERNEL}: 14368395/tftp-deploy-04cx3o6c/kernel/Image
267 00:45:48.959793 - {LAVA_MAC}: None
268 00:45:48.959861 - {PRESEED_CONFIG}: None
269 00:45:48.959912 - {PRESEED_LOCAL}: None
270 00:45:48.959961 - {RAMDISK}: 14368395/tftp-deploy-04cx3o6c/ramdisk/ramdisk.cpio.gz
271 00:45:48.960016 - {ROOT_PART}: None
272 00:45:48.960072 - {ROOT}: None
273 00:45:48.960127 - {SERVER_IP}: 192.168.201.1
274 00:45:48.960175 - {TEE}: None
275 00:45:48.960224 Parsed boot commands:
276 00:45:48.960271 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:45:48.960426 Parsed boot commands: tftpboot 192.168.201.1 14368395/tftp-deploy-04cx3o6c/kernel/image.itb 14368395/tftp-deploy-04cx3o6c/kernel/cmdline
278 00:45:48.960507 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:45:48.960583 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:45:48.960678 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:45:48.960755 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:45:48.960816 Not connected, no need to disconnect.
283 00:45:48.960881 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:45:48.960968 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:45:48.961026 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
286 00:45:48.964419 Setting prompt string to ['lava-test: # ']
287 00:45:48.964743 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:45:48.964864 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:45:48.964988 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:45:48.965092 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:45:48.965368 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-5']
292 00:46:10.995070 Returned 0 in 22 seconds
293 00:46:11.096117 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
295 00:46:11.097462 end: 2.2.2 reset-device (duration 00:00:22) [common]
296 00:46:11.097983 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
297 00:46:11.098482 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:46:11.098834 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:46:11.099211 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:46:11.101061 [Enter `^Ec?' for help]
301 00:46:11.101412 [DL] 00000000 00000000 010701
302 00:46:11.101475
303 00:46:11.101533
304 00:46:11.101592 F0: 102B 0000
305 00:46:11.101651
306 00:46:11.101708 F3: 1006 0033 [0200]
307 00:46:11.101766
308 00:46:11.101821 F3: 4001 00E0 [0200]
309 00:46:11.101876
310 00:46:11.101928 F3: 0000 0000
311 00:46:11.101980
312 00:46:11.102027 V0: 0000 0000 [0001]
313 00:46:11.102075
314 00:46:11.102124 00: 1027 0002
315 00:46:11.102174
316 00:46:11.102253 01: 0000 0000
317 00:46:11.102320
318 00:46:11.102368 BP: 0C00 0251 [0000]
319 00:46:11.102416
320 00:46:11.102464 G0: 1182 0000
321 00:46:11.102511
322 00:46:11.102558 EC: 0004 0000 [0001]
323 00:46:11.102605
324 00:46:11.102652 S7: 0000 0000 [0000]
325 00:46:11.102699
326 00:46:11.102746 CC: 0000 0000 [0001]
327 00:46:11.102793
328 00:46:11.102840 T0: 0000 00DB [000F]
329 00:46:11.102888
330 00:46:11.102935 Jump to BL
331 00:46:11.102982
332 00:46:11.103030
333 00:46:11.103077
334 00:46:11.103125 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:46:11.103176 ARM64: Exception handlers installed.
336 00:46:11.103224 ARM64: Testing exception
337 00:46:11.103273 ARM64: Done test exception
338 00:46:11.103320 WDT: Last reset was cold boot
339 00:46:11.103368 SPI0(PAD0) initialized at 992727 Hz
340 00:46:11.103416 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:46:11.103464 Manufacturer: ef
342 00:46:11.103511 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:46:11.103559 Probing TPM: . done!
344 00:46:11.103606 TPM ready after 0 ms
345 00:46:11.103654 Connected to device vid:did:rid of 1ae0:0028:00
346 00:46:11.103702 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
347 00:46:11.103750 Initialized TPM device CR50 revision 0
348 00:46:11.103799 tlcl_send_startup: Startup return code is 0
349 00:46:11.103846 TPM: setup succeeded
350 00:46:11.103894 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:46:11.103943 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:46:11.103990 in-header: 03 19 00 00 08 00 00 00
353 00:46:11.104037 in-data: a2 e0 47 00 13 00 00 00
354 00:46:11.104085 Chrome EC: UHEPI supported
355 00:46:11.104132 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:46:11.104180 in-header: 03 a1 00 00 08 00 00 00
357 00:46:11.104228 in-data: 84 60 60 10 00 00 00 00
358 00:46:11.104275 Phase 1
359 00:46:11.104323 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:46:11.104371 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:46:11.104419 VB2:vb2_check_recovery() Recovery was requested manually
362 00:46:11.104466 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:46:11.104515 Recovery requested (1009000e)
364 00:46:11.104563 tlcl_extend: response is 0
365 00:46:11.104611 tlcl_extend: response is 0
366 00:46:11.104658
367 00:46:11.104705
368 00:46:11.104753 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:46:11.104802 ARM64: Exception handlers installed.
370 00:46:11.104850 ARM64: Testing exception
371 00:46:11.104897 ARM64: Done test exception
372 00:46:11.104944 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2019
373 00:46:11.104993 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:46:11.105042 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:46:11.105090 [RTC]rtc_get_frequency_meter,134: input=0xf, output=779
376 00:46:11.105149 [RTC]rtc_get_frequency_meter,134: input=0x17, output=959
377 00:46:11.105205 [RTC]rtc_get_frequency_meter,134: input=0x13, output=869
378 00:46:11.105253 [RTC]rtc_get_frequency_meter,134: input=0x11, output=823
379 00:46:11.105301 [RTC]rtc_get_frequency_meter,134: input=0x10, output=802
380 00:46:11.105350 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
381 00:46:11.105399 [RTC]rtc_get_frequency_meter,134: input=0x10, output=801
382 00:46:11.105447 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
383 00:46:11.105495 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 00:46:11.105543 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 00:46:11.105592 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 00:46:11.105640 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 00:46:11.105688 in-header: 03 19 00 00 08 00 00 00
388 00:46:11.105736 in-data: a2 e0 47 00 13 00 00 00
389 00:46:11.105784 Chrome EC: UHEPI supported
390 00:46:11.105832 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 00:46:11.105881 in-header: 03 a1 00 00 08 00 00 00
392 00:46:11.105928 in-data: 84 60 60 10 00 00 00 00
393 00:46:11.105976 Skip loading cached calibration data
394 00:46:11.106024 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 00:46:11.106072 in-header: 03 a1 00 00 08 00 00 00
396 00:46:11.106119 in-data: 84 60 60 10 00 00 00 00
397 00:46:11.106166 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 00:46:11.106222 in-header: 03 a1 00 00 08 00 00 00
399 00:46:11.106273 in-data: 84 60 60 10 00 00 00 00
400 00:46:11.106321 ADC[3]: Raw value=1042439 ID=8
401 00:46:11.106369 Manufacturer: ef
402 00:46:11.106417 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 00:46:11.106466 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 00:46:11.106514 CBFS @ 21000 size 3d4000
405 00:46:11.106562 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 00:46:11.106610 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
407 00:46:11.106659 CBFS: Found @ offset 3c880 size 4b
408 00:46:11.106707 DRAM-K: Full Calibration
409 00:46:11.106754 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 00:46:11.106802 CBFS @ 21000 size 3d4000
411 00:46:11.106849 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 00:46:11.106897 CBFS: Locating 'fallback/dram'
413 00:46:11.106944 CBFS: Found @ offset 24b00 size 12268
414 00:46:11.106992 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 00:46:11.107040 ddr_geometry: 1, config: 0x0
416 00:46:11.107088 header.status = 0x0
417 00:46:11.107136 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 00:46:11.107184 header.version = 0x5 (expected: 0x5)
419 00:46:11.107421 header.size = 0x8f0 (expected: 0x8f0)
420 00:46:11.107481 header.config = 0x0
421 00:46:11.107531 header.flags = 0x0
422 00:46:11.107580 header.checksum = 0x0
423 00:46:11.107628 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 00:46:11.107679 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 00:46:11.107728 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 00:46:11.107776 ddr_geometry:1
427 00:46:11.107824 [EMI] new MDL number = 1
428 00:46:11.107872 dram_cbt_mode_extern: 0
429 00:46:11.107920 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 00:46:11.107967 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 00:46:11.108015
432 00:46:11.108062
433 00:46:11.108109 [Bianco] ETT version 0.0.0.1
434 00:46:11.108157 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 00:46:11.108205
436 00:46:11.108251 vSetVcoreByFreq with vcore:762500, freq=1600
437 00:46:11.108299
438 00:46:11.108346 [DramcInit]
439 00:46:11.108394 AutoRefreshCKEOff AutoREF OFF
440 00:46:11.108441 DDRPhyPLLSetting-CKEOFF
441 00:46:11.108489 DDRPhyPLLSetting-CKEON
442 00:46:11.108536
443 00:46:11.108583 Enable WDQS
444 00:46:11.108631 [ModeRegInit_LP4] CH0 RK0
445 00:46:11.108678 Write Rank0 MR13 =0x18
446 00:46:11.108725 Write Rank0 MR12 =0x5d
447 00:46:11.108773 Write Rank0 MR1 =0x56
448 00:46:11.108820 Write Rank0 MR2 =0x1a
449 00:46:11.108868 Write Rank0 MR11 =0x0
450 00:46:11.108916 Write Rank0 MR22 =0x38
451 00:46:11.108963 Write Rank0 MR14 =0x5d
452 00:46:11.109013 Write Rank0 MR3 =0x30
453 00:46:11.109060 Write Rank0 MR13 =0x58
454 00:46:11.109107 Write Rank0 MR12 =0x5d
455 00:46:11.109155 Write Rank0 MR1 =0x56
456 00:46:11.109202 Write Rank0 MR2 =0x2d
457 00:46:11.109249 Write Rank0 MR11 =0x23
458 00:46:11.109296 Write Rank0 MR22 =0x34
459 00:46:11.109344 Write Rank0 MR14 =0x10
460 00:46:11.109391 Write Rank0 MR3 =0x30
461 00:46:11.109439 Write Rank0 MR13 =0xd8
462 00:46:11.109486 [ModeRegInit_LP4] CH0 RK1
463 00:46:11.109533 Write Rank1 MR13 =0x18
464 00:46:11.109581 Write Rank1 MR12 =0x5d
465 00:46:11.109628 Write Rank1 MR1 =0x56
466 00:46:11.109676 Write Rank1 MR2 =0x1a
467 00:46:11.109724 Write Rank1 MR11 =0x0
468 00:46:11.109770 Write Rank1 MR22 =0x38
469 00:46:11.109818 Write Rank1 MR14 =0x5d
470 00:46:11.109865 Write Rank1 MR3 =0x30
471 00:46:11.109913 Write Rank1 MR13 =0x58
472 00:46:11.109960 Write Rank1 MR12 =0x5d
473 00:46:11.110007 Write Rank1 MR1 =0x56
474 00:46:11.110055 Write Rank1 MR2 =0x2d
475 00:46:11.110102 Write Rank1 MR11 =0x23
476 00:46:11.110150 Write Rank1 MR22 =0x34
477 00:46:11.110199 Write Rank1 MR14 =0x10
478 00:46:11.110253 Write Rank1 MR3 =0x30
479 00:46:11.110301 Write Rank1 MR13 =0xd8
480 00:46:11.110348 [ModeRegInit_LP4] CH1 RK0
481 00:46:11.110395 Write Rank0 MR13 =0x18
482 00:46:11.110443 Write Rank0 MR12 =0x5d
483 00:46:11.110490 Write Rank0 MR1 =0x56
484 00:46:11.110536 Write Rank0 MR2 =0x1a
485 00:46:11.110583 Write Rank0 MR11 =0x0
486 00:46:11.110631 Write Rank0 MR22 =0x38
487 00:46:11.110678 Write Rank0 MR14 =0x5d
488 00:46:11.110726 Write Rank0 MR3 =0x30
489 00:46:11.110773 Write Rank0 MR13 =0x58
490 00:46:11.110820 Write Rank0 MR12 =0x5d
491 00:46:11.110867 Write Rank0 MR1 =0x56
492 00:46:11.110915 Write Rank0 MR2 =0x2d
493 00:46:11.110962 Write Rank0 MR11 =0x23
494 00:46:11.111009 Write Rank0 MR22 =0x34
495 00:46:11.111056 Write Rank0 MR14 =0x10
496 00:46:11.111103 Write Rank0 MR3 =0x30
497 00:46:11.111150 Write Rank0 MR13 =0xd8
498 00:46:11.111198 [ModeRegInit_LP4] CH1 RK1
499 00:46:11.111245 Write Rank1 MR13 =0x18
500 00:46:11.111293 Write Rank1 MR12 =0x5d
501 00:46:11.111340 Write Rank1 MR1 =0x56
502 00:46:11.111387 Write Rank1 MR2 =0x1a
503 00:46:11.111435 Write Rank1 MR11 =0x0
504 00:46:11.111482 Write Rank1 MR22 =0x38
505 00:46:11.111530 Write Rank1 MR14 =0x5d
506 00:46:11.111577 Write Rank1 MR3 =0x30
507 00:46:11.111624 Write Rank1 MR13 =0x58
508 00:46:11.111671 Write Rank1 MR12 =0x5d
509 00:46:11.111718 Write Rank1 MR1 =0x56
510 00:46:11.111766 Write Rank1 MR2 =0x2d
511 00:46:11.111816 Write Rank1 MR11 =0x23
512 00:46:11.111864 Write Rank1 MR22 =0x34
513 00:46:11.111912 Write Rank1 MR14 =0x10
514 00:46:11.111960 Write Rank1 MR3 =0x30
515 00:46:11.112006 Write Rank1 MR13 =0xd8
516 00:46:11.112053 match AC timing 3
517 00:46:11.112102 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 00:46:11.112151 [MiockJmeterHQA]
519 00:46:11.112199 vSetVcoreByFreq with vcore:762500, freq=1600
520 00:46:11.112247
521 00:46:11.112294 MIOCK jitter meter ch=0
522 00:46:11.112342
523 00:46:11.112389 1T = (100-18) = 82 dly cells
524 00:46:11.112440 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
525 00:46:11.112488 vSetVcoreByFreq with vcore:725000, freq=1200
526 00:46:11.112536
527 00:46:11.112584 MIOCK jitter meter ch=0
528 00:46:11.112632
529 00:46:11.112680 1T = (95-16) = 79 dly cells
530 00:46:11.112728 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
531 00:46:11.112776 vSetVcoreByFreq with vcore:725000, freq=800
532 00:46:11.112824
533 00:46:11.112872 MIOCK jitter meter ch=0
534 00:46:11.112920
535 00:46:11.112967 1T = (95-16) = 79 dly cells
536 00:46:11.113015 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
537 00:46:11.113070 vSetVcoreByFreq with vcore:762500, freq=1600
538 00:46:11.113122 vSetVcoreByFreq with vcore:762500, freq=1600
539 00:46:11.113169
540 00:46:11.113216 K DRVP
541 00:46:11.113264 1. OCD DRVP=0 CALOUT=0
542 00:46:11.113314 1. OCD DRVP=1 CALOUT=0
543 00:46:11.113363 1. OCD DRVP=2 CALOUT=0
544 00:46:11.113411 1. OCD DRVP=3 CALOUT=0
545 00:46:11.113460 1. OCD DRVP=4 CALOUT=0
546 00:46:11.113508 1. OCD DRVP=5 CALOUT=0
547 00:46:11.113558 1. OCD DRVP=6 CALOUT=0
548 00:46:11.113607 1. OCD DRVP=7 CALOUT=0
549 00:46:11.113655 1. OCD DRVP=8 CALOUT=1
550 00:46:11.113704
551 00:46:11.113750 1. OCD DRVP calibration OK! DRVP=8
552 00:46:11.113799
553 00:46:11.113846
554 00:46:11.113894
555 00:46:11.113941 K ODTN
556 00:46:11.113988 3. OCD ODTN=0 ,CALOUT=1
557 00:46:11.114040 3. OCD ODTN=1 ,CALOUT=1
558 00:46:11.114089 3. OCD ODTN=2 ,CALOUT=1
559 00:46:11.114138 3. OCD ODTN=3 ,CALOUT=1
560 00:46:11.114185 3. OCD ODTN=4 ,CALOUT=1
561 00:46:11.114278 3. OCD ODTN=5 ,CALOUT=1
562 00:46:11.114327 3. OCD ODTN=6 ,CALOUT=1
563 00:46:11.114377 3. OCD ODTN=7 ,CALOUT=0
564 00:46:11.114425
565 00:46:11.114472 3. OCD ODTN calibration OK! ODTN=7
566 00:46:11.114521
567 00:46:11.114568 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 00:46:11.114616 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 00:46:11.114664 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 00:46:11.114712
571 00:46:11.114759 K DRVP
572 00:46:11.114806 1. OCD DRVP=0 CALOUT=0
573 00:46:11.114854 1. OCD DRVP=1 CALOUT=0
574 00:46:11.114903 1. OCD DRVP=2 CALOUT=0
575 00:46:11.114951 1. OCD DRVP=3 CALOUT=0
576 00:46:11.114999 1. OCD DRVP=4 CALOUT=0
577 00:46:11.115047 1. OCD DRVP=5 CALOUT=0
578 00:46:11.115094 1. OCD DRVP=6 CALOUT=0
579 00:46:11.115143 1. OCD DRVP=7 CALOUT=0
580 00:46:11.115191 1. OCD DRVP=8 CALOUT=0
581 00:46:11.115239 1. OCD DRVP=9 CALOUT=0
582 00:46:11.115287 1. OCD DRVP=10 CALOUT=1
583 00:46:11.115335
584 00:46:11.115565 1. OCD DRVP calibration OK! DRVP=10
585 00:46:11.115623
586 00:46:11.115673
587 00:46:11.115720
588 00:46:11.115767 K ODTN
589 00:46:11.115816 3. OCD ODTN=0 ,CALOUT=1
590 00:46:11.115865 3. OCD ODTN=1 ,CALOUT=1
591 00:46:11.115914 3. OCD ODTN=2 ,CALOUT=1
592 00:46:11.115963 3. OCD ODTN=3 ,CALOUT=1
593 00:46:11.116011 3. OCD ODTN=4 ,CALOUT=1
594 00:46:11.116060 3. OCD ODTN=5 ,CALOUT=1
595 00:46:11.116108 3. OCD ODTN=6 ,CALOUT=1
596 00:46:11.116156 3. OCD ODTN=7 ,CALOUT=1
597 00:46:11.116205 3. OCD ODTN=8 ,CALOUT=1
598 00:46:11.116254 3. OCD ODTN=9 ,CALOUT=1
599 00:46:11.116303 3. OCD ODTN=10 ,CALOUT=1
600 00:46:11.116351 3. OCD ODTN=11 ,CALOUT=1
601 00:46:11.116399 3. OCD ODTN=12 ,CALOUT=1
602 00:46:11.116448 3. OCD ODTN=13 ,CALOUT=1
603 00:46:11.116496 3. OCD ODTN=14 ,CALOUT=1
604 00:46:11.116545 3. OCD ODTN=15 ,CALOUT=0
605 00:46:11.116593
606 00:46:11.116641 3. OCD ODTN calibration OK! ODTN=15
607 00:46:11.116690
608 00:46:11.116737 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 00:46:11.116785 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 00:46:11.116834 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 00:46:11.116882
612 00:46:11.116929 [DramcInit]
613 00:46:11.116976 AutoRefreshCKEOff AutoREF OFF
614 00:46:11.117023 DDRPhyPLLSetting-CKEOFF
615 00:46:11.117070 DDRPhyPLLSetting-CKEON
616 00:46:11.117117
617 00:46:11.117164 Enable WDQS
618 00:46:11.117211 ==
619 00:46:11.117266 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 00:46:11.117315 fsp= 1, odt_onoff= 1, Byte mode= 0
621 00:46:11.117364 ==
622 00:46:11.117412 [Duty_Offset_Calibration]
623 00:46:11.117459
624 00:46:11.117507 ===========================
625 00:46:11.117555 B0:1 B1:0 CA:0
626 00:46:11.117602 ==
627 00:46:11.117649 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 00:46:11.117697 fsp= 1, odt_onoff= 1, Byte mode= 0
629 00:46:11.117744 ==
630 00:46:11.117792 [Duty_Offset_Calibration]
631 00:46:11.117840
632 00:46:11.117887 ===========================
633 00:46:11.117935 B0:1 B1:0 CA:-1
634 00:46:11.117982 [ModeRegInit_LP4] CH0 RK0
635 00:46:11.118030 Write Rank0 MR13 =0x18
636 00:46:11.118077 Write Rank0 MR12 =0x5d
637 00:46:11.118124 Write Rank0 MR1 =0x56
638 00:46:11.118171 Write Rank0 MR2 =0x1a
639 00:46:11.118224 Write Rank0 MR11 =0x0
640 00:46:11.118273 Write Rank0 MR22 =0x38
641 00:46:11.118320 Write Rank0 MR14 =0x5d
642 00:46:11.118368 Write Rank0 MR3 =0x30
643 00:46:11.118415 Write Rank0 MR13 =0x58
644 00:46:11.118462 Write Rank0 MR12 =0x5d
645 00:46:11.118510 Write Rank0 MR1 =0x56
646 00:46:11.118556 Write Rank0 MR2 =0x2d
647 00:46:11.118603 Write Rank0 MR11 =0x23
648 00:46:11.118650 Write Rank0 MR22 =0x34
649 00:46:11.118697 Write Rank0 MR14 =0x10
650 00:46:11.118744 Write Rank0 MR3 =0x30
651 00:46:11.118792 Write Rank0 MR13 =0xd8
652 00:46:11.118840 [ModeRegInit_LP4] CH0 RK1
653 00:46:11.118887 Write Rank1 MR13 =0x18
654 00:46:11.118934 Write Rank1 MR12 =0x5d
655 00:46:11.118982 Write Rank1 MR1 =0x56
656 00:46:11.119029 Write Rank1 MR2 =0x1a
657 00:46:11.119076 Write Rank1 MR11 =0x0
658 00:46:11.119122 Write Rank1 MR22 =0x38
659 00:46:11.119169 Write Rank1 MR14 =0x5d
660 00:46:11.119216 Write Rank1 MR3 =0x30
661 00:46:11.119263 Write Rank1 MR13 =0x58
662 00:46:11.119311 Write Rank1 MR12 =0x5d
663 00:46:11.119357 Write Rank1 MR1 =0x56
664 00:46:11.119404 Write Rank1 MR2 =0x2d
665 00:46:11.119451 Write Rank1 MR11 =0x23
666 00:46:11.119499 Write Rank1 MR22 =0x34
667 00:46:11.119546 Write Rank1 MR14 =0x10
668 00:46:11.119593 Write Rank1 MR3 =0x30
669 00:46:11.119640 Write Rank1 MR13 =0xd8
670 00:46:11.119687 [ModeRegInit_LP4] CH1 RK0
671 00:46:11.119734 Write Rank0 MR13 =0x18
672 00:46:11.119781 Write Rank0 MR12 =0x5d
673 00:46:11.119829 Write Rank0 MR1 =0x56
674 00:46:11.119876 Write Rank0 MR2 =0x1a
675 00:46:11.119923 Write Rank0 MR11 =0x0
676 00:46:11.119970 Write Rank0 MR22 =0x38
677 00:46:11.120016 Write Rank0 MR14 =0x5d
678 00:46:11.120063 Write Rank0 MR3 =0x30
679 00:46:11.120110 Write Rank0 MR13 =0x58
680 00:46:11.120157 Write Rank0 MR12 =0x5d
681 00:46:11.120205 Write Rank0 MR1 =0x56
682 00:46:11.120252 Write Rank0 MR2 =0x2d
683 00:46:11.120299 Write Rank0 MR11 =0x23
684 00:46:11.120346 Write Rank0 MR22 =0x34
685 00:46:11.120393 Write Rank0 MR14 =0x10
686 00:46:11.120440 Write Rank0 MR3 =0x30
687 00:46:11.120487 Write Rank0 MR13 =0xd8
688 00:46:11.120534 [ModeRegInit_LP4] CH1 RK1
689 00:46:11.120581 Write Rank1 MR13 =0x18
690 00:46:11.120628 Write Rank1 MR12 =0x5d
691 00:46:11.120675 Write Rank1 MR1 =0x56
692 00:46:11.120722 Write Rank1 MR2 =0x1a
693 00:46:11.120769 Write Rank1 MR11 =0x0
694 00:46:11.120815 Write Rank1 MR22 =0x38
695 00:46:11.120863 Write Rank1 MR14 =0x5d
696 00:46:11.120909 Write Rank1 MR3 =0x30
697 00:46:11.120956 Write Rank1 MR13 =0x58
698 00:46:11.121004 Write Rank1 MR12 =0x5d
699 00:46:11.121050 Write Rank1 MR1 =0x56
700 00:46:11.121097 Write Rank1 MR2 =0x2d
701 00:46:11.121144 Write Rank1 MR11 =0x23
702 00:46:11.121191 Write Rank1 MR22 =0x34
703 00:46:11.121239 Write Rank1 MR14 =0x10
704 00:46:11.121286 Write Rank1 MR3 =0x30
705 00:46:11.121334 Write Rank1 MR13 =0xd8
706 00:46:11.121381 match AC timing 3
707 00:46:11.121428 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 00:46:11.121477 DramC Write-DBI off
709 00:46:11.121524 DramC Read-DBI off
710 00:46:11.121572 Write Rank0 MR13 =0x59
711 00:46:11.121619 ==
712 00:46:11.121666 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 00:46:11.121714 fsp= 1, odt_onoff= 1, Byte mode= 0
714 00:46:11.121762 ==
715 00:46:11.121810 === u2Vref_new: 0x56 --> 0x2d
716 00:46:11.121858 === u2Vref_new: 0x58 --> 0x38
717 00:46:11.121905 === u2Vref_new: 0x5a --> 0x39
718 00:46:11.121953 === u2Vref_new: 0x5c --> 0x3c
719 00:46:11.122001 === u2Vref_new: 0x5e --> 0x3d
720 00:46:11.122047 === u2Vref_new: 0x60 --> 0xa0
721 00:46:11.122095 [CA 0] Center 33 (4~63) winsize 60
722 00:46:11.122142 [CA 1] Center 34 (5~63) winsize 59
723 00:46:11.122190 [CA 2] Center 27 (0~55) winsize 56
724 00:46:11.122245 [CA 3] Center 23 (-4~51) winsize 56
725 00:46:11.122293 [CA 4] Center 24 (-3~52) winsize 56
726 00:46:11.122342 [CA 5] Center 28 (-1~58) winsize 60
727 00:46:11.122389
728 00:46:11.122436 [CATrainingPosCal] consider 1 rank data
729 00:46:11.122484 u2DelayCellTimex100 = 762/100 ps
730 00:46:11.122532 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
731 00:46:11.122579 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
732 00:46:11.122626 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
733 00:46:11.122674 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
734 00:46:11.122722 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
735 00:46:11.122770 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
736 00:46:11.122817
737 00:46:11.122864 CA PerBit enable=1, Macro0, CA PI delay=23
738 00:46:11.122912 === u2Vref_new: 0x58 --> 0x38
739 00:46:11.122959
740 00:46:11.123005 Vref(ca) range 1: 24
741 00:46:11.123099
742 00:46:11.123149 CS Dly= 11 (42-0-32)
743 00:46:11.123197 Write Rank0 MR13 =0xd8
744 00:46:11.123245 Write Rank0 MR13 =0xd8
745 00:46:11.123292 Write Rank0 MR12 =0x58
746 00:46:11.123340 Write Rank1 MR13 =0x59
747 00:46:11.123386 ==
748 00:46:11.123635 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 00:46:11.123690 fsp= 1, odt_onoff= 1, Byte mode= 0
750 00:46:11.123739 ==
751 00:46:11.123788 === u2Vref_new: 0x56 --> 0x2d
752 00:46:11.123837 === u2Vref_new: 0x58 --> 0x38
753 00:46:11.123884 === u2Vref_new: 0x5a --> 0x39
754 00:46:11.123932 === u2Vref_new: 0x5c --> 0x3c
755 00:46:11.123980 === u2Vref_new: 0x5e --> 0x3d
756 00:46:11.124028 === u2Vref_new: 0x60 --> 0xa0
757 00:46:11.124076 [CA 0] Center 34 (5~63) winsize 59
758 00:46:11.124124 [CA 1] Center 34 (5~63) winsize 59
759 00:46:11.124172 [CA 2] Center 28 (0~56) winsize 57
760 00:46:11.124234 [CA 3] Center 23 (-4~51) winsize 56
761 00:46:11.124283 [CA 4] Center 24 (-3~52) winsize 56
762 00:46:11.124332 [CA 5] Center 29 (1~58) winsize 58
763 00:46:11.124379
764 00:46:11.124427 [CATrainingPosCal] consider 2 rank data
765 00:46:11.124476 u2DelayCellTimex100 = 762/100 ps
766 00:46:11.124524 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
767 00:46:11.124571 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
768 00:46:11.124619 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
769 00:46:11.124667 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 00:46:11.124715 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
771 00:46:11.124764 CA5 delay=29 (1~58),Diff = 6 PI (7 cell)
772 00:46:11.124811
773 00:46:11.124859 CA PerBit enable=1, Macro0, CA PI delay=23
774 00:46:11.124907 === u2Vref_new: 0x56 --> 0x2d
775 00:46:11.124955
776 00:46:11.125002 Vref(ca) range 1: 22
777 00:46:11.125049
778 00:46:11.125095 CS Dly= 7 (38-0-32)
779 00:46:11.125144 Write Rank1 MR13 =0xd8
780 00:46:11.125192 Write Rank1 MR13 =0xd8
781 00:46:11.125239 Write Rank1 MR12 =0x56
782 00:46:11.125287 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 00:46:11.125334 Write Rank0 MR2 =0xad
784 00:46:11.125381 [Write Leveling]
785 00:46:11.125430 delay byte0 byte1 byte2 byte3
786 00:46:11.125477
787 00:46:11.125524 10 0 0
788 00:46:11.125573 11 0 0
789 00:46:11.125621 12 0 0
790 00:46:11.125669 13 0 0
791 00:46:11.125717 14 0 0
792 00:46:11.125766 15 0 0
793 00:46:11.125814 16 0 0
794 00:46:11.125862 17 0 0
795 00:46:11.125910 18 0 0
796 00:46:11.125958 19 0 0
797 00:46:11.126006 20 0 0
798 00:46:11.126054 21 0 0
799 00:46:11.126102 22 0 0
800 00:46:11.126150 23 0 0
801 00:46:11.126198 24 0 0
802 00:46:11.126286 25 0 0
803 00:46:11.126335 26 0 0
804 00:46:11.126383 27 0 0
805 00:46:11.126431 28 0 0
806 00:46:11.126479 29 0 ff
807 00:46:11.126527 30 0 ff
808 00:46:11.126575 31 0 ff
809 00:46:11.126623 32 0 ff
810 00:46:11.126672 33 0 ff
811 00:46:11.126720 34 ff ff
812 00:46:11.126768 35 ff ff
813 00:46:11.126817 36 ff ff
814 00:46:11.126866 37 ff ff
815 00:46:11.126914 38 ff ff
816 00:46:11.126962 39 ff ff
817 00:46:11.127010 40 ff ff
818 00:46:11.127076 pass bytecount = 0xff (0xff: all bytes pass)
819 00:46:11.127137
820 00:46:11.127214 DQS0 dly: 34
821 00:46:11.127265 DQS1 dly: 29
822 00:46:11.127313 Write Rank0 MR2 =0x2d
823 00:46:11.127362 [RankSwap] Rank num 2, (Multi 1), Rank 0
824 00:46:11.127410 Write Rank0 MR1 =0xd6
825 00:46:11.127457 [Gating]
826 00:46:11.127504 ==
827 00:46:11.127553 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
828 00:46:11.127602 fsp= 1, odt_onoff= 1, Byte mode= 0
829 00:46:11.127650 ==
830 00:46:11.127698 3 1 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
831 00:46:11.127747 3 1 4 |3534 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
832 00:46:11.127795 3 1 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
833 00:46:11.127845 3 1 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
834 00:46:11.127893 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
835 00:46:11.127942 3 1 20 |3534 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
836 00:46:11.127990 3 1 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
837 00:46:11.128039 3 1 28 |3534 2c2c |(11 11)(11 11) |(0 1)(0 1)| 0
838 00:46:11.128087 3 2 0 |2726 201f |(11 11)(11 11) |(1 1)(1 1)| 0
839 00:46:11.128136 3 2 4 |3d3d c0c |(11 11)(11 11) |(1 1)(1 1)| 0
840 00:46:11.128184 3 2 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
841 00:46:11.128234 3 2 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
842 00:46:11.128283 3 2 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
843 00:46:11.128332 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 00:46:11.128380 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 00:46:11.128429 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 00:46:11.128477 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:46:11.128526 3 3 4 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
848 00:46:11.128575 3 3 8 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 00:46:11.128624 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
850 00:46:11.128673 [Byte 0] Lead/lag Transition tap number (1)
851 00:46:11.128721 [Byte 1] Lead/lag falling Transition (3, 3, 12)
852 00:46:11.128769 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 00:46:11.128818 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 00:46:11.128866 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 00:46:11.128914 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 00:46:11.128963 3 4 0 |1716 807 |(11 11)(11 11) |(1 1)(0 1)| 0
857 00:46:11.129012 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
858 00:46:11.129060 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:46:11.129108 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:46:11.129157 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:46:11.129205 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:46:11.129254 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:46:11.129303 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:46:11.129352 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:46:11.129400 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:46:11.129448 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:46:11.129496 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:46:11.129544 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:46:11.129592 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 00:46:11.129641 [Byte 0] Lead/lag falling Transition (3, 5, 20)
871 00:46:11.129689 [Byte 1] Lead/lag falling Transition (3, 5, 20)
872 00:46:11.129928 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
873 00:46:11.129986 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
874 00:46:11.130036 [Byte 0] Lead/lag Transition tap number (3)
875 00:46:11.130085 [Byte 1] Lead/lag Transition tap number (3)
876 00:46:11.130134 3 6 0 |4646 1918 |(10 10)(11 11) |(0 0)(0 0)| 0
877 00:46:11.130183 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
878 00:46:11.130254 [Byte 0]First pass (3, 6, 4)
879 00:46:11.130318 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 00:46:11.130366 [Byte 1]First pass (3, 6, 8)
881 00:46:11.130414 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 00:46:11.130463 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:46:11.130512 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:46:11.130561 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:46:11.130610 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:46:11.130658 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:46:11.130707 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:46:11.130756 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 00:46:11.130804 All bytes gating window > 1UI, Early break!
890 00:46:11.130852
891 00:46:11.130900 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
892 00:46:11.130947
893 00:46:11.130994 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
894 00:46:11.131043
895 00:46:11.131090
896 00:46:11.131138
897 00:46:11.131185 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
898 00:46:11.131232
899 00:46:11.131280 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
900 00:46:11.131327
901 00:46:11.131374
902 00:46:11.131422 Write Rank0 MR1 =0x56
903 00:46:11.131469
904 00:46:11.131516 best RODT dly(2T, 0.5T) = (2, 2)
905 00:46:11.131563
906 00:46:11.131610 best RODT dly(2T, 0.5T) = (2, 2)
907 00:46:11.131657 ==
908 00:46:11.131704 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
909 00:46:11.131752 fsp= 1, odt_onoff= 1, Byte mode= 0
910 00:46:11.131799 ==
911 00:46:11.131847 Start DQ dly to find pass range UseTestEngine =0
912 00:46:11.131895 x-axis: bit #, y-axis: DQ dly (-127~63)
913 00:46:11.131943 RX Vref Scan = 0
914 00:46:11.131991 -26, [0] xxxxxxxx xxxxxxxx [MSB]
915 00:46:11.132039 -25, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:46:11.132088 -24, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:46:11.132136 -23, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:46:11.132185 -22, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:46:11.132233 -21, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:46:11.132281 -20, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:46:11.132330 -19, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:46:11.132378 -18, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:46:11.132426 -17, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:46:11.132474 -16, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:46:11.132523 -15, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:46:11.132571 -14, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:46:11.132620 -13, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:46:11.132669 -12, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:46:11.132717 -11, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:46:11.132765 -10, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:46:11.132814 -9, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:46:11.132862 -8, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:46:11.132911 -7, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:46:11.132960 -6, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:46:11.133008 -5, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:46:11.133057 -4, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:46:11.133105 -3, [0] xxxoxxxx xxxxxxxx [MSB]
938 00:46:11.133153 -2, [0] xxxoxxxx xxxxxxxx [MSB]
939 00:46:11.133202 -1, [0] xxxoxoxx xxxxxoxx [MSB]
940 00:46:11.133250 0, [0] xxxoxoxo xxxxxoxx [MSB]
941 00:46:11.133298 1, [0] xxxoxooo ooxoooxx [MSB]
942 00:46:11.133347 2, [0] xxxoxooo ooxoooxx [MSB]
943 00:46:11.133395 3, [0] xxxoxooo ooxooooo [MSB]
944 00:46:11.133443 4, [0] xxxoxooo ooxooooo [MSB]
945 00:46:11.133492 5, [0] xooooooo oooooooo [MSB]
946 00:46:11.133540 6, [0] xooooooo oooooooo [MSB]
947 00:46:11.133588 31, [0] oooxoooo oooooooo [MSB]
948 00:46:11.133637 32, [0] oooxoooo oooooooo [MSB]
949 00:46:11.133686 33, [0] oooxoxxo oooooooo [MSB]
950 00:46:11.133735 34, [0] oooxoxxo ooooooxo [MSB]
951 00:46:11.133783 35, [0] oooxoxxo xooxooxo [MSB]
952 00:46:11.133831 36, [0] oooxoxxo xooxooxo [MSB]
953 00:46:11.133880 37, [0] oooxoxxx xooxxxxo [MSB]
954 00:46:11.133928 38, [0] oooxoxxx xooxxxxx [MSB]
955 00:46:11.133977 39, [0] oooxxxxx xxoxxxxx [MSB]
956 00:46:11.134025 40, [0] oxoxxxxx xxoxxxxx [MSB]
957 00:46:11.134074 41, [0] oxxxxxxx xxxxxxxx [MSB]
958 00:46:11.134121 42, [0] xxxxxxxx xxxxxxxx [MSB]
959 00:46:11.134169 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
960 00:46:11.134221 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
961 00:46:11.134335 iDelay=42, Bit 2, Center 22 (5 ~ 40) 36
962 00:46:11.134382 iDelay=42, Bit 3, Center 13 (-3 ~ 30) 34
963 00:46:11.134430 iDelay=42, Bit 4, Center 21 (5 ~ 38) 34
964 00:46:11.134478 iDelay=42, Bit 5, Center 15 (-1 ~ 32) 34
965 00:46:11.134526 iDelay=42, Bit 6, Center 16 (1 ~ 32) 32
966 00:46:11.134574 iDelay=42, Bit 7, Center 18 (0 ~ 36) 37
967 00:46:11.134621 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
968 00:46:11.134668 iDelay=42, Bit 9, Center 19 (1 ~ 38) 38
969 00:46:11.134715 iDelay=42, Bit 10, Center 22 (5 ~ 40) 36
970 00:46:11.134763 iDelay=42, Bit 11, Center 17 (1 ~ 34) 34
971 00:46:11.134809 iDelay=42, Bit 12, Center 18 (1 ~ 36) 36
972 00:46:11.134857 iDelay=42, Bit 13, Center 17 (-1 ~ 36) 38
973 00:46:11.134904 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
974 00:46:11.134951 iDelay=42, Bit 15, Center 20 (3 ~ 37) 35
975 00:46:11.134999 ==
976 00:46:11.135047 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 00:46:11.135095 fsp= 1, odt_onoff= 1, Byte mode= 0
978 00:46:11.135143 ==
979 00:46:11.135191 DQS Delay:
980 00:46:11.135238 DQS0 = 0, DQS1 = 0
981 00:46:11.135285 DQM Delay:
982 00:46:11.135333 DQM0 = 18, DQM1 = 18
983 00:46:11.135380 DQ Delay:
984 00:46:11.135428 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =13
985 00:46:11.135476 DQ4 =21, DQ5 =15, DQ6 =16, DQ7 =18
986 00:46:11.135523 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
987 00:46:11.135571 DQ12 =18, DQ13 =17, DQ14 =18, DQ15 =20
988 00:46:11.135618
989 00:46:11.135665
990 00:46:11.135712 DramC Write-DBI off
991 00:46:11.135759 ==
992 00:46:11.135806 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
993 00:46:11.135854 fsp= 1, odt_onoff= 1, Byte mode= 0
994 00:46:11.135901 ==
995 00:46:11.135949 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
996 00:46:11.135997
997 00:46:11.136044 Begin, DQ Scan Range 925~1181
998 00:46:11.136091
999 00:46:11.136138
1000 00:46:11.136185 TX Vref Scan disable
1001 00:46:11.136232 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1002 00:46:11.136281 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1003 00:46:11.136527 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1004 00:46:11.136584 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1005 00:46:11.136635 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:46:11.136684 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:46:11.136733 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:46:11.136782 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:46:11.136832 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:46:11.136882 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:46:11.136931 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:46:11.136980 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:46:11.137028 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:46:11.137077 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:46:11.137127 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:46:11.137176 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:46:11.137226 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:46:11.137275 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:46:11.137323 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:46:11.137372 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:46:11.137421 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:46:11.137473 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:46:11.137523 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:46:11.137572 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:46:11.137621 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:46:11.137670 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:46:11.137719 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:46:11.137768 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:46:11.137816 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:46:11.137865 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:46:11.137915 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:46:11.137963 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:46:11.138012 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:46:11.138060 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:46:11.138109 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:46:11.138157 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:46:11.138206 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:46:11.138264 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:46:11.138312 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:46:11.138360 964 |3 6 4|[0] xxxxxxxx oxxxxxxx [MSB]
1041 00:46:11.138409 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1042 00:46:11.138458 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1043 00:46:11.138506 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1044 00:46:11.138555 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1045 00:46:11.138604 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1046 00:46:11.138652 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1047 00:46:11.138702 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1048 00:46:11.138750 972 |3 6 12|[0] xxxoxoxx oooooooo [MSB]
1049 00:46:11.138799 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1050 00:46:11.138848 974 |3 6 14|[0] xxxoxooo oooooooo [MSB]
1051 00:46:11.138897 975 |3 6 15|[0] xxxoxooo oooooooo [MSB]
1052 00:46:11.138946 976 |3 6 16|[0] xooooooo oooooooo [MSB]
1053 00:46:11.138994 989 |3 6 29|[0] oooooooo xooooooo [MSB]
1054 00:46:11.139043 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1055 00:46:11.139091 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1056 00:46:11.139140 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1057 00:46:11.139189 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1058 00:46:11.139238 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1059 00:46:11.139286 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1060 00:46:11.139335 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1061 00:46:11.139384 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1062 00:46:11.139433 Byte0, DQ PI dly=984, DQM PI dly= 984
1063 00:46:11.139481 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1064 00:46:11.139529
1065 00:46:11.139577 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1066 00:46:11.139625
1067 00:46:11.139672 Byte1, DQ PI dly=977, DQM PI dly= 977
1068 00:46:11.139720 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1069 00:46:11.139767
1070 00:46:11.139814 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1071 00:46:11.139862
1072 00:46:11.139908 ==
1073 00:46:11.139955 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1074 00:46:11.140003 fsp= 1, odt_onoff= 1, Byte mode= 0
1075 00:46:11.140050 ==
1076 00:46:11.140097 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1077 00:46:11.140144
1078 00:46:11.140191 Begin, DQ Scan Range 953~1017
1079 00:46:11.140239 Write Rank0 MR14 =0x0
1080 00:46:11.140286
1081 00:46:11.140334 CH=0, VrefRange= 0, VrefLevel = 0
1082 00:46:11.140382 TX Bit0 (978~996) 19 987, Bit8 (967~984) 18 975,
1083 00:46:11.140430 TX Bit1 (977~993) 17 985, Bit9 (967~986) 20 976,
1084 00:46:11.140478 TX Bit2 (977~995) 19 986, Bit10 (972~990) 19 981,
1085 00:46:11.140527 TX Bit3 (972~990) 19 981, Bit11 (967~985) 19 976,
1086 00:46:11.140574 TX Bit4 (977~995) 19 986, Bit12 (968~987) 20 977,
1087 00:46:11.140639 TX Bit5 (975~990) 16 982, Bit13 (968~984) 17 976,
1088 00:46:11.140689 TX Bit6 (976~991) 16 983, Bit14 (968~985) 18 976,
1089 00:46:11.140738 TX Bit7 (976~992) 17 984, Bit15 (970~989) 20 979,
1090 00:46:11.140785
1091 00:46:11.140832 Write Rank0 MR14 =0x2
1092 00:46:11.140880
1093 00:46:11.140928 CH=0, VrefRange= 0, VrefLevel = 2
1094 00:46:11.140976 TX Bit0 (978~997) 20 987, Bit8 (966~985) 20 975,
1095 00:46:11.141023 TX Bit1 (978~994) 17 986, Bit9 (967~987) 21 977,
1096 00:46:11.141071 TX Bit2 (977~996) 20 986, Bit10 (971~990) 20 980,
1097 00:46:11.141118 TX Bit3 (972~990) 19 981, Bit11 (967~986) 20 976,
1098 00:46:11.141166 TX Bit4 (977~996) 20 986, Bit12 (968~987) 20 977,
1099 00:46:11.141214 TX Bit5 (975~990) 16 982, Bit13 (968~985) 18 976,
1100 00:46:11.141262 TX Bit6 (976~991) 16 983, Bit14 (968~986) 19 977,
1101 00:46:11.141310 TX Bit7 (976~993) 18 984, Bit15 (970~989) 20 979,
1102 00:46:11.141358
1103 00:46:11.141405 Write Rank0 MR14 =0x4
1104 00:46:11.141452
1105 00:46:11.141499 CH=0, VrefRange= 0, VrefLevel = 4
1106 00:46:11.141546 TX Bit0 (977~997) 21 987, Bit8 (966~985) 20 975,
1107 00:46:11.141595 TX Bit1 (977~995) 19 986, Bit9 (967~988) 22 977,
1108 00:46:11.141643 TX Bit2 (977~995) 19 986, Bit10 (970~991) 22 980,
1109 00:46:11.141690 TX Bit3 (971~990) 20 980, Bit11 (967~986) 20 976,
1110 00:46:11.141928 TX Bit4 (976~996) 21 986, Bit12 (968~988) 21 978,
1111 00:46:11.141983 TX Bit5 (975~990) 16 982, Bit13 (968~986) 19 977,
1112 00:46:11.142032 TX Bit6 (975~991) 17 983, Bit14 (968~987) 20 977,
1113 00:46:11.142080 TX Bit7 (976~993) 18 984, Bit15 (969~989) 21 979,
1114 00:46:11.142128
1115 00:46:11.142175 Write Rank0 MR14 =0x6
1116 00:46:11.142248
1117 00:46:11.142310 CH=0, VrefRange= 0, VrefLevel = 6
1118 00:46:11.142358 TX Bit0 (978~998) 21 988, Bit8 (966~985) 20 975,
1119 00:46:11.142407 TX Bit1 (977~995) 19 986, Bit9 (967~989) 23 978,
1120 00:46:11.142454 TX Bit2 (977~997) 21 987, Bit10 (970~991) 22 980,
1121 00:46:11.142502 TX Bit3 (971~990) 20 980, Bit11 (967~987) 21 977,
1122 00:46:11.142550 TX Bit4 (977~997) 21 987, Bit12 (967~988) 22 977,
1123 00:46:11.142599 TX Bit5 (975~991) 17 983, Bit13 (967~987) 21 977,
1124 00:46:11.142647 TX Bit6 (975~991) 17 983, Bit14 (967~988) 22 977,
1125 00:46:11.142695 TX Bit7 (976~994) 19 985, Bit15 (969~990) 22 979,
1126 00:46:11.142743
1127 00:46:11.142790 Write Rank0 MR14 =0x8
1128 00:46:11.142838
1129 00:46:11.142885 CH=0, VrefRange= 0, VrefLevel = 8
1130 00:46:11.142932 TX Bit0 (977~998) 22 987, Bit8 (966~986) 21 976,
1131 00:46:11.142981 TX Bit1 (977~996) 20 986, Bit9 (967~989) 23 978,
1132 00:46:11.143029 TX Bit2 (977~997) 21 987, Bit10 (970~991) 22 980,
1133 00:46:11.143077 TX Bit3 (970~991) 22 980, Bit11 (966~988) 23 977,
1134 00:46:11.143125 TX Bit4 (976~997) 22 986, Bit12 (967~989) 23 978,
1135 00:46:11.143173 TX Bit5 (974~991) 18 982, Bit13 (967~987) 21 977,
1136 00:46:11.143221 TX Bit6 (975~992) 18 983, Bit14 (967~988) 22 977,
1137 00:46:11.143269 TX Bit7 (975~995) 21 985, Bit15 (969~990) 22 979,
1138 00:46:11.143316
1139 00:46:11.143363 Write Rank0 MR14 =0xa
1140 00:46:11.143410
1141 00:46:11.143458 CH=0, VrefRange= 0, VrefLevel = 10
1142 00:46:11.143507 TX Bit0 (977~998) 22 987, Bit8 (966~987) 22 976,
1143 00:46:11.143555 TX Bit1 (977~996) 20 986, Bit9 (967~989) 23 978,
1144 00:46:11.143603 TX Bit2 (977~997) 21 987, Bit10 (969~992) 24 980,
1145 00:46:11.143650 TX Bit3 (970~991) 22 980, Bit11 (966~988) 23 977,
1146 00:46:11.143699 TX Bit4 (976~998) 23 987, Bit12 (967~989) 23 978,
1147 00:46:11.143747 TX Bit5 (974~991) 18 982, Bit13 (967~987) 21 977,
1148 00:46:11.143794 TX Bit6 (974~992) 19 983, Bit14 (967~989) 23 978,
1149 00:46:11.143842 TX Bit7 (975~996) 22 985, Bit15 (969~990) 22 979,
1150 00:46:11.143890
1151 00:46:11.143937 Write Rank0 MR14 =0xc
1152 00:46:11.143984
1153 00:46:11.144030 CH=0, VrefRange= 0, VrefLevel = 12
1154 00:46:11.144078 TX Bit0 (977~998) 22 987, Bit8 (965~988) 24 976,
1155 00:46:11.144126 TX Bit1 (977~997) 21 987, Bit9 (966~989) 24 977,
1156 00:46:11.144173 TX Bit2 (977~998) 22 987, Bit10 (969~992) 24 980,
1157 00:46:11.144221 TX Bit3 (969~991) 23 980, Bit11 (966~989) 24 977,
1158 00:46:11.144269 TX Bit4 (976~998) 23 987, Bit12 (967~989) 23 978,
1159 00:46:11.144316 TX Bit5 (973~992) 20 982, Bit13 (967~988) 22 977,
1160 00:46:11.144364 TX Bit6 (974~993) 20 983, Bit14 (967~989) 23 978,
1161 00:46:11.144412 TX Bit7 (975~996) 22 985, Bit15 (968~990) 23 979,
1162 00:46:11.144459
1163 00:46:11.144506 Write Rank0 MR14 =0xe
1164 00:46:11.144553
1165 00:46:11.144600 CH=0, VrefRange= 0, VrefLevel = 14
1166 00:46:11.144647 TX Bit0 (977~999) 23 988, Bit8 (965~987) 23 976,
1167 00:46:11.144694 TX Bit1 (976~997) 22 986, Bit9 (966~990) 25 978,
1168 00:46:11.144742 TX Bit2 (976~998) 23 987, Bit10 (969~992) 24 980,
1169 00:46:11.144790 TX Bit3 (969~992) 24 980, Bit11 (965~989) 25 977,
1170 00:46:11.144838 TX Bit4 (976~998) 23 987, Bit12 (967~989) 23 978,
1171 00:46:11.144886 TX Bit5 (973~992) 20 982, Bit13 (967~989) 23 978,
1172 00:46:11.144934 TX Bit6 (974~993) 20 983, Bit14 (967~989) 23 978,
1173 00:46:11.144981 TX Bit7 (974~997) 24 985, Bit15 (968~991) 24 979,
1174 00:46:11.145028
1175 00:46:11.145074 Write Rank0 MR14 =0x10
1176 00:46:11.145121
1177 00:46:11.145169 CH=0, VrefRange= 0, VrefLevel = 16
1178 00:46:11.145217 TX Bit0 (977~999) 23 988, Bit8 (964~988) 25 976,
1179 00:46:11.145265 TX Bit1 (976~998) 23 987, Bit9 (966~990) 25 978,
1180 00:46:11.145313 TX Bit2 (976~998) 23 987, Bit10 (969~993) 25 981,
1181 00:46:11.145360 TX Bit3 (969~992) 24 980, Bit11 (965~989) 25 977,
1182 00:46:11.145408 TX Bit4 (975~998) 24 986, Bit12 (966~990) 25 978,
1183 00:46:11.145456 TX Bit5 (972~993) 22 982, Bit13 (967~989) 23 978,
1184 00:46:11.145502 TX Bit6 (974~994) 21 984, Bit14 (966~990) 25 978,
1185 00:46:11.145550 TX Bit7 (974~997) 24 985, Bit15 (968~991) 24 979,
1186 00:46:11.145598
1187 00:46:11.145645 Write Rank0 MR14 =0x12
1188 00:46:11.145692
1189 00:46:11.145739 CH=0, VrefRange= 0, VrefLevel = 18
1190 00:46:11.145787 TX Bit0 (977~999) 23 988, Bit8 (964~989) 26 976,
1191 00:46:11.145836 TX Bit1 (976~998) 23 987, Bit9 (965~990) 26 977,
1192 00:46:11.145884 TX Bit2 (976~999) 24 987, Bit10 (969~993) 25 981,
1193 00:46:11.145932 TX Bit3 (969~992) 24 980, Bit11 (965~990) 26 977,
1194 00:46:11.145980 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1195 00:46:11.146028 TX Bit5 (972~993) 22 982, Bit13 (966~989) 24 977,
1196 00:46:11.146076 TX Bit6 (973~994) 22 983, Bit14 (965~990) 26 977,
1197 00:46:11.146124 TX Bit7 (973~998) 26 985, Bit15 (968~991) 24 979,
1198 00:46:11.146171
1199 00:46:11.146222 Write Rank0 MR14 =0x14
1200 00:46:11.146308
1201 00:46:11.146355 CH=0, VrefRange= 0, VrefLevel = 20
1202 00:46:11.146402 TX Bit0 (976~1000) 25 988, Bit8 (963~989) 27 976,
1203 00:46:11.146450 TX Bit1 (976~998) 23 987, Bit9 (965~990) 26 977,
1204 00:46:11.146497 TX Bit2 (976~999) 24 987, Bit10 (969~993) 25 981,
1205 00:46:11.146545 TX Bit3 (968~993) 26 980, Bit11 (964~989) 26 976,
1206 00:46:11.146593 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1207 00:46:11.146645 TX Bit5 (971~994) 24 982, Bit13 (966~989) 24 977,
1208 00:46:11.146745 TX Bit6 (972~995) 24 983, Bit14 (966~990) 25 978,
1209 00:46:11.146986 TX Bit7 (973~998) 26 985, Bit15 (968~992) 25 980,
1210 00:46:11.147043
1211 00:46:11.147093 Write Rank0 MR14 =0x16
1212 00:46:11.147141
1213 00:46:11.147189 CH=0, VrefRange= 0, VrefLevel = 22
1214 00:46:11.147238 TX Bit0 (976~1000) 25 988, Bit8 (964~989) 26 976,
1215 00:46:11.147286 TX Bit1 (976~998) 23 987, Bit9 (966~990) 25 978,
1216 00:46:11.147335 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1217 00:46:11.147383 TX Bit3 (968~993) 26 980, Bit11 (964~990) 27 977,
1218 00:46:11.147431 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1219 00:46:11.147481 TX Bit5 (971~994) 24 982, Bit13 (966~989) 24 977,
1220 00:46:11.147529 TX Bit6 (972~996) 25 984, Bit14 (966~990) 25 978,
1221 00:46:11.147578 TX Bit7 (972~998) 27 985, Bit15 (968~992) 25 980,
1222 00:46:11.147625
1223 00:46:11.147672 Write Rank0 MR14 =0x18
1224 00:46:11.147720
1225 00:46:11.147767 CH=0, VrefRange= 0, VrefLevel = 24
1226 00:46:11.147815 TX Bit0 (976~1000) 25 988, Bit8 (963~989) 27 976,
1227 00:46:11.147863 TX Bit1 (976~999) 24 987, Bit9 (966~989) 24 977,
1228 00:46:11.147911 TX Bit2 (976~999) 24 987, Bit10 (968~992) 25 980,
1229 00:46:11.147959 TX Bit3 (969~992) 24 980, Bit11 (964~989) 26 976,
1230 00:46:11.148008 TX Bit4 (975~999) 25 987, Bit12 (965~990) 26 977,
1231 00:46:11.148056 TX Bit5 (970~995) 26 982, Bit13 (965~989) 25 977,
1232 00:46:11.148104 TX Bit6 (971~996) 26 983, Bit14 (966~990) 25 978,
1233 00:46:11.148153 TX Bit7 (972~997) 26 984, Bit15 (967~991) 25 979,
1234 00:46:11.148200
1235 00:46:11.148247 Write Rank0 MR14 =0x1a
1236 00:46:11.148294
1237 00:46:11.148341 CH=0, VrefRange= 0, VrefLevel = 26
1238 00:46:11.148389 TX Bit0 (976~1000) 25 988, Bit8 (963~989) 27 976,
1239 00:46:11.148438 TX Bit1 (976~999) 24 987, Bit9 (966~989) 24 977,
1240 00:46:11.148486 TX Bit2 (976~999) 24 987, Bit10 (968~992) 25 980,
1241 00:46:11.148534 TX Bit3 (969~992) 24 980, Bit11 (964~989) 26 976,
1242 00:46:11.148582 TX Bit4 (975~999) 25 987, Bit12 (965~990) 26 977,
1243 00:46:11.148629 TX Bit5 (970~995) 26 982, Bit13 (965~989) 25 977,
1244 00:46:11.148677 TX Bit6 (971~996) 26 983, Bit14 (966~990) 25 978,
1245 00:46:11.148724 TX Bit7 (972~997) 26 984, Bit15 (967~991) 25 979,
1246 00:46:11.148771
1247 00:46:11.148819 Write Rank0 MR14 =0x1c
1248 00:46:11.148867
1249 00:46:11.148913 CH=0, VrefRange= 0, VrefLevel = 28
1250 00:46:11.148961 TX Bit0 (976~1000) 25 988, Bit8 (963~989) 27 976,
1251 00:46:11.149009 TX Bit1 (976~999) 24 987, Bit9 (966~989) 24 977,
1252 00:46:11.149056 TX Bit2 (976~999) 24 987, Bit10 (968~992) 25 980,
1253 00:46:11.149104 TX Bit3 (969~992) 24 980, Bit11 (964~989) 26 976,
1254 00:46:11.149152 TX Bit4 (975~999) 25 987, Bit12 (965~990) 26 977,
1255 00:46:11.149199 TX Bit5 (970~995) 26 982, Bit13 (965~989) 25 977,
1256 00:46:11.149247 TX Bit6 (971~996) 26 983, Bit14 (966~990) 25 978,
1257 00:46:11.149295 TX Bit7 (972~997) 26 984, Bit15 (967~991) 25 979,
1258 00:46:11.149343
1259 00:46:11.149389 Write Rank0 MR14 =0x1e
1260 00:46:11.149436
1261 00:46:11.149484 CH=0, VrefRange= 0, VrefLevel = 30
1262 00:46:11.149532 TX Bit0 (976~1000) 25 988, Bit8 (963~989) 27 976,
1263 00:46:11.149580 TX Bit1 (976~999) 24 987, Bit9 (966~989) 24 977,
1264 00:46:11.149627 TX Bit2 (976~999) 24 987, Bit10 (968~992) 25 980,
1265 00:46:11.149675 TX Bit3 (969~992) 24 980, Bit11 (964~989) 26 976,
1266 00:46:11.149723 TX Bit4 (975~999) 25 987, Bit12 (965~990) 26 977,
1267 00:46:11.149770 TX Bit5 (970~995) 26 982, Bit13 (965~989) 25 977,
1268 00:46:11.149818 TX Bit6 (971~996) 26 983, Bit14 (966~990) 25 978,
1269 00:46:11.149865 TX Bit7 (972~997) 26 984, Bit15 (967~991) 25 979,
1270 00:46:11.149913
1271 00:46:11.149973
1272 00:46:11.150022 TX Vref found, early break! 377< 382
1273 00:46:11.150071 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1274 00:46:11.150119 u1DelayCellOfst[0]=10 cells (8 PI)
1275 00:46:11.150168 u1DelayCellOfst[1]=8 cells (7 PI)
1276 00:46:11.150225 u1DelayCellOfst[2]=8 cells (7 PI)
1277 00:46:11.150315 u1DelayCellOfst[3]=0 cells (0 PI)
1278 00:46:11.150363 u1DelayCellOfst[4]=8 cells (7 PI)
1279 00:46:11.150410 u1DelayCellOfst[5]=2 cells (2 PI)
1280 00:46:11.150458 u1DelayCellOfst[6]=3 cells (3 PI)
1281 00:46:11.150505 u1DelayCellOfst[7]=5 cells (4 PI)
1282 00:46:11.150552 Byte0, DQ PI dly=980, DQM PI dly= 984
1283 00:46:11.150600 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1284 00:46:11.150648
1285 00:46:11.150695 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1286 00:46:11.150744
1287 00:46:11.150791 u1DelayCellOfst[8]=0 cells (0 PI)
1288 00:46:11.150838 u1DelayCellOfst[9]=1 cells (1 PI)
1289 00:46:11.150887 u1DelayCellOfst[10]=5 cells (4 PI)
1290 00:46:11.150934 u1DelayCellOfst[11]=0 cells (0 PI)
1291 00:46:11.150982 u1DelayCellOfst[12]=1 cells (1 PI)
1292 00:46:11.151029 u1DelayCellOfst[13]=1 cells (1 PI)
1293 00:46:11.151077 u1DelayCellOfst[14]=2 cells (2 PI)
1294 00:46:11.151124 u1DelayCellOfst[15]=3 cells (3 PI)
1295 00:46:11.151171 Byte1, DQ PI dly=976, DQM PI dly= 978
1296 00:46:11.151219 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1297 00:46:11.151267
1298 00:46:11.151313 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1299 00:46:11.151361
1300 00:46:11.151408 Write Rank0 MR14 =0x18
1301 00:46:11.151453
1302 00:46:11.151500 Final TX Range 0 Vref 24
1303 00:46:11.151547
1304 00:46:11.151593 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1305 00:46:11.151641
1306 00:46:11.151688 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1307 00:46:11.151735 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1308 00:46:11.151783 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1309 00:46:11.151830 Write Rank0 MR3 =0xb0
1310 00:46:11.151877 DramC Write-DBI on
1311 00:46:11.151923 ==
1312 00:46:11.151969 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1313 00:46:11.152017 fsp= 1, odt_onoff= 1, Byte mode= 0
1314 00:46:11.152065 ==
1315 00:46:11.152112 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1316 00:46:11.152159
1317 00:46:11.152205 Begin, DQ Scan Range 698~762
1318 00:46:11.152252
1319 00:46:11.152298
1320 00:46:11.152344 TX Vref Scan disable
1321 00:46:11.152391 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1322 00:46:11.152633 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1323 00:46:11.152741 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1324 00:46:11.152859 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1325 00:46:11.152924 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1326 00:46:11.152975 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1327 00:46:11.153024 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1328 00:46:11.153072 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1329 00:46:11.153120 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1330 00:46:11.153168 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1331 00:46:11.153217 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1332 00:46:11.153265 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1333 00:46:11.153314 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1334 00:46:11.153362 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1335 00:46:11.153410 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1336 00:46:11.153458 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1337 00:46:11.153506 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1338 00:46:11.153554 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1339 00:46:11.153602 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1340 00:46:11.153650 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1341 00:46:11.153697 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1342 00:46:11.153745 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1343 00:46:11.153793 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1344 00:46:11.153840 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1345 00:46:11.153889 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1346 00:46:11.153937 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1347 00:46:11.153985 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1348 00:46:11.154033 Byte0, DQ PI dly=729, DQM PI dly= 729
1349 00:46:11.154080 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
1350 00:46:11.154128
1351 00:46:11.154175 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
1352 00:46:11.154231
1353 00:46:11.154317 Byte1, DQ PI dly=720, DQM PI dly= 720
1354 00:46:11.154365 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
1355 00:46:11.154413
1356 00:46:11.154459 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
1357 00:46:11.154507
1358 00:46:11.154553 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1359 00:46:11.154601 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1360 00:46:11.154648 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1361 00:46:11.154696 Write Rank0 MR3 =0x30
1362 00:46:11.154743 DramC Write-DBI off
1363 00:46:11.154790
1364 00:46:11.154836 [DATLAT]
1365 00:46:11.154900 Freq=1600, CH0 RK0, use_rxtx_scan=0
1366 00:46:11.154950
1367 00:46:11.154997 DATLAT Default: 0xf
1368 00:46:11.155044 7, 0xFFFF, sum=0
1369 00:46:11.155092 8, 0xFFFF, sum=0
1370 00:46:11.155140 9, 0xFFFF, sum=0
1371 00:46:11.155188 10, 0xFFFF, sum=0
1372 00:46:11.155237 11, 0xFFFF, sum=0
1373 00:46:11.155285 12, 0xFFFF, sum=0
1374 00:46:11.155333 13, 0xFFFF, sum=0
1375 00:46:11.155381 14, 0x0, sum=1
1376 00:46:11.155428 15, 0x0, sum=2
1377 00:46:11.155476 16, 0x0, sum=3
1378 00:46:11.155523 17, 0x0, sum=4
1379 00:46:11.155571 pattern=2 first_step=14 total pass=5 best_step=16
1380 00:46:11.155618 ==
1381 00:46:11.155665 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1382 00:46:11.155713 fsp= 1, odt_onoff= 1, Byte mode= 0
1383 00:46:11.155760 ==
1384 00:46:11.155807 Start DQ dly to find pass range UseTestEngine =1
1385 00:46:11.155854 x-axis: bit #, y-axis: DQ dly (-127~63)
1386 00:46:11.155901 RX Vref Scan = 1
1387 00:46:11.155948
1388 00:46:11.155995 RX Vref found, early break!
1389 00:46:11.156042
1390 00:46:11.156088 Final RX Vref 12, apply to both rank0 and 1
1391 00:46:11.156135 ==
1392 00:46:11.156182 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1393 00:46:11.156230 fsp= 1, odt_onoff= 1, Byte mode= 0
1394 00:46:11.156277 ==
1395 00:46:11.156323 DQS Delay:
1396 00:46:11.156369 DQS0 = 0, DQS1 = 0
1397 00:46:11.156416 DQM Delay:
1398 00:46:11.156464 DQM0 = 19, DQM1 = 18
1399 00:46:11.156511 DQ Delay:
1400 00:46:11.156558 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1401 00:46:11.156605 DQ4 =22, DQ5 =15, DQ6 =16, DQ7 =18
1402 00:46:11.156652 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
1403 00:46:11.156699 DQ12 =18, DQ13 =16, DQ14 =17, DQ15 =20
1404 00:46:11.156746
1405 00:46:11.156792
1406 00:46:11.156838
1407 00:46:11.156884 [DramC_TX_OE_Calibration] TA2
1408 00:46:11.156931 Original DQ_B0 (3 6) =30, OEN = 27
1409 00:46:11.156978 Original DQ_B1 (3 6) =30, OEN = 27
1410 00:46:11.157026 23, 0x0, End_B0=23 End_B1=23
1411 00:46:11.157073 24, 0x0, End_B0=24 End_B1=24
1412 00:46:11.157121 25, 0x0, End_B0=25 End_B1=25
1413 00:46:11.157168 26, 0x0, End_B0=26 End_B1=26
1414 00:46:11.157216 27, 0x0, End_B0=27 End_B1=27
1415 00:46:11.157264 28, 0x0, End_B0=28 End_B1=28
1416 00:46:11.157312 29, 0x0, End_B0=29 End_B1=29
1417 00:46:11.157360 30, 0x0, End_B0=30 End_B1=30
1418 00:46:11.157407 31, 0xFFFF, End_B0=30 End_B1=30
1419 00:46:11.157455 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1420 00:46:11.157503 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1421 00:46:11.157550
1422 00:46:11.157596
1423 00:46:11.157642 Write Rank0 MR23 =0x3f
1424 00:46:11.157689 [DQSOSC]
1425 00:46:11.157736 [DQSOSCAuto] RK0, (LSB)MR18= 0x9c, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1426 00:46:11.157784 CH0_RK0: MR19=0x3, MR18=0x9C, DQSOSC=340, MR23=63, INC=21, DEC=31
1427 00:46:11.157831 Write Rank0 MR23 =0x3f
1428 00:46:11.157878 [DQSOSC]
1429 00:46:11.157926 [DQSOSCAuto] RK0, (LSB)MR18= 0x9e, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1430 00:46:11.157974 CH0 RK0: MR19=3, MR18=9E
1431 00:46:11.158021 [RankSwap] Rank num 2, (Multi 1), Rank 1
1432 00:46:11.158068 Write Rank0 MR2 =0xad
1433 00:46:11.158115 [Write Leveling]
1434 00:46:11.158162 delay byte0 byte1 byte2 byte3
1435 00:46:11.158209
1436 00:46:11.158265 10 0 0
1437 00:46:11.158313 11 0 0
1438 00:46:11.158361 12 0 0
1439 00:46:11.158408 13 0 0
1440 00:46:11.158455 14 0 0
1441 00:46:11.158502 15 0 0
1442 00:46:11.158549 16 0 0
1443 00:46:11.158598 17 0 0
1444 00:46:11.158646 18 0 0
1445 00:46:11.158693 19 0 0
1446 00:46:11.158741 20 0 0
1447 00:46:11.158788 21 0 0
1448 00:46:11.158835 22 0 0
1449 00:46:11.158882 23 0 0
1450 00:46:11.158929 24 0 0
1451 00:46:11.158977 25 0 0
1452 00:46:11.159024 26 0 0
1453 00:46:11.159071 27 0 0
1454 00:46:11.159119 28 0 0
1455 00:46:11.159169 29 0 0
1456 00:46:11.159220 30 0 ff
1457 00:46:11.159268 31 0 ff
1458 00:46:11.159317 32 0 ff
1459 00:46:11.159365 33 0 ff
1460 00:46:11.159413 34 ff ff
1461 00:46:11.159460 35 ff ff
1462 00:46:11.159508 36 ff ff
1463 00:46:11.159555 37 ff ff
1464 00:46:11.159603 38 ff ff
1465 00:46:11.159650 39 ff ff
1466 00:46:11.159698 40 ff ff
1467 00:46:11.159746 pass bytecount = 0xff (0xff: all bytes pass)
1468 00:46:11.159793
1469 00:46:11.159839 DQS0 dly: 34
1470 00:46:11.159886 DQS1 dly: 30
1471 00:46:11.160122 Write Rank0 MR2 =0x2d
1472 00:46:11.160175 [RankSwap] Rank num 2, (Multi 1), Rank 0
1473 00:46:11.160224 Write Rank1 MR1 =0xd6
1474 00:46:11.160271 [Gating]
1475 00:46:11.160318 ==
1476 00:46:11.160365 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1477 00:46:11.160413 fsp= 1, odt_onoff= 1, Byte mode= 0
1478 00:46:11.160460 ==
1479 00:46:11.160508 3 1 0 |3534 d0c |(11 11)(11 11) |(0 0)(1 1)| 0
1480 00:46:11.160557 3 1 4 |3534 3635 |(11 11)(11 11) |(0 0)(0 0)| 0
1481 00:46:11.160605 3 1 8 |3534 3636 |(11 11)(0 0) |(1 1)(1 1)| 0
1482 00:46:11.160654 3 1 12 |3534 2423 |(11 11)(11 11) |(1 1)(1 1)| 0
1483 00:46:11.160703 3 1 16 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
1484 00:46:11.160751 3 1 20 |3534 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
1485 00:46:11.160799 3 1 24 |3534 3433 |(11 11)(11 11) |(0 0)(0 1)| 0
1486 00:46:11.160846 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1487 00:46:11.160894 3 2 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1488 00:46:11.160942 3 2 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1489 00:46:11.160990 3 2 8 |e0d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1490 00:46:11.161038 3 2 12 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
1491 00:46:11.161086 3 2 16 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1492 00:46:11.161133 3 2 20 |3d3d 1211 |(11 11)(11 11) |(1 1)(1 1)| 0
1493 00:46:11.161182 3 2 24 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1494 00:46:11.161229 3 2 28 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1495 00:46:11.161276 3 3 0 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1496 00:46:11.161324 3 3 4 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
1497 00:46:11.161373 3 3 8 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
1498 00:46:11.161421 3 3 12 |3d3d 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
1499 00:46:11.161469 3 3 16 |3d3d 0 |(11 11)(11 11) |(1 1)(1 1)| 0
1500 00:46:11.161517 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1501 00:46:11.161565 [Byte 0] Lead/lag Transition tap number (1)
1502 00:46:11.161613 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1503 00:46:11.161661 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1504 00:46:11.161709 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1505 00:46:11.161757 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1506 00:46:11.161805 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1507 00:46:11.161853 3 4 8 |b0a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1508 00:46:11.161901 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1509 00:46:11.161949 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1510 00:46:11.161997 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1511 00:46:11.162045 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1512 00:46:11.162093 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1513 00:46:11.162142 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1514 00:46:11.162190 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1515 00:46:11.162279 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1516 00:46:11.162327 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1517 00:46:11.162376 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1518 00:46:11.162424 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1519 00:46:11.162472 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1520 00:46:11.162520 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1521 00:46:11.162568 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1522 00:46:11.162615 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1523 00:46:11.162662 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1524 00:46:11.162709 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1525 00:46:11.162757 [Byte 0] Lead/lag Transition tap number (2)
1526 00:46:11.162803 [Byte 1] Lead/lag Transition tap number (2)
1527 00:46:11.162851 3 6 8 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1528 00:46:11.162899 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1529 00:46:11.162946 [Byte 0]First pass (3, 6, 12)
1530 00:46:11.162993 3 6 16 |4646 1818 |(0 0)(1 1) |(0 0)(0 0)| 0
1531 00:46:11.163042 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1532 00:46:11.163090 [Byte 1]First pass (3, 6, 20)
1533 00:46:11.163137 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1534 00:46:11.163185 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1535 00:46:11.163233 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1536 00:46:11.163281 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1537 00:46:11.163329 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1538 00:46:11.163376 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1539 00:46:11.163425 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1540 00:46:11.163472 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1541 00:46:11.163520 All bytes gating window > 1UI, Early break!
1542 00:46:11.163567
1543 00:46:11.163613 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1544 00:46:11.163660
1545 00:46:11.163706 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1546 00:46:11.163753
1547 00:46:11.163799
1548 00:46:11.163845
1549 00:46:11.163891 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1550 00:46:11.163938
1551 00:46:11.163984 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1552 00:46:11.164031
1553 00:46:11.164077
1554 00:46:11.164123 Write Rank1 MR1 =0x56
1555 00:46:11.164169
1556 00:46:11.164214 best RODT dly(2T, 0.5T) = (2, 3)
1557 00:46:11.164261
1558 00:46:11.164307 best RODT dly(2T, 0.5T) = (2, 3)
1559 00:46:11.164353 ==
1560 00:46:11.164400 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1561 00:46:11.164447 fsp= 1, odt_onoff= 1, Byte mode= 0
1562 00:46:11.164494 ==
1563 00:46:11.164541 Start DQ dly to find pass range UseTestEngine =0
1564 00:46:11.164588 x-axis: bit #, y-axis: DQ dly (-127~63)
1565 00:46:11.164635 RX Vref Scan = 0
1566 00:46:11.164682 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1567 00:46:11.164730 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1568 00:46:11.164779 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1569 00:46:11.164827 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1570 00:46:11.164875 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1571 00:46:11.164922 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1572 00:46:11.164971 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1573 00:46:11.165018 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1574 00:46:11.165075 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1575 00:46:11.165126 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1576 00:46:11.165362 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1577 00:46:11.165418 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1578 00:46:11.165467 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1579 00:46:11.165515 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1580 00:46:11.165563 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1581 00:46:11.165611 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1582 00:46:11.165659 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1583 00:46:11.165708 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1584 00:46:11.165756 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1585 00:46:11.165804 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1586 00:46:11.165852 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1587 00:46:11.165900 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1588 00:46:11.165947 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1589 00:46:11.165995 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1590 00:46:11.166042 -2, [0] xxxoxxxo xxxxxxxx [MSB]
1591 00:46:11.166089 -1, [0] xxxoxoxo xxxxxxxx [MSB]
1592 00:46:11.166137 0, [0] xxxoxooo oxxxxxxx [MSB]
1593 00:46:11.166185 1, [0] xxxoxooo ooxoooox [MSB]
1594 00:46:11.166266 2, [0] xxxoxooo ooxooooo [MSB]
1595 00:46:11.166329 3, [0] xxxoxooo ooxooooo [MSB]
1596 00:46:11.166377 4, [0] xxxoxooo ooxooooo [MSB]
1597 00:46:11.166426 5, [0] xooooooo oooooooo [MSB]
1598 00:46:11.166473 33, [0] oooxoooo oooooooo [MSB]
1599 00:46:11.166521 34, [0] oooxoxoo oooooooo [MSB]
1600 00:46:11.166569 35, [0] oooxoxoo oooxooxo [MSB]
1601 00:46:11.166617 36, [0] oooxoxxo xooxooxo [MSB]
1602 00:46:11.166664 37, [0] oooxoxxx xooxoxxo [MSB]
1603 00:46:11.166712 38, [0] oooxoxxx xxoxxxxo [MSB]
1604 00:46:11.166760 39, [0] oooxoxxx xxoxxxxo [MSB]
1605 00:46:11.166807 40, [0] oxoxxxxx xxoxxxxx [MSB]
1606 00:46:11.166855 41, [0] oxxxxxxx xxoxxxxx [MSB]
1607 00:46:11.166902 42, [0] xxxxxxxx xxoxxxxx [MSB]
1608 00:46:11.166950 43, [0] xxxxxxxx xxxxxxxx [MSB]
1609 00:46:11.166997 iDelay=43, Bit 0, Center 23 (6 ~ 41) 36
1610 00:46:11.167044 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1611 00:46:11.167092 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1612 00:46:11.167140 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
1613 00:46:11.167186 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
1614 00:46:11.167233 iDelay=43, Bit 5, Center 16 (-1 ~ 33) 35
1615 00:46:11.167280 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1616 00:46:11.167326 iDelay=43, Bit 7, Center 17 (-2 ~ 36) 39
1617 00:46:11.167372 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
1618 00:46:11.167419 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
1619 00:46:11.167466 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1620 00:46:11.167513 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1621 00:46:11.167559 iDelay=43, Bit 12, Center 19 (1 ~ 37) 37
1622 00:46:11.167606 iDelay=43, Bit 13, Center 18 (1 ~ 36) 36
1623 00:46:11.167653 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1624 00:46:11.167700 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1625 00:46:11.167746 ==
1626 00:46:11.167793 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1627 00:46:11.167840 fsp= 1, odt_onoff= 1, Byte mode= 0
1628 00:46:11.167888 ==
1629 00:46:11.167934 DQS Delay:
1630 00:46:11.167980 DQS0 = 0, DQS1 = 0
1631 00:46:11.168027 DQM Delay:
1632 00:46:11.168074 DQM0 = 19, DQM1 = 18
1633 00:46:11.168120 DQ Delay:
1634 00:46:11.168167 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1635 00:46:11.168215 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =17
1636 00:46:11.168261 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
1637 00:46:11.168308 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1638 00:46:11.168355
1639 00:46:11.168402
1640 00:46:11.168448 DramC Write-DBI off
1641 00:46:11.168494 ==
1642 00:46:11.168541 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1643 00:46:11.168588 fsp= 1, odt_onoff= 1, Byte mode= 0
1644 00:46:11.168635 ==
1645 00:46:11.168682 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1646 00:46:11.168728
1647 00:46:11.168774 Begin, DQ Scan Range 926~1182
1648 00:46:11.168821
1649 00:46:11.168867
1650 00:46:11.168913 TX Vref Scan disable
1651 00:46:11.168960 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1652 00:46:11.169009 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1653 00:46:11.169057 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1654 00:46:11.169106 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1655 00:46:11.169153 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1656 00:46:11.169201 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1657 00:46:11.169249 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1658 00:46:11.169297 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1659 00:46:11.169345 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1660 00:46:11.169392 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1661 00:46:11.169441 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1662 00:46:11.169488 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1663 00:46:11.169536 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1664 00:46:11.169584 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1665 00:46:11.169631 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1666 00:46:11.169679 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1667 00:46:11.169727 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1668 00:46:11.169774 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1669 00:46:11.169822 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1670 00:46:11.169870 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1671 00:46:11.169917 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1672 00:46:11.169965 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1673 00:46:11.170013 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1674 00:46:11.170061 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1675 00:46:11.170108 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1676 00:46:11.170155 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1677 00:46:11.170203 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1678 00:46:11.170304 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1679 00:46:11.170352 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1680 00:46:11.170400 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1681 00:46:11.170448 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1682 00:46:11.170496 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1683 00:46:11.170544 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1684 00:46:11.170593 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1685 00:46:11.170640 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1686 00:46:11.170688 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1687 00:46:11.170736 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1688 00:46:11.170785 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1689 00:46:11.170833 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1690 00:46:11.170882 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1691 00:46:11.170929 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1692 00:46:11.170977 967 |3 6 7|[0] xxxxxxxx oxxxxxxx [MSB]
1693 00:46:11.171024 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1694 00:46:11.171259 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1695 00:46:11.171314 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1696 00:46:11.171364 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1697 00:46:11.171412 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1698 00:46:11.171461 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1699 00:46:11.171510 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1700 00:46:11.171558 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1701 00:46:11.171606 976 |3 6 16|[0] xxxooooo oooooooo [MSB]
1702 00:46:11.171654 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1703 00:46:11.171703 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1704 00:46:11.171751 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1705 00:46:11.171798 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1706 00:46:11.171846 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1707 00:46:11.171893 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1708 00:46:11.171942 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1709 00:46:11.171990 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:46:11.172038 Byte0, DQ PI dly=984, DQM PI dly= 984
1711 00:46:11.172086 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1712 00:46:11.172134
1713 00:46:11.172180 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1714 00:46:11.172227
1715 00:46:11.172274 Byte1, DQ PI dly=979, DQM PI dly= 979
1716 00:46:11.172322 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1717 00:46:11.172370
1718 00:46:11.172416 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1719 00:46:11.172464
1720 00:46:11.172511 ==
1721 00:46:11.172557 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1722 00:46:11.172605 fsp= 1, odt_onoff= 1, Byte mode= 0
1723 00:46:11.172652 ==
1724 00:46:11.172699 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1725 00:46:11.172750
1726 00:46:11.172798 Begin, DQ Scan Range 955~1019
1727 00:46:11.172846 Write Rank1 MR14 =0x0
1728 00:46:11.172892
1729 00:46:11.172939 CH=0, VrefRange= 0, VrefLevel = 0
1730 00:46:11.172986 TX Bit0 (978~997) 20 987, Bit8 (968~988) 21 978,
1731 00:46:11.173035 TX Bit1 (978~995) 18 986, Bit9 (971~988) 18 979,
1732 00:46:11.173082 TX Bit2 (978~995) 18 986, Bit10 (975~991) 17 983,
1733 00:46:11.173130 TX Bit3 (974~989) 16 981, Bit11 (970~987) 18 978,
1734 00:46:11.173177 TX Bit4 (977~997) 21 987, Bit12 (971~989) 19 980,
1735 00:46:11.173224 TX Bit5 (975~990) 16 982, Bit13 (971~985) 15 978,
1736 00:46:11.173272 TX Bit6 (976~991) 16 983, Bit14 (971~989) 19 980,
1737 00:46:11.173320 TX Bit7 (977~993) 17 985, Bit15 (974~990) 17 982,
1738 00:46:11.173366
1739 00:46:11.173413 Write Rank1 MR14 =0x2
1740 00:46:11.173460
1741 00:46:11.173506 CH=0, VrefRange= 0, VrefLevel = 2
1742 00:46:11.173553 TX Bit0 (978~998) 21 988, Bit8 (968~988) 21 978,
1743 00:46:11.173600 TX Bit1 (977~996) 20 986, Bit9 (970~989) 20 979,
1744 00:46:11.173647 TX Bit2 (977~996) 20 986, Bit10 (975~991) 17 983,
1745 00:46:11.173695 TX Bit3 (974~990) 17 982, Bit11 (969~988) 20 978,
1746 00:46:11.173742 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1747 00:46:11.173789 TX Bit5 (975~990) 16 982, Bit13 (970~987) 18 978,
1748 00:46:11.173836 TX Bit6 (975~991) 17 983, Bit14 (970~989) 20 979,
1749 00:46:11.173883 TX Bit7 (977~993) 17 985, Bit15 (974~991) 18 982,
1750 00:46:11.173929
1751 00:46:11.173976 Write Rank1 MR14 =0x4
1752 00:46:11.174022
1753 00:46:11.174069 CH=0, VrefRange= 0, VrefLevel = 4
1754 00:46:11.174117 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1755 00:46:11.174165 TX Bit1 (977~996) 20 986, Bit9 (970~990) 21 980,
1756 00:46:11.174222 TX Bit2 (978~996) 19 987, Bit10 (975~992) 18 983,
1757 00:46:11.174273 TX Bit3 (974~990) 17 982, Bit11 (969~989) 21 979,
1758 00:46:11.174321 TX Bit4 (977~997) 21 987, Bit12 (970~990) 21 980,
1759 00:46:11.174368 TX Bit5 (975~991) 17 983, Bit13 (969~987) 19 978,
1760 00:46:11.174415 TX Bit6 (975~992) 18 983, Bit14 (970~989) 20 979,
1761 00:46:11.174463 TX Bit7 (977~994) 18 985, Bit15 (973~991) 19 982,
1762 00:46:11.174509
1763 00:46:11.174556 Write Rank1 MR14 =0x6
1764 00:46:11.174603
1765 00:46:11.174658 CH=0, VrefRange= 0, VrefLevel = 6
1766 00:46:11.174744 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1767 00:46:11.174803 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
1768 00:46:11.174852 TX Bit2 (977~997) 21 987, Bit10 (974~992) 19 983,
1769 00:46:11.174900 TX Bit3 (973~990) 18 981, Bit11 (969~989) 21 979,
1770 00:46:11.174949 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1771 00:46:11.174997 TX Bit5 (975~991) 17 983, Bit13 (969~988) 20 978,
1772 00:46:11.175045 TX Bit6 (975~992) 18 983, Bit14 (969~989) 21 979,
1773 00:46:11.175093 TX Bit7 (977~994) 18 985, Bit15 (972~991) 20 981,
1774 00:46:11.175143
1775 00:46:11.175189 Write Rank1 MR14 =0x8
1776 00:46:11.175236
1777 00:46:11.175283 CH=0, VrefRange= 0, VrefLevel = 8
1778 00:46:11.175330 TX Bit0 (978~998) 21 988, Bit8 (968~990) 23 979,
1779 00:46:11.175378 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1780 00:46:11.175425 TX Bit2 (977~998) 22 987, Bit10 (974~992) 19 983,
1781 00:46:11.175473 TX Bit3 (973~991) 19 982, Bit11 (969~990) 22 979,
1782 00:46:11.175520 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1783 00:46:11.175567 TX Bit5 (974~991) 18 982, Bit13 (969~989) 21 979,
1784 00:46:11.175615 TX Bit6 (975~992) 18 983, Bit14 (969~990) 22 979,
1785 00:46:11.175662 TX Bit7 (977~994) 18 985, Bit15 (971~991) 21 981,
1786 00:46:11.175709
1787 00:46:11.175756 Write Rank1 MR14 =0xa
1788 00:46:11.175804
1789 00:46:11.175850 CH=0, VrefRange= 0, VrefLevel = 10
1790 00:46:11.175897 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
1791 00:46:11.175945 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1792 00:46:11.175992 TX Bit2 (977~998) 22 987, Bit10 (973~992) 20 982,
1793 00:46:11.176039 TX Bit3 (972~991) 20 981, Bit11 (969~990) 22 979,
1794 00:46:11.176087 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1795 00:46:11.176134 TX Bit5 (974~991) 18 982, Bit13 (969~989) 21 979,
1796 00:46:11.176182 TX Bit6 (974~993) 20 983, Bit14 (969~990) 22 979,
1797 00:46:11.176229 TX Bit7 (976~996) 21 986, Bit15 (971~992) 22 981,
1798 00:46:11.176276
1799 00:46:11.176322 Write Rank1 MR14 =0xc
1800 00:46:11.176370
1801 00:46:11.176417 CH=0, VrefRange= 0, VrefLevel = 12
1802 00:46:11.176654 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1803 00:46:11.176708 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1804 00:46:11.176757 TX Bit2 (977~998) 22 987, Bit10 (973~993) 21 983,
1805 00:46:11.176805 TX Bit3 (971~991) 21 981, Bit11 (968~990) 23 979,
1806 00:46:11.176853 TX Bit4 (976~998) 23 987, Bit12 (969~990) 22 979,
1807 00:46:11.176901 TX Bit5 (973~992) 20 982, Bit13 (969~989) 21 979,
1808 00:46:11.176956 TX Bit6 (974~993) 20 983, Bit14 (969~990) 22 979,
1809 00:46:11.177007 TX Bit7 (976~996) 21 986, Bit15 (971~992) 22 981,
1810 00:46:11.177054
1811 00:46:11.177101 Write Rank1 MR14 =0xe
1812 00:46:11.177148
1813 00:46:11.177195 CH=0, VrefRange= 0, VrefLevel = 14
1814 00:46:11.177242 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1815 00:46:11.177291 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1816 00:46:11.177338 TX Bit2 (977~998) 22 987, Bit10 (973~994) 22 983,
1817 00:46:11.177386 TX Bit3 (971~992) 22 981, Bit11 (968~990) 23 979,
1818 00:46:11.177433 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1819 00:46:11.177480 TX Bit5 (973~992) 20 982, Bit13 (968~989) 22 978,
1820 00:46:11.177528 TX Bit6 (973~994) 22 983, Bit14 (969~990) 22 979,
1821 00:46:11.177576 TX Bit7 (976~997) 22 986, Bit15 (971~992) 22 981,
1822 00:46:11.177623
1823 00:46:11.177669 Write Rank1 MR14 =0x10
1824 00:46:11.177716
1825 00:46:11.177763 CH=0, VrefRange= 0, VrefLevel = 16
1826 00:46:11.177810 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1827 00:46:11.177857 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1828 00:46:11.177904 TX Bit2 (977~999) 23 988, Bit10 (973~994) 22 983,
1829 00:46:11.177951 TX Bit3 (971~993) 23 982, Bit11 (968~990) 23 979,
1830 00:46:11.177998 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1831 00:46:11.178045 TX Bit5 (972~992) 21 982, Bit13 (969~990) 22 979,
1832 00:46:11.178091 TX Bit6 (973~994) 22 983, Bit14 (968~991) 24 979,
1833 00:46:11.178139 TX Bit7 (976~997) 22 986, Bit15 (970~993) 24 981,
1834 00:46:11.178185
1835 00:46:11.178280 Write Rank1 MR14 =0x12
1836 00:46:11.178328
1837 00:46:11.178375 CH=0, VrefRange= 0, VrefLevel = 18
1838 00:46:11.178423 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1839 00:46:11.178471 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1840 00:46:11.178518 TX Bit2 (976~999) 24 987, Bit10 (973~994) 22 983,
1841 00:46:11.178565 TX Bit3 (970~993) 24 981, Bit11 (967~991) 25 979,
1842 00:46:11.178612 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1843 00:46:11.178659 TX Bit5 (972~993) 22 982, Bit13 (968~990) 23 979,
1844 00:46:11.178706 TX Bit6 (973~994) 22 983, Bit14 (968~991) 24 979,
1845 00:46:11.178753 TX Bit7 (976~997) 22 986, Bit15 (970~993) 24 981,
1846 00:46:11.178799
1847 00:46:11.178845 Write Rank1 MR14 =0x14
1848 00:46:11.178892
1849 00:46:11.178940 CH=0, VrefRange= 0, VrefLevel = 20
1850 00:46:11.178987 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1851 00:46:11.179033 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1852 00:46:11.179081 TX Bit2 (976~999) 24 987, Bit10 (973~995) 23 984,
1853 00:46:11.179129 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1854 00:46:11.179176 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1855 00:46:11.179223 TX Bit5 (971~994) 24 982, Bit13 (968~990) 23 979,
1856 00:46:11.179270 TX Bit6 (972~996) 25 984, Bit14 (968~991) 24 979,
1857 00:46:11.179318 TX Bit7 (975~998) 24 986, Bit15 (969~994) 26 981,
1858 00:46:11.179364
1859 00:46:11.179411 Write Rank1 MR14 =0x16
1860 00:46:11.179458
1861 00:46:11.179504 CH=0, VrefRange= 0, VrefLevel = 22
1862 00:46:11.179551 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1863 00:46:11.179599 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1864 00:46:11.179646 TX Bit2 (976~1000) 25 988, Bit10 (972~996) 25 984,
1865 00:46:11.179694 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1866 00:46:11.179741 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1867 00:46:11.179788 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1868 00:46:11.179835 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1869 00:46:11.179882 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1870 00:46:11.179929
1871 00:46:11.179976 Write Rank1 MR14 =0x18
1872 00:46:11.180023
1873 00:46:11.180069 CH=0, VrefRange= 0, VrefLevel = 24
1874 00:46:11.180117 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1875 00:46:11.180165 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1876 00:46:11.180212 TX Bit2 (976~1000) 25 988, Bit10 (972~996) 25 984,
1877 00:46:11.180260 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1878 00:46:11.180308 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1879 00:46:11.180355 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1880 00:46:11.180402 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1881 00:46:11.180449 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1882 00:46:11.180508
1883 00:46:11.180557 Write Rank1 MR14 =0x1a
1884 00:46:11.180604
1885 00:46:11.180650 CH=0, VrefRange= 0, VrefLevel = 26
1886 00:46:11.180698 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1887 00:46:11.180747 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1888 00:46:11.180794 TX Bit2 (976~1000) 25 988, Bit10 (972~996) 25 984,
1889 00:46:11.180841 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1890 00:46:11.180888 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1891 00:46:11.180935 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1892 00:46:11.180982 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1893 00:46:11.181030 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1894 00:46:11.181077
1895 00:46:11.181123 Write Rank1 MR14 =0x1c
1896 00:46:11.181170
1897 00:46:11.181216 CH=0, VrefRange= 0, VrefLevel = 28
1898 00:46:11.181263 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1899 00:46:11.181311 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1900 00:46:11.181358 TX Bit2 (976~1000) 25 988, Bit10 (972~996) 25 984,
1901 00:46:11.181593 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1902 00:46:11.181649 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1903 00:46:11.181699 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1904 00:46:11.181746 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1905 00:46:11.181794 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1906 00:46:11.181841
1907 00:46:11.181888 Write Rank1 MR14 =0x1e
1908 00:46:11.181935
1909 00:46:11.181982 CH=0, VrefRange= 0, VrefLevel = 30
1910 00:46:11.420613 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1911 00:46:11.421100 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1912 00:46:11.421434 TX Bit2 (976~1000) 25 988, Bit10 (972~996) 25 984,
1913 00:46:11.421742 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1914 00:46:11.422038 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1915 00:46:11.422378 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1916 00:46:11.422668 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1917 00:46:11.422951 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1918 00:46:11.423385
1919 00:46:11.423681 Write Rank1 MR14 =0x20
1920 00:46:11.423957
1921 00:46:11.424231 CH=0, VrefRange= 0, VrefLevel = 32
1922 00:46:11.424504 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1923 00:46:11.424821 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1924 00:46:11.425116 TX Bit2 (976~1000) 25 988, Bit10 (972~996) 25 984,
1925 00:46:11.425397 TX Bit3 (970~994) 25 982, Bit11 (967~991) 25 979,
1926 00:46:11.425671 TX Bit4 (975~1000) 26 987, Bit12 (968~992) 25 980,
1927 00:46:11.425945 TX Bit5 (971~994) 24 982, Bit13 (967~990) 24 978,
1928 00:46:11.426240 TX Bit6 (971~996) 26 983, Bit14 (968~992) 25 980,
1929 00:46:11.426669 TX Bit7 (975~998) 24 986, Bit15 (970~994) 25 982,
1930 00:46:11.426964
1931 00:46:11.427235
1932 00:46:11.427502 TX Vref found, early break! 372< 379
1933 00:46:11.427784 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1934 00:46:11.428057 u1DelayCellOfst[0]=7 cells (6 PI)
1935 00:46:11.428329 u1DelayCellOfst[1]=6 cells (5 PI)
1936 00:46:11.428599 u1DelayCellOfst[2]=7 cells (6 PI)
1937 00:46:11.428871 u1DelayCellOfst[3]=0 cells (0 PI)
1938 00:46:11.429143 u1DelayCellOfst[4]=6 cells (5 PI)
1939 00:46:11.429410 u1DelayCellOfst[5]=0 cells (0 PI)
1940 00:46:11.429677 u1DelayCellOfst[6]=1 cells (1 PI)
1941 00:46:11.430120 u1DelayCellOfst[7]=5 cells (4 PI)
1942 00:46:11.430457 Byte0, DQ PI dly=982, DQM PI dly= 985
1943 00:46:11.430733 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1944 00:46:11.431006
1945 00:46:11.431276 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1946 00:46:11.431551
1947 00:46:11.431822 u1DelayCellOfst[8]=0 cells (0 PI)
1948 00:46:11.432090 u1DelayCellOfst[9]=1 cells (1 PI)
1949 00:46:11.432359 u1DelayCellOfst[10]=7 cells (6 PI)
1950 00:46:11.432629 u1DelayCellOfst[11]=1 cells (1 PI)
1951 00:46:11.432899 u1DelayCellOfst[12]=2 cells (2 PI)
1952 00:46:11.433168 u1DelayCellOfst[13]=0 cells (0 PI)
1953 00:46:11.433592 u1DelayCellOfst[14]=2 cells (2 PI)
1954 00:46:11.433886 u1DelayCellOfst[15]=5 cells (4 PI)
1955 00:46:11.434159 Byte1, DQ PI dly=978, DQM PI dly= 981
1956 00:46:11.434479 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1957 00:46:11.434755
1958 00:46:11.435022 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1959 00:46:11.435295
1960 00:46:11.435562 Write Rank1 MR14 =0x16
1961 00:46:11.435832
1962 00:46:11.436098 Final TX Range 0 Vref 22
1963 00:46:11.436366
1964 00:46:11.436629 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1965 00:46:11.437076
1966 00:46:11.437360 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1967 00:46:11.437635 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1968 00:46:11.437911 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1969 00:46:11.438187 Write Rank1 MR3 =0xb0
1970 00:46:11.438481 DramC Write-DBI on
1971 00:46:11.438753 ==
1972 00:46:11.439021 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1973 00:46:11.439298 fsp= 1, odt_onoff= 1, Byte mode= 0
1974 00:46:11.439567 ==
1975 00:46:11.439837 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1976 00:46:11.440264
1977 00:46:11.440555 Begin, DQ Scan Range 701~765
1978 00:46:11.440829
1979 00:46:11.441095
1980 00:46:11.441361 TX Vref Scan disable
1981 00:46:11.441633 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1982 00:46:11.441915 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1983 00:46:11.442191 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1984 00:46:11.442512 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1985 00:46:11.442791 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1986 00:46:11.443070 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1987 00:46:11.443346 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1988 00:46:11.443779 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1989 00:46:11.444072 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1990 00:46:11.444356 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1991 00:46:11.444636 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1992 00:46:11.444916 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1993 00:46:11.445197 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1994 00:46:11.445478 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1995 00:46:11.445753 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1996 00:46:11.446029 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1997 00:46:11.446353 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1998 00:46:11.446650 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1999 00:46:11.447074 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2000 00:46:11.447366 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2001 00:46:11.447647 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2002 00:46:11.447926 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2003 00:46:11.448208 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2004 00:46:11.448446 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2005 00:46:11.448640 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2006 00:46:11.448837 Byte0, DQ PI dly=729, DQM PI dly= 729
2007 00:46:11.449030 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2008 00:46:11.449223
2009 00:46:11.449413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2010 00:46:11.449607
2011 00:46:11.449798 Byte1, DQ PI dly=722, DQM PI dly= 722
2012 00:46:11.449991 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2013 00:46:11.450198
2014 00:46:11.450504 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2015 00:46:11.450708
2016 00:46:11.451213 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2017 00:46:11.451437 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2018 00:46:11.451638 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2019 00:46:11.451833 Write Rank1 MR3 =0x30
2020 00:46:11.452029 DramC Write-DBI off
2021 00:46:11.452219
2022 00:46:11.452408 [DATLAT]
2023 00:46:11.452596 Freq=1600, CH0 RK1, use_rxtx_scan=0
2024 00:46:11.452826
2025 00:46:11.453023 DATLAT Default: 0x10
2026 00:46:11.453218 7, 0xFFFF, sum=0
2027 00:46:11.453406 8, 0xFFFF, sum=0
2028 00:46:11.453617 9, 0xFFFF, sum=0
2029 00:46:11.453766 10, 0xFFFF, sum=0
2030 00:46:11.453909 11, 0xFFFF, sum=0
2031 00:46:11.454056 12, 0xFFFF, sum=0
2032 00:46:11.454201 13, 0xFFFF, sum=0
2033 00:46:11.454375 14, 0x0, sum=1
2034 00:46:11.454521 15, 0x0, sum=2
2035 00:46:11.454663 16, 0x0, sum=3
2036 00:46:11.454806 17, 0x0, sum=4
2037 00:46:11.455005 pattern=2 first_step=14 total pass=5 best_step=16
2038 00:46:11.455244 ==
2039 00:46:11.455489 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2040 00:46:11.455664 fsp= 1, odt_onoff= 1, Byte mode= 0
2041 00:46:11.455810 ==
2042 00:46:11.455952 Start DQ dly to find pass range UseTestEngine =1
2043 00:46:11.456094 x-axis: bit #, y-axis: DQ dly (-127~63)
2044 00:46:11.456238 RX Vref Scan = 0
2045 00:46:11.456389 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2046 00:46:11.456537 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2047 00:46:11.456681 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2048 00:46:11.456827 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2049 00:46:11.457055 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2050 00:46:11.457207 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2051 00:46:11.457355 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2052 00:46:11.457499 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2053 00:46:11.457642 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2054 00:46:11.457787 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2055 00:46:11.457931 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2056 00:46:11.458074 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2057 00:46:11.458228 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2058 00:46:11.458374 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2059 00:46:11.458491 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2060 00:46:11.458605 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2061 00:46:11.458720 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2062 00:46:11.458833 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2063 00:46:11.458948 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2064 00:46:11.459063 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2065 00:46:11.459178 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2066 00:46:11.459293 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2067 00:46:11.459407 -4, [0] xxxoxxxx xxxxxxxx [MSB]
2068 00:46:11.459522 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2069 00:46:11.459635 -2, [0] xxxoxoxx xxxxxxxx [MSB]
2070 00:46:11.459749 -1, [0] xxxoxoxx oxxxxxxx [MSB]
2071 00:46:11.459861 0, [0] xxxoxoxx oxxoxxxx [MSB]
2072 00:46:11.459976 1, [0] xxxoxoox oxxoxoxx [MSB]
2073 00:46:11.460091 2, [0] xxxoxooo ooxoooox [MSB]
2074 00:46:11.460204 3, [0] xxxoxooo ooxooooo [MSB]
2075 00:46:11.460385 4, [0] xxxoxooo ooxooooo [MSB]
2076 00:46:11.460505 5, [0] xoxoxooo ooxooooo [MSB]
2077 00:46:11.460619 6, [0] xoxooooo oooooooo [MSB]
2078 00:46:11.460733 32, [0] oooxoooo oooooooo [MSB]
2079 00:46:11.460847 33, [0] oooxoooo oooooooo [MSB]
2080 00:46:11.460960 34, [0] oooxoxoo oooooxoo [MSB]
2081 00:46:11.461072 35, [0] oooxoxox oooxoxxo [MSB]
2082 00:46:11.461185 36, [0] oooxoxxx xooxoxxo [MSB]
2083 00:46:11.461296 37, [0] oooxoxxx xxoxoxxo [MSB]
2084 00:46:11.461409 38, [0] oooxoxxx xxoxxxxo [MSB]
2085 00:46:11.461521 39, [0] oooxoxxx xxoxxxxx [MSB]
2086 00:46:11.461633 40, [0] ooxxoxxx xxoxxxxx [MSB]
2087 00:46:11.461748 41, [0] oxxxxxxx xxxxxxxx [MSB]
2088 00:46:11.461861 42, [0] oxxxxxxx xxxxxxxx [MSB]
2089 00:46:11.461973 43, [0] xxxxxxxx xxxxxxxx [MSB]
2090 00:46:11.462085 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
2091 00:46:11.462197 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
2092 00:46:11.462330 iDelay=43, Bit 2, Center 23 (7 ~ 39) 33
2093 00:46:11.462443 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
2094 00:46:11.462555 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2095 00:46:11.462667 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
2096 00:46:11.462778 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2097 00:46:11.462894 iDelay=43, Bit 7, Center 18 (2 ~ 34) 33
2098 00:46:11.463006 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
2099 00:46:11.463116 iDelay=43, Bit 9, Center 19 (2 ~ 36) 35
2100 00:46:11.463227 iDelay=43, Bit 10, Center 23 (6 ~ 40) 35
2101 00:46:11.463350 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2102 00:46:11.463448 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
2103 00:46:11.463591 iDelay=43, Bit 13, Center 17 (1 ~ 33) 33
2104 00:46:11.463688 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
2105 00:46:11.463781 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
2106 00:46:11.463875 ==
2107 00:46:11.463966 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2108 00:46:11.464060 fsp= 1, odt_onoff= 1, Byte mode= 0
2109 00:46:11.464154 ==
2110 00:46:11.464246 DQS Delay:
2111 00:46:11.464338 DQS0 = 0, DQS1 = 0
2112 00:46:11.464431 DQM Delay:
2113 00:46:11.464524 DQM0 = 19, DQM1 = 18
2114 00:46:11.464617 DQ Delay:
2115 00:46:11.464710 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13
2116 00:46:11.464803 DQ4 =23, DQ5 =15, DQ6 =18, DQ7 =18
2117 00:46:11.464895 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
2118 00:46:11.464988 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
2119 00:46:11.465080
2120 00:46:11.465172
2121 00:46:11.465263
2122 00:46:11.465355 [DramC_TX_OE_Calibration] TA2
2123 00:46:11.465448 Original DQ_B0 (3 6) =30, OEN = 27
2124 00:46:11.465541 Original DQ_B1 (3 6) =30, OEN = 27
2125 00:46:11.465634 23, 0x0, End_B0=23 End_B1=23
2126 00:46:11.465728 24, 0x0, End_B0=24 End_B1=24
2127 00:46:11.465821 25, 0x0, End_B0=25 End_B1=25
2128 00:46:11.465915 26, 0x0, End_B0=26 End_B1=26
2129 00:46:11.466011 27, 0x0, End_B0=27 End_B1=27
2130 00:46:11.466106 28, 0x0, End_B0=28 End_B1=28
2131 00:46:11.466199 29, 0x0, End_B0=29 End_B1=29
2132 00:46:11.466311 30, 0x0, End_B0=30 End_B1=30
2133 00:46:11.466407 31, 0xFFFF, End_B0=30 End_B1=30
2134 00:46:11.466501 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2135 00:46:11.466594 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2136 00:46:11.466687
2137 00:46:11.466834
2138 00:46:11.466931 Write Rank1 MR23 =0x3f
2139 00:46:11.467026 [DQSOSC]
2140 00:46:11.467120 [DQSOSCAuto] RK1, (LSB)MR18= 0x8e, (MSB)MR19= 0x3, tDQSOscB0 = 346 ps tDQSOscB1 = 0 ps
2141 00:46:11.467215 CH0_RK1: MR19=0x3, MR18=0x8E, DQSOSC=346, MR23=63, INC=20, DEC=30
2142 00:46:11.467310 Write Rank1 MR23 =0x3f
2143 00:46:11.467403 [DQSOSC]
2144 00:46:11.467718 [DQSOSCAuto] RK1, (LSB)MR18= 0x8c, (MSB)MR19= 0x3, tDQSOscB0 = 346 ps tDQSOscB1 = 0 ps
2145 00:46:11.467826 CH0 RK1: MR19=3, MR18=8C
2146 00:46:11.467923 [RxdqsGatingPostProcess] freq 1600
2147 00:46:11.468017 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2148 00:46:11.468111 Rank: 0
2149 00:46:11.468204 best DQS0 dly(2T, 0.5T) = (2, 5)
2150 00:46:11.468308 best DQS1 dly(2T, 0.5T) = (2, 5)
2151 00:46:11.468386 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2152 00:46:11.468466 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2153 00:46:11.468544 Rank: 1
2154 00:46:11.468623 best DQS0 dly(2T, 0.5T) = (2, 6)
2155 00:46:11.468702 best DQS1 dly(2T, 0.5T) = (2, 6)
2156 00:46:11.468780 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2157 00:46:11.468859 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2158 00:46:11.468937 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2159 00:46:11.469017 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2160 00:46:11.469095 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2161 00:46:11.469174 Write Rank0 MR13 =0x59
2162 00:46:11.469253 ==
2163 00:46:11.469331 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2164 00:46:11.469411 fsp= 1, odt_onoff= 1, Byte mode= 0
2165 00:46:11.469489 ==
2166 00:46:11.469568 === u2Vref_new: 0x56 --> 0x3a
2167 00:46:11.469646 === u2Vref_new: 0x58 --> 0x58
2168 00:46:11.469724 === u2Vref_new: 0x5a --> 0x5a
2169 00:46:11.469802 === u2Vref_new: 0x5c --> 0x78
2170 00:46:11.469881 === u2Vref_new: 0x5e --> 0x7a
2171 00:46:11.469960 === u2Vref_new: 0x60 --> 0x90
2172 00:46:11.470040 [CA 0] Center 37 (12~63) winsize 52
2173 00:46:11.470118 [CA 1] Center 36 (10~63) winsize 54
2174 00:46:11.470196 [CA 2] Center 33 (4~63) winsize 60
2175 00:46:11.470291 [CA 3] Center 33 (4~63) winsize 60
2176 00:46:11.470416 [CA 4] Center 34 (6~63) winsize 58
2177 00:46:11.470500 [CA 5] Center 28 (-1~58) winsize 60
2178 00:46:11.470579
2179 00:46:11.470659 [CATrainingPosCal] consider 1 rank data
2180 00:46:11.470740 u2DelayCellTimex100 = 762/100 ps
2181 00:46:11.470820 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2182 00:46:11.470901 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2183 00:46:11.470980 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2184 00:46:11.471060 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2185 00:46:11.471139 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2186 00:46:11.471218 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2187 00:46:11.471297
2188 00:46:11.471375 CA PerBit enable=1, Macro0, CA PI delay=28
2189 00:46:11.471454 === u2Vref_new: 0x56 --> 0x3a
2190 00:46:11.471533
2191 00:46:11.471611 Vref(ca) range 1: 22
2192 00:46:11.471690
2193 00:46:11.471769 CS Dly= 13 (44-0-32)
2194 00:46:11.471848 Write Rank0 MR13 =0xd8
2195 00:46:11.471926 Write Rank0 MR13 =0xd8
2196 00:46:11.472003 Write Rank0 MR12 =0x56
2197 00:46:11.472082 Write Rank1 MR13 =0x59
2198 00:46:11.472160 ==
2199 00:46:11.472239 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2200 00:46:11.472320 fsp= 1, odt_onoff= 1, Byte mode= 0
2201 00:46:11.472400 ==
2202 00:46:11.472479 === u2Vref_new: 0x56 --> 0x3a
2203 00:46:11.472558 === u2Vref_new: 0x58 --> 0x58
2204 00:46:11.472637 === u2Vref_new: 0x5a --> 0x5a
2205 00:46:11.472716 === u2Vref_new: 0x5c --> 0x78
2206 00:46:11.472794 === u2Vref_new: 0x5e --> 0x7a
2207 00:46:11.472873 === u2Vref_new: 0x60 --> 0x90
2208 00:46:11.472951
2209 00:46:11.473029 CBT Vref found, early break!
2210 00:46:11.473108 [CA 0] Center 37 (11~63) winsize 53
2211 00:46:11.473186 [CA 1] Center 35 (8~63) winsize 56
2212 00:46:11.473277 [CA 2] Center 33 (4~63) winsize 60
2213 00:46:11.473347 [CA 3] Center 33 (4~63) winsize 60
2214 00:46:11.473416 [CA 4] Center 35 (7~63) winsize 57
2215 00:46:11.473510 [CA 5] Center 27 (-2~57) winsize 60
2216 00:46:11.473589
2217 00:46:11.473659 [CATrainingPosCal] consider 2 rank data
2218 00:46:11.473729 u2DelayCellTimex100 = 762/100 ps
2219 00:46:11.473798 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2220 00:46:11.473869 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2221 00:46:11.473938 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2222 00:46:11.474007 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2223 00:46:11.474077 CA4 delay=35 (7~63),Diff = 7 PI (8 cell)
2224 00:46:11.474146 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2225 00:46:11.474223
2226 00:46:11.474295 CA PerBit enable=1, Macro0, CA PI delay=28
2227 00:46:11.474365 === u2Vref_new: 0x56 --> 0x3a
2228 00:46:11.474434
2229 00:46:11.474502 Vref(ca) range 1: 22
2230 00:46:11.474570
2231 00:46:11.474638 CS Dly= 12 (43-0-32)
2232 00:46:11.474706 Write Rank1 MR13 =0xd8
2233 00:46:11.474774 Write Rank1 MR13 =0xd8
2234 00:46:11.474841 Write Rank1 MR12 =0x56
2235 00:46:11.474909 [RankSwap] Rank num 2, (Multi 1), Rank 0
2236 00:46:11.474986 Write Rank0 MR2 =0xad
2237 00:46:11.475095 [Write Leveling]
2238 00:46:11.475182 delay byte0 byte1 byte2 byte3
2239 00:46:11.475253
2240 00:46:11.475321 10 0 0
2241 00:46:11.475391 11 0 0
2242 00:46:11.475459 12 0 0
2243 00:46:11.475529 13 0 0
2244 00:46:11.475599 14 0 0
2245 00:46:11.475668 15 0 0
2246 00:46:11.475755 16 0 0
2247 00:46:11.475880 17 0 0
2248 00:46:11.475955 18 0 0
2249 00:46:11.476026 19 0 0
2250 00:46:11.476097 20 0 0
2251 00:46:11.476166 21 0 0
2252 00:46:11.476236 22 0 0
2253 00:46:11.476305 23 0 0
2254 00:46:11.476374 24 0 0
2255 00:46:11.476444 25 0 0
2256 00:46:11.476514 26 0 0
2257 00:46:11.476583 27 0 0
2258 00:46:11.476653 28 0 0
2259 00:46:11.476721 29 0 0
2260 00:46:11.476791 30 0 0
2261 00:46:11.476860 31 0 0
2262 00:46:11.476929 32 0 ff
2263 00:46:11.477041 33 0 ff
2264 00:46:11.477115 34 0 ff
2265 00:46:11.477186 35 0 ff
2266 00:46:11.477257 36 0 ff
2267 00:46:11.477327 37 ff ff
2268 00:46:11.477395 38 ff ff
2269 00:46:11.477478 39 ff ff
2270 00:46:11.477553 40 ff ff
2271 00:46:11.477623 41 ff ff
2272 00:46:11.477693 42 ff ff
2273 00:46:11.477762 43 ff ff
2274 00:46:11.477833 pass bytecount = 0xff (0xff: all bytes pass)
2275 00:46:11.477902
2276 00:46:11.477971 DQS0 dly: 37
2277 00:46:11.478039 DQS1 dly: 32
2278 00:46:11.478108 Write Rank0 MR2 =0x2d
2279 00:46:11.478198 [RankSwap] Rank num 2, (Multi 1), Rank 0
2280 00:46:11.478286 Write Rank0 MR1 =0xd6
2281 00:46:11.478367 [Gating]
2282 00:46:11.478428 ==
2283 00:46:11.478490 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2284 00:46:11.480396 fsp= 1, odt_onoff= 1, Byte mode= 0
2285 00:46:11.480494 ==
2286 00:46:11.487331 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2287 00:46:11.490677 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2288 00:46:11.494381 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2289 00:46:11.500944 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2290 00:46:11.504231 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2291 00:46:11.507584 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2292 00:46:11.514326 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2293 00:46:11.517503 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2294 00:46:11.520941 3 2 0 |3d3d 2c2c |(11 11)(11 10) |(1 1)(1 0)| 0
2295 00:46:11.524315 3 2 4 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2296 00:46:11.531204 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2297 00:46:11.534597 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2298 00:46:11.537627 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2299 00:46:11.544415 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2300 00:46:11.548212 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2301 00:46:11.551113 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2302 00:46:11.554582 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2303 00:46:11.561916 3 3 4 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2304 00:46:11.565099 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2305 00:46:11.568622 [Byte 0] Lead/lag Transition tap number (1)
2306 00:46:11.571785 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2307 00:46:11.578328 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2308 00:46:11.581785 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2309 00:46:11.585682 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2310 00:46:11.591804 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2311 00:46:11.595034 3 4 0 |1e1d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2312 00:46:11.598734 3 4 4 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
2313 00:46:11.601792 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2314 00:46:11.608943 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2315 00:46:11.612180 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2316 00:46:11.615469 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2317 00:46:11.622401 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2318 00:46:11.625414 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2319 00:46:11.628732 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2320 00:46:11.635289 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2321 00:46:11.639171 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2322 00:46:11.642632 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2323 00:46:11.648907 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2324 00:46:11.652146 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2325 00:46:11.655774 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2326 00:46:11.658619 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2327 00:46:11.665996 [Byte 0] Lead/lag Transition tap number (2)
2328 00:46:11.669140 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2329 00:46:11.672589 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2330 00:46:11.675544 3 6 0 |1817 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
2331 00:46:11.682113 [Byte 1] Lead/lag Transition tap number (3)
2332 00:46:11.685929 3 6 4 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
2333 00:46:11.688872 [Byte 0]First pass (3, 6, 4)
2334 00:46:11.692232 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2335 00:46:11.695822 [Byte 1]First pass (3, 6, 8)
2336 00:46:11.698944 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2337 00:46:11.702664 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2338 00:46:11.705778 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2339 00:46:11.709174 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2340 00:46:11.715761 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2341 00:46:11.719192 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2342 00:46:11.722171 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2343 00:46:11.725500 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2344 00:46:11.728734 All bytes gating window > 1UI, Early break!
2345 00:46:11.729169
2346 00:46:11.732317 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2347 00:46:11.735630
2348 00:46:11.738987 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2349 00:46:11.739422
2350 00:46:11.739755
2351 00:46:11.740061
2352 00:46:11.742075 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2353 00:46:11.742548
2354 00:46:11.745778 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2355 00:46:11.746242
2356 00:46:11.746581
2357 00:46:11.748804 Write Rank0 MR1 =0x56
2358 00:46:11.749236
2359 00:46:11.752513 best RODT dly(2T, 0.5T) = (2, 2)
2360 00:46:11.753028
2361 00:46:11.755717 best RODT dly(2T, 0.5T) = (2, 2)
2362 00:46:11.756245 ==
2363 00:46:11.759156 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2364 00:46:11.762291 fsp= 1, odt_onoff= 1, Byte mode= 0
2365 00:46:11.762827 ==
2366 00:46:11.769213 Start DQ dly to find pass range UseTestEngine =0
2367 00:46:11.772496 x-axis: bit #, y-axis: DQ dly (-127~63)
2368 00:46:11.773023 RX Vref Scan = 0
2369 00:46:11.775707 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2370 00:46:11.778874 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2371 00:46:11.782362 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2372 00:46:11.785938 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2373 00:46:11.789078 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2374 00:46:11.789527 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2375 00:46:11.792227 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2376 00:46:11.795693 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2377 00:46:11.798821 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2378 00:46:11.802448 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2379 00:46:11.805946 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2380 00:46:11.809167 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2381 00:46:11.812476 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2382 00:46:11.813042 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2383 00:46:11.815595 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2384 00:46:11.819186 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2385 00:46:11.822474 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2386 00:46:11.825624 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2387 00:46:11.828838 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2388 00:46:11.832234 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2389 00:46:11.832678 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2390 00:46:11.835903 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2391 00:46:11.838946 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2392 00:46:11.842194 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2393 00:46:11.846298 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2394 00:46:11.848842 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2395 00:46:11.852263 0, [0] xxxoxxxx xxxxxxxo [MSB]
2396 00:46:11.852712 1, [0] xxooxxxo xxoxxxxo [MSB]
2397 00:46:11.855361 2, [0] xxooxxxo oxoxxxxo [MSB]
2398 00:46:11.858746 3, [0] xxoooxxo ooooxxoo [MSB]
2399 00:46:11.862927 4, [0] xxoooxxo ooooxooo [MSB]
2400 00:46:11.865467 5, [0] xooooxxo oooooooo [MSB]
2401 00:46:11.869241 6, [0] xooooxoo oooooooo [MSB]
2402 00:46:11.869771 31, [0] oooooooo oooooooo [MSB]
2403 00:46:11.872734 32, [0] oooxoooo oooooooo [MSB]
2404 00:46:11.875475 33, [0] ooxxoooo ooooooox [MSB]
2405 00:46:11.878834 34, [0] ooxxoooo oxooooox [MSB]
2406 00:46:11.882296 35, [0] ooxxoooo oxxxooox [MSB]
2407 00:46:11.885818 36, [0] ooxxoooo xxxxooxx [MSB]
2408 00:46:11.889260 37, [0] ooxxxoox xxxxoxxx [MSB]
2409 00:46:11.889804 38, [0] ooxxxoox xxxxoxxx [MSB]
2410 00:46:11.892383 39, [0] ooxxxoox xxxxxxxx [MSB]
2411 00:46:11.895691 40, [0] ooxxxoox xxxxxxxx [MSB]
2412 00:46:11.898855 41, [0] ooxxxoxx xxxxxxxx [MSB]
2413 00:46:11.902489 42, [0] xxxxxxxx xxxxxxxx [MSB]
2414 00:46:11.906003 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
2415 00:46:11.909110 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
2416 00:46:11.912836 iDelay=42, Bit 2, Center 16 (1 ~ 32) 32
2417 00:46:11.916021 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
2418 00:46:11.919575 iDelay=42, Bit 4, Center 19 (3 ~ 36) 34
2419 00:46:11.922477 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2420 00:46:11.926063 iDelay=42, Bit 6, Center 23 (6 ~ 40) 35
2421 00:46:11.929358 iDelay=42, Bit 7, Center 18 (1 ~ 36) 36
2422 00:46:11.932365 iDelay=42, Bit 8, Center 18 (2 ~ 35) 34
2423 00:46:11.935821 iDelay=42, Bit 9, Center 18 (3 ~ 33) 31
2424 00:46:11.939261 iDelay=42, Bit 10, Center 17 (1 ~ 34) 34
2425 00:46:11.946081 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
2426 00:46:11.949329 iDelay=42, Bit 12, Center 21 (5 ~ 38) 34
2427 00:46:11.952515 iDelay=42, Bit 13, Center 20 (4 ~ 36) 33
2428 00:46:11.956077 iDelay=42, Bit 14, Center 19 (3 ~ 35) 33
2429 00:46:11.959266 iDelay=42, Bit 15, Center 15 (-2 ~ 32) 35
2430 00:46:11.959717 ==
2431 00:46:11.962908 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2432 00:46:11.965942 fsp= 1, odt_onoff= 1, Byte mode= 0
2433 00:46:11.966523 ==
2434 00:46:11.969694 DQS Delay:
2435 00:46:11.970252 DQS0 = 0, DQS1 = 0
2436 00:46:11.972830 DQM Delay:
2437 00:46:11.973361 DQM0 = 20, DQM1 = 18
2438 00:46:11.973705 DQ Delay:
2439 00:46:11.975828 DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15
2440 00:46:11.979395 DQ4 =19, DQ5 =24, DQ6 =23, DQ7 =18
2441 00:46:11.982928 DQ8 =18, DQ9 =18, DQ10 =17, DQ11 =18
2442 00:46:11.986153 DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =15
2443 00:46:11.986619
2444 00:46:11.986946
2445 00:46:11.989326 DramC Write-DBI off
2446 00:46:11.989762 ==
2447 00:46:11.996094 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2448 00:46:11.996603 fsp= 1, odt_onoff= 1, Byte mode= 0
2449 00:46:11.999496 ==
2450 00:46:12.002685 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2451 00:46:12.003171
2452 00:46:12.006562 Begin, DQ Scan Range 928~1184
2453 00:46:12.007083
2454 00:46:12.007421
2455 00:46:12.007733 TX Vref Scan disable
2456 00:46:12.009576 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2457 00:46:12.013204 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2458 00:46:12.019476 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2459 00:46:12.023145 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2460 00:46:12.026430 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2461 00:46:12.029856 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2462 00:46:12.032854 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2463 00:46:12.036481 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2464 00:46:12.039690 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2465 00:46:12.042960 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2466 00:46:12.045998 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2467 00:46:12.049852 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2468 00:46:12.053128 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2469 00:46:12.056256 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2470 00:46:12.059507 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2471 00:46:12.063225 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2472 00:46:12.065993 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2473 00:46:12.069584 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2474 00:46:12.072900 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2475 00:46:12.079733 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2476 00:46:12.083082 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2477 00:46:12.086532 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2478 00:46:12.089476 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2479 00:46:12.093103 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2480 00:46:12.096234 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2481 00:46:12.099885 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2482 00:46:12.102981 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2483 00:46:12.106450 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2484 00:46:12.110181 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2485 00:46:12.113225 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2486 00:46:12.116579 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2487 00:46:12.119994 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2488 00:46:12.123414 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2489 00:46:12.126368 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2490 00:46:12.130157 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2491 00:46:12.132988 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2492 00:46:12.136799 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2493 00:46:12.139459 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2494 00:46:12.142939 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2495 00:46:12.146429 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2496 00:46:12.153124 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
2497 00:46:12.156304 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
2498 00:46:12.159988 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2499 00:46:12.163180 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2500 00:46:12.166521 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2501 00:46:12.170090 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2502 00:46:12.173145 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2503 00:46:12.176567 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2504 00:46:12.180028 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
2505 00:46:12.186534 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2506 00:46:12.190390 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2507 00:46:12.193592 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2508 00:46:12.196793 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2509 00:46:12.200145 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2510 00:46:12.203482 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2511 00:46:12.206974 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2512 00:46:12.210334 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2513 00:46:12.213896 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2514 00:46:12.217040 Byte0, DQ PI dly=985, DQM PI dly= 985
2515 00:46:12.220418 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2516 00:46:12.220943
2517 00:46:12.227156 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2518 00:46:12.227682
2519 00:46:12.230160 Byte1, DQ PI dly=979, DQM PI dly= 979
2520 00:46:12.233578 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2521 00:46:12.234037
2522 00:46:12.236753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2523 00:46:12.237193
2524 00:46:12.237527 ==
2525 00:46:12.243623 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2526 00:46:12.247022 fsp= 1, odt_onoff= 1, Byte mode= 0
2527 00:46:12.247545 ==
2528 00:46:12.250389 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2529 00:46:12.250916
2530 00:46:12.253478 Begin, DQ Scan Range 955~1019
2531 00:46:12.256853 Write Rank0 MR14 =0x0
2532 00:46:12.264352
2533 00:46:12.264877 CH=1, VrefRange= 0, VrefLevel = 0
2534 00:46:12.271172 TX Bit0 (980~997) 18 988, Bit8 (970~988) 19 979,
2535 00:46:12.274365 TX Bit1 (978~995) 18 986, Bit9 (970~987) 18 978,
2536 00:46:12.280908 TX Bit2 (977~990) 14 983, Bit10 (971~987) 17 979,
2537 00:46:12.284474 TX Bit3 (975~990) 16 982, Bit11 (972~989) 18 980,
2538 00:46:12.287534 TX Bit4 (977~992) 16 984, Bit12 (972~991) 20 981,
2539 00:46:12.294464 TX Bit5 (979~997) 19 988, Bit13 (973~989) 17 981,
2540 00:46:12.298095 TX Bit6 (980~997) 18 988, Bit14 (972~988) 17 980,
2541 00:46:12.300936 TX Bit7 (978~992) 15 985, Bit15 (969~986) 18 977,
2542 00:46:12.301373
2543 00:46:12.304208 Write Rank0 MR14 =0x2
2544 00:46:12.313340
2545 00:46:12.313861 CH=1, VrefRange= 0, VrefLevel = 2
2546 00:46:12.319869 TX Bit0 (979~998) 20 988, Bit8 (970~989) 20 979,
2547 00:46:12.323051 TX Bit1 (978~996) 19 987, Bit9 (970~987) 18 978,
2548 00:46:12.330014 TX Bit2 (976~991) 16 983, Bit10 (971~988) 18 979,
2549 00:46:12.333427 TX Bit3 (975~990) 16 982, Bit11 (971~990) 20 980,
2550 00:46:12.336489 TX Bit4 (977~993) 17 985, Bit12 (972~991) 20 981,
2551 00:46:12.343143 TX Bit5 (978~997) 20 987, Bit13 (972~990) 19 981,
2552 00:46:12.346625 TX Bit6 (979~997) 19 988, Bit14 (972~989) 18 980,
2553 00:46:12.349647 TX Bit7 (977~992) 16 984, Bit15 (969~986) 18 977,
2554 00:46:12.350108
2555 00:46:12.353349 Write Rank0 MR14 =0x4
2556 00:46:12.361960
2557 00:46:12.362539 CH=1, VrefRange= 0, VrefLevel = 4
2558 00:46:12.368847 TX Bit0 (980~998) 19 989, Bit8 (969~990) 22 979,
2559 00:46:12.371757 TX Bit1 (977~997) 21 987, Bit9 (970~988) 19 979,
2560 00:46:12.378430 TX Bit2 (976~991) 16 983, Bit10 (970~989) 20 979,
2561 00:46:12.381798 TX Bit3 (975~991) 17 983, Bit11 (971~990) 20 980,
2562 00:46:12.385247 TX Bit4 (977~994) 18 985, Bit12 (972~991) 20 981,
2563 00:46:12.391587 TX Bit5 (978~998) 21 988, Bit13 (971~990) 20 980,
2564 00:46:12.395246 TX Bit6 (979~998) 20 988, Bit14 (971~989) 19 980,
2565 00:46:12.398672 TX Bit7 (977~992) 16 984, Bit15 (968~986) 19 977,
2566 00:46:12.399134
2567 00:46:12.401791 Write Rank0 MR14 =0x6
2568 00:46:12.410291
2569 00:46:12.410732 CH=1, VrefRange= 0, VrefLevel = 6
2570 00:46:12.417282 TX Bit0 (979~998) 20 988, Bit8 (969~990) 22 979,
2571 00:46:12.420386 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
2572 00:46:12.427111 TX Bit2 (976~991) 16 983, Bit10 (971~990) 20 980,
2573 00:46:12.430405 TX Bit3 (974~991) 18 982, Bit11 (971~990) 20 980,
2574 00:46:12.433876 TX Bit4 (976~994) 19 985, Bit12 (971~992) 22 981,
2575 00:46:12.440788 TX Bit5 (978~998) 21 988, Bit13 (972~991) 20 981,
2576 00:46:12.444152 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
2577 00:46:12.447131 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2578 00:46:12.447575
2579 00:46:12.450351 Write Rank0 MR14 =0x8
2580 00:46:12.459606
2581 00:46:12.460123 CH=1, VrefRange= 0, VrefLevel = 8
2582 00:46:12.466126 TX Bit0 (980~998) 19 989, Bit8 (969~990) 22 979,
2583 00:46:12.469306 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
2584 00:46:12.475913 TX Bit2 (976~992) 17 984, Bit10 (970~990) 21 980,
2585 00:46:12.479224 TX Bit3 (974~991) 18 982, Bit11 (971~991) 21 981,
2586 00:46:12.482410 TX Bit4 (976~995) 20 985, Bit12 (971~992) 22 981,
2587 00:46:12.489232 TX Bit5 (978~998) 21 988, Bit13 (972~991) 20 981,
2588 00:46:12.492624 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
2589 00:46:12.496061 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
2590 00:46:12.496500
2591 00:46:12.499743 Write Rank0 MR14 =0xa
2592 00:46:12.508050
2593 00:46:12.511574 CH=1, VrefRange= 0, VrefLevel = 10
2594 00:46:12.514622 TX Bit0 (978~998) 21 988, Bit8 (969~990) 22 979,
2595 00:46:12.517968 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
2596 00:46:12.524585 TX Bit2 (976~992) 17 984, Bit10 (970~991) 22 980,
2597 00:46:12.527998 TX Bit3 (974~992) 19 983, Bit11 (970~992) 23 981,
2598 00:46:12.531247 TX Bit4 (976~995) 20 985, Bit12 (971~992) 22 981,
2599 00:46:12.537796 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2600 00:46:12.541265 TX Bit6 (978~998) 21 988, Bit14 (970~991) 22 980,
2601 00:46:12.544698 TX Bit7 (977~994) 18 985, Bit15 (968~988) 21 978,
2602 00:46:12.545097
2603 00:46:12.547688 Write Rank0 MR14 =0xc
2604 00:46:12.557127
2605 00:46:12.560839 CH=1, VrefRange= 0, VrefLevel = 12
2606 00:46:12.563814 TX Bit0 (978~999) 22 988, Bit8 (969~991) 23 980,
2607 00:46:12.567263 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
2608 00:46:12.573708 TX Bit2 (976~993) 18 984, Bit10 (970~991) 22 980,
2609 00:46:12.577539 TX Bit3 (973~992) 20 982, Bit11 (970~992) 23 981,
2610 00:46:12.580443 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2611 00:46:12.586769 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
2612 00:46:12.590325 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2613 00:46:12.593595 TX Bit7 (977~995) 19 986, Bit15 (967~989) 23 978,
2614 00:46:12.594118
2615 00:46:12.596909 Write Rank0 MR14 =0xe
2616 00:46:12.606056
2617 00:46:12.606629 CH=1, VrefRange= 0, VrefLevel = 14
2618 00:46:12.612665 TX Bit0 (978~999) 22 988, Bit8 (969~991) 23 980,
2619 00:46:12.616264 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
2620 00:46:12.622490 TX Bit2 (975~993) 19 984, Bit10 (970~991) 22 980,
2621 00:46:12.626208 TX Bit3 (973~993) 21 983, Bit11 (970~992) 23 981,
2622 00:46:12.629308 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2623 00:46:12.636249 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
2624 00:46:12.639417 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2625 00:46:12.642951 TX Bit7 (977~996) 20 986, Bit15 (967~989) 23 978,
2626 00:46:12.643519
2627 00:46:12.646073 Write Rank0 MR14 =0x10
2628 00:46:12.655055
2629 00:46:12.658774 CH=1, VrefRange= 0, VrefLevel = 16
2630 00:46:12.661947 TX Bit0 (977~999) 23 988, Bit8 (969~992) 24 980,
2631 00:46:12.665384 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
2632 00:46:12.671736 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
2633 00:46:12.675158 TX Bit3 (973~993) 21 983, Bit11 (970~992) 23 981,
2634 00:46:12.678607 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2635 00:46:12.685222 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
2636 00:46:12.688596 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2637 00:46:12.691680 TX Bit7 (976~997) 22 986, Bit15 (967~990) 24 978,
2638 00:46:12.692119
2639 00:46:12.695154 Write Rank0 MR14 =0x12
2640 00:46:12.704348
2641 00:46:12.707616 CH=1, VrefRange= 0, VrefLevel = 18
2642 00:46:12.710897 TX Bit0 (977~1000) 24 988, Bit8 (968~991) 24 979,
2643 00:46:12.714376 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2644 00:46:12.721113 TX Bit2 (975~994) 20 984, Bit10 (969~992) 24 980,
2645 00:46:12.724885 TX Bit3 (973~994) 22 983, Bit11 (970~992) 23 981,
2646 00:46:12.727593 TX Bit4 (975~997) 23 986, Bit12 (970~993) 24 981,
2647 00:46:12.734158 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2648 00:46:12.737596 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
2649 00:46:12.741199 TX Bit7 (976~997) 22 986, Bit15 (967~990) 24 978,
2650 00:46:12.741722
2651 00:46:12.744310 Write Rank0 MR14 =0x14
2652 00:46:12.753762
2653 00:46:12.756904 CH=1, VrefRange= 0, VrefLevel = 20
2654 00:46:12.760110 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
2655 00:46:12.763668 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2656 00:46:12.770336 TX Bit2 (975~995) 21 985, Bit10 (969~992) 24 980,
2657 00:46:12.773620 TX Bit3 (972~995) 24 983, Bit11 (970~993) 24 981,
2658 00:46:12.777013 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2659 00:46:12.783346 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
2660 00:46:12.786742 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2661 00:46:12.790097 TX Bit7 (976~997) 22 986, Bit15 (967~991) 25 979,
2662 00:46:12.793839
2663 00:46:12.794437 Write Rank0 MR14 =0x16
2664 00:46:12.803093
2665 00:46:12.807244 CH=1, VrefRange= 0, VrefLevel = 22
2666 00:46:12.809674 TX Bit0 (977~1000) 24 988, Bit8 (968~991) 24 979,
2667 00:46:12.813248 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2668 00:46:12.819730 TX Bit2 (974~996) 23 985, Bit10 (968~992) 25 980,
2669 00:46:12.823130 TX Bit3 (972~995) 24 983, Bit11 (969~993) 25 981,
2670 00:46:12.826439 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2671 00:46:12.833179 TX Bit5 (977~999) 23 988, Bit13 (970~993) 24 981,
2672 00:46:12.836633 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2673 00:46:12.840130 TX Bit7 (976~998) 23 987, Bit15 (966~991) 26 978,
2674 00:46:12.840650
2675 00:46:12.843276 Write Rank0 MR14 =0x18
2676 00:46:12.852426
2677 00:46:12.855902 CH=1, VrefRange= 0, VrefLevel = 24
2678 00:46:12.859493 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2679 00:46:12.862885 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2680 00:46:12.869013 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2681 00:46:12.872395 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2682 00:46:12.875734 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
2683 00:46:12.882302 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2684 00:46:12.885588 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2685 00:46:12.889031 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2686 00:46:12.892568
2687 00:46:12.893083 Write Rank0 MR14 =0x1a
2688 00:46:12.902312
2689 00:46:12.905344 CH=1, VrefRange= 0, VrefLevel = 26
2690 00:46:12.908522 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2691 00:46:12.912159 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2692 00:46:12.918990 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2693 00:46:12.922035 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2694 00:46:12.925541 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
2695 00:46:12.931853 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2696 00:46:12.935514 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2697 00:46:12.938956 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2698 00:46:12.939476
2699 00:46:12.942002 Write Rank0 MR14 =0x1c
2700 00:46:12.951461
2701 00:46:12.955182 CH=1, VrefRange= 0, VrefLevel = 28
2702 00:46:12.958279 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2703 00:46:12.961594 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2704 00:46:12.968417 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2705 00:46:12.971560 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2706 00:46:12.974959 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
2707 00:46:12.981176 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2708 00:46:12.984885 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2709 00:46:12.988178 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2710 00:46:12.991173
2711 00:46:12.991610 Write Rank0 MR14 =0x1e
2712 00:46:13.001343
2713 00:46:13.001864 CH=1, VrefRange= 0, VrefLevel = 30
2714 00:46:13.007526 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2715 00:46:13.010936 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2716 00:46:13.017770 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2717 00:46:13.021199 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2718 00:46:13.024449 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
2719 00:46:13.031101 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2720 00:46:13.034299 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2721 00:46:13.037808 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2722 00:46:13.038380
2723 00:46:13.040704 Write Rank0 MR14 =0x20
2724 00:46:13.050375
2725 00:46:13.053660 CH=1, VrefRange= 0, VrefLevel = 32
2726 00:46:13.057260 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2727 00:46:13.060302 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2728 00:46:13.067143 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2729 00:46:13.070422 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2730 00:46:13.074110 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
2731 00:46:13.080580 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2732 00:46:13.083634 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2733 00:46:13.087424 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2734 00:46:13.087954
2735 00:46:13.090310 Write Rank0 MR14 =0x22
2736 00:46:13.099627
2737 00:46:13.100134 CH=1, VrefRange= 0, VrefLevel = 34
2738 00:46:13.106561 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2739 00:46:13.109561 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2740 00:46:13.116765 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2741 00:46:13.120011 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2742 00:46:13.122803 TX Bit4 (974~998) 25 986, Bit12 (970~993) 24 981,
2743 00:46:13.129969 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2744 00:46:13.133465 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2745 00:46:13.136399 TX Bit7 (975~998) 24 986, Bit15 (966~991) 26 978,
2746 00:46:13.136916
2747 00:46:13.139819
2748 00:46:13.140428 TX Vref found, early break! 364< 370
2749 00:46:13.146441 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2750 00:46:13.150099 u1DelayCellOfst[0]=6 cells (5 PI)
2751 00:46:13.153246 u1DelayCellOfst[1]=5 cells (4 PI)
2752 00:46:13.156320 u1DelayCellOfst[2]=2 cells (2 PI)
2753 00:46:13.159582 u1DelayCellOfst[3]=0 cells (0 PI)
2754 00:46:13.160040 u1DelayCellOfst[4]=3 cells (3 PI)
2755 00:46:13.163004 u1DelayCellOfst[5]=5 cells (4 PI)
2756 00:46:13.166666 u1DelayCellOfst[6]=6 cells (5 PI)
2757 00:46:13.170084 u1DelayCellOfst[7]=3 cells (3 PI)
2758 00:46:13.173251 Byte0, DQ PI dly=983, DQM PI dly= 985
2759 00:46:13.176962 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2760 00:46:13.177485
2761 00:46:13.183360 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2762 00:46:13.183890
2763 00:46:13.186688 u1DelayCellOfst[8]=1 cells (1 PI)
2764 00:46:13.190342 u1DelayCellOfst[9]=2 cells (2 PI)
2765 00:46:13.193371 u1DelayCellOfst[10]=2 cells (2 PI)
2766 00:46:13.193925 u1DelayCellOfst[11]=3 cells (3 PI)
2767 00:46:13.196563 u1DelayCellOfst[12]=3 cells (3 PI)
2768 00:46:13.200359 u1DelayCellOfst[13]=3 cells (3 PI)
2769 00:46:13.203840 u1DelayCellOfst[14]=2 cells (2 PI)
2770 00:46:13.206720 u1DelayCellOfst[15]=0 cells (0 PI)
2771 00:46:13.210246 Byte1, DQ PI dly=978, DQM PI dly= 979
2772 00:46:13.213392 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2773 00:46:13.216903
2774 00:46:13.220176 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2775 00:46:13.220703
2776 00:46:13.221045 Write Rank0 MR14 =0x18
2777 00:46:13.223312
2778 00:46:13.223748 Final TX Range 0 Vref 24
2779 00:46:13.224089
2780 00:46:13.230146 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2781 00:46:13.230752
2782 00:46:13.236727 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2783 00:46:13.243031 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2784 00:46:13.250349 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2785 00:46:13.253654 Write Rank0 MR3 =0xb0
2786 00:46:13.254175 DramC Write-DBI on
2787 00:46:13.256655 ==
2788 00:46:13.259814 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2789 00:46:13.263498 fsp= 1, odt_onoff= 1, Byte mode= 0
2790 00:46:13.264019 ==
2791 00:46:13.266838 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2792 00:46:13.267361
2793 00:46:13.270300 Begin, DQ Scan Range 699~763
2794 00:46:13.270819
2795 00:46:13.271160
2796 00:46:13.273735 TX Vref Scan disable
2797 00:46:13.277108 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2798 00:46:13.280190 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2799 00:46:13.283397 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2800 00:46:13.286784 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2801 00:46:13.290560 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2802 00:46:13.293691 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2803 00:46:13.297151 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2804 00:46:13.299990 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2805 00:46:13.303704 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2806 00:46:13.306804 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2807 00:46:13.310532 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2808 00:46:13.313847 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2809 00:46:13.316896 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2810 00:46:13.320686 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2811 00:46:13.323737 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2812 00:46:13.326859 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2813 00:46:13.334148 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2814 00:46:13.337322 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2815 00:46:13.340161 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2816 00:46:13.343624 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2817 00:46:13.350541 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2818 00:46:13.353797 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2819 00:46:13.357238 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2820 00:46:13.360747 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2821 00:46:13.363822 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2822 00:46:13.367431 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2823 00:46:13.370868 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2824 00:46:13.374267 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2825 00:46:13.377216 Byte0, DQ PI dly=731, DQM PI dly= 731
2826 00:46:13.380719 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2827 00:46:13.381302
2828 00:46:13.387332 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2829 00:46:13.387778
2830 00:46:13.390634 Byte1, DQ PI dly=722, DQM PI dly= 722
2831 00:46:13.393858 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2832 00:46:13.394399
2833 00:46:13.397368 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2834 00:46:13.397807
2835 00:46:13.404350 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2836 00:46:13.411246 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2837 00:46:13.417437 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2838 00:46:13.420960 Write Rank0 MR3 =0x30
2839 00:46:13.424375 DramC Write-DBI off
2840 00:46:13.424891
2841 00:46:13.425227 [DATLAT]
2842 00:46:13.427626 Freq=1600, CH1 RK0, use_rxtx_scan=0
2843 00:46:13.428158
2844 00:46:13.428496 DATLAT Default: 0xf
2845 00:46:13.431156 7, 0xFFFF, sum=0
2846 00:46:13.431684 8, 0xFFFF, sum=0
2847 00:46:13.434409 9, 0xFFFF, sum=0
2848 00:46:13.434937 10, 0xFFFF, sum=0
2849 00:46:13.437973 11, 0xFFFF, sum=0
2850 00:46:13.438579 12, 0xFFFF, sum=0
2851 00:46:13.441073 13, 0xFFFF, sum=0
2852 00:46:13.441594 14, 0x0, sum=1
2853 00:46:13.444364 15, 0x0, sum=2
2854 00:46:13.444894 16, 0x0, sum=3
2855 00:46:13.445243 17, 0x0, sum=4
2856 00:46:13.450940 pattern=2 first_step=14 total pass=5 best_step=16
2857 00:46:13.451511 ==
2858 00:46:13.454159 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2859 00:46:13.457921 fsp= 1, odt_onoff= 1, Byte mode= 0
2860 00:46:13.458498 ==
2861 00:46:13.464517 Start DQ dly to find pass range UseTestEngine =1
2862 00:46:13.467531 x-axis: bit #, y-axis: DQ dly (-127~63)
2863 00:46:13.468046 RX Vref Scan = 1
2864 00:46:13.583122
2865 00:46:13.583634 RX Vref found, early break!
2866 00:46:13.583979
2867 00:46:13.589438 Final RX Vref 12, apply to both rank0 and 1
2868 00:46:13.589883 ==
2869 00:46:13.592889 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2870 00:46:13.596218 fsp= 1, odt_onoff= 1, Byte mode= 0
2871 00:46:13.596661 ==
2872 00:46:13.597001 DQS Delay:
2873 00:46:13.599536 DQS0 = 0, DQS1 = 0
2874 00:46:13.599985 DQM Delay:
2875 00:46:13.603120 DQM0 = 20, DQM1 = 18
2876 00:46:13.603561 DQ Delay:
2877 00:46:13.606744 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =14
2878 00:46:13.609778 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19
2879 00:46:13.612856 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2880 00:46:13.616501 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2881 00:46:13.617018
2882 00:46:13.617360
2883 00:46:13.617672
2884 00:46:13.619947 [DramC_TX_OE_Calibration] TA2
2885 00:46:13.623339 Original DQ_B0 (3 6) =30, OEN = 27
2886 00:46:13.626395 Original DQ_B1 (3 6) =30, OEN = 27
2887 00:46:13.630030 23, 0x0, End_B0=23 End_B1=23
2888 00:46:13.630761 24, 0x0, End_B0=24 End_B1=24
2889 00:46:13.633357 25, 0x0, End_B0=25 End_B1=25
2890 00:46:13.636627 26, 0x0, End_B0=26 End_B1=26
2891 00:46:13.639966 27, 0x0, End_B0=27 End_B1=27
2892 00:46:13.640505 28, 0x0, End_B0=28 End_B1=28
2893 00:46:13.643367 29, 0x0, End_B0=29 End_B1=29
2894 00:46:13.646678 30, 0x0, End_B0=30 End_B1=30
2895 00:46:13.650036 31, 0xFFFF, End_B0=30 End_B1=30
2896 00:46:13.653384 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2897 00:46:13.660175 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2898 00:46:13.660995
2899 00:46:13.661386
2900 00:46:13.663431 Write Rank0 MR23 =0x3f
2901 00:46:13.663869 [DQSOSC]
2902 00:46:13.670166 [DQSOSCAuto] RK0, (LSB)MR18= 0xa2, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
2903 00:46:13.676799 CH1_RK0: MR19=0x3, MR18=0xA2, DQSOSC=338, MR23=63, INC=21, DEC=32
2904 00:46:13.680196 Write Rank0 MR23 =0x3f
2905 00:46:13.680636 [DQSOSC]
2906 00:46:13.686604 [DQSOSCAuto] RK0, (LSB)MR18= 0xa1, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2907 00:46:13.690136 CH1 RK0: MR19=3, MR18=A1
2908 00:46:13.693415 [RankSwap] Rank num 2, (Multi 1), Rank 1
2909 00:46:13.696711 Write Rank0 MR2 =0xad
2910 00:46:13.697149 [Write Leveling]
2911 00:46:13.700106 delay byte0 byte1 byte2 byte3
2912 00:46:13.700537
2913 00:46:13.700939 10 0 0
2914 00:46:13.703461 11 0 0
2915 00:46:13.703905 12 0 0
2916 00:46:13.706809 13 0 0
2917 00:46:13.707253 14 0 0
2918 00:46:13.707598 15 0 0
2919 00:46:13.710352 16 0 0
2920 00:46:13.710792 17 0 0
2921 00:46:13.713662 18 0 0
2922 00:46:13.714266 19 0 0
2923 00:46:13.714672 20 0 0
2924 00:46:13.717048 21 0 0
2925 00:46:13.717582 22 0 0
2926 00:46:13.720212 23 0 0
2927 00:46:13.720741 24 0 0
2928 00:46:13.723647 25 0 0
2929 00:46:13.724170 26 0 0
2930 00:46:13.724519 27 0 0
2931 00:46:13.726690 28 0 0
2932 00:46:13.727133 29 0 0
2933 00:46:13.730074 30 0 0
2934 00:46:13.730600 31 0 0
2935 00:46:13.733664 32 0 ff
2936 00:46:13.734180 33 0 ff
2937 00:46:13.734729 34 0 ff
2938 00:46:13.737028 35 0 ff
2939 00:46:13.737612 36 0 ff
2940 00:46:13.740695 37 0 ff
2941 00:46:13.741220 38 ff ff
2942 00:46:13.743558 39 ff ff
2943 00:46:13.744005 40 ff ff
2944 00:46:13.747176 41 ff ff
2945 00:46:13.747707 42 ff ff
2946 00:46:13.748061 43 ff ff
2947 00:46:13.750184 44 ff ff
2948 00:46:13.753298 pass bytecount = 0xff (0xff: all bytes pass)
2949 00:46:13.753739
2950 00:46:13.756813 DQS0 dly: 38
2951 00:46:13.757326 DQS1 dly: 32
2952 00:46:13.760082 Write Rank0 MR2 =0x2d
2953 00:46:13.763101 [RankSwap] Rank num 2, (Multi 1), Rank 0
2954 00:46:13.766874 wait MRW command Rank1 MR1 =0xd6 fired (1)
2955 00:46:13.767395 Write Rank1 MR1 =0xd6
2956 00:46:13.770180 [Gating]
2957 00:46:13.770744 ==
2958 00:46:13.773468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2959 00:46:13.776721 fsp= 1, odt_onoff= 1, Byte mode= 0
2960 00:46:13.777236 ==
2961 00:46:13.783748 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2962 00:46:13.786867 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2963 00:46:13.790081 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2964 00:46:13.793951 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2965 00:46:13.800100 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2966 00:46:13.803476 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2967 00:46:13.807113 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2968 00:46:13.813627 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2969 00:46:13.816786 3 2 0 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2970 00:46:13.820516 3 2 4 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2971 00:46:13.823875 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2972 00:46:13.830465 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2973 00:46:13.834031 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2974 00:46:13.837231 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2975 00:46:13.843758 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2976 00:46:13.847074 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2977 00:46:13.850668 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2978 00:46:13.857130 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2979 00:46:13.860839 3 3 8 |807 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2980 00:46:13.863747 [Byte 0] Lead/lag Transition tap number (1)
2981 00:46:13.867516 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2982 00:46:13.873921 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2983 00:46:13.877489 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2984 00:46:13.880797 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2985 00:46:13.887377 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2986 00:46:13.890893 3 4 0 |b0b 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2987 00:46:13.894276 3 4 4 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2988 00:46:13.897433 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2989 00:46:13.903807 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2990 00:46:13.907351 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2991 00:46:13.910900 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2992 00:46:13.917706 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2993 00:46:13.920996 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2994 00:46:13.924276 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2995 00:46:13.930823 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2996 00:46:13.934165 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2997 00:46:13.937467 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2998 00:46:13.940801 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2999 00:46:13.947562 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3000 00:46:13.951097 [Byte 0] Lead/lag falling Transition (3, 5, 20)
3001 00:46:13.954199 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3002 00:46:13.960812 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3003 00:46:13.964233 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
3004 00:46:13.967491 [Byte 0] Lead/lag Transition tap number (3)
3005 00:46:13.971043 3 6 0 |403 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
3006 00:46:13.977730 [Byte 1] Lead/lag Transition tap number (3)
3007 00:46:13.981175 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3008 00:46:13.984448 [Byte 0]First pass (3, 6, 4)
3009 00:46:13.987627 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3010 00:46:13.988076 [Byte 1]First pass (3, 6, 8)
3011 00:46:13.994267 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3012 00:46:13.997884 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3013 00:46:14.000977 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3014 00:46:14.004049 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3015 00:46:14.010930 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3016 00:46:14.014144 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3017 00:46:14.017742 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3018 00:46:14.021172 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3019 00:46:14.024277 All bytes gating window > 1UI, Early break!
3020 00:46:14.024796
3021 00:46:14.027436 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
3022 00:46:14.027873
3023 00:46:14.034459 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
3024 00:46:14.034973
3025 00:46:14.035316
3026 00:46:14.035627
3027 00:46:14.037750 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
3028 00:46:14.038299
3029 00:46:14.041160 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3030 00:46:14.041680
3031 00:46:14.042020
3032 00:46:14.044137 Write Rank1 MR1 =0x56
3033 00:46:14.044570
3034 00:46:14.047468 best RODT dly(2T, 0.5T) = (2, 2)
3035 00:46:14.047906
3036 00:46:14.051150 best RODT dly(2T, 0.5T) = (2, 2)
3037 00:46:14.051665 ==
3038 00:46:14.054309 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3039 00:46:14.057761 fsp= 1, odt_onoff= 1, Byte mode= 0
3040 00:46:14.058327 ==
3041 00:46:14.060987 Start DQ dly to find pass range UseTestEngine =0
3042 00:46:14.067943 x-axis: bit #, y-axis: DQ dly (-127~63)
3043 00:46:14.068460 RX Vref Scan = 0
3044 00:46:14.071192 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3045 00:46:14.074456 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3046 00:46:14.077949 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3047 00:46:14.081257 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3048 00:46:14.081779 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3049 00:46:14.084590 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3050 00:46:14.087783 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3051 00:46:14.091053 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3052 00:46:14.094652 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3053 00:46:14.097530 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3054 00:46:14.100981 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3055 00:46:14.104369 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3056 00:46:14.104817 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3057 00:46:14.107926 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3058 00:46:14.111077 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3059 00:46:14.114534 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3060 00:46:14.117786 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3061 00:46:14.121304 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3062 00:46:14.124665 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3063 00:46:14.125192 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3064 00:46:14.127939 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3065 00:46:14.131650 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3066 00:46:14.135052 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3067 00:46:14.138058 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3068 00:46:14.141394 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3069 00:46:14.145143 -1, [0] xxooxxxx xxxxxxxo [MSB]
3070 00:46:14.145669 0, [0] xxooxxxx xxxxxxxo [MSB]
3071 00:46:14.148029 1, [0] xxooxxxo oxoxxxxo [MSB]
3072 00:46:14.151185 2, [0] xxooxxxo oooxxxxo [MSB]
3073 00:46:14.155057 3, [0] xxoooxxo oooxxxoo [MSB]
3074 00:46:14.158125 4, [0] xxoooxxo ooooxxoo [MSB]
3075 00:46:14.161535 5, [0] xooooxxo oooooooo [MSB]
3076 00:46:14.162055 33, [0] oooxoooo oooooooo [MSB]
3077 00:46:14.164567 34, [0] oooxoooo ooooooox [MSB]
3078 00:46:14.168167 35, [0] ooxxoooo ooooooox [MSB]
3079 00:46:14.171351 36, [0] ooxxoooo oxooooox [MSB]
3080 00:46:14.174344 37, [0] ooxxoooo xxxxooox [MSB]
3081 00:46:14.178046 38, [0] ooxxoooo xxxxooox [MSB]
3082 00:46:14.181579 39, [0] ooxxxoox xxxxoxxx [MSB]
3083 00:46:14.182101 40, [0] ooxxxoox xxxxoxxx [MSB]
3084 00:46:14.184631 41, [0] ooxxxoox xxxxxxxx [MSB]
3085 00:46:14.188017 42, [0] ooxxxoox xxxxxxxx [MSB]
3086 00:46:14.191248 43, [0] oxxxxxxx xxxxxxxx [MSB]
3087 00:46:14.194571 44, [0] xxxxxxxx xxxxxxxx [MSB]
3088 00:46:14.197839 iDelay=44, Bit 0, Center 24 (6 ~ 43) 38
3089 00:46:14.201344 iDelay=44, Bit 1, Center 23 (5 ~ 42) 38
3090 00:46:14.204650 iDelay=44, Bit 2, Center 16 (-1 ~ 34) 36
3091 00:46:14.207842 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
3092 00:46:14.211459 iDelay=44, Bit 4, Center 20 (3 ~ 38) 36
3093 00:46:14.214909 iDelay=44, Bit 5, Center 24 (6 ~ 42) 37
3094 00:46:14.218307 iDelay=44, Bit 6, Center 24 (6 ~ 42) 37
3095 00:46:14.221482 iDelay=44, Bit 7, Center 19 (1 ~ 38) 38
3096 00:46:14.225048 iDelay=44, Bit 8, Center 18 (1 ~ 36) 36
3097 00:46:14.228018 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3098 00:46:14.234669 iDelay=44, Bit 10, Center 18 (1 ~ 36) 36
3099 00:46:14.237829 iDelay=44, Bit 11, Center 20 (4 ~ 36) 33
3100 00:46:14.241504 iDelay=44, Bit 12, Center 22 (5 ~ 40) 36
3101 00:46:14.244774 iDelay=44, Bit 13, Center 21 (5 ~ 38) 34
3102 00:46:14.247767 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
3103 00:46:14.251177 iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36
3104 00:46:14.251696 ==
3105 00:46:14.258028 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3106 00:46:14.261253 fsp= 1, odt_onoff= 1, Byte mode= 0
3107 00:46:14.261766 ==
3108 00:46:14.262108 DQS Delay:
3109 00:46:14.262523 DQS0 = 0, DQS1 = 0
3110 00:46:14.264261 DQM Delay:
3111 00:46:14.264698 DQM0 = 20, DQM1 = 19
3112 00:46:14.268199 DQ Delay:
3113 00:46:14.271142 DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15
3114 00:46:14.271582 DQ4 =20, DQ5 =24, DQ6 =24, DQ7 =19
3115 00:46:14.274641 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =20
3116 00:46:14.278177 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15
3117 00:46:14.281379
3118 00:46:14.281892
3119 00:46:14.282476 DramC Write-DBI off
3120 00:46:14.283025 ==
3121 00:46:14.287739 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3122 00:46:14.291150 fsp= 1, odt_onoff= 1, Byte mode= 0
3123 00:46:14.291593 ==
3124 00:46:14.294688 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3125 00:46:14.295216
3126 00:46:14.298007 Begin, DQ Scan Range 928~1184
3127 00:46:14.298496
3128 00:46:14.298838
3129 00:46:14.301666 TX Vref Scan disable
3130 00:46:14.304586 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3131 00:46:14.308747 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3132 00:46:14.311658 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3133 00:46:14.314832 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3134 00:46:14.318243 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3135 00:46:14.321473 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3136 00:46:14.325104 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3137 00:46:14.328215 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3138 00:46:14.331588 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3139 00:46:14.334943 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3140 00:46:14.338384 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3141 00:46:14.341602 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3142 00:46:14.344857 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3143 00:46:14.348172 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3144 00:46:14.351797 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3145 00:46:14.354939 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3146 00:46:14.358132 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3147 00:46:14.365084 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3148 00:46:14.368527 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3149 00:46:14.372343 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3150 00:46:14.374767 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3151 00:46:14.378662 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3152 00:46:14.381806 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3153 00:46:14.385118 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3154 00:46:14.388173 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3155 00:46:14.391490 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3156 00:46:14.394810 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3157 00:46:14.398370 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3158 00:46:14.401649 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3159 00:46:14.405308 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3160 00:46:14.408256 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3161 00:46:14.411817 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3162 00:46:14.415069 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3163 00:46:14.418576 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3164 00:46:14.421797 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3165 00:46:14.425370 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3166 00:46:14.431751 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3167 00:46:14.435461 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3168 00:46:14.438444 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3169 00:46:14.441672 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3170 00:46:14.445149 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3171 00:46:14.448539 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3172 00:46:14.451958 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3173 00:46:14.454943 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3174 00:46:14.458599 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3175 00:46:14.461702 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3176 00:46:14.465234 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3177 00:46:14.468634 975 |3 6 15|[0] xxoxoxxx oooooooo [MSB]
3178 00:46:14.471999 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3179 00:46:14.479369 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3180 00:46:14.482719 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3181 00:46:14.486014 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3182 00:46:14.489173 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3183 00:46:14.492539 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3184 00:46:14.496178 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3185 00:46:14.499238 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3186 00:46:14.502692 998 |3 6 38|[0] ooxxoooo xxxxxxxx [MSB]
3187 00:46:14.505865 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3188 00:46:14.509417 Byte0, DQ PI dly=986, DQM PI dly= 986
3189 00:46:14.512741 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3190 00:46:14.513271
3191 00:46:14.519343 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3192 00:46:14.519908
3193 00:46:14.522613 Byte1, DQ PI dly=979, DQM PI dly= 979
3194 00:46:14.525924 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3195 00:46:14.526498
3196 00:46:14.529194 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3197 00:46:14.529720
3198 00:46:14.532522 ==
3199 00:46:14.535894 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3200 00:46:14.539143 fsp= 1, odt_onoff= 1, Byte mode= 0
3201 00:46:14.539667 ==
3202 00:46:14.542730 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3203 00:46:14.543249
3204 00:46:14.545807 Begin, DQ Scan Range 955~1019
3205 00:46:14.549431 Write Rank1 MR14 =0x0
3206 00:46:14.557420
3207 00:46:14.557945 CH=1, VrefRange= 0, VrefLevel = 0
3208 00:46:14.563754 TX Bit0 (980~998) 19 989, Bit8 (970~987) 18 978,
3209 00:46:14.567537 TX Bit1 (978~998) 21 988, Bit9 (970~986) 17 978,
3210 00:46:14.574267 TX Bit2 (976~993) 18 984, Bit10 (971~986) 16 978,
3211 00:46:14.577573 TX Bit3 (976~991) 16 983, Bit11 (972~989) 18 980,
3212 00:46:14.581059 TX Bit4 (977~995) 19 986, Bit12 (972~991) 20 981,
3213 00:46:14.587705 TX Bit5 (979~998) 20 988, Bit13 (972~987) 16 979,
3214 00:46:14.590547 TX Bit6 (980~999) 20 989, Bit14 (971~987) 17 979,
3215 00:46:14.593922 TX Bit7 (978~995) 18 986, Bit15 (968~985) 18 976,
3216 00:46:14.594398
3217 00:46:14.597407 Write Rank1 MR14 =0x2
3218 00:46:14.606097
3219 00:46:14.606648 CH=1, VrefRange= 0, VrefLevel = 2
3220 00:46:14.612920 TX Bit0 (979~999) 21 989, Bit8 (970~988) 19 979,
3221 00:46:14.616382 TX Bit1 (978~998) 21 988, Bit9 (970~987) 18 978,
3222 00:46:14.622886 TX Bit2 (976~993) 18 984, Bit10 (970~987) 18 978,
3223 00:46:14.626583 TX Bit3 (975~992) 18 983, Bit11 (971~990) 20 980,
3224 00:46:14.629651 TX Bit4 (977~995) 19 986, Bit12 (972~991) 20 981,
3225 00:46:14.636546 TX Bit5 (979~998) 20 988, Bit13 (972~988) 17 980,
3226 00:46:14.639769 TX Bit6 (979~999) 21 989, Bit14 (971~988) 18 979,
3227 00:46:14.643178 TX Bit7 (978~996) 19 987, Bit15 (968~986) 19 977,
3228 00:46:14.643689
3229 00:46:14.646505 Write Rank1 MR14 =0x4
3230 00:46:14.655318
3231 00:46:14.655844 CH=1, VrefRange= 0, VrefLevel = 4
3232 00:46:14.661924 TX Bit0 (979~999) 21 989, Bit8 (969~989) 21 979,
3233 00:46:14.665225 TX Bit1 (977~998) 22 987, Bit9 (970~988) 19 979,
3234 00:46:14.671953 TX Bit2 (976~994) 19 985, Bit10 (970~987) 18 978,
3235 00:46:14.675618 TX Bit3 (975~992) 18 983, Bit11 (971~991) 21 981,
3236 00:46:14.678634 TX Bit4 (977~996) 20 986, Bit12 (971~991) 21 981,
3237 00:46:14.685325 TX Bit5 (979~999) 21 989, Bit13 (971~989) 19 980,
3238 00:46:14.688548 TX Bit6 (979~999) 21 989, Bit14 (971~989) 19 980,
3239 00:46:14.691705 TX Bit7 (978~997) 20 987, Bit15 (968~987) 20 977,
3240 00:46:14.692349
3241 00:46:14.695245 Write Rank1 MR14 =0x6
3242 00:46:14.703998
3243 00:46:14.704511 CH=1, VrefRange= 0, VrefLevel = 6
3244 00:46:14.710940 TX Bit0 (978~999) 22 988, Bit8 (970~990) 21 980,
3245 00:46:14.714254 TX Bit1 (977~998) 22 987, Bit9 (970~989) 20 979,
3246 00:46:14.721207 TX Bit2 (976~994) 19 985, Bit10 (970~988) 19 979,
3247 00:46:14.724479 TX Bit3 (975~993) 19 984, Bit11 (971~991) 21 981,
3248 00:46:14.728020 TX Bit4 (977~996) 20 986, Bit12 (971~991) 21 981,
3249 00:46:14.734177 TX Bit5 (979~999) 21 989, Bit13 (971~990) 20 980,
3250 00:46:14.737676 TX Bit6 (978~999) 22 988, Bit14 (970~990) 21 980,
3251 00:46:14.741023 TX Bit7 (977~997) 21 987, Bit15 (967~987) 21 977,
3252 00:46:14.741544
3253 00:46:14.744215 Write Rank1 MR14 =0x8
3254 00:46:14.753607
3255 00:46:14.754118 CH=1, VrefRange= 0, VrefLevel = 8
3256 00:46:14.759792 TX Bit0 (978~1000) 23 989, Bit8 (969~989) 21 979,
3257 00:46:14.763129 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3258 00:46:14.769910 TX Bit2 (975~994) 20 984, Bit10 (970~989) 20 979,
3259 00:46:14.773508 TX Bit3 (975~994) 20 984, Bit11 (971~991) 21 981,
3260 00:46:14.776556 TX Bit4 (976~997) 22 986, Bit12 (973~991) 19 982,
3261 00:46:14.783111 TX Bit5 (978~999) 22 988, Bit13 (971~990) 20 980,
3262 00:46:14.786537 TX Bit6 (978~1000) 23 989, Bit14 (970~990) 21 980,
3263 00:46:14.789882 TX Bit7 (977~997) 21 987, Bit15 (967~988) 22 977,
3264 00:46:14.790351
3265 00:46:14.793215 Write Rank1 MR14 =0xa
3266 00:46:14.802638
3267 00:46:14.805819 CH=1, VrefRange= 0, VrefLevel = 10
3268 00:46:14.809459 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
3269 00:46:14.812697 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
3270 00:46:14.819430 TX Bit2 (975~995) 21 985, Bit10 (970~989) 20 979,
3271 00:46:14.822597 TX Bit3 (974~994) 21 984, Bit11 (970~991) 22 980,
3272 00:46:14.825840 TX Bit4 (976~997) 22 986, Bit12 (971~992) 22 981,
3273 00:46:14.832198 TX Bit5 (978~1000) 23 989, Bit13 (971~991) 21 981,
3274 00:46:14.835778 TX Bit6 (978~1000) 23 989, Bit14 (970~991) 22 980,
3275 00:46:14.838875 TX Bit7 (977~998) 22 987, Bit15 (967~988) 22 977,
3276 00:46:14.842272
3277 00:46:14.842711 Write Rank1 MR14 =0xc
3278 00:46:14.851899
3279 00:46:14.855040 CH=1, VrefRange= 0, VrefLevel = 12
3280 00:46:14.858673 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
3281 00:46:14.861802 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
3282 00:46:14.868547 TX Bit2 (975~996) 22 985, Bit10 (969~990) 22 979,
3283 00:46:14.871868 TX Bit3 (974~995) 22 984, Bit11 (970~992) 23 981,
3284 00:46:14.875403 TX Bit4 (976~997) 22 986, Bit12 (971~992) 22 981,
3285 00:46:14.882022 TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980,
3286 00:46:14.885431 TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980,
3287 00:46:14.888718 TX Bit7 (977~998) 22 987, Bit15 (967~989) 23 978,
3288 00:46:14.891758
3289 00:46:14.892373 Write Rank1 MR14 =0xe
3290 00:46:14.901344
3291 00:46:14.904952 CH=1, VrefRange= 0, VrefLevel = 14
3292 00:46:14.908299 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3293 00:46:14.911356 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3294 00:46:14.917951 TX Bit2 (975~997) 23 986, Bit10 (969~991) 23 980,
3295 00:46:14.921611 TX Bit3 (974~996) 23 985, Bit11 (970~992) 23 981,
3296 00:46:14.924744 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
3297 00:46:14.931643 TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980,
3298 00:46:14.934628 TX Bit6 (977~1001) 25 989, Bit14 (970~991) 22 980,
3299 00:46:14.938243 TX Bit7 (976~998) 23 987, Bit15 (966~990) 25 978,
3300 00:46:14.938539
3301 00:46:14.941462 Write Rank1 MR14 =0x10
3302 00:46:14.950948
3303 00:46:14.954355 CH=1, VrefRange= 0, VrefLevel = 16
3304 00:46:14.957626 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3305 00:46:14.961237 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3306 00:46:14.967598 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3307 00:46:14.971208 TX Bit3 (974~996) 23 985, Bit11 (970~992) 23 981,
3308 00:46:14.974722 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
3309 00:46:14.981478 TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980,
3310 00:46:14.984490 TX Bit6 (977~1001) 25 989, Bit14 (970~991) 22 980,
3311 00:46:14.987780 TX Bit7 (976~998) 23 987, Bit15 (966~990) 25 978,
3312 00:46:14.990934
3313 00:46:14.991482 Write Rank1 MR14 =0x12
3314 00:46:15.001268
3315 00:46:15.004404 CH=1, VrefRange= 0, VrefLevel = 18
3316 00:46:15.007937 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3317 00:46:15.011110 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3318 00:46:15.017713 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3319 00:46:15.021396 TX Bit3 (973~997) 25 985, Bit11 (970~992) 23 981,
3320 00:46:15.024557 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3321 00:46:15.031136 TX Bit5 (977~1001) 25 989, Bit13 (970~992) 23 981,
3322 00:46:15.034396 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
3323 00:46:15.038274 TX Bit7 (976~998) 23 987, Bit15 (966~990) 25 978,
3324 00:46:15.040973
3325 00:46:15.041481 Write Rank1 MR14 =0x14
3326 00:46:15.051052
3327 00:46:15.054641 CH=1, VrefRange= 0, VrefLevel = 20
3328 00:46:15.057857 TX Bit0 (977~1002) 26 989, Bit8 (968~991) 24 979,
3329 00:46:15.061189 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3330 00:46:15.067777 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
3331 00:46:15.071374 TX Bit3 (973~997) 25 985, Bit11 (969~993) 25 981,
3332 00:46:15.074451 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
3333 00:46:15.081246 TX Bit5 (977~1001) 25 989, Bit13 (970~992) 23 981,
3334 00:46:15.084544 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3335 00:46:15.087494 TX Bit7 (976~998) 23 987, Bit15 (965~990) 26 977,
3336 00:46:15.091147
3337 00:46:15.091657 Write Rank1 MR14 =0x16
3338 00:46:15.100879
3339 00:46:15.104741 CH=1, VrefRange= 0, VrefLevel = 22
3340 00:46:15.107605 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
3341 00:46:15.111204 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3342 00:46:15.117956 TX Bit2 (974~998) 25 986, Bit10 (969~991) 23 980,
3343 00:46:15.121148 TX Bit3 (973~997) 25 985, Bit11 (969~993) 25 981,
3344 00:46:15.124161 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
3345 00:46:15.130986 TX Bit5 (977~1002) 26 989, Bit13 (970~992) 23 981,
3346 00:46:15.134625 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
3347 00:46:15.138020 TX Bit7 (976~999) 24 987, Bit15 (965~991) 27 978,
3348 00:46:15.140914
3349 00:46:15.141351 Write Rank1 MR14 =0x18
3350 00:46:15.151198
3351 00:46:15.154398 CH=1, VrefRange= 0, VrefLevel = 24
3352 00:46:15.157742 TX Bit0 (977~1003) 27 990, Bit8 (967~992) 26 979,
3353 00:46:15.161065 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3354 00:46:15.167790 TX Bit2 (973~998) 26 985, Bit10 (968~992) 25 980,
3355 00:46:15.171398 TX Bit3 (972~997) 26 984, Bit11 (969~993) 25 981,
3356 00:46:15.174397 TX Bit4 (975~999) 25 987, Bit12 (970~993) 24 981,
3357 00:46:15.181342 TX Bit5 (977~1002) 26 989, Bit13 (969~992) 24 980,
3358 00:46:15.184661 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3359 00:46:15.187729 TX Bit7 (976~999) 24 987, Bit15 (965~991) 27 978,
3360 00:46:15.190878
3361 00:46:15.191318 Write Rank1 MR14 =0x1a
3362 00:46:15.200839
3363 00:46:15.204545 CH=1, VrefRange= 0, VrefLevel = 26
3364 00:46:15.207690 TX Bit0 (977~1003) 27 990, Bit8 (967~992) 26 979,
3365 00:46:15.210883 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3366 00:46:15.217794 TX Bit2 (973~998) 26 985, Bit10 (968~992) 25 980,
3367 00:46:15.221071 TX Bit3 (972~997) 26 984, Bit11 (969~993) 25 981,
3368 00:46:15.224719 TX Bit4 (975~999) 25 987, Bit12 (970~993) 24 981,
3369 00:46:15.230963 TX Bit5 (977~1002) 26 989, Bit13 (969~992) 24 980,
3370 00:46:15.234351 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3371 00:46:15.241018 TX Bit7 (976~999) 24 987, Bit15 (965~991) 27 978,
3372 00:46:15.241535
3373 00:46:15.241876 Write Rank1 MR14 =0x1c
3374 00:46:15.251177
3375 00:46:15.254416 CH=1, VrefRange= 0, VrefLevel = 28
3376 00:46:15.257426 TX Bit0 (977~1003) 27 990, Bit8 (967~992) 26 979,
3377 00:46:15.260746 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3378 00:46:15.267382 TX Bit2 (973~998) 26 985, Bit10 (968~992) 25 980,
3379 00:46:15.271100 TX Bit3 (972~997) 26 984, Bit11 (969~993) 25 981,
3380 00:46:15.274383 TX Bit4 (975~999) 25 987, Bit12 (970~993) 24 981,
3381 00:46:15.280976 TX Bit5 (977~1002) 26 989, Bit13 (969~992) 24 980,
3382 00:46:15.284034 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3383 00:46:15.290699 TX Bit7 (976~999) 24 987, Bit15 (965~991) 27 978,
3384 00:46:15.291289
3385 00:46:15.291640 Write Rank1 MR14 =0x1e
3386 00:46:15.300665
3387 00:46:15.304040 CH=1, VrefRange= 0, VrefLevel = 30
3388 00:46:15.307439 TX Bit0 (977~1003) 27 990, Bit8 (967~992) 26 979,
3389 00:46:15.310907 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3390 00:46:15.317706 TX Bit2 (973~998) 26 985, Bit10 (968~992) 25 980,
3391 00:46:15.320919 TX Bit3 (972~997) 26 984, Bit11 (969~993) 25 981,
3392 00:46:15.324759 TX Bit4 (975~999) 25 987, Bit12 (970~993) 24 981,
3393 00:46:15.331030 TX Bit5 (977~1002) 26 989, Bit13 (969~992) 24 980,
3394 00:46:15.334322 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3395 00:46:15.340849 TX Bit7 (976~999) 24 987, Bit15 (965~991) 27 978,
3396 00:46:15.341372
3397 00:46:15.341714 Write Rank1 MR14 =0x20
3398 00:46:15.350651
3399 00:46:15.354022 CH=1, VrefRange= 0, VrefLevel = 32
3400 00:46:15.357401 TX Bit0 (977~1003) 27 990, Bit8 (967~992) 26 979,
3401 00:46:15.360893 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
3402 00:46:15.367677 TX Bit2 (973~998) 26 985, Bit10 (968~992) 25 980,
3403 00:46:15.370764 TX Bit3 (972~997) 26 984, Bit11 (969~993) 25 981,
3404 00:46:15.374395 TX Bit4 (975~999) 25 987, Bit12 (970~993) 24 981,
3405 00:46:15.381111 TX Bit5 (977~1002) 26 989, Bit13 (969~992) 24 980,
3406 00:46:15.384497 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3407 00:46:15.387429 TX Bit7 (976~999) 24 987, Bit15 (965~991) 27 978,
3408 00:46:15.387869
3409 00:46:15.390998
3410 00:46:15.394634 TX Vref found, early break! 381< 384
3411 00:46:15.397648 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3412 00:46:15.400815 u1DelayCellOfst[0]=7 cells (6 PI)
3413 00:46:15.404471 u1DelayCellOfst[1]=5 cells (4 PI)
3414 00:46:15.407656 u1DelayCellOfst[2]=1 cells (1 PI)
3415 00:46:15.410773 u1DelayCellOfst[3]=0 cells (0 PI)
3416 00:46:15.411213 u1DelayCellOfst[4]=3 cells (3 PI)
3417 00:46:15.414395 u1DelayCellOfst[5]=6 cells (5 PI)
3418 00:46:15.417568 u1DelayCellOfst[6]=7 cells (6 PI)
3419 00:46:15.421088 u1DelayCellOfst[7]=3 cells (3 PI)
3420 00:46:15.424298 Byte0, DQ PI dly=984, DQM PI dly= 987
3421 00:46:15.427921 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3422 00:46:15.431007
3423 00:46:15.434286 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3424 00:46:15.434732
3425 00:46:15.437933 u1DelayCellOfst[8]=1 cells (1 PI)
3426 00:46:15.441230 u1DelayCellOfst[9]=1 cells (1 PI)
3427 00:46:15.444382 u1DelayCellOfst[10]=2 cells (2 PI)
3428 00:46:15.448400 u1DelayCellOfst[11]=3 cells (3 PI)
3429 00:46:15.448921 u1DelayCellOfst[12]=3 cells (3 PI)
3430 00:46:15.451231 u1DelayCellOfst[13]=2 cells (2 PI)
3431 00:46:15.454655 u1DelayCellOfst[14]=2 cells (2 PI)
3432 00:46:15.457741 u1DelayCellOfst[15]=0 cells (0 PI)
3433 00:46:15.461281 Byte1, DQ PI dly=978, DQM PI dly= 979
3434 00:46:15.468005 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3435 00:46:15.468527
3436 00:46:15.471157 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3437 00:46:15.471665
3438 00:46:15.474748 Write Rank1 MR14 =0x18
3439 00:46:15.475267
3440 00:46:15.475601 Final TX Range 0 Vref 24
3441 00:46:15.475919
3442 00:46:15.481653 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3443 00:46:15.482274
3444 00:46:15.487864 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3445 00:46:15.494649 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3446 00:46:15.501850 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3447 00:46:15.504794 Write Rank1 MR3 =0xb0
3448 00:46:15.505224 DramC Write-DBI on
3449 00:46:15.508348 ==
3450 00:46:15.511437 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3451 00:46:15.514932 fsp= 1, odt_onoff= 1, Byte mode= 0
3452 00:46:15.515364 ==
3453 00:46:15.518120 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3454 00:46:15.518599
3455 00:46:15.521310 Begin, DQ Scan Range 699~763
3456 00:46:15.521739
3457 00:46:15.522071
3458 00:46:15.524708 TX Vref Scan disable
3459 00:46:15.528136 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3460 00:46:15.531319 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3461 00:46:15.534735 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3462 00:46:15.538182 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3463 00:46:15.541445 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3464 00:46:15.544857 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3465 00:46:15.548086 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3466 00:46:15.551422 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3467 00:46:15.554739 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3468 00:46:15.558331 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3469 00:46:15.561429 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3470 00:46:15.564786 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3471 00:46:15.568378 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3472 00:46:15.571660 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3473 00:46:15.574774 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3474 00:46:15.581714 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3475 00:46:15.585029 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3476 00:46:15.588297 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3477 00:46:15.591512 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3478 00:46:15.594856 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3479 00:46:15.601795 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3480 00:46:15.605347 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3481 00:46:15.608674 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3482 00:46:15.611712 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3483 00:46:15.615313 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3484 00:46:15.618594 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3485 00:46:15.622363 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3486 00:46:15.625544 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3487 00:46:15.628342 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3488 00:46:15.631884 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3489 00:46:15.635046 Byte0, DQ PI dly=731, DQM PI dly= 731
3490 00:46:15.638795 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3491 00:46:15.639313
3492 00:46:15.645163 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3493 00:46:15.645611
3494 00:46:15.648576 Byte1, DQ PI dly=721, DQM PI dly= 721
3495 00:46:15.651882 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3496 00:46:15.652385
3497 00:46:15.655202 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3498 00:46:15.655638
3499 00:46:15.661969 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3500 00:46:15.668796 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3501 00:46:15.678824 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3502 00:46:15.679345 Write Rank1 MR3 =0x30
3503 00:46:15.682309 DramC Write-DBI off
3504 00:46:15.682825
3505 00:46:15.683163 [DATLAT]
3506 00:46:15.685093 Freq=1600, CH1 RK1, use_rxtx_scan=0
3507 00:46:15.685527
3508 00:46:15.689223 DATLAT Default: 0x10
3509 00:46:15.689655 7, 0xFFFF, sum=0
3510 00:46:15.691962 8, 0xFFFF, sum=0
3511 00:46:15.692402 9, 0xFFFF, sum=0
3512 00:46:15.695386 10, 0xFFFF, sum=0
3513 00:46:15.695836 11, 0xFFFF, sum=0
3514 00:46:15.696416 12, 0xFFFF, sum=0
3515 00:46:15.698676 13, 0xFFFF, sum=0
3516 00:46:15.699117 14, 0x0, sum=1
3517 00:46:15.701961 15, 0x0, sum=2
3518 00:46:15.702484 16, 0x0, sum=3
3519 00:46:15.705625 17, 0x0, sum=4
3520 00:46:15.708503 pattern=2 first_step=14 total pass=5 best_step=16
3521 00:46:15.708942 ==
3522 00:46:15.715559 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3523 00:46:15.716082 fsp= 1, odt_onoff= 1, Byte mode= 0
3524 00:46:15.718649 ==
3525 00:46:15.721928 Start DQ dly to find pass range UseTestEngine =1
3526 00:46:15.725611 x-axis: bit #, y-axis: DQ dly (-127~63)
3527 00:46:15.726136 RX Vref Scan = 0
3528 00:46:15.728830 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3529 00:46:15.732412 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3530 00:46:15.735286 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3531 00:46:15.738936 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3532 00:46:15.742337 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3533 00:46:15.745500 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3534 00:46:15.749019 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3535 00:46:15.749595 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3536 00:46:15.752261 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3537 00:46:15.755972 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3538 00:46:15.758917 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3539 00:46:15.762202 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3540 00:46:15.765205 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3541 00:46:15.768639 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3542 00:46:15.772120 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3543 00:46:15.772568 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3544 00:46:15.775674 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3545 00:46:15.779182 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3546 00:46:15.782605 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3547 00:46:15.786155 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3548 00:46:15.788910 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3549 00:46:15.792138 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3550 00:46:15.792584 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3551 00:46:15.795687 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3552 00:46:15.798924 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3553 00:46:15.802631 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3554 00:46:15.805682 0, [0] xxooxxxx xxxxxxxo [MSB]
3555 00:46:15.809196 1, [0] xxooxxxx oooxxxxo [MSB]
3556 00:46:15.809864 2, [0] xxooxxxx ooooxxxo [MSB]
3557 00:46:15.812094 3, [0] xxoooxxo ooooxxxo [MSB]
3558 00:46:15.815969 4, [0] xxoooxxo ooooxooo [MSB]
3559 00:46:15.818941 5, [0] xxoooxxo oooooooo [MSB]
3560 00:46:15.822197 6, [0] xooooxxo oooooooo [MSB]
3561 00:46:15.825540 7, [0] ooooooxo oooooooo [MSB]
3562 00:46:15.829073 33, [0] oooxoooo oooooooo [MSB]
3563 00:46:15.832149 34, [0] oooxoooo ooooooox [MSB]
3564 00:46:15.835888 35, [0] ooxxoooo ooooooox [MSB]
3565 00:46:15.838813 36, [0] ooxxoooo ooooooox [MSB]
3566 00:46:15.839253 37, [0] ooxxoooo xxxxooox [MSB]
3567 00:46:15.842688 38, [0] ooxxxooo xxxxooxx [MSB]
3568 00:46:15.845805 39, [0] ooxxxoox xxxxoxxx [MSB]
3569 00:46:15.848841 40, [0] ooxxxoox xxxxxxxx [MSB]
3570 00:46:15.852408 41, [0] ooxxxxox xxxxxxxx [MSB]
3571 00:46:15.855904 42, [0] oxxxxxox xxxxxxxx [MSB]
3572 00:46:15.859452 43, [0] xxxxxxxx xxxxxxxx [MSB]
3573 00:46:15.862302 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3574 00:46:15.865743 iDelay=43, Bit 1, Center 23 (6 ~ 41) 36
3575 00:46:15.869205 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3576 00:46:15.872753 iDelay=43, Bit 3, Center 14 (-3 ~ 32) 36
3577 00:46:15.875646 iDelay=43, Bit 4, Center 20 (3 ~ 37) 35
3578 00:46:15.879393 iDelay=43, Bit 5, Center 23 (7 ~ 40) 34
3579 00:46:15.882420 iDelay=43, Bit 6, Center 25 (8 ~ 42) 35
3580 00:46:15.886066 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3581 00:46:15.889200 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
3582 00:46:15.892557 iDelay=43, Bit 9, Center 18 (1 ~ 36) 36
3583 00:46:15.896107 iDelay=43, Bit 10, Center 18 (1 ~ 36) 36
3584 00:46:15.899427 iDelay=43, Bit 11, Center 19 (2 ~ 36) 35
3585 00:46:15.902744 iDelay=43, Bit 12, Center 22 (5 ~ 39) 35
3586 00:46:15.905882 iDelay=43, Bit 13, Center 21 (4 ~ 38) 35
3587 00:46:15.909316 iDelay=43, Bit 14, Center 20 (4 ~ 37) 34
3588 00:46:15.916233 iDelay=43, Bit 15, Center 16 (-1 ~ 33) 35
3589 00:46:15.916758 ==
3590 00:46:15.919600 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3591 00:46:15.922866 fsp= 1, odt_onoff= 1, Byte mode= 0
3592 00:46:15.923358 ==
3593 00:46:15.923700 DQS Delay:
3594 00:46:15.926290 DQS0 = 0, DQS1 = 0
3595 00:46:15.926811 DQM Delay:
3596 00:46:15.929543 DQM0 = 20, DQM1 = 19
3597 00:46:15.930059 DQ Delay:
3598 00:46:15.932715 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =14
3599 00:46:15.936310 DQ4 =20, DQ5 =23, DQ6 =25, DQ7 =20
3600 00:46:15.939763 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3601 00:46:15.942849 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =16
3602 00:46:15.943362
3603 00:46:15.943696
3604 00:46:15.944003
3605 00:46:15.946071 [DramC_TX_OE_Calibration] TA2
3606 00:46:15.949611 Original DQ_B0 (3 6) =30, OEN = 27
3607 00:46:15.953246 Original DQ_B1 (3 6) =30, OEN = 27
3608 00:46:15.956175 23, 0x0, End_B0=23 End_B1=23
3609 00:46:15.956614 24, 0x0, End_B0=24 End_B1=24
3610 00:46:15.959450 25, 0x0, End_B0=25 End_B1=25
3611 00:46:15.962556 26, 0x0, End_B0=26 End_B1=26
3612 00:46:15.966110 27, 0x0, End_B0=27 End_B1=27
3613 00:46:15.969191 28, 0x0, End_B0=28 End_B1=28
3614 00:46:15.969649 29, 0x0, End_B0=29 End_B1=29
3615 00:46:15.972587 30, 0x0, End_B0=30 End_B1=30
3616 00:46:15.976306 31, 0xFFFF, End_B0=30 End_B1=30
3617 00:46:15.982796 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3618 00:46:15.985941 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3619 00:46:15.986426
3620 00:46:15.986774
3621 00:46:15.989478 Write Rank1 MR23 =0x3f
3622 00:46:15.989914 [DQSOSC]
3623 00:46:15.995968 [DQSOSCAuto] RK1, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
3624 00:46:16.002456 CH1_RK1: MR19=0x3, MR18=0xA9, DQSOSC=336, MR23=63, INC=21, DEC=32
3625 00:46:16.006151 Write Rank1 MR23 =0x3f
3626 00:46:16.006634 [DQSOSC]
3627 00:46:16.012880 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3628 00:46:16.016016 CH1 RK1: MR19=3, MR18=A4
3629 00:46:16.019622 [RxdqsGatingPostProcess] freq 1600
3630 00:46:16.026665 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3631 00:46:16.027231 Rank: 0
3632 00:46:16.029366 best DQS0 dly(2T, 0.5T) = (2, 5)
3633 00:46:16.032570 best DQS1 dly(2T, 0.5T) = (2, 5)
3634 00:46:16.036038 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3635 00:46:16.039239 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3636 00:46:16.039677 Rank: 1
3637 00:46:16.042778 best DQS0 dly(2T, 0.5T) = (2, 5)
3638 00:46:16.046312 best DQS1 dly(2T, 0.5T) = (2, 5)
3639 00:46:16.046754 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3640 00:46:16.049184 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3641 00:46:16.056280 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3642 00:46:16.059347 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3643 00:46:16.062825 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3644 00:46:16.063516
3645 00:46:16.063917
3646 00:46:16.065994 [Calibration Summary] Freqency 1600
3647 00:46:16.069850 CH 0, Rank 0
3648 00:46:16.070442 All Pass.
3649 00:46:16.070797
3650 00:46:16.071110 CH 0, Rank 1
3651 00:46:16.072686 All Pass.
3652 00:46:16.073117
3653 00:46:16.073455 CH 1, Rank 0
3654 00:46:16.073770 All Pass.
3655 00:46:16.074073
3656 00:46:16.076128 CH 1, Rank 1
3657 00:46:16.076566 All Pass.
3658 00:46:16.076902
3659 00:46:16.082699 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3660 00:46:16.089433 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3661 00:46:16.096074 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3662 00:46:16.099425 Write Rank0 MR3 =0xb0
3663 00:46:16.105999 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3664 00:46:16.112659 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3665 00:46:16.119710 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3666 00:46:16.122839 Write Rank1 MR3 =0xb0
3667 00:46:16.129565 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3668 00:46:16.136247 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3669 00:46:16.142933 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3670 00:46:16.143412 Write Rank0 MR3 =0xb0
3671 00:46:16.149588 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3672 00:46:16.156443 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3673 00:46:16.163159 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3674 00:46:16.166315 Write Rank1 MR3 =0xb0
3675 00:46:16.169925 DramC Write-DBI on
3676 00:46:16.172976 [GetDramInforAfterCalByMRR] Vendor 1.
3677 00:46:16.176462 [GetDramInforAfterCalByMRR] Revision 7.
3678 00:46:16.176897 MR8 12
3679 00:46:16.179684 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3680 00:46:16.180124 MR8 12
3681 00:46:16.186807 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3682 00:46:16.187402 MR8 12
3683 00:46:16.193026 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3684 00:46:16.193506 MR8 12
3685 00:46:16.196454 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3686 00:46:16.206512 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3687 00:46:16.210020 Write Rank0 MR13 =0xd0
3688 00:46:16.210569 Write Rank1 MR13 =0xd0
3689 00:46:16.213072 Write Rank0 MR13 =0xd0
3690 00:46:16.213505 Write Rank1 MR13 =0xd0
3691 00:46:16.216403 Save calibration result to emmc
3692 00:46:16.216834
3693 00:46:16.217164
3694 00:46:16.220034 [DramcModeReg_Check] Freq_1600, FSP_1
3695 00:46:16.222979 FSP_1, CH_0, RK0
3696 00:46:16.223468 Write Rank0 MR13 =0xd8
3697 00:46:16.226454 MR12 = 0x58 (global = 0x58) match
3698 00:46:16.229779 MR14 = 0x18 (global = 0x18) match
3699 00:46:16.233593 FSP_1, CH_0, RK1
3700 00:46:16.234103 Write Rank1 MR13 =0xd8
3701 00:46:16.236480 MR12 = 0x56 (global = 0x56) match
3702 00:46:16.239603 MR14 = 0x16 (global = 0x16) match
3703 00:46:16.243450 FSP_1, CH_1, RK0
3704 00:46:16.243976 Write Rank0 MR13 =0xd8
3705 00:46:16.246533 MR12 = 0x56 (global = 0x56) match
3706 00:46:16.250276 MR14 = 0x18 (global = 0x18) match
3707 00:46:16.253656 FSP_1, CH_1, RK1
3708 00:46:16.254104 Write Rank1 MR13 =0xd8
3709 00:46:16.256485 MR12 = 0x56 (global = 0x56) match
3710 00:46:16.259769 MR14 = 0x18 (global = 0x18) match
3711 00:46:16.260213
3712 00:46:16.266368 [MEM_TEST] 02: After DFS, before run time config
3713 00:46:16.273513 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3714 00:46:16.277119
3715 00:46:16.277629 [TA2_TEST]
3716 00:46:16.277966 === TA2 HW
3717 00:46:16.280472 TA2 PAT: XTALK
3718 00:46:16.283507 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3719 00:46:16.286767 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3720 00:46:16.293447 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3721 00:46:16.296765 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3722 00:46:16.297234
3723 00:46:16.297656
3724 00:46:16.300000 Settings after calibration
3725 00:46:16.300616
3726 00:46:16.303415 [DramcRunTimeConfig]
3727 00:46:16.306898 TransferPLLToSPMControl - MODE SW PHYPLL
3728 00:46:16.307334 TX_TRACKING: ON
3729 00:46:16.310286 RX_TRACKING: ON
3730 00:46:16.310721 HW_GATING: ON
3731 00:46:16.313539 HW_GATING DBG: OFF
3732 00:46:16.313970 ddr_geometry:1
3733 00:46:16.314478 ddr_geometry:1
3734 00:46:16.317082 ddr_geometry:1
3735 00:46:16.317633 ddr_geometry:1
3736 00:46:16.320141 ddr_geometry:1
3737 00:46:16.320590 ddr_geometry:1
3738 00:46:16.321055 ddr_geometry:1
3739 00:46:16.323718 ddr_geometry:1
3740 00:46:16.326893 High Freq DUMMY_READ_FOR_TRACKING: ON
3741 00:46:16.327327 ZQCS_ENABLE_LP4: OFF
3742 00:46:16.330308 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3743 00:46:16.333746 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3744 00:46:16.336854 SPM_CONTROL_AFTERK: ON
3745 00:46:16.340314 IMPEDANCE_TRACKING: ON
3746 00:46:16.340852 TEMP_SENSOR: ON
3747 00:46:16.343566 PER_BANK_REFRESH: ON
3748 00:46:16.343999 HW_SAVE_FOR_SR: ON
3749 00:46:16.347099 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3750 00:46:16.350662 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3751 00:46:16.353911 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3752 00:46:16.357329 Read ODT Tracking: ON
3753 00:46:16.357846 =========================
3754 00:46:16.358190
3755 00:46:16.360700 [TA2_TEST]
3756 00:46:16.361131 === TA2 HW
3757 00:46:16.364117 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3758 00:46:16.370599 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3759 00:46:16.373811 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3760 00:46:16.380956 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3761 00:46:16.381467
3762 00:46:16.383902 [MEM_TEST] 03: After run time config
3763 00:46:16.394029 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3764 00:46:16.397609 [complex_mem_test] start addr:0x40024000, len:131072
3765 00:46:16.601718 1st complex R/W mem test pass
3766 00:46:16.608392 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3767 00:46:16.611943 sync preloader write leveling
3768 00:46:16.615207 sync preloader cbt_mr12
3769 00:46:16.615723 sync preloader cbt_clk_dly
3770 00:46:16.618784 sync preloader cbt_cmd_dly
3771 00:46:16.622252 sync preloader cbt_cs
3772 00:46:16.625422 sync preloader cbt_ca_perbit_delay
3773 00:46:16.625937 sync preloader clk_delay
3774 00:46:16.628537 sync preloader dqs_delay
3775 00:46:16.631870 sync preloader u1Gating2T_Save
3776 00:46:16.635007 sync preloader u1Gating05T_Save
3777 00:46:16.638935 sync preloader u1Gatingfine_tune_Save
3778 00:46:16.641950 sync preloader u1Gatingucpass_count_Save
3779 00:46:16.645819 sync preloader u1TxWindowPerbitVref_Save
3780 00:46:16.648536 sync preloader u1TxCenter_min_Save
3781 00:46:16.651701 sync preloader u1TxCenter_max_Save
3782 00:46:16.655176 sync preloader u1Txwin_center_Save
3783 00:46:16.658601 sync preloader u1Txfirst_pass_Save
3784 00:46:16.661713 sync preloader u1Txlast_pass_Save
3785 00:46:16.662149 sync preloader u1RxDatlat_Save
3786 00:46:16.665077 sync preloader u1RxWinPerbitVref_Save
3787 00:46:16.671994 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3788 00:46:16.674912 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3789 00:46:16.678374 sync preloader delay_cell_unit
3790 00:46:16.685143 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3791 00:46:16.685660 sync preloader write leveling
3792 00:46:16.688361 sync preloader cbt_mr12
3793 00:46:16.691684 sync preloader cbt_clk_dly
3794 00:46:16.695054 sync preloader cbt_cmd_dly
3795 00:46:16.695509 sync preloader cbt_cs
3796 00:46:16.698606 sync preloader cbt_ca_perbit_delay
3797 00:46:16.701950 sync preloader clk_delay
3798 00:46:16.702592 sync preloader dqs_delay
3799 00:46:16.705276 sync preloader u1Gating2T_Save
3800 00:46:16.708570 sync preloader u1Gating05T_Save
3801 00:46:16.712264 sync preloader u1Gatingfine_tune_Save
3802 00:46:16.715516 sync preloader u1Gatingucpass_count_Save
3803 00:46:16.718726 sync preloader u1TxWindowPerbitVref_Save
3804 00:46:16.722319 sync preloader u1TxCenter_min_Save
3805 00:46:16.725854 sync preloader u1TxCenter_max_Save
3806 00:46:16.729124 sync preloader u1Txwin_center_Save
3807 00:46:16.732457 sync preloader u1Txfirst_pass_Save
3808 00:46:16.735295 sync preloader u1Txlast_pass_Save
3809 00:46:16.738700 sync preloader u1RxDatlat_Save
3810 00:46:16.742249 sync preloader u1RxWinPerbitVref_Save
3811 00:46:16.745682 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3812 00:46:16.749102 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3813 00:46:16.752321 sync preloader delay_cell_unit
3814 00:46:16.759132 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3815 00:46:16.762506 sync preloader write leveling
3816 00:46:16.765873 sync preloader cbt_mr12
3817 00:46:16.766436 sync preloader cbt_clk_dly
3818 00:46:16.768700 sync preloader cbt_cmd_dly
3819 00:46:16.772364 sync preloader cbt_cs
3820 00:46:16.772885 sync preloader cbt_ca_perbit_delay
3821 00:46:16.775442 sync preloader clk_delay
3822 00:46:16.778733 sync preloader dqs_delay
3823 00:46:16.782405 sync preloader u1Gating2T_Save
3824 00:46:16.782920 sync preloader u1Gating05T_Save
3825 00:46:16.785609 sync preloader u1Gatingfine_tune_Save
3826 00:46:16.792028 sync preloader u1Gatingucpass_count_Save
3827 00:46:16.795929 sync preloader u1TxWindowPerbitVref_Save
3828 00:46:16.798915 sync preloader u1TxCenter_min_Save
3829 00:46:16.801961 sync preloader u1TxCenter_max_Save
3830 00:46:16.802604 sync preloader u1Txwin_center_Save
3831 00:46:16.805517 sync preloader u1Txfirst_pass_Save
3832 00:46:16.808765 sync preloader u1Txlast_pass_Save
3833 00:46:16.812143 sync preloader u1RxDatlat_Save
3834 00:46:16.815380 sync preloader u1RxWinPerbitVref_Save
3835 00:46:16.818724 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3836 00:46:16.825672 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3837 00:46:16.826111 sync preloader delay_cell_unit
3838 00:46:16.832129 just_for_test_dump_coreboot_params dump all params
3839 00:46:16.832579 dump source = 0x0
3840 00:46:16.835457 dump params frequency:1600
3841 00:46:16.838737 dump params rank number:2
3842 00:46:16.839166
3843 00:46:16.839500 dump params write leveling
3844 00:46:16.842150 write leveling[0][0][0] = 0x22
3845 00:46:16.845619 write leveling[0][0][1] = 0x1d
3846 00:46:16.849045 write leveling[0][1][0] = 0x22
3847 00:46:16.852518 write leveling[0][1][1] = 0x1e
3848 00:46:16.855987 write leveling[1][0][0] = 0x25
3849 00:46:16.856500 write leveling[1][0][1] = 0x20
3850 00:46:16.858904 write leveling[1][1][0] = 0x26
3851 00:46:16.862275 write leveling[1][1][1] = 0x20
3852 00:46:16.865932 dump params cbt_cs
3853 00:46:16.866508 cbt_cs[0][0] = 0x9
3854 00:46:16.869019 cbt_cs[0][1] = 0x9
3855 00:46:16.869535 cbt_cs[1][0] = 0xc
3856 00:46:16.872169 cbt_cs[1][1] = 0xc
3857 00:46:16.872605 dump params cbt_mr12
3858 00:46:16.875967 cbt_mr12[0][0] = 0x18
3859 00:46:16.876484 cbt_mr12[0][1] = 0x16
3860 00:46:16.878834 cbt_mr12[1][0] = 0x16
3861 00:46:16.882303 cbt_mr12[1][1] = 0x16
3862 00:46:16.882820 dump params tx window
3863 00:46:16.885665 tx_center_min[0][0][0] = 980
3864 00:46:16.889273 tx_center_max[0][0][0] = 988
3865 00:46:16.892330 tx_center_min[0][0][1] = 976
3866 00:46:16.892767 tx_center_max[0][0][1] = 980
3867 00:46:16.895905 tx_center_min[0][1][0] = 982
3868 00:46:16.899159 tx_center_max[0][1][0] = 988
3869 00:46:16.902190 tx_center_min[0][1][1] = 978
3870 00:46:16.902878 tx_center_max[0][1][1] = 984
3871 00:46:16.905637 tx_center_min[1][0][0] = 983
3872 00:46:16.909123 tx_center_max[1][0][0] = 988
3873 00:46:16.912589 tx_center_min[1][0][1] = 978
3874 00:46:16.916089 tx_center_max[1][0][1] = 981
3875 00:46:16.916526 tx_center_min[1][1][0] = 984
3876 00:46:16.918870 tx_center_max[1][1][0] = 990
3877 00:46:16.922319 tx_center_min[1][1][1] = 978
3878 00:46:16.925814 tx_center_max[1][1][1] = 981
3879 00:46:16.926345 dump params tx window
3880 00:46:16.929042 tx_win_center[0][0][0] = 988
3881 00:46:16.932453 tx_first_pass[0][0][0] = 976
3882 00:46:16.935736 tx_last_pass[0][0][0] = 1000
3883 00:46:16.936169 tx_win_center[0][0][1] = 987
3884 00:46:16.939069 tx_first_pass[0][0][1] = 976
3885 00:46:16.942681 tx_last_pass[0][0][1] = 999
3886 00:46:16.946357 tx_win_center[0][0][2] = 987
3887 00:46:16.949736 tx_first_pass[0][0][2] = 976
3888 00:46:16.950289 tx_last_pass[0][0][2] = 999
3889 00:46:16.952571 tx_win_center[0][0][3] = 980
3890 00:46:16.955875 tx_first_pass[0][0][3] = 969
3891 00:46:16.959589 tx_last_pass[0][0][3] = 992
3892 00:46:16.960098 tx_win_center[0][0][4] = 987
3893 00:46:16.962664 tx_first_pass[0][0][4] = 975
3894 00:46:16.965906 tx_last_pass[0][0][4] = 999
3895 00:46:16.969165 tx_win_center[0][0][5] = 982
3896 00:46:16.972688 tx_first_pass[0][0][5] = 970
3897 00:46:16.973125 tx_last_pass[0][0][5] = 995
3898 00:46:16.976359 tx_win_center[0][0][6] = 983
3899 00:46:16.979230 tx_first_pass[0][0][6] = 971
3900 00:46:16.982813 tx_last_pass[0][0][6] = 996
3901 00:46:16.983249 tx_win_center[0][0][7] = 984
3902 00:46:16.986325 tx_first_pass[0][0][7] = 972
3903 00:46:16.989413 tx_last_pass[0][0][7] = 997
3904 00:46:16.992654 tx_win_center[0][0][8] = 976
3905 00:46:16.993089 tx_first_pass[0][0][8] = 963
3906 00:46:16.995841 tx_last_pass[0][0][8] = 989
3907 00:46:16.999171 tx_win_center[0][0][9] = 977
3908 00:46:17.002483 tx_first_pass[0][0][9] = 966
3909 00:46:17.006002 tx_last_pass[0][0][9] = 989
3910 00:46:17.006483 tx_win_center[0][0][10] = 980
3911 00:46:17.009389 tx_first_pass[0][0][10] = 968
3912 00:46:17.012984 tx_last_pass[0][0][10] = 992
3913 00:46:17.015974 tx_win_center[0][0][11] = 976
3914 00:46:17.019344 tx_first_pass[0][0][11] = 964
3915 00:46:17.019780 tx_last_pass[0][0][11] = 989
3916 00:46:17.022523 tx_win_center[0][0][12] = 977
3917 00:46:17.026365 tx_first_pass[0][0][12] = 965
3918 00:46:17.029496 tx_last_pass[0][0][12] = 990
3919 00:46:17.032695 tx_win_center[0][0][13] = 977
3920 00:46:17.033171 tx_first_pass[0][0][13] = 965
3921 00:46:17.036280 tx_last_pass[0][0][13] = 989
3922 00:46:17.039478 tx_win_center[0][0][14] = 978
3923 00:46:17.042835 tx_first_pass[0][0][14] = 966
3924 00:46:17.043274 tx_last_pass[0][0][14] = 990
3925 00:46:17.046432 tx_win_center[0][0][15] = 979
3926 00:46:17.049742 tx_first_pass[0][0][15] = 967
3927 00:46:17.053202 tx_last_pass[0][0][15] = 991
3928 00:46:17.056244 tx_win_center[0][1][0] = 988
3929 00:46:17.056688 tx_first_pass[0][1][0] = 976
3930 00:46:17.059834 tx_last_pass[0][1][0] = 1001
3931 00:46:17.062918 tx_win_center[0][1][1] = 987
3932 00:46:17.066397 tx_first_pass[0][1][1] = 976
3933 00:46:17.069727 tx_last_pass[0][1][1] = 999
3934 00:46:17.070165 tx_win_center[0][1][2] = 988
3935 00:46:17.073270 tx_first_pass[0][1][2] = 976
3936 00:46:17.076344 tx_last_pass[0][1][2] = 1000
3937 00:46:17.079892 tx_win_center[0][1][3] = 982
3938 00:46:17.080414 tx_first_pass[0][1][3] = 970
3939 00:46:17.082918 tx_last_pass[0][1][3] = 994
3940 00:46:17.086192 tx_win_center[0][1][4] = 987
3941 00:46:17.089939 tx_first_pass[0][1][4] = 975
3942 00:46:17.093132 tx_last_pass[0][1][4] = 1000
3943 00:46:17.093571 tx_win_center[0][1][5] = 982
3944 00:46:17.096456 tx_first_pass[0][1][5] = 971
3945 00:46:17.099812 tx_last_pass[0][1][5] = 994
3946 00:46:17.103329 tx_win_center[0][1][6] = 983
3947 00:46:17.104080 tx_first_pass[0][1][6] = 971
3948 00:46:17.106350 tx_last_pass[0][1][6] = 996
3949 00:46:17.109728 tx_win_center[0][1][7] = 986
3950 00:46:17.113219 tx_first_pass[0][1][7] = 975
3951 00:46:17.116485 tx_last_pass[0][1][7] = 998
3952 00:46:17.116925 tx_win_center[0][1][8] = 978
3953 00:46:17.119866 tx_first_pass[0][1][8] = 966
3954 00:46:17.123266 tx_last_pass[0][1][8] = 991
3955 00:46:17.126948 tx_win_center[0][1][9] = 979
3956 00:46:17.127386 tx_first_pass[0][1][9] = 968
3957 00:46:17.129915 tx_last_pass[0][1][9] = 991
3958 00:46:17.133040 tx_win_center[0][1][10] = 984
3959 00:46:17.136669 tx_first_pass[0][1][10] = 972
3960 00:46:17.139990 tx_last_pass[0][1][10] = 996
3961 00:46:17.140481 tx_win_center[0][1][11] = 979
3962 00:46:17.143442 tx_first_pass[0][1][11] = 967
3963 00:46:17.147014 tx_last_pass[0][1][11] = 991
3964 00:46:17.149926 tx_win_center[0][1][12] = 980
3965 00:46:17.153137 tx_first_pass[0][1][12] = 968
3966 00:46:17.153652 tx_last_pass[0][1][12] = 992
3967 00:46:17.156511 tx_win_center[0][1][13] = 978
3968 00:46:17.159880 tx_first_pass[0][1][13] = 967
3969 00:46:17.163041 tx_last_pass[0][1][13] = 990
3970 00:46:17.166527 tx_win_center[0][1][14] = 980
3971 00:46:17.166969 tx_first_pass[0][1][14] = 968
3972 00:46:17.169678 tx_last_pass[0][1][14] = 992
3973 00:46:17.173228 tx_win_center[0][1][15] = 982
3974 00:46:17.176676 tx_first_pass[0][1][15] = 970
3975 00:46:17.180053 tx_last_pass[0][1][15] = 994
3976 00:46:17.180580 tx_win_center[1][0][0] = 988
3977 00:46:17.183522 tx_first_pass[1][0][0] = 977
3978 00:46:17.186728 tx_last_pass[1][0][0] = 1000
3979 00:46:17.189734 tx_win_center[1][0][1] = 987
3980 00:46:17.190175 tx_first_pass[1][0][1] = 976
3981 00:46:17.193664 tx_last_pass[1][0][1] = 999
3982 00:46:17.196967 tx_win_center[1][0][2] = 985
3983 00:46:17.199864 tx_first_pass[1][0][2] = 974
3984 00:46:17.203242 tx_last_pass[1][0][2] = 997
3985 00:46:17.203681 tx_win_center[1][0][3] = 983
3986 00:46:17.206614 tx_first_pass[1][0][3] = 971
3987 00:46:17.210335 tx_last_pass[1][0][3] = 995
3988 00:46:17.213596 tx_win_center[1][0][4] = 986
3989 00:46:17.214115 tx_first_pass[1][0][4] = 974
3990 00:46:17.216896 tx_last_pass[1][0][4] = 998
3991 00:46:17.220398 tx_win_center[1][0][5] = 987
3992 00:46:17.223949 tx_first_pass[1][0][5] = 976
3993 00:46:17.224471 tx_last_pass[1][0][5] = 999
3994 00:46:17.226777 tx_win_center[1][0][6] = 988
3995 00:46:17.230126 tx_first_pass[1][0][6] = 977
3996 00:46:17.233692 tx_last_pass[1][0][6] = 1000
3997 00:46:17.236814 tx_win_center[1][0][7] = 986
3998 00:46:17.237253 tx_first_pass[1][0][7] = 975
3999 00:46:17.240425 tx_last_pass[1][0][7] = 998
4000 00:46:17.243621 tx_win_center[1][0][8] = 979
4001 00:46:17.246827 tx_first_pass[1][0][8] = 967
4002 00:46:17.247340 tx_last_pass[1][0][8] = 991
4003 00:46:17.250175 tx_win_center[1][0][9] = 980
4004 00:46:17.253638 tx_first_pass[1][0][9] = 968
4005 00:46:17.257067 tx_last_pass[1][0][9] = 992
4006 00:46:17.260079 tx_win_center[1][0][10] = 980
4007 00:46:17.260515 tx_first_pass[1][0][10] = 969
4008 00:46:17.263837 tx_last_pass[1][0][10] = 992
4009 00:46:17.266912 tx_win_center[1][0][11] = 981
4010 00:46:17.270193 tx_first_pass[1][0][11] = 969
4011 00:46:17.273998 tx_last_pass[1][0][11] = 993
4012 00:46:17.274645 tx_win_center[1][0][12] = 981
4013 00:46:17.277058 tx_first_pass[1][0][12] = 970
4014 00:46:17.280401 tx_last_pass[1][0][12] = 993
4015 00:46:17.283859 tx_win_center[1][0][13] = 981
4016 00:46:17.286632 tx_first_pass[1][0][13] = 970
4017 00:46:17.287077 tx_last_pass[1][0][13] = 992
4018 00:46:17.290291 tx_win_center[1][0][14] = 980
4019 00:46:17.293655 tx_first_pass[1][0][14] = 969
4020 00:46:17.297134 tx_last_pass[1][0][14] = 992
4021 00:46:17.300370 tx_win_center[1][0][15] = 978
4022 00:46:17.300822 tx_first_pass[1][0][15] = 966
4023 00:46:17.303529 tx_last_pass[1][0][15] = 991
4024 00:46:17.306815 tx_win_center[1][1][0] = 990
4025 00:46:17.310258 tx_first_pass[1][1][0] = 977
4026 00:46:17.313654 tx_last_pass[1][1][0] = 1003
4027 00:46:17.314092 tx_win_center[1][1][1] = 988
4028 00:46:17.317116 tx_first_pass[1][1][1] = 976
4029 00:46:17.320559 tx_last_pass[1][1][1] = 1000
4030 00:46:17.323629 tx_win_center[1][1][2] = 985
4031 00:46:17.324071 tx_first_pass[1][1][2] = 973
4032 00:46:17.327165 tx_last_pass[1][1][2] = 998
4033 00:46:17.330404 tx_win_center[1][1][3] = 984
4034 00:46:17.333651 tx_first_pass[1][1][3] = 972
4035 00:46:17.336907 tx_last_pass[1][1][3] = 997
4036 00:46:17.337345 tx_win_center[1][1][4] = 987
4037 00:46:17.340406 tx_first_pass[1][1][4] = 975
4038 00:46:17.343491 tx_last_pass[1][1][4] = 999
4039 00:46:17.346889 tx_win_center[1][1][5] = 989
4040 00:46:17.347401 tx_first_pass[1][1][5] = 977
4041 00:46:17.350255 tx_last_pass[1][1][5] = 1002
4042 00:46:17.353780 tx_win_center[1][1][6] = 990
4043 00:46:17.356961 tx_first_pass[1][1][6] = 977
4044 00:46:17.360239 tx_last_pass[1][1][6] = 1003
4045 00:46:17.360678 tx_win_center[1][1][7] = 987
4046 00:46:17.363565 tx_first_pass[1][1][7] = 976
4047 00:46:17.366941 tx_last_pass[1][1][7] = 999
4048 00:46:17.370415 tx_win_center[1][1][8] = 979
4049 00:46:17.370927 tx_first_pass[1][1][8] = 967
4050 00:46:17.373672 tx_last_pass[1][1][8] = 992
4051 00:46:17.377400 tx_win_center[1][1][9] = 979
4052 00:46:17.380576 tx_first_pass[1][1][9] = 968
4053 00:46:17.381011 tx_last_pass[1][1][9] = 991
4054 00:46:17.383981 tx_win_center[1][1][10] = 980
4055 00:46:17.387354 tx_first_pass[1][1][10] = 968
4056 00:46:17.390945 tx_last_pass[1][1][10] = 992
4057 00:46:17.393892 tx_win_center[1][1][11] = 981
4058 00:46:17.394360 tx_first_pass[1][1][11] = 969
4059 00:46:17.397321 tx_last_pass[1][1][11] = 993
4060 00:46:17.400809 tx_win_center[1][1][12] = 981
4061 00:46:17.403878 tx_first_pass[1][1][12] = 970
4062 00:46:17.407513 tx_last_pass[1][1][12] = 993
4063 00:46:17.407989 tx_win_center[1][1][13] = 980
4064 00:46:17.410535 tx_first_pass[1][1][13] = 969
4065 00:46:17.413894 tx_last_pass[1][1][13] = 992
4066 00:46:17.417722 tx_win_center[1][1][14] = 980
4067 00:46:17.421200 tx_first_pass[1][1][14] = 969
4068 00:46:17.422045 tx_last_pass[1][1][14] = 992
4069 00:46:17.424064 tx_win_center[1][1][15] = 978
4070 00:46:17.427209 tx_first_pass[1][1][15] = 965
4071 00:46:17.430961 tx_last_pass[1][1][15] = 991
4072 00:46:17.431401 dump params rx window
4073 00:46:17.434108 rx_firspass[0][0][0] = 8
4074 00:46:17.437537 rx_lastpass[0][0][0] = 40
4075 00:46:17.437975 rx_firspass[0][0][1] = 6
4076 00:46:17.440995 rx_lastpass[0][0][1] = 39
4077 00:46:17.443917 rx_firspass[0][0][2] = 8
4078 00:46:17.447270 rx_lastpass[0][0][2] = 38
4079 00:46:17.447707 rx_firspass[0][0][3] = -3
4080 00:46:17.450696 rx_lastpass[0][0][3] = 29
4081 00:46:17.454182 rx_firspass[0][0][4] = 6
4082 00:46:17.454689 rx_lastpass[0][0][4] = 38
4083 00:46:17.457509 rx_firspass[0][0][5] = 0
4084 00:46:17.461009 rx_lastpass[0][0][5] = 31
4085 00:46:17.461496 rx_firspass[0][0][6] = 1
4086 00:46:17.464069 rx_lastpass[0][0][6] = 32
4087 00:46:17.467397 rx_firspass[0][0][7] = 3
4088 00:46:17.470878 rx_lastpass[0][0][7] = 32
4089 00:46:17.471319 rx_firspass[0][0][8] = 0
4090 00:46:17.473936 rx_lastpass[0][0][8] = 35
4091 00:46:17.477338 rx_firspass[0][0][9] = 4
4092 00:46:17.477844 rx_lastpass[0][0][9] = 34
4093 00:46:17.480671 rx_firspass[0][0][10] = 6
4094 00:46:17.484113 rx_lastpass[0][0][10] = 37
4095 00:46:17.487703 rx_firspass[0][0][11] = 1
4096 00:46:17.488217 rx_lastpass[0][0][11] = 34
4097 00:46:17.490674 rx_firspass[0][0][12] = 2
4098 00:46:17.493923 rx_lastpass[0][0][12] = 35
4099 00:46:17.494391 rx_firspass[0][0][13] = 1
4100 00:46:17.497711 rx_lastpass[0][0][13] = 30
4101 00:46:17.500738 rx_firspass[0][0][14] = -1
4102 00:46:17.503922 rx_lastpass[0][0][14] = 35
4103 00:46:17.504360 rx_firspass[0][0][15] = 3
4104 00:46:17.507348 rx_lastpass[0][0][15] = 35
4105 00:46:17.510604 rx_firspass[0][1][0] = 7
4106 00:46:17.514109 rx_lastpass[0][1][0] = 42
4107 00:46:17.514606 rx_firspass[0][1][1] = 5
4108 00:46:17.517546 rx_lastpass[0][1][1] = 40
4109 00:46:17.520767 rx_firspass[0][1][2] = 7
4110 00:46:17.521204 rx_lastpass[0][1][2] = 39
4111 00:46:17.524178 rx_firspass[0][1][3] = -4
4112 00:46:17.527226 rx_lastpass[0][1][3] = 31
4113 00:46:17.527662 rx_firspass[0][1][4] = 6
4114 00:46:17.530933 rx_lastpass[0][1][4] = 40
4115 00:46:17.534029 rx_firspass[0][1][5] = -2
4116 00:46:17.537647 rx_lastpass[0][1][5] = 33
4117 00:46:17.538180 rx_firspass[0][1][6] = 1
4118 00:46:17.540891 rx_lastpass[0][1][6] = 35
4119 00:46:17.544225 rx_firspass[0][1][7] = 2
4120 00:46:17.544746 rx_lastpass[0][1][7] = 34
4121 00:46:17.547440 rx_firspass[0][1][8] = -1
4122 00:46:17.551114 rx_lastpass[0][1][8] = 35
4123 00:46:17.551626 rx_firspass[0][1][9] = 2
4124 00:46:17.554494 rx_lastpass[0][1][9] = 36
4125 00:46:17.557479 rx_firspass[0][1][10] = 6
4126 00:46:17.560793 rx_lastpass[0][1][10] = 40
4127 00:46:17.561384 rx_firspass[0][1][11] = 0
4128 00:46:17.564206 rx_lastpass[0][1][11] = 34
4129 00:46:17.567981 rx_firspass[0][1][12] = 2
4130 00:46:17.568422 rx_lastpass[0][1][12] = 37
4131 00:46:17.570808 rx_firspass[0][1][13] = 1
4132 00:46:17.574161 rx_lastpass[0][1][13] = 33
4133 00:46:17.577483 rx_firspass[0][1][14] = 2
4134 00:46:17.578001 rx_lastpass[0][1][14] = 34
4135 00:46:17.580855 rx_firspass[0][1][15] = 3
4136 00:46:17.584416 rx_lastpass[0][1][15] = 38
4137 00:46:17.584920 rx_firspass[1][0][0] = 7
4138 00:46:17.587577 rx_lastpass[1][0][0] = 40
4139 00:46:17.590774 rx_firspass[1][0][1] = 6
4140 00:46:17.594492 rx_lastpass[1][0][1] = 40
4141 00:46:17.595008 rx_firspass[1][0][2] = 0
4142 00:46:17.597916 rx_lastpass[1][0][2] = 34
4143 00:46:17.600739 rx_firspass[1][0][3] = -2
4144 00:46:17.601180 rx_lastpass[1][0][3] = 33
4145 00:46:17.604205 rx_firspass[1][0][4] = 3
4146 00:46:17.607704 rx_lastpass[1][0][4] = 34
4147 00:46:17.608142 rx_firspass[1][0][5] = 8
4148 00:46:17.610967 rx_lastpass[1][0][5] = 40
4149 00:46:17.614188 rx_firspass[1][0][6] = 9
4150 00:46:17.617686 rx_lastpass[1][0][6] = 40
4151 00:46:17.618203 rx_firspass[1][0][7] = 4
4152 00:46:17.621054 rx_lastpass[1][0][7] = 35
4153 00:46:17.624303 rx_firspass[1][0][8] = 1
4154 00:46:17.624822 rx_lastpass[1][0][8] = 35
4155 00:46:17.627714 rx_firspass[1][0][9] = 0
4156 00:46:17.630846 rx_lastpass[1][0][9] = 35
4157 00:46:17.631364 rx_firspass[1][0][10] = 1
4158 00:46:17.634173 rx_lastpass[1][0][10] = 33
4159 00:46:17.637872 rx_firspass[1][0][11] = 2
4160 00:46:17.641063 rx_lastpass[1][0][11] = 36
4161 00:46:17.641578 rx_firspass[1][0][12] = 4
4162 00:46:17.644347 rx_lastpass[1][0][12] = 37
4163 00:46:17.647844 rx_firspass[1][0][13] = 3
4164 00:46:17.651133 rx_lastpass[1][0][13] = 35
4165 00:46:17.651665 rx_firspass[1][0][14] = 3
4166 00:46:17.654562 rx_lastpass[1][0][14] = 35
4167 00:46:17.657510 rx_firspass[1][0][15] = -1
4168 00:46:17.657949 rx_lastpass[1][0][15] = 31
4169 00:46:17.660867 rx_firspass[1][1][0] = 7
4170 00:46:17.664564 rx_lastpass[1][1][0] = 42
4171 00:46:17.667970 rx_firspass[1][1][1] = 6
4172 00:46:17.668495 rx_lastpass[1][1][1] = 41
4173 00:46:17.671034 rx_firspass[1][1][2] = 0
4174 00:46:17.674520 rx_lastpass[1][1][2] = 34
4175 00:46:17.675040 rx_firspass[1][1][3] = -3
4176 00:46:17.677644 rx_lastpass[1][1][3] = 32
4177 00:46:17.681202 rx_firspass[1][1][4] = 3
4178 00:46:17.681720 rx_lastpass[1][1][4] = 37
4179 00:46:17.684393 rx_firspass[1][1][5] = 7
4180 00:46:17.687738 rx_lastpass[1][1][5] = 40
4181 00:46:17.691243 rx_firspass[1][1][6] = 8
4182 00:46:17.691679 rx_lastpass[1][1][6] = 42
4183 00:46:17.694676 rx_firspass[1][1][7] = 3
4184 00:46:17.697809 rx_lastpass[1][1][7] = 38
4185 00:46:17.698279 rx_firspass[1][1][8] = 1
4186 00:46:17.701555 rx_lastpass[1][1][8] = 36
4187 00:46:17.704478 rx_firspass[1][1][9] = 1
4188 00:46:17.704946 rx_lastpass[1][1][9] = 36
4189 00:46:17.707600 rx_firspass[1][1][10] = 1
4190 00:46:17.710878 rx_lastpass[1][1][10] = 36
4191 00:46:17.714517 rx_firspass[1][1][11] = 2
4192 00:46:17.714968 rx_lastpass[1][1][11] = 36
4193 00:46:17.718097 rx_firspass[1][1][12] = 5
4194 00:46:17.721071 rx_lastpass[1][1][12] = 39
4195 00:46:17.721506 rx_firspass[1][1][13] = 4
4196 00:46:17.724283 rx_lastpass[1][1][13] = 38
4197 00:46:17.727831 rx_firspass[1][1][14] = 4
4198 00:46:17.731267 rx_lastpass[1][1][14] = 37
4199 00:46:17.731703 rx_firspass[1][1][15] = -1
4200 00:46:17.734320 rx_lastpass[1][1][15] = 33
4201 00:46:17.738291 dump params clk_delay
4202 00:46:17.738969 clk_delay[0] = 0
4203 00:46:17.741127 clk_delay[1] = 0
4204 00:46:17.741561 dump params dqs_delay
4205 00:46:17.744852 dqs_delay[0][0] = -1
4206 00:46:17.745366 dqs_delay[0][1] = 2
4207 00:46:17.748234 dqs_delay[1][0] = 0
4208 00:46:17.748745 dqs_delay[1][1] = 0
4209 00:46:17.751594 dump params delay_cell_unit = 762
4210 00:46:17.754926 dump source = 0x0
4211 00:46:17.757979 dump params frequency:1200
4212 00:46:17.758532 dump params rank number:2
4213 00:46:17.758879
4214 00:46:17.761579 dump params write leveling
4215 00:46:17.765112 write leveling[0][0][0] = 0x0
4216 00:46:17.767805 write leveling[0][0][1] = 0x0
4217 00:46:17.768243 write leveling[0][1][0] = 0x0
4218 00:46:17.771270 write leveling[0][1][1] = 0x0
4219 00:46:17.774752 write leveling[1][0][0] = 0x0
4220 00:46:17.778017 write leveling[1][0][1] = 0x0
4221 00:46:17.781339 write leveling[1][1][0] = 0x0
4222 00:46:17.781852 write leveling[1][1][1] = 0x0
4223 00:46:17.785025 dump params cbt_cs
4224 00:46:17.785533 cbt_cs[0][0] = 0x0
4225 00:46:17.787853 cbt_cs[0][1] = 0x0
4226 00:46:17.788288 cbt_cs[1][0] = 0x0
4227 00:46:17.791483 cbt_cs[1][1] = 0x0
4228 00:46:17.794434 dump params cbt_mr12
4229 00:46:17.794881 cbt_mr12[0][0] = 0x0
4230 00:46:17.797756 cbt_mr12[0][1] = 0x0
4231 00:46:17.798299 cbt_mr12[1][0] = 0x0
4232 00:46:17.801286 cbt_mr12[1][1] = 0x0
4233 00:46:17.801800 dump params tx window
4234 00:46:17.804918 tx_center_min[0][0][0] = 0
4235 00:46:17.807900 tx_center_max[0][0][0] = 0
4236 00:46:17.811363 tx_center_min[0][0][1] = 0
4237 00:46:17.811802 tx_center_max[0][0][1] = 0
4238 00:46:17.814667 tx_center_min[0][1][0] = 0
4239 00:46:17.817555 tx_center_max[0][1][0] = 0
4240 00:46:17.821287 tx_center_min[0][1][1] = 0
4241 00:46:17.821797 tx_center_max[0][1][1] = 0
4242 00:46:17.824839 tx_center_min[1][0][0] = 0
4243 00:46:17.828115 tx_center_max[1][0][0] = 0
4244 00:46:17.831047 tx_center_min[1][0][1] = 0
4245 00:46:17.831489 tx_center_max[1][0][1] = 0
4246 00:46:17.834655 tx_center_min[1][1][0] = 0
4247 00:46:17.838172 tx_center_max[1][1][0] = 0
4248 00:46:17.838729 tx_center_min[1][1][1] = 0
4249 00:46:17.841396 tx_center_max[1][1][1] = 0
4250 00:46:17.844973 dump params tx window
4251 00:46:17.848442 tx_win_center[0][0][0] = 0
4252 00:46:17.848974 tx_first_pass[0][0][0] = 0
4253 00:46:17.851622 tx_last_pass[0][0][0] = 0
4254 00:46:17.854869 tx_win_center[0][0][1] = 0
4255 00:46:17.855311 tx_first_pass[0][0][1] = 0
4256 00:46:17.857968 tx_last_pass[0][0][1] = 0
4257 00:46:17.861339 tx_win_center[0][0][2] = 0
4258 00:46:17.864683 tx_first_pass[0][0][2] = 0
4259 00:46:17.865121 tx_last_pass[0][0][2] = 0
4260 00:46:17.868312 tx_win_center[0][0][3] = 0
4261 00:46:17.871352 tx_first_pass[0][0][3] = 0
4262 00:46:17.871791 tx_last_pass[0][0][3] = 0
4263 00:46:17.874785 tx_win_center[0][0][4] = 0
4264 00:46:17.878591 tx_first_pass[0][0][4] = 0
4265 00:46:17.881619 tx_last_pass[0][0][4] = 0
4266 00:46:17.882153 tx_win_center[0][0][5] = 0
4267 00:46:17.884995 tx_first_pass[0][0][5] = 0
4268 00:46:17.888480 tx_last_pass[0][0][5] = 0
4269 00:46:17.891751 tx_win_center[0][0][6] = 0
4270 00:46:17.892187 tx_first_pass[0][0][6] = 0
4271 00:46:17.894826 tx_last_pass[0][0][6] = 0
4272 00:46:17.898526 tx_win_center[0][0][7] = 0
4273 00:46:17.899046 tx_first_pass[0][0][7] = 0
4274 00:46:17.901397 tx_last_pass[0][0][7] = 0
4275 00:46:17.904927 tx_win_center[0][0][8] = 0
4276 00:46:17.908138 tx_first_pass[0][0][8] = 0
4277 00:46:17.908647 tx_last_pass[0][0][8] = 0
4278 00:46:17.911622 tx_win_center[0][0][9] = 0
4279 00:46:17.914819 tx_first_pass[0][0][9] = 0
4280 00:46:17.915409 tx_last_pass[0][0][9] = 0
4281 00:46:17.918254 tx_win_center[0][0][10] = 0
4282 00:46:17.921621 tx_first_pass[0][0][10] = 0
4283 00:46:17.925268 tx_last_pass[0][0][10] = 0
4284 00:46:17.925790 tx_win_center[0][0][11] = 0
4285 00:46:17.928485 tx_first_pass[0][0][11] = 0
4286 00:46:17.931527 tx_last_pass[0][0][11] = 0
4287 00:46:17.935469 tx_win_center[0][0][12] = 0
4288 00:46:17.935990 tx_first_pass[0][0][12] = 0
4289 00:46:17.938608 tx_last_pass[0][0][12] = 0
4290 00:46:17.941287 tx_win_center[0][0][13] = 0
4291 00:46:17.945129 tx_first_pass[0][0][13] = 0
4292 00:46:17.945569 tx_last_pass[0][0][13] = 0
4293 00:46:17.948273 tx_win_center[0][0][14] = 0
4294 00:46:17.951359 tx_first_pass[0][0][14] = 0
4295 00:46:17.954713 tx_last_pass[0][0][14] = 0
4296 00:46:17.955148 tx_win_center[0][0][15] = 0
4297 00:46:17.957885 tx_first_pass[0][0][15] = 0
4298 00:46:17.961384 tx_last_pass[0][0][15] = 0
4299 00:46:17.964778 tx_win_center[0][1][0] = 0
4300 00:46:17.965217 tx_first_pass[0][1][0] = 0
4301 00:46:17.968207 tx_last_pass[0][1][0] = 0
4302 00:46:17.971345 tx_win_center[0][1][1] = 0
4303 00:46:17.974546 tx_first_pass[0][1][1] = 0
4304 00:46:17.974853 tx_last_pass[0][1][1] = 0
4305 00:46:17.977835 tx_win_center[0][1][2] = 0
4306 00:46:17.981565 tx_first_pass[0][1][2] = 0
4307 00:46:17.984670 tx_last_pass[0][1][2] = 0
4308 00:46:17.985031 tx_win_center[0][1][3] = 0
4309 00:46:17.988085 tx_first_pass[0][1][3] = 0
4310 00:46:17.991144 tx_last_pass[0][1][3] = 0
4311 00:46:17.991453 tx_win_center[0][1][4] = 0
4312 00:46:17.994552 tx_first_pass[0][1][4] = 0
4313 00:46:17.998008 tx_last_pass[0][1][4] = 0
4314 00:46:18.001515 tx_win_center[0][1][5] = 0
4315 00:46:18.001818 tx_first_pass[0][1][5] = 0
4316 00:46:18.004611 tx_last_pass[0][1][5] = 0
4317 00:46:18.007867 tx_win_center[0][1][6] = 0
4318 00:46:18.008273 tx_first_pass[0][1][6] = 0
4319 00:46:18.011619 tx_last_pass[0][1][6] = 0
4320 00:46:18.014774 tx_win_center[0][1][7] = 0
4321 00:46:18.018390 tx_first_pass[0][1][7] = 0
4322 00:46:18.018822 tx_last_pass[0][1][7] = 0
4323 00:46:18.021920 tx_win_center[0][1][8] = 0
4324 00:46:18.025017 tx_first_pass[0][1][8] = 0
4325 00:46:18.025533 tx_last_pass[0][1][8] = 0
4326 00:46:18.028349 tx_win_center[0][1][9] = 0
4327 00:46:18.031891 tx_first_pass[0][1][9] = 0
4328 00:46:18.034700 tx_last_pass[0][1][9] = 0
4329 00:46:18.035137 tx_win_center[0][1][10] = 0
4330 00:46:18.038285 tx_first_pass[0][1][10] = 0
4331 00:46:18.041867 tx_last_pass[0][1][10] = 0
4332 00:46:18.044929 tx_win_center[0][1][11] = 0
4333 00:46:18.045459 tx_first_pass[0][1][11] = 0
4334 00:46:18.048144 tx_last_pass[0][1][11] = 0
4335 00:46:18.051992 tx_win_center[0][1][12] = 0
4336 00:46:18.055396 tx_first_pass[0][1][12] = 0
4337 00:46:18.055917 tx_last_pass[0][1][12] = 0
4338 00:46:18.058412 tx_win_center[0][1][13] = 0
4339 00:46:18.061967 tx_first_pass[0][1][13] = 0
4340 00:46:18.065136 tx_last_pass[0][1][13] = 0
4341 00:46:18.065573 tx_win_center[0][1][14] = 0
4342 00:46:18.068240 tx_first_pass[0][1][14] = 0
4343 00:46:18.071643 tx_last_pass[0][1][14] = 0
4344 00:46:18.075082 tx_win_center[0][1][15] = 0
4345 00:46:18.075594 tx_first_pass[0][1][15] = 0
4346 00:46:18.078395 tx_last_pass[0][1][15] = 0
4347 00:46:18.081767 tx_win_center[1][0][0] = 0
4348 00:46:18.085498 tx_first_pass[1][0][0] = 0
4349 00:46:18.086001 tx_last_pass[1][0][0] = 0
4350 00:46:18.088711 tx_win_center[1][0][1] = 0
4351 00:46:18.092216 tx_first_pass[1][0][1] = 0
4352 00:46:18.092728 tx_last_pass[1][0][1] = 0
4353 00:46:18.095055 tx_win_center[1][0][2] = 0
4354 00:46:18.098305 tx_first_pass[1][0][2] = 0
4355 00:46:18.101677 tx_last_pass[1][0][2] = 0
4356 00:46:18.102109 tx_win_center[1][0][3] = 0
4357 00:46:18.104742 tx_first_pass[1][0][3] = 0
4358 00:46:18.108423 tx_last_pass[1][0][3] = 0
4359 00:46:18.111668 tx_win_center[1][0][4] = 0
4360 00:46:18.112102 tx_first_pass[1][0][4] = 0
4361 00:46:18.115097 tx_last_pass[1][0][4] = 0
4362 00:46:18.118390 tx_win_center[1][0][5] = 0
4363 00:46:18.118824 tx_first_pass[1][0][5] = 0
4364 00:46:18.121776 tx_last_pass[1][0][5] = 0
4365 00:46:18.125116 tx_win_center[1][0][6] = 0
4366 00:46:18.128697 tx_first_pass[1][0][6] = 0
4367 00:46:18.129208 tx_last_pass[1][0][6] = 0
4368 00:46:18.132000 tx_win_center[1][0][7] = 0
4369 00:46:18.135393 tx_first_pass[1][0][7] = 0
4370 00:46:18.135913 tx_last_pass[1][0][7] = 0
4371 00:46:18.138576 tx_win_center[1][0][8] = 0
4372 00:46:18.141756 tx_first_pass[1][0][8] = 0
4373 00:46:18.145501 tx_last_pass[1][0][8] = 0
4374 00:46:18.146006 tx_win_center[1][0][9] = 0
4375 00:46:18.148519 tx_first_pass[1][0][9] = 0
4376 00:46:18.152189 tx_last_pass[1][0][9] = 0
4377 00:46:18.152710 tx_win_center[1][0][10] = 0
4378 00:46:18.155339 tx_first_pass[1][0][10] = 0
4379 00:46:18.158752 tx_last_pass[1][0][10] = 0
4380 00:46:18.162134 tx_win_center[1][0][11] = 0
4381 00:46:18.162678 tx_first_pass[1][0][11] = 0
4382 00:46:18.165380 tx_last_pass[1][0][11] = 0
4383 00:46:18.168710 tx_win_center[1][0][12] = 0
4384 00:46:18.171908 tx_first_pass[1][0][12] = 0
4385 00:46:18.172348 tx_last_pass[1][0][12] = 0
4386 00:46:18.175086 tx_win_center[1][0][13] = 0
4387 00:46:18.178529 tx_first_pass[1][0][13] = 0
4388 00:46:18.182337 tx_last_pass[1][0][13] = 0
4389 00:46:18.182868 tx_win_center[1][0][14] = 0
4390 00:46:18.185125 tx_first_pass[1][0][14] = 0
4391 00:46:18.188479 tx_last_pass[1][0][14] = 0
4392 00:46:18.192007 tx_win_center[1][0][15] = 0
4393 00:46:18.192455 tx_first_pass[1][0][15] = 0
4394 00:46:18.195457 tx_last_pass[1][0][15] = 0
4395 00:46:18.198394 tx_win_center[1][1][0] = 0
4396 00:46:18.202166 tx_first_pass[1][1][0] = 0
4397 00:46:18.202731 tx_last_pass[1][1][0] = 0
4398 00:46:18.205436 tx_win_center[1][1][1] = 0
4399 00:46:18.208624 tx_first_pass[1][1][1] = 0
4400 00:46:18.211984 tx_last_pass[1][1][1] = 0
4401 00:46:18.212420 tx_win_center[1][1][2] = 0
4402 00:46:18.215292 tx_first_pass[1][1][2] = 0
4403 00:46:18.218535 tx_last_pass[1][1][2] = 0
4404 00:46:18.218972 tx_win_center[1][1][3] = 0
4405 00:46:18.222346 tx_first_pass[1][1][3] = 0
4406 00:46:18.225643 tx_last_pass[1][1][3] = 0
4407 00:46:18.228874 tx_win_center[1][1][4] = 0
4408 00:46:18.229397 tx_first_pass[1][1][4] = 0
4409 00:46:18.232262 tx_last_pass[1][1][4] = 0
4410 00:46:18.235478 tx_win_center[1][1][5] = 0
4411 00:46:18.238433 tx_first_pass[1][1][5] = 0
4412 00:46:18.238879 tx_last_pass[1][1][5] = 0
4413 00:46:18.242316 tx_win_center[1][1][6] = 0
4414 00:46:18.245548 tx_first_pass[1][1][6] = 0
4415 00:46:18.246073 tx_last_pass[1][1][6] = 0
4416 00:46:18.248969 tx_win_center[1][1][7] = 0
4417 00:46:18.252545 tx_first_pass[1][1][7] = 0
4418 00:46:18.255560 tx_last_pass[1][1][7] = 0
4419 00:46:18.256070 tx_win_center[1][1][8] = 0
4420 00:46:18.258934 tx_first_pass[1][1][8] = 0
4421 00:46:18.262519 tx_last_pass[1][1][8] = 0
4422 00:46:18.263049 tx_win_center[1][1][9] = 0
4423 00:46:18.265835 tx_first_pass[1][1][9] = 0
4424 00:46:18.268708 tx_last_pass[1][1][9] = 0
4425 00:46:18.272520 tx_win_center[1][1][10] = 0
4426 00:46:18.272974 tx_first_pass[1][1][10] = 0
4427 00:46:18.275700 tx_last_pass[1][1][10] = 0
4428 00:46:18.278833 tx_win_center[1][1][11] = 0
4429 00:46:18.282245 tx_first_pass[1][1][11] = 0
4430 00:46:18.282783 tx_last_pass[1][1][11] = 0
4431 00:46:18.285366 tx_win_center[1][1][12] = 0
4432 00:46:18.289025 tx_first_pass[1][1][12] = 0
4433 00:46:18.292142 tx_last_pass[1][1][12] = 0
4434 00:46:18.292594 tx_win_center[1][1][13] = 0
4435 00:46:18.295661 tx_first_pass[1][1][13] = 0
4436 00:46:18.299073 tx_last_pass[1][1][13] = 0
4437 00:46:18.302323 tx_win_center[1][1][14] = 0
4438 00:46:18.302776 tx_first_pass[1][1][14] = 0
4439 00:46:18.305823 tx_last_pass[1][1][14] = 0
4440 00:46:18.308974 tx_win_center[1][1][15] = 0
4441 00:46:18.312414 tx_first_pass[1][1][15] = 0
4442 00:46:18.312867 tx_last_pass[1][1][15] = 0
4443 00:46:18.315826 dump params rx window
4444 00:46:18.319135 rx_firspass[0][0][0] = 0
4445 00:46:18.319584 rx_lastpass[0][0][0] = 0
4446 00:46:18.322487 rx_firspass[0][0][1] = 0
4447 00:46:18.325909 rx_lastpass[0][0][1] = 0
4448 00:46:18.326432 rx_firspass[0][0][2] = 0
4449 00:46:18.329139 rx_lastpass[0][0][2] = 0
4450 00:46:18.332569 rx_firspass[0][0][3] = 0
4451 00:46:18.333085 rx_lastpass[0][0][3] = 0
4452 00:46:18.335917 rx_firspass[0][0][4] = 0
4453 00:46:18.339082 rx_lastpass[0][0][4] = 0
4454 00:46:18.339533 rx_firspass[0][0][5] = 0
4455 00:46:18.342421 rx_lastpass[0][0][5] = 0
4456 00:46:18.345825 rx_firspass[0][0][6] = 0
4457 00:46:18.346357 rx_lastpass[0][0][6] = 0
4458 00:46:18.349113 rx_firspass[0][0][7] = 0
4459 00:46:18.352596 rx_lastpass[0][0][7] = 0
4460 00:46:18.353104 rx_firspass[0][0][8] = 0
4461 00:46:18.355832 rx_lastpass[0][0][8] = 0
4462 00:46:18.359106 rx_firspass[0][0][9] = 0
4463 00:46:18.362564 rx_lastpass[0][0][9] = 0
4464 00:46:18.363134 rx_firspass[0][0][10] = 0
4465 00:46:18.365853 rx_lastpass[0][0][10] = 0
4466 00:46:18.369666 rx_firspass[0][0][11] = 0
4467 00:46:18.370103 rx_lastpass[0][0][11] = 0
4468 00:46:18.372570 rx_firspass[0][0][12] = 0
4469 00:46:18.376159 rx_lastpass[0][0][12] = 0
4470 00:46:18.376655 rx_firspass[0][0][13] = 0
4471 00:46:18.379230 rx_lastpass[0][0][13] = 0
4472 00:46:18.382798 rx_firspass[0][0][14] = 0
4473 00:46:18.386045 rx_lastpass[0][0][14] = 0
4474 00:46:18.386526 rx_firspass[0][0][15] = 0
4475 00:46:18.389170 rx_lastpass[0][0][15] = 0
4476 00:46:18.392653 rx_firspass[0][1][0] = 0
4477 00:46:18.393102 rx_lastpass[0][1][0] = 0
4478 00:46:18.396381 rx_firspass[0][1][1] = 0
4479 00:46:18.399313 rx_lastpass[0][1][1] = 0
4480 00:46:18.399763 rx_firspass[0][1][2] = 0
4481 00:46:18.403003 rx_lastpass[0][1][2] = 0
4482 00:46:18.406308 rx_firspass[0][1][3] = 0
4483 00:46:18.409337 rx_lastpass[0][1][3] = 0
4484 00:46:18.409784 rx_firspass[0][1][4] = 0
4485 00:46:18.412823 rx_lastpass[0][1][4] = 0
4486 00:46:18.416410 rx_firspass[0][1][5] = 0
4487 00:46:18.416935 rx_lastpass[0][1][5] = 0
4488 00:46:18.419301 rx_firspass[0][1][6] = 0
4489 00:46:18.422517 rx_lastpass[0][1][6] = 0
4490 00:46:18.422962 rx_firspass[0][1][7] = 0
4491 00:46:18.426005 rx_lastpass[0][1][7] = 0
4492 00:46:18.429400 rx_firspass[0][1][8] = 0
4493 00:46:18.429849 rx_lastpass[0][1][8] = 0
4494 00:46:18.432618 rx_firspass[0][1][9] = 0
4495 00:46:18.436131 rx_lastpass[0][1][9] = 0
4496 00:46:18.436579 rx_firspass[0][1][10] = 0
4497 00:46:18.439258 rx_lastpass[0][1][10] = 0
4498 00:46:18.442900 rx_firspass[0][1][11] = 0
4499 00:46:18.446320 rx_lastpass[0][1][11] = 0
4500 00:46:18.446773 rx_firspass[0][1][12] = 0
4501 00:46:18.449385 rx_lastpass[0][1][12] = 0
4502 00:46:18.452842 rx_firspass[0][1][13] = 0
4503 00:46:18.453327 rx_lastpass[0][1][13] = 0
4504 00:46:18.456369 rx_firspass[0][1][14] = 0
4505 00:46:18.459390 rx_lastpass[0][1][14] = 0
4506 00:46:18.459800 rx_firspass[0][1][15] = 0
4507 00:46:18.462825 rx_lastpass[0][1][15] = 0
4508 00:46:18.466524 rx_firspass[1][0][0] = 0
4509 00:46:18.469481 rx_lastpass[1][0][0] = 0
4510 00:46:18.469875 rx_firspass[1][0][1] = 0
4511 00:46:18.472586 rx_lastpass[1][0][1] = 0
4512 00:46:18.476307 rx_firspass[1][0][2] = 0
4513 00:46:18.476788 rx_lastpass[1][0][2] = 0
4514 00:46:18.479665 rx_firspass[1][0][3] = 0
4515 00:46:18.482776 rx_lastpass[1][0][3] = 0
4516 00:46:18.483168 rx_firspass[1][0][4] = 0
4517 00:46:18.486090 rx_lastpass[1][0][4] = 0
4518 00:46:18.489756 rx_firspass[1][0][5] = 0
4519 00:46:18.490150 rx_lastpass[1][0][5] = 0
4520 00:46:18.493085 rx_firspass[1][0][6] = 0
4521 00:46:18.496487 rx_lastpass[1][0][6] = 0
4522 00:46:18.496908 rx_firspass[1][0][7] = 0
4523 00:46:18.499471 rx_lastpass[1][0][7] = 0
4524 00:46:18.502739 rx_firspass[1][0][8] = 0
4525 00:46:18.506745 rx_lastpass[1][0][8] = 0
4526 00:46:18.507245 rx_firspass[1][0][9] = 0
4527 00:46:18.509530 rx_lastpass[1][0][9] = 0
4528 00:46:18.512640 rx_firspass[1][0][10] = 0
4529 00:46:18.513070 rx_lastpass[1][0][10] = 0
4530 00:46:18.516148 rx_firspass[1][0][11] = 0
4531 00:46:18.519470 rx_lastpass[1][0][11] = 0
4532 00:46:18.519965 rx_firspass[1][0][12] = 0
4533 00:46:18.523071 rx_lastpass[1][0][12] = 0
4534 00:46:18.526107 rx_firspass[1][0][13] = 0
4535 00:46:18.529376 rx_lastpass[1][0][13] = 0
4536 00:46:18.529825 rx_firspass[1][0][14] = 0
4537 00:46:18.532951 rx_lastpass[1][0][14] = 0
4538 00:46:18.536287 rx_firspass[1][0][15] = 0
4539 00:46:18.536785 rx_lastpass[1][0][15] = 0
4540 00:46:18.539727 rx_firspass[1][1][0] = 0
4541 00:46:18.542872 rx_lastpass[1][1][0] = 0
4542 00:46:18.543284 rx_firspass[1][1][1] = 0
4543 00:46:18.546138 rx_lastpass[1][1][1] = 0
4544 00:46:18.549402 rx_firspass[1][1][2] = 0
4545 00:46:18.553055 rx_lastpass[1][1][2] = 0
4546 00:46:18.553529 rx_firspass[1][1][3] = 0
4547 00:46:18.556382 rx_lastpass[1][1][3] = 0
4548 00:46:18.559516 rx_firspass[1][1][4] = 0
4549 00:46:18.559928 rx_lastpass[1][1][4] = 0
4550 00:46:18.562884 rx_firspass[1][1][5] = 0
4551 00:46:18.566566 rx_lastpass[1][1][5] = 0
4552 00:46:18.567050 rx_firspass[1][1][6] = 0
4553 00:46:18.569582 rx_lastpass[1][1][6] = 0
4554 00:46:18.572897 rx_firspass[1][1][7] = 0
4555 00:46:18.573306 rx_lastpass[1][1][7] = 0
4556 00:46:18.576121 rx_firspass[1][1][8] = 0
4557 00:46:18.579522 rx_lastpass[1][1][8] = 0
4558 00:46:18.580017 rx_firspass[1][1][9] = 0
4559 00:46:18.582779 rx_lastpass[1][1][9] = 0
4560 00:46:18.585973 rx_firspass[1][1][10] = 0
4561 00:46:18.589773 rx_lastpass[1][1][10] = 0
4562 00:46:18.590180 rx_firspass[1][1][11] = 0
4563 00:46:18.592945 rx_lastpass[1][1][11] = 0
4564 00:46:18.596284 rx_firspass[1][1][12] = 0
4565 00:46:18.596694 rx_lastpass[1][1][12] = 0
4566 00:46:18.599731 rx_firspass[1][1][13] = 0
4567 00:46:18.602731 rx_lastpass[1][1][13] = 0
4568 00:46:18.606450 rx_firspass[1][1][14] = 0
4569 00:46:18.606858 rx_lastpass[1][1][14] = 0
4570 00:46:18.609522 rx_firspass[1][1][15] = 0
4571 00:46:18.612987 rx_lastpass[1][1][15] = 0
4572 00:46:18.613395 dump params clk_delay
4573 00:46:18.616395 clk_delay[0] = 0
4574 00:46:18.616868 clk_delay[1] = 0
4575 00:46:18.619575 dump params dqs_delay
4576 00:46:18.620076 dqs_delay[0][0] = 0
4577 00:46:18.622949 dqs_delay[0][1] = 0
4578 00:46:18.623395 dqs_delay[1][0] = 0
4579 00:46:18.626461 dqs_delay[1][1] = 0
4580 00:46:18.629366 dump params delay_cell_unit = 762
4581 00:46:18.629762 dump source = 0x0
4582 00:46:18.632947 dump params frequency:800
4583 00:46:18.636172 dump params rank number:2
4584 00:46:18.636567
4585 00:46:18.637015 dump params write leveling
4586 00:46:18.639618 write leveling[0][0][0] = 0x0
4587 00:46:18.643140 write leveling[0][0][1] = 0x0
4588 00:46:18.646467 write leveling[0][1][0] = 0x0
4589 00:46:18.649637 write leveling[0][1][1] = 0x0
4590 00:46:18.650031 write leveling[1][0][0] = 0x0
4591 00:46:18.652817 write leveling[1][0][1] = 0x0
4592 00:46:18.656212 write leveling[1][1][0] = 0x0
4593 00:46:18.659576 write leveling[1][1][1] = 0x0
4594 00:46:18.659970 dump params cbt_cs
4595 00:46:18.662813 cbt_cs[0][0] = 0x0
4596 00:46:18.663319 cbt_cs[0][1] = 0x0
4597 00:46:18.666521 cbt_cs[1][0] = 0x0
4598 00:46:18.666912 cbt_cs[1][1] = 0x0
4599 00:46:18.669608 dump params cbt_mr12
4600 00:46:18.672949 cbt_mr12[0][0] = 0x0
4601 00:46:18.673345 cbt_mr12[0][1] = 0x0
4602 00:46:18.676308 cbt_mr12[1][0] = 0x0
4603 00:46:18.676703 cbt_mr12[1][1] = 0x0
4604 00:46:18.679627 dump params tx window
4605 00:46:18.682963 tx_center_min[0][0][0] = 0
4606 00:46:18.683359 tx_center_max[0][0][0] = 0
4607 00:46:18.686692 tx_center_min[0][0][1] = 0
4608 00:46:18.689795 tx_center_max[0][0][1] = 0
4609 00:46:18.692876 tx_center_min[0][1][0] = 0
4610 00:46:18.693274 tx_center_max[0][1][0] = 0
4611 00:46:18.696432 tx_center_min[0][1][1] = 0
4612 00:46:18.699638 tx_center_max[0][1][1] = 0
4613 00:46:18.702879 tx_center_min[1][0][0] = 0
4614 00:46:18.703275 tx_center_max[1][0][0] = 0
4615 00:46:18.706125 tx_center_min[1][0][1] = 0
4616 00:46:18.709725 tx_center_max[1][0][1] = 0
4617 00:46:18.710120 tx_center_min[1][1][0] = 0
4618 00:46:18.712918 tx_center_max[1][1][0] = 0
4619 00:46:18.716450 tx_center_min[1][1][1] = 0
4620 00:46:18.719476 tx_center_max[1][1][1] = 0
4621 00:46:18.719877 dump params tx window
4622 00:46:18.722753 tx_win_center[0][0][0] = 0
4623 00:46:18.726085 tx_first_pass[0][0][0] = 0
4624 00:46:18.726509 tx_last_pass[0][0][0] = 0
4625 00:46:18.729764 tx_win_center[0][0][1] = 0
4626 00:46:18.732906 tx_first_pass[0][0][1] = 0
4627 00:46:18.736851 tx_last_pass[0][0][1] = 0
4628 00:46:18.737337 tx_win_center[0][0][2] = 0
4629 00:46:18.739558 tx_first_pass[0][0][2] = 0
4630 00:46:18.742963 tx_last_pass[0][0][2] = 0
4631 00:46:18.746490 tx_win_center[0][0][3] = 0
4632 00:46:18.746886 tx_first_pass[0][0][3] = 0
4633 00:46:18.749585 tx_last_pass[0][0][3] = 0
4634 00:46:18.753238 tx_win_center[0][0][4] = 0
4635 00:46:18.753722 tx_first_pass[0][0][4] = 0
4636 00:46:18.756628 tx_last_pass[0][0][4] = 0
4637 00:46:18.759760 tx_win_center[0][0][5] = 0
4638 00:46:18.763273 tx_first_pass[0][0][5] = 0
4639 00:46:18.763756 tx_last_pass[0][0][5] = 0
4640 00:46:18.766265 tx_win_center[0][0][6] = 0
4641 00:46:18.769744 tx_first_pass[0][0][6] = 0
4642 00:46:18.770146 tx_last_pass[0][0][6] = 0
4643 00:46:18.773272 tx_win_center[0][0][7] = 0
4644 00:46:18.776645 tx_first_pass[0][0][7] = 0
4645 00:46:18.780059 tx_last_pass[0][0][7] = 0
4646 00:46:18.780470 tx_win_center[0][0][8] = 0
4647 00:46:18.783392 tx_first_pass[0][0][8] = 0
4648 00:46:18.786556 tx_last_pass[0][0][8] = 0
4649 00:46:18.786969 tx_win_center[0][0][9] = 0
4650 00:46:18.789896 tx_first_pass[0][0][9] = 0
4651 00:46:18.793377 tx_last_pass[0][0][9] = 0
4652 00:46:18.796662 tx_win_center[0][0][10] = 0
4653 00:46:18.797070 tx_first_pass[0][0][10] = 0
4654 00:46:18.800054 tx_last_pass[0][0][10] = 0
4655 00:46:18.803095 tx_win_center[0][0][11] = 0
4656 00:46:18.807295 tx_first_pass[0][0][11] = 0
4657 00:46:18.807824 tx_last_pass[0][0][11] = 0
4658 00:46:18.809867 tx_win_center[0][0][12] = 0
4659 00:46:18.813112 tx_first_pass[0][0][12] = 0
4660 00:46:18.816667 tx_last_pass[0][0][12] = 0
4661 00:46:18.817072 tx_win_center[0][0][13] = 0
4662 00:46:18.819886 tx_first_pass[0][0][13] = 0
4663 00:46:18.823402 tx_last_pass[0][0][13] = 0
4664 00:46:18.826562 tx_win_center[0][0][14] = 0
4665 00:46:18.826967 tx_first_pass[0][0][14] = 0
4666 00:46:18.829815 tx_last_pass[0][0][14] = 0
4667 00:46:18.833130 tx_win_center[0][0][15] = 0
4668 00:46:18.836412 tx_first_pass[0][0][15] = 0
4669 00:46:18.836816 tx_last_pass[0][0][15] = 0
4670 00:46:18.839810 tx_win_center[0][1][0] = 0
4671 00:46:18.843362 tx_first_pass[0][1][0] = 0
4672 00:46:18.846850 tx_last_pass[0][1][0] = 0
4673 00:46:18.847254 tx_win_center[0][1][1] = 0
4674 00:46:18.849871 tx_first_pass[0][1][1] = 0
4675 00:46:18.853496 tx_last_pass[0][1][1] = 0
4676 00:46:18.853945 tx_win_center[0][1][2] = 0
4677 00:46:18.856924 tx_first_pass[0][1][2] = 0
4678 00:46:18.859978 tx_last_pass[0][1][2] = 0
4679 00:46:18.863733 tx_win_center[0][1][3] = 0
4680 00:46:18.864209 tx_first_pass[0][1][3] = 0
4681 00:46:18.866756 tx_last_pass[0][1][3] = 0
4682 00:46:18.870513 tx_win_center[0][1][4] = 0
4683 00:46:18.873458 tx_first_pass[0][1][4] = 0
4684 00:46:18.873860 tx_last_pass[0][1][4] = 0
4685 00:46:18.877006 tx_win_center[0][1][5] = 0
4686 00:46:18.880076 tx_first_pass[0][1][5] = 0
4687 00:46:18.880481 tx_last_pass[0][1][5] = 0
4688 00:46:18.883599 tx_win_center[0][1][6] = 0
4689 00:46:18.886880 tx_first_pass[0][1][6] = 0
4690 00:46:18.890160 tx_last_pass[0][1][6] = 0
4691 00:46:18.890598 tx_win_center[0][1][7] = 0
4692 00:46:18.893454 tx_first_pass[0][1][7] = 0
4693 00:46:18.896820 tx_last_pass[0][1][7] = 0
4694 00:46:18.897223 tx_win_center[0][1][8] = 0
4695 00:46:18.900337 tx_first_pass[0][1][8] = 0
4696 00:46:18.903731 tx_last_pass[0][1][8] = 0
4697 00:46:18.906940 tx_win_center[0][1][9] = 0
4698 00:46:18.907345 tx_first_pass[0][1][9] = 0
4699 00:46:18.910597 tx_last_pass[0][1][9] = 0
4700 00:46:18.913710 tx_win_center[0][1][10] = 0
4701 00:46:18.917311 tx_first_pass[0][1][10] = 0
4702 00:46:18.917715 tx_last_pass[0][1][10] = 0
4703 00:46:18.920333 tx_win_center[0][1][11] = 0
4704 00:46:18.923698 tx_first_pass[0][1][11] = 0
4705 00:46:18.926887 tx_last_pass[0][1][11] = 0
4706 00:46:18.927296 tx_win_center[0][1][12] = 0
4707 00:46:18.930267 tx_first_pass[0][1][12] = 0
4708 00:46:18.933789 tx_last_pass[0][1][12] = 0
4709 00:46:18.934308 tx_win_center[0][1][13] = 0
4710 00:46:18.937012 tx_first_pass[0][1][13] = 0
4711 00:46:18.940495 tx_last_pass[0][1][13] = 0
4712 00:46:18.943740 tx_win_center[0][1][14] = 0
4713 00:46:18.947007 tx_first_pass[0][1][14] = 0
4714 00:46:18.947411 tx_last_pass[0][1][14] = 0
4715 00:46:18.950726 tx_win_center[0][1][15] = 0
4716 00:46:18.954133 tx_first_pass[0][1][15] = 0
4717 00:46:18.954670 tx_last_pass[0][1][15] = 0
4718 00:46:18.957418 tx_win_center[1][0][0] = 0
4719 00:46:18.960515 tx_first_pass[1][0][0] = 0
4720 00:46:18.963917 tx_last_pass[1][0][0] = 0
4721 00:46:18.964328 tx_win_center[1][0][1] = 0
4722 00:46:18.967505 tx_first_pass[1][0][1] = 0
4723 00:46:18.970730 tx_last_pass[1][0][1] = 0
4724 00:46:18.971133 tx_win_center[1][0][2] = 0
4725 00:46:18.973876 tx_first_pass[1][0][2] = 0
4726 00:46:18.977533 tx_last_pass[1][0][2] = 0
4727 00:46:18.980886 tx_win_center[1][0][3] = 0
4728 00:46:18.981372 tx_first_pass[1][0][3] = 0
4729 00:46:18.984301 tx_last_pass[1][0][3] = 0
4730 00:46:18.987224 tx_win_center[1][0][4] = 0
4731 00:46:18.990774 tx_first_pass[1][0][4] = 0
4732 00:46:18.991178 tx_last_pass[1][0][4] = 0
4733 00:46:18.994248 tx_win_center[1][0][5] = 0
4734 00:46:18.997679 tx_first_pass[1][0][5] = 0
4735 00:46:18.998187 tx_last_pass[1][0][5] = 0
4736 00:46:19.000737 tx_win_center[1][0][6] = 0
4737 00:46:19.003822 tx_first_pass[1][0][6] = 0
4738 00:46:19.007448 tx_last_pass[1][0][6] = 0
4739 00:46:19.007935 tx_win_center[1][0][7] = 0
4740 00:46:19.010579 tx_first_pass[1][0][7] = 0
4741 00:46:19.014165 tx_last_pass[1][0][7] = 0
4742 00:46:19.014615 tx_win_center[1][0][8] = 0
4743 00:46:19.017514 tx_first_pass[1][0][8] = 0
4744 00:46:19.020924 tx_last_pass[1][0][8] = 0
4745 00:46:19.024329 tx_win_center[1][0][9] = 0
4746 00:46:19.024736 tx_first_pass[1][0][9] = 0
4747 00:46:19.027482 tx_last_pass[1][0][9] = 0
4748 00:46:19.030834 tx_win_center[1][0][10] = 0
4749 00:46:19.034186 tx_first_pass[1][0][10] = 0
4750 00:46:19.034623 tx_last_pass[1][0][10] = 0
4751 00:46:19.037561 tx_win_center[1][0][11] = 0
4752 00:46:19.040926 tx_first_pass[1][0][11] = 0
4753 00:46:19.044410 tx_last_pass[1][0][11] = 0
4754 00:46:19.044817 tx_win_center[1][0][12] = 0
4755 00:46:19.047564 tx_first_pass[1][0][12] = 0
4756 00:46:19.051168 tx_last_pass[1][0][12] = 0
4757 00:46:19.054296 tx_win_center[1][0][13] = 0
4758 00:46:19.054783 tx_first_pass[1][0][13] = 0
4759 00:46:19.057618 tx_last_pass[1][0][13] = 0
4760 00:46:19.061073 tx_win_center[1][0][14] = 0
4761 00:46:19.064139 tx_first_pass[1][0][14] = 0
4762 00:46:19.064547 tx_last_pass[1][0][14] = 0
4763 00:46:19.067685 tx_win_center[1][0][15] = 0
4764 00:46:19.070943 tx_first_pass[1][0][15] = 0
4765 00:46:19.074347 tx_last_pass[1][0][15] = 0
4766 00:46:19.074830 tx_win_center[1][1][0] = 0
4767 00:46:19.077849 tx_first_pass[1][1][0] = 0
4768 00:46:19.080738 tx_last_pass[1][1][0] = 0
4769 00:46:19.081218 tx_win_center[1][1][1] = 0
4770 00:46:19.084337 tx_first_pass[1][1][1] = 0
4771 00:46:19.087736 tx_last_pass[1][1][1] = 0
4772 00:46:19.090844 tx_win_center[1][1][2] = 0
4773 00:46:19.091246 tx_first_pass[1][1][2] = 0
4774 00:46:19.094309 tx_last_pass[1][1][2] = 0
4775 00:46:19.097865 tx_win_center[1][1][3] = 0
4776 00:46:19.100778 tx_first_pass[1][1][3] = 0
4777 00:46:19.101187 tx_last_pass[1][1][3] = 0
4778 00:46:19.104384 tx_win_center[1][1][4] = 0
4779 00:46:19.107707 tx_first_pass[1][1][4] = 0
4780 00:46:19.108111 tx_last_pass[1][1][4] = 0
4781 00:46:19.111017 tx_win_center[1][1][5] = 0
4782 00:46:19.114159 tx_first_pass[1][1][5] = 0
4783 00:46:19.117564 tx_last_pass[1][1][5] = 0
4784 00:46:19.117969 tx_win_center[1][1][6] = 0
4785 00:46:19.121066 tx_first_pass[1][1][6] = 0
4786 00:46:19.124666 tx_last_pass[1][1][6] = 0
4787 00:46:19.125267 tx_win_center[1][1][7] = 0
4788 00:46:19.127800 tx_first_pass[1][1][7] = 0
4789 00:46:19.130854 tx_last_pass[1][1][7] = 0
4790 00:46:19.134601 tx_win_center[1][1][8] = 0
4791 00:46:19.135086 tx_first_pass[1][1][8] = 0
4792 00:46:19.137898 tx_last_pass[1][1][8] = 0
4793 00:46:19.141120 tx_win_center[1][1][9] = 0
4794 00:46:19.144653 tx_first_pass[1][1][9] = 0
4795 00:46:19.145060 tx_last_pass[1][1][9] = 0
4796 00:46:19.148002 tx_win_center[1][1][10] = 0
4797 00:46:19.151114 tx_first_pass[1][1][10] = 0
4798 00:46:19.151524 tx_last_pass[1][1][10] = 0
4799 00:46:19.154399 tx_win_center[1][1][11] = 0
4800 00:46:19.158068 tx_first_pass[1][1][11] = 0
4801 00:46:19.161149 tx_last_pass[1][1][11] = 0
4802 00:46:19.161559 tx_win_center[1][1][12] = 0
4803 00:46:19.164683 tx_first_pass[1][1][12] = 0
4804 00:46:19.168144 tx_last_pass[1][1][12] = 0
4805 00:46:19.171707 tx_win_center[1][1][13] = 0
4806 00:46:19.172194 tx_first_pass[1][1][13] = 0
4807 00:46:19.174787 tx_last_pass[1][1][13] = 0
4808 00:46:19.178238 tx_win_center[1][1][14] = 0
4809 00:46:19.181789 tx_first_pass[1][1][14] = 0
4810 00:46:19.182316 tx_last_pass[1][1][14] = 0
4811 00:46:19.184993 tx_win_center[1][1][15] = 0
4812 00:46:19.188193 tx_first_pass[1][1][15] = 0
4813 00:46:19.191596 tx_last_pass[1][1][15] = 0
4814 00:46:19.192000 dump params rx window
4815 00:46:19.195128 rx_firspass[0][0][0] = 0
4816 00:46:19.198357 rx_lastpass[0][0][0] = 0
4817 00:46:19.198841 rx_firspass[0][0][1] = 0
4818 00:46:19.201378 rx_lastpass[0][0][1] = 0
4819 00:46:19.204883 rx_firspass[0][0][2] = 0
4820 00:46:19.205367 rx_lastpass[0][0][2] = 0
4821 00:46:19.208139 rx_firspass[0][0][3] = 0
4822 00:46:19.211434 rx_lastpass[0][0][3] = 0
4823 00:46:19.211840 rx_firspass[0][0][4] = 0
4824 00:46:19.214658 rx_lastpass[0][0][4] = 0
4825 00:46:19.218045 rx_firspass[0][0][5] = 0
4826 00:46:19.218488 rx_lastpass[0][0][5] = 0
4827 00:46:19.221407 rx_firspass[0][0][6] = 0
4828 00:46:19.224615 rx_lastpass[0][0][6] = 0
4829 00:46:19.225018 rx_firspass[0][0][7] = 0
4830 00:46:19.228021 rx_lastpass[0][0][7] = 0
4831 00:46:19.231337 rx_firspass[0][0][8] = 0
4832 00:46:19.234569 rx_lastpass[0][0][8] = 0
4833 00:46:19.234973 rx_firspass[0][0][9] = 0
4834 00:46:19.237868 rx_lastpass[0][0][9] = 0
4835 00:46:19.241475 rx_firspass[0][0][10] = 0
4836 00:46:19.241872 rx_lastpass[0][0][10] = 0
4837 00:46:19.244835 rx_firspass[0][0][11] = 0
4838 00:46:19.248096 rx_lastpass[0][0][11] = 0
4839 00:46:19.248496 rx_firspass[0][0][12] = 0
4840 00:46:19.251228 rx_lastpass[0][0][12] = 0
4841 00:46:19.254699 rx_firspass[0][0][13] = 0
4842 00:46:19.257968 rx_lastpass[0][0][13] = 0
4843 00:46:19.258268 rx_firspass[0][0][14] = 0
4844 00:46:19.261274 rx_lastpass[0][0][14] = 0
4845 00:46:19.264806 rx_firspass[0][0][15] = 0
4846 00:46:19.265047 rx_lastpass[0][0][15] = 0
4847 00:46:19.268045 rx_firspass[0][1][0] = 0
4848 00:46:19.271354 rx_lastpass[0][1][0] = 0
4849 00:46:19.271577 rx_firspass[0][1][1] = 0
4850 00:46:19.274683 rx_lastpass[0][1][1] = 0
4851 00:46:19.277960 rx_firspass[0][1][2] = 0
4852 00:46:19.278135 rx_lastpass[0][1][2] = 0
4853 00:46:19.281647 rx_firspass[0][1][3] = 0
4854 00:46:19.284959 rx_lastpass[0][1][3] = 0
4855 00:46:19.288090 rx_firspass[0][1][4] = 0
4856 00:46:19.288319 rx_lastpass[0][1][4] = 0
4857 00:46:19.291355 rx_firspass[0][1][5] = 0
4858 00:46:19.295194 rx_lastpass[0][1][5] = 0
4859 00:46:19.295470 rx_firspass[0][1][6] = 0
4860 00:46:19.298401 rx_lastpass[0][1][6] = 0
4861 00:46:19.301504 rx_firspass[0][1][7] = 0
4862 00:46:19.301756 rx_lastpass[0][1][7] = 0
4863 00:46:19.305157 rx_firspass[0][1][8] = 0
4864 00:46:19.308480 rx_lastpass[0][1][8] = 0
4865 00:46:19.308963 rx_firspass[0][1][9] = 0
4866 00:46:19.311762 rx_lastpass[0][1][9] = 0
4867 00:46:19.315167 rx_firspass[0][1][10] = 0
4868 00:46:19.315818 rx_lastpass[0][1][10] = 0
4869 00:46:19.318735 rx_firspass[0][1][11] = 0
4870 00:46:19.321909 rx_lastpass[0][1][11] = 0
4871 00:46:19.325200 rx_firspass[0][1][12] = 0
4872 00:46:19.325710 rx_lastpass[0][1][12] = 0
4873 00:46:19.328601 rx_firspass[0][1][13] = 0
4874 00:46:19.332013 rx_lastpass[0][1][13] = 0
4875 00:46:19.332667 rx_firspass[0][1][14] = 0
4876 00:46:19.335367 rx_lastpass[0][1][14] = 0
4877 00:46:19.338291 rx_firspass[0][1][15] = 0
4878 00:46:19.341646 rx_lastpass[0][1][15] = 0
4879 00:46:19.342084 rx_firspass[1][0][0] = 0
4880 00:46:19.344976 rx_lastpass[1][0][0] = 0
4881 00:46:19.348557 rx_firspass[1][0][1] = 0
4882 00:46:19.349072 rx_lastpass[1][0][1] = 0
4883 00:46:19.351850 rx_firspass[1][0][2] = 0
4884 00:46:19.355205 rx_lastpass[1][0][2] = 0
4885 00:46:19.355718 rx_firspass[1][0][3] = 0
4886 00:46:19.358343 rx_lastpass[1][0][3] = 0
4887 00:46:19.361687 rx_firspass[1][0][4] = 0
4888 00:46:19.362124 rx_lastpass[1][0][4] = 0
4889 00:46:19.364958 rx_firspass[1][0][5] = 0
4890 00:46:19.368664 rx_lastpass[1][0][5] = 0
4891 00:46:19.369103 rx_firspass[1][0][6] = 0
4892 00:46:19.372170 rx_lastpass[1][0][6] = 0
4893 00:46:19.375088 rx_firspass[1][0][7] = 0
4894 00:46:19.375533 rx_lastpass[1][0][7] = 0
4895 00:46:19.378878 rx_firspass[1][0][8] = 0
4896 00:46:19.382034 rx_lastpass[1][0][8] = 0
4897 00:46:19.382590 rx_firspass[1][0][9] = 0
4898 00:46:19.385250 rx_lastpass[1][0][9] = 0
4899 00:46:19.388863 rx_firspass[1][0][10] = 0
4900 00:46:19.392381 rx_lastpass[1][0][10] = 0
4901 00:46:19.392911 rx_firspass[1][0][11] = 0
4902 00:46:19.395425 rx_lastpass[1][0][11] = 0
4903 00:46:19.398927 rx_firspass[1][0][12] = 0
4904 00:46:19.399439 rx_lastpass[1][0][12] = 0
4905 00:46:19.402177 rx_firspass[1][0][13] = 0
4906 00:46:19.405651 rx_lastpass[1][0][13] = 0
4907 00:46:19.406164 rx_firspass[1][0][14] = 0
4908 00:46:19.408878 rx_lastpass[1][0][14] = 0
4909 00:46:19.411962 rx_firspass[1][0][15] = 0
4910 00:46:19.415952 rx_lastpass[1][0][15] = 0
4911 00:46:19.416487 rx_firspass[1][1][0] = 0
4912 00:46:19.418814 rx_lastpass[1][1][0] = 0
4913 00:46:19.422184 rx_firspass[1][1][1] = 0
4914 00:46:19.422672 rx_lastpass[1][1][1] = 0
4915 00:46:19.425896 rx_firspass[1][1][2] = 0
4916 00:46:19.429351 rx_lastpass[1][1][2] = 0
4917 00:46:19.429889 rx_firspass[1][1][3] = 0
4918 00:46:19.432577 rx_lastpass[1][1][3] = 0
4919 00:46:19.435723 rx_firspass[1][1][4] = 0
4920 00:46:19.436279 rx_lastpass[1][1][4] = 0
4921 00:46:19.438912 rx_firspass[1][1][5] = 0
4922 00:46:19.442097 rx_lastpass[1][1][5] = 0
4923 00:46:19.442601 rx_firspass[1][1][6] = 0
4924 00:46:19.445604 rx_lastpass[1][1][6] = 0
4925 00:46:19.449103 rx_firspass[1][1][7] = 0
4926 00:46:19.452164 rx_lastpass[1][1][7] = 0
4927 00:46:19.452594 rx_firspass[1][1][8] = 0
4928 00:46:19.455927 rx_lastpass[1][1][8] = 0
4929 00:46:19.459077 rx_firspass[1][1][9] = 0
4930 00:46:19.459509 rx_lastpass[1][1][9] = 0
4931 00:46:19.462709 rx_firspass[1][1][10] = 0
4932 00:46:19.465583 rx_lastpass[1][1][10] = 0
4933 00:46:19.466064 rx_firspass[1][1][11] = 0
4934 00:46:19.469325 rx_lastpass[1][1][11] = 0
4935 00:46:19.472517 rx_firspass[1][1][12] = 0
4936 00:46:19.475651 rx_lastpass[1][1][12] = 0
4937 00:46:19.476097 rx_firspass[1][1][13] = 0
4938 00:46:19.478975 rx_lastpass[1][1][13] = 0
4939 00:46:19.482362 rx_firspass[1][1][14] = 0
4940 00:46:19.482838 rx_lastpass[1][1][14] = 0
4941 00:46:19.485933 rx_firspass[1][1][15] = 0
4942 00:46:19.489467 rx_lastpass[1][1][15] = 0
4943 00:46:19.490004 dump params clk_delay
4944 00:46:19.492372 clk_delay[0] = 0
4945 00:46:19.492856 clk_delay[1] = 0
4946 00:46:19.495742 dump params dqs_delay
4947 00:46:19.496235 dqs_delay[0][0] = 0
4948 00:46:19.499101 dqs_delay[0][1] = 0
4949 00:46:19.502340 dqs_delay[1][0] = 0
4950 00:46:19.502782 dqs_delay[1][1] = 0
4951 00:46:19.506094 dump params delay_cell_unit = 762
4952 00:46:19.509351 mt_set_emi_preloader end
4953 00:46:19.512714 [mt_mem_init] dram size: 0x100000000, rank number: 2
4954 00:46:19.515776 [complex_mem_test] start addr:0x40000000, len:20480
4955 00:46:19.554375 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4956 00:46:19.560896 [complex_mem_test] start addr:0x80000000, len:20480
4957 00:46:19.596508 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4958 00:46:19.602873 [complex_mem_test] start addr:0xc0000000, len:20480
4959 00:46:19.638602 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4960 00:46:19.645153 [complex_mem_test] start addr:0x56000000, len:8192
4961 00:46:19.662325 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4962 00:46:19.662870 ddr_geometry:1
4963 00:46:19.668778 [complex_mem_test] start addr:0x80000000, len:8192
4964 00:46:19.686061 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4965 00:46:19.689278 dram_init: dram init end (result: 0)
4966 00:46:19.695730 Successfully loaded DRAM blobs and ran DRAM calibration
4967 00:46:19.705647 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4968 00:46:19.706145 CBMEM:
4969 00:46:19.709518 IMD: root @ 00000000fffff000 254 entries.
4970 00:46:19.712275 IMD: root @ 00000000ffffec00 62 entries.
4971 00:46:19.718973 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4972 00:46:19.726086 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4973 00:46:19.728969 in-header: 03 a1 00 00 08 00 00 00
4974 00:46:19.732492 in-data: 84 60 60 10 00 00 00 00
4975 00:46:19.735921 Chrome EC: clear events_b mask to 0x0000000020004000
4976 00:46:19.742539 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4977 00:46:19.745808 in-header: 03 fd 00 00 00 00 00 00
4978 00:46:19.746273 in-data:
4979 00:46:19.752642 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4980 00:46:19.753128 CBFS @ 21000 size 3d4000
4981 00:46:19.759608 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4982 00:46:19.762844 CBFS: Locating 'fallback/ramstage'
4983 00:46:19.766121 CBFS: Found @ offset 10d40 size d563
4984 00:46:19.787947 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4985 00:46:19.799597 Accumulated console time in romstage 12870 ms
4986 00:46:19.800035
4987 00:46:19.800366
4988 00:46:19.809525 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4989 00:46:19.812841 ARM64: Exception handlers installed.
4990 00:46:19.813311 ARM64: Testing exception
4991 00:46:19.816170 ARM64: Done test exception
4992 00:46:19.819922 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4993 00:46:19.822825 Manufacturer: ef
4994 00:46:19.826112 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4995 00:46:19.832931 WARNING: RO_VPD is uninitialized or empty.
4996 00:46:19.836769 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4997 00:46:19.839737 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4998 00:46:19.849185 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4999 00:46:19.852676 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5000 00:46:19.859071 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5001 00:46:19.859506 Enumerating buses...
5002 00:46:19.865866 Show all devs... Before device enumeration.
5003 00:46:19.866350 Root Device: enabled 1
5004 00:46:19.869227 CPU_CLUSTER: 0: enabled 1
5005 00:46:19.869665 CPU: 00: enabled 1
5006 00:46:19.872720 Compare with tree...
5007 00:46:19.876030 Root Device: enabled 1
5008 00:46:19.876466 CPU_CLUSTER: 0: enabled 1
5009 00:46:19.879452 CPU: 00: enabled 1
5010 00:46:19.882425 Root Device scanning...
5011 00:46:19.882942 root_dev_scan_bus for Root Device
5012 00:46:19.885829 CPU_CLUSTER: 0 enabled
5013 00:46:19.888999 root_dev_scan_bus for Root Device done
5014 00:46:19.895829 scan_bus: scanning of bus Root Device took 10689 usecs
5015 00:46:19.896270 done
5016 00:46:19.899736 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5017 00:46:19.902439 Allocating resources...
5018 00:46:19.902878 Reading resources...
5019 00:46:19.905841 Root Device read_resources bus 0 link: 0
5020 00:46:19.912566 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5021 00:46:19.913076 CPU: 00 missing read_resources
5022 00:46:19.919159 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5023 00:46:19.922719 Root Device read_resources bus 0 link: 0 done
5024 00:46:19.925943 Done reading resources.
5025 00:46:19.929464 Show resources in subtree (Root Device)...After reading.
5026 00:46:19.932981 Root Device child on link 0 CPU_CLUSTER: 0
5027 00:46:19.936024 CPU_CLUSTER: 0 child on link 0 CPU: 00
5028 00:46:19.946021 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5029 00:46:19.946675 CPU: 00
5030 00:46:19.949404 Setting resources...
5031 00:46:19.952433 Root Device assign_resources, bus 0 link: 0
5032 00:46:19.956291 CPU_CLUSTER: 0 missing set_resources
5033 00:46:19.959504 Root Device assign_resources, bus 0 link: 0
5034 00:46:19.962822 Done setting resources.
5035 00:46:19.965977 Show resources in subtree (Root Device)...After assigning values.
5036 00:46:19.972798 Root Device child on link 0 CPU_CLUSTER: 0
5037 00:46:19.976185 CPU_CLUSTER: 0 child on link 0 CPU: 00
5038 00:46:19.982879 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5039 00:46:19.986704 CPU: 00
5040 00:46:19.987248 Done allocating resources.
5041 00:46:19.992747 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5042 00:46:19.993192 Enabling resources...
5043 00:46:19.996013 done.
5044 00:46:19.999877 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5045 00:46:20.003014 Initializing devices...
5046 00:46:20.003463 Root Device init ...
5047 00:46:20.006056 mainboard_init: Starting display init.
5048 00:46:20.009369 ADC[4]: Raw value=77389 ID=0
5049 00:46:20.032676 anx7625_power_on_init: Init interface.
5050 00:46:20.035547 anx7625_disable_pd_protocol: Disabled PD feature.
5051 00:46:20.042439 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5052 00:46:20.098931 anx7625_start_dp_work: Secure OCM version=00
5053 00:46:20.102312 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5054 00:46:20.119353 sp_tx_get_edid_block: EDID Block = 1
5055 00:46:20.236561 Extracted contents:
5056 00:46:20.239884 header: 00 ff ff ff ff ff ff 00
5057 00:46:20.243418 serial number: 06 af 5c 14 00 00 00 00 00 1a
5058 00:46:20.246541 version: 01 04
5059 00:46:20.249975 basic params: 95 1a 0e 78 02
5060 00:46:20.253416 chroma info: 99 85 95 55 56 92 28 22 50 54
5061 00:46:20.256477 established: 00 00 00
5062 00:46:20.263224 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5063 00:46:20.266607 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5064 00:46:20.273030 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5065 00:46:20.279996 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5066 00:46:20.286717 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5067 00:46:20.289820 extensions: 00
5068 00:46:20.290287 checksum: ae
5069 00:46:20.290632
5070 00:46:20.292932 Manufacturer: AUO Model 145c Serial Number 0
5071 00:46:20.296385 Made week 0 of 2016
5072 00:46:20.296819 EDID version: 1.4
5073 00:46:20.299770 Digital display
5074 00:46:20.303102 6 bits per primary color channel
5075 00:46:20.303549 DisplayPort interface
5076 00:46:20.306454 Maximum image size: 26 cm x 14 cm
5077 00:46:20.309878 Gamma: 220%
5078 00:46:20.310352 Check DPMS levels
5079 00:46:20.313379 Supported color formats: RGB 4:4:4
5080 00:46:20.316763 First detailed timing is preferred timing
5081 00:46:20.319653 Established timings supported:
5082 00:46:20.323214 Standard timings supported:
5083 00:46:20.323751 Detailed timings
5084 00:46:20.326508 Hex of detail: ce1d56ea50001a3030204600009010000018
5085 00:46:20.333588 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5086 00:46:20.336694 0556 0586 05a6 0640 hborder 0
5087 00:46:20.339782 0300 0304 030a 031a vborder 0
5088 00:46:20.343317 -hsync -vsync
5089 00:46:20.346366 Did detailed timing
5090 00:46:20.350089 Hex of detail: 0000000f0000000000000000000000000020
5091 00:46:20.353297 Manufacturer-specified data, tag 15
5092 00:46:20.356815 Hex of detail: 000000fe0041554f0a202020202020202020
5093 00:46:20.359972 ASCII string: AUO
5094 00:46:20.363362 Hex of detail: 000000fe004231313658414230312e34200a
5095 00:46:20.366452 ASCII string: B116XAB01.4
5096 00:46:20.366887 Checksum
5097 00:46:20.369838 Checksum: 0xae (valid)
5098 00:46:20.373256 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5099 00:46:20.376577 DSI data_rate: 457800000 bps
5100 00:46:20.383485 anx7625_parse_edid: set default k value to 0x3d for panel
5101 00:46:20.386952 anx7625_parse_edid: pixelclock(76300).
5102 00:46:20.390478 hactive(1366), hsync(32), hfp(48), hbp(154)
5103 00:46:20.393603 vactive(768), vsync(6), vfp(4), vbp(16)
5104 00:46:20.396667 anx7625_dsi_config: config dsi.
5105 00:46:20.405557 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5106 00:46:20.425682 anx7625_dsi_config: success to config DSI
5107 00:46:20.429271 anx7625_dp_start: MIPI phy setup OK.
5108 00:46:20.433012 [SSUSB] Setting up USB HOST controller...
5109 00:46:20.435713 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5110 00:46:20.439248 [SSUSB] phy power-on done.
5111 00:46:20.443309 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5112 00:46:20.446542 in-header: 03 fc 01 00 00 00 00 00
5113 00:46:20.446982 in-data:
5114 00:46:20.449992 handle_proto3_response: EC response with error code: 1
5115 00:46:20.453136 SPM: pcm index = 1
5116 00:46:20.456394 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5117 00:46:20.459904 CBFS @ 21000 size 3d4000
5118 00:46:20.466670 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5119 00:46:20.470028 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5120 00:46:20.473411 CBFS: Found @ offset 1e7c0 size 1026
5121 00:46:20.479890 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5122 00:46:20.483341 SPM: binary array size = 2988
5123 00:46:20.486426 SPM: version = pcm_allinone_v1.17.2_20180829
5124 00:46:20.490077 SPM binary loaded in 32 msecs
5125 00:46:20.497553 spm_kick_im_to_fetch: ptr = 000000004021eec2
5126 00:46:20.500488 spm_kick_im_to_fetch: len = 2988
5127 00:46:20.500929 SPM: spm_kick_pcm_to_run
5128 00:46:20.503623 SPM: spm_kick_pcm_to_run done
5129 00:46:20.506981 SPM: spm_init done in 52 msecs
5130 00:46:20.510361 Root Device init finished in 505264 usecs
5131 00:46:20.513709 CPU_CLUSTER: 0 init ...
5132 00:46:20.520197 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5133 00:46:20.527316 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5134 00:46:20.527841 CBFS @ 21000 size 3d4000
5135 00:46:20.534276 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5136 00:46:20.537442 CBFS: Locating 'sspm.bin'
5137 00:46:20.540933 CBFS: Found @ offset 208c0 size 41cb
5138 00:46:20.550271 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5139 00:46:20.558394 CPU_CLUSTER: 0 init finished in 42800 usecs
5140 00:46:20.558920 Devices initialized
5141 00:46:20.561867 Show all devs... After init.
5142 00:46:20.564931 Root Device: enabled 1
5143 00:46:20.565372 CPU_CLUSTER: 0: enabled 1
5144 00:46:20.567846 CPU: 00: enabled 1
5145 00:46:20.571399 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5146 00:46:20.574561 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5147 00:46:20.578157 ELOG: NV offset 0x558000 size 0x1000
5148 00:46:20.585942 read SPI 0x558000 0x1000: 1262 us, 3245 KB/s, 25.960 Mbps
5149 00:46:20.592461 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5150 00:46:20.595961 ELOG: Event(17) added with size 13 at 2024-06-16 00:46:20 UTC
5151 00:46:20.598938 out: cmd=0x121: 03 db 21 01 00 00 00 00
5152 00:46:20.602626 in-header: 03 95 00 00 2c 00 00 00
5153 00:46:20.615669 in-data: be 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 f8 ea 00 00 06 80 00 00 d5 1f 02 00 06 80 00 00 d9 9a 01 00 06 80 00 00 22 9b 02 00
5154 00:46:20.619123 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5155 00:46:20.622300 in-header: 03 19 00 00 08 00 00 00
5156 00:46:20.625889 in-data: a2 e0 47 00 13 00 00 00
5157 00:46:20.629555 Chrome EC: UHEPI supported
5158 00:46:20.636261 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5159 00:46:20.639267 in-header: 03 e1 00 00 08 00 00 00
5160 00:46:20.642513 in-data: 84 20 60 10 00 00 00 00
5161 00:46:20.646068 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5162 00:46:20.652859 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5163 00:46:20.655988 in-header: 03 e1 00 00 08 00 00 00
5164 00:46:20.659040 in-data: 84 20 60 10 00 00 00 00
5165 00:46:20.666141 ELOG: Event(A1) added with size 10 at 2024-06-16 00:46:20 UTC
5166 00:46:20.672626 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5167 00:46:20.675862 ELOG: Event(A0) added with size 9 at 2024-06-16 00:46:20 UTC
5168 00:46:20.679246 elog_add_boot_reason: Logged dev mode boot
5169 00:46:20.682869 Finalize devices...
5170 00:46:20.683385 Devices finalized
5171 00:46:20.689299 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5172 00:46:20.692556 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5173 00:46:20.699153 ELOG: Event(91) added with size 10 at 2024-06-16 00:46:20 UTC
5174 00:46:20.702497 Writing coreboot table at 0xffeda000
5175 00:46:20.705870 0. 0000000000114000-000000000011efff: RAMSTAGE
5176 00:46:20.712557 1. 0000000040000000-000000004023cfff: RAMSTAGE
5177 00:46:20.715921 2. 000000004023d000-00000000545fffff: RAM
5178 00:46:20.719651 3. 0000000054600000-000000005465ffff: BL31
5179 00:46:20.722459 4. 0000000054660000-00000000ffed9fff: RAM
5180 00:46:20.726515 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5181 00:46:20.732936 6. 0000000100000000-000000013fffffff: RAM
5182 00:46:20.733459 Passing 5 GPIOs to payload:
5183 00:46:20.739366 NAME | PORT | POLARITY | VALUE
5184 00:46:20.742758 write protect | 0x00000096 | low | high
5185 00:46:20.749478 EC in RW | 0x000000b1 | high | undefined
5186 00:46:20.752931 EC interrupt | 0x00000097 | low | undefined
5187 00:46:20.756061 TPM interrupt | 0x00000099 | high | undefined
5188 00:46:20.762799 speaker enable | 0x000000af | high | undefined
5189 00:46:20.766325 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5190 00:46:20.769694 in-header: 03 f7 00 00 02 00 00 00
5191 00:46:20.770138 in-data: 04 00
5192 00:46:20.772972 Board ID: 4
5193 00:46:20.773494 ADC[3]: Raw value=1040299 ID=8
5194 00:46:20.775938 RAM code: 8
5195 00:46:20.776376 SKU ID: 16
5196 00:46:20.779419 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5197 00:46:20.783075 CBFS @ 21000 size 3d4000
5198 00:46:20.789493 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5199 00:46:20.793336 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5a2
5200 00:46:20.795914 coreboot table: 940 bytes.
5201 00:46:20.799369 IMD ROOT 0. 00000000fffff000 00001000
5202 00:46:20.803044 IMD SMALL 1. 00000000ffffe000 00001000
5203 00:46:20.806134 CONSOLE 2. 00000000fffde000 00020000
5204 00:46:20.809869 FMAP 3. 00000000fffdd000 0000047c
5205 00:46:20.816336 TIME STAMP 4. 00000000fffdc000 00000910
5206 00:46:20.819734 RAMOOPS 5. 00000000ffedc000 00100000
5207 00:46:20.823009 COREBOOT 6. 00000000ffeda000 00002000
5208 00:46:20.823637 IMD small region:
5209 00:46:20.826134 IMD ROOT 0. 00000000ffffec00 00000400
5210 00:46:20.829688 VBOOT WORK 1. 00000000ffffeb00 00000100
5211 00:46:20.836388 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5212 00:46:20.840110 VPD 3. 00000000ffffea60 0000006c
5213 00:46:20.842994 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5214 00:46:20.850029 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5215 00:46:20.853073 in-header: 03 e1 00 00 08 00 00 00
5216 00:46:20.856289 in-data: 84 20 60 10 00 00 00 00
5217 00:46:20.859805 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5218 00:46:20.863078 CBFS @ 21000 size 3d4000
5219 00:46:20.869621 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5220 00:46:20.873013 CBFS: Locating 'fallback/payload'
5221 00:46:20.879685 CBFS: Found @ offset dc040 size 439a0
5222 00:46:20.967831 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5223 00:46:20.970625 Checking segment from ROM address 0x0000000040003a00
5224 00:46:20.977581 Checking segment from ROM address 0x0000000040003a1c
5225 00:46:20.980928 Loading segment from ROM address 0x0000000040003a00
5226 00:46:20.984047 code (compression=0)
5227 00:46:20.994325 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5228 00:46:21.001010 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5229 00:46:21.004473 it's not compressed!
5230 00:46:21.008002 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5231 00:46:21.014329 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5232 00:46:21.022036 Loading segment from ROM address 0x0000000040003a1c
5233 00:46:21.025125 Entry Point 0x0000000080000000
5234 00:46:21.025567 Loaded segments
5235 00:46:21.031788 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5236 00:46:21.035599 Jumping to boot code at 0000000080000000(00000000ffeda000)
5237 00:46:21.045143 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5238 00:46:21.048699 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5239 00:46:21.052024 CBFS @ 21000 size 3d4000
5240 00:46:21.058667 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5241 00:46:21.059189 CBFS: Locating 'fallback/bl31'
5242 00:46:21.062710 CBFS: Found @ offset 36dc0 size 5820
5243 00:46:21.076068 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5244 00:46:21.079046 Checking segment from ROM address 0x0000000040003a00
5245 00:46:21.085562 Checking segment from ROM address 0x0000000040003a1c
5246 00:46:21.089413 Loading segment from ROM address 0x0000000040003a00
5247 00:46:21.092435 code (compression=1)
5248 00:46:21.099260 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5249 00:46:21.108988 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5250 00:46:21.109432 using LZMA
5251 00:46:21.117561 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5252 00:46:21.124482 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5253 00:46:21.127809 Loading segment from ROM address 0x0000000040003a1c
5254 00:46:21.130863 Entry Point 0x0000000054601000
5255 00:46:21.131302 Loaded segments
5256 00:46:21.134416 NOTICE: MT8183 bl31_setup
5257 00:46:21.141427 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5258 00:46:21.144700 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5259 00:46:21.148138 INFO: [DEVAPC] dump DEVAPC registers:
5260 00:46:21.158430 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5261 00:46:21.165181 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5262 00:46:21.171448 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5263 00:46:21.181301 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5264 00:46:21.191498 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5265 00:46:21.198200 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5266 00:46:21.204846 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5267 00:46:21.214737 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5268 00:46:21.221432 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5269 00:46:21.231486 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5270 00:46:21.238061 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5271 00:46:21.248287 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5272 00:46:21.254769 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5273 00:46:21.261490 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5274 00:46:21.271494 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5275 00:46:21.278349 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5276 00:46:21.285143 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5277 00:46:21.291298 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5278 00:46:21.297951 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5279 00:46:21.308226 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5280 00:46:21.314821 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5281 00:46:21.321706 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5282 00:46:21.324952 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5283 00:46:21.328394 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5284 00:46:21.331244 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5285 00:46:21.334890 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5286 00:46:21.338459 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5287 00:46:21.345364 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5288 00:46:21.348608 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5289 00:46:21.352127 WARNING: region 0:
5290 00:46:21.354976 WARNING: apc:0x168, sa:0x0, ea:0xfff
5291 00:46:21.355413 WARNING: region 1:
5292 00:46:21.358582 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5293 00:46:21.361751 WARNING: region 2:
5294 00:46:21.365058 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5295 00:46:21.365488 WARNING: region 3:
5296 00:46:21.371664 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5297 00:46:21.372160 WARNING: region 4:
5298 00:46:21.374988 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5299 00:46:21.378315 WARNING: region 5:
5300 00:46:21.381994 WARNING: apc:0x0, sa:0x0, ea:0x0
5301 00:46:21.382470 WARNING: region 6:
5302 00:46:21.385169 WARNING: apc:0x0, sa:0x0, ea:0x0
5303 00:46:21.389003 WARNING: region 7:
5304 00:46:21.389379 WARNING: apc:0x0, sa:0x0, ea:0x0
5305 00:46:21.398619 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5306 00:46:21.398911 INFO: SPM: enable SPMC mode
5307 00:46:21.402027 NOTICE: spm_boot_init() start
5308 00:46:21.405207 NOTICE: spm_boot_init() end
5309 00:46:21.408866 INFO: BL31: Initializing runtime services
5310 00:46:21.415413 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5311 00:46:21.418637 INFO: BL31: Preparing for EL3 exit to normal world
5312 00:46:21.425391 INFO: Entry point address = 0x80000000
5313 00:46:21.426298 INFO: SPSR = 0x8
5314 00:46:21.447824
5315 00:46:21.448330
5316 00:46:21.448664
5317 00:46:21.450186 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5318 00:46:21.450787 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5319 00:46:21.451230 Setting prompt string to ['jacuzzi:']
5320 00:46:21.451628 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5321 00:46:21.452270 Starting depthcharge on Juniper...
5322 00:46:21.452615
5323 00:46:21.454414 vboot_handoff: creating legacy vboot_handoff structure
5324 00:46:21.454845
5325 00:46:21.458038 ec_init(0): CrosEC protocol v3 supported (544, 544)
5326 00:46:21.458640
5327 00:46:21.461551 Wipe memory regions:
5328 00:46:21.462058
5329 00:46:21.464744 [0x00000040000000, 0x00000054600000)
5330 00:46:21.507701
5331 00:46:21.508212 [0x00000054660000, 0x00000080000000)
5332 00:46:21.599473
5333 00:46:21.599984 [0x000000811994a0, 0x000000ffeda000)
5334 00:46:21.859879
5335 00:46:21.860394 [0x00000100000000, 0x00000140000000)
5336 00:46:21.992413
5337 00:46:21.995482 Initializing XHCI USB controller at 0x11200000.
5338 00:46:22.018802
5339 00:46:22.022108 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5340 00:46:22.022683
5341 00:46:22.023023
5342 00:46:22.023762 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5344 00:46:22.125147 jacuzzi: tftpboot 192.168.201.1 14368395/tftp-deploy-04cx3o6c/kernel/image.itb 14368395/tftp-deploy-04cx3o6c/kernel/cmdline
5345 00:46:22.125850 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5346 00:46:22.126344 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5347 00:46:22.130766 tftpboot 192.168.201.1 14368395/tftp-deploy-04cx3o6c/kernel/image.ittp-deploy-04cx3o6c/kernel/cmdline
5348 00:46:22.131209
5349 00:46:22.131546 Waiting for link
5350 00:46:22.679013
5351 00:46:22.679531 R8152: Initializing
5352 00:46:22.679867
5353 00:46:22.682372 Version 9 (ocp_data = 6010)
5354 00:46:22.683026
5355 00:46:22.685281 R8152: Done initializing
5356 00:46:22.685753
5357 00:46:22.686192 Adding net device
5358 00:46:22.864316
5359 00:46:22.864824 R8152: Initializing
5360 00:46:22.865159
5361 00:46:22.867700 Version 9 (ocp_data = 6010)
5362 00:46:22.868213
5363 00:46:22.871090 R8152: Done initializing
5364 00:46:22.871528
5365 00:46:22.874328 net_add_device: Attemp to include the same device
5366 00:46:23.260666
5367 00:46:23.261174 done.
5368 00:46:23.261508
5369 00:46:23.261819 MAC: 00:e0:4c:68:03:2b
5370 00:46:23.262111
5371 00:46:23.264167 Sending DHCP discover... done.
5372 00:46:23.264675
5373 00:46:23.267249 Waiting for reply... done.
5374 00:46:23.267768
5375 00:46:23.270807 Sending DHCP request... done.
5376 00:46:23.271245
5377 00:46:23.276633 Waiting for reply... done.
5378 00:46:23.277146
5379 00:46:23.277483 My ip is 192.168.201.17
5380 00:46:23.277792
5381 00:46:23.279801 The DHCP server ip is 192.168.201.1
5382 00:46:23.280311
5383 00:46:23.286291 TFTP server IP predefined by user: 192.168.201.1
5384 00:46:23.286731
5385 00:46:23.293199 Bootfile predefined by user: 14368395/tftp-deploy-04cx3o6c/kernel/image.itb
5386 00:46:23.293715
5387 00:46:23.294053 Sending tftp read request... done.
5388 00:46:23.296135
5389 00:46:23.303143 Waiting for the transfer...
5390 00:46:23.303730
5391 00:46:23.707372 00000000 ################################################################
5392 00:46:23.707895
5393 00:46:24.133999 00080000 ################################################################
5394 00:46:24.134495
5395 00:46:24.493306 00100000 ################################################################
5396 00:46:24.493481
5397 00:46:24.787470 00180000 ################################################################
5398 00:46:24.787608
5399 00:46:25.077686 00200000 ################################################################
5400 00:46:25.077815
5401 00:46:25.376474 00280000 ################################################################
5402 00:46:25.376596
5403 00:46:25.641229 00300000 ################################################################
5404 00:46:25.641364
5405 00:46:25.935329 00380000 ################################################################
5406 00:46:25.935450
5407 00:46:26.204803 00400000 ################################################################
5408 00:46:26.204923
5409 00:46:26.483994 00480000 ################################################################
5410 00:46:26.484119
5411 00:46:26.775222 00500000 ################################################################
5412 00:46:26.775346
5413 00:46:27.071400 00580000 ################################################################
5414 00:46:27.071508
5415 00:46:27.331908 00600000 ################################################################
5416 00:46:27.332038
5417 00:46:27.603907 00680000 ################################################################
5418 00:46:27.604020
5419 00:46:27.903252 00700000 ################################################################
5420 00:46:27.903363
5421 00:46:28.203626 00780000 ################################################################
5422 00:46:28.203739
5423 00:46:28.490356 00800000 ################################################################
5424 00:46:28.490469
5425 00:46:28.773514 00880000 ################################################################
5426 00:46:28.773627
5427 00:46:29.055604 00900000 ################################################################
5428 00:46:29.055722
5429 00:46:29.335508 00980000 ################################################################
5430 00:46:29.335626
5431 00:46:29.685335 00a00000 ################################################################
5432 00:46:29.685776
5433 00:46:30.075279 00a80000 ################################################################
5434 00:46:30.075862
5435 00:46:30.477499 00b00000 ################################################################
5436 00:46:30.477955
5437 00:46:30.856083 00b80000 ################################################################
5438 00:46:30.856666
5439 00:46:31.203039 00c00000 ################################################################
5440 00:46:31.203514
5441 00:46:31.517921 00c80000 ################################################################
5442 00:46:31.518071
5443 00:46:31.822302 00d00000 ################################################################
5444 00:46:31.822425
5445 00:46:32.126291 00d80000 ################################################################
5446 00:46:32.126408
5447 00:46:32.428168 00e00000 ################################################################
5448 00:46:32.428289
5449 00:46:32.726829 00e80000 ################################################################
5450 00:46:32.726955
5451 00:46:33.026457 00f00000 ################################################################
5452 00:46:33.026576
5453 00:46:33.326399 00f80000 ################################################################
5454 00:46:33.326534
5455 00:46:33.624729 01000000 ################################################################
5456 00:46:33.624873
5457 00:46:33.924014 01080000 ################################################################
5458 00:46:33.924138
5459 00:46:34.223550 01100000 ################################################################
5460 00:46:34.223673
5461 00:46:34.523389 01180000 ################################################################
5462 00:46:34.523509
5463 00:46:34.800807 01200000 ################################################################
5464 00:46:34.800953
5465 00:46:35.067774 01280000 ################################################################
5466 00:46:35.067897
5467 00:46:35.363381 01300000 ################################################################
5468 00:46:35.363539
5469 00:46:35.622329 01380000 ################################################################
5470 00:46:35.622443
5471 00:46:35.879866 01400000 ################################################################
5472 00:46:35.880006
5473 00:46:36.137739 01480000 ################################################################
5474 00:46:36.137886
5475 00:46:36.398454 01500000 ################################################################
5476 00:46:36.398576
5477 00:46:36.677402 01580000 ################################################################
5478 00:46:36.677523
5479 00:46:36.958017 01600000 ################################################################
5480 00:46:36.958161
5481 00:46:37.251745 01680000 ################################################################
5482 00:46:37.251863
5483 00:46:37.521748 01700000 ################################################################
5484 00:46:37.521869
5485 00:46:37.794582 01780000 ################################################################
5486 00:46:37.794700
5487 00:46:38.054126 01800000 ################################################################
5488 00:46:38.054272
5489 00:46:38.347213 01880000 ################################################################
5490 00:46:38.347335
5491 00:46:38.625280 01900000 ################################################################
5492 00:46:38.625401
5493 00:46:38.896542 01980000 ################################################################
5494 00:46:38.896686
5495 00:46:39.175095 01a00000 ################################################################
5496 00:46:39.175234
5497 00:46:39.438830 01a80000 ################################################################
5498 00:46:39.438947
5499 00:46:39.716219 01b00000 ################################################################
5500 00:46:39.716345
5501 00:46:40.012502 01b80000 ################################################################
5502 00:46:40.012625
5503 00:46:40.301415 01c00000 ################################################################
5504 00:46:40.301536
5505 00:46:40.562352 01c80000 ################################################################
5506 00:46:40.562472
5507 00:46:40.823306 01d00000 ################################################################
5508 00:46:40.823441
5509 00:46:41.112207 01d80000 ################################################################
5510 00:46:41.112331
5511 00:46:41.400824 01e00000 ################################################################
5512 00:46:41.400963
5513 00:46:41.686097 01e80000 ################################################################
5514 00:46:41.686274
5515 00:46:41.946541 01f00000 ################################################################
5516 00:46:41.946683
5517 00:46:42.232802 01f80000 ################################################################
5518 00:46:42.232949
5519 00:46:42.496671 02000000 ################################################################
5520 00:46:42.496795
5521 00:46:42.787101 02080000 ################################################################
5522 00:46:42.787222
5523 00:46:43.080153 02100000 ################################################################
5524 00:46:43.080274
5525 00:46:43.366877 02180000 ################################################################
5526 00:46:43.366998
5527 00:46:43.651724 02200000 ################################################################
5528 00:46:43.651847
5529 00:46:43.951420 02280000 ################################################################
5530 00:46:43.951542
5531 00:46:44.251267 02300000 ################################################################
5532 00:46:44.251386
5533 00:46:44.547443 02380000 ################################################################
5534 00:46:44.547564
5535 00:46:44.833508 02400000 ################################################################
5536 00:46:44.833632
5537 00:46:45.132762 02480000 ################################################################
5538 00:46:45.132895
5539 00:46:45.432681 02500000 ################################################################
5540 00:46:45.432803
5541 00:46:45.713378 02580000 ################################################################
5542 00:46:45.713504
5543 00:46:45.975601 02600000 ################################################################
5544 00:46:45.975727
5545 00:46:46.251837 02680000 ################################################################
5546 00:46:46.251955
5547 00:46:46.514967 02700000 ################################################################
5548 00:46:46.515096
5549 00:46:46.786656 02780000 ################################################################
5550 00:46:46.786784
5551 00:46:47.066770 02800000 ################################################################
5552 00:46:47.066899
5553 00:46:47.366354 02880000 ################################################################
5554 00:46:47.366480
5555 00:46:47.627341 02900000 ################################################################
5556 00:46:47.627482
5557 00:46:47.907809 02980000 ################################################################
5558 00:46:47.907937
5559 00:46:48.172190 02a00000 ################################################################
5560 00:46:48.172317
5561 00:46:48.428900 02a80000 ################################################################
5562 00:46:48.429024
5563 00:46:48.698357 02b00000 ################################################################
5564 00:46:48.698503
5565 00:46:48.995528 02b80000 ################################################################
5566 00:46:48.995651
5567 00:46:49.292849 02c00000 ################################################################
5568 00:46:49.292975
5569 00:46:49.579782 02c80000 ################################################################
5570 00:46:49.579914
5571 00:46:49.845275 02d00000 ################################################################
5572 00:46:49.845396
5573 00:46:50.148193 02d80000 ################################################################
5574 00:46:50.148314
5575 00:46:50.449747 02e00000 ################################################################
5576 00:46:50.449873
5577 00:46:50.749229 02e80000 ################################################################
5578 00:46:50.749360
5579 00:46:51.042329 02f00000 ################################################################
5580 00:46:51.042452
5581 00:46:51.328065 02f80000 ################################################################
5582 00:46:51.328186
5583 00:46:51.606992 03000000 ################################################################
5584 00:46:51.607114
5585 00:46:51.900079 03080000 ################################################################
5586 00:46:51.900211
5587 00:46:52.179705 03100000 ################################################################
5588 00:46:52.179829
5589 00:46:52.470897 03180000 ################################################################
5590 00:46:52.471020
5591 00:46:52.735570 03200000 ################################################################
5592 00:46:52.735689
5593 00:46:52.991752 03280000 ################################################################
5594 00:46:52.991877
5595 00:46:53.286505 03300000 ################################################################
5596 00:46:53.286632
5597 00:46:53.506375 03380000 ################################################## done.
5598 00:46:53.506496
5599 00:46:53.509767 The bootfile was 54404222 bytes long.
5600 00:46:53.509851
5601 00:46:53.513476 Sending tftp read request... done.
5602 00:46:53.513629
5603 00:46:53.516972 Waiting for the transfer...
5604 00:46:53.517126
5605 00:46:53.517202 00000000 # done.
5606 00:46:53.517271
5607 00:46:53.523173 Command line loaded dynamically from TFTP file: 14368395/tftp-deploy-04cx3o6c/kernel/cmdline
5608 00:46:53.523331
5609 00:46:53.539986 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5610 00:46:53.543513
5611 00:46:53.543665 Loading FIT.
5612 00:46:53.543776
5613 00:46:53.546727 Image ramdisk-1 has 41218111 bytes.
5614 00:46:53.546960
5615 00:46:53.550153 Image fdt-1 has 57695 bytes.
5616 00:46:53.550415
5617 00:46:53.550560 Image kernel-1 has 13126376 bytes.
5618 00:46:53.553350
5619 00:46:53.560515 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5620 00:46:53.560873
5621 00:46:53.573785 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5622 00:46:53.574640
5623 00:46:53.576984 Choosing best match conf-1 for compat google,juniper-sku16.
5624 00:46:53.582595
5625 00:46:53.587071 Connected to device vid:did:rid of 1ae0:0028:00
5626 00:46:53.595311
5627 00:46:53.598555 tpm_get_response: command 0x17b, return code 0x0
5628 00:46:53.598992
5629 00:46:53.601973 tpm_cleanup: add release locality here.
5630 00:46:53.602555
5631 00:46:53.605296 Shutting down all USB controllers.
5632 00:46:53.605811
5633 00:46:53.608846 Removing current net device
5634 00:46:53.609365
5635 00:46:53.612025 Exiting depthcharge with code 4 at timestamp: 48601095
5636 00:46:53.612551
5637 00:46:53.615402 LZMA decompressing kernel-1 to 0x80193568
5638 00:46:53.615921
5639 00:46:53.618612 LZMA decompressing kernel-1 to 0x40000000
5640 00:46:55.486259
5641 00:46:55.486763 jumping to kernel
5642 00:46:55.488831 end: 2.2.4 bootloader-commands (duration 00:00:34) [common]
5643 00:46:55.489354 start: 2.2.5 auto-login-action (timeout 00:03:53) [common]
5644 00:46:55.489729 Setting prompt string to ['Linux version [0-9]']
5645 00:46:55.490071 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5646 00:46:55.490463 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5647 00:46:55.561726
5648 00:46:55.564703 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5649 00:46:55.568508 start: 2.2.5.1 login-action (timeout 00:03:53) [common]
5650 00:46:55.569052 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5651 00:46:55.569440 Setting prompt string to []
5652 00:46:55.569857 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5653 00:46:55.570337 Using line separator: #'\n'#
5654 00:46:55.570661 No login prompt set.
5655 00:46:55.570984 Parsing kernel messages
5656 00:46:55.571273 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5657 00:46:55.571807 [login-action] Waiting for messages, (timeout 00:03:53)
5658 00:46:55.572152 Waiting using forced prompt support (timeout 00:01:57)
5659 00:46:55.587983 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024
5660 00:46:55.591027 [ 0.000000] random: crng init done
5661 00:46:55.598031 [ 0.000000] Machine model: Google juniper sku16 board
5662 00:46:55.601106 [ 0.000000] efi: UEFI not found.
5663 00:46:55.607935 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5664 00:46:55.614843 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5665 00:46:55.624599 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5666 00:46:55.627800 [ 0.000000] printk: bootconsole [mtk8250] enabled
5667 00:46:55.636681 [ 0.000000] NUMA: No NUMA configuration found
5668 00:46:55.643151 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5669 00:46:55.650040 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5670 00:46:55.650601 [ 0.000000] Zone ranges:
5671 00:46:55.656801 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5672 00:46:55.659569 [ 0.000000] DMA32 empty
5673 00:46:55.666515 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5674 00:46:55.669814 [ 0.000000] Movable zone start for each node
5675 00:46:55.673312 [ 0.000000] Early memory node ranges
5676 00:46:55.680050 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5677 00:46:55.686674 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5678 00:46:55.693286 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5679 00:46:55.699690 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5680 00:46:55.706521 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5681 00:46:55.713280 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5682 00:46:55.728841 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5683 00:46:55.735857 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5684 00:46:55.742244 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5685 00:46:55.745437 [ 0.000000] psci: probing for conduit method from DT.
5686 00:46:55.752114 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5687 00:46:55.755680 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5688 00:46:55.762487 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5689 00:46:55.765643 [ 0.000000] psci: SMC Calling Convention v1.1
5690 00:46:55.772686 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5691 00:46:55.775438 [ 0.000000] Detected VIPT I-cache on CPU0
5692 00:46:55.782618 [ 0.000000] CPU features: detected: GIC system register CPU interface
5693 00:46:55.789216 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5694 00:46:55.795862 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5695 00:46:55.799036 [ 0.000000] CPU features: detected: ARM erratum 845719
5696 00:46:55.805914 [ 0.000000] alternatives: applying boot alternatives
5697 00:46:55.809268 [ 0.000000] Fallback order for Node 0: 0
5698 00:46:55.815977 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5699 00:46:55.818959 [ 0.000000] Policy zone: Normal
5700 00:46:55.839489 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5701 00:46:55.848922 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5702 00:46:55.859490 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5703 00:46:55.865923 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5704 00:46:55.872700 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5705 00:46:55.879191 <6>[ 0.000000] software IO TLB: area num 8.
5706 00:46:55.903642 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5707 00:46:55.961267 <6>[ 0.000000] Memory: 3874824K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 283640K reserved, 32768K cma-reserved)
5708 00:46:55.968224 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5709 00:46:55.975192 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5710 00:46:55.978372 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5711 00:46:55.985064 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5712 00:46:55.991649 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5713 00:46:55.994938 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5714 00:46:56.004788 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5715 00:46:56.011364 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5716 00:46:56.014539 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5717 00:46:56.026670 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5718 00:46:56.033518 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5719 00:46:56.036881 <6>[ 0.000000] GICv3: 640 SPIs implemented
5720 00:46:56.039972 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5721 00:46:56.046908 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5722 00:46:56.049851 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5723 00:46:56.056376 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5724 00:46:56.069693 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5725 00:46:56.080071 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5726 00:46:56.086743 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5727 00:46:56.098745 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5728 00:46:56.112103 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5729 00:46:56.118815 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5730 00:46:56.125882 <6>[ 0.009483] Console: colour dummy device 80x25
5731 00:46:56.128647 <6>[ 0.014522] printk: console [tty1] enabled
5732 00:46:56.138777 <6>[ 0.018912] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5733 00:46:56.145753 <6>[ 0.029377] pid_max: default: 32768 minimum: 301
5734 00:46:56.148767 <6>[ 0.034257] LSM: Security Framework initializing
5735 00:46:56.158723 <6>[ 0.039174] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5736 00:46:56.165529 <6>[ 0.046797] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5737 00:46:56.172084 <4>[ 0.055664] cacheinfo: Unable to detect cache hierarchy for CPU 0
5738 00:46:56.182183 <6>[ 0.062294] cblist_init_generic: Setting adjustable number of callback queues.
5739 00:46:56.185617 <6>[ 0.069740] cblist_init_generic: Setting shift to 3 and lim to 1.
5740 00:46:56.195601 <6>[ 0.076093] cblist_init_generic: Setting adjustable number of callback queues.
5741 00:46:56.202050 <6>[ 0.083538] cblist_init_generic: Setting shift to 3 and lim to 1.
5742 00:46:56.205420 <6>[ 0.089938] rcu: Hierarchical SRCU implementation.
5743 00:46:56.212129 <6>[ 0.094963] rcu: Max phase no-delay instances is 1000.
5744 00:46:56.218843 <6>[ 0.102901] EFI services will not be available.
5745 00:46:56.221771 <6>[ 0.107850] smp: Bringing up secondary CPUs ...
5746 00:46:56.232672 <6>[ 0.113100] Detected VIPT I-cache on CPU1
5747 00:46:56.239037 <4>[ 0.113147] cacheinfo: Unable to detect cache hierarchy for CPU 1
5748 00:46:56.245868 <6>[ 0.113156] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5749 00:46:56.252484 <6>[ 0.113188] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5750 00:46:56.255756 <6>[ 0.113668] Detected VIPT I-cache on CPU2
5751 00:46:56.262599 <4>[ 0.113701] cacheinfo: Unable to detect cache hierarchy for CPU 2
5752 00:46:56.269203 <6>[ 0.113706] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5753 00:46:56.276574 <6>[ 0.113719] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5754 00:46:56.279542 <6>[ 0.114164] Detected VIPT I-cache on CPU3
5755 00:46:56.285908 <4>[ 0.114194] cacheinfo: Unable to detect cache hierarchy for CPU 3
5756 00:46:56.292736 <6>[ 0.114199] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5757 00:46:56.299124 <6>[ 0.114210] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5758 00:46:56.306150 <6>[ 0.114785] CPU features: detected: Spectre-v2
5759 00:46:56.309496 <6>[ 0.114795] CPU features: detected: Spectre-BHB
5760 00:46:56.316237 <6>[ 0.114799] CPU features: detected: ARM erratum 858921
5761 00:46:56.319369 <6>[ 0.114804] Detected VIPT I-cache on CPU4
5762 00:46:56.326320 <4>[ 0.114853] cacheinfo: Unable to detect cache hierarchy for CPU 4
5763 00:46:56.332516 <6>[ 0.114860] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5764 00:46:56.339461 <6>[ 0.114868] arch_timer: Enabling local workaround for ARM erratum 858921
5765 00:46:56.346136 <6>[ 0.114879] arch_timer: CPU4: Trapping CNTVCT access
5766 00:46:56.352639 <6>[ 0.114886] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5767 00:46:56.355953 <6>[ 0.115372] Detected VIPT I-cache on CPU5
5768 00:46:56.362942 <4>[ 0.115412] cacheinfo: Unable to detect cache hierarchy for CPU 5
5769 00:46:56.369220 <6>[ 0.115418] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5770 00:46:56.376122 <6>[ 0.115425] arch_timer: Enabling local workaround for ARM erratum 858921
5771 00:46:56.382570 <6>[ 0.115431] arch_timer: CPU5: Trapping CNTVCT access
5772 00:46:56.389447 <6>[ 0.115436] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5773 00:46:56.392366 <6>[ 0.115872] Detected VIPT I-cache on CPU6
5774 00:46:56.398898 <4>[ 0.115917] cacheinfo: Unable to detect cache hierarchy for CPU 6
5775 00:46:56.405791 <6>[ 0.115923] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5776 00:46:56.412449 <6>[ 0.115930] arch_timer: Enabling local workaround for ARM erratum 858921
5777 00:46:56.419134 <6>[ 0.115936] arch_timer: CPU6: Trapping CNTVCT access
5778 00:46:56.426134 <6>[ 0.115941] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5779 00:46:56.429273 <6>[ 0.116472] Detected VIPT I-cache on CPU7
5780 00:46:56.435937 <4>[ 0.116516] cacheinfo: Unable to detect cache hierarchy for CPU 7
5781 00:46:56.442588 <6>[ 0.116522] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5782 00:46:56.448937 <6>[ 0.116529] arch_timer: Enabling local workaround for ARM erratum 858921
5783 00:46:56.455899 <6>[ 0.116535] arch_timer: CPU7: Trapping CNTVCT access
5784 00:46:56.462574 <6>[ 0.116541] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5785 00:46:56.466050 <6>[ 0.116589] smp: Brought up 1 node, 8 CPUs
5786 00:46:56.472380 <6>[ 0.355489] SMP: Total of 8 processors activated.
5787 00:46:56.475873 <6>[ 0.360424] CPU features: detected: 32-bit EL0 Support
5788 00:46:56.482560 <6>[ 0.365803] CPU features: detected: 32-bit EL1 Support
5789 00:46:56.485680 <6>[ 0.371171] CPU features: detected: CRC32 instructions
5790 00:46:56.492732 <6>[ 0.376595] CPU: All CPU(s) started at EL2
5791 00:46:56.499089 <6>[ 0.380933] alternatives: applying system-wide alternatives
5792 00:46:56.502519 <6>[ 0.389005] devtmpfs: initialized
5793 00:46:56.517367 <6>[ 0.397944] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5794 00:46:56.526943 <6>[ 0.407893] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5795 00:46:56.530265 <6>[ 0.415623] pinctrl core: initialized pinctrl subsystem
5796 00:46:56.538508 <6>[ 0.422728] DMI not present or invalid.
5797 00:46:56.545367 <6>[ 0.427095] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5798 00:46:56.551920 <6>[ 0.433994] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5799 00:46:56.562158 <6>[ 0.441522] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5800 00:46:56.568384 <6>[ 0.449773] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5801 00:46:56.575499 <6>[ 0.457951] audit: initializing netlink subsys (disabled)
5802 00:46:56.581835 <5>[ 0.463655] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5803 00:46:56.588670 <6>[ 0.464631] thermal_sys: Registered thermal governor 'step_wise'
5804 00:46:56.595267 <6>[ 0.471621] thermal_sys: Registered thermal governor 'power_allocator'
5805 00:46:56.598593 <6>[ 0.477920] cpuidle: using governor menu
5806 00:46:56.604822 <6>[ 0.488884] NET: Registered PF_QIPCRTR protocol family
5807 00:46:56.611660 <6>[ 0.494369] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5808 00:46:56.618355 <6>[ 0.501466] ASID allocator initialised with 32768 entries
5809 00:46:56.621705 <6>[ 0.508232] Serial: AMBA PL011 UART driver
5810 00:46:56.634572 <4>[ 0.518657] Trying to register duplicate clock ID: 113
5811 00:46:56.694026 <6>[ 0.574990] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5812 00:46:56.708308 <6>[ 0.589351] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5813 00:46:56.711446 <6>[ 0.599099] KASLR enabled
5814 00:46:56.726360 <6>[ 0.607099] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5815 00:46:56.732775 <6>[ 0.614101] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5816 00:46:56.739941 <6>[ 0.620578] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5817 00:46:56.746347 <6>[ 0.627568] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5818 00:46:56.753229 <6>[ 0.634043] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5819 00:46:56.759847 <6>[ 0.641033] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5820 00:46:56.766632 <6>[ 0.647506] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5821 00:46:56.773121 <6>[ 0.654496] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5822 00:46:56.776619 <6>[ 0.662072] ACPI: Interpreter disabled.
5823 00:46:56.785760 <6>[ 0.670079] iommu: Default domain type: Translated
5824 00:46:56.792452 <6>[ 0.675185] iommu: DMA domain TLB invalidation policy: strict mode
5825 00:46:56.795889 <5>[ 0.681816] SCSI subsystem initialized
5826 00:46:56.802490 <6>[ 0.686230] usbcore: registered new interface driver usbfs
5827 00:46:56.808994 <6>[ 0.691958] usbcore: registered new interface driver hub
5828 00:46:56.812301 <6>[ 0.697499] usbcore: registered new device driver usb
5829 00:46:56.819594 <6>[ 0.703811] pps_core: LinuxPPS API ver. 1 registered
5830 00:46:56.829984 <6>[ 0.708997] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5831 00:46:56.832911 <6>[ 0.718321] PTP clock support registered
5832 00:46:56.836522 <6>[ 0.722576] EDAC MC: Ver: 3.0.0
5833 00:46:56.844029 <6>[ 0.728212] FPGA manager framework
5834 00:46:56.847493 <6>[ 0.731897] Advanced Linux Sound Architecture Driver Initialized.
5835 00:46:56.851044 <6>[ 0.738652] vgaarb: loaded
5836 00:46:56.857899 <6>[ 0.741773] clocksource: Switched to clocksource arch_sys_counter
5837 00:46:56.864861 <5>[ 0.748203] VFS: Disk quotas dquot_6.6.0
5838 00:46:56.871284 <6>[ 0.752378] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5839 00:46:56.874442 <6>[ 0.759554] pnp: PnP ACPI: disabled
5840 00:46:56.882480 <6>[ 0.766423] NET: Registered PF_INET protocol family
5841 00:46:56.888798 <6>[ 0.771647] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5842 00:46:56.900648 <6>[ 0.781549] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5843 00:46:56.910781 <6>[ 0.790303] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5844 00:46:56.917528 <6>[ 0.798254] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5845 00:46:56.923983 <6>[ 0.806489] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5846 00:46:56.930645 <6>[ 0.814584] TCP: Hash tables configured (established 32768 bind 32768)
5847 00:46:56.940861 <6>[ 0.821412] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5848 00:46:56.947576 <6>[ 0.828383] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5849 00:46:56.954039 <6>[ 0.835861] NET: Registered PF_UNIX/PF_LOCAL protocol family
5850 00:46:56.957188 <6>[ 0.841985] RPC: Registered named UNIX socket transport module.
5851 00:46:56.964291 <6>[ 0.848128] RPC: Registered udp transport module.
5852 00:46:56.967320 <6>[ 0.853053] RPC: Registered tcp transport module.
5853 00:46:56.974201 <6>[ 0.857976] RPC: Registered tcp NFSv4.1 backchannel transport module.
5854 00:46:56.980963 <6>[ 0.864629] PCI: CLS 0 bytes, default 64
5855 00:46:56.983764 <6>[ 0.868883] Unpacking initramfs...
5856 00:46:56.997660 <6>[ 0.878362] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5857 00:46:57.007324 <6>[ 0.886998] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5858 00:46:57.010613 <6>[ 0.895853] kvm [1]: IPA Size Limit: 40 bits
5859 00:46:57.017987 <6>[ 0.902186] kvm [1]: vgic-v2@c420000
5860 00:46:57.021344 <6>[ 0.906005] kvm [1]: GIC system register CPU interface enabled
5861 00:46:57.028369 <6>[ 0.912179] kvm [1]: vgic interrupt IRQ18
5862 00:46:57.031214 <6>[ 0.916540] kvm [1]: Hyp mode initialized successfully
5863 00:46:57.038747 <5>[ 0.922810] Initialise system trusted keyrings
5864 00:46:57.045389 <6>[ 0.927637] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5865 00:46:57.053258 <6>[ 0.937597] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5866 00:46:57.060387 <5>[ 0.944071] NFS: Registering the id_resolver key type
5867 00:46:57.063413 <5>[ 0.949377] Key type id_resolver registered
5868 00:46:57.070317 <5>[ 0.953789] Key type id_legacy registered
5869 00:46:57.076695 <6>[ 0.958098] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5870 00:46:57.084314 <6>[ 0.965025] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5871 00:46:57.090261 <6>[ 0.972785] 9p: Installing v9fs 9p2000 file system support
5872 00:46:57.117894 <5>[ 1.002105] Key type asymmetric registered
5873 00:46:57.121254 <5>[ 1.006451] Asymmetric key parser 'x509' registered
5874 00:46:57.131441 <6>[ 1.011609] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5875 00:46:57.134550 <6>[ 1.019222] io scheduler mq-deadline registered
5876 00:46:57.137926 <6>[ 1.023978] io scheduler kyber registered
5877 00:46:57.160886 <6>[ 1.044743] EINJ: ACPI disabled.
5878 00:46:57.167166 <4>[ 1.048501] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5879 00:46:57.205095 <6>[ 1.089301] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5880 00:46:57.213436 <6>[ 1.097745] printk: console [ttyS0] disabled
5881 00:46:57.241653 <6>[ 1.122398] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5882 00:46:57.248381 <6>[ 1.131884] printk: console [ttyS0] enabled
5883 00:46:57.251763 <6>[ 1.131884] printk: console [ttyS0] enabled
5884 00:46:57.258280 <6>[ 1.140802] printk: bootconsole [mtk8250] disabled
5885 00:46:57.261837 <6>[ 1.140802] printk: bootconsole [mtk8250] disabled
5886 00:46:57.271812 <3>[ 1.151345] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5887 00:46:57.278568 <3>[ 1.159726] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5888 00:46:57.307144 <6>[ 1.188146] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5889 00:46:57.313837 <6>[ 1.197816] serial serial0: tty port ttyS1 registered
5890 00:46:57.320931 <6>[ 1.204386] SuperH (H)SCI(F) driver initialized
5891 00:46:57.323557 <6>[ 1.209891] msm_serial: driver initialized
5892 00:46:57.339633 <6>[ 1.220259] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5893 00:46:57.349309 <6>[ 1.228855] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5894 00:46:57.356071 <6>[ 1.237432] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5895 00:46:57.366262 <6>[ 1.246001] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5896 00:46:57.372901 <6>[ 1.254659] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5897 00:46:57.383136 <6>[ 1.263320] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5898 00:46:57.392599 <6>[ 1.272060] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5899 00:46:57.399745 <6>[ 1.280797] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5900 00:46:57.409570 <6>[ 1.289376] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5901 00:46:57.416039 <6>[ 1.298178] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5902 00:46:57.426633 <4>[ 1.310566] cacheinfo: Unable to detect cache hierarchy for CPU 0
5903 00:46:57.435958 <6>[ 1.320008] loop: module loaded
5904 00:46:57.447901 <6>[ 1.331942] vsim1: Bringing 1800000uV into 2700000-2700000uV
5905 00:46:57.465935 <6>[ 1.349880] megasas: 07.719.03.00-rc1
5906 00:46:57.474372 <6>[ 1.358615] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5907 00:46:57.489331 <6>[ 1.373163] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5908 00:46:57.506043 <6>[ 1.390063] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5909 00:46:57.562597 <6>[ 1.440145] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5910 00:46:58.292360 <6>[ 2.176501] Freeing initrd memory: 40248K
5911 00:46:58.307658 <4>[ 2.188489] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5912 00:46:58.314368 <4>[ 2.197725] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5913 00:46:58.321332 <4>[ 2.204424] Hardware name: Google juniper sku16 board (DT)
5914 00:46:58.325033 <4>[ 2.210163] Call trace:
5915 00:46:58.327923 <4>[ 2.212863] dump_backtrace.part.0+0xe0/0xf0
5916 00:46:58.331320 <4>[ 2.217400] show_stack+0x18/0x30
5917 00:46:58.334732 <4>[ 2.220972] dump_stack_lvl+0x68/0x84
5918 00:46:58.338265 <4>[ 2.224893] dump_stack+0x18/0x34
5919 00:46:58.344777 <4>[ 2.228463] sysfs_warn_dup+0x64/0x80
5920 00:46:58.348806 <4>[ 2.232385] sysfs_do_create_link_sd+0xf0/0x100
5921 00:46:58.351552 <4>[ 2.237172] sysfs_create_link+0x20/0x40
5922 00:46:58.354872 <4>[ 2.241351] bus_add_device+0x68/0x10c
5923 00:46:58.361417 <4>[ 2.245357] device_add+0x340/0x7ac
5924 00:46:58.364498 <4>[ 2.249100] of_device_add+0x44/0x60
5925 00:46:58.367943 <4>[ 2.252934] of_platform_device_create_pdata+0x90/0x120
5926 00:46:58.374830 <4>[ 2.258416] of_platform_bus_create+0x170/0x370
5927 00:46:58.377989 <4>[ 2.263202] of_platform_populate+0x50/0xfc
5928 00:46:58.385110 <4>[ 2.267642] parse_mtd_partitions+0x1dc/0x510
5929 00:46:58.388213 <4>[ 2.272255] mtd_device_parse_register+0xf8/0x2e0
5930 00:46:58.391262 <4>[ 2.277213] spi_nor_probe+0x21c/0x2f0
5931 00:46:58.394798 <4>[ 2.281219] spi_mem_probe+0x6c/0xb0
5932 00:46:58.398483 <4>[ 2.285051] spi_probe+0x84/0xe4
5933 00:46:58.404577 <4>[ 2.288533] really_probe+0xbc/0x2e0
5934 00:46:58.407992 <4>[ 2.292364] __driver_probe_device+0x78/0x11c
5935 00:46:58.411455 <4>[ 2.296975] driver_probe_device+0xd8/0x160
5936 00:46:58.418322 <4>[ 2.301414] __device_attach_driver+0xb8/0x134
5937 00:46:58.421400 <4>[ 2.306113] bus_for_each_drv+0x78/0xd0
5938 00:46:58.424611 <4>[ 2.310203] __device_attach+0xa8/0x1c0
5939 00:46:58.427947 <4>[ 2.314293] device_initial_probe+0x14/0x20
5940 00:46:58.435070 <4>[ 2.318732] bus_probe_device+0x9c/0xa4
5941 00:46:58.438362 <4>[ 2.322822] device_add+0x3ac/0x7ac
5942 00:46:58.441807 <4>[ 2.326564] __spi_add_device+0x78/0x120
5943 00:46:58.445179 <4>[ 2.330743] spi_add_device+0x40/0x7c
5944 00:46:58.451472 <4>[ 2.334661] spi_register_controller+0x610/0xad0
5945 00:46:58.454821 <4>[ 2.339534] devm_spi_register_controller+0x4c/0xa4
5946 00:46:58.458362 <4>[ 2.344667] mtk_spi_probe+0x3f8/0x650
5947 00:46:58.465436 <4>[ 2.348671] platform_probe+0x68/0xe0
5948 00:46:58.468227 <4>[ 2.352589] really_probe+0xbc/0x2e0
5949 00:46:58.471503 <4>[ 2.356419] __driver_probe_device+0x78/0x11c
5950 00:46:58.474954 <4>[ 2.361031] driver_probe_device+0xd8/0x160
5951 00:46:58.481345 <4>[ 2.365469] __driver_attach+0x94/0x19c
5952 00:46:58.484839 <4>[ 2.369560] bus_for_each_dev+0x70/0xd0
5953 00:46:58.488737 <4>[ 2.373650] driver_attach+0x24/0x30
5954 00:46:58.491703 <4>[ 2.377480] bus_add_driver+0x154/0x20c
5955 00:46:58.495205 <4>[ 2.381570] driver_register+0x78/0x130
5956 00:46:58.501681 <4>[ 2.385661] __platform_driver_register+0x28/0x34
5957 00:46:58.504795 <4>[ 2.390620] mtk_spi_driver_init+0x1c/0x28
5958 00:46:58.508224 <4>[ 2.394974] do_one_initcall+0x50/0x1d0
5959 00:46:58.515097 <4>[ 2.399065] kernel_init_freeable+0x21c/0x288
5960 00:46:58.518286 <4>[ 2.403678] kernel_init+0x24/0x12c
5961 00:46:58.521888 <4>[ 2.407423] ret_from_fork+0x10/0x20
5962 00:46:58.532612 <6>[ 2.416392] tun: Universal TUN/TAP device driver, 1.6
5963 00:46:58.535555 <6>[ 2.422697] thunder_xcv, ver 1.0
5964 00:46:58.538809 <6>[ 2.426212] thunder_bgx, ver 1.0
5965 00:46:58.542262 <6>[ 2.429709] nicpf, ver 1.0
5966 00:46:58.553465 <6>[ 2.434092] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5967 00:46:58.556507 <6>[ 2.441578] hns3: Copyright (c) 2017 Huawei Corporation.
5968 00:46:58.563569 <6>[ 2.447175] hclge is initializing
5969 00:46:58.566609 <6>[ 2.450760] e1000: Intel(R) PRO/1000 Network Driver
5970 00:46:58.573220 <6>[ 2.455894] e1000: Copyright (c) 1999-2006 Intel Corporation.
5971 00:46:58.576581 <6>[ 2.461917] e1000e: Intel(R) PRO/1000 Network Driver
5972 00:46:58.583254 <6>[ 2.467138] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5973 00:46:58.589738 <6>[ 2.473331] igb: Intel(R) Gigabit Ethernet Network Driver
5974 00:46:58.596319 <6>[ 2.478987] igb: Copyright (c) 2007-2014 Intel Corporation.
5975 00:46:58.603274 <6>[ 2.484829] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5976 00:46:58.609900 <6>[ 2.491352] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5977 00:46:58.612905 <6>[ 2.497918] sky2: driver version 1.30
5978 00:46:58.619716 <6>[ 2.503178] usbcore: registered new device driver r8152-cfgselector
5979 00:46:58.626468 <6>[ 2.509721] usbcore: registered new interface driver r8152
5980 00:46:58.633298 <6>[ 2.515554] VFIO - User Level meta-driver version: 0.3
5981 00:46:58.639743 <6>[ 2.523387] mtu3 11201000.usb: uwk - reg:0x420, version:101
5982 00:46:58.646470 <4>[ 2.529261] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5983 00:46:58.653374 <6>[ 2.536534] mtu3 11201000.usb: dr_mode: 1, drd: auto
5984 00:46:58.659922 <6>[ 2.541759] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5985 00:46:58.662938 <6>[ 2.547947] mtu3 11201000.usb: usb3-drd: 0
5986 00:46:58.673068 <6>[ 2.553482] mtu3 11201000.usb: xHCI platform device register success...
5987 00:46:58.679726 <4>[ 2.562125] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5988 00:46:58.686203 <6>[ 2.570069] xhci-mtk 11200000.usb: xHCI Host Controller
5989 00:46:58.692916 <6>[ 2.575580] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5990 00:46:58.699519 <6>[ 2.583307] xhci-mtk 11200000.usb: USB3 root hub has no ports
5991 00:46:58.709396 <6>[ 2.589316] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5992 00:46:58.716449 <6>[ 2.598739] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5993 00:46:58.722561 <6>[ 2.604822] xhci-mtk 11200000.usb: xHCI Host Controller
5994 00:46:58.729536 <6>[ 2.610310] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5995 00:46:58.736286 <6>[ 2.617967] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5996 00:46:58.739536 <6>[ 2.624791] hub 1-0:1.0: USB hub found
5997 00:46:58.742873 <6>[ 2.628820] hub 1-0:1.0: 1 port detected
5998 00:46:58.753482 <6>[ 2.634169] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5999 00:46:58.757057 <6>[ 2.642782] hub 2-0:1.0: USB hub found
6000 00:46:58.766801 <3>[ 2.646809] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6001 00:46:58.773624 <6>[ 2.654705] usbcore: registered new interface driver usb-storage
6002 00:46:58.779849 <6>[ 2.661290] usbcore: registered new device driver onboard-usb-hub
6003 00:46:58.789412 <4>[ 2.669879] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6004 00:46:58.798206 <6>[ 2.682149] mt6397-rtc mt6358-rtc: registered as rtc0
6005 00:46:58.807993 <6>[ 2.687629] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:46:58 UTC (1718498818)
6006 00:46:58.811226 <6>[ 2.697514] i2c_dev: i2c /dev entries driver
6007 00:46:58.823123 <6>[ 2.703921] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6008 00:46:58.833321 <6>[ 2.712302] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6009 00:46:58.836592 <6>[ 2.721209] i2c 4-0058: Fixed dependency cycle(s) with /panel
6010 00:46:58.846842 <6>[ 2.727279] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6011 00:46:58.852979 <3>[ 2.734750] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6012 00:46:58.871089 <6>[ 2.754805] cpu cpu0: EM: created perf domain
6013 00:46:58.880971 <6>[ 2.760319] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6014 00:46:58.887528 <6>[ 2.771605] cpu cpu4: EM: created perf domain
6015 00:46:58.894665 <6>[ 2.778361] sdhci: Secure Digital Host Controller Interface driver
6016 00:46:58.901156 <6>[ 2.784820] sdhci: Copyright(c) Pierre Ossman
6017 00:46:58.907659 <6>[ 2.790228] Synopsys Designware Multimedia Card Interface Driver
6018 00:46:58.913980 <6>[ 2.790739] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6019 00:46:58.917347 <6>[ 2.797328] sdhci-pltfm: SDHCI platform and OF driver helper
6020 00:46:58.926909 <6>[ 2.811084] ledtrig-cpu: registered to indicate activity on CPUs
6021 00:46:58.934911 <6>[ 2.819158] usbcore: registered new interface driver usbhid
6022 00:46:58.938081 <6>[ 2.825000] usbhid: USB HID core driver
6023 00:46:58.949086 <6>[ 2.829261] spi_master spi2: will run message pump with realtime priority
6024 00:46:58.952724 <4>[ 2.829268] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6025 00:46:58.962819 <4>[ 2.843554] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6026 00:46:58.976424 <6>[ 2.846735] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6027 00:46:58.989692 <6>[ 2.865927] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6028 00:46:58.996309 <4>[ 2.872981] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6029 00:46:59.002975 <6>[ 2.886937] cros-ec-spi spi2.0: Chrome EC device registered
6030 00:46:59.014708 <4>[ 2.895816] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6031 00:46:59.026678 <4>[ 2.907348] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6032 00:46:59.033202 <4>[ 2.916559] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6033 00:46:59.046185 <6>[ 2.926965] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6034 00:46:59.072455 <6>[ 2.956712] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6035 00:46:59.079036 <6>[ 2.963078] mmc0: new HS400 MMC card at address 0001
6036 00:46:59.088942 <6>[ 2.968519] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6037 00:46:59.092075 <6>[ 2.969810] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6038 00:46:59.102332 <6>[ 2.981714] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6039 00:46:59.109139 <6>[ 2.989040] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6040 00:46:59.115627 <6>[ 2.994397] NET: Registered PF_PACKET protocol family
6041 00:46:59.125765 <6>[ 2.996973] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6042 00:46:59.135722 <6>[ 2.997087] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6043 00:46:59.142240 <6>[ 3.001682] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6044 00:46:59.145666 <6>[ 3.004222] 9pnet: Installing 9P2000 support
6045 00:46:59.152078 <6>[ 3.017623] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6046 00:46:59.155527 <5>[ 3.026177] Key type dns_resolver registered
6047 00:46:59.162565 <6>[ 3.032647] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6048 00:46:59.168780 <6>[ 3.036312] registered taskstats version 1
6049 00:46:59.175768 <6>[ 3.045795] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6050 00:46:59.178539 <5>[ 3.052146] Loading compiled-in X.509 certificates
6051 00:46:59.232229 <3>[ 3.113353] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6052 00:46:59.265715 <6>[ 3.143452] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6053 00:46:59.276799 <6>[ 3.157904] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6054 00:46:59.287483 <6>[ 3.166466] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6055 00:46:59.293738 <6>[ 3.174994] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6056 00:46:59.303669 <6>[ 3.183668] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6057 00:46:59.310346 <6>[ 3.192330] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6058 00:46:59.320353 <6>[ 3.200957] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6059 00:46:59.323593 <6>[ 3.205422] hub 1-1:1.0: USB hub found
6060 00:46:59.333828 <6>[ 3.209507] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6061 00:46:59.336929 <6>[ 3.214007] hub 1-1:1.0: 3 ports detected
6062 00:46:59.343566 <6>[ 3.223020] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6063 00:46:59.349835 <6>[ 3.234033] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6064 00:46:59.357506 <6>[ 3.241391] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6065 00:46:59.367679 <6>[ 3.248658] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6066 00:46:59.374145 <6>[ 3.256068] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6067 00:46:59.380959 <6>[ 3.264374] panfrost 13040000.gpu: clock rate = 511999970
6068 00:46:59.391101 <6>[ 3.270068] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6069 00:46:59.397567 <6>[ 3.280150] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6070 00:46:59.407575 <6>[ 3.288160] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6071 00:46:59.420969 <6>[ 3.296603] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6072 00:46:59.428092 <6>[ 3.308692] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6073 00:46:59.438935 <6>[ 3.319918] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6074 00:46:59.449448 <6>[ 3.328715] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6075 00:46:59.459225 <6>[ 3.337863] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6076 00:46:59.465587 <6>[ 3.346993] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6077 00:46:59.475882 <6>[ 3.356120] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6078 00:46:59.486018 <6>[ 3.365420] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6079 00:46:59.495679 <6>[ 3.374721] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6080 00:46:59.505568 <6>[ 3.384194] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6081 00:46:59.512350 <6>[ 3.393668] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6082 00:46:59.522166 <6>[ 3.402794] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6083 00:46:59.594453 <6>[ 3.474820] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6084 00:46:59.604017 <6>[ 3.483697] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6085 00:46:59.613878 <6>[ 3.494860] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6086 00:46:59.633097 <6>[ 3.513805] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6087 00:46:59.734929 <6>[ 3.619091] hub 1-1.1:1.0: USB hub found
6088 00:46:59.738516 <6>[ 3.623369] hub 1-1.1:1.0: 4 ports detected
6089 00:47:00.303801 <6>[ 4.171353] Console: switching to colour frame buffer device 170x48
6090 00:47:00.313644 <6>[ 4.194585] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6091 00:47:00.336091 <6>[ 4.213599] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6092 00:47:00.356975 <6>[ 4.234392] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6093 00:47:00.363257 <6>[ 4.246898] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6094 00:47:00.374628 <6>[ 4.255291] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6095 00:47:00.384571 <6>[ 4.263089] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6096 00:47:00.401073 <6>[ 4.281811] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6097 00:47:00.410963 <6>[ 4.283165] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6098 00:47:00.584972 <6>[ 4.465946] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6099 00:47:00.696692 <4>[ 4.577502] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6100 00:47:00.706559 <4>[ 4.586760] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6101 00:47:00.746653 <6>[ 4.630803] r8152 1-1.2:1.0 eth0: v1.12.13
6102 00:47:00.770923 <6>[ 4.648116] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6103 00:47:00.777416 <6>[ 4.659329] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6104 00:47:00.964921 <6>[ 4.845814] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6105 00:47:01.097620 <6>[ 4.975020] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6106 00:47:01.153612 <6>[ 5.034171] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6107 00:47:01.278333 <4>[ 5.159069] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6108 00:47:01.291119 <4>[ 5.171643] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6109 00:47:01.348434 <6>[ 5.232325] r8152 1-1.1.1:1.0 eth1: v1.12.13
6110 00:47:01.374811 <6>[ 5.252435] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6111 00:47:02.410287 <6>[ 6.294195] r8152 1-1.2:1.0 eth0: carrier on
6112 00:47:05.249921 <5>[ 6.317807] Sending DHCP requests .., OK
6113 00:47:05.262460 <6>[ 9.143271] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6114 00:47:05.272731 <6>[ 9.156708] IP-Config: Complete:
6115 00:47:05.287640 <6>[ 9.165256] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6116 00:47:05.300355 <6>[ 9.181182] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6117 00:47:05.313772 <6>[ 9.194597] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6118 00:47:05.321698 <6>[ 9.194605] nameserver0=192.168.201.1
6119 00:47:05.351238 <6>[ 9.235281] clk: Disabling unused clocks
6120 00:47:05.355933 <6>[ 9.243443] ALSA device list:
6121 00:47:05.365025 <6>[ 9.248991] No soundcards found.
6122 00:47:05.373248 <6>[ 9.257238] Freeing unused kernel memory: 8512K
6123 00:47:05.379883 <6>[ 9.264204] Run /init as init process
6124 00:47:05.414789 <6>[ 9.298837] NET: Registered PF_INET6 protocol family
6125 00:47:05.423696 <6>[ 9.307595] Segment Routing with IPv6
6126 00:47:05.426577 <6>[ 9.312651] In-situ OAM (IOAM) with IPv6
6127 00:47:05.469798 <30>[ 9.327361] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6128 00:47:05.478558 <30>[ 9.362865] systemd[1]: Detected architecture arm64.
6129 00:47:05.483641
6130 00:47:05.487113 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6131 00:47:05.487555
6132 00:47:05.502475 <30>[ 9.386289] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6133 00:47:05.649436 <30>[ 9.530088] systemd[1]: Queued start job for default target graphical.target.
6134 00:47:05.679336 <30>[ 9.559836] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6135 00:47:05.688958 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6136 00:47:05.706711 <30>[ 9.587068] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6137 00:47:05.716915 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6138 00:47:05.734270 <30>[ 9.614893] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6139 00:47:05.746285 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6140 00:47:05.766060 <30>[ 9.646790] systemd[1]: Created slice user.slice - User and Session Slice.
6141 00:47:05.776799 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6142 00:47:05.796794 <30>[ 9.674296] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6143 00:47:05.809131 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6144 00:47:05.828766 <30>[ 9.706180] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6145 00:47:05.841657 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6146 00:47:05.867452 <30>[ 9.738048] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6147 00:47:05.886085 <30>[ 9.766752] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6148 00:47:05.893840 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6149 00:47:05.913366 <30>[ 9.793961] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6150 00:47:05.926554 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6151 00:47:05.945436 <30>[ 9.826018] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6152 00:47:05.959631 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6153 00:47:05.973894 <30>[ 9.858077] systemd[1]: Reached target paths.target - Path Units.
6154 00:47:05.989084 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6155 00:47:06.005260 <30>[ 9.885974] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6156 00:47:06.017803 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6157 00:47:06.033832 <30>[ 9.917945] systemd[1]: Reached target slices.target - Slice Units.
6158 00:47:06.049160 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6159 00:47:06.061905 <30>[ 9.945987] systemd[1]: Reached target swap.target - Swaps.
6160 00:47:06.072993 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6161 00:47:06.094012 <30>[ 9.974722] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6162 00:47:06.107965 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6163 00:47:06.125721 <30>[ 10.006463] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6164 00:47:06.139791 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6165 00:47:06.158470 <30>[ 10.039360] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6166 00:47:06.172121 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6167 00:47:06.189751 <30>[ 10.070609] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6168 00:47:06.204093 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6169 00:47:06.221667 <30>[ 10.102560] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6170 00:47:06.233960 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6171 00:47:06.254334 <30>[ 10.134775] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6172 00:47:06.267778 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6173 00:47:06.286074 <30>[ 10.166657] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6174 00:47:06.299049 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6175 00:47:06.318887 <30>[ 10.199480] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6176 00:47:06.332047 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6177 00:47:06.381340 <30>[ 10.262237] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6178 00:47:06.394442 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6179 00:47:06.417016 <30>[ 10.297570] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6180 00:47:06.428307 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6181 00:47:06.450576 <30>[ 10.331038] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6182 00:47:06.463775 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6183 00:47:06.488277 <30>[ 10.362454] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6184 00:47:06.508351 <30>[ 10.389113] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6185 00:47:06.520621 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6186 00:47:06.542727 <30>[ 10.423290] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6187 00:47:06.555116 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6188 00:47:06.614088 <30>[ 10.495029] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6189 00:47:06.628213 Startin<6>[ 10.506925] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6190 00:47:06.631579 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6191 00:47:06.655898 <30>[ 10.536645] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6192 00:47:06.669075 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6193 00:47:06.691300 <30>[ 10.572181] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6194 00:47:06.705792 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6195 00:47:06.753956 <30>[ 10.634439] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6196 00:47:06.764958 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6197 00:47:06.790902 <30>[ 10.671812] systemd[1]: Starting systemd-journald.service - Journal Service...
6198 00:47:06.802173 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6199 00:47:06.821308 <30>[ 10.701738] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6200 00:47:06.831152 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6201 00:47:06.857087 <30>[ 10.734640] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6202 00:47:06.867975 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6203 00:47:06.890045 <30>[ 10.770548] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6204 00:47:06.902733 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6205 00:47:06.938063 <30>[ 10.818687] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6206 00:47:06.949014 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6207 00:47:06.968973 <30>[ 10.849449] systemd[1]: Started systemd-journald.service - Journal Service.
6208 00:47:06.978682 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6209 00:47:06.999430 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6210 00:47:07.017914 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6211 00:47:07.037622 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6212 00:47:07.055011 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6213 00:47:07.080649 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6214 00:47:07.104495 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6215 00:47:07.127730 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6216 00:47:07.148836 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6217 00:47:07.168043 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6218 00:47:07.186986 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6219 00:47:07.210810 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6220 00:47:07.233783 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6221 00:47:07.254662 See 'systemctl status systemd-remount-fs.service' for details.
6222 00:47:07.274878 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6223 00:47:07.296107 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6224 00:47:07.342700 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6225 00:47:07.368202 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6226 00:47:07.380325 <46>[ 11.260917] systemd-journald[197]: Received client request to flush runtime journal.
6227 00:47:07.394261 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6228 00:47:07.417906 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6229 00:47:07.441137 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6230 00:47:07.473183 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6231 00:47:07.491180 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6232 00:47:07.512510 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6233 00:47:07.531532 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6234 00:47:07.551435 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6235 00:47:07.594896 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6236 00:47:07.624367 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6237 00:47:07.643160 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6238 00:47:07.662661 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6239 00:47:07.718761 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6240 00:47:07.742991 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6241 00:47:07.771253 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6242 00:47:07.823993 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6243 00:47:07.845024 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6244 00:47:07.865419 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Event<6>[ 11.749096] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6245 00:47:07.868592 s and Files.
6246 00:47:07.899770 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6247 00:47:07.924545 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6248 00:47:07.946985 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6249 00:47:08.024738 <6>[ 11.905615] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6250 00:47:08.040922 <4>[ 11.921695] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6251 00:47:08.060871 <6>[ 11.938163] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6252 00:47:08.077117 <6>[ 11.954551] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6253 00:47:08.087201 <3>[ 11.967842] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6254 00:47:08.100516 <3>[ 11.968308] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6255 00:47:08.107050 <3>[ 11.977959] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6256 00:47:08.114968 <3>[ 11.983778] mtk-scp 10500000.scp: invalid resource
6257 00:47:08.125208 <6>[ 11.983835] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6258 00:47:08.142259 <3>[ 12.019359] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6259 00:47:08.145360 <6>[ 12.025533] remoteproc remoteproc0: scp is available
6260 00:47:08.151945 <3>[ 12.030353] elan_i2c 2-0015: Error applying setting, reverse things back
6261 00:47:08.161641 <4>[ 12.035854] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6262 00:47:08.177219 <6>[ 12.061353] remoteproc remoteproc0: powering up scp
6263 00:47:08.188382 <4>[ 12.068884] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6264 00:47:08.195825 <3>[ 12.079807] remoteproc remoteproc0: request_firmware failed: -2
6265 00:47:08.211159 <3>[ 12.088816] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6266 00:47:08.224066 <3>[ 12.104936] debugfs: File 'Playback' in directory 'dapm' already present!
6267 00:47:08.234528 <3>[ 12.115164] debugfs: File 'Capture' in directory 'dapm' already present!
6268 00:47:08.272206 <4>[ 12.152998] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6269 00:47:08.372322 <4>[ 12.253107] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6270 00:47:08.390912 <3>[ 12.271714] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6271 00:47:08.402085 <3>[ 12.282273] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6272 00:47:08.411801 <3>[ 12.292675] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6273 00:47:08.440616 <6>[ 12.318159] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6274 00:47:08.464330 <3>[ 12.345009] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6275 00:47:08.478497 <3>[ 12.358893] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6276 00:47:08.491565 <3>[ 12.372397] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6277 00:47:08.505601 <3>[ 12.385104] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6278 00:47:08.517063 <3>[ 12.397783] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6279 00:47:08.531326 <6>[ 12.412231] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6280 00:47:08.543513 <6>[ 12.427293] mc: Linux media interface: v0.10
6281 00:47:08.596448 <3>[ 12.477090] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6282 00:47:08.608919 <3>[ 12.492760] thermal_sys: Failed to find 'trips' node
6283 00:47:08.621900 <3>[ 12.502622] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6284 00:47:08.634162 <3>[ 12.514827] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6285 00:47:08.647255 <4>[ 12.527935] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6286 00:47:08.685798 <3>[ 12.569767] thermal_sys: Failed to find 'trips' node
6287 00:47:08.710007 <3>[ 12.590484] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6288 00:47:08.722165 <3>[ 12.602668] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6289 00:47:08.734583 <4>[ 12.615059] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6290 00:47:08.875758 <6>[ 12.759667] videodev: Linux video capture interface: v2.00
6291 00:47:08.908897 <6>[ 12.788931] cs_system_cfg: CoreSight Configuration manager initialised
6292 00:47:08.971664 <6>[ 12.855526] Bluetooth: Core ver 2.22
6293 00:47:08.983556 <6>[ 12.859491] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6294 00:47:08.989915 <6>[ 12.864037] NET: Registered PF_BLUETOOTH protocol family
6295 00:47:09.000273 <6>[ 12.884128] Bluetooth: HCI device and connection manager initialized
6296 00:47:09.010156 <6>[ 12.893977] Bluetooth: HCI socket layer initialized
6297 00:47:09.018313 <6>[ 12.902095] Bluetooth: L2CAP socket layer initialized
6298 00:47:09.025848 <6>[ 12.909988] Bluetooth: SCO socket layer initialized
6299 00:47:09.077207 <5>[ 12.957820] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6300 00:47:09.093825 <6>[ 12.974461] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6301 00:47:09.111353 <5>[ 12.991615] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6302 00:47:09.125711 <5>[ 13.006417] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6303 00:47:09.138896 <4>[ 13.019853] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6304 00:47:09.149496 <6>[ 13.033497] cfg80211: failed to load regulatory.db
6305 00:47:09.160953 <6>[ 13.040697] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6306 00:47:09.197581 <6>[ 13.078145] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6307 00:47:09.204467 <6>[ 13.078639] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6308 00:47:09.214167 <6>[ 13.086624] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6309 00:47:09.240027 <6>[ 13.123592] Bluetooth: HCI UART driver ver 2.3
6310 00:47:09.248559 <6>[ 13.132294] Bluetooth: HCI UART protocol H4 registered
6311 00:47:09.255516 <6>[ 13.134291] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6312 00:47:09.276389 <6>[ 13.155356] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6313 00:47:09.279144 <6>[ 13.156633] Bluetooth: HCI UART protocol LL registered
6314 00:47:09.293421 <6>[ 13.156975] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6315 00:47:09.308719 <6>[ 13.189043] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6316 00:47:09.315035 <6>[ 13.192783] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6317 00:47:09.328472 <6>[ 13.208870] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6318 00:47:09.335130 <6>[ 13.208942] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6319 00:47:09.348955 <6>[ 13.233093] Bluetooth: HCI UART protocol Three-wire (H5) registered
6320 00:47:09.368825 <6>[ 13.252758] Bluetooth: HCI UART protocol Broadcom registered
6321 00:47:09.400639 <6>[ 13.284476] Bluetooth: HCI UART protocol QCA registered
6322 00:47:09.412775 <6>[ 13.296724] Bluetooth: hci0: setting up ROME/QCA6390
6323 00:47:09.419385 <6>[ 13.297262] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6324 00:47:09.448184 <6>[ 13.332142] Bluetooth: HCI UART protocol Marvell registered
6325 00:47:09.576976 <4>[ 13.457464] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6326 00:47:09.583254 <4>[ 13.457464] Fallback method does not support PEC.
6327 00:47:09.600946 <3>[ 13.481570] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 00:47:09.621818 <3>[ 13.501743] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6329 00:47:09.650460 <3>[ 13.533709] Bluetooth: hci0: Frame reassembly failed (-84)
6330 00:47:09.660903 <3>[ 13.541480] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6331 00:47:09.678139 <3>[ 13.558550] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6332 00:47:09.694681 <3>[ 13.574753] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 00:47:09.710405 <3>[ 13.590816] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 00:47:09.729473 <3>[ 13.610313] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6335 00:47:09.770276 <3>[ 13.650464] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 00:47:09.779961 <3>[ 13.660300] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6337 00:47:09.847193 <3>[ 13.727170] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6338 00:47:09.873826 <6>[ 13.752653] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6339 00:47:09.885261 <6>[ 13.757785] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6340 00:47:09.895026 <6>[ 13.762718] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6341 00:47:09.898408 <6>[ 13.774875] usbcore: registered new interface driver uvcvideo
6342 00:47:09.911914 <6>[ 13.783806] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6343 00:47:09.932534 [[0;32m OK [0m] Created slic<6>[ 13.814315] Bluetooth: hci0: QCA Product ID :0x00000008
6344 00:47:09.942576 e [0;1;39msystem-syste…- Slic<6>[ 13.823850] Bluetooth: hci0: QCA SOC Version :0x00000044
6345 00:47:09.943103 e /system/systemd-backlight.
6346 00:47:09.948855 <6>[ 13.832308] Bluetooth: hci0: QCA ROM Version :0x00000302
6347 00:47:09.957432 <6>[ 13.841175] Bluetooth: hci0: QCA Patch Version:0x00000111
6348 00:47:09.965260 <6>[ 13.848970] Bluetooth: hci0: QCA controller version 0x00440302
6349 00:47:09.977654 <6>[ 13.848980] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6350 00:47:09.988007 <4>[ 13.849064] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6351 00:47:09.999960 <3>[ 13.849075] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6352 00:47:10.007378 <3>[ 13.849080] Bluetooth: hci0: QCA Failed to download patch (-2)
6353 00:47:10.019168 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6354 00:47:10.037552 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6355 00:47:10.053051 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6356 00:47:10.068638 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6357 00:47:10.082429 <6>[ 13.963315] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6358 00:47:10.115582 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6359 00:47:10.143756 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6360 00:47:10.163175 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6361 00:47:10.182530 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6362 00:47:10.200760 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6363 00:47:10.219540 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6364 00:47:10.235171 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6365 00:47:10.251158 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6366 00:47:10.269815 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6367 00:47:10.285919 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6368 00:47:10.329879 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6369 00:47:10.358192 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6370 00:47:10.380008 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6371 00:47:10.399355 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6372 00:47:10.418456 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6373 00:47:10.429911 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6374 00:47:10.442806 <6>[ 14.323045] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6375 00:47:10.450703 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6376 00:47:10.516166 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6377 00:47:10.522555 <4>[ 14.406037] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6378 00:47:10.536194 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6379 00:47:10.542798 <4>[ 14.425333] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6380 00:47:10.559688 [[0;32m OK [0m] Started [0;1;39msystemd-log<4>[ 14.440938] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6381 00:47:10.562721 ind.service[0m - User Login Management.
6382 00:47:10.569281 <4>[ 14.453397] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6383 00:47:10.618410 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6384 00:47:10.648773 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6385 00:47:10.670050 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6386 00:47:10.692872 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6387 00:47:10.712100 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6388 00:47:10.762021 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6389 00:47:10.810251 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6390 00:47:10.871869
6391 00:47:10.875322 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6392 00:47:10.875924
6393 00:47:10.878321 debian-bookworm-arm64 login: root (automatic login)
6394 00:47:10.878753
6395 00:47:10.899012 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024 aarch64
6396 00:47:10.899510
6397 00:47:10.905792 The programs included with the Debian GNU/Linux system are free software;
6398 00:47:10.912331 the exact distribution terms for each program are described in the
6399 00:47:10.915727 individual files in /usr/share/doc/*/copyright.
6400 00:47:10.916278
6401 00:47:10.922520 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6402 00:47:10.925600 permitted by applicable law.
6403 00:47:10.927007 Matched prompt #10: / #
6405 00:47:10.928016 Setting prompt string to ['/ #']
6406 00:47:10.928470 end: 2.2.5.1 login-action (duration 00:00:15) [common]
6408 00:47:10.929450 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6409 00:47:10.929895 start: 2.2.6 expect-shell-connection (timeout 00:03:38) [common]
6410 00:47:10.930288 Setting prompt string to ['/ #']
6411 00:47:10.930613 Forcing a shell prompt, looking for ['/ #']
6413 00:47:10.981493 / #
6414 00:47:10.982186 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6415 00:47:10.982965 Waiting using forced prompt support (timeout 00:02:30)
6416 00:47:10.987865
6417 00:47:10.988774 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6418 00:47:10.989292 start: 2.2.7 export-device-env (timeout 00:03:38) [common]
6419 00:47:10.989762 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6420 00:47:10.990195 end: 2.2 depthcharge-retry (duration 00:01:22) [common]
6421 00:47:10.990795 end: 2 depthcharge-action (duration 00:01:22) [common]
6422 00:47:10.991398 start: 3 lava-test-retry (timeout 00:08:17) [common]
6423 00:47:10.991864 start: 3.1 lava-test-shell (timeout 00:08:17) [common]
6424 00:47:10.992242 Using namespace: common
6426 00:47:11.093609 / # #
6427 00:47:11.094286 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6428 00:47:11.099974 #
6429 00:47:11.100690 Using /lava-14368395
6431 00:47:11.201770 / # export SHELL=/bin/sh
6432 00:47:11.208499 export SHELL=/bin/sh
6434 00:47:11.310271 / # . /lava-14368395/environment
6435 00:47:11.316807 . /lava-14368395/environment
6437 00:47:11.418485 / #/lava-14368395/bin/lava-test-runner /lava-14368395/0
6438 00:47:11.419148 Test shell timeout: 10s (minimum of the action and connection timeout)
6439 00:47:11.424770 /lava-14368395/bin/lava-test-runner /lava-14368395/0
6440 00:47:11.455211 + export TESTRUN_ID=0_v4l2-compliance-uvc
6441 00:47:11.458595 + cd /lava-14368395/0/tests/0_v4l2-compliance-uvc
6442 00:47:11.459119 + cat uuid
6443 00:47:11.461736 + UUID=14368395_1.5.2.3.1
6444 00:47:11.462193 + set +x
6445 00:47:11.468942 <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14368395_1.5.2.3.1>
6446 00:47:11.469775 Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14368395_1.5.2.3.1
6447 00:47:11.470266 Starting test lava.0_v4l2-compliance-uvc (14368395_1.5.2.3.1)
6448 00:47:11.470693 Skipping test definition patterns.
6449 00:47:11.471728 + /usr/bin/v4l2-parser.sh -d uvcvideo
6450 00:47:11.478394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>
6451 00:47:11.478948 device: /dev/video2
6452 00:47:11.479532 Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
6454 00:47:18.297179 v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t
6455 00:47:18.310614 v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54
6456 00:47:18.323134
6457 00:47:18.341900 Compliance test for uvcvideo device /dev/video2:
6458 00:47:18.353312
6459 00:47:18.366291 Driver Info:
6460 00:47:18.382252 Driver name : uvcvideo
6461 00:47:18.400024 Card type : HD WebCam: HD WebCam
6462 00:47:18.412670 Bus info : usb-11200000.usb-1.3
6463 00:47:18.425047 Driver version : 6.1.92
6464 00:47:18.440548 Capabilities : 0x84a00001
6465 00:47:18.455836 Metadata Capture
6466 00:47:18.468906 Streaming
6467 00:47:18.483479 Extended Pix Format
6468 00:47:18.496944 Device Capabilities
6469 00:47:18.509634 Device Caps : 0x04200001
6470 00:47:18.528332 Streaming
6471 00:47:18.543173 Extended Pix Format
6472 00:47:18.557285 Media Driver Info:
6473 00:47:18.568669 Driver name : uvcvideo
6474 00:47:18.587149 Model : HD WebCam: HD WebCam
6475 00:47:18.599273 Serial :
6476 00:47:18.617036 Bus info : usb-11200000.usb-1.3
6477 00:47:18.627975 Media version : 6.1.92
6478 00:47:18.646046 Hardware revision: 0x00003269 (12905)
6479 00:47:18.658649 Driver version : 6.1.92
6480 00:47:18.675796 Interface Info:
6481 00:47:18.694335 <LAVA_SIGNAL_TESTSET START Interface-Info>
6482 00:47:18.695169 Received signal: <TESTSET> START Interface-Info
6483 00:47:18.695639 Starting test_set Interface-Info
6484 00:47:18.697626 ID : 0x03000002
6485 00:47:18.710869 Type : V4L Video
6486 00:47:18.726520 Entity Info:
6487 00:47:18.735832 <LAVA_SIGNAL_TESTSET STOP>
6488 00:47:18.736609 Received signal: <TESTSET> STOP
6489 00:47:18.736968 Closing test_set Interface-Info
6490 00:47:18.747631 <LAVA_SIGNAL_TESTSET START Entity-Info>
6491 00:47:18.748403 Received signal: <TESTSET> START Entity-Info
6492 00:47:18.748811 Starting test_set Entity-Info
6493 00:47:18.750804 ID : 0x00000001 (1)
6494 00:47:18.768940 Name : HD WebCam: HD WebCam
6495 00:47:18.779858 Function : V4L2 I/O
6496 00:47:18.794732 Flags : default
6497 00:47:18.808737 Pad 0x01000007 : 0: Sink
6498 00:47:18.832678 Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable
6499 00:47:18.835523
6500 00:47:18.848790 Required ioctls:
6501 00:47:18.857551 <LAVA_SIGNAL_TESTSET STOP>
6502 00:47:18.858259 Received signal: <TESTSET> STOP
6503 00:47:18.858623 Closing test_set Entity-Info
6504 00:47:18.868738 <LAVA_SIGNAL_TESTSET START Required-ioctls>
6505 00:47:18.869527 Received signal: <TESTSET> START Required-ioctls
6506 00:47:18.869901 Starting test_set Required-ioctls
6507 00:47:18.871991 test MC information (see 'Media Driver Info' above): OK
6508 00:47:18.902259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>
6509 00:47:18.903056 Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
6511 00:47:18.905522 test VIDIOC_QUERYCAP: OK
6512 00:47:18.927589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6513 00:47:18.928341 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6515 00:47:18.931286 test invalid ioctls: OK
6516 00:47:18.958364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>
6517 00:47:18.958879
6518 00:47:18.959459 Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
6520 00:47:18.974092 Allow for multiple opens:
6521 00:47:18.982245 <LAVA_SIGNAL_TESTSET STOP>
6522 00:47:18.983007 Received signal: <TESTSET> STOP
6523 00:47:18.983360 Closing test_set Required-ioctls
6524 00:47:18.993267 <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>
6525 00:47:18.994019 Received signal: <TESTSET> START Allow-for-multiple-opens
6526 00:47:18.994404 Starting test_set Allow-for-multiple-opens
6527 00:47:18.996412 test second /dev/video2 open: OK
6528 00:47:19.023703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video2-open RESULT=pass>
6529 00:47:19.024471 Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video2-open RESULT=pass
6531 00:47:19.026894 test VIDIOC_QUERYCAP: OK
6532 00:47:19.054624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6533 00:47:19.055413 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6535 00:47:19.057620 test VIDIOC_G/S_PRIORITY: OK
6536 00:47:19.086411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>
6537 00:47:19.087160 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
6539 00:47:19.089627 test for unlimited opens: OK
6540 00:47:19.115672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>
6541 00:47:19.116178
6542 00:47:19.116759 Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
6544 00:47:19.132349 Debug ioctls:
6545 00:47:19.142068 <LAVA_SIGNAL_TESTSET STOP>
6546 00:47:19.142884 Received signal: <TESTSET> STOP
6547 00:47:19.143547 Closing test_set Allow-for-multiple-opens
6548 00:47:19.151982 <LAVA_SIGNAL_TESTSET START Debug-ioctls>
6549 00:47:19.152658 Received signal: <TESTSET> START Debug-ioctls
6550 00:47:19.153019 Starting test_set Debug-ioctls
6551 00:47:19.155746 test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
6552 00:47:19.185606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>
6553 00:47:19.186382 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
6555 00:47:19.191846 test VIDIOC_LOG_STATUS: OK (Not Supported)
6556 00:47:19.214692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>
6557 00:47:19.215213
6558 00:47:19.215799 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
6560 00:47:19.229344 Input ioctls:
6561 00:47:19.239134 <LAVA_SIGNAL_TESTSET STOP>
6562 00:47:19.239893 Received signal: <TESTSET> STOP
6563 00:47:19.240241 Closing test_set Debug-ioctls
6564 00:47:19.249829 <LAVA_SIGNAL_TESTSET START Input-ioctls>
6565 00:47:19.250646 Received signal: <TESTSET> START Input-ioctls
6566 00:47:19.251007 Starting test_set Input-ioctls
6567 00:47:19.253216 test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
6568 00:47:19.284127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>
6569 00:47:19.284963 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
6571 00:47:19.287246 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6572 00:47:19.309927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6573 00:47:19.310737 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6575 00:47:19.316723 test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
6576 00:47:19.339426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>
6577 00:47:19.340191 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
6579 00:47:19.346075 test VIDIOC_ENUMAUDIO: OK (Not Supported)
6580 00:47:19.372637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>
6581 00:47:19.373395 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
6583 00:47:19.375768 test VIDIOC_G/S/ENUMINPUT: OK
6584 00:47:19.405229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>
6585 00:47:19.406019 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
6587 00:47:19.408558 test VIDIOC_G/S_AUDIO: OK (Not Supported)
6588 00:47:19.435715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>
6589 00:47:19.436496 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
6591 00:47:19.438570 Inputs: 1 Audio Inputs: 0 Tuners: 0
6592 00:47:19.450897
6593 00:47:19.474366 test VIDIOC_G/S_MODULATOR: OK (Not Supported)
6594 00:47:19.501251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>
6595 00:47:19.502031 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
6597 00:47:19.507762 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6598 00:47:19.532164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6599 00:47:19.532943 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6601 00:47:19.538536 test VIDIOC_ENUMAUDOUT: OK (Not Supported)
6602 00:47:19.563664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>
6603 00:47:19.564448 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
6605 00:47:19.569947 test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
6606 00:47:19.594525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>
6607 00:47:19.595314 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
6609 00:47:19.601065 test VIDIOC_G/S_AUDOUT: OK (Not Supported)
6610 00:47:19.622594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>
6611 00:47:19.623382 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
6613 00:47:19.626340
6614 00:47:19.650109 test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
6615 00:47:19.679521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>
6616 00:47:19.680304 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
6618 00:47:19.685721 test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
6619 00:47:19.715152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>
6620 00:47:19.715923 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
6622 00:47:19.717718 test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
6623 00:47:19.741053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>
6624 00:47:19.741813 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
6626 00:47:19.744631 test VIDIOC_G/S_EDID: OK (Not Supported)
6627 00:47:19.774635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>
6628 00:47:19.775141
6629 00:47:19.775730 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
6631 00:47:19.791764 Control ioctls (Input 0):
6632 00:47:19.801850 <LAVA_SIGNAL_TESTSET STOP>
6633 00:47:19.802657 Received signal: <TESTSET> STOP
6634 00:47:19.803013 Closing test_set Input-ioctls
6635 00:47:19.813414 <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>
6636 00:47:19.814171 Received signal: <TESTSET> START Control-ioctls-Input-0
6637 00:47:19.814592 Starting test_set Control-ioctls-Input-0
6638 00:47:19.816398 test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
6639 00:47:19.845058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>
6640 00:47:19.845668 test VIDIOC_QUERYCTRL: OK
6641 00:47:19.846300 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
6643 00:47:19.869632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>
6644 00:47:19.870407 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
6646 00:47:19.872901 test VIDIOC_G/S_CTRL: OK
6647 00:47:19.899019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>
6648 00:47:19.899773 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
6650 00:47:19.902387 test VIDIOC_G/S/TRY_EXT_CTRLS: OK
6651 00:47:19.931105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>
6652 00:47:19.931874 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
6654 00:47:19.937497 test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
6655 00:47:19.962861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>
6656 00:47:19.963626 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
6658 00:47:19.966138 test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
6659 00:47:19.990961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>
6660 00:47:19.991753 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
6662 00:47:19.994279 Standard Controls: 15 Private Controls: 0
6663 00:47:20.008935
6664 00:47:20.024715 Format ioctls (Input 0):
6665 00:47:20.034358 <LAVA_SIGNAL_TESTSET STOP>
6666 00:47:20.035142 Received signal: <TESTSET> STOP
6667 00:47:20.035496 Closing test_set Control-ioctls-Input-0
6668 00:47:20.046586 <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>
6669 00:47:20.047367 Received signal: <TESTSET> START Format-ioctls-Input-0
6670 00:47:20.047725 Starting test_set Format-ioctls-Input-0
6671 00:47:20.049360 test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
6672 00:47:20.083006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>
6673 00:47:20.083770 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
6675 00:47:20.086314 test VIDIOC_G/S_PARM: OK
6676 00:47:20.108306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>
6677 00:47:20.109079 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
6679 00:47:20.111116 test VIDIOC_G_FBUF: OK (Not Supported)
6680 00:47:20.141936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>
6681 00:47:20.142885 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
6683 00:47:20.144773 test VIDIOC_G_FMT: OK
6684 00:47:20.174595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>
6685 00:47:20.175364 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
6687 00:47:20.177665 test VIDIOC_TRY_FMT: OK
6688 00:47:20.201280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>
6689 00:47:20.202026 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
6691 00:47:20.207851 warn: v4l2-test-formats.cpp(1046): Could not set fmt2
6692 00:47:20.215600 test VIDIOC_S_FMT: OK
6693 00:47:20.248986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>
6694 00:47:20.249747 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
6696 00:47:20.252248 test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
6697 00:47:20.285521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>
6698 00:47:20.285895 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
6700 00:47:20.289087 test Cropping: OK (Not Supported)
6701 00:47:20.317297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>
6702 00:47:20.317874 Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
6704 00:47:20.320425 test Composing: OK (Not Supported)
6705 00:47:20.348587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>
6706 00:47:20.349666 Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
6708 00:47:20.351678 test Scaling: OK (Not Supported)
6709 00:47:20.378897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>
6710 00:47:20.379523
6711 00:47:20.380265 Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
6713 00:47:20.394140 Codec ioctls (Input 0):
6714 00:47:20.403566 <LAVA_SIGNAL_TESTSET STOP>
6715 00:47:20.404321 Received signal: <TESTSET> STOP
6716 00:47:20.404673 Closing test_set Format-ioctls-Input-0
6717 00:47:20.414490 <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>
6718 00:47:20.415257 Received signal: <TESTSET> START Codec-ioctls-Input-0
6719 00:47:20.415613 Starting test_set Codec-ioctls-Input-0
6720 00:47:20.417506 test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
6721 00:47:20.445714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>
6722 00:47:20.446496 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
6724 00:47:20.452069 test VIDIOC_G_ENC_INDEX: OK (Not Supported)
6725 00:47:20.473841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>
6726 00:47:20.474656 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
6728 00:47:20.480283 test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
6729 00:47:20.505007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>
6730 00:47:20.505522
6731 00:47:20.506104 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
6733 00:47:20.519859 Buffer ioctls (Input 0):
6734 00:47:20.529221 <LAVA_SIGNAL_TESTSET STOP>
6735 00:47:20.529981 Received signal: <TESTSET> STOP
6736 00:47:20.530372 Closing test_set Codec-ioctls-Input-0
6737 00:47:20.540345 <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>
6738 00:47:20.541092 Received signal: <TESTSET> START Buffer-ioctls-Input-0
6739 00:47:20.541448 Starting test_set Buffer-ioctls-Input-0
6740 00:47:20.543817 test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
6741 00:47:20.577258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>
6742 00:47:20.578028 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
6744 00:47:20.580496 test CREATE_BUFS maximum buffers: OK
6745 00:47:20.608848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>
6746 00:47:20.609378 test VIDIOC_EXPBUF: OK
6747 00:47:20.609967 Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
6749 00:47:20.637354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>
6750 00:47:20.638118 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
6752 00:47:20.640519 test Requests: OK (Not Supported)
6753 00:47:20.669707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>
6754 00:47:20.670283
6755 00:47:20.670959 Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
6757 00:47:20.684755 Test input 0:
6758 00:47:20.696536
6759 00:47:20.711037 Streaming ioctls:
6760 00:47:20.720895 <LAVA_SIGNAL_TESTSET STOP>
6761 00:47:20.721664 Received signal: <TESTSET> STOP
6762 00:47:20.722015 Closing test_set Buffer-ioctls-Input-0
6763 00:47:20.731643 <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>
6764 00:47:20.732406 Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
6765 00:47:20.732764 Starting test_set Streaming-ioctls_Test-input-0
6766 00:47:20.734524 test read/write: OK (Not Supported)
6767 00:47:20.761808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>
6768 00:47:20.762606 Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
6770 00:47:20.765104 test blocking wait: OK
6771 00:47:20.793386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>
6772 00:47:20.794152 Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
6774 00:47:20.799706 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6775 00:47:20.808148 test MMAP (no poll): FAIL
6776 00:47:20.839712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>
6777 00:47:20.840479 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
6779 00:47:20.845948 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6780 00:47:20.853910 test MMAP (select): FAIL
6781 00:47:20.885334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>
6782 00:47:20.886103 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
6784 00:47:20.891520 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6785 00:47:20.899017 test MMAP (epoll): FAIL
6786 00:47:20.931156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>
6787 00:47:20.931675
6788 00:47:20.932258 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
6790 00:47:21.168936
6791 00:47:21.179969 test USERPTR (no poll): OK
6792 00:47:21.208484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>
6793 00:47:21.209010
6794 00:47:21.209595 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
6796 00:47:21.439748
6797 00:47:21.451683 test USERPTR (select): OK
6798 00:47:21.482328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>
6799 00:47:21.483270 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
6801 00:47:21.488744 test DMABUF: Cannot test, specify --expbuf-device
6802 00:47:21.497956
6803 00:47:21.521405 Total for uvcvideo device /dev/video2: 54, Succeeded: 51, Failed: 3, Warnings: 1
6804 00:47:21.527259 <LAVA_TEST_RUNNER EXIT>
6805 00:47:21.527932 ok: lava_test_shell seems to have completed
6806 00:47:21.528294 Marking unfinished test run as failed
6808 00:47:21.533880 CREATE_BUFS-maximum-buffers:
result: pass
set: Buffer-ioctls-Input-0
Composing:
result: pass
set: Format-ioctls-Input-0
Cropping:
result: pass
set: Format-ioctls-Input-0
MC-information-see-Media-Driver-Info-above:
result: pass
set: Required-ioctls
MMAP-epoll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-no-poll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-select:
result: fail
set: Streaming-ioctls_Test-input-0
Requests:
result: pass
set: Buffer-ioctls-Input-0
Scaling:
result: pass
set: Format-ioctls-Input-0
USERPTR-no-poll:
result: pass
set: Streaming-ioctls_Test-input-0
USERPTR-select:
result: pass
set: Streaming-ioctls_Test-input-0
VIDIOC_DBG_G/S_REGISTER:
result: pass
set: Debug-ioctls
VIDIOC_DV_TIMINGS_CAP:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_STD:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDIO:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDOUT:
result: pass
set: Input-ioctls
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
result: pass
set: Format-ioctls-Input-0
VIDIOC_EXPBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_G/S/ENUMINPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/ENUMOUTPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/TRY_EXT_CTRLS:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_AUDIO:
result: pass
set: Input-ioctls
VIDIOC_G/S_AUDOUT:
result: pass
set: Input-ioctls
VIDIOC_G/S_CTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_EDID:
result: pass
set: Input-ioctls
VIDIOC_G/S_FREQUENCY:
result: pass
set: Input-ioctls
VIDIOC_G/S_JPEGCOMP:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_MODULATOR:
result: pass
set: Input-ioctls
VIDIOC_G/S_PARM:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G/S_PRIORITY:
result: pass
set: Allow-for-multiple-opens
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
result: pass
set: Input-ioctls
VIDIOC_G_ENC_INDEX:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_G_FBUF:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_SLICED_VBI_CAP:
result: pass
set: Format-ioctls-Input-0
VIDIOC_LOG_STATUS:
result: pass
set: Debug-ioctls
VIDIOC_QUERYCAP:
result: pass
set: Allow-for-multiple-opens
VIDIOC_QUERYCTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
result: pass
set: Control-ioctls-Input-0
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_S_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_S_HW_FREQ_SEEK:
result: pass
set: Input-ioctls
VIDIOC_TRY_DECODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_ENCODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
result: pass
set: Control-ioctls-Input-0
blocking-wait:
result: pass
set: Streaming-ioctls_Test-input-0
device-presence: pass
for-unlimited-opens:
result: pass
set: Allow-for-multiple-opens
invalid-ioctls:
result: pass
set: Required-ioctls
read/write:
result: pass
set: Streaming-ioctls_Test-input-0
second-/dev/video2-open:
result: pass
set: Allow-for-multiple-opens
6809 00:47:21.534619 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6810 00:47:21.535074 end: 3 lava-test-retry (duration 00:00:11) [common]
6811 00:47:21.535537 start: 4 finalize (timeout 00:08:06) [common]
6812 00:47:21.536009 start: 4.1 power-off (timeout 00:00:30) [common]
6813 00:47:21.536762 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6814 00:47:22.743008 >> Command sent successfully.
6815 00:47:22.758891 Returned 0 in 1 seconds
6816 00:47:22.860599 end: 4.1 power-off (duration 00:00:01) [common]
6818 00:47:22.862340 start: 4.2 read-feedback (timeout 00:08:05) [common]
6819 00:47:22.863605 Listened to connection for namespace 'common' for up to 1s
6820 00:47:23.864235 Finalising connection for namespace 'common'
6821 00:47:23.864460 Disconnecting from shell: Finalise
6822 00:47:23.864552 / #
6823 00:47:23.965083 end: 4.2 read-feedback (duration 00:00:01) [common]
6824 00:47:23.965799 end: 4 finalize (duration 00:00:02) [common]
6825 00:47:23.966595 Cleaning after the job
6826 00:47:23.967195 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/ramdisk
6827 00:47:23.989403 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/kernel
6828 00:47:24.019722 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/dtb
6829 00:47:24.020046 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368395/tftp-deploy-04cx3o6c/modules
6830 00:47:24.027579 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368395
6831 00:47:24.088707 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368395
6832 00:47:24.088899 Job finished correctly