Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 48
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 104
1 00:47:46.560439 lava-dispatcher, installed at version: 2024.03
2 00:47:46.560657 start: 0 validate
3 00:47:46.560772 Start time: 2024-06-16 00:47:46.560764+00:00 (UTC)
4 00:47:46.560904 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:47:46.561050 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:47:46.819812 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:47:46.820227 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:47:47.073370 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:47:47.074432 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:47:47.328345 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:47:47.328976 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:47:47.584783 Using caching service: 'http://localhost/cache/?uri=%s'
13 00:47:47.585653 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 00:47:47.846559 validate duration: 1.29
16 00:47:47.847819 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:47:47.848440 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:47:47.848964 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:47:47.849779 Not decompressing ramdisk as can be used compressed.
20 00:47:47.850430 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/arm64/initrd.cpio.gz
21 00:47:47.850849 saving as /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/ramdisk/initrd.cpio.gz
22 00:47:47.851241 total size: 5628143 (5 MB)
23 00:47:47.856121 progress 0 % (0 MB)
24 00:47:47.868290 progress 5 % (0 MB)
25 00:47:47.874485 progress 10 % (0 MB)
26 00:47:47.878475 progress 15 % (0 MB)
27 00:47:47.882136 progress 20 % (1 MB)
28 00:47:47.885203 progress 25 % (1 MB)
29 00:47:47.888152 progress 30 % (1 MB)
30 00:47:47.890803 progress 35 % (1 MB)
31 00:47:47.893004 progress 40 % (2 MB)
32 00:47:47.895341 progress 45 % (2 MB)
33 00:47:47.897286 progress 50 % (2 MB)
34 00:47:47.899338 progress 55 % (2 MB)
35 00:47:47.901315 progress 60 % (3 MB)
36 00:47:47.903030 progress 65 % (3 MB)
37 00:47:47.904821 progress 70 % (3 MB)
38 00:47:47.906436 progress 75 % (4 MB)
39 00:47:47.908227 progress 80 % (4 MB)
40 00:47:47.909665 progress 85 % (4 MB)
41 00:47:47.911326 progress 90 % (4 MB)
42 00:47:47.912890 progress 95 % (5 MB)
43 00:47:47.914332 progress 100 % (5 MB)
44 00:47:47.914537 5 MB downloaded in 0.06 s (84.80 MB/s)
45 00:47:47.914691 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:47:47.914910 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:47:47.914990 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:47:47.915067 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:47:47.915193 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 00:47:47.915261 saving as /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/kernel/Image
52 00:47:47.915317 total size: 54813184 (52 MB)
53 00:47:47.915372 No compression specified
54 00:47:47.916405 progress 0 % (0 MB)
55 00:47:47.930112 progress 5 % (2 MB)
56 00:47:47.944101 progress 10 % (5 MB)
57 00:47:47.957806 progress 15 % (7 MB)
58 00:47:47.971580 progress 20 % (10 MB)
59 00:47:47.985192 progress 25 % (13 MB)
60 00:47:47.999486 progress 30 % (15 MB)
61 00:47:48.013409 progress 35 % (18 MB)
62 00:47:48.027436 progress 40 % (20 MB)
63 00:47:48.041275 progress 45 % (23 MB)
64 00:47:48.055316 progress 50 % (26 MB)
65 00:47:48.069379 progress 55 % (28 MB)
66 00:47:48.083267 progress 60 % (31 MB)
67 00:47:48.096928 progress 65 % (34 MB)
68 00:47:48.110641 progress 70 % (36 MB)
69 00:47:48.125090 progress 75 % (39 MB)
70 00:47:48.138941 progress 80 % (41 MB)
71 00:47:48.152684 progress 85 % (44 MB)
72 00:47:48.166675 progress 90 % (47 MB)
73 00:47:48.180481 progress 95 % (49 MB)
74 00:47:48.193871 progress 100 % (52 MB)
75 00:47:48.194089 52 MB downloaded in 0.28 s (187.52 MB/s)
76 00:47:48.194249 end: 1.2.1 http-download (duration 00:00:00) [common]
78 00:47:48.194465 end: 1.2 download-retry (duration 00:00:00) [common]
79 00:47:48.194548 start: 1.3 download-retry (timeout 00:10:00) [common]
80 00:47:48.194624 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 00:47:48.194755 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 00:47:48.194817 saving as /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 00:47:48.194871 total size: 57695 (0 MB)
84 00:47:48.194925 No compression specified
85 00:47:48.196050 progress 56 % (0 MB)
86 00:47:48.196332 progress 100 % (0 MB)
87 00:47:48.196538 0 MB downloaded in 0.00 s (33.04 MB/s)
88 00:47:48.196655 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:47:48.196861 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:47:48.196938 start: 1.4 download-retry (timeout 00:10:00) [common]
92 00:47:48.197014 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 00:47:48.197115 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/arm64/full.rootfs.tar.xz
94 00:47:48.197175 saving as /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/nfsrootfs/full.rootfs.tar
95 00:47:48.197228 total size: 55895280 (53 MB)
96 00:47:48.197282 Using unxz to decompress xz
97 00:47:48.198562 progress 0 % (0 MB)
98 00:47:48.347339 progress 5 % (2 MB)
99 00:47:48.501097 progress 10 % (5 MB)
100 00:47:48.639478 progress 15 % (8 MB)
101 00:47:48.783843 progress 20 % (10 MB)
102 00:47:48.932221 progress 25 % (13 MB)
103 00:47:49.081897 progress 30 % (16 MB)
104 00:47:49.200098 progress 35 % (18 MB)
105 00:47:49.268655 progress 40 % (21 MB)
106 00:47:49.407096 progress 45 % (24 MB)
107 00:47:49.563882 progress 50 % (26 MB)
108 00:47:49.714763 progress 55 % (29 MB)
109 00:47:49.860886 progress 60 % (32 MB)
110 00:47:50.010544 progress 65 % (34 MB)
111 00:47:50.165941 progress 70 % (37 MB)
112 00:47:50.326509 progress 75 % (40 MB)
113 00:47:50.461624 progress 80 % (42 MB)
114 00:47:50.598254 progress 85 % (45 MB)
115 00:47:50.759927 progress 90 % (48 MB)
116 00:47:50.918982 progress 95 % (50 MB)
117 00:47:51.077354 progress 100 % (53 MB)
118 00:47:51.083334 53 MB downloaded in 2.89 s (18.47 MB/s)
119 00:47:51.083500 end: 1.4.1 http-download (duration 00:00:03) [common]
121 00:47:51.083717 end: 1.4 download-retry (duration 00:00:03) [common]
122 00:47:51.083797 start: 1.5 download-retry (timeout 00:09:57) [common]
123 00:47:51.083884 start: 1.5.1 http-download (timeout 00:09:57) [common]
124 00:47:51.084014 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 00:47:51.084077 saving as /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/modules/modules.tar
126 00:47:51.084131 total size: 8608736 (8 MB)
127 00:47:51.084186 Using unxz to decompress xz
128 00:47:51.085447 progress 0 % (0 MB)
129 00:47:51.103768 progress 5 % (0 MB)
130 00:47:51.129315 progress 10 % (0 MB)
131 00:47:51.156296 progress 15 % (1 MB)
132 00:47:51.179173 progress 20 % (1 MB)
133 00:47:51.201777 progress 25 % (2 MB)
134 00:47:51.224698 progress 30 % (2 MB)
135 00:47:51.248288 progress 35 % (2 MB)
136 00:47:51.273929 progress 40 % (3 MB)
137 00:47:51.296338 progress 45 % (3 MB)
138 00:47:51.320540 progress 50 % (4 MB)
139 00:47:51.345544 progress 55 % (4 MB)
140 00:47:51.383335 progress 60 % (4 MB)
141 00:47:51.412115 progress 65 % (5 MB)
142 00:47:51.436096 progress 70 % (5 MB)
143 00:47:51.461167 progress 75 % (6 MB)
144 00:47:51.486109 progress 80 % (6 MB)
145 00:47:51.509684 progress 85 % (7 MB)
146 00:47:51.534041 progress 90 % (7 MB)
147 00:47:51.558019 progress 95 % (7 MB)
148 00:47:51.581796 progress 100 % (8 MB)
149 00:47:51.587021 8 MB downloaded in 0.50 s (16.33 MB/s)
150 00:47:51.587225 end: 1.5.1 http-download (duration 00:00:01) [common]
152 00:47:51.587561 end: 1.5 download-retry (duration 00:00:01) [common]
153 00:47:51.587679 start: 1.6 prepare-tftp-overlay (timeout 00:09:56) [common]
154 00:47:51.587798 start: 1.6.1 extract-nfsrootfs (timeout 00:09:56) [common]
155 00:47:52.854904 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc
156 00:47:52.855083 end: 1.6.1 extract-nfsrootfs (duration 00:00:01) [common]
157 00:47:52.855191 start: 1.6.2 lava-overlay (timeout 00:09:55) [common]
158 00:47:52.855358 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46
159 00:47:52.855490 makedir: /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin
160 00:47:52.855597 makedir: /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/tests
161 00:47:52.855700 makedir: /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/results
162 00:47:52.855795 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-add-keys
163 00:47:52.855960 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-add-sources
164 00:47:52.856119 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-background-process-start
165 00:47:52.856276 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-background-process-stop
166 00:47:52.856442 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-common-functions
167 00:47:52.856596 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-echo-ipv4
168 00:47:52.856728 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-install-packages
169 00:47:52.856857 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-installed-packages
170 00:47:52.856986 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-os-build
171 00:47:52.857115 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-probe-channel
172 00:47:52.857247 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-probe-ip
173 00:47:52.857399 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-target-ip
174 00:47:52.857534 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-target-mac
175 00:47:52.857688 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-target-storage
176 00:47:52.857842 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-case
177 00:47:52.857973 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-event
178 00:47:52.858127 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-feedback
179 00:47:52.858329 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-raise
180 00:47:52.858452 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-reference
181 00:47:52.858572 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-runner
182 00:47:52.858688 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-set
183 00:47:52.858804 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-test-shell
184 00:47:52.858920 Updating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-install-packages (oe)
185 00:47:52.859062 Updating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/bin/lava-installed-packages (oe)
186 00:47:52.859175 Creating /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/environment
187 00:47:52.859265 LAVA metadata
188 00:47:52.859333 - LAVA_JOB_ID=14368415
189 00:47:52.859392 - LAVA_DISPATCHER_IP=192.168.201.1
190 00:47:52.859485 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:55) [common]
191 00:47:52.859544 skipped lava-vland-overlay
192 00:47:52.859612 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 00:47:52.859684 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
194 00:47:52.859739 skipped lava-multinode-overlay
195 00:47:52.859805 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 00:47:52.859877 start: 1.6.2.3 test-definition (timeout 00:09:55) [common]
197 00:47:52.859939 Loading test definitions
198 00:47:52.860015 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:55) [common]
199 00:47:52.860074 Using /lava-14368415 at stage 0
200 00:47:52.860369 uuid=14368415_1.6.2.3.1 testdef=None
201 00:47:52.860452 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 00:47:52.860529 start: 1.6.2.3.2 test-overlay (timeout 00:09:55) [common]
203 00:47:52.860959 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 00:47:52.861160 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:55) [common]
206 00:47:52.861715 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 00:47:52.861928 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
209 00:47:52.862479 runner path: /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/0/tests/0_wifi-basic test_uuid 14368415_1.6.2.3.1
210 00:47:52.862624 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 00:47:52.862811 Creating lava-test-runner.conf files
213 00:47:52.862867 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368415/lava-overlay-7uz50r46/lava-14368415/0 for stage 0
214 00:47:52.862951 - 0_wifi-basic
215 00:47:52.863043 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 00:47:52.863120 start: 1.6.2.4 compress-overlay (timeout 00:09:55) [common]
217 00:47:52.868514 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 00:47:52.868609 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
219 00:47:52.868688 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 00:47:52.868764 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 00:47:52.868840 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
222 00:47:53.025482 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 00:47:53.025631 start: 1.6.4 extract-modules (timeout 00:09:55) [common]
224 00:47:53.025710 extracting modules file /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc
225 00:47:53.244302 extracting modules file /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368415/extract-overlay-ramdisk-06rdy0w0/ramdisk
226 00:47:53.470872 end: 1.6.4 extract-modules (duration 00:00:00) [common]
227 00:47:53.471010 start: 1.6.5 apply-overlay-tftp (timeout 00:09:54) [common]
228 00:47:53.471087 [common] Applying overlay to NFS
229 00:47:53.471191 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368415/compress-overlay-w8vwx5s1/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc
230 00:47:53.477387 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 00:47:53.477480 start: 1.6.6 configure-preseed-file (timeout 00:09:54) [common]
232 00:47:53.477559 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 00:47:53.477636 start: 1.6.7 compress-ramdisk (timeout 00:09:54) [common]
234 00:47:53.477699 Building ramdisk /var/lib/lava/dispatcher/tmp/14368415/extract-overlay-ramdisk-06rdy0w0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368415/extract-overlay-ramdisk-06rdy0w0/ramdisk
235 00:47:53.806643 >> 130405 blocks
236 00:47:55.895329 rename /var/lib/lava/dispatcher/tmp/14368415/extract-overlay-ramdisk-06rdy0w0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/ramdisk/ramdisk.cpio.gz
237 00:47:55.895502 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
238 00:47:55.895593 start: 1.6.8 prepare-kernel (timeout 00:09:52) [common]
239 00:47:55.895673 start: 1.6.8.1 prepare-fit (timeout 00:09:52) [common]
240 00:47:55.895752 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/kernel/Image']
241 00:48:09.104554 Returned 0 in 13 seconds
242 00:48:09.205517 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/kernel/image.itb
243 00:48:09.661630 output: FIT description: Kernel Image image with one or more FDT blobs
244 00:48:09.661776 output: Created: Sun Jun 16 01:48:09 2024
245 00:48:09.661848 output: Image 0 (kernel-1)
246 00:48:09.661913 output: Description:
247 00:48:09.661975 output: Created: Sun Jun 16 01:48:09 2024
248 00:48:09.662034 output: Type: Kernel Image
249 00:48:09.662093 output: Compression: lzma compressed
250 00:48:09.662151 output: Data Size: 13126376 Bytes = 12818.73 KiB = 12.52 MiB
251 00:48:09.662206 output: Architecture: AArch64
252 00:48:09.662303 output: OS: Linux
253 00:48:09.662356 output: Load Address: 0x00000000
254 00:48:09.662407 output: Entry Point: 0x00000000
255 00:48:09.662457 output: Hash algo: crc32
256 00:48:09.662510 output: Hash value: c791a20a
257 00:48:09.662562 output: Image 1 (fdt-1)
258 00:48:09.662612 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 00:48:09.662662 output: Created: Sun Jun 16 01:48:09 2024
260 00:48:09.662712 output: Type: Flat Device Tree
261 00:48:09.662761 output: Compression: uncompressed
262 00:48:09.662813 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 00:48:09.662862 output: Architecture: AArch64
264 00:48:09.662911 output: Hash algo: crc32
265 00:48:09.662964 output: Hash value: a9713552
266 00:48:09.663013 output: Image 2 (ramdisk-1)
267 00:48:09.663064 output: Description: unavailable
268 00:48:09.663119 output: Created: Sun Jun 16 01:48:09 2024
269 00:48:09.663173 output: Type: RAMDisk Image
270 00:48:09.663226 output: Compression: uncompressed
271 00:48:09.663276 output: Data Size: 18733250 Bytes = 18294.19 KiB = 17.87 MiB
272 00:48:09.663326 output: Architecture: AArch64
273 00:48:09.663374 output: OS: Linux
274 00:48:09.663424 output: Load Address: unavailable
275 00:48:09.663472 output: Entry Point: unavailable
276 00:48:09.663521 output: Hash algo: crc32
277 00:48:09.663569 output: Hash value: f87ba72b
278 00:48:09.663617 output: Default Configuration: 'conf-1'
279 00:48:09.663667 output: Configuration 0 (conf-1)
280 00:48:09.663716 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 00:48:09.663765 output: Kernel: kernel-1
282 00:48:09.663814 output: Init Ramdisk: ramdisk-1
283 00:48:09.663863 output: FDT: fdt-1
284 00:48:09.663911 output: Loadables: kernel-1
285 00:48:09.663960 output:
286 00:48:09.664094 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
287 00:48:09.664181 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
288 00:48:09.664273 end: 1.6 prepare-tftp-overlay (duration 00:00:18) [common]
289 00:48:09.664357 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:38) [common]
290 00:48:09.664422 No LXC device requested
291 00:48:09.664493 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 00:48:09.664570 start: 1.8 deploy-device-env (timeout 00:09:38) [common]
293 00:48:09.664660 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 00:48:09.664735 Checking files for TFTP limit of 4294967296 bytes.
295 00:48:09.665224 end: 1 tftp-deploy (duration 00:00:22) [common]
296 00:48:09.665325 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 00:48:09.665409 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 00:48:09.665525 substitutions:
299 00:48:09.665587 - {DTB}: 14368415/tftp-deploy-74mm1aju/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 00:48:09.665645 - {INITRD}: 14368415/tftp-deploy-74mm1aju/ramdisk/ramdisk.cpio.gz
301 00:48:09.665699 - {KERNEL}: 14368415/tftp-deploy-74mm1aju/kernel/Image
302 00:48:09.665750 - {LAVA_MAC}: None
303 00:48:09.665801 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc
304 00:48:09.665850 - {NFS_SERVER_IP}: 192.168.201.1
305 00:48:09.665900 - {PRESEED_CONFIG}: None
306 00:48:09.665954 - {PRESEED_LOCAL}: None
307 00:48:09.666005 - {RAMDISK}: 14368415/tftp-deploy-74mm1aju/ramdisk/ramdisk.cpio.gz
308 00:48:09.666054 - {ROOT_PART}: None
309 00:48:09.666103 - {ROOT}: None
310 00:48:09.666151 - {SERVER_IP}: 192.168.201.1
311 00:48:09.666200 - {TEE}: None
312 00:48:09.666294 Parsed boot commands:
313 00:48:09.666344 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 00:48:09.666495 Parsed boot commands: tftpboot 192.168.201.1 14368415/tftp-deploy-74mm1aju/kernel/image.itb 14368415/tftp-deploy-74mm1aju/kernel/cmdline
315 00:48:09.666579 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 00:48:09.666657 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 00:48:09.666737 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 00:48:09.666817 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 00:48:09.666879 Not connected, no need to disconnect.
320 00:48:09.666945 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 00:48:09.667016 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 00:48:09.667074 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
323 00:48:09.670505 Setting prompt string to ['lava-test: # ']
324 00:48:09.670805 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 00:48:09.670907 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 00:48:09.671022 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 00:48:09.671119 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 00:48:09.671319 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-5']
329 00:48:31.352822 Returned 0 in 21 seconds
330 00:48:31.453916 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
332 00:48:31.455393 end: 2.2.2 reset-device (duration 00:00:22) [common]
333 00:48:31.455934 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
334 00:48:31.456433 Setting prompt string to 'Starting depthcharge on Juniper...'
335 00:48:31.456807 Changing prompt to 'Starting depthcharge on Juniper...'
336 00:48:31.457191 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
337 00:48:31.458772 [Enter `^Ec?' for help]
338 00:48:31.458852 [DL] 00000000 00000000 010701
339 00:48:31.458913
340 00:48:31.458971
341 00:48:31.459026 F0: 102B 0000
342 00:48:31.459082
343 00:48:31.459135 F3: 1006 0033 [0200]
344 00:48:31.459189
345 00:48:31.459240 F3: 4001 00E0 [0200]
346 00:48:31.459292
347 00:48:31.459342 F3: 0000 0000
348 00:48:31.459392
349 00:48:31.459443 V0: 0000 0000 [0001]
350 00:48:31.459493
351 00:48:31.459542 00: 1027 0002
352 00:48:31.459595
353 00:48:31.459645 01: 0000 0000
354 00:48:31.459699
355 00:48:31.459751 BP: 0C00 0251 [0000]
356 00:48:31.459806
357 00:48:31.459859 G0: 1182 0000
358 00:48:31.459909
359 00:48:31.459957 EC: 0004 0000 [0001]
360 00:48:31.460006
361 00:48:31.460056 S7: 0000 0000 [0000]
362 00:48:31.460105
363 00:48:31.460153 CC: 0000 0000 [0001]
364 00:48:31.460202
365 00:48:31.460255 T0: 0000 00DB [000F]
366 00:48:31.460306
367 00:48:31.460353 Jump to BL
368 00:48:31.460402
369 00:48:31.460450
370 00:48:31.460499
371 00:48:31.460547 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
372 00:48:31.460602 ARM64: Exception handlers installed.
373 00:48:31.460652 ARM64: Testing exception
374 00:48:31.460701 ARM64: Done test exception
375 00:48:31.460751 WDT: Last reset was cold boot
376 00:48:31.460800 SPI0(PAD0) initialized at 992727 Hz
377 00:48:31.460849 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
378 00:48:31.460898 Manufacturer: ef
379 00:48:31.460947 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
380 00:48:31.460997 Probing TPM: . done!
381 00:48:31.461046 TPM ready after 0 ms
382 00:48:31.461095 Connected to device vid:did:rid of 1ae0:0028:00
383 00:48:31.461144 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
384 00:48:31.461195 Initialized TPM device CR50 revision 0
385 00:48:31.461244 tlcl_send_startup: Startup return code is 0
386 00:48:31.461293 TPM: setup succeeded
387 00:48:31.461342 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
388 00:48:31.461392 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
389 00:48:31.461442 in-header: 03 19 00 00 08 00 00 00
390 00:48:31.461491 in-data: a2 e0 47 00 13 00 00 00
391 00:48:31.461539 Chrome EC: UHEPI supported
392 00:48:31.461588 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
393 00:48:31.461638 in-header: 03 a1 00 00 08 00 00 00
394 00:48:31.461687 in-data: 84 60 60 10 00 00 00 00
395 00:48:31.461736 Phase 1
396 00:48:31.461784 FMAP: area GBB found @ 3f5000 (12032 bytes)
397 00:48:31.461834 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
398 00:48:31.461884 VB2:vb2_check_recovery() Recovery was requested manually
399 00:48:31.461933 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
400 00:48:31.461983 Recovery requested (1009000e)
401 00:48:31.462032 tlcl_extend: response is 0
402 00:48:31.462081 tlcl_extend: response is 0
403 00:48:31.462130
404 00:48:31.462179
405 00:48:31.462233 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
406 00:48:31.462291 ARM64: Exception handlers installed.
407 00:48:31.462341 ARM64: Testing exception
408 00:48:31.462390 ARM64: Done test exception
409 00:48:31.462439 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2019
410 00:48:31.462489 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
411 00:48:31.462539 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
412 00:48:31.462589 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
413 00:48:31.462639 [RTC]rtc_get_frequency_meter,134: input=0x17, output=957
414 00:48:31.462687 [RTC]rtc_get_frequency_meter,134: input=0x13, output=868
415 00:48:31.462736 [RTC]rtc_get_frequency_meter,134: input=0x11, output=824
416 00:48:31.462786 [RTC]rtc_get_frequency_meter,134: input=0x10, output=801
417 00:48:31.462836 [RTC]rtc_get_frequency_meter,134: input=0xf, output=779
418 00:48:31.462886 [RTC]rtc_get_frequency_meter,134: input=0x10, output=801
419 00:48:31.462935 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
420 00:48:31.462985 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
421 00:48:31.463035 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
422 00:48:31.463084 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
423 00:48:31.463135 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
424 00:48:31.463185 in-header: 03 19 00 00 08 00 00 00
425 00:48:31.463235 in-data: a2 e0 47 00 13 00 00 00
426 00:48:31.463284 Chrome EC: UHEPI supported
427 00:48:31.463334 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
428 00:48:31.463384 in-header: 03 a1 00 00 08 00 00 00
429 00:48:31.463433 in-data: 84 60 60 10 00 00 00 00
430 00:48:31.463482 Skip loading cached calibration data
431 00:48:31.463531 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
432 00:48:31.463581 in-header: 03 a1 00 00 08 00 00 00
433 00:48:31.463629 in-data: 84 60 60 10 00 00 00 00
434 00:48:31.463679 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
435 00:48:31.463729 in-header: 03 a1 00 00 08 00 00 00
436 00:48:31.463778 in-data: 84 60 60 10 00 00 00 00
437 00:48:31.463827 ADC[3]: Raw value=1040299 ID=8
438 00:48:31.463876 Manufacturer: ef
439 00:48:31.463924 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
440 00:48:31.463975 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
441 00:48:31.464024 CBFS @ 21000 size 3d4000
442 00:48:31.464073 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
443 00:48:31.464123 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
444 00:48:31.464172 CBFS: Found @ offset 3c880 size 4b
445 00:48:31.464221 DRAM-K: Full Calibration
446 00:48:31.464270 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
447 00:48:31.464319 CBFS @ 21000 size 3d4000
448 00:48:31.464367 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
449 00:48:31.464416 CBFS: Locating 'fallback/dram'
450 00:48:31.464465 CBFS: Found @ offset 24b00 size 12268
451 00:48:31.464513 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
452 00:48:31.464563 ddr_geometry: 1, config: 0x0
453 00:48:31.464611 header.status = 0x0
454 00:48:31.464660 header.magic = 0x44524d4b (expected: 0x44524d4b)
455 00:48:31.464709 header.version = 0x5 (expected: 0x5)
456 00:48:31.464947 header.size = 0x8f0 (expected: 0x8f0)
457 00:48:31.465005 header.config = 0x0
458 00:48:31.465055 header.flags = 0x0
459 00:48:31.465105 header.checksum = 0x0
460 00:48:31.465155 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
461 00:48:31.465205 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
462 00:48:31.465255 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
463 00:48:31.465304 ddr_geometry:1
464 00:48:31.465353 [EMI] new MDL number = 1
465 00:48:31.465402 dram_cbt_mode_extern: 0
466 00:48:31.465451 dram_cbt_mode [RK0]: 0, [RK1]: 0
467 00:48:31.465500 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
468 00:48:31.465550
469 00:48:31.465598
470 00:48:31.465647 [Bianco] ETT version 0.0.0.1
471 00:48:31.465696 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
472 00:48:31.465745
473 00:48:31.465794 vSetVcoreByFreq with vcore:762500, freq=1600
474 00:48:31.465844
475 00:48:31.465892 [DramcInit]
476 00:48:31.465940 AutoRefreshCKEOff AutoREF OFF
477 00:48:31.465989 DDRPhyPLLSetting-CKEOFF
478 00:48:31.466038 DDRPhyPLLSetting-CKEON
479 00:48:31.466087
480 00:48:31.466135 Enable WDQS
481 00:48:31.466184 [ModeRegInit_LP4] CH0 RK0
482 00:48:31.466266 Write Rank0 MR13 =0x18
483 00:48:31.466330 Write Rank0 MR12 =0x5d
484 00:48:31.466378 Write Rank0 MR1 =0x56
485 00:48:31.466427 Write Rank0 MR2 =0x1a
486 00:48:31.466475 Write Rank0 MR11 =0x0
487 00:48:31.466524 Write Rank0 MR22 =0x38
488 00:48:31.466572 Write Rank0 MR14 =0x5d
489 00:48:31.466621 Write Rank0 MR3 =0x30
490 00:48:31.466669 Write Rank0 MR13 =0x58
491 00:48:31.466718 Write Rank0 MR12 =0x5d
492 00:48:31.466766 Write Rank0 MR1 =0x56
493 00:48:31.466815 Write Rank0 MR2 =0x2d
494 00:48:31.466863 Write Rank0 MR11 =0x23
495 00:48:31.466912 Write Rank0 MR22 =0x34
496 00:48:31.466961 Write Rank0 MR14 =0x10
497 00:48:31.467009 Write Rank0 MR3 =0x30
498 00:48:31.467058 Write Rank0 MR13 =0xd8
499 00:48:31.467106 [ModeRegInit_LP4] CH0 RK1
500 00:48:31.467155 Write Rank1 MR13 =0x18
501 00:48:31.467204 Write Rank1 MR12 =0x5d
502 00:48:31.467252 Write Rank1 MR1 =0x56
503 00:48:31.467301 Write Rank1 MR2 =0x1a
504 00:48:31.467350 Write Rank1 MR11 =0x0
505 00:48:31.467398 Write Rank1 MR22 =0x38
506 00:48:31.467447 Write Rank1 MR14 =0x5d
507 00:48:31.467495 Write Rank1 MR3 =0x30
508 00:48:31.467543 Write Rank1 MR13 =0x58
509 00:48:31.467592 Write Rank1 MR12 =0x5d
510 00:48:31.467640 Write Rank1 MR1 =0x56
511 00:48:31.467692 Write Rank1 MR2 =0x2d
512 00:48:31.467741 Write Rank1 MR11 =0x23
513 00:48:31.467790 Write Rank1 MR22 =0x34
514 00:48:31.467839 Write Rank1 MR14 =0x10
515 00:48:31.467888 Write Rank1 MR3 =0x30
516 00:48:31.467936 Write Rank1 MR13 =0xd8
517 00:48:31.467984 [ModeRegInit_LP4] CH1 RK0
518 00:48:31.468032 Write Rank0 MR13 =0x18
519 00:48:31.468081 Write Rank0 MR12 =0x5d
520 00:48:31.468129 Write Rank0 MR1 =0x56
521 00:48:31.468178 Write Rank0 MR2 =0x1a
522 00:48:31.468226 Write Rank0 MR11 =0x0
523 00:48:31.468300 Write Rank0 MR22 =0x38
524 00:48:31.468384 Write Rank0 MR14 =0x5d
525 00:48:31.468438 Write Rank0 MR3 =0x30
526 00:48:31.468487 Write Rank0 MR13 =0x58
527 00:48:31.468536 Write Rank0 MR12 =0x5d
528 00:48:31.468585 Write Rank0 MR1 =0x56
529 00:48:31.468634 Write Rank0 MR2 =0x2d
530 00:48:31.468683 Write Rank0 MR11 =0x23
531 00:48:31.468731 Write Rank0 MR22 =0x34
532 00:48:31.468800 Write Rank0 MR14 =0x10
533 00:48:31.468966 Write Rank0 MR3 =0x30
534 00:48:31.469038 Write Rank0 MR13 =0xd8
535 00:48:31.469089 [ModeRegInit_LP4] CH1 RK1
536 00:48:31.469139 Write Rank1 MR13 =0x18
537 00:48:31.469187 Write Rank1 MR12 =0x5d
538 00:48:31.469237 Write Rank1 MR1 =0x56
539 00:48:31.469286 Write Rank1 MR2 =0x1a
540 00:48:31.469335 Write Rank1 MR11 =0x0
541 00:48:31.469384 Write Rank1 MR22 =0x38
542 00:48:31.469433 Write Rank1 MR14 =0x5d
543 00:48:31.469482 Write Rank1 MR3 =0x30
544 00:48:31.469531 Write Rank1 MR13 =0x58
545 00:48:31.469580 Write Rank1 MR12 =0x5d
546 00:48:31.469629 Write Rank1 MR1 =0x56
547 00:48:31.469678 Write Rank1 MR2 =0x2d
548 00:48:31.469726 Write Rank1 MR11 =0x23
549 00:48:31.469775 Write Rank1 MR22 =0x34
550 00:48:31.469824 Write Rank1 MR14 =0x10
551 00:48:31.469874 Write Rank1 MR3 =0x30
552 00:48:31.469922 Write Rank1 MR13 =0xd8
553 00:48:31.469971 match AC timing 3
554 00:48:31.470021 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
555 00:48:31.470072 [MiockJmeterHQA]
556 00:48:31.470121 vSetVcoreByFreq with vcore:762500, freq=1600
557 00:48:31.470171
558 00:48:31.470247 MIOCK jitter meter ch=0
559 00:48:31.470337
560 00:48:31.470423 1T = (101-18) = 83 dly cells
561 00:48:31.470524 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
562 00:48:31.470603 vSetVcoreByFreq with vcore:725000, freq=1200
563 00:48:31.470652
564 00:48:31.470701 MIOCK jitter meter ch=0
565 00:48:31.470749
566 00:48:31.470798 1T = (95-17) = 78 dly cells
567 00:48:31.470847 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
568 00:48:31.470897 vSetVcoreByFreq with vcore:725000, freq=800
569 00:48:31.470945
570 00:48:31.470993 MIOCK jitter meter ch=0
571 00:48:31.471042
572 00:48:31.471090 1T = (95-17) = 78 dly cells
573 00:48:31.471140 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
574 00:48:31.471188 vSetVcoreByFreq with vcore:762500, freq=1600
575 00:48:31.471238 vSetVcoreByFreq with vcore:762500, freq=1600
576 00:48:31.471286
577 00:48:31.471333 K DRVP
578 00:48:31.471382 1. OCD DRVP=0 CALOUT=0
579 00:48:31.471432 1. OCD DRVP=1 CALOUT=0
580 00:48:31.471482 1. OCD DRVP=2 CALOUT=0
581 00:48:31.471532 1. OCD DRVP=3 CALOUT=0
582 00:48:31.471582 1. OCD DRVP=4 CALOUT=0
583 00:48:31.471632 1. OCD DRVP=5 CALOUT=0
584 00:48:31.471681 1. OCD DRVP=6 CALOUT=0
585 00:48:31.471731 1. OCD DRVP=7 CALOUT=0
586 00:48:31.471781 1. OCD DRVP=8 CALOUT=1
587 00:48:31.471831
588 00:48:31.471879 1. OCD DRVP calibration OK! DRVP=8
589 00:48:31.471929
590 00:48:31.471978
591 00:48:31.472027
592 00:48:31.472075 K ODTN
593 00:48:31.472123 3. OCD ODTN=0 ,CALOUT=1
594 00:48:31.472176 3. OCD ODTN=1 ,CALOUT=1
595 00:48:31.472226 3. OCD ODTN=2 ,CALOUT=1
596 00:48:31.472275 3. OCD ODTN=3 ,CALOUT=1
597 00:48:31.472325 3. OCD ODTN=4 ,CALOUT=1
598 00:48:31.472375 3. OCD ODTN=5 ,CALOUT=1
599 00:48:31.472425 3. OCD ODTN=6 ,CALOUT=1
600 00:48:31.472474 3. OCD ODTN=7 ,CALOUT=0
601 00:48:31.472523
602 00:48:31.472571 3. OCD ODTN calibration OK! ODTN=7
603 00:48:31.472621
604 00:48:31.472670 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
605 00:48:31.472719 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
606 00:48:31.472770 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
607 00:48:31.472819
608 00:48:31.472868 K DRVP
609 00:48:31.472916 1. OCD DRVP=0 CALOUT=0
610 00:48:31.472966 1. OCD DRVP=1 CALOUT=0
611 00:48:31.473016 1. OCD DRVP=2 CALOUT=0
612 00:48:31.473066 1. OCD DRVP=3 CALOUT=0
613 00:48:31.473117 1. OCD DRVP=4 CALOUT=0
614 00:48:31.473166 1. OCD DRVP=5 CALOUT=0
615 00:48:31.473216 1. OCD DRVP=6 CALOUT=0
616 00:48:31.473266 1. OCD DRVP=7 CALOUT=0
617 00:48:31.473315 1. OCD DRVP=8 CALOUT=0
618 00:48:31.473364 1. OCD DRVP=9 CALOUT=0
619 00:48:31.473414 1. OCD DRVP=10 CALOUT=1
620 00:48:31.473463
621 00:48:31.473699 1. OCD DRVP calibration OK! DRVP=10
622 00:48:31.473760
623 00:48:31.473810
624 00:48:31.473859
625 00:48:31.473908 K ODTN
626 00:48:31.473957 3. OCD ODTN=0 ,CALOUT=1
627 00:48:31.474008 3. OCD ODTN=1 ,CALOUT=1
628 00:48:31.474059 3. OCD ODTN=2 ,CALOUT=1
629 00:48:31.474109 3. OCD ODTN=3 ,CALOUT=1
630 00:48:31.474160 3. OCD ODTN=4 ,CALOUT=1
631 00:48:31.474232 3. OCD ODTN=5 ,CALOUT=1
632 00:48:31.474298 3. OCD ODTN=6 ,CALOUT=1
633 00:48:31.474348 3. OCD ODTN=7 ,CALOUT=1
634 00:48:31.474399 3. OCD ODTN=8 ,CALOUT=1
635 00:48:31.474449 3. OCD ODTN=9 ,CALOUT=1
636 00:48:31.474499 3. OCD ODTN=10 ,CALOUT=1
637 00:48:31.474555 3. OCD ODTN=11 ,CALOUT=1
638 00:48:31.474607 3. OCD ODTN=12 ,CALOUT=1
639 00:48:31.474657 3. OCD ODTN=13 ,CALOUT=1
640 00:48:31.474708 3. OCD ODTN=14 ,CALOUT=1
641 00:48:31.474759 3. OCD ODTN=15 ,CALOUT=0
642 00:48:31.474809
643 00:48:31.474858 3. OCD ODTN calibration OK! ODTN=15
644 00:48:31.474907
645 00:48:31.474972 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
646 00:48:31.475035 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
647 00:48:31.475084 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
648 00:48:31.475134
649 00:48:31.475182 [DramcInit]
650 00:48:31.475231 AutoRefreshCKEOff AutoREF OFF
651 00:48:31.475280 DDRPhyPLLSetting-CKEOFF
652 00:48:31.475329 DDRPhyPLLSetting-CKEON
653 00:48:31.475377
654 00:48:31.475426 Enable WDQS
655 00:48:31.475474 ==
656 00:48:31.475526 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
657 00:48:31.475575 fsp= 1, odt_onoff= 1, Byte mode= 0
658 00:48:31.475625 ==
659 00:48:31.475674 [Duty_Offset_Calibration]
660 00:48:31.475723
661 00:48:31.475772 ===========================
662 00:48:31.475821 B0:1 B1:0 CA:0
663 00:48:31.475869 ==
664 00:48:31.475918 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
665 00:48:31.475967 fsp= 1, odt_onoff= 1, Byte mode= 0
666 00:48:31.476016 ==
667 00:48:31.476064 [Duty_Offset_Calibration]
668 00:48:31.476112
669 00:48:31.476160 ===========================
670 00:48:31.476210 B0:1 B1:0 CA:-1
671 00:48:31.476258 [ModeRegInit_LP4] CH0 RK0
672 00:48:31.476307 Write Rank0 MR13 =0x18
673 00:48:31.476356 Write Rank0 MR12 =0x5d
674 00:48:31.476405 Write Rank0 MR1 =0x56
675 00:48:31.476454 Write Rank0 MR2 =0x1a
676 00:48:31.476502 Write Rank0 MR11 =0x0
677 00:48:31.476558 Write Rank0 MR22 =0x38
678 00:48:31.476622 Write Rank0 MR14 =0x5d
679 00:48:31.476704 Write Rank0 MR3 =0x30
680 00:48:31.476756 Write Rank0 MR13 =0x58
681 00:48:31.476806 Write Rank0 MR12 =0x5d
682 00:48:31.476854 Write Rank0 MR1 =0x56
683 00:48:31.476903 Write Rank0 MR2 =0x2d
684 00:48:31.476952 Write Rank0 MR11 =0x23
685 00:48:31.477001 Write Rank0 MR22 =0x34
686 00:48:31.477049 Write Rank0 MR14 =0x10
687 00:48:31.477098 Write Rank0 MR3 =0x30
688 00:48:31.477147 Write Rank0 MR13 =0xd8
689 00:48:31.477195 [ModeRegInit_LP4] CH0 RK1
690 00:48:31.477244 Write Rank1 MR13 =0x18
691 00:48:31.477293 Write Rank1 MR12 =0x5d
692 00:48:31.477342 Write Rank1 MR1 =0x56
693 00:48:31.477390 Write Rank1 MR2 =0x1a
694 00:48:31.477439 Write Rank1 MR11 =0x0
695 00:48:31.477487 Write Rank1 MR22 =0x38
696 00:48:31.477536 Write Rank1 MR14 =0x5d
697 00:48:31.477585 Write Rank1 MR3 =0x30
698 00:48:31.477634 Write Rank1 MR13 =0x58
699 00:48:31.477682 Write Rank1 MR12 =0x5d
700 00:48:31.477731 Write Rank1 MR1 =0x56
701 00:48:31.477779 Write Rank1 MR2 =0x2d
702 00:48:31.477828 Write Rank1 MR11 =0x23
703 00:48:31.477876 Write Rank1 MR22 =0x34
704 00:48:31.477924 Write Rank1 MR14 =0x10
705 00:48:31.477972 Write Rank1 MR3 =0x30
706 00:48:31.478021 Write Rank1 MR13 =0xd8
707 00:48:31.478070 [ModeRegInit_LP4] CH1 RK0
708 00:48:31.478118 Write Rank0 MR13 =0x18
709 00:48:31.478167 Write Rank0 MR12 =0x5d
710 00:48:31.478237 Write Rank0 MR1 =0x56
711 00:48:31.478302 Write Rank0 MR2 =0x1a
712 00:48:31.478351 Write Rank0 MR11 =0x0
713 00:48:31.478399 Write Rank0 MR22 =0x38
714 00:48:31.478447 Write Rank0 MR14 =0x5d
715 00:48:31.478495 Write Rank0 MR3 =0x30
716 00:48:31.478544 Write Rank0 MR13 =0x58
717 00:48:31.478593 Write Rank0 MR12 =0x5d
718 00:48:31.478642 Write Rank0 MR1 =0x56
719 00:48:31.478690 Write Rank0 MR2 =0x2d
720 00:48:31.478739 Write Rank0 MR11 =0x23
721 00:48:31.478788 Write Rank0 MR22 =0x34
722 00:48:31.478836 Write Rank0 MR14 =0x10
723 00:48:31.478885 Write Rank0 MR3 =0x30
724 00:48:31.478933 Write Rank0 MR13 =0xd8
725 00:48:31.478982 [ModeRegInit_LP4] CH1 RK1
726 00:48:31.479030 Write Rank1 MR13 =0x18
727 00:48:31.479079 Write Rank1 MR12 =0x5d
728 00:48:31.479127 Write Rank1 MR1 =0x56
729 00:48:31.479176 Write Rank1 MR2 =0x1a
730 00:48:31.479224 Write Rank1 MR11 =0x0
731 00:48:31.479273 Write Rank1 MR22 =0x38
732 00:48:31.479321 Write Rank1 MR14 =0x5d
733 00:48:31.479370 Write Rank1 MR3 =0x30
734 00:48:31.479418 Write Rank1 MR13 =0x58
735 00:48:31.479465 Write Rank1 MR12 =0x5d
736 00:48:31.479513 Write Rank1 MR1 =0x56
737 00:48:31.479562 Write Rank1 MR2 =0x2d
738 00:48:31.479610 Write Rank1 MR11 =0x23
739 00:48:31.479659 Write Rank1 MR22 =0x34
740 00:48:31.479707 Write Rank1 MR14 =0x10
741 00:48:31.479755 Write Rank1 MR3 =0x30
742 00:48:31.479803 Write Rank1 MR13 =0xd8
743 00:48:31.479852 match AC timing 3
744 00:48:31.479901 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
745 00:48:31.479951 DramC Write-DBI off
746 00:48:31.480000 DramC Read-DBI off
747 00:48:31.480049 Write Rank0 MR13 =0x59
748 00:48:31.480098 ==
749 00:48:31.480147 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
750 00:48:31.480196 fsp= 1, odt_onoff= 1, Byte mode= 0
751 00:48:31.480245 ==
752 00:48:31.480294 === u2Vref_new: 0x56 --> 0x2d
753 00:48:31.480344 === u2Vref_new: 0x58 --> 0x38
754 00:48:31.480393 === u2Vref_new: 0x5a --> 0x39
755 00:48:31.480442 === u2Vref_new: 0x5c --> 0x3c
756 00:48:31.480490 === u2Vref_new: 0x5e --> 0x3d
757 00:48:31.480539 === u2Vref_new: 0x60 --> 0xa0
758 00:48:31.480588 [CA 0] Center 33 (4~63) winsize 60
759 00:48:31.480638 [CA 1] Center 34 (6~63) winsize 58
760 00:48:31.480687 [CA 2] Center 27 (-1~56) winsize 58
761 00:48:31.480736 [CA 3] Center 23 (-4~51) winsize 56
762 00:48:31.480785 [CA 4] Center 24 (-3~52) winsize 56
763 00:48:31.480833 [CA 5] Center 28 (-1~58) winsize 60
764 00:48:31.480882
765 00:48:31.480931 [CATrainingPosCal] consider 1 rank data
766 00:48:31.480981 u2DelayCellTimex100 = 753/100 ps
767 00:48:31.481031 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
768 00:48:31.481080 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
769 00:48:31.481129 CA2 delay=27 (-1~56),Diff = 4 PI (5 cell)
770 00:48:31.481178 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
771 00:48:31.481227 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
772 00:48:31.481276 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
773 00:48:31.481325
774 00:48:31.481373 CA PerBit enable=1, Macro0, CA PI delay=23
775 00:48:31.481423 === u2Vref_new: 0x56 --> 0x2d
776 00:48:31.481472
777 00:48:31.481521 Vref(ca) range 1: 22
778 00:48:31.481569
779 00:48:31.481617 CS Dly= 10 (41-0-32)
780 00:48:31.481666 Write Rank0 MR13 =0xd8
781 00:48:31.481715 Write Rank0 MR13 =0xd8
782 00:48:31.481763 Write Rank0 MR12 =0x56
783 00:48:31.481812 Write Rank1 MR13 =0x59
784 00:48:31.481860 ==
785 00:48:31.482113 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
786 00:48:31.482170 fsp= 1, odt_onoff= 1, Byte mode= 0
787 00:48:31.482266 ==
788 00:48:31.482320 === u2Vref_new: 0x56 --> 0x2d
789 00:48:31.482372 === u2Vref_new: 0x58 --> 0x38
790 00:48:31.482421 === u2Vref_new: 0x5a --> 0x39
791 00:48:31.482471 === u2Vref_new: 0x5c --> 0x3c
792 00:48:31.482520 === u2Vref_new: 0x5e --> 0x3d
793 00:48:31.482570 === u2Vref_new: 0x60 --> 0xa0
794 00:48:31.482620 [CA 0] Center 33 (4~63) winsize 60
795 00:48:31.482670 [CA 1] Center 34 (5~63) winsize 59
796 00:48:31.482719 [CA 2] Center 28 (0~56) winsize 57
797 00:48:31.482768 [CA 3] Center 24 (-4~52) winsize 57
798 00:48:31.482817 [CA 4] Center 24 (-3~52) winsize 56
799 00:48:31.482866 [CA 5] Center 29 (1~58) winsize 58
800 00:48:31.482914
801 00:48:31.482963 [CATrainingPosCal] consider 2 rank data
802 00:48:31.483013 u2DelayCellTimex100 = 753/100 ps
803 00:48:31.483063 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
804 00:48:31.483112 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
805 00:48:31.483162 CA2 delay=28 (0~56),Diff = 5 PI (6 cell)
806 00:48:31.483210 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
807 00:48:31.483260 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
808 00:48:31.483309 CA5 delay=29 (1~58),Diff = 6 PI (7 cell)
809 00:48:31.483358
810 00:48:31.483407 CA PerBit enable=1, Macro0, CA PI delay=23
811 00:48:31.483456 === u2Vref_new: 0x56 --> 0x2d
812 00:48:31.483506
813 00:48:31.483555 Vref(ca) range 1: 22
814 00:48:31.483604
815 00:48:31.483653 CS Dly= 7 (38-0-32)
816 00:48:31.483702 Write Rank1 MR13 =0xd8
817 00:48:31.483751 Write Rank1 MR13 =0xd8
818 00:48:31.483800 Write Rank1 MR12 =0x56
819 00:48:31.483848 [RankSwap] Rank num 2, (Multi 1), Rank 0
820 00:48:31.483896 Write Rank0 MR2 =0xad
821 00:48:31.483945 [Write Leveling]
822 00:48:31.483993 delay byte0 byte1 byte2 byte3
823 00:48:31.484042
824 00:48:31.484091 10 0 0
825 00:48:31.484142 11 0 0
826 00:48:31.484192 12 0 0
827 00:48:31.484242 13 0 0
828 00:48:31.484291 14 0 0
829 00:48:31.484340 15 0 0
830 00:48:31.484390 16 0 0
831 00:48:31.484439 17 0 0
832 00:48:31.484490 18 0 0
833 00:48:31.484539 19 0 0
834 00:48:31.484588 20 0 0
835 00:48:31.484637 21 0 0
836 00:48:31.484686 22 0 0
837 00:48:31.484736 23 0 0
838 00:48:31.484786 24 0 0
839 00:48:31.484836 25 0 0
840 00:48:31.484885 26 0 0
841 00:48:31.484936 27 0 ff
842 00:48:31.484986 28 0 ff
843 00:48:31.485035 29 0 ff
844 00:48:31.485085 30 0 ff
845 00:48:31.485135 31 0 ff
846 00:48:31.485185 32 0 ff
847 00:48:31.485234 33 ff ff
848 00:48:31.485284 34 0 ff
849 00:48:31.485334 35 ff ff
850 00:48:31.485385 36 ff ff
851 00:48:31.485435 37 ff ff
852 00:48:31.485484 38 ff ff
853 00:48:31.485534 39 ff ff
854 00:48:31.485584 40 ff ff
855 00:48:31.485634 41 ff ff
856 00:48:31.485683 pass bytecount = 0xff (0xff: all bytes pass)
857 00:48:31.485733
858 00:48:31.485781 DQS0 dly: 35
859 00:48:31.485830 DQS1 dly: 27
860 00:48:31.485878 Write Rank0 MR2 =0x2d
861 00:48:31.485928 [RankSwap] Rank num 2, (Multi 1), Rank 0
862 00:48:31.485977 Write Rank0 MR1 =0xd6
863 00:48:31.486026 [Gating]
864 00:48:31.486074 ==
865 00:48:31.486122 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
866 00:48:31.486172 fsp= 1, odt_onoff= 1, Byte mode= 0
867 00:48:31.486250 ==
868 00:48:31.486315 3 1 0 |3534 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:48:31.486365 3 1 4 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
870 00:48:31.486415 3 1 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
871 00:48:31.486466 3 1 12 |3534 807 |(11 11)(11 11) |(0 0)(0 1)| 0
872 00:48:31.486516 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
873 00:48:31.486566 3 1 20 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
874 00:48:31.486616 3 1 24 |3534 a09 |(11 11)(11 11) |(0 0)(0 1)| 0
875 00:48:31.486666 3 1 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 0)| 0
876 00:48:31.486715 3 2 0 |2524 606 |(11 11)(11 1) |(1 1)(0 1)| 0
877 00:48:31.486766 3 2 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
878 00:48:31.486817 3 2 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
879 00:48:31.486867 3 2 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
880 00:48:31.486918 3 2 16 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
881 00:48:31.486968 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
882 00:48:31.487018 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
883 00:48:31.487068 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
884 00:48:31.487118 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
885 00:48:31.487168 3 3 4 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
886 00:48:31.487218 3 3 8 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
887 00:48:31.487268 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
888 00:48:31.487318 [Byte 0] Lead/lag Transition tap number (1)
889 00:48:31.487367 [Byte 1] Lead/lag falling Transition (3, 3, 12)
890 00:48:31.487416 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
891 00:48:31.487467 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
892 00:48:31.487517 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
893 00:48:31.487567 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
894 00:48:31.487617 3 4 0 |1313 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
895 00:48:31.487667 3 4 4 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
896 00:48:31.487717 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 00:48:31.487767 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 00:48:31.487817 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 00:48:31.487867 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 00:48:31.487917 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 00:48:31.487967 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 00:48:31.488017 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 00:48:31.488067 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 00:48:31.488117 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 00:48:31.488168 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
906 00:48:31.488218 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
907 00:48:31.488268 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
908 00:48:31.488318 [Byte 0] Lead/lag falling Transition (3, 5, 20)
909 00:48:31.488367 [Byte 1] Lead/lag falling Transition (3, 5, 20)
910 00:48:31.488607 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
911 00:48:31.488664 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
912 00:48:31.488715 [Byte 0] Lead/lag Transition tap number (3)
913 00:48:31.488765 [Byte 1] Lead/lag Transition tap number (3)
914 00:48:31.488815 3 6 0 |4646 b0a |(10 10)(11 11) |(0 0)(0 0)| 0
915 00:48:31.488865 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
916 00:48:31.488915 [Byte 0]First pass (3, 6, 4)
917 00:48:31.488965 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 00:48:31.489016 [Byte 1]First pass (3, 6, 8)
919 00:48:31.489065 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 00:48:31.489115 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 00:48:31.489165 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 00:48:31.489215 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 00:48:31.489265 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 00:48:31.489315 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
925 00:48:31.489366 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
926 00:48:31.489416 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
927 00:48:31.489466 All bytes gating window > 1UI, Early break!
928 00:48:31.489515
929 00:48:31.489564 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
930 00:48:31.489613
931 00:48:31.489662 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
932 00:48:31.489711
933 00:48:31.489760
934 00:48:31.489809
935 00:48:31.489857 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
936 00:48:31.489906
937 00:48:31.489954 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
938 00:48:31.490003
939 00:48:31.490051
940 00:48:31.490098 Write Rank0 MR1 =0x56
941 00:48:31.490147
942 00:48:31.490195 best RODT dly(2T, 0.5T) = (2, 2)
943 00:48:31.490286
944 00:48:31.490337 best RODT dly(2T, 0.5T) = (2, 2)
945 00:48:31.490386 ==
946 00:48:31.490436 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
947 00:48:31.490485 fsp= 1, odt_onoff= 1, Byte mode= 0
948 00:48:31.490535 ==
949 00:48:31.490584 Start DQ dly to find pass range UseTestEngine =0
950 00:48:31.490633 x-axis: bit #, y-axis: DQ dly (-127~63)
951 00:48:31.490683 RX Vref Scan = 0
952 00:48:31.490731 -26, [0] xxxxxxxx xxxxxxxx [MSB]
953 00:48:31.490783 -25, [0] xxxxxxxx xxxxxxxx [MSB]
954 00:48:31.490833 -24, [0] xxxxxxxx xxxxxxxx [MSB]
955 00:48:31.490884 -23, [0] xxxxxxxx xxxxxxxx [MSB]
956 00:48:31.490934 -22, [0] xxxxxxxx xxxxxxxx [MSB]
957 00:48:31.490984 -21, [0] xxxxxxxx xxxxxxxx [MSB]
958 00:48:31.491034 -20, [0] xxxxxxxx xxxxxxxx [MSB]
959 00:48:31.491083 -19, [0] xxxxxxxx xxxxxxxx [MSB]
960 00:48:31.491133 -18, [0] xxxxxxxx xxxxxxxx [MSB]
961 00:48:31.491183 -17, [0] xxxxxxxx xxxxxxxx [MSB]
962 00:48:31.491233 -16, [0] xxxxxxxx xxxxxxxx [MSB]
963 00:48:31.491283 -15, [0] xxxxxxxx xxxxxxxx [MSB]
964 00:48:31.491333 -14, [0] xxxxxxxx xxxxxxxx [MSB]
965 00:48:31.491382 -13, [0] xxxxxxxx xxxxxxxx [MSB]
966 00:48:31.491432 -12, [0] xxxxxxxx xxxxxxxx [MSB]
967 00:48:31.491481 -11, [0] xxxxxxxx xxxxxxxx [MSB]
968 00:48:31.491531 -10, [0] xxxxxxxx xxxxxxxx [MSB]
969 00:48:31.491581 -9, [0] xxxxxxxx xxxxxxxx [MSB]
970 00:48:31.491631 -8, [0] xxxxxxxx xxxxxxxx [MSB]
971 00:48:31.491681 -7, [0] xxxxxxxx xxxxxxxx [MSB]
972 00:48:31.491730 -6, [0] xxxxxxxx xxxxxxxx [MSB]
973 00:48:31.491781 -5, [0] xxxxxxxx xxxxxxxx [MSB]
974 00:48:31.491831 -4, [0] xxxxxxxx xxxxxxxx [MSB]
975 00:48:31.491881 -3, [0] xxxoxxxx xxxxxxxx [MSB]
976 00:48:31.491932 -2, [0] xxxoxoxx xxxxxxxx [MSB]
977 00:48:31.491982 -1, [0] xxxoxoxx xxxxxxxx [MSB]
978 00:48:31.492032 0, [0] xxxoxooo xxxxxoxx [MSB]
979 00:48:31.492082 1, [0] xxxoxooo oxxxxoxx [MSB]
980 00:48:31.492132 2, [0] xxxoxooo ooxxooxx [MSB]
981 00:48:31.492182 3, [0] xxxoxooo ooxooooo [MSB]
982 00:48:31.492233 4, [0] xxxoxooo ooxooooo [MSB]
983 00:48:31.492282 5, [0] xxxooooo oooooooo [MSB]
984 00:48:31.492332 6, [0] xooooooo oooooooo [MSB]
985 00:48:31.492382 31, [0] oooxoooo oooooooo [MSB]
986 00:48:31.492432 32, [0] oooxoxoo oooooooo [MSB]
987 00:48:31.492481 33, [0] oooxoxxo oooooooo [MSB]
988 00:48:31.492530 34, [0] oooxoxxo ooooooxo [MSB]
989 00:48:31.492580 35, [0] oooxoxxo xooxooxo [MSB]
990 00:48:31.492629 36, [0] oooxoxxo xooxooxo [MSB]
991 00:48:31.492679 37, [0] oooxoxxx xooxxxxo [MSB]
992 00:48:31.492729 38, [0] oooxoxxx xooxxxxo [MSB]
993 00:48:31.492778 39, [0] oooxxxxx xxoxxxxx [MSB]
994 00:48:31.492828 40, [0] oxoxxxxx xxoxxxxx [MSB]
995 00:48:31.492877 41, [0] xxxxxxxx xxxxxxxx [MSB]
996 00:48:31.492927 iDelay=41, Bit 0, Center 23 (7 ~ 40) 34
997 00:48:31.492976 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
998 00:48:31.493025 iDelay=41, Bit 2, Center 23 (6 ~ 40) 35
999 00:48:31.493074 iDelay=41, Bit 3, Center 13 (-3 ~ 30) 34
1000 00:48:31.493124 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
1001 00:48:31.493172 iDelay=41, Bit 5, Center 14 (-2 ~ 31) 34
1002 00:48:31.493221 iDelay=41, Bit 6, Center 16 (0 ~ 32) 33
1003 00:48:31.493270 iDelay=41, Bit 7, Center 18 (0 ~ 36) 37
1004 00:48:31.493319 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
1005 00:48:31.493368 iDelay=41, Bit 9, Center 20 (2 ~ 38) 37
1006 00:48:31.493423 iDelay=41, Bit 10, Center 22 (5 ~ 40) 36
1007 00:48:31.493475 iDelay=41, Bit 11, Center 18 (3 ~ 34) 32
1008 00:48:31.493524 iDelay=41, Bit 12, Center 19 (2 ~ 36) 35
1009 00:48:31.493574 iDelay=41, Bit 13, Center 18 (0 ~ 36) 37
1010 00:48:31.493623 iDelay=41, Bit 14, Center 18 (3 ~ 33) 31
1011 00:48:31.493672 iDelay=41, Bit 15, Center 20 (3 ~ 38) 36
1012 00:48:31.493721 ==
1013 00:48:31.493771 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1014 00:48:31.493822 fsp= 1, odt_onoff= 1, Byte mode= 0
1015 00:48:31.493872 ==
1016 00:48:31.493921 DQS Delay:
1017 00:48:31.493970 DQS0 = 0, DQS1 = 0
1018 00:48:31.494020 DQM Delay:
1019 00:48:31.494068 DQM0 = 18, DQM1 = 19
1020 00:48:31.494117 DQ Delay:
1021 00:48:31.494165 DQ0 =23, DQ1 =22, DQ2 =23, DQ3 =13
1022 00:48:31.494246 DQ4 =21, DQ5 =14, DQ6 =16, DQ7 =18
1023 00:48:31.494313 DQ8 =17, DQ9 =20, DQ10 =22, DQ11 =18
1024 00:48:31.494363 DQ12 =19, DQ13 =18, DQ14 =18, DQ15 =20
1025 00:48:31.494412
1026 00:48:31.494461
1027 00:48:31.494509 DramC Write-DBI off
1028 00:48:31.494558 ==
1029 00:48:31.494607 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1030 00:48:31.494657 fsp= 1, odt_onoff= 1, Byte mode= 0
1031 00:48:31.494706 ==
1032 00:48:31.494754 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1033 00:48:31.494804
1034 00:48:31.494853 Begin, DQ Scan Range 923~1179
1035 00:48:31.494902
1036 00:48:31.494950
1037 00:48:31.494999 TX Vref Scan disable
1038 00:48:31.495048 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:48:31.495099 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:48:31.495167 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:48:31.495422 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:48:31.495494 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:48:31.495579 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:48:31.495633 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:48:31.495684 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:48:31.495734 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:48:31.495785 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:48:31.495835 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1049 00:48:31.495885 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1050 00:48:31.495936 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1051 00:48:31.495986 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1052 00:48:31.496036 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1053 00:48:31.496087 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1054 00:48:31.496136 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1055 00:48:31.496186 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1056 00:48:31.496237 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1057 00:48:31.496287 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1058 00:48:31.496337 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1059 00:48:31.496387 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1060 00:48:31.496438 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1061 00:48:31.496488 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1062 00:48:31.496538 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1063 00:48:31.496588 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1064 00:48:31.496637 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1065 00:48:31.496687 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1066 00:48:31.496737 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1067 00:48:31.496786 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1068 00:48:31.496836 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1069 00:48:31.496886 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1070 00:48:31.496936 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1071 00:48:31.496986 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1072 00:48:31.497035 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1073 00:48:31.497085 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1074 00:48:31.497134 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1075 00:48:31.497184 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1076 00:48:31.497233 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1077 00:48:31.497283 962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]
1078 00:48:31.497333 963 |3 6 3|[0] xxxxxxxx oxxoxxxx [MSB]
1079 00:48:31.497383 964 |3 6 4|[0] xxxxxxxx ooxoxoxx [MSB]
1080 00:48:31.497433 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1081 00:48:31.497483 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1082 00:48:31.497533 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1083 00:48:31.497583 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1084 00:48:31.497633 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1085 00:48:31.497683 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1086 00:48:31.497734 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1087 00:48:31.497783 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1088 00:48:31.497834 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1089 00:48:31.497884 974 |3 6 14|[0] xxxoxooo oooooooo [MSB]
1090 00:48:31.497935 975 |3 6 15|[0] xxxoxooo oooooooo [MSB]
1091 00:48:31.497984 976 |3 6 16|[0] xooooooo oooooooo [MSB]
1092 00:48:31.498034 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1093 00:48:31.498084 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1094 00:48:31.498134 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1095 00:48:31.498184 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1096 00:48:31.498244 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1097 00:48:31.498295 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1098 00:48:31.498346 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1099 00:48:31.498396 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1100 00:48:31.498446 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1101 00:48:31.498496 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1102 00:48:31.498548 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1103 00:48:31.498599 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1104 00:48:31.498649 Byte0, DQ PI dly=984, DQM PI dly= 984
1105 00:48:31.498699 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1106 00:48:31.498748
1107 00:48:31.498797 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1108 00:48:31.498847
1109 00:48:31.498896 Byte1, DQ PI dly=976, DQM PI dly= 976
1110 00:48:31.498945 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1111 00:48:31.498995
1112 00:48:31.499044 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1113 00:48:31.499094
1114 00:48:31.499142 ==
1115 00:48:31.499190 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1116 00:48:31.499240 fsp= 1, odt_onoff= 1, Byte mode= 0
1117 00:48:31.499290 ==
1118 00:48:31.499339 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1119 00:48:31.499388
1120 00:48:31.499437 Begin, DQ Scan Range 952~1016
1121 00:48:31.499486 Write Rank0 MR14 =0x0
1122 00:48:31.499533
1123 00:48:31.499582 CH=0, VrefRange= 0, VrefLevel = 0
1124 00:48:31.499631 TX Bit0 (978~997) 20 987, Bit8 (965~983) 19 974,
1125 00:48:31.499680 TX Bit1 (978~994) 17 986, Bit9 (967~985) 19 976,
1126 00:48:31.499730 TX Bit2 (977~996) 20 986, Bit10 (970~989) 20 979,
1127 00:48:31.499778 TX Bit3 (972~990) 19 981, Bit11 (967~983) 17 975,
1128 00:48:31.499827 TX Bit4 (977~997) 21 987, Bit12 (967~985) 19 976,
1129 00:48:31.499877 TX Bit5 (975~990) 16 982, Bit13 (967~983) 17 975,
1130 00:48:31.499926 TX Bit6 (976~991) 16 983, Bit14 (967~984) 18 975,
1131 00:48:31.499975 TX Bit7 (976~992) 17 984, Bit15 (969~988) 20 978,
1132 00:48:31.500025
1133 00:48:31.500075 Write Rank0 MR14 =0x2
1134 00:48:31.500123
1135 00:48:31.500171 CH=0, VrefRange= 0, VrefLevel = 2
1136 00:48:31.500220 TX Bit0 (978~997) 20 987, Bit8 (964~983) 20 973,
1137 00:48:31.500270 TX Bit1 (978~995) 18 986, Bit9 (967~985) 19 976,
1138 00:48:31.500320 TX Bit2 (977~996) 20 986, Bit10 (970~989) 20 979,
1139 00:48:31.500369 TX Bit3 (971~990) 20 980, Bit11 (967~984) 18 975,
1140 00:48:31.500419 TX Bit4 (977~997) 21 987, Bit12 (967~986) 20 976,
1141 00:48:31.500468 TX Bit5 (975~990) 16 982, Bit13 (967~983) 17 975,
1142 00:48:31.500518 TX Bit6 (976~991) 16 983, Bit14 (967~984) 18 975,
1143 00:48:31.500567 TX Bit7 (976~993) 18 984, Bit15 (968~988) 21 978,
1144 00:48:31.500616
1145 00:48:31.500665 Write Rank0 MR14 =0x4
1146 00:48:31.500714
1147 00:48:31.500763 CH=0, VrefRange= 0, VrefLevel = 4
1148 00:48:31.501004 TX Bit0 (978~997) 20 987, Bit8 (964~983) 20 973,
1149 00:48:31.501061 TX Bit1 (977~996) 20 986, Bit9 (966~986) 21 976,
1150 00:48:31.501112 TX Bit2 (977~997) 21 987, Bit10 (969~989) 21 979,
1151 00:48:31.501161 TX Bit3 (971~990) 20 980, Bit11 (966~985) 20 975,
1152 00:48:31.501210 TX Bit4 (977~997) 21 987, Bit12 (967~986) 20 976,
1153 00:48:31.501259 TX Bit5 (975~991) 17 983, Bit13 (966~984) 19 975,
1154 00:48:31.501309 TX Bit6 (976~991) 16 983, Bit14 (967~984) 18 975,
1155 00:48:31.501358 TX Bit7 (976~994) 19 985, Bit15 (968~988) 21 978,
1156 00:48:31.501407
1157 00:48:31.501455 Write Rank0 MR14 =0x6
1158 00:48:31.501504
1159 00:48:31.501553 CH=0, VrefRange= 0, VrefLevel = 6
1160 00:48:31.501602 TX Bit0 (977~998) 22 987, Bit8 (964~984) 21 974,
1161 00:48:31.501651 TX Bit1 (977~996) 20 986, Bit9 (966~986) 21 976,
1162 00:48:31.501703 TX Bit2 (977~997) 21 987, Bit10 (969~990) 22 979,
1163 00:48:31.501753 TX Bit3 (971~990) 20 980, Bit11 (965~986) 22 975,
1164 00:48:31.501801 TX Bit4 (977~997) 21 987, Bit12 (967~987) 21 977,
1165 00:48:31.501851 TX Bit5 (975~991) 17 983, Bit13 (966~984) 19 975,
1166 00:48:31.501900 TX Bit6 (975~992) 18 983, Bit14 (967~985) 19 976,
1167 00:48:31.501949 TX Bit7 (976~994) 19 985, Bit15 (968~989) 22 978,
1168 00:48:31.501997
1169 00:48:31.502046 Write Rank0 MR14 =0x8
1170 00:48:31.502095
1171 00:48:31.502143 CH=0, VrefRange= 0, VrefLevel = 8
1172 00:48:31.502193 TX Bit0 (977~998) 22 987, Bit8 (963~984) 22 973,
1173 00:48:31.502249 TX Bit1 (977~997) 21 987, Bit9 (965~987) 23 976,
1174 00:48:31.502300 TX Bit2 (977~997) 21 987, Bit10 (969~990) 22 979,
1175 00:48:31.502349 TX Bit3 (970~991) 22 980, Bit11 (965~986) 22 975,
1176 00:48:31.502399 TX Bit4 (976~997) 22 986, Bit12 (967~987) 21 977,
1177 00:48:31.502448 TX Bit5 (974~991) 18 982, Bit13 (966~985) 20 975,
1178 00:48:31.502496 TX Bit6 (975~992) 18 983, Bit14 (966~986) 21 976,
1179 00:48:31.502545 TX Bit7 (975~995) 21 985, Bit15 (968~989) 22 978,
1180 00:48:31.502595
1181 00:48:31.502643 Write Rank0 MR14 =0xa
1182 00:48:31.502691
1183 00:48:31.502740 CH=0, VrefRange= 0, VrefLevel = 10
1184 00:48:31.502789 TX Bit0 (977~998) 22 987, Bit8 (963~985) 23 974,
1185 00:48:31.502838 TX Bit1 (977~997) 21 987, Bit9 (965~988) 24 976,
1186 00:48:31.502889 TX Bit2 (977~998) 22 987, Bit10 (969~990) 22 979,
1187 00:48:31.502939 TX Bit3 (970~991) 22 980, Bit11 (964~987) 24 975,
1188 00:48:31.502988 TX Bit4 (976~998) 23 987, Bit12 (966~988) 23 977,
1189 00:48:31.503037 TX Bit5 (974~992) 19 983, Bit13 (965~986) 22 975,
1190 00:48:31.503087 TX Bit6 (974~993) 20 983, Bit14 (966~987) 22 976,
1191 00:48:31.503136 TX Bit7 (975~996) 22 985, Bit15 (968~989) 22 978,
1192 00:48:31.503184
1193 00:48:31.503233 Write Rank0 MR14 =0xc
1194 00:48:31.503281
1195 00:48:31.503328 CH=0, VrefRange= 0, VrefLevel = 12
1196 00:48:31.503377 TX Bit0 (977~998) 22 987, Bit8 (963~985) 23 974,
1197 00:48:31.503427 TX Bit1 (977~997) 21 987, Bit9 (966~988) 23 977,
1198 00:48:31.503476 TX Bit2 (977~998) 22 987, Bit10 (969~990) 22 979,
1199 00:48:31.503525 TX Bit3 (970~991) 22 980, Bit11 (964~988) 25 976,
1200 00:48:31.503575 TX Bit4 (976~998) 23 987, Bit12 (966~988) 23 977,
1201 00:48:31.503624 TX Bit5 (974~992) 19 983, Bit13 (965~987) 23 976,
1202 00:48:31.503673 TX Bit6 (974~993) 20 983, Bit14 (966~987) 22 976,
1203 00:48:31.503722 TX Bit7 (975~997) 23 986, Bit15 (968~989) 22 978,
1204 00:48:31.503771
1205 00:48:31.503819 Write Rank0 MR14 =0xe
1206 00:48:31.503867
1207 00:48:31.503916 CH=0, VrefRange= 0, VrefLevel = 14
1208 00:48:31.503965 TX Bit0 (977~999) 23 988, Bit8 (962~986) 25 974,
1209 00:48:31.504015 TX Bit1 (976~997) 22 986, Bit9 (964~988) 25 976,
1210 00:48:31.504064 TX Bit2 (976~998) 23 987, Bit10 (968~990) 23 979,
1211 00:48:31.504113 TX Bit3 (970~992) 23 981, Bit11 (963~988) 26 975,
1212 00:48:31.504162 TX Bit4 (976~998) 23 987, Bit12 (966~988) 23 977,
1213 00:48:31.504211 TX Bit5 (972~993) 22 982, Bit13 (964~987) 24 975,
1214 00:48:31.504259 TX Bit6 (974~994) 21 984, Bit14 (966~988) 23 977,
1215 00:48:31.504309 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1216 00:48:31.504358
1217 00:48:31.504406 Write Rank0 MR14 =0x10
1218 00:48:31.504455
1219 00:48:31.504503 CH=0, VrefRange= 0, VrefLevel = 16
1220 00:48:31.504552 TX Bit0 (977~999) 23 988, Bit8 (963~986) 24 974,
1221 00:48:31.504602 TX Bit1 (976~998) 23 987, Bit9 (964~989) 26 976,
1222 00:48:31.504650 TX Bit2 (976~998) 23 987, Bit10 (968~991) 24 979,
1223 00:48:31.504700 TX Bit3 (969~992) 24 980, Bit11 (963~988) 26 975,
1224 00:48:31.504749 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1225 00:48:31.504799 TX Bit5 (972~993) 22 982, Bit13 (963~988) 26 975,
1226 00:48:31.504848 TX Bit6 (973~995) 23 984, Bit14 (965~989) 25 977,
1227 00:48:31.504897 TX Bit7 (974~997) 24 985, Bit15 (967~990) 24 978,
1228 00:48:31.504946
1229 00:48:31.504995 Write Rank0 MR14 =0x12
1230 00:48:31.505043
1231 00:48:31.505091 CH=0, VrefRange= 0, VrefLevel = 18
1232 00:48:31.505140 TX Bit0 (977~1000) 24 988, Bit8 (961~987) 27 974,
1233 00:48:31.505188 TX Bit1 (976~998) 23 987, Bit9 (965~988) 24 976,
1234 00:48:31.505238 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1235 00:48:31.505287 TX Bit3 (969~992) 24 980, Bit11 (963~988) 26 975,
1236 00:48:31.505336 TX Bit4 (976~999) 24 987, Bit12 (964~989) 26 976,
1237 00:48:31.505385 TX Bit5 (972~994) 23 983, Bit13 (964~988) 25 976,
1238 00:48:31.505434 TX Bit6 (973~995) 23 984, Bit14 (964~989) 26 976,
1239 00:48:31.505483 TX Bit7 (974~998) 25 986, Bit15 (967~990) 24 978,
1240 00:48:31.505532
1241 00:48:31.505580 Write Rank0 MR14 =0x14
1242 00:48:31.505628
1243 00:48:31.505677 CH=0, VrefRange= 0, VrefLevel = 20
1244 00:48:31.505727 TX Bit0 (977~1000) 24 988, Bit8 (962~987) 26 974,
1245 00:48:31.505776 TX Bit1 (976~998) 23 987, Bit9 (963~989) 27 976,
1246 00:48:31.505825 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1247 00:48:31.505874 TX Bit3 (969~993) 25 981, Bit11 (962~989) 28 975,
1248 00:48:31.506111 TX Bit4 (975~1000) 26 987, Bit12 (965~989) 25 977,
1249 00:48:31.506167 TX Bit5 (971~994) 24 982, Bit13 (963~988) 26 975,
1250 00:48:31.506225 TX Bit6 (972~996) 25 984, Bit14 (963~989) 27 976,
1251 00:48:31.506277 TX Bit7 (973~998) 26 985, Bit15 (967~990) 24 978,
1252 00:48:31.506327
1253 00:48:31.506376 Write Rank0 MR14 =0x16
1254 00:48:31.506424
1255 00:48:31.506472 CH=0, VrefRange= 0, VrefLevel = 22
1256 00:48:31.506521 TX Bit0 (976~1001) 26 988, Bit8 (962~988) 27 975,
1257 00:48:31.506571 TX Bit1 (976~998) 23 987, Bit9 (963~988) 26 975,
1258 00:48:31.506620 TX Bit2 (976~1000) 25 988, Bit10 (968~991) 24 979,
1259 00:48:31.506669 TX Bit3 (969~993) 25 981, Bit11 (962~989) 28 975,
1260 00:48:31.506719 TX Bit4 (975~1000) 26 987, Bit12 (964~989) 26 976,
1261 00:48:31.506769 TX Bit5 (971~995) 25 983, Bit13 (962~988) 27 975,
1262 00:48:31.506818 TX Bit6 (972~997) 26 984, Bit14 (963~989) 27 976,
1263 00:48:31.506868 TX Bit7 (973~998) 26 985, Bit15 (966~990) 25 978,
1264 00:48:31.506917
1265 00:48:31.506965 Write Rank0 MR14 =0x18
1266 00:48:31.507014
1267 00:48:31.507062 CH=0, VrefRange= 0, VrefLevel = 24
1268 00:48:31.507112 TX Bit0 (976~1001) 26 988, Bit8 (962~988) 27 975,
1269 00:48:31.507162 TX Bit1 (975~999) 25 987, Bit9 (963~988) 26 975,
1270 00:48:31.507211 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1271 00:48:31.507261 TX Bit3 (969~993) 25 981, Bit11 (963~988) 26 975,
1272 00:48:31.507310 TX Bit4 (975~1000) 26 987, Bit12 (965~989) 25 977,
1273 00:48:31.507360 TX Bit5 (971~995) 25 983, Bit13 (962~988) 27 975,
1274 00:48:31.507409 TX Bit6 (972~997) 26 984, Bit14 (963~989) 27 976,
1275 00:48:31.507458 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1276 00:48:31.507507
1277 00:48:31.507556 Write Rank0 MR14 =0x1a
1278 00:48:31.507605
1279 00:48:31.507653 CH=0, VrefRange= 0, VrefLevel = 26
1280 00:48:31.507703 TX Bit0 (976~1001) 26 988, Bit8 (962~988) 27 975,
1281 00:48:31.507753 TX Bit1 (975~999) 25 987, Bit9 (963~988) 26 975,
1282 00:48:31.507802 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1283 00:48:31.507851 TX Bit3 (969~993) 25 981, Bit11 (963~988) 26 975,
1284 00:48:31.507900 TX Bit4 (975~1000) 26 987, Bit12 (965~989) 25 977,
1285 00:48:31.507950 TX Bit5 (971~995) 25 983, Bit13 (962~988) 27 975,
1286 00:48:31.508000 TX Bit6 (972~997) 26 984, Bit14 (963~989) 27 976,
1287 00:48:31.508049 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1288 00:48:31.508098
1289 00:48:31.508146 Write Rank0 MR14 =0x1c
1290 00:48:31.508194
1291 00:48:31.508243 CH=0, VrefRange= 0, VrefLevel = 28
1292 00:48:31.508292 TX Bit0 (976~1001) 26 988, Bit8 (962~988) 27 975,
1293 00:48:31.508342 TX Bit1 (975~999) 25 987, Bit9 (963~988) 26 975,
1294 00:48:31.508391 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1295 00:48:31.508440 TX Bit3 (969~993) 25 981, Bit11 (963~988) 26 975,
1296 00:48:31.508490 TX Bit4 (975~1000) 26 987, Bit12 (965~989) 25 977,
1297 00:48:31.508539 TX Bit5 (971~995) 25 983, Bit13 (962~988) 27 975,
1298 00:48:31.508589 TX Bit6 (972~997) 26 984, Bit14 (963~989) 27 976,
1299 00:48:31.508638 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1300 00:48:31.508687
1301 00:48:31.508735 Write Rank0 MR14 =0x1e
1302 00:48:31.508784
1303 00:48:31.508832 CH=0, VrefRange= 0, VrefLevel = 30
1304 00:48:31.508882 TX Bit0 (976~1001) 26 988, Bit8 (962~988) 27 975,
1305 00:48:31.508931 TX Bit1 (975~999) 25 987, Bit9 (963~988) 26 975,
1306 00:48:31.508981 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1307 00:48:31.509046 TX Bit3 (969~993) 25 981, Bit11 (963~988) 26 975,
1308 00:48:31.509138 TX Bit4 (975~1000) 26 987, Bit12 (965~989) 25 977,
1309 00:48:31.509212 TX Bit5 (971~995) 25 983, Bit13 (962~988) 27 975,
1310 00:48:31.509264 TX Bit6 (972~997) 26 984, Bit14 (963~989) 27 976,
1311 00:48:31.509314 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1312 00:48:31.509364
1313 00:48:31.509413
1314 00:48:31.509461 TX Vref found, early break! 378< 390
1315 00:48:31.509511 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1316 00:48:31.509561 u1DelayCellOfst[0]=9 cells (7 PI)
1317 00:48:31.509610 u1DelayCellOfst[1]=7 cells (6 PI)
1318 00:48:31.509659 u1DelayCellOfst[2]=7 cells (6 PI)
1319 00:48:31.509708 u1DelayCellOfst[3]=0 cells (0 PI)
1320 00:48:31.509757 u1DelayCellOfst[4]=7 cells (6 PI)
1321 00:48:31.509806 u1DelayCellOfst[5]=2 cells (2 PI)
1322 00:48:31.509854 u1DelayCellOfst[6]=3 cells (3 PI)
1323 00:48:31.509904 u1DelayCellOfst[7]=5 cells (4 PI)
1324 00:48:31.509952 Byte0, DQ PI dly=981, DQM PI dly= 984
1325 00:48:31.510001 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1326 00:48:31.510051
1327 00:48:31.510100 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1328 00:48:31.510149
1329 00:48:31.510197 u1DelayCellOfst[8]=0 cells (0 PI)
1330 00:48:31.510269 u1DelayCellOfst[9]=0 cells (0 PI)
1331 00:48:31.510321 u1DelayCellOfst[10]=5 cells (4 PI)
1332 00:48:31.510370 u1DelayCellOfst[11]=0 cells (0 PI)
1333 00:48:31.510418 u1DelayCellOfst[12]=2 cells (2 PI)
1334 00:48:31.510466 u1DelayCellOfst[13]=0 cells (0 PI)
1335 00:48:31.510515 u1DelayCellOfst[14]=1 cells (1 PI)
1336 00:48:31.510564 u1DelayCellOfst[15]=3 cells (3 PI)
1337 00:48:31.510612 Byte1, DQ PI dly=975, DQM PI dly= 977
1338 00:48:31.510661 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1339 00:48:31.510709
1340 00:48:31.510757 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1341 00:48:31.510806
1342 00:48:31.510853 Write Rank0 MR14 =0x18
1343 00:48:31.510901
1344 00:48:31.510949 Final TX Range 0 Vref 24
1345 00:48:31.510997
1346 00:48:31.511045 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1347 00:48:31.511094
1348 00:48:31.511142 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1349 00:48:31.511192 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1350 00:48:31.511241 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1351 00:48:31.511290 Write Rank0 MR3 =0xb0
1352 00:48:31.511337 DramC Write-DBI on
1353 00:48:31.511385 ==
1354 00:48:31.511434 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1355 00:48:31.511675 fsp= 1, odt_onoff= 1, Byte mode= 0
1356 00:48:31.511733 ==
1357 00:48:31.511783 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1358 00:48:31.511833
1359 00:48:31.511881 Begin, DQ Scan Range 697~761
1360 00:48:31.511929
1361 00:48:31.511977
1362 00:48:31.512026 TX Vref Scan disable
1363 00:48:31.512075 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1364 00:48:31.512125 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1365 00:48:31.512175 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1366 00:48:31.512225 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1367 00:48:31.512274 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1368 00:48:31.512323 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1369 00:48:31.512373 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1370 00:48:31.512423 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1371 00:48:31.512474 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1372 00:48:31.512523 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1373 00:48:31.512573 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1374 00:48:31.512623 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1375 00:48:31.512673 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1376 00:48:31.512723 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1377 00:48:31.512773 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1378 00:48:31.512822 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1379 00:48:31.512872 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1380 00:48:31.512921 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1381 00:48:31.512971 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1382 00:48:31.513021 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1383 00:48:31.513070 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1384 00:48:31.513120 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1385 00:48:31.513169 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1386 00:48:31.513219 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1387 00:48:31.513267 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1388 00:48:31.513317 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1389 00:48:31.513367 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1390 00:48:31.513416 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1391 00:48:31.513465 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1392 00:48:31.513515 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1393 00:48:31.513564 Byte0, DQ PI dly=729, DQM PI dly= 729
1394 00:48:31.513612 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
1395 00:48:31.513661
1396 00:48:31.513709 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
1397 00:48:31.513759
1398 00:48:31.513807 Byte1, DQ PI dly=718, DQM PI dly= 718
1399 00:48:31.513856 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1400 00:48:31.513905
1401 00:48:31.513953 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1402 00:48:31.514002
1403 00:48:31.514050 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1404 00:48:31.514099 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1405 00:48:31.514148 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1406 00:48:31.514197 Write Rank0 MR3 =0x30
1407 00:48:31.514255 DramC Write-DBI off
1408 00:48:31.514303
1409 00:48:31.514351 [DATLAT]
1410 00:48:31.514398 Freq=1600, CH0 RK0, use_rxtx_scan=0
1411 00:48:31.514447
1412 00:48:31.514493 DATLAT Default: 0xf
1413 00:48:31.514540 7, 0xFFFF, sum=0
1414 00:48:31.514589 8, 0xFFFF, sum=0
1415 00:48:31.514638 9, 0xFFFF, sum=0
1416 00:48:31.514688 10, 0xFFFF, sum=0
1417 00:48:31.514736 11, 0xFFFF, sum=0
1418 00:48:31.514785 12, 0xFFFF, sum=0
1419 00:48:31.514834 13, 0xFFFF, sum=0
1420 00:48:31.514882 14, 0x0, sum=1
1421 00:48:31.514931 15, 0x0, sum=2
1422 00:48:31.514979 16, 0x0, sum=3
1423 00:48:31.515028 17, 0x0, sum=4
1424 00:48:31.515077 pattern=2 first_step=14 total pass=5 best_step=16
1425 00:48:31.515126 ==
1426 00:48:31.515174 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1427 00:48:31.515223 fsp= 1, odt_onoff= 1, Byte mode= 0
1428 00:48:31.515272 ==
1429 00:48:31.515320 Start DQ dly to find pass range UseTestEngine =1
1430 00:48:31.515369 x-axis: bit #, y-axis: DQ dly (-127~63)
1431 00:48:31.515418 RX Vref Scan = 1
1432 00:48:31.515467
1433 00:48:31.515514 RX Vref found, early break!
1434 00:48:31.515562
1435 00:48:31.515613 Final RX Vref 12, apply to both rank0 and 1
1436 00:48:31.515667 ==
1437 00:48:31.515727 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1438 00:48:31.515783 fsp= 1, odt_onoff= 1, Byte mode= 0
1439 00:48:31.515834 ==
1440 00:48:31.515883 DQS Delay:
1441 00:48:31.515931 DQS0 = 0, DQS1 = 0
1442 00:48:31.515983 DQM Delay:
1443 00:48:31.516032 DQM0 = 19, DQM1 = 18
1444 00:48:31.516080 DQ Delay:
1445 00:48:31.516128 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1446 00:48:31.516180 DQ4 =22, DQ5 =14, DQ6 =16, DQ7 =18
1447 00:48:31.516229 DQ8 =18, DQ9 =19, DQ10 =22, DQ11 =17
1448 00:48:31.516277 DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =20
1449 00:48:31.516326
1450 00:48:31.516375
1451 00:48:31.516423
1452 00:48:31.516471 [DramC_TX_OE_Calibration] TA2
1453 00:48:31.516520 Original DQ_B0 (3 6) =30, OEN = 27
1454 00:48:31.516569 Original DQ_B1 (3 6) =30, OEN = 27
1455 00:48:31.516618 23, 0x0, End_B0=23 End_B1=23
1456 00:48:31.516667 24, 0x0, End_B0=24 End_B1=24
1457 00:48:31.516717 25, 0x0, End_B0=25 End_B1=25
1458 00:48:31.516765 26, 0x0, End_B0=26 End_B1=26
1459 00:48:31.516814 27, 0x0, End_B0=27 End_B1=27
1460 00:48:31.516863 28, 0x0, End_B0=28 End_B1=28
1461 00:48:31.516912 29, 0x0, End_B0=29 End_B1=29
1462 00:48:31.516961 30, 0x0, End_B0=30 End_B1=30
1463 00:48:31.517010 31, 0xFFFF, End_B0=30 End_B1=30
1464 00:48:31.517059 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1465 00:48:31.517108 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1466 00:48:31.517156
1467 00:48:31.517204
1468 00:48:31.517252 Write Rank0 MR23 =0x3f
1469 00:48:31.517300 [DQSOSC]
1470 00:48:31.517348 [DQSOSCAuto] RK0, (LSB)MR18= 0x9e, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1471 00:48:31.517397 CH0_RK0: MR19=0x3, MR18=0x9E, DQSOSC=340, MR23=63, INC=21, DEC=31
1472 00:48:31.517446 Write Rank0 MR23 =0x3f
1473 00:48:31.517495 [DQSOSC]
1474 00:48:31.517543 [DQSOSCAuto] RK0, (LSB)MR18= 0x9d, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1475 00:48:31.517592 CH0 RK0: MR19=3, MR18=9D
1476 00:48:31.517640 [RankSwap] Rank num 2, (Multi 1), Rank 1
1477 00:48:31.517689 Write Rank0 MR2 =0xad
1478 00:48:31.517737 [Write Leveling]
1479 00:48:31.517785 delay byte0 byte1 byte2 byte3
1480 00:48:31.517834
1481 00:48:31.517882 10 0 0
1482 00:48:31.517932 11 0 0
1483 00:48:31.517980 12 0 0
1484 00:48:31.518029 13 0 0
1485 00:48:31.518078 14 0 0
1486 00:48:31.518126 15 0 0
1487 00:48:31.518175 16 0 0
1488 00:48:31.518231 17 0 0
1489 00:48:31.518282 18 0 0
1490 00:48:31.518332 19 0 0
1491 00:48:31.518381 20 0 0
1492 00:48:31.518429 21 0 0
1493 00:48:31.518479 22 0 0
1494 00:48:31.518528 23 0 0
1495 00:48:31.518578 24 0 0
1496 00:48:31.518627 25 0 0
1497 00:48:31.518676 26 0 0
1498 00:48:31.518912 27 0 0
1499 00:48:31.518969 28 0 0
1500 00:48:31.519020 29 0 0
1501 00:48:31.519069 30 0 ff
1502 00:48:31.519118 31 0 ff
1503 00:48:31.519167 32 0 ff
1504 00:48:31.519216 33 ff ff
1505 00:48:31.519265 34 ff ff
1506 00:48:31.519314 35 0 ff
1507 00:48:31.519363 36 ff ff
1508 00:48:31.519412 37 ff ff
1509 00:48:31.519479 38 ff ff
1510 00:48:31.519598 39 ff ff
1511 00:48:31.519661 40 ff ff
1512 00:48:31.519710 41 ff ff
1513 00:48:31.519759 42 ff ff
1514 00:48:31.519808 pass bytecount = 0xff (0xff: all bytes pass)
1515 00:48:31.519857
1516 00:48:31.519905 DQS0 dly: 36
1517 00:48:31.519954 DQS1 dly: 30
1518 00:48:31.520001 Write Rank0 MR2 =0x2d
1519 00:48:31.520049 [RankSwap] Rank num 2, (Multi 1), Rank 0
1520 00:48:31.520098 Write Rank1 MR1 =0xd6
1521 00:48:31.520145 [Gating]
1522 00:48:31.520193 ==
1523 00:48:31.520241 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1524 00:48:31.520289 fsp= 1, odt_onoff= 1, Byte mode= 0
1525 00:48:31.520338 ==
1526 00:48:31.520386 3 1 0 |3534 3535 |(11 11)(0 0) |(1 1)(1 1)| 0
1527 00:48:31.520436 3 1 4 |3534 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
1528 00:48:31.520486 3 1 8 |3534 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
1529 00:48:31.520535 3 1 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1530 00:48:31.520584 3 1 16 |3534 1111 |(11 11)(11 11) |(0 0)(1 1)| 0
1531 00:48:31.520634 [Byte 1] Lead/lag falling Transition (3, 1, 16)
1532 00:48:31.520682 3 1 20 |3534 f0f |(11 11)(11 11) |(0 0)(0 1)| 0
1533 00:48:31.520731 3 1 24 |3534 3535 |(11 11)(0 0) |(0 0)(0 1)| 0
1534 00:48:31.520781 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1535 00:48:31.520830 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1536 00:48:31.520880 3 2 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1537 00:48:31.520929 3 2 8 |b0a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1538 00:48:31.520978 3 2 12 |3d3d 1010 |(11 11)(11 11) |(1 1)(1 1)| 0
1539 00:48:31.521027 3 2 16 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1540 00:48:31.521076 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 00:48:31.521125 3 2 24 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1542 00:48:31.521175 3 2 28 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1543 00:48:31.521224 3 3 0 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 00:48:31.521272 3 3 4 |3d3d 100f |(11 11)(11 11) |(1 1)(1 1)| 0
1545 00:48:31.521321 3 3 8 |3d3d 3c3c |(11 11)(0 0) |(1 1)(1 1)| 0
1546 00:48:31.521371 3 3 12 |3d3d 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
1547 00:48:31.521420 3 3 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1548 00:48:31.521470 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1549 00:48:31.521519 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1550 00:48:31.521568 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1551 00:48:31.521617 [Byte 0] Lead/lag Transition tap number (1)
1552 00:48:31.521665 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1553 00:48:31.521715 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1554 00:48:31.521764 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1555 00:48:31.521813 3 4 8 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1556 00:48:31.521862 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1557 00:48:31.521911 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 00:48:31.521960 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 00:48:31.522009 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 00:48:31.522059 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 00:48:31.522108 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 00:48:31.522157 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 00:48:31.522206 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 00:48:31.522265 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 00:48:31.522315 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 00:48:31.522365 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 00:48:31.522414 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1568 00:48:31.522463 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 00:48:31.522513 [Byte 0] Lead/lag falling Transition (3, 5, 28)
1570 00:48:31.522562 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1571 00:48:31.522612 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1572 00:48:31.522661 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1573 00:48:31.522709 [Byte 0] Lead/lag Transition tap number (3)
1574 00:48:31.522759 [Byte 1] Lead/lag Transition tap number (2)
1575 00:48:31.522807 3 6 8 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1576 00:48:31.522856 3 6 12 |4646 403 |(10 10)(11 11) |(0 0)(0 0)| 0
1577 00:48:31.522905 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 00:48:31.522954 [Byte 0]First pass (3, 6, 16)
1579 00:48:31.523003 [Byte 1]First pass (3, 6, 16)
1580 00:48:31.523051 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 00:48:31.523100 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 00:48:31.523150 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 00:48:31.523199 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 00:48:31.523249 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 00:48:31.523298 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 00:48:31.523347 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1587 00:48:31.523397 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1588 00:48:31.523446 All bytes gating window > 1UI, Early break!
1589 00:48:31.523495
1590 00:48:31.523543 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 2)
1591 00:48:31.523591
1592 00:48:31.523639 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1593 00:48:31.523688
1594 00:48:31.523736
1595 00:48:31.523782
1596 00:48:31.523830 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 2)
1597 00:48:31.523878
1598 00:48:31.523926 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1599 00:48:31.523975
1600 00:48:31.524022
1601 00:48:31.524070 Write Rank1 MR1 =0x56
1602 00:48:31.524119
1603 00:48:31.524166 best RODT dly(2T, 0.5T) = (2, 3)
1604 00:48:31.524214
1605 00:48:31.524262 best RODT dly(2T, 0.5T) = (2, 3)
1606 00:48:31.524310 ==
1607 00:48:31.524359 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1608 00:48:31.524408 fsp= 1, odt_onoff= 1, Byte mode= 0
1609 00:48:31.524457 ==
1610 00:48:31.524506 Start DQ dly to find pass range UseTestEngine =0
1611 00:48:31.524555 x-axis: bit #, y-axis: DQ dly (-127~63)
1612 00:48:31.524790 RX Vref Scan = 0
1613 00:48:31.524847 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1614 00:48:31.524898 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1615 00:48:31.524949 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1616 00:48:31.525000 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1617 00:48:31.525050 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1618 00:48:31.525100 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:48:31.525149 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1620 00:48:31.525200 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1621 00:48:31.525250 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1622 00:48:31.525300 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1623 00:48:31.525350 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1624 00:48:31.525400 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1625 00:48:31.525450 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1626 00:48:31.525499 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1627 00:48:31.525549 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1628 00:48:31.525598 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1629 00:48:31.525647 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1630 00:48:31.525697 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1631 00:48:31.525747 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1632 00:48:31.525797 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1633 00:48:31.525846 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1634 00:48:31.525896 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1635 00:48:31.525945 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1636 00:48:31.525994 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1637 00:48:31.526044 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1638 00:48:31.526093 -1, [0] xxxoxoxo xxxxxxxx [MSB]
1639 00:48:31.526143 0, [0] xxxoxooo oxxxxoxx [MSB]
1640 00:48:31.526193 1, [0] xxxoxooo ooxoooox [MSB]
1641 00:48:31.526254 2, [0] xxxoxooo ooxooooo [MSB]
1642 00:48:31.526305 3, [0] xxxoxooo ooxooooo [MSB]
1643 00:48:31.526354 4, [0] xxxoxooo ooxooooo [MSB]
1644 00:48:31.526404 5, [0] xooooooo oooooooo [MSB]
1645 00:48:31.526453 6, [0] xooooooo oooooooo [MSB]
1646 00:48:31.526502 33, [0] oooxoooo oooooooo [MSB]
1647 00:48:31.526553 34, [0] oooxoxoo oooooooo [MSB]
1648 00:48:31.526603 35, [0] oooxoxoo oooxooxo [MSB]
1649 00:48:31.526652 36, [0] oooxoxxx xooxooxo [MSB]
1650 00:48:31.526701 37, [0] oooxoxxx xooxoxxo [MSB]
1651 00:48:31.526751 38, [0] oooxoxxx xxoxxxxo [MSB]
1652 00:48:31.526800 39, [0] oooxoxxx xxoxxxxo [MSB]
1653 00:48:31.526850 40, [0] oxoxxxxx xxoxxxxx [MSB]
1654 00:48:31.526899 41, [0] oxxxxxxx xxoxxxxx [MSB]
1655 00:48:31.526948 42, [0] xxxxxxxx xxxxxxxx [MSB]
1656 00:48:31.526998 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
1657 00:48:31.527046 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
1658 00:48:31.527095 iDelay=42, Bit 2, Center 22 (5 ~ 40) 36
1659 00:48:31.527144 iDelay=42, Bit 3, Center 14 (-4 ~ 32) 37
1660 00:48:31.527193 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
1661 00:48:31.527241 iDelay=42, Bit 5, Center 16 (-1 ~ 33) 35
1662 00:48:31.527289 iDelay=42, Bit 6, Center 17 (0 ~ 35) 36
1663 00:48:31.527338 iDelay=42, Bit 7, Center 17 (-1 ~ 35) 37
1664 00:48:31.527387 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
1665 00:48:31.527434 iDelay=42, Bit 9, Center 19 (1 ~ 37) 37
1666 00:48:31.527482 iDelay=42, Bit 10, Center 23 (5 ~ 41) 37
1667 00:48:31.527530 iDelay=42, Bit 11, Center 17 (1 ~ 34) 34
1668 00:48:31.527578 iDelay=42, Bit 12, Center 19 (1 ~ 37) 37
1669 00:48:31.527626 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1670 00:48:31.527674 iDelay=42, Bit 14, Center 17 (1 ~ 34) 34
1671 00:48:31.527723 iDelay=42, Bit 15, Center 20 (2 ~ 39) 38
1672 00:48:31.527771 ==
1673 00:48:31.527820 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1674 00:48:31.527868 fsp= 1, odt_onoff= 1, Byte mode= 0
1675 00:48:31.527916 ==
1676 00:48:31.527964 DQS Delay:
1677 00:48:31.528012 DQS0 = 0, DQS1 = 0
1678 00:48:31.528061 DQM Delay:
1679 00:48:31.528108 DQM0 = 19, DQM1 = 18
1680 00:48:31.528156 DQ Delay:
1681 00:48:31.528204 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =14
1682 00:48:31.528252 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =17
1683 00:48:31.528301 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
1684 00:48:31.528349 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1685 00:48:31.528397
1686 00:48:31.528446
1687 00:48:31.528494 DramC Write-DBI off
1688 00:48:31.528542 ==
1689 00:48:31.528591 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1690 00:48:31.528664 fsp= 1, odt_onoff= 1, Byte mode= 0
1691 00:48:31.528717 ==
1692 00:48:31.528766 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1693 00:48:31.528826
1694 00:48:31.528882 Begin, DQ Scan Range 926~1182
1695 00:48:31.528931
1696 00:48:31.528978
1697 00:48:31.529040 TX Vref Scan disable
1698 00:48:31.529091 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1699 00:48:31.529142 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1700 00:48:31.529192 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1701 00:48:31.529256 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1702 00:48:31.529308 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1703 00:48:31.529358 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1704 00:48:31.529412 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1705 00:48:31.529465 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1706 00:48:31.529515 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1707 00:48:31.529565 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1708 00:48:31.529619 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1709 00:48:31.529669 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:48:31.529719 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1711 00:48:31.529769 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1712 00:48:31.529821 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1713 00:48:31.529871 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1714 00:48:31.529921 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1715 00:48:31.529973 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1716 00:48:31.530023 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:48:31.530073 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:48:31.530123 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:48:31.530173 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:48:31.530229 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:48:31.530281 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:48:31.530330 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:48:31.530380 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:48:31.530431 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:48:31.530481 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1726 00:48:31.530531 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1727 00:48:31.530581 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1728 00:48:31.530631 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:48:31.530680 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1730 00:48:31.530730 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1731 00:48:31.530780 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1732 00:48:31.531014 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1733 00:48:31.531071 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1734 00:48:31.531121 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1735 00:48:31.531172 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1736 00:48:31.531221 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1737 00:48:31.531271 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1738 00:48:31.531321 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1739 00:48:31.531370 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1740 00:48:31.531418 968 |3 6 8|[0] xxxxxxxx ooxoxoxx [MSB]
1741 00:48:31.531468 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1742 00:48:31.531517 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1743 00:48:31.531567 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1744 00:48:31.531616 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1745 00:48:31.531665 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1746 00:48:31.531714 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1747 00:48:31.531763 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1748 00:48:31.531813 976 |3 6 16|[0] xxxooooo oooooooo [MSB]
1749 00:48:31.531862 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1750 00:48:31.531911 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1751 00:48:31.531960 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1752 00:48:31.532008 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1753 00:48:31.532057 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1754 00:48:31.532107 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1755 00:48:31.532156 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1756 00:48:31.532206 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1757 00:48:31.532255 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1758 00:48:31.532305 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1759 00:48:31.532354 Byte0, DQ PI dly=985, DQM PI dly= 985
1760 00:48:31.532402 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1761 00:48:31.532452
1762 00:48:31.532501 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1763 00:48:31.532550
1764 00:48:31.532598 Byte1, DQ PI dly=979, DQM PI dly= 979
1765 00:48:31.532647 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1766 00:48:31.532696
1767 00:48:31.532744 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1768 00:48:31.532791
1769 00:48:31.532839 ==
1770 00:48:31.532899 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1771 00:48:31.532950 fsp= 1, odt_onoff= 1, Byte mode= 0
1772 00:48:31.532999 ==
1773 00:48:31.533046 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1774 00:48:31.533095
1775 00:48:31.533143 Begin, DQ Scan Range 955~1019
1776 00:48:31.533192 Write Rank1 MR14 =0x0
1777 00:48:31.533240
1778 00:48:31.533287 CH=0, VrefRange= 0, VrefLevel = 0
1779 00:48:31.533336 TX Bit0 (979~998) 20 988, Bit8 (968~987) 20 977,
1780 00:48:31.533385 TX Bit1 (978~996) 19 987, Bit9 (971~988) 18 979,
1781 00:48:31.533434 TX Bit2 (979~997) 19 988, Bit10 (975~991) 17 983,
1782 00:48:31.533483 TX Bit3 (975~990) 16 982, Bit11 (969~987) 19 978,
1783 00:48:31.533531 TX Bit4 (978~997) 20 987, Bit12 (971~989) 19 980,
1784 00:48:31.533579 TX Bit5 (976~990) 15 983, Bit13 (970~985) 16 977,
1785 00:48:31.533628 TX Bit6 (976~991) 16 983, Bit14 (972~988) 17 980,
1786 00:48:31.533677 TX Bit7 (978~993) 16 985, Bit15 (973~990) 18 981,
1787 00:48:31.533724
1788 00:48:31.533772 Write Rank1 MR14 =0x2
1789 00:48:31.533820
1790 00:48:31.533868 CH=0, VrefRange= 0, VrefLevel = 2
1791 00:48:31.533916 TX Bit0 (979~998) 20 988, Bit8 (968~988) 21 978,
1792 00:48:31.533965 TX Bit1 (978~997) 20 987, Bit9 (970~989) 20 979,
1793 00:48:31.534013 TX Bit2 (978~997) 20 987, Bit10 (975~991) 17 983,
1794 00:48:31.534062 TX Bit3 (975~990) 16 982, Bit11 (969~988) 20 978,
1795 00:48:31.534110 TX Bit4 (978~997) 20 987, Bit12 (971~989) 19 980,
1796 00:48:31.534158 TX Bit5 (976~991) 16 983, Bit13 (970~986) 17 978,
1797 00:48:31.534206 TX Bit6 (976~992) 17 984, Bit14 (970~988) 19 979,
1798 00:48:31.534269 TX Bit7 (978~993) 16 985, Bit15 (974~990) 17 982,
1799 00:48:31.534319
1800 00:48:31.534367 Write Rank1 MR14 =0x4
1801 00:48:31.534416
1802 00:48:31.534463 CH=0, VrefRange= 0, VrefLevel = 4
1803 00:48:31.534511 TX Bit0 (978~998) 21 988, Bit8 (968~988) 21 978,
1804 00:48:31.534560 TX Bit1 (978~997) 20 987, Bit9 (970~989) 20 979,
1805 00:48:31.534609 TX Bit2 (978~997) 20 987, Bit10 (975~992) 18 983,
1806 00:48:31.534656 TX Bit3 (974~990) 17 982, Bit11 (968~989) 22 978,
1807 00:48:31.534705 TX Bit4 (978~998) 21 988, Bit12 (970~989) 20 979,
1808 00:48:31.534754 TX Bit5 (975~991) 17 983, Bit13 (969~988) 20 978,
1809 00:48:31.534803 TX Bit6 (976~992) 17 984, Bit14 (971~989) 19 980,
1810 00:48:31.534851 TX Bit7 (977~994) 18 985, Bit15 (973~990) 18 981,
1811 00:48:31.534900
1812 00:48:31.534947 Write Rank1 MR14 =0x6
1813 00:48:31.534995
1814 00:48:31.535043 CH=0, VrefRange= 0, VrefLevel = 6
1815 00:48:31.535091 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
1816 00:48:31.535140 TX Bit1 (978~997) 20 987, Bit9 (970~989) 20 979,
1817 00:48:31.535190 TX Bit2 (978~998) 21 988, Bit10 (975~992) 18 983,
1818 00:48:31.535239 TX Bit3 (974~991) 18 982, Bit11 (968~989) 22 978,
1819 00:48:31.535287 TX Bit4 (977~998) 22 987, Bit12 (969~989) 21 979,
1820 00:48:31.535334 TX Bit5 (975~991) 17 983, Bit13 (969~988) 20 978,
1821 00:48:31.535383 TX Bit6 (975~993) 19 984, Bit14 (971~989) 19 980,
1822 00:48:31.535431 TX Bit7 (977~994) 18 985, Bit15 (973~991) 19 982,
1823 00:48:31.535479
1824 00:48:31.535526 wait MRW command Rank1 MR14 =0x8 fired (1)
1825 00:48:31.535575 Write Rank1 MR14 =0x8
1826 00:48:31.535623
1827 00:48:31.535670 CH=0, VrefRange= 0, VrefLevel = 8
1828 00:48:31.535718 TX Bit0 (978~999) 22 988, Bit8 (968~989) 22 978,
1829 00:48:31.535767 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1830 00:48:31.535815 TX Bit2 (977~998) 22 987, Bit10 (974~992) 19 983,
1831 00:48:31.535864 TX Bit3 (974~991) 18 982, Bit11 (968~989) 22 978,
1832 00:48:31.535912 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1833 00:48:31.535960 TX Bit5 (975~992) 18 983, Bit13 (969~988) 20 978,
1834 00:48:31.536008 TX Bit6 (975~993) 19 984, Bit14 (970~990) 21 980,
1835 00:48:31.536057 TX Bit7 (977~995) 19 986, Bit15 (972~991) 20 981,
1836 00:48:31.536106
1837 00:48:31.536154 Write Rank1 MR14 =0xa
1838 00:48:31.536201
1839 00:48:31.536248 CH=0, VrefRange= 0, VrefLevel = 10
1840 00:48:31.536484 TX Bit0 (978~999) 22 988, Bit8 (967~989) 23 978,
1841 00:48:31.536539 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1842 00:48:31.536589 TX Bit2 (977~998) 22 987, Bit10 (974~993) 20 983,
1843 00:48:31.536638 TX Bit3 (973~991) 19 982, Bit11 (968~989) 22 978,
1844 00:48:31.536686 TX Bit4 (977~999) 23 988, Bit12 (969~990) 22 979,
1845 00:48:31.536735 TX Bit5 (974~993) 20 983, Bit13 (968~989) 22 978,
1846 00:48:31.536783 TX Bit6 (975~994) 20 984, Bit14 (970~990) 21 980,
1847 00:48:31.536831 TX Bit7 (977~996) 20 986, Bit15 (972~991) 20 981,
1848 00:48:31.536879
1849 00:48:31.536927 Write Rank1 MR14 =0xc
1850 00:48:31.536975
1851 00:48:31.537023 CH=0, VrefRange= 0, VrefLevel = 12
1852 00:48:31.537072 TX Bit0 (978~1000) 23 989, Bit8 (967~990) 24 978,
1853 00:48:31.537120 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1854 00:48:31.537169 TX Bit2 (977~998) 22 987, Bit10 (974~993) 20 983,
1855 00:48:31.537217 TX Bit3 (973~991) 19 982, Bit11 (968~990) 23 979,
1856 00:48:31.537266 TX Bit4 (977~999) 23 988, Bit12 (969~990) 22 979,
1857 00:48:31.537314 TX Bit5 (974~993) 20 983, Bit13 (968~989) 22 978,
1858 00:48:31.537362 TX Bit6 (975~994) 20 984, Bit14 (968~990) 23 979,
1859 00:48:31.537411 TX Bit7 (977~996) 20 986, Bit15 (971~992) 22 981,
1860 00:48:31.537476
1861 00:48:31.537527 Write Rank1 MR14 =0xe
1862 00:48:31.537575
1863 00:48:31.537624 CH=0, VrefRange= 0, VrefLevel = 14
1864 00:48:31.537673 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1865 00:48:31.537722 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1866 00:48:31.537771 TX Bit2 (977~999) 23 988, Bit10 (974~993) 20 983,
1867 00:48:31.537820 TX Bit3 (972~992) 21 982, Bit11 (968~990) 23 979,
1868 00:48:31.537869 TX Bit4 (977~1000) 24 988, Bit12 (968~990) 23 979,
1869 00:48:31.537918 TX Bit5 (973~994) 22 983, Bit13 (968~989) 22 978,
1870 00:48:31.537967 TX Bit6 (974~996) 23 985, Bit14 (969~990) 22 979,
1871 00:48:31.538015 TX Bit7 (977~997) 21 987, Bit15 (971~992) 22 981,
1872 00:48:31.538064
1873 00:48:31.538113 Write Rank1 MR14 =0x10
1874 00:48:31.538161
1875 00:48:31.538208 CH=0, VrefRange= 0, VrefLevel = 16
1876 00:48:31.538302 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1877 00:48:31.538351 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1878 00:48:31.538400 TX Bit2 (977~999) 23 988, Bit10 (974~994) 21 984,
1879 00:48:31.538448 TX Bit3 (971~992) 22 981, Bit11 (968~990) 23 979,
1880 00:48:31.538497 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
1881 00:48:31.538545 TX Bit5 (973~994) 22 983, Bit13 (968~989) 22 978,
1882 00:48:31.538594 TX Bit6 (974~996) 23 985, Bit14 (968~990) 23 979,
1883 00:48:31.538641 TX Bit7 (976~997) 22 986, Bit15 (971~993) 23 982,
1884 00:48:31.538689
1885 00:48:31.538737 Write Rank1 MR14 =0x12
1886 00:48:31.538785
1887 00:48:31.538833 CH=0, VrefRange= 0, VrefLevel = 18
1888 00:48:31.538882 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1889 00:48:31.538931 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1890 00:48:31.538980 TX Bit2 (977~1000) 24 988, Bit10 (974~994) 21 984,
1891 00:48:31.539029 TX Bit3 (971~993) 23 982, Bit11 (967~990) 24 978,
1892 00:48:31.539077 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1893 00:48:31.539125 TX Bit5 (972~995) 24 983, Bit13 (968~990) 23 979,
1894 00:48:31.539174 TX Bit6 (973~996) 24 984, Bit14 (968~991) 24 979,
1895 00:48:31.539223 TX Bit7 (976~998) 23 987, Bit15 (969~993) 25 981,
1896 00:48:31.539273
1897 00:48:31.539322 Write Rank1 MR14 =0x14
1898 00:48:31.539370
1899 00:48:31.539418 CH=0, VrefRange= 0, VrefLevel = 20
1900 00:48:31.539466 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1901 00:48:31.539515 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1902 00:48:31.539564 TX Bit2 (977~1000) 24 988, Bit10 (973~995) 23 984,
1903 00:48:31.539612 TX Bit3 (971~993) 23 982, Bit11 (967~990) 24 978,
1904 00:48:31.539661 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1905 00:48:31.539710 TX Bit5 (972~996) 25 984, Bit13 (968~990) 23 979,
1906 00:48:31.539759 TX Bit6 (973~997) 25 985, Bit14 (968~991) 24 979,
1907 00:48:31.539807 TX Bit7 (976~998) 23 987, Bit15 (969~994) 26 981,
1908 00:48:31.539857
1909 00:48:31.539905 Write Rank1 MR14 =0x16
1910 00:48:31.539952
1911 00:48:31.539999 CH=0, VrefRange= 0, VrefLevel = 22
1912 00:48:31.540047 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1913 00:48:31.540096 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1914 00:48:31.540144 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1915 00:48:31.540193 TX Bit3 (971~994) 24 982, Bit11 (967~991) 25 979,
1916 00:48:31.540241 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1917 00:48:31.540289 TX Bit5 (972~996) 25 984, Bit13 (967~990) 24 978,
1918 00:48:31.540338 TX Bit6 (972~997) 26 984, Bit14 (968~991) 24 979,
1919 00:48:31.540386 TX Bit7 (976~998) 23 987, Bit15 (970~994) 25 982,
1920 00:48:31.540434
1921 00:48:31.540482 Write Rank1 MR14 =0x18
1922 00:48:31.540530
1923 00:48:31.540578 CH=0, VrefRange= 0, VrefLevel = 24
1924 00:48:31.540627 TX Bit0 (977~1003) 27 990, Bit8 (967~990) 24 978,
1925 00:48:31.540676 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
1926 00:48:31.540724 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1927 00:48:31.540772 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1928 00:48:31.540820 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1929 00:48:31.540869 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1930 00:48:31.540917 TX Bit6 (972~997) 26 984, Bit14 (967~991) 25 979,
1931 00:48:31.540966 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1932 00:48:31.541014
1933 00:48:31.541063 Write Rank1 MR14 =0x1a
1934 00:48:31.541111
1935 00:48:31.541159 CH=0, VrefRange= 0, VrefLevel = 26
1936 00:48:31.541230 TX Bit0 (977~1003) 27 990, Bit8 (967~990) 24 978,
1937 00:48:31.541282 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
1938 00:48:31.541331 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1939 00:48:31.541575 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1940 00:48:31.541645 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1941 00:48:31.541697 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1942 00:48:31.541747 TX Bit6 (972~997) 26 984, Bit14 (967~991) 25 979,
1943 00:48:31.541803 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1944 00:48:31.704662
1945 00:48:31.705148 Write Rank1 MR14 =0x1c
1946 00:48:31.705489
1947 00:48:31.705800 CH=0, VrefRange= 0, VrefLevel = 28
1948 00:48:31.706104 TX Bit0 (977~1003) 27 990, Bit8 (967~990) 24 978,
1949 00:48:31.706453 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
1950 00:48:31.706751 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1951 00:48:31.707040 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1952 00:48:31.707418 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1953 00:48:31.707711 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1954 00:48:31.708014 TX Bit6 (972~997) 26 984, Bit14 (967~991) 25 979,
1955 00:48:31.708303 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1956 00:48:31.708607
1957 00:48:31.708889 Write Rank1 MR14 =0x1e
1958 00:48:31.709190
1959 00:48:31.709466 CH=0, VrefRange= 0, VrefLevel = 30
1960 00:48:31.709748 TX Bit0 (977~1003) 27 990, Bit8 (967~990) 24 978,
1961 00:48:31.710046 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
1962 00:48:31.710602 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1963 00:48:31.711078 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1964 00:48:31.711378 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1965 00:48:31.711698 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1966 00:48:31.712018 TX Bit6 (972~997) 26 984, Bit14 (967~991) 25 979,
1967 00:48:31.712304 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1968 00:48:31.712583
1969 00:48:31.712866 Write Rank1 MR14 =0x20
1970 00:48:31.713142
1971 00:48:31.713419 CH=0, VrefRange= 0, VrefLevel = 32
1972 00:48:31.713702 TX Bit0 (977~1003) 27 990, Bit8 (967~990) 24 978,
1973 00:48:31.713986 TX Bit1 (976~1000) 25 988, Bit9 (967~991) 25 979,
1974 00:48:31.714316 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1975 00:48:31.714608 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1976 00:48:31.714921 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1977 00:48:31.715231 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1978 00:48:31.715515 TX Bit6 (972~997) 26 984, Bit14 (967~991) 25 979,
1979 00:48:31.715795 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1980 00:48:31.716075
1981 00:48:31.716353
1982 00:48:31.716630 TX Vref found, early break! 370< 379
1983 00:48:31.716915 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1984 00:48:31.717213 u1DelayCellOfst[0]=10 cells (8 PI)
1985 00:48:31.717506 u1DelayCellOfst[1]=7 cells (6 PI)
1986 00:48:31.717784 u1DelayCellOfst[2]=7 cells (6 PI)
1987 00:48:31.718061 u1DelayCellOfst[3]=0 cells (0 PI)
1988 00:48:31.718402 u1DelayCellOfst[4]=7 cells (6 PI)
1989 00:48:31.718713 u1DelayCellOfst[5]=1 cells (1 PI)
1990 00:48:31.718996 u1DelayCellOfst[6]=2 cells (2 PI)
1991 00:48:31.719334 u1DelayCellOfst[7]=5 cells (4 PI)
1992 00:48:31.719791 Byte0, DQ PI dly=982, DQM PI dly= 986
1993 00:48:31.720096 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1994 00:48:31.720379
1995 00:48:31.720653 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1996 00:48:31.720931
1997 00:48:31.721206 u1DelayCellOfst[8]=0 cells (0 PI)
1998 00:48:31.721540 u1DelayCellOfst[9]=1 cells (1 PI)
1999 00:48:31.721844 u1DelayCellOfst[10]=7 cells (6 PI)
2000 00:48:31.722129 u1DelayCellOfst[11]=1 cells (1 PI)
2001 00:48:31.722459 u1DelayCellOfst[12]=1 cells (1 PI)
2002 00:48:31.722743 u1DelayCellOfst[13]=0 cells (0 PI)
2003 00:48:31.723017 u1DelayCellOfst[14]=1 cells (1 PI)
2004 00:48:31.723318 u1DelayCellOfst[15]=2 cells (2 PI)
2005 00:48:31.723607 Byte1, DQ PI dly=978, DQM PI dly= 981
2006 00:48:31.723888 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2007 00:48:31.724172
2008 00:48:31.724448 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2009 00:48:31.724727
2010 00:48:31.725024 Write Rank1 MR14 =0x18
2011 00:48:31.725325
2012 00:48:31.725600 Final TX Range 0 Vref 24
2013 00:48:31.725876
2014 00:48:31.726146 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2015 00:48:31.726484
2016 00:48:31.726764 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2017 00:48:31.727048 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2018 00:48:31.727329 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2019 00:48:31.727608 Write Rank1 MR3 =0xb0
2020 00:48:31.727883 DramC Write-DBI on
2021 00:48:31.728157 ==
2022 00:48:31.728465 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2023 00:48:31.728783 fsp= 1, odt_onoff= 1, Byte mode= 0
2024 00:48:31.729069 ==
2025 00:48:31.729350 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2026 00:48:31.729632
2027 00:48:31.729911 Begin, DQ Scan Range 701~765
2028 00:48:31.730191
2029 00:48:31.730507
2030 00:48:31.730784 TX Vref Scan disable
2031 00:48:31.731066 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2032 00:48:31.731446 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2033 00:48:31.731837 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2034 00:48:31.732083 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2035 00:48:31.732293 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2036 00:48:31.732500 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2037 00:48:31.732706 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2038 00:48:31.732914 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2039 00:48:31.733115 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2040 00:48:31.733398 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2041 00:48:31.733654 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2042 00:48:31.733860 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2043 00:48:31.734064 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2044 00:48:31.734298 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2045 00:48:31.734517 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2046 00:48:31.734725 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2047 00:48:31.734928 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2048 00:48:31.735127 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2049 00:48:31.735352 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2050 00:48:31.735572 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2051 00:48:31.736112 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2052 00:48:31.736343 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2053 00:48:31.736551 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2054 00:48:31.736726 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2055 00:48:31.736879 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2056 00:48:31.737028 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2057 00:48:31.737176 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2058 00:48:31.737325 Byte0, DQ PI dly=730, DQM PI dly= 730
2059 00:48:31.737472 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2060 00:48:31.737621
2061 00:48:31.737816 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2062 00:48:31.737970
2063 00:48:31.738116 Byte1, DQ PI dly=722, DQM PI dly= 722
2064 00:48:31.738287 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2065 00:48:31.738437
2066 00:48:31.738594 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2067 00:48:31.738753
2068 00:48:31.738902 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2069 00:48:31.739053 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2070 00:48:31.739201 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2071 00:48:31.739347 Write Rank1 MR3 =0x30
2072 00:48:31.739492 DramC Write-DBI off
2073 00:48:31.739634
2074 00:48:31.739778 [DATLAT]
2075 00:48:31.739923 Freq=1600, CH0 RK1, use_rxtx_scan=0
2076 00:48:31.740070
2077 00:48:31.740213 DATLAT Default: 0x10
2078 00:48:31.740359 7, 0xFFFF, sum=0
2079 00:48:31.740507 8, 0xFFFF, sum=0
2080 00:48:31.740656 9, 0xFFFF, sum=0
2081 00:48:31.740802 10, 0xFFFF, sum=0
2082 00:48:31.740949 11, 0xFFFF, sum=0
2083 00:48:31.741097 12, 0xFFFF, sum=0
2084 00:48:31.741269 13, 0xFFFF, sum=0
2085 00:48:31.741517 14, 0x0, sum=1
2086 00:48:31.741671 15, 0x0, sum=2
2087 00:48:31.741789 16, 0x0, sum=3
2088 00:48:31.741907 17, 0x0, sum=4
2089 00:48:31.742035 pattern=2 first_step=14 total pass=5 best_step=16
2090 00:48:31.742164 ==
2091 00:48:31.742318 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2092 00:48:31.742439 fsp= 1, odt_onoff= 1, Byte mode= 0
2093 00:48:31.742556 ==
2094 00:48:31.742672 Start DQ dly to find pass range UseTestEngine =1
2095 00:48:31.742789 x-axis: bit #, y-axis: DQ dly (-127~63)
2096 00:48:31.742905 RX Vref Scan = 0
2097 00:48:31.743021 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2098 00:48:31.743141 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2099 00:48:31.743259 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2100 00:48:31.743379 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2101 00:48:31.743499 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2102 00:48:31.743618 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2103 00:48:31.743735 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2104 00:48:31.743853 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2105 00:48:31.743970 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2106 00:48:31.744087 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2107 00:48:31.744205 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2108 00:48:31.744322 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2109 00:48:31.744439 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2110 00:48:31.744556 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2111 00:48:31.744675 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2112 00:48:31.744791 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2113 00:48:31.744907 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2114 00:48:31.745025 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2115 00:48:31.745144 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2116 00:48:31.745283 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2117 00:48:31.745412 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2118 00:48:31.745534 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2119 00:48:31.745652 -4, [0] xxxoxxxx xxxxxxxx [MSB]
2120 00:48:31.745770 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2121 00:48:31.745887 -2, [0] xxxoxoxx xxxxxxxx [MSB]
2122 00:48:31.746004 -1, [0] xxxoxoxx oxxxxxxx [MSB]
2123 00:48:31.746120 0, [0] xxxoxoxx oxxoxxxx [MSB]
2124 00:48:31.746246 1, [0] xxxoxoox oxxoxoxx [MSB]
2125 00:48:31.746366 2, [0] xxxoxooo ooxoooox [MSB]
2126 00:48:31.746483 3, [0] xxxoxooo ooxooooo [MSB]
2127 00:48:31.746610 4, [0] xxxoxooo ooxooooo [MSB]
2128 00:48:31.746706 5, [0] xoxoxooo ooxooooo [MSB]
2129 00:48:31.746804 6, [0] xoxooooo oooooooo [MSB]
2130 00:48:31.746901 32, [0] oooxoooo oooooooo [MSB]
2131 00:48:31.746998 33, [0] oooxoooo oooooooo [MSB]
2132 00:48:31.747094 34, [0] oooxoxoo oooooxoo [MSB]
2133 00:48:31.747190 35, [0] oooxoxox oooxoxxo [MSB]
2134 00:48:31.747285 36, [0] oooxoxxx xooxoxxo [MSB]
2135 00:48:31.747381 37, [0] oooxoxxx xxoxoxxo [MSB]
2136 00:48:31.747478 38, [0] oooxoxxx xxoxxxxo [MSB]
2137 00:48:31.747576 39, [0] oooxoxxx xxoxxxxx [MSB]
2138 00:48:31.747673 40, [0] ooxxoxxx xxoxxxxx [MSB]
2139 00:48:31.747770 41, [0] oxxxxxxx xxxxxxxx [MSB]
2140 00:48:31.747867 42, [0] oxxxxxxx xxxxxxxx [MSB]
2141 00:48:31.747963 43, [0] xxxxxxxx xxxxxxxx [MSB]
2142 00:48:31.748060 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
2143 00:48:31.748157 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
2144 00:48:31.748252 iDelay=43, Bit 2, Center 23 (7 ~ 39) 33
2145 00:48:31.748348 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
2146 00:48:31.748444 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2147 00:48:31.748540 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
2148 00:48:31.748636 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2149 00:48:31.748730 iDelay=43, Bit 7, Center 18 (2 ~ 34) 33
2150 00:48:31.748837 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
2151 00:48:31.748940 iDelay=43, Bit 9, Center 19 (2 ~ 36) 35
2152 00:48:31.749040 iDelay=43, Bit 10, Center 23 (6 ~ 40) 35
2153 00:48:31.749138 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2154 00:48:31.749234 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
2155 00:48:31.749329 iDelay=43, Bit 13, Center 17 (1 ~ 33) 33
2156 00:48:31.749424 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
2157 00:48:31.749518 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
2158 00:48:31.749612 ==
2159 00:48:31.749707 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2160 00:48:31.749804 fsp= 1, odt_onoff= 1, Byte mode= 0
2161 00:48:31.749901 ==
2162 00:48:31.749996 DQS Delay:
2163 00:48:31.750091 DQS0 = 0, DQS1 = 0
2164 00:48:31.750185 DQM Delay:
2165 00:48:31.750299 DQM0 = 19, DQM1 = 18
2166 00:48:31.750396 DQ Delay:
2167 00:48:31.750492 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13
2168 00:48:31.750586 DQ4 =23, DQ5 =15, DQ6 =18, DQ7 =18
2169 00:48:31.750680 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
2170 00:48:31.750776 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
2171 00:48:31.750870
2172 00:48:31.750964
2173 00:48:31.751058
2174 00:48:31.751152 [DramC_TX_OE_Calibration] TA2
2175 00:48:31.751248 Original DQ_B0 (3 6) =30, OEN = 27
2176 00:48:31.751344 Original DQ_B1 (3 6) =30, OEN = 27
2177 00:48:31.751440 23, 0x0, End_B0=23 End_B1=23
2178 00:48:31.751537 24, 0x0, End_B0=24 End_B1=24
2179 00:48:31.751639 25, 0x0, End_B0=25 End_B1=25
2180 00:48:31.751722 26, 0x0, End_B0=26 End_B1=26
2181 00:48:31.752017 27, 0x0, End_B0=27 End_B1=27
2182 00:48:31.752116 28, 0x0, End_B0=28 End_B1=28
2183 00:48:31.752203 29, 0x0, End_B0=29 End_B1=29
2184 00:48:31.752285 30, 0x0, End_B0=30 End_B1=30
2185 00:48:31.752370 31, 0xFFFF, End_B0=30 End_B1=30
2186 00:48:31.752454 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2187 00:48:31.752538 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2188 00:48:31.752621
2189 00:48:31.752702
2190 00:48:31.752783 Write Rank1 MR23 =0x3f
2191 00:48:31.752864 [DQSOSC]
2192 00:48:31.752944 [DQSOSCAuto] RK1, (LSB)MR18= 0x90, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2193 00:48:31.753026 CH0_RK1: MR19=0x3, MR18=0x90, DQSOSC=345, MR23=63, INC=20, DEC=31
2194 00:48:31.753107 Write Rank1 MR23 =0x3f
2195 00:48:31.753189 [DQSOSC]
2196 00:48:31.753269 [DQSOSCAuto] RK1, (LSB)MR18= 0x8f, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2197 00:48:31.753352 CH0 RK1: MR19=3, MR18=8F
2198 00:48:31.753433 [RxdqsGatingPostProcess] freq 1600
2199 00:48:31.753514 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2200 00:48:31.753595 Rank: 0
2201 00:48:31.753676 best DQS0 dly(2T, 0.5T) = (2, 5)
2202 00:48:31.753756 best DQS1 dly(2T, 0.5T) = (2, 5)
2203 00:48:31.753836 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2204 00:48:31.753917 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2205 00:48:31.753998 Rank: 1
2206 00:48:31.754079 best DQS0 dly(2T, 0.5T) = (2, 6)
2207 00:48:31.754164 best DQS1 dly(2T, 0.5T) = (2, 6)
2208 00:48:31.754265 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2209 00:48:31.754349 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2210 00:48:31.754431 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2211 00:48:31.754513 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2212 00:48:31.754594 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2213 00:48:31.754675 Write Rank0 MR13 =0x59
2214 00:48:31.754756 ==
2215 00:48:31.754838 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2216 00:48:31.754921 fsp= 1, odt_onoff= 1, Byte mode= 0
2217 00:48:31.755003 ==
2218 00:48:31.755085 === u2Vref_new: 0x56 --> 0x3a
2219 00:48:31.755167 === u2Vref_new: 0x58 --> 0x58
2220 00:48:31.755249 === u2Vref_new: 0x5a --> 0x5a
2221 00:48:31.755329 === u2Vref_new: 0x5c --> 0x78
2222 00:48:31.755410 === u2Vref_new: 0x5e --> 0x7a
2223 00:48:31.755505 === u2Vref_new: 0x60 --> 0x90
2224 00:48:31.755594
2225 00:48:31.755675 CBT Vref found, early break!
2226 00:48:31.755756 [CA 0] Center 37 (11~63) winsize 53
2227 00:48:31.755837 [CA 1] Center 36 (9~63) winsize 55
2228 00:48:31.755919 [CA 2] Center 33 (4~63) winsize 60
2229 00:48:31.756000 [CA 3] Center 33 (4~63) winsize 60
2230 00:48:31.756080 [CA 4] Center 34 (6~63) winsize 58
2231 00:48:31.756160 [CA 5] Center 28 (-1~57) winsize 59
2232 00:48:31.756241
2233 00:48:31.756321 [CATrainingPosCal] consider 1 rank data
2234 00:48:31.756404 u2DelayCellTimex100 = 753/100 ps
2235 00:48:31.756486 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2236 00:48:31.756567 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2237 00:48:31.756653 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2238 00:48:31.756724 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2239 00:48:31.756794 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2240 00:48:31.756864 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2241 00:48:31.756934
2242 00:48:31.757004 CA PerBit enable=1, Macro0, CA PI delay=28
2243 00:48:31.757076 === u2Vref_new: 0x56 --> 0x3a
2244 00:48:31.757146
2245 00:48:31.757215 Vref(ca) range 1: 22
2246 00:48:31.757285
2247 00:48:31.757354 CS Dly= 12 (43-0-32)
2248 00:48:31.757423 Write Rank0 MR13 =0xd8
2249 00:48:31.757493 Write Rank0 MR13 =0xd8
2250 00:48:31.757563 Write Rank0 MR12 =0x56
2251 00:48:31.757633 Write Rank1 MR13 =0x59
2252 00:48:31.757702 ==
2253 00:48:31.757772 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2254 00:48:31.757843 fsp= 1, odt_onoff= 1, Byte mode= 0
2255 00:48:31.757914 ==
2256 00:48:31.757985 === u2Vref_new: 0x56 --> 0x3a
2257 00:48:31.758056 === u2Vref_new: 0x58 --> 0x58
2258 00:48:31.758126 === u2Vref_new: 0x5a --> 0x5a
2259 00:48:31.758198 === u2Vref_new: 0x5c --> 0x78
2260 00:48:31.758284 === u2Vref_new: 0x5e --> 0x7a
2261 00:48:31.758355 === u2Vref_new: 0x60 --> 0x90
2262 00:48:31.758446 [CA 0] Center 37 (12~63) winsize 52
2263 00:48:31.758522 [CA 1] Center 35 (8~63) winsize 56
2264 00:48:31.759051 [CA 2] Center 34 (5~63) winsize 59
2265 00:48:31.762796 [CA 3] Center 34 (5~63) winsize 59
2266 00:48:31.766312 [CA 4] Center 35 (7~63) winsize 57
2267 00:48:31.769282 [CA 5] Center 27 (-2~56) winsize 59
2268 00:48:31.769513
2269 00:48:31.772898 [CATrainingPosCal] consider 2 rank data
2270 00:48:31.776047 u2DelayCellTimex100 = 753/100 ps
2271 00:48:31.779804 CA0 delay=37 (12~63),Diff = 10 PI (12 cell)
2272 00:48:31.782588 CA1 delay=36 (9~63),Diff = 9 PI (11 cell)
2273 00:48:31.786559 CA2 delay=34 (5~63),Diff = 7 PI (9 cell)
2274 00:48:31.789548 CA3 delay=34 (5~63),Diff = 7 PI (9 cell)
2275 00:48:31.792893 CA4 delay=35 (7~63),Diff = 8 PI (10 cell)
2276 00:48:31.796036 CA5 delay=27 (-1~56),Diff = 0 PI (0 cell)
2277 00:48:31.796264
2278 00:48:31.799651 CA PerBit enable=1, Macro0, CA PI delay=27
2279 00:48:31.803089 === u2Vref_new: 0x56 --> 0x3a
2280 00:48:31.803418
2281 00:48:31.806267 Vref(ca) range 1: 22
2282 00:48:31.806495
2283 00:48:31.806671 CS Dly= 11 (42-0-32)
2284 00:48:31.809958 Write Rank1 MR13 =0xd8
2285 00:48:31.812950 Write Rank1 MR13 =0xd8
2286 00:48:31.813188 Write Rank1 MR12 =0x56
2287 00:48:31.816523 [RankSwap] Rank num 2, (Multi 1), Rank 0
2288 00:48:31.819969 Write Rank0 MR2 =0xad
2289 00:48:31.820254 [Write Leveling]
2290 00:48:31.823630 delay byte0 byte1 byte2 byte3
2291 00:48:31.823991
2292 00:48:31.827032 10 0 0
2293 00:48:31.827732 11 0 0
2294 00:48:31.830020 12 0 0
2295 00:48:31.830469 13 0 0
2296 00:48:31.830772 14 0 0
2297 00:48:31.833433 15 0 0
2298 00:48:31.833887 16 0 0
2299 00:48:31.836882 17 0 0
2300 00:48:31.837434 18 0 0
2301 00:48:31.837861 19 0 0
2302 00:48:31.840181 20 0 0
2303 00:48:31.840658 21 0 0
2304 00:48:31.843446 22 0 0
2305 00:48:31.843814 23 0 0
2306 00:48:31.844104 24 0 0
2307 00:48:31.846745 25 0 0
2308 00:48:31.847115 26 0 0
2309 00:48:31.850044 27 0 0
2310 00:48:31.850472 28 0 0
2311 00:48:31.853604 29 0 0
2312 00:48:31.854051 30 0 0
2313 00:48:31.854391 31 0 0
2314 00:48:31.856871 32 0 0
2315 00:48:31.857236 33 0 ff
2316 00:48:31.860430 34 0 ff
2317 00:48:31.860907 35 0 ff
2318 00:48:31.863572 36 0 ff
2319 00:48:31.863940 37 ff ff
2320 00:48:31.864235 38 ff ff
2321 00:48:31.867090 39 ff ff
2322 00:48:31.867541 40 ff ff
2323 00:48:31.870267 41 ff ff
2324 00:48:31.871165 42 ff ff
2325 00:48:31.873580 43 ff ff
2326 00:48:31.877467 pass bytecount = 0xff (0xff: all bytes pass)
2327 00:48:31.877909
2328 00:48:31.878196 DQS0 dly: 37
2329 00:48:31.880701 DQS1 dly: 33
2330 00:48:31.881140 Write Rank0 MR2 =0x2d
2331 00:48:31.883752 [RankSwap] Rank num 2, (Multi 1), Rank 0
2332 00:48:31.887384 Write Rank0 MR1 =0xd6
2333 00:48:31.887741 [Gating]
2334 00:48:31.888022 ==
2335 00:48:31.893629 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2336 00:48:31.897192 fsp= 1, odt_onoff= 1, Byte mode= 0
2337 00:48:31.897550 ==
2338 00:48:31.900457 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2339 00:48:31.904083 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2340 00:48:31.910795 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2341 00:48:31.914320 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2342 00:48:31.917287 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2343 00:48:31.924017 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2344 00:48:31.927468 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2345 00:48:31.930829 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2346 00:48:31.934150 3 2 0 |707 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2347 00:48:31.940828 3 2 4 |3d3d 606 |(11 11)(11 11) |(1 1)(0 0)| 0
2348 00:48:31.944588 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2349 00:48:31.947597 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2350 00:48:31.954844 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2351 00:48:31.957944 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2352 00:48:31.961047 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2353 00:48:31.967830 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2354 00:48:31.971163 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2355 00:48:31.974419 3 3 4 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2356 00:48:31.977920 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2357 00:48:31.984738 [Byte 0] Lead/lag Transition tap number (1)
2358 00:48:31.987948 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2359 00:48:31.991182 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2360 00:48:31.994510 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2361 00:48:32.001473 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2362 00:48:32.004549 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2363 00:48:32.008152 3 4 0 |1e1d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2364 00:48:32.014910 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2365 00:48:32.018118 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2366 00:48:32.021806 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2367 00:48:32.028269 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2368 00:48:32.031808 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2369 00:48:32.034690 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2370 00:48:32.041624 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2371 00:48:32.044940 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2372 00:48:32.048280 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2373 00:48:32.051372 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2374 00:48:32.058163 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2375 00:48:32.061744 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2376 00:48:32.064824 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2377 00:48:32.071507 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2378 00:48:32.074793 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2379 00:48:32.078143 [Byte 0] Lead/lag Transition tap number (2)
2380 00:48:32.081644 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2381 00:48:32.088301 [Byte 1] Lead/lag falling Transition (3, 5, 28)
2382 00:48:32.091398 3 6 0 |807 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
2383 00:48:32.094743 [Byte 1] Lead/lag Transition tap number (2)
2384 00:48:32.098485 3 6 4 |4646 1414 |(0 0)(11 11) |(0 0)(0 0)| 0
2385 00:48:32.101422 [Byte 0]First pass (3, 6, 4)
2386 00:48:32.105013 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2387 00:48:32.112005 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2388 00:48:32.112526 [Byte 1]First pass (3, 6, 12)
2389 00:48:32.118831 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2390 00:48:32.122249 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2391 00:48:32.124962 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2392 00:48:32.128345 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2393 00:48:32.134773 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2394 00:48:32.138263 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2395 00:48:32.141646 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2396 00:48:32.144673 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2397 00:48:32.148113 All bytes gating window > 1UI, Early break!
2398 00:48:32.148628
2399 00:48:32.151533 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2400 00:48:32.151970
2401 00:48:32.158156 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 0)
2402 00:48:32.158714
2403 00:48:32.159060
2404 00:48:32.159376
2405 00:48:32.161639 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2406 00:48:32.162149
2407 00:48:32.164344 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 0)
2408 00:48:32.164780
2409 00:48:32.165132
2410 00:48:32.168017 Write Rank0 MR1 =0x56
2411 00:48:32.168529
2412 00:48:32.171273 best RODT dly(2T, 0.5T) = (2, 2)
2413 00:48:32.171708
2414 00:48:32.174677 best RODT dly(2T, 0.5T) = (2, 3)
2415 00:48:32.175113 ==
2416 00:48:32.177795 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2417 00:48:32.181468 fsp= 1, odt_onoff= 1, Byte mode= 0
2418 00:48:32.181979 ==
2419 00:48:32.188337 Start DQ dly to find pass range UseTestEngine =0
2420 00:48:32.191088 x-axis: bit #, y-axis: DQ dly (-127~63)
2421 00:48:32.191529 RX Vref Scan = 0
2422 00:48:32.194509 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2423 00:48:32.197656 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2424 00:48:32.201148 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2425 00:48:32.204633 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2426 00:48:32.205185 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2427 00:48:32.207995 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2428 00:48:32.211805 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2429 00:48:32.214416 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2430 00:48:32.218084 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2431 00:48:32.221618 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2432 00:48:32.224540 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2433 00:48:32.227934 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2434 00:48:32.228382 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2435 00:48:32.231334 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2436 00:48:32.234782 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2437 00:48:32.238392 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2438 00:48:32.241890 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2439 00:48:32.245153 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2440 00:48:32.248507 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2441 00:48:32.249027 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2442 00:48:32.251383 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2443 00:48:32.255210 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2444 00:48:32.258549 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2445 00:48:32.261616 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2446 00:48:32.264974 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2447 00:48:32.268282 -1, [0] xxxoxxxx xxxxxxxo [MSB]
2448 00:48:32.268807 0, [0] xxxoxxxx xxxxxxxo [MSB]
2449 00:48:32.271567 1, [0] xxooxxxx xxoxxxxo [MSB]
2450 00:48:32.274819 2, [0] xxooxxxo oxoxxxxo [MSB]
2451 00:48:32.278056 3, [0] xxoooxxo oooxxxxo [MSB]
2452 00:48:32.281625 4, [0] xxoooxxo ooooxooo [MSB]
2453 00:48:32.285100 5, [0] xooooxxo oooooooo [MSB]
2454 00:48:32.285623 31, [0] oooooooo oooooooo [MSB]
2455 00:48:32.288198 32, [0] oooxoooo oooooooo [MSB]
2456 00:48:32.291654 33, [0] ooxxoooo ooooooox [MSB]
2457 00:48:32.294877 34, [0] ooxxoooo oxooooox [MSB]
2458 00:48:32.298353 35, [0] ooxxoooo oxxxooox [MSB]
2459 00:48:32.301731 36, [0] ooxxoooo xxxxooxx [MSB]
2460 00:48:32.302176 37, [0] ooxxxoox xxxxoxxx [MSB]
2461 00:48:32.305080 38, [0] ooxxxoox xxxxoxxx [MSB]
2462 00:48:32.308271 39, [0] ooxxxoox xxxxxxxx [MSB]
2463 00:48:32.311630 40, [0] ooxxxoox xxxxxxxx [MSB]
2464 00:48:32.314930 41, [0] ooxxxoxx xxxxxxxx [MSB]
2465 00:48:32.318308 42, [0] xxxxxoxx xxxxxxxx [MSB]
2466 00:48:32.321836 43, [0] xxxxxxxx xxxxxxxx [MSB]
2467 00:48:32.325229 iDelay=43, Bit 0, Center 23 (6 ~ 41) 36
2468 00:48:32.328448 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
2469 00:48:32.331770 iDelay=43, Bit 2, Center 16 (1 ~ 32) 32
2470 00:48:32.335131 iDelay=43, Bit 3, Center 15 (-1 ~ 31) 33
2471 00:48:32.338674 iDelay=43, Bit 4, Center 19 (3 ~ 36) 34
2472 00:48:32.341716 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
2473 00:48:32.345362 iDelay=43, Bit 6, Center 23 (6 ~ 40) 35
2474 00:48:32.348754 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
2475 00:48:32.351596 iDelay=43, Bit 8, Center 18 (2 ~ 35) 34
2476 00:48:32.354879 iDelay=43, Bit 9, Center 18 (3 ~ 33) 31
2477 00:48:32.358724 iDelay=43, Bit 10, Center 17 (1 ~ 34) 34
2478 00:48:32.361919 iDelay=43, Bit 11, Center 19 (4 ~ 34) 31
2479 00:48:32.365216 iDelay=43, Bit 12, Center 21 (5 ~ 38) 34
2480 00:48:32.371998 iDelay=43, Bit 13, Center 20 (4 ~ 36) 33
2481 00:48:32.374945 iDelay=43, Bit 14, Center 19 (4 ~ 35) 32
2482 00:48:32.378553 iDelay=43, Bit 15, Center 15 (-2 ~ 32) 35
2483 00:48:32.378989 ==
2484 00:48:32.381841 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2485 00:48:32.385362 fsp= 1, odt_onoff= 1, Byte mode= 0
2486 00:48:32.385876 ==
2487 00:48:32.388364 DQS Delay:
2488 00:48:32.388799 DQS0 = 0, DQS1 = 0
2489 00:48:32.389136 DQM Delay:
2490 00:48:32.391774 DQM0 = 20, DQM1 = 18
2491 00:48:32.392205 DQ Delay:
2492 00:48:32.395337 DQ0 =23, DQ1 =23, DQ2 =16, DQ3 =15
2493 00:48:32.398518 DQ4 =19, DQ5 =24, DQ6 =23, DQ7 =19
2494 00:48:32.401952 DQ8 =18, DQ9 =18, DQ10 =17, DQ11 =19
2495 00:48:32.405534 DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =15
2496 00:48:32.406059
2497 00:48:32.406471
2498 00:48:32.408504 DramC Write-DBI off
2499 00:48:32.408936 ==
2500 00:48:32.412286 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2501 00:48:32.415172 fsp= 1, odt_onoff= 1, Byte mode= 0
2502 00:48:32.415616 ==
2503 00:48:32.422021 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2504 00:48:32.422589
2505 00:48:32.425231 Begin, DQ Scan Range 929~1185
2506 00:48:32.425745
2507 00:48:32.426084
2508 00:48:32.426456 TX Vref Scan disable
2509 00:48:32.428539 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2510 00:48:32.431764 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2511 00:48:32.435360 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2512 00:48:32.438829 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2513 00:48:32.445667 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2514 00:48:32.448960 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2515 00:48:32.451874 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2516 00:48:32.455387 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2517 00:48:32.459005 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2518 00:48:32.462286 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2519 00:48:32.465712 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2520 00:48:32.468836 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2521 00:48:32.471843 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2522 00:48:32.475348 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2523 00:48:32.478646 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2524 00:48:32.482320 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2525 00:48:32.485663 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2526 00:48:32.489063 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2527 00:48:32.491865 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2528 00:48:32.495289 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2529 00:48:32.498724 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2530 00:48:32.505594 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2531 00:48:32.508557 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2532 00:48:32.512081 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2533 00:48:32.515430 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2534 00:48:32.518581 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2535 00:48:32.522115 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2536 00:48:32.525334 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2537 00:48:32.529166 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2538 00:48:32.532748 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2539 00:48:32.535401 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2540 00:48:32.538650 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2541 00:48:32.541992 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2542 00:48:32.545643 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2543 00:48:32.548976 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2544 00:48:32.552166 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2545 00:48:32.555651 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2546 00:48:32.559331 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2547 00:48:32.562362 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2548 00:48:32.565760 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2549 00:48:32.569110 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2550 00:48:32.572702 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2551 00:48:32.576071 971 |3 6 11|[0] xxxxxxxx oooxxxxo [MSB]
2552 00:48:32.578846 972 |3 6 12|[0] xxxxxxxx ooooxooo [MSB]
2553 00:48:32.585627 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2554 00:48:32.588851 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2555 00:48:32.592278 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2556 00:48:32.595651 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
2557 00:48:32.602382 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2558 00:48:32.605606 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2559 00:48:32.608855 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2560 00:48:32.612325 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2561 00:48:32.615446 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2562 00:48:32.618761 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2563 00:48:32.622571 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2564 00:48:32.625719 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2565 00:48:32.629566 Byte0, DQ PI dly=985, DQM PI dly= 985
2566 00:48:32.632082 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2567 00:48:32.632659
2568 00:48:32.638780 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2569 00:48:32.639220
2570 00:48:32.642042 Byte1, DQ PI dly=981, DQM PI dly= 981
2571 00:48:32.645553 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2572 00:48:32.645995
2573 00:48:32.648973 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2574 00:48:32.649487
2575 00:48:32.649856 ==
2576 00:48:32.655689 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2577 00:48:32.658758 fsp= 1, odt_onoff= 1, Byte mode= 0
2578 00:48:32.659203 ==
2579 00:48:32.662087 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2580 00:48:32.662568
2581 00:48:32.666032 Begin, DQ Scan Range 957~1021
2582 00:48:32.668952 Write Rank0 MR14 =0x0
2583 00:48:32.676432
2584 00:48:32.676941 CH=1, VrefRange= 0, VrefLevel = 0
2585 00:48:32.682645 TX Bit0 (980~997) 18 988, Bit8 (972~991) 20 981,
2586 00:48:32.685712 TX Bit1 (978~995) 18 986, Bit9 (972~989) 18 980,
2587 00:48:32.692608 TX Bit2 (977~991) 15 984, Bit10 (974~989) 16 981,
2588 00:48:32.696127 TX Bit3 (975~990) 16 982, Bit11 (975~991) 17 983,
2589 00:48:32.699270 TX Bit4 (977~992) 16 984, Bit12 (976~992) 17 984,
2590 00:48:32.706062 TX Bit5 (979~997) 19 988, Bit13 (976~991) 16 983,
2591 00:48:32.709137 TX Bit6 (979~997) 19 988, Bit14 (976~990) 15 983,
2592 00:48:32.712659 TX Bit7 (978~992) 15 985, Bit15 (970~987) 18 978,
2593 00:48:32.713156
2594 00:48:32.716021 Write Rank0 MR14 =0x2
2595 00:48:32.724040
2596 00:48:32.724551 CH=1, VrefRange= 0, VrefLevel = 2
2597 00:48:32.730893 TX Bit0 (980~997) 18 988, Bit8 (972~991) 20 981,
2598 00:48:32.734558 TX Bit1 (978~996) 19 987, Bit9 (972~990) 19 981,
2599 00:48:32.740932 TX Bit2 (976~991) 16 983, Bit10 (975~990) 16 982,
2600 00:48:32.744282 TX Bit3 (975~990) 16 982, Bit11 (975~991) 17 983,
2601 00:48:32.747748 TX Bit4 (977~993) 17 985, Bit12 (976~992) 17 984,
2602 00:48:32.754191 TX Bit5 (978~997) 20 987, Bit13 (976~991) 16 983,
2603 00:48:32.757520 TX Bit6 (979~997) 19 988, Bit14 (975~991) 17 983,
2604 00:48:32.761160 TX Bit7 (977~992) 16 984, Bit15 (970~987) 18 978,
2605 00:48:32.761677
2606 00:48:32.764478 Write Rank0 MR14 =0x4
2607 00:48:32.772675
2608 00:48:32.773189 CH=1, VrefRange= 0, VrefLevel = 4
2609 00:48:32.779476 TX Bit0 (979~998) 20 988, Bit8 (971~991) 21 981,
2610 00:48:32.782768 TX Bit1 (977~997) 21 987, Bit9 (971~991) 21 981,
2611 00:48:32.789108 TX Bit2 (976~991) 16 983, Bit10 (974~991) 18 982,
2612 00:48:32.792761 TX Bit3 (975~991) 17 983, Bit11 (975~992) 18 983,
2613 00:48:32.796067 TX Bit4 (977~994) 18 985, Bit12 (975~992) 18 983,
2614 00:48:32.802742 TX Bit5 (978~998) 21 988, Bit13 (976~992) 17 984,
2615 00:48:32.806119 TX Bit6 (979~998) 20 988, Bit14 (975~991) 17 983,
2616 00:48:32.809942 TX Bit7 (977~993) 17 985, Bit15 (970~988) 19 979,
2617 00:48:32.810518
2618 00:48:32.812917 Write Rank0 MR14 =0x6
2619 00:48:32.821004
2620 00:48:32.821519 CH=1, VrefRange= 0, VrefLevel = 6
2621 00:48:32.827825 TX Bit0 (979~998) 20 988, Bit8 (971~992) 22 981,
2622 00:48:32.830884 TX Bit1 (977~997) 21 987, Bit9 (971~991) 21 981,
2623 00:48:32.837560 TX Bit2 (976~992) 17 984, Bit10 (973~991) 19 982,
2624 00:48:32.840846 TX Bit3 (974~991) 18 982, Bit11 (975~992) 18 983,
2625 00:48:32.844682 TX Bit4 (976~994) 19 985, Bit12 (975~992) 18 983,
2626 00:48:32.850852 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2627 00:48:32.854190 TX Bit6 (978~998) 21 988, Bit14 (974~991) 18 982,
2628 00:48:32.857701 TX Bit7 (977~993) 17 985, Bit15 (970~990) 21 980,
2629 00:48:32.858251
2630 00:48:32.861027 Write Rank0 MR14 =0x8
2631 00:48:32.869433
2632 00:48:32.869943 CH=1, VrefRange= 0, VrefLevel = 8
2633 00:48:32.875911 TX Bit0 (979~998) 20 988, Bit8 (971~992) 22 981,
2634 00:48:32.879338 TX Bit1 (977~997) 21 987, Bit9 (971~991) 21 981,
2635 00:48:32.886364 TX Bit2 (976~992) 17 984, Bit10 (972~991) 20 981,
2636 00:48:32.889533 TX Bit3 (974~991) 18 982, Bit11 (974~992) 19 983,
2637 00:48:32.892953 TX Bit4 (976~995) 20 985, Bit12 (975~993) 19 984,
2638 00:48:32.899378 TX Bit5 (978~998) 21 988, Bit13 (974~992) 19 983,
2639 00:48:32.902789 TX Bit6 (978~998) 21 988, Bit14 (974~992) 19 983,
2640 00:48:32.906306 TX Bit7 (977~994) 18 985, Bit15 (969~990) 22 979,
2641 00:48:32.906828
2642 00:48:32.909644 Write Rank0 MR14 =0xa
2643 00:48:32.917696
2644 00:48:32.921092 CH=1, VrefRange= 0, VrefLevel = 10
2645 00:48:32.924420 TX Bit0 (978~998) 21 988, Bit8 (970~992) 23 981,
2646 00:48:32.927576 TX Bit1 (977~997) 21 987, Bit9 (971~991) 21 981,
2647 00:48:32.934342 TX Bit2 (976~992) 17 984, Bit10 (972~992) 21 982,
2648 00:48:32.937787 TX Bit3 (974~992) 19 983, Bit11 (974~992) 19 983,
2649 00:48:32.941043 TX Bit4 (976~995) 20 985, Bit12 (974~993) 20 983,
2650 00:48:32.947946 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2651 00:48:32.951116 TX Bit6 (978~998) 21 988, Bit14 (974~992) 19 983,
2652 00:48:32.954163 TX Bit7 (977~994) 18 985, Bit15 (969~990) 22 979,
2653 00:48:32.954637
2654 00:48:32.957392 Write Rank0 MR14 =0xc
2655 00:48:32.966690
2656 00:48:32.970041 CH=1, VrefRange= 0, VrefLevel = 12
2657 00:48:32.973136 TX Bit0 (978~999) 22 988, Bit8 (970~992) 23 981,
2658 00:48:32.976263 TX Bit1 (977~998) 22 987, Bit9 (970~991) 22 980,
2659 00:48:32.982895 TX Bit2 (975~993) 19 984, Bit10 (972~992) 21 982,
2660 00:48:32.986094 TX Bit3 (974~992) 19 983, Bit11 (973~993) 21 983,
2661 00:48:32.989656 TX Bit4 (976~996) 21 986, Bit12 (974~993) 20 983,
2662 00:48:32.996626 TX Bit5 (977~999) 23 988, Bit13 (974~992) 19 983,
2663 00:48:32.999398 TX Bit6 (978~999) 22 988, Bit14 (973~992) 20 982,
2664 00:48:33.002893 TX Bit7 (977~995) 19 986, Bit15 (969~991) 23 980,
2665 00:48:33.003329
2666 00:48:33.006294 Write Rank0 MR14 =0xe
2667 00:48:33.014936
2668 00:48:33.018277 CH=1, VrefRange= 0, VrefLevel = 14
2669 00:48:33.021607 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2670 00:48:33.025044 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2671 00:48:33.031841 TX Bit2 (975~993) 19 984, Bit10 (971~992) 22 981,
2672 00:48:33.034993 TX Bit3 (973~993) 21 983, Bit11 (973~992) 20 982,
2673 00:48:33.038736 TX Bit4 (976~997) 22 986, Bit12 (974~994) 21 984,
2674 00:48:33.045030 TX Bit5 (978~999) 22 988, Bit13 (973~992) 20 982,
2675 00:48:33.048378 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
2676 00:48:33.051617 TX Bit7 (977~996) 20 986, Bit15 (969~991) 23 980,
2677 00:48:33.052052
2678 00:48:33.055201 Write Rank0 MR14 =0x10
2679 00:48:33.063514
2680 00:48:33.066882 CH=1, VrefRange= 0, VrefLevel = 16
2681 00:48:33.070587 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2682 00:48:33.073704 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2683 00:48:33.080391 TX Bit2 (975~994) 20 984, Bit10 (971~992) 22 981,
2684 00:48:33.083824 TX Bit3 (973~993) 21 983, Bit11 (972~993) 22 982,
2685 00:48:33.087171 TX Bit4 (975~997) 23 986, Bit12 (972~994) 23 983,
2686 00:48:33.093919 TX Bit5 (977~999) 23 988, Bit13 (973~993) 21 983,
2687 00:48:33.097293 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
2688 00:48:33.100717 TX Bit7 (976~997) 22 986, Bit15 (969~991) 23 980,
2689 00:48:33.101245
2690 00:48:33.104254 Write Rank0 MR14 =0x12
2691 00:48:33.112808
2692 00:48:33.116028 CH=1, VrefRange= 0, VrefLevel = 18
2693 00:48:33.119357 TX Bit0 (977~1000) 24 988, Bit8 (970~993) 24 981,
2694 00:48:33.122501 TX Bit1 (976~998) 23 987, Bit9 (970~992) 23 981,
2695 00:48:33.129699 TX Bit2 (975~995) 21 985, Bit10 (971~993) 23 982,
2696 00:48:33.132725 TX Bit3 (972~994) 23 983, Bit11 (972~994) 23 983,
2697 00:48:33.135860 TX Bit4 (975~997) 23 986, Bit12 (972~995) 24 983,
2698 00:48:33.142428 TX Bit5 (977~999) 23 988, Bit13 (973~993) 21 983,
2699 00:48:33.146099 TX Bit6 (977~1000) 24 988, Bit14 (972~993) 22 982,
2700 00:48:33.149251 TX Bit7 (976~997) 22 986, Bit15 (969~992) 24 980,
2701 00:48:33.152437
2702 00:48:33.152878 Write Rank0 MR14 =0x14
2703 00:48:33.161705
2704 00:48:33.165177 CH=1, VrefRange= 0, VrefLevel = 20
2705 00:48:33.168561 TX Bit0 (977~1000) 24 988, Bit8 (970~992) 23 981,
2706 00:48:33.171764 TX Bit1 (976~998) 23 987, Bit9 (970~992) 23 981,
2707 00:48:33.178512 TX Bit2 (974~995) 22 984, Bit10 (970~993) 24 981,
2708 00:48:33.182162 TX Bit3 (972~995) 24 983, Bit11 (972~994) 23 983,
2709 00:48:33.185317 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2710 00:48:33.191766 TX Bit5 (977~1000) 24 988, Bit13 (973~994) 22 983,
2711 00:48:33.195074 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2712 00:48:33.198406 TX Bit7 (976~997) 22 986, Bit15 (968~992) 25 980,
2713 00:48:33.198847
2714 00:48:33.201868 Write Rank0 MR14 =0x16
2715 00:48:33.210874
2716 00:48:33.214294 CH=1, VrefRange= 0, VrefLevel = 22
2717 00:48:33.217672 TX Bit0 (978~1000) 23 989, Bit8 (969~992) 24 980,
2718 00:48:33.221149 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2719 00:48:33.227580 TX Bit2 (974~996) 23 985, Bit10 (970~993) 24 981,
2720 00:48:33.230918 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2721 00:48:33.234278 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2722 00:48:33.240876 TX Bit5 (976~1000) 25 988, Bit13 (972~994) 23 983,
2723 00:48:33.244167 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2724 00:48:33.247732 TX Bit7 (976~998) 23 987, Bit15 (968~992) 25 980,
2725 00:48:33.248221
2726 00:48:33.251083 Write Rank0 MR14 =0x18
2727 00:48:33.259905
2728 00:48:33.260337 CH=1, VrefRange= 0, VrefLevel = 24
2729 00:48:33.266865 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2730 00:48:33.269957 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2731 00:48:33.276843 TX Bit2 (974~997) 24 985, Bit10 (970~993) 24 981,
2732 00:48:33.280060 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2733 00:48:33.283300 TX Bit4 (975~998) 24 986, Bit12 (971~995) 25 983,
2734 00:48:33.290118 TX Bit5 (977~999) 23 988, Bit13 (971~994) 24 982,
2735 00:48:33.293466 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2736 00:48:33.297219 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2737 00:48:33.297734
2738 00:48:33.299896 Write Rank0 MR14 =0x1a
2739 00:48:33.309173
2740 00:48:33.312628 CH=1, VrefRange= 0, VrefLevel = 26
2741 00:48:33.316083 TX Bit0 (976~1001) 26 988, Bit8 (969~992) 24 980,
2742 00:48:33.319021 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2743 00:48:33.325839 TX Bit2 (974~997) 24 985, Bit10 (970~993) 24 981,
2744 00:48:33.329010 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2745 00:48:33.332656 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2746 00:48:33.339278 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2747 00:48:33.342533 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2748 00:48:33.345746 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2749 00:48:33.349120
2750 00:48:33.349748 Write Rank0 MR14 =0x1c
2751 00:48:33.358739
2752 00:48:33.361616 CH=1, VrefRange= 0, VrefLevel = 28
2753 00:48:33.365101 TX Bit0 (976~1001) 26 988, Bit8 (969~992) 24 980,
2754 00:48:33.368425 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2755 00:48:33.375148 TX Bit2 (974~997) 24 985, Bit10 (970~993) 24 981,
2756 00:48:33.378291 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2757 00:48:33.381859 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2758 00:48:33.388713 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2759 00:48:33.391640 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2760 00:48:33.395123 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2761 00:48:33.398410
2762 00:48:33.398893 Write Rank0 MR14 =0x1e
2763 00:48:33.407547
2764 00:48:33.410893 CH=1, VrefRange= 0, VrefLevel = 30
2765 00:48:33.414325 TX Bit0 (976~1001) 26 988, Bit8 (969~992) 24 980,
2766 00:48:33.417475 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2767 00:48:33.424250 TX Bit2 (974~997) 24 985, Bit10 (970~993) 24 981,
2768 00:48:33.427537 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2769 00:48:33.430870 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2770 00:48:33.437328 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2771 00:48:33.440799 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2772 00:48:33.444228 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2773 00:48:33.447436
2774 00:48:33.447945 Write Rank0 MR14 =0x20
2775 00:48:33.456659
2776 00:48:33.460028 CH=1, VrefRange= 0, VrefLevel = 32
2777 00:48:33.462986 TX Bit0 (976~1001) 26 988, Bit8 (969~992) 24 980,
2778 00:48:33.466651 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2779 00:48:33.473447 TX Bit2 (974~997) 24 985, Bit10 (970~993) 24 981,
2780 00:48:33.476643 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2781 00:48:33.479919 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2782 00:48:33.486534 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2783 00:48:33.490032 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2784 00:48:33.493459 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2785 00:48:33.493971
2786 00:48:33.496707
2787 00:48:33.497135 TX Vref found, early break! 366< 369
2788 00:48:33.503339 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2789 00:48:33.506690 u1DelayCellOfst[0]=6 cells (5 PI)
2790 00:48:33.510076 u1DelayCellOfst[1]=5 cells (4 PI)
2791 00:48:33.513355 u1DelayCellOfst[2]=2 cells (2 PI)
2792 00:48:33.516901 u1DelayCellOfst[3]=0 cells (0 PI)
2793 00:48:33.517426 u1DelayCellOfst[4]=3 cells (3 PI)
2794 00:48:33.519841 u1DelayCellOfst[5]=5 cells (4 PI)
2795 00:48:33.523576 u1DelayCellOfst[6]=6 cells (5 PI)
2796 00:48:33.526683 u1DelayCellOfst[7]=3 cells (3 PI)
2797 00:48:33.530171 Byte0, DQ PI dly=983, DQM PI dly= 985
2798 00:48:33.533387 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2799 00:48:33.536598
2800 00:48:33.540145 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2801 00:48:33.540670
2802 00:48:33.543483 u1DelayCellOfst[8]=0 cells (0 PI)
2803 00:48:33.547126 u1DelayCellOfst[9]=0 cells (0 PI)
2804 00:48:33.550421 u1DelayCellOfst[10]=1 cells (1 PI)
2805 00:48:33.550906 u1DelayCellOfst[11]=2 cells (2 PI)
2806 00:48:33.553559 u1DelayCellOfst[12]=2 cells (2 PI)
2807 00:48:33.557052 u1DelayCellOfst[13]=2 cells (2 PI)
2808 00:48:33.559986 u1DelayCellOfst[14]=1 cells (1 PI)
2809 00:48:33.563613 u1DelayCellOfst[15]=0 cells (0 PI)
2810 00:48:33.566687 Byte1, DQ PI dly=980, DQM PI dly= 981
2811 00:48:33.573782 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2812 00:48:33.574335
2813 00:48:33.576939 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2814 00:48:33.577456
2815 00:48:33.580230 Write Rank0 MR14 =0x1a
2816 00:48:33.580665
2817 00:48:33.581004 Final TX Range 0 Vref 26
2818 00:48:33.581538
2819 00:48:33.586681 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2820 00:48:33.587200
2821 00:48:33.593550 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2822 00:48:33.600381 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2823 00:48:33.609728 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2824 00:48:33.610251 Write Rank0 MR3 =0xb0
2825 00:48:33.613493 DramC Write-DBI on
2826 00:48:33.614002 ==
2827 00:48:33.616663 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2828 00:48:33.620413 fsp= 1, odt_onoff= 1, Byte mode= 0
2829 00:48:33.620942 ==
2830 00:48:33.626974 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2831 00:48:33.627485
2832 00:48:33.627824 Begin, DQ Scan Range 701~765
2833 00:48:33.628140
2834 00:48:33.628438
2835 00:48:33.629817 TX Vref Scan disable
2836 00:48:33.633331 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2837 00:48:33.636622 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2838 00:48:33.639827 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2839 00:48:33.643346 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2840 00:48:33.646628 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2841 00:48:33.649976 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2842 00:48:33.653134 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2843 00:48:33.656671 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2844 00:48:33.659954 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2845 00:48:33.662868 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2846 00:48:33.666613 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2847 00:48:33.673186 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2848 00:48:33.676868 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2849 00:48:33.679870 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2850 00:48:33.683115 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2851 00:48:33.686768 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2852 00:48:33.689947 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2853 00:48:33.697837 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2854 00:48:33.701013 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2855 00:48:33.704335 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2856 00:48:33.707454 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2857 00:48:33.710745 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2858 00:48:33.714192 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2859 00:48:33.717597 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2860 00:48:33.720933 Byte0, DQ PI dly=730, DQM PI dly= 730
2861 00:48:33.724421 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2862 00:48:33.724931
2863 00:48:33.730744 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2864 00:48:33.731258
2865 00:48:33.734514 Byte1, DQ PI dly=724, DQM PI dly= 724
2866 00:48:33.737464 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2867 00:48:33.737905
2868 00:48:33.741206 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2869 00:48:33.741723
2870 00:48:33.747474 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2871 00:48:33.754120 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2872 00:48:33.760599 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2873 00:48:33.763921 Write Rank0 MR3 =0x30
2874 00:48:33.767535 DramC Write-DBI off
2875 00:48:33.768045
2876 00:48:33.768380 [DATLAT]
2877 00:48:33.770812 Freq=1600, CH1 RK0, use_rxtx_scan=0
2878 00:48:33.771327
2879 00:48:33.771662 DATLAT Default: 0xf
2880 00:48:33.773973 7, 0xFFFF, sum=0
2881 00:48:33.774435 8, 0xFFFF, sum=0
2882 00:48:33.777498 9, 0xFFFF, sum=0
2883 00:48:33.777936 10, 0xFFFF, sum=0
2884 00:48:33.781040 11, 0xFFFF, sum=0
2885 00:48:33.781709 12, 0xFFFF, sum=0
2886 00:48:33.784283 13, 0xFFFF, sum=0
2887 00:48:33.784718 14, 0x0, sum=1
2888 00:48:33.787474 15, 0x0, sum=2
2889 00:48:33.787997 16, 0x0, sum=3
2890 00:48:33.788346 17, 0x0, sum=4
2891 00:48:33.794264 pattern=2 first_step=14 total pass=5 best_step=16
2892 00:48:33.794798 ==
2893 00:48:33.797399 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2894 00:48:33.800801 fsp= 1, odt_onoff= 1, Byte mode= 0
2895 00:48:33.801438 ==
2896 00:48:33.807220 Start DQ dly to find pass range UseTestEngine =1
2897 00:48:33.810603 x-axis: bit #, y-axis: DQ dly (-127~63)
2898 00:48:33.811040 RX Vref Scan = 1
2899 00:48:33.926606
2900 00:48:33.927129 RX Vref found, early break!
2901 00:48:33.927475
2902 00:48:33.933183 Final RX Vref 12, apply to both rank0 and 1
2903 00:48:33.933703 ==
2904 00:48:33.936503 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2905 00:48:33.939748 fsp= 1, odt_onoff= 1, Byte mode= 0
2906 00:48:33.940268 ==
2907 00:48:33.940611 DQS Delay:
2908 00:48:33.943097 DQS0 = 0, DQS1 = 0
2909 00:48:33.943532 DQM Delay:
2910 00:48:33.946524 DQM0 = 20, DQM1 = 18
2911 00:48:33.947040 DQ Delay:
2912 00:48:33.949913 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =14
2913 00:48:33.953138 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19
2914 00:48:33.956891 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2915 00:48:33.959826 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2916 00:48:33.960353
2917 00:48:33.960688
2918 00:48:33.960999
2919 00:48:33.963381 [DramC_TX_OE_Calibration] TA2
2920 00:48:33.966591 Original DQ_B0 (3 6) =30, OEN = 27
2921 00:48:33.970142 Original DQ_B1 (3 6) =30, OEN = 27
2922 00:48:33.973619 23, 0x0, End_B0=23 End_B1=23
2923 00:48:33.974148 24, 0x0, End_B0=24 End_B1=24
2924 00:48:33.976689 25, 0x0, End_B0=25 End_B1=25
2925 00:48:33.979626 26, 0x0, End_B0=26 End_B1=26
2926 00:48:33.983127 27, 0x0, End_B0=27 End_B1=27
2927 00:48:33.983660 28, 0x0, End_B0=28 End_B1=28
2928 00:48:33.986679 29, 0x0, End_B0=29 End_B1=29
2929 00:48:33.989950 30, 0x0, End_B0=30 End_B1=30
2930 00:48:33.993002 31, 0xFFFF, End_B0=30 End_B1=30
2931 00:48:33.996451 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2932 00:48:34.003341 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2933 00:48:34.003874
2934 00:48:34.004318
2935 00:48:34.006387 Write Rank0 MR23 =0x3f
2936 00:48:34.006835 [DQSOSC]
2937 00:48:34.013468 [DQSOSCAuto] RK0, (LSB)MR18= 0xa0, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2938 00:48:34.019898 CH1_RK0: MR19=0x3, MR18=0xA0, DQSOSC=339, MR23=63, INC=21, DEC=32
2939 00:48:34.023441 Write Rank0 MR23 =0x3f
2940 00:48:34.023980 [DQSOSC]
2941 00:48:34.029743 [DQSOSCAuto] RK0, (LSB)MR18= 0xa1, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2942 00:48:34.033546 CH1 RK0: MR19=3, MR18=A1
2943 00:48:34.036743 [RankSwap] Rank num 2, (Multi 1), Rank 1
2944 00:48:34.040259 Write Rank0 MR2 =0xad
2945 00:48:34.040791 [Write Leveling]
2946 00:48:34.043144 delay byte0 byte1 byte2 byte3
2947 00:48:34.043589
2948 00:48:34.044028 10 0 0
2949 00:48:34.046652 11 0 0
2950 00:48:34.047191 12 0 0
2951 00:48:34.050163 13 0 0
2952 00:48:34.050754 14 0 0
2953 00:48:34.051208 15 0 0
2954 00:48:34.053551 16 0 0
2955 00:48:34.054002 17 0 0
2956 00:48:34.056585 18 0 0
2957 00:48:34.057037 19 0 0
2958 00:48:34.060118 20 0 0
2959 00:48:34.060573 21 0 0
2960 00:48:34.061024 22 0 0
2961 00:48:34.063376 23 0 0
2962 00:48:34.063915 24 0 0
2963 00:48:34.066840 25 0 0
2964 00:48:34.067378 26 0 0
2965 00:48:34.067838 27 0 0
2966 00:48:34.070403 28 0 0
2967 00:48:34.070944 29 0 0
2968 00:48:34.073504 30 0 0
2969 00:48:34.074045 31 0 ff
2970 00:48:34.076910 32 0 0
2971 00:48:34.077451 33 0 ff
2972 00:48:34.077909 34 0 ff
2973 00:48:34.080176 35 0 ff
2974 00:48:34.080718 36 0 ff
2975 00:48:34.083405 37 0 ff
2976 00:48:34.083860 38 ff ff
2977 00:48:34.086761 39 ff ff
2978 00:48:34.087202 40 ff ff
2979 00:48:34.089768 41 ff ff
2980 00:48:34.090208 42 ff ff
2981 00:48:34.093588 43 ff ff
2982 00:48:34.094114 44 ff ff
2983 00:48:34.096802 pass bytecount = 0xff (0xff: all bytes pass)
2984 00:48:34.097325
2985 00:48:34.100292 DQS0 dly: 38
2986 00:48:34.100824 DQS1 dly: 33
2987 00:48:34.103357 Write Rank0 MR2 =0x2d
2988 00:48:34.106588 [RankSwap] Rank num 2, (Multi 1), Rank 0
2989 00:48:34.107023 Write Rank1 MR1 =0xd6
2990 00:48:34.110258 [Gating]
2991 00:48:34.110779 ==
2992 00:48:34.113106 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2993 00:48:34.116767 fsp= 1, odt_onoff= 1, Byte mode= 0
2994 00:48:34.117282 ==
2995 00:48:34.120176 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2996 00:48:34.126772 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2997 00:48:34.130202 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2998 00:48:34.133687 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2999 00:48:34.140382 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3000 00:48:34.143262 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3001 00:48:34.146895 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3002 00:48:34.153598 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3003 00:48:34.156920 3 2 0 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3004 00:48:34.160340 3 2 4 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
3005 00:48:34.163563 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3006 00:48:34.170411 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3007 00:48:34.173829 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3008 00:48:34.177235 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3009 00:48:34.183890 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3010 00:48:34.186992 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3011 00:48:34.190275 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3012 00:48:34.193629 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3013 00:48:34.200372 3 3 8 |808 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3014 00:48:34.203826 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3015 00:48:34.206807 [Byte 0] Lead/lag Transition tap number (1)
3016 00:48:34.213697 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3017 00:48:34.217341 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3018 00:48:34.220330 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3019 00:48:34.227131 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3020 00:48:34.230574 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3021 00:48:34.233929 3 4 4 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
3022 00:48:34.237182 3 4 8 |3d3d c0c |(11 11)(11 11) |(1 1)(1 1)| 0
3023 00:48:34.243503 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3024 00:48:34.247389 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3025 00:48:34.250446 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3026 00:48:34.256966 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3027 00:48:34.260114 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3028 00:48:34.263729 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3029 00:48:34.266796 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3030 00:48:34.273982 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3031 00:48:34.276983 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3032 00:48:34.280100 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3033 00:48:34.287030 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3034 00:48:34.290444 [Byte 0] Lead/lag falling Transition (3, 5, 20)
3035 00:48:34.293901 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3036 00:48:34.297189 [Byte 0] Lead/lag Transition tap number (2)
3037 00:48:34.303826 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3038 00:48:34.307181 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3039 00:48:34.310781 3 6 0 |807 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3040 00:48:34.313926 [Byte 1] Lead/lag Transition tap number (3)
3041 00:48:34.320686 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3042 00:48:34.321231 [Byte 0]First pass (3, 6, 4)
3043 00:48:34.327184 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3044 00:48:34.327769 [Byte 1]First pass (3, 6, 8)
3045 00:48:34.333859 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3046 00:48:34.337095 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3047 00:48:34.340396 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3048 00:48:34.343840 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3049 00:48:34.350300 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3050 00:48:34.353859 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3051 00:48:34.357082 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3052 00:48:34.360573 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3053 00:48:34.364006 All bytes gating window > 1UI, Early break!
3054 00:48:34.364547
3055 00:48:34.367086 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
3056 00:48:34.367607
3057 00:48:34.370655 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
3058 00:48:34.373950
3059 00:48:34.374669
3060 00:48:34.375140
3061 00:48:34.377183 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3062 00:48:34.377706
3063 00:48:34.380365 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3064 00:48:34.380806
3065 00:48:34.381143
3066 00:48:34.383825 Write Rank1 MR1 =0x56
3067 00:48:34.384347
3068 00:48:34.387027 best RODT dly(2T, 0.5T) = (2, 2)
3069 00:48:34.387464
3070 00:48:34.390256 best RODT dly(2T, 0.5T) = (2, 2)
3071 00:48:34.390696 ==
3072 00:48:34.393677 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3073 00:48:34.397176 fsp= 1, odt_onoff= 1, Byte mode= 0
3074 00:48:34.397706 ==
3075 00:48:34.400748 Start DQ dly to find pass range UseTestEngine =0
3076 00:48:34.407336 x-axis: bit #, y-axis: DQ dly (-127~63)
3077 00:48:34.407866 RX Vref Scan = 0
3078 00:48:34.410596 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3079 00:48:34.413856 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3080 00:48:34.417267 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3081 00:48:34.417796 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3082 00:48:34.420636 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3083 00:48:34.423858 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3084 00:48:34.427709 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3085 00:48:34.430642 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3086 00:48:34.433809 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3087 00:48:34.437366 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3088 00:48:34.440884 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3089 00:48:34.441415 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3090 00:48:34.443972 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3091 00:48:34.447181 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3092 00:48:34.450927 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3093 00:48:34.453913 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3094 00:48:34.457167 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3095 00:48:34.460608 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3096 00:48:34.464181 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3097 00:48:34.464725 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3098 00:48:34.467537 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3099 00:48:34.470467 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3100 00:48:34.473844 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3101 00:48:34.477222 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3102 00:48:34.480717 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3103 00:48:34.484055 -1, [0] xxooxxxx xxxxxxxo [MSB]
3104 00:48:34.484518 0, [0] xxooxxxx xxoxxxxo [MSB]
3105 00:48:34.487332 1, [0] xxooxxxo oxoxxxxo [MSB]
3106 00:48:34.490841 2, [0] xxoooxxo oooxxxxo [MSB]
3107 00:48:34.493967 3, [0] xxoooxxo oooxxxoo [MSB]
3108 00:48:34.497365 4, [0] xxoooxxo ooooxxoo [MSB]
3109 00:48:34.500632 5, [0] xxoooxxo ooooxooo [MSB]
3110 00:48:34.501169 33, [0] oooxoooo oooooooo [MSB]
3111 00:48:34.504295 34, [0] oooxoooo ooooooox [MSB]
3112 00:48:34.507253 35, [0] ooxxoooo ooooooox [MSB]
3113 00:48:34.510581 36, [0] ooxxoooo oxooooox [MSB]
3114 00:48:34.514243 37, [0] ooxxoooo xxxxooox [MSB]
3115 00:48:34.517178 38, [0] ooxxoooo xxxxooox [MSB]
3116 00:48:34.520828 39, [0] ooxxxoox xxxxoxxx [MSB]
3117 00:48:34.521446 40, [0] ooxxxoox xxxxoxxx [MSB]
3118 00:48:34.524271 41, [0] ooxxxoox xxxxxxxx [MSB]
3119 00:48:34.527543 42, [0] ooxxxxox xxxxxxxx [MSB]
3120 00:48:34.531002 43, [0] oxxxxxxx xxxxxxxx [MSB]
3121 00:48:34.533971 44, [0] xxxxxxxx xxxxxxxx [MSB]
3122 00:48:34.537517 iDelay=44, Bit 0, Center 24 (6 ~ 43) 38
3123 00:48:34.540983 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3124 00:48:34.544014 iDelay=44, Bit 2, Center 16 (-1 ~ 34) 36
3125 00:48:34.547822 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
3126 00:48:34.550926 iDelay=44, Bit 4, Center 20 (2 ~ 38) 37
3127 00:48:34.554360 iDelay=44, Bit 5, Center 23 (6 ~ 41) 36
3128 00:48:34.557494 iDelay=44, Bit 6, Center 24 (6 ~ 42) 37
3129 00:48:34.560843 iDelay=44, Bit 7, Center 19 (1 ~ 38) 38
3130 00:48:34.564116 iDelay=44, Bit 8, Center 18 (1 ~ 36) 36
3131 00:48:34.567771 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3132 00:48:34.571132 iDelay=44, Bit 10, Center 18 (0 ~ 36) 37
3133 00:48:34.577622 iDelay=44, Bit 11, Center 20 (4 ~ 36) 33
3134 00:48:34.580832 iDelay=44, Bit 12, Center 23 (6 ~ 40) 35
3135 00:48:34.584388 iDelay=44, Bit 13, Center 21 (5 ~ 38) 34
3136 00:48:34.587272 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
3137 00:48:34.590764 iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36
3138 00:48:34.591206 ==
3139 00:48:34.594309 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3140 00:48:34.597572 fsp= 1, odt_onoff= 1, Byte mode= 0
3141 00:48:34.601256 ==
3142 00:48:34.601789 DQS Delay:
3143 00:48:34.602133 DQS0 = 0, DQS1 = 0
3144 00:48:34.604297 DQM Delay:
3145 00:48:34.604734 DQM0 = 20, DQM1 = 19
3146 00:48:34.605073 DQ Delay:
3147 00:48:34.607567 DQ0 =24, DQ1 =24, DQ2 =16, DQ3 =15
3148 00:48:34.610900 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =19
3149 00:48:34.614189 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =20
3150 00:48:34.617693 DQ12 =23, DQ13 =21, DQ14 =20, DQ15 =15
3151 00:48:34.618203
3152 00:48:34.618592
3153 00:48:34.621121 DramC Write-DBI off
3154 00:48:34.621637 ==
3155 00:48:34.627717 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3156 00:48:34.631135 fsp= 1, odt_onoff= 1, Byte mode= 0
3157 00:48:34.631649 ==
3158 00:48:34.634468 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3159 00:48:34.634990
3160 00:48:34.637783 Begin, DQ Scan Range 929~1185
3161 00:48:34.638352
3162 00:48:34.638696
3163 00:48:34.639007 TX Vref Scan disable
3164 00:48:34.644765 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3165 00:48:34.647818 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3166 00:48:34.651087 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3167 00:48:34.654460 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3168 00:48:34.657529 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3169 00:48:34.661187 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3170 00:48:34.664199 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3171 00:48:34.667747 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3172 00:48:34.671087 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3173 00:48:34.674396 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3174 00:48:34.677874 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3175 00:48:34.680823 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3176 00:48:34.684331 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3177 00:48:34.687665 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3178 00:48:34.690880 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3179 00:48:34.694482 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3180 00:48:34.697951 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3181 00:48:34.701563 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3182 00:48:34.707653 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3183 00:48:34.711233 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3184 00:48:34.714832 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3185 00:48:34.718087 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3186 00:48:34.721232 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3187 00:48:34.724555 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3188 00:48:34.728096 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3189 00:48:34.731999 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3190 00:48:34.734814 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3191 00:48:34.738376 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3192 00:48:34.741176 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3193 00:48:34.744502 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3194 00:48:34.748351 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3195 00:48:34.751533 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3196 00:48:34.754425 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3197 00:48:34.757811 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3198 00:48:34.761398 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3199 00:48:34.764672 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3200 00:48:34.768162 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3201 00:48:34.771611 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3202 00:48:34.774560 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3203 00:48:34.781184 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3204 00:48:34.784438 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
3205 00:48:34.787835 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3206 00:48:34.791274 971 |3 6 11|[0] xxxxxxxx oooxxxoo [MSB]
3207 00:48:34.794556 972 |3 6 12|[0] xxxxxxxx ooooxooo [MSB]
3208 00:48:34.798317 973 |3 6 13|[0] xxxxxxxx ooooxooo [MSB]
3209 00:48:34.801422 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3210 00:48:34.804664 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3211 00:48:34.808116 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3212 00:48:34.815432 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3213 00:48:34.818825 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3214 00:48:34.822339 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3215 00:48:34.825013 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3216 00:48:34.828569 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3217 00:48:34.832227 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3218 00:48:34.835431 998 |3 6 38|[0] ooxxoooo xxxxxxxx [MSB]
3219 00:48:34.838856 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3220 00:48:34.841822 Byte0, DQ PI dly=986, DQM PI dly= 986
3221 00:48:34.845373 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3222 00:48:34.845825
3223 00:48:34.852254 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3224 00:48:34.852770
3225 00:48:34.855226 Byte1, DQ PI dly=981, DQM PI dly= 981
3226 00:48:34.858495 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3227 00:48:34.858931
3228 00:48:34.862161 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3229 00:48:34.862744
3230 00:48:34.863087 ==
3231 00:48:34.868805 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3232 00:48:34.872091 fsp= 1, odt_onoff= 1, Byte mode= 0
3233 00:48:34.872525 ==
3234 00:48:34.875532 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3235 00:48:34.876050
3236 00:48:34.879047 Begin, DQ Scan Range 957~1021
3237 00:48:34.882018 Write Rank1 MR14 =0x0
3238 00:48:34.889446
3239 00:48:34.889980 CH=1, VrefRange= 0, VrefLevel = 0
3240 00:48:34.896014 TX Bit0 (980~998) 19 989, Bit8 (972~990) 19 981,
3241 00:48:34.899198 TX Bit1 (978~997) 20 987, Bit9 (972~990) 19 981,
3242 00:48:34.906052 TX Bit2 (976~993) 18 984, Bit10 (974~988) 15 981,
3243 00:48:34.909290 TX Bit3 (976~991) 16 983, Bit11 (975~991) 17 983,
3244 00:48:34.912676 TX Bit4 (977~995) 19 986, Bit12 (976~992) 17 984,
3245 00:48:34.919396 TX Bit5 (980~998) 19 989, Bit13 (976~990) 15 983,
3246 00:48:34.922709 TX Bit6 (980~999) 20 989, Bit14 (975~990) 16 982,
3247 00:48:34.926274 TX Bit7 (978~996) 19 987, Bit15 (970~988) 19 979,
3248 00:48:34.926795
3249 00:48:34.928939 Write Rank1 MR14 =0x2
3250 00:48:34.938122
3251 00:48:34.938667 CH=1, VrefRange= 0, VrefLevel = 2
3252 00:48:34.945019 TX Bit0 (980~999) 20 989, Bit8 (972~990) 19 981,
3253 00:48:34.948191 TX Bit1 (978~998) 21 988, Bit9 (972~990) 19 981,
3254 00:48:34.951930 TX Bit2 (976~993) 18 984, Bit10 (973~989) 17 981,
3255 00:48:34.958461 TX Bit3 (975~992) 18 983, Bit11 (975~992) 18 983,
3256 00:48:34.961669 TX Bit4 (977~995) 19 986, Bit12 (976~992) 17 984,
3257 00:48:34.968667 TX Bit5 (979~998) 20 988, Bit13 (975~990) 16 982,
3258 00:48:34.971834 TX Bit6 (979~999) 21 989, Bit14 (974~991) 18 982,
3259 00:48:34.975093 TX Bit7 (978~996) 19 987, Bit15 (970~988) 19 979,
3260 00:48:34.975609
3261 00:48:34.978524 Write Rank1 MR14 =0x4
3262 00:48:34.986843
3263 00:48:34.987351 CH=1, VrefRange= 0, VrefLevel = 4
3264 00:48:34.993433 TX Bit0 (979~999) 21 989, Bit8 (971~991) 21 981,
3265 00:48:34.996875 TX Bit1 (978~998) 21 988, Bit9 (972~990) 19 981,
3266 00:48:35.003430 TX Bit2 (976~994) 19 985, Bit10 (972~989) 18 980,
3267 00:48:35.006745 TX Bit3 (975~993) 19 984, Bit11 (974~992) 19 983,
3268 00:48:35.009880 TX Bit4 (977~996) 20 986, Bit12 (975~992) 18 983,
3269 00:48:35.017010 TX Bit5 (979~999) 21 989, Bit13 (974~991) 18 982,
3270 00:48:35.020234 TX Bit6 (979~999) 21 989, Bit14 (974~991) 18 982,
3271 00:48:35.023333 TX Bit7 (977~997) 21 987, Bit15 (969~988) 20 978,
3272 00:48:35.023849
3273 00:48:35.026885 Write Rank1 MR14 =0x6
3274 00:48:35.035100
3275 00:48:35.035604 CH=1, VrefRange= 0, VrefLevel = 6
3276 00:48:35.041922 TX Bit0 (978~999) 22 988, Bit8 (971~991) 21 981,
3277 00:48:35.045359 TX Bit1 (977~998) 22 987, Bit9 (971~991) 21 981,
3278 00:48:35.052081 TX Bit2 (975~994) 20 984, Bit10 (973~990) 18 981,
3279 00:48:35.055218 TX Bit3 (975~993) 19 984, Bit11 (974~992) 19 983,
3280 00:48:35.058423 TX Bit4 (977~997) 21 987, Bit12 (975~992) 18 983,
3281 00:48:35.065402 TX Bit5 (978~999) 22 988, Bit13 (974~991) 18 982,
3282 00:48:35.068935 TX Bit6 (978~999) 22 988, Bit14 (973~991) 19 982,
3283 00:48:35.072240 TX Bit7 (977~997) 21 987, Bit15 (969~989) 21 979,
3284 00:48:35.072759
3285 00:48:35.075683 Write Rank1 MR14 =0x8
3286 00:48:35.084392
3287 00:48:35.084908 CH=1, VrefRange= 0, VrefLevel = 8
3288 00:48:35.090785 TX Bit0 (978~999) 22 988, Bit8 (971~991) 21 981,
3289 00:48:35.094117 TX Bit1 (977~999) 23 988, Bit9 (971~991) 21 981,
3290 00:48:35.100918 TX Bit2 (975~995) 21 985, Bit10 (972~991) 20 981,
3291 00:48:35.104236 TX Bit3 (975~993) 19 984, Bit11 (974~992) 19 983,
3292 00:48:35.107259 TX Bit4 (976~997) 22 986, Bit12 (975~992) 18 983,
3293 00:48:35.114288 TX Bit5 (978~999) 22 988, Bit13 (974~991) 18 982,
3294 00:48:35.117700 TX Bit6 (978~1000) 23 989, Bit14 (973~991) 19 982,
3295 00:48:35.120840 TX Bit7 (977~997) 21 987, Bit15 (969~990) 22 979,
3296 00:48:35.121359
3297 00:48:35.124186 Write Rank1 MR14 =0xa
3298 00:48:35.133070
3299 00:48:35.136323 CH=1, VrefRange= 0, VrefLevel = 10
3300 00:48:35.139799 TX Bit0 (978~1000) 23 989, Bit8 (970~992) 23 981,
3301 00:48:35.142760 TX Bit1 (977~998) 22 987, Bit9 (970~991) 22 980,
3302 00:48:35.150186 TX Bit2 (975~996) 22 985, Bit10 (972~991) 20 981,
3303 00:48:35.153028 TX Bit3 (974~994) 21 984, Bit11 (973~992) 20 982,
3304 00:48:35.156491 TX Bit4 (976~997) 22 986, Bit12 (975~993) 19 984,
3305 00:48:35.163218 TX Bit5 (978~1000) 23 989, Bit13 (974~992) 19 983,
3306 00:48:35.166925 TX Bit6 (977~1000) 24 988, Bit14 (973~992) 20 982,
3307 00:48:35.170092 TX Bit7 (977~997) 21 987, Bit15 (969~991) 23 980,
3308 00:48:35.170644
3309 00:48:35.173038 Write Rank1 MR14 =0xc
3310 00:48:35.182355
3311 00:48:35.185668 CH=1, VrefRange= 0, VrefLevel = 12
3312 00:48:35.189172 TX Bit0 (977~1001) 25 989, Bit8 (970~992) 23 981,
3313 00:48:35.192404 TX Bit1 (977~999) 23 988, Bit9 (970~991) 22 980,
3314 00:48:35.198756 TX Bit2 (975~996) 22 985, Bit10 (971~991) 21 981,
3315 00:48:35.202164 TX Bit3 (974~995) 22 984, Bit11 (972~993) 22 982,
3316 00:48:35.205719 TX Bit4 (976~997) 22 986, Bit12 (974~993) 20 983,
3317 00:48:35.212430 TX Bit5 (977~1000) 24 988, Bit13 (973~992) 20 982,
3318 00:48:35.215437 TX Bit6 (977~1000) 24 988, Bit14 (972~992) 21 982,
3319 00:48:35.218843 TX Bit7 (977~998) 22 987, Bit15 (969~991) 23 980,
3320 00:48:35.222325
3321 00:48:35.222838 Write Rank1 MR14 =0xe
3322 00:48:35.231624
3323 00:48:35.235163 CH=1, VrefRange= 0, VrefLevel = 14
3324 00:48:35.238304 TX Bit0 (977~1001) 25 989, Bit8 (970~992) 23 981,
3325 00:48:35.241308 TX Bit1 (977~999) 23 988, Bit9 (970~992) 23 981,
3326 00:48:35.248405 TX Bit2 (975~997) 23 986, Bit10 (971~992) 22 981,
3327 00:48:35.251530 TX Bit3 (974~996) 23 985, Bit11 (972~993) 22 982,
3328 00:48:35.254977 TX Bit4 (976~998) 23 987, Bit12 (974~993) 20 983,
3329 00:48:35.261856 TX Bit5 (977~1000) 24 988, Bit13 (972~992) 21 982,
3330 00:48:35.264858 TX Bit6 (977~1001) 25 989, Bit14 (972~992) 21 982,
3331 00:48:35.268185 TX Bit7 (977~998) 22 987, Bit15 (969~991) 23 980,
3332 00:48:35.271390
3333 00:48:35.271818 Write Rank1 MR14 =0x10
3334 00:48:35.280729
3335 00:48:35.281161 CH=1, VrefRange= 0, VrefLevel = 16
3336 00:48:35.287411 TX Bit0 (977~1001) 25 989, Bit8 (970~992) 23 981,
3337 00:48:35.290652 TX Bit1 (977~999) 23 988, Bit9 (970~992) 23 981,
3338 00:48:35.297522 TX Bit2 (975~997) 23 986, Bit10 (971~992) 22 981,
3339 00:48:35.301082 TX Bit3 (973~996) 24 984, Bit11 (972~993) 22 982,
3340 00:48:35.304333 TX Bit4 (976~998) 23 987, Bit12 (973~994) 22 983,
3341 00:48:35.310645 TX Bit5 (977~1001) 25 989, Bit13 (972~992) 21 982,
3342 00:48:35.314135 TX Bit6 (977~1001) 25 989, Bit14 (971~992) 22 981,
3343 00:48:35.317370 TX Bit7 (977~998) 22 987, Bit15 (969~991) 23 980,
3344 00:48:35.320744
3345 00:48:35.321124 Write Rank1 MR14 =0x12
3346 00:48:35.330605
3347 00:48:35.333963 CH=1, VrefRange= 0, VrefLevel = 18
3348 00:48:35.337207 TX Bit0 (977~1002) 26 989, Bit8 (970~992) 23 981,
3349 00:48:35.340399 TX Bit1 (976~1000) 25 988, Bit9 (970~992) 23 981,
3350 00:48:35.347196 TX Bit2 (975~997) 23 986, Bit10 (971~992) 22 981,
3351 00:48:35.350308 TX Bit3 (973~997) 25 985, Bit11 (971~994) 24 982,
3352 00:48:35.353901 TX Bit4 (975~998) 24 986, Bit12 (973~994) 22 983,
3353 00:48:35.360810 TX Bit5 (977~1001) 25 989, Bit13 (972~993) 22 982,
3354 00:48:35.363950 TX Bit6 (977~1001) 25 989, Bit14 (971~993) 23 982,
3355 00:48:35.367380 TX Bit7 (976~998) 23 987, Bit15 (968~991) 24 979,
3356 00:48:35.370818
3357 00:48:35.371334 Write Rank1 MR14 =0x14
3358 00:48:35.380085
3359 00:48:35.383108 CH=1, VrefRange= 0, VrefLevel = 20
3360 00:48:35.386819 TX Bit0 (977~1002) 26 989, Bit8 (970~993) 24 981,
3361 00:48:35.390584 TX Bit1 (976~1000) 25 988, Bit9 (970~992) 23 981,
3362 00:48:35.396740 TX Bit2 (974~998) 25 986, Bit10 (970~992) 23 981,
3363 00:48:35.400298 TX Bit3 (973~997) 25 985, Bit11 (971~994) 24 982,
3364 00:48:35.403617 TX Bit4 (975~998) 24 986, Bit12 (973~994) 22 983,
3365 00:48:35.410154 TX Bit5 (977~1001) 25 989, Bit13 (971~993) 23 982,
3366 00:48:35.413621 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3367 00:48:35.420219 TX Bit7 (976~999) 24 987, Bit15 (968~991) 24 979,
3368 00:48:35.420733
3369 00:48:35.421070 Write Rank1 MR14 =0x16
3370 00:48:35.429957
3371 00:48:35.433622 CH=1, VrefRange= 0, VrefLevel = 22
3372 00:48:35.436801 TX Bit0 (977~1003) 27 990, Bit8 (970~993) 24 981,
3373 00:48:35.439932 TX Bit1 (976~1000) 25 988, Bit9 (970~992) 23 981,
3374 00:48:35.446517 TX Bit2 (974~998) 25 986, Bit10 (970~992) 23 981,
3375 00:48:35.450296 TX Bit3 (973~997) 25 985, Bit11 (971~994) 24 982,
3376 00:48:35.453435 TX Bit4 (975~998) 24 986, Bit12 (972~994) 23 983,
3377 00:48:35.460250 TX Bit5 (977~1001) 25 989, Bit13 (971~993) 23 982,
3378 00:48:35.463473 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3379 00:48:35.466617 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3380 00:48:35.470134
3381 00:48:35.470844 Write Rank1 MR14 =0x18
3382 00:48:35.479806
3383 00:48:35.482978 CH=1, VrefRange= 0, VrefLevel = 24
3384 00:48:35.486623 TX Bit0 (977~1002) 26 989, Bit8 (969~993) 25 981,
3385 00:48:35.489564 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
3386 00:48:35.495993 TX Bit2 (973~998) 26 985, Bit10 (970~993) 24 981,
3387 00:48:35.499465 TX Bit3 (972~997) 26 984, Bit11 (971~994) 24 982,
3388 00:48:35.502852 TX Bit4 (975~999) 25 987, Bit12 (972~994) 23 983,
3389 00:48:35.509656 TX Bit5 (976~1002) 27 989, Bit13 (971~993) 23 982,
3390 00:48:35.512534 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3391 00:48:35.519523 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3392 00:48:35.520044
3393 00:48:35.520383 Write Rank1 MR14 =0x1a
3394 00:48:35.529251
3395 00:48:35.532208 CH=1, VrefRange= 0, VrefLevel = 26
3396 00:48:35.535766 TX Bit0 (977~1002) 26 989, Bit8 (969~993) 25 981,
3397 00:48:35.539137 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
3398 00:48:35.545469 TX Bit2 (973~998) 26 985, Bit10 (970~993) 24 981,
3399 00:48:35.549204 TX Bit3 (972~997) 26 984, Bit11 (971~994) 24 982,
3400 00:48:35.552589 TX Bit4 (975~999) 25 987, Bit12 (972~994) 23 983,
3401 00:48:35.558978 TX Bit5 (976~1002) 27 989, Bit13 (971~993) 23 982,
3402 00:48:35.562612 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3403 00:48:35.569162 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3404 00:48:35.569675
3405 00:48:35.570015 Write Rank1 MR14 =0x1c
3406 00:48:35.578523
3407 00:48:35.581948 CH=1, VrefRange= 0, VrefLevel = 28
3408 00:48:35.585343 TX Bit0 (977~1002) 26 989, Bit8 (969~993) 25 981,
3409 00:48:35.588814 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
3410 00:48:35.595380 TX Bit2 (973~998) 26 985, Bit10 (970~993) 24 981,
3411 00:48:35.598741 TX Bit3 (972~997) 26 984, Bit11 (971~994) 24 982,
3412 00:48:35.602193 TX Bit4 (975~999) 25 987, Bit12 (972~994) 23 983,
3413 00:48:35.609015 TX Bit5 (976~1002) 27 989, Bit13 (971~993) 23 982,
3414 00:48:35.612032 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3415 00:48:35.615406 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3416 00:48:35.619008
3417 00:48:35.619519 Write Rank1 MR14 =0x1e
3418 00:48:35.628561
3419 00:48:35.631590 CH=1, VrefRange= 0, VrefLevel = 30
3420 00:48:35.635227 TX Bit0 (977~1002) 26 989, Bit8 (969~993) 25 981,
3421 00:48:35.638110 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
3422 00:48:35.645116 TX Bit2 (973~998) 26 985, Bit10 (970~993) 24 981,
3423 00:48:35.648100 TX Bit3 (972~997) 26 984, Bit11 (971~994) 24 982,
3424 00:48:35.651576 TX Bit4 (975~999) 25 987, Bit12 (972~994) 23 983,
3425 00:48:35.658549 TX Bit5 (976~1002) 27 989, Bit13 (971~993) 23 982,
3426 00:48:35.661481 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3427 00:48:35.667940 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3428 00:48:35.668421
3429 00:48:35.668764 Write Rank1 MR14 =0x20
3430 00:48:35.678322
3431 00:48:35.678837 CH=1, VrefRange= 0, VrefLevel = 32
3432 00:48:35.684710 TX Bit0 (977~1002) 26 989, Bit8 (969~993) 25 981,
3433 00:48:35.687979 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
3434 00:48:35.694586 TX Bit2 (973~998) 26 985, Bit10 (970~993) 24 981,
3435 00:48:35.697756 TX Bit3 (972~997) 26 984, Bit11 (971~994) 24 982,
3436 00:48:35.701198 TX Bit4 (975~999) 25 987, Bit12 (972~994) 23 983,
3437 00:48:35.707952 TX Bit5 (976~1002) 27 989, Bit13 (971~993) 23 982,
3438 00:48:35.711267 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3439 00:48:35.717740 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3440 00:48:35.718178
3441 00:48:35.718576 Write Rank1 MR14 =0x22
3442 00:48:35.727484
3443 00:48:35.727988 CH=1, VrefRange= 0, VrefLevel = 34
3444 00:48:35.734375 TX Bit0 (977~1002) 26 989, Bit8 (969~993) 25 981,
3445 00:48:35.737135 TX Bit1 (976~1000) 25 988, Bit9 (969~993) 25 981,
3446 00:48:35.744276 TX Bit2 (973~998) 26 985, Bit10 (970~993) 24 981,
3447 00:48:35.747621 TX Bit3 (972~997) 26 984, Bit11 (971~994) 24 982,
3448 00:48:35.750811 TX Bit4 (975~999) 25 987, Bit12 (972~994) 23 983,
3449 00:48:35.757890 TX Bit5 (976~1002) 27 989, Bit13 (971~993) 23 982,
3450 00:48:35.761056 TX Bit6 (977~1002) 26 989, Bit14 (971~993) 23 982,
3451 00:48:35.764180 TX Bit7 (976~999) 24 987, Bit15 (968~992) 25 980,
3452 00:48:35.767667
3453 00:48:35.768099
3454 00:48:35.770752 TX Vref found, early break! 368< 377
3455 00:48:35.774278 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3456 00:48:35.777534 u1DelayCellOfst[0]=6 cells (5 PI)
3457 00:48:35.780687 u1DelayCellOfst[1]=5 cells (4 PI)
3458 00:48:35.784189 u1DelayCellOfst[2]=1 cells (1 PI)
3459 00:48:35.787487 u1DelayCellOfst[3]=0 cells (0 PI)
3460 00:48:35.790817 u1DelayCellOfst[4]=3 cells (3 PI)
3461 00:48:35.791256 u1DelayCellOfst[5]=6 cells (5 PI)
3462 00:48:35.794541 u1DelayCellOfst[6]=6 cells (5 PI)
3463 00:48:35.797534 u1DelayCellOfst[7]=3 cells (3 PI)
3464 00:48:35.800682 Byte0, DQ PI dly=984, DQM PI dly= 986
3465 00:48:35.807376 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3466 00:48:35.807814
3467 00:48:35.810730 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3468 00:48:35.811167
3469 00:48:35.814137 u1DelayCellOfst[8]=1 cells (1 PI)
3470 00:48:35.817684 u1DelayCellOfst[9]=1 cells (1 PI)
3471 00:48:35.820924 u1DelayCellOfst[10]=1 cells (1 PI)
3472 00:48:35.824359 u1DelayCellOfst[11]=2 cells (2 PI)
3473 00:48:35.824797 u1DelayCellOfst[12]=3 cells (3 PI)
3474 00:48:35.827637 u1DelayCellOfst[13]=2 cells (2 PI)
3475 00:48:35.831148 u1DelayCellOfst[14]=2 cells (2 PI)
3476 00:48:35.834735 u1DelayCellOfst[15]=0 cells (0 PI)
3477 00:48:35.838002 Byte1, DQ PI dly=980, DQM PI dly= 981
3478 00:48:35.844287 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
3479 00:48:35.844797
3480 00:48:35.847775 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
3481 00:48:35.848214
3482 00:48:35.850975 Write Rank1 MR14 =0x18
3483 00:48:35.851408
3484 00:48:35.851747 Final TX Range 0 Vref 24
3485 00:48:35.852063
3486 00:48:35.857913 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3487 00:48:35.858476
3488 00:48:35.864561 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3489 00:48:35.871448 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3490 00:48:35.878069 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3491 00:48:35.881468 Write Rank1 MR3 =0xb0
3492 00:48:35.884600 DramC Write-DBI on
3493 00:48:35.885120 ==
3494 00:48:35.888118 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3495 00:48:35.891460 fsp= 1, odt_onoff= 1, Byte mode= 0
3496 00:48:35.891992 ==
3497 00:48:35.894600 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3498 00:48:35.895143
3499 00:48:35.897800 Begin, DQ Scan Range 701~765
3500 00:48:35.898271
3501 00:48:35.898770
3502 00:48:35.901338 TX Vref Scan disable
3503 00:48:35.904924 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3504 00:48:35.908181 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3505 00:48:35.911355 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3506 00:48:35.914706 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3507 00:48:35.917993 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3508 00:48:35.921431 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3509 00:48:35.924843 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3510 00:48:35.928346 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3511 00:48:35.931605 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3512 00:48:35.934924 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3513 00:48:35.938148 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3514 00:48:35.941788 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3515 00:48:35.944838 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3516 00:48:35.948464 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3517 00:48:35.951767 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3518 00:48:35.958318 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3519 00:48:35.961823 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3520 00:48:35.964580 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3521 00:48:35.971719 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3522 00:48:35.975541 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3523 00:48:35.978770 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3524 00:48:35.981681 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3525 00:48:35.985211 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3526 00:48:35.988660 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3527 00:48:35.991693 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3528 00:48:35.995142 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3529 00:48:35.998192 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3530 00:48:36.001910 Byte0, DQ PI dly=731, DQM PI dly= 731
3531 00:48:36.005171 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3532 00:48:36.005690
3533 00:48:36.012272 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3534 00:48:36.012793
3535 00:48:36.015124 Byte1, DQ PI dly=724, DQM PI dly= 724
3536 00:48:36.018505 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3537 00:48:36.018941
3538 00:48:36.022159 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3539 00:48:36.022773
3540 00:48:36.028960 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3541 00:48:36.035444 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3542 00:48:36.041855 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3543 00:48:36.045122 Write Rank1 MR3 =0x30
3544 00:48:36.048569 DramC Write-DBI off
3545 00:48:36.048998
3546 00:48:36.049334 [DATLAT]
3547 00:48:36.052136 Freq=1600, CH1 RK1, use_rxtx_scan=0
3548 00:48:36.052659
3549 00:48:36.055365 DATLAT Default: 0x10
3550 00:48:36.055882 7, 0xFFFF, sum=0
3551 00:48:36.056230 8, 0xFFFF, sum=0
3552 00:48:36.058759 9, 0xFFFF, sum=0
3553 00:48:36.059298 10, 0xFFFF, sum=0
3554 00:48:36.061801 11, 0xFFFF, sum=0
3555 00:48:36.062259 12, 0xFFFF, sum=0
3556 00:48:36.065379 13, 0xFFFF, sum=0
3557 00:48:36.065915 14, 0x0, sum=1
3558 00:48:36.068682 15, 0x0, sum=2
3559 00:48:36.069208 16, 0x0, sum=3
3560 00:48:36.071930 17, 0x0, sum=4
3561 00:48:36.075351 pattern=2 first_step=14 total pass=5 best_step=16
3562 00:48:36.075869 ==
3563 00:48:36.078608 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3564 00:48:36.082134 fsp= 1, odt_onoff= 1, Byte mode= 0
3565 00:48:36.082704 ==
3566 00:48:36.088904 Start DQ dly to find pass range UseTestEngine =1
3567 00:48:36.092173 x-axis: bit #, y-axis: DQ dly (-127~63)
3568 00:48:36.092697 RX Vref Scan = 0
3569 00:48:36.095308 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3570 00:48:36.098530 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3571 00:48:36.102423 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3572 00:48:36.105665 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3573 00:48:36.109340 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3574 00:48:36.109865 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3575 00:48:36.112391 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3576 00:48:36.115437 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3577 00:48:36.119163 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3578 00:48:36.122433 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3579 00:48:36.125688 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3580 00:48:36.129136 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3581 00:48:36.132349 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3582 00:48:36.132869 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3583 00:48:36.135677 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3584 00:48:36.139035 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3585 00:48:36.142050 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3586 00:48:36.145367 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3587 00:48:36.149029 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3588 00:48:36.152293 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3589 00:48:36.155467 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3590 00:48:36.155903 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3591 00:48:36.158586 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3592 00:48:36.162513 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3593 00:48:36.165512 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3594 00:48:36.168987 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3595 00:48:36.172359 0, [0] xxooxxxx xxxxxxxo [MSB]
3596 00:48:36.172878 1, [0] xxooxxxx oooxxxxo [MSB]
3597 00:48:36.175612 2, [0] xxooxxxx oooxxxxo [MSB]
3598 00:48:36.179427 3, [0] xxoooxxo ooooxxxo [MSB]
3599 00:48:36.182545 4, [0] xxoooxxo ooooxooo [MSB]
3600 00:48:36.185780 5, [0] xxoooxxo oooooooo [MSB]
3601 00:48:36.189398 6, [0] xooooxxo oooooooo [MSB]
3602 00:48:36.189936 7, [0] xoooooxo oooooooo [MSB]
3603 00:48:36.194195 33, [0] oooxoooo oooooooo [MSB]
3604 00:48:36.197345 34, [0] oooxoooo ooooooox [MSB]
3605 00:48:36.200681 35, [0] ooxxoooo ooooooox [MSB]
3606 00:48:36.204099 36, [0] ooxxoooo ooooooox [MSB]
3607 00:48:36.207191 37, [0] ooxxoooo xxxxooox [MSB]
3608 00:48:36.210704 38, [0] ooxxxooo xxxxooxx [MSB]
3609 00:48:36.211229 39, [0] ooxxxoox xxxxoxxx [MSB]
3610 00:48:36.214022 40, [0] ooxxxoox xxxxxxxx [MSB]
3611 00:48:36.217611 41, [0] ooxxxxox xxxxxxxx [MSB]
3612 00:48:36.220726 42, [0] oxxxxxox xxxxxxxx [MSB]
3613 00:48:36.223942 43, [0] xxxxxxxx xxxxxxxx [MSB]
3614 00:48:36.227375 iDelay=43, Bit 0, Center 25 (8 ~ 42) 35
3615 00:48:36.230942 iDelay=43, Bit 1, Center 23 (6 ~ 41) 36
3616 00:48:36.234521 iDelay=43, Bit 2, Center 17 (0 ~ 34) 35
3617 00:48:36.237697 iDelay=43, Bit 3, Center 15 (-2 ~ 32) 35
3618 00:48:36.240917 iDelay=43, Bit 4, Center 20 (3 ~ 37) 35
3619 00:48:36.244284 iDelay=43, Bit 5, Center 23 (7 ~ 40) 34
3620 00:48:36.247320 iDelay=43, Bit 6, Center 25 (8 ~ 42) 35
3621 00:48:36.250893 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3622 00:48:36.254255 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
3623 00:48:36.257653 iDelay=43, Bit 9, Center 18 (1 ~ 36) 36
3624 00:48:36.264394 iDelay=43, Bit 10, Center 18 (1 ~ 36) 36
3625 00:48:36.267427 iDelay=43, Bit 11, Center 19 (3 ~ 36) 34
3626 00:48:36.270838 iDelay=43, Bit 12, Center 22 (5 ~ 39) 35
3627 00:48:36.274462 iDelay=43, Bit 13, Center 21 (4 ~ 38) 35
3628 00:48:36.277645 iDelay=43, Bit 14, Center 20 (4 ~ 37) 34
3629 00:48:36.280997 iDelay=43, Bit 15, Center 15 (-2 ~ 33) 36
3630 00:48:36.281507 ==
3631 00:48:36.287449 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3632 00:48:36.287958 fsp= 1, odt_onoff= 1, Byte mode= 0
3633 00:48:36.290875 ==
3634 00:48:36.291308 DQS Delay:
3635 00:48:36.291646 DQS0 = 0, DQS1 = 0
3636 00:48:36.294349 DQM Delay:
3637 00:48:36.294871 DQM0 = 21, DQM1 = 18
3638 00:48:36.297464 DQ Delay:
3639 00:48:36.300642 DQ0 =25, DQ1 =23, DQ2 =17, DQ3 =15
3640 00:48:36.301080 DQ4 =20, DQ5 =23, DQ6 =25, DQ7 =20
3641 00:48:36.304413 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3642 00:48:36.307582 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15
3643 00:48:36.308015
3644 00:48:36.310827
3645 00:48:36.311252
3646 00:48:36.311587 [DramC_TX_OE_Calibration] TA2
3647 00:48:36.314473 Original DQ_B0 (3 6) =30, OEN = 27
3648 00:48:36.317966 Original DQ_B1 (3 6) =30, OEN = 27
3649 00:48:36.321487 23, 0x0, End_B0=23 End_B1=23
3650 00:48:36.324834 24, 0x0, End_B0=24 End_B1=24
3651 00:48:36.327769 25, 0x0, End_B0=25 End_B1=25
3652 00:48:36.328290 26, 0x0, End_B0=26 End_B1=26
3653 00:48:36.331135 27, 0x0, End_B0=27 End_B1=27
3654 00:48:36.334584 28, 0x0, End_B0=28 End_B1=28
3655 00:48:36.337882 29, 0x0, End_B0=29 End_B1=29
3656 00:48:36.338427 30, 0x0, End_B0=30 End_B1=30
3657 00:48:36.341400 31, 0xFFFF, End_B0=30 End_B1=30
3658 00:48:36.347748 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3659 00:48:36.354564 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3660 00:48:36.355080
3661 00:48:36.355418
3662 00:48:36.355726 Write Rank1 MR23 =0x3f
3663 00:48:36.357658 [DQSOSC]
3664 00:48:36.364628 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3665 00:48:36.371469 CH1_RK1: MR19=0x3, MR18=0xA6, DQSOSC=337, MR23=63, INC=21, DEC=32
3666 00:48:36.371983 Write Rank1 MR23 =0x3f
3667 00:48:36.372322 [DQSOSC]
3668 00:48:36.381127 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3669 00:48:36.381640 CH1 RK1: MR19=3, MR18=A4
3670 00:48:36.384503 [RxdqsGatingPostProcess] freq 1600
3671 00:48:36.391158 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3672 00:48:36.391677 Rank: 0
3673 00:48:36.394558 best DQS0 dly(2T, 0.5T) = (2, 5)
3674 00:48:36.398139 best DQS1 dly(2T, 0.5T) = (2, 6)
3675 00:48:36.401177 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3676 00:48:36.404732 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3677 00:48:36.405250 Rank: 1
3678 00:48:36.408292 best DQS0 dly(2T, 0.5T) = (2, 5)
3679 00:48:36.410900 best DQS1 dly(2T, 0.5T) = (2, 5)
3680 00:48:36.414542 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3681 00:48:36.418091 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3682 00:48:36.421199 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3683 00:48:36.424619 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3684 00:48:36.431549 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3685 00:48:36.432065
3686 00:48:36.432407
3687 00:48:36.434459 [Calibration Summary] Freqency 1600
3688 00:48:36.434897 CH 0, Rank 0
3689 00:48:36.435239 All Pass.
3690 00:48:36.435630
3691 00:48:36.438187 CH 0, Rank 1
3692 00:48:36.438754 All Pass.
3693 00:48:36.439104
3694 00:48:36.439420 CH 1, Rank 0
3695 00:48:36.441385 All Pass.
3696 00:48:36.441816
3697 00:48:36.442158 CH 1, Rank 1
3698 00:48:36.442535 All Pass.
3699 00:48:36.442846
3700 00:48:36.447626 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3701 00:48:36.458036 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3702 00:48:36.464670 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3703 00:48:36.465186 Write Rank0 MR3 =0xb0
3704 00:48:36.471404 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3705 00:48:36.477884 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3706 00:48:36.484364 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3707 00:48:36.487969 Write Rank1 MR3 =0xb0
3708 00:48:36.494875 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3709 00:48:36.501369 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3710 00:48:36.507895 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3711 00:48:36.511433 Write Rank0 MR3 =0xb0
3712 00:48:36.517606 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3713 00:48:36.524653 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3714 00:48:36.531296 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3715 00:48:36.531814 Write Rank1 MR3 =0xb0
3716 00:48:36.534597 DramC Write-DBI on
3717 00:48:36.538143 [GetDramInforAfterCalByMRR] Vendor 1.
3718 00:48:36.541400 [GetDramInforAfterCalByMRR] Revision 7.
3719 00:48:36.541906 MR8 12
3720 00:48:36.547775 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3721 00:48:36.548215 MR8 12
3722 00:48:36.551841 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3723 00:48:36.554924 MR8 12
3724 00:48:36.558424 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3725 00:48:36.558937 MR8 12
3726 00:48:36.564943 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3727 00:48:36.571377 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3728 00:48:36.574723 Write Rank0 MR13 =0xd0
3729 00:48:36.578021 Write Rank1 MR13 =0xd0
3730 00:48:36.578585 Write Rank0 MR13 =0xd0
3731 00:48:36.581545 Write Rank1 MR13 =0xd0
3732 00:48:36.584944 Save calibration result to emmc
3733 00:48:36.585522
3734 00:48:36.585874
3735 00:48:36.588086 [DramcModeReg_Check] Freq_1600, FSP_1
3736 00:48:36.588603 FSP_1, CH_0, RK0
3737 00:48:36.591522 Write Rank0 MR13 =0xd8
3738 00:48:36.594963 MR12 = 0x56 (global = 0x56) match
3739 00:48:36.598324 MR14 = 0x18 (global = 0x18) match
3740 00:48:36.599078 FSP_1, CH_0, RK1
3741 00:48:36.601376 Write Rank1 MR13 =0xd8
3742 00:48:36.605091 MR12 = 0x56 (global = 0x56) match
3743 00:48:36.608252 MR14 = 0x18 (global = 0x18) match
3744 00:48:36.608777 FSP_1, CH_1, RK0
3745 00:48:36.611377 Write Rank0 MR13 =0xd8
3746 00:48:36.614825 MR12 = 0x56 (global = 0x56) match
3747 00:48:36.618353 MR14 = 0x1a (global = 0x1a) match
3748 00:48:36.618912 FSP_1, CH_1, RK1
3749 00:48:36.621588 Write Rank1 MR13 =0xd8
3750 00:48:36.625133 MR12 = 0x56 (global = 0x56) match
3751 00:48:36.628124 MR14 = 0x18 (global = 0x18) match
3752 00:48:36.628554
3753 00:48:36.631689 [MEM_TEST] 02: After DFS, before run time config
3754 00:48:36.642346 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3755 00:48:36.642837
3756 00:48:36.643178 [TA2_TEST]
3757 00:48:36.643543 === TA2 HW
3758 00:48:36.645801 TA2 PAT: XTALK
3759 00:48:36.649275 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3760 00:48:36.655919 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3761 00:48:36.658993 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3762 00:48:36.662403 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3763 00:48:36.665752
3764 00:48:36.666194
3765 00:48:36.666673 Settings after calibration
3766 00:48:36.667085
3767 00:48:36.669361 [DramcRunTimeConfig]
3768 00:48:36.673033 TransferPLLToSPMControl - MODE SW PHYPLL
3769 00:48:36.673563 TX_TRACKING: ON
3770 00:48:36.676234 RX_TRACKING: ON
3771 00:48:36.676757 HW_GATING: ON
3772 00:48:36.679663 HW_GATING DBG: OFF
3773 00:48:36.680187 ddr_geometry:1
3774 00:48:36.682892 ddr_geometry:1
3775 00:48:36.683413 ddr_geometry:1
3776 00:48:36.683856 ddr_geometry:1
3777 00:48:36.686268 ddr_geometry:1
3778 00:48:36.686714 ddr_geometry:1
3779 00:48:36.689469 ddr_geometry:1
3780 00:48:36.689989 ddr_geometry:1
3781 00:48:36.692918 High Freq DUMMY_READ_FOR_TRACKING: ON
3782 00:48:36.696358 ZQCS_ENABLE_LP4: OFF
3783 00:48:36.696880 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3784 00:48:36.699449 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3785 00:48:36.702597 SPM_CONTROL_AFTERK: ON
3786 00:48:36.706128 IMPEDANCE_TRACKING: ON
3787 00:48:36.706682 TEMP_SENSOR: ON
3788 00:48:36.709263 PER_BANK_REFRESH: ON
3789 00:48:36.709706 HW_SAVE_FOR_SR: ON
3790 00:48:36.712873 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3791 00:48:36.716223 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3792 00:48:36.719929 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3793 00:48:36.722742 Read ODT Tracking: ON
3794 00:48:36.726138 =========================
3795 00:48:36.726694
3796 00:48:36.727040 [TA2_TEST]
3797 00:48:36.727355 === TA2 HW
3798 00:48:36.732885 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3799 00:48:36.736247 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3800 00:48:36.743111 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3801 00:48:36.746037 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3802 00:48:36.746505
3803 00:48:36.749143 [MEM_TEST] 03: After run time config
3804 00:48:36.760355 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3805 00:48:36.763991 [complex_mem_test] start addr:0x40024000, len:131072
3806 00:48:36.967923 1st complex R/W mem test pass
3807 00:48:36.974477 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3808 00:48:36.977761 sync preloader write leveling
3809 00:48:36.980828 sync preloader cbt_mr12
3810 00:48:36.984518 sync preloader cbt_clk_dly
3811 00:48:36.984966 sync preloader cbt_cmd_dly
3812 00:48:36.987671 sync preloader cbt_cs
3813 00:48:36.990918 sync preloader cbt_ca_perbit_delay
3814 00:48:36.991594 sync preloader clk_delay
3815 00:48:36.994161 sync preloader dqs_delay
3816 00:48:36.998187 sync preloader u1Gating2T_Save
3817 00:48:37.001097 sync preloader u1Gating05T_Save
3818 00:48:37.004227 sync preloader u1Gatingfine_tune_Save
3819 00:48:37.007316 sync preloader u1Gatingucpass_count_Save
3820 00:48:37.010687 sync preloader u1TxWindowPerbitVref_Save
3821 00:48:37.014168 sync preloader u1TxCenter_min_Save
3822 00:48:37.017540 sync preloader u1TxCenter_max_Save
3823 00:48:37.020796 sync preloader u1Txwin_center_Save
3824 00:48:37.024410 sync preloader u1Txfirst_pass_Save
3825 00:48:37.027756 sync preloader u1Txlast_pass_Save
3826 00:48:37.028206 sync preloader u1RxDatlat_Save
3827 00:48:37.030875 sync preloader u1RxWinPerbitVref_Save
3828 00:48:37.038062 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3829 00:48:37.041253 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3830 00:48:37.044288 sync preloader delay_cell_unit
3831 00:48:37.050962 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3832 00:48:37.054626 sync preloader write leveling
3833 00:48:37.055058 sync preloader cbt_mr12
3834 00:48:37.057690 sync preloader cbt_clk_dly
3835 00:48:37.061081 sync preloader cbt_cmd_dly
3836 00:48:37.061510 sync preloader cbt_cs
3837 00:48:37.064179 sync preloader cbt_ca_perbit_delay
3838 00:48:37.067778 sync preloader clk_delay
3839 00:48:37.070971 sync preloader dqs_delay
3840 00:48:37.071398 sync preloader u1Gating2T_Save
3841 00:48:37.074369 sync preloader u1Gating05T_Save
3842 00:48:37.077907 sync preloader u1Gatingfine_tune_Save
3843 00:48:37.081186 sync preloader u1Gatingucpass_count_Save
3844 00:48:37.084870 sync preloader u1TxWindowPerbitVref_Save
3845 00:48:37.087868 sync preloader u1TxCenter_min_Save
3846 00:48:37.091168 sync preloader u1TxCenter_max_Save
3847 00:48:37.094377 sync preloader u1Txwin_center_Save
3848 00:48:37.097678 sync preloader u1Txfirst_pass_Save
3849 00:48:37.101029 sync preloader u1Txlast_pass_Save
3850 00:48:37.104431 sync preloader u1RxDatlat_Save
3851 00:48:37.107727 sync preloader u1RxWinPerbitVref_Save
3852 00:48:37.111474 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3853 00:48:37.114485 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3854 00:48:37.117806 sync preloader delay_cell_unit
3855 00:48:37.124771 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3856 00:48:37.128006 sync preloader write leveling
3857 00:48:37.131297 sync preloader cbt_mr12
3858 00:48:37.131725 sync preloader cbt_clk_dly
3859 00:48:37.134596 sync preloader cbt_cmd_dly
3860 00:48:37.137842 sync preloader cbt_cs
3861 00:48:37.141452 sync preloader cbt_ca_perbit_delay
3862 00:48:37.142103 sync preloader clk_delay
3863 00:48:37.144484 sync preloader dqs_delay
3864 00:48:37.148006 sync preloader u1Gating2T_Save
3865 00:48:37.151493 sync preloader u1Gating05T_Save
3866 00:48:37.155057 sync preloader u1Gatingfine_tune_Save
3867 00:48:37.158162 sync preloader u1Gatingucpass_count_Save
3868 00:48:37.161522 sync preloader u1TxWindowPerbitVref_Save
3869 00:48:37.164618 sync preloader u1TxCenter_min_Save
3870 00:48:37.167975 sync preloader u1TxCenter_max_Save
3871 00:48:37.171635 sync preloader u1Txwin_center_Save
3872 00:48:37.172159 sync preloader u1Txfirst_pass_Save
3873 00:48:37.174723 sync preloader u1Txlast_pass_Save
3874 00:48:37.178302 sync preloader u1RxDatlat_Save
3875 00:48:37.181672 sync preloader u1RxWinPerbitVref_Save
3876 00:48:37.184883 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3877 00:48:37.191353 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3878 00:48:37.194672 sync preloader delay_cell_unit
3879 00:48:37.197991 just_for_test_dump_coreboot_params dump all params
3880 00:48:37.198471 dump source = 0x0
3881 00:48:37.201500 dump params frequency:1600
3882 00:48:37.205115 dump params rank number:2
3883 00:48:37.205607
3884 00:48:37.208449 dump params write leveling
3885 00:48:37.208972 write leveling[0][0][0] = 0x23
3886 00:48:37.211767 write leveling[0][0][1] = 0x1b
3887 00:48:37.214804 write leveling[0][1][0] = 0x24
3888 00:48:37.218428 write leveling[0][1][1] = 0x1e
3889 00:48:37.221508 write leveling[1][0][0] = 0x25
3890 00:48:37.221943 write leveling[1][0][1] = 0x21
3891 00:48:37.225134 write leveling[1][1][0] = 0x26
3892 00:48:37.228016 write leveling[1][1][1] = 0x21
3893 00:48:37.231484 dump params cbt_cs
3894 00:48:37.232184 cbt_cs[0][0] = 0x8
3895 00:48:37.234675 cbt_cs[0][1] = 0x8
3896 00:48:37.235203 cbt_cs[1][0] = 0xb
3897 00:48:37.238040 cbt_cs[1][1] = 0xb
3898 00:48:37.238536 dump params cbt_mr12
3899 00:48:37.241621 cbt_mr12[0][0] = 0x16
3900 00:48:37.242142 cbt_mr12[0][1] = 0x16
3901 00:48:37.245124 cbt_mr12[1][0] = 0x16
3902 00:48:37.248185 cbt_mr12[1][1] = 0x16
3903 00:48:37.248680 dump params tx window
3904 00:48:37.251645 tx_center_min[0][0][0] = 981
3905 00:48:37.255087 tx_center_max[0][0][0] = 988
3906 00:48:37.258598 tx_center_min[0][0][1] = 975
3907 00:48:37.259123 tx_center_max[0][0][1] = 979
3908 00:48:37.261963 tx_center_min[0][1][0] = 982
3909 00:48:37.265409 tx_center_max[0][1][0] = 990
3910 00:48:37.268599 tx_center_min[0][1][1] = 978
3911 00:48:37.271735 tx_center_max[0][1][1] = 984
3912 00:48:37.272188 tx_center_min[1][0][0] = 983
3913 00:48:37.275179 tx_center_max[1][0][0] = 988
3914 00:48:37.278823 tx_center_min[1][0][1] = 980
3915 00:48:37.281778 tx_center_max[1][0][1] = 982
3916 00:48:37.282331 tx_center_min[1][1][0] = 984
3917 00:48:37.285165 tx_center_max[1][1][0] = 989
3918 00:48:37.288418 tx_center_min[1][1][1] = 980
3919 00:48:37.291847 tx_center_max[1][1][1] = 983
3920 00:48:37.292366 dump params tx window
3921 00:48:37.295147 tx_win_center[0][0][0] = 988
3922 00:48:37.298562 tx_first_pass[0][0][0] = 976
3923 00:48:37.301685 tx_last_pass[0][0][0] = 1001
3924 00:48:37.305215 tx_win_center[0][0][1] = 987
3925 00:48:37.305735 tx_first_pass[0][0][1] = 975
3926 00:48:37.308468 tx_last_pass[0][0][1] = 999
3927 00:48:37.312034 tx_win_center[0][0][2] = 987
3928 00:48:37.315063 tx_first_pass[0][0][2] = 976
3929 00:48:37.315499 tx_last_pass[0][0][2] = 999
3930 00:48:37.318643 tx_win_center[0][0][3] = 981
3931 00:48:37.321757 tx_first_pass[0][0][3] = 969
3932 00:48:37.325276 tx_last_pass[0][0][3] = 993
3933 00:48:37.325798 tx_win_center[0][0][4] = 987
3934 00:48:37.328617 tx_first_pass[0][0][4] = 975
3935 00:48:37.332177 tx_last_pass[0][0][4] = 1000
3936 00:48:37.335287 tx_win_center[0][0][5] = 983
3937 00:48:37.338690 tx_first_pass[0][0][5] = 971
3938 00:48:37.339128 tx_last_pass[0][0][5] = 995
3939 00:48:37.342305 tx_win_center[0][0][6] = 984
3940 00:48:37.345143 tx_first_pass[0][0][6] = 972
3941 00:48:37.348483 tx_last_pass[0][0][6] = 997
3942 00:48:37.348916 tx_win_center[0][0][7] = 985
3943 00:48:37.352431 tx_first_pass[0][0][7] = 972
3944 00:48:37.355356 tx_last_pass[0][0][7] = 998
3945 00:48:37.358868 tx_win_center[0][0][8] = 975
3946 00:48:37.361814 tx_first_pass[0][0][8] = 962
3947 00:48:37.362311 tx_last_pass[0][0][8] = 988
3948 00:48:37.365692 tx_win_center[0][0][9] = 975
3949 00:48:37.368579 tx_first_pass[0][0][9] = 963
3950 00:48:37.371958 tx_last_pass[0][0][9] = 988
3951 00:48:37.372481 tx_win_center[0][0][10] = 979
3952 00:48:37.375482 tx_first_pass[0][0][10] = 968
3953 00:48:37.378760 tx_last_pass[0][0][10] = 991
3954 00:48:37.382376 tx_win_center[0][0][11] = 975
3955 00:48:37.385649 tx_first_pass[0][0][11] = 963
3956 00:48:37.386195 tx_last_pass[0][0][11] = 988
3957 00:48:37.389149 tx_win_center[0][0][12] = 977
3958 00:48:37.392081 tx_first_pass[0][0][12] = 965
3959 00:48:37.395441 tx_last_pass[0][0][12] = 989
3960 00:48:37.398872 tx_win_center[0][0][13] = 975
3961 00:48:37.399410 tx_first_pass[0][0][13] = 962
3962 00:48:37.401984 tx_last_pass[0][0][13] = 988
3963 00:48:37.405160 tx_win_center[0][0][14] = 976
3964 00:48:37.408828 tx_first_pass[0][0][14] = 963
3965 00:48:37.412581 tx_last_pass[0][0][14] = 989
3966 00:48:37.413104 tx_win_center[0][0][15] = 978
3967 00:48:37.415074 tx_first_pass[0][0][15] = 966
3968 00:48:37.418744 tx_last_pass[0][0][15] = 990
3969 00:48:37.422011 tx_win_center[0][1][0] = 990
3970 00:48:37.425433 tx_first_pass[0][1][0] = 977
3971 00:48:37.425954 tx_last_pass[0][1][0] = 1003
3972 00:48:37.428921 tx_win_center[0][1][1] = 988
3973 00:48:37.432170 tx_first_pass[0][1][1] = 976
3974 00:48:37.435627 tx_last_pass[0][1][1] = 1000
3975 00:48:37.438957 tx_win_center[0][1][2] = 988
3976 00:48:37.439479 tx_first_pass[0][1][2] = 977
3977 00:48:37.442126 tx_last_pass[0][1][2] = 1000
3978 00:48:37.445356 tx_win_center[0][1][3] = 982
3979 00:48:37.449030 tx_first_pass[0][1][3] = 970
3980 00:48:37.449555 tx_last_pass[0][1][3] = 995
3981 00:48:37.452349 tx_win_center[0][1][4] = 988
3982 00:48:37.455900 tx_first_pass[0][1][4] = 976
3983 00:48:37.458713 tx_last_pass[0][1][4] = 1001
3984 00:48:37.462037 tx_win_center[0][1][5] = 983
3985 00:48:37.462687 tx_first_pass[0][1][5] = 971
3986 00:48:37.465360 tx_last_pass[0][1][5] = 996
3987 00:48:37.468523 tx_win_center[0][1][6] = 984
3988 00:48:37.471733 tx_first_pass[0][1][6] = 972
3989 00:48:37.472171 tx_last_pass[0][1][6] = 997
3990 00:48:37.475614 tx_win_center[0][1][7] = 986
3991 00:48:37.478545 tx_first_pass[0][1][7] = 975
3992 00:48:37.482166 tx_last_pass[0][1][7] = 998
3993 00:48:37.485441 tx_win_center[0][1][8] = 978
3994 00:48:37.485966 tx_first_pass[0][1][8] = 967
3995 00:48:37.488607 tx_last_pass[0][1][8] = 990
3996 00:48:37.492100 tx_win_center[0][1][9] = 979
3997 00:48:37.495258 tx_first_pass[0][1][9] = 967
3998 00:48:37.495780 tx_last_pass[0][1][9] = 991
3999 00:48:37.499115 tx_win_center[0][1][10] = 984
4000 00:48:37.502150 tx_first_pass[0][1][10] = 973
4001 00:48:37.505345 tx_last_pass[0][1][10] = 996
4002 00:48:37.509158 tx_win_center[0][1][11] = 979
4003 00:48:37.509683 tx_first_pass[0][1][11] = 967
4004 00:48:37.511761 tx_last_pass[0][1][11] = 991
4005 00:48:37.515254 tx_win_center[0][1][12] = 979
4006 00:48:37.519205 tx_first_pass[0][1][12] = 968
4007 00:48:37.521898 tx_last_pass[0][1][12] = 991
4008 00:48:37.522414 tx_win_center[0][1][13] = 978
4009 00:48:37.525615 tx_first_pass[0][1][13] = 967
4010 00:48:37.528994 tx_last_pass[0][1][13] = 990
4011 00:48:37.532145 tx_win_center[0][1][14] = 979
4012 00:48:37.535176 tx_first_pass[0][1][14] = 967
4013 00:48:37.535723 tx_last_pass[0][1][14] = 991
4014 00:48:37.538723 tx_win_center[0][1][15] = 980
4015 00:48:37.542439 tx_first_pass[0][1][15] = 969
4016 00:48:37.545317 tx_last_pass[0][1][15] = 992
4017 00:48:37.548711 tx_win_center[1][0][0] = 988
4018 00:48:37.549147 tx_first_pass[1][0][0] = 976
4019 00:48:37.552464 tx_last_pass[1][0][0] = 1001
4020 00:48:37.555397 tx_win_center[1][0][1] = 987
4021 00:48:37.558786 tx_first_pass[1][0][1] = 976
4022 00:48:37.559218 tx_last_pass[1][0][1] = 999
4023 00:48:37.562077 tx_win_center[1][0][2] = 985
4024 00:48:37.565779 tx_first_pass[1][0][2] = 974
4025 00:48:37.568767 tx_last_pass[1][0][2] = 997
4026 00:48:37.572216 tx_win_center[1][0][3] = 983
4027 00:48:37.572726 tx_first_pass[1][0][3] = 971
4028 00:48:37.575762 tx_last_pass[1][0][3] = 995
4029 00:48:37.578829 tx_win_center[1][0][4] = 986
4030 00:48:37.582160 tx_first_pass[1][0][4] = 975
4031 00:48:37.582724 tx_last_pass[1][0][4] = 998
4032 00:48:37.585499 tx_win_center[1][0][5] = 987
4033 00:48:37.588890 tx_first_pass[1][0][5] = 976
4034 00:48:37.592199 tx_last_pass[1][0][5] = 999
4035 00:48:37.595542 tx_win_center[1][0][6] = 988
4036 00:48:37.596068 tx_first_pass[1][0][6] = 976
4037 00:48:37.598893 tx_last_pass[1][0][6] = 1000
4038 00:48:37.602102 tx_win_center[1][0][7] = 986
4039 00:48:37.605338 tx_first_pass[1][0][7] = 975
4040 00:48:37.605776 tx_last_pass[1][0][7] = 998
4041 00:48:37.608804 tx_win_center[1][0][8] = 980
4042 00:48:37.612022 tx_first_pass[1][0][8] = 969
4043 00:48:37.615423 tx_last_pass[1][0][8] = 992
4044 00:48:37.618929 tx_win_center[1][0][9] = 980
4045 00:48:37.619364 tx_first_pass[1][0][9] = 969
4046 00:48:37.622603 tx_last_pass[1][0][9] = 992
4047 00:48:37.625729 tx_win_center[1][0][10] = 981
4048 00:48:37.629170 tx_first_pass[1][0][10] = 970
4049 00:48:37.632409 tx_last_pass[1][0][10] = 993
4050 00:48:37.632930 tx_win_center[1][0][11] = 982
4051 00:48:37.635887 tx_first_pass[1][0][11] = 971
4052 00:48:37.639126 tx_last_pass[1][0][11] = 994
4053 00:48:37.642586 tx_win_center[1][0][12] = 982
4054 00:48:37.645673 tx_first_pass[1][0][12] = 971
4055 00:48:37.646248 tx_last_pass[1][0][12] = 994
4056 00:48:37.648952 tx_win_center[1][0][13] = 982
4057 00:48:37.652483 tx_first_pass[1][0][13] = 971
4058 00:48:37.655658 tx_last_pass[1][0][13] = 994
4059 00:48:37.658942 tx_win_center[1][0][14] = 981
4060 00:48:37.659383 tx_first_pass[1][0][14] = 970
4061 00:48:37.662409 tx_last_pass[1][0][14] = 993
4062 00:48:37.665836 tx_win_center[1][0][15] = 980
4063 00:48:37.669080 tx_first_pass[1][0][15] = 968
4064 00:48:37.672747 tx_last_pass[1][0][15] = 992
4065 00:48:37.673255 tx_win_center[1][1][0] = 989
4066 00:48:37.675767 tx_first_pass[1][1][0] = 977
4067 00:48:37.679093 tx_last_pass[1][1][0] = 1002
4068 00:48:37.682473 tx_win_center[1][1][1] = 988
4069 00:48:37.682915 tx_first_pass[1][1][1] = 976
4070 00:48:37.685665 tx_last_pass[1][1][1] = 1000
4071 00:48:37.689185 tx_win_center[1][1][2] = 985
4072 00:48:37.692479 tx_first_pass[1][1][2] = 973
4073 00:48:37.693007 tx_last_pass[1][1][2] = 998
4074 00:48:37.696075 tx_win_center[1][1][3] = 984
4075 00:48:37.698903 tx_first_pass[1][1][3] = 972
4076 00:48:37.702498 tx_last_pass[1][1][3] = 997
4077 00:48:37.705484 tx_win_center[1][1][4] = 987
4078 00:48:37.705947 tx_first_pass[1][1][4] = 975
4079 00:48:37.709219 tx_last_pass[1][1][4] = 999
4080 00:48:37.712719 tx_win_center[1][1][5] = 989
4081 00:48:37.715874 tx_first_pass[1][1][5] = 976
4082 00:48:37.716311 tx_last_pass[1][1][5] = 1002
4083 00:48:37.719084 tx_win_center[1][1][6] = 989
4084 00:48:37.722737 tx_first_pass[1][1][6] = 977
4085 00:48:37.725925 tx_last_pass[1][1][6] = 1002
4086 00:48:37.729667 tx_win_center[1][1][7] = 987
4087 00:48:37.730305 tx_first_pass[1][1][7] = 976
4088 00:48:37.732857 tx_last_pass[1][1][7] = 999
4089 00:48:37.736059 tx_win_center[1][1][8] = 981
4090 00:48:37.739184 tx_first_pass[1][1][8] = 969
4091 00:48:37.739709 tx_last_pass[1][1][8] = 993
4092 00:48:37.742594 tx_win_center[1][1][9] = 981
4093 00:48:37.746067 tx_first_pass[1][1][9] = 969
4094 00:48:37.749538 tx_last_pass[1][1][9] = 993
4095 00:48:37.752784 tx_win_center[1][1][10] = 981
4096 00:48:37.753303 tx_first_pass[1][1][10] = 970
4097 00:48:37.756282 tx_last_pass[1][1][10] = 993
4098 00:48:37.759433 tx_win_center[1][1][11] = 982
4099 00:48:37.762590 tx_first_pass[1][1][11] = 971
4100 00:48:37.766085 tx_last_pass[1][1][11] = 994
4101 00:48:37.766650 tx_win_center[1][1][12] = 983
4102 00:48:37.769123 tx_first_pass[1][1][12] = 972
4103 00:48:37.772697 tx_last_pass[1][1][12] = 994
4104 00:48:37.776244 tx_win_center[1][1][13] = 982
4105 00:48:37.779912 tx_first_pass[1][1][13] = 971
4106 00:48:37.780434 tx_last_pass[1][1][13] = 993
4107 00:48:37.782408 tx_win_center[1][1][14] = 982
4108 00:48:37.785997 tx_first_pass[1][1][14] = 971
4109 00:48:37.789380 tx_last_pass[1][1][14] = 993
4110 00:48:37.792830 tx_win_center[1][1][15] = 980
4111 00:48:37.793348 tx_first_pass[1][1][15] = 968
4112 00:48:37.795817 tx_last_pass[1][1][15] = 992
4113 00:48:37.799405 dump params rx window
4114 00:48:37.799960 rx_firspass[0][0][0] = 8
4115 00:48:37.802712 rx_lastpass[0][0][0] = 40
4116 00:48:37.805912 rx_firspass[0][0][1] = 6
4117 00:48:37.809043 rx_lastpass[0][0][1] = 39
4118 00:48:37.809477 rx_firspass[0][0][2] = 8
4119 00:48:37.812316 rx_lastpass[0][0][2] = 38
4120 00:48:37.815702 rx_firspass[0][0][3] = -4
4121 00:48:37.816137 rx_lastpass[0][0][3] = 29
4122 00:48:37.818953 rx_firspass[0][0][4] = 6
4123 00:48:37.822906 rx_lastpass[0][0][4] = 38
4124 00:48:37.823430 rx_firspass[0][0][5] = -1
4125 00:48:37.825935 rx_lastpass[0][0][5] = 30
4126 00:48:37.829345 rx_firspass[0][0][6] = 1
4127 00:48:37.832810 rx_lastpass[0][0][6] = 32
4128 00:48:37.833456 rx_firspass[0][0][7] = 3
4129 00:48:37.836081 rx_lastpass[0][0][7] = 33
4130 00:48:37.839338 rx_firspass[0][0][8] = 0
4131 00:48:37.839861 rx_lastpass[0][0][8] = 34
4132 00:48:37.842767 rx_firspass[0][0][9] = 4
4133 00:48:37.845850 rx_lastpass[0][0][9] = 34
4134 00:48:37.846382 rx_firspass[0][0][10] = 6
4135 00:48:37.849228 rx_lastpass[0][0][10] = 38
4136 00:48:37.852813 rx_firspass[0][0][11] = 0
4137 00:48:37.856316 rx_lastpass[0][0][11] = 34
4138 00:48:37.856836 rx_firspass[0][0][12] = 1
4139 00:48:37.859202 rx_lastpass[0][0][12] = 36
4140 00:48:37.863041 rx_firspass[0][0][13] = 2
4141 00:48:37.866384 rx_lastpass[0][0][13] = 30
4142 00:48:37.866907 rx_firspass[0][0][14] = -1
4143 00:48:37.869520 rx_lastpass[0][0][14] = 36
4144 00:48:37.873033 rx_firspass[0][0][15] = 3
4145 00:48:37.873553 rx_lastpass[0][0][15] = 36
4146 00:48:37.876449 rx_firspass[0][1][0] = 7
4147 00:48:37.879737 rx_lastpass[0][1][0] = 42
4148 00:48:37.883044 rx_firspass[0][1][1] = 5
4149 00:48:37.883564 rx_lastpass[0][1][1] = 40
4150 00:48:37.886611 rx_firspass[0][1][2] = 7
4151 00:48:37.889509 rx_lastpass[0][1][2] = 39
4152 00:48:37.890027 rx_firspass[0][1][3] = -4
4153 00:48:37.893174 rx_lastpass[0][1][3] = 31
4154 00:48:37.896251 rx_firspass[0][1][4] = 6
4155 00:48:37.896773 rx_lastpass[0][1][4] = 40
4156 00:48:37.899685 rx_firspass[0][1][5] = -2
4157 00:48:37.902680 rx_lastpass[0][1][5] = 33
4158 00:48:37.906083 rx_firspass[0][1][6] = 1
4159 00:48:37.906762 rx_lastpass[0][1][6] = 35
4160 00:48:37.909751 rx_firspass[0][1][7] = 2
4161 00:48:37.912596 rx_lastpass[0][1][7] = 34
4162 00:48:37.913033 rx_firspass[0][1][8] = -1
4163 00:48:37.915879 rx_lastpass[0][1][8] = 35
4164 00:48:37.919406 rx_firspass[0][1][9] = 2
4165 00:48:37.922564 rx_lastpass[0][1][9] = 36
4166 00:48:37.923001 rx_firspass[0][1][10] = 6
4167 00:48:37.925961 rx_lastpass[0][1][10] = 40
4168 00:48:37.929333 rx_firspass[0][1][11] = 0
4169 00:48:37.929944 rx_lastpass[0][1][11] = 34
4170 00:48:37.932735 rx_firspass[0][1][12] = 2
4171 00:48:37.935937 rx_lastpass[0][1][12] = 37
4172 00:48:37.939790 rx_firspass[0][1][13] = 1
4173 00:48:37.940309 rx_lastpass[0][1][13] = 33
4174 00:48:37.942625 rx_firspass[0][1][14] = 2
4175 00:48:37.946008 rx_lastpass[0][1][14] = 34
4176 00:48:37.946539 rx_firspass[0][1][15] = 3
4177 00:48:37.949207 rx_lastpass[0][1][15] = 38
4178 00:48:37.952430 rx_firspass[1][0][0] = 8
4179 00:48:37.955950 rx_lastpass[1][0][0] = 40
4180 00:48:37.956469 rx_firspass[1][0][1] = 6
4181 00:48:37.959417 rx_lastpass[1][0][1] = 40
4182 00:48:37.962447 rx_firspass[1][0][2] = 0
4183 00:48:37.962928 rx_lastpass[1][0][2] = 34
4184 00:48:37.965964 rx_firspass[1][0][3] = -2
4185 00:48:37.969146 rx_lastpass[1][0][3] = 33
4186 00:48:37.972709 rx_firspass[1][0][4] = 3
4187 00:48:37.973227 rx_lastpass[1][0][4] = 34
4188 00:48:37.975990 rx_firspass[1][0][5] = 8
4189 00:48:37.979161 rx_lastpass[1][0][5] = 40
4190 00:48:37.979678 rx_firspass[1][0][6] = 9
4191 00:48:37.982693 rx_lastpass[1][0][6] = 40
4192 00:48:37.985884 rx_firspass[1][0][7] = 4
4193 00:48:37.986433 rx_lastpass[1][0][7] = 35
4194 00:48:37.988988 rx_firspass[1][0][8] = 1
4195 00:48:37.992670 rx_lastpass[1][0][8] = 35
4196 00:48:37.995856 rx_firspass[1][0][9] = 0
4197 00:48:37.996380 rx_lastpass[1][0][9] = 35
4198 00:48:37.999086 rx_firspass[1][0][10] = 2
4199 00:48:38.002383 rx_lastpass[1][0][10] = 33
4200 00:48:38.002824 rx_firspass[1][0][11] = 1
4201 00:48:38.005786 rx_lastpass[1][0][11] = 36
4202 00:48:38.009121 rx_firspass[1][0][12] = 4
4203 00:48:38.012579 rx_lastpass[1][0][12] = 37
4204 00:48:38.013009 rx_firspass[1][0][13] = 3
4205 00:48:38.015546 rx_lastpass[1][0][13] = 35
4206 00:48:38.019029 rx_firspass[1][0][14] = 3
4207 00:48:38.019459 rx_lastpass[1][0][14] = 35
4208 00:48:38.022390 rx_firspass[1][0][15] = -1
4209 00:48:38.025958 rx_lastpass[1][0][15] = 31
4210 00:48:38.029180 rx_firspass[1][1][0] = 8
4211 00:48:38.029706 rx_lastpass[1][1][0] = 42
4212 00:48:38.032519 rx_firspass[1][1][1] = 6
4213 00:48:38.035807 rx_lastpass[1][1][1] = 41
4214 00:48:38.036407 rx_firspass[1][1][2] = 0
4215 00:48:38.038946 rx_lastpass[1][1][2] = 34
4216 00:48:38.042436 rx_firspass[1][1][3] = -2
4217 00:48:38.045713 rx_lastpass[1][1][3] = 32
4218 00:48:38.046151 rx_firspass[1][1][4] = 3
4219 00:48:38.049361 rx_lastpass[1][1][4] = 37
4220 00:48:38.052370 rx_firspass[1][1][5] = 7
4221 00:48:38.052812 rx_lastpass[1][1][5] = 40
4222 00:48:38.056164 rx_firspass[1][1][6] = 8
4223 00:48:38.059300 rx_lastpass[1][1][6] = 42
4224 00:48:38.059852 rx_firspass[1][1][7] = 3
4225 00:48:38.062331 rx_lastpass[1][1][7] = 38
4226 00:48:38.065552 rx_firspass[1][1][8] = 1
4227 00:48:38.069520 rx_lastpass[1][1][8] = 36
4228 00:48:38.070047 rx_firspass[1][1][9] = 1
4229 00:48:38.072569 rx_lastpass[1][1][9] = 36
4230 00:48:38.076008 rx_firspass[1][1][10] = 1
4231 00:48:38.076528 rx_lastpass[1][1][10] = 36
4232 00:48:38.079379 rx_firspass[1][1][11] = 3
4233 00:48:38.082897 rx_lastpass[1][1][11] = 36
4234 00:48:38.086199 rx_firspass[1][1][12] = 5
4235 00:48:38.086749 rx_lastpass[1][1][12] = 39
4236 00:48:38.089594 rx_firspass[1][1][13] = 4
4237 00:48:38.092978 rx_lastpass[1][1][13] = 38
4238 00:48:38.093499 rx_firspass[1][1][14] = 4
4239 00:48:38.095936 rx_lastpass[1][1][14] = 37
4240 00:48:38.099330 rx_firspass[1][1][15] = -2
4241 00:48:38.102842 rx_lastpass[1][1][15] = 33
4242 00:48:38.103365 dump params clk_delay
4243 00:48:38.106033 clk_delay[0] = 0
4244 00:48:38.106514 clk_delay[1] = 0
4245 00:48:38.109499 dump params dqs_delay
4246 00:48:38.110011 dqs_delay[0][0] = 0
4247 00:48:38.112667 dqs_delay[0][1] = 2
4248 00:48:38.113098 dqs_delay[1][0] = 0
4249 00:48:38.116243 dqs_delay[1][1] = 1
4250 00:48:38.119241 dump params delay_cell_unit = 753
4251 00:48:38.119667 dump source = 0x0
4252 00:48:38.122545 dump params frequency:1200
4253 00:48:38.126022 dump params rank number:2
4254 00:48:38.126577
4255 00:48:38.129453 dump params write leveling
4256 00:48:38.129973 write leveling[0][0][0] = 0x0
4257 00:48:38.132852 write leveling[0][0][1] = 0x0
4258 00:48:38.136083 write leveling[0][1][0] = 0x0
4259 00:48:38.139417 write leveling[0][1][1] = 0x0
4260 00:48:38.139937 write leveling[1][0][0] = 0x0
4261 00:48:38.142737 write leveling[1][0][1] = 0x0
4262 00:48:38.145953 write leveling[1][1][0] = 0x0
4263 00:48:38.149511 write leveling[1][1][1] = 0x0
4264 00:48:38.150129 dump params cbt_cs
4265 00:48:38.152627 cbt_cs[0][0] = 0x0
4266 00:48:38.153063 cbt_cs[0][1] = 0x0
4267 00:48:38.156046 cbt_cs[1][0] = 0x0
4268 00:48:38.156483 cbt_cs[1][1] = 0x0
4269 00:48:38.159738 dump params cbt_mr12
4270 00:48:38.162581 cbt_mr12[0][0] = 0x0
4271 00:48:38.163184 cbt_mr12[0][1] = 0x0
4272 00:48:38.165929 cbt_mr12[1][0] = 0x0
4273 00:48:38.166397 cbt_mr12[1][1] = 0x0
4274 00:48:38.169578 dump params tx window
4275 00:48:38.172985 tx_center_min[0][0][0] = 0
4276 00:48:38.173496 tx_center_max[0][0][0] = 0
4277 00:48:38.176452 tx_center_min[0][0][1] = 0
4278 00:48:38.179647 tx_center_max[0][0][1] = 0
4279 00:48:38.182854 tx_center_min[0][1][0] = 0
4280 00:48:38.183282 tx_center_max[0][1][0] = 0
4281 00:48:38.186331 tx_center_min[0][1][1] = 0
4282 00:48:38.189900 tx_center_max[0][1][1] = 0
4283 00:48:38.190462 tx_center_min[1][0][0] = 0
4284 00:48:38.192777 tx_center_max[1][0][0] = 0
4285 00:48:38.196506 tx_center_min[1][0][1] = 0
4286 00:48:38.199778 tx_center_max[1][0][1] = 0
4287 00:48:38.200291 tx_center_min[1][1][0] = 0
4288 00:48:38.202768 tx_center_max[1][1][0] = 0
4289 00:48:38.206428 tx_center_min[1][1][1] = 0
4290 00:48:38.209538 tx_center_max[1][1][1] = 0
4291 00:48:38.210048 dump params tx window
4292 00:48:38.212676 tx_win_center[0][0][0] = 0
4293 00:48:38.216203 tx_first_pass[0][0][0] = 0
4294 00:48:38.216635 tx_last_pass[0][0][0] = 0
4295 00:48:38.219607 tx_win_center[0][0][1] = 0
4296 00:48:38.222935 tx_first_pass[0][0][1] = 0
4297 00:48:38.226476 tx_last_pass[0][0][1] = 0
4298 00:48:38.226992 tx_win_center[0][0][2] = 0
4299 00:48:38.229589 tx_first_pass[0][0][2] = 0
4300 00:48:38.232770 tx_last_pass[0][0][2] = 0
4301 00:48:38.233200 tx_win_center[0][0][3] = 0
4302 00:48:38.236337 tx_first_pass[0][0][3] = 0
4303 00:48:38.239755 tx_last_pass[0][0][3] = 0
4304 00:48:38.242826 tx_win_center[0][0][4] = 0
4305 00:48:38.243256 tx_first_pass[0][0][4] = 0
4306 00:48:38.246036 tx_last_pass[0][0][4] = 0
4307 00:48:38.249499 tx_win_center[0][0][5] = 0
4308 00:48:38.253015 tx_first_pass[0][0][5] = 0
4309 00:48:38.253445 tx_last_pass[0][0][5] = 0
4310 00:48:38.256106 tx_win_center[0][0][6] = 0
4311 00:48:38.259575 tx_first_pass[0][0][6] = 0
4312 00:48:38.260174 tx_last_pass[0][0][6] = 0
4313 00:48:38.262912 tx_win_center[0][0][7] = 0
4314 00:48:38.266131 tx_first_pass[0][0][7] = 0
4315 00:48:38.269509 tx_last_pass[0][0][7] = 0
4316 00:48:38.269952 tx_win_center[0][0][8] = 0
4317 00:48:38.272768 tx_first_pass[0][0][8] = 0
4318 00:48:38.276470 tx_last_pass[0][0][8] = 0
4319 00:48:38.277001 tx_win_center[0][0][9] = 0
4320 00:48:38.279443 tx_first_pass[0][0][9] = 0
4321 00:48:38.282827 tx_last_pass[0][0][9] = 0
4322 00:48:38.286100 tx_win_center[0][0][10] = 0
4323 00:48:38.286607 tx_first_pass[0][0][10] = 0
4324 00:48:38.289750 tx_last_pass[0][0][10] = 0
4325 00:48:38.292815 tx_win_center[0][0][11] = 0
4326 00:48:38.296469 tx_first_pass[0][0][11] = 0
4327 00:48:38.296982 tx_last_pass[0][0][11] = 0
4328 00:48:38.299424 tx_win_center[0][0][12] = 0
4329 00:48:38.302733 tx_first_pass[0][0][12] = 0
4330 00:48:38.306072 tx_last_pass[0][0][12] = 0
4331 00:48:38.306532 tx_win_center[0][0][13] = 0
4332 00:48:38.309549 tx_first_pass[0][0][13] = 0
4333 00:48:38.312847 tx_last_pass[0][0][13] = 0
4334 00:48:38.316252 tx_win_center[0][0][14] = 0
4335 00:48:38.316677 tx_first_pass[0][0][14] = 0
4336 00:48:38.319899 tx_last_pass[0][0][14] = 0
4337 00:48:38.323179 tx_win_center[0][0][15] = 0
4338 00:48:38.326315 tx_first_pass[0][0][15] = 0
4339 00:48:38.326743 tx_last_pass[0][0][15] = 0
4340 00:48:38.329956 tx_win_center[0][1][0] = 0
4341 00:48:38.333063 tx_first_pass[0][1][0] = 0
4342 00:48:38.336833 tx_last_pass[0][1][0] = 0
4343 00:48:38.337259 tx_win_center[0][1][1] = 0
4344 00:48:38.339722 tx_first_pass[0][1][1] = 0
4345 00:48:38.342983 tx_last_pass[0][1][1] = 0
4346 00:48:38.343423 tx_win_center[0][1][2] = 0
4347 00:48:38.346471 tx_first_pass[0][1][2] = 0
4348 00:48:38.349618 tx_last_pass[0][1][2] = 0
4349 00:48:38.353235 tx_win_center[0][1][3] = 0
4350 00:48:38.353763 tx_first_pass[0][1][3] = 0
4351 00:48:38.356651 tx_last_pass[0][1][3] = 0
4352 00:48:38.359562 tx_win_center[0][1][4] = 0
4353 00:48:38.363502 tx_first_pass[0][1][4] = 0
4354 00:48:38.363938 tx_last_pass[0][1][4] = 0
4355 00:48:38.366435 tx_win_center[0][1][5] = 0
4356 00:48:38.369749 tx_first_pass[0][1][5] = 0
4357 00:48:38.370317 tx_last_pass[0][1][5] = 0
4358 00:48:38.373181 tx_win_center[0][1][6] = 0
4359 00:48:38.376651 tx_first_pass[0][1][6] = 0
4360 00:48:38.379898 tx_last_pass[0][1][6] = 0
4361 00:48:38.380333 tx_win_center[0][1][7] = 0
4362 00:48:38.383168 tx_first_pass[0][1][7] = 0
4363 00:48:38.386540 tx_last_pass[0][1][7] = 0
4364 00:48:38.386970 tx_win_center[0][1][8] = 0
4365 00:48:38.389772 tx_first_pass[0][1][8] = 0
4366 00:48:38.392917 tx_last_pass[0][1][8] = 0
4367 00:48:38.396304 tx_win_center[0][1][9] = 0
4368 00:48:38.396735 tx_first_pass[0][1][9] = 0
4369 00:48:38.399969 tx_last_pass[0][1][9] = 0
4370 00:48:38.403132 tx_win_center[0][1][10] = 0
4371 00:48:38.406564 tx_first_pass[0][1][10] = 0
4372 00:48:38.407005 tx_last_pass[0][1][10] = 0
4373 00:48:38.409810 tx_win_center[0][1][11] = 0
4374 00:48:38.412814 tx_first_pass[0][1][11] = 0
4375 00:48:38.416172 tx_last_pass[0][1][11] = 0
4376 00:48:38.416605 tx_win_center[0][1][12] = 0
4377 00:48:38.419737 tx_first_pass[0][1][12] = 0
4378 00:48:38.422804 tx_last_pass[0][1][12] = 0
4379 00:48:38.426476 tx_win_center[0][1][13] = 0
4380 00:48:38.426992 tx_first_pass[0][1][13] = 0
4381 00:48:38.429917 tx_last_pass[0][1][13] = 0
4382 00:48:38.433133 tx_win_center[0][1][14] = 0
4383 00:48:38.436579 tx_first_pass[0][1][14] = 0
4384 00:48:38.437124 tx_last_pass[0][1][14] = 0
4385 00:48:38.439774 tx_win_center[0][1][15] = 0
4386 00:48:38.443022 tx_first_pass[0][1][15] = 0
4387 00:48:38.446666 tx_last_pass[0][1][15] = 0
4388 00:48:38.447225 tx_win_center[1][0][0] = 0
4389 00:48:38.449541 tx_first_pass[1][0][0] = 0
4390 00:48:38.453272 tx_last_pass[1][0][0] = 0
4391 00:48:38.453789 tx_win_center[1][0][1] = 0
4392 00:48:38.456489 tx_first_pass[1][0][1] = 0
4393 00:48:38.459709 tx_last_pass[1][0][1] = 0
4394 00:48:38.463609 tx_win_center[1][0][2] = 0
4395 00:48:38.464137 tx_first_pass[1][0][2] = 0
4396 00:48:38.466844 tx_last_pass[1][0][2] = 0
4397 00:48:38.469986 tx_win_center[1][0][3] = 0
4398 00:48:38.473601 tx_first_pass[1][0][3] = 0
4399 00:48:38.474144 tx_last_pass[1][0][3] = 0
4400 00:48:38.477103 tx_win_center[1][0][4] = 0
4401 00:48:38.479906 tx_first_pass[1][0][4] = 0
4402 00:48:38.480417 tx_last_pass[1][0][4] = 0
4403 00:48:38.483211 tx_win_center[1][0][5] = 0
4404 00:48:38.486641 tx_first_pass[1][0][5] = 0
4405 00:48:38.490154 tx_last_pass[1][0][5] = 0
4406 00:48:38.490721 tx_win_center[1][0][6] = 0
4407 00:48:38.493349 tx_first_pass[1][0][6] = 0
4408 00:48:38.496743 tx_last_pass[1][0][6] = 0
4409 00:48:38.497260 tx_win_center[1][0][7] = 0
4410 00:48:38.499909 tx_first_pass[1][0][7] = 0
4411 00:48:38.503412 tx_last_pass[1][0][7] = 0
4412 00:48:38.506579 tx_win_center[1][0][8] = 0
4413 00:48:38.507021 tx_first_pass[1][0][8] = 0
4414 00:48:38.509716 tx_last_pass[1][0][8] = 0
4415 00:48:38.513277 tx_win_center[1][0][9] = 0
4416 00:48:38.516853 tx_first_pass[1][0][9] = 0
4417 00:48:38.517498 tx_last_pass[1][0][9] = 0
4418 00:48:38.520092 tx_win_center[1][0][10] = 0
4419 00:48:38.523480 tx_first_pass[1][0][10] = 0
4420 00:48:38.526633 tx_last_pass[1][0][10] = 0
4421 00:48:38.527159 tx_win_center[1][0][11] = 0
4422 00:48:38.529880 tx_first_pass[1][0][11] = 0
4423 00:48:38.533234 tx_last_pass[1][0][11] = 0
4424 00:48:38.536459 tx_win_center[1][0][12] = 0
4425 00:48:38.536980 tx_first_pass[1][0][12] = 0
4426 00:48:38.539656 tx_last_pass[1][0][12] = 0
4427 00:48:38.542922 tx_win_center[1][0][13] = 0
4428 00:48:38.546460 tx_first_pass[1][0][13] = 0
4429 00:48:38.546978 tx_last_pass[1][0][13] = 0
4430 00:48:38.549783 tx_win_center[1][0][14] = 0
4431 00:48:38.553201 tx_first_pass[1][0][14] = 0
4432 00:48:38.556550 tx_last_pass[1][0][14] = 0
4433 00:48:38.557073 tx_win_center[1][0][15] = 0
4434 00:48:38.559673 tx_first_pass[1][0][15] = 0
4435 00:48:38.562825 tx_last_pass[1][0][15] = 0
4436 00:48:38.565983 tx_win_center[1][1][0] = 0
4437 00:48:38.566443 tx_first_pass[1][1][0] = 0
4438 00:48:38.569602 tx_last_pass[1][1][0] = 0
4439 00:48:38.572915 tx_win_center[1][1][1] = 0
4440 00:48:38.576283 tx_first_pass[1][1][1] = 0
4441 00:48:38.576803 tx_last_pass[1][1][1] = 0
4442 00:48:38.579690 tx_win_center[1][1][2] = 0
4443 00:48:38.582882 tx_first_pass[1][1][2] = 0
4444 00:48:38.583319 tx_last_pass[1][1][2] = 0
4445 00:48:38.586447 tx_win_center[1][1][3] = 0
4446 00:48:38.589379 tx_first_pass[1][1][3] = 0
4447 00:48:38.592949 tx_last_pass[1][1][3] = 0
4448 00:48:38.593466 tx_win_center[1][1][4] = 0
4449 00:48:38.596104 tx_first_pass[1][1][4] = 0
4450 00:48:38.599641 tx_last_pass[1][1][4] = 0
4451 00:48:38.600163 tx_win_center[1][1][5] = 0
4452 00:48:38.602594 tx_first_pass[1][1][5] = 0
4453 00:48:38.605882 tx_last_pass[1][1][5] = 0
4454 00:48:38.609394 tx_win_center[1][1][6] = 0
4455 00:48:38.609984 tx_first_pass[1][1][6] = 0
4456 00:48:38.612675 tx_last_pass[1][1][6] = 0
4457 00:48:38.616254 tx_win_center[1][1][7] = 0
4458 00:48:38.619522 tx_first_pass[1][1][7] = 0
4459 00:48:38.620038 tx_last_pass[1][1][7] = 0
4460 00:48:38.622549 tx_win_center[1][1][8] = 0
4461 00:48:38.625936 tx_first_pass[1][1][8] = 0
4462 00:48:38.626420 tx_last_pass[1][1][8] = 0
4463 00:48:38.629755 tx_win_center[1][1][9] = 0
4464 00:48:38.633042 tx_first_pass[1][1][9] = 0
4465 00:48:38.636292 tx_last_pass[1][1][9] = 0
4466 00:48:38.636816 tx_win_center[1][1][10] = 0
4467 00:48:38.639809 tx_first_pass[1][1][10] = 0
4468 00:48:38.642942 tx_last_pass[1][1][10] = 0
4469 00:48:38.646473 tx_win_center[1][1][11] = 0
4470 00:48:38.647024 tx_first_pass[1][1][11] = 0
4471 00:48:38.649459 tx_last_pass[1][1][11] = 0
4472 00:48:38.653069 tx_win_center[1][1][12] = 0
4473 00:48:38.656262 tx_first_pass[1][1][12] = 0
4474 00:48:38.656787 tx_last_pass[1][1][12] = 0
4475 00:48:38.659403 tx_win_center[1][1][13] = 0
4476 00:48:38.662792 tx_first_pass[1][1][13] = 0
4477 00:48:38.665977 tx_last_pass[1][1][13] = 0
4478 00:48:38.666470 tx_win_center[1][1][14] = 0
4479 00:48:38.669486 tx_first_pass[1][1][14] = 0
4480 00:48:38.672536 tx_last_pass[1][1][14] = 0
4481 00:48:38.676177 tx_win_center[1][1][15] = 0
4482 00:48:38.676704 tx_first_pass[1][1][15] = 0
4483 00:48:38.679253 tx_last_pass[1][1][15] = 0
4484 00:48:38.682666 dump params rx window
4485 00:48:38.683293 rx_firspass[0][0][0] = 0
4486 00:48:38.685841 rx_lastpass[0][0][0] = 0
4487 00:48:38.689342 rx_firspass[0][0][1] = 0
4488 00:48:38.689893 rx_lastpass[0][0][1] = 0
4489 00:48:38.692435 rx_firspass[0][0][2] = 0
4490 00:48:38.696388 rx_lastpass[0][0][2] = 0
4491 00:48:38.699390 rx_firspass[0][0][3] = 0
4492 00:48:38.699908 rx_lastpass[0][0][3] = 0
4493 00:48:38.702675 rx_firspass[0][0][4] = 0
4494 00:48:38.706300 rx_lastpass[0][0][4] = 0
4495 00:48:38.706815 rx_firspass[0][0][5] = 0
4496 00:48:38.709204 rx_lastpass[0][0][5] = 0
4497 00:48:38.712839 rx_firspass[0][0][6] = 0
4498 00:48:38.713353 rx_lastpass[0][0][6] = 0
4499 00:48:38.715944 rx_firspass[0][0][7] = 0
4500 00:48:38.719341 rx_lastpass[0][0][7] = 0
4501 00:48:38.719773 rx_firspass[0][0][8] = 0
4502 00:48:38.722614 rx_lastpass[0][0][8] = 0
4503 00:48:38.726239 rx_firspass[0][0][9] = 0
4504 00:48:38.726759 rx_lastpass[0][0][9] = 0
4505 00:48:38.729777 rx_firspass[0][0][10] = 0
4506 00:48:38.732981 rx_lastpass[0][0][10] = 0
4507 00:48:38.736287 rx_firspass[0][0][11] = 0
4508 00:48:38.736800 rx_lastpass[0][0][11] = 0
4509 00:48:38.739453 rx_firspass[0][0][12] = 0
4510 00:48:38.743111 rx_lastpass[0][0][12] = 0
4511 00:48:38.743612 rx_firspass[0][0][13] = 0
4512 00:48:38.746400 rx_lastpass[0][0][13] = 0
4513 00:48:38.749487 rx_firspass[0][0][14] = 0
4514 00:48:38.749920 rx_lastpass[0][0][14] = 0
4515 00:48:38.752799 rx_firspass[0][0][15] = 0
4516 00:48:38.756068 rx_lastpass[0][0][15] = 0
4517 00:48:38.759860 rx_firspass[0][1][0] = 0
4518 00:48:38.760371 rx_lastpass[0][1][0] = 0
4519 00:48:38.762774 rx_firspass[0][1][1] = 0
4520 00:48:38.766002 rx_lastpass[0][1][1] = 0
4521 00:48:38.766477 rx_firspass[0][1][2] = 0
4522 00:48:38.769381 rx_lastpass[0][1][2] = 0
4523 00:48:38.772752 rx_firspass[0][1][3] = 0
4524 00:48:38.773182 rx_lastpass[0][1][3] = 0
4525 00:48:38.776350 rx_firspass[0][1][4] = 0
4526 00:48:38.779608 rx_lastpass[0][1][4] = 0
4527 00:48:38.780164 rx_firspass[0][1][5] = 0
4528 00:48:38.783082 rx_lastpass[0][1][5] = 0
4529 00:48:38.786148 rx_firspass[0][1][6] = 0
4530 00:48:38.786704 rx_lastpass[0][1][6] = 0
4531 00:48:38.789637 rx_firspass[0][1][7] = 0
4532 00:48:38.793384 rx_lastpass[0][1][7] = 0
4533 00:48:38.795902 rx_firspass[0][1][8] = 0
4534 00:48:38.796336 rx_lastpass[0][1][8] = 0
4535 00:48:38.799526 rx_firspass[0][1][9] = 0
4536 00:48:38.802777 rx_lastpass[0][1][9] = 0
4537 00:48:38.803214 rx_firspass[0][1][10] = 0
4538 00:48:38.806483 rx_lastpass[0][1][10] = 0
4539 00:48:38.809552 rx_firspass[0][1][11] = 0
4540 00:48:38.809989 rx_lastpass[0][1][11] = 0
4541 00:48:38.812834 rx_firspass[0][1][12] = 0
4542 00:48:38.816406 rx_lastpass[0][1][12] = 0
4543 00:48:38.819654 rx_firspass[0][1][13] = 0
4544 00:48:38.820086 rx_lastpass[0][1][13] = 0
4545 00:48:38.822735 rx_firspass[0][1][14] = 0
4546 00:48:38.826299 rx_lastpass[0][1][14] = 0
4547 00:48:38.826812 rx_firspass[0][1][15] = 0
4548 00:48:38.829618 rx_lastpass[0][1][15] = 0
4549 00:48:38.832868 rx_firspass[1][0][0] = 0
4550 00:48:38.833380 rx_lastpass[1][0][0] = 0
4551 00:48:38.836571 rx_firspass[1][0][1] = 0
4552 00:48:38.839674 rx_lastpass[1][0][1] = 0
4553 00:48:38.840105 rx_firspass[1][0][2] = 0
4554 00:48:38.842929 rx_lastpass[1][0][2] = 0
4555 00:48:38.846701 rx_firspass[1][0][3] = 0
4556 00:48:38.849810 rx_lastpass[1][0][3] = 0
4557 00:48:38.850372 rx_firspass[1][0][4] = 0
4558 00:48:38.853423 rx_lastpass[1][0][4] = 0
4559 00:48:38.856489 rx_firspass[1][0][5] = 0
4560 00:48:38.857068 rx_lastpass[1][0][5] = 0
4561 00:48:38.859872 rx_firspass[1][0][6] = 0
4562 00:48:38.863202 rx_lastpass[1][0][6] = 0
4563 00:48:38.863715 rx_firspass[1][0][7] = 0
4564 00:48:38.866292 rx_lastpass[1][0][7] = 0
4565 00:48:38.869840 rx_firspass[1][0][8] = 0
4566 00:48:38.870402 rx_lastpass[1][0][8] = 0
4567 00:48:38.873391 rx_firspass[1][0][9] = 0
4568 00:48:38.876360 rx_lastpass[1][0][9] = 0
4569 00:48:38.876795 rx_firspass[1][0][10] = 0
4570 00:48:38.879835 rx_lastpass[1][0][10] = 0
4571 00:48:38.883423 rx_firspass[1][0][11] = 0
4572 00:48:38.886974 rx_lastpass[1][0][11] = 0
4573 00:48:38.887487 rx_firspass[1][0][12] = 0
4574 00:48:38.890052 rx_lastpass[1][0][12] = 0
4575 00:48:38.893395 rx_firspass[1][0][13] = 0
4576 00:48:38.893909 rx_lastpass[1][0][13] = 0
4577 00:48:38.896684 rx_firspass[1][0][14] = 0
4578 00:48:38.900060 rx_lastpass[1][0][14] = 0
4579 00:48:38.903128 rx_firspass[1][0][15] = 0
4580 00:48:38.903561 rx_lastpass[1][0][15] = 0
4581 00:48:38.906661 rx_firspass[1][1][0] = 0
4582 00:48:38.909988 rx_lastpass[1][1][0] = 0
4583 00:48:38.910471 rx_firspass[1][1][1] = 0
4584 00:48:38.913022 rx_lastpass[1][1][1] = 0
4585 00:48:38.916628 rx_firspass[1][1][2] = 0
4586 00:48:38.917055 rx_lastpass[1][1][2] = 0
4587 00:48:38.920266 rx_firspass[1][1][3] = 0
4588 00:48:38.923032 rx_lastpass[1][1][3] = 0
4589 00:48:38.923470 rx_firspass[1][1][4] = 0
4590 00:48:38.926562 rx_lastpass[1][1][4] = 0
4591 00:48:38.929930 rx_firspass[1][1][5] = 0
4592 00:48:38.930502 rx_lastpass[1][1][5] = 0
4593 00:48:38.933296 rx_firspass[1][1][6] = 0
4594 00:48:38.936476 rx_lastpass[1][1][6] = 0
4595 00:48:38.936986 rx_firspass[1][1][7] = 0
4596 00:48:38.939778 rx_lastpass[1][1][7] = 0
4597 00:48:38.943231 rx_firspass[1][1][8] = 0
4598 00:48:38.946689 rx_lastpass[1][1][8] = 0
4599 00:48:38.947199 rx_firspass[1][1][9] = 0
4600 00:48:38.950037 rx_lastpass[1][1][9] = 0
4601 00:48:38.953129 rx_firspass[1][1][10] = 0
4602 00:48:38.953565 rx_lastpass[1][1][10] = 0
4603 00:48:38.956948 rx_firspass[1][1][11] = 0
4604 00:48:38.960225 rx_lastpass[1][1][11] = 0
4605 00:48:38.960732 rx_firspass[1][1][12] = 0
4606 00:48:38.963304 rx_lastpass[1][1][12] = 0
4607 00:48:38.966491 rx_firspass[1][1][13] = 0
4608 00:48:38.969975 rx_lastpass[1][1][13] = 0
4609 00:48:38.970539 rx_firspass[1][1][14] = 0
4610 00:48:38.972900 rx_lastpass[1][1][14] = 0
4611 00:48:38.976774 rx_firspass[1][1][15] = 0
4612 00:48:38.977288 rx_lastpass[1][1][15] = 0
4613 00:48:38.979971 dump params clk_delay
4614 00:48:38.983139 clk_delay[0] = 0
4615 00:48:38.983646 clk_delay[1] = 0
4616 00:48:38.986709 dump params dqs_delay
4617 00:48:38.987225 dqs_delay[0][0] = 0
4618 00:48:38.990091 dqs_delay[0][1] = 0
4619 00:48:38.990649 dqs_delay[1][0] = 0
4620 00:48:38.993368 dqs_delay[1][1] = 0
4621 00:48:38.996423 dump params delay_cell_unit = 753
4622 00:48:38.996857 dump source = 0x0
4623 00:48:38.999907 dump params frequency:800
4624 00:48:39.003224 dump params rank number:2
4625 00:48:39.003680
4626 00:48:39.004037 dump params write leveling
4627 00:48:39.006507 write leveling[0][0][0] = 0x0
4628 00:48:39.009784 write leveling[0][0][1] = 0x0
4629 00:48:39.013140 write leveling[0][1][0] = 0x0
4630 00:48:39.016412 write leveling[0][1][1] = 0x0
4631 00:48:39.016999 write leveling[1][0][0] = 0x0
4632 00:48:39.019826 write leveling[1][0][1] = 0x0
4633 00:48:39.023429 write leveling[1][1][0] = 0x0
4634 00:48:39.026420 write leveling[1][1][1] = 0x0
4635 00:48:39.026861 dump params cbt_cs
4636 00:48:39.029728 cbt_cs[0][0] = 0x0
4637 00:48:39.030164 cbt_cs[0][1] = 0x0
4638 00:48:39.032991 cbt_cs[1][0] = 0x0
4639 00:48:39.033426 cbt_cs[1][1] = 0x0
4640 00:48:39.036389 dump params cbt_mr12
4641 00:48:39.036828 cbt_mr12[0][0] = 0x0
4642 00:48:39.039934 cbt_mr12[0][1] = 0x0
4643 00:48:39.043127 cbt_mr12[1][0] = 0x0
4644 00:48:39.043565 cbt_mr12[1][1] = 0x0
4645 00:48:39.046609 dump params tx window
4646 00:48:39.047092 tx_center_min[0][0][0] = 0
4647 00:48:39.049805 tx_center_max[0][0][0] = 0
4648 00:48:39.053465 tx_center_min[0][0][1] = 0
4649 00:48:39.056904 tx_center_max[0][0][1] = 0
4650 00:48:39.057433 tx_center_min[0][1][0] = 0
4651 00:48:39.060172 tx_center_max[0][1][0] = 0
4652 00:48:39.063255 tx_center_min[0][1][1] = 0
4653 00:48:39.066610 tx_center_max[0][1][1] = 0
4654 00:48:39.067053 tx_center_min[1][0][0] = 0
4655 00:48:39.069997 tx_center_max[1][0][0] = 0
4656 00:48:39.073341 tx_center_min[1][0][1] = 0
4657 00:48:39.076761 tx_center_max[1][0][1] = 0
4658 00:48:39.077281 tx_center_min[1][1][0] = 0
4659 00:48:39.080388 tx_center_max[1][1][0] = 0
4660 00:48:39.083619 tx_center_min[1][1][1] = 0
4661 00:48:39.086991 tx_center_max[1][1][1] = 0
4662 00:48:39.087516 dump params tx window
4663 00:48:39.090467 tx_win_center[0][0][0] = 0
4664 00:48:39.093873 tx_first_pass[0][0][0] = 0
4665 00:48:39.094434 tx_last_pass[0][0][0] = 0
4666 00:48:39.097078 tx_win_center[0][0][1] = 0
4667 00:48:39.100616 tx_first_pass[0][0][1] = 0
4668 00:48:39.101136 tx_last_pass[0][0][1] = 0
4669 00:48:39.103843 tx_win_center[0][0][2] = 0
4670 00:48:39.107051 tx_first_pass[0][0][2] = 0
4671 00:48:39.110163 tx_last_pass[0][0][2] = 0
4672 00:48:39.110638 tx_win_center[0][0][3] = 0
4673 00:48:39.113619 tx_first_pass[0][0][3] = 0
4674 00:48:39.116917 tx_last_pass[0][0][3] = 0
4675 00:48:39.117350 tx_win_center[0][0][4] = 0
4676 00:48:39.120410 tx_first_pass[0][0][4] = 0
4677 00:48:39.123443 tx_last_pass[0][0][4] = 0
4678 00:48:39.126900 tx_win_center[0][0][5] = 0
4679 00:48:39.127337 tx_first_pass[0][0][5] = 0
4680 00:48:39.130077 tx_last_pass[0][0][5] = 0
4681 00:48:39.133604 tx_win_center[0][0][6] = 0
4682 00:48:39.136970 tx_first_pass[0][0][6] = 0
4683 00:48:39.137582 tx_last_pass[0][0][6] = 0
4684 00:48:39.140055 tx_win_center[0][0][7] = 0
4685 00:48:39.143517 tx_first_pass[0][0][7] = 0
4686 00:48:39.144035 tx_last_pass[0][0][7] = 0
4687 00:48:39.147014 tx_win_center[0][0][8] = 0
4688 00:48:39.150295 tx_first_pass[0][0][8] = 0
4689 00:48:39.153756 tx_last_pass[0][0][8] = 0
4690 00:48:39.154386 tx_win_center[0][0][9] = 0
4691 00:48:39.157045 tx_first_pass[0][0][9] = 0
4692 00:48:39.160385 tx_last_pass[0][0][9] = 0
4693 00:48:39.163621 tx_win_center[0][0][10] = 0
4694 00:48:39.164137 tx_first_pass[0][0][10] = 0
4695 00:48:39.166852 tx_last_pass[0][0][10] = 0
4696 00:48:39.170440 tx_win_center[0][0][11] = 0
4697 00:48:39.173893 tx_first_pass[0][0][11] = 0
4698 00:48:39.174441 tx_last_pass[0][0][11] = 0
4699 00:48:39.177142 tx_win_center[0][0][12] = 0
4700 00:48:39.180235 tx_first_pass[0][0][12] = 0
4701 00:48:39.183906 tx_last_pass[0][0][12] = 0
4702 00:48:39.184425 tx_win_center[0][0][13] = 0
4703 00:48:39.186846 tx_first_pass[0][0][13] = 0
4704 00:48:39.190391 tx_last_pass[0][0][13] = 0
4705 00:48:39.190966 tx_win_center[0][0][14] = 0
4706 00:48:39.193677 tx_first_pass[0][0][14] = 0
4707 00:48:39.197336 tx_last_pass[0][0][14] = 0
4708 00:48:39.200466 tx_win_center[0][0][15] = 0
4709 00:48:39.203720 tx_first_pass[0][0][15] = 0
4710 00:48:39.204234 tx_last_pass[0][0][15] = 0
4711 00:48:39.206923 tx_win_center[0][1][0] = 0
4712 00:48:39.210519 tx_first_pass[0][1][0] = 0
4713 00:48:39.211037 tx_last_pass[0][1][0] = 0
4714 00:48:39.213672 tx_win_center[0][1][1] = 0
4715 00:48:39.216871 tx_first_pass[0][1][1] = 0
4716 00:48:39.220541 tx_last_pass[0][1][1] = 0
4717 00:48:39.221075 tx_win_center[0][1][2] = 0
4718 00:48:39.223645 tx_first_pass[0][1][2] = 0
4719 00:48:39.226966 tx_last_pass[0][1][2] = 0
4720 00:48:39.227403 tx_win_center[0][1][3] = 0
4721 00:48:39.230739 tx_first_pass[0][1][3] = 0
4722 00:48:39.234016 tx_last_pass[0][1][3] = 0
4723 00:48:39.236995 tx_win_center[0][1][4] = 0
4724 00:48:39.237438 tx_first_pass[0][1][4] = 0
4725 00:48:39.240617 tx_last_pass[0][1][4] = 0
4726 00:48:39.243852 tx_win_center[0][1][5] = 0
4727 00:48:39.247150 tx_first_pass[0][1][5] = 0
4728 00:48:39.247673 tx_last_pass[0][1][5] = 0
4729 00:48:39.250671 tx_win_center[0][1][6] = 0
4730 00:48:39.253747 tx_first_pass[0][1][6] = 0
4731 00:48:39.254302 tx_last_pass[0][1][6] = 0
4732 00:48:39.257371 tx_win_center[0][1][7] = 0
4733 00:48:39.260680 tx_first_pass[0][1][7] = 0
4734 00:48:39.263794 tx_last_pass[0][1][7] = 0
4735 00:48:39.264317 tx_win_center[0][1][8] = 0
4736 00:48:39.267227 tx_first_pass[0][1][8] = 0
4737 00:48:39.270667 tx_last_pass[0][1][8] = 0
4738 00:48:39.271193 tx_win_center[0][1][9] = 0
4739 00:48:39.273858 tx_first_pass[0][1][9] = 0
4740 00:48:39.277509 tx_last_pass[0][1][9] = 0
4741 00:48:39.280824 tx_win_center[0][1][10] = 0
4742 00:48:39.281347 tx_first_pass[0][1][10] = 0
4743 00:48:39.283832 tx_last_pass[0][1][10] = 0
4744 00:48:39.287366 tx_win_center[0][1][11] = 0
4745 00:48:39.290777 tx_first_pass[0][1][11] = 0
4746 00:48:39.291304 tx_last_pass[0][1][11] = 0
4747 00:48:39.294164 tx_win_center[0][1][12] = 0
4748 00:48:39.297389 tx_first_pass[0][1][12] = 0
4749 00:48:39.300712 tx_last_pass[0][1][12] = 0
4750 00:48:39.301241 tx_win_center[0][1][13] = 0
4751 00:48:39.304077 tx_first_pass[0][1][13] = 0
4752 00:48:39.308469 tx_last_pass[0][1][13] = 0
4753 00:48:39.310537 tx_win_center[0][1][14] = 0
4754 00:48:39.310988 tx_first_pass[0][1][14] = 0
4755 00:48:39.313870 tx_last_pass[0][1][14] = 0
4756 00:48:39.317136 tx_win_center[0][1][15] = 0
4757 00:48:39.320902 tx_first_pass[0][1][15] = 0
4758 00:48:39.321421 tx_last_pass[0][1][15] = 0
4759 00:48:39.323870 tx_win_center[1][0][0] = 0
4760 00:48:39.327644 tx_first_pass[1][0][0] = 0
4761 00:48:39.330589 tx_last_pass[1][0][0] = 0
4762 00:48:39.331113 tx_win_center[1][0][1] = 0
4763 00:48:39.334156 tx_first_pass[1][0][1] = 0
4764 00:48:39.337359 tx_last_pass[1][0][1] = 0
4765 00:48:39.337878 tx_win_center[1][0][2] = 0
4766 00:48:39.340774 tx_first_pass[1][0][2] = 0
4767 00:48:39.344243 tx_last_pass[1][0][2] = 0
4768 00:48:39.347222 tx_win_center[1][0][3] = 0
4769 00:48:39.347752 tx_first_pass[1][0][3] = 0
4770 00:48:39.350428 tx_last_pass[1][0][3] = 0
4771 00:48:39.354046 tx_win_center[1][0][4] = 0
4772 00:48:39.354639 tx_first_pass[1][0][4] = 0
4773 00:48:39.357191 tx_last_pass[1][0][4] = 0
4774 00:48:39.361089 tx_win_center[1][0][5] = 0
4775 00:48:39.364188 tx_first_pass[1][0][5] = 0
4776 00:48:39.364676 tx_last_pass[1][0][5] = 0
4777 00:48:39.367270 tx_win_center[1][0][6] = 0
4778 00:48:39.370729 tx_first_pass[1][0][6] = 0
4779 00:48:39.374056 tx_last_pass[1][0][6] = 0
4780 00:48:39.374537 tx_win_center[1][0][7] = 0
4781 00:48:39.377700 tx_first_pass[1][0][7] = 0
4782 00:48:39.380997 tx_last_pass[1][0][7] = 0
4783 00:48:39.381518 tx_win_center[1][0][8] = 0
4784 00:48:39.384466 tx_first_pass[1][0][8] = 0
4785 00:48:39.387427 tx_last_pass[1][0][8] = 0
4786 00:48:39.390947 tx_win_center[1][0][9] = 0
4787 00:48:39.391471 tx_first_pass[1][0][9] = 0
4788 00:48:39.394365 tx_last_pass[1][0][9] = 0
4789 00:48:39.397719 tx_win_center[1][0][10] = 0
4790 00:48:39.401035 tx_first_pass[1][0][10] = 0
4791 00:48:39.401560 tx_last_pass[1][0][10] = 0
4792 00:48:39.404043 tx_win_center[1][0][11] = 0
4793 00:48:39.407578 tx_first_pass[1][0][11] = 0
4794 00:48:39.408108 tx_last_pass[1][0][11] = 0
4795 00:48:39.411161 tx_win_center[1][0][12] = 0
4796 00:48:39.414315 tx_first_pass[1][0][12] = 0
4797 00:48:39.417741 tx_last_pass[1][0][12] = 0
4798 00:48:39.418283 tx_win_center[1][0][13] = 0
4799 00:48:39.421154 tx_first_pass[1][0][13] = 0
4800 00:48:39.424202 tx_last_pass[1][0][13] = 0
4801 00:48:39.427498 tx_win_center[1][0][14] = 0
4802 00:48:39.427983 tx_first_pass[1][0][14] = 0
4803 00:48:39.430767 tx_last_pass[1][0][14] = 0
4804 00:48:39.434456 tx_win_center[1][0][15] = 0
4805 00:48:39.437706 tx_first_pass[1][0][15] = 0
4806 00:48:39.438282 tx_last_pass[1][0][15] = 0
4807 00:48:39.441142 tx_win_center[1][1][0] = 0
4808 00:48:39.444191 tx_first_pass[1][1][0] = 0
4809 00:48:39.447570 tx_last_pass[1][1][0] = 0
4810 00:48:39.448005 tx_win_center[1][1][1] = 0
4811 00:48:39.450870 tx_first_pass[1][1][1] = 0
4812 00:48:39.454013 tx_last_pass[1][1][1] = 0
4813 00:48:39.457574 tx_win_center[1][1][2] = 0
4814 00:48:39.458008 tx_first_pass[1][1][2] = 0
4815 00:48:39.461075 tx_last_pass[1][1][2] = 0
4816 00:48:39.464204 tx_win_center[1][1][3] = 0
4817 00:48:39.464635 tx_first_pass[1][1][3] = 0
4818 00:48:39.467624 tx_last_pass[1][1][3] = 0
4819 00:48:39.470908 tx_win_center[1][1][4] = 0
4820 00:48:39.474342 tx_first_pass[1][1][4] = 0
4821 00:48:39.474778 tx_last_pass[1][1][4] = 0
4822 00:48:39.477654 tx_win_center[1][1][5] = 0
4823 00:48:39.481153 tx_first_pass[1][1][5] = 0
4824 00:48:39.481673 tx_last_pass[1][1][5] = 0
4825 00:48:39.484507 tx_win_center[1][1][6] = 0
4826 00:48:39.487810 tx_first_pass[1][1][6] = 0
4827 00:48:39.490968 tx_last_pass[1][1][6] = 0
4828 00:48:39.491405 tx_win_center[1][1][7] = 0
4829 00:48:39.494579 tx_first_pass[1][1][7] = 0
4830 00:48:39.498140 tx_last_pass[1][1][7] = 0
4831 00:48:39.498611 tx_win_center[1][1][8] = 0
4832 00:48:39.501062 tx_first_pass[1][1][8] = 0
4833 00:48:39.504463 tx_last_pass[1][1][8] = 0
4834 00:48:39.507771 tx_win_center[1][1][9] = 0
4835 00:48:39.508205 tx_first_pass[1][1][9] = 0
4836 00:48:39.511101 tx_last_pass[1][1][9] = 0
4837 00:48:39.514629 tx_win_center[1][1][10] = 0
4838 00:48:39.517856 tx_first_pass[1][1][10] = 0
4839 00:48:39.518330 tx_last_pass[1][1][10] = 0
4840 00:48:39.521163 tx_win_center[1][1][11] = 0
4841 00:48:39.524448 tx_first_pass[1][1][11] = 0
4842 00:48:39.528039 tx_last_pass[1][1][11] = 0
4843 00:48:39.528552 tx_win_center[1][1][12] = 0
4844 00:48:39.531063 tx_first_pass[1][1][12] = 0
4845 00:48:39.534598 tx_last_pass[1][1][12] = 0
4846 00:48:39.537961 tx_win_center[1][1][13] = 0
4847 00:48:39.538583 tx_first_pass[1][1][13] = 0
4848 00:48:39.540959 tx_last_pass[1][1][13] = 0
4849 00:48:39.544649 tx_win_center[1][1][14] = 0
4850 00:48:39.547984 tx_first_pass[1][1][14] = 0
4851 00:48:39.548420 tx_last_pass[1][1][14] = 0
4852 00:48:39.551066 tx_win_center[1][1][15] = 0
4853 00:48:39.554607 tx_first_pass[1][1][15] = 0
4854 00:48:39.557581 tx_last_pass[1][1][15] = 0
4855 00:48:39.558017 dump params rx window
4856 00:48:39.561199 rx_firspass[0][0][0] = 0
4857 00:48:39.564567 rx_lastpass[0][0][0] = 0
4858 00:48:39.565003 rx_firspass[0][0][1] = 0
4859 00:48:39.567586 rx_lastpass[0][0][1] = 0
4860 00:48:39.570922 rx_firspass[0][0][2] = 0
4861 00:48:39.571355 rx_lastpass[0][0][2] = 0
4862 00:48:39.574381 rx_firspass[0][0][3] = 0
4863 00:48:39.577939 rx_lastpass[0][0][3] = 0
4864 00:48:39.578499 rx_firspass[0][0][4] = 0
4865 00:48:39.581413 rx_lastpass[0][0][4] = 0
4866 00:48:39.584490 rx_firspass[0][0][5] = 0
4867 00:48:39.585007 rx_lastpass[0][0][5] = 0
4868 00:48:39.588060 rx_firspass[0][0][6] = 0
4869 00:48:39.590797 rx_lastpass[0][0][6] = 0
4870 00:48:39.591236 rx_firspass[0][0][7] = 0
4871 00:48:39.594467 rx_lastpass[0][0][7] = 0
4872 00:48:39.597909 rx_firspass[0][0][8] = 0
4873 00:48:39.601346 rx_lastpass[0][0][8] = 0
4874 00:48:39.601878 rx_firspass[0][0][9] = 0
4875 00:48:39.604691 rx_lastpass[0][0][9] = 0
4876 00:48:39.607637 rx_firspass[0][0][10] = 0
4877 00:48:39.608075 rx_lastpass[0][0][10] = 0
4878 00:48:39.611264 rx_firspass[0][0][11] = 0
4879 00:48:39.614548 rx_lastpass[0][0][11] = 0
4880 00:48:39.615207 rx_firspass[0][0][12] = 0
4881 00:48:39.617812 rx_lastpass[0][0][12] = 0
4882 00:48:39.621280 rx_firspass[0][0][13] = 0
4883 00:48:39.624565 rx_lastpass[0][0][13] = 0
4884 00:48:39.625095 rx_firspass[0][0][14] = 0
4885 00:48:39.627737 rx_lastpass[0][0][14] = 0
4886 00:48:39.630922 rx_firspass[0][0][15] = 0
4887 00:48:39.631450 rx_lastpass[0][0][15] = 0
4888 00:48:39.634338 rx_firspass[0][1][0] = 0
4889 00:48:39.637718 rx_lastpass[0][1][0] = 0
4890 00:48:39.638153 rx_firspass[0][1][1] = 0
4891 00:48:39.641259 rx_lastpass[0][1][1] = 0
4892 00:48:39.644685 rx_firspass[0][1][2] = 0
4893 00:48:39.647625 rx_lastpass[0][1][2] = 0
4894 00:48:39.648159 rx_firspass[0][1][3] = 0
4895 00:48:39.651148 rx_lastpass[0][1][3] = 0
4896 00:48:39.654537 rx_firspass[0][1][4] = 0
4897 00:48:39.654969 rx_lastpass[0][1][4] = 0
4898 00:48:39.657935 rx_firspass[0][1][5] = 0
4899 00:48:39.661277 rx_lastpass[0][1][5] = 0
4900 00:48:39.661784 rx_firspass[0][1][6] = 0
4901 00:48:39.664546 rx_lastpass[0][1][6] = 0
4902 00:48:39.667747 rx_firspass[0][1][7] = 0
4903 00:48:39.668182 rx_lastpass[0][1][7] = 0
4904 00:48:39.671154 rx_firspass[0][1][8] = 0
4905 00:48:39.674756 rx_lastpass[0][1][8] = 0
4906 00:48:39.675280 rx_firspass[0][1][9] = 0
4907 00:48:39.677849 rx_lastpass[0][1][9] = 0
4908 00:48:39.681288 rx_firspass[0][1][10] = 0
4909 00:48:39.684899 rx_lastpass[0][1][10] = 0
4910 00:48:39.685417 rx_firspass[0][1][11] = 0
4911 00:48:39.688342 rx_lastpass[0][1][11] = 0
4912 00:48:39.691266 rx_firspass[0][1][12] = 0
4913 00:48:39.691785 rx_lastpass[0][1][12] = 0
4914 00:48:39.694779 rx_firspass[0][1][13] = 0
4915 00:48:39.698017 rx_lastpass[0][1][13] = 0
4916 00:48:39.701206 rx_firspass[0][1][14] = 0
4917 00:48:39.701725 rx_lastpass[0][1][14] = 0
4918 00:48:39.704398 rx_firspass[0][1][15] = 0
4919 00:48:39.707809 rx_lastpass[0][1][15] = 0
4920 00:48:39.708333 rx_firspass[1][0][0] = 0
4921 00:48:39.711159 rx_lastpass[1][0][0] = 0
4922 00:48:39.714272 rx_firspass[1][0][1] = 0
4923 00:48:39.714716 rx_lastpass[1][0][1] = 0
4924 00:48:39.717938 rx_firspass[1][0][2] = 0
4925 00:48:39.721375 rx_lastpass[1][0][2] = 0
4926 00:48:39.721885 rx_firspass[1][0][3] = 0
4927 00:48:39.724979 rx_lastpass[1][0][3] = 0
4928 00:48:39.727711 rx_firspass[1][0][4] = 0
4929 00:48:39.731000 rx_lastpass[1][0][4] = 0
4930 00:48:39.731431 rx_firspass[1][0][5] = 0
4931 00:48:39.734507 rx_lastpass[1][0][5] = 0
4932 00:48:39.738199 rx_firspass[1][0][6] = 0
4933 00:48:39.738760 rx_lastpass[1][0][6] = 0
4934 00:48:39.741513 rx_firspass[1][0][7] = 0
4935 00:48:39.744755 rx_lastpass[1][0][7] = 0
4936 00:48:39.745262 rx_firspass[1][0][8] = 0
4937 00:48:39.747776 rx_lastpass[1][0][8] = 0
4938 00:48:39.751853 rx_firspass[1][0][9] = 0
4939 00:48:39.752373 rx_lastpass[1][0][9] = 0
4940 00:48:39.754609 rx_firspass[1][0][10] = 0
4941 00:48:39.758255 rx_lastpass[1][0][10] = 0
4942 00:48:39.758902 rx_firspass[1][0][11] = 0
4943 00:48:39.761491 rx_lastpass[1][0][11] = 0
4944 00:48:39.764855 rx_firspass[1][0][12] = 0
4945 00:48:39.768144 rx_lastpass[1][0][12] = 0
4946 00:48:39.768578 rx_firspass[1][0][13] = 0
4947 00:48:39.771265 rx_lastpass[1][0][13] = 0
4948 00:48:39.774690 rx_firspass[1][0][14] = 0
4949 00:48:39.775122 rx_lastpass[1][0][14] = 0
4950 00:48:39.778367 rx_firspass[1][0][15] = 0
4951 00:48:39.781178 rx_lastpass[1][0][15] = 0
4952 00:48:39.781611 rx_firspass[1][1][0] = 0
4953 00:48:39.784893 rx_lastpass[1][1][0] = 0
4954 00:48:39.788229 rx_firspass[1][1][1] = 0
4955 00:48:39.791497 rx_lastpass[1][1][1] = 0
4956 00:48:39.792028 rx_firspass[1][1][2] = 0
4957 00:48:39.795041 rx_lastpass[1][1][2] = 0
4958 00:48:39.798309 rx_firspass[1][1][3] = 0
4959 00:48:39.798827 rx_lastpass[1][1][3] = 0
4960 00:48:39.801764 rx_firspass[1][1][4] = 0
4961 00:48:39.804908 rx_lastpass[1][1][4] = 0
4962 00:48:39.805429 rx_firspass[1][1][5] = 0
4963 00:48:39.808177 rx_lastpass[1][1][5] = 0
4964 00:48:39.811179 rx_firspass[1][1][6] = 0
4965 00:48:39.811616 rx_lastpass[1][1][6] = 0
4966 00:48:39.814665 rx_firspass[1][1][7] = 0
4967 00:48:39.817860 rx_lastpass[1][1][7] = 0
4968 00:48:39.818332 rx_firspass[1][1][8] = 0
4969 00:48:39.821483 rx_lastpass[1][1][8] = 0
4970 00:48:39.824841 rx_firspass[1][1][9] = 0
4971 00:48:39.825365 rx_lastpass[1][1][9] = 0
4972 00:48:39.828142 rx_firspass[1][1][10] = 0
4973 00:48:39.831562 rx_lastpass[1][1][10] = 0
4974 00:48:39.834864 rx_firspass[1][1][11] = 0
4975 00:48:39.835299 rx_lastpass[1][1][11] = 0
4976 00:48:39.838190 rx_firspass[1][1][12] = 0
4977 00:48:39.841757 rx_lastpass[1][1][12] = 0
4978 00:48:39.842317 rx_firspass[1][1][13] = 0
4979 00:48:39.844971 rx_lastpass[1][1][13] = 0
4980 00:48:39.848342 rx_firspass[1][1][14] = 0
4981 00:48:39.851645 rx_lastpass[1][1][14] = 0
4982 00:48:39.852167 rx_firspass[1][1][15] = 0
4983 00:48:39.854776 rx_lastpass[1][1][15] = 0
4984 00:48:39.858358 dump params clk_delay
4985 00:48:39.858877 clk_delay[0] = 0
4986 00:48:39.861651 clk_delay[1] = 0
4987 00:48:39.862169 dump params dqs_delay
4988 00:48:39.864679 dqs_delay[0][0] = 0
4989 00:48:39.865118 dqs_delay[0][1] = 0
4990 00:48:39.868238 dqs_delay[1][0] = 0
4991 00:48:39.868673 dqs_delay[1][1] = 0
4992 00:48:39.871515 dump params delay_cell_unit = 753
4993 00:48:39.874887 mt_set_emi_preloader end
4994 00:48:39.878047 [mt_mem_init] dram size: 0x100000000, rank number: 2
4995 00:48:39.884931 [complex_mem_test] start addr:0x40000000, len:20480
4996 00:48:39.920504 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4997 00:48:39.926786 [complex_mem_test] start addr:0x80000000, len:20480
4998 00:48:39.963020 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4999 00:48:39.969571 [complex_mem_test] start addr:0xc0000000, len:20480
5000 00:48:40.005108 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5001 00:48:40.011651 [complex_mem_test] start addr:0x56000000, len:8192
5002 00:48:40.028033 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5003 00:48:40.028540 ddr_geometry:1
5004 00:48:40.034573 [complex_mem_test] start addr:0x80000000, len:8192
5005 00:48:40.052162 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5006 00:48:40.055298 dram_init: dram init end (result: 0)
5007 00:48:40.062365 Successfully loaded DRAM blobs and ran DRAM calibration
5008 00:48:40.072185 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5009 00:48:40.072719 CBMEM:
5010 00:48:40.075331 IMD: root @ 00000000fffff000 254 entries.
5011 00:48:40.078535 IMD: root @ 00000000ffffec00 62 entries.
5012 00:48:40.085530 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5013 00:48:40.092382 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5014 00:48:40.095196 in-header: 03 a1 00 00 08 00 00 00
5015 00:48:40.098590 in-data: 84 60 60 10 00 00 00 00
5016 00:48:40.102143 Chrome EC: clear events_b mask to 0x0000000020004000
5017 00:48:40.109588 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5018 00:48:40.112374 in-header: 03 fd 00 00 00 00 00 00
5019 00:48:40.112891 in-data:
5020 00:48:40.118989 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5021 00:48:40.119525 CBFS @ 21000 size 3d4000
5022 00:48:40.125864 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5023 00:48:40.129136 CBFS: Locating 'fallback/ramstage'
5024 00:48:40.132129 CBFS: Found @ offset 10d40 size d563
5025 00:48:40.153991 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5026 00:48:40.166313 Accumulated console time in romstage 12881 ms
5027 00:48:40.166898
5028 00:48:40.167248
5029 00:48:40.175761 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5030 00:48:40.179106 ARM64: Exception handlers installed.
5031 00:48:40.179646 ARM64: Testing exception
5032 00:48:40.182652 ARM64: Done test exception
5033 00:48:40.185898 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5034 00:48:40.189322 Manufacturer: ef
5035 00:48:40.192466 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5036 00:48:40.199385 WARNING: RO_VPD is uninitialized or empty.
5037 00:48:40.202728 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5038 00:48:40.205600 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5039 00:48:40.215548 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5040 00:48:40.219234 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5041 00:48:40.225722 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5042 00:48:40.226284 Enumerating buses...
5043 00:48:40.232443 Show all devs... Before device enumeration.
5044 00:48:40.232967 Root Device: enabled 1
5045 00:48:40.235830 CPU_CLUSTER: 0: enabled 1
5046 00:48:40.236387 CPU: 00: enabled 1
5047 00:48:40.238930 Compare with tree...
5048 00:48:40.242505 Root Device: enabled 1
5049 00:48:40.243065 CPU_CLUSTER: 0: enabled 1
5050 00:48:40.245509 CPU: 00: enabled 1
5051 00:48:40.249075 Root Device scanning...
5052 00:48:40.249597 root_dev_scan_bus for Root Device
5053 00:48:40.252333 CPU_CLUSTER: 0 enabled
5054 00:48:40.255436 root_dev_scan_bus for Root Device done
5055 00:48:40.262066 scan_bus: scanning of bus Root Device took 10690 usecs
5056 00:48:40.262636 done
5057 00:48:40.265588 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5058 00:48:40.268695 Allocating resources...
5059 00:48:40.269199 Reading resources...
5060 00:48:40.272278 Root Device read_resources bus 0 link: 0
5061 00:48:40.279119 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5062 00:48:40.279646 CPU: 00 missing read_resources
5063 00:48:40.285703 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5064 00:48:40.289199 Root Device read_resources bus 0 link: 0 done
5065 00:48:40.292235 Done reading resources.
5066 00:48:40.295846 Show resources in subtree (Root Device)...After reading.
5067 00:48:40.299309 Root Device child on link 0 CPU_CLUSTER: 0
5068 00:48:40.302652 CPU_CLUSTER: 0 child on link 0 CPU: 00
5069 00:48:40.312552 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5070 00:48:40.313085 CPU: 00
5071 00:48:40.315706 Setting resources...
5072 00:48:40.318904 Root Device assign_resources, bus 0 link: 0
5073 00:48:40.322515 CPU_CLUSTER: 0 missing set_resources
5074 00:48:40.326032 Root Device assign_resources, bus 0 link: 0
5075 00:48:40.329471 Done setting resources.
5076 00:48:40.332950 Show resources in subtree (Root Device)...After assigning values.
5077 00:48:40.339138 Root Device child on link 0 CPU_CLUSTER: 0
5078 00:48:40.342936 CPU_CLUSTER: 0 child on link 0 CPU: 00
5079 00:48:40.349583 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5080 00:48:40.352715 CPU: 00
5081 00:48:40.353239 Done allocating resources.
5082 00:48:40.359326 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5083 00:48:40.359849 Enabling resources...
5084 00:48:40.362619 done.
5085 00:48:40.366057 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5086 00:48:40.369229 Initializing devices...
5087 00:48:40.369665 Root Device init ...
5088 00:48:40.373259 mainboard_init: Starting display init.
5089 00:48:40.376048 ADC[4]: Raw value=77032 ID=0
5090 00:48:40.398667 anx7625_power_on_init: Init interface.
5091 00:48:40.401668 anx7625_disable_pd_protocol: Disabled PD feature.
5092 00:48:40.408321 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5093 00:48:40.465887 anx7625_start_dp_work: Secure OCM version=00
5094 00:48:40.468665 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5095 00:48:40.489225 sp_tx_get_edid_block: EDID Block = 1
5096 00:48:40.603181 Extracted contents:
5097 00:48:40.606516 header: 00 ff ff ff ff ff ff 00
5098 00:48:40.609737 serial number: 06 af 5c 14 00 00 00 00 00 1a
5099 00:48:40.613153 version: 01 04
5100 00:48:40.616675 basic params: 95 1a 0e 78 02
5101 00:48:40.619589 chroma info: 99 85 95 55 56 92 28 22 50 54
5102 00:48:40.622903 established: 00 00 00
5103 00:48:40.630199 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5104 00:48:40.632858 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5105 00:48:40.639967 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5106 00:48:40.646273 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5107 00:48:40.653143 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5108 00:48:40.656279 extensions: 00
5109 00:48:40.656706 checksum: ae
5110 00:48:40.657051
5111 00:48:40.659985 Manufacturer: AUO Model 145c Serial Number 0
5112 00:48:40.662909 Made week 0 of 2016
5113 00:48:40.663335 EDID version: 1.4
5114 00:48:40.666420 Digital display
5115 00:48:40.669767 6 bits per primary color channel
5116 00:48:40.670306 DisplayPort interface
5117 00:48:40.673169 Maximum image size: 26 cm x 14 cm
5118 00:48:40.673604 Gamma: 220%
5119 00:48:40.676408 Check DPMS levels
5120 00:48:40.679843 Supported color formats: RGB 4:4:4
5121 00:48:40.683552 First detailed timing is preferred timing
5122 00:48:40.686548 Established timings supported:
5123 00:48:40.690027 Standard timings supported:
5124 00:48:40.690585 Detailed timings
5125 00:48:40.693172 Hex of detail: ce1d56ea50001a3030204600009010000018
5126 00:48:40.699832 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5127 00:48:40.703713 0556 0586 05a6 0640 hborder 0
5128 00:48:40.706664 0300 0304 030a 031a vborder 0
5129 00:48:40.710140 -hsync -vsync
5130 00:48:40.713089 Did detailed timing
5131 00:48:40.716751 Hex of detail: 0000000f0000000000000000000000000020
5132 00:48:40.719878 Manufacturer-specified data, tag 15
5133 00:48:40.723438 Hex of detail: 000000fe0041554f0a202020202020202020
5134 00:48:40.726422 ASCII string: AUO
5135 00:48:40.729798 Hex of detail: 000000fe004231313658414230312e34200a
5136 00:48:40.733490 ASCII string: B116XAB01.4
5137 00:48:40.734000 Checksum
5138 00:48:40.736578 Checksum: 0xae (valid)
5139 00:48:40.739746 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5140 00:48:40.743196 DSI data_rate: 457800000 bps
5141 00:48:40.750380 anx7625_parse_edid: set default k value to 0x3d for panel
5142 00:48:40.753371 anx7625_parse_edid: pixelclock(76300).
5143 00:48:40.756684 hactive(1366), hsync(32), hfp(48), hbp(154)
5144 00:48:40.760304 vactive(768), vsync(6), vfp(4), vbp(16)
5145 00:48:40.763469 anx7625_dsi_config: config dsi.
5146 00:48:40.771157 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5147 00:48:40.792354 anx7625_dsi_config: success to config DSI
5148 00:48:40.795534 anx7625_dp_start: MIPI phy setup OK.
5149 00:48:40.798874 [SSUSB] Setting up USB HOST controller...
5150 00:48:40.802305 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5151 00:48:40.805564 [SSUSB] phy power-on done.
5152 00:48:40.809349 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5153 00:48:40.812423 in-header: 03 fc 01 00 00 00 00 00
5154 00:48:40.812846 in-data:
5155 00:48:40.816135 handle_proto3_response: EC response with error code: 1
5156 00:48:40.819272 SPM: pcm index = 1
5157 00:48:40.823084 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5158 00:48:40.826385 CBFS @ 21000 size 3d4000
5159 00:48:40.833017 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5160 00:48:40.836602 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5161 00:48:40.839740 CBFS: Found @ offset 1e7c0 size 1026
5162 00:48:40.846335 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5163 00:48:40.849454 SPM: binary array size = 2988
5164 00:48:40.852520 SPM: version = pcm_allinone_v1.17.2_20180829
5165 00:48:40.855872 SPM binary loaded in 32 msecs
5166 00:48:40.863708 spm_kick_im_to_fetch: ptr = 000000004021eec2
5167 00:48:40.866788 spm_kick_im_to_fetch: len = 2988
5168 00:48:40.867370 SPM: spm_kick_pcm_to_run
5169 00:48:40.869982 SPM: spm_kick_pcm_to_run done
5170 00:48:40.873751 SPM: spm_init done in 52 msecs
5171 00:48:40.876620 Root Device init finished in 505261 usecs
5172 00:48:40.880247 CPU_CLUSTER: 0 init ...
5173 00:48:40.887162 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5174 00:48:40.893810 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5175 00:48:40.897284 CBFS @ 21000 size 3d4000
5176 00:48:40.900397 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5177 00:48:40.903711 CBFS: Locating 'sspm.bin'
5178 00:48:40.906765 CBFS: Found @ offset 208c0 size 41cb
5179 00:48:40.916705 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5180 00:48:40.924818 CPU_CLUSTER: 0 init finished in 42799 usecs
5181 00:48:40.925338 Devices initialized
5182 00:48:40.927776 Show all devs... After init.
5183 00:48:40.931056 Root Device: enabled 1
5184 00:48:40.931493 CPU_CLUSTER: 0: enabled 1
5185 00:48:40.934485 CPU: 00: enabled 1
5186 00:48:40.937874 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5187 00:48:40.941402 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5188 00:48:40.944549 ELOG: NV offset 0x558000 size 0x1000
5189 00:48:40.952073 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5190 00:48:40.958658 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5191 00:48:40.962285 ELOG: Event(17) added with size 13 at 2024-06-16 00:48:40 UTC
5192 00:48:40.965578 out: cmd=0x121: 03 db 21 01 00 00 00 00
5193 00:48:40.968783 in-header: 03 01 00 00 2c 00 00 00
5194 00:48:40.982208 in-data: c7 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 d9 9a 01 00 06 80 00 00 22 9b 02 00 06 80 00 00 43 37 01 00 06 80 00 00 f5 f2 01 00
5195 00:48:40.985655 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5196 00:48:40.989365 in-header: 03 19 00 00 08 00 00 00
5197 00:48:40.992520 in-data: a2 e0 47 00 13 00 00 00
5198 00:48:40.995770 Chrome EC: UHEPI supported
5199 00:48:41.002677 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5200 00:48:41.005694 in-header: 03 e1 00 00 08 00 00 00
5201 00:48:41.008953 in-data: 84 20 60 10 00 00 00 00
5202 00:48:41.012269 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5203 00:48:41.019058 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5204 00:48:41.022119 in-header: 03 e1 00 00 08 00 00 00
5205 00:48:41.025804 in-data: 84 20 60 10 00 00 00 00
5206 00:48:41.032491 ELOG: Event(A1) added with size 10 at 2024-06-16 00:48:40 UTC
5207 00:48:41.038936 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5208 00:48:41.042376 ELOG: Event(A0) added with size 9 at 2024-06-16 00:48:40 UTC
5209 00:48:41.045677 elog_add_boot_reason: Logged dev mode boot
5210 00:48:41.049073 Finalize devices...
5211 00:48:41.049602 Devices finalized
5212 00:48:41.055586 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5213 00:48:41.059249 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5214 00:48:41.065745 ELOG: Event(91) added with size 10 at 2024-06-16 00:48:40 UTC
5215 00:48:41.068922 Writing coreboot table at 0xffeda000
5216 00:48:41.072333 0. 0000000000114000-000000000011efff: RAMSTAGE
5217 00:48:41.075985 1. 0000000040000000-000000004023cfff: RAMSTAGE
5218 00:48:41.082705 2. 000000004023d000-00000000545fffff: RAM
5219 00:48:41.086157 3. 0000000054600000-000000005465ffff: BL31
5220 00:48:41.089609 4. 0000000054660000-00000000ffed9fff: RAM
5221 00:48:41.092711 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5222 00:48:41.099581 6. 0000000100000000-000000013fffffff: RAM
5223 00:48:41.100100 Passing 5 GPIOs to payload:
5224 00:48:41.106141 NAME | PORT | POLARITY | VALUE
5225 00:48:41.109444 write protect | 0x00000096 | low | high
5226 00:48:41.112701 EC in RW | 0x000000b1 | high | undefined
5227 00:48:41.119644 EC interrupt | 0x00000097 | low | undefined
5228 00:48:41.122673 TPM interrupt | 0x00000099 | high | undefined
5229 00:48:41.129473 speaker enable | 0x000000af | high | undefined
5230 00:48:41.132590 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5231 00:48:41.136113 in-header: 03 f7 00 00 02 00 00 00
5232 00:48:41.136642 in-data: 04 00
5233 00:48:41.136992 Board ID: 4
5234 00:48:41.139119 ADC[3]: Raw value=1040299 ID=8
5235 00:48:41.142669 RAM code: 8
5236 00:48:41.143106 SKU ID: 16
5237 00:48:41.145906 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5238 00:48:41.149597 CBFS @ 21000 size 3d4000
5239 00:48:41.156126 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5240 00:48:41.159282 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5a2
5241 00:48:41.162938 coreboot table: 940 bytes.
5242 00:48:41.166348 IMD ROOT 0. 00000000fffff000 00001000
5243 00:48:41.169542 IMD SMALL 1. 00000000ffffe000 00001000
5244 00:48:41.172582 CONSOLE 2. 00000000fffde000 00020000
5245 00:48:41.176085 FMAP 3. 00000000fffdd000 0000047c
5246 00:48:41.179621 TIME STAMP 4. 00000000fffdc000 00000910
5247 00:48:41.186152 RAMOOPS 5. 00000000ffedc000 00100000
5248 00:48:41.189250 COREBOOT 6. 00000000ffeda000 00002000
5249 00:48:41.189692 IMD small region:
5250 00:48:41.192795 IMD ROOT 0. 00000000ffffec00 00000400
5251 00:48:41.196214 VBOOT WORK 1. 00000000ffffeb00 00000100
5252 00:48:41.203141 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5253 00:48:41.206442 VPD 3. 00000000ffffea60 0000006c
5254 00:48:41.209492 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5255 00:48:41.216317 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5256 00:48:41.219483 in-header: 03 e1 00 00 08 00 00 00
5257 00:48:41.222746 in-data: 84 20 60 10 00 00 00 00
5258 00:48:41.226039 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5259 00:48:41.229573 CBFS @ 21000 size 3d4000
5260 00:48:41.236104 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5261 00:48:41.239509 CBFS: Locating 'fallback/payload'
5262 00:48:41.245849 CBFS: Found @ offset dc040 size 439a0
5263 00:48:41.334378 read SPI 0xfd078 0x439a0: 84378 us, 3281 KB/s, 26.248 Mbps
5264 00:48:41.337404 Checking segment from ROM address 0x0000000040003a00
5265 00:48:41.344296 Checking segment from ROM address 0x0000000040003a1c
5266 00:48:41.347191 Loading segment from ROM address 0x0000000040003a00
5267 00:48:41.350748 code (compression=0)
5268 00:48:41.360675 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5269 00:48:41.367370 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5270 00:48:41.370523 it's not compressed!
5271 00:48:41.374121 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5272 00:48:41.380858 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5273 00:48:41.388558 Loading segment from ROM address 0x0000000040003a1c
5274 00:48:41.391645 Entry Point 0x0000000080000000
5275 00:48:41.392086 Loaded segments
5276 00:48:41.398529 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5277 00:48:41.401857 Jumping to boot code at 0000000080000000(00000000ffeda000)
5278 00:48:41.411480 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5279 00:48:41.415499 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5280 00:48:41.418142 CBFS @ 21000 size 3d4000
5281 00:48:41.424790 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5282 00:48:41.428240 CBFS: Locating 'fallback/bl31'
5283 00:48:41.431348 CBFS: Found @ offset 36dc0 size 5820
5284 00:48:41.442078 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5285 00:48:41.445398 Checking segment from ROM address 0x0000000040003a00
5286 00:48:41.452419 Checking segment from ROM address 0x0000000040003a1c
5287 00:48:41.455653 Loading segment from ROM address 0x0000000040003a00
5288 00:48:41.458727 code (compression=1)
5289 00:48:41.465609 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5290 00:48:41.475735 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5291 00:48:41.476265 using LZMA
5292 00:48:41.484278 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5293 00:48:41.490737 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5294 00:48:41.494093 Loading segment from ROM address 0x0000000040003a1c
5295 00:48:41.497768 Entry Point 0x0000000054601000
5296 00:48:41.498326 Loaded segments
5297 00:48:41.501008 NOTICE: MT8183 bl31_setup
5298 00:48:41.507947 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5299 00:48:41.511460 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5300 00:48:41.514712 INFO: [DEVAPC] dump DEVAPC registers:
5301 00:48:41.524454 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5302 00:48:41.531300 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5303 00:48:41.538372 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5304 00:48:41.548398 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5305 00:48:41.554634 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5306 00:48:41.565047 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5307 00:48:41.571519 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5308 00:48:41.582093 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5309 00:48:41.588322 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5310 00:48:41.598387 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5311 00:48:41.605055 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5312 00:48:41.615423 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5313 00:48:41.621540 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5314 00:48:41.628667 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5315 00:48:41.634825 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5316 00:48:41.644941 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5317 00:48:41.651700 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5318 00:48:41.658456 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5319 00:48:41.665022 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5320 00:48:41.671730 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5321 00:48:41.681643 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5322 00:48:41.688212 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5323 00:48:41.691617 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5324 00:48:41.694923 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5325 00:48:41.698038 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5326 00:48:41.701627 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5327 00:48:41.705076 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5328 00:48:41.711731 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5329 00:48:41.715070 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5330 00:48:41.718366 WARNING: region 0:
5331 00:48:41.721478 WARNING: apc:0x168, sa:0x0, ea:0xfff
5332 00:48:41.721910 WARNING: region 1:
5333 00:48:41.724913 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5334 00:48:41.728527 WARNING: region 2:
5335 00:48:41.731586 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5336 00:48:41.732023 WARNING: region 3:
5337 00:48:41.738450 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5338 00:48:41.738891 WARNING: region 4:
5339 00:48:41.741786 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5340 00:48:41.744913 WARNING: region 5:
5341 00:48:41.748362 WARNING: apc:0x0, sa:0x0, ea:0x0
5342 00:48:41.748746 WARNING: region 6:
5343 00:48:41.751771 WARNING: apc:0x0, sa:0x0, ea:0x0
5344 00:48:41.755161 WARNING: region 7:
5345 00:48:41.755547 WARNING: apc:0x0, sa:0x0, ea:0x0
5346 00:48:41.765061 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5347 00:48:41.768611 INFO: SPM: enable SPMC mode
5348 00:48:41.769001 NOTICE: spm_boot_init() start
5349 00:48:41.771911 NOTICE: spm_boot_init() end
5350 00:48:41.775271 INFO: BL31: Initializing runtime services
5351 00:48:41.781854 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5352 00:48:41.785567 INFO: BL31: Preparing for EL3 exit to normal world
5353 00:48:41.791686 INFO: Entry point address = 0x80000000
5354 00:48:41.792178 INFO: SPSR = 0x8
5355 00:48:41.814205
5356 00:48:41.814728
5357 00:48:41.815054
5358 00:48:41.816535 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5359 00:48:41.817045 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5360 00:48:41.817466 Setting prompt string to ['jacuzzi:']
5361 00:48:41.817866 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5362 00:48:41.818562 Starting depthcharge on Juniper...
5363 00:48:41.818912
5364 00:48:41.821296 vboot_handoff: creating legacy vboot_handoff structure
5365 00:48:41.821829
5366 00:48:41.824341 ec_init(0): CrosEC protocol v3 supported (544, 544)
5367 00:48:41.824770
5368 00:48:41.827305 Wipe memory regions:
5369 00:48:41.827731
5370 00:48:41.831033 [0x00000040000000, 0x00000054600000)
5371 00:48:41.873942
5372 00:48:41.874571 [0x00000054660000, 0x00000080000000)
5373 00:48:41.964859
5374 00:48:41.965344 [0x000000811994a0, 0x000000ffeda000)
5375 00:48:42.224291
5376 00:48:42.224799 [0x00000100000000, 0x00000140000000)
5377 00:48:42.357222
5378 00:48:42.360171 Initializing XHCI USB controller at 0x11200000.
5379 00:48:42.383210
5380 00:48:42.386637 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5381 00:48:42.387156
5382 00:48:42.387497
5383 00:48:42.388260 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5385 00:48:42.489485 jacuzzi: tftpboot 192.168.201.1 14368415/tftp-deploy-74mm1aju/kernel/image.itb 14368415/tftp-deploy-74mm1aju/kernel/cmdline
5386 00:48:42.490204 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5387 00:48:42.490681 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5388 00:48:42.495088 tftpboot 192.168.201.1 14368415/tftp-deploy-74mm1aju/kernel/image.ittp-deploy-74mm1aju/kernel/cmdline
5389 00:48:42.495533
5390 00:48:42.495890 Waiting for link
5391 00:48:43.043668
5392 00:48:43.044186 R8152: Initializing
5393 00:48:43.044534
5394 00:48:43.046719 Version 9 (ocp_data = 6010)
5395 00:48:43.047155
5396 00:48:43.050182 R8152: Done initializing
5397 00:48:43.050810
5398 00:48:43.051166 Adding net device
5399 00:48:43.229089
5400 00:48:43.229608 R8152: Initializing
5401 00:48:43.229959
5402 00:48:43.232527 Version 9 (ocp_data = 6010)
5403 00:48:43.233054
5404 00:48:43.235629 R8152: Done initializing
5405 00:48:43.236070
5406 00:48:43.238689 net_add_device: Attemp to include the same device
5407 00:48:43.625080
5408 00:48:43.625604 done.
5409 00:48:43.625958
5410 00:48:43.626331 MAC: 00:e0:4c:68:03:2b
5411 00:48:43.626651
5412 00:48:43.628271 Sending DHCP discover... done.
5413 00:48:43.628707
5414 00:48:43.631685 Waiting for reply... done.
5415 00:48:43.632213
5416 00:48:43.635042 Sending DHCP request... done.
5417 00:48:43.635573
5418 00:48:43.641603 Waiting for reply... done.
5419 00:48:43.642130
5420 00:48:43.642518 My ip is 192.168.201.17
5421 00:48:43.642840
5422 00:48:43.644859 The DHCP server ip is 192.168.201.1
5423 00:48:43.645385
5424 00:48:43.651811 TFTP server IP predefined by user: 192.168.201.1
5425 00:48:43.652380
5426 00:48:43.658169 Bootfile predefined by user: 14368415/tftp-deploy-74mm1aju/kernel/image.itb
5427 00:48:43.658758
5428 00:48:43.659112 Sending tftp read request... done.
5429 00:48:43.661460
5430 00:48:43.668499 Waiting for the transfer...
5431 00:48:43.669019
5432 00:48:44.095388 00000000 ################################################################
5433 00:48:44.095867
5434 00:48:44.496360 00080000 ################################################################
5435 00:48:44.496939
5436 00:48:44.810345 00100000 ################################################################
5437 00:48:44.810500
5438 00:48:45.104742 00180000 ################################################################
5439 00:48:45.104866
5440 00:48:45.396064 00200000 ################################################################
5441 00:48:45.396194
5442 00:48:45.671668 00280000 ################################################################
5443 00:48:45.671791
5444 00:48:45.951570 00300000 ################################################################
5445 00:48:45.951697
5446 00:48:46.253477 00380000 ################################################################
5447 00:48:46.253590
5448 00:48:46.558747 00400000 ################################################################
5449 00:48:46.558879
5450 00:48:46.863636 00480000 ################################################################
5451 00:48:46.863761
5452 00:48:47.138771 00500000 ################################################################
5453 00:48:47.138902
5454 00:48:47.410909 00580000 ################################################################
5455 00:48:47.411033
5456 00:48:47.679824 00600000 ################################################################
5457 00:48:47.679950
5458 00:48:47.974139 00680000 ################################################################
5459 00:48:47.974302
5460 00:48:48.228041 00700000 ################################################################
5461 00:48:48.228172
5462 00:48:48.498143 00780000 ################################################################
5463 00:48:48.498276
5464 00:48:48.775112 00800000 ################################################################
5465 00:48:48.775247
5466 00:48:49.051252 00880000 ################################################################
5467 00:48:49.051373
5468 00:48:49.317698 00900000 ################################################################
5469 00:48:49.317814
5470 00:48:49.576885 00980000 ################################################################
5471 00:48:49.577009
5472 00:48:49.855175 00a00000 ################################################################
5473 00:48:49.855298
5474 00:48:50.127985 00a80000 ################################################################
5475 00:48:50.128104
5476 00:48:50.424996 00b00000 ################################################################
5477 00:48:50.425120
5478 00:48:50.721859 00b80000 ################################################################
5479 00:48:50.721985
5480 00:48:51.019568 00c00000 ################################################################
5481 00:48:51.019699
5482 00:48:51.406958 00c80000 ################################################################
5483 00:48:51.407422
5484 00:48:51.796789 00d00000 ################################################################
5485 00:48:51.797313
5486 00:48:52.174169 00d80000 ################################################################
5487 00:48:52.174700
5488 00:48:52.532596 00e00000 ################################################################
5489 00:48:52.533066
5490 00:48:52.897317 00e80000 ################################################################
5491 00:48:52.897823
5492 00:48:53.269630 00f00000 ################################################################
5493 00:48:53.270092
5494 00:48:53.648730 00f80000 ################################################################
5495 00:48:53.649378
5496 00:48:54.024285 01000000 ################################################################
5497 00:48:54.024409
5498 00:48:54.320499 01080000 ################################################################
5499 00:48:54.320621
5500 00:48:54.614620 01100000 ################################################################
5501 00:48:54.614744
5502 00:48:54.914402 01180000 ################################################################
5503 00:48:54.914547
5504 00:48:55.214789 01200000 ################################################################
5505 00:48:55.214912
5506 00:48:55.515206 01280000 ################################################################
5507 00:48:55.515328
5508 00:48:55.813098 01300000 ################################################################
5509 00:48:55.813221
5510 00:48:56.114162 01380000 ################################################################
5511 00:48:56.114327
5512 00:48:56.414546 01400000 ################################################################
5513 00:48:56.414665
5514 00:48:56.714123 01480000 ################################################################
5515 00:48:56.714267
5516 00:48:57.011687 01500000 ################################################################
5517 00:48:57.011816
5518 00:48:57.311560 01580000 ################################################################
5519 00:48:57.311677
5520 00:48:57.612616 01600000 ################################################################
5521 00:48:57.612742
5522 00:48:57.913488 01680000 ################################################################
5523 00:48:57.913611
5524 00:48:58.207463 01700000 ################################################################
5525 00:48:58.207589
5526 00:48:58.503784 01780000 ################################################################
5527 00:48:58.503911
5528 00:48:58.804175 01800000 ################################################################
5529 00:48:58.804294
5530 00:48:59.105090 01880000 ################################################################
5531 00:48:59.105213
5532 00:48:59.404518 01900000 ################################################################
5533 00:48:59.404643
5534 00:48:59.701179 01980000 ################################################################
5535 00:48:59.701306
5536 00:48:59.984288 01a00000 ################################################################
5537 00:48:59.984412
5538 00:49:00.268961 01a80000 ################################################################
5539 00:49:00.269154
5540 00:49:00.545728 01b00000 ################################################################
5541 00:49:00.545849
5542 00:49:00.821654 01b80000 ################################################################
5543 00:49:00.821792
5544 00:49:01.103182 01c00000 ################################################################
5545 00:49:01.103304
5546 00:49:01.402763 01c80000 ################################################################
5547 00:49:01.402903
5548 00:49:01.703261 01d00000 ################################################################
5549 00:49:01.703385
5550 00:49:01.967420 01d80000 ################################################################
5551 00:49:01.967545
5552 00:49:02.190732 01e00000 ######################################################### done.
5553 00:49:02.190852
5554 00:49:02.194335 The bootfile was 31919362 bytes long.
5555 00:49:02.194420
5556 00:49:02.197968 Sending tftp read request... done.
5557 00:49:02.198117
5558 00:49:02.201100 Waiting for the transfer...
5559 00:49:02.201190
5560 00:49:02.201259 00000000 # done.
5561 00:49:02.201326
5562 00:49:02.211613 Command line loaded dynamically from TFTP file: 14368415/tftp-deploy-74mm1aju/kernel/cmdline
5563 00:49:02.211798
5564 00:49:02.234758 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5565 00:49:02.235035
5566 00:49:02.238384 Loading FIT.
5567 00:49:02.238685
5568 00:49:02.241821 Image ramdisk-1 has 18733250 bytes.
5569 00:49:02.242188
5570 00:49:02.242448 Image fdt-1 has 57695 bytes.
5571 00:49:02.242656
5572 00:49:02.245209 Image kernel-1 has 13126376 bytes.
5573 00:49:02.245574
5574 00:49:02.255128 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5575 00:49:02.255574
5576 00:49:02.268614 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5577 00:49:02.269133
5578 00:49:02.271728 Choosing best match conf-1 for compat google,juniper-sku16.
5579 00:49:02.276691
5580 00:49:02.281269 Connected to device vid:did:rid of 1ae0:0028:00
5581 00:49:02.288562
5582 00:49:02.291795 tpm_get_response: command 0x17b, return code 0x0
5583 00:49:02.292315
5584 00:49:02.294972 tpm_cleanup: add release locality here.
5585 00:49:02.295407
5586 00:49:02.298444 Shutting down all USB controllers.
5587 00:49:02.298875
5588 00:49:02.301739 Removing current net device
5589 00:49:02.302168
5590 00:49:02.305546 Exiting depthcharge with code 4 at timestamp: 36937873
5591 00:49:02.305982
5592 00:49:02.308265 LZMA decompressing kernel-1 to 0x80193568
5593 00:49:02.308694
5594 00:49:02.312013 LZMA decompressing kernel-1 to 0x40000000
5595 00:49:04.179669
5596 00:49:04.180306 jumping to kernel
5597 00:49:04.182093 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
5598 00:49:04.182699 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5599 00:49:04.183092 Setting prompt string to ['Linux version [0-9]']
5600 00:49:04.183452 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5601 00:49:04.183814 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5602 00:49:04.254820
5603 00:49:04.258381 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5604 00:49:04.262080 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5605 00:49:04.262704 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5606 00:49:04.263103 Setting prompt string to []
5607 00:49:04.263495 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5608 00:49:04.263857 Using line separator: #'\n'#
5609 00:49:04.264163 No login prompt set.
5610 00:49:04.264480 Parsing kernel messages
5611 00:49:04.264775 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5612 00:49:04.265303 [login-action] Waiting for messages, (timeout 00:04:05)
5613 00:49:04.265643 Waiting using forced prompt support (timeout 00:02:03)
5614 00:49:04.281659 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024
5615 00:49:04.284928 [ 0.000000] random: crng init done
5616 00:49:04.291237 [ 0.000000] Machine model: Google juniper sku16 board
5617 00:49:04.291686 [ 0.000000] efi: UEFI not found.
5618 00:49:04.301567 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5619 00:49:04.308197 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5620 00:49:04.318362 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5621 00:49:04.321991 [ 0.000000] printk: bootconsole [mtk8250] enabled
5622 00:49:04.329456 [ 0.000000] NUMA: No NUMA configuration found
5623 00:49:04.336182 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5624 00:49:04.343054 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5625 00:49:04.343580 [ 0.000000] Zone ranges:
5626 00:49:04.349785 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5627 00:49:04.353025 [ 0.000000] DMA32 empty
5628 00:49:04.359621 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5629 00:49:04.362792 [ 0.000000] Movable zone start for each node
5630 00:49:04.366085 [ 0.000000] Early memory node ranges
5631 00:49:04.372669 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5632 00:49:04.379832 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5633 00:49:04.386577 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5634 00:49:04.392594 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5635 00:49:04.399594 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5636 00:49:04.406019 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5637 00:49:04.421842 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5638 00:49:04.428840 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5639 00:49:04.435300 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5640 00:49:04.438489 [ 0.000000] psci: probing for conduit method from DT.
5641 00:49:04.445303 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5642 00:49:04.448661 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5643 00:49:04.455451 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5644 00:49:04.458773 [ 0.000000] psci: SMC Calling Convention v1.1
5645 00:49:04.465657 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5646 00:49:04.468935 [ 0.000000] Detected VIPT I-cache on CPU0
5647 00:49:04.475552 [ 0.000000] CPU features: detected: GIC system register CPU interface
5648 00:49:04.482094 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5649 00:49:04.488921 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5650 00:49:04.492435 [ 0.000000] CPU features: detected: ARM erratum 845719
5651 00:49:04.498765 [ 0.000000] alternatives: applying boot alternatives
5652 00:49:04.501892 [ 0.000000] Fallback order for Node 0: 0
5653 00:49:04.508980 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5654 00:49:04.511978 [ 0.000000] Policy zone: Normal
5655 00:49:04.538690 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5656 00:49:04.551907 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5657 00:49:04.561794 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5658 00:49:04.568434 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5659 00:49:04.575217 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5660 00:49:04.578590 <6>[ 0.000000] software IO TLB: area num 8.
5661 00:49:04.605380 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5662 00:49:04.663212 <6>[ 0.000000] Memory: 3896776K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261688K reserved, 32768K cma-reserved)
5663 00:49:04.670243 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5664 00:49:04.676749 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5665 00:49:04.680007 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5666 00:49:04.686448 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5667 00:49:04.693190 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5668 00:49:04.696498 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5669 00:49:04.706747 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5670 00:49:04.713406 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5671 00:49:04.716706 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5672 00:49:04.728574 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5673 00:49:04.735146 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5674 00:49:04.738570 <6>[ 0.000000] GICv3: 640 SPIs implemented
5675 00:49:04.741831 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5676 00:49:04.745189 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5677 00:49:04.751889 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5678 00:49:04.758345 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5679 00:49:04.768057 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5680 00:49:04.781698 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5681 00:49:04.788112 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5682 00:49:04.800233 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5683 00:49:04.813493 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5684 00:49:04.819975 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5685 00:49:04.827148 <6>[ 0.009467] Console: colour dummy device 80x25
5686 00:49:04.830138 <6>[ 0.014510] printk: console [tty1] enabled
5687 00:49:04.840543 <6>[ 0.018898] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5688 00:49:04.846976 <6>[ 0.029363] pid_max: default: 32768 minimum: 301
5689 00:49:04.850308 <6>[ 0.034244] LSM: Security Framework initializing
5690 00:49:04.860143 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5691 00:49:04.867037 <6>[ 0.046784] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5692 00:49:04.873770 <4>[ 0.055660] cacheinfo: Unable to detect cache hierarchy for CPU 0
5693 00:49:04.883689 <6>[ 0.062284] cblist_init_generic: Setting adjustable number of callback queues.
5694 00:49:04.890050 <6>[ 0.069730] cblist_init_generic: Setting shift to 3 and lim to 1.
5695 00:49:04.896550 <6>[ 0.076083] cblist_init_generic: Setting adjustable number of callback queues.
5696 00:49:04.903259 <6>[ 0.083528] cblist_init_generic: Setting shift to 3 and lim to 1.
5697 00:49:04.906604 <6>[ 0.089926] rcu: Hierarchical SRCU implementation.
5698 00:49:04.913284 <6>[ 0.094952] rcu: Max phase no-delay instances is 1000.
5699 00:49:04.920495 <6>[ 0.102882] EFI services will not be available.
5700 00:49:04.923731 <6>[ 0.107830] smp: Bringing up secondary CPUs ...
5701 00:49:04.934349 <6>[ 0.113112] Detected VIPT I-cache on CPU1
5702 00:49:04.940967 <4>[ 0.113159] cacheinfo: Unable to detect cache hierarchy for CPU 1
5703 00:49:04.947311 <6>[ 0.113168] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5704 00:49:04.954111 <6>[ 0.113199] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5705 00:49:04.957507 <6>[ 0.113680] Detected VIPT I-cache on CPU2
5706 00:49:04.964218 <4>[ 0.113713] cacheinfo: Unable to detect cache hierarchy for CPU 2
5707 00:49:04.970783 <6>[ 0.113718] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5708 00:49:04.977409 <6>[ 0.113730] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5709 00:49:04.980958 <6>[ 0.114176] Detected VIPT I-cache on CPU3
5710 00:49:04.987367 <4>[ 0.114207] cacheinfo: Unable to detect cache hierarchy for CPU 3
5711 00:49:04.994075 <6>[ 0.114212] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5712 00:49:05.000876 <6>[ 0.114223] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5713 00:49:05.007417 <6>[ 0.114798] CPU features: detected: Spectre-v2
5714 00:49:05.010682 <6>[ 0.114808] CPU features: detected: Spectre-BHB
5715 00:49:05.017536 <6>[ 0.114812] CPU features: detected: ARM erratum 858921
5716 00:49:05.021105 <6>[ 0.114817] Detected VIPT I-cache on CPU4
5717 00:49:05.027655 <4>[ 0.114865] cacheinfo: Unable to detect cache hierarchy for CPU 4
5718 00:49:05.034372 <6>[ 0.114872] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5719 00:49:05.040987 <6>[ 0.114881] arch_timer: Enabling local workaround for ARM erratum 858921
5720 00:49:05.047410 <6>[ 0.114891] arch_timer: CPU4: Trapping CNTVCT access
5721 00:49:05.054640 <6>[ 0.114899] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5722 00:49:05.057906 <6>[ 0.115384] Detected VIPT I-cache on CPU5
5723 00:49:05.064322 <4>[ 0.115425] cacheinfo: Unable to detect cache hierarchy for CPU 5
5724 00:49:05.071021 <6>[ 0.115430] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5725 00:49:05.077673 <6>[ 0.115437] arch_timer: Enabling local workaround for ARM erratum 858921
5726 00:49:05.084534 <6>[ 0.115443] arch_timer: CPU5: Trapping CNTVCT access
5727 00:49:05.090804 <6>[ 0.115448] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5728 00:49:05.094319 <6>[ 0.115884] Detected VIPT I-cache on CPU6
5729 00:49:05.101298 <4>[ 0.115929] cacheinfo: Unable to detect cache hierarchy for CPU 6
5730 00:49:05.107726 <6>[ 0.115935] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5731 00:49:05.114291 <6>[ 0.115942] arch_timer: Enabling local workaround for ARM erratum 858921
5732 00:49:05.121248 <6>[ 0.115948] arch_timer: CPU6: Trapping CNTVCT access
5733 00:49:05.127789 <6>[ 0.115953] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5734 00:49:05.131146 <6>[ 0.116484] Detected VIPT I-cache on CPU7
5735 00:49:05.137966 <4>[ 0.116528] cacheinfo: Unable to detect cache hierarchy for CPU 7
5736 00:49:05.144402 <6>[ 0.116534] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5737 00:49:05.151089 <6>[ 0.116541] arch_timer: Enabling local workaround for ARM erratum 858921
5738 00:49:05.158108 <6>[ 0.116547] arch_timer: CPU7: Trapping CNTVCT access
5739 00:49:05.164616 <6>[ 0.116553] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5740 00:49:05.167715 <6>[ 0.116617] smp: Brought up 1 node, 8 CPUs
5741 00:49:05.171250 <6>[ 0.355485] SMP: Total of 8 processors activated.
5742 00:49:05.178246 <6>[ 0.360421] CPU features: detected: 32-bit EL0 Support
5743 00:49:05.184760 <6>[ 0.365791] CPU features: detected: 32-bit EL1 Support
5744 00:49:05.188034 <6>[ 0.371157] CPU features: detected: CRC32 instructions
5745 00:49:05.194817 <6>[ 0.376584] CPU: All CPU(s) started at EL2
5746 00:49:05.197842 <6>[ 0.380922] alternatives: applying system-wide alternatives
5747 00:49:05.206088 <6>[ 0.388889] devtmpfs: initialized
5748 00:49:05.218985 <6>[ 0.397829] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5749 00:49:05.228646 <6>[ 0.407778] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5750 00:49:05.232139 <6>[ 0.415508] pinctrl core: initialized pinctrl subsystem
5751 00:49:05.240282 <6>[ 0.422618] DMI not present or invalid.
5752 00:49:05.246908 <6>[ 0.426986] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5753 00:49:05.253533 <6>[ 0.433894] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5754 00:49:05.263266 <6>[ 0.441423] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5755 00:49:05.270327 <6>[ 0.449674] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5756 00:49:05.277193 <6>[ 0.457852] audit: initializing netlink subsys (disabled)
5757 00:49:05.283594 <5>[ 0.463556] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5758 00:49:05.290100 <6>[ 0.464540] thermal_sys: Registered thermal governor 'step_wise'
5759 00:49:05.296964 <6>[ 0.471521] thermal_sys: Registered thermal governor 'power_allocator'
5760 00:49:05.300750 <6>[ 0.477818] cpuidle: using governor menu
5761 00:49:05.307053 <6>[ 0.488779] NET: Registered PF_QIPCRTR protocol family
5762 00:49:05.313771 <6>[ 0.494273] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5763 00:49:05.320410 <6>[ 0.501373] ASID allocator initialised with 32768 entries
5764 00:49:05.323572 <6>[ 0.508146] Serial: AMBA PL011 UART driver
5765 00:49:05.336315 <4>[ 0.518539] Trying to register duplicate clock ID: 113
5766 00:49:05.395663 <6>[ 0.574710] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5767 00:49:05.410100 <6>[ 0.589033] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5768 00:49:05.413290 <6>[ 0.598792] KASLR enabled
5769 00:49:05.427757 <6>[ 0.606801] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5770 00:49:05.434078 <6>[ 0.613802] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5771 00:49:05.441180 <6>[ 0.620280] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5772 00:49:05.447696 <6>[ 0.627271] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5773 00:49:05.454014 <6>[ 0.633744] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5774 00:49:05.461199 <6>[ 0.640734] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5775 00:49:05.467765 <6>[ 0.647208] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5776 00:49:05.474581 <6>[ 0.654199] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5777 00:49:05.477772 <6>[ 0.661763] ACPI: Interpreter disabled.
5778 00:49:05.487334 <6>[ 0.669741] iommu: Default domain type: Translated
5779 00:49:05.493813 <6>[ 0.674848] iommu: DMA domain TLB invalidation policy: strict mode
5780 00:49:05.497168 <5>[ 0.681479] SCSI subsystem initialized
5781 00:49:05.503942 <6>[ 0.685892] usbcore: registered new interface driver usbfs
5782 00:49:05.510789 <6>[ 0.691619] usbcore: registered new interface driver hub
5783 00:49:05.513654 <6>[ 0.697161] usbcore: registered new device driver usb
5784 00:49:05.521095 <6>[ 0.703465] pps_core: LinuxPPS API ver. 1 registered
5785 00:49:05.530814 <6>[ 0.708651] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5786 00:49:05.534432 <6>[ 0.717975] PTP clock support registered
5787 00:49:05.538067 <6>[ 0.722229] EDAC MC: Ver: 3.0.0
5788 00:49:05.545431 <6>[ 0.727864] FPGA manager framework
5789 00:49:05.548779 <6>[ 0.731548] Advanced Linux Sound Architecture Driver Initialized.
5790 00:49:05.552308 <6>[ 0.738304] vgaarb: loaded
5791 00:49:05.559460 <6>[ 0.741431] clocksource: Switched to clocksource arch_sys_counter
5792 00:49:05.565829 <5>[ 0.747861] VFS: Disk quotas dquot_6.6.0
5793 00:49:05.572349 <6>[ 0.752037] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5794 00:49:05.575831 <6>[ 0.759212] pnp: PnP ACPI: disabled
5795 00:49:05.583432 <6>[ 0.766100] NET: Registered PF_INET protocol family
5796 00:49:05.590078 <6>[ 0.771332] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5797 00:49:05.602543 <6>[ 0.781244] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5798 00:49:05.608738 <6>[ 0.789998] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5799 00:49:05.618826 <6>[ 0.797948] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5800 00:49:05.625094 <6>[ 0.806180] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5801 00:49:05.632017 <6>[ 0.814274] TCP: Hash tables configured (established 32768 bind 32768)
5802 00:49:05.641857 <6>[ 0.821101] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5803 00:49:05.648448 <6>[ 0.828072] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5804 00:49:05.655104 <6>[ 0.835551] NET: Registered PF_UNIX/PF_LOCAL protocol family
5805 00:49:05.661979 <6>[ 0.841644] RPC: Registered named UNIX socket transport module.
5806 00:49:05.664774 <6>[ 0.847789] RPC: Registered udp transport module.
5807 00:49:05.668341 <6>[ 0.852713] RPC: Registered tcp transport module.
5808 00:49:05.675228 <6>[ 0.857636] RPC: Registered tcp NFSv4.1 backchannel transport module.
5809 00:49:05.681570 <6>[ 0.864288] PCI: CLS 0 bytes, default 64
5810 00:49:05.684857 <6>[ 0.868576] Unpacking initramfs...
5811 00:49:05.698896 <6>[ 0.877989] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5812 00:49:05.708709 <6>[ 0.886612] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5813 00:49:05.712118 <6>[ 0.895458] kvm [1]: IPA Size Limit: 40 bits
5814 00:49:05.719225 <6>[ 0.901787] kvm [1]: vgic-v2@c420000
5815 00:49:05.722420 <6>[ 0.905602] kvm [1]: GIC system register CPU interface enabled
5816 00:49:05.729216 <6>[ 0.911771] kvm [1]: vgic interrupt IRQ18
5817 00:49:05.732269 <6>[ 0.916123] kvm [1]: Hyp mode initialized successfully
5818 00:49:05.739921 <5>[ 0.922400] Initialise system trusted keyrings
5819 00:49:05.746839 <6>[ 0.927233] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5820 00:49:05.754639 <6>[ 0.937176] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5821 00:49:05.761439 <5>[ 0.943656] NFS: Registering the id_resolver key type
5822 00:49:05.764759 <5>[ 0.948970] Key type id_resolver registered
5823 00:49:05.771295 <5>[ 0.953386] Key type id_legacy registered
5824 00:49:05.777743 <6>[ 0.957701] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5825 00:49:05.784759 <6>[ 0.964622] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5826 00:49:05.790914 <6>[ 0.972399] 9p: Installing v9fs 9p2000 file system support
5827 00:49:05.818939 <5>[ 1.001359] Key type asymmetric registered
5828 00:49:05.822377 <5>[ 1.005704] Asymmetric key parser 'x509' registered
5829 00:49:05.832646 <6>[ 1.010870] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5830 00:49:05.835767 <6>[ 1.018485] io scheduler mq-deadline registered
5831 00:49:05.838698 <6>[ 1.023244] io scheduler kyber registered
5832 00:49:05.861834 <6>[ 1.044184] EINJ: ACPI disabled.
5833 00:49:05.868060 <4>[ 1.047976] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5834 00:49:05.906405 <6>[ 1.088816] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5835 00:49:05.914826 <6>[ 1.097333] printk: console [ttyS0] disabled
5836 00:49:05.943145 <6>[ 1.121989] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5837 00:49:05.949696 <6>[ 1.131473] printk: console [ttyS0] enabled
5838 00:49:05.952916 <6>[ 1.131473] printk: console [ttyS0] enabled
5839 00:49:05.959634 <6>[ 1.140391] printk: bootconsole [mtk8250] disabled
5840 00:49:05.962866 <6>[ 1.140391] printk: bootconsole [mtk8250] disabled
5841 00:49:05.972772 <3>[ 1.150922] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5842 00:49:05.979206 <3>[ 1.159303] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5843 00:49:06.008532 <6>[ 1.187709] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5844 00:49:06.015227 <6>[ 1.197363] serial serial0: tty port ttyS1 registered
5845 00:49:06.022007 <6>[ 1.203921] SuperH (H)SCI(F) driver initialized
5846 00:49:06.025304 <6>[ 1.209440] msm_serial: driver initialized
5847 00:49:06.040957 <6>[ 1.219773] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5848 00:49:06.050410 <6>[ 1.228371] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5849 00:49:06.057235 <6>[ 1.236948] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5850 00:49:06.067342 <6>[ 1.245516] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5851 00:49:06.074302 <6>[ 1.254173] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5852 00:49:06.084227 <6>[ 1.262833] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5853 00:49:06.093777 <6>[ 1.271576] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5854 00:49:06.100404 <6>[ 1.280316] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5855 00:49:06.110370 <6>[ 1.288882] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5856 00:49:06.117322 <6>[ 1.297688] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5857 00:49:06.127488 <4>[ 1.310074] cacheinfo: Unable to detect cache hierarchy for CPU 0
5858 00:49:06.137093 <6>[ 1.319456] loop: module loaded
5859 00:49:06.148834 <6>[ 1.331347] vsim1: Bringing 1800000uV into 2700000-2700000uV
5860 00:49:06.166909 <6>[ 1.349383] megasas: 07.719.03.00-rc1
5861 00:49:06.175868 <6>[ 1.358182] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5862 00:49:06.190588 <6>[ 1.372813] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5863 00:49:06.207092 <6>[ 1.389569] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5864 00:49:06.263883 <6>[ 1.439743] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5865 00:49:06.296571 <6>[ 1.478993] Freeing initrd memory: 18292K
5866 00:49:06.311798 <4>[ 1.490805] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5867 00:49:06.318392 <4>[ 1.500035] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5868 00:49:06.325289 <4>[ 1.506734] Hardware name: Google juniper sku16 board (DT)
5869 00:49:06.328609 <4>[ 1.512473] Call trace:
5870 00:49:06.331770 <4>[ 1.515173] dump_backtrace.part.0+0xe0/0xf0
5871 00:49:06.335091 <4>[ 1.519710] show_stack+0x18/0x30
5872 00:49:06.338377 <4>[ 1.523282] dump_stack_lvl+0x68/0x84
5873 00:49:06.341965 <4>[ 1.527202] dump_stack+0x18/0x34
5874 00:49:06.348374 <4>[ 1.530773] sysfs_warn_dup+0x64/0x80
5875 00:49:06.351484 <4>[ 1.534694] sysfs_do_create_link_sd+0xf0/0x100
5876 00:49:06.355186 <4>[ 1.539482] sysfs_create_link+0x20/0x40
5877 00:49:06.361809 <4>[ 1.543661] bus_add_device+0x68/0x10c
5878 00:49:06.365096 <4>[ 1.547667] device_add+0x340/0x7ac
5879 00:49:06.368685 <4>[ 1.551410] of_device_add+0x44/0x60
5880 00:49:06.371857 <4>[ 1.555244] of_platform_device_create_pdata+0x90/0x120
5881 00:49:06.378369 <4>[ 1.560725] of_platform_bus_create+0x170/0x370
5882 00:49:06.381728 <4>[ 1.565512] of_platform_populate+0x50/0xfc
5883 00:49:06.388610 <4>[ 1.569951] parse_mtd_partitions+0x1dc/0x510
5884 00:49:06.391532 <4>[ 1.574564] mtd_device_parse_register+0xf8/0x2e0
5885 00:49:06.394901 <4>[ 1.579522] spi_nor_probe+0x21c/0x2f0
5886 00:49:06.398325 <4>[ 1.583529] spi_mem_probe+0x6c/0xb0
5887 00:49:06.401610 <4>[ 1.587361] spi_probe+0x84/0xe4
5888 00:49:06.408463 <4>[ 1.590843] really_probe+0xbc/0x2e0
5889 00:49:06.411443 <4>[ 1.594673] __driver_probe_device+0x78/0x11c
5890 00:49:06.415001 <4>[ 1.599285] driver_probe_device+0xd8/0x160
5891 00:49:06.421646 <4>[ 1.603723] __device_attach_driver+0xb8/0x134
5892 00:49:06.425574 <4>[ 1.608422] bus_for_each_drv+0x78/0xd0
5893 00:49:06.428909 <4>[ 1.612512] __device_attach+0xa8/0x1c0
5894 00:49:06.435189 <4>[ 1.616603] device_initial_probe+0x14/0x20
5895 00:49:06.438452 <4>[ 1.621041] bus_probe_device+0x9c/0xa4
5896 00:49:06.441901 <4>[ 1.625132] device_add+0x3ac/0x7ac
5897 00:49:06.444932 <4>[ 1.628874] __spi_add_device+0x78/0x120
5898 00:49:06.448678 <4>[ 1.633053] spi_add_device+0x40/0x7c
5899 00:49:06.455081 <4>[ 1.636971] spi_register_controller+0x610/0xad0
5900 00:49:06.458285 <4>[ 1.641844] devm_spi_register_controller+0x4c/0xa4
5901 00:49:06.464801 <4>[ 1.646977] mtk_spi_probe+0x3f8/0x650
5902 00:49:06.468397 <4>[ 1.650982] platform_probe+0x68/0xe0
5903 00:49:06.471798 <4>[ 1.654900] really_probe+0xbc/0x2e0
5904 00:49:06.474787 <4>[ 1.658731] __driver_probe_device+0x78/0x11c
5905 00:49:06.481973 <4>[ 1.663342] driver_probe_device+0xd8/0x160
5906 00:49:06.485082 <4>[ 1.667780] __driver_attach+0x94/0x19c
5907 00:49:06.488376 <4>[ 1.671870] bus_for_each_dev+0x70/0xd0
5908 00:49:06.491984 <4>[ 1.675961] driver_attach+0x24/0x30
5909 00:49:06.494892 <4>[ 1.679790] bus_add_driver+0x154/0x20c
5910 00:49:06.501301 <4>[ 1.683880] driver_register+0x78/0x130
5911 00:49:06.504738 <4>[ 1.687972] __platform_driver_register+0x28/0x34
5912 00:49:06.508293 <4>[ 1.692931] mtk_spi_driver_init+0x1c/0x28
5913 00:49:06.515017 <4>[ 1.697284] do_one_initcall+0x50/0x1d0
5914 00:49:06.518156 <4>[ 1.701375] kernel_init_freeable+0x21c/0x288
5915 00:49:06.521468 <4>[ 1.705988] kernel_init+0x24/0x12c
5916 00:49:06.525275 <4>[ 1.709733] ret_from_fork+0x10/0x20
5917 00:49:06.536501 <6>[ 1.718651] tun: Universal TUN/TAP device driver, 1.6
5918 00:49:06.539848 <6>[ 1.724935] thunder_xcv, ver 1.0
5919 00:49:06.542811 <6>[ 1.728456] thunder_bgx, ver 1.0
5920 00:49:06.546160 <6>[ 1.731960] nicpf, ver 1.0
5921 00:49:06.557532 <6>[ 1.736332] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5922 00:49:06.560702 <6>[ 1.743818] hns3: Copyright (c) 2017 Huawei Corporation.
5923 00:49:06.563886 <6>[ 1.749416] hclge is initializing
5924 00:49:06.570779 <6>[ 1.753008] e1000: Intel(R) PRO/1000 Network Driver
5925 00:49:06.577382 <6>[ 1.758145] e1000: Copyright (c) 1999-2006 Intel Corporation.
5926 00:49:06.580743 <6>[ 1.764167] e1000e: Intel(R) PRO/1000 Network Driver
5927 00:49:06.587286 <6>[ 1.769390] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5928 00:49:06.593975 <6>[ 1.775588] igb: Intel(R) Gigabit Ethernet Network Driver
5929 00:49:06.600449 <6>[ 1.781244] igb: Copyright (c) 2007-2014 Intel Corporation.
5930 00:49:06.607100 <6>[ 1.787086] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5931 00:49:06.611008 <6>[ 1.793610] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5932 00:49:06.617573 <6>[ 1.800164] sky2: driver version 1.30
5933 00:49:06.624547 <6>[ 1.805413] usbcore: registered new device driver r8152-cfgselector
5934 00:49:06.631142 <6>[ 1.811955] usbcore: registered new interface driver r8152
5935 00:49:06.634720 <6>[ 1.817784] VFIO - User Level meta-driver version: 0.3
5936 00:49:06.643255 <6>[ 1.825584] mtu3 11201000.usb: uwk - reg:0x420, version:101
5937 00:49:06.650246 <4>[ 1.831452] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5938 00:49:06.656889 <6>[ 1.838724] mtu3 11201000.usb: dr_mode: 1, drd: auto
5939 00:49:06.663319 <6>[ 1.843949] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5940 00:49:06.666719 <6>[ 1.850137] mtu3 11201000.usb: usb3-drd: 0
5941 00:49:06.676476 <6>[ 1.855717] mtu3 11201000.usb: xHCI platform device register success...
5942 00:49:06.683117 <4>[ 1.864387] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5943 00:49:06.689956 <6>[ 1.872330] xhci-mtk 11200000.usb: xHCI Host Controller
5944 00:49:06.696314 <6>[ 1.877853] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5945 00:49:06.703198 <6>[ 1.885574] xhci-mtk 11200000.usb: USB3 root hub has no ports
5946 00:49:06.713218 <6>[ 1.891583] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5947 00:49:06.719963 <6>[ 1.901027] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5948 00:49:06.726552 <6>[ 1.907103] xhci-mtk 11200000.usb: xHCI Host Controller
5949 00:49:06.733305 <6>[ 1.912594] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5950 00:49:06.740146 <6>[ 1.920251] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5951 00:49:06.743160 <6>[ 1.927066] hub 1-0:1.0: USB hub found
5952 00:49:06.746682 <6>[ 1.931094] hub 1-0:1.0: 1 port detected
5953 00:49:06.757523 <6>[ 1.936452] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5954 00:49:06.760891 <6>[ 1.945062] hub 2-0:1.0: USB hub found
5955 00:49:06.767214 <3>[ 1.949088] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5956 00:49:06.774442 <6>[ 1.956982] usbcore: registered new interface driver usb-storage
5957 00:49:06.780893 <6>[ 1.963594] usbcore: registered new device driver onboard-usb-hub
5958 00:49:06.798069 <4>[ 1.977538] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5959 00:49:06.807419 <6>[ 1.989814] mt6397-rtc mt6358-rtc: registered as rtc0
5960 00:49:06.817220 <6>[ 1.995292] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:49:06 UTC (1718498946)
5961 00:49:06.820644 <6>[ 2.005179] i2c_dev: i2c /dev entries driver
5962 00:49:06.832250 <6>[ 2.011584] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5963 00:49:06.842533 <6>[ 2.019902] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5964 00:49:06.845805 <6>[ 2.028807] i2c 4-0058: Fixed dependency cycle(s) with /panel
5965 00:49:06.852406 <6>[ 2.034836] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5966 00:49:06.862982 <3>[ 2.042305] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5967 00:49:06.879893 <6>[ 2.062217] cpu cpu0: EM: created perf domain
5968 00:49:06.889871 <6>[ 2.067736] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5969 00:49:06.896244 <6>[ 2.079024] cpu cpu4: EM: created perf domain
5970 00:49:06.903079 <6>[ 2.085805] sdhci: Secure Digital Host Controller Interface driver
5971 00:49:06.909777 <6>[ 2.092260] sdhci: Copyright(c) Pierre Ossman
5972 00:49:06.916647 <6>[ 2.097663] Synopsys Designware Multimedia Card Interface Driver
5973 00:49:06.923281 <6>[ 2.098219] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5974 00:49:06.926559 <6>[ 2.104725] sdhci-pltfm: SDHCI platform and OF driver helper
5975 00:49:06.935445 <6>[ 2.117907] ledtrig-cpu: registered to indicate activity on CPUs
5976 00:49:06.943342 <6>[ 2.125653] usbcore: registered new interface driver usbhid
5977 00:49:06.946505 <6>[ 2.131490] usbhid: USB HID core driver
5978 00:49:06.957363 <6>[ 2.135752] spi_master spi2: will run message pump with realtime priority
5979 00:49:06.964511 <4>[ 2.135758] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5980 00:49:06.971066 <4>[ 2.150028] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5981 00:49:06.981630 <6>[ 2.157111] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5982 00:49:07.000614 <6>[ 2.173104] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5983 00:49:07.007233 <4>[ 2.180952] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5984 00:49:07.013787 <6>[ 2.194137] cros-ec-spi spi2.0: Chrome EC device registered
5985 00:49:07.020902 <4>[ 2.201496] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5986 00:49:07.033666 <4>[ 2.212762] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5987 00:49:07.040647 <4>[ 2.221468] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5988 00:49:07.052301 <6>[ 2.231495] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5989 00:49:07.086432 <6>[ 2.268786] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5990 00:49:07.093679 <6>[ 2.276235] mmc0: new HS400 MMC card at address 0001
5991 00:49:07.100140 <6>[ 2.282731] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5992 00:49:07.110890 <6>[ 2.293005] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5993 00:49:07.121017 <6>[ 2.297040] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5994 00:49:07.130543 <6>[ 2.303150] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5995 00:49:07.137426 <6>[ 2.308825] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5996 00:49:07.147347 <6>[ 2.311665] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5997 00:49:07.153864 <6>[ 2.312891] NET: Registered PF_PACKET protocol family
5998 00:49:07.157137 <6>[ 2.312987] 9pnet: Installing 9P2000 support
5999 00:49:07.164018 <5>[ 2.313029] Key type dns_resolver registered
6000 00:49:07.167254 <6>[ 2.313389] registered taskstats version 1
6001 00:49:07.170727 <5>[ 2.313404] Loading compiled-in X.509 certificates
6002 00:49:07.180793 <6>[ 2.320460] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6003 00:49:07.187179 <6>[ 2.326418] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6004 00:49:07.197291 <3>[ 2.348272] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6005 00:49:07.203862 <6>[ 2.351228] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6006 00:49:07.210803 <6>[ 2.357567] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6007 00:49:07.220376 <6>[ 2.374293] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6008 00:49:07.232004 <6>[ 2.411020] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6009 00:49:07.242004 <6>[ 2.419584] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6010 00:49:07.248383 <6>[ 2.428154] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6011 00:49:07.258776 <6>[ 2.436684] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6012 00:49:07.265073 <6>[ 2.445204] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6013 00:49:07.275674 <6>[ 2.453723] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6014 00:49:07.281829 <6>[ 2.462241] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6015 00:49:07.289067 <6>[ 2.471451] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6016 00:49:07.296384 <6>[ 2.478961] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6017 00:49:07.303721 <6>[ 2.486282] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6018 00:49:07.314578 <6>[ 2.493581] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6019 00:49:07.320919 <6>[ 2.501039] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6020 00:49:07.327716 <6>[ 2.509342] panfrost 13040000.gpu: clock rate = 511999970
6021 00:49:07.337413 <6>[ 2.515034] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6022 00:49:07.344330 <6>[ 2.525128] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6023 00:49:07.350996 <6>[ 2.532857] hub 1-1:1.0: USB hub found
6024 00:49:07.357886 <6>[ 2.533124] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6025 00:49:07.360893 <6>[ 2.537571] hub 1-1:1.0: 3 ports detected
6026 00:49:07.374078 <6>[ 2.545544] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6027 00:49:07.381295 <6>[ 2.561890] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6028 00:49:07.391840 <6>[ 2.571305] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6029 00:49:07.402058 <6>[ 2.580149] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6030 00:49:07.412028 <6>[ 2.589297] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6031 00:49:07.418872 <6>[ 2.598425] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6032 00:49:07.428650 <6>[ 2.607553] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6033 00:49:07.438628 <6>[ 2.616853] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6034 00:49:07.448550 <6>[ 2.626153] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6035 00:49:07.458433 <6>[ 2.635628] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6036 00:49:07.465268 <6>[ 2.645102] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6037 00:49:07.475144 <6>[ 2.654229] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6038 00:49:07.550178 <6>[ 2.729132] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6039 00:49:07.559872 <6>[ 2.737986] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6040 00:49:07.570366 <6>[ 2.749465] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6041 00:49:07.658456 <6>[ 2.837577] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6042 00:49:08.268422 <6>[ 2.942606] hub 1-1.1:1.0: USB hub found
6043 00:49:08.271845 <6>[ 2.942661] hub 1-1.1:1.0: 4 ports detected
6044 00:49:08.278459 <6>[ 3.434583] Console: switching to colour frame buffer device 170x48
6045 00:49:08.288609 <6>[ 3.466611] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6046 00:49:08.307296 <6>[ 3.483173] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6047 00:49:08.325960 <6>[ 3.501568] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6048 00:49:08.332919 <6>[ 3.514160] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6049 00:49:08.342937 <6>[ 3.522141] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6050 00:49:08.352836 <6>[ 3.528785] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6051 00:49:08.372883 <6>[ 3.548747] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6052 00:49:08.379652 <6>[ 3.559840] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6053 00:49:08.386105 <6>[ 3.567465] Trying to probe devices needed for running init ...
6054 00:49:08.400941 <3>[ 3.580253] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: could not get audiosys reset:-517
6055 00:49:08.416699 <6>[ 3.592617] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6056 00:49:08.570529 <6>[ 3.749657] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6057 00:49:08.683491 <4>[ 3.862318] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6058 00:49:08.693421 <4>[ 3.871504] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6059 00:49:08.696193 <6>[ 3.879984] r8152 1-1.2:1.0 eth0: v1.12.13
6060 00:49:08.714978 <6>[ 3.890760] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6061 00:49:08.758373 <6>[ 3.937451] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6062 00:49:08.946266 <6>[ 4.125468] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6063 00:49:09.085571 <6>[ 4.261513] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6064 00:49:09.138913 <6>[ 4.317844] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6065 00:49:09.254537 <4>[ 4.433349] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6066 00:49:09.268863 <4>[ 4.447701] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6067 00:49:09.315902 <6>[ 4.498459] r8152 1-1.1.1:1.0 eth1: v1.12.13
6068 00:49:09.344886 <6>[ 4.520582] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6069 00:49:10.398609 <6>[ 5.580801] r8152 1-1.2:1.0 eth0: carrier on
6070 00:49:13.243025 <5>[ 5.609465] Sending DHCP requests .., OK
6071 00:49:13.255829 <6>[ 8.434770] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6072 00:49:13.265465 <6>[ 8.448126] IP-Config: Complete:
6073 00:49:13.281024 <6>[ 8.456589] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6074 00:49:13.293171 <6>[ 8.472419] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6075 00:49:13.306679 <6>[ 8.485756] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6076 00:49:13.313753 <6>[ 8.485765] nameserver0=192.168.201.1
6077 00:49:13.346625 <6>[ 8.528718] clk: Disabling unused clocks
6078 00:49:13.351178 <6>[ 8.536812] ALSA device list:
6079 00:49:13.360001 <6>[ 8.542317] No soundcards found.
6080 00:49:13.368577 <6>[ 8.550568] Freeing unused kernel memory: 8512K
6081 00:49:13.375192 <6>[ 8.557474] Run /init as init process
6082 00:49:13.386021 Loading, please wait...
6083 00:49:13.419103 Starting systemd-udevd version 252.22-1~deb12u1
6084 00:49:13.748045 <6>[ 8.923887] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6085 00:49:13.758029 <3>[ 8.935710] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6086 00:49:13.764536 <3>[ 8.945192] thermal_sys: Failed to find 'trips' node
6087 00:49:13.771092 <3>[ 8.945816] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6088 00:49:13.778549 <3>[ 8.950954] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6089 00:49:13.785231 <3>[ 8.950966] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6090 00:49:13.798268 <3>[ 8.957952] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6091 00:49:13.801429 <6>[ 8.959023] mc: Linux media interface: v0.10
6092 00:49:13.811948 <3>[ 8.960739] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6093 00:49:13.821766 <3>[ 8.960755] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6094 00:49:13.828643 <3>[ 8.960760] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6095 00:49:13.838527 <6>[ 8.962417] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6096 00:49:13.844984 <3>[ 8.963546] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6097 00:49:13.854931 <3>[ 8.963564] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6098 00:49:13.864836 <3>[ 8.963574] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6099 00:49:13.872339 <3>[ 8.963584] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6100 00:49:13.882368 <3>[ 8.963592] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6101 00:49:13.888988 <4>[ 8.965110] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6102 00:49:13.899016 <3>[ 8.973553] elan_i2c 2-0015: Error applying setting, reverse things back
6103 00:49:13.905747 <3>[ 8.978542] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6104 00:49:13.916383 <4>[ 8.981747] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6105 00:49:13.923127 <4>[ 8.989414] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6106 00:49:13.929752 <6>[ 8.994071] videodev: Linux video capture interface: v2.00
6107 00:49:13.936536 <3>[ 8.994342] thermal_sys: Failed to find 'trips' node
6108 00:49:13.942794 <3>[ 8.994344] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6109 00:49:13.952844 <3>[ 8.994352] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6110 00:49:13.959573 <4>[ 8.994355] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6111 00:49:13.969604 <4>[ 8.997919] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6112 00:49:13.983322 <6>[ 9.004798] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6113 00:49:13.989990 <6>[ 9.015066] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6114 00:49:13.999962 <6>[ 9.020549] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6115 00:49:14.006456 <6>[ 9.039823] cs_system_cfg: CoreSight Configuration manager initialised
6116 00:49:14.017374 <6>[ 9.040134] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6117 00:49:14.030337 <3>[ 9.043048] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6118 00:49:14.040203 <6>[ 9.138791] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input6
6119 00:49:14.062352 <3>[ 9.237974] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6120 00:49:14.072082 <6>[ 9.250711] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6121 00:49:14.075633 <3>[ 9.250859] mtk-scp 10500000.scp: invalid resource
6122 00:49:14.082360 <3>[ 9.252805] debugfs: File 'Playback' in directory 'dapm' already present!
6123 00:49:14.088624 <3>[ 9.252817] debugfs: File 'Capture' in directory 'dapm' already present!
6124 00:49:14.098829 <5>[ 9.253619] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6125 00:49:14.108699 <6>[ 9.254969] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7
6126 00:49:14.115122 <6>[ 9.259015] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6127 00:49:14.125516 <6>[ 9.263756] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6128 00:49:14.131971 <5>[ 9.268782] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6129 00:49:14.141924 <5>[ 9.269262] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6130 00:49:14.148716 <4>[ 9.269345] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6131 00:49:14.155844 <6>[ 9.269356] cfg80211: failed to load regulatory.db
6132 00:49:14.162398 <6>[ 9.270981] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6133 00:49:14.169120 <6>[ 9.278801] Bluetooth: Core ver 2.22
6134 00:49:14.172433 <6>[ 9.279125] remoteproc remoteproc0: scp is available
6135 00:49:14.182393 <4>[ 9.279199] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6136 00:49:14.188828 <6>[ 9.279207] remoteproc remoteproc0: powering up scp
6137 00:49:14.195555 <4>[ 9.279223] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6138 00:49:14.202408 <3>[ 9.279227] remoteproc remoteproc0: request_firmware failed: -2
6139 00:49:14.208811 <6>[ 9.279919] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6140 00:49:14.215507 <6>[ 9.287460] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6141 00:49:14.222365 <6>[ 9.296479] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6142 00:49:14.228805 <6>[ 9.296533] NET: Registered PF_BLUETOOTH protocol family
6143 00:49:14.235640 <6>[ 9.296537] Bluetooth: HCI device and connection manager initialized
6144 00:49:14.245273 Begin: Loading essential drivers<6>[ 9.296551] Bluetooth: HCI socket layer initialized
6145 00:49:14.245805 ... done.
6146 00:49:14.252069 Begin: Running /scripts/init-premoun<6>[ 9.296561] Bluetooth: L2CAP socket layer initialized
6147 00:49:14.255063 t ... done.
6148 00:49:14.261894 Begin: Mounting roo<6>[ 9.296571] Bluetooth: SCO socket layer initialized
6149 00:49:14.278635 t file system ... Begin: Running /scripts/nfs-to<6>[ 9.298293] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6150 00:49:14.279322 p ... done.
6151 00:49:14.285007 Begin: Running /scr<6>[ 9.298461] usbcore: registered new interface driver uvcvideo
6152 00:49:14.295167 ipts/nfs-premount ... Waiting up<6>[ 9.304500] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6153 00:49:14.308048 to 60 secs for any ethernet to <6>[ 9.304787] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video2 (81,2)
6154 00:49:14.308560 become available
6155 00:49:14.314854 Device /sys/cl<6>[ 9.338248] Bluetooth: HCI UART driver ver 2.3
6156 00:49:14.318426 ass/net/enx88541f0f7aca found
6157 00:49:14.325026 d<6>[ 9.343925] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6158 00:49:14.325576 one.
6159 00:49:14.334494 Begin: Waiting up to 180 s<6>[ 9.351022] Bluetooth: HCI UART protocol H4 registered
6160 00:49:14.344744 ecs for any network device to be<6>[ 9.351035] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6161 00:49:14.347944 come available ... done.
6162 00:49:14.351082 <6>[ 9.351053] Bluetooth: HCI UART protocol LL registered
6163 00:49:14.358432 <6>[ 9.351066] Bluetooth: HCI UART protocol Three-wire (H5) registered
6164 00:49:14.366922 <6>[ 9.351358] Bluetooth: HCI UART protocol Broadcom registered
6165 00:49:14.375330 <6>[ 9.351382] Bluetooth: HCI UART protocol QCA registered
6166 00:49:14.382090 <6>[ 9.351398] Bluetooth: HCI UART protocol Marvell registered
6167 00:49:14.388572 <6>[ 9.352195] Bluetooth: hci0: setting up ROME/QCA6390
6168 00:49:14.400821 <6>[ 9.370109] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6169 00:49:14.414640 <6>[ 9.375211] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6170 00:49:14.421230 <6>[ 9.383585] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6171 00:49:14.431095 <6>[ 9.389841] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6172 00:49:14.444701 <6>[ 9.396514] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6173 00:49:14.455272 <6>[ 9.402407] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6174 00:49:14.465535 <4>[ 9.416140] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6175 00:49:14.472494 <4>[ 9.416140] Fallback method does not support PEC.
6176 00:49:14.482249 <6>[ 9.560829] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6177 00:49:14.488639 <3>[ 9.594065] Bluetooth: hci0: Frame reassembly failed (-84)
6178 00:49:14.498735 <3>[ 9.603068] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6179 00:49:14.553161 <3>[ 9.731961] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6180 00:49:14.559944 IP-Config: enx88541f0f7aca hardware address 88:54:1f:0f:7a:ca mtu 1500 DHCP
6181 00:49:14.607176 IP-Config: eth0 hardware address 00:e0:4c:68:03:2b mtu 1500 DHCP
6182 00:49:14.613767 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6183 00:49:14.620572 address: 192.168.201.17 broadcast: 192.168.201.255 netmask: 255.255.255.0
6184 00:49:14.627217 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6185 00:49:14.633718 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-5
6186 00:49:14.640425 domain : lava-rack
6187 00:49:14.644001 rootserver: 192.168.201.1 rootpath:
6188 00:49:14.650087 filen<6>[ 9.830220] Bluetooth: hci0: QCA Product ID :0x00000008
6189 00:49:14.650553 ame :
6190 00:49:14.658969 <6>[ 9.841569] Bluetooth: hci0: QCA SOC Version :0x00000044
6191 00:49:14.667289 <6>[ 9.849495] Bluetooth: hci0: QCA ROM Version :0x00000302
6192 00:49:14.676179 <6>[ 9.858010] Bluetooth: hci0: QCA Patch Version:0x00000111
6193 00:49:14.684526 <6>[ 9.866892] Bluetooth: hci0: QCA controller version 0x00440302
6194 00:49:14.696609 <6>[ 9.875688] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6195 00:49:14.706484 <4>[ 9.885086] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6196 00:49:14.717797 <3>[ 9.896756] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6197 00:49:14.724474 <3>[ 9.906961] Bluetooth: hci0: QCA Failed to download patch (-2)
6198 00:49:14.730802 done.
6199 00:49:14.738481 Begin: Running /scripts/nfs-bottom ... done.
6200 00:49:14.750004 Begin: Running /scripts/init-bottom ... done.
6201 00:49:14.849294 <6>[ 10.028185] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6202 00:49:14.930383 <4>[ 10.109497] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6203 00:49:14.950598 <4>[ 10.129579] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6204 00:49:14.966140 <4>[ 10.145376] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6205 00:49:14.976055 <4>[ 10.158413] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6206 00:49:16.141357 <6>[ 11.323837] NET: Registered PF_INET6 protocol family
6207 00:49:16.153941 <6>[ 11.336103] Segment Routing with IPv6
6208 00:49:16.161671 <6>[ 11.344251] In-situ OAM (IOAM) with IPv6
6209 00:49:16.352073 <30>[ 11.507849] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6210 00:49:16.371885 <30>[ 11.554105] systemd[1]: Detected architecture arm64.
6211 00:49:16.385214
6212 00:49:16.387864 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6213 00:49:16.388397
6214 00:49:16.412977 <30>[ 11.595439] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6215 00:49:17.566828 <30>[ 12.745978] systemd[1]: Queued start job for default target graphical.target.
6216 00:49:17.603658 <30>[ 12.782640] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6217 00:49:17.616275 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6218 00:49:17.637064 <30>[ 12.815819] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6219 00:49:17.649798 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6220 00:49:17.669075 <30>[ 12.847946] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6221 00:49:17.683235 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6222 00:49:17.700287 <30>[ 12.879098] systemd[1]: Created slice user.slice - User and Session Slice.
6223 00:49:17.712210 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6224 00:49:17.734316 <30>[ 12.910032] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6225 00:49:17.747202 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6226 00:49:17.769807 <30>[ 12.945850] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6227 00:49:17.782404 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6228 00:49:17.809140 <30>[ 12.977805] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6229 00:49:17.828927 <30>[ 13.007821] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6230 00:49:17.837460 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6231 00:49:17.858581 <30>[ 13.037774] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6232 00:49:17.871955 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6233 00:49:17.890840 <30>[ 13.069706] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6234 00:49:17.904999 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6235 00:49:17.919542 <30>[ 13.101737] systemd[1]: Reached target paths.target - Path Units.
6236 00:49:17.933840 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6237 00:49:17.951088 <30>[ 13.129637] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6238 00:49:17.963215 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6239 00:49:17.975398 <30>[ 13.157601] systemd[1]: Reached target slices.target - Slice Units.
6240 00:49:17.989903 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6241 00:49:18.003366 <30>[ 13.185658] systemd[1]: Reached target swap.target - Swaps.
6242 00:49:18.014250 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6243 00:49:18.034874 <30>[ 13.213685] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6244 00:49:18.048371 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6245 00:49:18.067104 <30>[ 13.246083] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6246 00:49:18.080968 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6247 00:49:18.102905 <30>[ 13.281652] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6248 00:49:18.116094 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6249 00:49:18.136556 <30>[ 13.315417] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6250 00:49:18.150466 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6251 00:49:18.167071 <30>[ 13.346342] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6252 00:49:18.179288 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6253 00:49:18.200811 <30>[ 13.379703] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6254 00:49:18.214542 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6255 00:49:18.234303 <30>[ 13.413270] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6256 00:49:18.247465 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6257 00:49:18.266753 <30>[ 13.446249] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6258 00:49:18.280249 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6259 00:49:18.319388 <30>[ 13.498605] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6260 00:49:18.330323 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6261 00:49:18.354452 <30>[ 13.533733] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6262 00:49:18.367545 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6263 00:49:18.395628 <30>[ 13.574680] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6264 00:49:18.409199 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6265 00:49:18.433954 <30>[ 13.606118] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6266 00:49:18.471498 <30>[ 13.650503] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6267 00:49:18.484320 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6268 00:49:18.508714 <30>[ 13.687891] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6269 00:49:18.520046 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6270 00:49:18.548080 <30>[ 13.727313] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6271 00:49:18.559189 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6272 00:49:18.594766 <6>[ 13.773820] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6273 00:49:18.601857 <30>[ 13.778412] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6274 00:49:18.617468 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6275 00:49:18.640631 <30>[ 13.819532] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6276 00:49:18.652296 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6277 00:49:18.699560 <30>[ 13.878752] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6278 00:49:18.711432 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6279 00:49:18.736227 <30>[ 13.915389] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6280 00:49:18.745672 Startin<6>[ 13.929110] fuse: init (API version 7.37)
6281 00:49:18.752454 g [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6282 00:49:18.795968 <30>[ 13.974810] systemd[1]: Starting systemd-journald.service - Journal Service...
6283 00:49:18.806109 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6284 00:49:18.834635 <30>[ 14.013795] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6285 00:49:18.844627 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6286 00:49:18.873572 <30>[ 14.049117] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6287 00:49:18.884697 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6288 00:49:18.931345 <30>[ 14.110375] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6289 00:49:18.943997 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6290 00:49:18.972657 <30>[ 14.151423] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6291 00:49:18.984672 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6292 00:49:19.007763 <30>[ 14.187008] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6293 00:49:19.017746 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6294 00:49:19.035377 <30>[ 14.214542] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6295 00:49:19.051075 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSI<3>[ 14.231008] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6296 00:49:19.054345 X Message Queue File System.
6297 00:49:19.067372 <3>[ 14.246167] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6298 00:49:19.074381 <30>[ 14.255468] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6299 00:49:19.087650 <3>[ 14.265394] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6300 00:49:19.104961 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 14.282618] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6301 00:49:19.105370 File System.
6302 00:49:19.121228 <3>[ 14.299859] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6303 00:49:19.131349 <30>[ 14.309180] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6304 00:49:19.146169 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate <3>[ 14.325969] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6305 00:49:19.149676 List of Static Device Nodes.
6306 00:49:19.166264 <3>[ 14.344878] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6307 00:49:19.176382 <30>[ 14.354764] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6308 00:49:19.187066 <30>[ 14.365810] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6309 00:49:19.205912 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Modu<3>[ 14.382145] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6310 00:49:19.206527 le configfs.
6311 00:49:19.223670 <30>[ 14.402802] systemd[1]: modprobe@dm_mod.service: Deactivated successfully.
6312 00:49:19.233951 <30>[ 14.412648] systemd[1]: Finished modprobe@dm_mod.service - Load Kernel Module dm_mod.
6313 00:49:19.245138 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6314 00:49:19.263256 <30>[ 14.442313] systemd[1]: Started systemd-journald.service - Journal Service.
6315 00:49:19.274105 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6316 00:49:19.295365 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6317 00:49:19.313669 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6318 00:49:19.333854 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6319 00:49:19.353171 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6320 00:49:19.372093 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6321 00:49:19.392062 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6322 00:49:19.412669 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6323 00:49:19.433932 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6324 00:49:19.471156 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6325 00:49:19.485577 <4>[ 14.667739] power_supply_show_property: 2 callbacks suppressed
6326 00:49:19.496877 <3>[ 14.667749] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6327 00:49:19.503682 <3>[ 14.682083] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6328 00:49:19.521082 <4>[ 14.682820] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6329 00:49:19.527892 <3>[ 14.699374] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6330 00:49:19.537501 <3>[ 14.707381] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6331 00:49:19.551816 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6332 00:49:19.558526 <3>[ 14.737621] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 00:49:19.579196 Starting [0;1;39msyste<3>[ 14.754789] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 00:49:19.582248 md-journal-f…h Journal to Persistent Storage...
6335 00:49:19.594175 <3>[ 14.772799] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 00:49:19.612063 Starting [0;1;39msystemd-random-se…i<3>[ 14.790616] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6337 00:49:19.615123 ce[0m - Load/Save Random Seed...
6338 00:49:19.628588 <3>[ 14.806958] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6339 00:49:19.644754 <3>[ 14.823492] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6340 00:49:19.662560 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables..<3>[ 14.839879] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6341 00:49:19.663199 .
6342 00:49:19.684206 <46>[ 14.862799] systemd-journald[320]: Received client request to flush runtime journal.
6343 00:49:19.693993 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6344 00:49:19.719068 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6345 00:49:19.735480 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6346 00:49:19.755094 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6347 00:49:19.776233 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6348 00:49:19.796640 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6349 00:49:20.791263 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6350 00:49:20.843986 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6351 00:49:21.143095 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6352 00:49:21.258892 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6353 00:49:21.276690 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6354 00:49:21.294854 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6355 00:49:21.343478 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6356 00:49:21.369227 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6357 00:49:21.646957 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6358 00:49:21.664534 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6359 00:49:21.738915 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6360 00:49:21.886995 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6361 00:49:21.904669 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6362 00:49:21.941428 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6363 00:49:22.155314 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6364 00:49:22.171137 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6365 00:49:22.191282 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6366 00:49:22.207465 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6367 00:49:22.263542 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6368 00:49:22.306408 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6369 00:49:22.375633 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6370 00:49:22.406510 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6371 00:49:22.428188 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6372 00:49:22.452827 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6373 00:49:22.472930 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6374 00:49:22.489285 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6375 00:49:22.507293 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6376 00:49:22.523812 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6377 00:49:22.542891 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6378 00:49:22.567628 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6379 00:49:22.590400 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6380 00:49:22.607186 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6381 00:49:22.626427 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6382 00:49:22.646110 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6383 00:49:22.663129 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6384 00:49:22.681265 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6385 00:49:22.699206 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6386 00:49:22.715477 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6387 00:49:22.756665 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6388 00:49:22.794548 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6389 00:49:22.915888 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6390 00:49:22.944048 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6391 00:49:23.097094 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6392 00:49:23.139995 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6393 00:49:23.190765 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6394 00:49:23.201037 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6395 00:49:23.221116 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6396 00:49:23.261611 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6397 00:49:23.283151 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6398 00:49:23.306322 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6399 00:49:23.329152 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6400 00:49:23.370207 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6401 00:49:23.465393 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6402 00:49:23.559678
6403 00:49:23.563050 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6404 00:49:23.563121
6405 00:49:23.565985 debian-bookworm-arm64 login: root (automatic login)
6406 00:49:23.566074
6407 00:49:23.819097 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024 aarch64
6408 00:49:23.819251
6409 00:49:23.825410 The programs included with the Debian GNU/Linux system are free software;
6410 00:49:23.832395 the exact distribution terms for each program are described in the
6411 00:49:23.835480 individual files in /usr/share/doc/*/copyright.
6412 00:49:23.835627
6413 00:49:23.842090 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6414 00:49:23.845408 permitted by applicable law.
6415 00:49:23.947842 Matched prompt #10: / #
6417 00:49:23.948977 Setting prompt string to ['/ #']
6418 00:49:23.949439 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6420 00:49:23.950482 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6421 00:49:23.950930 start: 2.2.6 expect-shell-connection (timeout 00:03:46) [common]
6422 00:49:23.951308 Setting prompt string to ['/ #']
6423 00:49:23.951629 Forcing a shell prompt, looking for ['/ #']
6425 00:49:24.002399 / #
6426 00:49:24.003066 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6427 00:49:24.003479 Waiting using forced prompt support (timeout 00:02:30)
6428 00:49:24.008831
6429 00:49:24.009705 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6430 00:49:24.010208 start: 2.2.7 export-device-env (timeout 00:03:46) [common]
6432 00:49:24.111583 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc'
6433 00:49:24.117787 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368415/extract-nfsrootfs-hq42sdgc'
6435 00:49:24.219445 / # export NFS_SERVER_IP='192.168.201.1'
6436 00:49:24.225790 export NFS_SERVER_IP='192.168.201.1'
6437 00:49:24.226736 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6438 00:49:24.227233 end: 2.2 depthcharge-retry (duration 00:01:15) [common]
6439 00:49:24.227727 end: 2 depthcharge-action (duration 00:01:15) [common]
6440 00:49:24.228194 start: 3 lava-test-retry (timeout 00:08:24) [common]
6441 00:49:24.228644 start: 3.1 lava-test-shell (timeout 00:08:24) [common]
6442 00:49:24.229022 Using namespace: common
6444 00:49:24.330075 / # #
6445 00:49:24.330922 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6446 00:49:24.336824 #
6447 00:49:24.337531 Using /lava-14368415
6449 00:49:24.438634 / # export SHELL=/bin/sh
6450 00:49:24.445361 export SHELL=/bin/sh
6452 00:49:24.547372 / # . /lava-14368415/environment
6453 00:49:24.553481 . /lava-14368415/environment
6455 00:49:24.661279 / # /lava-14368415/bin/lava-test-runner /lava-14368415/0
6456 00:49:24.661935 Test shell timeout: 10s (minimum of the action and connection timeout)
6457 00:49:24.667973 /lava-14368415/bin/lava-test-runner /lava-14368415/0
6458 00:49:24.915175 + export TESTRUN_ID=0_wifi-basic
6459 00:49:24.918573 + cd /lava-14368415/0/tests/0_wifi-basic
6460 00:49:24.921286 + cat uuid
6461 00:49:24.927617 + UUID=14368415_1.6.2.3.1
6462 00:49:24.927695 + set +x
6463 00:49:24.934194 <LAVA_SIGNAL_STARTRUN 0_wifi-basic 14368415_1.6.2.3.1>
6464 00:49:24.934509 Received signal: <STARTRUN> 0_wifi-basic 14368415_1.6.2.3.1
6465 00:49:24.934580 Starting test lava.0_wifi-basic (14368415_1.6.2.3.1)
6466 00:49:24.934664 Skipping test definition patterns.
6467 00:49:24.937737 + KERNELCI_LAVA=y /usr/bin/wifi-basic-parser.sh
6468 00:49:25.059762 wlan interfaces found:
6469 00:49:25.059927 wlan0
6470 00:49:25.088215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-present RESULT=pass>
6471 00:49:25.088677 Received signal: <TESTCASE> TEST_CASE_ID=wlan-present RESULT=pass
6473 00:49:25.091308 <LAVA_SIGNAL_TESTSET START wlan-rfkill>
6474 00:49:25.091823 Received signal: <TESTSET> START wlan-rfkill
6475 00:49:25.092074 Starting test_set wlan-rfkill
6476 00:49:25.137465 1 wlan
6477 00:49:25.169211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-present RESULT=pass>
6478 00:49:25.169483 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-present RESULT=pass
6480 00:49:25.308377 <4>[ 20.487437] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6481 00:49:25.326099 <4>[ 20.504913] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6482 00:49:25.338199 <4>[ 20.516750] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6483 00:49:25.344639 <4>[ 20.525825] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6484 00:49:25.395976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-soft-block RESULT=pass>
6485 00:49:25.396279 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-soft-block RESULT=pass
6487 00:49:25.460769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-soft-unblock RESULT=pass>
6488 00:49:25.461535 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-soft-unblock RESULT=pass
6490 00:49:25.464545 <LAVA_SIGNAL_TESTSET STOP>
6491 00:49:25.465309 Received signal: <TESTSET> STOP
6492 00:49:25.465672 Closing test_set wlan-rfkill
6493 00:49:25.470137 Received signal: <TESTSET> START wlan-scan
6494 00:49:25.470616 Starting test_set wlan-scan
6495 00:49:25.473166 <LAVA_SIGNAL_TESTSET START wlan-scan>
6496 00:49:31.098529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-scan RESULT=pass UNITS=networks MEASUREMENT=73>
6497 00:49:31.099279 Received signal: <TESTCASE> TEST_CASE_ID=wlan-scan RESULT=pass UNITS=networks MEASUREMENT=73
6499 00:49:31.100581 Received signal: <TESTSET> STOP
6500 00:49:31.100947 Closing test_set wlan-scan
6501 00:49:31.102039 <LAVA_SIGNAL_TESTSET STOP>
6502 00:49:31.104855 <LAVA_SIGNAL_TESTSET START wlan-monitor>
6503 00:49:31.105515 Received signal: <TESTSET> START wlan-monitor
6504 00:49:31.105875 Starting test_set wlan-monitor
6505 00:49:31.255878 <4>[ 26.437614] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6506 00:49:31.276593 <4>[ 26.454924] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6507 00:49:31.287858 <4>[ 26.466507] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6508 00:49:31.294515 <4>[ 26.475340] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6509 00:49:31.855370 <6>[ 27.037229] IPv6: ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
6510 00:49:31.876876 wlan0 is in monitor mode
6511 00:49:31.904019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-monitor-mode RESULT=pass>
6512 00:49:31.904730 Received signal: <TESTCASE> TEST_CASE_ID=wlan-monitor-mode RESULT=pass
6514 00:49:32.022429 <4>[ 27.201187] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6515 00:49:32.039828 <4>[ 27.218498] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6516 00:49:32.051545 <4>[ 27.230422] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6517 00:49:32.058678 <4>[ 27.239392] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6518 00:49:32.562008 wlan0 is in managed mode
6519 00:49:32.590929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-managed-mode RESULT=pass>
6520 00:49:32.591630 Received signal: <TESTCASE> TEST_CASE_ID=wlan-managed-mode RESULT=pass
6522 00:49:32.595392 <LAVA_SIGNAL_TESTSET STOP>
6523 00:49:32.595881 + set +x
6524 00:49:32.596470 Received signal: <TESTSET> STOP
6525 00:49:32.596808 Closing test_set wlan-monitor
6526 00:49:32.602275 <LAVA_SIGNAL_ENDRUN 0_wifi-basic 14368415_1.6.2.3.1>
6527 00:49:32.602944 Received signal: <ENDRUN> 0_wifi-basic 14368415_1.6.2.3.1
6528 00:49:32.603400 Ending use of test pattern.
6529 00:49:32.603726 Ending test lava.0_wifi-basic (14368415_1.6.2.3.1), duration 7.67
6531 00:49:32.605602 <LAVA_TEST_RUNNER EXIT>
6532 00:49:32.606313 ok: lava_test_shell seems to have completed
6533 00:49:32.607255 rfkill-wlan-present:
result: pass
set: wlan-rfkill
rfkill-wlan-soft-block:
result: pass
set: wlan-rfkill
rfkill-wlan-soft-unblock:
result: pass
set: wlan-rfkill
wlan-managed-mode:
result: pass
set: wlan-monitor
wlan-monitor-mode:
result: pass
set: wlan-monitor
wlan-present: pass
wlan-scan:
result: pass
set: wlan-scan
6534 00:49:32.607724 end: 3.1 lava-test-shell (duration 00:00:08) [common]
6535 00:49:32.608147 end: 3 lava-test-retry (duration 00:00:08) [common]
6536 00:49:32.608586 start: 4 finalize (timeout 00:08:15) [common]
6537 00:49:32.609035 start: 4.1 power-off (timeout 00:00:30) [common]
6538 00:49:32.609799 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6539 00:49:34.029541 >> Command sent successfully.
6540 00:49:34.036496 Returned 0 in 1 seconds
6541 00:49:34.137395 end: 4.1 power-off (duration 00:00:02) [common]
6543 00:49:34.138920 start: 4.2 read-feedback (timeout 00:08:14) [common]
6544 00:49:34.140140 Listened to connection for namespace 'common' for up to 1s
6545 00:49:35.140794 Finalising connection for namespace 'common'
6546 00:49:35.141442 Disconnecting from shell: Finalise
6547 00:49:35.141871 / #
6548 00:49:35.242763 end: 4.2 read-feedback (duration 00:00:01) [common]
6549 00:49:35.243473 end: 4 finalize (duration 00:00:03) [common]
6550 00:49:35.244094 Cleaning after the job
6551 00:49:35.244624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/ramdisk
6552 00:49:35.249169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/kernel
6553 00:49:35.260161 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/dtb
6554 00:49:35.260323 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/nfsrootfs
6555 00:49:35.292443 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368415/tftp-deploy-74mm1aju/modules
6556 00:49:35.298003 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368415
6557 00:49:35.524004 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368415
6558 00:49:35.524176 Job finished correctly