Boot log: mt8183-kukui-jacuzzi-juniper-sku16

    1 00:39:32.753036  lava-dispatcher, installed at version: 2024.03
    2 00:39:32.753261  start: 0 validate
    3 00:39:32.753384  Start time: 2024-06-16 00:39:32.753377+00:00 (UTC)
    4 00:39:32.753519  Using caching service: 'http://localhost/cache/?uri=%s'
    5 00:39:32.753745  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
    6 00:39:33.006986  Using caching service: 'http://localhost/cache/?uri=%s'
    7 00:39:33.007716  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 00:39:46.517304  Using caching service: 'http://localhost/cache/?uri=%s'
    9 00:39:46.518349  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
   10 00:39:46.771488  Using caching service: 'http://localhost/cache/?uri=%s'
   11 00:39:46.772142  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 00:39:49.026977  validate duration: 16.27
   14 00:39:49.028283  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 00:39:49.028848  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 00:39:49.029338  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 00:39:49.030121  Not decompressing ramdisk as can be used compressed.
   18 00:39:49.030603  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
   19 00:39:49.030969  saving as /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/ramdisk/rootfs.cpio.gz
   20 00:39:49.031322  total size: 8181887 (7 MB)
   21 00:39:49.283311  progress   0 % (0 MB)
   22 00:39:49.285705  progress   5 % (0 MB)
   23 00:39:49.287827  progress  10 % (0 MB)
   24 00:39:49.290133  progress  15 % (1 MB)
   25 00:39:49.292150  progress  20 % (1 MB)
   26 00:39:49.294402  progress  25 % (1 MB)
   27 00:39:49.296569  progress  30 % (2 MB)
   28 00:39:49.298832  progress  35 % (2 MB)
   29 00:39:49.300847  progress  40 % (3 MB)
   30 00:39:49.303158  progress  45 % (3 MB)
   31 00:39:49.305243  progress  50 % (3 MB)
   32 00:39:49.307501  progress  55 % (4 MB)
   33 00:39:49.309634  progress  60 % (4 MB)
   34 00:39:49.311872  progress  65 % (5 MB)
   35 00:39:49.313910  progress  70 % (5 MB)
   36 00:39:49.316077  progress  75 % (5 MB)
   37 00:39:49.318129  progress  80 % (6 MB)
   38 00:39:49.320366  progress  85 % (6 MB)
   39 00:39:49.322488  progress  90 % (7 MB)
   40 00:39:49.324651  progress  95 % (7 MB)
   41 00:39:49.326859  progress 100 % (7 MB)
   42 00:39:49.327096  7 MB downloaded in 0.30 s (26.38 MB/s)
   43 00:39:49.327255  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 00:39:49.327480  end: 1.1 download-retry (duration 00:00:00) [common]
   46 00:39:49.327562  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 00:39:49.327639  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 00:39:49.327773  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   49 00:39:49.327836  saving as /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/kernel/Image
   50 00:39:49.327890  total size: 54813184 (52 MB)
   51 00:39:49.327945  No compression specified
   52 00:39:49.328955  progress   0 % (0 MB)
   53 00:39:49.342779  progress   5 % (2 MB)
   54 00:39:49.356867  progress  10 % (5 MB)
   55 00:39:49.370682  progress  15 % (7 MB)
   56 00:39:49.384842  progress  20 % (10 MB)
   57 00:39:49.398695  progress  25 % (13 MB)
   58 00:39:49.413502  progress  30 % (15 MB)
   59 00:39:49.428162  progress  35 % (18 MB)
   60 00:39:49.442939  progress  40 % (20 MB)
   61 00:39:49.457377  progress  45 % (23 MB)
   62 00:39:49.471392  progress  50 % (26 MB)
   63 00:39:49.485683  progress  55 % (28 MB)
   64 00:39:49.499411  progress  60 % (31 MB)
   65 00:39:49.513693  progress  65 % (34 MB)
   66 00:39:49.527572  progress  70 % (36 MB)
   67 00:39:49.541752  progress  75 % (39 MB)
   68 00:39:49.556134  progress  80 % (41 MB)
   69 00:39:49.570139  progress  85 % (44 MB)
   70 00:39:49.584196  progress  90 % (47 MB)
   71 00:39:49.598183  progress  95 % (49 MB)
   72 00:39:49.611895  progress 100 % (52 MB)
   73 00:39:49.612151  52 MB downloaded in 0.28 s (183.90 MB/s)
   74 00:39:49.612314  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 00:39:49.612532  end: 1.2 download-retry (duration 00:00:00) [common]
   77 00:39:49.612616  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 00:39:49.612694  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 00:39:49.612828  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   80 00:39:49.612893  saving as /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   81 00:39:49.612950  total size: 57695 (0 MB)
   82 00:39:49.613005  No compression specified
   83 00:39:49.614197  progress  56 % (0 MB)
   84 00:39:49.614474  progress 100 % (0 MB)
   85 00:39:49.614670  0 MB downloaded in 0.00 s (32.02 MB/s)
   86 00:39:49.614814  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 00:39:49.615054  end: 1.3 download-retry (duration 00:00:00) [common]
   89 00:39:49.615135  start: 1.4 download-retry (timeout 00:09:59) [common]
   90 00:39:49.615213  start: 1.4.1 http-download (timeout 00:09:59) [common]
   91 00:39:49.615326  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
   92 00:39:49.615389  saving as /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/modules/modules.tar
   93 00:39:49.615444  total size: 8608736 (8 MB)
   94 00:39:49.615501  Using unxz to decompress xz
   95 00:39:49.616841  progress   0 % (0 MB)
   96 00:39:49.636198  progress   5 % (0 MB)
   97 00:39:49.664218  progress  10 % (0 MB)
   98 00:39:49.692889  progress  15 % (1 MB)
   99 00:39:49.717753  progress  20 % (1 MB)
  100 00:39:49.743005  progress  25 % (2 MB)
  101 00:39:49.767571  progress  30 % (2 MB)
  102 00:39:49.792363  progress  35 % (2 MB)
  103 00:39:49.820670  progress  40 % (3 MB)
  104 00:39:49.844196  progress  45 % (3 MB)
  105 00:39:49.869492  progress  50 % (4 MB)
  106 00:39:49.895866  progress  55 % (4 MB)
  107 00:39:49.921577  progress  60 % (4 MB)
  108 00:39:49.946125  progress  65 % (5 MB)
  109 00:39:49.971832  progress  70 % (5 MB)
  110 00:39:49.998670  progress  75 % (6 MB)
  111 00:39:50.025481  progress  80 % (6 MB)
  112 00:39:50.050467  progress  85 % (7 MB)
  113 00:39:50.076838  progress  90 % (7 MB)
  114 00:39:50.102455  progress  95 % (7 MB)
  115 00:39:50.127751  progress 100 % (8 MB)
  116 00:39:50.133332  8 MB downloaded in 0.52 s (15.85 MB/s)
  117 00:39:50.133557  end: 1.4.1 http-download (duration 00:00:01) [common]
  119 00:39:50.133810  end: 1.4 download-retry (duration 00:00:01) [common]
  120 00:39:50.133905  start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
  121 00:39:50.133999  start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
  122 00:39:50.134085  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 00:39:50.134197  start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
  124 00:39:50.134405  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_
  125 00:39:50.134556  makedir: /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin
  126 00:39:50.134685  makedir: /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/tests
  127 00:39:50.134809  makedir: /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/results
  128 00:39:50.134910  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-add-keys
  129 00:39:50.135054  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-add-sources
  130 00:39:50.135189  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-background-process-start
  131 00:39:50.135389  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-background-process-stop
  132 00:39:50.135555  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-common-functions
  133 00:39:50.135713  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-echo-ipv4
  134 00:39:50.135869  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-install-packages
  135 00:39:50.136026  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-installed-packages
  136 00:39:50.136179  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-os-build
  137 00:39:50.136333  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-probe-channel
  138 00:39:50.136487  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-probe-ip
  139 00:39:50.136637  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-target-ip
  140 00:39:50.136766  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-target-mac
  141 00:39:50.136901  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-target-storage
  142 00:39:50.137042  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-case
  143 00:39:50.137197  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-event
  144 00:39:50.137352  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-feedback
  145 00:39:50.137498  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-raise
  146 00:39:50.137650  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-reference
  147 00:39:50.137792  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-runner
  148 00:39:50.137938  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-set
  149 00:39:50.138052  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-test-shell
  150 00:39:50.138167  Updating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-install-packages (oe)
  151 00:39:50.138307  Updating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/bin/lava-installed-packages (oe)
  152 00:39:50.138418  Creating /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/environment
  153 00:39:50.138506  LAVA metadata
  154 00:39:50.138605  - LAVA_JOB_ID=14368363
  155 00:39:50.138667  - LAVA_DISPATCHER_IP=192.168.201.1
  156 00:39:50.138763  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  157 00:39:50.138820  skipped lava-vland-overlay
  158 00:39:50.138888  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  159 00:39:50.138959  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  160 00:39:50.139019  skipped lava-multinode-overlay
  161 00:39:50.139115  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  162 00:39:50.139213  start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
  163 00:39:50.139327  Loading test definitions
  164 00:39:50.139442  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  165 00:39:50.139537  Using /lava-14368363 at stage 0
  166 00:39:50.139970  uuid=14368363_1.5.2.3.1 testdef=None
  167 00:39:50.140091  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  168 00:39:50.140197  start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
  169 00:39:50.140868  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  171 00:39:50.141119  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  172 00:39:50.141748  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  174 00:39:50.141973  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  175 00:39:50.142760  runner path: /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/0/tests/0_dmesg test_uuid 14368363_1.5.2.3.1
  176 00:39:50.142948  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  178 00:39:50.143280  Creating lava-test-runner.conf files
  179 00:39:50.143359  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368363/lava-overlay-4xdshdf_/lava-14368363/0 for stage 0
  180 00:39:50.143464  - 0_dmesg
  181 00:39:50.143569  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  182 00:39:50.143682  start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
  183 00:39:50.151222  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  184 00:39:50.151384  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  185 00:39:50.151490  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  186 00:39:50.151571  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  187 00:39:50.151649  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  188 00:39:50.400726  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  189 00:39:50.400873  start: 1.5.4 extract-modules (timeout 00:09:59) [common]
  190 00:39:50.400957  extracting modules file /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368363/extract-overlay-ramdisk-5q_0g0ai/ramdisk
  191 00:39:50.633270  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  192 00:39:50.633427  start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
  193 00:39:50.633571  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368363/compress-overlay-7cmq746z/overlay-1.5.2.4.tar.gz to ramdisk
  194 00:39:50.633681  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368363/compress-overlay-7cmq746z/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368363/extract-overlay-ramdisk-5q_0g0ai/ramdisk
  195 00:39:50.640699  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  196 00:39:50.640819  start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
  197 00:39:50.640945  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  198 00:39:50.641057  start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
  199 00:39:50.641140  Building ramdisk /var/lib/lava/dispatcher/tmp/14368363/extract-overlay-ramdisk-5q_0g0ai/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368363/extract-overlay-ramdisk-5q_0g0ai/ramdisk
  200 00:39:51.028796  >> 145187 blocks

  201 00:39:53.431686  rename /var/lib/lava/dispatcher/tmp/14368363/extract-overlay-ramdisk-5q_0g0ai/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/ramdisk/ramdisk.cpio.gz
  202 00:39:53.431934  end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
  203 00:39:53.432082  start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
  204 00:39:53.432214  start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
  205 00:39:53.432344  Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/kernel/Image']
  206 00:40:08.281846  Returned 0 in 14 seconds
  207 00:40:08.382483  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/kernel/image.itb
  208 00:40:08.842095  output: FIT description: Kernel Image image with one or more FDT blobs
  209 00:40:08.842296  output: Created:         Sun Jun 16 01:40:08 2024
  210 00:40:08.842410  output:  Image 0 (kernel-1)
  211 00:40:08.842496  output:   Description:  
  212 00:40:08.842580  output:   Created:      Sun Jun 16 01:40:08 2024
  213 00:40:08.842666  output:   Type:         Kernel Image
  214 00:40:08.842751  output:   Compression:  lzma compressed
  215 00:40:08.842836  output:   Data Size:    13126376 Bytes = 12818.73 KiB = 12.52 MiB
  216 00:40:08.842919  output:   Architecture: AArch64
  217 00:40:08.842999  output:   OS:           Linux
  218 00:40:08.843080  output:   Load Address: 0x00000000
  219 00:40:08.843161  output:   Entry Point:  0x00000000
  220 00:40:08.843243  output:   Hash algo:    crc32
  221 00:40:08.843325  output:   Hash value:   c791a20a
  222 00:40:08.843407  output:  Image 1 (fdt-1)
  223 00:40:08.843487  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  224 00:40:08.843570  output:   Created:      Sun Jun 16 01:40:08 2024
  225 00:40:08.843651  output:   Type:         Flat Device Tree
  226 00:40:08.843753  output:   Compression:  uncompressed
  227 00:40:08.843837  output:   Data Size:    57695 Bytes = 56.34 KiB = 0.06 MiB
  228 00:40:08.843929  output:   Architecture: AArch64
  229 00:40:08.844060  output:   Hash algo:    crc32
  230 00:40:08.844161  output:   Hash value:   a9713552
  231 00:40:08.844240  output:  Image 2 (ramdisk-1)
  232 00:40:08.844332  output:   Description:  unavailable
  233 00:40:08.844408  output:   Created:      Sun Jun 16 01:40:08 2024
  234 00:40:08.844488  output:   Type:         RAMDisk Image
  235 00:40:08.844565  output:   Compression:  uncompressed
  236 00:40:08.844641  output:   Data Size:    21356943 Bytes = 20856.39 KiB = 20.37 MiB
  237 00:40:08.844717  output:   Architecture: AArch64
  238 00:40:08.844792  output:   OS:           Linux
  239 00:40:08.844869  output:   Load Address: unavailable
  240 00:40:08.844950  output:   Entry Point:  unavailable
  241 00:40:08.845025  output:   Hash algo:    crc32
  242 00:40:08.845100  output:   Hash value:   0d83a400
  243 00:40:08.845173  output:  Default Configuration: 'conf-1'
  244 00:40:08.845248  output:  Configuration 0 (conf-1)
  245 00:40:08.845323  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  246 00:40:08.845401  output:   Kernel:       kernel-1
  247 00:40:08.845476  output:   Init Ramdisk: ramdisk-1
  248 00:40:08.845579  output:   FDT:          fdt-1
  249 00:40:08.845671  output:   Loadables:    kernel-1
  250 00:40:08.845763  output: 
  251 00:40:08.845966  end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
  252 00:40:08.846107  end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
  253 00:40:08.846239  end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
  254 00:40:08.846360  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
  255 00:40:08.846461  No LXC device requested
  256 00:40:08.846568  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 00:40:08.846685  start: 1.7 deploy-device-env (timeout 00:09:40) [common]
  258 00:40:08.846792  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 00:40:08.846885  Checking files for TFTP limit of 4294967296 bytes.
  260 00:40:08.847505  end: 1 tftp-deploy (duration 00:00:20) [common]
  261 00:40:08.847638  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 00:40:08.847789  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 00:40:08.847946  substitutions:
  264 00:40:08.848037  - {DTB}: 14368363/tftp-deploy-svhd_iey/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
  265 00:40:08.848127  - {INITRD}: 14368363/tftp-deploy-svhd_iey/ramdisk/ramdisk.cpio.gz
  266 00:40:08.848208  - {KERNEL}: 14368363/tftp-deploy-svhd_iey/kernel/Image
  267 00:40:08.848288  - {LAVA_MAC}: None
  268 00:40:08.848368  - {PRESEED_CONFIG}: None
  269 00:40:08.848448  - {PRESEED_LOCAL}: None
  270 00:40:08.848528  - {RAMDISK}: 14368363/tftp-deploy-svhd_iey/ramdisk/ramdisk.cpio.gz
  271 00:40:08.848621  - {ROOT_PART}: None
  272 00:40:08.848703  - {ROOT}: None
  273 00:40:08.848805  - {SERVER_IP}: 192.168.201.1
  274 00:40:08.848930  - {TEE}: None
  275 00:40:08.849025  Parsed boot commands:
  276 00:40:08.849105  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  277 00:40:08.849336  Parsed boot commands: tftpboot 192.168.201.1 14368363/tftp-deploy-svhd_iey/kernel/image.itb 14368363/tftp-deploy-svhd_iey/kernel/cmdline 
  278 00:40:08.849461  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  279 00:40:08.849613  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  280 00:40:08.849752  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  281 00:40:08.849930  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  282 00:40:08.850040  Not connected, no need to disconnect.
  283 00:40:08.850144  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  284 00:40:08.850256  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  285 00:40:08.850353  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
  286 00:40:08.854884  Setting prompt string to ['lava-test: # ']
  287 00:40:08.855419  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  288 00:40:08.855579  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  289 00:40:08.855715  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  290 00:40:08.855837  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  291 00:40:08.856118  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
  292 00:40:18.004485  >> Command sent successfully.

  293 00:40:18.018496  Returned 0 in 9 seconds
  294 00:40:18.119664  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  296 00:40:18.120893  end: 2.2.2 reset-device (duration 00:00:09) [common]
  297 00:40:18.121356  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  298 00:40:18.121845  Setting prompt string to 'Starting depthcharge on Juniper...'
  299 00:40:18.122233  Changing prompt to 'Starting depthcharge on Juniper...'
  300 00:40:18.122582  depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
  301 00:40:18.124219  [Enter `^Ec?' for help]

  302 00:40:23.683778  [DL] 00000000 00000000 010701

  303 00:40:23.688973  

  304 00:40:23.689399  

  305 00:40:23.689770  F0: 102B 0000

  306 00:40:23.690091  

  307 00:40:23.690448  F3: 1006 0033 [0200]

  308 00:40:23.692239  

  309 00:40:23.692591  F3: 4001 00E0 [0200]

  310 00:40:23.692899  

  311 00:40:23.693173  F3: 0000 0000

  312 00:40:23.694994  

  313 00:40:23.695498  V0: 0000 0000 [0001]

  314 00:40:23.695861  

  315 00:40:23.696147  00: 1027 0002

  316 00:40:23.696446  

  317 00:40:23.698412  01: 0000 0000

  318 00:40:23.698811  

  319 00:40:23.699118  BP: 0C00 0251 [0000]

  320 00:40:23.699403  

  321 00:40:23.701788  G0: 1182 0000

  322 00:40:23.702176  

  323 00:40:23.702547  EC: 0004 0000 [0001]

  324 00:40:23.702842  

  325 00:40:23.705786  S7: 0000 0000 [0000]

  326 00:40:23.706179  

  327 00:40:23.708492  CC: 0000 0000 [0001]

  328 00:40:23.708899  

  329 00:40:23.709205  T0: 0000 00DB [000F]

  330 00:40:23.709489  

  331 00:40:23.709791  Jump to BL

  332 00:40:23.710056  

  333 00:40:23.744794  


  334 00:40:23.745076  

  335 00:40:23.751246  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...

  336 00:40:23.754404  ARM64: Exception handlers installed.

  337 00:40:23.757811  ARM64: Testing exception

  338 00:40:23.760996  ARM64: Done test exception

  339 00:40:23.765403  WDT: Last reset was cold boot

  340 00:40:23.765507  SPI0(PAD0) initialized at 992727 Hz

  341 00:40:23.771883  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

  342 00:40:23.772005  Manufacturer: ef

  343 00:40:23.778660  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  344 00:40:23.791326  Probing TPM: . done!

  345 00:40:23.791439  TPM ready after 0 ms

  346 00:40:23.797394  Connected to device vid:did:rid of 1ae0:0028:00

  347 00:40:23.807508  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c

  348 00:40:23.843516  Initialized TPM device CR50 revision 0

  349 00:40:23.855613  tlcl_send_startup: Startup return code is 0

  350 00:40:23.856018  TPM: setup succeeded

  351 00:40:23.864741  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  352 00:40:23.868168  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  353 00:40:23.871600  in-header: 03 19 00 00 08 00 00 00 

  354 00:40:23.874840  in-data: a2 e0 47 00 13 00 00 00 

  355 00:40:23.877771  Chrome EC: UHEPI supported

  356 00:40:23.884666  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  357 00:40:23.887953  in-header: 03 a1 00 00 08 00 00 00 

  358 00:40:23.891140  in-data: 84 60 60 10 00 00 00 00 

  359 00:40:23.891361  Phase 1

  360 00:40:23.894093  FMAP: area GBB found @ 3f5000 (12032 bytes)

  361 00:40:23.900521  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  362 00:40:23.907061  VB2:vb2_check_recovery() Recovery was requested manually

  363 00:40:23.910571  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0

  364 00:40:23.917238  Recovery requested (1009000e)

  365 00:40:23.925974  tlcl_extend: response is 0

  366 00:40:23.931405  tlcl_extend: response is 0

  367 00:40:23.956163  

  368 00:40:23.956256  

  369 00:40:23.962645  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...

  370 00:40:23.966609  ARM64: Exception handlers installed.

  371 00:40:23.970227  ARM64: Testing exception

  372 00:40:23.972718  ARM64: Done test exception

  373 00:40:23.988369  [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2031

  374 00:40:23.995150  [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2

  375 00:40:23.998182  [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a

  376 00:40:24.006813  [RTC]rtc_get_frequency_meter,134: input=0xf, output=822

  377 00:40:24.013965  [RTC]rtc_get_frequency_meter,134: input=0x7, output=698

  378 00:40:24.020437  [RTC]rtc_get_frequency_meter,134: input=0xb, output=761

  379 00:40:24.027713  [RTC]rtc_get_frequency_meter,134: input=0xd, output=792

  380 00:40:24.030896  [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d

  381 00:40:24.037750  [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482

  382 00:40:24.040889  [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1

  383 00:40:24.047678  [RTC]rtc_bbpu_power_on,376: done BBPU=0x9

  384 00:40:24.050980  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  385 00:40:24.054568  in-header: 03 19 00 00 08 00 00 00 

  386 00:40:24.057545  in-data: a2 e0 47 00 13 00 00 00 

  387 00:40:24.057648  Chrome EC: UHEPI supported

  388 00:40:24.064137  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  389 00:40:24.067187  in-header: 03 a1 00 00 08 00 00 00 

  390 00:40:24.070948  in-data: 84 60 60 10 00 00 00 00 

  391 00:40:24.074073  Skip loading cached calibration data

  392 00:40:24.080813  out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 

  393 00:40:24.084047  in-header: 03 a1 00 00 08 00 00 00 

  394 00:40:24.087272  in-data: 84 60 60 10 00 00 00 00 

  395 00:40:24.093771  out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 

  396 00:40:24.096994  in-header: 03 a1 00 00 08 00 00 00 

  397 00:40:24.100765  in-data: 84 60 60 10 00 00 00 00 

  398 00:40:24.104219  ADC[3]: Raw value=214540 ID=1

  399 00:40:24.104301  Manufacturer: ef

  400 00:40:24.110574  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  401 00:40:24.114233  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  402 00:40:24.116831  CBFS @ 21000 size 3d4000

  403 00:40:24.123895  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  404 00:40:24.127028  CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'

  405 00:40:24.130166  CBFS: Found @ offset 3c700 size 44

  406 00:40:24.133100  DRAM-K: Full Calibration

  407 00:40:24.136687  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  408 00:40:24.139824  CBFS @ 21000 size 3d4000

  409 00:40:24.143853  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  410 00:40:24.147161  CBFS: Locating 'fallback/dram'

  411 00:40:24.149822  CBFS: Found @ offset 24b00 size 12268

  412 00:40:24.178902  read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps

  413 00:40:24.182047  ddr_geometry: 1, config: 0x0

  414 00:40:24.185272  header.status = 0x0

  415 00:40:24.188869  header.magic = 0x44524d4b (expected: 0x44524d4b)

  416 00:40:24.192072  header.version = 0x5 (expected: 0x5)

  417 00:40:24.195159  header.size = 0x8f0 (expected: 0x8f0)

  418 00:40:24.195328  header.config = 0x0

  419 00:40:24.198618  header.flags = 0x0

  420 00:40:24.201788  header.checksum = 0x0

  421 00:40:24.208469  dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5

  422 00:40:24.211715  Set DRAM voltage: vdram1 = 1125000, vddq = 600000

  423 00:40:24.218474  Get DRAM voltage to vdram1 = 1125000, vddq = 600000

  424 00:40:24.218613  ddr_geometry:1

  425 00:40:24.221796  [EMI] new MDL number = 1

  426 00:40:24.221901  dram_cbt_mode_extern: 0

  427 00:40:24.225232  dram_cbt_mode [RK0]: 0, [RK1]: 0

  428 00:40:24.231391  Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]

  429 00:40:24.231511  

  430 00:40:24.231585  

  431 00:40:24.234813  [Bianco] ETT version 0.0.0.1

  432 00:40:24.238212   dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6

  433 00:40:24.238316  

  434 00:40:24.241436  vSetVcoreByFreq with vcore:762500, freq=1600

  435 00:40:24.241530  

  436 00:40:24.244638  [DramcInit]

  437 00:40:24.248653  AutoRefreshCKEOff AutoREF OFF

  438 00:40:24.248781  DDRPhyPLLSetting-CKEOFF

  439 00:40:24.251487  DDRPhyPLLSetting-CKEON

  440 00:40:24.251568  

  441 00:40:24.251628  Enable WDQS

  442 00:40:24.256195  [ModeRegInit_LP4] CH0 RK0

  443 00:40:24.259370  Write Rank0 MR13 =0x18

  444 00:40:24.259462  Write Rank0 MR12 =0x5d

  445 00:40:24.262997  Write Rank0 MR1 =0x56

  446 00:40:24.266236  Write Rank0 MR2 =0x1a

  447 00:40:24.266329  Write Rank0 MR11 =0x0

  448 00:40:24.269431  Write Rank0 MR22 =0x38

  449 00:40:24.269511  Write Rank0 MR14 =0x5d

  450 00:40:24.272861  Write Rank0 MR3 =0x30

  451 00:40:24.275899  Write Rank0 MR13 =0x58

  452 00:40:24.275985  Write Rank0 MR12 =0x5d

  453 00:40:24.278987  Write Rank0 MR1 =0x56

  454 00:40:24.283069  Write Rank0 MR2 =0x2d

  455 00:40:24.283153  Write Rank0 MR11 =0x23

  456 00:40:24.286274  Write Rank0 MR22 =0x34

  457 00:40:24.286358  Write Rank0 MR14 =0x10

  458 00:40:24.289657  Write Rank0 MR3 =0x30

  459 00:40:24.292645  Write Rank0 MR13 =0xd8

  460 00:40:24.292746  [ModeRegInit_LP4] CH0 RK1

  461 00:40:24.295640  Write Rank1 MR13 =0x18

  462 00:40:24.298744  Write Rank1 MR12 =0x5d

  463 00:40:24.298830  Write Rank1 MR1 =0x56

  464 00:40:24.302605  Write Rank1 MR2 =0x1a

  465 00:40:24.302686  Write Rank1 MR11 =0x0

  466 00:40:24.305367  Write Rank1 MR22 =0x38

  467 00:40:24.308684  Write Rank1 MR14 =0x5d

  468 00:40:24.308773  Write Rank1 MR3 =0x30

  469 00:40:24.311782  Write Rank1 MR13 =0x58

  470 00:40:24.315324  Write Rank1 MR12 =0x5d

  471 00:40:24.315420  Write Rank1 MR1 =0x56

  472 00:40:24.318364  Write Rank1 MR2 =0x2d

  473 00:40:24.318446  Write Rank1 MR11 =0x23

  474 00:40:24.321641  Write Rank1 MR22 =0x34

  475 00:40:24.325030  Write Rank1 MR14 =0x10

  476 00:40:24.325102  Write Rank1 MR3 =0x30

  477 00:40:24.328741  Write Rank1 MR13 =0xd8

  478 00:40:24.331982  [ModeRegInit_LP4] CH1 RK0

  479 00:40:24.332084  Write Rank0 MR13 =0x18

  480 00:40:24.335459  Write Rank0 MR12 =0x5d

  481 00:40:24.335545  Write Rank0 MR1 =0x56

  482 00:40:24.338252  Write Rank0 MR2 =0x1a

  483 00:40:24.341830  Write Rank0 MR11 =0x0

  484 00:40:24.341915  Write Rank0 MR22 =0x38

  485 00:40:24.345059  Write Rank0 MR14 =0x5d

  486 00:40:24.348559  Write Rank0 MR3 =0x30

  487 00:40:24.348644  Write Rank0 MR13 =0x58

  488 00:40:24.351712  Write Rank0 MR12 =0x5d

  489 00:40:24.351817  Write Rank0 MR1 =0x56

  490 00:40:24.355299  Write Rank0 MR2 =0x2d

  491 00:40:24.358379  Write Rank0 MR11 =0x23

  492 00:40:24.358465  Write Rank0 MR22 =0x34

  493 00:40:24.361421  Write Rank0 MR14 =0x10

  494 00:40:24.361530  Write Rank0 MR3 =0x30

  495 00:40:24.364839  Write Rank0 MR13 =0xd8

  496 00:40:24.368751  [ModeRegInit_LP4] CH1 RK1

  497 00:40:24.368836  Write Rank1 MR13 =0x18

  498 00:40:24.371871  Write Rank1 MR12 =0x5d

  499 00:40:24.374964  Write Rank1 MR1 =0x56

  500 00:40:24.375048  Write Rank1 MR2 =0x1a

  501 00:40:24.378225  Write Rank1 MR11 =0x0

  502 00:40:24.378306  Write Rank1 MR22 =0x38

  503 00:40:24.381453  Write Rank1 MR14 =0x5d

  504 00:40:24.384509  Write Rank1 MR3 =0x30

  505 00:40:24.384586  Write Rank1 MR13 =0x58

  506 00:40:24.387653  Write Rank1 MR12 =0x5d

  507 00:40:24.391295  Write Rank1 MR1 =0x56

  508 00:40:24.391373  Write Rank1 MR2 =0x2d

  509 00:40:24.394725  Write Rank1 MR11 =0x23

  510 00:40:24.394804  Write Rank1 MR22 =0x34

  511 00:40:24.398161  Write Rank1 MR14 =0x10

  512 00:40:24.401673  Write Rank1 MR3 =0x30

  513 00:40:24.401753  Write Rank1 MR13 =0xd8

  514 00:40:24.404900  match AC timing 3

  515 00:40:24.414726  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  516 00:40:24.414852  [MiockJmeterHQA]

  517 00:40:24.417906  vSetVcoreByFreq with vcore:762500, freq=1600

  518 00:40:24.523895  

  519 00:40:24.524053  	MIOCK jitter meter	ch=0

  520 00:40:24.524132  

  521 00:40:24.527080  1T = (102-19) = 83 dly cells

  522 00:40:24.533633  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps

  523 00:40:24.536891  vSetVcoreByFreq with vcore:725000, freq=1200

  524 00:40:24.637938  

  525 00:40:24.638445  	MIOCK jitter meter	ch=0

  526 00:40:24.638759  

  527 00:40:24.641529  1T = (97-18) = 79 dly cells

  528 00:40:24.648107  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps

  529 00:40:24.651384  vSetVcoreByFreq with vcore:725000, freq=800

  530 00:40:24.751337  

  531 00:40:24.751508  	MIOCK jitter meter	ch=0

  532 00:40:24.751599  

  533 00:40:24.754288  1T = (97-18) = 79 dly cells

  534 00:40:24.761143  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps

  535 00:40:24.763682  vSetVcoreByFreq with vcore:762500, freq=1600

  536 00:40:24.767100  vSetVcoreByFreq with vcore:762500, freq=1600

  537 00:40:24.767178  

  538 00:40:24.767237  	K DRVP

  539 00:40:24.770709  1. OCD DRVP=0 CALOUT=0

  540 00:40:24.773539  1. OCD DRVP=1 CALOUT=0

  541 00:40:24.773659  1. OCD DRVP=2 CALOUT=0

  542 00:40:24.776886  1. OCD DRVP=3 CALOUT=0

  543 00:40:24.780505  1. OCD DRVP=4 CALOUT=0

  544 00:40:24.780626  1. OCD DRVP=5 CALOUT=0

  545 00:40:24.783948  1. OCD DRVP=6 CALOUT=0

  546 00:40:24.784049  1. OCD DRVP=7 CALOUT=0

  547 00:40:24.787152  1. OCD DRVP=8 CALOUT=1

  548 00:40:24.787248  

  549 00:40:24.790448  1. OCD DRVP calibration OK! DRVP=8

  550 00:40:24.790526  

  551 00:40:24.790591  

  552 00:40:24.790655  

  553 00:40:24.790796  	K ODTN

  554 00:40:24.793815  3. OCD ODTN=0 ,CALOUT=1

  555 00:40:24.797266  3. OCD ODTN=1 ,CALOUT=1

  556 00:40:24.797374  3. OCD ODTN=2 ,CALOUT=1

  557 00:40:24.800229  3. OCD ODTN=3 ,CALOUT=1

  558 00:40:24.803442  3. OCD ODTN=4 ,CALOUT=1

  559 00:40:24.803520  3. OCD ODTN=5 ,CALOUT=1

  560 00:40:24.806893  3. OCD ODTN=6 ,CALOUT=1

  561 00:40:24.810127  3. OCD ODTN=7 ,CALOUT=0

  562 00:40:24.810211  

  563 00:40:24.813260  3. OCD ODTN calibration OK! ODTN=7

  564 00:40:24.813351  

  565 00:40:24.817026  [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7

  566 00:40:24.820373  term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15

  567 00:40:24.826495  term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)

  568 00:40:24.826601  

  569 00:40:24.826682  	K DRVP

  570 00:40:24.826758  1. OCD DRVP=0 CALOUT=0

  571 00:40:24.829852  1. OCD DRVP=1 CALOUT=0

  572 00:40:24.833201  1. OCD DRVP=2 CALOUT=0

  573 00:40:24.833332  1. OCD DRVP=3 CALOUT=0

  574 00:40:24.836877  1. OCD DRVP=4 CALOUT=0

  575 00:40:24.839831  1. OCD DRVP=5 CALOUT=0

  576 00:40:24.839979  1. OCD DRVP=6 CALOUT=0

  577 00:40:24.843233  1. OCD DRVP=7 CALOUT=0

  578 00:40:24.843402  1. OCD DRVP=8 CALOUT=0

  579 00:40:24.846430  1. OCD DRVP=9 CALOUT=1

  580 00:40:24.846599  

  581 00:40:24.849631  1. OCD DRVP calibration OK! DRVP=9

  582 00:40:24.849830  

  583 00:40:24.849982  

  584 00:40:24.850122  

  585 00:40:24.853450  	K ODTN

  586 00:40:24.853757  3. OCD ODTN=0 ,CALOUT=1

  587 00:40:24.856534  3. OCD ODTN=1 ,CALOUT=1

  588 00:40:24.856774  3. OCD ODTN=2 ,CALOUT=1

  589 00:40:24.859996  3. OCD ODTN=3 ,CALOUT=1

  590 00:40:24.862974  3. OCD ODTN=4 ,CALOUT=1

  591 00:40:24.863388  3. OCD ODTN=5 ,CALOUT=1

  592 00:40:24.866626  3. OCD ODTN=6 ,CALOUT=1

  593 00:40:24.869911  3. OCD ODTN=7 ,CALOUT=1

  594 00:40:24.870308  3. OCD ODTN=8 ,CALOUT=1

  595 00:40:24.873337  3. OCD ODTN=9 ,CALOUT=1

  596 00:40:24.876583  3. OCD ODTN=10 ,CALOUT=1

  597 00:40:24.876978  3. OCD ODTN=11 ,CALOUT=1

  598 00:40:24.879815  3. OCD ODTN=12 ,CALOUT=1

  599 00:40:24.882974  3. OCD ODTN=13 ,CALOUT=0

  600 00:40:24.883369  

  601 00:40:24.886165  3. OCD ODTN calibration OK! ODTN=13

  602 00:40:24.886563  

  603 00:40:24.889712  [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=13

  604 00:40:24.892831  term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13

  605 00:40:24.899303  term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13 (After Adjust)

  606 00:40:24.899579  

  607 00:40:24.899794  [DramcInit]

  608 00:40:24.902657  AutoRefreshCKEOff AutoREF OFF

  609 00:40:24.906017  DDRPhyPLLSetting-CKEOFF

  610 00:40:24.906225  DDRPhyPLLSetting-CKEON

  611 00:40:24.906386  

  612 00:40:24.909558  Enable WDQS

  613 00:40:24.909728  ==

  614 00:40:24.912843  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  615 00:40:24.915413  fsp= 1, odt_onoff= 1, Byte mode= 0

  616 00:40:24.915555  ==

  617 00:40:24.918689  [Duty_Offset_Calibration]

  618 00:40:24.918809  

  619 00:40:24.921958  ===========================

  620 00:40:24.922065  	B0:2	B1:2	CA:1

  621 00:40:24.944866  ==

  622 00:40:24.948185  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

  623 00:40:24.951239  fsp= 1, odt_onoff= 1, Byte mode= 0

  624 00:40:24.951316  ==

  625 00:40:24.954000  [Duty_Offset_Calibration]

  626 00:40:24.954076  

  627 00:40:24.957568  ===========================

  628 00:40:24.957699  	B0:0	B1:0	CA:-1

  629 00:40:24.990181  [ModeRegInit_LP4] CH0 RK0

  630 00:40:24.993400  Write Rank0 MR13 =0x18

  631 00:40:24.993476  Write Rank0 MR12 =0x5d

  632 00:40:24.996490  Write Rank0 MR1 =0x56

  633 00:40:25.000493  Write Rank0 MR2 =0x1a

  634 00:40:25.000568  Write Rank0 MR11 =0x0

  635 00:40:25.003216  Write Rank0 MR22 =0x38

  636 00:40:25.006474  Write Rank0 MR14 =0x5d

  637 00:40:25.006550  Write Rank0 MR3 =0x30

  638 00:40:25.010041  Write Rank0 MR13 =0x58

  639 00:40:25.010117  Write Rank0 MR12 =0x5d

  640 00:40:25.013231  Write Rank0 MR1 =0x56

  641 00:40:25.016324  Write Rank0 MR2 =0x2d

  642 00:40:25.016402  Write Rank0 MR11 =0x23

  643 00:40:25.020150  Write Rank0 MR22 =0x34

  644 00:40:25.020225  Write Rank0 MR14 =0x10

  645 00:40:25.023079  Write Rank0 MR3 =0x30

  646 00:40:25.026309  Write Rank0 MR13 =0xd8

  647 00:40:25.026390  [ModeRegInit_LP4] CH0 RK1

  648 00:40:25.029502  Write Rank1 MR13 =0x18

  649 00:40:25.033194  Write Rank1 MR12 =0x5d

  650 00:40:25.033288  Write Rank1 MR1 =0x56

  651 00:40:25.036632  Write Rank1 MR2 =0x1a

  652 00:40:25.036726  Write Rank1 MR11 =0x0

  653 00:40:25.039926  Write Rank1 MR22 =0x38

  654 00:40:25.042694  Write Rank1 MR14 =0x5d

  655 00:40:25.042806  Write Rank1 MR3 =0x30

  656 00:40:25.046305  Write Rank1 MR13 =0x58

  657 00:40:25.049472  Write Rank1 MR12 =0x5d

  658 00:40:25.049570  Write Rank1 MR1 =0x56

  659 00:40:25.052881  Write Rank1 MR2 =0x2d

  660 00:40:25.052971  Write Rank1 MR11 =0x23

  661 00:40:25.056259  Write Rank1 MR22 =0x34

  662 00:40:25.059561  Write Rank1 MR14 =0x10

  663 00:40:25.059643  Write Rank1 MR3 =0x30

  664 00:40:25.062836  Write Rank1 MR13 =0xd8

  665 00:40:25.066535  [ModeRegInit_LP4] CH1 RK0

  666 00:40:25.066632  Write Rank0 MR13 =0x18

  667 00:40:25.069332  Write Rank0 MR12 =0x5d

  668 00:40:25.069412  Write Rank0 MR1 =0x56

  669 00:40:25.073148  Write Rank0 MR2 =0x1a

  670 00:40:25.075735  Write Rank0 MR11 =0x0

  671 00:40:25.075816  Write Rank0 MR22 =0x38

  672 00:40:25.079690  Write Rank0 MR14 =0x5d

  673 00:40:25.079771  Write Rank0 MR3 =0x30

  674 00:40:25.082504  Write Rank0 MR13 =0x58

  675 00:40:25.085809  Write Rank0 MR12 =0x5d

  676 00:40:25.085896  Write Rank0 MR1 =0x56

  677 00:40:25.089191  Write Rank0 MR2 =0x2d

  678 00:40:25.092784  Write Rank0 MR11 =0x23

  679 00:40:25.093181  Write Rank0 MR22 =0x34

  680 00:40:25.095925  Write Rank0 MR14 =0x10

  681 00:40:25.096377  Write Rank0 MR3 =0x30

  682 00:40:25.099164  Write Rank0 MR13 =0xd8

  683 00:40:25.102698  [ModeRegInit_LP4] CH1 RK1

  684 00:40:25.103083  Write Rank1 MR13 =0x18

  685 00:40:25.105966  Write Rank1 MR12 =0x5d

  686 00:40:25.109289  Write Rank1 MR1 =0x56

  687 00:40:25.109711  Write Rank1 MR2 =0x1a

  688 00:40:25.112788  Write Rank1 MR11 =0x0

  689 00:40:25.113176  Write Rank1 MR22 =0x38

  690 00:40:25.116042  Write Rank1 MR14 =0x5d

  691 00:40:25.119212  Write Rank1 MR3 =0x30

  692 00:40:25.119595  Write Rank1 MR13 =0x58

  693 00:40:25.122340  Write Rank1 MR12 =0x5d

  694 00:40:25.125444  Write Rank1 MR1 =0x56

  695 00:40:25.125993  Write Rank1 MR2 =0x2d

  696 00:40:25.128786  Write Rank1 MR11 =0x23

  697 00:40:25.129173  Write Rank1 MR22 =0x34

  698 00:40:25.132122  Write Rank1 MR14 =0x10

  699 00:40:25.135251  Write Rank1 MR3 =0x30

  700 00:40:25.135528  Write Rank1 MR13 =0xd8

  701 00:40:25.138976  match AC timing 3

  702 00:40:25.148315  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  703 00:40:25.148460  DramC Write-DBI off

  704 00:40:25.151742  DramC Read-DBI off

  705 00:40:25.151891  Write Rank0 MR13 =0x59

  706 00:40:25.151985  ==

  707 00:40:25.158364  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  708 00:40:25.161659  fsp= 1, odt_onoff= 1, Byte mode= 0

  709 00:40:25.161839  ==

  710 00:40:25.164994  === u2Vref_new: 0x56 --> 0x2d

  711 00:40:25.168234  === u2Vref_new: 0x58 --> 0x38

  712 00:40:25.171623  === u2Vref_new: 0x5a --> 0x39

  713 00:40:25.174712  === u2Vref_new: 0x5c --> 0x3c

  714 00:40:25.178307  === u2Vref_new: 0x5e --> 0x3d

  715 00:40:25.178373  === u2Vref_new: 0x60 --> 0xa0

  716 00:40:25.181325  [CA 0] Center 34 (6~63) winsize 58

  717 00:40:25.184993  [CA 1] Center 35 (8~63) winsize 56

  718 00:40:25.188243  [CA 2] Center 30 (1~59) winsize 59

  719 00:40:25.191783  [CA 3] Center 25 (-3~53) winsize 57

  720 00:40:25.194932  [CA 4] Center 25 (-2~53) winsize 56

  721 00:40:25.197721  [CA 5] Center 31 (2~60) winsize 59

  722 00:40:25.197798  

  723 00:40:25.201051  [CATrainingPosCal] consider 1 rank data

  724 00:40:25.204403  u2DelayCellTimex100 = 753/100 ps

  725 00:40:25.207845  CA0 delay=34 (6~63),Diff = 9 PI (11 cell)

  726 00:40:25.211240  CA1 delay=35 (8~63),Diff = 10 PI (12 cell)

  727 00:40:25.217683  CA2 delay=30 (1~59),Diff = 5 PI (6 cell)

  728 00:40:25.221131  CA3 delay=25 (-3~53),Diff = 0 PI (0 cell)

  729 00:40:25.224308  CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)

  730 00:40:25.227628  CA5 delay=31 (2~60),Diff = 6 PI (7 cell)

  731 00:40:25.227731  

  732 00:40:25.231265  CA PerBit enable=1, Macro0, CA PI delay=25

  733 00:40:25.234478  === u2Vref_new: 0x5e --> 0x3d

  734 00:40:25.234592  

  735 00:40:25.237592  Vref(ca) range 1: 30

  736 00:40:25.237718  

  737 00:40:25.237815  CS Dly= 7 (38-0-32)

  738 00:40:25.241056  Write Rank0 MR13 =0xd8

  739 00:40:25.241180  Write Rank0 MR13 =0xd8

  740 00:40:25.244623  Write Rank0 MR12 =0x5e

  741 00:40:25.248242  Write Rank1 MR13 =0x59

  742 00:40:25.248629  ==

  743 00:40:25.251315  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

  744 00:40:25.254991  fsp= 1, odt_onoff= 1, Byte mode= 0

  745 00:40:25.255423  ==

  746 00:40:25.258224  === u2Vref_new: 0x56 --> 0x2d

  747 00:40:25.261002  === u2Vref_new: 0x58 --> 0x38

  748 00:40:25.264352  === u2Vref_new: 0x5a --> 0x39

  749 00:40:25.267740  === u2Vref_new: 0x5c --> 0x3c

  750 00:40:25.271025  === u2Vref_new: 0x5e --> 0x3d

  751 00:40:25.274322  === u2Vref_new: 0x60 --> 0xa0

  752 00:40:25.277531  [CA 0] Center 35 (8~63) winsize 56

  753 00:40:25.280681  [CA 1] Center 35 (7~63) winsize 57

  754 00:40:25.283774  [CA 2] Center 31 (2~60) winsize 59

  755 00:40:25.287201  [CA 3] Center 25 (-2~53) winsize 56

  756 00:40:25.290745  [CA 4] Center 26 (-2~54) winsize 57

  757 00:40:25.293926  [CA 5] Center 32 (3~61) winsize 59

  758 00:40:25.294093  

  759 00:40:25.297095  [CATrainingPosCal] consider 2 rank data

  760 00:40:25.300334  u2DelayCellTimex100 = 753/100 ps

  761 00:40:25.303716  CA0 delay=35 (8~63),Diff = 10 PI (12 cell)

  762 00:40:25.307193  CA1 delay=35 (8~63),Diff = 10 PI (12 cell)

  763 00:40:25.310748  CA2 delay=30 (2~59),Diff = 5 PI (6 cell)

  764 00:40:25.314091  CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)

  765 00:40:25.317494  CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)

  766 00:40:25.320691  CA5 delay=31 (3~60),Diff = 6 PI (7 cell)

  767 00:40:25.320932  

  768 00:40:25.327294  CA PerBit enable=1, Macro0, CA PI delay=25

  769 00:40:25.327588  === u2Vref_new: 0x5e --> 0x3d

  770 00:40:25.327783  

  771 00:40:25.330319  Vref(ca) range 1: 30

  772 00:40:25.330557  

  773 00:40:25.333495  CS Dly= 7 (38-0-32)

  774 00:40:25.333822  Write Rank1 MR13 =0xd8

  775 00:40:25.337540  Write Rank1 MR13 =0xd8

  776 00:40:25.340386  Write Rank1 MR12 =0x5e

  777 00:40:25.344088  [RankSwap] Rank num 2, (Multi 1), Rank 0

  778 00:40:25.344633  Write Rank0 MR2 =0xad

  779 00:40:25.347232  [Write Leveling]

  780 00:40:25.350458  delay  byte0  byte1  byte2  byte3

  781 00:40:25.350891  

  782 00:40:25.351221  10    0   0   

  783 00:40:25.351542  11    0   0   

  784 00:40:25.353647  12    0   0   

  785 00:40:25.354083  13    0   0   

  786 00:40:25.357005  14    0   0   

  787 00:40:25.357528  15    0   0   

  788 00:40:25.360079  16    0   0   

  789 00:40:25.360515  17    0   0   

  790 00:40:25.360858  18    0   0   

  791 00:40:25.363900  19    0   0   

  792 00:40:25.364425  20    0   0   

  793 00:40:25.366913  21    0   0   

  794 00:40:25.367352  22    0   ff   

  795 00:40:25.370062  23    0   ff   

  796 00:40:25.370500  24    0   ff   

  797 00:40:25.370843  25    0   ff   

  798 00:40:25.373769  26    0   ff   

  799 00:40:25.374295  27    0   ff   

  800 00:40:25.377076  28    0   ff   

  801 00:40:25.377631  29    0   ff   

  802 00:40:25.380783  30    0   ff   

  803 00:40:25.381350  31    0   ff   

  804 00:40:25.381860  32    ff   ff   

  805 00:40:25.383846  33    ff   ff   

  806 00:40:25.384303  34    ff   ff   

  807 00:40:25.386746  35    ff   ff   

  808 00:40:25.387218  36    ff   ff   

  809 00:40:25.390445  37    ff   ff   

  810 00:40:25.390901  38    ff   ff   

  811 00:40:25.397300  pass bytecount = 0xff (0xff: all bytes pass) 

  812 00:40:25.397936  

  813 00:40:25.398449  DQS0 dly: 32

  814 00:40:25.398764  DQS1 dly: 22

  815 00:40:25.399995  Write Rank0 MR2 =0x2d

  816 00:40:25.403268  [RankSwap] Rank num 2, (Multi 1), Rank 0

  817 00:40:25.407361  Write Rank0 MR1 =0xd6

  818 00:40:25.407868  [Gating]

  819 00:40:25.408278  ==

  820 00:40:25.413355  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  821 00:40:25.413911  fsp= 1, odt_onoff= 1, Byte mode= 0

  822 00:40:25.416259  ==

  823 00:40:25.419828  3 1 0 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 1)| 0

  824 00:40:25.423047  3 1 4 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 1)| 0

  825 00:40:25.426220  3 1 8 |3534 2c2b  |(11 11)(11 11) |(1 1)(0 0)| 0

  826 00:40:25.433254  3 1 12 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

  827 00:40:25.436614  3 1 16 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

  828 00:40:25.443031  3 1 20 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

  829 00:40:25.446296  3 1 24 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

  830 00:40:25.449465  3 1 28 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

  831 00:40:25.455740  3 2 0 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

  832 00:40:25.459086  3 2 4 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

  833 00:40:25.462541  3 2 8 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

  834 00:40:25.465897  3 2 12 |2625 2c2b  |(11 11)(11 11) |(1 1)(0 0)| 0

  835 00:40:25.472161  3 2 16 |3d3d 302  |(11 11)(11 11) |(1 1)(0 0)| 0

  836 00:40:25.475465  3 2 20 |3d3d 302  |(11 11)(11 11) |(1 1)(0 0)| 0

  837 00:40:25.478765  3 2 24 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  838 00:40:25.485719  3 2 28 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  839 00:40:25.488695  3 3 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  840 00:40:25.491922  3 3 4 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  841 00:40:25.498693  3 3 8 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

  842 00:40:25.501924  3 3 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  843 00:40:25.504900  3 3 16 |706 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  844 00:40:25.511836  3 3 20 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  845 00:40:25.515085  [Byte 0] Lead/lag Transition tap number (1)

  846 00:40:25.518811  [Byte 1] Lead/lag falling Transition (3, 3, 20)

  847 00:40:25.522105  3 3 24 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  848 00:40:25.528244  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  849 00:40:25.531443  3 4 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  850 00:40:25.535180  3 4 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  851 00:40:25.541962  3 4 8 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  852 00:40:25.545450  3 4 12 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

  853 00:40:25.548323  3 4 16 |b0a 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  854 00:40:25.555028  3 4 20 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

  855 00:40:25.558265  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  856 00:40:25.561123  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  857 00:40:25.567969  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  858 00:40:25.571244  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  859 00:40:25.574286  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  860 00:40:25.581220  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  861 00:40:25.584401  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  862 00:40:25.587634  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  863 00:40:25.593631  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  864 00:40:25.597438  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  865 00:40:25.600674  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  866 00:40:25.607387  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  867 00:40:25.610794  [Byte 0] Lead/lag falling Transition (3, 6, 4)

  868 00:40:25.613949  [Byte 1] Lead/lag falling Transition (3, 6, 4)

  869 00:40:25.617049  3 6 8 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 0)| 0

  870 00:40:25.624019  [Byte 0] Lead/lag Transition tap number (2)

  871 00:40:25.626508  3 6 12 |202 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

  872 00:40:25.630468  [Byte 1] Lead/lag Transition tap number (3)

  873 00:40:25.633542  3 6 16 |404 3e3d  |(11 11)(11 11) |(0 0)(0 0)| 0

  874 00:40:25.640324  3 6 20 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

  875 00:40:25.640845  [Byte 0]First pass (3, 6, 20)

  876 00:40:25.646694  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  877 00:40:25.647213  [Byte 1]First pass (3, 6, 24)

  878 00:40:25.653230  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  879 00:40:25.656820  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  880 00:40:25.659945  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  881 00:40:25.663212  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  882 00:40:25.669727  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  883 00:40:25.673412  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  884 00:40:25.676535  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  885 00:40:25.679578  3 7 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  886 00:40:25.682857  All bytes gating window > 1UI, Early break!

  887 00:40:25.683292  

  888 00:40:25.690285  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)

  889 00:40:25.690806  

  890 00:40:25.692660  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)

  891 00:40:25.693174  

  892 00:40:25.693511  

  893 00:40:25.693864  

  894 00:40:25.695804  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)

  895 00:40:25.696238  

  896 00:40:25.699109  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)

  897 00:40:25.699774  

  898 00:40:25.700184  

  899 00:40:25.702713  Write Rank0 MR1 =0x56

  900 00:40:25.703145  

  901 00:40:25.705993  best RODT dly(2T, 0.5T) = (2, 3)

  902 00:40:25.706424  

  903 00:40:25.709494  best RODT dly(2T, 0.5T) = (2, 3)

  904 00:40:25.710025  ==

  905 00:40:25.712458  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  906 00:40:25.715903  fsp= 1, odt_onoff= 1, Byte mode= 0

  907 00:40:25.716437  ==

  908 00:40:25.722248  Start DQ dly to find pass range UseTestEngine =0

  909 00:40:25.725501  x-axis: bit #, y-axis: DQ dly (-127~63)

  910 00:40:25.725977  RX Vref Scan = 0

  911 00:40:25.728916  -26, [0] xxxxxxxx xxxxxxxx [MSB]

  912 00:40:25.732602  -25, [0] xxxxxxxx xxxxxxxx [MSB]

  913 00:40:25.735828  -24, [0] xxxxxxxx xxxxxxxx [MSB]

  914 00:40:25.738935  -23, [0] xxxxxxxx xxxxxxxx [MSB]

  915 00:40:25.742292  -22, [0] xxxxxxxx xxxxxxxx [MSB]

  916 00:40:25.745806  -21, [0] xxxxxxxx xxxxxxxx [MSB]

  917 00:40:25.748839  -20, [0] xxxxxxxx xxxxxxxx [MSB]

  918 00:40:25.749298  -19, [0] xxxxxxxx xxxxxxxx [MSB]

  919 00:40:25.752310  -18, [0] xxxxxxxx xxxxxxxx [MSB]

  920 00:40:25.755538  -17, [0] xxxxxxxx xxxxxxxx [MSB]

  921 00:40:25.758990  -16, [0] xxxxxxxx xxxxxxxx [MSB]

  922 00:40:25.762322  -15, [0] xxxxxxxx xxxxxxxx [MSB]

  923 00:40:25.765361  -14, [0] xxxxxxxx xxxxxxxx [MSB]

  924 00:40:25.768661  -13, [0] xxxxxxxx xxxxxxxx [MSB]

  925 00:40:25.772429  -12, [0] xxxxxxxx xxxxxxxx [MSB]

  926 00:40:25.775518  -11, [0] xxxxxxxx xxxxxxxx [MSB]

  927 00:40:25.776054  -10, [0] xxxxxxxx xxxxxxxx [MSB]

  928 00:40:25.778432  -9, [0] xxxxxxxx xxxxxxxx [MSB]

  929 00:40:25.781788  -8, [0] xxxxxxxx xxxxxxxx [MSB]

  930 00:40:25.785211  -7, [0] xxxxxxxx xxxxxxxx [MSB]

  931 00:40:25.788324  -6, [0] xxxxxxxx xxxxxxxx [MSB]

  932 00:40:25.791494  -5, [0] xxxxxxxx xxxxxxxx [MSB]

  933 00:40:25.794561  -4, [0] xxxxxxxx xxxxxxxx [MSB]

  934 00:40:25.795002  -3, [0] xxxoxxxx xxxxxxxx [MSB]

  935 00:40:25.798092  -2, [0] xxxoxxxx xxxxxxxx [MSB]

  936 00:40:25.801629  -1, [0] xxxoxxxx oxxoxxxx [MSB]

  937 00:40:25.804551  0, [0] xxxoxxxx ooxoxxxx [MSB]

  938 00:40:25.808172  1, [0] xxxoxoxx ooxooxxx [MSB]

  939 00:40:25.810928  2, [0] xxxoxoox ooxooxxx [MSB]

  940 00:40:25.814145  3, [0] xxxoxoox ooxoooox [MSB]

  941 00:40:25.814553  4, [0] xxxoxooo ooxoooox [MSB]

  942 00:40:25.817502  5, [0] xoxoxooo ooxooooo [MSB]

  943 00:40:25.821035  6, [0] xooooooo ooxooooo [MSB]

  944 00:40:25.824163  7, [0] oooooooo ooxooooo [MSB]

  945 00:40:25.827530  32, [0] oooxoooo oooooooo [MSB]

  946 00:40:25.830853  33, [0] oooxoxoo oooooooo [MSB]

  947 00:40:25.831340  34, [0] oooxoxoo oooooooo [MSB]

  948 00:40:25.834358  35, [0] oooxoxoo xooooooo [MSB]

  949 00:40:25.837520  36, [0] oooxoxoo xxoxxooo [MSB]

  950 00:40:25.841113  37, [0] oooxoxxo xxoxxxxo [MSB]

  951 00:40:25.844599  38, [0] oooxoxxx xxoxxxxo [MSB]

  952 00:40:25.847764  39, [0] xxoxoxxx xxoxxxxo [MSB]

  953 00:40:25.850506  40, [0] xxoxoxxx xxoxxxxo [MSB]

  954 00:40:25.854019  41, [0] xxxxxxxx xxoxxxxx [MSB]

  955 00:40:25.854422  42, [0] xxxxxxxx xxoxxxxx [MSB]

  956 00:40:25.857262  43, [0] xxxxxxxx xxxxxxxx [MSB]

  957 00:40:25.860666  iDelay=43, Bit 0, Center 22 (7 ~ 38) 32

  958 00:40:25.864092  iDelay=43, Bit 1, Center 21 (5 ~ 38) 34

  959 00:40:25.870172  iDelay=43, Bit 2, Center 23 (6 ~ 40) 35

  960 00:40:25.873734  iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35

  961 00:40:25.876736  iDelay=43, Bit 4, Center 23 (6 ~ 40) 35

  962 00:40:25.880769  iDelay=43, Bit 5, Center 16 (1 ~ 32) 32

  963 00:40:25.883963  iDelay=43, Bit 6, Center 19 (2 ~ 36) 35

  964 00:40:25.886811  iDelay=43, Bit 7, Center 20 (4 ~ 37) 34

  965 00:40:25.890778  iDelay=43, Bit 8, Center 16 (-1 ~ 34) 36

  966 00:40:25.893738  iDelay=43, Bit 9, Center 17 (0 ~ 35) 36

  967 00:40:25.897522  iDelay=43, Bit 10, Center 25 (8 ~ 42) 35

  968 00:40:25.899860  iDelay=43, Bit 11, Center 17 (-1 ~ 35) 37

  969 00:40:25.903518  iDelay=43, Bit 12, Center 18 (1 ~ 35) 35

  970 00:40:25.910014  iDelay=43, Bit 13, Center 19 (3 ~ 36) 34

  971 00:40:25.913394  iDelay=43, Bit 14, Center 19 (3 ~ 36) 34

  972 00:40:25.916873  iDelay=43, Bit 15, Center 22 (5 ~ 40) 36

  973 00:40:25.917304  ==

  974 00:40:25.919939  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  975 00:40:25.923486  fsp= 1, odt_onoff= 1, Byte mode= 0

  976 00:40:25.923925  ==

  977 00:40:25.926804  DQS Delay:

  978 00:40:25.927240  DQS0 = 0, DQS1 = 0

  979 00:40:25.927583  DQM Delay:

  980 00:40:25.929951  DQM0 = 19, DQM1 = 19

  981 00:40:25.930345  DQ Delay:

  982 00:40:25.932970  DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14

  983 00:40:25.936402  DQ4 =23, DQ5 =16, DQ6 =19, DQ7 =20

  984 00:40:25.939891  DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =17

  985 00:40:25.943266  DQ12 =18, DQ13 =19, DQ14 =19, DQ15 =22

  986 00:40:25.943935  

  987 00:40:25.944276  

  988 00:40:25.946667  DramC Write-DBI off

  989 00:40:25.947058  ==

  990 00:40:25.950029  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  991 00:40:25.953253  fsp= 1, odt_onoff= 1, Byte mode= 0

  992 00:40:25.956935  ==

  993 00:40:25.959250  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

  994 00:40:25.959643  

  995 00:40:25.962543  Begin, DQ Scan Range 918~1174

  996 00:40:25.962934  

  997 00:40:25.963239  

  998 00:40:25.963519  	TX Vref Scan disable

  999 00:40:25.965929  918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]

 1000 00:40:25.972611  919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]

 1001 00:40:25.976146  920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]

 1002 00:40:25.979199  921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]

 1003 00:40:25.982477  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 1004 00:40:25.985928  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 1005 00:40:25.989212  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1006 00:40:25.992655  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1007 00:40:25.995748  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1008 00:40:25.999150  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1009 00:40:26.002245  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1010 00:40:26.005262  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1011 00:40:26.008772  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1012 00:40:26.012276  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1013 00:40:26.015751  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1014 00:40:26.022389  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1015 00:40:26.025887  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1016 00:40:26.029367  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1017 00:40:26.032473  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1018 00:40:26.035491  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1019 00:40:26.038622  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1020 00:40:26.041668  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1021 00:40:26.045439  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1022 00:40:26.048404  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1023 00:40:26.052445  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1024 00:40:26.055017  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1025 00:40:26.058368  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1026 00:40:26.062307  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1027 00:40:26.065146  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1028 00:40:26.071758  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1029 00:40:26.074646  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1030 00:40:26.078765  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1031 00:40:26.081216  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1032 00:40:26.084567  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1033 00:40:26.087907  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1034 00:40:26.091214  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1035 00:40:26.094615  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1036 00:40:26.097996  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1037 00:40:26.101207  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1038 00:40:26.104536  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1039 00:40:26.108124  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1040 00:40:26.111293  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1041 00:40:26.114341  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1042 00:40:26.117693  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1043 00:40:26.120996  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1044 00:40:26.127915  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1045 00:40:26.131355  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1046 00:40:26.134793  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1047 00:40:26.138012  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1048 00:40:26.141062  967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]

 1049 00:40:26.144334  968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]

 1050 00:40:26.147681  969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]

 1051 00:40:26.151344  970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]

 1052 00:40:26.154274  971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]

 1053 00:40:26.157748  972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]

 1054 00:40:26.161125  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 1055 00:40:26.164455  974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]

 1056 00:40:26.167847  975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]

 1057 00:40:26.170972  976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]

 1058 00:40:26.174120  977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]

 1059 00:40:26.177651  978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]

 1060 00:40:26.180758  979 |3 6 19|[0] xoxooooo oooooooo [MSB]

 1061 00:40:26.187414  980 |3 6 20|[0] xoxooooo oooooooo [MSB]

 1062 00:40:26.190473  981 |3 6 21|[0] xooooooo oooooooo [MSB]

 1063 00:40:26.193664  985 |3 6 25|[0] oooooooo xooooooo [MSB]

 1064 00:40:26.196758  986 |3 6 26|[0] oooooooo xooxoooo [MSB]

 1065 00:40:26.200268  987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]

 1066 00:40:26.203555  988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]

 1067 00:40:26.206798  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1068 00:40:26.210096  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1069 00:40:26.213377  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1070 00:40:26.216699  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 1071 00:40:26.220283  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 1072 00:40:26.223537  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 1073 00:40:26.230087  995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]

 1074 00:40:26.233126  996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]

 1075 00:40:26.236277  997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]

 1076 00:40:26.239632  998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]

 1077 00:40:26.243054  999 |3 6 39|[0] xoxxxxxx xxxxxxxx [MSB]

 1078 00:40:26.246235  1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1079 00:40:26.249869  Byte0, DQ PI dly=988, DQM PI dly= 988

 1080 00:40:26.252626  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)

 1081 00:40:26.253139  

 1082 00:40:26.259231  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)

 1083 00:40:26.259650  

 1084 00:40:26.262504  Byte1, DQ PI dly=977, DQM PI dly= 977

 1085 00:40:26.266046  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 1086 00:40:26.266435  

 1087 00:40:26.269310  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 1088 00:40:26.269753  

 1089 00:40:26.273009  ==

 1090 00:40:26.276026  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1091 00:40:26.279447  fsp= 1, odt_onoff= 1, Byte mode= 0

 1092 00:40:26.279942  ==

 1093 00:40:26.282793  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1094 00:40:26.283187  

 1095 00:40:26.286233  Begin, DQ Scan Range 953~1017

 1096 00:40:26.288953  wait MRW command Rank0 MR14 =0x0 fired (1)

 1097 00:40:26.292109  Write Rank0 MR14 =0x0

 1098 00:40:26.301212  

 1099 00:40:26.301669  	CH=0, VrefRange= 0, VrefLevel = 0

 1100 00:40:26.307823  TX Bit0 (984~997) 14 990,   Bit8 (969~980) 12 974,

 1101 00:40:26.311233  TX Bit1 (983~995) 13 989,   Bit9 (971~982) 12 976,

 1102 00:40:26.317703  TX Bit2 (984~996) 13 990,   Bit10 (975~986) 12 980,

 1103 00:40:26.321018  TX Bit3 (977~991) 15 984,   Bit11 (970~981) 12 975,

 1104 00:40:26.324290  TX Bit4 (983~992) 10 987,   Bit12 (971~982) 12 976,

 1105 00:40:26.330739  TX Bit5 (980~991) 12 985,   Bit13 (972~982) 11 977,

 1106 00:40:26.334221  TX Bit6 (981~993) 13 987,   Bit14 (972~984) 13 978,

 1107 00:40:26.340520  TX Bit7 (983~993) 11 988,   Bit15 (974~988) 15 981,

 1108 00:40:26.341084  

 1109 00:40:26.341618  Write Rank0 MR14 =0x2

 1110 00:40:26.350549  

 1111 00:40:26.350935  	CH=0, VrefRange= 0, VrefLevel = 2

 1112 00:40:26.356823  TX Bit0 (984~998) 15 991,   Bit8 (969~981) 13 975,

 1113 00:40:26.360215  TX Bit1 (982~996) 15 989,   Bit9 (970~982) 13 976,

 1114 00:40:26.366868  TX Bit2 (983~997) 15 990,   Bit10 (975~987) 13 981,

 1115 00:40:26.370290  TX Bit3 (977~991) 15 984,   Bit11 (969~981) 13 975,

 1116 00:40:26.373908  TX Bit4 (982~993) 12 987,   Bit12 (970~983) 14 976,

 1117 00:40:26.379855  TX Bit5 (980~991) 12 985,   Bit13 (971~982) 12 976,

 1118 00:40:26.383267  TX Bit6 (981~993) 13 987,   Bit14 (971~985) 15 978,

 1119 00:40:26.389421  TX Bit7 (983~993) 11 988,   Bit15 (974~989) 16 981,

 1120 00:40:26.389852  

 1121 00:40:26.390185  Write Rank0 MR14 =0x4

 1122 00:40:26.399398  

 1123 00:40:26.399946  	CH=0, VrefRange= 0, VrefLevel = 4

 1124 00:40:26.406220  TX Bit0 (983~998) 16 990,   Bit8 (968~982) 15 975,

 1125 00:40:26.409673  TX Bit1 (982~997) 16 989,   Bit9 (969~983) 15 976,

 1126 00:40:26.415913  TX Bit2 (983~998) 16 990,   Bit10 (974~989) 16 981,

 1127 00:40:26.419264  TX Bit3 (976~991) 16 983,   Bit11 (969~982) 14 975,

 1128 00:40:26.422404  TX Bit4 (982~994) 13 988,   Bit12 (970~983) 14 976,

 1129 00:40:26.477287  TX Bit5 (979~992) 14 985,   Bit13 (970~983) 14 976,

 1130 00:40:26.478031  TX Bit6 (980~994) 15 987,   Bit14 (972~986) 15 979,

 1131 00:40:26.478783  TX Bit7 (982~994) 13 988,   Bit15 (974~989) 16 981,

 1132 00:40:26.479456  

 1133 00:40:26.479966  Write Rank0 MR14 =0x6

 1134 00:40:26.480280  

 1135 00:40:26.480590  	CH=0, VrefRange= 0, VrefLevel = 6

 1136 00:40:26.480866  TX Bit0 (983~999) 17 991,   Bit8 (967~982) 16 974,

 1137 00:40:26.481135  TX Bit1 (982~998) 17 990,   Bit9 (969~984) 16 976,

 1138 00:40:26.481431  TX Bit2 (982~999) 18 990,   Bit10 (974~989) 16 981,

 1139 00:40:26.481905  TX Bit3 (976~992) 17 984,   Bit11 (968~982) 15 975,

 1140 00:40:26.482181  TX Bit4 (982~995) 14 988,   Bit12 (970~984) 15 977,

 1141 00:40:26.482484  TX Bit5 (978~992) 15 985,   Bit13 (970~983) 14 976,

 1142 00:40:26.482827  TX Bit6 (980~995) 16 987,   Bit14 (970~987) 18 978,

 1143 00:40:26.485314  TX Bit7 (982~996) 15 989,   Bit15 (973~990) 18 981,

 1144 00:40:26.485790  

 1145 00:40:26.488828  Write Rank0 MR14 =0x8

 1146 00:40:26.497368  

 1147 00:40:26.497829  	CH=0, VrefRange= 0, VrefLevel = 8

 1148 00:40:26.504003  TX Bit0 (983~999) 17 991,   Bit8 (967~982) 16 974,

 1149 00:40:26.507537  TX Bit1 (981~998) 18 989,   Bit9 (968~984) 17 976,

 1150 00:40:26.514355  TX Bit2 (982~999) 18 990,   Bit10 (974~990) 17 982,

 1151 00:40:26.517668  TX Bit3 (976~992) 17 984,   Bit11 (968~983) 16 975,

 1152 00:40:26.521242  TX Bit4 (981~995) 15 988,   Bit12 (969~985) 17 977,

 1153 00:40:26.527115  TX Bit5 (978~993) 16 985,   Bit13 (969~984) 16 976,

 1154 00:40:26.530482  TX Bit6 (979~995) 17 987,   Bit14 (970~987) 18 978,

 1155 00:40:26.533743  TX Bit7 (981~996) 16 988,   Bit15 (973~990) 18 981,

 1156 00:40:26.537089  

 1157 00:40:26.537671  Write Rank0 MR14 =0xa

 1158 00:40:26.546789  

 1159 00:40:26.550489  	CH=0, VrefRange= 0, VrefLevel = 10

 1160 00:40:26.553675  TX Bit0 (983~999) 17 991,   Bit8 (967~983) 17 975,

 1161 00:40:26.556566  TX Bit1 (981~998) 18 989,   Bit9 (968~985) 18 976,

 1162 00:40:26.563186  TX Bit2 (982~999) 18 990,   Bit10 (974~990) 17 982,

 1163 00:40:26.566888  TX Bit3 (976~993) 18 984,   Bit11 (967~983) 17 975,

 1164 00:40:26.570039  TX Bit4 (981~997) 17 989,   Bit12 (968~985) 18 976,

 1165 00:40:26.576391  TX Bit5 (978~994) 17 986,   Bit13 (969~985) 17 977,

 1166 00:40:26.580021  TX Bit6 (978~997) 20 987,   Bit14 (970~988) 19 979,

 1167 00:40:26.583588  TX Bit7 (981~997) 17 989,   Bit15 (973~991) 19 982,

 1168 00:40:26.586586  

 1169 00:40:26.587027  Write Rank0 MR14 =0xc

 1170 00:40:26.596404  

 1171 00:40:26.599629  	CH=0, VrefRange= 0, VrefLevel = 12

 1172 00:40:26.602863  TX Bit0 (983~1000) 18 991,   Bit8 (967~983) 17 975,

 1173 00:40:26.606013  TX Bit1 (981~999) 19 990,   Bit9 (968~985) 18 976,

 1174 00:40:26.612531  TX Bit2 (981~999) 19 990,   Bit10 (974~991) 18 982,

 1175 00:40:26.615936  TX Bit3 (976~993) 18 984,   Bit11 (967~984) 18 975,

 1176 00:40:26.619493  TX Bit4 (980~998) 19 989,   Bit12 (968~986) 19 977,

 1177 00:40:26.626089  TX Bit5 (978~995) 18 986,   Bit13 (969~985) 17 977,

 1178 00:40:26.628922  TX Bit6 (978~997) 20 987,   Bit14 (969~988) 20 978,

 1179 00:40:26.635532  TX Bit7 (980~998) 19 989,   Bit15 (972~991) 20 981,

 1180 00:40:26.635996  

 1181 00:40:26.636298  Write Rank0 MR14 =0xe

 1182 00:40:26.646143  

 1183 00:40:26.648975  	CH=0, VrefRange= 0, VrefLevel = 14

 1184 00:40:26.652233  TX Bit0 (982~1000) 19 991,   Bit8 (967~984) 18 975,

 1185 00:40:26.655776  TX Bit1 (980~999) 20 989,   Bit9 (968~986) 19 977,

 1186 00:40:26.662305  TX Bit2 (982~1000) 19 991,   Bit10 (973~992) 20 982,

 1187 00:40:26.665413  TX Bit3 (975~993) 19 984,   Bit11 (967~984) 18 975,

 1188 00:40:26.668521  TX Bit4 (979~998) 20 988,   Bit12 (968~987) 20 977,

 1189 00:40:26.675577  TX Bit5 (977~996) 20 986,   Bit13 (968~986) 19 977,

 1190 00:40:26.678553  TX Bit6 (977~998) 22 987,   Bit14 (969~989) 21 979,

 1191 00:40:26.684740  TX Bit7 (980~998) 19 989,   Bit15 (972~991) 20 981,

 1192 00:40:26.685116  

 1193 00:40:26.685419  Write Rank0 MR14 =0x10

 1194 00:40:26.695454  

 1195 00:40:26.698896  	CH=0, VrefRange= 0, VrefLevel = 16

 1196 00:40:26.702329  TX Bit0 (982~1001) 20 991,   Bit8 (966~985) 20 975,

 1197 00:40:26.705329  TX Bit1 (979~999) 21 989,   Bit9 (968~988) 21 978,

 1198 00:40:26.711970  TX Bit2 (981~1000) 20 990,   Bit10 (973~992) 20 982,

 1199 00:40:26.715317  TX Bit3 (975~994) 20 984,   Bit11 (967~985) 19 976,

 1200 00:40:26.719058  TX Bit4 (979~998) 20 988,   Bit12 (968~988) 21 978,

 1201 00:40:26.725210  TX Bit5 (977~995) 19 986,   Bit13 (968~987) 20 977,

 1202 00:40:26.728174  TX Bit6 (977~998) 22 987,   Bit14 (968~989) 22 978,

 1203 00:40:26.735135  TX Bit7 (980~998) 19 989,   Bit15 (972~992) 21 982,

 1204 00:40:26.735594  

 1205 00:40:26.735904  Write Rank0 MR14 =0x12

 1206 00:40:26.745313  

 1207 00:40:26.748545  	CH=0, VrefRange= 0, VrefLevel = 18

 1208 00:40:26.751945  TX Bit0 (982~1001) 20 991,   Bit8 (966~985) 20 975,

 1209 00:40:26.755247  TX Bit1 (979~1000) 22 989,   Bit9 (967~987) 21 977,

 1210 00:40:26.762174  TX Bit2 (981~1001) 21 991,   Bit10 (973~992) 20 982,

 1211 00:40:26.765268  TX Bit3 (975~995) 21 985,   Bit11 (967~986) 20 976,

 1212 00:40:26.768610  TX Bit4 (979~999) 21 989,   Bit12 (968~988) 21 978,

 1213 00:40:26.775348  TX Bit5 (977~997) 21 987,   Bit13 (968~988) 21 978,

 1214 00:40:26.778386  TX Bit6 (977~998) 22 987,   Bit14 (968~990) 23 979,

 1215 00:40:26.784799  TX Bit7 (979~999) 21 989,   Bit15 (972~992) 21 982,

 1216 00:40:26.785316  

 1217 00:40:26.785708  Write Rank0 MR14 =0x14

 1218 00:40:26.795508  

 1219 00:40:26.798592  	CH=0, VrefRange= 0, VrefLevel = 20

 1220 00:40:26.802141  TX Bit0 (981~1002) 22 991,   Bit8 (966~986) 21 976,

 1221 00:40:26.805199  TX Bit1 (979~1000) 22 989,   Bit9 (968~988) 21 978,

 1222 00:40:26.811790  TX Bit2 (980~1002) 23 991,   Bit10 (972~993) 22 982,

 1223 00:40:26.815323  TX Bit3 (975~996) 22 985,   Bit11 (966~986) 21 976,

 1224 00:40:26.818497  TX Bit4 (978~999) 22 988,   Bit12 (967~989) 23 978,

 1225 00:40:26.825270  TX Bit5 (977~997) 21 987,   Bit13 (968~989) 22 978,

 1226 00:40:26.828924  TX Bit6 (977~999) 23 988,   Bit14 (968~990) 23 979,

 1227 00:40:26.835265  TX Bit7 (979~999) 21 989,   Bit15 (971~993) 23 982,

 1228 00:40:26.835792  

 1229 00:40:26.836257  Write Rank0 MR14 =0x16

 1230 00:40:26.846017  

 1231 00:40:26.848848  	CH=0, VrefRange= 0, VrefLevel = 22

 1232 00:40:26.852039  TX Bit0 (981~1002) 22 991,   Bit8 (966~987) 22 976,

 1233 00:40:26.855903  TX Bit1 (979~1001) 23 990,   Bit9 (967~988) 22 977,

 1234 00:40:26.862094  TX Bit2 (979~1002) 24 990,   Bit10 (972~993) 22 982,

 1235 00:40:26.865329  TX Bit3 (975~996) 22 985,   Bit11 (966~987) 22 976,

 1236 00:40:26.869354  TX Bit4 (978~999) 22 988,   Bit12 (967~989) 23 978,

 1237 00:40:26.875556  TX Bit5 (977~998) 22 987,   Bit13 (968~989) 22 978,

 1238 00:40:26.878871  TX Bit6 (977~999) 23 988,   Bit14 (968~990) 23 979,

 1239 00:40:26.885167  TX Bit7 (978~1000) 23 989,   Bit15 (970~993) 24 981,

 1240 00:40:26.885714  

 1241 00:40:26.886033  Write Rank0 MR14 =0x18

 1242 00:40:26.896224  

 1243 00:40:26.899260  	CH=0, VrefRange= 0, VrefLevel = 24

 1244 00:40:26.902760  TX Bit0 (980~1003) 24 991,   Bit8 (966~988) 23 977,

 1245 00:40:26.905596  TX Bit1 (979~1001) 23 990,   Bit9 (967~989) 23 978,

 1246 00:40:26.912459  TX Bit2 (980~1003) 24 991,   Bit10 (972~995) 24 983,

 1247 00:40:26.915552  TX Bit3 (974~997) 24 985,   Bit11 (966~988) 23 977,

 1248 00:40:26.922594  TX Bit4 (978~1000) 23 989,   Bit12 (967~990) 24 978,

 1249 00:40:26.926275  TX Bit5 (976~998) 23 987,   Bit13 (967~989) 23 978,

 1250 00:40:26.929371  TX Bit6 (977~999) 23 988,   Bit14 (967~991) 25 979,

 1251 00:40:26.935582  TX Bit7 (979~1000) 22 989,   Bit15 (970~994) 25 982,

 1252 00:40:26.936094  

 1253 00:40:26.936432  Write Rank0 MR14 =0x1a

 1254 00:40:26.946705  

 1255 00:40:26.949738  	CH=0, VrefRange= 0, VrefLevel = 26

 1256 00:40:26.953211  TX Bit0 (980~1003) 24 991,   Bit8 (965~987) 23 976,

 1257 00:40:26.956435  TX Bit1 (978~1002) 25 990,   Bit9 (967~989) 23 978,

 1258 00:40:26.962860  TX Bit2 (979~1003) 25 991,   Bit10 (971~995) 25 983,

 1259 00:40:26.966397  TX Bit3 (974~997) 24 985,   Bit11 (966~989) 24 977,

 1260 00:40:26.969741  TX Bit4 (977~1000) 24 988,   Bit12 (967~990) 24 978,

 1261 00:40:26.976531  TX Bit5 (976~999) 24 987,   Bit13 (967~990) 24 978,

 1262 00:40:26.979968  TX Bit6 (976~1000) 25 988,   Bit14 (967~991) 25 979,

 1263 00:40:26.985897  TX Bit7 (978~1001) 24 989,   Bit15 (970~994) 25 982,

 1264 00:40:26.986331  

 1265 00:40:26.986668  Write Rank0 MR14 =0x1c

 1266 00:40:26.996952  

 1267 00:40:27.000535  	CH=0, VrefRange= 0, VrefLevel = 28

 1268 00:40:27.003690  TX Bit0 (979~1004) 26 991,   Bit8 (965~988) 24 976,

 1269 00:40:27.006914  TX Bit1 (978~1002) 25 990,   Bit9 (967~989) 23 978,

 1270 00:40:27.013824  TX Bit2 (979~1004) 26 991,   Bit10 (972~996) 25 984,

 1271 00:40:27.017112  TX Bit3 (974~998) 25 986,   Bit11 (966~988) 23 977,

 1272 00:40:27.023535  TX Bit4 (977~1001) 25 989,   Bit12 (967~990) 24 978,

 1273 00:40:27.026785  TX Bit5 (976~999) 24 987,   Bit13 (967~990) 24 978,

 1274 00:40:27.030287  TX Bit6 (976~1000) 25 988,   Bit14 (967~991) 25 979,

 1275 00:40:27.036458  TX Bit7 (978~1001) 24 989,   Bit15 (969~994) 26 981,

 1276 00:40:27.036898  

 1277 00:40:27.037238  Write Rank0 MR14 =0x1e

 1278 00:40:27.047683  

 1279 00:40:27.050818  	CH=0, VrefRange= 0, VrefLevel = 30

 1280 00:40:27.054324  TX Bit0 (979~1004) 26 991,   Bit8 (965~988) 24 976,

 1281 00:40:27.057922  TX Bit1 (978~1002) 25 990,   Bit9 (967~989) 23 978,

 1282 00:40:27.064246  TX Bit2 (979~1004) 26 991,   Bit10 (972~996) 25 984,

 1283 00:40:27.067585  TX Bit3 (974~998) 25 986,   Bit11 (966~988) 23 977,

 1284 00:40:27.071205  TX Bit4 (977~1001) 25 989,   Bit12 (967~990) 24 978,

 1285 00:40:27.077731  TX Bit5 (976~999) 24 987,   Bit13 (967~990) 24 978,

 1286 00:40:27.081071  TX Bit6 (976~1000) 25 988,   Bit14 (967~991) 25 979,

 1287 00:40:27.087190  TX Bit7 (978~1001) 24 989,   Bit15 (969~994) 26 981,

 1288 00:40:27.087708  

 1289 00:40:27.088216  Write Rank0 MR14 =0x20

 1290 00:40:27.098435  

 1291 00:40:27.101915  	CH=0, VrefRange= 0, VrefLevel = 32

 1292 00:40:27.104945  TX Bit0 (979~1004) 26 991,   Bit8 (965~988) 24 976,

 1293 00:40:27.108863  TX Bit1 (978~1002) 25 990,   Bit9 (967~989) 23 978,

 1294 00:40:27.115185  TX Bit2 (979~1004) 26 991,   Bit10 (972~996) 25 984,

 1295 00:40:27.118252  TX Bit3 (974~998) 25 986,   Bit11 (966~988) 23 977,

 1296 00:40:27.121625  TX Bit4 (977~1001) 25 989,   Bit12 (967~990) 24 978,

 1297 00:40:27.128415  TX Bit5 (976~999) 24 987,   Bit13 (967~990) 24 978,

 1298 00:40:27.131437  TX Bit6 (976~1000) 25 988,   Bit14 (967~991) 25 979,

 1299 00:40:27.138564  TX Bit7 (978~1001) 24 989,   Bit15 (969~994) 26 981,

 1300 00:40:27.139071  

 1301 00:40:27.139413  Write Rank0 MR14 =0x22

 1302 00:40:27.149238  

 1303 00:40:27.152512  	CH=0, VrefRange= 0, VrefLevel = 34

 1304 00:40:27.155437  TX Bit0 (979~1004) 26 991,   Bit8 (965~988) 24 976,

 1305 00:40:27.158948  TX Bit1 (978~1002) 25 990,   Bit9 (967~989) 23 978,

 1306 00:40:27.165733  TX Bit2 (979~1004) 26 991,   Bit10 (972~996) 25 984,

 1307 00:40:27.168935  TX Bit3 (974~998) 25 986,   Bit11 (966~988) 23 977,

 1308 00:40:27.172372  TX Bit4 (977~1001) 25 989,   Bit12 (967~990) 24 978,

 1309 00:40:27.178451  TX Bit5 (976~999) 24 987,   Bit13 (967~990) 24 978,

 1310 00:40:27.181766  TX Bit6 (976~1000) 25 988,   Bit14 (967~991) 25 979,

 1311 00:40:27.188514  TX Bit7 (978~1001) 24 989,   Bit15 (969~994) 26 981,

 1312 00:40:27.188873  

 1313 00:40:27.189090  Write Rank0 MR14 =0x24

 1314 00:40:27.199231  

 1315 00:40:27.202283  	CH=0, VrefRange= 0, VrefLevel = 36

 1316 00:40:27.205719  TX Bit0 (979~1004) 26 991,   Bit8 (965~988) 24 976,

 1317 00:40:27.209252  TX Bit1 (978~1002) 25 990,   Bit9 (967~989) 23 978,

 1318 00:40:27.216189  TX Bit2 (979~1004) 26 991,   Bit10 (972~996) 25 984,

 1319 00:40:27.219248  TX Bit3 (974~998) 25 986,   Bit11 (966~988) 23 977,

 1320 00:40:27.222561  TX Bit4 (977~1001) 25 989,   Bit12 (967~990) 24 978,

 1321 00:40:27.229353  TX Bit5 (976~999) 24 987,   Bit13 (967~990) 24 978,

 1322 00:40:27.232702  TX Bit6 (976~1000) 25 988,   Bit14 (967~991) 25 979,

 1323 00:40:27.239264  TX Bit7 (978~1001) 24 989,   Bit15 (969~994) 26 981,

 1324 00:40:27.239774  

 1325 00:40:27.240107  

 1326 00:40:27.242518  TX Vref found, early break! 370< 374

 1327 00:40:27.245942  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps

 1328 00:40:27.249080  u1DelayCellOfst[0]=6 cells (5 PI)

 1329 00:40:27.252350  u1DelayCellOfst[1]=5 cells (4 PI)

 1330 00:40:27.255440  u1DelayCellOfst[2]=6 cells (5 PI)

 1331 00:40:27.258918  u1DelayCellOfst[3]=0 cells (0 PI)

 1332 00:40:27.262243  u1DelayCellOfst[4]=3 cells (3 PI)

 1333 00:40:27.265575  u1DelayCellOfst[5]=1 cells (1 PI)

 1334 00:40:27.268627  u1DelayCellOfst[6]=2 cells (2 PI)

 1335 00:40:27.272287  u1DelayCellOfst[7]=3 cells (3 PI)

 1336 00:40:27.274935  Byte0, DQ PI dly=986, DQM PI dly= 988

 1337 00:40:27.278575  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)

 1338 00:40:27.279005  

 1339 00:40:27.281939  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)

 1340 00:40:27.282392  

 1341 00:40:27.285374  u1DelayCellOfst[8]=0 cells (0 PI)

 1342 00:40:27.288957  u1DelayCellOfst[9]=2 cells (2 PI)

 1343 00:40:27.291389  u1DelayCellOfst[10]=10 cells (8 PI)

 1344 00:40:27.294752  u1DelayCellOfst[11]=1 cells (1 PI)

 1345 00:40:27.298238  u1DelayCellOfst[12]=2 cells (2 PI)

 1346 00:40:27.301587  u1DelayCellOfst[13]=2 cells (2 PI)

 1347 00:40:27.304836  u1DelayCellOfst[14]=3 cells (3 PI)

 1348 00:40:27.308047  u1DelayCellOfst[15]=6 cells (5 PI)

 1349 00:40:27.311588  Byte1, DQ PI dly=976, DQM PI dly= 980

 1350 00:40:27.314625  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)

 1351 00:40:27.315057  

 1352 00:40:27.321787  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)

 1353 00:40:27.322262  

 1354 00:40:27.322598  Write Rank0 MR14 =0x1c

 1355 00:40:27.322908  

 1356 00:40:27.324864  Final TX Range 0 Vref 28

 1357 00:40:27.325289  

 1358 00:40:27.330937  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1359 00:40:27.331366  

 1360 00:40:27.337865  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1361 00:40:27.344461  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1362 00:40:27.350642  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1363 00:40:27.353930  Write Rank0 MR3 =0xb0

 1364 00:40:27.354322  DramC Write-DBI on

 1365 00:40:27.354628  ==

 1366 00:40:27.360719  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1367 00:40:27.364243  fsp= 1, odt_onoff= 1, Byte mode= 0

 1368 00:40:27.364638  ==

 1369 00:40:27.367187  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1370 00:40:27.367582  

 1371 00:40:27.370594  Begin, DQ Scan Range 700~764

 1372 00:40:27.370989  

 1373 00:40:27.371295  

 1374 00:40:27.373906  	TX Vref Scan disable

 1375 00:40:27.377418  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1376 00:40:27.380617  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1377 00:40:27.383666  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1378 00:40:27.387261  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1379 00:40:27.390142  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1380 00:40:27.393689  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1381 00:40:27.397316  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1382 00:40:27.400859  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1383 00:40:27.403913  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1384 00:40:27.407281  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1385 00:40:27.410714  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1386 00:40:27.413346  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1387 00:40:27.416633  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1388 00:40:27.423693  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1389 00:40:27.427234  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 1390 00:40:27.430058  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 1391 00:40:27.433590  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 1392 00:40:27.436895  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 1393 00:40:27.440310  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 1394 00:40:27.442964  719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]

 1395 00:40:27.446319  720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]

 1396 00:40:27.453725  734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]

 1397 00:40:27.457073  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 1398 00:40:27.460609  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 1399 00:40:27.463406  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 1400 00:40:27.467024  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 1401 00:40:27.469943  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 1402 00:40:27.473518  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 1403 00:40:27.476621  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 1404 00:40:27.479970  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 1405 00:40:27.483156  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 1406 00:40:27.486469  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 1407 00:40:27.489722  745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]

 1408 00:40:27.493069  746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]

 1409 00:40:27.500048  747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1410 00:40:27.503370  Byte0, DQ PI dly=733, DQM PI dly= 733

 1411 00:40:27.506121  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)

 1412 00:40:27.506552  

 1413 00:40:27.509567  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)

 1414 00:40:27.510018  

 1415 00:40:27.512923  Byte1, DQ PI dly=722, DQM PI dly= 722

 1416 00:40:27.519495  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)

 1417 00:40:27.519890  

 1418 00:40:27.523204  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)

 1419 00:40:27.523678  

 1420 00:40:27.529070  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 1421 00:40:27.535770  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1422 00:40:27.542197  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1423 00:40:27.545702  Write Rank0 MR3 =0x30

 1424 00:40:27.546094  DramC Write-DBI off

 1425 00:40:27.548728  

 1426 00:40:27.549119  [DATLAT]

 1427 00:40:27.552136  Freq=1600, CH0 RK0, use_rxtx_scan=0

 1428 00:40:27.552579  

 1429 00:40:27.552893  DATLAT Default: 0xf

 1430 00:40:27.555539  7, 0xFFFF, sum=0

 1431 00:40:27.555940  8, 0xFFFF, sum=0

 1432 00:40:27.558983  9, 0xFFFF, sum=0

 1433 00:40:27.559385  10, 0xFFFF, sum=0

 1434 00:40:27.562233  11, 0xFFFF, sum=0

 1435 00:40:27.562631  12, 0xFFFF, sum=0

 1436 00:40:27.565201  13, 0xFFFF, sum=0

 1437 00:40:27.565687  14, 0x0, sum=1

 1438 00:40:27.568755  15, 0x0, sum=2

 1439 00:40:27.569154  16, 0x0, sum=3

 1440 00:40:27.569466  17, 0x0, sum=4

 1441 00:40:27.575436  pattern=2 first_step=14 total pass=5 best_step=16

 1442 00:40:27.575827  ==

 1443 00:40:27.579029  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1444 00:40:27.581649  fsp= 1, odt_onoff= 1, Byte mode= 0

 1445 00:40:27.582050  ==

 1446 00:40:27.588455  Start DQ dly to find pass range UseTestEngine =1

 1447 00:40:27.591472  x-axis: bit #, y-axis: DQ dly (-127~63)

 1448 00:40:27.591867  RX Vref Scan = 1

 1449 00:40:27.707535  

 1450 00:40:27.708060  RX Vref found, early break!

 1451 00:40:27.708410  

 1452 00:40:27.713625  Final RX Vref 11, apply to both rank0 and 1

 1453 00:40:27.714110  ==

 1454 00:40:27.717435  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1455 00:40:27.720993  fsp= 1, odt_onoff= 1, Byte mode= 0

 1456 00:40:27.721517  ==

 1457 00:40:27.721917  DQS Delay:

 1458 00:40:27.723927  DQS0 = 0, DQS1 = 0

 1459 00:40:27.724361  DQM Delay:

 1460 00:40:27.727410  DQM0 = 19, DQM1 = 18

 1461 00:40:27.728044  DQ Delay:

 1462 00:40:27.730511  DQ0 =23, DQ1 =22, DQ2 =23, DQ3 =15

 1463 00:40:27.734145  DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =20

 1464 00:40:27.737262  DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =16

 1465 00:40:27.740497  DQ12 =18, DQ13 =18, DQ14 =19, DQ15 =22

 1466 00:40:27.740931  

 1467 00:40:27.741301  

 1468 00:40:27.741849  

 1469 00:40:27.743584  [DramC_TX_OE_Calibration] TA2

 1470 00:40:27.747080  Original DQ_B0 (3 6) =30, OEN = 27

 1471 00:40:27.750379  Original DQ_B1 (3 6) =30, OEN = 27

 1472 00:40:27.753442  23, 0x0, End_B0=23 End_B1=23

 1473 00:40:27.756627  24, 0x0, End_B0=24 End_B1=24

 1474 00:40:27.757069  25, 0x0, End_B0=25 End_B1=25

 1475 00:40:27.759988  26, 0x0, End_B0=26 End_B1=26

 1476 00:40:27.763365  27, 0x0, End_B0=27 End_B1=27

 1477 00:40:27.766536  28, 0x0, End_B0=28 End_B1=28

 1478 00:40:27.766934  29, 0x0, End_B0=29 End_B1=29

 1479 00:40:27.770352  30, 0x0, End_B0=30 End_B1=30

 1480 00:40:27.773523  31, 0xFFFF, End_B0=30 End_B1=30

 1481 00:40:27.780043  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1482 00:40:27.783054  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1483 00:40:27.783460  

 1484 00:40:27.786866  

 1485 00:40:27.787367  Write Rank0 MR23 =0x3f

 1486 00:40:27.787685  [DQSOSC]

 1487 00:40:27.796246  [DQSOSCAuto] RK0, (LSB)MR18= 0xabab, (MSB)MR19= 0x202, tDQSOscB0 = 461 ps tDQSOscB1 = 461 ps

 1488 00:40:27.802983  CH0_RK0: MR19=0x202, MR18=0xABAB, DQSOSC=461, MR23=63, INC=11, DEC=17

 1489 00:40:27.803380  Write Rank0 MR23 =0x3f

 1490 00:40:27.806152  [DQSOSC]

 1491 00:40:27.812582  [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps

 1492 00:40:27.816006  CH0 RK0: MR19=202, MR18=ADAD

 1493 00:40:27.819238  [RankSwap] Rank num 2, (Multi 1), Rank 1

 1494 00:40:27.822296  Write Rank0 MR2 =0xad

 1495 00:40:27.822669  [Write Leveling]

 1496 00:40:27.825724  delay  byte0  byte1  byte2  byte3

 1497 00:40:27.826117  

 1498 00:40:27.826423  10    0   0   

 1499 00:40:27.828869  11    0   0   

 1500 00:40:27.829264  12    0   0   

 1501 00:40:27.832637  13    0   0   

 1502 00:40:27.833047  14    0   0   

 1503 00:40:27.835814  15    0   0   

 1504 00:40:27.836209  16    0   0   

 1505 00:40:27.836518  17    0   0   

 1506 00:40:27.838897  18    0   0   

 1507 00:40:27.839292  19    0   0   

 1508 00:40:27.842393  20    0   0   

 1509 00:40:27.842787  21    0   0   

 1510 00:40:27.843097  22    0   0   

 1511 00:40:27.845836  23    0   ff   

 1512 00:40:27.846335  24    0   ff   

 1513 00:40:27.849031  25    0   ff   

 1514 00:40:27.849427  26    0   ff   

 1515 00:40:27.852338  27    0   ff   

 1516 00:40:27.852735  28    0   ff   

 1517 00:40:27.855635  29    0   ff   

 1518 00:40:27.856032  30    0   ff   

 1519 00:40:27.856345  31    ff   ff   

 1520 00:40:27.859253  32    ff   ff   

 1521 00:40:27.859712  33    ff   ff   

 1522 00:40:27.862511  34    ff   ff   

 1523 00:40:27.862972  35    ff   ff   

 1524 00:40:27.865285  36    ff   ff   

 1525 00:40:27.865835  37    ff   ff   

 1526 00:40:27.872300  pass bytecount = 0xff (0xff: all bytes pass) 

 1527 00:40:27.872871  

 1528 00:40:27.873194  DQS0 dly: 31

 1529 00:40:27.873483  DQS1 dly: 23

 1530 00:40:27.875589  Write Rank0 MR2 =0x2d

 1531 00:40:27.878352  [RankSwap] Rank num 2, (Multi 1), Rank 0

 1532 00:40:27.881866  Write Rank1 MR1 =0xd6

 1533 00:40:27.882328  [Gating]

 1534 00:40:27.882780  ==

 1535 00:40:27.884969  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1536 00:40:27.888866  fsp= 1, odt_onoff= 1, Byte mode= 0

 1537 00:40:27.891972  ==

 1538 00:40:27.895347  3 1 0 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 1)| 0

 1539 00:40:27.898427  3 1 4 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 1)| 0

 1540 00:40:27.901594  3 1 8 |3534 2c2b  |(11 11)(11 11) |(0 0)(0 0)| 0

 1541 00:40:27.908404  3 1 12 |3534 2c2b  |(11 11)(11 11) |(1 1)(0 0)| 0

 1542 00:40:27.911767  3 1 16 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 1543 00:40:27.914678  3 1 20 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 1544 00:40:27.921025  3 1 24 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 1545 00:40:27.924539  3 1 28 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 1546 00:40:27.927896  3 2 0 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 1547 00:40:27.934765  3 2 4 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 0)| 0

 1548 00:40:27.937641  3 2 8 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 1549 00:40:27.940640  3 2 12 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 1550 00:40:27.947824  3 2 16 |504 2c2c  |(11 11)(11 0) |(1 1)(0 0)| 0

 1551 00:40:27.951009  3 2 20 |707 2c2c  |(11 11)(11 0) |(1 1)(0 0)| 0

 1552 00:40:27.954157  3 2 24 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1553 00:40:27.960857  3 2 28 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1554 00:40:27.964185  3 3 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1555 00:40:27.967804  3 3 4 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1556 00:40:27.974533  3 3 8 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1557 00:40:27.977418  3 3 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1558 00:40:27.980408  3 3 16 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1559 00:40:27.987290  3 3 20 |707 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1560 00:40:27.990643  3 3 24 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1561 00:40:27.993929  [Byte 0] Lead/lag Transition tap number (1)

 1562 00:40:27.997356  [Byte 1] Lead/lag falling Transition (3, 3, 24)

 1563 00:40:28.003760  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1564 00:40:28.006983  3 4 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1565 00:40:28.010597  3 4 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1566 00:40:28.016687  3 4 8 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1567 00:40:28.020945  3 4 12 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1568 00:40:28.023914  3 4 16 |201 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1569 00:40:28.030652  3 4 20 |1515 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1570 00:40:28.033831  3 4 24 |3d3d 908  |(11 11)(11 11) |(1 1)(1 1)| 0

 1571 00:40:28.037067  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1572 00:40:28.040419  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1573 00:40:28.047097  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1574 00:40:28.050394  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1575 00:40:28.053438  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1576 00:40:28.059811  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1577 00:40:28.063378  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1578 00:40:28.066594  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1579 00:40:28.073245  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1580 00:40:28.076348  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1581 00:40:28.079808  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1582 00:40:28.086342  3 6 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1583 00:40:28.089724  [Byte 0] Lead/lag falling Transition (3, 6, 8)

 1584 00:40:28.093119  3 6 12 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 1585 00:40:28.096617  [Byte 0] Lead/lag Transition tap number (2)

 1586 00:40:28.102812  [Byte 1] Lead/lag Transition tap number (1)

 1587 00:40:28.106095  3 6 16 |1211 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

 1588 00:40:28.109872  3 6 20 |202 3d3d  |(11 11)(11 11) |(0 0)(0 0)| 0

 1589 00:40:28.116341  3 6 24 |4646 4646  |(0 0)(10 10) |(0 0)(0 0)| 0

 1590 00:40:28.116898  [Byte 0]First pass (3, 6, 24)

 1591 00:40:28.122817  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1592 00:40:28.123385  [Byte 1]First pass (3, 6, 28)

 1593 00:40:28.129032  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1594 00:40:28.132319  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1595 00:40:28.135927  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1596 00:40:28.139051  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1597 00:40:28.142801  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1598 00:40:28.148800  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1599 00:40:28.152305  3 7 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1600 00:40:28.155706  3 7 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1601 00:40:28.158692  All bytes gating window > 1UI, Early break!

 1602 00:40:28.159126  

 1603 00:40:28.161880  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)

 1604 00:40:28.162311  

 1605 00:40:28.168983  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)

 1606 00:40:28.169416  

 1607 00:40:28.169903  

 1608 00:40:28.170338  

 1609 00:40:28.172294  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)

 1610 00:40:28.172724  

 1611 00:40:28.176050  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)

 1612 00:40:28.176484  

 1613 00:40:28.176819  

 1614 00:40:28.178348  Write Rank1 MR1 =0x56

 1615 00:40:28.178775  

 1616 00:40:28.181540  best RODT dly(2T, 0.5T) = (2, 3)

 1617 00:40:28.181968  

 1618 00:40:28.184932  best RODT dly(2T, 0.5T) = (2, 3)

 1619 00:40:28.185320  ==

 1620 00:40:28.188607  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1621 00:40:28.191612  fsp= 1, odt_onoff= 1, Byte mode= 0

 1622 00:40:28.192000  ==

 1623 00:40:28.198557  Start DQ dly to find pass range UseTestEngine =0

 1624 00:40:28.201957  x-axis: bit #, y-axis: DQ dly (-127~63)

 1625 00:40:28.202372  RX Vref Scan = 0

 1626 00:40:28.204640  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 1627 00:40:28.208348  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 1628 00:40:28.211699  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 1629 00:40:28.215187  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 1630 00:40:28.218382  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 1631 00:40:28.221152  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 1632 00:40:28.221577  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 1633 00:40:28.224476  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 1634 00:40:28.228586  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 1635 00:40:28.231573  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 1636 00:40:28.234639  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 1637 00:40:28.238060  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 1638 00:40:28.241320  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 1639 00:40:28.244414  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 1640 00:40:28.247947  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 1641 00:40:28.251236  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 1642 00:40:28.251649  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 1643 00:40:28.254481  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 1644 00:40:28.257490  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 1645 00:40:28.261020  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1646 00:40:28.264411  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1647 00:40:28.267309  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1648 00:40:28.271021  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1649 00:40:28.271420  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 1650 00:40:28.274063  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 1651 00:40:28.277088  -1, [0] xxxoxxxx xxxxxxxx [MSB]

 1652 00:40:28.280835  0, [0] xxxoxoxx oxxoxxxx [MSB]

 1653 00:40:28.284204  1, [0] xxxoxooo oxxoxxxx [MSB]

 1654 00:40:28.287691  2, [0] xxxoxooo oxxoxxxx [MSB]

 1655 00:40:28.288193  3, [0] xxxooooo ooxoxxxx [MSB]

 1656 00:40:28.290442  4, [0] ooxooooo ooxoooox [MSB]

 1657 00:40:28.294002  5, [0] oooooooo ooxoooox [MSB]

 1658 00:40:28.297097  6, [0] oooooooo ooxooooo [MSB]

 1659 00:40:28.300589  7, [0] oooooooo ooxooooo [MSB]

 1660 00:40:28.303970  8, [0] oooooooo ooxooooo [MSB]

 1661 00:40:28.307509  9, [0] oooooooo ooxooooo [MSB]

 1662 00:40:28.307989  32, [0] oooxoooo oooooooo [MSB]

 1663 00:40:28.310593  33, [0] oooxoxoo oooooooo [MSB]

 1664 00:40:28.313322  34, [0] oooxoxoo oooooooo [MSB]

 1665 00:40:28.316761  35, [0] oooxoxoo xooxoooo [MSB]

 1666 00:40:28.320311  36, [0] oooxoxoo xooxxooo [MSB]

 1667 00:40:28.323845  37, [0] oooxoxxx xxoxxxxo [MSB]

 1668 00:40:28.327030  38, [0] xooxoxxx xxoxxxxo [MSB]

 1669 00:40:28.327428  39, [0] xxoxoxxx xxoxxxxo [MSB]

 1670 00:40:28.330145  40, [0] xxxxoxxx xxoxxxxo [MSB]

 1671 00:40:28.333378  41, [0] xxxxxxxx xxoxxxxx [MSB]

 1672 00:40:28.336804  42, [0] xxxxxxxx xxoxxxxx [MSB]

 1673 00:40:28.340512  43, [0] xxxxxxxx xxxxxxxx [MSB]

 1674 00:40:28.343082  iDelay=43, Bit 0, Center 20 (4 ~ 37) 34

 1675 00:40:28.346549  iDelay=43, Bit 1, Center 21 (4 ~ 38) 35

 1676 00:40:28.349737  iDelay=43, Bit 2, Center 22 (5 ~ 39) 35

 1677 00:40:28.353358  iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34

 1678 00:40:28.356575  iDelay=43, Bit 4, Center 21 (3 ~ 40) 38

 1679 00:40:28.359924  iDelay=43, Bit 5, Center 16 (0 ~ 32) 33

 1680 00:40:28.363223  iDelay=43, Bit 6, Center 18 (1 ~ 36) 36

 1681 00:40:28.366379  iDelay=43, Bit 7, Center 18 (1 ~ 36) 36

 1682 00:40:28.373356  iDelay=43, Bit 8, Center 17 (0 ~ 34) 35

 1683 00:40:28.376169  iDelay=43, Bit 9, Center 19 (3 ~ 36) 34

 1684 00:40:28.379392  iDelay=43, Bit 10, Center 26 (10 ~ 42) 33

 1685 00:40:28.382480  iDelay=43, Bit 11, Center 17 (0 ~ 34) 35

 1686 00:40:28.385894  iDelay=43, Bit 12, Center 19 (4 ~ 35) 32

 1687 00:40:28.389402  iDelay=43, Bit 13, Center 20 (4 ~ 36) 33

 1688 00:40:28.392614  iDelay=43, Bit 14, Center 20 (4 ~ 36) 33

 1689 00:40:28.395590  iDelay=43, Bit 15, Center 23 (6 ~ 40) 35

 1690 00:40:28.396028  ==

 1691 00:40:28.402433  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1692 00:40:28.406107  fsp= 1, odt_onoff= 1, Byte mode= 0

 1693 00:40:28.406496  ==

 1694 00:40:28.406825  DQS Delay:

 1695 00:40:28.409192  DQS0 = 0, DQS1 = 0

 1696 00:40:28.409612  DQM Delay:

 1697 00:40:28.412286  DQM0 = 18, DQM1 = 20

 1698 00:40:28.412680  DQ Delay:

 1699 00:40:28.415771  DQ0 =20, DQ1 =21, DQ2 =22, DQ3 =14

 1700 00:40:28.418776  DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =18

 1701 00:40:28.422410  DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17

 1702 00:40:28.425882  DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23

 1703 00:40:28.426320  

 1704 00:40:28.426626  

 1705 00:40:28.428956  DramC Write-DBI off

 1706 00:40:28.429347  ==

 1707 00:40:28.431839  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1708 00:40:28.435674  fsp= 1, odt_onoff= 1, Byte mode= 0

 1709 00:40:28.436072  ==

 1710 00:40:28.438886  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1711 00:40:28.439280  

 1712 00:40:28.442301  Begin, DQ Scan Range 919~1175

 1713 00:40:28.442736  

 1714 00:40:28.443044  

 1715 00:40:28.445354  	TX Vref Scan disable

 1716 00:40:28.448369  919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]

 1717 00:40:28.451962  920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]

 1718 00:40:28.455177  921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]

 1719 00:40:28.458485  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 1720 00:40:28.461897  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 1721 00:40:28.465169  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1722 00:40:28.471698  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1723 00:40:28.475048  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1724 00:40:28.478065  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1725 00:40:28.481369  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1726 00:40:28.484617  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1727 00:40:28.488100  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1728 00:40:28.491227  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1729 00:40:28.494364  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1730 00:40:28.498033  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1731 00:40:28.501611  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1732 00:40:28.504392  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1733 00:40:28.508037  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1734 00:40:28.511069  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1735 00:40:28.514562  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1736 00:40:28.521199  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1737 00:40:28.524496  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1738 00:40:28.527539  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1739 00:40:28.531201  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1740 00:40:28.534635  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1741 00:40:28.537295  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1742 00:40:28.540996  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1743 00:40:28.543872  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1744 00:40:28.547416  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1745 00:40:28.550391  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1746 00:40:28.553991  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1747 00:40:28.557404  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1748 00:40:28.560467  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1749 00:40:28.564246  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1750 00:40:28.570897  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1751 00:40:28.573439  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1752 00:40:28.576882  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1753 00:40:28.580865  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1754 00:40:28.583622  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1755 00:40:28.587226  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1756 00:40:28.590478  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1757 00:40:28.593737  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1758 00:40:28.597218  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1759 00:40:28.600276  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1760 00:40:28.603550  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1761 00:40:28.607101  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1762 00:40:28.610501  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1763 00:40:28.613578  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1764 00:40:28.617048  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 1765 00:40:28.620069  968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]

 1766 00:40:28.623006  969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]

 1767 00:40:28.626509  970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]

 1768 00:40:28.632845  971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]

 1769 00:40:28.636184  972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]

 1770 00:40:28.640093  973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]

 1771 00:40:28.642796  974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]

 1772 00:40:28.646401  975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]

 1773 00:40:28.649489  976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]

 1774 00:40:28.652885  977 |3 6 17|[0] xxxoxooo oooooooo [MSB]

 1775 00:40:28.656443  978 |3 6 18|[0] xxxooooo oooooooo [MSB]

 1776 00:40:28.659750  979 |3 6 19|[0] xoxooooo oooooooo [MSB]

 1777 00:40:28.666222  988 |3 6 28|[0] oooooooo oooxoooo [MSB]

 1778 00:40:28.669688  989 |3 6 29|[0] oooooooo xooxoooo [MSB]

 1779 00:40:28.672803  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1780 00:40:28.676326  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1781 00:40:28.679673  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 1782 00:40:28.682951  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 1783 00:40:28.686748  994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]

 1784 00:40:28.688971  995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]

 1785 00:40:28.692317  996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]

 1786 00:40:28.695571  997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]

 1787 00:40:28.699176  998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]

 1788 00:40:28.702263  999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1789 00:40:28.705593  Byte0, DQ PI dly=987, DQM PI dly= 987

 1790 00:40:28.712201  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)

 1791 00:40:28.712635  

 1792 00:40:28.715435  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)

 1793 00:40:28.715870  

 1794 00:40:28.719283  Byte1, DQ PI dly=979, DQM PI dly= 979

 1795 00:40:28.722377  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 1796 00:40:28.725257  

 1797 00:40:28.728912  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 1798 00:40:28.729450  

 1799 00:40:28.729801  ==

 1800 00:40:28.731957  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1801 00:40:28.735220  fsp= 1, odt_onoff= 1, Byte mode= 0

 1802 00:40:28.735611  ==

 1803 00:40:28.742095  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1804 00:40:28.742552  

 1805 00:40:28.744871  Begin, DQ Scan Range 955~1019

 1806 00:40:28.745306  Write Rank1 MR14 =0x0

 1807 00:40:28.754034  

 1808 00:40:28.754418  	CH=0, VrefRange= 0, VrefLevel = 0

 1809 00:40:28.760318  TX Bit0 (983~994) 12 988,   Bit8 (970~982) 13 976,

 1810 00:40:28.763989  TX Bit1 (982~993) 12 987,   Bit9 (972~983) 12 977,

 1811 00:40:28.770278  TX Bit2 (983~994) 12 988,   Bit10 (976~990) 15 983,

 1812 00:40:28.773651  TX Bit3 (977~989) 13 983,   Bit11 (971~982) 12 976,

 1813 00:40:28.777179  TX Bit4 (981~993) 13 987,   Bit12 (973~983) 11 978,

 1814 00:40:28.783914  TX Bit5 (978~991) 14 984,   Bit13 (973~985) 13 979,

 1815 00:40:28.787404  TX Bit6 (978~992) 15 985,   Bit14 (973~987) 15 980,

 1816 00:40:28.790980  TX Bit7 (980~994) 15 987,   Bit15 (976~988) 13 982,

 1817 00:40:28.794307  

 1818 00:40:28.794739  Write Rank1 MR14 =0x2

 1819 00:40:28.802572  

 1820 00:40:28.803056  	CH=0, VrefRange= 0, VrefLevel = 2

 1821 00:40:28.809301  TX Bit0 (983~996) 14 989,   Bit8 (969~983) 15 976,

 1822 00:40:28.812591  TX Bit1 (981~994) 14 987,   Bit9 (972~983) 12 977,

 1823 00:40:28.819447  TX Bit2 (983~995) 13 989,   Bit10 (976~990) 15 983,

 1824 00:40:28.822683  TX Bit3 (976~990) 15 983,   Bit11 (971~983) 13 977,

 1825 00:40:28.826159  TX Bit4 (981~994) 14 987,   Bit12 (972~984) 13 978,

 1826 00:40:28.832579  TX Bit5 (978~992) 15 985,   Bit13 (972~986) 15 979,

 1827 00:40:28.835845  TX Bit6 (978~992) 15 985,   Bit14 (973~988) 16 980,

 1828 00:40:28.839048  TX Bit7 (980~994) 15 987,   Bit15 (975~989) 15 982,

 1829 00:40:28.842264  

 1830 00:40:28.842648  Write Rank1 MR14 =0x4

 1831 00:40:28.851415  

 1832 00:40:28.851963  	CH=0, VrefRange= 0, VrefLevel = 4

 1833 00:40:28.857736  TX Bit0 (983~996) 14 989,   Bit8 (968~983) 16 975,

 1834 00:40:28.860992  TX Bit1 (981~995) 15 988,   Bit9 (972~984) 13 978,

 1835 00:40:28.867551  TX Bit2 (982~997) 16 989,   Bit10 (976~991) 16 983,

 1836 00:40:28.871094  TX Bit3 (976~991) 16 983,   Bit11 (970~983) 14 976,

 1837 00:40:28.873923  TX Bit4 (981~995) 15 988,   Bit12 (972~985) 14 978,

 1838 00:40:28.880669  TX Bit5 (978~992) 15 985,   Bit13 (972~986) 15 979,

 1839 00:40:28.884166  TX Bit6 (978~993) 16 985,   Bit14 (973~989) 17 981,

 1840 00:40:28.890697  TX Bit7 (979~995) 17 987,   Bit15 (975~989) 15 982,

 1841 00:40:28.891084  

 1842 00:40:28.891389  Write Rank1 MR14 =0x6

 1843 00:40:28.899751  

 1844 00:40:28.900187  	CH=0, VrefRange= 0, VrefLevel = 6

 1845 00:40:28.906462  TX Bit0 (983~997) 15 990,   Bit8 (968~984) 17 976,

 1846 00:40:28.909979  TX Bit1 (980~996) 17 988,   Bit9 (971~985) 15 978,

 1847 00:40:28.916791  TX Bit2 (982~998) 17 990,   Bit10 (975~991) 17 983,

 1848 00:40:28.920158  TX Bit3 (975~991) 17 983,   Bit11 (969~983) 15 976,

 1849 00:40:28.923395  TX Bit4 (980~996) 17 988,   Bit12 (971~986) 16 978,

 1850 00:40:28.929691  TX Bit5 (977~993) 17 985,   Bit13 (971~987) 17 979,

 1851 00:40:28.933154  TX Bit6 (978~993) 16 985,   Bit14 (972~989) 18 980,

 1852 00:40:28.939204  TX Bit7 (979~997) 19 988,   Bit15 (975~990) 16 982,

 1853 00:40:28.939595  

 1854 00:40:28.939892  Write Rank1 MR14 =0x8

 1855 00:40:28.948703  

 1856 00:40:28.949155  	CH=0, VrefRange= 0, VrefLevel = 8

 1857 00:40:28.955529  TX Bit0 (982~998) 17 990,   Bit8 (968~984) 17 976,

 1858 00:40:28.958798  TX Bit1 (980~997) 18 988,   Bit9 (971~986) 16 978,

 1859 00:40:28.964966  TX Bit2 (982~998) 17 990,   Bit10 (975~992) 18 983,

 1860 00:40:28.968456  TX Bit3 (975~991) 17 983,   Bit11 (969~984) 16 976,

 1861 00:40:28.971596  TX Bit4 (980~997) 18 988,   Bit12 (971~987) 17 979,

 1862 00:40:28.978736  TX Bit5 (977~994) 18 985,   Bit13 (970~988) 19 979,

 1863 00:40:28.981386  TX Bit6 (977~994) 18 985,   Bit14 (972~990) 19 981,

 1864 00:40:28.988285  TX Bit7 (978~997) 20 987,   Bit15 (975~990) 16 982,

 1865 00:40:28.988882  

 1866 00:40:28.989416  Write Rank1 MR14 =0xa

 1867 00:40:28.997790  

 1868 00:40:29.000886  	CH=0, VrefRange= 0, VrefLevel = 10

 1869 00:40:29.004009  TX Bit0 (982~998) 17 990,   Bit8 (968~985) 18 976,

 1870 00:40:29.007799  TX Bit1 (979~998) 20 988,   Bit9 (970~987) 18 978,

 1871 00:40:29.014062  TX Bit2 (982~999) 18 990,   Bit10 (975~992) 18 983,

 1872 00:40:29.017510  TX Bit3 (975~992) 18 983,   Bit11 (968~985) 18 976,

 1873 00:40:29.020904  TX Bit4 (979~997) 19 988,   Bit12 (971~988) 18 979,

 1874 00:40:29.027259  TX Bit5 (977~994) 18 985,   Bit13 (970~989) 20 979,

 1875 00:40:29.031029  TX Bit6 (977~995) 19 986,   Bit14 (971~990) 20 980,

 1876 00:40:29.037486  TX Bit7 (978~998) 21 988,   Bit15 (975~991) 17 983,

 1877 00:40:29.037917  

 1878 00:40:29.038269  Write Rank1 MR14 =0xc

 1879 00:40:29.046629  

 1880 00:40:29.050305  	CH=0, VrefRange= 0, VrefLevel = 12

 1881 00:40:29.053398  TX Bit0 (982~999) 18 990,   Bit8 (967~986) 20 976,

 1882 00:40:29.057105  TX Bit1 (979~998) 20 988,   Bit9 (970~988) 19 979,

 1883 00:40:29.063428  TX Bit2 (981~999) 19 990,   Bit10 (974~994) 21 984,

 1884 00:40:29.066556  TX Bit3 (975~992) 18 983,   Bit11 (968~985) 18 976,

 1885 00:40:29.070096  TX Bit4 (978~998) 21 988,   Bit12 (970~989) 20 979,

 1886 00:40:29.076442  TX Bit5 (977~995) 19 986,   Bit13 (970~989) 20 979,

 1887 00:40:29.079814  TX Bit6 (977~997) 21 987,   Bit14 (971~990) 20 980,

 1888 00:40:29.086390  TX Bit7 (978~999) 22 988,   Bit15 (975~992) 18 983,

 1889 00:40:29.086781  

 1890 00:40:29.087086  Write Rank1 MR14 =0xe

 1891 00:40:29.095869  

 1892 00:40:29.099114  	CH=0, VrefRange= 0, VrefLevel = 14

 1893 00:40:29.102569  TX Bit0 (980~999) 20 989,   Bit8 (967~987) 21 977,

 1894 00:40:29.105677  TX Bit1 (980~999) 20 989,   Bit9 (969~988) 20 978,

 1895 00:40:29.112487  TX Bit2 (981~999) 19 990,   Bit10 (974~994) 21 984,

 1896 00:40:29.115813  TX Bit3 (974~993) 20 983,   Bit11 (968~986) 19 977,

 1897 00:40:29.118962  TX Bit4 (979~998) 20 988,   Bit12 (969~989) 21 979,

 1898 00:40:29.125898  TX Bit5 (976~996) 21 986,   Bit13 (969~990) 22 979,

 1899 00:40:29.128488  TX Bit6 (977~997) 21 987,   Bit14 (970~991) 22 980,

 1900 00:40:29.135549  TX Bit7 (978~999) 22 988,   Bit15 (974~992) 19 983,

 1901 00:40:29.135944  

 1902 00:40:29.136253  Write Rank1 MR14 =0x10

 1903 00:40:29.145184  

 1904 00:40:29.148634  	CH=0, VrefRange= 0, VrefLevel = 16

 1905 00:40:29.151343  TX Bit0 (980~999) 20 989,   Bit8 (967~988) 22 977,

 1906 00:40:29.155194  TX Bit1 (978~999) 22 988,   Bit9 (969~989) 21 979,

 1907 00:40:29.161234  TX Bit2 (981~1000) 20 990,   Bit10 (974~995) 22 984,

 1908 00:40:29.164779  TX Bit3 (975~993) 19 984,   Bit11 (968~988) 21 978,

 1909 00:40:29.168104  TX Bit4 (978~999) 22 988,   Bit12 (969~990) 22 979,

 1910 00:40:29.174369  TX Bit5 (976~997) 22 986,   Bit13 (969~990) 22 979,

 1911 00:40:29.177824  TX Bit6 (976~998) 23 987,   Bit14 (969~991) 23 980,

 1912 00:40:29.184611  TX Bit7 (978~1000) 23 989,   Bit15 (974~993) 20 983,

 1913 00:40:29.185057  

 1914 00:40:29.185368  Write Rank1 MR14 =0x12

 1915 00:40:29.194437  

 1916 00:40:29.197772  	CH=0, VrefRange= 0, VrefLevel = 18

 1917 00:40:29.201060  TX Bit0 (980~1000) 21 990,   Bit8 (967~988) 22 977,

 1918 00:40:29.204113  TX Bit1 (978~999) 22 988,   Bit9 (969~989) 21 979,

 1919 00:40:29.210791  TX Bit2 (981~1000) 20 990,   Bit10 (974~996) 23 985,

 1920 00:40:29.214127  TX Bit3 (974~993) 20 983,   Bit11 (968~988) 21 978,

 1921 00:40:29.217730  TX Bit4 (978~999) 22 988,   Bit12 (968~990) 23 979,

 1922 00:40:29.223675  TX Bit5 (976~997) 22 986,   Bit13 (969~990) 22 979,

 1923 00:40:29.227347  TX Bit6 (976~998) 23 987,   Bit14 (969~992) 24 980,

 1924 00:40:29.234012  TX Bit7 (977~1000) 24 988,   Bit15 (973~994) 22 983,

 1925 00:40:29.234407  

 1926 00:40:29.234716  Write Rank1 MR14 =0x14

 1927 00:40:29.244127  

 1928 00:40:29.247453  	CH=0, VrefRange= 0, VrefLevel = 20

 1929 00:40:29.250815  TX Bit0 (980~1000) 21 990,   Bit8 (967~989) 23 978,

 1930 00:40:29.254124  TX Bit1 (978~1000) 23 989,   Bit9 (969~990) 22 979,

 1931 00:40:29.260316  TX Bit2 (980~1000) 21 990,   Bit10 (973~996) 24 984,

 1932 00:40:29.263767  TX Bit3 (974~994) 21 984,   Bit11 (968~989) 22 978,

 1933 00:40:29.267401  TX Bit4 (977~999) 23 988,   Bit12 (968~990) 23 979,

 1934 00:40:29.274219  TX Bit5 (976~998) 23 987,   Bit13 (969~991) 23 980,

 1935 00:40:29.277316  TX Bit6 (976~999) 24 987,   Bit14 (969~992) 24 980,

 1936 00:40:29.283748  TX Bit7 (977~1000) 24 988,   Bit15 (974~994) 21 984,

 1937 00:40:29.284191  

 1938 00:40:29.284498  Write Rank1 MR14 =0x16

 1939 00:40:29.294189  

 1940 00:40:29.297211  	CH=0, VrefRange= 0, VrefLevel = 22

 1941 00:40:29.300663  TX Bit0 (980~1001) 22 990,   Bit8 (967~989) 23 978,

 1942 00:40:29.303686  TX Bit1 (977~1000) 24 988,   Bit9 (968~990) 23 979,

 1943 00:40:29.310458  TX Bit2 (980~1001) 22 990,   Bit10 (973~996) 24 984,

 1944 00:40:29.313687  TX Bit3 (973~995) 23 984,   Bit11 (967~989) 23 978,

 1945 00:40:29.316804  TX Bit4 (977~1000) 24 988,   Bit12 (968~991) 24 979,

 1946 00:40:29.323483  TX Bit5 (976~998) 23 987,   Bit13 (968~991) 24 979,

 1947 00:40:29.327055  TX Bit6 (976~999) 24 987,   Bit14 (969~993) 25 981,

 1948 00:40:29.333661  TX Bit7 (977~1000) 24 988,   Bit15 (973~995) 23 984,

 1949 00:40:29.334136  

 1950 00:40:29.334470  Write Rank1 MR14 =0x18

 1951 00:40:29.343581  

 1952 00:40:29.346855  	CH=0, VrefRange= 0, VrefLevel = 24

 1953 00:40:29.350442  TX Bit0 (979~1001) 23 990,   Bit8 (966~989) 24 977,

 1954 00:40:29.353342  TX Bit1 (977~1000) 24 988,   Bit9 (968~990) 23 979,

 1955 00:40:29.359843  TX Bit2 (978~1001) 24 989,   Bit10 (973~997) 25 985,

 1956 00:40:29.363256  TX Bit3 (973~996) 24 984,   Bit11 (967~989) 23 978,

 1957 00:40:29.369935  TX Bit4 (977~1000) 24 988,   Bit12 (968~991) 24 979,

 1958 00:40:29.373138  TX Bit5 (975~998) 24 986,   Bit13 (968~991) 24 979,

 1959 00:40:29.376711  TX Bit6 (976~999) 24 987,   Bit14 (968~993) 26 980,

 1960 00:40:29.383194  TX Bit7 (977~1001) 25 989,   Bit15 (972~995) 24 983,

 1961 00:40:29.383630  

 1962 00:40:29.383939  Write Rank1 MR14 =0x1a

 1963 00:40:29.393864  

 1964 00:40:29.397205  	CH=0, VrefRange= 0, VrefLevel = 26

 1965 00:40:29.400639  TX Bit0 (978~1002) 25 990,   Bit8 (966~989) 24 977,

 1966 00:40:29.403482  TX Bit1 (977~1001) 25 989,   Bit9 (968~991) 24 979,

 1967 00:40:29.410064  TX Bit2 (979~1002) 24 990,   Bit10 (973~997) 25 985,

 1968 00:40:29.413189  TX Bit3 (974~996) 23 985,   Bit11 (967~990) 24 978,

 1969 00:40:29.419712  TX Bit4 (977~1001) 25 989,   Bit12 (968~991) 24 979,

 1970 00:40:29.423238  TX Bit5 (975~999) 25 987,   Bit13 (968~991) 24 979,

 1971 00:40:29.426697  TX Bit6 (976~999) 24 987,   Bit14 (968~992) 25 980,

 1972 00:40:29.433425  TX Bit7 (977~1001) 25 989,   Bit15 (973~996) 24 984,

 1973 00:40:29.433920  

 1974 00:40:29.434341  Write Rank1 MR14 =0x1c

 1975 00:40:29.444055  

 1976 00:40:29.446919  	CH=0, VrefRange= 0, VrefLevel = 28

 1977 00:40:29.450190  TX Bit0 (978~1002) 25 990,   Bit8 (966~989) 24 977,

 1978 00:40:29.453840  TX Bit1 (978~1001) 24 989,   Bit9 (968~991) 24 979,

 1979 00:40:29.460313  TX Bit2 (978~1002) 25 990,   Bit10 (973~997) 25 985,

 1980 00:40:29.463434  TX Bit3 (973~996) 24 984,   Bit11 (967~990) 24 978,

 1981 00:40:29.466954  TX Bit4 (977~1001) 25 989,   Bit12 (968~991) 24 979,

 1982 00:40:29.473387  TX Bit5 (975~999) 25 987,   Bit13 (968~991) 24 979,

 1983 00:40:29.476709  TX Bit6 (976~999) 24 987,   Bit14 (968~992) 25 980,

 1984 00:40:29.483331  TX Bit7 (977~1000) 24 988,   Bit15 (971~996) 26 983,

 1985 00:40:29.483812  

 1986 00:40:29.484250  Write Rank1 MR14 =0x1e

 1987 00:40:29.493703  

 1988 00:40:29.496914  	CH=0, VrefRange= 0, VrefLevel = 30

 1989 00:40:29.500246  TX Bit0 (978~1002) 25 990,   Bit8 (966~989) 24 977,

 1990 00:40:29.503532  TX Bit1 (978~1001) 24 989,   Bit9 (968~991) 24 979,

 1991 00:40:29.510272  TX Bit2 (978~1002) 25 990,   Bit10 (973~997) 25 985,

 1992 00:40:29.513981  TX Bit3 (973~996) 24 984,   Bit11 (967~990) 24 978,

 1993 00:40:29.516940  TX Bit4 (977~1001) 25 989,   Bit12 (968~991) 24 979,

 1994 00:40:29.523280  TX Bit5 (975~999) 25 987,   Bit13 (968~991) 24 979,

 1995 00:40:29.526853  TX Bit6 (976~999) 24 987,   Bit14 (968~992) 25 980,

 1996 00:40:29.533640  TX Bit7 (977~1000) 24 988,   Bit15 (971~996) 26 983,

 1997 00:40:29.534094  

 1998 00:40:29.536347  wait MRW command Rank1 MR14 =0x20 fired (1)

 1999 00:40:29.539961  Write Rank1 MR14 =0x20

 2000 00:40:29.548239  

 2001 00:40:29.548816  	CH=0, VrefRange= 0, VrefLevel = 32

 2002 00:40:29.554754  TX Bit0 (978~1002) 25 990,   Bit8 (966~989) 24 977,

 2003 00:40:29.558390  TX Bit1 (978~1001) 24 989,   Bit9 (968~991) 24 979,

 2004 00:40:29.564404  TX Bit2 (978~1002) 25 990,   Bit10 (973~997) 25 985,

 2005 00:40:29.567522  TX Bit3 (973~996) 24 984,   Bit11 (967~990) 24 978,

 2006 00:40:29.570605  TX Bit4 (977~1001) 25 989,   Bit12 (968~991) 24 979,

 2007 00:40:29.577618  TX Bit5 (975~999) 25 987,   Bit13 (968~991) 24 979,

 2008 00:40:29.580772  TX Bit6 (976~999) 24 987,   Bit14 (968~992) 25 980,

 2009 00:40:29.588022  TX Bit7 (977~1000) 24 988,   Bit15 (971~996) 26 983,

 2010 00:40:29.588422  

 2011 00:40:29.588731  Write Rank1 MR14 =0x22

 2012 00:40:29.597480  

 2013 00:40:29.601056  	CH=0, VrefRange= 0, VrefLevel = 34

 2014 00:40:29.604205  TX Bit0 (978~1002) 25 990,   Bit8 (966~989) 24 977,

 2015 00:40:29.607648  TX Bit1 (978~1001) 24 989,   Bit9 (968~991) 24 979,

 2016 00:40:29.614140  TX Bit2 (978~1002) 25 990,   Bit10 (973~997) 25 985,

 2017 00:40:29.617326  TX Bit3 (973~996) 24 984,   Bit11 (967~990) 24 978,

 2018 00:40:29.624520  TX Bit4 (977~1001) 25 989,   Bit12 (968~991) 24 979,

 2019 00:40:29.627498  TX Bit5 (975~999) 25 987,   Bit13 (968~991) 24 979,

 2020 00:40:29.630871  TX Bit6 (976~999) 24 987,   Bit14 (968~992) 25 980,

 2021 00:40:29.637139  TX Bit7 (977~1000) 24 988,   Bit15 (971~996) 26 983,

 2022 00:40:29.637674  

 2023 00:40:29.638006  

 2024 00:40:29.640345  TX Vref found, early break! 370< 372

 2025 00:40:29.643663  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps

 2026 00:40:29.647187  u1DelayCellOfst[0]=7 cells (6 PI)

 2027 00:40:29.650419  u1DelayCellOfst[1]=6 cells (5 PI)

 2028 00:40:29.653661  u1DelayCellOfst[2]=7 cells (6 PI)

 2029 00:40:29.656607  u1DelayCellOfst[3]=0 cells (0 PI)

 2030 00:40:29.660587  u1DelayCellOfst[4]=6 cells (5 PI)

 2031 00:40:29.663707  u1DelayCellOfst[5]=3 cells (3 PI)

 2032 00:40:29.666519  u1DelayCellOfst[6]=3 cells (3 PI)

 2033 00:40:29.669864  u1DelayCellOfst[7]=5 cells (4 PI)

 2034 00:40:29.673310  Byte0, DQ PI dly=984, DQM PI dly= 987

 2035 00:40:29.676790  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)

 2036 00:40:29.677247  

 2037 00:40:29.679980  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)

 2038 00:40:29.680408  

 2039 00:40:29.682975  u1DelayCellOfst[8]=0 cells (0 PI)

 2040 00:40:29.686217  u1DelayCellOfst[9]=2 cells (2 PI)

 2041 00:40:29.689149  u1DelayCellOfst[10]=10 cells (8 PI)

 2042 00:40:29.692777  u1DelayCellOfst[11]=1 cells (1 PI)

 2043 00:40:29.695940  u1DelayCellOfst[12]=2 cells (2 PI)

 2044 00:40:29.698877  u1DelayCellOfst[13]=2 cells (2 PI)

 2045 00:40:29.702180  u1DelayCellOfst[14]=3 cells (3 PI)

 2046 00:40:29.705701  u1DelayCellOfst[15]=7 cells (6 PI)

 2047 00:40:29.708823  Byte1, DQ PI dly=977, DQM PI dly= 981

 2048 00:40:29.712050  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 2049 00:40:29.712209  

 2050 00:40:29.718563  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 2051 00:40:29.718713  

 2052 00:40:29.718815  Write Rank1 MR14 =0x1c

 2053 00:40:29.718901  

 2054 00:40:29.722479  Final TX Range 0 Vref 28

 2055 00:40:29.722597  

 2056 00:40:29.728246  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2057 00:40:29.728380  

 2058 00:40:29.735696  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2059 00:40:29.741921  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2060 00:40:29.748859  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2061 00:40:29.752182  Write Rank1 MR3 =0xb0

 2062 00:40:29.752332  DramC Write-DBI on

 2063 00:40:29.752410  ==

 2064 00:40:29.759197  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2065 00:40:29.762249  fsp= 1, odt_onoff= 1, Byte mode= 0

 2066 00:40:29.762646  ==

 2067 00:40:29.765325  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2068 00:40:29.765870  

 2069 00:40:29.768537  Begin, DQ Scan Range 701~765

 2070 00:40:29.768973  

 2071 00:40:29.769343  

 2072 00:40:29.771616  	TX Vref Scan disable

 2073 00:40:29.775222  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2074 00:40:29.778583  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2075 00:40:29.782183  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2076 00:40:29.785200  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2077 00:40:29.788463  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2078 00:40:29.791552  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2079 00:40:29.794943  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2080 00:40:29.798326  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2081 00:40:29.801765  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2082 00:40:29.804715  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2083 00:40:29.811664  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2084 00:40:29.814501  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2085 00:40:29.817810  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2086 00:40:29.821092  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2087 00:40:29.824553  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2088 00:40:29.828241  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2089 00:40:29.831583  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 2090 00:40:29.834583  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 2091 00:40:29.837639  719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]

 2092 00:40:29.840804  720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]

 2093 00:40:29.848672  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 2094 00:40:29.852255  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2095 00:40:29.855355  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2096 00:40:29.858406  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2097 00:40:29.861793  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2098 00:40:29.865272  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2099 00:40:29.868637  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2100 00:40:29.871934  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2101 00:40:29.875133  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 2102 00:40:29.878207  745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]

 2103 00:40:29.881670  746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]

 2104 00:40:29.885081  747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2105 00:40:29.888574  Byte0, DQ PI dly=733, DQM PI dly= 733

 2106 00:40:29.895083  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)

 2107 00:40:29.895486  

 2108 00:40:29.898084  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)

 2109 00:40:29.898487  

 2110 00:40:29.901368  Byte1, DQ PI dly=723, DQM PI dly= 723

 2111 00:40:29.904633  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)

 2112 00:40:29.905026  

 2113 00:40:29.911536  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)

 2114 00:40:29.912024  

 2115 00:40:29.918133  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2116 00:40:29.924942  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2117 00:40:29.931514  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2118 00:40:29.934837  Write Rank1 MR3 =0x30

 2119 00:40:29.935319  DramC Write-DBI off

 2120 00:40:29.935694  

 2121 00:40:29.935989  [DATLAT]

 2122 00:40:29.938016  Freq=1600, CH0 RK1, use_rxtx_scan=0

 2123 00:40:29.938413  

 2124 00:40:29.941232  DATLAT Default: 0x10

 2125 00:40:29.944172  7, 0xFFFF, sum=0

 2126 00:40:29.944572  8, 0xFFFF, sum=0

 2127 00:40:29.944890  9, 0xFFFF, sum=0

 2128 00:40:29.948759  10, 0xFFFF, sum=0

 2129 00:40:29.949160  11, 0xFFFF, sum=0

 2130 00:40:29.951370  12, 0xFFFF, sum=0

 2131 00:40:29.951769  13, 0xFFFF, sum=0

 2132 00:40:29.954680  14, 0x0, sum=1

 2133 00:40:29.955081  15, 0x0, sum=2

 2134 00:40:29.957646  16, 0x0, sum=3

 2135 00:40:29.958046  17, 0x0, sum=4

 2136 00:40:29.961115  pattern=2 first_step=14 total pass=5 best_step=16

 2137 00:40:29.961503  ==

 2138 00:40:29.968499  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2139 00:40:29.971053  fsp= 1, odt_onoff= 1, Byte mode= 0

 2140 00:40:29.971451  ==

 2141 00:40:29.974354  Start DQ dly to find pass range UseTestEngine =1

 2142 00:40:29.977638  x-axis: bit #, y-axis: DQ dly (-127~63)

 2143 00:40:29.981027  RX Vref Scan = 0

 2144 00:40:29.984332  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2145 00:40:29.988022  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2146 00:40:29.988503  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2147 00:40:29.991437  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2148 00:40:29.994855  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2149 00:40:29.997372  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2150 00:40:30.000540  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2151 00:40:30.004400  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2152 00:40:30.007440  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2153 00:40:30.010388  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2154 00:40:30.013941  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2155 00:40:30.017107  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2156 00:40:30.017808  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2157 00:40:30.020172  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2158 00:40:30.024203  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2159 00:40:30.026780  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2160 00:40:30.030300  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2161 00:40:30.033302  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2162 00:40:30.036916  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2163 00:40:30.040455  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2164 00:40:30.040857  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2165 00:40:30.043838  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2166 00:40:30.046561  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2167 00:40:30.049916  -3, [0] xxxoxxxx xxxxxxxx [MSB]

 2168 00:40:30.053643  -2, [0] xxxoxxxx xxxxxxxx [MSB]

 2169 00:40:30.056461  -1, [0] xxxoxoxx xxxxxxxx [MSB]

 2170 00:40:30.059799  0, [0] xxxoxoxx oxxoxxxx [MSB]

 2171 00:40:30.060202  1, [0] xxxoxoox oxxoxxxx [MSB]

 2172 00:40:30.063734  2, [0] xxxoxoox ooxoxxxx [MSB]

 2173 00:40:30.066595  3, [0] xoxoxoox ooxoooxx [MSB]

 2174 00:40:30.069993  4, [0] ooxoxooo ooxoooxx [MSB]

 2175 00:40:30.073617  5, [0] oooooooo ooxoooox [MSB]

 2176 00:40:30.076537  6, [0] oooooooo ooxooooo [MSB]

 2177 00:40:30.077096  7, [0] oooooooo ooxooooo [MSB]

 2178 00:40:30.079801  8, [0] oooooooo ooxooooo [MSB]

 2179 00:40:30.084311  32, [0] oooxoooo oooooooo [MSB]

 2180 00:40:30.087612  33, [0] oooxoxoo oooooooo [MSB]

 2181 00:40:30.090952  34, [0] oooxoxoo oooxoooo [MSB]

 2182 00:40:30.094317  35, [0] oooxoxxo xooxoooo [MSB]

 2183 00:40:30.097366  36, [0] oooxoxxo xxoxoooo [MSB]

 2184 00:40:30.100679  37, [0] oooxoxxo xxoxxxoo [MSB]

 2185 00:40:30.104094  38, [0] oooxoxxx xxoxxxxo [MSB]

 2186 00:40:30.104494  39, [0] xooxxxxx xxoxxxxo [MSB]

 2187 00:40:30.107450  40, [0] xxoxxxxx xxoxxxxo [MSB]

 2188 00:40:30.110699  41, [0] xxxxxxxx xxoxxxxx [MSB]

 2189 00:40:30.114465  42, [0] xxxxxxxx xxoxxxxx [MSB]

 2190 00:40:30.117654  43, [0] xxxxxxxx xxxxxxxx [MSB]

 2191 00:40:30.121055  iDelay=43, Bit 0, Center 21 (4 ~ 38) 35

 2192 00:40:30.124699  iDelay=43, Bit 1, Center 21 (3 ~ 39) 37

 2193 00:40:30.127468  iDelay=43, Bit 2, Center 22 (5 ~ 40) 36

 2194 00:40:30.130629  iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35

 2195 00:40:30.133969  iDelay=43, Bit 4, Center 21 (5 ~ 38) 34

 2196 00:40:30.137418  iDelay=43, Bit 5, Center 15 (-1 ~ 32) 34

 2197 00:40:30.140643  iDelay=43, Bit 6, Center 17 (1 ~ 34) 34

 2198 00:40:30.143884  iDelay=43, Bit 7, Center 20 (4 ~ 37) 34

 2199 00:40:30.150077  iDelay=43, Bit 8, Center 17 (0 ~ 34) 35

 2200 00:40:30.153507  iDelay=43, Bit 9, Center 18 (2 ~ 35) 34

 2201 00:40:30.156820  iDelay=43, Bit 10, Center 25 (9 ~ 42) 34

 2202 00:40:30.160230  iDelay=43, Bit 11, Center 16 (0 ~ 33) 34

 2203 00:40:30.163594  iDelay=43, Bit 12, Center 19 (3 ~ 36) 34

 2204 00:40:30.166972  iDelay=43, Bit 13, Center 19 (3 ~ 36) 34

 2205 00:40:30.169593  iDelay=43, Bit 14, Center 21 (5 ~ 37) 33

 2206 00:40:30.173046  iDelay=43, Bit 15, Center 23 (6 ~ 40) 35

 2207 00:40:30.173439  ==

 2208 00:40:30.179845  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2209 00:40:30.183489  fsp= 1, odt_onoff= 1, Byte mode= 0

 2210 00:40:30.183885  ==

 2211 00:40:30.184197  DQS Delay:

 2212 00:40:30.186659  DQS0 = 0, DQS1 = 0

 2213 00:40:30.187151  DQM Delay:

 2214 00:40:30.190301  DQM0 = 18, DQM1 = 19

 2215 00:40:30.190694  DQ Delay:

 2216 00:40:30.192954  DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14

 2217 00:40:30.196570  DQ4 =21, DQ5 =15, DQ6 =17, DQ7 =20

 2218 00:40:30.199684  DQ8 =17, DQ9 =18, DQ10 =25, DQ11 =16

 2219 00:40:30.202920  DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23

 2220 00:40:30.203314  

 2221 00:40:30.203621  

 2222 00:40:30.203904  

 2223 00:40:30.206426  [DramC_TX_OE_Calibration] TA2

 2224 00:40:30.209334  Original DQ_B0 (3 6) =30, OEN = 27

 2225 00:40:30.212501  Original DQ_B1 (3 6) =30, OEN = 27

 2226 00:40:30.212896  23, 0x0, End_B0=23 End_B1=23

 2227 00:40:30.215861  24, 0x0, End_B0=24 End_B1=24

 2228 00:40:30.219441  25, 0x0, End_B0=25 End_B1=25

 2229 00:40:30.222653  26, 0x0, End_B0=26 End_B1=26

 2230 00:40:30.225859  27, 0x0, End_B0=27 End_B1=27

 2231 00:40:30.226284  28, 0x0, End_B0=28 End_B1=28

 2232 00:40:30.229325  29, 0x0, End_B0=29 End_B1=29

 2233 00:40:30.232631  30, 0x0, End_B0=30 End_B1=30

 2234 00:40:30.235771  31, 0xFFFF, End_B0=30 End_B1=30

 2235 00:40:30.239033  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2236 00:40:30.245752  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2237 00:40:30.246035  

 2238 00:40:30.246254  

 2239 00:40:30.248913  Write Rank1 MR23 =0x3f

 2240 00:40:30.249124  [DQSOSC]

 2241 00:40:30.258799  [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps

 2242 00:40:30.261867  CH0_RK1: MR19=0x202, MR18=0xB1B1, DQSOSC=457, MR23=63, INC=11, DEC=17

 2243 00:40:30.265156  Write Rank1 MR23 =0x3f

 2244 00:40:30.265366  [DQSOSC]

 2245 00:40:30.275516  [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps

 2246 00:40:30.278386  CH0 RK1: MR19=202, MR18=B2B2

 2247 00:40:30.278599  [RxdqsGatingPostProcess] freq 1600

 2248 00:40:30.285173  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 2249 00:40:30.285386  Rank: 0

 2250 00:40:30.289054  best DQS0 dly(2T, 0.5T) = (2, 6)

 2251 00:40:30.291581  best DQS1 dly(2T, 0.5T) = (2, 6)

 2252 00:40:30.295122  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2253 00:40:30.298481  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2254 00:40:30.298898  Rank: 1

 2255 00:40:30.301816  best DQS0 dly(2T, 0.5T) = (2, 6)

 2256 00:40:30.305208  best DQS1 dly(2T, 0.5T) = (2, 6)

 2257 00:40:30.308197  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2258 00:40:30.311695  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2259 00:40:30.315109  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 2260 00:40:30.318329  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 2261 00:40:30.324977  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 2262 00:40:30.328267  Write Rank0 MR13 =0x59

 2263 00:40:30.328691  ==

 2264 00:40:30.331719  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2265 00:40:30.334765  fsp= 1, odt_onoff= 1, Byte mode= 0

 2266 00:40:30.335155  ==

 2267 00:40:30.338310  === u2Vref_new: 0x56 --> 0x3a

 2268 00:40:30.341760  === u2Vref_new: 0x58 --> 0x58

 2269 00:40:30.344643  === u2Vref_new: 0x5a --> 0x5a

 2270 00:40:30.348067  === u2Vref_new: 0x5c --> 0x78

 2271 00:40:30.351644  === u2Vref_new: 0x5e --> 0x7a

 2272 00:40:30.354759  === u2Vref_new: 0x60 --> 0x90

 2273 00:40:30.358581  [CA 0] Center 37 (12~63) winsize 52

 2274 00:40:30.361542  [CA 1] Center 37 (11~63) winsize 53

 2275 00:40:30.365094  [CA 2] Center 34 (6~63) winsize 58

 2276 00:40:30.368526  [CA 3] Center 35 (7~63) winsize 57

 2277 00:40:30.368921  [CA 4] Center 34 (5~63) winsize 59

 2278 00:40:30.371783  [CA 5] Center 28 (-1~57) winsize 59

 2279 00:40:30.374542  

 2280 00:40:30.377898  [CATrainingPosCal] consider 1 rank data

 2281 00:40:30.378335  u2DelayCellTimex100 = 753/100 ps

 2282 00:40:30.384731  CA0 delay=37 (12~63),Diff = 9 PI (11 cell)

 2283 00:40:30.388192  CA1 delay=37 (11~63),Diff = 9 PI (11 cell)

 2284 00:40:30.391499  CA2 delay=34 (6~63),Diff = 6 PI (7 cell)

 2285 00:40:30.394850  CA3 delay=35 (7~63),Diff = 7 PI (9 cell)

 2286 00:40:30.397610  CA4 delay=34 (5~63),Diff = 6 PI (7 cell)

 2287 00:40:30.400979  CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)

 2288 00:40:30.401367  

 2289 00:40:30.404339  CA PerBit enable=1, Macro0, CA PI delay=28

 2290 00:40:30.407768  === u2Vref_new: 0x5a --> 0x5a

 2291 00:40:30.408176  

 2292 00:40:30.411185  Vref(ca) range 1: 26

 2293 00:40:30.411585  

 2294 00:40:30.411896  CS Dly= 10 (41-0-32)

 2295 00:40:30.414569  Write Rank0 MR13 =0xd8

 2296 00:40:30.417395  Write Rank0 MR13 =0xd8

 2297 00:40:30.417813  Write Rank0 MR12 =0x5a

 2298 00:40:30.420796  Write Rank1 MR13 =0x59

 2299 00:40:30.421190  ==

 2300 00:40:30.427683  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2301 00:40:30.428183  fsp= 1, odt_onoff= 1, Byte mode= 0

 2302 00:40:30.430803  ==

 2303 00:40:30.431195  === u2Vref_new: 0x56 --> 0x3a

 2304 00:40:30.434630  === u2Vref_new: 0x58 --> 0x58

 2305 00:40:30.437429  === u2Vref_new: 0x5a --> 0x5a

 2306 00:40:30.440679  === u2Vref_new: 0x5c --> 0x78

 2307 00:40:30.443655  === u2Vref_new: 0x5e --> 0x7a

 2308 00:40:30.447377  === u2Vref_new: 0x60 --> 0x90

 2309 00:40:30.450594  [CA 0] Center 37 (11~63) winsize 53

 2310 00:40:30.454032  [CA 1] Center 37 (11~63) winsize 53

 2311 00:40:30.457172  [CA 2] Center 34 (6~63) winsize 58

 2312 00:40:30.460526  [CA 3] Center 35 (7~63) winsize 57

 2313 00:40:30.463801  [CA 4] Center 34 (5~63) winsize 59

 2314 00:40:30.467196  [CA 5] Center 27 (-1~56) winsize 58

 2315 00:40:30.467350  

 2316 00:40:30.470009  [CATrainingPosCal] consider 2 rank data

 2317 00:40:30.473673  u2DelayCellTimex100 = 753/100 ps

 2318 00:40:30.476820  CA0 delay=37 (12~63),Diff = 10 PI (12 cell)

 2319 00:40:30.480317  CA1 delay=37 (11~63),Diff = 10 PI (12 cell)

 2320 00:40:30.483540  CA2 delay=34 (6~63),Diff = 7 PI (9 cell)

 2321 00:40:30.486727  CA3 delay=35 (7~63),Diff = 8 PI (10 cell)

 2322 00:40:30.493929  CA4 delay=34 (5~63),Diff = 7 PI (9 cell)

 2323 00:40:30.496703  CA5 delay=27 (-1~56),Diff = 0 PI (0 cell)

 2324 00:40:30.497303  

 2325 00:40:30.500331  CA PerBit enable=1, Macro0, CA PI delay=27

 2326 00:40:30.503625  === u2Vref_new: 0x5e --> 0x7a

 2327 00:40:30.504220  

 2328 00:40:30.504728  Vref(ca) range 1: 30

 2329 00:40:30.505206  

 2330 00:40:30.507231  CS Dly= 9 (40-0-32)

 2331 00:40:30.509858  Write Rank1 MR13 =0xd8

 2332 00:40:30.510250  Write Rank1 MR13 =0xd8

 2333 00:40:30.513269  Write Rank1 MR12 =0x5e

 2334 00:40:30.516693  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2335 00:40:30.519356  Write Rank0 MR2 =0xad

 2336 00:40:30.519568  [Write Leveling]

 2337 00:40:30.522865  delay  byte0  byte1  byte2  byte3

 2338 00:40:30.523093  

 2339 00:40:30.523282  10    0   0   

 2340 00:40:30.526215  11    0   0   

 2341 00:40:30.526385  12    0   0   

 2342 00:40:30.529518  13    0   0   

 2343 00:40:30.529686  14    0   0   

 2344 00:40:30.533251  15    0   0   

 2345 00:40:30.533456  16    0   0   

 2346 00:40:30.533648  17    0   0   

 2347 00:40:30.536109  18    0   0   

 2348 00:40:30.536268  19    0   0   

 2349 00:40:30.539356  20    0   0   

 2350 00:40:30.539500  21    0   0   

 2351 00:40:30.539622  22    0   0   

 2352 00:40:30.542695  23    0   0   

 2353 00:40:30.542818  24    0   0   

 2354 00:40:30.546027  25    0   0   

 2355 00:40:30.546122  26    0   0   

 2356 00:40:30.549319  27    0   0   

 2357 00:40:30.549445  28    0   0   

 2358 00:40:30.549563  29    0   0   

 2359 00:40:30.552133  30    0   0   

 2360 00:40:30.552259  31    0   0   

 2361 00:40:30.555640  32    0   0   

 2362 00:40:30.555782  33    0   ff   

 2363 00:40:30.558962  34    ff   ff   

 2364 00:40:30.559089  35    0   ff   

 2365 00:40:30.562145  36    ff   ff   

 2366 00:40:30.562236  37    ff   ff   

 2367 00:40:30.562307  38    ff   ff   

 2368 00:40:30.565912  39    ff   ff   

 2369 00:40:30.566008  40    ff   ff   

 2370 00:40:30.569084  41    ff   ff   

 2371 00:40:30.569193  42    ff   ff   

 2372 00:40:30.575172  pass bytecount = 0xff (0xff: all bytes pass) 

 2373 00:40:30.575269  

 2374 00:40:30.575343  DQS0 dly: 36

 2375 00:40:30.575411  DQS1 dly: 33

 2376 00:40:30.578527  Write Rank0 MR2 =0x2d

 2377 00:40:30.582153  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2378 00:40:30.585143  Write Rank0 MR1 =0xd6

 2379 00:40:30.585254  [Gating]

 2380 00:40:30.585358  ==

 2381 00:40:30.592028  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2382 00:40:30.592175  fsp= 1, odt_onoff= 1, Byte mode= 0

 2383 00:40:30.595056  ==

 2384 00:40:30.598237  3 1 0 |2c2b 808  |(11 11)(11 11) |(1 1)(0 0)| 0

 2385 00:40:30.601926  3 1 4 |2c2b 3535  |(11 11)(11 11) |(1 1)(1 1)| 0

 2386 00:40:30.608287  3 1 8 |2c2b 3535  |(11 11)(11 11) |(1 1)(0 0)| 0

 2387 00:40:30.611460  3 1 12 |2c2b 3636  |(11 11)(0 0) |(1 1)(1 1)| 0

 2388 00:40:30.615019  3 1 16 |2c2b 3635  |(11 11)(11 11) |(1 1)(1 1)| 0

 2389 00:40:30.617966  [Byte 0] Lead/lag falling Transition (3, 1, 16)

 2390 00:40:30.624712  3 1 20 |2c2b 3737  |(11 11)(11 11) |(1 0)(1 1)| 0

 2391 00:40:30.628448  3 1 24 |2c2b 3535  |(11 11)(11 11) |(1 0)(1 1)| 0

 2392 00:40:30.631803  3 1 28 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 2393 00:40:30.637940  3 2 0 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 2394 00:40:30.641529  [Byte 1] Lead/lag Transition tap number (1)

 2395 00:40:30.644895  3 2 4 |2c2b 3434  |(11 11)(11 11) |(1 0)(0 0)| 0

 2396 00:40:30.651067  3 2 8 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 0)| 0

 2397 00:40:30.654148  3 2 12 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 0)| 0

 2398 00:40:30.657915  3 2 16 |2c2b 201f  |(11 11)(11 11) |(1 0)(0 0)| 0

 2399 00:40:30.661074  [Byte 0] Lead/lag Transition tap number (9)

 2400 00:40:30.667728  3 2 20 |2c2b 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 2401 00:40:30.671163  3 2 24 |302 3434  |(11 11)(11 11) |(0 0)(0 1)| 0

 2402 00:40:30.674367  3 2 28 |3534 201  |(11 11)(11 11) |(0 0)(0 0)| 0

 2403 00:40:30.680590  3 3 0 |3534 e0e  |(11 11)(11 11) |(0 0)(1 1)| 0

 2404 00:40:30.683646  3 3 4 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2405 00:40:30.686741  3 3 8 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2406 00:40:30.693561  3 3 12 |3534 3d3c  |(11 11)(11 11) |(0 0)(1 1)| 0

 2407 00:40:30.696932  3 3 16 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2408 00:40:30.699612  3 3 20 |3534 3d3c  |(11 11)(11 11) |(1 1)(1 1)| 0

 2409 00:40:30.706670  3 3 24 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2410 00:40:30.709432  3 3 28 |3534 909  |(11 11)(11 11) |(0 0)(1 1)| 0

 2411 00:40:30.712819  3 4 0 |3534 e0d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2412 00:40:30.716086  [Byte 1] Lead/lag Transition tap number (1)

 2413 00:40:30.723041  3 4 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2414 00:40:30.725918  3 4 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2415 00:40:30.729768  3 4 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2416 00:40:30.736106  3 4 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 2417 00:40:30.739602  3 4 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 2418 00:40:30.742982  3 4 24 |504 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2419 00:40:30.749017  3 4 28 |2121 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2420 00:40:30.752618  3 5 0 |3d3d 201  |(11 11)(11 11) |(1 1)(1 1)| 0

 2421 00:40:30.755365  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2422 00:40:30.762159  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2423 00:40:30.765453  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2424 00:40:30.769261  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2425 00:40:30.775031  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2426 00:40:30.778293  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2427 00:40:30.781747  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2428 00:40:30.788613  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2429 00:40:30.791878  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2430 00:40:30.795083  3 6 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2431 00:40:30.801438  3 6 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2432 00:40:30.804792  [Byte 0] Lead/lag falling Transition (3, 6, 12)

 2433 00:40:30.808273  3 6 16 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2434 00:40:30.814508  3 6 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2435 00:40:30.818086  [Byte 0] Lead/lag Transition tap number (3)

 2436 00:40:30.821528  [Byte 1] Lead/lag falling Transition (3, 6, 20)

 2437 00:40:30.824592  3 6 24 |202 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2438 00:40:30.831371  [Byte 1] Lead/lag Transition tap number (2)

 2439 00:40:30.834376  3 6 28 |4646 909  |(0 0)(11 11) |(0 0)(0 0)| 0

 2440 00:40:30.837388  [Byte 0]First pass (3, 6, 28)

 2441 00:40:30.840870  3 7 0 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 2442 00:40:30.844274  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2443 00:40:30.847405  [Byte 1]First pass (3, 7, 4)

 2444 00:40:30.850798  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2445 00:40:30.854178  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2446 00:40:30.860998  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2447 00:40:30.864230  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2448 00:40:30.867339  3 7 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2449 00:40:30.870686  3 7 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2450 00:40:30.877360  4 0 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2451 00:40:30.880847  4 0 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2452 00:40:30.884024  All bytes gating window > 1UI, Early break!

 2453 00:40:30.884688  

 2454 00:40:30.887372  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 18)

 2455 00:40:30.887776  

 2456 00:40:30.890858  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)

 2457 00:40:30.891256  

 2458 00:40:30.891564  

 2459 00:40:30.891846  

 2460 00:40:30.896660  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 18)

 2461 00:40:30.897015  

 2462 00:40:30.900485  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)

 2463 00:40:30.900790  

 2464 00:40:30.901014  

 2465 00:40:30.902912  Write Rank0 MR1 =0x56

 2466 00:40:30.903180  

 2467 00:40:30.903352  best RODT dly(2T, 0.5T) = (2, 3)

 2468 00:40:30.906292  

 2469 00:40:30.906530  best RODT dly(2T, 0.5T) = (2, 3)

 2470 00:40:30.909404  ==

 2471 00:40:30.912821  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2472 00:40:30.915925  fsp= 1, odt_onoff= 1, Byte mode= 0

 2473 00:40:30.916070  ==

 2474 00:40:30.919283  Start DQ dly to find pass range UseTestEngine =0

 2475 00:40:30.926148  x-axis: bit #, y-axis: DQ dly (-127~63)

 2476 00:40:30.926269  RX Vref Scan = 0

 2477 00:40:30.928891  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2478 00:40:30.932331  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2479 00:40:30.935749  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2480 00:40:30.939259  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2481 00:40:30.939340  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2482 00:40:30.942761  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2483 00:40:30.945847  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2484 00:40:30.948862  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2485 00:40:30.951832  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2486 00:40:30.955285  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2487 00:40:30.958358  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2488 00:40:30.961895  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2489 00:40:30.964858  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2490 00:40:30.968323  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2491 00:40:30.968403  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2492 00:40:30.971773  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2493 00:40:30.975226  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2494 00:40:30.978236  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2495 00:40:30.981544  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2496 00:40:30.984948  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2497 00:40:30.987644  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2498 00:40:30.990970  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2499 00:40:30.991090  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2500 00:40:30.994310  -3, [0] xxxxxxxx xxxxxxxo [MSB]

 2501 00:40:30.997838  -2, [0] xxxxxxxx xxxxxxxo [MSB]

 2502 00:40:31.000970  -1, [0] xxxxxxxx xxxxxxxo [MSB]

 2503 00:40:31.004581  0, [0] xxxxxxxx xoxxxxxo [MSB]

 2504 00:40:31.007231  1, [0] xxxoxxxx ooxxxxxo [MSB]

 2505 00:40:31.010980  2, [0] xxxoxxxx ooxxxxxo [MSB]

 2506 00:40:31.011073  3, [0] xoooxxxx oooxxxxo [MSB]

 2507 00:40:31.014541  4, [0] xoooxxxo oooxxxxo [MSB]

 2508 00:40:31.016966  5, [0] xooooxxo oooooooo [MSB]

 2509 00:40:31.020200  6, [0] xooooxxo oooooooo [MSB]

 2510 00:40:31.023524  7, [0] xooooxoo oooooooo [MSB]

 2511 00:40:31.027239  8, [0] xooooooo oooooooo [MSB]

 2512 00:40:31.030579  33, [0] oooxoooo ooooooox [MSB]

 2513 00:40:31.030688  34, [0] oooxoooo ooooooox [MSB]

 2514 00:40:31.033994  35, [0] oooxoooo xoooooox [MSB]

 2515 00:40:31.036752  36, [0] ooxxoooo xxooooox [MSB]

 2516 00:40:31.040177  37, [0] ooxxoooo xxooooox [MSB]

 2517 00:40:31.043711  38, [0] ooxxooox xxooooox [MSB]

 2518 00:40:31.047170  39, [0] xxxxxoox xxooxoox [MSB]

 2519 00:40:31.049845  40, [0] xxxxxoox xxxoxoox [MSB]

 2520 00:40:31.053272  41, [0] xxxxxxxx xxxxxxxx [MSB]

 2521 00:40:31.056541  iDelay=41, Bit 0, Center 23 (9 ~ 38) 30

 2522 00:40:31.059560  iDelay=41, Bit 1, Center 20 (3 ~ 38) 36

 2523 00:40:31.062954  iDelay=41, Bit 2, Center 19 (3 ~ 35) 33

 2524 00:40:31.066283  iDelay=41, Bit 3, Center 16 (1 ~ 32) 32

 2525 00:40:31.069695  iDelay=41, Bit 4, Center 21 (5 ~ 38) 34

 2526 00:40:31.072916  iDelay=41, Bit 5, Center 24 (8 ~ 40) 33

 2527 00:40:31.076569  iDelay=41, Bit 6, Center 23 (7 ~ 40) 34

 2528 00:40:31.079652  iDelay=41, Bit 7, Center 20 (4 ~ 37) 34

 2529 00:40:31.082841  iDelay=41, Bit 8, Center 17 (1 ~ 34) 34

 2530 00:40:31.086031  iDelay=41, Bit 9, Center 17 (0 ~ 35) 36

 2531 00:40:31.089493  iDelay=41, Bit 10, Center 21 (3 ~ 39) 37

 2532 00:40:31.095780  iDelay=41, Bit 11, Center 22 (5 ~ 40) 36

 2533 00:40:31.098858  iDelay=41, Bit 12, Center 21 (5 ~ 38) 34

 2534 00:40:31.102409  iDelay=41, Bit 13, Center 22 (5 ~ 40) 36

 2535 00:40:31.105879  iDelay=41, Bit 14, Center 22 (5 ~ 40) 36

 2536 00:40:31.108931  iDelay=41, Bit 15, Center 14 (-3 ~ 32) 36

 2537 00:40:31.109036  ==

 2538 00:40:31.115367  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2539 00:40:31.118571  fsp= 1, odt_onoff= 1, Byte mode= 0

 2540 00:40:31.118647  ==

 2541 00:40:31.118707  DQS Delay:

 2542 00:40:31.121535  DQS0 = 0, DQS1 = 0

 2543 00:40:31.121620  DQM Delay:

 2544 00:40:31.121677  DQM0 = 20, DQM1 = 19

 2545 00:40:31.125350  DQ Delay:

 2546 00:40:31.128524  DQ0 =23, DQ1 =20, DQ2 =19, DQ3 =16

 2547 00:40:31.131908  DQ4 =21, DQ5 =24, DQ6 =23, DQ7 =20

 2548 00:40:31.135243  DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22

 2549 00:40:31.138642  DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =14

 2550 00:40:31.138720  

 2551 00:40:31.138782  

 2552 00:40:31.138840  DramC Write-DBI off

 2553 00:40:31.138895  ==

 2554 00:40:31.144734  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2555 00:40:31.148229  fsp= 1, odt_onoff= 1, Byte mode= 0

 2556 00:40:31.148320  ==

 2557 00:40:31.151526  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 2558 00:40:31.151618  

 2559 00:40:31.155132  Begin, DQ Scan Range 929~1185

 2560 00:40:31.155282  

 2561 00:40:31.155368  

 2562 00:40:31.157825  	TX Vref Scan disable

 2563 00:40:31.161305  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 2564 00:40:31.164681  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 2565 00:40:31.168009  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 2566 00:40:31.171582  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 2567 00:40:31.174552  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2568 00:40:31.177588  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 2569 00:40:31.181372  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2570 00:40:31.187287  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2571 00:40:31.190728  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2572 00:40:31.194154  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2573 00:40:31.197494  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2574 00:40:31.200252  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 2575 00:40:31.203603  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 2576 00:40:31.207176  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 2577 00:40:31.210240  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 2578 00:40:31.213842  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2579 00:40:31.216986  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 2580 00:40:31.220056  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 2581 00:40:31.223158  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2582 00:40:31.226633  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 2583 00:40:31.233199  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 2584 00:40:31.236444  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 2585 00:40:31.239746  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 2586 00:40:31.243200  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 2587 00:40:31.245874  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2588 00:40:31.249460  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2589 00:40:31.252936  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2590 00:40:31.255924  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2591 00:40:31.259277  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2592 00:40:31.262662  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2593 00:40:31.265952  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2594 00:40:31.268748  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2595 00:40:31.272183  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2596 00:40:31.278758  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2597 00:40:31.282341  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2598 00:40:31.285476  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2599 00:40:31.288742  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2600 00:40:31.292064  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2601 00:40:31.295389  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2602 00:40:31.298160  968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 2603 00:40:31.301434  969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 2604 00:40:31.304985  970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]

 2605 00:40:31.308565  971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]

 2606 00:40:31.311917  972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]

 2607 00:40:31.314943  973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]

 2608 00:40:31.317986  974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]

 2609 00:40:31.321101  975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]

 2610 00:40:31.324603  976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]

 2611 00:40:31.331125  977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]

 2612 00:40:31.334305  978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]

 2613 00:40:31.337677  979 |3 6 19|[0] xxxxxxxx oxxxxxxo [MSB]

 2614 00:40:31.340923  980 |3 6 20|[0] xxxxxxxx ooxxxxxo [MSB]

 2615 00:40:31.344283  981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]

 2616 00:40:31.347434  982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]

 2617 00:40:31.350944  983 |3 6 23|[0] xxxxxxxx oooxxxoo [MSB]

 2618 00:40:31.354039  984 |3 6 24|[0] xxxxxxxx oooooxoo [MSB]

 2619 00:40:31.361076  996 |3 6 36|[0] oooooooo ooooooox [MSB]

 2620 00:40:31.364452  997 |3 6 37|[0] oooooooo ooooooox [MSB]

 2621 00:40:31.368272  998 |3 6 38|[0] oooooooo ooooooox [MSB]

 2622 00:40:31.370901  999 |3 6 39|[0] oooooooo ooooooox [MSB]

 2623 00:40:31.374324  1000 |3 6 40|[0] oooooooo oxooooox [MSB]

 2624 00:40:31.377726  1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]

 2625 00:40:31.381203  1002 |3 6 42|[0] oooooooo xxxxxxxx [MSB]

 2626 00:40:31.383950  1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]

 2627 00:40:31.387590  1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]

 2628 00:40:31.390583  1005 |3 6 45|[0] oooxoooo xxxxxxxx [MSB]

 2629 00:40:31.396869  1006 |3 6 46|[0] ooxxoooo xxxxxxxx [MSB]

 2630 00:40:31.400591  1007 |3 6 47|[0] oxxxxxxx xxxxxxxx [MSB]

 2631 00:40:31.403916  1008 |3 6 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2632 00:40:31.407131  Byte0, DQ PI dly=994, DQM PI dly= 994

 2633 00:40:31.410505  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 34)

 2634 00:40:31.410593  

 2635 00:40:31.413836  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 34)

 2636 00:40:31.416616  

 2637 00:40:31.420020  Byte1, DQ PI dly=989, DQM PI dly= 989

 2638 00:40:31.423103  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)

 2639 00:40:31.423184  

 2640 00:40:31.426375  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)

 2641 00:40:31.426455  

 2642 00:40:31.426534  ==

 2643 00:40:31.433251  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2644 00:40:31.436473  fsp= 1, odt_onoff= 1, Byte mode= 0

 2645 00:40:31.436555  ==

 2646 00:40:31.440028  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 2647 00:40:31.440107  

 2648 00:40:31.442680  Begin, DQ Scan Range 965~1029

 2649 00:40:31.445813  Write Rank0 MR14 =0x0

 2650 00:40:31.453158  

 2651 00:40:31.453248  	CH=1, VrefRange= 0, VrefLevel = 0

 2652 00:40:31.460046  TX Bit0 (987~1004) 18 995,   Bit8 (984~994) 11 989,

 2653 00:40:31.463488  TX Bit1 (985~1002) 18 993,   Bit9 (983~993) 11 988,

 2654 00:40:31.470021  TX Bit2 (985~998) 14 991,   Bit10 (986~998) 13 992,

 2655 00:40:31.473081  TX Bit3 (984~996) 13 990,   Bit11 (986~997) 12 991,

 2656 00:40:31.476540  TX Bit4 (986~1002) 17 994,   Bit12 (985~996) 12 990,

 2657 00:40:31.483103  TX Bit5 (987~1003) 17 995,   Bit13 (987~997) 11 992,

 2658 00:40:31.486451  TX Bit6 (986~1003) 18 994,   Bit14 (986~994) 9 990,

 2659 00:40:31.493157  TX Bit7 (986~1000) 15 993,   Bit15 (980~989) 10 984,

 2660 00:40:31.493378  

 2661 00:40:31.493648  Write Rank0 MR14 =0x2

 2662 00:40:31.502317  

 2663 00:40:31.502465  	CH=1, VrefRange= 0, VrefLevel = 2

 2664 00:40:31.508716  TX Bit0 (987~1005) 19 996,   Bit8 (983~995) 13 989,

 2665 00:40:31.511556  TX Bit1 (985~1004) 20 994,   Bit9 (983~994) 12 988,

 2666 00:40:31.518365  TX Bit2 (984~999) 16 991,   Bit10 (986~999) 14 992,

 2667 00:40:31.521734  TX Bit3 (984~997) 14 990,   Bit11 (987~999) 13 993,

 2668 00:40:31.525023  TX Bit4 (986~1003) 18 994,   Bit12 (986~998) 13 992,

 2669 00:40:31.531912  TX Bit5 (987~1004) 18 995,   Bit13 (987~998) 12 992,

 2670 00:40:31.534805  TX Bit6 (986~1004) 19 995,   Bit14 (985~995) 11 990,

 2671 00:40:31.541455  TX Bit7 (986~1001) 16 993,   Bit15 (980~991) 12 985,

 2672 00:40:31.541595  

 2673 00:40:31.541720  Write Rank0 MR14 =0x4

 2674 00:40:31.551110  

 2675 00:40:31.551299  	CH=1, VrefRange= 0, VrefLevel = 4

 2676 00:40:31.557257  TX Bit0 (986~1005) 20 995,   Bit8 (982~995) 14 988,

 2677 00:40:31.560551  TX Bit1 (985~1005) 21 995,   Bit9 (982~994) 13 988,

 2678 00:40:31.567585  TX Bit2 (984~1000) 17 992,   Bit10 (985~1000) 16 992,

 2679 00:40:31.570379  TX Bit3 (984~998) 15 991,   Bit11 (986~999) 14 992,

 2680 00:40:31.577318  TX Bit4 (986~1003) 18 994,   Bit12 (986~999) 14 992,

 2681 00:40:31.580683  TX Bit5 (986~1005) 20 995,   Bit13 (986~999) 14 992,

 2682 00:40:31.583911  TX Bit6 (986~1005) 20 995,   Bit14 (985~996) 12 990,

 2683 00:40:31.590723  TX Bit7 (986~1002) 17 994,   Bit15 (979~992) 14 985,

 2684 00:40:31.591169  

 2685 00:40:31.591473  Write Rank0 MR14 =0x6

 2686 00:40:31.599964  

 2687 00:40:31.600355  	CH=1, VrefRange= 0, VrefLevel = 6

 2688 00:40:31.606805  TX Bit0 (986~1006) 21 996,   Bit8 (983~996) 14 989,

 2689 00:40:31.610291  TX Bit1 (985~1005) 21 995,   Bit9 (982~995) 14 988,

 2690 00:40:31.616366  TX Bit2 (984~1001) 18 992,   Bit10 (985~1000) 16 992,

 2691 00:40:31.619550  TX Bit3 (983~998) 16 990,   Bit11 (986~1000) 15 993,

 2692 00:40:31.626468  TX Bit4 (985~1004) 20 994,   Bit12 (985~1000) 16 992,

 2693 00:40:31.629876  TX Bit5 (986~1005) 20 995,   Bit13 (986~1000) 15 993,

 2694 00:40:31.632599  TX Bit6 (985~1005) 21 995,   Bit14 (985~997) 13 991,

 2695 00:40:31.639234  TX Bit7 (985~1003) 19 994,   Bit15 (979~993) 15 986,

 2696 00:40:31.639653  

 2697 00:40:31.642402  Write Rank0 MR14 =0x8

 2698 00:40:31.649703  

 2699 00:40:31.650180  	CH=1, VrefRange= 0, VrefLevel = 8

 2700 00:40:31.655937  TX Bit0 (986~1006) 21 996,   Bit8 (982~996) 15 989,

 2701 00:40:31.659671  TX Bit1 (985~1005) 21 995,   Bit9 (981~995) 15 988,

 2702 00:40:31.666053  TX Bit2 (984~1002) 19 993,   Bit10 (984~1000) 17 992,

 2703 00:40:31.669155  TX Bit3 (983~999) 17 991,   Bit11 (985~1000) 16 992,

 2704 00:40:31.676067  TX Bit4 (985~1005) 21 995,   Bit12 (985~1000) 16 992,

 2705 00:40:31.679617  TX Bit5 (986~1005) 20 995,   Bit13 (986~1000) 15 993,

 2706 00:40:31.683099  TX Bit6 (986~1005) 20 995,   Bit14 (985~998) 14 991,

 2707 00:40:31.689115  TX Bit7 (985~1004) 20 994,   Bit15 (978~993) 16 985,

 2708 00:40:31.689514  

 2709 00:40:31.689873  Write Rank0 MR14 =0xa

 2710 00:40:31.698918  

 2711 00:40:31.702491  	CH=1, VrefRange= 0, VrefLevel = 10

 2712 00:40:31.705515  TX Bit0 (986~1006) 21 996,   Bit8 (980~998) 19 989,

 2713 00:40:31.708673  TX Bit1 (985~1006) 22 995,   Bit9 (981~996) 16 988,

 2714 00:40:31.715467  TX Bit2 (984~1003) 20 993,   Bit10 (984~1001) 18 992,

 2715 00:40:31.718929  TX Bit3 (983~999) 17 991,   Bit11 (985~1001) 17 993,

 2716 00:40:31.724972  TX Bit4 (985~1005) 21 995,   Bit12 (985~1001) 17 993,

 2717 00:40:31.728433  TX Bit5 (986~1006) 21 996,   Bit13 (986~1001) 16 993,

 2718 00:40:31.731698  TX Bit6 (985~1006) 22 995,   Bit14 (985~999) 15 992,

 2719 00:40:31.738293  TX Bit7 (985~1005) 21 995,   Bit15 (978~993) 16 985,

 2720 00:40:31.738689  

 2721 00:40:31.741609  Write Rank0 MR14 =0xc

 2722 00:40:31.748923  

 2723 00:40:31.752092  	CH=1, VrefRange= 0, VrefLevel = 12

 2724 00:40:31.755461  TX Bit0 (986~1007) 22 996,   Bit8 (981~998) 18 989,

 2725 00:40:31.758764  TX Bit1 (984~1006) 23 995,   Bit9 (980~997) 18 988,

 2726 00:40:31.765243  TX Bit2 (984~1003) 20 993,   Bit10 (984~1001) 18 992,

 2727 00:40:31.768237  TX Bit3 (982~1000) 19 991,   Bit11 (984~1001) 18 992,

 2728 00:40:31.774779  TX Bit4 (985~1006) 22 995,   Bit12 (984~1001) 18 992,

 2729 00:40:31.778041  TX Bit5 (985~1006) 22 995,   Bit13 (985~1001) 17 993,

 2730 00:40:31.781271  TX Bit6 (985~1006) 22 995,   Bit14 (984~1000) 17 992,

 2731 00:40:31.788056  TX Bit7 (985~1005) 21 995,   Bit15 (978~994) 17 986,

 2732 00:40:31.788456  

 2733 00:40:31.791515  Write Rank0 MR14 =0xe

 2734 00:40:31.798420  

 2735 00:40:31.801357  	CH=1, VrefRange= 0, VrefLevel = 14

 2736 00:40:31.804390  TX Bit0 (986~1007) 22 996,   Bit8 (979~1000) 22 989,

 2737 00:40:31.807908  TX Bit1 (985~1006) 22 995,   Bit9 (981~998) 18 989,

 2738 00:40:31.814674  TX Bit2 (983~1005) 23 994,   Bit10 (983~1001) 19 992,

 2739 00:40:31.817999  TX Bit3 (982~1001) 20 991,   Bit11 (985~1002) 18 993,

 2740 00:40:31.824335  TX Bit4 (985~1006) 22 995,   Bit12 (984~1002) 19 993,

 2741 00:40:31.827772  TX Bit5 (985~1006) 22 995,   Bit13 (985~1001) 17 993,

 2742 00:40:31.834445  TX Bit6 (985~1006) 22 995,   Bit14 (984~1000) 17 992,

 2743 00:40:31.837158  TX Bit7 (985~1006) 22 995,   Bit15 (978~994) 17 986,

 2744 00:40:31.837662  

 2745 00:40:31.840699  Write Rank0 MR14 =0x10

 2746 00:40:31.848228  

 2747 00:40:31.851818  	CH=1, VrefRange= 0, VrefLevel = 16

 2748 00:40:31.854829  TX Bit0 (986~1008) 23 997,   Bit8 (979~1000) 22 989,

 2749 00:40:31.857943  TX Bit1 (984~1007) 24 995,   Bit9 (980~998) 19 989,

 2750 00:40:31.865000  TX Bit2 (983~1005) 23 994,   Bit10 (983~1002) 20 992,

 2751 00:40:31.868183  TX Bit3 (981~1002) 22 991,   Bit11 (985~1002) 18 993,

 2752 00:40:31.874618  TX Bit4 (984~1006) 23 995,   Bit12 (984~1002) 19 993,

 2753 00:40:31.877728  TX Bit5 (986~1006) 21 996,   Bit13 (985~1002) 18 993,

 2754 00:40:31.884644  TX Bit6 (985~1006) 22 995,   Bit14 (983~1001) 19 992,

 2755 00:40:31.887973  TX Bit7 (985~1006) 22 995,   Bit15 (977~995) 19 986,

 2756 00:40:31.888463  

 2757 00:40:31.891236  Write Rank0 MR14 =0x12

 2758 00:40:31.898674  

 2759 00:40:31.902080  	CH=1, VrefRange= 0, VrefLevel = 18

 2760 00:40:31.905331  TX Bit0 (985~1008) 24 996,   Bit8 (979~1000) 22 989,

 2761 00:40:31.908575  TX Bit1 (984~1007) 24 995,   Bit9 (981~1000) 20 990,

 2762 00:40:31.914883  TX Bit2 (983~1005) 23 994,   Bit10 (983~1002) 20 992,

 2763 00:40:31.918253  TX Bit3 (981~1002) 22 991,   Bit11 (983~1002) 20 992,

 2764 00:40:31.924414  TX Bit4 (984~1007) 24 995,   Bit12 (983~1002) 20 992,

 2765 00:40:31.927913  TX Bit5 (985~1007) 23 996,   Bit13 (985~1002) 18 993,

 2766 00:40:31.934220  TX Bit6 (985~1007) 23 996,   Bit14 (983~1001) 19 992,

 2767 00:40:31.937535  TX Bit7 (985~1006) 22 995,   Bit15 (977~995) 19 986,

 2768 00:40:31.938028  

 2769 00:40:31.940955  Write Rank0 MR14 =0x14

 2770 00:40:31.948694  

 2771 00:40:31.951712  	CH=1, VrefRange= 0, VrefLevel = 20

 2772 00:40:31.955181  TX Bit0 (985~1008) 24 996,   Bit8 (979~1001) 23 990,

 2773 00:40:31.958165  TX Bit1 (984~1007) 24 995,   Bit9 (979~1000) 22 989,

 2774 00:40:31.965204  TX Bit2 (983~1006) 24 994,   Bit10 (982~1002) 21 992,

 2775 00:40:31.967690  TX Bit3 (980~1002) 23 991,   Bit11 (984~1003) 20 993,

 2776 00:40:31.974472  TX Bit4 (984~1007) 24 995,   Bit12 (984~1003) 20 993,

 2777 00:40:31.977781  TX Bit5 (985~1007) 23 996,   Bit13 (984~1002) 19 993,

 2778 00:40:31.984404  TX Bit6 (984~1007) 24 995,   Bit14 (983~1002) 20 992,

 2779 00:40:31.988158  TX Bit7 (984~1006) 23 995,   Bit15 (977~996) 20 986,

 2780 00:40:31.988674  

 2781 00:40:31.991287  Write Rank0 MR14 =0x16

 2782 00:40:31.999208  

 2783 00:40:32.001966  	CH=1, VrefRange= 0, VrefLevel = 22

 2784 00:40:32.005829  TX Bit0 (985~1009) 25 997,   Bit8 (979~1001) 23 990,

 2785 00:40:32.008975  TX Bit1 (984~1008) 25 996,   Bit9 (979~1000) 22 989,

 2786 00:40:32.015148  TX Bit2 (982~1006) 25 994,   Bit10 (982~1003) 22 992,

 2787 00:40:32.018509  TX Bit3 (980~1004) 25 992,   Bit11 (983~1003) 21 993,

 2788 00:40:32.025311  TX Bit4 (984~1007) 24 995,   Bit12 (983~1003) 21 993,

 2789 00:40:32.028522  TX Bit5 (985~1008) 24 996,   Bit13 (984~1003) 20 993,

 2790 00:40:32.035198  TX Bit6 (984~1008) 25 996,   Bit14 (983~1002) 20 992,

 2791 00:40:32.038328  TX Bit7 (984~1006) 23 995,   Bit15 (977~997) 21 987,

 2792 00:40:32.038725  

 2793 00:40:32.041489  Write Rank0 MR14 =0x18

 2794 00:40:32.049649  

 2795 00:40:32.052750  	CH=1, VrefRange= 0, VrefLevel = 24

 2796 00:40:32.056197  TX Bit0 (985~1009) 25 997,   Bit8 (978~1001) 24 989,

 2797 00:40:32.058979  TX Bit1 (984~1008) 25 996,   Bit9 (979~1001) 23 990,

 2798 00:40:32.065628  TX Bit2 (982~1006) 25 994,   Bit10 (982~1003) 22 992,

 2799 00:40:32.068813  TX Bit3 (980~1004) 25 992,   Bit11 (983~1004) 22 993,

 2800 00:40:32.075299  TX Bit4 (984~1008) 25 996,   Bit12 (983~1003) 21 993,

 2801 00:40:32.078663  TX Bit5 (985~1008) 24 996,   Bit13 (984~1003) 20 993,

 2802 00:40:32.085159  TX Bit6 (984~1008) 25 996,   Bit14 (983~1002) 20 992,

 2803 00:40:32.088532  TX Bit7 (985~1007) 23 996,   Bit15 (976~997) 22 986,

 2804 00:40:32.088949  

 2805 00:40:32.091813  Write Rank0 MR14 =0x1a

 2806 00:40:32.099812  

 2807 00:40:32.103262  	CH=1, VrefRange= 0, VrefLevel = 26

 2808 00:40:32.106266  TX Bit0 (985~1009) 25 997,   Bit8 (978~1002) 25 990,

 2809 00:40:32.109490  TX Bit1 (984~1008) 25 996,   Bit9 (979~1001) 23 990,

 2810 00:40:32.115907  TX Bit2 (982~1006) 25 994,   Bit10 (981~1004) 24 992,

 2811 00:40:32.119408  TX Bit3 (979~1005) 27 992,   Bit11 (982~1004) 23 993,

 2812 00:40:32.125476  TX Bit4 (984~1008) 25 996,   Bit12 (983~1004) 22 993,

 2813 00:40:32.129061  TX Bit5 (985~1008) 24 996,   Bit13 (984~1004) 21 994,

 2814 00:40:32.136221  TX Bit6 (984~1008) 25 996,   Bit14 (981~1003) 23 992,

 2815 00:40:32.139147  TX Bit7 (984~1007) 24 995,   Bit15 (976~998) 23 987,

 2816 00:40:32.139538  

 2817 00:40:32.142356  Write Rank0 MR14 =0x1c

 2818 00:40:32.150475  

 2819 00:40:32.153636  	CH=1, VrefRange= 0, VrefLevel = 28

 2820 00:40:32.156737  TX Bit0 (984~1010) 27 997,   Bit8 (979~1001) 23 990,

 2821 00:40:32.160611  TX Bit1 (984~1008) 25 996,   Bit9 (979~1001) 23 990,

 2822 00:40:32.166510  TX Bit2 (981~1006) 26 993,   Bit10 (981~1003) 23 992,

 2823 00:40:32.170034  TX Bit3 (979~1005) 27 992,   Bit11 (981~1004) 24 992,

 2824 00:40:32.176750  TX Bit4 (983~1009) 27 996,   Bit12 (983~1004) 22 993,

 2825 00:40:32.179563  TX Bit5 (984~1009) 26 996,   Bit13 (983~1004) 22 993,

 2826 00:40:32.186023  TX Bit6 (984~1009) 26 996,   Bit14 (981~1003) 23 992,

 2827 00:40:32.189838  TX Bit7 (984~1008) 25 996,   Bit15 (976~999) 24 987,

 2828 00:40:32.190286  

 2829 00:40:32.192425  Write Rank0 MR14 =0x1e

 2830 00:40:32.200653  

 2831 00:40:32.203793  	CH=1, VrefRange= 0, VrefLevel = 30

 2832 00:40:32.206910  TX Bit0 (984~1010) 27 997,   Bit8 (979~1001) 23 990,

 2833 00:40:32.210522  TX Bit1 (984~1008) 25 996,   Bit9 (979~1001) 23 990,

 2834 00:40:32.217352  TX Bit2 (981~1006) 26 993,   Bit10 (981~1003) 23 992,

 2835 00:40:32.220451  TX Bit3 (979~1005) 27 992,   Bit11 (981~1004) 24 992,

 2836 00:40:32.226630  TX Bit4 (983~1009) 27 996,   Bit12 (983~1004) 22 993,

 2837 00:40:32.229939  TX Bit5 (984~1009) 26 996,   Bit13 (983~1004) 22 993,

 2838 00:40:32.236867  TX Bit6 (984~1009) 26 996,   Bit14 (981~1003) 23 992,

 2839 00:40:32.240217  TX Bit7 (984~1008) 25 996,   Bit15 (976~999) 24 987,

 2840 00:40:32.240602  

 2841 00:40:32.243687  Write Rank0 MR14 =0x20

 2842 00:40:32.251357  

 2843 00:40:32.254598  	CH=1, VrefRange= 0, VrefLevel = 32

 2844 00:40:32.257709  TX Bit0 (984~1010) 27 997,   Bit8 (979~1001) 23 990,

 2845 00:40:32.260822  TX Bit1 (984~1008) 25 996,   Bit9 (979~1001) 23 990,

 2846 00:40:32.267574  TX Bit2 (981~1006) 26 993,   Bit10 (981~1003) 23 992,

 2847 00:40:32.270789  TX Bit3 (979~1005) 27 992,   Bit11 (981~1004) 24 992,

 2848 00:40:32.277070  TX Bit4 (983~1009) 27 996,   Bit12 (983~1004) 22 993,

 2849 00:40:32.280424  TX Bit5 (984~1009) 26 996,   Bit13 (983~1004) 22 993,

 2850 00:40:32.287326  TX Bit6 (984~1009) 26 996,   Bit14 (981~1003) 23 992,

 2851 00:40:32.291021  TX Bit7 (984~1008) 25 996,   Bit15 (976~999) 24 987,

 2852 00:40:32.291442  

 2853 00:40:32.294022  Write Rank0 MR14 =0x22

 2854 00:40:32.301404  

 2855 00:40:32.304600  	CH=1, VrefRange= 0, VrefLevel = 34

 2856 00:40:32.308213  TX Bit0 (984~1010) 27 997,   Bit8 (979~1001) 23 990,

 2857 00:40:32.311565  TX Bit1 (984~1008) 25 996,   Bit9 (979~1001) 23 990,

 2858 00:40:32.318284  TX Bit2 (981~1006) 26 993,   Bit10 (981~1003) 23 992,

 2859 00:40:32.321395  TX Bit3 (979~1005) 27 992,   Bit11 (981~1004) 24 992,

 2860 00:40:32.328004  TX Bit4 (983~1009) 27 996,   Bit12 (983~1004) 22 993,

 2861 00:40:32.331502  TX Bit5 (984~1009) 26 996,   Bit13 (983~1004) 22 993,

 2862 00:40:32.337586  TX Bit6 (984~1009) 26 996,   Bit14 (981~1003) 23 992,

 2863 00:40:32.340947  TX Bit7 (984~1008) 25 996,   Bit15 (976~999) 24 987,

 2864 00:40:32.341336  

 2865 00:40:32.341685  

 2866 00:40:32.344262  TX Vref found, early break! 371< 373

 2867 00:40:32.350590  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps

 2868 00:40:32.351037  u1DelayCellOfst[0]=6 cells (5 PI)

 2869 00:40:32.353900  u1DelayCellOfst[1]=5 cells (4 PI)

 2870 00:40:32.357008  u1DelayCellOfst[2]=1 cells (1 PI)

 2871 00:40:32.360691  u1DelayCellOfst[3]=0 cells (0 PI)

 2872 00:40:32.363971  u1DelayCellOfst[4]=5 cells (4 PI)

 2873 00:40:32.367590  u1DelayCellOfst[5]=5 cells (4 PI)

 2874 00:40:32.370069  u1DelayCellOfst[6]=5 cells (4 PI)

 2875 00:40:32.373334  u1DelayCellOfst[7]=5 cells (4 PI)

 2876 00:40:32.377212  Byte0, DQ PI dly=992, DQM PI dly= 994

 2877 00:40:32.380694  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)

 2878 00:40:32.381095  

 2879 00:40:32.386911  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)

 2880 00:40:32.387308  

 2881 00:40:32.390074  u1DelayCellOfst[8]=3 cells (3 PI)

 2882 00:40:32.390472  u1DelayCellOfst[9]=3 cells (3 PI)

 2883 00:40:32.393073  u1DelayCellOfst[10]=6 cells (5 PI)

 2884 00:40:32.396509  u1DelayCellOfst[11]=6 cells (5 PI)

 2885 00:40:32.399955  u1DelayCellOfst[12]=7 cells (6 PI)

 2886 00:40:32.403265  u1DelayCellOfst[13]=7 cells (6 PI)

 2887 00:40:32.406458  u1DelayCellOfst[14]=6 cells (5 PI)

 2888 00:40:32.409494  u1DelayCellOfst[15]=0 cells (0 PI)

 2889 00:40:32.412830  Byte1, DQ PI dly=987, DQM PI dly= 990

 2890 00:40:32.419779  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)

 2891 00:40:32.420222  

 2892 00:40:32.422867  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)

 2893 00:40:32.423264  

 2894 00:40:32.426239  wait MRW command Rank0 MR14 =0x1c fired (1)

 2895 00:40:32.429671  Write Rank0 MR14 =0x1c

 2896 00:40:32.430065  

 2897 00:40:32.430374  Final TX Range 0 Vref 28

 2898 00:40:32.432796  

 2899 00:40:32.439380  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2900 00:40:32.439779  

 2901 00:40:32.445952  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2902 00:40:32.452406  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2903 00:40:32.459044  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2904 00:40:32.459547  Write Rank0 MR3 =0xb0

 2905 00:40:32.462126  DramC Write-DBI on

 2906 00:40:32.462531  ==

 2907 00:40:32.469015  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2908 00:40:32.471876  fsp= 1, odt_onoff= 1, Byte mode= 0

 2909 00:40:32.472270  ==

 2910 00:40:32.475152  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2911 00:40:32.475593  

 2912 00:40:32.478553  Begin, DQ Scan Range 710~774

 2913 00:40:32.479049  

 2914 00:40:32.479508  

 2915 00:40:32.479972  	TX Vref Scan disable

 2916 00:40:32.485114  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2917 00:40:32.488657  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2918 00:40:32.491639  712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 2919 00:40:32.495107  713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 2920 00:40:32.498915  714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]

 2921 00:40:32.501653  715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]

 2922 00:40:32.504600  716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]

 2923 00:40:32.507917  717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]

 2924 00:40:32.511105  718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]

 2925 00:40:32.515141  719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]

 2926 00:40:32.518147  720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]

 2927 00:40:32.521481  721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]

 2928 00:40:32.524591  722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]

 2929 00:40:32.528094  723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]

 2930 00:40:32.530862  724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]

 2931 00:40:32.537445  725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]

 2932 00:40:32.540828  726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]

 2933 00:40:32.544028  727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]

 2934 00:40:32.550998  747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]

 2935 00:40:32.554469  748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]

 2936 00:40:32.557301  749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]

 2937 00:40:32.561148  750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]

 2938 00:40:32.564538  751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]

 2939 00:40:32.567718  752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]

 2940 00:40:32.571286  753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]

 2941 00:40:32.573922  754 |2 6 50|[0] oooooooo xxxxxxxx [MSB]

 2942 00:40:32.577393  755 |2 6 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2943 00:40:32.580641  Byte0, DQ PI dly=741, DQM PI dly= 741

 2944 00:40:32.587249  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 37)

 2945 00:40:32.587694  

 2946 00:40:32.590619  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 37)

 2947 00:40:32.591021  

 2948 00:40:32.593747  Byte1, DQ PI dly=734, DQM PI dly= 734

 2949 00:40:32.596935  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)

 2950 00:40:32.597392  

 2951 00:40:32.603793  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)

 2952 00:40:32.604201  

 2953 00:40:32.610477  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2954 00:40:32.616548  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2955 00:40:32.623191  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2956 00:40:32.626371  Write Rank0 MR3 =0x30

 2957 00:40:32.626792  DramC Write-DBI off

 2958 00:40:32.627110  

 2959 00:40:32.627395  [DATLAT]

 2960 00:40:32.630141  Freq=1600, CH1 RK0, use_rxtx_scan=0

 2961 00:40:32.630711  

 2962 00:40:32.633248  DATLAT Default: 0xf

 2963 00:40:32.633789  7, 0xFFFF, sum=0

 2964 00:40:32.636780  8, 0xFFFF, sum=0

 2965 00:40:32.637172  9, 0xFFFF, sum=0

 2966 00:40:32.639463  10, 0xFFFF, sum=0

 2967 00:40:32.639858  11, 0xFFFF, sum=0

 2968 00:40:32.642913  12, 0xFFFF, sum=0

 2969 00:40:32.643308  13, 0xFFFF, sum=0

 2970 00:40:32.646244  14, 0x0, sum=1

 2971 00:40:32.646640  15, 0x0, sum=2

 2972 00:40:32.649529  16, 0x0, sum=3

 2973 00:40:32.649966  17, 0x0, sum=4

 2974 00:40:32.652689  pattern=2 first_step=14 total pass=5 best_step=16

 2975 00:40:32.656148  ==

 2976 00:40:32.659123  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2977 00:40:32.662406  fsp= 1, odt_onoff= 1, Byte mode= 0

 2978 00:40:32.662924  ==

 2979 00:40:32.666409  Start DQ dly to find pass range UseTestEngine =1

 2980 00:40:32.669211  x-axis: bit #, y-axis: DQ dly (-127~63)

 2981 00:40:32.672515  RX Vref Scan = 1

 2982 00:40:32.787206  

 2983 00:40:32.787799  RX Vref found, early break!

 2984 00:40:32.788272  

 2985 00:40:32.793924  Final RX Vref 11, apply to both rank0 and 1

 2986 00:40:32.794582  ==

 2987 00:40:32.797270  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2988 00:40:32.800483  fsp= 1, odt_onoff= 1, Byte mode= 0

 2989 00:40:32.800965  ==

 2990 00:40:32.803741  DQS Delay:

 2991 00:40:32.804149  DQS0 = 0, DQS1 = 0

 2992 00:40:32.804503  DQM Delay:

 2993 00:40:32.807114  DQM0 = 20, DQM1 = 19

 2994 00:40:32.807548  DQ Delay:

 2995 00:40:32.810315  DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16

 2996 00:40:32.813908  DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =22

 2997 00:40:32.817173  DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21

 2998 00:40:32.820521  DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =15

 2999 00:40:32.821050  

 3000 00:40:32.821517  

 3001 00:40:32.822008  

 3002 00:40:32.823344  [DramC_TX_OE_Calibration] TA2

 3003 00:40:32.826716  Original DQ_B0 (3 6) =30, OEN = 27

 3004 00:40:32.830089  Original DQ_B1 (3 6) =30, OEN = 27

 3005 00:40:32.833384  23, 0x0, End_B0=23 End_B1=23

 3006 00:40:32.836786  24, 0x0, End_B0=24 End_B1=24

 3007 00:40:32.837181  25, 0x0, End_B0=25 End_B1=25

 3008 00:40:32.839697  26, 0x0, End_B0=26 End_B1=26

 3009 00:40:32.842906  27, 0x0, End_B0=27 End_B1=27

 3010 00:40:32.846037  28, 0x0, End_B0=28 End_B1=28

 3011 00:40:32.849663  29, 0x0, End_B0=29 End_B1=29

 3012 00:40:32.850224  30, 0x0, End_B0=30 End_B1=30

 3013 00:40:32.853185  31, 0xFFFF, End_B0=30 End_B1=30

 3014 00:40:32.859731  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3015 00:40:32.865947  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3016 00:40:32.866490  

 3017 00:40:32.866945  

 3018 00:40:32.867336  Write Rank0 MR23 =0x3f

 3019 00:40:32.869264  [DQSOSC]

 3020 00:40:32.875944  [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps

 3021 00:40:32.882685  CH1_RK0: MR19=0x202, MR18=0xADAD, DQSOSC=459, MR23=63, INC=11, DEC=17

 3022 00:40:32.885403  Write Rank0 MR23 =0x3f

 3023 00:40:32.885913  [DQSOSC]

 3024 00:40:32.892254  [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps

 3025 00:40:32.895256  CH1 RK0: MR19=202, MR18=ADAD

 3026 00:40:32.899084  [RankSwap] Rank num 2, (Multi 1), Rank 1

 3027 00:40:32.902218  Write Rank0 MR2 =0xad

 3028 00:40:32.902687  [Write Leveling]

 3029 00:40:32.905433  delay  byte0  byte1  byte2  byte3

 3030 00:40:32.906003  

 3031 00:40:32.908640  10    0   0   

 3032 00:40:32.909037  11    0   0   

 3033 00:40:32.909400  12    0   0   

 3034 00:40:32.912062  13    0   0   

 3035 00:40:32.912590  14    0   0   

 3036 00:40:32.915537  15    0   0   

 3037 00:40:32.916109  16    0   0   

 3038 00:40:32.918114  17    0   0   

 3039 00:40:32.918509  18    0   0   

 3040 00:40:32.918821  19    0   0   

 3041 00:40:32.921666  20    0   0   

 3042 00:40:32.922062  21    0   0   

 3043 00:40:32.925148  22    0   0   

 3044 00:40:32.925543  23    0   0   

 3045 00:40:32.928558  24    0   0   

 3046 00:40:32.929038  25    0   0   

 3047 00:40:32.929360  26    0   0   

 3048 00:40:32.932211  27    0   0   

 3049 00:40:32.932656  28    0   ff   

 3050 00:40:32.935146  29    0   ff   

 3051 00:40:32.935542  30    0   ff   

 3052 00:40:32.937848  31    0   ff   

 3053 00:40:32.938245  32    0   ff   

 3054 00:40:32.938557  33    ff   ff   

 3055 00:40:32.941266  34    ff   ff   

 3056 00:40:32.941699  35    ff   ff   

 3057 00:40:32.944807  36    ff   ff   

 3058 00:40:32.945203  37    ff   ff   

 3059 00:40:32.948158  38    ff   ff   

 3060 00:40:32.948555  39    ff   ff   

 3061 00:40:32.954431  pass bytecount = 0xff (0xff: all bytes pass) 

 3062 00:40:32.954821  

 3063 00:40:32.955123  DQS0 dly: 33

 3064 00:40:32.955407  DQS1 dly: 28

 3065 00:40:32.958086  Write Rank0 MR2 =0x2d

 3066 00:40:32.961264  [RankSwap] Rank num 2, (Multi 1), Rank 0

 3067 00:40:32.964373  Write Rank1 MR1 =0xd6

 3068 00:40:32.964881  [Gating]

 3069 00:40:32.965316  ==

 3070 00:40:32.970923  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3071 00:40:32.971317  fsp= 1, odt_onoff= 1, Byte mode= 0

 3072 00:40:32.974121  ==

 3073 00:40:32.977642  3 1 0 |2c2b 3635  |(11 11)(11 11) |(1 1)(1 1)| 0

 3074 00:40:32.981027  3 1 4 |2c2b 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 3075 00:40:32.987064  3 1 8 |2c2b 3434  |(11 11)(11 11) |(1 1)(0 0)| 0

 3076 00:40:32.990657  3 1 12 |2c2b 3433  |(11 11)(11 11) |(0 0)(1 1)| 0

 3077 00:40:32.993667  3 1 16 |2c2b 3636  |(11 11)(0 0) |(1 0)(0 0)| 0

 3078 00:40:32.997229  3 1 20 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 3079 00:40:33.003422  3 1 24 |2c2b 3635  |(11 11)(11 11) |(1 0)(1 1)| 0

 3080 00:40:33.006706  3 1 28 |2c2b 3635  |(11 11)(11 11) |(1 0)(0 0)| 0

 3081 00:40:33.009986  3 2 0 |2c2b 2b2a  |(11 11)(11 11) |(1 0)(1 0)| 0

 3082 00:40:33.017019  3 2 4 |2c2b 2120  |(11 11)(11 11) |(1 0)(0 0)| 0

 3083 00:40:33.019778  3 2 8 |2c2b 1110  |(11 11)(11 11) |(1 0)(0 0)| 0

 3084 00:40:33.023530  3 2 12 |2c2b 3433  |(11 11)(11 11) |(1 0)(0 0)| 0

 3085 00:40:33.029992  3 2 16 |2c2c 3433  |(11 0)(11 11) |(0 0)(0 1)| 0

 3086 00:40:33.033594  3 2 20 |404 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 3087 00:40:33.036328  3 2 24 |3534 201  |(11 11)(11 11) |(0 0)(0 1)| 0

 3088 00:40:33.042976  3 2 28 |3534 3d3d  |(11 11)(10 10) |(0 0)(1 1)| 0

 3089 00:40:33.046331  3 3 0 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3090 00:40:33.049478  3 3 4 |3534 3d3d  |(11 11)(10 10) |(0 0)(1 1)| 0

 3091 00:40:33.055819  3 3 8 |3534 908  |(11 11)(11 11) |(0 0)(1 1)| 0

 3092 00:40:33.059397  [Byte 1] Lead/lag Transition tap number (1)

 3093 00:40:33.062800  3 3 12 |3534 3d3c  |(11 11)(11 11) |(0 0)(0 0)| 0

 3094 00:40:33.065915  3 3 16 |3534 3c3b  |(11 11)(11 11) |(1 1)(1 1)| 0

 3095 00:40:33.072317  3 3 20 |3534 3c3c  |(11 11)(0 0) |(1 1)(1 1)| 0

 3096 00:40:33.075675  [Byte 0] Lead/lag Transition tap number (1)

 3097 00:40:33.079430  3 3 24 |3534 3d3c  |(11 11)(11 11) |(0 0)(1 1)| 0

 3098 00:40:33.085606  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

 3099 00:40:33.088875  3 4 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 3100 00:40:33.092125  3 4 4 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 3101 00:40:33.098545  3 4 8 |3534 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 3102 00:40:33.102049  3 4 12 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 3103 00:40:33.105330  3 4 16 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 3104 00:40:33.111826  3 4 20 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3105 00:40:33.115235  3 4 24 |3d3d b0a  |(11 11)(11 11) |(1 1)(1 1)| 0

 3106 00:40:33.118672  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3107 00:40:33.124683  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3108 00:40:33.128350  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3109 00:40:33.131532  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3110 00:40:33.138163  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3111 00:40:33.140737  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3112 00:40:33.144189  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3113 00:40:33.150558  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3114 00:40:33.153888  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3115 00:40:33.157758  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3116 00:40:33.161003  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3117 00:40:33.167616  3 6 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3118 00:40:33.171052  [Byte 0] Lead/lag falling Transition (3, 6, 8)

 3119 00:40:33.174194  3 6 12 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 3120 00:40:33.181143  [Byte 0] Lead/lag Transition tap number (2)

 3121 00:40:33.184385  [Byte 1] Lead/lag falling Transition (3, 6, 12)

 3122 00:40:33.187807  3 6 16 |3d3d 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 3123 00:40:33.194150  3 6 20 |1918 3e3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 3124 00:40:33.197315  [Byte 1] Lead/lag Transition tap number (3)

 3125 00:40:33.201175  3 6 24 |4646 403  |(0 0)(11 11) |(0 0)(0 0)| 0

 3126 00:40:33.203584  [Byte 0]First pass (3, 6, 24)

 3127 00:40:33.207400  3 6 28 |4646 1c1c  |(0 0)(11 11) |(0 0)(0 0)| 0

 3128 00:40:33.210202  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3129 00:40:33.213672  [Byte 1]First pass (3, 7, 0)

 3130 00:40:33.217063  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3131 00:40:33.223482  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3132 00:40:33.226506  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3133 00:40:33.229791  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3134 00:40:33.233234  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3135 00:40:33.236076  3 7 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3136 00:40:33.242874  3 7 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3137 00:40:33.246488  4 0 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3138 00:40:33.249207  All bytes gating window > 1UI, Early break!

 3139 00:40:33.249648  

 3140 00:40:33.252614  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)

 3141 00:40:33.253026  

 3142 00:40:33.256174  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)

 3143 00:40:33.256629  

 3144 00:40:33.259336  

 3145 00:40:33.259798  

 3146 00:40:33.262963  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)

 3147 00:40:33.263324  

 3148 00:40:33.266007  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)

 3149 00:40:33.266401  

 3150 00:40:33.266706  

 3151 00:40:33.269860  Write Rank1 MR1 =0x56

 3152 00:40:33.270254  

 3153 00:40:33.272770  best RODT dly(2T, 0.5T) = (2, 3)

 3154 00:40:33.273244  

 3155 00:40:33.276001  best RODT dly(2T, 0.5T) = (2, 3)

 3156 00:40:33.276413  ==

 3157 00:40:33.279308  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3158 00:40:33.282880  fsp= 1, odt_onoff= 1, Byte mode= 0

 3159 00:40:33.283291  ==

 3160 00:40:33.289067  Start DQ dly to find pass range UseTestEngine =0

 3161 00:40:33.292138  x-axis: bit #, y-axis: DQ dly (-127~63)

 3162 00:40:33.292606  RX Vref Scan = 0

 3163 00:40:33.295351  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3164 00:40:33.299061  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3165 00:40:33.302433  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3166 00:40:33.305652  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3167 00:40:33.309131  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3168 00:40:33.309532  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3169 00:40:33.311703  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3170 00:40:33.315063  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3171 00:40:33.318352  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3172 00:40:33.321896  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3173 00:40:33.325410  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3174 00:40:33.328949  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3175 00:40:33.331700  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3176 00:40:33.335189  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3177 00:40:33.335741  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3178 00:40:33.338166  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3179 00:40:33.341646  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3180 00:40:33.344647  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3181 00:40:33.348694  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3182 00:40:33.351396  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3183 00:40:33.354995  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3184 00:40:33.357872  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3185 00:40:33.358334  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3186 00:40:33.361259  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3187 00:40:33.364699  -2, [0] xxxxxxxx xxxxxxxx [MSB]

 3188 00:40:33.367706  -1, [0] xxxxxxxx xxxxxxxo [MSB]

 3189 00:40:33.370728  0, [0] xxxoxxxx xxxxxxxo [MSB]

 3190 00:40:33.373996  1, [0] xxxoxxxx xxxxxxxo [MSB]

 3191 00:40:33.377462  2, [0] xxooxxxx ooxxxxxo [MSB]

 3192 00:40:33.378046  3, [0] xoooxxxo ooxxxxxo [MSB]

 3193 00:40:33.380545  4, [0] xoooxxxo oooxxxxo [MSB]

 3194 00:40:33.383850  5, [0] xooooxxo oooxxxxo [MSB]

 3195 00:40:33.387517  6, [0] xooooxoo oooxxxxo [MSB]

 3196 00:40:33.390918  32, [0] oooxoooo ooooooox [MSB]

 3197 00:40:33.393976  33, [0] oooxoooo ooooooox [MSB]

 3198 00:40:33.397179  34, [0] oooxoooo xoooooox [MSB]

 3199 00:40:33.397616  35, [0] ooxxoooo xoooooox [MSB]

 3200 00:40:33.400866  36, [0] ooxxoooo xxooooox [MSB]

 3201 00:40:33.403900  37, [0] ooxxoooo xxooooox [MSB]

 3202 00:40:33.407372  38, [0] xxxxooox xxooxoox [MSB]

 3203 00:40:33.410542  39, [0] xxxxxoox xxxoxoox [MSB]

 3204 00:40:33.414039  40, [0] xxxxxoox xxxoxxox [MSB]

 3205 00:40:33.416870  41, [0] xxxxxxxx xxxxxxxx [MSB]

 3206 00:40:33.420030  iDelay=41, Bit 0, Center 22 (7 ~ 37) 31

 3207 00:40:33.423789  iDelay=41, Bit 1, Center 20 (3 ~ 37) 35

 3208 00:40:33.426449  iDelay=41, Bit 2, Center 18 (2 ~ 34) 33

 3209 00:40:33.430112  iDelay=41, Bit 3, Center 15 (0 ~ 31) 32

 3210 00:40:33.433048  iDelay=41, Bit 4, Center 21 (5 ~ 38) 34

 3211 00:40:33.436839  iDelay=41, Bit 5, Center 23 (7 ~ 40) 34

 3212 00:40:33.440491  iDelay=41, Bit 6, Center 23 (6 ~ 40) 35

 3213 00:40:33.443350  iDelay=41, Bit 7, Center 20 (3 ~ 37) 35

 3214 00:40:33.446464  iDelay=41, Bit 8, Center 17 (2 ~ 33) 32

 3215 00:40:33.450004  iDelay=41, Bit 9, Center 18 (2 ~ 35) 34

 3216 00:40:33.456248  iDelay=41, Bit 10, Center 21 (4 ~ 38) 35

 3217 00:40:33.459448  iDelay=41, Bit 11, Center 23 (7 ~ 40) 34

 3218 00:40:33.462892  iDelay=41, Bit 12, Center 22 (7 ~ 37) 31

 3219 00:40:33.465741  iDelay=41, Bit 13, Center 23 (7 ~ 39) 33

 3220 00:40:33.469173  iDelay=41, Bit 14, Center 23 (7 ~ 40) 34

 3221 00:40:33.472920  iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33

 3222 00:40:33.473340  ==

 3223 00:40:33.479248  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3224 00:40:33.482521  fsp= 1, odt_onoff= 1, Byte mode= 0

 3225 00:40:33.483051  ==

 3226 00:40:33.483376  DQS Delay:

 3227 00:40:33.485939  DQS0 = 0, DQS1 = 0

 3228 00:40:33.486335  DQM Delay:

 3229 00:40:33.486683  DQM0 = 20, DQM1 = 20

 3230 00:40:33.489047  DQ Delay:

 3231 00:40:33.492241  DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =15

 3232 00:40:33.495492  DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20

 3233 00:40:33.498854  DQ8 =17, DQ9 =18, DQ10 =21, DQ11 =23

 3234 00:40:33.502377  DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =15

 3235 00:40:33.502845  

 3236 00:40:33.503191  

 3237 00:40:33.503520  DramC Write-DBI off

 3238 00:40:33.503897  ==

 3239 00:40:33.508869  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3240 00:40:33.512117  fsp= 1, odt_onoff= 1, Byte mode= 0

 3241 00:40:33.512524  ==

 3242 00:40:33.515518  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 3243 00:40:33.515998  

 3244 00:40:33.518831  Begin, DQ Scan Range 924~1180

 3245 00:40:33.519326  

 3246 00:40:33.519735  

 3247 00:40:33.522080  	TX Vref Scan disable

 3248 00:40:33.524953  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 3249 00:40:33.528370  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 3250 00:40:33.531833  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 3251 00:40:33.534688  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 3252 00:40:33.538239  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 3253 00:40:33.541308  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 3254 00:40:33.545009  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 3255 00:40:33.548283  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 3256 00:40:33.554723  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 3257 00:40:33.557689  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 3258 00:40:33.560974  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3259 00:40:33.564366  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3260 00:40:33.567835  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3261 00:40:33.571184  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3262 00:40:33.574736  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 3263 00:40:33.577742  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3264 00:40:33.581061  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3265 00:40:33.584527  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 3266 00:40:33.587595  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 3267 00:40:33.590700  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3268 00:40:33.597248  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3269 00:40:33.600756  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 3270 00:40:33.603478  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 3271 00:40:33.607158  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 3272 00:40:33.610377  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 3273 00:40:33.613939  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 3274 00:40:33.616686  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 3275 00:40:33.619799  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 3276 00:40:33.623773  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 3277 00:40:33.626513  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 3278 00:40:33.629654  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3279 00:40:33.633150  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3280 00:40:33.636573  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3281 00:40:33.643106  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3282 00:40:33.646306  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3283 00:40:33.649439  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3284 00:40:33.653240  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3285 00:40:33.656522  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3286 00:40:33.659188  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3287 00:40:33.662698  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3288 00:40:33.666269  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3289 00:40:33.668941  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3290 00:40:33.672433  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3291 00:40:33.676068  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 3292 00:40:33.679271  968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 3293 00:40:33.682362  969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 3294 00:40:33.685755  970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]

 3295 00:40:33.689235  971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]

 3296 00:40:33.692835  972 |3 6 12|[0] xxxxxxxx oxxxxxxo [MSB]

 3297 00:40:33.698790  973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]

 3298 00:40:33.702272  974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]

 3299 00:40:33.705592  975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]

 3300 00:40:33.708930  976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]

 3301 00:40:33.711629  977 |3 6 17|[0] xxxxxxxx oooooxoo [MSB]

 3302 00:40:33.715126  978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]

 3303 00:40:33.718382  979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]

 3304 00:40:33.721511  980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]

 3305 00:40:33.724630  981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]

 3306 00:40:33.728394  982 |3 6 22|[0] xxxxxxxo oooooooo [MSB]

 3307 00:40:33.731627  983 |3 6 23|[0] xooooooo oooooooo [MSB]

 3308 00:40:33.738752  992 |3 6 32|[0] oooooooo ooooooox [MSB]

 3309 00:40:33.741710  993 |3 6 33|[0] oooooooo oxooooox [MSB]

 3310 00:40:33.744907  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 3311 00:40:33.748424  995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]

 3312 00:40:33.751887  996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]

 3313 00:40:33.755365  997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]

 3314 00:40:33.757832  998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]

 3315 00:40:33.761605  999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]

 3316 00:40:33.764357  1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]

 3317 00:40:33.767798  1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]

 3318 00:40:33.771341  1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]

 3319 00:40:33.777580  1003 |3 6 43|[0] ooxxxoxx xxxxxxxx [MSB]

 3320 00:40:33.781124  1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3321 00:40:33.784398  Byte0, DQ PI dly=991, DQM PI dly= 991

 3322 00:40:33.788041  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)

 3323 00:40:33.788212  

 3324 00:40:33.790770  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)

 3325 00:40:33.790940  

 3326 00:40:33.794235  Byte1, DQ PI dly=983, DQM PI dly= 983

 3327 00:40:33.800383  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)

 3328 00:40:33.800552  

 3329 00:40:33.803891  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)

 3330 00:40:33.804057  

 3331 00:40:33.804185  ==

 3332 00:40:33.810447  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3333 00:40:33.813740  fsp= 1, odt_onoff= 1, Byte mode= 0

 3334 00:40:33.813915  ==

 3335 00:40:33.817239  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 3336 00:40:33.817664  

 3337 00:40:33.820335  Begin, DQ Scan Range 959~1023

 3338 00:40:33.823631  Write Rank1 MR14 =0x0

 3339 00:40:33.830775  

 3340 00:40:33.831168  	CH=1, VrefRange= 0, VrefLevel = 0

 3341 00:40:33.836829  TX Bit0 (985~998) 14 991,   Bit8 (976~989) 14 982,

 3342 00:40:33.840859  TX Bit1 (984~997) 14 990,   Bit9 (977~986) 10 981,

 3343 00:40:33.847309  TX Bit2 (983~996) 14 989,   Bit10 (979~992) 14 985,

 3344 00:40:33.850439  TX Bit3 (979~992) 14 985,   Bit11 (979~992) 14 985,

 3345 00:40:33.853884  TX Bit4 (983~998) 16 990,   Bit12 (979~992) 14 985,

 3346 00:40:33.860480  TX Bit5 (985~998) 14 991,   Bit13 (980~993) 14 986,

 3347 00:40:33.863736  TX Bit6 (984~998) 15 991,   Bit14 (979~992) 14 985,

 3348 00:40:33.870316  TX Bit7 (984~998) 15 991,   Bit15 (973~984) 12 978,

 3349 00:40:33.870731  

 3350 00:40:33.871093  Write Rank1 MR14 =0x2

 3351 00:40:33.879458  

 3352 00:40:33.879842  	CH=1, VrefRange= 0, VrefLevel = 2

 3353 00:40:33.885370  TX Bit0 (985~999) 15 992,   Bit8 (976~990) 15 983,

 3354 00:40:33.888749  TX Bit1 (984~998) 15 991,   Bit9 (976~987) 12 981,

 3355 00:40:33.895148  TX Bit2 (983~997) 15 990,   Bit10 (978~992) 15 985,

 3356 00:40:33.898420  TX Bit3 (979~994) 16 986,   Bit11 (979~993) 15 986,

 3357 00:40:33.901878  TX Bit4 (983~998) 16 990,   Bit12 (978~992) 15 985,

 3358 00:40:33.908903  TX Bit5 (985~998) 14 991,   Bit13 (979~993) 15 986,

 3359 00:40:33.911697  TX Bit6 (984~999) 16 991,   Bit14 (979~992) 14 985,

 3360 00:40:33.918180  TX Bit7 (984~998) 15 991,   Bit15 (972~985) 14 978,

 3361 00:40:33.918630  

 3362 00:40:33.919113  Write Rank1 MR14 =0x4

 3363 00:40:33.927251  

 3364 00:40:33.927681  	CH=1, VrefRange= 0, VrefLevel = 4

 3365 00:40:33.933687  TX Bit0 (985~999) 15 992,   Bit8 (976~990) 15 983,

 3366 00:40:33.937196  TX Bit1 (983~999) 17 991,   Bit9 (976~988) 13 982,

 3367 00:40:33.943293  TX Bit2 (981~998) 18 989,   Bit10 (978~993) 16 985,

 3368 00:40:33.946892  TX Bit3 (979~994) 16 986,   Bit11 (979~993) 15 986,

 3369 00:40:33.949939  TX Bit4 (983~999) 17 991,   Bit12 (979~993) 15 986,

 3370 00:40:33.956881  TX Bit5 (985~999) 15 992,   Bit13 (979~994) 16 986,

 3371 00:40:33.960173  TX Bit6 (983~999) 17 991,   Bit14 (979~993) 15 986,

 3372 00:40:33.966571  TX Bit7 (984~999) 16 991,   Bit15 (972~985) 14 978,

 3373 00:40:33.966953  

 3374 00:40:33.967250  Write Rank1 MR14 =0x6

 3375 00:40:33.975618  

 3376 00:40:33.976029  	CH=1, VrefRange= 0, VrefLevel = 6

 3377 00:40:33.982243  TX Bit0 (984~1000) 17 992,   Bit8 (974~991) 18 982,

 3378 00:40:33.985529  TX Bit1 (983~999) 17 991,   Bit9 (976~989) 14 982,

 3379 00:40:33.992396  TX Bit2 (982~998) 17 990,   Bit10 (978~993) 16 985,

 3380 00:40:33.994979  TX Bit3 (978~995) 18 986,   Bit11 (979~993) 15 986,

 3381 00:40:33.998358  TX Bit4 (983~999) 17 991,   Bit12 (978~993) 16 985,

 3382 00:40:34.004970  TX Bit5 (984~1000) 17 992,   Bit13 (979~994) 16 986,

 3383 00:40:34.008241  TX Bit6 (983~999) 17 991,   Bit14 (978~993) 16 985,

 3384 00:40:34.015082  TX Bit7 (984~999) 16 991,   Bit15 (972~986) 15 979,

 3385 00:40:34.015540  

 3386 00:40:34.015851  Write Rank1 MR14 =0x8

 3387 00:40:34.024252  

 3388 00:40:34.024712  	CH=1, VrefRange= 0, VrefLevel = 8

 3389 00:40:34.031167  TX Bit0 (984~1001) 18 992,   Bit8 (974~992) 19 983,

 3390 00:40:34.034254  TX Bit1 (983~1000) 18 991,   Bit9 (974~989) 16 981,

 3391 00:40:34.041053  TX Bit2 (980~998) 19 989,   Bit10 (977~994) 18 985,

 3392 00:40:34.044823  TX Bit3 (978~996) 19 987,   Bit11 (978~994) 17 986,

 3393 00:40:34.047288  TX Bit4 (982~1000) 19 991,   Bit12 (978~993) 16 985,

 3394 00:40:34.054265  TX Bit5 (984~1000) 17 992,   Bit13 (978~995) 18 986,

 3395 00:40:34.057422  TX Bit6 (983~1000) 18 991,   Bit14 (978~994) 17 986,

 3396 00:40:34.063847  TX Bit7 (983~1000) 18 991,   Bit15 (971~987) 17 979,

 3397 00:40:34.064240  

 3398 00:40:34.064544  Write Rank1 MR14 =0xa

 3399 00:40:34.073942  

 3400 00:40:34.077297  	CH=1, VrefRange= 0, VrefLevel = 10

 3401 00:40:34.080000  TX Bit0 (984~1001) 18 992,   Bit8 (973~992) 20 982,

 3402 00:40:34.083654  TX Bit1 (983~1001) 19 992,   Bit9 (974~990) 17 982,

 3403 00:40:34.089695  TX Bit2 (980~999) 20 989,   Bit10 (977~994) 18 985,

 3404 00:40:34.093303  TX Bit3 (978~997) 20 987,   Bit11 (978~995) 18 986,

 3405 00:40:34.100116  TX Bit4 (982~1000) 19 991,   Bit12 (978~994) 17 986,

 3406 00:40:34.102876  TX Bit5 (984~1001) 18 992,   Bit13 (978~996) 19 987,

 3407 00:40:34.106379  TX Bit6 (983~1000) 18 991,   Bit14 (978~994) 17 986,

 3408 00:40:34.112581  TX Bit7 (984~1000) 17 992,   Bit15 (971~988) 18 979,

 3409 00:40:34.113028  

 3410 00:40:34.113342  Write Rank1 MR14 =0xc

 3411 00:40:34.123129  

 3412 00:40:34.126429  	CH=1, VrefRange= 0, VrefLevel = 12

 3413 00:40:34.129437  TX Bit0 (984~1002) 19 993,   Bit8 (973~993) 21 983,

 3414 00:40:34.133108  TX Bit1 (982~1001) 20 991,   Bit9 (974~991) 18 982,

 3415 00:40:34.139671  TX Bit2 (980~999) 20 989,   Bit10 (976~995) 20 985,

 3416 00:40:34.142504  TX Bit3 (977~997) 21 987,   Bit11 (977~995) 19 986,

 3417 00:40:34.149255  TX Bit4 (982~1001) 20 991,   Bit12 (978~994) 17 986,

 3418 00:40:34.152842  TX Bit5 (984~1001) 18 992,   Bit13 (978~996) 19 987,

 3419 00:40:34.155709  TX Bit6 (983~1001) 19 992,   Bit14 (977~994) 18 985,

 3420 00:40:34.162029  TX Bit7 (982~1001) 20 991,   Bit15 (971~988) 18 979,

 3421 00:40:34.162495  

 3422 00:40:34.162804  Write Rank1 MR14 =0xe

 3423 00:40:34.172107  

 3424 00:40:34.175376  	CH=1, VrefRange= 0, VrefLevel = 14

 3425 00:40:34.179196  TX Bit0 (984~1002) 19 993,   Bit8 (973~993) 21 983,

 3426 00:40:34.182078  TX Bit1 (982~1002) 21 992,   Bit9 (973~991) 19 982,

 3427 00:40:34.188621  TX Bit2 (979~1000) 22 989,   Bit10 (976~995) 20 985,

 3428 00:40:34.191657  TX Bit3 (977~998) 22 987,   Bit11 (977~996) 20 986,

 3429 00:40:34.198317  TX Bit4 (982~1002) 21 992,   Bit12 (977~995) 19 986,

 3430 00:40:34.201729  TX Bit5 (984~1002) 19 993,   Bit13 (977~997) 21 987,

 3431 00:40:34.204897  TX Bit6 (982~1001) 20 991,   Bit14 (977~995) 19 986,

 3432 00:40:34.211850  TX Bit7 (983~1001) 19 992,   Bit15 (971~989) 19 980,

 3433 00:40:34.212191  

 3434 00:40:34.212416  Write Rank1 MR14 =0x10

 3435 00:40:34.221993  

 3436 00:40:34.225271  	CH=1, VrefRange= 0, VrefLevel = 16

 3437 00:40:34.228519  TX Bit0 (984~1003) 20 993,   Bit8 (973~993) 21 983,

 3438 00:40:34.231719  TX Bit1 (981~1003) 23 992,   Bit9 (973~992) 20 982,

 3439 00:40:34.238752  TX Bit2 (979~1000) 22 989,   Bit10 (976~996) 21 986,

 3440 00:40:34.241845  TX Bit3 (977~998) 22 987,   Bit11 (976~996) 21 986,

 3441 00:40:34.248501  TX Bit4 (982~1002) 21 992,   Bit12 (977~995) 19 986,

 3442 00:40:34.252072  TX Bit5 (983~1003) 21 993,   Bit13 (977~997) 21 987,

 3443 00:40:34.255260  TX Bit6 (981~1002) 22 991,   Bit14 (977~995) 19 986,

 3444 00:40:34.261700  TX Bit7 (982~1002) 21 992,   Bit15 (971~991) 21 981,

 3445 00:40:34.262068  

 3446 00:40:34.262349  Write Rank1 MR14 =0x12

 3447 00:40:34.272089  

 3448 00:40:34.275619  	CH=1, VrefRange= 0, VrefLevel = 18

 3449 00:40:34.278474  TX Bit0 (984~1004) 21 994,   Bit8 (972~994) 23 983,

 3450 00:40:34.281843  TX Bit1 (981~1004) 24 992,   Bit9 (972~992) 21 982,

 3451 00:40:34.288079  TX Bit2 (979~1001) 23 990,   Bit10 (976~997) 22 986,

 3452 00:40:34.291961  TX Bit3 (977~998) 22 987,   Bit11 (976~997) 22 986,

 3453 00:40:34.298002  TX Bit4 (981~1003) 23 992,   Bit12 (977~996) 20 986,

 3454 00:40:34.301698  TX Bit5 (983~1004) 22 993,   Bit13 (977~998) 22 987,

 3455 00:40:34.304829  TX Bit6 (981~1003) 23 992,   Bit14 (977~997) 21 987,

 3456 00:40:34.311102  TX Bit7 (982~1003) 22 992,   Bit15 (970~991) 22 980,

 3457 00:40:34.311514  

 3458 00:40:34.311811  Write Rank1 MR14 =0x14

 3459 00:40:34.321694  

 3460 00:40:34.325183  	CH=1, VrefRange= 0, VrefLevel = 20

 3461 00:40:34.328503  TX Bit0 (983~1005) 23 994,   Bit8 (972~994) 23 983,

 3462 00:40:34.331850  TX Bit1 (982~1003) 22 992,   Bit9 (972~993) 22 982,

 3463 00:40:34.338586  TX Bit2 (979~1001) 23 990,   Bit10 (975~998) 24 986,

 3464 00:40:34.341894  TX Bit3 (977~999) 23 988,   Bit11 (976~998) 23 987,

 3465 00:40:34.348389  TX Bit4 (981~1004) 24 992,   Bit12 (976~997) 22 986,

 3466 00:40:34.351362  TX Bit5 (983~1004) 22 993,   Bit13 (977~999) 23 988,

 3467 00:40:34.354720  TX Bit6 (981~1003) 23 992,   Bit14 (977~997) 21 987,

 3468 00:40:34.361676  TX Bit7 (981~1004) 24 992,   Bit15 (970~992) 23 981,

 3469 00:40:34.362034  

 3470 00:40:34.362314  Write Rank1 MR14 =0x16

 3471 00:40:34.371980  

 3472 00:40:34.375556  	CH=1, VrefRange= 0, VrefLevel = 22

 3473 00:40:34.379121  TX Bit0 (983~1005) 23 994,   Bit8 (971~995) 25 983,

 3474 00:40:34.382398  TX Bit1 (981~1004) 24 992,   Bit9 (972~993) 22 982,

 3475 00:40:34.389198  TX Bit2 (978~1002) 25 990,   Bit10 (975~998) 24 986,

 3476 00:40:34.391752  TX Bit3 (977~999) 23 988,   Bit11 (975~999) 25 987,

 3477 00:40:34.395046  TX Bit4 (980~1004) 25 992,   Bit12 (976~998) 23 987,

 3478 00:40:34.401542  TX Bit5 (982~1005) 24 993,   Bit13 (977~999) 23 988,

 3479 00:40:34.404727  TX Bit6 (980~1004) 25 992,   Bit14 (976~998) 23 987,

 3480 00:40:34.411150  TX Bit7 (981~1004) 24 992,   Bit15 (970~992) 23 981,

 3481 00:40:34.411611  

 3482 00:40:34.412031  Write Rank1 MR14 =0x18

 3483 00:40:34.422660  

 3484 00:40:34.425772  	CH=1, VrefRange= 0, VrefLevel = 24

 3485 00:40:34.428775  TX Bit0 (983~1006) 24 994,   Bit8 (971~995) 25 983,

 3486 00:40:34.432412  TX Bit1 (980~1005) 26 992,   Bit9 (972~993) 22 982,

 3487 00:40:34.438797  TX Bit2 (978~1002) 25 990,   Bit10 (974~999) 26 986,

 3488 00:40:34.442063  TX Bit3 (977~999) 23 988,   Bit11 (975~999) 25 987,

 3489 00:40:34.448730  TX Bit4 (981~1005) 25 993,   Bit12 (975~999) 25 987,

 3490 00:40:34.451970  TX Bit5 (982~1005) 24 993,   Bit13 (976~999) 24 987,

 3491 00:40:34.455083  TX Bit6 (980~1004) 25 992,   Bit14 (975~998) 24 986,

 3492 00:40:34.461359  TX Bit7 (981~1005) 25 993,   Bit15 (970~992) 23 981,

 3493 00:40:34.461784  

 3494 00:40:34.462224  Write Rank1 MR14 =0x1a

 3495 00:40:34.472611  

 3496 00:40:34.475992  	CH=1, VrefRange= 0, VrefLevel = 26

 3497 00:40:34.478766  TX Bit0 (982~1006) 25 994,   Bit8 (971~996) 26 983,

 3498 00:40:34.482205  TX Bit1 (980~1005) 26 992,   Bit9 (972~993) 22 982,

 3499 00:40:34.488999  TX Bit2 (978~1003) 26 990,   Bit10 (974~999) 26 986,

 3500 00:40:34.492492  TX Bit3 (976~1000) 25 988,   Bit11 (974~1000) 27 987,

 3501 00:40:34.498751  TX Bit4 (979~1005) 27 992,   Bit12 (975~999) 25 987,

 3502 00:40:34.501967  TX Bit5 (982~1005) 24 993,   Bit13 (976~1000) 25 988,

 3503 00:40:34.505480  TX Bit6 (979~1005) 27 992,   Bit14 (975~999) 25 987,

 3504 00:40:34.511571  TX Bit7 (981~1005) 25 993,   Bit15 (969~993) 25 981,

 3505 00:40:34.512023  

 3506 00:40:34.514846  Write Rank1 MR14 =0x1c

 3507 00:40:34.523138  

 3508 00:40:34.525890  	CH=1, VrefRange= 0, VrefLevel = 28

 3509 00:40:34.529397  TX Bit0 (982~1006) 25 994,   Bit8 (971~996) 26 983,

 3510 00:40:34.532900  TX Bit1 (979~1005) 27 992,   Bit9 (971~994) 24 982,

 3511 00:40:34.539760  TX Bit2 (978~1004) 27 991,   Bit10 (973~999) 27 986,

 3512 00:40:34.542656  TX Bit3 (976~1000) 25 988,   Bit11 (974~999) 26 986,

 3513 00:40:34.549393  TX Bit4 (979~1006) 28 992,   Bit12 (974~999) 26 986,

 3514 00:40:34.552386  TX Bit5 (982~1006) 25 994,   Bit13 (976~1000) 25 988,

 3515 00:40:34.556092  TX Bit6 (980~1005) 26 992,   Bit14 (974~999) 26 986,

 3516 00:40:34.562484  TX Bit7 (980~1005) 26 992,   Bit15 (969~993) 25 981,

 3517 00:40:34.562844  

 3518 00:40:34.565610  Write Rank1 MR14 =0x1e

 3519 00:40:34.573333  

 3520 00:40:34.576435  	CH=1, VrefRange= 0, VrefLevel = 30

 3521 00:40:34.579546  TX Bit0 (982~1006) 25 994,   Bit8 (971~996) 26 983,

 3522 00:40:34.583265  TX Bit1 (979~1005) 27 992,   Bit9 (971~994) 24 982,

 3523 00:40:34.589765  TX Bit2 (978~1004) 27 991,   Bit10 (973~999) 27 986,

 3524 00:40:34.592751  TX Bit3 (976~1000) 25 988,   Bit11 (974~999) 26 986,

 3525 00:40:34.599502  TX Bit4 (979~1006) 28 992,   Bit12 (974~999) 26 986,

 3526 00:40:34.602555  TX Bit5 (982~1006) 25 994,   Bit13 (976~1000) 25 988,

 3527 00:40:34.606358  TX Bit6 (980~1005) 26 992,   Bit14 (974~999) 26 986,

 3528 00:40:34.613107  TX Bit7 (980~1005) 26 992,   Bit15 (969~993) 25 981,

 3529 00:40:34.613631  

 3530 00:40:34.615647  Write Rank1 MR14 =0x20

 3531 00:40:34.623966  

 3532 00:40:34.627442  	CH=1, VrefRange= 0, VrefLevel = 32

 3533 00:40:34.630987  TX Bit0 (982~1006) 25 994,   Bit8 (971~996) 26 983,

 3534 00:40:34.633799  TX Bit1 (979~1005) 27 992,   Bit9 (971~994) 24 982,

 3535 00:40:34.640255  TX Bit2 (978~1004) 27 991,   Bit10 (973~999) 27 986,

 3536 00:40:34.643410  TX Bit3 (976~1000) 25 988,   Bit11 (974~999) 26 986,

 3537 00:40:34.649790  TX Bit4 (979~1006) 28 992,   Bit12 (974~999) 26 986,

 3538 00:40:34.653512  TX Bit5 (982~1006) 25 994,   Bit13 (976~1000) 25 988,

 3539 00:40:34.656611  TX Bit6 (980~1005) 26 992,   Bit14 (974~999) 26 986,

 3540 00:40:34.662804  TX Bit7 (980~1005) 26 992,   Bit15 (969~993) 25 981,

 3541 00:40:34.663272  

 3542 00:40:34.665949  Write Rank1 MR14 =0x22

 3543 00:40:34.674669  

 3544 00:40:34.677513  	CH=1, VrefRange= 0, VrefLevel = 34

 3545 00:40:34.680909  TX Bit0 (982~1006) 25 994,   Bit8 (971~996) 26 983,

 3546 00:40:34.684531  TX Bit1 (979~1005) 27 992,   Bit9 (971~994) 24 982,

 3547 00:40:34.690914  TX Bit2 (978~1004) 27 991,   Bit10 (973~999) 27 986,

 3548 00:40:34.694053  TX Bit3 (976~1000) 25 988,   Bit11 (974~999) 26 986,

 3549 00:40:34.700962  TX Bit4 (979~1006) 28 992,   Bit12 (974~999) 26 986,

 3550 00:40:34.704061  TX Bit5 (982~1006) 25 994,   Bit13 (976~1000) 25 988,

 3551 00:40:34.706969  TX Bit6 (980~1005) 26 992,   Bit14 (974~999) 26 986,

 3552 00:40:34.713523  TX Bit7 (980~1005) 26 992,   Bit15 (969~993) 25 981,

 3553 00:40:34.714114  

 3554 00:40:34.717009  Write Rank1 MR14 =0x24

 3555 00:40:34.725131  

 3556 00:40:34.728432  	CH=1, VrefRange= 0, VrefLevel = 36

 3557 00:40:34.731497  TX Bit0 (982~1006) 25 994,   Bit8 (971~996) 26 983,

 3558 00:40:34.734676  TX Bit1 (979~1005) 27 992,   Bit9 (971~994) 24 982,

 3559 00:40:34.741165  TX Bit2 (978~1004) 27 991,   Bit10 (973~999) 27 986,

 3560 00:40:34.744625  TX Bit3 (976~1000) 25 988,   Bit11 (974~999) 26 986,

 3561 00:40:34.751269  TX Bit4 (979~1006) 28 992,   Bit12 (974~999) 26 986,

 3562 00:40:34.754558  TX Bit5 (982~1006) 25 994,   Bit13 (976~1000) 25 988,

 3563 00:40:34.757278  TX Bit6 (980~1005) 26 992,   Bit14 (974~999) 26 986,

 3564 00:40:34.764014  TX Bit7 (980~1005) 26 992,   Bit15 (969~993) 25 981,

 3565 00:40:34.764166  

 3566 00:40:34.764251  

 3567 00:40:34.766968  TX Vref found, early break! 391< 393

 3568 00:40:34.770602  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps

 3569 00:40:34.773849  u1DelayCellOfst[0]=7 cells (6 PI)

 3570 00:40:34.777205  u1DelayCellOfst[1]=5 cells (4 PI)

 3571 00:40:34.780460  u1DelayCellOfst[2]=3 cells (3 PI)

 3572 00:40:34.783741  u1DelayCellOfst[3]=0 cells (0 PI)

 3573 00:40:34.786908  u1DelayCellOfst[4]=5 cells (4 PI)

 3574 00:40:34.790141  u1DelayCellOfst[5]=7 cells (6 PI)

 3575 00:40:34.793305  u1DelayCellOfst[6]=5 cells (4 PI)

 3576 00:40:34.796924  u1DelayCellOfst[7]=5 cells (4 PI)

 3577 00:40:34.800384  Byte0, DQ PI dly=988, DQM PI dly= 991

 3578 00:40:34.803945  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)

 3579 00:40:34.804079  

 3580 00:40:34.807234  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)

 3581 00:40:34.809973  

 3582 00:40:34.810121  u1DelayCellOfst[8]=2 cells (2 PI)

 3583 00:40:34.813192  u1DelayCellOfst[9]=1 cells (1 PI)

 3584 00:40:34.816129  u1DelayCellOfst[10]=6 cells (5 PI)

 3585 00:40:34.819572  u1DelayCellOfst[11]=6 cells (5 PI)

 3586 00:40:34.823045  u1DelayCellOfst[12]=6 cells (5 PI)

 3587 00:40:34.826141  u1DelayCellOfst[13]=9 cells (7 PI)

 3588 00:40:34.829363  u1DelayCellOfst[14]=6 cells (5 PI)

 3589 00:40:34.833374  u1DelayCellOfst[15]=0 cells (0 PI)

 3590 00:40:34.836422  Byte1, DQ PI dly=981, DQM PI dly= 984

 3591 00:40:34.840149  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)

 3592 00:40:34.840774  

 3593 00:40:34.846865  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)

 3594 00:40:34.847343  

 3595 00:40:34.847678  Write Rank1 MR14 =0x1c

 3596 00:40:34.847984  

 3597 00:40:34.849844  Final TX Range 0 Vref 28

 3598 00:40:34.850273  

 3599 00:40:34.856563  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 3600 00:40:34.857038  

 3601 00:40:34.862753  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3602 00:40:34.869372  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3603 00:40:34.875999  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3604 00:40:34.879130  Write Rank1 MR3 =0xb0

 3605 00:40:34.882379  DramC Write-DBI on

 3606 00:40:34.882878  ==

 3607 00:40:34.885908  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3608 00:40:34.888972  fsp= 1, odt_onoff= 1, Byte mode= 0

 3609 00:40:34.889495  ==

 3610 00:40:34.895829  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 3611 00:40:34.896311  

 3612 00:40:34.896710  Begin, DQ Scan Range 704~768

 3613 00:40:34.897094  

 3614 00:40:34.897377  

 3615 00:40:34.898839  	TX Vref Scan disable

 3616 00:40:34.902146  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3617 00:40:34.905410  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3618 00:40:34.909129  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3619 00:40:34.912584  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3620 00:40:34.915676  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3621 00:40:34.918191  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3622 00:40:34.921604  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3623 00:40:34.928333  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 3624 00:40:34.931895  712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 3625 00:40:34.934687  713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 3626 00:40:34.938172  714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]

 3627 00:40:34.941712  715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]

 3628 00:40:34.944717  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 3629 00:40:34.947961  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 3630 00:40:34.951344  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 3631 00:40:34.954516  719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]

 3632 00:40:34.957522  720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]

 3633 00:40:34.960959  721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]

 3634 00:40:34.964764  722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]

 3635 00:40:34.967319  723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]

 3636 00:40:34.976789  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 3637 00:40:34.980131  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 3638 00:40:34.982828  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 3639 00:40:34.986112  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 3640 00:40:34.989648  745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]

 3641 00:40:34.992843  746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]

 3642 00:40:34.996252  747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]

 3643 00:40:34.999480  748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]

 3644 00:40:35.002918  749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]

 3645 00:40:35.005883  750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]

 3646 00:40:35.009480  751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]

 3647 00:40:35.012909  752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3648 00:40:35.015685  Byte0, DQ PI dly=737, DQM PI dly= 737

 3649 00:40:35.022239  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)

 3650 00:40:35.022700  

 3651 00:40:35.025577  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)

 3652 00:40:35.025975  

 3653 00:40:35.028854  Byte1, DQ PI dly=728, DQM PI dly= 728

 3654 00:40:35.035775  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)

 3655 00:40:35.036205  

 3656 00:40:35.039343  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)

 3657 00:40:35.039918  

 3658 00:40:35.045327  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3659 00:40:35.051837  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3660 00:40:35.058557  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3661 00:40:35.061405  Write Rank1 MR3 =0x30

 3662 00:40:35.061837  DramC Write-DBI off

 3663 00:40:35.062145  

 3664 00:40:35.064935  [DATLAT]

 3665 00:40:35.068704  Freq=1600, CH1 RK1, use_rxtx_scan=0

 3666 00:40:35.069122  

 3667 00:40:35.069429  DATLAT Default: 0x10

 3668 00:40:35.071818  7, 0xFFFF, sum=0

 3669 00:40:35.072209  8, 0xFFFF, sum=0

 3670 00:40:35.074710  9, 0xFFFF, sum=0

 3671 00:40:35.075114  10, 0xFFFF, sum=0

 3672 00:40:35.078223  11, 0xFFFF, sum=0

 3673 00:40:35.078617  12, 0xFFFF, sum=0

 3674 00:40:35.081654  13, 0xFFFF, sum=0

 3675 00:40:35.082048  14, 0x0, sum=1

 3676 00:40:35.084713  15, 0x0, sum=2

 3677 00:40:35.085133  16, 0x0, sum=3

 3678 00:40:35.085464  17, 0x0, sum=4

 3679 00:40:35.091158  pattern=2 first_step=14 total pass=5 best_step=16

 3680 00:40:35.091548  ==

 3681 00:40:35.094598  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3682 00:40:35.097965  fsp= 1, odt_onoff= 1, Byte mode= 0

 3683 00:40:35.098478  ==

 3684 00:40:35.104557  Start DQ dly to find pass range UseTestEngine =1

 3685 00:40:35.108200  x-axis: bit #, y-axis: DQ dly (-127~63)

 3686 00:40:35.108593  RX Vref Scan = 0

 3687 00:40:35.111027  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3688 00:40:35.114552  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3689 00:40:35.117417  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3690 00:40:35.120793  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3691 00:40:35.123922  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3692 00:40:35.127545  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3693 00:40:35.128029  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3694 00:40:35.131030  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3695 00:40:35.134232  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3696 00:40:35.137242  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3697 00:40:35.140278  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3698 00:40:35.143626  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3699 00:40:35.147448  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3700 00:40:35.150753  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3701 00:40:35.154079  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3702 00:40:35.157291  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3703 00:40:35.157776  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3704 00:40:35.160021  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3705 00:40:35.163847  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3706 00:40:35.166699  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3707 00:40:35.169745  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3708 00:40:35.173762  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3709 00:40:35.176444  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3710 00:40:35.176884  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 3711 00:40:35.179797  -2, [0] xxxxxxxx xxxxxxxo [MSB]

 3712 00:40:35.183191  -1, [0] xxxxxxxx xxxxxxxo [MSB]

 3713 00:40:35.186802  0, [0] xxxoxxxx xxxxxxxo [MSB]

 3714 00:40:35.189717  1, [0] xxxoxxxx xoxxxxxo [MSB]

 3715 00:40:35.193214  2, [0] xoxoxxxx ooxxxxxo [MSB]

 3716 00:40:35.196189  3, [0] xoooxxxx ooxxxxxo [MSB]

 3717 00:40:35.196580  4, [0] xooooxxo oooxxxxo [MSB]

 3718 00:40:35.199685  5, [0] xoooooxo oooxxxxo [MSB]

 3719 00:40:35.202481  6, [0] ooooooxo ooooxooo [MSB]

 3720 00:40:35.207065  32, [0] oooxoooo ooooooox [MSB]

 3721 00:40:35.209904  33, [0] oooxoooo ooooooox [MSB]

 3722 00:40:35.213606  34, [0] oooxoooo ooooooox [MSB]

 3723 00:40:35.216649  35, [0] ooxxoooo xxooooox [MSB]

 3724 00:40:35.220028  36, [0] ooxxoooo xxooooox [MSB]

 3725 00:40:35.223228  37, [0] ooxxoooo xxooooox [MSB]

 3726 00:40:35.226704  38, [0] oxxxooox xxxoooox [MSB]

 3727 00:40:35.227105  39, [0] xxxxxoox xxxooxox [MSB]

 3728 00:40:35.229969  40, [0] xxxxxoox xxxxxxxx [MSB]

 3729 00:40:35.233267  41, [0] xxxxxxxx xxxxxxxx [MSB]

 3730 00:40:35.236550  iDelay=41, Bit 0, Center 22 (6 ~ 38) 33

 3731 00:40:35.239572  iDelay=41, Bit 1, Center 19 (2 ~ 37) 36

 3732 00:40:35.242979  iDelay=41, Bit 2, Center 18 (3 ~ 34) 32

 3733 00:40:35.246507  iDelay=41, Bit 3, Center 15 (0 ~ 31) 32

 3734 00:40:35.252463  iDelay=41, Bit 4, Center 21 (4 ~ 38) 35

 3735 00:40:35.255793  iDelay=41, Bit 5, Center 22 (5 ~ 40) 36

 3736 00:40:35.259278  iDelay=41, Bit 6, Center 23 (7 ~ 40) 34

 3737 00:40:35.262676  iDelay=41, Bit 7, Center 20 (4 ~ 37) 34

 3738 00:40:35.265941  iDelay=41, Bit 8, Center 18 (2 ~ 34) 33

 3739 00:40:35.268815  iDelay=41, Bit 9, Center 17 (1 ~ 34) 34

 3740 00:40:35.272538  iDelay=41, Bit 10, Center 20 (4 ~ 37) 34

 3741 00:40:35.275577  iDelay=41, Bit 11, Center 22 (6 ~ 39) 34

 3742 00:40:35.279160  iDelay=41, Bit 12, Center 23 (7 ~ 39) 33

 3743 00:40:35.282282  iDelay=41, Bit 13, Center 22 (6 ~ 38) 33

 3744 00:40:35.285537  iDelay=41, Bit 14, Center 22 (6 ~ 39) 34

 3745 00:40:35.292367  iDelay=41, Bit 15, Center 14 (-2 ~ 31) 34

 3746 00:40:35.292806  ==

 3747 00:40:35.295128  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3748 00:40:35.298357  fsp= 1, odt_onoff= 1, Byte mode= 0

 3749 00:40:35.298846  ==

 3750 00:40:35.302230  DQS Delay:

 3751 00:40:35.302684  DQS0 = 0, DQS1 = 0

 3752 00:40:35.303001  DQM Delay:

 3753 00:40:35.305495  DQM0 = 20, DQM1 = 19

 3754 00:40:35.306123  DQ Delay:

 3755 00:40:35.308580  DQ0 =22, DQ1 =19, DQ2 =18, DQ3 =15

 3756 00:40:35.311508  DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20

 3757 00:40:35.314801  DQ8 =18, DQ9 =17, DQ10 =20, DQ11 =22

 3758 00:40:35.318126  DQ12 =23, DQ13 =22, DQ14 =22, DQ15 =14

 3759 00:40:35.318577  

 3760 00:40:35.318886  

 3761 00:40:35.319164  

 3762 00:40:35.321683  [DramC_TX_OE_Calibration] TA2

 3763 00:40:35.325087  Original DQ_B0 (3 6) =30, OEN = 27

 3764 00:40:35.328328  Original DQ_B1 (3 6) =30, OEN = 27

 3765 00:40:35.331601  23, 0x0, End_B0=23 End_B1=23

 3766 00:40:35.334537  24, 0x0, End_B0=24 End_B1=24

 3767 00:40:35.335083  25, 0x0, End_B0=25 End_B1=25

 3768 00:40:35.338031  26, 0x0, End_B0=26 End_B1=26

 3769 00:40:35.341367  27, 0x0, End_B0=27 End_B1=27

 3770 00:40:35.344607  28, 0x0, End_B0=28 End_B1=28

 3771 00:40:35.348554  29, 0x0, End_B0=29 End_B1=29

 3772 00:40:35.348995  30, 0x0, End_B0=30 End_B1=30

 3773 00:40:35.350981  31, 0xFFFF, End_B0=30 End_B1=30

 3774 00:40:35.357783  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3775 00:40:35.364338  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3776 00:40:35.364849  

 3777 00:40:35.365158  

 3778 00:40:35.365438  Write Rank1 MR23 =0x3f

 3779 00:40:35.367813  [DQSOSC]

 3780 00:40:35.374475  [DQSOSCAuto] RK1, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps

 3781 00:40:35.380652  CH1_RK1: MR19=0x202, MR18=0xB6B6, DQSOSC=453, MR23=63, INC=11, DEC=17

 3782 00:40:35.381046  Write Rank1 MR23 =0x3f

 3783 00:40:35.384202  [DQSOSC]

 3784 00:40:35.390641  [DQSOSCAuto] RK1, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps

 3785 00:40:35.393983  CH1 RK1: MR19=202, MR18=B5B5

 3786 00:40:35.397403  [RxdqsGatingPostProcess] freq 1600

 3787 00:40:35.403538  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 3788 00:40:35.404017  Rank: 0

 3789 00:40:35.406800  best DQS0 dly(2T, 0.5T) = (2, 6)

 3790 00:40:35.410618  best DQS1 dly(2T, 0.5T) = (2, 6)

 3791 00:40:35.413736  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 3792 00:40:35.416604  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 3793 00:40:35.417001  Rank: 1

 3794 00:40:35.420248  best DQS0 dly(2T, 0.5T) = (2, 6)

 3795 00:40:35.423669  best DQS1 dly(2T, 0.5T) = (2, 6)

 3796 00:40:35.427015  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 3797 00:40:35.430364  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 3798 00:40:35.433259  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 3799 00:40:35.436790  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 3800 00:40:35.443383  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 3801 00:40:35.443872  

 3802 00:40:35.444228  

 3803 00:40:35.446760  [Calibration Summary] Freqency 1600

 3804 00:40:35.447242  CH 0, Rank 0

 3805 00:40:35.447556  All Pass.

 3806 00:40:35.447838  

 3807 00:40:35.449259  CH 0, Rank 1

 3808 00:40:35.449699  All Pass.

 3809 00:40:35.450014  

 3810 00:40:35.450298  CH 1, Rank 0

 3811 00:40:35.452764  All Pass.

 3812 00:40:35.453156  

 3813 00:40:35.453521  CH 1, Rank 1

 3814 00:40:35.453889  All Pass.

 3815 00:40:35.455965  

 3816 00:40:35.459450  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3817 00:40:35.469216  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3818 00:40:35.475833  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3819 00:40:35.476230  Write Rank0 MR3 =0xb0

 3820 00:40:35.482458  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3821 00:40:35.488891  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3822 00:40:35.498850  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3823 00:40:35.499322  Write Rank1 MR3 =0xb0

 3824 00:40:35.505312  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3825 00:40:35.511448  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3826 00:40:35.521930  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3827 00:40:35.522415  Write Rank0 MR3 =0xb0

 3828 00:40:35.528162  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3829 00:40:35.535215  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3830 00:40:35.541243  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3831 00:40:35.544754  Write Rank1 MR3 =0xb0

 3832 00:40:35.545137  DramC Write-DBI on

 3833 00:40:35.548312  [GetDramInforAfterCalByMRR] Vendor 6.

 3834 00:40:35.554325  [GetDramInforAfterCalByMRR] Revision 505.

 3835 00:40:35.554760  MR8 1111

 3836 00:40:35.557524  CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3837 00:40:35.560917  MR8 1111

 3838 00:40:35.564409  CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3839 00:40:35.564794  MR8 1111

 3840 00:40:35.571201  CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3841 00:40:35.571675  MR8 1111

 3842 00:40:35.577697  CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3843 00:40:35.584707  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0

 3844 00:40:35.587228  Write Rank0 MR13 =0xd0

 3845 00:40:35.590589  Write Rank1 MR13 =0xd0

 3846 00:40:35.591055  Write Rank0 MR13 =0xd0

 3847 00:40:35.594018  Write Rank1 MR13 =0xd0

 3848 00:40:35.597350  Save calibration result to emmc

 3849 00:40:35.597806  

 3850 00:40:35.598143  

 3851 00:40:35.600722  [DramcModeReg_Check] Freq_1600, FSP_1

 3852 00:40:35.601162  FSP_1, CH_0, RK0

 3853 00:40:35.603719  Write Rank0 MR13 =0xd8

 3854 00:40:35.606672  		MR12 = 0x5e (global = 0x5e)	match

 3855 00:40:35.610060  		MR14 = 0x1c (global = 0x1c)	match

 3856 00:40:35.610553  FSP_1, CH_0, RK1

 3857 00:40:35.613609  Write Rank1 MR13 =0xd8

 3858 00:40:35.617142  		MR12 = 0x5e (global = 0x5e)	match

 3859 00:40:35.619997  		MR14 = 0x1c (global = 0x1c)	match

 3860 00:40:35.620411  FSP_1, CH_1, RK0

 3861 00:40:35.623897  Write Rank0 MR13 =0xd8

 3862 00:40:35.626667  		MR12 = 0x5a (global = 0x5a)	match

 3863 00:40:35.629841  		MR14 = 0x1c (global = 0x1c)	match

 3864 00:40:35.630231  FSP_1, CH_1, RK1

 3865 00:40:35.632877  Write Rank1 MR13 =0xd8

 3866 00:40:35.636139  		MR12 = 0x5e (global = 0x5e)	match

 3867 00:40:35.639813  		MR14 = 0x1c (global = 0x1c)	match

 3868 00:40:35.640332  

 3869 00:40:35.642739  [MEM_TEST] 02: After DFS, before run time config

 3870 00:40:35.654824  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3871 00:40:35.655254  

 3872 00:40:35.655586  [TA2_TEST]

 3873 00:40:35.656021  === TA2 HW

 3874 00:40:35.658025  TA2 PAT: XTALK

 3875 00:40:35.661385  HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0

 3876 00:40:35.668788  HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0

 3877 00:40:35.671810  HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0

 3878 00:40:35.677829  HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0

 3879 00:40:35.678218  

 3880 00:40:35.678518  

 3881 00:40:35.678793  Settings after calibration

 3882 00:40:35.679061  

 3883 00:40:35.681229  [DramcRunTimeConfig]

 3884 00:40:35.684556  TransferPLLToSPMControl - MODE SW PHYPLL

 3885 00:40:35.687735  TX_TRACKING: ON

 3886 00:40:35.688138  RX_TRACKING: ON

 3887 00:40:35.688463  HW_GATING: ON

 3888 00:40:35.691289  HW_GATING DBG: OFF

 3889 00:40:35.691705  ddr_geometry:1

 3890 00:40:35.693918  ddr_geometry:1

 3891 00:40:35.694468  ddr_geometry:1

 3892 00:40:35.697291  ddr_geometry:1

 3893 00:40:35.697753  ddr_geometry:1

 3894 00:40:35.701083  ddr_geometry:1

 3895 00:40:35.701681  ddr_geometry:1

 3896 00:40:35.702113  ddr_geometry:1

 3897 00:40:35.704103  High Freq DUMMY_READ_FOR_TRACKING: ON

 3898 00:40:35.707130  ZQCS_ENABLE_LP4: OFF

 3899 00:40:35.710526  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 3900 00:40:35.714315  DUMMY_READ_FOR_DQS_GATING_RETRY: OFF

 3901 00:40:35.714819  SPM_CONTROL_AFTERK: ON

 3902 00:40:35.717177  IMPEDANCE_TRACKING: ON

 3903 00:40:35.720703  TEMP_SENSOR: ON

 3904 00:40:35.721093  PER_BANK_REFRESH: ON

 3905 00:40:35.723597  HW_SAVE_FOR_SR: ON

 3906 00:40:35.727403  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3907 00:40:35.730718  CLK_FREE_FUN_FOR_DRAMC_PSEL: ON

 3908 00:40:35.733640  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON

 3909 00:40:35.734144  Read ODT Tracking: ON

 3910 00:40:35.736909  =========================

 3911 00:40:35.737293  

 3912 00:40:35.737638  [TA2_TEST]

 3913 00:40:35.740323  === TA2 HW

 3914 00:40:35.743418  HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0

 3915 00:40:35.750070  HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0

 3916 00:40:35.753154  HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0

 3917 00:40:35.759658  HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0

 3918 00:40:35.760251  

 3919 00:40:35.763153  [MEM_TEST] 03: After run time config

 3920 00:40:35.772825  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3921 00:40:35.775986  [complex_mem_test] start addr:0x40024000, len:131072

 3922 00:40:35.980647  1st complex R/W mem test pass

 3923 00:40:35.986656  save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 

 3924 00:40:35.990178  sync preloader write leveling

 3925 00:40:35.993395  sync preloader cbt_mr12

 3926 00:40:35.996294  sync preloader cbt_clk_dly

 3927 00:40:35.996619  sync preloader cbt_cmd_dly

 3928 00:40:35.999577  sync preloader cbt_cs

 3929 00:40:36.002934  sync preloader cbt_ca_perbit_delay

 3930 00:40:36.006208  sync preloader clk_delay

 3931 00:40:36.006283  sync preloader dqs_delay

 3932 00:40:36.009485  sync preloader u1Gating2T_Save

 3933 00:40:36.012596  sync preloader u1Gating05T_Save

 3934 00:40:36.015864  sync preloader u1Gatingfine_tune_Save

 3935 00:40:36.019268  sync preloader u1Gatingucpass_count_Save

 3936 00:40:36.022914  sync preloader u1TxWindowPerbitVref_Save

 3937 00:40:36.026111  sync preloader u1TxCenter_min_Save

 3938 00:40:36.029066  sync preloader u1TxCenter_max_Save

 3939 00:40:36.032481  sync preloader u1Txwin_center_Save

 3940 00:40:36.035915  sync preloader u1Txfirst_pass_Save

 3941 00:40:36.039384  sync preloader u1Txlast_pass_Save

 3942 00:40:36.042672  sync preloader u1RxDatlat_Save

 3943 00:40:36.045831  sync preloader u1RxWinPerbitVref_Save

 3944 00:40:36.049257  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3945 00:40:36.052316  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3946 00:40:36.055732  sync preloader delay_cell_unit

 3947 00:40:36.062085  save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 

 3948 00:40:36.065665  sync preloader write leveling

 3949 00:40:36.068961  sync preloader cbt_mr12

 3950 00:40:36.069037  sync preloader cbt_clk_dly

 3951 00:40:36.072204  sync preloader cbt_cmd_dly

 3952 00:40:36.075401  sync preloader cbt_cs

 3953 00:40:36.078709  sync preloader cbt_ca_perbit_delay

 3954 00:40:36.078786  sync preloader clk_delay

 3955 00:40:36.082085  sync preloader dqs_delay

 3956 00:40:36.085336  sync preloader u1Gating2T_Save

 3957 00:40:36.088654  sync preloader u1Gating05T_Save

 3958 00:40:36.091395  sync preloader u1Gatingfine_tune_Save

 3959 00:40:36.094735  sync preloader u1Gatingucpass_count_Save

 3960 00:40:36.098111  sync preloader u1TxWindowPerbitVref_Save

 3961 00:40:36.101415  sync preloader u1TxCenter_min_Save

 3962 00:40:36.104725  sync preloader u1TxCenter_max_Save

 3963 00:40:36.108143  sync preloader u1Txwin_center_Save

 3964 00:40:36.111525  sync preloader u1Txfirst_pass_Save

 3965 00:40:36.114261  sync preloader u1Txlast_pass_Save

 3966 00:40:36.117744  sync preloader u1RxDatlat_Save

 3967 00:40:36.121150  sync preloader u1RxWinPerbitVref_Save

 3968 00:40:36.124494  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3969 00:40:36.127375  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3970 00:40:36.131017  sync preloader delay_cell_unit

 3971 00:40:36.137280  save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 

 3972 00:40:36.140876  sync preloader write leveling

 3973 00:40:36.140952  sync preloader cbt_mr12

 3974 00:40:36.144052  sync preloader cbt_clk_dly

 3975 00:40:36.147357  sync preloader cbt_cmd_dly

 3976 00:40:36.150624  sync preloader cbt_cs

 3977 00:40:36.150701  sync preloader cbt_ca_perbit_delay

 3978 00:40:36.153899  sync preloader clk_delay

 3979 00:40:36.156898  sync preloader dqs_delay

 3980 00:40:36.160285  sync preloader u1Gating2T_Save

 3981 00:40:36.163665  sync preloader u1Gating05T_Save

 3982 00:40:36.166777  sync preloader u1Gatingfine_tune_Save

 3983 00:40:36.170223  sync preloader u1Gatingucpass_count_Save

 3984 00:40:36.173079  sync preloader u1TxWindowPerbitVref_Save

 3985 00:40:36.176786  sync preloader u1TxCenter_min_Save

 3986 00:40:36.179757  sync preloader u1TxCenter_max_Save

 3987 00:40:36.182916  sync preloader u1Txwin_center_Save

 3988 00:40:36.186754  sync preloader u1Txfirst_pass_Save

 3989 00:40:36.186832  sync preloader u1Txlast_pass_Save

 3990 00:40:36.189506  sync preloader u1RxDatlat_Save

 3991 00:40:36.192900  sync preloader u1RxWinPerbitVref_Save

 3992 00:40:36.199795  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 3993 00:40:36.203251  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 3994 00:40:36.205895  sync preloader delay_cell_unit

 3995 00:40:36.209042  just_for_test_dump_coreboot_params dump all params

 3996 00:40:36.212779  dump source = 0x0

 3997 00:40:36.212854  dump params frequency:1600

 3998 00:40:36.216128  dump params rank number:2

 3999 00:40:36.216230  

 4000 00:40:36.219472   dump params write leveling

 4001 00:40:36.222940  write leveling[0][0][0] = 0x20

 4002 00:40:36.225552  write leveling[0][0][1] = 0x16

 4003 00:40:36.225628  write leveling[0][1][0] = 0x1f

 4004 00:40:36.229012  write leveling[0][1][1] = 0x17

 4005 00:40:36.232314  write leveling[1][0][0] = 0x24

 4006 00:40:36.235783  write leveling[1][0][1] = 0x21

 4007 00:40:36.239146  write leveling[1][1][0] = 0x21

 4008 00:40:36.242320  write leveling[1][1][1] = 0x1c

 4009 00:40:36.242396  dump params cbt_cs

 4010 00:40:36.245396  cbt_cs[0][0] = 0x7

 4011 00:40:36.245494  cbt_cs[0][1] = 0x7

 4012 00:40:36.248492  cbt_cs[1][0] = 0x9

 4013 00:40:36.248566  cbt_cs[1][1] = 0x9

 4014 00:40:36.251756  dump params cbt_mr12

 4015 00:40:36.251830  cbt_mr12[0][0] = 0x1e

 4016 00:40:36.255116  cbt_mr12[0][1] = 0x1e

 4017 00:40:36.258702  cbt_mr12[1][0] = 0x1a

 4018 00:40:36.258777  cbt_mr12[1][1] = 0x1e

 4019 00:40:36.262019  dump params tx window

 4020 00:40:36.265432  tx_center_min[0][0][0] = 986

 4021 00:40:36.265531  tx_center_max[0][0][0] =  991

 4022 00:40:36.268865  tx_center_min[0][0][1] = 976

 4023 00:40:36.271555  tx_center_max[0][0][1] =  984

 4024 00:40:36.274968  tx_center_min[0][1][0] = 984

 4025 00:40:36.278115  tx_center_max[0][1][0] =  990

 4026 00:40:36.278190  tx_center_min[0][1][1] = 977

 4027 00:40:36.281793  tx_center_max[0][1][1] =  985

 4028 00:40:36.284971  tx_center_min[1][0][0] = 992

 4029 00:40:36.288292  tx_center_max[1][0][0] =  997

 4030 00:40:36.291675  tx_center_min[1][0][1] = 987

 4031 00:40:36.291752  tx_center_max[1][0][1] =  993

 4032 00:40:36.294856  tx_center_min[1][1][0] = 988

 4033 00:40:36.298244  tx_center_max[1][1][0] =  994

 4034 00:40:36.301401  tx_center_min[1][1][1] = 981

 4035 00:40:36.304612  tx_center_max[1][1][1] =  988

 4036 00:40:36.304690  dump params tx window

 4037 00:40:36.307847  tx_win_center[0][0][0] = 991

 4038 00:40:36.311213  tx_first_pass[0][0][0] =  979

 4039 00:40:36.314245  tx_last_pass[0][0][0] =	1004

 4040 00:40:36.314339  tx_win_center[0][0][1] = 990

 4041 00:40:36.317693  tx_first_pass[0][0][1] =  978

 4042 00:40:36.321240  tx_last_pass[0][0][1] =	1002

 4043 00:40:36.324573  tx_win_center[0][0][2] = 991

 4044 00:40:36.328031  tx_first_pass[0][0][2] =  979

 4045 00:40:36.328125  tx_last_pass[0][0][2] =	1004

 4046 00:40:36.331472  tx_win_center[0][0][3] = 986

 4047 00:40:36.334331  tx_first_pass[0][0][3] =  974

 4048 00:40:36.337602  tx_last_pass[0][0][3] =	998

 4049 00:40:36.337667  tx_win_center[0][0][4] = 989

 4050 00:40:36.341079  tx_first_pass[0][0][4] =  977

 4051 00:40:36.344341  tx_last_pass[0][0][4] =	1001

 4052 00:40:36.347697  tx_win_center[0][0][5] = 987

 4053 00:40:36.350963  tx_first_pass[0][0][5] =  976

 4054 00:40:36.351032  tx_last_pass[0][0][5] =	999

 4055 00:40:36.353738  tx_win_center[0][0][6] = 988

 4056 00:40:36.357927  tx_first_pass[0][0][6] =  976

 4057 00:40:36.360864  tx_last_pass[0][0][6] =	1000

 4058 00:40:36.363680  tx_win_center[0][0][7] = 989

 4059 00:40:36.363774  tx_first_pass[0][0][7] =  978

 4060 00:40:36.367049  tx_last_pass[0][0][7] =	1001

 4061 00:40:36.370570  tx_win_center[0][0][8] = 976

 4062 00:40:36.373809  tx_first_pass[0][0][8] =  965

 4063 00:40:36.377488  tx_last_pass[0][0][8] =	988

 4064 00:40:36.377619  tx_win_center[0][0][9] = 978

 4065 00:40:36.379984  tx_first_pass[0][0][9] =  967

 4066 00:40:36.383402  tx_last_pass[0][0][9] =	989

 4067 00:40:36.386594  tx_win_center[0][0][10] = 984

 4068 00:40:36.390093  tx_first_pass[0][0][10] =  972

 4069 00:40:36.390163  tx_last_pass[0][0][10] =	996

 4070 00:40:36.393386  tx_win_center[0][0][11] = 977

 4071 00:40:36.396843  tx_first_pass[0][0][11] =  966

 4072 00:40:36.400345  tx_last_pass[0][0][11] =	988

 4073 00:40:36.403291  tx_win_center[0][0][12] = 978

 4074 00:40:36.403382  tx_first_pass[0][0][12] =  967

 4075 00:40:36.406681  tx_last_pass[0][0][12] =	990

 4076 00:40:36.409673  tx_win_center[0][0][13] = 978

 4077 00:40:36.412895  tx_first_pass[0][0][13] =  967

 4078 00:40:36.416574  tx_last_pass[0][0][13] =	990

 4079 00:40:36.419442  tx_win_center[0][0][14] = 979

 4080 00:40:36.419538  tx_first_pass[0][0][14] =  967

 4081 00:40:36.422631  tx_last_pass[0][0][14] =	991

 4082 00:40:36.426124  tx_win_center[0][0][15] = 981

 4083 00:40:36.429361  tx_first_pass[0][0][15] =  969

 4084 00:40:36.432544  tx_last_pass[0][0][15] =	994

 4085 00:40:36.432636  tx_win_center[0][1][0] = 990

 4086 00:40:36.435744  tx_first_pass[0][1][0] =  978

 4087 00:40:36.439102  tx_last_pass[0][1][0] =	1002

 4088 00:40:36.442295  tx_win_center[0][1][1] = 989

 4089 00:40:36.445901  tx_first_pass[0][1][1] =  978

 4090 00:40:36.445993  tx_last_pass[0][1][1] =	1001

 4091 00:40:36.449139  tx_win_center[0][1][2] = 990

 4092 00:40:36.452358  tx_first_pass[0][1][2] =  978

 4093 00:40:36.455414  tx_last_pass[0][1][2] =	1002

 4094 00:40:36.458894  tx_win_center[0][1][3] = 984

 4095 00:40:36.458964  tx_first_pass[0][1][3] =  973

 4096 00:40:36.461927  tx_last_pass[0][1][3] =	996

 4097 00:40:36.466160  tx_win_center[0][1][4] = 989

 4098 00:40:36.468768  tx_first_pass[0][1][4] =  977

 4099 00:40:36.472060  tx_last_pass[0][1][4] =	1001

 4100 00:40:36.472151  tx_win_center[0][1][5] = 987

 4101 00:40:36.475456  tx_first_pass[0][1][5] =  975

 4102 00:40:36.478828  tx_last_pass[0][1][5] =	999

 4103 00:40:36.481670  tx_win_center[0][1][6] = 987

 4104 00:40:36.485148  tx_first_pass[0][1][6] =  976

 4105 00:40:36.485239  tx_last_pass[0][1][6] =	999

 4106 00:40:36.488728  tx_win_center[0][1][7] = 988

 4107 00:40:36.491834  tx_first_pass[0][1][7] =  977

 4108 00:40:36.495060  tx_last_pass[0][1][7] =	1000

 4109 00:40:36.495148  tx_win_center[0][1][8] = 977

 4110 00:40:36.498515  tx_first_pass[0][1][8] =  966

 4111 00:40:36.501375  tx_last_pass[0][1][8] =	989

 4112 00:40:36.505015  tx_win_center[0][1][9] = 979

 4113 00:40:36.507696  tx_first_pass[0][1][9] =  968

 4114 00:40:36.507763  tx_last_pass[0][1][9] =	991

 4115 00:40:36.511053  tx_win_center[0][1][10] = 985

 4116 00:40:36.514431  tx_first_pass[0][1][10] =  973

 4117 00:40:36.517897  tx_last_pass[0][1][10] =	997

 4118 00:40:36.521258  tx_win_center[0][1][11] = 978

 4119 00:40:36.524581  tx_first_pass[0][1][11] =  967

 4120 00:40:36.524653  tx_last_pass[0][1][11] =	990

 4121 00:40:36.528144  tx_win_center[0][1][12] = 979

 4122 00:40:36.530833  tx_first_pass[0][1][12] =  968

 4123 00:40:36.534176  tx_last_pass[0][1][12] =	991

 4124 00:40:36.537253  tx_win_center[0][1][13] = 979

 4125 00:40:36.537345  tx_first_pass[0][1][13] =  968

 4126 00:40:36.540701  tx_last_pass[0][1][13] =	991

 4127 00:40:36.543931  tx_win_center[0][1][14] = 980

 4128 00:40:36.547366  tx_first_pass[0][1][14] =  968

 4129 00:40:36.550716  tx_last_pass[0][1][14] =	992

 4130 00:40:36.550784  tx_win_center[0][1][15] = 983

 4131 00:40:36.553812  tx_first_pass[0][1][15] =  971

 4132 00:40:36.556916  tx_last_pass[0][1][15] =	996

 4133 00:40:36.560305  tx_win_center[1][0][0] = 997

 4134 00:40:36.563775  tx_first_pass[1][0][0] =  984

 4135 00:40:36.563843  tx_last_pass[1][0][0] =	1010

 4136 00:40:36.567225  tx_win_center[1][0][1] = 996

 4137 00:40:36.570270  tx_first_pass[1][0][1] =  984

 4138 00:40:36.573485  tx_last_pass[1][0][1] =	1008

 4139 00:40:36.576640  tx_win_center[1][0][2] = 993

 4140 00:40:36.576731  tx_first_pass[1][0][2] =  981

 4141 00:40:36.580176  tx_last_pass[1][0][2] =	1006

 4142 00:40:36.583340  tx_win_center[1][0][3] = 992

 4143 00:40:36.586621  tx_first_pass[1][0][3] =  979

 4144 00:40:36.589676  tx_last_pass[1][0][3] =	1005

 4145 00:40:36.589744  tx_win_center[1][0][4] = 996

 4146 00:40:36.593295  tx_first_pass[1][0][4] =  983

 4147 00:40:36.596552  tx_last_pass[1][0][4] =	1009

 4148 00:40:36.600003  tx_win_center[1][0][5] = 996

 4149 00:40:36.603308  tx_first_pass[1][0][5] =  984

 4150 00:40:36.603376  tx_last_pass[1][0][5] =	1009

 4151 00:40:36.606641  tx_win_center[1][0][6] = 996

 4152 00:40:36.609411  tx_first_pass[1][0][6] =  984

 4153 00:40:36.612898  tx_last_pass[1][0][6] =	1009

 4154 00:40:36.616349  tx_win_center[1][0][7] = 996

 4155 00:40:36.616441  tx_first_pass[1][0][7] =  984

 4156 00:40:36.619406  tx_last_pass[1][0][7] =	1008

 4157 00:40:36.622747  tx_win_center[1][0][8] = 990

 4158 00:40:36.626222  tx_first_pass[1][0][8] =  979

 4159 00:40:36.629102  tx_last_pass[1][0][8] =	1001

 4160 00:40:36.629173  tx_win_center[1][0][9] = 990

 4161 00:40:36.632382  tx_first_pass[1][0][9] =  979

 4162 00:40:36.635663  tx_last_pass[1][0][9] =	1001

 4163 00:40:36.638922  tx_win_center[1][0][10] = 992

 4164 00:40:36.642167  tx_first_pass[1][0][10] =  981

 4165 00:40:36.642235  tx_last_pass[1][0][10] =	1003

 4166 00:40:36.646136  tx_win_center[1][0][11] = 992

 4167 00:40:36.649495  tx_first_pass[1][0][11] =  981

 4168 00:40:36.652001  tx_last_pass[1][0][11] =	1004

 4169 00:40:36.655406  tx_win_center[1][0][12] = 993

 4170 00:40:36.658801  tx_first_pass[1][0][12] =  983

 4171 00:40:36.658868  tx_last_pass[1][0][12] =	1004

 4172 00:40:36.662248  tx_win_center[1][0][13] = 993

 4173 00:40:36.665808  tx_first_pass[1][0][13] =  983

 4174 00:40:36.668509  tx_last_pass[1][0][13] =	1004

 4175 00:40:36.671810  tx_win_center[1][0][14] = 992

 4176 00:40:36.675221  tx_first_pass[1][0][14] =  981

 4177 00:40:36.675292  tx_last_pass[1][0][14] =	1003

 4178 00:40:36.678676  tx_win_center[1][0][15] = 987

 4179 00:40:36.681798  tx_first_pass[1][0][15] =  976

 4180 00:40:36.684968  tx_last_pass[1][0][15] =	999

 4181 00:40:36.688240  tx_win_center[1][1][0] = 994

 4182 00:40:36.688317  tx_first_pass[1][1][0] =  982

 4183 00:40:36.692076  tx_last_pass[1][1][0] =	1006

 4184 00:40:36.694949  tx_win_center[1][1][1] = 992

 4185 00:40:36.698426  tx_first_pass[1][1][1] =  979

 4186 00:40:36.701819  tx_last_pass[1][1][1] =	1005

 4187 00:40:36.701928  tx_win_center[1][1][2] = 991

 4188 00:40:36.704830  tx_first_pass[1][1][2] =  978

 4189 00:40:36.708211  tx_last_pass[1][1][2] =	1004

 4190 00:40:36.711598  tx_win_center[1][1][3] = 988

 4191 00:40:36.714538  tx_first_pass[1][1][3] =  976

 4192 00:40:36.714643  tx_last_pass[1][1][3] =	1000

 4193 00:40:36.717732  tx_win_center[1][1][4] = 992

 4194 00:40:36.721426  tx_first_pass[1][1][4] =  979

 4195 00:40:36.724638  tx_last_pass[1][1][4] =	1006

 4196 00:40:36.724762  tx_win_center[1][1][5] = 994

 4197 00:40:36.727967  tx_first_pass[1][1][5] =  982

 4198 00:40:36.731355  tx_last_pass[1][1][5] =	1006

 4199 00:40:36.734102  tx_win_center[1][1][6] = 992

 4200 00:40:36.737369  tx_first_pass[1][1][6] =  980

 4201 00:40:36.737472  tx_last_pass[1][1][6] =	1005

 4202 00:40:36.740886  tx_win_center[1][1][7] = 992

 4203 00:40:36.744098  tx_first_pass[1][1][7] =  980

 4204 00:40:36.747501  tx_last_pass[1][1][7] =	1005

 4205 00:40:36.750632  tx_win_center[1][1][8] = 983

 4206 00:40:36.750708  tx_first_pass[1][1][8] =  971

 4207 00:40:36.754179  tx_last_pass[1][1][8] =	996

 4208 00:40:36.757393  tx_win_center[1][1][9] = 982

 4209 00:40:36.760733  tx_first_pass[1][1][9] =  971

 4210 00:40:36.763728  tx_last_pass[1][1][9] =	994

 4211 00:40:36.763804  tx_win_center[1][1][10] = 986

 4212 00:40:36.766992  tx_first_pass[1][1][10] =  973

 4213 00:40:36.770307  tx_last_pass[1][1][10] =	999

 4214 00:40:36.773693  tx_win_center[1][1][11] = 986

 4215 00:40:36.776993  tx_first_pass[1][1][11] =  974

 4216 00:40:36.780287  tx_last_pass[1][1][11] =	999

 4217 00:40:36.780362  tx_win_center[1][1][12] = 986

 4218 00:40:36.783567  tx_first_pass[1][1][12] =  974

 4219 00:40:36.786836  tx_last_pass[1][1][12] =	999

 4220 00:40:36.790024  tx_win_center[1][1][13] = 988

 4221 00:40:36.793436  tx_first_pass[1][1][13] =  976

 4222 00:40:36.793535  tx_last_pass[1][1][13] =	1000

 4223 00:40:36.796779  tx_win_center[1][1][14] = 986

 4224 00:40:36.800139  tx_first_pass[1][1][14] =  974

 4225 00:40:36.803484  tx_last_pass[1][1][14] =	999

 4226 00:40:36.806339  tx_win_center[1][1][15] = 981

 4227 00:40:36.806425  tx_first_pass[1][1][15] =  969

 4228 00:40:36.809746  tx_last_pass[1][1][15] =	993

 4229 00:40:36.812967  dump params rx window

 4230 00:40:36.816716  rx_firspass[0][0][0] = 6

 4231 00:40:36.816807  rx_lastpass[0][0][0] =  38

 4232 00:40:36.819909  rx_firspass[0][0][1] = 6

 4233 00:40:36.823454  rx_lastpass[0][0][1] =  36

 4234 00:40:36.823529  rx_firspass[0][0][2] = 7

 4235 00:40:36.826309  rx_lastpass[0][0][2] =  37

 4236 00:40:36.830303  rx_firspass[0][0][3] = 0

 4237 00:40:36.832825  rx_lastpass[0][0][3] =  29

 4238 00:40:36.832899  rx_firspass[0][0][4] = 6

 4239 00:40:36.836315  rx_lastpass[0][0][4] =  35

 4240 00:40:36.839489  rx_firspass[0][0][5] = 1

 4241 00:40:36.839563  rx_lastpass[0][0][5] =  32

 4242 00:40:36.842592  rx_firspass[0][0][6] = 5

 4243 00:40:36.845843  rx_lastpass[0][0][6] =  33

 4244 00:40:36.845913  rx_firspass[0][0][7] = 8

 4245 00:40:36.849050  rx_lastpass[0][0][7] =  35

 4246 00:40:36.852571  rx_firspass[0][0][8] = 0

 4247 00:40:36.855747  rx_lastpass[0][0][8] =  30

 4248 00:40:36.855817  rx_firspass[0][0][9] = 1

 4249 00:40:36.858996  rx_lastpass[0][0][9] =  31

 4250 00:40:36.862102  rx_firspass[0][0][10] = 10

 4251 00:40:36.865558  rx_lastpass[0][0][10] =  39

 4252 00:40:36.865672  rx_firspass[0][0][11] = 2

 4253 00:40:36.868996  rx_lastpass[0][0][11] =  30

 4254 00:40:36.872404  rx_firspass[0][0][12] = 2

 4255 00:40:36.872490  rx_lastpass[0][0][12] =  32

 4256 00:40:36.876041  rx_firspass[0][0][13] = 3

 4257 00:40:36.878557  rx_lastpass[0][0][13] =  32

 4258 00:40:36.882226  rx_firspass[0][0][14] = 3

 4259 00:40:36.882317  rx_lastpass[0][0][14] =  35

 4260 00:40:36.885297  rx_firspass[0][0][15] = 7

 4261 00:40:36.888908  rx_lastpass[0][0][15] =  36

 4262 00:40:36.891700  rx_firspass[0][1][0] = 4

 4263 00:40:36.891772  rx_lastpass[0][1][0] =  38

 4264 00:40:36.895438  rx_firspass[0][1][1] = 3

 4265 00:40:36.898652  rx_lastpass[0][1][1] =  39

 4266 00:40:36.898717  rx_firspass[0][1][2] = 5

 4267 00:40:36.901524  rx_lastpass[0][1][2] =  40

 4268 00:40:36.904647  rx_firspass[0][1][3] = -3

 4269 00:40:36.908112  rx_lastpass[0][1][3] =  31

 4270 00:40:36.908182  rx_firspass[0][1][4] = 5

 4271 00:40:36.911515  rx_lastpass[0][1][4] =  38

 4272 00:40:36.914895  rx_firspass[0][1][5] = -1

 4273 00:40:36.914985  rx_lastpass[0][1][5] =  32

 4274 00:40:36.918013  rx_firspass[0][1][6] = 1

 4275 00:40:36.921273  rx_lastpass[0][1][6] =  34

 4276 00:40:36.924741  rx_firspass[0][1][7] = 4

 4277 00:40:36.924807  rx_lastpass[0][1][7] =  37

 4278 00:40:36.928161  rx_firspass[0][1][8] = 0

 4279 00:40:36.930818  rx_lastpass[0][1][8] =  34

 4280 00:40:36.930883  rx_firspass[0][1][9] = 2

 4281 00:40:36.934058  rx_lastpass[0][1][9] =  35

 4282 00:40:36.937393  rx_firspass[0][1][10] = 9

 4283 00:40:36.941048  rx_lastpass[0][1][10] =  42

 4284 00:40:36.941114  rx_firspass[0][1][11] = 0

 4285 00:40:36.944308  rx_lastpass[0][1][11] =  33

 4286 00:40:36.947583  rx_firspass[0][1][12] = 3

 4287 00:40:36.951149  rx_lastpass[0][1][12] =  36

 4288 00:40:36.951218  rx_firspass[0][1][13] = 3

 4289 00:40:36.954182  rx_lastpass[0][1][13] =  36

 4290 00:40:36.957788  rx_firspass[0][1][14] = 5

 4291 00:40:36.960513  rx_lastpass[0][1][14] =  37

 4292 00:40:36.960600  rx_firspass[0][1][15] = 6

 4293 00:40:36.963866  rx_lastpass[0][1][15] =  40

 4294 00:40:36.967440  rx_firspass[1][0][0] = 5

 4295 00:40:36.967518  rx_lastpass[1][0][0] =  39

 4296 00:40:36.970635  rx_firspass[1][0][1] = 5

 4297 00:40:36.974153  rx_lastpass[1][0][1] =  36

 4298 00:40:36.974223  rx_firspass[1][0][2] = 4

 4299 00:40:36.977092  rx_lastpass[1][0][2] =  35

 4300 00:40:36.980375  rx_firspass[1][0][3] = -1

 4301 00:40:36.983681  rx_lastpass[1][0][3] =  33

 4302 00:40:36.983761  rx_firspass[1][0][4] = 5

 4303 00:40:36.987027  rx_lastpass[1][0][4] =  35

 4304 00:40:36.990136  rx_firspass[1][0][5] = 7

 4305 00:40:36.990211  rx_lastpass[1][0][5] =  38

 4306 00:40:36.993329  rx_firspass[1][0][6] = 10

 4307 00:40:36.996676  rx_lastpass[1][0][6] =  38

 4308 00:40:37.000274  rx_firspass[1][0][7] = 6

 4309 00:40:37.000372  rx_lastpass[1][0][7] =  36

 4310 00:40:37.003401  rx_firspass[1][0][8] = 1

 4311 00:40:37.006621  rx_lastpass[1][0][8] =  32

 4312 00:40:37.006696  rx_firspass[1][0][9] = 2

 4313 00:40:37.010173  rx_lastpass[1][0][9] =  31

 4314 00:40:37.013676  rx_firspass[1][0][10] = 6

 4315 00:40:37.016231  rx_lastpass[1][0][10] =  35

 4316 00:40:37.016328  rx_firspass[1][0][11] = 7

 4317 00:40:37.019568  rx_lastpass[1][0][11] =  35

 4318 00:40:37.022838  rx_firspass[1][0][12] = 6

 4319 00:40:37.026377  rx_lastpass[1][0][12] =  37

 4320 00:40:37.026466  rx_firspass[1][0][13] = 7

 4321 00:40:37.029660  rx_lastpass[1][0][13] =  35

 4322 00:40:37.033094  rx_firspass[1][0][14] = 8

 4323 00:40:37.036497  rx_lastpass[1][0][14] =  36

 4324 00:40:37.036571  rx_firspass[1][0][15] = 1

 4325 00:40:37.039310  rx_lastpass[1][0][15] =  28

 4326 00:40:37.042445  rx_firspass[1][1][0] = 6

 4327 00:40:37.042535  rx_lastpass[1][1][0] =  38

 4328 00:40:37.046070  rx_firspass[1][1][1] = 2

 4329 00:40:37.049263  rx_lastpass[1][1][1] =  37

 4330 00:40:37.052646  rx_firspass[1][1][2] = 3

 4331 00:40:37.052721  rx_lastpass[1][1][2] =  34

 4332 00:40:37.055505  rx_firspass[1][1][3] = 0

 4333 00:40:37.059323  rx_lastpass[1][1][3] =  31

 4334 00:40:37.059398  rx_firspass[1][1][4] = 4

 4335 00:40:37.062661  rx_lastpass[1][1][4] =  38

 4336 00:40:37.065321  rx_firspass[1][1][5] = 5

 4337 00:40:37.068905  rx_lastpass[1][1][5] =  40

 4338 00:40:37.068983  rx_firspass[1][1][6] = 7

 4339 00:40:37.072085  rx_lastpass[1][1][6] =  40

 4340 00:40:37.075563  rx_firspass[1][1][7] = 4

 4341 00:40:37.075638  rx_lastpass[1][1][7] =  37

 4342 00:40:37.078706  rx_firspass[1][1][8] = 2

 4343 00:40:37.082021  rx_lastpass[1][1][8] =  34

 4344 00:40:37.085172  rx_firspass[1][1][9] = 1

 4345 00:40:37.085248  rx_lastpass[1][1][9] =  34

 4346 00:40:37.088315  rx_firspass[1][1][10] = 4

 4347 00:40:37.092065  rx_lastpass[1][1][10] =  37

 4348 00:40:37.092140  rx_firspass[1][1][11] = 6

 4349 00:40:37.094931  rx_lastpass[1][1][11] =  39

 4350 00:40:37.098434  rx_firspass[1][1][12] = 7

 4351 00:40:37.101890  rx_lastpass[1][1][12] =  39

 4352 00:40:37.101964  rx_firspass[1][1][13] = 6

 4353 00:40:37.104811  rx_lastpass[1][1][13] =  38

 4354 00:40:37.108135  rx_firspass[1][1][14] = 6

 4355 00:40:37.111624  rx_lastpass[1][1][14] =  39

 4356 00:40:37.111699  rx_firspass[1][1][15] = -2

 4357 00:40:37.114446  rx_lastpass[1][1][15] =  31

 4358 00:40:37.118242  dump params clk_delay

 4359 00:40:37.118342  clk_delay[0] = 1

 4360 00:40:37.121526  clk_delay[1] = 0

 4361 00:40:37.121607  dump params dqs_delay

 4362 00:40:37.124992  dqs_delay[0][0] = 0

 4363 00:40:37.125066  dqs_delay[0][1] = 0

 4364 00:40:37.128157  dqs_delay[1][0] = -1

 4365 00:40:37.130908  dqs_delay[1][1] = 0

 4366 00:40:37.130983  dump params delay_cell_unit = 753

 4367 00:40:37.134257  dump source = 0x0

 4368 00:40:37.137790  dump params frequency:1200

 4369 00:40:37.137865  dump params rank number:2

 4370 00:40:37.137922  

 4371 00:40:37.141214   dump params write leveling

 4372 00:40:37.144383  write leveling[0][0][0] = 0x0

 4373 00:40:37.147948  write leveling[0][0][1] = 0x0

 4374 00:40:37.150618  write leveling[0][1][0] = 0x0

 4375 00:40:37.150692  write leveling[0][1][1] = 0x0

 4376 00:40:37.154413  write leveling[1][0][0] = 0x0

 4377 00:40:37.157134  write leveling[1][0][1] = 0x0

 4378 00:40:37.160539  write leveling[1][1][0] = 0x0

 4379 00:40:37.163780  write leveling[1][1][1] = 0x0

 4380 00:40:37.163855  dump params cbt_cs

 4381 00:40:37.167048  cbt_cs[0][0] = 0x0

 4382 00:40:37.167124  cbt_cs[0][1] = 0x0

 4383 00:40:37.170392  cbt_cs[1][0] = 0x0

 4384 00:40:37.170467  cbt_cs[1][1] = 0x0

 4385 00:40:37.173896  dump params cbt_mr12

 4386 00:40:37.176801  cbt_mr12[0][0] = 0x0

 4387 00:40:37.176875  cbt_mr12[0][1] = 0x0

 4388 00:40:37.180302  cbt_mr12[1][0] = 0x0

 4389 00:40:37.180378  cbt_mr12[1][1] = 0x0

 4390 00:40:37.183710  dump params tx window

 4391 00:40:37.186853  tx_center_min[0][0][0] = 0

 4392 00:40:37.186928  tx_center_max[0][0][0] =  0

 4393 00:40:37.190139  tx_center_min[0][0][1] = 0

 4394 00:40:37.193431  tx_center_max[0][0][1] =  0

 4395 00:40:37.196932  tx_center_min[0][1][0] = 0

 4396 00:40:37.197007  tx_center_max[0][1][0] =  0

 4397 00:40:37.200039  tx_center_min[0][1][1] = 0

 4398 00:40:37.203425  tx_center_max[0][1][1] =  0

 4399 00:40:37.206792  tx_center_min[1][0][0] = 0

 4400 00:40:37.206867  tx_center_max[1][0][0] =  0

 4401 00:40:37.209520  tx_center_min[1][0][1] = 0

 4402 00:40:37.213401  tx_center_max[1][0][1] =  0

 4403 00:40:37.216551  tx_center_min[1][1][0] = 0

 4404 00:40:37.216626  tx_center_max[1][1][0] =  0

 4405 00:40:37.219858  tx_center_min[1][1][1] = 0

 4406 00:40:37.222915  tx_center_max[1][1][1] =  0

 4407 00:40:37.223016  dump params tx window

 4408 00:40:37.226247  tx_win_center[0][0][0] = 0

 4409 00:40:37.229127  tx_first_pass[0][0][0] =  0

 4410 00:40:37.232366  tx_last_pass[0][0][0] =	0

 4411 00:40:37.232442  tx_win_center[0][0][1] = 0

 4412 00:40:37.236047  tx_first_pass[0][0][1] =  0

 4413 00:40:37.239448  tx_last_pass[0][0][1] =	0

 4414 00:40:37.242570  tx_win_center[0][0][2] = 0

 4415 00:40:37.242646  tx_first_pass[0][0][2] =  0

 4416 00:40:37.245971  tx_last_pass[0][0][2] =	0

 4417 00:40:37.249284  tx_win_center[0][0][3] = 0

 4418 00:40:37.252535  tx_first_pass[0][0][3] =  0

 4419 00:40:37.252610  tx_last_pass[0][0][3] =	0

 4420 00:40:37.255953  tx_win_center[0][0][4] = 0

 4421 00:40:37.258774  tx_first_pass[0][0][4] =  0

 4422 00:40:37.258849  tx_last_pass[0][0][4] =	0

 4423 00:40:37.262095  tx_win_center[0][0][5] = 0

 4424 00:40:37.265464  tx_first_pass[0][0][5] =  0

 4425 00:40:37.268837  tx_last_pass[0][0][5] =	0

 4426 00:40:37.268912  tx_win_center[0][0][6] = 0

 4427 00:40:37.272144  tx_first_pass[0][0][6] =  0

 4428 00:40:37.275488  tx_last_pass[0][0][6] =	0

 4429 00:40:37.278766  tx_win_center[0][0][7] = 0

 4430 00:40:37.278841  tx_first_pass[0][0][7] =  0

 4431 00:40:37.282151  tx_last_pass[0][0][7] =	0

 4432 00:40:37.285636  tx_win_center[0][0][8] = 0

 4433 00:40:37.288708  tx_first_pass[0][0][8] =  0

 4434 00:40:37.288783  tx_last_pass[0][0][8] =	0

 4435 00:40:37.292001  tx_win_center[0][0][9] = 0

 4436 00:40:37.295162  tx_first_pass[0][0][9] =  0

 4437 00:40:37.298503  tx_last_pass[0][0][9] =	0

 4438 00:40:37.298588  tx_win_center[0][0][10] = 0

 4439 00:40:37.301846  tx_first_pass[0][0][10] =  0

 4440 00:40:37.305028  tx_last_pass[0][0][10] =	0

 4441 00:40:37.308274  tx_win_center[0][0][11] = 0

 4442 00:40:37.308356  tx_first_pass[0][0][11] =  0

 4443 00:40:37.311709  tx_last_pass[0][0][11] =	0

 4444 00:40:37.315052  tx_win_center[0][0][12] = 0

 4445 00:40:37.318284  tx_first_pass[0][0][12] =  0

 4446 00:40:37.318365  tx_last_pass[0][0][12] =	0

 4447 00:40:37.321653  tx_win_center[0][0][13] = 0

 4448 00:40:37.324320  tx_first_pass[0][0][13] =  0

 4449 00:40:37.327679  tx_last_pass[0][0][13] =	0

 4450 00:40:37.327762  tx_win_center[0][0][14] = 0

 4451 00:40:37.331003  tx_first_pass[0][0][14] =  0

 4452 00:40:37.334459  tx_last_pass[0][0][14] =	0

 4453 00:40:37.337487  tx_win_center[0][0][15] = 0

 4454 00:40:37.337621  tx_first_pass[0][0][15] =  0

 4455 00:40:37.340763  tx_last_pass[0][0][15] =	0

 4456 00:40:37.343983  tx_win_center[0][1][0] = 0

 4457 00:40:37.347455  tx_first_pass[0][1][0] =  0

 4458 00:40:37.347533  tx_last_pass[0][1][0] =	0

 4459 00:40:37.350572  tx_win_center[0][1][1] = 0

 4460 00:40:37.354057  tx_first_pass[0][1][1] =  0

 4461 00:40:37.357300  tx_last_pass[0][1][1] =	0

 4462 00:40:37.357377  tx_win_center[0][1][2] = 0

 4463 00:40:37.360312  tx_first_pass[0][1][2] =  0

 4464 00:40:37.363776  tx_last_pass[0][1][2] =	0

 4465 00:40:37.366870  tx_win_center[0][1][3] = 0

 4466 00:40:37.366948  tx_first_pass[0][1][3] =  0

 4467 00:40:37.370161  tx_last_pass[0][1][3] =	0

 4468 00:40:37.373784  tx_win_center[0][1][4] = 0

 4469 00:40:37.377072  tx_first_pass[0][1][4] =  0

 4470 00:40:37.377149  tx_last_pass[0][1][4] =	0

 4471 00:40:37.380197  tx_win_center[0][1][5] = 0

 4472 00:40:37.383722  tx_first_pass[0][1][5] =  0

 4473 00:40:37.383800  tx_last_pass[0][1][5] =	0

 4474 00:40:37.387137  tx_win_center[0][1][6] = 0

 4475 00:40:37.390393  tx_first_pass[0][1][6] =  0

 4476 00:40:37.393693  tx_last_pass[0][1][6] =	0

 4477 00:40:37.393770  tx_win_center[0][1][7] = 0

 4478 00:40:37.396800  tx_first_pass[0][1][7] =  0

 4479 00:40:37.399900  tx_last_pass[0][1][7] =	0

 4480 00:40:37.403512  tx_win_center[0][1][8] = 0

 4481 00:40:37.403589  tx_first_pass[0][1][8] =  0

 4482 00:40:37.406608  tx_last_pass[0][1][8] =	0

 4483 00:40:37.410177  tx_win_center[0][1][9] = 0

 4484 00:40:37.413339  tx_first_pass[0][1][9] =  0

 4485 00:40:37.413415  tx_last_pass[0][1][9] =	0

 4486 00:40:37.416113  tx_win_center[0][1][10] = 0

 4487 00:40:37.419725  tx_first_pass[0][1][10] =  0

 4488 00:40:37.423099  tx_last_pass[0][1][10] =	0

 4489 00:40:37.423176  tx_win_center[0][1][11] = 0

 4490 00:40:37.426084  tx_first_pass[0][1][11] =  0

 4491 00:40:37.429386  tx_last_pass[0][1][11] =	0

 4492 00:40:37.432860  tx_win_center[0][1][12] = 0

 4493 00:40:37.432937  tx_first_pass[0][1][12] =  0

 4494 00:40:37.436201  tx_last_pass[0][1][12] =	0

 4495 00:40:37.439495  tx_win_center[0][1][13] = 0

 4496 00:40:37.442614  tx_first_pass[0][1][13] =  0

 4497 00:40:37.442691  tx_last_pass[0][1][13] =	0

 4498 00:40:37.445943  tx_win_center[0][1][14] = 0

 4499 00:40:37.449367  tx_first_pass[0][1][14] =  0

 4500 00:40:37.452840  tx_last_pass[0][1][14] =	0

 4501 00:40:37.452916  tx_win_center[0][1][15] = 0

 4502 00:40:37.455994  tx_first_pass[0][1][15] =  0

 4503 00:40:37.458668  tx_last_pass[0][1][15] =	0

 4504 00:40:37.462682  tx_win_center[1][0][0] = 0

 4505 00:40:37.465836  tx_first_pass[1][0][0] =  0

 4506 00:40:37.465912  tx_last_pass[1][0][0] =	0

 4507 00:40:37.468716  tx_win_center[1][0][1] = 0

 4508 00:40:37.472011  tx_first_pass[1][0][1] =  0

 4509 00:40:37.472088  tx_last_pass[1][0][1] =	0

 4510 00:40:37.475076  tx_win_center[1][0][2] = 0

 4511 00:40:37.478522  tx_first_pass[1][0][2] =  0

 4512 00:40:37.481589  tx_last_pass[1][0][2] =	0

 4513 00:40:37.481680  tx_win_center[1][0][3] = 0

 4514 00:40:37.484901  tx_first_pass[1][0][3] =  0

 4515 00:40:37.488155  tx_last_pass[1][0][3] =	0

 4516 00:40:37.491633  tx_win_center[1][0][4] = 0

 4517 00:40:37.491710  tx_first_pass[1][0][4] =  0

 4518 00:40:37.494983  tx_last_pass[1][0][4] =	0

 4519 00:40:37.498387  tx_win_center[1][0][5] = 0

 4520 00:40:37.501836  tx_first_pass[1][0][5] =  0

 4521 00:40:37.501913  tx_last_pass[1][0][5] =	0

 4522 00:40:37.504619  tx_win_center[1][0][6] = 0

 4523 00:40:37.508191  tx_first_pass[1][0][6] =  0

 4524 00:40:37.508268  tx_last_pass[1][0][6] =	0

 4525 00:40:37.511405  tx_win_center[1][0][7] = 0

 4526 00:40:37.514902  tx_first_pass[1][0][7] =  0

 4527 00:40:37.517840  tx_last_pass[1][0][7] =	0

 4528 00:40:37.517939  tx_win_center[1][0][8] = 0

 4529 00:40:37.521528  tx_first_pass[1][0][8] =  0

 4530 00:40:37.524801  tx_last_pass[1][0][8] =	0

 4531 00:40:37.528257  tx_win_center[1][0][9] = 0

 4532 00:40:37.528327  tx_first_pass[1][0][9] =  0

 4533 00:40:37.531303  tx_last_pass[1][0][9] =	0

 4534 00:40:37.534649  tx_win_center[1][0][10] = 0

 4535 00:40:37.538069  tx_first_pass[1][0][10] =  0

 4536 00:40:37.538160  tx_last_pass[1][0][10] =	0

 4537 00:40:37.541467  tx_win_center[1][0][11] = 0

 4538 00:40:37.544130  tx_first_pass[1][0][11] =  0

 4539 00:40:37.547332  tx_last_pass[1][0][11] =	0

 4540 00:40:37.547404  tx_win_center[1][0][12] = 0

 4541 00:40:37.550676  tx_first_pass[1][0][12] =  0

 4542 00:40:37.554309  tx_last_pass[1][0][12] =	0

 4543 00:40:37.557369  tx_win_center[1][0][13] = 0

 4544 00:40:37.557434  tx_first_pass[1][0][13] =  0

 4545 00:40:37.560723  tx_last_pass[1][0][13] =	0

 4546 00:40:37.563980  tx_win_center[1][0][14] = 0

 4547 00:40:37.567530  tx_first_pass[1][0][14] =  0

 4548 00:40:37.567607  tx_last_pass[1][0][14] =	0

 4549 00:40:37.570866  tx_win_center[1][0][15] = 0

 4550 00:40:37.573983  tx_first_pass[1][0][15] =  0

 4551 00:40:37.577402  tx_last_pass[1][0][15] =	0

 4552 00:40:37.577479  tx_win_center[1][1][0] = 0

 4553 00:40:37.580670  tx_first_pass[1][1][0] =  0

 4554 00:40:37.583585  tx_last_pass[1][1][0] =	0

 4555 00:40:37.587195  tx_win_center[1][1][1] = 0

 4556 00:40:37.587272  tx_first_pass[1][1][1] =  0

 4557 00:40:37.590328  tx_last_pass[1][1][1] =	0

 4558 00:40:37.593264  tx_win_center[1][1][2] = 0

 4559 00:40:37.596605  tx_first_pass[1][1][2] =  0

 4560 00:40:37.596682  tx_last_pass[1][1][2] =	0

 4561 00:40:37.600308  tx_win_center[1][1][3] = 0

 4562 00:40:37.603642  tx_first_pass[1][1][3] =  0

 4563 00:40:37.606404  tx_last_pass[1][1][3] =	0

 4564 00:40:37.606481  tx_win_center[1][1][4] = 0

 4565 00:40:37.609960  tx_first_pass[1][1][4] =  0

 4566 00:40:37.613042  tx_last_pass[1][1][4] =	0

 4567 00:40:37.616356  tx_win_center[1][1][5] = 0

 4568 00:40:37.616434  tx_first_pass[1][1][5] =  0

 4569 00:40:37.619699  tx_last_pass[1][1][5] =	0

 4570 00:40:37.622902  tx_win_center[1][1][6] = 0

 4571 00:40:37.622979  tx_first_pass[1][1][6] =  0

 4572 00:40:37.626579  tx_last_pass[1][1][6] =	0

 4573 00:40:37.629494  tx_win_center[1][1][7] = 0

 4574 00:40:37.633065  tx_first_pass[1][1][7] =  0

 4575 00:40:37.633142  tx_last_pass[1][1][7] =	0

 4576 00:40:37.636263  tx_win_center[1][1][8] = 0

 4577 00:40:37.639586  tx_first_pass[1][1][8] =  0

 4578 00:40:37.642889  tx_last_pass[1][1][8] =	0

 4579 00:40:37.642965  tx_win_center[1][1][9] = 0

 4580 00:40:37.646272  tx_first_pass[1][1][9] =  0

 4581 00:40:37.649387  tx_last_pass[1][1][9] =	0

 4582 00:40:37.652779  tx_win_center[1][1][10] = 0

 4583 00:40:37.652856  tx_first_pass[1][1][10] =  0

 4584 00:40:37.656141  tx_last_pass[1][1][10] =	0

 4585 00:40:37.659116  tx_win_center[1][1][11] = 0

 4586 00:40:37.662168  tx_first_pass[1][1][11] =  0

 4587 00:40:37.662244  tx_last_pass[1][1][11] =	0

 4588 00:40:37.665402  tx_win_center[1][1][12] = 0

 4589 00:40:37.668891  tx_first_pass[1][1][12] =  0

 4590 00:40:37.672190  tx_last_pass[1][1][12] =	0

 4591 00:40:37.672259  tx_win_center[1][1][13] = 0

 4592 00:40:37.675268  tx_first_pass[1][1][13] =  0

 4593 00:40:37.678673  tx_last_pass[1][1][13] =	0

 4594 00:40:37.682037  tx_win_center[1][1][14] = 0

 4595 00:40:37.685333  tx_first_pass[1][1][14] =  0

 4596 00:40:37.685402  tx_last_pass[1][1][14] =	0

 4597 00:40:37.688739  tx_win_center[1][1][15] = 0

 4598 00:40:37.692248  tx_first_pass[1][1][15] =  0

 4599 00:40:37.694787  tx_last_pass[1][1][15] =	0

 4600 00:40:37.694855  dump params rx window

 4601 00:40:37.698086  rx_firspass[0][0][0] = 0

 4602 00:40:37.701328  rx_lastpass[0][0][0] =  0

 4603 00:40:37.701393  rx_firspass[0][0][1] = 0

 4604 00:40:37.704771  rx_lastpass[0][0][1] =  0

 4605 00:40:37.708261  rx_firspass[0][0][2] = 0

 4606 00:40:37.708336  rx_lastpass[0][0][2] =  0

 4607 00:40:37.711267  rx_firspass[0][0][3] = 0

 4608 00:40:37.714774  rx_lastpass[0][0][3] =  0

 4609 00:40:37.714842  rx_firspass[0][0][4] = 0

 4610 00:40:37.717801  rx_lastpass[0][0][4] =  0

 4611 00:40:37.721112  rx_firspass[0][0][5] = 0

 4612 00:40:37.724534  rx_lastpass[0][0][5] =  0

 4613 00:40:37.724602  rx_firspass[0][0][6] = 0

 4614 00:40:37.727897  rx_lastpass[0][0][6] =  0

 4615 00:40:37.731320  rx_firspass[0][0][7] = 0

 4616 00:40:37.731386  rx_lastpass[0][0][7] =  0

 4617 00:40:37.734724  rx_firspass[0][0][8] = 0

 4618 00:40:37.737769  rx_lastpass[0][0][8] =  0

 4619 00:40:37.737836  rx_firspass[0][0][9] = 0

 4620 00:40:37.740830  rx_lastpass[0][0][9] =  0

 4621 00:40:37.744389  rx_firspass[0][0][10] = 0

 4622 00:40:37.747528  rx_lastpass[0][0][10] =  0

 4623 00:40:37.747602  rx_firspass[0][0][11] = 0

 4624 00:40:37.751093  rx_lastpass[0][0][11] =  0

 4625 00:40:37.754022  rx_firspass[0][0][12] = 0

 4626 00:40:37.754089  rx_lastpass[0][0][12] =  0

 4627 00:40:37.757147  rx_firspass[0][0][13] = 0

 4628 00:40:37.761063  rx_lastpass[0][0][13] =  0

 4629 00:40:37.764328  rx_firspass[0][0][14] = 0

 4630 00:40:37.764395  rx_lastpass[0][0][14] =  0

 4631 00:40:37.767609  rx_firspass[0][0][15] = 0

 4632 00:40:37.770306  rx_lastpass[0][0][15] =  0

 4633 00:40:37.770380  rx_firspass[0][1][0] = 0

 4634 00:40:37.773767  rx_lastpass[0][1][0] =  0

 4635 00:40:37.777125  rx_firspass[0][1][1] = 0

 4636 00:40:37.780120  rx_lastpass[0][1][1] =  0

 4637 00:40:37.780190  rx_firspass[0][1][2] = 0

 4638 00:40:37.783437  rx_lastpass[0][1][2] =  0

 4639 00:40:37.786821  rx_firspass[0][1][3] = 0

 4640 00:40:37.786895  rx_lastpass[0][1][3] =  0

 4641 00:40:37.790052  rx_firspass[0][1][4] = 0

 4642 00:40:37.793530  rx_lastpass[0][1][4] =  0

 4643 00:40:37.793641  rx_firspass[0][1][5] = 0

 4644 00:40:37.796768  rx_lastpass[0][1][5] =  0

 4645 00:40:37.800227  rx_firspass[0][1][6] = 0

 4646 00:40:37.803751  rx_lastpass[0][1][6] =  0

 4647 00:40:37.803904  rx_firspass[0][1][7] = 0

 4648 00:40:37.806640  rx_lastpass[0][1][7] =  0

 4649 00:40:37.809824  rx_firspass[0][1][8] = 0

 4650 00:40:37.809977  rx_lastpass[0][1][8] =  0

 4651 00:40:37.813179  rx_firspass[0][1][9] = 0

 4652 00:40:37.816537  rx_lastpass[0][1][9] =  0

 4653 00:40:37.816673  rx_firspass[0][1][10] = 0

 4654 00:40:37.819559  rx_lastpass[0][1][10] =  0

 4655 00:40:37.822698  rx_firspass[0][1][11] = 0

 4656 00:40:37.825920  rx_lastpass[0][1][11] =  0

 4657 00:40:37.826068  rx_firspass[0][1][12] = 0

 4658 00:40:37.829145  rx_lastpass[0][1][12] =  0

 4659 00:40:37.832505  rx_firspass[0][1][13] = 0

 4660 00:40:37.832597  rx_lastpass[0][1][13] =  0

 4661 00:40:37.836092  rx_firspass[0][1][14] = 0

 4662 00:40:37.839553  rx_lastpass[0][1][14] =  0

 4663 00:40:37.842832  rx_firspass[0][1][15] = 0

 4664 00:40:37.842909  rx_lastpass[0][1][15] =  0

 4665 00:40:37.846130  rx_firspass[1][0][0] = 0

 4666 00:40:37.848872  rx_lastpass[1][0][0] =  0

 4667 00:40:37.848981  rx_firspass[1][0][1] = 0

 4668 00:40:37.852797  rx_lastpass[1][0][1] =  0

 4669 00:40:37.855690  rx_firspass[1][0][2] = 0

 4670 00:40:37.859292  rx_lastpass[1][0][2] =  0

 4671 00:40:37.859369  rx_firspass[1][0][3] = 0

 4672 00:40:37.862301  rx_lastpass[1][0][3] =  0

 4673 00:40:37.865238  rx_firspass[1][0][4] = 0

 4674 00:40:37.865302  rx_lastpass[1][0][4] =  0

 4675 00:40:37.868821  rx_firspass[1][0][5] = 0

 4676 00:40:37.872180  rx_lastpass[1][0][5] =  0

 4677 00:40:37.872255  rx_firspass[1][0][6] = 0

 4678 00:40:37.875265  rx_lastpass[1][0][6] =  0

 4679 00:40:37.878405  rx_firspass[1][0][7] = 0

 4680 00:40:37.882066  rx_lastpass[1][0][7] =  0

 4681 00:40:37.882142  rx_firspass[1][0][8] = 0

 4682 00:40:37.885149  rx_lastpass[1][0][8] =  0

 4683 00:40:37.888263  rx_firspass[1][0][9] = 0

 4684 00:40:37.888340  rx_lastpass[1][0][9] =  0

 4685 00:40:37.891483  rx_firspass[1][0][10] = 0

 4686 00:40:37.894867  rx_lastpass[1][0][10] =  0

 4687 00:40:37.894944  rx_firspass[1][0][11] = 0

 4688 00:40:37.898142  rx_lastpass[1][0][11] =  0

 4689 00:40:37.901522  rx_firspass[1][0][12] = 0

 4690 00:40:37.904953  rx_lastpass[1][0][12] =  0

 4691 00:40:37.905029  rx_firspass[1][0][13] = 0

 4692 00:40:37.908351  rx_lastpass[1][0][13] =  0

 4693 00:40:37.911600  rx_firspass[1][0][14] = 0

 4694 00:40:37.915109  rx_lastpass[1][0][14] =  0

 4695 00:40:37.915184  rx_firspass[1][0][15] = 0

 4696 00:40:37.917641  rx_lastpass[1][0][15] =  0

 4697 00:40:37.921102  rx_firspass[1][1][0] = 0

 4698 00:40:37.921177  rx_lastpass[1][1][0] =  0

 4699 00:40:37.924408  rx_firspass[1][1][1] = 0

 4700 00:40:37.927628  rx_lastpass[1][1][1] =  0

 4701 00:40:37.927704  rx_firspass[1][1][2] = 0

 4702 00:40:37.931144  rx_lastpass[1][1][2] =  0

 4703 00:40:37.934449  rx_firspass[1][1][3] = 0

 4704 00:40:37.937778  rx_lastpass[1][1][3] =  0

 4705 00:40:37.937854  rx_firspass[1][1][4] = 0

 4706 00:40:37.940521  rx_lastpass[1][1][4] =  0

 4707 00:40:37.944176  rx_firspass[1][1][5] = 0

 4708 00:40:37.944252  rx_lastpass[1][1][5] =  0

 4709 00:40:37.947197  rx_firspass[1][1][6] = 0

 4710 00:40:37.950830  rx_lastpass[1][1][6] =  0

 4711 00:40:37.950906  rx_firspass[1][1][7] = 0

 4712 00:40:37.954109  rx_lastpass[1][1][7] =  0

 4713 00:40:37.957417  rx_firspass[1][1][8] = 0

 4714 00:40:37.960700  rx_lastpass[1][1][8] =  0

 4715 00:40:37.960776  rx_firspass[1][1][9] = 0

 4716 00:40:37.963953  rx_lastpass[1][1][9] =  0

 4717 00:40:37.967436  rx_firspass[1][1][10] = 0

 4718 00:40:37.967512  rx_lastpass[1][1][10] =  0

 4719 00:40:37.970198  rx_firspass[1][1][11] = 0

 4720 00:40:37.973346  rx_lastpass[1][1][11] =  0

 4721 00:40:37.976724  rx_firspass[1][1][12] = 0

 4722 00:40:37.976824  rx_lastpass[1][1][12] =  0

 4723 00:40:37.980546  rx_firspass[1][1][13] = 0

 4724 00:40:37.983740  rx_lastpass[1][1][13] =  0

 4725 00:40:37.983815  rx_firspass[1][1][14] = 0

 4726 00:40:37.986740  rx_lastpass[1][1][14] =  0

 4727 00:40:37.989839  rx_firspass[1][1][15] = 0

 4728 00:40:37.993458  rx_lastpass[1][1][15] =  0

 4729 00:40:37.993560  dump params clk_delay

 4730 00:40:37.996904  clk_delay[0] = 0

 4731 00:40:37.996980  clk_delay[1] = 0

 4732 00:40:37.999524  dump params dqs_delay

 4733 00:40:37.999600  dqs_delay[0][0] = 0

 4734 00:40:38.002851  dqs_delay[0][1] = 0

 4735 00:40:38.002951  dqs_delay[1][0] = 0

 4736 00:40:38.006491  dqs_delay[1][1] = 0

 4737 00:40:38.009763  dump params delay_cell_unit = 753

 4738 00:40:38.009839  dump source = 0x0

 4739 00:40:38.013121  dump params frequency:800

 4740 00:40:38.016524  dump params rank number:2

 4741 00:40:38.016599  

 4742 00:40:38.019903   dump params write leveling

 4743 00:40:38.019979  write leveling[0][0][0] = 0x0

 4744 00:40:38.022539  write leveling[0][0][1] = 0x0

 4745 00:40:38.026122  write leveling[0][1][0] = 0x0

 4746 00:40:38.029268  write leveling[0][1][1] = 0x0

 4747 00:40:38.032374  write leveling[1][0][0] = 0x0

 4748 00:40:38.035830  write leveling[1][0][1] = 0x0

 4749 00:40:38.035906  write leveling[1][1][0] = 0x0

 4750 00:40:38.039004  write leveling[1][1][1] = 0x0

 4751 00:40:38.042517  dump params cbt_cs

 4752 00:40:38.042618  cbt_cs[0][0] = 0x0

 4753 00:40:38.045860  cbt_cs[0][1] = 0x0

 4754 00:40:38.045935  cbt_cs[1][0] = 0x0

 4755 00:40:38.049207  cbt_cs[1][1] = 0x0

 4756 00:40:38.049283  dump params cbt_mr12

 4757 00:40:38.052551  cbt_mr12[0][0] = 0x0

 4758 00:40:38.055902  cbt_mr12[0][1] = 0x0

 4759 00:40:38.056003  cbt_mr12[1][0] = 0x0

 4760 00:40:38.058892  cbt_mr12[1][1] = 0x0

 4761 00:40:38.058967  dump params tx window

 4762 00:40:38.061986  tx_center_min[0][0][0] = 0

 4763 00:40:38.065419  tx_center_max[0][0][0] =  0

 4764 00:40:38.068682  tx_center_min[0][0][1] = 0

 4765 00:40:38.068758  tx_center_max[0][0][1] =  0

 4766 00:40:38.072134  tx_center_min[0][1][0] = 0

 4767 00:40:38.075450  tx_center_max[0][1][0] =  0

 4768 00:40:38.075526  tx_center_min[0][1][1] = 0

 4769 00:40:38.078339  tx_center_max[0][1][1] =  0

 4770 00:40:38.081555  tx_center_min[1][0][0] = 0

 4771 00:40:38.084957  tx_center_max[1][0][0] =  0

 4772 00:40:38.085032  tx_center_min[1][0][1] = 0

 4773 00:40:38.088264  tx_center_max[1][0][1] =  0

 4774 00:40:38.091421  tx_center_min[1][1][0] = 0

 4775 00:40:38.094824  tx_center_max[1][1][0] =  0

 4776 00:40:38.094900  tx_center_min[1][1][1] = 0

 4777 00:40:38.098029  tx_center_max[1][1][1] =  0

 4778 00:40:38.101454  dump params tx window

 4779 00:40:38.104793  tx_win_center[0][0][0] = 0

 4780 00:40:38.104869  tx_first_pass[0][0][0] =  0

 4781 00:40:38.108137  tx_last_pass[0][0][0] =	0

 4782 00:40:38.111357  tx_win_center[0][0][1] = 0

 4783 00:40:38.114394  tx_first_pass[0][0][1] =  0

 4784 00:40:38.114470  tx_last_pass[0][0][1] =	0

 4785 00:40:38.118045  tx_win_center[0][0][2] = 0

 4786 00:40:38.121341  tx_first_pass[0][0][2] =  0

 4787 00:40:38.121450  tx_last_pass[0][0][2] =	0

 4788 00:40:38.124424  tx_win_center[0][0][3] = 0

 4789 00:40:38.127882  tx_first_pass[0][0][3] =  0

 4790 00:40:38.131081  tx_last_pass[0][0][3] =	0

 4791 00:40:38.131158  tx_win_center[0][0][4] = 0

 4792 00:40:38.134044  tx_first_pass[0][0][4] =  0

 4793 00:40:38.137592  tx_last_pass[0][0][4] =	0

 4794 00:40:38.141018  tx_win_center[0][0][5] = 0

 4795 00:40:38.141094  tx_first_pass[0][0][5] =  0

 4796 00:40:38.144286  tx_last_pass[0][0][5] =	0

 4797 00:40:38.147695  tx_win_center[0][0][6] = 0

 4798 00:40:38.150432  tx_first_pass[0][0][6] =  0

 4799 00:40:38.150509  tx_last_pass[0][0][6] =	0

 4800 00:40:38.153931  tx_win_center[0][0][7] = 0

 4801 00:40:38.157212  tx_first_pass[0][0][7] =  0

 4802 00:40:38.157288  tx_last_pass[0][0][7] =	0

 4803 00:40:38.160656  tx_win_center[0][0][8] = 0

 4804 00:40:38.163986  tx_first_pass[0][0][8] =  0

 4805 00:40:38.167199  tx_last_pass[0][0][8] =	0

 4806 00:40:38.167275  tx_win_center[0][0][9] = 0

 4807 00:40:38.170440  tx_first_pass[0][0][9] =  0

 4808 00:40:38.173432  tx_last_pass[0][0][9] =	0

 4809 00:40:38.177096  tx_win_center[0][0][10] = 0

 4810 00:40:38.177172  tx_first_pass[0][0][10] =  0

 4811 00:40:38.179891  tx_last_pass[0][0][10] =	0

 4812 00:40:38.183284  tx_win_center[0][0][11] = 0

 4813 00:40:38.186684  tx_first_pass[0][0][11] =  0

 4814 00:40:38.186760  tx_last_pass[0][0][11] =	0

 4815 00:40:38.190308  tx_win_center[0][0][12] = 0

 4816 00:40:38.193221  tx_first_pass[0][0][12] =  0

 4817 00:40:38.197089  tx_last_pass[0][0][12] =	0

 4818 00:40:38.197165  tx_win_center[0][0][13] = 0

 4819 00:40:38.199863  tx_first_pass[0][0][13] =  0

 4820 00:40:38.203122  tx_last_pass[0][0][13] =	0

 4821 00:40:38.206575  tx_win_center[0][0][14] = 0

 4822 00:40:38.209801  tx_first_pass[0][0][14] =  0

 4823 00:40:38.209877  tx_last_pass[0][0][14] =	0

 4824 00:40:38.213308  tx_win_center[0][0][15] = 0

 4825 00:40:38.216739  tx_first_pass[0][0][15] =  0

 4826 00:40:38.219904  tx_last_pass[0][0][15] =	0

 4827 00:40:38.220002  tx_win_center[0][1][0] = 0

 4828 00:40:38.222790  tx_first_pass[0][1][0] =  0

 4829 00:40:38.226613  tx_last_pass[0][1][0] =	0

 4830 00:40:38.229470  tx_win_center[0][1][1] = 0

 4831 00:40:38.229551  tx_first_pass[0][1][1] =  0

 4832 00:40:38.232551  tx_last_pass[0][1][1] =	0

 4833 00:40:38.235828  tx_win_center[0][1][2] = 0

 4834 00:40:38.239656  tx_first_pass[0][1][2] =  0

 4835 00:40:38.239732  tx_last_pass[0][1][2] =	0

 4836 00:40:38.242401  tx_win_center[0][1][3] = 0

 4837 00:40:38.245996  tx_first_pass[0][1][3] =  0

 4838 00:40:38.246095  tx_last_pass[0][1][3] =	0

 4839 00:40:38.249071  tx_win_center[0][1][4] = 0

 4840 00:40:38.252413  tx_first_pass[0][1][4] =  0

 4841 00:40:38.255828  tx_last_pass[0][1][4] =	0

 4842 00:40:38.255904  tx_win_center[0][1][5] = 0

 4843 00:40:38.259320  tx_first_pass[0][1][5] =  0

 4844 00:40:38.261868  tx_last_pass[0][1][5] =	0

 4845 00:40:38.265507  tx_win_center[0][1][6] = 0

 4846 00:40:38.265629  tx_first_pass[0][1][6] =  0

 4847 00:40:38.268808  tx_last_pass[0][1][6] =	0

 4848 00:40:38.272249  tx_win_center[0][1][7] = 0

 4849 00:40:38.275720  tx_first_pass[0][1][7] =  0

 4850 00:40:38.275796  tx_last_pass[0][1][7] =	0

 4851 00:40:38.278373  tx_win_center[0][1][8] = 0

 4852 00:40:38.281910  tx_first_pass[0][1][8] =  0

 4853 00:40:38.285070  tx_last_pass[0][1][8] =	0

 4854 00:40:38.285170  tx_win_center[0][1][9] = 0

 4855 00:40:38.288251  tx_first_pass[0][1][9] =  0

 4856 00:40:38.291880  tx_last_pass[0][1][9] =	0

 4857 00:40:38.291955  tx_win_center[0][1][10] = 0

 4858 00:40:38.294776  tx_first_pass[0][1][10] =  0

 4859 00:40:38.297865  tx_last_pass[0][1][10] =	0

 4860 00:40:38.301458  tx_win_center[0][1][11] = 0

 4861 00:40:38.304847  tx_first_pass[0][1][11] =  0

 4862 00:40:38.304923  tx_last_pass[0][1][11] =	0

 4863 00:40:38.308318  tx_win_center[0][1][12] = 0

 4864 00:40:38.311057  tx_first_pass[0][1][12] =  0

 4865 00:40:38.314373  tx_last_pass[0][1][12] =	0

 4866 00:40:38.314449  tx_win_center[0][1][13] = 0

 4867 00:40:38.317513  tx_first_pass[0][1][13] =  0

 4868 00:40:38.320725  tx_last_pass[0][1][13] =	0

 4869 00:40:38.324166  tx_win_center[0][1][14] = 0

 4870 00:40:38.324245  tx_first_pass[0][1][14] =  0

 4871 00:40:38.327535  tx_last_pass[0][1][14] =	0

 4872 00:40:38.330590  tx_win_center[0][1][15] = 0

 4873 00:40:38.333978  tx_first_pass[0][1][15] =  0

 4874 00:40:38.337363  tx_last_pass[0][1][15] =	0

 4875 00:40:38.337439  tx_win_center[1][0][0] = 0

 4876 00:40:38.340866  tx_first_pass[1][0][0] =  0

 4877 00:40:38.343624  tx_last_pass[1][0][0] =	0

 4878 00:40:38.343702  tx_win_center[1][0][1] = 0

 4879 00:40:38.346925  tx_first_pass[1][0][1] =  0

 4880 00:40:38.350223  tx_last_pass[1][0][1] =	0

 4881 00:40:38.353915  tx_win_center[1][0][2] = 0

 4882 00:40:38.353991  tx_first_pass[1][0][2] =  0

 4883 00:40:38.356864  tx_last_pass[1][0][2] =	0

 4884 00:40:38.360317  tx_win_center[1][0][3] = 0

 4885 00:40:38.363227  tx_first_pass[1][0][3] =  0

 4886 00:40:38.363303  tx_last_pass[1][0][3] =	0

 4887 00:40:38.366579  tx_win_center[1][0][4] = 0

 4888 00:40:38.369928  tx_first_pass[1][0][4] =  0

 4889 00:40:38.373298  tx_last_pass[1][0][4] =	0

 4890 00:40:38.373375  tx_win_center[1][0][5] = 0

 4891 00:40:38.376710  tx_first_pass[1][0][5] =  0

 4892 00:40:38.379432  tx_last_pass[1][0][5] =	0

 4893 00:40:38.382806  tx_win_center[1][0][6] = 0

 4894 00:40:38.382883  tx_first_pass[1][0][6] =  0

 4895 00:40:38.386452  tx_last_pass[1][0][6] =	0

 4896 00:40:38.389784  tx_win_center[1][0][7] = 0

 4897 00:40:38.393111  tx_first_pass[1][0][7] =  0

 4898 00:40:38.393188  tx_last_pass[1][0][7] =	0

 4899 00:40:38.395995  tx_win_center[1][0][8] = 0

 4900 00:40:38.399225  tx_first_pass[1][0][8] =  0

 4901 00:40:38.399301  tx_last_pass[1][0][8] =	0

 4902 00:40:38.402663  tx_win_center[1][0][9] = 0

 4903 00:40:38.405986  tx_first_pass[1][0][9] =  0

 4904 00:40:38.409412  tx_last_pass[1][0][9] =	0

 4905 00:40:38.409523  tx_win_center[1][0][10] = 0

 4906 00:40:38.412315  tx_first_pass[1][0][10] =  0

 4907 00:40:38.415405  tx_last_pass[1][0][10] =	0

 4908 00:40:38.419101  tx_win_center[1][0][11] = 0

 4909 00:40:38.422197  tx_first_pass[1][0][11] =  0

 4910 00:40:38.422264  tx_last_pass[1][0][11] =	0

 4911 00:40:38.425238  tx_win_center[1][0][12] = 0

 4912 00:40:38.428931  tx_first_pass[1][0][12] =  0

 4913 00:40:38.431859  tx_last_pass[1][0][12] =	0

 4914 00:40:38.431989  tx_win_center[1][0][13] = 0

 4915 00:40:38.435138  tx_first_pass[1][0][13] =  0

 4916 00:40:38.438562  tx_last_pass[1][0][13] =	0

 4917 00:40:38.441662  tx_win_center[1][0][14] = 0

 4918 00:40:38.441728  tx_first_pass[1][0][14] =  0

 4919 00:40:38.445091  tx_last_pass[1][0][14] =	0

 4920 00:40:38.448960  tx_win_center[1][0][15] = 0

 4921 00:40:38.451503  tx_first_pass[1][0][15] =  0

 4922 00:40:38.451598  tx_last_pass[1][0][15] =	0

 4923 00:40:38.455017  tx_win_center[1][1][0] = 0

 4924 00:40:38.458309  tx_first_pass[1][1][0] =  0

 4925 00:40:38.461167  tx_last_pass[1][1][0] =	0

 4926 00:40:38.461243  tx_win_center[1][1][1] = 0

 4927 00:40:38.464446  tx_first_pass[1][1][1] =  0

 4928 00:40:38.467630  tx_last_pass[1][1][1] =	0

 4929 00:40:38.471509  tx_win_center[1][1][2] = 0

 4930 00:40:38.471586  tx_first_pass[1][1][2] =  0

 4931 00:40:38.474427  tx_last_pass[1][1][2] =	0

 4932 00:40:38.477864  tx_win_center[1][1][3] = 0

 4933 00:40:38.481368  tx_first_pass[1][1][3] =  0

 4934 00:40:38.481468  tx_last_pass[1][1][3] =	0

 4935 00:40:38.484232  tx_win_center[1][1][4] = 0

 4936 00:40:38.487888  tx_first_pass[1][1][4] =  0

 4937 00:40:38.487960  tx_last_pass[1][1][4] =	0

 4938 00:40:38.490689  tx_win_center[1][1][5] = 0

 4939 00:40:38.494077  tx_first_pass[1][1][5] =  0

 4940 00:40:38.497494  tx_last_pass[1][1][5] =	0

 4941 00:40:38.497610  tx_win_center[1][1][6] = 0

 4942 00:40:38.500853  tx_first_pass[1][1][6] =  0

 4943 00:40:38.504295  tx_last_pass[1][1][6] =	0

 4944 00:40:38.507077  tx_win_center[1][1][7] = 0

 4945 00:40:38.507169  tx_first_pass[1][1][7] =  0

 4946 00:40:38.510349  tx_last_pass[1][1][7] =	0

 4947 00:40:38.513867  tx_win_center[1][1][8] = 0

 4948 00:40:38.517033  tx_first_pass[1][1][8] =  0

 4949 00:40:38.517110  tx_last_pass[1][1][8] =	0

 4950 00:40:38.520258  tx_win_center[1][1][9] = 0

 4951 00:40:38.523542  tx_first_pass[1][1][9] =  0

 4952 00:40:38.526746  tx_last_pass[1][1][9] =	0

 4953 00:40:38.526822  tx_win_center[1][1][10] = 0

 4954 00:40:38.530200  tx_first_pass[1][1][10] =  0

 4955 00:40:38.533730  tx_last_pass[1][1][10] =	0

 4956 00:40:38.537065  tx_win_center[1][1][11] = 0

 4957 00:40:38.537145  tx_first_pass[1][1][11] =  0

 4958 00:40:38.540023  tx_last_pass[1][1][11] =	0

 4959 00:40:38.543040  tx_win_center[1][1][12] = 0

 4960 00:40:38.546381  tx_first_pass[1][1][12] =  0

 4961 00:40:38.546481  tx_last_pass[1][1][12] =	0

 4962 00:40:38.549678  tx_win_center[1][1][13] = 0

 4963 00:40:38.552979  tx_first_pass[1][1][13] =  0

 4964 00:40:38.556715  tx_last_pass[1][1][13] =	0

 4965 00:40:38.556805  tx_win_center[1][1][14] = 0

 4966 00:40:38.560138  tx_first_pass[1][1][14] =  0

 4967 00:40:38.562736  tx_last_pass[1][1][14] =	0

 4968 00:40:38.566029  tx_win_center[1][1][15] = 0

 4969 00:40:38.569901  tx_first_pass[1][1][15] =  0

 4970 00:40:38.569991  tx_last_pass[1][1][15] =	0

 4971 00:40:38.572916  dump params rx window

 4972 00:40:38.576421  rx_firspass[0][0][0] = 0

 4973 00:40:38.576510  rx_lastpass[0][0][0] =  0

 4974 00:40:38.579881  rx_firspass[0][0][1] = 0

 4975 00:40:38.582393  rx_lastpass[0][0][1] =  0

 4976 00:40:38.582484  rx_firspass[0][0][2] = 0

 4977 00:40:38.585679  rx_lastpass[0][0][2] =  0

 4978 00:40:38.589408  rx_firspass[0][0][3] = 0

 4979 00:40:38.589478  rx_lastpass[0][0][3] =  0

 4980 00:40:38.592693  rx_firspass[0][0][4] = 0

 4981 00:40:38.595962  rx_lastpass[0][0][4] =  0

 4982 00:40:38.598892  rx_firspass[0][0][5] = 0

 4983 00:40:38.598968  rx_lastpass[0][0][5] =  0

 4984 00:40:38.602340  rx_firspass[0][0][6] = 0

 4985 00:40:38.605756  rx_lastpass[0][0][6] =  0

 4986 00:40:38.605833  rx_firspass[0][0][7] = 0

 4987 00:40:38.609193  rx_lastpass[0][0][7] =  0

 4988 00:40:38.611827  rx_firspass[0][0][8] = 0

 4989 00:40:38.611903  rx_lastpass[0][0][8] =  0

 4990 00:40:38.615349  rx_firspass[0][0][9] = 0

 4991 00:40:38.618518  rx_lastpass[0][0][9] =  0

 4992 00:40:38.621798  rx_firspass[0][0][10] = 0

 4993 00:40:38.621874  rx_lastpass[0][0][10] =  0

 4994 00:40:38.625064  rx_firspass[0][0][11] = 0

 4995 00:40:38.628363  rx_lastpass[0][0][11] =  0

 4996 00:40:38.628440  rx_firspass[0][0][12] = 0

 4997 00:40:38.631537  rx_lastpass[0][0][12] =  0

 4998 00:40:38.634736  rx_firspass[0][0][13] = 0

 4999 00:40:38.638118  rx_lastpass[0][0][13] =  0

 5000 00:40:38.638194  rx_firspass[0][0][14] = 0

 5001 00:40:38.641520  rx_lastpass[0][0][14] =  0

 5002 00:40:38.644806  rx_firspass[0][0][15] = 0

 5003 00:40:38.644882  rx_lastpass[0][0][15] =  0

 5004 00:40:38.648201  rx_firspass[0][1][0] = 0

 5005 00:40:38.651553  rx_lastpass[0][1][0] =  0

 5006 00:40:38.654431  rx_firspass[0][1][1] = 0

 5007 00:40:38.654507  rx_lastpass[0][1][1] =  0

 5008 00:40:38.658177  rx_firspass[0][1][2] = 0

 5009 00:40:38.661653  rx_lastpass[0][1][2] =  0

 5010 00:40:38.661728  rx_firspass[0][1][3] = 0

 5011 00:40:38.664498  rx_lastpass[0][1][3] =  0

 5012 00:40:38.667724  rx_firspass[0][1][4] = 0

 5013 00:40:38.667799  rx_lastpass[0][1][4] =  0

 5014 00:40:38.670870  rx_firspass[0][1][5] = 0

 5015 00:40:38.674696  rx_lastpass[0][1][5] =  0

 5016 00:40:38.677465  rx_firspass[0][1][6] = 0

 5017 00:40:38.677604  rx_lastpass[0][1][6] =  0

 5018 00:40:38.681130  rx_firspass[0][1][7] = 0

 5019 00:40:38.683938  rx_lastpass[0][1][7] =  0

 5020 00:40:38.684069  rx_firspass[0][1][8] = 0

 5021 00:40:38.687341  rx_lastpass[0][1][8] =  0

 5022 00:40:38.691103  rx_firspass[0][1][9] = 0

 5023 00:40:38.691171  rx_lastpass[0][1][9] =  0

 5024 00:40:38.694409  rx_firspass[0][1][10] = 0

 5025 00:40:38.697429  rx_lastpass[0][1][10] =  0

 5026 00:40:38.700675  rx_firspass[0][1][11] = 0

 5027 00:40:38.700768  rx_lastpass[0][1][11] =  0

 5028 00:40:38.703903  rx_firspass[0][1][12] = 0

 5029 00:40:38.707111  rx_lastpass[0][1][12] =  0

 5030 00:40:38.707186  rx_firspass[0][1][13] = 0

 5031 00:40:38.710234  rx_lastpass[0][1][13] =  0

 5032 00:40:38.713820  rx_firspass[0][1][14] = 0

 5033 00:40:38.717318  rx_lastpass[0][1][14] =  0

 5034 00:40:38.717394  rx_firspass[0][1][15] = 0

 5035 00:40:38.720502  rx_lastpass[0][1][15] =  0

 5036 00:40:38.723764  rx_firspass[1][0][0] = 0

 5037 00:40:38.723839  rx_lastpass[1][0][0] =  0

 5038 00:40:38.727159  rx_firspass[1][0][1] = 0

 5039 00:40:38.730436  rx_lastpass[1][0][1] =  0

 5040 00:40:38.733089  rx_firspass[1][0][2] = 0

 5041 00:40:38.733165  rx_lastpass[1][0][2] =  0

 5042 00:40:38.737034  rx_firspass[1][0][3] = 0

 5043 00:40:38.740259  rx_lastpass[1][0][3] =  0

 5044 00:40:38.740402  rx_firspass[1][0][4] = 0

 5045 00:40:38.743547  rx_lastpass[1][0][4] =  0

 5046 00:40:38.746869  rx_firspass[1][0][5] = 0

 5047 00:40:38.746945  rx_lastpass[1][0][5] =  0

 5048 00:40:38.750509  rx_firspass[1][0][6] = 0

 5049 00:40:38.753023  rx_lastpass[1][0][6] =  0

 5050 00:40:38.753098  rx_firspass[1][0][7] = 0

 5051 00:40:38.756639  rx_lastpass[1][0][7] =  0

 5052 00:40:38.759884  rx_firspass[1][0][8] = 0

 5053 00:40:38.763165  rx_lastpass[1][0][8] =  0

 5054 00:40:38.763241  rx_firspass[1][0][9] = 0

 5055 00:40:38.766446  rx_lastpass[1][0][9] =  0

 5056 00:40:38.770070  rx_firspass[1][0][10] = 0

 5057 00:40:38.770145  rx_lastpass[1][0][10] =  0

 5058 00:40:38.773433  rx_firspass[1][0][11] = 0

 5059 00:40:38.776610  rx_lastpass[1][0][11] =  0

 5060 00:40:38.779410  rx_firspass[1][0][12] = 0

 5061 00:40:38.779486  rx_lastpass[1][0][12] =  0

 5062 00:40:38.782793  rx_firspass[1][0][13] = 0

 5063 00:40:38.786065  rx_lastpass[1][0][13] =  0

 5064 00:40:38.786141  rx_firspass[1][0][14] = 0

 5065 00:40:38.789313  rx_lastpass[1][0][14] =  0

 5066 00:40:38.793173  rx_firspass[1][0][15] = 0

 5067 00:40:38.796083  rx_lastpass[1][0][15] =  0

 5068 00:40:38.796161  rx_firspass[1][1][0] = 0

 5069 00:40:38.799013  rx_lastpass[1][1][0] =  0

 5070 00:40:38.802653  rx_firspass[1][1][1] = 0

 5071 00:40:38.802729  rx_lastpass[1][1][1] =  0

 5072 00:40:38.805508  rx_firspass[1][1][2] = 0

 5073 00:40:38.809083  rx_lastpass[1][1][2] =  0

 5074 00:40:38.809159  rx_firspass[1][1][3] = 0

 5075 00:40:38.812217  rx_lastpass[1][1][3] =  0

 5076 00:40:38.815340  rx_firspass[1][1][4] = 0

 5077 00:40:38.819067  rx_lastpass[1][1][4] =  0

 5078 00:40:38.819174  rx_firspass[1][1][5] = 0

 5079 00:40:38.822206  rx_lastpass[1][1][5] =  0

 5080 00:40:38.825754  rx_firspass[1][1][6] = 0

 5081 00:40:38.825840  rx_lastpass[1][1][6] =  0

 5082 00:40:38.828797  rx_firspass[1][1][7] = 0

 5083 00:40:38.832025  rx_lastpass[1][1][7] =  0

 5084 00:40:38.832105  rx_firspass[1][1][8] = 0

 5085 00:40:38.835060  rx_lastpass[1][1][8] =  0

 5086 00:40:38.838362  rx_firspass[1][1][9] = 0

 5087 00:40:38.841704  rx_lastpass[1][1][9] =  0

 5088 00:40:38.841779  rx_firspass[1][1][10] = 0

 5089 00:40:38.844948  rx_lastpass[1][1][10] =  0

 5090 00:40:38.848691  rx_firspass[1][1][11] = 0

 5091 00:40:38.848767  rx_lastpass[1][1][11] =  0

 5092 00:40:38.852117  rx_firspass[1][1][12] = 0

 5093 00:40:38.855412  rx_lastpass[1][1][12] =  0

 5094 00:40:38.858189  rx_firspass[1][1][13] = 0

 5095 00:40:38.858265  rx_lastpass[1][1][13] =  0

 5096 00:40:38.861720  rx_firspass[1][1][14] = 0

 5097 00:40:38.864854  rx_lastpass[1][1][14] =  0

 5098 00:40:38.864930  rx_firspass[1][1][15] = 0

 5099 00:40:38.868077  rx_lastpass[1][1][15] =  0

 5100 00:40:38.871471  dump params clk_delay

 5101 00:40:38.871546  clk_delay[0] = 0

 5102 00:40:38.874954  clk_delay[1] = 0

 5103 00:40:38.875029  dump params dqs_delay

 5104 00:40:38.878326  dqs_delay[0][0] = 0

 5105 00:40:38.878401  dqs_delay[0][1] = 0

 5106 00:40:38.881113  dqs_delay[1][0] = 0

 5107 00:40:38.884524  dqs_delay[1][1] = 0

 5108 00:40:38.884598  dump params delay_cell_unit = 753

 5109 00:40:38.887987  mt_set_emi_preloader end

 5110 00:40:38.894419  [mt_mem_init] dram size: 0x100000000, rank number: 2 

 5111 00:40:38.897875  [complex_mem_test] start addr:0x40000000, len:20480

 5112 00:40:38.934141  [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0

 5113 00:40:38.940557  [complex_mem_test] start addr:0x80000000, len:20480

 5114 00:40:38.976336  [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0

 5115 00:40:38.983060  [complex_mem_test] start addr:0xc0000000, len:20480

 5116 00:40:39.018973  [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0

 5117 00:40:39.025468  [complex_mem_test] start addr:0x56000000, len:8192

 5118 00:40:39.042441  [MEM] 1st complex R/W mem test pass (start addr:0x56000000)

 5119 00:40:39.045167  ddr_geometry:1

 5120 00:40:39.048618  [complex_mem_test] start addr:0x80000000, len:8192

 5121 00:40:39.066099  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 5122 00:40:39.069164  dram_init: dram init end (result: 0)

 5123 00:40:39.075507  Successfully loaded DRAM blobs and ran DRAM calibration

 5124 00:40:39.085965  Mapping address range [0000000040000000:0000000140000000) as     cacheable | read-write | non-secure | normal

 5125 00:40:39.086044  CBMEM:

 5126 00:40:39.089289  IMD: root @ 00000000fffff000 254 entries.

 5127 00:40:39.092549  IMD: root @ 00000000ffffec00 62 entries.

 5128 00:40:39.098464  VBOOT: copying vboot_working_data (256 bytes) to CBMEM...

 5129 00:40:39.105003  out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 

 5130 00:40:39.108428  in-header: 03 a1 00 00 08 00 00 00 

 5131 00:40:39.111720  in-data: 84 60 60 10 00 00 00 00 

 5132 00:40:39.115110  Chrome EC: clear events_b mask to 0x0000000020004000

 5133 00:40:39.122033  out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 

 5134 00:40:39.126146  in-header: 03 fd 00 00 00 00 00 00 

 5135 00:40:39.129202  in-data: 

 5136 00:40:39.132419  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5137 00:40:39.135641  CBFS @ 21000 size 3d4000

 5138 00:40:39.138991  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5139 00:40:39.142212  CBFS: Locating 'fallback/ramstage'

 5140 00:40:39.145589  CBFS: Found @ offset 10d40 size d563

 5141 00:40:39.168074  read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps

 5142 00:40:39.179614  Accumulated console time in romstage 13485 ms

 5143 00:40:39.179692  

 5144 00:40:39.179751  

 5145 00:40:39.189344  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...

 5146 00:40:39.192968  ARM64: Exception handlers installed.

 5147 00:40:39.193045  ARM64: Testing exception

 5148 00:40:39.196075  ARM64: Done test exception

 5149 00:40:39.199636  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 5150 00:40:39.202684  Manufacturer: ef

 5151 00:40:39.209219  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

 5152 00:40:39.212427  WARNING: RO_VPD is uninitialized or empty.

 5153 00:40:39.215743  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5154 00:40:39.218982  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5155 00:40:39.229469  read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps

 5156 00:40:39.233296  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

 5157 00:40:39.239469  BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0

 5158 00:40:39.239545  Enumerating buses...

 5159 00:40:39.246131  Show all devs... Before device enumeration.

 5160 00:40:39.246206  Root Device: enabled 1

 5161 00:40:39.249324  CPU_CLUSTER: 0: enabled 1

 5162 00:40:39.249398  CPU: 00: enabled 1

 5163 00:40:39.252391  Compare with tree...

 5164 00:40:39.255712  Root Device: enabled 1

 5165 00:40:39.255787   CPU_CLUSTER: 0: enabled 1

 5166 00:40:39.259249    CPU: 00: enabled 1

 5167 00:40:39.262492  Root Device scanning...

 5168 00:40:39.265493  root_dev_scan_bus for Root Device

 5169 00:40:39.265620  CPU_CLUSTER: 0 enabled

 5170 00:40:39.268889  root_dev_scan_bus for Root Device done

 5171 00:40:39.275552  scan_bus: scanning of bus Root Device took 10690 usecs

 5172 00:40:39.275629  done

 5173 00:40:39.279134  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0

 5174 00:40:39.282407  Allocating resources...

 5175 00:40:39.285234  Reading resources...

 5176 00:40:39.288693  Root Device read_resources bus 0 link: 0

 5177 00:40:39.292006  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 5178 00:40:39.295245  CPU: 00 missing read_resources

 5179 00:40:39.298625  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 5180 00:40:39.302019  Root Device read_resources bus 0 link: 0 done

 5181 00:40:39.305435  Done reading resources.

 5182 00:40:39.308569  Show resources in subtree (Root Device)...After reading.

 5183 00:40:39.314938   Root Device child on link 0 CPU_CLUSTER: 0

 5184 00:40:39.317994    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5185 00:40:39.324923    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5186 00:40:39.328165     CPU: 00

 5187 00:40:39.328244  Setting resources...

 5188 00:40:39.331294  Root Device assign_resources, bus 0 link: 0

 5189 00:40:39.334374  CPU_CLUSTER: 0 missing set_resources

 5190 00:40:39.341284  Root Device assign_resources, bus 0 link: 0

 5191 00:40:39.341361  Done setting resources.

 5192 00:40:39.347656  Show resources in subtree (Root Device)...After assigning values.

 5193 00:40:39.350768   Root Device child on link 0 CPU_CLUSTER: 0

 5194 00:40:39.354442    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5195 00:40:39.364449    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5196 00:40:39.364527     CPU: 00

 5197 00:40:39.367660  Done allocating resources.

 5198 00:40:39.373779  BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0

 5199 00:40:39.373856  Enabling resources...

 5200 00:40:39.373916  done.

 5201 00:40:39.380615  BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0

 5202 00:40:39.380692  Initializing devices...

 5203 00:40:39.383990  Root Device init ...

 5204 00:40:39.387251  mainboard_init: Starting display init.

 5205 00:40:39.390758  ADC[4]: Raw value=75908 ID=0

 5206 00:40:39.412412  anx7625_power_on_init: Init interface.

 5207 00:40:39.415756  anx7625_disable_pd_protocol: Disabled PD feature.

 5208 00:40:39.422451  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 5209 00:40:39.469074  anx7625_start_dp_work: Secure OCM version=00

 5210 00:40:39.472073  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 5211 00:40:39.489256  sp_tx_get_edid_block: EDID Block = 1

 5212 00:40:39.606946  Extracted contents:

 5213 00:40:39.610196  header:          00 ff ff ff ff ff ff 00

 5214 00:40:39.613540  serial number:   06 af 5c 14 00 00 00 00 00 1a

 5215 00:40:39.616839  version:         01 04

 5216 00:40:39.620047  basic params:    95 1a 0e 78 02

 5217 00:40:39.623426  chroma info:     99 85 95 55 56 92 28 22 50 54

 5218 00:40:39.626790  established:     00 00 00

 5219 00:40:39.633396  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 5220 00:40:39.636229  descriptor 1:    ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18

 5221 00:40:39.642790  descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20

 5222 00:40:39.649540  descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20

 5223 00:40:39.656320  descriptor 4:    00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a

 5224 00:40:39.659559  extensions:      00

 5225 00:40:39.659635  checksum:        ae

 5226 00:40:39.659693  

 5227 00:40:39.665783  Manufacturer: AUO Model 145c Serial Number 0

 5228 00:40:39.665849  Made week 0 of 2016

 5229 00:40:39.669246  EDID version: 1.4

 5230 00:40:39.669323  Digital display

 5231 00:40:39.672505  6 bits per primary color channel

 5232 00:40:39.675491  DisplayPort interface

 5233 00:40:39.675556  Maximum image size: 26 cm x 14 cm

 5234 00:40:39.678751  Gamma: 220%

 5235 00:40:39.678819  Check DPMS levels

 5236 00:40:39.682084  Supported color formats: RGB 4:4:4

 5237 00:40:39.685520  First detailed timing is preferred timing

 5238 00:40:39.688685  Established timings supported:

 5239 00:40:39.692282  Standard timings supported:

 5240 00:40:39.692349  Detailed timings

 5241 00:40:39.698612  Hex of detail: ce1d56ea50001a3030204600009010000018

 5242 00:40:39.702198  Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm

 5243 00:40:39.708346                 0556 0586 05a6 0640 hborder 0

 5244 00:40:39.711910                 0300 0304 030a 031a vborder 0

 5245 00:40:39.715109                 -hsync -vsync 

 5246 00:40:39.715204  Did detailed timing

 5247 00:40:39.721486  Hex of detail: 0000000f0000000000000000000000000020

 5248 00:40:39.724925  Manufacturer-specified data, tag 15

 5249 00:40:39.728155  Hex of detail: 000000fe0041554f0a202020202020202020

 5250 00:40:39.728232  ASCII string: AUO

 5251 00:40:39.734982  Hex of detail: 000000fe004231313658414230312e34200a

 5252 00:40:39.738196  ASCII string: B116XAB01.4 

 5253 00:40:39.738272  Checksum

 5254 00:40:39.738332  Checksum: 0xae (valid)

 5255 00:40:39.744991  get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz

 5256 00:40:39.748045  DSI data_rate: 457800000 bps

 5257 00:40:39.754749  anx7625_parse_edid: set default k value to 0x3d for panel

 5258 00:40:39.758175  anx7625_parse_edid: pixelclock(76300).

 5259 00:40:39.760920   hactive(1366), hsync(32), hfp(48), hbp(154)

 5260 00:40:39.764197   vactive(768), vsync(6), vfp(4), vbp(16)

 5261 00:40:39.767685  anx7625_dsi_config: config dsi.

 5262 00:40:39.775222  anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).

 5263 00:40:39.795633  anx7625_dsi_config: success to config DSI

 5264 00:40:39.799018  anx7625_dp_start: MIPI phy setup OK.

 5265 00:40:39.802311  [SSUSB] Setting up USB HOST controller...

 5266 00:40:39.806004  [SSUSB] u3phy_ports_enable u2p:1, u3p:0

 5267 00:40:39.809290  [SSUSB] phy power-on done.

 5268 00:40:39.813433  out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 

 5269 00:40:39.816311  in-header: 03 fc 01 00 00 00 00 00 

 5270 00:40:39.816388  in-data: 

 5271 00:40:39.823195  handle_proto3_response: EC response with error code: 1

 5272 00:40:39.823273  SPM: pcm index = 1

 5273 00:40:39.826220  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5274 00:40:39.829517  CBFS @ 21000 size 3d4000

 5275 00:40:39.836232  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5276 00:40:39.839223  CBFS: Locating 'pcm_allinone_lp4_3200.bin'

 5277 00:40:39.842912  CBFS: Found @ offset 1e7c0 size 1026

 5278 00:40:39.849353  read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps

 5279 00:40:39.852578  SPM: binary array size = 2988

 5280 00:40:39.855811  SPM: version = pcm_allinone_v1.17.2_20180829

 5281 00:40:39.859229  SPM binary loaded in 32 msecs

 5282 00:40:39.867137  spm_kick_im_to_fetch: ptr = 000000004021eec2

 5283 00:40:39.870408  spm_kick_im_to_fetch: len = 2988

 5284 00:40:39.870496  SPM: spm_kick_pcm_to_run

 5285 00:40:39.873874  SPM: spm_kick_pcm_to_run done

 5286 00:40:39.877271  SPM: spm_init done in 52 msecs

 5287 00:40:39.880674  Root Device init finished in 494992 usecs

 5288 00:40:39.883391  CPU_CLUSTER: 0 init ...

 5289 00:40:39.893101  Mapping address range [0000000000200000:0000000000280000) as     cacheable | read-write |     secure | device

 5290 00:40:39.896990  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5291 00:40:39.899739  CBFS @ 21000 size 3d4000

 5292 00:40:39.903071  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5293 00:40:39.906433  CBFS: Locating 'sspm.bin'

 5294 00:40:39.909736  CBFS: Found @ offset 208c0 size 41cb

 5295 00:40:39.920293  read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps

 5296 00:40:39.928187  CPU_CLUSTER: 0 init finished in 42805 usecs

 5297 00:40:39.928264  Devices initialized

 5298 00:40:39.931339  Show all devs... After init.

 5299 00:40:39.934737  Root Device: enabled 1

 5300 00:40:39.934814  CPU_CLUSTER: 0: enabled 1

 5301 00:40:39.937862  CPU: 00: enabled 1

 5302 00:40:39.941136  BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0

 5303 00:40:39.947873  FMAP: area RW_ELOG found @ 558000 (4096 bytes)

 5304 00:40:39.950791  ELOG: NV offset 0x558000 size 0x1000

 5305 00:40:39.954135  read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps

 5306 00:40:39.961014  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 5307 00:40:39.967782  ELOG: Event(17) added with size 13 at 2024-06-16 00:40:40 UTC

 5308 00:40:39.970385  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 5309 00:40:39.974289  in-header: 03 1f 00 00 2c 00 00 00 

 5310 00:40:39.987031  in-data: c7 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 d0 e6 01 00 06 80 00 00 e8 ea 02 00 06 80 00 00 d4 13 02 00 06 80 00 00 fc ea 1d 00 

 5311 00:40:39.990478  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

 5312 00:40:39.993895  in-header: 03 19 00 00 08 00 00 00 

 5313 00:40:39.996777  in-data: a2 e0 47 00 13 00 00 00 

 5314 00:40:39.999885  Chrome EC: UHEPI supported

 5315 00:40:40.006930  out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 

 5316 00:40:40.010397  in-header: 03 e1 00 00 08 00 00 00 

 5317 00:40:40.010474  in-data: 84 20 60 10 00 00 00 00 

 5318 00:40:40.017113  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

 5319 00:40:40.023355  out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 

 5320 00:40:40.026702  in-header: 03 e1 00 00 08 00 00 00 

 5321 00:40:40.030051  in-data: 84 20 60 10 00 00 00 00 

 5322 00:40:40.033480  ELOG: Event(A1) added with size 10 at 2024-06-16 00:40:40 UTC

 5323 00:40:40.043315  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 5324 00:40:40.046651  ELOG: Event(A0) added with size 9 at 2024-06-16 00:40:40 UTC

 5325 00:40:40.049395  elog_add_boot_reason: Logged dev mode boot

 5326 00:40:40.052693  Finalize devices...

 5327 00:40:40.052768  Devices finalized

 5328 00:40:40.059618  BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0

 5329 00:40:40.062890  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 5330 00:40:40.069325  ELOG: Event(91) added with size 10 at 2024-06-16 00:40:40 UTC

 5331 00:40:40.072982  Writing coreboot table at 0xffeda000

 5332 00:40:40.075814   0. 0000000000114000-000000000011efff: RAMSTAGE

 5333 00:40:40.082516   1. 0000000040000000-000000004023cfff: RAMSTAGE

 5334 00:40:40.085990   2. 000000004023d000-00000000545fffff: RAM

 5335 00:40:40.088951   3. 0000000054600000-000000005465ffff: BL31

 5336 00:40:40.092278   4. 0000000054660000-00000000ffed9fff: RAM

 5337 00:40:40.098667   5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES

 5338 00:40:40.102109   6. 0000000100000000-000000013fffffff: RAM

 5339 00:40:40.105414  Passing 5 GPIOs to payload:

 5340 00:40:40.108662              NAME |       PORT | POLARITY |     VALUE

 5341 00:40:40.111738     write protect | 0x00000096 |      low |      high

 5342 00:40:40.118860          EC in RW | 0x000000b1 |     high | undefined

 5343 00:40:40.122454      EC interrupt | 0x00000097 |      low | undefined

 5344 00:40:40.128406     TPM interrupt | 0x00000099 |     high | undefined

 5345 00:40:40.132014    speaker enable | 0x000000af |     high | undefined

 5346 00:40:40.134786  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 5347 00:40:40.138204  in-header: 03 f7 00 00 02 00 00 00 

 5348 00:40:40.141494  in-data: 04 00 

 5349 00:40:40.141606  Board ID: 4

 5350 00:40:40.144732  ADC[3]: Raw value=213471 ID=1

 5351 00:40:40.144808  RAM code: 1

 5352 00:40:40.144867  SKU ID: 16

 5353 00:40:40.151865  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5354 00:40:40.151942  CBFS @ 21000 size 3d4000

 5355 00:40:40.158108  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5356 00:40:40.164816  Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum f809

 5357 00:40:40.168190  coreboot table: 940 bytes.

 5358 00:40:40.171452  IMD ROOT    0. 00000000fffff000 00001000

 5359 00:40:40.174907  IMD SMALL   1. 00000000ffffe000 00001000

 5360 00:40:40.178310  CONSOLE     2. 00000000fffde000 00020000

 5361 00:40:40.181842  FMAP        3. 00000000fffdd000 0000047c

 5362 00:40:40.184524  TIME STAMP  4. 00000000fffdc000 00000910

 5363 00:40:40.187718  RAMOOPS     5. 00000000ffedc000 00100000

 5364 00:40:40.191026  COREBOOT    6. 00000000ffeda000 00002000

 5365 00:40:40.194570  IMD small region:

 5366 00:40:40.197653    IMD ROOT    0. 00000000ffffec00 00000400

 5367 00:40:40.200949    VBOOT WORK  1. 00000000ffffeb00 00000100

 5368 00:40:40.204204    EC HOSTEVENT 2. 00000000ffffeae0 00000008

 5369 00:40:40.207677    VPD         3. 00000000ffffea60 0000006c

 5370 00:40:40.213849  BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0

 5371 00:40:40.220266  out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 

 5372 00:40:40.223513  in-header: 03 e1 00 00 08 00 00 00 

 5373 00:40:40.227126  in-data: 84 20 60 10 00 00 00 00 

 5374 00:40:40.230517  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5375 00:40:40.233448  CBFS @ 21000 size 3d4000

 5376 00:40:40.240290  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5377 00:40:40.240366  CBFS: Locating 'fallback/payload'

 5378 00:40:40.249856  CBFS: Found @ offset dc040 size 439a0

 5379 00:40:40.337673  read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps

 5380 00:40:40.340586  Checking segment from ROM address 0x0000000040003a00

 5381 00:40:40.347679  Checking segment from ROM address 0x0000000040003a1c

 5382 00:40:40.350829  Loading segment from ROM address 0x0000000040003a00

 5383 00:40:40.353767    code (compression=0)

 5384 00:40:40.364128    New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968

 5385 00:40:40.370747  Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968

 5386 00:40:40.373450  it's not compressed!

 5387 00:40:40.376856  [ 0x80000000, 80043968, 0x811994a0) <- 40003a38

 5388 00:40:40.383488  Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38

 5389 00:40:40.392045  Loading segment from ROM address 0x0000000040003a1c

 5390 00:40:40.395266    Entry Point 0x0000000080000000

 5391 00:40:40.395340  Loaded segments

 5392 00:40:40.402106  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0

 5393 00:40:40.405357  Jumping to boot code at 0000000080000000(00000000ffeda000)

 5394 00:40:40.414810  CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes

 5395 00:40:40.421362  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5396 00:40:40.421435  CBFS @ 21000 size 3d4000

 5397 00:40:40.427641  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5398 00:40:40.431389  CBFS: Locating 'fallback/bl31'

 5399 00:40:40.434762  CBFS: Found @ offset 36dc0 size 5820

 5400 00:40:40.446051  read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps

 5401 00:40:40.449170  Checking segment from ROM address 0x0000000040003a00

 5402 00:40:40.455860  Checking segment from ROM address 0x0000000040003a1c

 5403 00:40:40.459264  Loading segment from ROM address 0x0000000040003a00

 5404 00:40:40.461871    code (compression=1)

 5405 00:40:40.472084    New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8

 5406 00:40:40.478628  Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8

 5407 00:40:40.478699  using LZMA

 5408 00:40:40.487444  [ 0x54600000, 5460f420, 0x54629000) <- 40003a38

 5409 00:40:40.494379  Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0

 5410 00:40:40.497149  Loading segment from ROM address 0x0000000040003a1c

 5411 00:40:40.500486    Entry Point 0x0000000054601000

 5412 00:40:40.500554  Loaded segments

 5413 00:40:40.504068  NOTICE:  MT8183 bl31_setup

 5414 00:40:40.511525  NOTICE:  BL31: v2.1(debug):v2.1-806-g3addeb68c

 5415 00:40:40.514917  NOTICE:  BL31: Built : Sun Jan 30 03:25:20 UTC 2022

 5416 00:40:40.517674  INFO:    [DEVAPC] dump DEVAPC registers:

 5417 00:40:40.527777  INFO:    [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0

 5418 00:40:40.534410  INFO:    [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0

 5419 00:40:40.543982  INFO:    [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0

 5420 00:40:40.550674  INFO:    [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0

 5421 00:40:40.560849  INFO:    [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0

 5422 00:40:40.566965  INFO:    [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0

 5423 00:40:40.577084  INFO:    [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0

 5424 00:40:40.583897  INFO:    [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0

 5425 00:40:40.593329  INFO:    [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0

 5426 00:40:40.599755  INFO:    [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0

 5427 00:40:40.610009  INFO:    [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0

 5428 00:40:40.616291  INFO:    [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0

 5429 00:40:40.626426  INFO:    [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0

 5430 00:40:40.633098  INFO:    [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0

 5431 00:40:40.639122  INFO:    [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0

 5432 00:40:40.646016  INFO:    [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0

 5433 00:40:40.655509  INFO:    [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0

 5434 00:40:40.662147  INFO:    [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0

 5435 00:40:40.669420  INFO:    [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0

 5436 00:40:40.675325  INFO:    [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0

 5437 00:40:40.685502  INFO:    [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0

 5438 00:40:40.691895  INFO:    [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0

 5439 00:40:40.695260  INFO:    [DEVAPC] MAS_DOM_0 = 0x1

 5440 00:40:40.698753  INFO:    [DEVAPC] MAS_DOM_1 = 0x200

 5441 00:40:40.701506  INFO:    [DEVAPC] MAS_DOM_2 = 0x0

 5442 00:40:40.704755  INFO:    [DEVAPC] MAS_DOM_3 = 0x2000

 5443 00:40:40.708105  INFO:    [DEVAPC] MAS_SEC_0 = 0x8000000

 5444 00:40:40.715022  INFO:    [DEVAPC]  (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0

 5445 00:40:40.718201  INFO:    [DEVAPC]  (MM)MAS_DOMAIN_REMAP_0 = 0x24

 5446 00:40:40.721338  WARNING: region 0:

 5447 00:40:40.724846  WARNING: 	apc:0x168, sa:0x0, ea:0xfff

 5448 00:40:40.724922  WARNING: region 1:

 5449 00:40:40.731218  WARNING: 	apc:0x140, sa:0x1000, ea:0x128f

 5450 00:40:40.731293  WARNING: region 2:

 5451 00:40:40.734645  WARNING: 	apc:0x168, sa:0x1290, ea:0x1fff

 5452 00:40:40.737722  WARNING: region 3:

 5453 00:40:40.740940  WARNING: 	apc:0x168, sa:0x2000, ea:0xbfff

 5454 00:40:40.741015  WARNING: region 4:

 5455 00:40:40.747685  WARNING: 	apc:0x168, sa:0xc000, ea:0x1ffff

 5456 00:40:40.747760  WARNING: region 5:

 5457 00:40:40.751002  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5458 00:40:40.754015  WARNING: region 6:

 5459 00:40:40.754093  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5460 00:40:40.757379  WARNING: region 7:

 5461 00:40:40.760952  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5462 00:40:40.767760  INFO:    GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3

 5463 00:40:40.770467  INFO:    SPM: enable SPMC mode

 5464 00:40:40.773857  NOTICE:  spm_boot_init() start

 5465 00:40:40.777007  NOTICE:  spm_boot_init() end

 5466 00:40:40.780463  INFO:    BL31: Initializing runtime services

 5467 00:40:40.787055  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied

 5468 00:40:40.790284  INFO:    BL31: Preparing for EL3 exit to normal world

 5469 00:40:40.793243  INFO:    Entry point address = 0x80000000

 5470 00:40:40.796503  INFO:    SPSR = 0x8

 5471 00:40:40.818118  

 5472 00:40:40.818275  

 5473 00:40:40.818405  

 5474 00:40:40.819072  end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
 5475 00:40:40.819211  start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
 5476 00:40:40.819329  Setting prompt string to ['jacuzzi:']
 5477 00:40:40.819428  bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
 5478 00:40:40.821370  Starting depthcharge on Juniper...

 5479 00:40:40.821460  

 5480 00:40:40.824174  vboot_handoff: creating legacy vboot_handoff structure

 5481 00:40:40.824266  

 5482 00:40:40.827677  ec_init(0): CrosEC protocol v3 supported (544, 544)

 5483 00:40:40.831151  

 5484 00:40:40.831226  Wipe memory regions:

 5485 00:40:40.831288  

 5486 00:40:40.834451  	[0x00000040000000, 0x00000054600000)

 5487 00:40:40.877320  

 5488 00:40:40.877431  	[0x00000054660000, 0x00000080000000)

 5489 00:40:40.968390  

 5490 00:40:40.968484  	[0x000000811994a0, 0x000000ffeda000)

 5491 00:40:41.228290  

 5492 00:40:41.228401  	[0x00000100000000, 0x00000140000000)

 5493 00:40:41.360928  

 5494 00:40:41.363692  Initializing XHCI USB controller at 0x11200000.

 5495 00:40:41.387138  

 5496 00:40:41.390063  [firmware-jacuzzi-12573.B-collabora] Jun  8 2022 08:18:54

 5497 00:40:41.390140  

 5498 00:40:41.390199  


 5499 00:40:41.390460  Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5501 00:40:41.490748  jacuzzi: tftpboot 192.168.201.1 14368363/tftp-deploy-svhd_iey/kernel/image.itb 14368363/tftp-deploy-svhd_iey/kernel/cmdline 

 5502 00:40:41.490938  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5503 00:40:41.491057  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
 5504 00:40:41.495202  tftpboot 192.168.201.1 14368363/tftp-deploy-svhd_iey/kernel/image.itp-deploy-svhd_iey/kernel/cmdline 

 5505 00:40:41.495300  

 5506 00:40:41.495382  Waiting for link

 5507 00:40:41.901072  

 5508 00:40:41.901193  R8152: Initializing

 5509 00:40:41.901269  

 5510 00:40:41.904505  Version 9 (ocp_data = 6010)

 5511 00:40:41.904605  

 5512 00:40:41.907797  R8152: Done initializing

 5513 00:40:41.907864  

 5514 00:40:41.907920  Adding net device

 5515 00:40:42.293309  

 5516 00:40:42.293443  done.

 5517 00:40:42.293533  

 5518 00:40:42.293633  MAC: 00:e0:4c:72:3d:a6

 5519 00:40:42.293688  

 5520 00:40:42.296461  Sending DHCP discover... done.

 5521 00:40:42.296562  

 5522 00:40:42.299917  Waiting for reply... done.

 5523 00:40:42.300023  

 5524 00:40:42.302757  Sending DHCP request... done.

 5525 00:40:42.302897  

 5526 00:40:42.302982  Waiting for reply... done.

 5527 00:40:42.303097  

 5528 00:40:42.306208  My ip is 192.168.201.20

 5529 00:40:42.306398  

 5530 00:40:42.309671  The DHCP server ip is 192.168.201.1

 5531 00:40:42.309786  

 5532 00:40:42.312624  TFTP server IP predefined by user: 192.168.201.1

 5533 00:40:42.312714  

 5534 00:40:42.319713  Bootfile predefined by user: 14368363/tftp-deploy-svhd_iey/kernel/image.itb

 5535 00:40:42.319822  

 5536 00:40:42.322428  Sending tftp read request... done.

 5537 00:40:42.322530  

 5538 00:40:42.325751  Waiting for the transfer... 

 5539 00:40:42.325858  

 5540 00:40:42.574154  00000000 ################################################################

 5541 00:40:42.574272  

 5542 00:40:42.816769  00080000 ################################################################

 5543 00:40:42.816904  

 5544 00:40:43.058929  00100000 ################################################################

 5545 00:40:43.059049  

 5546 00:40:43.301889  00180000 ################################################################

 5547 00:40:43.302022  

 5548 00:40:43.547573  00200000 ################################################################

 5549 00:40:43.547685  

 5550 00:40:43.793499  00280000 ################################################################

 5551 00:40:43.793647  

 5552 00:40:44.047651  00300000 ################################################################

 5553 00:40:44.047763  

 5554 00:40:44.295152  00380000 ################################################################

 5555 00:40:44.295263  

 5556 00:40:44.541691  00400000 ################################################################

 5557 00:40:44.541810  

 5558 00:40:44.788413  00480000 ################################################################

 5559 00:40:44.788560  

 5560 00:40:45.045128  00500000 ################################################################

 5561 00:40:45.045268  

 5562 00:40:45.292476  00580000 ################################################################

 5563 00:40:45.292606  

 5564 00:40:45.538686  00600000 ################################################################

 5565 00:40:45.538801  

 5566 00:40:45.792324  00680000 ################################################################

 5567 00:40:45.792436  

 5568 00:40:46.034652  00700000 ################################################################

 5569 00:40:46.034794  

 5570 00:40:46.276711  00780000 ################################################################

 5571 00:40:46.276828  

 5572 00:40:46.523167  00800000 ################################################################

 5573 00:40:46.523285  

 5574 00:40:46.773816  00880000 ################################################################

 5575 00:40:46.773937  

 5576 00:40:47.022613  00900000 ################################################################

 5577 00:40:47.022760  

 5578 00:40:47.269812  00980000 ################################################################

 5579 00:40:47.269925  

 5580 00:40:47.521885  00a00000 ################################################################

 5581 00:40:47.522033  

 5582 00:40:47.766582  00a80000 ################################################################

 5583 00:40:47.766728  

 5584 00:40:48.007475  00b00000 ################################################################

 5585 00:40:48.007593  

 5586 00:40:48.249018  00b80000 ################################################################

 5587 00:40:48.249146  

 5588 00:40:48.490274  00c00000 ################################################################

 5589 00:40:48.490391  

 5590 00:40:48.732500  00c80000 ################################################################

 5591 00:40:48.732647  

 5592 00:40:48.976038  00d00000 ################################################################

 5593 00:40:48.976150  

 5594 00:40:49.220520  00d80000 ################################################################

 5595 00:40:49.220632  

 5596 00:40:49.462938  00e00000 ################################################################

 5597 00:40:49.463052  

 5598 00:40:49.705879  00e80000 ################################################################

 5599 00:40:49.705996  

 5600 00:40:49.950175  00f00000 ################################################################

 5601 00:40:49.950324  

 5602 00:40:50.200202  00f80000 ################################################################

 5603 00:40:50.200344  

 5604 00:40:50.442483  01000000 ################################################################

 5605 00:40:50.442597  

 5606 00:40:50.685110  01080000 ################################################################

 5607 00:40:50.685254  

 5608 00:40:50.931857  01100000 ################################################################

 5609 00:40:50.931996  

 5610 00:40:51.180798  01180000 ################################################################

 5611 00:40:51.180911  

 5612 00:40:51.431989  01200000 ################################################################

 5613 00:40:51.432135  

 5614 00:40:51.677025  01280000 ################################################################

 5615 00:40:51.677137  

 5616 00:40:51.920558  01300000 ################################################################

 5617 00:40:51.920677  

 5618 00:40:52.165906  01380000 ################################################################

 5619 00:40:52.166043  

 5620 00:40:52.410288  01400000 ################################################################

 5621 00:40:52.410405  

 5622 00:40:52.654575  01480000 ################################################################

 5623 00:40:52.654686  

 5624 00:40:52.899844  01500000 ################################################################

 5625 00:40:52.899954  

 5626 00:40:53.150384  01580000 ################################################################

 5627 00:40:53.150501  

 5628 00:40:53.395912  01600000 ################################################################

 5629 00:40:53.396057  

 5630 00:40:53.641183  01680000 ################################################################

 5631 00:40:53.641328  

 5632 00:40:53.889036  01700000 ################################################################

 5633 00:40:53.889172  

 5634 00:40:54.143616  01780000 ################################################################

 5635 00:40:54.143753  

 5636 00:40:54.393717  01800000 ################################################################

 5637 00:40:54.393856  

 5638 00:40:54.640784  01880000 ################################################################

 5639 00:40:54.640922  

 5640 00:40:54.890950  01900000 ################################################################

 5641 00:40:54.891086  

 5642 00:40:55.138652  01980000 ################################################################

 5643 00:40:55.138789  

 5644 00:40:55.387598  01a00000 ################################################################

 5645 00:40:55.387735  

 5646 00:40:55.640542  01a80000 ################################################################

 5647 00:40:55.640678  

 5648 00:40:55.888632  01b00000 ################################################################

 5649 00:40:55.888750  

 5650 00:40:56.139342  01b80000 ################################################################

 5651 00:40:56.139456  

 5652 00:40:56.382952  01c00000 ################################################################

 5653 00:40:56.383070  

 5654 00:40:56.638792  01c80000 ################################################################

 5655 00:40:56.638910  

 5656 00:40:56.889808  01d00000 ################################################################

 5657 00:40:56.889920  

 5658 00:40:57.141647  01d80000 ################################################################

 5659 00:40:57.141778  

 5660 00:40:57.396035  01e00000 ################################################################

 5661 00:40:57.396149  

 5662 00:40:57.655179  01e80000 ################################################################

 5663 00:40:57.655297  

 5664 00:40:57.917639  01f00000 ################################################################

 5665 00:40:57.917758  

 5666 00:40:58.170981  01f80000 ################################################################

 5667 00:40:58.171092  

 5668 00:40:58.420871  02000000 ################################################################

 5669 00:40:58.420984  

 5670 00:40:58.653493  02080000 ######################################################### done.

 5671 00:40:58.653636  

 5672 00:40:58.656838  The bootfile was 34543054 bytes long.

 5673 00:40:58.656912  

 5674 00:40:58.656976  Sending tftp read request... done.

 5675 00:40:58.657034  

 5676 00:40:58.660086  Waiting for the transfer... 

 5677 00:40:58.660163  

 5678 00:40:58.663630  00000000 # done.

 5679 00:40:58.663698  

 5680 00:40:58.669937  Command line loaded dynamically from TFTP file: 14368363/tftp-deploy-svhd_iey/kernel/cmdline

 5681 00:40:58.670010  

 5682 00:40:58.686356  The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 5683 00:40:58.686442  

 5684 00:40:58.689796  Loading FIT.

 5685 00:40:58.689863  

 5686 00:40:58.693157  Image ramdisk-1 has 21356943 bytes.

 5687 00:40:58.693245  

 5688 00:40:58.693332  Image fdt-1 has 57695 bytes.

 5689 00:40:58.693415  

 5690 00:40:58.695994  Image kernel-1 has 13126376 bytes.

 5691 00:40:58.696086  

 5692 00:40:58.705749  Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper

 5693 00:40:58.705831  

 5694 00:40:58.718694  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183

 5695 00:40:58.718773  

 5696 00:40:58.722679  Choosing best match conf-1 for compat google,juniper-sku16.

 5697 00:40:58.728299  

 5698 00:40:58.732414  Connected to device vid:did:rid of 1ae0:0028:00

 5699 00:40:58.740598  

 5700 00:40:58.744103  tpm_get_response: command 0x17b, return code 0x0

 5701 00:40:58.744180  

 5702 00:40:58.746956  tpm_cleanup: add release locality here.

 5703 00:40:58.747033  

 5704 00:40:58.750093  Shutting down all USB controllers.

 5705 00:40:58.750169  

 5706 00:40:58.753763  Removing current net device

 5707 00:40:58.753840  

 5708 00:40:58.757116  Exiting depthcharge with code 4 at timestamp: 35035842

 5709 00:40:58.757193  

 5710 00:40:58.760055  LZMA decompressing kernel-1 to 0x80193568

 5711 00:40:58.763353  

 5712 00:40:58.767104  LZMA decompressing kernel-1 to 0x40000000

 5713 00:41:00.631482  

 5714 00:41:00.631605  jumping to kernel

 5715 00:41:00.632096  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 5716 00:41:00.632217  start: 2.2.5 auto-login-action (timeout 00:04:08) [common]
 5717 00:41:00.632320  Setting prompt string to ['Linux version [0-9]']
 5718 00:41:00.632411  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5719 00:41:00.632508  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 5720 00:41:00.706954  

 5721 00:41:00.710281  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

 5722 00:41:00.713313  start: 2.2.5.1 login-action (timeout 00:04:08) [common]
 5723 00:41:00.713440  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
 5724 00:41:00.713539  Setting prompt string to []
 5725 00:41:00.713642  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
 5726 00:41:00.713738  Using line separator: #'\n'#
 5727 00:41:00.713824  No login prompt set.
 5728 00:41:00.713919  Parsing kernel messages
 5729 00:41:00.714000  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
 5730 00:41:00.714172  [login-action] Waiting for messages, (timeout 00:04:08)
 5731 00:41:00.714265  Waiting using forced prompt support (timeout 00:02:04)
 5732 00:41:00.733461  [    0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024

 5733 00:41:00.736555  [    0.000000] random: crng init done

 5734 00:41:00.743381  [    0.000000] Machine model: Google juniper sku16 board

 5735 00:41:00.746981  [    0.000000] efi: UEFI not found.

 5736 00:41:00.752780  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

 5737 00:41:00.762741  [    0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool

 5738 00:41:00.769075  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

 5739 00:41:00.772366  [    0.000000] printk: bootconsole [mtk8250] enabled

 5740 00:41:00.781396  [    0.000000] NUMA: No NUMA configuration found

 5741 00:41:00.788457  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]

 5742 00:41:00.794932  [    0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]

 5743 00:41:00.795029  [    0.000000] Zone ranges:

 5744 00:41:00.801232  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

 5745 00:41:00.804465  [    0.000000]   DMA32    empty

 5746 00:41:00.811501  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]

 5747 00:41:00.814411  [    0.000000] Movable zone start for each node

 5748 00:41:00.817968  [    0.000000] Early memory node ranges

 5749 00:41:00.824821  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

 5750 00:41:00.831094  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

 5751 00:41:00.837831  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

 5752 00:41:00.844047  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

 5753 00:41:00.850946  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000013fffffff]

 5754 00:41:00.857037  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]

 5755 00:41:00.873795  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

 5756 00:41:00.880611  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

 5757 00:41:00.887377  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

 5758 00:41:00.890648  [    0.000000] psci: probing for conduit method from DT.

 5759 00:41:00.897043  [    0.000000] psci: PSCIv1.1 detected in firmware.

 5760 00:41:00.900222  [    0.000000] psci: Using standard PSCI v0.2 function IDs

 5761 00:41:00.906906  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

 5762 00:41:00.910856  [    0.000000] psci: SMC Calling Convention v1.1

 5763 00:41:00.916657  [    0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016

 5764 00:41:00.919843  [    0.000000] Detected VIPT I-cache on CPU0

 5765 00:41:00.927148  [    0.000000] CPU features: detected: GIC system register CPU interface

 5766 00:41:00.933327  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

 5767 00:41:00.939924  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

 5768 00:41:00.946383  [    0.000000] CPU features: detected: ARM erratum 845719

 5769 00:41:00.949829  [    0.000000] alternatives: applying boot alternatives

 5770 00:41:00.956072  [    0.000000] Fallback order for Node 0: 0 

 5771 00:41:00.962697  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031424

 5772 00:41:00.966379  [    0.000000] Policy zone: Normal

 5773 00:41:00.982777  [    0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 5774 00:41:00.995928  <5>[    0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.

 5775 00:41:01.005212  <6>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

 5776 00:41:01.012067  <6>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)

 5777 00:41:01.018741  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

 5778 00:41:01.021507  <6>[    0.000000] software IO TLB: area num 8.

 5779 00:41:01.048581  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

 5780 00:41:01.106835  <6>[    0.000000] Memory: 3894216K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 264248K reserved, 32768K cma-reserved)

 5781 00:41:01.112908  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

 5782 00:41:01.119506  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

 5783 00:41:01.122789  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

 5784 00:41:01.129647  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

 5785 00:41:01.136250  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

 5786 00:41:01.142565  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

 5787 00:41:01.149166  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

 5788 00:41:01.155899  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

 5789 00:41:01.162746  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

 5790 00:41:01.172134  <6>[    0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem

 5791 00:41:01.175409  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

 5792 00:41:01.181864  <6>[    0.000000] GICv3: 640 SPIs implemented

 5793 00:41:01.185531  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

 5794 00:41:01.188951  <6>[    0.000000] Root IRQ handler: gic_handle_irq

 5795 00:41:01.195725  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

 5796 00:41:01.202370  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000

 5797 00:41:01.211594  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }

 5798 00:41:01.225335  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }

 5799 00:41:01.231552  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

 5800 00:41:01.244281  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

 5801 00:41:01.256599  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

 5802 00:41:01.263178  <6>[    0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

 5803 00:41:01.270320  <6>[    0.009479] Console: colour dummy device 80x25

 5804 00:41:01.273699  <6>[    0.014516] printk: console [tty1] enabled

 5805 00:41:01.286596  <6>[    0.018904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

 5806 00:41:01.290149  <6>[    0.029369] pid_max: default: 32768 minimum: 301

 5807 00:41:01.296432  <6>[    0.034250] LSM: Security Framework initializing

 5808 00:41:01.303273  <6>[    0.039166] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5809 00:41:01.309772  <6>[    0.046790] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5810 00:41:01.316743  <4>[    0.055663] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5811 00:41:01.326504  <6>[    0.062291] cblist_init_generic: Setting adjustable number of callback queues.

 5812 00:41:01.333192  <6>[    0.069736] cblist_init_generic: Setting shift to 3 and lim to 1.

 5813 00:41:01.340061  <6>[    0.076089] cblist_init_generic: Setting adjustable number of callback queues.

 5814 00:41:01.346264  <6>[    0.083534] cblist_init_generic: Setting shift to 3 and lim to 1.

 5815 00:41:01.349735  <6>[    0.089932] rcu: Hierarchical SRCU implementation.

 5816 00:41:01.356250  <6>[    0.094958] rcu: 	Max phase no-delay instances is 1000.

 5817 00:41:01.363865  <6>[    0.102891] EFI services will not be available.

 5818 00:41:01.367203  <6>[    0.107840] smp: Bringing up secondary CPUs ...

 5819 00:41:01.377717  <6>[    0.113078] Detected VIPT I-cache on CPU1

 5820 00:41:01.383807  <4>[    0.113126] cacheinfo: Unable to detect cache hierarchy for CPU 1

 5821 00:41:01.390939  <6>[    0.113135] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000

 5822 00:41:01.397108  <6>[    0.113167] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]

 5823 00:41:01.400612  <6>[    0.113646] Detected VIPT I-cache on CPU2

 5824 00:41:01.407542  <4>[    0.113679] cacheinfo: Unable to detect cache hierarchy for CPU 2

 5825 00:41:01.413960  <6>[    0.113684] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000

 5826 00:41:01.420208  <6>[    0.113697] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]

 5827 00:41:01.426949  <6>[    0.114142] Detected VIPT I-cache on CPU3

 5828 00:41:01.433049  <4>[    0.114172] cacheinfo: Unable to detect cache hierarchy for CPU 3

 5829 00:41:01.439769  <6>[    0.114177] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000

 5830 00:41:01.446658  <6>[    0.114188] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]

 5831 00:41:01.450346  <6>[    0.114763] CPU features: detected: Spectre-v2

 5832 00:41:01.456556  <6>[    0.114773] CPU features: detected: Spectre-BHB

 5833 00:41:01.460125  <6>[    0.114777] CPU features: detected: ARM erratum 858921

 5834 00:41:01.466209  <6>[    0.114783] Detected VIPT I-cache on CPU4

 5835 00:41:01.469824  <4>[    0.114830] cacheinfo: Unable to detect cache hierarchy for CPU 4

 5836 00:41:01.479303  <6>[    0.114838] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000

 5837 00:41:01.486576  <6>[    0.114845] arch_timer: Enabling local workaround for ARM erratum 858921

 5838 00:41:01.489447  <6>[    0.114856] arch_timer: CPU4: Trapping CNTVCT access

 5839 00:41:01.495909  <6>[    0.114863] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]

 5840 00:41:01.502814  <6>[    0.115350] Detected VIPT I-cache on CPU5

 5841 00:41:01.509195  <4>[    0.115391] cacheinfo: Unable to detect cache hierarchy for CPU 5

 5842 00:41:01.515685  <6>[    0.115396] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000

 5843 00:41:01.522346  <6>[    0.115403] arch_timer: Enabling local workaround for ARM erratum 858921

 5844 00:41:01.528397  <6>[    0.115409] arch_timer: CPU5: Trapping CNTVCT access

 5845 00:41:01.535205  <6>[    0.115415] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]

 5846 00:41:01.538787  <6>[    0.115850] Detected VIPT I-cache on CPU6

 5847 00:41:01.545312  <4>[    0.115895] cacheinfo: Unable to detect cache hierarchy for CPU 6

 5848 00:41:01.551710  <6>[    0.115901] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000

 5849 00:41:01.558167  <6>[    0.115908] arch_timer: Enabling local workaround for ARM erratum 858921

 5850 00:41:01.564842  <6>[    0.115914] arch_timer: CPU6: Trapping CNTVCT access

 5851 00:41:01.571275  <6>[    0.115919] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]

 5852 00:41:01.574842  <6>[    0.116450] Detected VIPT I-cache on CPU7

 5853 00:41:01.581541  <4>[    0.116495] cacheinfo: Unable to detect cache hierarchy for CPU 7

 5854 00:41:01.587789  <6>[    0.116500] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000

 5855 00:41:01.594251  <6>[    0.116507] arch_timer: Enabling local workaround for ARM erratum 858921

 5856 00:41:01.601054  <6>[    0.116514] arch_timer: CPU7: Trapping CNTVCT access

 5857 00:41:01.608094  <6>[    0.116519] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]

 5858 00:41:01.610904  <6>[    0.116568] smp: Brought up 1 node, 8 CPUs

 5859 00:41:01.618021  <6>[    0.355466] SMP: Total of 8 processors activated.

 5860 00:41:01.620780  <6>[    0.360400] CPU features: detected: 32-bit EL0 Support

 5861 00:41:01.627357  <6>[    0.365779] CPU features: detected: 32-bit EL1 Support

 5862 00:41:01.634382  <6>[    0.371146] CPU features: detected: CRC32 instructions

 5863 00:41:01.637708  <6>[    0.376571] CPU: All CPU(s) started at EL2

 5864 00:41:01.644025  <6>[    0.380913] alternatives: applying system-wide alternatives

 5865 00:41:01.647577  <6>[    0.388920] devtmpfs: initialized

 5866 00:41:01.666259  <6>[    0.397865] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns

 5867 00:41:01.672190  <6>[    0.407814] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)

 5868 00:41:01.679094  <6>[    0.415544] pinctrl core: initialized pinctrl subsystem

 5869 00:41:01.682461  <6>[    0.422662] DMI not present or invalid.

 5870 00:41:01.688442  <6>[    0.427033] NET: Registered PF_NETLINK/PF_ROUTE protocol family

 5871 00:41:01.698614  <6>[    0.433931] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations

 5872 00:41:01.705114  <6>[    0.441458] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations

 5873 00:41:01.715121  <6>[    0.449708] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations

 5874 00:41:01.717764  <6>[    0.457884] audit: initializing netlink subsys (disabled)

 5875 00:41:01.727840  <5>[    0.463588] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1

 5876 00:41:01.734264  <6>[    0.464569] thermal_sys: Registered thermal governor 'step_wise'

 5877 00:41:01.741279  <6>[    0.471555] thermal_sys: Registered thermal governor 'power_allocator'

 5878 00:41:01.744550  <6>[    0.477852] cpuidle: using governor menu

 5879 00:41:01.750745  <6>[    0.488817] NET: Registered PF_QIPCRTR protocol family

 5880 00:41:01.757517  <6>[    0.494300] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.

 5881 00:41:01.764427  <6>[    0.501396] ASID allocator initialised with 32768 entries

 5882 00:41:01.766905  <6>[    0.508169] Serial: AMBA PL011 UART driver

 5883 00:41:01.779573  <4>[    0.518574] Trying to register duplicate clock ID: 113

 5884 00:41:01.839317  <6>[    0.574892] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5885 00:41:01.853700  <6>[    0.589253] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5886 00:41:01.856750  <6>[    0.599000] KASLR enabled

 5887 00:41:01.871298  <6>[    0.607003] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages

 5888 00:41:01.877764  <6>[    0.614004] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page

 5889 00:41:01.884450  <6>[    0.620480] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages

 5890 00:41:01.891410  <6>[    0.627472] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page

 5891 00:41:01.897525  <6>[    0.633945] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages

 5892 00:41:01.904352  <6>[    0.640934] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page

 5893 00:41:01.911317  <6>[    0.647408] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages

 5894 00:41:01.918188  <6>[    0.654397] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page

 5895 00:41:01.920975  <6>[    0.661972] ACPI: Interpreter disabled.

 5896 00:41:01.931345  <6>[    0.669978] iommu: Default domain type: Translated 

 5897 00:41:01.938353  <6>[    0.675086] iommu: DMA domain TLB invalidation policy: strict mode 

 5898 00:41:01.941207  <5>[    0.681717] SCSI subsystem initialized

 5899 00:41:01.948292  <6>[    0.686131] usbcore: registered new interface driver usbfs

 5900 00:41:01.954701  <6>[    0.691858] usbcore: registered new interface driver hub

 5901 00:41:01.957844  <6>[    0.697400] usbcore: registered new device driver usb

 5902 00:41:01.965085  <6>[    0.703716] pps_core: LinuxPPS API ver. 1 registered

 5903 00:41:01.975146  <6>[    0.708900] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

 5904 00:41:01.978292  <6>[    0.718225] PTP clock support registered

 5905 00:41:01.981794  <6>[    0.722478] EDAC MC: Ver: 3.0.0

 5906 00:41:01.989342  <6>[    0.728115] FPGA manager framework

 5907 00:41:01.995897  <6>[    0.731798] Advanced Linux Sound Architecture Driver Initialized.

 5908 00:41:01.999655  <6>[    0.738550] vgaarb: loaded

 5909 00:41:02.005871  <6>[    0.741669] clocksource: Switched to clocksource arch_sys_counter

 5910 00:41:02.008945  <5>[    0.748099] VFS: Disk quotas dquot_6.6.0

 5911 00:41:02.015431  <6>[    0.752275] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

 5912 00:41:02.018827  <6>[    0.759447] pnp: PnP ACPI: disabled

 5913 00:41:02.027533  <6>[    0.766311] NET: Registered PF_INET protocol family

 5914 00:41:02.034595  <6>[    0.771533] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)

 5915 00:41:02.045991  <6>[    0.781432] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)

 5916 00:41:02.056377  <6>[    0.790185] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)

 5917 00:41:02.062549  <6>[    0.798136] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)

 5918 00:41:02.068951  <6>[    0.806370] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)

 5919 00:41:02.079131  <6>[    0.814464] TCP: Hash tables configured (established 32768 bind 32768)

 5920 00:41:02.085396  <6>[    0.821292] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5921 00:41:02.091993  <6>[    0.828263] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5922 00:41:02.098540  <6>[    0.835745] NET: Registered PF_UNIX/PF_LOCAL protocol family

 5923 00:41:02.105203  <6>[    0.841857] RPC: Registered named UNIX socket transport module.

 5924 00:41:02.108562  <6>[    0.848002] RPC: Registered udp transport module.

 5925 00:41:02.115066  <6>[    0.852926] RPC: Registered tcp transport module.

 5926 00:41:02.121847  <6>[    0.857849] RPC: Registered tcp NFSv4.1 backchannel transport module.

 5927 00:41:02.124706  <6>[    0.864501] PCI: CLS 0 bytes, default 64

 5928 00:41:02.128207  <6>[    0.868787] Unpacking initramfs...

 5929 00:41:02.154235  <6>[    0.889755] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available

 5930 00:41:02.164013  <6>[    0.898508] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available

 5931 00:41:02.167556  <6>[    0.907428] kvm [1]: IPA Size Limit: 40 bits

 5932 00:41:02.174881  <6>[    0.913781] kvm [1]: vgic-v2@c420000

 5933 00:41:02.178311  <6>[    0.917605] kvm [1]: GIC system register CPU interface enabled

 5934 00:41:02.184628  <6>[    0.923790] kvm [1]: vgic interrupt IRQ18

 5935 00:41:02.188047  <6>[    0.928162] kvm [1]: Hyp mode initialized successfully

 5936 00:41:02.195412  <5>[    0.934531] Initialise system trusted keyrings

 5937 00:41:02.202165  <6>[    0.939372] workingset: timestamp_bits=42 max_order=20 bucket_order=0

 5938 00:41:02.210920  <6>[    0.949346] squashfs: version 4.0 (2009/01/31) Phillip Lougher

 5939 00:41:02.217601  <5>[    0.955792] NFS: Registering the id_resolver key type

 5940 00:41:02.220942  <5>[    0.961103] Key type id_resolver registered

 5941 00:41:02.226889  <5>[    0.965516] Key type id_legacy registered

 5942 00:41:02.233667  <6>[    0.969823] nfs4filelayout_init: NFSv4 File Layout Driver Registering...

 5943 00:41:02.240496  <6>[    0.976743] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...

 5944 00:41:02.247051  <6>[    0.984484] 9p: Installing v9fs 9p2000 file system support

 5945 00:41:02.275004  <5>[    1.013553] Key type asymmetric registered

 5946 00:41:02.278631  <5>[    1.017901] Asymmetric key parser 'x509' registered

 5947 00:41:02.288314  <6>[    1.023055] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)

 5948 00:41:02.292232  <6>[    1.030674] io scheduler mq-deadline registered

 5949 00:41:02.295135  <6>[    1.035432] io scheduler kyber registered

 5950 00:41:02.317464  <6>[    1.056276] EINJ: ACPI disabled.

 5951 00:41:02.324420  <4>[    1.060052] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17

 5952 00:41:02.362582  <6>[    1.101054] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

 5953 00:41:02.370705  <6>[    1.109527] printk: console [ttyS0] disabled

 5954 00:41:02.398891  <6>[    1.134178] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2

 5955 00:41:02.405641  <6>[    1.143653] printk: console [ttyS0] enabled

 5956 00:41:02.409094  <6>[    1.143653] printk: console [ttyS0] enabled

 5957 00:41:02.415103  <6>[    1.152570] printk: bootconsole [mtk8250] disabled

 5958 00:41:02.418353  <6>[    1.152570] printk: bootconsole [mtk8250] disabled

 5959 00:41:02.428425  <3>[    1.163098] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47

 5960 00:41:02.434819  <3>[    1.171480] mt6577-uart 11003000.serial: Error applying setting, reverse things back

 5961 00:41:02.464391  <6>[    1.199883] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2

 5962 00:41:02.471068  <6>[    1.209543] serial serial0: tty port ttyS1 registered

 5963 00:41:02.477578  <6>[    1.216104] SuperH (H)SCI(F) driver initialized

 5964 00:41:02.480900  <6>[    1.221630] msm_serial: driver initialized

 5965 00:41:02.496702  <6>[    1.231997] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000

 5966 00:41:02.506081  <6>[    1.240602] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000

 5967 00:41:02.512780  <6>[    1.249178] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000

 5968 00:41:02.523004  <6>[    1.257748] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000

 5969 00:41:02.532405  <6>[    1.266401] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000

 5970 00:41:02.538700  <6>[    1.275064] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000

 5971 00:41:02.549086  <6>[    1.283804] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000

 5972 00:41:02.555849  <6>[    1.292542] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000

 5973 00:41:02.565537  <6>[    1.301110] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000

 5974 00:41:02.575232  <6>[    1.309909] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000

 5975 00:41:02.583092  <4>[    1.322306] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5976 00:41:02.592363  <6>[    1.331672] loop: module loaded

 5977 00:41:02.604576  <6>[    1.343555] vsim1: Bringing 1800000uV into 2700000-2700000uV

 5978 00:41:02.622799  <6>[    1.361544] megasas: 07.719.03.00-rc1

 5979 00:41:02.631695  <6>[    1.370358] spi-nor spi1.0: w25q64dw (8192 Kbytes)

 5980 00:41:02.645463  <6>[    1.381046] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2

 5981 00:41:02.658861  <6>[    1.397920] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)

 5982 00:41:02.715758  <6>[    1.448145] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d

 5983 00:41:02.833380  <6>[    1.572353] Freeing initrd memory: 20856K

 5984 00:41:02.852312  <4>[    1.588094] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'

 5985 00:41:02.858955  <4>[    1.597323] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1

 5986 00:41:02.865417  <4>[    1.604021] Hardware name: Google juniper sku16 board (DT)

 5987 00:41:02.869383  <4>[    1.609760] Call trace:

 5988 00:41:02.872405  <4>[    1.612461]  dump_backtrace.part.0+0xe0/0xf0

 5989 00:41:02.875526  <4>[    1.616997]  show_stack+0x18/0x30

 5990 00:41:02.878876  <4>[    1.620569]  dump_stack_lvl+0x68/0x84

 5991 00:41:02.885471  <4>[    1.624490]  dump_stack+0x18/0x34

 5992 00:41:02.888744  <4>[    1.628060]  sysfs_warn_dup+0x64/0x80

 5993 00:41:02.892139  <4>[    1.631982]  sysfs_do_create_link_sd+0xf0/0x100

 5994 00:41:02.895601  <4>[    1.636769]  sysfs_create_link+0x20/0x40

 5995 00:41:02.902443  <4>[    1.640948]  bus_add_device+0x68/0x10c

 5996 00:41:02.905171  <4>[    1.644954]  device_add+0x340/0x7ac

 5997 00:41:02.908599  <4>[    1.648697]  of_device_add+0x44/0x60

 5998 00:41:02.915490  <4>[    1.652531]  of_platform_device_create_pdata+0x90/0x120

 5999 00:41:02.919016  <4>[    1.658013]  of_platform_bus_create+0x170/0x370

 6000 00:41:02.922310  <4>[    1.662799]  of_platform_populate+0x50/0xfc

 6001 00:41:02.928353  <4>[    1.667239]  parse_mtd_partitions+0x1dc/0x510

 6002 00:41:02.932336  <4>[    1.671851]  mtd_device_parse_register+0xf8/0x2e0

 6003 00:41:02.935085  <4>[    1.676810]  spi_nor_probe+0x21c/0x2f0

 6004 00:41:02.941909  <4>[    1.680815]  spi_mem_probe+0x6c/0xb0

 6005 00:41:02.945165  <4>[    1.684648]  spi_probe+0x84/0xe4

 6006 00:41:02.948325  <4>[    1.688130]  really_probe+0xbc/0x2e0

 6007 00:41:02.952221  <4>[    1.691960]  __driver_probe_device+0x78/0x11c

 6008 00:41:02.958336  <4>[    1.696572]  driver_probe_device+0xd8/0x160

 6009 00:41:02.961725  <4>[    1.701010]  __device_attach_driver+0xb8/0x134

 6010 00:41:02.965018  <4>[    1.705709]  bus_for_each_drv+0x78/0xd0

 6011 00:41:02.968518  <4>[    1.709799]  __device_attach+0xa8/0x1c0

 6012 00:41:02.975091  <4>[    1.713890]  device_initial_probe+0x14/0x20

 6013 00:41:02.978596  <4>[    1.718328]  bus_probe_device+0x9c/0xa4

 6014 00:41:02.981966  <4>[    1.722418]  device_add+0x3ac/0x7ac

 6015 00:41:02.985022  <4>[    1.726160]  __spi_add_device+0x78/0x120

 6016 00:41:02.991676  <4>[    1.730339]  spi_add_device+0x40/0x7c

 6017 00:41:02.994640  <4>[    1.734256]  spi_register_controller+0x610/0xad0

 6018 00:41:03.001459  <4>[    1.739129]  devm_spi_register_controller+0x4c/0xa4

 6019 00:41:03.005062  <4>[    1.744262]  mtk_spi_probe+0x3f8/0x650

 6020 00:41:03.007968  <4>[    1.748267]  platform_probe+0x68/0xe0

 6021 00:41:03.011654  <4>[    1.752185]  really_probe+0xbc/0x2e0

 6022 00:41:03.017850  <4>[    1.756015]  __driver_probe_device+0x78/0x11c

 6023 00:41:03.021131  <4>[    1.760627]  driver_probe_device+0xd8/0x160

 6024 00:41:03.024556  <4>[    1.765065]  __driver_attach+0x94/0x19c

 6025 00:41:03.028041  <4>[    1.769156]  bus_for_each_dev+0x70/0xd0

 6026 00:41:03.034680  <4>[    1.773246]  driver_attach+0x24/0x30

 6027 00:41:03.037738  <4>[    1.777076]  bus_add_driver+0x154/0x20c

 6028 00:41:03.041040  <4>[    1.781167]  driver_register+0x78/0x130

 6029 00:41:03.047911  <4>[    1.785258]  __platform_driver_register+0x28/0x34

 6030 00:41:03.051026  <4>[    1.790217]  mtk_spi_driver_init+0x1c/0x28

 6031 00:41:03.054314  <4>[    1.794570]  do_one_initcall+0x50/0x1d0

 6032 00:41:03.057696  <4>[    1.798661]  kernel_init_freeable+0x21c/0x288

 6033 00:41:03.064515  <4>[    1.803274]  kernel_init+0x24/0x12c

 6034 00:41:03.067451  <4>[    1.807019]  ret_from_fork+0x10/0x20

 6035 00:41:03.077129  <6>[    1.815935] tun: Universal TUN/TAP device driver, 1.6

 6036 00:41:03.080485  <6>[    1.822243] thunder_xcv, ver 1.0

 6037 00:41:03.086805  <6>[    1.825755] thunder_bgx, ver 1.0

 6038 00:41:03.086882  <6>[    1.829253] nicpf, ver 1.0

 6039 00:41:03.098246  <6>[    1.833621] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

 6040 00:41:03.101003  <6>[    1.841105] hns3: Copyright (c) 2017 Huawei Corporation.

 6041 00:41:03.107714  <6>[    1.846703] hclge is initializing

 6042 00:41:03.111024  <6>[    1.850291] e1000: Intel(R) PRO/1000 Network Driver

 6043 00:41:03.117621  <6>[    1.855425] e1000: Copyright (c) 1999-2006 Intel Corporation.

 6044 00:41:03.120971  <6>[    1.861447] e1000e: Intel(R) PRO/1000 Network Driver

 6045 00:41:03.127774  <6>[    1.866668] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

 6046 00:41:03.134479  <6>[    1.872860] igb: Intel(R) Gigabit Ethernet Network Driver

 6047 00:41:03.141221  <6>[    1.878515] igb: Copyright (c) 2007-2014 Intel Corporation.

 6048 00:41:03.147637  <6>[    1.884358] igbvf: Intel(R) Gigabit Virtual Function Network Driver

 6049 00:41:03.154032  <6>[    1.890881] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

 6050 00:41:03.157951  <6>[    1.897434] sky2: driver version 1.30

 6051 00:41:03.163965  <6>[    1.902726] usbcore: registered new device driver r8152-cfgselector

 6052 00:41:03.170533  <6>[    1.909271] usbcore: registered new interface driver r8152

 6053 00:41:03.177569  <6>[    1.915098] VFIO - User Level meta-driver version: 0.3

 6054 00:41:03.183925  <6>[    1.922917] mtu3 11201000.usb: uwk - reg:0x420, version:101

 6055 00:41:03.190758  <4>[    1.928789] mtu3 11201000.usb: supply vbus not found, using dummy regulator

 6056 00:41:03.197567  <6>[    1.936059] mtu3 11201000.usb: dr_mode: 1, drd: auto

 6057 00:41:03.203744  <6>[    1.941284] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0

 6058 00:41:03.207420  <6>[    1.947468] mtu3 11201000.usb: usb3-drd: 0

 6059 00:41:03.217177  <6>[    1.953003] mtu3 11201000.usb: xHCI platform device register success...

 6060 00:41:03.224140  <4>[    1.961646] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator

 6061 00:41:03.231091  <6>[    1.969577] xhci-mtk 11200000.usb: xHCI Host Controller

 6062 00:41:03.237072  <6>[    1.975106] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

 6063 00:41:03.243964  <6>[    1.982829] xhci-mtk 11200000.usb: USB3 root hub has no ports

 6064 00:41:03.253960  <6>[    1.988838] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

 6065 00:41:03.260241  <6>[    1.998262] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000

 6066 00:41:03.267255  <6>[    2.004340] xhci-mtk 11200000.usb: xHCI Host Controller

 6067 00:41:03.273353  <6>[    2.009828] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

 6068 00:41:03.280200  <6>[    2.017485] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed

 6069 00:41:03.283424  <6>[    2.024300] hub 1-0:1.0: USB hub found

 6070 00:41:03.286843  <6>[    2.028331] hub 1-0:1.0: 1 port detected

 6071 00:41:03.298191  <6>[    2.033650] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

 6072 00:41:03.301317  <6>[    2.042276] hub 2-0:1.0: USB hub found

 6073 00:41:03.310842  <3>[    2.046303] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)

 6074 00:41:03.317806  <6>[    2.054189] usbcore: registered new interface driver usb-storage

 6075 00:41:03.323959  <6>[    2.060774] usbcore: registered new device driver onboard-usb-hub

 6076 00:41:03.333884  <4>[    2.069767] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator

 6077 00:41:03.343026  <6>[    2.082000] mt6397-rtc mt6358-rtc: registered as rtc0

 6078 00:41:03.352735  <6>[    2.087482] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:41:03 UTC (1718498463)

 6079 00:41:03.359534  <6>[    2.097369] i2c_dev: i2c /dev entries driver

 6080 00:41:03.369113  <6>[    2.103756] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6081 00:41:03.375725  <6>[    2.112142] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6082 00:41:03.382796  <6>[    2.121050] i2c 4-0058: Fixed dependency cycle(s) with /panel

 6083 00:41:03.389306  <6>[    2.127119] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000

 6084 00:41:03.399164  <3>[    2.134592] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.

 6085 00:41:03.416105  <6>[    2.154655] cpu cpu0: EM: created perf domain

 6086 00:41:03.425652  <6>[    2.160141] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz

 6087 00:41:03.432441  <6>[    2.171428] cpu cpu4: EM: created perf domain

 6088 00:41:03.439547  <6>[    2.178502] sdhci: Secure Digital Host Controller Interface driver

 6089 00:41:03.446391  <6>[    2.184956] sdhci: Copyright(c) Pierre Ossman

 6090 00:41:03.452569  <6>[    2.190369] Synopsys Designware Multimedia Card Interface Driver

 6091 00:41:03.459725  <6>[    2.190880] mtk-msdc 11240000.mmc: allocated mmc-pwrseq

 6092 00:41:03.462678  <6>[    2.197446] sdhci-pltfm: SDHCI platform and OF driver helper

 6093 00:41:03.471473  <6>[    2.210338] ledtrig-cpu: registered to indicate activity on CPUs

 6094 00:41:03.479325  <6>[    2.218083] usbcore: registered new interface driver usbhid

 6095 00:41:03.482637  <6>[    2.223920] usbhid: USB HID core driver

 6096 00:41:03.493182  <6>[    2.228178] spi_master spi2: will run message pump with realtime priority

 6097 00:41:03.496664  <4>[    2.228190] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator

 6098 00:41:03.506984  <4>[    2.242442] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator

 6099 00:41:03.520317  <6>[    2.246253] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0

 6100 00:41:03.536775  <6>[    2.265339] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1

 6101 00:41:03.543447  <4>[    2.276311] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6102 00:41:03.546483  <6>[    2.279904] cros-ec-spi spi2.0: Chrome EC device registered

 6103 00:41:03.559617  <4>[    2.295653] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6104 00:41:03.572306  <4>[    2.308333] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6105 00:41:03.578986  <6>[    2.317044] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14

 6106 00:41:03.585741  <4>[    2.317162] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6107 00:41:03.589007  <6>[    2.324676] mmc0: new HS400 MMC card at address 0001

 6108 00:41:03.596294  <6>[    2.335381] mmcblk0: mmc0:0001 DA4032 29.1 GiB 

 6109 00:41:03.603010  <6>[    2.339311] mmc1: new ultra high speed SDR104 SDIO card at address 0001

 6110 00:41:03.609786  <6>[    2.346228]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

 6111 00:41:03.616587  <6>[    2.346695] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound

 6112 00:41:03.629935  <6>[    2.350669] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6113 00:41:03.636577  <6>[    2.373970] NET: Registered PF_PACKET protocol family

 6114 00:41:03.639835  <6>[    2.379358] 9pnet: Installing 9P2000 support

 6115 00:41:03.645827  <5>[    2.383990] Key type dns_resolver registered

 6116 00:41:03.649153  <6>[    2.389251] registered taskstats version 1

 6117 00:41:03.656025  <5>[    2.393680] Loading compiled-in X.509 certificates

 6118 00:41:03.665730  <6>[    2.394243] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2

 6119 00:41:03.672448  <6>[    2.400731] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB 

 6120 00:41:03.682610  <6>[    2.416099] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c

 6121 00:41:03.689323  <6>[    2.427648] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB 

 6122 00:41:03.695499  <6>[    2.433959] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)

 6123 00:41:03.706214  <6>[    2.441688] usb 1-1: new high-speed USB device number 2 using xhci-mtk

 6124 00:41:03.712633  <3>[    2.442690] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517

 6125 00:41:03.744294  <6>[    2.476973] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6126 00:41:03.754969  <6>[    2.490904] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)

 6127 00:41:03.765063  <6>[    2.499456] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)

 6128 00:41:03.771712  <6>[    2.507976] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)

 6129 00:41:03.781536  <6>[    2.516495] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

 6130 00:41:03.788455  <6>[    2.525014] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)

 6131 00:41:03.798255  <6>[    2.533532] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)

 6132 00:41:03.807896  <6>[    2.542050] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

 6133 00:41:03.814565  <6>[    2.551148] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0

 6134 00:41:03.820999  <6>[    2.558545] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0

 6135 00:41:03.827383  <6>[    2.565747] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0

 6136 00:41:03.834488  <6>[    2.572895] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0

 6137 00:41:03.844625  <6>[    2.580225] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0

 6138 00:41:03.851451  <6>[    2.588339] panfrost 13040000.gpu: clock rate = 511999970

 6139 00:41:03.861104  <6>[    2.594017] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet

 6140 00:41:03.864504  <6>[    2.596659] hub 1-1:1.0: USB hub found

 6141 00:41:03.870618  <6>[    2.604204] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0

 6142 00:41:03.877430  <6>[    2.607965] hub 1-1:1.0: 3 ports detected

 6143 00:41:03.884408  <6>[    2.615579] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400

 6144 00:41:03.896920  <6>[    2.628277] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7

 6145 00:41:03.903855  <6>[    2.640354] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1

 6146 00:41:03.914677  <6>[    2.650459] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0

 6147 00:41:03.924390  <6>[    2.659683] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)

 6148 00:41:03.934822  <6>[    2.668830] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)

 6149 00:41:03.944529  <6>[    2.677959] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)

 6150 00:41:03.951117  <6>[    2.687087] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)

 6151 00:41:03.960711  <6>[    2.696388] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)

 6152 00:41:03.971363  <6>[    2.705687] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)

 6153 00:41:03.980915  <6>[    2.715160] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)

 6154 00:41:03.990861  <6>[    2.724633] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)

 6155 00:41:04.000869  <6>[    2.733760] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)

 6156 00:41:04.073415  <6>[    2.808866] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)

 6157 00:41:04.083088  <6>[    2.817788] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing

 6158 00:41:04.093651  <6>[    2.829532] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1

 6159 00:41:04.173617  <6>[    2.909704] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk

 6160 00:41:04.775399  <6>[    3.106008] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk

 6161 00:41:04.785131  <4>[    3.222865] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2

 6162 00:41:04.792130  <4>[    3.222884] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)

 6163 00:41:04.798307  <6>[    3.262729] r8152 1-1.2:1.0 eth0: v1.12.13

 6164 00:41:04.805132  <6>[    3.341697] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk

 6165 00:41:04.811275  <6>[    3.494487] Console: switching to colour frame buffer device 170x48

 6166 00:41:04.818200  <6>[    3.555125] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device

 6167 00:41:04.839278  <6>[    3.571542] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6168 00:41:04.856010  <6>[    3.588210] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6169 00:41:04.862391  <6>[    3.600405] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4

 6170 00:41:04.872603  <6>[    3.608452] input: volume-buttons as /devices/platform/volume-buttons/input/input5

 6171 00:41:04.882958  <6>[    3.614210] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6172 00:41:04.900627  <6>[    3.632832] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6173 00:41:06.203577  <6>[    4.942644] r8152 1-1.2:1.0 eth0: carrier on

 6174 00:41:08.690807  <5>[    4.973721] Sending DHCP requests .., OK

 6175 00:41:08.697368  <6>[    7.434161] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20

 6176 00:41:08.701037  <6>[    7.442599] IP-Config: Complete:

 6177 00:41:08.714101  <6>[    7.446165]      device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1

 6178 00:41:08.723837  <6>[    7.457064]      host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)

 6179 00:41:08.735419  <6>[    7.471339]      bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=

 6180 00:41:08.744350  <6>[    7.471350]      nameserver0=192.168.201.1

 6181 00:41:08.752294  <6>[    7.491058] clk: Disabling unused clocks

 6182 00:41:08.757094  <6>[    7.498990] ALSA device list:

 6183 00:41:08.765956  <6>[    7.505029]   No soundcards found.

 6184 00:41:08.774681  <6>[    7.513996] Freeing unused kernel memory: 8512K

 6185 00:41:08.781971  <6>[    7.521060] Run /init as init process

 6186 00:41:08.820920  Starting syslogd: OK

 6187 00:41:08.824065  Starting klogd: OK

 6188 00:41:08.833117  Running sysctl: OK

 6189 00:41:08.839746  Populating /dev using udev: <30>[    7.580297] udevd[207]: starting version 3.2.9

 6190 00:41:08.850108  <27>[    7.589046] udevd[207]: specified user 'tss' unknown

 6191 00:41:08.856243  <27>[    7.595558] udevd[207]: specified group 'tss' unknown

 6192 00:41:08.864377  <30>[    7.603317] udevd[208]: starting eudev-3.2.9

 6193 00:41:08.890234  <27>[    7.629407] udevd[208]: specified user 'tss' unknown

 6194 00:41:08.898308  <27>[    7.637228] udevd[208]: specified group 'tss' unknown

 6195 00:41:09.032322  <6>[    7.764225] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6196 00:41:09.038320  <3>[    7.776004] mtk-scp 10500000.scp: invalid resource

 6197 00:41:09.041623  <3>[    7.777134] thermal_sys: Failed to find 'trips' node

 6198 00:41:09.048300  <6>[    7.781162] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000

 6199 00:41:09.058367  <3>[    7.789707] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6200 00:41:09.061656  <6>[    7.794977] remoteproc remoteproc0: scp is available

 6201 00:41:09.071228  <3>[    7.801311] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6202 00:41:09.077855  <4>[    7.806573] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6203 00:41:09.087878  <4>[    7.814958] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6204 00:41:09.098002  <3>[    7.818404] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015

 6205 00:41:09.104198  <3>[    7.818418] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22

 6206 00:41:09.114137  <3>[    7.818423] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7  on device pinctrl_paris

 6207 00:41:09.120735  <3>[    7.818428] elan_i2c 2-0015: Error applying setting, reverse things back

 6208 00:41:09.127395  <6>[    7.823491] remoteproc remoteproc0: powering up scp

 6209 00:41:09.133969  <6>[    7.824266] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

 6210 00:41:09.140029  <3>[    7.832844] thermal_sys: Failed to find 'trips' node

 6211 00:41:09.150619  <3>[    7.835966] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6212 00:41:09.159949  <3>[    7.835980] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6213 00:41:09.166577  <3>[    7.835986] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6214 00:41:09.176590  <4>[    7.836829] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator

 6215 00:41:09.182917  <4>[    7.840991] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6216 00:41:09.193495  <4>[    7.845748] elants_i2c 0-0010: supply vccio not found, using dummy regulator

 6217 00:41:09.200130  <3>[    7.845806] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6218 00:41:09.210733  <3>[    7.845821] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6219 00:41:09.220937  <3>[    7.845830] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6220 00:41:09.227684  <3>[    7.845840] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6221 00:41:09.237224  <3>[    7.845848] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6222 00:41:09.243609  <3>[    7.847747] thermal_sys: Failed to find trip points for thermal-sensor2 id=0

 6223 00:41:09.253906  <3>[    7.847757] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22

 6224 00:41:09.260246  <3>[    7.856306] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6225 00:41:09.267072  <3>[    7.858712] remoteproc remoteproc0: request_firmware failed: -2

 6226 00:41:09.277997  <4>[    7.865674] generic-adc-thermal: probe of thermal-sensor2 failed with error -22

 6227 00:41:09.281231  <6>[    7.876247] mc: Linux media interface: v0.10

 6228 00:41:09.291241  <4>[    7.889894] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW

 6229 00:41:09.297901  <6>[    7.908526] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered

 6230 00:41:09.310729  <6>[    7.931686] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20

 6231 00:41:09.317950  <5>[    7.935251] cfg80211: Loading compiled-in X.509 certificates for regulatory database

 6232 00:41:09.324105  <6>[    7.955385] videodev: Linux video capture interface: v2.00

 6233 00:41:09.333966  <6>[    7.965109] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6234 00:41:09.340607  <6>[    7.972384]  cs_system_cfg: CoreSight Configuration manager initialised

 6235 00:41:09.347533  <5>[    7.972538] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

 6236 00:41:09.357403  <5>[    7.972956] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'

 6237 00:41:09.366870  <4>[    7.973013] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

 6238 00:41:09.370403  <6>[    7.973019] cfg80211: failed to load regulatory.db

 6239 00:41:09.383847  <3>[    7.980840] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!

 6240 00:41:09.393516  <6>[    7.985533] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input6

 6241 00:41:09.403632  <6>[    8.004436] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized

 6242 00:41:09.407086  <6>[    8.013156] Bluetooth: Core ver 2.22

 6243 00:41:09.413543  <6>[    8.014038] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized

 6244 00:41:09.420514  <6>[    8.021057] NET: Registered PF_BLUETOOTH protocol family

 6245 00:41:09.431034  <6>[    8.025812] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized

 6246 00:41:09.438229  <6>[    8.035574] Bluetooth: HCI device and connection manager initialized

 6247 00:41:09.444325  <6>[    8.043417] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized

 6248 00:41:09.454365  <6>[    8.044271] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0

 6249 00:41:09.461049  <6>[    8.045076] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0

 6250 00:41:09.467856  <6>[    8.053223] Bluetooth: HCI socket layer initialized

 6251 00:41:09.474048  <6>[    8.054179] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0

 6252 00:41:09.483848  <6>[    8.054563] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)

 6253 00:41:09.490645  <6>[    8.054909] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)

 6254 00:41:09.497131  <6>[    8.061416] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized

 6255 00:41:09.504697  <6>[    8.066982] Bluetooth: L2CAP socket layer initialized

 6256 00:41:09.517393  <6>[    8.073415] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8

 6257 00:41:09.524024  <6>[    8.073612] usbcore: registered new interface driver uvcvideo

 6258 00:41:09.530972  <6>[    8.085001] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized

 6259 00:41:09.537931  <6>[    8.085456] Bluetooth: SCO socket layer initialized

 6260 00:41:09.547713  <6>[    8.092394] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized

 6261 00:41:09.557736  <6>[    8.107563] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000

 6262 00:41:09.564621  <6>[    8.109643] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized

 6263 00:41:09.574871  <3>[    8.109777] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'

 6264 00:41:09.584769  <3>[    8.110849] debugfs: File 'Playback' in directory 'dapm' already present!

 6265 00:41:09.592052  <3>[    8.110855] debugfs: File 'Capture' in directory 'dapm' already present!

 6266 00:41:09.601951  <6>[    8.112132] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7

 6267 00:41:09.608278  <6>[    8.114540] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0

 6268 00:41:09.615801  <6>[    8.136706] Bluetooth: HCI UART driver ver 2.3

 6269 00:41:09.628288  <6>[    8.139563] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77

 6270 00:41:09.631834  <6>[    8.146984] Bluetooth: HCI UART protocol H4 registered

 6271 00:41:09.638202  <6>[    8.147031] Bluetooth: HCI UART protocol LL registered

 6272 00:41:09.648720  <4>[    8.291863] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

 6273 00:41:09.651739  <4>[    8.291863] Fallback method does not support PEC.

 6274 00:41:09.661775  <6>[    8.299843] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91

 6275 00:41:09.668670  <6>[    8.300580] Bluetooth: HCI UART protocol Three-wire (H5) registered

 6276 00:41:09.675116  <6>[    8.300962] Bluetooth: HCI UART protocol Broadcom registered

 6277 00:41:09.685125  <3>[    8.310926] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6278 00:41:09.688635  <6>[    8.320339] Bluetooth: HCI UART protocol QCA registered

 6279 00:41:09.695402  <6>[    8.321107] Bluetooth: hci0: setting up ROME/QCA6390

 6280 00:41:09.705701  <3>[    8.333474] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6281 00:41:09.712107  <6>[    8.334336] Bluetooth: HCI UART protocol Marvell registered

 6282 00:41:09.782262  done

 6283 00:41:09.790992  Saving random seed: OK

 6284 00:41:09.801109  Starting network<3>[    8.536970] Bluetooth: hci0: Frame reassembly failed (-84)

 6285 00:41:09.804241  : ip: RTNETLINK answers: File exists

 6286 00:41:09.804318  FAIL

 6287 00:41:09.843203  Starting dropbear sshd: <6>[    8.582115] NET: Registered PF_INET6 protocol family

 6288 00:41:09.850880  <6>[    8.589469] Segment Routing with IPv6

 6289 00:41:09.854053  <6>[    8.594244] In-situ OAM (IOAM) with IPv6

 6290 00:41:09.858878  OK

 6291 00:41:09.868447  /bin/sh: can't access tty; job control turned off

 6292 00:41:09.868776  Matched prompt #10: / #
 6294 00:41:09.868962  Setting prompt string to ['/ #']
 6295 00:41:09.869050  end: 2.2.5.1 login-action (duration 00:00:09) [common]
 6297 00:41:09.869228  end: 2.2.5 auto-login-action (duration 00:00:09) [common]
 6298 00:41:09.869308  start: 2.2.6 expect-shell-connection (timeout 00:03:59) [common]
 6299 00:41:09.869375  Setting prompt string to ['/ #']
 6300 00:41:09.869431  Forcing a shell prompt, looking for ['/ #']
 6302 00:41:09.919638  / # 

 6303 00:41:09.919790  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
 6304 00:41:09.919858  Waiting using forced prompt support (timeout 00:02:30)
 6305 00:41:09.919948  <6>[    8.640010] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1

 6306 00:41:09.925566  

 6307 00:41:09.925842  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
 6308 00:41:09.925933  start: 2.2.7 export-device-env (timeout 00:03:59) [common]
 6309 00:41:09.926018  end: 2.2.7 export-device-env (duration 00:00:00) [common]
 6310 00:41:09.926092  end: 2.2 depthcharge-retry (duration 00:01:01) [common]
 6311 00:41:09.926176  end: 2 depthcharge-action (duration 00:01:01) [common]
 6312 00:41:09.926289  start: 3 lava-test-retry (timeout 00:01:00) [common]
 6313 00:41:09.926369  start: 3.1 lava-test-shell (timeout 00:01:00) [common]
 6314 00:41:09.926437  Using namespace: common
 6316 00:41:10.026759  / # #

 6317 00:41:10.026969  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
 6318 00:41:10.027094  #<4>[    8.728196] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6319 00:41:10.027160  <4>[    8.749992] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6320 00:41:10.069714  <4>[    8.766439] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6321 00:41:10.069803  

 6322 00:41:10.069865  / # <4>[    8.779928] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6323 00:41:10.070102  Using /lava-14368363
 6325 00:41:10.170412  <6>[    8.811188] Bluetooth: hci0: QCAexport SHELL=/bin/sh

 6326 00:41:10.170629   Product ID   :0x00000008

 6327 00:41:10.170701  <6>[    8.819465] Bluetooth: hci0: QCA SOC Version  :0x00000044

 6328 00:41:10.170760  <6>[    8.829853] Bluetooth: hci0: QCA ROM Version  :0x00000302

 6329 00:41:10.170816  <6>[    8.840290] Bluetooth: hci0: QCA Patch Version:0x00000111

 6330 00:41:10.170870  <6>[    8.849899] Bluetooth: hci0: QCA controller version 0x00440302

 6331 00:41:10.170923  <6>[    8.859604] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin

 6332 00:41:10.170976  export SHE<4>[    8.869959] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2

 6333 00:41:10.171029  LL=/bin/sh<3>[    8.882714] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)

 6334 00:41:10.171081  <3>[    8.893286] Bluetooth: hci0: QCA Failed to download patch (-2)

 6335 00:41:10.175654  

 6337 00:41:10.276204  / # . /lava-14368363/environment

 6338 00:41:10.281813  . /lava-14368363/environment

 6340 00:41:10.382316  / # /lava-14368363/bin/lava-test-runner /lava-14368363/0

 6341 00:41:10.382506  Test shell timeout: 10s (minimum of the action and connection timeout)
 6342 00:41:10.388132  /lava-14368363/bin/lava-test-runner /lava-14368363/0

 6343 00:41:10.412244  + export 'TESTRUN_ID=0_dmesg'

 6344 00:41:10.418376  + c<8>[    9.156396] <LAVA_SIGNAL_STARTRUN 0_dmesg 14368363_1.5.2.3.1>

 6345 00:41:10.418629  Received signal: <STARTRUN> 0_dmesg 14368363_1.5.2.3.1
 6346 00:41:10.418696  Starting test lava.0_dmesg (14368363_1.5.2.3.1)
 6347 00:41:10.418774  Skipping test definition patterns.
 6348 00:41:10.424498  d /lava-14368363/0/tests/0_dmesg

 6349 00:41:10.424575  + cat uuid

 6350 00:41:10.427797  + UUID=14368363_1.5.2.3.1

 6351 00:41:10.427874  + set +x

 6352 00:41:10.430940  + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh

 6353 00:41:10.447534  <8>[    9.182934] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>

 6354 00:41:10.447783  Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
 6356 00:41:10.472499  <8>[    9.207773] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>

 6357 00:41:10.472746  Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
 6359 00:41:10.498008  <8>[    9.233812] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>

 6360 00:41:10.498238  Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
 6362 00:41:10.503374  + set +x

 6363 00:41:10.506881  Received signal: <ENDRUN> 0_dmesg 14368363_1.5.2.3.1
 6364 00:41:10.506960  Ending use of test pattern.
 6365 00:41:10.507019  Ending test lava.0_dmesg (14368363_1.5.2.3.1), duration 0.09
 6367 00:41:10.509860  <8>[    9.245567] <LAVA_SIGNAL_ENDRUN 0_dmesg 14368363_1.5.2.3.1>

 6368 00:41:10.513103  <LAVA_TEST_RUNNER EXIT>

 6369 00:41:10.513358  ok: lava_test_shell seems to have completed
 6370 00:41:10.513496  alert: pass
crit: pass
emerg: pass

 6371 00:41:10.513643  end: 3.1 lava-test-shell (duration 00:00:01) [common]
 6372 00:41:10.513727  end: 3 lava-test-retry (duration 00:00:01) [common]
 6373 00:41:10.513813  start: 4 finalize (timeout 00:08:39) [common]
 6374 00:41:10.513890  start: 4.1 power-off (timeout 00:00:30) [common]
 6375 00:41:10.514031  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
 6376 00:41:12.583505  >> Command sent successfully.

 6377 00:41:12.586652  Returned 0 in 2 seconds
 6378 00:41:12.686966  end: 4.1 power-off (duration 00:00:02) [common]
 6380 00:41:12.687267  start: 4.2 read-feedback (timeout 00:08:36) [common]
 6381 00:41:12.687513  Listened to connection for namespace 'common' for up to 1s
 6382 00:41:13.687642  Finalising connection for namespace 'common'
 6383 00:41:13.687786  Disconnecting from shell: Finalise
 6384 00:41:13.687869  / # 
 6385 00:41:13.788124  end: 4.2 read-feedback (duration 00:00:01) [common]
 6386 00:41:13.788262  end: 4 finalize (duration 00:00:03) [common]
 6387 00:41:13.788377  Cleaning after the job
 6388 00:41:13.788475  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/ramdisk
 6389 00:41:13.790993  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/kernel
 6390 00:41:13.798277  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/dtb
 6391 00:41:13.798433  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368363/tftp-deploy-svhd_iey/modules
 6392 00:41:13.804182  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368363
 6393 00:41:13.842750  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368363
 6394 00:41:13.842897  Job finished correctly