Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 42
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 84
1 00:43:04.525916 lava-dispatcher, installed at version: 2024.03
2 00:43:04.526181 start: 0 validate
3 00:43:04.526297 Start time: 2024-06-16 00:43:04.526290+00:00 (UTC)
4 00:43:04.526429 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:43:04.526576 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 00:43:04.780904 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:43:04.781565 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:43:05.036170 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:43:05.036992 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:43:05.296913 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:43:05.297524 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:43:05.556368 validate duration: 1.03
14 00:43:05.557546 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:43:05.558078 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:43:05.558532 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:43:05.559227 Not decompressing ramdisk as can be used compressed.
18 00:43:05.559702 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/arm64/rootfs.cpio.gz
19 00:43:05.560082 saving as /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/ramdisk/rootfs.cpio.gz
20 00:43:05.560535 total size: 39026414 (37 MB)
21 00:43:05.565227 progress 0 % (0 MB)
22 00:43:05.597924 progress 5 % (1 MB)
23 00:43:05.612639 progress 10 % (3 MB)
24 00:43:05.623617 progress 15 % (5 MB)
25 00:43:05.633655 progress 20 % (7 MB)
26 00:43:05.643504 progress 25 % (9 MB)
27 00:43:05.653582 progress 30 % (11 MB)
28 00:43:05.663475 progress 35 % (13 MB)
29 00:43:05.673525 progress 40 % (14 MB)
30 00:43:05.683438 progress 45 % (16 MB)
31 00:43:05.693462 progress 50 % (18 MB)
32 00:43:05.703559 progress 55 % (20 MB)
33 00:43:05.713363 progress 60 % (22 MB)
34 00:43:05.723599 progress 65 % (24 MB)
35 00:43:05.733575 progress 70 % (26 MB)
36 00:43:05.743773 progress 75 % (27 MB)
37 00:43:05.753607 progress 80 % (29 MB)
38 00:43:05.763460 progress 85 % (31 MB)
39 00:43:05.773323 progress 90 % (33 MB)
40 00:43:05.783302 progress 95 % (35 MB)
41 00:43:05.793112 progress 100 % (37 MB)
42 00:43:05.793369 37 MB downloaded in 0.23 s (159.85 MB/s)
43 00:43:05.793527 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:43:05.793750 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:43:05.793831 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:43:05.793908 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:43:05.794080 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:43:05.794143 saving as /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/kernel/Image
50 00:43:05.794197 total size: 54813184 (52 MB)
51 00:43:05.794252 No compression specified
52 00:43:05.795262 progress 0 % (0 MB)
53 00:43:05.809136 progress 5 % (2 MB)
54 00:43:05.823054 progress 10 % (5 MB)
55 00:43:05.837130 progress 15 % (7 MB)
56 00:43:05.851365 progress 20 % (10 MB)
57 00:43:05.865577 progress 25 % (13 MB)
58 00:43:05.879543 progress 30 % (15 MB)
59 00:43:05.893939 progress 35 % (18 MB)
60 00:43:05.908016 progress 40 % (20 MB)
61 00:43:05.922149 progress 45 % (23 MB)
62 00:43:05.936213 progress 50 % (26 MB)
63 00:43:05.950648 progress 55 % (28 MB)
64 00:43:05.964603 progress 60 % (31 MB)
65 00:43:05.978743 progress 65 % (34 MB)
66 00:43:05.992495 progress 70 % (36 MB)
67 00:43:06.006536 progress 75 % (39 MB)
68 00:43:06.020490 progress 80 % (41 MB)
69 00:43:06.034279 progress 85 % (44 MB)
70 00:43:06.048161 progress 90 % (47 MB)
71 00:43:06.061963 progress 95 % (49 MB)
72 00:43:06.075469 progress 100 % (52 MB)
73 00:43:06.075694 52 MB downloaded in 0.28 s (185.70 MB/s)
74 00:43:06.075844 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:43:06.076053 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:43:06.076135 start: 1.3 download-retry (timeout 00:09:59) [common]
78 00:43:06.076211 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 00:43:06.076340 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:43:06.076406 saving as /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:43:06.076459 total size: 57695 (0 MB)
82 00:43:06.076543 No compression specified
83 00:43:06.077613 progress 56 % (0 MB)
84 00:43:06.077874 progress 100 % (0 MB)
85 00:43:06.078084 0 MB downloaded in 0.00 s (33.92 MB/s)
86 00:43:06.078197 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:43:06.078399 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:43:06.078474 start: 1.4 download-retry (timeout 00:09:59) [common]
90 00:43:06.078548 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 00:43:06.078653 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:43:06.078714 saving as /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/modules/modules.tar
93 00:43:06.078767 total size: 8608736 (8 MB)
94 00:43:06.078821 Using unxz to decompress xz
95 00:43:06.080094 progress 0 % (0 MB)
96 00:43:06.098534 progress 5 % (0 MB)
97 00:43:06.124505 progress 10 % (0 MB)
98 00:43:06.151594 progress 15 % (1 MB)
99 00:43:06.174748 progress 20 % (1 MB)
100 00:43:06.197804 progress 25 % (2 MB)
101 00:43:06.220820 progress 30 % (2 MB)
102 00:43:06.244643 progress 35 % (2 MB)
103 00:43:06.270164 progress 40 % (3 MB)
104 00:43:06.292187 progress 45 % (3 MB)
105 00:43:06.315384 progress 50 % (4 MB)
106 00:43:06.339924 progress 55 % (4 MB)
107 00:43:06.364027 progress 60 % (4 MB)
108 00:43:06.387737 progress 65 % (5 MB)
109 00:43:06.411605 progress 70 % (5 MB)
110 00:43:06.436664 progress 75 % (6 MB)
111 00:43:06.461727 progress 80 % (6 MB)
112 00:43:06.485479 progress 85 % (7 MB)
113 00:43:06.509987 progress 90 % (7 MB)
114 00:43:06.534626 progress 95 % (7 MB)
115 00:43:06.559316 progress 100 % (8 MB)
116 00:43:06.564868 8 MB downloaded in 0.49 s (16.89 MB/s)
117 00:43:06.565067 end: 1.4.1 http-download (duration 00:00:00) [common]
119 00:43:06.565410 end: 1.4 download-retry (duration 00:00:00) [common]
120 00:43:06.565520 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:43:06.565627 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:43:06.565732 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:43:06.565829 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:43:06.566055 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd
125 00:43:06.566196 makedir: /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin
126 00:43:06.566289 makedir: /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/tests
127 00:43:06.566381 makedir: /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/results
128 00:43:06.566483 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-add-keys
129 00:43:06.566638 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-add-sources
130 00:43:06.566774 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-background-process-start
131 00:43:06.566917 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-background-process-stop
132 00:43:06.567070 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-common-functions
133 00:43:06.567245 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-echo-ipv4
134 00:43:06.567393 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-install-packages
135 00:43:06.567536 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-installed-packages
136 00:43:06.567681 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-os-build
137 00:43:06.567836 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-probe-channel
138 00:43:06.567983 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-probe-ip
139 00:43:06.568122 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-target-ip
140 00:43:06.568261 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-target-mac
141 00:43:06.568397 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-target-storage
142 00:43:06.568543 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-case
143 00:43:06.568681 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-event
144 00:43:06.568817 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-feedback
145 00:43:06.568962 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-raise
146 00:43:06.569098 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-reference
147 00:43:06.569234 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-runner
148 00:43:06.569370 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-set
149 00:43:06.569513 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-test-shell
150 00:43:06.569652 Updating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-install-packages (oe)
151 00:43:06.569824 Updating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/bin/lava-installed-packages (oe)
152 00:43:06.569969 Creating /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/environment
153 00:43:06.570150 LAVA metadata
154 00:43:06.570232 - LAVA_JOB_ID=14368374
155 00:43:06.570292 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:43:06.570392 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:43:06.570451 skipped lava-vland-overlay
158 00:43:06.570517 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:43:06.570586 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:43:06.570638 skipped lava-multinode-overlay
161 00:43:06.570702 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:43:06.570771 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:43:06.570835 Loading test definitions
164 00:43:06.570917 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:43:06.570975 Using /lava-14368374 at stage 0
166 00:43:06.571342 uuid=14368374_1.5.2.3.1 testdef=None
167 00:43:06.571441 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:43:06.571550 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:43:06.572188 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:43:06.572514 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:43:06.573318 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:43:06.573667 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:43:06.574494 runner path: /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/0/tests/0_cros-ec test_uuid 14368374_1.5.2.3.1
176 00:43:06.574667 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:43:06.574990 Creating lava-test-runner.conf files
179 00:43:06.575071 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368374/lava-overlay-2zzynpgd/lava-14368374/0 for stage 0
180 00:43:06.575177 - 0_cros-ec
181 00:43:06.575293 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:43:06.575394 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:43:06.581444 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:43:06.581539 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:43:06.581615 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:43:06.581689 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:43:06.581762 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:43:07.765117 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 00:43:07.765271 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 00:43:07.765375 extracting modules file /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368374/extract-overlay-ramdisk-qe0jxmyh/ramdisk
191 00:43:07.991358 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:43:07.991496 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 00:43:07.991575 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368374/compress-overlay-frpgklwh/overlay-1.5.2.4.tar.gz to ramdisk
194 00:43:07.991634 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368374/compress-overlay-frpgklwh/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368374/extract-overlay-ramdisk-qe0jxmyh/ramdisk
195 00:43:07.997736 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:43:07.997837 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 00:43:07.997915 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:43:07.997994 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 00:43:07.998060 Building ramdisk /var/lib/lava/dispatcher/tmp/14368374/extract-overlay-ramdisk-qe0jxmyh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368374/extract-overlay-ramdisk-qe0jxmyh/ramdisk
200 00:43:08.827075 >> 335941 blocks
201 00:43:14.160883 rename /var/lib/lava/dispatcher/tmp/14368374/extract-overlay-ramdisk-qe0jxmyh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/ramdisk/ramdisk.cpio.gz
202 00:43:14.161065 end: 1.5.7 compress-ramdisk (duration 00:00:06) [common]
203 00:43:14.161181 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 00:43:14.161261 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 00:43:14.161339 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/kernel/Image']
206 00:43:27.613909 Returned 0 in 13 seconds
207 00:43:27.714679 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/kernel/image.itb
208 00:43:28.586277 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:43:28.586409 output: Created: Sun Jun 16 01:43:28 2024
210 00:43:28.586477 output: Image 0 (kernel-1)
211 00:43:28.586531 output: Description:
212 00:43:28.586584 output: Created: Sun Jun 16 01:43:28 2024
213 00:43:28.586637 output: Type: Kernel Image
214 00:43:28.586687 output: Compression: lzma compressed
215 00:43:28.586740 output: Data Size: 13126376 Bytes = 12818.73 KiB = 12.52 MiB
216 00:43:28.586790 output: Architecture: AArch64
217 00:43:28.586837 output: OS: Linux
218 00:43:28.586888 output: Load Address: 0x00000000
219 00:43:28.586935 output: Entry Point: 0x00000000
220 00:43:28.586984 output: Hash algo: crc32
221 00:43:28.587034 output: Hash value: c791a20a
222 00:43:28.587083 output: Image 1 (fdt-1)
223 00:43:28.587131 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:43:28.587183 output: Created: Sun Jun 16 01:43:28 2024
225 00:43:28.587236 output: Type: Flat Device Tree
226 00:43:28.587290 output: Compression: uncompressed
227 00:43:28.587343 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:43:28.587396 output: Architecture: AArch64
229 00:43:28.587449 output: Hash algo: crc32
230 00:43:28.587502 output: Hash value: a9713552
231 00:43:28.587555 output: Image 2 (ramdisk-1)
232 00:43:28.587606 output: Description: unavailable
233 00:43:28.587655 output: Created: Sun Jun 16 01:43:28 2024
234 00:43:28.587701 output: Type: RAMDisk Image
235 00:43:28.587750 output: Compression: uncompressed
236 00:43:28.587797 output: Data Size: 52138960 Bytes = 50916.95 KiB = 49.72 MiB
237 00:43:28.587844 output: Architecture: AArch64
238 00:43:28.587891 output: OS: Linux
239 00:43:28.587936 output: Load Address: unavailable
240 00:43:28.587982 output: Entry Point: unavailable
241 00:43:28.588029 output: Hash algo: crc32
242 00:43:28.588075 output: Hash value: 584f8c2b
243 00:43:28.588121 output: Default Configuration: 'conf-1'
244 00:43:28.588167 output: Configuration 0 (conf-1)
245 00:43:28.588213 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:43:28.588259 output: Kernel: kernel-1
247 00:43:28.588305 output: Init Ramdisk: ramdisk-1
248 00:43:28.588352 output: FDT: fdt-1
249 00:43:28.588399 output: Loadables: kernel-1
250 00:43:28.588455 output:
251 00:43:28.588585 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 00:43:28.588666 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 00:43:28.588751 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 00:43:28.588831 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
255 00:43:28.588900 No LXC device requested
256 00:43:28.588970 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:43:28.589046 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
258 00:43:28.589112 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:43:28.589172 Checking files for TFTP limit of 4294967296 bytes.
260 00:43:28.589618 end: 1 tftp-deploy (duration 00:00:23) [common]
261 00:43:28.589715 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:43:28.589799 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:43:28.589907 substitutions:
264 00:43:28.589969 - {DTB}: 14368374/tftp-deploy-m8jkna6k/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:43:28.590073 - {INITRD}: 14368374/tftp-deploy-m8jkna6k/ramdisk/ramdisk.cpio.gz
266 00:43:28.590126 - {KERNEL}: 14368374/tftp-deploy-m8jkna6k/kernel/Image
267 00:43:28.590178 - {LAVA_MAC}: None
268 00:43:28.590228 - {PRESEED_CONFIG}: None
269 00:43:28.590278 - {PRESEED_LOCAL}: None
270 00:43:28.590326 - {RAMDISK}: 14368374/tftp-deploy-m8jkna6k/ramdisk/ramdisk.cpio.gz
271 00:43:28.590390 - {ROOT_PART}: None
272 00:43:28.590455 - {ROOT}: None
273 00:43:28.590609 - {SERVER_IP}: 192.168.201.1
274 00:43:28.590751 - {TEE}: None
275 00:43:28.590801 Parsed boot commands:
276 00:43:28.590848 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:43:28.590999 Parsed boot commands: tftpboot 192.168.201.1 14368374/tftp-deploy-m8jkna6k/kernel/image.itb 14368374/tftp-deploy-m8jkna6k/kernel/cmdline
278 00:43:28.591080 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:43:28.591154 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:43:28.591231 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:43:28.591306 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:43:28.591365 Not connected, no need to disconnect.
283 00:43:28.591431 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:43:28.591502 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:43:28.591558 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-1'
286 00:43:28.594902 Setting prompt string to ['lava-test: # ']
287 00:43:28.595209 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:43:28.595303 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:43:28.595395 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:43:28.595479 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:43:28.595643 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-1']
292 00:43:51.451074 Returned 0 in 22 seconds
293 00:43:51.552018 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 00:43:51.553203 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 00:43:51.553675 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 00:43:51.554142 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:43:51.554448 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:43:51.554769 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:43:51.557088 [Enter `^Ec?' for help]
301 00:43:51.557795 [DL] 00000000 00000000 010701
302 00:43:51.558493
303 00:43:51.559095
304 00:43:51.559396 F0: 102B 0000
305 00:43:51.559685
306 00:43:51.559973 F3: 1006 0033 [0200]
307 00:43:51.560312
308 00:43:51.560608 F3: 4001 00E0 [0200]
309 00:43:51.560894
310 00:43:51.561187 F3: 0000 0000
311 00:43:51.561475
312 00:43:51.561768 V0: 0000 0000 [0001]
313 00:43:51.562099
314 00:43:51.562379 00: 1027 0002
315 00:43:51.562686
316 00:43:51.562956 01: 0000 0000
317 00:43:51.563237
318 00:43:51.563484 BP: 0C00 0251 [0000]
319 00:43:51.563746
320 00:43:51.563985 G0: 1182 0000
321 00:43:51.564245
322 00:43:51.564486 EC: 0004 0000 [0001]
323 00:43:51.564731
324 00:43:51.564994 S7: 0000 0000 [0000]
325 00:43:51.565237
326 00:43:51.565477 CC: 0000 0000 [0001]
327 00:43:51.565717
328 00:43:51.565955 T0: 0000 00DB [000F]
329 00:43:51.566271
330 00:43:51.566515 Jump to BL
331 00:43:51.566757
332 00:43:51.567002
333 00:43:51.567245
334 00:43:51.567490 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:43:51.567752 ARM64: Exception handlers installed.
336 00:43:51.567996 ARM64: Testing exception
337 00:43:51.568242 ARM64: Done test exception
338 00:43:51.568482 WDT: Last reset was cold boot
339 00:43:51.568723 SPI0(PAD0) initialized at 992727 Hz
340 00:43:51.568966 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:43:51.569235 Manufacturer: ef
342 00:43:51.569478 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:43:51.569722 Probing TPM: . done!
344 00:43:51.569961 TPM ready after 0 ms
345 00:43:51.570275 Connected to device vid:did:rid of 1ae0:0028:00
346 00:43:51.570523 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 00:43:51.570782 Initialized TPM device CR50 revision 0
348 00:43:51.571052 tlcl_send_startup: Startup return code is 0
349 00:43:51.571438 TPM: setup succeeded
350 00:43:51.571692 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:43:51.571943 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:43:51.572257 in-header: 03 19 00 00 08 00 00 00
353 00:43:51.572577 in-data: a2 e0 47 00 13 00 00 00
354 00:43:51.572881 Chrome EC: UHEPI supported
355 00:43:51.573179 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:43:51.573502 in-header: 03 a1 00 00 08 00 00 00
357 00:43:51.573848 in-data: 84 60 60 10 00 00 00 00
358 00:43:51.574198 Phase 1
359 00:43:51.574574 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:43:51.575015 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:43:51.575427 VB2:vb2_check_recovery() Recovery was requested manually
362 00:43:51.575690 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:43:51.576056 Recovery requested (1009000e)
364 00:43:51.576409 tlcl_extend: response is 0
365 00:43:51.576689 tlcl_extend: response is 0
366 00:43:51.577009
367 00:43:51.577367
368 00:43:51.577631 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:43:51.577892 ARM64: Exception handlers installed.
370 00:43:51.578297 ARM64: Testing exception
371 00:43:51.578560 ARM64: Done test exception
372 00:43:51.578918 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x826a, sec=0x2011
373 00:43:51.579199 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:43:51.579604 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:43:51.579884 [RTC]rtc_get_frequency_meter,134: input=0xf, output=875
376 00:43:51.580236 [RTC]rtc_get_frequency_meter,134: input=0x7, output=742
377 00:43:51.580633 [RTC]rtc_get_frequency_meter,134: input=0xb, output=809
378 00:43:51.580892 [RTC]rtc_get_frequency_meter,134: input=0x9, output=774
379 00:43:51.581162 [RTC]rtc_get_frequency_meter,134: input=0xa, output=792
380 00:43:51.581462 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x826a
381 00:43:51.581752 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 00:43:51.582036 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 00:43:51.582375 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 00:43:51.582631 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 00:43:51.582879 in-header: 03 19 00 00 08 00 00 00
386 00:43:51.583125 in-data: a2 e0 47 00 13 00 00 00
387 00:43:51.583354 Chrome EC: UHEPI supported
388 00:43:51.583528 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 00:43:51.583706 in-header: 03 a1 00 00 08 00 00 00
390 00:43:51.583882 in-data: 84 60 60 10 00 00 00 00
391 00:43:51.584055 Skip loading cached calibration data
392 00:43:51.584229 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 00:43:51.584405 in-header: 03 a1 00 00 08 00 00 00
394 00:43:51.584575 in-data: 84 60 60 10 00 00 00 00
395 00:43:51.584746 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 00:43:51.584922 in-header: 03 a1 00 00 08 00 00 00
397 00:43:51.585093 in-data: 84 60 60 10 00 00 00 00
398 00:43:51.585265 ADC[3]: Raw value=216781 ID=1
399 00:43:51.585437 Manufacturer: ef
400 00:43:51.585611 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 00:43:51.585800 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 00:43:51.586000 CBFS @ 21000 size 3d4000
403 00:43:51.586188 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 00:43:51.586362 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 00:43:51.586536 CBFS: Found @ offset 3c700 size 44
406 00:43:51.586723 DRAM-K: Full Calibration
407 00:43:51.586897 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 00:43:51.587109 CBFS @ 21000 size 3d4000
409 00:43:51.587285 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 00:43:51.587458 CBFS: Locating 'fallback/dram'
411 00:43:51.587639 CBFS: Found @ offset 24b00 size 12268
412 00:43:51.587819 read SPI 0x45b44 0x1224c: 22776 us, 3262 KB/s, 26.096 Mbps
413 00:43:51.587994 ddr_geometry: 1, config: 0x0
414 00:43:51.588170 header.status = 0x0
415 00:43:51.588348 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 00:43:51.588481 header.version = 0x5 (expected: 0x5)
417 00:43:51.588611 header.size = 0x8f0 (expected: 0x8f0)
418 00:43:51.588742 header.config = 0x0
419 00:43:51.588883 header.flags = 0x0
420 00:43:51.589012 header.checksum = 0x0
421 00:43:51.589408 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 00:43:51.589561 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 00:43:51.589699 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 00:43:51.589831 ddr_geometry:1
425 00:43:51.590088 [EMI] new MDL number = 1
426 00:43:51.590335 dram_cbt_mode_extern: 0
427 00:43:51.590561 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 00:43:51.590782 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 00:43:51.590928
430 00:43:51.591060
431 00:43:51.591191 [Bianco] ETT version 0.0.0.1
432 00:43:51.591336 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 00:43:51.591468
434 00:43:51.591601 vSetVcoreByFreq with vcore:762500, freq=1600
435 00:43:51.591747
436 00:43:51.591879 [DramcInit]
437 00:43:51.592008 AutoRefreshCKEOff AutoREF OFF
438 00:43:51.592148 DDRPhyPLLSetting-CKEOFF
439 00:43:51.592284 DDRPhyPLLSetting-CKEON
440 00:43:51.592415
441 00:43:51.592565 Enable WDQS
442 00:43:51.592700 [ModeRegInit_LP4] CH0 RK0
443 00:43:51.592831 Write Rank0 MR13 =0x18
444 00:43:51.592969 Write Rank0 MR12 =0x5d
445 00:43:51.593105 Write Rank0 MR1 =0x56
446 00:43:51.593247 Write Rank0 MR2 =0x1a
447 00:43:51.593355 Write Rank0 MR11 =0x0
448 00:43:51.593464 Write Rank0 MR22 =0x38
449 00:43:51.593569 Write Rank0 MR14 =0x5d
450 00:43:51.593674 Write Rank0 MR3 =0x30
451 00:43:51.593790 Write Rank0 MR13 =0x58
452 00:43:51.593956 Write Rank0 MR12 =0x5d
453 00:43:51.594100 Write Rank0 MR1 =0x56
454 00:43:51.594209 Write Rank0 MR2 =0x2d
455 00:43:51.594314 Write Rank0 MR11 =0x23
456 00:43:51.594419 Write Rank0 MR22 =0x34
457 00:43:51.594536 Write Rank0 MR14 =0x10
458 00:43:51.594640 Write Rank0 MR3 =0x30
459 00:43:51.594745 Write Rank0 MR13 =0xd8
460 00:43:51.594855 [ModeRegInit_LP4] CH0 RK1
461 00:43:51.594964 Write Rank1 MR13 =0x18
462 00:43:51.595069 Write Rank1 MR12 =0x5d
463 00:43:51.595174 Write Rank1 MR1 =0x56
464 00:43:51.595285 Write Rank1 MR2 =0x1a
465 00:43:51.595395 Write Rank1 MR11 =0x0
466 00:43:51.595500 Write Rank1 MR22 =0x38
467 00:43:51.595604 Write Rank1 MR14 =0x5d
468 00:43:51.595709 Write Rank1 MR3 =0x30
469 00:43:51.595813 Write Rank1 MR13 =0x58
470 00:43:51.595918 Write Rank1 MR12 =0x5d
471 00:43:51.596032 Write Rank1 MR1 =0x56
472 00:43:51.596136 Write Rank1 MR2 =0x2d
473 00:43:51.596241 Write Rank1 MR11 =0x23
474 00:43:51.596346 Write Rank1 MR22 =0x34
475 00:43:51.596452 Write Rank1 MR14 =0x10
476 00:43:51.596557 Write Rank1 MR3 =0x30
477 00:43:51.596662 Write Rank1 MR13 =0xd8
478 00:43:51.596766 [ModeRegInit_LP4] CH1 RK0
479 00:43:51.596931 Write Rank0 MR13 =0x18
480 00:43:51.597042 Write Rank0 MR12 =0x5d
481 00:43:51.597146 Write Rank0 MR1 =0x56
482 00:43:51.597250 Write Rank0 MR2 =0x1a
483 00:43:51.597354 Write Rank0 MR11 =0x0
484 00:43:51.597458 Write Rank0 MR22 =0x38
485 00:43:51.597564 Write Rank0 MR14 =0x5d
486 00:43:51.597669 Write Rank0 MR3 =0x30
487 00:43:51.597773 Write Rank0 MR13 =0x58
488 00:43:51.597877 Write Rank0 MR12 =0x5d
489 00:43:51.597991 Write Rank0 MR1 =0x56
490 00:43:51.598105 Write Rank0 MR2 =0x2d
491 00:43:51.598211 Write Rank0 MR11 =0x23
492 00:43:51.598318 Write Rank0 MR22 =0x34
493 00:43:51.598405 Write Rank0 MR14 =0x10
494 00:43:51.598491 Write Rank0 MR3 =0x30
495 00:43:51.598580 Write Rank0 MR13 =0xd8
496 00:43:51.598667 [ModeRegInit_LP4] CH1 RK1
497 00:43:51.598755 Write Rank1 MR13 =0x18
498 00:43:51.598842 Write Rank1 MR12 =0x5d
499 00:43:51.598929 Write Rank1 MR1 =0x56
500 00:43:51.599016 Write Rank1 MR2 =0x1a
501 00:43:51.599103 Write Rank1 MR11 =0x0
502 00:43:51.599190 Write Rank1 MR22 =0x38
503 00:43:51.599296 Write Rank1 MR14 =0x5d
504 00:43:51.599385 Write Rank1 MR3 =0x30
505 00:43:51.599474 Write Rank1 MR13 =0x58
506 00:43:51.599562 Write Rank1 MR12 =0x5d
507 00:43:51.599649 Write Rank1 MR1 =0x56
508 00:43:51.599735 Write Rank1 MR2 =0x2d
509 00:43:51.599822 Write Rank1 MR11 =0x23
510 00:43:51.599909 Write Rank1 MR22 =0x34
511 00:43:51.600001 Write Rank1 MR14 =0x10
512 00:43:51.600088 Write Rank1 MR3 =0x30
513 00:43:51.600175 Write Rank1 MR13 =0xd8
514 00:43:51.600262 match AC timing 3
515 00:43:51.600356 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 00:43:51.600492 [MiockJmeterHQA]
517 00:43:51.600583 vSetVcoreByFreq with vcore:762500, freq=1600
518 00:43:51.600672
519 00:43:51.600761 MIOCK jitter meter ch=0
520 00:43:51.600849
521 00:43:51.600942 1T = (89-15) = 74 dly cells
522 00:43:51.601037 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 844/100 ps
523 00:43:51.601127 vSetVcoreByFreq with vcore:725000, freq=1200
524 00:43:51.601215
525 00:43:51.601301 MIOCK jitter meter ch=0
526 00:43:51.601389
527 00:43:51.601476 1T = (84-13) = 71 dly cells
528 00:43:51.601567 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 880/100 ps
529 00:43:51.601656 vSetVcoreByFreq with vcore:725000, freq=800
530 00:43:51.601742
531 00:43:51.601829 MIOCK jitter meter ch=0
532 00:43:51.601924
533 00:43:51.602026 1T = (84-13) = 71 dly cells
534 00:43:51.602119 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 880/100 ps
535 00:43:51.602208 vSetVcoreByFreq with vcore:762500, freq=1600
536 00:43:51.602296 vSetVcoreByFreq with vcore:762500, freq=1600
537 00:43:51.602383
538 00:43:51.602470 K DRVP
539 00:43:51.602561 1. OCD DRVP=0 CALOUT=0
540 00:43:51.602655 1. OCD DRVP=1 CALOUT=0
541 00:43:51.602746 1. OCD DRVP=2 CALOUT=0
542 00:43:51.602835 1. OCD DRVP=3 CALOUT=0
543 00:43:51.602941 1. OCD DRVP=4 CALOUT=0
544 00:43:51.603035 1. OCD DRVP=5 CALOUT=0
545 00:43:51.603132 1. OCD DRVP=6 CALOUT=0
546 00:43:51.603222 1. OCD DRVP=7 CALOUT=0
547 00:43:51.603318 1. OCD DRVP=8 CALOUT=0
548 00:43:51.603412 1. OCD DRVP=9 CALOUT=1
549 00:43:51.603503
550 00:43:51.603580 1. OCD DRVP calibration OK! DRVP=9
551 00:43:51.603657
552 00:43:51.603731
553 00:43:51.603805
554 00:43:51.603878 K ODTN
555 00:43:51.603953 3. OCD ODTN=0 ,CALOUT=1
556 00:43:51.604034 3. OCD ODTN=1 ,CALOUT=1
557 00:43:51.604111 3. OCD ODTN=2 ,CALOUT=1
558 00:43:51.604188 3. OCD ODTN=3 ,CALOUT=1
559 00:43:51.604264 3. OCD ODTN=4 ,CALOUT=1
560 00:43:51.604340 3. OCD ODTN=5 ,CALOUT=1
561 00:43:51.604416 3. OCD ODTN=6 ,CALOUT=1
562 00:43:51.604497 3. OCD ODTN=7 ,CALOUT=1
563 00:43:51.604576 3. OCD ODTN=8 ,CALOUT=0
564 00:43:51.604652
565 00:43:51.604727 3. OCD ODTN calibration OK! ODTN=8
566 00:43:51.604804
567 00:43:51.604878 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=8
568 00:43:51.604955 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15
569 00:43:51.605036 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15 (After Adjust)
570 00:43:51.605114
571 00:43:51.605193 K DRVP
572 00:43:51.605282 1. OCD DRVP=0 CALOUT=0
573 00:43:51.605359 1. OCD DRVP=1 CALOUT=0
574 00:43:51.605437 1. OCD DRVP=2 CALOUT=0
575 00:43:51.605519 1. OCD DRVP=3 CALOUT=0
576 00:43:51.605599 1. OCD DRVP=4 CALOUT=0
577 00:43:51.605675 1. OCD DRVP=5 CALOUT=0
578 00:43:51.605751 1. OCD DRVP=6 CALOUT=0
579 00:43:51.605826 1. OCD DRVP=7 CALOUT=0
580 00:43:51.605902 1. OCD DRVP=8 CALOUT=0
581 00:43:51.606011 1. OCD DRVP=9 CALOUT=0
582 00:43:51.606102 1. OCD DRVP=10 CALOUT=1
583 00:43:51.606179
584 00:43:51.606255 1. OCD DRVP calibration OK! DRVP=10
585 00:43:51.606332
586 00:43:51.606411
587 00:43:51.606491
588 00:43:51.606565 K ODTN
589 00:43:51.606642 3. OCD ODTN=0 ,CALOUT=1
590 00:43:51.606934 3. OCD ODTN=1 ,CALOUT=1
591 00:43:51.607025 3. OCD ODTN=2 ,CALOUT=1
592 00:43:51.607104 3. OCD ODTN=3 ,CALOUT=1
593 00:43:51.607180 3. OCD ODTN=4 ,CALOUT=1
594 00:43:51.607257 3. OCD ODTN=5 ,CALOUT=1
595 00:43:51.607339 3. OCD ODTN=6 ,CALOUT=1
596 00:43:51.607422 3. OCD ODTN=7 ,CALOUT=1
597 00:43:51.607500 3. OCD ODTN=8 ,CALOUT=1
598 00:43:51.607577 3. OCD ODTN=9 ,CALOUT=1
599 00:43:51.607654 3. OCD ODTN=10 ,CALOUT=1
600 00:43:51.607731 3. OCD ODTN=11 ,CALOUT=1
601 00:43:51.607815 3. OCD ODTN=12 ,CALOUT=1
602 00:43:51.607894 3. OCD ODTN=13 ,CALOUT=1
603 00:43:51.607972 3. OCD ODTN=14 ,CALOUT=1
604 00:43:51.608048 3. OCD ODTN=15 ,CALOUT=0
605 00:43:51.608125
606 00:43:51.608208 3. OCD ODTN calibration OK! ODTN=15
607 00:43:51.608299
608 00:43:51.608364 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 00:43:51.608431 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 00:43:51.608498 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 00:43:51.608565
612 00:43:51.608636 [DramcInit]
613 00:43:51.608703 AutoRefreshCKEOff AutoREF OFF
614 00:43:51.608770 DDRPhyPLLSetting-CKEOFF
615 00:43:51.608836 DDRPhyPLLSetting-CKEON
616 00:43:51.608901
617 00:43:51.608967 Enable WDQS
618 00:43:51.609037 ==
619 00:43:51.609116 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 00:43:51.609185 fsp= 1, odt_onoff= 1, Byte mode= 0
621 00:43:51.609253 ==
622 00:43:51.609319 [Duty_Offset_Calibration]
623 00:43:51.609385
624 00:43:51.609457 ===========================
625 00:43:51.609529 B0:0 B1:1 CA:2
626 00:43:51.609596 ==
627 00:43:51.609662 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 00:43:51.609727 fsp= 1, odt_onoff= 1, Byte mode= 0
629 00:43:51.609792 ==
630 00:43:51.609858 [Duty_Offset_Calibration]
631 00:43:51.609924
632 00:43:51.610002 ===========================
633 00:43:51.610072 B0:0 B1:1 CA:1
634 00:43:51.610137 [ModeRegInit_LP4] CH0 RK0
635 00:43:51.610203 Write Rank0 MR13 =0x18
636 00:43:51.610276 Write Rank0 MR12 =0x5d
637 00:43:51.610347 Write Rank0 MR1 =0x56
638 00:43:51.610413 Write Rank0 MR2 =0x1a
639 00:43:51.610478 Write Rank0 MR11 =0x0
640 00:43:51.610544 Write Rank0 MR22 =0x38
641 00:43:51.610609 Write Rank0 MR14 =0x5d
642 00:43:51.610676 Write Rank0 MR3 =0x30
643 00:43:51.610741 Write Rank0 MR13 =0x58
644 00:43:51.610810 Write Rank0 MR12 =0x5d
645 00:43:51.610879 Write Rank0 MR1 =0x56
646 00:43:51.610944 Write Rank0 MR2 =0x2d
647 00:43:51.611010 Write Rank0 MR11 =0x23
648 00:43:51.611075 Write Rank0 MR22 =0x34
649 00:43:51.611139 Write Rank0 MR14 =0x10
650 00:43:51.611204 Write Rank0 MR3 =0x30
651 00:43:51.611269 Write Rank0 MR13 =0xd8
652 00:43:51.611334 [ModeRegInit_LP4] CH0 RK1
653 00:43:51.611399 Write Rank1 MR13 =0x18
654 00:43:51.611464 Write Rank1 MR12 =0x5d
655 00:43:51.611529 Write Rank1 MR1 =0x56
656 00:43:51.611594 Write Rank1 MR2 =0x1a
657 00:43:51.611659 Write Rank1 MR11 =0x0
658 00:43:51.611724 Write Rank1 MR22 =0x38
659 00:43:51.611789 Write Rank1 MR14 =0x5d
660 00:43:51.611854 Write Rank1 MR3 =0x30
661 00:43:51.611918 Write Rank1 MR13 =0x58
662 00:43:51.611982 Write Rank1 MR12 =0x5d
663 00:43:51.612047 Write Rank1 MR1 =0x56
664 00:43:51.612111 Write Rank1 MR2 =0x2d
665 00:43:51.612177 Write Rank1 MR11 =0x23
666 00:43:51.612242 Write Rank1 MR22 =0x34
667 00:43:51.612307 Write Rank1 MR14 =0x10
668 00:43:51.612371 Write Rank1 MR3 =0x30
669 00:43:51.612436 Write Rank1 MR13 =0xd8
670 00:43:51.612501 [ModeRegInit_LP4] CH1 RK0
671 00:43:51.612566 Write Rank0 MR13 =0x18
672 00:43:51.612629 Write Rank0 MR12 =0x5d
673 00:43:51.612695 Write Rank0 MR1 =0x56
674 00:43:51.612760 Write Rank0 MR2 =0x1a
675 00:43:51.612825 Write Rank0 MR11 =0x0
676 00:43:51.612890 Write Rank0 MR22 =0x38
677 00:43:51.612955 Write Rank0 MR14 =0x5d
678 00:43:51.613020 Write Rank0 MR3 =0x30
679 00:43:51.613085 Write Rank0 MR13 =0x58
680 00:43:51.613150 Write Rank0 MR12 =0x5d
681 00:43:51.613216 Write Rank0 MR1 =0x56
682 00:43:51.613290 Write Rank0 MR2 =0x2d
683 00:43:51.613347 Write Rank0 MR11 =0x23
684 00:43:51.613404 Write Rank0 MR22 =0x34
685 00:43:51.613462 Write Rank0 MR14 =0x10
686 00:43:51.613520 Write Rank0 MR3 =0x30
687 00:43:51.613578 Write Rank0 MR13 =0xd8
688 00:43:51.613636 [ModeRegInit_LP4] CH1 RK1
689 00:43:51.613695 Write Rank1 MR13 =0x18
690 00:43:51.613753 Write Rank1 MR12 =0x5d
691 00:43:51.613811 Write Rank1 MR1 =0x56
692 00:43:51.613869 Write Rank1 MR2 =0x1a
693 00:43:51.613950 Write Rank1 MR11 =0x0
694 00:43:51.614034 Write Rank1 MR22 =0x38
695 00:43:51.614094 Write Rank1 MR14 =0x5d
696 00:43:51.614152 Write Rank1 MR3 =0x30
697 00:43:51.614211 Write Rank1 MR13 =0x58
698 00:43:51.614269 Write Rank1 MR12 =0x5d
699 00:43:51.614327 Write Rank1 MR1 =0x56
700 00:43:51.614385 Write Rank1 MR2 =0x2d
701 00:43:51.614443 Write Rank1 MR11 =0x23
702 00:43:51.614506 Write Rank1 MR22 =0x34
703 00:43:51.614568 Write Rank1 MR14 =0x10
704 00:43:51.614625 Write Rank1 MR3 =0x30
705 00:43:51.614683 Write Rank1 MR13 =0xd8
706 00:43:51.614741 match AC timing 3
707 00:43:51.614800 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 00:43:51.614860 DramC Write-DBI off
709 00:43:51.614922 DramC Read-DBI off
710 00:43:51.614984 Write Rank0 MR13 =0x59
711 00:43:51.615042 ==
712 00:43:51.615101 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 00:43:51.615160 fsp= 1, odt_onoff= 1, Byte mode= 0
714 00:43:51.615218 ==
715 00:43:51.615277 === u2Vref_new: 0x56 --> 0x2d
716 00:43:51.615336 === u2Vref_new: 0x58 --> 0x38
717 00:43:51.615395 === u2Vref_new: 0x5a --> 0x39
718 00:43:51.615453 === u2Vref_new: 0x5c --> 0x3c
719 00:43:51.615511 === u2Vref_new: 0x5e --> 0x3d
720 00:43:51.615569 === u2Vref_new: 0x60 --> 0xa0
721 00:43:51.615628 [CA 0] Center 35 (8~63) winsize 56
722 00:43:51.615687 [CA 1] Center 36 (10~63) winsize 54
723 00:43:51.615746 [CA 2] Center 31 (3~60) winsize 58
724 00:43:51.615804 [CA 3] Center 27 (-1~55) winsize 57
725 00:43:51.615862 [CA 4] Center 27 (-1~56) winsize 58
726 00:43:51.615919 [CA 5] Center 32 (2~63) winsize 62
727 00:43:51.615977
728 00:43:51.616035 [CATrainingPosCal] consider 1 rank data
729 00:43:51.616094 u2DelayCellTimex100 = 844/100 ps
730 00:43:51.616152 CA0 delay=35 (8~63),Diff = 8 PI (9 cell)
731 00:43:51.616217 CA1 delay=36 (10~63),Diff = 9 PI (10 cell)
732 00:43:51.616279 CA2 delay=31 (3~60),Diff = 4 PI (4 cell)
733 00:43:51.616338 CA3 delay=27 (-1~55),Diff = 0 PI (0 cell)
734 00:43:51.616396 CA4 delay=27 (-1~56),Diff = 0 PI (0 cell)
735 00:43:51.616454 CA5 delay=32 (2~63),Diff = 5 PI (5 cell)
736 00:43:51.616512
737 00:43:51.616569 CA PerBit enable=1, Macro0, CA PI delay=27
738 00:43:51.616628 === u2Vref_new: 0x60 --> 0xa0
739 00:43:51.616686
740 00:43:51.616743 Vref(ca) range 1: 32
741 00:43:51.616805
742 00:43:51.616871 CS Dly= 10 (41-0-32)
743 00:43:51.616965 Write Rank0 MR13 =0xd8
744 00:43:51.617057 Write Rank0 MR13 =0xd8
745 00:43:51.617150 Write Rank0 MR12 =0x60
746 00:43:51.617242 Write Rank1 MR13 =0x59
747 00:43:51.617334 ==
748 00:43:51.617427 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 00:43:51.617741 fsp= 1, odt_onoff= 1, Byte mode= 0
750 00:43:51.617839 ==
751 00:43:51.617934 === u2Vref_new: 0x56 --> 0x2d
752 00:43:51.618027 === u2Vref_new: 0x58 --> 0x38
753 00:43:51.618089 === u2Vref_new: 0x5a --> 0x39
754 00:43:51.618148 === u2Vref_new: 0x5c --> 0x3c
755 00:43:51.618207 === u2Vref_new: 0x5e --> 0x3d
756 00:43:51.618278 === u2Vref_new: 0x60 --> 0xa0
757 00:43:51.618335 [CA 0] Center 36 (10~63) winsize 54
758 00:43:51.618392 [CA 1] Center 37 (11~63) winsize 53
759 00:43:51.618446 [CA 2] Center 32 (3~62) winsize 60
760 00:43:51.618499 [CA 3] Center 27 (-1~55) winsize 57
761 00:43:51.618552 [CA 4] Center 26 (-2~54) winsize 57
762 00:43:51.618605 [CA 5] Center 32 (2~62) winsize 61
763 00:43:51.618657
764 00:43:51.618709 [CATrainingPosCal] consider 2 rank data
765 00:43:51.618765 u2DelayCellTimex100 = 844/100 ps
766 00:43:51.618819 CA0 delay=36 (10~63),Diff = 10 PI (11 cell)
767 00:43:51.618874 CA1 delay=37 (11~63),Diff = 11 PI (12 cell)
768 00:43:51.618927 CA2 delay=31 (3~60),Diff = 5 PI (5 cell)
769 00:43:51.618979 CA3 delay=27 (-1~55),Diff = 1 PI (1 cell)
770 00:43:51.619031 CA4 delay=26 (-1~54),Diff = 0 PI (0 cell)
771 00:43:51.619083 CA5 delay=32 (2~62),Diff = 6 PI (6 cell)
772 00:43:51.619135
773 00:43:51.619188 CA PerBit enable=1, Macro0, CA PI delay=26
774 00:43:51.619246 === u2Vref_new: 0x5e --> 0x3d
775 00:43:51.619302
776 00:43:51.619355 Vref(ca) range 1: 30
777 00:43:51.619407
778 00:43:51.619459 CS Dly= 9 (40-0-32)
779 00:43:51.619512 Write Rank1 MR13 =0xd8
780 00:43:51.619565 Write Rank1 MR13 =0xd8
781 00:43:51.619616 Write Rank1 MR12 =0x5e
782 00:43:51.619669 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 00:43:51.619721 Write Rank0 MR2 =0xad
784 00:43:51.619773 [Write Leveling]
785 00:43:51.619826 delay byte0 byte1 byte2 byte3
786 00:43:51.619878
787 00:43:51.619930 10 0 0
788 00:43:51.619983 11 0 0
789 00:43:51.620036 12 0 0
790 00:43:51.620089 13 0 0
791 00:43:51.620143 14 0 0
792 00:43:51.620195 15 0 0
793 00:43:51.620248 16 0 0
794 00:43:51.620301 17 0 0
795 00:43:51.620353 18 0 0
796 00:43:51.620406 19 0 0
797 00:43:51.620458 20 0 0
798 00:43:51.620512 21 0 0
799 00:43:51.620565 22 0 0
800 00:43:51.620621 23 0 0
801 00:43:51.620677 24 0 ff
802 00:43:51.620732 25 0 ff
803 00:43:51.620784 26 0 ff
804 00:43:51.620837 27 0 ff
805 00:43:51.620891 28 0 ff
806 00:43:51.620944 29 0 ff
807 00:43:51.620997 30 0 ff
808 00:43:51.621050 31 0 ff
809 00:43:51.621103 32 ff ff
810 00:43:51.621157 33 ff ff
811 00:43:51.621210 34 ff ff
812 00:43:51.621263 35 ff ff
813 00:43:51.621316 36 ff ff
814 00:43:51.621370 37 ff ff
815 00:43:51.621422 38 ff ff
816 00:43:51.621476 pass bytecount = 0xff (0xff: all bytes pass)
817 00:43:51.621532
818 00:43:51.621587 DQS0 dly: 32
819 00:43:51.621640 DQS1 dly: 24
820 00:43:51.621691 Write Rank0 MR2 =0x2d
821 00:43:51.621744 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 00:43:51.621796 Write Rank0 MR1 =0xd6
823 00:43:51.621849 [Gating]
824 00:43:51.621901 ==
825 00:43:51.621952 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
826 00:43:51.622015 fsp= 1, odt_onoff= 1, Byte mode= 0
827 00:43:51.622070 ==
828 00:43:51.622123 3 1 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
829 00:43:51.622179 3 1 4 |3534 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
830 00:43:51.622235 3 1 8 |3534 1414 |(11 11)(11 11) |(1 1)(1 1)| 0
831 00:43:51.622291 3 1 12 |3534 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
832 00:43:51.622345 3 1 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
833 00:43:51.622398 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
834 00:43:51.622452 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
835 00:43:51.622506 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
836 00:43:51.622561 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
837 00:43:51.622616 3 2 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
838 00:43:51.622672 3 2 8 |3534 3535 |(11 11)(11 11) |(0 1)(0 0)| 0
839 00:43:51.622726 3 2 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
840 00:43:51.622779 3 2 16 |504 1a19 |(11 11)(11 11) |(1 1)(1 1)| 0
841 00:43:51.622834 3 2 20 |3d3d 958a |(11 11)(11 11) |(1 1)(1 1)| 0
842 00:43:51.622887 [Byte 1] Lead/lag Transition tap number (1)
843 00:43:51.622939 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(0 0)| 0
844 00:43:51.622992 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 00:43:51.623048 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 00:43:51.623103 3 3 4 |3d3d 1010 |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:43:51.623160 3 3 8 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
848 00:43:51.623213 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
849 00:43:51.623279 3 3 16 |3d3d 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
850 00:43:51.623328 3 3 20 |3534 c0b |(11 11)(11 11) |(1 1)(1 1)| 0
851 00:43:51.623376 [Byte 1] Lead/lag Transition tap number (1)
852 00:43:51.623424 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
853 00:43:51.623473 [Byte 0] Lead/lag Transition tap number (1)
854 00:43:51.623521 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
855 00:43:51.623570 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
856 00:43:51.623623 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
857 00:43:51.623675 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
858 00:43:51.623724 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
859 00:43:51.623774 3 4 16 |201 807 |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:43:51.623822 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:43:51.623871 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:43:51.623919 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:43:51.623968 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:43:51.624016 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:43:51.624064 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:43:51.624113 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:43:51.624161 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:43:51.624210 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:43:51.624258 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 00:43:51.624307 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 00:43:51.624356 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 00:43:51.624405 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
873 00:43:51.624645 [Byte 0] Lead/lag falling Transition (3, 6, 4)
874 00:43:51.624702 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
875 00:43:51.624756 [Byte 0] Lead/lag Transition tap number (2)
876 00:43:51.624808 [Byte 1] Lead/lag falling Transition (3, 6, 8)
877 00:43:51.624856 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
878 00:43:51.624905 [Byte 1] Lead/lag Transition tap number (2)
879 00:43:51.624954 3 6 16 |202 403 |(11 11)(11 11) |(0 0)(0 0)| 0
880 00:43:51.625003 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
881 00:43:51.625053 [Byte 0]First pass (3, 6, 20)
882 00:43:51.625101 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:43:51.625154 [Byte 1]First pass (3, 6, 24)
884 00:43:51.625206 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:43:51.625254 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:43:51.625303 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:43:51.625352 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:43:51.625401 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 00:43:51.625450 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 00:43:51.625502 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
891 00:43:51.625552 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
892 00:43:51.625603 All bytes gating window > 1UI, Early break!
893 00:43:51.625651
894 00:43:51.625700 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
895 00:43:51.625749
896 00:43:51.625797 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
897 00:43:51.625850
898 00:43:51.625927
899 00:43:51.626011
900 00:43:51.626062 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
901 00:43:51.626111
902 00:43:51.626160 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
903 00:43:51.626208
904 00:43:51.626261
905 00:43:51.626311 Write Rank0 MR1 =0x56
906 00:43:51.626360
907 00:43:51.626408 best RODT dly(2T, 0.5T) = (2, 3)
908 00:43:51.626456
909 00:43:51.626503 best RODT dly(2T, 0.5T) = (2, 3)
910 00:43:51.626551 ==
911 00:43:51.626599 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
912 00:43:51.626651 fsp= 1, odt_onoff= 1, Byte mode= 0
913 00:43:51.626703 ==
914 00:43:51.626752 Start DQ dly to find pass range UseTestEngine =0
915 00:43:51.626800 x-axis: bit #, y-axis: DQ dly (-127~63)
916 00:43:51.626848 RX Vref Scan = 0
917 00:43:51.626896 -26, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:43:51.626945 -25, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:43:51.626995 -24, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:43:51.627046 -23, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:43:51.627098 -22, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:43:51.627147 -21, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:43:51.627196 -20, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:43:51.627245 -19, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:43:51.627295 -18, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:43:51.627344 -17, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:43:51.627393 -16, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:43:51.627441 -15, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:43:51.627494 -14, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:43:51.627546 -13, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:43:51.627595 -12, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:43:51.627645 -11, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:43:51.627693 -10, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:43:51.627742 -9, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:43:51.627790 -8, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:43:51.627839 -7, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:43:51.627920 -6, [0] xxxxxxxx xxxxxxxx [MSB]
938 00:43:51.627998 -5, [0] xxxxxxxx xxxxxxxx [MSB]
939 00:43:51.628077 -4, [0] xxxxxxxx xxxxxxxx [MSB]
940 00:43:51.628155 -3, [0] xxxxxxxx xxxxxxxx [MSB]
941 00:43:51.628247 -2, [0] xxxxxxxx xxxxxxxx [MSB]
942 00:43:51.628326 -1, [0] xxxxxxxx xxxxxxxx [MSB]
943 00:43:51.628402 0, [0] xxxxxxxx xxxxxxxx [MSB]
944 00:43:51.628479 1, [0] xxxxxxxx xxxxxxxx [MSB]
945 00:43:51.628556 2, [0] xxxxxxxx xxxxxxxx [MSB]
946 00:43:51.628635 3, [0] xxxoxoxx oxxoxxxx [MSB]
947 00:43:51.628713 4, [0] xxxoxoxx oxxoxxxx [MSB]
948 00:43:51.628790 5, [0] xxxoxoxx ooxoxoox [MSB]
949 00:43:51.628867 6, [0] xxxoxooo ooxoooox [MSB]
950 00:43:51.628946 7, [0] xoxoxooo ooxoooox [MSB]
951 00:43:51.629024 8, [0] ooxoxooo ooxooooo [MSB]
952 00:43:51.629100 9, [0] ooxooooo ooxooooo [MSB]
953 00:43:51.629177 10, [0] oooooooo ooxooooo [MSB]
954 00:43:51.629242 31, [0] oooooooo oooooooo [MSB]
955 00:43:51.629296 32, [0] oooxoooo oooooooo [MSB]
956 00:43:51.629344 33, [0] oooxoooo xooooooo [MSB]
957 00:43:51.629392 34, [0] oooxoooo xooooooo [MSB]
958 00:43:51.629439 35, [0] oooxoxoo xooxoooo [MSB]
959 00:43:51.629487 36, [0] oooxoxxo xxoxxooo [MSB]
960 00:43:51.629534 37, [0] oooxoxxo xxoxxoxo [MSB]
961 00:43:51.629586 38, [0] oxoxoxxo xxoxxxxo [MSB]
962 00:43:51.629649 39, [0] oxoxoxxx xxoxxxxo [MSB]
963 00:43:51.629729 40, [0] xxoxxxxx xxoxxxxo [MSB]
964 00:43:51.629806 41, [0] xxoxxxxx xxoxxxxx [MSB]
965 00:43:51.629885 42, [0] xxxxxxxx xxxxxxxx [MSB]
966 00:43:51.629964 iDelay=42, Bit 0, Center 23 (8 ~ 39) 32
967 00:43:51.630081 iDelay=42, Bit 1, Center 22 (7 ~ 37) 31
968 00:43:51.630158 iDelay=42, Bit 2, Center 25 (10 ~ 41) 32
969 00:43:51.630217 iDelay=42, Bit 3, Center 17 (3 ~ 31) 29
970 00:43:51.630268 iDelay=42, Bit 4, Center 24 (9 ~ 39) 31
971 00:43:51.630317 iDelay=42, Bit 5, Center 18 (3 ~ 34) 32
972 00:43:51.630365 iDelay=42, Bit 6, Center 20 (6 ~ 35) 30
973 00:43:51.630412 iDelay=42, Bit 7, Center 22 (6 ~ 38) 33
974 00:43:51.630458 iDelay=42, Bit 8, Center 17 (3 ~ 32) 30
975 00:43:51.630505 iDelay=42, Bit 9, Center 20 (5 ~ 35) 31
976 00:43:51.630551 iDelay=42, Bit 10, Center 26 (11 ~ 41) 31
977 00:43:51.630601 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
978 00:43:51.630651 iDelay=42, Bit 12, Center 20 (6 ~ 35) 30
979 00:43:51.630697 iDelay=42, Bit 13, Center 21 (5 ~ 37) 33
980 00:43:51.630744 iDelay=42, Bit 14, Center 20 (5 ~ 36) 32
981 00:43:51.630791 iDelay=42, Bit 15, Center 24 (8 ~ 40) 33
982 00:43:51.630837 ==
983 00:43:51.630888 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
984 00:43:51.630938 fsp= 1, odt_onoff= 1, Byte mode= 0
985 00:43:51.630985 ==
986 00:43:51.631032 DQS Delay:
987 00:43:51.631078 DQS0 = 0, DQS1 = 0
988 00:43:51.631125 DQM Delay:
989 00:43:51.631171 DQM0 = 21, DQM1 = 20
990 00:43:51.631218 DQ Delay:
991 00:43:51.631264 DQ0 =23, DQ1 =22, DQ2 =25, DQ3 =17
992 00:43:51.631315 DQ4 =24, DQ5 =18, DQ6 =20, DQ7 =22
993 00:43:51.631364 DQ8 =17, DQ9 =20, DQ10 =26, DQ11 =18
994 00:43:51.631412 DQ12 =20, DQ13 =21, DQ14 =20, DQ15 =24
995 00:43:51.631458
996 00:43:51.631505
997 00:43:51.631551 DramC Write-DBI off
998 00:43:51.631597 ==
999 00:43:51.631847 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1000 00:43:51.631902 fsp= 1, odt_onoff= 1, Byte mode= 0
1001 00:43:51.631952 ==
1002 00:43:51.632000 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1003 00:43:51.632047
1004 00:43:51.632099 Begin, DQ Scan Range 920~1176
1005 00:43:51.632149
1006 00:43:51.632196
1007 00:43:51.632242 TX Vref Scan disable
1008 00:43:51.632288 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:43:51.632338 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:43:51.632386 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:43:51.632437 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:43:51.632486 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:43:51.632535 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:43:51.632584 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:43:51.632633 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:43:51.632681 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:43:51.632729 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:43:51.632777 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:43:51.632825 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:43:51.632873 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:43:51.632921 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:43:51.632971 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:43:51.633020 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:43:51.633067 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:43:51.633115 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:43:51.633163 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:43:51.633212 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:43:51.633260 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:43:51.633308 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:43:51.633356 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:43:51.633403 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:43:51.633451 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:43:51.633503 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:43:51.633555 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:43:51.633603 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:43:51.633651 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:43:51.633699 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:43:51.633746 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:43:51.633796 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:43:51.633848 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:43:51.633926 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:43:51.634039 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:43:51.634119 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:43:51.634171 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:43:51.634222 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:43:51.634270 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:43:51.634318 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:43:51.634366 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1049 00:43:51.634414 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1050 00:43:51.634466 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1051 00:43:51.634517 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1052 00:43:51.634565 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1053 00:43:51.634613 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1054 00:43:51.634661 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1055 00:43:51.634708 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1056 00:43:51.634755 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1057 00:43:51.634802 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1058 00:43:51.634850 970 |3 6 10|[0] xxxxxxxx ooxoooxx [MSB]
1059 00:43:51.634899 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1060 00:43:51.634946 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1061 00:43:51.634994 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1062 00:43:51.635042 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1063 00:43:51.635090 975 |3 6 15|[0] xxxxxxxx ooooooox [MSB]
1064 00:43:51.635137 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1065 00:43:51.635190 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1066 00:43:51.635240 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1067 00:43:51.635288 979 |3 6 19|[0] xxxooxox oooooooo [MSB]
1068 00:43:51.635336 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1069 00:43:51.635383 989 |3 6 29|[0] oooooooo xooooooo [MSB]
1070 00:43:51.635430 990 |3 6 30|[0] oooooooo xooxoooo [MSB]
1071 00:43:51.635477 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1072 00:43:51.635525 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1073 00:43:51.635572 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1074 00:43:51.635620 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1075 00:43:51.635668 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1076 00:43:51.635715 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1077 00:43:51.635762 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1078 00:43:51.635810 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1079 00:43:51.635858 999 |3 6 39|[0] oooxxxxx xxxxxxxx [MSB]
1080 00:43:51.635906 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1081 00:43:51.635954 Byte0, DQ PI dly=988, DQM PI dly= 988
1082 00:43:51.636001 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1083 00:43:51.636048
1084 00:43:51.636094 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1085 00:43:51.636141
1086 00:43:51.636189 Byte1, DQ PI dly=980, DQM PI dly= 980
1087 00:43:51.636236 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1088 00:43:51.636282
1089 00:43:51.636328 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1090 00:43:51.636375
1091 00:43:51.636421 ==
1092 00:43:51.636468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1093 00:43:51.636516 fsp= 1, odt_onoff= 1, Byte mode= 0
1094 00:43:51.636563 ==
1095 00:43:51.636610 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1096 00:43:51.636657
1097 00:43:51.636703 Begin, DQ Scan Range 956~1020
1098 00:43:51.636750 Write Rank0 MR14 =0x0
1099 00:43:51.636796
1100 00:43:51.636842 CH=0, VrefRange= 0, VrefLevel = 0
1101 00:43:51.636890 TX Bit0 (984~994) 11 989, Bit8 (971~983) 13 977,
1102 00:43:51.636938 TX Bit1 (982~994) 13 988, Bit9 (973~985) 13 979,
1103 00:43:51.636984 TX Bit2 (984~994) 11 989, Bit10 (979~989) 11 984,
1104 00:43:51.637030 TX Bit3 (979~989) 11 984, Bit11 (972~984) 13 978,
1105 00:43:51.637077 TX Bit4 (982~993) 12 987, Bit12 (973~985) 13 979,
1106 00:43:51.637124 TX Bit5 (982~990) 9 986, Bit13 (973~985) 13 979,
1107 00:43:51.637171 TX Bit6 (980~993) 14 986, Bit14 (975~987) 13 981,
1108 00:43:51.637218 TX Bit7 (981~993) 13 987, Bit15 (978~989) 12 983,
1109 00:43:51.637454
1110 00:43:51.637506 Write Rank0 MR14 =0x2
1111 00:43:51.637554
1112 00:43:51.637600 CH=0, VrefRange= 0, VrefLevel = 2
1113 00:43:51.637665 TX Bit0 (984~995) 12 989, Bit8 (970~983) 14 976,
1114 00:43:51.637727 TX Bit1 (982~995) 14 988, Bit9 (973~986) 14 979,
1115 00:43:51.637775 TX Bit2 (984~995) 12 989, Bit10 (978~989) 12 983,
1116 00:43:51.637846 TX Bit3 (978~991) 14 984, Bit11 (972~984) 13 978,
1117 00:43:51.637895 TX Bit4 (981~993) 13 987, Bit12 (973~986) 14 979,
1118 00:43:51.637943 TX Bit5 (981~992) 12 986, Bit13 (973~985) 13 979,
1119 00:43:51.638000 TX Bit6 (980~993) 14 986, Bit14 (975~989) 15 982,
1120 00:43:51.638062 TX Bit7 (981~994) 14 987, Bit15 (979~990) 12 984,
1121 00:43:51.638109
1122 00:43:51.638155 wait MRW command Rank0 MR14 =0x4 fired (1)
1123 00:43:51.638202 Write Rank0 MR14 =0x4
1124 00:43:51.638248
1125 00:43:51.638294 CH=0, VrefRange= 0, VrefLevel = 4
1126 00:43:51.638341 TX Bit0 (984~996) 13 990, Bit8 (970~984) 15 977,
1127 00:43:51.638388 TX Bit1 (982~996) 15 989, Bit9 (972~987) 16 979,
1128 00:43:51.638435 TX Bit2 (983~995) 13 989, Bit10 (977~990) 14 983,
1129 00:43:51.638515 TX Bit3 (978~991) 14 984, Bit11 (971~985) 15 978,
1130 00:43:51.638591 TX Bit4 (981~994) 14 987, Bit12 (972~987) 16 979,
1131 00:43:51.638638 TX Bit5 (980~992) 13 986, Bit13 (973~986) 14 979,
1132 00:43:51.638686 TX Bit6 (980~993) 14 986, Bit14 (974~989) 16 981,
1133 00:43:51.638733 TX Bit7 (981~994) 14 987, Bit15 (978~991) 14 984,
1134 00:43:51.638780
1135 00:43:51.638827 Write Rank0 MR14 =0x6
1136 00:43:51.638873
1137 00:43:51.638919 CH=0, VrefRange= 0, VrefLevel = 6
1138 00:43:51.638966 TX Bit0 (984~996) 13 990, Bit8 (970~984) 15 977,
1139 00:43:51.639013 TX Bit1 (981~996) 16 988, Bit9 (972~988) 17 980,
1140 00:43:51.639059 TX Bit2 (983~996) 14 989, Bit10 (976~990) 15 983,
1141 00:43:51.639137 TX Bit3 (978~992) 15 985, Bit11 (971~985) 15 978,
1142 00:43:51.639184 TX Bit4 (980~995) 16 987, Bit12 (971~988) 18 979,
1143 00:43:51.639231 TX Bit5 (980~993) 14 986, Bit13 (972~987) 16 979,
1144 00:43:51.639278 TX Bit6 (980~994) 15 987, Bit14 (973~990) 18 981,
1145 00:43:51.639324 TX Bit7 (980~995) 16 987, Bit15 (978~991) 14 984,
1146 00:43:51.639400
1147 00:43:51.639446 Write Rank0 MR14 =0x8
1148 00:43:51.639492
1149 00:43:51.639537 CH=0, VrefRange= 0, VrefLevel = 8
1150 00:43:51.639584 TX Bit0 (983~997) 15 990, Bit8 (969~984) 16 976,
1151 00:43:51.639631 TX Bit1 (981~997) 17 989, Bit9 (972~988) 17 980,
1152 00:43:51.639711 TX Bit2 (982~996) 15 989, Bit10 (976~991) 16 983,
1153 00:43:51.639760 TX Bit3 (978~992) 15 985, Bit11 (970~986) 17 978,
1154 00:43:51.639808 TX Bit4 (980~995) 16 987, Bit12 (971~988) 18 979,
1155 00:43:51.639855 TX Bit5 (980~993) 14 986, Bit13 (971~987) 17 979,
1156 00:43:51.639902 TX Bit6 (980~994) 15 987, Bit14 (974~990) 17 982,
1157 00:43:51.639948 TX Bit7 (980~995) 16 987, Bit15 (977~992) 16 984,
1158 00:43:51.639995
1159 00:43:51.640041 Write Rank0 MR14 =0xa
1160 00:43:51.640088
1161 00:43:51.640178 CH=0, VrefRange= 0, VrefLevel = 10
1162 00:43:51.640244 TX Bit0 (982~998) 17 990, Bit8 (969~985) 17 977,
1163 00:43:51.640294 TX Bit1 (980~998) 19 989, Bit9 (970~989) 20 979,
1164 00:43:51.640373 TX Bit2 (982~997) 16 989, Bit10 (976~991) 16 983,
1165 00:43:51.640420 TX Bit3 (978~992) 15 985, Bit11 (970~986) 17 978,
1166 00:43:51.640466 TX Bit4 (980~995) 16 987, Bit12 (970~989) 20 979,
1167 00:43:51.640513 TX Bit5 (980~994) 15 987, Bit13 (971~988) 18 979,
1168 00:43:51.640559 TX Bit6 (979~995) 17 987, Bit14 (972~990) 19 981,
1169 00:43:51.640606 TX Bit7 (980~996) 17 988, Bit15 (977~992) 16 984,
1170 00:43:51.640653
1171 00:43:51.640699 Write Rank0 MR14 =0xc
1172 00:43:51.640745
1173 00:43:51.640791 CH=0, VrefRange= 0, VrefLevel = 12
1174 00:43:51.640837 TX Bit0 (982~999) 18 990, Bit8 (969~986) 18 977,
1175 00:43:51.640884 TX Bit1 (980~998) 19 989, Bit9 (970~989) 20 979,
1176 00:43:51.640931 TX Bit2 (981~998) 18 989, Bit10 (976~992) 17 984,
1177 00:43:51.640978 TX Bit3 (978~993) 16 985, Bit11 (969~987) 19 978,
1178 00:43:51.641029 TX Bit4 (980~997) 18 988, Bit12 (971~989) 19 980,
1179 00:43:51.641079 TX Bit5 (979~994) 16 986, Bit13 (970~989) 20 979,
1180 00:43:51.641127 TX Bit6 (979~995) 17 987, Bit14 (972~991) 20 981,
1181 00:43:51.641173 TX Bit7 (980~997) 18 988, Bit15 (976~992) 17 984,
1182 00:43:51.641220
1183 00:43:51.641267 wait MRW command Rank0 MR14 =0xe fired (1)
1184 00:43:51.641314 Write Rank0 MR14 =0xe
1185 00:43:51.641360
1186 00:43:51.641406 CH=0, VrefRange= 0, VrefLevel = 14
1187 00:43:51.641453 TX Bit0 (981~1000) 20 990, Bit8 (969~987) 19 978,
1188 00:43:51.641501 TX Bit1 (980~999) 20 989, Bit9 (970~990) 21 980,
1189 00:43:51.641548 TX Bit2 (982~999) 18 990, Bit10 (976~993) 18 984,
1190 00:43:51.641595 TX Bit3 (977~993) 17 985, Bit11 (969~987) 19 978,
1191 00:43:51.641642 TX Bit4 (980~997) 18 988, Bit12 (970~990) 21 980,
1192 00:43:51.641745 TX Bit5 (979~995) 17 987, Bit13 (970~989) 20 979,
1193 00:43:51.641809 TX Bit6 (979~996) 18 987, Bit14 (972~991) 20 981,
1194 00:43:51.641857 TX Bit7 (980~997) 18 988, Bit15 (976~994) 19 985,
1195 00:43:51.641904
1196 00:43:51.641964 Write Rank0 MR14 =0x10
1197 00:43:51.642034
1198 00:43:51.642082 CH=0, VrefRange= 0, VrefLevel = 16
1199 00:43:51.642129 TX Bit0 (981~1000) 20 990, Bit8 (968~988) 21 978,
1200 00:43:51.642181 TX Bit1 (980~999) 20 989, Bit9 (970~990) 21 980,
1201 00:43:51.642232 TX Bit2 (981~999) 19 990, Bit10 (975~993) 19 984,
1202 00:43:51.642279 TX Bit3 (977~993) 17 985, Bit11 (969~989) 21 979,
1203 00:43:51.642326 TX Bit4 (979~998) 20 988, Bit12 (970~990) 21 980,
1204 00:43:51.642373 TX Bit5 (979~995) 17 987, Bit13 (970~990) 21 980,
1205 00:43:51.642421 TX Bit6 (979~996) 18 987, Bit14 (971~992) 22 981,
1206 00:43:51.642469 TX Bit7 (979~998) 20 988, Bit15 (976~994) 19 985,
1207 00:43:51.642515
1208 00:43:51.642561 Write Rank0 MR14 =0x12
1209 00:43:51.642608
1210 00:43:51.642654 CH=0, VrefRange= 0, VrefLevel = 18
1211 00:43:51.642701 TX Bit0 (981~1001) 21 991, Bit8 (968~988) 21 978,
1212 00:43:51.642937 TX Bit1 (979~1000) 22 989, Bit9 (969~991) 23 980,
1213 00:43:51.642993 TX Bit2 (981~1000) 20 990, Bit10 (975~994) 20 984,
1214 00:43:51.643042 TX Bit3 (976~993) 18 984, Bit11 (969~988) 20 978,
1215 00:43:51.643090 TX Bit4 (979~998) 20 988, Bit12 (970~990) 21 980,
1216 00:43:51.643137 TX Bit5 (979~996) 18 987, Bit13 (970~990) 21 980,
1217 00:43:51.643185 TX Bit6 (979~997) 19 988, Bit14 (971~992) 22 981,
1218 00:43:51.643237 TX Bit7 (980~998) 19 989, Bit15 (975~994) 20 984,
1219 00:43:51.643288
1220 00:43:51.643335 wait MRW command Rank0 MR14 =0x14 fired (1)
1221 00:43:51.643383 Write Rank0 MR14 =0x14
1222 00:43:51.643430
1223 00:43:51.643477 CH=0, VrefRange= 0, VrefLevel = 20
1224 00:43:51.643524 TX Bit0 (981~1001) 21 991, Bit8 (968~989) 22 978,
1225 00:43:51.643572 TX Bit1 (979~1000) 22 989, Bit9 (969~991) 23 980,
1226 00:43:51.643624 TX Bit2 (981~1000) 20 990, Bit10 (975~995) 21 985,
1227 00:43:51.643675 TX Bit3 (977~994) 18 985, Bit11 (968~989) 22 978,
1228 00:43:51.643723 TX Bit4 (979~999) 21 989, Bit12 (969~991) 23 980,
1229 00:43:51.643769 TX Bit5 (979~996) 18 987, Bit13 (969~990) 22 979,
1230 00:43:51.643816 TX Bit6 (979~997) 19 988, Bit14 (970~992) 23 981,
1231 00:43:51.643864 TX Bit7 (979~999) 21 989, Bit15 (975~995) 21 985,
1232 00:43:51.643911
1233 00:43:51.643957 Write Rank0 MR14 =0x16
1234 00:43:51.644007
1235 00:43:51.644054 CH=0, VrefRange= 0, VrefLevel = 22
1236 00:43:51.644103 TX Bit0 (980~1002) 23 991, Bit8 (968~989) 22 978,
1237 00:43:51.644150 TX Bit1 (980~1001) 22 990, Bit9 (969~991) 23 980,
1238 00:43:51.644197 TX Bit2 (980~1001) 22 990, Bit10 (974~995) 22 984,
1239 00:43:51.644245 TX Bit3 (976~994) 19 985, Bit11 (968~990) 23 979,
1240 00:43:51.644292 TX Bit4 (979~1000) 22 989, Bit12 (969~991) 23 980,
1241 00:43:51.644339 TX Bit5 (979~997) 19 988, Bit13 (969~990) 22 979,
1242 00:43:51.644388 TX Bit6 (979~998) 20 988, Bit14 (970~993) 24 981,
1243 00:43:51.644436 TX Bit7 (979~1000) 22 989, Bit15 (975~996) 22 985,
1244 00:43:51.644486
1245 00:43:51.644532 Write Rank0 MR14 =0x18
1246 00:43:51.644577
1247 00:43:51.644623 CH=0, VrefRange= 0, VrefLevel = 24
1248 00:43:51.644670 TX Bit0 (980~1002) 23 991, Bit8 (967~990) 24 978,
1249 00:43:51.644717 TX Bit1 (979~1001) 23 990, Bit9 (969~991) 23 980,
1250 00:43:51.644764 TX Bit2 (980~1001) 22 990, Bit10 (974~995) 22 984,
1251 00:43:51.644814 TX Bit3 (976~995) 20 985, Bit11 (968~990) 23 979,
1252 00:43:51.644864 TX Bit4 (979~1000) 22 989, Bit12 (969~992) 24 980,
1253 00:43:51.644912 TX Bit5 (978~997) 20 987, Bit13 (969~991) 23 980,
1254 00:43:51.644959 TX Bit6 (979~999) 21 989, Bit14 (970~993) 24 981,
1255 00:43:51.645006 TX Bit7 (979~1000) 22 989, Bit15 (975~996) 22 985,
1256 00:43:51.645052
1257 00:43:51.645098 Write Rank0 MR14 =0x1a
1258 00:43:51.645144
1259 00:43:51.645195 CH=0, VrefRange= 0, VrefLevel = 26
1260 00:43:51.645245 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1261 00:43:51.645293 TX Bit1 (979~1002) 24 990, Bit9 (969~991) 23 980,
1262 00:43:51.645341 TX Bit2 (980~1002) 23 991, Bit10 (973~996) 24 984,
1263 00:43:51.645388 TX Bit3 (976~995) 20 985, Bit11 (968~990) 23 979,
1264 00:43:51.645435 TX Bit4 (979~1001) 23 990, Bit12 (968~992) 25 980,
1265 00:43:51.645481 TX Bit5 (978~998) 21 988, Bit13 (969~992) 24 980,
1266 00:43:51.645528 TX Bit6 (978~999) 22 988, Bit14 (969~994) 26 981,
1267 00:43:51.645578 TX Bit7 (979~1001) 23 990, Bit15 (974~996) 23 985,
1268 00:43:51.645626
1269 00:43:51.645675 Write Rank0 MR14 =0x1c
1270 00:43:51.645722
1271 00:43:51.645768 CH=0, VrefRange= 0, VrefLevel = 28
1272 00:43:51.645815 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1273 00:43:51.645862 TX Bit1 (979~1002) 24 990, Bit9 (969~991) 23 980,
1274 00:43:51.645908 TX Bit2 (980~1003) 24 991, Bit10 (973~997) 25 985,
1275 00:43:51.645958 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1276 00:43:51.646049 TX Bit4 (979~1001) 23 990, Bit12 (968~992) 25 980,
1277 00:43:51.646097 TX Bit5 (978~998) 21 988, Bit13 (968~991) 24 979,
1278 00:43:51.646145 TX Bit6 (978~1000) 23 989, Bit14 (969~993) 25 981,
1279 00:43:51.646192 TX Bit7 (979~1001) 23 990, Bit15 (975~997) 23 986,
1280 00:43:51.646239
1281 00:43:51.646284 Write Rank0 MR14 =0x1e
1282 00:43:51.646333
1283 00:43:51.646380 CH=0, VrefRange= 0, VrefLevel = 30
1284 00:43:51.646429 TX Bit0 (980~1004) 25 992, Bit8 (967~989) 23 978,
1285 00:43:51.646476 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1286 00:43:51.646524 TX Bit2 (979~1003) 25 991, Bit10 (973~997) 25 985,
1287 00:43:51.646571 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1288 00:43:51.646617 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1289 00:43:51.646664 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1290 00:43:51.646714 TX Bit6 (978~1000) 23 989, Bit14 (969~993) 25 981,
1291 00:43:51.646762 TX Bit7 (979~1002) 24 990, Bit15 (973~996) 24 984,
1292 00:43:51.646811
1293 00:43:51.646857 Write Rank0 MR14 =0x20
1294 00:43:51.646904
1295 00:43:51.646950 CH=0, VrefRange= 0, VrefLevel = 32
1296 00:43:51.646996 TX Bit0 (980~1004) 25 992, Bit8 (967~989) 23 978,
1297 00:43:51.647043 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1298 00:43:51.647089 TX Bit2 (979~1003) 25 991, Bit10 (973~997) 25 985,
1299 00:43:51.647142 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1300 00:43:51.647192 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1301 00:43:51.647238 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1302 00:43:51.647285 TX Bit6 (978~1000) 23 989, Bit14 (969~993) 25 981,
1303 00:43:51.647332 TX Bit7 (979~1002) 24 990, Bit15 (973~996) 24 984,
1304 00:43:51.647379
1305 00:43:51.647425 Write Rank0 MR14 =0x22
1306 00:43:51.647471
1307 00:43:51.647517 CH=0, VrefRange= 0, VrefLevel = 34
1308 00:43:51.647564 TX Bit0 (980~1004) 25 992, Bit8 (967~989) 23 978,
1309 00:43:51.647615 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1310 00:43:51.647665 TX Bit2 (979~1003) 25 991, Bit10 (973~997) 25 985,
1311 00:43:51.647901 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1312 00:43:51.647954 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1313 00:43:51.648006 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1314 00:43:51.648056 TX Bit6 (978~1000) 23 989, Bit14 (969~993) 25 981,
1315 00:43:51.648104 TX Bit7 (979~1002) 24 990, Bit15 (973~996) 24 984,
1316 00:43:51.648150
1317 00:43:51.648196 Write Rank0 MR14 =0x24
1318 00:43:51.648242
1319 00:43:51.648288 CH=0, VrefRange= 0, VrefLevel = 36
1320 00:43:51.648334 TX Bit0 (980~1004) 25 992, Bit8 (967~989) 23 978,
1321 00:43:51.648382 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1322 00:43:51.648431 TX Bit2 (979~1003) 25 991, Bit10 (973~997) 25 985,
1323 00:43:51.648481 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1324 00:43:51.648528 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1325 00:43:51.648574 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1326 00:43:51.648620 TX Bit6 (978~1000) 23 989, Bit14 (969~993) 25 981,
1327 00:43:51.648666 TX Bit7 (979~1002) 24 990, Bit15 (973~996) 24 984,
1328 00:43:51.648712
1329 00:43:51.648757 Write Rank0 MR14 =0x26
1330 00:43:51.648803
1331 00:43:51.648850 CH=0, VrefRange= 0, VrefLevel = 38
1332 00:43:51.648897 TX Bit0 (980~1004) 25 992, Bit8 (967~989) 23 978,
1333 00:43:51.648944 TX Bit1 (979~1002) 24 990, Bit9 (968~991) 24 979,
1334 00:43:51.648990 TX Bit2 (979~1003) 25 991, Bit10 (973~997) 25 985,
1335 00:43:51.649035 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1336 00:43:51.649081 TX Bit4 (979~1002) 24 990, Bit12 (968~992) 25 980,
1337 00:43:51.649128 TX Bit5 (978~998) 21 988, Bit13 (968~992) 25 980,
1338 00:43:51.649174 TX Bit6 (978~1000) 23 989, Bit14 (969~993) 25 981,
1339 00:43:51.649221 TX Bit7 (979~1002) 24 990, Bit15 (973~996) 24 984,
1340 00:43:51.649266
1341 00:43:51.649312
1342 00:43:51.649357 TX Vref found, early break! 351< 362
1343 00:43:51.649404 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
1344 00:43:51.649450 u1DelayCellOfst[0]=8 cells (7 PI)
1345 00:43:51.649497 u1DelayCellOfst[1]=5 cells (5 PI)
1346 00:43:51.649543 u1DelayCellOfst[2]=6 cells (6 PI)
1347 00:43:51.649589 u1DelayCellOfst[3]=0 cells (0 PI)
1348 00:43:51.649636 u1DelayCellOfst[4]=5 cells (5 PI)
1349 00:43:51.649708 u1DelayCellOfst[5]=3 cells (3 PI)
1350 00:43:51.649783 u1DelayCellOfst[6]=4 cells (4 PI)
1351 00:43:51.649830 u1DelayCellOfst[7]=5 cells (5 PI)
1352 00:43:51.649877 Byte0, DQ PI dly=985, DQM PI dly= 988
1353 00:43:51.649923 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1354 00:43:51.649969
1355 00:43:51.650055 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1356 00:43:51.650102
1357 00:43:51.650148 u1DelayCellOfst[8]=0 cells (0 PI)
1358 00:43:51.650194 u1DelayCellOfst[9]=1 cells (1 PI)
1359 00:43:51.650241 u1DelayCellOfst[10]=8 cells (7 PI)
1360 00:43:51.650287 u1DelayCellOfst[11]=1 cells (1 PI)
1361 00:43:51.650333 u1DelayCellOfst[12]=2 cells (2 PI)
1362 00:43:51.650379 u1DelayCellOfst[13]=2 cells (2 PI)
1363 00:43:51.650425 u1DelayCellOfst[14]=3 cells (3 PI)
1364 00:43:51.650471 u1DelayCellOfst[15]=6 cells (6 PI)
1365 00:43:51.650517 Byte1, DQ PI dly=978, DQM PI dly= 981
1366 00:43:51.650563 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1367 00:43:51.650609
1368 00:43:51.650655 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1369 00:43:51.650702
1370 00:43:51.650748 Write Rank0 MR14 =0x1e
1371 00:43:51.650793
1372 00:43:51.650838 Final TX Range 0 Vref 30
1373 00:43:51.650884
1374 00:43:51.650930 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1375 00:43:51.650977
1376 00:43:51.651022 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1377 00:43:51.651069 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1378 00:43:51.651115 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1379 00:43:51.651161 Write Rank0 MR3 =0xb0
1380 00:43:51.651207 DramC Write-DBI on
1381 00:43:51.651253 ==
1382 00:43:51.651299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1383 00:43:51.651345 fsp= 1, odt_onoff= 1, Byte mode= 0
1384 00:43:51.651391 ==
1385 00:43:51.651437 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1386 00:43:51.651484
1387 00:43:51.651531 Begin, DQ Scan Range 701~765
1388 00:43:51.651577
1389 00:43:51.651622
1390 00:43:51.651668 TX Vref Scan disable
1391 00:43:51.651714 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1392 00:43:51.651762 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1393 00:43:51.651810 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1394 00:43:51.651857 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1395 00:43:51.651904 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1396 00:43:51.651952 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1397 00:43:51.651999 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1398 00:43:51.652046 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1399 00:43:51.652093 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1400 00:43:51.652140 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1401 00:43:51.652187 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1402 00:43:51.652234 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1403 00:43:51.652281 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1404 00:43:51.652329 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1405 00:43:51.652376 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1406 00:43:51.652423 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1407 00:43:51.652470 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1408 00:43:51.652518 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1409 00:43:51.652565 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1410 00:43:51.652612 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1411 00:43:51.652659 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
1412 00:43:51.652706 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
1413 00:43:51.652753 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1414 00:43:51.652799 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1415 00:43:51.652847 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1416 00:43:51.652894 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1417 00:43:51.652941 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1418 00:43:51.652988 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1419 00:43:51.653035 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1420 00:43:51.653081 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1421 00:43:51.653128 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1422 00:43:51.653364 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
1423 00:43:51.653418 748 |2 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
1424 00:43:51.653465 Byte0, DQ PI dly=735, DQM PI dly= 735
1425 00:43:51.653512 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
1426 00:43:51.653559
1427 00:43:51.653604 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
1428 00:43:51.653651
1429 00:43:51.653711 Byte1, DQ PI dly=725, DQM PI dly= 725
1430 00:43:51.653760 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1431 00:43:51.653807
1432 00:43:51.653853 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1433 00:43:51.653899
1434 00:43:51.653951 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1435 00:43:51.654043 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1436 00:43:51.654091 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1437 00:43:51.654138 Write Rank0 MR3 =0x30
1438 00:43:51.654185 DramC Write-DBI off
1439 00:43:51.654231
1440 00:43:51.654276 [DATLAT]
1441 00:43:51.654321 Freq=1600, CH0 RK0, use_rxtx_scan=0
1442 00:43:51.654367
1443 00:43:51.654417 DATLAT Default: 0xf
1444 00:43:51.654466 7, 0xFFFF, sum=0
1445 00:43:51.654514 8, 0xFFFF, sum=0
1446 00:43:51.654561 9, 0xFFFF, sum=0
1447 00:43:51.654608 10, 0xFFFF, sum=0
1448 00:43:51.654655 11, 0xFFFF, sum=0
1449 00:43:51.654702 12, 0xFFFF, sum=0
1450 00:43:51.654749 13, 0xFFFF, sum=0
1451 00:43:51.654796 14, 0x0, sum=1
1452 00:43:51.654843 15, 0x0, sum=2
1453 00:43:51.654890 16, 0x0, sum=3
1454 00:43:51.654936 17, 0x0, sum=4
1455 00:43:51.654983 pattern=2 first_step=14 total pass=5 best_step=16
1456 00:43:51.655029 ==
1457 00:43:51.655076 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1458 00:43:51.655123 fsp= 1, odt_onoff= 1, Byte mode= 0
1459 00:43:51.655169 ==
1460 00:43:51.655215 Start DQ dly to find pass range UseTestEngine =1
1461 00:43:51.655262 x-axis: bit #, y-axis: DQ dly (-127~63)
1462 00:43:51.655308 RX Vref Scan = 1
1463 00:43:51.655353
1464 00:43:51.655400 RX Vref found, early break!
1465 00:43:51.655446
1466 00:43:51.655492 Final RX Vref 12, apply to both rank0 and 1
1467 00:43:51.655539 ==
1468 00:43:51.655585 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1469 00:43:51.655631 fsp= 1, odt_onoff= 1, Byte mode= 0
1470 00:43:51.655680 ==
1471 00:43:51.655728 DQS Delay:
1472 00:43:51.655777 DQS0 = 0, DQS1 = 0
1473 00:43:51.655823 DQM Delay:
1474 00:43:51.655869 DQM0 = 21, DQM1 = 20
1475 00:43:51.655915 DQ Delay:
1476 00:43:51.655961 DQ0 =23, DQ1 =22, DQ2 =24, DQ3 =17
1477 00:43:51.656007 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =23
1478 00:43:51.656054 DQ8 =17, DQ9 =19, DQ10 =25, DQ11 =18
1479 00:43:51.656100 DQ12 =20, DQ13 =19, DQ14 =21, DQ15 =23
1480 00:43:51.656146
1481 00:43:51.656192
1482 00:43:51.656237
1483 00:43:51.656282 [DramC_TX_OE_Calibration] TA2
1484 00:43:51.656328 Original DQ_B0 (3 6) =30, OEN = 27
1485 00:43:51.656374 Original DQ_B1 (3 6) =30, OEN = 27
1486 00:43:51.656425 23, 0x0, End_B0=23 End_B1=23
1487 00:43:51.656475 24, 0x0, End_B0=24 End_B1=24
1488 00:43:51.656523 25, 0x0, End_B0=25 End_B1=25
1489 00:43:51.656571 26, 0x0, End_B0=26 End_B1=26
1490 00:43:51.656618 27, 0x0, End_B0=27 End_B1=27
1491 00:43:51.656665 28, 0x0, End_B0=28 End_B1=28
1492 00:43:51.656711 29, 0x0, End_B0=29 End_B1=29
1493 00:43:51.656758 30, 0x0, End_B0=30 End_B1=30
1494 00:43:51.656805 31, 0xFFFF, End_B0=30 End_B1=30
1495 00:43:51.656852 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1496 00:43:51.656899 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1497 00:43:51.656945
1498 00:43:51.656991
1499 00:43:51.657040 Write Rank0 MR23 =0x3f
1500 00:43:51.657088 [DQSOSC]
1501 00:43:51.657134 [DQSOSCAuto] RK0, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
1502 00:43:51.657184 CH0_RK0: MR19=0x202, MR18=0xCDCD, DQSOSC=439, MR23=63, INC=12, DEC=19
1503 00:43:51.657231 Write Rank0 MR23 =0x3f
1504 00:43:51.657277 [DQSOSC]
1505 00:43:51.657323 [DQSOSCAuto] RK0, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
1506 00:43:51.657370 CH0 RK0: MR19=202, MR18=CDCD
1507 00:43:51.657416 [RankSwap] Rank num 2, (Multi 1), Rank 1
1508 00:43:51.657462 Write Rank0 MR2 =0xad
1509 00:43:51.657508 [Write Leveling]
1510 00:43:51.657553 delay byte0 byte1 byte2 byte3
1511 00:43:51.657599
1512 00:43:51.657645 10 0 0
1513 00:43:51.657711 11 0 0
1514 00:43:51.657794 12 0 0
1515 00:43:51.657846 13 0 0
1516 00:43:51.657894 14 0 0
1517 00:43:51.657942 15 0 0
1518 00:43:51.658012 16 0 0
1519 00:43:51.658075 17 0 0
1520 00:43:51.658122 18 0 0
1521 00:43:51.658170 19 0 0
1522 00:43:51.658218 20 0 0
1523 00:43:51.658264 21 0 0
1524 00:43:51.658310 22 0 0
1525 00:43:51.658357 23 0 0
1526 00:43:51.658404 24 0 ff
1527 00:43:51.658450 25 0 0
1528 00:43:51.658497 26 0 ff
1529 00:43:51.658544 27 0 ff
1530 00:43:51.658590 28 0 ff
1531 00:43:51.658638 29 0 ff
1532 00:43:51.658690 30 0 ff
1533 00:43:51.658739 31 0 ff
1534 00:43:51.658787 32 0 ff
1535 00:43:51.658834 33 0 ff
1536 00:43:51.658881 34 ff ff
1537 00:43:51.658928 35 ff ff
1538 00:43:51.658974 36 ff ff
1539 00:43:51.659021 37 ff ff
1540 00:43:51.659068 38 ff ff
1541 00:43:51.659115 39 ff ff
1542 00:43:51.659162 40 ff ff
1543 00:43:51.659213 pass bytecount = 0xff (0xff: all bytes pass)
1544 00:43:51.659262
1545 00:43:51.659308 DQS0 dly: 34
1546 00:43:51.659354 DQS1 dly: 26
1547 00:43:51.659399 Write Rank0 MR2 =0x2d
1548 00:43:51.659445 [RankSwap] Rank num 2, (Multi 1), Rank 0
1549 00:43:51.659491 Write Rank1 MR1 =0xd6
1550 00:43:51.659538 [Gating]
1551 00:43:51.659583 ==
1552 00:43:51.659629 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1553 00:43:51.659676 fsp= 1, odt_onoff= 1, Byte mode= 0
1554 00:43:51.659722 ==
1555 00:43:51.659769 3 1 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1556 00:43:51.659821 3 1 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1557 00:43:51.659871 3 1 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1558 00:43:51.659919 3 1 12 |3534 1918 |(11 11)(11 11) |(1 1)(0 0)| 0
1559 00:43:51.659966 3 1 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1560 00:43:51.660013 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1561 00:43:51.660059 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1562 00:43:51.660109 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1563 00:43:51.660156 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1564 00:43:51.660202 3 2 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1565 00:43:51.660253 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1566 00:43:51.660301 3 2 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1567 00:43:51.660351 3 2 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1568 00:43:51.660398 3 2 20 |3a39 807 |(11 11)(11 11) |(1 1)(1 1)| 0
1569 00:43:51.660636 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 00:43:51.660694 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 00:43:51.660747 3 3 0 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1572 00:43:51.660795 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1573 00:43:51.660843 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1574 00:43:51.660891 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1575 00:43:51.660938 3 3 16 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1576 00:43:51.660984 3 3 20 |5454 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 00:43:51.661032 3 3 24 |807 1514 |(11 11)(11 11) |(1 1)(1 1)| 0
1578 00:43:51.661079 [Byte 0] Lead/lag Transition tap number (1)
1579 00:43:51.661130 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1580 00:43:51.661180 [Byte 1] Lead/lag Transition tap number (1)
1581 00:43:51.661227 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1582 00:43:51.661274 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1583 00:43:51.661321 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1584 00:43:51.661368 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
1585 00:43:51.661415 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1586 00:43:51.661463 3 4 20 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1587 00:43:51.661515 3 4 24 |3d3d b3a4 |(11 11)(11 11) |(1 1)(1 1)| 0
1588 00:43:51.661565 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 00:43:51.661613 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 00:43:51.661661 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 00:43:51.661708 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 00:43:51.661755 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1593 00:43:51.661802 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1594 00:43:51.661849 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1595 00:43:51.661897 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1596 00:43:51.661948 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1597 00:43:51.662019 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1598 00:43:51.662081 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1599 00:43:51.662128 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1600 00:43:51.662174 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1601 00:43:51.662222 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1602 00:43:51.662272 [Byte 0] Lead/lag Transition tap number (3)
1603 00:43:51.662321 [Byte 1] Lead/lag Transition tap number (1)
1604 00:43:51.662367 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1605 00:43:51.662415 3 6 20 |202 3e3d |(1 1)(11 11) |(0 0)(0 0)| 0
1606 00:43:51.662463 3 6 24 |4646 1e1e |(0 0)(11 11) |(0 0)(0 0)| 0
1607 00:43:51.662509 [Byte 0]First pass (3, 6, 24)
1608 00:43:51.662555 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 00:43:51.662603 [Byte 1]First pass (3, 6, 28)
1610 00:43:51.662653 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 00:43:51.662703 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 00:43:51.662750 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1613 00:43:51.662797 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1614 00:43:51.662844 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1615 00:43:51.662891 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1616 00:43:51.662939 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1617 00:43:51.662988 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1618 00:43:51.663036 All bytes gating window > 1UI, Early break!
1619 00:43:51.663085
1620 00:43:51.663131 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1621 00:43:51.663178
1622 00:43:51.663223 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1623 00:43:51.663269
1624 00:43:51.663314
1625 00:43:51.663359
1626 00:43:51.663404 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1627 00:43:51.663450
1628 00:43:51.663495 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1629 00:43:51.663544
1630 00:43:51.663593
1631 00:43:51.663639 Write Rank1 MR1 =0x56
1632 00:43:51.663685
1633 00:43:51.663731 best RODT dly(2T, 0.5T) = (2, 3)
1634 00:43:51.663777
1635 00:43:51.663823 best RODT dly(2T, 0.5T) = (2, 3)
1636 00:43:51.663869 ==
1637 00:43:51.663915 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1638 00:43:51.663965 fsp= 1, odt_onoff= 1, Byte mode= 0
1639 00:43:51.664014 ==
1640 00:43:51.664060 Start DQ dly to find pass range UseTestEngine =0
1641 00:43:51.664107 x-axis: bit #, y-axis: DQ dly (-127~63)
1642 00:43:51.664154 RX Vref Scan = 0
1643 00:43:51.664200 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1644 00:43:51.664247 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1645 00:43:51.664295 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1646 00:43:51.664343 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1647 00:43:51.664394 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1648 00:43:51.664444 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1649 00:43:51.664492 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1650 00:43:51.664541 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1651 00:43:51.664588 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1652 00:43:51.664634 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1653 00:43:51.664681 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1654 00:43:51.664728 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1655 00:43:51.664774 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1656 00:43:51.664820 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1657 00:43:51.664867 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1658 00:43:51.664914 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1659 00:43:51.664961 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1660 00:43:51.665008 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1661 00:43:51.665055 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1662 00:43:51.665102 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1663 00:43:51.665148 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1664 00:43:51.665195 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1665 00:43:51.665241 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1666 00:43:51.665288 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1667 00:43:51.665335 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1668 00:43:51.665381 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1669 00:43:51.665427 0, [0] xxxxxxxx xxxxxxxx [MSB]
1670 00:43:51.665474 1, [0] xxxxxxxx xxxxxxxx [MSB]
1671 00:43:51.665521 2, [0] xxxxxxxx xxxxxxxx [MSB]
1672 00:43:51.665568 3, [0] xxxoxxxx oxxoxxxx [MSB]
1673 00:43:51.665614 4, [0] xxxoxoxx oxxoxxxx [MSB]
1674 00:43:51.665661 5, [0] xxxoxoox ooxoxxxx [MSB]
1675 00:43:51.665708 6, [0] xxxoxooo ooxoxxxx [MSB]
1676 00:43:51.665755 7, [0] xxxoxooo ooxooxxx [MSB]
1677 00:43:51.665801 8, [0] xoxoxooo ooxoooox [MSB]
1678 00:43:51.665848 9, [0] oooooooo ooxoooox [MSB]
1679 00:43:51.666093 10, [0] oooooooo ooxooooo [MSB]
1680 00:43:51.666147 32, [0] oooooooo oooooooo [MSB]
1681 00:43:51.666196 33, [0] oooxoooo xooooooo [MSB]
1682 00:43:51.666244 34, [0] oooxoooo xooooooo [MSB]
1683 00:43:51.666292 35, [0] oooxoooo xooxoooo [MSB]
1684 00:43:51.666340 36, [0] oooxooxo xxoxxooo [MSB]
1685 00:43:51.666387 37, [0] oooxoxxo xxoxxxoo [MSB]
1686 00:43:51.666435 38, [0] oooxoxxo xxoxxxxo [MSB]
1687 00:43:51.666483 39, [0] oooxoxxx xxoxxxxo [MSB]
1688 00:43:51.666530 40, [0] oxoxxxxx xxoxxxxo [MSB]
1689 00:43:51.666578 41, [0] xxxxxxxx xxoxxxxx [MSB]
1690 00:43:51.666625 42, [0] xxxxxxxx xxoxxxxx [MSB]
1691 00:43:51.666672 43, [0] xxxxxxxx xxoxxxxx [MSB]
1692 00:43:51.666719 44, [0] xxxxxxxx xxxxxxxx [MSB]
1693 00:43:51.666766 iDelay=44, Bit 0, Center 24 (9 ~ 40) 32
1694 00:43:51.666813 iDelay=44, Bit 1, Center 23 (8 ~ 39) 32
1695 00:43:51.666859 iDelay=44, Bit 2, Center 24 (9 ~ 40) 32
1696 00:43:51.666906 iDelay=44, Bit 3, Center 17 (3 ~ 32) 30
1697 00:43:51.666952 iDelay=44, Bit 4, Center 24 (9 ~ 39) 31
1698 00:43:51.666998 iDelay=44, Bit 5, Center 20 (4 ~ 36) 33
1699 00:43:51.667044 iDelay=44, Bit 6, Center 20 (5 ~ 35) 31
1700 00:43:51.667090 iDelay=44, Bit 7, Center 22 (6 ~ 38) 33
1701 00:43:51.667137 iDelay=44, Bit 8, Center 17 (3 ~ 32) 30
1702 00:43:51.667183 iDelay=44, Bit 9, Center 20 (5 ~ 35) 31
1703 00:43:51.667230 iDelay=44, Bit 10, Center 27 (11 ~ 43) 33
1704 00:43:51.667276 iDelay=44, Bit 11, Center 18 (3 ~ 34) 32
1705 00:43:51.667322 iDelay=44, Bit 12, Center 21 (7 ~ 35) 29
1706 00:43:51.667368 iDelay=44, Bit 13, Center 22 (8 ~ 36) 29
1707 00:43:51.667414 iDelay=44, Bit 14, Center 22 (8 ~ 37) 30
1708 00:43:51.667460 iDelay=44, Bit 15, Center 25 (10 ~ 40) 31
1709 00:43:51.667506 ==
1710 00:43:51.667552 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1711 00:43:51.667599 fsp= 1, odt_onoff= 1, Byte mode= 0
1712 00:43:51.667646 ==
1713 00:43:51.667693 DQS Delay:
1714 00:43:51.667738 DQS0 = 0, DQS1 = 0
1715 00:43:51.667784 DQM Delay:
1716 00:43:51.667830 DQM0 = 21, DQM1 = 21
1717 00:43:51.667876 DQ Delay:
1718 00:43:51.667922 DQ0 =24, DQ1 =23, DQ2 =24, DQ3 =17
1719 00:43:51.667968 DQ4 =24, DQ5 =20, DQ6 =20, DQ7 =22
1720 00:43:51.668013 DQ8 =17, DQ9 =20, DQ10 =27, DQ11 =18
1721 00:43:51.668059 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =25
1722 00:43:51.668106
1723 00:43:51.668152
1724 00:43:51.668199 DramC Write-DBI off
1725 00:43:51.668245 ==
1726 00:43:51.668291 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1727 00:43:51.668337 fsp= 1, odt_onoff= 1, Byte mode= 0
1728 00:43:51.668383 ==
1729 00:43:51.668429 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1730 00:43:51.668475
1731 00:43:51.668521 Begin, DQ Scan Range 922~1178
1732 00:43:51.668567
1733 00:43:51.668613
1734 00:43:51.668659 TX Vref Scan disable
1735 00:43:51.668705 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1736 00:43:51.668753 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1737 00:43:51.668800 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1738 00:43:51.668848 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1739 00:43:51.668894 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1740 00:43:51.668941 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1741 00:43:51.668988 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1742 00:43:51.669035 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1743 00:43:51.669082 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1744 00:43:51.669129 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1745 00:43:51.669177 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1746 00:43:51.669224 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1747 00:43:51.669270 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1748 00:43:51.669317 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1749 00:43:51.669364 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1750 00:43:51.669411 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1751 00:43:51.669458 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1752 00:43:51.669505 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1753 00:43:51.669551 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1754 00:43:51.669598 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1755 00:43:51.669645 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1756 00:43:51.669692 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1757 00:43:51.669739 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1758 00:43:51.669786 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1759 00:43:51.669833 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1760 00:43:51.669880 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1761 00:43:51.669927 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1762 00:43:51.669974 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1763 00:43:51.670063 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1764 00:43:51.670111 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1765 00:43:51.670159 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1766 00:43:51.670206 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1767 00:43:51.670258 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1768 00:43:51.670308 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1769 00:43:51.670355 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1770 00:43:51.670403 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1771 00:43:51.670450 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1772 00:43:51.670497 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1773 00:43:51.670543 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1774 00:43:51.670590 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1775 00:43:51.670637 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1776 00:43:51.670684 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1777 00:43:51.670731 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1778 00:43:51.670778 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1779 00:43:51.670825 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1780 00:43:51.670872 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1781 00:43:51.670919 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1782 00:43:51.670966 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1783 00:43:51.671013 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1784 00:43:51.671060 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
1785 00:43:51.671106 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1786 00:43:51.671154 973 |3 6 13|[0] xxxxxxxx ooxoxxxx [MSB]
1787 00:43:51.671206 974 |3 6 14|[0] xxxxxxxx ooxooxxx [MSB]
1788 00:43:51.671260 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1789 00:43:51.671307 976 |3 6 16|[0] xxxxxxxx ooxoooox [MSB]
1790 00:43:51.671354 977 |3 6 17|[0] xxxxxxxx ooxoooox [MSB]
1791 00:43:51.671401 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1792 00:43:51.671447 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
1793 00:43:51.671494 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
1794 00:43:51.671730 981 |3 6 21|[0] xxxoxoox oooooooo [MSB]
1795 00:43:51.671783 982 |3 6 22|[0] xxxoooox oooooooo [MSB]
1796 00:43:51.671832 983 |3 6 23|[0] xxxoooox oooooooo [MSB]
1797 00:43:51.671879 984 |3 6 24|[0] xoxooooo oooooooo [MSB]
1798 00:43:51.671927 991 |3 6 31|[0] oooooooo xooxoooo [MSB]
1799 00:43:51.671975 992 |3 6 32|[0] oooooooo xooxoooo [MSB]
1800 00:43:51.672022 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1801 00:43:51.672069 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1802 00:43:51.672116 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
1803 00:43:51.672164 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1804 00:43:51.672211 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1805 00:43:51.672258 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
1806 00:43:51.672306 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
1807 00:43:51.672353 1000 |3 6 40|[0] oooxoxoo xxxxxxxx [MSB]
1808 00:43:51.672400 1001 |3 6 41|[0] oooxoxxo xxxxxxxx [MSB]
1809 00:43:51.672451 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1810 00:43:51.672500 Byte0, DQ PI dly=990, DQM PI dly= 990
1811 00:43:51.672547 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
1812 00:43:51.672594
1813 00:43:51.672640 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
1814 00:43:51.672688
1815 00:43:51.672734 Byte1, DQ PI dly=983, DQM PI dly= 983
1816 00:43:51.672780 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1817 00:43:51.672826
1818 00:43:51.672872 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1819 00:43:51.672918
1820 00:43:51.672966 ==
1821 00:43:51.673015 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1822 00:43:51.673063 fsp= 1, odt_onoff= 1, Byte mode= 0
1823 00:43:51.673109 ==
1824 00:43:51.673155 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1825 00:43:51.673201
1826 00:43:51.673248 Begin, DQ Scan Range 959~1023
1827 00:43:51.673294 Write Rank1 MR14 =0x0
1828 00:43:51.673340
1829 00:43:51.673385 CH=0, VrefRange= 0, VrefLevel = 0
1830 00:43:51.673432 TX Bit0 (987~999) 13 993, Bit8 (974~986) 13 980,
1831 00:43:51.673478 TX Bit1 (986~996) 11 991, Bit9 (976~989) 14 982,
1832 00:43:51.673527 TX Bit2 (987~998) 12 992, Bit10 (981~994) 14 987,
1833 00:43:51.673575 TX Bit3 (981~989) 9 985, Bit11 (975~985) 11 980,
1834 00:43:51.673624 TX Bit4 (985~997) 13 991, Bit12 (977~989) 13 983,
1835 00:43:51.673671 TX Bit5 (983~994) 12 988, Bit13 (977~989) 13 983,
1836 00:43:51.673718 TX Bit6 (983~995) 13 989, Bit14 (978~990) 13 984,
1837 00:43:51.673764 TX Bit7 (986~995) 10 990, Bit15 (981~993) 13 987,
1838 00:43:51.673810
1839 00:43:51.673856 Write Rank1 MR14 =0x2
1840 00:43:51.673901
1841 00:43:51.673947 CH=0, VrefRange= 0, VrefLevel = 2
1842 00:43:51.673999 TX Bit0 (987~1000) 14 993, Bit8 (974~986) 13 980,
1843 00:43:51.674081 TX Bit1 (986~998) 13 992, Bit9 (975~990) 16 982,
1844 00:43:51.674128 TX Bit2 (986~998) 13 992, Bit10 (981~995) 15 988,
1845 00:43:51.674176 TX Bit3 (980~992) 13 986, Bit11 (975~986) 12 980,
1846 00:43:51.674224 TX Bit4 (985~998) 14 991, Bit12 (976~989) 14 982,
1847 00:43:51.674273 TX Bit5 (983~994) 12 988, Bit13 (977~989) 13 983,
1848 00:43:51.674319 TX Bit6 (983~996) 14 989, Bit14 (977~991) 15 984,
1849 00:43:51.674366 TX Bit7 (986~996) 11 991, Bit15 (981~994) 14 987,
1850 00:43:51.674413
1851 00:43:51.674459 Write Rank1 MR14 =0x4
1852 00:43:51.674505
1853 00:43:51.674551 CH=0, VrefRange= 0, VrefLevel = 4
1854 00:43:51.674597 TX Bit0 (986~1001) 16 993, Bit8 (973~987) 15 980,
1855 00:43:51.674644 TX Bit1 (986~998) 13 992, Bit9 (975~990) 16 982,
1856 00:43:51.674692 TX Bit2 (986~999) 14 992, Bit10 (981~995) 15 988,
1857 00:43:51.674738 TX Bit3 (980~992) 13 986, Bit11 (974~987) 14 980,
1858 00:43:51.674784 TX Bit4 (985~998) 14 991, Bit12 (976~990) 15 983,
1859 00:43:51.674831 TX Bit5 (982~995) 14 988, Bit13 (976~990) 15 983,
1860 00:43:51.674882 TX Bit6 (983~996) 14 989, Bit14 (977~992) 16 984,
1861 00:43:51.674931 TX Bit7 (986~996) 11 991, Bit15 (981~995) 15 988,
1862 00:43:51.674978
1863 00:43:51.675025 Write Rank1 MR14 =0x6
1864 00:43:51.675071
1865 00:43:51.675117 CH=0, VrefRange= 0, VrefLevel = 6
1866 00:43:51.675163 TX Bit0 (986~1001) 16 993, Bit8 (973~988) 16 980,
1867 00:43:51.675209 TX Bit1 (985~999) 15 992, Bit9 (975~991) 17 983,
1868 00:43:51.675256 TX Bit2 (986~1000) 15 993, Bit10 (981~996) 16 988,
1869 00:43:51.675302 TX Bit3 (980~993) 14 986, Bit11 (974~988) 15 981,
1870 00:43:51.675349 TX Bit4 (984~999) 16 991, Bit12 (976~990) 15 983,
1871 00:43:51.675396 TX Bit5 (982~995) 14 988, Bit13 (976~990) 15 983,
1872 00:43:51.675443 TX Bit6 (983~997) 15 990, Bit14 (976~992) 17 984,
1873 00:43:51.675490 TX Bit7 (986~997) 12 991, Bit15 (981~995) 15 988,
1874 00:43:51.675536
1875 00:43:51.675580 Write Rank1 MR14 =0x8
1876 00:43:51.675626
1877 00:43:51.675671 CH=0, VrefRange= 0, VrefLevel = 8
1878 00:43:51.675718 TX Bit0 (986~1002) 17 994, Bit8 (972~988) 17 980,
1879 00:43:51.675764 TX Bit1 (985~1000) 16 992, Bit9 (974~991) 18 982,
1880 00:43:51.675810 TX Bit2 (986~1001) 16 993, Bit10 (980~996) 17 988,
1881 00:43:51.675857 TX Bit3 (980~993) 14 986, Bit11 (974~988) 15 981,
1882 00:43:51.675903 TX Bit4 (984~1000) 17 992, Bit12 (976~990) 15 983,
1883 00:43:51.675950 TX Bit5 (981~995) 15 988, Bit13 (976~990) 15 983,
1884 00:43:51.675996 TX Bit6 (982~997) 16 989, Bit14 (976~993) 18 984,
1885 00:43:51.676042 TX Bit7 (985~997) 13 991, Bit15 (980~996) 17 988,
1886 00:43:51.676088
1887 00:43:51.676134 Write Rank1 MR14 =0xa
1888 00:43:51.676180
1889 00:43:51.676226 CH=0, VrefRange= 0, VrefLevel = 10
1890 00:43:51.676272 TX Bit0 (986~1003) 18 994, Bit8 (972~989) 18 980,
1891 00:43:51.676319 TX Bit1 (985~1001) 17 993, Bit9 (974~992) 19 983,
1892 00:43:51.676366 TX Bit2 (986~1001) 16 993, Bit10 (980~997) 18 988,
1893 00:43:51.676412 TX Bit3 (979~994) 16 986, Bit11 (974~988) 15 981,
1894 00:43:51.676458 TX Bit4 (984~1001) 18 992, Bit12 (975~991) 17 983,
1895 00:43:51.676504 TX Bit5 (981~996) 16 988, Bit13 (976~991) 16 983,
1896 00:43:51.676550 TX Bit6 (981~998) 18 989, Bit14 (976~994) 19 985,
1897 00:43:51.676597 TX Bit7 (985~999) 15 992, Bit15 (979~996) 18 987,
1898 00:43:51.676643
1899 00:43:51.676689 Write Rank1 MR14 =0xc
1900 00:43:51.676734
1901 00:43:51.676968 CH=0, VrefRange= 0, VrefLevel = 12
1902 00:43:51.677023 TX Bit0 (985~1003) 19 994, Bit8 (971~989) 19 980,
1903 00:43:51.677071 TX Bit1 (984~1002) 19 993, Bit9 (974~992) 19 983,
1904 00:43:51.677119 TX Bit2 (985~1002) 18 993, Bit10 (979~997) 19 988,
1905 00:43:51.677166 TX Bit3 (979~994) 16 986, Bit11 (973~989) 17 981,
1906 00:43:51.677212 TX Bit4 (983~1002) 20 992, Bit12 (975~992) 18 983,
1907 00:43:51.677259 TX Bit5 (981~997) 17 989, Bit13 (975~992) 18 983,
1908 00:43:51.935174 TX Bit6 (981~999) 19 990, Bit14 (976~995) 20 985,
1909 00:43:51.935728 TX Bit7 (985~999) 15 992, Bit15 (979~996) 18 987,
1910 00:43:51.936159
1911 00:43:51.936568 Write Rank1 MR14 =0xe
1912 00:43:51.936966
1913 00:43:51.937359 CH=0, VrefRange= 0, VrefLevel = 14
1914 00:43:51.937754 TX Bit0 (985~1004) 20 994, Bit8 (971~990) 20 980,
1915 00:43:51.938144 TX Bit1 (984~1002) 19 993, Bit9 (974~993) 20 983,
1916 00:43:51.938404 TX Bit2 (985~1002) 18 993, Bit10 (979~997) 19 988,
1917 00:43:51.938657 TX Bit3 (979~994) 16 986, Bit11 (972~989) 18 980,
1918 00:43:51.938903 TX Bit4 (982~1002) 21 992, Bit12 (975~992) 18 983,
1919 00:43:51.939150 TX Bit5 (981~998) 18 989, Bit13 (975~993) 19 984,
1920 00:43:51.939392 TX Bit6 (981~1000) 20 990, Bit14 (975~995) 21 985,
1921 00:43:51.939636 TX Bit7 (984~1000) 17 992, Bit15 (978~997) 20 987,
1922 00:43:51.939995
1923 00:43:51.940250 Write Rank1 MR14 =0x10
1924 00:43:51.940498
1925 00:43:51.940792 CH=0, VrefRange= 0, VrefLevel = 16
1926 00:43:51.941205 TX Bit0 (985~1005) 21 995, Bit8 (970~990) 21 980,
1927 00:43:51.941596 TX Bit1 (984~1003) 20 993, Bit9 (974~993) 20 983,
1928 00:43:51.942007 TX Bit2 (985~1004) 20 994, Bit10 (978~997) 20 987,
1929 00:43:51.942430 TX Bit3 (979~995) 17 987, Bit11 (972~990) 19 981,
1930 00:43:51.942876 TX Bit4 (983~1003) 21 993, Bit12 (974~993) 20 983,
1931 00:43:51.943272 TX Bit5 (980~998) 19 989, Bit13 (975~993) 19 984,
1932 00:43:51.943706 TX Bit6 (981~1000) 20 990, Bit14 (975~996) 22 985,
1933 00:43:51.944106 TX Bit7 (984~1000) 17 992, Bit15 (979~997) 19 988,
1934 00:43:51.944489
1935 00:43:51.944889 Write Rank1 MR14 =0x12
1936 00:43:51.945272
1937 00:43:51.945709 CH=0, VrefRange= 0, VrefLevel = 18
1938 00:43:51.946140 TX Bit0 (985~1005) 21 995, Bit8 (970~991) 22 980,
1939 00:43:51.946512 TX Bit1 (983~1003) 21 993, Bit9 (972~995) 24 983,
1940 00:43:51.946896 TX Bit2 (984~1004) 21 994, Bit10 (978~998) 21 988,
1941 00:43:51.947156 TX Bit3 (979~995) 17 987, Bit11 (972~990) 19 981,
1942 00:43:51.947421 TX Bit4 (982~1003) 22 992, Bit12 (974~994) 21 984,
1943 00:43:51.947675 TX Bit5 (980~999) 20 989, Bit13 (975~994) 20 984,
1944 00:43:51.947918 TX Bit6 (981~1001) 21 991, Bit14 (975~996) 22 985,
1945 00:43:51.948160 TX Bit7 (984~1002) 19 993, Bit15 (978~997) 20 987,
1946 00:43:51.948546
1947 00:43:51.948800 Write Rank1 MR14 =0x14
1948 00:43:51.949051
1949 00:43:51.949306 CH=0, VrefRange= 0, VrefLevel = 20
1950 00:43:51.949550 TX Bit0 (984~1006) 23 995, Bit8 (970~991) 22 980,
1951 00:43:51.949905 TX Bit1 (983~1004) 22 993, Bit9 (973~995) 23 984,
1952 00:43:51.950208 TX Bit2 (985~1005) 21 995, Bit10 (977~998) 22 987,
1953 00:43:51.950486 TX Bit3 (978~996) 19 987, Bit11 (972~991) 20 981,
1954 00:43:51.950732 TX Bit4 (982~1004) 23 993, Bit12 (974~994) 21 984,
1955 00:43:51.951002 TX Bit5 (980~999) 20 989, Bit13 (974~995) 22 984,
1956 00:43:51.951245 TX Bit6 (980~1001) 22 990, Bit14 (974~996) 23 985,
1957 00:43:51.951498 TX Bit7 (983~1002) 20 992, Bit15 (977~998) 22 987,
1958 00:43:51.951751
1959 00:43:51.951988 Write Rank1 MR14 =0x16
1960 00:43:51.952320
1961 00:43:51.952705 CH=0, VrefRange= 0, VrefLevel = 22
1962 00:43:51.953108 TX Bit0 (985~1007) 23 996, Bit8 (969~992) 24 980,
1963 00:43:51.953504 TX Bit1 (982~1004) 23 993, Bit9 (972~995) 24 983,
1964 00:43:51.953894 TX Bit2 (984~1006) 23 995, Bit10 (977~998) 22 987,
1965 00:43:51.954243 TX Bit3 (978~996) 19 987, Bit11 (971~992) 22 981,
1966 00:43:51.954496 TX Bit4 (981~1004) 24 992, Bit12 (974~995) 22 984,
1967 00:43:51.954741 TX Bit5 (980~1001) 22 990, Bit13 (974~996) 23 985,
1968 00:43:51.954985 TX Bit6 (980~1002) 23 991, Bit14 (974~996) 23 985,
1969 00:43:51.955228 TX Bit7 (983~1003) 21 993, Bit15 (977~998) 22 987,
1970 00:43:51.955467
1971 00:43:51.955708 Write Rank1 MR14 =0x18
1972 00:43:51.955949
1973 00:43:51.956191 CH=0, VrefRange= 0, VrefLevel = 24
1974 00:43:51.956437 TX Bit0 (984~1006) 23 995, Bit8 (969~993) 25 981,
1975 00:43:51.956685 TX Bit1 (983~1005) 23 994, Bit9 (972~996) 25 984,
1976 00:43:51.956930 TX Bit2 (984~1006) 23 995, Bit10 (977~999) 23 988,
1977 00:43:51.957174 TX Bit3 (978~996) 19 987, Bit11 (971~993) 23 982,
1978 00:43:51.957418 TX Bit4 (981~1005) 25 993, Bit12 (973~996) 24 984,
1979 00:43:51.957656 TX Bit5 (979~1001) 23 990, Bit13 (973~996) 24 984,
1980 00:43:51.957897 TX Bit6 (980~1003) 24 991, Bit14 (974~997) 24 985,
1981 00:43:51.958170 TX Bit7 (983~1004) 22 993, Bit15 (976~998) 23 987,
1982 00:43:51.958414
1983 00:43:51.958654 Write Rank1 MR14 =0x1a
1984 00:43:51.958896
1985 00:43:51.959135 CH=0, VrefRange= 0, VrefLevel = 26
1986 00:43:51.959361 TX Bit0 (984~1008) 25 996, Bit8 (969~994) 26 981,
1987 00:43:51.959534 TX Bit1 (982~1005) 24 993, Bit9 (971~995) 25 983,
1988 00:43:51.959707 TX Bit2 (983~1006) 24 994, Bit10 (977~999) 23 988,
1989 00:43:51.959904 TX Bit3 (978~997) 20 987, Bit11 (970~993) 24 981,
1990 00:43:51.960078 TX Bit4 (981~1006) 26 993, Bit12 (973~996) 24 984,
1991 00:43:51.960251 TX Bit5 (979~1001) 23 990, Bit13 (973~996) 24 984,
1992 00:43:51.960424 TX Bit6 (980~1003) 24 991, Bit14 (974~997) 24 985,
1993 00:43:51.960617 TX Bit7 (982~1004) 23 993, Bit15 (977~998) 22 987,
1994 00:43:51.960792
1995 00:43:51.960963 Write Rank1 MR14 =0x1c
1996 00:43:51.961137
1997 00:43:51.961306 CH=0, VrefRange= 0, VrefLevel = 28
1998 00:43:51.961488 TX Bit0 (983~1008) 26 995, Bit8 (969~993) 25 981,
1999 00:43:51.961758 TX Bit1 (982~1006) 25 994, Bit9 (972~995) 24 983,
2000 00:43:51.962366 TX Bit2 (983~1007) 25 995, Bit10 (976~999) 24 987,
2001 00:43:51.962580 TX Bit3 (978~998) 21 988, Bit11 (970~994) 25 982,
2002 00:43:51.962770 TX Bit4 (981~1006) 26 993, Bit12 (972~996) 25 984,
2003 00:43:51.962945 TX Bit5 (979~1002) 24 990, Bit13 (973~996) 24 984,
2004 00:43:51.963120 TX Bit6 (980~1003) 24 991, Bit14 (973~997) 25 985,
2005 00:43:51.963292 TX Bit7 (982~1004) 23 993, Bit15 (976~999) 24 987,
2006 00:43:51.963463
2007 00:43:51.963634 Write Rank1 MR14 =0x1e
2008 00:43:51.963832
2009 00:43:51.964007 CH=0, VrefRange= 0, VrefLevel = 30
2010 00:43:51.964181 TX Bit0 (982~1008) 27 995, Bit8 (969~994) 26 981,
2011 00:43:51.964364 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
2012 00:43:51.964498 TX Bit2 (983~1006) 24 994, Bit10 (977~999) 23 988,
2013 00:43:51.964630 TX Bit3 (978~999) 22 988, Bit11 (970~995) 26 982,
2014 00:43:51.964768 TX Bit4 (982~1006) 25 994, Bit12 (973~996) 24 984,
2015 00:43:51.964909 TX Bit5 (979~1002) 24 990, Bit13 (972~996) 25 984,
2016 00:43:51.965040 TX Bit6 (980~1003) 24 991, Bit14 (972~997) 26 984,
2017 00:43:51.965174 TX Bit7 (981~1005) 25 993, Bit15 (976~999) 24 987,
2018 00:43:51.965320
2019 00:43:51.965451 Write Rank1 MR14 =0x20
2020 00:43:51.965581
2021 00:43:51.965725 CH=0, VrefRange= 0, VrefLevel = 32
2022 00:43:51.965858 TX Bit0 (982~1008) 27 995, Bit8 (969~994) 26 981,
2023 00:43:51.966005 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
2024 00:43:51.966159 TX Bit2 (983~1006) 24 994, Bit10 (977~999) 23 988,
2025 00:43:51.966366 TX Bit3 (978~999) 22 988, Bit11 (970~995) 26 982,
2026 00:43:51.966575 TX Bit4 (982~1006) 25 994, Bit12 (973~996) 24 984,
2027 00:43:51.966784 TX Bit5 (979~1002) 24 990, Bit13 (972~996) 25 984,
2028 00:43:51.966986 TX Bit6 (980~1003) 24 991, Bit14 (972~997) 26 984,
2029 00:43:51.967196 TX Bit7 (981~1005) 25 993, Bit15 (976~999) 24 987,
2030 00:43:51.967400
2031 00:43:51.967563 Write Rank1 MR14 =0x22
2032 00:43:51.967697
2033 00:43:51.967829 CH=0, VrefRange= 0, VrefLevel = 34
2034 00:43:51.967975 TX Bit0 (982~1008) 27 995, Bit8 (969~994) 26 981,
2035 00:43:51.968109 TX Bit1 (981~1006) 26 993, Bit9 (972~995) 24 983,
2036 00:43:51.968238 TX Bit2 (983~1006) 24 994, Bit10 (977~999) 23 988,
2037 00:43:51.968371 TX Bit3 (978~999) 22 988, Bit11 (970~995) 26 982,
2038 00:43:51.968519 TX Bit4 (982~1006) 25 994, Bit12 (973~996) 24 984,
2039 00:43:51.968652 TX Bit5 (979~1002) 24 990, Bit13 (972~996) 25 984,
2040 00:43:51.968782 TX Bit6 (980~1003) 24 991, Bit14 (972~997) 26 984,
2041 00:43:51.968927 TX Bit7 (981~1005) 25 993, Bit15 (976~999) 24 987,
2042 00:43:51.969058
2043 00:43:51.969186
2044 00:43:51.969330 TX Vref found, early break! 374< 375
2045 00:43:51.969443 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
2046 00:43:51.969549 u1DelayCellOfst[0]=8 cells (7 PI)
2047 00:43:51.969654 u1DelayCellOfst[1]=5 cells (5 PI)
2048 00:43:51.969758 u1DelayCellOfst[2]=6 cells (6 PI)
2049 00:43:51.969862 u1DelayCellOfst[3]=0 cells (0 PI)
2050 00:43:51.969966 u1DelayCellOfst[4]=6 cells (6 PI)
2051 00:43:51.970091 u1DelayCellOfst[5]=2 cells (2 PI)
2052 00:43:51.970203 u1DelayCellOfst[6]=3 cells (3 PI)
2053 00:43:51.970306 u1DelayCellOfst[7]=5 cells (5 PI)
2054 00:43:51.970410 Byte0, DQ PI dly=988, DQM PI dly= 991
2055 00:43:51.970515 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2056 00:43:51.970620
2057 00:43:51.970724 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2058 00:43:51.970828
2059 00:43:51.970931 u1DelayCellOfst[8]=0 cells (0 PI)
2060 00:43:51.971034 u1DelayCellOfst[9]=2 cells (2 PI)
2061 00:43:51.971138 u1DelayCellOfst[10]=8 cells (7 PI)
2062 00:43:51.971240 u1DelayCellOfst[11]=1 cells (1 PI)
2063 00:43:51.971343 u1DelayCellOfst[12]=3 cells (3 PI)
2064 00:43:51.971445 u1DelayCellOfst[13]=3 cells (3 PI)
2065 00:43:51.971548 u1DelayCellOfst[14]=3 cells (3 PI)
2066 00:43:51.971652 u1DelayCellOfst[15]=6 cells (6 PI)
2067 00:43:51.971755 Byte1, DQ PI dly=981, DQM PI dly= 984
2068 00:43:51.971859 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2069 00:43:51.971964
2070 00:43:51.972067 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2071 00:43:51.972172
2072 00:43:51.972274 Write Rank1 MR14 =0x1e
2073 00:43:51.972377
2074 00:43:51.972479 Final TX Range 0 Vref 30
2075 00:43:51.972582
2076 00:43:51.972685 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2077 00:43:51.972791
2078 00:43:51.972894 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2079 00:43:51.972999 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2080 00:43:51.973103 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2081 00:43:51.973208 Write Rank1 MR3 =0xb0
2082 00:43:51.973312 DramC Write-DBI on
2083 00:43:51.973414 ==
2084 00:43:51.973518 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2085 00:43:51.973623 fsp= 1, odt_onoff= 1, Byte mode= 0
2086 00:43:51.973728 ==
2087 00:43:51.973833 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2088 00:43:51.973937
2089 00:43:51.974059 Begin, DQ Scan Range 704~768
2090 00:43:51.974164
2091 00:43:51.974271
2092 00:43:51.974357 TX Vref Scan disable
2093 00:43:51.974444 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2094 00:43:51.974534 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2095 00:43:51.974622 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2096 00:43:51.974712 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2097 00:43:51.974801 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2098 00:43:51.974889 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2099 00:43:51.974977 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2100 00:43:51.975066 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2101 00:43:51.975156 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2102 00:43:51.975244 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2103 00:43:51.975333 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2104 00:43:51.975422 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2105 00:43:51.975510 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2106 00:43:51.975600 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2107 00:43:51.975688 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2108 00:43:51.975776 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2109 00:43:51.975865 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2110 00:43:51.975954 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2111 00:43:51.976260 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2112 00:43:51.976360 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2113 00:43:51.976451 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2114 00:43:51.976540 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2115 00:43:51.976630 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2116 00:43:51.976719 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2117 00:43:51.976807 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2118 00:43:51.976897 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2119 00:43:51.976985 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2120 00:43:51.977073 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2121 00:43:51.977163 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2122 00:43:51.977253 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2123 00:43:51.977341 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2124 00:43:51.977430 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2125 00:43:51.977520 Byte0, DQ PI dly=737, DQM PI dly= 737
2126 00:43:51.977607 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2127 00:43:51.977695
2128 00:43:51.977782 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2129 00:43:51.977870
2130 00:43:51.977958 Byte1, DQ PI dly=728, DQM PI dly= 728
2131 00:43:51.978074 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2132 00:43:51.978163
2133 00:43:51.978250 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2134 00:43:51.978339
2135 00:43:51.978424 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2136 00:43:51.978512 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2137 00:43:51.978600 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2138 00:43:51.978688 Write Rank1 MR3 =0x30
2139 00:43:51.978776 DramC Write-DBI off
2140 00:43:51.978862
2141 00:43:51.978948 [DATLAT]
2142 00:43:51.979034 Freq=1600, CH0 RK1, use_rxtx_scan=0
2143 00:43:51.979122
2144 00:43:51.979207 DATLAT Default: 0x10
2145 00:43:51.979301 7, 0xFFFF, sum=0
2146 00:43:51.979376 8, 0xFFFF, sum=0
2147 00:43:51.979452 9, 0xFFFF, sum=0
2148 00:43:51.979529 10, 0xFFFF, sum=0
2149 00:43:51.979605 11, 0xFFFF, sum=0
2150 00:43:51.979680 12, 0xFFFF, sum=0
2151 00:43:51.979756 13, 0xFFFF, sum=0
2152 00:43:51.979831 14, 0x0, sum=1
2153 00:43:51.979906 15, 0x0, sum=2
2154 00:43:51.979981 16, 0x0, sum=3
2155 00:43:51.980057 17, 0x0, sum=4
2156 00:43:51.980133 pattern=2 first_step=14 total pass=5 best_step=16
2157 00:43:51.980208 ==
2158 00:43:51.980283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2159 00:43:51.980359 fsp= 1, odt_onoff= 1, Byte mode= 0
2160 00:43:51.980434 ==
2161 00:43:51.980508 Start DQ dly to find pass range UseTestEngine =1
2162 00:43:51.980583 x-axis: bit #, y-axis: DQ dly (-127~63)
2163 00:43:51.980658 RX Vref Scan = 0
2164 00:43:51.980732 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2165 00:43:51.980809 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2166 00:43:51.980886 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2167 00:43:51.980962 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2168 00:43:51.981037 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2169 00:43:51.981114 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2170 00:43:51.981189 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2171 00:43:51.981265 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2172 00:43:51.981340 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2173 00:43:51.981415 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2174 00:43:51.981491 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2175 00:43:51.981567 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2176 00:43:51.981642 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2177 00:43:51.981718 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2178 00:43:51.981793 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2179 00:43:51.981869 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2180 00:43:51.981945 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2181 00:43:51.982033 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2182 00:43:51.982110 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2183 00:43:51.982187 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2184 00:43:51.982263 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2185 00:43:51.982340 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2186 00:43:51.982416 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2187 00:43:51.982492 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2188 00:43:51.982567 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2189 00:43:51.982643 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2190 00:43:51.982719 0, [0] xxxxxxxx xxxxxxxx [MSB]
2191 00:43:51.982796 1, [0] xxxxxxxx xxxxxxxx [MSB]
2192 00:43:51.982871 2, [0] xxxoxxxx xxxxxxxx [MSB]
2193 00:43:51.982947 3, [0] xxxoxxxx oxxxxxxx [MSB]
2194 00:43:51.983023 4, [0] xxxoxoxx oxxoxxxx [MSB]
2195 00:43:51.983099 5, [0] xxxoxoox oxxoxxxx [MSB]
2196 00:43:51.983175 6, [0] xxxoxoox ooxooxxx [MSB]
2197 00:43:51.983251 7, [0] xxxoxooo ooxooxxx [MSB]
2198 00:43:51.983327 8, [0] xoxoxooo ooxooxox [MSB]
2199 00:43:51.983403 9, [0] xoxoxooo ooxoooox [MSB]
2200 00:43:51.983479 10, [0] oooooooo ooxoooox [MSB]
2201 00:43:51.983555 11, [0] oooooooo ooxooooo [MSB]
2202 00:43:51.983631 33, [0] oooxoooo xooxoooo [MSB]
2203 00:43:51.983707 34, [0] oooxoooo xooxoooo [MSB]
2204 00:43:51.983783 35, [0] oooxoxoo xxoxoxoo [MSB]
2205 00:43:51.983860 36, [0] oooxoxxo xxoxoxoo [MSB]
2206 00:43:51.983936 37, [0] oooxoxxo xxoxxxoo [MSB]
2207 00:43:51.984011 38, [0] oooxxxxx xxoxxxxo [MSB]
2208 00:43:51.984087 39, [0] oooxxxxx xxoxxxxo [MSB]
2209 00:43:51.984162 40, [0] xxxxxxxx xxoxxxxx [MSB]
2210 00:43:51.984248 41, [0] xxxxxxxx xxoxxxxx [MSB]
2211 00:43:51.984314 42, [0] xxxxxxxx xxxxxxxx [MSB]
2212 00:43:51.984381 iDelay=42, Bit 0, Center 24 (10 ~ 39) 30
2213 00:43:51.984447 iDelay=42, Bit 1, Center 23 (8 ~ 39) 32
2214 00:43:51.984513 iDelay=42, Bit 2, Center 24 (10 ~ 39) 30
2215 00:43:51.984578 iDelay=42, Bit 3, Center 17 (2 ~ 32) 31
2216 00:43:51.984644 iDelay=42, Bit 4, Center 23 (10 ~ 37) 28
2217 00:43:51.984709 iDelay=42, Bit 5, Center 19 (4 ~ 34) 31
2218 00:43:51.984775 iDelay=42, Bit 6, Center 20 (5 ~ 35) 31
2219 00:43:51.984840 iDelay=42, Bit 7, Center 22 (7 ~ 37) 31
2220 00:43:51.984905 iDelay=42, Bit 8, Center 17 (3 ~ 32) 30
2221 00:43:51.984969 iDelay=42, Bit 9, Center 20 (6 ~ 34) 29
2222 00:43:51.985035 iDelay=42, Bit 10, Center 26 (12 ~ 41) 30
2223 00:43:51.985100 iDelay=42, Bit 11, Center 18 (4 ~ 32) 29
2224 00:43:51.985165 iDelay=42, Bit 12, Center 21 (6 ~ 36) 31
2225 00:43:51.985231 iDelay=42, Bit 13, Center 21 (9 ~ 34) 26
2226 00:43:51.985297 iDelay=42, Bit 14, Center 22 (8 ~ 37) 30
2227 00:43:51.985364 iDelay=42, Bit 15, Center 25 (11 ~ 39) 29
2228 00:43:51.985429 ==
2229 00:43:51.985494 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2230 00:43:51.985561 fsp= 1, odt_onoff= 1, Byte mode= 0
2231 00:43:51.985626 ==
2232 00:43:51.985691 DQS Delay:
2233 00:43:51.985755 DQS0 = 0, DQS1 = 0
2234 00:43:51.985820 DQM Delay:
2235 00:43:51.985886 DQM0 = 21, DQM1 = 21
2236 00:43:51.985951 DQ Delay:
2237 00:43:51.986229 DQ0 =24, DQ1 =23, DQ2 =24, DQ3 =17
2238 00:43:51.986305 DQ4 =23, DQ5 =19, DQ6 =20, DQ7 =22
2239 00:43:51.986372 DQ8 =17, DQ9 =20, DQ10 =26, DQ11 =18
2240 00:43:51.986438 DQ12 =21, DQ13 =21, DQ14 =22, DQ15 =25
2241 00:43:51.986504
2242 00:43:51.986569
2243 00:43:51.986634
2244 00:43:51.986697 [DramC_TX_OE_Calibration] TA2
2245 00:43:51.986764 Original DQ_B0 (3 6) =30, OEN = 27
2246 00:43:51.986830 Original DQ_B1 (3 6) =30, OEN = 27
2247 00:43:51.986896 23, 0x0, End_B0=23 End_B1=23
2248 00:43:51.986962 24, 0x0, End_B0=24 End_B1=24
2249 00:43:51.987030 25, 0x0, End_B0=25 End_B1=25
2250 00:43:51.987097 26, 0x0, End_B0=26 End_B1=26
2251 00:43:51.987163 27, 0x0, End_B0=27 End_B1=27
2252 00:43:51.987229 28, 0x0, End_B0=28 End_B1=28
2253 00:43:51.987296 29, 0x0, End_B0=29 End_B1=29
2254 00:43:51.987363 30, 0x0, End_B0=30 End_B1=30
2255 00:43:51.987430 31, 0xFBFF, End_B0=30 End_B1=30
2256 00:43:51.987497 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2257 00:43:51.987564 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2258 00:43:51.987630
2259 00:43:51.987694
2260 00:43:51.987758 Write Rank1 MR23 =0x3f
2261 00:43:51.987824 [DQSOSC]
2262 00:43:51.987890 [DQSOSCAuto] RK1, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
2263 00:43:51.987958 CH0_RK1: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
2264 00:43:51.988024 Write Rank1 MR23 =0x3f
2265 00:43:51.988090 [DQSOSC]
2266 00:43:51.988155 [DQSOSCAuto] RK1, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
2267 00:43:51.988222 CH0 RK1: MR19=202, MR18=B6B6
2268 00:43:51.988287 [RxdqsGatingPostProcess] freq 1600
2269 00:43:51.988354 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2270 00:43:51.988420 Rank: 0
2271 00:43:51.988485 best DQS0 dly(2T, 0.5T) = (2, 6)
2272 00:43:51.988551 best DQS1 dly(2T, 0.5T) = (2, 6)
2273 00:43:51.988616 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2274 00:43:51.988681 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2275 00:43:51.988746 Rank: 1
2276 00:43:51.988811 best DQS0 dly(2T, 0.5T) = (2, 6)
2277 00:43:51.988877 best DQS1 dly(2T, 0.5T) = (2, 6)
2278 00:43:51.988942 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2279 00:43:51.989006 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2280 00:43:51.989071 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2281 00:43:51.989136 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2282 00:43:51.989202 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2283 00:43:51.989279 Write Rank0 MR13 =0x59
2284 00:43:51.989336 ==
2285 00:43:51.989394 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2286 00:43:51.989454 fsp= 1, odt_onoff= 1, Byte mode= 0
2287 00:43:51.989513 ==
2288 00:43:51.989570 === u2Vref_new: 0x56 --> 0x3a
2289 00:43:51.989629 === u2Vref_new: 0x58 --> 0x58
2290 00:43:51.989687 === u2Vref_new: 0x5a --> 0x5a
2291 00:43:51.989745 === u2Vref_new: 0x5c --> 0x78
2292 00:43:51.989803 === u2Vref_new: 0x5e --> 0x7a
2293 00:43:51.989861 === u2Vref_new: 0x60 --> 0x90
2294 00:43:51.989919 [CA 0] Center 38 (13~63) winsize 51
2295 00:43:51.989977 [CA 1] Center 37 (11~63) winsize 53
2296 00:43:51.990046 [CA 2] Center 34 (6~63) winsize 58
2297 00:43:51.990104 [CA 3] Center 34 (6~63) winsize 58
2298 00:43:51.990161 [CA 4] Center 34 (5~63) winsize 59
2299 00:43:51.990218 [CA 5] Center 28 (0~57) winsize 58
2300 00:43:51.990275
2301 00:43:51.990333 [CATrainingPosCal] consider 1 rank data
2302 00:43:51.990390 u2DelayCellTimex100 = 844/100 ps
2303 00:43:51.990448 CA0 delay=38 (13~63),Diff = 10 PI (11 cell)
2304 00:43:51.990505 CA1 delay=37 (11~63),Diff = 9 PI (10 cell)
2305 00:43:51.990562 CA2 delay=34 (6~63),Diff = 6 PI (6 cell)
2306 00:43:51.990620 CA3 delay=34 (6~63),Diff = 6 PI (6 cell)
2307 00:43:51.990677 CA4 delay=34 (5~63),Diff = 6 PI (6 cell)
2308 00:43:51.990733 CA5 delay=28 (0~57),Diff = 0 PI (0 cell)
2309 00:43:51.990790
2310 00:43:51.990847 CA PerBit enable=1, Macro0, CA PI delay=28
2311 00:43:51.990905 === u2Vref_new: 0x60 --> 0x90
2312 00:43:51.990963
2313 00:43:51.991020 Vref(ca) range 1: 32
2314 00:43:51.991077
2315 00:43:51.991134 CS Dly= 10 (41-0-32)
2316 00:43:51.991191 Write Rank0 MR13 =0xd8
2317 00:43:51.991253 Write Rank0 MR13 =0xd8
2318 00:43:51.991320 Write Rank0 MR12 =0x60
2319 00:43:51.991378 Write Rank1 MR13 =0x59
2320 00:43:51.991439 ==
2321 00:43:51.991498 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2322 00:43:51.991557 fsp= 1, odt_onoff= 1, Byte mode= 0
2323 00:43:51.991615 ==
2324 00:43:51.991673 === u2Vref_new: 0x56 --> 0x3a
2325 00:43:51.991731 === u2Vref_new: 0x58 --> 0x58
2326 00:43:51.991789 === u2Vref_new: 0x5a --> 0x5a
2327 00:43:51.991847 === u2Vref_new: 0x5c --> 0x78
2328 00:43:51.991904 === u2Vref_new: 0x5e --> 0x7a
2329 00:43:51.991961 === u2Vref_new: 0x60 --> 0x90
2330 00:43:51.992018 [CA 0] Center 37 (11~63) winsize 53
2331 00:43:51.992076 [CA 1] Center 37 (11~63) winsize 53
2332 00:43:51.992133 [CA 2] Center 35 (7~63) winsize 57
2333 00:43:51.992191 [CA 3] Center 34 (6~63) winsize 58
2334 00:43:51.992250 [CA 4] Center 34 (5~63) winsize 59
2335 00:43:51.992307 [CA 5] Center 27 (-1~56) winsize 58
2336 00:43:51.992364
2337 00:43:51.992421 [CATrainingPosCal] consider 2 rank data
2338 00:43:51.992478 u2DelayCellTimex100 = 844/100 ps
2339 00:43:51.992536 CA0 delay=38 (13~63),Diff = 10 PI (11 cell)
2340 00:43:51.992593 CA1 delay=37 (11~63),Diff = 9 PI (10 cell)
2341 00:43:51.992650 CA2 delay=35 (7~63),Diff = 7 PI (8 cell)
2342 00:43:51.992708 CA3 delay=34 (6~63),Diff = 6 PI (6 cell)
2343 00:43:51.992766 CA4 delay=34 (5~63),Diff = 6 PI (6 cell)
2344 00:43:51.992823 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2345 00:43:51.992881
2346 00:43:51.992937 CA PerBit enable=1, Macro0, CA PI delay=28
2347 00:43:51.992995 === u2Vref_new: 0x60 --> 0x90
2348 00:43:51.993053
2349 00:43:51.993111 Vref(ca) range 1: 32
2350 00:43:51.993168
2351 00:43:51.993225 CS Dly= 10 (41-0-32)
2352 00:43:51.993282 Write Rank1 MR13 =0xd8
2353 00:43:51.993341 Write Rank1 MR13 =0xd8
2354 00:43:51.993400 Write Rank1 MR12 =0x60
2355 00:43:51.993457 [RankSwap] Rank num 2, (Multi 1), Rank 0
2356 00:43:51.993515 Write Rank0 MR2 =0xad
2357 00:43:51.993573 [Write Leveling]
2358 00:43:51.993631 delay byte0 byte1 byte2 byte3
2359 00:43:51.993689
2360 00:43:51.993746 10 0 0
2361 00:43:51.993804 11 0 0
2362 00:43:51.993863 12 0 0
2363 00:43:51.993921 13 0 0
2364 00:43:51.993979 14 0 0
2365 00:43:51.994050 15 0 0
2366 00:43:51.994108 16 0 0
2367 00:43:51.994168 17 0 0
2368 00:43:51.994226 18 0 0
2369 00:43:51.994293 19 0 0
2370 00:43:51.994346 20 0 0
2371 00:43:51.994399 21 0 0
2372 00:43:51.994452 22 0 0
2373 00:43:51.994504 23 0 0
2374 00:43:51.994557 24 0 0
2375 00:43:51.994610 25 0 0
2376 00:43:51.994663 26 0 0
2377 00:43:51.994906 27 0 0
2378 00:43:51.994965 28 0 0
2379 00:43:51.995019 29 0 0
2380 00:43:51.995072 30 0 0
2381 00:43:51.995126 31 0 0
2382 00:43:51.995178 32 0 ff
2383 00:43:51.995231 33 0 ff
2384 00:43:51.995284 34 ff ff
2385 00:43:51.995337 35 ff ff
2386 00:43:51.995406 36 ff ff
2387 00:43:51.995461 37 ff ff
2388 00:43:51.995514 38 ff ff
2389 00:43:51.995568 39 ff ff
2390 00:43:51.995621 40 ff ff
2391 00:43:51.995675 pass bytecount = 0xff (0xff: all bytes pass)
2392 00:43:51.995728
2393 00:43:51.995780 DQS0 dly: 34
2394 00:43:51.995833 DQS1 dly: 32
2395 00:43:51.995885 Write Rank0 MR2 =0x2d
2396 00:43:51.995937 [RankSwap] Rank num 2, (Multi 1), Rank 0
2397 00:43:51.995990 Write Rank0 MR1 =0xd6
2398 00:43:51.996042 [Gating]
2399 00:43:51.996093 ==
2400 00:43:51.996145 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2401 00:43:51.996198 fsp= 1, odt_onoff= 1, Byte mode= 0
2402 00:43:51.996251 ==
2403 00:43:51.996304 3 1 0 |3534 303 |(11 11)(11 11) |(0 0)(0 0)| 0
2404 00:43:51.996357 3 1 4 |3534 2e2e |(11 11)(11 11) |(0 0)(0 0)| 0
2405 00:43:51.996411 3 1 8 |3534 2d2c |(11 11)(11 11) |(0 0)(1 1)| 0
2406 00:43:51.996465 3 1 12 |3534 3131 |(11 11)(11 11) |(0 0)(0 0)| 0
2407 00:43:51.996518 3 1 16 |3534 2d2c |(11 11)(11 11) |(1 1)(1 1)| 0
2408 00:43:51.996570 3 1 20 |3534 2d2c |(11 11)(11 11) |(1 1)(0 0)| 0
2409 00:43:51.996624 3 1 24 |3534 2c2c |(11 11)(11 11) |(0 1)(1 1)| 0
2410 00:43:51.996676 3 1 28 |3534 303 |(11 11)(11 11) |(0 1)(1 1)| 0
2411 00:43:51.996730 3 2 0 |3534 201f |(11 11)(11 11) |(0 1)(1 1)| 0
2412 00:43:51.996783 3 2 4 |3534 2d2d |(11 11)(11 11) |(0 1)(1 1)| 0
2413 00:43:51.996836 [Byte 1] Lead/lag falling Transition (3, 2, 4)
2414 00:43:51.996888 3 2 8 |3534 2f2f |(11 11)(11 11) |(0 1)(0 1)| 0
2415 00:43:51.996940 3 2 12 |3534 2726 |(11 11)(11 11) |(0 1)(1 0)| 0
2416 00:43:51.996993 3 2 16 |3534 1515 |(11 11)(11 11) |(0 1)(0 1)| 0
2417 00:43:51.997047 3 2 20 |201 2d2d |(11 11)(11 11) |(1 1)(1 0)| 0
2418 00:43:51.997100 3 2 24 |3838 1313 |(11 11)(11 11) |(1 1)(0 1)| 0
2419 00:43:51.997154 3 2 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2420 00:43:51.997206 [Byte 1] Lead/lag Transition tap number (1)
2421 00:43:51.997259 3 3 0 |3d3d 1212 |(11 11)(11 11) |(1 1)(0 0)| 0
2422 00:43:51.997312 3 3 4 |3d3d 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2423 00:43:51.997365 3 3 8 |3d3d 3737 |(11 11)(11 11) |(1 1)(0 0)| 0
2424 00:43:51.997419 3 3 12 |3d3d 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2425 00:43:51.997471 3 3 16 |3d3d 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
2426 00:43:51.997524 3 3 20 |3d3d 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
2427 00:43:51.997578 3 3 24 |202 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2428 00:43:51.997631 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2429 00:43:51.997684 [Byte 0] Lead/lag falling Transition (3, 3, 28)
2430 00:43:51.997737 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2431 00:43:51.997790 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2432 00:43:51.997842 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2433 00:43:51.997895 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2434 00:43:51.997948 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2435 00:43:51.998010 3 4 20 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2436 00:43:51.998063 3 4 24 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2437 00:43:51.998117 3 4 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2438 00:43:51.998170 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2439 00:43:51.998223 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2440 00:43:51.998276 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2441 00:43:51.998329 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2442 00:43:51.998397 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2443 00:43:52.000206 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2444 00:43:52.003726 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2445 00:43:52.010187 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2446 00:43:52.014031 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2447 00:43:52.017271 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2448 00:43:52.020228 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2449 00:43:52.027184 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2450 00:43:52.030958 [Byte 0] Lead/lag falling Transition (3, 6, 12)
2451 00:43:52.033973 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2452 00:43:52.040615 [Byte 0] Lead/lag Transition tap number (2)
2453 00:43:52.043801 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2454 00:43:52.047204 [Byte 1] Lead/lag Transition tap number (1)
2455 00:43:52.050672 3 6 24 |a0a 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2456 00:43:52.057453 3 6 28 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2457 00:43:52.057935 [Byte 0]First pass (3, 6, 28)
2458 00:43:52.063873 3 7 0 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
2459 00:43:52.067412 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2460 00:43:52.070388 [Byte 1]First pass (3, 7, 4)
2461 00:43:52.073494 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2462 00:43:52.077098 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2463 00:43:52.080752 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2464 00:43:52.084035 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2465 00:43:52.090421 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2466 00:43:52.093474 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2467 00:43:52.097076 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2468 00:43:52.100611 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2469 00:43:52.103715 All bytes gating window > 1UI, Early break!
2470 00:43:52.104268
2471 00:43:52.110367 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
2472 00:43:52.110880
2473 00:43:52.114058 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 22)
2474 00:43:52.114575
2475 00:43:52.114905
2476 00:43:52.115202
2477 00:43:52.117115 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2478 00:43:52.117500
2479 00:43:52.120642 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 22)
2480 00:43:52.121025
2481 00:43:52.121317
2482 00:43:52.123741 Write Rank0 MR1 =0x56
2483 00:43:52.124125
2484 00:43:52.126976 best RODT dly(2T, 0.5T) = (2, 3)
2485 00:43:52.127359
2486 00:43:52.130565 best RODT dly(2T, 0.5T) = (2, 3)
2487 00:43:52.131076 ==
2488 00:43:52.133865 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2489 00:43:52.137227 fsp= 1, odt_onoff= 1, Byte mode= 0
2490 00:43:52.137701 ==
2491 00:43:52.144164 Start DQ dly to find pass range UseTestEngine =0
2492 00:43:52.147299 x-axis: bit #, y-axis: DQ dly (-127~63)
2493 00:43:52.147807 RX Vref Scan = 0
2494 00:43:52.149946 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2495 00:43:52.153316 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2496 00:43:52.156568 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2497 00:43:52.160423 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2498 00:43:52.163735 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2499 00:43:52.164228 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2500 00:43:52.167620 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2501 00:43:52.170052 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2502 00:43:52.173367 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2503 00:43:52.176714 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2504 00:43:52.180219 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2505 00:43:52.183640 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2506 00:43:52.186664 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2507 00:43:52.190099 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2508 00:43:52.190597 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2509 00:43:52.193730 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2510 00:43:52.196820 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2511 00:43:52.199795 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2512 00:43:52.203474 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2513 00:43:52.206919 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2514 00:43:52.209849 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2515 00:43:52.210371 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2516 00:43:52.213517 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2517 00:43:52.216655 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2518 00:43:52.220103 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2519 00:43:52.223592 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2520 00:43:52.227257 0, [0] xxxxxxxx xxxxxxxo [MSB]
2521 00:43:52.230135 1, [0] xxxxxxxx xxxxxxxo [MSB]
2522 00:43:52.230549 2, [0] xxxxxxxx xxxxxxxo [MSB]
2523 00:43:52.233714 3, [0] xxxoxxxx xoxxxxxo [MSB]
2524 00:43:52.236100 4, [0] xxxoxxxx ooxxxxxo [MSB]
2525 00:43:52.239845 5, [0] xoooxxxo ooxxxxxo [MSB]
2526 00:43:52.242687 6, [0] xoooxxxo oooxxxxo [MSB]
2527 00:43:52.246090 7, [0] xooooxxo oooxxxoo [MSB]
2528 00:43:52.246509 8, [0] oooooxoo oooooooo [MSB]
2529 00:43:52.249800 31, [0] oooooooo ooooooox [MSB]
2530 00:43:52.252886 32, [0] oooooooo ooooooox [MSB]
2531 00:43:52.256553 33, [0] oooooooo ooooooox [MSB]
2532 00:43:52.259856 34, [0] oooooooo oxooooox [MSB]
2533 00:43:52.263159 35, [0] ooxxoooo xxooooox [MSB]
2534 00:43:52.266384 36, [0] ooxxoooo xxooooox [MSB]
2535 00:43:52.266790 37, [0] ooxxxooo xxxoooox [MSB]
2536 00:43:52.269701 38, [0] ooxxxooo xxxxoxxx [MSB]
2537 00:43:52.273296 39, [0] oxxxxoox xxxxxxxx [MSB]
2538 00:43:52.276155 40, [0] oxxxxxox xxxxxxxx [MSB]
2539 00:43:52.279647 41, [0] xxxxxxxx xxxxxxxx [MSB]
2540 00:43:52.282966 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2541 00:43:52.286335 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2542 00:43:52.289552 iDelay=41, Bit 2, Center 19 (5 ~ 34) 30
2543 00:43:52.293043 iDelay=41, Bit 3, Center 18 (3 ~ 34) 32
2544 00:43:52.296111 iDelay=41, Bit 4, Center 21 (7 ~ 36) 30
2545 00:43:52.299427 iDelay=41, Bit 5, Center 24 (9 ~ 39) 31
2546 00:43:52.302786 iDelay=41, Bit 6, Center 24 (8 ~ 40) 33
2547 00:43:52.306268 iDelay=41, Bit 7, Center 21 (5 ~ 38) 34
2548 00:43:52.309596 iDelay=41, Bit 8, Center 19 (4 ~ 34) 31
2549 00:43:52.312906 iDelay=41, Bit 9, Center 18 (3 ~ 33) 31
2550 00:43:52.319381 iDelay=41, Bit 10, Center 21 (6 ~ 36) 31
2551 00:43:52.322873 iDelay=41, Bit 11, Center 22 (8 ~ 37) 30
2552 00:43:52.326282 iDelay=41, Bit 12, Center 23 (8 ~ 38) 31
2553 00:43:52.329274 iDelay=41, Bit 13, Center 22 (8 ~ 37) 30
2554 00:43:52.333016 iDelay=41, Bit 14, Center 22 (7 ~ 37) 31
2555 00:43:52.336016 iDelay=41, Bit 15, Center 15 (0 ~ 30) 31
2556 00:43:52.336409 ==
2557 00:43:52.342718 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2558 00:43:52.343109 fsp= 1, odt_onoff= 1, Byte mode= 0
2559 00:43:52.346041 ==
2560 00:43:52.346425 DQS Delay:
2561 00:43:52.346733 DQS0 = 0, DQS1 = 0
2562 00:43:52.349942 DQM Delay:
2563 00:43:52.350362 DQM0 = 21, DQM1 = 20
2564 00:43:52.352924 DQ Delay:
2565 00:43:52.353313 DQ0 =24, DQ1 =21, DQ2 =19, DQ3 =18
2566 00:43:52.356151 DQ4 =21, DQ5 =24, DQ6 =24, DQ7 =21
2567 00:43:52.359373 DQ8 =19, DQ9 =18, DQ10 =21, DQ11 =22
2568 00:43:52.362815 DQ12 =23, DQ13 =22, DQ14 =22, DQ15 =15
2569 00:43:52.363201
2570 00:43:52.365853
2571 00:43:52.366297 DramC Write-DBI off
2572 00:43:52.366603 ==
2573 00:43:52.372997 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2574 00:43:52.376021 fsp= 1, odt_onoff= 1, Byte mode= 0
2575 00:43:52.376336 ==
2576 00:43:52.379012 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2577 00:43:52.379089
2578 00:43:52.382376 Begin, DQ Scan Range 928~1184
2579 00:43:52.382451
2580 00:43:52.382510
2581 00:43:52.385883 TX Vref Scan disable
2582 00:43:52.389081 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2583 00:43:52.392476 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2584 00:43:52.395851 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2585 00:43:52.399865 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2586 00:43:52.402712 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2587 00:43:52.406283 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2588 00:43:52.409528 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2589 00:43:52.412883 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2590 00:43:52.415990 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2591 00:43:52.419234 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2592 00:43:52.423002 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2593 00:43:52.426184 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2594 00:43:52.429083 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2595 00:43:52.432503 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2596 00:43:52.435873 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2597 00:43:52.442827 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2598 00:43:52.445976 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2599 00:43:52.449325 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2600 00:43:52.452537 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2601 00:43:52.456099 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2602 00:43:52.458916 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2603 00:43:52.462617 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2604 00:43:52.465413 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2605 00:43:52.468846 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2606 00:43:52.472284 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2607 00:43:52.475586 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2608 00:43:52.478836 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2609 00:43:52.482379 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2610 00:43:52.485509 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2611 00:43:52.488929 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2612 00:43:52.495373 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2613 00:43:52.498483 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2614 00:43:52.502088 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2615 00:43:52.505377 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2616 00:43:52.508599 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2617 00:43:52.512147 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2618 00:43:52.515248 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2619 00:43:52.518524 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2620 00:43:52.522035 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2621 00:43:52.525674 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2622 00:43:52.528866 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2623 00:43:52.532151 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2624 00:43:52.535354 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2625 00:43:52.538387 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2626 00:43:52.541674 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2627 00:43:52.544889 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2628 00:43:52.548748 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2629 00:43:52.551914 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2630 00:43:52.555155 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2631 00:43:52.561835 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2632 00:43:52.565315 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2633 00:43:52.568273 979 |3 6 19|[0] xxxxxxxx ooxxxxxo [MSB]
2634 00:43:52.571740 980 |3 6 20|[0] xxxxxxxx ooxxxxxo [MSB]
2635 00:43:52.574853 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2636 00:43:52.578325 982 |3 6 22|[0] xxxxxxxx oooxoxoo [MSB]
2637 00:43:52.581695 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
2638 00:43:52.585062 984 |3 6 24|[0] oooooxoo oooooooo [MSB]
2639 00:43:52.591808 995 |3 6 35|[0] oooooooo ooooooox [MSB]
2640 00:43:52.594989 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2641 00:43:52.598429 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2642 00:43:52.601546 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2643 00:43:52.604889 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2644 00:43:52.608425 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2645 00:43:52.611411 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2646 00:43:52.614871 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2647 00:43:52.617959 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2648 00:43:52.621791 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2649 00:43:52.625016 1005 |3 6 45|[0] oxxxoooo xxxxxxxx [MSB]
2650 00:43:52.628232 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2651 00:43:52.631149 Byte0, DQ PI dly=993, DQM PI dly= 993
2652 00:43:52.638123 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2653 00:43:52.638522
2654 00:43:52.641398 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2655 00:43:52.641790
2656 00:43:52.644788 Byte1, DQ PI dly=988, DQM PI dly= 988
2657 00:43:52.648115 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2658 00:43:52.652281
2659 00:43:52.654884 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2660 00:43:52.655278
2661 00:43:52.655582 ==
2662 00:43:52.658341 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2663 00:43:52.662018 fsp= 1, odt_onoff= 1, Byte mode= 0
2664 00:43:52.662423 ==
2665 00:43:52.668173 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2666 00:43:52.668637
2667 00:43:52.671155 Begin, DQ Scan Range 964~1028
2668 00:43:52.671539 Write Rank0 MR14 =0x0
2669 00:43:52.679669
2670 00:43:52.680057 CH=1, VrefRange= 0, VrefLevel = 0
2671 00:43:52.686254 TX Bit0 (986~1001) 16 993, Bit8 (982~993) 12 987,
2672 00:43:52.689724 TX Bit1 (985~999) 15 992, Bit9 (982~992) 11 987,
2673 00:43:52.696097 TX Bit2 (984~999) 16 991, Bit10 (984~995) 12 989,
2674 00:43:52.699772 TX Bit3 (982~994) 13 988, Bit11 (984~997) 14 990,
2675 00:43:52.702968 TX Bit4 (985~1000) 16 992, Bit12 (984~995) 12 989,
2676 00:43:52.710143 TX Bit5 (987~1000) 14 993, Bit13 (985~994) 10 989,
2677 00:43:52.712883 TX Bit6 (985~1000) 16 992, Bit14 (984~995) 12 989,
2678 00:43:52.719818 TX Bit7 (984~1000) 17 992, Bit15 (978~989) 12 983,
2679 00:43:52.720304
2680 00:43:52.720612 Write Rank0 MR14 =0x2
2681 00:43:52.727910
2682 00:43:52.728376 CH=1, VrefRange= 0, VrefLevel = 2
2683 00:43:52.734987 TX Bit0 (986~1001) 16 993, Bit8 (982~993) 12 987,
2684 00:43:52.737602 TX Bit1 (984~1000) 17 992, Bit9 (982~993) 12 987,
2685 00:43:52.744417 TX Bit2 (983~1000) 18 991, Bit10 (984~996) 13 990,
2686 00:43:52.748269 TX Bit3 (981~995) 15 988, Bit11 (984~998) 15 991,
2687 00:43:52.751436 TX Bit4 (984~1000) 17 992, Bit12 (984~996) 13 990,
2688 00:43:52.757759 TX Bit5 (986~1001) 16 993, Bit13 (985~995) 11 990,
2689 00:43:52.761352 TX Bit6 (985~1001) 17 993, Bit14 (984~996) 13 990,
2690 00:43:52.767716 TX Bit7 (985~1001) 17 993, Bit15 (978~990) 13 984,
2691 00:43:52.768184
2692 00:43:52.768485 Write Rank0 MR14 =0x4
2693 00:43:52.776593
2694 00:43:52.777116 CH=1, VrefRange= 0, VrefLevel = 4
2695 00:43:52.783188 TX Bit0 (986~1002) 17 994, Bit8 (981~993) 13 987,
2696 00:43:52.786509 TX Bit1 (984~1000) 17 992, Bit9 (981~993) 13 987,
2697 00:43:52.793091 TX Bit2 (983~1000) 18 991, Bit10 (984~996) 13 990,
2698 00:43:52.796733 TX Bit3 (980~995) 16 987, Bit11 (984~998) 15 991,
2699 00:43:52.799774 TX Bit4 (984~1001) 18 992, Bit12 (984~997) 14 990,
2700 00:43:52.806684 TX Bit5 (986~1001) 16 993, Bit13 (985~996) 12 990,
2701 00:43:52.809413 TX Bit6 (985~1001) 17 993, Bit14 (984~997) 14 990,
2702 00:43:52.815985 TX Bit7 (984~1001) 18 992, Bit15 (978~991) 14 984,
2703 00:43:52.816455
2704 00:43:52.816770 Write Rank0 MR14 =0x6
2705 00:43:52.825420
2706 00:43:52.825889 CH=1, VrefRange= 0, VrefLevel = 6
2707 00:43:52.831724 TX Bit0 (985~1003) 19 994, Bit8 (980~994) 15 987,
2708 00:43:52.835284 TX Bit1 (984~1001) 18 992, Bit9 (981~994) 14 987,
2709 00:43:52.842110 TX Bit2 (983~1001) 19 992, Bit10 (984~998) 15 991,
2710 00:43:52.845722 TX Bit3 (980~996) 17 988, Bit11 (984~999) 16 991,
2711 00:43:52.849189 TX Bit4 (984~1002) 19 993, Bit12 (984~998) 15 991,
2712 00:43:52.855203 TX Bit5 (986~1002) 17 994, Bit13 (985~997) 13 991,
2713 00:43:52.858739 TX Bit6 (985~1002) 18 993, Bit14 (983~998) 16 990,
2714 00:43:52.864755 TX Bit7 (984~1002) 19 993, Bit15 (976~991) 16 983,
2715 00:43:52.865248
2716 00:43:52.865583 Write Rank0 MR14 =0x8
2717 00:43:52.873871
2718 00:43:52.874351 CH=1, VrefRange= 0, VrefLevel = 8
2719 00:43:52.880538 TX Bit0 (985~1004) 20 994, Bit8 (981~995) 15 988,
2720 00:43:52.884162 TX Bit1 (984~1002) 19 993, Bit9 (980~994) 15 987,
2721 00:43:52.890704 TX Bit2 (982~1001) 20 991, Bit10 (983~999) 17 991,
2722 00:43:52.894351 TX Bit3 (979~997) 19 988, Bit11 (983~999) 17 991,
2723 00:43:52.897751 TX Bit4 (984~1003) 20 993, Bit12 (983~999) 17 991,
2724 00:43:52.904067 TX Bit5 (985~1003) 19 994, Bit13 (984~998) 15 991,
2725 00:43:52.907491 TX Bit6 (984~1003) 20 993, Bit14 (983~999) 17 991,
2726 00:43:52.914106 TX Bit7 (984~1002) 19 993, Bit15 (977~992) 16 984,
2727 00:43:52.914623
2728 00:43:52.914960 Write Rank0 MR14 =0xa
2729 00:43:52.923279
2730 00:43:52.926097 CH=1, VrefRange= 0, VrefLevel = 10
2731 00:43:52.929725 TX Bit0 (985~1004) 20 994, Bit8 (980~996) 17 988,
2732 00:43:52.933354 TX Bit1 (984~1002) 19 993, Bit9 (980~995) 16 987,
2733 00:43:52.939867 TX Bit2 (982~1002) 21 992, Bit10 (983~999) 17 991,
2734 00:43:52.943250 TX Bit3 (979~999) 21 989, Bit11 (983~1000) 18 991,
2735 00:43:52.946084 TX Bit4 (984~1003) 20 993, Bit12 (983~999) 17 991,
2736 00:43:52.953102 TX Bit5 (985~1004) 20 994, Bit13 (984~999) 16 991,
2737 00:43:52.956308 TX Bit6 (984~1003) 20 993, Bit14 (983~999) 17 991,
2738 00:43:52.962841 TX Bit7 (984~1003) 20 993, Bit15 (977~992) 16 984,
2739 00:43:52.963246
2740 00:43:52.963546 Write Rank0 MR14 =0xc
2741 00:43:52.972001
2742 00:43:52.975152 CH=1, VrefRange= 0, VrefLevel = 12
2743 00:43:52.978156 TX Bit0 (985~1006) 22 995, Bit8 (979~996) 18 987,
2744 00:43:52.981634 TX Bit1 (983~1003) 21 993, Bit9 (978~996) 19 987,
2745 00:43:52.988432 TX Bit2 (982~1003) 22 992, Bit10 (983~999) 17 991,
2746 00:43:52.991750 TX Bit3 (979~999) 21 989, Bit11 (983~1000) 18 991,
2747 00:43:52.995125 TX Bit4 (983~1004) 22 993, Bit12 (983~999) 17 991,
2748 00:43:53.001900 TX Bit5 (985~1004) 20 994, Bit13 (984~999) 16 991,
2749 00:43:53.005357 TX Bit6 (984~1004) 21 994, Bit14 (982~999) 18 990,
2750 00:43:53.011464 TX Bit7 (983~1004) 22 993, Bit15 (975~992) 18 983,
2751 00:43:53.011607
2752 00:43:53.011717 Write Rank0 MR14 =0xe
2753 00:43:53.021093
2754 00:43:53.024370 CH=1, VrefRange= 0, VrefLevel = 14
2755 00:43:53.028032 TX Bit0 (984~1006) 23 995, Bit8 (978~997) 20 987,
2756 00:43:53.031179 TX Bit1 (983~1003) 21 993, Bit9 (979~997) 19 988,
2757 00:43:53.038187 TX Bit2 (981~1003) 23 992, Bit10 (982~999) 18 990,
2758 00:43:53.041253 TX Bit3 (979~1000) 22 989, Bit11 (983~1000) 18 991,
2759 00:43:53.047850 TX Bit4 (982~1004) 23 993, Bit12 (983~1000) 18 991,
2760 00:43:53.051136 TX Bit5 (985~1005) 21 995, Bit13 (984~999) 16 991,
2761 00:43:53.054439 TX Bit6 (984~1004) 21 994, Bit14 (983~1000) 18 991,
2762 00:43:53.061356 TX Bit7 (983~1004) 22 993, Bit15 (975~993) 19 984,
2763 00:43:53.061786
2764 00:43:53.062228 Write Rank0 MR14 =0x10
2765 00:43:53.070952
2766 00:43:53.074586 CH=1, VrefRange= 0, VrefLevel = 16
2767 00:43:53.077938 TX Bit0 (984~1006) 23 995, Bit8 (978~998) 21 988,
2768 00:43:53.081100 TX Bit1 (983~1004) 22 993, Bit9 (978~998) 21 988,
2769 00:43:53.087618 TX Bit2 (981~1004) 24 992, Bit10 (983~1000) 18 991,
2770 00:43:53.091059 TX Bit3 (978~1000) 23 989, Bit11 (982~1000) 19 991,
2771 00:43:53.097826 TX Bit4 (983~1005) 23 994, Bit12 (983~1000) 18 991,
2772 00:43:53.100984 TX Bit5 (985~1006) 22 995, Bit13 (983~999) 17 991,
2773 00:43:53.104534 TX Bit6 (983~1005) 23 994, Bit14 (982~1000) 19 991,
2774 00:43:53.110872 TX Bit7 (983~1005) 23 994, Bit15 (975~993) 19 984,
2775 00:43:53.111265
2776 00:43:53.111570 Write Rank0 MR14 =0x12
2777 00:43:53.120780
2778 00:43:53.124235 CH=1, VrefRange= 0, VrefLevel = 18
2779 00:43:53.127759 TX Bit0 (984~1006) 23 995, Bit8 (978~998) 21 988,
2780 00:43:53.130914 TX Bit1 (983~1005) 23 994, Bit9 (977~997) 21 987,
2781 00:43:53.136868 TX Bit2 (981~1004) 24 992, Bit10 (982~1000) 19 991,
2782 00:43:53.140826 TX Bit3 (978~1001) 24 989, Bit11 (982~1001) 20 991,
2783 00:43:53.147161 TX Bit4 (982~1006) 25 994, Bit12 (982~1000) 19 991,
2784 00:43:53.150705 TX Bit5 (984~1006) 23 995, Bit13 (983~1000) 18 991,
2785 00:43:53.153811 TX Bit6 (983~1006) 24 994, Bit14 (982~1000) 19 991,
2786 00:43:53.160399 TX Bit7 (982~1006) 25 994, Bit15 (974~994) 21 984,
2787 00:43:53.160570
2788 00:43:53.160675 Write Rank0 MR14 =0x14
2789 00:43:53.170449
2790 00:43:53.174030 CH=1, VrefRange= 0, VrefLevel = 20
2791 00:43:53.177061 TX Bit0 (984~1007) 24 995, Bit8 (977~999) 23 988,
2792 00:43:53.181133 TX Bit1 (982~1005) 24 993, Bit9 (978~998) 21 988,
2793 00:43:53.186988 TX Bit2 (981~1005) 25 993, Bit10 (981~1000) 20 990,
2794 00:43:53.190581 TX Bit3 (978~1001) 24 989, Bit11 (982~1001) 20 991,
2795 00:43:53.197433 TX Bit4 (982~1006) 25 994, Bit12 (982~1001) 20 991,
2796 00:43:53.200448 TX Bit5 (984~1006) 23 995, Bit13 (983~1000) 18 991,
2797 00:43:53.204223 TX Bit6 (983~1006) 24 994, Bit14 (981~1001) 21 991,
2798 00:43:53.210524 TX Bit7 (982~1006) 25 994, Bit15 (975~994) 20 984,
2799 00:43:53.210919
2800 00:43:53.213465 Write Rank0 MR14 =0x16
2801 00:43:53.220911
2802 00:43:53.224254 CH=1, VrefRange= 0, VrefLevel = 22
2803 00:43:53.227678 TX Bit0 (984~1007) 24 995, Bit8 (977~999) 23 988,
2804 00:43:53.231197 TX Bit1 (982~1006) 25 994, Bit9 (977~999) 23 988,
2805 00:43:53.237618 TX Bit2 (980~1006) 27 993, Bit10 (981~1001) 21 991,
2806 00:43:53.240725 TX Bit3 (978~1001) 24 989, Bit11 (982~1002) 21 992,
2807 00:43:53.247157 TX Bit4 (981~1006) 26 993, Bit12 (982~1001) 20 991,
2808 00:43:53.251460 TX Bit5 (984~1006) 23 995, Bit13 (983~1001) 19 992,
2809 00:43:53.254351 TX Bit6 (983~1006) 24 994, Bit14 (981~1001) 21 991,
2810 00:43:53.261075 TX Bit7 (981~1006) 26 993, Bit15 (973~995) 23 984,
2811 00:43:53.261467
2812 00:43:53.261770 Write Rank0 MR14 =0x18
2813 00:43:53.270839
2814 00:43:53.274043 CH=1, VrefRange= 0, VrefLevel = 24
2815 00:43:53.277656 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2816 00:43:53.280860 TX Bit1 (981~1006) 26 993, Bit9 (977~999) 23 988,
2817 00:43:53.287550 TX Bit2 (979~1006) 28 992, Bit10 (980~1001) 22 990,
2818 00:43:53.290598 TX Bit3 (978~1002) 25 990, Bit11 (981~1002) 22 991,
2819 00:43:53.297520 TX Bit4 (981~1007) 27 994, Bit12 (981~1001) 21 991,
2820 00:43:53.300690 TX Bit5 (984~1007) 24 995, Bit13 (982~1001) 20 991,
2821 00:43:53.304351 TX Bit6 (982~1007) 26 994, Bit14 (980~1001) 22 990,
2822 00:43:53.310853 TX Bit7 (981~1007) 27 994, Bit15 (973~995) 23 984,
2823 00:43:53.311257
2824 00:43:53.311657 Write Rank0 MR14 =0x1a
2825 00:43:53.320897
2826 00:43:53.324189 CH=1, VrefRange= 0, VrefLevel = 26
2827 00:43:53.327799 TX Bit0 (983~1007) 25 995, Bit8 (976~1000) 25 988,
2828 00:43:53.330825 TX Bit1 (981~1006) 26 993, Bit9 (976~999) 24 987,
2829 00:43:53.337822 TX Bit2 (979~1006) 28 992, Bit10 (981~1001) 21 991,
2830 00:43:53.340822 TX Bit3 (978~1002) 25 990, Bit11 (981~1002) 22 991,
2831 00:43:53.347414 TX Bit4 (980~1007) 28 993, Bit12 (980~1002) 23 991,
2832 00:43:53.351017 TX Bit5 (983~1007) 25 995, Bit13 (982~1001) 20 991,
2833 00:43:53.353969 TX Bit6 (982~1007) 26 994, Bit14 (979~1001) 23 990,
2834 00:43:53.360855 TX Bit7 (981~1007) 27 994, Bit15 (973~997) 25 985,
2835 00:43:53.361260
2836 00:43:53.361658 Write Rank0 MR14 =0x1c
2837 00:43:53.371232
2838 00:43:53.374013 CH=1, VrefRange= 0, VrefLevel = 28
2839 00:43:53.377822 TX Bit0 (983~1007) 25 995, Bit8 (976~1000) 25 988,
2840 00:43:53.380936 TX Bit1 (980~1006) 27 993, Bit9 (976~999) 24 987,
2841 00:43:53.387902 TX Bit2 (979~1006) 28 992, Bit10 (979~1001) 23 990,
2842 00:43:53.390871 TX Bit3 (977~1003) 27 990, Bit11 (981~1002) 22 991,
2843 00:43:53.397812 TX Bit4 (980~1007) 28 993, Bit12 (980~1002) 23 991,
2844 00:43:53.401267 TX Bit5 (983~1007) 25 995, Bit13 (982~1001) 20 991,
2845 00:43:53.404504 TX Bit6 (982~1007) 26 994, Bit14 (979~1002) 24 990,
2846 00:43:53.411298 TX Bit7 (980~1007) 28 993, Bit15 (972~997) 26 984,
2847 00:43:53.411806
2848 00:43:53.412143 Write Rank0 MR14 =0x1e
2849 00:43:53.421680
2850 00:43:53.424977 CH=1, VrefRange= 0, VrefLevel = 30
2851 00:43:53.427710 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2852 00:43:53.431897 TX Bit1 (980~1007) 28 993, Bit9 (976~999) 24 987,
2853 00:43:53.437773 TX Bit2 (980~1006) 27 993, Bit10 (979~1002) 24 990,
2854 00:43:53.441287 TX Bit3 (977~1003) 27 990, Bit11 (980~1002) 23 991,
2855 00:43:53.448144 TX Bit4 (981~1007) 27 994, Bit12 (981~1001) 21 991,
2856 00:43:53.451445 TX Bit5 (983~1007) 25 995, Bit13 (982~1002) 21 992,
2857 00:43:53.454735 TX Bit6 (981~1007) 27 994, Bit14 (979~1001) 23 990,
2858 00:43:53.461356 TX Bit7 (980~1007) 28 993, Bit15 (971~998) 28 984,
2859 00:43:53.461866
2860 00:43:53.462264 Write Rank0 MR14 =0x20
2861 00:43:53.471920
2862 00:43:53.474672 CH=1, VrefRange= 0, VrefLevel = 32
2863 00:43:53.478137 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2864 00:43:53.481793 TX Bit1 (980~1007) 28 993, Bit9 (976~999) 24 987,
2865 00:43:53.488238 TX Bit2 (980~1006) 27 993, Bit10 (979~1002) 24 990,
2866 00:43:53.491302 TX Bit3 (977~1003) 27 990, Bit11 (980~1002) 23 991,
2867 00:43:53.498355 TX Bit4 (981~1007) 27 994, Bit12 (981~1001) 21 991,
2868 00:43:53.501878 TX Bit5 (983~1007) 25 995, Bit13 (982~1002) 21 992,
2869 00:43:53.504715 TX Bit6 (981~1007) 27 994, Bit14 (979~1001) 23 990,
2870 00:43:53.511569 TX Bit7 (980~1007) 28 993, Bit15 (971~998) 28 984,
2871 00:43:53.512082
2872 00:43:53.512415 Write Rank0 MR14 =0x22
2873 00:43:53.521889
2874 00:43:53.525334 CH=1, VrefRange= 0, VrefLevel = 34
2875 00:43:53.528386 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2876 00:43:53.531638 TX Bit1 (980~1007) 28 993, Bit9 (976~999) 24 987,
2877 00:43:53.538203 TX Bit2 (980~1006) 27 993, Bit10 (979~1002) 24 990,
2878 00:43:53.541976 TX Bit3 (977~1003) 27 990, Bit11 (980~1002) 23 991,
2879 00:43:53.548110 TX Bit4 (981~1007) 27 994, Bit12 (981~1001) 21 991,
2880 00:43:53.551864 TX Bit5 (983~1007) 25 995, Bit13 (982~1002) 21 992,
2881 00:43:53.555227 TX Bit6 (981~1007) 27 994, Bit14 (979~1001) 23 990,
2882 00:43:53.561437 TX Bit7 (980~1007) 28 993, Bit15 (971~998) 28 984,
2883 00:43:53.562065
2884 00:43:53.564922 wait MRW command Rank0 MR14 =0x24 fired (1)
2885 00:43:53.568368 Write Rank0 MR14 =0x24
2886 00:43:53.575279
2887 00:43:53.578810 CH=1, VrefRange= 0, VrefLevel = 36
2888 00:43:53.581962 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
2889 00:43:53.585396 TX Bit1 (980~1007) 28 993, Bit9 (976~999) 24 987,
2890 00:43:53.591678 TX Bit2 (980~1006) 27 993, Bit10 (979~1002) 24 990,
2891 00:43:53.595000 TX Bit3 (977~1003) 27 990, Bit11 (980~1002) 23 991,
2892 00:43:53.601906 TX Bit4 (981~1007) 27 994, Bit12 (981~1001) 21 991,
2893 00:43:53.605614 TX Bit5 (983~1007) 25 995, Bit13 (982~1002) 21 992,
2894 00:43:53.608585 TX Bit6 (981~1007) 27 994, Bit14 (979~1001) 23 990,
2895 00:43:53.615293 TX Bit7 (980~1007) 28 993, Bit15 (971~998) 28 984,
2896 00:43:53.615803
2897 00:43:53.616132
2898 00:43:53.618400 TX Vref found, early break! 376< 381
2899 00:43:53.622088 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
2900 00:43:53.625283 u1DelayCellOfst[0]=5 cells (5 PI)
2901 00:43:53.629021 u1DelayCellOfst[1]=3 cells (3 PI)
2902 00:43:53.632018 u1DelayCellOfst[2]=3 cells (3 PI)
2903 00:43:53.635677 u1DelayCellOfst[3]=0 cells (0 PI)
2904 00:43:53.638678 u1DelayCellOfst[4]=4 cells (4 PI)
2905 00:43:53.642125 u1DelayCellOfst[5]=5 cells (5 PI)
2906 00:43:53.645407 u1DelayCellOfst[6]=4 cells (4 PI)
2907 00:43:53.648423 u1DelayCellOfst[7]=3 cells (3 PI)
2908 00:43:53.652156 Byte0, DQ PI dly=990, DQM PI dly= 992
2909 00:43:53.655129 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2910 00:43:53.655630
2911 00:43:53.658427 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2912 00:43:53.658951
2913 00:43:53.661495 u1DelayCellOfst[8]=3 cells (3 PI)
2914 00:43:53.665144 u1DelayCellOfst[9]=3 cells (3 PI)
2915 00:43:53.668223 u1DelayCellOfst[10]=6 cells (6 PI)
2916 00:43:53.672182 u1DelayCellOfst[11]=8 cells (7 PI)
2917 00:43:53.675397 u1DelayCellOfst[12]=8 cells (7 PI)
2918 00:43:53.678595 u1DelayCellOfst[13]=9 cells (8 PI)
2919 00:43:53.682436 u1DelayCellOfst[14]=6 cells (6 PI)
2920 00:43:53.684874 u1DelayCellOfst[15]=0 cells (0 PI)
2921 00:43:53.687987 Byte1, DQ PI dly=984, DQM PI dly= 988
2922 00:43:53.691424 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2923 00:43:53.691813
2924 00:43:53.694592 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2925 00:43:53.694980
2926 00:43:53.697948 Write Rank0 MR14 =0x1e
2927 00:43:53.698372
2928 00:43:53.701421 Final TX Range 0 Vref 30
2929 00:43:53.701807
2930 00:43:53.708194 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2931 00:43:53.708605
2932 00:43:53.714883 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2933 00:43:53.721490 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2934 00:43:53.728039 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2935 00:43:53.731635 Write Rank0 MR3 =0xb0
2936 00:43:53.732021 DramC Write-DBI on
2937 00:43:53.732322 ==
2938 00:43:53.737977 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2939 00:43:53.741362 fsp= 1, odt_onoff= 1, Byte mode= 0
2940 00:43:53.741776 ==
2941 00:43:53.744705 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2942 00:43:53.745092
2943 00:43:53.748236 Begin, DQ Scan Range 708~772
2944 00:43:53.748620
2945 00:43:53.748915
2946 00:43:53.751425 TX Vref Scan disable
2947 00:43:53.754410 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2948 00:43:53.758092 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2949 00:43:53.761483 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2950 00:43:53.764997 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2951 00:43:53.768157 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2952 00:43:53.771179 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2953 00:43:53.774791 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2954 00:43:53.777606 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2955 00:43:53.781066 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2956 00:43:53.784941 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2957 00:43:53.787449 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2958 00:43:53.790770 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2959 00:43:53.794206 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2960 00:43:53.797953 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2961 00:43:53.802589 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2962 00:43:53.804287 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2963 00:43:53.811150 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2964 00:43:53.814465 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2965 00:43:53.818072 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2966 00:43:53.824066 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2967 00:43:53.827648 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2968 00:43:53.830686 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2969 00:43:53.834021 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2970 00:43:53.837570 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2971 00:43:53.841233 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2972 00:43:53.844465 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2973 00:43:53.847617 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2974 00:43:53.850670 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
2975 00:43:53.854686 Byte0, DQ PI dly=739, DQM PI dly= 739
2976 00:43:53.857506 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
2977 00:43:53.858009
2978 00:43:53.863788 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
2979 00:43:53.864195
2980 00:43:53.867181 Byte1, DQ PI dly=732, DQM PI dly= 732
2981 00:43:53.870962 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
2982 00:43:53.871449
2983 00:43:53.874633 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
2984 00:43:53.877757
2985 00:43:53.880954 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2986 00:43:53.891019 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2987 00:43:53.897346 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2988 00:43:53.897864 Write Rank0 MR3 =0x30
2989 00:43:53.900668 DramC Write-DBI off
2990 00:43:53.901097
2991 00:43:53.901430 [DATLAT]
2992 00:43:53.903965 Freq=1600, CH1 RK0, use_rxtx_scan=0
2993 00:43:53.904356
2994 00:43:53.906965 DATLAT Default: 0xf
2995 00:43:53.907402 7, 0xFFFF, sum=0
2996 00:43:53.911495 8, 0xFFFF, sum=0
2997 00:43:53.911981 9, 0xFFFF, sum=0
2998 00:43:53.914100 10, 0xFFFF, sum=0
2999 00:43:53.914605 11, 0xFFFF, sum=0
3000 00:43:53.917956 12, 0xFFFF, sum=0
3001 00:43:53.918483 13, 0xFFFF, sum=0
3002 00:43:53.921246 14, 0x0, sum=1
3003 00:43:53.921730 15, 0x0, sum=2
3004 00:43:53.922085 16, 0x0, sum=3
3005 00:43:53.924553 17, 0x0, sum=4
3006 00:43:53.927128 pattern=2 first_step=14 total pass=5 best_step=16
3007 00:43:53.927522 ==
3008 00:43:53.934074 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3009 00:43:53.937522 fsp= 1, odt_onoff= 1, Byte mode= 0
3010 00:43:53.938203 ==
3011 00:43:53.941023 Start DQ dly to find pass range UseTestEngine =1
3012 00:43:53.944160 x-axis: bit #, y-axis: DQ dly (-127~63)
3013 00:43:53.944675 RX Vref Scan = 1
3014 00:43:54.060413
3015 00:43:54.060860 RX Vref found, early break!
3016 00:43:54.061161
3017 00:43:54.066953 Final RX Vref 12, apply to both rank0 and 1
3018 00:43:54.067344 ==
3019 00:43:54.070040 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3020 00:43:54.073751 fsp= 1, odt_onoff= 1, Byte mode= 0
3021 00:43:54.074176 ==
3022 00:43:54.074480 DQS Delay:
3023 00:43:54.076641 DQS0 = 0, DQS1 = 0
3024 00:43:54.077024 DQM Delay:
3025 00:43:54.079940 DQM0 = 21, DQM1 = 19
3026 00:43:54.080415 DQ Delay:
3027 00:43:54.083392 DQ0 =23, DQ1 =21, DQ2 =20, DQ3 =18
3028 00:43:54.086792 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =23
3029 00:43:54.090242 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =21
3030 00:43:54.093319 DQ12 =22, DQ13 =22, DQ14 =21, DQ15 =16
3031 00:43:54.093795
3032 00:43:54.094150
3033 00:43:54.094435
3034 00:43:54.096527 [DramC_TX_OE_Calibration] TA2
3035 00:43:54.100143 Original DQ_B0 (3 6) =30, OEN = 27
3036 00:43:54.103167 Original DQ_B1 (3 6) =30, OEN = 27
3037 00:43:54.106374 23, 0x0, End_B0=23 End_B1=23
3038 00:43:54.110213 24, 0x0, End_B0=24 End_B1=24
3039 00:43:54.110615 25, 0x0, End_B0=25 End_B1=25
3040 00:43:54.113347 26, 0x0, End_B0=26 End_B1=26
3041 00:43:54.117029 27, 0x0, End_B0=27 End_B1=27
3042 00:43:54.119670 28, 0x0, End_B0=28 End_B1=28
3043 00:43:54.120068 29, 0x0, End_B0=29 End_B1=29
3044 00:43:54.123449 30, 0x0, End_B0=30 End_B1=30
3045 00:43:54.126880 31, 0xFFFF, End_B0=30 End_B1=30
3046 00:43:54.133500 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3047 00:43:54.136636 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3048 00:43:54.137116
3049 00:43:54.137466
3050 00:43:54.139791 Write Rank0 MR23 =0x3f
3051 00:43:54.140178 [DQSOSC]
3052 00:43:54.149755 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3053 00:43:54.155852 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3054 00:43:54.156247 Write Rank0 MR23 =0x3f
3055 00:43:54.159489 [DQSOSC]
3056 00:43:54.166205 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3057 00:43:54.169900 CH1 RK0: MR19=202, MR18=BDBD
3058 00:43:54.172792 [RankSwap] Rank num 2, (Multi 1), Rank 1
3059 00:43:54.173256 Write Rank0 MR2 =0xad
3060 00:43:54.175964 [Write Leveling]
3061 00:43:54.179411 delay byte0 byte1 byte2 byte3
3062 00:43:54.179881
3063 00:43:54.180189 10 0 0
3064 00:43:54.182734 11 0 0
3065 00:43:54.183217 12 0 0
3066 00:43:54.187337 13 0 0
3067 00:43:54.187775 14 0 0
3068 00:43:54.188084 15 0 0
3069 00:43:54.189969 16 0 0
3070 00:43:54.190567 17 0 0
3071 00:43:54.192679 18 0 0
3072 00:43:54.193070 19 0 0
3073 00:43:54.193374 20 0 0
3074 00:43:54.195729 21 0 0
3075 00:43:54.196121 22 0 0
3076 00:43:54.199277 23 0 0
3077 00:43:54.199668 24 0 0
3078 00:43:54.202396 25 0 0
3079 00:43:54.202789 26 0 0
3080 00:43:54.203092 27 0 0
3081 00:43:54.205729 28 0 0
3082 00:43:54.206157 29 0 0
3083 00:43:54.209068 30 0 0
3084 00:43:54.209457 31 0 0
3085 00:43:54.212762 32 0 ff
3086 00:43:54.213255 33 0 ff
3087 00:43:54.213569 34 0 ff
3088 00:43:54.215354 35 0 ff
3089 00:43:54.215750 36 0 ff
3090 00:43:54.219578 37 ff ff
3091 00:43:54.220059 38 ff ff
3092 00:43:54.222079 39 ff ff
3093 00:43:54.222475 40 ff ff
3094 00:43:54.225508 41 ff ff
3095 00:43:54.225977 42 ff ff
3096 00:43:54.228898 43 ff ff
3097 00:43:54.232227 pass bytecount = 0xff (0xff: all bytes pass)
3098 00:43:54.232667
3099 00:43:54.232967 DQS0 dly: 37
3100 00:43:54.235247 DQS1 dly: 32
3101 00:43:54.235631 Write Rank0 MR2 =0x2d
3102 00:43:54.238564 [RankSwap] Rank num 2, (Multi 1), Rank 0
3103 00:43:54.242569 Write Rank1 MR1 =0xd6
3104 00:43:54.243055 [Gating]
3105 00:43:54.243359 ==
3106 00:43:54.248947 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3107 00:43:54.251713 fsp= 1, odt_onoff= 1, Byte mode= 0
3108 00:43:54.252167 ==
3109 00:43:54.254970 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
3110 00:43:54.259157 3 1 4 |3534 2e2d |(11 11)(11 11) |(0 0)(1 1)| 0
3111 00:43:54.265612 3 1 8 |3534 2d2c |(11 11)(11 11) |(1 1)(1 1)| 0
3112 00:43:54.269063 3 1 12 |3534 2727 |(11 11)(11 11) |(1 1)(0 0)| 0
3113 00:43:54.272044 3 1 16 |3534 2c2c |(11 11)(11 11) |(0 1)(1 0)| 0
3114 00:43:54.278717 3 1 20 |3534 2d2c |(11 11)(11 11) |(0 1)(1 1)| 0
3115 00:43:54.281917 3 1 24 |3534 2e2e |(11 11)(10 10) |(0 1)(1 1)| 0
3116 00:43:54.285423 3 1 28 |3534 2c2c |(11 11)(0 0) |(0 1)(1 0)| 0
3117 00:43:54.291851 3 2 0 |3534 1212 |(11 11)(11 11) |(0 1)(0 1)| 0
3118 00:43:54.295543 3 2 4 |3534 2c2c |(11 11)(11 11) |(0 1)(1 0)| 0
3119 00:43:54.299127 3 2 8 |3534 2d2c |(11 11)(11 11) |(0 1)(1 0)| 0
3120 00:43:54.301546 3 2 12 |807 707 |(11 11)(11 11) |(1 1)(1 0)| 0
3121 00:43:54.308354 3 2 16 |1111 2d2c |(11 11)(11 11) |(1 1)(1 0)| 0
3122 00:43:54.311356 3 2 20 |3d3d 1413 |(11 11)(11 11) |(1 1)(1 1)| 0
3123 00:43:54.314755 3 2 24 |3d3d 303 |(11 11)(11 11) |(1 1)(1 1)| 0
3124 00:43:54.321750 3 2 28 |3d3d 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3125 00:43:54.324874 3 3 0 |3d3d 3535 |(11 11)(0 0) |(1 1)(1 1)| 0
3126 00:43:54.328394 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3127 00:43:54.332229 [Byte 1] Lead/lag Transition tap number (1)
3128 00:43:54.338270 3 3 8 |3d3d 3535 |(11 11)(10 10) |(1 1)(0 0)| 0
3129 00:43:54.341812 3 3 12 |3d3d 3535 |(11 11)(0 0) |(1 1)(0 0)| 0
3130 00:43:54.344547 3 3 16 |202 3535 |(11 11)(0 0) |(1 1)(0 0)| 0
3131 00:43:54.351388 [Byte 0] Lead/lag falling Transition (3, 3, 16)
3132 00:43:54.354852 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3133 00:43:54.358597 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3134 00:43:54.361676 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3135 00:43:54.368264 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3136 00:43:54.371229 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3137 00:43:54.374983 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3138 00:43:54.381808 3 4 12 |b0a 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3139 00:43:54.385408 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3140 00:43:54.388256 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3141 00:43:54.395207 3 4 24 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
3142 00:43:54.398103 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3143 00:43:54.401637 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 00:43:54.404885 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 00:43:54.411744 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 00:43:54.414749 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 00:43:54.418077 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 00:43:54.424820 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 00:43:54.428219 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 00:43:54.431395 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 00:43:54.438090 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 00:43:54.441471 [Byte 0] Lead/lag falling Transition (3, 6, 0)
3153 00:43:54.444943 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3154 00:43:54.451080 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3155 00:43:54.455029 [Byte 0] Lead/lag Transition tap number (3)
3156 00:43:54.458483 [Byte 1] Lead/lag falling Transition (3, 6, 8)
3157 00:43:54.461183 3 6 12 |1010 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3158 00:43:54.464647 [Byte 1] Lead/lag Transition tap number (2)
3159 00:43:54.471664 3 6 16 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
3160 00:43:54.472105 [Byte 0]First pass (3, 6, 16)
3161 00:43:54.478159 3 6 20 |4646 1010 |(0 0)(11 11) |(0 0)(0 0)| 0
3162 00:43:54.481586 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3163 00:43:54.484662 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3164 00:43:54.488353 [Byte 1]First pass (3, 6, 28)
3165 00:43:54.491616 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3166 00:43:54.494803 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 00:43:54.501933 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3168 00:43:54.504571 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 00:43:54.508344 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 00:43:54.511390 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 00:43:54.514894 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 00:43:54.521637 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 00:43:54.524670 All bytes gating window > 1UI, Early break!
3174 00:43:54.525130
3175 00:43:54.527785 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
3176 00:43:54.528177
3177 00:43:54.531237 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
3178 00:43:54.531627
3179 00:43:54.531928
3180 00:43:54.532204
3181 00:43:54.534394 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3182 00:43:54.534783
3183 00:43:54.541141 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3184 00:43:54.541741
3185 00:43:54.542129
3186 00:43:54.542424 Write Rank1 MR1 =0x56
3187 00:43:54.542698
3188 00:43:54.544974 best RODT dly(2T, 0.5T) = (2, 3)
3189 00:43:54.545445
3190 00:43:54.548025 best RODT dly(2T, 0.5T) = (2, 3)
3191 00:43:54.548536 ==
3192 00:43:54.554423 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3193 00:43:54.558134 fsp= 1, odt_onoff= 1, Byte mode= 0
3194 00:43:54.558616 ==
3195 00:43:54.561072 Start DQ dly to find pass range UseTestEngine =0
3196 00:43:54.564939 x-axis: bit #, y-axis: DQ dly (-127~63)
3197 00:43:54.567998 RX Vref Scan = 0
3198 00:43:54.568394 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3199 00:43:54.571190 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3200 00:43:54.574292 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3201 00:43:54.578177 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3202 00:43:54.581280 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3203 00:43:54.584641 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3204 00:43:54.587812 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3205 00:43:54.591055 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3206 00:43:54.594322 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3207 00:43:54.594723 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3208 00:43:54.597767 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3209 00:43:54.601139 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3210 00:43:54.604983 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3211 00:43:54.607562 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3212 00:43:54.610945 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3213 00:43:54.614352 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3214 00:43:54.617642 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3215 00:43:54.618064 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3216 00:43:54.621114 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3217 00:43:54.624907 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3218 00:43:54.627836 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3219 00:43:54.631181 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3220 00:43:54.634539 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3221 00:43:54.638108 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3222 00:43:54.638588 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3223 00:43:54.641309 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3224 00:43:54.644961 0, [0] xxxxxxxx xxxxxxxx [MSB]
3225 00:43:54.648018 1, [0] xxxxxxxx xoxxxxxo [MSB]
3226 00:43:54.651279 2, [0] xxxoxxxx xoxxxxxo [MSB]
3227 00:43:54.654179 3, [0] xxxoxxxx ooxxxxxo [MSB]
3228 00:43:54.654582 4, [0] xxooxxxx oooxxxxo [MSB]
3229 00:43:54.658046 5, [0] xxooxxxx oooxxxxo [MSB]
3230 00:43:54.661386 6, [0] xxoooxxx oooooxoo [MSB]
3231 00:43:54.664033 7, [0] xooooxxo oooooooo [MSB]
3232 00:43:54.667790 8, [0] ooooooxo oooooooo [MSB]
3233 00:43:54.670692 31, [0] oooooooo ooooooox [MSB]
3234 00:43:54.671092 32, [0] oooooooo ooooooox [MSB]
3235 00:43:54.674680 33, [0] oooooooo ooooooox [MSB]
3236 00:43:54.677874 34, [0] oooooooo oxooooox [MSB]
3237 00:43:54.680606 35, [0] oooooooo xxooooox [MSB]
3238 00:43:54.684343 36, [0] ooxxoooo xxooooox [MSB]
3239 00:43:54.687322 37, [0] ooxxoooo xxooooox [MSB]
3240 00:43:54.691098 38, [0] ooxxxooo xxxoooox [MSB]
3241 00:43:54.691765 39, [0] ooxxxoox xxxxxxxx [MSB]
3242 00:43:54.694489 40, [0] oxxxxoox xxxxxxxx [MSB]
3243 00:43:54.697166 41, [0] xxxxxxox xxxxxxxx [MSB]
3244 00:43:54.701163 42, [0] xxxxxxxx xxxxxxxx [MSB]
3245 00:43:54.703997 iDelay=42, Bit 0, Center 24 (8 ~ 40) 33
3246 00:43:54.707422 iDelay=42, Bit 1, Center 23 (7 ~ 39) 33
3247 00:43:54.711053 iDelay=42, Bit 2, Center 19 (4 ~ 35) 32
3248 00:43:54.714299 iDelay=42, Bit 3, Center 18 (2 ~ 35) 34
3249 00:43:54.717727 iDelay=42, Bit 4, Center 21 (6 ~ 37) 32
3250 00:43:54.721120 iDelay=42, Bit 5, Center 24 (8 ~ 40) 33
3251 00:43:54.724051 iDelay=42, Bit 6, Center 25 (9 ~ 41) 33
3252 00:43:54.730518 iDelay=42, Bit 7, Center 22 (7 ~ 38) 32
3253 00:43:54.733745 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
3254 00:43:54.737398 iDelay=42, Bit 9, Center 17 (1 ~ 33) 33
3255 00:43:54.741065 iDelay=42, Bit 10, Center 20 (4 ~ 37) 34
3256 00:43:54.744200 iDelay=42, Bit 11, Center 22 (6 ~ 38) 33
3257 00:43:54.747267 iDelay=42, Bit 12, Center 22 (6 ~ 38) 33
3258 00:43:54.750948 iDelay=42, Bit 13, Center 22 (7 ~ 38) 32
3259 00:43:54.753677 iDelay=42, Bit 14, Center 22 (6 ~ 38) 33
3260 00:43:54.756865 iDelay=42, Bit 15, Center 15 (1 ~ 30) 30
3261 00:43:54.757328 ==
3262 00:43:54.764540 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3263 00:43:54.767337 fsp= 1, odt_onoff= 1, Byte mode= 0
3264 00:43:54.767808 ==
3265 00:43:54.768112 DQS Delay:
3266 00:43:54.770579 DQS0 = 0, DQS1 = 0
3267 00:43:54.771048 DQM Delay:
3268 00:43:54.773318 DQM0 = 22, DQM1 = 19
3269 00:43:54.773822 DQ Delay:
3270 00:43:54.776507 DQ0 =24, DQ1 =23, DQ2 =19, DQ3 =18
3271 00:43:54.780341 DQ4 =21, DQ5 =24, DQ6 =25, DQ7 =22
3272 00:43:54.783537 DQ8 =18, DQ9 =17, DQ10 =20, DQ11 =22
3273 00:43:54.786871 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
3274 00:43:54.787268
3275 00:43:54.787572
3276 00:43:54.787850 DramC Write-DBI off
3277 00:43:54.790142 ==
3278 00:43:54.793937 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3279 00:43:54.796695 fsp= 1, odt_onoff= 1, Byte mode= 0
3280 00:43:54.797095 ==
3281 00:43:54.800273 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3282 00:43:54.800669
3283 00:43:54.803464 Begin, DQ Scan Range 928~1184
3284 00:43:54.803858
3285 00:43:54.804304
3286 00:43:54.806837 TX Vref Scan disable
3287 00:43:54.810271 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3288 00:43:54.813587 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3289 00:43:54.817191 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3290 00:43:54.820224 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3291 00:43:54.823241 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3292 00:43:54.827437 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3293 00:43:54.830166 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3294 00:43:54.833501 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3295 00:43:54.837286 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3296 00:43:54.843138 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3297 00:43:54.846507 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3298 00:43:54.849620 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3299 00:43:54.853196 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3300 00:43:54.856282 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3301 00:43:54.859822 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3302 00:43:54.863432 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3303 00:43:54.866454 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3304 00:43:54.869753 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3305 00:43:54.872690 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3306 00:43:54.876340 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3307 00:43:54.880618 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3308 00:43:54.882839 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3309 00:43:54.886400 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3310 00:43:54.892729 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3311 00:43:54.896350 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3312 00:43:54.899281 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3313 00:43:54.903049 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3314 00:43:54.905756 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3315 00:43:54.909663 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3316 00:43:54.912773 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3317 00:43:54.916020 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3318 00:43:54.919340 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3319 00:43:54.922840 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3320 00:43:54.925852 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3321 00:43:54.929470 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3322 00:43:54.932372 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3323 00:43:54.935653 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3324 00:43:54.939101 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3325 00:43:54.942796 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3326 00:43:54.945804 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3327 00:43:54.948749 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3328 00:43:54.952897 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3329 00:43:54.959099 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3330 00:43:54.962532 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3331 00:43:54.965704 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3332 00:43:54.968751 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3333 00:43:54.972356 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3334 00:43:54.975564 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
3335 00:43:54.979363 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
3336 00:43:54.981944 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3337 00:43:54.985458 978 |3 6 18|[0] xxxxxxxx ooxxxxxo [MSB]
3338 00:43:54.988768 979 |3 6 19|[0] xxxxxxxx oooxxxxo [MSB]
3339 00:43:54.992159 980 |3 6 20|[0] xxxxxxxx ooooxxoo [MSB]
3340 00:43:54.995344 981 |3 6 21|[0] xxxxxxxx oooooxoo [MSB]
3341 00:43:54.998513 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3342 00:43:55.001922 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
3343 00:43:55.005477 984 |3 6 24|[0] xooooooo oooooooo [MSB]
3344 00:43:55.013154 994 |3 6 34|[0] oooooooo ooooooox [MSB]
3345 00:43:55.016805 995 |3 6 35|[0] oooooooo oxooooox [MSB]
3346 00:43:55.020266 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3347 00:43:55.023502 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3348 00:43:55.026444 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3349 00:43:55.029606 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3350 00:43:55.032987 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
3351 00:43:55.036469 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3352 00:43:55.039574 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3353 00:43:55.043563 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
3354 00:43:55.046351 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
3355 00:43:55.049789 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
3356 00:43:55.056230 1006 |3 6 46|[0] oxxxxxxx xxxxxxxx [MSB]
3357 00:43:55.059513 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3358 00:43:55.063082 Byte0, DQ PI dly=993, DQM PI dly= 993
3359 00:43:55.066579 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
3360 00:43:55.066977
3361 00:43:55.069492 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
3362 00:43:55.069885
3363 00:43:55.072911 Byte1, DQ PI dly=986, DQM PI dly= 986
3364 00:43:55.079741 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3365 00:43:55.080179
3366 00:43:55.082935 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3367 00:43:55.083450
3368 00:43:55.083900 ==
3369 00:43:55.089269 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3370 00:43:55.092905 fsp= 1, odt_onoff= 1, Byte mode= 0
3371 00:43:55.093299 ==
3372 00:43:55.096019 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3373 00:43:55.096438
3374 00:43:55.099730 Begin, DQ Scan Range 962~1026
3375 00:43:55.100121 Write Rank1 MR14 =0x0
3376 00:43:55.108343
3377 00:43:55.108420 CH=1, VrefRange= 0, VrefLevel = 0
3378 00:43:55.114974 TX Bit0 (986~1000) 15 993, Bit8 (980~991) 12 985,
3379 00:43:55.118283 TX Bit1 (985~998) 14 991, Bit9 (980~991) 12 985,
3380 00:43:55.124947 TX Bit2 (983~998) 16 990, Bit10 (983~993) 11 988,
3381 00:43:55.128434 TX Bit3 (981~993) 13 987, Bit11 (983~995) 13 989,
3382 00:43:55.131767 TX Bit4 (985~1000) 16 992, Bit12 (983~994) 12 988,
3383 00:43:55.138069 TX Bit5 (986~999) 14 992, Bit13 (984~993) 10 988,
3384 00:43:55.141728 TX Bit6 (985~999) 15 992, Bit14 (983~994) 12 988,
3385 00:43:55.148805 TX Bit7 (985~999) 15 992, Bit15 (976~988) 13 982,
3386 00:43:55.149011
3387 00:43:55.149130 Write Rank1 MR14 =0x2
3388 00:43:55.156782
3389 00:43:55.156974 CH=1, VrefRange= 0, VrefLevel = 2
3390 00:43:55.163722 TX Bit0 (986~1000) 15 993, Bit8 (979~992) 14 985,
3391 00:43:55.166799 TX Bit1 (985~999) 15 992, Bit9 (980~991) 12 985,
3392 00:43:55.173649 TX Bit2 (983~999) 17 991, Bit10 (982~994) 13 988,
3393 00:43:55.176631 TX Bit3 (980~995) 16 987, Bit11 (983~996) 14 989,
3394 00:43:55.180053 TX Bit4 (985~1001) 17 993, Bit12 (983~995) 13 989,
3395 00:43:55.186652 TX Bit5 (986~999) 14 992, Bit13 (984~994) 11 989,
3396 00:43:55.190290 TX Bit6 (985~1000) 16 992, Bit14 (983~994) 12 988,
3397 00:43:55.196593 TX Bit7 (985~1000) 16 992, Bit15 (976~989) 14 982,
3398 00:43:55.196989
3399 00:43:55.197444 Write Rank1 MR14 =0x4
3400 00:43:55.205447
3401 00:43:55.205908 CH=1, VrefRange= 0, VrefLevel = 4
3402 00:43:55.212338 TX Bit0 (986~1001) 16 993, Bit8 (979~992) 14 985,
3403 00:43:55.215950 TX Bit1 (985~1000) 16 992, Bit9 (979~991) 13 985,
3404 00:43:55.222268 TX Bit2 (982~999) 18 990, Bit10 (982~995) 14 988,
3405 00:43:55.226087 TX Bit3 (980~996) 17 988, Bit11 (982~997) 16 989,
3406 00:43:55.229608 TX Bit4 (984~1002) 19 993, Bit12 (983~995) 13 989,
3407 00:43:55.235750 TX Bit5 (986~1000) 15 993, Bit13 (984~995) 12 989,
3408 00:43:55.239269 TX Bit6 (985~1000) 16 992, Bit14 (983~995) 13 989,
3409 00:43:55.245699 TX Bit7 (985~1000) 16 992, Bit15 (975~990) 16 982,
3410 00:43:55.246204
3411 00:43:55.246513 Write Rank1 MR14 =0x6
3412 00:43:55.255031
3413 00:43:55.255499 CH=1, VrefRange= 0, VrefLevel = 6
3414 00:43:55.261542 TX Bit0 (985~1002) 18 993, Bit8 (978~993) 16 985,
3415 00:43:55.264831 TX Bit1 (985~1000) 16 992, Bit9 (978~992) 15 985,
3416 00:43:55.271524 TX Bit2 (982~1000) 19 991, Bit10 (981~995) 15 988,
3417 00:43:55.274609 TX Bit3 (980~997) 18 988, Bit11 (982~998) 17 990,
3418 00:43:55.277865 TX Bit4 (984~1003) 20 993, Bit12 (982~996) 15 989,
3419 00:43:55.284370 TX Bit5 (985~1001) 17 993, Bit13 (983~995) 13 989,
3420 00:43:55.287974 TX Bit6 (985~1001) 17 993, Bit14 (982~995) 14 988,
3421 00:43:55.294188 TX Bit7 (984~1001) 18 992, Bit15 (974~991) 18 982,
3422 00:43:55.294657
3423 00:43:55.294959 Write Rank1 MR14 =0x8
3424 00:43:55.303714
3425 00:43:55.304150 CH=1, VrefRange= 0, VrefLevel = 8
3426 00:43:55.311286 TX Bit0 (985~1003) 19 994, Bit8 (978~993) 16 985,
3427 00:43:55.313654 TX Bit1 (984~1001) 18 992, Bit9 (978~992) 15 985,
3428 00:43:55.320910 TX Bit2 (982~1001) 20 991, Bit10 (981~996) 16 988,
3429 00:43:55.324026 TX Bit3 (979~998) 20 988, Bit11 (982~999) 18 990,
3430 00:43:55.327102 TX Bit4 (983~1004) 22 993, Bit12 (982~996) 15 989,
3431 00:43:55.333950 TX Bit5 (985~1002) 18 993, Bit13 (983~997) 15 990,
3432 00:43:55.337213 TX Bit6 (984~1002) 19 993, Bit14 (982~996) 15 989,
3433 00:43:55.343923 TX Bit7 (984~1002) 19 993, Bit15 (974~991) 18 982,
3434 00:43:55.344397
3435 00:43:55.344700 Write Rank1 MR14 =0xa
3436 00:43:55.353322
3437 00:43:55.356740 CH=1, VrefRange= 0, VrefLevel = 10
3438 00:43:55.360296 TX Bit0 (985~1004) 20 994, Bit8 (977~993) 17 985,
3439 00:43:55.363327 TX Bit1 (984~1002) 19 993, Bit9 (977~993) 17 985,
3440 00:43:55.369779 TX Bit2 (981~1001) 21 991, Bit10 (980~997) 18 988,
3441 00:43:55.373514 TX Bit3 (979~999) 21 989, Bit11 (981~999) 19 990,
3442 00:43:55.376683 TX Bit4 (983~1004) 22 993, Bit12 (982~998) 17 990,
3443 00:43:55.382883 TX Bit5 (985~1002) 18 993, Bit13 (983~997) 15 990,
3444 00:43:55.386535 TX Bit6 (984~1003) 20 993, Bit14 (981~997) 17 989,
3445 00:43:55.392917 TX Bit7 (984~1003) 20 993, Bit15 (974~992) 19 983,
3446 00:43:55.393309
3447 00:43:55.393613 Write Rank1 MR14 =0xc
3448 00:43:55.402562
3449 00:43:55.405937 CH=1, VrefRange= 0, VrefLevel = 12
3450 00:43:55.409345 TX Bit0 (985~1005) 21 995, Bit8 (976~994) 19 985,
3451 00:43:55.412633 TX Bit1 (984~1003) 20 993, Bit9 (977~993) 17 985,
3452 00:43:55.418913 TX Bit2 (980~1002) 23 991, Bit10 (980~998) 19 989,
3453 00:43:55.422740 TX Bit3 (979~999) 21 989, Bit11 (982~999) 18 990,
3454 00:43:55.425743 TX Bit4 (983~1005) 23 994, Bit12 (982~998) 17 990,
3455 00:43:55.432605 TX Bit5 (984~1003) 20 993, Bit13 (982~998) 17 990,
3456 00:43:55.436386 TX Bit6 (984~1004) 21 994, Bit14 (981~998) 18 989,
3457 00:43:55.442464 TX Bit7 (984~1004) 21 994, Bit15 (973~992) 20 982,
3458 00:43:55.442857
3459 00:43:55.443162 Write Rank1 MR14 =0xe
3460 00:43:55.452091
3461 00:43:55.455376 CH=1, VrefRange= 0, VrefLevel = 14
3462 00:43:55.458687 TX Bit0 (985~1005) 21 995, Bit8 (977~994) 18 985,
3463 00:43:55.462024 TX Bit1 (983~1003) 21 993, Bit9 (977~993) 17 985,
3464 00:43:55.469082 TX Bit2 (980~1003) 24 991, Bit10 (979~998) 20 988,
3465 00:43:55.472474 TX Bit3 (979~1000) 22 989, Bit11 (981~999) 19 990,
3466 00:43:55.475144 TX Bit4 (982~1005) 24 993, Bit12 (981~999) 19 990,
3467 00:43:55.482397 TX Bit5 (984~1004) 21 994, Bit13 (982~999) 18 990,
3468 00:43:55.484997 TX Bit6 (983~1005) 23 994, Bit14 (980~998) 19 989,
3469 00:43:55.492054 TX Bit7 (983~1004) 22 993, Bit15 (973~993) 21 983,
3470 00:43:55.492574
3471 00:43:55.492911 Write Rank1 MR14 =0x10
3472 00:43:55.502179
3473 00:43:55.505405 CH=1, VrefRange= 0, VrefLevel = 16
3474 00:43:55.508261 TX Bit0 (984~1005) 22 994, Bit8 (976~995) 20 985,
3475 00:43:55.511992 TX Bit1 (983~1004) 22 993, Bit9 (977~994) 18 985,
3476 00:43:55.519408 TX Bit2 (980~1003) 24 991, Bit10 (979~999) 21 989,
3477 00:43:55.522491 TX Bit3 (979~1000) 22 989, Bit11 (980~1000) 21 990,
3478 00:43:55.525558 TX Bit4 (982~1006) 25 994, Bit12 (981~999) 19 990,
3479 00:43:55.531570 TX Bit5 (984~1005) 22 994, Bit13 (982~999) 18 990,
3480 00:43:55.534966 TX Bit6 (983~1005) 23 994, Bit14 (980~999) 20 989,
3481 00:43:55.542124 TX Bit7 (982~1005) 24 993, Bit15 (973~993) 21 983,
3482 00:43:55.542606
3483 00:43:55.542916 Write Rank1 MR14 =0x12
3484 00:43:55.552179
3485 00:43:55.555187 CH=1, VrefRange= 0, VrefLevel = 18
3486 00:43:55.558091 TX Bit0 (984~1006) 23 995, Bit8 (976~996) 21 986,
3487 00:43:55.561518 TX Bit1 (983~1005) 23 994, Bit9 (977~995) 19 986,
3488 00:43:55.568091 TX Bit2 (980~1005) 26 992, Bit10 (979~999) 21 989,
3489 00:43:55.571626 TX Bit3 (978~1001) 24 989, Bit11 (980~1000) 21 990,
3490 00:43:55.578174 TX Bit4 (982~1006) 25 994, Bit12 (981~999) 19 990,
3491 00:43:55.581688 TX Bit5 (983~1005) 23 994, Bit13 (981~1000) 20 990,
3492 00:43:55.584892 TX Bit6 (982~1005) 24 993, Bit14 (980~999) 20 989,
3493 00:43:55.592061 TX Bit7 (982~1005) 24 993, Bit15 (972~993) 22 982,
3494 00:43:55.592535
3495 00:43:55.592841 Write Rank1 MR14 =0x14
3496 00:43:55.602319
3497 00:43:55.602812 CH=1, VrefRange= 0, VrefLevel = 20
3498 00:43:55.608370 TX Bit0 (984~1006) 23 995, Bit8 (975~996) 22 985,
3499 00:43:55.611849 TX Bit1 (982~1005) 24 993, Bit9 (976~995) 20 985,
3500 00:43:55.618605 TX Bit2 (979~1005) 27 992, Bit10 (978~999) 22 988,
3501 00:43:55.621806 TX Bit3 (978~1001) 24 989, Bit11 (979~1000) 22 989,
3502 00:43:55.625014 TX Bit4 (981~1006) 26 993, Bit12 (981~1000) 20 990,
3503 00:43:55.631738 TX Bit5 (983~1006) 24 994, Bit13 (981~1000) 20 990,
3504 00:43:55.635213 TX Bit6 (982~1006) 25 994, Bit14 (979~999) 21 989,
3505 00:43:55.642192 TX Bit7 (982~1006) 25 994, Bit15 (971~994) 24 982,
3506 00:43:55.642674
3507 00:43:55.642982 Write Rank1 MR14 =0x16
3508 00:43:55.651950
3509 00:43:55.654983 CH=1, VrefRange= 0, VrefLevel = 22
3510 00:43:55.658468 TX Bit0 (984~1006) 23 995, Bit8 (975~997) 23 986,
3511 00:43:55.661674 TX Bit1 (982~1006) 25 994, Bit9 (976~996) 21 986,
3512 00:43:55.667945 TX Bit2 (979~1005) 27 992, Bit10 (978~1000) 23 989,
3513 00:43:55.671931 TX Bit3 (978~1002) 25 990, Bit11 (979~1001) 23 990,
3514 00:43:55.678296 TX Bit4 (981~1006) 26 993, Bit12 (980~1000) 21 990,
3515 00:43:55.681466 TX Bit5 (983~1006) 24 994, Bit13 (981~1000) 20 990,
3516 00:43:55.685205 TX Bit6 (982~1006) 25 994, Bit14 (979~999) 21 989,
3517 00:43:55.691292 TX Bit7 (981~1006) 26 993, Bit15 (971~994) 24 982,
3518 00:43:55.691812
3519 00:43:55.692247 Write Rank1 MR14 =0x18
3520 00:43:55.702350
3521 00:43:55.705119 CH=1, VrefRange= 0, VrefLevel = 24
3522 00:43:55.708395 TX Bit0 (984~1006) 23 995, Bit8 (976~997) 22 986,
3523 00:43:55.711536 TX Bit1 (982~1006) 25 994, Bit9 (975~996) 22 985,
3524 00:43:55.719283 TX Bit2 (979~1006) 28 992, Bit10 (978~1000) 23 989,
3525 00:43:55.722371 TX Bit3 (978~1003) 26 990, Bit11 (979~1001) 23 990,
3526 00:43:55.729075 TX Bit4 (981~1006) 26 993, Bit12 (980~1000) 21 990,
3527 00:43:55.732694 TX Bit5 (982~1006) 25 994, Bit13 (980~1001) 22 990,
3528 00:43:55.735193 TX Bit6 (981~1006) 26 993, Bit14 (978~1000) 23 989,
3529 00:43:55.742569 TX Bit7 (981~1006) 26 993, Bit15 (971~995) 25 983,
3530 00:43:55.743077
3531 00:43:55.743409 Write Rank1 MR14 =0x1a
3532 00:43:55.752646
3533 00:43:55.755952 CH=1, VrefRange= 0, VrefLevel = 26
3534 00:43:55.758943 TX Bit0 (983~1007) 25 995, Bit8 (974~998) 25 986,
3535 00:43:55.762267 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3536 00:43:55.769202 TX Bit2 (979~1006) 28 992, Bit10 (977~1000) 24 988,
3537 00:43:55.772664 TX Bit3 (978~1003) 26 990, Bit11 (978~1001) 24 989,
3538 00:43:55.779212 TX Bit4 (980~1007) 28 993, Bit12 (979~1001) 23 990,
3539 00:43:55.782047 TX Bit5 (982~1007) 26 994, Bit13 (980~1001) 22 990,
3540 00:43:55.785746 TX Bit6 (981~1007) 27 994, Bit14 (978~1000) 23 989,
3541 00:43:55.792194 TX Bit7 (981~1006) 26 993, Bit15 (970~996) 27 983,
3542 00:43:55.792705
3543 00:43:55.793139 Write Rank1 MR14 =0x1c
3544 00:43:55.802930
3545 00:43:55.805933 CH=1, VrefRange= 0, VrefLevel = 28
3546 00:43:55.809331 TX Bit0 (983~1007) 25 995, Bit8 (974~999) 26 986,
3547 00:43:55.812995 TX Bit1 (982~1006) 25 994, Bit9 (975~997) 23 986,
3548 00:43:55.819529 TX Bit2 (979~1006) 28 992, Bit10 (977~1000) 24 988,
3549 00:43:55.822855 TX Bit3 (978~1003) 26 990, Bit11 (978~1001) 24 989,
3550 00:43:55.829561 TX Bit4 (981~1007) 27 994, Bit12 (979~1001) 23 990,
3551 00:43:55.832568 TX Bit5 (982~1007) 26 994, Bit13 (979~1001) 23 990,
3552 00:43:55.836308 TX Bit6 (981~1007) 27 994, Bit14 (977~1000) 24 988,
3553 00:43:55.842959 TX Bit7 (980~1007) 28 993, Bit15 (970~995) 26 982,
3554 00:43:55.843471
3555 00:43:55.843806 Write Rank1 MR14 =0x1e
3556 00:43:55.853474
3557 00:43:55.857061 CH=1, VrefRange= 0, VrefLevel = 30
3558 00:43:55.859912 TX Bit0 (982~1007) 26 994, Bit8 (975~999) 25 987,
3559 00:43:55.863406 TX Bit1 (980~1006) 27 993, Bit9 (974~998) 25 986,
3560 00:43:55.869767 TX Bit2 (979~1006) 28 992, Bit10 (976~1000) 25 988,
3561 00:43:55.873433 TX Bit3 (978~1003) 26 990, Bit11 (978~1000) 23 989,
3562 00:43:55.880020 TX Bit4 (981~1007) 27 994, Bit12 (978~1001) 24 989,
3563 00:43:55.883380 TX Bit5 (981~1007) 27 994, Bit13 (979~1001) 23 990,
3564 00:43:55.886449 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
3565 00:43:55.892948 TX Bit7 (980~1006) 27 993, Bit15 (970~995) 26 982,
3566 00:43:55.893385
3567 00:43:55.893721 Write Rank1 MR14 =0x20
3568 00:43:55.903901
3569 00:43:55.906921 CH=1, VrefRange= 0, VrefLevel = 32
3570 00:43:55.910050 TX Bit0 (982~1007) 26 994, Bit8 (975~999) 25 987,
3571 00:43:55.913681 TX Bit1 (980~1006) 27 993, Bit9 (974~998) 25 986,
3572 00:43:55.919987 TX Bit2 (979~1006) 28 992, Bit10 (976~1000) 25 988,
3573 00:43:55.923766 TX Bit3 (978~1003) 26 990, Bit11 (978~1000) 23 989,
3574 00:43:55.929979 TX Bit4 (981~1007) 27 994, Bit12 (978~1001) 24 989,
3575 00:43:55.933535 TX Bit5 (981~1007) 27 994, Bit13 (979~1001) 23 990,
3576 00:43:55.936793 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
3577 00:43:55.943301 TX Bit7 (980~1006) 27 993, Bit15 (970~995) 26 982,
3578 00:43:55.943694
3579 00:43:55.943996 Write Rank1 MR14 =0x22
3580 00:43:55.954105
3581 00:43:55.956923 CH=1, VrefRange= 0, VrefLevel = 34
3582 00:43:55.960474 TX Bit0 (982~1007) 26 994, Bit8 (975~999) 25 987,
3583 00:43:55.963943 TX Bit1 (980~1006) 27 993, Bit9 (974~998) 25 986,
3584 00:43:55.970924 TX Bit2 (979~1006) 28 992, Bit10 (976~1000) 25 988,
3585 00:43:55.973866 TX Bit3 (978~1003) 26 990, Bit11 (978~1000) 23 989,
3586 00:43:55.980193 TX Bit4 (981~1007) 27 994, Bit12 (978~1001) 24 989,
3587 00:43:55.983617 TX Bit5 (981~1007) 27 994, Bit13 (979~1001) 23 990,
3588 00:43:55.987124 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
3589 00:43:55.993623 TX Bit7 (980~1006) 27 993, Bit15 (970~995) 26 982,
3590 00:43:55.994143
3591 00:43:55.996993 Write Rank1 MR14 =0x24
3592 00:43:56.004972
3593 00:43:56.007428 CH=1, VrefRange= 0, VrefLevel = 36
3594 00:43:56.010962 TX Bit0 (982~1007) 26 994, Bit8 (975~999) 25 987,
3595 00:43:56.014297 TX Bit1 (980~1006) 27 993, Bit9 (974~998) 25 986,
3596 00:43:56.020605 TX Bit2 (979~1006) 28 992, Bit10 (976~1000) 25 988,
3597 00:43:56.024696 TX Bit3 (978~1003) 26 990, Bit11 (978~1000) 23 989,
3598 00:43:56.030729 TX Bit4 (981~1007) 27 994, Bit12 (978~1001) 24 989,
3599 00:43:56.034344 TX Bit5 (981~1007) 27 994, Bit13 (979~1001) 23 990,
3600 00:43:56.037200 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
3601 00:43:56.043894 TX Bit7 (980~1006) 27 993, Bit15 (970~995) 26 982,
3602 00:43:56.044370
3603 00:43:56.047304 Write Rank1 MR14 =0x26
3604 00:43:56.054687
3605 00:43:56.058528 CH=1, VrefRange= 0, VrefLevel = 38
3606 00:43:56.061278 TX Bit0 (982~1007) 26 994, Bit8 (975~999) 25 987,
3607 00:43:56.064447 TX Bit1 (980~1006) 27 993, Bit9 (974~998) 25 986,
3608 00:43:56.071397 TX Bit2 (979~1006) 28 992, Bit10 (976~1000) 25 988,
3609 00:43:56.075056 TX Bit3 (978~1003) 26 990, Bit11 (978~1000) 23 989,
3610 00:43:56.081302 TX Bit4 (981~1007) 27 994, Bit12 (978~1001) 24 989,
3611 00:43:56.085026 TX Bit5 (981~1007) 27 994, Bit13 (979~1001) 23 990,
3612 00:43:56.087681 TX Bit6 (980~1007) 28 993, Bit14 (977~1000) 24 988,
3613 00:43:56.094595 TX Bit7 (980~1006) 27 993, Bit15 (970~995) 26 982,
3614 00:43:56.095104
3615 00:43:56.095431
3616 00:43:56.097810 TX Vref found, early break! 381< 390
3617 00:43:56.101222 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =844/100 ps
3618 00:43:56.104266 u1DelayCellOfst[0]=4 cells (4 PI)
3619 00:43:56.108050 u1DelayCellOfst[1]=3 cells (3 PI)
3620 00:43:56.111335 u1DelayCellOfst[2]=2 cells (2 PI)
3621 00:43:56.114605 u1DelayCellOfst[3]=0 cells (0 PI)
3622 00:43:56.117822 u1DelayCellOfst[4]=4 cells (4 PI)
3623 00:43:56.121101 u1DelayCellOfst[5]=4 cells (4 PI)
3624 00:43:56.124629 u1DelayCellOfst[6]=3 cells (3 PI)
3625 00:43:56.128213 u1DelayCellOfst[7]=3 cells (3 PI)
3626 00:43:56.130996 Byte0, DQ PI dly=990, DQM PI dly= 992
3627 00:43:56.134449 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
3628 00:43:56.134903
3629 00:43:56.137533 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
3630 00:43:56.137959
3631 00:43:56.141430 u1DelayCellOfst[8]=5 cells (5 PI)
3632 00:43:56.144848 u1DelayCellOfst[9]=4 cells (4 PI)
3633 00:43:56.148483 u1DelayCellOfst[10]=6 cells (6 PI)
3634 00:43:56.150914 u1DelayCellOfst[11]=8 cells (7 PI)
3635 00:43:56.154770 u1DelayCellOfst[12]=8 cells (7 PI)
3636 00:43:56.157793 u1DelayCellOfst[13]=9 cells (8 PI)
3637 00:43:56.161607 u1DelayCellOfst[14]=6 cells (6 PI)
3638 00:43:56.164299 u1DelayCellOfst[15]=0 cells (0 PI)
3639 00:43:56.168573 Byte1, DQ PI dly=982, DQM PI dly= 986
3640 00:43:56.170964 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3641 00:43:56.171398
3642 00:43:56.175245 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3643 00:43:56.175772
3644 00:43:56.177595 Write Rank1 MR14 =0x1e
3645 00:43:56.178045
3646 00:43:56.180943 Final TX Range 0 Vref 30
3647 00:43:56.181379
3648 00:43:56.187304 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3649 00:43:56.187812
3650 00:43:56.193970 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3651 00:43:56.200727 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3652 00:43:56.207245 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3653 00:43:56.210784 Write Rank1 MR3 =0xb0
3654 00:43:56.211233 DramC Write-DBI on
3655 00:43:56.211643 ==
3656 00:43:56.217103 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3657 00:43:56.220951 fsp= 1, odt_onoff= 1, Byte mode= 0
3658 00:43:56.221473 ==
3659 00:43:56.224111 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3660 00:43:56.224618
3661 00:43:56.227370 Begin, DQ Scan Range 706~770
3662 00:43:56.227878
3663 00:43:56.228209
3664 00:43:56.230909 TX Vref Scan disable
3665 00:43:56.234109 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3666 00:43:56.237375 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3667 00:43:56.240470 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3668 00:43:56.243674 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3669 00:43:56.247266 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3670 00:43:56.250262 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3671 00:43:56.253818 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3672 00:43:56.256868 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3673 00:43:56.260533 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3674 00:43:56.263910 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3675 00:43:56.267909 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3676 00:43:56.270336 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3677 00:43:56.274430 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3678 00:43:56.277455 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3679 00:43:56.280946 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3680 00:43:56.283953 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3681 00:43:56.287287 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3682 00:43:56.290460 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3683 00:43:56.294096 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3684 00:43:56.300623 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3685 00:43:56.304158 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3686 00:43:56.310384 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3687 00:43:56.313612 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3688 00:43:56.317128 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3689 00:43:56.320818 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3690 00:43:56.324127 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3691 00:43:56.326741 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3692 00:43:56.330616 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3693 00:43:56.333790 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3694 00:43:56.337196 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3695 00:43:56.340096 Byte0, DQ PI dly=739, DQM PI dly= 739
3696 00:43:56.344101 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
3697 00:43:56.344574
3698 00:43:56.349822 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
3699 00:43:56.350344
3700 00:43:56.353630 Byte1, DQ PI dly=730, DQM PI dly= 730
3701 00:43:56.356852 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3702 00:43:56.357434
3703 00:43:56.360148 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3704 00:43:56.363478
3705 00:43:56.366644 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3706 00:43:56.376754 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3707 00:43:56.383265 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3708 00:43:56.383652 Write Rank1 MR3 =0x30
3709 00:43:56.387120 DramC Write-DBI off
3710 00:43:56.387532
3711 00:43:56.387832 [DATLAT]
3712 00:43:56.389906 Freq=1600, CH1 RK1, use_rxtx_scan=0
3713 00:43:56.390355
3714 00:43:56.393103 DATLAT Default: 0x10
3715 00:43:56.393579 7, 0xFFFF, sum=0
3716 00:43:56.396833 8, 0xFFFF, sum=0
3717 00:43:56.397306 9, 0xFFFF, sum=0
3718 00:43:56.399922 10, 0xFFFF, sum=0
3719 00:43:56.400312 11, 0xFFFF, sum=0
3720 00:43:56.403195 12, 0xFFFF, sum=0
3721 00:43:56.403691 13, 0xFFFF, sum=0
3722 00:43:56.406382 14, 0x0, sum=1
3723 00:43:56.406771 15, 0x0, sum=2
3724 00:43:56.407133 16, 0x0, sum=3
3725 00:43:56.410045 17, 0x0, sum=4
3726 00:43:56.413636 pattern=2 first_step=14 total pass=5 best_step=16
3727 00:43:56.414051 ==
3728 00:43:56.420606 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3729 00:43:56.423095 fsp= 1, odt_onoff= 1, Byte mode= 0
3730 00:43:56.423653 ==
3731 00:43:56.426482 Start DQ dly to find pass range UseTestEngine =1
3732 00:43:56.429388 x-axis: bit #, y-axis: DQ dly (-127~63)
3733 00:43:56.433168 RX Vref Scan = 0
3734 00:43:56.436464 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3735 00:43:56.436877 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3736 00:43:56.439640 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3737 00:43:56.443004 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3738 00:43:56.446226 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3739 00:43:56.450046 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3740 00:43:56.452997 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3741 00:43:56.456293 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3742 00:43:56.459588 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3743 00:43:56.460102 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3744 00:43:56.462966 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3745 00:43:56.466324 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3746 00:43:56.469701 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3747 00:43:56.472491 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3748 00:43:56.475760 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3749 00:43:56.479698 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3750 00:43:56.483098 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3751 00:43:56.486187 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3752 00:43:56.486706 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3753 00:43:56.488972 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3754 00:43:56.492721 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3755 00:43:56.495972 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3756 00:43:56.499346 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3757 00:43:56.502572 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3758 00:43:56.505708 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3759 00:43:56.506188 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3760 00:43:56.509162 0, [0] xxxxxxxx xxxxxxxx [MSB]
3761 00:43:56.512638 1, [0] xxxxxxxx xxxxxxxo [MSB]
3762 00:43:56.515502 2, [0] xxxxxxxx xoxxxxxo [MSB]
3763 00:43:56.518755 3, [0] xxxoxxxx ooxxxxxo [MSB]
3764 00:43:56.522422 4, [0] xxooxxxx ooxxxxxo [MSB]
3765 00:43:56.522916 5, [0] xxoooxxx ooxxxxxo [MSB]
3766 00:43:56.525458 6, [0] xxoooxxx oooxxoxo [MSB]
3767 00:43:56.529131 7, [0] oooooxxx oooooooo [MSB]
3768 00:43:56.532012 8, [0] ooooooxo oooooooo [MSB]
3769 00:43:56.535856 30, [0] oooooooo ooooooox [MSB]
3770 00:43:56.538970 31, [0] oooooooo ooooooox [MSB]
3771 00:43:56.542998 32, [0] oooooooo ooooooox [MSB]
3772 00:43:56.546013 33, [0] oooooooo xxooooox [MSB]
3773 00:43:56.548808 34, [0] oooxoooo xxooooox [MSB]
3774 00:43:56.552053 35, [0] oooxoooo xxooooox [MSB]
3775 00:43:56.552516 36, [0] ooxxoooo xxooooox [MSB]
3776 00:43:56.555122 37, [0] ooxxooox xxooxoxx [MSB]
3777 00:43:56.558386 38, [0] oxxxxoox xxxxxxxx [MSB]
3778 00:43:56.562747 39, [0] xxxxxoox xxxxxxxx [MSB]
3779 00:43:56.565020 40, [0] xxxxxxox xxxxxxxx [MSB]
3780 00:43:56.568382 41, [0] xxxxxxxx xxxxxxxx [MSB]
3781 00:43:56.571894 iDelay=41, Bit 0, Center 22 (7 ~ 38) 32
3782 00:43:56.575332 iDelay=41, Bit 1, Center 22 (7 ~ 37) 31
3783 00:43:56.578691 iDelay=41, Bit 2, Center 19 (4 ~ 35) 32
3784 00:43:56.581814 iDelay=41, Bit 3, Center 18 (3 ~ 33) 31
3785 00:43:56.585122 iDelay=41, Bit 4, Center 21 (5 ~ 37) 33
3786 00:43:56.588411 iDelay=41, Bit 5, Center 23 (8 ~ 39) 32
3787 00:43:56.591963 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
3788 00:43:56.594861 iDelay=41, Bit 7, Center 22 (8 ~ 36) 29
3789 00:43:56.598755 iDelay=41, Bit 8, Center 17 (3 ~ 32) 30
3790 00:43:56.602059 iDelay=41, Bit 9, Center 17 (2 ~ 32) 31
3791 00:43:56.605004 iDelay=41, Bit 10, Center 21 (6 ~ 37) 32
3792 00:43:56.611525 iDelay=41, Bit 11, Center 22 (7 ~ 37) 31
3793 00:43:56.614905 iDelay=41, Bit 12, Center 21 (7 ~ 36) 30
3794 00:43:56.618508 iDelay=41, Bit 13, Center 21 (6 ~ 37) 32
3795 00:43:56.621486 iDelay=41, Bit 14, Center 21 (7 ~ 36) 30
3796 00:43:56.625261 iDelay=41, Bit 15, Center 15 (1 ~ 29) 29
3797 00:43:56.625657 ==
3798 00:43:56.628299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3799 00:43:56.631443 fsp= 1, odt_onoff= 1, Byte mode= 0
3800 00:43:56.634959 ==
3801 00:43:56.635397 DQS Delay:
3802 00:43:56.635825 DQS0 = 0, DQS1 = 0
3803 00:43:56.638284 DQM Delay:
3804 00:43:56.638774 DQM0 = 21, DQM1 = 19
3805 00:43:56.641620 DQ Delay:
3806 00:43:56.642154 DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =18
3807 00:43:56.645002 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
3808 00:43:56.648584 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
3809 00:43:56.651895 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =15
3810 00:43:56.652324
3811 00:43:56.654494
3812 00:43:56.654929
3813 00:43:56.655233 [DramC_TX_OE_Calibration] TA2
3814 00:43:56.658633 Original DQ_B0 (3 6) =30, OEN = 27
3815 00:43:56.661596 Original DQ_B1 (3 6) =30, OEN = 27
3816 00:43:56.664491 23, 0x0, End_B0=23 End_B1=23
3817 00:43:56.668642 24, 0x0, End_B0=24 End_B1=24
3818 00:43:56.671790 25, 0x0, End_B0=25 End_B1=25
3819 00:43:56.672343 26, 0x0, End_B0=26 End_B1=26
3820 00:43:56.675491 27, 0x0, End_B0=27 End_B1=27
3821 00:43:56.678085 28, 0x0, End_B0=28 End_B1=28
3822 00:43:56.681200 29, 0x0, End_B0=29 End_B1=29
3823 00:43:56.681723 30, 0x0, End_B0=30 End_B1=30
3824 00:43:56.685312 31, 0xFFFF, End_B0=30 End_B1=30
3825 00:43:56.691183 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3826 00:43:56.698257 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3827 00:43:56.698798
3828 00:43:56.699226
3829 00:43:56.699588 Write Rank1 MR23 =0x3f
3830 00:43:56.701467 [DQSOSC]
3831 00:43:56.707864 [DQSOSCAuto] RK1, (LSB)MR18= 0xd3d3, (MSB)MR19= 0x202, tDQSOscB0 = 435 ps tDQSOscB1 = 435 ps
3832 00:43:56.714659 CH1_RK1: MR19=0x202, MR18=0xD3D3, DQSOSC=435, MR23=63, INC=13, DEC=19
3833 00:43:56.717952 Write Rank1 MR23 =0x3f
3834 00:43:56.718378 [DQSOSC]
3835 00:43:56.724621 [DQSOSCAuto] RK1, (LSB)MR18= 0xd3d3, (MSB)MR19= 0x202, tDQSOscB0 = 435 ps tDQSOscB1 = 435 ps
3836 00:43:56.727985 CH1 RK1: MR19=202, MR18=D3D3
3837 00:43:56.731185 [RxdqsGatingPostProcess] freq 1600
3838 00:43:56.737649 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3839 00:43:56.738076 Rank: 0
3840 00:43:56.741270 best DQS0 dly(2T, 0.5T) = (2, 6)
3841 00:43:56.744865 best DQS1 dly(2T, 0.5T) = (2, 6)
3842 00:43:56.748215 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3843 00:43:56.751791 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3844 00:43:56.752315 Rank: 1
3845 00:43:56.754337 best DQS0 dly(2T, 0.5T) = (2, 6)
3846 00:43:56.757892 best DQS1 dly(2T, 0.5T) = (2, 6)
3847 00:43:56.761423 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3848 00:43:56.761976 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3849 00:43:56.768270 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3850 00:43:56.771151 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3851 00:43:56.774796 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3852 00:43:56.775188
3853 00:43:56.775513
3854 00:43:56.777517 [Calibration Summary] Freqency 1600
3855 00:43:56.780810 CH 0, Rank 0
3856 00:43:56.781198 All Pass.
3857 00:43:56.781499
3858 00:43:56.784288 CH 0, Rank 1
3859 00:43:56.784674 All Pass.
3860 00:43:56.784974
3861 00:43:56.785252 CH 1, Rank 0
3862 00:43:56.787624 All Pass.
3863 00:43:56.788006
3864 00:43:56.788309 CH 1, Rank 1
3865 00:43:56.788593 All Pass.
3866 00:43:56.788868
3867 00:43:56.794366 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3868 00:43:56.801655 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3869 00:43:56.807604 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3870 00:43:56.810874 Write Rank0 MR3 =0xb0
3871 00:43:56.818389 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3872 00:43:56.824815 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3873 00:43:56.831123 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3874 00:43:56.834280 Write Rank1 MR3 =0xb0
3875 00:43:56.840848 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3876 00:43:56.847445 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3877 00:43:56.854402 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3878 00:43:56.857499 Write Rank0 MR3 =0xb0
3879 00:43:56.861253 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 00:43:56.870889 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 00:43:56.877518 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 00:43:56.877978 Write Rank1 MR3 =0xb0
3883 00:43:56.880534 DramC Write-DBI on
3884 00:43:56.884033 [GetDramInforAfterCalByMRR] Vendor 6.
3885 00:43:56.887321 [GetDramInforAfterCalByMRR] Revision 505.
3886 00:43:56.887846 MR8 1111
3887 00:43:56.894090 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3888 00:43:56.894485 MR8 1111
3889 00:43:56.897599 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3890 00:43:56.900470 MR8 1111
3891 00:43:56.904260 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3892 00:43:56.904728 MR8 1111
3893 00:43:56.910900 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3894 00:43:56.917596 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3895 00:43:56.920765 Write Rank0 MR13 =0xd0
3896 00:43:56.924227 Write Rank1 MR13 =0xd0
3897 00:43:56.924739 Write Rank0 MR13 =0xd0
3898 00:43:56.927056 Write Rank1 MR13 =0xd0
3899 00:43:56.930474 Save calibration result to emmc
3900 00:43:56.930865
3901 00:43:56.931166
3902 00:43:56.934014 [DramcModeReg_Check] Freq_1600, FSP_1
3903 00:43:56.934410 FSP_1, CH_0, RK0
3904 00:43:56.937084 Write Rank0 MR13 =0xd8
3905 00:43:56.940999 MR12 = 0x60 (global = 0x60) match
3906 00:43:56.943864 MR14 = 0x1e (global = 0x1e) match
3907 00:43:56.944260 FSP_1, CH_0, RK1
3908 00:43:56.947330 Write Rank1 MR13 =0xd8
3909 00:43:56.950665 MR12 = 0x5e (global = 0x5e) match
3910 00:43:56.953612 MR14 = 0x1e (global = 0x1e) match
3911 00:43:56.954144 FSP_1, CH_1, RK0
3912 00:43:56.956996 Write Rank0 MR13 =0xd8
3913 00:43:56.960245 MR12 = 0x60 (global = 0x60) match
3914 00:43:56.963663 MR14 = 0x1e (global = 0x1e) match
3915 00:43:56.964057 FSP_1, CH_1, RK1
3916 00:43:56.966669 Write Rank1 MR13 =0xd8
3917 00:43:56.970138 MR12 = 0x60 (global = 0x60) match
3918 00:43:56.973596 MR14 = 0x1e (global = 0x1e) match
3919 00:43:56.974096
3920 00:43:56.976707 [MEM_TEST] 02: After DFS, before run time config
3921 00:43:56.988823 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3922 00:43:56.989280
3923 00:43:56.989582 [TA2_TEST]
3924 00:43:56.989862 === TA2 HW
3925 00:43:56.992604 TA2 PAT: XTALK
3926 00:43:56.995794 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3927 00:43:57.002430 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3928 00:43:57.005727 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3929 00:43:57.008835 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3930 00:43:57.012302
3931 00:43:57.012727
3932 00:43:57.013123 Settings after calibration
3933 00:43:57.013442
3934 00:43:57.015552 [DramcRunTimeConfig]
3935 00:43:57.019001 TransferPLLToSPMControl - MODE SW PHYPLL
3936 00:43:57.019397 TX_TRACKING: ON
3937 00:43:57.022227 RX_TRACKING: ON
3938 00:43:57.022714 HW_GATING: ON
3939 00:43:57.025705 HW_GATING DBG: OFF
3940 00:43:57.026203 ddr_geometry:1
3941 00:43:57.028910 ddr_geometry:1
3942 00:43:57.029389 ddr_geometry:1
3943 00:43:57.032601 ddr_geometry:1
3944 00:43:57.033037 ddr_geometry:1
3945 00:43:57.033339 ddr_geometry:1
3946 00:43:57.035537 ddr_geometry:1
3947 00:43:57.035932 ddr_geometry:1
3948 00:43:57.039005 High Freq DUMMY_READ_FOR_TRACKING: ON
3949 00:43:57.042573 ZQCS_ENABLE_LP4: OFF
3950 00:43:57.045440 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3951 00:43:57.048770 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3952 00:43:57.049230 SPM_CONTROL_AFTERK: ON
3953 00:43:57.051987 IMPEDANCE_TRACKING: ON
3954 00:43:57.052456 TEMP_SENSOR: ON
3955 00:43:57.054993 PER_BANK_REFRESH: ON
3956 00:43:57.055383 HW_SAVE_FOR_SR: ON
3957 00:43:57.058362 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3958 00:43:57.061808 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3959 00:43:57.065003 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3960 00:43:57.068274 Read ODT Tracking: ON
3961 00:43:57.072050 =========================
3962 00:43:57.072459
3963 00:43:57.072757 [TA2_TEST]
3964 00:43:57.073031 === TA2 HW
3965 00:43:57.078802 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3966 00:43:57.081931 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3967 00:43:57.088863 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3968 00:43:57.091820 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3969 00:43:57.092208
3970 00:43:57.095365 [MEM_TEST] 03: After run time config
3971 00:43:57.106893 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3972 00:43:57.110229 [complex_mem_test] start addr:0x40024000, len:131072
3973 00:43:57.314537 1st complex R/W mem test pass
3974 00:43:57.321434 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3975 00:43:57.324425 sync preloader write leveling
3976 00:43:57.327679 sync preloader cbt_mr12
3977 00:43:57.331081 sync preloader cbt_clk_dly
3978 00:43:57.331468 sync preloader cbt_cmd_dly
3979 00:43:57.334404 sync preloader cbt_cs
3980 00:43:57.337573 sync preloader cbt_ca_perbit_delay
3981 00:43:57.338096 sync preloader clk_delay
3982 00:43:57.341291 sync preloader dqs_delay
3983 00:43:57.344738 sync preloader u1Gating2T_Save
3984 00:43:57.347815 sync preloader u1Gating05T_Save
3985 00:43:57.351263 sync preloader u1Gatingfine_tune_Save
3986 00:43:57.354605 sync preloader u1Gatingucpass_count_Save
3987 00:43:57.358100 sync preloader u1TxWindowPerbitVref_Save
3988 00:43:57.361407 sync preloader u1TxCenter_min_Save
3989 00:43:57.364353 sync preloader u1TxCenter_max_Save
3990 00:43:57.367857 sync preloader u1Txwin_center_Save
3991 00:43:57.371289 sync preloader u1Txfirst_pass_Save
3992 00:43:57.374663 sync preloader u1Txlast_pass_Save
3993 00:43:57.375130 sync preloader u1RxDatlat_Save
3994 00:43:57.377950 sync preloader u1RxWinPerbitVref_Save
3995 00:43:57.384599 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3996 00:43:57.387690 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3997 00:43:57.391581 sync preloader delay_cell_unit
3998 00:43:57.398088 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3999 00:43:57.401283 sync preloader write leveling
4000 00:43:57.401718 sync preloader cbt_mr12
4001 00:43:57.404761 sync preloader cbt_clk_dly
4002 00:43:57.408039 sync preloader cbt_cmd_dly
4003 00:43:57.408480 sync preloader cbt_cs
4004 00:43:57.411480 sync preloader cbt_ca_perbit_delay
4005 00:43:57.414496 sync preloader clk_delay
4006 00:43:57.417979 sync preloader dqs_delay
4007 00:43:57.418400 sync preloader u1Gating2T_Save
4008 00:43:57.421087 sync preloader u1Gating05T_Save
4009 00:43:57.425072 sync preloader u1Gatingfine_tune_Save
4010 00:43:57.427976 sync preloader u1Gatingucpass_count_Save
4011 00:43:57.431158 sync preloader u1TxWindowPerbitVref_Save
4012 00:43:57.434577 sync preloader u1TxCenter_min_Save
4013 00:43:57.437959 sync preloader u1TxCenter_max_Save
4014 00:43:57.440840 sync preloader u1Txwin_center_Save
4015 00:43:57.444239 sync preloader u1Txfirst_pass_Save
4016 00:43:57.447539 sync preloader u1Txlast_pass_Save
4017 00:43:57.450926 sync preloader u1RxDatlat_Save
4018 00:43:57.454371 sync preloader u1RxWinPerbitVref_Save
4019 00:43:57.457415 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4020 00:43:57.461118 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4021 00:43:57.464428 sync preloader delay_cell_unit
4022 00:43:57.470962 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4023 00:43:57.474195 sync preloader write leveling
4024 00:43:57.478134 sync preloader cbt_mr12
4025 00:43:57.478674 sync preloader cbt_clk_dly
4026 00:43:57.480879 sync preloader cbt_cmd_dly
4027 00:43:57.484206 sync preloader cbt_cs
4028 00:43:57.487729 sync preloader cbt_ca_perbit_delay
4029 00:43:57.488201 sync preloader clk_delay
4030 00:43:57.490916 sync preloader dqs_delay
4031 00:43:57.494173 sync preloader u1Gating2T_Save
4032 00:43:57.497847 sync preloader u1Gating05T_Save
4033 00:43:57.501005 sync preloader u1Gatingfine_tune_Save
4034 00:43:57.504447 sync preloader u1Gatingucpass_count_Save
4035 00:43:57.507699 sync preloader u1TxWindowPerbitVref_Save
4036 00:43:57.510859 sync preloader u1TxCenter_min_Save
4037 00:43:57.514630 sync preloader u1TxCenter_max_Save
4038 00:43:57.517489 sync preloader u1Txwin_center_Save
4039 00:43:57.521392 sync preloader u1Txfirst_pass_Save
4040 00:43:57.524147 sync preloader u1Txlast_pass_Save
4041 00:43:57.524621 sync preloader u1RxDatlat_Save
4042 00:43:57.527139 sync preloader u1RxWinPerbitVref_Save
4043 00:43:57.534095 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4044 00:43:57.537178 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4045 00:43:57.540615 sync preloader delay_cell_unit
4046 00:43:57.544054 just_for_test_dump_coreboot_params dump all params
4047 00:43:57.547083 dump source = 0x0
4048 00:43:57.547476 dump params frequency:1600
4049 00:43:57.550229 dump params rank number:2
4050 00:43:57.550619
4051 00:43:57.553878 dump params write leveling
4052 00:43:57.557876 write leveling[0][0][0] = 0x20
4053 00:43:57.560216 write leveling[0][0][1] = 0x18
4054 00:43:57.560607 write leveling[0][1][0] = 0x22
4055 00:43:57.563850 write leveling[0][1][1] = 0x1a
4056 00:43:57.567471 write leveling[1][0][0] = 0x22
4057 00:43:57.570341 write leveling[1][0][1] = 0x20
4058 00:43:57.574197 write leveling[1][1][0] = 0x25
4059 00:43:57.576810 write leveling[1][1][1] = 0x20
4060 00:43:57.577201 dump params cbt_cs
4061 00:43:57.580518 cbt_cs[0][0] = 0x9
4062 00:43:57.580908 cbt_cs[0][1] = 0x9
4063 00:43:57.583823 cbt_cs[1][0] = 0xa
4064 00:43:57.584435 cbt_cs[1][1] = 0xa
4065 00:43:57.587205 dump params cbt_mr12
4066 00:43:57.587720 cbt_mr12[0][0] = 0x20
4067 00:43:57.590505 cbt_mr12[0][1] = 0x1e
4068 00:43:57.590963 cbt_mr12[1][0] = 0x20
4069 00:43:57.593593 cbt_mr12[1][1] = 0x20
4070 00:43:57.597067 dump params tx window
4071 00:43:57.597549 tx_center_min[0][0][0] = 985
4072 00:43:57.600249 tx_center_max[0][0][0] = 992
4073 00:43:57.603713 tx_center_min[0][0][1] = 978
4074 00:43:57.606852 tx_center_max[0][0][1] = 985
4075 00:43:57.610107 tx_center_min[0][1][0] = 988
4076 00:43:57.610545 tx_center_max[0][1][0] = 995
4077 00:43:57.613524 tx_center_min[0][1][1] = 981
4078 00:43:57.617053 tx_center_max[0][1][1] = 988
4079 00:43:57.620235 tx_center_min[1][0][0] = 990
4080 00:43:57.624007 tx_center_max[1][0][0] = 995
4081 00:43:57.624490 tx_center_min[1][0][1] = 984
4082 00:43:57.626792 tx_center_max[1][0][1] = 992
4083 00:43:57.630483 tx_center_min[1][1][0] = 990
4084 00:43:57.633556 tx_center_max[1][1][0] = 994
4085 00:43:57.633949 tx_center_min[1][1][1] = 982
4086 00:43:57.637123 tx_center_max[1][1][1] = 990
4087 00:43:57.640182 dump params tx window
4088 00:43:57.643573 tx_win_center[0][0][0] = 992
4089 00:43:57.643967 tx_first_pass[0][0][0] = 980
4090 00:43:57.646750 tx_last_pass[0][0][0] = 1004
4091 00:43:57.650147 tx_win_center[0][0][1] = 990
4092 00:43:57.653778 tx_first_pass[0][0][1] = 979
4093 00:43:57.657404 tx_last_pass[0][0][1] = 1002
4094 00:43:57.657874 tx_win_center[0][0][2] = 991
4095 00:43:57.660242 tx_first_pass[0][0][2] = 979
4096 00:43:57.663984 tx_last_pass[0][0][2] = 1003
4097 00:43:57.666554 tx_win_center[0][0][3] = 985
4098 00:43:57.670310 tx_first_pass[0][0][3] = 975
4099 00:43:57.670776 tx_last_pass[0][0][3] = 996
4100 00:43:57.673628 tx_win_center[0][0][4] = 990
4101 00:43:57.676901 tx_first_pass[0][0][4] = 979
4102 00:43:57.680261 tx_last_pass[0][0][4] = 1002
4103 00:43:57.680728 tx_win_center[0][0][5] = 988
4104 00:43:57.683724 tx_first_pass[0][0][5] = 978
4105 00:43:57.686650 tx_last_pass[0][0][5] = 998
4106 00:43:57.690168 tx_win_center[0][0][6] = 989
4107 00:43:57.693338 tx_first_pass[0][0][6] = 978
4108 00:43:57.693805 tx_last_pass[0][0][6] = 1000
4109 00:43:57.696888 tx_win_center[0][0][7] = 990
4110 00:43:57.700021 tx_first_pass[0][0][7] = 979
4111 00:43:57.703774 tx_last_pass[0][0][7] = 1002
4112 00:43:57.707137 tx_win_center[0][0][8] = 978
4113 00:43:57.707604 tx_first_pass[0][0][8] = 967
4114 00:43:57.710061 tx_last_pass[0][0][8] = 989
4115 00:43:57.713372 tx_win_center[0][0][9] = 979
4116 00:43:57.716795 tx_first_pass[0][0][9] = 968
4117 00:43:57.717279 tx_last_pass[0][0][9] = 991
4118 00:43:57.720316 tx_win_center[0][0][10] = 985
4119 00:43:57.723523 tx_first_pass[0][0][10] = 973
4120 00:43:57.726732 tx_last_pass[0][0][10] = 997
4121 00:43:57.730566 tx_win_center[0][0][11] = 979
4122 00:43:57.731040 tx_first_pass[0][0][11] = 968
4123 00:43:57.733122 tx_last_pass[0][0][11] = 990
4124 00:43:57.736806 tx_win_center[0][0][12] = 980
4125 00:43:57.739666 tx_first_pass[0][0][12] = 968
4126 00:43:57.743374 tx_last_pass[0][0][12] = 992
4127 00:43:57.743766 tx_win_center[0][0][13] = 980
4128 00:43:57.746324 tx_first_pass[0][0][13] = 968
4129 00:43:57.750056 tx_last_pass[0][0][13] = 992
4130 00:43:57.753401 tx_win_center[0][0][14] = 981
4131 00:43:57.756870 tx_first_pass[0][0][14] = 969
4132 00:43:57.757374 tx_last_pass[0][0][14] = 993
4133 00:43:57.759866 tx_win_center[0][0][15] = 984
4134 00:43:57.763333 tx_first_pass[0][0][15] = 973
4135 00:43:57.766874 tx_last_pass[0][0][15] = 996
4136 00:43:57.769583 tx_win_center[0][1][0] = 995
4137 00:43:57.769972 tx_first_pass[0][1][0] = 982
4138 00:43:57.773101 tx_last_pass[0][1][0] = 1008
4139 00:43:57.776734 tx_win_center[0][1][1] = 993
4140 00:43:57.779848 tx_first_pass[0][1][1] = 981
4141 00:43:57.783166 tx_last_pass[0][1][1] = 1006
4142 00:43:57.783589 tx_win_center[0][1][2] = 994
4143 00:43:57.786466 tx_first_pass[0][1][2] = 983
4144 00:43:57.789875 tx_last_pass[0][1][2] = 1006
4145 00:43:57.792949 tx_win_center[0][1][3] = 988
4146 00:43:57.796040 tx_first_pass[0][1][3] = 978
4147 00:43:57.796473 tx_last_pass[0][1][3] = 999
4148 00:43:57.799986 tx_win_center[0][1][4] = 994
4149 00:43:57.803355 tx_first_pass[0][1][4] = 982
4150 00:43:57.806585 tx_last_pass[0][1][4] = 1006
4151 00:43:57.807010 tx_win_center[0][1][5] = 990
4152 00:43:57.809969 tx_first_pass[0][1][5] = 979
4153 00:43:57.813013 tx_last_pass[0][1][5] = 1002
4154 00:43:57.816843 tx_win_center[0][1][6] = 991
4155 00:43:57.819574 tx_first_pass[0][1][6] = 980
4156 00:43:57.820004 tx_last_pass[0][1][6] = 1003
4157 00:43:57.823461 tx_win_center[0][1][7] = 993
4158 00:43:57.826599 tx_first_pass[0][1][7] = 981
4159 00:43:57.830246 tx_last_pass[0][1][7] = 1005
4160 00:43:57.830737 tx_win_center[0][1][8] = 981
4161 00:43:57.833206 tx_first_pass[0][1][8] = 969
4162 00:43:57.836610 tx_last_pass[0][1][8] = 994
4163 00:43:57.839523 tx_win_center[0][1][9] = 983
4164 00:43:57.843452 tx_first_pass[0][1][9] = 972
4165 00:43:57.843845 tx_last_pass[0][1][9] = 995
4166 00:43:57.846655 tx_win_center[0][1][10] = 988
4167 00:43:57.849836 tx_first_pass[0][1][10] = 977
4168 00:43:57.853004 tx_last_pass[0][1][10] = 999
4169 00:43:57.856330 tx_win_center[0][1][11] = 982
4170 00:43:57.856836 tx_first_pass[0][1][11] = 970
4171 00:43:57.859349 tx_last_pass[0][1][11] = 995
4172 00:43:57.862676 tx_win_center[0][1][12] = 984
4173 00:43:57.866158 tx_first_pass[0][1][12] = 973
4174 00:43:57.869412 tx_last_pass[0][1][12] = 996
4175 00:43:57.869973 tx_win_center[0][1][13] = 984
4176 00:43:57.872829 tx_first_pass[0][1][13] = 972
4177 00:43:57.876340 tx_last_pass[0][1][13] = 996
4178 00:43:57.879570 tx_win_center[0][1][14] = 984
4179 00:43:57.882624 tx_first_pass[0][1][14] = 972
4180 00:43:57.885889 tx_last_pass[0][1][14] = 997
4181 00:43:57.886309 tx_win_center[0][1][15] = 987
4182 00:43:57.889201 tx_first_pass[0][1][15] = 976
4183 00:43:57.892286 tx_last_pass[0][1][15] = 999
4184 00:43:57.895806 tx_win_center[1][0][0] = 995
4185 00:43:57.899397 tx_first_pass[1][0][0] = 983
4186 00:43:57.899844 tx_last_pass[1][0][0] = 1007
4187 00:43:57.902399 tx_win_center[1][0][1] = 993
4188 00:43:57.905730 tx_first_pass[1][0][1] = 980
4189 00:43:57.908965 tx_last_pass[1][0][1] = 1007
4190 00:43:57.909356 tx_win_center[1][0][2] = 993
4191 00:43:57.912739 tx_first_pass[1][0][2] = 980
4192 00:43:57.915708 tx_last_pass[1][0][2] = 1006
4193 00:43:57.918545 tx_win_center[1][0][3] = 990
4194 00:43:57.922620 tx_first_pass[1][0][3] = 977
4195 00:43:57.923088 tx_last_pass[1][0][3] = 1003
4196 00:43:57.925511 tx_win_center[1][0][4] = 994
4197 00:43:57.929289 tx_first_pass[1][0][4] = 981
4198 00:43:57.932910 tx_last_pass[1][0][4] = 1007
4199 00:43:57.935842 tx_win_center[1][0][5] = 995
4200 00:43:57.936312 tx_first_pass[1][0][5] = 983
4201 00:43:57.938752 tx_last_pass[1][0][5] = 1007
4202 00:43:57.941886 tx_win_center[1][0][6] = 994
4203 00:43:57.945551 tx_first_pass[1][0][6] = 981
4204 00:43:57.948975 tx_last_pass[1][0][6] = 1007
4205 00:43:57.949481 tx_win_center[1][0][7] = 993
4206 00:43:57.952162 tx_first_pass[1][0][7] = 980
4207 00:43:57.955298 tx_last_pass[1][0][7] = 1007
4208 00:43:57.958929 tx_win_center[1][0][8] = 987
4209 00:43:57.962353 tx_first_pass[1][0][8] = 976
4210 00:43:57.962892 tx_last_pass[1][0][8] = 999
4211 00:43:57.965530 tx_win_center[1][0][9] = 987
4212 00:43:57.968710 tx_first_pass[1][0][9] = 976
4213 00:43:57.972516 tx_last_pass[1][0][9] = 999
4214 00:43:57.973028 tx_win_center[1][0][10] = 990
4215 00:43:57.974829 tx_first_pass[1][0][10] = 979
4216 00:43:57.978389 tx_last_pass[1][0][10] = 1002
4217 00:43:57.981937 tx_win_center[1][0][11] = 991
4218 00:43:57.985229 tx_first_pass[1][0][11] = 980
4219 00:43:57.988926 tx_last_pass[1][0][11] = 1002
4220 00:43:57.989433 tx_win_center[1][0][12] = 991
4221 00:43:57.991956 tx_first_pass[1][0][12] = 981
4222 00:43:57.994778 tx_last_pass[1][0][12] = 1001
4223 00:43:57.998243 tx_win_center[1][0][13] = 992
4224 00:43:58.001594 tx_first_pass[1][0][13] = 982
4225 00:43:58.002137 tx_last_pass[1][0][13] = 1002
4226 00:43:58.004738 tx_win_center[1][0][14] = 990
4227 00:43:58.007892 tx_first_pass[1][0][14] = 979
4228 00:43:58.011694 tx_last_pass[1][0][14] = 1001
4229 00:43:58.014675 tx_win_center[1][0][15] = 984
4230 00:43:58.018089 tx_first_pass[1][0][15] = 971
4231 00:43:58.018700 tx_last_pass[1][0][15] = 998
4232 00:43:58.022201 tx_win_center[1][1][0] = 994
4233 00:43:58.025030 tx_first_pass[1][1][0] = 982
4234 00:43:58.027857 tx_last_pass[1][1][0] = 1007
4235 00:43:58.031247 tx_win_center[1][1][1] = 993
4236 00:43:58.031801 tx_first_pass[1][1][1] = 980
4237 00:43:58.034239 tx_last_pass[1][1][1] = 1006
4238 00:43:58.037657 tx_win_center[1][1][2] = 992
4239 00:43:58.041660 tx_first_pass[1][1][2] = 979
4240 00:43:58.042124 tx_last_pass[1][1][2] = 1006
4241 00:43:58.044848 tx_win_center[1][1][3] = 990
4242 00:43:58.047608 tx_first_pass[1][1][3] = 978
4243 00:43:58.050825 tx_last_pass[1][1][3] = 1003
4244 00:43:58.054567 tx_win_center[1][1][4] = 994
4245 00:43:58.054995 tx_first_pass[1][1][4] = 981
4246 00:43:58.058312 tx_last_pass[1][1][4] = 1007
4247 00:43:58.061522 tx_win_center[1][1][5] = 994
4248 00:43:58.064941 tx_first_pass[1][1][5] = 981
4249 00:43:58.067887 tx_last_pass[1][1][5] = 1007
4250 00:43:58.068319 tx_win_center[1][1][6] = 993
4251 00:43:58.070904 tx_first_pass[1][1][6] = 980
4252 00:43:58.074380 tx_last_pass[1][1][6] = 1007
4253 00:43:58.077482 tx_win_center[1][1][7] = 993
4254 00:43:58.080880 tx_first_pass[1][1][7] = 980
4255 00:43:58.081384 tx_last_pass[1][1][7] = 1006
4256 00:43:58.084092 tx_win_center[1][1][8] = 987
4257 00:43:58.087105 tx_first_pass[1][1][8] = 975
4258 00:43:58.090559 tx_last_pass[1][1][8] = 999
4259 00:43:58.090991 tx_win_center[1][1][9] = 986
4260 00:43:58.093896 tx_first_pass[1][1][9] = 974
4261 00:43:58.097534 tx_last_pass[1][1][9] = 998
4262 00:43:58.100848 tx_win_center[1][1][10] = 988
4263 00:43:58.103832 tx_first_pass[1][1][10] = 976
4264 00:43:58.104267 tx_last_pass[1][1][10] = 1000
4265 00:43:58.107153 tx_win_center[1][1][11] = 989
4266 00:43:58.110463 tx_first_pass[1][1][11] = 978
4267 00:43:58.114354 tx_last_pass[1][1][11] = 1000
4268 00:43:58.117479 tx_win_center[1][1][12] = 989
4269 00:43:58.117911 tx_first_pass[1][1][12] = 978
4270 00:43:58.121275 tx_last_pass[1][1][12] = 1001
4271 00:43:58.124071 tx_win_center[1][1][13] = 990
4272 00:43:58.127137 tx_first_pass[1][1][13] = 979
4273 00:43:58.130726 tx_last_pass[1][1][13] = 1001
4274 00:43:58.134109 tx_win_center[1][1][14] = 988
4275 00:43:58.134614 tx_first_pass[1][1][14] = 977
4276 00:43:58.137256 tx_last_pass[1][1][14] = 1000
4277 00:43:58.140668 tx_win_center[1][1][15] = 982
4278 00:43:58.143906 tx_first_pass[1][1][15] = 970
4279 00:43:58.147072 tx_last_pass[1][1][15] = 995
4280 00:43:58.147508 dump params rx window
4281 00:43:58.150872 rx_firspass[0][0][0] = 9
4282 00:43:58.153810 rx_lastpass[0][0][0] = 37
4283 00:43:58.154350 rx_firspass[0][0][1] = 8
4284 00:43:58.156783 rx_lastpass[0][0][1] = 36
4285 00:43:58.160348 rx_firspass[0][0][2] = 10
4286 00:43:58.160778 rx_lastpass[0][0][2] = 37
4287 00:43:58.163574 rx_firspass[0][0][3] = 2
4288 00:43:58.167235 rx_lastpass[0][0][3] = 32
4289 00:43:58.170877 rx_firspass[0][0][4] = 9
4290 00:43:58.171345 rx_lastpass[0][0][4] = 37
4291 00:43:58.173300 rx_firspass[0][0][5] = 5
4292 00:43:58.176673 rx_lastpass[0][0][5] = 32
4293 00:43:58.177063 rx_firspass[0][0][6] = 6
4294 00:43:58.180000 rx_lastpass[0][0][6] = 35
4295 00:43:58.183311 rx_firspass[0][0][7] = 10
4296 00:43:58.183696 rx_lastpass[0][0][7] = 35
4297 00:43:58.187159 rx_firspass[0][0][8] = 4
4298 00:43:58.190128 rx_lastpass[0][0][8] = 31
4299 00:43:58.193489 rx_firspass[0][0][9] = 6
4300 00:43:58.194032 rx_lastpass[0][0][9] = 32
4301 00:43:58.196683 rx_firspass[0][0][10] = 12
4302 00:43:58.200103 rx_lastpass[0][0][10] = 39
4303 00:43:58.200555 rx_firspass[0][0][11] = 5
4304 00:43:58.203812 rx_lastpass[0][0][11] = 31
4305 00:43:58.206759 rx_firspass[0][0][12] = 6
4306 00:43:58.210038 rx_lastpass[0][0][12] = 34
4307 00:43:58.210430 rx_firspass[0][0][13] = 7
4308 00:43:58.213483 rx_lastpass[0][0][13] = 32
4309 00:43:58.216882 rx_firspass[0][0][14] = 8
4310 00:43:58.219738 rx_lastpass[0][0][14] = 35
4311 00:43:58.220129 rx_firspass[0][0][15] = 10
4312 00:43:58.223536 rx_lastpass[0][0][15] = 36
4313 00:43:58.226468 rx_firspass[0][1][0] = 10
4314 00:43:58.229601 rx_lastpass[0][1][0] = 39
4315 00:43:58.230007 rx_firspass[0][1][1] = 8
4316 00:43:58.233021 rx_lastpass[0][1][1] = 39
4317 00:43:58.236617 rx_firspass[0][1][2] = 10
4318 00:43:58.236965 rx_lastpass[0][1][2] = 39
4319 00:43:58.240010 rx_firspass[0][1][3] = 2
4320 00:43:58.243214 rx_lastpass[0][1][3] = 32
4321 00:43:58.243603 rx_firspass[0][1][4] = 10
4322 00:43:58.246697 rx_lastpass[0][1][4] = 37
4323 00:43:58.249430 rx_firspass[0][1][5] = 4
4324 00:43:58.253060 rx_lastpass[0][1][5] = 34
4325 00:43:58.253526 rx_firspass[0][1][6] = 5
4326 00:43:58.256201 rx_lastpass[0][1][6] = 35
4327 00:43:58.259629 rx_firspass[0][1][7] = 7
4328 00:43:58.260093 rx_lastpass[0][1][7] = 37
4329 00:43:58.262771 rx_firspass[0][1][8] = 3
4330 00:43:58.266275 rx_lastpass[0][1][8] = 32
4331 00:43:58.270235 rx_firspass[0][1][9] = 6
4332 00:43:58.270701 rx_lastpass[0][1][9] = 34
4333 00:43:58.273050 rx_firspass[0][1][10] = 12
4334 00:43:58.276514 rx_lastpass[0][1][10] = 41
4335 00:43:58.277041 rx_firspass[0][1][11] = 4
4336 00:43:58.280165 rx_lastpass[0][1][11] = 32
4337 00:43:58.283425 rx_firspass[0][1][12] = 6
4338 00:43:58.286693 rx_lastpass[0][1][12] = 36
4339 00:43:58.287191 rx_firspass[0][1][13] = 9
4340 00:43:58.289793 rx_lastpass[0][1][13] = 34
4341 00:43:58.293216 rx_firspass[0][1][14] = 8
4342 00:43:58.295935 rx_lastpass[0][1][14] = 37
4343 00:43:58.296359 rx_firspass[0][1][15] = 11
4344 00:43:58.299517 rx_lastpass[0][1][15] = 39
4345 00:43:58.302938 rx_firspass[1][0][0] = 8
4346 00:43:58.303380 rx_lastpass[1][0][0] = 37
4347 00:43:58.306101 rx_firspass[1][0][1] = 7
4348 00:43:58.309583 rx_lastpass[1][0][1] = 35
4349 00:43:58.310043 rx_firspass[1][0][2] = 5
4350 00:43:58.313041 rx_lastpass[1][0][2] = 35
4351 00:43:58.316170 rx_firspass[1][0][3] = 5
4352 00:43:58.319513 rx_lastpass[1][0][3] = 32
4353 00:43:58.320010 rx_firspass[1][0][4] = 7
4354 00:43:58.322893 rx_lastpass[1][0][4] = 36
4355 00:43:58.326787 rx_firspass[1][0][5] = 9
4356 00:43:58.327286 rx_lastpass[1][0][5] = 37
4357 00:43:58.329565 rx_firspass[1][0][6] = 11
4358 00:43:58.333025 rx_lastpass[1][0][6] = 37
4359 00:43:58.333517 rx_firspass[1][0][7] = 9
4360 00:43:58.336553 rx_lastpass[1][0][7] = 36
4361 00:43:58.339313 rx_firspass[1][0][8] = 5
4362 00:43:58.342907 rx_lastpass[1][0][8] = 32
4363 00:43:58.343329 rx_firspass[1][0][9] = 3
4364 00:43:58.346009 rx_lastpass[1][0][9] = 31
4365 00:43:58.349976 rx_firspass[1][0][10] = 6
4366 00:43:58.352985 rx_lastpass[1][0][10] = 36
4367 00:43:58.353484 rx_firspass[1][0][11] = 7
4368 00:43:58.356206 rx_lastpass[1][0][11] = 36
4369 00:43:58.359616 rx_firspass[1][0][12] = 9
4370 00:43:58.360120 rx_lastpass[1][0][12] = 35
4371 00:43:58.362810 rx_firspass[1][0][13] = 8
4372 00:43:58.366180 rx_lastpass[1][0][13] = 36
4373 00:43:58.369330 rx_firspass[1][0][14] = 8
4374 00:43:58.369760 rx_lastpass[1][0][14] = 34
4375 00:43:58.372525 rx_firspass[1][0][15] = 4
4376 00:43:58.375901 rx_lastpass[1][0][15] = 28
4377 00:43:58.376413 rx_firspass[1][1][0] = 7
4378 00:43:58.379065 rx_lastpass[1][1][0] = 38
4379 00:43:58.382306 rx_firspass[1][1][1] = 7
4380 00:43:58.386068 rx_lastpass[1][1][1] = 37
4381 00:43:58.386498 rx_firspass[1][1][2] = 4
4382 00:43:58.389077 rx_lastpass[1][1][2] = 35
4383 00:43:58.392469 rx_firspass[1][1][3] = 3
4384 00:43:58.392900 rx_lastpass[1][1][3] = 33
4385 00:43:58.395439 rx_firspass[1][1][4] = 5
4386 00:43:58.398951 rx_lastpass[1][1][4] = 37
4387 00:43:58.399384 rx_firspass[1][1][5] = 8
4388 00:43:58.402458 rx_lastpass[1][1][5] = 39
4389 00:43:58.405731 rx_firspass[1][1][6] = 9
4390 00:43:58.409255 rx_lastpass[1][1][6] = 40
4391 00:43:58.409760 rx_firspass[1][1][7] = 8
4392 00:43:58.412566 rx_lastpass[1][1][7] = 36
4393 00:43:58.415502 rx_firspass[1][1][8] = 3
4394 00:43:58.415934 rx_lastpass[1][1][8] = 32
4395 00:43:58.419428 rx_firspass[1][1][9] = 2
4396 00:43:58.422525 rx_lastpass[1][1][9] = 32
4397 00:43:58.422917 rx_firspass[1][1][10] = 6
4398 00:43:58.426110 rx_lastpass[1][1][10] = 37
4399 00:43:58.429338 rx_firspass[1][1][11] = 7
4400 00:43:58.432630 rx_lastpass[1][1][11] = 37
4401 00:43:58.433138 rx_firspass[1][1][12] = 7
4402 00:43:58.435585 rx_lastpass[1][1][12] = 36
4403 00:43:58.439403 rx_firspass[1][1][13] = 6
4404 00:43:58.442367 rx_lastpass[1][1][13] = 37
4405 00:43:58.442798 rx_firspass[1][1][14] = 7
4406 00:43:58.445553 rx_lastpass[1][1][14] = 36
4407 00:43:58.448967 rx_firspass[1][1][15] = 1
4408 00:43:58.449477 rx_lastpass[1][1][15] = 29
4409 00:43:58.452398 dump params clk_delay
4410 00:43:58.455914 clk_delay[0] = 2
4411 00:43:58.456453 clk_delay[1] = 0
4412 00:43:58.459106 dump params dqs_delay
4413 00:43:58.459577 dqs_delay[0][0] = 0
4414 00:43:58.461956 dqs_delay[0][1] = -1
4415 00:43:58.462433 dqs_delay[1][0] = 0
4416 00:43:58.465415 dqs_delay[1][1] = 0
4417 00:43:58.468837 dump params delay_cell_unit = 844
4418 00:43:58.469265 dump source = 0x0
4419 00:43:58.472631 dump params frequency:1200
4420 00:43:58.475875 dump params rank number:2
4421 00:43:58.476298
4422 00:43:58.476625 dump params write leveling
4423 00:43:58.479134 write leveling[0][0][0] = 0x0
4424 00:43:58.482514 write leveling[0][0][1] = 0x0
4425 00:43:58.485568 write leveling[0][1][0] = 0x0
4426 00:43:58.488784 write leveling[0][1][1] = 0x0
4427 00:43:58.489290 write leveling[1][0][0] = 0x0
4428 00:43:58.492148 write leveling[1][0][1] = 0x0
4429 00:43:58.495647 write leveling[1][1][0] = 0x0
4430 00:43:58.498616 write leveling[1][1][1] = 0x0
4431 00:43:58.499044 dump params cbt_cs
4432 00:43:58.502110 cbt_cs[0][0] = 0x0
4433 00:43:58.502537 cbt_cs[0][1] = 0x0
4434 00:43:58.505184 cbt_cs[1][0] = 0x0
4435 00:43:58.505607 cbt_cs[1][1] = 0x0
4436 00:43:58.509260 dump params cbt_mr12
4437 00:43:58.511831 cbt_mr12[0][0] = 0x0
4438 00:43:58.512273 cbt_mr12[0][1] = 0x0
4439 00:43:58.515530 cbt_mr12[1][0] = 0x0
4440 00:43:58.516160 cbt_mr12[1][1] = 0x0
4441 00:43:58.518768 dump params tx window
4442 00:43:58.522080 tx_center_min[0][0][0] = 0
4443 00:43:58.522512 tx_center_max[0][0][0] = 0
4444 00:43:58.525148 tx_center_min[0][0][1] = 0
4445 00:43:58.528651 tx_center_max[0][0][1] = 0
4446 00:43:58.532321 tx_center_min[0][1][0] = 0
4447 00:43:58.532830 tx_center_max[0][1][0] = 0
4448 00:43:58.535084 tx_center_min[0][1][1] = 0
4449 00:43:58.538465 tx_center_max[0][1][1] = 0
4450 00:43:58.541714 tx_center_min[1][0][0] = 0
4451 00:43:58.542172 tx_center_max[1][0][0] = 0
4452 00:43:58.545470 tx_center_min[1][0][1] = 0
4453 00:43:58.549001 tx_center_max[1][0][1] = 0
4454 00:43:58.552183 tx_center_min[1][1][0] = 0
4455 00:43:58.552689 tx_center_max[1][1][0] = 0
4456 00:43:58.555237 tx_center_min[1][1][1] = 0
4457 00:43:58.558902 tx_center_max[1][1][1] = 0
4458 00:43:58.559335 dump params tx window
4459 00:43:58.561812 tx_win_center[0][0][0] = 0
4460 00:43:58.564878 tx_first_pass[0][0][0] = 0
4461 00:43:58.568593 tx_last_pass[0][0][0] = 0
4462 00:43:58.569110 tx_win_center[0][0][1] = 0
4463 00:43:58.572004 tx_first_pass[0][0][1] = 0
4464 00:43:58.575248 tx_last_pass[0][0][1] = 0
4465 00:43:58.575755 tx_win_center[0][0][2] = 0
4466 00:43:58.578514 tx_first_pass[0][0][2] = 0
4467 00:43:58.581632 tx_last_pass[0][0][2] = 0
4468 00:43:58.584705 tx_win_center[0][0][3] = 0
4469 00:43:58.585128 tx_first_pass[0][0][3] = 0
4470 00:43:58.588913 tx_last_pass[0][0][3] = 0
4471 00:43:58.591667 tx_win_center[0][0][4] = 0
4472 00:43:58.595319 tx_first_pass[0][0][4] = 0
4473 00:43:58.595827 tx_last_pass[0][0][4] = 0
4474 00:43:58.598302 tx_win_center[0][0][5] = 0
4475 00:43:58.602104 tx_first_pass[0][0][5] = 0
4476 00:43:58.602611 tx_last_pass[0][0][5] = 0
4477 00:43:58.604468 tx_win_center[0][0][6] = 0
4478 00:43:58.608756 tx_first_pass[0][0][6] = 0
4479 00:43:58.611862 tx_last_pass[0][0][6] = 0
4480 00:43:58.612366 tx_win_center[0][0][7] = 0
4481 00:43:58.615212 tx_first_pass[0][0][7] = 0
4482 00:43:58.618464 tx_last_pass[0][0][7] = 0
4483 00:43:58.621833 tx_win_center[0][0][8] = 0
4484 00:43:58.622308 tx_first_pass[0][0][8] = 0
4485 00:43:58.624627 tx_last_pass[0][0][8] = 0
4486 00:43:58.628211 tx_win_center[0][0][9] = 0
4487 00:43:58.628640 tx_first_pass[0][0][9] = 0
4488 00:43:58.631260 tx_last_pass[0][0][9] = 0
4489 00:43:58.634470 tx_win_center[0][0][10] = 0
4490 00:43:58.637825 tx_first_pass[0][0][10] = 0
4491 00:43:58.638373 tx_last_pass[0][0][10] = 0
4492 00:43:58.641362 tx_win_center[0][0][11] = 0
4493 00:43:58.644678 tx_first_pass[0][0][11] = 0
4494 00:43:58.647967 tx_last_pass[0][0][11] = 0
4495 00:43:58.648399 tx_win_center[0][0][12] = 0
4496 00:43:58.651732 tx_first_pass[0][0][12] = 0
4497 00:43:58.655192 tx_last_pass[0][0][12] = 0
4498 00:43:58.657814 tx_win_center[0][0][13] = 0
4499 00:43:58.660929 tx_first_pass[0][0][13] = 0
4500 00:43:58.661444 tx_last_pass[0][0][13] = 0
4501 00:43:58.664247 tx_win_center[0][0][14] = 0
4502 00:43:58.667975 tx_first_pass[0][0][14] = 0
4503 00:43:58.668370 tx_last_pass[0][0][14] = 0
4504 00:43:58.671050 tx_win_center[0][0][15] = 0
4505 00:43:58.674776 tx_first_pass[0][0][15] = 0
4506 00:43:58.678014 tx_last_pass[0][0][15] = 0
4507 00:43:58.678413 tx_win_center[0][1][0] = 0
4508 00:43:58.681156 tx_first_pass[0][1][0] = 0
4509 00:43:58.684379 tx_last_pass[0][1][0] = 0
4510 00:43:58.687791 tx_win_center[0][1][1] = 0
4511 00:43:58.688180 tx_first_pass[0][1][1] = 0
4512 00:43:58.691037 tx_last_pass[0][1][1] = 0
4513 00:43:58.694688 tx_win_center[0][1][2] = 0
4514 00:43:58.697467 tx_first_pass[0][1][2] = 0
4515 00:43:58.697858 tx_last_pass[0][1][2] = 0
4516 00:43:58.700943 tx_win_center[0][1][3] = 0
4517 00:43:58.704597 tx_first_pass[0][1][3] = 0
4518 00:43:58.704988 tx_last_pass[0][1][3] = 0
4519 00:43:58.707684 tx_win_center[0][1][4] = 0
4520 00:43:58.710957 tx_first_pass[0][1][4] = 0
4521 00:43:58.714325 tx_last_pass[0][1][4] = 0
4522 00:43:58.714747 tx_win_center[0][1][5] = 0
4523 00:43:58.717725 tx_first_pass[0][1][5] = 0
4524 00:43:58.720911 tx_last_pass[0][1][5] = 0
4525 00:43:58.724243 tx_win_center[0][1][6] = 0
4526 00:43:58.724638 tx_first_pass[0][1][6] = 0
4527 00:43:58.727586 tx_last_pass[0][1][6] = 0
4528 00:43:58.731022 tx_win_center[0][1][7] = 0
4529 00:43:58.731414 tx_first_pass[0][1][7] = 0
4530 00:43:58.734439 tx_last_pass[0][1][7] = 0
4531 00:43:58.738021 tx_win_center[0][1][8] = 0
4532 00:43:58.741632 tx_first_pass[0][1][8] = 0
4533 00:43:58.742077 tx_last_pass[0][1][8] = 0
4534 00:43:58.744402 tx_win_center[0][1][9] = 0
4535 00:43:58.748010 tx_first_pass[0][1][9] = 0
4536 00:43:58.748398 tx_last_pass[0][1][9] = 0
4537 00:43:58.751269 tx_win_center[0][1][10] = 0
4538 00:43:58.754859 tx_first_pass[0][1][10] = 0
4539 00:43:58.757798 tx_last_pass[0][1][10] = 0
4540 00:43:58.758251 tx_win_center[0][1][11] = 0
4541 00:43:58.761336 tx_first_pass[0][1][11] = 0
4542 00:43:58.764104 tx_last_pass[0][1][11] = 0
4543 00:43:58.767748 tx_win_center[0][1][12] = 0
4544 00:43:58.770719 tx_first_pass[0][1][12] = 0
4545 00:43:58.771109 tx_last_pass[0][1][12] = 0
4546 00:43:58.773948 tx_win_center[0][1][13] = 0
4547 00:43:58.777489 tx_first_pass[0][1][13] = 0
4548 00:43:58.780912 tx_last_pass[0][1][13] = 0
4549 00:43:58.781316 tx_win_center[0][1][14] = 0
4550 00:43:58.783956 tx_first_pass[0][1][14] = 0
4551 00:43:58.787389 tx_last_pass[0][1][14] = 0
4552 00:43:58.790732 tx_win_center[0][1][15] = 0
4553 00:43:58.791117 tx_first_pass[0][1][15] = 0
4554 00:43:58.793850 tx_last_pass[0][1][15] = 0
4555 00:43:58.797545 tx_win_center[1][0][0] = 0
4556 00:43:58.800811 tx_first_pass[1][0][0] = 0
4557 00:43:58.801213 tx_last_pass[1][0][0] = 0
4558 00:43:58.803966 tx_win_center[1][0][1] = 0
4559 00:43:58.807141 tx_first_pass[1][0][1] = 0
4560 00:43:58.807536 tx_last_pass[1][0][1] = 0
4561 00:43:58.810532 tx_win_center[1][0][2] = 0
4562 00:43:58.813912 tx_first_pass[1][0][2] = 0
4563 00:43:58.817294 tx_last_pass[1][0][2] = 0
4564 00:43:58.817699 tx_win_center[1][0][3] = 0
4565 00:43:58.820856 tx_first_pass[1][0][3] = 0
4566 00:43:58.823904 tx_last_pass[1][0][3] = 0
4567 00:43:58.827429 tx_win_center[1][0][4] = 0
4568 00:43:58.827900 tx_first_pass[1][0][4] = 0
4569 00:43:58.830394 tx_last_pass[1][0][4] = 0
4570 00:43:58.833558 tx_win_center[1][0][5] = 0
4571 00:43:58.837191 tx_first_pass[1][0][5] = 0
4572 00:43:58.837579 tx_last_pass[1][0][5] = 0
4573 00:43:58.840515 tx_win_center[1][0][6] = 0
4574 00:43:58.843873 tx_first_pass[1][0][6] = 0
4575 00:43:58.844354 tx_last_pass[1][0][6] = 0
4576 00:43:58.847537 tx_win_center[1][0][7] = 0
4577 00:43:58.850164 tx_first_pass[1][0][7] = 0
4578 00:43:58.853932 tx_last_pass[1][0][7] = 0
4579 00:43:58.854450 tx_win_center[1][0][8] = 0
4580 00:43:58.857050 tx_first_pass[1][0][8] = 0
4581 00:43:58.860428 tx_last_pass[1][0][8] = 0
4582 00:43:58.860900 tx_win_center[1][0][9] = 0
4583 00:43:58.863983 tx_first_pass[1][0][9] = 0
4584 00:43:58.867534 tx_last_pass[1][0][9] = 0
4585 00:43:58.870641 tx_win_center[1][0][10] = 0
4586 00:43:58.871072 tx_first_pass[1][0][10] = 0
4587 00:43:58.873905 tx_last_pass[1][0][10] = 0
4588 00:43:58.877339 tx_win_center[1][0][11] = 0
4589 00:43:58.880585 tx_first_pass[1][0][11] = 0
4590 00:43:58.881096 tx_last_pass[1][0][11] = 0
4591 00:43:58.883583 tx_win_center[1][0][12] = 0
4592 00:43:58.886935 tx_first_pass[1][0][12] = 0
4593 00:43:58.890533 tx_last_pass[1][0][12] = 0
4594 00:43:58.891045 tx_win_center[1][0][13] = 0
4595 00:43:58.893849 tx_first_pass[1][0][13] = 0
4596 00:43:58.897065 tx_last_pass[1][0][13] = 0
4597 00:43:58.900430 tx_win_center[1][0][14] = 0
4598 00:43:58.900863 tx_first_pass[1][0][14] = 0
4599 00:43:58.903528 tx_last_pass[1][0][14] = 0
4600 00:43:58.907189 tx_win_center[1][0][15] = 0
4601 00:43:58.910145 tx_first_pass[1][0][15] = 0
4602 00:43:58.910533 tx_last_pass[1][0][15] = 0
4603 00:43:58.913545 tx_win_center[1][1][0] = 0
4604 00:43:58.916568 tx_first_pass[1][1][0] = 0
4605 00:43:58.920693 tx_last_pass[1][1][0] = 0
4606 00:43:58.921200 tx_win_center[1][1][1] = 0
4607 00:43:58.923703 tx_first_pass[1][1][1] = 0
4608 00:43:58.926719 tx_last_pass[1][1][1] = 0
4609 00:43:58.927106 tx_win_center[1][1][2] = 0
4610 00:43:58.930198 tx_first_pass[1][1][2] = 0
4611 00:43:58.934259 tx_last_pass[1][1][2] = 0
4612 00:43:58.937551 tx_win_center[1][1][3] = 0
4613 00:43:58.938095 tx_first_pass[1][1][3] = 0
4614 00:43:58.940187 tx_last_pass[1][1][3] = 0
4615 00:43:58.943554 tx_win_center[1][1][4] = 0
4616 00:43:58.946616 tx_first_pass[1][1][4] = 0
4617 00:43:58.947044 tx_last_pass[1][1][4] = 0
4618 00:43:58.950147 tx_win_center[1][1][5] = 0
4619 00:43:58.953601 tx_first_pass[1][1][5] = 0
4620 00:43:58.956670 tx_last_pass[1][1][5] = 0
4621 00:43:58.957106 tx_win_center[1][1][6] = 0
4622 00:43:58.959801 tx_first_pass[1][1][6] = 0
4623 00:43:58.963232 tx_last_pass[1][1][6] = 0
4624 00:43:58.963624 tx_win_center[1][1][7] = 0
4625 00:43:58.967216 tx_first_pass[1][1][7] = 0
4626 00:43:58.969856 tx_last_pass[1][1][7] = 0
4627 00:43:58.973913 tx_win_center[1][1][8] = 0
4628 00:43:58.974473 tx_first_pass[1][1][8] = 0
4629 00:43:58.977026 tx_last_pass[1][1][8] = 0
4630 00:43:58.980151 tx_win_center[1][1][9] = 0
4631 00:43:58.983268 tx_first_pass[1][1][9] = 0
4632 00:43:58.983779 tx_last_pass[1][1][9] = 0
4633 00:43:58.986825 tx_win_center[1][1][10] = 0
4634 00:43:58.990743 tx_first_pass[1][1][10] = 0
4635 00:43:58.993252 tx_last_pass[1][1][10] = 0
4636 00:43:58.993804 tx_win_center[1][1][11] = 0
4637 00:43:58.996648 tx_first_pass[1][1][11] = 0
4638 00:43:59.000492 tx_last_pass[1][1][11] = 0
4639 00:43:59.003516 tx_win_center[1][1][12] = 0
4640 00:43:59.003949 tx_first_pass[1][1][12] = 0
4641 00:43:59.006251 tx_last_pass[1][1][12] = 0
4642 00:43:59.009533 tx_win_center[1][1][13] = 0
4643 00:43:59.013019 tx_first_pass[1][1][13] = 0
4644 00:43:59.013591 tx_last_pass[1][1][13] = 0
4645 00:43:59.016452 tx_win_center[1][1][14] = 0
4646 00:43:59.019855 tx_first_pass[1][1][14] = 0
4647 00:43:59.022913 tx_last_pass[1][1][14] = 0
4648 00:43:59.023490 tx_win_center[1][1][15] = 0
4649 00:43:59.026435 tx_first_pass[1][1][15] = 0
4650 00:43:59.029720 tx_last_pass[1][1][15] = 0
4651 00:43:59.030275 dump params rx window
4652 00:43:59.032881 rx_firspass[0][0][0] = 0
4653 00:43:59.036501 rx_lastpass[0][0][0] = 0
4654 00:43:59.036933 rx_firspass[0][0][1] = 0
4655 00:43:59.039363 rx_lastpass[0][0][1] = 0
4656 00:43:59.042863 rx_firspass[0][0][2] = 0
4657 00:43:59.046077 rx_lastpass[0][0][2] = 0
4658 00:43:59.046467 rx_firspass[0][0][3] = 0
4659 00:43:59.049923 rx_lastpass[0][0][3] = 0
4660 00:43:59.052834 rx_firspass[0][0][4] = 0
4661 00:43:59.053236 rx_lastpass[0][0][4] = 0
4662 00:43:59.056182 rx_firspass[0][0][5] = 0
4663 00:43:59.059798 rx_lastpass[0][0][5] = 0
4664 00:43:59.060270 rx_firspass[0][0][6] = 0
4665 00:43:59.062931 rx_lastpass[0][0][6] = 0
4666 00:43:59.066327 rx_firspass[0][0][7] = 0
4667 00:43:59.066724 rx_lastpass[0][0][7] = 0
4668 00:43:59.069404 rx_firspass[0][0][8] = 0
4669 00:43:59.073015 rx_lastpass[0][0][8] = 0
4670 00:43:59.076544 rx_firspass[0][0][9] = 0
4671 00:43:59.077057 rx_lastpass[0][0][9] = 0
4672 00:43:59.079620 rx_firspass[0][0][10] = 0
4673 00:43:59.082675 rx_lastpass[0][0][10] = 0
4674 00:43:59.083107 rx_firspass[0][0][11] = 0
4675 00:43:59.086642 rx_lastpass[0][0][11] = 0
4676 00:43:59.089271 rx_firspass[0][0][12] = 0
4677 00:43:59.089708 rx_lastpass[0][0][12] = 0
4678 00:43:59.093044 rx_firspass[0][0][13] = 0
4679 00:43:59.096017 rx_lastpass[0][0][13] = 0
4680 00:43:59.099023 rx_firspass[0][0][14] = 0
4681 00:43:59.099469 rx_lastpass[0][0][14] = 0
4682 00:43:59.102686 rx_firspass[0][0][15] = 0
4683 00:43:59.105901 rx_lastpass[0][0][15] = 0
4684 00:43:59.106367 rx_firspass[0][1][0] = 0
4685 00:43:59.109354 rx_lastpass[0][1][0] = 0
4686 00:43:59.112943 rx_firspass[0][1][1] = 0
4687 00:43:59.116335 rx_lastpass[0][1][1] = 0
4688 00:43:59.116763 rx_firspass[0][1][2] = 0
4689 00:43:59.119138 rx_lastpass[0][1][2] = 0
4690 00:43:59.122973 rx_firspass[0][1][3] = 0
4691 00:43:59.123487 rx_lastpass[0][1][3] = 0
4692 00:43:59.126152 rx_firspass[0][1][4] = 0
4693 00:43:59.129966 rx_lastpass[0][1][4] = 0
4694 00:43:59.130533 rx_firspass[0][1][5] = 0
4695 00:43:59.132377 rx_lastpass[0][1][5] = 0
4696 00:43:59.135959 rx_firspass[0][1][6] = 0
4697 00:43:59.136469 rx_lastpass[0][1][6] = 0
4698 00:43:59.139286 rx_firspass[0][1][7] = 0
4699 00:43:59.142570 rx_lastpass[0][1][7] = 0
4700 00:43:59.143045 rx_firspass[0][1][8] = 0
4701 00:43:59.145734 rx_lastpass[0][1][8] = 0
4702 00:43:59.149219 rx_firspass[0][1][9] = 0
4703 00:43:59.149646 rx_lastpass[0][1][9] = 0
4704 00:43:59.152615 rx_firspass[0][1][10] = 0
4705 00:43:59.156240 rx_lastpass[0][1][10] = 0
4706 00:43:59.159478 rx_firspass[0][1][11] = 0
4707 00:43:59.159988 rx_lastpass[0][1][11] = 0
4708 00:43:59.162668 rx_firspass[0][1][12] = 0
4709 00:43:59.166459 rx_lastpass[0][1][12] = 0
4710 00:43:59.166978 rx_firspass[0][1][13] = 0
4711 00:43:59.169124 rx_lastpass[0][1][13] = 0
4712 00:43:59.173097 rx_firspass[0][1][14] = 0
4713 00:43:59.175714 rx_lastpass[0][1][14] = 0
4714 00:43:59.176228 rx_firspass[0][1][15] = 0
4715 00:43:59.179354 rx_lastpass[0][1][15] = 0
4716 00:43:59.182432 rx_firspass[1][0][0] = 0
4717 00:43:59.182946 rx_lastpass[1][0][0] = 0
4718 00:43:59.185800 rx_firspass[1][0][1] = 0
4719 00:43:59.189001 rx_lastpass[1][0][1] = 0
4720 00:43:59.189520 rx_firspass[1][0][2] = 0
4721 00:43:59.192431 rx_lastpass[1][0][2] = 0
4722 00:43:59.195594 rx_firspass[1][0][3] = 0
4723 00:43:59.199129 rx_lastpass[1][0][3] = 0
4724 00:43:59.199620 rx_firspass[1][0][4] = 0
4725 00:43:59.202386 rx_lastpass[1][0][4] = 0
4726 00:43:59.205483 rx_firspass[1][0][5] = 0
4727 00:43:59.206001 rx_lastpass[1][0][5] = 0
4728 00:43:59.209073 rx_firspass[1][0][6] = 0
4729 00:43:59.212247 rx_lastpass[1][0][6] = 0
4730 00:43:59.212674 rx_firspass[1][0][7] = 0
4731 00:43:59.215460 rx_lastpass[1][0][7] = 0
4732 00:43:59.219115 rx_firspass[1][0][8] = 0
4733 00:43:59.219547 rx_lastpass[1][0][8] = 0
4734 00:43:59.222610 rx_firspass[1][0][9] = 0
4735 00:43:59.225611 rx_lastpass[1][0][9] = 0
4736 00:43:59.228791 rx_firspass[1][0][10] = 0
4737 00:43:59.229320 rx_lastpass[1][0][10] = 0
4738 00:43:59.232357 rx_firspass[1][0][11] = 0
4739 00:43:59.235786 rx_lastpass[1][0][11] = 0
4740 00:43:59.236294 rx_firspass[1][0][12] = 0
4741 00:43:59.239033 rx_lastpass[1][0][12] = 0
4742 00:43:59.242135 rx_firspass[1][0][13] = 0
4743 00:43:59.245487 rx_lastpass[1][0][13] = 0
4744 00:43:59.245917 rx_firspass[1][0][14] = 0
4745 00:43:59.249181 rx_lastpass[1][0][14] = 0
4746 00:43:59.252355 rx_firspass[1][0][15] = 0
4747 00:43:59.252861 rx_lastpass[1][0][15] = 0
4748 00:43:59.255867 rx_firspass[1][1][0] = 0
4749 00:43:59.259242 rx_lastpass[1][1][0] = 0
4750 00:43:59.259748 rx_firspass[1][1][1] = 0
4751 00:43:59.262471 rx_lastpass[1][1][1] = 0
4752 00:43:59.265352 rx_firspass[1][1][2] = 0
4753 00:43:59.265775 rx_lastpass[1][1][2] = 0
4754 00:43:59.268736 rx_firspass[1][1][3] = 0
4755 00:43:59.272693 rx_lastpass[1][1][3] = 0
4756 00:43:59.275851 rx_firspass[1][1][4] = 0
4757 00:43:59.276360 rx_lastpass[1][1][4] = 0
4758 00:43:59.279347 rx_firspass[1][1][5] = 0
4759 00:43:59.282193 rx_lastpass[1][1][5] = 0
4760 00:43:59.282703 rx_firspass[1][1][6] = 0
4761 00:43:59.285854 rx_lastpass[1][1][6] = 0
4762 00:43:59.288878 rx_firspass[1][1][7] = 0
4763 00:43:59.289389 rx_lastpass[1][1][7] = 0
4764 00:43:59.292028 rx_firspass[1][1][8] = 0
4765 00:43:59.295362 rx_lastpass[1][1][8] = 0
4766 00:43:59.295867 rx_firspass[1][1][9] = 0
4767 00:43:59.299258 rx_lastpass[1][1][9] = 0
4768 00:43:59.302133 rx_firspass[1][1][10] = 0
4769 00:43:59.305131 rx_lastpass[1][1][10] = 0
4770 00:43:59.305626 rx_firspass[1][1][11] = 0
4771 00:43:59.308411 rx_lastpass[1][1][11] = 0
4772 00:43:59.312352 rx_firspass[1][1][12] = 0
4773 00:43:59.312865 rx_lastpass[1][1][12] = 0
4774 00:43:59.315652 rx_firspass[1][1][13] = 0
4775 00:43:59.318534 rx_lastpass[1][1][13] = 0
4776 00:43:59.321627 rx_firspass[1][1][14] = 0
4777 00:43:59.322099 rx_lastpass[1][1][14] = 0
4778 00:43:59.325262 rx_firspass[1][1][15] = 0
4779 00:43:59.328731 rx_lastpass[1][1][15] = 0
4780 00:43:59.329240 dump params clk_delay
4781 00:43:59.332017 clk_delay[0] = 0
4782 00:43:59.332530 clk_delay[1] = 0
4783 00:43:59.335427 dump params dqs_delay
4784 00:43:59.335935 dqs_delay[0][0] = 0
4785 00:43:59.338693 dqs_delay[0][1] = 0
4786 00:43:59.339121 dqs_delay[1][0] = 0
4787 00:43:59.342460 dqs_delay[1][1] = 0
4788 00:43:59.345734 dump params delay_cell_unit = 844
4789 00:43:59.346307 dump source = 0x0
4790 00:43:59.348805 dump params frequency:800
4791 00:43:59.351849 dump params rank number:2
4792 00:43:59.352447
4793 00:43:59.354953 dump params write leveling
4794 00:43:59.355433 write leveling[0][0][0] = 0x0
4795 00:43:59.358285 write leveling[0][0][1] = 0x0
4796 00:43:59.361891 write leveling[0][1][0] = 0x0
4797 00:43:59.365051 write leveling[0][1][1] = 0x0
4798 00:43:59.369547 write leveling[1][0][0] = 0x0
4799 00:43:59.370102 write leveling[1][0][1] = 0x0
4800 00:43:59.371965 write leveling[1][1][0] = 0x0
4801 00:43:59.375296 write leveling[1][1][1] = 0x0
4802 00:43:59.378233 dump params cbt_cs
4803 00:43:59.378744 cbt_cs[0][0] = 0x0
4804 00:43:59.381853 cbt_cs[0][1] = 0x0
4805 00:43:59.382392 cbt_cs[1][0] = 0x0
4806 00:43:59.385227 cbt_cs[1][1] = 0x0
4807 00:43:59.385681 dump params cbt_mr12
4808 00:43:59.388750 cbt_mr12[0][0] = 0x0
4809 00:43:59.389280 cbt_mr12[0][1] = 0x0
4810 00:43:59.391406 cbt_mr12[1][0] = 0x0
4811 00:43:59.391833 cbt_mr12[1][1] = 0x0
4812 00:43:59.395236 dump params tx window
4813 00:43:59.398312 tx_center_min[0][0][0] = 0
4814 00:43:59.401750 tx_center_max[0][0][0] = 0
4815 00:43:59.402303 tx_center_min[0][0][1] = 0
4816 00:43:59.404798 tx_center_max[0][0][1] = 0
4817 00:43:59.407969 tx_center_min[0][1][0] = 0
4818 00:43:59.411889 tx_center_max[0][1][0] = 0
4819 00:43:59.412408 tx_center_min[0][1][1] = 0
4820 00:43:59.415187 tx_center_max[0][1][1] = 0
4821 00:43:59.418168 tx_center_min[1][0][0] = 0
4822 00:43:59.421661 tx_center_max[1][0][0] = 0
4823 00:43:59.422216 tx_center_min[1][0][1] = 0
4824 00:43:59.424668 tx_center_max[1][0][1] = 0
4825 00:43:59.427915 tx_center_min[1][1][0] = 0
4826 00:43:59.428406 tx_center_max[1][1][0] = 0
4827 00:43:59.431939 tx_center_min[1][1][1] = 0
4828 00:43:59.435150 tx_center_max[1][1][1] = 0
4829 00:43:59.438039 dump params tx window
4830 00:43:59.438561 tx_win_center[0][0][0] = 0
4831 00:43:59.441038 tx_first_pass[0][0][0] = 0
4832 00:43:59.444389 tx_last_pass[0][0][0] = 0
4833 00:43:59.444817 tx_win_center[0][0][1] = 0
4834 00:43:59.448133 tx_first_pass[0][0][1] = 0
4835 00:43:59.451342 tx_last_pass[0][0][1] = 0
4836 00:43:59.454889 tx_win_center[0][0][2] = 0
4837 00:43:59.455408 tx_first_pass[0][0][2] = 0
4838 00:43:59.457944 tx_last_pass[0][0][2] = 0
4839 00:43:59.461316 tx_win_center[0][0][3] = 0
4840 00:43:59.464284 tx_first_pass[0][0][3] = 0
4841 00:43:59.464716 tx_last_pass[0][0][3] = 0
4842 00:43:59.467775 tx_win_center[0][0][4] = 0
4843 00:43:59.471088 tx_first_pass[0][0][4] = 0
4844 00:43:59.474495 tx_last_pass[0][0][4] = 0
4845 00:43:59.475009 tx_win_center[0][0][5] = 0
4846 00:43:59.477391 tx_first_pass[0][0][5] = 0
4847 00:43:59.481182 tx_last_pass[0][0][5] = 0
4848 00:43:59.481695 tx_win_center[0][0][6] = 0
4849 00:43:59.484181 tx_first_pass[0][0][6] = 0
4850 00:43:59.487780 tx_last_pass[0][0][6] = 0
4851 00:43:59.490809 tx_win_center[0][0][7] = 0
4852 00:43:59.491238 tx_first_pass[0][0][7] = 0
4853 00:43:59.493973 tx_last_pass[0][0][7] = 0
4854 00:43:59.497836 tx_win_center[0][0][8] = 0
4855 00:43:59.500802 tx_first_pass[0][0][8] = 0
4856 00:43:59.501314 tx_last_pass[0][0][8] = 0
4857 00:43:59.503712 tx_win_center[0][0][9] = 0
4858 00:43:59.507640 tx_first_pass[0][0][9] = 0
4859 00:43:59.508074 tx_last_pass[0][0][9] = 0
4860 00:43:59.510459 tx_win_center[0][0][10] = 0
4861 00:43:59.514082 tx_first_pass[0][0][10] = 0
4862 00:43:59.517610 tx_last_pass[0][0][10] = 0
4863 00:43:59.518193 tx_win_center[0][0][11] = 0
4864 00:43:59.520566 tx_first_pass[0][0][11] = 0
4865 00:43:59.524138 tx_last_pass[0][0][11] = 0
4866 00:43:59.526953 tx_win_center[0][0][12] = 0
4867 00:43:59.530899 tx_first_pass[0][0][12] = 0
4868 00:43:59.531417 tx_last_pass[0][0][12] = 0
4869 00:43:59.533810 tx_win_center[0][0][13] = 0
4870 00:43:59.537102 tx_first_pass[0][0][13] = 0
4871 00:43:59.540681 tx_last_pass[0][0][13] = 0
4872 00:43:59.541218 tx_win_center[0][0][14] = 0
4873 00:43:59.543536 tx_first_pass[0][0][14] = 0
4874 00:43:59.547135 tx_last_pass[0][0][14] = 0
4875 00:43:59.551213 tx_win_center[0][0][15] = 0
4876 00:43:59.551730 tx_first_pass[0][0][15] = 0
4877 00:43:59.554068 tx_last_pass[0][0][15] = 0
4878 00:43:59.557035 tx_win_center[0][1][0] = 0
4879 00:43:59.560105 tx_first_pass[0][1][0] = 0
4880 00:43:59.560619 tx_last_pass[0][1][0] = 0
4881 00:43:59.563643 tx_win_center[0][1][1] = 0
4882 00:43:59.566606 tx_first_pass[0][1][1] = 0
4883 00:43:59.567035 tx_last_pass[0][1][1] = 0
4884 00:43:59.569917 tx_win_center[0][1][2] = 0
4885 00:43:59.573573 tx_first_pass[0][1][2] = 0
4886 00:43:59.577261 tx_last_pass[0][1][2] = 0
4887 00:43:59.577780 tx_win_center[0][1][3] = 0
4888 00:43:59.580580 tx_first_pass[0][1][3] = 0
4889 00:43:59.583326 tx_last_pass[0][1][3] = 0
4890 00:43:59.586785 tx_win_center[0][1][4] = 0
4891 00:43:59.587216 tx_first_pass[0][1][4] = 0
4892 00:43:59.590658 tx_last_pass[0][1][4] = 0
4893 00:43:59.593620 tx_win_center[0][1][5] = 0
4894 00:43:59.594176 tx_first_pass[0][1][5] = 0
4895 00:43:59.596767 tx_last_pass[0][1][5] = 0
4896 00:43:59.600278 tx_win_center[0][1][6] = 0
4897 00:43:59.603295 tx_first_pass[0][1][6] = 0
4898 00:43:59.603724 tx_last_pass[0][1][6] = 0
4899 00:43:59.606854 tx_win_center[0][1][7] = 0
4900 00:43:59.610151 tx_first_pass[0][1][7] = 0
4901 00:43:59.613029 tx_last_pass[0][1][7] = 0
4902 00:43:59.613415 tx_win_center[0][1][8] = 0
4903 00:43:59.616685 tx_first_pass[0][1][8] = 0
4904 00:43:59.619932 tx_last_pass[0][1][8] = 0
4905 00:43:59.620460 tx_win_center[0][1][9] = 0
4906 00:43:59.623083 tx_first_pass[0][1][9] = 0
4907 00:43:59.626573 tx_last_pass[0][1][9] = 0
4908 00:43:59.629692 tx_win_center[0][1][10] = 0
4909 00:43:59.630122 tx_first_pass[0][1][10] = 0
4910 00:43:59.633107 tx_last_pass[0][1][10] = 0
4911 00:43:59.636627 tx_win_center[0][1][11] = 0
4912 00:43:59.640355 tx_first_pass[0][1][11] = 0
4913 00:43:59.640828 tx_last_pass[0][1][11] = 0
4914 00:43:59.643462 tx_win_center[0][1][12] = 0
4915 00:43:59.646066 tx_first_pass[0][1][12] = 0
4916 00:43:59.649788 tx_last_pass[0][1][12] = 0
4917 00:43:59.650354 tx_win_center[0][1][13] = 0
4918 00:43:59.653396 tx_first_pass[0][1][13] = 0
4919 00:43:59.656958 tx_last_pass[0][1][13] = 0
4920 00:43:59.659882 tx_win_center[0][1][14] = 0
4921 00:43:59.660410 tx_first_pass[0][1][14] = 0
4922 00:43:59.662986 tx_last_pass[0][1][14] = 0
4923 00:43:59.666018 tx_win_center[0][1][15] = 0
4924 00:43:59.669574 tx_first_pass[0][1][15] = 0
4925 00:43:59.670125 tx_last_pass[0][1][15] = 0
4926 00:43:59.673083 tx_win_center[1][0][0] = 0
4927 00:43:59.676342 tx_first_pass[1][0][0] = 0
4928 00:43:59.679547 tx_last_pass[1][0][0] = 0
4929 00:43:59.680066 tx_win_center[1][0][1] = 0
4930 00:43:59.682544 tx_first_pass[1][0][1] = 0
4931 00:43:59.686311 tx_last_pass[1][0][1] = 0
4932 00:43:59.689534 tx_win_center[1][0][2] = 0
4933 00:43:59.690096 tx_first_pass[1][0][2] = 0
4934 00:43:59.692590 tx_last_pass[1][0][2] = 0
4935 00:43:59.696088 tx_win_center[1][0][3] = 0
4936 00:43:59.700042 tx_first_pass[1][0][3] = 0
4937 00:43:59.700559 tx_last_pass[1][0][3] = 0
4938 00:43:59.702726 tx_win_center[1][0][4] = 0
4939 00:43:59.706099 tx_first_pass[1][0][4] = 0
4940 00:43:59.706659 tx_last_pass[1][0][4] = 0
4941 00:43:59.709397 tx_win_center[1][0][5] = 0
4942 00:43:59.712926 tx_first_pass[1][0][5] = 0
4943 00:43:59.716422 tx_last_pass[1][0][5] = 0
4944 00:43:59.716932 tx_win_center[1][0][6] = 0
4945 00:43:59.719661 tx_first_pass[1][0][6] = 0
4946 00:43:59.722594 tx_last_pass[1][0][6] = 0
4947 00:43:59.726399 tx_win_center[1][0][7] = 0
4948 00:43:59.726928 tx_first_pass[1][0][7] = 0
4949 00:43:59.729886 tx_last_pass[1][0][7] = 0
4950 00:43:59.732495 tx_win_center[1][0][8] = 0
4951 00:43:59.732924 tx_first_pass[1][0][8] = 0
4952 00:43:59.735849 tx_last_pass[1][0][8] = 0
4953 00:43:59.739193 tx_win_center[1][0][9] = 0
4954 00:43:59.742530 tx_first_pass[1][0][9] = 0
4955 00:43:59.743045 tx_last_pass[1][0][9] = 0
4956 00:43:59.745520 tx_win_center[1][0][10] = 0
4957 00:43:59.748880 tx_first_pass[1][0][10] = 0
4958 00:43:59.752110 tx_last_pass[1][0][10] = 0
4959 00:43:59.752698 tx_win_center[1][0][11] = 0
4960 00:43:59.755529 tx_first_pass[1][0][11] = 0
4961 00:43:59.758721 tx_last_pass[1][0][11] = 0
4962 00:43:59.762586 tx_win_center[1][0][12] = 0
4963 00:43:59.763081 tx_first_pass[1][0][12] = 0
4964 00:43:59.765809 tx_last_pass[1][0][12] = 0
4965 00:43:59.769008 tx_win_center[1][0][13] = 0
4966 00:43:59.772554 tx_first_pass[1][0][13] = 0
4967 00:43:59.773069 tx_last_pass[1][0][13] = 0
4968 00:43:59.776395 tx_win_center[1][0][14] = 0
4969 00:43:59.779534 tx_first_pass[1][0][14] = 0
4970 00:43:59.782375 tx_last_pass[1][0][14] = 0
4971 00:43:59.782893 tx_win_center[1][0][15] = 0
4972 00:43:59.786022 tx_first_pass[1][0][15] = 0
4973 00:43:59.788847 tx_last_pass[1][0][15] = 0
4974 00:43:59.792354 tx_win_center[1][1][0] = 0
4975 00:43:59.792785 tx_first_pass[1][1][0] = 0
4976 00:43:59.795576 tx_last_pass[1][1][0] = 0
4977 00:43:59.799002 tx_win_center[1][1][1] = 0
4978 00:43:59.802427 tx_first_pass[1][1][1] = 0
4979 00:43:59.802946 tx_last_pass[1][1][1] = 0
4980 00:43:59.805426 tx_win_center[1][1][2] = 0
4981 00:43:59.808923 tx_first_pass[1][1][2] = 0
4982 00:43:59.809354 tx_last_pass[1][1][2] = 0
4983 00:43:59.812454 tx_win_center[1][1][3] = 0
4984 00:43:59.815795 tx_first_pass[1][1][3] = 0
4985 00:43:59.818765 tx_last_pass[1][1][3] = 0
4986 00:43:59.819198 tx_win_center[1][1][4] = 0
4987 00:43:59.822500 tx_first_pass[1][1][4] = 0
4988 00:43:59.825672 tx_last_pass[1][1][4] = 0
4989 00:43:59.826221 tx_win_center[1][1][5] = 0
4990 00:43:59.828728 tx_first_pass[1][1][5] = 0
4991 00:43:59.832168 tx_last_pass[1][1][5] = 0
4992 00:43:59.835207 tx_win_center[1][1][6] = 0
4993 00:43:59.835637 tx_first_pass[1][1][6] = 0
4994 00:43:59.838584 tx_last_pass[1][1][6] = 0
4995 00:43:59.842410 tx_win_center[1][1][7] = 0
4996 00:43:59.845569 tx_first_pass[1][1][7] = 0
4997 00:43:59.846043 tx_last_pass[1][1][7] = 0
4998 00:43:59.848464 tx_win_center[1][1][8] = 0
4999 00:43:59.851750 tx_first_pass[1][1][8] = 0
5000 00:43:59.852144 tx_last_pass[1][1][8] = 0
5001 00:43:59.855407 tx_win_center[1][1][9] = 0
5002 00:43:59.858469 tx_first_pass[1][1][9] = 0
5003 00:43:59.862399 tx_last_pass[1][1][9] = 0
5004 00:43:59.862830 tx_win_center[1][1][10] = 0
5005 00:43:59.865182 tx_first_pass[1][1][10] = 0
5006 00:43:59.868315 tx_last_pass[1][1][10] = 0
5007 00:43:59.872098 tx_win_center[1][1][11] = 0
5008 00:43:59.872490 tx_first_pass[1][1][11] = 0
5009 00:43:59.875584 tx_last_pass[1][1][11] = 0
5010 00:43:59.878519 tx_win_center[1][1][12] = 0
5011 00:43:59.882014 tx_first_pass[1][1][12] = 0
5012 00:43:59.882406 tx_last_pass[1][1][12] = 0
5013 00:43:59.885037 tx_win_center[1][1][13] = 0
5014 00:43:59.888777 tx_first_pass[1][1][13] = 0
5015 00:43:59.892078 tx_last_pass[1][1][13] = 0
5016 00:43:59.892568 tx_win_center[1][1][14] = 0
5017 00:43:59.895623 tx_first_pass[1][1][14] = 0
5018 00:43:59.898233 tx_last_pass[1][1][14] = 0
5019 00:43:59.902075 tx_win_center[1][1][15] = 0
5020 00:43:59.902472 tx_first_pass[1][1][15] = 0
5021 00:43:59.905119 tx_last_pass[1][1][15] = 0
5022 00:43:59.908011 dump params rx window
5023 00:43:59.908360 rx_firspass[0][0][0] = 0
5024 00:43:59.911561 rx_lastpass[0][0][0] = 0
5025 00:43:59.915180 rx_firspass[0][0][1] = 0
5026 00:43:59.918254 rx_lastpass[0][0][1] = 0
5027 00:43:59.918645 rx_firspass[0][0][2] = 0
5028 00:43:59.921629 rx_lastpass[0][0][2] = 0
5029 00:43:59.924753 rx_firspass[0][0][3] = 0
5030 00:43:59.925139 rx_lastpass[0][0][3] = 0
5031 00:43:59.928057 rx_firspass[0][0][4] = 0
5032 00:43:59.931474 rx_lastpass[0][0][4] = 0
5033 00:43:59.931862 rx_firspass[0][0][5] = 0
5034 00:43:59.935045 rx_lastpass[0][0][5] = 0
5035 00:43:59.938472 rx_firspass[0][0][6] = 0
5036 00:43:59.938948 rx_lastpass[0][0][6] = 0
5037 00:43:59.941489 rx_firspass[0][0][7] = 0
5038 00:43:59.944386 rx_lastpass[0][0][7] = 0
5039 00:43:59.948063 rx_firspass[0][0][8] = 0
5040 00:43:59.948543 rx_lastpass[0][0][8] = 0
5041 00:43:59.951813 rx_firspass[0][0][9] = 0
5042 00:43:59.954768 rx_lastpass[0][0][9] = 0
5043 00:43:59.955163 rx_firspass[0][0][10] = 0
5044 00:43:59.958535 rx_lastpass[0][0][10] = 0
5045 00:43:59.961963 rx_firspass[0][0][11] = 0
5046 00:43:59.962467 rx_lastpass[0][0][11] = 0
5047 00:43:59.964809 rx_firspass[0][0][12] = 0
5048 00:43:59.968188 rx_lastpass[0][0][12] = 0
5049 00:43:59.971519 rx_firspass[0][0][13] = 0
5050 00:43:59.971948 rx_lastpass[0][0][13] = 0
5051 00:43:59.975002 rx_firspass[0][0][14] = 0
5052 00:43:59.978106 rx_lastpass[0][0][14] = 0
5053 00:43:59.978623 rx_firspass[0][0][15] = 0
5054 00:43:59.981910 rx_lastpass[0][0][15] = 0
5055 00:43:59.984688 rx_firspass[0][1][0] = 0
5056 00:43:59.988214 rx_lastpass[0][1][0] = 0
5057 00:43:59.988730 rx_firspass[0][1][1] = 0
5058 00:43:59.991319 rx_lastpass[0][1][1] = 0
5059 00:43:59.994770 rx_firspass[0][1][2] = 0
5060 00:43:59.995198 rx_lastpass[0][1][2] = 0
5061 00:43:59.997884 rx_firspass[0][1][3] = 0
5062 00:44:00.001523 rx_lastpass[0][1][3] = 0
5063 00:44:00.002032 rx_firspass[0][1][4] = 0
5064 00:44:00.005467 rx_lastpass[0][1][4] = 0
5065 00:44:00.007581 rx_firspass[0][1][5] = 0
5066 00:44:00.007972 rx_lastpass[0][1][5] = 0
5067 00:44:00.011284 rx_firspass[0][1][6] = 0
5068 00:44:00.014183 rx_lastpass[0][1][6] = 0
5069 00:44:00.014620 rx_firspass[0][1][7] = 0
5070 00:44:00.017532 rx_lastpass[0][1][7] = 0
5071 00:44:00.021570 rx_firspass[0][1][8] = 0
5072 00:44:00.024487 rx_lastpass[0][1][8] = 0
5073 00:44:00.024917 rx_firspass[0][1][9] = 0
5074 00:44:00.027875 rx_lastpass[0][1][9] = 0
5075 00:44:00.031106 rx_firspass[0][1][10] = 0
5076 00:44:00.031496 rx_lastpass[0][1][10] = 0
5077 00:44:00.034502 rx_firspass[0][1][11] = 0
5078 00:44:00.037685 rx_lastpass[0][1][11] = 0
5079 00:44:00.038103 rx_firspass[0][1][12] = 0
5080 00:44:00.040675 rx_lastpass[0][1][12] = 0
5081 00:44:00.044224 rx_firspass[0][1][13] = 0
5082 00:44:00.047989 rx_lastpass[0][1][13] = 0
5083 00:44:00.048380 rx_firspass[0][1][14] = 0
5084 00:44:00.051047 rx_lastpass[0][1][14] = 0
5085 00:44:00.054328 rx_firspass[0][1][15] = 0
5086 00:44:00.054722 rx_lastpass[0][1][15] = 0
5087 00:44:00.057618 rx_firspass[1][0][0] = 0
5088 00:44:00.061265 rx_lastpass[1][0][0] = 0
5089 00:44:00.061741 rx_firspass[1][0][1] = 0
5090 00:44:00.064391 rx_lastpass[1][0][1] = 0
5091 00:44:00.067490 rx_firspass[1][0][2] = 0
5092 00:44:00.071138 rx_lastpass[1][0][2] = 0
5093 00:44:00.071535 rx_firspass[1][0][3] = 0
5094 00:44:00.074395 rx_lastpass[1][0][3] = 0
5095 00:44:00.077647 rx_firspass[1][0][4] = 0
5096 00:44:00.078076 rx_lastpass[1][0][4] = 0
5097 00:44:00.081127 rx_firspass[1][0][5] = 0
5098 00:44:00.084609 rx_lastpass[1][0][5] = 0
5099 00:44:00.084992 rx_firspass[1][0][6] = 0
5100 00:44:00.088144 rx_lastpass[1][0][6] = 0
5101 00:44:00.091032 rx_firspass[1][0][7] = 0
5102 00:44:00.091426 rx_lastpass[1][0][7] = 0
5103 00:44:00.094142 rx_firspass[1][0][8] = 0
5104 00:44:00.097428 rx_lastpass[1][0][8] = 0
5105 00:44:00.098035 rx_firspass[1][0][9] = 0
5106 00:44:00.101078 rx_lastpass[1][0][9] = 0
5107 00:44:00.104626 rx_firspass[1][0][10] = 0
5108 00:44:00.107537 rx_lastpass[1][0][10] = 0
5109 00:44:00.107967 rx_firspass[1][0][11] = 0
5110 00:44:00.111185 rx_lastpass[1][0][11] = 0
5111 00:44:00.114039 rx_firspass[1][0][12] = 0
5112 00:44:00.114434 rx_lastpass[1][0][12] = 0
5113 00:44:00.117780 rx_firspass[1][0][13] = 0
5114 00:44:00.120773 rx_lastpass[1][0][13] = 0
5115 00:44:00.124334 rx_firspass[1][0][14] = 0
5116 00:44:00.124812 rx_lastpass[1][0][14] = 0
5117 00:44:00.127684 rx_firspass[1][0][15] = 0
5118 00:44:00.130768 rx_lastpass[1][0][15] = 0
5119 00:44:00.131157 rx_firspass[1][1][0] = 0
5120 00:44:00.133963 rx_lastpass[1][1][0] = 0
5121 00:44:00.137705 rx_firspass[1][1][1] = 0
5122 00:44:00.140647 rx_lastpass[1][1][1] = 0
5123 00:44:00.141039 rx_firspass[1][1][2] = 0
5124 00:44:00.143738 rx_lastpass[1][1][2] = 0
5125 00:44:00.147669 rx_firspass[1][1][3] = 0
5126 00:44:00.148062 rx_lastpass[1][1][3] = 0
5127 00:44:00.151206 rx_firspass[1][1][4] = 0
5128 00:44:00.154426 rx_lastpass[1][1][4] = 0
5129 00:44:00.154917 rx_firspass[1][1][5] = 0
5130 00:44:00.157469 rx_lastpass[1][1][5] = 0
5131 00:44:00.160647 rx_firspass[1][1][6] = 0
5132 00:44:00.161127 rx_lastpass[1][1][6] = 0
5133 00:44:00.163712 rx_firspass[1][1][7] = 0
5134 00:44:00.167244 rx_lastpass[1][1][7] = 0
5135 00:44:00.167636 rx_firspass[1][1][8] = 0
5136 00:44:00.171206 rx_lastpass[1][1][8] = 0
5137 00:44:00.174260 rx_firspass[1][1][9] = 0
5138 00:44:00.177102 rx_lastpass[1][1][9] = 0
5139 00:44:00.177583 rx_firspass[1][1][10] = 0
5140 00:44:00.180804 rx_lastpass[1][1][10] = 0
5141 00:44:00.183924 rx_firspass[1][1][11] = 0
5142 00:44:00.184407 rx_lastpass[1][1][11] = 0
5143 00:44:00.187078 rx_firspass[1][1][12] = 0
5144 00:44:00.190419 rx_lastpass[1][1][12] = 0
5145 00:44:00.190893 rx_firspass[1][1][13] = 0
5146 00:44:00.193945 rx_lastpass[1][1][13] = 0
5147 00:44:00.196823 rx_firspass[1][1][14] = 0
5148 00:44:00.201053 rx_lastpass[1][1][14] = 0
5149 00:44:00.201527 rx_firspass[1][1][15] = 0
5150 00:44:00.204329 rx_lastpass[1][1][15] = 0
5151 00:44:00.207392 dump params clk_delay
5152 00:44:00.207783 clk_delay[0] = 0
5153 00:44:00.210365 clk_delay[1] = 0
5154 00:44:00.210751 dump params dqs_delay
5155 00:44:00.213738 dqs_delay[0][0] = 0
5156 00:44:00.214203 dqs_delay[0][1] = 0
5157 00:44:00.216998 dqs_delay[1][0] = 0
5158 00:44:00.217424 dqs_delay[1][1] = 0
5159 00:44:00.220596 dump params delay_cell_unit = 844
5160 00:44:00.223634 mt_set_emi_preloader end
5161 00:44:00.226875 [mt_mem_init] dram size: 0x100000000, rank number: 2
5162 00:44:00.233523 [complex_mem_test] start addr:0x40000000, len:20480
5163 00:44:00.269506 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5164 00:44:00.276920 [complex_mem_test] start addr:0x80000000, len:20480
5165 00:44:00.312205 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5166 00:44:00.318560 [complex_mem_test] start addr:0xc0000000, len:20480
5167 00:44:00.354478 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5168 00:44:00.361903 [complex_mem_test] start addr:0x56000000, len:8192
5169 00:44:00.377745 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5170 00:44:00.381559 ddr_geometry:1
5171 00:44:00.384428 [complex_mem_test] start addr:0x80000000, len:8192
5172 00:44:00.401756 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5173 00:44:00.405235 dram_init: dram init end (result: 0)
5174 00:44:00.411390 Successfully loaded DRAM blobs and ran DRAM calibration
5175 00:44:00.421667 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5176 00:44:00.422350 CBMEM:
5177 00:44:00.425428 IMD: root @ 00000000fffff000 254 entries.
5178 00:44:00.428217 IMD: root @ 00000000ffffec00 62 entries.
5179 00:44:00.434694 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5180 00:44:00.442032 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5181 00:44:00.444573 in-header: 03 a1 00 00 08 00 00 00
5182 00:44:00.448160 in-data: 84 60 60 10 00 00 00 00
5183 00:44:00.451385 Chrome EC: clear events_b mask to 0x0000000020004000
5184 00:44:00.458380 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5185 00:44:00.462304 in-header: 03 fd 00 00 00 00 00 00
5186 00:44:00.462741 in-data:
5187 00:44:00.468538 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5188 00:44:00.469017 CBFS @ 21000 size 3d4000
5189 00:44:00.475191 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5190 00:44:00.478879 CBFS: Locating 'fallback/ramstage'
5191 00:44:00.481953 CBFS: Found @ offset 10d40 size d563
5192 00:44:00.503201 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5193 00:44:00.515981 Accumulated console time in romstage 13647 ms
5194 00:44:00.516523
5195 00:44:00.516873
5196 00:44:00.525598 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5197 00:44:00.528598 ARM64: Exception handlers installed.
5198 00:44:00.529031 ARM64: Testing exception
5199 00:44:00.531924 ARM64: Done test exception
5200 00:44:00.535154 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5201 00:44:00.538674 Manufacturer: ef
5202 00:44:00.541905 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5203 00:44:00.549084 WARNING: RO_VPD is uninitialized or empty.
5204 00:44:00.552235 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5205 00:44:00.555171 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5206 00:44:00.565453 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5207 00:44:00.568600 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5208 00:44:00.575142 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5209 00:44:00.575581 Enumerating buses...
5210 00:44:00.581731 Show all devs... Before device enumeration.
5211 00:44:00.582270 Root Device: enabled 1
5212 00:44:00.585521 CPU_CLUSTER: 0: enabled 1
5213 00:44:00.586066 CPU: 00: enabled 1
5214 00:44:00.588536 Compare with tree...
5215 00:44:00.591353 Root Device: enabled 1
5216 00:44:00.591784 CPU_CLUSTER: 0: enabled 1
5217 00:44:00.595122 CPU: 00: enabled 1
5218 00:44:00.598152 Root Device scanning...
5219 00:44:00.598625 root_dev_scan_bus for Root Device
5220 00:44:00.601922 CPU_CLUSTER: 0 enabled
5221 00:44:00.604995 root_dev_scan_bus for Root Device done
5222 00:44:00.611476 scan_bus: scanning of bus Root Device took 10690 usecs
5223 00:44:00.611868 done
5224 00:44:00.614919 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5225 00:44:00.618064 Allocating resources...
5226 00:44:00.618454 Reading resources...
5227 00:44:00.621668 Root Device read_resources bus 0 link: 0
5228 00:44:00.628083 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5229 00:44:00.628569 CPU: 00 missing read_resources
5230 00:44:00.634631 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5231 00:44:00.638276 Root Device read_resources bus 0 link: 0 done
5232 00:44:00.642060 Done reading resources.
5233 00:44:00.645200 Show resources in subtree (Root Device)...After reading.
5234 00:44:00.648252 Root Device child on link 0 CPU_CLUSTER: 0
5235 00:44:00.651734 CPU_CLUSTER: 0 child on link 0 CPU: 00
5236 00:44:00.661539 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5237 00:44:00.662105 CPU: 00
5238 00:44:00.664861 Setting resources...
5239 00:44:00.668779 Root Device assign_resources, bus 0 link: 0
5240 00:44:00.671535 CPU_CLUSTER: 0 missing set_resources
5241 00:44:00.674683 Root Device assign_resources, bus 0 link: 0
5242 00:44:00.678344 Done setting resources.
5243 00:44:00.684924 Show resources in subtree (Root Device)...After assigning values.
5244 00:44:00.688180 Root Device child on link 0 CPU_CLUSTER: 0
5245 00:44:00.691546 CPU_CLUSTER: 0 child on link 0 CPU: 00
5246 00:44:00.701557 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5247 00:44:00.702125 CPU: 00
5248 00:44:00.704277 Done allocating resources.
5249 00:44:00.707594 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5250 00:44:00.711821 Enabling resources...
5251 00:44:00.712215 done.
5252 00:44:00.714142 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5253 00:44:00.718023 Initializing devices...
5254 00:44:00.718525 Root Device init ...
5255 00:44:00.721242 mainboard_init: Starting display init.
5256 00:44:00.724415 ADC[4]: Raw value=76301 ID=0
5257 00:44:00.747657 anx7625_power_on_init: Init interface.
5258 00:44:00.751253 anx7625_disable_pd_protocol: Disabled PD feature.
5259 00:44:00.758037 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5260 00:44:00.814904 anx7625_start_dp_work: Secure OCM version=00
5261 00:44:00.818027 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5262 00:44:00.835746 sp_tx_get_edid_block: EDID Block = 1
5263 00:44:00.953760 Extracted contents:
5264 00:44:00.955965 header: 00 ff ff ff ff ff ff 00
5265 00:44:00.959046 serial number: 06 af 5c 14 00 00 00 00 00 1a
5266 00:44:00.962382 version: 01 04
5267 00:44:00.965934 basic params: 95 1a 0e 78 02
5268 00:44:00.968947 chroma info: 99 85 95 55 56 92 28 22 50 54
5269 00:44:00.972824 established: 00 00 00
5270 00:44:00.979153 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5271 00:44:00.982597 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5272 00:44:00.988751 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5273 00:44:00.996042 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5274 00:44:01.002509 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5275 00:44:01.005461 extensions: 00
5276 00:44:01.005972 checksum: ae
5277 00:44:01.006360
5278 00:44:01.008490 Manufacturer: AUO Model 145c Serial Number 0
5279 00:44:01.011969 Made week 0 of 2016
5280 00:44:01.015545 EDID version: 1.4
5281 00:44:01.015995 Digital display
5282 00:44:01.018671 6 bits per primary color channel
5283 00:44:01.019109 DisplayPort interface
5284 00:44:01.022230 Maximum image size: 26 cm x 14 cm
5285 00:44:01.025411 Gamma: 220%
5286 00:44:01.025926 Check DPMS levels
5287 00:44:01.028737 Supported color formats: RGB 4:4:4
5288 00:44:01.032042 First detailed timing is preferred timing
5289 00:44:01.035529 Established timings supported:
5290 00:44:01.038553 Standard timings supported:
5291 00:44:01.038983 Detailed timings
5292 00:44:01.044924 Hex of detail: ce1d56ea50001a3030204600009010000018
5293 00:44:01.047948 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5294 00:44:01.051263 0556 0586 05a6 0640 hborder 0
5295 00:44:01.058800 0300 0304 030a 031a vborder 0
5296 00:44:01.059188 -hsync -vsync
5297 00:44:01.062069 Did detailed timing
5298 00:44:01.064673 Hex of detail: 0000000f0000000000000000000000000020
5299 00:44:01.068133 Manufacturer-specified data, tag 15
5300 00:44:01.074629 Hex of detail: 000000fe0041554f0a202020202020202020
5301 00:44:01.075044 ASCII string: AUO
5302 00:44:01.081660 Hex of detail: 000000fe004231313658414230312e34200a
5303 00:44:01.082168 ASCII string: B116XAB01.4
5304 00:44:01.085067 Checksum
5305 00:44:01.085532 Checksum: 0xae (valid)
5306 00:44:01.091494 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5307 00:44:01.095481 DSI data_rate: 457800000 bps
5308 00:44:01.097841 anx7625_parse_edid: set default k value to 0x3d for panel
5309 00:44:01.104917 anx7625_parse_edid: pixelclock(76300).
5310 00:44:01.108378 hactive(1366), hsync(32), hfp(48), hbp(154)
5311 00:44:01.110983 vactive(768), vsync(6), vfp(4), vbp(16)
5312 00:44:01.114647 anx7625_dsi_config: config dsi.
5313 00:44:01.120780 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5314 00:44:01.141693 anx7625_dsi_config: success to config DSI
5315 00:44:01.145556 anx7625_dp_start: MIPI phy setup OK.
5316 00:44:01.148566 [SSUSB] Setting up USB HOST controller...
5317 00:44:01.151507 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5318 00:44:01.155027 [SSUSB] phy power-on done.
5319 00:44:01.158778 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5320 00:44:01.162032 in-header: 03 fc 01 00 00 00 00 00
5321 00:44:01.162467 in-data:
5322 00:44:01.169014 handle_proto3_response: EC response with error code: 1
5323 00:44:01.169531 SPM: pcm index = 1
5324 00:44:01.172355 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5325 00:44:01.175275 CBFS @ 21000 size 3d4000
5326 00:44:01.182666 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5327 00:44:01.185498 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5328 00:44:01.188750 CBFS: Found @ offset 1e7c0 size 1026
5329 00:44:01.195931 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5330 00:44:01.199026 SPM: binary array size = 2988
5331 00:44:01.202226 SPM: version = pcm_allinone_v1.17.2_20180829
5332 00:44:01.205739 SPM binary loaded in 32 msecs
5333 00:44:01.213239 spm_kick_im_to_fetch: ptr = 000000004021eec2
5334 00:44:01.216877 spm_kick_im_to_fetch: len = 2988
5335 00:44:01.217393 SPM: spm_kick_pcm_to_run
5336 00:44:01.219727 SPM: spm_kick_pcm_to_run done
5337 00:44:01.222973 SPM: spm_init done in 52 msecs
5338 00:44:01.226461 Root Device init finished in 505262 usecs
5339 00:44:01.229718 CPU_CLUSTER: 0 init ...
5340 00:44:01.239531 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5341 00:44:01.242529 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5342 00:44:01.246217 CBFS @ 21000 size 3d4000
5343 00:44:01.249248 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5344 00:44:01.252949 CBFS: Locating 'sspm.bin'
5345 00:44:01.255750 CBFS: Found @ offset 208c0 size 41cb
5346 00:44:01.265774 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5347 00:44:01.274416 CPU_CLUSTER: 0 init finished in 42801 usecs
5348 00:44:01.274908 Devices initialized
5349 00:44:01.276989 Show all devs... After init.
5350 00:44:01.280706 Root Device: enabled 1
5351 00:44:01.281092 CPU_CLUSTER: 0: enabled 1
5352 00:44:01.284240 CPU: 00: enabled 1
5353 00:44:01.287251 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5354 00:44:01.290345 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5355 00:44:01.293829 ELOG: NV offset 0x558000 size 0x1000
5356 00:44:01.301197 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5357 00:44:01.307752 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5358 00:44:01.311455 ELOG: Event(17) added with size 13 at 2024-06-16 00:44:01 UTC
5359 00:44:01.314787 out: cmd=0x121: 03 db 21 01 00 00 00 00
5360 00:44:01.318134 in-header: 03 b6 00 00 2c 00 00 00
5361 00:44:01.331584 in-data: 34 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 29 08 02 00 06 80 00 00 a9 79 1e 00 06 80 00 00 fa 61 01 00 06 80 00 00 43 5e 02 00
5362 00:44:01.334985 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5363 00:44:01.338232 in-header: 03 19 00 00 08 00 00 00
5364 00:44:01.341352 in-data: a2 e0 47 00 13 00 00 00
5365 00:44:01.345289 Chrome EC: UHEPI supported
5366 00:44:01.351548 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5367 00:44:01.355046 in-header: 03 e1 00 00 08 00 00 00
5368 00:44:01.358144 in-data: 84 20 60 10 00 00 00 00
5369 00:44:01.361139 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5370 00:44:01.368298 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5371 00:44:01.371292 in-header: 03 e1 00 00 08 00 00 00
5372 00:44:01.374902 in-data: 84 20 60 10 00 00 00 00
5373 00:44:01.381209 ELOG: Event(A1) added with size 10 at 2024-06-16 00:44:01 UTC
5374 00:44:01.387774 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5375 00:44:01.391442 ELOG: Event(A0) added with size 9 at 2024-06-16 00:44:01 UTC
5376 00:44:01.398092 elog_add_boot_reason: Logged dev mode boot
5377 00:44:01.398483 Finalize devices...
5378 00:44:01.401339 Devices finalized
5379 00:44:01.404844 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5380 00:44:01.408392 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5381 00:44:01.414284 ELOG: Event(91) added with size 10 at 2024-06-16 00:44:01 UTC
5382 00:44:01.418055 Writing coreboot table at 0xffeda000
5383 00:44:01.420998 0. 0000000000114000-000000000011efff: RAMSTAGE
5384 00:44:01.428151 1. 0000000040000000-000000004023cfff: RAMSTAGE
5385 00:44:01.431188 2. 000000004023d000-00000000545fffff: RAM
5386 00:44:01.434603 3. 0000000054600000-000000005465ffff: BL31
5387 00:44:01.437727 4. 0000000054660000-00000000ffed9fff: RAM
5388 00:44:01.444998 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5389 00:44:01.447393 6. 0000000100000000-000000013fffffff: RAM
5390 00:44:01.450665 Passing 5 GPIOs to payload:
5391 00:44:01.454368 NAME | PORT | POLARITY | VALUE
5392 00:44:01.457914 write protect | 0x00000096 | low | low
5393 00:44:01.464323 EC in RW | 0x000000b1 | high | undefined
5394 00:44:01.468123 EC interrupt | 0x00000097 | low | undefined
5395 00:44:01.474499 TPM interrupt | 0x00000099 | high | undefined
5396 00:44:01.477963 speaker enable | 0x000000af | high | undefined
5397 00:44:01.481120 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5398 00:44:01.485029 in-header: 03 f7 00 00 02 00 00 00
5399 00:44:01.487890 in-data: 04 00
5400 00:44:01.488397 Board ID: 4
5401 00:44:01.490842 ADC[3]: Raw value=216068 ID=1
5402 00:44:01.491279 RAM code: 1
5403 00:44:01.491613 SKU ID: 16
5404 00:44:01.497471 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5405 00:44:01.498015 CBFS @ 21000 size 3d4000
5406 00:44:01.503795 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5407 00:44:01.511052 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum ccd0
5408 00:44:01.513746 coreboot table: 940 bytes.
5409 00:44:01.516951 IMD ROOT 0. 00000000fffff000 00001000
5410 00:44:01.520417 IMD SMALL 1. 00000000ffffe000 00001000
5411 00:44:01.523670 CONSOLE 2. 00000000fffde000 00020000
5412 00:44:01.527450 FMAP 3. 00000000fffdd000 0000047c
5413 00:44:01.530335 TIME STAMP 4. 00000000fffdc000 00000910
5414 00:44:01.533320 RAMOOPS 5. 00000000ffedc000 00100000
5415 00:44:01.536770 COREBOOT 6. 00000000ffeda000 00002000
5416 00:44:01.540144 IMD small region:
5417 00:44:01.543435 IMD ROOT 0. 00000000ffffec00 00000400
5418 00:44:01.546643 VBOOT WORK 1. 00000000ffffeb00 00000100
5419 00:44:01.550092 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5420 00:44:01.553937 VPD 3. 00000000ffffea60 0000006c
5421 00:44:01.560040 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5422 00:44:01.566432 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5423 00:44:01.569923 in-header: 03 e1 00 00 08 00 00 00
5424 00:44:01.573111 in-data: 84 20 60 10 00 00 00 00
5425 00:44:01.576450 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5426 00:44:01.580263 CBFS @ 21000 size 3d4000
5427 00:44:01.583307 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5428 00:44:01.586273 CBFS: Locating 'fallback/payload'
5429 00:44:01.595892 CBFS: Found @ offset dc040 size 439a0
5430 00:44:01.683542 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5431 00:44:01.686355 Checking segment from ROM address 0x0000000040003a00
5432 00:44:01.693466 Checking segment from ROM address 0x0000000040003a1c
5433 00:44:01.696623 Loading segment from ROM address 0x0000000040003a00
5434 00:44:01.700032 code (compression=0)
5435 00:44:01.710400 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5436 00:44:01.716723 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5437 00:44:01.720061 it's not compressed!
5438 00:44:01.723010 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5439 00:44:01.729944 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5440 00:44:01.737794 Loading segment from ROM address 0x0000000040003a1c
5441 00:44:01.740950 Entry Point 0x0000000080000000
5442 00:44:01.741341 Loaded segments
5443 00:44:01.747535 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5444 00:44:01.750818 Jumping to boot code at 0000000080000000(00000000ffeda000)
5445 00:44:01.761024 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5446 00:44:01.764232 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5447 00:44:01.767868 CBFS @ 21000 size 3d4000
5448 00:44:01.774495 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5449 00:44:01.777312 CBFS: Locating 'fallback/bl31'
5450 00:44:01.780824 CBFS: Found @ offset 36dc0 size 5820
5451 00:44:01.791746 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5452 00:44:01.794987 Checking segment from ROM address 0x0000000040003a00
5453 00:44:01.801547 Checking segment from ROM address 0x0000000040003a1c
5454 00:44:01.805016 Loading segment from ROM address 0x0000000040003a00
5455 00:44:01.808109 code (compression=1)
5456 00:44:01.815157 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5457 00:44:01.825077 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5458 00:44:01.825545 using LZMA
5459 00:44:01.833363 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5460 00:44:01.840048 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5461 00:44:01.843172 Loading segment from ROM address 0x0000000040003a1c
5462 00:44:01.846605 Entry Point 0x0000000054601000
5463 00:44:01.847036 Loaded segments
5464 00:44:01.850144 NOTICE: MT8183 bl31_setup
5465 00:44:01.857267 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5466 00:44:01.860742 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5467 00:44:01.863671 INFO: [DEVAPC] dump DEVAPC registers:
5468 00:44:01.874197 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5469 00:44:01.880450 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5470 00:44:01.890769 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5471 00:44:01.896868 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5472 00:44:01.907152 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5473 00:44:01.913806 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5474 00:44:01.923678 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5475 00:44:01.930292 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5476 00:44:01.940186 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5477 00:44:01.947170 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5478 00:44:01.953844 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5479 00:44:01.963333 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5480 00:44:01.970072 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5481 00:44:01.979783 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5482 00:44:01.986551 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5483 00:44:01.993270 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5484 00:44:01.999762 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5485 00:44:02.006462 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5486 00:44:02.016217 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5487 00:44:02.022847 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5488 00:44:02.029530 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5489 00:44:02.036398 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5490 00:44:02.039500 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5491 00:44:02.043087 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5492 00:44:02.046313 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5493 00:44:02.049179 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5494 00:44:02.052896 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5495 00:44:02.059954 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5496 00:44:02.066581 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5497 00:44:02.067051 WARNING: region 0:
5498 00:44:02.069406 WARNING: apc:0x168, sa:0x0, ea:0xfff
5499 00:44:02.073226 WARNING: region 1:
5500 00:44:02.076155 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5501 00:44:02.076559 WARNING: region 2:
5502 00:44:02.079445 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5503 00:44:02.082922 WARNING: region 3:
5504 00:44:02.086320 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5505 00:44:02.089128 WARNING: region 4:
5506 00:44:02.092980 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5507 00:44:02.093473 WARNING: region 5:
5508 00:44:02.096237 WARNING: apc:0x0, sa:0x0, ea:0x0
5509 00:44:02.099080 WARNING: region 6:
5510 00:44:02.103103 WARNING: apc:0x0, sa:0x0, ea:0x0
5511 00:44:02.103628 WARNING: region 7:
5512 00:44:02.106704 WARNING: apc:0x0, sa:0x0, ea:0x0
5513 00:44:02.112811 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5514 00:44:02.116292 INFO: SPM: enable SPMC mode
5515 00:44:02.119227 NOTICE: spm_boot_init() start
5516 00:44:02.122469 NOTICE: spm_boot_init() end
5517 00:44:02.125873 INFO: BL31: Initializing runtime services
5518 00:44:02.132448 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5519 00:44:02.135592 INFO: BL31: Preparing for EL3 exit to normal world
5520 00:44:02.139220 INFO: Entry point address = 0x80000000
5521 00:44:02.142538 INFO: SPSR = 0x8
5522 00:44:02.163998
5523 00:44:02.164511
5524 00:44:02.164847
5525 00:44:02.166668 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5526 00:44:02.167208 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5527 00:44:02.167633 Setting prompt string to ['jacuzzi:']
5528 00:44:02.168025 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5529 00:44:02.168685 Starting depthcharge on Juniper...
5530 00:44:02.169034
5531 00:44:02.170455 vboot_handoff: creating legacy vboot_handoff structure
5532 00:44:02.170888
5533 00:44:02.174067 ec_init(0): CrosEC protocol v3 supported (544, 544)
5534 00:44:02.177145
5535 00:44:02.177567 Wipe memory regions:
5536 00:44:02.177898
5537 00:44:02.180618 [0x00000040000000, 0x00000054600000)
5538 00:44:02.223276
5539 00:44:02.223796 [0x00000054660000, 0x00000080000000)
5540 00:44:02.314607
5541 00:44:02.315112 [0x000000811994a0, 0x000000ffeda000)
5542 00:44:02.574662
5543 00:44:02.575161 [0x00000100000000, 0x00000140000000)
5544 00:44:02.706463
5545 00:44:02.710340 Initializing XHCI USB controller at 0x11200000.
5546 00:44:02.733416
5547 00:44:02.736927 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5548 00:44:02.737180
5549 00:44:02.737337
5550 00:44:02.737802 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5552 00:44:02.838762 jacuzzi: tftpboot 192.168.201.1 14368374/tftp-deploy-m8jkna6k/kernel/image.itb 14368374/tftp-deploy-m8jkna6k/kernel/cmdline
5553 00:44:02.839598 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5554 00:44:02.840152 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5555 00:44:02.844560 tftpboot 192.168.201.1 14368374/tftp-deploy-m8jkna6k/kernel/image.ittp-deploy-m8jkna6k/kernel/cmdline
5556 00:44:02.844996
5557 00:44:02.845328 Waiting for link
5558 00:44:03.247390
5559 00:44:03.247916 R8152: Initializing
5560 00:44:03.248254
5561 00:44:03.250569 Version 9 (ocp_data = 6010)
5562 00:44:03.251100
5563 00:44:03.253844 R8152: Done initializing
5564 00:44:03.254332
5565 00:44:03.254670 Adding net device
5566 00:44:03.639765
5567 00:44:03.640307 done.
5568 00:44:03.640649
5569 00:44:03.640991 MAC: 00:e0:4c:72:3d:67
5570 00:44:03.641303
5571 00:44:03.642503 Sending DHCP discover... done.
5572 00:44:03.642933
5573 00:44:03.646080 Waiting for reply... done.
5574 00:44:03.646515
5575 00:44:03.649364 Sending DHCP request... done.
5576 00:44:03.649795
5577 00:44:03.654539 Waiting for reply... done.
5578 00:44:03.654972
5579 00:44:03.655307 My ip is 192.168.201.13
5580 00:44:03.655616
5581 00:44:03.657576 The DHCP server ip is 192.168.201.1
5582 00:44:03.658034
5583 00:44:03.664032 TFTP server IP predefined by user: 192.168.201.1
5584 00:44:03.664533
5585 00:44:03.671285 Bootfile predefined by user: 14368374/tftp-deploy-m8jkna6k/kernel/image.itb
5586 00:44:03.671809
5587 00:44:03.672144 Sending tftp read request... done.
5588 00:44:03.673855
5589 00:44:03.681525 Waiting for the transfer...
5590 00:44:03.682034
5591 00:44:04.066072 00000000 ################################################################
5592 00:44:04.066194
5593 00:44:04.354600 00080000 ################################################################
5594 00:44:04.354726
5595 00:44:04.654905 00100000 ################################################################
5596 00:44:04.655019
5597 00:44:04.946044 00180000 ################################################################
5598 00:44:04.946170
5599 00:44:05.237835 00200000 ################################################################
5600 00:44:05.237948
5601 00:44:05.541659 00280000 ################################################################
5602 00:44:05.541818
5603 00:44:05.919383 00300000 ################################################################
5604 00:44:05.919494
5605 00:44:06.182699 00380000 ################################################################
5606 00:44:06.182814
5607 00:44:06.458279 00400000 ################################################################
5608 00:44:06.458393
5609 00:44:06.726724 00480000 ################################################################
5610 00:44:06.726832
5611 00:44:06.989545 00500000 ################################################################
5612 00:44:06.989655
5613 00:44:07.245962 00580000 ################################################################
5614 00:44:07.246077
5615 00:44:07.514913 00600000 ################################################################
5616 00:44:07.515022
5617 00:44:07.774193 00680000 ################################################################
5618 00:44:07.774315
5619 00:44:08.029174 00700000 ################################################################
5620 00:44:08.029325
5621 00:44:08.284673 00780000 ################################################################
5622 00:44:08.284789
5623 00:44:08.560072 00800000 ################################################################
5624 00:44:08.560188
5625 00:44:08.822548 00880000 ################################################################
5626 00:44:08.822679
5627 00:44:09.086781 00900000 ################################################################
5628 00:44:09.086903
5629 00:44:09.389044 00980000 ################################################################
5630 00:44:09.389164
5631 00:44:09.688697 00a00000 ################################################################
5632 00:44:09.688816
5633 00:44:09.976795 00a80000 ################################################################
5634 00:44:09.976918
5635 00:44:10.261153 00b00000 ################################################################
5636 00:44:10.261273
5637 00:44:10.544458 00b80000 ################################################################
5638 00:44:10.544576
5639 00:44:10.823197 00c00000 ################################################################
5640 00:44:10.823318
5641 00:44:11.104487 00c80000 ################################################################
5642 00:44:11.104609
5643 00:44:11.357810 00d00000 ################################################################
5644 00:44:11.357930
5645 00:44:11.612014 00d80000 ################################################################
5646 00:44:11.612133
5647 00:44:11.864864 00e00000 ################################################################
5648 00:44:11.864982
5649 00:44:12.141595 00e80000 ################################################################
5650 00:44:12.141705
5651 00:44:12.391768 00f00000 ################################################################
5652 00:44:12.391892
5653 00:44:12.684719 00f80000 ################################################################
5654 00:44:12.684839
5655 00:44:12.987773 01000000 ################################################################
5656 00:44:12.987895
5657 00:44:13.247086 01080000 ################################################################
5658 00:44:13.247203
5659 00:44:13.534133 01100000 ################################################################
5660 00:44:13.534257
5661 00:44:13.860288 01180000 ################################################################
5662 00:44:13.860759
5663 00:44:14.248310 01200000 ################################################################
5664 00:44:14.248771
5665 00:44:14.636627 01280000 ################################################################
5666 00:44:14.637084
5667 00:44:15.014454 01300000 ################################################################
5668 00:44:15.015011
5669 00:44:15.417713 01380000 ################################################################
5670 00:44:15.418206
5671 00:44:15.816718 01400000 ################################################################
5672 00:44:15.817176
5673 00:44:16.236921 01480000 ################################################################
5674 00:44:16.237401
5675 00:44:16.634738 01500000 ################################################################
5676 00:44:16.635198
5677 00:44:16.984804 01580000 ################################################################
5678 00:44:16.984916
5679 00:44:17.262384 01600000 ################################################################
5680 00:44:17.262497
5681 00:44:17.559786 01680000 ################################################################
5682 00:44:17.559904
5683 00:44:17.923676 01700000 ################################################################
5684 00:44:17.924177
5685 00:44:18.317285 01780000 ################################################################
5686 00:44:18.317853
5687 00:44:18.727255 01800000 ################################################################
5688 00:44:18.727718
5689 00:44:19.146785 01880000 ################################################################
5690 00:44:19.147312
5691 00:44:19.551958 01900000 ################################################################
5692 00:44:19.552409
5693 00:44:19.949182 01980000 ################################################################
5694 00:44:19.949639
5695 00:44:20.344167 01a00000 ################################################################
5696 00:44:20.344629
5697 00:44:20.746389 01a80000 ################################################################
5698 00:44:20.746876
5699 00:44:21.130187 01b00000 ################################################################
5700 00:44:21.130329
5701 00:44:21.395702 01b80000 ################################################################
5702 00:44:21.395841
5703 00:44:21.693254 01c00000 ################################################################
5704 00:44:21.693378
5705 00:44:21.975105 01c80000 ################################################################
5706 00:44:21.975214
5707 00:44:22.259873 01d00000 ################################################################
5708 00:44:22.260016
5709 00:44:22.546960 01d80000 ################################################################
5710 00:44:22.547073
5711 00:44:22.814757 01e00000 ################################################################
5712 00:44:22.814872
5713 00:44:23.071508 01e80000 ################################################################
5714 00:44:23.071631
5715 00:44:23.347603 01f00000 ################################################################
5716 00:44:23.347712
5717 00:44:23.602944 01f80000 ################################################################
5718 00:44:23.603067
5719 00:44:23.903506 02000000 ################################################################
5720 00:44:23.903617
5721 00:44:24.236809 02080000 ################################################################
5722 00:44:24.237293
5723 00:44:24.653414 02100000 ################################################################
5724 00:44:24.653870
5725 00:44:25.027506 02180000 ################################################################
5726 00:44:25.027635
5727 00:44:25.306338 02200000 ################################################################
5728 00:44:25.306453
5729 00:44:25.566319 02280000 ################################################################
5730 00:44:25.566436
5731 00:44:25.856544 02300000 ################################################################
5732 00:44:25.856662
5733 00:44:26.114790 02380000 ################################################################
5734 00:44:26.114918
5735 00:44:26.378637 02400000 ################################################################
5736 00:44:26.378762
5737 00:44:26.679801 02480000 ################################################################
5738 00:44:26.679922
5739 00:44:26.961550 02500000 ################################################################
5740 00:44:26.961665
5741 00:44:27.217088 02580000 ################################################################
5742 00:44:27.217211
5743 00:44:27.470560 02600000 ################################################################
5744 00:44:27.470669
5745 00:44:27.738167 02680000 ################################################################
5746 00:44:27.738269
5747 00:44:28.006573 02700000 ################################################################
5748 00:44:28.006702
5749 00:44:28.276555 02780000 ################################################################
5750 00:44:28.276658
5751 00:44:28.539849 02800000 ################################################################
5752 00:44:28.539959
5753 00:44:28.799743 02880000 ################################################################
5754 00:44:28.799849
5755 00:44:29.067397 02900000 ################################################################
5756 00:44:29.067502
5757 00:44:29.336305 02980000 ################################################################
5758 00:44:29.336411
5759 00:44:29.620990 02a00000 ################################################################
5760 00:44:29.621094
5761 00:44:29.886270 02a80000 ################################################################
5762 00:44:29.886381
5763 00:44:30.153163 02b00000 ################################################################
5764 00:44:30.153273
5765 00:44:30.434241 02b80000 ################################################################
5766 00:44:30.434358
5767 00:44:30.727520 02c00000 ################################################################
5768 00:44:30.727635
5769 00:44:30.997595 02c80000 ################################################################
5770 00:44:30.997739
5771 00:44:31.262578 02d00000 ################################################################
5772 00:44:31.262690
5773 00:44:31.537479 02d80000 ################################################################
5774 00:44:31.537595
5775 00:44:31.802907 02e00000 ################################################################
5776 00:44:31.803029
5777 00:44:32.064519 02e80000 ################################################################
5778 00:44:32.064662
5779 00:44:32.318819 02f00000 ################################################################
5780 00:44:32.318956
5781 00:44:32.595588 02f80000 ################################################################
5782 00:44:32.595710
5783 00:44:32.896271 03000000 ################################################################
5784 00:44:32.896387
5785 00:44:33.194145 03080000 ################################################################
5786 00:44:33.194285
5787 00:44:33.469520 03100000 ################################################################
5788 00:44:33.469660
5789 00:44:33.743768 03180000 ################################################################
5790 00:44:33.743914
5791 00:44:34.041065 03200000 ################################################################
5792 00:44:34.041184
5793 00:44:34.406279 03280000 ################################################################
5794 00:44:34.406739
5795 00:44:34.799848 03300000 ################################################################
5796 00:44:34.800326
5797 00:44:35.200237 03380000 ################################################################
5798 00:44:35.200702
5799 00:44:35.505696 03400000 ################################################################
5800 00:44:35.505817
5801 00:44:35.801087 03480000 ################################################################
5802 00:44:35.801208
5803 00:44:36.075274 03500000 ################################################################
5804 00:44:36.075381
5805 00:44:36.342573 03580000 ################################################################
5806 00:44:36.342701
5807 00:44:36.638338 03600000 ################################################################
5808 00:44:36.638459
5809 00:44:36.925711 03680000 ################################################################
5810 00:44:36.925845
5811 00:44:37.207480 03700000 ################################################################
5812 00:44:37.207852
5813 00:44:37.593240 03780000 ################################################################
5814 00:44:37.593753
5815 00:44:38.001130 03800000 ################################################################
5816 00:44:38.001773
5817 00:44:38.386129 03880000 ################################################################
5818 00:44:38.386673
5819 00:44:38.782723 03900000 ################################################################
5820 00:44:38.783246
5821 00:44:39.109538 03980000 ################################################################
5822 00:44:39.109662
5823 00:44:39.413271 03a00000 ################################################################
5824 00:44:39.413392
5825 00:44:39.711539 03a80000 ################################################################
5826 00:44:39.711649
5827 00:44:40.001129 03b00000 ################################################################
5828 00:44:40.001237
5829 00:44:40.258315 03b80000 ################################################################
5830 00:44:40.258424
5831 00:44:40.521685 03c00000 ################################################################
5832 00:44:40.521789
5833 00:44:40.803940 03c80000 ################################################################
5834 00:44:40.804044
5835 00:44:41.075115 03d00000 ################################################################
5836 00:44:41.075223
5837 00:44:41.361437 03d80000 ################################################################
5838 00:44:41.361543
5839 00:44:41.536847 03e00000 ####################################### done.
5840 00:44:41.536949
5841 00:44:41.540915 The bootfile was 65325070 bytes long.
5842 00:44:41.541324
5843 00:44:41.543818 Sending tftp read request... done.
5844 00:44:41.544212
5845 00:44:41.547068 Waiting for the transfer...
5846 00:44:41.547464
5847 00:44:41.550508 00000000 # done.
5848 00:44:41.551008
5849 00:44:41.557288 Command line loaded dynamically from TFTP file: 14368374/tftp-deploy-m8jkna6k/kernel/cmdline
5850 00:44:41.557673
5851 00:44:41.573541 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5852 00:44:41.573959
5853 00:44:41.574389 Loading FIT.
5854 00:44:41.574762
5855 00:44:41.577016 Image ramdisk-1 has 52138960 bytes.
5856 00:44:41.577410
5857 00:44:41.580207 Image fdt-1 has 57695 bytes.
5858 00:44:41.580602
5859 00:44:41.583598 Image kernel-1 has 13126376 bytes.
5860 00:44:41.583994
5861 00:44:41.594021 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5862 00:44:41.594498
5863 00:44:41.603974 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5864 00:44:41.604414
5865 00:44:41.610619 Choosing best match conf-1 for compat google,juniper-sku16.
5866 00:44:41.614528
5867 00:44:41.619022 Connected to device vid:did:rid of 1ae0:0028:00
5868 00:44:41.626291
5869 00:44:41.629456 tpm_get_response: command 0x17b, return code 0x0
5870 00:44:41.629887
5871 00:44:41.633678 tpm_cleanup: add release locality here.
5872 00:44:41.634116
5873 00:44:41.635982 Shutting down all USB controllers.
5874 00:44:41.636378
5875 00:44:41.639550 Removing current net device
5876 00:44:41.639906
5877 00:44:41.642549 Exiting depthcharge with code 4 at timestamp: 56714769
5878 00:44:41.642944
5879 00:44:41.645830 LZMA decompressing kernel-1 to 0x80193568
5880 00:44:41.646266
5881 00:44:41.652649 LZMA decompressing kernel-1 to 0x40000000
5882 00:44:43.517901
5883 00:44:43.518503 jumping to kernel
5884 00:44:43.522089 end: 2.2.4 bootloader-commands (duration 00:00:41) [common]
5885 00:44:43.522804 start: 2.2.5 auto-login-action (timeout 00:03:45) [common]
5886 00:44:43.523345 Setting prompt string to ['Linux version [0-9]']
5887 00:44:43.523900 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5888 00:44:43.524482 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5889 00:44:43.593226
5890 00:44:43.596898 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5891 00:44:43.600600 start: 2.2.5.1 login-action (timeout 00:03:45) [common]
5892 00:44:43.601167 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5893 00:44:43.601550 Setting prompt string to []
5894 00:44:43.601946 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5895 00:44:43.602343 Using line separator: #'\n'#
5896 00:44:43.602647 No login prompt set.
5897 00:44:43.602967 Parsing kernel messages
5898 00:44:43.603252 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5899 00:44:43.603773 [login-action] Waiting for messages, (timeout 00:03:45)
5900 00:44:43.604119 Waiting using forced prompt support (timeout 00:01:52)
5901 00:44:43.619808 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232175-arm64-gcc-10-defconfig-arm64-chromebook-7lg8d) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024
5902 00:44:43.622836 [ 0.000000] random: crng init done
5903 00:44:43.629678 [ 0.000000] Machine model: Google juniper sku16 board
5904 00:44:43.633100 [ 0.000000] efi: UEFI not found.
5905 00:44:43.639625 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5906 00:44:43.646250 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5907 00:44:43.656476 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5908 00:44:43.660144 [ 0.000000] printk: bootconsole [mtk8250] enabled
5909 00:44:43.668771 [ 0.000000] NUMA: No NUMA configuration found
5910 00:44:43.674855 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5911 00:44:43.681637 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5912 00:44:43.682180 [ 0.000000] Zone ranges:
5913 00:44:43.687941 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5914 00:44:43.691275 [ 0.000000] DMA32 empty
5915 00:44:43.698425 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5916 00:44:43.701620 [ 0.000000] Movable zone start for each node
5917 00:44:43.704890 [ 0.000000] Early memory node ranges
5918 00:44:43.712008 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5919 00:44:43.718166 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5920 00:44:43.724444 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5921 00:44:43.731117 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5922 00:44:43.737883 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5923 00:44:43.744234 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5924 00:44:43.760717 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5925 00:44:43.766921 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5926 00:44:43.773616 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5927 00:44:43.777189 [ 0.000000] psci: probing for conduit method from DT.
5928 00:44:43.783437 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5929 00:44:43.787084 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5930 00:44:43.793265 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5931 00:44:43.797290 [ 0.000000] psci: SMC Calling Convention v1.1
5932 00:44:43.804261 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5933 00:44:43.806897 [ 0.000000] Detected VIPT I-cache on CPU0
5934 00:44:43.813880 [ 0.000000] CPU features: detected: GIC system register CPU interface
5935 00:44:43.820758 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5936 00:44:43.827095 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5937 00:44:43.833835 [ 0.000000] CPU features: detected: ARM erratum 845719
5938 00:44:43.837052 [ 0.000000] alternatives: applying boot alternatives
5939 00:44:43.840422 [ 0.000000] Fallback order for Node 0: 0
5940 00:44:43.846869 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5941 00:44:43.850576 [ 0.000000] Policy zone: Normal
5942 00:44:43.870118 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5943 00:44:43.883283 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5944 00:44:43.889764 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5945 00:44:43.899765 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5946 00:44:43.906668 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5947 00:44:43.909909 <6>[ 0.000000] software IO TLB: area num 8.
5948 00:44:43.934907 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5949 00:44:43.993419 <6>[ 0.000000] Memory: 3864156K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 294308K reserved, 32768K cma-reserved)
5950 00:44:44.000261 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5951 00:44:44.006648 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5952 00:44:44.009822 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5953 00:44:44.016446 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5954 00:44:44.022935 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5955 00:44:44.026408 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5956 00:44:44.036268 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5957 00:44:44.042957 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5958 00:44:44.049028 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5959 00:44:44.060012 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5960 00:44:44.063009 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5961 00:44:44.065656 <6>[ 0.000000] GICv3: 640 SPIs implemented
5962 00:44:44.073026 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5963 00:44:44.075875 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5964 00:44:44.082679 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5965 00:44:44.089686 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5966 00:44:44.099527 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5967 00:44:44.112605 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5968 00:44:44.118953 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5969 00:44:44.130386 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5970 00:44:44.143705 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5971 00:44:44.150388 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5972 00:44:44.157050 <6>[ 0.009477] Console: colour dummy device 80x25
5973 00:44:44.160522 <6>[ 0.014520] printk: console [tty1] enabled
5974 00:44:44.170438 <6>[ 0.018910] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5975 00:44:44.176731 <6>[ 0.029375] pid_max: default: 32768 minimum: 301
5976 00:44:44.180545 <6>[ 0.034256] LSM: Security Framework initializing
5977 00:44:44.190091 <6>[ 0.039173] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5978 00:44:44.196618 <6>[ 0.046796] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5979 00:44:44.203435 <4>[ 0.055671] cacheinfo: Unable to detect cache hierarchy for CPU 0
5980 00:44:44.213768 <6>[ 0.062300] cblist_init_generic: Setting adjustable number of callback queues.
5981 00:44:44.219908 <6>[ 0.069746] cblist_init_generic: Setting shift to 3 and lim to 1.
5982 00:44:44.226601 <6>[ 0.076099] cblist_init_generic: Setting adjustable number of callback queues.
5983 00:44:44.233575 <6>[ 0.083544] cblist_init_generic: Setting shift to 3 and lim to 1.
5984 00:44:44.237153 <6>[ 0.089942] rcu: Hierarchical SRCU implementation.
5985 00:44:44.243362 <6>[ 0.094969] rcu: Max phase no-delay instances is 1000.
5986 00:44:44.250944 <6>[ 0.102910] EFI services will not be available.
5987 00:44:44.253341 <6>[ 0.107859] smp: Bringing up secondary CPUs ...
5988 00:44:44.264462 <6>[ 0.113080] Detected VIPT I-cache on CPU1
5989 00:44:44.270328 <4>[ 0.113127] cacheinfo: Unable to detect cache hierarchy for CPU 1
5990 00:44:44.277186 <6>[ 0.113136] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5991 00:44:44.283956 <6>[ 0.113169] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5992 00:44:44.287138 <6>[ 0.113647] Detected VIPT I-cache on CPU2
5993 00:44:44.293524 <4>[ 0.113680] cacheinfo: Unable to detect cache hierarchy for CPU 2
5994 00:44:44.300732 <6>[ 0.113684] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5995 00:44:44.307459 <6>[ 0.113696] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5996 00:44:44.313823 <6>[ 0.114144] Detected VIPT I-cache on CPU3
5997 00:44:44.316923 <4>[ 0.114174] cacheinfo: Unable to detect cache hierarchy for CPU 3
5998 00:44:44.326742 <6>[ 0.114179] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5999 00:44:44.333214 <6>[ 0.114190] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6000 00:44:44.336973 <6>[ 0.114764] CPU features: detected: Spectre-v2
6001 00:44:44.339962 <6>[ 0.114774] CPU features: detected: Spectre-BHB
6002 00:44:44.346386 <6>[ 0.114778] CPU features: detected: ARM erratum 858921
6003 00:44:44.350025 <6>[ 0.114784] Detected VIPT I-cache on CPU4
6004 00:44:44.356478 <4>[ 0.114833] cacheinfo: Unable to detect cache hierarchy for CPU 4
6005 00:44:44.362859 <6>[ 0.114841] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6006 00:44:44.373430 <6>[ 0.114849] arch_timer: Enabling local workaround for ARM erratum 858921
6007 00:44:44.376554 <6>[ 0.114859] arch_timer: CPU4: Trapping CNTVCT access
6008 00:44:44.382746 <6>[ 0.114867] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6009 00:44:44.386073 <6>[ 0.115350] Detected VIPT I-cache on CPU5
6010 00:44:44.393064 <4>[ 0.115391] cacheinfo: Unable to detect cache hierarchy for CPU 5
6011 00:44:44.402871 <6>[ 0.115396] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6012 00:44:44.410180 <6>[ 0.115403] arch_timer: Enabling local workaround for ARM erratum 858921
6013 00:44:44.412886 <6>[ 0.115409] arch_timer: CPU5: Trapping CNTVCT access
6014 00:44:44.419466 <6>[ 0.115414] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6015 00:44:44.426128 <6>[ 0.115851] Detected VIPT I-cache on CPU6
6016 00:44:44.429587 <4>[ 0.115895] cacheinfo: Unable to detect cache hierarchy for CPU 6
6017 00:44:44.439363 <6>[ 0.115901] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6018 00:44:44.445806 <6>[ 0.115909] arch_timer: Enabling local workaround for ARM erratum 858921
6019 00:44:44.449112 <6>[ 0.115915] arch_timer: CPU6: Trapping CNTVCT access
6020 00:44:44.455656 <6>[ 0.115920] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6021 00:44:44.462223 <6>[ 0.116451] Detected VIPT I-cache on CPU7
6022 00:44:44.468758 <4>[ 0.116495] cacheinfo: Unable to detect cache hierarchy for CPU 7
6023 00:44:44.475352 <6>[ 0.116501] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6024 00:44:44.482219 <6>[ 0.116508] arch_timer: Enabling local workaround for ARM erratum 858921
6025 00:44:44.485291 <6>[ 0.116514] arch_timer: CPU7: Trapping CNTVCT access
6026 00:44:44.492061 <6>[ 0.116519] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6027 00:44:44.498617 <6>[ 0.116567] smp: Brought up 1 node, 8 CPUs
6028 00:44:44.502431 <6>[ 0.355466] SMP: Total of 8 processors activated.
6029 00:44:44.508666 <6>[ 0.360401] CPU features: detected: 32-bit EL0 Support
6030 00:44:44.515173 <6>[ 0.365780] CPU features: detected: 32-bit EL1 Support
6031 00:44:44.518309 <6>[ 0.371148] CPU features: detected: CRC32 instructions
6032 00:44:44.521735 <6>[ 0.376573] CPU: All CPU(s) started at EL2
6033 00:44:44.528880 <6>[ 0.380911] alternatives: applying system-wide alternatives
6034 00:44:44.536015 <6>[ 0.388905] devtmpfs: initialized
6035 00:44:44.551685 <6>[ 0.397837] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6036 00:44:44.558819 <6>[ 0.407787] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6037 00:44:44.561951 <6>[ 0.415513] pinctrl core: initialized pinctrl subsystem
6038 00:44:44.569940 <6>[ 0.422632] DMI not present or invalid.
6039 00:44:44.577072 <6>[ 0.426999] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6040 00:44:44.583168 <6>[ 0.433900] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6041 00:44:44.593246 <6>[ 0.441427] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6042 00:44:44.600119 <6>[ 0.449676] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6043 00:44:44.606312 <6>[ 0.457852] audit: initializing netlink subsys (disabled)
6044 00:44:44.613261 <5>[ 0.463556] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
6045 00:44:44.619544 <6>[ 0.464530] thermal_sys: Registered thermal governor 'step_wise'
6046 00:44:44.626714 <6>[ 0.471521] thermal_sys: Registered thermal governor 'power_allocator'
6047 00:44:44.629514 <6>[ 0.477817] cpuidle: using governor menu
6048 00:44:44.636351 <6>[ 0.488780] NET: Registered PF_QIPCRTR protocol family
6049 00:44:44.642958 <6>[ 0.494265] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6050 00:44:44.649668 <6>[ 0.501363] ASID allocator initialised with 32768 entries
6051 00:44:44.656265 <6>[ 0.508130] Serial: AMBA PL011 UART driver
6052 00:44:44.665676 <4>[ 0.518553] Trying to register duplicate clock ID: 113
6053 00:44:44.725841 <6>[ 0.574946] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6054 00:44:44.740506 <6>[ 0.589319] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6055 00:44:44.743945 <6>[ 0.599068] KASLR enabled
6056 00:44:44.758410 <6>[ 0.607068] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6057 00:44:44.764798 <6>[ 0.614071] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6058 00:44:44.770862 <6>[ 0.620548] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6059 00:44:44.777654 <6>[ 0.627538] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6060 00:44:44.784741 <6>[ 0.634013] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6061 00:44:44.790852 <6>[ 0.641003] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6062 00:44:44.797506 <6>[ 0.647477] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6063 00:44:44.804631 <6>[ 0.654467] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6064 00:44:44.807226 <6>[ 0.662039] ACPI: Interpreter disabled.
6065 00:44:44.817532 <6>[ 0.670037] iommu: Default domain type: Translated
6066 00:44:44.824401 <6>[ 0.675144] iommu: DMA domain TLB invalidation policy: strict mode
6067 00:44:44.828024 <5>[ 0.681772] SCSI subsystem initialized
6068 00:44:44.834107 <6>[ 0.686185] usbcore: registered new interface driver usbfs
6069 00:44:44.840661 <6>[ 0.691914] usbcore: registered new interface driver hub
6070 00:44:44.843666 <6>[ 0.697456] usbcore: registered new device driver usb
6071 00:44:44.851116 <6>[ 0.703761] pps_core: LinuxPPS API ver. 1 registered
6072 00:44:44.861530 <6>[ 0.708946] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6073 00:44:44.864992 <6>[ 0.718270] PTP clock support registered
6074 00:44:44.867543 <6>[ 0.722524] EDAC MC: Ver: 3.0.0
6075 00:44:44.875677 <6>[ 0.728158] FPGA manager framework
6076 00:44:44.882440 <6>[ 0.731842] Advanced Linux Sound Architecture Driver Initialized.
6077 00:44:44.885512 <6>[ 0.738600] vgaarb: loaded
6078 00:44:44.892137 <6>[ 0.741718] clocksource: Switched to clocksource arch_sys_counter
6079 00:44:44.895888 <5>[ 0.748147] VFS: Disk quotas dquot_6.6.0
6080 00:44:44.902246 <6>[ 0.752324] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6081 00:44:44.905178 <6>[ 0.759498] pnp: PnP ACPI: disabled
6082 00:44:44.913843 <6>[ 0.766394] NET: Registered PF_INET protocol family
6083 00:44:44.920450 <6>[ 0.771628] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6084 00:44:44.932627 <6>[ 0.781545] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6085 00:44:44.942136 <6>[ 0.790299] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6086 00:44:44.948816 <6>[ 0.798249] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6087 00:44:44.955982 <6>[ 0.806481] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6088 00:44:44.962302 <6>[ 0.814574] TCP: Hash tables configured (established 32768 bind 32768)
6089 00:44:44.971936 <6>[ 0.821403] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6090 00:44:44.978908 <6>[ 0.828374] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6091 00:44:44.985748 <6>[ 0.835855] NET: Registered PF_UNIX/PF_LOCAL protocol family
6092 00:44:44.988857 <6>[ 0.841945] RPC: Registered named UNIX socket transport module.
6093 00:44:44.995320 <6>[ 0.848088] RPC: Registered udp transport module.
6094 00:44:44.998820 <6>[ 0.853013] RPC: Registered tcp transport module.
6095 00:44:45.005462 <6>[ 0.857936] RPC: Registered tcp NFSv4.1 backchannel transport module.
6096 00:44:45.011937 <6>[ 0.864589] PCI: CLS 0 bytes, default 64
6097 00:44:45.015286 <6>[ 0.868877] Unpacking initramfs...
6098 00:44:45.037516 <6>[ 0.886316] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6099 00:44:45.047297 <6>[ 0.894942] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6100 00:44:45.050781 <6>[ 0.903795] kvm [1]: IPA Size Limit: 40 bits
6101 00:44:45.058135 <6>[ 0.910125] kvm [1]: vgic-v2@c420000
6102 00:44:45.060835 <6>[ 0.913941] kvm [1]: GIC system register CPU interface enabled
6103 00:44:45.069355 <6>[ 0.921817] kvm [1]: vgic interrupt IRQ18
6104 00:44:45.072543 <6>[ 0.926179] kvm [1]: Hyp mode initialized successfully
6105 00:44:45.080224 <5>[ 0.932556] Initialise system trusted keyrings
6106 00:44:45.086673 <6>[ 0.937409] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6107 00:44:45.095144 <6>[ 0.947397] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6108 00:44:45.101816 <5>[ 0.953866] NFS: Registering the id_resolver key type
6109 00:44:45.106564 <5>[ 0.959173] Key type id_resolver registered
6110 00:44:45.109624 <5>[ 0.963587] Key type id_legacy registered
6111 00:44:45.116193 <6>[ 0.967891] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6112 00:44:45.125738 <6>[ 0.974811] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6113 00:44:45.129601 <6>[ 0.982583] 9p: Installing v9fs 9p2000 file system support
6114 00:44:45.158897 <5>[ 1.011091] Key type asymmetric registered
6115 00:44:45.161804 <5>[ 1.015436] Asymmetric key parser 'x509' registered
6116 00:44:45.172437 <6>[ 1.020591] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6117 00:44:45.175474 <6>[ 1.028208] io scheduler mq-deadline registered
6118 00:44:45.178652 <6>[ 1.032966] io scheduler kyber registered
6119 00:44:45.201788 <6>[ 1.053796] EINJ: ACPI disabled.
6120 00:44:45.208258 <4>[ 1.057553] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6121 00:44:45.245617 <6>[ 1.098382] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6122 00:44:45.254502 <6>[ 1.106875] printk: console [ttyS0] disabled
6123 00:44:45.282462 <6>[ 1.131524] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6124 00:44:45.289129 <6>[ 1.140998] printk: console [ttyS0] enabled
6125 00:44:45.292243 <6>[ 1.140998] printk: console [ttyS0] enabled
6126 00:44:45.298948 <6>[ 1.149914] printk: bootconsole [mtk8250] disabled
6127 00:44:45.302434 <6>[ 1.149914] printk: bootconsole [mtk8250] disabled
6128 00:44:45.312350 <3>[ 1.160453] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6129 00:44:45.318630 <3>[ 1.168837] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6130 00:44:45.348822 <6>[ 1.197249] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6131 00:44:45.354971 <6>[ 1.206908] serial serial0: tty port ttyS1 registered
6132 00:44:45.361403 <6>[ 1.213483] SuperH (H)SCI(F) driver initialized
6133 00:44:45.364850 <6>[ 1.218989] msm_serial: driver initialized
6134 00:44:45.380017 <6>[ 1.229315] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6135 00:44:45.390232 <6>[ 1.237923] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6136 00:44:45.397284 <6>[ 1.246499] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6137 00:44:45.406887 <6>[ 1.255067] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6138 00:44:45.413504 <6>[ 1.263719] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6139 00:44:45.422952 <6>[ 1.272380] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6140 00:44:45.433294 <6>[ 1.281119] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6141 00:44:45.440279 <6>[ 1.289859] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6142 00:44:45.449469 <6>[ 1.298425] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6143 00:44:45.459938 <6>[ 1.307225] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6144 00:44:45.467312 <4>[ 1.319652] cacheinfo: Unable to detect cache hierarchy for CPU 0
6145 00:44:45.476478 <6>[ 1.329021] loop: module loaded
6146 00:44:45.488587 <6>[ 1.340964] vsim1: Bringing 1800000uV into 2700000-2700000uV
6147 00:44:45.506448 <6>[ 1.358838] megasas: 07.719.03.00-rc1
6148 00:44:45.514825 <6>[ 1.367630] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6149 00:44:45.524883 <6>[ 1.377115] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6150 00:44:45.541627 <6>[ 1.393950] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6151 00:44:45.598632 <6>[ 1.444138] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6152 00:44:46.702622 <6>[ 2.555194] Freeing initrd memory: 50916K
6153 00:44:46.718210 <4>[ 2.567178] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6154 00:44:46.724424 <4>[ 2.576412] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6155 00:44:46.732278 <4>[ 2.583111] Hardware name: Google juniper sku16 board (DT)
6156 00:44:46.734442 <4>[ 2.588849] Call trace:
6157 00:44:46.737705 <4>[ 2.591549] dump_backtrace.part.0+0xe0/0xf0
6158 00:44:46.741476 <4>[ 2.596086] show_stack+0x18/0x30
6159 00:44:46.744666 <4>[ 2.599658] dump_stack_lvl+0x68/0x84
6160 00:44:46.751283 <4>[ 2.603579] dump_stack+0x18/0x34
6161 00:44:46.754756 <4>[ 2.607149] sysfs_warn_dup+0x64/0x80
6162 00:44:46.758889 <4>[ 2.611070] sysfs_do_create_link_sd+0xf0/0x100
6163 00:44:46.760995 <4>[ 2.615858] sysfs_create_link+0x20/0x40
6164 00:44:46.767648 <4>[ 2.620037] bus_add_device+0x68/0x10c
6165 00:44:46.771037 <4>[ 2.624043] device_add+0x340/0x7ac
6166 00:44:46.774522 <4>[ 2.627786] of_device_add+0x44/0x60
6167 00:44:46.781316 <4>[ 2.631620] of_platform_device_create_pdata+0x90/0x120
6168 00:44:46.784183 <4>[ 2.637101] of_platform_bus_create+0x170/0x370
6169 00:44:46.788109 <4>[ 2.641888] of_platform_populate+0x50/0xfc
6170 00:44:46.794747 <4>[ 2.646327] parse_mtd_partitions+0x1dc/0x510
6171 00:44:46.798054 <4>[ 2.650941] mtd_device_parse_register+0xf8/0x2e0
6172 00:44:46.800983 <4>[ 2.655898] spi_nor_probe+0x21c/0x2f0
6173 00:44:46.807666 <4>[ 2.659904] spi_mem_probe+0x6c/0xb0
6174 00:44:46.810528 <4>[ 2.663737] spi_probe+0x84/0xe4
6175 00:44:46.814091 <4>[ 2.667219] really_probe+0xbc/0x2e0
6176 00:44:46.817608 <4>[ 2.671050] __driver_probe_device+0x78/0x11c
6177 00:44:46.824086 <4>[ 2.675662] driver_probe_device+0xd8/0x160
6178 00:44:46.827261 <4>[ 2.680099] __device_attach_driver+0xb8/0x134
6179 00:44:46.830487 <4>[ 2.684798] bus_for_each_drv+0x78/0xd0
6180 00:44:46.834131 <4>[ 2.688888] __device_attach+0xa8/0x1c0
6181 00:44:46.840635 <4>[ 2.692978] device_initial_probe+0x14/0x20
6182 00:44:46.843910 <4>[ 2.697417] bus_probe_device+0x9c/0xa4
6183 00:44:46.847279 <4>[ 2.701507] device_add+0x3ac/0x7ac
6184 00:44:46.850834 <4>[ 2.705249] __spi_add_device+0x78/0x120
6185 00:44:46.857253 <4>[ 2.709427] spi_add_device+0x40/0x7c
6186 00:44:46.860314 <4>[ 2.713344] spi_register_controller+0x610/0xad0
6187 00:44:46.867385 <4>[ 2.718217] devm_spi_register_controller+0x4c/0xa4
6188 00:44:46.870820 <4>[ 2.723350] mtk_spi_probe+0x3f8/0x650
6189 00:44:46.873454 <4>[ 2.727354] platform_probe+0x68/0xe0
6190 00:44:46.877081 <4>[ 2.731272] really_probe+0xbc/0x2e0
6191 00:44:46.883458 <4>[ 2.735102] __driver_probe_device+0x78/0x11c
6192 00:44:46.886974 <4>[ 2.739713] driver_probe_device+0xd8/0x160
6193 00:44:46.890080 <4>[ 2.744151] __driver_attach+0x94/0x19c
6194 00:44:46.893459 <4>[ 2.748242] bus_for_each_dev+0x70/0xd0
6195 00:44:46.899949 <4>[ 2.752331] driver_attach+0x24/0x30
6196 00:44:46.903250 <4>[ 2.756161] bus_add_driver+0x154/0x20c
6197 00:44:46.906464 <4>[ 2.760251] driver_register+0x78/0x130
6198 00:44:46.913121 <4>[ 2.764342] __platform_driver_register+0x28/0x34
6199 00:44:46.916315 <4>[ 2.769302] mtk_spi_driver_init+0x1c/0x28
6200 00:44:46.919997 <4>[ 2.773655] do_one_initcall+0x50/0x1d0
6201 00:44:46.923510 <4>[ 2.777746] kernel_init_freeable+0x21c/0x288
6202 00:44:46.929820 <4>[ 2.782359] kernel_init+0x24/0x12c
6203 00:44:46.933172 <4>[ 2.786104] ret_from_fork+0x10/0x20
6204 00:44:46.942158 <6>[ 2.794991] tun: Universal TUN/TAP device driver, 1.6
6205 00:44:46.945832 <6>[ 2.801273] thunder_xcv, ver 1.0
6206 00:44:46.949142 <6>[ 2.804790] thunder_bgx, ver 1.0
6207 00:44:46.952522 <6>[ 2.808294] nicpf, ver 1.0
6208 00:44:46.963748 <6>[ 2.812678] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6209 00:44:46.967432 <6>[ 2.820162] hns3: Copyright (c) 2017 Huawei Corporation.
6210 00:44:46.973757 <6>[ 2.825767] hclge is initializing
6211 00:44:46.977122 <6>[ 2.829348] e1000: Intel(R) PRO/1000 Network Driver
6212 00:44:46.983560 <6>[ 2.834485] e1000: Copyright (c) 1999-2006 Intel Corporation.
6213 00:44:46.987206 <6>[ 2.840507] e1000e: Intel(R) PRO/1000 Network Driver
6214 00:44:46.993313 <6>[ 2.845728] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6215 00:44:46.999920 <6>[ 2.851921] igb: Intel(R) Gigabit Ethernet Network Driver
6216 00:44:47.006920 <6>[ 2.857576] igb: Copyright (c) 2007-2014 Intel Corporation.
6217 00:44:47.013399 <6>[ 2.863419] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6218 00:44:47.020032 <6>[ 2.869942] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6219 00:44:47.023518 <6>[ 2.876495] sky2: driver version 1.30
6220 00:44:47.029683 <6>[ 2.881768] usbcore: registered new device driver r8152-cfgselector
6221 00:44:47.036736 <6>[ 2.888309] usbcore: registered new interface driver r8152
6222 00:44:47.042982 <6>[ 2.894162] VFIO - User Level meta-driver version: 0.3
6223 00:44:47.049812 <6>[ 2.901983] mtu3 11201000.usb: uwk - reg:0x420, version:101
6224 00:44:47.056305 <4>[ 2.907855] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6225 00:44:47.063217 <6>[ 2.915132] mtu3 11201000.usb: dr_mode: 1, drd: auto
6226 00:44:47.069606 <6>[ 2.920358] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6227 00:44:47.072548 <6>[ 2.926543] mtu3 11201000.usb: usb3-drd: 0
6228 00:44:47.082803 <6>[ 2.932087] mtu3 11201000.usb: xHCI platform device register success...
6229 00:44:47.090025 <4>[ 2.940712] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6230 00:44:47.095919 <6>[ 2.948640] xhci-mtk 11200000.usb: xHCI Host Controller
6231 00:44:47.103175 <6>[ 2.954167] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6232 00:44:47.110400 <6>[ 2.961890] xhci-mtk 11200000.usb: USB3 root hub has no ports
6233 00:44:47.120034 <6>[ 2.967899] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6234 00:44:47.127170 <6>[ 2.977322] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6235 00:44:47.130177 <6>[ 2.983388] xhci-mtk 11200000.usb: xHCI Host Controller
6236 00:44:47.139860 <6>[ 2.988875] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6237 00:44:47.146845 <6>[ 2.996534] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6238 00:44:47.150072 <6>[ 3.003353] hub 1-0:1.0: USB hub found
6239 00:44:47.153484 <6>[ 3.007381] hub 1-0:1.0: 1 port detected
6240 00:44:47.163360 <6>[ 3.012721] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6241 00:44:47.166501 <6>[ 3.021332] hub 2-0:1.0: USB hub found
6242 00:44:47.176399 <3>[ 3.025360] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6243 00:44:47.183264 <6>[ 3.033245] usbcore: registered new interface driver usb-storage
6244 00:44:47.190557 <6>[ 3.039855] usbcore: registered new device driver onboard-usb-hub
6245 00:44:47.205055 <4>[ 3.053819] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6246 00:44:47.213919 <6>[ 3.066139] mt6397-rtc mt6358-rtc: registered as rtc0
6247 00:44:47.223247 <6>[ 3.071619] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:44:47 UTC (1718498687)
6248 00:44:47.229945 <6>[ 3.081515] i2c_dev: i2c /dev entries driver
6249 00:44:47.240440 <6>[ 3.087941] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6250 00:44:47.247384 <6>[ 3.096288] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6251 00:44:47.253114 <6>[ 3.105196] i2c 4-0058: Fixed dependency cycle(s) with /panel
6252 00:44:47.260440 <6>[ 3.111229] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6253 00:44:47.270011 <3>[ 3.118697] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6254 00:44:47.286332 <6>[ 3.138633] cpu cpu0: EM: created perf domain
6255 00:44:47.296548 <6>[ 3.144133] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6256 00:44:47.303088 <6>[ 3.155445] cpu cpu4: EM: created perf domain
6257 00:44:47.309908 <6>[ 3.162197] sdhci: Secure Digital Host Controller Interface driver
6258 00:44:47.316848 <6>[ 3.168652] sdhci: Copyright(c) Pierre Ossman
6259 00:44:47.322796 <6>[ 3.174065] Synopsys Designware Multimedia Card Interface Driver
6260 00:44:47.329636 <6>[ 3.174542] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6261 00:44:47.332722 <6>[ 3.181143] sdhci-pltfm: SDHCI platform and OF driver helper
6262 00:44:47.341353 <6>[ 3.193676] ledtrig-cpu: registered to indicate activity on CPUs
6263 00:44:47.349691 <6>[ 3.201388] usbcore: registered new interface driver usbhid
6264 00:44:47.352275 <6>[ 3.207230] usbhid: USB HID core driver
6265 00:44:47.362752 <6>[ 3.211557] spi_master spi2: will run message pump with realtime priority
6266 00:44:47.366765 <4>[ 3.211694] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6267 00:44:47.376442 <4>[ 3.225862] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6268 00:44:47.389999 <6>[ 3.230598] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6269 00:44:47.403168 <6>[ 3.248218] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6270 00:44:47.410026 <4>[ 3.255652] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6271 00:44:47.417254 <6>[ 3.269083] cros-ec-spi spi2.0: Chrome EC device registered
6272 00:44:47.427616 <4>[ 3.276613] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6273 00:44:47.438564 <4>[ 3.287585] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6274 00:44:47.445389 <4>[ 3.296262] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6275 00:44:47.453449 <6>[ 3.305580] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x12c14
6276 00:44:47.459969 <6>[ 3.305619] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6277 00:44:47.466953 <6>[ 3.313435] mmc0: new HS400 MMC card at address 0001
6278 00:44:47.473161 <6>[ 3.324660] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6279 00:44:47.482509 <6>[ 3.335076] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6280 00:44:47.492270 <6>[ 3.344596] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6281 00:44:47.499284 <6>[ 3.351891] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6282 00:44:47.506924 <6>[ 3.359329] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6283 00:44:47.516735 <6>[ 3.359817] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6284 00:44:47.533546 <6>[ 3.379277] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6285 00:44:47.543149 <6>[ 3.380054] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6286 00:44:47.553231 <6>[ 3.391573] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6287 00:44:47.560119 <6>[ 3.403751] NET: Registered PF_PACKET protocol family
6288 00:44:47.563457 <6>[ 3.417708] 9pnet: Installing 9P2000 support
6289 00:44:47.569733 <5>[ 3.422480] Key type dns_resolver registered
6290 00:44:47.573493 <6>[ 3.427734] registered taskstats version 1
6291 00:44:47.579959 <6>[ 3.432103] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6292 00:44:47.586323 <5>[ 3.439107] Loading compiled-in X.509 certificates
6293 00:44:47.641044 <3>[ 3.490229] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6294 00:44:47.673126 <6>[ 3.518748] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6295 00:44:47.684280 <6>[ 3.533181] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6296 00:44:47.694432 <6>[ 3.542019] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6297 00:44:47.700677 <6>[ 3.550587] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6298 00:44:47.710850 <6>[ 3.559114] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6299 00:44:47.717943 <6>[ 3.567635] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6300 00:44:47.727388 <6>[ 3.576158] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6301 00:44:47.737548 <6>[ 3.584677] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6302 00:44:47.740615 <6>[ 3.593212] hub 1-1:1.0: USB hub found
6303 00:44:47.746972 <6>[ 3.593848] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6304 00:44:47.750635 <6>[ 3.597672] hub 1-1:1.0: 3 ports detected
6305 00:44:47.757362 <6>[ 3.604563] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6306 00:44:47.763826 <6>[ 3.615224] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6307 00:44:47.770551 <6>[ 3.622403] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6308 00:44:47.780494 <6>[ 3.629739] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6309 00:44:47.787082 <6>[ 3.637792] panfrost 13040000.gpu: clock rate = 511999970
6310 00:44:47.797271 <6>[ 3.643468] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6311 00:44:47.803624 <6>[ 3.653972] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6312 00:44:47.814157 <6>[ 3.661985] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6313 00:44:47.823730 <6>[ 3.670417] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6314 00:44:47.830550 <6>[ 3.682495] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6315 00:44:47.843695 <6>[ 3.692482] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6316 00:44:47.853454 <6>[ 3.701608] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6317 00:44:47.863304 <6>[ 3.710775] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6318 00:44:47.873181 <6>[ 3.719907] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6319 00:44:47.879567 <6>[ 3.729034] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6320 00:44:47.889942 <6>[ 3.738333] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6321 00:44:47.899387 <6>[ 3.747632] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6322 00:44:47.909510 <6>[ 3.757106] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6323 00:44:47.919471 <6>[ 3.766579] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6324 00:44:47.925854 <6>[ 3.775704] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6325 00:44:48.000110 <6>[ 3.849307] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6326 00:44:48.010089 <6>[ 3.858197] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6327 00:44:48.020469 <6>[ 3.869874] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6328 00:44:48.052935 <6>[ 3.901747] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6329 00:44:48.721614 <6>[ 4.086208] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6330 00:44:48.727990 <6>[ 4.225862] r8152 1-1.2:1.0: load rtl8153b-2 v1 10/23/19 successfully
6331 00:44:48.731065 <6>[ 4.264076] r8152 1-1.2:1.0 eth0: v1.12.13
6332 00:44:48.741678 <6>[ 4.345748] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6333 00:44:48.747805 <6>[ 4.554094] Console: switching to colour frame buffer device 170x48
6334 00:44:48.754600 <6>[ 4.604175] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6335 00:44:48.776397 <6>[ 4.622661] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6336 00:44:48.794358 <6>[ 4.639926] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6337 00:44:48.804452 <6>[ 4.653210] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6338 00:44:48.810696 <6>[ 4.661597] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6339 00:44:48.824362 <6>[ 4.669214] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6340 00:44:48.843881 <6>[ 4.689280] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6341 00:44:50.130084 <6>[ 5.982655] r8152 1-1.2:1.0 eth0: carrier on
6342 00:44:52.757016 <5>[ 6.009750] Sending DHCP requests .., OK
6343 00:44:52.763717 <6>[ 8.614078] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6344 00:44:52.766976 <6>[ 8.622518] IP-Config: Complete:
6345 00:44:52.780255 <6>[ 8.626090] device=eth0, hwaddr=00:e0:4c:72:3d:67, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6346 00:44:52.790410 <6>[ 8.637019] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1, domain=lava-rack, nis-domain=(none)
6347 00:44:52.797098 <6>[ 8.646501] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6348 00:44:52.806432 <6>[ 8.646511] nameserver0=192.168.201.1
6349 00:44:52.816668 <6>[ 8.669370] clk: Disabling unused clocks
6350 00:44:52.822535 <6>[ 8.678312] ALSA device list:
6351 00:44:52.832273 <6>[ 8.684706] No soundcards found.
6352 00:44:52.842079 <6>[ 8.694425] Freeing unused kernel memory: 8512K
6353 00:44:52.849490 <6>[ 8.702304] Run /init as init process
6354 00:44:52.884160 <6>[ 8.736675] NET: Registered PF_INET6 protocol family
6355 00:44:52.892007 <6>[ 8.744019] Segment Routing with IPv6
6356 00:44:52.894895 <6>[ 8.748669] In-situ OAM (IOAM) with IPv6
6357 00:44:52.941967 <30>[ 8.767477] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6358 00:44:52.950187 <30>[ 8.802716] systemd[1]: Detected architecture arm64.
6359 00:44:52.950620
6360 00:44:52.957306 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6361 00:44:52.957731
6362 00:44:52.969237 <30>[ 8.821949] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6363 00:44:53.113234 <30>[ 8.962192] systemd[1]: Queued start job for default target graphical.target.
6364 00:44:53.150678 <30>[ 8.999335] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6365 00:44:53.160344 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6366 00:44:53.178011 <30>[ 9.027210] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6367 00:44:53.188508 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6368 00:44:53.206145 <30>[ 9.055166] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6369 00:44:53.217805 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6370 00:44:53.238818 <30>[ 9.087755] systemd[1]: Created slice user.slice - User and Session Slice.
6371 00:44:53.249477 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6372 00:44:53.268392 <30>[ 9.114222] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6373 00:44:53.280035 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6374 00:44:53.300388 <30>[ 9.146243] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6375 00:44:53.312473 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6376 00:44:53.338962 <30>[ 9.178032] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6377 00:44:53.356841 <30>[ 9.206104] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6378 00:44:53.364417 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6379 00:44:53.384762 <30>[ 9.233903] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6380 00:44:53.397156 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6381 00:44:53.412930 <30>[ 9.261973] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6382 00:44:53.427082 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6383 00:44:53.441608 <30>[ 9.294005] systemd[1]: Reached target paths.target - Path Units.
6384 00:44:53.455987 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6385 00:44:53.472966 <30>[ 9.321915] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6386 00:44:53.484820 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6387 00:44:53.497255 <30>[ 9.349889] systemd[1]: Reached target slices.target - Slice Units.
6388 00:44:53.512064 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6389 00:44:53.525212 <30>[ 9.377935] systemd[1]: Reached target swap.target - Swaps.
6390 00:44:53.536240 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6391 00:44:53.557082 <30>[ 9.405970] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6392 00:44:53.570417 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6393 00:44:53.589030 <30>[ 9.438330] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6394 00:44:53.602790 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6395 00:44:53.621968 <30>[ 9.471360] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6396 00:44:53.635719 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6397 00:44:53.653141 <30>[ 9.502602] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6398 00:44:53.667321 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6399 00:44:53.685337 <30>[ 9.534562] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6400 00:44:53.697920 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6401 00:44:53.717592 <30>[ 9.566734] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6402 00:44:53.731281 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6403 00:44:53.749515 <30>[ 9.598657] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6404 00:44:53.762463 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6405 00:44:53.781414 <30>[ 9.630391] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6406 00:44:53.794570 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6407 00:44:53.849431 <30>[ 9.698435] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6408 00:44:53.859520 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6409 00:44:53.870654 <30>[ 9.719668] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6410 00:44:53.881517 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6411 00:44:53.894777 <30>[ 9.744145] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6412 00:44:53.907542 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6413 00:44:53.936076 <30>[ 9.778468] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6414 00:44:53.982055 <30>[ 9.830749] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6415 00:44:53.995467 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6416 00:44:54.019337 <30>[ 9.868180] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6417 00:44:54.033093 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6418 00:44:54.054443 <30>[ 9.903418] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6419 00:44:54.071711 Startin<6>[ 9.917253] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6420 00:44:54.074123 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6421 00:44:54.121312 <30>[ 9.970432] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6422 00:44:54.132500 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6423 00:44:54.155021 <30>[ 10.004171] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6424 00:44:54.167554 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6425 00:44:54.190550 <30>[ 10.040008] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6426 00:44:54.202189 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6427 00:44:54.249502 <30>[ 10.098459] systemd[1]: Starting systemd-journald.service - Journal Service...
6428 00:44:54.260178 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6429 00:44:54.280994 <30>[ 10.129970] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6430 00:44:54.291570 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6431 00:44:54.314513 <30>[ 10.160070] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6432 00:44:54.320792 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6433 00:44:54.345307 <30>[ 10.194121] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6434 00:44:54.357734 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6435 00:44:54.380624 <30>[ 10.228799] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6436 00:44:54.390841 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6437 00:44:54.416328 <30>[ 10.265646] systemd[1]: Started systemd-journald.service - Journal Service.
6438 00:44:54.427452 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6439 00:44:54.446913 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6440 00:44:54.470866 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6441 00:44:54.493755 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6442 00:44:54.514272 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6443 00:44:54.533928 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6444 00:44:54.560018 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6445 00:44:54.579884 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6446 00:44:54.603419 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6447 00:44:54.628481 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6448 00:44:54.647486 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6449 00:44:54.666818 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6450 00:44:54.691506 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6451 00:44:54.709961 See 'systemctl status systemd-remount-fs.service' for details.
6452 00:44:54.730862 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6453 00:44:54.756326 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6454 00:44:54.798151 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6455 00:44:54.823106 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6456 00:44:54.836080 <46>[ 10.684522] systemd-journald[202]: Received client request to flush runtime journal.
6457 00:44:54.850086 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6458 00:44:54.869238 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6459 00:44:54.890587 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6460 00:44:54.920438 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6461 00:44:54.939890 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6462 00:44:54.960547 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6463 00:44:54.979450 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6464 00:44:54.998603 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6465 00:44:55.038435 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6466 00:44:55.074650 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6467 00:44:55.094209 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6468 00:44:55.113971 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6469 00:44:55.162245 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6470 00:44:55.185961 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6471 00:44:55.213507 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6472 00:44:55.252400 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6473 00:44:55.264444 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6474 00:44:55.281949 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6475 00:44:55.309578 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6476 00:44:55.331117 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6477 00:44:55.360019 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6478 00:44:55.480616 <3>[ 11.327018] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6479 00:44:55.487793 <3>[ 11.339031] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6480 00:44:55.501766 <3>[ 11.347965] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6481 00:44:55.508252 <3>[ 11.360887] elan_i2c 2-0015: Error applying setting, reverse things back
6482 00:44:55.520606 <6>[ 11.369110] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6483 00:44:55.530358 <6>[ 11.369899] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6484 00:44:55.543924 <3>[ 11.396301] thermal_sys: Failed to find 'trips' node
6485 00:44:55.554628 <3>[ 11.403523] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6486 00:44:55.564224 <3>[ 11.412715] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6487 00:44:55.574510 <4>[ 11.423044] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6488 00:44:55.582488 <3>[ 11.434631] thermal_sys: Failed to find 'trips' node
6489 00:44:55.592591 <3>[ 11.440707] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6490 00:44:55.598790 <3>[ 11.448934] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6491 00:44:55.609108 <4>[ 11.458148] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6492 00:44:55.616053 <4>[ 11.462345] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6493 00:44:55.619318 <6>[ 11.470378] Bluetooth: Core ver 2.22
6494 00:44:55.629037 <4>[ 11.475098] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6495 00:44:55.635588 <6>[ 11.477404] NET: Registered PF_BLUETOOTH protocol family
6496 00:44:55.647595 <4>[ 11.496680] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6497 00:44:55.654235 <6>[ 11.498779] Bluetooth: HCI device and connection manager initialized
6498 00:44:55.660940 <6>[ 11.512337] Bluetooth: HCI socket layer initialized
6499 00:44:55.670689 <6>[ 11.516720] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6500 00:44:55.673828 <6>[ 11.517489] Bluetooth: L2CAP socket layer initialized
6501 00:44:55.680868 <3>[ 11.528392] mtk-scp 10500000.scp: invalid resource
6502 00:44:55.688908 <6>[ 11.532794] Bluetooth: SCO socket layer initialized
6503 00:44:55.711348 <6>[ 11.560248] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6504 00:44:55.719736 <6>[ 11.571721] mc: Linux media interface: v0.10
6505 00:44:55.739676 <6>[ 11.585191] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6506 00:44:55.764945 <6>[ 11.617426] remoteproc remoteproc0: scp is available
6507 00:44:55.778738 <4>[ 11.627278] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6508 00:44:55.787051 <6>[ 11.639587] remoteproc remoteproc0: powering up scp
6509 00:44:55.799425 <4>[ 11.648579] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6510 00:44:55.808094 <3>[ 11.659809] remoteproc remoteproc0: request_firmware failed: -2
6511 00:44:55.821026 <3>[ 11.660545] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6512 00:44:55.838134 <6>[ 11.686710] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input6
6513 00:44:55.861050 <3>[ 11.706739] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6514 00:44:55.877552 <3>[ 11.726764] debugfs: File 'Playback' in directory 'dapm' already present!
6515 00:44:55.890130 <3>[ 11.739108] debugfs: File 'Capture' in directory 'dapm' already present!
6516 00:44:55.900335 <3>[ 11.749714] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6517 00:44:55.912169 <3>[ 11.760204] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6518 00:44:55.921701 <3>[ 11.770583] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6519 00:44:55.964805 <3>[ 11.813306] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6520 00:44:55.977531 <3>[ 11.825972] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6521 00:44:55.983396 <6>[ 11.826615] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6522 00:44:55.996997 <6>[ 11.827257] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7
6523 00:44:56.006518 <3>[ 11.834532] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6524 00:44:56.022321 <3>[ 11.871265] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6525 00:44:56.033370 <3>[ 11.881801] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6526 00:44:56.044119 <3>[ 11.892198] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6527 00:44:56.049979 <6>[ 11.893058] cs_system_cfg: CoreSight Configuration manager initialised
6528 00:44:56.059952 <6>[ 11.911866] videodev: Linux video capture interface: v2.00
6529 00:44:56.080197 <6>[ 11.932542] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6530 00:44:56.110474 <6>[ 11.959511] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6531 00:44:56.150569 <6>[ 12.002928] Bluetooth: HCI UART driver ver 2.3
6532 00:44:56.161460 <6>[ 12.013177] Bluetooth: HCI UART protocol H4 registered
6533 00:44:56.180955 <6>[ 12.029645] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6534 00:44:56.201216 <6>[ 12.049883] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6535 00:44:56.223296 <6>[ 12.072419] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6536 00:44:56.256938 <6>[ 12.108757] Bluetooth: HCI UART protocol LL registered
6537 00:44:56.285243 <6>[ 12.137523] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6538 00:44:56.302609 <6>[ 12.151592] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6539 00:44:56.318190 <6>[ 12.170387] Bluetooth: HCI UART protocol Three-wire (H5) registered
6540 00:44:56.335727 <5>[ 12.184616] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6541 00:44:56.362925 <5>[ 12.211711] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6542 00:44:56.369507 <6>[ 12.214847] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6543 00:44:56.376560 <6>[ 12.215701] Bluetooth: HCI UART protocol Broadcom registered
6544 00:44:56.379739 <6>[ 12.217044] Bluetooth: HCI UART protocol QCA registered
6545 00:44:56.386187 <6>[ 12.217179] Bluetooth: HCI UART protocol Marvell registered
6546 00:44:56.398648 <5>[ 12.220804] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6547 00:44:56.408362 <6>[ 12.227141] Bluetooth: hci0: setting up ROME/QCA6390
6548 00:44:56.420769 <4>[ 12.232843] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6549 00:44:56.450199 <4>[ 12.299275] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6550 00:44:56.457823 <4>[ 12.299275] Fallback method does not support PEC.
6551 00:44:56.460864 <6>[ 12.299391] cfg80211: failed to load regulatory.db
6552 00:44:56.480685 <6>[ 12.329742] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6553 00:44:56.491569 <3>[ 12.340143] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6554 00:44:56.507642 <6>[ 12.342752] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6555 00:44:56.517803 <3>[ 12.356304] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6556 00:44:56.529668 <6>[ 12.378411] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6557 00:44:56.552602 <6>[ 12.401116] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6558 00:44:56.576209 <6>[ 12.424796] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6559 00:44:56.602729 <3>[ 12.454905] Bluetooth: hci0: Frame reassembly failed (-84)
6560 00:44:56.661409 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6561 00:44:56.679801 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6562 00:44:56.723900 <6>[ 12.569296] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6563 00:44:56.759207 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6564 00:44:56.804139 <6>[ 12.656607] usbcore: registered new interface driver uvcvideo
6565 00:44:56.847782 <3>[ 12.696750] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6566 00:44:56.859598 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6567 00:44:56.866030 <3>[ 12.716813] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6568 00:44:56.876787 <3>[ 12.718852] power_supply sbs-12-000b: driver failed to report `status' property: -6
6569 00:44:56.883839 <3>[ 12.725420] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6570 00:44:56.891061 <6>[ 12.733724] Bluetooth: hci0: QCA Product ID :0x00000008
6571 00:44:56.897941 <3>[ 12.743302] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6572 00:44:56.904332 <6>[ 12.747046] Bluetooth: hci0: QCA SOC Version :0x00000044
6573 00:44:56.920541 <6>[ 12.772860] Bluetooth: hci0: QCA ROM Version :0x00000302
6574 00:44:56.928613 <6>[ 12.772871] Bluetooth: hci0: QCA Patch Version:0x00000111
6575 00:44:56.938880 <6>[ 12.772879] Bluetooth: hci0: QCA controller version 0x00440302
6576 00:44:56.950033 <6>[ 12.772884] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6577 00:44:56.960071 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6578 00:44:56.978183 <3>[ 12.826789] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6579 00:44:56.993864 <3>[ 12.842713] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6580 00:44:57.008540 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Sup<3>[ 12.857701] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6581 00:44:57.011790 port.
6582 00:44:57.024780 <6>[ 12.872701] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6583 00:44:57.036209 <6>[ 12.884767] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6584 00:44:57.051359 [[0;32m OK [0m] Reached targ<6>[ 12.895704] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6585 00:44:57.055036 et [0;1;39msound.target[0m - Sound Card.
6586 00:44:57.072278 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6587 00:44:57.092913 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6588 00:44:57.117333 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6589 00:44:57.137916 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6590 00:44:57.159406 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6591 00:44:57.175669 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6592 00:44:57.192019 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6593 00:44:57.209044 [[0;32m OK [<6>[ 13.058015] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6594 00:44:57.215322 0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6595 00:44:57.259693 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6596 00:44:57.287386 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6597 00:44:57.304732 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6598 00:44:57.325542 [[0;32m OK [0m] Started [0;<6>[ 13.176750] Bluetooth: hci0: QCA Downloading qca/nvm_00440302_i2s.bin
6599 00:44:57.338522 1;39mdbus.service[0m - D-Bus System Message Bus<4>[ 13.186863] bluetooth hci0: Direct firmware load for qca/nvm_00440302_i2s.bin failed with error -2
6600 00:44:57.341692 .
6601 00:44:57.351634 <3>[ 13.200160] Bluetooth: hci0: QCA Failed to request file: qca/nvm_00440302_i2s.bin (-2)
6602 00:44:57.359371 <3>[ 13.211572] Bluetooth: hci0: QCA Failed to download NVM (-2)
6603 00:44:57.368342 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6604 00:44:57.408233 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6605 00:44:57.436152 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6606 00:44:57.453029 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6607 00:44:57.475075 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6608 00:44:57.496673 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6609 00:44:57.545596 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6610 00:44:57.582533 <6>[ 13.431273] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6611 00:44:57.600170 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6612 00:44:57.619893 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6613 00:44:57.638641 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6614 00:44:57.656327 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6615 00:44:57.672010 <4>[ 13.520638] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6616 00:44:57.699377 <4>[ 13.547938] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6617 00:44:57.719214 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP..<4>[ 13.567489] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6618 00:44:57.719681 .
6619 00:44:57.726783 <4>[ 13.579262] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6620 00:44:57.781169 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6621 00:44:57.827541
6622 00:44:57.830701 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6623 00:44:57.831095
6624 00:44:57.833971 debian-bookworm-arm64 login: root (automatic login)
6625 00:44:57.834386
6626 00:44:57.849603 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:28:47 UTC 2024 aarch64
6627 00:44:57.850102
6628 00:44:57.856705 The programs included with the Debian GNU/Linux system are free software;
6629 00:44:57.862955 the exact distribution terms for each program are described in the
6630 00:44:57.866495 individual files in /usr/share/doc/*/copyright.
6631 00:44:57.866971
6632 00:44:57.872888 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6633 00:44:57.876242 permitted by applicable law.
6634 00:44:57.877609 Matched prompt #10: / #
6636 00:44:57.878556 Setting prompt string to ['/ #']
6637 00:44:57.878963 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6639 00:44:57.879850 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6640 00:44:57.880294 start: 2.2.6 expect-shell-connection (timeout 00:03:31) [common]
6641 00:44:57.880633 Setting prompt string to ['/ #']
6642 00:44:57.880914 Forcing a shell prompt, looking for ['/ #']
6644 00:44:57.931812 / #
6645 00:44:57.932457 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6646 00:44:57.932894 Waiting using forced prompt support (timeout 00:02:30)
6647 00:44:57.938228
6648 00:44:57.939060 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6649 00:44:57.939541 start: 2.2.7 export-device-env (timeout 00:03:31) [common]
6650 00:44:57.939966 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6651 00:44:57.940360 end: 2.2 depthcharge-retry (duration 00:01:29) [common]
6652 00:44:57.940760 end: 2 depthcharge-action (duration 00:01:29) [common]
6653 00:44:57.941162 start: 3 lava-test-retry (timeout 00:05:00) [common]
6654 00:44:57.941567 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6655 00:44:57.941889 Using namespace: common
6657 00:44:58.043094 / # #
6658 00:44:58.043838 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6659 00:44:58.049019 #
6660 00:44:58.049670 Using /lava-14368374
6662 00:44:58.150781 / # export SHELL=/bin/sh
6663 00:44:58.157262 export SHELL=/bin/sh
6665 00:44:58.258660 / # . /lava-14368374/environment
6666 00:44:58.264739 . /lava-14368374/environment
6668 00:44:58.366192 / # /lava-14368374/bin/lava-test-runner /lava-14368374/0
6669 00:44:58.366814 Test shell timeout: 10s (minimum of the action and connection timeout)
6670 00:44:58.372574 /lava-14368374/bin/lava-test-runner /lava-14368374/0
6671 00:44:58.394391 + export TESTRUN_ID=0_cros-ec
6672 00:44:58.400621 + c<8>[ 14.251625] <LAVA_SIGNAL_STARTRUN 0_cros-ec 14368374_1.5.2.3.1>
6673 00:44:58.401380 Received signal: <STARTRUN> 0_cros-ec 14368374_1.5.2.3.1
6674 00:44:58.401731 Starting test lava.0_cros-ec (14368374_1.5.2.3.1)
6675 00:44:58.402160 Skipping test definition patterns.
6676 00:44:58.403578 d /lava-14368374/0/tests/0_cros-ec
6677 00:44:58.407023 + cat uuid
6678 00:44:58.407411 + UUID=14368374_1.5.2.3.1
6679 00:44:58.407719 + set +x
6680 00:44:58.413326 + python3 -m cros.runners.lava_runner -v
6681 00:44:59.016566 test_cros_ec_accel_iio_abi (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_abi)
6682 00:44:59.022911 Checks the cros-ec accelerometer IIO ABI. ... skipped 'No cros-ec-accel found'
6683 00:44:59.023304
6684 00:44:59.030204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip>
6685 00:44:59.030839 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip
6687 00:44:59.039857 test_cros_ec_accel_iio_data_is_valid (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_data_is_valid)
6688 00:44:59.049469 Validates accelerometer data by computing the magnitude. If the ... skipped 'No accelerometer found'
6689 00:44:59.049946
6690 00:44:59.056235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip>
6691 00:44:59.056924 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip
6693 00:44:59.066317 test_cros_ec_gyro_iio_abi (cros.tests.cros_ec_gyro.TestCrosECGyro.test_cros_ec_gyro_iio_abi)
6694 00:44:59.073308 Checks the cros-ec gyroscope IIO ABI. ... skipped 'No cros-ec-gyro found'
6695 00:44:59.073790
6696 00:44:59.079432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip>
6697 00:44:59.080162 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip
6699 00:44:59.086302 test_cros_ec_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_abi)
6700 00:44:59.092376 Checks the standard ABI for the main Embedded Controller. ... ok
6701 00:44:59.092841
6702 00:44:59.095971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_abi RESULT=pass>
6703 00:44:59.096613 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_abi RESULT=pass
6705 00:44:59.105626 test_cros_ec_chardev (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_chardev)
6706 00:44:59.109340 Checks the main Embedded controller character device. ... ok
6707 00:44:59.109719
6708 00:44:59.115625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_chardev RESULT=pass>
6709 00:44:59.116247 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_chardev RESULT=pass
6711 00:44:59.122104 test_cros_ec_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_hello)
6712 00:44:59.128605 Checks basic comunication with the main Embedded controller. ... ok
6713 00:44:59.128998
6714 00:44:59.135242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_hello RESULT=pass>
6715 00:44:59.135879 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_hello RESULT=pass
6717 00:44:59.142552 test_cros_fp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_abi)
6718 00:44:59.148584 Checks the standard ABI for the Fingerprint EC. ... skipped 'MCU cros_fp not supported'
6719 00:44:59.148975
6720 00:44:59.154991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_abi RESULT=skip>
6721 00:44:59.155635 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_abi RESULT=skip
6723 00:44:59.161554 test_cros_fp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_hello)
6724 00:44:59.168418 Checks basic comunication with the fingerprint controller. ... skipped 'MCU cros_fp not found'
6725 00:44:59.168811
6726 00:44:59.175345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_hello RESULT=skip>
6727 00:44:59.175968 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_hello RESULT=skip
6729 00:44:59.181631 test_cros_fp_reboot (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_reboot)
6730 00:44:59.188381 Test reboot command on Fingerprint MCU. ... skipped 'MCU cros_fp not found'
6731 00:44:59.188771
6732 00:44:59.194655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_reboot RESULT=skip>
6733 00:44:59.195278 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_reboot RESULT=skip
6735 00:44:59.201341 test_cros_pd_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_abi)
6736 00:44:59.211825 Checks the standard ABI for the Power Delivery EC. ... skipped 'MCU cros_pd not supported'
6737 00:44:59.212213
6738 00:44:59.214444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_abi RESULT=skip>
6739 00:44:59.215089 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_abi RESULT=skip
6741 00:44:59.221141 test_cros_pd_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_hello)
6742 00:44:59.231427 Checks basic comunication with the power delivery controller. ... skipped 'MCU cros_pd not found'
6743 00:44:59.231928
6744 00:44:59.237835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_hello RESULT=skip>
6745 00:44:59.238541 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_hello RESULT=skip
6747 00:44:59.244653 test_cros_tp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_abi)
6748 00:44:59.250964 Checks the standard ABI for the Touchpad EC. ... skipped 'MCU cros_tp not supported'
6749 00:44:59.251354
6750 00:44:59.257977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_abi RESULT=skip>
6751 00:44:59.258732 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_abi RESULT=skip
6753 00:44:59.264684 test_cros_tp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_hello)
6754 00:44:59.274230 Checks basic comunication with the touchpad controller. ... skipped 'MCU cros_tp not found'
6755 00:44:59.274691
6756 00:44:59.277617 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_hello RESULT=skip
6758 00:44:59.281157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_hello RESULT=skip>
6759 00:44:59.288172 test_cros_ec_pwm_backlight (cros.tests.cros_ec_pwm.TestCrosECPWM.test_cros_ec_pwm_backlight)
6760 00:44:59.297547 Check that the backlight is connected to a pwm of the EC and that ... skipped 'No backlight pwm found'
6761 00:44:59.298142
6762 00:44:59.304393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip>
6763 00:44:59.305038 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip
6765 00:44:59.310840 test_cros_ec_battery_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_battery_abi)
6766 00:44:59.317670 Check the cros battery ABI. ... skipped 'No BAT found'
6767 00:44:59.318171
6768 00:44:59.324278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip>
6769 00:44:59.324992 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip
6771 00:44:59.334070 test_cros_ec_usbpd_charger_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_usbpd_charger_abi)
6772 00:44:59.340970 Check the cros USBPD charger ABI. ... skipped 'No CROS_USBPD_CHARGER found'
6773 00:44:59.341360
6774 00:44:59.347219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip>
6775 00:44:59.347925 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip
6777 00:44:59.353544 test_cros_ec_rtc_abi (cros.tests.cros_ec_rtc.TestCrosECRTC.test_cros_ec_rtc_abi)
6778 00:44:59.360669 Check the cros RTC ABI. ... skipped 'EC_FEATURE_RTC not supported, skipping'
6779 00:44:59.361147
6780 00:44:59.367132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip>
6781 00:44:59.367837 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip
6783 00:44:59.377186 test_cros_ec_extcon_usbc_abi (cros.tests.cros_ec_extcon.TestCrosECextcon.test_cros_ec_extcon_usbc_abi)
6784 00:44:59.384358 Checks the cros-ec extcon ABI. ... skipped 'No extcon device found'
6785 00:44:59.384835
6786 00:44:59.390779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip>
6787 00:44:59.391262
6788 00:44:59.391809 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip
6790 00:44:59.400491 ------------------------------------------<8>[ 15.251061] <LAVA_SIGNAL_ENDRUN 0_cros-ec 14368374_1.5.2.3.1>
6791 00:44:59.401119 Received signal: <ENDRUN> 0_cros-ec 14368374_1.5.2.3.1
6792 00:44:59.401492 Ending use of test pattern.
6793 00:44:59.401780 Ending test lava.0_cros-ec (14368374_1.5.2.3.1), duration 1.00
6795 00:44:59.403531 ----------------------------
6796 00:44:59.403919 Ran 18 tests in 0.335s
6797 00:44:59.404218
6798 00:44:59.407431 OK (skipped=15)
6799 00:44:59.407903 + set +x
6800 00:44:59.410438 <LAVA_TEST_RUNNER EXIT>
6801 00:44:59.411233 ok: lava_test_shell seems to have completed
6802 00:44:59.412127 test_cros_ec_abi: pass
test_cros_ec_accel_iio_abi: skip
test_cros_ec_accel_iio_data_is_valid: skip
test_cros_ec_battery_abi: skip
test_cros_ec_chardev: pass
test_cros_ec_extcon_usbc_abi: skip
test_cros_ec_gyro_iio_abi: skip
test_cros_ec_hello: pass
test_cros_ec_pwm_backlight: skip
test_cros_ec_rtc_abi: skip
test_cros_ec_usbpd_charger_abi: skip
test_cros_fp_abi: skip
test_cros_fp_hello: skip
test_cros_fp_reboot: skip
test_cros_pd_abi: skip
test_cros_pd_hello: skip
test_cros_tp_abi: skip
test_cros_tp_hello: skip
6803 00:44:59.412567 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6804 00:44:59.412964 end: 3 lava-test-retry (duration 00:00:01) [common]
6805 00:44:59.413370 start: 4 finalize (timeout 00:08:06) [common]
6806 00:44:59.413773 start: 4.1 power-off (timeout 00:00:30) [common]
6807 00:44:59.414496 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1', '--port=1', '--command=off']
6808 00:45:00.292007 >> Command sent successfully.
6809 00:45:00.305938 Returned 0 in 0 seconds
6810 00:45:00.407246 end: 4.1 power-off (duration 00:00:01) [common]
6812 00:45:00.408673 start: 4.2 read-feedback (timeout 00:08:05) [common]
6813 00:45:00.409896 Listened to connection for namespace 'common' for up to 1s
6814 00:45:01.410307 Finalising connection for namespace 'common'
6815 00:45:01.410944 Disconnecting from shell: Finalise
6816 00:45:01.411330 / #
6817 00:45:01.512250 end: 4.2 read-feedback (duration 00:00:01) [common]
6818 00:45:01.512923 end: 4 finalize (duration 00:00:02) [common]
6819 00:45:01.513530 Cleaning after the job
6820 00:45:01.514072 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/ramdisk
6821 00:45:01.538723 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/kernel
6822 00:45:01.568918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/dtb
6823 00:45:01.569167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368374/tftp-deploy-m8jkna6k/modules
6824 00:45:01.576232 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368374
6825 00:45:01.661434 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368374
6826 00:45:01.661601 Job finished correctly