Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 34
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 09:26:41.419260 lava-dispatcher, installed at version: 2024.03
2 09:26:41.419501 start: 0 validate
3 09:26:41.419628 Start time: 2024-06-18 09:26:41.419623+00:00 (UTC)
4 09:26:41.419769 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:26:41.419910 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 09:26:41.684926 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:26:41.685094 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 09:26:41.942661 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:26:41.942939 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 09:26:42.203168 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:26:42.203315 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:26:42.715031 validate duration: 1.30
14 09:26:42.715318 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:26:42.715427 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:26:42.715525 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:26:42.715684 Not decompressing ramdisk as can be used compressed.
18 09:26:42.715782 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 09:26:42.715857 saving as /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/ramdisk/rootfs.cpio.gz
20 09:26:42.715928 total size: 8181887 (7 MB)
21 09:26:42.716941 progress 0 % (0 MB)
22 09:26:42.719347 progress 5 % (0 MB)
23 09:26:42.721502 progress 10 % (0 MB)
24 09:26:42.723857 progress 15 % (1 MB)
25 09:26:42.726081 progress 20 % (1 MB)
26 09:26:42.728398 progress 25 % (1 MB)
27 09:26:42.730576 progress 30 % (2 MB)
28 09:26:42.732826 progress 35 % (2 MB)
29 09:26:42.734982 progress 40 % (3 MB)
30 09:26:42.737199 progress 45 % (3 MB)
31 09:26:42.739269 progress 50 % (3 MB)
32 09:26:42.741448 progress 55 % (4 MB)
33 09:26:42.743466 progress 60 % (4 MB)
34 09:26:42.745675 progress 65 % (5 MB)
35 09:26:42.747685 progress 70 % (5 MB)
36 09:26:42.749858 progress 75 % (5 MB)
37 09:26:42.751878 progress 80 % (6 MB)
38 09:26:42.754046 progress 85 % (6 MB)
39 09:26:42.756118 progress 90 % (7 MB)
40 09:26:42.758308 progress 95 % (7 MB)
41 09:26:42.761002 progress 100 % (7 MB)
42 09:26:42.761319 7 MB downloaded in 0.05 s (171.94 MB/s)
43 09:26:42.761538 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:26:42.762084 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:26:42.762201 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:26:42.762311 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:26:42.762496 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 09:26:42.762587 saving as /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/kernel/Image
50 09:26:42.762669 total size: 54813184 (52 MB)
51 09:26:42.762754 No compression specified
52 09:26:42.764072 progress 0 % (0 MB)
53 09:26:42.785714 progress 5 % (2 MB)
54 09:26:42.807642 progress 10 % (5 MB)
55 09:26:42.829237 progress 15 % (7 MB)
56 09:26:42.848925 progress 20 % (10 MB)
57 09:26:42.864636 progress 25 % (13 MB)
58 09:26:42.882000 progress 30 % (15 MB)
59 09:26:42.900633 progress 35 % (18 MB)
60 09:26:42.915647 progress 40 % (20 MB)
61 09:26:42.930498 progress 45 % (23 MB)
62 09:26:42.945222 progress 50 % (26 MB)
63 09:26:42.960159 progress 55 % (28 MB)
64 09:26:42.974269 progress 60 % (31 MB)
65 09:26:42.988545 progress 65 % (34 MB)
66 09:26:43.003134 progress 70 % (36 MB)
67 09:26:43.018840 progress 75 % (39 MB)
68 09:26:43.036013 progress 80 % (41 MB)
69 09:26:43.051218 progress 85 % (44 MB)
70 09:26:43.066002 progress 90 % (47 MB)
71 09:26:43.080777 progress 95 % (49 MB)
72 09:26:43.094733 progress 100 % (52 MB)
73 09:26:43.095026 52 MB downloaded in 0.33 s (157.28 MB/s)
74 09:26:43.095218 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:26:43.095556 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:26:43.095666 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:26:43.095770 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:26:43.095934 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 09:26:43.096025 saving as /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 09:26:43.096106 total size: 57695 (0 MB)
82 09:26:43.096187 No compression specified
83 09:26:43.097662 progress 56 % (0 MB)
84 09:26:43.097929 progress 100 % (0 MB)
85 09:26:43.098131 0 MB downloaded in 0.00 s (27.22 MB/s)
86 09:26:43.098250 end: 1.3.1 http-download (duration 00:00:00) [common]
88 09:26:43.098467 end: 1.3 download-retry (duration 00:00:00) [common]
89 09:26:43.098545 start: 1.4 download-retry (timeout 00:10:00) [common]
90 09:26:43.098622 start: 1.4.1 http-download (timeout 00:10:00) [common]
91 09:26:43.098735 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 09:26:43.098797 saving as /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/modules/modules.tar
93 09:26:43.098851 total size: 8619356 (8 MB)
94 09:26:43.098907 Using unxz to decompress xz
95 09:26:43.100273 progress 0 % (0 MB)
96 09:26:43.120785 progress 5 % (0 MB)
97 09:26:43.147034 progress 10 % (0 MB)
98 09:26:43.174182 progress 15 % (1 MB)
99 09:26:43.199869 progress 20 % (1 MB)
100 09:26:43.226032 progress 25 % (2 MB)
101 09:26:43.251029 progress 30 % (2 MB)
102 09:26:43.277770 progress 35 % (2 MB)
103 09:26:43.303905 progress 40 % (3 MB)
104 09:26:43.330672 progress 45 % (3 MB)
105 09:26:43.355314 progress 50 % (4 MB)
106 09:26:43.380596 progress 55 % (4 MB)
107 09:26:43.405810 progress 60 % (4 MB)
108 09:26:43.430555 progress 65 % (5 MB)
109 09:26:43.460499 progress 70 % (5 MB)
110 09:26:43.486980 progress 75 % (6 MB)
111 09:26:43.511175 progress 80 % (6 MB)
112 09:26:43.535252 progress 85 % (7 MB)
113 09:26:43.559296 progress 90 % (7 MB)
114 09:26:43.587029 progress 95 % (7 MB)
115 09:26:43.615996 progress 100 % (8 MB)
116 09:26:43.620594 8 MB downloaded in 0.52 s (15.76 MB/s)
117 09:26:43.620790 end: 1.4.1 http-download (duration 00:00:01) [common]
119 09:26:43.621021 end: 1.4 download-retry (duration 00:00:01) [common]
120 09:26:43.621119 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 09:26:43.621253 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 09:26:43.621356 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 09:26:43.621467 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 09:26:43.621714 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d
125 09:26:43.621849 makedir: /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin
126 09:26:43.621955 makedir: /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/tests
127 09:26:43.622046 makedir: /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/results
128 09:26:43.622136 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-add-keys
129 09:26:43.622277 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-add-sources
130 09:26:43.622414 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-background-process-start
131 09:26:43.622536 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-background-process-stop
132 09:26:43.622673 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-common-functions
133 09:26:43.622795 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-echo-ipv4
134 09:26:43.622921 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-install-packages
135 09:26:43.623037 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-installed-packages
136 09:26:43.623161 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-os-build
137 09:26:43.623276 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-probe-channel
138 09:26:43.623399 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-probe-ip
139 09:26:43.623515 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-target-ip
140 09:26:43.623637 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-target-mac
141 09:26:43.623751 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-target-storage
142 09:26:43.623876 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-case
143 09:26:43.623992 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-event
144 09:26:43.624119 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-feedback
145 09:26:43.624235 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-raise
146 09:26:43.624371 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-reference
147 09:26:43.624498 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-runner
148 09:26:43.624624 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-set
149 09:26:43.624739 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-test-shell
150 09:26:43.624862 Updating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-install-packages (oe)
151 09:26:43.625005 Updating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/bin/lava-installed-packages (oe)
152 09:26:43.625132 Creating /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/environment
153 09:26:43.625220 LAVA metadata
154 09:26:43.625300 - LAVA_JOB_ID=14407627
155 09:26:43.625359 - LAVA_DISPATCHER_IP=192.168.201.1
156 09:26:43.625457 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 09:26:43.625531 skipped lava-vland-overlay
158 09:26:43.625619 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 09:26:43.625694 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 09:26:43.625749 skipped lava-multinode-overlay
161 09:26:43.625825 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 09:26:43.625896 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 09:26:43.625961 Loading test definitions
164 09:26:43.626047 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 09:26:43.626109 Using /lava-14407627 at stage 0
166 09:26:43.626434 uuid=14407627_1.5.2.3.1 testdef=None
167 09:26:43.626526 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 09:26:43.626605 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 09:26:43.627085 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 09:26:43.627298 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 09:26:43.627921 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 09:26:43.628147 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 09:26:43.628747 runner path: /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/0/tests/0_dmesg test_uuid 14407627_1.5.2.3.1
176 09:26:43.628904 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 09:26:43.629099 Creating lava-test-runner.conf files
179 09:26:43.629166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407627/lava-overlay-56vot75d/lava-14407627/0 for stage 0
180 09:26:43.629250 - 0_dmesg
181 09:26:43.629342 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 09:26:43.629429 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 09:26:43.636017 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 09:26:43.636151 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 09:26:43.636275 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 09:26:43.636378 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 09:26:43.636460 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 09:26:43.886850 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 09:26:43.887013 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 09:26:43.887116 extracting modules file /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407627/extract-overlay-ramdisk-swfid3ch/ramdisk
191 09:26:44.169771 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 09:26:44.169927 start: 1.5.5 apply-overlay-tftp (timeout 00:09:59) [common]
193 09:26:44.170008 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407627/compress-overlay-roxpyik6/overlay-1.5.2.4.tar.gz to ramdisk
194 09:26:44.170071 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407627/compress-overlay-roxpyik6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407627/extract-overlay-ramdisk-swfid3ch/ramdisk
195 09:26:44.176772 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 09:26:44.176904 start: 1.5.6 configure-preseed-file (timeout 00:09:59) [common]
197 09:26:44.176993 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 09:26:44.177073 start: 1.5.7 compress-ramdisk (timeout 00:09:59) [common]
199 09:26:44.177144 Building ramdisk /var/lib/lava/dispatcher/tmp/14407627/extract-overlay-ramdisk-swfid3ch/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407627/extract-overlay-ramdisk-swfid3ch/ramdisk
200 09:26:44.526864 >> 145247 blocks
201 09:26:47.086153 rename /var/lib/lava/dispatcher/tmp/14407627/extract-overlay-ramdisk-swfid3ch/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/ramdisk/ramdisk.cpio.gz
202 09:26:47.086311 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 09:26:47.086400 start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
204 09:26:47.086481 start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
205 09:26:47.086561 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/kernel/Image']
206 09:27:02.589133 Returned 0 in 15 seconds
207 09:27:02.689671 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/kernel/image.itb
208 09:27:03.186283 output: FIT description: Kernel Image image with one or more FDT blobs
209 09:27:03.186403 output: Created: Tue Jun 18 10:27:03 2024
210 09:27:03.186465 output: Image 0 (kernel-1)
211 09:27:03.186520 output: Description:
212 09:27:03.186574 output: Created: Tue Jun 18 10:27:03 2024
213 09:27:03.186629 output: Type: Kernel Image
214 09:27:03.186681 output: Compression: lzma compressed
215 09:27:03.186741 output: Data Size: 13126726 Bytes = 12819.07 KiB = 12.52 MiB
216 09:27:03.186793 output: Architecture: AArch64
217 09:27:03.186849 output: OS: Linux
218 09:27:03.186904 output: Load Address: 0x00000000
219 09:27:03.186956 output: Entry Point: 0x00000000
220 09:27:03.187009 output: Hash algo: crc32
221 09:27:03.187060 output: Hash value: 4137a6e7
222 09:27:03.187113 output: Image 1 (fdt-1)
223 09:27:03.187164 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 09:27:03.187218 output: Created: Tue Jun 18 10:27:03 2024
225 09:27:03.187270 output: Type: Flat Device Tree
226 09:27:03.187321 output: Compression: uncompressed
227 09:27:03.187373 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 09:27:03.187424 output: Architecture: AArch64
229 09:27:03.187475 output: Hash algo: crc32
230 09:27:03.187521 output: Hash value: a9713552
231 09:27:03.187567 output: Image 2 (ramdisk-1)
232 09:27:03.187613 output: Description: unavailable
233 09:27:03.187659 output: Created: Tue Jun 18 10:27:03 2024
234 09:27:03.187721 output: Type: RAMDisk Image
235 09:27:03.187781 output: Compression: uncompressed
236 09:27:03.187827 output: Data Size: 21373753 Bytes = 20872.81 KiB = 20.38 MiB
237 09:27:03.187873 output: Architecture: AArch64
238 09:27:03.187919 output: OS: Linux
239 09:27:03.187964 output: Load Address: unavailable
240 09:27:03.188032 output: Entry Point: unavailable
241 09:27:03.188093 output: Hash algo: crc32
242 09:27:03.188140 output: Hash value: a34e550d
243 09:27:03.188187 output: Default Configuration: 'conf-1'
244 09:27:03.188233 output: Configuration 0 (conf-1)
245 09:27:03.188279 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 09:27:03.188326 output: Kernel: kernel-1
247 09:27:03.188401 output: Init Ramdisk: ramdisk-1
248 09:27:03.188451 output: FDT: fdt-1
249 09:27:03.188526 output: Loadables: kernel-1
250 09:27:03.188605 output:
251 09:27:03.188785 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 09:27:03.188901 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 09:27:03.189023 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 09:27:03.189131 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
255 09:27:03.189225 No LXC device requested
256 09:27:03.189326 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 09:27:03.189429 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
258 09:27:03.189526 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 09:27:03.189651 Checking files for TFTP limit of 4294967296 bytes.
260 09:27:03.190143 end: 1 tftp-deploy (duration 00:00:20) [common]
261 09:27:03.190239 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 09:27:03.190325 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 09:27:03.190432 substitutions:
264 09:27:03.190492 - {DTB}: 14407627/tftp-deploy-4yhed2s6/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 09:27:03.190550 - {INITRD}: 14407627/tftp-deploy-4yhed2s6/ramdisk/ramdisk.cpio.gz
266 09:27:03.190601 - {KERNEL}: 14407627/tftp-deploy-4yhed2s6/kernel/Image
267 09:27:03.190651 - {LAVA_MAC}: None
268 09:27:03.190701 - {PRESEED_CONFIG}: None
269 09:27:03.190750 - {PRESEED_LOCAL}: None
270 09:27:03.190798 - {RAMDISK}: 14407627/tftp-deploy-4yhed2s6/ramdisk/ramdisk.cpio.gz
271 09:27:03.190854 - {ROOT_PART}: None
272 09:27:03.190903 - {ROOT}: None
273 09:27:03.190952 - {SERVER_IP}: 192.168.201.1
274 09:27:03.191000 - {TEE}: None
275 09:27:03.191048 Parsed boot commands:
276 09:27:03.191096 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 09:27:03.191247 Parsed boot commands: tftpboot 192.168.201.1 14407627/tftp-deploy-4yhed2s6/kernel/image.itb 14407627/tftp-deploy-4yhed2s6/kernel/cmdline
278 09:27:03.191329 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 09:27:03.191404 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 09:27:03.191482 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 09:27:03.191560 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 09:27:03.191619 Not connected, no need to disconnect.
283 09:27:03.191715 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 09:27:03.191796 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 09:27:03.191884 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
286 09:27:03.195426 Setting prompt string to ['lava-test: # ']
287 09:27:03.195813 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 09:27:03.195908 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 09:27:03.196043 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 09:27:03.196145 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 09:27:03.196341 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
292 09:27:12.279086 >> Command sent successfully.
293 09:27:12.282783 Returned 0 in 9 seconds
294 09:27:12.383174 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 09:27:12.383437 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 09:27:12.383533 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 09:27:12.383620 Setting prompt string to 'Starting depthcharge on Juniper...'
299 09:27:12.383680 Changing prompt to 'Starting depthcharge on Juniper...'
300 09:27:12.383742 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 09:27:12.384086 [Enter `^Ec?' for help]
302 09:27:14.081703 [DL] 00000000 00000000 010701
303 09:27:14.086564
304 09:27:14.086694
305 09:27:14.086786 F0: 102B 0000
306 09:27:14.086873
307 09:27:14.086961 F3: 1006 0033 [0200]
308 09:27:14.090090
309 09:27:14.090193 F3: 4001 00E0 [0200]
310 09:27:14.090281
311 09:27:14.090368 F3: 0000 0000
312 09:27:14.093051
313 09:27:14.093145 V0: 0000 0000 [0001]
314 09:27:14.093232
315 09:27:14.093312 00: 1027 0002
316 09:27:14.093393
317 09:27:14.096564 01: 0000 0000
318 09:27:14.096646
319 09:27:14.096706 BP: 0C00 0251 [0000]
320 09:27:14.096761
321 09:27:14.100095 G0: 1182 0000
322 09:27:14.100180
323 09:27:14.100240 EC: 0004 0000 [0001]
324 09:27:14.100295
325 09:27:14.102938 S7: 0000 0000 [0000]
326 09:27:14.103033
327 09:27:14.106508 CC: 0000 0000 [0001]
328 09:27:14.106621
329 09:27:14.106718 T0: 0000 00DB [000F]
330 09:27:14.106811
331 09:27:14.106895 Jump to BL
332 09:27:14.106982
333 09:27:14.142646
334 09:27:14.142760
335 09:27:14.152289 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 09:27:14.152424 ARM64: Exception handlers installed.
337 09:27:14.155696 ARM64: Testing exception
338 09:27:14.159068 ARM64: Done test exception
339 09:27:14.162699 WDT: Last reset was cold boot
340 09:27:14.165555 SPI0(PAD0) initialized at 992727 Hz
341 09:27:14.169728 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 09:27:14.169821 Manufacturer: ef
343 09:27:14.176330 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 09:27:14.189483 Probing TPM: . done!
345 09:27:14.189605 TPM ready after 0 ms
346 09:27:14.195801 Connected to device vid:did:rid of 1ae0:0028:00
347 09:27:14.203057 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 09:27:14.236880 Initialized TPM device CR50 revision 0
349 09:27:14.248792 tlcl_send_startup: Startup return code is 0
350 09:27:14.248886 TPM: setup succeeded
351 09:27:14.257035 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 09:27:14.260704 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 09:27:14.263608 in-header: 03 19 00 00 08 00 00 00
354 09:27:14.266829 in-data: a2 e0 47 00 13 00 00 00
355 09:27:14.270446 Chrome EC: UHEPI supported
356 09:27:14.277015 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 09:27:14.279973 in-header: 03 a1 00 00 08 00 00 00
358 09:27:14.283254 in-data: 84 60 60 10 00 00 00 00
359 09:27:14.283353 Phase 1
360 09:27:14.286509 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 09:27:14.293071 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 09:27:14.299784 VB2:vb2_check_recovery() Recovery was requested manually
363 09:27:14.303155 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 09:27:14.309764 Recovery requested (1009000e)
365 09:27:14.315564 tlcl_extend: response is 0
366 09:27:14.324089 tlcl_extend: response is 0
367 09:27:14.348757
368 09:27:14.348877
369 09:27:14.358851 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 09:27:14.362463 ARM64: Exception handlers installed.
371 09:27:14.362552 ARM64: Testing exception
372 09:27:14.365111 ARM64: Done test exception
373 09:27:14.380828 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2000
374 09:27:14.386774 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 09:27:14.390576 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 09:27:14.398980 [RTC]rtc_get_frequency_meter,134: input=0xf, output=822
377 09:27:14.405515 [RTC]rtc_get_frequency_meter,134: input=0x7, output=698
378 09:27:14.412816 [RTC]rtc_get_frequency_meter,134: input=0xb, output=760
379 09:27:14.419617 [RTC]rtc_get_frequency_meter,134: input=0xd, output=792
380 09:27:14.426270 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
381 09:27:14.429749 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 09:27:14.433169 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 09:27:14.439419 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 09:27:14.442931 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 09:27:14.446348 in-header: 03 19 00 00 08 00 00 00
386 09:27:14.446512 in-data: a2 e0 47 00 13 00 00 00
387 09:27:14.449170 Chrome EC: UHEPI supported
388 09:27:14.455992 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 09:27:14.459526 in-header: 03 a1 00 00 08 00 00 00
390 09:27:14.463293 in-data: 84 60 60 10 00 00 00 00
391 09:27:14.466007 Skip loading cached calibration data
392 09:27:14.472435 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 09:27:14.475852 in-header: 03 a1 00 00 08 00 00 00
394 09:27:14.479348 in-data: 84 60 60 10 00 00 00 00
395 09:27:14.485760 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 09:27:14.489295 in-header: 03 a1 00 00 08 00 00 00
397 09:27:14.492754 in-data: 84 60 60 10 00 00 00 00
398 09:27:14.495498 ADC[3]: Raw value=214183 ID=1
399 09:27:14.495850 Manufacturer: ef
400 09:27:14.502286 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 09:27:14.505648 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 09:27:14.509029 CBFS @ 21000 size 3d4000
403 09:27:14.515476 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 09:27:14.518782 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 09:27:14.522151 CBFS: Found @ offset 3c700 size 44
406 09:27:14.525396 DRAM-K: Full Calibration
407 09:27:14.529146 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 09:27:14.532036 CBFS @ 21000 size 3d4000
409 09:27:14.535264 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 09:27:14.538474 CBFS: Locating 'fallback/dram'
411 09:27:14.541857 CBFS: Found @ offset 24b00 size 12268
412 09:27:14.571136 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
413 09:27:14.574001 ddr_geometry: 1, config: 0x0
414 09:27:14.577437 header.status = 0x0
415 09:27:14.580922 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 09:27:14.584543 header.version = 0x5 (expected: 0x5)
417 09:27:14.587429 header.size = 0x8f0 (expected: 0x8f0)
418 09:27:14.587793 header.config = 0x0
419 09:27:14.591015 header.flags = 0x0
420 09:27:14.594390 header.checksum = 0x0
421 09:27:14.600492 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 09:27:14.604188 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 09:27:14.610443 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 09:27:14.610802 ddr_geometry:1
425 09:27:14.613912 [EMI] new MDL number = 1
426 09:27:14.614286 dram_cbt_mode_extern: 0
427 09:27:14.617416 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 09:27:14.623591 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 09:27:14.624098
430 09:27:14.624458
431 09:27:14.627204 [Bianco] ETT version 0.0.0.1
432 09:27:14.630432 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 09:27:14.630810
434 09:27:14.633342 vSetVcoreByFreq with vcore:762500, freq=1600
435 09:27:14.633763
436 09:27:14.636703 [DramcInit]
437 09:27:14.640225 AutoRefreshCKEOff AutoREF OFF
438 09:27:14.640597 DDRPhyPLLSetting-CKEOFF
439 09:27:14.643720 DDRPhyPLLSetting-CKEON
440 09:27:14.644098
441 09:27:14.644490 Enable WDQS
442 09:27:14.648338 [ModeRegInit_LP4] CH0 RK0
443 09:27:14.651494 Write Rank0 MR13 =0x18
444 09:27:14.652101 Write Rank0 MR12 =0x5d
445 09:27:14.654615 Write Rank0 MR1 =0x56
446 09:27:14.658245 Write Rank0 MR2 =0x1a
447 09:27:14.658618 Write Rank0 MR11 =0x0
448 09:27:14.661414 Write Rank0 MR22 =0x38
449 09:27:14.664531 Write Rank0 MR14 =0x5d
450 09:27:14.664940 Write Rank0 MR3 =0x30
451 09:27:14.667869 Write Rank0 MR13 =0x58
452 09:27:14.668285 Write Rank0 MR12 =0x5d
453 09:27:14.671192 Write Rank0 MR1 =0x56
454 09:27:14.674426 Write Rank0 MR2 =0x2d
455 09:27:14.674919 Write Rank0 MR11 =0x23
456 09:27:14.678117 Write Rank0 MR22 =0x34
457 09:27:14.678475 Write Rank0 MR14 =0x10
458 09:27:14.680925 Write Rank0 MR3 =0x30
459 09:27:14.684356 Write Rank0 MR13 =0xd8
460 09:27:14.684765 [ModeRegInit_LP4] CH0 RK1
461 09:27:14.687807 Write Rank1 MR13 =0x18
462 09:27:14.690710 Write Rank1 MR12 =0x5d
463 09:27:14.691117 Write Rank1 MR1 =0x56
464 09:27:14.694470 Write Rank1 MR2 =0x1a
465 09:27:14.694827 Write Rank1 MR11 =0x0
466 09:27:14.697900 Write Rank1 MR22 =0x38
467 09:27:14.700733 Write Rank1 MR14 =0x5d
468 09:27:14.701086 Write Rank1 MR3 =0x30
469 09:27:14.704363 Write Rank1 MR13 =0x58
470 09:27:14.707465 Write Rank1 MR12 =0x5d
471 09:27:14.707820 Write Rank1 MR1 =0x56
472 09:27:14.710982 Write Rank1 MR2 =0x2d
473 09:27:14.711335 Write Rank1 MR11 =0x23
474 09:27:14.714534 Write Rank1 MR22 =0x34
475 09:27:14.717398 Write Rank1 MR14 =0x10
476 09:27:14.717804 Write Rank1 MR3 =0x30
477 09:27:14.720881 Write Rank1 MR13 =0xd8
478 09:27:14.724370 [ModeRegInit_LP4] CH1 RK0
479 09:27:14.724843 Write Rank0 MR13 =0x18
480 09:27:14.727638 Write Rank0 MR12 =0x5d
481 09:27:14.727990 Write Rank0 MR1 =0x56
482 09:27:14.730558 Write Rank0 MR2 =0x1a
483 09:27:14.734026 Write Rank0 MR11 =0x0
484 09:27:14.734379 Write Rank0 MR22 =0x38
485 09:27:14.737068 Write Rank0 MR14 =0x5d
486 09:27:14.737417 Write Rank0 MR3 =0x30
487 09:27:14.740603 Write Rank0 MR13 =0x58
488 09:27:14.744141 Write Rank0 MR12 =0x5d
489 09:27:14.744627 Write Rank0 MR1 =0x56
490 09:27:14.747094 Write Rank0 MR2 =0x2d
491 09:27:14.750813 Write Rank0 MR11 =0x23
492 09:27:14.751285 Write Rank0 MR22 =0x34
493 09:27:14.753621 Write Rank0 MR14 =0x10
494 09:27:14.753977 Write Rank0 MR3 =0x30
495 09:27:14.757104 Write Rank0 MR13 =0xd8
496 09:27:14.760275 [ModeRegInit_LP4] CH1 RK1
497 09:27:14.760627 Write Rank1 MR13 =0x18
498 09:27:14.763922 Write Rank1 MR12 =0x5d
499 09:27:14.767070 Write Rank1 MR1 =0x56
500 09:27:14.767428 Write Rank1 MR2 =0x1a
501 09:27:14.770424 Write Rank1 MR11 =0x0
502 09:27:14.770783 Write Rank1 MR22 =0x38
503 09:27:14.773637 Write Rank1 MR14 =0x5d
504 09:27:14.776879 Write Rank1 MR3 =0x30
505 09:27:14.777270 Write Rank1 MR13 =0x58
506 09:27:14.780233 Write Rank1 MR12 =0x5d
507 09:27:14.783368 Write Rank1 MR1 =0x56
508 09:27:14.783815 Write Rank1 MR2 =0x2d
509 09:27:14.786407 Write Rank1 MR11 =0x23
510 09:27:14.786836 Write Rank1 MR22 =0x34
511 09:27:14.789972 Write Rank1 MR14 =0x10
512 09:27:14.792993 Write Rank1 MR3 =0x30
513 09:27:14.793347 Write Rank1 MR13 =0xd8
514 09:27:14.796590 match AC timing 3
515 09:27:14.806622 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 09:27:14.807069 [MiockJmeterHQA]
517 09:27:14.809339 vSetVcoreByFreq with vcore:762500, freq=1600
518 09:27:14.916375
519 09:27:14.916487 MIOCK jitter meter ch=0
520 09:27:14.916548
521 09:27:14.919118 1T = (102-19) = 83 dly cells
522 09:27:14.925753 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
523 09:27:14.928902 vSetVcoreByFreq with vcore:725000, freq=1200
524 09:27:15.029534
525 09:27:15.029678 MIOCK jitter meter ch=0
526 09:27:15.029739
527 09:27:15.032918 1T = (97-18) = 79 dly cells
528 09:27:15.039643 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
529 09:27:15.042335 vSetVcoreByFreq with vcore:725000, freq=800
530 09:27:15.142750
531 09:27:15.142865 MIOCK jitter meter ch=0
532 09:27:15.142928
533 09:27:15.145965 1T = (97-18) = 79 dly cells
534 09:27:15.152478 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
535 09:27:15.155785 vSetVcoreByFreq with vcore:762500, freq=1600
536 09:27:15.159061 vSetVcoreByFreq with vcore:762500, freq=1600
537 09:27:15.159138
538 09:27:15.159197 K DRVP
539 09:27:15.162979 1. OCD DRVP=0 CALOUT=0
540 09:27:15.166027 1. OCD DRVP=1 CALOUT=0
541 09:27:15.166104 1. OCD DRVP=2 CALOUT=0
542 09:27:15.169032 1. OCD DRVP=3 CALOUT=0
543 09:27:15.172462 1. OCD DRVP=4 CALOUT=0
544 09:27:15.172540 1. OCD DRVP=5 CALOUT=0
545 09:27:15.176045 1. OCD DRVP=6 CALOUT=0
546 09:27:15.176122 1. OCD DRVP=7 CALOUT=0
547 09:27:15.178897 1. OCD DRVP=8 CALOUT=1
548 09:27:15.178973
549 09:27:15.182992 1. OCD DRVP calibration OK! DRVP=8
550 09:27:15.183069
551 09:27:15.183127
552 09:27:15.183180
553 09:27:15.183232 K ODTN
554 09:27:15.185851 3. OCD ODTN=0 ,CALOUT=1
555 09:27:15.189443 3. OCD ODTN=1 ,CALOUT=1
556 09:27:15.189523 3. OCD ODTN=2 ,CALOUT=1
557 09:27:15.192844 3. OCD ODTN=3 ,CALOUT=1
558 09:27:15.196053 3. OCD ODTN=4 ,CALOUT=1
559 09:27:15.196138 3. OCD ODTN=5 ,CALOUT=1
560 09:27:15.199315 3. OCD ODTN=6 ,CALOUT=1
561 09:27:15.202159 3. OCD ODTN=7 ,CALOUT=0
562 09:27:15.202235
563 09:27:15.205616 3. OCD ODTN calibration OK! ODTN=7
564 09:27:15.205693
565 09:27:15.209052 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
566 09:27:15.212511 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
567 09:27:15.215263 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
568 09:27:15.218651
569 09:27:15.218719 K DRVP
570 09:27:15.218775 1. OCD DRVP=0 CALOUT=0
571 09:27:15.222205 1. OCD DRVP=1 CALOUT=0
572 09:27:15.225653 1. OCD DRVP=2 CALOUT=0
573 09:27:15.225724 1. OCD DRVP=3 CALOUT=0
574 09:27:15.228514 1. OCD DRVP=4 CALOUT=0
575 09:27:15.232044 1. OCD DRVP=5 CALOUT=0
576 09:27:15.232113 1. OCD DRVP=6 CALOUT=0
577 09:27:15.235421 1. OCD DRVP=7 CALOUT=0
578 09:27:15.235487 1. OCD DRVP=8 CALOUT=0
579 09:27:15.238899 1. OCD DRVP=9 CALOUT=1
580 09:27:15.238976
581 09:27:15.241755 1. OCD DRVP calibration OK! DRVP=9
582 09:27:15.241848
583 09:27:15.241907
584 09:27:15.241969
585 09:27:15.242021 K ODTN
586 09:27:15.245123 3. OCD ODTN=0 ,CALOUT=1
587 09:27:15.248105 3. OCD ODTN=1 ,CALOUT=1
588 09:27:15.248178 3. OCD ODTN=2 ,CALOUT=1
589 09:27:15.251513 3. OCD ODTN=3 ,CALOUT=1
590 09:27:15.254805 3. OCD ODTN=4 ,CALOUT=1
591 09:27:15.254896 3. OCD ODTN=5 ,CALOUT=1
592 09:27:15.258015 3. OCD ODTN=6 ,CALOUT=1
593 09:27:15.261711 3. OCD ODTN=7 ,CALOUT=1
594 09:27:15.261781 3. OCD ODTN=8 ,CALOUT=1
595 09:27:15.264669 3. OCD ODTN=9 ,CALOUT=1
596 09:27:15.268073 3. OCD ODTN=10 ,CALOUT=1
597 09:27:15.268143 3. OCD ODTN=11 ,CALOUT=1
598 09:27:15.271490 3. OCD ODTN=12 ,CALOUT=1
599 09:27:15.275060 3. OCD ODTN=13 ,CALOUT=1
600 09:27:15.275129 3. OCD ODTN=14 ,CALOUT=0
601 09:27:15.275187
602 09:27:15.277752 3. OCD ODTN calibration OK! ODTN=14
603 09:27:15.277861
604 09:27:15.284257 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=14
605 09:27:15.287922 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14
606 09:27:15.291334 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14 (After Adjust)
607 09:27:15.291419
608 09:27:15.294347 [DramcInit]
609 09:27:15.297894 AutoRefreshCKEOff AutoREF OFF
610 09:27:15.297970 DDRPhyPLLSetting-CKEOFF
611 09:27:15.301354 DDRPhyPLLSetting-CKEON
612 09:27:15.301451
613 09:27:15.301536 Enable WDQS
614 09:27:15.301645 ==
615 09:27:15.307449 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
616 09:27:15.310911 fsp= 1, odt_onoff= 1, Byte mode= 0
617 09:27:15.310985 ==
618 09:27:15.314670 [Duty_Offset_Calibration]
619 09:27:15.314737
620 09:27:15.314794 ===========================
621 09:27:15.317247 B0:2 B1:2 CA:1
622 09:27:15.338107 ==
623 09:27:15.342037 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
624 09:27:15.345373 fsp= 1, odt_onoff= 1, Byte mode= 0
625 09:27:15.345463 ==
626 09:27:15.348256 [Duty_Offset_Calibration]
627 09:27:15.348333
628 09:27:15.351830 ===========================
629 09:27:15.351907 B0:0 B1:0 CA:-1
630 09:27:15.384300 [ModeRegInit_LP4] CH0 RK0
631 09:27:15.387482 Write Rank0 MR13 =0x18
632 09:27:15.387562 Write Rank0 MR12 =0x5d
633 09:27:15.390494 Write Rank0 MR1 =0x56
634 09:27:15.393911 Write Rank0 MR2 =0x1a
635 09:27:15.393982 Write Rank0 MR11 =0x0
636 09:27:15.397302 Write Rank0 MR22 =0x38
637 09:27:15.400852 Write Rank0 MR14 =0x5d
638 09:27:15.400929 Write Rank0 MR3 =0x30
639 09:27:15.403775 Write Rank0 MR13 =0x58
640 09:27:15.403865 Write Rank0 MR12 =0x5d
641 09:27:15.407452 Write Rank0 MR1 =0x56
642 09:27:15.410566 Write Rank0 MR2 =0x2d
643 09:27:15.410643 Write Rank0 MR11 =0x23
644 09:27:15.413694 Write Rank0 MR22 =0x34
645 09:27:15.413790 Write Rank0 MR14 =0x10
646 09:27:15.417126 Write Rank0 MR3 =0x30
647 09:27:15.419968 Write Rank0 MR13 =0xd8
648 09:27:15.420048 [ModeRegInit_LP4] CH0 RK1
649 09:27:15.423332 Write Rank1 MR13 =0x18
650 09:27:15.427021 Write Rank1 MR12 =0x5d
651 09:27:15.427096 Write Rank1 MR1 =0x56
652 09:27:15.430482 Write Rank1 MR2 =0x1a
653 09:27:15.430558 Write Rank1 MR11 =0x0
654 09:27:15.433250 Write Rank1 MR22 =0x38
655 09:27:15.436763 Write Rank1 MR14 =0x5d
656 09:27:15.436879 Write Rank1 MR3 =0x30
657 09:27:15.440131 Write Rank1 MR13 =0x58
658 09:27:15.443565 Write Rank1 MR12 =0x5d
659 09:27:15.443641 Write Rank1 MR1 =0x56
660 09:27:15.447068 Write Rank1 MR2 =0x2d
661 09:27:15.447143 Write Rank1 MR11 =0x23
662 09:27:15.450280 Write Rank1 MR22 =0x34
663 09:27:15.453083 Write Rank1 MR14 =0x10
664 09:27:15.453158 Write Rank1 MR3 =0x30
665 09:27:15.456832 Write Rank1 MR13 =0xd8
666 09:27:15.459747 [ModeRegInit_LP4] CH1 RK0
667 09:27:15.459823 Write Rank0 MR13 =0x18
668 09:27:15.463210 Write Rank0 MR12 =0x5d
669 09:27:15.463285 Write Rank0 MR1 =0x56
670 09:27:15.466719 Write Rank0 MR2 =0x1a
671 09:27:15.469464 Write Rank0 MR11 =0x0
672 09:27:15.469539 Write Rank0 MR22 =0x38
673 09:27:15.472895 Write Rank0 MR14 =0x5d
674 09:27:15.476412 Write Rank0 MR3 =0x30
675 09:27:15.476487 Write Rank0 MR13 =0x58
676 09:27:15.479821 Write Rank0 MR12 =0x5d
677 09:27:15.479896 Write Rank0 MR1 =0x56
678 09:27:15.482772 Write Rank0 MR2 =0x2d
679 09:27:15.486256 Write Rank0 MR11 =0x23
680 09:27:15.486332 Write Rank0 MR22 =0x34
681 09:27:15.489229 Write Rank0 MR14 =0x10
682 09:27:15.489304 Write Rank0 MR3 =0x30
683 09:27:15.492819 Write Rank0 MR13 =0xd8
684 09:27:15.496252 [ModeRegInit_LP4] CH1 RK1
685 09:27:15.496351 Write Rank1 MR13 =0x18
686 09:27:15.499892 Write Rank1 MR12 =0x5d
687 09:27:15.502373 Write Rank1 MR1 =0x56
688 09:27:15.502448 Write Rank1 MR2 =0x1a
689 09:27:15.505674 Write Rank1 MR11 =0x0
690 09:27:15.509275 Write Rank1 MR22 =0x38
691 09:27:15.509351 Write Rank1 MR14 =0x5d
692 09:27:15.512371 Write Rank1 MR3 =0x30
693 09:27:15.512447 Write Rank1 MR13 =0x58
694 09:27:15.515666 Write Rank1 MR12 =0x5d
695 09:27:15.518891 Write Rank1 MR1 =0x56
696 09:27:15.518967 Write Rank1 MR2 =0x2d
697 09:27:15.522243 Write Rank1 MR11 =0x23
698 09:27:15.522317 Write Rank1 MR22 =0x34
699 09:27:15.525732 Write Rank1 MR14 =0x10
700 09:27:15.528356 Write Rank1 MR3 =0x30
701 09:27:15.528454 Write Rank1 MR13 =0xd8
702 09:27:15.532045 match AC timing 3
703 09:27:15.542147 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
704 09:27:15.542224 DramC Write-DBI off
705 09:27:15.544876 DramC Read-DBI off
706 09:27:15.544950 Write Rank0 MR13 =0x59
707 09:27:15.548357 ==
708 09:27:15.551680 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
709 09:27:15.554821 fsp= 1, odt_onoff= 1, Byte mode= 0
710 09:27:15.554927 ==
711 09:27:15.558584 === u2Vref_new: 0x56 --> 0x2d
712 09:27:15.562210 === u2Vref_new: 0x58 --> 0x38
713 09:27:15.565013 === u2Vref_new: 0x5a --> 0x39
714 09:27:15.568788 === u2Vref_new: 0x5c --> 0x3c
715 09:27:15.571542 === u2Vref_new: 0x5e --> 0x3d
716 09:27:15.575093 === u2Vref_new: 0x60 --> 0xa0
717 09:27:15.578604 [CA 0] Center 34 (6~63) winsize 58
718 09:27:15.582214 [CA 1] Center 35 (8~63) winsize 56
719 09:27:15.582287 [CA 2] Center 30 (2~59) winsize 58
720 09:27:15.584945 [CA 3] Center 25 (-3~53) winsize 57
721 09:27:15.588406 [CA 4] Center 26 (-2~54) winsize 57
722 09:27:15.591829 [CA 5] Center 31 (2~60) winsize 59
723 09:27:15.591901
724 09:27:15.594824 [CATrainingPosCal] consider 1 rank data
725 09:27:15.598321 u2DelayCellTimex100 = 753/100 ps
726 09:27:15.601248 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
727 09:27:15.608301 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
728 09:27:15.611103 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
729 09:27:15.614411 CA3 delay=25 (-3~53),Diff = 0 PI (0 cell)
730 09:27:15.617892 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
731 09:27:15.621282 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
732 09:27:15.621360
733 09:27:15.624519 CA PerBit enable=1, Macro0, CA PI delay=25
734 09:27:15.627892 === u2Vref_new: 0x5e --> 0x3d
735 09:27:15.627963
736 09:27:15.630888 Vref(ca) range 1: 30
737 09:27:15.630951
738 09:27:15.631004 CS Dly= 8 (39-0-32)
739 09:27:15.634615 Write Rank0 MR13 =0xd8
740 09:27:15.637769 Write Rank0 MR13 =0xd8
741 09:27:15.637845 Write Rank0 MR12 =0x5e
742 09:27:15.640994 Write Rank1 MR13 =0x59
743 09:27:15.641068 ==
744 09:27:15.644185 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
745 09:27:15.647665 fsp= 1, odt_onoff= 1, Byte mode= 0
746 09:27:15.647741 ==
747 09:27:15.651211 === u2Vref_new: 0x56 --> 0x2d
748 09:27:15.654125 === u2Vref_new: 0x58 --> 0x38
749 09:27:15.657759 === u2Vref_new: 0x5a --> 0x39
750 09:27:15.661106 === u2Vref_new: 0x5c --> 0x3c
751 09:27:15.664215 === u2Vref_new: 0x5e --> 0x3d
752 09:27:15.667337 === u2Vref_new: 0x60 --> 0xa0
753 09:27:15.670334 [CA 0] Center 35 (8~63) winsize 56
754 09:27:15.673875 [CA 1] Center 35 (8~63) winsize 56
755 09:27:15.677284 [CA 2] Center 31 (2~60) winsize 59
756 09:27:15.680871 [CA 3] Center 26 (-2~54) winsize 57
757 09:27:15.683738 [CA 4] Center 26 (-2~54) winsize 57
758 09:27:15.687231 [CA 5] Center 32 (3~61) winsize 59
759 09:27:15.687307
760 09:27:15.690849 [CATrainingPosCal] consider 2 rank data
761 09:27:15.693569 u2DelayCellTimex100 = 753/100 ps
762 09:27:15.697121 CA0 delay=35 (8~63),Diff = 10 PI (12 cell)
763 09:27:15.700808 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
764 09:27:15.703637 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
765 09:27:15.707241 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
766 09:27:15.710116 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
767 09:27:15.713687 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
768 09:27:15.717354
769 09:27:15.720315 CA PerBit enable=1, Macro0, CA PI delay=25
770 09:27:15.723879 === u2Vref_new: 0x5e --> 0x3d
771 09:27:15.723981
772 09:27:15.724049 Vref(ca) range 1: 30
773 09:27:15.724104
774 09:27:15.726650 CS Dly= 7 (38-0-32)
775 09:27:15.726725 Write Rank1 MR13 =0xd8
776 09:27:15.730093 Write Rank1 MR13 =0xd8
777 09:27:15.733544 Write Rank1 MR12 =0x5e
778 09:27:15.737115 [RankSwap] Rank num 2, (Multi 1), Rank 0
779 09:27:15.737191 Write Rank0 MR2 =0xad
780 09:27:15.740522 [Write Leveling]
781 09:27:15.743340 delay byte0 byte1 byte2 byte3
782 09:27:15.743455
783 09:27:15.743552 10 0 0
784 09:27:15.746864 11 0 0
785 09:27:15.746941 12 0 0
786 09:27:15.747001 13 0 0
787 09:27:15.750352 14 0 0
788 09:27:15.750429 15 0 0
789 09:27:15.753516 16 0 0
790 09:27:15.753618 17 0 0
791 09:27:15.756473 18 0 0
792 09:27:15.756549 19 0 0
793 09:27:15.756610 20 0 0
794 09:27:15.759719 21 0 0
795 09:27:15.759802 22 0 ff
796 09:27:15.763475 23 0 ff
797 09:27:15.763547 24 0 ff
798 09:27:15.766498 25 0 ff
799 09:27:15.766570 26 0 ff
800 09:27:15.766645 27 0 ff
801 09:27:15.769829 28 0 ff
802 09:27:15.769900 29 0 ff
803 09:27:15.773175 30 0 ff
804 09:27:15.773271 31 ff ff
805 09:27:15.776332 32 ff ff
806 09:27:15.776401 33 ff ff
807 09:27:15.779655 34 ff ff
808 09:27:15.779733 35 ff ff
809 09:27:15.782909 36 ff ff
810 09:27:15.782986 37 ff ff
811 09:27:15.786243 pass bytecount = 0xff (0xff: all bytes pass)
812 09:27:15.786313
813 09:27:15.789605 DQS0 dly: 31
814 09:27:15.789672 DQS1 dly: 22
815 09:27:15.792442 Write Rank0 MR2 =0x2d
816 09:27:15.796032 [RankSwap] Rank num 2, (Multi 1), Rank 0
817 09:27:15.796122 Write Rank0 MR1 =0xd6
818 09:27:15.799374 [Gating]
819 09:27:15.799458 ==
820 09:27:15.802290 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
821 09:27:15.805806 fsp= 1, odt_onoff= 1, Byte mode= 0
822 09:27:15.805879 ==
823 09:27:15.812071 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
824 09:27:15.815830 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
825 09:27:15.818641 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
826 09:27:15.825672 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
827 09:27:15.828515 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
828 09:27:15.832085 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
829 09:27:15.838402 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
830 09:27:15.842039 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
831 09:27:15.844956 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
832 09:27:15.851911 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
833 09:27:15.854806 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
834 09:27:15.858293 3 2 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
835 09:27:15.865255 3 2 16 |3d3d 404 |(11 11)(11 11) |(1 1)(0 0)| 0
836 09:27:15.868166 3 2 20 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
837 09:27:15.871527 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
838 09:27:15.877876 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
839 09:27:15.880931 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
840 09:27:15.884632 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
841 09:27:15.891430 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
842 09:27:15.894665 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
843 09:27:15.897962 3 3 16 |505 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
844 09:27:15.904480 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
845 09:27:15.907861 [Byte 0] Lead/lag Transition tap number (1)
846 09:27:15.910670 [Byte 1] Lead/lag falling Transition (3, 3, 20)
847 09:27:15.914259 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
848 09:27:15.920668 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
849 09:27:15.923679 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 09:27:15.927188 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 09:27:15.934121 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 09:27:15.936900 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 09:27:15.940517 3 4 16 |3d3d 1716 |(11 11)(11 11) |(1 1)(0 1)| 0
854 09:27:15.947261 3 4 20 |3d3d c0b |(11 11)(11 11) |(1 1)(1 1)| 0
855 09:27:15.950161 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 09:27:15.953778 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 09:27:15.960184 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 09:27:15.963568 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 09:27:15.966990 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 09:27:15.973067 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 09:27:15.976593 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 09:27:15.980029 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 09:27:15.986504 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 09:27:15.989788 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 09:27:15.992915 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 09:27:15.999124 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 09:27:16.002686 [Byte 0] Lead/lag falling Transition (3, 6, 4)
868 09:27:16.005943 [Byte 1] Lead/lag falling Transition (3, 6, 4)
869 09:27:16.009191 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
870 09:27:16.015702 [Byte 0] Lead/lag Transition tap number (2)
871 09:27:16.018900 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
872 09:27:16.022602 [Byte 1] Lead/lag Transition tap number (3)
873 09:27:16.025638 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
874 09:27:16.028901 [Byte 0]First pass (3, 6, 16)
875 09:27:16.032227 3 6 20 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
876 09:27:16.038787 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
877 09:27:16.038900 [Byte 1]First pass (3, 6, 24)
878 09:27:16.045412 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 09:27:16.048414 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 09:27:16.051968 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 09:27:16.054871 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 09:27:16.061395 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 09:27:16.064960 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 09:27:16.068433 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 09:27:16.071420 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 09:27:16.074796 All bytes gating window > 1UI, Early break!
887 09:27:16.074892
888 09:27:16.081647 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
889 09:27:16.081735
890 09:27:16.085264 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
891 09:27:16.085363
892 09:27:16.085435
893 09:27:16.085503
894 09:27:16.088210 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
895 09:27:16.088314
896 09:27:16.091893 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
897 09:27:16.092006
898 09:27:16.092092
899 09:27:16.094740 Write Rank0 MR1 =0x56
900 09:27:16.094876
901 09:27:16.098270 best RODT dly(2T, 0.5T) = (2, 3)
902 09:27:16.098394
903 09:27:16.101285 best RODT dly(2T, 0.5T) = (2, 3)
904 09:27:16.101409 ==
905 09:27:16.104774 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
906 09:27:16.108342 fsp= 1, odt_onoff= 1, Byte mode= 0
907 09:27:16.108502 ==
908 09:27:16.114544 Start DQ dly to find pass range UseTestEngine =0
909 09:27:16.117964 x-axis: bit #, y-axis: DQ dly (-127~63)
910 09:27:16.118185 RX Vref Scan = 0
911 09:27:16.121233 -26, [0] xxxxxxxx xxxxxxxx [MSB]
912 09:27:16.124980 -25, [0] xxxxxxxx xxxxxxxx [MSB]
913 09:27:16.128295 -24, [0] xxxxxxxx xxxxxxxx [MSB]
914 09:27:16.131318 -23, [0] xxxxxxxx xxxxxxxx [MSB]
915 09:27:16.134703 -22, [0] xxxxxxxx xxxxxxxx [MSB]
916 09:27:16.138092 -21, [0] xxxxxxxx xxxxxxxx [MSB]
917 09:27:16.138487 -20, [0] xxxxxxxx xxxxxxxx [MSB]
918 09:27:16.141151 -19, [0] xxxxxxxx xxxxxxxx [MSB]
919 09:27:16.144729 -18, [0] xxxxxxxx xxxxxxxx [MSB]
920 09:27:16.147912 -17, [0] xxxxxxxx xxxxxxxx [MSB]
921 09:27:16.150938 -16, [0] xxxxxxxx xxxxxxxx [MSB]
922 09:27:16.154605 -15, [0] xxxxxxxx xxxxxxxx [MSB]
923 09:27:16.157855 -14, [0] xxxxxxxx xxxxxxxx [MSB]
924 09:27:16.160784 -13, [0] xxxxxxxx xxxxxxxx [MSB]
925 09:27:16.164170 -12, [0] xxxxxxxx xxxxxxxx [MSB]
926 09:27:16.167468 -11, [0] xxxxxxxx xxxxxxxx [MSB]
927 09:27:16.167848 -10, [0] xxxxxxxx xxxxxxxx [MSB]
928 09:27:16.170961 -9, [0] xxxxxxxx xxxxxxxx [MSB]
929 09:27:16.173949 -8, [0] xxxxxxxx xxxxxxxx [MSB]
930 09:27:16.177539 -7, [0] xxxxxxxx xxxxxxxx [MSB]
931 09:27:16.180943 -6, [0] xxxxxxxx xxxxxxxx [MSB]
932 09:27:16.184173 -5, [0] xxxxxxxx xxxxxxxx [MSB]
933 09:27:16.187589 -4, [0] xxxxxxxx xxxxxxxx [MSB]
934 09:27:16.188118 -3, [0] xxxoxxxx xxxxxxxx [MSB]
935 09:27:16.190839 -2, [0] xxxoxxxx oxxxxxxx [MSB]
936 09:27:16.194316 -1, [0] xxxoxxxx oxxoxxxx [MSB]
937 09:27:16.197088 0, [0] xxxoxxxx ooxoxxxx [MSB]
938 09:27:16.200581 1, [0] xxxoxoxx ooxooxxx [MSB]
939 09:27:16.204219 2, [0] xxxoxoox ooxoooxx [MSB]
940 09:27:16.204615 3, [0] xxxoxoox ooxoooox [MSB]
941 09:27:16.207036 4, [0] xxxoxooo ooxoooox [MSB]
942 09:27:16.210597 5, [0] xoxooooo ooxooooo [MSB]
943 09:27:16.214209 6, [0] xooooooo ooxooooo [MSB]
944 09:27:16.217211 7, [0] oooooooo ooxooooo [MSB]
945 09:27:16.220653 33, [0] oooxoooo oooooooo [MSB]
946 09:27:16.223571 34, [0] oooxoxoo oooooooo [MSB]
947 09:27:16.223970 35, [0] oooxoxoo xooxoooo [MSB]
948 09:27:16.227151 36, [0] oooxoxoo xxoxoooo [MSB]
949 09:27:16.230485 37, [0] oooxoxoo xxoxxxoo [MSB]
950 09:27:16.233879 38, [0] oooxoxxx xxoxxxxo [MSB]
951 09:27:16.237183 39, [0] xxoxoxxx xxoxxxxo [MSB]
952 09:27:16.240494 40, [0] xxoxoxxx xxoxxxxo [MSB]
953 09:27:16.243657 41, [0] xxxxxxxx xxoxxxxx [MSB]
954 09:27:16.244235 42, [0] xxxxxxxx xxoxxxxx [MSB]
955 09:27:16.247392 43, [0] xxxxxxxx xxxxxxxx [MSB]
956 09:27:16.250145 iDelay=43, Bit 0, Center 22 (7 ~ 38) 32
957 09:27:16.253656 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
958 09:27:16.256739 iDelay=43, Bit 2, Center 23 (6 ~ 40) 35
959 09:27:16.263375 iDelay=43, Bit 3, Center 14 (-3 ~ 32) 36
960 09:27:16.266525 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
961 09:27:16.270013 iDelay=43, Bit 5, Center 17 (1 ~ 33) 33
962 09:27:16.273518 iDelay=43, Bit 6, Center 19 (2 ~ 37) 36
963 09:27:16.276757 iDelay=43, Bit 7, Center 20 (4 ~ 37) 34
964 09:27:16.279973 iDelay=43, Bit 8, Center 16 (-2 ~ 34) 37
965 09:27:16.282962 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
966 09:27:16.286858 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
967 09:27:16.290143 iDelay=43, Bit 11, Center 16 (-1 ~ 34) 36
968 09:27:16.293005 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
969 09:27:16.296574 iDelay=43, Bit 13, Center 19 (2 ~ 36) 35
970 09:27:16.303327 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
971 09:27:16.306712 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
972 09:27:16.307263 ==
973 09:27:16.309807 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
974 09:27:16.313203 fsp= 1, odt_onoff= 1, Byte mode= 0
975 09:27:16.313773 ==
976 09:27:16.316933 DQS Delay:
977 09:27:16.317508 DQS0 = 0, DQS1 = 0
978 09:27:16.317943 DQM Delay:
979 09:27:16.319506 DQM0 = 19, DQM1 = 19
980 09:27:16.319915 DQ Delay:
981 09:27:16.323231 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14
982 09:27:16.326152 DQ4 =22, DQ5 =17, DQ6 =19, DQ7 =20
983 09:27:16.329598 DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =16
984 09:27:16.332929 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =22
985 09:27:16.333726
986 09:27:16.334156
987 09:27:16.335712 DramC Write-DBI off
988 09:27:16.336173 ==
989 09:27:16.339201 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
990 09:27:16.342775 fsp= 1, odt_onoff= 1, Byte mode= 0
991 09:27:16.346165 ==
992 09:27:16.349396 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
993 09:27:16.349939
994 09:27:16.352658 Begin, DQ Scan Range 918~1174
995 09:27:16.353096
996 09:27:16.353608
997 09:27:16.353988 TX Vref Scan disable
998 09:27:16.356130 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
999 09:27:16.362225 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1000 09:27:16.365163 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1001 09:27:16.368532 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1002 09:27:16.371907 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1003 09:27:16.375319 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1004 09:27:16.378278 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1005 09:27:16.381797 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1006 09:27:16.385255 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1007 09:27:16.388812 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1008 09:27:16.391656 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1009 09:27:16.394862 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1010 09:27:16.397892 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1011 09:27:16.401483 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1012 09:27:16.404719 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1013 09:27:16.411241 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1014 09:27:16.415228 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1015 09:27:16.418007 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1016 09:27:16.421187 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1017 09:27:16.424741 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1018 09:27:16.427639 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1019 09:27:16.431201 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1020 09:27:16.434813 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1021 09:27:16.438212 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1022 09:27:16.441111 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1023 09:27:16.444666 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1024 09:27:16.447588 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1025 09:27:16.451084 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1026 09:27:16.457426 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1027 09:27:16.461348 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1028 09:27:16.464410 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1029 09:27:16.467870 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1030 09:27:16.470641 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1031 09:27:16.474232 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1032 09:27:16.477374 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1033 09:27:16.480563 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1034 09:27:16.484058 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1035 09:27:16.487548 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1036 09:27:16.490300 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1037 09:27:16.493887 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1038 09:27:16.497415 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1039 09:27:16.500330 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1040 09:27:16.506799 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1041 09:27:16.510293 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1042 09:27:16.513931 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1043 09:27:16.517127 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1044 09:27:16.520543 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1045 09:27:16.523874 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1046 09:27:16.526021 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1047 09:27:16.530027 967 |3 6 7|[0] xxxxxxxx oxxxxxxx [MSB]
1048 09:27:16.532915 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1049 09:27:16.536228 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1050 09:27:16.539456 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1051 09:27:16.543022 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1052 09:27:16.546261 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1053 09:27:16.549430 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1054 09:27:16.552895 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1055 09:27:16.555744 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1056 09:27:16.562831 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1057 09:27:16.565695 977 |3 6 17|[0] xxxooooo oooooooo [MSB]
1058 09:27:16.568918 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1059 09:27:16.572228 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1060 09:27:16.576007 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1061 09:27:16.579376 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1062 09:27:16.582240 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1063 09:27:16.585625 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1064 09:27:16.589164 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1065 09:27:16.592711 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1066 09:27:16.595526 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1067 09:27:16.602641 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1068 09:27:16.605430 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1069 09:27:16.608924 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1070 09:27:16.612354 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1071 09:27:16.615840 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1072 09:27:16.618631 Byte0, DQ PI dly=986, DQM PI dly= 986
1073 09:27:16.622161 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1074 09:27:16.622240
1075 09:27:16.628488 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1076 09:27:16.628566
1077 09:27:16.632065 Byte1, DQ PI dly=978, DQM PI dly= 978
1078 09:27:16.634938 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1079 09:27:16.635016
1080 09:27:16.638549 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1081 09:27:16.638651
1082 09:27:16.638736 ==
1083 09:27:16.645000 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1084 09:27:16.648331 fsp= 1, odt_onoff= 1, Byte mode= 0
1085 09:27:16.648407 ==
1086 09:27:16.651646 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1087 09:27:16.651721
1088 09:27:16.654908 Begin, DQ Scan Range 954~1018
1089 09:27:16.657970 Write Rank0 MR14 =0x0
1090 09:27:16.665451
1091 09:27:16.665529 CH=0, VrefRange= 0, VrefLevel = 0
1092 09:27:16.671916 TX Bit0 (983~995) 13 989, Bit8 (972~981) 10 976,
1093 09:27:16.675146 TX Bit1 (981~993) 13 987, Bit9 (972~982) 11 977,
1094 09:27:16.682014 TX Bit2 (982~994) 13 988, Bit10 (975~985) 11 980,
1095 09:27:16.685274 TX Bit3 (976~990) 15 983, Bit11 (972~981) 10 976,
1096 09:27:16.688450 TX Bit4 (982~991) 10 986, Bit12 (972~982) 11 977,
1097 09:27:16.695310 TX Bit5 (978~990) 13 984, Bit13 (973~982) 10 977,
1098 09:27:16.698609 TX Bit6 (979~991) 13 985, Bit14 (972~985) 14 978,
1099 09:27:16.704799 TX Bit7 (982~991) 10 986, Bit15 (974~985) 12 979,
1100 09:27:16.704878
1101 09:27:16.704956 Write Rank0 MR14 =0x2
1102 09:27:16.714091
1103 09:27:16.714181 CH=0, VrefRange= 0, VrefLevel = 2
1104 09:27:16.720949 TX Bit0 (982~996) 15 989, Bit8 (969~981) 13 975,
1105 09:27:16.724486 TX Bit1 (982~993) 12 987, Bit9 (972~983) 12 977,
1106 09:27:16.730861 TX Bit2 (981~995) 15 988, Bit10 (975~988) 14 981,
1107 09:27:16.734375 TX Bit3 (975~990) 16 982, Bit11 (971~981) 11 976,
1108 09:27:16.737251 TX Bit4 (981~992) 12 986, Bit12 (972~983) 12 977,
1109 09:27:16.743897 TX Bit5 (978~990) 13 984, Bit13 (972~982) 11 977,
1110 09:27:16.747623 TX Bit6 (979~992) 14 985, Bit14 (972~986) 15 979,
1111 09:27:16.754218 TX Bit7 (982~992) 11 987, Bit15 (974~989) 16 981,
1112 09:27:16.754413
1113 09:27:16.757079 wait MRW command Rank0 MR14 =0x4 fired (1)
1114 09:27:16.757307 Write Rank0 MR14 =0x4
1115 09:27:16.767117
1116 09:27:16.767485 CH=0, VrefRange= 0, VrefLevel = 4
1117 09:27:16.773494 TX Bit0 (982~997) 16 989, Bit8 (969~982) 14 975,
1118 09:27:16.776841 TX Bit1 (980~995) 16 987, Bit9 (971~983) 13 977,
1119 09:27:16.783419 TX Bit2 (981~996) 16 988, Bit10 (975~989) 15 982,
1120 09:27:16.786576 TX Bit3 (975~991) 17 983, Bit11 (971~982) 12 976,
1121 09:27:16.790328 TX Bit4 (980~992) 13 986, Bit12 (972~983) 12 977,
1122 09:27:16.796812 TX Bit5 (977~991) 15 984, Bit13 (972~983) 12 977,
1123 09:27:16.799921 TX Bit6 (978~993) 16 985, Bit14 (972~986) 15 979,
1124 09:27:16.806482 TX Bit7 (980~993) 14 986, Bit15 (973~989) 17 981,
1125 09:27:16.806877
1126 09:27:16.807183 Write Rank0 MR14 =0x6
1127 09:27:16.815797
1128 09:27:16.816305 CH=0, VrefRange= 0, VrefLevel = 6
1129 09:27:16.822229 TX Bit0 (982~997) 16 989, Bit8 (969~982) 14 975,
1130 09:27:16.872894 TX Bit1 (980~995) 16 987, Bit9 (971~984) 14 977,
1131 09:27:16.873253 TX Bit2 (981~997) 17 989, Bit10 (975~989) 15 982,
1132 09:27:16.873336 TX Bit3 (975~991) 17 983, Bit11 (970~982) 13 976,
1133 09:27:16.873393 TX Bit4 (979~993) 15 986, Bit12 (971~984) 14 977,
1134 09:27:16.873465 TX Bit5 (977~991) 15 984, Bit13 (972~983) 12 977,
1135 09:27:16.873530 TX Bit6 (978~993) 16 985, Bit14 (972~987) 16 979,
1136 09:27:16.873609 TX Bit7 (980~993) 14 986, Bit15 (973~989) 17 981,
1137 09:27:16.873677
1138 09:27:16.873740 Write Rank0 MR14 =0x8
1139 09:27:16.873790
1140 09:27:16.873849 CH=0, VrefRange= 0, VrefLevel = 8
1141 09:27:16.873901 TX Bit0 (981~998) 18 989, Bit8 (969~983) 15 976,
1142 09:27:16.873951 TX Bit1 (980~996) 17 988, Bit9 (971~984) 14 977,
1143 09:27:16.879738 TX Bit2 (981~997) 17 989, Bit10 (974~990) 17 982,
1144 09:27:16.882582 TX Bit3 (975~991) 17 983, Bit11 (970~983) 14 976,
1145 09:27:16.889193 TX Bit4 (979~994) 16 986, Bit12 (971~985) 15 978,
1146 09:27:16.892609 TX Bit5 (977~992) 16 984, Bit13 (971~984) 14 977,
1147 09:27:16.899339 TX Bit6 (977~993) 17 985, Bit14 (971~988) 18 979,
1148 09:27:16.902253 TX Bit7 (979~994) 16 986, Bit15 (973~990) 18 981,
1149 09:27:16.902344
1150 09:27:16.905875 Write Rank0 MR14 =0xa
1151 09:27:16.912935
1152 09:27:16.916486 CH=0, VrefRange= 0, VrefLevel = 10
1153 09:27:16.919658 TX Bit0 (981~998) 18 989, Bit8 (968~983) 16 975,
1154 09:27:16.923088 TX Bit1 (979~997) 19 988, Bit9 (970~985) 16 977,
1155 09:27:16.929652 TX Bit2 (980~998) 19 989, Bit10 (974~990) 17 982,
1156 09:27:16.932970 TX Bit3 (975~991) 17 983, Bit11 (969~983) 15 976,
1157 09:27:16.936553 TX Bit4 (979~994) 16 986, Bit12 (970~986) 17 978,
1158 09:27:16.943128 TX Bit5 (977~992) 16 984, Bit13 (971~985) 15 978,
1159 09:27:16.946073 TX Bit6 (977~994) 18 985, Bit14 (971~988) 18 979,
1160 09:27:16.952749 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1161 09:27:16.952834
1162 09:27:16.952899 Write Rank0 MR14 =0xc
1163 09:27:16.962094
1164 09:27:16.965826 CH=0, VrefRange= 0, VrefLevel = 12
1165 09:27:16.968807 TX Bit0 (981~999) 19 990, Bit8 (967~983) 17 975,
1166 09:27:16.972190 TX Bit1 (979~998) 20 988, Bit9 (970~986) 17 978,
1167 09:27:16.978632 TX Bit2 (980~998) 19 989, Bit10 (974~991) 18 982,
1168 09:27:16.982054 TX Bit3 (975~992) 18 983, Bit11 (968~984) 17 976,
1169 09:27:16.985031 TX Bit4 (978~995) 18 986, Bit12 (970~987) 18 978,
1170 09:27:16.992187 TX Bit5 (976~993) 18 984, Bit13 (970~985) 16 977,
1171 09:27:16.995011 TX Bit6 (977~995) 19 986, Bit14 (971~989) 19 980,
1172 09:27:17.001792 TX Bit7 (978~996) 19 987, Bit15 (973~991) 19 982,
1173 09:27:17.001873
1174 09:27:17.001934 Write Rank0 MR14 =0xe
1175 09:27:17.011480
1176 09:27:17.015059 CH=0, VrefRange= 0, VrefLevel = 14
1177 09:27:17.017850 TX Bit0 (981~999) 19 990, Bit8 (967~984) 18 975,
1178 09:27:17.021421 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1179 09:27:17.028123 TX Bit2 (979~999) 21 989, Bit10 (974~992) 19 983,
1180 09:27:17.030921 TX Bit3 (974~992) 19 983, Bit11 (968~984) 17 976,
1181 09:27:17.034340 TX Bit4 (978~996) 19 987, Bit12 (969~988) 20 978,
1182 09:27:17.040677 TX Bit5 (976~993) 18 984, Bit13 (971~986) 16 978,
1183 09:27:17.044434 TX Bit6 (976~995) 20 985, Bit14 (970~989) 20 979,
1184 09:27:17.050368 TX Bit7 (978~997) 20 987, Bit15 (973~991) 19 982,
1185 09:27:17.050445
1186 09:27:17.050559 Write Rank0 MR14 =0x10
1187 09:27:17.060360
1188 09:27:17.063619 CH=0, VrefRange= 0, VrefLevel = 16
1189 09:27:17.067218 TX Bit0 (980~999) 20 989, Bit8 (967~985) 19 976,
1190 09:27:17.070489 TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978,
1191 09:27:17.077425 TX Bit2 (979~999) 21 989, Bit10 (974~992) 19 983,
1192 09:27:17.080242 TX Bit3 (974~992) 19 983, Bit11 (968~985) 18 976,
1193 09:27:17.083691 TX Bit4 (977~997) 21 987, Bit12 (969~988) 20 978,
1194 09:27:17.090055 TX Bit5 (976~994) 19 985, Bit13 (969~987) 19 978,
1195 09:27:17.093466 TX Bit6 (976~997) 22 986, Bit14 (969~989) 21 979,
1196 09:27:17.099987 TX Bit7 (977~998) 22 987, Bit15 (972~992) 21 982,
1197 09:27:17.100058
1198 09:27:17.100122 Write Rank0 MR14 =0x12
1199 09:27:17.109774
1200 09:27:17.112922 CH=0, VrefRange= 0, VrefLevel = 18
1201 09:27:17.116518 TX Bit0 (980~1000) 21 990, Bit8 (966~985) 20 975,
1202 09:27:17.119927 TX Bit1 (977~999) 23 988, Bit9 (969~988) 20 978,
1203 09:27:17.126449 TX Bit2 (978~999) 22 988, Bit10 (973~992) 20 982,
1204 09:27:17.129360 TX Bit3 (974~993) 20 983, Bit11 (967~985) 19 976,
1205 09:27:17.132829 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1206 09:27:17.139637 TX Bit5 (976~995) 20 985, Bit13 (969~988) 20 978,
1207 09:27:17.143117 TX Bit6 (976~997) 22 986, Bit14 (969~990) 22 979,
1208 09:27:17.149650 TX Bit7 (977~998) 22 987, Bit15 (973~992) 20 982,
1209 09:27:17.149724
1210 09:27:17.149783 Write Rank0 MR14 =0x14
1211 09:27:17.159100
1212 09:27:17.162636 CH=0, VrefRange= 0, VrefLevel = 20
1213 09:27:17.166278 TX Bit0 (978~1000) 23 989, Bit8 (966~986) 21 976,
1214 09:27:17.169036 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
1215 09:27:17.175826 TX Bit2 (978~1000) 23 989, Bit10 (973~993) 21 983,
1216 09:27:17.179257 TX Bit3 (973~993) 21 983, Bit11 (967~986) 20 976,
1217 09:27:17.182445 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1218 09:27:17.189048 TX Bit5 (976~995) 20 985, Bit13 (968~989) 22 978,
1219 09:27:17.192477 TX Bit6 (976~997) 22 986, Bit14 (969~990) 22 979,
1220 09:27:17.199066 TX Bit7 (977~998) 22 987, Bit15 (972~993) 22 982,
1221 09:27:17.199167
1222 09:27:17.199251 Write Rank0 MR14 =0x16
1223 09:27:17.208711
1224 09:27:17.212361 CH=0, VrefRange= 0, VrefLevel = 22
1225 09:27:17.215470 TX Bit0 (979~1000) 22 989, Bit8 (966~987) 22 976,
1226 09:27:17.218968 TX Bit1 (977~999) 23 988, Bit9 (968~989) 22 978,
1227 09:27:17.225093 TX Bit2 (978~1000) 23 989, Bit10 (973~993) 21 983,
1228 09:27:17.228355 TX Bit3 (973~994) 22 983, Bit11 (967~988) 22 977,
1229 09:27:17.231604 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1230 09:27:17.238610 TX Bit5 (975~996) 22 985, Bit13 (968~989) 22 978,
1231 09:27:17.242047 TX Bit6 (976~998) 23 987, Bit14 (969~990) 22 979,
1232 09:27:17.248285 TX Bit7 (977~999) 23 988, Bit15 (971~993) 23 982,
1233 09:27:17.248358
1234 09:27:17.248415 Write Rank0 MR14 =0x18
1235 09:27:17.258369
1236 09:27:17.261874 CH=0, VrefRange= 0, VrefLevel = 24
1237 09:27:17.265117 TX Bit0 (978~1001) 24 989, Bit8 (966~988) 23 977,
1238 09:27:17.268291 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1239 09:27:17.275186 TX Bit2 (978~1000) 23 989, Bit10 (973~994) 22 983,
1240 09:27:17.278752 TX Bit3 (973~994) 22 983, Bit11 (966~988) 23 977,
1241 09:27:17.281653 TX Bit4 (977~999) 23 988, Bit12 (967~990) 24 978,
1242 09:27:17.288761 TX Bit5 (975~997) 23 986, Bit13 (968~989) 22 978,
1243 09:27:17.291448 TX Bit6 (975~998) 24 986, Bit14 (968~990) 23 979,
1244 09:27:17.298116 TX Bit7 (977~999) 23 988, Bit15 (972~994) 23 983,
1245 09:27:17.298189
1246 09:27:17.298255 Write Rank0 MR14 =0x1a
1247 09:27:17.308167
1248 09:27:17.311808 CH=0, VrefRange= 0, VrefLevel = 26
1249 09:27:17.314637 TX Bit0 (978~1001) 24 989, Bit8 (966~988) 23 977,
1250 09:27:17.318240 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1251 09:27:17.324491 TX Bit2 (977~1001) 25 989, Bit10 (972~995) 24 983,
1252 09:27:17.328202 TX Bit3 (972~995) 24 983, Bit11 (966~988) 23 977,
1253 09:27:17.331036 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1254 09:27:17.337794 TX Bit5 (975~997) 23 986, Bit13 (968~989) 22 978,
1255 09:27:17.340996 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1256 09:27:17.347889 TX Bit7 (977~999) 23 988, Bit15 (971~994) 24 982,
1257 09:27:17.347961
1258 09:27:17.348019 Write Rank0 MR14 =0x1c
1259 09:27:17.358565
1260 09:27:17.361225 CH=0, VrefRange= 0, VrefLevel = 28
1261 09:27:17.364996 TX Bit0 (977~1002) 26 989, Bit8 (965~988) 24 976,
1262 09:27:17.367870 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1263 09:27:17.374570 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1264 09:27:17.378135 TX Bit3 (973~995) 23 984, Bit11 (966~989) 24 977,
1265 09:27:17.381257 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1266 09:27:17.387578 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1267 09:27:17.391223 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1268 09:27:17.397695 TX Bit7 (976~999) 24 987, Bit15 (971~994) 24 982,
1269 09:27:17.397773
1270 09:27:17.397832 Write Rank0 MR14 =0x1e
1271 09:27:17.408381
1272 09:27:17.411727 CH=0, VrefRange= 0, VrefLevel = 30
1273 09:27:17.414435 TX Bit0 (977~1002) 26 989, Bit8 (965~988) 24 976,
1274 09:27:17.418031 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1275 09:27:17.424506 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1276 09:27:17.428120 TX Bit3 (972~995) 24 983, Bit11 (966~989) 24 977,
1277 09:27:17.431010 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1278 09:27:17.437485 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
1279 09:27:17.441170 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1280 09:27:17.447316 TX Bit7 (976~1000) 25 988, Bit15 (970~994) 25 982,
1281 09:27:17.447392
1282 09:27:17.447450 Write Rank0 MR14 =0x20
1283 09:27:17.458398
1284 09:27:17.461808 CH=0, VrefRange= 0, VrefLevel = 32
1285 09:27:17.465030 TX Bit0 (977~1002) 26 989, Bit8 (965~988) 24 976,
1286 09:27:17.467683 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1287 09:27:17.474667 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1288 09:27:17.478226 TX Bit3 (972~995) 24 983, Bit11 (966~989) 24 977,
1289 09:27:17.481080 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1290 09:27:17.487929 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
1291 09:27:17.491221 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1292 09:27:17.497504 TX Bit7 (976~1000) 25 988, Bit15 (970~994) 25 982,
1293 09:27:17.497636
1294 09:27:17.497700 Write Rank0 MR14 =0x22
1295 09:27:17.508123
1296 09:27:17.510987 CH=0, VrefRange= 0, VrefLevel = 34
1297 09:27:17.514495 TX Bit0 (977~1002) 26 989, Bit8 (965~988) 24 976,
1298 09:27:17.517717 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1299 09:27:17.524208 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1300 09:27:17.527410 TX Bit3 (972~995) 24 983, Bit11 (966~989) 24 977,
1301 09:27:17.531051 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1302 09:27:17.537511 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
1303 09:27:17.541251 TX Bit6 (975~999) 25 987, Bit14 (967~992) 26 979,
1304 09:27:17.547399 TX Bit7 (976~1000) 25 988, Bit15 (970~994) 25 982,
1305 09:27:17.547475
1306 09:27:17.547531
1307 09:27:17.550864 TX Vref found, early break! 370< 372
1308 09:27:17.554212 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1309 09:27:17.557023 u1DelayCellOfst[0]=7 cells (6 PI)
1310 09:27:17.560710 u1DelayCellOfst[1]=7 cells (6 PI)
1311 09:27:17.564038 u1DelayCellOfst[2]=7 cells (6 PI)
1312 09:27:17.567182 u1DelayCellOfst[3]=0 cells (0 PI)
1313 09:27:17.570087 u1DelayCellOfst[4]=5 cells (4 PI)
1314 09:27:17.573462 u1DelayCellOfst[5]=3 cells (3 PI)
1315 09:27:17.576863 u1DelayCellOfst[6]=5 cells (4 PI)
1316 09:27:17.580257 u1DelayCellOfst[7]=6 cells (5 PI)
1317 09:27:17.583560 Byte0, DQ PI dly=983, DQM PI dly= 986
1318 09:27:17.587074 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1319 09:27:17.587191
1320 09:27:17.589902 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1321 09:27:17.589970
1322 09:27:17.593348 u1DelayCellOfst[8]=0 cells (0 PI)
1323 09:27:17.596926 u1DelayCellOfst[9]=2 cells (2 PI)
1324 09:27:17.600169 u1DelayCellOfst[10]=10 cells (8 PI)
1325 09:27:17.603293 u1DelayCellOfst[11]=1 cells (1 PI)
1326 09:27:17.606950 u1DelayCellOfst[12]=2 cells (2 PI)
1327 09:27:17.609906 u1DelayCellOfst[13]=2 cells (2 PI)
1328 09:27:17.613523 u1DelayCellOfst[14]=3 cells (3 PI)
1329 09:27:17.616354 u1DelayCellOfst[15]=7 cells (6 PI)
1330 09:27:17.619861 Byte1, DQ PI dly=976, DQM PI dly= 980
1331 09:27:17.623336 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1332 09:27:17.623403
1333 09:27:17.626763 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1334 09:27:17.629511
1335 09:27:17.629613 Write Rank0 MR14 =0x1e
1336 09:27:17.629672
1337 09:27:17.633002 Final TX Range 0 Vref 30
1338 09:27:17.633097
1339 09:27:17.639829 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1340 09:27:17.639928
1341 09:27:17.646250 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1342 09:27:17.652811 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1343 09:27:17.659595 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1344 09:27:17.663004 Write Rank0 MR3 =0xb0
1345 09:27:17.663097 DramC Write-DBI on
1346 09:27:17.663186 ==
1347 09:27:17.669446 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1348 09:27:17.672961 fsp= 1, odt_onoff= 1, Byte mode= 0
1349 09:27:17.673038 ==
1350 09:27:17.676392 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1351 09:27:17.676485
1352 09:27:17.678995 Begin, DQ Scan Range 700~764
1353 09:27:17.679092
1354 09:27:17.679174
1355 09:27:17.682358 TX Vref Scan disable
1356 09:27:17.685832 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1357 09:27:17.689099 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1358 09:27:17.692690 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1359 09:27:17.695996 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1360 09:27:17.699267 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1361 09:27:17.702107 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1362 09:27:17.705484 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1363 09:27:17.708834 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1364 09:27:17.712190 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1365 09:27:17.715892 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1366 09:27:17.718712 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1367 09:27:17.722388 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1368 09:27:17.725240 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1369 09:27:17.732312 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1370 09:27:17.735063 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1371 09:27:17.738463 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1372 09:27:17.741957 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1373 09:27:17.745306 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1374 09:27:17.748214 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1375 09:27:17.751851 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1376 09:27:17.759172 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1377 09:27:17.761913 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1378 09:27:17.765355 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1379 09:27:17.768966 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1380 09:27:17.772439 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1381 09:27:17.775353 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1382 09:27:17.778991 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1383 09:27:17.781842 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1384 09:27:17.785371 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1385 09:27:17.789017 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1386 09:27:17.791750 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1387 09:27:17.795175 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1388 09:27:17.798620 Byte0, DQ PI dly=732, DQM PI dly= 732
1389 09:27:17.804961 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1390 09:27:17.805035
1391 09:27:17.808331 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1392 09:27:17.808401
1393 09:27:17.811755 Byte1, DQ PI dly=722, DQM PI dly= 722
1394 09:27:17.815105 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1395 09:27:17.815182
1396 09:27:17.821322 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1397 09:27:17.821448
1398 09:27:17.828633 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1399 09:27:17.835133 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1400 09:27:17.841482 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1401 09:27:17.844971 Write Rank0 MR3 =0x30
1402 09:27:17.845046 DramC Write-DBI off
1403 09:27:17.845105
1404 09:27:17.845159 [DATLAT]
1405 09:27:17.848325 Freq=1600, CH0 RK0, use_rxtx_scan=0
1406 09:27:17.848400
1407 09:27:17.851581 DATLAT Default: 0xf
1408 09:27:17.854287 7, 0xFFFF, sum=0
1409 09:27:17.854364 8, 0xFFFF, sum=0
1410 09:27:17.854427 9, 0xFFFF, sum=0
1411 09:27:17.857839 10, 0xFFFF, sum=0
1412 09:27:17.857942 11, 0xFFFF, sum=0
1413 09:27:17.861400 12, 0xFFFF, sum=0
1414 09:27:17.861499 13, 0xFFFF, sum=0
1415 09:27:17.864888 14, 0x0, sum=1
1416 09:27:17.864964 15, 0x0, sum=2
1417 09:27:17.867675 16, 0x0, sum=3
1418 09:27:17.867775 17, 0x0, sum=4
1419 09:27:17.871039 pattern=2 first_step=14 total pass=5 best_step=16
1420 09:27:17.874681 ==
1421 09:27:17.878091 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1422 09:27:17.881048 fsp= 1, odt_onoff= 1, Byte mode= 0
1423 09:27:17.881113 ==
1424 09:27:17.884745 Start DQ dly to find pass range UseTestEngine =1
1425 09:27:17.888175 x-axis: bit #, y-axis: DQ dly (-127~63)
1426 09:27:17.890934 RX Vref Scan = 1
1427 09:27:17.998032
1428 09:27:17.998166 RX Vref found, early break!
1429 09:27:17.998256
1430 09:27:18.004343 Final RX Vref 11, apply to both rank0 and 1
1431 09:27:18.004414 ==
1432 09:27:18.007821 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1433 09:27:18.011304 fsp= 1, odt_onoff= 1, Byte mode= 0
1434 09:27:18.011385 ==
1435 09:27:18.011462 DQS Delay:
1436 09:27:18.013999 DQS0 = 0, DQS1 = 0
1437 09:27:18.014084 DQM Delay:
1438 09:27:18.017704 DQM0 = 19, DQM1 = 19
1439 09:27:18.017781 DQ Delay:
1440 09:27:18.020784 DQ0 =23, DQ1 =21, DQ2 =23, DQ3 =15
1441 09:27:18.024358 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =21
1442 09:27:18.027291 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =16
1443 09:27:18.030774 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1444 09:27:18.030852
1445 09:27:18.030929
1446 09:27:18.031000
1447 09:27:18.033840 [DramC_TX_OE_Calibration] TA2
1448 09:27:18.037264 Original DQ_B0 (3 6) =30, OEN = 27
1449 09:27:18.040632 Original DQ_B1 (3 6) =30, OEN = 27
1450 09:27:18.043961 23, 0x0, End_B0=23 End_B1=23
1451 09:27:18.047233 24, 0x0, End_B0=24 End_B1=24
1452 09:27:18.047366 25, 0x0, End_B0=25 End_B1=25
1453 09:27:18.050637 26, 0x0, End_B0=26 End_B1=26
1454 09:27:18.054052 27, 0x0, End_B0=27 End_B1=27
1455 09:27:18.056871 28, 0x0, End_B0=28 End_B1=28
1456 09:27:18.056949 29, 0x0, End_B0=29 End_B1=29
1457 09:27:18.060442 30, 0x0, End_B0=30 End_B1=30
1458 09:27:18.063766 31, 0xFFFF, End_B0=30 End_B1=30
1459 09:27:18.070202 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1460 09:27:18.073888 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1461 09:27:18.077166
1462 09:27:18.077243
1463 09:27:18.077322 Write Rank0 MR23 =0x3f
1464 09:27:18.077394 [DQSOSC]
1465 09:27:18.087011 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
1466 09:27:18.093389 CH0_RK0: MR19=0x202, MR18=0xADAD, DQSOSC=459, MR23=63, INC=11, DEC=17
1467 09:27:18.093469 Write Rank0 MR23 =0x3f
1468 09:27:18.096913 [DQSOSC]
1469 09:27:18.103148 [DQSOSCAuto] RK0, (LSB)MR18= 0xafaf, (MSB)MR19= 0x202, tDQSOscB0 = 458 ps tDQSOscB1 = 458 ps
1470 09:27:18.106745 CH0 RK0: MR19=202, MR18=AFAF
1471 09:27:18.109503 [RankSwap] Rank num 2, (Multi 1), Rank 1
1472 09:27:18.112826 Write Rank0 MR2 =0xad
1473 09:27:18.112926 [Write Leveling]
1474 09:27:18.116335 delay byte0 byte1 byte2 byte3
1475 09:27:18.116414
1476 09:27:18.119932 10 0 0
1477 09:27:18.120011 11 0 0
1478 09:27:18.120089 12 0 0
1479 09:27:18.122725 13 0 0
1480 09:27:18.122800 14 0 0
1481 09:27:18.126114 15 0 0
1482 09:27:18.126194 16 0 0
1483 09:27:18.126273 17 0 0
1484 09:27:18.129965 18 0 0
1485 09:27:18.130044 19 0 0
1486 09:27:18.132492 20 0 0
1487 09:27:18.132571 21 0 0
1488 09:27:18.136208 22 0 ff
1489 09:27:18.136287 23 0 ff
1490 09:27:18.136364 24 0 ff
1491 09:27:18.139646 25 0 ff
1492 09:27:18.139752 26 0 ff
1493 09:27:18.142443 27 0 ff
1494 09:27:18.142514 28 0 ff
1495 09:27:18.146104 29 0 ff
1496 09:27:18.146184 30 0 ff
1497 09:27:18.149541 31 0 ff
1498 09:27:18.149659 32 ff ff
1499 09:27:18.149737 33 ff ff
1500 09:27:18.152778 34 ff ff
1501 09:27:18.152857 35 ff ff
1502 09:27:18.156012 36 ff ff
1503 09:27:18.156092 37 ff ff
1504 09:27:18.159709 38 ff ff
1505 09:27:18.162849 pass bytecount = 0xff (0xff: all bytes pass)
1506 09:27:18.162929
1507 09:27:18.163006 DQS0 dly: 32
1508 09:27:18.166191 DQS1 dly: 22
1509 09:27:18.166269 Write Rank0 MR2 =0x2d
1510 09:27:18.172423 [RankSwap] Rank num 2, (Multi 1), Rank 0
1511 09:27:18.172499 Write Rank1 MR1 =0xd6
1512 09:27:18.172558 [Gating]
1513 09:27:18.172612 ==
1514 09:27:18.178974 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1515 09:27:18.182175 fsp= 1, odt_onoff= 1, Byte mode= 0
1516 09:27:18.182255 ==
1517 09:27:18.185374 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1518 09:27:18.192073 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1519 09:27:18.195678 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1520 09:27:18.199245 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1521 09:27:18.205787 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1522 09:27:18.208551 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1523 09:27:18.212165 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1524 09:27:18.218210 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1525 09:27:18.221785 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1526 09:27:18.225184 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1527 09:27:18.231424 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1528 09:27:18.234924 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1529 09:27:18.238234 3 2 16 |b0a 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1530 09:27:18.241717 3 2 20 |1515 c0b |(11 11)(11 11) |(1 1)(0 0)| 0
1531 09:27:18.248054 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1532 09:27:18.251583 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1533 09:27:18.255154 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1534 09:27:18.261391 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1535 09:27:18.264817 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1536 09:27:18.268272 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1537 09:27:18.274308 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1538 09:27:18.277614 3 3 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1539 09:27:18.280961 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1540 09:27:18.287895 [Byte 0] Lead/lag Transition tap number (1)
1541 09:27:18.291199 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1542 09:27:18.294563 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1543 09:27:18.300744 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1544 09:27:18.304490 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1545 09:27:18.307208 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1546 09:27:18.314057 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1547 09:27:18.317449 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1548 09:27:18.320427 3 4 24 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 09:27:18.324060 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 09:27:18.330163 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 09:27:18.333678 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 09:27:18.337306 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 09:27:18.343651 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 09:27:18.346939 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 09:27:18.350561 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 09:27:18.357063 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 09:27:18.359884 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 09:27:18.363414 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 09:27:18.370186 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 09:27:18.373052 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 09:27:18.376552 [Byte 0] Lead/lag falling Transition (3, 6, 8)
1562 09:27:18.383393 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1563 09:27:18.386714 [Byte 0] Lead/lag Transition tap number (2)
1564 09:27:18.389580 [Byte 1] Lead/lag Transition tap number (1)
1565 09:27:18.392903 3 6 16 |605 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1566 09:27:18.399281 3 6 20 |3232 605 |(1 1)(11 11) |(0 0)(0 0)| 0
1567 09:27:18.402985 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1568 09:27:18.406443 [Byte 0]First pass (3, 6, 24)
1569 09:27:18.409163 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1570 09:27:18.413044 [Byte 1]First pass (3, 6, 28)
1571 09:27:18.416296 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1572 09:27:18.419474 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1573 09:27:18.422453 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 09:27:18.426061 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 09:27:18.432660 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 09:27:18.436189 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 09:27:18.439094 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 09:27:18.442678 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 09:27:18.449040 All bytes gating window > 1UI, Early break!
1580 09:27:18.449118
1581 09:27:18.451975 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
1582 09:27:18.452056
1583 09:27:18.455345 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1584 09:27:18.455423
1585 09:27:18.455500
1586 09:27:18.455591
1587 09:27:18.459087 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
1588 09:27:18.459164
1589 09:27:18.461785 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1590 09:27:18.465305
1591 09:27:18.465382
1592 09:27:18.465474 Write Rank1 MR1 =0x56
1593 09:27:18.465588
1594 09:27:18.468889 best RODT dly(2T, 0.5T) = (2, 3)
1595 09:27:18.468967
1596 09:27:18.471700 best RODT dly(2T, 0.5T) = (2, 3)
1597 09:27:18.471778 ==
1598 09:27:18.478880 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1599 09:27:18.482248 fsp= 1, odt_onoff= 1, Byte mode= 0
1600 09:27:18.482335 ==
1601 09:27:18.485065 Start DQ dly to find pass range UseTestEngine =0
1602 09:27:18.488553 x-axis: bit #, y-axis: DQ dly (-127~63)
1603 09:27:18.491913 RX Vref Scan = 0
1604 09:27:18.491992 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1605 09:27:18.495197 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1606 09:27:18.498042 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1607 09:27:18.501402 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1608 09:27:18.504948 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1609 09:27:18.507921 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1610 09:27:18.511545 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1611 09:27:18.515114 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1612 09:27:18.517859 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1613 09:27:18.517947 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1614 09:27:18.521352 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1615 09:27:18.524881 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1616 09:27:18.527605 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1617 09:27:18.530870 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1618 09:27:18.534319 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1619 09:27:18.537661 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1620 09:27:18.541235 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1621 09:27:18.544474 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1622 09:27:18.544579 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1623 09:27:18.547910 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1624 09:27:18.551188 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1625 09:27:18.554028 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1626 09:27:18.557686 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1627 09:27:18.560436 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1628 09:27:18.563799 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1629 09:27:18.567379 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1630 09:27:18.567459 0, [0] xxxoxxxx xxxxxxxx [MSB]
1631 09:27:18.570369 1, [0] xxxoxoox oxxoxxxx [MSB]
1632 09:27:18.573889 2, [0] xxxoxooo oxxoxxxx [MSB]
1633 09:27:18.577396 3, [0] xxxooooo ooxoxxxx [MSB]
1634 09:27:18.580722 4, [0] ooxooooo ooxoooxx [MSB]
1635 09:27:18.583557 5, [0] oooooooo ooxoooox [MSB]
1636 09:27:18.583635 6, [0] oooooooo ooxoooox [MSB]
1637 09:27:18.586996 7, [0] oooooooo ooxooooo [MSB]
1638 09:27:18.590471 8, [0] oooooooo ooxooooo [MSB]
1639 09:27:18.593315 9, [0] oooooooo ooxooooo [MSB]
1640 09:27:18.596859 32, [0] oooxoooo oooooooo [MSB]
1641 09:27:18.600218 33, [0] oooxoxoo oooooooo [MSB]
1642 09:27:18.603589 34, [0] oooxoxoo xooooooo [MSB]
1643 09:27:18.603664 35, [0] oooxoxoo xooxoooo [MSB]
1644 09:27:18.606872 36, [0] oooxoxoo xxoxxooo [MSB]
1645 09:27:18.610405 37, [0] oooxoxxx xxoxxxxo [MSB]
1646 09:27:18.613427 38, [0] xooxoxxx xxoxxxxo [MSB]
1647 09:27:18.616947 39, [0] xxoxoxxx xxoxxxxo [MSB]
1648 09:27:18.620321 40, [0] xxxxoxxx xxoxxxxo [MSB]
1649 09:27:18.623138 41, [0] xxxxxxxx xxoxxxxx [MSB]
1650 09:27:18.623216 42, [0] xxxxxxxx xxoxxxxx [MSB]
1651 09:27:18.626740 43, [0] xxxxxxxx xxxxxxxx [MSB]
1652 09:27:18.630166 iDelay=43, Bit 0, Center 20 (4 ~ 37) 34
1653 09:27:18.633198 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
1654 09:27:18.636823 iDelay=43, Bit 2, Center 22 (5 ~ 39) 35
1655 09:27:18.643230 iDelay=43, Bit 3, Center 15 (-1 ~ 31) 33
1656 09:27:18.646492 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1657 09:27:18.649712 iDelay=43, Bit 5, Center 16 (1 ~ 32) 32
1658 09:27:18.652777 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1659 09:27:18.656500 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1660 09:27:18.659922 iDelay=43, Bit 8, Center 17 (1 ~ 33) 33
1661 09:27:18.662784 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
1662 09:27:18.666361 iDelay=43, Bit 10, Center 26 (10 ~ 42) 33
1663 09:27:18.669677 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1664 09:27:18.673074 iDelay=43, Bit 12, Center 19 (4 ~ 35) 32
1665 09:27:18.675882 iDelay=43, Bit 13, Center 20 (4 ~ 36) 33
1666 09:27:18.679371 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
1667 09:27:18.686515 iDelay=43, Bit 15, Center 23 (7 ~ 40) 34
1668 09:27:18.686628 ==
1669 09:27:18.689081 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1670 09:27:18.692534 fsp= 1, odt_onoff= 1, Byte mode= 0
1671 09:27:18.692640 ==
1672 09:27:18.695948 DQS Delay:
1673 09:27:18.696043 DQS0 = 0, DQS1 = 0
1674 09:27:18.696178 DQM Delay:
1675 09:27:18.698971 DQM0 = 19, DQM1 = 20
1676 09:27:18.699068 DQ Delay:
1677 09:27:18.702436 DQ0 =20, DQ1 =21, DQ2 =22, DQ3 =15
1678 09:27:18.706012 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1679 09:27:18.708823 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17
1680 09:27:18.712291 DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23
1681 09:27:18.712392
1682 09:27:18.712479
1683 09:27:18.715641 DramC Write-DBI off
1684 09:27:18.715746 ==
1685 09:27:18.719121 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1686 09:27:18.722017 fsp= 1, odt_onoff= 1, Byte mode= 0
1687 09:27:18.725391 ==
1688 09:27:18.728924 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1689 09:27:18.728994
1690 09:27:18.731756 Begin, DQ Scan Range 918~1174
1691 09:27:18.731824
1692 09:27:18.731880
1693 09:27:18.731939 TX Vref Scan disable
1694 09:27:18.735445 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1695 09:27:18.738265 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1696 09:27:18.745390 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1697 09:27:18.748242 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1698 09:27:18.751762 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1699 09:27:18.754698 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1700 09:27:18.758041 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1701 09:27:18.761378 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1702 09:27:18.764678 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1703 09:27:18.768513 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1704 09:27:18.771899 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1705 09:27:18.774722 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1706 09:27:18.778156 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1707 09:27:18.781447 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1708 09:27:18.784865 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1709 09:27:18.788199 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1710 09:27:18.794367 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1711 09:27:18.797640 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1712 09:27:18.801147 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1713 09:27:18.804101 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1714 09:27:18.807774 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1715 09:27:18.810659 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1716 09:27:18.814223 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1717 09:27:18.817570 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1718 09:27:18.820981 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1719 09:27:18.823606 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1720 09:27:18.826881 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1721 09:27:18.830640 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1722 09:27:18.837339 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1723 09:27:18.840163 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1724 09:27:18.843727 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1725 09:27:18.846493 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1726 09:27:18.850097 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1727 09:27:18.853657 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1728 09:27:18.856618 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1729 09:27:18.860155 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1730 09:27:18.862986 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1731 09:27:18.866533 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1732 09:27:18.870033 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1733 09:27:18.872815 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1734 09:27:18.879339 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1735 09:27:18.882634 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1736 09:27:18.885971 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1737 09:27:18.889401 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1738 09:27:18.892636 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1739 09:27:18.895868 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1740 09:27:18.899349 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1741 09:27:18.920997 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1742 09:27:18.921303 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1743 09:27:18.921405 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1744 09:27:18.921493 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1745 09:27:18.921620 969 |3 6 9|[0] xxxxxxxx oxxoooxx [MSB]
1746 09:27:18.921703 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1747 09:27:18.922050 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1748 09:27:18.925555 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1749 09:27:18.929161 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1750 09:27:18.931970 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1751 09:27:18.938954 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1752 09:27:18.942201 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1753 09:27:18.945413 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1754 09:27:18.948541 978 |3 6 18|[0] xxxoxoox oooooooo [MSB]
1755 09:27:18.951719 979 |3 6 19|[0] xxxoxooo oooooooo [MSB]
1756 09:27:18.955491 980 |3 6 20|[0] xxxooooo oooooooo [MSB]
1757 09:27:18.958422 981 |3 6 21|[0] xoxooooo oooooooo [MSB]
1758 09:27:18.961938 982 |3 6 22|[0] xooooooo oooooooo [MSB]
1759 09:27:18.965443 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1760 09:27:18.968286 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1761 09:27:18.971667 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1762 09:27:18.975188 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1763 09:27:18.981379 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1764 09:27:18.984960 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1765 09:27:18.988368 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1766 09:27:18.991732 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1767 09:27:18.994457 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
1768 09:27:18.997819 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1769 09:27:19.001125 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1770 09:27:19.004529 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
1771 09:27:19.007862 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1772 09:27:19.011180 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1773 09:27:19.014501 Byte0, DQ PI dly=988, DQM PI dly= 988
1774 09:27:19.021084 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1775 09:27:19.021167
1776 09:27:19.024696 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1777 09:27:19.024771
1778 09:27:19.028260 Byte1, DQ PI dly=978, DQM PI dly= 978
1779 09:27:19.031305 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1780 09:27:19.031400
1781 09:27:19.037830 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1782 09:27:19.037911
1783 09:27:19.037978 ==
1784 09:27:19.041278 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1785 09:27:19.044153 fsp= 1, odt_onoff= 1, Byte mode= 0
1786 09:27:19.044234 ==
1787 09:27:19.050684 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1788 09:27:19.050809
1789 09:27:19.050902 Begin, DQ Scan Range 954~1018
1790 09:27:19.054269 Write Rank1 MR14 =0x0
1791 09:27:19.062826
1792 09:27:19.062998 CH=0, VrefRange= 0, VrefLevel = 0
1793 09:27:19.069830 TX Bit0 (984~997) 14 990, Bit8 (970~982) 13 976,
1794 09:27:19.072668 TX Bit1 (983~995) 13 989, Bit9 (973~982) 10 977,
1795 09:27:19.079863 TX Bit2 (984~996) 13 990, Bit10 (975~989) 15 982,
1796 09:27:19.082654 TX Bit3 (978~991) 14 984, Bit11 (971~981) 11 976,
1797 09:27:19.086016 TX Bit4 (983~996) 14 989, Bit12 (972~983) 12 977,
1798 09:27:19.092248 TX Bit5 (981~992) 12 986, Bit13 (972~984) 13 978,
1799 09:27:19.095735 TX Bit6 (980~993) 14 986, Bit14 (973~985) 13 979,
1800 09:27:19.102751 TX Bit7 (982~996) 15 989, Bit15 (975~987) 13 981,
1801 09:27:19.102848
1802 09:27:19.102941 Write Rank1 MR14 =0x2
1803 09:27:19.112217
1804 09:27:19.112288 CH=0, VrefRange= 0, VrefLevel = 2
1805 09:27:19.118397 TX Bit0 (984~998) 15 991, Bit8 (969~982) 14 975,
1806 09:27:19.121677 TX Bit1 (983~996) 14 989, Bit9 (972~983) 12 977,
1807 09:27:19.128363 TX Bit2 (984~998) 15 991, Bit10 (975~989) 15 982,
1808 09:27:19.131912 TX Bit3 (977~991) 15 984, Bit11 (971~981) 11 976,
1809 09:27:19.135309 TX Bit4 (983~996) 14 989, Bit12 (972~983) 12 977,
1810 09:27:19.141882 TX Bit5 (980~993) 14 986, Bit13 (972~984) 13 978,
1811 09:27:19.145185 TX Bit6 (979~994) 16 986, Bit14 (972~986) 15 979,
1812 09:27:19.148839 TX Bit7 (982~997) 16 989, Bit15 (975~988) 14 981,
1813 09:27:19.151668
1814 09:27:19.151757 Write Rank1 MR14 =0x4
1815 09:27:19.160923
1816 09:27:19.161046 CH=0, VrefRange= 0, VrefLevel = 4
1817 09:27:19.167740 TX Bit0 (984~998) 15 991, Bit8 (968~982) 15 975,
1818 09:27:19.171062 TX Bit1 (983~998) 16 990, Bit9 (972~983) 12 977,
1819 09:27:19.177819 TX Bit2 (984~998) 15 991, Bit10 (975~989) 15 982,
1820 09:27:19.180392 TX Bit3 (977~992) 16 984, Bit11 (971~982) 12 976,
1821 09:27:19.183910 TX Bit4 (983~997) 15 990, Bit12 (971~984) 14 977,
1822 09:27:19.190878 TX Bit5 (980~994) 15 987, Bit13 (971~985) 15 978,
1823 09:27:19.193798 TX Bit6 (979~995) 17 987, Bit14 (972~987) 16 979,
1824 09:27:19.200197 TX Bit7 (982~998) 17 990, Bit15 (974~988) 15 981,
1825 09:27:19.200329
1826 09:27:19.200401 Write Rank1 MR14 =0x6
1827 09:27:19.209924
1828 09:27:19.210043 CH=0, VrefRange= 0, VrefLevel = 6
1829 09:27:19.216846 TX Bit0 (984~999) 16 991, Bit8 (969~983) 15 976,
1830 09:27:19.219516 TX Bit1 (982~998) 17 990, Bit9 (972~983) 12 977,
1831 09:27:19.226361 TX Bit2 (984~999) 16 991, Bit10 (975~990) 16 982,
1832 09:27:19.229455 TX Bit3 (977~992) 16 984, Bit11 (970~983) 14 976,
1833 09:27:19.232903 TX Bit4 (982~998) 17 990, Bit12 (971~984) 14 977,
1834 09:27:19.239746 TX Bit5 (979~995) 17 987, Bit13 (971~986) 16 978,
1835 09:27:19.243354 TX Bit6 (979~995) 17 987, Bit14 (972~988) 17 980,
1836 09:27:19.246534 TX Bit7 (981~999) 19 990, Bit15 (974~989) 16 981,
1837 09:27:19.249325
1838 09:27:19.249458 Write Rank1 MR14 =0x8
1839 09:27:19.259200
1840 09:27:19.259341 CH=0, VrefRange= 0, VrefLevel = 8
1841 09:27:19.265508 TX Bit0 (984~999) 16 991, Bit8 (968~983) 16 975,
1842 09:27:19.269067 TX Bit1 (982~999) 18 990, Bit9 (971~985) 15 978,
1843 09:27:19.275456 TX Bit2 (983~999) 17 991, Bit10 (974~990) 17 982,
1844 09:27:19.278984 TX Bit3 (977~992) 16 984, Bit11 (970~983) 14 976,
1845 09:27:19.281882 TX Bit4 (981~998) 18 989, Bit12 (971~986) 16 978,
1846 09:27:19.288824 TX Bit5 (978~996) 19 987, Bit13 (971~987) 17 979,
1847 09:27:19.292156 TX Bit6 (978~997) 20 987, Bit14 (972~989) 18 980,
1848 09:27:19.298438 TX Bit7 (981~999) 19 990, Bit15 (974~989) 16 981,
1849 09:27:19.298548
1850 09:27:19.298643 Write Rank1 MR14 =0xa
1851 09:27:19.308495
1852 09:27:19.311839 CH=0, VrefRange= 0, VrefLevel = 10
1853 09:27:19.314612 TX Bit0 (983~999) 17 991, Bit8 (967~984) 18 975,
1854 09:27:19.318148 TX Bit1 (982~999) 18 990, Bit9 (970~985) 16 977,
1855 09:27:19.324962 TX Bit2 (983~1000) 18 991, Bit10 (974~991) 18 982,
1856 09:27:19.327811 TX Bit3 (977~993) 17 985, Bit11 (968~983) 16 975,
1857 09:27:19.331222 TX Bit4 (982~999) 18 990, Bit12 (970~986) 17 978,
1858 09:27:19.338065 TX Bit5 (978~997) 20 987, Bit13 (970~988) 19 979,
1859 09:27:19.341362 TX Bit6 (978~998) 21 988, Bit14 (971~989) 19 980,
1860 09:27:19.348100 TX Bit7 (980~999) 20 989, Bit15 (974~990) 17 982,
1861 09:27:19.348181
1862 09:27:19.348241 Write Rank1 MR14 =0xc
1863 09:27:19.357799
1864 09:27:19.361451 CH=0, VrefRange= 0, VrefLevel = 12
1865 09:27:19.364223 TX Bit0 (983~1000) 18 991, Bit8 (967~984) 18 975,
1866 09:27:19.367898 TX Bit1 (981~1000) 20 990, Bit9 (970~986) 17 978,
1867 09:27:19.374228 TX Bit2 (982~1000) 19 991, Bit10 (974~992) 19 983,
1868 09:27:19.377611 TX Bit3 (976~994) 19 985, Bit11 (968~984) 17 976,
1869 09:27:19.381108 TX Bit4 (981~999) 19 990, Bit12 (970~988) 19 979,
1870 09:27:19.387600 TX Bit5 (978~997) 20 987, Bit13 (970~988) 19 979,
1871 09:27:19.390501 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
1872 09:27:19.396918 TX Bit7 (980~1000) 21 990, Bit15 (974~990) 17 982,
1873 09:27:19.397030
1874 09:27:19.397125 Write Rank1 MR14 =0xe
1875 09:27:19.407554
1876 09:27:19.410949 CH=0, VrefRange= 0, VrefLevel = 14
1877 09:27:19.414427 TX Bit0 (983~1001) 19 992, Bit8 (967~985) 19 976,
1878 09:27:19.417052 TX Bit1 (980~1000) 21 990, Bit9 (969~987) 19 978,
1879 09:27:19.424053 TX Bit2 (982~1001) 20 991, Bit10 (974~992) 19 983,
1880 09:27:19.426961 TX Bit3 (976~994) 19 985, Bit11 (968~985) 18 976,
1881 09:27:19.430375 TX Bit4 (980~999) 20 989, Bit12 (969~988) 20 978,
1882 09:27:19.437529 TX Bit5 (978~998) 21 988, Bit13 (969~989) 21 979,
1883 09:27:19.440473 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
1884 09:27:19.447164 TX Bit7 (979~1000) 22 989, Bit15 (973~990) 18 981,
1885 09:27:19.447241
1886 09:27:19.447308 Write Rank1 MR14 =0x10
1887 09:27:19.457176
1888 09:27:19.461275 CH=0, VrefRange= 0, VrefLevel = 16
1889 09:27:19.463840 TX Bit0 (982~1001) 20 991, Bit8 (967~986) 20 976,
1890 09:27:19.467118 TX Bit1 (980~1000) 21 990, Bit9 (970~987) 18 978,
1891 09:27:19.474131 TX Bit2 (982~1001) 20 991, Bit10 (974~993) 20 983,
1892 09:27:19.477025 TX Bit3 (976~995) 20 985, Bit11 (967~986) 20 976,
1893 09:27:19.484032 TX Bit4 (980~1000) 21 990, Bit12 (969~989) 21 979,
1894 09:27:19.486917 TX Bit5 (977~998) 22 987, Bit13 (969~989) 21 979,
1895 09:27:19.490482 TX Bit6 (978~999) 22 988, Bit14 (970~990) 21 980,
1896 09:27:19.496834 TX Bit7 (979~1001) 23 990, Bit15 (974~991) 18 982,
1897 09:27:19.496908
1898 09:27:19.496973 Write Rank1 MR14 =0x12
1899 09:27:19.507528
1900 09:27:19.510819 CH=0, VrefRange= 0, VrefLevel = 18
1901 09:27:19.514096 TX Bit0 (982~1001) 20 991, Bit8 (966~986) 21 976,
1902 09:27:19.517442 TX Bit1 (980~1001) 22 990, Bit9 (968~988) 21 978,
1903 09:27:19.523858 TX Bit2 (982~1001) 20 991, Bit10 (974~994) 21 984,
1904 09:27:19.526939 TX Bit3 (976~995) 20 985, Bit11 (967~986) 20 976,
1905 09:27:19.533482 TX Bit4 (979~1000) 22 989, Bit12 (968~989) 22 978,
1906 09:27:19.537034 TX Bit5 (977~998) 22 987, Bit13 (968~989) 22 978,
1907 09:27:19.540491 TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980,
1908 09:27:19.546966 TX Bit7 (979~1001) 23 990, Bit15 (972~992) 21 982,
1909 09:27:19.547050
1910 09:27:19.547117 Write Rank1 MR14 =0x14
1911 09:27:19.557820
1912 09:27:19.561270 CH=0, VrefRange= 0, VrefLevel = 20
1913 09:27:19.564422 TX Bit0 (982~1002) 21 992, Bit8 (966~988) 23 977,
1914 09:27:19.567605 TX Bit1 (980~1001) 22 990, Bit9 (968~988) 21 978,
1915 09:27:19.574289 TX Bit2 (981~1002) 22 991, Bit10 (973~994) 22 983,
1916 09:27:19.577383 TX Bit3 (976~996) 21 986, Bit11 (967~988) 22 977,
1917 09:27:19.580919 TX Bit4 (979~1001) 23 990, Bit12 (968~989) 22 978,
1918 09:27:19.587659 TX Bit5 (977~999) 23 988, Bit13 (968~990) 23 979,
1919 09:27:19.590387 TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980,
1920 09:27:19.597634 TX Bit7 (978~1001) 24 989, Bit15 (973~993) 21 983,
1921 09:27:19.597713
1922 09:27:19.597820 Write Rank1 MR14 =0x16
1923 09:27:19.608045
1924 09:27:19.611700 CH=0, VrefRange= 0, VrefLevel = 22
1925 09:27:19.614593 TX Bit0 (982~1002) 21 992, Bit8 (966~988) 23 977,
1926 09:27:19.617940 TX Bit1 (980~1001) 22 990, Bit9 (968~988) 21 978,
1927 09:27:19.624968 TX Bit2 (981~1002) 22 991, Bit10 (973~994) 22 983,
1928 09:27:19.627769 TX Bit3 (976~996) 21 986, Bit11 (967~988) 22 977,
1929 09:27:19.631368 TX Bit4 (979~1001) 23 990, Bit12 (968~989) 22 978,
1930 09:27:19.637884 TX Bit5 (977~999) 23 988, Bit13 (968~990) 23 979,
1931 09:27:19.641161 TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980,
1932 09:27:19.647418 TX Bit7 (978~1001) 24 989, Bit15 (973~993) 21 983,
1933 09:27:19.647516
1934 09:27:19.647613 Write Rank1 MR14 =0x18
1935 09:27:19.658763
1936 09:27:19.661709 CH=0, VrefRange= 0, VrefLevel = 24
1937 09:27:19.665262 TX Bit0 (981~1004) 24 992, Bit8 (966~988) 23 977,
1938 09:27:19.668743 TX Bit1 (979~1002) 24 990, Bit9 (968~989) 22 978,
1939 09:27:19.675567 TX Bit2 (980~1002) 23 991, Bit10 (973~995) 23 984,
1940 09:27:19.679018 TX Bit3 (975~998) 24 986, Bit11 (966~988) 23 977,
1941 09:27:19.681901 TX Bit4 (979~1002) 24 990, Bit12 (967~990) 24 978,
1942 09:27:19.688724 TX Bit5 (977~999) 23 988, Bit13 (967~990) 24 978,
1943 09:27:19.691933 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
1944 09:27:19.698277 TX Bit7 (978~1003) 26 990, Bit15 (973~994) 22 983,
1945 09:27:19.698377
1946 09:27:19.698438 Write Rank1 MR14 =0x1a
1947 09:27:19.709016
1948 09:27:19.712379 CH=0, VrefRange= 0, VrefLevel = 26
1949 09:27:19.715984 TX Bit0 (981~1004) 24 992, Bit8 (965~988) 24 976,
1950 09:27:19.718893 TX Bit1 (979~1003) 25 991, Bit9 (968~989) 22 978,
1951 09:27:19.725896 TX Bit2 (980~1004) 25 992, Bit10 (972~995) 24 983,
1952 09:27:19.729418 TX Bit3 (975~998) 24 986, Bit11 (966~989) 24 977,
1953 09:27:19.732165 TX Bit4 (978~1003) 26 990, Bit12 (967~990) 24 978,
1954 09:27:19.738676 TX Bit5 (977~1000) 24 988, Bit13 (967~990) 24 978,
1955 09:27:19.742143 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
1956 09:27:19.748424 TX Bit7 (978~1003) 26 990, Bit15 (972~994) 23 983,
1957 09:27:19.748505
1958 09:27:19.748565 Write Rank1 MR14 =0x1c
1959 09:27:19.760047
1960 09:27:19.760122 CH=0, VrefRange= 0, VrefLevel = 28
1961 09:27:19.766986 TX Bit0 (981~1005) 25 993, Bit8 (965~988) 24 976,
1962 09:27:19.769930 TX Bit1 (979~1003) 25 991, Bit9 (967~989) 23 978,
1963 09:27:19.776828 TX Bit2 (980~1004) 25 992, Bit10 (972~996) 25 984,
1964 09:27:19.779683 TX Bit3 (975~998) 24 986, Bit11 (966~989) 24 977,
1965 09:27:19.783095 TX Bit4 (978~1002) 25 990, Bit12 (968~990) 23 979,
1966 09:27:19.789751 TX Bit5 (976~1000) 25 988, Bit13 (967~989) 23 978,
1967 09:27:19.793122 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
1968 09:27:19.799999 TX Bit7 (978~1003) 26 990, Bit15 (971~994) 24 982,
1969 09:27:19.800101
1970 09:27:19.800197 Write Rank1 MR14 =0x1e
1971 09:27:19.811165
1972 09:27:19.814333 CH=0, VrefRange= 0, VrefLevel = 30
1973 09:27:19.817460 TX Bit0 (981~1005) 25 993, Bit8 (965~988) 24 976,
1974 09:27:19.820562 TX Bit1 (979~1003) 25 991, Bit9 (967~989) 23 978,
1975 09:27:19.827300 TX Bit2 (980~1004) 25 992, Bit10 (972~996) 25 984,
1976 09:27:19.830611 TX Bit3 (975~998) 24 986, Bit11 (966~989) 24 977,
1977 09:27:19.837477 TX Bit4 (978~1002) 25 990, Bit12 (968~990) 23 979,
1978 09:27:19.840315 TX Bit5 (976~1000) 25 988, Bit13 (967~989) 23 978,
1979 09:27:19.843934 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
1980 09:27:19.850761 TX Bit7 (978~1003) 26 990, Bit15 (971~994) 24 982,
1981 09:27:19.850857
1982 09:27:19.850919 Write Rank1 MR14 =0x20
1983 09:27:19.861480
1984 09:27:19.864733 CH=0, VrefRange= 0, VrefLevel = 32
1985 09:27:19.868514 TX Bit0 (981~1005) 25 993, Bit8 (965~988) 24 976,
1986 09:27:19.871659 TX Bit1 (979~1003) 25 991, Bit9 (967~989) 23 978,
1987 09:27:19.878145 TX Bit2 (980~1004) 25 992, Bit10 (972~996) 25 984,
1988 09:27:19.881637 TX Bit3 (975~998) 24 986, Bit11 (966~989) 24 977,
1989 09:27:19.884444 TX Bit4 (978~1002) 25 990, Bit12 (968~990) 23 979,
1990 09:27:19.891397 TX Bit5 (976~1000) 25 988, Bit13 (967~989) 23 978,
1991 09:27:19.894868 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
1992 09:27:19.901276 TX Bit7 (978~1003) 26 990, Bit15 (971~994) 24 982,
1993 09:27:19.901381
1994 09:27:19.901477 Write Rank1 MR14 =0x22
1995 09:27:19.912395
1996 09:27:19.916037 CH=0, VrefRange= 0, VrefLevel = 34
1997 09:27:19.919015 TX Bit0 (981~1005) 25 993, Bit8 (965~988) 24 976,
1998 09:27:19.922423 TX Bit1 (979~1003) 25 991, Bit9 (967~989) 23 978,
1999 09:27:19.928931 TX Bit2 (980~1004) 25 992, Bit10 (972~996) 25 984,
2000 09:27:19.932682 TX Bit3 (975~998) 24 986, Bit11 (966~989) 24 977,
2001 09:27:19.938462 TX Bit4 (978~1002) 25 990, Bit12 (968~990) 23 979,
2002 09:27:19.941757 TX Bit5 (976~1000) 25 988, Bit13 (967~989) 23 978,
2003 09:27:19.945397 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
2004 09:27:19.951450 TX Bit7 (978~1003) 26 990, Bit15 (971~994) 24 982,
2005 09:27:19.951558
2006 09:27:19.951649
2007 09:27:19.954986 TX Vref found, early break! 364< 369
2008 09:27:19.958483 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2009 09:27:19.961501 u1DelayCellOfst[0]=9 cells (7 PI)
2010 09:27:19.965011 u1DelayCellOfst[1]=6 cells (5 PI)
2011 09:27:19.968503 u1DelayCellOfst[2]=7 cells (6 PI)
2012 09:27:19.971509 u1DelayCellOfst[3]=0 cells (0 PI)
2013 09:27:19.975060 u1DelayCellOfst[4]=5 cells (4 PI)
2014 09:27:19.978521 u1DelayCellOfst[5]=2 cells (2 PI)
2015 09:27:19.981152 u1DelayCellOfst[6]=2 cells (2 PI)
2016 09:27:19.984939 u1DelayCellOfst[7]=5 cells (4 PI)
2017 09:27:19.988078 Byte0, DQ PI dly=986, DQM PI dly= 989
2018 09:27:19.991156 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2019 09:27:19.991226
2020 09:27:19.994808 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2021 09:27:19.994879
2022 09:27:19.998003 u1DelayCellOfst[8]=0 cells (0 PI)
2023 09:27:20.001453 u1DelayCellOfst[9]=2 cells (2 PI)
2024 09:27:20.004972 u1DelayCellOfst[10]=10 cells (8 PI)
2025 09:27:20.007846 u1DelayCellOfst[11]=1 cells (1 PI)
2026 09:27:20.011463 u1DelayCellOfst[12]=3 cells (3 PI)
2027 09:27:20.014893 u1DelayCellOfst[13]=2 cells (2 PI)
2028 09:27:20.017686 u1DelayCellOfst[14]=3 cells (3 PI)
2029 09:27:20.021196 u1DelayCellOfst[15]=7 cells (6 PI)
2030 09:27:20.024773 Byte1, DQ PI dly=976, DQM PI dly= 980
2031 09:27:20.027647 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2032 09:27:20.027742
2033 09:27:20.034607 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2034 09:27:20.034689
2035 09:27:20.034750 Write Rank1 MR14 =0x1c
2036 09:27:20.034806
2037 09:27:20.037401 Final TX Range 0 Vref 28
2038 09:27:20.037497
2039 09:27:20.044343 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2040 09:27:20.044440
2041 09:27:20.050749 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2042 09:27:20.057251 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2043 09:27:20.064077 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2044 09:27:20.067312 Write Rank1 MR3 =0xb0
2045 09:27:20.067455 DramC Write-DBI on
2046 09:27:20.067545 ==
2047 09:27:20.073886 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2048 09:27:20.077402 fsp= 1, odt_onoff= 1, Byte mode= 0
2049 09:27:20.077531 ==
2050 09:27:20.080331 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2051 09:27:20.080449
2052 09:27:20.083914 Begin, DQ Scan Range 700~764
2053 09:27:20.084038
2054 09:27:20.084128
2055 09:27:20.087449 TX Vref Scan disable
2056 09:27:20.090207 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2057 09:27:20.093789 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2058 09:27:20.097248 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2059 09:27:20.100467 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2060 09:27:20.103710 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2061 09:27:20.106852 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2062 09:27:20.109897 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2063 09:27:20.113494 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2064 09:27:20.116863 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2065 09:27:20.120370 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2066 09:27:20.123762 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2067 09:27:20.127162 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2068 09:27:20.130038 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2069 09:27:20.136414 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2070 09:27:20.139820 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2071 09:27:20.143228 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2072 09:27:20.146666 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2073 09:27:20.149474 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2074 09:27:20.152998 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2075 09:27:20.156517 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2076 09:27:20.160000 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2077 09:27:20.163476 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2078 09:27:20.170645 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2079 09:27:20.173936 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2080 09:27:20.176597 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2081 09:27:20.180097 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2082 09:27:20.183722 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2083 09:27:20.187167 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2084 09:27:20.189968 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2085 09:27:20.193500 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2086 09:27:20.196962 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2087 09:27:20.199712 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2088 09:27:20.203325 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2089 09:27:20.206361 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2090 09:27:20.210038 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2091 09:27:20.216205 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2092 09:27:20.219562 749 |2 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
2093 09:27:20.222846 Byte0, DQ PI dly=735, DQM PI dly= 735
2094 09:27:20.226485 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
2095 09:27:20.226589
2096 09:27:20.229459 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
2097 09:27:20.229564
2098 09:27:20.233145 Byte1, DQ PI dly=722, DQM PI dly= 722
2099 09:27:20.239743 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2100 09:27:20.239843
2101 09:27:20.243310 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2102 09:27:20.243406
2103 09:27:20.249751 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2104 09:27:20.256359 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2105 09:27:20.262650 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2106 09:27:20.266230 Write Rank1 MR3 =0x30
2107 09:27:20.266302 DramC Write-DBI off
2108 09:27:20.266361
2109 09:27:20.269728 [DATLAT]
2110 09:27:20.272637 Freq=1600, CH0 RK1, use_rxtx_scan=0
2111 09:27:20.272734
2112 09:27:20.272818 DATLAT Default: 0x10
2113 09:27:20.276202 7, 0xFFFF, sum=0
2114 09:27:20.276318 8, 0xFFFF, sum=0
2115 09:27:20.278881 9, 0xFFFF, sum=0
2116 09:27:20.278988 10, 0xFFFF, sum=0
2117 09:27:20.282234 11, 0xFFFF, sum=0
2118 09:27:20.282314 12, 0xFFFF, sum=0
2119 09:27:20.285646 13, 0xFFFF, sum=0
2120 09:27:20.285747 14, 0x0, sum=1
2121 09:27:20.288865 15, 0x0, sum=2
2122 09:27:20.288939 16, 0x0, sum=3
2123 09:27:20.288998 17, 0x0, sum=4
2124 09:27:20.295848 pattern=2 first_step=14 total pass=5 best_step=16
2125 09:27:20.295932 ==
2126 09:27:20.298762 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2127 09:27:20.302269 fsp= 1, odt_onoff= 1, Byte mode= 0
2128 09:27:20.302374 ==
2129 09:27:20.308453 Start DQ dly to find pass range UseTestEngine =1
2130 09:27:20.312053 x-axis: bit #, y-axis: DQ dly (-127~63)
2131 09:27:20.312156 RX Vref Scan = 0
2132 09:27:20.315462 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2133 09:27:20.318433 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2134 09:27:20.321938 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2135 09:27:20.325501 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2136 09:27:20.328353 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2137 09:27:20.331881 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2138 09:27:20.331981 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2139 09:27:20.335148 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2140 09:27:20.338630 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2141 09:27:20.341312 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2142 09:27:20.344643 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2143 09:27:20.348269 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2144 09:27:20.351262 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2145 09:27:20.354389 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2146 09:27:20.357944 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2147 09:27:20.361129 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2148 09:27:20.361270 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2149 09:27:20.364499 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2150 09:27:20.368096 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2151 09:27:20.371023 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2152 09:27:20.374599 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2153 09:27:20.378232 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2154 09:27:20.381052 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2155 09:27:20.381161 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2156 09:27:20.384621 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2157 09:27:20.387406 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2158 09:27:20.390719 0, [0] xxxoxoxx oxxoxxxx [MSB]
2159 09:27:20.394111 1, [0] xxxoxoox oxxoxxxx [MSB]
2160 09:27:20.397428 2, [0] xxxoxoox ooxoxxxx [MSB]
2161 09:27:20.397535 3, [0] xxxoxoox ooxoooxx [MSB]
2162 09:27:20.400886 4, [0] xoxoxoox ooxoooxx [MSB]
2163 09:27:20.404418 5, [0] oooooooo ooxoooox [MSB]
2164 09:27:20.407192 6, [0] oooooooo ooxooooo [MSB]
2165 09:27:20.410764 7, [0] oooooooo ooxooooo [MSB]
2166 09:27:20.414249 8, [0] oooooooo ooxooooo [MSB]
2167 09:27:20.417106 32, [0] oooxoooo oooooooo [MSB]
2168 09:27:20.420790 33, [0] oooxoxoo oooooooo [MSB]
2169 09:27:20.423637 34, [0] oooxoxoo xooxoooo [MSB]
2170 09:27:20.427100 35, [0] oooxoxoo xooxoooo [MSB]
2171 09:27:20.430729 36, [0] oooxoxxo xxoxoooo [MSB]
2172 09:27:20.430844 37, [0] oooxoxxx xxoxxxoo [MSB]
2173 09:27:20.433508 38, [0] oooxoxxx xxoxxxxo [MSB]
2174 09:27:20.437123 39, [0] xooxxxxx xxoxxxxo [MSB]
2175 09:27:20.440434 40, [0] xxoxxxxx xxoxxxxo [MSB]
2176 09:27:20.443925 41, [0] xxxxxxxx xxoxxxxx [MSB]
2177 09:27:20.446804 42, [0] xxxxxxxx xxoxxxxx [MSB]
2178 09:27:20.450311 43, [0] xxxxxxxx xxxxxxxx [MSB]
2179 09:27:20.453864 iDelay=43, Bit 0, Center 21 (5 ~ 38) 34
2180 09:27:20.456721 iDelay=43, Bit 1, Center 21 (4 ~ 39) 36
2181 09:27:20.460039 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
2182 09:27:20.463390 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
2183 09:27:20.466696 iDelay=43, Bit 4, Center 21 (5 ~ 38) 34
2184 09:27:20.470393 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
2185 09:27:20.473686 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2186 09:27:20.476946 iDelay=43, Bit 7, Center 20 (5 ~ 36) 32
2187 09:27:20.479988 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
2188 09:27:20.483749 iDelay=43, Bit 9, Center 18 (2 ~ 35) 34
2189 09:27:20.486971 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2190 09:27:20.489935 iDelay=43, Bit 11, Center 16 (0 ~ 33) 34
2191 09:27:20.496471 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2192 09:27:20.500359 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2193 09:27:20.503651 iDelay=43, Bit 14, Center 21 (5 ~ 37) 33
2194 09:27:20.506926 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2195 09:27:20.507042 ==
2196 09:27:20.510344 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2197 09:27:20.513630 fsp= 1, odt_onoff= 1, Byte mode= 0
2198 09:27:20.513726 ==
2199 09:27:20.516934 DQS Delay:
2200 09:27:20.517039 DQS0 = 0, DQS1 = 0
2201 09:27:20.520515 DQM Delay:
2202 09:27:20.520594 DQM0 = 19, DQM1 = 19
2203 09:27:20.520657 DQ Delay:
2204 09:27:20.523247 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2205 09:27:20.526984 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =20
2206 09:27:20.529941 DQ8 =16, DQ9 =18, DQ10 =25, DQ11 =16
2207 09:27:20.533498 DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23
2208 09:27:20.533618
2209 09:27:20.533706
2210 09:27:20.533795
2211 09:27:20.536488 [DramC_TX_OE_Calibration] TA2
2212 09:27:20.539971 Original DQ_B0 (3 6) =30, OEN = 27
2213 09:27:20.543553 Original DQ_B1 (3 6) =30, OEN = 27
2214 09:27:20.546949 23, 0x0, End_B0=23 End_B1=23
2215 09:27:20.549730 24, 0x0, End_B0=24 End_B1=24
2216 09:27:20.549828 25, 0x0, End_B0=25 End_B1=25
2217 09:27:20.553377 26, 0x0, End_B0=26 End_B1=26
2218 09:27:20.556887 27, 0x0, End_B0=27 End_B1=27
2219 09:27:20.559810 28, 0x0, End_B0=28 End_B1=28
2220 09:27:20.563199 29, 0x0, End_B0=29 End_B1=29
2221 09:27:20.563303 30, 0x0, End_B0=30 End_B1=30
2222 09:27:20.566642 31, 0xFFFF, End_B0=30 End_B1=30
2223 09:27:20.572942 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2224 09:27:20.579757 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2225 09:27:20.579858
2226 09:27:20.579949
2227 09:27:20.580034 Write Rank1 MR23 =0x3f
2228 09:27:20.583112 [DQSOSC]
2229 09:27:20.589363 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps
2230 09:27:20.596326 CH0_RK1: MR19=0x202, MR18=0xB2B2, DQSOSC=456, MR23=63, INC=11, DEC=17
2231 09:27:20.599142 Write Rank1 MR23 =0x3f
2232 09:27:20.599235 [DQSOSC]
2233 09:27:20.606297 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
2234 09:27:20.609297 CH0 RK1: MR19=202, MR18=B0B0
2235 09:27:20.612632 [RxdqsGatingPostProcess] freq 1600
2236 09:27:20.619046 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2237 09:27:20.619154 Rank: 0
2238 09:27:20.622748 best DQS0 dly(2T, 0.5T) = (2, 6)
2239 09:27:20.626188 best DQS1 dly(2T, 0.5T) = (2, 6)
2240 09:27:20.628950 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2241 09:27:20.632682 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2242 09:27:20.632786 Rank: 1
2243 09:27:20.635659 best DQS0 dly(2T, 0.5T) = (2, 6)
2244 09:27:20.639052 best DQS1 dly(2T, 0.5T) = (2, 6)
2245 09:27:20.642665 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2246 09:27:20.645570 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2247 09:27:20.648592 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2248 09:27:20.652148 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2249 09:27:20.655663 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2250 09:27:20.658441 Write Rank0 MR13 =0x59
2251 09:27:20.658541 ==
2252 09:27:20.665598 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2253 09:27:20.668465 fsp= 1, odt_onoff= 1, Byte mode= 0
2254 09:27:20.668590 ==
2255 09:27:20.671913 === u2Vref_new: 0x56 --> 0x3a
2256 09:27:20.675398 === u2Vref_new: 0x58 --> 0x58
2257 09:27:20.675495 === u2Vref_new: 0x5a --> 0x5a
2258 09:27:20.678949 === u2Vref_new: 0x5c --> 0x78
2259 09:27:20.681835 === u2Vref_new: 0x5e --> 0x7a
2260 09:27:20.685207 === u2Vref_new: 0x60 --> 0x90
2261 09:27:20.688748 [CA 0] Center 37 (12~63) winsize 52
2262 09:27:20.692188 [CA 1] Center 36 (10~63) winsize 54
2263 09:27:20.694954 [CA 2] Center 34 (6~63) winsize 58
2264 09:27:20.698453 [CA 3] Center 35 (7~63) winsize 57
2265 09:27:20.701995 [CA 4] Center 34 (5~63) winsize 59
2266 09:27:20.704976 [CA 5] Center 28 (0~57) winsize 58
2267 09:27:20.705075
2268 09:27:20.708551 [CATrainingPosCal] consider 1 rank data
2269 09:27:20.711881 u2DelayCellTimex100 = 753/100 ps
2270 09:27:20.715213 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2271 09:27:20.718641 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2272 09:27:20.721792 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2273 09:27:20.728011 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2274 09:27:20.731320 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2275 09:27:20.734911 CA5 delay=28 (0~57),Diff = 0 PI (0 cell)
2276 09:27:20.735010
2277 09:27:20.738307 CA PerBit enable=1, Macro0, CA PI delay=28
2278 09:27:20.741007 === u2Vref_new: 0x5e --> 0x7a
2279 09:27:20.741102
2280 09:27:20.741197 Vref(ca) range 1: 30
2281 09:27:20.741280
2282 09:27:20.744375 CS Dly= 10 (41-0-32)
2283 09:27:20.747827 Write Rank0 MR13 =0xd8
2284 09:27:20.747928 Write Rank0 MR13 =0xd8
2285 09:27:20.751066 Write Rank0 MR12 =0x5e
2286 09:27:20.754440 Write Rank1 MR13 =0x59
2287 09:27:20.754540 ==
2288 09:27:20.758128 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2289 09:27:20.761196 fsp= 1, odt_onoff= 1, Byte mode= 0
2290 09:27:20.761293 ==
2291 09:27:20.764754 === u2Vref_new: 0x56 --> 0x3a
2292 09:27:20.767737 === u2Vref_new: 0x58 --> 0x58
2293 09:27:20.771255 === u2Vref_new: 0x5a --> 0x5a
2294 09:27:20.774759 === u2Vref_new: 0x5c --> 0x78
2295 09:27:20.777767 === u2Vref_new: 0x5e --> 0x7a
2296 09:27:20.781228 === u2Vref_new: 0x60 --> 0x90
2297 09:27:20.784200 [CA 0] Center 37 (11~63) winsize 53
2298 09:27:20.787778 [CA 1] Center 37 (11~63) winsize 53
2299 09:27:20.791047 [CA 2] Center 34 (6~63) winsize 58
2300 09:27:20.794283 [CA 3] Center 34 (6~63) winsize 58
2301 09:27:20.797113 [CA 4] Center 34 (5~63) winsize 59
2302 09:27:20.797218 [CA 5] Center 27 (-1~56) winsize 58
2303 09:27:20.800599
2304 09:27:20.804104 [CATrainingPosCal] consider 2 rank data
2305 09:27:20.807025 u2DelayCellTimex100 = 753/100 ps
2306 09:27:20.810653 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2307 09:27:20.813590 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2308 09:27:20.817190 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2309 09:27:20.820672 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2310 09:27:20.823415 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2311 09:27:20.826760 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2312 09:27:20.826894
2313 09:27:20.830112 CA PerBit enable=1, Macro0, CA PI delay=28
2314 09:27:20.833204 === u2Vref_new: 0x5c --> 0x78
2315 09:27:20.833302
2316 09:27:20.836479 Vref(ca) range 1: 28
2317 09:27:20.836573
2318 09:27:20.839680 CS Dly= 9 (40-0-32)
2319 09:27:20.839771 Write Rank1 MR13 =0xd8
2320 09:27:20.842940 Write Rank1 MR13 =0xd8
2321 09:27:20.843015 Write Rank1 MR12 =0x5c
2322 09:27:20.849542 [RankSwap] Rank num 2, (Multi 1), Rank 0
2323 09:27:20.849649 Write Rank0 MR2 =0xad
2324 09:27:20.853020 [Write Leveling]
2325 09:27:20.856404 delay byte0 byte1 byte2 byte3
2326 09:27:20.856502
2327 09:27:20.856585 10 0 0
2328 09:27:20.856675 11 0 0
2329 09:27:20.859906 12 0 0
2330 09:27:20.860004 13 0 0
2331 09:27:20.862808 14 0 0
2332 09:27:20.862886 15 0 0
2333 09:27:20.866323 16 0 0
2334 09:27:20.866401 17 0 0
2335 09:27:20.866461 18 0 0
2336 09:27:20.869688 19 0 0
2337 09:27:20.869766 20 0 0
2338 09:27:20.872944 21 0 0
2339 09:27:20.873022 22 0 0
2340 09:27:20.873081 23 0 0
2341 09:27:20.875849 24 0 0
2342 09:27:20.875927 25 0 0
2343 09:27:20.879217 26 0 0
2344 09:27:20.879320 27 0 0
2345 09:27:20.882813 28 0 0
2346 09:27:20.882890 29 0 0
2347 09:27:20.882950 30 0 0
2348 09:27:20.885795 31 0 0
2349 09:27:20.885873 32 0 0
2350 09:27:20.889326 33 0 ff
2351 09:27:20.889431 34 ff ff
2352 09:27:20.892978 35 0 ff
2353 09:27:20.893057 36 ff ff
2354 09:27:20.895705 37 ff ff
2355 09:27:20.895784 38 ff ff
2356 09:27:20.895845 39 ff ff
2357 09:27:20.899161 40 ff ff
2358 09:27:20.899267 41 ff ff
2359 09:27:20.902229 42 ff ff
2360 09:27:20.905790 pass bytecount = 0xff (0xff: all bytes pass)
2361 09:27:20.905895
2362 09:27:20.908821 DQS0 dly: 36
2363 09:27:20.908918 DQS1 dly: 33
2364 09:27:20.912303 Write Rank0 MR2 =0x2d
2365 09:27:20.916019 [RankSwap] Rank num 2, (Multi 1), Rank 0
2366 09:27:20.916116 Write Rank0 MR1 =0xd6
2367 09:27:20.916203 [Gating]
2368 09:27:20.918792 ==
2369 09:27:20.922360 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2370 09:27:20.925208 fsp= 1, odt_onoff= 1, Byte mode= 0
2371 09:27:20.925299 ==
2372 09:27:20.928738 3 1 0 |2c2b 404 |(11 11)(11 11) |(1 1)(0 0)| 0
2373 09:27:20.934924 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2374 09:27:20.938465 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2375 09:27:20.941755 3 1 12 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2376 09:27:20.948315 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2377 09:27:20.951499 [Byte 0] Lead/lag falling Transition (3, 1, 16)
2378 09:27:20.954701 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2379 09:27:20.961094 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2380 09:27:20.964265 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2381 09:27:20.967874 3 2 0 |2c2b 3433 |(11 11)(11 11) |(1 0)(1 1)| 0
2382 09:27:20.974261 [Byte 1] Lead/lag Transition tap number (1)
2383 09:27:20.977656 3 2 4 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2384 09:27:20.981053 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2385 09:27:20.987686 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2386 09:27:20.990857 3 2 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2387 09:27:20.994203 [Byte 0] Lead/lag Transition tap number (9)
2388 09:27:20.997047 3 2 20 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2389 09:27:21.004081 3 2 24 |302 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2390 09:27:21.006912 3 2 28 |3534 1010 |(11 11)(11 11) |(0 0)(0 1)| 0
2391 09:27:21.010291 3 3 0 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2392 09:27:21.016821 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2393 09:27:21.020285 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2394 09:27:21.023147 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2395 09:27:21.029640 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2396 09:27:21.033111 3 3 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2397 09:27:21.036072 3 3 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 09:27:21.042763 3 3 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2399 09:27:21.046121 3 4 0 |3534 505 |(11 11)(11 11) |(0 0)(1 1)| 0
2400 09:27:21.049559 [Byte 1] Lead/lag Transition tap number (1)
2401 09:27:21.055698 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2402 09:27:21.059155 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2403 09:27:21.062555 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2404 09:27:21.068755 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2405 09:27:21.072070 3 4 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2406 09:27:21.075288 3 4 24 |201 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2407 09:27:21.082274 3 4 28 |3332 b0a |(11 11)(11 11) |(1 1)(0 1)| 0
2408 09:27:21.085083 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2409 09:27:21.088428 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2410 09:27:21.095138 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2411 09:27:21.098343 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2412 09:27:21.101736 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2413 09:27:21.108027 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 09:27:21.111631 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 09:27:21.114472 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2416 09:27:21.121341 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2417 09:27:21.124604 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2418 09:27:21.127923 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2419 09:27:21.134304 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2420 09:27:21.137834 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2421 09:27:21.140723 [Byte 0] Lead/lag falling Transition (3, 6, 16)
2422 09:27:21.147719 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2423 09:27:21.150353 [Byte 0] Lead/lag Transition tap number (2)
2424 09:27:21.153876 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2425 09:27:21.157412 3 6 24 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2426 09:27:21.163554 [Byte 1] Lead/lag Transition tap number (2)
2427 09:27:21.166997 3 6 28 |4646 202 |(10 10)(11 11) |(0 0)(0 0)| 0
2428 09:27:21.170418 3 7 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2429 09:27:21.173946 [Byte 0]First pass (3, 7, 0)
2430 09:27:21.176780 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2431 09:27:21.180073 [Byte 1]First pass (3, 7, 4)
2432 09:27:21.183295 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2433 09:27:21.186721 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2434 09:27:21.193442 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2435 09:27:21.196399 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2436 09:27:21.200042 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2437 09:27:21.203333 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2438 09:27:21.206022 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2439 09:27:21.213328 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2440 09:27:21.216159 All bytes gating window > 1UI, Early break!
2441 09:27:21.216244
2442 09:27:21.219633 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 20)
2443 09:27:21.219713
2444 09:27:21.223187 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)
2445 09:27:21.223266
2446 09:27:21.223326
2447 09:27:21.223381
2448 09:27:21.226020 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2449 09:27:21.229492
2450 09:27:21.232734 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)
2451 09:27:21.232815
2452 09:27:21.232875
2453 09:27:21.232931 Write Rank0 MR1 =0x56
2454 09:27:21.232984
2455 09:27:21.235862 best RODT dly(2T, 0.5T) = (2, 3)
2456 09:27:21.235978
2457 09:27:21.239203 best RODT dly(2T, 0.5T) = (2, 3)
2458 09:27:21.239310 ==
2459 09:27:21.245714 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2460 09:27:21.249313 fsp= 1, odt_onoff= 1, Byte mode= 0
2461 09:27:21.249426 ==
2462 09:27:21.252012 Start DQ dly to find pass range UseTestEngine =0
2463 09:27:21.255369 x-axis: bit #, y-axis: DQ dly (-127~63)
2464 09:27:21.259109 RX Vref Scan = 0
2465 09:27:21.262340 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2466 09:27:21.265794 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2467 09:27:21.268431 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2468 09:27:21.268538 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2469 09:27:21.271910 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2470 09:27:21.275460 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2471 09:27:21.278966 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2472 09:27:21.281886 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2473 09:27:21.285301 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2474 09:27:21.288140 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2475 09:27:21.291634 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2476 09:27:21.295005 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2477 09:27:21.295104 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2478 09:27:21.298067 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2479 09:27:21.301722 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2480 09:27:21.304897 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2481 09:27:21.307914 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2482 09:27:21.311238 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2483 09:27:21.314741 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2484 09:27:21.318189 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2485 09:27:21.318320 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2486 09:27:21.321475 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2487 09:27:21.324411 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2488 09:27:21.327992 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2489 09:27:21.330779 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2490 09:27:21.334338 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2491 09:27:21.337976 0, [0] xxxxxxxx xoxxxxxo [MSB]
2492 09:27:21.338077 1, [0] xxxoxxxx ooxxxxxo [MSB]
2493 09:27:21.340691 2, [0] xxxoxxxx ooxxxxxo [MSB]
2494 09:27:21.344431 3, [0] xoooxxxx oooxxxxo [MSB]
2495 09:27:21.347586 4, [0] xooooxxo ooooxxxo [MSB]
2496 09:27:21.351037 5, [0] xooooxxo ooooxooo [MSB]
2497 09:27:21.353914 6, [0] xooooxxo oooooooo [MSB]
2498 09:27:21.357267 7, [0] xoooooxo oooooooo [MSB]
2499 09:27:21.357362 8, [0] xooooooo oooooooo [MSB]
2500 09:27:21.360748 33, [0] oooxoooo ooooooox [MSB]
2501 09:27:21.363729 34, [0] oooxoooo ooooooox [MSB]
2502 09:27:21.367356 35, [0] oooxoooo xxooooox [MSB]
2503 09:27:21.370818 36, [0] oooxoooo xxooooox [MSB]
2504 09:27:21.373900 37, [0] ooxxoooo xxooooox [MSB]
2505 09:27:21.377246 38, [0] ooxxoooo xxooooox [MSB]
2506 09:27:21.377343 39, [0] xxxxxoox xxooxoox [MSB]
2507 09:27:21.380015 40, [0] xxxxxoox xxxoxoox [MSB]
2508 09:27:21.383635 41, [0] xxxxxxxx xxxxxxxx [MSB]
2509 09:27:21.386599 iDelay=41, Bit 0, Center 23 (9 ~ 38) 30
2510 09:27:21.390142 iDelay=41, Bit 1, Center 20 (3 ~ 38) 36
2511 09:27:21.393777 iDelay=41, Bit 2, Center 19 (3 ~ 36) 34
2512 09:27:21.400281 iDelay=41, Bit 3, Center 16 (1 ~ 32) 32
2513 09:27:21.403013 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
2514 09:27:21.406667 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2515 09:27:21.409492 iDelay=41, Bit 6, Center 24 (8 ~ 40) 33
2516 09:27:21.412724 iDelay=41, Bit 7, Center 21 (4 ~ 38) 35
2517 09:27:21.415922 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
2518 09:27:21.420020 iDelay=41, Bit 9, Center 17 (0 ~ 34) 35
2519 09:27:21.422940 iDelay=41, Bit 10, Center 21 (3 ~ 39) 37
2520 09:27:21.425889 iDelay=41, Bit 11, Center 22 (4 ~ 40) 37
2521 09:27:21.429207 iDelay=41, Bit 12, Center 22 (6 ~ 38) 33
2522 09:27:21.432617 iDelay=41, Bit 13, Center 22 (5 ~ 40) 36
2523 09:27:21.439073 iDelay=41, Bit 14, Center 22 (5 ~ 40) 36
2524 09:27:21.442808 iDelay=41, Bit 15, Center 14 (-3 ~ 32) 36
2525 09:27:21.442906 ==
2526 09:27:21.445861 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2527 09:27:21.448728 fsp= 1, odt_onoff= 1, Byte mode= 0
2528 09:27:21.448827 ==
2529 09:27:21.452260 DQS Delay:
2530 09:27:21.452354 DQS0 = 0, DQS1 = 0
2531 09:27:21.452438 DQM Delay:
2532 09:27:21.455568 DQM0 = 20, DQM1 = 19
2533 09:27:21.455665 DQ Delay:
2534 09:27:21.458651 DQ0 =23, DQ1 =20, DQ2 =19, DQ3 =16
2535 09:27:21.462265 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =21
2536 09:27:21.465552 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2537 09:27:21.468492 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
2538 09:27:21.468588
2539 09:27:21.468675
2540 09:27:21.471920 DramC Write-DBI off
2541 09:27:21.472013 ==
2542 09:27:21.479025 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2543 09:27:21.479127 fsp= 1, odt_onoff= 1, Byte mode= 0
2544 09:27:21.481638 ==
2545 09:27:21.485182 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2546 09:27:21.485276
2547 09:27:21.488585 Begin, DQ Scan Range 929~1185
2548 09:27:21.488680
2549 09:27:21.488768
2550 09:27:21.488850 TX Vref Scan disable
2551 09:27:21.494987 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2552 09:27:21.498439 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2553 09:27:21.501370 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2554 09:27:21.505008 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2555 09:27:21.507790 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2556 09:27:21.511375 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2557 09:27:21.514346 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2558 09:27:21.517955 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2559 09:27:21.521400 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2560 09:27:21.524373 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2561 09:27:21.527955 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2562 09:27:21.530859 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2563 09:27:21.534245 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2564 09:27:21.540910 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2565 09:27:21.544170 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2566 09:27:21.547298 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2567 09:27:21.550489 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2568 09:27:21.553624 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2569 09:27:21.557072 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2570 09:27:21.560662 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2571 09:27:21.563942 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2572 09:27:21.566983 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2573 09:27:21.570232 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2574 09:27:21.573346 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2575 09:27:21.577023 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2576 09:27:21.580042 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2577 09:27:21.586961 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2578 09:27:21.590032 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2579 09:27:21.593055 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2580 09:27:21.596891 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2581 09:27:21.600136 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2582 09:27:21.603470 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2583 09:27:21.606341 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2584 09:27:21.610033 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2585 09:27:21.612863 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2586 09:27:21.616330 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2587 09:27:21.619281 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2588 09:27:21.622809 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2589 09:27:21.626411 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2590 09:27:21.629198 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2591 09:27:21.632798 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2592 09:27:21.636269 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2593 09:27:21.642818 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2594 09:27:21.645769 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2595 09:27:21.649176 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2596 09:27:21.652101 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2597 09:27:21.655515 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2598 09:27:21.659014 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2599 09:27:21.662421 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2600 09:27:21.665144 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2601 09:27:21.668810 979 |3 6 19|[0] xxxxxxxx oxxxxxxo [MSB]
2602 09:27:21.672129 980 |3 6 20|[0] xxxxxxxx oxxxxxxo [MSB]
2603 09:27:21.675351 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2604 09:27:21.678553 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2605 09:27:21.681706 983 |3 6 23|[0] xxxxxxxx oooxxxxo [MSB]
2606 09:27:21.688692 984 |3 6 24|[0] xxxxxxxx oooooxoo [MSB]
2607 09:27:21.691810 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2608 09:27:21.695199 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2609 09:27:21.698339 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2610 09:27:21.701734 999 |3 6 39|[0] oooooooo ooooooox [MSB]
2611 09:27:21.704860 1000 |3 6 40|[0] oooooooo oxooooox [MSB]
2612 09:27:21.711263 1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]
2613 09:27:21.714312 1002 |3 6 42|[0] oooooooo xxxxxxxx [MSB]
2614 09:27:21.717749 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2615 09:27:21.721029 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2616 09:27:21.724049 1005 |3 6 45|[0] oooxoooo xxxxxxxx [MSB]
2617 09:27:21.727837 1006 |3 6 46|[0] ooxxoooo xxxxxxxx [MSB]
2618 09:27:21.731135 1007 |3 6 47|[0] ooxxxoox xxxxxxxx [MSB]
2619 09:27:21.734020 1008 |3 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2620 09:27:21.737641 Byte0, DQ PI dly=994, DQM PI dly= 994
2621 09:27:21.743818 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 34)
2622 09:27:21.743924
2623 09:27:21.747504 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 34)
2624 09:27:21.747596
2625 09:27:21.750839 Byte1, DQ PI dly=989, DQM PI dly= 989
2626 09:27:21.753735 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2627 09:27:21.757237
2628 09:27:21.760750 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2629 09:27:21.760820
2630 09:27:21.760876 ==
2631 09:27:21.763570 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2632 09:27:21.766996 fsp= 1, odt_onoff= 1, Byte mode= 0
2633 09:27:21.767096 ==
2634 09:27:21.773373 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2635 09:27:21.773470
2636 09:27:21.777017 Begin, DQ Scan Range 965~1029
2637 09:27:21.777111 Write Rank0 MR14 =0x0
2638 09:27:21.785782
2639 09:27:21.785888 CH=1, VrefRange= 0, VrefLevel = 0
2640 09:27:21.791938 TX Bit0 (987~1004) 18 995, Bit8 (984~994) 11 989,
2641 09:27:21.795351 TX Bit1 (986~1002) 17 994, Bit9 (983~993) 11 988,
2642 09:27:21.801753 TX Bit2 (985~998) 14 991, Bit10 (986~997) 12 991,
2643 09:27:21.805142 TX Bit3 (984~996) 13 990, Bit11 (986~997) 12 991,
2644 09:27:21.808688 TX Bit4 (986~1002) 17 994, Bit12 (986~997) 12 991,
2645 09:27:21.814943 TX Bit5 (987~1003) 17 995, Bit13 (987~997) 11 992,
2646 09:27:21.818668 TX Bit6 (986~1002) 17 994, Bit14 (986~994) 9 990,
2647 09:27:21.824977 TX Bit7 (986~1000) 15 993, Bit15 (980~989) 10 984,
2648 09:27:21.825073
2649 09:27:21.825161 Write Rank0 MR14 =0x2
2650 09:27:21.833986
2651 09:27:21.834128 CH=1, VrefRange= 0, VrefLevel = 2
2652 09:27:21.840595 TX Bit0 (986~1005) 20 995, Bit8 (983~995) 13 989,
2653 09:27:21.844144 TX Bit1 (985~1004) 20 994, Bit9 (983~994) 12 988,
2654 09:27:21.850729 TX Bit2 (984~999) 16 991, Bit10 (985~998) 14 991,
2655 09:27:21.854085 TX Bit3 (984~997) 14 990, Bit11 (986~998) 13 992,
2656 09:27:21.856909 TX Bit4 (986~1003) 18 994, Bit12 (986~998) 13 992,
2657 09:27:21.864097 TX Bit5 (987~1004) 18 995, Bit13 (987~998) 12 992,
2658 09:27:21.867008 TX Bit6 (986~1004) 19 995, Bit14 (986~995) 10 990,
2659 09:27:21.873401 TX Bit7 (986~1001) 16 993, Bit15 (980~991) 12 985,
2660 09:27:21.873500
2661 09:27:21.873624 Write Rank0 MR14 =0x4
2662 09:27:21.883097
2663 09:27:21.883193 CH=1, VrefRange= 0, VrefLevel = 4
2664 09:27:21.889373 TX Bit0 (986~1005) 20 995, Bit8 (982~995) 14 988,
2665 09:27:21.892836 TX Bit1 (985~1004) 20 994, Bit9 (983~994) 12 988,
2666 09:27:21.899193 TX Bit2 (984~1000) 17 992, Bit10 (985~1000) 16 992,
2667 09:27:21.902650 TX Bit3 (983~998) 16 990, Bit11 (986~999) 14 992,
2668 09:27:21.909123 TX Bit4 (985~1004) 20 994, Bit12 (985~999) 15 992,
2669 09:27:21.912471 TX Bit5 (986~1005) 20 995, Bit13 (986~999) 14 992,
2670 09:27:21.915712 TX Bit6 (986~1005) 20 995, Bit14 (986~996) 11 991,
2671 09:27:21.922178 TX Bit7 (986~1002) 17 994, Bit15 (979~992) 14 985,
2672 09:27:21.922312
2673 09:27:21.922410 Write Rank0 MR14 =0x6
2674 09:27:21.932133
2675 09:27:21.932229 CH=1, VrefRange= 0, VrefLevel = 6
2676 09:27:21.938506 TX Bit0 (986~1006) 21 996, Bit8 (982~996) 15 989,
2677 09:27:21.942090 TX Bit1 (985~1005) 21 995, Bit9 (983~995) 13 989,
2678 09:27:21.948550 TX Bit2 (984~1001) 18 992, Bit10 (984~1000) 17 992,
2679 09:27:21.951854 TX Bit3 (983~998) 16 990, Bit11 (986~1000) 15 993,
2680 09:27:21.958412 TX Bit4 (985~1005) 21 995, Bit12 (986~1000) 15 993,
2681 09:27:21.961468 TX Bit5 (986~1005) 20 995, Bit13 (986~1000) 15 993,
2682 09:27:21.964646 TX Bit6 (985~1005) 21 995, Bit14 (985~997) 13 991,
2683 09:27:21.971079 TX Bit7 (985~1003) 19 994, Bit15 (979~993) 15 986,
2684 09:27:21.971175
2685 09:27:21.974743 Write Rank0 MR14 =0x8
2686 09:27:21.981387
2687 09:27:21.981483 CH=1, VrefRange= 0, VrefLevel = 8
2688 09:27:21.988418 TX Bit0 (986~1006) 21 996, Bit8 (981~997) 17 989,
2689 09:27:21.991235 TX Bit1 (985~1005) 21 995, Bit9 (982~996) 15 989,
2690 09:27:21.997699 TX Bit2 (984~1002) 19 993, Bit10 (985~1000) 16 992,
2691 09:27:22.001076 TX Bit3 (983~999) 17 991, Bit11 (985~1000) 16 992,
2692 09:27:22.007609 TX Bit4 (985~1005) 21 995, Bit12 (984~1000) 17 992,
2693 09:27:22.011129 TX Bit5 (986~1006) 21 996, Bit13 (986~1000) 15 993,
2694 09:27:22.013925 TX Bit6 (985~1005) 21 995, Bit14 (985~998) 14 991,
2695 09:27:22.020779 TX Bit7 (985~1004) 20 994, Bit15 (978~993) 16 985,
2696 09:27:22.020929
2697 09:27:22.023692 Write Rank0 MR14 =0xa
2698 09:27:22.031144
2699 09:27:22.034064 CH=1, VrefRange= 0, VrefLevel = 10
2700 09:27:22.037745 TX Bit0 (986~1007) 22 996, Bit8 (980~997) 18 988,
2701 09:27:22.040704 TX Bit1 (985~1005) 21 995, Bit9 (981~996) 16 988,
2702 09:27:22.047463 TX Bit2 (984~1003) 20 993, Bit10 (984~1001) 18 992,
2703 09:27:22.050516 TX Bit3 (983~999) 17 991, Bit11 (985~1001) 17 993,
2704 09:27:22.057282 TX Bit4 (985~1005) 21 995, Bit12 (985~1001) 17 993,
2705 09:27:22.060290 TX Bit5 (986~1006) 21 996, Bit13 (986~1001) 16 993,
2706 09:27:22.064081 TX Bit6 (985~1006) 22 995, Bit14 (985~999) 15 992,
2707 09:27:22.070307 TX Bit7 (985~1005) 21 995, Bit15 (978~993) 16 985,
2708 09:27:22.070405
2709 09:27:22.073533 Write Rank0 MR14 =0xc
2710 09:27:22.080401
2711 09:27:22.083791 CH=1, VrefRange= 0, VrefLevel = 12
2712 09:27:22.086952 TX Bit0 (985~1007) 23 996, Bit8 (980~999) 20 989,
2713 09:27:22.090769 TX Bit1 (985~1006) 22 995, Bit9 (980~997) 18 988,
2714 09:27:22.096799 TX Bit2 (984~1004) 21 994, Bit10 (983~1001) 19 992,
2715 09:27:22.100012 TX Bit3 (982~1000) 19 991, Bit11 (986~1001) 16 993,
2716 09:27:22.106974 TX Bit4 (985~1006) 22 995, Bit12 (984~1001) 18 992,
2717 09:27:22.110457 TX Bit5 (985~1006) 22 995, Bit13 (985~1001) 17 993,
2718 09:27:22.116808 TX Bit6 (986~1006) 21 996, Bit14 (984~1000) 17 992,
2719 09:27:22.120179 TX Bit7 (985~1005) 21 995, Bit15 (978~994) 17 986,
2720 09:27:22.120284
2721 09:27:22.122945 Write Rank0 MR14 =0xe
2722 09:27:22.130050
2723 09:27:22.133420 CH=1, VrefRange= 0, VrefLevel = 14
2724 09:27:22.136770 TX Bit0 (985~1007) 23 996, Bit8 (980~999) 20 989,
2725 09:27:22.140160 TX Bit1 (985~1006) 22 995, Bit9 (980~998) 19 989,
2726 09:27:22.146749 TX Bit2 (983~1004) 22 993, Bit10 (983~1002) 20 992,
2727 09:27:22.150332 TX Bit3 (982~1001) 20 991, Bit11 (985~1002) 18 993,
2728 09:27:22.156589 TX Bit4 (985~1006) 22 995, Bit12 (984~1001) 18 992,
2729 09:27:22.159511 TX Bit5 (985~1006) 22 995, Bit13 (985~1001) 17 993,
2730 09:27:22.166591 TX Bit6 (985~1006) 22 995, Bit14 (984~1000) 17 992,
2731 09:27:22.169270 TX Bit7 (985~1005) 21 995, Bit15 (978~994) 17 986,
2732 09:27:22.169366
2733 09:27:22.172738 Write Rank0 MR14 =0x10
2734 09:27:22.180362
2735 09:27:22.183768 CH=1, VrefRange= 0, VrefLevel = 16
2736 09:27:22.187118 TX Bit0 (985~1008) 24 996, Bit8 (980~1000) 21 990,
2737 09:27:22.189955 TX Bit1 (984~1007) 24 995, Bit9 (980~999) 20 989,
2738 09:27:22.196890 TX Bit2 (983~1005) 23 994, Bit10 (984~1002) 19 993,
2739 09:27:22.200254 TX Bit3 (981~1002) 22 991, Bit11 (984~1002) 19 993,
2740 09:27:22.206821 TX Bit4 (985~1006) 22 995, Bit12 (984~1002) 19 993,
2741 09:27:22.210118 TX Bit5 (985~1006) 22 995, Bit13 (985~1002) 18 993,
2742 09:27:22.216597 TX Bit6 (985~1006) 22 995, Bit14 (984~1001) 18 992,
2743 09:27:22.219436 TX Bit7 (985~1006) 22 995, Bit15 (977~995) 19 986,
2744 09:27:22.219532
2745 09:27:22.222932 Write Rank0 MR14 =0x12
2746 09:27:22.230783
2747 09:27:22.233612 CH=1, VrefRange= 0, VrefLevel = 18
2748 09:27:22.237040 TX Bit0 (985~1008) 24 996, Bit8 (979~1000) 22 989,
2749 09:27:22.240335 TX Bit1 (984~1007) 24 995, Bit9 (980~999) 20 989,
2750 09:27:22.246716 TX Bit2 (983~1005) 23 994, Bit10 (982~1002) 21 992,
2751 09:27:22.250165 TX Bit3 (981~1003) 23 992, Bit11 (985~1002) 18 993,
2752 09:27:22.256865 TX Bit4 (984~1007) 24 995, Bit12 (984~1002) 19 993,
2753 09:27:22.260218 TX Bit5 (985~1007) 23 996, Bit13 (985~1002) 18 993,
2754 09:27:22.266443 TX Bit6 (985~1007) 23 996, Bit14 (983~1001) 19 992,
2755 09:27:22.269970 TX Bit7 (984~1006) 23 995, Bit15 (977~995) 19 986,
2756 09:27:22.270065
2757 09:27:22.272756 Write Rank0 MR14 =0x14
2758 09:27:22.280394
2759 09:27:22.283818 CH=1, VrefRange= 0, VrefLevel = 20
2760 09:27:22.287186 TX Bit0 (985~1008) 24 996, Bit8 (979~1001) 23 990,
2761 09:27:22.290532 TX Bit1 (984~1007) 24 995, Bit9 (980~1000) 21 990,
2762 09:27:22.296809 TX Bit2 (983~1006) 24 994, Bit10 (983~1002) 20 992,
2763 09:27:22.300360 TX Bit3 (981~1003) 23 992, Bit11 (983~1002) 20 992,
2764 09:27:22.307208 TX Bit4 (984~1007) 24 995, Bit12 (983~1003) 21 993,
2765 09:27:22.309977 TX Bit5 (985~1007) 23 996, Bit13 (985~1002) 18 993,
2766 09:27:22.316972 TX Bit6 (984~1007) 24 995, Bit14 (983~1002) 20 992,
2767 09:27:22.320113 TX Bit7 (984~1006) 23 995, Bit15 (977~996) 20 986,
2768 09:27:22.320206
2769 09:27:22.323313 Write Rank0 MR14 =0x16
2770 09:27:22.331000
2771 09:27:22.333875 CH=1, VrefRange= 0, VrefLevel = 22
2772 09:27:22.337351 TX Bit0 (985~1009) 25 997, Bit8 (979~1001) 23 990,
2773 09:27:22.340814 TX Bit1 (984~1008) 25 996, Bit9 (979~1001) 23 990,
2774 09:27:22.347031 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2775 09:27:22.350678 TX Bit3 (980~1004) 25 992, Bit11 (983~1003) 21 993,
2776 09:27:22.356998 TX Bit4 (984~1007) 24 995, Bit12 (983~1003) 21 993,
2777 09:27:22.360431 TX Bit5 (985~1008) 24 996, Bit13 (985~1003) 19 994,
2778 09:27:22.366858 TX Bit6 (984~1008) 25 996, Bit14 (982~1002) 21 992,
2779 09:27:22.370214 TX Bit7 (984~1007) 24 995, Bit15 (976~997) 22 986,
2780 09:27:22.370304
2781 09:27:22.373402 Write Rank0 MR14 =0x18
2782 09:27:22.381181
2783 09:27:22.384768 CH=1, VrefRange= 0, VrefLevel = 24
2784 09:27:22.387630 TX Bit0 (985~1009) 25 997, Bit8 (979~1001) 23 990,
2785 09:27:22.391005 TX Bit1 (984~1008) 25 996, Bit9 (979~1001) 23 990,
2786 09:27:22.397893 TX Bit2 (982~1007) 26 994, Bit10 (982~1004) 23 993,
2787 09:27:22.400505 TX Bit3 (980~1004) 25 992, Bit11 (982~1004) 23 993,
2788 09:27:22.407655 TX Bit4 (984~1008) 25 996, Bit12 (983~1003) 21 993,
2789 09:27:22.410356 TX Bit5 (985~1008) 24 996, Bit13 (984~1003) 20 993,
2790 09:27:22.417050 TX Bit6 (984~1008) 25 996, Bit14 (981~1002) 22 991,
2791 09:27:22.420541 TX Bit7 (984~1007) 24 995, Bit15 (976~998) 23 987,
2792 09:27:22.420636
2793 09:27:22.423405 Write Rank0 MR14 =0x1a
2794 09:27:22.431261
2795 09:27:22.434488 CH=1, VrefRange= 0, VrefLevel = 26
2796 09:27:22.437830 TX Bit0 (985~1009) 25 997, Bit8 (979~1001) 23 990,
2797 09:27:22.441750 TX Bit1 (984~1008) 25 996, Bit9 (978~1001) 24 989,
2798 09:27:22.447892 TX Bit2 (982~1007) 26 994, Bit10 (981~1004) 24 992,
2799 09:27:22.450827 TX Bit3 (979~1005) 27 992, Bit11 (983~1004) 22 993,
2800 09:27:22.457917 TX Bit4 (984~1008) 25 996, Bit12 (983~1004) 22 993,
2801 09:27:22.460623 TX Bit5 (985~1009) 25 997, Bit13 (984~1004) 21 994,
2802 09:27:22.467549 TX Bit6 (984~1008) 25 996, Bit14 (983~1003) 21 993,
2803 09:27:22.471092 TX Bit7 (984~1007) 24 995, Bit15 (976~999) 24 987,
2804 09:27:22.471189
2805 09:27:22.473766 Write Rank0 MR14 =0x1c
2806 09:27:22.482573
2807 09:27:22.485192 CH=1, VrefRange= 0, VrefLevel = 28
2808 09:27:22.488834 TX Bit0 (985~1010) 26 997, Bit8 (979~1001) 23 990,
2809 09:27:22.491701 TX Bit1 (984~1009) 26 996, Bit9 (979~1001) 23 990,
2810 09:27:22.498608 TX Bit2 (982~1007) 26 994, Bit10 (981~1003) 23 992,
2811 09:27:22.502102 TX Bit3 (979~1005) 27 992, Bit11 (982~1005) 24 993,
2812 09:27:22.508080 TX Bit4 (984~1008) 25 996, Bit12 (983~1004) 22 993,
2813 09:27:22.511543 TX Bit5 (984~1009) 26 996, Bit13 (984~1004) 21 994,
2814 09:27:22.517812 TX Bit6 (984~1009) 26 996, Bit14 (982~1003) 22 992,
2815 09:27:22.521149 TX Bit7 (984~1008) 25 996, Bit15 (976~999) 24 987,
2816 09:27:22.521252
2817 09:27:22.524499 Write Rank0 MR14 =0x1e
2818 09:27:22.532376
2819 09:27:22.535758 CH=1, VrefRange= 0, VrefLevel = 30
2820 09:27:22.539287 TX Bit0 (984~1010) 27 997, Bit8 (979~1001) 23 990,
2821 09:27:22.542460 TX Bit1 (984~1008) 25 996, Bit9 (979~1001) 23 990,
2822 09:27:22.548896 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2823 09:27:22.552256 TX Bit3 (979~1005) 27 992, Bit11 (982~1004) 23 993,
2824 09:27:22.558928 TX Bit4 (984~1009) 26 996, Bit12 (983~1004) 22 993,
2825 09:27:22.561670 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2826 09:27:22.568740 TX Bit6 (984~1009) 26 996, Bit14 (982~1003) 22 992,
2827 09:27:22.571521 TX Bit7 (984~1008) 25 996, Bit15 (976~1000) 25 988,
2828 09:27:22.571615
2829 09:27:22.574987 Write Rank0 MR14 =0x20
2830 09:27:22.582881
2831 09:27:22.586794 CH=1, VrefRange= 0, VrefLevel = 32
2832 09:27:22.589480 TX Bit0 (984~1010) 27 997, Bit8 (979~1001) 23 990,
2833 09:27:22.592909 TX Bit1 (984~1008) 25 996, Bit9 (979~1001) 23 990,
2834 09:27:22.599662 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2835 09:27:22.602578 TX Bit3 (979~1005) 27 992, Bit11 (982~1004) 23 993,
2836 09:27:22.609413 TX Bit4 (984~1009) 26 996, Bit12 (983~1004) 22 993,
2837 09:27:22.612921 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2838 09:27:22.618977 TX Bit6 (984~1009) 26 996, Bit14 (982~1003) 22 992,
2839 09:27:22.622498 TX Bit7 (984~1008) 25 996, Bit15 (976~1000) 25 988,
2840 09:27:22.622592
2841 09:27:22.625531 Write Rank0 MR14 =0x22
2842 09:27:22.633434
2843 09:27:22.636795 CH=1, VrefRange= 0, VrefLevel = 34
2844 09:27:22.639981 TX Bit0 (984~1010) 27 997, Bit8 (979~1001) 23 990,
2845 09:27:22.643402 TX Bit1 (984~1008) 25 996, Bit9 (979~1001) 23 990,
2846 09:27:22.649910 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2847 09:27:22.653112 TX Bit3 (979~1005) 27 992, Bit11 (982~1004) 23 993,
2848 09:27:22.659781 TX Bit4 (984~1009) 26 996, Bit12 (983~1004) 22 993,
2849 09:27:22.663512 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2850 09:27:22.669953 TX Bit6 (984~1009) 26 996, Bit14 (982~1003) 22 992,
2851 09:27:22.673326 TX Bit7 (984~1008) 25 996, Bit15 (976~1000) 25 988,
2852 09:27:22.673434
2853 09:27:22.676219 Write Rank0 MR14 =0x24
2854 09:27:22.684079
2855 09:27:22.687631 CH=1, VrefRange= 0, VrefLevel = 36
2856 09:27:22.690416 TX Bit0 (984~1010) 27 997, Bit8 (979~1001) 23 990,
2857 09:27:22.693979 TX Bit1 (984~1008) 25 996, Bit9 (979~1001) 23 990,
2858 09:27:22.700350 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2859 09:27:22.704080 TX Bit3 (979~1005) 27 992, Bit11 (982~1004) 23 993,
2860 09:27:22.710737 TX Bit4 (984~1009) 26 996, Bit12 (983~1004) 22 993,
2861 09:27:22.713645 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2862 09:27:22.719886 TX Bit6 (984~1009) 26 996, Bit14 (982~1003) 22 992,
2863 09:27:22.723385 TX Bit7 (984~1008) 25 996, Bit15 (976~1000) 25 988,
2864 09:27:22.723480
2865 09:27:22.723564
2866 09:27:22.726809 TX Vref found, early break! 364< 369
2867 09:27:22.733250 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2868 09:27:22.733344 u1DelayCellOfst[0]=6 cells (5 PI)
2869 09:27:22.736892 u1DelayCellOfst[1]=5 cells (4 PI)
2870 09:27:22.740220 u1DelayCellOfst[2]=2 cells (2 PI)
2871 09:27:22.742913 u1DelayCellOfst[3]=0 cells (0 PI)
2872 09:27:22.746631 u1DelayCellOfst[4]=5 cells (4 PI)
2873 09:27:22.749885 u1DelayCellOfst[5]=5 cells (4 PI)
2874 09:27:22.753111 u1DelayCellOfst[6]=5 cells (4 PI)
2875 09:27:22.755964 u1DelayCellOfst[7]=5 cells (4 PI)
2876 09:27:22.759507 Byte0, DQ PI dly=992, DQM PI dly= 994
2877 09:27:22.763013 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2878 09:27:22.763106
2879 09:27:22.769201 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2880 09:27:22.769300
2881 09:27:22.773054 u1DelayCellOfst[8]=2 cells (2 PI)
2882 09:27:22.773158 u1DelayCellOfst[9]=2 cells (2 PI)
2883 09:27:22.776366 u1DelayCellOfst[10]=5 cells (4 PI)
2884 09:27:22.779206 u1DelayCellOfst[11]=6 cells (5 PI)
2885 09:27:22.782823 u1DelayCellOfst[12]=6 cells (5 PI)
2886 09:27:22.786046 u1DelayCellOfst[13]=6 cells (5 PI)
2887 09:27:22.789564 u1DelayCellOfst[14]=5 cells (4 PI)
2888 09:27:22.792489 u1DelayCellOfst[15]=0 cells (0 PI)
2889 09:27:22.795423 Byte1, DQ PI dly=988, DQM PI dly= 990
2890 09:27:22.802366 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2891 09:27:22.802471
2892 09:27:22.805271 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2893 09:27:22.805368
2894 09:27:22.808938 Write Rank0 MR14 =0x1e
2895 09:27:22.809030
2896 09:27:22.809116 Final TX Range 0 Vref 30
2897 09:27:22.809203
2898 09:27:22.815162 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2899 09:27:22.815259
2900 09:27:22.821987 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2901 09:27:22.828839 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2902 09:27:22.838049 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2903 09:27:22.838145 Write Rank0 MR3 =0xb0
2904 09:27:22.841685 DramC Write-DBI on
2905 09:27:22.841762 ==
2906 09:27:22.844462 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2907 09:27:22.848177 fsp= 1, odt_onoff= 1, Byte mode= 0
2908 09:27:22.848257 ==
2909 09:27:22.854430 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2910 09:27:22.854509
2911 09:27:22.857929 Begin, DQ Scan Range 710~774
2912 09:27:22.858008
2913 09:27:22.858067
2914 09:27:22.858122 TX Vref Scan disable
2915 09:27:22.861275 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2916 09:27:22.864076 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2917 09:27:22.867927 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2918 09:27:22.870737 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2919 09:27:22.877414 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2920 09:27:22.880976 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2921 09:27:22.883862 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2922 09:27:22.887409 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2923 09:27:22.890764 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2924 09:27:22.894144 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2925 09:27:22.897220 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2926 09:27:22.900247 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2927 09:27:22.903949 722 |2 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2928 09:27:22.907110 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2929 09:27:22.910464 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2930 09:27:22.913401 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2931 09:27:22.917064 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2932 09:27:22.922988 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2933 09:27:22.929948 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2934 09:27:22.933242 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2935 09:27:22.936693 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2936 09:27:22.939835 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2937 09:27:22.942958 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2938 09:27:22.946204 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2939 09:27:22.949386 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
2940 09:27:22.952953 754 |2 6 50|[0] oooooooo xxxxxxxx [MSB]
2941 09:27:22.956432 755 |2 6 51|[0] oooooooo xxxxxxxx [MSB]
2942 09:27:22.959941 756 |2 6 52|[0] xxxxxxxx xxxxxxxx [MSB]
2943 09:27:22.962817 Byte0, DQ PI dly=741, DQM PI dly= 741
2944 09:27:22.969571 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 37)
2945 09:27:22.969670
2946 09:27:22.972283 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 37)
2947 09:27:22.972383
2948 09:27:22.975828 Byte1, DQ PI dly=734, DQM PI dly= 734
2949 09:27:22.979471 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
2950 09:27:22.979574
2951 09:27:22.985354 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
2952 09:27:22.985456
2953 09:27:22.992454 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2954 09:27:22.998887 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2955 09:27:23.005173 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2956 09:27:23.008418 Write Rank0 MR3 =0x30
2957 09:27:23.008541 DramC Write-DBI off
2958 09:27:23.008653
2959 09:27:23.011619 [DATLAT]
2960 09:27:23.011742 Freq=1600, CH1 RK0, use_rxtx_scan=0
2961 09:27:23.015320
2962 09:27:23.015445 DATLAT Default: 0xf
2963 09:27:23.018233 7, 0xFFFF, sum=0
2964 09:27:23.018364 8, 0xFFFF, sum=0
2965 09:27:23.021557 9, 0xFFFF, sum=0
2966 09:27:23.021687 10, 0xFFFF, sum=0
2967 09:27:23.024677 11, 0xFFFF, sum=0
2968 09:27:23.024774 12, 0xFFFF, sum=0
2969 09:27:23.028179 13, 0xFFFF, sum=0
2970 09:27:23.028279 14, 0x0, sum=1
2971 09:27:23.028365 15, 0x0, sum=2
2972 09:27:23.031650 16, 0x0, sum=3
2973 09:27:23.031747 17, 0x0, sum=4
2974 09:27:23.038020 pattern=2 first_step=14 total pass=5 best_step=16
2975 09:27:23.038120 ==
2976 09:27:23.041384 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2977 09:27:23.044696 fsp= 1, odt_onoff= 1, Byte mode= 0
2978 09:27:23.044794 ==
2979 09:27:23.048097 Start DQ dly to find pass range UseTestEngine =1
2980 09:27:23.054332 x-axis: bit #, y-axis: DQ dly (-127~63)
2981 09:27:23.054413 RX Vref Scan = 1
2982 09:27:23.161923
2983 09:27:23.162035 RX Vref found, early break!
2984 09:27:23.162097
2985 09:27:23.168244 Final RX Vref 11, apply to both rank0 and 1
2986 09:27:23.168321 ==
2987 09:27:23.171762 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2988 09:27:23.174899 fsp= 1, odt_onoff= 1, Byte mode= 0
2989 09:27:23.174971 ==
2990 09:27:23.178264 DQS Delay:
2991 09:27:23.178335 DQS0 = 0, DQS1 = 0
2992 09:27:23.178397 DQM Delay:
2993 09:27:23.181390 DQM0 = 20, DQM1 = 19
2994 09:27:23.181478 DQ Delay:
2995 09:27:23.185272 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
2996 09:27:23.188348 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
2997 09:27:23.191492 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
2998 09:27:23.195004 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
2999 09:27:23.195115
3000 09:27:23.195240
3001 09:27:23.195322
3002 09:27:23.198155 [DramC_TX_OE_Calibration] TA2
3003 09:27:23.201306 Original DQ_B0 (3 6) =30, OEN = 27
3004 09:27:23.204709 Original DQ_B1 (3 6) =30, OEN = 27
3005 09:27:23.207574 23, 0x0, End_B0=23 End_B1=23
3006 09:27:23.211055 24, 0x0, End_B0=24 End_B1=24
3007 09:27:23.211157 25, 0x0, End_B0=25 End_B1=25
3008 09:27:23.214611 26, 0x0, End_B0=26 End_B1=26
3009 09:27:23.218160 27, 0x0, End_B0=27 End_B1=27
3010 09:27:23.221083 28, 0x0, End_B0=28 End_B1=28
3011 09:27:23.224501 29, 0x0, End_B0=29 End_B1=29
3012 09:27:23.224599 30, 0x0, End_B0=30 End_B1=30
3013 09:27:23.227982 31, 0xFFFF, End_B0=30 End_B1=30
3014 09:27:23.234164 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3015 09:27:23.237508 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3016 09:27:23.240856
3017 09:27:23.240948
3018 09:27:23.241038 Write Rank0 MR23 =0x3f
3019 09:27:23.241121 [DQSOSC]
3020 09:27:23.250625 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3021 09:27:23.257383 CH1_RK0: MR19=0x202, MR18=0xADAD, DQSOSC=459, MR23=63, INC=11, DEC=17
3022 09:27:23.257486 Write Rank0 MR23 =0x3f
3023 09:27:23.260224 [DQSOSC]
3024 09:27:23.266824 [DQSOSCAuto] RK0, (LSB)MR18= 0xaeae, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3025 09:27:23.270288 CH1 RK0: MR19=202, MR18=AEAE
3026 09:27:23.273861 [RankSwap] Rank num 2, (Multi 1), Rank 1
3027 09:27:23.276644 Write Rank0 MR2 =0xad
3028 09:27:23.276730 [Write Leveling]
3029 09:27:23.280217 delay byte0 byte1 byte2 byte3
3030 09:27:23.280294
3031 09:27:23.283037 10 0 0
3032 09:27:23.283116 11 0 0
3033 09:27:23.283175 12 0 0
3034 09:27:23.286482 13 0 0
3035 09:27:23.286573 14 0 0
3036 09:27:23.290115 15 0 0
3037 09:27:23.290203 16 0 0
3038 09:27:23.292951 17 0 0
3039 09:27:23.293066 18 0 0
3040 09:27:23.293168 19 0 0
3041 09:27:23.296468 20 0 0
3042 09:27:23.296570 21 0 0
3043 09:27:23.300050 22 0 0
3044 09:27:23.300155 23 0 0
3045 09:27:23.302671 24 0 0
3046 09:27:23.302747 25 0 0
3047 09:27:23.302825 26 0 0
3048 09:27:23.305886 27 0 0
3049 09:27:23.305986 28 0 ff
3050 09:27:23.309584 29 0 0
3051 09:27:23.309686 30 0 ff
3052 09:27:23.312575 31 0 ff
3053 09:27:23.312678 32 0 ff
3054 09:27:23.312767 33 ff ff
3055 09:27:23.316122 34 ff ff
3056 09:27:23.316220 35 ff ff
3057 09:27:23.318987 36 ff ff
3058 09:27:23.319062 37 ff ff
3059 09:27:23.322638 38 ff ff
3060 09:27:23.322747 39 ff ff
3061 09:27:23.329172 pass bytecount = 0xff (0xff: all bytes pass)
3062 09:27:23.329278
3063 09:27:23.329340 DQS0 dly: 33
3064 09:27:23.329397 DQS1 dly: 30
3065 09:27:23.332680 Write Rank0 MR2 =0x2d
3066 09:27:23.336090 [RankSwap] Rank num 2, (Multi 1), Rank 0
3067 09:27:23.338934 Write Rank1 MR1 =0xd6
3068 09:27:23.339008 [Gating]
3069 09:27:23.339077 ==
3070 09:27:23.345271 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3071 09:27:23.345390 fsp= 1, odt_onoff= 1, Byte mode= 0
3072 09:27:23.348861 ==
3073 09:27:23.352167 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3074 09:27:23.355613 3 1 4 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3075 09:27:23.362038 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3076 09:27:23.365109 3 1 12 |2c2b b0b |(11 11)(11 11) |(0 0)(1 1)| 0
3077 09:27:23.368667 3 1 16 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3078 09:27:23.371993 3 1 20 |2c2b 1414 |(11 11)(1 1) |(1 0)(1 1)| 0
3079 09:27:23.378410 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3080 09:27:23.381290 [Byte 1] Lead/lag Transition tap number (1)
3081 09:27:23.384952 3 1 28 |2c2b f0f |(11 11)(1 1) |(1 0)(0 0)| 0
3082 09:27:23.391755 3 2 0 |2c2b 1e1d |(11 11)(11 11) |(1 0)(0 0)| 0
3083 09:27:23.394637 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3084 09:27:23.398109 3 2 8 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 0)| 0
3085 09:27:23.401783 3 2 12 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3086 09:27:23.407938 3 2 16 |2c2b 3130 |(11 11)(11 11) |(0 0)(0 1)| 0
3087 09:27:23.411431 3 2 20 |504 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3088 09:27:23.414341 3 2 24 |3534 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
3089 09:27:23.421249 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3090 09:27:23.424158 3 3 0 |3534 3c3b |(11 11)(11 11) |(0 0)(0 0)| 0
3091 09:27:23.427916 3 3 4 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
3092 09:27:23.434399 3 3 8 |3534 3b3a |(11 11)(11 11) |(0 0)(1 1)| 0
3093 09:27:23.437510 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3094 09:27:23.440430 3 3 16 |3534 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
3095 09:27:23.447193 3 3 20 |3534 3838 |(11 11)(10 10) |(1 1)(1 1)| 0
3096 09:27:23.450746 [Byte 0] Lead/lag Transition tap number (1)
3097 09:27:23.453682 3 3 24 |3534 1514 |(11 11)(11 11) |(0 0)(1 1)| 0
3098 09:27:23.457007 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3099 09:27:23.463316 [Byte 1] Lead/lag Transition tap number (1)
3100 09:27:23.466943 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3101 09:27:23.470384 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3102 09:27:23.476350 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3103 09:27:23.479635 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3104 09:27:23.482860 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3105 09:27:23.490118 3 4 20 |505 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3106 09:27:23.492870 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3107 09:27:23.496275 3 4 28 |3d3d 2e2d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 09:27:23.502642 3 5 0 |3d3d 3d3d |(11 11)(10 1) |(1 1)(1 1)| 0
3109 09:27:23.506176 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 09:27:23.509809 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3111 09:27:23.512818 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3112 09:27:23.519212 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3113 09:27:23.522839 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3114 09:27:23.529682 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3115 09:27:23.532350 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3116 09:27:23.535849 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3117 09:27:23.539336 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3118 09:27:23.545740 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3119 09:27:23.549185 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3120 09:27:23.552008 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3121 09:27:23.558676 [Byte 0] Lead/lag Transition tap number (2)
3122 09:27:23.561942 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3123 09:27:23.565125 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3124 09:27:23.572067 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3125 09:27:23.574770 [Byte 1] Lead/lag Transition tap number (3)
3126 09:27:23.578323 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3127 09:27:23.581943 [Byte 0]First pass (3, 6, 24)
3128 09:27:23.584651 3 6 28 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3129 09:27:23.588035 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3130 09:27:23.591487 [Byte 1]First pass (3, 7, 0)
3131 09:27:23.594809 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3132 09:27:23.601394 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3133 09:27:23.604733 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3134 09:27:23.607753 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3135 09:27:23.650006 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3136 09:27:23.650121 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3137 09:27:23.650235 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3138 09:27:23.650308 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3139 09:27:23.650377 All bytes gating window > 1UI, Early break!
3140 09:27:23.650461
3141 09:27:23.650542 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3142 09:27:23.650649
3143 09:27:23.650770 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
3144 09:27:23.650857
3145 09:27:23.650956
3146 09:27:23.651042
3147 09:27:23.651125 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3148 09:27:23.651208
3149 09:27:23.651295 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
3150 09:27:23.651378
3151 09:27:23.651463
3152 09:27:23.651545 Write Rank1 MR1 =0x56
3153 09:27:23.651628
3154 09:27:23.651896 best RODT dly(2T, 0.5T) = (2, 3)
3155 09:27:23.651981
3156 09:27:23.653383 best RODT dly(2T, 0.5T) = (2, 3)
3157 09:27:23.653470 ==
3158 09:27:23.656792 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3159 09:27:23.660297 fsp= 1, odt_onoff= 1, Byte mode= 0
3160 09:27:23.660389 ==
3161 09:27:23.666656 Start DQ dly to find pass range UseTestEngine =0
3162 09:27:23.670290 x-axis: bit #, y-axis: DQ dly (-127~63)
3163 09:27:23.670361 RX Vref Scan = 0
3164 09:27:23.673796 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3165 09:27:23.676357 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3166 09:27:23.679886 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3167 09:27:23.683406 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3168 09:27:23.686431 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3169 09:27:23.686546 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3170 09:27:23.689661 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3171 09:27:23.692831 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3172 09:27:23.696114 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3173 09:27:23.699384 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3174 09:27:23.703072 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3175 09:27:23.705875 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3176 09:27:23.709274 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3177 09:27:23.712602 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3178 09:27:23.712677 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3179 09:27:23.715695 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3180 09:27:23.718947 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3181 09:27:23.722752 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3182 09:27:23.725540 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3183 09:27:23.729138 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3184 09:27:23.732594 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3185 09:27:23.735452 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3186 09:27:23.735525 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3187 09:27:23.738916 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3188 09:27:23.742318 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3189 09:27:23.745148 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3190 09:27:23.748751 0, [0] xxxxxxxx xxxxxxxo [MSB]
3191 09:27:23.751988 1, [0] xxxoxxxx xxxxxxxo [MSB]
3192 09:27:23.754948 2, [0] xxxoxxxx oxxxxxxo [MSB]
3193 09:27:23.755044 3, [0] xoooxxxo ooxxxxxo [MSB]
3194 09:27:23.758297 4, [0] xooooxxo oooxxxxo [MSB]
3195 09:27:23.761894 5, [0] xooooxxo oooxxxxo [MSB]
3196 09:27:23.765381 6, [0] xooooxoo oooxxxxo [MSB]
3197 09:27:23.768249 32, [0] oooxoooo ooooooox [MSB]
3198 09:27:23.771799 33, [0] oooxoooo ooooooox [MSB]
3199 09:27:23.774659 34, [0] oooxoooo xoooooox [MSB]
3200 09:27:23.774730 35, [0] ooxxoooo xoooooox [MSB]
3201 09:27:23.778157 36, [0] ooxxoooo xxooooox [MSB]
3202 09:27:23.781640 37, [0] ooxxoooo xxooooox [MSB]
3203 09:27:23.785245 38, [0] xxxxooox xxooooox [MSB]
3204 09:27:23.787956 39, [0] xxxxxoox xxxoxoox [MSB]
3205 09:27:23.791615 40, [0] xxxxxoox xxxoxxox [MSB]
3206 09:27:23.795133 41, [0] xxxxxxxx xxxxxxxx [MSB]
3207 09:27:23.797701 iDelay=41, Bit 0, Center 22 (7 ~ 37) 31
3208 09:27:23.801284 iDelay=41, Bit 1, Center 20 (3 ~ 37) 35
3209 09:27:23.804749 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3210 09:27:23.807571 iDelay=41, Bit 3, Center 16 (1 ~ 31) 31
3211 09:27:23.811046 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
3212 09:27:23.814695 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
3213 09:27:23.817688 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3214 09:27:23.820717 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3215 09:27:23.823947 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3216 09:27:23.827350 iDelay=41, Bit 9, Center 19 (3 ~ 35) 33
3217 09:27:23.833739 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3218 09:27:23.837005 iDelay=41, Bit 11, Center 23 (7 ~ 40) 34
3219 09:27:23.840166 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3220 09:27:23.843447 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3221 09:27:23.846688 iDelay=41, Bit 14, Center 23 (7 ~ 40) 34
3222 09:27:23.850332 iDelay=41, Bit 15, Center 14 (-2 ~ 31) 34
3223 09:27:23.850407 ==
3224 09:27:23.857229 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3225 09:27:23.860041 fsp= 1, odt_onoff= 1, Byte mode= 0
3226 09:27:23.860138 ==
3227 09:27:23.860233 DQS Delay:
3228 09:27:23.863546 DQS0 = 0, DQS1 = 0
3229 09:27:23.863625 DQM Delay:
3230 09:27:23.866398 DQM0 = 20, DQM1 = 20
3231 09:27:23.866468 DQ Delay:
3232 09:27:23.870076 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =16
3233 09:27:23.872927 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3234 09:27:23.876585 DQ8 =17, DQ9 =19, DQ10 =21, DQ11 =23
3235 09:27:23.880027 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
3236 09:27:23.880124
3237 09:27:23.880217
3238 09:27:23.880294 DramC Write-DBI off
3239 09:27:23.882857 ==
3240 09:27:23.886352 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3241 09:27:23.889700 fsp= 1, odt_onoff= 1, Byte mode= 0
3242 09:27:23.889774 ==
3243 09:27:23.893228 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3244 09:27:23.893321
3245 09:27:23.896010 Begin, DQ Scan Range 926~1182
3246 09:27:23.896101
3247 09:27:23.896190
3248 09:27:23.899381 TX Vref Scan disable
3249 09:27:23.902644 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3250 09:27:23.906103 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3251 09:27:23.909415 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3252 09:27:23.913010 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3253 09:27:23.915917 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3254 09:27:23.919478 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3255 09:27:23.922328 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3256 09:27:23.925947 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3257 09:27:23.932467 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3258 09:27:23.935748 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3259 09:27:23.939163 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3260 09:27:23.942651 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3261 09:27:23.945390 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3262 09:27:23.948585 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3263 09:27:23.952405 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3264 09:27:23.955515 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3265 09:27:23.958586 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3266 09:27:23.961745 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3267 09:27:23.965511 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3268 09:27:23.968629 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3269 09:27:23.972029 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3270 09:27:23.978366 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3271 09:27:23.981845 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3272 09:27:23.984689 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3273 09:27:23.988316 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3274 09:27:23.991828 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3275 09:27:23.994412 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3276 09:27:23.998096 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3277 09:27:24.001021 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3278 09:27:24.004669 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3279 09:27:24.008027 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3280 09:27:24.011337 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3281 09:27:24.014072 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3282 09:27:24.021300 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3283 09:27:24.024108 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3284 09:27:24.027714 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3285 09:27:24.030645 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3286 09:27:24.034038 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3287 09:27:24.037441 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3288 09:27:24.040714 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3289 09:27:24.043494 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3290 09:27:24.046940 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3291 09:27:24.050035 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3292 09:27:24.053443 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3293 09:27:24.056732 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3294 09:27:24.060191 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3295 09:27:24.063603 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3296 09:27:24.066771 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3297 09:27:24.070065 974 |3 6 14|[0] xxxxxxxx oxxxxxxo [MSB]
3298 09:27:24.076518 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3299 09:27:24.079543 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3300 09:27:24.082554 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3301 09:27:24.086099 978 |3 6 18|[0] xxxxxxxx ooooooxo [MSB]
3302 09:27:24.089448 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3303 09:27:24.092446 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3304 09:27:24.096212 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3305 09:27:24.099456 982 |3 6 22|[0] xooxoxoo oooooooo [MSB]
3306 09:27:24.102275 983 |3 6 23|[0] xooooooo oooooooo [MSB]
3307 09:27:24.109418 993 |3 6 33|[0] oooooooo ooooooox [MSB]
3308 09:27:24.113103 994 |3 6 34|[0] oooooooo oxooooox [MSB]
3309 09:27:24.115940 995 |3 6 35|[0] oooooooo oxooooox [MSB]
3310 09:27:24.119235 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3311 09:27:24.122636 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3312 09:27:24.126179 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3313 09:27:24.129623 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3314 09:27:24.132334 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3315 09:27:24.136002 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3316 09:27:24.138818 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
3317 09:27:24.142443 1003 |3 6 43|[0] ooxxxoxx xxxxxxxx [MSB]
3318 09:27:24.148624 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
3319 09:27:24.152050 Byte0, DQ PI dly=991, DQM PI dly= 991
3320 09:27:24.155485 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3321 09:27:24.155578
3322 09:27:24.158457 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3323 09:27:24.158556
3324 09:27:24.162039 Byte1, DQ PI dly=985, DQM PI dly= 985
3325 09:27:24.168264 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3326 09:27:24.168336
3327 09:27:24.171892 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3328 09:27:24.171989
3329 09:27:24.172081 ==
3330 09:27:24.178283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3331 09:27:24.181632 fsp= 1, odt_onoff= 1, Byte mode= 0
3332 09:27:24.181727 ==
3333 09:27:24.184977 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3334 09:27:24.185049
3335 09:27:24.188339 Begin, DQ Scan Range 961~1025
3336 09:27:24.191491 Write Rank1 MR14 =0x0
3337 09:27:24.197599
3338 09:27:24.197671 CH=1, VrefRange= 0, VrefLevel = 0
3339 09:27:24.203965 TX Bit0 (985~998) 14 991, Bit8 (978~991) 14 984,
3340 09:27:24.207115 TX Bit1 (984~997) 14 990, Bit9 (978~988) 11 983,
3341 09:27:24.213780 TX Bit2 (982~996) 15 989, Bit10 (980~993) 14 986,
3342 09:27:24.217282 TX Bit3 (980~992) 13 986, Bit11 (980~993) 14 986,
3343 09:27:24.220312 TX Bit4 (984~998) 15 991, Bit12 (981~992) 12 986,
3344 09:27:24.227369 TX Bit5 (985~998) 14 991, Bit13 (982~994) 13 988,
3345 09:27:24.230050 TX Bit6 (984~998) 15 991, Bit14 (981~992) 12 986,
3346 09:27:24.237111 TX Bit7 (984~998) 15 991, Bit15 (976~985) 10 980,
3347 09:27:24.237190
3348 09:27:24.237249 Write Rank1 MR14 =0x2
3349 09:27:24.245622
3350 09:27:24.245703 CH=1, VrefRange= 0, VrefLevel = 2
3351 09:27:24.251885 TX Bit0 (985~999) 15 992, Bit8 (977~992) 16 984,
3352 09:27:24.255528 TX Bit1 (984~998) 15 991, Bit9 (977~989) 13 983,
3353 09:27:24.262368 TX Bit2 (982~997) 16 989, Bit10 (979~993) 15 986,
3354 09:27:24.265065 TX Bit3 (979~993) 15 986, Bit11 (980~994) 15 987,
3355 09:27:24.268560 TX Bit4 (983~999) 17 991, Bit12 (980~994) 15 987,
3356 09:27:24.274909 TX Bit5 (985~999) 15 992, Bit13 (981~994) 14 987,
3357 09:27:24.278508 TX Bit6 (984~999) 16 991, Bit14 (980~993) 14 986,
3358 09:27:24.284739 TX Bit7 (984~999) 16 991, Bit15 (974~986) 13 980,
3359 09:27:24.284817
3360 09:27:24.284876 Write Rank1 MR14 =0x4
3361 09:27:24.293748
3362 09:27:24.293825 CH=1, VrefRange= 0, VrefLevel = 4
3363 09:27:24.300136 TX Bit0 (985~999) 15 992, Bit8 (977~992) 16 984,
3364 09:27:24.303431 TX Bit1 (983~999) 17 991, Bit9 (978~990) 13 984,
3365 09:27:24.309771 TX Bit2 (981~998) 18 989, Bit10 (979~994) 16 986,
3366 09:27:24.313089 TX Bit3 (979~994) 16 986, Bit11 (980~994) 15 987,
3367 09:27:24.316652 TX Bit4 (983~999) 17 991, Bit12 (980~994) 15 987,
3368 09:27:24.323217 TX Bit5 (984~999) 16 991, Bit13 (980~995) 16 987,
3369 09:27:24.326451 TX Bit6 (983~999) 17 991, Bit14 (981~994) 14 987,
3370 09:27:24.332718 TX Bit7 (984~999) 16 991, Bit15 (974~986) 13 980,
3371 09:27:24.332816
3372 09:27:24.332879 Write Rank1 MR14 =0x6
3373 09:27:24.341389
3374 09:27:24.341467 CH=1, VrefRange= 0, VrefLevel = 6
3375 09:27:24.348364 TX Bit0 (985~1000) 16 992, Bit8 (977~992) 16 984,
3376 09:27:24.351254 TX Bit1 (983~1000) 18 991, Bit9 (977~991) 15 984,
3377 09:27:24.358439 TX Bit2 (981~998) 18 989, Bit10 (979~994) 16 986,
3378 09:27:24.361317 TX Bit3 (978~995) 18 986, Bit11 (979~994) 16 986,
3379 09:27:24.364747 TX Bit4 (983~999) 17 991, Bit12 (980~994) 15 987,
3380 09:27:24.371151 TX Bit5 (984~1000) 17 992, Bit13 (980~996) 17 988,
3381 09:27:24.374653 TX Bit6 (983~1000) 18 991, Bit14 (980~994) 15 987,
3382 09:27:24.380998 TX Bit7 (984~999) 16 991, Bit15 (973~987) 15 980,
3383 09:27:24.381109
3384 09:27:24.381173 Write Rank1 MR14 =0x8
3385 09:27:24.390323
3386 09:27:24.390393 CH=1, VrefRange= 0, VrefLevel = 8
3387 09:27:24.397112 TX Bit0 (984~1001) 18 992, Bit8 (976~993) 18 984,
3388 09:27:24.399995 TX Bit1 (983~1000) 18 991, Bit9 (977~991) 15 984,
3389 09:27:24.406489 TX Bit2 (981~999) 19 990, Bit10 (979~995) 17 987,
3390 09:27:24.410014 TX Bit3 (978~996) 19 987, Bit11 (979~995) 17 987,
3391 09:27:24.413468 TX Bit4 (983~1000) 18 991, Bit12 (979~995) 17 987,
3392 09:27:24.420145 TX Bit5 (984~1000) 17 992, Bit13 (979~997) 19 988,
3393 09:27:24.422945 TX Bit6 (983~1000) 18 991, Bit14 (980~995) 16 987,
3394 09:27:24.429664 TX Bit7 (983~1000) 18 991, Bit15 (973~988) 16 980,
3395 09:27:24.429772
3396 09:27:24.429860 Write Rank1 MR14 =0xa
3397 09:27:24.439519
3398 09:27:24.442360 CH=1, VrefRange= 0, VrefLevel = 10
3399 09:27:24.445975 TX Bit0 (984~1001) 18 992, Bit8 (976~993) 18 984,
3400 09:27:24.448788 TX Bit1 (982~1001) 20 991, Bit9 (976~992) 17 984,
3401 09:27:24.455723 TX Bit2 (980~999) 20 989, Bit10 (978~996) 19 987,
3402 09:27:24.459078 TX Bit3 (978~997) 20 987, Bit11 (979~996) 18 987,
3403 09:27:24.465472 TX Bit4 (982~1001) 20 991, Bit12 (979~996) 18 987,
3404 09:27:24.468285 TX Bit5 (984~1001) 18 992, Bit13 (979~997) 19 988,
3405 09:27:24.471598 TX Bit6 (983~1001) 19 992, Bit14 (979~996) 18 987,
3406 09:27:24.478670 TX Bit7 (983~1001) 19 992, Bit15 (972~990) 19 981,
3407 09:27:24.478756
3408 09:27:24.478823 Write Rank1 MR14 =0xc
3409 09:27:24.487977
3410 09:27:24.491571 CH=1, VrefRange= 0, VrefLevel = 12
3411 09:27:24.495059 TX Bit0 (984~1002) 19 993, Bit8 (975~994) 20 984,
3412 09:27:24.497843 TX Bit1 (982~1002) 21 992, Bit9 (976~992) 17 984,
3413 09:27:24.504842 TX Bit2 (981~1000) 20 990, Bit10 (978~997) 20 987,
3414 09:27:24.507904 TX Bit3 (977~997) 21 987, Bit11 (979~997) 19 988,
3415 09:27:24.514178 TX Bit4 (982~1001) 20 991, Bit12 (979~996) 18 987,
3416 09:27:24.517616 TX Bit5 (984~1002) 19 993, Bit13 (979~998) 20 988,
3417 09:27:24.521055 TX Bit6 (982~1001) 20 991, Bit14 (979~996) 18 987,
3418 09:27:24.527816 TX Bit7 (983~1001) 19 992, Bit15 (972~991) 20 981,
3419 09:27:24.527893
3420 09:27:24.527954 Write Rank1 MR14 =0xe
3421 09:27:24.537648
3422 09:27:24.540378 CH=1, VrefRange= 0, VrefLevel = 14
3423 09:27:24.544231 TX Bit0 (984~1002) 19 993, Bit8 (974~993) 20 983,
3424 09:27:24.547070 TX Bit1 (982~1002) 21 992, Bit9 (975~992) 18 983,
3425 09:27:24.553506 TX Bit2 (979~1000) 22 989, Bit10 (978~997) 20 987,
3426 09:27:24.557061 TX Bit3 (977~998) 22 987, Bit11 (978~998) 21 988,
3427 09:27:24.563432 TX Bit4 (982~1002) 21 992, Bit12 (979~997) 19 988,
3428 09:27:24.566617 TX Bit5 (984~1002) 19 993, Bit13 (979~999) 21 989,
3429 09:27:24.570004 TX Bit6 (982~1002) 21 992, Bit14 (979~997) 19 988,
3430 09:27:24.577137 TX Bit7 (983~1002) 20 992, Bit15 (972~991) 20 981,
3431 09:27:24.577237
3432 09:27:24.577331 Write Rank1 MR14 =0x10
3433 09:27:24.586903
3434 09:27:24.590469 CH=1, VrefRange= 0, VrefLevel = 16
3435 09:27:24.593345 TX Bit0 (984~1003) 20 993, Bit8 (974~995) 22 984,
3436 09:27:24.597019 TX Bit1 (981~1003) 23 992, Bit9 (975~993) 19 984,
3437 09:27:24.603404 TX Bit2 (980~1000) 21 990, Bit10 (978~998) 21 988,
3438 09:27:24.606911 TX Bit3 (977~998) 22 987, Bit11 (978~998) 21 988,
3439 09:27:24.613124 TX Bit4 (982~1002) 21 992, Bit12 (978~998) 21 988,
3440 09:27:24.616080 TX Bit5 (983~1003) 21 993, Bit13 (979~999) 21 989,
3441 09:27:24.619435 TX Bit6 (981~1002) 22 991, Bit14 (979~998) 20 988,
3442 09:27:24.625926 TX Bit7 (982~1002) 21 992, Bit15 (972~992) 21 982,
3443 09:27:24.626065
3444 09:27:24.626143 Write Rank1 MR14 =0x12
3445 09:27:24.636656
3446 09:27:24.639463 CH=1, VrefRange= 0, VrefLevel = 18
3447 09:27:24.642771 TX Bit0 (983~1004) 22 993, Bit8 (975~995) 21 985,
3448 09:27:24.646091 TX Bit1 (981~1003) 23 992, Bit9 (974~993) 20 983,
3449 09:27:24.652833 TX Bit2 (979~1001) 23 990, Bit10 (978~999) 22 988,
3450 09:27:24.656074 TX Bit3 (977~999) 23 988, Bit11 (978~999) 22 988,
3451 09:27:24.662386 TX Bit4 (981~1003) 23 992, Bit12 (978~999) 22 988,
3452 09:27:24.665943 TX Bit5 (983~1004) 22 993, Bit13 (978~999) 22 988,
3453 09:27:24.669474 TX Bit6 (981~1002) 22 991, Bit14 (978~999) 22 988,
3454 09:27:24.675533 TX Bit7 (982~1003) 22 992, Bit15 (972~992) 21 982,
3455 09:27:24.675619
3456 09:27:24.675691 Write Rank1 MR14 =0x14
3457 09:27:24.686473
3458 09:27:24.689376 CH=1, VrefRange= 0, VrefLevel = 20
3459 09:27:24.692810 TX Bit0 (983~1005) 23 994, Bit8 (974~996) 23 985,
3460 09:27:24.695513 TX Bit1 (981~1004) 24 992, Bit9 (973~994) 22 983,
3461 09:27:24.701995 TX Bit2 (979~1001) 23 990, Bit10 (977~999) 23 988,
3462 09:27:24.705426 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3463 09:27:24.712251 TX Bit4 (981~1004) 24 992, Bit12 (978~999) 22 988,
3464 09:27:24.715704 TX Bit5 (983~1005) 23 994, Bit13 (978~1000) 23 989,
3465 09:27:24.718612 TX Bit6 (981~1004) 24 992, Bit14 (978~999) 22 988,
3466 09:27:24.725603 TX Bit7 (981~1004) 24 992, Bit15 (971~993) 23 982,
3467 09:27:24.725678
3468 09:27:24.728445 Write Rank1 MR14 =0x16
3469 09:27:24.735695
3470 09:27:24.738989 CH=1, VrefRange= 0, VrefLevel = 22
3471 09:27:24.742364 TX Bit0 (983~1005) 23 994, Bit8 (973~996) 24 984,
3472 09:27:24.745697 TX Bit1 (980~1005) 26 992, Bit9 (973~994) 22 983,
3473 09:27:24.752208 TX Bit2 (978~1002) 25 990, Bit10 (977~999) 23 988,
3474 09:27:24.755741 TX Bit3 (977~999) 23 988, Bit11 (977~1000) 24 988,
3475 09:27:24.762402 TX Bit4 (980~1004) 25 992, Bit12 (978~999) 22 988,
3476 09:27:24.765629 TX Bit5 (983~1005) 23 994, Bit13 (978~1000) 23 989,
3477 09:27:24.768861 TX Bit6 (980~1004) 25 992, Bit14 (978~999) 22 988,
3478 09:27:24.775410 TX Bit7 (981~1004) 24 992, Bit15 (971~993) 23 982,
3479 09:27:24.775503
3480 09:27:24.778208 Write Rank1 MR14 =0x18
3481 09:27:24.785781
3482 09:27:24.789067 CH=1, VrefRange= 0, VrefLevel = 24
3483 09:27:24.792526 TX Bit0 (983~1005) 23 994, Bit8 (972~997) 26 984,
3484 09:27:24.795342 TX Bit1 (980~1005) 26 992, Bit9 (973~995) 23 984,
3485 09:27:24.802451 TX Bit2 (978~1003) 26 990, Bit10 (977~1000) 24 988,
3486 09:27:24.805392 TX Bit3 (976~999) 24 987, Bit11 (977~1000) 24 988,
3487 09:27:24.811889 TX Bit4 (980~1005) 26 992, Bit12 (977~1000) 24 988,
3488 09:27:24.815469 TX Bit5 (982~1005) 24 993, Bit13 (978~1000) 23 989,
3489 09:27:24.818228 TX Bit6 (980~1005) 26 992, Bit14 (977~999) 23 988,
3490 09:27:24.825005 TX Bit7 (980~1005) 26 992, Bit15 (971~994) 24 982,
3491 09:27:24.825085
3492 09:27:24.828458 Write Rank1 MR14 =0x1a
3493 09:27:24.835593
3494 09:27:24.839033 CH=1, VrefRange= 0, VrefLevel = 26
3495 09:27:24.842446 TX Bit0 (983~1006) 24 994, Bit8 (972~998) 27 985,
3496 09:27:24.845999 TX Bit1 (979~1005) 27 992, Bit9 (973~995) 23 984,
3497 09:27:24.852329 TX Bit2 (978~1003) 26 990, Bit10 (976~1000) 25 988,
3498 09:27:24.855698 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3499 09:27:24.862009 TX Bit4 (980~1005) 26 992, Bit12 (977~1000) 24 988,
3500 09:27:24.865651 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3501 09:27:24.871840 TX Bit6 (980~1005) 26 992, Bit14 (977~1000) 24 988,
3502 09:27:24.875007 TX Bit7 (981~1005) 25 993, Bit15 (971~994) 24 982,
3503 09:27:24.875088
3504 09:27:24.878391 Write Rank1 MR14 =0x1c
3505 09:27:24.886079
3506 09:27:24.889358 CH=1, VrefRange= 0, VrefLevel = 28
3507 09:27:24.892875 TX Bit0 (982~1006) 25 994, Bit8 (973~998) 26 985,
3508 09:27:24.896339 TX Bit1 (979~1006) 28 992, Bit9 (973~995) 23 984,
3509 09:27:24.902485 TX Bit2 (977~1004) 28 990, Bit10 (976~1000) 25 988,
3510 09:27:24.905930 TX Bit3 (976~1000) 25 988, Bit11 (977~1000) 24 988,
3511 09:27:24.912218 TX Bit4 (979~1006) 28 992, Bit12 (977~1000) 24 988,
3512 09:27:24.915970 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3513 09:27:24.922443 TX Bit6 (980~1006) 27 993, Bit14 (977~1000) 24 988,
3514 09:27:24.925346 TX Bit7 (980~1006) 27 993, Bit15 (971~994) 24 982,
3515 09:27:24.925419
3516 09:27:24.928838 Write Rank1 MR14 =0x1e
3517 09:27:24.936850
3518 09:27:24.940329 CH=1, VrefRange= 0, VrefLevel = 30
3519 09:27:24.943226 TX Bit0 (982~1007) 26 994, Bit8 (973~997) 25 985,
3520 09:27:24.946777 TX Bit1 (980~1006) 27 993, Bit9 (972~996) 25 984,
3521 09:27:24.953105 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3522 09:27:24.956350 TX Bit3 (976~1001) 26 988, Bit11 (977~1000) 24 988,
3523 09:27:24.962621 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3524 09:27:24.965874 TX Bit5 (981~1006) 26 993, Bit13 (977~1001) 25 989,
3525 09:27:24.972909 TX Bit6 (980~1006) 27 993, Bit14 (976~1000) 25 988,
3526 09:27:24.975801 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3527 09:27:24.975870
3528 09:27:24.979382 Write Rank1 MR14 =0x20
3529 09:27:24.987245
3530 09:27:24.991079 CH=1, VrefRange= 0, VrefLevel = 32
3531 09:27:24.993651 TX Bit0 (982~1007) 26 994, Bit8 (973~997) 25 985,
3532 09:27:24.997241 TX Bit1 (980~1006) 27 993, Bit9 (972~996) 25 984,
3533 09:27:25.003504 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3534 09:27:25.006934 TX Bit3 (976~1001) 26 988, Bit11 (977~1000) 24 988,
3535 09:27:25.013913 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3536 09:27:25.016652 TX Bit5 (981~1006) 26 993, Bit13 (977~1001) 25 989,
3537 09:27:25.023089 TX Bit6 (980~1006) 27 993, Bit14 (976~1000) 25 988,
3538 09:27:25.026623 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3539 09:27:25.026699
3540 09:27:25.029513 Write Rank1 MR14 =0x22
3541 09:27:25.038086
3542 09:27:25.040876 CH=1, VrefRange= 0, VrefLevel = 34
3543 09:27:25.044168 TX Bit0 (982~1007) 26 994, Bit8 (973~997) 25 985,
3544 09:27:25.047532 TX Bit1 (980~1006) 27 993, Bit9 (972~996) 25 984,
3545 09:27:25.054208 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3546 09:27:25.057807 TX Bit3 (976~1001) 26 988, Bit11 (977~1000) 24 988,
3547 09:27:25.064077 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3548 09:27:25.067614 TX Bit5 (981~1006) 26 993, Bit13 (977~1001) 25 989,
3549 09:27:25.073984 TX Bit6 (980~1006) 27 993, Bit14 (976~1000) 25 988,
3550 09:27:25.077262 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3551 09:27:25.077340
3552 09:27:25.080445 Write Rank1 MR14 =0x24
3553 09:27:25.088732
3554 09:27:25.091385 CH=1, VrefRange= 0, VrefLevel = 36
3555 09:27:25.094636 TX Bit0 (982~1007) 26 994, Bit8 (973~997) 25 985,
3556 09:27:25.097871 TX Bit1 (980~1006) 27 993, Bit9 (972~996) 25 984,
3557 09:27:25.104934 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3558 09:27:25.107759 TX Bit3 (976~1001) 26 988, Bit11 (977~1000) 24 988,
3559 09:27:25.114783 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3560 09:27:25.118108 TX Bit5 (981~1006) 26 993, Bit13 (977~1001) 25 989,
3561 09:27:25.124305 TX Bit6 (980~1006) 27 993, Bit14 (976~1000) 25 988,
3562 09:27:25.127916 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3563 09:27:25.127987
3564 09:27:25.128060
3565 09:27:25.131424 TX Vref found, early break! 385< 391
3566 09:27:25.134229 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3567 09:27:25.137811 u1DelayCellOfst[0]=7 cells (6 PI)
3568 09:27:25.140741 u1DelayCellOfst[1]=6 cells (5 PI)
3569 09:27:25.144302 u1DelayCellOfst[2]=3 cells (3 PI)
3570 09:27:25.147131 u1DelayCellOfst[3]=0 cells (0 PI)
3571 09:27:25.150634 u1DelayCellOfst[4]=6 cells (5 PI)
3572 09:27:25.153792 u1DelayCellOfst[5]=6 cells (5 PI)
3573 09:27:25.157253 u1DelayCellOfst[6]=6 cells (5 PI)
3574 09:27:25.160547 u1DelayCellOfst[7]=6 cells (5 PI)
3575 09:27:25.163787 Byte0, DQ PI dly=988, DQM PI dly= 991
3576 09:27:25.167069 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3577 09:27:25.167164
3578 09:27:25.173723 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3579 09:27:25.173845
3580 09:27:25.177227 u1DelayCellOfst[8]=3 cells (3 PI)
3581 09:27:25.177295 u1DelayCellOfst[9]=2 cells (2 PI)
3582 09:27:25.179939 u1DelayCellOfst[10]=6 cells (5 PI)
3583 09:27:25.183646 u1DelayCellOfst[11]=7 cells (6 PI)
3584 09:27:25.186876 u1DelayCellOfst[12]=7 cells (6 PI)
3585 09:27:25.190124 u1DelayCellOfst[13]=9 cells (7 PI)
3586 09:27:25.193441 u1DelayCellOfst[14]=7 cells (6 PI)
3587 09:27:25.196253 u1DelayCellOfst[15]=0 cells (0 PI)
3588 09:27:25.199894 Byte1, DQ PI dly=982, DQM PI dly= 985
3589 09:27:25.203501 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3590 09:27:25.206031
3591 09:27:25.209980 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3592 09:27:25.210052
3593 09:27:25.210124 Write Rank1 MR14 =0x1e
3594 09:27:25.213030
3595 09:27:25.213121 Final TX Range 0 Vref 30
3596 09:27:25.213210
3597 09:27:25.219861 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3598 09:27:25.219937
3599 09:27:25.225992 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3600 09:27:25.232950 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3601 09:27:25.242304 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3602 09:27:25.242378 Write Rank1 MR3 =0xb0
3603 09:27:25.245962 DramC Write-DBI on
3604 09:27:25.246030 ==
3605 09:27:25.249243 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3606 09:27:25.252151 fsp= 1, odt_onoff= 1, Byte mode= 0
3607 09:27:25.252236 ==
3608 09:27:25.259370 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3609 09:27:25.259458
3610 09:27:25.259545 Begin, DQ Scan Range 705~769
3611 09:27:25.261999
3612 09:27:25.262093
3613 09:27:25.262188 TX Vref Scan disable
3614 09:27:25.265494 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3615 09:27:25.269057 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3616 09:27:25.271987 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3617 09:27:25.275148 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3618 09:27:25.278292 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3619 09:27:25.282067 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3620 09:27:25.288495 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3621 09:27:25.291941 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3622 09:27:25.295144 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3623 09:27:25.298333 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3624 09:27:25.301431 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3625 09:27:25.304994 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3626 09:27:25.307897 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3627 09:27:25.311499 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3628 09:27:25.314458 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3629 09:27:25.317835 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3630 09:27:25.321032 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3631 09:27:25.324411 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3632 09:27:25.327438 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3633 09:27:25.337377 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3634 09:27:25.340865 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3635 09:27:25.343674 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3636 09:27:25.347210 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3637 09:27:25.350794 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3638 09:27:25.353643 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3639 09:27:25.357315 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3640 09:27:25.360197 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3641 09:27:25.363646 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3642 09:27:25.366519 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3643 09:27:25.370220 Byte0, DQ PI dly=737, DQM PI dly= 737
3644 09:27:25.376571 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3645 09:27:25.376646
3646 09:27:25.380022 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3647 09:27:25.380098
3648 09:27:25.382943 Byte1, DQ PI dly=729, DQM PI dly= 729
3649 09:27:25.386473 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3650 09:27:25.386573
3651 09:27:25.393380 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3652 09:27:25.393494
3653 09:27:25.399707 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3654 09:27:25.406235 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3655 09:27:25.412503 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3656 09:27:25.415532 Write Rank1 MR3 =0x30
3657 09:27:25.415603 DramC Write-DBI off
3658 09:27:25.415664
3659 09:27:25.415717 [DATLAT]
3660 09:27:25.419187 Freq=1600, CH1 RK1, use_rxtx_scan=0
3661 09:27:25.422717
3662 09:27:25.422789 DATLAT Default: 0x10
3663 09:27:25.426074 7, 0xFFFF, sum=0
3664 09:27:25.426151 8, 0xFFFF, sum=0
3665 09:27:25.428815 9, 0xFFFF, sum=0
3666 09:27:25.428889 10, 0xFFFF, sum=0
3667 09:27:25.432224 11, 0xFFFF, sum=0
3668 09:27:25.432331 12, 0xFFFF, sum=0
3669 09:27:25.435610 13, 0xFFFF, sum=0
3670 09:27:25.435696 14, 0x0, sum=1
3671 09:27:25.435755 15, 0x0, sum=2
3672 09:27:25.438950 16, 0x0, sum=3
3673 09:27:25.439017 17, 0x0, sum=4
3674 09:27:25.445549 pattern=2 first_step=14 total pass=5 best_step=16
3675 09:27:25.445651 ==
3676 09:27:25.448864 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3677 09:27:25.451601 fsp= 1, odt_onoff= 1, Byte mode= 0
3678 09:27:25.451671 ==
3679 09:27:25.455105 Start DQ dly to find pass range UseTestEngine =1
3680 09:27:25.462081 x-axis: bit #, y-axis: DQ dly (-127~63)
3681 09:27:25.462180 RX Vref Scan = 0
3682 09:27:25.464858 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3683 09:27:25.468498 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3684 09:27:25.471298 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3685 09:27:25.474880 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3686 09:27:25.478447 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3687 09:27:25.478525 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3688 09:27:25.481371 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3689 09:27:25.484970 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3690 09:27:25.487815 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3691 09:27:25.491374 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3692 09:27:25.494346 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3693 09:27:25.497892 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3694 09:27:25.501216 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3695 09:27:25.503920 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3696 09:27:25.504014 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3697 09:27:25.507993 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3698 09:27:25.510644 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3699 09:27:25.514079 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3700 09:27:25.517563 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3701 09:27:25.520990 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3702 09:27:25.523748 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3703 09:27:25.527210 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3704 09:27:25.527287 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3705 09:27:25.530673 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3706 09:27:25.533835 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3707 09:27:25.537385 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3708 09:27:25.540597 0, [0] xxxoxxxx xxxxxxxo [MSB]
3709 09:27:25.543695 1, [0] xxxoxxxx xoxxxxxo [MSB]
3710 09:27:25.546820 2, [0] xxxoxxxx ooxxxxxo [MSB]
3711 09:27:25.546925 3, [0] xoooxxxx ooxxxxxo [MSB]
3712 09:27:25.550213 4, [0] xooooxxx oooxxxxo [MSB]
3713 09:27:25.553308 5, [0] xoooooxo oooxxxxo [MSB]
3714 09:27:25.557129 6, [0] ooooooxo ooooxxoo [MSB]
3715 09:27:25.560252 32, [0] oooxoooo ooooooox [MSB]
3716 09:27:25.563678 33, [0] oooxoooo ooooooox [MSB]
3717 09:27:25.566923 34, [0] oooxoooo xoooooox [MSB]
3718 09:27:25.570339 35, [0] ooxxoooo xxooooox [MSB]
3719 09:27:25.573220 36, [0] ooxxoooo xxooooox [MSB]
3720 09:27:25.576791 37, [0] ooxxoooo xxooooox [MSB]
3721 09:27:25.580104 38, [0] ooxxooox xxooooox [MSB]
3722 09:27:25.580192 39, [0] xxxxxoox xxxoxoox [MSB]
3723 09:27:25.583042 40, [0] xxxxxoox xxxxxxxx [MSB]
3724 09:27:25.586666 41, [0] xxxxxxxx xxxxxxxx [MSB]
3725 09:27:25.589517 iDelay=41, Bit 0, Center 22 (6 ~ 38) 33
3726 09:27:25.593017 iDelay=41, Bit 1, Center 20 (3 ~ 38) 36
3727 09:27:25.596612 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3728 09:27:25.599436 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
3729 09:27:25.606034 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
3730 09:27:25.609625 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3731 09:27:25.612976 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3732 09:27:25.615965 iDelay=41, Bit 7, Center 21 (5 ~ 37) 33
3733 09:27:25.619183 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3734 09:27:25.622747 iDelay=41, Bit 9, Center 17 (1 ~ 34) 34
3735 09:27:25.625650 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3736 09:27:25.629223 iDelay=41, Bit 11, Center 22 (6 ~ 39) 34
3737 09:27:25.632096 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3738 09:27:25.635435 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3739 09:27:25.639001 iDelay=41, Bit 14, Center 22 (6 ~ 39) 34
3740 09:27:25.645782 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
3741 09:27:25.645858 ==
3742 09:27:25.648908 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3743 09:27:25.652100 fsp= 1, odt_onoff= 1, Byte mode= 0
3744 09:27:25.652179 ==
3745 09:27:25.655318 DQS Delay:
3746 09:27:25.655391 DQS0 = 0, DQS1 = 0
3747 09:27:25.655466 DQM Delay:
3748 09:27:25.658441 DQM0 = 20, DQM1 = 19
3749 09:27:25.658511 DQ Delay:
3750 09:27:25.661841 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =15
3751 09:27:25.664883 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =21
3752 09:27:25.668130 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
3753 09:27:25.671423 DQ12 =22, DQ13 =23, DQ14 =22, DQ15 =15
3754 09:27:25.671525
3755 09:27:25.671603
3756 09:27:25.671696
3757 09:27:25.674968 [DramC_TX_OE_Calibration] TA2
3758 09:27:25.678024 Original DQ_B0 (3 6) =30, OEN = 27
3759 09:27:25.681178 Original DQ_B1 (3 6) =30, OEN = 27
3760 09:27:25.685149 23, 0x0, End_B0=23 End_B1=23
3761 09:27:25.688289 24, 0x0, End_B0=24 End_B1=24
3762 09:27:25.688382 25, 0x0, End_B0=25 End_B1=25
3763 09:27:25.691768 26, 0x0, End_B0=26 End_B1=26
3764 09:27:25.694653 27, 0x0, End_B0=27 End_B1=27
3765 09:27:25.698188 28, 0x0, End_B0=28 End_B1=28
3766 09:27:25.701040 29, 0x0, End_B0=29 End_B1=29
3767 09:27:25.701118 30, 0x0, End_B0=30 End_B1=30
3768 09:27:25.704760 31, 0xFFFF, End_B0=30 End_B1=30
3769 09:27:25.711019 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3770 09:27:25.717369 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3771 09:27:25.717460
3772 09:27:25.717598
3773 09:27:25.717671 Write Rank1 MR23 =0x3f
3774 09:27:25.720876 [DQSOSC]
3775 09:27:25.727520 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3776 09:27:25.733780 CH1_RK1: MR19=0x202, MR18=0xB1B1, DQSOSC=457, MR23=63, INC=11, DEC=17
3777 09:27:25.737375 Write Rank1 MR23 =0x3f
3778 09:27:25.737453 [DQSOSC]
3779 09:27:25.743757 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3780 09:27:25.747305 CH1 RK1: MR19=202, MR18=B4B4
3781 09:27:25.750262 [RxdqsGatingPostProcess] freq 1600
3782 09:27:25.757035 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3783 09:27:25.757111 Rank: 0
3784 09:27:25.760363 best DQS0 dly(2T, 0.5T) = (2, 6)
3785 09:27:25.763825 best DQS1 dly(2T, 0.5T) = (2, 6)
3786 09:27:25.766699 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3787 09:27:25.769992 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3788 09:27:25.770069 Rank: 1
3789 09:27:25.773426 best DQS0 dly(2T, 0.5T) = (2, 6)
3790 09:27:25.776451 best DQS1 dly(2T, 0.5T) = (2, 6)
3791 09:27:25.779825 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3792 09:27:25.783287 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3793 09:27:25.786760 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3794 09:27:25.789934 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3795 09:27:25.796501 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3796 09:27:25.796579
3797 09:27:25.796638
3798 09:27:25.799836 [Calibration Summary] Freqency 1600
3799 09:27:25.799912 CH 0, Rank 0
3800 09:27:25.799971 All Pass.
3801 09:27:25.800024
3802 09:27:25.802743 CH 0, Rank 1
3803 09:27:25.802819 All Pass.
3804 09:27:25.802892
3805 09:27:25.802960 CH 1, Rank 0
3806 09:27:25.806157 All Pass.
3807 09:27:25.806263
3808 09:27:25.806340 CH 1, Rank 1
3809 09:27:25.806395 All Pass.
3810 09:27:25.809542
3811 09:27:25.812482 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3812 09:27:25.822997 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3813 09:27:25.829221 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3814 09:27:25.829301 Write Rank0 MR3 =0xb0
3815 09:27:25.835455 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3816 09:27:25.845809 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3817 09:27:25.852212 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3818 09:27:25.852291 Write Rank1 MR3 =0xb0
3819 09:27:25.858527 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3820 09:27:25.864856 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3821 09:27:25.874626 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3822 09:27:25.874706 Write Rank0 MR3 =0xb0
3823 09:27:25.881512 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3824 09:27:25.888403 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3825 09:27:25.894559 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3826 09:27:25.898054 Write Rank1 MR3 =0xb0
3827 09:27:25.898128 DramC Write-DBI on
3828 09:27:25.901390 [GetDramInforAfterCalByMRR] Vendor 6.
3829 09:27:25.907756 [GetDramInforAfterCalByMRR] Revision 505.
3830 09:27:25.907855 MR8 1111
3831 09:27:25.911325 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3832 09:27:25.914778 MR8 1111
3833 09:27:25.918015 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3834 09:27:25.918110 MR8 1111
3835 09:27:25.923946 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3836 09:27:25.924050 MR8 1111
3837 09:27:25.930991 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3838 09:27:25.937505 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3839 09:27:25.940360 Write Rank0 MR13 =0xd0
3840 09:27:25.943834 Write Rank1 MR13 =0xd0
3841 09:27:25.943905 Write Rank0 MR13 =0xd0
3842 09:27:25.947234 Write Rank1 MR13 =0xd0
3843 09:27:25.950749 Save calibration result to emmc
3844 09:27:25.950820
3845 09:27:25.950892
3846 09:27:25.953456 [DramcModeReg_Check] Freq_1600, FSP_1
3847 09:27:25.953532 FSP_1, CH_0, RK0
3848 09:27:25.956973 Write Rank0 MR13 =0xd8
3849 09:27:25.960670 MR12 = 0x5e (global = 0x5e) match
3850 09:27:25.963544 MR14 = 0x1e (global = 0x1e) match
3851 09:27:25.963671 FSP_1, CH_0, RK1
3852 09:27:25.967071 Write Rank1 MR13 =0xd8
3853 09:27:25.969798 MR12 = 0x5e (global = 0x5e) match
3854 09:27:25.973243 MR14 = 0x1c (global = 0x1c) match
3855 09:27:25.973337 FSP_1, CH_1, RK0
3856 09:27:25.976713 Write Rank0 MR13 =0xd8
3857 09:27:25.980290 MR12 = 0x5e (global = 0x5e) match
3858 09:27:25.983041 MR14 = 0x1e (global = 0x1e) match
3859 09:27:25.983114 FSP_1, CH_1, RK1
3860 09:27:25.986479 Write Rank1 MR13 =0xd8
3861 09:27:25.989979 MR12 = 0x5c (global = 0x5c) match
3862 09:27:25.992770 MR14 = 0x1e (global = 0x1e) match
3863 09:27:25.992861
3864 09:27:25.996134 [MEM_TEST] 02: After DFS, before run time config
3865 09:27:26.008693 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3866 09:27:26.008779
3867 09:27:26.008872 [TA2_TEST]
3868 09:27:26.008947 === TA2 HW
3869 09:27:26.011249 TA2 PAT: XTALK
3870 09:27:26.014675 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3871 09:27:26.021150 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3872 09:27:26.024721 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3873 09:27:26.031041 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3874 09:27:26.031117
3875 09:27:26.031176
3876 09:27:26.031230 Settings after calibration
3877 09:27:26.031283
3878 09:27:26.034954 [DramcRunTimeConfig]
3879 09:27:26.037634 TransferPLLToSPMControl - MODE SW PHYPLL
3880 09:27:26.040999 TX_TRACKING: ON
3881 09:27:26.041074 RX_TRACKING: ON
3882 09:27:26.041132 HW_GATING: ON
3883 09:27:26.044536 HW_GATING DBG: OFF
3884 09:27:26.044612 ddr_geometry:1
3885 09:27:26.048024 ddr_geometry:1
3886 09:27:26.048102 ddr_geometry:1
3887 09:27:26.051010 ddr_geometry:1
3888 09:27:26.051084 ddr_geometry:1
3889 09:27:26.054188 ddr_geometry:1
3890 09:27:26.054325 ddr_geometry:1
3891 09:27:26.054452 ddr_geometry:1
3892 09:27:26.057697 High Freq DUMMY_READ_FOR_TRACKING: ON
3893 09:27:26.060492 ZQCS_ENABLE_LP4: OFF
3894 09:27:26.064268 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3895 09:27:26.067668 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3896 09:27:26.070299 SPM_CONTROL_AFTERK: ON
3897 09:27:26.070374 IMPEDANCE_TRACKING: ON
3898 09:27:26.073924 TEMP_SENSOR: ON
3899 09:27:26.074000 PER_BANK_REFRESH: ON
3900 09:27:26.077322 HW_SAVE_FOR_SR: ON
3901 09:27:26.080911 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3902 09:27:26.083760 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3903 09:27:26.087205 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3904 09:27:26.087281 Read ODT Tracking: ON
3905 09:27:26.090064 =========================
3906 09:27:26.090139
3907 09:27:26.090197 [TA2_TEST]
3908 09:27:26.093762 === TA2 HW
3909 09:27:26.097442 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3910 09:27:26.103634 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3911 09:27:26.107198 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3912 09:27:26.113372 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3913 09:27:26.113450
3914 09:27:26.116966 [MEM_TEST] 03: After run time config
3915 09:27:26.126706 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3916 09:27:26.129536 [complex_mem_test] start addr:0x40024000, len:131072
3917 09:27:26.334338 1st complex R/W mem test pass
3918 09:27:26.340694 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3919 09:27:26.343518 sync preloader write leveling
3920 09:27:26.347257 sync preloader cbt_mr12
3921 09:27:26.350630 sync preloader cbt_clk_dly
3922 09:27:26.350724 sync preloader cbt_cmd_dly
3923 09:27:26.353462 sync preloader cbt_cs
3924 09:27:26.357238 sync preloader cbt_ca_perbit_delay
3925 09:27:26.359913 sync preloader clk_delay
3926 09:27:26.360026 sync preloader dqs_delay
3927 09:27:26.363352 sync preloader u1Gating2T_Save
3928 09:27:26.366873 sync preloader u1Gating05T_Save
3929 09:27:26.369648 sync preloader u1Gatingfine_tune_Save
3930 09:27:26.372998 sync preloader u1Gatingucpass_count_Save
3931 09:27:26.376294 sync preloader u1TxWindowPerbitVref_Save
3932 09:27:26.379521 sync preloader u1TxCenter_min_Save
3933 09:27:26.382681 sync preloader u1TxCenter_max_Save
3934 09:27:26.386277 sync preloader u1Txwin_center_Save
3935 09:27:26.389313 sync preloader u1Txfirst_pass_Save
3936 09:27:26.392488 sync preloader u1Txlast_pass_Save
3937 09:27:26.396268 sync preloader u1RxDatlat_Save
3938 09:27:26.399440 sync preloader u1RxWinPerbitVref_Save
3939 09:27:26.402578 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3940 09:27:26.405816 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3941 09:27:26.408979 sync preloader delay_cell_unit
3942 09:27:26.415961 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3943 09:27:26.418976 sync preloader write leveling
3944 09:27:26.422593 sync preloader cbt_mr12
3945 09:27:26.422675 sync preloader cbt_clk_dly
3946 09:27:26.425799 sync preloader cbt_cmd_dly
3947 09:27:26.429125 sync preloader cbt_cs
3948 09:27:26.432555 sync preloader cbt_ca_perbit_delay
3949 09:27:26.432633 sync preloader clk_delay
3950 09:27:26.435748 sync preloader dqs_delay
3951 09:27:26.439011 sync preloader u1Gating2T_Save
3952 09:27:26.441942 sync preloader u1Gating05T_Save
3953 09:27:26.445504 sync preloader u1Gatingfine_tune_Save
3954 09:27:26.449156 sync preloader u1Gatingucpass_count_Save
3955 09:27:26.452026 sync preloader u1TxWindowPerbitVref_Save
3956 09:27:26.455016 sync preloader u1TxCenter_min_Save
3957 09:27:26.458495 sync preloader u1TxCenter_max_Save
3958 09:27:26.462128 sync preloader u1Txwin_center_Save
3959 09:27:26.465120 sync preloader u1Txfirst_pass_Save
3960 09:27:26.468068 sync preloader u1Txlast_pass_Save
3961 09:27:26.471721 sync preloader u1RxDatlat_Save
3962 09:27:26.475279 sync preloader u1RxWinPerbitVref_Save
3963 09:27:26.478173 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3964 09:27:26.481609 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3965 09:27:26.484377 sync preloader delay_cell_unit
3966 09:27:26.491597 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3967 09:27:26.494199 sync preloader write leveling
3968 09:27:26.494303 sync preloader cbt_mr12
3969 09:27:26.497434 sync preloader cbt_clk_dly
3970 09:27:26.501096 sync preloader cbt_cmd_dly
3971 09:27:26.504351 sync preloader cbt_cs
3972 09:27:26.504446 sync preloader cbt_ca_perbit_delay
3973 09:27:26.507674 sync preloader clk_delay
3974 09:27:26.510865 sync preloader dqs_delay
3975 09:27:26.514017 sync preloader u1Gating2T_Save
3976 09:27:26.517712 sync preloader u1Gating05T_Save
3977 09:27:26.521055 sync preloader u1Gatingfine_tune_Save
3978 09:27:26.524356 sync preloader u1Gatingucpass_count_Save
3979 09:27:26.527600 sync preloader u1TxWindowPerbitVref_Save
3980 09:27:26.530392 sync preloader u1TxCenter_min_Save
3981 09:27:26.533777 sync preloader u1TxCenter_max_Save
3982 09:27:26.537199 sync preloader u1Txwin_center_Save
3983 09:27:26.540545 sync preloader u1Txfirst_pass_Save
3984 09:27:26.540642 sync preloader u1Txlast_pass_Save
3985 09:27:26.543995 sync preloader u1RxDatlat_Save
3986 09:27:26.547239 sync preloader u1RxWinPerbitVref_Save
3987 09:27:26.553744 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3988 09:27:26.556594 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3989 09:27:26.560106 sync preloader delay_cell_unit
3990 09:27:26.563082 just_for_test_dump_coreboot_params dump all params
3991 09:27:26.566684 dump source = 0x0
3992 09:27:26.566765 dump params frequency:1600
3993 09:27:26.570294 dump params rank number:2
3994 09:27:26.570376
3995 09:27:26.573164 dump params write leveling
3996 09:27:26.576648 write leveling[0][0][0] = 0x1f
3997 09:27:26.579604 write leveling[0][0][1] = 0x16
3998 09:27:26.579684 write leveling[0][1][0] = 0x20
3999 09:27:26.583214 write leveling[0][1][1] = 0x16
4000 09:27:26.585994 write leveling[1][0][0] = 0x24
4001 09:27:26.589450 write leveling[1][0][1] = 0x21
4002 09:27:26.593067 write leveling[1][1][0] = 0x21
4003 09:27:26.595935 write leveling[1][1][1] = 0x1e
4004 09:27:26.596013 dump params cbt_cs
4005 09:27:26.599600 cbt_cs[0][0] = 0x7
4006 09:27:26.599678 cbt_cs[0][1] = 0x7
4007 09:27:26.602535 cbt_cs[1][0] = 0x9
4008 09:27:26.602615 cbt_cs[1][1] = 0x9
4009 09:27:26.605955 dump params cbt_mr12
4010 09:27:26.606054 cbt_mr12[0][0] = 0x1e
4011 09:27:26.609294 cbt_mr12[0][1] = 0x1e
4012 09:27:26.612562 cbt_mr12[1][0] = 0x1e
4013 09:27:26.612645 cbt_mr12[1][1] = 0x1c
4014 09:27:26.615608 dump params tx window
4015 09:27:26.619045 tx_center_min[0][0][0] = 983
4016 09:27:26.619108 tx_center_max[0][0][0] = 989
4017 09:27:26.622794 tx_center_min[0][0][1] = 976
4018 09:27:26.625821 tx_center_max[0][0][1] = 984
4019 09:27:26.629003 tx_center_min[0][1][0] = 986
4020 09:27:26.632210 tx_center_max[0][1][0] = 993
4021 09:27:26.632305 tx_center_min[0][1][1] = 976
4022 09:27:26.635195 tx_center_max[0][1][1] = 984
4023 09:27:26.639038 tx_center_min[1][0][0] = 992
4024 09:27:26.642325 tx_center_max[1][0][0] = 997
4025 09:27:26.645693 tx_center_min[1][0][1] = 988
4026 09:27:26.645774 tx_center_max[1][0][1] = 993
4027 09:27:26.648922 tx_center_min[1][1][0] = 988
4028 09:27:26.652207 tx_center_max[1][1][0] = 994
4029 09:27:26.655506 tx_center_min[1][1][1] = 982
4030 09:27:26.658667 tx_center_max[1][1][1] = 989
4031 09:27:26.658762 dump params tx window
4032 09:27:26.662147 tx_win_center[0][0][0] = 989
4033 09:27:26.665017 tx_first_pass[0][0][0] = 977
4034 09:27:26.668623 tx_last_pass[0][0][0] = 1002
4035 09:27:26.668705 tx_win_center[0][0][1] = 989
4036 09:27:26.671494 tx_first_pass[0][0][1] = 977
4037 09:27:26.675278 tx_last_pass[0][0][1] = 1001
4038 09:27:26.677931 tx_win_center[0][0][2] = 989
4039 09:27:26.681473 tx_first_pass[0][0][2] = 977
4040 09:27:26.681652 tx_last_pass[0][0][2] = 1001
4041 09:27:26.685061 tx_win_center[0][0][3] = 983
4042 09:27:26.687912 tx_first_pass[0][0][3] = 972
4043 09:27:26.691521 tx_last_pass[0][0][3] = 995
4044 09:27:26.694368 tx_win_center[0][0][4] = 987
4045 09:27:26.694445 tx_first_pass[0][0][4] = 976
4046 09:27:26.698050 tx_last_pass[0][0][4] = 999
4047 09:27:26.700913 tx_win_center[0][0][5] = 986
4048 09:27:26.704401 tx_first_pass[0][0][5] = 975
4049 09:27:26.704502 tx_last_pass[0][0][5] = 998
4050 09:27:26.707793 tx_win_center[0][0][6] = 987
4051 09:27:26.711413 tx_first_pass[0][0][6] = 975
4052 09:27:26.714294 tx_last_pass[0][0][6] = 999
4053 09:27:26.717643 tx_win_center[0][0][7] = 988
4054 09:27:26.717712 tx_first_pass[0][0][7] = 976
4055 09:27:26.720977 tx_last_pass[0][0][7] = 1000
4056 09:27:26.724317 tx_win_center[0][0][8] = 976
4057 09:27:26.727779 tx_first_pass[0][0][8] = 965
4058 09:27:26.730432 tx_last_pass[0][0][8] = 988
4059 09:27:26.730541 tx_win_center[0][0][9] = 978
4060 09:27:26.733718 tx_first_pass[0][0][9] = 967
4061 09:27:26.737338 tx_last_pass[0][0][9] = 989
4062 09:27:26.740387 tx_win_center[0][0][10] = 984
4063 09:27:26.743929 tx_first_pass[0][0][10] = 972
4064 09:27:26.744000 tx_last_pass[0][0][10] = 996
4065 09:27:26.747304 tx_win_center[0][0][11] = 977
4066 09:27:26.750591 tx_first_pass[0][0][11] = 966
4067 09:27:26.753940 tx_last_pass[0][0][11] = 989
4068 09:27:26.756718 tx_win_center[0][0][12] = 978
4069 09:27:26.756796 tx_first_pass[0][0][12] = 967
4070 09:27:26.760306 tx_last_pass[0][0][12] = 990
4071 09:27:26.763454 tx_win_center[0][0][13] = 978
4072 09:27:26.766836 tx_first_pass[0][0][13] = 967
4073 09:27:26.770172 tx_last_pass[0][0][13] = 989
4074 09:27:26.773319 tx_win_center[0][0][14] = 979
4075 09:27:26.773414 tx_first_pass[0][0][14] = 967
4076 09:27:26.776503 tx_last_pass[0][0][14] = 992
4077 09:27:26.780076 tx_win_center[0][0][15] = 982
4078 09:27:26.782842 tx_first_pass[0][0][15] = 970
4079 09:27:26.786407 tx_last_pass[0][0][15] = 994
4080 09:27:26.786512 tx_win_center[0][1][0] = 993
4081 09:27:26.789277 tx_first_pass[0][1][0] = 981
4082 09:27:26.792911 tx_last_pass[0][1][0] = 1005
4083 09:27:26.796583 tx_win_center[0][1][1] = 991
4084 09:27:26.799442 tx_first_pass[0][1][1] = 979
4085 09:27:26.799551 tx_last_pass[0][1][1] = 1003
4086 09:27:26.802861 tx_win_center[0][1][2] = 992
4087 09:27:26.805768 tx_first_pass[0][1][2] = 980
4088 09:27:26.809185 tx_last_pass[0][1][2] = 1004
4089 09:27:26.812952 tx_win_center[0][1][3] = 986
4090 09:27:26.813054 tx_first_pass[0][1][3] = 975
4091 09:27:26.815750 tx_last_pass[0][1][3] = 998
4092 09:27:26.819346 tx_win_center[0][1][4] = 990
4093 09:27:26.822209 tx_first_pass[0][1][4] = 978
4094 09:27:26.825630 tx_last_pass[0][1][4] = 1002
4095 09:27:26.825737 tx_win_center[0][1][5] = 988
4096 09:27:26.829008 tx_first_pass[0][1][5] = 976
4097 09:27:26.832454 tx_last_pass[0][1][5] = 1000
4098 09:27:26.835194 tx_win_center[0][1][6] = 988
4099 09:27:26.839014 tx_first_pass[0][1][6] = 977
4100 09:27:26.839114 tx_last_pass[0][1][6] = 1000
4101 09:27:26.841717 tx_win_center[0][1][7] = 990
4102 09:27:26.845541 tx_first_pass[0][1][7] = 978
4103 09:27:26.848795 tx_last_pass[0][1][7] = 1003
4104 09:27:26.851835 tx_win_center[0][1][8] = 976
4105 09:27:26.851939 tx_first_pass[0][1][8] = 965
4106 09:27:26.855492 tx_last_pass[0][1][8] = 988
4107 09:27:26.858537 tx_win_center[0][1][9] = 978
4108 09:27:26.861458 tx_first_pass[0][1][9] = 967
4109 09:27:26.861567 tx_last_pass[0][1][9] = 989
4110 09:27:26.865148 tx_win_center[0][1][10] = 984
4111 09:27:26.868478 tx_first_pass[0][1][10] = 972
4112 09:27:26.871736 tx_last_pass[0][1][10] = 996
4113 09:27:26.875221 tx_win_center[0][1][11] = 977
4114 09:27:26.878008 tx_first_pass[0][1][11] = 966
4115 09:27:26.878086 tx_last_pass[0][1][11] = 989
4116 09:27:26.881340 tx_win_center[0][1][12] = 979
4117 09:27:26.884597 tx_first_pass[0][1][12] = 968
4118 09:27:26.888033 tx_last_pass[0][1][12] = 990
4119 09:27:26.891233 tx_win_center[0][1][13] = 978
4120 09:27:26.891338 tx_first_pass[0][1][13] = 967
4121 09:27:26.894767 tx_last_pass[0][1][13] = 989
4122 09:27:26.897618 tx_win_center[0][1][14] = 979
4123 09:27:26.901189 tx_first_pass[0][1][14] = 968
4124 09:27:26.903992 tx_last_pass[0][1][14] = 991
4125 09:27:26.907575 tx_win_center[0][1][15] = 982
4126 09:27:26.907677 tx_first_pass[0][1][15] = 971
4127 09:27:26.911221 tx_last_pass[0][1][15] = 994
4128 09:27:26.914019 tx_win_center[1][0][0] = 997
4129 09:27:26.917580 tx_first_pass[1][0][0] = 984
4130 09:27:26.921116 tx_last_pass[1][0][0] = 1010
4131 09:27:26.921212 tx_win_center[1][0][1] = 996
4132 09:27:26.923982 tx_first_pass[1][0][1] = 984
4133 09:27:26.927499 tx_last_pass[1][0][1] = 1008
4134 09:27:26.930397 tx_win_center[1][0][2] = 994
4135 09:27:26.934033 tx_first_pass[1][0][2] = 982
4136 09:27:26.934131 tx_last_pass[1][0][2] = 1006
4137 09:27:26.936841 tx_win_center[1][0][3] = 992
4138 09:27:26.940271 tx_first_pass[1][0][3] = 979
4139 09:27:26.943928 tx_last_pass[1][0][3] = 1005
4140 09:27:26.946800 tx_win_center[1][0][4] = 996
4141 09:27:26.946899 tx_first_pass[1][0][4] = 984
4142 09:27:26.950487 tx_last_pass[1][0][4] = 1009
4143 09:27:26.953250 tx_win_center[1][0][5] = 996
4144 09:27:26.956794 tx_first_pass[1][0][5] = 984
4145 09:27:26.960151 tx_last_pass[1][0][5] = 1009
4146 09:27:26.960253 tx_win_center[1][0][6] = 996
4147 09:27:26.963210 tx_first_pass[1][0][6] = 984
4148 09:27:26.966546 tx_last_pass[1][0][6] = 1009
4149 09:27:26.970007 tx_win_center[1][0][7] = 996
4150 09:27:26.973121 tx_first_pass[1][0][7] = 984
4151 09:27:26.973219 tx_last_pass[1][0][7] = 1008
4152 09:27:26.976158 tx_win_center[1][0][8] = 990
4153 09:27:26.979779 tx_first_pass[1][0][8] = 979
4154 09:27:26.983091 tx_last_pass[1][0][8] = 1001
4155 09:27:26.983197 tx_win_center[1][0][9] = 990
4156 09:27:26.986143 tx_first_pass[1][0][9] = 979
4157 09:27:26.989373 tx_last_pass[1][0][9] = 1001
4158 09:27:26.992755 tx_win_center[1][0][10] = 992
4159 09:27:26.996072 tx_first_pass[1][0][10] = 982
4160 09:27:26.999550 tx_last_pass[1][0][10] = 1003
4161 09:27:26.999654 tx_win_center[1][0][11] = 993
4162 09:27:27.002620 tx_first_pass[1][0][11] = 982
4163 09:27:27.005577 tx_last_pass[1][0][11] = 1004
4164 09:27:27.008929 tx_win_center[1][0][12] = 993
4165 09:27:27.012215 tx_first_pass[1][0][12] = 983
4166 09:27:27.015781 tx_last_pass[1][0][12] = 1004
4167 09:27:27.015883 tx_win_center[1][0][13] = 993
4168 09:27:27.019250 tx_first_pass[1][0][13] = 983
4169 09:27:27.022095 tx_last_pass[1][0][13] = 1004
4170 09:27:27.025656 tx_win_center[1][0][14] = 992
4171 09:27:27.029268 tx_first_pass[1][0][14] = 982
4172 09:27:27.029373 tx_last_pass[1][0][14] = 1003
4173 09:27:27.032149 tx_win_center[1][0][15] = 988
4174 09:27:27.035723 tx_first_pass[1][0][15] = 976
4175 09:27:27.038611 tx_last_pass[1][0][15] = 1000
4176 09:27:27.042119 tx_win_center[1][1][0] = 994
4177 09:27:27.042215 tx_first_pass[1][1][0] = 982
4178 09:27:27.045053 tx_last_pass[1][1][0] = 1007
4179 09:27:27.048629 tx_win_center[1][1][1] = 993
4180 09:27:27.052102 tx_first_pass[1][1][1] = 980
4181 09:27:27.054940 tx_last_pass[1][1][1] = 1006
4182 09:27:27.055035 tx_win_center[1][1][2] = 991
4183 09:27:27.058374 tx_first_pass[1][1][2] = 978
4184 09:27:27.061930 tx_last_pass[1][1][2] = 1004
4185 09:27:27.064712 tx_win_center[1][1][3] = 988
4186 09:27:27.068216 tx_first_pass[1][1][3] = 976
4187 09:27:27.068311 tx_last_pass[1][1][3] = 1001
4188 09:27:27.071761 tx_win_center[1][1][4] = 993
4189 09:27:27.074684 tx_first_pass[1][1][4] = 980
4190 09:27:27.078271 tx_last_pass[1][1][4] = 1006
4191 09:27:27.081366 tx_win_center[1][1][5] = 993
4192 09:27:27.081481 tx_first_pass[1][1][5] = 981
4193 09:27:27.084737 tx_last_pass[1][1][5] = 1006
4194 09:27:27.088147 tx_win_center[1][1][6] = 993
4195 09:27:27.091019 tx_first_pass[1][1][6] = 980
4196 09:27:27.094386 tx_last_pass[1][1][6] = 1006
4197 09:27:27.094480 tx_win_center[1][1][7] = 993
4198 09:27:27.097799 tx_first_pass[1][1][7] = 980
4199 09:27:27.100955 tx_last_pass[1][1][7] = 1006
4200 09:27:27.104022 tx_win_center[1][1][8] = 985
4201 09:27:27.107333 tx_first_pass[1][1][8] = 973
4202 09:27:27.107435 tx_last_pass[1][1][8] = 997
4203 09:27:27.111231 tx_win_center[1][1][9] = 984
4204 09:27:27.114349 tx_first_pass[1][1][9] = 972
4205 09:27:27.117580 tx_last_pass[1][1][9] = 996
4206 09:27:27.120974 tx_win_center[1][1][10] = 987
4207 09:27:27.121072 tx_first_pass[1][1][10] = 975
4208 09:27:27.124072 tx_last_pass[1][1][10] = 1000
4209 09:27:27.127273 tx_win_center[1][1][11] = 988
4210 09:27:27.130812 tx_first_pass[1][1][11] = 977
4211 09:27:27.133685 tx_last_pass[1][1][11] = 1000
4212 09:27:27.133756 tx_win_center[1][1][12] = 988
4213 09:27:27.137172 tx_first_pass[1][1][12] = 977
4214 09:27:27.140655 tx_last_pass[1][1][12] = 1000
4215 09:27:27.143519 tx_win_center[1][1][13] = 989
4216 09:27:27.146991 tx_first_pass[1][1][13] = 977
4217 09:27:27.150345 tx_last_pass[1][1][13] = 1001
4218 09:27:27.150445 tx_win_center[1][1][14] = 988
4219 09:27:27.153224 tx_first_pass[1][1][14] = 976
4220 09:27:27.156797 tx_last_pass[1][1][14] = 1000
4221 09:27:27.160278 tx_win_center[1][1][15] = 982
4222 09:27:27.163014 tx_first_pass[1][1][15] = 970
4223 09:27:27.166251 tx_last_pass[1][1][15] = 994
4224 09:27:27.166354 dump params rx window
4225 09:27:27.169777 rx_firspass[0][0][0] = 5
4226 09:27:27.173362 rx_lastpass[0][0][0] = 39
4227 09:27:27.173460 rx_firspass[0][0][1] = 5
4228 09:27:27.176123 rx_lastpass[0][0][1] = 36
4229 09:27:27.179822 rx_firspass[0][0][2] = 7
4230 09:27:27.179893 rx_lastpass[0][0][2] = 37
4231 09:27:27.182637 rx_firspass[0][0][3] = -1
4232 09:27:27.186203 rx_lastpass[0][0][3] = 30
4233 09:27:27.189627 rx_firspass[0][0][4] = 5
4234 09:27:27.189721 rx_lastpass[0][0][4] = 36
4235 09:27:27.192949 rx_firspass[0][0][5] = 1
4236 09:27:27.196369 rx_lastpass[0][0][5] = 33
4237 09:27:27.196440 rx_firspass[0][0][6] = 5
4238 09:27:27.199129 rx_lastpass[0][0][6] = 34
4239 09:27:27.202730 rx_firspass[0][0][7] = 7
4240 09:27:27.205692 rx_lastpass[0][0][7] = 36
4241 09:27:27.205785 rx_firspass[0][0][8] = 0
4242 09:27:27.209068 rx_lastpass[0][0][8] = 31
4243 09:27:27.212266 rx_firspass[0][0][9] = 1
4244 09:27:27.212359 rx_lastpass[0][0][9] = 32
4245 09:27:27.215678 rx_firspass[0][0][10] = 9
4246 09:27:27.218981 rx_lastpass[0][0][10] = 39
4247 09:27:27.222381 rx_firspass[0][0][11] = 1
4248 09:27:27.222449 rx_lastpass[0][0][11] = 31
4249 09:27:27.225584 rx_firspass[0][0][12] = 1
4250 09:27:27.228762 rx_lastpass[0][0][12] = 34
4251 09:27:27.231974 rx_firspass[0][0][13] = 3
4252 09:27:27.232046 rx_lastpass[0][0][13] = 33
4253 09:27:27.235347 rx_firspass[0][0][14] = 3
4254 09:27:27.238684 rx_lastpass[0][0][14] = 36
4255 09:27:27.238751 rx_firspass[0][0][15] = 7
4256 09:27:27.241793 rx_lastpass[0][0][15] = 37
4257 09:27:27.245338 rx_firspass[0][1][0] = 5
4258 09:27:27.248518 rx_lastpass[0][1][0] = 38
4259 09:27:27.248611 rx_firspass[0][1][1] = 4
4260 09:27:27.251708 rx_lastpass[0][1][1] = 39
4261 09:27:27.255220 rx_firspass[0][1][2] = 5
4262 09:27:27.255290 rx_lastpass[0][1][2] = 40
4263 09:27:27.258043 rx_firspass[0][1][3] = -2
4264 09:27:27.261785 rx_lastpass[0][1][3] = 31
4265 09:27:27.264474 rx_firspass[0][1][4] = 5
4266 09:27:27.264541 rx_lastpass[0][1][4] = 38
4267 09:27:27.268243 rx_firspass[0][1][5] = 0
4268 09:27:27.271366 rx_lastpass[0][1][5] = 32
4269 09:27:27.271434 rx_firspass[0][1][6] = 1
4270 09:27:27.274680 rx_lastpass[0][1][6] = 35
4271 09:27:27.278090 rx_firspass[0][1][7] = 5
4272 09:27:27.280907 rx_lastpass[0][1][7] = 36
4273 09:27:27.281000 rx_firspass[0][1][8] = 0
4274 09:27:27.284537 rx_lastpass[0][1][8] = 33
4275 09:27:27.287905 rx_firspass[0][1][9] = 2
4276 09:27:27.287971 rx_lastpass[0][1][9] = 35
4277 09:27:27.290807 rx_firspass[0][1][10] = 9
4278 09:27:27.294269 rx_lastpass[0][1][10] = 42
4279 09:27:27.297621 rx_firspass[0][1][11] = 0
4280 09:27:27.297689 rx_lastpass[0][1][11] = 33
4281 09:27:27.301146 rx_firspass[0][1][12] = 3
4282 09:27:27.303963 rx_lastpass[0][1][12] = 36
4283 09:27:27.307552 rx_firspass[0][1][13] = 3
4284 09:27:27.307642 rx_lastpass[0][1][13] = 36
4285 09:27:27.310514 rx_firspass[0][1][14] = 5
4286 09:27:27.313925 rx_lastpass[0][1][14] = 37
4287 09:27:27.317305 rx_firspass[0][1][15] = 6
4288 09:27:27.317370 rx_lastpass[0][1][15] = 40
4289 09:27:27.320800 rx_firspass[1][0][0] = 5
4290 09:27:27.323550 rx_lastpass[1][0][0] = 39
4291 09:27:27.323617 rx_firspass[1][0][1] = 3
4292 09:27:27.327122 rx_lastpass[1][0][1] = 36
4293 09:27:27.330469 rx_firspass[1][0][2] = 3
4294 09:27:27.333755 rx_lastpass[1][0][2] = 36
4295 09:27:27.333821 rx_firspass[1][0][3] = 0
4296 09:27:27.337092 rx_lastpass[1][0][3] = 33
4297 09:27:27.340369 rx_firspass[1][0][4] = 4
4298 09:27:27.340439 rx_lastpass[1][0][4] = 36
4299 09:27:27.343292 rx_firspass[1][0][5] = 6
4300 09:27:27.346826 rx_lastpass[1][0][5] = 38
4301 09:27:27.350128 rx_firspass[1][0][6] = 10
4302 09:27:27.350219 rx_lastpass[1][0][6] = 39
4303 09:27:27.353393 rx_firspass[1][0][7] = 5
4304 09:27:27.356714 rx_lastpass[1][0][7] = 37
4305 09:27:27.356805 rx_firspass[1][0][8] = 0
4306 09:27:27.360038 rx_lastpass[1][0][8] = 33
4307 09:27:27.363283 rx_firspass[1][0][9] = 2
4308 09:27:27.366688 rx_lastpass[1][0][9] = 32
4309 09:27:27.366764 rx_firspass[1][0][10] = 5
4310 09:27:27.369772 rx_lastpass[1][0][10] = 36
4311 09:27:27.372766 rx_firspass[1][0][11] = 7
4312 09:27:27.372857 rx_lastpass[1][0][11] = 36
4313 09:27:27.376010 rx_firspass[1][0][12] = 5
4314 09:27:27.379586 rx_lastpass[1][0][12] = 37
4315 09:27:27.382758 rx_firspass[1][0][13] = 7
4316 09:27:27.382825 rx_lastpass[1][0][13] = 36
4317 09:27:27.386036 rx_firspass[1][0][14] = 7
4318 09:27:27.388951 rx_lastpass[1][0][14] = 37
4319 09:27:27.392447 rx_firspass[1][0][15] = 0
4320 09:27:27.392544 rx_lastpass[1][0][15] = 29
4321 09:27:27.396137 rx_firspass[1][1][0] = 6
4322 09:27:27.398950 rx_lastpass[1][1][0] = 38
4323 09:27:27.399018 rx_firspass[1][1][1] = 3
4324 09:27:27.402251 rx_lastpass[1][1][1] = 38
4325 09:27:27.405527 rx_firspass[1][1][2] = 3
4326 09:27:27.409080 rx_lastpass[1][1][2] = 34
4327 09:27:27.409177 rx_firspass[1][1][3] = 0
4328 09:27:27.411979 rx_lastpass[1][1][3] = 31
4329 09:27:27.415638 rx_firspass[1][1][4] = 4
4330 09:27:27.415725 rx_lastpass[1][1][4] = 38
4331 09:27:27.418377 rx_firspass[1][1][5] = 5
4332 09:27:27.421909 rx_lastpass[1][1][5] = 40
4333 09:27:27.425343 rx_firspass[1][1][6] = 7
4334 09:27:27.425477 rx_lastpass[1][1][6] = 40
4335 09:27:27.428940 rx_firspass[1][1][7] = 5
4336 09:27:27.431787 rx_lastpass[1][1][7] = 37
4337 09:27:27.431868 rx_firspass[1][1][8] = 2
4338 09:27:27.435453 rx_lastpass[1][1][8] = 33
4339 09:27:27.438277 rx_firspass[1][1][9] = 1
4340 09:27:27.441474 rx_lastpass[1][1][9] = 34
4341 09:27:27.441600 rx_firspass[1][1][10] = 4
4342 09:27:27.444891 rx_lastpass[1][1][10] = 38
4343 09:27:27.448320 rx_firspass[1][1][11] = 6
4344 09:27:27.451249 rx_lastpass[1][1][11] = 39
4345 09:27:27.451318 rx_firspass[1][1][12] = 7
4346 09:27:27.454784 rx_lastpass[1][1][12] = 38
4347 09:27:27.458181 rx_firspass[1][1][13] = 7
4348 09:27:27.458247 rx_lastpass[1][1][13] = 39
4349 09:27:27.461646 rx_firspass[1][1][14] = 6
4350 09:27:27.464330 rx_lastpass[1][1][14] = 39
4351 09:27:27.467903 rx_firspass[1][1][15] = -1
4352 09:27:27.467992 rx_lastpass[1][1][15] = 31
4353 09:27:27.471445 dump params clk_delay
4354 09:27:27.474431 clk_delay[0] = 1
4355 09:27:27.474508 clk_delay[1] = 0
4356 09:27:27.477900 dump params dqs_delay
4357 09:27:27.477990 dqs_delay[0][0] = 0
4358 09:27:27.480632 dqs_delay[0][1] = 0
4359 09:27:27.480696 dqs_delay[1][0] = -1
4360 09:27:27.483993 dqs_delay[1][1] = 0
4361 09:27:27.487787 dump params delay_cell_unit = 753
4362 09:27:27.487893 dump source = 0x0
4363 09:27:27.490974 dump params frequency:1200
4364 09:27:27.493892 dump params rank number:2
4365 09:27:27.493957
4366 09:27:27.497380 dump params write leveling
4367 09:27:27.497481 write leveling[0][0][0] = 0x0
4368 09:27:27.500429 write leveling[0][0][1] = 0x0
4369 09:27:27.503556 write leveling[0][1][0] = 0x0
4370 09:27:27.507221 write leveling[0][1][1] = 0x0
4371 09:27:27.510729 write leveling[1][0][0] = 0x0
4372 09:27:27.510799 write leveling[1][0][1] = 0x0
4373 09:27:27.513876 write leveling[1][1][0] = 0x0
4374 09:27:27.516668 write leveling[1][1][1] = 0x0
4375 09:27:27.520379 dump params cbt_cs
4376 09:27:27.520448 cbt_cs[0][0] = 0x0
4377 09:27:27.523748 cbt_cs[0][1] = 0x0
4378 09:27:27.523840 cbt_cs[1][0] = 0x0
4379 09:27:27.526671 cbt_cs[1][1] = 0x0
4380 09:27:27.526761 dump params cbt_mr12
4381 09:27:27.530114 cbt_mr12[0][0] = 0x0
4382 09:27:27.530206 cbt_mr12[0][1] = 0x0
4383 09:27:27.533682 cbt_mr12[1][0] = 0x0
4384 09:27:27.536499 cbt_mr12[1][1] = 0x0
4385 09:27:27.536589 dump params tx window
4386 09:27:27.540056 tx_center_min[0][0][0] = 0
4387 09:27:27.542999 tx_center_max[0][0][0] = 0
4388 09:27:27.543081 tx_center_min[0][0][1] = 0
4389 09:27:27.546464 tx_center_max[0][0][1] = 0
4390 09:27:27.549995 tx_center_min[0][1][0] = 0
4391 09:27:27.553359 tx_center_max[0][1][0] = 0
4392 09:27:27.553436 tx_center_min[0][1][1] = 0
4393 09:27:27.556005 tx_center_max[0][1][1] = 0
4394 09:27:27.559549 tx_center_min[1][0][0] = 0
4395 09:27:27.563067 tx_center_max[1][0][0] = 0
4396 09:27:27.563136 tx_center_min[1][0][1] = 0
4397 09:27:27.566545 tx_center_max[1][0][1] = 0
4398 09:27:27.569870 tx_center_min[1][1][0] = 0
4399 09:27:27.572616 tx_center_max[1][1][0] = 0
4400 09:27:27.572682 tx_center_min[1][1][1] = 0
4401 09:27:27.576234 tx_center_max[1][1][1] = 0
4402 09:27:27.579012 dump params tx window
4403 09:27:27.579076 tx_win_center[0][0][0] = 0
4404 09:27:27.582543 tx_first_pass[0][0][0] = 0
4405 09:27:27.586075 tx_last_pass[0][0][0] = 0
4406 09:27:27.588997 tx_win_center[0][0][1] = 0
4407 09:27:27.589087 tx_first_pass[0][0][1] = 0
4408 09:27:27.592676 tx_last_pass[0][0][1] = 0
4409 09:27:27.595590 tx_win_center[0][0][2] = 0
4410 09:27:27.599092 tx_first_pass[0][0][2] = 0
4411 09:27:27.599165 tx_last_pass[0][0][2] = 0
4412 09:27:27.601903 tx_win_center[0][0][3] = 0
4413 09:27:27.605217 tx_first_pass[0][0][3] = 0
4414 09:27:27.609032 tx_last_pass[0][0][3] = 0
4415 09:27:27.609125 tx_win_center[0][0][4] = 0
4416 09:27:27.612156 tx_first_pass[0][0][4] = 0
4417 09:27:27.615245 tx_last_pass[0][0][4] = 0
4418 09:27:27.618331 tx_win_center[0][0][5] = 0
4419 09:27:27.618435 tx_first_pass[0][0][5] = 0
4420 09:27:27.621484 tx_last_pass[0][0][5] = 0
4421 09:27:27.624936 tx_win_center[0][0][6] = 0
4422 09:27:27.625033 tx_first_pass[0][0][6] = 0
4423 09:27:27.628111 tx_last_pass[0][0][6] = 0
4424 09:27:27.631835 tx_win_center[0][0][7] = 0
4425 09:27:27.634981 tx_first_pass[0][0][7] = 0
4426 09:27:27.635076 tx_last_pass[0][0][7] = 0
4427 09:27:27.638016 tx_win_center[0][0][8] = 0
4428 09:27:27.641645 tx_first_pass[0][0][8] = 0
4429 09:27:27.644628 tx_last_pass[0][0][8] = 0
4430 09:27:27.644711 tx_win_center[0][0][9] = 0
4431 09:27:27.648197 tx_first_pass[0][0][9] = 0
4432 09:27:27.651284 tx_last_pass[0][0][9] = 0
4433 09:27:27.654990 tx_win_center[0][0][10] = 0
4434 09:27:27.655095 tx_first_pass[0][0][10] = 0
4435 09:27:27.658227 tx_last_pass[0][0][10] = 0
4436 09:27:27.660900 tx_win_center[0][0][11] = 0
4437 09:27:27.664570 tx_first_pass[0][0][11] = 0
4438 09:27:27.664672 tx_last_pass[0][0][11] = 0
4439 09:27:27.668103 tx_win_center[0][0][12] = 0
4440 09:27:27.671015 tx_first_pass[0][0][12] = 0
4441 09:27:27.674395 tx_last_pass[0][0][12] = 0
4442 09:27:27.674477 tx_win_center[0][0][13] = 0
4443 09:27:27.677636 tx_first_pass[0][0][13] = 0
4444 09:27:27.681255 tx_last_pass[0][0][13] = 0
4445 09:27:27.684144 tx_win_center[0][0][14] = 0
4446 09:27:27.687118 tx_first_pass[0][0][14] = 0
4447 09:27:27.687197 tx_last_pass[0][0][14] = 0
4448 09:27:27.690704 tx_win_center[0][0][15] = 0
4449 09:27:27.693587 tx_first_pass[0][0][15] = 0
4450 09:27:27.697149 tx_last_pass[0][0][15] = 0
4451 09:27:27.697222 tx_win_center[0][1][0] = 0
4452 09:27:27.700745 tx_first_pass[0][1][0] = 0
4453 09:27:27.703583 tx_last_pass[0][1][0] = 0
4454 09:27:27.707294 tx_win_center[0][1][1] = 0
4455 09:27:27.707371 tx_first_pass[0][1][1] = 0
4456 09:27:27.710102 tx_last_pass[0][1][1] = 0
4457 09:27:27.713604 tx_win_center[0][1][2] = 0
4458 09:27:27.713682 tx_first_pass[0][1][2] = 0
4459 09:27:27.717169 tx_last_pass[0][1][2] = 0
4460 09:27:27.719905 tx_win_center[0][1][3] = 0
4461 09:27:27.723357 tx_first_pass[0][1][3] = 0
4462 09:27:27.723438 tx_last_pass[0][1][3] = 0
4463 09:27:27.726357 tx_win_center[0][1][4] = 0
4464 09:27:27.730458 tx_first_pass[0][1][4] = 0
4465 09:27:27.733281 tx_last_pass[0][1][4] = 0
4466 09:27:27.733379 tx_win_center[0][1][5] = 0
4467 09:27:27.736679 tx_first_pass[0][1][5] = 0
4468 09:27:27.740126 tx_last_pass[0][1][5] = 0
4469 09:27:27.743343 tx_win_center[0][1][6] = 0
4470 09:27:27.743414 tx_first_pass[0][1][6] = 0
4471 09:27:27.746588 tx_last_pass[0][1][6] = 0
4472 09:27:27.749496 tx_win_center[0][1][7] = 0
4473 09:27:27.752961 tx_first_pass[0][1][7] = 0
4474 09:27:27.753038 tx_last_pass[0][1][7] = 0
4475 09:27:27.756422 tx_win_center[0][1][8] = 0
4476 09:27:27.759654 tx_first_pass[0][1][8] = 0
4477 09:27:27.759732 tx_last_pass[0][1][8] = 0
4478 09:27:27.762528 tx_win_center[0][1][9] = 0
4479 09:27:27.766420 tx_first_pass[0][1][9] = 0
4480 09:27:27.769133 tx_last_pass[0][1][9] = 0
4481 09:27:27.769203 tx_win_center[0][1][10] = 0
4482 09:27:27.772458 tx_first_pass[0][1][10] = 0
4483 09:27:27.775998 tx_last_pass[0][1][10] = 0
4484 09:27:27.779324 tx_win_center[0][1][11] = 0
4485 09:27:27.779402 tx_first_pass[0][1][11] = 0
4486 09:27:27.782648 tx_last_pass[0][1][11] = 0
4487 09:27:27.785907 tx_win_center[0][1][12] = 0
4488 09:27:27.788737 tx_first_pass[0][1][12] = 0
4489 09:27:27.791998 tx_last_pass[0][1][12] = 0
4490 09:27:27.792079 tx_win_center[0][1][13] = 0
4491 09:27:27.795497 tx_first_pass[0][1][13] = 0
4492 09:27:27.799108 tx_last_pass[0][1][13] = 0
4493 09:27:27.802003 tx_win_center[0][1][14] = 0
4494 09:27:27.802080 tx_first_pass[0][1][14] = 0
4495 09:27:27.805668 tx_last_pass[0][1][14] = 0
4496 09:27:27.808411 tx_win_center[0][1][15] = 0
4497 09:27:27.812042 tx_first_pass[0][1][15] = 0
4498 09:27:27.812123 tx_last_pass[0][1][15] = 0
4499 09:27:27.815304 tx_win_center[1][0][0] = 0
4500 09:27:27.818316 tx_first_pass[1][0][0] = 0
4501 09:27:27.821926 tx_last_pass[1][0][0] = 0
4502 09:27:27.822005 tx_win_center[1][0][1] = 0
4503 09:27:27.825487 tx_first_pass[1][0][1] = 0
4504 09:27:27.828735 tx_last_pass[1][0][1] = 0
4505 09:27:27.828813 tx_win_center[1][0][2] = 0
4506 09:27:27.832047 tx_first_pass[1][0][2] = 0
4507 09:27:27.835672 tx_last_pass[1][0][2] = 0
4508 09:27:27.838435 tx_win_center[1][0][3] = 0
4509 09:27:27.838512 tx_first_pass[1][0][3] = 0
4510 09:27:27.841941 tx_last_pass[1][0][3] = 0
4511 09:27:27.844958 tx_win_center[1][0][4] = 0
4512 09:27:27.848418 tx_first_pass[1][0][4] = 0
4513 09:27:27.848495 tx_last_pass[1][0][4] = 0
4514 09:27:27.851361 tx_win_center[1][0][5] = 0
4515 09:27:27.854924 tx_first_pass[1][0][5] = 0
4516 09:27:27.857805 tx_last_pass[1][0][5] = 0
4517 09:27:27.857884 tx_win_center[1][0][6] = 0
4518 09:27:27.861267 tx_first_pass[1][0][6] = 0
4519 09:27:27.864504 tx_last_pass[1][0][6] = 0
4520 09:27:27.864606 tx_win_center[1][0][7] = 0
4521 09:27:27.867921 tx_first_pass[1][0][7] = 0
4522 09:27:27.871457 tx_last_pass[1][0][7] = 0
4523 09:27:27.874625 tx_win_center[1][0][8] = 0
4524 09:27:27.874730 tx_first_pass[1][0][8] = 0
4525 09:27:27.877376 tx_last_pass[1][0][8] = 0
4526 09:27:27.880828 tx_win_center[1][0][9] = 0
4527 09:27:27.884127 tx_first_pass[1][0][9] = 0
4528 09:27:27.884203 tx_last_pass[1][0][9] = 0
4529 09:27:27.887597 tx_win_center[1][0][10] = 0
4530 09:27:27.890601 tx_first_pass[1][0][10] = 0
4531 09:27:27.893856 tx_last_pass[1][0][10] = 0
4532 09:27:27.893940 tx_win_center[1][0][11] = 0
4533 09:27:27.897365 tx_first_pass[1][0][11] = 0
4534 09:27:27.900593 tx_last_pass[1][0][11] = 0
4535 09:27:27.904024 tx_win_center[1][0][12] = 0
4536 09:27:27.906905 tx_first_pass[1][0][12] = 0
4537 09:27:27.906986 tx_last_pass[1][0][12] = 0
4538 09:27:27.910710 tx_win_center[1][0][13] = 0
4539 09:27:27.914054 tx_first_pass[1][0][13] = 0
4540 09:27:27.916931 tx_last_pass[1][0][13] = 0
4541 09:27:27.917009 tx_win_center[1][0][14] = 0
4542 09:27:27.920396 tx_first_pass[1][0][14] = 0
4543 09:27:27.923186 tx_last_pass[1][0][14] = 0
4544 09:27:27.926879 tx_win_center[1][0][15] = 0
4545 09:27:27.926957 tx_first_pass[1][0][15] = 0
4546 09:27:27.930401 tx_last_pass[1][0][15] = 0
4547 09:27:27.933226 tx_win_center[1][1][0] = 0
4548 09:27:27.936779 tx_first_pass[1][1][0] = 0
4549 09:27:27.936857 tx_last_pass[1][1][0] = 0
4550 09:27:27.940065 tx_win_center[1][1][1] = 0
4551 09:27:27.943511 tx_first_pass[1][1][1] = 0
4552 09:27:27.946304 tx_last_pass[1][1][1] = 0
4553 09:27:27.946381 tx_win_center[1][1][2] = 0
4554 09:27:27.949742 tx_first_pass[1][1][2] = 0
4555 09:27:27.952776 tx_last_pass[1][1][2] = 0
4556 09:27:27.952877 tx_win_center[1][1][3] = 0
4557 09:27:27.956497 tx_first_pass[1][1][3] = 0
4558 09:27:27.959532 tx_last_pass[1][1][3] = 0
4559 09:27:27.963134 tx_win_center[1][1][4] = 0
4560 09:27:27.963236 tx_first_pass[1][1][4] = 0
4561 09:27:27.965926 tx_last_pass[1][1][4] = 0
4562 09:27:27.969466 tx_win_center[1][1][5] = 0
4563 09:27:27.972426 tx_first_pass[1][1][5] = 0
4564 09:27:27.972528 tx_last_pass[1][1][5] = 0
4565 09:27:27.976082 tx_win_center[1][1][6] = 0
4566 09:27:27.979130 tx_first_pass[1][1][6] = 0
4567 09:27:27.982684 tx_last_pass[1][1][6] = 0
4568 09:27:27.982755 tx_win_center[1][1][7] = 0
4569 09:27:27.986083 tx_first_pass[1][1][7] = 0
4570 09:27:27.989453 tx_last_pass[1][1][7] = 0
4571 09:27:27.989566 tx_win_center[1][1][8] = 0
4572 09:27:27.992786 tx_first_pass[1][1][8] = 0
4573 09:27:27.995393 tx_last_pass[1][1][8] = 0
4574 09:27:27.998849 tx_win_center[1][1][9] = 0
4575 09:27:27.998927 tx_first_pass[1][1][9] = 0
4576 09:27:28.002325 tx_last_pass[1][1][9] = 0
4577 09:27:28.005775 tx_win_center[1][1][10] = 0
4578 09:27:28.009196 tx_first_pass[1][1][10] = 0
4579 09:27:28.009274 tx_last_pass[1][1][10] = 0
4580 09:27:28.012085 tx_win_center[1][1][11] = 0
4581 09:27:28.015231 tx_first_pass[1][1][11] = 0
4582 09:27:28.018340 tx_last_pass[1][1][11] = 0
4583 09:27:28.022124 tx_win_center[1][1][12] = 0
4584 09:27:28.022203 tx_first_pass[1][1][12] = 0
4585 09:27:28.025254 tx_last_pass[1][1][12] = 0
4586 09:27:28.028229 tx_win_center[1][1][13] = 0
4587 09:27:28.031950 tx_first_pass[1][1][13] = 0
4588 09:27:28.032045 tx_last_pass[1][1][13] = 0
4589 09:27:28.035173 tx_win_center[1][1][14] = 0
4590 09:27:28.038092 tx_first_pass[1][1][14] = 0
4591 09:27:28.041893 tx_last_pass[1][1][14] = 0
4592 09:27:28.041992 tx_win_center[1][1][15] = 0
4593 09:27:28.044704 tx_first_pass[1][1][15] = 0
4594 09:27:28.047853 tx_last_pass[1][1][15] = 0
4595 09:27:28.051334 dump params rx window
4596 09:27:28.051435 rx_firspass[0][0][0] = 0
4597 09:27:28.054903 rx_lastpass[0][0][0] = 0
4598 09:27:28.057802 rx_firspass[0][0][1] = 0
4599 09:27:28.057914 rx_lastpass[0][0][1] = 0
4600 09:27:28.061826 rx_firspass[0][0][2] = 0
4601 09:27:28.064737 rx_lastpass[0][0][2] = 0
4602 09:27:28.064822 rx_firspass[0][0][3] = 0
4603 09:27:28.067537 rx_lastpass[0][0][3] = 0
4604 09:27:28.071160 rx_firspass[0][0][4] = 0
4605 09:27:28.071249 rx_lastpass[0][0][4] = 0
4606 09:27:28.074718 rx_firspass[0][0][5] = 0
4607 09:27:28.077643 rx_lastpass[0][0][5] = 0
4608 09:27:28.081140 rx_firspass[0][0][6] = 0
4609 09:27:28.081235 rx_lastpass[0][0][6] = 0
4610 09:27:28.083963 rx_firspass[0][0][7] = 0
4611 09:27:28.087603 rx_lastpass[0][0][7] = 0
4612 09:27:28.087696 rx_firspass[0][0][8] = 0
4613 09:27:28.090966 rx_lastpass[0][0][8] = 0
4614 09:27:28.094214 rx_firspass[0][0][9] = 0
4615 09:27:28.094307 rx_lastpass[0][0][9] = 0
4616 09:27:28.097686 rx_firspass[0][0][10] = 0
4617 09:27:28.100424 rx_lastpass[0][0][10] = 0
4618 09:27:28.104061 rx_firspass[0][0][11] = 0
4619 09:27:28.104166 rx_lastpass[0][0][11] = 0
4620 09:27:28.107317 rx_firspass[0][0][12] = 0
4621 09:27:28.110155 rx_lastpass[0][0][12] = 0
4622 09:27:28.113621 rx_firspass[0][0][13] = 0
4623 09:27:28.113690 rx_lastpass[0][0][13] = 0
4624 09:27:28.116658 rx_firspass[0][0][14] = 0
4625 09:27:28.120109 rx_lastpass[0][0][14] = 0
4626 09:27:28.120204 rx_firspass[0][0][15] = 0
4627 09:27:28.123161 rx_lastpass[0][0][15] = 0
4628 09:27:28.126802 rx_firspass[0][1][0] = 0
4629 09:27:28.129645 rx_lastpass[0][1][0] = 0
4630 09:27:28.129720 rx_firspass[0][1][1] = 0
4631 09:27:28.133345 rx_lastpass[0][1][1] = 0
4632 09:27:28.136388 rx_firspass[0][1][2] = 0
4633 09:27:28.136466 rx_lastpass[0][1][2] = 0
4634 09:27:28.139647 rx_firspass[0][1][3] = 0
4635 09:27:28.143188 rx_lastpass[0][1][3] = 0
4636 09:27:28.143266 rx_firspass[0][1][4] = 0
4637 09:27:28.146507 rx_lastpass[0][1][4] = 0
4638 09:27:28.149824 rx_firspass[0][1][5] = 0
4639 09:27:28.153047 rx_lastpass[0][1][5] = 0
4640 09:27:28.153138 rx_firspass[0][1][6] = 0
4641 09:27:28.156421 rx_lastpass[0][1][6] = 0
4642 09:27:28.159562 rx_firspass[0][1][7] = 0
4643 09:27:28.159643 rx_lastpass[0][1][7] = 0
4644 09:27:28.162964 rx_firspass[0][1][8] = 0
4645 09:27:28.165686 rx_lastpass[0][1][8] = 0
4646 09:27:28.165765 rx_firspass[0][1][9] = 0
4647 09:27:28.169640 rx_lastpass[0][1][9] = 0
4648 09:27:28.172444 rx_firspass[0][1][10] = 0
4649 09:27:28.175947 rx_lastpass[0][1][10] = 0
4650 09:27:28.176028 rx_firspass[0][1][11] = 0
4651 09:27:28.178970 rx_lastpass[0][1][11] = 0
4652 09:27:28.182526 rx_firspass[0][1][12] = 0
4653 09:27:28.182604 rx_lastpass[0][1][12] = 0
4654 09:27:28.185417 rx_firspass[0][1][13] = 0
4655 09:27:28.189106 rx_lastpass[0][1][13] = 0
4656 09:27:28.191996 rx_firspass[0][1][14] = 0
4657 09:27:28.192074 rx_lastpass[0][1][14] = 0
4658 09:27:28.195614 rx_firspass[0][1][15] = 0
4659 09:27:28.199000 rx_lastpass[0][1][15] = 0
4660 09:27:28.199102 rx_firspass[1][0][0] = 0
4661 09:27:28.201809 rx_lastpass[1][0][0] = 0
4662 09:27:28.205198 rx_firspass[1][0][1] = 0
4663 09:27:28.208454 rx_lastpass[1][0][1] = 0
4664 09:27:28.208532 rx_firspass[1][0][2] = 0
4665 09:27:28.211755 rx_lastpass[1][0][2] = 0
4666 09:27:28.215408 rx_firspass[1][0][3] = 0
4667 09:27:28.215486 rx_lastpass[1][0][3] = 0
4668 09:27:28.218202 rx_firspass[1][0][4] = 0
4669 09:27:28.221732 rx_lastpass[1][0][4] = 0
4670 09:27:28.221809 rx_firspass[1][0][5] = 0
4671 09:27:28.225283 rx_lastpass[1][0][5] = 0
4672 09:27:28.228155 rx_firspass[1][0][6] = 0
4673 09:27:28.231682 rx_lastpass[1][0][6] = 0
4674 09:27:28.231759 rx_firspass[1][0][7] = 0
4675 09:27:28.235197 rx_lastpass[1][0][7] = 0
4676 09:27:28.238017 rx_firspass[1][0][8] = 0
4677 09:27:28.238093 rx_lastpass[1][0][8] = 0
4678 09:27:28.241600 rx_firspass[1][0][9] = 0
4679 09:27:28.244470 rx_lastpass[1][0][9] = 0
4680 09:27:28.244547 rx_firspass[1][0][10] = 0
4681 09:27:28.248079 rx_lastpass[1][0][10] = 0
4682 09:27:28.251592 rx_firspass[1][0][11] = 0
4683 09:27:28.254474 rx_lastpass[1][0][11] = 0
4684 09:27:28.254576 rx_firspass[1][0][12] = 0
4685 09:27:28.257905 rx_lastpass[1][0][12] = 0
4686 09:27:28.260822 rx_firspass[1][0][13] = 0
4687 09:27:28.260899 rx_lastpass[1][0][13] = 0
4688 09:27:28.264230 rx_firspass[1][0][14] = 0
4689 09:27:28.267458 rx_lastpass[1][0][14] = 0
4690 09:27:28.270720 rx_firspass[1][0][15] = 0
4691 09:27:28.270792 rx_lastpass[1][0][15] = 0
4692 09:27:28.274415 rx_firspass[1][1][0] = 0
4693 09:27:28.277472 rx_lastpass[1][1][0] = 0
4694 09:27:28.277556 rx_firspass[1][1][1] = 0
4695 09:27:28.280554 rx_lastpass[1][1][1] = 0
4696 09:27:28.283987 rx_firspass[1][1][2] = 0
4697 09:27:28.287247 rx_lastpass[1][1][2] = 0
4698 09:27:28.287344 rx_firspass[1][1][3] = 0
4699 09:27:28.290274 rx_lastpass[1][1][3] = 0
4700 09:27:28.293539 rx_firspass[1][1][4] = 0
4701 09:27:28.293622 rx_lastpass[1][1][4] = 0
4702 09:27:28.297253 rx_firspass[1][1][5] = 0
4703 09:27:28.300719 rx_lastpass[1][1][5] = 0
4704 09:27:28.300822 rx_firspass[1][1][6] = 0
4705 09:27:28.303514 rx_lastpass[1][1][6] = 0
4706 09:27:28.306842 rx_firspass[1][1][7] = 0
4707 09:27:28.310020 rx_lastpass[1][1][7] = 0
4708 09:27:28.310111 rx_firspass[1][1][8] = 0
4709 09:27:28.313378 rx_lastpass[1][1][8] = 0
4710 09:27:28.316734 rx_firspass[1][1][9] = 0
4711 09:27:28.316804 rx_lastpass[1][1][9] = 0
4712 09:27:28.320284 rx_firspass[1][1][10] = 0
4713 09:27:28.323388 rx_lastpass[1][1][10] = 0
4714 09:27:28.323476 rx_firspass[1][1][11] = 0
4715 09:27:28.326368 rx_lastpass[1][1][11] = 0
4716 09:27:28.329976 rx_firspass[1][1][12] = 0
4717 09:27:28.332773 rx_lastpass[1][1][12] = 0
4718 09:27:28.332847 rx_firspass[1][1][13] = 0
4719 09:27:28.336304 rx_lastpass[1][1][13] = 0
4720 09:27:28.339828 rx_firspass[1][1][14] = 0
4721 09:27:28.342618 rx_lastpass[1][1][14] = 0
4722 09:27:28.342700 rx_firspass[1][1][15] = 0
4723 09:27:28.346196 rx_lastpass[1][1][15] = 0
4724 09:27:28.349857 dump params clk_delay
4725 09:27:28.349928 clk_delay[0] = 0
4726 09:27:28.352656 clk_delay[1] = 0
4727 09:27:28.352732 dump params dqs_delay
4728 09:27:28.356106 dqs_delay[0][0] = 0
4729 09:27:28.356175 dqs_delay[0][1] = 0
4730 09:27:28.359435 dqs_delay[1][0] = 0
4731 09:27:28.359505 dqs_delay[1][1] = 0
4732 09:27:28.362281 dump params delay_cell_unit = 753
4733 09:27:28.365779 dump source = 0x0
4734 09:27:28.369354 dump params frequency:800
4735 09:27:28.369433 dump params rank number:2
4736 09:27:28.369505
4737 09:27:28.372187 dump params write leveling
4738 09:27:28.375661 write leveling[0][0][0] = 0x0
4739 09:27:28.379068 write leveling[0][0][1] = 0x0
4740 09:27:28.379150 write leveling[0][1][0] = 0x0
4741 09:27:28.381849 write leveling[0][1][1] = 0x0
4742 09:27:28.385284 write leveling[1][0][0] = 0x0
4743 09:27:28.388404 write leveling[1][0][1] = 0x0
4744 09:27:28.392006 write leveling[1][1][0] = 0x0
4745 09:27:28.395400 write leveling[1][1][1] = 0x0
4746 09:27:28.395470 dump params cbt_cs
4747 09:27:28.398702 cbt_cs[0][0] = 0x0
4748 09:27:28.398771 cbt_cs[0][1] = 0x0
4749 09:27:28.402076 cbt_cs[1][0] = 0x0
4750 09:27:28.402154 cbt_cs[1][1] = 0x0
4751 09:27:28.405172 dump params cbt_mr12
4752 09:27:28.405241 cbt_mr12[0][0] = 0x0
4753 09:27:28.408343 cbt_mr12[0][1] = 0x0
4754 09:27:28.408417 cbt_mr12[1][0] = 0x0
4755 09:27:28.411718 cbt_mr12[1][1] = 0x0
4756 09:27:28.414888 dump params tx window
4757 09:27:28.414967 tx_center_min[0][0][0] = 0
4758 09:27:28.418180 tx_center_max[0][0][0] = 0
4759 09:27:28.421283 tx_center_min[0][0][1] = 0
4760 09:27:28.424755 tx_center_max[0][0][1] = 0
4761 09:27:28.424832 tx_center_min[0][1][0] = 0
4762 09:27:28.427968 tx_center_max[0][1][0] = 0
4763 09:27:28.431499 tx_center_min[0][1][1] = 0
4764 09:27:28.435020 tx_center_max[0][1][1] = 0
4765 09:27:28.435111 tx_center_min[1][0][0] = 0
4766 09:27:28.437928 tx_center_max[1][0][0] = 0
4767 09:27:28.441342 tx_center_min[1][0][1] = 0
4768 09:27:28.444213 tx_center_max[1][0][1] = 0
4769 09:27:28.444281 tx_center_min[1][1][0] = 0
4770 09:27:28.447885 tx_center_max[1][1][0] = 0
4771 09:27:28.450827 tx_center_min[1][1][1] = 0
4772 09:27:28.454449 tx_center_max[1][1][1] = 0
4773 09:27:28.454531 dump params tx window
4774 09:27:28.457784 tx_win_center[0][0][0] = 0
4775 09:27:28.461228 tx_first_pass[0][0][0] = 0
4776 09:27:28.461307 tx_last_pass[0][0][0] = 0
4777 09:27:28.464063 tx_win_center[0][0][1] = 0
4778 09:27:28.467346 tx_first_pass[0][0][1] = 0
4779 09:27:28.470884 tx_last_pass[0][0][1] = 0
4780 09:27:28.470978 tx_win_center[0][0][2] = 0
4781 09:27:28.474235 tx_first_pass[0][0][2] = 0
4782 09:27:28.477052 tx_last_pass[0][0][2] = 0
4783 09:27:28.480485 tx_win_center[0][0][3] = 0
4784 09:27:28.480578 tx_first_pass[0][0][3] = 0
4785 09:27:28.483885 tx_last_pass[0][0][3] = 0
4786 09:27:28.487425 tx_win_center[0][0][4] = 0
4787 09:27:28.490187 tx_first_pass[0][0][4] = 0
4788 09:27:28.490281 tx_last_pass[0][0][4] = 0
4789 09:27:28.493649 tx_win_center[0][0][5] = 0
4790 09:27:28.496974 tx_first_pass[0][0][5] = 0
4791 09:27:28.497078 tx_last_pass[0][0][5] = 0
4792 09:27:28.500426 tx_win_center[0][0][6] = 0
4793 09:27:28.503280 tx_first_pass[0][0][6] = 0
4794 09:27:28.506840 tx_last_pass[0][0][6] = 0
4795 09:27:28.506933 tx_win_center[0][0][7] = 0
4796 09:27:28.510143 tx_first_pass[0][0][7] = 0
4797 09:27:28.513661 tx_last_pass[0][0][7] = 0
4798 09:27:28.516367 tx_win_center[0][0][8] = 0
4799 09:27:28.516462 tx_first_pass[0][0][8] = 0
4800 09:27:28.519613 tx_last_pass[0][0][8] = 0
4801 09:27:28.522949 tx_win_center[0][0][9] = 0
4802 09:27:28.526543 tx_first_pass[0][0][9] = 0
4803 09:27:28.526644 tx_last_pass[0][0][9] = 0
4804 09:27:28.529768 tx_win_center[0][0][10] = 0
4805 09:27:28.532898 tx_first_pass[0][0][10] = 0
4806 09:27:28.536539 tx_last_pass[0][0][10] = 0
4807 09:27:28.536669 tx_win_center[0][0][11] = 0
4808 09:27:28.539568 tx_first_pass[0][0][11] = 0
4809 09:27:28.542774 tx_last_pass[0][0][11] = 0
4810 09:27:28.546341 tx_win_center[0][0][12] = 0
4811 09:27:28.546435 tx_first_pass[0][0][12] = 0
4812 09:27:28.549710 tx_last_pass[0][0][12] = 0
4813 09:27:28.552649 tx_win_center[0][0][13] = 0
4814 09:27:28.556124 tx_first_pass[0][0][13] = 0
4815 09:27:28.556214 tx_last_pass[0][0][13] = 0
4816 09:27:28.558980 tx_win_center[0][0][14] = 0
4817 09:27:28.562514 tx_first_pass[0][0][14] = 0
4818 09:27:28.566026 tx_last_pass[0][0][14] = 0
4819 09:27:28.569079 tx_win_center[0][0][15] = 0
4820 09:27:28.569168 tx_first_pass[0][0][15] = 0
4821 09:27:28.572374 tx_last_pass[0][0][15] = 0
4822 09:27:28.575738 tx_win_center[0][1][0] = 0
4823 09:27:28.575833 tx_first_pass[0][1][0] = 0
4824 09:27:28.579211 tx_last_pass[0][1][0] = 0
4825 09:27:28.582645 tx_win_center[0][1][1] = 0
4826 09:27:28.585564 tx_first_pass[0][1][1] = 0
4827 09:27:28.585678 tx_last_pass[0][1][1] = 0
4828 09:27:28.589111 tx_win_center[0][1][2] = 0
4829 09:27:28.592477 tx_first_pass[0][1][2] = 0
4830 09:27:28.595437 tx_last_pass[0][1][2] = 0
4831 09:27:28.595527 tx_win_center[0][1][3] = 0
4832 09:27:28.598720 tx_first_pass[0][1][3] = 0
4833 09:27:28.602027 tx_last_pass[0][1][3] = 0
4834 09:27:28.605521 tx_win_center[0][1][4] = 0
4835 09:27:28.605670 tx_first_pass[0][1][4] = 0
4836 09:27:28.608395 tx_last_pass[0][1][4] = 0
4837 09:27:28.611996 tx_win_center[0][1][5] = 0
4838 09:27:28.615501 tx_first_pass[0][1][5] = 0
4839 09:27:28.615593 tx_last_pass[0][1][5] = 0
4840 09:27:28.618335 tx_win_center[0][1][6] = 0
4841 09:27:28.621873 tx_first_pass[0][1][6] = 0
4842 09:27:28.621967 tx_last_pass[0][1][6] = 0
4843 09:27:28.625384 tx_win_center[0][1][7] = 0
4844 09:27:28.628228 tx_first_pass[0][1][7] = 0
4845 09:27:28.631524 tx_last_pass[0][1][7] = 0
4846 09:27:28.631615 tx_win_center[0][1][8] = 0
4847 09:27:28.634744 tx_first_pass[0][1][8] = 0
4848 09:27:28.638159 tx_last_pass[0][1][8] = 0
4849 09:27:28.641661 tx_win_center[0][1][9] = 0
4850 09:27:28.641760 tx_first_pass[0][1][9] = 0
4851 09:27:28.644889 tx_last_pass[0][1][9] = 0
4852 09:27:28.647714 tx_win_center[0][1][10] = 0
4853 09:27:28.650887 tx_first_pass[0][1][10] = 0
4854 09:27:28.650983 tx_last_pass[0][1][10] = 0
4855 09:27:28.654684 tx_win_center[0][1][11] = 0
4856 09:27:28.657697 tx_first_pass[0][1][11] = 0
4857 09:27:28.661080 tx_last_pass[0][1][11] = 0
4858 09:27:28.661149 tx_win_center[0][1][12] = 0
4859 09:27:28.664550 tx_first_pass[0][1][12] = 0
4860 09:27:28.667316 tx_last_pass[0][1][12] = 0
4861 09:27:28.670899 tx_win_center[0][1][13] = 0
4862 09:27:28.674286 tx_first_pass[0][1][13] = 0
4863 09:27:28.674355 tx_last_pass[0][1][13] = 0
4864 09:27:28.677219 tx_win_center[0][1][14] = 0
4865 09:27:28.680777 tx_first_pass[0][1][14] = 0
4866 09:27:28.684070 tx_last_pass[0][1][14] = 0
4867 09:27:28.684162 tx_win_center[0][1][15] = 0
4868 09:27:28.686843 tx_first_pass[0][1][15] = 0
4869 09:27:28.690651 tx_last_pass[0][1][15] = 0
4870 09:27:28.694118 tx_win_center[1][0][0] = 0
4871 09:27:28.694214 tx_first_pass[1][0][0] = 0
4872 09:27:28.696988 tx_last_pass[1][0][0] = 0
4873 09:27:28.700441 tx_win_center[1][0][1] = 0
4874 09:27:28.703368 tx_first_pass[1][0][1] = 0
4875 09:27:28.703472 tx_last_pass[1][0][1] = 0
4876 09:27:28.706684 tx_win_center[1][0][2] = 0
4877 09:27:28.710201 tx_first_pass[1][0][2] = 0
4878 09:27:28.710317 tx_last_pass[1][0][2] = 0
4879 09:27:28.713255 tx_win_center[1][0][3] = 0
4880 09:27:28.716889 tx_first_pass[1][0][3] = 0
4881 09:27:28.719683 tx_last_pass[1][0][3] = 0
4882 09:27:28.719786 tx_win_center[1][0][4] = 0
4883 09:27:28.723211 tx_first_pass[1][0][4] = 0
4884 09:27:28.726780 tx_last_pass[1][0][4] = 0
4885 09:27:28.729555 tx_win_center[1][0][5] = 0
4886 09:27:28.729626 tx_first_pass[1][0][5] = 0
4887 09:27:28.733062 tx_last_pass[1][0][5] = 0
4888 09:27:28.736545 tx_win_center[1][0][6] = 0
4889 09:27:28.739381 tx_first_pass[1][0][6] = 0
4890 09:27:28.739475 tx_last_pass[1][0][6] = 0
4891 09:27:28.742743 tx_win_center[1][0][7] = 0
4892 09:27:28.746370 tx_first_pass[1][0][7] = 0
4893 09:27:28.746439 tx_last_pass[1][0][7] = 0
4894 09:27:28.749601 tx_win_center[1][0][8] = 0
4895 09:27:28.752833 tx_first_pass[1][0][8] = 0
4896 09:27:28.756254 tx_last_pass[1][0][8] = 0
4897 09:27:28.756349 tx_win_center[1][0][9] = 0
4898 09:27:28.759629 tx_first_pass[1][0][9] = 0
4899 09:27:28.762874 tx_last_pass[1][0][9] = 0
4900 09:27:28.766109 tx_win_center[1][0][10] = 0
4901 09:27:28.766176 tx_first_pass[1][0][10] = 0
4902 09:27:28.769179 tx_last_pass[1][0][10] = 0
4903 09:27:28.772605 tx_win_center[1][0][11] = 0
4904 09:27:28.775993 tx_first_pass[1][0][11] = 0
4905 09:27:28.776064 tx_last_pass[1][0][11] = 0
4906 09:27:28.778996 tx_win_center[1][0][12] = 0
4907 09:27:28.782627 tx_first_pass[1][0][12] = 0
4908 09:27:28.785981 tx_last_pass[1][0][12] = 0
4909 09:27:28.786076 tx_win_center[1][0][13] = 0
4910 09:27:28.788768 tx_first_pass[1][0][13] = 0
4911 09:27:28.792441 tx_last_pass[1][0][13] = 0
4912 09:27:28.795846 tx_win_center[1][0][14] = 0
4913 09:27:28.795941 tx_first_pass[1][0][14] = 0
4914 09:27:28.798948 tx_last_pass[1][0][14] = 0
4915 09:27:28.802324 tx_win_center[1][0][15] = 0
4916 09:27:28.805171 tx_first_pass[1][0][15] = 0
4917 09:27:28.808717 tx_last_pass[1][0][15] = 0
4918 09:27:28.808820 tx_win_center[1][1][0] = 0
4919 09:27:28.812194 tx_first_pass[1][1][0] = 0
4920 09:27:28.815858 tx_last_pass[1][1][0] = 0
4921 09:27:28.815932 tx_win_center[1][1][1] = 0
4922 09:27:28.818750 tx_first_pass[1][1][1] = 0
4923 09:27:28.822243 tx_last_pass[1][1][1] = 0
4924 09:27:28.825168 tx_win_center[1][1][2] = 0
4925 09:27:28.825265 tx_first_pass[1][1][2] = 0
4926 09:27:28.828702 tx_last_pass[1][1][2] = 0
4927 09:27:28.832260 tx_win_center[1][1][3] = 0
4928 09:27:28.835127 tx_first_pass[1][1][3] = 0
4929 09:27:28.835225 tx_last_pass[1][1][3] = 0
4930 09:27:28.838854 tx_win_center[1][1][4] = 0
4931 09:27:28.841784 tx_first_pass[1][1][4] = 0
4932 09:27:28.841883 tx_last_pass[1][1][4] = 0
4933 09:27:28.845479 tx_win_center[1][1][5] = 0
4934 09:27:28.848457 tx_first_pass[1][1][5] = 0
4935 09:27:28.852050 tx_last_pass[1][1][5] = 0
4936 09:27:28.852147 tx_win_center[1][1][6] = 0
4937 09:27:28.854814 tx_first_pass[1][1][6] = 0
4938 09:27:28.858349 tx_last_pass[1][1][6] = 0
4939 09:27:28.861762 tx_win_center[1][1][7] = 0
4940 09:27:28.861858 tx_first_pass[1][1][7] = 0
4941 09:27:28.865068 tx_last_pass[1][1][7] = 0
4942 09:27:28.868493 tx_win_center[1][1][8] = 0
4943 09:27:28.871324 tx_first_pass[1][1][8] = 0
4944 09:27:28.871413 tx_last_pass[1][1][8] = 0
4945 09:27:28.874716 tx_win_center[1][1][9] = 0
4946 09:27:28.878000 tx_first_pass[1][1][9] = 0
4947 09:27:28.878098 tx_last_pass[1][1][9] = 0
4948 09:27:28.881367 tx_win_center[1][1][10] = 0
4949 09:27:28.884803 tx_first_pass[1][1][10] = 0
4950 09:27:28.888049 tx_last_pass[1][1][10] = 0
4951 09:27:28.890808 tx_win_center[1][1][11] = 0
4952 09:27:28.890921 tx_first_pass[1][1][11] = 0
4953 09:27:28.894297 tx_last_pass[1][1][11] = 0
4954 09:27:28.897751 tx_win_center[1][1][12] = 0
4955 09:27:28.901223 tx_first_pass[1][1][12] = 0
4956 09:27:28.901326 tx_last_pass[1][1][12] = 0
4957 09:27:28.904087 tx_win_center[1][1][13] = 0
4958 09:27:28.907717 tx_first_pass[1][1][13] = 0
4959 09:27:28.910502 tx_last_pass[1][1][13] = 0
4960 09:27:28.910598 tx_win_center[1][1][14] = 0
4961 09:27:28.913950 tx_first_pass[1][1][14] = 0
4962 09:27:28.917557 tx_last_pass[1][1][14] = 0
4963 09:27:28.920827 tx_win_center[1][1][15] = 0
4964 09:27:28.920923 tx_first_pass[1][1][15] = 0
4965 09:27:28.924223 tx_last_pass[1][1][15] = 0
4966 09:27:28.927324 dump params rx window
4967 09:27:28.930266 rx_firspass[0][0][0] = 0
4968 09:27:28.930350 rx_lastpass[0][0][0] = 0
4969 09:27:28.933887 rx_firspass[0][0][1] = 0
4970 09:27:28.936714 rx_lastpass[0][0][1] = 0
4971 09:27:28.936782 rx_firspass[0][0][2] = 0
4972 09:27:28.939834 rx_lastpass[0][0][2] = 0
4973 09:27:28.943289 rx_firspass[0][0][3] = 0
4974 09:27:28.943382 rx_lastpass[0][0][3] = 0
4975 09:27:28.947000 rx_firspass[0][0][4] = 0
4976 09:27:28.949801 rx_lastpass[0][0][4] = 0
4977 09:27:28.949869 rx_firspass[0][0][5] = 0
4978 09:27:28.953602 rx_lastpass[0][0][5] = 0
4979 09:27:28.956774 rx_firspass[0][0][6] = 0
4980 09:27:28.960061 rx_lastpass[0][0][6] = 0
4981 09:27:28.960161 rx_firspass[0][0][7] = 0
4982 09:27:28.963036 rx_lastpass[0][0][7] = 0
4983 09:27:28.966798 rx_firspass[0][0][8] = 0
4984 09:27:28.966893 rx_lastpass[0][0][8] = 0
4985 09:27:28.969475 rx_firspass[0][0][9] = 0
4986 09:27:28.972997 rx_lastpass[0][0][9] = 0
4987 09:27:28.973096 rx_firspass[0][0][10] = 0
4988 09:27:28.976240 rx_lastpass[0][0][10] = 0
4989 09:27:28.979730 rx_firspass[0][0][11] = 0
4990 09:27:28.983019 rx_lastpass[0][0][11] = 0
4991 09:27:28.983117 rx_firspass[0][0][12] = 0
4992 09:27:28.985840 rx_lastpass[0][0][12] = 0
4993 09:27:28.989076 rx_firspass[0][0][13] = 0
4994 09:27:28.992950 rx_lastpass[0][0][13] = 0
4995 09:27:28.993018 rx_firspass[0][0][14] = 0
4996 09:27:28.996013 rx_lastpass[0][0][14] = 0
4997 09:27:28.999160 rx_firspass[0][0][15] = 0
4998 09:27:28.999237 rx_lastpass[0][0][15] = 0
4999 09:27:29.002403 rx_firspass[0][1][0] = 0
5000 09:27:29.005736 rx_lastpass[0][1][0] = 0
5001 09:27:29.008876 rx_firspass[0][1][1] = 0
5002 09:27:29.008978 rx_lastpass[0][1][1] = 0
5003 09:27:29.012079 rx_firspass[0][1][2] = 0
5004 09:27:29.015464 rx_lastpass[0][1][2] = 0
5005 09:27:29.015577 rx_firspass[0][1][3] = 0
5006 09:27:29.018830 rx_lastpass[0][1][3] = 0
5007 09:27:29.022024 rx_firspass[0][1][4] = 0
5008 09:27:29.022101 rx_lastpass[0][1][4] = 0
5009 09:27:29.025490 rx_firspass[0][1][5] = 0
5010 09:27:29.028889 rx_lastpass[0][1][5] = 0
5011 09:27:29.028984 rx_firspass[0][1][6] = 0
5012 09:27:29.031636 rx_lastpass[0][1][6] = 0
5013 09:27:29.035129 rx_firspass[0][1][7] = 0
5014 09:27:29.038644 rx_lastpass[0][1][7] = 0
5015 09:27:29.038736 rx_firspass[0][1][8] = 0
5016 09:27:29.041632 rx_lastpass[0][1][8] = 0
5017 09:27:29.045396 rx_firspass[0][1][9] = 0
5018 09:27:29.045493 rx_lastpass[0][1][9] = 0
5019 09:27:29.048220 rx_firspass[0][1][10] = 0
5020 09:27:29.051746 rx_lastpass[0][1][10] = 0
5021 09:27:29.055326 rx_firspass[0][1][11] = 0
5022 09:27:29.055419 rx_lastpass[0][1][11] = 0
5023 09:27:29.058036 rx_firspass[0][1][12] = 0
5024 09:27:29.061438 rx_lastpass[0][1][12] = 0
5025 09:27:29.061531 rx_firspass[0][1][13] = 0
5026 09:27:29.064991 rx_lastpass[0][1][13] = 0
5027 09:27:29.067798 rx_firspass[0][1][14] = 0
5028 09:27:29.071350 rx_lastpass[0][1][14] = 0
5029 09:27:29.071418 rx_firspass[0][1][15] = 0
5030 09:27:29.074931 rx_lastpass[0][1][15] = 0
5031 09:27:29.077830 rx_firspass[1][0][0] = 0
5032 09:27:29.077898 rx_lastpass[1][0][0] = 0
5033 09:27:29.081419 rx_firspass[1][0][1] = 0
5034 09:27:29.084764 rx_lastpass[1][0][1] = 0
5035 09:27:29.088187 rx_firspass[1][0][2] = 0
5036 09:27:29.088255 rx_lastpass[1][0][2] = 0
5037 09:27:29.091219 rx_firspass[1][0][3] = 0
5038 09:27:29.094306 rx_lastpass[1][0][3] = 0
5039 09:27:29.094402 rx_firspass[1][0][4] = 0
5040 09:27:29.097898 rx_lastpass[1][0][4] = 0
5041 09:27:29.100638 rx_firspass[1][0][5] = 0
5042 09:27:29.100705 rx_lastpass[1][0][5] = 0
5043 09:27:29.104404 rx_firspass[1][0][6] = 0
5044 09:27:29.107710 rx_lastpass[1][0][6] = 0
5045 09:27:29.107802 rx_firspass[1][0][7] = 0
5046 09:27:29.111075 rx_lastpass[1][0][7] = 0
5047 09:27:29.113874 rx_firspass[1][0][8] = 0
5048 09:27:29.117411 rx_lastpass[1][0][8] = 0
5049 09:27:29.117504 rx_firspass[1][0][9] = 0
5050 09:27:29.120371 rx_lastpass[1][0][9] = 0
5051 09:27:29.123861 rx_firspass[1][0][10] = 0
5052 09:27:29.123956 rx_lastpass[1][0][10] = 0
5053 09:27:29.127244 rx_firspass[1][0][11] = 0
5054 09:27:29.130426 rx_lastpass[1][0][11] = 0
5055 09:27:29.130519 rx_firspass[1][0][12] = 0
5056 09:27:29.134159 rx_lastpass[1][0][12] = 0
5057 09:27:29.137360 rx_firspass[1][0][13] = 0
5058 09:27:29.140592 rx_lastpass[1][0][13] = 0
5059 09:27:29.140665 rx_firspass[1][0][14] = 0
5060 09:27:29.143398 rx_lastpass[1][0][14] = 0
5061 09:27:29.146876 rx_firspass[1][0][15] = 0
5062 09:27:29.150367 rx_lastpass[1][0][15] = 0
5063 09:27:29.150434 rx_firspass[1][1][0] = 0
5064 09:27:29.153811 rx_lastpass[1][1][0] = 0
5065 09:27:29.156669 rx_firspass[1][1][1] = 0
5066 09:27:29.156737 rx_lastpass[1][1][1] = 0
5067 09:27:29.160193 rx_firspass[1][1][2] = 0
5068 09:27:29.162957 rx_lastpass[1][1][2] = 0
5069 09:27:29.163024 rx_firspass[1][1][3] = 0
5070 09:27:29.166413 rx_lastpass[1][1][3] = 0
5071 09:27:29.169891 rx_firspass[1][1][4] = 0
5072 09:27:29.173316 rx_lastpass[1][1][4] = 0
5073 09:27:29.173384 rx_firspass[1][1][5] = 0
5074 09:27:29.176211 rx_lastpass[1][1][5] = 0
5075 09:27:29.179909 rx_firspass[1][1][6] = 0
5076 09:27:29.180013 rx_lastpass[1][1][6] = 0
5077 09:27:29.182918 rx_firspass[1][1][7] = 0
5078 09:27:29.186436 rx_lastpass[1][1][7] = 0
5079 09:27:29.186538 rx_firspass[1][1][8] = 0
5080 09:27:29.189179 rx_lastpass[1][1][8] = 0
5081 09:27:29.192822 rx_firspass[1][1][9] = 0
5082 09:27:29.196148 rx_lastpass[1][1][9] = 0
5083 09:27:29.196240 rx_firspass[1][1][10] = 0
5084 09:27:29.199513 rx_lastpass[1][1][10] = 0
5085 09:27:29.202755 rx_firspass[1][1][11] = 0
5086 09:27:29.202832 rx_lastpass[1][1][11] = 0
5087 09:27:29.205783 rx_firspass[1][1][12] = 0
5088 09:27:29.208914 rx_lastpass[1][1][12] = 0
5089 09:27:29.212642 rx_firspass[1][1][13] = 0
5090 09:27:29.212739 rx_lastpass[1][1][13] = 0
5091 09:27:29.215954 rx_firspass[1][1][14] = 0
5092 09:27:29.218924 rx_lastpass[1][1][14] = 0
5093 09:27:29.219016 rx_firspass[1][1][15] = 0
5094 09:27:29.222185 rx_lastpass[1][1][15] = 0
5095 09:27:29.225374 dump params clk_delay
5096 09:27:29.225468 clk_delay[0] = 0
5097 09:27:29.228667 clk_delay[1] = 0
5098 09:27:29.228764 dump params dqs_delay
5099 09:27:29.231947 dqs_delay[0][0] = 0
5100 09:27:29.232041 dqs_delay[0][1] = 0
5101 09:27:29.235436 dqs_delay[1][0] = 0
5102 09:27:29.238324 dqs_delay[1][1] = 0
5103 09:27:29.241798 dump params delay_cell_unit = 753
5104 09:27:29.241868 mt_set_emi_preloader end
5105 09:27:29.248376 [mt_mem_init] dram size: 0x100000000, rank number: 2
5106 09:27:29.251466 [complex_mem_test] start addr:0x40000000, len:20480
5107 09:27:29.288849 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5108 09:27:29.295049 [complex_mem_test] start addr:0x80000000, len:20480
5109 09:27:29.330917 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5110 09:27:29.337471 [complex_mem_test] start addr:0xc0000000, len:20480
5111 09:27:29.373373 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5112 09:27:29.379847 [complex_mem_test] start addr:0x56000000, len:8192
5113 09:27:29.396399 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5114 09:27:29.399191 ddr_geometry:1
5115 09:27:29.402871 [complex_mem_test] start addr:0x80000000, len:8192
5116 09:27:29.420058 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5117 09:27:29.423450 dram_init: dram init end (result: 0)
5118 09:27:29.430068 Successfully loaded DRAM blobs and ran DRAM calibration
5119 09:27:29.439809 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5120 09:27:29.439918 CBMEM:
5121 09:27:29.442734 IMD: root @ 00000000fffff000 254 entries.
5122 09:27:29.446197 IMD: root @ 00000000ffffec00 62 entries.
5123 09:27:29.452940 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5124 09:27:29.459879 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5125 09:27:29.463228 in-header: 03 a1 00 00 08 00 00 00
5126 09:27:29.466014 in-data: 84 60 60 10 00 00 00 00
5127 09:27:29.469449 Chrome EC: clear events_b mask to 0x0000000020004000
5128 09:27:29.475809 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5129 09:27:29.479796 in-header: 03 fd 00 00 00 00 00 00
5130 09:27:29.483053 in-data:
5131 09:27:29.486740 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5132 09:27:29.489944 CBFS @ 21000 size 3d4000
5133 09:27:29.493290 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5134 09:27:29.496888 CBFS: Locating 'fallback/ramstage'
5135 09:27:29.499733 CBFS: Found @ offset 10d40 size d563
5136 09:27:29.521677 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5137 09:27:29.534014 Accumulated console time in romstage 13469 ms
5138 09:27:29.534090
5139 09:27:29.534150
5140 09:27:29.543867 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5141 09:27:29.547262 ARM64: Exception handlers installed.
5142 09:27:29.547357 ARM64: Testing exception
5143 09:27:29.550171 ARM64: Done test exception
5144 09:27:29.553761 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5145 09:27:29.557249 Manufacturer: ef
5146 09:27:29.563424 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5147 09:27:29.566779 WARNING: RO_VPD is uninitialized or empty.
5148 09:27:29.570357 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5149 09:27:29.573714 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5150 09:27:29.583757 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5151 09:27:29.587106 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5152 09:27:29.593311 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5153 09:27:29.593404 Enumerating buses...
5154 09:27:29.600178 Show all devs... Before device enumeration.
5155 09:27:29.600249 Root Device: enabled 1
5156 09:27:29.603293 CPU_CLUSTER: 0: enabled 1
5157 09:27:29.606457 CPU: 00: enabled 1
5158 09:27:29.606546 Compare with tree...
5159 09:27:29.610181 Root Device: enabled 1
5160 09:27:29.610274 CPU_CLUSTER: 0: enabled 1
5161 09:27:29.612898 CPU: 00: enabled 1
5162 09:27:29.616399 Root Device scanning...
5163 09:27:29.619988 root_dev_scan_bus for Root Device
5164 09:27:29.620078 CPU_CLUSTER: 0 enabled
5165 09:27:29.622882 root_dev_scan_bus for Root Device done
5166 09:27:29.629219 scan_bus: scanning of bus Root Device took 10689 usecs
5167 09:27:29.629327 done
5168 09:27:29.632758 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5169 09:27:29.636232 Allocating resources...
5170 09:27:29.639060 Reading resources...
5171 09:27:29.642640 Root Device read_resources bus 0 link: 0
5172 09:27:29.646048 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5173 09:27:29.649421 CPU: 00 missing read_resources
5174 09:27:29.652619 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5175 09:27:29.655884 Root Device read_resources bus 0 link: 0 done
5176 09:27:29.659232 Done reading resources.
5177 09:27:29.662154 Show resources in subtree (Root Device)...After reading.
5178 09:27:29.669131 Root Device child on link 0 CPU_CLUSTER: 0
5179 09:27:29.672095 CPU_CLUSTER: 0 child on link 0 CPU: 00
5180 09:27:29.678371 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5181 09:27:29.681801 CPU: 00
5182 09:27:29.681865 Setting resources...
5183 09:27:29.688512 Root Device assign_resources, bus 0 link: 0
5184 09:27:29.691855 CPU_CLUSTER: 0 missing set_resources
5185 09:27:29.695134 Root Device assign_resources, bus 0 link: 0
5186 09:27:29.695204 Done setting resources.
5187 09:27:29.701676 Show resources in subtree (Root Device)...After assigning values.
5188 09:27:29.705279 Root Device child on link 0 CPU_CLUSTER: 0
5189 09:27:29.708267 CPU_CLUSTER: 0 child on link 0 CPU: 00
5190 09:27:29.717781 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5191 09:27:29.717861 CPU: 00
5192 09:27:29.721763 Done allocating resources.
5193 09:27:29.728224 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5194 09:27:29.728319 Enabling resources...
5195 09:27:29.728404 done.
5196 09:27:29.734522 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5197 09:27:29.734611 Initializing devices...
5198 09:27:29.738081 Root Device init ...
5199 09:27:29.741158 mainboard_init: Starting display init.
5200 09:27:29.744084 ADC[4]: Raw value=75552 ID=0
5201 09:27:29.766738 anx7625_power_on_init: Init interface.
5202 09:27:29.769991 anx7625_disable_pd_protocol: Disabled PD feature.
5203 09:27:29.776261 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5204 09:27:29.823354 anx7625_start_dp_work: Secure OCM version=00
5205 09:27:29.826796 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5206 09:27:29.843819 sp_tx_get_edid_block: EDID Block = 1
5207 09:27:29.961087 Extracted contents:
5208 09:27:29.964081 header: 00 ff ff ff ff ff ff 00
5209 09:27:29.967541 serial number: 06 af 5c 14 00 00 00 00 00 1a
5210 09:27:29.971063 version: 01 04
5211 09:27:29.974011 basic params: 95 1a 0e 78 02
5212 09:27:29.977649 chroma info: 99 85 95 55 56 92 28 22 50 54
5213 09:27:29.980485 established: 00 00 00
5214 09:27:29.987632 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5215 09:27:29.990617 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5216 09:27:29.997048 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5217 09:27:30.003845 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5218 09:27:30.010216 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5219 09:27:30.013761 extensions: 00
5220 09:27:30.013855 checksum: ae
5221 09:27:30.013941
5222 09:27:30.020134 Manufacturer: AUO Model 145c Serial Number 0
5223 09:27:30.020227 Made week 0 of 2016
5224 09:27:30.023757 EDID version: 1.4
5225 09:27:30.023843 Digital display
5226 09:27:30.026704 6 bits per primary color channel
5227 09:27:30.029976 DisplayPort interface
5228 09:27:30.030076 Maximum image size: 26 cm x 14 cm
5229 09:27:30.033311 Gamma: 220%
5230 09:27:30.033405 Check DPMS levels
5231 09:27:30.036692 Supported color formats: RGB 4:4:4
5232 09:27:30.039579 First detailed timing is preferred timing
5233 09:27:30.042960 Established timings supported:
5234 09:27:30.046028 Standard timings supported:
5235 09:27:30.046098 Detailed timings
5236 09:27:30.053174 Hex of detail: ce1d56ea50001a3030204600009010000018
5237 09:27:30.055897 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5238 09:27:30.062572 0556 0586 05a6 0640 hborder 0
5239 09:27:30.065906 0300 0304 030a 031a vborder 0
5240 09:27:30.069214 -hsync -vsync
5241 09:27:30.069310 Did detailed timing
5242 09:27:30.075884 Hex of detail: 0000000f0000000000000000000000000020
5243 09:27:30.078791 Manufacturer-specified data, tag 15
5244 09:27:30.082304 Hex of detail: 000000fe0041554f0a202020202020202020
5245 09:27:30.082375 ASCII string: AUO
5246 09:27:30.088780 Hex of detail: 000000fe004231313658414230312e34200a
5247 09:27:30.092424 ASCII string: B116XAB01.4
5248 09:27:30.092491 Checksum
5249 09:27:30.092549 Checksum: 0xae (valid)
5250 09:27:30.099241 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5251 09:27:30.101776 DSI data_rate: 457800000 bps
5252 09:27:30.108768 anx7625_parse_edid: set default k value to 0x3d for panel
5253 09:27:30.111950 anx7625_parse_edid: pixelclock(76300).
5254 09:27:30.115153 hactive(1366), hsync(32), hfp(48), hbp(154)
5255 09:27:30.118360 vactive(768), vsync(6), vfp(4), vbp(16)
5256 09:27:30.121868 anx7625_dsi_config: config dsi.
5257 09:27:30.129030 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5258 09:27:30.150302 anx7625_dsi_config: success to config DSI
5259 09:27:30.153207 anx7625_dp_start: MIPI phy setup OK.
5260 09:27:30.156660 [SSUSB] Setting up USB HOST controller...
5261 09:27:30.160080 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5262 09:27:30.163483 [SSUSB] phy power-on done.
5263 09:27:30.166806 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5264 09:27:30.170418 in-header: 03 fc 01 00 00 00 00 00
5265 09:27:30.170520 in-data:
5266 09:27:30.176618 handle_proto3_response: EC response with error code: 1
5267 09:27:30.176720 SPM: pcm index = 1
5268 09:27:30.180053 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5269 09:27:30.183437 CBFS @ 21000 size 3d4000
5270 09:27:30.190215 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5271 09:27:30.193118 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5272 09:27:30.196616 CBFS: Found @ offset 1e7c0 size 1026
5273 09:27:30.203130 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5274 09:27:30.206719 SPM: binary array size = 2988
5275 09:27:30.210133 SPM: version = pcm_allinone_v1.17.2_20180829
5276 09:27:30.212786 SPM binary loaded in 32 msecs
5277 09:27:30.221441 spm_kick_im_to_fetch: ptr = 000000004021eec2
5278 09:27:30.224784 spm_kick_im_to_fetch: len = 2988
5279 09:27:30.224859 SPM: spm_kick_pcm_to_run
5280 09:27:30.227485 SPM: spm_kick_pcm_to_run done
5281 09:27:30.231324 SPM: spm_init done in 52 msecs
5282 09:27:30.233997 Root Device init finished in 494995 usecs
5283 09:27:30.237593 CPU_CLUSTER: 0 init ...
5284 09:27:30.247497 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5285 09:27:30.250425 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5286 09:27:30.253938 CBFS @ 21000 size 3d4000
5287 09:27:30.257494 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5288 09:27:30.260377 CBFS: Locating 'sspm.bin'
5289 09:27:30.263862 CBFS: Found @ offset 208c0 size 41cb
5290 09:27:30.273915 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5291 09:27:30.282327 CPU_CLUSTER: 0 init finished in 42803 usecs
5292 09:27:30.282405 Devices initialized
5293 09:27:30.285756 Show all devs... After init.
5294 09:27:30.289178 Root Device: enabled 1
5295 09:27:30.289248 CPU_CLUSTER: 0: enabled 1
5296 09:27:30.291883 CPU: 00: enabled 1
5297 09:27:30.295131 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5298 09:27:30.298889 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5299 09:27:30.301914 ELOG: NV offset 0x558000 size 0x1000
5300 09:27:30.309847 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps
5301 09:27:30.316798 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5302 09:27:30.319643 ELOG: Event(17) added with size 13 at 2024-06-18 09:27:30 UTC
5303 09:27:30.326060 out: cmd=0x121: 03 db 21 01 00 00 00 00
5304 09:27:30.329776 in-header: 03 cd 00 00 2c 00 00 00
5305 09:27:30.339241 in-data: 65 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 60 97 01 00 06 80 00 00 aa f2 00 00 06 80 00 00 5c 7b 03 00 06 80 00 00 3d 7b 04 00
5306 09:27:30.342480 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5307 09:27:30.346244 in-header: 03 19 00 00 08 00 00 00
5308 09:27:30.348949 in-data: a2 e0 47 00 13 00 00 00
5309 09:27:30.352440 Chrome EC: UHEPI supported
5310 09:27:30.359247 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5311 09:27:30.362021 in-header: 03 e1 00 00 08 00 00 00
5312 09:27:30.365639 in-data: 84 20 60 10 00 00 00 00
5313 09:27:30.369118 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5314 09:27:30.375496 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5315 09:27:30.379134 in-header: 03 e1 00 00 08 00 00 00
5316 09:27:30.382076 in-data: 84 20 60 10 00 00 00 00
5317 09:27:30.388241 ELOG: Event(A1) added with size 10 at 2024-06-18 09:27:30 UTC
5318 09:27:30.395122 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5319 09:27:30.401350 ELOG: Event(A0) added with size 9 at 2024-06-18 09:27:30 UTC
5320 09:27:30.404698 elog_add_boot_reason: Logged dev mode boot
5321 09:27:30.407951 Finalize devices...
5322 09:27:30.408022 Devices finalized
5323 09:27:30.411247 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5324 09:27:30.417687 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5325 09:27:30.424726 ELOG: Event(91) added with size 10 at 2024-06-18 09:27:30 UTC
5326 09:27:30.427754 Writing coreboot table at 0xffeda000
5327 09:27:30.431134 0. 0000000000114000-000000000011efff: RAMSTAGE
5328 09:27:30.434165 1. 0000000040000000-000000004023cfff: RAMSTAGE
5329 09:27:30.437425 2. 000000004023d000-00000000545fffff: RAM
5330 09:27:30.443970 3. 0000000054600000-000000005465ffff: BL31
5331 09:27:30.447618 4. 0000000054660000-00000000ffed9fff: RAM
5332 09:27:30.450479 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5333 09:27:30.457473 6. 0000000100000000-000000013fffffff: RAM
5334 09:27:30.457596 Passing 5 GPIOs to payload:
5335 09:27:30.463974 NAME | PORT | POLARITY | VALUE
5336 09:27:30.467331 write protect | 0x00000096 | low | high
5337 09:27:30.473764 EC in RW | 0x000000b1 | high | undefined
5338 09:27:30.476579 EC interrupt | 0x00000097 | low | undefined
5339 09:27:30.480097 TPM interrupt | 0x00000099 | high | undefined
5340 09:27:30.486601 speaker enable | 0x000000af | high | undefined
5341 09:27:30.490129 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5342 09:27:30.493738 in-header: 03 f7 00 00 02 00 00 00
5343 09:27:30.493809 in-data: 04 00
5344 09:27:30.496381 Board ID: 4
5345 09:27:30.496525 ADC[3]: Raw value=213114 ID=1
5346 09:27:30.499771 RAM code: 1
5347 09:27:30.499863 SKU ID: 16
5348 09:27:30.503303 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5349 09:27:30.506556 CBFS @ 21000 size 3d4000
5350 09:27:30.512966 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5351 09:27:30.519587 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 19de
5352 09:27:30.519685 coreboot table: 940 bytes.
5353 09:27:30.523083 IMD ROOT 0. 00000000fffff000 00001000
5354 09:27:30.529439 IMD SMALL 1. 00000000ffffe000 00001000
5355 09:27:30.533039 CONSOLE 2. 00000000fffde000 00020000
5356 09:27:30.535800 FMAP 3. 00000000fffdd000 0000047c
5357 09:27:30.539454 TIME STAMP 4. 00000000fffdc000 00000910
5358 09:27:30.542189 RAMOOPS 5. 00000000ffedc000 00100000
5359 09:27:30.545717 COREBOOT 6. 00000000ffeda000 00002000
5360 09:27:30.549312 IMD small region:
5361 09:27:30.552068 IMD ROOT 0. 00000000ffffec00 00000400
5362 09:27:30.556003 VBOOT WORK 1. 00000000ffffeb00 00000100
5363 09:27:30.558901 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5364 09:27:30.562392 VPD 3. 00000000ffffea60 0000006c
5365 09:27:30.568605 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5366 09:27:30.575000 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5367 09:27:30.578413 in-header: 03 e1 00 00 08 00 00 00
5368 09:27:30.581760 in-data: 84 20 60 10 00 00 00 00
5369 09:27:30.585209 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5370 09:27:30.588172 CBFS @ 21000 size 3d4000
5371 09:27:30.591691 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5372 09:27:30.595317 CBFS: Locating 'fallback/payload'
5373 09:27:30.603814 CBFS: Found @ offset dc040 size 439a0
5374 09:27:30.691666 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5375 09:27:30.694935 Checking segment from ROM address 0x0000000040003a00
5376 09:27:30.702031 Checking segment from ROM address 0x0000000040003a1c
5377 09:27:30.704917 Loading segment from ROM address 0x0000000040003a00
5378 09:27:30.708605 code (compression=0)
5379 09:27:30.717905 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5380 09:27:30.724860 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5381 09:27:30.727789 it's not compressed!
5382 09:27:30.731138 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5383 09:27:30.737742 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5384 09:27:30.746415 Loading segment from ROM address 0x0000000040003a1c
5385 09:27:30.749155 Entry Point 0x0000000080000000
5386 09:27:30.749248 Loaded segments
5387 09:27:30.755785 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5388 09:27:30.759086 Jumping to boot code at 0000000080000000(00000000ffeda000)
5389 09:27:30.769464 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5390 09:27:30.775811 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5391 09:27:30.775912 CBFS @ 21000 size 3d4000
5392 09:27:30.782074 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5393 09:27:30.785618 CBFS: Locating 'fallback/bl31'
5394 09:27:30.788492 CBFS: Found @ offset 36dc0 size 5820
5395 09:27:30.800401 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5396 09:27:30.803423 Checking segment from ROM address 0x0000000040003a00
5397 09:27:30.809979 Checking segment from ROM address 0x0000000040003a1c
5398 09:27:30.812918 Loading segment from ROM address 0x0000000040003a00
5399 09:27:30.816492 code (compression=1)
5400 09:27:30.826060 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5401 09:27:30.833095 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5402 09:27:30.833171 using LZMA
5403 09:27:30.842229 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5404 09:27:30.848483 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5405 09:27:30.852049 Loading segment from ROM address 0x0000000040003a1c
5406 09:27:30.854902 Entry Point 0x0000000054601000
5407 09:27:30.855004 Loaded segments
5408 09:27:30.858329 NOTICE: MT8183 bl31_setup
5409 09:27:30.865353 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5410 09:27:30.868814 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5411 09:27:30.872335 INFO: [DEVAPC] dump DEVAPC registers:
5412 09:27:30.881915 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5413 09:27:30.888709 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5414 09:27:30.898441 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5415 09:27:30.904967 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5416 09:27:30.914929 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5417 09:27:30.921812 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5418 09:27:30.931154 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5419 09:27:30.938114 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5420 09:27:30.947447 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5421 09:27:30.954360 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5422 09:27:30.964081 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5423 09:27:30.970395 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5424 09:27:30.980606 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5425 09:27:30.987045 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5426 09:27:30.993993 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5427 09:27:31.000425 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5428 09:27:31.009925 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5429 09:27:31.016828 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5430 09:27:31.022987 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5431 09:27:31.029783 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5432 09:27:31.039852 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5433 09:27:31.046105 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5434 09:27:31.049749 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5435 09:27:31.052551 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5436 09:27:31.056181 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5437 09:27:31.059173 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5438 09:27:31.062493 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5439 09:27:31.068957 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5440 09:27:31.072168 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5441 09:27:31.075843 WARNING: region 0:
5442 09:27:31.078802 WARNING: apc:0x168, sa:0x0, ea:0xfff
5443 09:27:31.078897 WARNING: region 1:
5444 09:27:31.082379 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5445 09:27:31.085901 WARNING: region 2:
5446 09:27:31.088817 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5447 09:27:31.092610 WARNING: region 3:
5448 09:27:31.095291 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5449 09:27:31.095363 WARNING: region 4:
5450 09:27:31.099026 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5451 09:27:31.102462 WARNING: region 5:
5452 09:27:31.105334 WARNING: apc:0x0, sa:0x0, ea:0x0
5453 09:27:31.105407 WARNING: region 6:
5454 09:27:31.108776 WARNING: apc:0x0, sa:0x0, ea:0x0
5455 09:27:31.112561 WARNING: region 7:
5456 09:27:31.114974 WARNING: apc:0x0, sa:0x0, ea:0x0
5457 09:27:31.121631 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5458 09:27:31.125300 INFO: SPM: enable SPMC mode
5459 09:27:31.128402 NOTICE: spm_boot_init() start
5460 09:27:31.131507 NOTICE: spm_boot_init() end
5461 09:27:31.134726 INFO: BL31: Initializing runtime services
5462 09:27:31.138138 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5463 09:27:31.144714 INFO: BL31: Preparing for EL3 exit to normal world
5464 09:27:31.148232 INFO: Entry point address = 0x80000000
5465 09:27:31.151157 INFO: SPSR = 0x8
5466 09:27:31.172195
5467 09:27:31.172299
5468 09:27:31.172387
5469 09:27:31.172896 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
5470 09:27:31.172996 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
5471 09:27:31.173074 Setting prompt string to ['jacuzzi:']
5472 09:27:31.173145 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:32)
5473 09:27:31.175795 Starting depthcharge on Juniper...
5474 09:27:31.175887
5475 09:27:31.178656 vboot_handoff: creating legacy vboot_handoff structure
5476 09:27:31.178750
5477 09:27:31.182258 ec_init(0): CrosEC protocol v3 supported (544, 544)
5478 09:27:31.185132
5479 09:27:31.185208 Wipe memory regions:
5480 09:27:31.185318
5481 09:27:31.188493 [0x00000040000000, 0x00000054600000)
5482 09:27:31.231448
5483 09:27:31.231566 [0x00000054660000, 0x00000080000000)
5484 09:27:31.323119
5485 09:27:31.323235 [0x000000811994a0, 0x000000ffeda000)
5486 09:27:31.582960
5487 09:27:31.583081 [0x00000100000000, 0x00000140000000)
5488 09:27:31.715108
5489 09:27:31.718394 Initializing XHCI USB controller at 0x11200000.
5490 09:27:31.741754
5491 09:27:31.744923 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5492 09:27:31.745011
5493 09:27:31.745083
5494 09:27:31.745347 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5496 09:27:31.845696 jacuzzi: tftpboot 192.168.201.1 14407627/tftp-deploy-4yhed2s6/kernel/image.itb 14407627/tftp-deploy-4yhed2s6/kernel/cmdline
5497 09:27:31.845925 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5498 09:27:31.846032 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
5499 09:27:31.850770 tftpboot 192.168.201.1 14407627/tftp-deploy-4yhed2s6/kernel/image.itp-deploy-4yhed2s6/kernel/cmdline
5500 09:27:31.850846
5501 09:27:31.850905 Waiting for link
5502 09:27:32.255721
5503 09:27:32.255871 R8152: Initializing
5504 09:27:32.255962
5505 09:27:32.258918 Version 9 (ocp_data = 6010)
5506 09:27:32.259010
5507 09:27:32.262238 R8152: Done initializing
5508 09:27:32.262330
5509 09:27:32.262412 Adding net device
5510 09:27:32.648094
5511 09:27:32.648245 done.
5512 09:27:32.648333
5513 09:27:32.648416 MAC: 00:e0:4c:72:3d:a6
5514 09:27:32.648496
5515 09:27:32.651561 Sending DHCP discover... done.
5516 09:27:32.651624
5517 09:27:32.654671 Waiting for reply... done.
5518 09:27:32.654758
5519 09:27:32.657470 Sending DHCP request... done.
5520 09:27:32.657532
5521 09:27:32.663688 Waiting for reply... done.
5522 09:27:32.663767
5523 09:27:32.663820 My ip is 192.168.201.20
5524 09:27:32.663871
5525 09:27:32.667182 The DHCP server ip is 192.168.201.1
5526 09:27:32.667261
5527 09:27:32.673736 TFTP server IP predefined by user: 192.168.201.1
5528 09:27:32.673812
5529 09:27:32.680558 Bootfile predefined by user: 14407627/tftp-deploy-4yhed2s6/kernel/image.itb
5530 09:27:32.680634
5531 09:27:32.683074 Sending tftp read request... done.
5532 09:27:32.683144
5533 09:27:32.686964 Waiting for the transfer...
5534 09:27:32.687069
5535 09:27:32.959691 00000000 ################################################################
5536 09:27:32.959828
5537 09:27:33.228571 00080000 ################################################################
5538 09:27:33.228737
5539 09:27:33.483329 00100000 ################################################################
5540 09:27:33.483473
5541 09:27:33.742048 00180000 ################################################################
5542 09:27:33.742195
5543 09:27:33.998311 00200000 ################################################################
5544 09:27:33.998428
5545 09:27:34.256074 00280000 ################################################################
5546 09:27:34.256214
5547 09:27:34.511751 00300000 ################################################################
5548 09:27:34.511869
5549 09:27:34.762209 00380000 ################################################################
5550 09:27:34.762333
5551 09:27:35.025620 00400000 ################################################################
5552 09:27:35.025736
5553 09:27:35.278320 00480000 ################################################################
5554 09:27:35.278435
5555 09:27:35.537441 00500000 ################################################################
5556 09:27:35.537607
5557 09:27:35.792397 00580000 ################################################################
5558 09:27:35.792553
5559 09:27:36.048788 00600000 ################################################################
5560 09:27:36.048951
5561 09:27:36.307239 00680000 ################################################################
5562 09:27:36.307367
5563 09:27:36.565599 00700000 ################################################################
5564 09:27:36.565715
5565 09:27:36.818677 00780000 ################################################################
5566 09:27:36.818828
5567 09:27:37.075069 00800000 ################################################################
5568 09:27:37.075221
5569 09:27:37.336681 00880000 ################################################################
5570 09:27:37.336824
5571 09:27:37.611144 00900000 ################################################################
5572 09:27:37.611297
5573 09:27:37.878105 00980000 ################################################################
5574 09:27:37.878258
5575 09:27:38.143121 00a00000 ################################################################
5576 09:27:38.143283
5577 09:27:38.394822 00a80000 ################################################################
5578 09:27:38.394950
5579 09:27:38.657619 00b00000 ################################################################
5580 09:27:38.657786
5581 09:27:38.930227 00b80000 ################################################################
5582 09:27:38.930368
5583 09:27:39.194991 00c00000 ################################################################
5584 09:27:39.195116
5585 09:27:39.447046 00c80000 ################################################################
5586 09:27:39.447176
5587 09:27:39.706872 00d00000 ################################################################
5588 09:27:39.706996
5589 09:27:39.958829 00d80000 ################################################################
5590 09:27:39.958953
5591 09:27:40.207760 00e00000 ################################################################
5592 09:27:40.207882
5593 09:27:40.456071 00e80000 ################################################################
5594 09:27:40.456202
5595 09:27:40.712144 00f00000 ################################################################
5596 09:27:40.712274
5597 09:27:40.963622 00f80000 ################################################################
5598 09:27:40.963741
5599 09:27:41.217818 01000000 ################################################################
5600 09:27:41.217964
5601 09:27:41.479638 01080000 ################################################################
5602 09:27:41.479752
5603 09:27:41.751779 01100000 ################################################################
5604 09:27:41.751936
5605 09:27:42.013391 01180000 ################################################################
5606 09:27:42.013534
5607 09:27:42.268527 01200000 ################################################################
5608 09:27:42.268668
5609 09:27:42.540934 01280000 ################################################################
5610 09:27:42.541064
5611 09:27:42.796776 01300000 ################################################################
5612 09:27:42.796908
5613 09:27:43.042416 01380000 ################################################################
5614 09:27:43.042536
5615 09:27:43.288942 01400000 ################################################################
5616 09:27:43.289066
5617 09:27:43.537136 01480000 ################################################################
5618 09:27:43.537298
5619 09:27:43.783050 01500000 ################################################################
5620 09:27:43.783186
5621 09:27:44.032079 01580000 ################################################################
5622 09:27:44.032201
5623 09:27:44.285172 01600000 ################################################################
5624 09:27:44.285292
5625 09:27:44.541073 01680000 ################################################################
5626 09:27:44.541214
5627 09:27:44.793946 01700000 ################################################################
5628 09:27:44.794086
5629 09:27:45.042884 01780000 ################################################################
5630 09:27:45.043023
5631 09:27:45.292427 01800000 ################################################################
5632 09:27:45.292561
5633 09:27:45.540841 01880000 ################################################################
5634 09:27:45.540993
5635 09:27:45.789411 01900000 ################################################################
5636 09:27:45.789599
5637 09:27:46.037249 01980000 ################################################################
5638 09:27:46.037402
5639 09:27:46.284083 01a00000 ################################################################
5640 09:27:46.284243
5641 09:27:46.533669 01a80000 ################################################################
5642 09:27:46.533785
5643 09:27:46.782547 01b00000 ################################################################
5644 09:27:46.782684
5645 09:27:47.031022 01b80000 ################################################################
5646 09:27:47.031157
5647 09:27:47.285500 01c00000 ################################################################
5648 09:27:47.285648
5649 09:27:47.541600 01c80000 ################################################################
5650 09:27:47.541728
5651 09:27:47.793791 01d00000 ################################################################
5652 09:27:47.793906
5653 09:27:48.041401 01d80000 ################################################################
5654 09:27:48.041530
5655 09:27:48.287601 01e00000 ################################################################
5656 09:27:48.287753
5657 09:27:48.535145 01e80000 ################################################################
5658 09:27:48.535273
5659 09:27:48.783461 01f00000 ################################################################
5660 09:27:48.783625
5661 09:27:49.031429 01f80000 ################################################################
5662 09:27:49.031561
5663 09:27:49.279378 02000000 ################################################################
5664 09:27:49.279501
5665 09:27:49.510083 02080000 ########################################################### done.
5666 09:27:49.510223
5667 09:27:49.513513 The bootfile was 34560218 bytes long.
5668 09:27:49.513643
5669 09:27:49.513710 Sending tftp read request... done.
5670 09:27:49.517115
5671 09:27:49.517234 Waiting for the transfer...
5672 09:27:49.517322
5673 09:27:49.520015 00000000 # done.
5674 09:27:49.520122
5675 09:27:49.526634 Command line loaded dynamically from TFTP file: 14407627/tftp-deploy-4yhed2s6/kernel/cmdline
5676 09:27:49.526734
5677 09:27:49.543183 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5678 09:27:49.543302
5679 09:27:49.545923 Loading FIT.
5680 09:27:49.546020
5681 09:27:49.549668 Image ramdisk-1 has 21373753 bytes.
5682 09:27:49.549772
5683 09:27:49.549872 Image fdt-1 has 57695 bytes.
5684 09:27:49.552832
5685 09:27:49.552931 Image kernel-1 has 13126726 bytes.
5686 09:27:49.553016
5687 09:27:49.562746 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5688 09:27:49.562855
5689 09:27:49.575687 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5690 09:27:49.575795
5691 09:27:49.579043 Choosing best match conf-1 for compat google,juniper-sku16.
5692 09:27:49.584610
5693 09:27:49.589456 Connected to device vid:did:rid of 1ae0:0028:00
5694 09:27:49.597085
5695 09:27:49.600903 tpm_get_response: command 0x17b, return code 0x0
5696 09:27:49.600980
5697 09:27:49.604053 tpm_cleanup: add release locality here.
5698 09:27:49.604155
5699 09:27:49.607322 Shutting down all USB controllers.
5700 09:27:49.607421
5701 09:27:49.610375 Removing current net device
5702 09:27:49.610449
5703 09:27:49.613584 Exiting depthcharge with code 4 at timestamp: 35494512
5704 09:27:49.613660
5705 09:27:49.620514 LZMA decompressing kernel-1 to 0x80193568
5706 09:27:49.620611
5707 09:27:49.623658 LZMA decompressing kernel-1 to 0x40000000
5708 09:27:51.488916
5709 09:27:51.489051 jumping to kernel
5710 09:27:51.489708 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5711 09:27:51.489823 start: 2.2.5 auto-login-action (timeout 00:04:12) [common]
5712 09:27:51.489922 Setting prompt string to ['Linux version [0-9]']
5713 09:27:51.490015 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5714 09:27:51.490109 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5715 09:27:51.564085
5716 09:27:51.567670 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5717 09:27:51.571096 start: 2.2.5.1 login-action (timeout 00:04:12) [common]
5718 09:27:51.571218 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5719 09:27:51.571315 Setting prompt string to []
5720 09:27:51.571418 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5721 09:27:51.571516 Using line separator: #'\n'#
5722 09:27:51.571604 No login prompt set.
5723 09:27:51.571691 Parsing kernel messages
5724 09:27:51.571773 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5725 09:27:51.571947 [login-action] Waiting for messages, (timeout 00:04:12)
5726 09:27:51.572044 Waiting using forced prompt support (timeout 00:02:06)
5727 09:27:51.590596 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024
5728 09:27:51.593426 [ 0.000000] random: crng init done
5729 09:27:51.600511 [ 0.000000] Machine model: Google juniper sku16 board
5730 09:27:51.603889 [ 0.000000] efi: UEFI not found.
5731 09:27:51.610325 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5732 09:27:51.620032 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5733 09:27:51.626213 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5734 09:27:51.629607 [ 0.000000] printk: bootconsole [mtk8250] enabled
5735 09:27:51.638880 [ 0.000000] NUMA: No NUMA configuration found
5736 09:27:51.645760 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5737 09:27:51.651997 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5738 09:27:51.652077 [ 0.000000] Zone ranges:
5739 09:27:51.659267 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5740 09:27:51.662449 [ 0.000000] DMA32 empty
5741 09:27:51.669163 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5742 09:27:51.672421 [ 0.000000] Movable zone start for each node
5743 09:27:51.675131 [ 0.000000] Early memory node ranges
5744 09:27:51.682156 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5745 09:27:51.688657 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5746 09:27:51.694979 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5747 09:27:51.701770 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5748 09:27:51.708187 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5749 09:27:51.714884 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5750 09:27:51.731399 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5751 09:27:51.737956 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5752 09:27:51.745057 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5753 09:27:51.747954 [ 0.000000] psci: probing for conduit method from DT.
5754 09:27:51.755152 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5755 09:27:51.758165 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5756 09:27:51.764553 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5757 09:27:51.767885 [ 0.000000] psci: SMC Calling Convention v1.1
5758 09:27:51.774598 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5759 09:27:51.777721 [ 0.000000] Detected VIPT I-cache on CPU0
5760 09:27:51.784653 [ 0.000000] CPU features: detected: GIC system register CPU interface
5761 09:27:51.791009 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5762 09:27:51.797754 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5763 09:27:51.803763 [ 0.000000] CPU features: detected: ARM erratum 845719
5764 09:27:51.807390 [ 0.000000] alternatives: applying boot alternatives
5765 09:27:51.813839 [ 0.000000] Fallback order for Node 0: 0
5766 09:27:51.820111 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5767 09:27:51.823374 [ 0.000000] Policy zone: Normal
5768 09:27:51.840289 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5769 09:27:51.853136 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5770 09:27:51.862762 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5771 09:27:51.869259 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5772 09:27:51.876513 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5773 09:27:51.879313 <6>[ 0.000000] software IO TLB: area num 8.
5774 09:27:51.906756 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5775 09:27:51.964157 <6>[ 0.000000] Memory: 3894204K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 264260K reserved, 32768K cma-reserved)
5776 09:27:51.970873 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5777 09:27:51.977336 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5778 09:27:51.980753 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5779 09:27:51.987155 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5780 09:27:51.993536 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5781 09:27:51.997063 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5782 09:27:52.007091 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5783 09:27:52.013572 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5784 09:27:52.019935 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5785 09:27:52.030407 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5786 09:27:52.032994 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5787 09:27:52.040099 <6>[ 0.000000] GICv3: 640 SPIs implemented
5788 09:27:52.042885 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5789 09:27:52.046455 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5790 09:27:52.052718 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5791 09:27:52.059387 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5792 09:27:52.069401 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5793 09:27:52.082957 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5794 09:27:52.088778 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5795 09:27:52.101575 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5796 09:27:52.114548 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5797 09:27:52.120853 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5798 09:27:52.128036 <6>[ 0.009483] Console: colour dummy device 80x25
5799 09:27:52.131416 <6>[ 0.014522] printk: console [tty1] enabled
5800 09:27:52.144612 <6>[ 0.018911] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5801 09:27:52.147427 <6>[ 0.029375] pid_max: default: 32768 minimum: 301
5802 09:27:52.154569 <6>[ 0.034257] LSM: Security Framework initializing
5803 09:27:52.160875 <6>[ 0.039173] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5804 09:27:52.167150 <6>[ 0.046797] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5805 09:27:52.174268 <4>[ 0.055666] cacheinfo: Unable to detect cache hierarchy for CPU 0
5806 09:27:52.183899 <6>[ 0.062294] cblist_init_generic: Setting adjustable number of callback queues.
5807 09:27:52.190395 <6>[ 0.069740] cblist_init_generic: Setting shift to 3 and lim to 1.
5808 09:27:52.197672 <6>[ 0.076093] cblist_init_generic: Setting adjustable number of callback queues.
5809 09:27:52.203786 <6>[ 0.083537] cblist_init_generic: Setting shift to 3 and lim to 1.
5810 09:27:52.207370 <6>[ 0.089936] rcu: Hierarchical SRCU implementation.
5811 09:27:52.213713 <6>[ 0.094962] rcu: Max phase no-delay instances is 1000.
5812 09:27:52.221774 <6>[ 0.102896] EFI services will not be available.
5813 09:27:52.224591 <6>[ 0.107844] smp: Bringing up secondary CPUs ...
5814 09:27:52.235051 <6>[ 0.113099] Detected VIPT I-cache on CPU1
5815 09:27:52.241938 <4>[ 0.113145] cacheinfo: Unable to detect cache hierarchy for CPU 1
5816 09:27:52.248084 <6>[ 0.113153] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5817 09:27:52.254765 <6>[ 0.113186] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5818 09:27:52.258093 <6>[ 0.113668] Detected VIPT I-cache on CPU2
5819 09:27:52.264417 <4>[ 0.113702] cacheinfo: Unable to detect cache hierarchy for CPU 2
5820 09:27:52.271591 <6>[ 0.113707] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5821 09:27:52.277993 <6>[ 0.113719] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5822 09:27:52.284231 <6>[ 0.114164] Detected VIPT I-cache on CPU3
5823 09:27:52.290839 <4>[ 0.114194] cacheinfo: Unable to detect cache hierarchy for CPU 3
5824 09:27:52.297553 <6>[ 0.114198] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5825 09:27:52.304480 <6>[ 0.114210] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5826 09:27:52.307183 <6>[ 0.114786] CPU features: detected: Spectre-v2
5827 09:27:52.314422 <6>[ 0.114796] CPU features: detected: Spectre-BHB
5828 09:27:52.317236 <6>[ 0.114800] CPU features: detected: ARM erratum 858921
5829 09:27:52.323674 <6>[ 0.114805] Detected VIPT I-cache on CPU4
5830 09:27:52.327271 <4>[ 0.114853] cacheinfo: Unable to detect cache hierarchy for CPU 4
5831 09:27:52.337361 <6>[ 0.114861] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5832 09:27:52.343638 <6>[ 0.114869] arch_timer: Enabling local workaround for ARM erratum 858921
5833 09:27:52.347128 <6>[ 0.114879] arch_timer: CPU4: Trapping CNTVCT access
5834 09:27:52.353339 <6>[ 0.114887] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5835 09:27:52.360163 <6>[ 0.115372] Detected VIPT I-cache on CPU5
5836 09:27:52.366334 <4>[ 0.115413] cacheinfo: Unable to detect cache hierarchy for CPU 5
5837 09:27:52.373388 <6>[ 0.115419] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5838 09:27:52.379694 <6>[ 0.115426] arch_timer: Enabling local workaround for ARM erratum 858921
5839 09:27:52.382962 <6>[ 0.115432] arch_timer: CPU5: Trapping CNTVCT access
5840 09:27:52.389730 <6>[ 0.115437] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5841 09:27:52.396700 <6>[ 0.115871] Detected VIPT I-cache on CPU6
5842 09:27:52.402770 <4>[ 0.115917] cacheinfo: Unable to detect cache hierarchy for CPU 6
5843 09:27:52.409189 <6>[ 0.115923] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5844 09:27:52.416092 <6>[ 0.115930] arch_timer: Enabling local workaround for ARM erratum 858921
5845 09:27:52.422658 <6>[ 0.115936] arch_timer: CPU6: Trapping CNTVCT access
5846 09:27:52.428890 <6>[ 0.115942] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5847 09:27:52.432608 <6>[ 0.116473] Detected VIPT I-cache on CPU7
5848 09:27:52.438917 <4>[ 0.116516] cacheinfo: Unable to detect cache hierarchy for CPU 7
5849 09:27:52.445987 <6>[ 0.116522] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5850 09:27:52.452280 <6>[ 0.116529] arch_timer: Enabling local workaround for ARM erratum 858921
5851 09:27:52.458716 <6>[ 0.116536] arch_timer: CPU7: Trapping CNTVCT access
5852 09:27:52.464962 <6>[ 0.116541] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5853 09:27:52.468649 <6>[ 0.116590] smp: Brought up 1 node, 8 CPUs
5854 09:27:52.474882 <6>[ 0.355488] SMP: Total of 8 processors activated.
5855 09:27:52.478190 <6>[ 0.360423] CPU features: detected: 32-bit EL0 Support
5856 09:27:52.485097 <6>[ 0.365801] CPU features: detected: 32-bit EL1 Support
5857 09:27:52.491287 <6>[ 0.371169] CPU features: detected: CRC32 instructions
5858 09:27:52.494729 <6>[ 0.376593] CPU: All CPU(s) started at EL2
5859 09:27:52.501768 <6>[ 0.380931] alternatives: applying system-wide alternatives
5860 09:27:52.504539 <6>[ 0.388944] devtmpfs: initialized
5861 09:27:52.522858 <6>[ 0.397877] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5862 09:27:52.529892 <6>[ 0.407825] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5863 09:27:52.536351 <6>[ 0.415556] pinctrl core: initialized pinctrl subsystem
5864 09:27:52.539194 <6>[ 0.422669] DMI not present or invalid.
5865 09:27:52.545937 <6>[ 0.427039] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5866 09:27:52.555512 <6>[ 0.433938] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5867 09:27:52.562688 <6>[ 0.441469] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5868 09:27:52.572406 <6>[ 0.449721] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5869 09:27:52.575338 <6>[ 0.457898] audit: initializing netlink subsys (disabled)
5870 09:27:52.585666 <5>[ 0.463604] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5871 09:27:52.591982 <6>[ 0.464585] thermal_sys: Registered thermal governor 'step_wise'
5872 09:27:52.598630 <6>[ 0.471570] thermal_sys: Registered thermal governor 'power_allocator'
5873 09:27:52.601990 <6>[ 0.477867] cpuidle: using governor menu
5874 09:27:52.608205 <6>[ 0.488832] NET: Registered PF_QIPCRTR protocol family
5875 09:27:52.614925 <6>[ 0.494316] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5876 09:27:52.621167 <6>[ 0.501415] ASID allocator initialised with 32768 entries
5877 09:27:52.624666 <6>[ 0.508186] Serial: AMBA PL011 UART driver
5878 09:27:52.637046 <4>[ 0.518616] Trying to register duplicate clock ID: 113
5879 09:27:52.697230 <6>[ 0.575150] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5880 09:27:52.710923 <6>[ 0.589521] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5881 09:27:52.714712 <6>[ 0.599270] KASLR enabled
5882 09:27:52.728784 <6>[ 0.607248] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5883 09:27:52.735621 <6>[ 0.614251] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5884 09:27:52.741904 <6>[ 0.620729] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5885 09:27:52.748787 <6>[ 0.627720] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5886 09:27:52.755368 <6>[ 0.634195] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5887 09:27:52.761589 <6>[ 0.641185] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5888 09:27:52.768209 <6>[ 0.647659] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5889 09:27:52.774310 <6>[ 0.654649] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5890 09:27:52.781397 <6>[ 0.662184] ACPI: Interpreter disabled.
5891 09:27:52.788441 <6>[ 0.670213] iommu: Default domain type: Translated
5892 09:27:52.794859 <6>[ 0.675373] iommu: DMA domain TLB invalidation policy: strict mode
5893 09:27:52.798501 <5>[ 0.681998] SCSI subsystem initialized
5894 09:27:52.805043 <6>[ 0.686448] usbcore: registered new interface driver usbfs
5895 09:27:52.811385 <6>[ 0.692175] usbcore: registered new interface driver hub
5896 09:27:52.814893 <6>[ 0.697717] usbcore: registered new device driver usb
5897 09:27:52.822704 <6>[ 0.704042] pps_core: LinuxPPS API ver. 1 registered
5898 09:27:52.832560 <6>[ 0.709228] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5899 09:27:52.835532 <6>[ 0.718552] PTP clock support registered
5900 09:27:52.838966 <6>[ 0.722806] EDAC MC: Ver: 3.0.0
5901 09:27:52.846697 <6>[ 0.728468] FPGA manager framework
5902 09:27:52.853869 <6>[ 0.732147] Advanced Linux Sound Architecture Driver Initialized.
5903 09:27:52.856701 <6>[ 0.738886] vgaarb: loaded
5904 09:27:52.863201 <6>[ 0.742010] clocksource: Switched to clocksource arch_sys_counter
5905 09:27:52.866779 <5>[ 0.748443] VFS: Disk quotas dquot_6.6.0
5906 09:27:52.872897 <6>[ 0.752617] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5907 09:27:52.876241 <6>[ 0.759789] pnp: PnP ACPI: disabled
5908 09:27:52.885279 <6>[ 0.766641] NET: Registered PF_INET protocol family
5909 09:27:52.891362 <6>[ 0.771866] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5910 09:27:52.903540 <6>[ 0.781774] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5911 09:27:52.913327 <6>[ 0.790527] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5912 09:27:52.919694 <6>[ 0.798478] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5913 09:27:52.926745 <6>[ 0.806710] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5914 09:27:52.936320 <6>[ 0.814802] TCP: Hash tables configured (established 32768 bind 32768)
5915 09:27:52.943263 <6>[ 0.821629] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5916 09:27:52.949843 <6>[ 0.828602] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5917 09:27:52.956324 <6>[ 0.836081] NET: Registered PF_UNIX/PF_LOCAL protocol family
5918 09:27:52.963110 <6>[ 0.842197] RPC: Registered named UNIX socket transport module.
5919 09:27:52.965923 <6>[ 0.848340] RPC: Registered udp transport module.
5920 09:27:52.972397 <6>[ 0.853265] RPC: Registered tcp transport module.
5921 09:27:52.978856 <6>[ 0.858187] RPC: Registered tcp NFSv4.1 backchannel transport module.
5922 09:27:52.982384 <6>[ 0.864839] PCI: CLS 0 bytes, default 64
5923 09:27:52.985664 <6>[ 0.869091] Unpacking initramfs...
5924 09:27:52.995136 <6>[ 0.873110] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5925 09:27:53.005336 <6>[ 0.881815] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5926 09:27:53.008154 <6>[ 0.890716] kvm [1]: IPA Size Limit: 40 bits
5927 09:27:53.015245 <6>[ 0.897054] kvm [1]: vgic-v2@c420000
5928 09:27:53.018719 <6>[ 0.900875] kvm [1]: GIC system register CPU interface enabled
5929 09:27:53.025762 <6>[ 0.907054] kvm [1]: vgic interrupt IRQ18
5930 09:27:53.029371 <6>[ 0.911416] kvm [1]: Hyp mode initialized successfully
5931 09:27:53.036245 <5>[ 0.917716] Initialise system trusted keyrings
5932 09:27:53.042722 <6>[ 0.922482] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5933 09:27:53.051271 <6>[ 0.932439] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5934 09:27:53.057668 <5>[ 0.938830] NFS: Registering the id_resolver key type
5935 09:27:53.060844 <5>[ 0.944128] Key type id_resolver registered
5936 09:27:53.067226 <5>[ 0.948540] Key type id_legacy registered
5937 09:27:53.074102 <6>[ 0.952833] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5938 09:27:53.080424 <6>[ 0.959748] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5939 09:27:53.087617 <6>[ 0.967474] 9p: Installing v9fs 9p2000 file system support
5940 09:27:53.115797 <5>[ 0.996824] Key type asymmetric registered
5941 09:27:53.118745 <5>[ 1.001159] Asymmetric key parser 'x509' registered
5942 09:27:53.128630 <6>[ 1.006308] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5943 09:27:53.131469 <6>[ 1.013920] io scheduler mq-deadline registered
5944 09:27:53.135149 <6>[ 1.018674] io scheduler kyber registered
5945 09:27:53.158375 <6>[ 1.039405] EINJ: ACPI disabled.
5946 09:27:53.164228 <4>[ 1.043159] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5947 09:27:53.202334 <6>[ 1.084075] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5948 09:27:53.211228 <6>[ 1.092555] printk: console [ttyS0] disabled
5949 09:27:53.238706 <6>[ 1.117201] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5950 09:27:53.245817 <6>[ 1.126667] printk: console [ttyS0] enabled
5951 09:27:53.248734 <6>[ 1.126667] printk: console [ttyS0] enabled
5952 09:27:53.255717 <6>[ 1.135579] printk: bootconsole [mtk8250] disabled
5953 09:27:53.258515 <6>[ 1.135579] printk: bootconsole [mtk8250] disabled
5954 09:27:53.268689 <3>[ 1.146118] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5955 09:27:53.274910 <3>[ 1.154488] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5956 09:27:53.304630 <6>[ 1.182878] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5957 09:27:53.311012 <6>[ 1.192528] serial serial0: tty port ttyS1 registered
5958 09:27:53.317931 <6>[ 1.199133] SuperH (H)SCI(F) driver initialized
5959 09:27:53.321425 <6>[ 1.204648] msm_serial: driver initialized
5960 09:27:53.337042 <6>[ 1.215016] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5961 09:27:53.346863 <6>[ 1.223615] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5962 09:27:53.353084 <6>[ 1.232191] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5963 09:27:53.363088 <6>[ 1.240759] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5964 09:27:53.373211 <6>[ 1.249413] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5965 09:27:53.379849 <6>[ 1.258074] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5966 09:27:53.389719 <6>[ 1.266812] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5967 09:27:53.396071 <6>[ 1.275552] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5968 09:27:53.405973 <6>[ 1.284118] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5969 09:27:53.415784 <6>[ 1.292912] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5970 09:27:53.423678 <4>[ 1.305338] cacheinfo: Unable to detect cache hierarchy for CPU 0
5971 09:27:53.433160 <6>[ 1.314700] loop: module loaded
5972 09:27:53.444876 <6>[ 1.326591] vsim1: Bringing 1800000uV into 2700000-2700000uV
5973 09:27:53.463177 <6>[ 1.344689] megasas: 07.719.03.00-rc1
5974 09:27:53.471800 <6>[ 1.353502] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5975 09:27:53.480295 <6>[ 1.361399] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5976 09:27:53.496867 <6>[ 1.378111] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5977 09:27:53.553518 <6>[ 1.428228] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5978 09:27:53.695816 <6>[ 1.577249] Freeing initrd memory: 20868K
5979 09:27:53.714922 <4>[ 1.593006] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5980 09:27:53.721356 <4>[ 1.602237] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5981 09:27:53.728434 <4>[ 1.608935] Hardware name: Google juniper sku16 board (DT)
5982 09:27:53.731293 <4>[ 1.614674] Call trace:
5983 09:27:53.734867 <4>[ 1.617374] dump_backtrace.part.0+0xe0/0xf0
5984 09:27:53.737734 <4>[ 1.621910] show_stack+0x18/0x30
5985 09:27:53.744605 <4>[ 1.625482] dump_stack_lvl+0x68/0x84
5986 09:27:53.748040 <4>[ 1.629403] dump_stack+0x18/0x34
5987 09:27:53.751237 <4>[ 1.632973] sysfs_warn_dup+0x64/0x80
5988 09:27:53.754309 <4>[ 1.636895] sysfs_do_create_link_sd+0xf0/0x100
5989 09:27:53.757816 <4>[ 1.641683] sysfs_create_link+0x20/0x40
5990 09:27:53.764635 <4>[ 1.645862] bus_add_device+0x68/0x10c
5991 09:27:53.768021 <4>[ 1.649868] device_add+0x340/0x7ac
5992 09:27:53.771344 <4>[ 1.653611] of_device_add+0x44/0x60
5993 09:27:53.777905 <4>[ 1.657445] of_platform_device_create_pdata+0x90/0x120
5994 09:27:53.781235 <4>[ 1.662927] of_platform_bus_create+0x170/0x370
5995 09:27:53.784547 <4>[ 1.667714] of_platform_populate+0x50/0xfc
5996 09:27:53.790868 <4>[ 1.672153] parse_mtd_partitions+0x1dc/0x510
5997 09:27:53.794714 <4>[ 1.676767] mtd_device_parse_register+0xf8/0x2e0
5998 09:27:53.800838 <4>[ 1.681725] spi_nor_probe+0x21c/0x2f0
5999 09:27:53.804562 <4>[ 1.685731] spi_mem_probe+0x6c/0xb0
6000 09:27:53.807400 <4>[ 1.689564] spi_probe+0x84/0xe4
6001 09:27:53.810975 <4>[ 1.693046] really_probe+0xbc/0x2e0
6002 09:27:53.814439 <4>[ 1.696876] __driver_probe_device+0x78/0x11c
6003 09:27:53.820838 <4>[ 1.701488] driver_probe_device+0xd8/0x160
6004 09:27:53.824037 <4>[ 1.705926] __device_attach_driver+0xb8/0x134
6005 09:27:53.827374 <4>[ 1.710625] bus_for_each_drv+0x78/0xd0
6006 09:27:53.830789 <4>[ 1.714716] __device_attach+0xa8/0x1c0
6007 09:27:53.837409 <4>[ 1.718806] device_initial_probe+0x14/0x20
6008 09:27:53.840950 <4>[ 1.723245] bus_probe_device+0x9c/0xa4
6009 09:27:53.843751 <4>[ 1.727335] device_add+0x3ac/0x7ac
6010 09:27:53.847324 <4>[ 1.731077] __spi_add_device+0x78/0x120
6011 09:27:53.854210 <4>[ 1.735255] spi_add_device+0x40/0x7c
6012 09:27:53.857049 <4>[ 1.739173] spi_register_controller+0x610/0xad0
6013 09:27:53.863784 <4>[ 1.744046] devm_spi_register_controller+0x4c/0xa4
6014 09:27:53.867048 <4>[ 1.749178] mtk_spi_probe+0x3f8/0x650
6015 09:27:53.870510 <4>[ 1.753183] platform_probe+0x68/0xe0
6016 09:27:53.874013 <4>[ 1.757102] really_probe+0xbc/0x2e0
6017 09:27:53.879965 <4>[ 1.760932] __driver_probe_device+0x78/0x11c
6018 09:27:53.884036 <4>[ 1.765543] driver_probe_device+0xd8/0x160
6019 09:27:53.886850 <4>[ 1.769982] __driver_attach+0x94/0x19c
6020 09:27:53.890206 <4>[ 1.774072] bus_for_each_dev+0x70/0xd0
6021 09:27:53.896928 <4>[ 1.778163] driver_attach+0x24/0x30
6022 09:27:53.900283 <4>[ 1.781993] bus_add_driver+0x154/0x20c
6023 09:27:53.903734 <4>[ 1.786083] driver_register+0x78/0x130
6024 09:27:53.910258 <4>[ 1.790174] __platform_driver_register+0x28/0x34
6025 09:27:53.913919 <4>[ 1.795134] mtk_spi_driver_init+0x1c/0x28
6026 09:27:53.916766 <4>[ 1.799488] do_one_initcall+0x50/0x1d0
6027 09:27:53.920501 <4>[ 1.803578] kernel_init_freeable+0x21c/0x288
6028 09:27:53.926877 <4>[ 1.808192] kernel_init+0x24/0x12c
6029 09:27:53.929790 <4>[ 1.811938] ret_from_fork+0x10/0x20
6030 09:27:53.939083 <6>[ 1.820843] tun: Universal TUN/TAP device driver, 1.6
6031 09:27:53.942518 <6>[ 1.827132] thunder_xcv, ver 1.0
6032 09:27:53.949223 <6>[ 1.830648] thunder_bgx, ver 1.0
6033 09:27:53.949302 <6>[ 1.834153] nicpf, ver 1.0
6034 09:27:53.960434 <6>[ 1.838536] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6035 09:27:53.964146 <6>[ 1.846020] hns3: Copyright (c) 2017 Huawei Corporation.
6036 09:27:53.970532 <6>[ 1.851617] hclge is initializing
6037 09:27:53.973853 <6>[ 1.855202] e1000: Intel(R) PRO/1000 Network Driver
6038 09:27:53.980193 <6>[ 1.860336] e1000: Copyright (c) 1999-2006 Intel Corporation.
6039 09:27:53.987116 <6>[ 1.866361] e1000e: Intel(R) PRO/1000 Network Driver
6040 09:27:53.989883 <6>[ 1.871582] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6041 09:27:53.996406 <6>[ 1.877776] igb: Intel(R) Gigabit Ethernet Network Driver
6042 09:27:54.002979 <6>[ 1.883431] igb: Copyright (c) 2007-2014 Intel Corporation.
6043 09:27:54.010301 <6>[ 1.889274] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6044 09:27:54.016453 <6>[ 1.895797] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6045 09:27:54.020007 <6>[ 1.902388] sky2: driver version 1.30
6046 09:27:54.026635 <6>[ 1.907660] usbcore: registered new device driver r8152-cfgselector
6047 09:27:54.033087 <6>[ 1.914209] usbcore: registered new interface driver r8152
6048 09:27:54.039645 <6>[ 1.920048] VFIO - User Level meta-driver version: 0.3
6049 09:27:54.046271 <6>[ 1.927935] mtu3 11201000.usb: uwk - reg:0x420, version:101
6050 09:27:54.053291 <4>[ 1.933807] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6051 09:27:54.059394 <6>[ 1.941086] mtu3 11201000.usb: dr_mode: 1, drd: auto
6052 09:27:54.066005 <6>[ 1.946313] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6053 09:27:54.069322 <6>[ 1.952500] mtu3 11201000.usb: usb3-drd: 0
6054 09:27:54.079935 <6>[ 1.958036] mtu3 11201000.usb: xHCI platform device register success...
6055 09:27:54.086073 <4>[ 1.966654] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6056 09:27:54.093146 <6>[ 1.974608] xhci-mtk 11200000.usb: xHCI Host Controller
6057 09:27:54.099513 <6>[ 1.980113] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6058 09:27:54.106197 <6>[ 1.987833] xhci-mtk 11200000.usb: USB3 root hub has no ports
6059 09:27:54.116341 <6>[ 1.993841] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6060 09:27:54.123182 <6>[ 2.003266] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6061 09:27:54.129623 <6>[ 2.009340] xhci-mtk 11200000.usb: xHCI Host Controller
6062 09:27:54.136191 <6>[ 2.014828] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6063 09:27:54.142788 <6>[ 2.022490] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6064 09:27:54.146291 <6>[ 2.029307] hub 1-0:1.0: USB hub found
6065 09:27:54.149803 <6>[ 2.033337] hub 1-0:1.0: 1 port detected
6066 09:27:54.160974 <6>[ 2.038689] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6067 09:27:54.163855 <6>[ 2.047312] hub 2-0:1.0: USB hub found
6068 09:27:54.173710 <3>[ 2.051363] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6069 09:27:54.180507 <6>[ 2.059257] usbcore: registered new interface driver usb-storage
6070 09:27:54.187163 <6>[ 2.065847] usbcore: registered new device driver onboard-usb-hub
6071 09:27:54.196900 <4>[ 2.074106] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6072 09:27:54.204698 <6>[ 2.086352] mt6397-rtc mt6358-rtc: registered as rtc0
6073 09:27:54.214663 <6>[ 2.091827] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:27:53 UTC (1718702873)
6074 09:27:54.221025 <6>[ 2.101723] i2c_dev: i2c /dev entries driver
6075 09:27:54.230910 <6>[ 2.108150] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6076 09:27:54.237654 <6>[ 2.116470] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6077 09:27:54.244138 <6>[ 2.125374] i2c 4-0058: Fixed dependency cycle(s) with /panel
6078 09:27:54.250705 <6>[ 2.131408] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6079 09:27:54.260547 <3>[ 2.138872] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6080 09:27:54.277231 <6>[ 2.158797] cpu cpu0: EM: created perf domain
6081 09:27:54.287564 <6>[ 2.164272] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6082 09:27:54.293753 <6>[ 2.175547] cpu cpu4: EM: created perf domain
6083 09:27:54.300978 <6>[ 2.182673] sdhci: Secure Digital Host Controller Interface driver
6084 09:27:54.307723 <6>[ 2.189127] sdhci: Copyright(c) Pierre Ossman
6085 09:27:54.314815 <6>[ 2.194547] Synopsys Designware Multimedia Card Interface Driver
6086 09:27:54.321422 <6>[ 2.195083] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6087 09:27:54.324215 <6>[ 2.201639] sdhci-pltfm: SDHCI platform and OF driver helper
6088 09:27:54.333262 <6>[ 2.214669] ledtrig-cpu: registered to indicate activity on CPUs
6089 09:27:54.341012 <6>[ 2.222438] usbcore: registered new interface driver usbhid
6090 09:27:54.344455 <6>[ 2.228279] usbhid: USB HID core driver
6091 09:27:54.355473 <6>[ 2.232601] spi_master spi2: will run message pump with realtime priority
6092 09:27:54.359060 <4>[ 2.232750] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6093 09:27:54.369600 <4>[ 2.246952] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6094 09:27:54.382303 <6>[ 2.251135] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6095 09:27:54.395753 <6>[ 2.269108] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6096 09:27:54.402486 <4>[ 2.277566] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6097 09:27:54.409079 <6>[ 2.290210] cros-ec-spi spi2.0: Chrome EC device registered
6098 09:27:54.419049 <4>[ 2.297161] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6099 09:27:54.430373 <4>[ 2.308392] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6100 09:27:54.436901 <4>[ 2.317652] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6101 09:27:54.449404 <6>[ 2.327707] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6102 09:27:54.472511 <6>[ 2.354108] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6103 09:27:54.480037 <6>[ 2.361811] mmc0: new HS400 MMC card at address 0001
6104 09:27:54.487553 <6>[ 2.368847] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6105 09:27:54.498048 <6>[ 2.379737] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6106 09:27:54.508007 <6>[ 2.382224] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6107 09:27:54.511624 <6>[ 2.388404] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6108 09:27:54.524554 <6>[ 2.398604] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6109 09:27:54.537458 <6>[ 2.398810] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6110 09:27:54.541134 <6>[ 2.400616] NET: Registered PF_PACKET protocol family
6111 09:27:54.550981 <6>[ 2.411844] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6112 09:27:54.557697 <6>[ 2.412613] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6113 09:27:54.560700 <6>[ 2.422640] 9pnet: Installing 9P2000 support
6114 09:27:54.567058 <6>[ 2.428703] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6115 09:27:54.570517 <5>[ 2.437775] Key type dns_resolver registered
6116 09:27:54.580234 <6>[ 2.458389] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6117 09:27:54.583803 <6>[ 2.459477] registered taskstats version 1
6118 09:27:54.587303 <5>[ 2.469751] Loading compiled-in X.509 certificates
6119 09:27:54.626312 <3>[ 2.504695] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6120 09:27:54.654834 <6>[ 2.529768] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6121 09:27:54.666028 <6>[ 2.543979] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6122 09:27:54.675754 <6>[ 2.552587] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6123 09:27:54.682006 <6>[ 2.561151] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6124 09:27:54.692046 <6>[ 2.569715] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6125 09:27:54.698545 <6>[ 2.578242] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6126 09:27:54.709064 <6>[ 2.586762] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6127 09:27:54.718204 <6>[ 2.595280] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6128 09:27:54.725365 <6>[ 2.604450] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6129 09:27:54.731825 <6>[ 2.611800] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6130 09:27:54.735281 <6>[ 2.616948] hub 1-1:1.0: USB hub found
6131 09:27:54.741661 <6>[ 2.619003] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6132 09:27:54.748018 <6>[ 2.622824] hub 1-1:1.0: 3 ports detected
6133 09:27:54.754713 <6>[ 2.629487] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6134 09:27:54.761375 <6>[ 2.640496] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6135 09:27:54.767976 <6>[ 2.648666] panfrost 13040000.gpu: clock rate = 511999970
6136 09:27:54.778039 <6>[ 2.654346] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6137 09:27:54.787719 <6>[ 2.664803] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6138 09:27:54.793867 <6>[ 2.672832] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6139 09:27:54.807131 <6>[ 2.681265] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6140 09:27:54.813867 <6>[ 2.693342] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6141 09:27:54.825977 <6>[ 2.704337] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6142 09:27:54.836044 <6>[ 2.713358] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6143 09:27:54.845926 <6>[ 2.722503] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6144 09:27:54.855576 <6>[ 2.731632] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6145 09:27:54.862224 <6>[ 2.740759] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6146 09:27:54.872269 <6>[ 2.750062] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6147 09:27:54.882210 <6>[ 2.759361] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6148 09:27:54.892335 <6>[ 2.768836] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6149 09:27:54.902241 <6>[ 2.778311] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6150 09:27:54.911598 <6>[ 2.787437] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6151 09:27:54.983198 <6>[ 2.861528] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6152 09:27:54.993067 <6>[ 2.870392] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6153 09:27:55.003675 <6>[ 2.881981] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6154 09:27:55.043651 <6>[ 2.922044] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6155 09:27:55.710346 <6>[ 3.106267] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6156 09:27:55.720534 <4>[ 3.209392] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6157 09:27:55.726552 <4>[ 3.209409] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6158 09:27:55.733312 <6>[ 3.246901] r8152 1-1.2:1.0 eth0: v1.12.13
6159 09:27:55.739702 <6>[ 3.326036] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6160 09:27:55.746498 <6>[ 3.571731] Console: switching to colour frame buffer device 170x48
6161 09:27:55.752861 <6>[ 3.632484] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6162 09:27:55.774314 <6>[ 3.649462] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6163 09:27:55.791549 <6>[ 3.666475] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6164 09:27:55.798045 <6>[ 3.678925] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6165 09:27:55.809262 <6>[ 3.687185] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6166 09:27:55.819061 <6>[ 3.694662] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6167 09:27:55.838412 <6>[ 3.713432] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6168 09:27:56.968861 <6>[ 4.850376] r8152 1-1.2:1.0 eth0: carrier on
6169 09:27:59.972913 <5>[ 4.870045] Sending DHCP requests .., OK
6170 09:27:59.979249 <6>[ 7.858368] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6171 09:27:59.982401 <6>[ 7.866823] IP-Config: Complete:
6172 09:27:59.995771 <6>[ 7.870388] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6173 09:28:00.005532 <6>[ 7.881288] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6174 09:28:00.017387 <6>[ 7.895562] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6175 09:28:00.026350 <6>[ 7.895572] nameserver0=192.168.201.1
6176 09:28:00.034112 <6>[ 7.915397] clk: Disabling unused clocks
6177 09:28:00.038953 <6>[ 7.923355] ALSA device list:
6178 09:28:00.047660 <6>[ 7.929394] No soundcards found.
6179 09:28:00.057389 <6>[ 7.938512] Freeing unused kernel memory: 8512K
6180 09:28:00.063809 <6>[ 7.945647] Run /init as init process
6181 09:28:00.105465 Starting syslogd: OK
6182 09:28:00.108613 Starting klogd: OK
6183 09:28:00.116963 Running sysctl: OK
6184 09:28:00.126625 Populating /dev using udev: <30>[ 8.007457] udevd[205]: starting version 3.2.9
6185 09:28:00.135880 <27>[ 8.017432] udevd[205]: specified user 'tss' unknown
6186 09:28:00.143043 <27>[ 8.024595] udevd[205]: specified group 'tss' unknown
6187 09:28:00.151597 <30>[ 8.032986] udevd[206]: starting eudev-3.2.9
6188 09:28:00.176901 <27>[ 8.058436] udevd[206]: specified user 'tss' unknown
6189 09:28:00.183832 <27>[ 8.064698] udevd[206]: specified group 'tss' unknown
6190 09:28:00.303209 <6>[ 8.181205] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6191 09:28:00.309998 <3>[ 8.191148] mtk-scp 10500000.scp: invalid resource
6192 09:28:00.319528 <4>[ 8.193545] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6193 09:28:00.326564 <6>[ 8.196355] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6194 09:28:00.335952 <6>[ 8.206859] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6195 09:28:00.345456 <6>[ 8.226712] remoteproc remoteproc0: scp is available
6196 09:28:00.355028 <4>[ 8.232775] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6197 09:28:00.365226 <6>[ 8.233310] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6198 09:28:00.371458 <6>[ 8.241385] remoteproc remoteproc0: powering up scp
6199 09:28:00.381259 <3>[ 8.252675] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6200 09:28:00.395010 <3>[ 8.254662] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6201 09:28:00.401473 <4>[ 8.257874] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6202 09:28:00.407889 <3>[ 8.267402] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6203 09:28:00.414677 <3>[ 8.279841] remoteproc remoteproc0: request_firmware failed: -2
6204 09:28:00.425098 <3>[ 8.283003] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6205 09:28:00.435371 <3>[ 8.283018] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6206 09:28:00.445154 <3>[ 8.283024] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6207 09:28:00.451858 <3>[ 8.283272] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6208 09:28:00.462893 <3>[ 8.283286] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6209 09:28:00.472435 <3>[ 8.283294] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6210 09:28:00.479142 <3>[ 8.283304] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6211 09:28:00.489492 <3>[ 8.283312] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6212 09:28:00.499171 <3>[ 8.283364] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6213 09:28:00.506304 <4>[ 8.286141] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6214 09:28:00.516215 <4>[ 8.286232] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6215 09:28:00.525330 <3>[ 8.288221] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6216 09:28:00.528945 <6>[ 8.316704] mc: Linux media interface: v0.10
6217 09:28:00.538435 <6>[ 8.317498] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6218 09:28:00.545501 <5>[ 8.317539] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6219 09:28:00.551746 <3>[ 8.321874] elan_i2c 2-0015: Error applying setting, reverse things back
6220 09:28:00.558731 <5>[ 8.341737] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6221 09:28:00.565084 <6>[ 8.386977] videodev: Linux video capture interface: v2.00
6222 09:28:00.574915 <6>[ 8.387060] cs_system_cfg: CoreSight Configuration manager initialised
6223 09:28:00.581367 <5>[ 8.394140] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6224 09:28:00.591361 <6>[ 8.400889] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6225 09:28:00.597892 <4>[ 8.411863] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6226 09:28:00.608226 <6>[ 8.416529] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6227 09:28:00.618311 <6>[ 8.422109] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6228 09:28:00.621651 <6>[ 8.424208] cfg80211: failed to load regulatory.db
6229 09:28:00.631360 <6>[ 8.432774] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6230 09:28:00.634165 <6>[ 8.461712] Bluetooth: Core ver 2.22
6231 09:28:00.641171 <6>[ 8.469282] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6232 09:28:00.654534 <3>[ 8.469376] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6233 09:28:00.660811 <3>[ 8.470032] debugfs: File 'Playback' in directory 'dapm' already present!
6234 09:28:00.667064 <3>[ 8.470037] debugfs: File 'Capture' in directory 'dapm' already present!
6235 09:28:00.673855 <6>[ 8.470370] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6236 09:28:00.687711 <6>[ 8.471263] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6237 09:28:00.694391 <3>[ 8.472682] thermal_sys: Failed to find 'trips' node
6238 09:28:00.704217 <3>[ 8.472687] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6239 09:28:00.711553 <3>[ 8.472694] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6240 09:28:00.720998 <4>[ 8.472697] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6241 09:28:00.724465 <3>[ 8.473954] thermal_sys: Failed to find 'trips' node
6242 09:28:00.734790 <3>[ 8.473957] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6243 09:28:00.741149 <3>[ 8.473963] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6244 09:28:00.751023 <4>[ 8.473966] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6245 09:28:00.758234 <6>[ 8.477047] NET: Registered PF_BLUETOOTH protocol family
6246 09:28:00.764675 <6>[ 8.477533] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6247 09:28:00.771069 <6>[ 8.478217] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6248 09:28:00.781413 <6>[ 8.486012] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6249 09:28:00.787708 <6>[ 8.487218] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6250 09:28:00.797320 <6>[ 8.487522] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6251 09:28:00.810601 <6>[ 8.488934] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6252 09:28:00.817309 <6>[ 8.489091] usbcore: registered new interface driver uvcvideo
6253 09:28:00.824078 <6>[ 8.494039] Bluetooth: HCI device and connection manager initialized
6254 09:28:00.830817 <6>[ 8.503407] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6255 09:28:00.837754 <6>[ 8.508346] Bluetooth: HCI socket layer initialized
6256 09:28:00.848239 <6>[ 8.516586] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6257 09:28:00.854727 <6>[ 8.520035] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6258 09:28:00.858046 <6>[ 8.520137] Bluetooth: L2CAP socket layer initialized
6259 09:28:00.869164 <6>[ 8.520146] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6260 09:28:00.876148 <6>[ 8.528098] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6261 09:28:00.882444 <6>[ 8.539831] Bluetooth: SCO socket layer initialized
6262 09:28:00.892133 <6>[ 8.547212] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6263 09:28:00.899164 <6>[ 8.580142] Bluetooth: HCI UART driver ver 2.3
6264 09:28:00.909316 <4>[ 8.711892] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6265 09:28:00.912467 <4>[ 8.711892] Fallback method does not support PEC.
6266 09:28:00.919597 <6>[ 8.717793] Bluetooth: HCI UART protocol H4 registered
6267 09:28:00.929396 <3>[ 8.725634] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6268 09:28:00.935921 <6>[ 8.730773] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6269 09:28:00.942877 <6>[ 8.732875] Bluetooth: HCI UART protocol LL registered
6270 09:28:00.952276 <3>[ 8.747017] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6271 09:28:00.959008 <6>[ 8.754606] Bluetooth: HCI UART protocol Three-wire (H5) registered
6272 09:28:00.989448 <6>[ 8.870831] Bluetooth: HCI UART protocol Broadcom registered
6273 09:28:00.996171 <6>[ 8.877526] Bluetooth: HCI UART protocol QCA registered
6274 09:28:01.002624 <6>[ 8.878671] Bluetooth: hci0: setting up ROME/QCA6390
6275 09:28:01.009730 <6>[ 8.883028] Bluetooth: HCI UART protocol Marvell registered
6276 09:28:01.013257 done
6277 09:28:01.022281 Saving random seed: OK
6278 09:28:01.033222 Starting network: ip: RTNETLINK answers: File exists
6279 09:28:01.036620 FAIL
6280 09:28:01.070632 Starting dropbear sshd: <6>[ 8.952101] NET: Registered PF_INET6 protocol family
6281 09:28:01.078098 <6>[ 8.959001] Segment Routing with IPv6
6282 09:28:01.080986 <6>[ 8.963668] In-situ OAM (IOAM) with IPv6
6283 09:28:01.085099 OK
6284 09:28:01.095061 /bin/sh: can't access tty; job control turned off
6285 09:28:01.095395 Matched prompt #10: / #
6287 09:28:01.095578 Setting prompt string to ['/ #']
6288 09:28:01.095665 end: 2.2.5.1 login-action (duration 00:00:10) [common]
6290 09:28:01.095840 end: 2.2.5 auto-login-action (duration 00:00:10) [common]
6291 09:28:01.095919 start: 2.2.6 expect-shell-connection (timeout 00:04:02) [common]
6292 09:28:01.095984 Setting prompt string to ['/ #']
6293 09:28:01.096040 Forcing a shell prompt, looking for ['/ #']
6295 09:28:01.146244 / #
6296 09:28:01.146424 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6297 09:28:01.146493 Waiting using forced prompt support (timeout 00:02:30)
6298 09:28:01.151748
6299 09:28:01.152012 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6300 09:28:01.152103 start: 2.2.7 export-device-env (timeout 00:04:02) [common]
6301 09:28:01.152189 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6302 09:28:01.152268 end: 2.2 depthcharge-retry (duration 00:00:58) [common]
6303 09:28:01.152352 end: 2 depthcharge-action (duration 00:00:58) [common]
6304 09:28:01.152435 start: 3 lava-test-retry (timeout 00:01:00) [common]
6305 09:28:01.152516 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6306 09:28:01.152584 Using namespace: common
6308 09:28:01.252911 / # #
6309 09:28:01.253145 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6310 09:28:01.253259 <6>[ 9.071739] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6311 09:28:01.253323 #<3>[ 9.101070] Bluetooth: hci0: Frame reassembly failed (-84)
6312 09:28:01.257948
6313 09:28:01.258203 Using /lava-14407627
6315 09:28:01.358506 / # export SHELL=/bin/sh
6316 09:28:01.358752 <4>[ 9.155098] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6317 09:28:01.358832 <4>[ 9.173870] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6318 09:28:01.358892 <4>[ 9.188906] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6319 09:28:01.358947 export SHELL=/b<4>[ 9.202137] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6320 09:28:01.363727 in/sh
6322 09:28:01.464223 / # . /lava-14407627/environment
6323 09:28:01.469314 . /lava-14407627/environment
6325 09:28:01.569853 / # /lava-14407627/bin/lava-test-runner /lava-14407627/0
6326 09:28:01.570074 Test shell timeout: 10s (minimum of the action and connection timeout)
6327 09:28:01.570381 <6>[ 9.387051] Bluetooth: hci0: QCA Product ID :0x00000008
6328 09:28:01.570480 <6>[ 9.395611] Bluetooth: hci0: QCA SOC Version :0x00000044
6329 09:28:01.570578 <6>[ 9.404050] Bluetooth: hci0: QCA ROM Version :0x00000302
6330 09:28:01.570662 /lava-14407627/bin/lava-test-runner /l<6>[ 9.412676] Bluetooth: hci0: QCA Patch Version:0x00000111
6331 09:28:01.570744 ava-14407627/0<6>[ 9.423306] Bluetooth: hci0: QCA controller version 0x00440302
6332 09:28:01.570825 <6>[ 9.433784] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6333 09:28:01.570908 <4>[ 9.445327] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6334 09:28:01.613647 <3>[ 9.457145] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6335 09:28:01.613781
6336 09:28:01.613873 <3>[ 9.467901] Bluetooth: hci0: QCA Failed to download patch (-2)
6337 09:28:01.613959 + export 'TESTRUN_ID=0_dmesg'
6338 09:28:01.614218 + c<8>[ 9.487961] <LAVA_SIGNAL_STARTRUN 0_dmesg 14407627_1.5.2.3.1>
6339 09:28:01.614308 d /lava-14407627/0/tests/0_dmesg
6340 09:28:01.614573 Received signal: <STARTRUN> 0_dmesg 14407627_1.5.2.3.1
6341 09:28:01.614670 Starting test lava.0_dmesg (14407627_1.5.2.3.1)
6342 09:28:01.614776 Skipping test definition patterns.
6343 09:28:01.614898 + cat uuid
6344 09:28:01.614983 + UUID=14407627_1.5.2.3.1
6345 09:28:01.617554 + set +x
6346 09:28:01.621023 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6347 09:28:01.635625 <8>[ 9.513625] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6348 09:28:01.635875 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6350 09:28:01.664406 <8>[ 9.542410] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6351 09:28:01.664662 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6353 09:28:01.691714 <8>[ 9.569455] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6354 09:28:01.691964 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6356 09:28:01.696865 + set +x
6357 09:28:01.700578 Received signal: <ENDRUN> 0_dmesg 14407627_1.5.2.3.1
6358 09:28:01.700717 Ending use of test pattern.
6359 09:28:01.700808 Ending test lava.0_dmesg (14407627_1.5.2.3.1), duration 0.09
6361 09:28:01.703615 <8>[ 9.581638] <LAVA_SIGNAL_ENDRUN 0_dmesg 14407627_1.5.2.3.1>
6362 09:28:01.706871 <LAVA_TEST_RUNNER EXIT>
6363 09:28:01.707111 ok: lava_test_shell seems to have completed
6364 09:28:01.707207 alert: pass
crit: pass
emerg: pass
6365 09:28:01.707290 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6366 09:28:01.707368 end: 3 lava-test-retry (duration 00:00:01) [common]
6367 09:28:01.707447 start: 4 finalize (timeout 00:08:41) [common]
6368 09:28:01.707525 start: 4.1 power-off (timeout 00:00:30) [common]
6369 09:28:01.707661 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
6370 09:28:03.795528 >> Command sent successfully.
6371 09:28:03.799215 Returned 0 in 2 seconds
6372 09:28:03.899573 end: 4.1 power-off (duration 00:00:02) [common]
6374 09:28:03.900004 start: 4.2 read-feedback (timeout 00:08:39) [common]
6375 09:28:03.900278 Listened to connection for namespace 'common' for up to 1s
6376 09:28:04.901217 Finalising connection for namespace 'common'
6377 09:28:04.901381 Disconnecting from shell: Finalise
6378 09:28:04.901486 / #
6379 09:28:05.001780 end: 4.2 read-feedback (duration 00:00:01) [common]
6380 09:28:05.001928 end: 4 finalize (duration 00:00:03) [common]
6381 09:28:05.002062 Cleaning after the job
6382 09:28:05.002199 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/ramdisk
6383 09:28:05.004771 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/kernel
6384 09:28:05.012416 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/dtb
6385 09:28:05.012624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407627/tftp-deploy-4yhed2s6/modules
6386 09:28:05.018444 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407627
6387 09:28:05.060678 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407627
6388 09:28:05.060846 Job finished correctly