Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 53
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 09:57:58.148047 lava-dispatcher, installed at version: 2024.03
2 09:57:58.148255 start: 0 validate
3 09:57:58.148364 Start time: 2024-06-18 09:57:58.148358+00:00 (UTC)
4 09:57:58.148498 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:57:58.148633 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 09:57:58.430611 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:57:58.431286 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 09:57:58.685154 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:57:58.685916 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 09:57:58.939792 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:57:58.940377 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:57:59.207532 validate duration: 1.06
14 09:57:59.208599 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:57:59.209084 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:57:59.209501 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:57:59.210231 Not decompressing ramdisk as can be used compressed.
18 09:57:59.210688 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 09:57:59.211050 saving as /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/ramdisk/rootfs.cpio.gz
20 09:57:59.211445 total size: 47897469 (45 MB)
21 09:57:59.216301 progress 0 % (0 MB)
22 09:57:59.251486 progress 5 % (2 MB)
23 09:57:59.267249 progress 10 % (4 MB)
24 09:57:59.279549 progress 15 % (6 MB)
25 09:57:59.291450 progress 20 % (9 MB)
26 09:57:59.303256 progress 25 % (11 MB)
27 09:57:59.315132 progress 30 % (13 MB)
28 09:57:59.327112 progress 35 % (16 MB)
29 09:57:59.339603 progress 40 % (18 MB)
30 09:57:59.351800 progress 45 % (20 MB)
31 09:57:59.363764 progress 50 % (22 MB)
32 09:57:59.375667 progress 55 % (25 MB)
33 09:57:59.387739 progress 60 % (27 MB)
34 09:57:59.399786 progress 65 % (29 MB)
35 09:57:59.411837 progress 70 % (32 MB)
36 09:57:59.423913 progress 75 % (34 MB)
37 09:57:59.435981 progress 80 % (36 MB)
38 09:57:59.447804 progress 85 % (38 MB)
39 09:57:59.459746 progress 90 % (41 MB)
40 09:57:59.471640 progress 95 % (43 MB)
41 09:57:59.483272 progress 100 % (45 MB)
42 09:57:59.483478 45 MB downloaded in 0.27 s (167.91 MB/s)
43 09:57:59.483630 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:57:59.483844 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:57:59.483922 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:57:59.483996 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:57:59.484125 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 09:57:59.484190 saving as /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/kernel/Image
50 09:57:59.484242 total size: 54813184 (52 MB)
51 09:57:59.484295 No compression specified
52 09:57:59.485430 progress 0 % (0 MB)
53 09:57:59.499571 progress 5 % (2 MB)
54 09:57:59.513383 progress 10 % (5 MB)
55 09:57:59.527091 progress 15 % (7 MB)
56 09:57:59.540876 progress 20 % (10 MB)
57 09:57:59.554526 progress 25 % (13 MB)
58 09:57:59.568082 progress 30 % (15 MB)
59 09:57:59.581879 progress 35 % (18 MB)
60 09:57:59.595449 progress 40 % (20 MB)
61 09:57:59.608995 progress 45 % (23 MB)
62 09:57:59.622753 progress 50 % (26 MB)
63 09:57:59.637571 progress 55 % (28 MB)
64 09:57:59.651165 progress 60 % (31 MB)
65 09:57:59.664691 progress 65 % (34 MB)
66 09:57:59.678066 progress 70 % (36 MB)
67 09:57:59.691860 progress 75 % (39 MB)
68 09:57:59.705450 progress 80 % (41 MB)
69 09:57:59.719224 progress 85 % (44 MB)
70 09:57:59.732967 progress 90 % (47 MB)
71 09:57:59.746624 progress 95 % (49 MB)
72 09:57:59.759905 progress 100 % (52 MB)
73 09:57:59.760113 52 MB downloaded in 0.28 s (189.49 MB/s)
74 09:57:59.760260 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:57:59.760462 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:57:59.760542 start: 1.3 download-retry (timeout 00:09:59) [common]
78 09:57:59.760616 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 09:57:59.760742 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 09:57:59.760802 saving as /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 09:57:59.760854 total size: 57695 (0 MB)
82 09:57:59.760906 No compression specified
83 09:57:59.761911 progress 56 % (0 MB)
84 09:57:59.762169 progress 100 % (0 MB)
85 09:57:59.762407 0 MB downloaded in 0.00 s (35.48 MB/s)
86 09:57:59.762518 end: 1.3.1 http-download (duration 00:00:00) [common]
88 09:57:59.762715 end: 1.3 download-retry (duration 00:00:00) [common]
89 09:57:59.762789 start: 1.4 download-retry (timeout 00:09:59) [common]
90 09:57:59.762861 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 09:57:59.762962 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 09:57:59.763021 saving as /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/modules/modules.tar
93 09:57:59.763073 total size: 8619356 (8 MB)
94 09:57:59.763125 Using unxz to decompress xz
95 09:57:59.764706 progress 0 % (0 MB)
96 09:57:59.783652 progress 5 % (0 MB)
97 09:57:59.806932 progress 10 % (0 MB)
98 09:57:59.830977 progress 15 % (1 MB)
99 09:57:59.854585 progress 20 % (1 MB)
100 09:57:59.878363 progress 25 % (2 MB)
101 09:57:59.902106 progress 30 % (2 MB)
102 09:57:59.926777 progress 35 % (2 MB)
103 09:57:59.950251 progress 40 % (3 MB)
104 09:57:59.973723 progress 45 % (3 MB)
105 09:57:59.996479 progress 50 % (4 MB)
106 09:58:00.019950 progress 55 % (4 MB)
107 09:58:00.043986 progress 60 % (4 MB)
108 09:58:00.066901 progress 65 % (5 MB)
109 09:58:00.093085 progress 70 % (5 MB)
110 09:58:00.116539 progress 75 % (6 MB)
111 09:58:00.139608 progress 80 % (6 MB)
112 09:58:00.162056 progress 85 % (7 MB)
113 09:58:00.184936 progress 90 % (7 MB)
114 09:58:00.211179 progress 95 % (7 MB)
115 09:58:00.240723 progress 100 % (8 MB)
116 09:58:00.245166 8 MB downloaded in 0.48 s (17.05 MB/s)
117 09:58:00.245330 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:58:00.245590 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:58:00.245699 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 09:58:00.245790 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 09:58:00.245873 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 09:58:00.245959 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 09:58:00.246179 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e
125 09:58:00.246342 makedir: /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin
126 09:58:00.246443 makedir: /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/tests
127 09:58:00.246543 makedir: /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/results
128 09:58:00.246637 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-add-keys
129 09:58:00.246801 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-add-sources
130 09:58:00.246953 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-background-process-start
131 09:58:00.247104 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-background-process-stop
132 09:58:00.247240 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-common-functions
133 09:58:00.247369 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-echo-ipv4
134 09:58:00.247517 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-install-packages
135 09:58:00.247669 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-installed-packages
136 09:58:00.247816 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-os-build
137 09:58:00.247963 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-probe-channel
138 09:58:00.248111 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-probe-ip
139 09:58:00.248261 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-target-ip
140 09:58:00.248416 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-target-mac
141 09:58:00.248564 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-target-storage
142 09:58:00.248715 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-case
143 09:58:00.248863 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-event
144 09:58:00.249012 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-feedback
145 09:58:00.249160 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-raise
146 09:58:00.249303 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-reference
147 09:58:00.249427 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-runner
148 09:58:00.249550 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-set
149 09:58:00.249673 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-test-shell
150 09:58:00.249801 Updating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-install-packages (oe)
151 09:58:00.249978 Updating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/bin/lava-installed-packages (oe)
152 09:58:00.250129 Creating /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/environment
153 09:58:00.250253 LAVA metadata
154 09:58:00.250349 - LAVA_JOB_ID=14407631
155 09:58:00.250445 - LAVA_DISPATCHER_IP=192.168.201.1
156 09:58:00.250581 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 09:58:00.250668 skipped lava-vland-overlay
158 09:58:00.250774 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 09:58:00.250881 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 09:58:00.250963 skipped lava-multinode-overlay
161 09:58:00.251068 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 09:58:00.251173 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 09:58:00.251272 Loading test definitions
164 09:58:00.251385 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 09:58:00.251473 Using /lava-14407631 at stage 0
166 09:58:00.251875 uuid=14407631_1.5.2.3.1 testdef=None
167 09:58:00.251988 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 09:58:00.252098 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 09:58:00.252715 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 09:58:00.253046 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 09:58:00.253605 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 09:58:00.253938 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 09:58:00.254578 runner path: /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/0/tests/0_igt-gpu-panfrost test_uuid 14407631_1.5.2.3.1
176 09:58:00.254731 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 09:58:00.254939 Creating lava-test-runner.conf files
179 09:58:00.255013 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407631/lava-overlay-xsi3yy6e/lava-14407631/0 for stage 0
180 09:58:00.255114 - 0_igt-gpu-panfrost
181 09:58:00.255237 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 09:58:00.255324 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 09:58:00.261864 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 09:58:00.261966 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 09:58:00.262078 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 09:58:00.262191 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 09:58:00.262295 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 09:58:01.960842 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 09:58:01.960990 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 09:58:01.961067 extracting modules file /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407631/extract-overlay-ramdisk-zfwam3qa/ramdisk
191 09:58:02.180008 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 09:58:02.180148 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 09:58:02.180227 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407631/compress-overlay-t0gjas4u/overlay-1.5.2.4.tar.gz to ramdisk
194 09:58:02.180287 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407631/compress-overlay-t0gjas4u/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407631/extract-overlay-ramdisk-zfwam3qa/ramdisk
195 09:58:02.186346 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 09:58:02.186438 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 09:58:02.186519 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 09:58:02.186595 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 09:58:02.186660 Building ramdisk /var/lib/lava/dispatcher/tmp/14407631/extract-overlay-ramdisk-zfwam3qa/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407631/extract-overlay-ramdisk-zfwam3qa/ramdisk
200 09:58:03.314444 >> 466049 blocks
201 09:58:09.622498 rename /var/lib/lava/dispatcher/tmp/14407631/extract-overlay-ramdisk-zfwam3qa/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/ramdisk/ramdisk.cpio.gz
202 09:58:09.622683 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 09:58:09.622808 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
204 09:58:09.622922 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
205 09:58:09.623036 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/kernel/Image']
206 09:58:22.781161 Returned 0 in 13 seconds
207 09:58:22.882017 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/kernel/image.itb
208 09:58:23.904923 output: FIT description: Kernel Image image with one or more FDT blobs
209 09:58:23.905062 output: Created: Tue Jun 18 10:58:23 2024
210 09:58:23.905151 output: Image 0 (kernel-1)
211 09:58:23.905229 output: Description:
212 09:58:23.905304 output: Created: Tue Jun 18 10:58:23 2024
213 09:58:23.905379 output: Type: Kernel Image
214 09:58:23.905455 output: Compression: lzma compressed
215 09:58:23.905531 output: Data Size: 13126726 Bytes = 12819.07 KiB = 12.52 MiB
216 09:58:23.905625 output: Architecture: AArch64
217 09:58:23.905716 output: OS: Linux
218 09:58:23.905809 output: Load Address: 0x00000000
219 09:58:23.905900 output: Entry Point: 0x00000000
220 09:58:23.905989 output: Hash algo: crc32
221 09:58:23.906077 output: Hash value: 4137a6e7
222 09:58:23.906163 output: Image 1 (fdt-1)
223 09:58:23.906253 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 09:58:23.906339 output: Created: Tue Jun 18 10:58:23 2024
225 09:58:23.906421 output: Type: Flat Device Tree
226 09:58:23.906504 output: Compression: uncompressed
227 09:58:23.906587 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 09:58:23.906674 output: Architecture: AArch64
229 09:58:23.906756 output: Hash algo: crc32
230 09:58:23.906837 output: Hash value: a9713552
231 09:58:23.906918 output: Image 2 (ramdisk-1)
232 09:58:23.907000 output: Description: unavailable
233 09:58:23.907083 output: Created: Tue Jun 18 10:58:23 2024
234 09:58:23.907165 output: Type: RAMDisk Image
235 09:58:23.907246 output: Compression: uncompressed
236 09:58:23.907328 output: Data Size: 61006815 Bytes = 59576.97 KiB = 58.18 MiB
237 09:58:23.907410 output: Architecture: AArch64
238 09:58:23.907491 output: OS: Linux
239 09:58:23.907572 output: Load Address: unavailable
240 09:58:23.907653 output: Entry Point: unavailable
241 09:58:23.907734 output: Hash algo: crc32
242 09:58:23.907815 output: Hash value: 9dc59ce6
243 09:58:23.907896 output: Default Configuration: 'conf-1'
244 09:58:23.907977 output: Configuration 0 (conf-1)
245 09:58:23.908059 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 09:58:23.908141 output: Kernel: kernel-1
247 09:58:23.908222 output: Init Ramdisk: ramdisk-1
248 09:58:23.908303 output: FDT: fdt-1
249 09:58:23.908385 output: Loadables: kernel-1
250 09:58:23.908466 output:
251 09:58:23.908656 end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
252 09:58:23.908773 end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
253 09:58:23.908896 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
254 09:58:23.909012 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
255 09:58:23.909110 No LXC device requested
256 09:58:23.909201 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 09:58:23.909294 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
258 09:58:23.909375 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 09:58:23.909447 Checking files for TFTP limit of 4294967296 bytes.
260 09:58:23.910017 end: 1 tftp-deploy (duration 00:00:25) [common]
261 09:58:23.910145 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 09:58:23.910266 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 09:58:23.910408 substitutions:
264 09:58:23.910473 - {DTB}: 14407631/tftp-deploy-9mpqo1m0/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 09:58:23.910546 - {INITRD}: 14407631/tftp-deploy-9mpqo1m0/ramdisk/ramdisk.cpio.gz
266 09:58:23.910618 - {KERNEL}: 14407631/tftp-deploy-9mpqo1m0/kernel/Image
267 09:58:23.910719 - {LAVA_MAC}: None
268 09:58:23.910860 - {PRESEED_CONFIG}: None
269 09:58:23.910978 - {PRESEED_LOCAL}: None
270 09:58:23.911044 - {RAMDISK}: 14407631/tftp-deploy-9mpqo1m0/ramdisk/ramdisk.cpio.gz
271 09:58:23.911136 - {ROOT_PART}: None
272 09:58:23.911220 - {ROOT}: None
273 09:58:23.911303 - {SERVER_IP}: 192.168.201.1
274 09:58:23.911386 - {TEE}: None
275 09:58:23.911470 Parsed boot commands:
276 09:58:23.911551 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 09:58:23.911748 Parsed boot commands: tftpboot 192.168.201.1 14407631/tftp-deploy-9mpqo1m0/kernel/image.itb 14407631/tftp-deploy-9mpqo1m0/kernel/cmdline
278 09:58:23.911861 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 09:58:23.911971 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 09:58:23.912086 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 09:58:23.912195 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 09:58:23.912286 Not connected, no need to disconnect.
283 09:58:23.912390 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 09:58:23.912499 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 09:58:23.912587 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
286 09:58:23.916029 Setting prompt string to ['lava-test: # ']
287 09:58:23.916370 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 09:58:23.916493 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 09:58:23.916619 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 09:58:23.916734 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 09:58:23.917037 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
292 09:58:33.123543 >> Command sent successfully.
293 09:58:33.137800 Returned 0 in 9 seconds
294 09:58:33.239059 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 09:58:33.240712 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 09:58:33.241324 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 09:58:33.241860 Setting prompt string to 'Starting depthcharge on Juniper...'
299 09:58:33.242374 Changing prompt to 'Starting depthcharge on Juniper...'
300 09:58:33.242863 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 09:58:33.244774 [Enter `^Ec?' for help]
302 09:58:40.191946 [DL] 00000000 00000000 010701
303 09:58:40.196887
304 09:58:40.197441
305 09:58:40.197931 F0: 102B 0000
306 09:58:40.198481
307 09:58:40.198918 F3: 1006 0033 [0200]
308 09:58:40.200413
309 09:58:40.200876 F3: 4001 00E0 [0200]
310 09:58:40.201335
311 09:58:40.201748 F3: 0000 0000
312 09:58:40.203345
313 09:58:40.203904 V0: 0000 0000 [0001]
314 09:58:40.204331
315 09:58:40.204740 00: 1027 0002
316 09:58:40.205263
317 09:58:40.206699 01: 0000 0000
318 09:58:40.207144
319 09:58:40.207580 BP: 0C00 0251 [0000]
320 09:58:40.208105
321 09:58:40.210023 G0: 1182 0000
322 09:58:40.210496
323 09:58:40.210828 EC: 0004 0000 [0001]
324 09:58:40.211132
325 09:58:40.213460 S7: 0000 0000 [0000]
326 09:58:40.213893
327 09:58:40.214462 CC: 0000 0000 [0001]
328 09:58:40.216796
329 09:58:40.217266 T0: 0000 00DB [000F]
330 09:58:40.217711
331 09:58:40.218112 Jump to BL
332 09:58:40.218553
333 09:58:40.252815
334 09:58:40.253332
335 09:58:40.259784 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 09:58:40.262903 ARM64: Exception handlers installed.
337 09:58:40.266441 ARM64: Testing exception
338 09:58:40.269467 ARM64: Done test exception
339 09:58:40.272904 WDT: Last reset was cold boot
340 09:58:40.276732 SPI0(PAD0) initialized at 992727 Hz
341 09:58:40.279757 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 09:58:40.280196 Manufacturer: ef
343 09:58:40.286848 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 09:58:40.299698 Probing TPM: . done!
345 09:58:40.300217 TPM ready after 0 ms
346 09:58:40.306373 Connected to device vid:did:rid of 1ae0:0028:00
347 09:58:40.312761 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
348 09:58:40.347180 Initialized TPM device CR50 revision 0
349 09:58:40.358724 tlcl_send_startup: Startup return code is 0
350 09:58:40.359236 TPM: setup succeeded
351 09:58:40.367360 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 09:58:40.370731 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 09:58:40.374106 in-header: 03 19 00 00 08 00 00 00
354 09:58:40.377632 in-data: a2 e0 47 00 13 00 00 00
355 09:58:40.380996 Chrome EC: UHEPI supported
356 09:58:40.387245 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 09:58:40.390756 in-header: 03 a1 00 00 08 00 00 00
358 09:58:40.394296 in-data: 84 60 60 10 00 00 00 00
359 09:58:40.394842 Phase 1
360 09:58:40.397646 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 09:58:40.404453 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 09:58:40.407573 VB2:vb2_check_recovery() Recovery was requested manually
363 09:58:40.413966 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 09:58:40.419886 Recovery requested (1009000e)
365 09:58:40.428921 tlcl_extend: response is 0
366 09:58:40.434402 tlcl_extend: response is 0
367 09:58:40.458946
368 09:58:40.459440
369 09:58:40.466057 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 09:58:40.469148 ARM64: Exception handlers installed.
371 09:58:40.472445 ARM64: Testing exception
372 09:58:40.475961 ARM64: Done test exception
373 09:58:40.491702 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2030
374 09:58:40.498062 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 09:58:40.501354 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 09:58:40.509633 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
377 09:58:40.516738 [RTC]rtc_get_frequency_meter,134: input=0x17, output=958
378 09:58:40.523576 [RTC]rtc_get_frequency_meter,134: input=0x13, output=868
379 09:58:40.530712 [RTC]rtc_get_frequency_meter,134: input=0x11, output=822
380 09:58:40.537615 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
381 09:58:40.544662 [RTC]rtc_get_frequency_meter,134: input=0xf, output=777
382 09:58:40.551307 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
383 09:58:40.554655 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
384 09:58:40.561626 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 09:58:40.564939 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 09:58:40.568393 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 09:58:40.571835 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 09:58:40.574902 in-header: 03 19 00 00 08 00 00 00
389 09:58:40.578530 in-data: a2 e0 47 00 13 00 00 00
390 09:58:40.581698 Chrome EC: UHEPI supported
391 09:58:40.588637 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 09:58:40.591743 in-header: 03 a1 00 00 08 00 00 00
393 09:58:40.595253 in-data: 84 60 60 10 00 00 00 00
394 09:58:40.598821 Skip loading cached calibration data
395 09:58:40.605698 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 09:58:40.608778 in-header: 03 a1 00 00 08 00 00 00
397 09:58:40.612038 in-data: 84 60 60 10 00 00 00 00
398 09:58:40.618846 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 09:58:40.622637 in-header: 03 a1 00 00 08 00 00 00
400 09:58:40.625598 in-data: 84 60 60 10 00 00 00 00
401 09:58:40.626100 ADC[3]: Raw value=1043152 ID=8
402 09:58:40.629017 Manufacturer: ef
403 09:58:40.635670 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 09:58:40.638982 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 09:58:40.642096 CBFS @ 21000 size 3d4000
406 09:58:40.645487 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 09:58:40.652348 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
408 09:58:40.655551 CBFS: Found @ offset 3c880 size 4b
409 09:58:40.656057 DRAM-K: Full Calibration
410 09:58:40.662146 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 09:58:40.662770 CBFS @ 21000 size 3d4000
412 09:58:40.668572 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 09:58:40.672379 CBFS: Locating 'fallback/dram'
414 09:58:40.675334 CBFS: Found @ offset 24b00 size 12268
415 09:58:40.703111 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
416 09:58:40.706387 ddr_geometry: 1, config: 0x0
417 09:58:40.709349 header.status = 0x0
418 09:58:40.712871 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 09:58:40.716449 header.version = 0x5 (expected: 0x5)
420 09:58:40.719625 header.size = 0x8f0 (expected: 0x8f0)
421 09:58:40.720168 header.config = 0x0
422 09:58:40.723098 header.flags = 0x0
423 09:58:40.723688 header.checksum = 0x0
424 09:58:40.729777 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 09:58:40.736357 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 09:58:40.739700 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 09:58:40.742920 ddr_geometry:1
428 09:58:40.743347 [EMI] new MDL number = 1
429 09:58:40.746598 dram_cbt_mode_extern: 0
430 09:58:40.750016 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 09:58:40.756845 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 09:58:40.757357
433 09:58:40.757689
434 09:58:40.757997 [Bianco] ETT version 0.0.0.1
435 09:58:40.763314 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 09:58:40.763831
437 09:58:40.766474 vSetVcoreByFreq with vcore:762500, freq=1600
438 09:58:40.766983
439 09:58:40.767316 [DramcInit]
440 09:58:40.770106 AutoRefreshCKEOff AutoREF OFF
441 09:58:40.773576 DDRPhyPLLSetting-CKEOFF
442 09:58:40.776629 DDRPhyPLLSetting-CKEON
443 09:58:40.777145
444 09:58:40.777479 Enable WDQS
445 09:58:40.780447 [ModeRegInit_LP4] CH0 RK0
446 09:58:40.783359 Write Rank0 MR13 =0x18
447 09:58:40.783789 Write Rank0 MR12 =0x5d
448 09:58:40.786899 Write Rank0 MR1 =0x56
449 09:58:40.790340 Write Rank0 MR2 =0x1a
450 09:58:40.790770 Write Rank0 MR11 =0x0
451 09:58:40.793886 Write Rank0 MR22 =0x38
452 09:58:40.794459 Write Rank0 MR14 =0x5d
453 09:58:40.797066 Write Rank0 MR3 =0x30
454 09:58:40.800435 Write Rank0 MR13 =0x58
455 09:58:40.800867 Write Rank0 MR12 =0x5d
456 09:58:40.803632 Write Rank0 MR1 =0x56
457 09:58:40.804087 Write Rank0 MR2 =0x2d
458 09:58:40.806979 Write Rank0 MR11 =0x23
459 09:58:40.810173 Write Rank0 MR22 =0x34
460 09:58:40.810657 Write Rank0 MR14 =0x10
461 09:58:40.813618 Write Rank0 MR3 =0x30
462 09:58:40.814067 Write Rank0 MR13 =0xd8
463 09:58:40.817144 [ModeRegInit_LP4] CH0 RK1
464 09:58:40.820489 Write Rank1 MR13 =0x18
465 09:58:40.820923 Write Rank1 MR12 =0x5d
466 09:58:40.823843 Write Rank1 MR1 =0x56
467 09:58:40.827411 Write Rank1 MR2 =0x1a
468 09:58:40.827916 Write Rank1 MR11 =0x0
469 09:58:40.830750 Write Rank1 MR22 =0x38
470 09:58:40.831257 Write Rank1 MR14 =0x5d
471 09:58:40.833897 Write Rank1 MR3 =0x30
472 09:58:40.837370 Write Rank1 MR13 =0x58
473 09:58:40.837877 Write Rank1 MR12 =0x5d
474 09:58:40.840616 Write Rank1 MR1 =0x56
475 09:58:40.841045 Write Rank1 MR2 =0x2d
476 09:58:40.843848 Write Rank1 MR11 =0x23
477 09:58:40.847514 Write Rank1 MR22 =0x34
478 09:58:40.848021 Write Rank1 MR14 =0x10
479 09:58:40.850806 Write Rank1 MR3 =0x30
480 09:58:40.851233 Write Rank1 MR13 =0xd8
481 09:58:40.854023 [ModeRegInit_LP4] CH1 RK0
482 09:58:40.857508 Write Rank0 MR13 =0x18
483 09:58:40.858013 Write Rank0 MR12 =0x5d
484 09:58:40.860863 Write Rank0 MR1 =0x56
485 09:58:40.863851 Write Rank0 MR2 =0x1a
486 09:58:40.864281 Write Rank0 MR11 =0x0
487 09:58:40.867806 Write Rank0 MR22 =0x38
488 09:58:40.868313 Write Rank0 MR14 =0x5d
489 09:58:40.871006 Write Rank0 MR3 =0x30
490 09:58:40.874268 Write Rank0 MR13 =0x58
491 09:58:40.874784 Write Rank0 MR12 =0x5d
492 09:58:40.877587 Write Rank0 MR1 =0x56
493 09:58:40.878090 Write Rank0 MR2 =0x2d
494 09:58:40.880885 Write Rank0 MR11 =0x23
495 09:58:40.884015 Write Rank0 MR22 =0x34
496 09:58:40.884442 Write Rank0 MR14 =0x10
497 09:58:40.887358 Write Rank0 MR3 =0x30
498 09:58:40.887864 Write Rank0 MR13 =0xd8
499 09:58:40.890823 [ModeRegInit_LP4] CH1 RK1
500 09:58:40.894134 Write Rank1 MR13 =0x18
501 09:58:40.894668 Write Rank1 MR12 =0x5d
502 09:58:40.897609 Write Rank1 MR1 =0x56
503 09:58:40.900772 Write Rank1 MR2 =0x1a
504 09:58:40.901344 Write Rank1 MR11 =0x0
505 09:58:40.904267 Write Rank1 MR22 =0x38
506 09:58:40.904696 Write Rank1 MR14 =0x5d
507 09:58:40.907408 Write Rank1 MR3 =0x30
508 09:58:40.910831 Write Rank1 MR13 =0x58
509 09:58:40.911261 Write Rank1 MR12 =0x5d
510 09:58:40.913975 Write Rank1 MR1 =0x56
511 09:58:40.914451 Write Rank1 MR2 =0x2d
512 09:58:40.917605 Write Rank1 MR11 =0x23
513 09:58:40.920667 Write Rank1 MR22 =0x34
514 09:58:40.921098 Write Rank1 MR14 =0x10
515 09:58:40.924012 Write Rank1 MR3 =0x30
516 09:58:40.927744 Write Rank1 MR13 =0xd8
517 09:58:40.928250 match AC timing 3
518 09:58:40.937894 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 09:58:40.938462 [MiockJmeterHQA]
520 09:58:40.941032 vSetVcoreByFreq with vcore:762500, freq=1600
521 09:58:41.047100
522 09:58:41.047737 MIOCK jitter meter ch=0
523 09:58:41.048105
524 09:58:41.050658 1T = (101-18) = 83 dly cells
525 09:58:41.057209 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
526 09:58:41.060673 vSetVcoreByFreq with vcore:725000, freq=1200
527 09:58:41.158458
528 09:58:41.158976 MIOCK jitter meter ch=0
529 09:58:41.159311
530 09:58:41.161962 1T = (95-17) = 78 dly cells
531 09:58:41.168819 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
532 09:58:41.171962 vSetVcoreByFreq with vcore:725000, freq=800
533 09:58:41.270062
534 09:58:41.270669 MIOCK jitter meter ch=0
535 09:58:41.271183
536 09:58:41.273448 1T = (95-17) = 78 dly cells
537 09:58:41.280004 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
538 09:58:41.283454 vSetVcoreByFreq with vcore:762500, freq=1600
539 09:58:41.287114 vSetVcoreByFreq with vcore:762500, freq=1600
540 09:58:41.287621
541 09:58:41.287956 K DRVP
542 09:58:41.289994 1. OCD DRVP=0 CALOUT=0
543 09:58:41.293152 1. OCD DRVP=1 CALOUT=0
544 09:58:41.293586 1. OCD DRVP=2 CALOUT=0
545 09:58:41.296480 1. OCD DRVP=3 CALOUT=0
546 09:58:41.296963 1. OCD DRVP=4 CALOUT=0
547 09:58:41.300004 1. OCD DRVP=5 CALOUT=0
548 09:58:41.303500 1. OCD DRVP=6 CALOUT=0
549 09:58:41.303936 1. OCD DRVP=7 CALOUT=0
550 09:58:41.306814 1. OCD DRVP=8 CALOUT=1
551 09:58:41.307255
552 09:58:41.310171 1. OCD DRVP calibration OK! DRVP=8
553 09:58:41.310656
554 09:58:41.310987
555 09:58:41.311290
556 09:58:41.311576 K ODTN
557 09:58:41.313493 3. OCD ODTN=0 ,CALOUT=1
558 09:58:41.313943 3. OCD ODTN=1 ,CALOUT=1
559 09:58:41.317119 3. OCD ODTN=2 ,CALOUT=1
560 09:58:41.320274 3. OCD ODTN=3 ,CALOUT=1
561 09:58:41.320782 3. OCD ODTN=4 ,CALOUT=1
562 09:58:41.323739 3. OCD ODTN=5 ,CALOUT=1
563 09:58:41.327436 3. OCD ODTN=6 ,CALOUT=1
564 09:58:41.327904 3. OCD ODTN=7 ,CALOUT=0
565 09:58:41.328243
566 09:58:41.330603 3. OCD ODTN calibration OK! ODTN=7
567 09:58:41.331040
568 09:58:41.333740 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
569 09:58:41.340602 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
570 09:58:41.343895 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
571 09:58:41.344330
572 09:58:41.344660 K DRVP
573 09:58:41.347221 1. OCD DRVP=0 CALOUT=0
574 09:58:41.350656 1. OCD DRVP=1 CALOUT=0
575 09:58:41.351097 1. OCD DRVP=2 CALOUT=0
576 09:58:41.353904 1. OCD DRVP=3 CALOUT=0
577 09:58:41.354369 1. OCD DRVP=4 CALOUT=0
578 09:58:41.357264 1. OCD DRVP=5 CALOUT=0
579 09:58:41.361092 1. OCD DRVP=6 CALOUT=0
580 09:58:41.361607 1. OCD DRVP=7 CALOUT=0
581 09:58:41.364128 1. OCD DRVP=8 CALOUT=0
582 09:58:41.364566 1. OCD DRVP=9 CALOUT=1
583 09:58:41.367910
584 09:58:41.368410 1. OCD DRVP calibration OK! DRVP=9
585 09:58:41.370973
586 09:58:41.371516
587 09:58:41.372051
588 09:58:41.372526 K ODTN
589 09:58:41.372988 3. OCD ODTN=0 ,CALOUT=1
590 09:58:41.374049 3. OCD ODTN=1 ,CALOUT=1
591 09:58:41.377740 3. OCD ODTN=2 ,CALOUT=1
592 09:58:41.378179 3. OCD ODTN=3 ,CALOUT=1
593 09:58:41.381143 3. OCD ODTN=4 ,CALOUT=1
594 09:58:41.384384 3. OCD ODTN=5 ,CALOUT=1
595 09:58:41.384826 3. OCD ODTN=6 ,CALOUT=1
596 09:58:41.387620 3. OCD ODTN=7 ,CALOUT=1
597 09:58:41.390890 3. OCD ODTN=8 ,CALOUT=1
598 09:58:41.391380 3. OCD ODTN=9 ,CALOUT=1
599 09:58:41.394277 3. OCD ODTN=10 ,CALOUT=1
600 09:58:41.397557 3. OCD ODTN=11 ,CALOUT=1
601 09:58:41.397999 3. OCD ODTN=12 ,CALOUT=1
602 09:58:41.400912 3. OCD ODTN=13 ,CALOUT=0
603 09:58:41.401354
604 09:58:41.404347 3. OCD ODTN calibration OK! ODTN=13
605 09:58:41.404786
606 09:58:41.407995 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=13
607 09:58:41.411053 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13
608 09:58:41.417945 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13 (After Adjust)
609 09:58:41.418507
610 09:58:41.418848 [DramcInit]
611 09:58:41.421126 AutoRefreshCKEOff AutoREF OFF
612 09:58:41.424636 DDRPhyPLLSetting-CKEOFF
613 09:58:41.425141 DDRPhyPLLSetting-CKEON
614 09:58:41.425474
615 09:58:41.427728 Enable WDQS
616 09:58:41.428155 ==
617 09:58:41.431003 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
618 09:58:41.434899 fsp= 1, odt_onoff= 1, Byte mode= 0
619 09:58:41.435408 ==
620 09:58:41.437998 [Duty_Offset_Calibration]
621 09:58:41.438559
622 09:58:41.441183 ===========================
623 09:58:41.441759 B0:1 B1:0 CA:0
624 09:58:41.462726 ==
625 09:58:41.465812 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
626 09:58:41.469360 fsp= 1, odt_onoff= 1, Byte mode= 0
627 09:58:41.469874 ==
628 09:58:41.472692 [Duty_Offset_Calibration]
629 09:58:41.473195
630 09:58:41.475919 ===========================
631 09:58:41.476353 B0:1 B1:0 CA:-1
632 09:58:41.509924 [ModeRegInit_LP4] CH0 RK0
633 09:58:41.513459 Write Rank0 MR13 =0x18
634 09:58:41.513965 Write Rank0 MR12 =0x5d
635 09:58:41.516865 Write Rank0 MR1 =0x56
636 09:58:41.520169 Write Rank0 MR2 =0x1a
637 09:58:41.520680 Write Rank0 MR11 =0x0
638 09:58:41.523492 Write Rank0 MR22 =0x38
639 09:58:41.523915 Write Rank0 MR14 =0x5d
640 09:58:41.526761 Write Rank0 MR3 =0x30
641 09:58:41.530053 Write Rank0 MR13 =0x58
642 09:58:41.530507 Write Rank0 MR12 =0x5d
643 09:58:41.533619 Write Rank0 MR1 =0x56
644 09:58:41.534124 Write Rank0 MR2 =0x2d
645 09:58:41.536947 Write Rank0 MR11 =0x23
646 09:58:41.540376 Write Rank0 MR22 =0x34
647 09:58:41.540876 Write Rank0 MR14 =0x10
648 09:58:41.543492 Write Rank0 MR3 =0x30
649 09:58:41.546719 Write Rank0 MR13 =0xd8
650 09:58:41.547158 [ModeRegInit_LP4] CH0 RK1
651 09:58:41.550412 Write Rank1 MR13 =0x18
652 09:58:41.550841 Write Rank1 MR12 =0x5d
653 09:58:41.553425 Write Rank1 MR1 =0x56
654 09:58:41.557197 Write Rank1 MR2 =0x1a
655 09:58:41.557706 Write Rank1 MR11 =0x0
656 09:58:41.560569 Write Rank1 MR22 =0x38
657 09:58:41.561075 Write Rank1 MR14 =0x5d
658 09:58:41.564032 Write Rank1 MR3 =0x30
659 09:58:41.566913 Write Rank1 MR13 =0x58
660 09:58:41.567339 Write Rank1 MR12 =0x5d
661 09:58:41.570490 Write Rank1 MR1 =0x56
662 09:58:41.570995 Write Rank1 MR2 =0x2d
663 09:58:41.573773 Write Rank1 MR11 =0x23
664 09:58:41.577252 Write Rank1 MR22 =0x34
665 09:58:41.577759 Write Rank1 MR14 =0x10
666 09:58:41.580486 Write Rank1 MR3 =0x30
667 09:58:41.583859 Write Rank1 MR13 =0xd8
668 09:58:41.584380 [ModeRegInit_LP4] CH1 RK0
669 09:58:41.586898 Write Rank0 MR13 =0x18
670 09:58:41.587322 Write Rank0 MR12 =0x5d
671 09:58:41.590958 Write Rank0 MR1 =0x56
672 09:58:41.593890 Write Rank0 MR2 =0x1a
673 09:58:41.594443 Write Rank0 MR11 =0x0
674 09:58:41.596906 Write Rank0 MR22 =0x38
675 09:58:41.597374 Write Rank0 MR14 =0x5d
676 09:58:41.600714 Write Rank0 MR3 =0x30
677 09:58:41.604000 Write Rank0 MR13 =0x58
678 09:58:41.604503 Write Rank0 MR12 =0x5d
679 09:58:41.607177 Write Rank0 MR1 =0x56
680 09:58:41.607597 Write Rank0 MR2 =0x2d
681 09:58:41.610951 Write Rank0 MR11 =0x23
682 09:58:41.614121 Write Rank0 MR22 =0x34
683 09:58:41.614679 Write Rank0 MR14 =0x10
684 09:58:41.617139 Write Rank0 MR3 =0x30
685 09:58:41.620415 Write Rank0 MR13 =0xd8
686 09:58:41.620836 [ModeRegInit_LP4] CH1 RK1
687 09:58:41.623895 Write Rank1 MR13 =0x18
688 09:58:41.624420 Write Rank1 MR12 =0x5d
689 09:58:41.627368 Write Rank1 MR1 =0x56
690 09:58:41.630437 Write Rank1 MR2 =0x1a
691 09:58:41.630865 Write Rank1 MR11 =0x0
692 09:58:41.634256 Write Rank1 MR22 =0x38
693 09:58:41.634771 Write Rank1 MR14 =0x5d
694 09:58:41.637323 Write Rank1 MR3 =0x30
695 09:58:41.641026 Write Rank1 MR13 =0x58
696 09:58:41.641536 Write Rank1 MR12 =0x5d
697 09:58:41.644156 Write Rank1 MR1 =0x56
698 09:58:41.644592 Write Rank1 MR2 =0x2d
699 09:58:41.647408 Write Rank1 MR11 =0x23
700 09:58:41.651152 Write Rank1 MR22 =0x34
701 09:58:41.651663 Write Rank1 MR14 =0x10
702 09:58:41.654051 Write Rank1 MR3 =0x30
703 09:58:41.657835 Write Rank1 MR13 =0xd8
704 09:58:41.658407 match AC timing 3
705 09:58:41.667731 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
706 09:58:41.668235 DramC Write-DBI off
707 09:58:41.670978 DramC Read-DBI off
708 09:58:41.674740 Write Rank0 MR13 =0x59
709 09:58:41.675247 ==
710 09:58:41.677893 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
711 09:58:41.681244 fsp= 1, odt_onoff= 1, Byte mode= 0
712 09:58:41.681750 ==
713 09:58:41.684769 === u2Vref_new: 0x56 --> 0x2d
714 09:58:41.688060 === u2Vref_new: 0x58 --> 0x38
715 09:58:41.690922 === u2Vref_new: 0x5a --> 0x39
716 09:58:41.694884 === u2Vref_new: 0x5c --> 0x3c
717 09:58:41.697788 === u2Vref_new: 0x5e --> 0x3d
718 09:58:41.701387 === u2Vref_new: 0x60 --> 0xa0
719 09:58:41.704458 [CA 0] Center 33 (4~63) winsize 60
720 09:58:41.704969 [CA 1] Center 34 (6~63) winsize 58
721 09:58:41.707677 [CA 2] Center 27 (-1~56) winsize 58
722 09:58:41.711311 [CA 3] Center 23 (-4~51) winsize 56
723 09:58:41.714851 [CA 4] Center 24 (-3~51) winsize 55
724 09:58:41.717977 [CA 5] Center 28 (-1~57) winsize 59
725 09:58:41.718555
726 09:58:41.721575 [CATrainingPosCal] consider 1 rank data
727 09:58:41.725140 u2DelayCellTimex100 = 753/100 ps
728 09:58:41.728239 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
729 09:58:41.731505 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
730 09:58:41.738011 CA2 delay=27 (-1~56),Diff = 4 PI (5 cell)
731 09:58:41.741629 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
732 09:58:41.744792 CA4 delay=24 (-3~51),Diff = 1 PI (1 cell)
733 09:58:41.747935 CA5 delay=28 (-1~57),Diff = 5 PI (6 cell)
734 09:58:41.748544
735 09:58:41.751781 CA PerBit enable=1, Macro0, CA PI delay=23
736 09:58:41.754916 === u2Vref_new: 0x56 --> 0x2d
737 09:58:41.755346
738 09:58:41.758582 Vref(ca) range 1: 22
739 09:58:41.759086
740 09:58:41.759421 CS Dly= 10 (41-0-32)
741 09:58:41.761372 Write Rank0 MR13 =0xd8
742 09:58:41.761797 Write Rank0 MR13 =0xd8
743 09:58:41.765150 Write Rank0 MR12 =0x56
744 09:58:41.768365 Write Rank1 MR13 =0x59
745 09:58:41.768873 ==
746 09:58:41.771452 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
747 09:58:41.774910 fsp= 1, odt_onoff= 1, Byte mode= 0
748 09:58:41.775339 ==
749 09:58:41.778274 === u2Vref_new: 0x56 --> 0x2d
750 09:58:41.781896 === u2Vref_new: 0x58 --> 0x38
751 09:58:41.785247 === u2Vref_new: 0x5a --> 0x39
752 09:58:41.788557 === u2Vref_new: 0x5c --> 0x3c
753 09:58:41.791720 === u2Vref_new: 0x5e --> 0x3d
754 09:58:41.795147 === u2Vref_new: 0x60 --> 0xa0
755 09:58:41.798704 [CA 0] Center 33 (4~63) winsize 60
756 09:58:41.801806 [CA 1] Center 34 (5~63) winsize 59
757 09:58:41.805326 [CA 2] Center 28 (0~56) winsize 57
758 09:58:41.805832 [CA 3] Center 24 (-3~52) winsize 56
759 09:58:41.808655 [CA 4] Center 24 (-3~52) winsize 56
760 09:58:41.811748 [CA 5] Center 29 (0~58) winsize 59
761 09:58:41.812179
762 09:58:41.815430 [CATrainingPosCal] consider 2 rank data
763 09:58:41.818525 u2DelayCellTimex100 = 753/100 ps
764 09:58:41.822070 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
765 09:58:41.829011 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
766 09:58:41.831927 CA2 delay=28 (0~56),Diff = 4 PI (5 cell)
767 09:58:41.835879 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
768 09:58:41.838857 CA4 delay=24 (-3~51),Diff = 0 PI (0 cell)
769 09:58:41.842013 CA5 delay=28 (0~57),Diff = 4 PI (5 cell)
770 09:58:41.842554
771 09:58:41.845289 CA PerBit enable=1, Macro0, CA PI delay=24
772 09:58:41.848652 === u2Vref_new: 0x56 --> 0x2d
773 09:58:41.849086
774 09:58:41.852419 Vref(ca) range 1: 22
775 09:58:41.852921
776 09:58:41.853252 CS Dly= 7 (38-0-32)
777 09:58:41.855722 Write Rank1 MR13 =0xd8
778 09:58:41.856239 Write Rank1 MR13 =0xd8
779 09:58:41.859081 Write Rank1 MR12 =0x56
780 09:58:41.862594 [RankSwap] Rank num 2, (Multi 1), Rank 0
781 09:58:41.865834 Write Rank0 MR2 =0xad
782 09:58:41.866396 [Write Leveling]
783 09:58:41.869215 delay byte0 byte1 byte2 byte3
784 09:58:41.869717
785 09:58:41.870050 10 0 0
786 09:58:41.872519 11 0 0
787 09:58:41.873029 12 0 0
788 09:58:41.876134 13 0 0
789 09:58:41.876645 14 0 0
790 09:58:41.876985 15 0 0
791 09:58:41.878999 16 0 0
792 09:58:41.879435 17 0 0
793 09:58:41.882590 18 0 0
794 09:58:41.883104 19 0 0
795 09:58:41.885789 20 0 0
796 09:58:41.886337 21 0 0
797 09:58:41.886683 22 0 0
798 09:58:41.889226 23 0 0
799 09:58:41.889738 24 0 0
800 09:58:41.892338 25 0 0
801 09:58:41.892773 26 0 0
802 09:58:41.893110 27 0 0
803 09:58:41.895938 28 0 ff
804 09:58:41.896382 29 0 ff
805 09:58:41.899142 30 0 ff
806 09:58:41.899580 31 0 ff
807 09:58:41.902672 32 0 ff
808 09:58:41.903186 33 0 ff
809 09:58:41.903526 34 ff ff
810 09:58:41.906196 35 ff ff
811 09:58:41.906755 36 ff ff
812 09:58:41.909237 37 ff ff
813 09:58:41.909672 38 ff ff
814 09:58:41.913056 39 ff ff
815 09:58:41.913567 40 ff ff
816 09:58:41.916054 pass bytecount = 0xff (0xff: all bytes pass)
817 09:58:41.919295
818 09:58:41.919719 DQS0 dly: 34
819 09:58:41.920047 DQS1 dly: 28
820 09:58:41.922918 Write Rank0 MR2 =0x2d
821 09:58:41.926747 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 09:58:41.927256 Write Rank0 MR1 =0xd6
823 09:58:41.929719 [Gating]
824 09:58:41.930255 ==
825 09:58:41.932839 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
826 09:58:41.936466 fsp= 1, odt_onoff= 1, Byte mode= 0
827 09:58:41.936978 ==
828 09:58:41.943143 3 1 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
829 09:58:41.946252 3 1 4 |3534 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
830 09:58:41.949526 3 1 8 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
831 09:58:41.956590 3 1 12 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
832 09:58:41.959775 3 1 16 |3534 807 |(11 11)(11 11) |(0 0)(0 1)| 0
833 09:58:41.963124 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
834 09:58:41.966674 3 1 24 |3534 b0a |(11 11)(11 11) |(0 1)(0 1)| 0
835 09:58:41.973322 3 1 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
836 09:58:41.976934 3 2 0 |3c3b 201 |(11 11)(11 11) |(1 1)(1 1)| 0
837 09:58:41.980956 3 2 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
838 09:58:41.983083 [Byte 1] Lead/lag Transition tap number (1)
839 09:58:41.990188 3 2 8 |3d3d 3b3b |(11 11)(11 11) |(1 1)(0 0)| 0
840 09:58:41.993229 3 2 12 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
841 09:58:41.996466 3 2 16 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
842 09:58:42.003079 3 2 20 |3d3d 1413 |(11 11)(11 11) |(1 1)(0 0)| 0
843 09:58:42.006574 3 2 24 |3d3d 3a3a |(11 11)(0 0) |(1 1)(1 1)| 0
844 09:58:42.010069 3 2 28 |3d3d 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
845 09:58:42.013293 3 3 0 |3d3d 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
846 09:58:42.020229 3 3 4 |3d3d 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
847 09:58:42.023669 3 3 8 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 09:58:42.027117 [Byte 1] Lead/lag falling Transition (3, 3, 8)
849 09:58:42.033608 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
850 09:58:42.037007 [Byte 0] Lead/lag Transition tap number (1)
851 09:58:42.040570 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 09:58:42.043417 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 09:58:42.050064 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 09:58:42.053572 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 09:58:42.057068 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
856 09:58:42.060660 3 4 4 |3d3d 908 |(11 11)(11 11) |(1 1)(1 1)| 0
857 09:58:42.067447 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 09:58:42.070713 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 09:58:42.074201 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 09:58:42.080849 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 09:58:42.083898 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 09:58:42.087502 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 09:58:42.090765 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 09:58:42.097311 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 09:58:42.100684 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 09:58:42.104037 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 09:58:42.110825 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 09:58:42.114003 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 09:58:42.117599 [Byte 0] Lead/lag falling Transition (3, 5, 20)
870 09:58:42.124411 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
871 09:58:42.127751 [Byte 1] Lead/lag falling Transition (3, 5, 24)
872 09:58:42.131124 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
873 09:58:42.134409 [Byte 0] Lead/lag Transition tap number (3)
874 09:58:42.138121 [Byte 1] Lead/lag Transition tap number (2)
875 09:58:42.144441 3 6 0 |4646 202 |(10 10)(11 11) |(0 0)(0 0)| 0
876 09:58:42.147997 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
877 09:58:42.151122 [Byte 0]First pass (3, 6, 4)
878 09:58:42.154498 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 09:58:42.157997 [Byte 1]First pass (3, 6, 8)
880 09:58:42.161457 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 09:58:42.164820 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 09:58:42.168194 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 09:58:42.171542 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 09:58:42.178258 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 09:58:42.181673 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 09:58:42.185314 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 09:58:42.188374 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 09:58:42.191437 All bytes gating window > 1UI, Early break!
889 09:58:42.191915
890 09:58:42.194866 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
891 09:58:42.195291
892 09:58:42.201929 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
893 09:58:42.202485
894 09:58:42.202826
895 09:58:42.203141
896 09:58:42.205134 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
897 09:58:42.205634
898 09:58:42.208651 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
899 09:58:42.209153
900 09:58:42.209479
901 09:58:42.212152 Write Rank0 MR1 =0x56
902 09:58:42.212652
903 09:58:42.215155 best RODT dly(2T, 0.5T) = (2, 2)
904 09:58:42.215579
905 09:58:42.218663 best RODT dly(2T, 0.5T) = (2, 2)
906 09:58:42.219167 ==
907 09:58:42.221998 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
908 09:58:42.225497 fsp= 1, odt_onoff= 1, Byte mode= 0
909 09:58:42.226003 ==
910 09:58:42.228681 Start DQ dly to find pass range UseTestEngine =0
911 09:58:42.231927 x-axis: bit #, y-axis: DQ dly (-127~63)
912 09:58:42.235413 RX Vref Scan = 0
913 09:58:42.238872 -26, [0] xxxxxxxx xxxxxxxx [MSB]
914 09:58:42.242175 -25, [0] xxxxxxxx xxxxxxxx [MSB]
915 09:58:42.245516 -24, [0] xxxxxxxx xxxxxxxx [MSB]
916 09:58:42.246035 -23, [0] xxxxxxxx xxxxxxxx [MSB]
917 09:58:42.248685 -22, [0] xxxxxxxx xxxxxxxx [MSB]
918 09:58:42.252096 -21, [0] xxxxxxxx xxxxxxxx [MSB]
919 09:58:42.255368 -20, [0] xxxxxxxx xxxxxxxx [MSB]
920 09:58:42.258776 -19, [0] xxxxxxxx xxxxxxxx [MSB]
921 09:58:42.262421 -18, [0] xxxxxxxx xxxxxxxx [MSB]
922 09:58:42.265631 -17, [0] xxxxxxxx xxxxxxxx [MSB]
923 09:58:42.268883 -16, [0] xxxxxxxx xxxxxxxx [MSB]
924 09:58:42.269313 -15, [0] xxxxxxxx xxxxxxxx [MSB]
925 09:58:42.272468 -14, [0] xxxxxxxx xxxxxxxx [MSB]
926 09:58:42.275715 -13, [0] xxxxxxxx xxxxxxxx [MSB]
927 09:58:42.278915 -12, [0] xxxxxxxx xxxxxxxx [MSB]
928 09:58:42.282601 -11, [0] xxxxxxxx xxxxxxxx [MSB]
929 09:58:42.285845 -10, [0] xxxxxxxx xxxxxxxx [MSB]
930 09:58:42.289177 -9, [0] xxxxxxxx xxxxxxxx [MSB]
931 09:58:42.289681 -8, [0] xxxxxxxx xxxxxxxx [MSB]
932 09:58:42.292266 -7, [0] xxxxxxxx xxxxxxxx [MSB]
933 09:58:42.295907 -6, [0] xxxxxxxx xxxxxxxx [MSB]
934 09:58:42.299018 -5, [0] xxxxxxxx xxxxxxxx [MSB]
935 09:58:42.302836 -4, [0] xxxxxxxx xxxxxxxx [MSB]
936 09:58:42.306261 -3, [0] xxxxxxxx xxxxxxxx [MSB]
937 09:58:42.309439 -2, [0] xxxoxxxx xxxxxxxx [MSB]
938 09:58:42.309949 -1, [0] xxxoxoxx xxxxxxxx [MSB]
939 09:58:42.312766 0, [0] xxxoxoxx xxxxxoxx [MSB]
940 09:58:42.315967 1, [0] xxxoxooo xxxxxoxx [MSB]
941 09:58:42.319387 2, [0] xxxoxooo ooxxxoxx [MSB]
942 09:58:42.323029 3, [0] xxxoxooo ooxoooxx [MSB]
943 09:58:42.323544 4, [0] xxxoxooo ooxooooo [MSB]
944 09:58:42.326358 5, [0] xxxoxooo ooxooooo [MSB]
945 09:58:42.330451 6, [0] xxxooooo oooooooo [MSB]
946 09:58:42.333524 7, [0] xooooooo oooooooo [MSB]
947 09:58:42.336382 8, [0] xooooooo oooooooo [MSB]
948 09:58:42.339691 30, [0] oooxoooo oooooooo [MSB]
949 09:58:42.340206 31, [0] oooxoooo oooooooo [MSB]
950 09:58:42.343011 32, [0] oooxoxxo oooooooo [MSB]
951 09:58:42.346590 33, [0] oooxoxxo ooooooxo [MSB]
952 09:58:42.349610 34, [0] oooxoxxo ooooooxo [MSB]
953 09:58:42.353347 35, [0] oooxoxxx xooxooxo [MSB]
954 09:58:42.356639 36, [0] oooxoxxx xooxooxo [MSB]
955 09:58:42.359464 37, [0] oooxoxxx xooxxxxo [MSB]
956 09:58:42.359904 38, [0] oooxxxxx xxoxxxxx [MSB]
957 09:58:42.363143 39, [0] oxoxxxxx xxoxxxxx [MSB]
958 09:58:42.366441 40, [0] oxxxxxxx xxoxxxxx [MSB]
959 09:58:42.369914 41, [0] xxxxxxxx xxxxxxxx [MSB]
960 09:58:42.373261 iDelay=41, Bit 0, Center 24 (9 ~ 40) 32
961 09:58:42.376373 iDelay=41, Bit 1, Center 22 (7 ~ 38) 32
962 09:58:42.379901 iDelay=41, Bit 2, Center 23 (7 ~ 39) 33
963 09:58:42.383089 iDelay=41, Bit 3, Center 13 (-2 ~ 29) 32
964 09:58:42.387052 iDelay=41, Bit 4, Center 21 (6 ~ 37) 32
965 09:58:42.390095 iDelay=41, Bit 5, Center 15 (-1 ~ 31) 33
966 09:58:42.393469 iDelay=41, Bit 6, Center 16 (1 ~ 31) 31
967 09:58:42.397202 iDelay=41, Bit 7, Center 17 (1 ~ 34) 34
968 09:58:42.400120 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
969 09:58:42.403585 iDelay=41, Bit 9, Center 19 (2 ~ 37) 36
970 09:58:42.410165 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
971 09:58:42.413482 iDelay=41, Bit 11, Center 18 (3 ~ 34) 32
972 09:58:42.416862 iDelay=41, Bit 12, Center 19 (3 ~ 36) 34
973 09:58:42.420499 iDelay=41, Bit 13, Center 18 (0 ~ 36) 37
974 09:58:42.423494 iDelay=41, Bit 14, Center 18 (4 ~ 32) 29
975 09:58:42.426881 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
976 09:58:42.427325 ==
977 09:58:42.434137 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 09:58:42.434696 fsp= 1, odt_onoff= 1, Byte mode= 0
979 09:58:42.435028 ==
980 09:58:42.437148 DQS Delay:
981 09:58:42.437589 DQS0 = 0, DQS1 = 0
982 09:58:42.440820 DQM Delay:
983 09:58:42.441433 DQM0 = 18, DQM1 = 19
984 09:58:42.441786 DQ Delay:
985 09:58:42.443884 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13
986 09:58:42.447534 DQ4 =21, DQ5 =15, DQ6 =16, DQ7 =17
987 09:58:42.450655 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =18
988 09:58:42.454057 DQ12 =19, DQ13 =18, DQ14 =18, DQ15 =20
989 09:58:42.454527
990 09:58:42.454861
991 09:58:42.457373 DramC Write-DBI off
992 09:58:42.457801 ==
993 09:58:42.460655 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
994 09:58:42.464116 fsp= 1, odt_onoff= 1, Byte mode= 0
995 09:58:42.467825 ==
996 09:58:42.470938 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
997 09:58:42.471327
998 09:58:42.474241 Begin, DQ Scan Range 924~1180
999 09:58:42.474699
1000 09:58:42.474997
1001 09:58:42.475276 TX Vref Scan disable
1002 09:58:42.478023 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1003 09:58:42.481017 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1004 09:58:42.484270 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1005 09:58:42.491098 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1006 09:58:42.494155 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1007 09:58:42.497800 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1008 09:58:42.500880 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1009 09:58:42.504532 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1010 09:58:42.507559 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1011 09:58:42.511412 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1012 09:58:42.514466 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1013 09:58:42.517913 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1014 09:58:42.521442 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1015 09:58:42.524413 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1016 09:58:42.527702 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1017 09:58:42.531028 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1018 09:58:42.534504 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1019 09:58:42.538064 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1020 09:58:42.541516 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1021 09:58:42.544645 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1022 09:58:42.548123 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1023 09:58:42.551538 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1024 09:58:42.554816 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1025 09:58:42.561618 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1026 09:58:42.565080 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1027 09:58:42.568172 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1028 09:58:42.571632 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1029 09:58:42.574922 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1030 09:58:42.577996 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1031 09:58:42.581623 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1032 09:58:42.585111 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1033 09:58:42.588438 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1034 09:58:42.591600 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1035 09:58:42.595032 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1036 09:58:42.598498 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1037 09:58:42.601916 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1038 09:58:42.605189 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1039 09:58:42.608589 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1040 09:58:42.611865 962 |3 6 2|[0] xxxxxxxx oxxoxxxx [MSB]
1041 09:58:42.615143 963 |3 6 3|[0] xxxxxxxx ooxooxox [MSB]
1042 09:58:42.618520 964 |3 6 4|[0] xxxxxxxx ooxoooox [MSB]
1043 09:58:42.622273 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1044 09:58:42.625432 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1045 09:58:42.628614 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1046 09:58:42.632504 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1047 09:58:42.636014 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1048 09:58:42.639049 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1049 09:58:42.642573 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1050 09:58:42.649220 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1051 09:58:42.652398 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1052 09:58:42.656080 974 |3 6 14|[0] xxxoxooo oooooooo [MSB]
1053 09:58:42.658985 975 |3 6 15|[0] xxxooooo oooooooo [MSB]
1054 09:58:42.662861 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1055 09:58:42.665928 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1056 09:58:42.669482 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1057 09:58:42.673122 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1058 09:58:42.679593 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1059 09:58:42.682956 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1060 09:58:42.686115 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1061 09:58:42.689571 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1062 09:58:42.692932 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1063 09:58:42.696175 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1064 09:58:42.699602 Byte0, DQ PI dly=984, DQM PI dly= 984
1065 09:58:42.702861 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1066 09:58:42.703366
1067 09:58:42.706033 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1068 09:58:42.706493
1069 09:58:42.709611 Byte1, DQ PI dly=976, DQM PI dly= 976
1070 09:58:42.716131 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1071 09:58:42.716563
1072 09:58:42.719673 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1073 09:58:42.720187
1074 09:58:42.720513 ==
1075 09:58:42.726420 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1076 09:58:42.730061 fsp= 1, odt_onoff= 1, Byte mode= 0
1077 09:58:42.730608 ==
1078 09:58:42.733150 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1079 09:58:42.733658
1080 09:58:42.736417 Begin, DQ Scan Range 952~1016
1081 09:58:42.736920 Write Rank0 MR14 =0x0
1082 09:58:42.746730
1083 09:58:42.747236 CH=0, VrefRange= 0, VrefLevel = 0
1084 09:58:42.753511 TX Bit0 (978~996) 19 987, Bit8 (965~983) 19 974,
1085 09:58:42.756835 TX Bit1 (977~994) 18 985, Bit9 (966~984) 19 975,
1086 09:58:42.763482 TX Bit2 (977~995) 19 986, Bit10 (969~989) 21 979,
1087 09:58:42.766845 TX Bit3 (971~989) 19 980, Bit11 (965~983) 19 974,
1088 09:58:42.770138 TX Bit4 (977~995) 19 986, Bit12 (966~986) 21 976,
1089 09:58:42.777060 TX Bit5 (975~990) 16 982, Bit13 (967~983) 17 975,
1090 09:58:42.780520 TX Bit6 (976~991) 16 983, Bit14 (967~983) 17 975,
1091 09:58:42.783873 TX Bit7 (976~992) 17 984, Bit15 (969~987) 19 978,
1092 09:58:42.784385
1093 09:58:42.786793 wait MRW command Rank0 MR14 =0x2 fired (1)
1094 09:58:42.790346 Write Rank0 MR14 =0x2
1095 09:58:42.799510
1096 09:58:42.800051 CH=0, VrefRange= 0, VrefLevel = 2
1097 09:58:42.806031 TX Bit0 (977~997) 21 987, Bit8 (964~983) 20 973,
1098 09:58:42.809606 TX Bit1 (977~995) 19 986, Bit9 (965~984) 20 974,
1099 09:58:42.816153 TX Bit2 (977~996) 20 986, Bit10 (969~989) 21 979,
1100 09:58:42.819510 TX Bit3 (971~990) 20 980, Bit11 (965~985) 21 975,
1101 09:58:42.822796 TX Bit4 (977~997) 21 987, Bit12 (966~986) 21 976,
1102 09:58:42.829414 TX Bit5 (975~990) 16 982, Bit13 (966~983) 18 974,
1103 09:58:42.832992 TX Bit6 (975~991) 17 983, Bit14 (966~984) 19 975,
1104 09:58:42.836074 TX Bit7 (976~993) 18 984, Bit15 (968~988) 21 978,
1105 09:58:42.836506
1106 09:58:42.839381 Write Rank0 MR14 =0x4
1107 09:58:42.848721
1108 09:58:42.849227 CH=0, VrefRange= 0, VrefLevel = 4
1109 09:58:42.855519 TX Bit0 (977~997) 21 987, Bit8 (963~984) 22 973,
1110 09:58:42.858396 TX Bit1 (977~995) 19 986, Bit9 (966~985) 20 975,
1111 09:58:42.865138 TX Bit2 (977~996) 20 986, Bit10 (969~989) 21 979,
1112 09:58:42.868471 TX Bit3 (971~990) 20 980, Bit11 (965~985) 21 975,
1113 09:58:42.871577 TX Bit4 (976~997) 22 986, Bit12 (966~987) 22 976,
1114 09:58:42.878867 TX Bit5 (974~990) 17 982, Bit13 (966~984) 19 975,
1115 09:58:42.881999 TX Bit6 (975~991) 17 983, Bit14 (966~984) 19 975,
1116 09:58:42.885325 TX Bit7 (975~994) 20 984, Bit15 (968~988) 21 978,
1117 09:58:42.885836
1118 09:58:42.888525 Write Rank0 MR14 =0x6
1119 09:58:42.898320
1120 09:58:42.898823 CH=0, VrefRange= 0, VrefLevel = 6
1121 09:58:42.904301 TX Bit0 (977~998) 22 987, Bit8 (963~984) 22 973,
1122 09:58:42.908088 TX Bit1 (977~996) 20 986, Bit9 (965~986) 22 975,
1123 09:58:42.914678 TX Bit2 (977~997) 21 987, Bit10 (969~990) 22 979,
1124 09:58:42.917859 TX Bit3 (970~990) 21 980, Bit11 (964~986) 23 975,
1125 09:58:42.921029 TX Bit4 (976~997) 22 986, Bit12 (966~988) 23 977,
1126 09:58:42.927957 TX Bit5 (974~991) 18 982, Bit13 (966~984) 19 975,
1127 09:58:42.931305 TX Bit6 (975~991) 17 983, Bit14 (965~985) 21 975,
1128 09:58:42.934701 TX Bit7 (975~994) 20 984, Bit15 (968~989) 22 978,
1129 09:58:42.935153
1130 09:58:42.938113 Write Rank0 MR14 =0x8
1131 09:58:42.946924
1132 09:58:42.947442 CH=0, VrefRange= 0, VrefLevel = 8
1133 09:58:42.953433 TX Bit0 (977~998) 22 987, Bit8 (963~985) 23 974,
1134 09:58:42.956789 TX Bit1 (977~996) 20 986, Bit9 (964~987) 24 975,
1135 09:58:42.963714 TX Bit2 (977~997) 21 987, Bit10 (969~990) 22 979,
1136 09:58:42.966815 TX Bit3 (970~990) 21 980, Bit11 (964~987) 24 975,
1137 09:58:42.970680 TX Bit4 (976~998) 23 987, Bit12 (965~988) 24 976,
1138 09:58:42.977219 TX Bit5 (973~991) 19 982, Bit13 (966~985) 20 975,
1139 09:58:42.980357 TX Bit6 (975~992) 18 983, Bit14 (965~986) 22 975,
1140 09:58:43.031701 TX Bit7 (975~995) 21 985, Bit15 (968~989) 22 978,
1141 09:58:43.032314
1142 09:58:43.032792 Write Rank0 MR14 =0xa
1143 09:58:43.033204
1144 09:58:43.033531 CH=0, VrefRange= 0, VrefLevel = 10
1145 09:58:43.034156 TX Bit0 (977~998) 22 987, Bit8 (962~985) 24 973,
1146 09:58:43.034532 TX Bit1 (977~997) 21 987, Bit9 (964~987) 24 975,
1147 09:58:43.034826 TX Bit2 (976~998) 23 987, Bit10 (968~990) 23 979,
1148 09:58:43.035112 TX Bit3 (969~991) 23 980, Bit11 (963~987) 25 975,
1149 09:58:43.035393 TX Bit4 (976~998) 23 987, Bit12 (965~988) 24 976,
1150 09:58:43.035667 TX Bit5 (973~992) 20 982, Bit13 (965~985) 21 975,
1151 09:58:43.035942 TX Bit6 (973~993) 21 983, Bit14 (965~986) 22 975,
1152 09:58:43.036579 TX Bit7 (974~996) 23 985, Bit15 (967~989) 23 978,
1153 09:58:43.036899
1154 09:58:43.037180 Write Rank0 MR14 =0xc
1155 09:58:43.045735
1156 09:58:43.048800 CH=0, VrefRange= 0, VrefLevel = 12
1157 09:58:43.051917 TX Bit0 (977~998) 22 987, Bit8 (962~986) 25 974,
1158 09:58:43.055123 TX Bit1 (977~997) 21 987, Bit9 (964~988) 25 976,
1159 09:58:43.062051 TX Bit2 (976~998) 23 987, Bit10 (968~990) 23 979,
1160 09:58:43.065232 TX Bit3 (969~991) 23 980, Bit11 (963~988) 26 975,
1161 09:58:43.068814 TX Bit4 (976~998) 23 987, Bit12 (964~989) 26 976,
1162 09:58:43.075573 TX Bit5 (972~992) 21 982, Bit13 (965~986) 22 975,
1163 09:58:43.078699 TX Bit6 (974~993) 20 983, Bit14 (965~987) 23 976,
1164 09:58:43.082318 TX Bit7 (974~996) 23 985, Bit15 (967~990) 24 978,
1165 09:58:43.082829
1166 09:58:43.085871 Write Rank0 MR14 =0xe
1167 09:58:43.094827
1168 09:58:43.098470 CH=0, VrefRange= 0, VrefLevel = 14
1169 09:58:43.101405 TX Bit0 (976~999) 24 987, Bit8 (962~987) 26 974,
1170 09:58:43.105005 TX Bit1 (976~997) 22 986, Bit9 (963~988) 26 975,
1171 09:58:43.111708 TX Bit2 (976~998) 23 987, Bit10 (968~991) 24 979,
1172 09:58:43.114919 TX Bit3 (969~992) 24 980, Bit11 (963~988) 26 975,
1173 09:58:43.118274 TX Bit4 (975~998) 24 986, Bit12 (964~989) 26 976,
1174 09:58:43.124850 TX Bit5 (972~992) 21 982, Bit13 (963~987) 25 975,
1175 09:58:43.128362 TX Bit6 (973~994) 22 983, Bit14 (963~988) 26 975,
1176 09:58:43.131796 TX Bit7 (973~997) 25 985, Bit15 (967~990) 24 978,
1177 09:58:43.132313
1178 09:58:43.135024 Write Rank0 MR14 =0x10
1179 09:58:43.144408
1180 09:58:43.147798 CH=0, VrefRange= 0, VrefLevel = 16
1181 09:58:43.151006 TX Bit0 (976~999) 24 987, Bit8 (961~988) 28 974,
1182 09:58:43.154003 TX Bit1 (976~998) 23 987, Bit9 (963~988) 26 975,
1183 09:58:43.160721 TX Bit2 (976~998) 23 987, Bit10 (968~991) 24 979,
1184 09:58:43.164430 TX Bit3 (969~992) 24 980, Bit11 (962~989) 28 975,
1185 09:58:43.167556 TX Bit4 (975~999) 25 987, Bit12 (964~989) 26 976,
1186 09:58:43.174244 TX Bit5 (971~993) 23 982, Bit13 (963~988) 26 975,
1187 09:58:43.177681 TX Bit6 (973~995) 23 984, Bit14 (964~988) 25 976,
1188 09:58:43.181720 TX Bit7 (973~997) 25 985, Bit15 (967~990) 24 978,
1189 09:58:43.182279
1190 09:58:43.184377 Write Rank0 MR14 =0x12
1191 09:58:43.194032
1192 09:58:43.197321 CH=0, VrefRange= 0, VrefLevel = 18
1193 09:58:43.200870 TX Bit0 (976~1000) 25 988, Bit8 (961~988) 28 974,
1194 09:58:43.204272 TX Bit1 (976~998) 23 987, Bit9 (963~989) 27 976,
1195 09:58:43.211053 TX Bit2 (976~999) 24 987, Bit10 (968~991) 24 979,
1196 09:58:43.214251 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1197 09:58:43.217712 TX Bit4 (975~999) 25 987, Bit12 (963~989) 27 976,
1198 09:58:43.224253 TX Bit5 (971~994) 24 982, Bit13 (963~988) 26 975,
1199 09:58:43.227674 TX Bit6 (972~995) 24 983, Bit14 (963~989) 27 976,
1200 09:58:43.230964 TX Bit7 (973~998) 26 985, Bit15 (967~990) 24 978,
1201 09:58:43.231483
1202 09:58:43.234294 Write Rank0 MR14 =0x14
1203 09:58:43.243786
1204 09:58:43.247437 CH=0, VrefRange= 0, VrefLevel = 20
1205 09:58:43.250244 TX Bit0 (976~1000) 25 988, Bit8 (961~988) 28 974,
1206 09:58:43.253655 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1207 09:58:43.260435 TX Bit2 (975~999) 25 987, Bit10 (967~991) 25 979,
1208 09:58:43.263687 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1209 09:58:43.267187 TX Bit4 (975~999) 25 987, Bit12 (963~989) 27 976,
1210 09:58:43.273810 TX Bit5 (970~994) 25 982, Bit13 (963~988) 26 975,
1211 09:58:43.276988 TX Bit6 (972~996) 25 984, Bit14 (963~989) 27 976,
1212 09:58:43.280339 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1213 09:58:43.280765
1214 09:58:43.283747 Write Rank0 MR14 =0x16
1215 09:58:43.293664
1216 09:58:43.296916 CH=0, VrefRange= 0, VrefLevel = 22
1217 09:58:43.300237 TX Bit0 (976~1000) 25 988, Bit8 (961~988) 28 974,
1218 09:58:43.303912 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1219 09:58:43.310584 TX Bit2 (975~999) 25 987, Bit10 (967~991) 25 979,
1220 09:58:43.313656 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1221 09:58:43.317348 TX Bit4 (975~999) 25 987, Bit12 (963~989) 27 976,
1222 09:58:43.323828 TX Bit5 (970~994) 25 982, Bit13 (963~988) 26 975,
1223 09:58:43.327433 TX Bit6 (972~996) 25 984, Bit14 (963~989) 27 976,
1224 09:58:43.330763 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1225 09:58:43.331289
1226 09:58:43.333802 Write Rank0 MR14 =0x18
1227 09:58:43.343145
1228 09:58:43.346717 CH=0, VrefRange= 0, VrefLevel = 24
1229 09:58:43.350273 TX Bit0 (976~1000) 25 988, Bit8 (961~988) 28 974,
1230 09:58:43.353168 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1231 09:58:43.359918 TX Bit2 (975~999) 25 987, Bit10 (967~991) 25 979,
1232 09:58:43.363452 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1233 09:58:43.366744 TX Bit4 (975~999) 25 987, Bit12 (963~989) 27 976,
1234 09:58:43.373474 TX Bit5 (970~994) 25 982, Bit13 (963~988) 26 975,
1235 09:58:43.376871 TX Bit6 (972~996) 25 984, Bit14 (963~989) 27 976,
1236 09:58:43.380587 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1237 09:58:43.381095
1238 09:58:43.383400 Write Rank0 MR14 =0x1a
1239 09:58:43.393469
1240 09:58:43.396314 CH=0, VrefRange= 0, VrefLevel = 26
1241 09:58:43.399927 TX Bit0 (976~1000) 25 988, Bit8 (961~988) 28 974,
1242 09:58:43.403419 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1243 09:58:43.410046 TX Bit2 (975~999) 25 987, Bit10 (967~991) 25 979,
1244 09:58:43.413198 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1245 09:58:43.416760 TX Bit4 (975~999) 25 987, Bit12 (963~989) 27 976,
1246 09:58:43.423378 TX Bit5 (970~994) 25 982, Bit13 (963~988) 26 975,
1247 09:58:43.426581 TX Bit6 (972~996) 25 984, Bit14 (963~989) 27 976,
1248 09:58:43.430369 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1249 09:58:43.430884
1250 09:58:43.433240 Write Rank0 MR14 =0x1c
1251 09:58:43.442853
1252 09:58:43.446109 CH=0, VrefRange= 0, VrefLevel = 28
1253 09:58:43.449567 TX Bit0 (976~1000) 25 988, Bit8 (961~988) 28 974,
1254 09:58:43.452698 TX Bit1 (975~998) 24 986, Bit9 (963~988) 26 975,
1255 09:58:43.459482 TX Bit2 (975~999) 25 987, Bit10 (967~991) 25 979,
1256 09:58:43.462861 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1257 09:58:43.466627 TX Bit4 (975~999) 25 987, Bit12 (963~989) 27 976,
1258 09:58:43.473008 TX Bit5 (970~994) 25 982, Bit13 (963~988) 26 975,
1259 09:58:43.476041 TX Bit6 (972~996) 25 984, Bit14 (963~989) 27 976,
1260 09:58:43.479591 TX Bit7 (972~998) 27 985, Bit15 (966~990) 25 978,
1261 09:58:43.480106
1262 09:58:43.480433
1263 09:58:43.482858 TX Vref found, early break! 378< 391
1264 09:58:43.489940 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1265 09:58:43.493279 u1DelayCellOfst[0]=10 cells (8 PI)
1266 09:58:43.496272 u1DelayCellOfst[1]=7 cells (6 PI)
1267 09:58:43.499687 u1DelayCellOfst[2]=9 cells (7 PI)
1268 09:58:43.500109 u1DelayCellOfst[3]=0 cells (0 PI)
1269 09:58:43.503151 u1DelayCellOfst[4]=9 cells (7 PI)
1270 09:58:43.506252 u1DelayCellOfst[5]=2 cells (2 PI)
1271 09:58:43.510104 u1DelayCellOfst[6]=5 cells (4 PI)
1272 09:58:43.513118 u1DelayCellOfst[7]=6 cells (5 PI)
1273 09:58:43.516550 Byte0, DQ PI dly=980, DQM PI dly= 984
1274 09:58:43.519648 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1275 09:58:43.520080
1276 09:58:43.527053 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1277 09:58:43.527561
1278 09:58:43.530204 u1DelayCellOfst[8]=0 cells (0 PI)
1279 09:58:43.533545 u1DelayCellOfst[9]=1 cells (1 PI)
1280 09:58:43.534049 u1DelayCellOfst[10]=6 cells (5 PI)
1281 09:58:43.536988 u1DelayCellOfst[11]=1 cells (1 PI)
1282 09:58:43.540368 u1DelayCellOfst[12]=2 cells (2 PI)
1283 09:58:43.543437 u1DelayCellOfst[13]=1 cells (1 PI)
1284 09:58:43.546637 u1DelayCellOfst[14]=2 cells (2 PI)
1285 09:58:43.550547 u1DelayCellOfst[15]=5 cells (4 PI)
1286 09:58:43.553331 Byte1, DQ PI dly=974, DQM PI dly= 976
1287 09:58:43.557177 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1288 09:58:43.557729
1289 09:58:43.563530 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1290 09:58:43.564043
1291 09:58:43.564370 Write Rank0 MR14 =0x14
1292 09:58:43.564719
1293 09:58:43.566769 Final TX Range 0 Vref 20
1294 09:58:43.567190
1295 09:58:43.573732 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1296 09:58:43.574283
1297 09:58:43.580707 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1298 09:58:43.587340 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1299 09:58:43.593886 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1300 09:58:43.597656 Write Rank0 MR3 =0xb0
1301 09:58:43.598160 DramC Write-DBI on
1302 09:58:43.598529 ==
1303 09:58:43.603873 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1304 09:58:43.606981 fsp= 1, odt_onoff= 1, Byte mode= 0
1305 09:58:43.607413 ==
1306 09:58:43.610591 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1307 09:58:43.611099
1308 09:58:43.613812 Begin, DQ Scan Range 696~760
1309 09:58:43.614267
1310 09:58:43.614605
1311 09:58:43.617044 TX Vref Scan disable
1312 09:58:43.620480 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1313 09:58:43.623948 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1314 09:58:43.627033 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1315 09:58:43.630590 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1316 09:58:43.634399 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1317 09:58:43.637386 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1318 09:58:43.640900 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1319 09:58:43.643909 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1320 09:58:43.647251 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1321 09:58:43.650528 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1322 09:58:43.654351 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1323 09:58:43.657379 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1324 09:58:43.660498 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1325 09:58:43.663945 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1326 09:58:43.667340 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1327 09:58:43.671056 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1328 09:58:43.674103 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1329 09:58:43.677730 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1330 09:58:43.681195 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1331 09:58:43.690341 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1332 09:58:43.693889 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1333 09:58:43.697225 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1334 09:58:43.700561 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1335 09:58:43.703923 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1336 09:58:43.706954 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1337 09:58:43.710618 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1338 09:58:43.713705 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1339 09:58:43.717262 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1340 09:58:43.720347 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1341 09:58:43.724001 Byte0, DQ PI dly=728, DQM PI dly= 728
1342 09:58:43.727394 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
1343 09:58:43.727834
1344 09:58:43.733882 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
1345 09:58:43.734415
1346 09:58:43.737344 Byte1, DQ PI dly=719, DQM PI dly= 719
1347 09:58:43.740649 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1348 09:58:43.741159
1349 09:58:43.744214 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1350 09:58:43.744724
1351 09:58:43.750767 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1352 09:58:43.757434 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1353 09:58:43.764137 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1354 09:58:43.767586 Write Rank0 MR3 =0x30
1355 09:58:43.770729 DramC Write-DBI off
1356 09:58:43.771149
1357 09:58:43.771471 [DATLAT]
1358 09:58:43.774111 Freq=1600, CH0 RK0, use_rxtx_scan=0
1359 09:58:43.774587
1360 09:58:43.774917 DATLAT Default: 0xf
1361 09:58:43.777506 7, 0xFFFF, sum=0
1362 09:58:43.777938 8, 0xFFFF, sum=0
1363 09:58:43.780831 9, 0xFFFF, sum=0
1364 09:58:43.781258 10, 0xFFFF, sum=0
1365 09:58:43.784767 11, 0xFFFF, sum=0
1366 09:58:43.785275 12, 0xFFFF, sum=0
1367 09:58:43.787774 13, 0xFFFF, sum=0
1368 09:58:43.788281 14, 0x0, sum=1
1369 09:58:43.791356 15, 0x0, sum=2
1370 09:58:43.791868 16, 0x0, sum=3
1371 09:58:43.792199 17, 0x0, sum=4
1372 09:58:43.797874 pattern=2 first_step=14 total pass=5 best_step=16
1373 09:58:43.798327 ==
1374 09:58:43.801038 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1375 09:58:43.804332 fsp= 1, odt_onoff= 1, Byte mode= 0
1376 09:58:43.804756 ==
1377 09:58:43.811075 Start DQ dly to find pass range UseTestEngine =1
1378 09:58:43.814632 x-axis: bit #, y-axis: DQ dly (-127~63)
1379 09:58:43.815057 RX Vref Scan = 1
1380 09:58:43.938120
1381 09:58:43.938676 RX Vref found, early break!
1382 09:58:43.939009
1383 09:58:43.941378 Final RX Vref 13, apply to both rank0 and 1
1384 09:58:43.944552 ==
1385 09:58:43.947882 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1386 09:58:43.951094 fsp= 1, odt_onoff= 1, Byte mode= 0
1387 09:58:43.951528 ==
1388 09:58:43.951857 DQS Delay:
1389 09:58:43.954417 DQS0 = 0, DQS1 = 0
1390 09:58:43.954923 DQM Delay:
1391 09:58:43.957515 DQM0 = 19, DQM1 = 18
1392 09:58:43.957935 DQ Delay:
1393 09:58:43.961077 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1394 09:58:43.964550 DQ4 =22, DQ5 =15, DQ6 =17, DQ7 =18
1395 09:58:43.967908 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
1396 09:58:43.971069 DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =20
1397 09:58:43.971664
1398 09:58:43.972201
1399 09:58:43.972539
1400 09:58:43.974601 [DramC_TX_OE_Calibration] TA2
1401 09:58:43.978016 Original DQ_B0 (3 6) =30, OEN = 27
1402 09:58:43.981630 Original DQ_B1 (3 6) =30, OEN = 27
1403 09:58:43.982141 23, 0x0, End_B0=23 End_B1=23
1404 09:58:43.984941 24, 0x0, End_B0=24 End_B1=24
1405 09:58:43.988191 25, 0x0, End_B0=25 End_B1=25
1406 09:58:43.991896 26, 0x0, End_B0=26 End_B1=26
1407 09:58:43.994737 27, 0x0, End_B0=27 End_B1=27
1408 09:58:43.995176 28, 0x0, End_B0=28 End_B1=28
1409 09:58:43.998197 29, 0x0, End_B0=29 End_B1=29
1410 09:58:44.001469 30, 0x0, End_B0=30 End_B1=30
1411 09:58:44.004937 31, 0xFFFF, End_B0=30 End_B1=30
1412 09:58:44.008430 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1413 09:58:44.015012 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1414 09:58:44.015555
1415 09:58:44.016038
1416 09:58:44.018172 Write Rank0 MR23 =0x3f
1417 09:58:44.018639 [DQSOSC]
1418 09:58:44.025107 [DQSOSCAuto] RK0, (LSB)MR18= 0x9f, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
1419 09:58:44.031759 CH0_RK0: MR19=0x3, MR18=0x9F, DQSOSC=339, MR23=63, INC=21, DEC=32
1420 09:58:44.035165 Write Rank0 MR23 =0x3f
1421 09:58:44.035671 [DQSOSC]
1422 09:58:44.041954 [DQSOSCAuto] RK0, (LSB)MR18= 0x9e, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1423 09:58:44.045553 CH0 RK0: MR19=3, MR18=9E
1424 09:58:44.048553 [RankSwap] Rank num 2, (Multi 1), Rank 1
1425 09:58:44.048999 Write Rank0 MR2 =0xad
1426 09:58:44.052103 [Write Leveling]
1427 09:58:44.055406 delay byte0 byte1 byte2 byte3
1428 09:58:44.055927
1429 09:58:44.056362 10 0 0
1430 09:58:44.058589 11 0 0
1431 09:58:44.059028 12 0 0
1432 09:58:44.059463 13 0 0
1433 09:58:44.061792 14 0 0
1434 09:58:44.062248 15 0 0
1435 09:58:44.065743 16 0 0
1436 09:58:44.066291 17 0 0
1437 09:58:44.066645 18 0 0
1438 09:58:44.069080 19 0 0
1439 09:58:44.069592 20 0 0
1440 09:58:44.072042 21 0 0
1441 09:58:44.072468 22 0 0
1442 09:58:44.072801 23 0 0
1443 09:58:44.075726 24 0 0
1444 09:58:44.076240 25 0 0
1445 09:58:44.078939 26 0 0
1446 09:58:44.079370 27 0 0
1447 09:58:44.082329 28 0 0
1448 09:58:44.082835 29 0 ff
1449 09:58:44.083175 30 0 ff
1450 09:58:44.086069 31 0 ff
1451 09:58:44.086634 32 0 ff
1452 09:58:44.089073 33 0 ff
1453 09:58:44.089602 34 0 ff
1454 09:58:44.092404 35 ff ff
1455 09:58:44.092909 36 ff ff
1456 09:58:44.093245 37 ff ff
1457 09:58:44.095584 38 ff ff
1458 09:58:44.096063 39 ff ff
1459 09:58:44.098934 40 ff ff
1460 09:58:44.099362 41 ff ff
1461 09:58:44.105963 pass bytecount = 0xff (0xff: all bytes pass)
1462 09:58:44.106512
1463 09:58:44.106849 DQS0 dly: 35
1464 09:58:44.107157 DQS1 dly: 29
1465 09:58:44.109009 Write Rank0 MR2 =0x2d
1466 09:58:44.112451 [RankSwap] Rank num 2, (Multi 1), Rank 0
1467 09:58:44.115741 Write Rank1 MR1 =0xd6
1468 09:58:44.116165 [Gating]
1469 09:58:44.116493 ==
1470 09:58:44.119403 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1471 09:58:44.122495 fsp= 1, odt_onoff= 1, Byte mode= 0
1472 09:58:44.122920 ==
1473 09:58:44.129472 3 1 0 |3534 707 |(11 11)(11 11) |(0 0)(0 0)| 0
1474 09:58:44.133135 3 1 4 |3534 1c1b |(11 11)(11 11) |(1 1)(0 0)| 0
1475 09:58:44.135978 3 1 8 |3534 1c1b |(11 11)(11 11) |(1 1)(1 1)| 0
1476 09:58:44.143114 3 1 12 |3534 f0f |(11 11)(11 11) |(1 1)(1 1)| 0
1477 09:58:44.146073 3 1 16 |3534 1211 |(11 11)(11 11) |(0 0)(0 1)| 0
1478 09:58:44.149770 3 1 20 |3534 2e2e |(11 11)(11 11) |(0 0)(1 1)| 0
1479 09:58:44.153071 3 1 24 |3534 3535 |(11 11)(10 10) |(0 0)(0 1)| 0
1480 09:58:44.159711 3 1 28 |3534 3433 |(11 11)(11 11) |(0 0)(0 1)| 0
1481 09:58:44.162940 3 2 0 |3534 3333 |(11 11)(0 0) |(0 1)(0 1)| 0
1482 09:58:44.166437 3 2 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1483 09:58:44.173585 3 2 8 |1515 808 |(11 11)(11 11) |(1 1)(1 1)| 0
1484 09:58:44.176566 3 2 12 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1485 09:58:44.180023 3 2 16 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1486 09:58:44.183256 3 2 20 |3d3d 3837 |(11 11)(11 11) |(1 1)(1 1)| 0
1487 09:58:44.189989 [Byte 1] Lead/lag Transition tap number (1)
1488 09:58:44.193176 3 2 24 |3d3d 3a3a |(11 11)(11 11) |(1 1)(0 0)| 0
1489 09:58:44.196391 3 2 28 |3d3d 3a39 |(11 11)(11 11) |(1 1)(0 0)| 0
1490 09:58:44.199842 3 3 0 |3d3d 606 |(11 11)(1 1) |(1 1)(1 1)| 0
1491 09:58:44.206819 3 3 4 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1492 09:58:44.210165 3 3 8 |3d3d 2626 |(11 11)(1 1) |(1 1)(1 1)| 0
1493 09:58:44.213398 3 3 12 |3d3d 3b3b |(11 11)(0 0) |(1 1)(1 1)| 0
1494 09:58:44.219880 3 3 16 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
1495 09:58:44.223170 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1496 09:58:44.226541 [Byte 0] Lead/lag Transition tap number (1)
1497 09:58:44.229995 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1498 09:58:44.236756 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1499 09:58:44.239891 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1500 09:58:44.243484 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1501 09:58:44.246640 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1502 09:58:44.253438 3 4 8 |403 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1503 09:58:44.256824 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1504 09:58:44.260314 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1505 09:58:44.266989 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1506 09:58:44.270109 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1507 09:58:44.274034 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1508 09:58:44.277561 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1509 09:58:44.283594 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1510 09:58:44.287187 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1511 09:58:44.290594 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1512 09:58:44.297703 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1513 09:58:44.300717 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1514 09:58:44.304317 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1515 09:58:44.307659 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1516 09:58:44.314078 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1517 09:58:44.317386 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1518 09:58:44.320975 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1519 09:58:44.327547 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1520 09:58:44.331180 [Byte 0] Lead/lag Transition tap number (2)
1521 09:58:44.334561 [Byte 1] Lead/lag Transition tap number (2)
1522 09:58:44.338346 3 6 8 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1523 09:58:44.341405 3 6 12 |4646 403 |(10 10)(11 11) |(0 0)(0 0)| 0
1524 09:58:44.348104 3 6 16 |4646 2424 |(0 0)(1 1) |(0 0)(0 0)| 0
1525 09:58:44.348723 [Byte 0]First pass (3, 6, 16)
1526 09:58:44.354835 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1527 09:58:44.355351 [Byte 1]First pass (3, 6, 20)
1528 09:58:44.361411 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1529 09:58:44.364941 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1530 09:58:44.368207 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1531 09:58:44.371367 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1532 09:58:44.374709 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1533 09:58:44.381507 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1534 09:58:44.385151 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1535 09:58:44.388392 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1536 09:58:44.391316 All bytes gating window > 1UI, Early break!
1537 09:58:44.391848
1538 09:58:44.394966 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1539 09:58:44.395471
1540 09:58:44.398180 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1541 09:58:44.398695
1542 09:58:44.399025
1543 09:58:44.399324
1544 09:58:44.405131 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1545 09:58:44.405635
1546 09:58:44.408505 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1547 09:58:44.409015
1548 09:58:44.409342
1549 09:58:44.409646 Write Rank1 MR1 =0x56
1550 09:58:44.411887
1551 09:58:44.412317 best RODT dly(2T, 0.5T) = (2, 3)
1552 09:58:44.412680
1553 09:58:44.414901 best RODT dly(2T, 0.5T) = (2, 3)
1554 09:58:44.415329 ==
1555 09:58:44.421817 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1556 09:58:44.425459 fsp= 1, odt_onoff= 1, Byte mode= 0
1557 09:58:44.425967 ==
1558 09:58:44.428604 Start DQ dly to find pass range UseTestEngine =0
1559 09:58:44.431928 x-axis: bit #, y-axis: DQ dly (-127~63)
1560 09:58:44.435186 RX Vref Scan = 0
1561 09:58:44.438818 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1562 09:58:44.439333 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1563 09:58:44.442067 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1564 09:58:44.445499 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1565 09:58:44.448748 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1566 09:58:44.451940 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1567 09:58:44.455229 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1568 09:58:44.458850 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1569 09:58:44.461991 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1570 09:58:44.462532 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1571 09:58:44.465758 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1572 09:58:44.469245 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1573 09:58:44.472130 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1574 09:58:44.475424 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1575 09:58:44.479032 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1576 09:58:44.482413 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1577 09:58:44.486050 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1578 09:58:44.486622 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1579 09:58:44.488872 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1580 09:58:44.492173 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1581 09:58:44.495750 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1582 09:58:44.499064 -5, [0] xxxoxxxx xxxxxxxx [MSB]
1583 09:58:44.502093 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1584 09:58:44.502552 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1585 09:58:44.505359 -2, [0] xxxoxoox xxxxxxxx [MSB]
1586 09:58:44.508767 -1, [0] xxxoxooo oxxxxxxx [MSB]
1587 09:58:44.512426 0, [0] xxxoxooo oxxoxxxx [MSB]
1588 09:58:44.515542 1, [0] xxxoxooo ooxoooox [MSB]
1589 09:58:44.518956 2, [0] xxxoxooo ooxooooo [MSB]
1590 09:58:44.519396 3, [0] xxxoxooo ooxooooo [MSB]
1591 09:58:44.522434 4, [0] xxxooooo oooooooo [MSB]
1592 09:58:44.526185 5, [0] xooooooo oooooooo [MSB]
1593 09:58:44.529502 33, [0] oooxoooo oooooooo [MSB]
1594 09:58:44.532873 34, [0] oooxoxoo oooooooo [MSB]
1595 09:58:44.536250 35, [0] oooxoxoo oooxooxo [MSB]
1596 09:58:44.536777 36, [0] oooxoxxx xooxooxo [MSB]
1597 09:58:44.539274 37, [0] oooxoxxx xooxoxxo [MSB]
1598 09:58:44.542812 38, [0] oooxoxxx xxoxoxxo [MSB]
1599 09:58:44.546339 39, [0] oooxoxxx xxoxxxxo [MSB]
1600 09:58:44.549703 40, [0] oxoxxxxx xxoxxxxx [MSB]
1601 09:58:44.552649 41, [0] xxxxxxxx xxoxxxxx [MSB]
1602 09:58:44.556328 42, [0] xxxxxxxx xxoxxxxx [MSB]
1603 09:58:44.556844 43, [0] xxxxxxxx xxxxxxxx [MSB]
1604 09:58:44.562683 iDelay=43, Bit 0, Center 23 (6 ~ 40) 35
1605 09:58:44.566015 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1606 09:58:44.569404 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1607 09:58:44.572881 iDelay=43, Bit 3, Center 13 (-5 ~ 32) 38
1608 09:58:44.576177 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
1609 09:58:44.579219 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
1610 09:58:44.582893 iDelay=43, Bit 6, Center 16 (-2 ~ 35) 38
1611 09:58:44.586279 iDelay=43, Bit 7, Center 17 (-1 ~ 35) 37
1612 09:58:44.589408 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
1613 09:58:44.592674 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
1614 09:58:44.596139 iDelay=43, Bit 10, Center 23 (4 ~ 42) 39
1615 09:58:44.599408 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1616 09:58:44.603038 iDelay=43, Bit 12, Center 19 (1 ~ 38) 38
1617 09:58:44.609490 iDelay=43, Bit 13, Center 18 (1 ~ 36) 36
1618 09:58:44.612841 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1619 09:58:44.616185 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1620 09:58:44.616701 ==
1621 09:58:44.619114 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1622 09:58:44.622581 fsp= 1, odt_onoff= 1, Byte mode= 0
1623 09:58:44.623006 ==
1624 09:58:44.626120 DQS Delay:
1625 09:58:44.626662 DQS0 = 0, DQS1 = 0
1626 09:58:44.627029 DQM Delay:
1627 09:58:44.629706 DQM0 = 18, DQM1 = 18
1628 09:58:44.630245 DQ Delay:
1629 09:58:44.632949 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =13
1630 09:58:44.636291 DQ4 =21, DQ5 =15, DQ6 =16, DQ7 =17
1631 09:58:44.639562 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
1632 09:58:44.642921 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1633 09:58:44.643358
1634 09:58:44.643757
1635 09:58:44.646111 DramC Write-DBI off
1636 09:58:44.646580 ==
1637 09:58:44.649795 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1638 09:58:44.653115 fsp= 1, odt_onoff= 1, Byte mode= 0
1639 09:58:44.653677 ==
1640 09:58:44.659514 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1641 09:58:44.660039
1642 09:58:44.660376 Begin, DQ Scan Range 925~1181
1643 09:58:44.660688
1644 09:58:44.662855
1645 09:58:44.663441 TX Vref Scan disable
1646 09:58:44.666424 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1647 09:58:44.669670 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1648 09:58:44.673057 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1649 09:58:44.676491 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1650 09:58:44.679862 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1651 09:58:44.682922 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1652 09:58:44.690000 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1653 09:58:44.693184 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1654 09:58:44.696644 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1655 09:58:44.699691 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1656 09:58:44.703019 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1657 09:58:44.706422 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1658 09:58:44.709758 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1659 09:58:44.713462 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1660 09:58:44.716760 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1661 09:58:44.719782 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1662 09:58:44.723641 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1663 09:58:44.726924 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1664 09:58:44.730352 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1665 09:58:44.733737 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1666 09:58:44.737007 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1667 09:58:44.740081 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1668 09:58:44.743822 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1669 09:58:44.747163 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1670 09:58:44.750306 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1671 09:58:44.756798 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1672 09:58:44.760061 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1673 09:58:44.763470 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1674 09:58:44.767171 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1675 09:58:44.770586 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1676 09:58:44.774171 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1677 09:58:44.777625 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1678 09:58:44.781013 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1679 09:58:44.784112 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1680 09:58:44.787083 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1681 09:58:44.790753 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1682 09:58:44.794539 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1683 09:58:44.797550 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1684 09:58:44.800889 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1685 09:58:44.804056 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1686 09:58:44.807360 965 |3 6 5|[0] xxxxxxxx oxxxxxxx [MSB]
1687 09:58:44.810656 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1688 09:58:44.814429 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1689 09:58:44.817639 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1690 09:58:44.820848 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1691 09:58:44.824381 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1692 09:58:44.827832 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1693 09:58:44.830730 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1694 09:58:44.834110 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1695 09:58:44.837921 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1696 09:58:44.844559 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1697 09:58:44.847727 976 |3 6 16|[0] xxxooooo oooooooo [MSB]
1698 09:58:44.850706 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1699 09:58:44.854252 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1700 09:58:44.857769 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1701 09:58:44.861031 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1702 09:58:44.864179 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1703 09:58:44.867617 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1704 09:58:44.870929 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1705 09:58:44.877820 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1706 09:58:44.881187 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1707 09:58:44.885022 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1708 09:58:44.888343 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1709 09:58:44.891172 Byte0, DQ PI dly=984, DQM PI dly= 984
1710 09:58:44.894389 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1711 09:58:44.894954
1712 09:58:44.897930 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1713 09:58:44.898438
1714 09:58:44.901398 Byte1, DQ PI dly=977, DQM PI dly= 977
1715 09:58:44.907813 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1716 09:58:44.908267
1717 09:58:44.911176 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1718 09:58:44.911608
1719 09:58:44.911941 ==
1720 09:58:44.918067 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1721 09:58:44.921708 fsp= 1, odt_onoff= 1, Byte mode= 0
1722 09:58:44.922141 ==
1723 09:58:44.924618 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1724 09:58:44.925134
1725 09:58:44.927773 Begin, DQ Scan Range 953~1017
1726 09:58:44.928288 Write Rank1 MR14 =0x0
1727 09:58:44.938385
1728 09:58:44.938897 CH=0, VrefRange= 0, VrefLevel = 0
1729 09:58:44.945039 TX Bit0 (979~998) 20 988, Bit8 (966~985) 20 975,
1730 09:58:44.948335 TX Bit1 (978~996) 19 987, Bit9 (968~986) 19 977,
1731 09:58:44.951669 TX Bit2 (978~997) 20 987, Bit10 (973~990) 18 981,
1732 09:58:44.958199 TX Bit3 (974~990) 17 982, Bit11 (968~986) 19 977,
1733 09:58:44.961812 TX Bit4 (977~997) 21 987, Bit12 (968~987) 20 977,
1734 09:58:44.968876 TX Bit5 (976~990) 15 983, Bit13 (968~984) 17 976,
1735 09:58:44.972147 TX Bit6 (976~991) 16 983, Bit14 (968~986) 19 977,
1736 09:58:44.975215 TX Bit7 (978~992) 15 985, Bit15 (970~989) 20 979,
1737 09:58:44.975656
1738 09:58:44.978622 Write Rank1 MR14 =0x2
1739 09:58:44.987179
1740 09:58:44.987691 CH=0, VrefRange= 0, VrefLevel = 2
1741 09:58:44.994027 TX Bit0 (979~998) 20 988, Bit8 (967~986) 20 976,
1742 09:58:44.997193 TX Bit1 (978~996) 19 987, Bit9 (968~987) 20 977,
1743 09:58:45.004079 TX Bit2 (978~997) 20 987, Bit10 (973~990) 18 981,
1744 09:58:45.007619 TX Bit3 (974~990) 17 982, Bit11 (967~986) 20 976,
1745 09:58:45.010698 TX Bit4 (977~997) 21 987, Bit12 (968~987) 20 977,
1746 09:58:45.017607 TX Bit5 (976~990) 15 983, Bit13 (968~985) 18 976,
1747 09:58:45.021050 TX Bit6 (976~992) 17 984, Bit14 (968~987) 20 977,
1748 09:58:45.024749 TX Bit7 (977~993) 17 985, Bit15 (970~989) 20 979,
1749 09:58:45.025265
1750 09:58:45.027566 Write Rank1 MR14 =0x4
1751 09:58:45.036524
1752 09:58:45.037087 CH=0, VrefRange= 0, VrefLevel = 4
1753 09:58:45.043323 TX Bit0 (978~998) 21 988, Bit8 (966~986) 21 976,
1754 09:58:45.046488 TX Bit1 (978~997) 20 987, Bit9 (967~988) 22 977,
1755 09:58:45.053451 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1756 09:58:45.056471 TX Bit3 (974~990) 17 982, Bit11 (967~987) 21 977,
1757 09:58:45.060080 TX Bit4 (977~997) 21 987, Bit12 (968~988) 21 978,
1758 09:58:45.066689 TX Bit5 (975~991) 17 983, Bit13 (967~986) 20 976,
1759 09:58:45.069999 TX Bit6 (976~992) 17 984, Bit14 (968~987) 20 977,
1760 09:58:45.073755 TX Bit7 (977~994) 18 985, Bit15 (969~990) 22 979,
1761 09:58:45.074335
1762 09:58:45.076677 Write Rank1 MR14 =0x6
1763 09:58:45.085691
1764 09:58:45.086119 CH=0, VrefRange= 0, VrefLevel = 6
1765 09:58:45.092584 TX Bit0 (978~998) 21 988, Bit8 (966~987) 22 976,
1766 09:58:45.095773 TX Bit1 (977~997) 21 987, Bit9 (967~988) 22 977,
1767 09:58:45.098941 TX Bit2 (977~998) 22 987, Bit10 (971~990) 20 980,
1768 09:58:45.105604 TX Bit3 (973~990) 18 981, Bit11 (967~988) 22 977,
1769 09:58:45.109109 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1770 09:58:45.115584 TX Bit5 (975~992) 18 983, Bit13 (967~987) 21 977,
1771 09:58:45.119079 TX Bit6 (975~992) 18 983, Bit14 (968~988) 21 978,
1772 09:58:45.122604 TX Bit7 (977~994) 18 985, Bit15 (969~990) 22 979,
1773 09:58:45.123041
1774 09:58:45.125573 Write Rank1 MR14 =0x8
1775 09:58:45.134729
1776 09:58:45.135302 CH=0, VrefRange= 0, VrefLevel = 8
1777 09:58:45.141362 TX Bit0 (978~999) 22 988, Bit8 (966~988) 23 977,
1778 09:58:45.144694 TX Bit1 (977~997) 21 987, Bit9 (967~989) 23 978,
1779 09:58:45.151524 TX Bit2 (977~998) 22 987, Bit10 (971~990) 20 980,
1780 09:58:45.154778 TX Bit3 (973~991) 19 982, Bit11 (967~988) 22 977,
1781 09:58:45.158455 TX Bit4 (977~998) 22 987, Bit12 (967~989) 23 978,
1782 09:58:45.164796 TX Bit5 (974~992) 19 983, Bit13 (967~987) 21 977,
1783 09:58:45.168113 TX Bit6 (975~993) 19 984, Bit14 (967~989) 23 978,
1784 09:58:45.171663 TX Bit7 (977~995) 19 986, Bit15 (969~990) 22 979,
1785 09:58:45.172103
1786 09:58:45.175010 Write Rank1 MR14 =0xa
1787 09:58:45.183825
1788 09:58:45.187837 CH=0, VrefRange= 0, VrefLevel = 10
1789 09:58:45.190690 TX Bit0 (978~999) 22 988, Bit8 (966~988) 23 977,
1790 09:58:45.194166 TX Bit1 (977~997) 21 987, Bit9 (967~989) 23 978,
1791 09:58:45.200752 TX Bit2 (977~998) 22 987, Bit10 (971~990) 20 980,
1792 09:58:45.204278 TX Bit3 (973~991) 19 982, Bit11 (967~988) 22 977,
1793 09:58:45.207666 TX Bit4 (977~998) 22 987, Bit12 (967~989) 23 978,
1794 09:58:45.214339 TX Bit5 (974~992) 19 983, Bit13 (967~987) 21 977,
1795 09:58:45.217643 TX Bit6 (975~993) 19 984, Bit14 (967~989) 23 978,
1796 09:58:45.220855 TX Bit7 (977~995) 19 986, Bit15 (969~990) 22 979,
1797 09:58:45.221301
1798 09:58:45.224383 Write Rank1 MR14 =0xc
1799 09:58:45.233390
1800 09:58:45.237024 CH=0, VrefRange= 0, VrefLevel = 12
1801 09:58:45.240233 TX Bit0 (977~999) 23 988, Bit8 (965~988) 24 976,
1802 09:58:45.243640 TX Bit1 (977~998) 22 987, Bit9 (967~989) 23 978,
1803 09:58:45.250137 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
1804 09:58:45.253534 TX Bit3 (972~991) 20 981, Bit11 (966~989) 24 977,
1805 09:58:45.257135 TX Bit4 (977~999) 23 988, Bit12 (967~989) 23 978,
1806 09:58:45.263530 TX Bit5 (973~993) 21 983, Bit13 (967~988) 22 977,
1807 09:58:45.266732 TX Bit6 (974~995) 22 984, Bit14 (967~989) 23 978,
1808 09:58:45.270238 TX Bit7 (977~996) 20 986, Bit15 (968~990) 23 979,
1809 09:58:45.270670
1810 09:58:45.273673 Write Rank1 MR14 =0xe
1811 09:58:45.282889
1812 09:58:45.286344 CH=0, VrefRange= 0, VrefLevel = 14
1813 09:58:45.289460 TX Bit0 (977~1000) 24 988, Bit8 (965~989) 25 977,
1814 09:58:45.292869 TX Bit1 (977~998) 22 987, Bit9 (966~989) 24 977,
1815 09:58:45.299631 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
1816 09:58:45.303177 TX Bit3 (971~992) 22 981, Bit11 (966~989) 24 977,
1817 09:58:45.306268 TX Bit4 (977~999) 23 988, Bit12 (967~990) 24 978,
1818 09:58:45.313222 TX Bit5 (973~994) 22 983, Bit13 (966~988) 23 977,
1819 09:58:45.316631 TX Bit6 (974~995) 22 984, Bit14 (967~989) 23 978,
1820 09:58:45.319600 TX Bit7 (976~997) 22 986, Bit15 (968~991) 24 979,
1821 09:58:45.320052
1822 09:58:45.322675 Write Rank1 MR14 =0x10
1823 09:58:45.332977
1824 09:58:45.336269 CH=0, VrefRange= 0, VrefLevel = 16
1825 09:58:45.339886 TX Bit0 (977~1000) 24 988, Bit8 (965~989) 25 977,
1826 09:58:45.342768 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
1827 09:58:45.349311 TX Bit2 (977~999) 23 988, Bit10 (969~992) 24 980,
1828 09:58:45.352807 TX Bit3 (971~992) 22 981, Bit11 (966~989) 24 977,
1829 09:58:45.356256 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1830 09:58:45.362891 TX Bit5 (972~994) 23 983, Bit13 (966~989) 24 977,
1831 09:58:45.366017 TX Bit6 (973~995) 23 984, Bit14 (966~989) 24 977,
1832 09:58:45.369497 TX Bit7 (976~997) 22 986, Bit15 (968~991) 24 979,
1833 09:58:45.370006
1834 09:58:45.372750 Write Rank1 MR14 =0x12
1835 09:58:45.382665
1836 09:58:45.385943 CH=0, VrefRange= 0, VrefLevel = 18
1837 09:58:45.389453 TX Bit0 (977~1001) 25 989, Bit8 (964~989) 26 976,
1838 09:58:45.393011 TX Bit1 (977~999) 23 988, Bit9 (966~990) 25 978,
1839 09:58:45.399316 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1840 09:58:45.402908 TX Bit3 (971~993) 23 982, Bit11 (965~990) 26 977,
1841 09:58:45.406424 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1842 09:58:45.413172 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1843 09:58:45.415984 TX Bit6 (973~996) 24 984, Bit14 (966~990) 25 978,
1844 09:58:45.419707 TX Bit7 (976~998) 23 987, Bit15 (968~991) 24 979,
1845 09:58:45.420224
1846 09:58:45.422743 Write Rank1 MR14 =0x14
1847 09:58:45.433011
1848 09:58:45.435810 CH=0, VrefRange= 0, VrefLevel = 20
1849 09:58:45.439381 TX Bit0 (977~1001) 25 989, Bit8 (964~989) 26 976,
1850 09:58:45.442682 TX Bit1 (977~999) 23 988, Bit9 (966~990) 25 978,
1851 09:58:45.449432 TX Bit2 (976~1000) 25 988, Bit10 (969~992) 24 980,
1852 09:58:45.452761 TX Bit3 (970~993) 24 981, Bit11 (965~989) 25 977,
1853 09:58:45.456212 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1854 09:58:45.462904 TX Bit5 (972~996) 25 984, Bit13 (966~989) 24 977,
1855 09:58:45.466077 TX Bit6 (972~997) 26 984, Bit14 (966~990) 25 978,
1856 09:58:45.469503 TX Bit7 (976~998) 23 987, Bit15 (967~992) 26 979,
1857 09:58:45.470016
1858 09:58:45.473322 Write Rank1 MR14 =0x16
1859 09:58:45.482937
1860 09:58:45.483444 CH=0, VrefRange= 0, VrefLevel = 22
1861 09:58:45.489496 TX Bit0 (977~1002) 26 989, Bit8 (963~990) 28 976,
1862 09:58:45.492954 TX Bit1 (977~1000) 24 988, Bit9 (966~990) 25 978,
1863 09:58:45.499742 TX Bit2 (976~1000) 25 988, Bit10 (969~993) 25 981,
1864 09:58:45.503001 TX Bit3 (970~994) 25 982, Bit11 (965~990) 26 977,
1865 09:58:45.506458 TX Bit4 (976~1001) 26 988, Bit12 (966~990) 25 978,
1866 09:58:45.513112 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1867 09:58:45.516415 TX Bit6 (972~997) 26 984, Bit14 (965~990) 26 977,
1868 09:58:45.519996 TX Bit7 (975~998) 24 986, Bit15 (967~991) 25 979,
1869 09:58:45.520524
1870 09:58:45.522899 Write Rank1 MR14 =0x18
1871 09:58:45.533035
1872 09:58:45.536309 CH=0, VrefRange= 0, VrefLevel = 24
1873 09:58:45.540067 TX Bit0 (977~1002) 26 989, Bit8 (963~990) 28 976,
1874 09:58:45.543515 TX Bit1 (977~1000) 24 988, Bit9 (966~990) 25 978,
1875 09:58:45.549723 TX Bit2 (976~1000) 25 988, Bit10 (969~993) 25 981,
1876 09:58:45.552950 TX Bit3 (970~994) 25 982, Bit11 (965~990) 26 977,
1877 09:58:45.556597 TX Bit4 (976~1001) 26 988, Bit12 (966~990) 25 978,
1878 09:58:45.563111 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1879 09:58:45.566459 TX Bit6 (972~997) 26 984, Bit14 (965~990) 26 977,
1880 09:58:45.569890 TX Bit7 (975~998) 24 986, Bit15 (967~991) 25 979,
1881 09:58:45.570369
1882 09:58:45.573282 Write Rank1 MR14 =0x1a
1883 09:58:45.583381
1884 09:58:45.586892 CH=0, VrefRange= 0, VrefLevel = 26
1885 09:58:45.590111 TX Bit0 (977~1002) 26 989, Bit8 (963~990) 28 976,
1886 09:58:45.593454 TX Bit1 (977~1000) 24 988, Bit9 (966~990) 25 978,
1887 09:58:45.600269 TX Bit2 (976~1000) 25 988, Bit10 (969~993) 25 981,
1888 09:58:45.603388 TX Bit3 (970~994) 25 982, Bit11 (965~990) 26 977,
1889 09:58:45.606786 TX Bit4 (976~1001) 26 988, Bit12 (966~990) 25 978,
1890 09:58:45.613642 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1891 09:58:45.616698 TX Bit6 (972~997) 26 984, Bit14 (965~990) 26 977,
1892 09:58:45.620317 TX Bit7 (975~998) 24 986, Bit15 (967~991) 25 979,
1893 09:58:45.623501
1894 09:58:45.624023 Write Rank1 MR14 =0x1c
1895 09:58:45.633296
1896 09:58:45.633816 CH=0, VrefRange= 0, VrefLevel = 28
1897 09:58:45.640162 TX Bit0 (977~1002) 26 989, Bit8 (963~990) 28 976,
1898 09:58:45.643377 TX Bit1 (977~1000) 24 988, Bit9 (966~990) 25 978,
1899 09:58:45.650132 TX Bit2 (976~1000) 25 988, Bit10 (969~993) 25 981,
1900 09:58:45.653521 TX Bit3 (970~994) 25 982, Bit11 (965~990) 26 977,
1901 09:58:45.657009 TX Bit4 (976~1001) 26 988, Bit12 (966~990) 25 978,
1902 09:58:45.663638 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1903 09:58:45.667066 TX Bit6 (972~997) 26 984, Bit14 (965~990) 26 977,
1904 09:58:45.670194 TX Bit7 (975~998) 24 986, Bit15 (967~991) 25 979,
1905 09:58:45.670681
1906 09:58:45.673726 Write Rank1 MR14 =0x1e
1907 09:58:45.683588
1908 09:58:45.686778 CH=0, VrefRange= 0, VrefLevel = 30
1909 09:58:45.690245 TX Bit0 (977~1002) 26 989, Bit8 (963~990) 28 976,
1910 09:58:45.693576 TX Bit1 (977~1000) 24 988, Bit9 (966~990) 25 978,
1911 09:58:45.700287 TX Bit2 (976~1000) 25 988, Bit10 (969~993) 25 981,
1912 09:58:45.703687 TX Bit3 (970~994) 25 982, Bit11 (965~990) 26 977,
1913 09:58:45.706917 TX Bit4 (976~1001) 26 988, Bit12 (966~990) 25 978,
1914 09:58:45.713841 TX Bit5 (971~996) 26 983, Bit13 (965~990) 26 977,
1915 09:58:45.717109 TX Bit6 (972~997) 26 984, Bit14 (965~990) 26 977,
1916 09:58:45.720226 TX Bit7 (975~998) 24 986, Bit15 (967~991) 25 979,
1917 09:58:45.720712
1918 09:58:45.723783
1919 09:58:45.727172 TX Vref found, early break! 383< 387
1920 09:58:45.730299 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1921 09:58:45.733892 u1DelayCellOfst[0]=9 cells (7 PI)
1922 09:58:45.736849 u1DelayCellOfst[1]=7 cells (6 PI)
1923 09:58:45.740303 u1DelayCellOfst[2]=7 cells (6 PI)
1924 09:58:45.744099 u1DelayCellOfst[3]=0 cells (0 PI)
1925 09:58:45.744622 u1DelayCellOfst[4]=7 cells (6 PI)
1926 09:58:45.747073 u1DelayCellOfst[5]=1 cells (1 PI)
1927 09:58:45.750367 u1DelayCellOfst[6]=2 cells (2 PI)
1928 09:58:45.753753 u1DelayCellOfst[7]=5 cells (4 PI)
1929 09:58:45.757460 Byte0, DQ PI dly=982, DQM PI dly= 985
1930 09:58:45.760634 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1931 09:58:45.761058
1932 09:58:45.767541 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1933 09:58:45.768021
1934 09:58:45.770844 u1DelayCellOfst[8]=0 cells (0 PI)
1935 09:58:45.774253 u1DelayCellOfst[9]=2 cells (2 PI)
1936 09:58:45.774686 u1DelayCellOfst[10]=6 cells (5 PI)
1937 09:58:45.777629 u1DelayCellOfst[11]=1 cells (1 PI)
1938 09:58:45.780797 u1DelayCellOfst[12]=2 cells (2 PI)
1939 09:58:45.784321 u1DelayCellOfst[13]=1 cells (1 PI)
1940 09:58:45.787377 u1DelayCellOfst[14]=1 cells (1 PI)
1941 09:58:45.791104 u1DelayCellOfst[15]=3 cells (3 PI)
1942 09:58:45.794432 Byte1, DQ PI dly=976, DQM PI dly= 978
1943 09:58:45.797409 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1944 09:58:45.797835
1945 09:58:45.804596 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1946 09:58:45.805102
1947 09:58:45.805436 Write Rank1 MR14 =0x16
1948 09:58:45.805934
1949 09:58:45.807591 Final TX Range 0 Vref 22
1950 09:58:45.808015
1951 09:58:45.814354 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1952 09:58:45.814783
1953 09:58:45.821093 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1954 09:58:45.827993 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1955 09:58:45.835061 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1956 09:58:45.838104 Write Rank1 MR3 =0xb0
1957 09:58:45.838632 DramC Write-DBI on
1958 09:58:45.838965 ==
1959 09:58:45.844837 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1960 09:58:45.848336 fsp= 1, odt_onoff= 1, Byte mode= 0
1961 09:58:45.848843 ==
1962 09:58:45.851525 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1963 09:58:45.852033
1964 09:58:45.854831 Begin, DQ Scan Range 698~762
1965 09:58:45.855335
1966 09:58:45.855664
1967 09:58:45.858329 TX Vref Scan disable
1968 09:58:45.861557 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1969 09:58:45.865118 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1970 09:58:45.868161 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1971 09:58:45.871380 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1972 09:58:45.874950 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1973 09:58:45.878595 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1974 09:58:45.881764 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1975 09:58:45.885323 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1976 09:58:45.888502 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1977 09:58:45.891784 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1978 09:58:45.895025 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1979 09:58:45.898421 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1980 09:58:45.902057 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1981 09:58:45.905128 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1982 09:58:45.908367 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1983 09:58:45.911885 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1984 09:58:45.915008 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1985 09:58:45.918991 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1986 09:58:45.921919 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1987 09:58:45.930926 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1988 09:58:45.934732 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1989 09:58:45.937760 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1990 09:58:45.941178 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1991 09:58:45.944606 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1992 09:58:45.948256 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1993 09:58:45.951110 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1994 09:58:45.954541 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1995 09:58:45.958098 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1996 09:58:45.961258 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1997 09:58:45.964616 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1998 09:58:45.967756 Byte0, DQ PI dly=730, DQM PI dly= 730
1999 09:58:45.971156 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2000 09:58:45.971630
2001 09:58:45.977946 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2002 09:58:45.978510
2003 09:58:45.981553 Byte1, DQ PI dly=720, DQM PI dly= 720
2004 09:58:45.984823 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2005 09:58:45.985347
2006 09:58:45.988192 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2007 09:58:45.988697
2008 09:58:45.994730 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2009 09:58:46.001640 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2010 09:58:46.010010 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2011 09:58:46.013398 Write Rank1 MR3 =0x30
2012 09:58:46.013824 DramC Write-DBI off
2013 09:58:46.014146
2014 09:58:46.014505 [DATLAT]
2015 09:58:46.016887 Freq=1600, CH0 RK1, use_rxtx_scan=0
2016 09:58:46.017368
2017 09:58:46.020198 DATLAT Default: 0x10
2018 09:58:46.020620 7, 0xFFFF, sum=0
2019 09:58:46.023580 8, 0xFFFF, sum=0
2020 09:58:46.024005 9, 0xFFFF, sum=0
2021 09:58:46.027100 10, 0xFFFF, sum=0
2022 09:58:46.027533 11, 0xFFFF, sum=0
2023 09:58:46.030133 12, 0xFFFF, sum=0
2024 09:58:46.030597 13, 0xFFFF, sum=0
2025 09:58:46.033848 14, 0x0, sum=1
2026 09:58:46.034399 15, 0x0, sum=2
2027 09:58:46.037361 16, 0x0, sum=3
2028 09:58:46.037789 17, 0x0, sum=4
2029 09:58:46.040621 pattern=2 first_step=14 total pass=5 best_step=16
2030 09:58:46.041046 ==
2031 09:58:46.047458 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2032 09:58:46.050736 fsp= 1, odt_onoff= 1, Byte mode= 0
2033 09:58:46.051160 ==
2034 09:58:46.053993 Start DQ dly to find pass range UseTestEngine =1
2035 09:58:46.057395 x-axis: bit #, y-axis: DQ dly (-127~63)
2036 09:58:46.061207 RX Vref Scan = 0
2037 09:58:46.061718 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2038 09:58:46.064313 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2039 09:58:46.067676 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2040 09:58:46.070969 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2041 09:58:46.074284 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2042 09:58:46.077774 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2043 09:58:46.081185 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2044 09:58:46.084701 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2045 09:58:46.085223 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2046 09:58:46.088292 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2047 09:58:46.092302 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2048 09:58:46.096089 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2049 09:58:46.096521 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2050 09:58:46.099974 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2051 09:58:46.104309 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2052 09:58:46.108437 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2053 09:58:46.108870 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2054 09:58:46.111812 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2055 09:58:46.114986 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2056 09:58:46.118627 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2057 09:58:46.122122 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2058 09:58:46.122714 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2059 09:58:46.125219 -4, [0] xxxoxxxx xxxxxxxx [MSB]
2060 09:58:46.128328 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2061 09:58:46.132051 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2062 09:58:46.135336 -1, [0] xxxoxoxx xxxxxxxx [MSB]
2063 09:58:46.138650 0, [0] xxxoxoxx oxxoxxxx [MSB]
2064 09:58:46.139183 1, [0] xxxoxoxx oxxoxxxx [MSB]
2065 09:58:46.142068 2, [0] xxxoxoox oxxoxoox [MSB]
2066 09:58:46.145300 3, [0] xxxoxooo ooxooooo [MSB]
2067 09:58:46.148587 4, [0] xxxoxooo ooxooooo [MSB]
2068 09:58:46.152037 5, [0] xoxoxooo ooxooooo [MSB]
2069 09:58:46.155358 6, [0] xoxoxooo oooooooo [MSB]
2070 09:58:46.155829 7, [0] ooxooooo oooooooo [MSB]
2071 09:58:46.160210 32, [0] oooxoooo oooooooo [MSB]
2072 09:58:46.163574 33, [0] oooxoooo oooooooo [MSB]
2073 09:58:46.167061 34, [0] oooxoxoo oooooxoo [MSB]
2074 09:58:46.170352 35, [0] oooxoxxx oooxoxxo [MSB]
2075 09:58:46.174749 36, [0] oooxoxxx xooxoxxo [MSB]
2076 09:58:46.175202 37, [0] oooxoxxx xxoxxxxo [MSB]
2077 09:58:46.177812 38, [0] oooxoxxx xxoxxxxx [MSB]
2078 09:58:46.181342 39, [0] oooxoxxx xxoxxxxx [MSB]
2079 09:58:46.184531 40, [0] ooxxoxxx xxxxxxxx [MSB]
2080 09:58:46.187764 41, [0] oxxxxxxx xxxxxxxx [MSB]
2081 09:58:46.190979 42, [0] xxxxxxxx xxxxxxxx [MSB]
2082 09:58:46.194440 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
2083 09:58:46.197910 iDelay=42, Bit 1, Center 22 (5 ~ 40) 36
2084 09:58:46.201364 iDelay=42, Bit 2, Center 23 (8 ~ 39) 32
2085 09:58:46.204451 iDelay=42, Bit 3, Center 13 (-4 ~ 31) 36
2086 09:58:46.207813 iDelay=42, Bit 4, Center 23 (7 ~ 40) 34
2087 09:58:46.211235 iDelay=42, Bit 5, Center 16 (-1 ~ 33) 35
2088 09:58:46.214238 iDelay=42, Bit 6, Center 18 (2 ~ 34) 33
2089 09:58:46.217688 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
2090 09:58:46.221323 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2091 09:58:46.224650 iDelay=42, Bit 9, Center 19 (3 ~ 36) 34
2092 09:58:46.228193 iDelay=42, Bit 10, Center 22 (6 ~ 39) 34
2093 09:58:46.231793 iDelay=42, Bit 11, Center 17 (0 ~ 34) 35
2094 09:58:46.234830 iDelay=42, Bit 12, Center 19 (3 ~ 36) 34
2095 09:58:46.238361 iDelay=42, Bit 13, Center 17 (2 ~ 33) 32
2096 09:58:46.245141 iDelay=42, Bit 14, Center 18 (2 ~ 34) 33
2097 09:58:46.248634 iDelay=42, Bit 15, Center 20 (3 ~ 37) 35
2098 09:58:46.248783 ==
2099 09:58:46.251689 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2100 09:58:46.255301 fsp= 1, odt_onoff= 1, Byte mode= 0
2101 09:58:46.255441 ==
2102 09:58:46.255524 DQS Delay:
2103 09:58:46.258243 DQS0 = 0, DQS1 = 0
2104 09:58:46.258381 DQM Delay:
2105 09:58:46.261884 DQM0 = 19, DQM1 = 18
2106 09:58:46.262055 DQ Delay:
2107 09:58:46.265023 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13
2108 09:58:46.268355 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
2109 09:58:46.271537 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
2110 09:58:46.275004 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
2111 09:58:46.275222
2112 09:58:46.275341
2113 09:58:46.275449
2114 09:58:46.278193 [DramC_TX_OE_Calibration] TA2
2115 09:58:46.281755 Original DQ_B0 (3 6) =30, OEN = 27
2116 09:58:46.285349 Original DQ_B1 (3 6) =30, OEN = 27
2117 09:58:46.288482 23, 0x0, End_B0=23 End_B1=23
2118 09:58:46.288765 24, 0x0, End_B0=24 End_B1=24
2119 09:58:46.291866 25, 0x0, End_B0=25 End_B1=25
2120 09:58:46.295845 26, 0x0, End_B0=26 End_B1=26
2121 09:58:46.298820 27, 0x0, End_B0=27 End_B1=27
2122 09:58:46.299160 28, 0x0, End_B0=28 End_B1=28
2123 09:58:46.302403 29, 0x0, End_B0=29 End_B1=29
2124 09:58:46.305736 30, 0x0, End_B0=30 End_B1=30
2125 09:58:46.308816 31, 0xFFFF, End_B0=30 End_B1=30
2126 09:58:46.312247 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2127 09:58:46.319004 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2128 09:58:46.319435
2129 09:58:46.319765
2130 09:58:46.322380 Write Rank1 MR23 =0x3f
2131 09:58:46.322811 [DQSOSC]
2132 09:58:46.329027 [DQSOSCAuto] RK1, (LSB)MR18= 0x8c, (MSB)MR19= 0x3, tDQSOscB0 = 346 ps tDQSOscB1 = 0 ps
2133 09:58:46.336130 CH0_RK1: MR19=0x3, MR18=0x8C, DQSOSC=346, MR23=63, INC=20, DEC=30
2134 09:58:46.339294 Write Rank1 MR23 =0x3f
2135 09:58:46.339730 [DQSOSC]
2136 09:58:46.345949 [DQSOSCAuto] RK1, (LSB)MR18= 0x8d, (MSB)MR19= 0x3, tDQSOscB0 = 346 ps tDQSOscB1 = 0 ps
2137 09:58:46.349181 CH0 RK1: MR19=3, MR18=8D
2138 09:58:46.352702 [RxdqsGatingPostProcess] freq 1600
2139 09:58:46.356156 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2140 09:58:46.359635 Rank: 0
2141 09:58:46.360145 best DQS0 dly(2T, 0.5T) = (2, 5)
2142 09:58:46.362828 best DQS1 dly(2T, 0.5T) = (2, 5)
2143 09:58:46.366430 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2144 09:58:46.369536 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2145 09:58:46.372682 Rank: 1
2146 09:58:46.373110 best DQS0 dly(2T, 0.5T) = (2, 6)
2147 09:58:46.376531 best DQS1 dly(2T, 0.5T) = (2, 6)
2148 09:58:46.379710 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2149 09:58:46.383318 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2150 09:58:46.389639 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2151 09:58:46.393246 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2152 09:58:46.396357 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2153 09:58:46.399817 Write Rank0 MR13 =0x59
2154 09:58:46.400357 ==
2155 09:58:46.403192 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2156 09:58:46.406487 fsp= 1, odt_onoff= 1, Byte mode= 0
2157 09:58:46.406944 ==
2158 09:58:46.409872 === u2Vref_new: 0x56 --> 0x3a
2159 09:58:46.413332 === u2Vref_new: 0x58 --> 0x58
2160 09:58:46.416512 === u2Vref_new: 0x5a --> 0x5a
2161 09:58:46.419801 === u2Vref_new: 0x5c --> 0x78
2162 09:58:46.423300 === u2Vref_new: 0x5e --> 0x7a
2163 09:58:46.426552 === u2Vref_new: 0x60 --> 0x90
2164 09:58:46.427131
2165 09:58:46.429922 CBT Vref found, early break!
2166 09:58:46.430390 [CA 0] Center 37 (12~63) winsize 52
2167 09:58:46.433315 [CA 1] Center 36 (9~63) winsize 55
2168 09:58:46.436844 [CA 2] Center 33 (4~63) winsize 60
2169 09:58:46.439926 [CA 3] Center 33 (4~63) winsize 60
2170 09:58:46.443221 [CA 4] Center 34 (6~63) winsize 58
2171 09:58:46.446429 [CA 5] Center 28 (-1~57) winsize 59
2172 09:58:46.446852
2173 09:58:46.450591 [CATrainingPosCal] consider 1 rank data
2174 09:58:46.453184 u2DelayCellTimex100 = 753/100 ps
2175 09:58:46.456676 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2176 09:58:46.460579 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2177 09:58:46.463690 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2178 09:58:46.469968 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2179 09:58:46.473406 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2180 09:58:46.476917 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2181 09:58:46.477422
2182 09:58:46.480185 CA PerBit enable=1, Macro0, CA PI delay=28
2183 09:58:46.483265 === u2Vref_new: 0x56 --> 0x3a
2184 09:58:46.483721
2185 09:58:46.484055 Vref(ca) range 1: 22
2186 09:58:46.484361
2187 09:58:46.486980 CS Dly= 12 (43-0-32)
2188 09:58:46.490604 Write Rank0 MR13 =0xd8
2189 09:58:46.491109 Write Rank0 MR13 =0xd8
2190 09:58:46.493823 Write Rank0 MR12 =0x56
2191 09:58:46.494400 Write Rank1 MR13 =0x59
2192 09:58:46.496775 ==
2193 09:58:46.500449 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2194 09:58:46.503686 fsp= 1, odt_onoff= 1, Byte mode= 0
2195 09:58:46.504110 ==
2196 09:58:46.507029 === u2Vref_new: 0x56 --> 0x3a
2197 09:58:46.510522 === u2Vref_new: 0x58 --> 0x58
2198 09:58:46.513612 === u2Vref_new: 0x5a --> 0x5a
2199 09:58:46.517081 === u2Vref_new: 0x5c --> 0x78
2200 09:58:46.517579 === u2Vref_new: 0x5e --> 0x7a
2201 09:58:46.520915
2202 09:58:46.521362 CBT Vref found, early break!
2203 09:58:46.524292 [CA 0] Center 37 (12~63) winsize 52
2204 09:58:46.527741 [CA 1] Center 35 (8~63) winsize 56
2205 09:58:46.530849 [CA 2] Center 33 (4~63) winsize 60
2206 09:58:46.534038 [CA 3] Center 33 (4~63) winsize 60
2207 09:58:46.537442 [CA 4] Center 35 (7~63) winsize 57
2208 09:58:46.540751 [CA 5] Center 27 (-2~57) winsize 60
2209 09:58:46.541216
2210 09:58:46.544192 [CATrainingPosCal] consider 2 rank data
2211 09:58:46.547685 u2DelayCellTimex100 = 753/100 ps
2212 09:58:46.550939 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2213 09:58:46.554288 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2214 09:58:46.557605 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2215 09:58:46.560793 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2216 09:58:46.564290 CA4 delay=35 (7~63),Diff = 7 PI (9 cell)
2217 09:58:46.567474 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2218 09:58:46.570976
2219 09:58:46.574306 CA PerBit enable=1, Macro0, CA PI delay=28
2220 09:58:46.574645 === u2Vref_new: 0x56 --> 0x3a
2221 09:58:46.574874
2222 09:58:46.577684 Vref(ca) range 1: 22
2223 09:58:46.577977
2224 09:58:46.581261 CS Dly= 12 (43-0-32)
2225 09:58:46.581636 Write Rank1 MR13 =0xd8
2226 09:58:46.584353 Write Rank1 MR13 =0xd8
2227 09:58:46.587989 Write Rank1 MR12 =0x56
2228 09:58:46.591327 [RankSwap] Rank num 2, (Multi 1), Rank 0
2229 09:58:46.591790 Write Rank0 MR2 =0xad
2230 09:58:46.594689 [Write Leveling]
2231 09:58:46.597936 delay byte0 byte1 byte2 byte3
2232 09:58:46.598526
2233 09:58:46.599004 10 0 0
2234 09:58:46.599472 11 0 0
2235 09:58:46.601172 12 0 0
2236 09:58:46.601593 13 0 0
2237 09:58:46.604920 14 0 0
2238 09:58:46.605428 15 0 0
2239 09:58:46.605885 16 0 0
2240 09:58:46.608102 17 0 0
2241 09:58:46.608588 18 0 0
2242 09:58:46.611292 19 0 0
2243 09:58:46.611716 20 0 0
2244 09:58:46.614838 21 0 0
2245 09:58:46.615262 22 0 0
2246 09:58:46.615592 23 0 0
2247 09:58:46.618051 24 0 0
2248 09:58:46.618522 25 0 0
2249 09:58:46.621697 26 0 0
2250 09:58:46.622355 27 0 0
2251 09:58:46.622703 28 0 0
2252 09:58:46.624791 29 0 0
2253 09:58:46.625214 30 0 0
2254 09:58:46.628039 31 0 0
2255 09:58:46.628510 32 0 0
2256 09:58:46.631627 33 0 ff
2257 09:58:46.632066 34 0 ff
2258 09:58:46.632400 35 0 ff
2259 09:58:46.634827 36 0 ff
2260 09:58:46.635249 37 ff ff
2261 09:58:46.638635 38 ff ff
2262 09:58:46.639149 39 ff ff
2263 09:58:46.641838 40 ff ff
2264 09:58:46.642322 41 ff ff
2265 09:58:46.644878 42 ff ff
2266 09:58:46.645301 43 ff ff
2267 09:58:46.648219 pass bytecount = 0xff (0xff: all bytes pass)
2268 09:58:46.648651
2269 09:58:46.651612 DQS0 dly: 37
2270 09:58:46.652115 DQS1 dly: 33
2271 09:58:46.654937 Write Rank0 MR2 =0x2d
2272 09:58:46.658078 [RankSwap] Rank num 2, (Multi 1), Rank 0
2273 09:58:46.658718 Write Rank0 MR1 =0xd6
2274 09:58:46.661555 [Gating]
2275 09:58:46.661970 ==
2276 09:58:46.665059 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2277 09:58:46.668290 fsp= 1, odt_onoff= 1, Byte mode= 0
2278 09:58:46.668791 ==
2279 09:58:46.671682 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2280 09:58:46.678370 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2281 09:58:46.682281 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2282 09:58:46.685149 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2283 09:58:46.692008 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2284 09:58:46.695369 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2285 09:58:46.699029 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2286 09:58:46.705562 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2287 09:58:46.708901 3 2 0 |1211 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2288 09:58:46.712239 3 2 4 |3d3d 1b1b |(11 11)(11 11) |(1 1)(0 0)| 0
2289 09:58:46.715595 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2290 09:58:46.722036 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2291 09:58:46.725516 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2292 09:58:46.728914 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2293 09:58:46.735777 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2294 09:58:46.738938 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2295 09:58:46.742342 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2296 09:58:46.746003 3 3 4 |605 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2297 09:58:46.752381 [Byte 0] Lead/lag Transition tap number (1)
2298 09:58:46.756191 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2299 09:58:46.759281 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2300 09:58:46.765940 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2301 09:58:46.769286 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2302 09:58:46.772728 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2303 09:58:46.776220 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2304 09:58:46.782423 3 4 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2305 09:58:46.785885 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2306 09:58:46.789531 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2307 09:58:46.796165 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2308 09:58:46.799620 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2309 09:58:46.802605 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2310 09:58:46.809740 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2311 09:58:46.812903 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2312 09:58:46.816339 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2313 09:58:46.819272 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2314 09:58:46.826103 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2315 09:58:46.829820 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2316 09:58:46.832816 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2317 09:58:46.839620 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2318 09:58:46.842878 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2319 09:58:46.846249 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2320 09:58:46.849632 [Byte 0] Lead/lag Transition tap number (2)
2321 09:58:46.856514 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2322 09:58:46.859678 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2323 09:58:46.863214 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2324 09:58:46.866530 [Byte 1] Lead/lag Transition tap number (3)
2325 09:58:46.873006 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2326 09:58:46.873505 [Byte 0]First pass (3, 6, 4)
2327 09:58:46.879708 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2328 09:58:46.883045 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2329 09:58:46.886712 [Byte 1]First pass (3, 6, 12)
2330 09:58:46.889761 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2331 09:58:46.893123 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2332 09:58:46.896885 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2333 09:58:46.899758 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2334 09:58:46.906624 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2335 09:58:46.909577 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2336 09:58:46.913389 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2337 09:58:46.916495 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2338 09:58:46.919704 All bytes gating window > 1UI, Early break!
2339 09:58:46.920128
2340 09:58:46.926669 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2341 09:58:46.927169
2342 09:58:46.930124 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2343 09:58:46.930686
2344 09:58:46.931017
2345 09:58:46.931316
2346 09:58:46.933068 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2347 09:58:46.933492
2348 09:58:46.936804 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2349 09:58:46.937308
2350 09:58:46.937633
2351 09:58:46.939852 Write Rank0 MR1 =0x56
2352 09:58:46.940352
2353 09:58:46.943498 best RODT dly(2T, 0.5T) = (2, 2)
2354 09:58:46.943920
2355 09:58:46.946491 best RODT dly(2T, 0.5T) = (2, 2)
2356 09:58:46.946915 ==
2357 09:58:46.950278 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2358 09:58:46.953128 fsp= 1, odt_onoff= 1, Byte mode= 0
2359 09:58:46.953553 ==
2360 09:58:46.960316 Start DQ dly to find pass range UseTestEngine =0
2361 09:58:46.963268 x-axis: bit #, y-axis: DQ dly (-127~63)
2362 09:58:46.963773 RX Vref Scan = 0
2363 09:58:46.966406 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2364 09:58:46.970001 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2365 09:58:46.973077 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2366 09:58:46.976593 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2367 09:58:46.979902 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2368 09:58:46.983198 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2369 09:58:46.983711 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2370 09:58:46.986494 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2371 09:58:46.989848 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2372 09:58:46.993281 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2373 09:58:46.996571 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2374 09:58:46.999703 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2375 09:58:47.003050 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2376 09:58:47.006321 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2377 09:58:47.006756 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2378 09:58:47.009512 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2379 09:58:47.013096 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2380 09:58:47.016389 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2381 09:58:47.019718 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2382 09:58:47.023203 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2383 09:58:47.026376 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2384 09:58:47.026816 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2385 09:58:47.029547 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2386 09:58:47.033010 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2387 09:58:47.036335 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2388 09:58:47.039944 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2389 09:58:47.043312 0, [0] xxxoxxxx xxxxxxxo [MSB]
2390 09:58:47.046102 1, [0] xxxoxxxx xxxxxxxo [MSB]
2391 09:58:47.046587 2, [0] xxooxxxx xxoxxxxo [MSB]
2392 09:58:47.049788 3, [0] xxoooxxo oooxxxxo [MSB]
2393 09:58:47.052973 4, [0] xxoooxxo ooooxooo [MSB]
2394 09:58:47.056061 5, [0] xooooxxo oooooooo [MSB]
2395 09:58:47.059721 6, [0] xooooxxo oooooooo [MSB]
2396 09:58:47.063012 31, [0] oooxoooo oooooooo [MSB]
2397 09:58:47.063537 32, [0] ooxxoooo ooooooox [MSB]
2398 09:58:47.066510 33, [0] ooxxoooo oxooooox [MSB]
2399 09:58:47.069820 34, [0] ooxxoooo oxxxooox [MSB]
2400 09:58:47.073039 35, [0] ooxxoooo oxxxooxx [MSB]
2401 09:58:47.076189 36, [0] ooxxxoox xxxxoxxx [MSB]
2402 09:58:47.079166 37, [0] ooxxxoox xxxxoxxx [MSB]
2403 09:58:47.083072 38, [0] ooxxxoox xxxxoxxx [MSB]
2404 09:58:47.083586 39, [0] ooxxxoox xxxxxxxx [MSB]
2405 09:58:47.086126 40, [0] ooxxxoox xxxxxxxx [MSB]
2406 09:58:47.089606 41, [0] xxxxxxxx xxxxxxxx [MSB]
2407 09:58:47.093082 iDelay=41, Bit 0, Center 23 (7 ~ 40) 34
2408 09:58:47.096098 iDelay=41, Bit 1, Center 22 (5 ~ 40) 36
2409 09:58:47.099554 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2410 09:58:47.102777 iDelay=41, Bit 3, Center 15 (0 ~ 30) 31
2411 09:58:47.106347 iDelay=41, Bit 4, Center 19 (3 ~ 35) 33
2412 09:58:47.112925 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2413 09:58:47.115924 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2414 09:58:47.119507 iDelay=41, Bit 7, Center 19 (3 ~ 35) 33
2415 09:58:47.122789 iDelay=41, Bit 8, Center 19 (3 ~ 35) 33
2416 09:58:47.125922 iDelay=41, Bit 9, Center 17 (3 ~ 32) 30
2417 09:58:47.129211 iDelay=41, Bit 10, Center 17 (2 ~ 33) 32
2418 09:58:47.132502 iDelay=41, Bit 11, Center 18 (4 ~ 33) 30
2419 09:58:47.136228 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2420 09:58:47.139731 iDelay=41, Bit 13, Center 19 (4 ~ 35) 32
2421 09:58:47.142465 iDelay=41, Bit 14, Center 19 (4 ~ 34) 31
2422 09:58:47.146392 iDelay=41, Bit 15, Center 14 (-2 ~ 31) 34
2423 09:58:47.146900 ==
2424 09:58:47.152802 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2425 09:58:47.155995 fsp= 1, odt_onoff= 1, Byte mode= 0
2426 09:58:47.156419 ==
2427 09:58:47.156742 DQS Delay:
2428 09:58:47.159428 DQS0 = 0, DQS1 = 0
2429 09:58:47.159933 DQM Delay:
2430 09:58:47.162913 DQM0 = 20, DQM1 = 18
2431 09:58:47.163472 DQ Delay:
2432 09:58:47.166247 DQ0 =23, DQ1 =22, DQ2 =16, DQ3 =15
2433 09:58:47.169781 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =19
2434 09:58:47.173008 DQ8 =19, DQ9 =17, DQ10 =17, DQ11 =18
2435 09:58:47.175991 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =14
2436 09:58:47.176515
2437 09:58:47.176989
2438 09:58:47.177440 DramC Write-DBI off
2439 09:58:47.177921 ==
2440 09:58:47.183064 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2441 09:58:47.186268 fsp= 1, odt_onoff= 1, Byte mode= 0
2442 09:58:47.186700 ==
2443 09:58:47.189414 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2444 09:58:47.189935
2445 09:58:47.192922 Begin, DQ Scan Range 929~1185
2446 09:58:47.193430
2447 09:58:47.193760
2448 09:58:47.195843 TX Vref Scan disable
2449 09:58:47.199604 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2450 09:58:47.202706 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2451 09:58:47.206040 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2452 09:58:47.209494 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2453 09:58:47.213155 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2454 09:58:47.216038 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2455 09:58:47.219459 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2456 09:58:47.222906 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2457 09:58:47.226080 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2458 09:58:47.229281 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2459 09:58:47.232634 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2460 09:58:47.239370 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2461 09:58:47.242977 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2462 09:58:47.246326 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2463 09:58:47.249576 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2464 09:58:47.252618 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2465 09:58:47.255826 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2466 09:58:47.259264 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2467 09:58:47.262922 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2468 09:58:47.266353 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2469 09:58:47.269296 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2470 09:58:47.272755 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2471 09:58:47.275956 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2472 09:58:47.279518 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2473 09:58:47.282832 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2474 09:58:47.286137 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2475 09:58:47.289358 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2476 09:58:47.293155 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2477 09:58:47.299544 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2478 09:58:47.302700 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2479 09:58:47.306196 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2480 09:58:47.309997 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2481 09:58:47.313029 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2482 09:58:47.316238 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2483 09:58:47.319813 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2484 09:58:47.322721 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2485 09:58:47.326393 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2486 09:58:47.329508 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2487 09:58:47.332802 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2488 09:58:47.336265 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2489 09:58:47.339586 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2490 09:58:47.342946 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2491 09:58:47.346457 971 |3 6 11|[0] xxxxxxxx ooooxxxo [MSB]
2492 09:58:47.349729 972 |3 6 12|[0] xxxoxxxx ooooxooo [MSB]
2493 09:58:47.352874 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2494 09:58:47.356362 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2495 09:58:47.359381 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
2496 09:58:47.362838 976 |3 6 16|[0] xooooxxo oooooooo [MSB]
2497 09:58:47.371593 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2498 09:58:47.374894 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2499 09:58:47.378398 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2500 09:58:47.381504 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2501 09:58:47.384917 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2502 09:58:47.388669 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2503 09:58:47.391421 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2504 09:58:47.394958 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2505 09:58:47.398255 Byte0, DQ PI dly=984, DQM PI dly= 984
2506 09:58:47.401751 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2507 09:58:47.402345
2508 09:58:47.408130 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2509 09:58:47.408634
2510 09:58:47.411819 Byte1, DQ PI dly=981, DQM PI dly= 981
2511 09:58:47.415141 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2512 09:58:47.415720
2513 09:58:47.418370 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2514 09:58:47.418888
2515 09:58:47.419222 ==
2516 09:58:47.424860 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2517 09:58:47.428531 fsp= 1, odt_onoff= 1, Byte mode= 0
2518 09:58:47.429042 ==
2519 09:58:47.431715 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2520 09:58:47.432247
2521 09:58:47.434866 Begin, DQ Scan Range 957~1021
2522 09:58:47.438034 Write Rank0 MR14 =0x0
2523 09:58:47.445393
2524 09:58:47.445829 CH=1, VrefRange= 0, VrefLevel = 0
2525 09:58:47.452117 TX Bit0 (979~997) 19 988, Bit8 (972~991) 20 981,
2526 09:58:47.455187 TX Bit1 (978~995) 18 986, Bit9 (972~990) 19 981,
2527 09:58:47.462085 TX Bit2 (977~991) 15 984, Bit10 (974~990) 17 982,
2528 09:58:47.465438 TX Bit3 (975~990) 16 982, Bit11 (975~991) 17 983,
2529 09:58:47.468630 TX Bit4 (977~993) 17 985, Bit12 (976~992) 17 984,
2530 09:58:47.475352 TX Bit5 (979~997) 19 988, Bit13 (975~991) 17 983,
2531 09:58:47.478693 TX Bit6 (980~997) 18 988, Bit14 (976~991) 16 983,
2532 09:58:47.482026 TX Bit7 (977~992) 16 984, Bit15 (970~987) 18 978,
2533 09:58:47.482489
2534 09:58:47.485275 Write Rank0 MR14 =0x2
2535 09:58:47.493678
2536 09:58:47.494190 CH=1, VrefRange= 0, VrefLevel = 2
2537 09:58:47.500408 TX Bit0 (979~997) 19 988, Bit8 (972~991) 20 981,
2538 09:58:47.503946 TX Bit1 (978~996) 19 987, Bit9 (971~989) 19 980,
2539 09:58:47.510864 TX Bit2 (976~991) 16 983, Bit10 (974~990) 17 982,
2540 09:58:47.513923 TX Bit3 (975~990) 16 982, Bit11 (975~992) 18 983,
2541 09:58:47.517115 TX Bit4 (977~993) 17 985, Bit12 (975~992) 18 983,
2542 09:58:47.523818 TX Bit5 (978~998) 21 988, Bit13 (975~991) 17 983,
2543 09:58:47.527120 TX Bit6 (978~998) 21 988, Bit14 (975~991) 17 983,
2544 09:58:47.530603 TX Bit7 (977~992) 16 984, Bit15 (970~988) 19 979,
2545 09:58:47.531037
2546 09:58:47.533568 Write Rank0 MR14 =0x4
2547 09:58:47.542135
2548 09:58:47.542591 CH=1, VrefRange= 0, VrefLevel = 4
2549 09:58:47.548810 TX Bit0 (978~998) 21 988, Bit8 (971~991) 21 981,
2550 09:58:47.552034 TX Bit1 (977~996) 20 986, Bit9 (971~991) 21 981,
2551 09:58:47.558593 TX Bit2 (976~991) 16 983, Bit10 (973~991) 19 982,
2552 09:58:47.561975 TX Bit3 (975~991) 17 983, Bit11 (975~992) 18 983,
2553 09:58:47.565520 TX Bit4 (977~994) 18 985, Bit12 (975~992) 18 983,
2554 09:58:47.572404 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2555 09:58:47.575515 TX Bit6 (978~998) 21 988, Bit14 (975~991) 17 983,
2556 09:58:47.578941 TX Bit7 (977~993) 17 985, Bit15 (970~988) 19 979,
2557 09:58:47.579366
2558 09:58:47.582071 Write Rank0 MR14 =0x6
2559 09:58:47.590930
2560 09:58:47.591432 CH=1, VrefRange= 0, VrefLevel = 6
2561 09:58:47.597232 TX Bit0 (978~998) 21 988, Bit8 (971~991) 21 981,
2562 09:58:47.600594 TX Bit1 (977~997) 21 987, Bit9 (971~991) 21 981,
2563 09:58:47.607173 TX Bit2 (976~992) 17 984, Bit10 (973~991) 19 982,
2564 09:58:47.610699 TX Bit3 (974~991) 18 982, Bit11 (975~992) 18 983,
2565 09:58:47.613831 TX Bit4 (976~994) 19 985, Bit12 (975~993) 19 984,
2566 09:58:47.620763 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2567 09:58:47.623950 TX Bit6 (978~998) 21 988, Bit14 (974~991) 18 982,
2568 09:58:47.627153 TX Bit7 (977~993) 17 985, Bit15 (969~990) 22 979,
2569 09:58:47.627580
2570 09:58:47.630442 Write Rank0 MR14 =0x8
2571 09:58:47.638935
2572 09:58:47.639354 CH=1, VrefRange= 0, VrefLevel = 8
2573 09:58:47.646098 TX Bit0 (978~998) 21 988, Bit8 (971~992) 22 981,
2574 09:58:47.649244 TX Bit1 (977~997) 21 987, Bit9 (970~991) 22 980,
2575 09:58:47.656167 TX Bit2 (976~992) 17 984, Bit10 (972~992) 21 982,
2576 09:58:47.659021 TX Bit3 (974~992) 19 983, Bit11 (974~992) 19 983,
2577 09:58:47.662552 TX Bit4 (976~995) 20 985, Bit12 (974~993) 20 983,
2578 09:58:47.669157 TX Bit5 (978~998) 21 988, Bit13 (975~992) 18 983,
2579 09:58:47.672716 TX Bit6 (978~998) 21 988, Bit14 (974~992) 19 983,
2580 09:58:47.675624 TX Bit7 (977~994) 18 985, Bit15 (969~990) 22 979,
2581 09:58:47.676087
2582 09:58:47.678906 Write Rank0 MR14 =0xa
2583 09:58:47.687489
2584 09:58:47.690800 CH=1, VrefRange= 0, VrefLevel = 10
2585 09:58:47.694383 TX Bit0 (978~999) 22 988, Bit8 (970~992) 23 981,
2586 09:58:47.697605 TX Bit1 (977~997) 21 987, Bit9 (970~991) 22 980,
2587 09:58:47.704723 TX Bit2 (976~992) 17 984, Bit10 (972~992) 21 982,
2588 09:58:47.707828 TX Bit3 (974~992) 19 983, Bit11 (973~992) 20 982,
2589 09:58:47.711131 TX Bit4 (976~996) 21 986, Bit12 (974~993) 20 983,
2590 09:58:47.717736 TX Bit5 (977~999) 23 988, Bit13 (973~992) 20 982,
2591 09:58:47.721327 TX Bit6 (978~999) 22 988, Bit14 (973~992) 20 982,
2592 09:58:47.724187 TX Bit7 (977~995) 19 986, Bit15 (969~991) 23 980,
2593 09:58:47.724617
2594 09:58:47.727365 Write Rank0 MR14 =0xc
2595 09:58:47.736576
2596 09:58:47.739683 CH=1, VrefRange= 0, VrefLevel = 12
2597 09:58:47.742721 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2598 09:58:47.746077 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2599 09:58:47.752955 TX Bit2 (975~993) 19 984, Bit10 (971~992) 22 981,
2600 09:58:47.756046 TX Bit3 (973~992) 20 982, Bit11 (972~993) 22 982,
2601 09:58:47.759345 TX Bit4 (976~997) 22 986, Bit12 (973~994) 22 983,
2602 09:58:47.766680 TX Bit5 (977~999) 23 988, Bit13 (973~993) 21 983,
2603 09:58:47.770046 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
2604 09:58:47.773101 TX Bit7 (976~995) 20 985, Bit15 (969~991) 23 980,
2605 09:58:47.773636
2606 09:58:47.776060 Write Rank0 MR14 =0xe
2607 09:58:47.785048
2608 09:58:47.788392 CH=1, VrefRange= 0, VrefLevel = 14
2609 09:58:47.791837 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2610 09:58:47.794898 TX Bit1 (976~998) 23 987, Bit9 (970~992) 23 981,
2611 09:58:47.801750 TX Bit2 (975~994) 20 984, Bit10 (971~992) 22 981,
2612 09:58:47.805369 TX Bit3 (973~993) 21 983, Bit11 (972~993) 22 982,
2613 09:58:47.808599 TX Bit4 (976~997) 22 986, Bit12 (973~993) 21 983,
2614 09:58:47.815076 TX Bit5 (977~999) 23 988, Bit13 (972~993) 22 982,
2615 09:58:47.818664 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
2616 09:58:47.822099 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
2617 09:58:47.822654
2618 09:58:47.825051 Write Rank0 MR14 =0x10
2619 09:58:47.833727
2620 09:58:47.837313 CH=1, VrefRange= 0, VrefLevel = 16
2621 09:58:47.840686 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2622 09:58:47.844050 TX Bit1 (977~998) 22 987, Bit9 (970~992) 23 981,
2623 09:58:47.850642 TX Bit2 (975~994) 20 984, Bit10 (971~992) 22 981,
2624 09:58:47.853672 TX Bit3 (972~994) 23 983, Bit11 (972~993) 22 982,
2625 09:58:47.857349 TX Bit4 (975~997) 23 986, Bit12 (972~994) 23 983,
2626 09:58:47.863561 TX Bit5 (977~999) 23 988, Bit13 (972~993) 22 982,
2627 09:58:47.867046 TX Bit6 (977~999) 23 988, Bit14 (972~992) 21 982,
2628 09:58:47.870483 TX Bit7 (976~997) 22 986, Bit15 (968~991) 24 979,
2629 09:58:47.870986
2630 09:58:47.873967 Write Rank0 MR14 =0x12
2631 09:58:47.882558
2632 09:58:47.885711 CH=1, VrefRange= 0, VrefLevel = 18
2633 09:58:47.889388 TX Bit0 (977~1000) 24 988, Bit8 (970~993) 24 981,
2634 09:58:47.892936 TX Bit1 (976~999) 24 987, Bit9 (970~992) 23 981,
2635 09:58:47.900288 TX Bit2 (974~995) 22 984, Bit10 (971~993) 23 982,
2636 09:58:47.902739 TX Bit3 (972~994) 23 983, Bit11 (971~994) 24 982,
2637 09:58:47.906158 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2638 09:58:47.912922 TX Bit5 (977~1000) 24 988, Bit13 (972~994) 23 983,
2639 09:58:47.915997 TX Bit6 (977~1000) 24 988, Bit14 (972~993) 22 982,
2640 09:58:47.919533 TX Bit7 (976~997) 22 986, Bit15 (969~992) 24 980,
2641 09:58:47.920044
2642 09:58:47.922546 Write Rank0 MR14 =0x14
2643 09:58:47.931862
2644 09:58:47.935158 CH=1, VrefRange= 0, VrefLevel = 20
2645 09:58:47.938428 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2646 09:58:47.941906 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2647 09:58:47.948510 TX Bit2 (974~996) 23 985, Bit10 (970~993) 24 981,
2648 09:58:47.951772 TX Bit3 (972~995) 24 983, Bit11 (971~994) 24 982,
2649 09:58:47.955549 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2650 09:58:47.962019 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2651 09:58:47.965281 TX Bit6 (977~1000) 24 988, Bit14 (971~993) 23 982,
2652 09:58:47.968610 TX Bit7 (975~997) 23 986, Bit15 (968~992) 25 980,
2653 09:58:47.971519
2654 09:58:47.971941 Write Rank0 MR14 =0x16
2655 09:58:47.981015
2656 09:58:47.984122 CH=1, VrefRange= 0, VrefLevel = 22
2657 09:58:47.987344 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2658 09:58:47.991144 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2659 09:58:47.997537 TX Bit2 (974~997) 24 985, Bit10 (970~993) 24 981,
2660 09:58:48.000521 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
2661 09:58:48.004137 TX Bit4 (975~998) 24 986, Bit12 (972~995) 24 983,
2662 09:58:48.010955 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2663 09:58:48.014131 TX Bit6 (976~1000) 25 988, Bit14 (971~993) 23 982,
2664 09:58:48.017290 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2665 09:58:48.017714
2666 09:58:48.020877 Write Rank0 MR14 =0x18
2667 09:58:48.030089
2668 09:58:48.033487 CH=1, VrefRange= 0, VrefLevel = 24
2669 09:58:48.036767 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2670 09:58:48.039813 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2671 09:58:48.046398 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2672 09:58:48.050070 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
2673 09:58:48.053519 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2674 09:58:48.060065 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2675 09:58:48.063045 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2676 09:58:48.066754 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2677 09:58:48.070082
2678 09:58:48.070611 Write Rank0 MR14 =0x1a
2679 09:58:48.079405
2680 09:58:48.082425 CH=1, VrefRange= 0, VrefLevel = 26
2681 09:58:48.085640 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2682 09:58:48.089579 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2683 09:58:48.096379 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2684 09:58:48.099184 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
2685 09:58:48.102597 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2686 09:58:48.109540 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2687 09:58:48.112862 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2688 09:58:48.115946 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2689 09:58:48.118946
2690 09:58:48.119445 Write Rank0 MR14 =0x1c
2691 09:58:48.128295
2692 09:58:48.131479 CH=1, VrefRange= 0, VrefLevel = 28
2693 09:58:48.134878 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2694 09:58:48.138590 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2695 09:58:48.145457 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2696 09:58:48.148198 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
2697 09:58:48.151516 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2698 09:58:48.158312 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2699 09:58:48.161398 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2700 09:58:48.165226 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2701 09:58:48.168318
2702 09:58:48.168819 Write Rank0 MR14 =0x1e
2703 09:58:48.177588
2704 09:58:48.180483 CH=1, VrefRange= 0, VrefLevel = 30
2705 09:58:48.184268 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2706 09:58:48.187450 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2707 09:58:48.194287 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2708 09:58:48.197342 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
2709 09:58:48.200672 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2710 09:58:48.207524 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2711 09:58:48.210472 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2712 09:58:48.214027 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2713 09:58:48.217455
2714 09:58:48.221083 wait MRW command Rank0 MR14 =0x20 fired (1)
2715 09:58:48.221594 Write Rank0 MR14 =0x20
2716 09:58:48.230421
2717 09:58:48.233606 CH=1, VrefRange= 0, VrefLevel = 32
2718 09:58:48.237164 TX Bit0 (977~1001) 25 989, Bit8 (969~992) 24 980,
2719 09:58:48.240570 TX Bit1 (976~999) 24 987, Bit9 (969~992) 24 980,
2720 09:58:48.246732 TX Bit2 (973~997) 25 985, Bit10 (970~993) 24 981,
2721 09:58:48.250110 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
2722 09:58:48.253491 TX Bit4 (975~998) 24 986, Bit12 (971~994) 24 982,
2723 09:58:48.260256 TX Bit5 (976~999) 24 987, Bit13 (971~993) 23 982,
2724 09:58:48.263763 TX Bit6 (976~1000) 25 988, Bit14 (970~993) 24 981,
2725 09:58:48.266847 TX Bit7 (975~998) 24 986, Bit15 (968~992) 25 980,
2726 09:58:48.270466
2727 09:58:48.270969
2728 09:58:48.273524 TX Vref found, early break! 355< 368
2729 09:58:48.277199 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2730 09:58:48.280172 u1DelayCellOfst[0]=9 cells (7 PI)
2731 09:58:48.283567 u1DelayCellOfst[1]=6 cells (5 PI)
2732 09:58:48.286981 u1DelayCellOfst[2]=3 cells (3 PI)
2733 09:58:48.290383 u1DelayCellOfst[3]=0 cells (0 PI)
2734 09:58:48.290886 u1DelayCellOfst[4]=5 cells (4 PI)
2735 09:58:48.294085 u1DelayCellOfst[5]=6 cells (5 PI)
2736 09:58:48.297144 u1DelayCellOfst[6]=7 cells (6 PI)
2737 09:58:48.300476 u1DelayCellOfst[7]=5 cells (4 PI)
2738 09:58:48.303705 Byte0, DQ PI dly=982, DQM PI dly= 985
2739 09:58:48.307094 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2740 09:58:48.310664
2741 09:58:48.313861 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2742 09:58:48.314448
2743 09:58:48.317283 u1DelayCellOfst[8]=0 cells (0 PI)
2744 09:58:48.320618 u1DelayCellOfst[9]=0 cells (0 PI)
2745 09:58:48.323715 u1DelayCellOfst[10]=1 cells (1 PI)
2746 09:58:48.327199 u1DelayCellOfst[11]=2 cells (2 PI)
2747 09:58:48.327633 u1DelayCellOfst[12]=2 cells (2 PI)
2748 09:58:48.330751 u1DelayCellOfst[13]=2 cells (2 PI)
2749 09:58:48.333965 u1DelayCellOfst[14]=1 cells (1 PI)
2750 09:58:48.336987 u1DelayCellOfst[15]=0 cells (0 PI)
2751 09:58:48.340524 Byte1, DQ PI dly=980, DQM PI dly= 981
2752 09:58:48.347177 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2753 09:58:48.347685
2754 09:58:48.350736 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2755 09:58:48.351249
2756 09:58:48.353872 Write Rank0 MR14 =0x18
2757 09:58:48.354445
2758 09:58:48.354836 Final TX Range 0 Vref 24
2759 09:58:48.355153
2760 09:58:48.360427 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2761 09:58:48.360937
2762 09:58:48.367221 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2763 09:58:48.373817 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2764 09:58:48.380297 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2765 09:58:48.383780 Write Rank0 MR3 =0xb0
2766 09:58:48.387218 DramC Write-DBI on
2767 09:58:48.387639 ==
2768 09:58:48.390467 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2769 09:58:48.393977 fsp= 1, odt_onoff= 1, Byte mode= 0
2770 09:58:48.394518 ==
2771 09:58:48.397689 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2772 09:58:48.398192
2773 09:58:48.400454 Begin, DQ Scan Range 701~765
2774 09:58:48.400876
2775 09:58:48.401200
2776 09:58:48.403980 TX Vref Scan disable
2777 09:58:48.407221 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2778 09:58:48.410866 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2779 09:58:48.414205 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2780 09:58:48.417531 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2781 09:58:48.420688 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2782 09:58:48.424281 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2783 09:58:48.427199 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2784 09:58:48.430782 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2785 09:58:48.433884 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2786 09:58:48.437577 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2787 09:58:48.440622 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2788 09:58:48.443810 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2789 09:58:48.447055 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2790 09:58:48.454463 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2791 09:58:48.457718 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2792 09:58:48.460813 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2793 09:58:48.464274 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2794 09:58:48.471012 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2795 09:58:48.474364 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2796 09:58:48.477731 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2797 09:58:48.480876 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2798 09:58:48.484466 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2799 09:58:48.487367 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2800 09:58:48.490757 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2801 09:58:48.494378 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2802 09:58:48.497425 Byte0, DQ PI dly=730, DQM PI dly= 730
2803 09:58:48.500968 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2804 09:58:48.501475
2805 09:58:48.506925 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2806 09:58:48.507357
2807 09:58:48.510329 Byte1, DQ PI dly=724, DQM PI dly= 724
2808 09:58:48.514086 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2809 09:58:48.514646
2810 09:58:48.517121 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2811 09:58:48.520471
2812 09:58:48.524146 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2813 09:58:48.534076 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2814 09:58:48.540772 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2815 09:58:48.541285 Write Rank0 MR3 =0x30
2816 09:58:48.543952 DramC Write-DBI off
2817 09:58:48.544459
2818 09:58:48.544790 [DATLAT]
2819 09:58:48.547412 Freq=1600, CH1 RK0, use_rxtx_scan=0
2820 09:58:48.547837
2821 09:58:48.550583 DATLAT Default: 0xf
2822 09:58:48.551007 7, 0xFFFF, sum=0
2823 09:58:48.553823 8, 0xFFFF, sum=0
2824 09:58:48.554371 9, 0xFFFF, sum=0
2825 09:58:48.557379 10, 0xFFFF, sum=0
2826 09:58:48.557888 11, 0xFFFF, sum=0
2827 09:58:48.560306 12, 0xFFFF, sum=0
2828 09:58:48.560738 13, 0xFFFF, sum=0
2829 09:58:48.561071 14, 0x0, sum=1
2830 09:58:48.564172 15, 0x0, sum=2
2831 09:58:48.564684 16, 0x0, sum=3
2832 09:58:48.567432 17, 0x0, sum=4
2833 09:58:48.570611 pattern=2 first_step=14 total pass=5 best_step=16
2834 09:58:48.571139 ==
2835 09:58:48.577362 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2836 09:58:48.577867 fsp= 1, odt_onoff= 1, Byte mode= 0
2837 09:58:48.580446 ==
2838 09:58:48.583742 Start DQ dly to find pass range UseTestEngine =1
2839 09:58:48.587113 x-axis: bit #, y-axis: DQ dly (-127~63)
2840 09:58:48.587548 RX Vref Scan = 1
2841 09:58:48.711308
2842 09:58:48.711806 RX Vref found, early break!
2843 09:58:48.712140
2844 09:58:48.717659 Final RX Vref 13, apply to both rank0 and 1
2845 09:58:48.718170 ==
2846 09:58:48.721307 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2847 09:58:48.724188 fsp= 1, odt_onoff= 1, Byte mode= 0
2848 09:58:48.724623 ==
2849 09:58:48.725474 DQS Delay:
2850 09:58:48.727616 DQS0 = 0, DQS1 = 0
2851 09:58:48.728319 DQM Delay:
2852 09:58:48.730939 DQM0 = 20, DQM1 = 18
2853 09:58:48.731368 DQ Delay:
2854 09:58:48.734261 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
2855 09:58:48.737613 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19
2856 09:58:48.740934 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2857 09:58:48.744336 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2858 09:58:48.744726
2859 09:58:48.745025
2860 09:58:48.745298
2861 09:58:48.747782 [DramC_TX_OE_Calibration] TA2
2862 09:58:48.750978 Original DQ_B0 (3 6) =30, OEN = 27
2863 09:58:48.754311 Original DQ_B1 (3 6) =30, OEN = 27
2864 09:58:48.757576 23, 0x0, End_B0=23 End_B1=23
2865 09:58:48.757975 24, 0x0, End_B0=24 End_B1=24
2866 09:58:48.761044 25, 0x0, End_B0=25 End_B1=25
2867 09:58:48.764489 26, 0x0, End_B0=26 End_B1=26
2868 09:58:48.768019 27, 0x0, End_B0=27 End_B1=27
2869 09:58:48.768492 28, 0x0, End_B0=28 End_B1=28
2870 09:58:48.771236 29, 0x0, End_B0=29 End_B1=29
2871 09:58:48.774868 30, 0x0, End_B0=30 End_B1=30
2872 09:58:48.777913 31, 0xFFFF, End_B0=30 End_B1=30
2873 09:58:48.781097 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2874 09:58:48.787998 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2875 09:58:48.788468
2876 09:58:48.788771
2877 09:58:48.791472 Write Rank0 MR23 =0x3f
2878 09:58:48.791934 [DQSOSC]
2879 09:58:48.798072 [DQSOSCAuto] RK0, (LSB)MR18= 0xa4, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
2880 09:58:48.804676 CH1_RK0: MR19=0x3, MR18=0xA4, DQSOSC=337, MR23=63, INC=21, DEC=32
2881 09:58:48.808499 Write Rank0 MR23 =0x3f
2882 09:58:48.808974 [DQSOSC]
2883 09:58:48.814816 [DQSOSCAuto] RK0, (LSB)MR18= 0xa4, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
2884 09:58:48.818142 CH1 RK0: MR19=3, MR18=A4
2885 09:58:48.821212 [RankSwap] Rank num 2, (Multi 1), Rank 1
2886 09:58:48.824704 Write Rank0 MR2 =0xad
2887 09:58:48.825097 [Write Leveling]
2888 09:58:48.827819 delay byte0 byte1 byte2 byte3
2889 09:58:48.828209
2890 09:58:48.828509 10 0 0
2891 09:58:48.831353 11 0 0
2892 09:58:48.831750 12 0 0
2893 09:58:48.834716 13 0 0
2894 09:58:48.835295 14 0 0
2895 09:58:48.835629 15 0 0
2896 09:58:48.837849 16 0 0
2897 09:58:48.838275 17 0 0
2898 09:58:48.841010 18 0 0
2899 09:58:48.841466 19 0 0
2900 09:58:48.844575 20 0 0
2901 09:58:48.844971 21 0 0
2902 09:58:48.845275 22 0 0
2903 09:58:48.847906 23 0 0
2904 09:58:48.848301 24 0 0
2905 09:58:48.851228 25 0 0
2906 09:58:48.851621 26 0 0
2907 09:58:48.851925 27 0 0
2908 09:58:48.854645 28 0 0
2909 09:58:48.855041 29 0 0
2910 09:58:48.858126 30 0 0
2911 09:58:48.858664 31 0 ff
2912 09:58:48.861307 32 0 ff
2913 09:58:48.861704 33 0 ff
2914 09:58:48.862008 34 0 ff
2915 09:58:48.864768 35 0 ff
2916 09:58:48.865393 36 0 ff
2917 09:58:48.868019 37 ff ff
2918 09:58:48.868496 38 ff ff
2919 09:58:48.871271 39 ff ff
2920 09:58:48.871666 40 ff ff
2921 09:58:48.874607 41 ff ff
2922 09:58:48.875032 42 ff ff
2923 09:58:48.878312 43 ff ff
2924 09:58:48.881350 pass bytecount = 0xff (0xff: all bytes pass)
2925 09:58:48.881740
2926 09:58:48.882035 DQS0 dly: 37
2927 09:58:48.884650 DQS1 dly: 31
2928 09:58:48.885039 Write Rank0 MR2 =0x2d
2929 09:58:48.888133 [RankSwap] Rank num 2, (Multi 1), Rank 0
2930 09:58:48.891242 Write Rank1 MR1 =0xd6
2931 09:58:48.891629 [Gating]
2932 09:58:48.891929 ==
2933 09:58:48.898102 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2934 09:58:48.901750 fsp= 1, odt_onoff= 1, Byte mode= 0
2935 09:58:48.902243 ==
2936 09:58:48.904986 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2937 09:58:48.908091 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2938 09:58:48.914732 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2939 09:58:48.918467 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2940 09:58:48.921266 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2941 09:58:48.928314 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2942 09:58:48.931458 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2943 09:58:48.934850 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2944 09:58:48.938235 3 2 0 |a09 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2945 09:58:48.945220 3 2 4 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2946 09:58:48.948236 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2947 09:58:48.951613 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2948 09:58:48.958296 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2949 09:58:48.961476 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2950 09:58:48.964859 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2951 09:58:48.971871 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2952 09:58:48.974817 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2953 09:58:48.977978 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2954 09:58:48.981843 3 3 8 |1a19 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2955 09:58:48.988606 [Byte 0] Lead/lag Transition tap number (1)
2956 09:58:48.991496 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2957 09:58:48.994858 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2958 09:58:49.001831 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2959 09:58:49.004984 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2960 09:58:49.008243 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2961 09:58:49.011562 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2962 09:58:49.018362 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2963 09:58:49.021654 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2964 09:58:49.025108 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2965 09:58:49.031482 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2966 09:58:49.034874 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2967 09:58:49.038245 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2968 09:58:49.044900 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2969 09:58:49.048362 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2970 09:58:49.051636 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2971 09:58:49.054970 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2972 09:58:49.061653 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2973 09:58:49.064984 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2974 09:58:49.068453 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2975 09:58:49.074956 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2976 09:58:49.078368 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2977 09:58:49.081702 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2978 09:58:49.088100 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
2979 09:58:49.091636 [Byte 0] Lead/lag Transition tap number (3)
2980 09:58:49.095191 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2981 09:58:49.098128 [Byte 1] Lead/lag Transition tap number (3)
2982 09:58:49.101527 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2983 09:58:49.104886 [Byte 0]First pass (3, 6, 4)
2984 09:58:49.108568 3 6 8 |4646 4040 |(0 0)(11 11) |(0 0)(0 0)| 0
2985 09:58:49.115169 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2986 09:58:49.115681 [Byte 1]First pass (3, 6, 12)
2987 09:58:49.121563 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2988 09:58:49.125433 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2989 09:58:49.128091 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2990 09:58:49.131817 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2991 09:58:49.134870 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2992 09:58:49.141837 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2993 09:58:49.145192 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2994 09:58:49.148491 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2995 09:58:49.151811 All bytes gating window > 1UI, Early break!
2996 09:58:49.152318
2997 09:58:49.155165 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
2998 09:58:49.155672
2999 09:58:49.158586 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
3000 09:58:49.161711
3001 09:58:49.162154
3002 09:58:49.162553
3003 09:58:49.165305 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
3004 09:58:49.165817
3005 09:58:49.168789 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3006 09:58:49.169308
3007 09:58:49.169642
3008 09:58:49.171833 Write Rank1 MR1 =0x56
3009 09:58:49.172336
3010 09:58:49.174814 best RODT dly(2T, 0.5T) = (2, 2)
3011 09:58:49.175259
3012 09:58:49.178266 best RODT dly(2T, 0.5T) = (2, 2)
3013 09:58:49.178772 ==
3014 09:58:49.181685 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3015 09:58:49.185150 fsp= 1, odt_onoff= 1, Byte mode= 0
3016 09:58:49.185583 ==
3017 09:58:49.188405 Start DQ dly to find pass range UseTestEngine =0
3018 09:58:49.195195 x-axis: bit #, y-axis: DQ dly (-127~63)
3019 09:58:49.195700 RX Vref Scan = 0
3020 09:58:49.198275 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3021 09:58:49.201586 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3022 09:58:49.204934 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3023 09:58:49.208238 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3024 09:58:49.208753 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3025 09:58:49.211543 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3026 09:58:49.214935 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3027 09:58:49.218578 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3028 09:58:49.221538 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3029 09:58:49.224742 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3030 09:58:49.228226 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3031 09:58:49.231891 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3032 09:58:49.232405 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3033 09:58:49.235003 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3034 09:58:49.238336 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3035 09:58:49.241781 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3036 09:58:49.245548 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3037 09:58:49.248842 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3038 09:58:49.252096 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3039 09:58:49.252619 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3040 09:58:49.255622 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3041 09:58:49.258833 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3042 09:58:49.262028 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3043 09:58:49.265331 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3044 09:58:49.268595 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3045 09:58:49.271989 -1, [0] xxooxxxx xxxxxxxo [MSB]
3046 09:58:49.272500 0, [0] xxooxxxx xxoxxxxo [MSB]
3047 09:58:49.275745 1, [0] xxooxxxo oxoxxxxo [MSB]
3048 09:58:49.278757 2, [0] xxooxxxo oooxxxxo [MSB]
3049 09:58:49.281969 3, [0] xxoooxxo oooxxxoo [MSB]
3050 09:58:49.285095 4, [0] xxoooxxo ooooxooo [MSB]
3051 09:58:49.288899 5, [0] xxoooxxo oooooooo [MSB]
3052 09:58:49.289417 6, [0] xooooooo oooooooo [MSB]
3053 09:58:49.291542 33, [0] oooxoooo oooooooo [MSB]
3054 09:58:49.295410 34, [0] oooxoooo ooooooox [MSB]
3055 09:58:49.298655 35, [0] ooxxoooo ooooooox [MSB]
3056 09:58:49.302300 36, [0] ooxxoooo oxooooox [MSB]
3057 09:58:49.305485 37, [0] ooxxoooo xxxxooox [MSB]
3058 09:58:49.306049 38, [0] ooxxoooo xxxxooox [MSB]
3059 09:58:49.308820 39, [0] ooxxxoox xxxxooxx [MSB]
3060 09:58:49.312079 40, [0] ooxxxoox xxxxoxxx [MSB]
3061 09:58:49.315123 41, [0] ooxxxoox xxxxxxxx [MSB]
3062 09:58:49.318759 42, [0] ooxxxxox xxxxxxxx [MSB]
3063 09:58:49.321734 43, [0] oxxxxxxx xxxxxxxx [MSB]
3064 09:58:49.325276 44, [0] xxxxxxxx xxxxxxxx [MSB]
3065 09:58:49.328644 iDelay=44, Bit 0, Center 25 (7 ~ 43) 37
3066 09:58:49.331903 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3067 09:58:49.335312 iDelay=44, Bit 2, Center 16 (-1 ~ 34) 36
3068 09:58:49.338590 iDelay=44, Bit 3, Center 14 (-3 ~ 32) 36
3069 09:58:49.342308 iDelay=44, Bit 4, Center 20 (3 ~ 38) 36
3070 09:58:49.345630 iDelay=44, Bit 5, Center 23 (6 ~ 41) 36
3071 09:58:49.348839 iDelay=44, Bit 6, Center 24 (6 ~ 42) 37
3072 09:58:49.351849 iDelay=44, Bit 7, Center 19 (1 ~ 38) 38
3073 09:58:49.355529 iDelay=44, Bit 8, Center 18 (1 ~ 36) 36
3074 09:58:49.358622 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3075 09:58:49.361842 iDelay=44, Bit 10, Center 18 (0 ~ 36) 37
3076 09:58:49.365647 iDelay=44, Bit 11, Center 20 (4 ~ 36) 33
3077 09:58:49.368691 iDelay=44, Bit 12, Center 22 (5 ~ 40) 36
3078 09:58:49.375579 iDelay=44, Bit 13, Center 21 (4 ~ 39) 36
3079 09:58:49.378665 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
3080 09:58:49.382093 iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36
3081 09:58:49.382668 ==
3082 09:58:49.385433 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3083 09:58:49.388941 fsp= 1, odt_onoff= 1, Byte mode= 0
3084 09:58:49.389652 ==
3085 09:58:49.392038 DQS Delay:
3086 09:58:49.392539 DQS0 = 0, DQS1 = 0
3087 09:58:49.392869 DQM Delay:
3088 09:58:49.395337 DQM0 = 20, DQM1 = 19
3089 09:58:49.395759 DQ Delay:
3090 09:58:49.398738 DQ0 =25, DQ1 =24, DQ2 =16, DQ3 =14
3091 09:58:49.402603 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =19
3092 09:58:49.405563 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =20
3093 09:58:49.408957 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15
3094 09:58:49.409460
3095 09:58:49.409792
3096 09:58:49.412431 DramC Write-DBI off
3097 09:58:49.412935 ==
3098 09:58:49.415772 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3099 09:58:49.418710 fsp= 1, odt_onoff= 1, Byte mode= 0
3100 09:58:49.419136 ==
3101 09:58:49.425453 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3102 09:58:49.425965
3103 09:58:49.429094 Begin, DQ Scan Range 927~1183
3104 09:58:49.429597
3105 09:58:49.429989
3106 09:58:49.430357 TX Vref Scan disable
3107 09:58:49.432273 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3108 09:58:49.435301 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3109 09:58:49.438911 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3110 09:58:49.442310 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3111 09:58:49.448844 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3112 09:58:49.452122 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3113 09:58:49.455589 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3114 09:58:49.458909 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3115 09:58:49.462189 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3116 09:58:49.465779 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3117 09:58:49.468795 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3118 09:58:49.472574 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3119 09:58:49.475760 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3120 09:58:49.479325 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3121 09:58:49.482164 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3122 09:58:49.485505 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3123 09:58:49.488820 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3124 09:58:49.492777 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3125 09:58:49.495835 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3126 09:58:49.499018 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3127 09:58:49.502359 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3128 09:58:49.508992 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3129 09:58:49.512262 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3130 09:58:49.515812 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3131 09:58:49.518873 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3132 09:58:49.522170 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3133 09:58:49.525858 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3134 09:58:49.529089 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3135 09:58:49.532496 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3136 09:58:49.535578 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3137 09:58:49.538966 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3138 09:58:49.542588 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3139 09:58:49.545736 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3140 09:58:49.549123 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3141 09:58:49.552592 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3142 09:58:49.555930 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3143 09:58:49.558997 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3144 09:58:49.562104 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
3145 09:58:49.565783 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
3146 09:58:49.569209 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3147 09:58:49.572494 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
3148 09:58:49.575905 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
3149 09:58:49.578975 969 |3 6 9|[0] xxxxxxxx ooooxooo [MSB]
3150 09:58:49.585877 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3151 09:58:49.588993 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3152 09:58:49.592449 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3153 09:58:49.595985 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3154 09:58:49.599278 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3155 09:58:49.602762 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
3156 09:58:49.605677 976 |3 6 16|[0] xooooooo oooooooo [MSB]
3157 09:58:49.612530 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3158 09:58:49.616032 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3159 09:58:49.619432 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3160 09:58:49.622340 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3161 09:58:49.626177 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3162 09:58:49.629353 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3163 09:58:49.632766 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3164 09:58:49.635791 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3165 09:58:49.639345 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3166 09:58:49.642570 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3167 09:58:49.645858 Byte0, DQ PI dly=986, DQM PI dly= 986
3168 09:58:49.649050 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3169 09:58:49.652497
3170 09:58:49.655784 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3171 09:58:49.656296
3172 09:58:49.659367 Byte1, DQ PI dly=978, DQM PI dly= 978
3173 09:58:49.662397 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3174 09:58:49.662830
3175 09:58:49.665975 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3176 09:58:49.669515
3177 09:58:49.670032 ==
3178 09:58:49.672781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3179 09:58:49.675893 fsp= 1, odt_onoff= 1, Byte mode= 0
3180 09:58:49.676585 ==
3181 09:58:49.679130 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3182 09:58:49.679556
3183 09:58:49.682910 Begin, DQ Scan Range 954~1018
3184 09:58:49.685840 Write Rank1 MR14 =0x0
3185 09:58:49.693932
3186 09:58:49.694494 CH=1, VrefRange= 0, VrefLevel = 0
3187 09:58:49.701075 TX Bit0 (978~998) 21 988, Bit8 (969~987) 19 978,
3188 09:58:49.704063 TX Bit1 (977~997) 21 987, Bit9 (969~986) 18 977,
3189 09:58:49.710843 TX Bit2 (975~992) 18 983, Bit10 (970~986) 17 978,
3190 09:58:49.714047 TX Bit3 (975~991) 17 983, Bit11 (971~990) 20 980,
3191 09:58:49.717225 TX Bit4 (976~994) 19 985, Bit12 (971~991) 21 981,
3192 09:58:49.724463 TX Bit5 (978~998) 21 988, Bit13 (971~987) 17 979,
3193 09:58:49.727694 TX Bit6 (978~998) 21 988, Bit14 (971~987) 17 979,
3194 09:58:49.730840 TX Bit7 (977~995) 19 986, Bit15 (967~985) 19 976,
3195 09:58:49.731441
3196 09:58:49.733822 Write Rank1 MR14 =0x2
3197 09:58:49.743362
3198 09:58:49.743873 CH=1, VrefRange= 0, VrefLevel = 2
3199 09:58:49.749730 TX Bit0 (977~998) 22 987, Bit8 (969~988) 20 978,
3200 09:58:49.752906 TX Bit1 (977~997) 21 987, Bit9 (969~987) 19 978,
3201 09:58:49.760102 TX Bit2 (975~992) 18 983, Bit10 (970~986) 17 978,
3202 09:58:49.762625 TX Bit3 (975~991) 17 983, Bit11 (971~989) 19 980,
3203 09:58:49.766350 TX Bit4 (976~994) 19 985, Bit12 (971~991) 21 981,
3204 09:58:49.773026 TX Bit5 (977~998) 22 987, Bit13 (970~988) 19 979,
3205 09:58:49.776684 TX Bit6 (977~998) 22 987, Bit14 (970~988) 19 979,
3206 09:58:49.779695 TX Bit7 (977~995) 19 986, Bit15 (967~985) 19 976,
3207 09:58:49.780125
3208 09:58:49.782963 Write Rank1 MR14 =0x4
3209 09:58:49.791860
3210 09:58:49.792284 CH=1, VrefRange= 0, VrefLevel = 4
3211 09:58:49.798755 TX Bit0 (977~998) 22 987, Bit8 (969~988) 20 978,
3212 09:58:49.802165 TX Bit1 (976~997) 22 986, Bit9 (969~987) 19 978,
3213 09:58:49.805370 TX Bit2 (975~993) 19 984, Bit10 (970~987) 18 978,
3214 09:58:49.812708 TX Bit3 (974~992) 19 983, Bit11 (971~991) 21 981,
3215 09:58:49.815769 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3216 09:58:49.822443 TX Bit5 (977~998) 22 987, Bit13 (971~989) 19 980,
3217 09:58:49.825662 TX Bit6 (977~998) 22 987, Bit14 (970~989) 20 979,
3218 09:58:49.828498 TX Bit7 (977~996) 20 986, Bit15 (966~986) 21 976,
3219 09:58:49.829001
3220 09:58:49.831891 Write Rank1 MR14 =0x6
3221 09:58:49.841211
3222 09:58:49.841910 CH=1, VrefRange= 0, VrefLevel = 6
3223 09:58:49.847907 TX Bit0 (977~999) 23 988, Bit8 (969~989) 21 979,
3224 09:58:49.851100 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3225 09:58:49.858438 TX Bit2 (974~993) 20 983, Bit10 (970~988) 19 979,
3226 09:58:49.861019 TX Bit3 (974~992) 19 983, Bit11 (970~991) 22 980,
3227 09:58:49.864490 TX Bit4 (976~996) 21 986, Bit12 (971~991) 21 981,
3228 09:58:49.871400 TX Bit5 (977~998) 22 987, Bit13 (970~990) 21 980,
3229 09:58:49.874371 TX Bit6 (977~999) 23 988, Bit14 (970~990) 21 980,
3230 09:58:49.877934 TX Bit7 (976~996) 21 986, Bit15 (966~986) 21 976,
3231 09:58:49.878414
3232 09:58:49.881150 Write Rank1 MR14 =0x8
3233 09:58:49.890297
3234 09:58:49.890794 CH=1, VrefRange= 0, VrefLevel = 8
3235 09:58:49.897182 TX Bit0 (977~999) 23 988, Bit8 (969~989) 21 979,
3236 09:58:49.900099 TX Bit1 (976~998) 23 987, Bit9 (968~989) 22 978,
3237 09:58:49.906805 TX Bit2 (974~994) 21 984, Bit10 (970~988) 19 979,
3238 09:58:49.910358 TX Bit3 (973~993) 21 983, Bit11 (970~991) 22 980,
3239 09:58:49.913623 TX Bit4 (975~996) 22 985, Bit12 (971~991) 21 981,
3240 09:58:49.920296 TX Bit5 (977~999) 23 988, Bit13 (970~990) 21 980,
3241 09:58:49.923957 TX Bit6 (977~999) 23 988, Bit14 (970~990) 21 980,
3242 09:58:49.926743 TX Bit7 (976~997) 22 986, Bit15 (966~987) 22 976,
3243 09:58:49.927132
3244 09:58:49.930283 Write Rank1 MR14 =0xa
3245 09:58:49.939353
3246 09:58:49.942723 CH=1, VrefRange= 0, VrefLevel = 10
3247 09:58:49.946107 TX Bit0 (977~999) 23 988, Bit8 (968~990) 23 979,
3248 09:58:49.949616 TX Bit1 (976~998) 23 987, Bit9 (969~990) 22 979,
3249 09:58:49.955863 TX Bit2 (974~994) 21 984, Bit10 (969~989) 21 979,
3250 09:58:49.959294 TX Bit3 (973~993) 21 983, Bit11 (970~991) 22 980,
3251 09:58:49.962478 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3252 09:58:49.969672 TX Bit5 (977~999) 23 988, Bit13 (970~990) 21 980,
3253 09:58:49.972661 TX Bit6 (977~999) 23 988, Bit14 (970~990) 21 980,
3254 09:58:49.976138 TX Bit7 (976~997) 22 986, Bit15 (965~987) 23 976,
3255 09:58:49.976574
3256 09:58:49.979318 Write Rank1 MR14 =0xc
3257 09:58:49.988687
3258 09:58:49.991860 CH=1, VrefRange= 0, VrefLevel = 12
3259 09:58:49.995442 TX Bit0 (977~1000) 24 988, Bit8 (968~990) 23 979,
3260 09:58:49.998403 TX Bit1 (976~998) 23 987, Bit9 (968~990) 23 979,
3261 09:58:50.005118 TX Bit2 (973~995) 23 984, Bit10 (969~990) 22 979,
3262 09:58:50.008682 TX Bit3 (972~994) 23 983, Bit11 (970~991) 22 980,
3263 09:58:50.012070 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3264 09:58:50.018534 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
3265 09:58:50.021851 TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980,
3266 09:58:50.025460 TX Bit7 (976~997) 22 986, Bit15 (965~989) 25 977,
3267 09:58:50.028554
3268 09:58:50.028979 Write Rank1 MR14 =0xe
3269 09:58:50.038363
3270 09:58:50.041643 CH=1, VrefRange= 0, VrefLevel = 14
3271 09:58:50.045033 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
3272 09:58:50.048261 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
3273 09:58:50.054981 TX Bit2 (974~996) 23 985, Bit10 (969~990) 22 979,
3274 09:58:50.058090 TX Bit3 (972~995) 24 983, Bit11 (969~991) 23 980,
3275 09:58:50.061365 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3276 09:58:50.068252 TX Bit5 (976~1000) 25 988, Bit13 (970~991) 22 980,
3277 09:58:50.071508 TX Bit6 (976~1000) 25 988, Bit14 (969~991) 23 980,
3278 09:58:50.074719 TX Bit7 (976~997) 22 986, Bit15 (964~989) 26 976,
3279 09:58:50.077912
3280 09:58:50.078370 Write Rank1 MR14 =0x10
3281 09:58:50.087925
3282 09:58:50.088351 CH=1, VrefRange= 0, VrefLevel = 16
3283 09:58:50.094347 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
3284 09:58:50.099350 TX Bit1 (976~998) 23 987, Bit9 (967~991) 25 979,
3285 09:58:50.104583 TX Bit2 (972~997) 26 984, Bit10 (968~991) 24 979,
3286 09:58:50.107852 TX Bit3 (972~996) 25 984, Bit11 (969~992) 24 980,
3287 09:58:50.111194 TX Bit4 (974~997) 24 985, Bit12 (970~992) 23 981,
3288 09:58:50.117979 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3289 09:58:50.121551 TX Bit6 (976~1000) 25 988, Bit14 (969~991) 23 980,
3290 09:58:50.125039 TX Bit7 (975~998) 24 986, Bit15 (964~989) 26 976,
3291 09:58:50.125620
3292 09:58:50.128017 Write Rank1 MR14 =0x12
3293 09:58:50.137600
3294 09:58:50.140858 CH=1, VrefRange= 0, VrefLevel = 18
3295 09:58:50.144469 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
3296 09:58:50.147915 TX Bit1 (975~999) 25 987, Bit9 (967~991) 25 979,
3297 09:58:50.154519 TX Bit2 (973~997) 25 985, Bit10 (968~991) 24 979,
3298 09:58:50.157705 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3299 09:58:50.161076 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3300 09:58:50.167630 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3301 09:58:50.171045 TX Bit6 (976~1000) 25 988, Bit14 (969~991) 23 980,
3302 09:58:50.177376 TX Bit7 (975~998) 24 986, Bit15 (964~990) 27 977,
3303 09:58:50.177766
3304 09:58:50.178058 Write Rank1 MR14 =0x14
3305 09:58:50.187706
3306 09:58:50.190870 CH=1, VrefRange= 0, VrefLevel = 20
3307 09:58:50.194044 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
3308 09:58:50.197541 TX Bit1 (976~999) 24 987, Bit9 (967~991) 25 979,
3309 09:58:50.204213 TX Bit2 (972~997) 26 984, Bit10 (968~991) 24 979,
3310 09:58:50.207503 TX Bit3 (970~997) 28 983, Bit11 (969~992) 24 980,
3311 09:58:50.210813 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3312 09:58:50.217925 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3313 09:58:50.221348 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3314 09:58:50.224307 TX Bit7 (975~998) 24 986, Bit15 (964~990) 27 977,
3315 09:58:50.227606
3316 09:58:50.228109 Write Rank1 MR14 =0x16
3317 09:58:50.237798
3318 09:58:50.241011 CH=1, VrefRange= 0, VrefLevel = 22
3319 09:58:50.244312 TX Bit0 (976~1002) 27 989, Bit8 (966~992) 27 979,
3320 09:58:50.247677 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3321 09:58:50.254560 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3322 09:58:50.257526 TX Bit3 (970~997) 28 983, Bit11 (969~992) 24 980,
3323 09:58:50.261188 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3324 09:58:50.267709 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3325 09:58:50.271088 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3326 09:58:50.277629 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3327 09:58:50.278141
3328 09:58:50.278514 Write Rank1 MR14 =0x18
3329 09:58:50.287716
3330 09:58:50.290683 CH=1, VrefRange= 0, VrefLevel = 24
3331 09:58:50.294000 TX Bit0 (976~1002) 27 989, Bit8 (966~992) 27 979,
3332 09:58:50.297709 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3333 09:58:50.304476 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3334 09:58:50.307553 TX Bit3 (970~997) 28 983, Bit11 (969~992) 24 980,
3335 09:58:50.310782 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3336 09:58:50.317421 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3337 09:58:50.320870 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3338 09:58:50.324100 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3339 09:58:50.327731
3340 09:58:50.328259 Write Rank1 MR14 =0x1a
3341 09:58:50.337437
3342 09:58:50.340887 CH=1, VrefRange= 0, VrefLevel = 26
3343 09:58:50.344330 TX Bit0 (976~1002) 27 989, Bit8 (966~992) 27 979,
3344 09:58:50.347688 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3345 09:58:50.354163 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3346 09:58:50.357703 TX Bit3 (970~997) 28 983, Bit11 (969~992) 24 980,
3347 09:58:50.360926 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3348 09:58:50.367642 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3349 09:58:50.371204 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3350 09:58:50.374330 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3351 09:58:50.374855
3352 09:58:50.377709 Write Rank1 MR14 =0x1c
3353 09:58:50.387513
3354 09:58:50.390613 CH=1, VrefRange= 0, VrefLevel = 28
3355 09:58:50.394113 TX Bit0 (976~1002) 27 989, Bit8 (966~992) 27 979,
3356 09:58:50.397400 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3357 09:58:50.403982 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3358 09:58:50.407163 TX Bit3 (970~997) 28 983, Bit11 (969~992) 24 980,
3359 09:58:50.410310 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3360 09:58:50.417522 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3361 09:58:50.420768 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3362 09:58:50.424074 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3363 09:58:50.426972
3364 09:58:50.427396 Write Rank1 MR14 =0x1e
3365 09:58:50.437216
3366 09:58:50.440406 CH=1, VrefRange= 0, VrefLevel = 30
3367 09:58:50.444219 TX Bit0 (976~1002) 27 989, Bit8 (966~992) 27 979,
3368 09:58:50.447095 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3369 09:58:50.453855 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3370 09:58:50.457173 TX Bit3 (970~997) 28 983, Bit11 (969~992) 24 980,
3371 09:58:50.460467 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3372 09:58:50.467506 TX Bit5 (976~1001) 26 988, Bit13 (968~992) 25 980,
3373 09:58:50.470940 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3374 09:58:50.474040 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3375 09:58:50.477370
3376 09:58:50.477873
3377 09:58:50.480443 TX Vref found, early break! 388< 392
3378 09:58:50.483846 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3379 09:58:50.487155 u1DelayCellOfst[0]=7 cells (6 PI)
3380 09:58:50.490386 u1DelayCellOfst[1]=5 cells (4 PI)
3381 09:58:50.493783 u1DelayCellOfst[2]=1 cells (1 PI)
3382 09:58:50.497400 u1DelayCellOfst[3]=0 cells (0 PI)
3383 09:58:50.500923 u1DelayCellOfst[4]=3 cells (3 PI)
3384 09:58:50.501437 u1DelayCellOfst[5]=6 cells (5 PI)
3385 09:58:50.503934 u1DelayCellOfst[6]=6 cells (5 PI)
3386 09:58:50.507221 u1DelayCellOfst[7]=3 cells (3 PI)
3387 09:58:50.510405 Byte0, DQ PI dly=983, DQM PI dly= 986
3388 09:58:50.517084 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3389 09:58:50.517589
3390 09:58:50.520622 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3391 09:58:50.521137
3392 09:58:50.523840 u1DelayCellOfst[8]=3 cells (3 PI)
3393 09:58:50.527345 u1DelayCellOfst[9]=2 cells (2 PI)
3394 09:58:50.530539 u1DelayCellOfst[10]=3 cells (3 PI)
3395 09:58:50.533909 u1DelayCellOfst[11]=5 cells (4 PI)
3396 09:58:50.537499 u1DelayCellOfst[12]=5 cells (4 PI)
3397 09:58:50.538056 u1DelayCellOfst[13]=5 cells (4 PI)
3398 09:58:50.540571 u1DelayCellOfst[14]=5 cells (4 PI)
3399 09:58:50.543907 u1DelayCellOfst[15]=0 cells (0 PI)
3400 09:58:50.547528 Byte1, DQ PI dly=976, DQM PI dly= 978
3401 09:58:50.553775 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
3402 09:58:50.554327
3403 09:58:50.557525 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
3404 09:58:50.558042
3405 09:58:50.560579 Write Rank1 MR14 =0x16
3406 09:58:50.561085
3407 09:58:50.561557 Final TX Range 0 Vref 22
3408 09:58:50.562038
3409 09:58:50.567267 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3410 09:58:50.567780
3411 09:58:50.574024 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3412 09:58:50.580805 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3413 09:58:50.587518 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3414 09:58:50.590999 Write Rank1 MR3 =0xb0
3415 09:58:50.593825 DramC Write-DBI on
3416 09:58:50.594278 ==
3417 09:58:50.597422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3418 09:58:50.600401 fsp= 1, odt_onoff= 1, Byte mode= 0
3419 09:58:50.600829 ==
3420 09:58:50.604272 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3421 09:58:50.607266
3422 09:58:50.607693 Begin, DQ Scan Range 698~762
3423 09:58:50.608064
3424 09:58:50.608545
3425 09:58:50.610891 TX Vref Scan disable
3426 09:58:50.614108 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3427 09:58:50.617327 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3428 09:58:50.620553 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3429 09:58:50.624037 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3430 09:58:50.627718 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3431 09:58:50.630888 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3432 09:58:50.633817 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3433 09:58:50.637240 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3434 09:58:50.640961 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3435 09:58:50.644220 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
3436 09:58:50.650819 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3437 09:58:50.654039 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3438 09:58:50.657529 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3439 09:58:50.660669 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3440 09:58:50.664143 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3441 09:58:50.667504 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3442 09:58:50.670883 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3443 09:58:50.674263 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3444 09:58:50.677548 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3445 09:58:50.680813 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3446 09:58:50.688336 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3447 09:58:50.691731 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3448 09:58:50.694819 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3449 09:58:50.698726 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3450 09:58:50.701751 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3451 09:58:50.704974 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3452 09:58:50.708310 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3453 09:58:50.711778 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3454 09:58:50.715218 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3455 09:58:50.718816 Byte0, DQ PI dly=730, DQM PI dly= 730
3456 09:58:50.721738 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3457 09:58:50.722286
3458 09:58:50.728653 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3459 09:58:50.729175
3460 09:58:50.731845 Byte1, DQ PI dly=721, DQM PI dly= 721
3461 09:58:50.734940 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3462 09:58:50.735372
3463 09:58:50.738505 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3464 09:58:50.739013
3465 09:58:50.745293 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3466 09:58:50.751684 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3467 09:58:50.761913 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3468 09:58:50.762465 Write Rank1 MR3 =0x30
3469 09:58:50.764896 DramC Write-DBI off
3470 09:58:50.765320
3471 09:58:50.765642 [DATLAT]
3472 09:58:50.768618 Freq=1600, CH1 RK1, use_rxtx_scan=0
3473 09:58:50.769133
3474 09:58:50.771829 DATLAT Default: 0x10
3475 09:58:50.772253 7, 0xFFFF, sum=0
3476 09:58:50.775159 8, 0xFFFF, sum=0
3477 09:58:50.775677 9, 0xFFFF, sum=0
3478 09:58:50.776010 10, 0xFFFF, sum=0
3479 09:58:50.778462 11, 0xFFFF, sum=0
3480 09:58:50.778896 12, 0xFFFF, sum=0
3481 09:58:50.781921 13, 0xFFFF, sum=0
3482 09:58:50.782556 14, 0x0, sum=1
3483 09:58:50.785304 15, 0x0, sum=2
3484 09:58:50.785734 16, 0x0, sum=3
3485 09:58:50.788685 17, 0x0, sum=4
3486 09:58:50.791741 pattern=2 first_step=14 total pass=5 best_step=16
3487 09:58:50.792174 ==
3488 09:58:50.794956 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3489 09:58:50.798506 fsp= 1, odt_onoff= 1, Byte mode= 0
3490 09:58:50.798937 ==
3491 09:58:50.805436 Start DQ dly to find pass range UseTestEngine =1
3492 09:58:50.808865 x-axis: bit #, y-axis: DQ dly (-127~63)
3493 09:58:50.809414 RX Vref Scan = 0
3494 09:58:50.812003 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3495 09:58:50.815370 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3496 09:58:50.818800 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3497 09:58:50.821748 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3498 09:58:50.825480 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3499 09:58:50.828617 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3500 09:58:50.829141 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3501 09:58:50.832058 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3502 09:58:50.835246 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3503 09:58:50.838537 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3504 09:58:50.842061 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3505 09:58:50.845376 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3506 09:58:50.848590 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3507 09:58:50.852336 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3508 09:58:50.852853 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3509 09:58:50.855271 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3510 09:58:50.858414 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3511 09:58:50.861898 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3512 09:58:50.865186 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3513 09:58:50.868689 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3514 09:58:50.872012 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3515 09:58:50.875395 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3516 09:58:50.875920 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3517 09:58:50.878436 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3518 09:58:50.881984 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3519 09:58:50.885216 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3520 09:58:50.888910 0, [0] xxooxxxx xxxxxxxo [MSB]
3521 09:58:50.892406 1, [0] xxooxxxx oooxxxxo [MSB]
3522 09:58:50.893006 2, [0] xxooxxxx ooooxxxo [MSB]
3523 09:58:50.895098 3, [0] xxooxxxx ooooxxoo [MSB]
3524 09:58:50.898487 4, [0] xxoooxxo ooooxooo [MSB]
3525 09:58:50.901988 5, [0] xxoooxxo oooooooo [MSB]
3526 09:58:50.905218 6, [0] xxoooxxo oooooooo [MSB]
3527 09:58:50.905653 7, [0] xoooooxo oooooooo [MSB]
3528 09:58:50.910662 33, [0] oooxoooo ooooooox [MSB]
3529 09:58:50.914296 34, [0] oooxoooo ooooooox [MSB]
3530 09:58:50.917464 35, [0] oooxoooo ooooooox [MSB]
3531 09:58:50.920785 36, [0] ooxxoooo ooxoooox [MSB]
3532 09:58:50.924227 37, [0] ooxxxooo xxxxooox [MSB]
3533 09:58:50.927585 38, [0] ooxxxoox xxxxooxx [MSB]
3534 09:58:50.928107 39, [0] ooxxxoox xxxxoxxx [MSB]
3535 09:58:50.930858 40, [0] ooxxxoox xxxxxxxx [MSB]
3536 09:58:50.934278 41, [0] ooxxxxox xxxxxxxx [MSB]
3537 09:58:50.937538 42, [0] xxxxxxxx xxxxxxxx [MSB]
3538 09:58:50.941062 iDelay=42, Bit 0, Center 24 (8 ~ 41) 34
3539 09:58:50.944347 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
3540 09:58:50.947651 iDelay=42, Bit 2, Center 17 (0 ~ 35) 36
3541 09:58:50.951162 iDelay=42, Bit 3, Center 14 (-3 ~ 32) 36
3542 09:58:50.954451 iDelay=42, Bit 4, Center 20 (4 ~ 36) 33
3543 09:58:50.957769 iDelay=42, Bit 5, Center 23 (7 ~ 40) 34
3544 09:58:50.961176 iDelay=42, Bit 6, Center 24 (8 ~ 41) 34
3545 09:58:50.964351 iDelay=42, Bit 7, Center 20 (4 ~ 37) 34
3546 09:58:50.970957 iDelay=42, Bit 8, Center 18 (1 ~ 36) 36
3547 09:58:50.974751 iDelay=42, Bit 9, Center 18 (1 ~ 36) 36
3548 09:58:50.977744 iDelay=42, Bit 10, Center 18 (1 ~ 35) 35
3549 09:58:50.981306 iDelay=42, Bit 11, Center 19 (2 ~ 36) 35
3550 09:58:50.984502 iDelay=42, Bit 12, Center 22 (5 ~ 39) 35
3551 09:58:50.987829 iDelay=42, Bit 13, Center 21 (4 ~ 38) 35
3552 09:58:50.991205 iDelay=42, Bit 14, Center 20 (3 ~ 37) 35
3553 09:58:50.994489 iDelay=42, Bit 15, Center 15 (-1 ~ 32) 34
3554 09:58:50.995131 ==
3555 09:58:51.001240 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3556 09:58:51.004362 fsp= 1, odt_onoff= 1, Byte mode= 0
3557 09:58:51.004793 ==
3558 09:58:51.005125 DQS Delay:
3559 09:58:51.008116 DQS0 = 0, DQS1 = 0
3560 09:58:51.008624 DQM Delay:
3561 09:58:51.008955 DQM0 = 20, DQM1 = 18
3562 09:58:51.011390 DQ Delay:
3563 09:58:51.014636 DQ0 =24, DQ1 =24, DQ2 =17, DQ3 =14
3564 09:58:51.018048 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =20
3565 09:58:51.018526 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3566 09:58:51.024811 DQ12 =22, DQ13 =21, DQ14 =20, DQ15 =15
3567 09:58:51.025323
3568 09:58:51.025656
3569 09:58:51.025958
3570 09:58:51.026284 [DramC_TX_OE_Calibration] TA2
3571 09:58:51.028142 Original DQ_B0 (3 6) =30, OEN = 27
3572 09:58:51.031607 Original DQ_B1 (3 6) =30, OEN = 27
3573 09:58:51.034429 23, 0x0, End_B0=23 End_B1=23
3574 09:58:51.038176 24, 0x0, End_B0=24 End_B1=24
3575 09:58:51.041430 25, 0x0, End_B0=25 End_B1=25
3576 09:58:51.041947 26, 0x0, End_B0=26 End_B1=26
3577 09:58:51.045184 27, 0x0, End_B0=27 End_B1=27
3578 09:58:51.048479 28, 0x0, End_B0=28 End_B1=28
3579 09:58:51.051636 29, 0x0, End_B0=29 End_B1=29
3580 09:58:51.052150 30, 0x0, End_B0=30 End_B1=30
3581 09:58:51.054822 31, 0xFFFF, End_B0=30 End_B1=30
3582 09:58:51.061373 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3583 09:58:51.068229 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3584 09:58:51.068739
3585 09:58:51.069129
3586 09:58:51.069446 Write Rank1 MR23 =0x3f
3587 09:58:51.071232 [DQSOSC]
3588 09:58:51.078179 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3589 09:58:51.084905 CH1_RK1: MR19=0x3, MR18=0xA5, DQSOSC=337, MR23=63, INC=21, DEC=32
3590 09:58:51.085430 Write Rank1 MR23 =0x3f
3591 09:58:51.088165 [DQSOSC]
3592 09:58:51.094800 [DQSOSCAuto] RK1, (LSB)MR18= 0xa8, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
3593 09:58:51.095352 CH1 RK1: MR19=3, MR18=A8
3594 09:58:51.098185 [RxdqsGatingPostProcess] freq 1600
3595 09:58:51.104518 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3596 09:58:51.105024 Rank: 0
3597 09:58:51.107920 best DQS0 dly(2T, 0.5T) = (2, 5)
3598 09:58:51.111547 best DQS1 dly(2T, 0.5T) = (2, 5)
3599 09:58:51.114823 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3600 09:58:51.118126 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3601 09:58:51.118690 Rank: 1
3602 09:58:51.121703 best DQS0 dly(2T, 0.5T) = (2, 5)
3603 09:58:51.124690 best DQS1 dly(2T, 0.5T) = (2, 5)
3604 09:58:51.128114 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3605 09:58:51.131213 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3606 09:58:51.134424 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3607 09:58:51.138064 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3608 09:58:51.144684 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3609 09:58:51.145197
3610 09:58:51.145528
3611 09:58:51.148158 [Calibration Summary] Freqency 1600
3612 09:58:51.148660 CH 0, Rank 0
3613 09:58:51.151225 All Pass.
3614 09:58:51.151729
3615 09:58:51.152064 CH 0, Rank 1
3616 09:58:51.152370 All Pass.
3617 09:58:51.152662
3618 09:58:51.154934 CH 1, Rank 0
3619 09:58:51.155437 All Pass.
3620 09:58:51.155846
3621 09:58:51.156168 CH 1, Rank 1
3622 09:58:51.157939 All Pass.
3623 09:58:51.158409
3624 09:58:51.164796 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3625 09:58:51.171718 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3626 09:58:51.178335 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3627 09:58:51.178855 Write Rank0 MR3 =0xb0
3628 09:58:51.184960 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3629 09:58:51.191488 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3630 09:58:51.201422 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3631 09:58:51.201934 Write Rank1 MR3 =0xb0
3632 09:58:51.208082 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3633 09:58:51.214768 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3634 09:58:51.221249 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3635 09:58:51.224530 Write Rank0 MR3 =0xb0
3636 09:58:51.231110 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3637 09:58:51.237789 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3638 09:58:51.244724 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3639 09:58:51.247941 Write Rank1 MR3 =0xb0
3640 09:58:51.248369 DramC Write-DBI on
3641 09:58:51.251138 [GetDramInforAfterCalByMRR] Vendor 1.
3642 09:58:51.254742 [GetDramInforAfterCalByMRR] Revision 7.
3643 09:58:51.255168 MR8 12
3644 09:58:51.261602 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3645 09:58:51.262154 MR8 12
3646 09:58:51.268141 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3647 09:58:51.268579 MR8 12
3648 09:58:51.271071 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3649 09:58:51.271495 MR8 12
3650 09:58:51.277934 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3651 09:58:51.284548 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3652 09:58:51.287973 Write Rank0 MR13 =0xd0
3653 09:58:51.291154 Write Rank1 MR13 =0xd0
3654 09:58:51.291736 Write Rank0 MR13 =0xd0
3655 09:58:51.294603 Write Rank1 MR13 =0xd0
3656 09:58:51.297919 Save calibration result to emmc
3657 09:58:51.298406
3658 09:58:51.298738
3659 09:58:51.301328 [DramcModeReg_Check] Freq_1600, FSP_1
3660 09:58:51.301772 FSP_1, CH_0, RK0
3661 09:58:51.304650 Write Rank0 MR13 =0xd8
3662 09:58:51.308028 MR12 = 0x56 (global = 0x56) match
3663 09:58:51.311307 MR14 = 0x14 (global = 0x14) match
3664 09:58:51.311732 FSP_1, CH_0, RK1
3665 09:58:51.314919 Write Rank1 MR13 =0xd8
3666 09:58:51.317960 MR12 = 0x56 (global = 0x56) match
3667 09:58:51.321315 MR14 = 0x16 (global = 0x16) match
3668 09:58:51.321698 FSP_1, CH_1, RK0
3669 09:58:51.324905 Write Rank0 MR13 =0xd8
3670 09:58:51.328269 MR12 = 0x56 (global = 0x56) match
3671 09:58:51.331434 MR14 = 0x18 (global = 0x18) match
3672 09:58:51.331860 FSP_1, CH_1, RK1
3673 09:58:51.334800 Write Rank1 MR13 =0xd8
3674 09:58:51.337966 MR12 = 0x56 (global = 0x56) match
3675 09:58:51.341488 MR14 = 0x16 (global = 0x16) match
3676 09:58:51.341913
3677 09:58:51.345322 [MEM_TEST] 02: After DFS, before run time config
3678 09:58:51.356341 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3679 09:58:51.356832
3680 09:58:51.357158 [TA2_TEST]
3681 09:58:51.357470 === TA2 HW
3682 09:58:51.359979 TA2 PAT: XTALK
3683 09:58:51.362739 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3684 09:58:51.369595 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3685 09:58:51.372953 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3686 09:58:51.376795 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3687 09:58:51.379443
3688 09:58:51.379883
3689 09:58:51.380214 Settings after calibration
3690 09:58:51.380517
3691 09:58:51.382865 [DramcRunTimeConfig]
3692 09:58:51.386311 TransferPLLToSPMControl - MODE SW PHYPLL
3693 09:58:51.386742 TX_TRACKING: ON
3694 09:58:51.389932 RX_TRACKING: ON
3695 09:58:51.390493 HW_GATING: ON
3696 09:58:51.393250 HW_GATING DBG: OFF
3697 09:58:51.393762 ddr_geometry:1
3698 09:58:51.396301 ddr_geometry:1
3699 09:58:51.396954 ddr_geometry:1
3700 09:58:51.397308 ddr_geometry:1
3701 09:58:51.399641 ddr_geometry:1
3702 09:58:51.400066 ddr_geometry:1
3703 09:58:51.403024 ddr_geometry:1
3704 09:58:51.403498 ddr_geometry:1
3705 09:58:51.406247 High Freq DUMMY_READ_FOR_TRACKING: ON
3706 09:58:51.409935 ZQCS_ENABLE_LP4: OFF
3707 09:58:51.413299 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3708 09:58:51.416356 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3709 09:58:51.416868 SPM_CONTROL_AFTERK: ON
3710 09:58:51.419822 IMPEDANCE_TRACKING: ON
3711 09:58:51.420333 TEMP_SENSOR: ON
3712 09:58:51.422968 PER_BANK_REFRESH: ON
3713 09:58:51.423393 HW_SAVE_FOR_SR: ON
3714 09:58:51.426108 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3715 09:58:51.430011 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3716 09:58:51.433062 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3717 09:58:51.436581 Read ODT Tracking: ON
3718 09:58:51.439450 =========================
3719 09:58:51.439946
3720 09:58:51.440278 [TA2_TEST]
3721 09:58:51.440582 === TA2 HW
3722 09:58:51.446639 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3723 09:58:51.450147 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3724 09:58:51.456454 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3725 09:58:51.459546 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3726 09:58:51.460059
3727 09:58:51.462980 [MEM_TEST] 03: After run time config
3728 09:58:51.474391 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3729 09:58:51.477948 [complex_mem_test] start addr:0x40024000, len:131072
3730 09:58:51.681980 1st complex R/W mem test pass
3731 09:58:51.689103 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3732 09:58:51.691709 sync preloader write leveling
3733 09:58:51.695226 sync preloader cbt_mr12
3734 09:58:51.695803 sync preloader cbt_clk_dly
3735 09:58:51.698593 sync preloader cbt_cmd_dly
3736 09:58:51.701939 sync preloader cbt_cs
3737 09:58:51.704894 sync preloader cbt_ca_perbit_delay
3738 09:58:51.705324 sync preloader clk_delay
3739 09:58:51.708429 sync preloader dqs_delay
3740 09:58:51.712079 sync preloader u1Gating2T_Save
3741 09:58:51.715351 sync preloader u1Gating05T_Save
3742 09:58:51.718458 sync preloader u1Gatingfine_tune_Save
3743 09:58:51.721957 sync preloader u1Gatingucpass_count_Save
3744 09:58:51.725310 sync preloader u1TxWindowPerbitVref_Save
3745 09:58:51.728478 sync preloader u1TxCenter_min_Save
3746 09:58:51.732092 sync preloader u1TxCenter_max_Save
3747 09:58:51.735088 sync preloader u1Txwin_center_Save
3748 09:58:51.738645 sync preloader u1Txfirst_pass_Save
3749 09:58:51.741759 sync preloader u1Txlast_pass_Save
3750 09:58:51.742187 sync preloader u1RxDatlat_Save
3751 09:58:51.745325 sync preloader u1RxWinPerbitVref_Save
3752 09:58:51.752133 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3753 09:58:51.755201 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3754 09:58:51.758663 sync preloader delay_cell_unit
3755 09:58:51.765294 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3756 09:58:51.768496 sync preloader write leveling
3757 09:58:51.768928 sync preloader cbt_mr12
3758 09:58:51.772151 sync preloader cbt_clk_dly
3759 09:58:51.775149 sync preloader cbt_cmd_dly
3760 09:58:51.775657 sync preloader cbt_cs
3761 09:58:51.778660 sync preloader cbt_ca_perbit_delay
3762 09:58:51.782253 sync preloader clk_delay
3763 09:58:51.785004 sync preloader dqs_delay
3764 09:58:51.785432 sync preloader u1Gating2T_Save
3765 09:58:51.788677 sync preloader u1Gating05T_Save
3766 09:58:51.791906 sync preloader u1Gatingfine_tune_Save
3767 09:58:51.795368 sync preloader u1Gatingucpass_count_Save
3768 09:58:51.798608 sync preloader u1TxWindowPerbitVref_Save
3769 09:58:51.801909 sync preloader u1TxCenter_min_Save
3770 09:58:51.805272 sync preloader u1TxCenter_max_Save
3771 09:58:51.808936 sync preloader u1Txwin_center_Save
3772 09:58:51.811951 sync preloader u1Txfirst_pass_Save
3773 09:58:51.815500 sync preloader u1Txlast_pass_Save
3774 09:58:51.818669 sync preloader u1RxDatlat_Save
3775 09:58:51.822177 sync preloader u1RxWinPerbitVref_Save
3776 09:58:51.825391 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3777 09:58:51.828705 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3778 09:58:51.832334 sync preloader delay_cell_unit
3779 09:58:51.838787 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3780 09:58:51.841956 sync preloader write leveling
3781 09:58:51.845337 sync preloader cbt_mr12
3782 09:58:51.845848 sync preloader cbt_clk_dly
3783 09:58:51.848856 sync preloader cbt_cmd_dly
3784 09:58:51.852171 sync preloader cbt_cs
3785 09:58:51.855570 sync preloader cbt_ca_perbit_delay
3786 09:58:51.856088 sync preloader clk_delay
3787 09:58:51.859031 sync preloader dqs_delay
3788 09:58:51.862426 sync preloader u1Gating2T_Save
3789 09:58:51.865545 sync preloader u1Gating05T_Save
3790 09:58:51.868934 sync preloader u1Gatingfine_tune_Save
3791 09:58:51.872158 sync preloader u1Gatingucpass_count_Save
3792 09:58:51.875574 sync preloader u1TxWindowPerbitVref_Save
3793 09:58:51.879136 sync preloader u1TxCenter_min_Save
3794 09:58:51.882083 sync preloader u1TxCenter_max_Save
3795 09:58:51.885744 sync preloader u1Txwin_center_Save
3796 09:58:51.886294 sync preloader u1Txfirst_pass_Save
3797 09:58:51.888554 sync preloader u1Txlast_pass_Save
3798 09:58:51.891863 sync preloader u1RxDatlat_Save
3799 09:58:51.895546 sync preloader u1RxWinPerbitVref_Save
3800 09:58:51.898592 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3801 09:58:51.905733 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3802 09:58:51.906306 sync preloader delay_cell_unit
3803 09:58:51.912460 just_for_test_dump_coreboot_params dump all params
3804 09:58:51.912989 dump source = 0x0
3805 09:58:51.915348 dump params frequency:1600
3806 09:58:51.919042 dump params rank number:2
3807 09:58:51.919566
3808 09:58:51.922436 dump params write leveling
3809 09:58:51.922965 write leveling[0][0][0] = 0x22
3810 09:58:51.925711 write leveling[0][0][1] = 0x1c
3811 09:58:51.928906 write leveling[0][1][0] = 0x23
3812 09:58:51.932344 write leveling[0][1][1] = 0x1d
3813 09:58:51.935494 write leveling[1][0][0] = 0x25
3814 09:58:51.935939 write leveling[1][0][1] = 0x21
3815 09:58:51.938862 write leveling[1][1][0] = 0x25
3816 09:58:51.942256 write leveling[1][1][1] = 0x1f
3817 09:58:51.945776 dump params cbt_cs
3818 09:58:51.946341 cbt_cs[0][0] = 0x8
3819 09:58:51.949277 cbt_cs[0][1] = 0x8
3820 09:58:51.949801 cbt_cs[1][0] = 0xc
3821 09:58:51.952059 cbt_cs[1][1] = 0xc
3822 09:58:51.952498 dump params cbt_mr12
3823 09:58:51.955621 cbt_mr12[0][0] = 0x16
3824 09:58:51.956155 cbt_mr12[0][1] = 0x16
3825 09:58:51.958807 cbt_mr12[1][0] = 0x16
3826 09:58:51.962073 cbt_mr12[1][1] = 0x16
3827 09:58:51.962635 dump params tx window
3828 09:58:51.965641 tx_center_min[0][0][0] = 980
3829 09:58:51.969163 tx_center_max[0][0][0] = 988
3830 09:58:51.972751 tx_center_min[0][0][1] = 974
3831 09:58:51.973279 tx_center_max[0][0][1] = 979
3832 09:58:51.975764 tx_center_min[0][1][0] = 982
3833 09:58:51.979014 tx_center_max[0][1][0] = 989
3834 09:58:51.982426 tx_center_min[0][1][1] = 976
3835 09:58:51.982874 tx_center_max[0][1][1] = 981
3836 09:58:51.986019 tx_center_min[1][0][0] = 982
3837 09:58:51.989225 tx_center_max[1][0][0] = 989
3838 09:58:51.992500 tx_center_min[1][0][1] = 980
3839 09:58:51.995935 tx_center_max[1][0][1] = 982
3840 09:58:51.996466 tx_center_min[1][1][0] = 983
3841 09:58:51.999021 tx_center_max[1][1][0] = 989
3842 09:58:52.002485 tx_center_min[1][1][1] = 976
3843 09:58:52.005850 tx_center_max[1][1][1] = 980
3844 09:58:52.006430 dump params tx window
3845 09:58:52.009135 tx_win_center[0][0][0] = 988
3846 09:58:52.012524 tx_first_pass[0][0][0] = 976
3847 09:58:52.015882 tx_last_pass[0][0][0] = 1000
3848 09:58:52.019053 tx_win_center[0][0][1] = 986
3849 09:58:52.019497 tx_first_pass[0][0][1] = 975
3850 09:58:52.022286 tx_last_pass[0][0][1] = 998
3851 09:58:52.025800 tx_win_center[0][0][2] = 987
3852 09:58:52.029287 tx_first_pass[0][0][2] = 975
3853 09:58:52.029844 tx_last_pass[0][0][2] = 999
3854 09:58:52.032439 tx_win_center[0][0][3] = 980
3855 09:58:52.035583 tx_first_pass[0][0][3] = 968
3856 09:58:52.039103 tx_last_pass[0][0][3] = 992
3857 09:58:52.039635 tx_win_center[0][0][4] = 987
3858 09:58:52.042553 tx_first_pass[0][0][4] = 975
3859 09:58:52.046554 tx_last_pass[0][0][4] = 999
3860 09:58:52.049528 tx_win_center[0][0][5] = 982
3861 09:58:52.052753 tx_first_pass[0][0][5] = 970
3862 09:58:52.053284 tx_last_pass[0][0][5] = 994
3863 09:58:52.055707 tx_win_center[0][0][6] = 984
3864 09:58:52.059327 tx_first_pass[0][0][6] = 972
3865 09:58:52.062477 tx_last_pass[0][0][6] = 996
3866 09:58:52.063000 tx_win_center[0][0][7] = 985
3867 09:58:52.065914 tx_first_pass[0][0][7] = 972
3868 09:58:52.068924 tx_last_pass[0][0][7] = 998
3869 09:58:52.072559 tx_win_center[0][0][8] = 974
3870 09:58:52.075932 tx_first_pass[0][0][8] = 961
3871 09:58:52.076452 tx_last_pass[0][0][8] = 988
3872 09:58:52.079273 tx_win_center[0][0][9] = 975
3873 09:58:52.082350 tx_first_pass[0][0][9] = 963
3874 09:58:52.085917 tx_last_pass[0][0][9] = 988
3875 09:58:52.088935 tx_win_center[0][0][10] = 979
3876 09:58:52.089458 tx_first_pass[0][0][10] = 967
3877 09:58:52.092270 tx_last_pass[0][0][10] = 991
3878 09:58:52.095713 tx_win_center[0][0][11] = 975
3879 09:58:52.099030 tx_first_pass[0][0][11] = 962
3880 09:58:52.102085 tx_last_pass[0][0][11] = 988
3881 09:58:52.102570 tx_win_center[0][0][12] = 976
3882 09:58:52.105492 tx_first_pass[0][0][12] = 963
3883 09:58:52.109242 tx_last_pass[0][0][12] = 989
3884 09:58:52.112157 tx_win_center[0][0][13] = 975
3885 09:58:52.115486 tx_first_pass[0][0][13] = 963
3886 09:58:52.116014 tx_last_pass[0][0][13] = 988
3887 09:58:52.118781 tx_win_center[0][0][14] = 976
3888 09:58:52.122598 tx_first_pass[0][0][14] = 963
3889 09:58:52.125602 tx_last_pass[0][0][14] = 989
3890 09:58:52.128764 tx_win_center[0][0][15] = 978
3891 09:58:52.129213 tx_first_pass[0][0][15] = 966
3892 09:58:52.132631 tx_last_pass[0][0][15] = 990
3893 09:58:52.135493 tx_win_center[0][1][0] = 989
3894 09:58:52.139054 tx_first_pass[0][1][0] = 977
3895 09:58:52.142244 tx_last_pass[0][1][0] = 1002
3896 09:58:52.142693 tx_win_center[0][1][1] = 988
3897 09:58:52.146005 tx_first_pass[0][1][1] = 977
3898 09:58:52.148727 tx_last_pass[0][1][1] = 1000
3899 09:58:52.152248 tx_win_center[0][1][2] = 988
3900 09:58:52.152772 tx_first_pass[0][1][2] = 976
3901 09:58:52.155344 tx_last_pass[0][1][2] = 1000
3902 09:58:52.158632 tx_win_center[0][1][3] = 982
3903 09:58:52.162369 tx_first_pass[0][1][3] = 970
3904 09:58:52.165672 tx_last_pass[0][1][3] = 994
3905 09:58:52.166178 tx_win_center[0][1][4] = 988
3906 09:58:52.168865 tx_first_pass[0][1][4] = 976
3907 09:58:52.172195 tx_last_pass[0][1][4] = 1001
3908 09:58:52.175266 tx_win_center[0][1][5] = 983
3909 09:58:52.175691 tx_first_pass[0][1][5] = 971
3910 09:58:52.178996 tx_last_pass[0][1][5] = 996
3911 09:58:52.182376 tx_win_center[0][1][6] = 984
3912 09:58:52.185336 tx_first_pass[0][1][6] = 972
3913 09:58:52.188929 tx_last_pass[0][1][6] = 997
3914 09:58:52.189439 tx_win_center[0][1][7] = 986
3915 09:58:52.192419 tx_first_pass[0][1][7] = 975
3916 09:58:52.195716 tx_last_pass[0][1][7] = 998
3917 09:58:52.198909 tx_win_center[0][1][8] = 976
3918 09:58:52.199495 tx_first_pass[0][1][8] = 963
3919 09:58:52.202081 tx_last_pass[0][1][8] = 990
3920 09:58:52.205364 tx_win_center[0][1][9] = 978
3921 09:58:52.209129 tx_first_pass[0][1][9] = 966
3922 09:58:52.212041 tx_last_pass[0][1][9] = 990
3923 09:58:52.212474 tx_win_center[0][1][10] = 981
3924 09:58:52.215426 tx_first_pass[0][1][10] = 969
3925 09:58:52.218922 tx_last_pass[0][1][10] = 993
3926 09:58:52.222159 tx_win_center[0][1][11] = 977
3927 09:58:52.225906 tx_first_pass[0][1][11] = 965
3928 09:58:52.226510 tx_last_pass[0][1][11] = 990
3929 09:58:52.228981 tx_win_center[0][1][12] = 978
3930 09:58:52.232473 tx_first_pass[0][1][12] = 966
3931 09:58:52.235548 tx_last_pass[0][1][12] = 990
3932 09:58:52.238825 tx_win_center[0][1][13] = 977
3933 09:58:52.239256 tx_first_pass[0][1][13] = 965
3934 09:58:52.242064 tx_last_pass[0][1][13] = 990
3935 09:58:52.245732 tx_win_center[0][1][14] = 977
3936 09:58:52.249247 tx_first_pass[0][1][14] = 965
3937 09:58:52.252578 tx_last_pass[0][1][14] = 990
3938 09:58:52.253085 tx_win_center[0][1][15] = 979
3939 09:58:52.255534 tx_first_pass[0][1][15] = 967
3940 09:58:52.259081 tx_last_pass[0][1][15] = 991
3941 09:58:52.262620 tx_win_center[1][0][0] = 989
3942 09:58:52.263289 tx_first_pass[1][0][0] = 977
3943 09:58:52.265748 tx_last_pass[1][0][0] = 1001
3944 09:58:52.268910 tx_win_center[1][0][1] = 987
3945 09:58:52.272723 tx_first_pass[1][0][1] = 976
3946 09:58:52.275910 tx_last_pass[1][0][1] = 999
3947 09:58:52.276417 tx_win_center[1][0][2] = 985
3948 09:58:52.279219 tx_first_pass[1][0][2] = 973
3949 09:58:52.282874 tx_last_pass[1][0][2] = 997
3950 09:58:52.285797 tx_win_center[1][0][3] = 982
3951 09:58:52.286351 tx_first_pass[1][0][3] = 970
3952 09:58:52.289123 tx_last_pass[1][0][3] = 994
3953 09:58:52.292456 tx_win_center[1][0][4] = 986
3954 09:58:52.295756 tx_first_pass[1][0][4] = 975
3955 09:58:52.299201 tx_last_pass[1][0][4] = 998
3956 09:58:52.299706 tx_win_center[1][0][5] = 987
3957 09:58:52.302098 tx_first_pass[1][0][5] = 976
3958 09:58:52.305763 tx_last_pass[1][0][5] = 999
3959 09:58:52.308966 tx_win_center[1][0][6] = 988
3960 09:58:52.309416 tx_first_pass[1][0][6] = 976
3961 09:58:52.312212 tx_last_pass[1][0][6] = 1000
3962 09:58:52.315876 tx_win_center[1][0][7] = 986
3963 09:58:52.318896 tx_first_pass[1][0][7] = 975
3964 09:58:52.322674 tx_last_pass[1][0][7] = 998
3965 09:58:52.323120 tx_win_center[1][0][8] = 980
3966 09:58:52.325423 tx_first_pass[1][0][8] = 969
3967 09:58:52.328905 tx_last_pass[1][0][8] = 992
3968 09:58:52.332458 tx_win_center[1][0][9] = 980
3969 09:58:52.332985 tx_first_pass[1][0][9] = 969
3970 09:58:52.335736 tx_last_pass[1][0][9] = 992
3971 09:58:52.338921 tx_win_center[1][0][10] = 981
3972 09:58:52.342467 tx_first_pass[1][0][10] = 970
3973 09:58:52.345842 tx_last_pass[1][0][10] = 993
3974 09:58:52.346411 tx_win_center[1][0][11] = 982
3975 09:58:52.349418 tx_first_pass[1][0][11] = 971
3976 09:58:52.352557 tx_last_pass[1][0][11] = 994
3977 09:58:52.355861 tx_win_center[1][0][12] = 982
3978 09:58:52.359408 tx_first_pass[1][0][12] = 971
3979 09:58:52.359961 tx_last_pass[1][0][12] = 994
3980 09:58:52.362823 tx_win_center[1][0][13] = 982
3981 09:58:52.365785 tx_first_pass[1][0][13] = 971
3982 09:58:52.369069 tx_last_pass[1][0][13] = 993
3983 09:58:52.372793 tx_win_center[1][0][14] = 981
3984 09:58:52.373320 tx_first_pass[1][0][14] = 970
3985 09:58:52.375787 tx_last_pass[1][0][14] = 993
3986 09:58:52.379842 tx_win_center[1][0][15] = 980
3987 09:58:52.382744 tx_first_pass[1][0][15] = 968
3988 09:58:52.386061 tx_last_pass[1][0][15] = 992
3989 09:58:52.386621 tx_win_center[1][1][0] = 989
3990 09:58:52.389444 tx_first_pass[1][1][0] = 976
3991 09:58:52.392441 tx_last_pass[1][1][0] = 1002
3992 09:58:52.395900 tx_win_center[1][1][1] = 987
3993 09:58:52.399285 tx_first_pass[1][1][1] = 975
3994 09:58:52.399728 tx_last_pass[1][1][1] = 999
3995 09:58:52.402461 tx_win_center[1][1][2] = 984
3996 09:58:52.406193 tx_first_pass[1][1][2] = 971
3997 09:58:52.409180 tx_last_pass[1][1][2] = 997
3998 09:58:52.409645 tx_win_center[1][1][3] = 983
3999 09:58:52.412356 tx_first_pass[1][1][3] = 970
4000 09:58:52.415849 tx_last_pass[1][1][3] = 997
4001 09:58:52.419163 tx_win_center[1][1][4] = 986
4002 09:58:52.419630 tx_first_pass[1][1][4] = 974
4003 09:58:52.422498 tx_last_pass[1][1][4] = 998
4004 09:58:52.425734 tx_win_center[1][1][5] = 988
4005 09:58:52.429058 tx_first_pass[1][1][5] = 976
4006 09:58:52.432505 tx_last_pass[1][1][5] = 1001
4007 09:58:52.432948 tx_win_center[1][1][6] = 988
4008 09:58:52.435847 tx_first_pass[1][1][6] = 976
4009 09:58:52.439226 tx_last_pass[1][1][6] = 1001
4010 09:58:52.442484 tx_win_center[1][1][7] = 986
4011 09:58:52.442989 tx_first_pass[1][1][7] = 974
4012 09:58:52.445852 tx_last_pass[1][1][7] = 998
4013 09:58:52.449298 tx_win_center[1][1][8] = 979
4014 09:58:52.452812 tx_first_pass[1][1][8] = 966
4015 09:58:52.456020 tx_last_pass[1][1][8] = 992
4016 09:58:52.456551 tx_win_center[1][1][9] = 978
4017 09:58:52.459274 tx_first_pass[1][1][9] = 966
4018 09:58:52.462416 tx_last_pass[1][1][9] = 991
4019 09:58:52.465700 tx_win_center[1][1][10] = 979
4020 09:58:52.469352 tx_first_pass[1][1][10] = 967
4021 09:58:52.469880 tx_last_pass[1][1][10] = 991
4022 09:58:52.472556 tx_win_center[1][1][11] = 980
4023 09:58:52.475950 tx_first_pass[1][1][11] = 969
4024 09:58:52.479008 tx_last_pass[1][1][11] = 992
4025 09:58:52.482279 tx_win_center[1][1][12] = 980
4026 09:58:52.482712 tx_first_pass[1][1][12] = 969
4027 09:58:52.485839 tx_last_pass[1][1][12] = 992
4028 09:58:52.489405 tx_win_center[1][1][13] = 980
4029 09:58:52.492651 tx_first_pass[1][1][13] = 968
4030 09:58:52.495732 tx_last_pass[1][1][13] = 992
4031 09:58:52.496250 tx_win_center[1][1][14] = 980
4032 09:58:52.499293 tx_first_pass[1][1][14] = 968
4033 09:58:52.502543 tx_last_pass[1][1][14] = 992
4034 09:58:52.505817 tx_win_center[1][1][15] = 976
4035 09:58:52.509332 tx_first_pass[1][1][15] = 963
4036 09:58:52.509919 tx_last_pass[1][1][15] = 990
4037 09:58:52.512572 dump params rx window
4038 09:58:52.515831 rx_firspass[0][0][0] = 8
4039 09:58:52.516276 rx_lastpass[0][0][0] = 40
4040 09:58:52.519191 rx_firspass[0][0][1] = 7
4041 09:58:52.522453 rx_lastpass[0][0][1] = 39
4042 09:58:52.522897 rx_firspass[0][0][2] = 9
4043 09:58:52.525752 rx_lastpass[0][0][2] = 38
4044 09:58:52.529214 rx_firspass[0][0][3] = -3
4045 09:58:52.532489 rx_lastpass[0][0][3] = 28
4046 09:58:52.533013 rx_firspass[0][0][4] = 6
4047 09:58:52.535720 rx_lastpass[0][0][4] = 38
4048 09:58:52.539151 rx_firspass[0][0][5] = 0
4049 09:58:52.539591 rx_lastpass[0][0][5] = 30
4050 09:58:52.542879 rx_firspass[0][0][6] = 1
4051 09:58:52.546334 rx_lastpass[0][0][6] = 32
4052 09:58:52.546858 rx_firspass[0][0][7] = 4
4053 09:58:52.549135 rx_lastpass[0][0][7] = 32
4054 09:58:52.552852 rx_firspass[0][0][8] = 0
4055 09:58:52.553378 rx_lastpass[0][0][8] = 34
4056 09:58:52.556139 rx_firspass[0][0][9] = 4
4057 09:58:52.559197 rx_lastpass[0][0][9] = 34
4058 09:58:52.562966 rx_firspass[0][0][10] = 6
4059 09:58:52.563498 rx_lastpass[0][0][10] = 38
4060 09:58:52.565832 rx_firspass[0][0][11] = 1
4061 09:58:52.569368 rx_lastpass[0][0][11] = 34
4062 09:58:52.569812 rx_firspass[0][0][12] = 2
4063 09:58:52.572912 rx_lastpass[0][0][12] = 36
4064 09:58:52.575969 rx_firspass[0][0][13] = 3
4065 09:58:52.579131 rx_lastpass[0][0][13] = 30
4066 09:58:52.579573 rx_firspass[0][0][14] = 0
4067 09:58:52.582414 rx_lastpass[0][0][14] = 35
4068 09:58:52.585847 rx_firspass[0][0][15] = 3
4069 09:58:52.589740 rx_lastpass[0][0][15] = 36
4070 09:58:52.590299 rx_firspass[0][1][0] = 7
4071 09:58:52.592417 rx_lastpass[0][1][0] = 41
4072 09:58:52.596198 rx_firspass[0][1][1] = 5
4073 09:58:52.596735 rx_lastpass[0][1][1] = 40
4074 09:58:52.598975 rx_firspass[0][1][2] = 8
4075 09:58:52.602845 rx_lastpass[0][1][2] = 39
4076 09:58:52.603321 rx_firspass[0][1][3] = -4
4077 09:58:52.605998 rx_lastpass[0][1][3] = 31
4078 09:58:52.609808 rx_firspass[0][1][4] = 7
4079 09:58:52.612631 rx_lastpass[0][1][4] = 40
4080 09:58:52.613189 rx_firspass[0][1][5] = -1
4081 09:58:52.615868 rx_lastpass[0][1][5] = 33
4082 09:58:52.619271 rx_firspass[0][1][6] = 2
4083 09:58:52.619704 rx_lastpass[0][1][6] = 34
4084 09:58:52.622455 rx_firspass[0][1][7] = 3
4085 09:58:52.626055 rx_lastpass[0][1][7] = 34
4086 09:58:52.626529 rx_firspass[0][1][8] = 0
4087 09:58:52.629502 rx_lastpass[0][1][8] = 35
4088 09:58:52.632586 rx_firspass[0][1][9] = 3
4089 09:58:52.635784 rx_lastpass[0][1][9] = 36
4090 09:58:52.636250 rx_firspass[0][1][10] = 6
4091 09:58:52.639081 rx_lastpass[0][1][10] = 39
4092 09:58:52.642427 rx_firspass[0][1][11] = 0
4093 09:58:52.643041 rx_lastpass[0][1][11] = 34
4094 09:58:52.646162 rx_firspass[0][1][12] = 3
4095 09:58:52.649067 rx_lastpass[0][1][12] = 36
4096 09:58:52.652778 rx_firspass[0][1][13] = 2
4097 09:58:52.653292 rx_lastpass[0][1][13] = 33
4098 09:58:52.656055 rx_firspass[0][1][14] = 2
4099 09:58:52.659145 rx_lastpass[0][1][14] = 34
4100 09:58:52.662738 rx_firspass[0][1][15] = 3
4101 09:58:52.663249 rx_lastpass[0][1][15] = 37
4102 09:58:52.666172 rx_firspass[1][0][0] = 8
4103 09:58:52.669206 rx_lastpass[1][0][0] = 39
4104 09:58:52.669636 rx_firspass[1][0][1] = 7
4105 09:58:52.672742 rx_lastpass[1][0][1] = 39
4106 09:58:52.676228 rx_firspass[1][0][2] = 0
4107 09:58:52.676741 rx_lastpass[1][0][2] = 34
4108 09:58:52.678808 rx_firspass[1][0][3] = -2
4109 09:58:52.682713 rx_lastpass[1][0][3] = 32
4110 09:58:52.686037 rx_firspass[1][0][4] = 4
4111 09:58:52.686588 rx_lastpass[1][0][4] = 34
4112 09:58:52.689239 rx_firspass[1][0][5] = 8
4113 09:58:52.692780 rx_lastpass[1][0][5] = 40
4114 09:58:52.693292 rx_firspass[1][0][6] = 9
4115 09:58:52.695903 rx_lastpass[1][0][6] = 40
4116 09:58:52.699194 rx_firspass[1][0][7] = 4
4117 09:58:52.702585 rx_lastpass[1][0][7] = 35
4118 09:58:52.703102 rx_firspass[1][0][8] = 1
4119 09:58:52.705813 rx_lastpass[1][0][8] = 35
4120 09:58:52.709227 rx_firspass[1][0][9] = 0
4121 09:58:52.709734 rx_lastpass[1][0][9] = 35
4122 09:58:52.712437 rx_firspass[1][0][10] = 2
4123 09:58:52.715890 rx_lastpass[1][0][10] = 33
4124 09:58:52.716398 rx_firspass[1][0][11] = 2
4125 09:58:52.718903 rx_lastpass[1][0][11] = 36
4126 09:58:52.722754 rx_firspass[1][0][12] = 5
4127 09:58:52.725876 rx_lastpass[1][0][12] = 37
4128 09:58:52.726347 rx_firspass[1][0][13] = 3
4129 09:58:52.729521 rx_lastpass[1][0][13] = 35
4130 09:58:52.732658 rx_firspass[1][0][14] = 4
4131 09:58:52.735741 rx_lastpass[1][0][14] = 35
4132 09:58:52.736172 rx_firspass[1][0][15] = -1
4133 09:58:52.739081 rx_lastpass[1][0][15] = 30
4134 09:58:52.742778 rx_firspass[1][1][0] = 8
4135 09:58:52.743297 rx_lastpass[1][1][0] = 41
4136 09:58:52.746151 rx_firspass[1][1][1] = 7
4137 09:58:52.749498 rx_lastpass[1][1][1] = 41
4138 09:58:52.750028 rx_firspass[1][1][2] = 0
4139 09:58:52.752481 rx_lastpass[1][1][2] = 35
4140 09:58:52.756030 rx_firspass[1][1][3] = -3
4141 09:58:52.759394 rx_lastpass[1][1][3] = 32
4142 09:58:52.759942 rx_firspass[1][1][4] = 4
4143 09:58:52.762608 rx_lastpass[1][1][4] = 36
4144 09:58:52.765888 rx_firspass[1][1][5] = 7
4145 09:58:52.766360 rx_lastpass[1][1][5] = 40
4146 09:58:52.769292 rx_firspass[1][1][6] = 8
4147 09:58:52.772970 rx_lastpass[1][1][6] = 41
4148 09:58:52.773482 rx_firspass[1][1][7] = 4
4149 09:58:52.776110 rx_lastpass[1][1][7] = 37
4150 09:58:52.779646 rx_firspass[1][1][8] = 1
4151 09:58:52.782867 rx_lastpass[1][1][8] = 36
4152 09:58:52.783375 rx_firspass[1][1][9] = 1
4153 09:58:52.786144 rx_lastpass[1][1][9] = 36
4154 09:58:52.789623 rx_firspass[1][1][10] = 1
4155 09:58:52.790127 rx_lastpass[1][1][10] = 35
4156 09:58:52.792563 rx_firspass[1][1][11] = 2
4157 09:58:52.796083 rx_lastpass[1][1][11] = 36
4158 09:58:52.799477 rx_firspass[1][1][12] = 5
4159 09:58:52.799981 rx_lastpass[1][1][12] = 39
4160 09:58:52.802981 rx_firspass[1][1][13] = 4
4161 09:58:52.805911 rx_lastpass[1][1][13] = 38
4162 09:58:52.806385 rx_firspass[1][1][14] = 3
4163 09:58:52.809596 rx_lastpass[1][1][14] = 37
4164 09:58:52.812732 rx_firspass[1][1][15] = -1
4165 09:58:52.816144 rx_lastpass[1][1][15] = 32
4166 09:58:52.816573 dump params clk_delay
4167 09:58:52.819584 clk_delay[0] = 0
4168 09:58:52.820096 clk_delay[1] = 0
4169 09:58:52.822540 dump params dqs_delay
4170 09:58:52.822970 dqs_delay[0][0] = -1
4171 09:58:52.826246 dqs_delay[0][1] = 0
4172 09:58:52.826761 dqs_delay[1][0] = 0
4173 09:58:52.829047 dqs_delay[1][1] = 1
4174 09:58:52.832843 dump params delay_cell_unit = 753
4175 09:58:52.833348 dump source = 0x0
4176 09:58:52.836162 dump params frequency:1200
4177 09:58:52.839320 dump params rank number:2
4178 09:58:52.839750
4179 09:58:52.843032 dump params write leveling
4180 09:58:52.843465 write leveling[0][0][0] = 0x0
4181 09:58:52.846441 write leveling[0][0][1] = 0x0
4182 09:58:52.849425 write leveling[0][1][0] = 0x0
4183 09:58:52.852940 write leveling[0][1][1] = 0x0
4184 09:58:52.856101 write leveling[1][0][0] = 0x0
4185 09:58:52.856526 write leveling[1][0][1] = 0x0
4186 09:58:52.859609 write leveling[1][1][0] = 0x0
4187 09:58:52.863063 write leveling[1][1][1] = 0x0
4188 09:58:52.863590 dump params cbt_cs
4189 09:58:52.866145 cbt_cs[0][0] = 0x0
4190 09:58:52.869518 cbt_cs[0][1] = 0x0
4191 09:58:52.870055 cbt_cs[1][0] = 0x0
4192 09:58:52.872767 cbt_cs[1][1] = 0x0
4193 09:58:52.873284 dump params cbt_mr12
4194 09:58:52.876378 cbt_mr12[0][0] = 0x0
4195 09:58:52.876894 cbt_mr12[0][1] = 0x0
4196 09:58:52.879876 cbt_mr12[1][0] = 0x0
4197 09:58:52.880393 cbt_mr12[1][1] = 0x0
4198 09:58:52.882980 dump params tx window
4199 09:58:52.886489 tx_center_min[0][0][0] = 0
4200 09:58:52.887005 tx_center_max[0][0][0] = 0
4201 09:58:52.889730 tx_center_min[0][0][1] = 0
4202 09:58:52.893033 tx_center_max[0][0][1] = 0
4203 09:58:52.895992 tx_center_min[0][1][0] = 0
4204 09:58:52.896424 tx_center_max[0][1][0] = 0
4205 09:58:52.899554 tx_center_min[0][1][1] = 0
4206 09:58:52.903511 tx_center_max[0][1][1] = 0
4207 09:58:52.906006 tx_center_min[1][0][0] = 0
4208 09:58:52.906534 tx_center_max[1][0][0] = 0
4209 09:58:52.909556 tx_center_min[1][0][1] = 0
4210 09:58:52.912792 tx_center_max[1][0][1] = 0
4211 09:58:52.916136 tx_center_min[1][1][0] = 0
4212 09:58:52.916565 tx_center_max[1][1][0] = 0
4213 09:58:52.919803 tx_center_min[1][1][1] = 0
4214 09:58:52.922997 tx_center_max[1][1][1] = 0
4215 09:58:52.923430 dump params tx window
4216 09:58:52.926099 tx_win_center[0][0][0] = 0
4217 09:58:52.929502 tx_first_pass[0][0][0] = 0
4218 09:58:52.929801 tx_last_pass[0][0][0] = 0
4219 09:58:52.933091 tx_win_center[0][0][1] = 0
4220 09:58:52.936121 tx_first_pass[0][0][1] = 0
4221 09:58:52.939512 tx_last_pass[0][0][1] = 0
4222 09:58:52.939904 tx_win_center[0][0][2] = 0
4223 09:58:52.942877 tx_first_pass[0][0][2] = 0
4224 09:58:52.946250 tx_last_pass[0][0][2] = 0
4225 09:58:52.949948 tx_win_center[0][0][3] = 0
4226 09:58:52.950366 tx_first_pass[0][0][3] = 0
4227 09:58:52.953026 tx_last_pass[0][0][3] = 0
4228 09:58:52.956629 tx_win_center[0][0][4] = 0
4229 09:58:52.957016 tx_first_pass[0][0][4] = 0
4230 09:58:52.959738 tx_last_pass[0][0][4] = 0
4231 09:58:52.963038 tx_win_center[0][0][5] = 0
4232 09:58:52.966403 tx_first_pass[0][0][5] = 0
4233 09:58:52.966787 tx_last_pass[0][0][5] = 0
4234 09:58:52.969768 tx_win_center[0][0][6] = 0
4235 09:58:52.972911 tx_first_pass[0][0][6] = 0
4236 09:58:52.973212 tx_last_pass[0][0][6] = 0
4237 09:58:52.976466 tx_win_center[0][0][7] = 0
4238 09:58:52.980100 tx_first_pass[0][0][7] = 0
4239 09:58:52.983138 tx_last_pass[0][0][7] = 0
4240 09:58:52.983690 tx_win_center[0][0][8] = 0
4241 09:58:52.986254 tx_first_pass[0][0][8] = 0
4242 09:58:52.989631 tx_last_pass[0][0][8] = 0
4243 09:58:52.992985 tx_win_center[0][0][9] = 0
4244 09:58:52.993493 tx_first_pass[0][0][9] = 0
4245 09:58:52.996587 tx_last_pass[0][0][9] = 0
4246 09:58:52.999500 tx_win_center[0][0][10] = 0
4247 09:58:53.003079 tx_first_pass[0][0][10] = 0
4248 09:58:53.003595 tx_last_pass[0][0][10] = 0
4249 09:58:53.006159 tx_win_center[0][0][11] = 0
4250 09:58:53.009726 tx_first_pass[0][0][11] = 0
4251 09:58:53.010154 tx_last_pass[0][0][11] = 0
4252 09:58:53.012872 tx_win_center[0][0][12] = 0
4253 09:58:53.016370 tx_first_pass[0][0][12] = 0
4254 09:58:53.020160 tx_last_pass[0][0][12] = 0
4255 09:58:53.020669 tx_win_center[0][0][13] = 0
4256 09:58:53.023359 tx_first_pass[0][0][13] = 0
4257 09:58:53.026688 tx_last_pass[0][0][13] = 0
4258 09:58:53.029944 tx_win_center[0][0][14] = 0
4259 09:58:53.030507 tx_first_pass[0][0][14] = 0
4260 09:58:53.033490 tx_last_pass[0][0][14] = 0
4261 09:58:53.036938 tx_win_center[0][0][15] = 0
4262 09:58:53.039669 tx_first_pass[0][0][15] = 0
4263 09:58:53.040098 tx_last_pass[0][0][15] = 0
4264 09:58:53.043178 tx_win_center[0][1][0] = 0
4265 09:58:53.046756 tx_first_pass[0][1][0] = 0
4266 09:58:53.050148 tx_last_pass[0][1][0] = 0
4267 09:58:53.050697 tx_win_center[0][1][1] = 0
4268 09:58:53.053450 tx_first_pass[0][1][1] = 0
4269 09:58:53.056722 tx_last_pass[0][1][1] = 0
4270 09:58:53.057233 tx_win_center[0][1][2] = 0
4271 09:58:53.060250 tx_first_pass[0][1][2] = 0
4272 09:58:53.063626 tx_last_pass[0][1][2] = 0
4273 09:58:53.066751 tx_win_center[0][1][3] = 0
4274 09:58:53.067258 tx_first_pass[0][1][3] = 0
4275 09:58:53.070417 tx_last_pass[0][1][3] = 0
4276 09:58:53.073852 tx_win_center[0][1][4] = 0
4277 09:58:53.076792 tx_first_pass[0][1][4] = 0
4278 09:58:53.077292 tx_last_pass[0][1][4] = 0
4279 09:58:53.079929 tx_win_center[0][1][5] = 0
4280 09:58:53.083421 tx_first_pass[0][1][5] = 0
4281 09:58:53.083922 tx_last_pass[0][1][5] = 0
4282 09:58:53.086621 tx_win_center[0][1][6] = 0
4283 09:58:53.090083 tx_first_pass[0][1][6] = 0
4284 09:58:53.093597 tx_last_pass[0][1][6] = 0
4285 09:58:53.094101 tx_win_center[0][1][7] = 0
4286 09:58:53.096892 tx_first_pass[0][1][7] = 0
4287 09:58:53.099969 tx_last_pass[0][1][7] = 0
4288 09:58:53.100520 tx_win_center[0][1][8] = 0
4289 09:58:53.103508 tx_first_pass[0][1][8] = 0
4290 09:58:53.106683 tx_last_pass[0][1][8] = 0
4291 09:58:53.110165 tx_win_center[0][1][9] = 0
4292 09:58:53.110716 tx_first_pass[0][1][9] = 0
4293 09:58:53.113157 tx_last_pass[0][1][9] = 0
4294 09:58:53.117011 tx_win_center[0][1][10] = 0
4295 09:58:53.120259 tx_first_pass[0][1][10] = 0
4296 09:58:53.120764 tx_last_pass[0][1][10] = 0
4297 09:58:53.123534 tx_win_center[0][1][11] = 0
4298 09:58:53.127066 tx_first_pass[0][1][11] = 0
4299 09:58:53.130029 tx_last_pass[0][1][11] = 0
4300 09:58:53.130490 tx_win_center[0][1][12] = 0
4301 09:58:53.133523 tx_first_pass[0][1][12] = 0
4302 09:58:53.137279 tx_last_pass[0][1][12] = 0
4303 09:58:53.140029 tx_win_center[0][1][13] = 0
4304 09:58:53.140453 tx_first_pass[0][1][13] = 0
4305 09:58:53.143370 tx_last_pass[0][1][13] = 0
4306 09:58:53.146700 tx_win_center[0][1][14] = 0
4307 09:58:53.150296 tx_first_pass[0][1][14] = 0
4308 09:58:53.150803 tx_last_pass[0][1][14] = 0
4309 09:58:53.153639 tx_win_center[0][1][15] = 0
4310 09:58:53.156881 tx_first_pass[0][1][15] = 0
4311 09:58:53.160177 tx_last_pass[0][1][15] = 0
4312 09:58:53.160679 tx_win_center[1][0][0] = 0
4313 09:58:53.163618 tx_first_pass[1][0][0] = 0
4314 09:58:53.167088 tx_last_pass[1][0][0] = 0
4315 09:58:53.167587 tx_win_center[1][0][1] = 0
4316 09:58:53.170380 tx_first_pass[1][0][1] = 0
4317 09:58:53.173724 tx_last_pass[1][0][1] = 0
4318 09:58:53.176910 tx_win_center[1][0][2] = 0
4319 09:58:53.177430 tx_first_pass[1][0][2] = 0
4320 09:58:53.180391 tx_last_pass[1][0][2] = 0
4321 09:58:53.183721 tx_win_center[1][0][3] = 0
4322 09:58:53.186774 tx_first_pass[1][0][3] = 0
4323 09:58:53.187198 tx_last_pass[1][0][3] = 0
4324 09:58:53.190734 tx_win_center[1][0][4] = 0
4325 09:58:53.193862 tx_first_pass[1][0][4] = 0
4326 09:58:53.194405 tx_last_pass[1][0][4] = 0
4327 09:58:53.197082 tx_win_center[1][0][5] = 0
4328 09:58:53.200680 tx_first_pass[1][0][5] = 0
4329 09:58:53.203744 tx_last_pass[1][0][5] = 0
4330 09:58:53.204251 tx_win_center[1][0][6] = 0
4331 09:58:53.207183 tx_first_pass[1][0][6] = 0
4332 09:58:53.210122 tx_last_pass[1][0][6] = 0
4333 09:58:53.210611 tx_win_center[1][0][7] = 0
4334 09:58:53.213456 tx_first_pass[1][0][7] = 0
4335 09:58:53.217291 tx_last_pass[1][0][7] = 0
4336 09:58:53.220244 tx_win_center[1][0][8] = 0
4337 09:58:53.220768 tx_first_pass[1][0][8] = 0
4338 09:58:53.223641 tx_last_pass[1][0][8] = 0
4339 09:58:53.226889 tx_win_center[1][0][9] = 0
4340 09:58:53.230510 tx_first_pass[1][0][9] = 0
4341 09:58:53.231105 tx_last_pass[1][0][9] = 0
4342 09:58:53.233911 tx_win_center[1][0][10] = 0
4343 09:58:53.237365 tx_first_pass[1][0][10] = 0
4344 09:58:53.237877 tx_last_pass[1][0][10] = 0
4345 09:58:53.240330 tx_win_center[1][0][11] = 0
4346 09:58:53.243685 tx_first_pass[1][0][11] = 0
4347 09:58:53.246993 tx_last_pass[1][0][11] = 0
4348 09:58:53.247425 tx_win_center[1][0][12] = 0
4349 09:58:53.250491 tx_first_pass[1][0][12] = 0
4350 09:58:53.253919 tx_last_pass[1][0][12] = 0
4351 09:58:53.257225 tx_win_center[1][0][13] = 0
4352 09:58:53.257735 tx_first_pass[1][0][13] = 0
4353 09:58:53.260375 tx_last_pass[1][0][13] = 0
4354 09:58:53.264147 tx_win_center[1][0][14] = 0
4355 09:58:53.267021 tx_first_pass[1][0][14] = 0
4356 09:58:53.267528 tx_last_pass[1][0][14] = 0
4357 09:58:53.270455 tx_win_center[1][0][15] = 0
4358 09:58:53.274300 tx_first_pass[1][0][15] = 0
4359 09:58:53.277083 tx_last_pass[1][0][15] = 0
4360 09:58:53.277592 tx_win_center[1][1][0] = 0
4361 09:58:53.280626 tx_first_pass[1][1][0] = 0
4362 09:58:53.283807 tx_last_pass[1][1][0] = 0
4363 09:58:53.287203 tx_win_center[1][1][1] = 0
4364 09:58:53.287630 tx_first_pass[1][1][1] = 0
4365 09:58:53.290492 tx_last_pass[1][1][1] = 0
4366 09:58:53.293920 tx_win_center[1][1][2] = 0
4367 09:58:53.297250 tx_first_pass[1][1][2] = 0
4368 09:58:53.297759 tx_last_pass[1][1][2] = 0
4369 09:58:53.300425 tx_win_center[1][1][3] = 0
4370 09:58:53.303966 tx_first_pass[1][1][3] = 0
4371 09:58:53.304476 tx_last_pass[1][1][3] = 0
4372 09:58:53.307014 tx_win_center[1][1][4] = 0
4373 09:58:53.310344 tx_first_pass[1][1][4] = 0
4374 09:58:53.313917 tx_last_pass[1][1][4] = 0
4375 09:58:53.314589 tx_win_center[1][1][5] = 0
4376 09:58:53.317192 tx_first_pass[1][1][5] = 0
4377 09:58:53.320488 tx_last_pass[1][1][5] = 0
4378 09:58:53.320928 tx_win_center[1][1][6] = 0
4379 09:58:53.323885 tx_first_pass[1][1][6] = 0
4380 09:58:53.326955 tx_last_pass[1][1][6] = 0
4381 09:58:53.330381 tx_win_center[1][1][7] = 0
4382 09:58:53.330820 tx_first_pass[1][1][7] = 0
4383 09:58:53.334069 tx_last_pass[1][1][7] = 0
4384 09:58:53.337142 tx_win_center[1][1][8] = 0
4385 09:58:53.337634 tx_first_pass[1][1][8] = 0
4386 09:58:53.340547 tx_last_pass[1][1][8] = 0
4387 09:58:53.343796 tx_win_center[1][1][9] = 0
4388 09:58:53.347128 tx_first_pass[1][1][9] = 0
4389 09:58:53.347657 tx_last_pass[1][1][9] = 0
4390 09:58:53.350614 tx_win_center[1][1][10] = 0
4391 09:58:53.353921 tx_first_pass[1][1][10] = 0
4392 09:58:53.357512 tx_last_pass[1][1][10] = 0
4393 09:58:53.358035 tx_win_center[1][1][11] = 0
4394 09:58:53.360984 tx_first_pass[1][1][11] = 0
4395 09:58:53.363953 tx_last_pass[1][1][11] = 0
4396 09:58:53.367347 tx_win_center[1][1][12] = 0
4397 09:58:53.367877 tx_first_pass[1][1][12] = 0
4398 09:58:53.370567 tx_last_pass[1][1][12] = 0
4399 09:58:53.373935 tx_win_center[1][1][13] = 0
4400 09:58:53.377270 tx_first_pass[1][1][13] = 0
4401 09:58:53.377789 tx_last_pass[1][1][13] = 0
4402 09:58:53.380771 tx_win_center[1][1][14] = 0
4403 09:58:53.384036 tx_first_pass[1][1][14] = 0
4404 09:58:53.387308 tx_last_pass[1][1][14] = 0
4405 09:58:53.387750 tx_win_center[1][1][15] = 0
4406 09:58:53.390890 tx_first_pass[1][1][15] = 0
4407 09:58:53.394436 tx_last_pass[1][1][15] = 0
4408 09:58:53.394946 dump params rx window
4409 09:58:53.397725 rx_firspass[0][0][0] = 0
4410 09:58:53.400981 rx_lastpass[0][0][0] = 0
4411 09:58:53.401486 rx_firspass[0][0][1] = 0
4412 09:58:53.404141 rx_lastpass[0][0][1] = 0
4413 09:58:53.407338 rx_firspass[0][0][2] = 0
4414 09:58:53.410630 rx_lastpass[0][0][2] = 0
4415 09:58:53.411070 rx_firspass[0][0][3] = 0
4416 09:58:53.414271 rx_lastpass[0][0][3] = 0
4417 09:58:53.417706 rx_firspass[0][0][4] = 0
4418 09:58:53.418205 rx_lastpass[0][0][4] = 0
4419 09:58:53.420882 rx_firspass[0][0][5] = 0
4420 09:58:53.424141 rx_lastpass[0][0][5] = 0
4421 09:58:53.424644 rx_firspass[0][0][6] = 0
4422 09:58:53.427204 rx_lastpass[0][0][6] = 0
4423 09:58:53.430803 rx_firspass[0][0][7] = 0
4424 09:58:53.431235 rx_lastpass[0][0][7] = 0
4425 09:58:53.434421 rx_firspass[0][0][8] = 0
4426 09:58:53.437310 rx_lastpass[0][0][8] = 0
4427 09:58:53.437812 rx_firspass[0][0][9] = 0
4428 09:58:53.440411 rx_lastpass[0][0][9] = 0
4429 09:58:53.443779 rx_firspass[0][0][10] = 0
4430 09:58:53.447403 rx_lastpass[0][0][10] = 0
4431 09:58:53.447912 rx_firspass[0][0][11] = 0
4432 09:58:53.451169 rx_lastpass[0][0][11] = 0
4433 09:58:53.454400 rx_firspass[0][0][12] = 0
4434 09:58:53.454908 rx_lastpass[0][0][12] = 0
4435 09:58:53.457734 rx_firspass[0][0][13] = 0
4436 09:58:53.460835 rx_lastpass[0][0][13] = 0
4437 09:58:53.461341 rx_firspass[0][0][14] = 0
4438 09:58:53.463963 rx_lastpass[0][0][14] = 0
4439 09:58:53.467472 rx_firspass[0][0][15] = 0
4440 09:58:53.470984 rx_lastpass[0][0][15] = 0
4441 09:58:53.471495 rx_firspass[0][1][0] = 0
4442 09:58:53.474408 rx_lastpass[0][1][0] = 0
4443 09:58:53.477541 rx_firspass[0][1][1] = 0
4444 09:58:53.478047 rx_lastpass[0][1][1] = 0
4445 09:58:53.480997 rx_firspass[0][1][2] = 0
4446 09:58:53.484392 rx_lastpass[0][1][2] = 0
4447 09:58:53.484967 rx_firspass[0][1][3] = 0
4448 09:58:53.487494 rx_lastpass[0][1][3] = 0
4449 09:58:53.491108 rx_firspass[0][1][4] = 0
4450 09:58:53.491614 rx_lastpass[0][1][4] = 0
4451 09:58:53.494310 rx_firspass[0][1][5] = 0
4452 09:58:53.498246 rx_lastpass[0][1][5] = 0
4453 09:58:53.498757 rx_firspass[0][1][6] = 0
4454 09:58:53.501253 rx_lastpass[0][1][6] = 0
4455 09:58:53.504139 rx_firspass[0][1][7] = 0
4456 09:58:53.507598 rx_lastpass[0][1][7] = 0
4457 09:58:53.508118 rx_firspass[0][1][8] = 0
4458 09:58:53.510809 rx_lastpass[0][1][8] = 0
4459 09:58:53.514453 rx_firspass[0][1][9] = 0
4460 09:58:53.514959 rx_lastpass[0][1][9] = 0
4461 09:58:53.517625 rx_firspass[0][1][10] = 0
4462 09:58:53.521038 rx_lastpass[0][1][10] = 0
4463 09:58:53.521543 rx_firspass[0][1][11] = 0
4464 09:58:53.524623 rx_lastpass[0][1][11] = 0
4465 09:58:53.527895 rx_firspass[0][1][12] = 0
4466 09:58:53.528415 rx_lastpass[0][1][12] = 0
4467 09:58:53.530997 rx_firspass[0][1][13] = 0
4468 09:58:53.534543 rx_lastpass[0][1][13] = 0
4469 09:58:53.538260 rx_firspass[0][1][14] = 0
4470 09:58:53.538729 rx_lastpass[0][1][14] = 0
4471 09:58:53.540914 rx_firspass[0][1][15] = 0
4472 09:58:53.544215 rx_lastpass[0][1][15] = 0
4473 09:58:53.544786 rx_firspass[1][0][0] = 0
4474 09:58:53.547435 rx_lastpass[1][0][0] = 0
4475 09:58:53.551011 rx_firspass[1][0][1] = 0
4476 09:58:53.551440 rx_lastpass[1][0][1] = 0
4477 09:58:53.554505 rx_firspass[1][0][2] = 0
4478 09:58:53.557753 rx_lastpass[1][0][2] = 0
4479 09:58:53.561408 rx_firspass[1][0][3] = 0
4480 09:58:53.561916 rx_lastpass[1][0][3] = 0
4481 09:58:53.564229 rx_firspass[1][0][4] = 0
4482 09:58:53.567729 rx_lastpass[1][0][4] = 0
4483 09:58:53.568236 rx_firspass[1][0][5] = 0
4484 09:58:53.571119 rx_lastpass[1][0][5] = 0
4485 09:58:53.574362 rx_firspass[1][0][6] = 0
4486 09:58:53.574866 rx_lastpass[1][0][6] = 0
4487 09:58:53.578061 rx_firspass[1][0][7] = 0
4488 09:58:53.581114 rx_lastpass[1][0][7] = 0
4489 09:58:53.581623 rx_firspass[1][0][8] = 0
4490 09:58:53.584549 rx_lastpass[1][0][8] = 0
4491 09:58:53.587631 rx_firspass[1][0][9] = 0
4492 09:58:53.590940 rx_lastpass[1][0][9] = 0
4493 09:58:53.591448 rx_firspass[1][0][10] = 0
4494 09:58:53.594525 rx_lastpass[1][0][10] = 0
4495 09:58:53.597614 rx_firspass[1][0][11] = 0
4496 09:58:53.598119 rx_lastpass[1][0][11] = 0
4497 09:58:53.600962 rx_firspass[1][0][12] = 0
4498 09:58:53.604072 rx_lastpass[1][0][12] = 0
4499 09:58:53.604580 rx_firspass[1][0][13] = 0
4500 09:58:53.607465 rx_lastpass[1][0][13] = 0
4501 09:58:53.610613 rx_firspass[1][0][14] = 0
4502 09:58:53.613963 rx_lastpass[1][0][14] = 0
4503 09:58:53.614569 rx_firspass[1][0][15] = 0
4504 09:58:53.617346 rx_lastpass[1][0][15] = 0
4505 09:58:53.620950 rx_firspass[1][1][0] = 0
4506 09:58:53.621455 rx_lastpass[1][1][0] = 0
4507 09:58:53.624156 rx_firspass[1][1][1] = 0
4508 09:58:53.627367 rx_lastpass[1][1][1] = 0
4509 09:58:53.627798 rx_firspass[1][1][2] = 0
4510 09:58:53.630922 rx_lastpass[1][1][2] = 0
4511 09:58:53.634382 rx_firspass[1][1][3] = 0
4512 09:58:53.637645 rx_lastpass[1][1][3] = 0
4513 09:58:53.638071 rx_firspass[1][1][4] = 0
4514 09:58:53.640784 rx_lastpass[1][1][4] = 0
4515 09:58:53.644046 rx_firspass[1][1][5] = 0
4516 09:58:53.644475 rx_lastpass[1][1][5] = 0
4517 09:58:53.647576 rx_firspass[1][1][6] = 0
4518 09:58:53.650910 rx_lastpass[1][1][6] = 0
4519 09:58:53.651371 rx_firspass[1][1][7] = 0
4520 09:58:53.653852 rx_lastpass[1][1][7] = 0
4521 09:58:53.657473 rx_firspass[1][1][8] = 0
4522 09:58:53.657902 rx_lastpass[1][1][8] = 0
4523 09:58:53.660547 rx_firspass[1][1][9] = 0
4524 09:58:53.664322 rx_lastpass[1][1][9] = 0
4525 09:58:53.664827 rx_firspass[1][1][10] = 0
4526 09:58:53.667562 rx_lastpass[1][1][10] = 0
4527 09:58:53.670617 rx_firspass[1][1][11] = 0
4528 09:58:53.674117 rx_lastpass[1][1][11] = 0
4529 09:58:53.674604 rx_firspass[1][1][12] = 0
4530 09:58:53.677300 rx_lastpass[1][1][12] = 0
4531 09:58:53.680484 rx_firspass[1][1][13] = 0
4532 09:58:53.680914 rx_lastpass[1][1][13] = 0
4533 09:58:53.684126 rx_firspass[1][1][14] = 0
4534 09:58:53.687215 rx_lastpass[1][1][14] = 0
4535 09:58:53.690619 rx_firspass[1][1][15] = 0
4536 09:58:53.691051 rx_lastpass[1][1][15] = 0
4537 09:58:53.693848 dump params clk_delay
4538 09:58:53.694308 clk_delay[0] = 0
4539 09:58:53.697200 clk_delay[1] = 0
4540 09:58:53.697632 dump params dqs_delay
4541 09:58:53.700994 dqs_delay[0][0] = 0
4542 09:58:53.704135 dqs_delay[0][1] = 0
4543 09:58:53.704772 dqs_delay[1][0] = 0
4544 09:58:53.707500 dqs_delay[1][1] = 0
4545 09:58:53.707932 dump params delay_cell_unit = 753
4546 09:58:53.710898 dump source = 0x0
4547 09:58:53.713985 dump params frequency:800
4548 09:58:53.714478 dump params rank number:2
4549 09:58:53.714872
4550 09:58:53.717386 dump params write leveling
4551 09:58:53.720944 write leveling[0][0][0] = 0x0
4552 09:58:53.724344 write leveling[0][0][1] = 0x0
4553 09:58:53.727853 write leveling[0][1][0] = 0x0
4554 09:58:53.728407 write leveling[0][1][1] = 0x0
4555 09:58:53.730766 write leveling[1][0][0] = 0x0
4556 09:58:53.734692 write leveling[1][0][1] = 0x0
4557 09:58:53.737716 write leveling[1][1][0] = 0x0
4558 09:58:53.740742 write leveling[1][1][1] = 0x0
4559 09:58:53.741250 dump params cbt_cs
4560 09:58:53.744160 cbt_cs[0][0] = 0x0
4561 09:58:53.744588 cbt_cs[0][1] = 0x0
4562 09:58:53.747747 cbt_cs[1][0] = 0x0
4563 09:58:53.748267 cbt_cs[1][1] = 0x0
4564 09:58:53.750758 dump params cbt_mr12
4565 09:58:53.751190 cbt_mr12[0][0] = 0x0
4566 09:58:53.754174 cbt_mr12[0][1] = 0x0
4567 09:58:53.754651 cbt_mr12[1][0] = 0x0
4568 09:58:53.757754 cbt_mr12[1][1] = 0x0
4569 09:58:53.761037 dump params tx window
4570 09:58:53.761775 tx_center_min[0][0][0] = 0
4571 09:58:53.764122 tx_center_max[0][0][0] = 0
4572 09:58:53.767369 tx_center_min[0][0][1] = 0
4573 09:58:53.770773 tx_center_max[0][0][1] = 0
4574 09:58:53.771198 tx_center_min[0][1][0] = 0
4575 09:58:53.774379 tx_center_max[0][1][0] = 0
4576 09:58:53.777630 tx_center_min[0][1][1] = 0
4577 09:58:53.778138 tx_center_max[0][1][1] = 0
4578 09:58:53.780676 tx_center_min[1][0][0] = 0
4579 09:58:53.784218 tx_center_max[1][0][0] = 0
4580 09:58:53.787349 tx_center_min[1][0][1] = 0
4581 09:58:53.787793 tx_center_max[1][0][1] = 0
4582 09:58:53.790803 tx_center_min[1][1][0] = 0
4583 09:58:53.794317 tx_center_max[1][1][0] = 0
4584 09:58:53.797949 tx_center_min[1][1][1] = 0
4585 09:58:53.798510 tx_center_max[1][1][1] = 0
4586 09:58:53.801082 dump params tx window
4587 09:58:53.804650 tx_win_center[0][0][0] = 0
4588 09:58:53.805170 tx_first_pass[0][0][0] = 0
4589 09:58:53.807694 tx_last_pass[0][0][0] = 0
4590 09:58:53.811136 tx_win_center[0][0][1] = 0
4591 09:58:53.814111 tx_first_pass[0][0][1] = 0
4592 09:58:53.814576 tx_last_pass[0][0][1] = 0
4593 09:58:53.817532 tx_win_center[0][0][2] = 0
4594 09:58:53.821120 tx_first_pass[0][0][2] = 0
4595 09:58:53.821650 tx_last_pass[0][0][2] = 0
4596 09:58:53.824545 tx_win_center[0][0][3] = 0
4597 09:58:53.827825 tx_first_pass[0][0][3] = 0
4598 09:58:53.830989 tx_last_pass[0][0][3] = 0
4599 09:58:53.831418 tx_win_center[0][0][4] = 0
4600 09:58:53.834773 tx_first_pass[0][0][4] = 0
4601 09:58:53.837478 tx_last_pass[0][0][4] = 0
4602 09:58:53.837905 tx_win_center[0][0][5] = 0
4603 09:58:53.840914 tx_first_pass[0][0][5] = 0
4604 09:58:53.844189 tx_last_pass[0][0][5] = 0
4605 09:58:53.847971 tx_win_center[0][0][6] = 0
4606 09:58:53.848483 tx_first_pass[0][0][6] = 0
4607 09:58:53.850815 tx_last_pass[0][0][6] = 0
4608 09:58:53.854540 tx_win_center[0][0][7] = 0
4609 09:58:53.857778 tx_first_pass[0][0][7] = 0
4610 09:58:53.858205 tx_last_pass[0][0][7] = 0
4611 09:58:53.861361 tx_win_center[0][0][8] = 0
4612 09:58:53.864226 tx_first_pass[0][0][8] = 0
4613 09:58:53.864655 tx_last_pass[0][0][8] = 0
4614 09:58:53.867916 tx_win_center[0][0][9] = 0
4615 09:58:53.871236 tx_first_pass[0][0][9] = 0
4616 09:58:53.874383 tx_last_pass[0][0][9] = 0
4617 09:58:53.874856 tx_win_center[0][0][10] = 0
4618 09:58:53.877758 tx_first_pass[0][0][10] = 0
4619 09:58:53.880919 tx_last_pass[0][0][10] = 0
4620 09:58:53.884674 tx_win_center[0][0][11] = 0
4621 09:58:53.885185 tx_first_pass[0][0][11] = 0
4622 09:58:53.887581 tx_last_pass[0][0][11] = 0
4623 09:58:53.891199 tx_win_center[0][0][12] = 0
4624 09:58:53.894576 tx_first_pass[0][0][12] = 0
4625 09:58:53.895097 tx_last_pass[0][0][12] = 0
4626 09:58:53.897808 tx_win_center[0][0][13] = 0
4627 09:58:53.901185 tx_first_pass[0][0][13] = 0
4628 09:58:53.904563 tx_last_pass[0][0][13] = 0
4629 09:58:53.905075 tx_win_center[0][0][14] = 0
4630 09:58:53.907950 tx_first_pass[0][0][14] = 0
4631 09:58:53.911063 tx_last_pass[0][0][14] = 0
4632 09:58:53.914532 tx_win_center[0][0][15] = 0
4633 09:58:53.915043 tx_first_pass[0][0][15] = 0
4634 09:58:53.918016 tx_last_pass[0][0][15] = 0
4635 09:58:53.921200 tx_win_center[0][1][0] = 0
4636 09:58:53.924340 tx_first_pass[0][1][0] = 0
4637 09:58:53.924727 tx_last_pass[0][1][0] = 0
4638 09:58:53.927968 tx_win_center[0][1][1] = 0
4639 09:58:53.931041 tx_first_pass[0][1][1] = 0
4640 09:58:53.931476 tx_last_pass[0][1][1] = 0
4641 09:58:53.934565 tx_win_center[0][1][2] = 0
4642 09:58:53.938014 tx_first_pass[0][1][2] = 0
4643 09:58:53.941086 tx_last_pass[0][1][2] = 0
4644 09:58:53.941586 tx_win_center[0][1][3] = 0
4645 09:58:53.944310 tx_first_pass[0][1][3] = 0
4646 09:58:53.948225 tx_last_pass[0][1][3] = 0
4647 09:58:53.948730 tx_win_center[0][1][4] = 0
4648 09:58:53.951227 tx_first_pass[0][1][4] = 0
4649 09:58:53.954648 tx_last_pass[0][1][4] = 0
4650 09:58:53.958285 tx_win_center[0][1][5] = 0
4651 09:58:53.958795 tx_first_pass[0][1][5] = 0
4652 09:58:53.961506 tx_last_pass[0][1][5] = 0
4653 09:58:53.964715 tx_win_center[0][1][6] = 0
4654 09:58:53.968022 tx_first_pass[0][1][6] = 0
4655 09:58:53.968544 tx_last_pass[0][1][6] = 0
4656 09:58:53.971395 tx_win_center[0][1][7] = 0
4657 09:58:53.974842 tx_first_pass[0][1][7] = 0
4658 09:58:53.975353 tx_last_pass[0][1][7] = 0
4659 09:58:53.978344 tx_win_center[0][1][8] = 0
4660 09:58:53.982004 tx_first_pass[0][1][8] = 0
4661 09:58:53.984916 tx_last_pass[0][1][8] = 0
4662 09:58:53.985426 tx_win_center[0][1][9] = 0
4663 09:58:53.988298 tx_first_pass[0][1][9] = 0
4664 09:58:53.991415 tx_last_pass[0][1][9] = 0
4665 09:58:53.991850 tx_win_center[0][1][10] = 0
4666 09:58:53.995000 tx_first_pass[0][1][10] = 0
4667 09:58:53.998622 tx_last_pass[0][1][10] = 0
4668 09:58:54.001578 tx_win_center[0][1][11] = 0
4669 09:58:54.002155 tx_first_pass[0][1][11] = 0
4670 09:58:54.004910 tx_last_pass[0][1][11] = 0
4671 09:58:54.008336 tx_win_center[0][1][12] = 0
4672 09:58:54.011381 tx_first_pass[0][1][12] = 0
4673 09:58:54.011841 tx_last_pass[0][1][12] = 0
4674 09:58:54.014834 tx_win_center[0][1][13] = 0
4675 09:58:54.018377 tx_first_pass[0][1][13] = 0
4676 09:58:54.021547 tx_last_pass[0][1][13] = 0
4677 09:58:54.022057 tx_win_center[0][1][14] = 0
4678 09:58:54.024927 tx_first_pass[0][1][14] = 0
4679 09:58:54.028365 tx_last_pass[0][1][14] = 0
4680 09:58:54.031680 tx_win_center[0][1][15] = 0
4681 09:58:54.032193 tx_first_pass[0][1][15] = 0
4682 09:58:54.034920 tx_last_pass[0][1][15] = 0
4683 09:58:54.038254 tx_win_center[1][0][0] = 0
4684 09:58:54.042024 tx_first_pass[1][0][0] = 0
4685 09:58:54.042585 tx_last_pass[1][0][0] = 0
4686 09:58:54.044924 tx_win_center[1][0][1] = 0
4687 09:58:54.048225 tx_first_pass[1][0][1] = 0
4688 09:58:54.051699 tx_last_pass[1][0][1] = 0
4689 09:58:54.052205 tx_win_center[1][0][2] = 0
4690 09:58:54.054673 tx_first_pass[1][0][2] = 0
4691 09:58:54.058184 tx_last_pass[1][0][2] = 0
4692 09:58:54.058749 tx_win_center[1][0][3] = 0
4693 09:58:54.061536 tx_first_pass[1][0][3] = 0
4694 09:58:54.065012 tx_last_pass[1][0][3] = 0
4695 09:58:54.068332 tx_win_center[1][0][4] = 0
4696 09:58:54.068836 tx_first_pass[1][0][4] = 0
4697 09:58:54.071555 tx_last_pass[1][0][4] = 0
4698 09:58:54.074569 tx_win_center[1][0][5] = 0
4699 09:58:54.078320 tx_first_pass[1][0][5] = 0
4700 09:58:54.078828 tx_last_pass[1][0][5] = 0
4701 09:58:54.081390 tx_win_center[1][0][6] = 0
4702 09:58:54.084794 tx_first_pass[1][0][6] = 0
4703 09:58:54.085302 tx_last_pass[1][0][6] = 0
4704 09:58:54.087916 tx_win_center[1][0][7] = 0
4705 09:58:54.091347 tx_first_pass[1][0][7] = 0
4706 09:58:54.094995 tx_last_pass[1][0][7] = 0
4707 09:58:54.095560 tx_win_center[1][0][8] = 0
4708 09:58:54.098048 tx_first_pass[1][0][8] = 0
4709 09:58:54.101404 tx_last_pass[1][0][8] = 0
4710 09:58:54.101915 tx_win_center[1][0][9] = 0
4711 09:58:54.104815 tx_first_pass[1][0][9] = 0
4712 09:58:54.107893 tx_last_pass[1][0][9] = 0
4713 09:58:54.111137 tx_win_center[1][0][10] = 0
4714 09:58:54.111760 tx_first_pass[1][0][10] = 0
4715 09:58:54.114918 tx_last_pass[1][0][10] = 0
4716 09:58:54.118181 tx_win_center[1][0][11] = 0
4717 09:58:54.121402 tx_first_pass[1][0][11] = 0
4718 09:58:54.121835 tx_last_pass[1][0][11] = 0
4719 09:58:54.125106 tx_win_center[1][0][12] = 0
4720 09:58:54.128220 tx_first_pass[1][0][12] = 0
4721 09:58:54.131243 tx_last_pass[1][0][12] = 0
4722 09:58:54.131679 tx_win_center[1][0][13] = 0
4723 09:58:54.134677 tx_first_pass[1][0][13] = 0
4724 09:58:54.138435 tx_last_pass[1][0][13] = 0
4725 09:58:54.141677 tx_win_center[1][0][14] = 0
4726 09:58:54.142271 tx_first_pass[1][0][14] = 0
4727 09:58:54.145062 tx_last_pass[1][0][14] = 0
4728 09:58:54.148447 tx_win_center[1][0][15] = 0
4729 09:58:54.151663 tx_first_pass[1][0][15] = 0
4730 09:58:54.152172 tx_last_pass[1][0][15] = 0
4731 09:58:54.155149 tx_win_center[1][1][0] = 0
4732 09:58:54.158341 tx_first_pass[1][1][0] = 0
4733 09:58:54.161685 tx_last_pass[1][1][0] = 0
4734 09:58:54.162193 tx_win_center[1][1][1] = 0
4735 09:58:54.164882 tx_first_pass[1][1][1] = 0
4736 09:58:54.168408 tx_last_pass[1][1][1] = 0
4737 09:58:54.168914 tx_win_center[1][1][2] = 0
4738 09:58:54.171619 tx_first_pass[1][1][2] = 0
4739 09:58:54.174926 tx_last_pass[1][1][2] = 0
4740 09:58:54.178324 tx_win_center[1][1][3] = 0
4741 09:58:54.178833 tx_first_pass[1][1][3] = 0
4742 09:58:54.181771 tx_last_pass[1][1][3] = 0
4743 09:58:54.184864 tx_win_center[1][1][4] = 0
4744 09:58:54.188284 tx_first_pass[1][1][4] = 0
4745 09:58:54.188796 tx_last_pass[1][1][4] = 0
4746 09:58:54.191424 tx_win_center[1][1][5] = 0
4747 09:58:54.194971 tx_first_pass[1][1][5] = 0
4748 09:58:54.195480 tx_last_pass[1][1][5] = 0
4749 09:58:54.198064 tx_win_center[1][1][6] = 0
4750 09:58:54.201425 tx_first_pass[1][1][6] = 0
4751 09:58:54.204711 tx_last_pass[1][1][6] = 0
4752 09:58:54.205217 tx_win_center[1][1][7] = 0
4753 09:58:54.208417 tx_first_pass[1][1][7] = 0
4754 09:58:54.211583 tx_last_pass[1][1][7] = 0
4755 09:58:54.212034 tx_win_center[1][1][8] = 0
4756 09:58:54.214700 tx_first_pass[1][1][8] = 0
4757 09:58:54.218280 tx_last_pass[1][1][8] = 0
4758 09:58:54.221728 tx_win_center[1][1][9] = 0
4759 09:58:54.222289 tx_first_pass[1][1][9] = 0
4760 09:58:54.224963 tx_last_pass[1][1][9] = 0
4761 09:58:54.228130 tx_win_center[1][1][10] = 0
4762 09:58:54.231418 tx_first_pass[1][1][10] = 0
4763 09:58:54.231851 tx_last_pass[1][1][10] = 0
4764 09:58:54.235540 tx_win_center[1][1][11] = 0
4765 09:58:54.238077 tx_first_pass[1][1][11] = 0
4766 09:58:54.241771 tx_last_pass[1][1][11] = 0
4767 09:58:54.242393 tx_win_center[1][1][12] = 0
4768 09:58:54.244862 tx_first_pass[1][1][12] = 0
4769 09:58:54.248037 tx_last_pass[1][1][12] = 0
4770 09:58:54.251685 tx_win_center[1][1][13] = 0
4771 09:58:54.252190 tx_first_pass[1][1][13] = 0
4772 09:58:54.254996 tx_last_pass[1][1][13] = 0
4773 09:58:54.258632 tx_win_center[1][1][14] = 0
4774 09:58:54.261910 tx_first_pass[1][1][14] = 0
4775 09:58:54.262456 tx_last_pass[1][1][14] = 0
4776 09:58:54.265049 tx_win_center[1][1][15] = 0
4777 09:58:54.268629 tx_first_pass[1][1][15] = 0
4778 09:58:54.271689 tx_last_pass[1][1][15] = 0
4779 09:58:54.272198 dump params rx window
4780 09:58:54.274892 rx_firspass[0][0][0] = 0
4781 09:58:54.275321 rx_lastpass[0][0][0] = 0
4782 09:58:54.278420 rx_firspass[0][0][1] = 0
4783 09:58:54.282094 rx_lastpass[0][0][1] = 0
4784 09:58:54.285170 rx_firspass[0][0][2] = 0
4785 09:58:54.285677 rx_lastpass[0][0][2] = 0
4786 09:58:54.288551 rx_firspass[0][0][3] = 0
4787 09:58:54.291474 rx_lastpass[0][0][3] = 0
4788 09:58:54.291904 rx_firspass[0][0][4] = 0
4789 09:58:54.295053 rx_lastpass[0][0][4] = 0
4790 09:58:54.298398 rx_firspass[0][0][5] = 0
4791 09:58:54.298907 rx_lastpass[0][0][5] = 0
4792 09:58:54.301738 rx_firspass[0][0][6] = 0
4793 09:58:54.305227 rx_lastpass[0][0][6] = 0
4794 09:58:54.305733 rx_firspass[0][0][7] = 0
4795 09:58:54.308552 rx_lastpass[0][0][7] = 0
4796 09:58:54.311721 rx_firspass[0][0][8] = 0
4797 09:58:54.312154 rx_lastpass[0][0][8] = 0
4798 09:58:54.315083 rx_firspass[0][0][9] = 0
4799 09:58:54.318343 rx_lastpass[0][0][9] = 0
4800 09:58:54.318773 rx_firspass[0][0][10] = 0
4801 09:58:54.322194 rx_lastpass[0][0][10] = 0
4802 09:58:54.325161 rx_firspass[0][0][11] = 0
4803 09:58:54.328615 rx_lastpass[0][0][11] = 0
4804 09:58:54.329124 rx_firspass[0][0][12] = 0
4805 09:58:54.331856 rx_lastpass[0][0][12] = 0
4806 09:58:54.335023 rx_firspass[0][0][13] = 0
4807 09:58:54.335453 rx_lastpass[0][0][13] = 0
4808 09:58:54.339060 rx_firspass[0][0][14] = 0
4809 09:58:54.341844 rx_lastpass[0][0][14] = 0
4810 09:58:54.345259 rx_firspass[0][0][15] = 0
4811 09:58:54.345762 rx_lastpass[0][0][15] = 0
4812 09:58:54.348245 rx_firspass[0][1][0] = 0
4813 09:58:54.351809 rx_lastpass[0][1][0] = 0
4814 09:58:54.352319 rx_firspass[0][1][1] = 0
4815 09:58:54.355153 rx_lastpass[0][1][1] = 0
4816 09:58:54.358594 rx_firspass[0][1][2] = 0
4817 09:58:54.359131 rx_lastpass[0][1][2] = 0
4818 09:58:54.361694 rx_firspass[0][1][3] = 0
4819 09:58:54.365107 rx_lastpass[0][1][3] = 0
4820 09:58:54.365609 rx_firspass[0][1][4] = 0
4821 09:58:54.368623 rx_lastpass[0][1][4] = 0
4822 09:58:54.371992 rx_firspass[0][1][5] = 0
4823 09:58:54.375068 rx_lastpass[0][1][5] = 0
4824 09:58:54.375502 rx_firspass[0][1][6] = 0
4825 09:58:54.378953 rx_lastpass[0][1][6] = 0
4826 09:58:54.381888 rx_firspass[0][1][7] = 0
4827 09:58:54.382430 rx_lastpass[0][1][7] = 0
4828 09:58:54.385293 rx_firspass[0][1][8] = 0
4829 09:58:54.388726 rx_lastpass[0][1][8] = 0
4830 09:58:54.389239 rx_firspass[0][1][9] = 0
4831 09:58:54.391910 rx_lastpass[0][1][9] = 0
4832 09:58:54.395277 rx_firspass[0][1][10] = 0
4833 09:58:54.395785 rx_lastpass[0][1][10] = 0
4834 09:58:54.398789 rx_firspass[0][1][11] = 0
4835 09:58:54.401902 rx_lastpass[0][1][11] = 0
4836 09:58:54.405291 rx_firspass[0][1][12] = 0
4837 09:58:54.405791 rx_lastpass[0][1][12] = 0
4838 09:58:54.408658 rx_firspass[0][1][13] = 0
4839 09:58:54.412105 rx_lastpass[0][1][13] = 0
4840 09:58:54.412611 rx_firspass[0][1][14] = 0
4841 09:58:54.415076 rx_lastpass[0][1][14] = 0
4842 09:58:54.418460 rx_firspass[0][1][15] = 0
4843 09:58:54.421895 rx_lastpass[0][1][15] = 0
4844 09:58:54.422439 rx_firspass[1][0][0] = 0
4845 09:58:54.425553 rx_lastpass[1][0][0] = 0
4846 09:58:54.428698 rx_firspass[1][0][1] = 0
4847 09:58:54.429204 rx_lastpass[1][0][1] = 0
4848 09:58:54.432067 rx_firspass[1][0][2] = 0
4849 09:58:54.435850 rx_lastpass[1][0][2] = 0
4850 09:58:54.436357 rx_firspass[1][0][3] = 0
4851 09:58:54.438605 rx_lastpass[1][0][3] = 0
4852 09:58:54.442336 rx_firspass[1][0][4] = 0
4853 09:58:54.442897 rx_lastpass[1][0][4] = 0
4854 09:58:54.445719 rx_firspass[1][0][5] = 0
4855 09:58:54.449157 rx_lastpass[1][0][5] = 0
4856 09:58:54.449786 rx_firspass[1][0][6] = 0
4857 09:58:54.452045 rx_lastpass[1][0][6] = 0
4858 09:58:54.455602 rx_firspass[1][0][7] = 0
4859 09:58:54.456107 rx_lastpass[1][0][7] = 0
4860 09:58:54.458829 rx_firspass[1][0][8] = 0
4861 09:58:54.462018 rx_lastpass[1][0][8] = 0
4862 09:58:54.462558 rx_firspass[1][0][9] = 0
4863 09:58:54.465578 rx_lastpass[1][0][9] = 0
4864 09:58:54.469010 rx_firspass[1][0][10] = 0
4865 09:58:54.471797 rx_lastpass[1][0][10] = 0
4866 09:58:54.472302 rx_firspass[1][0][11] = 0
4867 09:58:54.475233 rx_lastpass[1][0][11] = 0
4868 09:58:54.478770 rx_firspass[1][0][12] = 0
4869 09:58:54.479388 rx_lastpass[1][0][12] = 0
4870 09:58:54.481882 rx_firspass[1][0][13] = 0
4871 09:58:54.485568 rx_lastpass[1][0][13] = 0
4872 09:58:54.488705 rx_firspass[1][0][14] = 0
4873 09:58:54.489222 rx_lastpass[1][0][14] = 0
4874 09:58:54.492102 rx_firspass[1][0][15] = 0
4875 09:58:54.495460 rx_lastpass[1][0][15] = 0
4876 09:58:54.495970 rx_firspass[1][1][0] = 0
4877 09:58:54.498755 rx_lastpass[1][1][0] = 0
4878 09:58:54.501842 rx_firspass[1][1][1] = 0
4879 09:58:54.505383 rx_lastpass[1][1][1] = 0
4880 09:58:54.505908 rx_firspass[1][1][2] = 0
4881 09:58:54.508619 rx_lastpass[1][1][2] = 0
4882 09:58:54.512129 rx_firspass[1][1][3] = 0
4883 09:58:54.512639 rx_lastpass[1][1][3] = 0
4884 09:58:54.515106 rx_firspass[1][1][4] = 0
4885 09:58:54.518256 rx_lastpass[1][1][4] = 0
4886 09:58:54.518688 rx_firspass[1][1][5] = 0
4887 09:58:54.521740 rx_lastpass[1][1][5] = 0
4888 09:58:54.525194 rx_firspass[1][1][6] = 0
4889 09:58:54.525709 rx_lastpass[1][1][6] = 0
4890 09:58:54.528791 rx_firspass[1][1][7] = 0
4891 09:58:54.531871 rx_lastpass[1][1][7] = 0
4892 09:58:54.532377 rx_firspass[1][1][8] = 0
4893 09:58:54.535109 rx_lastpass[1][1][8] = 0
4894 09:58:54.538364 rx_firspass[1][1][9] = 0
4895 09:58:54.538793 rx_lastpass[1][1][9] = 0
4896 09:58:54.541942 rx_firspass[1][1][10] = 0
4897 09:58:54.544960 rx_lastpass[1][1][10] = 0
4898 09:58:54.548275 rx_firspass[1][1][11] = 0
4899 09:58:54.548699 rx_lastpass[1][1][11] = 0
4900 09:58:54.551665 rx_firspass[1][1][12] = 0
4901 09:58:54.555134 rx_lastpass[1][1][12] = 0
4902 09:58:54.555658 rx_firspass[1][1][13] = 0
4903 09:58:54.558657 rx_lastpass[1][1][13] = 0
4904 09:58:54.561650 rx_firspass[1][1][14] = 0
4905 09:58:54.565142 rx_lastpass[1][1][14] = 0
4906 09:58:54.565583 rx_firspass[1][1][15] = 0
4907 09:58:54.568191 rx_lastpass[1][1][15] = 0
4908 09:58:54.571713 dump params clk_delay
4909 09:58:54.572154 clk_delay[0] = 0
4910 09:58:54.574942 clk_delay[1] = 0
4911 09:58:54.575380 dump params dqs_delay
4912 09:58:54.578182 dqs_delay[0][0] = 0
4913 09:58:54.578655 dqs_delay[0][1] = 0
4914 09:58:54.581452 dqs_delay[1][0] = 0
4915 09:58:54.581910 dqs_delay[1][1] = 0
4916 09:58:54.584651 dump params delay_cell_unit = 753
4917 09:58:54.587990 mt_set_emi_preloader end
4918 09:58:54.591338 [mt_mem_init] dram size: 0x100000000, rank number: 2
4919 09:58:54.597854 [complex_mem_test] start addr:0x40000000, len:20480
4920 09:58:54.633993 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4921 09:58:54.640449 [complex_mem_test] start addr:0x80000000, len:20480
4922 09:58:54.676945 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4923 09:58:54.683162 [complex_mem_test] start addr:0xc0000000, len:20480
4924 09:58:54.718595 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4925 09:58:54.725531 [complex_mem_test] start addr:0x56000000, len:8192
4926 09:58:54.742065 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4927 09:58:54.742658 ddr_geometry:1
4928 09:58:54.748294 [complex_mem_test] start addr:0x80000000, len:8192
4929 09:58:54.765839 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4930 09:58:54.768798 dram_init: dram init end (result: 0)
4931 09:58:54.775425 Successfully loaded DRAM blobs and ran DRAM calibration
4932 09:58:54.785886 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4933 09:58:54.786450 CBMEM:
4934 09:58:54.789027 IMD: root @ 00000000fffff000 254 entries.
4935 09:58:54.792291 IMD: root @ 00000000ffffec00 62 entries.
4936 09:58:54.798939 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4937 09:58:54.805747 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4938 09:58:54.809179 in-header: 03 a1 00 00 08 00 00 00
4939 09:58:54.812602 in-data: 84 60 60 10 00 00 00 00
4940 09:58:54.815655 Chrome EC: clear events_b mask to 0x0000000020004000
4941 09:58:54.822539 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4942 09:58:54.825783 in-header: 03 fd 00 00 00 00 00 00
4943 09:58:54.826244 in-data:
4944 09:58:54.832477 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4945 09:58:54.832947 CBFS @ 21000 size 3d4000
4946 09:58:54.839275 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4947 09:58:54.842558 CBFS: Locating 'fallback/ramstage'
4948 09:58:54.845846 CBFS: Found @ offset 10d40 size d563
4949 09:58:54.867278 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4950 09:58:54.880184 Accumulated console time in romstage 12744 ms
4951 09:58:54.880699
4952 09:58:54.881030
4953 09:58:54.889535 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4954 09:58:54.893226 ARM64: Exception handlers installed.
4955 09:58:54.893734 ARM64: Testing exception
4956 09:58:54.896229 ARM64: Done test exception
4957 09:58:54.899587 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4958 09:58:54.903022 Manufacturer: ef
4959 09:58:54.906237 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4960 09:58:54.912684 WARNING: RO_VPD is uninitialized or empty.
4961 09:58:54.916038 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4962 09:58:54.919707 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4963 09:58:54.929485 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4964 09:58:54.932608 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4965 09:58:54.938937 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4966 09:58:54.939370 Enumerating buses...
4967 09:58:54.945654 Show all devs... Before device enumeration.
4968 09:58:54.946089 Root Device: enabled 1
4969 09:58:54.948933 CPU_CLUSTER: 0: enabled 1
4970 09:58:54.949361 CPU: 00: enabled 1
4971 09:58:54.952929 Compare with tree...
4972 09:58:54.955934 Root Device: enabled 1
4973 09:58:54.956365 CPU_CLUSTER: 0: enabled 1
4974 09:58:54.959372 CPU: 00: enabled 1
4975 09:58:54.962482 Root Device scanning...
4976 09:58:54.962913 root_dev_scan_bus for Root Device
4977 09:58:54.965789 CPU_CLUSTER: 0 enabled
4978 09:58:54.969293 root_dev_scan_bus for Root Device done
4979 09:58:54.972605 scan_bus: scanning of bus Root Device took 10690 usecs
4980 09:58:54.975773 done
4981 09:58:54.979332 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
4982 09:58:54.982557 Allocating resources...
4983 09:58:54.982984 Reading resources...
4984 09:58:54.986001 Root Device read_resources bus 0 link: 0
4985 09:58:54.992688 CPU_CLUSTER: 0 read_resources bus 0 link: 0
4986 09:58:54.993122 CPU: 00 missing read_resources
4987 09:58:54.999400 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
4988 09:58:55.002718 Root Device read_resources bus 0 link: 0 done
4989 09:58:55.006261 Done reading resources.
4990 09:58:55.009820 Show resources in subtree (Root Device)...After reading.
4991 09:58:55.012893 Root Device child on link 0 CPU_CLUSTER: 0
4992 09:58:55.015914 CPU_CLUSTER: 0 child on link 0 CPU: 00
4993 09:58:55.026334 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
4994 09:58:55.026858 CPU: 00
4995 09:58:55.029405 Setting resources...
4996 09:58:55.033170 Root Device assign_resources, bus 0 link: 0
4997 09:58:55.036179 CPU_CLUSTER: 0 missing set_resources
4998 09:58:55.039466 Root Device assign_resources, bus 0 link: 0
4999 09:58:55.043193 Done setting resources.
5000 09:58:55.046275 Show resources in subtree (Root Device)...After assigning values.
5001 09:58:55.053402 Root Device child on link 0 CPU_CLUSTER: 0
5002 09:58:55.056203 CPU_CLUSTER: 0 child on link 0 CPU: 00
5003 09:58:55.062992 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5004 09:58:55.066309 CPU: 00
5005 09:58:55.066814 Done allocating resources.
5006 09:58:55.073277 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5007 09:58:55.073709 Enabling resources...
5008 09:58:55.074041 done.
5009 09:58:55.079663 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5010 09:58:55.080099 Initializing devices...
5011 09:58:55.082932 Root Device init ...
5012 09:58:55.086306 mainboard_init: Starting display init.
5013 09:58:55.089825 ADC[4]: Raw value=77032 ID=0
5014 09:58:55.112173 anx7625_power_on_init: Init interface.
5015 09:58:55.115338 anx7625_disable_pd_protocol: Disabled PD feature.
5016 09:58:55.121871 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5017 09:58:55.178920 anx7625_start_dp_work: Secure OCM version=00
5018 09:58:55.182137 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5019 09:58:55.199454 sp_tx_get_edid_block: EDID Block = 1
5020 09:58:55.316977 Extracted contents:
5021 09:58:55.319907 header: 00 ff ff ff ff ff ff 00
5022 09:58:55.323603 serial number: 06 af 5c 14 00 00 00 00 00 1a
5023 09:58:55.326801 version: 01 04
5024 09:58:55.330201 basic params: 95 1a 0e 78 02
5025 09:58:55.333354 chroma info: 99 85 95 55 56 92 28 22 50 54
5026 09:58:55.336587 established: 00 00 00
5027 09:58:55.343536 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5028 09:58:55.346609 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5029 09:58:55.353468 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5030 09:58:55.360109 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5031 09:58:55.366879 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5032 09:58:55.370455 extensions: 00
5033 09:58:55.370974 checksum: ae
5034 09:58:55.371309
5035 09:58:55.373785 Manufacturer: AUO Model 145c Serial Number 0
5036 09:58:55.377008 Made week 0 of 2016
5037 09:58:55.377435 EDID version: 1.4
5038 09:58:55.380177 Digital display
5039 09:58:55.383574 6 bits per primary color channel
5040 09:58:55.384104 DisplayPort interface
5041 09:58:55.386788 Maximum image size: 26 cm x 14 cm
5042 09:58:55.387296 Gamma: 220%
5043 09:58:55.390038 Check DPMS levels
5044 09:58:55.393456 Supported color formats: RGB 4:4:4
5045 09:58:55.396780 First detailed timing is preferred timing
5046 09:58:55.400316 Established timings supported:
5047 09:58:55.403344 Standard timings supported:
5048 09:58:55.403857 Detailed timings
5049 09:58:55.406709 Hex of detail: ce1d56ea50001a3030204600009010000018
5050 09:58:55.413610 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5051 09:58:55.416923 0556 0586 05a6 0640 hborder 0
5052 09:58:55.420079 0300 0304 030a 031a vborder 0
5053 09:58:55.423659 -hsync -vsync
5054 09:58:55.426917 Did detailed timing
5055 09:58:55.430625 Hex of detail: 0000000f0000000000000000000000000020
5056 09:58:55.433895 Manufacturer-specified data, tag 15
5057 09:58:55.437079 Hex of detail: 000000fe0041554f0a202020202020202020
5058 09:58:55.440579 ASCII string: AUO
5059 09:58:55.443774 Hex of detail: 000000fe004231313658414230312e34200a
5060 09:58:55.447022 ASCII string: B116XAB01.4
5061 09:58:55.447453 Checksum
5062 09:58:55.450322 Checksum: 0xae (valid)
5063 09:58:55.453740 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5064 09:58:55.457230 DSI data_rate: 457800000 bps
5065 09:58:55.463662 anx7625_parse_edid: set default k value to 0x3d for panel
5066 09:58:55.467182 anx7625_parse_edid: pixelclock(76300).
5067 09:58:55.470593 hactive(1366), hsync(32), hfp(48), hbp(154)
5068 09:58:55.474104 vactive(768), vsync(6), vfp(4), vbp(16)
5069 09:58:55.476907 anx7625_dsi_config: config dsi.
5070 09:58:55.485130 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5071 09:58:55.505946 anx7625_dsi_config: success to config DSI
5072 09:58:55.509478 anx7625_dp_start: MIPI phy setup OK.
5073 09:58:55.512836 [SSUSB] Setting up USB HOST controller...
5074 09:58:55.515994 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5075 09:58:55.516430 [SSUSB] phy power-on done.
5076 09:58:55.523059 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5077 09:58:55.526547 in-header: 03 fc 01 00 00 00 00 00
5078 09:58:55.526977 in-data:
5079 09:58:55.530064 handle_proto3_response: EC response with error code: 1
5080 09:58:55.533015 SPM: pcm index = 1
5081 09:58:55.536396 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5082 09:58:55.540248 CBFS @ 21000 size 3d4000
5083 09:58:55.546623 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5084 09:58:55.549754 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5085 09:58:55.553621 CBFS: Found @ offset 1e7c0 size 1026
5086 09:58:55.559946 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5087 09:58:55.563411 SPM: binary array size = 2988
5088 09:58:55.566936 SPM: version = pcm_allinone_v1.17.2_20180829
5089 09:58:55.569790 SPM binary loaded in 32 msecs
5090 09:58:55.576989 spm_kick_im_to_fetch: ptr = 000000004021eec2
5091 09:58:55.580492 spm_kick_im_to_fetch: len = 2988
5092 09:58:55.581005 SPM: spm_kick_pcm_to_run
5093 09:58:55.584057 SPM: spm_kick_pcm_to_run done
5094 09:58:55.587096 SPM: spm_init done in 52 msecs
5095 09:58:55.590648 Root Device init finished in 505264 usecs
5096 09:58:55.593912 CPU_CLUSTER: 0 init ...
5097 09:58:55.603964 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5098 09:58:55.606806 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5099 09:58:55.610669 CBFS @ 21000 size 3d4000
5100 09:58:55.613832 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5101 09:58:55.617071 CBFS: Locating 'sspm.bin'
5102 09:58:55.620316 CBFS: Found @ offset 208c0 size 41cb
5103 09:58:55.630396 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5104 09:58:55.637995 CPU_CLUSTER: 0 init finished in 42798 usecs
5105 09:58:55.638460 Devices initialized
5106 09:58:55.641571 Show all devs... After init.
5107 09:58:55.644944 Root Device: enabled 1
5108 09:58:55.645460 CPU_CLUSTER: 0: enabled 1
5109 09:58:55.648207 CPU: 00: enabled 1
5110 09:58:55.651479 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5111 09:58:55.654674 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5112 09:58:55.658125 ELOG: NV offset 0x558000 size 0x1000
5113 09:58:55.665698 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5114 09:58:55.672501 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5115 09:58:55.675829 ELOG: Event(17) added with size 13 at 2024-06-18 09:58:55 UTC
5116 09:58:55.679156 out: cmd=0x121: 03 db 21 01 00 00 00 00
5117 09:58:55.682547 in-header: 03 c9 00 00 2c 00 00 00
5118 09:58:55.696359 in-data: 31 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 08 95 01 00 06 80 00 00 16 9b 02 00 06 80 00 00 36 0a 01 00 06 80 00 00 d5 fc 01 00
5119 09:58:55.699348 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5120 09:58:55.702762 in-header: 03 19 00 00 08 00 00 00
5121 09:58:55.705985 in-data: a2 e0 47 00 13 00 00 00
5122 09:58:55.709518 Chrome EC: UHEPI supported
5123 09:58:55.716228 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5124 09:58:55.719218 in-header: 03 e1 00 00 08 00 00 00
5125 09:58:55.722544 in-data: 84 20 60 10 00 00 00 00
5126 09:58:55.725921 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5127 09:58:55.732524 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5128 09:58:55.735960 in-header: 03 e1 00 00 08 00 00 00
5129 09:58:55.738979 in-data: 84 20 60 10 00 00 00 00
5130 09:58:55.745933 ELOG: Event(A1) added with size 10 at 2024-06-18 09:58:55 UTC
5131 09:58:55.752683 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5132 09:58:55.756315 ELOG: Event(A0) added with size 9 at 2024-06-18 09:58:55 UTC
5133 09:58:55.759440 elog_add_boot_reason: Logged dev mode boot
5134 09:58:55.762520 Finalize devices...
5135 09:58:55.762948 Devices finalized
5136 09:58:55.769387 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5137 09:58:55.772686 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5138 09:58:55.779201 ELOG: Event(91) added with size 10 at 2024-06-18 09:58:55 UTC
5139 09:58:55.782663 Writing coreboot table at 0xffeda000
5140 09:58:55.786456 0. 0000000000114000-000000000011efff: RAMSTAGE
5141 09:58:55.789286 1. 0000000040000000-000000004023cfff: RAMSTAGE
5142 09:58:55.796049 2. 000000004023d000-00000000545fffff: RAM
5143 09:58:55.799558 3. 0000000054600000-000000005465ffff: BL31
5144 09:58:55.802942 4. 0000000054660000-00000000ffed9fff: RAM
5145 09:58:55.805837 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5146 09:58:55.812747 6. 0000000100000000-000000013fffffff: RAM
5147 09:58:55.813256 Passing 5 GPIOs to payload:
5148 09:58:55.819361 NAME | PORT | POLARITY | VALUE
5149 09:58:55.822625 write protect | 0x00000096 | low | high
5150 09:58:55.829631 EC in RW | 0x000000b1 | high | undefined
5151 09:58:55.832781 EC interrupt | 0x00000097 | low | undefined
5152 09:58:55.836464 TPM interrupt | 0x00000099 | high | undefined
5153 09:58:55.842829 speaker enable | 0x000000af | high | undefined
5154 09:58:55.846079 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5155 09:58:55.849388 in-header: 03 f7 00 00 02 00 00 00
5156 09:58:55.849899 in-data: 04 00
5157 09:58:55.852854 Board ID: 4
5158 09:58:55.853363 ADC[3]: Raw value=1040299 ID=8
5159 09:58:55.856441 RAM code: 8
5160 09:58:55.856944 SKU ID: 16
5161 09:58:55.859584 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5162 09:58:55.862895 CBFS @ 21000 size 3d4000
5163 09:58:55.869995 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5164 09:58:55.872954 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5eb1
5165 09:58:55.876033 coreboot table: 940 bytes.
5166 09:58:55.879615 IMD ROOT 0. 00000000fffff000 00001000
5167 09:58:55.883038 IMD SMALL 1. 00000000ffffe000 00001000
5168 09:58:55.886359 CONSOLE 2. 00000000fffde000 00020000
5169 09:58:55.892847 FMAP 3. 00000000fffdd000 0000047c
5170 09:58:55.896589 TIME STAMP 4. 00000000fffdc000 00000910
5171 09:58:55.899749 RAMOOPS 5. 00000000ffedc000 00100000
5172 09:58:55.903002 COREBOOT 6. 00000000ffeda000 00002000
5173 09:58:55.903510 IMD small region:
5174 09:58:55.906435 IMD ROOT 0. 00000000ffffec00 00000400
5175 09:58:55.913135 VBOOT WORK 1. 00000000ffffeb00 00000100
5176 09:58:55.916001 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5177 09:58:55.919749 VPD 3. 00000000ffffea60 0000006c
5178 09:58:55.922884 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5179 09:58:55.929442 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5180 09:58:55.933004 in-header: 03 e1 00 00 08 00 00 00
5181 09:58:55.936010 in-data: 84 20 60 10 00 00 00 00
5182 09:58:55.939502 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5183 09:58:55.942904 CBFS @ 21000 size 3d4000
5184 09:58:55.949386 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5185 09:58:55.952778 CBFS: Locating 'fallback/payload'
5186 09:58:55.959809 CBFS: Found @ offset dc040 size 439a0
5187 09:58:56.047628 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5188 09:58:56.051186 Checking segment from ROM address 0x0000000040003a00
5189 09:58:56.057965 Checking segment from ROM address 0x0000000040003a1c
5190 09:58:56.061282 Loading segment from ROM address 0x0000000040003a00
5191 09:58:56.064289 code (compression=0)
5192 09:58:56.074204 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5193 09:58:56.081364 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5194 09:58:56.084624 it's not compressed!
5195 09:58:56.087728 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5196 09:58:56.094354 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5197 09:58:56.102242 Loading segment from ROM address 0x0000000040003a1c
5198 09:58:56.105442 Entry Point 0x0000000080000000
5199 09:58:56.105945 Loaded segments
5200 09:58:56.112748 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5201 09:58:56.115116 Jumping to boot code at 0000000080000000(00000000ffeda000)
5202 09:58:56.125299 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5203 09:58:56.128669 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5204 09:58:56.132271 CBFS @ 21000 size 3d4000
5205 09:58:56.138873 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5206 09:58:56.141870 CBFS: Locating 'fallback/bl31'
5207 09:58:56.145020 CBFS: Found @ offset 36dc0 size 5820
5208 09:58:56.156058 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5209 09:58:56.159217 Checking segment from ROM address 0x0000000040003a00
5210 09:58:56.165929 Checking segment from ROM address 0x0000000040003a1c
5211 09:58:56.169138 Loading segment from ROM address 0x0000000040003a00
5212 09:58:56.173162 code (compression=1)
5213 09:58:56.179677 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5214 09:58:56.189222 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5215 09:58:56.189734 using LZMA
5216 09:58:56.197867 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5217 09:58:56.204365 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5218 09:58:56.207926 Loading segment from ROM address 0x0000000040003a1c
5219 09:58:56.211181 Entry Point 0x0000000054601000
5220 09:58:56.211691 Loaded segments
5221 09:58:56.214273 NOTICE: MT8183 bl31_setup
5222 09:58:56.221561 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5223 09:58:56.225065 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5224 09:58:56.228118 INFO: [DEVAPC] dump DEVAPC registers:
5225 09:58:56.237986 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5226 09:58:56.244684 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5227 09:58:56.254693 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5228 09:58:56.261559 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5229 09:58:56.271688 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5230 09:58:56.278323 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5231 09:58:56.285063 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5232 09:58:56.295160 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5233 09:58:56.301533 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5234 09:58:56.311745 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5235 09:58:56.318594 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5236 09:58:56.328513 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5237 09:58:56.335096 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5238 09:58:56.341938 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5239 09:58:56.349237 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5240 09:58:56.358381 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5241 09:58:56.365458 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5242 09:58:56.371905 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5243 09:58:56.378542 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5244 09:58:56.385474 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5245 09:58:56.395148 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5246 09:58:56.402006 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5247 09:58:56.405161 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5248 09:58:56.408956 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5249 09:58:56.411767 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5250 09:58:56.415337 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5251 09:58:56.418566 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5252 09:58:56.425069 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5253 09:58:56.428451 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5254 09:58:56.432120 WARNING: region 0:
5255 09:58:56.435143 WARNING: apc:0x168, sa:0x0, ea:0xfff
5256 09:58:56.435572 WARNING: region 1:
5257 09:58:56.438755 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5258 09:58:56.442458 WARNING: region 2:
5259 09:58:56.445555 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5260 09:58:56.446066 WARNING: region 3:
5261 09:58:56.452102 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5262 09:58:56.452601 WARNING: region 4:
5263 09:58:56.455344 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5264 09:58:56.458692 WARNING: region 5:
5265 09:58:56.462315 WARNING: apc:0x0, sa:0x0, ea:0x0
5266 09:58:56.462843 WARNING: region 6:
5267 09:58:56.465447 WARNING: apc:0x0, sa:0x0, ea:0x0
5268 09:58:56.468594 WARNING: region 7:
5269 09:58:56.471850 WARNING: apc:0x0, sa:0x0, ea:0x0
5270 09:58:56.478929 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5271 09:58:56.482250 INFO: SPM: enable SPMC mode
5272 09:58:56.482789 NOTICE: spm_boot_init() start
5273 09:58:56.485506 NOTICE: spm_boot_init() end
5274 09:58:56.488960 INFO: BL31: Initializing runtime services
5275 09:58:56.495488 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5276 09:58:56.498925 INFO: BL31: Preparing for EL3 exit to normal world
5277 09:58:56.505462 INFO: Entry point address = 0x80000000
5278 09:58:56.505992 INFO: SPSR = 0x8
5279 09:58:56.528375
5280 09:58:56.528894
5281 09:58:56.529330
5282 09:58:56.531012 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5283 09:58:56.531574 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5284 09:58:56.532032 Setting prompt string to ['jacuzzi:']
5285 09:58:56.532492 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5286 09:58:56.533268 Starting depthcharge on Juniper...
5287 09:58:56.533642
5288 09:58:56.534738 vboot_handoff: creating legacy vboot_handoff structure
5289 09:58:56.535185
5290 09:58:56.538051 ec_init(0): CrosEC protocol v3 supported (544, 544)
5291 09:58:56.538528
5292 09:58:56.541565 Wipe memory regions:
5293 09:58:56.542082
5294 09:58:56.544847 [0x00000040000000, 0x00000054600000)
5295 09:58:56.587678
5296 09:58:56.588253 [0x00000054660000, 0x00000080000000)
5297 09:58:56.679197
5298 09:58:56.679712 [0x000000811994a0, 0x000000ffeda000)
5299 09:58:56.939007
5300 09:58:56.939514 [0x00000100000000, 0x00000140000000)
5301 09:58:57.072082
5302 09:58:57.075417 Initializing XHCI USB controller at 0x11200000.
5303 09:58:57.098429
5304 09:58:57.101697 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5305 09:58:57.102251
5306 09:58:57.102699
5307 09:58:57.103542 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5309 09:58:57.204926 jacuzzi: tftpboot 192.168.201.1 14407631/tftp-deploy-9mpqo1m0/kernel/image.itb 14407631/tftp-deploy-9mpqo1m0/kernel/cmdline
5310 09:58:57.205657 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5311 09:58:57.206145 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5312 09:58:57.210430 tftpboot 192.168.201.1 14407631/tftp-deploy-9mpqo1m0/kernel/image.ittp-deploy-9mpqo1m0/kernel/cmdline
5313 09:58:57.210885
5314 09:58:57.211323 Waiting for link
5315 09:58:57.758833
5316 09:58:57.759354 R8152: Initializing
5317 09:58:57.759801
5318 09:58:57.762425 Version 9 (ocp_data = 6010)
5319 09:58:57.762942
5320 09:58:57.765672 R8152: Done initializing
5321 09:58:57.766196
5322 09:58:57.766689 Adding net device
5323 09:58:57.944765
5324 09:58:57.945284 R8152: Initializing
5325 09:58:57.945727
5326 09:58:57.948610 Version 9 (ocp_data = 6010)
5327 09:58:57.949043
5328 09:58:57.950648 R8152: Done initializing
5329 09:58:57.951091
5330 09:58:57.953900 net_add_device: Attemp to include the same device
5331 09:58:58.340747
5332 09:58:58.341301 done.
5333 09:58:58.341753
5334 09:58:58.342314 MAC: 00:e0:4c:68:03:2b
5335 09:58:58.342726
5336 09:58:58.343726 Sending DHCP discover... done.
5337 09:58:58.344170
5338 09:58:58.346823 Waiting for reply... done.
5339 09:58:58.347265
5340 09:58:58.350378 Sending DHCP request... done.
5341 09:58:58.350819
5342 09:58:58.353944 Waiting for reply... done.
5343 09:58:58.354426
5344 09:58:58.354862 My ip is 192.168.201.17
5345 09:58:58.355315
5346 09:58:58.357067 The DHCP server ip is 192.168.201.1
5347 09:58:58.357508
5348 09:58:58.360591 TFTP server IP predefined by user: 192.168.201.1
5349 09:58:58.364459
5350 09:58:58.367129 Bootfile predefined by user: 14407631/tftp-deploy-9mpqo1m0/kernel/image.itb
5351 09:58:58.367573
5352 09:58:58.370320 Sending tftp read request... done.
5353 09:58:58.370835
5354 09:58:58.380219 Waiting for the transfer...
5355 09:58:58.380657
5356 09:58:58.776953 00000000 ################################################################
5357 09:58:58.777423
5358 09:58:59.169102 00080000 ################################################################
5359 09:58:59.169565
5360 09:58:59.554946 00100000 ################################################################
5361 09:58:59.555449
5362 09:58:59.941764 00180000 ################################################################
5363 09:58:59.942337
5364 09:59:00.306035 00200000 ################################################################
5365 09:59:00.306527
5366 09:59:00.617439 00280000 ################################################################
5367 09:59:00.617558
5368 09:59:00.922089 00300000 ################################################################
5369 09:59:00.922233
5370 09:59:01.227228 00380000 ################################################################
5371 09:59:01.227350
5372 09:59:01.601967 00400000 ################################################################
5373 09:59:01.602507
5374 09:59:01.926773 00480000 ################################################################
5375 09:59:01.926895
5376 09:59:02.225295 00500000 ################################################################
5377 09:59:02.225416
5378 09:59:02.490744 00580000 ################################################################
5379 09:59:02.490864
5380 09:59:02.758341 00600000 ################################################################
5381 09:59:02.758466
5382 09:59:03.013352 00680000 ################################################################
5383 09:59:03.013470
5384 09:59:03.268349 00700000 ################################################################
5385 09:59:03.268465
5386 09:59:03.564659 00780000 ################################################################
5387 09:59:03.564780
5388 09:59:03.851980 00800000 ################################################################
5389 09:59:03.852105
5390 09:59:04.150816 00880000 ################################################################
5391 09:59:04.150935
5392 09:59:04.446409 00900000 ################################################################
5393 09:59:04.446528
5394 09:59:04.750533 00980000 ################################################################
5395 09:59:04.750653
5396 09:59:05.048034 00a00000 ################################################################
5397 09:59:05.048156
5398 09:59:05.305647 00a80000 ################################################################
5399 09:59:05.305773
5400 09:59:05.606396 00b00000 ################################################################
5401 09:59:05.606515
5402 09:59:05.870215 00b80000 ################################################################
5403 09:59:05.870365
5404 09:59:06.142079 00c00000 ################################################################
5405 09:59:06.142195
5406 09:59:06.417909 00c80000 ################################################################
5407 09:59:06.418032
5408 09:59:06.700470 00d00000 ################################################################
5409 09:59:06.700594
5410 09:59:06.984003 00d80000 ################################################################
5411 09:59:06.984123
5412 09:59:07.255844 00e00000 ################################################################
5413 09:59:07.255975
5414 09:59:07.538550 00e80000 ################################################################
5415 09:59:07.538709
5416 09:59:07.813861 00f00000 ################################################################
5417 09:59:07.813983
5418 09:59:08.110332 00f80000 ################################################################
5419 09:59:08.110453
5420 09:59:08.398205 01000000 ################################################################
5421 09:59:08.398332
5422 09:59:08.695649 01080000 ################################################################
5423 09:59:08.695770
5424 09:59:08.957650 01100000 ################################################################
5425 09:59:08.957772
5426 09:59:09.212944 01180000 ################################################################
5427 09:59:09.213061
5428 09:59:09.467066 01200000 ################################################################
5429 09:59:09.467183
5430 09:59:09.721932 01280000 ################################################################
5431 09:59:09.722047
5432 09:59:09.975753 01300000 ################################################################
5433 09:59:09.975874
5434 09:59:10.262461 01380000 ################################################################
5435 09:59:10.262583
5436 09:59:10.561119 01400000 ################################################################
5437 09:59:10.561240
5438 09:59:10.861103 01480000 ################################################################
5439 09:59:10.861220
5440 09:59:11.154430 01500000 ################################################################
5441 09:59:11.154549
5442 09:59:11.447858 01580000 ################################################################
5443 09:59:11.447983
5444 09:59:11.738855 01600000 ################################################################
5445 09:59:11.738975
5446 09:59:12.039388 01680000 ################################################################
5447 09:59:12.039507
5448 09:59:12.335640 01700000 ################################################################
5449 09:59:12.335759
5450 09:59:12.631623 01780000 ################################################################
5451 09:59:12.631744
5452 09:59:12.927751 01800000 ################################################################
5453 09:59:12.927868
5454 09:59:13.222854 01880000 ################################################################
5455 09:59:13.222973
5456 09:59:13.518784 01900000 ################################################################
5457 09:59:13.518901
5458 09:59:13.799911 01980000 ################################################################
5459 09:59:13.800036
5460 09:59:14.065370 01a00000 ################################################################
5461 09:59:14.065489
5462 09:59:14.361911 01a80000 ################################################################
5463 09:59:14.362029
5464 09:59:14.656874 01b00000 ################################################################
5465 09:59:14.656996
5466 09:59:14.936252 01b80000 ################################################################
5467 09:59:14.936377
5468 09:59:15.236135 01c00000 ################################################################
5469 09:59:15.236255
5470 09:59:15.526362 01c80000 ################################################################
5471 09:59:15.526483
5472 09:59:15.821171 01d00000 ################################################################
5473 09:59:15.821290
5474 09:59:16.114103 01d80000 ################################################################
5475 09:59:16.114232
5476 09:59:16.394316 01e00000 ################################################################
5477 09:59:16.394440
5478 09:59:16.687434 01e80000 ################################################################
5479 09:59:16.687560
5480 09:59:16.943749 01f00000 ################################################################
5481 09:59:16.943870
5482 09:59:17.209948 01f80000 ################################################################
5483 09:59:17.210070
5484 09:59:17.484402 02000000 ################################################################
5485 09:59:17.484528
5486 09:59:17.756112 02080000 ################################################################
5487 09:59:17.756254
5488 09:59:18.049097 02100000 ################################################################
5489 09:59:18.049218
5490 09:59:18.348680 02180000 ################################################################
5491 09:59:18.348799
5492 09:59:18.633267 02200000 ################################################################
5493 09:59:18.633384
5494 09:59:18.924684 02280000 ################################################################
5495 09:59:18.924809
5496 09:59:19.205142 02300000 ################################################################
5497 09:59:19.205264
5498 09:59:19.503431 02380000 ################################################################
5499 09:59:19.503554
5500 09:59:19.800740 02400000 ################################################################
5501 09:59:19.800864
5502 09:59:20.054348 02480000 ################################################################
5503 09:59:20.054467
5504 09:59:20.326557 02500000 ################################################################
5505 09:59:20.326678
5506 09:59:20.627555 02580000 ################################################################
5507 09:59:20.627677
5508 09:59:20.922325 02600000 ################################################################
5509 09:59:20.922473
5510 09:59:21.192150 02680000 ################################################################
5511 09:59:21.192281
5512 09:59:21.476346 02700000 ################################################################
5513 09:59:21.476473
5514 09:59:21.766230 02780000 ################################################################
5515 09:59:21.766349
5516 09:59:22.060883 02800000 ################################################################
5517 09:59:22.061031
5518 09:59:22.364893 02880000 ################################################################
5519 09:59:22.365014
5520 09:59:22.639859 02900000 ################################################################
5521 09:59:22.639986
5522 09:59:22.928230 02980000 ################################################################
5523 09:59:22.928351
5524 09:59:23.218158 02a00000 ################################################################
5525 09:59:23.218283
5526 09:59:23.514547 02a80000 ################################################################
5527 09:59:23.514671
5528 09:59:23.790044 02b00000 ################################################################
5529 09:59:23.790169
5530 09:59:24.089558 02b80000 ################################################################
5531 09:59:24.089679
5532 09:59:24.388289 02c00000 ################################################################
5533 09:59:24.388407
5534 09:59:24.688424 02c80000 ################################################################
5535 09:59:24.688544
5536 09:59:24.960857 02d00000 ################################################################
5537 09:59:24.960981
5538 09:59:25.254557 02d80000 ################################################################
5539 09:59:25.254680
5540 09:59:25.536878 02e00000 ################################################################
5541 09:59:25.537001
5542 09:59:25.935139 02e80000 ################################################################
5543 09:59:25.935594
5544 09:59:26.314300 02f00000 ################################################################
5545 09:59:26.314770
5546 09:59:26.686940 02f80000 ################################################################
5547 09:59:26.687067
5548 09:59:26.960291 03000000 ################################################################
5549 09:59:26.960409
5550 09:59:27.218806 03080000 ################################################################
5551 09:59:27.218927
5552 09:59:27.473534 03100000 ################################################################
5553 09:59:27.473665
5554 09:59:27.773770 03180000 ################################################################
5555 09:59:27.773896
5556 09:59:28.158282 03200000 ################################################################
5557 09:59:28.158747
5558 09:59:28.548945 03280000 ################################################################
5559 09:59:28.549411
5560 09:59:28.840543 03300000 ################################################################
5561 09:59:28.840674
5562 09:59:29.133868 03380000 ################################################################
5563 09:59:29.133989
5564 09:59:29.425739 03400000 ################################################################
5565 09:59:29.425860
5566 09:59:29.729059 03480000 ################################################################
5567 09:59:29.729182
5568 09:59:30.009365 03500000 ################################################################
5569 09:59:30.009486
5570 09:59:30.270395 03580000 ################################################################
5571 09:59:30.270519
5572 09:59:30.566424 03600000 ################################################################
5573 09:59:30.566548
5574 09:59:30.865481 03680000 ################################################################
5575 09:59:30.865600
5576 09:59:31.163238 03700000 ################################################################
5577 09:59:31.163357
5578 09:59:31.442677 03780000 ################################################################
5579 09:59:31.442821
5580 09:59:31.713389 03800000 ################################################################
5581 09:59:31.713509
5582 09:59:32.009488 03880000 ################################################################
5583 09:59:32.009608
5584 09:59:32.298806 03900000 ################################################################
5585 09:59:32.298927
5586 09:59:32.584791 03980000 ################################################################
5587 09:59:32.584913
5588 09:59:32.839292 03a00000 ################################################################
5589 09:59:32.839414
5590 09:59:33.097883 03a80000 ################################################################
5591 09:59:33.098001
5592 09:59:33.375934 03b00000 ################################################################
5593 09:59:33.376048
5594 09:59:33.664217 03b80000 ################################################################
5595 09:59:33.664339
5596 09:59:33.954214 03c00000 ################################################################
5597 09:59:33.954335
5598 09:59:34.235762 03c80000 ################################################################
5599 09:59:34.235882
5600 09:59:34.505455 03d00000 ################################################################
5601 09:59:34.505574
5602 09:59:34.779307 03d80000 ################################################################
5603 09:59:34.779424
5604 09:59:35.077677 03e00000 ################################################################
5605 09:59:35.077798
5606 09:59:35.361409 03e80000 ################################################################
5607 09:59:35.361536
5608 09:59:35.644668 03f00000 ################################################################
5609 09:59:35.644788
5610 09:59:35.921197 03f80000 ################################################################
5611 09:59:35.921316
5612 09:59:36.204298 04000000 ################################################################
5613 09:59:36.204418
5614 09:59:36.491687 04080000 ################################################################
5615 09:59:36.491811
5616 09:59:36.747450 04100000 ################################################################
5617 09:59:36.747569
5618 09:59:37.003078 04180000 ################################################################
5619 09:59:37.003194
5620 09:59:37.257672 04200000 ################################################################
5621 09:59:37.257786
5622 09:59:37.530740 04280000 ################################################################
5623 09:59:37.530862
5624 09:59:37.810718 04300000 ################################################################
5625 09:59:37.810843
5626 09:59:38.080371 04380000 ################################################################
5627 09:59:38.080492
5628 09:59:38.366190 04400000 ################################################################
5629 09:59:38.366317
5630 09:59:38.659697 04480000 ################################################################
5631 09:59:38.659814
5632 09:59:38.951539 04500000 ################################################################
5633 09:59:38.951720
5634 09:59:39.239964 04580000 ################################################################
5635 09:59:39.240082
5636 09:59:39.539920 04600000 ################################################################
5637 09:59:39.540038
5638 09:59:39.691282 04680000 ################################# done.
5639 09:59:39.691388
5640 09:59:39.694918 The bootfile was 74193278 bytes long.
5641 09:59:39.695000
5642 09:59:39.698007 Sending tftp read request... done.
5643 09:59:39.698088
5644 09:59:39.698150 Waiting for the transfer...
5645 09:59:39.698208
5646 09:59:39.701199 00000000 # done.
5647 09:59:39.701288
5648 09:59:39.707899 Command line loaded dynamically from TFTP file: 14407631/tftp-deploy-9mpqo1m0/kernel/cmdline
5649 09:59:39.707994
5650 09:59:39.724706 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5651 09:59:39.724930
5652 09:59:39.727961 Loading FIT.
5653 09:59:39.728104
5654 09:59:39.731356 Image ramdisk-1 has 61006815 bytes.
5655 09:59:39.731586
5656 09:59:39.731716 Image fdt-1 has 57695 bytes.
5657 09:59:39.734752
5658 09:59:39.734939 Image kernel-1 has 13126726 bytes.
5659 09:59:39.735082
5660 09:59:39.744967 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5661 09:59:39.745338
5662 09:59:39.758551 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5663 09:59:39.759070
5664 09:59:39.761642 Choosing best match conf-1 for compat google,juniper-sku16.
5665 09:59:39.766957
5666 09:59:39.771318 Connected to device vid:did:rid of 1ae0:0028:00
5667 09:59:39.778402
5668 09:59:39.781969 tpm_get_response: command 0x17b, return code 0x0
5669 09:59:39.782514
5670 09:59:39.785286 tpm_cleanup: add release locality here.
5671 09:59:39.785800
5672 09:59:39.788757 Shutting down all USB controllers.
5673 09:59:39.789269
5674 09:59:39.791746 Removing current net device
5675 09:59:39.792178
5676 09:59:39.795189 Exiting depthcharge with code 4 at timestamp: 59565012
5677 09:59:39.795621
5678 09:59:39.798986 LZMA decompressing kernel-1 to 0x80193568
5679 09:59:39.799418
5680 09:59:39.801993 LZMA decompressing kernel-1 to 0x40000000
5681 09:59:41.670342
5682 09:59:41.670856 jumping to kernel
5683 09:59:41.672970 end: 2.2.4 bootloader-commands (duration 00:00:45) [common]
5684 09:59:41.673447 start: 2.2.5 auto-login-action (timeout 00:03:42) [common]
5685 09:59:41.673816 Setting prompt string to ['Linux version [0-9]']
5686 09:59:41.674160 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5687 09:59:41.674561 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5688 09:59:41.745692
5689 09:59:41.749117 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5690 09:59:41.752482 start: 2.2.5.1 login-action (timeout 00:03:42) [common]
5691 09:59:41.753005 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5692 09:59:41.753387 Setting prompt string to []
5693 09:59:41.753775 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5694 09:59:41.754142 Using line separator: #'\n'#
5695 09:59:41.754496 No login prompt set.
5696 09:59:41.754827 Parsing kernel messages
5697 09:59:41.755111 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5698 09:59:41.755646 [login-action] Waiting for messages, (timeout 00:03:42)
5699 09:59:41.755997 Waiting using forced prompt support (timeout 00:01:51)
5700 09:59:41.772357 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024
5701 09:59:41.775406 [ 0.000000] random: crng init done
5702 09:59:41.782371 [ 0.000000] Machine model: Google juniper sku16 board
5703 09:59:41.782894 [ 0.000000] efi: UEFI not found.
5704 09:59:41.792663 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5705 09:59:41.798733 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5706 09:59:41.809034 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5707 09:59:41.812092 [ 0.000000] printk: bootconsole [mtk8250] enabled
5708 09:59:41.820270 [ 0.000000] NUMA: No NUMA configuration found
5709 09:59:41.826941 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5710 09:59:41.833954 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5711 09:59:41.834525 [ 0.000000] Zone ranges:
5712 09:59:41.840407 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5713 09:59:41.843798 [ 0.000000] DMA32 empty
5714 09:59:41.850262 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5715 09:59:41.853979 [ 0.000000] Movable zone start for each node
5716 09:59:41.857108 [ 0.000000] Early memory node ranges
5717 09:59:41.863808 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5718 09:59:41.870260 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5719 09:59:41.877164 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5720 09:59:41.883904 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5721 09:59:41.890809 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5722 09:59:41.897409 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5723 09:59:41.912933 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5724 09:59:41.919396 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5725 09:59:41.926696 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5726 09:59:41.929624 [ 0.000000] psci: probing for conduit method from DT.
5727 09:59:41.936406 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5728 09:59:41.939512 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5729 09:59:41.943053 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5730 09:59:41.949845 [ 0.000000] psci: SMC Calling Convention v1.1
5731 09:59:41.956663 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5732 09:59:41.959905 [ 0.000000] Detected VIPT I-cache on CPU0
5733 09:59:41.966427 [ 0.000000] CPU features: detected: GIC system register CPU interface
5734 09:59:41.973141 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5735 09:59:41.979658 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5736 09:59:41.982933 [ 0.000000] CPU features: detected: ARM erratum 845719
5737 09:59:41.990176 [ 0.000000] alternatives: applying boot alternatives
5738 09:59:41.993412 [ 0.000000] Fallback order for Node 0: 0
5739 09:59:41.999641 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5740 09:59:42.003024 [ 0.000000] Policy zone: Normal
5741 09:59:42.019819 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5742 09:59:42.033467 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5743 09:59:42.043472 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5744 09:59:42.050021 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5745 09:59:42.056784 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5746 09:59:42.063073 <6>[ 0.000000] software IO TLB: area num 8.
5747 09:59:42.087538 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5748 09:59:42.145801 <6>[ 0.000000] Memory: 3855500K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 302964K reserved, 32768K cma-reserved)
5749 09:59:42.152574 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5750 09:59:42.159188 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5751 09:59:42.162136 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5752 09:59:42.169157 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5753 09:59:42.175590 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5754 09:59:42.178870 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5755 09:59:42.189146 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5756 09:59:42.195543 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5757 09:59:42.198859 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5758 09:59:42.210604 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5759 09:59:42.216990 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5760 09:59:42.220483 <6>[ 0.000000] GICv3: 640 SPIs implemented
5761 09:59:42.224098 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5762 09:59:42.230441 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5763 09:59:42.234203 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5764 09:59:42.240623 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5765 09:59:42.250632 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5766 09:59:42.264189 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5767 09:59:42.270711 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5768 09:59:42.282662 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5769 09:59:42.296047 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5770 09:59:42.302694 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5771 09:59:42.309058 <6>[ 0.009479] Console: colour dummy device 80x25
5772 09:59:42.312504 <6>[ 0.014520] printk: console [tty1] enabled
5773 09:59:42.322551 <6>[ 0.018905] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5774 09:59:42.329342 <6>[ 0.029370] pid_max: default: 32768 minimum: 301
5775 09:59:42.332561 <6>[ 0.034252] LSM: Security Framework initializing
5776 09:59:42.342784 <6>[ 0.039168] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5777 09:59:42.349504 <6>[ 0.046791] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5778 09:59:42.356150 <4>[ 0.055666] cacheinfo: Unable to detect cache hierarchy for CPU 0
5779 09:59:42.365795 <6>[ 0.062295] cblist_init_generic: Setting adjustable number of callback queues.
5780 09:59:42.369320 <6>[ 0.069741] cblist_init_generic: Setting shift to 3 and lim to 1.
5781 09:59:42.379230 <6>[ 0.076093] cblist_init_generic: Setting adjustable number of callback queues.
5782 09:59:42.386187 <6>[ 0.083538] cblist_init_generic: Setting shift to 3 and lim to 1.
5783 09:59:42.389419 <6>[ 0.089935] rcu: Hierarchical SRCU implementation.
5784 09:59:42.395638 <6>[ 0.094960] rcu: Max phase no-delay instances is 1000.
5785 09:59:42.402863 <6>[ 0.102908] EFI services will not be available.
5786 09:59:42.406147 <6>[ 0.107856] smp: Bringing up secondary CPUs ...
5787 09:59:42.416890 <6>[ 0.113139] Detected VIPT I-cache on CPU1
5788 09:59:42.423169 <4>[ 0.113184] cacheinfo: Unable to detect cache hierarchy for CPU 1
5789 09:59:42.430001 <6>[ 0.113193] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5790 09:59:42.436727 <6>[ 0.113225] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5791 09:59:42.439793 <6>[ 0.113708] Detected VIPT I-cache on CPU2
5792 09:59:42.446724 <4>[ 0.113741] cacheinfo: Unable to detect cache hierarchy for CPU 2
5793 09:59:42.453323 <6>[ 0.113746] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5794 09:59:42.460084 <6>[ 0.113759] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5795 09:59:42.463001 <6>[ 0.114203] Detected VIPT I-cache on CPU3
5796 09:59:42.470182 <4>[ 0.114234] cacheinfo: Unable to detect cache hierarchy for CPU 3
5797 09:59:42.476341 <6>[ 0.114238] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5798 09:59:42.483358 <6>[ 0.114249] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5799 09:59:42.489905 <6>[ 0.114823] CPU features: detected: Spectre-v2
5800 09:59:42.493342 <6>[ 0.114833] CPU features: detected: Spectre-BHB
5801 09:59:42.499749 <6>[ 0.114837] CPU features: detected: ARM erratum 858921
5802 09:59:42.503258 <6>[ 0.114842] Detected VIPT I-cache on CPU4
5803 09:59:42.509664 <4>[ 0.114890] cacheinfo: Unable to detect cache hierarchy for CPU 4
5804 09:59:42.516347 <6>[ 0.114898] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5805 09:59:42.523028 <6>[ 0.114906] arch_timer: Enabling local workaround for ARM erratum 858921
5806 09:59:42.529951 <6>[ 0.114916] arch_timer: CPU4: Trapping CNTVCT access
5807 09:59:42.536866 <6>[ 0.114924] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5808 09:59:42.539766 <6>[ 0.115410] Detected VIPT I-cache on CPU5
5809 09:59:42.546488 <4>[ 0.115451] cacheinfo: Unable to detect cache hierarchy for CPU 5
5810 09:59:42.553213 <6>[ 0.115457] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5811 09:59:42.560240 <6>[ 0.115464] arch_timer: Enabling local workaround for ARM erratum 858921
5812 09:59:42.566645 <6>[ 0.115470] arch_timer: CPU5: Trapping CNTVCT access
5813 09:59:42.573214 <6>[ 0.115475] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5814 09:59:42.576359 <6>[ 0.116010] Detected VIPT I-cache on CPU6
5815 09:59:42.582788 <4>[ 0.116057] cacheinfo: Unable to detect cache hierarchy for CPU 6
5816 09:59:42.589668 <6>[ 0.116063] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5817 09:59:42.596491 <6>[ 0.116070] arch_timer: Enabling local workaround for ARM erratum 858921
5818 09:59:42.603122 <6>[ 0.116077] arch_timer: CPU6: Trapping CNTVCT access
5819 09:59:42.609620 <6>[ 0.116082] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5820 09:59:42.613089 <6>[ 0.116610] Detected VIPT I-cache on CPU7
5821 09:59:42.619499 <4>[ 0.116655] cacheinfo: Unable to detect cache hierarchy for CPU 7
5822 09:59:42.626340 <6>[ 0.116661] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5823 09:59:42.632793 <6>[ 0.116668] arch_timer: Enabling local workaround for ARM erratum 858921
5824 09:59:42.639384 <6>[ 0.116675] arch_timer: CPU7: Trapping CNTVCT access
5825 09:59:42.646208 <6>[ 0.116680] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5826 09:59:42.649409 <6>[ 0.116728] smp: Brought up 1 node, 8 CPUs
5827 09:59:42.656414 <6>[ 0.355591] SMP: Total of 8 processors activated.
5828 09:59:42.659937 <6>[ 0.360527] CPU features: detected: 32-bit EL0 Support
5829 09:59:42.666284 <6>[ 0.365898] CPU features: detected: 32-bit EL1 Support
5830 09:59:42.672875 <6>[ 0.371264] CPU features: detected: CRC32 instructions
5831 09:59:42.675936 <6>[ 0.376689] CPU: All CPU(s) started at EL2
5832 09:59:42.682646 <6>[ 0.381027] alternatives: applying system-wide alternatives
5833 09:59:42.686143 <6>[ 0.389008] devtmpfs: initialized
5834 09:59:42.700887 <6>[ 0.397944] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5835 09:59:42.710990 <6>[ 0.407893] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5836 09:59:42.714130 <6>[ 0.415622] pinctrl core: initialized pinctrl subsystem
5837 09:59:42.722783 <6>[ 0.422737] DMI not present or invalid.
5838 09:59:42.729592 <6>[ 0.427104] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5839 09:59:42.736057 <6>[ 0.434005] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5840 09:59:42.742676 <6>[ 0.441532] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5841 09:59:42.753287 <6>[ 0.449782] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5842 09:59:42.759827 <6>[ 0.457961] audit: initializing netlink subsys (disabled)
5843 09:59:42.766585 <5>[ 0.463664] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5844 09:59:42.773113 <6>[ 0.464635] thermal_sys: Registered thermal governor 'step_wise'
5845 09:59:42.779630 <6>[ 0.471630] thermal_sys: Registered thermal governor 'power_allocator'
5846 09:59:42.783160 <6>[ 0.477928] cpuidle: using governor menu
5847 09:59:42.789759 <6>[ 0.488891] NET: Registered PF_QIPCRTR protocol family
5848 09:59:42.796633 <6>[ 0.494378] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5849 09:59:42.803287 <6>[ 0.501474] ASID allocator initialised with 32768 entries
5850 09:59:42.806369 <6>[ 0.508244] Serial: AMBA PL011 UART driver
5851 09:59:42.818398 <4>[ 0.518667] Trying to register duplicate clock ID: 113
5852 09:59:42.878080 <6>[ 0.574908] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5853 09:59:42.892620 <6>[ 0.589266] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5854 09:59:42.896007 <6>[ 0.599012] KASLR enabled
5855 09:59:42.910382 <6>[ 0.607014] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5856 09:59:42.916797 <6>[ 0.614017] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5857 09:59:42.923558 <6>[ 0.620493] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5858 09:59:42.930113 <6>[ 0.627484] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5859 09:59:42.936985 <6>[ 0.633958] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5860 09:59:42.943299 <6>[ 0.640949] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5861 09:59:42.950385 <6>[ 0.647422] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5862 09:59:42.956895 <6>[ 0.654412] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5863 09:59:42.960549 <6>[ 0.661984] ACPI: Interpreter disabled.
5864 09:59:42.969910 <6>[ 0.669975] iommu: Default domain type: Translated
5865 09:59:42.976528 <6>[ 0.675082] iommu: DMA domain TLB invalidation policy: strict mode
5866 09:59:42.979503 <5>[ 0.681713] SCSI subsystem initialized
5867 09:59:42.986365 <6>[ 0.686130] usbcore: registered new interface driver usbfs
5868 09:59:42.993246 <6>[ 0.691857] usbcore: registered new interface driver hub
5869 09:59:42.996721 <6>[ 0.697399] usbcore: registered new device driver usb
5870 09:59:43.003485 <6>[ 0.703709] pps_core: LinuxPPS API ver. 1 registered
5871 09:59:43.013850 <6>[ 0.708893] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5872 09:59:43.017098 <6>[ 0.718218] PTP clock support registered
5873 09:59:43.020070 <6>[ 0.722470] EDAC MC: Ver: 3.0.0
5874 09:59:43.027814 <6>[ 0.728111] FPGA manager framework
5875 09:59:43.031261 <6>[ 0.731795] Advanced Linux Sound Architecture Driver Initialized.
5876 09:59:43.034920 <6>[ 0.738549] vgaarb: loaded
5877 09:59:43.041769 <6>[ 0.741666] clocksource: Switched to clocksource arch_sys_counter
5878 09:59:43.048330 <5>[ 0.748096] VFS: Disk quotas dquot_6.6.0
5879 09:59:43.055265 <6>[ 0.752272] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5880 09:59:43.058286 <6>[ 0.759446] pnp: PnP ACPI: disabled
5881 09:59:43.066054 <6>[ 0.766341] NET: Registered PF_INET protocol family
5882 09:59:43.072569 <6>[ 0.771573] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5883 09:59:43.084937 <6>[ 0.781485] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5884 09:59:43.091429 <6>[ 0.790238] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5885 09:59:43.101450 <6>[ 0.798189] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5886 09:59:43.107917 <6>[ 0.806421] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5887 09:59:43.114897 <6>[ 0.814514] TCP: Hash tables configured (established 32768 bind 32768)
5888 09:59:43.121348 <6>[ 0.821344] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5889 09:59:43.131445 <6>[ 0.828314] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5890 09:59:43.138085 <6>[ 0.835793] NET: Registered PF_UNIX/PF_LOCAL protocol family
5891 09:59:43.141418 <6>[ 0.841886] RPC: Registered named UNIX socket transport module.
5892 09:59:43.147808 <6>[ 0.848029] RPC: Registered udp transport module.
5893 09:59:43.151214 <6>[ 0.852955] RPC: Registered tcp transport module.
5894 09:59:43.158195 <6>[ 0.857878] RPC: Registered tcp NFSv4.1 backchannel transport module.
5895 09:59:43.165202 <6>[ 0.864529] PCI: CLS 0 bytes, default 64
5896 09:59:43.168037 <6>[ 0.868814] Unpacking initramfs...
5897 09:59:43.189059 <6>[ 0.885832] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5898 09:59:43.198863 <6>[ 0.894462] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5899 09:59:43.202070 <6>[ 0.903307] kvm [1]: IPA Size Limit: 40 bits
5900 09:59:43.209541 <6>[ 0.909630] kvm [1]: vgic-v2@c420000
5901 09:59:43.213053 <6>[ 0.913447] kvm [1]: GIC system register CPU interface enabled
5902 09:59:43.219364 <6>[ 0.919612] kvm [1]: vgic interrupt IRQ18
5903 09:59:43.222692 <6>[ 0.923963] kvm [1]: Hyp mode initialized successfully
5904 09:59:43.230144 <5>[ 0.930250] Initialise system trusted keyrings
5905 09:59:43.236737 <6>[ 0.935102] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5906 09:59:43.244892 <6>[ 0.945089] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5907 09:59:43.251631 <5>[ 0.951563] NFS: Registering the id_resolver key type
5908 09:59:43.254805 <5>[ 0.956880] Key type id_resolver registered
5909 09:59:43.261514 <5>[ 0.961296] Key type id_legacy registered
5910 09:59:43.268215 <6>[ 0.965613] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5911 09:59:43.274930 <6>[ 0.972533] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5912 09:59:43.281402 <6>[ 0.980282] 9p: Installing v9fs 9p2000 file system support
5913 09:59:43.308966 <5>[ 1.009014] Key type asymmetric registered
5914 09:59:43.312096 <5>[ 1.013361] Asymmetric key parser 'x509' registered
5915 09:59:43.322209 <6>[ 1.018518] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5916 09:59:43.325487 <6>[ 1.026142] io scheduler mq-deadline registered
5917 09:59:43.328952 <6>[ 1.030901] io scheduler kyber registered
5918 09:59:43.351747 <6>[ 1.051748] EINJ: ACPI disabled.
5919 09:59:43.358265 <4>[ 1.055510] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5920 09:59:43.396159 <6>[ 1.096396] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5921 09:59:43.404919 <6>[ 1.104839] printk: console [ttyS0] disabled
5922 09:59:43.432847 <6>[ 1.129489] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5923 09:59:43.439334 <6>[ 1.138962] printk: console [ttyS0] enabled
5924 09:59:43.442977 <6>[ 1.138962] printk: console [ttyS0] enabled
5925 09:59:43.449434 <6>[ 1.147882] printk: bootconsole [mtk8250] disabled
5926 09:59:43.452719 <6>[ 1.147882] printk: bootconsole [mtk8250] disabled
5927 09:59:43.462745 <3>[ 1.158430] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5928 09:59:43.469226 <3>[ 1.166815] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5929 09:59:43.498604 <6>[ 1.195234] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5930 09:59:43.505090 <6>[ 1.204892] serial serial0: tty port ttyS1 registered
5931 09:59:43.511488 <6>[ 1.211431] SuperH (H)SCI(F) driver initialized
5932 09:59:43.514812 <6>[ 1.216890] msm_serial: driver initialized
5933 09:59:43.530291 <6>[ 1.227204] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5934 09:59:43.540376 <6>[ 1.235811] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5935 09:59:43.547169 <6>[ 1.244386] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5936 09:59:43.556647 <6>[ 1.252956] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5937 09:59:43.563553 <6>[ 1.261612] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5938 09:59:43.573755 <6>[ 1.270276] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5939 09:59:43.583416 <6>[ 1.279015] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5940 09:59:43.590437 <6>[ 1.287751] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5941 09:59:43.600085 <6>[ 1.296315] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5942 09:59:43.606694 <6>[ 1.305110] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5943 09:59:43.617299 <4>[ 1.317489] cacheinfo: Unable to detect cache hierarchy for CPU 0
5944 09:59:43.623558 <6>[ 1.326955] loop: module loaded
5945 09:59:43.638945 <6>[ 1.338886] vsim1: Bringing 1800000uV into 2700000-2700000uV
5946 09:59:43.656870 <6>[ 1.356890] megasas: 07.719.03.00-rc1
5947 09:59:43.665431 <6>[ 1.365625] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5948 09:59:43.673244 <6>[ 1.373035] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5949 09:59:43.689868 <6>[ 1.389802] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5950 09:59:43.746267 <6>[ 1.439987] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5951 09:59:45.208556 <6>[ 2.908804] Freeing initrd memory: 59572K
5952 09:59:45.224077 <4>[ 2.920777] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5953 09:59:45.230316 <4>[ 2.930031] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5954 09:59:45.237190 <4>[ 2.936730] Hardware name: Google juniper sku16 board (DT)
5955 09:59:45.240541 <4>[ 2.942469] Call trace:
5956 09:59:45.243716 <4>[ 2.945169] dump_backtrace.part.0+0xe0/0xf0
5957 09:59:45.247087 <4>[ 2.949706] show_stack+0x18/0x30
5958 09:59:45.250183 <4>[ 2.953279] dump_stack_lvl+0x68/0x84
5959 09:59:45.257371 <4>[ 2.957199] dump_stack+0x18/0x34
5960 09:59:45.260184 <4>[ 2.960769] sysfs_warn_dup+0x64/0x80
5961 09:59:45.264382 <4>[ 2.964691] sysfs_do_create_link_sd+0xf0/0x100
5962 09:59:45.266991 <4>[ 2.969479] sysfs_create_link+0x20/0x40
5963 09:59:45.273856 <4>[ 2.973658] bus_add_device+0x68/0x10c
5964 09:59:45.277293 <4>[ 2.977664] device_add+0x340/0x7ac
5965 09:59:45.280403 <4>[ 2.981408] of_device_add+0x44/0x60
5966 09:59:45.287169 <4>[ 2.985242] of_platform_device_create_pdata+0x90/0x120
5967 09:59:45.290369 <4>[ 2.990723] of_platform_bus_create+0x170/0x370
5968 09:59:45.293672 <4>[ 2.995510] of_platform_populate+0x50/0xfc
5969 09:59:45.300457 <4>[ 2.999950] parse_mtd_partitions+0x1dc/0x510
5970 09:59:45.303590 <4>[ 3.004563] mtd_device_parse_register+0xf8/0x2e0
5971 09:59:45.307170 <4>[ 3.009522] spi_nor_probe+0x21c/0x2f0
5972 09:59:45.313679 <4>[ 3.013527] spi_mem_probe+0x6c/0xb0
5973 09:59:45.316962 <4>[ 3.017360] spi_probe+0x84/0xe4
5974 09:59:45.320134 <4>[ 3.020841] really_probe+0xbc/0x2e0
5975 09:59:45.323528 <4>[ 3.024672] __driver_probe_device+0x78/0x11c
5976 09:59:45.330135 <4>[ 3.029284] driver_probe_device+0xd8/0x160
5977 09:59:45.333471 <4>[ 3.033722] __device_attach_driver+0xb8/0x134
5978 09:59:45.337207 <4>[ 3.038421] bus_for_each_drv+0x78/0xd0
5979 09:59:45.340320 <4>[ 3.042511] __device_attach+0xa8/0x1c0
5980 09:59:45.346742 <4>[ 3.046602] device_initial_probe+0x14/0x20
5981 09:59:45.349891 <4>[ 3.051040] bus_probe_device+0x9c/0xa4
5982 09:59:45.353517 <4>[ 3.055131] device_add+0x3ac/0x7ac
5983 09:59:45.356544 <4>[ 3.058873] __spi_add_device+0x78/0x120
5984 09:59:45.363243 <4>[ 3.063051] spi_add_device+0x40/0x7c
5985 09:59:45.366659 <4>[ 3.066969] spi_register_controller+0x610/0xad0
5986 09:59:45.373267 <4>[ 3.071842] devm_spi_register_controller+0x4c/0xa4
5987 09:59:45.376343 <4>[ 3.076975] mtk_spi_probe+0x3f8/0x650
5988 09:59:45.379981 <4>[ 3.080979] platform_probe+0x68/0xe0
5989 09:59:45.383131 <4>[ 3.084898] really_probe+0xbc/0x2e0
5990 09:59:45.390115 <4>[ 3.088728] __driver_probe_device+0x78/0x11c
5991 09:59:45.392916 <4>[ 3.093340] driver_probe_device+0xd8/0x160
5992 09:59:45.396288 <4>[ 3.097777] __driver_attach+0x94/0x19c
5993 09:59:45.400042 <4>[ 3.101868] bus_for_each_dev+0x70/0xd0
5994 09:59:45.403110 <4>[ 3.105959] driver_attach+0x24/0x30
5995 09:59:45.409665 <4>[ 3.109789] bus_add_driver+0x154/0x20c
5996 09:59:45.413094 <4>[ 3.113879] driver_register+0x78/0x130
5997 09:59:45.416119 <4>[ 3.117970] __platform_driver_register+0x28/0x34
5998 09:59:45.422942 <4>[ 3.122930] mtk_spi_driver_init+0x1c/0x28
5999 09:59:45.426130 <4>[ 3.127284] do_one_initcall+0x50/0x1d0
6000 09:59:45.429384 <4>[ 3.131374] kernel_init_freeable+0x21c/0x288
6001 09:59:45.436121 <4>[ 3.135988] kernel_init+0x24/0x12c
6002 09:59:45.439341 <4>[ 3.139733] ret_from_fork+0x10/0x20
6003 09:59:45.448545 <6>[ 3.148632] tun: Universal TUN/TAP device driver, 1.6
6004 09:59:45.451914 <6>[ 3.154923] thunder_xcv, ver 1.0
6005 09:59:45.455112 <6>[ 3.158444] thunder_bgx, ver 1.0
6006 09:59:45.458525 <6>[ 3.161951] nicpf, ver 1.0
6007 09:59:45.469278 <6>[ 3.166322] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6008 09:59:45.472898 <6>[ 3.173806] hns3: Copyright (c) 2017 Huawei Corporation.
6009 09:59:45.479433 <6>[ 3.179406] hclge is initializing
6010 09:59:45.483031 <6>[ 3.182996] e1000: Intel(R) PRO/1000 Network Driver
6011 09:59:45.489197 <6>[ 3.188132] e1000: Copyright (c) 1999-2006 Intel Corporation.
6012 09:59:45.492749 <6>[ 3.194154] e1000e: Intel(R) PRO/1000 Network Driver
6013 09:59:45.499415 <6>[ 3.199375] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6014 09:59:45.506035 <6>[ 3.205568] igb: Intel(R) Gigabit Ethernet Network Driver
6015 09:59:45.513102 <6>[ 3.211223] igb: Copyright (c) 2007-2014 Intel Corporation.
6016 09:59:45.519389 <6>[ 3.217065] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6017 09:59:45.526100 <6>[ 3.223588] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6018 09:59:45.529265 <6>[ 3.230141] sky2: driver version 1.30
6019 09:59:45.536172 <6>[ 3.235391] usbcore: registered new device driver r8152-cfgselector
6020 09:59:45.542463 <6>[ 3.241935] usbcore: registered new interface driver r8152
6021 09:59:45.549300 <6>[ 3.247761] VFIO - User Level meta-driver version: 0.3
6022 09:59:45.556013 <6>[ 3.255577] mtu3 11201000.usb: uwk - reg:0x420, version:101
6023 09:59:45.562460 <4>[ 3.261450] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6024 09:59:45.569360 <6>[ 3.268721] mtu3 11201000.usb: dr_mode: 1, drd: auto
6025 09:59:45.575864 <6>[ 3.273946] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6026 09:59:45.578974 <6>[ 3.280136] mtu3 11201000.usb: usb3-drd: 0
6027 09:59:45.588751 <6>[ 3.285721] mtu3 11201000.usb: xHCI platform device register success...
6028 09:59:45.595535 <4>[ 3.294371] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6029 09:59:45.602360 <6>[ 3.302320] xhci-mtk 11200000.usb: xHCI Host Controller
6030 09:59:45.608816 <6>[ 3.307825] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6031 09:59:45.615417 <6>[ 3.315548] xhci-mtk 11200000.usb: USB3 root hub has no ports
6032 09:59:45.625616 <6>[ 3.321556] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6033 09:59:45.632060 <6>[ 3.330982] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6034 09:59:45.638599 <6>[ 3.337056] xhci-mtk 11200000.usb: xHCI Host Controller
6035 09:59:45.645685 <6>[ 3.342544] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6036 09:59:45.652150 <6>[ 3.350202] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6037 09:59:45.655375 <6>[ 3.357025] hub 1-0:1.0: USB hub found
6038 09:59:45.658551 <6>[ 3.361054] hub 1-0:1.0: 1 port detected
6039 09:59:45.669647 <6>[ 3.366405] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6040 09:59:45.672917 <6>[ 3.375034] hub 2-0:1.0: USB hub found
6041 09:59:45.682736 <3>[ 3.379086] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6042 09:59:45.689155 <6>[ 3.386981] usbcore: registered new interface driver usb-storage
6043 09:59:45.695999 <6>[ 3.393562] usbcore: registered new device driver onboard-usb-hub
6044 09:59:45.706298 <4>[ 3.401765] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6045 09:59:45.714302 <6>[ 3.414010] mt6397-rtc mt6358-rtc: registered as rtc0
6046 09:59:45.724118 <6>[ 3.419487] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:59:45 UTC (1718704785)
6047 09:59:45.730093 <6>[ 3.429370] i2c_dev: i2c /dev entries driver
6048 09:59:45.740674 <6>[ 3.435784] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6049 09:59:45.747133 <6>[ 3.444104] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6050 09:59:45.753591 <6>[ 3.453007] i2c 4-0058: Fixed dependency cycle(s) with /panel
6051 09:59:45.760115 <6>[ 3.459038] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6052 09:59:45.770115 <3>[ 3.466496] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6053 09:59:45.786325 <6>[ 3.486402] cpu cpu0: EM: created perf domain
6054 09:59:45.796261 <6>[ 3.491930] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6055 09:59:45.803139 <6>[ 3.503230] cpu cpu4: EM: created perf domain
6056 09:59:45.809682 <6>[ 3.509976] sdhci: Secure Digital Host Controller Interface driver
6057 09:59:45.816216 <6>[ 3.516431] sdhci: Copyright(c) Pierre Ossman
6058 09:59:45.822947 <6>[ 3.521832] Synopsys Designware Multimedia Card Interface Driver
6059 09:59:45.829595 <6>[ 3.522364] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6060 09:59:45.832847 <6>[ 3.528903] sdhci-pltfm: SDHCI platform and OF driver helper
6061 09:59:45.841523 <6>[ 3.541720] ledtrig-cpu: registered to indicate activity on CPUs
6062 09:59:45.849394 <6>[ 3.549456] usbcore: registered new interface driver usbhid
6063 09:59:45.852399 <6>[ 3.555301] usbhid: USB HID core driver
6064 09:59:45.863672 <6>[ 3.559597] spi_master spi2: will run message pump with realtime priority
6065 09:59:45.867098 <4>[ 3.559859] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6066 09:59:45.877505 <4>[ 3.574006] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6067 09:59:45.890743 <6>[ 3.579603] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6068 09:59:45.907355 <6>[ 3.597281] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6069 09:59:45.914177 <4>[ 3.603670] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6070 09:59:45.920667 <6>[ 3.618757] cros-ec-spi spi2.0: Chrome EC device registered
6071 09:59:45.927422 <4>[ 3.626671] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6072 09:59:45.941783 <4>[ 3.638578] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6073 09:59:45.948641 <4>[ 3.647729] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6074 09:59:45.961090 <6>[ 3.657824] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6075 09:59:45.978652 <6>[ 3.678618] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6076 09:59:45.987535 <6>[ 3.687972] mmc0: new HS400 MMC card at address 0001
6077 09:59:45.994621 <6>[ 3.694996] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6078 09:59:46.004468 <6>[ 3.704441] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6079 09:59:46.014575 <6>[ 3.707726] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6080 09:59:46.017451 <6>[ 3.713488] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6081 09:59:46.030674 <6>[ 3.723241] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6082 09:59:46.034397 <6>[ 3.725696] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6083 09:59:46.047299 <6>[ 3.726014] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6084 09:59:46.057415 <6>[ 3.726192] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6085 09:59:46.063786 <6>[ 3.736964] NET: Registered PF_PACKET protocol family
6086 09:59:46.070917 <6>[ 3.741351] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6087 09:59:46.074350 <6>[ 3.752561] 9pnet: Installing 9P2000 support
6088 09:59:46.077346 <5>[ 3.779002] Key type dns_resolver registered
6089 09:59:46.084014 <6>[ 3.781823] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6090 09:59:46.090697 <6>[ 3.784111] registered taskstats version 1
6091 09:59:46.094326 <5>[ 3.794686] Loading compiled-in X.509 certificates
6092 09:59:46.136391 <3>[ 3.833353] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6093 09:59:46.169341 <6>[ 3.862689] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6094 09:59:46.180266 <6>[ 3.877052] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6095 09:59:46.190568 <6>[ 3.885631] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6096 09:59:46.196850 <6>[ 3.894190] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6097 09:59:46.206863 <6>[ 3.902842] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6098 09:59:46.213590 <6>[ 3.911448] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6099 09:59:46.223472 <6>[ 3.920017] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6100 09:59:46.233216 <6>[ 3.928584] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6101 09:59:46.239603 <6>[ 3.938137] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6102 09:59:46.246500 <6>[ 3.945706] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6103 09:59:46.253369 <6>[ 3.952997] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6104 09:59:46.263370 <6>[ 3.960307] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6105 09:59:46.270288 <6>[ 3.967774] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6106 09:59:46.273210 <6>[ 3.975639] hub 1-1:1.0: USB hub found
6107 09:59:46.279885 <6>[ 3.980051] hub 1-1:1.0: 3 ports detected
6108 09:59:46.286675 <6>[ 3.984801] panfrost 13040000.gpu: clock rate = 511999970
6109 09:59:46.293256 <6>[ 3.990483] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6110 09:59:46.304293 <6>[ 4.000836] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6111 09:59:46.310756 <6>[ 4.008849] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6112 09:59:46.323821 <6>[ 4.017297] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6113 09:59:46.330243 <6>[ 4.029378] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6114 09:59:46.343572 <6>[ 4.040569] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6115 09:59:46.353676 <6>[ 4.049463] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6116 09:59:46.363703 <6>[ 4.058620] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6117 09:59:46.370581 <6>[ 4.067750] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6118 09:59:46.380405 <6>[ 4.076878] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6119 09:59:46.390492 <6>[ 4.086179] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6120 09:59:46.400171 <6>[ 4.095479] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6121 09:59:46.410055 <6>[ 4.104953] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6122 09:59:46.417040 <6>[ 4.114428] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6123 09:59:46.427062 <6>[ 4.123554] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6124 09:59:46.500885 <6>[ 4.197502] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6125 09:59:46.511027 <6>[ 4.206420] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6126 09:59:46.521249 <6>[ 4.218328] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6127 09:59:46.600843 <6>[ 4.297699] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6128 09:59:47.224328 <6>[ 4.404776] hub 1-1.1:1.0: USB hub found
6129 09:59:47.227672 <6>[ 4.404983] hub 1-1.1:1.0: 4 ports detected
6130 09:59:47.234267 <6>[ 4.907860] Console: switching to colour frame buffer device 170x48
6131 09:59:47.243973 <6>[ 4.939884] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6132 09:59:47.267353 <6>[ 4.960843] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6133 09:59:47.286781 <6>[ 4.980552] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6134 09:59:47.297419 <6>[ 4.993267] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6135 09:59:47.304041 <6>[ 5.001971] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6136 09:59:47.316996 <6>[ 5.010704] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6137 09:59:47.332967 <6>[ 5.029879] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6138 09:59:47.343086 <6>[ 5.030261] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6139 09:59:47.525277 <6>[ 5.222068] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6140 09:59:47.652164 <4>[ 5.349108] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6141 09:59:47.662073 <4>[ 5.358365] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6142 09:59:47.713315 <6>[ 5.409838] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6143 09:59:47.720242 <6>[ 5.420451] r8152 1-1.2:1.0 eth0: v1.12.13
6144 09:59:47.744341 <6>[ 5.437952] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6145 09:59:47.909244 <6>[ 5.605704] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6146 09:59:48.047232 <6>[ 5.740943] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6147 09:59:48.097381 <6>[ 5.794226] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6148 09:59:48.226233 <4>[ 5.923016] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6149 09:59:48.240848 <4>[ 5.937491] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6150 09:59:48.306531 <6>[ 6.006542] r8152 1-1.1.1:1.0 eth1: v1.12.13
6151 09:59:48.335435 <6>[ 6.028956] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6152 09:59:48.362671 <6>[ 6.056000] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6153 09:59:49.359947 <6>[ 7.060165] r8152 1-1.2:1.0 eth0: carrier on
6154 09:59:52.309648 <5>[ 7.081698] Sending DHCP requests .., OK
6155 09:59:52.322181 <6>[ 10.018915] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6156 09:59:52.332162 <6>[ 10.032270] IP-Config: Complete:
6157 09:59:52.346989 <6>[ 10.040749] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6158 09:59:52.360038 <6>[ 10.056723] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6159 09:59:52.374819 <6>[ 10.071323] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6160 09:59:52.383638 <6>[ 10.071470] nameserver0=192.168.201.1
6161 09:59:52.408248 <6>[ 10.108290] clk: Disabling unused clocks
6162 09:59:52.413191 <6>[ 10.116533] ALSA device list:
6163 09:59:52.422140 <6>[ 10.122170] No soundcards found.
6164 09:59:52.430858 <6>[ 10.130919] Freeing unused kernel memory: 8512K
6165 09:59:52.437672 <6>[ 10.138037] Run /init as init process
6166 09:59:52.472438 <6>[ 10.172584] NET: Registered PF_INET6 protocol family
6167 09:59:52.482556 <6>[ 10.182504] Segment Routing with IPv6
6168 09:59:52.489382 <6>[ 10.188358] In-situ OAM (IOAM) with IPv6
6169 09:59:52.531723 <30>[ 10.205264] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6170 09:59:52.540736 <30>[ 10.240754] systemd[1]: Detected architecture arm64.
6171 09:59:52.541232
6172 09:59:52.547099 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6173 09:59:52.547528
6174 09:59:52.561924 <30>[ 10.261912] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6175 09:59:52.702843 <30>[ 10.399534] systemd[1]: Queued start job for default target graphical.target.
6176 09:59:52.734750 <30>[ 10.431458] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6177 09:59:52.744695 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6178 09:59:52.761599 <30>[ 10.458394] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6179 09:59:52.771530 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6180 09:59:52.790570 <30>[ 10.487198] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6181 09:59:52.801905 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6182 09:59:52.817903 <30>[ 10.514387] systemd[1]: Created slice user.slice - User and Session Slice.
6183 09:59:52.827615 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6184 09:59:52.848909 <30>[ 10.542149] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6185 09:59:52.859982 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6186 09:59:52.880466 <30>[ 10.573992] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6187 09:59:52.892267 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6188 09:59:52.919244 <30>[ 10.605984] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6189 09:59:52.936740 <30>[ 10.633565] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6190 09:59:52.943965 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6191 09:59:52.961128 <30>[ 10.657835] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6192 09:59:52.973318 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6193 09:59:52.989327 <30>[ 10.685922] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6194 09:59:53.003486 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6195 09:59:53.018028 <30>[ 10.717935] systemd[1]: Reached target paths.target - Path Units.
6196 09:59:53.029827 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6197 09:59:53.049289 <30>[ 10.745887] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6198 09:59:53.061372 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6199 09:59:53.073754 <30>[ 10.773832] systemd[1]: Reached target slices.target - Slice Units.
6200 09:59:53.088626 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6201 09:59:53.101789 <30>[ 10.801894] systemd[1]: Reached target swap.target - Swaps.
6202 09:59:53.112607 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6203 09:59:53.133208 <30>[ 10.829928] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6204 09:59:53.147074 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6205 09:59:53.165526 <30>[ 10.862277] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6206 09:59:53.179465 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6207 09:59:53.198735 <30>[ 10.895477] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6208 09:59:53.212119 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6209 09:59:53.229838 <30>[ 10.926585] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6210 09:59:53.243762 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6211 09:59:53.261948 <30>[ 10.958489] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6212 09:59:53.273800 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6213 09:59:53.293781 <30>[ 10.990575] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6214 09:59:53.306995 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6215 09:59:53.325700 <30>[ 11.022358] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6216 09:59:53.338340 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6217 09:59:53.381524 <30>[ 11.078043] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6218 09:59:53.392944 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6219 09:59:53.414756 <30>[ 11.111264] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6220 09:59:53.426200 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6221 09:59:53.450927 <30>[ 11.147300] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6222 09:59:53.462044 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6223 09:59:53.488598 <30>[ 11.178538] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6224 09:59:53.529721 <30>[ 11.226336] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6225 09:59:53.542438 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6226 09:59:53.567195 <30>[ 11.263719] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6227 09:59:53.578352 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6228 09:59:53.603155 <30>[ 11.299914] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6229 09:59:53.621281 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel<6>[ 11.316585] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6230 09:59:53.621930 Module dm_mod...
6231 09:59:53.661968 <30>[ 11.358342] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6232 09:59:53.672843 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6233 09:59:53.695173 <30>[ 11.391766] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6234 09:59:53.707126 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6235 09:59:53.729985 <30>[ 11.426709] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6236 09:59:53.740188 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6237 09:59:53.763133 <30>[ 11.459564] systemd[1]: Starting systemd-journald.service - Journal Service...
6238 09:59:53.769369 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6239 09:59:53.797766 <30>[ 11.494739] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6240 09:59:53.810767 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6241 09:59:53.860777 <30>[ 11.554342] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6242 09:59:53.871372 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6243 09:59:53.895398 <30>[ 11.591899] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6244 09:59:53.909141 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6245 09:59:53.932852 <30>[ 11.629464] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6246 09:59:53.946486 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6247 09:59:53.967449 <30>[ 11.664252] systemd[1]: Started systemd-journald.service - Journal Service.
6248 09:59:53.973903 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6249 09:59:53.994153 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6250 09:59:54.013805 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6251 09:59:54.029648 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6252 09:59:54.046173 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6253 09:59:54.062483 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6254 09:59:54.082570 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6255 09:59:54.102579 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6256 09:59:54.122503 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6257 09:59:54.142373 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6258 09:59:54.163305 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6259 09:59:54.183012 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6260 09:59:54.203686 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6261 09:59:54.253940 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6262 09:59:54.279916 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6263 09:59:54.312622 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6264 09:59:54.330657 See 'systemctl status systemd-remount-fs.service' for details.
6265 09:59:54.344076 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6266 09:59:54.362799 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6267 09:59:54.383285 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6268 09:59:54.427161 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6269 09:59:54.443209 <46>[ 12.139964] systemd-journald[202]: Received client request to flush runtime journal.
6270 09:59:54.474040 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6271 09:59:54.496756 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6272 09:59:54.518465 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6273 09:59:54.539858 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6274 09:59:54.559188 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6275 09:59:54.606482 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6276 09:59:54.636398 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6277 09:59:54.654785 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6278 09:59:54.677544 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6279 09:59:54.730452 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6280 09:59:54.755301 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6281 09:59:54.781966 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6282 09:59:54.838354 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6283 09:59:54.860680 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6284 09:59:54.877872 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6285 09:59:54.891295 <6>[ 12.591187] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6286 09:59:54.913551 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6287 09:59:54.946188 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6288 09:59:54.961641 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6289 09:59:55.047154 <6>[ 12.743732] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6290 09:59:55.054291 <3>[ 12.754462] thermal_sys: Failed to find 'trips' node
6291 09:59:55.064334 <3>[ 12.760463] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6292 09:59:55.067997 <3>[ 12.769105] mtk-scp 10500000.scp: invalid resource
6293 09:59:55.077684 <3>[ 12.769966] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6294 09:59:55.084435 <6>[ 12.774907] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6295 09:59:55.094327 <4>[ 12.782686] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6296 09:59:55.098054 <3>[ 12.783996] thermal_sys: Failed to find 'trips' node
6297 09:59:55.107381 <3>[ 12.798488] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6298 09:59:55.117345 <3>[ 12.798620] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6299 09:59:55.120736 <6>[ 12.803149] remoteproc remoteproc0: scp is available
6300 09:59:55.130732 <4>[ 12.803253] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6301 09:59:55.134109 <6>[ 12.803260] remoteproc remoteproc0: powering up scp
6302 09:59:55.144025 <4>[ 12.803276] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6303 09:59:55.150570 <3>[ 12.803279] remoteproc remoteproc0: request_firmware failed: -2
6304 09:59:55.157497 <3>[ 12.803852] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6305 09:59:55.167499 <3>[ 12.803862] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6306 09:59:55.173758 <4>[ 12.804962] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6307 09:59:55.184016 <3>[ 12.813901] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6308 09:59:55.190991 <4>[ 12.814626] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6309 09:59:55.200842 <3>[ 12.821294] elan_i2c 2-0015: Error applying setting, reverse things back
6310 09:59:55.207458 <4>[ 12.826399] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6311 09:59:55.217667 <4>[ 12.828645] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6312 09:59:55.224111 <6>[ 12.837555] mc: Linux media interface: v0.10
6313 09:59:55.233884 <6>[ 12.848221] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6314 09:59:55.240929 <3>[ 12.848753] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6315 09:59:55.253847 <6>[ 12.858004] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6316 09:59:55.260527 <3>[ 12.861901] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6317 09:59:55.267532 <6>[ 12.889258] videodev: Linux video capture interface: v2.00
6318 09:59:55.277437 <3>[ 12.889931] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6319 09:59:55.287536 <3>[ 12.936223] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6320 09:59:55.297947 <6>[ 12.942680] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6321 09:59:55.304462 <3>[ 12.948487] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6322 09:59:55.310895 <6>[ 12.950281] cs_system_cfg: CoreSight Configuration manager initialised
6323 09:59:55.321075 <6>[ 12.951252] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6324 09:59:55.327863 <5>[ 12.961142] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6325 09:59:55.339182 <3>[ 12.966846] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6326 09:59:55.345860 <6>[ 12.973240] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6327 09:59:55.357295 <3>[ 12.981134] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6328 09:59:55.364100 <6>[ 12.994498] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6329 09:59:55.370974 <5>[ 12.996232] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6330 09:59:55.380904 <5>[ 12.996710] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6331 09:59:55.390289 <4>[ 12.996802] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6332 09:59:55.393856 <6>[ 12.996811] cfg80211: failed to load regulatory.db
6333 09:59:55.404049 <3>[ 13.001323] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6334 09:59:55.410831 <3>[ 13.001333] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6335 09:59:55.417316 <6>[ 13.002744] Bluetooth: Core ver 2.22
6336 09:59:55.420545 <6>[ 13.002809] NET: Registered PF_BLUETOOTH protocol family
6337 09:59:55.427149 <6>[ 13.002811] Bluetooth: HCI device and connection manager initialized
6338 09:59:55.433462 <6>[ 13.002822] Bluetooth: HCI socket layer initialized
6339 09:59:55.437079 <6>[ 13.002827] Bluetooth: L2CAP socket layer initialized
6340 09:59:55.444856 <6>[ 13.002834] Bluetooth: SCO socket layer initialized
6341 09:59:55.455169 <6>[ 13.010987] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6342 09:59:55.479512 <46>[ 13.012080] systemd-journald[202]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.1 (1537 of 2047 items, 524288 file size, 341 bytes per hash table item), suggesting rotation.
6343 09:59:55.495524 <46>[ 13.012097] systemd-journald[202]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6344 09:59:55.505934 <3>[ 13.016782] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6345 09:59:55.512925 <6>[ 13.018557] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6346 09:59:55.523641 <6>[ 13.035473] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6347 09:59:55.530386 <6>[ 13.037232] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6348 09:59:55.538522 <6>[ 13.062086] Bluetooth: HCI UART driver ver 2.3
6349 09:59:55.545497 <6>[ 13.064366] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6350 09:59:55.556979 <6>[ 13.064498] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6351 09:59:55.563221 <6>[ 13.070415] Bluetooth: HCI UART protocol H4 registered
6352 09:59:55.571381 <6>[ 13.070470] Bluetooth: HCI UART protocol LL registered
6353 09:59:55.578004 <6>[ 13.070484] Bluetooth: HCI UART protocol Three-wire (H5) registered
6354 09:59:55.593056 <3>[ 13.071155] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6355 09:59:55.606526 <6>[ 13.071957] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6356 09:59:55.613628 <6>[ 13.072112] usbcore: registered new interface driver uvcvideo
6357 09:59:55.625743 <3>[ 13.072448] debugfs: File 'Playback' in directory 'dapm' already present!
6358 09:59:55.629247 <3>[ 13.072456] debugfs: File 'Capture' in directory 'dapm' already present!
6359 09:59:55.639806 <6>[ 13.074977] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6360 09:59:55.650722 <6>[ 13.080268] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6361 09:59:55.654452 <3>[ 13.080556] thermal_sys: Failed to find 'trips' node
6362 09:59:55.661643 <3>[ 13.080567] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6363 09:59:55.671430 <3>[ 13.080582] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6364 09:59:55.681580 <4>[ 13.080591] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6365 09:59:55.691457 <6>[ 13.080621] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6366 09:59:55.700138 <6>[ 13.085980] Bluetooth: HCI UART protocol Broadcom registered
6367 09:59:55.711889 <6>[ 13.094762] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6368 09:59:55.721294 <6>[ 13.099625] Bluetooth: HCI UART protocol QCA registered
6369 09:59:55.730312 <6>[ 13.100167] Bluetooth: hci0: setting up ROME/QCA6390
6370 09:59:55.741976 <6>[ 13.108211] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6371 09:59:55.749385 <6>[ 13.116649] Bluetooth: HCI UART protocol Marvell registered
6372 09:59:55.761410 <6>[ 13.122318] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6373 09:59:55.772881 <6>[ 13.126038] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6374 09:59:55.783517 <6>[ 13.132820] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6375 09:59:55.793666 <4>[ 13.321290] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6376 09:59:55.800233 <4>[ 13.321290] Fallback method does not support PEC.
6377 09:59:55.813463 <6>[ 13.322061] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6378 09:59:55.823708 <3>[ 13.331489] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6379 09:59:55.833717 <3>[ 13.344935] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6380 09:59:55.843380 <3>[ 13.352558] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6381 09:59:55.853792 <3>[ 13.361786] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6382 09:59:55.861262 <3>[ 13.376683] Bluetooth: hci0: Frame reassembly failed (-84)
6383 09:59:55.898921 <3>[ 13.592063] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6384 09:59:55.906568 <3>[ 13.594647] power_supply sbs-12-000b: driver failed to report `health' property: -6
6385 09:59:55.914598 <6>[ 13.595801] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6386 09:59:55.921999 <3>[ 13.603220] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6387 09:59:55.935770 <3>[ 13.604438] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6388 09:59:55.950520 <3>[ 13.612334] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6389 09:59:55.957179 <3>[ 13.617776] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6390 09:59:55.964837 <6>[ 13.651623] Bluetooth: hci0: QCA Product ID :0x00000008
6391 09:59:56.055064 [[0;32m OK [<6>[ 13.751385] Bluetooth: hci0: QCA SOC Version :0x00000044
6392 09:59:56.061424 0m] Created slic<6>[ 13.759557] Bluetooth: hci0: QCA ROM Version :0x00000302
6393 09:59:56.068078 e [0;1;39msyste<6>[ 13.766466] Bluetooth: hci0: QCA Patch Version:0x00000111
6394 09:59:56.074840 m-syste…- Slic<6>[ 13.773460] Bluetooth: hci0: QCA controller version 0x00440302
6395 09:59:56.084755 e /system/system<6>[ 13.780972] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6396 09:59:56.085316 d-backlight.
6397 09:59:56.094533 <4>[ 13.788937] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6398 09:59:56.101299 <3>[ 13.799376] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6399 09:59:56.108626 <3>[ 13.808271] Bluetooth: hci0: QCA Failed to download patch (-2)
6400 09:59:56.121728 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6401 09:59:56.169214 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6402 09:59:56.194343 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6403 09:59:56.243740 <6>[ 13.940582] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6404 09:59:56.271631 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6405 09:59:56.289445 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6406 09:59:56.305125 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6407 09:59:56.322276 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6408 09:59:56.328945 <4>[ 14.026234] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6409 09:59:56.341508 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6410 09:59:56.352987 <4>[ 14.049562] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6411 09:59:56.371143 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - <4>[ 14.065215] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6412 09:59:56.371667 Timer Units.
6413 09:59:56.380045 <4>[ 14.079767] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6414 09:59:56.393176 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6415 09:59:56.411743 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6416 09:59:56.431351 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6417 09:59:56.450703 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6418 09:59:56.490899 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6419 09:59:56.522819 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6420 09:59:56.544410 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6421 09:59:56.568268 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6422 09:59:56.601149 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6423 09:59:56.657877 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6424 09:59:56.693628 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6425 09:59:56.712837 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6426 09:59:56.759584 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6427 09:59:56.778844 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6428 09:59:56.798628 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6429 09:59:56.820695 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6430 09:59:56.837873 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6431 09:59:56.880460 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6432 09:59:56.919121 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6433 09:59:56.986049
6434 09:59:56.989569 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6435 09:59:56.990283
6436 09:59:56.992316 debian-bookworm-arm64 login: root (automatic login)
6437 09:59:56.992739
6438 09:59:57.016675 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024 aarch64
6439 09:59:57.017166
6440 09:59:57.023710 The programs included with the Debian GNU/Linux system are free software;
6441 09:59:57.030323 the exact distribution terms for each program are described in the
6442 09:59:57.033567 individual files in /usr/share/doc/*/copyright.
6443 09:59:57.034068
6444 09:59:57.039729 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6445 09:59:57.042897 permitted by applicable law.
6446 09:59:57.044288 Matched prompt #10: / #
6448 09:59:57.045277 Setting prompt string to ['/ #']
6449 09:59:57.045713 end: 2.2.5.1 login-action (duration 00:00:15) [common]
6451 09:59:57.047048 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6452 09:59:57.047494 start: 2.2.6 expect-shell-connection (timeout 00:03:27) [common]
6453 09:59:57.047857 Setting prompt string to ['/ #']
6454 09:59:57.048170 Forcing a shell prompt, looking for ['/ #']
6456 09:59:57.098970 / #
6457 09:59:57.099645 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6458 09:59:57.100052 Waiting using forced prompt support (timeout 00:02:30)
6459 09:59:57.105736
6460 09:59:57.106620 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6461 09:59:57.107113 start: 2.2.7 export-device-env (timeout 00:03:27) [common]
6462 09:59:57.107573 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6463 09:59:57.107987 end: 2.2 depthcharge-retry (duration 00:01:33) [common]
6464 09:59:57.108514 end: 2 depthcharge-action (duration 00:01:33) [common]
6465 09:59:57.108981 start: 3 lava-test-retry (timeout 00:08:02) [common]
6466 09:59:57.109438 start: 3.1 lava-test-shell (timeout 00:08:02) [common]
6467 09:59:57.109805 Using namespace: common
6469 09:59:57.211032 / # #
6470 09:59:57.211757 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6471 09:59:57.217419 #
6472 09:59:57.218127 Using /lava-14407631
6474 09:59:57.319489 / # export SHELL=/bin/sh
6475 09:59:57.325727 export SHELL=/bin/sh
6477 09:59:57.426535 / # . /lava-14407631/environment
6478 09:59:57.432707 . /lava-14407631/environment
6480 09:59:57.534361 / # /lava-14407631/bin/lava-test-runner /lava-14407631/0
6481 09:59:57.534998 Test shell timeout: 10s (minimum of the action and connection timeout)
6482 09:59:57.541085 /lava-14407631/bin/lava-test-runner /lava-14407631/0
6483 09:59:57.568390 + export TESTRUN_ID=0_igt-gpu-panfrost
6484 09:59:57.574926 + cd /la<8>[ 15.271434] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14407631_1.5.2.3.1>
6485 09:59:57.575736 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14407631_1.5.2.3.1
6486 09:59:57.576125 Starting test lava.0_igt-gpu-panfrost (14407631_1.5.2.3.1)
6487 09:59:57.576545 Skipping test definition patterns.
6488 09:59:57.579377 va-14407631/0/tests/0_igt-gpu-panfrost
6489 09:59:57.579888 + cat uuid
6490 09:59:57.581599 + UUID=14407631_1.5.2.3.1
6491 09:59:57.582032 + set +x
6492 09:59:57.591500 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6493 09:59:57.601730 <8>[ 15.301348] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6494 09:59:57.602561 Received signal: <TESTSET> START panfrost_gem_new
6495 09:59:57.602954 Starting test_set panfrost_gem_new
6496 09:59:57.624004 <6>[ 15.323960] Console: switching to colour dummy device 80x25
6497 09:59:57.630948 <14>[ 15.329984] [IGT] panfrost_gem_new: executing
6498 09:59:57.637408 IGT-Version: 1.2<14>[ 15.335035] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6499 09:59:57.647214 8-ga44ebfe (aarc<14>[ 15.343024] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6500 09:59:57.654191 h64) (Linux: 6.1<14>[ 15.351767] [IGT] panfrost_gem_new: exiting, ret=0
6501 09:59:57.654744 .92-cip22 aarch64)
6502 09:59:57.660574 Using IGT_SRANDOM=1718704797 for randomisation
6503 09:59:57.660997 Opened device: /dev/dri/card0
6504 09:59:57.664293 Starting subtest: gem-new-4096
6505 09:59:57.670389 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6506 09:59:57.704160 <6>[ 15.387144] Console: switching to colour frame buffer device 170x48
6507 09:59:57.721358 <8>[ 15.418098] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6508 09:59:57.722079 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6510 09:59:57.753397 <6>[ 15.453340] Console: switching to colour dummy device 80x25
6511 09:59:57.760260 <14>[ 15.459323] [IGT] panfrost_gem_new: executing
6512 09:59:57.766843 IGT-Version: 1.2<14>[ 15.464658] [IGT] panfrost_gem_new: starting subtest gem-new-0
6513 09:59:57.776601 8-ga44ebfe (aarc<14>[ 15.472165] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6514 09:59:57.783352 h64) (Linux: 6.1<14>[ 15.480848] [IGT] panfrost_gem_new: exiting, ret=0
6515 09:59:57.783782 .92-cip22 aarch64)
6516 09:59:57.786865 Using IGT_SRANDOM=1718704797 for randomisation
6517 09:59:57.790083 Opened device: /dev/dri/card0
6518 09:59:57.793516 Starting subtest: gem-new-0
6519 09:59:57.796271 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6520 09:59:57.840298 <6>[ 15.520457] Console: switching to colour frame buffer device 170x48
6521 09:59:57.854653 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6523 09:59:57.857095 <8>[ 15.553810] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6524 09:59:57.888054 <6>[ 15.587962] Console: switching to colour dummy device 80x25
6525 09:59:57.894893 <14>[ 15.594119] [IGT] panfrost_gem_new: executing
6526 09:59:57.901496 IGT-Version: 1.2<14>[ 15.599429] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6527 09:59:57.911249 8-ga44ebfe (aarch64) (Linux: 6.1<14>[ 15.608590] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6528 09:59:57.918040 <14>[ 15.617449] [IGT] panfrost_gem_new: exiting, ret=0
6529 09:59:57.918504 .92-cip22 aarch64)
6530 09:59:57.925123 Using IGT_SRANDOM=1718704797 for randomisation
6531 09:59:57.928346 Opened device: /dev/dri/card0
6532 09:59:57.931211 Starting subtest: gem-new-zeroed
6533 09:59:57.934662 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6534 09:59:57.972796 <6>[ 15.653375] Console: switching to colour frame buffer device 170x48
6535 09:59:57.989374 <8>[ 15.685780] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6536 09:59:57.990154 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6538 09:59:57.996010 <8>[ 15.695256] <LAVA_SIGNAL_TESTSET STOP>
6539 09:59:57.996777 Received signal: <TESTSET> STOP
6540 09:59:57.997127 Closing test_set panfrost_gem_new
6541 09:59:58.034055 <8>[ 15.733850] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6542 09:59:58.034867 Received signal: <TESTSET> START panfrost_get_param
6543 09:59:58.035223 Starting test_set panfrost_get_param
6544 09:59:58.057694 <6>[ 15.757236] Console: switching to colour dummy device 80x25
6545 09:59:58.064404 <14>[ 15.763493] [IGT] panfrost_get_param: executing
6546 09:59:58.071136 IGT-Version: 1.2<14>[ 15.769076] [IGT] panfrost_get_param: starting subtest base-params
6547 09:59:58.081103 8-ga44ebfe (aarc<14>[ 15.777188] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6548 09:59:58.087457 h64) (Linux: 6.1<14>[ 15.786195] [IGT] panfrost_get_param: exiting, ret=0
6549 09:59:58.090707 .92-cip22 aarch64)
6550 09:59:58.094428 Using IGT_SRANDOM=1718704797 for randomisation
6551 09:59:58.097659 Opened device: /dev/dri/card0
6552 09:59:58.101107 Starting subtest: base-params
6553 09:59:58.104465 [1mSubtest base-params: SUCCESS (0.000s)[0m
6554 09:59:58.136541 <6>[ 15.819498] Console: switching to colour frame buffer device 170x48
6555 09:59:58.152539 <8>[ 15.849155] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6556 09:59:58.153336 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6558 09:59:58.175103 <6>[ 15.874668] Console: switching to colour dummy device 80x25
6559 09:59:58.181901 <14>[ 15.880824] [IGT] panfrost_get_param: executing
6560 09:59:58.188337 IGT-Version: 1.2<14>[ 15.886017] [IGT] panfrost_get_param: starting subtest get-bad-param
6561 09:59:58.198332 8-ga44ebfe (aarc<14>[ 15.894070] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6562 09:59:58.204580 h64) (Linux: 6.1<14>[ 15.903288] [IGT] panfrost_get_param: exiting, ret=0
6563 09:59:58.208186 .92-cip22 aarch64)
6564 09:59:58.211296 Using IGT_SRANDOM=1718704798 for randomisation
6565 09:59:58.214733 Opened device: /dev/dri/card0
6566 09:59:58.217903 Starting subtest: get-bad-param
6567 09:59:58.221293 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6568 09:59:58.252661 <6>[ 15.935588] Console: switching to colour frame buffer device 170x48
6569 09:59:58.271398 <8>[ 15.968074] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6570 09:59:58.272165 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6572 09:59:58.302988 <6>[ 16.003075] Console: switching to colour dummy device 80x25
6573 09:59:58.310187 <14>[ 16.009121] [IGT] panfrost_get_param: executing
6574 09:59:58.316697 IGT-Version: 1.2<14>[ 16.014857] [IGT] panfrost_get_param: starting subtest get-bad-padding
6575 09:59:58.326504 <14>[ 16.022466] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6576 09:59:58.333292 8-ga44ebfe (aarc<14>[ 16.030508] [IGT] panfrost_get_param: exiting, ret=0
6577 09:59:58.336242 h64) (Linux: 6.1.92-cip22 aarch64)
6578 09:59:58.339751 Using IGT_SRANDOM=1718704798 for randomisation
6579 09:59:58.343228 Opened device: /dev/dri/card0
6580 09:59:58.346893 Starting subtest: get-bad-padding
6581 09:59:58.349870 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6582 09:59:58.388680 <6>[ 16.068782] Console: switching to colour frame buffer device 170x48
6583 09:59:58.407607 <8>[ 16.104135] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6584 09:59:58.408375 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6586 09:59:58.415021 <8>[ 16.115010] <LAVA_SIGNAL_TESTSET STOP>
6587 09:59:58.415690 Received signal: <TESTSET> STOP
6588 09:59:58.416048 Closing test_set panfrost_get_param
6589 09:59:58.455094 <8>[ 16.154957] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6590 09:59:58.455863 Received signal: <TESTSET> START panfrost_prime
6591 09:59:58.456223 Starting test_set panfrost_prime
6592 09:59:58.478004 <6>[ 16.177656] Console: switching to colour dummy device 80x25
6593 09:59:58.484507 <14>[ 16.183898] [IGT] panfrost_prime: executing
6594 09:59:58.491268 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6595 09:59:58.494508 Using IGT_SRANDOM=1718704798 for randomisation
6596 09:59:58.497972 Opened device: /dev/dri/card0
6597 09:59:58.517158 <14>[ 16.216656] [IGT] panfrost_prime: starting subtest gem-prime-import
6598 09:59:58.520369 Starting subtest: gem-prime-import
6599 09:59:58.533914 (panfrost_prime:356) CRITICAL: Test assertion failure functi<14>[ 16.231981] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6600 09:59:58.540439 on igt_has_dumb,<14>[ 16.239643] [IGT] panfrost_prime: exiting, ret=98
6601 09:59:58.543917 file ../tests/panfrost_prime.c:44:
6602 09:59:58.553388 (panfrost_prime:356) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6603 09:59:58.560153 (panfrost_prime:356) CRITICAL: Last errno: 9, Bad file descriptor
6604 09:59:58.560705 Stack trace:
6605 09:59:58.563450 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6606 09:59:58.567014 #1 [<unknown>+0xbc011358]
6607 09:59:58.570429 #2 [<unknown>+0xbc010f2c]
6608 09:59:58.573803 #3 [__libc_init_first+0x80]
6609 09:59:58.574330 #4 [__libc_start_main+0x98]
6610 09:59:58.576678 #5 [<unknown>+0xbc010f70]
6611 09:59:58.580089 Subtest gem-prime-import failed.
6612 09:59:58.583336 **** DEBUG ****
6613 09:59:58.590660 (panfrost_prime:356) CRITICA<6>[ 16.271170] Console: switching to colour frame buffer device 170x48
6614 09:59:58.606926 L: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:<8>[ 16.302656] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6615 09:59:58.607440 44:
6616 09:59:58.608040 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6618 09:59:58.613463 (panfrost_prime:356) CRITIC<8>[ 16.312471] <LAVA_SIGNAL_TESTSET STOP>
6619 09:59:58.614308 Received signal: <TESTSET> STOP
6620 09:59:58.614667 Closing test_set panfrost_prime
6621 09:59:58.620153 AL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6622 09:59:58.623648 (panfrost_prime:356) CRITICAL: Last errno: 9, Bad file descriptor
6623 09:59:58.630391 (panfrost_prime:356) igt_core-INFO: Stack trace:
6624 09:59:58.637020 (panfrost_prime:356) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6625 09:59:58.643571 (panfrost_prime:356) igt_core-INFO: #1 [<unknown>+0xbc011358]
6626 09:59:58.653461 (panfrost_prime:356) igt_core-INFO: #2 [<unknown>+0xbc010<8>[ 16.351873] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6627 09:59:58.653970 f2c]
6628 09:59:58.654620 Received signal: <TESTSET> START panfrost_submit
6629 09:59:58.654960 Starting test_set panfrost_submit
6630 09:59:58.660151 (panfrost_prime:356) igt_core-INFO: #3 [__libc_init_first+0x80]
6631 09:59:58.666820 (panfrost_prime:356) igt_core-INFO: #4 [__libc_start_main+0x98]
6632 09:59:58.676696 (panfrost_prime:356) igt_core-INFO: #5 [<unknown>+<6>[ 16.375519] Console: switching to colour dummy device 80x25
6633 09:59:58.677212 0xbc010f70]
6634 09:59:58.683601 ***<14>[ 16.382104] [IGT] panfrost_submit: executing
6635 09:59:58.684114 * END ****
6636 09:59:58.690085 [<14>[ 16.388261] [IGT] panfrost_submit: starting subtest pan-submit
6637 09:59:58.699925 1mSubtest gem-pr<14>[ 16.396244] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6638 09:59:58.703193 <14>[ 16.403942] [IGT] panfrost_submit: exiting, ret=0
6639 09:59:58.706391 ime-import: FAIL (0.008s)[0m
6640 09:59:58.716252 (panfrost_prime:356) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1
6641 09:59:58.723381 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6642 09:59:58.726616 Using IGT_SRANDOM=1718704798 for randomisation
6643 09:59:58.729716 Opened device: /dev/dri/card0
6644 09:59:58.733078 Starting subtest: pan-submit
6645 09:59:58.736253 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6646 09:59:58.751430 <6>[ 16.434366] Console: switching to colour frame buffer device 170x48
6647 09:59:58.763892 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6649 09:59:58.766885 <8>[ 16.463661] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6650 09:59:58.787718 <6>[ 16.487278] Console: switching to colour dummy device 80x25
6651 09:59:58.793998 <14>[ 16.493251] [IGT] panfrost_submit: executing
6652 09:59:58.800769 IGT-Version: 1.2<14>[ 16.498475] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6653 09:59:58.810471 <14>[ 16.507077] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6654 09:59:58.817071 8-ga44ebfe (aarc<14>[ 16.515446] [IGT] panfrost_submit: exiting, ret=0
6655 09:59:58.820534 h64) (Linux: 6.1.92-cip22 aarch64)
6656 09:59:58.823651 Using IGT_SRANDOM=1718704798 for randomisation
6657 09:59:58.827131 Opened device: /dev/dri/card0
6658 09:59:58.830592 Starting subtest: pan-submit-error-no-jc
6659 09:59:58.837294 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6660 09:59:58.867529 <6>[ 16.550620] Console: switching to colour frame buffer device 170x48
6661 09:59:58.883719 <8>[ 16.580499] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6662 09:59:58.884488 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6664 09:59:58.905055 <6>[ 16.605061] Console: switching to colour dummy device 80x25
6665 09:59:58.911733 <14>[ 16.611113] [IGT] panfrost_submit: executing
6666 09:59:58.921886 IGT-Version: 1.2<14>[ 16.616073] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6667 09:59:58.931670 8-ga44ebfe (aarc<14>[ 16.625328] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6668 09:59:58.935232 h64) (Linux: 6.1<14>[ 16.635520] [IGT] panfrost_submit: exiting, ret=0
6669 09:59:58.938431 .92-cip22 aarch64)
6670 09:59:58.941804 Using IGT_SRANDOM=1718704798 for randomisation
6671 09:59:58.945005 Opened device: /dev/dri/card0
6672 09:59:58.951641 Starting subtest: pan-submit-error-bad-in-syncs
6673 09:59:58.954899 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6674 09:59:58.984162 <6>[ 16.666954] Console: switching to colour frame buffer device 170x48
6675 09:59:58.999991 <8>[ 16.696556] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6676 09:59:59.000768 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6678 09:59:59.031403 <6>[ 16.731280] Console: switching to colour dummy device 80x25
6679 09:59:59.038108 <14>[ 16.737269] [IGT] panfrost_submit: executing
6680 09:59:59.048032 IGT-Version: 1.2<14>[ 16.742657] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6681 09:59:59.058283 8-ga44ebfe (aarc<14>[ 16.752084] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6682 09:59:59.064770 h64) (Linux: 6.1<14>[ 16.762298] [IGT] panfrost_submit: exiting, ret=0
6683 09:59:59.065283 .92-cip22 aarch64)
6684 09:59:59.067735 Using IGT_SRANDOM=1718704798 for randomisation
6685 09:59:59.071547 Opened device: /dev/dri/card0
6686 09:59:59.078196 Starting subtest: pan-submit-error-bad-bo-handles
6687 09:59:59.081202 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6688 09:59:59.120094 <6>[ 16.800395] Console: switching to colour frame buffer device 170x48
6689 09:59:59.138090 <8>[ 16.834642] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6690 09:59:59.138933 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6692 09:59:59.172301 <6>[ 16.871876] Console: switching to colour dummy device 80x25
6693 09:59:59.178687 <14>[ 16.878131] [IGT] panfrost_submit: executing
6694 09:59:59.188957 IGT-Version: 1.2<14>[ 16.883670] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6695 09:59:59.198921 8-ga44ebfe (aarc<14>[ 16.893095] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6696 09:59:59.205589 h64) (Linux: 6.1<14>[ 16.903582] [IGT] panfrost_submit: exiting, ret=0
6697 09:59:59.206130 .92-cip22 aarch64)
6698 09:59:59.212360 Using IGT_SRANDOM=1718704799 for randomisation
6699 09:59:59.212863 Opened device: /dev/dri/card0
6700 09:59:59.218600 Starting subtest: pan-submit-error-bad-requirements
6701 09:59:59.225276 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6702 09:59:59.252337 <6>[ 16.933350] Console: switching to colour frame buffer device 170x48
6703 09:59:59.270159 <8>[ 16.966752] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6704 09:59:59.271013 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6706 09:59:59.292785 <6>[ 16.992569] Console: switching to colour dummy device 80x25
6707 09:59:59.299459 <14>[ 16.998757] [IGT] panfrost_submit: executing
6708 09:59:59.309240 IGT-Version: 1.2<14>[ 17.003704] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6709 09:59:59.319063 8-ga44ebfe (aarc<14>[ 17.013106] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6710 09:59:59.325684 h64) (Linux: 6.1<14>[ 17.023339] [IGT] panfrost_submit: exiting, ret=0
6711 09:59:59.326195 .92-cip22 aarch64)
6712 09:59:59.332573 Using IGT_SRANDOM=1718704799 for randomisation
6713 09:59:59.333076 Opened device: /dev/dri/card0
6714 09:59:59.339535 Starting subtest: pan-submit-error-bad-out-sync
6715 09:59:59.346074 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6716 09:59:59.366263 <6>[ 17.049365] Console: switching to colour frame buffer device 170x48
6717 09:59:59.384992 <8>[ 17.081307] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6718 09:59:59.385764 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6720 09:59:59.417648 <6>[ 17.117558] Console: switching to colour dummy device 80x25
6721 09:59:59.424549 <14>[ 17.123552] [IGT] panfrost_submit: executing
6722 09:59:59.431459 IGT-Version: 1.2<14>[ 17.128842] [IGT] panfrost_submit: starting subtest pan-reset
6723 09:59:59.434409 8-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6724 09:59:59.441341 Using IGT_SRANDOM=1718704799 for randomisation
6725 09:59:59.441848 Opened device: /dev/dri/card0
6726 09:59:59.444363 Starting subtest: pan-reset
6727 09:59:59.943671 <3>[ 17.636895] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000000, tail=0x2000000, sched_job=00000000fcbb5652
6728 09:59:59.958266 <14>[ 17.654825] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6729 09:59:59.965052 [1mSubtest pan-<14>[ 17.661846] [IGT] panfrost_submit: exiting, ret=0
6730 09:59:59.965561 reset: SUCCESS (0.519s)[0m
6731 10:00:00.019583 <6>[ 17.702392] Console: switching to colour frame buffer device 170x48
6732 10:00:00.035152 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6734 10:00:00.038051 <8>[ 17.734833] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6735 10:00:00.069524 <6>[ 17.769345] Console: switching to colour dummy device 80x25
6736 10:00:00.076093 <14>[ 17.775713] [IGT] panfrost_submit: executing
6737 10:00:00.083158 IGT-Version: 1.2<14>[ 17.781477] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6738 10:00:00.092993 8-ga44ebfe (aarc<14>[ 17.789829] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6739 10:00:00.099488 h64) (Linux: 6.1<14>[ 17.798846] [IGT] panfrost_submit: exiting, ret=0
6740 10:00:00.102887 .92-cip22 aarch64)
6741 10:00:00.106265 Using IGT_SRANDOM=1718704799 for randomisation
6742 10:00:00.109304 Opened device: /dev/dri/card0
6743 10:00:00.112688 Starting subtest: pan-submit-and-close
6744 10:00:00.115942 [1mSubtest pan-submit-and-close: SUCCESS (0.001s)[0m
6745 10:00:00.147253 <6>[ 17.830827] Console: switching to colour frame buffer device 170x48
6746 10:00:00.165059 <8>[ 17.861813] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6747 10:00:00.165814 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6749 10:00:00.187166 <6>[ 17.887205] Console: switching to colour dummy device 80x25
6750 10:00:00.194022 <14>[ 17.893212] [IGT] panfrost_submit: executing
6751 10:00:00.200670 IGT-Version: 1.2<14>[ 17.898149] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6752 10:00:00.210428 8-ga44ebfe (aarc<3>[ 17.907314] panfrost 13040000.gpu: Unhandled Page fault in AS0 at VA 0x0000DEADBEEF0000
6753 10:00:00.213833 <3>[ 17.907314] Reason: TODO
6754 10:00:00.217118 <3>[ 17.907314] raw fault status: 0x7C1003C0
6755 10:00:00.223674 <3>[ 17.907314] decoded fault status: SLAVE FAULT
6756 10:00:00.227155 <3>[ 17.907314] exception type 0xC0: TRANSLATION_FAULT_0
6757 10:00:00.230527 <3>[ 17.907314] access type 0x3: WRITE
6758 10:00:00.234029 <3>[ 17.907314] source id 0x7C10
6759 10:00:00.247671 h64) (Linux: 6.1<3>[ 17.940137] panfrost 13040000.gpu: js fault, js=1, status=JOB_BUS_FAULT, head=0x2000000, tail=0x2000000
6760 10:00:00.257326 .92-cip22 aarch6<14>[ 17.951861] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, SUCCESS
6761 10:00:00.257850 4)
6762 10:00:00.260537 Using IGT_SR<14>[ 17.960689] [IGT] panfrost_submit: exiting, ret=0
6763 10:00:00.264211 ANDOM=1718704800 for randomisation
6764 10:00:00.267180 Opened device: /dev/dri/card0
6765 10:00:00.270740 Starting subtest: pan-unhandled-pagefault
6766 10:00:00.277153 [1mSubtest pan-unhandled-pagefault: SUCCESS (0.045s)[0m
6767 10:00:00.317728 <6>[ 18.000604] Console: switching to colour frame buffer device 170x48
6768 10:00:00.336629 <8>[ 18.033534] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass>
6769 10:00:00.337328 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass
6771 10:00:00.344479 <8>[ 18.044444] <LAVA_SIGNAL_TESTSET STOP>
6772 10:00:00.344916 + set +x
6773 10:00:00.345498 Received signal: <TESTSET> STOP
6774 10:00:00.345887 Closing test_set panfrost_submit
6775 10:00:00.351271 <8>[ 18.050063] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14407631_1.5.2.3.1>
6776 10:00:00.351970 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14407631_1.5.2.3.1
6777 10:00:00.352411 Ending use of test pattern.
6778 10:00:00.352727 Ending test lava.0_igt-gpu-panfrost (14407631_1.5.2.3.1), duration 2.78
6780 10:00:00.356769 <LAVA_TEST_RUNNER EXIT>
6781 10:00:00.357526 ok: lava_test_shell seems to have completed
6782 10:00:00.359399 base-params:
result: pass
set: panfrost_get_param
gem-new-0:
result: pass
set: panfrost_gem_new
gem-new-4096:
result: pass
set: panfrost_gem_new
gem-new-zeroed:
result: pass
set: panfrost_gem_new
gem-prime-import:
result: fail
set: panfrost_prime
get-bad-padding:
result: pass
set: panfrost_get_param
get-bad-param:
result: pass
set: panfrost_get_param
pan-reset:
result: pass
set: panfrost_submit
pan-submit:
result: pass
set: panfrost_submit
pan-submit-and-close:
result: pass
set: panfrost_submit
pan-submit-error-bad-bo-handles:
result: pass
set: panfrost_submit
pan-submit-error-bad-in-syncs:
result: pass
set: panfrost_submit
pan-submit-error-bad-out-sync:
result: pass
set: panfrost_submit
pan-submit-error-bad-requirements:
result: pass
set: panfrost_submit
pan-submit-error-no-jc:
result: pass
set: panfrost_submit
pan-unhandled-pagefault:
result: pass
set: panfrost_submit
6783 10:00:00.359932 end: 3.1 lava-test-shell (duration 00:00:03) [common]
6784 10:00:00.360385 end: 3 lava-test-retry (duration 00:00:03) [common]
6785 10:00:00.360840 start: 4 finalize (timeout 00:07:59) [common]
6786 10:00:00.361305 start: 4.1 power-off (timeout 00:00:30) [common]
6787 10:00:00.362071 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6788 10:00:02.520928 >> Command sent successfully.
6789 10:00:02.527576 Returned 0 in 2 seconds
6790 10:00:02.628359 end: 4.1 power-off (duration 00:00:02) [common]
6792 10:00:02.629747 start: 4.2 read-feedback (timeout 00:07:57) [common]
6793 10:00:02.630895 Listened to connection for namespace 'common' for up to 1s
6794 10:00:03.631624 Finalising connection for namespace 'common'
6795 10:00:03.632269 Disconnecting from shell: Finalise
6796 10:00:03.632650 / #
6797 10:00:03.733552 end: 4.2 read-feedback (duration 00:00:01) [common]
6798 10:00:03.734278 end: 4 finalize (duration 00:00:03) [common]
6799 10:00:03.734897 Cleaning after the job
6800 10:00:03.735407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/ramdisk
6801 10:00:03.744547 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/kernel
6802 10:00:03.759944 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/dtb
6803 10:00:03.760138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407631/tftp-deploy-9mpqo1m0/modules
6804 10:00:03.765820 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407631
6805 10:00:03.871421 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407631
6806 10:00:03.871580 Job finished correctly