Boot log: mt8183-kukui-jacuzzi-juniper-sku16

    1 09:58:52.191813  lava-dispatcher, installed at version: 2024.03
    2 09:58:52.192037  start: 0 validate
    3 09:58:52.192174  Start time: 2024-06-18 09:58:52.192165+00:00 (UTC)
    4 09:58:52.192303  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:58:52.192452  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 09:58:52.476549  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:58:52.477250  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 09:58:52.731265  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:58:52.732018  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
   10 09:58:52.984892  Using caching service: 'http://localhost/cache/?uri=%s'
   11 09:58:52.985669  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 09:58:53.247764  Using caching service: 'http://localhost/cache/?uri=%s'
   13 09:58:53.248518  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   14 09:58:53.511809  validate duration: 1.32
   16 09:58:53.512114  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 09:58:53.512222  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 09:58:53.512315  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 09:58:53.512453  Not decompressing ramdisk as can be used compressed.
   20 09:58:53.512547  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
   21 09:58:53.512620  saving as /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/ramdisk/initrd.cpio.gz
   22 09:58:53.512691  total size: 5628169 (5 MB)
   23 09:58:53.513821  progress   0 % (0 MB)
   24 09:58:53.515744  progress   5 % (0 MB)
   25 09:58:53.517493  progress  10 % (0 MB)
   26 09:58:53.519066  progress  15 % (0 MB)
   27 09:58:53.520827  progress  20 % (1 MB)
   28 09:58:53.522426  progress  25 % (1 MB)
   29 09:58:53.524181  progress  30 % (1 MB)
   30 09:58:53.525931  progress  35 % (1 MB)
   31 09:58:53.527474  progress  40 % (2 MB)
   32 09:58:53.529201  progress  45 % (2 MB)
   33 09:58:53.530791  progress  50 % (2 MB)
   34 09:58:53.532513  progress  55 % (2 MB)
   35 09:58:53.534217  progress  60 % (3 MB)
   36 09:58:53.535760  progress  65 % (3 MB)
   37 09:58:53.537475  progress  70 % (3 MB)
   38 09:58:53.539002  progress  75 % (4 MB)
   39 09:58:53.540724  progress  80 % (4 MB)
   40 09:58:53.542246  progress  85 % (4 MB)
   41 09:58:53.543982  progress  90 % (4 MB)
   42 09:58:53.545705  progress  95 % (5 MB)
   43 09:58:53.547261  progress 100 % (5 MB)
   44 09:58:53.547500  5 MB downloaded in 0.03 s (154.20 MB/s)
   45 09:58:53.547667  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 09:58:53.547939  end: 1.1 download-retry (duration 00:00:00) [common]
   48 09:58:53.548035  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 09:58:53.548127  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 09:58:53.548274  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   51 09:58:53.548355  saving as /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/kernel/Image
   52 09:58:53.548423  total size: 54813184 (52 MB)
   53 09:58:53.548490  No compression specified
   54 09:58:53.549660  progress   0 % (0 MB)
   55 09:58:53.565153  progress   5 % (2 MB)
   56 09:58:53.580731  progress  10 % (5 MB)
   57 09:58:53.596093  progress  15 % (7 MB)
   58 09:58:53.611800  progress  20 % (10 MB)
   59 09:58:53.627325  progress  25 % (13 MB)
   60 09:58:53.642715  progress  30 % (15 MB)
   61 09:58:53.658250  progress  35 % (18 MB)
   62 09:58:53.673863  progress  40 % (20 MB)
   63 09:58:53.689395  progress  45 % (23 MB)
   64 09:58:53.704987  progress  50 % (26 MB)
   65 09:58:53.720724  progress  55 % (28 MB)
   66 09:58:53.736149  progress  60 % (31 MB)
   67 09:58:53.751677  progress  65 % (34 MB)
   68 09:58:53.767051  progress  70 % (36 MB)
   69 09:58:53.782492  progress  75 % (39 MB)
   70 09:58:53.798415  progress  80 % (41 MB)
   71 09:58:53.814101  progress  85 % (44 MB)
   72 09:58:53.830274  progress  90 % (47 MB)
   73 09:58:53.845717  progress  95 % (49 MB)
   74 09:58:53.861707  progress 100 % (52 MB)
   75 09:58:53.862027  52 MB downloaded in 0.31 s (166.69 MB/s)
   76 09:58:53.862263  end: 1.2.1 http-download (duration 00:00:00) [common]
   78 09:58:53.862684  end: 1.2 download-retry (duration 00:00:00) [common]
   79 09:58:53.862820  start: 1.3 download-retry (timeout 00:10:00) [common]
   80 09:58:53.862957  start: 1.3.1 http-download (timeout 00:10:00) [common]
   81 09:58:53.863148  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   82 09:58:53.863271  saving as /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
   83 09:58:53.863376  total size: 57695 (0 MB)
   84 09:58:53.863489  No compression specified
   85 09:58:53.865074  progress  56 % (0 MB)
   86 09:58:53.865421  progress 100 % (0 MB)
   87 09:58:53.865685  0 MB downloaded in 0.00 s (23.85 MB/s)
   88 09:58:53.865841  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 09:58:53.866135  end: 1.3 download-retry (duration 00:00:00) [common]
   91 09:58:53.866231  start: 1.4 download-retry (timeout 00:10:00) [common]
   92 09:58:53.866347  start: 1.4.1 http-download (timeout 00:10:00) [common]
   93 09:58:53.866482  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
   94 09:58:53.866559  saving as /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/nfsrootfs/full.rootfs.tar
   95 09:58:53.866629  total size: 120894716 (115 MB)
   96 09:58:53.866749  Using unxz to decompress xz
   97 09:58:53.871292  progress   0 % (0 MB)
   98 09:58:54.253599  progress   5 % (5 MB)
   99 09:58:54.644943  progress  10 % (11 MB)
  100 09:58:55.034096  progress  15 % (17 MB)
  101 09:58:55.394170  progress  20 % (23 MB)
  102 09:58:55.718581  progress  25 % (28 MB)
  103 09:58:56.115439  progress  30 % (34 MB)
  104 09:58:56.489826  progress  35 % (40 MB)
  105 09:58:56.672900  progress  40 % (46 MB)
  106 09:58:56.870077  progress  45 % (51 MB)
  107 09:58:57.212826  progress  50 % (57 MB)
  108 09:58:57.626886  progress  55 % (63 MB)
  109 09:58:58.008518  progress  60 % (69 MB)
  110 09:58:58.384935  progress  65 % (74 MB)
  111 09:58:58.768005  progress  70 % (80 MB)
  112 09:58:59.164700  progress  75 % (86 MB)
  113 09:58:59.542691  progress  80 % (92 MB)
  114 09:58:59.919327  progress  85 % (98 MB)
  115 09:59:00.312237  progress  90 % (103 MB)
  116 09:59:00.671299  progress  95 % (109 MB)
  117 09:59:01.061958  progress 100 % (115 MB)
  118 09:59:01.067827  115 MB downloaded in 7.20 s (16.01 MB/s)
  119 09:59:01.068120  end: 1.4.1 http-download (duration 00:00:07) [common]
  121 09:59:01.068454  end: 1.4 download-retry (duration 00:00:07) [common]
  122 09:59:01.068578  start: 1.5 download-retry (timeout 00:09:52) [common]
  123 09:59:01.068732  start: 1.5.1 http-download (timeout 00:09:52) [common]
  124 09:59:01.068953  downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
  125 09:59:01.069039  saving as /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/modules/modules.tar
  126 09:59:01.069110  total size: 8619356 (8 MB)
  127 09:59:01.069184  Using unxz to decompress xz
  128 09:59:01.073587  progress   0 % (0 MB)
  129 09:59:01.095376  progress   5 % (0 MB)
  130 09:59:01.123206  progress  10 % (0 MB)
  131 09:59:01.151234  progress  15 % (1 MB)
  132 09:59:01.179052  progress  20 % (1 MB)
  133 09:59:01.207231  progress  25 % (2 MB)
  134 09:59:01.234651  progress  30 % (2 MB)
  135 09:59:01.262310  progress  35 % (2 MB)
  136 09:59:01.289509  progress  40 % (3 MB)
  137 09:59:01.316863  progress  45 % (3 MB)
  138 09:59:01.343448  progress  50 % (4 MB)
  139 09:59:01.371096  progress  55 % (4 MB)
  140 09:59:01.398061  progress  60 % (4 MB)
  141 09:59:01.424310  progress  65 % (5 MB)
  142 09:59:01.455479  progress  70 % (5 MB)
  143 09:59:01.483298  progress  75 % (6 MB)
  144 09:59:01.509155  progress  80 % (6 MB)
  145 09:59:01.535263  progress  85 % (7 MB)
  146 09:59:01.561412  progress  90 % (7 MB)
  147 09:59:01.592791  progress  95 % (7 MB)
  148 09:59:01.626463  progress 100 % (8 MB)
  149 09:59:01.631627  8 MB downloaded in 0.56 s (14.61 MB/s)
  150 09:59:01.631904  end: 1.5.1 http-download (duration 00:00:01) [common]
  152 09:59:01.632200  end: 1.5 download-retry (duration 00:00:01) [common]
  153 09:59:01.632306  start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
  154 09:59:01.632411  start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
  155 09:59:05.476124  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch
  156 09:59:05.476345  end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
  157 09:59:05.476461  start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
  158 09:59:05.476648  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1
  159 09:59:05.476801  makedir: /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin
  160 09:59:05.476917  makedir: /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/tests
  161 09:59:05.477027  makedir: /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/results
  162 09:59:05.477139  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-add-keys
  163 09:59:05.477298  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-add-sources
  164 09:59:05.477442  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-background-process-start
  165 09:59:05.477599  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-background-process-stop
  166 09:59:05.477746  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-common-functions
  167 09:59:05.477888  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-echo-ipv4
  168 09:59:05.478027  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-install-packages
  169 09:59:05.478168  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-installed-packages
  170 09:59:05.478305  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-os-build
  171 09:59:05.478442  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-probe-channel
  172 09:59:05.478578  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-probe-ip
  173 09:59:05.478714  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-target-ip
  174 09:59:05.478848  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-target-mac
  175 09:59:05.478983  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-target-storage
  176 09:59:05.479123  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-case
  177 09:59:05.479260  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-event
  178 09:59:05.479398  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-feedback
  179 09:59:05.479545  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-raise
  180 09:59:05.479680  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-reference
  181 09:59:05.479817  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-runner
  182 09:59:05.479953  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-set
  183 09:59:05.480090  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-test-shell
  184 09:59:05.480226  Updating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-add-keys (debian)
  185 09:59:05.480389  Updating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-add-sources (debian)
  186 09:59:05.480541  Updating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-install-packages (debian)
  187 09:59:05.480690  Updating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-installed-packages (debian)
  188 09:59:05.480838  Updating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/bin/lava-os-build (debian)
  189 09:59:05.480969  Creating /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/environment
  190 09:59:05.481074  LAVA metadata
  191 09:59:05.481146  - LAVA_JOB_ID=14407632
  192 09:59:05.481213  - LAVA_DISPATCHER_IP=192.168.201.1
  193 09:59:05.481333  start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  194 09:59:05.481405  skipped lava-vland-overlay
  195 09:59:05.481486  end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
  196 09:59:05.481572  start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  197 09:59:05.481638  skipped lava-multinode-overlay
  198 09:59:05.481715  end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  199 09:59:05.481800  start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
  200 09:59:05.481879  Loading test definitions
  201 09:59:05.481975  start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  202 09:59:05.482050  Using /lava-14407632 at stage 0
  203 09:59:05.482363  uuid=14407632_1.6.2.3.1 testdef=None
  204 09:59:05.482461  end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
  205 09:59:05.482553  start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
  206 09:59:05.483059  end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
  208 09:59:05.483305  start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  209 09:59:05.484013  end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
  211 09:59:05.484274  start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  212 09:59:05.484869  runner path: /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/0/tests/0_timesync-off test_uuid 14407632_1.6.2.3.1
  213 09:59:05.485046  end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  215 09:59:05.485300  start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
  216 09:59:05.485379  Using /lava-14407632 at stage 0
  217 09:59:05.485486  Fetching tests from https://github.com/kernelci/test-definitions.git
  218 09:59:05.485581  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/0/tests/1_kselftest-dt'
  219 09:59:07.579471  Running '/usr/bin/git checkout kernelci.org
  220 09:59:07.742577  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
  221 09:59:07.743526  uuid=14407632_1.6.2.3.5 testdef=None
  222 09:59:07.743713  end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
  224 09:59:07.743997  start: 1.6.2.3.6 test-overlay (timeout 00:09:46) [common]
  225 09:59:07.744842  end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
  227 09:59:07.745103  start: 1.6.2.3.7 test-install-overlay (timeout 00:09:46) [common]
  228 09:59:07.746192  end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
  230 09:59:07.746461  start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
  231 09:59:07.747529  runner path: /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/0/tests/1_kselftest-dt test_uuid 14407632_1.6.2.3.5
  232 09:59:07.747630  BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
  233 09:59:07.747733  BRANCH='cip'
  234 09:59:07.747812  SKIPFILE='/dev/null'
  235 09:59:07.747882  SKIP_INSTALL='True'
  236 09:59:07.747946  TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
  237 09:59:07.748011  TST_CASENAME=''
  238 09:59:07.748074  TST_CMDFILES='dt'
  239 09:59:07.748233  end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  241 09:59:07.748468  Creating lava-test-runner.conf files
  242 09:59:07.748540  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407632/lava-overlay-kx8eodg1/lava-14407632/0 for stage 0
  243 09:59:07.748644  - 0_timesync-off
  244 09:59:07.748721  - 1_kselftest-dt
  245 09:59:07.748829  end: 1.6.2.3 test-definition (duration 00:00:02) [common]
  246 09:59:07.748926  start: 1.6.2.4 compress-overlay (timeout 00:09:46) [common]
  247 09:59:16.162898  end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
  248 09:59:16.163071  start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
  249 09:59:16.163179  end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  250 09:59:16.163287  end: 1.6.2 lava-overlay (duration 00:00:11) [common]
  251 09:59:16.163391  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
  252 09:59:16.345401  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  253 09:59:16.345833  start: 1.6.4 extract-modules (timeout 00:09:37) [common]
  254 09:59:16.345964  extracting modules file /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch
  255 09:59:16.586933  extracting modules file /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407632/extract-overlay-ramdisk-lwnd30ne/ramdisk
  256 09:59:16.839709  end: 1.6.4 extract-modules (duration 00:00:00) [common]
  257 09:59:16.839891  start: 1.6.5 apply-overlay-tftp (timeout 00:09:37) [common]
  258 09:59:16.840000  [common] Applying overlay to NFS
  259 09:59:16.840077  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407632/compress-overlay-umd1eru9/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch
  260 09:59:17.860362  end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
  261 09:59:17.860543  start: 1.6.6 configure-preseed-file (timeout 00:09:36) [common]
  262 09:59:17.860653  end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
  263 09:59:17.860753  start: 1.6.7 compress-ramdisk (timeout 00:09:36) [common]
  264 09:59:17.860844  Building ramdisk /var/lib/lava/dispatcher/tmp/14407632/extract-overlay-ramdisk-lwnd30ne/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407632/extract-overlay-ramdisk-lwnd30ne/ramdisk
  265 09:59:18.237544  >> 130466 blocks

  266 09:59:20.497282  rename /var/lib/lava/dispatcher/tmp/14407632/extract-overlay-ramdisk-lwnd30ne/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/ramdisk/ramdisk.cpio.gz
  267 09:59:20.497777  end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
  268 09:59:20.497918  start: 1.6.8 prepare-kernel (timeout 00:09:33) [common]
  269 09:59:20.498037  start: 1.6.8.1 prepare-fit (timeout 00:09:33) [common]
  270 09:59:20.498157  Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/kernel/Image']
  271 09:59:34.621016  Returned 0 in 14 seconds
  272 09:59:34.722157  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/kernel/image.itb
  273 09:59:35.165812  output: FIT description: Kernel Image image with one or more FDT blobs
  274 09:59:35.166234  output: Created:         Tue Jun 18 10:59:35 2024
  275 09:59:35.166319  output:  Image 0 (kernel-1)
  276 09:59:35.166392  output:   Description:  
  277 09:59:35.166464  output:   Created:      Tue Jun 18 10:59:35 2024
  278 09:59:35.166532  output:   Type:         Kernel Image
  279 09:59:35.166601  output:   Compression:  lzma compressed
  280 09:59:35.166667  output:   Data Size:    13126726 Bytes = 12819.07 KiB = 12.52 MiB
  281 09:59:35.166736  output:   Architecture: AArch64
  282 09:59:35.166803  output:   OS:           Linux
  283 09:59:35.166867  output:   Load Address: 0x00000000
  284 09:59:35.166932  output:   Entry Point:  0x00000000
  285 09:59:35.166993  output:   Hash algo:    crc32
  286 09:59:35.167058  output:   Hash value:   4137a6e7
  287 09:59:35.167119  output:  Image 1 (fdt-1)
  288 09:59:35.167182  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  289 09:59:35.167248  output:   Created:      Tue Jun 18 10:59:35 2024
  290 09:59:35.167308  output:   Type:         Flat Device Tree
  291 09:59:35.167367  output:   Compression:  uncompressed
  292 09:59:35.167436  output:   Data Size:    57695 Bytes = 56.34 KiB = 0.06 MiB
  293 09:59:35.167498  output:   Architecture: AArch64
  294 09:59:35.167558  output:   Hash algo:    crc32
  295 09:59:35.167618  output:   Hash value:   a9713552
  296 09:59:35.167678  output:  Image 2 (ramdisk-1)
  297 09:59:35.167737  output:   Description:  unavailable
  298 09:59:35.167795  output:   Created:      Tue Jun 18 10:59:35 2024
  299 09:59:35.167854  output:   Type:         RAMDisk Image
  300 09:59:35.167913  output:   Compression:  Unknown Compression
  301 09:59:35.167973  output:   Data Size:    18745577 Bytes = 18306.23 KiB = 17.88 MiB
  302 09:59:35.168033  output:   Architecture: AArch64
  303 09:59:35.168092  output:   OS:           Linux
  304 09:59:35.168151  output:   Load Address: unavailable
  305 09:59:35.168210  output:   Entry Point:  unavailable
  306 09:59:35.168269  output:   Hash algo:    crc32
  307 09:59:35.168327  output:   Hash value:   f795a927
  308 09:59:35.168386  output:  Default Configuration: 'conf-1'
  309 09:59:35.168444  output:  Configuration 0 (conf-1)
  310 09:59:35.168503  output:   Description:  mt8183-kukui-jacuzzi-juniper-sku16
  311 09:59:35.168562  output:   Kernel:       kernel-1
  312 09:59:35.168621  output:   Init Ramdisk: ramdisk-1
  313 09:59:35.168679  output:   FDT:          fdt-1
  314 09:59:35.168738  output:   Loadables:    kernel-1
  315 09:59:35.168797  output: 
  316 09:59:35.169033  end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
  317 09:59:35.169178  end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
  318 09:59:35.169303  end: 1.6 prepare-tftp-overlay (duration 00:00:34) [common]
  319 09:59:35.169406  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
  320 09:59:35.169493  No LXC device requested
  321 09:59:35.169587  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  322 09:59:35.169688  start: 1.8 deploy-device-env (timeout 00:09:18) [common]
  323 09:59:35.169774  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  324 09:59:35.169849  Checking files for TFTP limit of 4294967296 bytes.
  325 09:59:35.170407  end: 1 tftp-deploy (duration 00:00:42) [common]
  326 09:59:35.170528  start: 2 depthcharge-action (timeout 00:05:00) [common]
  327 09:59:35.170627  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  328 09:59:35.170773  substitutions:
  329 09:59:35.170853  - {DTB}: 14407632/tftp-deploy-39smngtf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
  330 09:59:35.170925  - {INITRD}: 14407632/tftp-deploy-39smngtf/ramdisk/ramdisk.cpio.gz
  331 09:59:35.170993  - {KERNEL}: 14407632/tftp-deploy-39smngtf/kernel/Image
  332 09:59:35.171058  - {LAVA_MAC}: None
  333 09:59:35.171122  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch
  334 09:59:35.171184  - {NFS_SERVER_IP}: 192.168.201.1
  335 09:59:35.171245  - {PRESEED_CONFIG}: None
  336 09:59:35.171306  - {PRESEED_LOCAL}: None
  337 09:59:35.171367  - {RAMDISK}: 14407632/tftp-deploy-39smngtf/ramdisk/ramdisk.cpio.gz
  338 09:59:35.171439  - {ROOT_PART}: None
  339 09:59:35.171502  - {ROOT}: None
  340 09:59:35.171563  - {SERVER_IP}: 192.168.201.1
  341 09:59:35.171623  - {TEE}: None
  342 09:59:35.171683  Parsed boot commands:
  343 09:59:35.171742  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  344 09:59:35.171939  Parsed boot commands: tftpboot 192.168.201.1 14407632/tftp-deploy-39smngtf/kernel/image.itb 14407632/tftp-deploy-39smngtf/kernel/cmdline 
  345 09:59:35.172037  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  346 09:59:35.172132  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  347 09:59:35.172233  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  348 09:59:35.172324  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  349 09:59:35.172401  Not connected, no need to disconnect.
  350 09:59:35.172482  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  351 09:59:35.172572  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  352 09:59:35.172649  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
  353 09:59:35.176738  Setting prompt string to ['lava-test: # ']
  354 09:59:35.177137  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  355 09:59:35.177258  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  356 09:59:35.177365  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  357 09:59:35.177472  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  358 09:59:35.177680  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
  359 09:59:59.117440  Returned 0 in 23 seconds
  360 09:59:59.218646  end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
  362 09:59:59.220258  end: 2.2.2 reset-device (duration 00:00:24) [common]
  363 09:59:59.220825  start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
  364 09:59:59.221341  Setting prompt string to 'Starting depthcharge on Juniper...'
  365 09:59:59.221725  Changing prompt to 'Starting depthcharge on Juniper...'
  366 09:59:59.222118  depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
  367 09:59:59.224877  [Enter `^Ec?' for help]

  368 09:59:59.225639  [DL] 00000000 00000000 010701

  369 09:59:59.226357  

  370 09:59:59.226893  

  371 09:59:59.227465  F0: 102B 0000

  372 09:59:59.227965  

  373 09:59:59.228432  F3: 1006 0033 [0200]

  374 09:59:59.228890  

  375 09:59:59.229337  F3: 4001 00E0 [0200]

  376 09:59:59.229776  

  377 09:59:59.230237  F3: 0000 0000

  378 09:59:59.230681  

  379 09:59:59.231020  V0: 0000 0000 [0001]

  380 09:59:59.231342  

  381 09:59:59.231691  00: 1027 0002

  382 09:59:59.232003  

  383 09:59:59.232288  01: 0000 0000

  384 09:59:59.232578  

  385 09:59:59.232857  BP: 0C00 0251 [0000]

  386 09:59:59.233194  

  387 09:59:59.233478  G0: 1182 0000

  388 09:59:59.233757  

  389 09:59:59.234049  EC: 0004 0000 [0001]

  390 09:59:59.234326  

  391 09:59:59.234632  S7: 0000 0000 [0000]

  392 09:59:59.234916  

  393 09:59:59.235195  CC: 0000 0000 [0001]

  394 09:59:59.235505  

  395 09:59:59.235788  T0: 0000 00DB [000F]

  396 09:59:59.236071  

  397 09:59:59.236351  Jump to BL

  398 09:59:59.236630  

  399 09:59:59.236908  


  400 09:59:59.237184  

  401 09:59:59.237462  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...

  402 09:59:59.237756  ARM64: Exception handlers installed.

  403 09:59:59.238035  ARM64: Testing exception

  404 09:59:59.238427  ARM64: Done test exception

  405 09:59:59.238869  WDT: Last reset was cold boot

  406 09:59:59.239209  SPI0(PAD0) initialized at 992727 Hz

  407 09:59:59.239538  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

  408 09:59:59.239833  Manufacturer: ef

  409 09:59:59.240115  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  410 09:59:59.240397  Probing TPM: . done!

  411 09:59:59.240676  TPM ready after 0 ms

  412 09:59:59.240959  Connected to device vid:did:rid of 1ae0:0028:00

  413 09:59:59.241263  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c

  414 09:59:59.241555  Initialized TPM device CR50 revision 0

  415 09:59:59.241839  tlcl_send_startup: Startup return code is 0

  416 09:59:59.242121  TPM: setup succeeded

  417 09:59:59.242403  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  418 09:59:59.242686  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  419 09:59:59.242969  in-header: 03 19 00 00 08 00 00 00 

  420 09:59:59.243249  in-data: a2 e0 47 00 13 00 00 00 

  421 09:59:59.243568  Chrome EC: UHEPI supported

  422 09:59:59.243855  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  423 09:59:59.244137  in-header: 03 a1 00 00 08 00 00 00 

  424 09:59:59.244413  in-data: 84 60 60 10 00 00 00 00 

  425 09:59:59.244701  Phase 1

  426 09:59:59.244994  FMAP: area GBB found @ 3f5000 (12032 bytes)

  427 09:59:59.245276  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  428 09:59:59.245555  VB2:vb2_check_recovery() Recovery was requested manually

  429 09:59:59.245834  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0

  430 09:59:59.246113  Recovery requested (1009000e)

  431 09:59:59.246392  tlcl_extend: response is 0

  432 09:59:59.246673  tlcl_extend: response is 0

  433 09:59:59.247200  

  434 09:59:59.247632  

  435 09:59:59.247924  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...

  436 09:59:59.248236  ARM64: Exception handlers installed.

  437 09:59:59.248528  ARM64: Testing exception

  438 09:59:59.248810  ARM64: Done test exception

  439 09:59:59.249123  [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2014

  440 09:59:59.249418  [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2

  441 09:59:59.249725  [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a

  442 09:59:59.250054  [RTC]rtc_get_frequency_meter,134: input=0xf, output=123

  443 09:59:59.250339  [RTC]rtc_get_frequency_meter,134: input=0x17, output=0

  444 09:59:59.250620  [RTC]rtc_get_frequency_meter,134: input=0x1b, output=0

  445 09:59:59.250901  [RTC]rtc_get_frequency_meter,134: input=0x1d, output=0

  446 09:59:59.251182  [RTC]rtc_get_frequency_meter,134: input=0x1e, output=0

  447 09:59:59.251515  [RTC]rtc_get_frequency_meter,134: input=0x1e, output=0

  448 09:59:59.251807  [RTC]rtc_get_frequency_meter,134: input=0x1f, output=0

  449 09:59:59.252068  [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc27f

  450 09:59:59.252268  [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482

  451 09:59:59.252470  [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1

  452 09:59:59.252670  [RTC]rtc_bbpu_power_on,376: done BBPU=0x9

  453 09:59:59.252898  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  454 09:59:59.253110  in-header: 03 19 00 00 08 00 00 00 

  455 09:59:59.253312  in-data: a2 e0 47 00 13 00 00 00 

  456 09:59:59.253514  Chrome EC: UHEPI supported

  457 09:59:59.253714  out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 

  458 09:59:59.253916  in-header: 03 a1 00 00 08 00 00 00 

  459 09:59:59.254117  in-data: 84 60 60 10 00 00 00 00 

  460 09:59:59.254315  Skip loading cached calibration data

  461 09:59:59.254512  out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 

  462 09:59:59.254728  in-header: 03 a1 00 00 08 00 00 00 

  463 09:59:59.254933  in-data: 84 60 60 10 00 00 00 00 

  464 09:59:59.255132  out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 

  465 09:59:59.255332  in-header: 03 a1 00 00 08 00 00 00 

  466 09:59:59.255557  in-data: 84 60 60 10 00 00 00 00 

  467 09:59:59.255761  ADC[3]: Raw value=216216 ID=1

  468 09:59:59.255962  Manufacturer: ef

  469 09:59:59.256161  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

  470 09:59:59.256363  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  471 09:59:59.256565  CBFS @ 21000 size 3d4000

  472 09:59:59.256765  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  473 09:59:59.256981  CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'

  474 09:59:59.257151  CBFS: Found @ offset 3c700 size 44

  475 09:59:59.257365  DRAM-K: Full Calibration

  476 09:59:59.257585  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  477 09:59:59.257745  CBFS @ 21000 size 3d4000

  478 09:59:59.257898  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

  479 09:59:59.258050  CBFS: Locating 'fallback/dram'

  480 09:59:59.258217  CBFS: Found @ offset 24b00 size 12268

  481 09:59:59.258370  read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps

  482 09:59:59.258523  ddr_geometry: 1, config: 0x0

  483 09:59:59.258675  header.status = 0x0

  484 09:59:59.258826  header.magic = 0x44524d4b (expected: 0x44524d4b)

  485 09:59:59.258977  header.version = 0x5 (expected: 0x5)

  486 09:59:59.259443  header.size = 0x8f0 (expected: 0x8f0)

  487 09:59:59.259676  header.config = 0x0

  488 09:59:59.259839  header.flags = 0x0

  489 09:59:59.259995  header.checksum = 0x0

  490 09:59:59.260148  dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5

  491 09:59:59.260304  Set DRAM voltage: vdram1 = 1125000, vddq = 600000

  492 09:59:59.260456  Get DRAM voltage to vdram1 = 1125000, vddq = 600000

  493 09:59:59.260608  ddr_geometry:1

  494 09:59:59.260757  [EMI] new MDL number = 1

  495 09:59:59.260910  dram_cbt_mode_extern: 0

  496 09:59:59.261062  dram_cbt_mode [RK0]: 0, [RK1]: 0

  497 09:59:59.261216  Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]

  498 09:59:59.261368  

  499 09:59:59.261520  

  500 09:59:59.261669  [Bianco] ETT version 0.0.0.1

  501 09:59:59.261819   dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6

  502 09:59:59.261970  

  503 09:59:59.262109  vSetVcoreByFreq with vcore:762500, freq=1600

  504 09:59:59.262240  

  505 09:59:59.262360  [DramcInit]

  506 09:59:59.262481  AutoRefreshCKEOff AutoREF OFF

  507 09:59:59.262603  DDRPhyPLLSetting-CKEOFF

  508 09:59:59.262724  DDRPhyPLLSetting-CKEON

  509 09:59:59.262844  

  510 09:59:59.262965  Enable WDQS

  511 09:59:59.263086  [ModeRegInit_LP4] CH0 RK0

  512 09:59:59.263206  Write Rank0 MR13 =0x18

  513 09:59:59.263327  Write Rank0 MR12 =0x5d

  514 09:59:59.263464  Write Rank0 MR1 =0x56

  515 09:59:59.263588  Write Rank0 MR2 =0x1a

  516 09:59:59.263708  Write Rank0 MR11 =0x0

  517 09:59:59.263828  Write Rank0 MR22 =0x38

  518 09:59:59.263947  Write Rank0 MR14 =0x5d

  519 09:59:59.264066  Write Rank0 MR3 =0x30

  520 09:59:59.264186  Write Rank0 MR13 =0x58

  521 09:59:59.264305  Write Rank0 MR12 =0x5d

  522 09:59:59.264424  Write Rank0 MR1 =0x56

  523 09:59:59.264544  Write Rank0 MR2 =0x2d

  524 09:59:59.264663  Write Rank0 MR11 =0x23

  525 09:59:59.264782  Write Rank0 MR22 =0x34

  526 09:59:59.264903  Write Rank0 MR14 =0x10

  527 09:59:59.265022  Write Rank0 MR3 =0x30

  528 09:59:59.265141  Write Rank0 MR13 =0xd8

  529 09:59:59.265261  [ModeRegInit_LP4] CH0 RK1

  530 09:59:59.265380  Write Rank1 MR13 =0x18

  531 09:59:59.265499  Write Rank1 MR12 =0x5d

  532 09:59:59.265618  Write Rank1 MR1 =0x56

  533 09:59:59.265738  Write Rank1 MR2 =0x1a

  534 09:59:59.265857  Write Rank1 MR11 =0x0

  535 09:59:59.265976  Write Rank1 MR22 =0x38

  536 09:59:59.266096  Write Rank1 MR14 =0x5d

  537 09:59:59.266216  Write Rank1 MR3 =0x30

  538 09:59:59.266336  Write Rank1 MR13 =0x58

  539 09:59:59.266456  Write Rank1 MR12 =0x5d

  540 09:59:59.266575  Write Rank1 MR1 =0x56

  541 09:59:59.266696  Write Rank1 MR2 =0x2d

  542 09:59:59.266816  Write Rank1 MR11 =0x23

  543 09:59:59.266934  Write Rank1 MR22 =0x34

  544 09:59:59.267057  Write Rank1 MR14 =0x10

  545 09:59:59.267156  Write Rank1 MR3 =0x30

  546 09:59:59.267255  Write Rank1 MR13 =0xd8

  547 09:59:59.267355  [ModeRegInit_LP4] CH1 RK0

  548 09:59:59.267473  Write Rank0 MR13 =0x18

  549 09:59:59.267575  Write Rank0 MR12 =0x5d

  550 09:59:59.267674  Write Rank0 MR1 =0x56

  551 09:59:59.267774  Write Rank0 MR2 =0x1a

  552 09:59:59.267874  Write Rank0 MR11 =0x0

  553 09:59:59.267974  Write Rank0 MR22 =0x38

  554 09:59:59.268073  Write Rank0 MR14 =0x5d

  555 09:59:59.268173  Write Rank0 MR3 =0x30

  556 09:59:59.268273  Write Rank0 MR13 =0x58

  557 09:59:59.268374  Write Rank0 MR12 =0x5d

  558 09:59:59.268473  Write Rank0 MR1 =0x56

  559 09:59:59.268573  Write Rank0 MR2 =0x2d

  560 09:59:59.268672  Write Rank0 MR11 =0x23

  561 09:59:59.268772  Write Rank0 MR22 =0x34

  562 09:59:59.268871  Write Rank0 MR14 =0x10

  563 09:59:59.268971  Write Rank0 MR3 =0x30

  564 09:59:59.269070  Write Rank0 MR13 =0xd8

  565 09:59:59.269169  [ModeRegInit_LP4] CH1 RK1

  566 09:59:59.269269  Write Rank1 MR13 =0x18

  567 09:59:59.269368  Write Rank1 MR12 =0x5d

  568 09:59:59.269467  Write Rank1 MR1 =0x56

  569 09:59:59.269566  Write Rank1 MR2 =0x1a

  570 09:59:59.269665  Write Rank1 MR11 =0x0

  571 09:59:59.269764  Write Rank1 MR22 =0x38

  572 09:59:59.269864  Write Rank1 MR14 =0x5d

  573 09:59:59.269963  Write Rank1 MR3 =0x30

  574 09:59:59.270063  Write Rank1 MR13 =0x58

  575 09:59:59.270163  Write Rank1 MR12 =0x5d

  576 09:59:59.270262  Write Rank1 MR1 =0x56

  577 09:59:59.270361  Write Rank1 MR2 =0x2d

  578 09:59:59.270460  Write Rank1 MR11 =0x23

  579 09:59:59.270560  Write Rank1 MR22 =0x34

  580 09:59:59.270660  Write Rank1 MR14 =0x10

  581 09:59:59.270759  Write Rank1 MR3 =0x30

  582 09:59:59.270858  Write Rank1 MR13 =0xd8

  583 09:59:59.270958  match AC timing 3

  584 09:59:59.271057  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  585 09:59:59.271159  [MiockJmeterHQA]

  586 09:59:59.271261  vSetVcoreByFreq with vcore:762500, freq=1600

  587 09:59:59.271361  

  588 09:59:59.271477  	MIOCK jitter meter	ch=0

  589 09:59:59.271579  

  590 09:59:59.271678  1T = (102-17) = 85 dly cells

  591 09:59:59.271781  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps

  592 09:59:59.271882  vSetVcoreByFreq with vcore:725000, freq=1200

  593 09:59:59.271991  

  594 09:59:59.272076  	MIOCK jitter meter	ch=0

  595 09:59:59.272162  

  596 09:59:59.272246  1T = (97-16) = 81 dly cells

  597 09:59:59.272335  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps

  598 09:59:59.272422  vSetVcoreByFreq with vcore:725000, freq=800

  599 09:59:59.272507  

  600 09:59:59.272592  	MIOCK jitter meter	ch=0

  601 09:59:59.272678  

  602 09:59:59.272763  1T = (97-16) = 81 dly cells

  603 09:59:59.272850  Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps

  604 09:59:59.272937  vSetVcoreByFreq with vcore:762500, freq=1600

  605 09:59:59.273022  vSetVcoreByFreq with vcore:762500, freq=1600

  606 09:59:59.273119  

  607 09:59:59.273208  	K DRVP

  608 09:59:59.273295  1. OCD DRVP=0 CALOUT=0

  609 09:59:59.273383  1. OCD DRVP=1 CALOUT=0

  610 09:59:59.273471  1. OCD DRVP=2 CALOUT=0

  611 09:59:59.273559  1. OCD DRVP=3 CALOUT=0

  612 09:59:59.273647  1. OCD DRVP=4 CALOUT=0

  613 09:59:59.273734  1. OCD DRVP=5 CALOUT=0

  614 09:59:59.273821  1. OCD DRVP=6 CALOUT=0

  615 09:59:59.273908  1. OCD DRVP=7 CALOUT=0

  616 09:59:59.273996  1. OCD DRVP=8 CALOUT=0

  617 09:59:59.274084  1. OCD DRVP=9 CALOUT=1

  618 09:59:59.274170  

  619 09:59:59.274256  1. OCD DRVP calibration OK! DRVP=9

  620 09:59:59.274345  

  621 09:59:59.274431  

  622 09:59:59.274516  

  623 09:59:59.274601  	K ODTN

  624 09:59:59.274686  3. OCD ODTN=0 ,CALOUT=1

  625 09:59:59.274778  3. OCD ODTN=1 ,CALOUT=1

  626 09:59:59.274866  3. OCD ODTN=2 ,CALOUT=1

  627 09:59:59.274955  3. OCD ODTN=3 ,CALOUT=1

  628 09:59:59.275043  3. OCD ODTN=4 ,CALOUT=1

  629 09:59:59.275130  3. OCD ODTN=5 ,CALOUT=1

  630 09:59:59.275218  3. OCD ODTN=6 ,CALOUT=1

  631 09:59:59.275305  3. OCD ODTN=7 ,CALOUT=0

  632 09:59:59.275393  

  633 09:59:59.275492  3. OCD ODTN calibration OK! ODTN=7

  634 09:59:59.275581  

  635 09:59:59.275667  [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7

  636 09:59:59.275752  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15

  637 09:59:59.275840  term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)

  638 09:59:59.275926  

  639 09:59:59.276011  	K DRVP

  640 09:59:59.276096  1. OCD DRVP=0 CALOUT=0

  641 09:59:59.276183  1. OCD DRVP=1 CALOUT=0

  642 09:59:59.276270  1. OCD DRVP=2 CALOUT=0

  643 09:59:59.276357  1. OCD DRVP=3 CALOUT=0

  644 09:59:59.276444  1. OCD DRVP=4 CALOUT=0

  645 09:59:59.276532  1. OCD DRVP=5 CALOUT=0

  646 09:59:59.276620  1. OCD DRVP=6 CALOUT=0

  647 09:59:59.276707  1. OCD DRVP=7 CALOUT=0

  648 09:59:59.276794  1. OCD DRVP=8 CALOUT=0

  649 09:59:59.276880  1. OCD DRVP=9 CALOUT=0

  650 09:59:59.277169  1. OCD DRVP=10 CALOUT=0

  651 09:59:59.277254  1. OCD DRVP=11 CALOUT=1

  652 09:59:59.277332  

  653 09:59:59.277407  1. OCD DRVP calibration OK! DRVP=11

  654 09:59:59.277483  

  655 09:59:59.277558  

  656 09:59:59.277633  

  657 09:59:59.277708  	K ODTN

  658 09:59:59.277783  3. OCD ODTN=0 ,CALOUT=1

  659 09:59:59.277860  3. OCD ODTN=1 ,CALOUT=1

  660 09:59:59.277937  3. OCD ODTN=2 ,CALOUT=1

  661 09:59:59.278013  3. OCD ODTN=3 ,CALOUT=1

  662 09:59:59.278090  3. OCD ODTN=4 ,CALOUT=1

  663 09:59:59.278166  3. OCD ODTN=5 ,CALOUT=1

  664 09:59:59.278242  3. OCD ODTN=6 ,CALOUT=1

  665 09:59:59.278318  3. OCD ODTN=7 ,CALOUT=1

  666 09:59:59.278395  3. OCD ODTN=8 ,CALOUT=1

  667 09:59:59.278471  3. OCD ODTN=9 ,CALOUT=1

  668 09:59:59.278547  3. OCD ODTN=10 ,CALOUT=1

  669 09:59:59.278624  3. OCD ODTN=11 ,CALOUT=1

  670 09:59:59.278700  3. OCD ODTN=12 ,CALOUT=1

  671 09:59:59.278777  3. OCD ODTN=13 ,CALOUT=1

  672 09:59:59.278854  3. OCD ODTN=14 ,CALOUT=1

  673 09:59:59.278930  3. OCD ODTN=15 ,CALOUT=0

  674 09:59:59.279006  

  675 09:59:59.279080  3. OCD ODTN calibration OK! ODTN=15

  676 09:59:59.279158  

  677 09:59:59.279233  [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15

  678 09:59:59.279309  term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15

  679 09:59:59.279385  term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)

  680 09:59:59.279471  

  681 09:59:59.279545  [DramcInit]

  682 09:59:59.279620  AutoRefreshCKEOff AutoREF OFF

  683 09:59:59.279695  DDRPhyPLLSetting-CKEOFF

  684 09:59:59.279770  DDRPhyPLLSetting-CKEON

  685 09:59:59.279845  

  686 09:59:59.279919  Enable WDQS

  687 09:59:59.279993  ==

  688 09:59:59.280069  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  689 09:59:59.280144  fsp= 1, odt_onoff= 1, Byte mode= 0

  690 09:59:59.280219  ==

  691 09:59:59.280294  [Duty_Offset_Calibration]

  692 09:59:59.280369  

  693 09:59:59.280443  ===========================

  694 09:59:59.280519  	B0:1	B1:1	CA:1

  695 09:59:59.280594  ==

  696 09:59:59.280669  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

  697 09:59:59.280745  fsp= 1, odt_onoff= 1, Byte mode= 0

  698 09:59:59.280820  ==

  699 09:59:59.280895  [Duty_Offset_Calibration]

  700 09:59:59.280970  

  701 09:59:59.281044  ===========================

  702 09:59:59.281120  	B0:1	B1:0	CA:2

  703 09:59:59.281195  [ModeRegInit_LP4] CH0 RK0

  704 09:59:59.281269  Write Rank0 MR13 =0x18

  705 09:59:59.281348  Write Rank0 MR12 =0x5d

  706 09:59:59.281423  Write Rank0 MR1 =0x56

  707 09:59:59.281499  Write Rank0 MR2 =0x1a

  708 09:59:59.281574  Write Rank0 MR11 =0x0

  709 09:59:59.281649  Write Rank0 MR22 =0x38

  710 09:59:59.281723  Write Rank0 MR14 =0x5d

  711 09:59:59.281798  Write Rank0 MR3 =0x30

  712 09:59:59.281873  Write Rank0 MR13 =0x58

  713 09:59:59.281948  Write Rank0 MR12 =0x5d

  714 09:59:59.282028  Write Rank0 MR1 =0x56

  715 09:59:59.282095  Write Rank0 MR2 =0x2d

  716 09:59:59.282162  Write Rank0 MR11 =0x23

  717 09:59:59.282229  Write Rank0 MR22 =0x34

  718 09:59:59.282294  Write Rank0 MR14 =0x10

  719 09:59:59.282361  Write Rank0 MR3 =0x30

  720 09:59:59.282427  Write Rank0 MR13 =0xd8

  721 09:59:59.282494  [ModeRegInit_LP4] CH0 RK1

  722 09:59:59.282560  Write Rank1 MR13 =0x18

  723 09:59:59.282626  Write Rank1 MR12 =0x5d

  724 09:59:59.282692  Write Rank1 MR1 =0x56

  725 09:59:59.282758  Write Rank1 MR2 =0x1a

  726 09:59:59.282824  Write Rank1 MR11 =0x0

  727 09:59:59.282890  Write Rank1 MR22 =0x38

  728 09:59:59.282956  Write Rank1 MR14 =0x5d

  729 09:59:59.283022  Write Rank1 MR3 =0x30

  730 09:59:59.283088  Write Rank1 MR13 =0x58

  731 09:59:59.283154  Write Rank1 MR12 =0x5d

  732 09:59:59.283221  Write Rank1 MR1 =0x56

  733 09:59:59.283287  Write Rank1 MR2 =0x2d

  734 09:59:59.283354  Write Rank1 MR11 =0x23

  735 09:59:59.283477  Write Rank1 MR22 =0x34

  736 09:59:59.283634  Write Rank1 MR14 =0x10

  737 09:59:59.283704  Write Rank1 MR3 =0x30

  738 09:59:59.283771  Write Rank1 MR13 =0xd8

  739 09:59:59.283838  [ModeRegInit_LP4] CH1 RK0

  740 09:59:59.283905  Write Rank0 MR13 =0x18

  741 09:59:59.283971  Write Rank0 MR12 =0x5d

  742 09:59:59.284037  Write Rank0 MR1 =0x56

  743 09:59:59.284103  Write Rank0 MR2 =0x1a

  744 09:59:59.284169  Write Rank0 MR11 =0x0

  745 09:59:59.284235  Write Rank0 MR22 =0x38

  746 09:59:59.284302  Write Rank0 MR14 =0x5d

  747 09:59:59.284369  Write Rank0 MR3 =0x30

  748 09:59:59.284435  Write Rank0 MR13 =0x58

  749 09:59:59.284502  Write Rank0 MR12 =0x5d

  750 09:59:59.284568  Write Rank0 MR1 =0x56

  751 09:59:59.284634  Write Rank0 MR2 =0x2d

  752 09:59:59.284702  Write Rank0 MR11 =0x23

  753 09:59:59.284768  Write Rank0 MR22 =0x34

  754 09:59:59.284834  Write Rank0 MR14 =0x10

  755 09:59:59.284901  Write Rank0 MR3 =0x30

  756 09:59:59.284967  Write Rank0 MR13 =0xd8

  757 09:59:59.285034  [ModeRegInit_LP4] CH1 RK1

  758 09:59:59.285101  Write Rank1 MR13 =0x18

  759 09:59:59.285167  Write Rank1 MR12 =0x5d

  760 09:59:59.285234  Write Rank1 MR1 =0x56

  761 09:59:59.285301  Write Rank1 MR2 =0x1a

  762 09:59:59.285367  Write Rank1 MR11 =0x0

  763 09:59:59.285434  Write Rank1 MR22 =0x38

  764 09:59:59.285500  Write Rank1 MR14 =0x5d

  765 09:59:59.285567  Write Rank1 MR3 =0x30

  766 09:59:59.285633  Write Rank1 MR13 =0x58

  767 09:59:59.285699  Write Rank1 MR12 =0x5d

  768 09:59:59.285766  Write Rank1 MR1 =0x56

  769 09:59:59.285832  Write Rank1 MR2 =0x2d

  770 09:59:59.285899  Write Rank1 MR11 =0x23

  771 09:59:59.285965  Write Rank1 MR22 =0x34

  772 09:59:59.286031  Write Rank1 MR14 =0x10

  773 09:59:59.286097  Write Rank1 MR3 =0x30

  774 09:59:59.286164  Write Rank1 MR13 =0xd8

  775 09:59:59.286230  match AC timing 3

  776 09:59:59.286297  [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0

  777 09:59:59.286365  DramC Write-DBI off

  778 09:59:59.286432  DramC Read-DBI off

  779 09:59:59.286499  Write Rank0 MR13 =0x59

  780 09:59:59.286565  ==

  781 09:59:59.286633  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  782 09:59:59.286700  fsp= 1, odt_onoff= 1, Byte mode= 0

  783 09:59:59.286767  ==

  784 09:59:59.286834  === u2Vref_new: 0x56 --> 0x2d

  785 09:59:59.286901  === u2Vref_new: 0x58 --> 0x38

  786 09:59:59.286968  === u2Vref_new: 0x5a --> 0x39

  787 09:59:59.287042  === u2Vref_new: 0x5c --> 0x3c

  788 09:59:59.287102  === u2Vref_new: 0x5e --> 0x3d

  789 09:59:59.287162  === u2Vref_new: 0x60 --> 0xa0

  790 09:59:59.287222  [CA 0] Center 34 (6~63) winsize 58

  791 09:59:59.287282  [CA 1] Center 36 (9~63) winsize 55

  792 09:59:59.287342  [CA 2] Center 29 (0~58) winsize 59

  793 09:59:59.287408  [CA 3] Center 24 (-3~52) winsize 56

  794 09:59:59.287470  [CA 4] Center 25 (-3~53) winsize 57

  795 09:59:59.287530  [CA 5] Center 29 (0~59) winsize 60

  796 09:59:59.287591  

  797 09:59:59.287651  [CATrainingPosCal] consider 1 rank data

  798 09:59:59.287711  u2DelayCellTimex100 = 735/100 ps

  799 09:59:59.287771  CA0 delay=34 (6~63),Diff = 10 PI (13 cell)

  800 09:59:59.287831  CA1 delay=36 (9~63),Diff = 12 PI (15 cell)

  801 09:59:59.287891  CA2 delay=29 (0~58),Diff = 5 PI (6 cell)

  802 09:59:59.287951  CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)

  803 09:59:59.288011  CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)

  804 09:59:59.288070  CA5 delay=29 (0~59),Diff = 5 PI (6 cell)

  805 09:59:59.288130  

  806 09:59:59.288190  CA PerBit enable=1, Macro0, CA PI delay=24

  807 09:59:59.288250  === u2Vref_new: 0x5e --> 0x3d

  808 09:59:59.288310  

  809 09:59:59.288373  Vref(ca) range 1: 30

  810 09:59:59.288432  

  811 09:59:59.288492  CS Dly= 9 (40-0-32)

  812 09:59:59.288552  Write Rank0 MR13 =0xd8

  813 09:59:59.288611  Write Rank0 MR13 =0xd8

  814 09:59:59.288670  Write Rank0 MR12 =0x5e

  815 09:59:59.288941  Write Rank1 MR13 =0x59

  816 09:59:59.289008  ==

  817 09:59:59.289070  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

  818 09:59:59.289132  fsp= 1, odt_onoff= 1, Byte mode= 0

  819 09:59:59.289193  ==

  820 09:59:59.289254  === u2Vref_new: 0x56 --> 0x2d

  821 09:59:59.289314  === u2Vref_new: 0x58 --> 0x38

  822 09:59:59.289375  === u2Vref_new: 0x5a --> 0x39

  823 09:59:59.289435  === u2Vref_new: 0x5c --> 0x3c

  824 09:59:59.289496  === u2Vref_new: 0x5e --> 0x3d

  825 09:59:59.289556  === u2Vref_new: 0x60 --> 0xa0

  826 09:59:59.289616  [CA 0] Center 36 (10~63) winsize 54

  827 09:59:59.289678  [CA 1] Center 36 (10~63) winsize 54

  828 09:59:59.289738  [CA 2] Center 31 (2~60) winsize 59

  829 09:59:59.289798  [CA 3] Center 25 (-3~54) winsize 58

  830 09:59:59.289857  [CA 4] Center 25 (-3~54) winsize 58

  831 09:59:59.289918  [CA 5] Center 31 (2~61) winsize 60

  832 09:59:59.289977  

  833 09:59:59.290037  [CATrainingPosCal] consider 2 rank data

  834 09:59:59.290097  u2DelayCellTimex100 = 735/100 ps

  835 09:59:59.290156  CA0 delay=36 (10~63),Diff = 12 PI (15 cell)

  836 09:59:59.290216  CA1 delay=36 (10~63),Diff = 12 PI (15 cell)

  837 09:59:59.290276  CA2 delay=30 (2~58),Diff = 6 PI (7 cell)

  838 09:59:59.290335  CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)

  839 09:59:59.290395  CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)

  840 09:59:59.290456  CA5 delay=30 (2~59),Diff = 6 PI (7 cell)

  841 09:59:59.290516  

  842 09:59:59.290576  CA PerBit enable=1, Macro0, CA PI delay=24

  843 09:59:59.290636  === u2Vref_new: 0x5a --> 0x39

  844 09:59:59.290696  

  845 09:59:59.290755  Vref(ca) range 1: 26

  846 09:59:59.290815  

  847 09:59:59.290874  CS Dly= 7 (38-0-32)

  848 09:59:59.290934  Write Rank1 MR13 =0xd8

  849 09:59:59.290994  Write Rank1 MR13 =0xd8

  850 09:59:59.291053  Write Rank1 MR12 =0x5a

  851 09:59:59.291113  [RankSwap] Rank num 2, (Multi 1), Rank 0

  852 09:59:59.291173  Write Rank0 MR2 =0xad

  853 09:59:59.291232  [Write Leveling]

  854 09:59:59.291291  delay  byte0  byte1  byte2  byte3

  855 09:59:59.291351  

  856 09:59:59.291434  10    0   0   

  857 09:59:59.291500  11    0   0   

  858 09:59:59.291561  12    0   0   

  859 09:59:59.291623  13    0   0   

  860 09:59:59.291684  14    0   0   

  861 09:59:59.291746  15    0   0   

  862 09:59:59.291807  16    0   0   

  863 09:59:59.291869  17    0   0   

  864 09:59:59.291930  18    0   0   

  865 09:59:59.291990  19    0   0   

  866 09:59:59.292052  20    0   0   

  867 09:59:59.292113  21    0   0   

  868 09:59:59.292173  22    0   0   

  869 09:59:59.292234  23    0   ff   

  870 09:59:59.292295  24    0   ff   

  871 09:59:59.292356  25    0   ff   

  872 09:59:59.292416  26    0   ff   

  873 09:59:59.292477  27    0   ff   

  874 09:59:59.292538  28    0   ff   

  875 09:59:59.292598  29    0   ff   

  876 09:59:59.292660  30    0   ff   

  877 09:59:59.292721  31    0   ff   

  878 09:59:59.292782  32    ff   ff   

  879 09:59:59.292843  33    ff   ff   

  880 09:59:59.292904  34    ff   ff   

  881 09:59:59.292965  35    ff   ff   

  882 09:59:59.293025  36    ff   ff   

  883 09:59:59.293086  37    ff   ff   

  884 09:59:59.293146  38    ff   ff   

  885 09:59:59.293207  pass bytecount = 0xff (0xff: all bytes pass) 

  886 09:59:59.293268  

  887 09:59:59.293327  DQS0 dly: 32

  888 09:59:59.293387  DQS1 dly: 23

  889 09:59:59.293446  Write Rank0 MR2 =0x2d

  890 09:59:59.293506  [RankSwap] Rank num 2, (Multi 1), Rank 0

  891 09:59:59.293566  Write Rank0 MR1 =0xd6

  892 09:59:59.293625  [Gating]

  893 09:59:59.293684  ==

  894 09:59:59.293744  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  895 09:59:59.293804  fsp= 1, odt_onoff= 1, Byte mode= 0

  896 09:59:59.293865  ==

  897 09:59:59.293925  3 1 0 |2c2b 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  898 09:59:59.293987  3 1 4 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

  899 09:59:59.294048  3 1 8 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

  900 09:59:59.294110  3 1 12 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

  901 09:59:59.294171  3 1 16 |2c2b 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  902 09:59:59.294232  3 1 20 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

  903 09:59:59.294294  3 1 24 |2c2b 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  904 09:59:59.294355  3 1 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  905 09:59:59.294417  3 2 0 |3534 504  |(11 11)(11 11) |(0 0)(1 1)| 0

  906 09:59:59.294479  3 2 4 |3534 201  |(11 11)(11 11) |(0 0)(1 1)| 0

  907 09:59:59.294540  3 2 8 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

  908 09:59:59.294601  3 2 12 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  909 09:59:59.294663  3 2 16 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

  910 09:59:59.294724  3 2 20 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

  911 09:59:59.294785  3 2 24 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  912 09:59:59.294851  3 2 28 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  913 09:59:59.294913  3 3 0 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

  914 09:59:59.294974  3 3 4 |3534 201  |(11 11)(11 11) |(0 0)(1 1)| 0

  915 09:59:59.295035  3 3 8 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

  916 09:59:59.295096  [Byte 1] Lead/lag falling Transition (3, 3, 8)

  917 09:59:59.295157  3 3 12 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  918 09:59:59.295218  3 3 16 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

  919 09:59:59.295279  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  920 09:59:59.295340  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

  921 09:59:59.295401  3 3 28 |1313 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

  922 09:59:59.295468  3 4 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

  923 09:59:59.295529  3 4 4 |3d3d 403  |(11 11)(11 11) |(1 1)(1 1)| 0

  924 09:59:59.295591  3 4 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  925 09:59:59.295652  3 4 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  926 09:59:59.295714  3 4 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  927 09:59:59.295774  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  928 09:59:59.295836  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  929 09:59:59.295897  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  930 09:59:59.295959  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  931 09:59:59.296019  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  932 09:59:59.296080  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  933 09:59:59.296141  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  934 09:59:59.296202  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

  935 09:59:59.296264  [Byte 0] Lead/lag falling Transition (3, 5, 16)

  936 09:59:59.296324  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

  937 09:59:59.296386  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

  938 09:59:59.296447  [Byte 0] Lead/lag Transition tap number (3)

  939 09:59:59.296701  [Byte 1] Lead/lag falling Transition (3, 5, 24)

  940 09:59:59.296768  3 5 28 |3838 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

  941 09:59:59.296831  [Byte 1] Lead/lag Transition tap number (2)

  942 09:59:59.296892  3 6 0 |4646 3d3d  |(0 0)(11 11) |(0 0)(0 0)| 0

  943 09:59:59.296954  [Byte 0]First pass (3, 6, 0)

  944 09:59:59.297015  3 6 4 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

  945 09:59:59.297077  3 6 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  946 09:59:59.297139  [Byte 1]First pass (3, 6, 8)

  947 09:59:59.297199  3 6 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  948 09:59:59.297261  3 6 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  949 09:59:59.297322  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  950 09:59:59.297384  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  951 09:59:59.297446  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  952 09:59:59.297507  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  953 09:59:59.297569  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  954 09:59:59.297631  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

  955 09:59:59.297692  All bytes gating window > 1UI, Early break!

  956 09:59:59.297753  

  957 09:59:59.297813  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)

  958 09:59:59.297872  

  959 09:59:59.297932  best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)

  960 09:59:59.297993  

  961 09:59:59.298052  

  962 09:59:59.298111  

  963 09:59:59.298170  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)

  964 09:59:59.298230  

  965 09:59:59.298289  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)

  966 09:59:59.298350  

  967 09:59:59.298409  

  968 09:59:59.298468  Write Rank0 MR1 =0x56

  969 09:59:59.298529  

  970 09:59:59.298588  best RODT dly(2T, 0.5T) = (2, 2)

  971 09:59:59.298648  

  972 09:59:59.298707  best RODT dly(2T, 0.5T) = (2, 2)

  973 09:59:59.298767  ==

  974 09:59:59.298827  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

  975 09:59:59.298888  fsp= 1, odt_onoff= 1, Byte mode= 0

  976 09:59:59.298948  ==

  977 09:59:59.299009  Start DQ dly to find pass range UseTestEngine =0

  978 09:59:59.299069  x-axis: bit #, y-axis: DQ dly (-127~63)

  979 09:59:59.299130  RX Vref Scan = 0

  980 09:59:59.299190  -26, [0] xxxxxxxx xxxxxxxx [MSB]

  981 09:59:59.299253  -25, [0] xxxxxxxx xxxxxxxx [MSB]

  982 09:59:59.299315  -24, [0] xxxxxxxx xxxxxxxx [MSB]

  983 09:59:59.299376  -23, [0] xxxxxxxx xxxxxxxx [MSB]

  984 09:59:59.299447  -22, [0] xxxxxxxx xxxxxxxx [MSB]

  985 09:59:59.299509  -21, [0] xxxxxxxx xxxxxxxx [MSB]

  986 09:59:59.299570  -20, [0] xxxxxxxx xxxxxxxx [MSB]

  987 09:59:59.299630  -19, [0] xxxxxxxx xxxxxxxx [MSB]

  988 09:59:59.299691  -18, [0] xxxxxxxx xxxxxxxx [MSB]

  989 09:59:59.299752  -17, [0] xxxxxxxx xxxxxxxx [MSB]

  990 09:59:59.299814  -16, [0] xxxxxxxx xxxxxxxx [MSB]

  991 09:59:59.299875  -15, [0] xxxxxxxx xxxxxxxx [MSB]

  992 09:59:59.299936  -14, [0] xxxxxxxx xxxxxxxx [MSB]

  993 09:59:59.299997  -13, [0] xxxxxxxx xxxxxxxx [MSB]

  994 09:59:59.300057  -12, [0] xxxxxxxx xxxxxxxx [MSB]

  995 09:59:59.300118  -11, [0] xxxxxxxx xxxxxxxx [MSB]

  996 09:59:59.300179  -10, [0] xxxxxxxx xxxxxxxx [MSB]

  997 09:59:59.300240  -9, [0] xxxxxxxx xxxxxxxx [MSB]

  998 09:59:59.300302  -8, [0] xxxxxxxx xxxxxxxx [MSB]

  999 09:59:59.300363  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1000 09:59:59.300424  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1001 09:59:59.300485  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1002 09:59:59.300546  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1003 09:59:59.300607  -3, [0] xxxxxxxx oxxxxxxx [MSB]

 1004 09:59:59.300669  -2, [0] xxxoxxxx oxxxxxxx [MSB]

 1005 09:59:59.300730  -1, [0] xxxoxxxx ooxxxxxx [MSB]

 1006 09:59:59.300791  0, [0] xxxoxoxx ooxoxxxx [MSB]

 1007 09:59:59.300853  1, [0] xxxoxoox ooxoxoxx [MSB]

 1008 09:59:59.300914  2, [0] xxxoxoox ooxoooxx [MSB]

 1009 09:59:59.300975  3, [0] xoxoxooo ooxoooox [MSB]

 1010 09:59:59.301036  4, [0] xxxoxooo ooxoooox [MSB]

 1011 09:59:59.301097  5, [0] xooooooo ooxooooo [MSB]

 1012 09:59:59.301160  6, [0] oooooooo ooxooooo [MSB]

 1013 09:59:59.301222  7, [0] oooooooo ooxooooo [MSB]

 1014 09:59:59.301282  33, [0] oooxoooo xooooooo [MSB]

 1015 09:59:59.301343  34, [0] oooxoooo xooooooo [MSB]

 1016 09:59:59.301404  35, [0] oooxoooo xooooooo [MSB]

 1017 09:59:59.301465  36, [0] oooxoxoo xooxoooo [MSB]

 1018 09:59:59.301526  37, [0] oooxoxxx xxoxoooo [MSB]

 1019 09:59:59.301587  38, [0] oooxoxxx xxoxxoxo [MSB]

 1020 09:59:59.301647  39, [0] oooxxxxx xxoxxxxo [MSB]

 1021 09:59:59.301708  40, [0] xooxxxxx xxoxxxxo [MSB]

 1022 09:59:59.301768  41, [0] xxoxxxxx xxoxxxxo [MSB]

 1023 09:59:59.301829  42, [0] xxxxxxxx xxoxxxxx [MSB]

 1024 09:59:59.301890  43, [0] xxxxxxxx xxoxxxxx [MSB]

 1025 09:59:59.301958  44, [0] xxxxxxxx xxxxxxxx [MSB]

 1026 09:59:59.302021  iDelay=44, Bit 0, Center 22 (6 ~ 39) 34

 1027 09:59:59.302082  iDelay=44, Bit 1, Center 22 (5 ~ 40) 36

 1028 09:59:59.302142  iDelay=44, Bit 2, Center 23 (5 ~ 41) 37

 1029 09:59:59.302201  iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35

 1030 09:59:59.302260  iDelay=44, Bit 4, Center 21 (5 ~ 38) 34

 1031 09:59:59.302320  iDelay=44, Bit 5, Center 17 (0 ~ 35) 36

 1032 09:59:59.302380  iDelay=44, Bit 6, Center 18 (1 ~ 36) 36

 1033 09:59:59.302439  iDelay=44, Bit 7, Center 19 (3 ~ 36) 34

 1034 09:59:59.302498  iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36

 1035 09:59:59.302557  iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38

 1036 09:59:59.302622  iDelay=44, Bit 10, Center 25 (8 ~ 43) 36

 1037 09:59:59.302695  iDelay=44, Bit 11, Center 17 (0 ~ 35) 36

 1038 09:59:59.302755  iDelay=44, Bit 12, Center 19 (2 ~ 37) 36

 1039 09:59:59.302815  iDelay=44, Bit 13, Center 19 (1 ~ 38) 38

 1040 09:59:59.302873  iDelay=44, Bit 14, Center 20 (3 ~ 37) 35

 1041 09:59:59.302933  iDelay=44, Bit 15, Center 23 (5 ~ 41) 37

 1042 09:59:59.302992  ==

 1043 09:59:59.303051  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1044 09:59:59.303110  fsp= 1, odt_onoff= 1, Byte mode= 0

 1045 09:59:59.303169  ==

 1046 09:59:59.303228  DQS Delay:

 1047 09:59:59.303287  DQS0 = 0, DQS1 = 0

 1048 09:59:59.303349  DQM Delay:

 1049 09:59:59.303418  DQM0 = 19, DQM1 = 19

 1050 09:59:59.303479  DQ Delay:

 1051 09:59:59.303538  DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =15

 1052 09:59:59.303597  DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19

 1053 09:59:59.303656  DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17

 1054 09:59:59.303715  DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23

 1055 09:59:59.303773  

 1056 09:59:59.303831  

 1057 09:59:59.303889  DramC Write-DBI off

 1058 09:59:59.303948  ==

 1059 09:59:59.304006  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1060 09:59:59.304065  fsp= 1, odt_onoff= 1, Byte mode= 0

 1061 09:59:59.304125  ==

 1062 09:59:59.304184  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1063 09:59:59.304243  

 1064 09:59:59.304301  Begin, DQ Scan Range 919~1175

 1065 09:59:59.304360  

 1066 09:59:59.304418  

 1067 09:59:59.304477  	TX Vref Scan disable

 1068 09:59:59.304535  919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]

 1069 09:59:59.304596  920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]

 1070 09:59:59.304859  921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]

 1071 09:59:59.304931  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 1072 09:59:59.304993  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 1073 09:59:59.305054  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1074 09:59:59.305114  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1075 09:59:59.305174  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1076 09:59:59.305235  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1077 09:59:59.305296  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1078 09:59:59.305357  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1079 09:59:59.305417  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1080 09:59:59.305477  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1081 09:59:59.305537  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1082 09:59:59.305597  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1083 09:59:59.305658  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1084 09:59:59.305718  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1085 09:59:59.305778  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1086 09:59:59.305839  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1087 09:59:59.305899  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1088 09:59:59.305959  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1089 09:59:59.306018  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1090 09:59:59.306079  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1091 09:59:59.306140  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1092 09:59:59.306200  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1093 09:59:59.306260  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1094 09:59:59.306319  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1095 09:59:59.306380  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1096 09:59:59.306440  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1097 09:59:59.306500  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1098 09:59:59.306559  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1099 09:59:59.306619  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1100 09:59:59.306679  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1101 09:59:59.306739  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1102 09:59:59.306800  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1103 09:59:59.306859  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1104 09:59:59.306919  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1105 09:59:59.306979  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1106 09:59:59.307039  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1107 09:59:59.307100  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1108 09:59:59.307160  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1109 09:59:59.307220  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1110 09:59:59.307279  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1111 09:59:59.307339  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1112 09:59:59.307399  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1113 09:59:59.307467  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1114 09:59:59.307527  965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]

 1115 09:59:59.307587  966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]

 1116 09:59:59.307647  967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]

 1117 09:59:59.307707  968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]

 1118 09:59:59.307767  969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]

 1119 09:59:59.307827  970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]

 1120 09:59:59.307888  971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]

 1121 09:59:59.307947  972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]

 1122 09:59:59.308008  973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]

 1123 09:59:59.308068  974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]

 1124 09:59:59.308128  975 |3 6 15|[0] xxxoxoox oooooooo [MSB]

 1125 09:59:59.308188  976 |3 6 16|[0] xoxooooo oooooooo [MSB]

 1126 09:59:59.308248  984 |3 6 24|[0] oooooooo xooooooo [MSB]

 1127 09:59:59.308308  985 |3 6 25|[0] oooooooo xooxoooo [MSB]

 1128 09:59:59.308368  986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]

 1129 09:59:59.308428  987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]

 1130 09:59:59.308488  988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]

 1131 09:59:59.308548  989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]

 1132 09:59:59.308609  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1133 09:59:59.308669  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 1134 09:59:59.308729  992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]

 1135 09:59:59.308789  993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]

 1136 09:59:59.308850  994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]

 1137 09:59:59.308910  995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]

 1138 09:59:59.308970  996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]

 1139 09:59:59.309030  997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1140 09:59:59.309090  Byte0, DQ PI dly=984, DQM PI dly= 984

 1141 09:59:59.309149  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)

 1142 09:59:59.309208  

 1143 09:59:59.309267  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)

 1144 09:59:59.309327  

 1145 09:59:59.309385  Byte1, DQ PI dly=975, DQM PI dly= 975

 1146 09:59:59.309444  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)

 1147 09:59:59.309504  

 1148 09:59:59.309562  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)

 1149 09:59:59.309622  

 1150 09:59:59.309680  ==

 1151 09:59:59.309739  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1152 09:59:59.309799  fsp= 1, odt_onoff= 1, Byte mode= 0

 1153 09:59:59.309858  ==

 1154 09:59:59.309918  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1155 09:59:59.309976  

 1156 09:59:59.310035  Begin, DQ Scan Range 951~1015

 1157 09:59:59.310094  Write Rank0 MR14 =0x0

 1158 09:59:59.310153  

 1159 09:59:59.310212  	CH=0, VrefRange= 0, VrefLevel = 0

 1160 09:59:59.310271  TX Bit0 (979~993) 15 986,   Bit8 (967~976) 10 971,

 1161 09:59:59.310331  TX Bit1 (977~992) 16 984,   Bit9 (968~983) 16 975,

 1162 09:59:59.310391  TX Bit2 (978~992) 15 985,   Bit10 (974~985) 12 979,

 1163 09:59:59.310450  TX Bit3 (975~985) 11 980,   Bit11 (968~979) 12 973,

 1164 09:59:59.310510  TX Bit4 (978~991) 14 984,   Bit12 (969~982) 14 975,

 1165 09:59:59.310570  TX Bit5 (976~988) 13 982,   Bit13 (969~983) 15 976,

 1166 09:59:59.310629  TX Bit6 (977~990) 14 983,   Bit14 (968~983) 16 975,

 1167 09:59:59.310688  TX Bit7 (978~991) 14 984,   Bit15 (973~984) 12 978,

 1168 09:59:59.310747  

 1169 09:59:59.310806  Write Rank0 MR14 =0x2

 1170 09:59:59.310865  

 1171 09:59:59.310945  	CH=0, VrefRange= 0, VrefLevel = 2

 1172 09:59:59.311006  TX Bit0 (978~993) 16 985,   Bit8 (966~978) 13 972,

 1173 09:59:59.311066  TX Bit1 (977~992) 16 984,   Bit9 (968~983) 16 975,

 1174 09:59:59.311125  TX Bit2 (978~993) 16 985,   Bit10 (974~986) 13 980,

 1175 09:59:59.311185  TX Bit3 (974~986) 13 980,   Bit11 (967~981) 15 974,

 1176 09:59:59.311444  TX Bit4 (977~991) 15 984,   Bit12 (969~983) 15 976,

 1177 09:59:59.311512  TX Bit5 (976~990) 15 983,   Bit13 (968~983) 16 975,

 1178 09:59:59.311573  TX Bit6 (977~991) 15 984,   Bit14 (968~984) 17 976,

 1179 09:59:59.311634  TX Bit7 (978~992) 15 985,   Bit15 (973~985) 13 979,

 1180 09:59:59.311693  

 1181 09:59:59.311753  Write Rank0 MR14 =0x4

 1182 09:59:59.311813  

 1183 09:59:59.311871  	CH=0, VrefRange= 0, VrefLevel = 4

 1184 09:59:59.311931  TX Bit0 (978~994) 17 986,   Bit8 (966~978) 13 972,

 1185 09:59:59.311991  TX Bit1 (977~993) 17 985,   Bit9 (968~983) 16 975,

 1186 09:59:59.312051  TX Bit2 (978~993) 16 985,   Bit10 (974~987) 14 980,

 1187 09:59:59.312110  TX Bit3 (974~987) 14 980,   Bit11 (967~982) 16 974,

 1188 09:59:59.312170  TX Bit4 (977~992) 16 984,   Bit12 (969~983) 15 976,

 1189 09:59:59.312230  TX Bit5 (976~991) 16 983,   Bit13 (968~983) 16 975,

 1190 09:59:59.312289  TX Bit6 (976~991) 16 983,   Bit14 (968~984) 17 976,

 1191 09:59:59.312349  TX Bit7 (977~992) 16 984,   Bit15 (973~986) 14 979,

 1192 09:59:59.312409  

 1193 09:59:59.312467  Write Rank0 MR14 =0x6

 1194 09:59:59.312526  

 1195 09:59:59.312585  	CH=0, VrefRange= 0, VrefLevel = 6

 1196 09:59:59.312644  TX Bit0 (978~994) 17 986,   Bit8 (966~979) 14 972,

 1197 09:59:59.312704  TX Bit1 (977~993) 17 985,   Bit9 (967~984) 18 975,

 1198 09:59:59.312764  TX Bit2 (978~994) 17 986,   Bit10 (972~988) 17 980,

 1199 09:59:59.312823  TX Bit3 (973~988) 16 980,   Bit11 (966~982) 17 974,

 1200 09:59:59.312883  TX Bit4 (977~992) 16 984,   Bit12 (968~984) 17 976,

 1201 09:59:59.312952  TX Bit5 (975~992) 18 983,   Bit13 (968~984) 17 976,

 1202 09:59:59.313055  TX Bit6 (976~992) 17 984,   Bit14 (968~985) 18 976,

 1203 09:59:59.313120  TX Bit7 (977~992) 16 984,   Bit15 (972~987) 16 979,

 1204 09:59:59.313180  

 1205 09:59:59.313239  Write Rank0 MR14 =0x8

 1206 09:59:59.313298  

 1207 09:59:59.313356  	CH=0, VrefRange= 0, VrefLevel = 8

 1208 09:59:59.313416  TX Bit0 (977~995) 19 986,   Bit8 (965~981) 17 973,

 1209 09:59:59.313476  TX Bit1 (977~994) 18 985,   Bit9 (967~984) 18 975,

 1210 09:59:59.313536  TX Bit2 (977~994) 18 985,   Bit10 (972~989) 18 980,

 1211 09:59:59.313595  TX Bit3 (972~989) 18 980,   Bit11 (967~983) 17 975,

 1212 09:59:59.313655  TX Bit4 (977~993) 17 985,   Bit12 (968~984) 17 976,

 1213 09:59:59.313715  TX Bit5 (975~992) 18 983,   Bit13 (968~984) 17 976,

 1214 09:59:59.313775  TX Bit6 (976~992) 17 984,   Bit14 (967~985) 19 976,

 1215 09:59:59.313834  TX Bit7 (977~993) 17 985,   Bit15 (972~987) 16 979,

 1216 09:59:59.313894  

 1217 09:59:59.313952  Write Rank0 MR14 =0xa

 1218 09:59:59.314011  

 1219 09:59:59.314069  	CH=0, VrefRange= 0, VrefLevel = 10

 1220 09:59:59.314128  TX Bit0 (977~996) 20 986,   Bit8 (966~981) 16 973,

 1221 09:59:59.314188  TX Bit1 (977~994) 18 985,   Bit9 (967~984) 18 975,

 1222 09:59:59.314248  TX Bit2 (977~996) 20 986,   Bit10 (972~990) 19 981,

 1223 09:59:59.314307  TX Bit3 (972~990) 19 981,   Bit11 (966~983) 18 974,

 1224 09:59:59.314367  TX Bit4 (977~993) 17 985,   Bit12 (968~984) 17 976,

 1225 09:59:59.314427  TX Bit5 (975~992) 18 983,   Bit13 (968~985) 18 976,

 1226 09:59:59.314486  TX Bit6 (975~992) 18 983,   Bit14 (967~985) 19 976,

 1227 09:59:59.314546  TX Bit7 (977~993) 17 985,   Bit15 (971~987) 17 979,

 1228 09:59:59.314604  

 1229 09:59:59.314663  wait MRW command Rank0 MR14 =0xc fired (1)

 1230 09:59:59.314722  Write Rank0 MR14 =0xc

 1231 09:59:59.314781  

 1232 09:59:59.314839  	CH=0, VrefRange= 0, VrefLevel = 12

 1233 09:59:59.314898  TX Bit0 (977~997) 21 987,   Bit8 (965~982) 18 973,

 1234 09:59:59.314958  TX Bit1 (976~995) 20 985,   Bit9 (967~984) 18 975,

 1235 09:59:59.315017  TX Bit2 (977~996) 20 986,   Bit10 (972~990) 19 981,

 1236 09:59:59.315076  TX Bit3 (972~991) 20 981,   Bit11 (966~983) 18 974,

 1237 09:59:59.315136  TX Bit4 (976~994) 19 985,   Bit12 (968~985) 18 976,

 1238 09:59:59.315195  TX Bit5 (974~993) 20 983,   Bit13 (967~985) 19 976,

 1239 09:59:59.315255  TX Bit6 (976~993) 18 984,   Bit14 (967~986) 20 976,

 1240 09:59:59.315313  TX Bit7 (977~994) 18 985,   Bit15 (971~989) 19 980,

 1241 09:59:59.315373  

 1242 09:59:59.315439  Write Rank0 MR14 =0xe

 1243 09:59:59.315499  

 1244 09:59:59.315557  	CH=0, VrefRange= 0, VrefLevel = 14

 1245 09:59:59.315616  TX Bit0 (977~997) 21 987,   Bit8 (965~983) 19 974,

 1246 09:59:59.315676  TX Bit1 (976~996) 21 986,   Bit9 (967~985) 19 976,

 1247 09:59:59.315735  TX Bit2 (977~997) 21 987,   Bit10 (971~990) 20 980,

 1248 09:59:59.315795  TX Bit3 (971~991) 21 981,   Bit11 (966~984) 19 975,

 1249 09:59:59.315854  TX Bit4 (976~994) 19 985,   Bit12 (968~985) 18 976,

 1250 09:59:59.315914  TX Bit5 (974~993) 20 983,   Bit13 (967~985) 19 976,

 1251 09:59:59.315974  TX Bit6 (975~993) 19 984,   Bit14 (967~986) 20 976,

 1252 09:59:59.316033  TX Bit7 (977~994) 18 985,   Bit15 (971~990) 20 980,

 1253 09:59:59.316093  

 1254 09:59:59.316151  Write Rank0 MR14 =0x10

 1255 09:59:59.316210  

 1256 09:59:59.316269  	CH=0, VrefRange= 0, VrefLevel = 16

 1257 09:59:59.316327  TX Bit0 (977~997) 21 987,   Bit8 (965~983) 19 974,

 1258 09:59:59.316387  TX Bit1 (976~996) 21 986,   Bit9 (967~985) 19 976,

 1259 09:59:59.316446  TX Bit2 (977~997) 21 987,   Bit10 (970~991) 22 980,

 1260 09:59:59.316505  TX Bit3 (971~991) 21 981,   Bit11 (965~984) 20 974,

 1261 09:59:59.316564  TX Bit4 (976~995) 20 985,   Bit12 (967~986) 20 976,

 1262 09:59:59.316624  TX Bit5 (974~993) 20 983,   Bit13 (967~986) 20 976,

 1263 09:59:59.316683  TX Bit6 (975~994) 20 984,   Bit14 (967~987) 21 977,

 1264 09:59:59.316743  TX Bit7 (976~995) 20 985,   Bit15 (970~990) 21 980,

 1265 09:59:59.316802  

 1266 09:59:59.316860  Write Rank0 MR14 =0x12

 1267 09:59:59.316918  

 1268 09:59:59.316977  	CH=0, VrefRange= 0, VrefLevel = 18

 1269 09:59:59.317036  TX Bit0 (977~998) 22 987,   Bit8 (964~983) 20 973,

 1270 09:59:59.317095  TX Bit1 (976~997) 22 986,   Bit9 (967~986) 20 976,

 1271 09:59:59.317154  TX Bit2 (976~998) 23 987,   Bit10 (970~991) 22 980,

 1272 09:59:59.317214  TX Bit3 (970~992) 23 981,   Bit11 (965~985) 21 975,

 1273 09:59:59.317273  TX Bit4 (976~996) 21 986,   Bit12 (967~986) 20 976,

 1274 09:59:59.317333  TX Bit5 (974~994) 21 984,   Bit13 (967~986) 20 976,

 1275 09:59:59.317392  TX Bit6 (975~994) 20 984,   Bit14 (967~988) 22 977,

 1276 09:59:59.317644  TX Bit7 (976~996) 21 986,   Bit15 (969~990) 22 979,

 1277 09:59:59.317710  

 1278 09:59:59.317770  Write Rank0 MR14 =0x14

 1279 09:59:59.317829  

 1280 09:59:59.317888  	CH=0, VrefRange= 0, VrefLevel = 20

 1281 09:59:59.317947  TX Bit0 (977~999) 23 988,   Bit8 (964~984) 21 974,

 1282 09:59:59.318008  TX Bit1 (976~997) 22 986,   Bit9 (966~987) 22 976,

 1283 09:59:59.318068  TX Bit2 (977~999) 23 988,   Bit10 (970~991) 22 980,

 1284 09:59:59.318128  TX Bit3 (970~992) 23 981,   Bit11 (965~985) 21 975,

 1285 09:59:59.318188  TX Bit4 (975~997) 23 986,   Bit12 (967~987) 21 977,

 1286 09:59:59.318248  TX Bit5 (973~994) 22 983,   Bit13 (967~987) 21 977,

 1287 09:59:59.318307  TX Bit6 (975~995) 21 985,   Bit14 (966~989) 24 977,

 1288 09:59:59.318367  TX Bit7 (976~996) 21 986,   Bit15 (969~991) 23 980,

 1289 09:59:59.318426  

 1290 09:59:59.318485  Write Rank0 MR14 =0x16

 1291 09:59:59.318544  

 1292 09:59:59.318603  	CH=0, VrefRange= 0, VrefLevel = 22

 1293 09:59:59.318662  TX Bit0 (976~999) 24 987,   Bit8 (963~984) 22 973,

 1294 09:59:59.318722  TX Bit1 (976~998) 23 987,   Bit9 (966~987) 22 976,

 1295 09:59:59.318782  TX Bit2 (976~999) 24 987,   Bit10 (969~991) 23 980,

 1296 09:59:59.318842  TX Bit3 (970~992) 23 981,   Bit11 (965~985) 21 975,

 1297 09:59:59.318901  TX Bit4 (976~997) 22 986,   Bit12 (967~988) 22 977,

 1298 09:59:59.318961  TX Bit5 (973~995) 23 984,   Bit13 (966~988) 23 977,

 1299 09:59:59.319020  TX Bit6 (974~996) 23 985,   Bit14 (966~990) 25 978,

 1300 09:59:59.319080  TX Bit7 (976~996) 21 986,   Bit15 (969~991) 23 980,

 1301 09:59:59.319139  

 1302 09:59:59.319198  Write Rank0 MR14 =0x18

 1303 09:59:59.319257  

 1304 09:59:59.319315  	CH=0, VrefRange= 0, VrefLevel = 24

 1305 09:59:59.319375  TX Bit0 (976~999) 24 987,   Bit8 (962~985) 24 973,

 1306 09:59:59.319451  TX Bit1 (976~999) 24 987,   Bit9 (966~987) 22 976,

 1307 09:59:59.319513  TX Bit2 (976~999) 24 987,   Bit10 (969~992) 24 980,

 1308 09:59:59.319573  TX Bit3 (969~993) 25 981,   Bit11 (965~986) 22 975,

 1309 09:59:59.319633  TX Bit4 (975~998) 24 986,   Bit12 (966~988) 23 977,

 1310 09:59:59.319693  TX Bit5 (972~995) 24 983,   Bit13 (967~988) 22 977,

 1311 09:59:59.319753  TX Bit6 (974~996) 23 985,   Bit14 (966~990) 25 978,

 1312 09:59:59.319813  TX Bit7 (976~997) 22 986,   Bit15 (969~991) 23 980,

 1313 09:59:59.319872  

 1314 09:59:59.319931  Write Rank0 MR14 =0x1a

 1315 09:59:59.319990  

 1316 09:59:59.320049  	CH=0, VrefRange= 0, VrefLevel = 26

 1317 09:59:59.320109  TX Bit0 (976~999) 24 987,   Bit8 (962~985) 24 973,

 1318 09:59:59.320168  TX Bit1 (975~999) 25 987,   Bit9 (965~988) 24 976,

 1319 09:59:59.320228  TX Bit2 (976~999) 24 987,   Bit10 (969~992) 24 980,

 1320 09:59:59.320288  TX Bit3 (969~993) 25 981,   Bit11 (964~986) 23 975,

 1321 09:59:59.320348  TX Bit4 (975~998) 24 986,   Bit12 (967~989) 23 978,

 1322 09:59:59.320407  TX Bit5 (972~995) 24 983,   Bit13 (966~989) 24 977,

 1323 09:59:59.320466  TX Bit6 (973~997) 25 985,   Bit14 (966~990) 25 978,

 1324 09:59:59.320525  TX Bit7 (975~998) 24 986,   Bit15 (968~992) 25 980,

 1325 09:59:59.320585  

 1326 09:59:59.320643  Write Rank0 MR14 =0x1c

 1327 09:59:59.320702  

 1328 09:59:59.320760  	CH=0, VrefRange= 0, VrefLevel = 28

 1329 09:59:59.320820  TX Bit0 (976~1000) 25 988,   Bit8 (962~985) 24 973,

 1330 09:59:59.320880  TX Bit1 (975~999) 25 987,   Bit9 (965~988) 24 976,

 1331 09:59:59.320940  TX Bit2 (976~1000) 25 988,   Bit10 (968~992) 25 980,

 1332 09:59:59.321000  TX Bit3 (969~993) 25 981,   Bit11 (964~987) 24 975,

 1333 09:59:59.321060  TX Bit4 (975~999) 25 987,   Bit12 (966~990) 25 978,

 1334 09:59:59.321119  TX Bit5 (971~996) 26 983,   Bit13 (966~989) 24 977,

 1335 09:59:59.321179  TX Bit6 (973~997) 25 985,   Bit14 (966~990) 25 978,

 1336 09:59:59.321238  TX Bit7 (974~999) 26 986,   Bit15 (968~992) 25 980,

 1337 09:59:59.321297  

 1338 09:59:59.321355  Write Rank0 MR14 =0x1e

 1339 09:59:59.321413  

 1340 09:59:59.321472  	CH=0, VrefRange= 0, VrefLevel = 30

 1341 09:59:59.321532  TX Bit0 (976~1000) 25 988,   Bit8 (962~985) 24 973,

 1342 09:59:59.321592  TX Bit1 (975~999) 25 987,   Bit9 (965~988) 24 976,

 1343 09:59:59.321667  TX Bit2 (976~1000) 25 988,   Bit10 (968~992) 25 980,

 1344 09:59:59.321773  TX Bit3 (969~993) 25 981,   Bit11 (964~987) 24 975,

 1345 09:59:59.321876  TX Bit4 (975~999) 25 987,   Bit12 (966~990) 25 978,

 1346 09:59:59.321988  TX Bit5 (971~996) 26 983,   Bit13 (966~989) 24 977,

 1347 09:59:59.322076  TX Bit6 (973~997) 25 985,   Bit14 (966~990) 25 978,

 1348 09:59:59.322141  TX Bit7 (974~999) 26 986,   Bit15 (968~992) 25 980,

 1349 09:59:59.322202  

 1350 09:59:59.322262  Write Rank0 MR14 =0x20

 1351 09:59:59.322322  

 1352 09:59:59.322382  	CH=0, VrefRange= 0, VrefLevel = 32

 1353 09:59:59.322442  TX Bit0 (976~1000) 25 988,   Bit8 (962~985) 24 973,

 1354 09:59:59.322502  TX Bit1 (975~999) 25 987,   Bit9 (965~988) 24 976,

 1355 09:59:59.322562  TX Bit2 (976~1000) 25 988,   Bit10 (968~992) 25 980,

 1356 09:59:59.322622  TX Bit3 (969~993) 25 981,   Bit11 (964~987) 24 975,

 1357 09:59:59.322681  TX Bit4 (975~999) 25 987,   Bit12 (966~990) 25 978,

 1358 09:59:59.322741  TX Bit5 (971~996) 26 983,   Bit13 (966~989) 24 977,

 1359 09:59:59.322800  TX Bit6 (973~997) 25 985,   Bit14 (966~990) 25 978,

 1360 09:59:59.322860  TX Bit7 (974~999) 26 986,   Bit15 (968~992) 25 980,

 1361 09:59:59.322919  

 1362 09:59:59.322977  Write Rank0 MR14 =0x22

 1363 09:59:59.323035  

 1364 09:59:59.323093  	CH=0, VrefRange= 0, VrefLevel = 34

 1365 09:59:59.323151  TX Bit0 (976~1000) 25 988,   Bit8 (962~985) 24 973,

 1366 09:59:59.323210  TX Bit1 (975~999) 25 987,   Bit9 (965~988) 24 976,

 1367 09:59:59.323269  TX Bit2 (976~1000) 25 988,   Bit10 (968~992) 25 980,

 1368 09:59:59.323328  TX Bit3 (969~993) 25 981,   Bit11 (964~987) 24 975,

 1369 09:59:59.323387  TX Bit4 (975~999) 25 987,   Bit12 (966~990) 25 978,

 1370 09:59:59.323460  TX Bit5 (971~996) 26 983,   Bit13 (966~989) 24 977,

 1371 09:59:59.323520  TX Bit6 (973~997) 25 985,   Bit14 (966~990) 25 978,

 1372 09:59:59.323579  TX Bit7 (974~999) 26 986,   Bit15 (968~992) 25 980,

 1373 09:59:59.323638  

 1374 09:59:59.323695  

 1375 09:59:59.323754  TX Vref found, early break! 377< 378

 1376 09:59:59.323812  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps

 1377 09:59:59.323871  u1DelayCellOfst[0]=9 cells (7 PI)

 1378 09:59:59.323930  u1DelayCellOfst[1]=7 cells (6 PI)

 1379 09:59:59.324192  u1DelayCellOfst[2]=9 cells (7 PI)

 1380 09:59:59.324260  u1DelayCellOfst[3]=0 cells (0 PI)

 1381 09:59:59.324321  u1DelayCellOfst[4]=7 cells (6 PI)

 1382 09:59:59.324380  u1DelayCellOfst[5]=2 cells (2 PI)

 1383 09:59:59.324460  u1DelayCellOfst[6]=5 cells (4 PI)

 1384 09:59:59.324521  u1DelayCellOfst[7]=6 cells (5 PI)

 1385 09:59:59.324581  Byte0, DQ PI dly=981, DQM PI dly= 984

 1386 09:59:59.324640  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)

 1387 09:59:59.324699  

 1388 09:59:59.324757  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)

 1389 09:59:59.324817  

 1390 09:59:59.324875  u1DelayCellOfst[8]=0 cells (0 PI)

 1391 09:59:59.324935  u1DelayCellOfst[9]=3 cells (3 PI)

 1392 09:59:59.324993  u1DelayCellOfst[10]=9 cells (7 PI)

 1393 09:59:59.325052  u1DelayCellOfst[11]=2 cells (2 PI)

 1394 09:59:59.325110  u1DelayCellOfst[12]=6 cells (5 PI)

 1395 09:59:59.325169  u1DelayCellOfst[13]=5 cells (4 PI)

 1396 09:59:59.325227  u1DelayCellOfst[14]=6 cells (5 PI)

 1397 09:59:59.325285  u1DelayCellOfst[15]=9 cells (7 PI)

 1398 09:59:59.325344  Byte1, DQ PI dly=973, DQM PI dly= 976

 1399 09:59:59.325405  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)

 1400 09:59:59.325464  

 1401 09:59:59.325522  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)

 1402 09:59:59.325581  

 1403 09:59:59.325639  Write Rank0 MR14 =0x1c

 1404 09:59:59.325697  

 1405 09:59:59.325755  Final TX Range 0 Vref 28

 1406 09:59:59.325814  

 1407 09:59:59.325872  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 1408 09:59:59.325934  

 1409 09:59:59.325992  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 1410 09:59:59.326051  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1411 09:59:59.326111  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1412 09:59:59.326169  Write Rank0 MR3 =0xb0

 1413 09:59:59.326227  DramC Write-DBI on

 1414 09:59:59.326285  ==

 1415 09:59:59.326343  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1416 09:59:59.326402  fsp= 1, odt_onoff= 1, Byte mode= 0

 1417 09:59:59.326460  ==

 1418 09:59:59.326519  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 1419 09:59:59.326577  

 1420 09:59:59.326634  Begin, DQ Scan Range 696~760

 1421 09:59:59.326692  

 1422 09:59:59.326750  

 1423 09:59:59.326808  	TX Vref Scan disable

 1424 09:59:59.326866  696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1425 09:59:59.326927  697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1426 09:59:59.326986  698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1427 09:59:59.327046  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1428 09:59:59.327106  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1429 09:59:59.327186  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1430 09:59:59.327247  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1431 09:59:59.327308  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1432 09:59:59.327367  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1433 09:59:59.327437  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1434 09:59:59.327498  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1435 09:59:59.327558  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1436 09:59:59.327618  708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]

 1437 09:59:59.327677  709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]

 1438 09:59:59.327738  710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]

 1439 09:59:59.327797  711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]

 1440 09:59:59.327856  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 1441 09:59:59.327916  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 1442 09:59:59.327976  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 1443 09:59:59.328037  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 1444 09:59:59.328096  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 1445 09:59:59.328156  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 1446 09:59:59.328216  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 1447 09:59:59.328275  734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]

 1448 09:59:59.328335  735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]

 1449 09:59:59.328394  736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]

 1450 09:59:59.328454  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 1451 09:59:59.328513  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 1452 09:59:59.328573  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 1453 09:59:59.328632  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 1454 09:59:59.328691  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 1455 09:59:59.328750  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 1456 09:59:59.328810  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 1457 09:59:59.328869  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 1458 09:59:59.328928  745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1459 09:59:59.328988  Byte0, DQ PI dly=731, DQM PI dly= 731

 1460 09:59:59.329046  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)

 1461 09:59:59.329106  

 1462 09:59:59.329164  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)

 1463 09:59:59.329222  

 1464 09:59:59.329280  Byte1, DQ PI dly=720, DQM PI dly= 720

 1465 09:59:59.329338  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)

 1466 09:59:59.329396  

 1467 09:59:59.329455  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)

 1468 09:59:59.329513  

 1469 09:59:59.329571  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 1470 09:59:59.329630  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 1471 09:59:59.329689  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 1472 09:59:59.329748  Write Rank0 MR3 =0x30

 1473 09:59:59.329807  DramC Write-DBI off

 1474 09:59:59.329866  

 1475 09:59:59.329925  [DATLAT]

 1476 09:59:59.329984  Freq=1600, CH0 RK0, use_rxtx_scan=0

 1477 09:59:59.330043  

 1478 09:59:59.330119  DATLAT Default: 0xf

 1479 09:59:59.330179  7, 0xFFFF, sum=0

 1480 09:59:59.330239  8, 0xFFFF, sum=0

 1481 09:59:59.330300  9, 0xFFFF, sum=0

 1482 09:59:59.330360  10, 0xFFFF, sum=0

 1483 09:59:59.330419  11, 0xFFFF, sum=0

 1484 09:59:59.330479  12, 0xFFFF, sum=0

 1485 09:59:59.330538  13, 0xFFFF, sum=0

 1486 09:59:59.330597  14, 0x0, sum=1

 1487 09:59:59.330656  15, 0x0, sum=2

 1488 09:59:59.330715  16, 0x0, sum=3

 1489 09:59:59.330774  17, 0x0, sum=4

 1490 09:59:59.330834  pattern=2 first_step=14 total pass=5 best_step=16

 1491 09:59:59.330893  ==

 1492 09:59:59.330951  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1493 09:59:59.331010  fsp= 1, odt_onoff= 1, Byte mode= 0

 1494 09:59:59.331069  ==

 1495 09:59:59.331127  Start DQ dly to find pass range UseTestEngine =1

 1496 09:59:59.331186  x-axis: bit #, y-axis: DQ dly (-127~63)

 1497 09:59:59.331245  RX Vref Scan = 1

 1498 09:59:59.331303  

 1499 09:59:59.331361  RX Vref found, early break!

 1500 09:59:59.331427  

 1501 09:59:59.331493  Final RX Vref 12, apply to both rank0 and 1

 1502 09:59:59.331553  ==

 1503 09:59:59.331611  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0

 1504 09:59:59.331670  fsp= 1, odt_onoff= 1, Byte mode= 0

 1505 09:59:59.331729  ==

 1506 09:59:59.331982  DQS Delay:

 1507 09:59:59.332046  DQS0 = 0, DQS1 = 0

 1508 09:59:59.332106  DQM Delay:

 1509 09:59:59.332165  DQM0 = 19, DQM1 = 18

 1510 09:59:59.332223  DQ Delay:

 1511 09:59:59.332280  DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15

 1512 09:59:59.332339  DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20

 1513 09:59:59.332397  DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16

 1514 09:59:59.332455  DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =21

 1515 09:59:59.332514  

 1516 09:59:59.332571  

 1517 09:59:59.332629  

 1518 09:59:59.332687  [DramC_TX_OE_Calibration] TA2

 1519 09:59:59.332746  Original DQ_B0 (3 6) =30, OEN = 27

 1520 09:59:59.332805  Original DQ_B1 (3 6) =30, OEN = 27

 1521 09:59:59.332864  23, 0x0, End_B0=23 End_B1=23

 1522 09:59:59.332923  24, 0x0, End_B0=24 End_B1=24

 1523 09:59:59.332982  25, 0x0, End_B0=25 End_B1=25

 1524 09:59:59.333041  26, 0x0, End_B0=26 End_B1=26

 1525 09:59:59.333100  27, 0x0, End_B0=27 End_B1=27

 1526 09:59:59.333159  28, 0x0, End_B0=28 End_B1=28

 1527 09:59:59.333221  29, 0x0, End_B0=29 End_B1=29

 1528 09:59:59.333281  30, 0x0, End_B0=30 End_B1=30

 1529 09:59:59.333341  31, 0xFBFF, End_B0=30 End_B1=30

 1530 09:59:59.333400  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1531 09:59:59.333482  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 1532 09:59:59.333543  

 1533 09:59:59.333602  

 1534 09:59:59.333659  Write Rank0 MR23 =0x3f

 1535 09:59:59.333719  [DQSOSC]

 1536 09:59:59.333777  [DQSOSCAuto] RK0, (LSB)MR18= 0xe0e, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 402 ps

 1537 09:59:59.333837  CH0_RK0: MR19=0x303, MR18=0xE0E, DQSOSC=402, MR23=63, INC=15, DEC=22

 1538 09:59:59.333896  Write Rank0 MR23 =0x3f

 1539 09:59:59.333954  [DQSOSC]

 1540 09:59:59.334012  [DQSOSCAuto] RK0, (LSB)MR18= 0x1414, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps

 1541 09:59:59.334072  CH0 RK0: MR19=303, MR18=1414

 1542 09:59:59.334130  [RankSwap] Rank num 2, (Multi 1), Rank 1

 1543 09:59:59.334188  Write Rank0 MR2 =0xad

 1544 09:59:59.334246  [Write Leveling]

 1545 09:59:59.334304  delay  byte0  byte1  byte2  byte3

 1546 09:59:59.334363  

 1547 09:59:59.334420  10    0   0   

 1548 09:59:59.334480  11    0   0   

 1549 09:59:59.334538  12    0   0   

 1550 09:59:59.334597  13    0   0   

 1551 09:59:59.334657  14    0   0   

 1552 09:59:59.334716  15    0   0   

 1553 09:59:59.334775  16    0   0   

 1554 09:59:59.334834  17    0   0   

 1555 09:59:59.334893  18    0   0   

 1556 09:59:59.334952  19    0   0   

 1557 09:59:59.335011  20    0   0   

 1558 09:59:59.335070  21    0   0   

 1559 09:59:59.335129  22    0   0   

 1560 09:59:59.335188  23    0   0   

 1561 09:59:59.335247  24    0   0   

 1562 09:59:59.335306  25    0   ff   

 1563 09:59:59.335365  26    0   ff   

 1564 09:59:59.335436  27    ff   ff   

 1565 09:59:59.335500  28    ff   ff   

 1566 09:59:59.335560  29    ff   ff   

 1567 09:59:59.335619  30    ff   ff   

 1568 09:59:59.335678  31    ff   ff   

 1569 09:59:59.335738  32    ff   ff   

 1570 09:59:59.335797  33    ff   ff   

 1571 09:59:59.335856  pass bytecount = 0xff (0xff: all bytes pass) 

 1572 09:59:59.335915  

 1573 09:59:59.335973  DQS0 dly: 27

 1574 09:59:59.336031  DQS1 dly: 25

 1575 09:59:59.336089  Write Rank0 MR2 =0x2d

 1576 09:59:59.336147  [RankSwap] Rank num 2, (Multi 1), Rank 0

 1577 09:59:59.336206  Write Rank1 MR1 =0xd6

 1578 09:59:59.336264  [Gating]

 1579 09:59:59.336321  ==

 1580 09:59:59.336379  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1581 09:59:59.336439  fsp= 1, odt_onoff= 1, Byte mode= 0

 1582 09:59:59.336498  ==

 1583 09:59:59.336556  3 1 0 |2c2b 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 1584 09:59:59.336617  3 1 4 |2c2b 3534  |(11 11)(11 11) |(0 0)(0 0)| 0

 1585 09:59:59.336677  3 1 8 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 1586 09:59:59.336736  3 1 12 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 1587 09:59:59.336796  3 1 16 |2c2b 3534  |(11 11)(11 11) |(1 0)(1 1)| 0

 1588 09:59:59.336855  3 1 20 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 1589 09:59:59.336915  3 1 24 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 1590 09:59:59.336974  3 1 28 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 1591 09:59:59.337033  3 2 0 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 1592 09:59:59.337093  3 2 4 |2c2b 3534  |(11 11)(11 11) |(1 0)(0 1)| 0

 1593 09:59:59.337153  3 2 8 |1313 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1594 09:59:59.337212  3 2 12 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

 1595 09:59:59.337272  3 2 16 |3534 707  |(11 11)(11 11) |(0 0)(1 1)| 0

 1596 09:59:59.337332  3 2 20 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 1597 09:59:59.337391  3 2 24 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 1598 09:59:59.337451  3 2 28 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 1599 09:59:59.337510  3 3 0 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 1600 09:59:59.337570  3 3 4 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1601 09:59:59.337630  3 3 8 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1602 09:59:59.337689  3 3 12 |3534 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1603 09:59:59.337748  3 3 16 |3534 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 1604 09:59:59.337808  3 3 20 |3534 403  |(11 11)(11 11) |(0 0)(1 1)| 0

 1605 09:59:59.337867  3 3 24 |3534 3534  |(11 11)(11 11) |(0 0)(1 1)| 0

 1606 09:59:59.337926  [Byte 1] Lead/lag falling Transition (3, 3, 24)

 1607 09:59:59.337985  3 3 28 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1608 09:59:59.338045  3 4 0 |3534 3534  |(11 11)(11 11) |(0 0)(0 1)| 0

 1609 09:59:59.338105  3 4 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1610 09:59:59.338164  3 4 8 |3534 3534  |(11 11)(11 11) |(0 1)(0 1)| 0

 1611 09:59:59.338223  3 4 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 1612 09:59:59.338282  3 4 16 |3d3d 3d3d  |(11 11)(10 10) |(1 1)(1 1)| 0

 1613 09:59:59.338342  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1614 09:59:59.338401  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1615 09:59:59.338460  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1616 09:59:59.338520  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1617 09:59:59.338579  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1618 09:59:59.338639  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1619 09:59:59.338698  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1620 09:59:59.338758  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1621 09:59:59.338817  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1622 09:59:59.338876  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1623 09:59:59.338935  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1624 09:59:59.338995  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 1625 09:59:59.339076  [Byte 0] Lead/lag falling Transition (3, 6, 0)

 1626 09:59:59.339334  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 1627 09:59:59.339401  [Byte 0] Lead/lag Transition tap number (2)

 1628 09:59:59.339486  [Byte 1] Lead/lag falling Transition (3, 6, 4)

 1629 09:59:59.339547  3 6 8 |b0b 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 1630 09:59:59.339608  [Byte 1] Lead/lag Transition tap number (2)

 1631 09:59:59.339668  3 6 12 |4646 3e3d  |(0 0)(11 11) |(0 0)(0 0)| 0

 1632 09:59:59.339728  [Byte 0]First pass (3, 6, 12)

 1633 09:59:59.339787  3 6 16 |4646 606  |(0 0)(11 11) |(0 0)(0 0)| 0

 1634 09:59:59.339848  3 6 20 |4646 4646  |(0 0)(10 10) |(0 0)(0 0)| 0

 1635 09:59:59.339908  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1636 09:59:59.339968  [Byte 1]First pass (3, 6, 24)

 1637 09:59:59.340026  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1638 09:59:59.340086  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1639 09:59:59.340145  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1640 09:59:59.340205  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1641 09:59:59.340265  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1642 09:59:59.340324  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1643 09:59:59.340384  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1644 09:59:59.340443  3 7 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 1645 09:59:59.340502  All bytes gating window > 1UI, Early break!

 1646 09:59:59.340561  

 1647 09:59:59.340618  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)

 1648 09:59:59.340677  

 1649 09:59:59.340735  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)

 1650 09:59:59.340793  

 1651 09:59:59.340851  

 1652 09:59:59.340909  

 1653 09:59:59.340966  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)

 1654 09:59:59.341025  

 1655 09:59:59.341083  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)

 1656 09:59:59.341141  

 1657 09:59:59.341199  

 1658 09:59:59.341257  Write Rank1 MR1 =0x56

 1659 09:59:59.341315  

 1660 09:59:59.341372  best RODT dly(2T, 0.5T) = (2, 3)

 1661 09:59:59.341431  

 1662 09:59:59.341494  best RODT dly(2T, 0.5T) = (2, 3)

 1663 09:59:59.341552  ==

 1664 09:59:59.341611  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1665 09:59:59.341669  fsp= 1, odt_onoff= 1, Byte mode= 0

 1666 09:59:59.341728  ==

 1667 09:59:59.341786  Start DQ dly to find pass range UseTestEngine =0

 1668 09:59:59.341851  x-axis: bit #, y-axis: DQ dly (-127~63)

 1669 09:59:59.341911  RX Vref Scan = 0

 1670 09:59:59.341976  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 1671 09:59:59.342037  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 1672 09:59:59.342097  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 1673 09:59:59.342156  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 1674 09:59:59.342216  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 1675 09:59:59.342277  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 1676 09:59:59.342336  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 1677 09:59:59.342395  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 1678 09:59:59.342455  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 1679 09:59:59.342514  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 1680 09:59:59.342573  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 1681 09:59:59.342633  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 1682 09:59:59.342693  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 1683 09:59:59.342753  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 1684 09:59:59.342811  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 1685 09:59:59.342870  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 1686 09:59:59.342930  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 1687 09:59:59.342989  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 1688 09:59:59.343048  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 1689 09:59:59.343107  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 1690 09:59:59.343166  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 1691 09:59:59.343224  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 1692 09:59:59.343283  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 1693 09:59:59.343343  -3, [0] xxxxxxxx oxxxxxxx [MSB]

 1694 09:59:59.343410  -2, [0] xxxoxxxx oxxoxxxx [MSB]

 1695 09:59:59.343487  -1, [0] xxxoxxxx oxxoxxxx [MSB]

 1696 09:59:59.343550  0, [0] xxxoxoxx oxxoxxxx [MSB]

 1697 09:59:59.343611  1, [0] xxxoxoxx ooxoooxx [MSB]

 1698 09:59:59.343670  2, [0] xxxoxoox ooxoooxx [MSB]

 1699 09:59:59.343733  3, [0] xoxooooo ooxoooox [MSB]

 1700 09:59:59.343794  4, [0] xoxooooo ooxoooox [MSB]

 1701 09:59:59.343854  5, [0] oooooooo ooxooooo [MSB]

 1702 09:59:59.343919  6, [0] oooooooo ooxooooo [MSB]

 1703 09:59:59.343979  33, [0] oooooooo xooooooo [MSB]

 1704 09:59:59.344038  34, [0] oooxoooo xooooooo [MSB]

 1705 09:59:59.344098  35, [0] oooxoooo xooooooo [MSB]

 1706 09:59:59.344157  36, [0] oooxoooo xooxoooo [MSB]

 1707 09:59:59.344216  37, [0] oooxoxoo xxoxoxoo [MSB]

 1708 09:59:59.344276  38, [0] oooxoxoo xxoxxxxo [MSB]

 1709 09:59:59.344339  39, [0] oooxoxox xxoxxxxo [MSB]

 1710 09:59:59.344400  40, [0] oooxoxxx xxoxxxxo [MSB]

 1711 09:59:59.344466  41, [0] oxxxoxxx xxoxxxxx [MSB]

 1712 09:59:59.344526  42, [0] oxxxxxxx xxoxxxxx [MSB]

 1713 09:59:59.344586  43, [0] xxxxxxxx xxoxxxxx [MSB]

 1714 09:59:59.344646  44, [0] xxxxxxxx xxoxxxxx [MSB]

 1715 09:59:59.344705  45, [0] xxxxxxxx xxxxxxxx [MSB]

 1716 09:59:59.344770  iDelay=45, Bit 0, Center 23 (5 ~ 42) 38

 1717 09:59:59.344832  iDelay=45, Bit 1, Center 21 (3 ~ 40) 38

 1718 09:59:59.344893  iDelay=45, Bit 2, Center 22 (5 ~ 40) 36

 1719 09:59:59.344951  iDelay=45, Bit 3, Center 15 (-2 ~ 33) 36

 1720 09:59:59.345010  iDelay=45, Bit 4, Center 22 (3 ~ 41) 39

 1721 09:59:59.345068  iDelay=45, Bit 5, Center 18 (0 ~ 36) 37

 1722 09:59:59.345126  iDelay=45, Bit 6, Center 20 (2 ~ 39) 38

 1723 09:59:59.345184  iDelay=45, Bit 7, Center 20 (3 ~ 38) 36

 1724 09:59:59.345246  iDelay=45, Bit 8, Center 14 (-3 ~ 32) 36

 1725 09:59:59.345305  iDelay=45, Bit 9, Center 18 (1 ~ 36) 36

 1726 09:59:59.345369  iDelay=45, Bit 10, Center 25 (7 ~ 44) 38

 1727 09:59:59.345428  iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38

 1728 09:59:59.345487  iDelay=45, Bit 12, Center 19 (1 ~ 37) 37

 1729 09:59:59.345545  iDelay=45, Bit 13, Center 18 (1 ~ 36) 36

 1730 09:59:59.345603  iDelay=45, Bit 14, Center 20 (3 ~ 37) 35

 1731 09:59:59.345661  iDelay=45, Bit 15, Center 22 (5 ~ 40) 36

 1732 09:59:59.345720  ==

 1733 09:59:59.345778  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1734 09:59:59.345837  fsp= 1, odt_onoff= 1, Byte mode= 0

 1735 09:59:59.345895  ==

 1736 09:59:59.345952  DQS Delay:

 1737 09:59:59.346010  DQS0 = 0, DQS1 = 0

 1738 09:59:59.346068  DQM Delay:

 1739 09:59:59.346125  DQM0 = 20, DQM1 = 19

 1740 09:59:59.346183  DQ Delay:

 1741 09:59:59.346241  DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15

 1742 09:59:59.346300  DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20

 1743 09:59:59.346359  DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =16

 1744 09:59:59.346417  DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22

 1745 09:59:59.346476  

 1746 09:59:59.346533  

 1747 09:59:59.346591  DramC Write-DBI off

 1748 09:59:59.346648  ==

 1749 09:59:59.346707  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1750 09:59:59.346766  fsp= 1, odt_onoff= 1, Byte mode= 0

 1751 09:59:59.346825  ==

 1752 09:59:59.346882  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 1753 09:59:59.346940  

 1754 09:59:59.347204  Begin, DQ Scan Range 921~1177

 1755 09:59:59.347317  

 1756 09:59:59.347441  

 1757 09:59:59.347518  	TX Vref Scan disable

 1758 09:59:59.347580  921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]

 1759 09:59:59.347642  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 1760 09:59:59.347703  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 1761 09:59:59.347764  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 1762 09:59:59.347824  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 1763 09:59:59.347885  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 1764 09:59:59.347944  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 1765 09:59:59.348004  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 1766 09:59:59.348064  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1767 09:59:59.348124  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 1768 09:59:59.348184  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 1769 09:59:59.348243  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 1770 09:59:59.348302  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 1771 09:59:59.348362  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 1772 09:59:59.348421  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 1773 09:59:59.348481  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 1774 09:59:59.348540  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 1775 09:59:59.348599  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 1776 09:59:59.348658  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 1777 09:59:59.348718  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 1778 09:59:59.348777  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 1779 09:59:59.348836  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 1780 09:59:59.348895  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 1781 09:59:59.348955  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 1782 09:59:59.349016  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 1783 09:59:59.349075  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 1784 09:59:59.349134  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 1785 09:59:59.349194  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 1786 09:59:59.349254  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 1787 09:59:59.349313  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 1788 09:59:59.349373  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 1789 09:59:59.349437  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 1790 09:59:59.349499  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 1791 09:59:59.349559  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 1792 09:59:59.349620  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 1793 09:59:59.349680  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 1794 09:59:59.349740  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 1795 09:59:59.349800  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 1796 09:59:59.349859  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 1797 09:59:59.349919  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 1798 09:59:59.349978  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 1799 09:59:59.350038  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 1800 09:59:59.350098  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 1801 09:59:59.350157  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 1802 09:59:59.350217  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 1803 09:59:59.350276  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 1804 09:59:59.350336  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 1805 09:59:59.350396  968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 1806 09:59:59.350456  969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 1807 09:59:59.350515  970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]

 1808 09:59:59.350575  971 |3 6 11|[0] xxxxxxxx ooxooxox [MSB]

 1809 09:59:59.350635  972 |3 6 12|[0] xxxxxxxx ooxooxox [MSB]

 1810 09:59:59.350694  973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]

 1811 09:59:59.350754  974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]

 1812 09:59:59.350813  975 |3 6 15|[0] xoxooooo oooooooo [MSB]

 1813 09:59:59.350873  976 |3 6 16|[0] xoxooooo oooooooo [MSB]

 1814 09:59:59.350932  990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]

 1815 09:59:59.350991  991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]

 1816 09:59:59.351051  992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]

 1817 09:59:59.351110  993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]

 1818 09:59:59.351170  Byte0, DQ PI dly=983, DQM PI dly= 983

 1819 09:59:59.351229  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)

 1820 09:59:59.351289  

 1821 09:59:59.351348  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)

 1822 09:59:59.351413  

 1823 09:59:59.351513  Byte1, DQ PI dly=980, DQM PI dly= 980

 1824 09:59:59.351610  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 1825 09:59:59.351707  

 1826 09:59:59.351803  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 1827 09:59:59.351898  

 1828 09:59:59.351992  ==

 1829 09:59:59.352090  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 1830 09:59:59.352187  fsp= 1, odt_onoff= 1, Byte mode= 0

 1831 09:59:59.352283  ==

 1832 09:59:59.352379  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 1833 09:59:59.352478  

 1834 09:59:59.352574  Begin, DQ Scan Range 956~1020

 1835 09:59:59.352670  Write Rank1 MR14 =0x0

 1836 09:59:59.352765  

 1837 09:59:59.352859  	CH=0, VrefRange= 0, VrefLevel = 0

 1838 09:59:59.352958  TX Bit0 (978~991) 14 984,   Bit8 (970~983) 14 976,

 1839 09:59:59.353054  TX Bit1 (977~989) 13 983,   Bit9 (972~986) 15 979,

 1840 09:59:59.353150  TX Bit2 (978~990) 13 984,   Bit10 (978~990) 13 984,

 1841 09:59:59.353248  TX Bit3 (972~983) 12 977,   Bit11 (972~984) 13 978,

 1842 09:59:59.353346  TX Bit4 (977~990) 14 983,   Bit12 (974~987) 14 980,

 1843 09:59:59.353442  TX Bit5 (975~986) 12 980,   Bit13 (976~983) 8 979,

 1844 09:59:59.353538  TX Bit6 (976~989) 14 982,   Bit14 (975~987) 13 981,

 1845 09:59:59.353637  TX Bit7 (976~990) 15 983,   Bit15 (977~990) 14 983,

 1846 09:59:59.353732  

 1847 09:59:59.353826  Write Rank1 MR14 =0x2

 1848 09:59:59.353921  

 1849 09:59:59.354017  	CH=0, VrefRange= 0, VrefLevel = 2

 1850 09:59:59.354113  TX Bit0 (978~992) 15 985,   Bit8 (970~984) 15 977,

 1851 09:59:59.354209  TX Bit1 (977~990) 14 983,   Bit9 (972~987) 16 979,

 1852 09:59:59.354307  TX Bit2 (978~991) 14 984,   Bit10 (978~990) 13 984,

 1853 09:59:59.354403  TX Bit3 (972~984) 13 978,   Bit11 (972~984) 13 978,

 1854 09:59:59.354499  TX Bit4 (976~990) 15 983,   Bit12 (974~987) 14 980,

 1855 09:59:59.354595  TX Bit5 (974~986) 13 980,   Bit13 (975~985) 11 980,

 1856 09:59:59.354693  TX Bit6 (976~990) 15 983,   Bit14 (975~989) 15 982,

 1857 09:59:59.354789  TX Bit7 (976~991) 16 983,   Bit15 (976~991) 16 983,

 1858 09:59:59.354883  

 1859 09:59:59.354979  Write Rank1 MR14 =0x4

 1860 09:59:59.355073  

 1861 09:59:59.355168  	CH=0, VrefRange= 0, VrefLevel = 4

 1862 09:59:59.355264  TX Bit0 (977~992) 16 984,   Bit8 (970~984) 15 977,

 1863 09:59:59.355362  TX Bit1 (977~991) 15 984,   Bit9 (972~988) 17 980,

 1864 09:59:59.355668  TX Bit2 (978~991) 14 984,   Bit10 (977~991) 15 984,

 1865 09:59:59.355770  TX Bit3 (971~985) 15 978,   Bit11 (971~985) 15 978,

 1866 09:59:59.355871  TX Bit4 (976~991) 16 983,   Bit12 (974~988) 15 981,

 1867 09:59:59.355969  TX Bit5 (973~988) 16 980,   Bit13 (975~986) 12 980,

 1868 09:59:59.356065  TX Bit6 (975~990) 16 982,   Bit14 (974~989) 16 981,

 1869 09:59:59.356163  TX Bit7 (975~991) 17 983,   Bit15 (976~991) 16 983,

 1870 09:59:59.356258  

 1871 09:59:59.356350  Write Rank1 MR14 =0x6

 1872 09:59:59.356444  

 1873 09:59:59.356535  	CH=0, VrefRange= 0, VrefLevel = 6

 1874 09:59:59.356629  TX Bit0 (977~993) 17 985,   Bit8 (969~985) 17 977,

 1875 09:59:59.356722  TX Bit1 (977~991) 15 984,   Bit9 (971~989) 19 980,

 1876 09:59:59.356814  TX Bit2 (978~991) 14 984,   Bit10 (977~992) 16 984,

 1877 09:59:59.356905  TX Bit3 (970~985) 16 977,   Bit11 (971~986) 16 978,

 1878 09:59:59.356997  TX Bit4 (976~991) 16 983,   Bit12 (973~989) 17 981,

 1879 09:59:59.357060  TX Bit5 (973~988) 16 980,   Bit13 (974~987) 14 980,

 1880 09:59:59.357119  TX Bit6 (975~990) 16 982,   Bit14 (974~989) 16 981,

 1881 09:59:59.357178  TX Bit7 (975~991) 17 983,   Bit15 (976~992) 17 984,

 1882 09:59:59.357237  

 1883 09:59:59.357295  Write Rank1 MR14 =0x8

 1884 09:59:59.357353  

 1885 09:59:59.357411  	CH=0, VrefRange= 0, VrefLevel = 8

 1886 09:59:59.357502  TX Bit0 (977~994) 18 985,   Bit8 (969~986) 18 977,

 1887 09:59:59.357614  TX Bit1 (976~991) 16 983,   Bit9 (971~989) 19 980,

 1888 09:59:59.357706  TX Bit2 (977~992) 16 984,   Bit10 (977~992) 16 984,

 1889 09:59:59.357768  TX Bit3 (970~986) 17 978,   Bit11 (970~987) 18 978,

 1890 09:59:59.357828  TX Bit4 (976~991) 16 983,   Bit12 (973~989) 17 981,

 1891 09:59:59.357887  TX Bit5 (972~990) 19 981,   Bit13 (974~987) 14 980,

 1892 09:59:59.357946  TX Bit6 (974~991) 18 982,   Bit14 (974~990) 17 982,

 1893 09:59:59.358006  TX Bit7 (975~992) 18 983,   Bit15 (975~992) 18 983,

 1894 09:59:59.358064  

 1895 09:59:59.358122  Write Rank1 MR14 =0xa

 1896 09:59:59.358181  

 1897 09:59:59.358239  	CH=0, VrefRange= 0, VrefLevel = 10

 1898 09:59:59.358298  TX Bit0 (977~994) 18 985,   Bit8 (969~986) 18 977,

 1899 09:59:59.358357  TX Bit1 (976~992) 17 984,   Bit9 (971~989) 19 980,

 1900 09:59:59.358416  TX Bit2 (977~993) 17 985,   Bit10 (976~993) 18 984,

 1901 09:59:59.358475  TX Bit3 (970~987) 18 978,   Bit11 (970~987) 18 978,

 1902 09:59:59.358534  TX Bit4 (975~992) 18 983,   Bit12 (972~990) 19 981,

 1903 09:59:59.358594  TX Bit5 (972~990) 19 981,   Bit13 (974~989) 16 981,

 1904 09:59:59.358654  TX Bit6 (974~991) 18 982,   Bit14 (973~990) 18 981,

 1905 09:59:59.358712  TX Bit7 (975~992) 18 983,   Bit15 (976~993) 18 984,

 1906 09:59:59.358771  

 1907 09:59:59.358829  Write Rank1 MR14 =0xc

 1908 09:59:59.358886  

 1909 09:59:59.358944  	CH=0, VrefRange= 0, VrefLevel = 12

 1910 09:59:59.359003  TX Bit0 (977~995) 19 986,   Bit8 (969~987) 19 978,

 1911 09:59:59.359069  TX Bit1 (976~992) 17 984,   Bit9 (970~990) 21 980,

 1912 09:59:59.359129  TX Bit2 (977~993) 17 985,   Bit10 (976~994) 19 985,

 1913 09:59:59.359189  TX Bit3 (970~988) 19 979,   Bit11 (969~988) 20 978,

 1914 09:59:59.359248  TX Bit4 (975~992) 18 983,   Bit12 (972~990) 19 981,

 1915 09:59:59.359307  TX Bit5 (971~990) 20 980,   Bit13 (973~989) 17 981,

 1916 09:59:59.359366  TX Bit6 (973~992) 20 982,   Bit14 (972~990) 19 981,

 1917 09:59:59.359436  TX Bit7 (974~993) 20 983,   Bit15 (975~993) 19 984,

 1918 09:59:59.359496  

 1919 09:59:59.359554  Write Rank1 MR14 =0xe

 1920 09:59:59.359612  

 1921 09:59:59.359671  	CH=0, VrefRange= 0, VrefLevel = 14

 1922 09:59:59.359731  TX Bit0 (977~995) 19 986,   Bit8 (969~988) 20 978,

 1923 09:59:59.359790  TX Bit1 (976~993) 18 984,   Bit9 (970~990) 21 980,

 1924 09:59:59.359848  TX Bit2 (977~993) 17 985,   Bit10 (976~995) 20 985,

 1925 09:59:59.359907  TX Bit3 (969~989) 21 979,   Bit11 (969~989) 21 979,

 1926 09:59:59.359965  TX Bit4 (975~993) 19 984,   Bit12 (971~990) 20 980,

 1927 09:59:59.360024  TX Bit5 (971~991) 21 981,   Bit13 (973~989) 17 981,

 1928 09:59:59.360083  TX Bit6 (973~992) 20 982,   Bit14 (972~991) 20 981,

 1929 09:59:59.360142  TX Bit7 (974~993) 20 983,   Bit15 (975~994) 20 984,

 1930 09:59:59.360201  

 1931 09:59:59.360259  Write Rank1 MR14 =0x10

 1932 09:59:59.360318  

 1933 09:59:59.360375  	CH=0, VrefRange= 0, VrefLevel = 16

 1934 09:59:59.360434  TX Bit0 (976~996) 21 986,   Bit8 (968~989) 22 978,

 1935 09:59:59.360493  TX Bit1 (976~993) 18 984,   Bit9 (970~990) 21 980,

 1936 09:59:59.360551  TX Bit2 (977~994) 18 985,   Bit10 (975~995) 21 985,

 1937 09:59:59.360610  TX Bit3 (969~989) 21 979,   Bit11 (969~989) 21 979,

 1938 09:59:59.360668  TX Bit4 (974~994) 21 984,   Bit12 (971~991) 21 981,

 1939 09:59:59.360728  TX Bit5 (971~991) 21 981,   Bit13 (972~989) 18 980,

 1940 09:59:59.360788  TX Bit6 (973~992) 20 982,   Bit14 (972~991) 20 981,

 1941 09:59:59.360846  TX Bit7 (974~994) 21 984,   Bit15 (975~995) 21 985,

 1942 09:59:59.360905  

 1943 09:59:59.360962  Write Rank1 MR14 =0x12

 1944 09:59:59.361020  

 1945 09:59:59.361077  	CH=0, VrefRange= 0, VrefLevel = 18

 1946 09:59:59.361135  TX Bit0 (976~996) 21 986,   Bit8 (968~989) 22 978,

 1947 09:59:59.361194  TX Bit1 (975~994) 20 984,   Bit9 (969~991) 23 980,

 1948 09:59:59.361253  TX Bit2 (977~995) 19 986,   Bit10 (975~996) 22 985,

 1949 09:59:59.361311  TX Bit3 (969~990) 22 979,   Bit11 (969~989) 21 979,

 1950 09:59:59.361370  TX Bit4 (974~994) 21 984,   Bit12 (970~991) 22 980,

 1951 09:59:59.361429  TX Bit5 (971~991) 21 981,   Bit13 (972~990) 19 981,

 1952 09:59:59.361488  TX Bit6 (972~993) 22 982,   Bit14 (971~992) 22 981,

 1953 09:59:59.361547  TX Bit7 (974~994) 21 984,   Bit15 (974~995) 22 984,

 1954 09:59:59.361606  

 1955 09:59:59.361672  Write Rank1 MR14 =0x14

 1956 09:59:59.361732  

 1957 09:59:59.361790  	CH=0, VrefRange= 0, VrefLevel = 20

 1958 09:59:59.361849  TX Bit0 (976~997) 22 986,   Bit8 (968~990) 23 979,

 1959 09:59:59.361908  TX Bit1 (975~995) 21 985,   Bit9 (969~991) 23 980,

 1960 09:59:59.361967  TX Bit2 (976~996) 21 986,   Bit10 (975~996) 22 985,

 1961 09:59:59.362026  TX Bit3 (969~990) 22 979,   Bit11 (968~990) 23 979,

 1962 09:59:59.362085  TX Bit4 (974~995) 22 984,   Bit12 (970~991) 22 980,

 1963 09:59:59.362337  TX Bit5 (970~992) 23 981,   Bit13 (971~990) 20 980,

 1964 09:59:59.362405  TX Bit6 (971~993) 23 982,   Bit14 (971~992) 22 981,

 1965 09:59:59.362466  TX Bit7 (973~995) 23 984,   Bit15 (974~996) 23 985,

 1966 09:59:59.362525  

 1967 09:59:59.362583  Write Rank1 MR14 =0x16

 1968 09:59:59.362641  

 1969 09:59:59.362699  	CH=0, VrefRange= 0, VrefLevel = 22

 1970 09:59:59.362757  TX Bit0 (976~998) 23 987,   Bit8 (968~990) 23 979,

 1971 09:59:59.362817  TX Bit1 (974~995) 22 984,   Bit9 (969~992) 24 980,

 1972 09:59:59.362876  TX Bit2 (976~996) 21 986,   Bit10 (975~997) 23 986,

 1973 09:59:59.362935  TX Bit3 (969~991) 23 980,   Bit11 (968~990) 23 979,

 1974 09:59:59.362994  TX Bit4 (973~995) 23 984,   Bit12 (970~992) 23 981,

 1975 09:59:59.668451  TX Bit5 (970~992) 23 981,   Bit13 (971~991) 21 981,

 1976 09:59:59.668980  TX Bit6 (971~994) 24 982,   Bit14 (970~992) 23 981,

 1977 09:59:59.669342  TX Bit7 (972~995) 24 983,   Bit15 (974~997) 24 985,

 1978 09:59:59.669680  

 1979 09:59:59.670003  Write Rank1 MR14 =0x18

 1980 09:59:59.670321  

 1981 09:59:59.670633  	CH=0, VrefRange= 0, VrefLevel = 24

 1982 09:59:59.670946  TX Bit0 (976~998) 23 987,   Bit8 (968~990) 23 979,

 1983 09:59:59.671256  TX Bit1 (974~996) 23 985,   Bit9 (969~992) 24 980,

 1984 09:59:59.671594  TX Bit2 (976~997) 22 986,   Bit10 (975~997) 23 986,

 1985 09:59:59.671947  TX Bit3 (969~991) 23 980,   Bit11 (968~990) 23 979,

 1986 09:59:59.672285  TX Bit4 (973~996) 24 984,   Bit12 (969~993) 25 981,

 1987 09:59:59.672590  TX Bit5 (970~992) 23 981,   Bit13 (971~991) 21 981,

 1988 09:59:59.672979  TX Bit6 (971~994) 24 982,   Bit14 (970~993) 24 981,

 1989 09:59:59.673380  TX Bit7 (972~996) 25 984,   Bit15 (974~997) 24 985,

 1990 09:59:59.673735  

 1991 09:59:59.674028  Write Rank1 MR14 =0x1a

 1992 09:59:59.674309  

 1993 09:59:59.674584  	CH=0, VrefRange= 0, VrefLevel = 26

 1994 09:59:59.674863  TX Bit0 (975~998) 24 986,   Bit8 (967~990) 24 978,

 1995 09:59:59.675140  TX Bit1 (974~996) 23 985,   Bit9 (969~993) 25 981,

 1996 09:59:59.675533  TX Bit2 (976~997) 22 986,   Bit10 (974~998) 25 986,

 1997 09:59:59.675843  TX Bit3 (968~991) 24 979,   Bit11 (968~991) 24 979,

 1998 09:59:59.676123  TX Bit4 (972~996) 25 984,   Bit12 (969~993) 25 981,

 1999 09:59:59.676397  TX Bit5 (970~993) 24 981,   Bit13 (970~991) 22 980,

 2000 09:59:59.676672  TX Bit6 (971~995) 25 983,   Bit14 (969~994) 26 981,

 2001 09:59:59.676949  TX Bit7 (972~996) 25 984,   Bit15 (974~997) 24 985,

 2002 09:59:59.677223  

 2003 09:59:59.677493  Write Rank1 MR14 =0x1c

 2004 09:59:59.677768  

 2005 09:59:59.678037  	CH=0, VrefRange= 0, VrefLevel = 28

 2006 09:59:59.678324  TX Bit0 (975~998) 24 986,   Bit8 (967~991) 25 979,

 2007 09:59:59.678611  TX Bit1 (973~997) 25 985,   Bit9 (968~992) 25 980,

 2008 09:59:59.678907  TX Bit2 (975~998) 24 986,   Bit10 (974~998) 25 986,

 2009 09:59:59.679181  TX Bit3 (968~991) 24 979,   Bit11 (968~991) 24 979,

 2010 09:59:59.679489  TX Bit4 (972~997) 26 984,   Bit12 (969~994) 26 981,

 2011 09:59:59.679774  TX Bit5 (970~993) 24 981,   Bit13 (970~992) 23 981,

 2012 09:59:59.680049  TX Bit6 (971~995) 25 983,   Bit14 (969~994) 26 981,

 2013 09:59:59.680323  TX Bit7 (971~997) 27 984,   Bit15 (973~997) 25 985,

 2014 09:59:59.680593  

 2015 09:59:59.680860  Write Rank1 MR14 =0x1e

 2016 09:59:59.681130  

 2017 09:59:59.681401  	CH=0, VrefRange= 0, VrefLevel = 30

 2018 09:59:59.681671  TX Bit0 (974~999) 26 986,   Bit8 (967~991) 25 979,

 2019 09:59:59.681982  TX Bit1 (973~998) 26 985,   Bit9 (969~992) 24 980,

 2020 09:59:59.682301  TX Bit2 (975~998) 24 986,   Bit10 (974~998) 25 986,

 2021 09:59:59.682587  TX Bit3 (968~992) 25 980,   Bit11 (968~991) 24 979,

 2022 09:59:59.682883  TX Bit4 (971~997) 27 984,   Bit12 (969~993) 25 981,

 2023 09:59:59.683164  TX Bit5 (969~994) 26 981,   Bit13 (970~992) 23 981,

 2024 09:59:59.683461  TX Bit6 (970~996) 27 983,   Bit14 (969~994) 26 981,

 2025 09:59:59.683744  TX Bit7 (971~998) 28 984,   Bit15 (973~998) 26 985,

 2026 09:59:59.684019  

 2027 09:59:59.684291  Write Rank1 MR14 =0x20

 2028 09:59:59.684558  

 2029 09:59:59.684827  	CH=0, VrefRange= 0, VrefLevel = 32

 2030 09:59:59.685116  TX Bit0 (974~999) 26 986,   Bit8 (967~991) 25 979,

 2031 09:59:59.685413  TX Bit1 (973~998) 26 985,   Bit9 (969~992) 24 980,

 2032 09:59:59.685704  TX Bit2 (975~998) 24 986,   Bit10 (974~998) 25 986,

 2033 09:59:59.686025  TX Bit3 (968~992) 25 980,   Bit11 (967~991) 25 979,

 2034 09:59:59.686305  TX Bit4 (972~998) 27 985,   Bit12 (969~993) 25 981,

 2035 09:59:59.686607  TX Bit5 (969~994) 26 981,   Bit13 (969~993) 25 981,

 2036 09:59:59.686882  TX Bit6 (970~997) 28 983,   Bit14 (969~994) 26 981,

 2037 09:59:59.687181  TX Bit7 (972~998) 27 985,   Bit15 (973~997) 25 985,

 2038 09:59:59.687492  

 2039 09:59:59.687788  Write Rank1 MR14 =0x22

 2040 09:59:59.688075  

 2041 09:59:59.688370  	CH=0, VrefRange= 0, VrefLevel = 34

 2042 09:59:59.688664  TX Bit0 (974~999) 26 986,   Bit8 (967~991) 25 979,

 2043 09:59:59.688943  TX Bit1 (973~998) 26 985,   Bit9 (969~992) 24 980,

 2044 09:59:59.689217  TX Bit2 (975~998) 24 986,   Bit10 (974~998) 25 986,

 2045 09:59:59.689491  TX Bit3 (968~992) 25 980,   Bit11 (967~991) 25 979,

 2046 09:59:59.689762  TX Bit4 (972~998) 27 985,   Bit12 (969~993) 25 981,

 2047 09:59:59.690035  TX Bit5 (969~994) 26 981,   Bit13 (969~993) 25 981,

 2048 09:59:59.690309  TX Bit6 (970~997) 28 983,   Bit14 (969~994) 26 981,

 2049 09:59:59.690581  TX Bit7 (972~998) 27 985,   Bit15 (973~997) 25 985,

 2050 09:59:59.690853  

 2051 09:59:59.691124  Write Rank1 MR14 =0x24

 2052 09:59:59.691396  

 2053 09:59:59.691695  	CH=0, VrefRange= 0, VrefLevel = 36

 2054 09:59:59.692091  TX Bit0 (974~999) 26 986,   Bit8 (967~991) 25 979,

 2055 09:59:59.692542  TX Bit1 (973~998) 26 985,   Bit9 (969~992) 24 980,

 2056 09:59:59.692843  TX Bit2 (975~998) 24 986,   Bit10 (974~998) 25 986,

 2057 09:59:59.693122  TX Bit3 (968~992) 25 980,   Bit11 (967~991) 25 979,

 2058 09:59:59.693396  TX Bit4 (972~998) 27 985,   Bit12 (969~993) 25 981,

 2059 09:59:59.693669  TX Bit5 (969~994) 26 981,   Bit13 (969~993) 25 981,

 2060 09:59:59.693942  TX Bit6 (970~997) 28 983,   Bit14 (969~994) 26 981,

 2061 09:59:59.694220  TX Bit7 (972~998) 27 985,   Bit15 (973~997) 25 985,

 2062 09:59:59.694515  

 2063 09:59:59.694802  

 2064 09:59:59.695071  TX Vref found, early break! 387< 388

 2065 09:59:59.695795  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps

 2066 09:59:59.696125  u1DelayCellOfst[0]=7 cells (6 PI)

 2067 09:59:59.696406  u1DelayCellOfst[1]=6 cells (5 PI)

 2068 09:59:59.696679  u1DelayCellOfst[2]=7 cells (6 PI)

 2069 09:59:59.696965  u1DelayCellOfst[3]=0 cells (0 PI)

 2070 09:59:59.697160  u1DelayCellOfst[4]=6 cells (5 PI)

 2071 09:59:59.697355  u1DelayCellOfst[5]=1 cells (1 PI)

 2072 09:59:59.697548  u1DelayCellOfst[6]=3 cells (3 PI)

 2073 09:59:59.697741  u1DelayCellOfst[7]=6 cells (5 PI)

 2074 09:59:59.697933  Byte0, DQ PI dly=980, DQM PI dly= 983

 2075 09:59:59.698126  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 2076 09:59:59.698320  

 2077 09:59:59.698514  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 2078 09:59:59.698727  

 2079 09:59:59.698936  u1DelayCellOfst[8]=0 cells (0 PI)

 2080 09:59:59.699134  u1DelayCellOfst[9]=1 cells (1 PI)

 2081 09:59:59.699329  u1DelayCellOfst[10]=9 cells (7 PI)

 2082 09:59:59.699588  u1DelayCellOfst[11]=0 cells (0 PI)

 2083 09:59:59.699789  u1DelayCellOfst[12]=2 cells (2 PI)

 2084 09:59:59.699982  u1DelayCellOfst[13]=2 cells (2 PI)

 2085 09:59:59.700180  u1DelayCellOfst[14]=2 cells (2 PI)

 2086 09:59:59.700374  u1DelayCellOfst[15]=7 cells (6 PI)

 2087 09:59:59.700570  Byte1, DQ PI dly=979, DQM PI dly= 982

 2088 09:59:59.700766  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 2089 09:59:59.700963  

 2090 09:59:59.701156  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 2091 09:59:59.701354  

 2092 09:59:59.701548  Write Rank1 MR14 =0x20

 2093 09:59:59.701743  

 2094 09:59:59.701937  Final TX Range 0 Vref 32

 2095 09:59:59.702123  

 2096 09:59:59.702286  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2097 09:59:59.702448  

 2098 09:59:59.702604  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2099 09:59:59.702764  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2100 09:59:59.702912  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2101 09:59:59.703093  Write Rank1 MR3 =0xb0

 2102 09:59:59.703326  DramC Write-DBI on

 2103 09:59:59.703571  ==

 2104 09:59:59.703728  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2105 09:59:59.703880  fsp= 1, odt_onoff= 1, Byte mode= 0

 2106 09:59:59.704029  ==

 2107 09:59:59.704186  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2108 09:59:59.704338  

 2109 09:59:59.704510  Begin, DQ Scan Range 702~766

 2110 09:59:59.704721  

 2111 09:59:59.704960  

 2112 09:59:59.705197  	TX Vref Scan disable

 2113 09:59:59.705460  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2114 09:59:59.705706  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2115 09:59:59.705939  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2116 09:59:59.706203  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2117 09:59:59.706464  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2118 09:59:59.706718  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2119 09:59:59.706996  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2120 09:59:59.707236  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2121 09:59:59.707470  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2122 09:59:59.707667  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2123 09:59:59.707857  712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]

 2124 09:59:59.708006  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 2125 09:59:59.708169  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2126 09:59:59.708372  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 2127 09:59:59.708561  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2128 09:59:59.708770  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2129 09:59:59.708980  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2130 09:59:59.709173  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2131 09:59:59.709363  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2132 09:59:59.709505  743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2133 09:59:59.709679  Byte0, DQ PI dly=728, DQM PI dly= 728

 2134 09:59:59.709883  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)

 2135 09:59:59.710068  

 2136 09:59:59.710255  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)

 2137 09:59:59.710438  

 2138 09:59:59.710620  Byte1, DQ PI dly=724, DQM PI dly= 724

 2139 09:59:59.710822  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)

 2140 09:59:59.710982  

 2141 09:59:59.711106  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)

 2142 09:59:59.711226  

 2143 09:59:59.711344  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 2144 09:59:59.711519  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2145 09:59:59.711647  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2146 09:59:59.711769  wait MRW command Rank1 MR3 =0x30 fired (1)

 2147 09:59:59.711890  Write Rank1 MR3 =0x30

 2148 09:59:59.712031  DramC Write-DBI off

 2149 09:59:59.712133  

 2150 09:59:59.712240  [DATLAT]

 2151 09:59:59.712341  Freq=1600, CH0 RK1, use_rxtx_scan=0

 2152 09:59:59.712441  

 2153 09:59:59.712539  DATLAT Default: 0x10

 2154 09:59:59.712637  7, 0xFFFF, sum=0

 2155 09:59:59.712737  8, 0xFFFF, sum=0

 2156 09:59:59.712837  9, 0xFFFF, sum=0

 2157 09:59:59.712936  10, 0xFFFF, sum=0

 2158 09:59:59.713037  11, 0xFFFF, sum=0

 2159 09:59:59.713137  12, 0xFFFF, sum=0

 2160 09:59:59.713238  13, 0xFFFF, sum=0

 2161 09:59:59.713339  14, 0x0, sum=1

 2162 09:59:59.713439  15, 0x0, sum=2

 2163 09:59:59.713538  16, 0x0, sum=3

 2164 09:59:59.713638  17, 0x0, sum=4

 2165 09:59:59.713740  pattern=2 first_step=14 total pass=5 best_step=16

 2166 09:59:59.713866  ==

 2167 09:59:59.713996  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2168 09:59:59.714102  fsp= 1, odt_onoff= 1, Byte mode= 0

 2169 09:59:59.714220  ==

 2170 09:59:59.714320  Start DQ dly to find pass range UseTestEngine =1

 2171 09:59:59.714438  x-axis: bit #, y-axis: DQ dly (-127~63)

 2172 09:59:59.714610  RX Vref Scan = 0

 2173 09:59:59.714764  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2174 09:59:59.714920  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2175 09:59:59.715075  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2176 09:59:59.715230  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2177 09:59:59.715391  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2178 09:59:59.715569  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2179 09:59:59.715730  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2180 09:59:59.715890  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2181 09:59:59.716054  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2182 09:59:59.716211  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2183 09:59:59.716365  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2184 09:59:59.716544  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2185 09:59:59.716717  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2186 09:59:59.716877  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2187 09:59:59.717043  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2188 09:59:59.717184  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2189 09:59:59.717331  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2190 09:59:59.717465  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2191 09:59:59.717599  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2192 09:59:59.717962  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2193 09:59:59.718104  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2194 09:59:59.718238  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2195 09:59:59.718371  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 2196 09:59:59.718504  -3, [0] xxxxxxxx xxxxxxxx [MSB]

 2197 09:59:59.718636  -2, [0] xxxoxxxx oxxoxxxx [MSB]

 2198 09:59:59.718754  -1, [0] xxxoxxxx oxxoxxxx [MSB]

 2199 09:59:59.718887  0, [0] xxxoxxxx oxxoxxxx [MSB]

 2200 09:59:59.719020  1, [0] xxxoxoxx ooxooxxx [MSB]

 2201 09:59:59.719144  2, [0] xxxoxoxx ooxoooxx [MSB]

 2202 09:59:59.719234  3, [0] xxxoxooo ooxoooox [MSB]

 2203 09:59:59.719321  4, [0] xxxoxooo ooxoooox [MSB]

 2204 09:59:59.719422  5, [0] xoxooooo ooxoooox [MSB]

 2205 09:59:59.719514  6, [0] oooooooo ooxooooo [MSB]

 2206 09:59:59.719600  33, [0] oooooooo xooooooo [MSB]

 2207 09:59:59.719686  34, [0] oooxoooo xooooooo [MSB]

 2208 09:59:59.719772  35, [0] oooxoxoo xooxoooo [MSB]

 2209 09:59:59.719859  36, [0] oooxoxoo xooxoxoo [MSB]

 2210 09:59:59.719945  37, [0] oooxoxoo xxoxoxoo [MSB]

 2211 09:59:59.720032  38, [0] oooxoxxo xxoxxxxo [MSB]

 2212 09:59:59.720118  39, [0] oxxxoxxx xxoxxxxo [MSB]

 2213 09:59:59.720204  40, [0] oxxxxxxx xxoxxxxx [MSB]

 2214 09:59:59.720290  41, [0] xxxxxxxx xxoxxxxx [MSB]

 2215 09:59:59.720376  42, [0] xxxxxxxx xxoxxxxx [MSB]

 2216 09:59:59.720462  43, [0] xxxxxxxx xxoxxxxx [MSB]

 2217 09:59:59.720548  44, [0] xxxxxxxx xxxxxxxx [MSB]

 2218 09:59:59.720634  iDelay=44, Bit 0, Center 23 (6 ~ 40) 35

 2219 09:59:59.720718  iDelay=44, Bit 1, Center 21 (5 ~ 38) 34

 2220 09:59:59.720803  iDelay=44, Bit 2, Center 22 (6 ~ 38) 33

 2221 09:59:59.720889  iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36

 2222 09:59:59.720975  iDelay=44, Bit 4, Center 22 (5 ~ 39) 35

 2223 09:59:59.721058  iDelay=44, Bit 5, Center 17 (1 ~ 34) 34

 2224 09:59:59.721142  iDelay=44, Bit 6, Center 20 (3 ~ 37) 35

 2225 09:59:59.721226  iDelay=44, Bit 7, Center 20 (3 ~ 38) 36

 2226 09:59:59.721309  iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35

 2227 09:59:59.721393  iDelay=44, Bit 9, Center 18 (1 ~ 36) 36

 2228 09:59:59.721476  iDelay=44, Bit 10, Center 25 (7 ~ 43) 37

 2229 09:59:59.721560  iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37

 2230 09:59:59.721643  iDelay=44, Bit 12, Center 19 (1 ~ 37) 37

 2231 09:59:59.721728  iDelay=44, Bit 13, Center 18 (2 ~ 35) 34

 2232 09:59:59.721822  iDelay=44, Bit 14, Center 20 (3 ~ 37) 35

 2233 09:59:59.721957  iDelay=44, Bit 15, Center 22 (6 ~ 39) 34

 2234 09:59:59.722086  ==

 2235 09:59:59.722201  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1

 2236 09:59:59.722315  fsp= 1, odt_onoff= 1, Byte mode= 0

 2237 09:59:59.722429  ==

 2238 09:59:59.722543  DQS Delay:

 2239 09:59:59.722655  DQS0 = 0, DQS1 = 0

 2240 09:59:59.722769  DQM Delay:

 2241 09:59:59.722891  DQM0 = 20, DQM1 = 19

 2242 09:59:59.722972  DQ Delay:

 2243 09:59:59.723047  DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15

 2244 09:59:59.723121  DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20

 2245 09:59:59.723194  DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16

 2246 09:59:59.723269  DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22

 2247 09:59:59.723349  

 2248 09:59:59.723454  

 2249 09:59:59.723534  

 2250 09:59:59.723609  [DramC_TX_OE_Calibration] TA2

 2251 09:59:59.723685  Original DQ_B0 (3 6) =30, OEN = 27

 2252 09:59:59.723760  Original DQ_B1 (3 6) =30, OEN = 27

 2253 09:59:59.723835  23, 0x0, End_B0=23 End_B1=23

 2254 09:59:59.723920  24, 0x0, End_B0=24 End_B1=24

 2255 09:59:59.724042  25, 0x0, End_B0=25 End_B1=25

 2256 09:59:59.724173  26, 0x0, End_B0=26 End_B1=26

 2257 09:59:59.724304  27, 0x0, End_B0=27 End_B1=27

 2258 09:59:59.724432  28, 0x0, End_B0=28 End_B1=28

 2259 09:59:59.724557  29, 0x0, End_B0=29 End_B1=29

 2260 09:59:59.724684  30, 0x0, End_B0=30 End_B1=30

 2261 09:59:59.724815  31, 0xFFFF, End_B0=30 End_B1=30

 2262 09:59:59.724941  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2263 09:59:59.725061  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 2264 09:59:59.725188  

 2265 09:59:59.725309  

 2266 09:59:59.725406  Write Rank1 MR23 =0x3f

 2267 09:59:59.725492  [DQSOSC]

 2268 09:59:59.725567  [DQSOSCAuto] RK1, (LSB)MR18= 0xdada, (MSB)MR19= 0x202, tDQSOscB0 = 431 ps tDQSOscB1 = 431 ps

 2269 09:59:59.725644  CH0_RK1: MR19=0x202, MR18=0xDADA, DQSOSC=431, MR23=63, INC=13, DEC=19

 2270 09:59:59.725719  Write Rank1 MR23 =0x3f

 2271 09:59:59.725794  [DQSOSC]

 2272 09:59:59.725868  [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps

 2273 09:59:59.725943  CH0 RK1: MR19=202, MR18=D9D9

 2274 09:59:59.726017  [RxdqsGatingPostProcess] freq 1600

 2275 09:59:59.726092  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 2276 09:59:59.726166  Rank: 0

 2277 09:59:59.726240  best DQS0 dly(2T, 0.5T) = (2, 5)

 2278 09:59:59.726314  best DQS1 dly(2T, 0.5T) = (2, 5)

 2279 09:59:59.726387  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 2280 09:59:59.726461  best DQS1 P1 dly(2T, 0.5T) = (3, 1)

 2281 09:59:59.726535  Rank: 1

 2282 09:59:59.726608  best DQS0 dly(2T, 0.5T) = (2, 6)

 2283 09:59:59.726682  best DQS1 dly(2T, 0.5T) = (2, 6)

 2284 09:59:59.726756  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 2285 09:59:59.726829  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 2286 09:59:59.726903  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 2287 09:59:59.726978  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 2288 09:59:59.727057  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 2289 09:59:59.727123  Write Rank0 MR13 =0x59

 2290 09:59:59.727189  ==

 2291 09:59:59.727255  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2292 09:59:59.727322  fsp= 1, odt_onoff= 1, Byte mode= 0

 2293 09:59:59.727387  ==

 2294 09:59:59.727471  === u2Vref_new: 0x56 --> 0x3a

 2295 09:59:59.727539  === u2Vref_new: 0x58 --> 0x58

 2296 09:59:59.727605  === u2Vref_new: 0x5a --> 0x5a

 2297 09:59:59.727670  === u2Vref_new: 0x5c --> 0x78

 2298 09:59:59.727737  === u2Vref_new: 0x5e --> 0x7a

 2299 09:59:59.727802  === u2Vref_new: 0x60 --> 0x90

 2300 09:59:59.727868  [CA 0] Center 38 (13~63) winsize 51

 2301 09:59:59.727935  [CA 1] Center 37 (12~63) winsize 52

 2302 09:59:59.728001  [CA 2] Center 34 (6~63) winsize 58

 2303 09:59:59.728071  [CA 3] Center 35 (7~63) winsize 57

 2304 09:59:59.728138  [CA 4] Center 34 (6~63) winsize 58

 2305 09:59:59.728209  [CA 5] Center 28 (-2~58) winsize 61

 2306 09:59:59.728279  

 2307 09:59:59.728345  [CATrainingPosCal] consider 1 rank data

 2308 09:59:59.728410  u2DelayCellTimex100 = 735/100 ps

 2309 09:59:59.728487  CA0 delay=38 (13~63),Diff = 10 PI (13 cell)

 2310 09:59:59.728563  CA1 delay=37 (12~63),Diff = 9 PI (11 cell)

 2311 09:59:59.728666  CA2 delay=34 (6~63),Diff = 6 PI (7 cell)

 2312 09:59:59.728770  CA3 delay=35 (7~63),Diff = 7 PI (9 cell)

 2313 09:59:59.728873  CA4 delay=34 (6~63),Diff = 6 PI (7 cell)

 2314 09:59:59.729175  CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)

 2315 09:59:59.729282  

 2316 09:59:59.729385  CA PerBit enable=1, Macro0, CA PI delay=28

 2317 09:59:59.729487  === u2Vref_new: 0x5c --> 0x78

 2318 09:59:59.729589  

 2319 09:59:59.729701  Vref(ca) range 1: 28

 2320 09:59:59.729809  

 2321 09:59:59.729919  CS Dly= 11 (42-0-32)

 2322 09:59:59.730021  Write Rank0 MR13 =0xd8

 2323 09:59:59.730122  Write Rank0 MR13 =0xd8

 2324 09:59:59.730223  Write Rank0 MR12 =0x5c

 2325 09:59:59.730311  Write Rank1 MR13 =0x59

 2326 09:59:59.730414  ==

 2327 09:59:59.730517  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 2328 09:59:59.730620  fsp= 1, odt_onoff= 1, Byte mode= 0

 2329 09:59:59.730721  ==

 2330 09:59:59.730823  === u2Vref_new: 0x56 --> 0x3a

 2331 09:59:59.732176  === u2Vref_new: 0x58 --> 0x58

 2332 09:59:59.735362  === u2Vref_new: 0x5a --> 0x5a

 2333 09:59:59.738535  === u2Vref_new: 0x5c --> 0x78

 2334 09:59:59.741900  === u2Vref_new: 0x5e --> 0x7a

 2335 09:59:59.745595  === u2Vref_new: 0x60 --> 0x90

 2336 09:59:59.749255  [CA 0] Center 37 (12~63) winsize 52

 2337 09:59:59.752633  [CA 1] Center 37 (12~63) winsize 52

 2338 09:59:59.755819  [CA 2] Center 34 (6~63) winsize 58

 2339 09:59:59.759472  [CA 3] Center 34 (6~63) winsize 58

 2340 09:59:59.762692  [CA 4] Center 34 (6~63) winsize 58

 2341 09:59:59.765941  [CA 5] Center 28 (-2~58) winsize 61

 2342 09:59:59.766109  

 2343 09:59:59.769038  [CATrainingPosCal] consider 2 rank data

 2344 09:59:59.772658  u2DelayCellTimex100 = 735/100 ps

 2345 09:59:59.775995  CA0 delay=38 (13~63),Diff = 10 PI (13 cell)

 2346 09:59:59.779332  CA1 delay=37 (12~63),Diff = 9 PI (11 cell)

 2347 09:59:59.782546  CA2 delay=34 (6~63),Diff = 6 PI (7 cell)

 2348 09:59:59.785875  CA3 delay=35 (7~63),Diff = 7 PI (9 cell)

 2349 09:59:59.789168  CA4 delay=34 (6~63),Diff = 6 PI (7 cell)

 2350 09:59:59.792226  CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)

 2351 09:59:59.792426  

 2352 09:59:59.795863  CA PerBit enable=1, Macro0, CA PI delay=28

 2353 09:59:59.799242  === u2Vref_new: 0x60 --> 0x90

 2354 09:59:59.799510  

 2355 09:59:59.802360  Vref(ca) range 1: 32

 2356 09:59:59.802605  

 2357 09:59:59.802747  CS Dly= 11 (42-0-32)

 2358 09:59:59.805994  Write Rank1 MR13 =0xd8

 2359 09:59:59.808886  Write Rank1 MR13 =0xd8

 2360 09:59:59.809171  Write Rank1 MR12 =0x60

 2361 09:59:59.812510  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2362 09:59:59.815874  Write Rank0 MR2 =0xad

 2363 09:59:59.816201  [Write Leveling]

 2364 09:59:59.819336  delay  byte0  byte1  byte2  byte3

 2365 09:59:59.819639  

 2366 09:59:59.822328  10    0   0   

 2367 09:59:59.822600  11    0   0   

 2368 09:59:59.825839  12    0   0   

 2369 09:59:59.826111  13    0   0   

 2370 09:59:59.826326  14    0   0   

 2371 09:59:59.829406  15    0   0   

 2372 09:59:59.829771  16    0   0   

 2373 09:59:59.832417  17    0   0   

 2374 09:59:59.832688  18    0   0   

 2375 09:59:59.835632  19    0   0   

 2376 09:59:59.835902  20    0   0   

 2377 09:59:59.836116  21    0   0   

 2378 09:59:59.839650  22    0   0   

 2379 09:59:59.840002  23    0   0   

 2380 09:59:59.842927  24    0   0   

 2381 09:59:59.843387  25    0   ff   

 2382 09:59:59.843770  26    0   ff   

 2383 09:59:59.846234  27    0   ff   

 2384 09:59:59.846648  28    0   ff   

 2385 09:59:59.849605  29    0   ff   

 2386 09:59:59.850016  30    0   ff   

 2387 09:59:59.853233  31    0   ff   

 2388 09:59:59.853724  32    0   ff   

 2389 09:59:59.856150  33    ff   ff   

 2390 09:59:59.856576  34    ff   ff   

 2391 09:59:59.856904  35    ff   ff   

 2392 09:59:59.859843  36    ff   ff   

 2393 09:59:59.860358  37    ff   ff   

 2394 09:59:59.863091  38    ff   ff   

 2395 09:59:59.863682  39    ff   ff   

 2396 09:59:59.869456  pass bytecount = 0xff (0xff: all bytes pass) 

 2397 09:59:59.869953  

 2398 09:59:59.870274  DQS0 dly: 33

 2399 09:59:59.870572  DQS1 dly: 25

 2400 09:59:59.872804  Write Rank0 MR2 =0x2d

 2401 09:59:59.876071  [RankSwap] Rank num 2, (Multi 1), Rank 0

 2402 09:59:59.879991  Write Rank0 MR1 =0xd6

 2403 09:59:59.880399  [Gating]

 2404 09:59:59.880743  ==

 2405 09:59:59.883252  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2406 09:59:59.886430  fsp= 1, odt_onoff= 1, Byte mode= 0

 2407 09:59:59.886857  ==

 2408 09:59:59.892919  3 1 0 |3535 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 2409 09:59:59.896298  3 1 4 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 2410 09:59:59.899607  3 1 8 |3534 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 2411 09:59:59.906298  3 1 12 |3534 2c2b  |(11 11)(11 11) |(0 0)(1 1)| 0

 2412 09:59:59.909989  3 1 16 |2626 2c2b  |(11 11)(11 11) |(1 1)(0 0)| 0

 2413 09:59:59.913434  3 1 20 |3535 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2414 09:59:59.920020  [Byte 0] Lead/lag falling Transition (3, 1, 20)

 2415 09:59:59.923003  3 1 24 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2416 09:59:59.926468  3 1 28 |1c1b 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2417 09:59:59.929905  3 2 0 |1d1c 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2418 09:59:59.936018  3 2 4 |3535 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2419 09:59:59.939557  3 2 8 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2420 09:59:59.943055  3 2 12 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 2421 09:59:59.949677  3 2 16 |3535 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2422 09:59:59.953182  3 2 20 |c0b 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 2423 09:59:59.956609  [Byte 0] Lead/lag Transition tap number (1)

 2424 09:59:59.960007  3 2 24 |3d3d 302  |(11 11)(11 11) |(0 0)(0 0)| 0

 2425 09:59:59.966703  3 2 28 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2426 09:59:59.969714  3 3 0 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2427 09:59:59.973500  3 3 4 |605 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2428 09:59:59.979745  3 3 8 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2429 09:59:59.982812  3 3 12 |3d3c 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 2430 09:59:59.986411  3 3 16 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2431 09:59:59.989936  3 3 20 |504 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2432 09:59:59.996733  3 3 24 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2433 10:00:00.000270  [Byte 0] Lead/lag falling Transition (3, 3, 24)

 2434 10:00:00.003456  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2435 10:00:00.010053  3 4 0 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 2436 10:00:00.013564  [Byte 1] Lead/lag Transition tap number (1)

 2437 10:00:00.016891  3 4 4 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 2438 10:00:00.020105  3 4 8 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 2439 10:00:00.026407  3 4 12 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 2440 10:00:00.030020  3 4 16 |201 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2441 10:00:00.033350  3 4 20 |707 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 2442 10:00:00.040114  3 4 24 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 2443 10:00:00.043309  3 4 28 |3d3d 3130  |(11 11)(11 11) |(1 1)(1 1)| 0

 2444 10:00:00.047003  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2445 10:00:00.053035  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2446 10:00:00.056340  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2447 10:00:00.060254  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2448 10:00:00.063219  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2449 10:00:00.070239  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2450 10:00:00.073247  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2451 10:00:00.076339  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2452 10:00:00.083561  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2453 10:00:00.086736  3 6 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2454 10:00:00.090096  3 6 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 2455 10:00:00.096507  [Byte 0] Lead/lag falling Transition (3, 6, 8)

 2456 10:00:00.099813  3 6 12 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 2457 10:00:00.103184  [Byte 0] Lead/lag Transition tap number (2)

 2458 10:00:00.106291  3 6 16 |3d3d 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 2459 10:00:00.112870  [Byte 1] Lead/lag falling Transition (3, 6, 16)

 2460 10:00:00.116297  3 6 20 |404 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 2461 10:00:00.119594  [Byte 1] Lead/lag Transition tap number (2)

 2462 10:00:00.123232  3 6 24 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 2463 10:00:00.126239  [Byte 0]First pass (3, 6, 24)

 2464 10:00:00.129840  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2465 10:00:00.132958  [Byte 1]First pass (3, 6, 28)

 2466 10:00:00.136404  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2467 10:00:00.143462  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2468 10:00:00.146275  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2469 10:00:00.149759  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2470 10:00:00.153129  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2471 10:00:00.156310  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2472 10:00:00.162805  3 7 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2473 10:00:00.166078  3 7 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 2474 10:00:00.169349  All bytes gating window > 1UI, Early break!

 2475 10:00:00.169842  

 2476 10:00:00.172854  best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)

 2477 10:00:00.173380  

 2478 10:00:00.176219  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)

 2479 10:00:00.176742  

 2480 10:00:00.177174  

 2481 10:00:00.177577  

 2482 10:00:00.182843  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)

 2483 10:00:00.183366  

 2484 10:00:00.185929  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)

 2485 10:00:00.186354  

 2486 10:00:00.186775  

 2487 10:00:00.189603  Write Rank0 MR1 =0x56

 2488 10:00:00.190079  

 2489 10:00:00.190515  best RODT dly(2T, 0.5T) = (2, 3)

 2490 10:00:00.193126  

 2491 10:00:00.193644  best RODT dly(2T, 0.5T) = (2, 3)

 2492 10:00:00.196362  ==

 2493 10:00:00.199505  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2494 10:00:00.202707  fsp= 1, odt_onoff= 1, Byte mode= 0

 2495 10:00:00.203133  ==

 2496 10:00:00.206038  Start DQ dly to find pass range UseTestEngine =0

 2497 10:00:00.209510  x-axis: bit #, y-axis: DQ dly (-127~63)

 2498 10:00:00.212675  RX Vref Scan = 0

 2499 10:00:00.215936  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 2500 10:00:00.219232  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 2501 10:00:00.222770  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 2502 10:00:00.223304  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 2503 10:00:00.226270  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 2504 10:00:00.229918  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 2505 10:00:00.232869  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 2506 10:00:00.236142  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 2507 10:00:00.239511  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 2508 10:00:00.242997  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 2509 10:00:00.246284  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 2510 10:00:00.246763  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 2511 10:00:00.249369  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 2512 10:00:00.252774  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 2513 10:00:00.256427  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 2514 10:00:00.259379  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 2515 10:00:00.263295  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 2516 10:00:00.265836  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 2517 10:00:00.269793  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 2518 10:00:00.270226  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 2519 10:00:00.273064  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 2520 10:00:00.276002  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 2521 10:00:00.279522  -4, [0] xxxxxxxx xxxxxxxo [MSB]

 2522 10:00:00.282912  -3, [0] xxxxxxxx xxxxxxxo [MSB]

 2523 10:00:00.286257  -2, [0] xxxxxxxx xoxxxxxo [MSB]

 2524 10:00:00.286794  -1, [0] xxxoxxxx xoxxxxxo [MSB]

 2525 10:00:00.289457  0, [0] xxxoxxxx ooxxxxxo [MSB]

 2526 10:00:00.292922  1, [0] xxooxxxx ooxxxxxo [MSB]

 2527 10:00:00.296321  2, [0] xxxoxxxx ooxxxxxo [MSB]

 2528 10:00:00.299478  3, [0] xxooxxxo oooxxxxo [MSB]

 2529 10:00:00.303191  4, [0] oxooxxxo oooxxxxo [MSB]

 2530 10:00:00.303779  5, [0] oooooxoo ooooooxo [MSB]

 2531 10:00:00.306154  32, [0] oooooooo ooooooox [MSB]

 2532 10:00:00.309286  33, [0] oooooooo ooooooox [MSB]

 2533 10:00:00.312956  34, [0] oooooooo ooooooox [MSB]

 2534 10:00:00.315957  35, [0] oooxoooo xxooooox [MSB]

 2535 10:00:00.319725  36, [0] oooxoooo xxooooox [MSB]

 2536 10:00:00.322907  37, [0] ooxxoooo xxooooox [MSB]

 2537 10:00:00.323339  38, [0] ooxxoooo xxooooox [MSB]

 2538 10:00:00.326098  39, [0] ooxxooox xxooooox [MSB]

 2539 10:00:00.329391  40, [0] oxxxxoox xxxoooox [MSB]

 2540 10:00:00.332912  41, [0] xxxxxoox xxxxxxox [MSB]

 2541 10:00:00.335686  42, [0] xxxxxxxx xxxxxxxx [MSB]

 2542 10:00:00.339368  iDelay=42, Bit 0, Center 22 (4 ~ 40) 37

 2543 10:00:00.342558  iDelay=42, Bit 1, Center 22 (5 ~ 39) 35

 2544 10:00:00.345511  iDelay=42, Bit 2, Center 19 (3 ~ 36) 34

 2545 10:00:00.349288  iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36

 2546 10:00:00.352533  iDelay=42, Bit 4, Center 22 (5 ~ 39) 35

 2547 10:00:00.355717  iDelay=42, Bit 5, Center 23 (6 ~ 41) 36

 2548 10:00:00.359202  iDelay=42, Bit 6, Center 23 (5 ~ 41) 37

 2549 10:00:00.362733  iDelay=42, Bit 7, Center 20 (3 ~ 38) 36

 2550 10:00:00.366187  iDelay=42, Bit 8, Center 17 (0 ~ 34) 35

 2551 10:00:00.372898  iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37

 2552 10:00:00.375955  iDelay=42, Bit 10, Center 21 (3 ~ 39) 37

 2553 10:00:00.379373  iDelay=42, Bit 11, Center 22 (5 ~ 40) 36

 2554 10:00:00.382598  iDelay=42, Bit 12, Center 22 (5 ~ 40) 36

 2555 10:00:00.385725  iDelay=42, Bit 13, Center 22 (5 ~ 40) 36

 2556 10:00:00.389030  iDelay=42, Bit 14, Center 23 (6 ~ 41) 36

 2557 10:00:00.392688  iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36

 2558 10:00:00.393212  ==

 2559 10:00:00.399123  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2560 10:00:00.402312  fsp= 1, odt_onoff= 1, Byte mode= 0

 2561 10:00:00.402842  ==

 2562 10:00:00.403280  DQS Delay:

 2563 10:00:00.405415  DQS0 = 0, DQS1 = 0

 2564 10:00:00.405838  DQM Delay:

 2565 10:00:00.406262  DQM0 = 20, DQM1 = 19

 2566 10:00:00.408672  DQ Delay:

 2567 10:00:00.412612  DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =16

 2568 10:00:00.415740  DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20

 2569 10:00:00.418494  DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22

 2570 10:00:00.421958  DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13

 2571 10:00:00.422384  

 2572 10:00:00.422808  

 2573 10:00:00.423301  DramC Write-DBI off

 2574 10:00:00.423743  ==

 2575 10:00:00.428966  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2576 10:00:00.431982  fsp= 1, odt_onoff= 1, Byte mode= 0

 2577 10:00:00.432409  ==

 2578 10:00:00.435218  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 2579 10:00:00.435692  

 2580 10:00:00.438959  Begin, DQ Scan Range 921~1177

 2581 10:00:00.439536  

 2582 10:00:00.439973  

 2583 10:00:00.441931  	TX Vref Scan disable

 2584 10:00:00.445402  921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]

 2585 10:00:00.448806  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 2586 10:00:00.452096  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 2587 10:00:00.454894  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 2588 10:00:00.458673  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 2589 10:00:00.461841  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 2590 10:00:00.465350  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 2591 10:00:00.468382  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 2592 10:00:00.471515  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 2593 10:00:00.474811  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 2594 10:00:00.481897  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 2595 10:00:00.485199  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 2596 10:00:00.487983  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 2597 10:00:00.491447  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 2598 10:00:00.495491  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 2599 10:00:00.498639  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 2600 10:00:00.501772  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 2601 10:00:00.505379  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2602 10:00:00.508388  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 2603 10:00:00.511471  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 2604 10:00:00.515208  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 2605 10:00:00.517842  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 2606 10:00:00.522012  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 2607 10:00:00.525291  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 2608 10:00:00.528358  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 2609 10:00:00.534470  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 2610 10:00:00.538630  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 2611 10:00:00.541429  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 2612 10:00:00.545241  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 2613 10:00:00.548479  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 2614 10:00:00.552007  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 2615 10:00:00.555239  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 2616 10:00:00.558521  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 2617 10:00:00.561516  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 2618 10:00:00.565067  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 2619 10:00:00.568361  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 2620 10:00:00.571581  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2621 10:00:00.574920  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2622 10:00:00.578370  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2623 10:00:00.581484  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2624 10:00:00.584603  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2625 10:00:00.587814  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2626 10:00:00.591209  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2627 10:00:00.598192  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2628 10:00:00.601631  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2629 10:00:00.604963  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2630 10:00:00.608227  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2631 10:00:00.611131  968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 2632 10:00:00.615192  969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 2633 10:00:00.618179  970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]

 2634 10:00:00.621554  971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]

 2635 10:00:00.624464  972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]

 2636 10:00:00.627933  973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]

 2637 10:00:00.631371  974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]

 2638 10:00:00.634679  975 |3 6 15|[0] xxxxxxxx oooooxoo [MSB]

 2639 10:00:00.638439  976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]

 2640 10:00:00.641837  977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]

 2641 10:00:00.644872  978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]

 2642 10:00:00.647786  979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]

 2643 10:00:00.651012  980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]

 2644 10:00:00.654432  981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]

 2645 10:00:00.657706  982 |3 6 22|[0] oooooxoo oooooooo [MSB]

 2646 10:00:00.665424  987 |3 6 27|[0] oooooooo ooooooox [MSB]

 2647 10:00:00.668627  988 |3 6 28|[0] oooooooo ooooooox [MSB]

 2648 10:00:00.671859  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 2649 10:00:00.675230  990 |3 6 30|[0] oooooooo oxooooox [MSB]

 2650 10:00:00.678573  991 |3 6 31|[0] oooooooo xxooooox [MSB]

 2651 10:00:00.682247  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 2652 10:00:00.685268  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 2653 10:00:00.688541  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 2654 10:00:00.691780  995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]

 2655 10:00:00.695256  996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]

 2656 10:00:00.698629  997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]

 2657 10:00:00.701481  998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]

 2658 10:00:00.704892  999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]

 2659 10:00:00.708098  1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]

 2660 10:00:00.714957  1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]

 2661 10:00:00.718648  1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]

 2662 10:00:00.721308  Byte0, DQ PI dly=991, DQM PI dly= 991

 2663 10:00:00.724572  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)

 2664 10:00:00.725012  

 2665 10:00:00.728184  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)

 2666 10:00:00.728742  

 2667 10:00:00.731565  Byte1, DQ PI dly=980, DQM PI dly= 980

 2668 10:00:00.737970  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)

 2669 10:00:00.738396  

 2670 10:00:00.741471  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)

 2671 10:00:00.742018  

 2672 10:00:00.742452  ==

 2673 10:00:00.747933  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2674 10:00:00.751581  fsp= 1, odt_onoff= 1, Byte mode= 0

 2675 10:00:00.752012  ==

 2676 10:00:00.754886  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 2677 10:00:00.755310  

 2678 10:00:00.758235  Begin, DQ Scan Range 956~1020

 2679 10:00:00.758665  Write Rank0 MR14 =0x0

 2680 10:00:00.767514  

 2681 10:00:00.767939  	CH=1, VrefRange= 0, VrefLevel = 0

 2682 10:00:00.774628  TX Bit0 (984~999) 16 991,   Bit8 (975~985) 11 980,

 2683 10:00:00.778053  TX Bit1 (983~996) 14 989,   Bit9 (976~984) 9 980,

 2684 10:00:00.784249  TX Bit2 (981~995) 15 988,   Bit10 (977~988) 12 982,

 2685 10:00:00.787372  TX Bit3 (980~992) 13 986,   Bit11 (977~988) 12 982,

 2686 10:00:00.790828  TX Bit4 (983~998) 16 990,   Bit12 (977~988) 12 982,

 2687 10:00:00.797687  TX Bit5 (985~998) 14 991,   Bit13 (978~990) 13 984,

 2688 10:00:00.801107  TX Bit6 (984~996) 13 990,   Bit14 (976~987) 12 981,

 2689 10:00:00.804370  TX Bit7 (983~996) 14 989,   Bit15 (970~981) 12 975,

 2690 10:00:00.804791  

 2691 10:00:00.807644  Write Rank0 MR14 =0x2

 2692 10:00:00.816788  

 2693 10:00:00.817386  	CH=1, VrefRange= 0, VrefLevel = 2

 2694 10:00:00.823381  TX Bit0 (984~1000) 17 992,   Bit8 (974~985) 12 979,

 2695 10:00:00.826441  TX Bit1 (983~996) 14 989,   Bit9 (975~985) 11 980,

 2696 10:00:00.833251  TX Bit2 (981~996) 16 988,   Bit10 (977~989) 13 983,

 2697 10:00:00.836326  TX Bit3 (979~993) 15 986,   Bit11 (977~990) 14 983,

 2698 10:00:00.839665  TX Bit4 (982~998) 17 990,   Bit12 (976~990) 15 983,

 2699 10:00:00.846643  TX Bit5 (984~999) 16 991,   Bit13 (977~991) 15 984,

 2700 10:00:00.849601  TX Bit6 (983~998) 16 990,   Bit14 (976~989) 14 982,

 2701 10:00:00.852981  TX Bit7 (983~997) 15 990,   Bit15 (970~983) 14 976,

 2702 10:00:00.856580  

 2703 10:00:00.857007  Write Rank0 MR14 =0x4

 2704 10:00:00.866072  

 2705 10:00:00.866607  	CH=1, VrefRange= 0, VrefLevel = 4

 2706 10:00:00.872628  TX Bit0 (983~1000) 18 991,   Bit8 (974~986) 13 980,

 2707 10:00:00.876009  TX Bit1 (982~998) 17 990,   Bit9 (975~985) 11 980,

 2708 10:00:00.882576  TX Bit2 (980~997) 18 988,   Bit10 (976~990) 15 983,

 2709 10:00:00.885846  TX Bit3 (978~993) 16 985,   Bit11 (976~990) 15 983,

 2710 10:00:00.889053  TX Bit4 (982~999) 18 990,   Bit12 (976~991) 16 983,

 2711 10:00:00.895506  TX Bit5 (984~999) 16 991,   Bit13 (977~991) 15 984,

 2712 10:00:00.899178  TX Bit6 (983~998) 16 990,   Bit14 (976~990) 15 983,

 2713 10:00:00.902453  TX Bit7 (983~998) 16 990,   Bit15 (970~983) 14 976,

 2714 10:00:00.902887  

 2715 10:00:00.906164  Write Rank0 MR14 =0x6

 2716 10:00:00.914628  

 2717 10:00:00.915159  	CH=1, VrefRange= 0, VrefLevel = 6

 2718 10:00:00.921543  TX Bit0 (983~1000) 18 991,   Bit8 (974~986) 13 980,

 2719 10:00:00.924641  TX Bit1 (982~998) 17 990,   Bit9 (974~985) 12 979,

 2720 10:00:00.930943  TX Bit2 (980~997) 18 988,   Bit10 (976~991) 16 983,

 2721 10:00:00.934355  TX Bit3 (978~994) 17 986,   Bit11 (976~991) 16 983,

 2722 10:00:00.937801  TX Bit4 (982~999) 18 990,   Bit12 (976~991) 16 983,

 2723 10:00:00.944388  TX Bit5 (984~999) 16 991,   Bit13 (977~991) 15 984,

 2724 10:00:00.947346  TX Bit6 (983~999) 17 991,   Bit14 (975~991) 17 983,

 2725 10:00:00.954153  TX Bit7 (983~998) 16 990,   Bit15 (969~984) 16 976,

 2726 10:00:00.954674  

 2727 10:00:00.955114  Write Rank0 MR14 =0x8

 2728 10:00:00.963635  

 2729 10:00:00.964163  	CH=1, VrefRange= 0, VrefLevel = 8

 2730 10:00:00.970669  TX Bit0 (983~1001) 19 992,   Bit8 (973~987) 15 980,

 2731 10:00:00.974286  TX Bit1 (981~999) 19 990,   Bit9 (974~986) 13 980,

 2732 10:00:00.980135  TX Bit2 (979~998) 20 988,   Bit10 (976~991) 16 983,

 2733 10:00:00.983724  TX Bit3 (978~994) 17 986,   Bit11 (977~991) 15 984,

 2734 10:00:00.986767  TX Bit4 (982~1000) 19 991,   Bit12 (976~992) 17 984,

 2735 10:00:00.993733  TX Bit5 (984~1000) 17 992,   Bit13 (977~992) 16 984,

 2736 10:00:00.996840  TX Bit6 (982~999) 18 990,   Bit14 (975~991) 17 983,

 2737 10:00:01.003547  TX Bit7 (982~999) 18 990,   Bit15 (969~984) 16 976,

 2738 10:00:01.004092  

 2739 10:00:01.004540  Write Rank0 MR14 =0xa

 2740 10:00:01.012827  

 2741 10:00:01.016849  	CH=1, VrefRange= 0, VrefLevel = 10

 2742 10:00:01.019892  TX Bit0 (983~1001) 19 992,   Bit8 (972~988) 17 980,

 2743 10:00:01.023258  TX Bit1 (981~999) 19 990,   Bit9 (973~986) 14 979,

 2744 10:00:01.029921  TX Bit2 (979~999) 21 989,   Bit10 (975~992) 18 983,

 2745 10:00:01.032966  TX Bit3 (978~996) 19 987,   Bit11 (976~992) 17 984,

 2746 10:00:01.036498  TX Bit4 (982~1000) 19 991,   Bit12 (976~992) 17 984,

 2747 10:00:01.043173  TX Bit5 (984~1000) 17 992,   Bit13 (977~992) 16 984,

 2748 10:00:01.046413  TX Bit6 (982~999) 18 990,   Bit14 (975~992) 18 983,

 2749 10:00:01.053297  TX Bit7 (982~999) 18 990,   Bit15 (969~985) 17 977,

 2750 10:00:01.053856  

 2751 10:00:01.054223  Write Rank0 MR14 =0xc

 2752 10:00:01.062774  

 2753 10:00:01.066008  	CH=1, VrefRange= 0, VrefLevel = 12

 2754 10:00:01.069273  TX Bit0 (982~1002) 21 992,   Bit8 (972~989) 18 980,

 2755 10:00:01.072485  TX Bit1 (980~1000) 21 990,   Bit9 (973~987) 15 980,

 2756 10:00:01.079440  TX Bit2 (979~999) 21 989,   Bit10 (975~992) 18 983,

 2757 10:00:01.082552  TX Bit3 (977~996) 20 986,   Bit11 (976~992) 17 984,

 2758 10:00:01.085518  TX Bit4 (981~1001) 21 991,   Bit12 (975~993) 19 984,

 2759 10:00:01.092570  TX Bit5 (983~1000) 18 991,   Bit13 (976~992) 17 984,

 2760 10:00:01.095656  TX Bit6 (982~1000) 19 991,   Bit14 (975~992) 18 983,

 2761 10:00:01.102709  TX Bit7 (981~999) 19 990,   Bit15 (969~985) 17 977,

 2762 10:00:01.103237  

 2763 10:00:01.103607  Write Rank0 MR14 =0xe

 2764 10:00:01.112348  

 2765 10:00:01.115489  	CH=1, VrefRange= 0, VrefLevel = 14

 2766 10:00:01.119011  TX Bit0 (982~1002) 21 992,   Bit8 (971~990) 20 980,

 2767 10:00:01.122435  TX Bit1 (980~1000) 21 990,   Bit9 (972~988) 17 980,

 2768 10:00:01.128758  TX Bit2 (978~1000) 23 989,   Bit10 (975~992) 18 983,

 2769 10:00:01.132098  TX Bit3 (977~997) 21 987,   Bit11 (976~993) 18 984,

 2770 10:00:01.135515  TX Bit4 (980~1001) 22 990,   Bit12 (975~993) 19 984,

 2771 10:00:01.142694  TX Bit5 (983~1001) 19 992,   Bit13 (976~993) 18 984,

 2772 10:00:01.145467  TX Bit6 (981~1000) 20 990,   Bit14 (974~993) 20 983,

 2773 10:00:01.152179  TX Bit7 (981~1000) 20 990,   Bit15 (968~986) 19 977,

 2774 10:00:01.152676  

 2775 10:00:01.153004  Write Rank0 MR14 =0x10

 2776 10:00:01.162823  

 2777 10:00:01.165995  	CH=1, VrefRange= 0, VrefLevel = 16

 2778 10:00:01.169385  TX Bit0 (982~1003) 22 992,   Bit8 (971~991) 21 981,

 2779 10:00:01.172310  TX Bit1 (980~1001) 22 990,   Bit9 (972~989) 18 980,

 2780 10:00:01.179349  TX Bit2 (978~1000) 23 989,   Bit10 (974~992) 19 983,

 2781 10:00:01.182546  TX Bit3 (977~997) 21 987,   Bit11 (975~993) 19 984,

 2782 10:00:01.185979  TX Bit4 (980~1001) 22 990,   Bit12 (975~993) 19 984,

 2783 10:00:01.192575  TX Bit5 (983~1001) 19 992,   Bit13 (976~993) 18 984,

 2784 10:00:01.195487  TX Bit6 (980~1001) 22 990,   Bit14 (974~993) 20 983,

 2785 10:00:01.202186  TX Bit7 (981~1000) 20 990,   Bit15 (969~986) 18 977,

 2786 10:00:01.202685  

 2787 10:00:01.203013  Write Rank0 MR14 =0x12

 2788 10:00:01.212465  

 2789 10:00:01.212966  	CH=1, VrefRange= 0, VrefLevel = 18

 2790 10:00:01.219766  TX Bit0 (981~1003) 23 992,   Bit8 (971~991) 21 981,

 2791 10:00:01.223052  TX Bit1 (979~1001) 23 990,   Bit9 (971~990) 20 980,

 2792 10:00:01.229649  TX Bit2 (978~1000) 23 989,   Bit10 (974~993) 20 983,

 2793 10:00:01.232715  TX Bit3 (977~999) 23 988,   Bit11 (974~993) 20 983,

 2794 10:00:01.236019  TX Bit4 (979~1002) 24 990,   Bit12 (975~994) 20 984,

 2795 10:00:01.243343  TX Bit5 (982~1002) 21 992,   Bit13 (976~993) 18 984,

 2796 10:00:01.245815  TX Bit6 (980~1001) 22 990,   Bit14 (974~993) 20 983,

 2797 10:00:01.252326  TX Bit7 (980~1001) 22 990,   Bit15 (968~986) 19 977,

 2798 10:00:01.252740  

 2799 10:00:01.253064  Write Rank0 MR14 =0x14

 2800 10:00:01.262801  

 2801 10:00:01.266149  	CH=1, VrefRange= 0, VrefLevel = 20

 2802 10:00:01.269042  TX Bit0 (981~1003) 23 992,   Bit8 (970~991) 22 980,

 2803 10:00:01.273071  TX Bit1 (979~1001) 23 990,   Bit9 (971~991) 21 981,

 2804 10:00:01.279625  TX Bit2 (978~1001) 24 989,   Bit10 (973~993) 21 983,

 2805 10:00:01.282904  TX Bit3 (977~999) 23 988,   Bit11 (974~994) 21 984,

 2806 10:00:01.286171  TX Bit4 (979~1002) 24 990,   Bit12 (974~994) 21 984,

 2807 10:00:01.292731  TX Bit5 (982~1003) 22 992,   Bit13 (976~994) 19 985,

 2808 10:00:01.296075  TX Bit6 (980~1002) 23 991,   Bit14 (973~993) 21 983,

 2809 10:00:01.302515  TX Bit7 (980~1001) 22 990,   Bit15 (968~987) 20 977,

 2810 10:00:01.302930  

 2811 10:00:01.303254  Write Rank0 MR14 =0x16

 2812 10:00:01.313086  

 2813 10:00:01.316362  	CH=1, VrefRange= 0, VrefLevel = 22

 2814 10:00:01.319506  TX Bit0 (980~1004) 25 992,   Bit8 (970~992) 23 981,

 2815 10:00:01.323073  TX Bit1 (979~1002) 24 990,   Bit9 (971~991) 21 981,

 2816 10:00:01.329316  TX Bit2 (978~1001) 24 989,   Bit10 (972~994) 23 983,

 2817 10:00:01.332669  TX Bit3 (977~999) 23 988,   Bit11 (974~994) 21 984,

 2818 10:00:01.336114  TX Bit4 (979~1003) 25 991,   Bit12 (974~995) 22 984,

 2819 10:00:01.342984  TX Bit5 (982~1003) 22 992,   Bit13 (975~994) 20 984,

 2820 10:00:01.346719  TX Bit6 (979~1002) 24 990,   Bit14 (972~994) 23 983,

 2821 10:00:01.352483  TX Bit7 (980~1002) 23 991,   Bit15 (968~988) 21 978,

 2822 10:00:01.353059  

 2823 10:00:01.353543  Write Rank0 MR14 =0x18

 2824 10:00:01.363474  

 2825 10:00:01.366807  	CH=1, VrefRange= 0, VrefLevel = 24

 2826 10:00:01.370509  TX Bit0 (980~1005) 26 992,   Bit8 (970~992) 23 981,

 2827 10:00:01.373245  TX Bit1 (979~1002) 24 990,   Bit9 (970~991) 22 980,

 2828 10:00:01.380121  TX Bit2 (977~1002) 26 989,   Bit10 (973~994) 22 983,

 2829 10:00:01.383212  TX Bit3 (977~999) 23 988,   Bit11 (973~995) 23 984,

 2830 10:00:01.386807  TX Bit4 (978~1003) 26 990,   Bit12 (973~995) 23 984,

 2831 10:00:01.393492  TX Bit5 (981~1003) 23 992,   Bit13 (975~995) 21 985,

 2832 10:00:01.396835  TX Bit6 (979~1002) 24 990,   Bit14 (972~994) 23 983,

 2833 10:00:01.403243  TX Bit7 (979~1002) 24 990,   Bit15 (968~988) 21 978,

 2834 10:00:01.403826  

 2835 10:00:01.404187  Write Rank0 MR14 =0x1a

 2836 10:00:01.414090  

 2837 10:00:01.417139  	CH=1, VrefRange= 0, VrefLevel = 26

 2838 10:00:01.420367  TX Bit0 (980~1005) 26 992,   Bit8 (971~992) 22 981,

 2839 10:00:01.423573  TX Bit1 (978~1003) 26 990,   Bit9 (970~991) 22 980,

 2840 10:00:01.430536  TX Bit2 (977~1002) 26 989,   Bit10 (973~994) 22 983,

 2841 10:00:01.433771  TX Bit3 (976~1000) 25 988,   Bit11 (973~995) 23 984,

 2842 10:00:01.437119  TX Bit4 (978~1003) 26 990,   Bit12 (973~996) 24 984,

 2843 10:00:01.443483  TX Bit5 (981~1004) 24 992,   Bit13 (975~996) 22 985,

 2844 10:00:01.446801  TX Bit6 (979~1003) 25 991,   Bit14 (972~995) 24 983,

 2845 10:00:01.453766  TX Bit7 (979~1002) 24 990,   Bit15 (967~990) 24 978,

 2846 10:00:01.454298  

 2847 10:00:01.456731  wait MRW command Rank0 MR14 =0x1c fired (1)

 2848 10:00:01.460304  Write Rank0 MR14 =0x1c

 2849 10:00:01.468851  

 2850 10:00:01.471876  	CH=1, VrefRange= 0, VrefLevel = 28

 2851 10:00:01.475490  TX Bit0 (979~1006) 28 992,   Bit8 (970~992) 23 981,

 2852 10:00:01.478112  TX Bit1 (978~1003) 26 990,   Bit9 (970~992) 23 981,

 2853 10:00:01.485117  TX Bit2 (977~1002) 26 989,   Bit10 (972~995) 24 983,

 2854 10:00:01.488256  TX Bit3 (976~1000) 25 988,   Bit11 (972~996) 25 984,

 2855 10:00:01.491553  TX Bit4 (978~1004) 27 991,   Bit12 (973~996) 24 984,

 2856 10:00:01.498451  TX Bit5 (980~1004) 25 992,   Bit13 (975~996) 22 985,

 2857 10:00:01.501737  TX Bit6 (979~1003) 25 991,   Bit14 (972~995) 24 983,

 2858 10:00:01.508191  TX Bit7 (979~1003) 25 991,   Bit15 (967~991) 25 979,

 2859 10:00:01.508711  

 2860 10:00:01.509040  Write Rank0 MR14 =0x1e

 2861 10:00:01.519283  

 2862 10:00:01.522692  	CH=1, VrefRange= 0, VrefLevel = 30

 2863 10:00:01.525617  TX Bit0 (979~1006) 28 992,   Bit8 (970~993) 24 981,

 2864 10:00:01.529044  TX Bit1 (978~1003) 26 990,   Bit9 (970~992) 23 981,

 2865 10:00:01.535656  TX Bit2 (977~1002) 26 989,   Bit10 (971~995) 25 983,

 2866 10:00:01.539311  TX Bit3 (976~1000) 25 988,   Bit11 (972~996) 25 984,

 2867 10:00:01.542315  TX Bit4 (979~1004) 26 991,   Bit12 (972~996) 25 984,

 2868 10:00:01.548801  TX Bit5 (980~1005) 26 992,   Bit13 (974~996) 23 985,

 2869 10:00:01.552015  TX Bit6 (978~1003) 26 990,   Bit14 (972~995) 24 983,

 2870 10:00:01.558554  TX Bit7 (978~1003) 26 990,   Bit15 (967~990) 24 978,

 2871 10:00:01.559072  

 2872 10:00:01.559402  Write Rank0 MR14 =0x20

 2873 10:00:01.569946  

 2874 10:00:01.573024  	CH=1, VrefRange= 0, VrefLevel = 32

 2875 10:00:01.576363  TX Bit0 (979~1006) 28 992,   Bit8 (970~993) 24 981,

 2876 10:00:01.579914  TX Bit1 (978~1003) 26 990,   Bit9 (970~992) 23 981,

 2877 10:00:01.586325  TX Bit2 (977~1002) 26 989,   Bit10 (971~995) 25 983,

 2878 10:00:01.589990  TX Bit3 (976~1000) 25 988,   Bit11 (972~996) 25 984,

 2879 10:00:01.595828  TX Bit4 (979~1004) 26 991,   Bit12 (972~996) 25 984,

 2880 10:00:01.599789  TX Bit5 (980~1005) 26 992,   Bit13 (974~996) 23 985,

 2881 10:00:01.602961  TX Bit6 (978~1003) 26 990,   Bit14 (972~995) 24 983,

 2882 10:00:01.609450  TX Bit7 (978~1003) 26 990,   Bit15 (967~990) 24 978,

 2883 10:00:01.609991  

 2884 10:00:01.610353  Write Rank0 MR14 =0x22

 2885 10:00:01.620677  

 2886 10:00:01.623715  	CH=1, VrefRange= 0, VrefLevel = 34

 2887 10:00:01.627046  TX Bit0 (979~1006) 28 992,   Bit8 (970~993) 24 981,

 2888 10:00:01.630543  TX Bit1 (978~1003) 26 990,   Bit9 (970~992) 23 981,

 2889 10:00:01.636985  TX Bit2 (977~1002) 26 989,   Bit10 (971~995) 25 983,

 2890 10:00:01.640256  TX Bit3 (976~1000) 25 988,   Bit11 (972~996) 25 984,

 2891 10:00:01.643443  TX Bit4 (979~1004) 26 991,   Bit12 (972~996) 25 984,

 2892 10:00:01.650345  TX Bit5 (980~1005) 26 992,   Bit13 (974~996) 23 985,

 2893 10:00:01.653669  TX Bit6 (978~1003) 26 990,   Bit14 (972~995) 24 983,

 2894 10:00:01.659935  TX Bit7 (978~1003) 26 990,   Bit15 (967~990) 24 978,

 2895 10:00:01.660350  

 2896 10:00:01.660672  Write Rank0 MR14 =0x24

 2897 10:00:01.671442  

 2898 10:00:01.673958  	CH=1, VrefRange= 0, VrefLevel = 36

 2899 10:00:01.677410  TX Bit0 (979~1006) 28 992,   Bit8 (970~993) 24 981,

 2900 10:00:01.681324  TX Bit1 (978~1003) 26 990,   Bit9 (970~992) 23 981,

 2901 10:00:01.687560  TX Bit2 (977~1002) 26 989,   Bit10 (971~995) 25 983,

 2902 10:00:01.690967  TX Bit3 (976~1000) 25 988,   Bit11 (972~996) 25 984,

 2903 10:00:01.694020  TX Bit4 (979~1004) 26 991,   Bit12 (972~996) 25 984,

 2904 10:00:01.700553  TX Bit5 (980~1005) 26 992,   Bit13 (974~996) 23 985,

 2905 10:00:01.703866  TX Bit6 (978~1003) 26 990,   Bit14 (972~995) 24 983,

 2906 10:00:01.710861  TX Bit7 (978~1003) 26 990,   Bit15 (967~990) 24 978,

 2907 10:00:01.711381  

 2908 10:00:01.711748  Write Rank0 MR14 =0x26

 2909 10:00:01.721815  

 2910 10:00:01.725024  	CH=1, VrefRange= 0, VrefLevel = 38

 2911 10:00:01.728001  TX Bit0 (979~1006) 28 992,   Bit8 (970~993) 24 981,

 2912 10:00:01.731639  TX Bit1 (978~1003) 26 990,   Bit9 (970~992) 23 981,

 2913 10:00:01.738444  TX Bit2 (977~1002) 26 989,   Bit10 (971~995) 25 983,

 2914 10:00:01.741905  TX Bit3 (976~1000) 25 988,   Bit11 (972~996) 25 984,

 2915 10:00:01.745002  TX Bit4 (979~1004) 26 991,   Bit12 (972~996) 25 984,

 2916 10:00:01.751646  TX Bit5 (980~1005) 26 992,   Bit13 (974~996) 23 985,

 2917 10:00:01.755045  TX Bit6 (978~1003) 26 990,   Bit14 (972~995) 24 983,

 2918 10:00:01.761690  TX Bit7 (978~1003) 26 990,   Bit15 (967~990) 24 978,

 2919 10:00:01.762252  

 2920 10:00:01.762610  

 2921 10:00:01.764787  TX Vref found, early break! 375< 381

 2922 10:00:01.768091  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps

 2923 10:00:01.771285  u1DelayCellOfst[0]=5 cells (4 PI)

 2924 10:00:01.774879  u1DelayCellOfst[1]=2 cells (2 PI)

 2925 10:00:01.777950  u1DelayCellOfst[2]=1 cells (1 PI)

 2926 10:00:01.781222  u1DelayCellOfst[3]=0 cells (0 PI)

 2927 10:00:01.784540  u1DelayCellOfst[4]=3 cells (3 PI)

 2928 10:00:01.788463  u1DelayCellOfst[5]=5 cells (4 PI)

 2929 10:00:01.791761  u1DelayCellOfst[6]=2 cells (2 PI)

 2930 10:00:01.792282  u1DelayCellOfst[7]=2 cells (2 PI)

 2931 10:00:01.794726  Byte0, DQ PI dly=988, DQM PI dly= 990

 2932 10:00:01.800967  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)

 2933 10:00:01.801400  

 2934 10:00:01.804808  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)

 2935 10:00:01.805239  

 2936 10:00:01.808116  u1DelayCellOfst[8]=3 cells (3 PI)

 2937 10:00:01.810992  u1DelayCellOfst[9]=3 cells (3 PI)

 2938 10:00:01.814644  u1DelayCellOfst[10]=6 cells (5 PI)

 2939 10:00:01.817644  u1DelayCellOfst[11]=7 cells (6 PI)

 2940 10:00:01.821334  u1DelayCellOfst[12]=7 cells (6 PI)

 2941 10:00:01.824298  u1DelayCellOfst[13]=9 cells (7 PI)

 2942 10:00:01.827603  u1DelayCellOfst[14]=6 cells (5 PI)

 2943 10:00:01.830752  u1DelayCellOfst[15]=0 cells (0 PI)

 2944 10:00:01.834366  Byte1, DQ PI dly=978, DQM PI dly= 981

 2945 10:00:01.837869  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)

 2946 10:00:01.838406  

 2947 10:00:01.841153  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)

 2948 10:00:01.841691  

 2949 10:00:01.844214  Write Rank0 MR14 =0x1e

 2950 10:00:01.844639  

 2951 10:00:01.847533  Final TX Range 0 Vref 30

 2952 10:00:01.847965  

 2953 10:00:01.854200  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 2954 10:00:01.854632  

 2955 10:00:01.860842  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 2956 10:00:01.867300  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 2957 10:00:01.873967  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 2958 10:00:01.874432  Write Rank0 MR3 =0xb0

 2959 10:00:01.877645  DramC Write-DBI on

 2960 10:00:01.878055  ==

 2961 10:00:01.884181  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 2962 10:00:01.884643  fsp= 1, odt_onoff= 1, Byte mode= 0

 2963 10:00:01.887575  ==

 2964 10:00:01.890790  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 2965 10:00:01.891166  

 2966 10:00:01.893999  Begin, DQ Scan Range 701~765

 2967 10:00:01.894409  

 2968 10:00:01.894732  

 2969 10:00:01.895032  	TX Vref Scan disable

 2970 10:00:01.897195  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 2971 10:00:01.904206  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 2972 10:00:01.907726  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 2973 10:00:01.911013  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 2974 10:00:01.914536  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 2975 10:00:01.917395  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 2976 10:00:01.921376  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 2977 10:00:01.924088  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 2978 10:00:01.927572  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 2979 10:00:01.930875  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 2980 10:00:01.934469  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 2981 10:00:01.937423  712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 2982 10:00:01.941131  713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]

 2983 10:00:01.943958  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 2984 10:00:01.947517  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 2985 10:00:01.950787  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 2986 10:00:01.954067  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 2987 10:00:01.957399  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 2988 10:00:01.960620  719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]

 2989 10:00:01.964354  720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]

 2990 10:00:01.967885  721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]

 2991 10:00:01.970934  722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]

 2992 10:00:01.979674  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 2993 10:00:01.983487  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 2994 10:00:01.986352  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 2995 10:00:01.990060  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 2996 10:00:01.993131  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 2997 10:00:01.996739  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 2998 10:00:02.000151  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 2999 10:00:02.003386  745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]

 3000 10:00:02.006745  746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]

 3001 10:00:02.009861  747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]

 3002 10:00:02.013445  748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]

 3003 10:00:02.016711  749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]

 3004 10:00:02.020304  750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]

 3005 10:00:02.023263  751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3006 10:00:02.026820  Byte0, DQ PI dly=736, DQM PI dly= 736

 3007 10:00:02.033210  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)

 3008 10:00:02.033767  

 3009 10:00:02.036413  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)

 3010 10:00:02.037056  

 3011 10:00:02.039287  Byte1, DQ PI dly=725, DQM PI dly= 725

 3012 10:00:02.043128  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)

 3013 10:00:02.043738  

 3014 10:00:02.049221  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)

 3015 10:00:02.049725  

 3016 10:00:02.056805  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3017 10:00:02.063142  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3018 10:00:02.069801  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3019 10:00:02.073029  Write Rank0 MR3 =0x30

 3020 10:00:02.073439  DramC Write-DBI off

 3021 10:00:02.073767  

 3022 10:00:02.074068  [DATLAT]

 3023 10:00:02.076210  Freq=1600, CH1 RK0, use_rxtx_scan=0

 3024 10:00:02.076621  

 3025 10:00:02.079640  DATLAT Default: 0xf

 3026 10:00:02.080156  7, 0xFFFF, sum=0

 3027 10:00:02.082982  8, 0xFFFF, sum=0

 3028 10:00:02.083528  9, 0xFFFF, sum=0

 3029 10:00:02.086054  10, 0xFFFF, sum=0

 3030 10:00:02.086573  11, 0xFFFF, sum=0

 3031 10:00:02.089380  12, 0xFFFF, sum=0

 3032 10:00:02.089793  13, 0xFFFF, sum=0

 3033 10:00:02.092854  14, 0x0, sum=1

 3034 10:00:02.093374  15, 0x0, sum=2

 3035 10:00:02.096205  16, 0x0, sum=3

 3036 10:00:02.096620  17, 0x0, sum=4

 3037 10:00:02.099566  pattern=2 first_step=14 total pass=5 best_step=16

 3038 10:00:02.100074  ==

 3039 10:00:02.106304  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 3040 10:00:02.109630  fsp= 1, odt_onoff= 1, Byte mode= 0

 3041 10:00:02.110148  ==

 3042 10:00:02.112615  Start DQ dly to find pass range UseTestEngine =1

 3043 10:00:02.115731  x-axis: bit #, y-axis: DQ dly (-127~63)

 3044 10:00:02.119340  RX Vref Scan = 1

 3045 10:00:02.226419  

 3046 10:00:02.226993  RX Vref found, early break!

 3047 10:00:02.227571  

 3048 10:00:02.229409  Final RX Vref 11, apply to both rank0 and 1

 3049 10:00:02.233019  ==

 3050 10:00:02.236147  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0

 3051 10:00:02.239370  fsp= 1, odt_onoff= 1, Byte mode= 0

 3052 10:00:02.239878  ==

 3053 10:00:02.240361  DQS Delay:

 3054 10:00:02.242825  DQS0 = 0, DQS1 = 0

 3055 10:00:02.243447  DQM Delay:

 3056 10:00:02.246120  DQM0 = 20, DQM1 = 19

 3057 10:00:02.246709  DQ Delay:

 3058 10:00:02.249119  DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16

 3059 10:00:02.252347  DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20

 3060 10:00:02.256066  DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22

 3061 10:00:02.259196  DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13

 3062 10:00:02.259754  

 3063 10:00:02.260120  

 3064 10:00:02.260418  

 3065 10:00:02.262508  [DramC_TX_OE_Calibration] TA2

 3066 10:00:02.266137  Original DQ_B0 (3 6) =30, OEN = 27

 3067 10:00:02.269441  Original DQ_B1 (3 6) =30, OEN = 27

 3068 10:00:02.272713  23, 0x0, End_B0=23 End_B1=23

 3069 10:00:02.273275  24, 0x0, End_B0=24 End_B1=24

 3070 10:00:02.275748  25, 0x0, End_B0=25 End_B1=25

 3071 10:00:02.279113  26, 0x0, End_B0=26 End_B1=26

 3072 10:00:02.282593  27, 0x0, End_B0=27 End_B1=27

 3073 10:00:02.283155  28, 0x0, End_B0=28 End_B1=28

 3074 10:00:02.285622  29, 0x0, End_B0=29 End_B1=29

 3075 10:00:02.289068  30, 0x0, End_B0=30 End_B1=30

 3076 10:00:02.292675  31, 0xFFFF, End_B0=30 End_B1=30

 3077 10:00:02.299392  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3078 10:00:02.303203  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3079 10:00:02.303769  

 3080 10:00:02.304206  

 3081 10:00:02.306128  Write Rank0 MR23 =0x3f

 3082 10:00:02.306641  [DQSOSC]

 3083 10:00:02.315810  [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps

 3084 10:00:02.319663  CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18

 3085 10:00:02.322976  Write Rank0 MR23 =0x3f

 3086 10:00:02.323557  [DQSOSC]

 3087 10:00:02.332731  [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps

 3088 10:00:02.333248  CH1 RK0: MR19=202, MR18=BEBE

 3089 10:00:02.339523  [RankSwap] Rank num 2, (Multi 1), Rank 1

 3090 10:00:02.340030  Write Rank0 MR2 =0xad

 3091 10:00:02.343039  [Write Leveling]

 3092 10:00:02.346361  delay  byte0  byte1  byte2  byte3

 3093 10:00:02.346883  

 3094 10:00:02.347211  10    0   0   

 3095 10:00:02.347571  11    0   0   

 3096 10:00:02.349683  12    0   0   

 3097 10:00:02.350244  13    0   0   

 3098 10:00:02.352730  14    0   0   

 3099 10:00:02.353194  15    0   0   

 3100 10:00:02.353528  16    0   0   

 3101 10:00:02.355898  17    0   0   

 3102 10:00:02.356317  18    0   0   

 3103 10:00:02.359183  19    0   0   

 3104 10:00:02.359647  20    0   0   

 3105 10:00:02.362743  21    0   0   

 3106 10:00:02.363257  22    0   0   

 3107 10:00:02.363662  23    0   0   

 3108 10:00:02.365822  24    0   0   

 3109 10:00:02.366235  25    0   ff   

 3110 10:00:02.369208  26    0   ff   

 3111 10:00:02.369626  27    0   ff   

 3112 10:00:02.372425  28    0   ff   

 3113 10:00:02.372843  29    0   ff   

 3114 10:00:02.373176  30    0   ff   

 3115 10:00:02.375806  31    0   ff   

 3116 10:00:02.376223  32    0   ff   

 3117 10:00:02.379370  33    0   ff   

 3118 10:00:02.379947  34    0   ff   

 3119 10:00:02.382955  35    ff   ff   

 3120 10:00:02.383694  36    ff   ff   

 3121 10:00:02.386129  37    ff   ff   

 3122 10:00:02.386645  38    ff   ff   

 3123 10:00:02.386978  39    ff   ff   

 3124 10:00:02.389436  40    ff   ff   

 3125 10:00:02.389954  41    ff   ff   

 3126 10:00:02.395965  pass bytecount = 0xff (0xff: all bytes pass) 

 3127 10:00:02.396377  

 3128 10:00:02.396698  DQS0 dly: 35

 3129 10:00:02.397000  DQS1 dly: 25

 3130 10:00:02.399619  Write Rank0 MR2 =0x2d

 3131 10:00:02.402670  [RankSwap] Rank num 2, (Multi 1), Rank 0

 3132 10:00:02.405997  Write Rank1 MR1 =0xd6

 3133 10:00:02.406511  [Gating]

 3134 10:00:02.406840  ==

 3135 10:00:02.412982  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3136 10:00:02.413497  fsp= 1, odt_onoff= 1, Byte mode= 0

 3137 10:00:02.416009  ==

 3138 10:00:02.418920  3 1 0 |3736 2c2b  |(11 11)(11 11) |(1 1)(1 1)| 0

 3139 10:00:02.422852  3 1 4 |807 2c2b  |(11 11)(11 11) |(1 1)(0 0)| 0

 3140 10:00:02.425741  3 1 8 |3535 2c2b  |(0 0)(11 11) |(0 1)(1 0)| 0

 3141 10:00:02.432281  3 1 12 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 3142 10:00:02.435752  3 1 16 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 3143 10:00:02.439379  3 1 20 |3535 2c2b  |(0 0)(11 11) |(0 1)(1 0)| 0

 3144 10:00:02.445770  3 1 24 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 3145 10:00:02.449456  3 1 28 |3535 2c2b  |(0 0)(11 11) |(0 1)(1 0)| 0

 3146 10:00:02.453047  3 2 0 |3534 2c2b  |(11 11)(11 11) |(0 1)(1 0)| 0

 3147 10:00:02.455872  3 2 4 |201 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 3148 10:00:02.462271  3 2 8 |2121 2c2b  |(11 11)(11 11) |(1 1)(1 0)| 0

 3149 10:00:02.466456  3 2 12 |2e2d 2120  |(11 11)(11 11) |(1 1)(0 0)| 0

 3150 10:00:02.469447  3 2 16 |3d3d 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 3151 10:00:02.476066  3 2 20 |707 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 3152 10:00:02.479568  3 2 24 |3d3d 3534  |(0 0)(11 11) |(1 1)(0 0)| 0

 3153 10:00:02.482886  3 2 28 |3c3c 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 3154 10:00:02.486333  3 3 0 |202 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 3155 10:00:02.492402  3 3 4 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 3156 10:00:02.496150  3 3 8 |2625 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 3157 10:00:02.499778  3 3 12 |3534 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 3158 10:00:02.506162  [Byte 0] Lead/lag falling Transition (3, 3, 12)

 3159 10:00:02.509334  3 3 16 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 3160 10:00:02.512785  3 3 20 |3534 3534  |(11 11)(11 11) |(0 1)(1 1)| 0

 3161 10:00:02.516392  [Byte 1] Lead/lag Transition tap number (1)

 3162 10:00:02.522447  3 3 24 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 3163 10:00:02.526451  3 3 28 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 3164 10:00:02.529626  3 4 0 |3534 3534  |(11 11)(11 11) |(0 1)(0 0)| 0

 3165 10:00:02.535885  3 4 4 |3534 3534  |(11 11)(11 11) |(1 1)(0 0)| 0

 3166 10:00:02.539125  3 4 8 |1515 3534  |(11 11)(11 11) |(1 1)(0 1)| 0

 3167 10:00:02.542621  3 4 12 |3d3d 3534  |(11 11)(11 11) |(1 1)(1 1)| 0

 3168 10:00:02.548719  3 4 16 |3d3d e0e  |(11 11)(11 11) |(1 1)(1 1)| 0

 3169 10:00:02.552715  3 4 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3170 10:00:02.555703  3 4 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3171 10:00:02.562329  3 4 28 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3172 10:00:02.565594  3 5 0 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3173 10:00:02.568734  3 5 4 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3174 10:00:02.575321  3 5 8 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3175 10:00:02.578600  3 5 12 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3176 10:00:02.582017  3 5 16 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3177 10:00:02.589015  3 5 20 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3178 10:00:02.592085  3 5 24 |3d3d 3d3d  |(11 11)(11 11) |(1 1)(1 1)| 0

 3179 10:00:02.595228  [Byte 0] Lead/lag falling Transition (3, 5, 24)

 3180 10:00:02.598872  3 5 28 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 3181 10:00:02.605300  3 6 0 |3d3d 3d3d  |(11 11)(11 11) |(1 0)(1 1)| 0

 3182 10:00:02.608810  [Byte 0] Lead/lag Transition tap number (3)

 3183 10:00:02.611848  3 6 4 |3e3d 3d3d  |(11 11)(11 11) |(0 0)(1 1)| 0

 3184 10:00:02.615482  [Byte 1] Lead/lag falling Transition (3, 6, 4)

 3185 10:00:02.622078  3 6 8 |1616 3d3d  |(11 11)(11 11) |(0 0)(1 0)| 0

 3186 10:00:02.625697  [Byte 1] Lead/lag Transition tap number (2)

 3187 10:00:02.628667  3 6 12 |4646 3e3d  |(0 0)(11 11) |(0 0)(0 0)| 0

 3188 10:00:02.632042  [Byte 0]First pass (3, 6, 12)

 3189 10:00:02.635095  3 6 16 |4646 202  |(0 0)(11 11) |(0 0)(0 0)| 0

 3190 10:00:02.638577  3 6 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3191 10:00:02.642461  [Byte 1]First pass (3, 6, 20)

 3192 10:00:02.645229  3 6 24 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3193 10:00:02.651750  3 6 28 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3194 10:00:02.655355  3 7 0 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3195 10:00:02.658332  3 7 4 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3196 10:00:02.662031  3 7 8 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3197 10:00:02.665258  3 7 12 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3198 10:00:02.671894  3 7 16 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3199 10:00:02.675270  3 7 20 |4646 4646  |(0 0)(0 0) |(0 0)(0 0)| 0

 3200 10:00:02.679002  All bytes gating window > 1UI, Early break!

 3201 10:00:02.679454  

 3202 10:00:02.681958  best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)

 3203 10:00:02.682526  

 3204 10:00:02.685570  best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)

 3205 10:00:02.686089  

 3206 10:00:02.686416  

 3207 10:00:02.686805  

 3208 10:00:02.692201  best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)

 3209 10:00:02.692760  

 3210 10:00:02.694987  best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)

 3211 10:00:02.695401  

 3212 10:00:02.695777  

 3213 10:00:02.698622  Write Rank1 MR1 =0x56

 3214 10:00:02.699155  

 3215 10:00:02.699528  best RODT dly(2T, 0.5T) = (2, 2)

 3216 10:00:02.702188  

 3217 10:00:02.702787  best RODT dly(2T, 0.5T) = (2, 3)

 3218 10:00:02.705091  ==

 3219 10:00:02.708594  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3220 10:00:02.711437  fsp= 1, odt_onoff= 1, Byte mode= 0

 3221 10:00:02.711919  ==

 3222 10:00:02.715041  Start DQ dly to find pass range UseTestEngine =0

 3223 10:00:02.718674  x-axis: bit #, y-axis: DQ dly (-127~63)

 3224 10:00:02.721483  RX Vref Scan = 0

 3225 10:00:02.724947  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3226 10:00:02.728289  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3227 10:00:02.731521  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3228 10:00:02.731952  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3229 10:00:02.734943  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3230 10:00:02.738125  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3231 10:00:02.741335  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3232 10:00:02.745570  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3233 10:00:02.748140  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3234 10:00:02.751657  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3235 10:00:02.755083  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3236 10:00:02.755657  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3237 10:00:02.758261  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3238 10:00:02.761775  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3239 10:00:02.764813  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3240 10:00:02.768403  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3241 10:00:02.771866  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3242 10:00:02.775220  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3243 10:00:02.778412  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3244 10:00:02.778935  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3245 10:00:02.781602  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3246 10:00:02.785084  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3247 10:00:02.788371  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3248 10:00:02.791712  -3, [0] xxxxxxxx xxxxxxxo [MSB]

 3249 10:00:02.794762  -2, [0] xxxoxxxx xoxxxxxo [MSB]

 3250 10:00:02.798269  -1, [0] xxxoxxxx xoxxxxxo [MSB]

 3251 10:00:02.798792  0, [0] xxooxxxx ooxxxxxo [MSB]

 3252 10:00:02.801493  1, [0] xxooxxxx ooxxxxxo [MSB]

 3253 10:00:02.804726  2, [0] xxooxxxx ooxxxxxo [MSB]

 3254 10:00:02.808226  3, [0] oxoooxxo oooxxxxo [MSB]

 3255 10:00:02.811365  4, [0] xxoooxxo oooxxxxo [MSB]

 3256 10:00:02.814634  5, [0] oooooxoo ooooooxo [MSB]

 3257 10:00:02.815196  6, [0] oooooooo ooooooxo [MSB]

 3258 10:00:02.818621  32, [0] oooooooo ooooooox [MSB]

 3259 10:00:02.821028  33, [0] oooooooo ooooooox [MSB]

 3260 10:00:02.824429  34, [0] oooooooo ooooooox [MSB]

 3261 10:00:02.827680  35, [0] oooxoooo xxooooox [MSB]

 3262 10:00:02.831147  36, [0] oooxoooo xxooooox [MSB]

 3263 10:00:02.834751  37, [0] ooxxoooo xxooooox [MSB]

 3264 10:00:02.835321  38, [0] ooxxoooo xxooooox [MSB]

 3265 10:00:02.838274  39, [0] oxxxxoox xxooooox [MSB]

 3266 10:00:02.841357  40, [0] oxxxxoox xxxoooox [MSB]

 3267 10:00:02.844740  41, [0] oxxxxoox xxxxxxox [MSB]

 3268 10:00:02.847512  42, [0] xxxxxxxx xxxxxxxx [MSB]

 3269 10:00:02.851327  iDelay=42, Bit 0, Center 23 (5 ~ 41) 37

 3270 10:00:02.854643  iDelay=42, Bit 1, Center 21 (5 ~ 38) 34

 3271 10:00:02.857869  iDelay=42, Bit 2, Center 18 (0 ~ 36) 37

 3272 10:00:02.861387  iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37

 3273 10:00:02.864717  iDelay=42, Bit 4, Center 20 (3 ~ 38) 36

 3274 10:00:02.868084  iDelay=42, Bit 5, Center 23 (6 ~ 41) 36

 3275 10:00:02.871678  iDelay=42, Bit 6, Center 23 (5 ~ 41) 37

 3276 10:00:02.874890  iDelay=42, Bit 7, Center 20 (3 ~ 38) 36

 3277 10:00:02.878181  iDelay=42, Bit 8, Center 17 (0 ~ 34) 35

 3278 10:00:02.881229  iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37

 3279 10:00:02.887904  iDelay=42, Bit 10, Center 21 (3 ~ 39) 37

 3280 10:00:02.891255  iDelay=42, Bit 11, Center 22 (5 ~ 40) 36

 3281 10:00:02.894588  iDelay=42, Bit 12, Center 22 (5 ~ 40) 36

 3282 10:00:02.897703  iDelay=42, Bit 13, Center 22 (5 ~ 40) 36

 3283 10:00:02.901184  iDelay=42, Bit 14, Center 24 (7 ~ 41) 35

 3284 10:00:02.904499  iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35

 3285 10:00:02.904917  ==

 3286 10:00:02.911095  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3287 10:00:02.914143  fsp= 1, odt_onoff= 1, Byte mode= 0

 3288 10:00:02.914628  ==

 3289 10:00:02.915026  DQS Delay:

 3290 10:00:02.915342  DQS0 = 0, DQS1 = 0

 3291 10:00:02.917374  DQM Delay:

 3292 10:00:02.917787  DQM0 = 20, DQM1 = 19

 3293 10:00:02.921109  DQ Delay:

 3294 10:00:02.924303  DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16

 3295 10:00:02.927650  DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20

 3296 10:00:02.930794  DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22

 3297 10:00:02.934395  DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =14

 3298 10:00:02.935132  

 3299 10:00:02.935727  

 3300 10:00:02.936064  DramC Write-DBI off

 3301 10:00:02.936640  ==

 3302 10:00:02.940768  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3303 10:00:02.944572  fsp= 1, odt_onoff= 1, Byte mode= 0

 3304 10:00:02.945144  ==

 3305 10:00:02.947736  [TxWindowPerbitCal] calType=2, VrefScanEnable 0

 3306 10:00:02.948127  

 3307 10:00:02.950999  Begin, DQ Scan Range 921~1177

 3308 10:00:02.951443  

 3309 10:00:02.951784  

 3310 10:00:02.954403  	TX Vref Scan disable

 3311 10:00:02.957597  921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]

 3312 10:00:02.960868  922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]

 3313 10:00:02.963918  923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]

 3314 10:00:02.967643  924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]

 3315 10:00:02.970661  925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]

 3316 10:00:02.974422  926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]

 3317 10:00:02.977395  927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]

 3318 10:00:02.980844  928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]

 3319 10:00:02.984235  929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]

 3320 10:00:02.987330  930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]

 3321 10:00:02.990826  931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]

 3322 10:00:02.994352  932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]

 3323 10:00:02.997534  933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]

 3324 10:00:03.003999  934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]

 3325 10:00:03.007808  935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]

 3326 10:00:03.010579  936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]

 3327 10:00:03.014521  937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]

 3328 10:00:03.017722  938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]

 3329 10:00:03.020940  939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3330 10:00:03.023994  940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]

 3331 10:00:03.027779  941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]

 3332 10:00:03.030866  942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]

 3333 10:00:03.034381  943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3334 10:00:03.037420  944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]

 3335 10:00:03.040590  945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]

 3336 10:00:03.043979  946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]

 3337 10:00:03.047528  947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]

 3338 10:00:03.051034  948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]

 3339 10:00:03.054462  949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]

 3340 10:00:03.060723  950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]

 3341 10:00:03.063939  951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]

 3342 10:00:03.067186  952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]

 3343 10:00:03.070913  953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]

 3344 10:00:03.074496  954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]

 3345 10:00:03.077366  955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3346 10:00:03.080774  956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3347 10:00:03.084106  957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3348 10:00:03.087284  958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3349 10:00:03.090439  959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3350 10:00:03.093915  960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3351 10:00:03.096702  961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3352 10:00:03.100684  962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3353 10:00:03.104145  963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3354 10:00:03.107063  964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3355 10:00:03.110881  965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3356 10:00:03.113864  966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3357 10:00:03.117094  967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 3358 10:00:03.120028  968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 3359 10:00:03.127069  969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]

 3360 10:00:03.130122  970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]

 3361 10:00:03.133612  971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]

 3362 10:00:03.136897  972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]

 3363 10:00:03.139967  973 |3 6 13|[0] xxxxxxxx oooxxooo [MSB]

 3364 10:00:03.143563  974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]

 3365 10:00:03.146891  975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]

 3366 10:00:03.150023  976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]

 3367 10:00:03.153242  977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]

 3368 10:00:03.156513  978 |3 6 18|[0] xxooxxxx oooooooo [MSB]

 3369 10:00:03.159826  979 |3 6 19|[0] xooooxox oooooooo [MSB]

 3370 10:00:03.163269  980 |3 6 20|[0] xooooooo oooooooo [MSB]

 3371 10:00:03.169685  986 |3 6 26|[0] oooooooo ooooooox [MSB]

 3372 10:00:03.173470  987 |3 6 27|[0] oooooooo ooooooox [MSB]

 3373 10:00:03.176806  988 |3 6 28|[0] oooooooo ooooooox [MSB]

 3374 10:00:03.179966  989 |3 6 29|[0] oooooooo ooooooox [MSB]

 3375 10:00:03.183465  990 |3 6 30|[0] oooooooo ooooooox [MSB]

 3376 10:00:03.186485  991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]

 3377 10:00:03.190090  992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]

 3378 10:00:03.193020  993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]

 3379 10:00:03.196871  994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]

 3380 10:00:03.200200  995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]

 3381 10:00:03.203514  996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]

 3382 10:00:03.206694  997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]

 3383 10:00:03.209865  998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]

 3384 10:00:03.213086  999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]

 3385 10:00:03.216403  1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]

 3386 10:00:03.223175  1001 |3 6 41|[0] ooxxxoox xxxxxxxx [MSB]

 3387 10:00:03.226791  1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]

 3388 10:00:03.229767  1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]

 3389 10:00:03.233060  Byte0, DQ PI dly=989, DQM PI dly= 989

 3390 10:00:03.236203  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)

 3391 10:00:03.236622  

 3392 10:00:03.240014  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)

 3393 10:00:03.240434  

 3394 10:00:03.243225  Byte1, DQ PI dly=979, DQM PI dly= 979

 3395 10:00:03.249690  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)

 3396 10:00:03.250201  

 3397 10:00:03.253489  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)

 3398 10:00:03.254023  

 3399 10:00:03.254357  ==

 3400 10:00:03.259846  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3401 10:00:03.263515  fsp= 1, odt_onoff= 1, Byte mode= 0

 3402 10:00:03.264078  ==

 3403 10:00:03.266612  [TxWindowPerbitCal] calType=0, VrefScanEnable 1

 3404 10:00:03.267194  

 3405 10:00:03.269790  Begin, DQ Scan Range 955~1019

 3406 10:00:03.270245  Write Rank1 MR14 =0x0

 3407 10:00:03.280630  

 3408 10:00:03.281189  	CH=1, VrefRange= 0, VrefLevel = 0

 3409 10:00:03.286885  TX Bit0 (984~998) 15 991,   Bit8 (972~984) 13 978,

 3410 10:00:03.290017  TX Bit1 (982~997) 16 989,   Bit9 (972~984) 13 978,

 3411 10:00:03.296911  TX Bit2 (980~994) 15 987,   Bit10 (976~986) 11 981,

 3412 10:00:03.300162  TX Bit3 (979~991) 13 985,   Bit11 (976~988) 13 982,

 3413 10:00:03.303883  TX Bit4 (982~996) 15 989,   Bit12 (976~985) 10 980,

 3414 10:00:03.310356  TX Bit5 (983~999) 17 991,   Bit13 (976~989) 14 982,

 3415 10:00:03.313558  TX Bit6 (983~998) 16 990,   Bit14 (976~985) 10 980,

 3416 10:00:03.316619  TX Bit7 (984~995) 12 989,   Bit15 (970~980) 11 975,

 3417 10:00:03.319827  

 3418 10:00:03.320397  Write Rank1 MR14 =0x2

 3419 10:00:03.329111  

 3420 10:00:03.329658  	CH=1, VrefRange= 0, VrefLevel = 2

 3421 10:00:03.335776  TX Bit0 (983~999) 17 991,   Bit8 (971~985) 15 978,

 3422 10:00:03.339075  TX Bit1 (982~997) 16 989,   Bit9 (971~985) 15 978,

 3423 10:00:03.346569  TX Bit2 (980~995) 16 987,   Bit10 (975~987) 13 981,

 3424 10:00:03.348978  TX Bit3 (978~991) 14 984,   Bit11 (976~989) 14 982,

 3425 10:00:03.352484  TX Bit4 (981~997) 17 989,   Bit12 (976~988) 13 982,

 3426 10:00:03.359117  TX Bit5 (983~999) 17 991,   Bit13 (976~990) 15 983,

 3427 10:00:03.362373  TX Bit6 (982~998) 17 990,   Bit14 (976~986) 11 981,

 3428 10:00:03.365901  TX Bit7 (984~996) 13 990,   Bit15 (969~980) 12 974,

 3429 10:00:03.366429  

 3430 10:00:03.369049  Write Rank1 MR14 =0x4

 3431 10:00:03.378146  

 3432 10:00:03.378667  	CH=1, VrefRange= 0, VrefLevel = 4

 3433 10:00:03.384578  TX Bit0 (983~999) 17 991,   Bit8 (971~985) 15 978,

 3434 10:00:03.388061  TX Bit1 (981~998) 18 989,   Bit9 (971~985) 15 978,

 3435 10:00:03.394742  TX Bit2 (979~997) 19 988,   Bit10 (975~988) 14 981,

 3436 10:00:03.397950  TX Bit3 (978~992) 15 985,   Bit11 (975~990) 16 982,

 3437 10:00:03.401180  TX Bit4 (981~998) 18 989,   Bit12 (976~988) 13 982,

 3438 10:00:03.408153  TX Bit5 (983~999) 17 991,   Bit13 (976~990) 15 983,

 3439 10:00:03.411227  TX Bit6 (982~998) 17 990,   Bit14 (976~988) 13 982,

 3440 10:00:03.414610  TX Bit7 (983~997) 15 990,   Bit15 (969~982) 14 975,

 3441 10:00:03.415033  

 3442 10:00:03.417939  Write Rank1 MR14 =0x6

 3443 10:00:03.427162  

 3444 10:00:03.427738  	CH=1, VrefRange= 0, VrefLevel = 6

 3445 10:00:03.433472  TX Bit0 (982~1000) 19 991,   Bit8 (970~986) 17 978,

 3446 10:00:03.437141  TX Bit1 (981~998) 18 989,   Bit9 (971~986) 16 978,

 3447 10:00:03.443776  TX Bit2 (979~997) 19 988,   Bit10 (974~989) 16 981,

 3448 10:00:03.447441  TX Bit3 (978~993) 16 985,   Bit11 (975~990) 16 982,

 3449 10:00:03.450692  TX Bit4 (980~998) 19 989,   Bit12 (976~989) 14 982,

 3450 10:00:03.457356  TX Bit5 (982~999) 18 990,   Bit13 (975~991) 17 983,

 3451 10:00:03.460111  TX Bit6 (981~999) 19 990,   Bit14 (975~988) 14 981,

 3452 10:00:03.463582  TX Bit7 (983~998) 16 990,   Bit15 (969~983) 15 976,

 3453 10:00:03.466768  

 3454 10:00:03.467288  Write Rank1 MR14 =0x8

 3455 10:00:03.476326  

 3456 10:00:03.476853  	CH=1, VrefRange= 0, VrefLevel = 8

 3457 10:00:03.483140  TX Bit0 (982~1000) 19 991,   Bit8 (970~986) 17 978,

 3458 10:00:03.486476  TX Bit1 (980~999) 20 989,   Bit9 (971~986) 16 978,

 3459 10:00:03.492636  TX Bit2 (979~998) 20 988,   Bit10 (975~989) 15 982,

 3460 10:00:03.496344  TX Bit3 (978~994) 17 986,   Bit11 (975~991) 17 983,

 3461 10:00:03.499589  TX Bit4 (981~999) 19 990,   Bit12 (976~990) 15 983,

 3462 10:00:03.505852  TX Bit5 (982~1000) 19 991,   Bit13 (975~991) 17 983,

 3463 10:00:03.509615  TX Bit6 (981~999) 19 990,   Bit14 (975~990) 16 982,

 3464 10:00:03.513077  TX Bit7 (983~998) 16 990,   Bit15 (969~983) 15 976,

 3465 10:00:03.516346  

 3466 10:00:03.516858  Write Rank1 MR14 =0xa

 3467 10:00:03.525891  

 3468 10:00:03.526601  	CH=1, VrefRange= 0, VrefLevel = 10

 3469 10:00:03.532211  TX Bit0 (982~1001) 20 991,   Bit8 (970~987) 18 978,

 3470 10:00:03.535844  TX Bit1 (980~999) 20 989,   Bit9 (971~987) 17 979,

 3471 10:00:03.542268  TX Bit2 (978~998) 21 988,   Bit10 (974~991) 18 982,

 3472 10:00:03.545639  TX Bit3 (977~995) 19 986,   Bit11 (974~991) 18 982,

 3473 10:00:03.548860  TX Bit4 (980~999) 20 989,   Bit12 (974~991) 18 982,

 3474 10:00:03.555851  TX Bit5 (982~1001) 20 991,   Bit13 (975~992) 18 983,

 3475 10:00:03.559399  TX Bit6 (980~999) 20 989,   Bit14 (974~991) 18 982,

 3476 10:00:03.562309  TX Bit7 (982~999) 18 990,   Bit15 (969~984) 16 976,

 3477 10:00:03.565649  

 3478 10:00:03.566199  Write Rank1 MR14 =0xc

 3479 10:00:03.575309  

 3480 10:00:03.578688  	CH=1, VrefRange= 0, VrefLevel = 12

 3481 10:00:03.581758  TX Bit0 (981~1001) 21 991,   Bit8 (970~988) 19 979,

 3482 10:00:03.585349  TX Bit1 (980~1000) 21 990,   Bit9 (970~988) 19 979,

 3483 10:00:03.591962  TX Bit2 (978~998) 21 988,   Bit10 (973~991) 19 982,

 3484 10:00:03.595672  TX Bit3 (978~996) 19 987,   Bit11 (974~991) 18 982,

 3485 10:00:03.598875  TX Bit4 (979~1000) 22 989,   Bit12 (974~991) 18 982,

 3486 10:00:03.605536  TX Bit5 (981~1001) 21 991,   Bit13 (975~992) 18 983,

 3487 10:00:03.608361  TX Bit6 (980~1000) 21 990,   Bit14 (973~991) 19 982,

 3488 10:00:03.615171  TX Bit7 (982~999) 18 990,   Bit15 (968~984) 17 976,

 3489 10:00:03.615770  

 3490 10:00:03.616139  Write Rank1 MR14 =0xe

 3491 10:00:03.625389  

 3492 10:00:03.628197  	CH=1, VrefRange= 0, VrefLevel = 14

 3493 10:00:03.631789  TX Bit0 (981~1002) 22 991,   Bit8 (970~989) 20 979,

 3494 10:00:03.635479  TX Bit1 (980~1000) 21 990,   Bit9 (970~988) 19 979,

 3495 10:00:03.641785  TX Bit2 (978~999) 22 988,   Bit10 (972~991) 20 981,

 3496 10:00:03.645099  TX Bit3 (977~997) 21 987,   Bit11 (974~992) 19 983,

 3497 10:00:03.648530  TX Bit4 (979~1000) 22 989,   Bit12 (974~991) 18 982,

 3498 10:00:03.655569  TX Bit5 (981~1002) 22 991,   Bit13 (974~992) 19 983,

 3499 10:00:03.658324  TX Bit6 (980~1001) 22 990,   Bit14 (973~991) 19 982,

 3500 10:00:03.664735  TX Bit7 (982~999) 18 990,   Bit15 (968~985) 18 976,

 3501 10:00:03.665311  

 3502 10:00:03.665679  Write Rank1 MR14 =0x10

 3503 10:00:03.675213  

 3504 10:00:03.678427  	CH=1, VrefRange= 0, VrefLevel = 16

 3505 10:00:03.681649  TX Bit0 (981~1002) 22 991,   Bit8 (969~989) 21 979,

 3506 10:00:03.685240  TX Bit1 (979~1001) 23 990,   Bit9 (970~989) 20 979,

 3507 10:00:03.691733  TX Bit2 (978~999) 22 988,   Bit10 (972~991) 20 981,

 3508 10:00:03.695702  TX Bit3 (977~997) 21 987,   Bit11 (973~992) 20 982,

 3509 10:00:03.698662  TX Bit4 (979~1000) 22 989,   Bit12 (973~992) 20 982,

 3510 10:00:03.705234  TX Bit5 (980~1002) 23 991,   Bit13 (973~993) 21 983,

 3511 10:00:03.708421  TX Bit6 (979~1001) 23 990,   Bit14 (972~991) 20 981,

 3512 10:00:03.714673  TX Bit7 (981~1000) 20 990,   Bit15 (968~985) 18 976,

 3513 10:00:03.715227  

 3514 10:00:03.715632  Write Rank1 MR14 =0x12

 3515 10:00:03.725667  

 3516 10:00:03.728882  	CH=1, VrefRange= 0, VrefLevel = 18

 3517 10:00:03.732446  TX Bit0 (980~1003) 24 991,   Bit8 (969~991) 23 980,

 3518 10:00:03.735256  TX Bit1 (979~1001) 23 990,   Bit9 (969~990) 22 979,

 3519 10:00:03.741932  TX Bit2 (978~1000) 23 989,   Bit10 (972~992) 21 982,

 3520 10:00:03.745645  TX Bit3 (977~998) 22 987,   Bit11 (973~993) 21 983,

 3521 10:00:03.749179  TX Bit4 (979~1001) 23 990,   Bit12 (973~992) 20 982,

 3522 10:00:03.755679  TX Bit5 (980~1003) 24 991,   Bit13 (973~993) 21 983,

 3523 10:00:03.758812  TX Bit6 (979~1001) 23 990,   Bit14 (971~992) 22 981,

 3524 10:00:03.765057  TX Bit7 (980~1000) 21 990,   Bit15 (968~986) 19 977,

 3525 10:00:03.765519  

 3526 10:00:03.765880  Write Rank1 MR14 =0x14

 3527 10:00:03.775868  

 3528 10:00:03.779221  	CH=1, VrefRange= 0, VrefLevel = 20

 3529 10:00:03.782296  TX Bit0 (980~1004) 25 992,   Bit8 (969~991) 23 980,

 3530 10:00:03.786109  TX Bit1 (979~1002) 24 990,   Bit9 (970~990) 21 980,

 3531 10:00:03.792272  TX Bit2 (978~1000) 23 989,   Bit10 (972~992) 21 982,

 3532 10:00:03.795918  TX Bit3 (976~998) 23 987,   Bit11 (973~993) 21 983,

 3533 10:00:03.798984  TX Bit4 (978~1001) 24 989,   Bit12 (972~992) 21 982,

 3534 10:00:03.805502  TX Bit5 (980~1003) 24 991,   Bit13 (973~993) 21 983,

 3535 10:00:03.809184  TX Bit6 (979~1002) 24 990,   Bit14 (972~992) 21 982,

 3536 10:00:03.815780  TX Bit7 (980~1000) 21 990,   Bit15 (967~986) 20 976,

 3537 10:00:03.816306  

 3538 10:00:03.816640  Write Rank1 MR14 =0x16

 3539 10:00:03.826441  

 3540 10:00:03.829634  	CH=1, VrefRange= 0, VrefLevel = 22

 3541 10:00:03.832763  TX Bit0 (979~1004) 26 991,   Bit8 (969~991) 23 980,

 3542 10:00:03.836094  TX Bit1 (979~1002) 24 990,   Bit9 (969~991) 23 980,

 3543 10:00:03.842652  TX Bit2 (977~1000) 24 988,   Bit10 (971~992) 22 981,

 3544 10:00:03.846296  TX Bit3 (976~999) 24 987,   Bit11 (972~993) 22 982,

 3545 10:00:03.849553  TX Bit4 (978~1002) 25 990,   Bit12 (972~993) 22 982,

 3546 10:00:03.856417  TX Bit5 (979~1004) 26 991,   Bit13 (973~994) 22 983,

 3547 10:00:03.859766  TX Bit6 (979~1002) 24 990,   Bit14 (972~992) 21 982,

 3548 10:00:03.866387  TX Bit7 (980~1001) 22 990,   Bit15 (967~987) 21 977,

 3549 10:00:03.866908  

 3550 10:00:03.867241  Write Rank1 MR14 =0x18

 3551 10:00:03.877277  

 3552 10:00:03.880404  	CH=1, VrefRange= 0, VrefLevel = 24

 3553 10:00:03.883676  TX Bit0 (979~1005) 27 992,   Bit8 (969~991) 23 980,

 3554 10:00:03.887557  TX Bit1 (979~1003) 25 991,   Bit9 (970~991) 22 980,

 3555 10:00:03.893528  TX Bit2 (977~1000) 24 988,   Bit10 (970~993) 24 981,

 3556 10:00:03.897116  TX Bit3 (976~999) 24 987,   Bit11 (971~994) 24 982,

 3557 10:00:03.900184  TX Bit4 (978~1003) 26 990,   Bit12 (972~993) 22 982,

 3558 10:00:03.906918  TX Bit5 (979~1005) 27 992,   Bit13 (972~994) 23 983,

 3559 10:00:03.910361  TX Bit6 (978~1003) 26 990,   Bit14 (971~993) 23 982,

 3560 10:00:03.917034  TX Bit7 (980~1002) 23 991,   Bit15 (967~987) 21 977,

 3561 10:00:03.917707  

 3562 10:00:03.918132  Write Rank1 MR14 =0x1a

 3563 10:00:03.927903  

 3564 10:00:03.928676  	CH=1, VrefRange= 0, VrefLevel = 26

 3565 10:00:03.934536  TX Bit0 (979~1005) 27 992,   Bit8 (968~992) 25 980,

 3566 10:00:03.937804  TX Bit1 (978~1003) 26 990,   Bit9 (969~991) 23 980,

 3567 10:00:03.944414  TX Bit2 (977~1001) 25 989,   Bit10 (970~993) 24 981,

 3568 10:00:03.947918  TX Bit3 (976~999) 24 987,   Bit11 (971~994) 24 982,

 3569 10:00:03.950953  TX Bit4 (978~1003) 26 990,   Bit12 (972~993) 22 982,

 3570 10:00:03.957854  TX Bit5 (979~1005) 27 992,   Bit13 (972~995) 24 983,

 3571 10:00:03.960884  TX Bit6 (978~1004) 27 991,   Bit14 (971~993) 23 982,

 3572 10:00:03.967211  TX Bit7 (979~1002) 24 990,   Bit15 (966~987) 22 976,

 3573 10:00:03.967867  

 3574 10:00:03.968443  Write Rank1 MR14 =0x1c

 3575 10:00:03.978599  

 3576 10:00:03.981904  	CH=1, VrefRange= 0, VrefLevel = 28

 3577 10:00:03.985200  TX Bit0 (979~1006) 28 992,   Bit8 (969~992) 24 980,

 3578 10:00:03.988288  TX Bit1 (978~1004) 27 991,   Bit9 (969~992) 24 980,

 3579 10:00:03.994994  TX Bit2 (977~1001) 25 989,   Bit10 (970~994) 25 982,

 3580 10:00:03.998219  TX Bit3 (976~999) 24 987,   Bit11 (971~994) 24 982,

 3581 10:00:04.001726  TX Bit4 (978~1004) 27 991,   Bit12 (971~994) 24 982,

 3582 10:00:04.008397  TX Bit5 (979~1005) 27 992,   Bit13 (971~995) 25 983,

 3583 10:00:04.011316  TX Bit6 (978~1004) 27 991,   Bit14 (971~993) 23 982,

 3584 10:00:04.018301  TX Bit7 (979~1002) 24 990,   Bit15 (966~989) 24 977,

 3585 10:00:04.018813  

 3586 10:00:04.019240  Write Rank1 MR14 =0x1e

 3587 10:00:04.029187  

 3588 10:00:04.032510  	CH=1, VrefRange= 0, VrefLevel = 30

 3589 10:00:04.035967  TX Bit0 (978~1006) 29 992,   Bit8 (968~991) 24 979,

 3590 10:00:04.039528  TX Bit1 (978~1005) 28 991,   Bit9 (968~991) 24 979,

 3591 10:00:04.046264  TX Bit2 (977~1002) 26 989,   Bit10 (970~994) 25 982,

 3592 10:00:04.049553  TX Bit3 (975~999) 25 987,   Bit11 (970~994) 25 982,

 3593 10:00:04.052723  TX Bit4 (978~1004) 27 991,   Bit12 (971~994) 24 982,

 3594 10:00:04.058989  TX Bit5 (979~1005) 27 992,   Bit13 (971~994) 24 982,

 3595 10:00:04.062579  TX Bit6 (978~1005) 28 991,   Bit14 (971~994) 24 982,

 3596 10:00:04.068840  TX Bit7 (978~1004) 27 991,   Bit15 (965~990) 26 977,

 3597 10:00:04.069354  

 3598 10:00:04.069687  Write Rank1 MR14 =0x20

 3599 10:00:04.080206  

 3600 10:00:04.083932  	CH=1, VrefRange= 0, VrefLevel = 32

 3601 10:00:04.087251  TX Bit0 (978~1006) 29 992,   Bit8 (968~991) 24 979,

 3602 10:00:04.090179  TX Bit1 (978~1005) 28 991,   Bit9 (968~991) 24 979,

 3603 10:00:04.096904  TX Bit2 (977~1002) 26 989,   Bit10 (970~994) 25 982,

 3604 10:00:04.100075  TX Bit3 (975~999) 25 987,   Bit11 (970~994) 25 982,

 3605 10:00:04.103654  TX Bit4 (978~1004) 27 991,   Bit12 (971~994) 24 982,

 3606 10:00:04.110076  TX Bit5 (979~1005) 27 992,   Bit13 (971~994) 24 982,

 3607 10:00:04.113021  TX Bit6 (978~1005) 28 991,   Bit14 (971~994) 24 982,

 3608 10:00:04.119944  TX Bit7 (978~1004) 27 991,   Bit15 (965~990) 26 977,

 3609 10:00:04.120456  

 3610 10:00:04.120787  Write Rank1 MR14 =0x22

 3611 10:00:04.130954  

 3612 10:00:04.134194  	CH=1, VrefRange= 0, VrefLevel = 34

 3613 10:00:04.137959  TX Bit0 (978~1006) 29 992,   Bit8 (968~991) 24 979,

 3614 10:00:04.141044  TX Bit1 (978~1005) 28 991,   Bit9 (968~991) 24 979,

 3615 10:00:04.147196  TX Bit2 (977~1002) 26 989,   Bit10 (970~994) 25 982,

 3616 10:00:04.150764  TX Bit3 (975~999) 25 987,   Bit11 (970~994) 25 982,

 3617 10:00:04.153776  TX Bit4 (978~1004) 27 991,   Bit12 (971~994) 24 982,

 3618 10:00:04.160528  TX Bit5 (979~1005) 27 992,   Bit13 (971~994) 24 982,

 3619 10:00:04.164192  TX Bit6 (978~1005) 28 991,   Bit14 (971~994) 24 982,

 3620 10:00:04.170958  TX Bit7 (978~1004) 27 991,   Bit15 (965~990) 26 977,

 3621 10:00:04.171603  

 3622 10:00:04.171951  Write Rank1 MR14 =0x24

 3623 10:00:04.181521  

 3624 10:00:04.184600  	CH=1, VrefRange= 0, VrefLevel = 36

 3625 10:00:04.188239  TX Bit0 (978~1006) 29 992,   Bit8 (968~991) 24 979,

 3626 10:00:04.191611  TX Bit1 (978~1005) 28 991,   Bit9 (968~991) 24 979,

 3627 10:00:04.198239  TX Bit2 (977~1002) 26 989,   Bit10 (970~994) 25 982,

 3628 10:00:04.201807  TX Bit3 (975~999) 25 987,   Bit11 (970~994) 25 982,

 3629 10:00:04.205024  TX Bit4 (978~1004) 27 991,   Bit12 (971~994) 24 982,

 3630 10:00:04.211565  TX Bit5 (979~1005) 27 992,   Bit13 (971~994) 24 982,

 3631 10:00:04.214957  TX Bit6 (978~1005) 28 991,   Bit14 (971~994) 24 982,

 3632 10:00:04.221441  TX Bit7 (978~1004) 27 991,   Bit15 (965~990) 26 977,

 3633 10:00:04.221957  

 3634 10:00:04.222286  

 3635 10:00:04.224402  TX Vref found, early break! 389< 392

 3636 10:00:04.227906  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps

 3637 10:00:04.231139  u1DelayCellOfst[0]=6 cells (5 PI)

 3638 10:00:04.234591  u1DelayCellOfst[1]=5 cells (4 PI)

 3639 10:00:04.237878  u1DelayCellOfst[2]=2 cells (2 PI)

 3640 10:00:04.241650  u1DelayCellOfst[3]=0 cells (0 PI)

 3641 10:00:04.244492  u1DelayCellOfst[4]=5 cells (4 PI)

 3642 10:00:04.247690  u1DelayCellOfst[5]=6 cells (5 PI)

 3643 10:00:04.248111  u1DelayCellOfst[6]=5 cells (4 PI)

 3644 10:00:04.251212  u1DelayCellOfst[7]=5 cells (4 PI)

 3645 10:00:04.254531  Byte0, DQ PI dly=987, DQM PI dly= 989

 3646 10:00:04.261370  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)

 3647 10:00:04.261875  

 3648 10:00:04.264895  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)

 3649 10:00:04.265408  

 3650 10:00:04.268272  u1DelayCellOfst[8]=2 cells (2 PI)

 3651 10:00:04.271768  u1DelayCellOfst[9]=2 cells (2 PI)

 3652 10:00:04.274850  u1DelayCellOfst[10]=6 cells (5 PI)

 3653 10:00:04.278310  u1DelayCellOfst[11]=6 cells (5 PI)

 3654 10:00:04.281268  u1DelayCellOfst[12]=6 cells (5 PI)

 3655 10:00:04.284451  u1DelayCellOfst[13]=6 cells (5 PI)

 3656 10:00:04.287668  u1DelayCellOfst[14]=6 cells (5 PI)

 3657 10:00:04.291265  u1DelayCellOfst[15]=0 cells (0 PI)

 3658 10:00:04.294084  Byte1, DQ PI dly=977, DQM PI dly= 979

 3659 10:00:04.297703  Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)

 3660 10:00:04.298126  

 3661 10:00:04.301041  OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)

 3662 10:00:04.301576  

 3663 10:00:04.304297  Write Rank1 MR14 =0x1e

 3664 10:00:04.304812  

 3665 10:00:04.308006  Final TX Range 0 Vref 30

 3666 10:00:04.308531  

 3667 10:00:04.314194  [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.

 3668 10:00:04.314711  

 3669 10:00:04.320845  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3670 10:00:04.327805  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3671 10:00:04.334087  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3672 10:00:04.334514  Write Rank1 MR3 =0xb0

 3673 10:00:04.337760  DramC Write-DBI on

 3674 10:00:04.338277  ==

 3675 10:00:04.344318  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3676 10:00:04.344819  fsp= 1, odt_onoff= 1, Byte mode= 0

 3677 10:00:04.347507  ==

 3678 10:00:04.351122  [TxWindowPerbitCal] calType=1, VrefScanEnable 0

 3679 10:00:04.351694  

 3680 10:00:04.353956  Begin, DQ Scan Range 699~763

 3681 10:00:04.354373  

 3682 10:00:04.354703  

 3683 10:00:04.355008  	TX Vref Scan disable

 3684 10:00:04.357357  699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]

 3685 10:00:04.364131  700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]

 3686 10:00:04.367668  701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]

 3687 10:00:04.370617  702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]

 3688 10:00:04.374090  703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]

 3689 10:00:04.377399  704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]

 3690 10:00:04.380688  705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]

 3691 10:00:04.384035  706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]

 3692 10:00:04.387109  707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]

 3693 10:00:04.390749  708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]

 3694 10:00:04.393929  709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]

 3695 10:00:04.396973  710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]

 3696 10:00:04.400430  711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]

 3697 10:00:04.403770  712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]

 3698 10:00:04.407133  713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]

 3699 10:00:04.410724  714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]

 3700 10:00:04.413988  715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]

 3701 10:00:04.417078  716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]

 3702 10:00:04.420401  717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]

 3703 10:00:04.424097  718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]

 3704 10:00:04.427531  719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]

 3705 10:00:04.433669  720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]

 3706 10:00:04.437449  721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]

 3707 10:00:04.440421  737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]

 3708 10:00:04.443602  738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]

 3709 10:00:04.450449  739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]

 3710 10:00:04.453574  740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]

 3711 10:00:04.457112  741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]

 3712 10:00:04.460568  742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]

 3713 10:00:04.463492  743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]

 3714 10:00:04.466938  744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]

 3715 10:00:04.470643  745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]

 3716 10:00:04.474124  746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]

 3717 10:00:04.477277  747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]

 3718 10:00:04.480050  748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]

 3719 10:00:04.483638  749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]

 3720 10:00:04.487082  750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]

 3721 10:00:04.490351  751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]

 3722 10:00:04.493708  Byte0, DQ PI dly=736, DQM PI dly= 736

 3723 10:00:04.500012  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)

 3724 10:00:04.500481  

 3725 10:00:04.503590  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)

 3726 10:00:04.504143  

 3727 10:00:04.506660  Byte1, DQ PI dly=724, DQM PI dly= 724

 3728 10:00:04.509925  Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)

 3729 10:00:04.510567  

 3730 10:00:04.516761  OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)

 3731 10:00:04.517324  

 3732 10:00:04.523569  Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2

 3733 10:00:04.530127  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3734 10:00:04.536504  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3735 10:00:04.536979  Write Rank1 MR3 =0x30

 3736 10:00:04.539993  DramC Write-DBI off

 3737 10:00:04.540516  

 3738 10:00:04.540851  [DATLAT]

 3739 10:00:04.543287  Freq=1600, CH1 RK1, use_rxtx_scan=0

 3740 10:00:04.543862  

 3741 10:00:04.546647  DATLAT Default: 0x10

 3742 10:00:04.547181  7, 0xFFFF, sum=0

 3743 10:00:04.549962  8, 0xFFFF, sum=0

 3744 10:00:04.550489  9, 0xFFFF, sum=0

 3745 10:00:04.553244  10, 0xFFFF, sum=0

 3746 10:00:04.553764  11, 0xFFFF, sum=0

 3747 10:00:04.556722  12, 0xFFFF, sum=0

 3748 10:00:04.557253  13, 0xFFFF, sum=0

 3749 10:00:04.559716  14, 0x0, sum=1

 3750 10:00:04.560261  15, 0x0, sum=2

 3751 10:00:04.562976  16, 0x0, sum=3

 3752 10:00:04.563453  17, 0x0, sum=4

 3753 10:00:04.566747  pattern=2 first_step=14 total pass=5 best_step=16

 3754 10:00:04.567279  ==

 3755 10:00:04.573199  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3756 10:00:04.576605  fsp= 1, odt_onoff= 1, Byte mode= 0

 3757 10:00:04.577133  ==

 3758 10:00:04.579843  Start DQ dly to find pass range UseTestEngine =1

 3759 10:00:04.583286  x-axis: bit #, y-axis: DQ dly (-127~63)

 3760 10:00:04.586305  RX Vref Scan = 0

 3761 10:00:04.589610  -26, [0] xxxxxxxx xxxxxxxx [MSB]

 3762 10:00:04.593116  -25, [0] xxxxxxxx xxxxxxxx [MSB]

 3763 10:00:04.593652  -24, [0] xxxxxxxx xxxxxxxx [MSB]

 3764 10:00:04.595972  -23, [0] xxxxxxxx xxxxxxxx [MSB]

 3765 10:00:04.599658  -22, [0] xxxxxxxx xxxxxxxx [MSB]

 3766 10:00:04.603469  -21, [0] xxxxxxxx xxxxxxxx [MSB]

 3767 10:00:04.606291  -20, [0] xxxxxxxx xxxxxxxx [MSB]

 3768 10:00:04.609161  -19, [0] xxxxxxxx xxxxxxxx [MSB]

 3769 10:00:04.612790  -18, [0] xxxxxxxx xxxxxxxx [MSB]

 3770 10:00:04.616409  -17, [0] xxxxxxxx xxxxxxxx [MSB]

 3771 10:00:04.616942  -16, [0] xxxxxxxx xxxxxxxx [MSB]

 3772 10:00:04.619687  -15, [0] xxxxxxxx xxxxxxxx [MSB]

 3773 10:00:04.622944  -14, [0] xxxxxxxx xxxxxxxx [MSB]

 3774 10:00:04.626464  -13, [0] xxxxxxxx xxxxxxxx [MSB]

 3775 10:00:04.629610  -12, [0] xxxxxxxx xxxxxxxx [MSB]

 3776 10:00:04.633080  -11, [0] xxxxxxxx xxxxxxxx [MSB]

 3777 10:00:04.636267  -10, [0] xxxxxxxx xxxxxxxx [MSB]

 3778 10:00:04.639906  -9, [0] xxxxxxxx xxxxxxxx [MSB]

 3779 10:00:04.640442  -8, [0] xxxxxxxx xxxxxxxx [MSB]

 3780 10:00:04.642674  -7, [0] xxxxxxxx xxxxxxxx [MSB]

 3781 10:00:04.645976  -6, [0] xxxxxxxx xxxxxxxx [MSB]

 3782 10:00:04.649628  -5, [0] xxxxxxxx xxxxxxxx [MSB]

 3783 10:00:04.652622  -4, [0] xxxxxxxx xxxxxxxx [MSB]

 3784 10:00:04.656131  -3, [0] xxxxxxxx xxxxxxxo [MSB]

 3785 10:00:04.659464  -2, [0] xxxoxxxx xxxxxxxo [MSB]

 3786 10:00:04.662858  -1, [0] xxxoxxxx xoxxxxxo [MSB]

 3787 10:00:04.663487  0, [0] xxxoxxxx ooxxxxxo [MSB]

 3788 10:00:04.666445  1, [0] xxooxxxx ooxxxxxo [MSB]

 3789 10:00:04.669391  2, [0] xxooxxxx ooxxxxxo [MSB]

 3790 10:00:04.672145  3, [0] xxooxxxo oooxxxxo [MSB]

 3791 10:00:04.675840  4, [0] oooooxxo ooooxoxo [MSB]

 3792 10:00:04.678927  32, [0] oooooooo ooooooox [MSB]

 3793 10:00:04.682978  33, [0] oooooooo ooooooox [MSB]

 3794 10:00:04.686366  34, [0] oooooooo ooooooox [MSB]

 3795 10:00:04.689608  35, [0] oooxoooo oxooooox [MSB]

 3796 10:00:04.692838  36, [0] oooxoooo xxooooox [MSB]

 3797 10:00:04.693372  37, [0] ooxxoooo xxooooox [MSB]

 3798 10:00:04.695511  38, [0] ooxxoooo xxooooox [MSB]

 3799 10:00:04.698963  39, [0] ooxxooox xxxoooox [MSB]

 3800 10:00:04.702871  40, [0] oxxxxoox xxxoooox [MSB]

 3801 10:00:04.706015  41, [0] xxxxxxox xxxxxxxx [MSB]

 3802 10:00:04.708976  42, [0] xxxxxxxx xxxxxxxx [MSB]

 3803 10:00:04.712528  iDelay=42, Bit 0, Center 22 (4 ~ 40) 37

 3804 10:00:04.715872  iDelay=42, Bit 1, Center 21 (4 ~ 39) 36

 3805 10:00:04.718908  iDelay=42, Bit 2, Center 18 (1 ~ 36) 36

 3806 10:00:04.722901  iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37

 3807 10:00:04.725643  iDelay=42, Bit 4, Center 21 (4 ~ 39) 36

 3808 10:00:04.729120  iDelay=42, Bit 5, Center 22 (5 ~ 40) 36

 3809 10:00:04.732060  iDelay=42, Bit 6, Center 23 (5 ~ 41) 37

 3810 10:00:04.735591  iDelay=42, Bit 7, Center 20 (3 ~ 38) 36

 3811 10:00:04.739156  iDelay=42, Bit 8, Center 17 (0 ~ 35) 36

 3812 10:00:04.742571  iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36

 3813 10:00:04.745832  iDelay=42, Bit 10, Center 20 (3 ~ 38) 36

 3814 10:00:04.752438  iDelay=42, Bit 11, Center 22 (4 ~ 40) 37

 3815 10:00:04.755773  iDelay=42, Bit 12, Center 22 (5 ~ 40) 36

 3816 10:00:04.759434  iDelay=42, Bit 13, Center 22 (4 ~ 40) 37

 3817 10:00:04.762679  iDelay=42, Bit 14, Center 22 (5 ~ 40) 36

 3818 10:00:04.766022  iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35

 3819 10:00:04.766542  ==

 3820 10:00:04.772547  Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1

 3821 10:00:04.772971  fsp= 1, odt_onoff= 1, Byte mode= 0

 3822 10:00:04.775401  ==

 3823 10:00:04.775854  DQS Delay:

 3824 10:00:04.776188  DQS0 = 0, DQS1 = 0

 3825 10:00:04.778961  DQM Delay:

 3826 10:00:04.779565  DQM0 = 20, DQM1 = 19

 3827 10:00:04.782220  DQ Delay:

 3828 10:00:04.785695  DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16

 3829 10:00:04.786218  DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20

 3830 10:00:04.789092  DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22

 3831 10:00:04.791989  DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14

 3832 10:00:04.795273  

 3833 10:00:04.795734  

 3834 10:00:04.796065  

 3835 10:00:04.796369  [DramC_TX_OE_Calibration] TA2

 3836 10:00:04.798772  Original DQ_B0 (3 6) =30, OEN = 27

 3837 10:00:04.802303  Original DQ_B1 (3 6) =30, OEN = 27

 3838 10:00:04.805788  23, 0x0, End_B0=23 End_B1=23

 3839 10:00:04.808721  24, 0x0, End_B0=24 End_B1=24

 3840 10:00:04.811973  25, 0x0, End_B0=25 End_B1=25

 3841 10:00:04.812397  26, 0x0, End_B0=26 End_B1=26

 3842 10:00:04.815317  27, 0x0, End_B0=27 End_B1=27

 3843 10:00:04.819095  28, 0x0, End_B0=28 End_B1=28

 3844 10:00:04.822469  29, 0x0, End_B0=29 End_B1=29

 3845 10:00:04.825521  30, 0x0, End_B0=30 End_B1=30

 3846 10:00:04.826144  31, 0xFFFF, End_B0=30 End_B1=30

 3847 10:00:04.831960  Byte0 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3848 10:00:04.838989  Byte1 end_step=30  best_step=27 Final TX OE(2T, 0.5T) = (3, 3)

 3849 10:00:04.839434  

 3850 10:00:04.839775  

 3851 10:00:04.840082  Write Rank1 MR23 =0x3f

 3852 10:00:04.842081  [DQSOSC]

 3853 10:00:04.848459  [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps

 3854 10:00:04.855604  CH1_RK1: MR19=0x202, MR18=0xCECE, DQSOSC=438, MR23=63, INC=12, DEC=19

 3855 10:00:04.859036  Write Rank1 MR23 =0x3f

 3856 10:00:04.859594  [DQSOSC]

 3857 10:00:04.865687  [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps

 3858 10:00:04.869108  CH1 RK1: MR19=202, MR18=CECE

 3859 10:00:04.872406  [RxdqsGatingPostProcess] freq 1600

 3860 10:00:04.879090  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 3861 10:00:04.879750  Rank: 0

 3862 10:00:04.881974  best DQS0 dly(2T, 0.5T) = (2, 6)

 3863 10:00:04.885393  best DQS1 dly(2T, 0.5T) = (2, 6)

 3864 10:00:04.888270  best DQS0 P1 dly(2T, 0.5T) = (3, 2)

 3865 10:00:04.891884  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 3866 10:00:04.892308  Rank: 1

 3867 10:00:04.894832  best DQS0 dly(2T, 0.5T) = (2, 5)

 3868 10:00:04.897911  best DQS1 dly(2T, 0.5T) = (2, 6)

 3869 10:00:04.902107  best DQS0 P1 dly(2T, 0.5T) = (3, 1)

 3870 10:00:04.905270  best DQS1 P1 dly(2T, 0.5T) = (3, 2)

 3871 10:00:04.908573  TX_dly_DQSgated check: min 2  max 3, ChangeDQSINCTL=-1

 3872 10:00:04.912069  DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9

 3873 10:00:04.915214  [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16

 3874 10:00:04.918300  

 3875 10:00:04.918817  

 3876 10:00:04.921934  [Calibration Summary] Freqency 1600

 3877 10:00:04.922450  CH 0, Rank 0

 3878 10:00:04.922787  All Pass.

 3879 10:00:04.923096  

 3880 10:00:04.925175  CH 0, Rank 1

 3881 10:00:04.925685  All Pass.

 3882 10:00:04.926033  

 3883 10:00:04.926340  CH 1, Rank 0

 3884 10:00:04.928102  All Pass.

 3885 10:00:04.928518  

 3886 10:00:04.928846  CH 1, Rank 1

 3887 10:00:04.929196  All Pass.

 3888 10:00:04.929507  

 3889 10:00:04.935099  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3890 10:00:04.942009  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3891 10:00:04.948078  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3892 10:00:04.951522  Write Rank0 MR3 =0xb0

 3893 10:00:04.958470  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3894 10:00:04.965095  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3895 10:00:04.972052  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3896 10:00:04.975324  Write Rank1 MR3 =0xb0

 3897 10:00:04.982062  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3898 10:00:04.988326  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3899 10:00:04.994800  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3900 10:00:04.998358  Write Rank0 MR3 =0xb0

 3901 10:00:05.001666  Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3

 3902 10:00:05.011326  Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3

 3903 10:00:05.018070  After  -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2

 3904 10:00:05.018492  Write Rank1 MR3 =0xb0

 3905 10:00:05.021249  DramC Write-DBI on

 3906 10:00:05.024535  [GetDramInforAfterCalByMRR] Vendor 6.

 3907 10:00:05.027999  [GetDramInforAfterCalByMRR] Revision 505.

 3908 10:00:05.028420  MR8 1111

 3909 10:00:05.034446  CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3910 10:00:05.034864  MR8 1111

 3911 10:00:05.038165  CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3912 10:00:05.041446  MR8 1111

 3913 10:00:05.044736  CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.

 3914 10:00:05.045158  MR8 1111

 3915 10:00:05.051162  CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.

 3916 10:00:05.061213  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0

 3917 10:00:05.061741  Write Rank0 MR13 =0xd0

 3918 10:00:05.064481  Write Rank1 MR13 =0xd0

 3919 10:00:05.064986  Write Rank0 MR13 =0xd0

 3920 10:00:05.067947  Write Rank1 MR13 =0xd0

 3921 10:00:05.071281  Save calibration result to emmc

 3922 10:00:05.071850  

 3923 10:00:05.072186  

 3924 10:00:05.074945  [DramcModeReg_Check] Freq_1600, FSP_1

 3925 10:00:05.075522  FSP_1, CH_0, RK0

 3926 10:00:05.077772  Write Rank0 MR13 =0xd8

 3927 10:00:05.081186  		MR12 = 0x5e (global = 0x5e)	match

 3928 10:00:05.084424  		MR14 = 0x1c (global = 0x1c)	match

 3929 10:00:05.084944  FSP_1, CH_0, RK1

 3930 10:00:05.088230  Write Rank1 MR13 =0xd8

 3931 10:00:05.091238  		MR12 = 0x5a (global = 0x5a)	match

 3932 10:00:05.094356  		MR14 = 0x20 (global = 0x20)	match

 3933 10:00:05.094876  FSP_1, CH_1, RK0

 3934 10:00:05.097775  Write Rank0 MR13 =0xd8

 3935 10:00:05.101460  		MR12 = 0x5c (global = 0x5c)	match

 3936 10:00:05.104716  		MR14 = 0x1e (global = 0x1e)	match

 3937 10:00:05.105239  FSP_1, CH_1, RK1

 3938 10:00:05.107895  Write Rank1 MR13 =0xd8

 3939 10:00:05.111173  		MR12 = 0x60 (global = 0x60)	match

 3940 10:00:05.114682  		MR14 = 0x1e (global = 0x1e)	match

 3941 10:00:05.115105  

 3942 10:00:05.118329  [MEM_TEST] 02: After DFS, before run time config

 3943 10:00:05.129961  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3944 10:00:05.130486  

 3945 10:00:05.130826  [TA2_TEST]

 3946 10:00:05.131136  === TA2 HW

 3947 10:00:05.133167  TA2 PAT: XTALK

 3948 10:00:05.136122  HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0

 3949 10:00:05.143025  HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0

 3950 10:00:05.146320  HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0

 3951 10:00:05.149893  HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0

 3952 10:00:05.152925  

 3953 10:00:05.153341  

 3954 10:00:05.153667  Settings after calibration

 3955 10:00:05.153971  

 3956 10:00:05.156460  [DramcRunTimeConfig]

 3957 10:00:05.159869  TransferPLLToSPMControl - MODE SW PHYPLL

 3958 10:00:05.160395  TX_TRACKING: ON

 3959 10:00:05.162609  RX_TRACKING: ON

 3960 10:00:05.163044  HW_GATING: ON

 3961 10:00:05.166120  HW_GATING DBG: OFF

 3962 10:00:05.166638  ddr_geometry:1

 3963 10:00:05.169916  ddr_geometry:1

 3964 10:00:05.170451  ddr_geometry:1

 3965 10:00:05.173067  ddr_geometry:1

 3966 10:00:05.173587  ddr_geometry:1

 3967 10:00:05.173923  ddr_geometry:1

 3968 10:00:05.176316  ddr_geometry:1

 3969 10:00:05.176732  ddr_geometry:1

 3970 10:00:05.179776  High Freq DUMMY_READ_FOR_TRACKING: ON

 3971 10:00:05.182506  ZQCS_ENABLE_LP4: OFF

 3972 10:00:05.186727  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 3973 10:00:05.189755  DUMMY_READ_FOR_DQS_GATING_RETRY: OFF

 3974 10:00:05.190321  SPM_CONTROL_AFTERK: ON

 3975 10:00:05.192723  IMPEDANCE_TRACKING: ON

 3976 10:00:05.193138  TEMP_SENSOR: ON

 3977 10:00:05.195969  PER_BANK_REFRESH: ON

 3978 10:00:05.196387  HW_SAVE_FOR_SR: ON

 3979 10:00:05.199599  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3980 10:00:05.203147  CLK_FREE_FUN_FOR_DRAMC_PSEL: ON

 3981 10:00:05.206376  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON

 3982 10:00:05.209401  Read ODT Tracking: ON

 3983 10:00:05.213051  =========================

 3984 10:00:05.213575  

 3985 10:00:05.213912  [TA2_TEST]

 3986 10:00:05.214218  === TA2 HW

 3987 10:00:05.219398  HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0

 3988 10:00:05.223219  HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0

 3989 10:00:05.229527  HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0

 3990 10:00:05.232775  HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0

 3991 10:00:05.233303  

 3992 10:00:05.235924  [MEM_TEST] 03: After run time config

 3993 10:00:05.247830  [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)

 3994 10:00:05.250601  [complex_mem_test] start addr:0x40024000, len:131072

 3995 10:00:05.455579  1st complex R/W mem test pass

 3996 10:00:05.461948  save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 

 3997 10:00:05.465126  sync preloader write leveling

 3998 10:00:05.468225  sync preloader cbt_mr12

 3999 10:00:05.471659  sync preloader cbt_clk_dly

 4000 10:00:05.472078  sync preloader cbt_cmd_dly

 4001 10:00:05.474914  sync preloader cbt_cs

 4002 10:00:05.478472  sync preloader cbt_ca_perbit_delay

 4003 10:00:05.478995  sync preloader clk_delay

 4004 10:00:05.481915  sync preloader dqs_delay

 4005 10:00:05.485330  sync preloader u1Gating2T_Save

 4006 10:00:05.488844  sync preloader u1Gating05T_Save

 4007 10:00:05.491779  sync preloader u1Gatingfine_tune_Save

 4008 10:00:05.494999  sync preloader u1Gatingucpass_count_Save

 4009 10:00:05.498359  sync preloader u1TxWindowPerbitVref_Save

 4010 10:00:05.501718  sync preloader u1TxCenter_min_Save

 4011 10:00:05.504991  sync preloader u1TxCenter_max_Save

 4012 10:00:05.508114  sync preloader u1Txwin_center_Save

 4013 10:00:05.511557  sync preloader u1Txfirst_pass_Save

 4014 10:00:05.515065  sync preloader u1Txlast_pass_Save

 4015 10:00:05.518427  sync preloader u1RxDatlat_Save

 4016 10:00:05.521687  sync preloader u1RxWinPerbitVref_Save

 4017 10:00:05.525019  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 4018 10:00:05.528136  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 4019 10:00:05.531508  sync preloader delay_cell_unit

 4020 10:00:05.538076  save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 

 4021 10:00:05.541637  sync preloader write leveling

 4022 10:00:05.542154  sync preloader cbt_mr12

 4023 10:00:05.544818  sync preloader cbt_clk_dly

 4024 10:00:05.548051  sync preloader cbt_cmd_dly

 4025 10:00:05.548468  sync preloader cbt_cs

 4026 10:00:05.551550  sync preloader cbt_ca_perbit_delay

 4027 10:00:05.554506  sync preloader clk_delay

 4028 10:00:05.557571  sync preloader dqs_delay

 4029 10:00:05.561070  sync preloader u1Gating2T_Save

 4030 10:00:05.561590  sync preloader u1Gating05T_Save

 4031 10:00:05.564202  sync preloader u1Gatingfine_tune_Save

 4032 10:00:05.571021  sync preloader u1Gatingucpass_count_Save

 4033 10:00:05.574878  sync preloader u1TxWindowPerbitVref_Save

 4034 10:00:05.577738  sync preloader u1TxCenter_min_Save

 4035 10:00:05.580668  sync preloader u1TxCenter_max_Save

 4036 10:00:05.581086  sync preloader u1Txwin_center_Save

 4037 10:00:05.584553  sync preloader u1Txfirst_pass_Save

 4038 10:00:05.587846  sync preloader u1Txlast_pass_Save

 4039 10:00:05.591247  sync preloader u1RxDatlat_Save

 4040 10:00:05.594400  sync preloader u1RxWinPerbitVref_Save

 4041 10:00:05.597562  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 4042 10:00:05.604730  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 4043 10:00:05.605253  sync preloader delay_cell_unit

 4044 10:00:05.610869  save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 

 4045 10:00:05.614634  sync preloader write leveling

 4046 10:00:05.617698  sync preloader cbt_mr12

 4047 10:00:05.621098  sync preloader cbt_clk_dly

 4048 10:00:05.621620  sync preloader cbt_cmd_dly

 4049 10:00:05.624290  sync preloader cbt_cs

 4050 10:00:05.627568  sync preloader cbt_ca_perbit_delay

 4051 10:00:05.631184  sync preloader clk_delay

 4052 10:00:05.631750  sync preloader dqs_delay

 4053 10:00:05.634110  sync preloader u1Gating2T_Save

 4054 10:00:05.637606  sync preloader u1Gating05T_Save

 4055 10:00:05.640430  sync preloader u1Gatingfine_tune_Save

 4056 10:00:05.644251  sync preloader u1Gatingucpass_count_Save

 4057 10:00:05.647564  sync preloader u1TxWindowPerbitVref_Save

 4058 10:00:05.651003  sync preloader u1TxCenter_min_Save

 4059 10:00:05.653837  sync preloader u1TxCenter_max_Save

 4060 10:00:05.657582  sync preloader u1Txwin_center_Save

 4061 10:00:05.661073  sync preloader u1Txfirst_pass_Save

 4062 10:00:05.664370  sync preloader u1Txlast_pass_Save

 4063 10:00:05.667260  sync preloader u1RxDatlat_Save

 4064 10:00:05.670843  sync preloader u1RxWinPerbitVref_Save

 4065 10:00:05.674323  sync preloader u1RxWinPerbitDQ_firsbypass_Save

 4066 10:00:05.677439  sync preloader u1RxWinPerbitDQ_lastbypass_Save

 4067 10:00:05.680646  sync preloader delay_cell_unit

 4068 10:00:05.684296  just_for_test_dump_coreboot_params dump all params

 4069 10:00:05.687782  dump source = 0x0

 4070 10:00:05.688288  dump params frequency:1600

 4071 10:00:05.690952  dump params rank number:2

 4072 10:00:05.691365  

 4073 10:00:05.694180   dump params write leveling

 4074 10:00:05.697278  write leveling[0][0][0] = 0x20

 4075 10:00:05.700535  write leveling[0][0][1] = 0x17

 4076 10:00:05.700966  write leveling[0][1][0] = 0x1b

 4077 10:00:05.703817  write leveling[0][1][1] = 0x19

 4078 10:00:05.707840  write leveling[1][0][0] = 0x21

 4079 10:00:05.710994  write leveling[1][0][1] = 0x19

 4080 10:00:05.714401  write leveling[1][1][0] = 0x23

 4081 10:00:05.717193  write leveling[1][1][1] = 0x19

 4082 10:00:05.717615  dump params cbt_cs

 4083 10:00:05.720564  cbt_cs[0][0] = 0x8

 4084 10:00:05.721099  cbt_cs[0][1] = 0x8

 4085 10:00:05.724044  cbt_cs[1][0] = 0xb

 4086 10:00:05.724458  cbt_cs[1][1] = 0xb

 4087 10:00:05.727185  dump params cbt_mr12

 4088 10:00:05.727636  cbt_mr12[0][0] = 0x1e

 4089 10:00:05.730634  cbt_mr12[0][1] = 0x1a

 4090 10:00:05.734017  cbt_mr12[1][0] = 0x1c

 4091 10:00:05.734454  cbt_mr12[1][1] = 0x20

 4092 10:00:05.737038  dump params tx window

 4093 10:00:05.740322  tx_center_min[0][0][0] = 981

 4094 10:00:05.740744  tx_center_max[0][0][0] =  988

 4095 10:00:05.743546  tx_center_min[0][0][1] = 973

 4096 10:00:05.747169  tx_center_max[0][0][1] =  980

 4097 10:00:05.750462  tx_center_min[0][1][0] = 980

 4098 10:00:05.754365  tx_center_max[0][1][0] =  986

 4099 10:00:05.754889  tx_center_min[0][1][1] = 979

 4100 10:00:05.756992  tx_center_max[0][1][1] =  986

 4101 10:00:05.760265  tx_center_min[1][0][0] = 988

 4102 10:00:05.763755  tx_center_max[1][0][0] =  992

 4103 10:00:05.764270  tx_center_min[1][0][1] = 978

 4104 10:00:05.767271  tx_center_max[1][0][1] =  985

 4105 10:00:05.770618  tx_center_min[1][1][0] = 987

 4106 10:00:05.773922  tx_center_max[1][1][0] =  992

 4107 10:00:05.777205  tx_center_min[1][1][1] = 977

 4108 10:00:05.777726  tx_center_max[1][1][1] =  982

 4109 10:00:05.780168  dump params tx window

 4110 10:00:05.783456  tx_win_center[0][0][0] = 988

 4111 10:00:05.786822  tx_first_pass[0][0][0] =  976

 4112 10:00:05.787339  tx_last_pass[0][0][0] =	1000

 4113 10:00:05.790504  tx_win_center[0][0][1] = 987

 4114 10:00:05.793514  tx_first_pass[0][0][1] =  975

 4115 10:00:05.796735  tx_last_pass[0][0][1] =	999

 4116 10:00:05.800378  tx_win_center[0][0][2] = 988

 4117 10:00:05.800903  tx_first_pass[0][0][2] =  976

 4118 10:00:05.803836  tx_last_pass[0][0][2] =	1000

 4119 10:00:05.807052  tx_win_center[0][0][3] = 981

 4120 10:00:05.809961  tx_first_pass[0][0][3] =  969

 4121 10:00:05.810381  tx_last_pass[0][0][3] =	993

 4122 10:00:05.813490  tx_win_center[0][0][4] = 987

 4123 10:00:05.816775  tx_first_pass[0][0][4] =  975

 4124 10:00:05.820293  tx_last_pass[0][0][4] =	999

 4125 10:00:05.823537  tx_win_center[0][0][5] = 983

 4126 10:00:05.824089  tx_first_pass[0][0][5] =  971

 4127 10:00:05.826995  tx_last_pass[0][0][5] =	996

 4128 10:00:05.830007  tx_win_center[0][0][6] = 985

 4129 10:00:05.833019  tx_first_pass[0][0][6] =  973

 4130 10:00:05.836415  tx_last_pass[0][0][6] =	997

 4131 10:00:05.836835  tx_win_center[0][0][7] = 986

 4132 10:00:05.840023  tx_first_pass[0][0][7] =  974

 4133 10:00:05.843258  tx_last_pass[0][0][7] =	999

 4134 10:00:05.846294  tx_win_center[0][0][8] = 973

 4135 10:00:05.846805  tx_first_pass[0][0][8] =  962

 4136 10:00:05.849780  tx_last_pass[0][0][8] =	985

 4137 10:00:05.852977  tx_win_center[0][0][9] = 976

 4138 10:00:05.856427  tx_first_pass[0][0][9] =  965

 4139 10:00:05.859582  tx_last_pass[0][0][9] =	988

 4140 10:00:05.860004  tx_win_center[0][0][10] = 980

 4141 10:00:05.862714  tx_first_pass[0][0][10] =  968

 4142 10:00:05.866506  tx_last_pass[0][0][10] =	992

 4143 10:00:05.870186  tx_win_center[0][0][11] = 975

 4144 10:00:05.873164  tx_first_pass[0][0][11] =  964

 4145 10:00:05.873687  tx_last_pass[0][0][11] =	987

 4146 10:00:05.876585  tx_win_center[0][0][12] = 978

 4147 10:00:05.879735  tx_first_pass[0][0][12] =  966

 4148 10:00:05.883076  tx_last_pass[0][0][12] =	990

 4149 10:00:05.886402  tx_win_center[0][0][13] = 977

 4150 10:00:05.886922  tx_first_pass[0][0][13] =  966

 4151 10:00:05.889798  tx_last_pass[0][0][13] =	989

 4152 10:00:05.892851  tx_win_center[0][0][14] = 978

 4153 10:00:05.895867  tx_first_pass[0][0][14] =  966

 4154 10:00:05.899338  tx_last_pass[0][0][14] =	990

 4155 10:00:05.899797  tx_win_center[0][0][15] = 980

 4156 10:00:05.902611  tx_first_pass[0][0][15] =  968

 4157 10:00:05.906284  tx_last_pass[0][0][15] =	992

 4158 10:00:05.909649  tx_win_center[0][1][0] = 986

 4159 10:00:05.912906  tx_first_pass[0][1][0] =  974

 4160 10:00:05.913446  tx_last_pass[0][1][0] =	999

 4161 10:00:05.915998  tx_win_center[0][1][1] = 985

 4162 10:00:05.919842  tx_first_pass[0][1][1] =  973

 4163 10:00:05.923238  tx_last_pass[0][1][1] =	998

 4164 10:00:05.925978  tx_win_center[0][1][2] = 986

 4165 10:00:05.926506  tx_first_pass[0][1][2] =  975

 4166 10:00:05.928991  tx_last_pass[0][1][2] =	998

 4167 10:00:05.932850  tx_win_center[0][1][3] = 980

 4168 10:00:05.936052  tx_first_pass[0][1][3] =  968

 4169 10:00:05.936579  tx_last_pass[0][1][3] =	992

 4170 10:00:05.938990  tx_win_center[0][1][4] = 985

 4171 10:00:05.942600  tx_first_pass[0][1][4] =  972

 4172 10:00:05.945522  tx_last_pass[0][1][4] =	998

 4173 10:00:05.949005  tx_win_center[0][1][5] = 981

 4174 10:00:05.949425  tx_first_pass[0][1][5] =  969

 4175 10:00:05.952730  tx_last_pass[0][1][5] =	994

 4176 10:00:05.955957  tx_win_center[0][1][6] = 983

 4177 10:00:05.959239  tx_first_pass[0][1][6] =  970

 4178 10:00:05.959693  tx_last_pass[0][1][6] =	997

 4179 10:00:05.962789  tx_win_center[0][1][7] = 985

 4180 10:00:05.965760  tx_first_pass[0][1][7] =  972

 4181 10:00:05.969485  tx_last_pass[0][1][7] =	998

 4182 10:00:05.970014  tx_win_center[0][1][8] = 979

 4183 10:00:05.972742  tx_first_pass[0][1][8] =  967

 4184 10:00:05.975870  tx_last_pass[0][1][8] =	991

 4185 10:00:05.979143  tx_win_center[0][1][9] = 980

 4186 10:00:05.982750  tx_first_pass[0][1][9] =  969

 4187 10:00:05.983174  tx_last_pass[0][1][9] =	992

 4188 10:00:05.985724  tx_win_center[0][1][10] = 986

 4189 10:00:05.989450  tx_first_pass[0][1][10] =  974

 4190 10:00:05.992431  tx_last_pass[0][1][10] =	998

 4191 10:00:05.995960  tx_win_center[0][1][11] = 979

 4192 10:00:05.996487  tx_first_pass[0][1][11] =  967

 4193 10:00:05.999172  tx_last_pass[0][1][11] =	991

 4194 10:00:06.002215  tx_win_center[0][1][12] = 981

 4195 10:00:06.005831  tx_first_pass[0][1][12] =  969

 4196 10:00:06.009135  tx_last_pass[0][1][12] =	993

 4197 10:00:06.009558  tx_win_center[0][1][13] = 981

 4198 10:00:06.012458  tx_first_pass[0][1][13] =  969

 4199 10:00:06.016278  tx_last_pass[0][1][13] =	993

 4200 10:00:06.019135  tx_win_center[0][1][14] = 981

 4201 10:00:06.022549  tx_first_pass[0][1][14] =  969

 4202 10:00:06.023075  tx_last_pass[0][1][14] =	994

 4203 10:00:06.025729  tx_win_center[0][1][15] = 985

 4204 10:00:06.029171  tx_first_pass[0][1][15] =  973

 4205 10:00:06.032321  tx_last_pass[0][1][15] =	997

 4206 10:00:06.035844  tx_win_center[1][0][0] = 992

 4207 10:00:06.038992  tx_first_pass[1][0][0] =  979

 4208 10:00:06.039739  tx_last_pass[1][0][0] =	1006

 4209 10:00:06.042079  tx_win_center[1][0][1] = 990

 4210 10:00:06.045283  tx_first_pass[1][0][1] =  978

 4211 10:00:06.048329  tx_last_pass[1][0][1] =	1003

 4212 10:00:06.048786  tx_win_center[1][0][2] = 989

 4213 10:00:06.052038  tx_first_pass[1][0][2] =  977

 4214 10:00:06.055139  tx_last_pass[1][0][2] =	1002

 4215 10:00:06.058650  tx_win_center[1][0][3] = 988

 4216 10:00:06.061862  tx_first_pass[1][0][3] =  976

 4217 10:00:06.062620  tx_last_pass[1][0][3] =	1000

 4218 10:00:06.065174  tx_win_center[1][0][4] = 991

 4219 10:00:06.068403  tx_first_pass[1][0][4] =  979

 4220 10:00:06.071679  tx_last_pass[1][0][4] =	1004

 4221 10:00:06.075197  tx_win_center[1][0][5] = 992

 4222 10:00:06.075668  tx_first_pass[1][0][5] =  980

 4223 10:00:06.078297  tx_last_pass[1][0][5] =	1005

 4224 10:00:06.081436  tx_win_center[1][0][6] = 990

 4225 10:00:06.085091  tx_first_pass[1][0][6] =  978

 4226 10:00:06.088347  tx_last_pass[1][0][6] =	1003

 4227 10:00:06.088768  tx_win_center[1][0][7] = 990

 4228 10:00:06.091514  tx_first_pass[1][0][7] =  978

 4229 10:00:06.094810  tx_last_pass[1][0][7] =	1003

 4230 10:00:06.098103  tx_win_center[1][0][8] = 981

 4231 10:00:06.098526  tx_first_pass[1][0][8] =  970

 4232 10:00:06.101369  tx_last_pass[1][0][8] =	993

 4233 10:00:06.105200  tx_win_center[1][0][9] = 981

 4234 10:00:06.108418  tx_first_pass[1][0][9] =  970

 4235 10:00:06.111788  tx_last_pass[1][0][9] =	992

 4236 10:00:06.112325  tx_win_center[1][0][10] = 983

 4237 10:00:06.114792  tx_first_pass[1][0][10] =  971

 4238 10:00:06.118004  tx_last_pass[1][0][10] =	995

 4239 10:00:06.121858  tx_win_center[1][0][11] = 984

 4240 10:00:06.124963  tx_first_pass[1][0][11] =  972

 4241 10:00:06.125490  tx_last_pass[1][0][11] =	996

 4242 10:00:06.128339  tx_win_center[1][0][12] = 984

 4243 10:00:06.131795  tx_first_pass[1][0][12] =  972

 4244 10:00:06.135073  tx_last_pass[1][0][12] =	996

 4245 10:00:06.138287  tx_win_center[1][0][13] = 985

 4246 10:00:06.138815  tx_first_pass[1][0][13] =  974

 4247 10:00:06.141587  tx_last_pass[1][0][13] =	996

 4248 10:00:06.145134  tx_win_center[1][0][14] = 983

 4249 10:00:06.148310  tx_first_pass[1][0][14] =  972

 4250 10:00:06.151607  tx_last_pass[1][0][14] =	995

 4251 10:00:06.152155  tx_win_center[1][0][15] = 978

 4252 10:00:06.154851  tx_first_pass[1][0][15] =  967

 4253 10:00:06.157936  tx_last_pass[1][0][15] =	990

 4254 10:00:06.161630  tx_win_center[1][1][0] = 992

 4255 10:00:06.164461  tx_first_pass[1][1][0] =  978

 4256 10:00:06.164880  tx_last_pass[1][1][0] =	1006

 4257 10:00:06.168184  tx_win_center[1][1][1] = 991

 4258 10:00:06.171281  tx_first_pass[1][1][1] =  978

 4259 10:00:06.174700  tx_last_pass[1][1][1] =	1005

 4260 10:00:06.177769  tx_win_center[1][1][2] = 989

 4261 10:00:06.178340  tx_first_pass[1][1][2] =  977

 4262 10:00:06.181447  tx_last_pass[1][1][2] =	1002

 4263 10:00:06.184398  tx_win_center[1][1][3] = 987

 4264 10:00:06.188087  tx_first_pass[1][1][3] =  975

 4265 10:00:06.188504  tx_last_pass[1][1][3] =	999

 4266 10:00:06.191358  tx_win_center[1][1][4] = 991

 4267 10:00:06.194442  tx_first_pass[1][1][4] =  978

 4268 10:00:06.198015  tx_last_pass[1][1][4] =	1004

 4269 10:00:06.201153  tx_win_center[1][1][5] = 992

 4270 10:00:06.201597  tx_first_pass[1][1][5] =  979

 4271 10:00:06.204455  tx_last_pass[1][1][5] =	1005

 4272 10:00:06.207966  tx_win_center[1][1][6] = 991

 4273 10:00:06.211178  tx_first_pass[1][1][6] =  978

 4274 10:00:06.214523  tx_last_pass[1][1][6] =	1005

 4275 10:00:06.215041  tx_win_center[1][1][7] = 991

 4276 10:00:06.217759  tx_first_pass[1][1][7] =  978

 4277 10:00:06.221190  tx_last_pass[1][1][7] =	1004

 4278 10:00:06.224373  tx_win_center[1][1][8] = 979

 4279 10:00:06.224792  tx_first_pass[1][1][8] =  968

 4280 10:00:06.227517  tx_last_pass[1][1][8] =	991

 4281 10:00:06.231549  tx_win_center[1][1][9] = 979

 4282 10:00:06.234333  tx_first_pass[1][1][9] =  968

 4283 10:00:06.237390  tx_last_pass[1][1][9] =	991

 4284 10:00:06.237859  tx_win_center[1][1][10] = 982

 4285 10:00:06.240595  tx_first_pass[1][1][10] =  970

 4286 10:00:06.243982  tx_last_pass[1][1][10] =	994

 4287 10:00:06.247560  tx_win_center[1][1][11] = 982

 4288 10:00:06.251205  tx_first_pass[1][1][11] =  970

 4289 10:00:06.251778  tx_last_pass[1][1][11] =	994

 4290 10:00:06.254422  tx_win_center[1][1][12] = 982

 4291 10:00:06.257502  tx_first_pass[1][1][12] =  971

 4292 10:00:06.261131  tx_last_pass[1][1][12] =	994

 4293 10:00:06.264340  tx_win_center[1][1][13] = 982

 4294 10:00:06.264777  tx_first_pass[1][1][13] =  971

 4295 10:00:06.267347  tx_last_pass[1][1][13] =	994

 4296 10:00:06.271334  tx_win_center[1][1][14] = 982

 4297 10:00:06.274170  tx_first_pass[1][1][14] =  971

 4298 10:00:06.277789  tx_last_pass[1][1][14] =	994

 4299 10:00:06.278368  tx_win_center[1][1][15] = 977

 4300 10:00:06.281336  tx_first_pass[1][1][15] =  965

 4301 10:00:06.284337  tx_last_pass[1][1][15] =	990

 4302 10:00:06.287812  dump params rx window

 4303 10:00:06.288330  rx_firspass[0][0][0] = 5

 4304 10:00:06.290943  rx_lastpass[0][0][0] =  38

 4305 10:00:06.294352  rx_firspass[0][0][1] = 5

 4306 10:00:06.294923  rx_lastpass[0][0][1] =  36

 4307 10:00:06.297534  rx_firspass[0][0][2] = 6

 4308 10:00:06.300603  rx_lastpass[0][0][2] =  36

 4309 10:00:06.304062  rx_firspass[0][0][3] = -2

 4310 10:00:06.304610  rx_lastpass[0][0][3] =  30

 4311 10:00:06.307514  rx_firspass[0][0][4] = 5

 4312 10:00:06.310913  rx_lastpass[0][0][4] =  36

 4313 10:00:06.311486  rx_firspass[0][0][5] = 2

 4314 10:00:06.314303  rx_lastpass[0][0][5] =  31

 4315 10:00:06.317819  rx_firspass[0][0][6] = 3

 4316 10:00:06.320898  rx_lastpass[0][0][6] =  33

 4317 10:00:06.321428  rx_firspass[0][0][7] = 5

 4318 10:00:06.324282  rx_lastpass[0][0][7] =  36

 4319 10:00:06.327648  rx_firspass[0][0][8] = -3

 4320 10:00:06.328242  rx_lastpass[0][0][8] =  32

 4321 10:00:06.330701  rx_firspass[0][0][9] = 0

 4322 10:00:06.334323  rx_lastpass[0][0][9] =  32

 4323 10:00:06.334847  rx_firspass[0][0][10] = 8

 4324 10:00:06.337459  rx_lastpass[0][0][10] =  40

 4325 10:00:06.340999  rx_firspass[0][0][11] = 2

 4326 10:00:06.344158  rx_lastpass[0][0][11] =  32

 4327 10:00:06.344577  rx_firspass[0][0][12] = 2

 4328 10:00:06.347858  rx_lastpass[0][0][12] =  36

 4329 10:00:06.350804  rx_firspass[0][0][13] = 3

 4330 10:00:06.353604  rx_lastpass[0][0][13] =  33

 4331 10:00:06.354027  rx_firspass[0][0][14] = 2

 4332 10:00:06.357407  rx_lastpass[0][0][14] =  37

 4333 10:00:06.360618  rx_firspass[0][0][15] = 5

 4334 10:00:06.361036  rx_lastpass[0][0][15] =  37

 4335 10:00:06.364372  rx_firspass[0][1][0] = 6

 4336 10:00:06.367524  rx_lastpass[0][1][0] =  40

 4337 10:00:06.370852  rx_firspass[0][1][1] = 5

 4338 10:00:06.371375  rx_lastpass[0][1][1] =  38

 4339 10:00:06.374346  rx_firspass[0][1][2] = 6

 4340 10:00:06.377057  rx_lastpass[0][1][2] =  38

 4341 10:00:06.377482  rx_firspass[0][1][3] = -2

 4342 10:00:06.380190  rx_lastpass[0][1][3] =  33

 4343 10:00:06.384121  rx_firspass[0][1][4] = 5

 4344 10:00:06.384537  rx_lastpass[0][1][4] =  39

 4345 10:00:06.387643  rx_firspass[0][1][5] = 1

 4346 10:00:06.390789  rx_lastpass[0][1][5] =  34

 4347 10:00:06.394269  rx_firspass[0][1][6] = 3

 4348 10:00:06.394796  rx_lastpass[0][1][6] =  37

 4349 10:00:06.397215  rx_firspass[0][1][7] = 3

 4350 10:00:06.400548  rx_lastpass[0][1][7] =  38

 4351 10:00:06.400970  rx_firspass[0][1][8] = -2

 4352 10:00:06.403792  rx_lastpass[0][1][8] =  32

 4353 10:00:06.407565  rx_firspass[0][1][9] = 1

 4354 10:00:06.407983  rx_lastpass[0][1][9] =  36

 4355 10:00:06.410530  rx_firspass[0][1][10] = 7

 4356 10:00:06.413784  rx_lastpass[0][1][10] =  43

 4357 10:00:06.417196  rx_firspass[0][1][11] = -2

 4358 10:00:06.417616  rx_lastpass[0][1][11] =  34

 4359 10:00:06.420415  rx_firspass[0][1][12] = 1

 4360 10:00:06.423712  rx_lastpass[0][1][12] =  37

 4361 10:00:06.426991  rx_firspass[0][1][13] = 2

 4362 10:00:06.427400  rx_lastpass[0][1][13] =  35

 4363 10:00:06.430240  rx_firspass[0][1][14] = 3

 4364 10:00:06.433923  rx_lastpass[0][1][14] =  37

 4365 10:00:06.434336  rx_firspass[0][1][15] = 6

 4366 10:00:06.436994  rx_lastpass[0][1][15] =  39

 4367 10:00:06.440048  rx_firspass[1][0][0] = 5

 4368 10:00:06.443515  rx_lastpass[1][0][0] =  38

 4369 10:00:06.443934  rx_firspass[1][0][1] = 5

 4370 10:00:06.446787  rx_lastpass[1][0][1] =  38

 4371 10:00:06.450024  rx_firspass[1][0][2] = 2

 4372 10:00:06.450316  rx_lastpass[1][0][2] =  35

 4373 10:00:06.453711  rx_firspass[1][0][3] = 0

 4374 10:00:06.456623  rx_lastpass[1][0][3] =  33

 4375 10:00:06.460005  rx_firspass[1][0][4] = 5

 4376 10:00:06.460300  rx_lastpass[1][0][4] =  38

 4377 10:00:06.463828  rx_firspass[1][0][5] = 7

 4378 10:00:06.467049  rx_lastpass[1][0][5] =  39

 4379 10:00:06.467473  rx_firspass[1][0][6] = 7

 4380 10:00:06.470392  rx_lastpass[1][0][6] =  40

 4381 10:00:06.473524  rx_firspass[1][0][7] = 5

 4382 10:00:06.473824  rx_lastpass[1][0][7] =  38

 4383 10:00:06.476828  rx_firspass[1][0][8] = 1

 4384 10:00:06.480577  rx_lastpass[1][0][8] =  33

 4385 10:00:06.481096  rx_firspass[1][0][9] = 1

 4386 10:00:06.483841  rx_lastpass[1][0][9] =  32

 4387 10:00:06.486744  rx_firspass[1][0][10] = 5

 4388 10:00:06.490439  rx_lastpass[1][0][10] =  35

 4389 10:00:06.490856  rx_firspass[1][0][11] = 6

 4390 10:00:06.493658  rx_lastpass[1][0][11] =  38

 4391 10:00:06.497251  rx_firspass[1][0][12] = 6

 4392 10:00:06.500139  rx_lastpass[1][0][12] =  38

 4393 10:00:06.500557  rx_firspass[1][0][13] = 6

 4394 10:00:06.503579  rx_lastpass[1][0][13] =  37

 4395 10:00:06.507266  rx_firspass[1][0][14] = 7

 4396 10:00:06.507821  rx_lastpass[1][0][14] =  38

 4397 10:00:06.510339  rx_firspass[1][0][15] = -3

 4398 10:00:06.513895  rx_lastpass[1][0][15] =  30

 4399 10:00:06.517195  rx_firspass[1][1][0] = 4

 4400 10:00:06.517711  rx_lastpass[1][1][0] =  40

 4401 10:00:06.520061  rx_firspass[1][1][1] = 4

 4402 10:00:06.523717  rx_lastpass[1][1][1] =  39

 4403 10:00:06.524300  rx_firspass[1][1][2] = 1

 4404 10:00:06.527182  rx_lastpass[1][1][2] =  36

 4405 10:00:06.530307  rx_firspass[1][1][3] = -2

 4406 10:00:06.533378  rx_lastpass[1][1][3] =  34

 4407 10:00:06.533894  rx_firspass[1][1][4] = 4

 4408 10:00:06.536640  rx_lastpass[1][1][4] =  39

 4409 10:00:06.540086  rx_firspass[1][1][5] = 5

 4410 10:00:06.540505  rx_lastpass[1][1][5] =  40

 4411 10:00:06.543684  rx_firspass[1][1][6] = 5

 4412 10:00:06.546636  rx_lastpass[1][1][6] =  41

 4413 10:00:06.547153  rx_firspass[1][1][7] = 3

 4414 10:00:06.549892  rx_lastpass[1][1][7] =  38

 4415 10:00:06.553572  rx_firspass[1][1][8] = 0

 4416 10:00:06.556571  rx_lastpass[1][1][8] =  35

 4417 10:00:06.556989  rx_firspass[1][1][9] = -1

 4418 10:00:06.560057  rx_lastpass[1][1][9] =  34

 4419 10:00:06.563254  rx_firspass[1][1][10] = 3

 4420 10:00:06.563855  rx_lastpass[1][1][10] =  38

 4421 10:00:06.567001  rx_firspass[1][1][11] = 4

 4422 10:00:06.570270  rx_lastpass[1][1][11] =  40

 4423 10:00:06.573038  rx_firspass[1][1][12] = 5

 4424 10:00:06.573451  rx_lastpass[1][1][12] =  40

 4425 10:00:06.577165  rx_firspass[1][1][13] = 4

 4426 10:00:06.580028  rx_lastpass[1][1][13] =  40

 4427 10:00:06.580551  rx_firspass[1][1][14] = 5

 4428 10:00:06.583792  rx_lastpass[1][1][14] =  40

 4429 10:00:06.586725  rx_firspass[1][1][15] = -3

 4430 10:00:06.590188  rx_lastpass[1][1][15] =  31

 4431 10:00:06.590711  dump params clk_delay

 4432 10:00:06.593528  clk_delay[0] = 1

 4433 10:00:06.594064  clk_delay[1] = 0

 4434 10:00:06.596537  dump params dqs_delay

 4435 10:00:06.596951  dqs_delay[0][0] = -2

 4436 10:00:06.599865  dqs_delay[0][1] = 0

 4437 10:00:06.603280  dqs_delay[1][0] = 0

 4438 10:00:06.603719  dqs_delay[1][1] = 0

 4439 10:00:06.606753  dump params delay_cell_unit = 735

 4440 10:00:06.607273  dump source = 0x0

 4441 10:00:06.609790  dump params frequency:1200

 4442 10:00:06.613410  dump params rank number:2

 4443 10:00:06.613827  

 4444 10:00:06.616516   dump params write leveling

 4445 10:00:06.617037  write leveling[0][0][0] = 0x0

 4446 10:00:06.619752  write leveling[0][0][1] = 0x0

 4447 10:00:06.623524  write leveling[0][1][0] = 0x0

 4448 10:00:06.626914  write leveling[0][1][1] = 0x0

 4449 10:00:06.629982  write leveling[1][0][0] = 0x0

 4450 10:00:06.630520  write leveling[1][0][1] = 0x0

 4451 10:00:06.633190  write leveling[1][1][0] = 0x0

 4452 10:00:06.636506  write leveling[1][1][1] = 0x0

 4453 10:00:06.639538  dump params cbt_cs

 4454 10:00:06.639952  cbt_cs[0][0] = 0x0

 4455 10:00:06.642925  cbt_cs[0][1] = 0x0

 4456 10:00:06.643337  cbt_cs[1][0] = 0x0

 4457 10:00:06.647010  cbt_cs[1][1] = 0x0

 4458 10:00:06.647581  dump params cbt_mr12

 4459 10:00:06.649993  cbt_mr12[0][0] = 0x0

 4460 10:00:06.650405  cbt_mr12[0][1] = 0x0

 4461 10:00:06.653326  cbt_mr12[1][0] = 0x0

 4462 10:00:06.656444  cbt_mr12[1][1] = 0x0

 4463 10:00:06.656874  dump params tx window

 4464 10:00:06.660056  tx_center_min[0][0][0] = 0

 4465 10:00:06.663402  tx_center_max[0][0][0] =  0

 4466 10:00:06.663864  tx_center_min[0][0][1] = 0

 4467 10:00:06.666718  tx_center_max[0][0][1] =  0

 4468 10:00:06.670237  tx_center_min[0][1][0] = 0

 4469 10:00:06.673328  tx_center_max[0][1][0] =  0

 4470 10:00:06.673749  tx_center_min[0][1][1] = 0

 4471 10:00:06.676642  tx_center_max[0][1][1] =  0

 4472 10:00:06.680063  tx_center_min[1][0][0] = 0

 4473 10:00:06.680479  tx_center_max[1][0][0] =  0

 4474 10:00:06.683548  tx_center_min[1][0][1] = 0

 4475 10:00:06.686952  tx_center_max[1][0][1] =  0

 4476 10:00:06.690269  tx_center_min[1][1][0] = 0

 4477 10:00:06.690789  tx_center_max[1][1][0] =  0

 4478 10:00:06.693085  tx_center_min[1][1][1] = 0

 4479 10:00:06.696731  tx_center_max[1][1][1] =  0

 4480 10:00:06.699595  dump params tx window

 4481 10:00:06.700106  tx_win_center[0][0][0] = 0

 4482 10:00:06.703245  tx_first_pass[0][0][0] =  0

 4483 10:00:06.706672  tx_last_pass[0][0][0] =	0

 4484 10:00:06.707196  tx_win_center[0][0][1] = 0

 4485 10:00:06.709820  tx_first_pass[0][0][1] =  0

 4486 10:00:06.712801  tx_last_pass[0][0][1] =	0

 4487 10:00:06.716303  tx_win_center[0][0][2] = 0

 4488 10:00:06.716719  tx_first_pass[0][0][2] =  0

 4489 10:00:06.719664  tx_last_pass[0][0][2] =	0

 4490 10:00:06.722907  tx_win_center[0][0][3] = 0

 4491 10:00:06.726396  tx_first_pass[0][0][3] =  0

 4492 10:00:06.726920  tx_last_pass[0][0][3] =	0

 4493 10:00:06.729566  tx_win_center[0][0][4] = 0

 4494 10:00:06.733267  tx_first_pass[0][0][4] =  0

 4495 10:00:06.733835  tx_last_pass[0][0][4] =	0

 4496 10:00:06.736214  tx_win_center[0][0][5] = 0

 4497 10:00:06.739511  tx_first_pass[0][0][5] =  0

 4498 10:00:06.742605  tx_last_pass[0][0][5] =	0

 4499 10:00:06.743025  tx_win_center[0][0][6] = 0

 4500 10:00:06.746233  tx_first_pass[0][0][6] =  0

 4501 10:00:06.749451  tx_last_pass[0][0][6] =	0

 4502 10:00:06.753088  tx_win_center[0][0][7] = 0

 4503 10:00:06.753616  tx_first_pass[0][0][7] =  0

 4504 10:00:06.755985  tx_last_pass[0][0][7] =	0

 4505 10:00:06.759453  tx_win_center[0][0][8] = 0

 4506 10:00:06.759984  tx_first_pass[0][0][8] =  0

 4507 10:00:06.762803  tx_last_pass[0][0][8] =	0

 4508 10:00:06.766052  tx_win_center[0][0][9] = 0

 4509 10:00:06.769663  tx_first_pass[0][0][9] =  0

 4510 10:00:06.770267  tx_last_pass[0][0][9] =	0

 4511 10:00:06.772852  tx_win_center[0][0][10] = 0

 4512 10:00:06.776087  tx_first_pass[0][0][10] =  0

 4513 10:00:06.779346  tx_last_pass[0][0][10] =	0

 4514 10:00:06.779915  tx_win_center[0][0][11] = 0

 4515 10:00:06.782646  tx_first_pass[0][0][11] =  0

 4516 10:00:06.786532  tx_last_pass[0][0][11] =	0

 4517 10:00:06.789863  tx_win_center[0][0][12] = 0

 4518 10:00:06.790391  tx_first_pass[0][0][12] =  0

 4519 10:00:06.792970  tx_last_pass[0][0][12] =	0

 4520 10:00:06.795726  tx_win_center[0][0][13] = 0

 4521 10:00:06.799033  tx_first_pass[0][0][13] =  0

 4522 10:00:06.799556  tx_last_pass[0][0][13] =	0

 4523 10:00:06.802916  tx_win_center[0][0][14] = 0

 4524 10:00:06.805815  tx_first_pass[0][0][14] =  0

 4525 10:00:06.809482  tx_last_pass[0][0][14] =	0

 4526 10:00:06.810048  tx_win_center[0][0][15] = 0

 4527 10:00:06.812613  tx_first_pass[0][0][15] =  0

 4528 10:00:06.816193  tx_last_pass[0][0][15] =	0

 4529 10:00:06.819137  tx_win_center[0][1][0] = 0

 4530 10:00:06.819629  tx_first_pass[0][1][0] =  0

 4531 10:00:06.822649  tx_last_pass[0][1][0] =	0

 4532 10:00:06.826035  tx_win_center[0][1][1] = 0

 4533 10:00:06.829403  tx_first_pass[0][1][1] =  0

 4534 10:00:06.829930  tx_last_pass[0][1][1] =	0

 4535 10:00:06.832506  tx_win_center[0][1][2] = 0

 4536 10:00:06.836352  tx_first_pass[0][1][2] =  0

 4537 10:00:06.836890  tx_last_pass[0][1][2] =	0

 4538 10:00:06.839151  tx_win_center[0][1][3] = 0

 4539 10:00:06.842475  tx_first_pass[0][1][3] =  0

 4540 10:00:06.845805  tx_last_pass[0][1][3] =	0

 4541 10:00:06.846230  tx_win_center[0][1][4] = 0

 4542 10:00:06.849200  tx_first_pass[0][1][4] =  0

 4543 10:00:06.852650  tx_last_pass[0][1][4] =	0

 4544 10:00:06.853176  tx_win_center[0][1][5] = 0

 4545 10:00:06.855530  tx_first_pass[0][1][5] =  0

 4546 10:00:06.859668  tx_last_pass[0][1][5] =	0

 4547 10:00:06.862185  tx_win_center[0][1][6] = 0

 4548 10:00:06.862608  tx_first_pass[0][1][6] =  0

 4549 10:00:06.865650  tx_last_pass[0][1][6] =	0

 4550 10:00:06.869105  tx_win_center[0][1][7] = 0

 4551 10:00:06.872339  tx_first_pass[0][1][7] =  0

 4552 10:00:06.872761  tx_last_pass[0][1][7] =	0

 4553 10:00:06.875553  tx_win_center[0][1][8] = 0

 4554 10:00:06.878667  tx_first_pass[0][1][8] =  0

 4555 10:00:06.882351  tx_last_pass[0][1][8] =	0

 4556 10:00:06.882876  tx_win_center[0][1][9] = 0

 4557 10:00:06.885864  tx_first_pass[0][1][9] =  0

 4558 10:00:06.888915  tx_last_pass[0][1][9] =	0

 4559 10:00:06.889440  tx_win_center[0][1][10] = 0

 4560 10:00:06.892091  tx_first_pass[0][1][10] =  0

 4561 10:00:06.895858  tx_last_pass[0][1][10] =	0

 4562 10:00:06.899172  tx_win_center[0][1][11] = 0

 4563 10:00:06.899646  tx_first_pass[0][1][11] =  0

 4564 10:00:06.902820  tx_last_pass[0][1][11] =	0

 4565 10:00:06.905795  tx_win_center[0][1][12] = 0

 4566 10:00:06.909367  tx_first_pass[0][1][12] =  0

 4567 10:00:06.909895  tx_last_pass[0][1][12] =	0

 4568 10:00:06.912247  tx_win_center[0][1][13] = 0

 4569 10:00:06.915877  tx_first_pass[0][1][13] =  0

 4570 10:00:06.919239  tx_last_pass[0][1][13] =	0

 4571 10:00:06.919845  tx_win_center[0][1][14] = 0

 4572 10:00:06.922658  tx_first_pass[0][1][14] =  0

 4573 10:00:06.926094  tx_last_pass[0][1][14] =	0

 4574 10:00:06.929256  tx_win_center[0][1][15] = 0

 4575 10:00:06.929775  tx_first_pass[0][1][15] =  0

 4576 10:00:06.932295  tx_last_pass[0][1][15] =	0

 4577 10:00:06.935647  tx_win_center[1][0][0] = 0

 4578 10:00:06.938673  tx_first_pass[1][0][0] =  0

 4579 10:00:06.939131  tx_last_pass[1][0][0] =	0

 4580 10:00:06.942028  tx_win_center[1][0][1] = 0

 4581 10:00:06.945133  tx_first_pass[1][0][1] =  0

 4582 10:00:06.948681  tx_last_pass[1][0][1] =	0

 4583 10:00:06.949100  tx_win_center[1][0][2] = 0

 4584 10:00:06.951906  tx_first_pass[1][0][2] =  0

 4585 10:00:06.955381  tx_last_pass[1][0][2] =	0

 4586 10:00:06.958793  tx_win_center[1][0][3] = 0

 4587 10:00:06.959312  tx_first_pass[1][0][3] =  0

 4588 10:00:06.962174  tx_last_pass[1][0][3] =	0

 4589 10:00:06.965597  tx_win_center[1][0][4] = 0

 4590 10:00:06.966142  tx_first_pass[1][0][4] =  0

 4591 10:00:06.968200  tx_last_pass[1][0][4] =	0

 4592 10:00:06.971838  tx_win_center[1][0][5] = 0

 4593 10:00:06.975061  tx_first_pass[1][0][5] =  0

 4594 10:00:06.975528  tx_last_pass[1][0][5] =	0

 4595 10:00:06.978592  tx_win_center[1][0][6] = 0

 4596 10:00:06.982103  tx_first_pass[1][0][6] =  0

 4597 10:00:06.985196  tx_last_pass[1][0][6] =	0

 4598 10:00:06.985735  tx_win_center[1][0][7] = 0

 4599 10:00:06.988572  tx_first_pass[1][0][7] =  0

 4600 10:00:06.992016  tx_last_pass[1][0][7] =	0

 4601 10:00:06.992544  tx_win_center[1][0][8] = 0

 4602 10:00:06.995287  tx_first_pass[1][0][8] =  0

 4603 10:00:06.998624  tx_last_pass[1][0][8] =	0

 4604 10:00:07.002037  tx_win_center[1][0][9] = 0

 4605 10:00:07.002566  tx_first_pass[1][0][9] =  0

 4606 10:00:07.005440  tx_last_pass[1][0][9] =	0

 4607 10:00:07.008686  tx_win_center[1][0][10] = 0

 4608 10:00:07.012037  tx_first_pass[1][0][10] =  0

 4609 10:00:07.012569  tx_last_pass[1][0][10] =	0

 4610 10:00:07.015270  tx_win_center[1][0][11] = 0

 4611 10:00:07.018544  tx_first_pass[1][0][11] =  0

 4612 10:00:07.021764  tx_last_pass[1][0][11] =	0

 4613 10:00:07.022294  tx_win_center[1][0][12] = 0

 4614 10:00:07.025147  tx_first_pass[1][0][12] =  0

 4615 10:00:07.028564  tx_last_pass[1][0][12] =	0

 4616 10:00:07.032179  tx_win_center[1][0][13] = 0

 4617 10:00:07.032707  tx_first_pass[1][0][13] =  0

 4618 10:00:07.035396  tx_last_pass[1][0][13] =	0

 4619 10:00:07.038213  tx_win_center[1][0][14] = 0

 4620 10:00:07.041759  tx_first_pass[1][0][14] =  0

 4621 10:00:07.042179  tx_last_pass[1][0][14] =	0

 4622 10:00:07.044730  tx_win_center[1][0][15] = 0

 4623 10:00:07.048016  tx_first_pass[1][0][15] =  0

 4624 10:00:07.051228  tx_last_pass[1][0][15] =	0

 4625 10:00:07.051678  tx_win_center[1][1][0] = 0

 4626 10:00:07.055048  tx_first_pass[1][1][0] =  0

 4627 10:00:07.058299  tx_last_pass[1][1][0] =	0

 4628 10:00:07.061186  tx_win_center[1][1][1] = 0

 4629 10:00:07.061648  tx_first_pass[1][1][1] =  0

 4630 10:00:07.064378  tx_last_pass[1][1][1] =	0

 4631 10:00:07.068062  tx_win_center[1][1][2] = 0

 4632 10:00:07.068480  tx_first_pass[1][1][2] =  0

 4633 10:00:07.071327  tx_last_pass[1][1][2] =	0

 4634 10:00:07.074693  tx_win_center[1][1][3] = 0

 4635 10:00:07.078273  tx_first_pass[1][1][3] =  0

 4636 10:00:07.078805  tx_last_pass[1][1][3] =	0

 4637 10:00:07.081563  tx_win_center[1][1][4] = 0

 4638 10:00:07.084730  tx_first_pass[1][1][4] =  0

 4639 10:00:07.085145  tx_last_pass[1][1][4] =	0

 4640 10:00:07.087860  tx_win_center[1][1][5] = 0

 4641 10:00:07.091669  tx_first_pass[1][1][5] =  0

 4642 10:00:07.094684  tx_last_pass[1][1][5] =	0

 4643 10:00:07.095202  tx_win_center[1][1][6] = 0

 4644 10:00:07.098058  tx_first_pass[1][1][6] =  0

 4645 10:00:07.101301  tx_last_pass[1][1][6] =	0

 4646 10:00:07.104668  tx_win_center[1][1][7] = 0

 4647 10:00:07.105089  tx_first_pass[1][1][7] =  0

 4648 10:00:07.107934  tx_last_pass[1][1][7] =	0

 4649 10:00:07.111364  tx_win_center[1][1][8] = 0

 4650 10:00:07.114605  tx_first_pass[1][1][8] =  0

 4651 10:00:07.115026  tx_last_pass[1][1][8] =	0

 4652 10:00:07.118099  tx_win_center[1][1][9] = 0

 4653 10:00:07.121270  tx_first_pass[1][1][9] =  0

 4654 10:00:07.121691  tx_last_pass[1][1][9] =	0

 4655 10:00:07.124416  tx_win_center[1][1][10] = 0

 4656 10:00:07.127942  tx_first_pass[1][1][10] =  0

 4657 10:00:07.131057  tx_last_pass[1][1][10] =	0

 4658 10:00:07.131533  tx_win_center[1][1][11] = 0

 4659 10:00:07.134505  tx_first_pass[1][1][11] =  0

 4660 10:00:07.137748  tx_last_pass[1][1][11] =	0

 4661 10:00:07.141042  tx_win_center[1][1][12] = 0

 4662 10:00:07.141458  tx_first_pass[1][1][12] =  0

 4663 10:00:07.144433  tx_last_pass[1][1][12] =	0

 4664 10:00:07.147561  tx_win_center[1][1][13] = 0

 4665 10:00:07.151082  tx_first_pass[1][1][13] =  0

 4666 10:00:07.151529  tx_last_pass[1][1][13] =	0

 4667 10:00:07.154419  tx_win_center[1][1][14] = 0

 4668 10:00:07.157577  tx_first_pass[1][1][14] =  0

 4669 10:00:07.161193  tx_last_pass[1][1][14] =	0

 4670 10:00:07.161684  tx_win_center[1][1][15] = 0

 4671 10:00:07.164240  tx_first_pass[1][1][15] =  0

 4672 10:00:07.167661  tx_last_pass[1][1][15] =	0

 4673 10:00:07.171228  dump params rx window

 4674 10:00:07.171667  rx_firspass[0][0][0] = 0

 4675 10:00:07.174722  rx_lastpass[0][0][0] =  0

 4676 10:00:07.177723  rx_firspass[0][0][1] = 0

 4677 10:00:07.178265  rx_lastpass[0][0][1] =  0

 4678 10:00:07.181178  rx_firspass[0][0][2] = 0

 4679 10:00:07.184503  rx_lastpass[0][0][2] =  0

 4680 10:00:07.184926  rx_firspass[0][0][3] = 0

 4681 10:00:07.187528  rx_lastpass[0][0][3] =  0

 4682 10:00:07.191116  rx_firspass[0][0][4] = 0

 4683 10:00:07.191698  rx_lastpass[0][0][4] =  0

 4684 10:00:07.194234  rx_firspass[0][0][5] = 0

 4685 10:00:07.197582  rx_lastpass[0][0][5] =  0

 4686 10:00:07.198005  rx_firspass[0][0][6] = 0

 4687 10:00:07.200823  rx_lastpass[0][0][6] =  0

 4688 10:00:07.204200  rx_firspass[0][0][7] = 0

 4689 10:00:07.207633  rx_lastpass[0][0][7] =  0

 4690 10:00:07.208159  rx_firspass[0][0][8] = 0

 4691 10:00:07.210901  rx_lastpass[0][0][8] =  0

 4692 10:00:07.214241  rx_firspass[0][0][9] = 0

 4693 10:00:07.214776  rx_lastpass[0][0][9] =  0

 4694 10:00:07.217264  rx_firspass[0][0][10] = 0

 4695 10:00:07.220762  rx_lastpass[0][0][10] =  0

 4696 10:00:07.221287  rx_firspass[0][0][11] = 0

 4697 10:00:07.224204  rx_lastpass[0][0][11] =  0

 4698 10:00:07.228014  rx_firspass[0][0][12] = 0

 4699 10:00:07.230987  rx_lastpass[0][0][12] =  0

 4700 10:00:07.231563  rx_firspass[0][0][13] = 0

 4701 10:00:07.234279  rx_lastpass[0][0][13] =  0

 4702 10:00:07.237398  rx_firspass[0][0][14] = 0

 4703 10:00:07.237927  rx_lastpass[0][0][14] =  0

 4704 10:00:07.240602  rx_firspass[0][0][15] = 0

 4705 10:00:07.243901  rx_lastpass[0][0][15] =  0

 4706 10:00:07.247178  rx_firspass[0][1][0] = 0

 4707 10:00:07.247650  rx_lastpass[0][1][0] =  0

 4708 10:00:07.250640  rx_firspass[0][1][1] = 0

 4709 10:00:07.253983  rx_lastpass[0][1][1] =  0

 4710 10:00:07.254703  rx_firspass[0][1][2] = 0

 4711 10:00:07.257101  rx_lastpass[0][1][2] =  0

 4712 10:00:07.260418  rx_firspass[0][1][3] = 0

 4713 10:00:07.261102  rx_lastpass[0][1][3] =  0

 4714 10:00:07.263816  rx_firspass[0][1][4] = 0

 4715 10:00:07.267293  rx_lastpass[0][1][4] =  0

 4716 10:00:07.268018  rx_firspass[0][1][5] = 0

 4717 10:00:07.270475  rx_lastpass[0][1][5] =  0

 4718 10:00:07.273858  rx_firspass[0][1][6] = 0

 4719 10:00:07.274265  rx_lastpass[0][1][6] =  0

 4720 10:00:07.276916  rx_firspass[0][1][7] = 0

 4721 10:00:07.280542  rx_lastpass[0][1][7] =  0

 4722 10:00:07.283922  rx_firspass[0][1][8] = 0

 4723 10:00:07.284218  rx_lastpass[0][1][8] =  0

 4724 10:00:07.287710  rx_firspass[0][1][9] = 0

 4725 10:00:07.290845  rx_lastpass[0][1][9] =  0

 4726 10:00:07.291239  rx_firspass[0][1][10] = 0

 4727 10:00:07.294327  rx_lastpass[0][1][10] =  0

 4728 10:00:07.297391  rx_firspass[0][1][11] = 0

 4729 10:00:07.297700  rx_lastpass[0][1][11] =  0

 4730 10:00:07.300465  rx_firspass[0][1][12] = 0

 4731 10:00:07.303908  rx_lastpass[0][1][12] =  0

 4732 10:00:07.307205  rx_firspass[0][1][13] = 0

 4733 10:00:07.307635  rx_lastpass[0][1][13] =  0

 4734 10:00:07.310466  rx_firspass[0][1][14] = 0

 4735 10:00:07.313915  rx_lastpass[0][1][14] =  0

 4736 10:00:07.314303  rx_firspass[0][1][15] = 0

 4737 10:00:07.317127  rx_lastpass[0][1][15] =  0

 4738 10:00:07.320725  rx_firspass[1][0][0] = 0

 4739 10:00:07.324201  rx_lastpass[1][0][0] =  0

 4740 10:00:07.324617  rx_firspass[1][0][1] = 0

 4741 10:00:07.327683  rx_lastpass[1][0][1] =  0

 4742 10:00:07.331004  rx_firspass[1][0][2] = 0

 4743 10:00:07.331546  rx_lastpass[1][0][2] =  0

 4744 10:00:07.334253  rx_firspass[1][0][3] = 0

 4745 10:00:07.337091  rx_lastpass[1][0][3] =  0

 4746 10:00:07.337562  rx_firspass[1][0][4] = 0

 4747 10:00:07.340508  rx_lastpass[1][0][4] =  0

 4748 10:00:07.344042  rx_firspass[1][0][5] = 0

 4749 10:00:07.344454  rx_lastpass[1][0][5] =  0

 4750 10:00:07.347385  rx_firspass[1][0][6] = 0

 4751 10:00:07.350771  rx_lastpass[1][0][6] =  0

 4752 10:00:07.351184  rx_firspass[1][0][7] = 0

 4753 10:00:07.354052  rx_lastpass[1][0][7] =  0

 4754 10:00:07.357363  rx_firspass[1][0][8] = 0

 4755 10:00:07.357837  rx_lastpass[1][0][8] =  0

 4756 10:00:07.360555  rx_firspass[1][0][9] = 0

 4757 10:00:07.363886  rx_lastpass[1][0][9] =  0

 4758 10:00:07.367192  rx_firspass[1][0][10] = 0

 4759 10:00:07.367639  rx_lastpass[1][0][10] =  0

 4760 10:00:07.370778  rx_firspass[1][0][11] = 0

 4761 10:00:07.374157  rx_lastpass[1][0][11] =  0

 4762 10:00:07.374672  rx_firspass[1][0][12] = 0

 4763 10:00:07.377236  rx_lastpass[1][0][12] =  0

 4764 10:00:07.380572  rx_firspass[1][0][13] = 0

 4765 10:00:07.383978  rx_lastpass[1][0][13] =  0

 4766 10:00:07.384493  rx_firspass[1][0][14] = 0

 4767 10:00:07.387237  rx_lastpass[1][0][14] =  0

 4768 10:00:07.390570  rx_firspass[1][0][15] = 0

 4769 10:00:07.391081  rx_lastpass[1][0][15] =  0

 4770 10:00:07.393347  rx_firspass[1][1][0] = 0

 4771 10:00:07.397104  rx_lastpass[1][1][0] =  0

 4772 10:00:07.397516  rx_firspass[1][1][1] = 0

 4773 10:00:07.400116  rx_lastpass[1][1][1] =  0

 4774 10:00:07.403855  rx_firspass[1][1][2] = 0

 4775 10:00:07.407065  rx_lastpass[1][1][2] =  0

 4776 10:00:07.407616  rx_firspass[1][1][3] = 0

 4777 10:00:07.410549  rx_lastpass[1][1][3] =  0

 4778 10:00:07.413908  rx_firspass[1][1][4] = 0

 4779 10:00:07.414628  rx_lastpass[1][1][4] =  0

 4780 10:00:07.416678  rx_firspass[1][1][5] = 0

 4781 10:00:07.420131  rx_lastpass[1][1][5] =  0

 4782 10:00:07.420630  rx_firspass[1][1][6] = 0

 4783 10:00:07.423824  rx_lastpass[1][1][6] =  0

 4784 10:00:07.426748  rx_firspass[1][1][7] = 0

 4785 10:00:07.427161  rx_lastpass[1][1][7] =  0

 4786 10:00:07.430229  rx_firspass[1][1][8] = 0

 4787 10:00:07.433712  rx_lastpass[1][1][8] =  0

 4788 10:00:07.434353  rx_firspass[1][1][9] = 0

 4789 10:00:07.437171  rx_lastpass[1][1][9] =  0

 4790 10:00:07.440179  rx_firspass[1][1][10] = 0

 4791 10:00:07.443480  rx_lastpass[1][1][10] =  0

 4792 10:00:07.443894  rx_firspass[1][1][11] = 0

 4793 10:00:07.447036  rx_lastpass[1][1][11] =  0

 4794 10:00:07.450106  rx_firspass[1][1][12] = 0

 4795 10:00:07.450518  rx_lastpass[1][1][12] =  0

 4796 10:00:07.453510  rx_firspass[1][1][13] = 0

 4797 10:00:07.457105  rx_lastpass[1][1][13] =  0

 4798 10:00:07.460314  rx_firspass[1][1][14] = 0

 4799 10:00:07.460742  rx_lastpass[1][1][14] =  0

 4800 10:00:07.463448  rx_firspass[1][1][15] = 0

 4801 10:00:07.466846  rx_lastpass[1][1][15] =  0

 4802 10:00:07.467374  dump params clk_delay

 4803 10:00:07.470062  clk_delay[0] = 0

 4804 10:00:07.470475  clk_delay[1] = 0

 4805 10:00:07.473710  dump params dqs_delay

 4806 10:00:07.474238  dqs_delay[0][0] = 0

 4807 10:00:07.476724  dqs_delay[0][1] = 0

 4808 10:00:07.480100  dqs_delay[1][0] = 0

 4809 10:00:07.480519  dqs_delay[1][1] = 0

 4810 10:00:07.483268  dump params delay_cell_unit = 735

 4811 10:00:07.486432  dump source = 0x0

 4812 10:00:07.486847  dump params frequency:800

 4813 10:00:07.489609  dump params rank number:2

 4814 10:00:07.490027  

 4815 10:00:07.492979   dump params write leveling

 4816 10:00:07.496603  write leveling[0][0][0] = 0x0

 4817 10:00:07.497083  write leveling[0][0][1] = 0x0

 4818 10:00:07.500064  write leveling[0][1][0] = 0x0

 4819 10:00:07.503502  write leveling[0][1][1] = 0x0

 4820 10:00:07.506895  write leveling[1][0][0] = 0x0

 4821 10:00:07.510258  write leveling[1][0][1] = 0x0

 4822 10:00:07.510783  write leveling[1][1][0] = 0x0

 4823 10:00:07.513206  write leveling[1][1][1] = 0x0

 4824 10:00:07.516448  dump params cbt_cs

 4825 10:00:07.516863  cbt_cs[0][0] = 0x0

 4826 10:00:07.520273  cbt_cs[0][1] = 0x0

 4827 10:00:07.520800  cbt_cs[1][0] = 0x0

 4828 10:00:07.522883  cbt_cs[1][1] = 0x0

 4829 10:00:07.523463  dump params cbt_mr12

 4830 10:00:07.526775  cbt_mr12[0][0] = 0x0

 4831 10:00:07.527302  cbt_mr12[0][1] = 0x0

 4832 10:00:07.529855  cbt_mr12[1][0] = 0x0

 4833 10:00:07.533002  cbt_mr12[1][1] = 0x0

 4834 10:00:07.533423  dump params tx window

 4835 10:00:07.536375  tx_center_min[0][0][0] = 0

 4836 10:00:07.539906  tx_center_max[0][0][0] =  0

 4837 10:00:07.540331  tx_center_min[0][0][1] = 0

 4838 10:00:07.543667  tx_center_max[0][0][1] =  0

 4839 10:00:07.546390  tx_center_min[0][1][0] = 0

 4840 10:00:07.550072  tx_center_max[0][1][0] =  0

 4841 10:00:07.550493  tx_center_min[0][1][1] = 0

 4842 10:00:07.553496  tx_center_max[0][1][1] =  0

 4843 10:00:07.556289  tx_center_min[1][0][0] = 0

 4844 10:00:07.559682  tx_center_max[1][0][0] =  0

 4845 10:00:07.560100  tx_center_min[1][0][1] = 0

 4846 10:00:07.562940  tx_center_max[1][0][1] =  0

 4847 10:00:07.566579  tx_center_min[1][1][0] = 0

 4848 10:00:07.567113  tx_center_max[1][1][0] =  0

 4849 10:00:07.569628  tx_center_min[1][1][1] = 0

 4850 10:00:07.573025  tx_center_max[1][1][1] =  0

 4851 10:00:07.576574  dump params tx window

 4852 10:00:07.577093  tx_win_center[0][0][0] = 0

 4853 10:00:07.579684  tx_first_pass[0][0][0] =  0

 4854 10:00:07.583398  tx_last_pass[0][0][0] =	0

 4855 10:00:07.584032  tx_win_center[0][0][1] = 0

 4856 10:00:07.586468  tx_first_pass[0][0][1] =  0

 4857 10:00:07.589787  tx_last_pass[0][0][1] =	0

 4858 10:00:07.593033  tx_win_center[0][0][2] = 0

 4859 10:00:07.593563  tx_first_pass[0][0][2] =  0

 4860 10:00:07.596109  tx_last_pass[0][0][2] =	0

 4861 10:00:07.599794  tx_win_center[0][0][3] = 0

 4862 10:00:07.602979  tx_first_pass[0][0][3] =  0

 4863 10:00:07.603400  tx_last_pass[0][0][3] =	0

 4864 10:00:07.606664  tx_win_center[0][0][4] = 0

 4865 10:00:07.609924  tx_first_pass[0][0][4] =  0

 4866 10:00:07.610451  tx_last_pass[0][0][4] =	0

 4867 10:00:07.612935  tx_win_center[0][0][5] = 0

 4868 10:00:07.616421  tx_first_pass[0][0][5] =  0

 4869 10:00:07.620019  tx_last_pass[0][0][5] =	0

 4870 10:00:07.620542  tx_win_center[0][0][6] = 0

 4871 10:00:07.623079  tx_first_pass[0][0][6] =  0

 4872 10:00:07.626459  tx_last_pass[0][0][6] =	0

 4873 10:00:07.629485  tx_win_center[0][0][7] = 0

 4874 10:00:07.630006  tx_first_pass[0][0][7] =  0

 4875 10:00:07.632544  tx_last_pass[0][0][7] =	0

 4876 10:00:07.636070  tx_win_center[0][0][8] = 0

 4877 10:00:07.636488  tx_first_pass[0][0][8] =  0

 4878 10:00:07.639546  tx_last_pass[0][0][8] =	0

 4879 10:00:07.643157  tx_win_center[0][0][9] = 0

 4880 10:00:07.646054  tx_first_pass[0][0][9] =  0

 4881 10:00:07.646487  tx_last_pass[0][0][9] =	0

 4882 10:00:07.649590  tx_win_center[0][0][10] = 0

 4883 10:00:07.653203  tx_first_pass[0][0][10] =  0

 4884 10:00:07.656262  tx_last_pass[0][0][10] =	0

 4885 10:00:07.656796  tx_win_center[0][0][11] = 0

 4886 10:00:07.659497  tx_first_pass[0][0][11] =  0

 4887 10:00:07.662638  tx_last_pass[0][0][11] =	0

 4888 10:00:07.666328  tx_win_center[0][0][12] = 0

 4889 10:00:07.666747  tx_first_pass[0][0][12] =  0

 4890 10:00:07.669522  tx_last_pass[0][0][12] =	0

 4891 10:00:07.672980  tx_win_center[0][0][13] = 0

 4892 10:00:07.676062  tx_first_pass[0][0][13] =  0

 4893 10:00:07.676482  tx_last_pass[0][0][13] =	0

 4894 10:00:07.679206  tx_win_center[0][0][14] = 0

 4895 10:00:07.682946  tx_first_pass[0][0][14] =  0

 4896 10:00:07.685890  tx_last_pass[0][0][14] =	0

 4897 10:00:07.686309  tx_win_center[0][0][15] = 0

 4898 10:00:07.689453  tx_first_pass[0][0][15] =  0

 4899 10:00:07.693137  tx_last_pass[0][0][15] =	0

 4900 10:00:07.696179  tx_win_center[0][1][0] = 0

 4901 10:00:07.696606  tx_first_pass[0][1][0] =  0

 4902 10:00:07.699620  tx_last_pass[0][1][0] =	0

 4903 10:00:07.703104  tx_win_center[0][1][1] = 0

 4904 10:00:07.706315  tx_first_pass[0][1][1] =  0

 4905 10:00:07.707007  tx_last_pass[0][1][1] =	0

 4906 10:00:07.709573  tx_win_center[0][1][2] = 0

 4907 10:00:07.712760  tx_first_pass[0][1][2] =  0

 4908 10:00:07.713296  tx_last_pass[0][1][2] =	0

 4909 10:00:07.715964  tx_win_center[0][1][3] = 0

 4910 10:00:07.719394  tx_first_pass[0][1][3] =  0

 4911 10:00:07.722237  tx_last_pass[0][1][3] =	0

 4912 10:00:07.722659  tx_win_center[0][1][4] = 0

 4913 10:00:07.725881  tx_first_pass[0][1][4] =  0

 4914 10:00:07.728921  tx_last_pass[0][1][4] =	0

 4915 10:00:07.732610  tx_win_center[0][1][5] = 0

 4916 10:00:07.733263  tx_first_pass[0][1][5] =  0

 4917 10:00:07.735747  tx_last_pass[0][1][5] =	0

 4918 10:00:07.739508  tx_win_center[0][1][6] = 0

 4919 10:00:07.740035  tx_first_pass[0][1][6] =  0

 4920 10:00:07.742404  tx_last_pass[0][1][6] =	0

 4921 10:00:07.745733  tx_win_center[0][1][7] = 0

 4922 10:00:07.748756  tx_first_pass[0][1][7] =  0

 4923 10:00:07.749176  tx_last_pass[0][1][7] =	0

 4924 10:00:07.752333  tx_win_center[0][1][8] = 0

 4925 10:00:07.755859  tx_first_pass[0][1][8] =  0

 4926 10:00:07.758992  tx_last_pass[0][1][8] =	0

 4927 10:00:07.759582  tx_win_center[0][1][9] = 0

 4928 10:00:07.762629  tx_first_pass[0][1][9] =  0

 4929 10:00:07.765886  tx_last_pass[0][1][9] =	0

 4930 10:00:07.766411  tx_win_center[0][1][10] = 0

 4931 10:00:07.768774  tx_first_pass[0][1][10] =  0

 4932 10:00:07.772212  tx_last_pass[0][1][10] =	0

 4933 10:00:07.775957  tx_win_center[0][1][11] = 0

 4934 10:00:07.776490  tx_first_pass[0][1][11] =  0

 4935 10:00:07.779498  tx_last_pass[0][1][11] =	0

 4936 10:00:07.782809  tx_win_center[0][1][12] = 0

 4937 10:00:07.785700  tx_first_pass[0][1][12] =  0

 4938 10:00:07.786226  tx_last_pass[0][1][12] =	0

 4939 10:00:07.789237  tx_win_center[0][1][13] = 0

 4940 10:00:07.792792  tx_first_pass[0][1][13] =  0

 4941 10:00:07.795807  tx_last_pass[0][1][13] =	0

 4942 10:00:07.796237  tx_win_center[0][1][14] = 0

 4943 10:00:07.799139  tx_first_pass[0][1][14] =  0

 4944 10:00:07.802445  tx_last_pass[0][1][14] =	0

 4945 10:00:07.805568  tx_win_center[0][1][15] = 0

 4946 10:00:07.808587  tx_first_pass[0][1][15] =  0

 4947 10:00:07.809045  tx_last_pass[0][1][15] =	0

 4948 10:00:07.812266  tx_win_center[1][0][0] = 0

 4949 10:00:07.815840  tx_first_pass[1][0][0] =  0

 4950 10:00:07.816367  tx_last_pass[1][0][0] =	0

 4951 10:00:07.818849  tx_win_center[1][0][1] = 0

 4952 10:00:07.822127  tx_first_pass[1][0][1] =  0

 4953 10:00:07.825751  tx_last_pass[1][0][1] =	0

 4954 10:00:07.826276  tx_win_center[1][0][2] = 0

 4955 10:00:07.828727  tx_first_pass[1][0][2] =  0

 4956 10:00:07.831977  tx_last_pass[1][0][2] =	0

 4957 10:00:07.835602  tx_win_center[1][0][3] = 0

 4958 10:00:07.836125  tx_first_pass[1][0][3] =  0

 4959 10:00:07.838497  tx_last_pass[1][0][3] =	0

 4960 10:00:07.842016  tx_win_center[1][0][4] = 0

 4961 10:00:07.845244  tx_first_pass[1][0][4] =  0

 4962 10:00:07.845767  tx_last_pass[1][0][4] =	0

 4963 10:00:07.848247  tx_win_center[1][0][5] = 0

 4964 10:00:07.851572  tx_first_pass[1][0][5] =  0

 4965 10:00:07.851993  tx_last_pass[1][0][5] =	0

 4966 10:00:07.855261  tx_win_center[1][0][6] = 0

 4967 10:00:07.858663  tx_first_pass[1][0][6] =  0

 4968 10:00:07.861891  tx_last_pass[1][0][6] =	0

 4969 10:00:07.862415  tx_win_center[1][0][7] = 0

 4970 10:00:07.865107  tx_first_pass[1][0][7] =  0

 4971 10:00:07.868099  tx_last_pass[1][0][7] =	0

 4972 10:00:07.868514  tx_win_center[1][0][8] = 0

 4973 10:00:07.871374  tx_first_pass[1][0][8] =  0

 4974 10:00:07.875067  tx_last_pass[1][0][8] =	0

 4975 10:00:07.878489  tx_win_center[1][0][9] = 0

 4976 10:00:07.879033  tx_first_pass[1][0][9] =  0

 4977 10:00:07.881683  tx_last_pass[1][0][9] =	0

 4978 10:00:07.885392  tx_win_center[1][0][10] = 0

 4979 10:00:07.888609  tx_first_pass[1][0][10] =  0

 4980 10:00:07.889134  tx_last_pass[1][0][10] =	0

 4981 10:00:07.891725  tx_win_center[1][0][11] = 0

 4982 10:00:07.895010  tx_first_pass[1][0][11] =  0

 4983 10:00:07.898320  tx_last_pass[1][0][11] =	0

 4984 10:00:07.898766  tx_win_center[1][0][12] = 0

 4985 10:00:07.901557  tx_first_pass[1][0][12] =  0

 4986 10:00:07.904947  tx_last_pass[1][0][12] =	0

 4987 10:00:07.908366  tx_win_center[1][0][13] = 0

 4988 10:00:07.908895  tx_first_pass[1][0][13] =  0

 4989 10:00:07.911774  tx_last_pass[1][0][13] =	0

 4990 10:00:07.914781  tx_win_center[1][0][14] = 0

 4991 10:00:07.918139  tx_first_pass[1][0][14] =  0

 4992 10:00:07.918667  tx_last_pass[1][0][14] =	0

 4993 10:00:07.921361  tx_win_center[1][0][15] = 0

 4994 10:00:07.924771  tx_first_pass[1][0][15] =  0

 4995 10:00:07.928198  tx_last_pass[1][0][15] =	0

 4996 10:00:07.928717  tx_win_center[1][1][0] = 0

 4997 10:00:07.931534  tx_first_pass[1][1][0] =  0

 4998 10:00:07.935063  tx_last_pass[1][1][0] =	0

 4999 10:00:07.938244  tx_win_center[1][1][1] = 0

 5000 10:00:07.938658  tx_first_pass[1][1][1] =  0

 5001 10:00:07.941808  tx_last_pass[1][1][1] =	0

 5002 10:00:07.944813  tx_win_center[1][1][2] = 0

 5003 10:00:07.945233  tx_first_pass[1][1][2] =  0

 5004 10:00:07.948089  tx_last_pass[1][1][2] =	0

 5005 10:00:07.951385  tx_win_center[1][1][3] = 0

 5006 10:00:07.955077  tx_first_pass[1][1][3] =  0

 5007 10:00:07.955643  tx_last_pass[1][1][3] =	0

 5008 10:00:07.958128  tx_win_center[1][1][4] = 0

 5009 10:00:07.961732  tx_first_pass[1][1][4] =  0

 5010 10:00:07.964707  tx_last_pass[1][1][4] =	0

 5011 10:00:07.965129  tx_win_center[1][1][5] = 0

 5012 10:00:07.968283  tx_first_pass[1][1][5] =  0

 5013 10:00:07.971290  tx_last_pass[1][1][5] =	0

 5014 10:00:07.971733  tx_win_center[1][1][6] = 0

 5015 10:00:07.974875  tx_first_pass[1][1][6] =  0

 5016 10:00:07.978186  tx_last_pass[1][1][6] =	0

 5017 10:00:07.981597  tx_win_center[1][1][7] = 0

 5018 10:00:07.982161  tx_first_pass[1][1][7] =  0

 5019 10:00:07.984753  tx_last_pass[1][1][7] =	0

 5020 10:00:07.988155  tx_win_center[1][1][8] = 0

 5021 10:00:07.991552  tx_first_pass[1][1][8] =  0

 5022 10:00:07.992186  tx_last_pass[1][1][8] =	0

 5023 10:00:07.994535  tx_win_center[1][1][9] = 0

 5024 10:00:07.998393  tx_first_pass[1][1][9] =  0

 5025 10:00:07.998977  tx_last_pass[1][1][9] =	0

 5026 10:00:08.001370  tx_win_center[1][1][10] = 0

 5027 10:00:08.004511  tx_first_pass[1][1][10] =  0

 5028 10:00:08.007957  tx_last_pass[1][1][10] =	0

 5029 10:00:08.008419  tx_win_center[1][1][11] = 0

 5030 10:00:08.011522  tx_first_pass[1][1][11] =  0

 5031 10:00:08.014607  tx_last_pass[1][1][11] =	0

 5032 10:00:08.017507  tx_win_center[1][1][12] = 0

 5033 10:00:08.018202  tx_first_pass[1][1][12] =  0

 5034 10:00:08.020944  tx_last_pass[1][1][12] =	0

 5035 10:00:08.024701  tx_win_center[1][1][13] = 0

 5036 10:00:08.027765  tx_first_pass[1][1][13] =  0

 5037 10:00:08.028187  tx_last_pass[1][1][13] =	0

 5038 10:00:08.031004  tx_win_center[1][1][14] = 0

 5039 10:00:08.034861  tx_first_pass[1][1][14] =  0

 5040 10:00:08.038203  tx_last_pass[1][1][14] =	0

 5041 10:00:08.038736  tx_win_center[1][1][15] = 0

 5042 10:00:08.041309  tx_first_pass[1][1][15] =  0

 5043 10:00:08.044622  tx_last_pass[1][1][15] =	0

 5044 10:00:08.047622  dump params rx window

 5045 10:00:08.048149  rx_firspass[0][0][0] = 0

 5046 10:00:08.050831  rx_lastpass[0][0][0] =  0

 5047 10:00:08.054145  rx_firspass[0][0][1] = 0

 5048 10:00:08.054560  rx_lastpass[0][0][1] =  0

 5049 10:00:08.057436  rx_firspass[0][0][2] = 0

 5050 10:00:08.060871  rx_lastpass[0][0][2] =  0

 5051 10:00:08.061286  rx_firspass[0][0][3] = 0

 5052 10:00:08.063960  rx_lastpass[0][0][3] =  0

 5053 10:00:08.067985  rx_firspass[0][0][4] = 0

 5054 10:00:08.068512  rx_lastpass[0][0][4] =  0

 5055 10:00:08.070987  rx_firspass[0][0][5] = 0

 5056 10:00:08.074440  rx_lastpass[0][0][5] =  0

 5057 10:00:08.077507  rx_firspass[0][0][6] = 0

 5058 10:00:08.077930  rx_lastpass[0][0][6] =  0

 5059 10:00:08.080954  rx_firspass[0][0][7] = 0

 5060 10:00:08.084069  rx_lastpass[0][0][7] =  0

 5061 10:00:08.084485  rx_firspass[0][0][8] = 0

 5062 10:00:08.087264  rx_lastpass[0][0][8] =  0

 5063 10:00:08.090912  rx_firspass[0][0][9] = 0

 5064 10:00:08.091480  rx_lastpass[0][0][9] =  0

 5065 10:00:08.094177  rx_firspass[0][0][10] = 0

 5066 10:00:08.097712  rx_lastpass[0][0][10] =  0

 5067 10:00:08.098230  rx_firspass[0][0][11] = 0

 5068 10:00:08.100789  rx_lastpass[0][0][11] =  0

 5069 10:00:08.104130  rx_firspass[0][0][12] = 0

 5070 10:00:08.107576  rx_lastpass[0][0][12] =  0

 5071 10:00:08.108084  rx_firspass[0][0][13] = 0

 5072 10:00:08.111095  rx_lastpass[0][0][13] =  0

 5073 10:00:08.113870  rx_firspass[0][0][14] = 0

 5074 10:00:08.114395  rx_lastpass[0][0][14] =  0

 5075 10:00:08.117163  rx_firspass[0][0][15] = 0

 5076 10:00:08.120705  rx_lastpass[0][0][15] =  0

 5077 10:00:08.124411  rx_firspass[0][1][0] = 0

 5078 10:00:08.124825  rx_lastpass[0][1][0] =  0

 5079 10:00:08.127482  rx_firspass[0][1][1] = 0

 5080 10:00:08.131049  rx_lastpass[0][1][1] =  0

 5081 10:00:08.131502  rx_firspass[0][1][2] = 0

 5082 10:00:08.134295  rx_lastpass[0][1][2] =  0

 5083 10:00:08.137574  rx_firspass[0][1][3] = 0

 5084 10:00:08.138087  rx_lastpass[0][1][3] =  0

 5085 10:00:08.140692  rx_firspass[0][1][4] = 0

 5086 10:00:08.144060  rx_lastpass[0][1][4] =  0

 5087 10:00:08.144474  rx_firspass[0][1][5] = 0

 5088 10:00:08.147331  rx_lastpass[0][1][5] =  0

 5089 10:00:08.151084  rx_firspass[0][1][6] = 0

 5090 10:00:08.151538  rx_lastpass[0][1][6] =  0

 5091 10:00:08.153784  rx_firspass[0][1][7] = 0

 5092 10:00:08.157430  rx_lastpass[0][1][7] =  0

 5093 10:00:08.160629  rx_firspass[0][1][8] = 0

 5094 10:00:08.161044  rx_lastpass[0][1][8] =  0

 5095 10:00:08.164078  rx_firspass[0][1][9] = 0

 5096 10:00:08.167060  rx_lastpass[0][1][9] =  0

 5097 10:00:08.167638  rx_firspass[0][1][10] = 0

 5098 10:00:08.170413  rx_lastpass[0][1][10] =  0

 5099 10:00:08.173975  rx_firspass[0][1][11] = 0

 5100 10:00:08.174390  rx_lastpass[0][1][11] =  0

 5101 10:00:08.177035  rx_firspass[0][1][12] = 0

 5102 10:00:08.180832  rx_lastpass[0][1][12] =  0

 5103 10:00:08.184203  rx_firspass[0][1][13] = 0

 5104 10:00:08.184616  rx_lastpass[0][1][13] =  0

 5105 10:00:08.187539  rx_firspass[0][1][14] = 0

 5106 10:00:08.190799  rx_lastpass[0][1][14] =  0

 5107 10:00:08.191397  rx_firspass[0][1][15] = 0

 5108 10:00:08.193594  rx_lastpass[0][1][15] =  0

 5109 10:00:08.196917  rx_firspass[1][0][0] = 0

 5110 10:00:08.200635  rx_lastpass[1][0][0] =  0

 5111 10:00:08.201046  rx_firspass[1][0][1] = 0

 5112 10:00:08.204083  rx_lastpass[1][0][1] =  0

 5113 10:00:08.207401  rx_firspass[1][0][2] = 0

 5114 10:00:08.207844  rx_lastpass[1][0][2] =  0

 5115 10:00:08.210537  rx_firspass[1][0][3] = 0

 5116 10:00:08.213823  rx_lastpass[1][0][3] =  0

 5117 10:00:08.214239  rx_firspass[1][0][4] = 0

 5118 10:00:08.216887  rx_lastpass[1][0][4] =  0

 5119 10:00:08.220414  rx_firspass[1][0][5] = 0

 5120 10:00:08.220915  rx_lastpass[1][0][5] =  0

 5121 10:00:08.223779  rx_firspass[1][0][6] = 0

 5122 10:00:08.226925  rx_lastpass[1][0][6] =  0

 5123 10:00:08.227337  rx_firspass[1][0][7] = 0

 5124 10:00:08.230199  rx_lastpass[1][0][7] =  0

 5125 10:00:08.233775  rx_firspass[1][0][8] = 0

 5126 10:00:08.237077  rx_lastpass[1][0][8] =  0

 5127 10:00:08.237612  rx_firspass[1][0][9] = 0

 5128 10:00:08.240479  rx_lastpass[1][0][9] =  0

 5129 10:00:08.243464  rx_firspass[1][0][10] = 0

 5130 10:00:08.243884  rx_lastpass[1][0][10] =  0

 5131 10:00:08.247031  rx_firspass[1][0][11] = 0

 5132 10:00:08.250285  rx_lastpass[1][0][11] =  0

 5133 10:00:08.250789  rx_firspass[1][0][12] = 0

 5134 10:00:08.254043  rx_lastpass[1][0][12] =  0

 5135 10:00:08.257350  rx_firspass[1][0][13] = 0

 5136 10:00:08.260436  rx_lastpass[1][0][13] =  0

 5137 10:00:08.260857  rx_firspass[1][0][14] = 0

 5138 10:00:08.263841  rx_lastpass[1][0][14] =  0

 5139 10:00:08.267378  rx_firspass[1][0][15] = 0

 5140 10:00:08.267935  rx_lastpass[1][0][15] =  0

 5141 10:00:08.270050  rx_firspass[1][1][0] = 0

 5142 10:00:08.273386  rx_lastpass[1][1][0] =  0

 5143 10:00:08.276715  rx_firspass[1][1][1] = 0

 5144 10:00:08.277127  rx_lastpass[1][1][1] =  0

 5145 10:00:08.279914  rx_firspass[1][1][2] = 0

 5146 10:00:08.283666  rx_lastpass[1][1][2] =  0

 5147 10:00:08.284195  rx_firspass[1][1][3] = 0

 5148 10:00:08.286585  rx_lastpass[1][1][3] =  0

 5149 10:00:08.290230  rx_firspass[1][1][4] = 0

 5150 10:00:08.290742  rx_lastpass[1][1][4] =  0

 5151 10:00:08.293431  rx_firspass[1][1][5] = 0

 5152 10:00:08.296807  rx_lastpass[1][1][5] =  0

 5153 10:00:08.297322  rx_firspass[1][1][6] = 0

 5154 10:00:08.300084  rx_lastpass[1][1][6] =  0

 5155 10:00:08.303340  rx_firspass[1][1][7] = 0

 5156 10:00:08.306509  rx_lastpass[1][1][7] =  0

 5157 10:00:08.306973  rx_firspass[1][1][8] = 0

 5158 10:00:08.310381  rx_lastpass[1][1][8] =  0

 5159 10:00:08.313739  rx_firspass[1][1][9] = 0

 5160 10:00:08.314309  rx_lastpass[1][1][9] =  0

 5161 10:00:08.316716  rx_firspass[1][1][10] = 0

 5162 10:00:08.320186  rx_lastpass[1][1][10] =  0

 5163 10:00:08.320735  rx_firspass[1][1][11] = 0

 5164 10:00:08.323435  rx_lastpass[1][1][11] =  0

 5165 10:00:08.326595  rx_firspass[1][1][12] = 0

 5166 10:00:08.330558  rx_lastpass[1][1][12] =  0

 5167 10:00:08.331114  rx_firspass[1][1][13] = 0

 5168 10:00:08.333856  rx_lastpass[1][1][13] =  0

 5169 10:00:08.336833  rx_firspass[1][1][14] = 0

 5170 10:00:08.337383  rx_lastpass[1][1][14] =  0

 5171 10:00:08.339984  rx_firspass[1][1][15] = 0

 5172 10:00:08.343867  rx_lastpass[1][1][15] =  0

 5173 10:00:08.344437  dump params clk_delay

 5174 10:00:08.347005  clk_delay[0] = 0

 5175 10:00:08.347499  clk_delay[1] = 0

 5176 10:00:08.350061  dump params dqs_delay

 5177 10:00:08.350655  dqs_delay[0][0] = 0

 5178 10:00:08.353331  dqs_delay[0][1] = 0

 5179 10:00:08.356583  dqs_delay[1][0] = 0

 5180 10:00:08.357090  dqs_delay[1][1] = 0

 5181 10:00:08.360101  dump params delay_cell_unit = 735

 5182 10:00:08.363504  mt_set_emi_preloader end

 5183 10:00:08.366652  [mt_mem_init] dram size: 0x100000000, rank number: 2 

 5184 10:00:08.370005  [complex_mem_test] start addr:0x40000000, len:20480

 5185 10:00:08.408240  [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0

 5186 10:00:08.414711  [complex_mem_test] start addr:0x80000000, len:20480

 5187 10:00:08.450504  [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0

 5188 10:00:08.457287  [complex_mem_test] start addr:0xc0000000, len:20480

 5189 10:00:08.493248  [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0

 5190 10:00:08.499316  [complex_mem_test] start addr:0x56000000, len:8192

 5191 10:00:08.515913  [MEM] 1st complex R/W mem test pass (start addr:0x56000000)

 5192 10:00:08.519480  ddr_geometry:1

 5193 10:00:08.522672  [complex_mem_test] start addr:0x80000000, len:8192

 5194 10:00:08.539896  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 5195 10:00:08.543291  dram_init: dram init end (result: 0)

 5196 10:00:08.549661  Successfully loaded DRAM blobs and ran DRAM calibration

 5197 10:00:08.559338  Mapping address range [0000000040000000:0000000140000000) as     cacheable | read-write | non-secure | normal

 5198 10:00:08.559820  CBMEM:

 5199 10:00:08.563172  IMD: root @ 00000000fffff000 254 entries.

 5200 10:00:08.566522  IMD: root @ 00000000ffffec00 62 entries.

 5201 10:00:08.573133  VBOOT: copying vboot_working_data (256 bytes) to CBMEM...

 5202 10:00:08.579815  out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 

 5203 10:00:08.583097  in-header: 03 a1 00 00 08 00 00 00 

 5204 10:00:08.586248  in-data: 84 60 60 10 00 00 00 00 

 5205 10:00:08.590006  Chrome EC: clear events_b mask to 0x0000000020004000

 5206 10:00:08.596573  out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 

 5207 10:00:08.599998  in-header: 03 fd 00 00 00 00 00 00 

 5208 10:00:08.600412  in-data: 

 5209 10:00:08.607294  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5210 10:00:08.607914  CBFS @ 21000 size 3d4000

 5211 10:00:08.613965  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5212 10:00:08.617017  CBFS: Locating 'fallback/ramstage'

 5213 10:00:08.620417  CBFS: Found @ offset 10d40 size d563

 5214 10:00:08.641777  read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps

 5215 10:00:08.653539  Accumulated console time in romstage 13493 ms

 5216 10:00:08.654080  

 5217 10:00:08.654439  

 5218 10:00:08.663673  coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...

 5219 10:00:08.666991  ARM64: Exception handlers installed.

 5220 10:00:08.667490  ARM64: Testing exception

 5221 10:00:08.670442  ARM64: Done test exception

 5222 10:00:08.673938  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 5223 10:00:08.676964  Manufacturer: ef

 5224 10:00:08.680204  SF: Detected W25Q64DW with sector size 0x1000, total 0x800000

 5225 10:00:08.687107  WARNING: RO_VPD is uninitialized or empty.

 5226 10:00:08.690323  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5227 10:00:08.693662  FMAP: area RW_VPD found @ 550000 (16384 bytes)

 5228 10:00:08.703652  read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps

 5229 10:00:08.706916  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

 5230 10:00:08.713649  BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0

 5231 10:00:08.714211  Enumerating buses...

 5232 10:00:08.720335  Show all devs... Before device enumeration.

 5233 10:00:08.720903  Root Device: enabled 1

 5234 10:00:08.723237  CPU_CLUSTER: 0: enabled 1

 5235 10:00:08.723850  CPU: 00: enabled 1

 5236 10:00:08.726410  Compare with tree...

 5237 10:00:08.730096  Root Device: enabled 1

 5238 10:00:08.730641   CPU_CLUSTER: 0: enabled 1

 5239 10:00:08.733094    CPU: 00: enabled 1

 5240 10:00:08.736772  Root Device scanning...

 5241 10:00:08.737327  root_dev_scan_bus for Root Device

 5242 10:00:08.740079  CPU_CLUSTER: 0 enabled

 5243 10:00:08.743631  root_dev_scan_bus for Root Device done

 5244 10:00:08.750368  scan_bus: scanning of bus Root Device took 10689 usecs

 5245 10:00:08.750930  done

 5246 10:00:08.753400  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0

 5247 10:00:08.756293  Allocating resources...

 5248 10:00:08.756745  Reading resources...

 5249 10:00:08.763210  Root Device read_resources bus 0 link: 0

 5250 10:00:08.766773  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 5251 10:00:08.767474  CPU: 00 missing read_resources

 5252 10:00:08.772985  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 5253 10:00:08.776876  Root Device read_resources bus 0 link: 0 done

 5254 10:00:08.779830  Done reading resources.

 5255 10:00:08.783543  Show resources in subtree (Root Device)...After reading.

 5256 10:00:08.786719   Root Device child on link 0 CPU_CLUSTER: 0

 5257 10:00:08.789838    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5258 10:00:08.799698    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5259 10:00:08.800126     CPU: 00

 5260 10:00:08.802739  Setting resources...

 5261 10:00:08.806674  Root Device assign_resources, bus 0 link: 0

 5262 10:00:08.809625  CPU_CLUSTER: 0 missing set_resources

 5263 10:00:08.813153  Root Device assign_resources, bus 0 link: 0

 5264 10:00:08.816204  Done setting resources.

 5265 10:00:08.822739  Show resources in subtree (Root Device)...After assigning values.

 5266 10:00:08.826137   Root Device child on link 0 CPU_CLUSTER: 0

 5267 10:00:08.830074    CPU_CLUSTER: 0 child on link 0 CPU: 00

 5268 10:00:08.839466    CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0

 5269 10:00:08.840034     CPU: 00

 5270 10:00:08.842474  Done allocating resources.

 5271 10:00:08.845998  BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0

 5272 10:00:08.849144  Enabling resources...

 5273 10:00:08.849616  done.

 5274 10:00:08.852699  BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0

 5275 10:00:08.855887  Initializing devices...

 5276 10:00:08.856323  Root Device init ...

 5277 10:00:08.859361  mainboard_init: Starting display init.

 5278 10:00:08.862796  ADC[4]: Raw value=75746 ID=0

 5279 10:00:08.885960  anx7625_power_on_init: Init interface.

 5280 10:00:08.889291  anx7625_disable_pd_protocol: Disabled PD feature.

 5281 10:00:08.895960  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 5282 10:00:08.943046  anx7625_start_dp_work: Secure OCM version=00

 5283 10:00:08.946088  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 5284 10:00:08.963318  sp_tx_get_edid_block: EDID Block = 1

 5285 10:00:09.080511  Extracted contents:

 5286 10:00:09.083997  header:          00 ff ff ff ff ff ff 00

 5287 10:00:09.087502  serial number:   06 af 5c 14 00 00 00 00 00 1a

 5288 10:00:09.090880  version:         01 04

 5289 10:00:09.094121  basic params:    95 1a 0e 78 02

 5290 10:00:09.097365  chroma info:     99 85 95 55 56 92 28 22 50 54

 5291 10:00:09.100306  established:     00 00 00

 5292 10:00:09.107317  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 5293 10:00:09.110518  descriptor 1:    ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18

 5294 10:00:09.117238  descriptor 2:    00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20

 5295 10:00:09.124146  descriptor 3:    00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20

 5296 10:00:09.130802  descriptor 4:    00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a

 5297 10:00:09.133612  extensions:      00

 5298 10:00:09.134018  checksum:        ae

 5299 10:00:09.134365  

 5300 10:00:09.137339  Manufacturer: AUO Model 145c Serial Number 0

 5301 10:00:09.140204  Made week 0 of 2016

 5302 10:00:09.140762  EDID version: 1.4

 5303 10:00:09.143800  Digital display

 5304 10:00:09.147307  6 bits per primary color channel

 5305 10:00:09.147819  DisplayPort interface

 5306 10:00:09.150048  Maximum image size: 26 cm x 14 cm

 5307 10:00:09.153404  Gamma: 220%

 5308 10:00:09.153816  Check DPMS levels

 5309 10:00:09.156926  Supported color formats: RGB 4:4:4

 5310 10:00:09.160068  First detailed timing is preferred timing

 5311 10:00:09.163681  Established timings supported:

 5312 10:00:09.166817  Standard timings supported:

 5313 10:00:09.167317  Detailed timings

 5314 10:00:09.173567  Hex of detail: ce1d56ea50001a3030204600009010000018

 5315 10:00:09.177060  Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm

 5316 10:00:09.179895                 0556 0586 05a6 0640 hborder 0

 5317 10:00:09.183494                 0300 0304 030a 031a vborder 0

 5318 10:00:09.186818                 -hsync -vsync 

 5319 10:00:09.190222  Did detailed timing

 5320 10:00:09.193728  Hex of detail: 0000000f0000000000000000000000000020

 5321 10:00:09.196933  Manufacturer-specified data, tag 15

 5322 10:00:09.203721  Hex of detail: 000000fe0041554f0a202020202020202020

 5323 10:00:09.204634  ASCII string: AUO

 5324 10:00:09.206806  Hex of detail: 000000fe004231313658414230312e34200a

 5325 10:00:09.209943  ASCII string: B116XAB01.4 

 5326 10:00:09.210492  Checksum

 5327 10:00:09.213279  Checksum: 0xae (valid)

 5328 10:00:09.219882  get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz

 5329 10:00:09.220571  DSI data_rate: 457800000 bps

 5330 10:00:09.227303  anx7625_parse_edid: set default k value to 0x3d for panel

 5331 10:00:09.230807  anx7625_parse_edid: pixelclock(76300).

 5332 10:00:09.233935   hactive(1366), hsync(32), hfp(48), hbp(154)

 5333 10:00:09.237432   vactive(768), vsync(6), vfp(4), vbp(16)

 5334 10:00:09.240839  anx7625_dsi_config: config dsi.

 5335 10:00:09.249091  anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).

 5336 10:00:09.269740  anx7625_dsi_config: success to config DSI

 5337 10:00:09.272940  anx7625_dp_start: MIPI phy setup OK.

 5338 10:00:09.276939  [SSUSB] Setting up USB HOST controller...

 5339 10:00:09.280131  [SSUSB] u3phy_ports_enable u2p:1, u3p:0

 5340 10:00:09.280552  [SSUSB] phy power-on done.

 5341 10:00:09.287381  out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 

 5342 10:00:09.290254  in-header: 03 fc 01 00 00 00 00 00 

 5343 10:00:09.290681  in-data: 

 5344 10:00:09.296722  handle_proto3_response: EC response with error code: 1

 5345 10:00:09.297170  SPM: pcm index = 1

 5346 10:00:09.299936  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5347 10:00:09.303245  CBFS @ 21000 size 3d4000

 5348 10:00:09.309882  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5349 10:00:09.313037  CBFS: Locating 'pcm_allinone_lp4_3200.bin'

 5350 10:00:09.316821  CBFS: Found @ offset 1e7c0 size 1026

 5351 10:00:09.323082  read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps

 5352 10:00:09.326852  SPM: binary array size = 2988

 5353 10:00:09.330067  SPM: version = pcm_allinone_v1.17.2_20180829

 5354 10:00:09.333461  SPM binary loaded in 32 msecs

 5355 10:00:09.341488  spm_kick_im_to_fetch: ptr = 000000004021eec2

 5356 10:00:09.344742  spm_kick_im_to_fetch: len = 2988

 5357 10:00:09.345307  SPM: spm_kick_pcm_to_run

 5358 10:00:09.348288  SPM: spm_kick_pcm_to_run done

 5359 10:00:09.351542  SPM: spm_init done in 52 msecs

 5360 10:00:09.354674  Root Device init finished in 495441 usecs

 5361 10:00:09.357590  CPU_CLUSTER: 0 init ...

 5362 10:00:09.367987  Mapping address range [0000000000200000:0000000000280000) as     cacheable | read-write |     secure | device

 5363 10:00:09.371296  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5364 10:00:09.374615  CBFS @ 21000 size 3d4000

 5365 10:00:09.378311  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5366 10:00:09.381505  CBFS: Locating 'sspm.bin'

 5367 10:00:09.384227  CBFS: Found @ offset 208c0 size 41cb

 5368 10:00:09.395187  read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps

 5369 10:00:09.402695  CPU_CLUSTER: 0 init finished in 42804 usecs

 5370 10:00:09.403195  Devices initialized

 5371 10:00:09.405884  Show all devs... After init.

 5372 10:00:09.409137  Root Device: enabled 1

 5373 10:00:09.409553  CPU_CLUSTER: 0: enabled 1

 5374 10:00:09.412578  CPU: 00: enabled 1

 5375 10:00:09.415970  BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0

 5376 10:00:09.418878  FMAP: area RW_ELOG found @ 558000 (4096 bytes)

 5377 10:00:09.422187  ELOG: NV offset 0x558000 size 0x1000

 5378 10:00:09.430151  read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps

 5379 10:00:09.436748  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 5380 10:00:09.440103  ELOG: Event(17) added with size 13 at 2024-06-18 09:59:11 UTC

 5381 10:00:09.443661  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 5382 10:00:09.446638  in-header: 03 98 00 00 2c 00 00 00 

 5383 10:00:09.460110  in-data: 2b 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 b4 44 01 00 06 80 00 00 f5 3c 02 00 06 80 00 00 92 1f 01 00 06 80 00 00 8e 2b 02 00 

 5384 10:00:09.463394  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

 5385 10:00:09.466666  in-header: 03 19 00 00 08 00 00 00 

 5386 10:00:09.470021  in-data: a2 e0 47 00 13 00 00 00 

 5387 10:00:09.473424  Chrome EC: UHEPI supported

 5388 10:00:09.480193  out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 

 5389 10:00:09.483364  in-header: 03 e1 00 00 08 00 00 00 

 5390 10:00:09.486731  in-data: 84 20 60 10 00 00 00 00 

 5391 10:00:09.490324  FMAP: area RW_NVRAM found @ 554000 (8192 bytes)

 5392 10:00:09.496849  out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 

 5393 10:00:09.499924  in-header: 03 e1 00 00 08 00 00 00 

 5394 10:00:09.503324  in-data: 84 20 60 10 00 00 00 00 

 5395 10:00:09.509938  ELOG: Event(A1) added with size 10 at 2024-06-18 09:59:11 UTC

 5396 10:00:09.512883  ELOG: Event(16) added with size 11 at 2024-06-18 09:59:11 UTC

 5397 10:00:09.591994  SF: Successfully erased 4096 bytes @ 0x558000

 5398 10:00:09.603806  read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps

 5399 10:00:09.610473  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 5400 10:00:09.616997  ELOG: Event(A0) added with size 9 at 2024-06-18 09:59:11 UTC

 5401 10:00:09.620581  elog_add_boot_reason: Logged dev mode boot

 5402 10:00:09.621150  Finalize devices...

 5403 10:00:09.623657  Devices finalized

 5404 10:00:09.626969  BS: BS_POST_DEVICE times (ms): entry 83 run 0 exit 0

 5405 10:00:09.633846  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 5406 10:00:09.636912  ELOG: Event(91) added with size 10 at 2024-06-18 09:59:11 UTC

 5407 10:00:09.640358  Writing coreboot table at 0xffeda000

 5408 10:00:09.647294   0. 0000000000114000-000000000011efff: RAMSTAGE

 5409 10:00:09.650644   1. 0000000040000000-000000004023cfff: RAMSTAGE

 5410 10:00:09.653712   2. 000000004023d000-00000000545fffff: RAM

 5411 10:00:09.656800   3. 0000000054600000-000000005465ffff: BL31

 5412 10:00:09.659994   4. 0000000054660000-00000000ffed9fff: RAM

 5413 10:00:09.666680   5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES

 5414 10:00:09.670679   6. 0000000100000000-000000013fffffff: RAM

 5415 10:00:09.673355  Passing 5 GPIOs to payload:

 5416 10:00:09.676722              NAME |       PORT | POLARITY |     VALUE

 5417 10:00:09.683187     write protect | 0x00000096 |      low |       low

 5418 10:00:09.686715          EC in RW | 0x000000b1 |     high | undefined

 5419 10:00:09.693533      EC interrupt | 0x00000097 |      low | undefined

 5420 10:00:09.696726     TPM interrupt | 0x00000099 |     high | undefined

 5421 10:00:09.699705    speaker enable | 0x000000af |     high | undefined

 5422 10:00:09.703248  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 5423 10:00:09.706587  in-header: 03 f7 00 00 02 00 00 00 

 5424 10:00:09.709846  in-data: 04 00 

 5425 10:00:09.710263  Board ID: 4

 5426 10:00:09.713372  ADC[3]: Raw value=215504 ID=1

 5427 10:00:09.713903  RAM code: 1

 5428 10:00:09.716561  SKU ID: 16

 5429 10:00:09.720105  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5430 10:00:09.723282  CBFS @ 21000 size 3d4000

 5431 10:00:09.726588  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5432 10:00:09.733352  Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 77ff

 5433 10:00:09.736555  coreboot table: 940 bytes.

 5434 10:00:09.739729  IMD ROOT    0. 00000000fffff000 00001000

 5435 10:00:09.742820  IMD SMALL   1. 00000000ffffe000 00001000

 5436 10:00:09.746430  CONSOLE     2. 00000000fffde000 00020000

 5437 10:00:09.749314  FMAP        3. 00000000fffdd000 0000047c

 5438 10:00:09.753059  TIME STAMP  4. 00000000fffdc000 00000910

 5439 10:00:09.755890  RAMOOPS     5. 00000000ffedc000 00100000

 5440 10:00:09.759876  COREBOOT    6. 00000000ffeda000 00002000

 5441 10:00:09.762969  IMD small region:

 5442 10:00:09.766325    IMD ROOT    0. 00000000ffffec00 00000400

 5443 10:00:09.770095    VBOOT WORK  1. 00000000ffffeb00 00000100

 5444 10:00:09.772679    EC HOSTEVENT 2. 00000000ffffeae0 00000008

 5445 10:00:09.779822    VPD         3. 00000000ffffea60 0000006c

 5446 10:00:09.783029  BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0

 5447 10:00:09.789409  out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 

 5448 10:00:09.792522  in-header: 03 e1 00 00 08 00 00 00 

 5449 10:00:09.795655  in-data: 84 20 60 10 00 00 00 00 

 5450 10:00:09.799392  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5451 10:00:09.802926  CBFS @ 21000 size 3d4000

 5452 10:00:09.809171  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5453 10:00:09.809721  CBFS: Locating 'fallback/payload'

 5454 10:00:09.818669  CBFS: Found @ offset dc040 size 439a0

 5455 10:00:09.906824  read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps

 5456 10:00:09.910424  Checking segment from ROM address 0x0000000040003a00

 5457 10:00:09.917195  Checking segment from ROM address 0x0000000040003a1c

 5458 10:00:09.920280  Loading segment from ROM address 0x0000000040003a00

 5459 10:00:09.923772    code (compression=0)

 5460 10:00:09.933707    New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968

 5461 10:00:09.940286  Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968

 5462 10:00:09.943346  it's not compressed!

 5463 10:00:09.946348  [ 0x80000000, 80043968, 0x811994a0) <- 40003a38

 5464 10:00:09.953135  Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38

 5465 10:00:09.961330  Loading segment from ROM address 0x0000000040003a1c

 5466 10:00:09.964298    Entry Point 0x0000000080000000

 5467 10:00:09.964771  Loaded segments

 5468 10:00:09.971034  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0

 5469 10:00:09.974559  Jumping to boot code at 0000000080000000(00000000ffeda000)

 5470 10:00:09.984222  CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes

 5471 10:00:09.987881  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 5472 10:00:09.990637  CBFS @ 21000 size 3d4000

 5473 10:00:09.997957  CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)

 5474 10:00:10.001257  CBFS: Locating 'fallback/bl31'

 5475 10:00:10.004048  CBFS: Found @ offset 36dc0 size 5820

 5476 10:00:10.015368  read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps

 5477 10:00:10.018707  Checking segment from ROM address 0x0000000040003a00

 5478 10:00:10.025108  Checking segment from ROM address 0x0000000040003a1c

 5479 10:00:10.028667  Loading segment from ROM address 0x0000000040003a00

 5480 10:00:10.031765    code (compression=1)

 5481 10:00:10.038634    New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8

 5482 10:00:10.048555  Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8

 5483 10:00:10.049126  using LZMA

 5484 10:00:10.057055  [ 0x54600000, 5460f420, 0x54629000) <- 40003a38

 5485 10:00:10.063536  Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0

 5486 10:00:10.067217  Loading segment from ROM address 0x0000000040003a1c

 5487 10:00:10.070350    Entry Point 0x0000000054601000

 5488 10:00:10.070915  Loaded segments

 5489 10:00:10.073650  NOTICE:  MT8183 bl31_setup

 5490 10:00:10.080684  NOTICE:  BL31: v2.1(debug):v2.1-806-g3addeb68c

 5491 10:00:10.083907  NOTICE:  BL31: Built : Sun Jan 30 03:25:20 UTC 2022

 5492 10:00:10.087568  INFO:    [DEVAPC] dump DEVAPC registers:

 5493 10:00:10.097294  INFO:    [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0

 5494 10:00:10.103717  INFO:    [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0

 5495 10:00:10.113753  INFO:    [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0

 5496 10:00:10.120835  INFO:    [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0

 5497 10:00:10.130363  INFO:    [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0

 5498 10:00:10.137228  INFO:    [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0

 5499 10:00:10.146904  INFO:    [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0

 5500 10:00:10.153999  INFO:    [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0

 5501 10:00:10.163885  INFO:    [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0

 5502 10:00:10.170347  INFO:    [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0

 5503 10:00:10.180020  INFO:    [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0

 5504 10:00:10.186548  INFO:    [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0

 5505 10:00:10.193011  INFO:    [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0

 5506 10:00:10.203573  INFO:    [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0

 5507 10:00:10.210258  INFO:    [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0

 5508 10:00:10.216544  INFO:    [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0

 5509 10:00:10.223538  INFO:    [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0

 5510 10:00:10.229880  INFO:    [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0

 5511 10:00:10.240390  INFO:    [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0

 5512 10:00:10.246346  INFO:    [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0

 5513 10:00:10.253063  INFO:    [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0

 5514 10:00:10.259606  INFO:    [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0

 5515 10:00:10.263081  INFO:    [DEVAPC] MAS_DOM_0 = 0x1

 5516 10:00:10.266376  INFO:    [DEVAPC] MAS_DOM_1 = 0x200

 5517 10:00:10.269640  INFO:    [DEVAPC] MAS_DOM_2 = 0x0

 5518 10:00:10.272613  INFO:    [DEVAPC] MAS_DOM_3 = 0x2000

 5519 10:00:10.275930  INFO:    [DEVAPC] MAS_SEC_0 = 0x8000000

 5520 10:00:10.282589  INFO:    [DEVAPC]  (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0

 5521 10:00:10.289504  INFO:    [DEVAPC]  (MM)MAS_DOMAIN_REMAP_0 = 0x24

 5522 10:00:10.289926  WARNING: region 0:

 5523 10:00:10.292425  WARNING: 	apc:0x168, sa:0x0, ea:0xfff

 5524 10:00:10.295855  WARNING: region 1:

 5525 10:00:10.299673  WARNING: 	apc:0x140, sa:0x1000, ea:0x128f

 5526 10:00:10.300100  WARNING: region 2:

 5527 10:00:10.302718  WARNING: 	apc:0x168, sa:0x1290, ea:0x1fff

 5528 10:00:10.306097  WARNING: region 3:

 5529 10:00:10.309518  WARNING: 	apc:0x168, sa:0x2000, ea:0xbfff

 5530 10:00:10.312864  WARNING: region 4:

 5531 10:00:10.316379  WARNING: 	apc:0x168, sa:0xc000, ea:0x1ffff

 5532 10:00:10.316876  WARNING: region 5:

 5533 10:00:10.319064  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5534 10:00:10.323047  WARNING: region 6:

 5535 10:00:10.326492  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5536 10:00:10.327013  WARNING: region 7:

 5537 10:00:10.329216  WARNING: 	apc:0x0, sa:0x0, ea:0x0

 5538 10:00:10.335850  INFO:    GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3

 5539 10:00:10.339179  INFO:    SPM: enable SPMC mode

 5540 10:00:10.342676  NOTICE:  spm_boot_init() start

 5541 10:00:10.345909  NOTICE:  spm_boot_init() end

 5542 10:00:10.349039  INFO:    BL31: Initializing runtime services

 5543 10:00:10.355270  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied

 5544 10:00:10.358547  INFO:    BL31: Preparing for EL3 exit to normal world

 5545 10:00:10.361954  INFO:    Entry point address = 0x80000000

 5546 10:00:10.365251  INFO:    SPSR = 0x8

 5547 10:00:10.387273  

 5548 10:00:10.387895  

 5549 10:00:10.388268  

 5550 10:00:10.389975  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 5551 10:00:10.390519  start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
 5552 10:00:10.390974  Setting prompt string to ['jacuzzi:']
 5553 10:00:10.391458  bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
 5554 10:00:10.392205  Starting depthcharge on Juniper...

 5555 10:00:10.392590  

 5556 10:00:10.394127  vboot_handoff: creating legacy vboot_handoff structure

 5557 10:00:10.394691  

 5558 10:00:10.397056  ec_init(0): CrosEC protocol v3 supported (544, 544)

 5559 10:00:10.397478  

 5560 10:00:10.400170  Wipe memory regions:

 5561 10:00:10.400590  

 5562 10:00:10.403804  	[0x00000040000000, 0x00000054600000)

 5563 10:00:10.446934  

 5564 10:00:10.447560  	[0x00000054660000, 0x00000080000000)

 5565 10:00:10.538188  

 5566 10:00:10.538751  	[0x000000811994a0, 0x000000ffeda000)

 5567 10:00:10.797996  

 5568 10:00:10.798561  	[0x00000100000000, 0x00000140000000)

 5569 10:00:10.931017  

 5570 10:00:10.934425  Initializing XHCI USB controller at 0x11200000.

 5571 10:00:10.957124  

 5572 10:00:10.960287  [firmware-jacuzzi-12573.B-collabora] Jun  8 2022 08:18:54

 5573 10:00:10.960758  

 5574 10:00:10.961124  


 5575 10:00:10.961954  Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5577 10:00:11.063239  jacuzzi: tftpboot 192.168.201.1 14407632/tftp-deploy-39smngtf/kernel/image.itb 14407632/tftp-deploy-39smngtf/kernel/cmdline 

 5578 10:00:11.063960  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5579 10:00:11.064431  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
 5580 10:00:11.069444  tftpboot 192.168.201.1 14407632/tftp-deploy-39smngtf/kernel/image.ittp-deploy-39smngtf/kernel/cmdline 

 5581 10:00:11.070013  

 5582 10:00:11.070378  Waiting for link

 5583 10:00:11.471736  

 5584 10:00:11.472313  R8152: Initializing

 5585 10:00:11.472686  

 5586 10:00:11.474718  Version 9 (ocp_data = 6010)

 5587 10:00:11.475315  

 5588 10:00:11.477719  R8152: Done initializing

 5589 10:00:11.478182  

 5590 10:00:11.478543  Adding net device

 5591 10:00:11.863229  

 5592 10:00:11.863852  done.

 5593 10:00:11.864225  

 5594 10:00:11.864624  MAC: 00:e0:4c:68:0b:b9

 5595 10:00:11.865136  

 5596 10:00:11.866058  Sending DHCP discover... done.

 5597 10:00:11.866520  

 5598 10:00:11.869907  Waiting for reply... done.

 5599 10:00:11.870374  

 5600 10:00:11.873148  Sending DHCP request... done.

 5601 10:00:11.873614  

 5602 10:00:11.876960  Waiting for reply... done.

 5603 10:00:11.877381  

 5604 10:00:11.877715  My ip is 192.168.201.13

 5605 10:00:11.878024  

 5606 10:00:11.880547  The DHCP server ip is 192.168.201.1

 5607 10:00:11.881077  

 5608 10:00:11.887162  TFTP server IP predefined by user: 192.168.201.1

 5609 10:00:11.887945  

 5610 10:00:11.893527  Bootfile predefined by user: 14407632/tftp-deploy-39smngtf/kernel/image.itb

 5611 10:00:11.893983  

 5612 10:00:11.896925  Sending tftp read request... done.

 5613 10:00:11.897347  

 5614 10:00:11.903058  Waiting for the transfer... 

 5615 10:00:11.903518  

 5616 10:00:12.193129  00000000 ################################################################

 5617 10:00:12.193275  

 5618 10:00:12.469889  00080000 ################################################################

 5619 10:00:12.470051  

 5620 10:00:12.750457  00100000 ################################################################

 5621 10:00:12.750610  

 5622 10:00:13.030630  00180000 ################################################################

 5623 10:00:13.030782  

 5624 10:00:13.319379  00200000 ################################################################

 5625 10:00:13.319541  

 5626 10:00:13.597214  00280000 ################################################################

 5627 10:00:13.597366  

 5628 10:00:13.878044  00300000 ################################################################

 5629 10:00:13.878197  

 5630 10:00:14.155541  00380000 ################################################################

 5631 10:00:14.155689  

 5632 10:00:14.434547  00400000 ################################################################

 5633 10:00:14.434699  

 5634 10:00:14.715177  00480000 ################################################################

 5635 10:00:14.715334  

 5636 10:00:14.996206  00500000 ################################################################

 5637 10:00:14.996357  

 5638 10:00:15.277651  00580000 ################################################################

 5639 10:00:15.277829  

 5640 10:00:15.559535  00600000 ################################################################

 5641 10:00:15.559698  

 5642 10:00:15.841427  00680000 ################################################################

 5643 10:00:15.841582  

 5644 10:00:16.121011  00700000 ################################################################

 5645 10:00:16.121165  

 5646 10:00:16.400610  00780000 ################################################################

 5647 10:00:16.400764  

 5648 10:00:16.675696  00800000 ################################################################

 5649 10:00:16.675852  

 5650 10:00:16.952407  00880000 ################################################################

 5651 10:00:16.952562  

 5652 10:00:17.221459  00900000 ################################################################

 5653 10:00:17.221617  

 5654 10:00:17.475181  00980000 ################################################################

 5655 10:00:17.475337  

 5656 10:00:17.728701  00a00000 ################################################################

 5657 10:00:17.728857  

 5658 10:00:17.982704  00a80000 ################################################################

 5659 10:00:17.982892  

 5660 10:00:18.238350  00b00000 ################################################################

 5661 10:00:18.238497  

 5662 10:00:18.492698  00b80000 ################################################################

 5663 10:00:18.492851  

 5664 10:00:18.747522  00c00000 ################################################################

 5665 10:00:18.747680  

 5666 10:00:18.999194  00c80000 ################################################################

 5667 10:00:18.999351  

 5668 10:00:19.278982  00d00000 ################################################################

 5669 10:00:19.279131  

 5670 10:00:19.544360  00d80000 ################################################################

 5671 10:00:19.544517  

 5672 10:00:19.798660  00e00000 ################################################################

 5673 10:00:19.798815  

 5674 10:00:20.053472  00e80000 ################################################################

 5675 10:00:20.053628  

 5676 10:00:20.304689  00f00000 ################################################################

 5677 10:00:20.304841  

 5678 10:00:20.560080  00f80000 ################################################################

 5679 10:00:20.560237  

 5680 10:00:20.814979  01000000 ################################################################

 5681 10:00:20.815133  

 5682 10:00:21.069591  01080000 ################################################################

 5683 10:00:21.069742  

 5684 10:00:21.323875  01100000 ################################################################

 5685 10:00:21.324047  

 5686 10:00:21.577883  01180000 ################################################################

 5687 10:00:21.578076  

 5688 10:00:21.831725  01200000 ################################################################

 5689 10:00:21.831881  

 5690 10:00:22.085812  01280000 ################################################################

 5691 10:00:22.085963  

 5692 10:00:22.340146  01300000 ################################################################

 5693 10:00:22.340299  

 5694 10:00:22.592208  01380000 ################################################################

 5695 10:00:22.592363  

 5696 10:00:22.847544  01400000 ################################################################

 5697 10:00:22.847701  

 5698 10:00:23.133463  01480000 ################################################################

 5699 10:00:23.133621  

 5700 10:00:23.417354  01500000 ################################################################

 5701 10:00:23.417534  

 5702 10:00:23.671814  01580000 ################################################################

 5703 10:00:23.671963  

 5704 10:00:23.933206  01600000 ################################################################

 5705 10:00:23.933363  

 5706 10:00:24.210318  01680000 ################################################################

 5707 10:00:24.210469  

 5708 10:00:24.487178  01700000 ################################################################

 5709 10:00:24.487364  

 5710 10:00:24.740690  01780000 ################################################################

 5711 10:00:24.740841  

 5712 10:00:24.993173  01800000 ################################################################

 5713 10:00:24.993330  

 5714 10:00:25.252211  01880000 ################################################################

 5715 10:00:25.252357  

 5716 10:00:25.515970  01900000 ################################################################

 5717 10:00:25.516135  

 5718 10:00:25.805025  01980000 ################################################################

 5719 10:00:25.805179  

 5720 10:00:26.056989  01a00000 ################################################################

 5721 10:00:26.057145  

 5722 10:00:26.343773  01a80000 ################################################################

 5723 10:00:26.343940  

 5724 10:00:26.622772  01b00000 ################################################################

 5725 10:00:26.622943  

 5726 10:00:26.919775  01b80000 ################################################################

 5727 10:00:26.919922  

 5728 10:00:27.198923  01c00000 ################################################################

 5729 10:00:27.199115  

 5730 10:00:27.462613  01c80000 ################################################################

 5731 10:00:27.462794  

 5732 10:00:27.716413  01d00000 ################################################################

 5733 10:00:27.716564  

 5734 10:00:27.973656  01d80000 ################################################################

 5735 10:00:27.973824  

 5736 10:00:28.206590  01e00000 ########################################################## done.

 5737 10:00:28.206767  

 5738 10:00:28.210007  The bootfile was 31932050 bytes long.

 5739 10:00:28.210109  

 5740 10:00:28.213329  Sending tftp read request... done.

 5741 10:00:28.213436  

 5742 10:00:28.213521  Waiting for the transfer... 

 5743 10:00:28.213599  

 5744 10:00:28.216931  00000000 # done.

 5745 10:00:28.217118  

 5746 10:00:28.223102  Command line loaded dynamically from TFTP file: 14407632/tftp-deploy-39smngtf/kernel/cmdline

 5747 10:00:28.223301  

 5748 10:00:28.250528  The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 5749 10:00:28.250913  

 5750 10:00:28.251149  Loading FIT.

 5751 10:00:28.251354  

 5752 10:00:28.253051  Image ramdisk-1 has 18745577 bytes.

 5753 10:00:28.253326  

 5754 10:00:28.256817  Image fdt-1 has 57695 bytes.

 5755 10:00:28.257227  

 5756 10:00:28.259929  Image kernel-1 has 13126726 bytes.

 5757 10:00:28.260345  

 5758 10:00:28.270292  Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper

 5759 10:00:28.270801  

 5760 10:00:28.279820  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183

 5761 10:00:28.280383  

 5762 10:00:28.286600  Choosing best match conf-1 for compat google,juniper-sku16.

 5763 10:00:28.290452  

 5764 10:00:28.295316  Connected to device vid:did:rid of 1ae0:0028:00

 5765 10:00:28.303622  

 5766 10:00:28.306827  tpm_get_response: command 0x17b, return code 0x0

 5767 10:00:28.307624  

 5768 10:00:28.309991  tpm_cleanup: add release locality here.

 5769 10:00:28.310492  

 5770 10:00:28.313255  Shutting down all USB controllers.

 5771 10:00:28.313671  

 5772 10:00:28.316957  Removing current net device

 5773 10:00:28.317471  

 5774 10:00:28.320092  Exiting depthcharge with code 4 at timestamp: 35145399

 5775 10:00:28.320509  

 5776 10:00:28.323637  LZMA decompressing kernel-1 to 0x80193568

 5777 10:00:28.324151  

 5778 10:00:28.329815  LZMA decompressing kernel-1 to 0x40000000

 5779 10:00:30.195817  

 5780 10:00:30.196313  jumping to kernel

 5781 10:00:30.197872  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 5782 10:00:30.198350  start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
 5783 10:00:30.198725  Setting prompt string to ['Linux version [0-9]']
 5784 10:00:30.199065  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 5785 10:00:30.199438  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 5786 10:00:30.271012  

 5787 10:00:30.274162  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]

 5788 10:00:30.278300  start: 2.2.5.1 login-action (timeout 00:04:05) [common]
 5789 10:00:30.278891  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
 5790 10:00:30.279314  Setting prompt string to []
 5791 10:00:30.279820  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
 5792 10:00:30.280205  Using line separator: #'\n'#
 5793 10:00:30.280537  No login prompt set.
 5794 10:00:30.280980  Parsing kernel messages
 5795 10:00:30.281303  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
 5796 10:00:30.281871  [login-action] Waiting for messages, (timeout 00:04:05)
 5797 10:00:30.282243  Waiting using forced prompt support (timeout 00:02:02)
 5798 10:00:30.297456  [    0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024

 5799 10:00:30.300833  [    0.000000] random: crng init done

 5800 10:00:30.307606  [    0.000000] Machine model: Google juniper sku16 board

 5801 10:00:30.310925  [    0.000000] efi: UEFI not found.

 5802 10:00:30.317298  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

 5803 10:00:30.327029  [    0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool

 5804 10:00:30.333843  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

 5805 10:00:30.337087  [    0.000000] printk: bootconsole [mtk8250] enabled

 5806 10:00:30.345578  [    0.000000] NUMA: No NUMA configuration found

 5807 10:00:30.352211  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]

 5808 10:00:30.358737  [    0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]

 5809 10:00:30.359162  [    0.000000] Zone ranges:

 5810 10:00:30.365694  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

 5811 10:00:30.369357  [    0.000000]   DMA32    empty

 5812 10:00:30.375291  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]

 5813 10:00:30.378544  [    0.000000] Movable zone start for each node

 5814 10:00:30.382398  [    0.000000] Early memory node ranges

 5815 10:00:30.388735  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

 5816 10:00:30.395306  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

 5817 10:00:30.402085  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

 5818 10:00:30.408501  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

 5819 10:00:30.414874  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000013fffffff]

 5820 10:00:30.421273  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]

 5821 10:00:30.438488  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

 5822 10:00:30.445060  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

 5823 10:00:30.451333  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

 5824 10:00:30.454745  [    0.000000] psci: probing for conduit method from DT.

 5825 10:00:30.461219  [    0.000000] psci: PSCIv1.1 detected in firmware.

 5826 10:00:30.464991  [    0.000000] psci: Using standard PSCI v0.2 function IDs

 5827 10:00:30.471171  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

 5828 10:00:30.474999  [    0.000000] psci: SMC Calling Convention v1.1

 5829 10:00:30.481505  [    0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016

 5830 10:00:30.484591  [    0.000000] Detected VIPT I-cache on CPU0

 5831 10:00:30.491344  [    0.000000] CPU features: detected: GIC system register CPU interface

 5832 10:00:30.497896  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

 5833 10:00:30.504487  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

 5834 10:00:30.510978  [    0.000000] CPU features: detected: ARM erratum 845719

 5835 10:00:30.514964  [    0.000000] alternatives: applying boot alternatives

 5836 10:00:30.517711  [    0.000000] Fallback order for Node 0: 0 

 5837 10:00:30.524622  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031424

 5838 10:00:30.527684  [    0.000000] Policy zone: Normal

 5839 10:00:30.554676  [    0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 5840 10:00:30.567852  <5>[    0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.

 5841 10:00:30.577248  <6>[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

 5842 10:00:30.583962  <6>[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)

 5843 10:00:30.590913  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

 5844 10:00:30.597295  <6>[    0.000000] software IO TLB: area num 8.

 5845 10:00:30.621848  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

 5846 10:00:30.679687  <6>[    0.000000] Memory: 3896768K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261696K reserved, 32768K cma-reserved)

 5847 10:00:30.686482  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

 5848 10:00:30.693033  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

 5849 10:00:30.696156  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

 5850 10:00:30.702925  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

 5851 10:00:30.709702  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

 5852 10:00:30.712644  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

 5853 10:00:30.722862  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

 5854 10:00:30.729538  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

 5855 10:00:30.732749  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

 5856 10:00:30.744863  <6>[    0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem

 5857 10:00:30.751772  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

 5858 10:00:30.755094  <6>[    0.000000] GICv3: 640 SPIs implemented

 5859 10:00:30.758453  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

 5860 10:00:30.764861  <6>[    0.000000] Root IRQ handler: gic_handle_irq

 5861 10:00:30.768230  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

 5862 10:00:30.774713  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000

 5863 10:00:30.787990  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }

 5864 10:00:30.798038  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }

 5865 10:00:30.804549  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

 5866 10:00:30.816399  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

 5867 10:00:30.830230  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

 5868 10:00:30.836504  <6>[    0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

 5869 10:00:30.843298  <6>[    0.009469] Console: colour dummy device 80x25

 5870 10:00:30.846646  <6>[    0.014510] printk: console [tty1] enabled

 5871 10:00:30.859698  <6>[    0.018897] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

 5872 10:00:30.863254  <6>[    0.029361] pid_max: default: 32768 minimum: 301

 5873 10:00:30.866624  <6>[    0.034243] LSM: Security Framework initializing

 5874 10:00:30.876718  <6>[    0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5875 10:00:30.883543  <6>[    0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)

 5876 10:00:30.890046  <4>[    0.055654] cacheinfo: Unable to detect cache hierarchy for CPU 0

 5877 10:00:30.899568  <6>[    0.062279] cblist_init_generic: Setting adjustable number of callback queues.

 5878 10:00:30.906307  <6>[    0.069724] cblist_init_generic: Setting shift to 3 and lim to 1.

 5879 10:00:30.913184  <6>[    0.076078] cblist_init_generic: Setting adjustable number of callback queues.

 5880 10:00:30.919705  <6>[    0.083522] cblist_init_generic: Setting shift to 3 and lim to 1.

 5881 10:00:30.923143  <6>[    0.089920] rcu: Hierarchical SRCU implementation.

 5882 10:00:30.929249  <6>[    0.094946] rcu: 	Max phase no-delay instances is 1000.

 5883 10:00:30.936721  <6>[    0.102871] EFI services will not be available.

 5884 10:00:30.940086  <6>[    0.107819] smp: Bringing up secondary CPUs ...

 5885 10:00:30.950515  <6>[    0.113098] Detected VIPT I-cache on CPU1

 5886 10:00:30.957121  <4>[    0.113144] cacheinfo: Unable to detect cache hierarchy for CPU 1

 5887 10:00:30.963475  <6>[    0.113153] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000

 5888 10:00:30.970460  <6>[    0.113184] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]

 5889 10:00:30.973696  <6>[    0.113667] Detected VIPT I-cache on CPU2

 5890 10:00:30.980202  <4>[    0.113700] cacheinfo: Unable to detect cache hierarchy for CPU 2

 5891 10:00:30.987272  <6>[    0.113705] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000

 5892 10:00:30.993908  <6>[    0.113718] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]

 5893 10:00:30.996635  <6>[    0.114163] Detected VIPT I-cache on CPU3

 5894 10:00:31.003798  <4>[    0.114195] cacheinfo: Unable to detect cache hierarchy for CPU 3

 5895 10:00:31.010481  <6>[    0.114199] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000

 5896 10:00:31.016833  <6>[    0.114210] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]

 5897 10:00:31.023677  <6>[    0.114784] CPU features: detected: Spectre-v2

 5898 10:00:31.026639  <6>[    0.114794] CPU features: detected: Spectre-BHB

 5899 10:00:31.033579  <6>[    0.114798] CPU features: detected: ARM erratum 858921

 5900 10:00:31.036833  <6>[    0.114804] Detected VIPT I-cache on CPU4

 5901 10:00:31.043500  <4>[    0.114852] cacheinfo: Unable to detect cache hierarchy for CPU 4

 5902 10:00:31.050327  <6>[    0.114860] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000

 5903 10:00:31.056741  <6>[    0.114868] arch_timer: Enabling local workaround for ARM erratum 858921

 5904 10:00:31.063294  <6>[    0.114879] arch_timer: CPU4: Trapping CNTVCT access

 5905 10:00:31.070544  <6>[    0.114886] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]

 5906 10:00:31.073321  <6>[    0.115370] Detected VIPT I-cache on CPU5

 5907 10:00:31.079975  <4>[    0.115411] cacheinfo: Unable to detect cache hierarchy for CPU 5

 5908 10:00:31.086351  <6>[    0.115417] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000

 5909 10:00:31.093196  <6>[    0.115424] arch_timer: Enabling local workaround for ARM erratum 858921

 5910 10:00:31.099481  <6>[    0.115430] arch_timer: CPU5: Trapping CNTVCT access

 5911 10:00:31.106310  <6>[    0.115435] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]

 5912 10:00:31.109660  <6>[    0.115870] Detected VIPT I-cache on CPU6

 5913 10:00:31.116254  <4>[    0.115917] cacheinfo: Unable to detect cache hierarchy for CPU 6

 5914 10:00:31.122713  <6>[    0.115923] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000

 5915 10:00:31.132902  <6>[    0.115930] arch_timer: Enabling local workaround for ARM erratum 858921

 5916 10:00:31.136387  <6>[    0.115937] arch_timer: CPU6: Trapping CNTVCT access

 5917 10:00:31.142419  <6>[    0.115942] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]

 5918 10:00:31.145769  <6>[    0.116471] Detected VIPT I-cache on CPU7

 5919 10:00:31.152335  <4>[    0.116514] cacheinfo: Unable to detect cache hierarchy for CPU 7

 5920 10:00:31.162663  <6>[    0.116521] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000

 5921 10:00:31.169475  <6>[    0.116528] arch_timer: Enabling local workaround for ARM erratum 858921

 5922 10:00:31.172188  <6>[    0.116534] arch_timer: CPU7: Trapping CNTVCT access

 5923 10:00:31.179204  <6>[    0.116539] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]

 5924 10:00:31.185797  <6>[    0.116605] smp: Brought up 1 node, 8 CPUs

 5925 10:00:31.188960  <6>[    0.355470] SMP: Total of 8 processors activated.

 5926 10:00:31.195516  <6>[    0.360407] CPU features: detected: 32-bit EL0 Support

 5927 10:00:31.199014  <6>[    0.365777] CPU features: detected: 32-bit EL1 Support

 5928 10:00:31.205785  <6>[    0.371143] CPU features: detected: CRC32 instructions

 5929 10:00:31.209078  <6>[    0.376570] CPU: All CPU(s) started at EL2

 5930 10:00:31.215367  <6>[    0.380908] alternatives: applying system-wide alternatives

 5931 10:00:31.222399  <6>[    0.388922] devtmpfs: initialized

 5932 10:00:31.234694  <6>[    0.397861] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns

 5933 10:00:31.244692  <6>[    0.407810] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)

 5934 10:00:31.248238  <6>[    0.415536] pinctrl core: initialized pinctrl subsystem

 5935 10:00:31.256821  <6>[    0.422637] DMI not present or invalid.

 5936 10:00:31.263511  <6>[    0.427006] NET: Registered PF_NETLINK/PF_ROUTE protocol family

 5937 10:00:31.269540  <6>[    0.433914] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations

 5938 10:00:31.279522  <6>[    0.441441] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations

 5939 10:00:31.286369  <6>[    0.449691] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations

 5940 10:00:31.293193  <6>[    0.457868] audit: initializing netlink subsys (disabled)

 5941 10:00:31.300010  <5>[    0.463572] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1

 5942 10:00:31.306584  <6>[    0.464560] thermal_sys: Registered thermal governor 'step_wise'

 5943 10:00:31.313087  <6>[    0.471537] thermal_sys: Registered thermal governor 'power_allocator'

 5944 10:00:31.316943  <6>[    0.477836] cpuidle: using governor menu

 5945 10:00:31.323533  <6>[    0.488800] NET: Registered PF_QIPCRTR protocol family

 5946 10:00:31.329640  <6>[    0.494294] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.

 5947 10:00:31.336356  <6>[    0.501389] ASID allocator initialised with 32768 entries

 5948 10:00:31.339689  <6>[    0.508159] Serial: AMBA PL011 UART driver

 5949 10:00:31.351896  <4>[    0.518564] Trying to register duplicate clock ID: 113

 5950 10:00:31.412096  <6>[    0.575161] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5951 10:00:31.426622  <6>[    0.589503] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 5952 10:00:31.429859  <6>[    0.599256] KASLR enabled

 5953 10:00:31.444211  <6>[    0.607264] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages

 5954 10:00:31.450732  <6>[    0.614266] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page

 5955 10:00:31.457492  <6>[    0.620743] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages

 5956 10:00:31.464181  <6>[    0.627734] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page

 5957 10:00:31.470938  <6>[    0.634208] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages

 5958 10:00:31.477667  <6>[    0.641198] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page

 5959 10:00:31.483749  <6>[    0.647671] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages

 5960 10:00:31.490744  <6>[    0.654661] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page

 5961 10:00:31.493965  <6>[    0.662229] ACPI: Interpreter disabled.

 5962 10:00:31.504248  <6>[    0.670226] iommu: Default domain type: Translated 

 5963 10:00:31.510464  <6>[    0.675332] iommu: DMA domain TLB invalidation policy: strict mode 

 5964 10:00:31.513678  <5>[    0.681963] SCSI subsystem initialized

 5965 10:00:31.520628  <6>[    0.686376] usbcore: registered new interface driver usbfs

 5966 10:00:31.527036  <6>[    0.692105] usbcore: registered new interface driver hub

 5967 10:00:31.530515  <6>[    0.697646] usbcore: registered new device driver usb

 5968 10:00:31.537791  <6>[    0.703951] pps_core: LinuxPPS API ver. 1 registered

 5969 10:00:31.547732  <6>[    0.709136] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

 5970 10:00:31.550930  <6>[    0.718461] PTP clock support registered

 5971 10:00:31.554265  <6>[    0.722712] EDAC MC: Ver: 3.0.0

 5972 10:00:31.561904  <6>[    0.728357] FPGA manager framework

 5973 10:00:31.568483  <6>[    0.732041] Advanced Linux Sound Architecture Driver Initialized.

 5974 10:00:31.571856  <6>[    0.738792] vgaarb: loaded

 5975 10:00:31.575398  <6>[    0.741921] clocksource: Switched to clocksource arch_sys_counter

 5976 10:00:31.581882  <5>[    0.748355] VFS: Disk quotas dquot_6.6.0

 5977 10:00:31.588305  <6>[    0.752530] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)

 5978 10:00:31.591697  <6>[    0.759706] pnp: PnP ACPI: disabled

 5979 10:00:31.600418  <6>[    0.766616] NET: Registered PF_INET protocol family

 5980 10:00:31.606919  <6>[    0.771844] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)

 5981 10:00:31.619167  <6>[    0.781756] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)

 5982 10:00:31.625598  <6>[    0.790510] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)

 5983 10:00:31.635481  <6>[    0.798460] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)

 5984 10:00:31.642190  <6>[    0.806691] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)

 5985 10:00:31.648742  <6>[    0.814784] TCP: Hash tables configured (established 32768 bind 32768)

 5986 10:00:31.658790  <6>[    0.821613] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5987 10:00:31.665039  <6>[    0.828583] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)

 5988 10:00:31.671919  <6>[    0.836063] NET: Registered PF_UNIX/PF_LOCAL protocol family

 5989 10:00:31.678379  <6>[    0.842157] RPC: Registered named UNIX socket transport module.

 5990 10:00:31.681763  <6>[    0.848300] RPC: Registered udp transport module.

 5991 10:00:31.688353  <6>[    0.853224] RPC: Registered tcp transport module.

 5992 10:00:31.695034  <6>[    0.858147] RPC: Registered tcp NFSv4.1 backchannel transport module.

 5993 10:00:31.698622  <6>[    0.864799] PCI: CLS 0 bytes, default 64

 5994 10:00:31.701629  <6>[    0.869083] Unpacking initramfs...

 5995 10:00:31.715372  <6>[    0.878487] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available

 5996 10:00:31.725311  <6>[    0.887113] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available

 5997 10:00:31.728760  <6>[    0.895957] kvm [1]: IPA Size Limit: 40 bits

 5998 10:00:31.735962  <6>[    0.902289] kvm [1]: vgic-v2@c420000

 5999 10:00:31.739044  <6>[    0.906105] kvm [1]: GIC system register CPU interface enabled

 6000 10:00:31.745762  <6>[    0.912281] kvm [1]: vgic interrupt IRQ18

 6001 10:00:31.749337  <6>[    0.916646] kvm [1]: Hyp mode initialized successfully

 6002 10:00:31.757248  <5>[    0.922891] Initialise system trusted keyrings

 6003 10:00:31.763331  <6>[    0.927720] workingset: timestamp_bits=42 max_order=20 bucket_order=0

 6004 10:00:31.771644  <6>[    0.937661] squashfs: version 4.0 (2009/01/31) Phillip Lougher

 6005 10:00:31.778356  <5>[    0.944119] NFS: Registering the id_resolver key type

 6006 10:00:31.781576  <5>[    0.949433] Key type id_resolver registered

 6007 10:00:31.788217  <5>[    0.953845] Key type id_legacy registered

 6008 10:00:31.795135  <6>[    0.958154] nfs4filelayout_init: NFSv4 File Layout Driver Registering...

 6009 10:00:31.801508  <6>[    0.965076] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...

 6010 10:00:31.807830  <6>[    0.972885] 9p: Installing v9fs 9p2000 file system support

 6011 10:00:31.835719  <5>[    1.001837] Key type asymmetric registered

 6012 10:00:31.839179  <5>[    1.006183] Asymmetric key parser 'x509' registered

 6013 10:00:31.849264  <6>[    1.011342] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)

 6014 10:00:31.852062  <6>[    1.018956] io scheduler mq-deadline registered

 6015 10:00:31.855466  <6>[    1.023717] io scheduler kyber registered

 6016 10:00:31.878559  <6>[    1.044533] EINJ: ACPI disabled.

 6017 10:00:31.884947  <4>[    1.048302] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17

 6018 10:00:31.922841  <6>[    1.089171] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

 6019 10:00:31.931783  <6>[    1.097710] printk: console [ttyS0] disabled

 6020 10:00:31.959805  <6>[    1.122363] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2

 6021 10:00:31.966049  <6>[    1.131836] printk: console [ttyS0] enabled

 6022 10:00:31.970055  <6>[    1.131836] printk: console [ttyS0] enabled

 6023 10:00:31.976432  <6>[    1.140755] printk: bootconsole [mtk8250] disabled

 6024 10:00:31.979793  <6>[    1.140755] printk: bootconsole [mtk8250] disabled

 6025 10:00:31.989123  <3>[    1.151292] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47

 6026 10:00:31.996015  <3>[    1.159672] mt6577-uart 11003000.serial: Error applying setting, reverse things back

 6027 10:00:32.025253  <6>[    1.188085] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2

 6028 10:00:32.031890  <6>[    1.197743] serial serial0: tty port ttyS1 registered

 6029 10:00:32.038537  <6>[    1.204317] SuperH (H)SCI(F) driver initialized

 6030 10:00:32.041512  <6>[    1.209834] msm_serial: driver initialized

 6031 10:00:32.057129  <6>[    1.220164] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000

 6032 10:00:32.067032  <6>[    1.228765] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000

 6033 10:00:32.073940  <6>[    1.237342] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000

 6034 10:00:32.083793  <6>[    1.245911] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000

 6035 10:00:32.090233  <6>[    1.254585] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000

 6036 10:00:32.100409  <6>[    1.263251] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000

 6037 10:00:32.110115  <6>[    1.271996] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000

 6038 10:00:32.116442  <6>[    1.280739] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000

 6039 10:00:32.126853  <6>[    1.289303] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000

 6040 10:00:32.136765  <6>[    1.298107] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000

 6041 10:00:32.144088  <4>[    1.310517] cacheinfo: Unable to detect cache hierarchy for CPU 0

 6042 10:00:32.153574  <6>[    1.319923] loop: module loaded

 6043 10:00:32.165674  <6>[    1.331900] vsim1: Bringing 1800000uV into 2700000-2700000uV

 6044 10:00:32.183556  <6>[    1.350030] megasas: 07.719.03.00-rc1

 6045 10:00:32.192812  <6>[    1.358987] spi-nor spi1.0: w25q64dw (8192 Kbytes)

 6046 10:00:32.206729  <6>[    1.373320] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2

 6047 10:00:32.223860  <6>[    1.389968] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)

 6048 10:00:32.280798  <6>[    1.440309] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d

 6049 10:00:32.313540  <6>[    1.479733] Freeing initrd memory: 18300K

 6050 10:00:32.328710  <4>[    1.491553] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'

 6051 10:00:32.335674  <4>[    1.500782] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1

 6052 10:00:32.341887  <4>[    1.507480] Hardware name: Google juniper sku16 board (DT)

 6053 10:00:32.345448  <4>[    1.513219] Call trace:

 6054 10:00:32.348868  <4>[    1.515919]  dump_backtrace.part.0+0xe0/0xf0

 6055 10:00:32.352221  <4>[    1.520456]  show_stack+0x18/0x30

 6056 10:00:32.355556  <4>[    1.524028]  dump_stack_lvl+0x68/0x84

 6057 10:00:32.358572  <4>[    1.527949]  dump_stack+0x18/0x34

 6058 10:00:32.365573  <4>[    1.531519]  sysfs_warn_dup+0x64/0x80

 6059 10:00:32.368862  <4>[    1.535440]  sysfs_do_create_link_sd+0xf0/0x100

 6060 10:00:32.372236  <4>[    1.540227]  sysfs_create_link+0x20/0x40

 6061 10:00:32.375590  <4>[    1.544407]  bus_add_device+0x68/0x10c

 6062 10:00:32.382482  <4>[    1.548413]  device_add+0x340/0x7ac

 6063 10:00:32.385384  <4>[    1.552156]  of_device_add+0x44/0x60

 6064 10:00:32.388899  <4>[    1.555990]  of_platform_device_create_pdata+0x90/0x120

 6065 10:00:32.395236  <4>[    1.561471]  of_platform_bus_create+0x170/0x370

 6066 10:00:32.399017  <4>[    1.566257]  of_platform_populate+0x50/0xfc

 6067 10:00:32.405727  <4>[    1.570696]  parse_mtd_partitions+0x1dc/0x510

 6068 10:00:32.409009  <4>[    1.575310]  mtd_device_parse_register+0xf8/0x2e0

 6069 10:00:32.412292  <4>[    1.580268]  spi_nor_probe+0x21c/0x2f0

 6070 10:00:32.415701  <4>[    1.584274]  spi_mem_probe+0x6c/0xb0

 6071 10:00:32.418924  <4>[    1.588106]  spi_probe+0x84/0xe4

 6072 10:00:32.425959  <4>[    1.591588]  really_probe+0xbc/0x2e0

 6073 10:00:32.428951  <4>[    1.595418]  __driver_probe_device+0x78/0x11c

 6074 10:00:32.432083  <4>[    1.600030]  driver_probe_device+0xd8/0x160

 6075 10:00:32.438754  <4>[    1.604468]  __device_attach_driver+0xb8/0x134

 6076 10:00:32.442191  <4>[    1.609167]  bus_for_each_drv+0x78/0xd0

 6077 10:00:32.445613  <4>[    1.613258]  __device_attach+0xa8/0x1c0

 6078 10:00:32.452309  <4>[    1.617348]  device_initial_probe+0x14/0x20

 6079 10:00:32.455357  <4>[    1.621786]  bus_probe_device+0x9c/0xa4

 6080 10:00:32.458363  <4>[    1.625876]  device_add+0x3ac/0x7ac

 6081 10:00:32.462004  <4>[    1.629618]  __spi_add_device+0x78/0x120

 6082 10:00:32.465566  <4>[    1.633797]  spi_add_device+0x40/0x7c

 6083 10:00:32.471875  <4>[    1.637715]  spi_register_controller+0x610/0xad0

 6084 10:00:32.475498  <4>[    1.642588]  devm_spi_register_controller+0x4c/0xa4

 6085 10:00:32.481667  <4>[    1.647721]  mtk_spi_probe+0x3f8/0x650

 6086 10:00:32.485383  <4>[    1.651725]  platform_probe+0x68/0xe0

 6087 10:00:32.488423  <4>[    1.655643]  really_probe+0xbc/0x2e0

 6088 10:00:32.491716  <4>[    1.659473]  __driver_probe_device+0x78/0x11c

 6089 10:00:32.498698  <4>[    1.664084]  driver_probe_device+0xd8/0x160

 6090 10:00:32.501918  <4>[    1.668522]  __driver_attach+0x94/0x19c

 6091 10:00:32.504989  <4>[    1.672613]  bus_for_each_dev+0x70/0xd0

 6092 10:00:32.508508  <4>[    1.676702]  driver_attach+0x24/0x30

 6093 10:00:32.512285  <4>[    1.680532]  bus_add_driver+0x154/0x20c

 6094 10:00:32.518730  <4>[    1.684622]  driver_register+0x78/0x130

 6095 10:00:32.521934  <4>[    1.688713]  __platform_driver_register+0x28/0x34

 6096 10:00:32.525797  <4>[    1.693673]  mtk_spi_driver_init+0x1c/0x28

 6097 10:00:32.532981  <4>[    1.698027]  do_one_initcall+0x50/0x1d0

 6098 10:00:32.535468  <4>[    1.702117]  kernel_init_freeable+0x21c/0x288

 6099 10:00:32.538701  <4>[    1.706730]  kernel_init+0x24/0x12c

 6100 10:00:32.541999  <4>[    1.710475]  ret_from_fork+0x10/0x20

 6101 10:00:32.553484  <6>[    1.719370] tun: Universal TUN/TAP device driver, 1.6

 6102 10:00:32.556256  <6>[    1.725662] thunder_xcv, ver 1.0

 6103 10:00:32.559548  <6>[    1.729176] thunder_bgx, ver 1.0

 6104 10:00:32.562926  <6>[    1.732681] nicpf, ver 1.0

 6105 10:00:32.574133  <6>[    1.737064] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

 6106 10:00:32.577406  <6>[    1.744549] hns3: Copyright (c) 2017 Huawei Corporation.

 6107 10:00:32.584075  <6>[    1.750146] hclge is initializing

 6108 10:00:32.587474  <6>[    1.753726] e1000: Intel(R) PRO/1000 Network Driver

 6109 10:00:32.594440  <6>[    1.758861] e1000: Copyright (c) 1999-2006 Intel Corporation.

 6110 10:00:32.597133  <6>[    1.764882] e1000e: Intel(R) PRO/1000 Network Driver

 6111 10:00:32.603855  <6>[    1.770103] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

 6112 10:00:32.610835  <6>[    1.776300] igb: Intel(R) Gigabit Ethernet Network Driver

 6113 10:00:32.617233  <6>[    1.781955] igb: Copyright (c) 2007-2014 Intel Corporation.

 6114 10:00:32.623940  <6>[    1.787798] igbvf: Intel(R) Gigabit Virtual Function Network Driver

 6115 10:00:32.630701  <6>[    1.794322] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

 6116 10:00:32.633594  <6>[    1.800872] sky2: driver version 1.30

 6117 10:00:32.640402  <6>[    1.806135] usbcore: registered new device driver r8152-cfgselector

 6118 10:00:32.646963  <6>[    1.812676] usbcore: registered new interface driver r8152

 6119 10:00:32.654168  <6>[    1.818505] VFIO - User Level meta-driver version: 0.3

 6120 10:00:32.660397  <6>[    1.826337] mtu3 11201000.usb: uwk - reg:0x420, version:101

 6121 10:00:32.667017  <4>[    1.832213] mtu3 11201000.usb: supply vbus not found, using dummy regulator

 6122 10:00:32.673806  <6>[    1.839488] mtu3 11201000.usb: dr_mode: 1, drd: auto

 6123 10:00:32.680629  <6>[    1.844714] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0

 6124 10:00:32.684155  <6>[    1.850902] mtu3 11201000.usb: usb3-drd: 0

 6125 10:00:32.690453  <6>[    1.856478] mtu3 11201000.usb: xHCI platform device register success...

 6126 10:00:32.702077  <4>[    1.865159] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator

 6127 10:00:32.705900  <6>[    1.873106] xhci-mtk 11200000.usb: xHCI Host Controller

 6128 10:00:32.715493  <6>[    1.878617] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

 6129 10:00:32.722390  <6>[    1.886337] xhci-mtk 11200000.usb: USB3 root hub has no ports

 6130 10:00:32.729217  <6>[    1.892345] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

 6131 10:00:32.735527  <6>[    1.901771] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000

 6132 10:00:32.742369  <6>[    1.907845] xhci-mtk 11200000.usb: xHCI Host Controller

 6133 10:00:32.748698  <6>[    1.913333] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

 6134 10:00:32.755210  <6>[    1.920989] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed

 6135 10:00:32.762002  <6>[    1.927805] hub 1-0:1.0: USB hub found

 6136 10:00:32.765302  <6>[    1.931834] hub 1-0:1.0: 1 port detected

 6137 10:00:32.775512  <6>[    1.937203] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

 6138 10:00:32.778884  <6>[    1.945813] hub 2-0:1.0: USB hub found

 6139 10:00:32.785151  <3>[    1.949840] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)

 6140 10:00:32.791773  <6>[    1.957722] usbcore: registered new interface driver usb-storage

 6141 10:00:32.798221  <6>[    1.964341] usbcore: registered new device driver onboard-usb-hub

 6142 10:00:32.815146  <4>[    1.978018] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator

 6143 10:00:32.824289  <6>[    1.990299] mt6397-rtc mt6358-rtc: registered as rtc0

 6144 10:00:32.834489  <6>[    1.995778] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:59:34 UTC (1718704774)

 6145 10:00:32.837710  <6>[    2.005664] i2c_dev: i2c /dev entries driver

 6146 10:00:32.849356  <6>[    2.012097] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6147 10:00:32.859493  <6>[    2.020416] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58

 6148 10:00:32.862533  <6>[    2.029321] i2c 4-0058: Fixed dependency cycle(s) with /panel

 6149 10:00:32.872796  <6>[    2.035352] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000

 6150 10:00:32.878999  <3>[    2.042814] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.

 6151 10:00:32.896541  <6>[    2.062694] cpu cpu0: EM: created perf domain

 6152 10:00:32.906293  <6>[    2.068218] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz

 6153 10:00:32.913260  <6>[    2.079502] cpu cpu4: EM: created perf domain

 6154 10:00:32.919953  <6>[    2.086243] sdhci: Secure Digital Host Controller Interface driver

 6155 10:00:32.926673  <6>[    2.092697] sdhci: Copyright(c) Pierre Ossman

 6156 10:00:32.933804  <6>[    2.098108] Synopsys Designware Multimedia Card Interface Driver

 6157 10:00:32.939892  <6>[    2.098656] mtk-msdc 11240000.mmc: allocated mmc-pwrseq

 6158 10:00:32.943662  <6>[    2.105179] sdhci-pltfm: SDHCI platform and OF driver helper

 6159 10:00:32.952272  <6>[    2.118797] ledtrig-cpu: registered to indicate activity on CPUs

 6160 10:00:32.960311  <6>[    2.126615] usbcore: registered new interface driver usbhid

 6161 10:00:32.963516  <6>[    2.132460] usbhid: USB HID core driver

 6162 10:00:32.975008  <6>[    2.136742] spi_master spi2: will run message pump with realtime priority

 6163 10:00:32.978038  <4>[    2.136752] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator

 6164 10:00:32.985912  <4>[    2.151031] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator

 6165 10:00:32.998852  <6>[    2.157301] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0

 6166 10:00:33.018405  <6>[    2.174459] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1

 6167 10:00:33.024664  <4>[    2.185357] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6168 10:00:33.027989  <6>[    2.189514] cros-ec-spi spi2.0: Chrome EC device registered

 6169 10:00:33.042394  <4>[    2.205041] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6170 10:00:33.053997  <4>[    2.217118] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6171 10:00:33.060930  <6>[    2.220846] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014

 6172 10:00:33.064197  <4>[    2.226161] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6173 10:00:33.071517  <6>[    2.233257] mmc0: new HS400 MMC card at address 0001

 6174 10:00:33.078019  <6>[    2.243491] mmcblk0: mmc0:0001 DA4032 29.1 GiB 

 6175 10:00:33.084673  <6>[    2.247108] mmc1: new ultra high speed SDR104 SDIO card at address 0001

 6176 10:00:33.090725  <6>[    2.252903]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

 6177 10:00:33.098948  <6>[    2.265130] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB 

 6178 10:00:33.105801  <6>[    2.271889] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB 

 6179 10:00:33.115686  <6>[    2.275976] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound

 6180 10:00:33.122288  <6>[    2.278192] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)

 6181 10:00:33.132543  <6>[    2.289790] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6182 10:00:33.139045  <6>[    2.304614] NET: Registered PF_PACKET protocol family

 6183 10:00:33.152242  <6>[    2.307385] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2

 6184 10:00:33.155436  <6>[    2.310068] 9pnet: Installing 9P2000 support

 6185 10:00:33.165597  <6>[    2.322266] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c

 6186 10:00:33.168897  <5>[    2.326575] Key type dns_resolver registered

 6187 10:00:33.176395  <6>[    2.341859] registered taskstats version 1

 6188 10:00:33.179488  <5>[    2.346402] Loading compiled-in X.509 certificates

 6189 10:00:33.199192  <6>[    2.362056] usb 1-1: new high-speed USB device number 2 using xhci-mtk

 6190 10:00:33.229383  <3>[    2.392143] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517

 6191 10:00:33.260908  <6>[    2.420534] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6192 10:00:33.272313  <6>[    2.434879] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)

 6193 10:00:33.281833  <6>[    2.443447] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)

 6194 10:00:33.288469  <6>[    2.452125] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)

 6195 10:00:33.298264  <6>[    2.460857] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

 6196 10:00:33.308137  <6>[    2.469508] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)

 6197 10:00:33.314991  <6>[    2.478054] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)

 6198 10:00:33.324705  <6>[    2.486619] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

 6199 10:00:33.331344  <6>[    2.495994] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0

 6200 10:00:33.337883  <6>[    2.503535] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0

 6201 10:00:33.344742  <6>[    2.510824] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0

 6202 10:00:33.351261  <6>[    2.517698] hub 1-1:1.0: USB hub found

 6203 10:00:33.358171  <6>[    2.518145] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0

 6204 10:00:33.361391  <6>[    2.522179] hub 1-1:1.0: 3 ports detected

 6205 10:00:33.368033  <6>[    2.529165] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0

 6206 10:00:33.375088  <6>[    2.541056] panfrost 13040000.gpu: clock rate = 511999970

 6207 10:00:33.384852  <6>[    2.546753] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet

 6208 10:00:33.394418  <6>[    2.557084] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0

 6209 10:00:33.401212  <6>[    2.565092] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400

 6210 10:00:33.414686  <6>[    2.573526] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7

 6211 10:00:33.421090  <6>[    2.585603] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1

 6212 10:00:33.434245  <6>[    2.596679] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0

 6213 10:00:33.443763  <6>[    2.605665] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)

 6214 10:00:33.453807  <6>[    2.614812] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)

 6215 10:00:33.460304  <6>[    2.623941] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)

 6216 10:00:33.470339  <6>[    2.633069] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)

 6217 10:00:33.479997  <6>[    2.642369] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)

 6218 10:00:33.490125  <6>[    2.651668] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)

 6219 10:00:33.500034  <6>[    2.661141] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)

 6220 10:00:33.510354  <6>[    2.670614] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)

 6221 10:00:33.516611  <6>[    2.679739] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)

 6222 10:00:33.590866  <6>[    2.753503] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)

 6223 10:00:33.600609  <6>[    2.762417] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing

 6224 10:00:33.611054  <6>[    2.774117] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1

 6225 10:00:33.667105  <6>[    2.829954] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk

 6226 10:00:34.311932  <6>[    3.022271] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk

 6227 10:00:34.322298  <4>[    3.138839] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2

 6228 10:00:34.328616  <4>[    3.138857] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)

 6229 10:00:34.335165  <6>[    3.183881] r8152 1-1.2:1.0 eth0: v1.12.13

 6230 10:00:34.342401  <6>[    3.261952] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk

 6231 10:00:34.348796  <6>[    3.458560] Console: switching to colour frame buffer device 170x48

 6232 10:00:34.355119  <6>[    3.519203] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device

 6233 10:00:34.377410  <6>[    3.536736] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6234 10:00:34.394913  <6>[    3.554235] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6235 10:00:34.401307  <6>[    3.566797] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4

 6236 10:00:34.412424  <6>[    3.575208] input: volume-buttons as /devices/platform/volume-buttons/input/input5

 6237 10:00:34.422306  <6>[    3.583137] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6238 10:00:34.443231  <6>[    3.602560] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6239 10:00:35.662976  <6>[    4.829187] r8152 1-1.2:1.0 eth0: carrier on

 6240 10:00:38.260139  <5>[    4.849958] Sending DHCP requests .., OK

 6241 10:00:38.266609  <6>[    7.430264] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13

 6242 10:00:38.270059  <6>[    7.438701] IP-Config: Complete:

 6243 10:00:38.283168  <6>[    7.442273]      device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1

 6244 10:00:38.293449  <6>[    7.453171]      host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)

 6245 10:00:38.305055  <6>[    7.467451]      bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=

 6246 10:00:38.313331  <6>[    7.467462]      nameserver0=192.168.201.1

 6247 10:00:38.320933  <6>[    7.487211] clk: Disabling unused clocks

 6248 10:00:38.325962  <6>[    7.495160] ALSA device list:

 6249 10:00:38.335275  <6>[    7.501202]   No soundcards found.

 6250 10:00:38.344101  <6>[    7.510286] Freeing unused kernel memory: 8512K

 6251 10:00:38.351448  <6>[    7.517415] Run /init as init process

 6252 10:00:38.363297  Loading, please wait...

 6253 10:00:38.397696  Starting systemd-udevd version 252.22-1~deb12u1


 6254 10:00:38.713080  <3>[    7.879296] mtk-scp 10500000.scp: invalid resource

 6255 10:00:38.723643  <6>[    7.882911] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6256 10:00:38.733715  <4>[    7.883969] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator

 6257 10:00:38.740323  <6>[    7.884520] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000

 6258 10:00:38.746811  <4>[    7.886611] elants_i2c 0-0010: supply vccio not found, using dummy regulator

 6259 10:00:38.753010  <6>[    7.886628] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

 6260 10:00:38.759867  <3>[    7.897067] thermal_sys: Failed to find 'trips' node

 6261 10:00:38.770083  <3>[    7.904429] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6262 10:00:38.780022  <3>[    7.906332] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015

 6263 10:00:38.786678  <3>[    7.906342] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22

 6264 10:00:38.796254  <3>[    7.906347] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7  on device pinctrl_paris

 6265 10:00:38.802981  <3>[    7.906352] elan_i2c 2-0015: Error applying setting, reverse things back

 6266 10:00:38.809529  <3>[    7.910223] thermal_sys: Failed to find trip points for thermal-sensor1 id=0

 6267 10:00:38.819377  <3>[    7.910237] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22

 6268 10:00:38.826277  <4>[    7.910242] generic-adc-thermal: probe of thermal-sensor1 failed with error -22

 6269 10:00:38.833406  <3>[    7.913833] thermal_sys: Failed to find 'trips' node

 6270 10:00:38.844016  <3>[    7.918206] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6271 10:00:38.854530  <3>[    7.926410] thermal_sys: Failed to find trip points for thermal-sensor2 id=0

 6272 10:00:38.864256  <3>[    7.930827] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6273 10:00:38.867603  <6>[    7.931910] remoteproc remoteproc0: scp is available

 6274 10:00:38.877874  <4>[    7.936160] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6275 10:00:38.884314  <6>[    7.936180] remoteproc remoteproc0: powering up scp

 6276 10:00:38.893828  <4>[    7.936206] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2

 6277 10:00:38.900504  <3>[    7.936212] remoteproc remoteproc0: request_firmware failed: -2

 6278 10:00:38.907541  <3>[    7.939507] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22

 6279 10:00:38.914365  <6>[    7.952864] mc: Linux media interface: v0.10

 6280 10:00:38.920776  <4>[    7.956447] generic-adc-thermal: probe of thermal-sensor2 failed with error -22

 6281 10:00:38.930476  <3>[    7.960684] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6282 10:00:38.940659  <3>[    7.960701] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6283 10:00:38.946927  <3>[    7.960706] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6284 10:00:38.956972  <3>[    7.960713] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6285 10:00:38.963898  <3>[    7.960718] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6286 10:00:38.973973  <6>[    7.968553] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered

 6287 10:00:38.980030  <5>[    7.969785] cfg80211: Loading compiled-in X.509 certificates for regulatory database

 6288 10:00:38.990628  <3>[    7.975629] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0

 6289 10:00:38.999877  <4>[    7.976792] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW

 6290 10:00:39.006893  <6>[    7.977292] videodev: Linux video capture interface: v2.00

 6291 10:00:39.016692  <6>[    7.977327] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20

 6292 10:00:39.029016  <6>[    7.977446]  cs_system_cfg: CoreSight Configuration manager initialised

 6293 10:00:39.042973  <6>[    7.978961] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19

 6294 10:00:39.056043  <3>[    7.979278] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!

 6295 10:00:39.063683  <6>[    7.982004] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized

 6296 10:00:39.070227  <5>[    7.989355] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

 6297 10:00:39.076311  <5>[    7.989773] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'

 6298 10:00:39.086252  <4>[    7.989830] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

 6299 10:00:39.092786  <6>[    7.989837] cfg80211: failed to load regulatory.db

 6300 10:00:39.103036  <6>[    8.034470] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7

 6301 10:00:39.109641  <6>[    8.035094] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized

 6302 10:00:39.116436  <6>[    8.065083] Bluetooth: Core ver 2.22

 6303 10:00:39.123401  <6>[    8.070707] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized

 6304 10:00:39.129732  <6>[    8.079060] NET: Registered PF_BLUETOOTH protocol family

 6305 10:00:39.139638  <6>[    8.090959] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized

 6306 10:00:39.146114  <6>[    8.091109] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized

 6307 10:00:39.153087  <6>[    8.092700] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)

 6308 10:00:39.159970  <6>[    8.092910] Bluetooth: HCI device and connection manager initialized

 6309 10:00:39.170853  <6>[    8.101538] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized

 6310 10:00:39.177365  <6>[    8.102023] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0

 6311 10:00:39.184318  <6>[    8.102071] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0

 6312 10:00:39.191212  <6>[    8.102892] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1

 6313 10:00:39.201585  <6>[    8.102896] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)

 6314 10:00:39.205423  <6>[    8.110306] Bluetooth: HCI socket layer initialized

 6315 10:00:39.218859  <6>[    8.110796] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8

 6316 10:00:39.222293  <6>[    8.110944] usbcore: registered new interface driver uvcvideo

 6317 10:00:39.232284  <6>[    8.118601] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized

 6318 10:00:39.235747  <6>[    8.126977] Bluetooth: L2CAP socket layer initialized

 6319 10:00:39.249927  <6>[    8.135562] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized

 6320 10:00:39.258883  <6>[    8.143220] Bluetooth: SCO socket layer initialized

 6321 10:00:39.272029  <6>[    8.174732] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000

 6322 10:00:39.282223  <6>[    8.202535] Bluetooth: HCI UART driver ver 2.3

 6323 10:00:39.292912  <6>[    8.213014] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0

 6324 10:00:39.307251  <3>[    8.213272] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'

 6325 10:00:39.317913  <3>[    8.213931] debugfs: File 'Playback' in directory 'dapm' already present!

 6326 10:00:39.323971  <3>[    8.213935] debugfs: File 'Capture' in directory 'dapm' already present!

 6327 10:00:39.338191  <6>[    8.216248] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6

 6328 10:00:39.344737  <6>[    8.225361] Bluetooth: HCI UART protocol H4 registered

 6329 10:00:39.351041  <6>[    8.225406] Bluetooth: HCI UART protocol LL registered

 6330 10:00:39.364771  <6>[    8.233824] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77

 6331 10:00:39.371052  <6>[    8.240103] Bluetooth: HCI UART protocol Three-wire (H5) registered

 6332 10:00:39.382801  <4>[    8.346644] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

 6333 10:00:39.389668  <4>[    8.346644] Fallback method does not support PEC.

 6334 10:00:39.396082  <6>[    8.349061] Bluetooth: HCI UART protocol Broadcom registered

 6335 10:00:39.406023  <3>[    8.357285] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6336 10:00:39.412614  <6>[    8.362484] Bluetooth: HCI UART protocol QCA registered

 6337 10:00:39.419570  Begin: Loading e<6>[    8.363632] Bluetooth: hci0: setting up ROME/QCA6390

 6338 10:00:39.429474  ssential drivers<3>[    8.377288] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6339 10:00:39.430009   ... done.

 6340 10:00:39.435861  Begi<6>[    8.388838] Bluetooth: HCI UART protocol Marvell registered

 6341 10:00:39.445955  n: Running /scri<6>[    8.396746] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91

 6342 10:00:39.453377  pts/init-premoun<3>[    8.577342] Bluetooth: hci0: Frame reassembly failed (-84)

 6343 10:00:39.453885  t ... done.

 6344 10:00:39.460233  Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.

 6345 10:00:39.469988  Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available

 6346 10:00:39.473634  Device /sys/class/net/eth0 found

 6347 10:00:39.474177  done.

 6348 10:00:39.480217  Begin: Waiting up to 180 secs for any network device to become available ... done.

 6349 10:00:39.543830  IP-Config: eth0 hardware address 00:e0:4c:68:0b:b9 mtu 1500 DHCP

 6350 10:00:39.550714  IP-Config: eth0 complete (dhcp from 192.168.201.1):

 6351 10:00:39.557304   address: 192.168.201.13   broadcast: 192.168.201.255  netmask: 255.255.255.0   

 6352 10:00:39.564066   gateway: 192.168.201.1    dns0     : 192.168.201.1    dns1   : 0.0.0.0         

 6353 10:00:39.570382   host   : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0                        

 6354 10:00:39.577003   domain : lava-rack                                                       

 6355 10:00:39.579813   rootserver: 192.168.201.1 rootpath: 

 6356 10:00:39.580316   filename  : 

 6357 10:00:39.706441  <6>[    8.872588] Bluetooth: hci0: QCA Product ID   :0x00000008

 6358 10:00:39.716622  <6>[    8.883347] Bluetooth: hci0: QCA SOC Version  :0x00000044

 6359 10:00:39.727312  <6>[    8.893828] Bluetooth: hci0: QCA ROM Version  :0x00000302

 6360 10:00:39.738019  <6>[    8.904216] Bluetooth: hci0: QCA Patch Version:0x00000111

 6361 10:00:39.747571  <6>[    8.914018] Bluetooth: hci0: QCA controller version 0x00440302

 6362 10:00:39.760588  <6>[    8.923762] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin

 6363 10:00:39.770753  <4>[    8.933584] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2

 6364 10:00:39.780610  <6>[    8.938707] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1

 6365 10:00:39.789997  <3>[    8.942935] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)

 6366 10:00:39.800582  <3>[    8.967044] Bluetooth: hci0: QCA Failed to download patch (-2)

 6367 10:00:39.803793  done.

 6368 10:00:39.812332  Begin: Running /scripts/nfs-bottom ... done.

 6369 10:00:39.831165  Begin: Running /scripts/init-bottom ... done.

 6370 10:00:39.872018  <4>[    9.035130] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)

 6371 10:00:39.892396  <4>[    9.055444] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)

 6372 10:00:39.907461  <4>[    9.070082] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)

 6373 10:00:39.916928  <4>[    9.082541] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)

 6374 10:00:41.203796  <6>[   10.369874] NET: Registered PF_INET6 protocol family

 6375 10:00:41.215955  <6>[   10.382356] Segment Routing with IPv6

 6376 10:00:41.224601  <6>[   10.390866] In-situ OAM (IOAM) with IPv6

 6377 10:00:41.399874  <30>[   10.539767] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)

 6378 10:00:41.420745  <30>[   10.587079] systemd[1]: Detected architecture arm64.

 6379 10:00:41.433305  

 6380 10:00:41.436606  Welcome to Debian GNU/Linux 12 (bookworm)!

 6381 10:00:41.436786  


 6382 10:00:41.462017  <30>[   10.628136] systemd[1]: Hostname set to <debian-bookworm-arm64>.

 6383 10:00:42.591941  <30>[   11.754712] systemd[1]: Queued start job for default target graphical.target.

 6384 10:00:42.628515  <30>[   11.791224] systemd[1]: Created slice system-getty.slice - Slice /system/getty.

 6385 10:00:42.642048  [  OK  ] Created slice system-getty.slice - Slice /system/getty.


 6386 10:00:42.661867  <30>[   11.824266] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.

 6387 10:00:42.675206  [  OK  ] Created slice system-modpr…lice - Slice /system/modprobe.


 6388 10:00:42.693977  <30>[   11.856430] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.

 6389 10:00:42.707744  [  OK  ] Created slice system-seria… - Slice /system/serial-getty.


 6390 10:00:42.724929  <30>[   11.887511] systemd[1]: Created slice user.slice - User and Session Slice.

 6391 10:00:42.737084  [  OK  ] Created slice user.slice - User and Session Slice.


 6392 10:00:42.758961  <30>[   11.918504] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.

 6393 10:00:42.772353  [  OK  ] Started systemd-ask-passwo…quests to Console Directory Watch.


 6394 10:00:42.791131  <30>[   11.950344] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.

 6395 10:00:42.803096  [  OK  ] Started systemd-ask-passwo… Requests to Wall Directory Watch.


 6396 10:00:42.829673  <30>[   11.982301] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).

 6397 10:00:42.848440  <30>[   12.011284] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...

 6398 10:00:42.856236           Expecting device dev-ttyS0.device - /dev/ttyS0...


 6399 10:00:42.875202  <30>[   12.038099] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.

 6400 10:00:42.888541  [  OK  ] Reached target cryptsetup.…get - Local Encrypted Volumes.


 6401 10:00:42.907573  <30>[   12.070172] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.

 6402 10:00:42.921377  [  OK  ] Reached target integrityse…Local Integrity Protected Volumes.


 6403 10:00:42.936019  <30>[   12.102211] systemd[1]: Reached target paths.target - Path Units.

 6404 10:00:42.950653  [  OK  ] Reached target paths.target - Path Units.


 6405 10:00:42.967393  <30>[   12.130115] systemd[1]: Reached target remote-fs.target - Remote File Systems.

 6406 10:00:42.979501  [  OK  ] Reached target remote-fs.target - Remote File Systems.


 6407 10:00:42.992252  <30>[   12.158082] systemd[1]: Reached target slices.target - Slice Units.

 6408 10:00:43.006772  [  OK  ] Reached target slices.target - Slice Units.


 6409 10:00:43.020255  <30>[   12.186136] systemd[1]: Reached target swap.target - Swaps.

 6410 10:00:43.030867  [  OK  ] Reached target swap.target - Swaps.


 6411 10:00:43.051512  <30>[   12.214194] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.

 6412 10:00:43.064714  [  OK  ] Reached target veritysetup… - Local Verity Protected Volumes.


 6413 10:00:43.084027  <30>[   12.246542] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.

 6414 10:00:43.097802  [  OK  ] Listening on systemd-initc… initctl Compatibility Named Pipe.


 6415 10:00:43.119723  <30>[   12.281997] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.

 6416 10:00:43.132838  [  OK  ] Listening on systemd-journ…socket - Journal Audit Socket.


 6417 10:00:43.153575  <30>[   12.315749] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).

 6418 10:00:43.166840  [  OK  ] Listening on systemd-journ…t - Journal Socket (/dev/log).


 6419 10:00:43.184216  <30>[   12.346917] systemd[1]: Listening on systemd-journald.socket - Journal Socket.

 6420 10:00:43.196423  [  OK  ] Listening on systemd-journald.socket - Journal Socket.


 6421 10:00:43.217863  <30>[   12.380220] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.

 6422 10:00:43.231046  [  OK  ] Listening on systemd-netwo… - Network Service Netlink Socket.


 6423 10:00:43.251660  <30>[   12.414119] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.

 6424 10:00:43.264326  [  OK  ] Listening on systemd-udevd….socket - udev Control Socket.


 6425 10:00:43.284033  <30>[   12.446779] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.

 6426 10:00:43.297084  [  OK  ] Listening on systemd-udevd…l.socket - udev Kernel Socket.


 6427 10:00:43.339669  <30>[   12.502430] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...

 6428 10:00:43.352215           Mounting dev-hugepages.mount - Huge Pages File System...


 6429 10:00:43.376804  <30>[   12.539892] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...

 6430 10:00:43.388303           Mounting dev-mqueue.mount…POSIX Message Queue File System...


 6431 10:00:43.412461  <30>[   12.575302] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...

 6432 10:00:43.425290           Mounting sys-kernel-debug.… - Kernel Debug File System...


 6433 10:00:43.450611  <30>[   12.607043] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).

 6434 10:00:43.476157  <30>[   12.638916] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...

 6435 10:00:43.489215           Starting kmod-static-nodes…ate List of Static Device Nodes...


 6436 10:00:43.536382  <30>[   12.698961] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...

 6437 10:00:43.548365           Starting modprobe@configfs…m - Load Kernel Module configfs...


 6438 10:00:43.573737  <30>[   12.736185] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...

 6439 10:00:43.585325           Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6440 10:00:43.624499  <6>[   12.787556] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com

 6441 10:00:43.640033  <30>[   12.803265] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...

 6442 10:00:43.653714           Starting modprobe@drm.service - Load Kernel Module drm...


 6443 10:00:43.678017  <30>[   12.840551] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...

 6444 10:00:43.689615           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6445 10:00:43.718076  <30>[   12.880634] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...

 6446 10:00:43.731674           Starting modprobe@fuse.ser…e - Load Kernel Module fuse...


 6447 10:00:43.751924  <30>[   12.914565] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...

 6448 10:00:43.763555           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6449 10:00:43.771481  <6>[   12.937588] fuse: init (API version 7.37)

 6450 10:00:43.793645  <30>[   12.956356] systemd[1]: Starting systemd-journald.service - Journal Service...

 6451 10:00:43.805966           Starting systemd-journald.service - Journal Service...


 6452 10:00:43.860535  <30>[   13.022871] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...

 6453 10:00:43.871371           Starting systemd-modules-l…rvice - Load Kernel Modules...


 6454 10:00:43.898909  <30>[   13.058635] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...

 6455 10:00:43.910197           Starting systemd-network-g… units from Kernel command line...


 6456 10:00:43.930813  <30>[   13.093734] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...

 6457 10:00:43.942470           Starting systemd-remount-f…nt Root and Kernel File Systems...


 6458 10:00:43.962957  <30>[   13.125746] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...

 6459 10:00:43.974745           Startin<3>[   13.138160] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6460 10:00:43.982559  g systemd-udev-trig…[0m - Coldplug All udev Devices...


 6461 10:00:43.989277  <3>[   13.153638] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6462 10:00:44.009082  <3>[   13.171314] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6463 10:00:44.016619  <30>[   13.171472] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.

 6464 10:00:44.022630  <3>[   13.185219] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6465 10:00:44.045950  [  OK  ] Mounted dev-hugepages.mount - Huge Pages File S<3>[   13.207714] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6466 10:00:44.046387  ystem.


 6467 10:00:44.061079  <3>[   13.223680] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6468 10:00:44.069659  <30>[   13.233084] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.

 6469 10:00:44.079449  <3>[   13.238978] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6470 10:00:44.098094  [  OK  ] Mounted dev-mqueue.mount[…- POSIX Message Queue <3>[   13.259307] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6471 10:00:44.098532  File System.


 6472 10:00:44.116784  <30>[   13.278688] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.

 6473 10:00:44.126382  [  OK  ] Mounted sys-kernel-debug.m…nt - Kernel Debug File System.


 6474 10:00:44.144022  <30>[   13.306672] systemd[1]: Started systemd-journald.service - Journal Service.

 6475 10:00:44.155017  [  OK  ] Started systemd-journald.service - Journal Service.


 6476 10:00:44.180302  [  OK  ] Finished kmod-static-nodes…reate List of Static Device Nodes.


 6477 10:00:44.202657  [  OK  ] Finished modprobe@configfs…[0m - Load Kernel Module configfs.


 6478 10:00:44.222551  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6479 10:00:44.242580  [  OK  ] Finished modprobe@drm.service - Load Kernel Module drm.


 6480 10:00:44.266117  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6481 10:00:44.286720  [  OK  ] Finished modprobe@fuse.service - Load Kernel Module fuse.


 6482 10:00:44.310752  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6483 10:00:44.333778  [  OK  ] Finished systemd-modules-l…service - Load Kernel Modules.


 6484 10:00:44.353007  [  OK  ] Finished systemd-network-g…rk units from Kernel command line.


 6485 10:00:44.372872  [  OK  ] Finished systemd-remount-f…ount Root and Kernel File Systems.


 6486 10:00:44.394635  [  OK  ] Reached target network-pre…get - Preparation for Network.


 6487 10:00:44.434205  <4>[   13.599145] power_supply_show_property: 2 callbacks suppressed

 6488 10:00:44.444344  <3>[   13.599155] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6489 10:00:44.451478  <3>[   13.611455] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6490 10:00:44.470470  <4>[   13.614193] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent

 6491 10:00:44.484794  <3>[   13.614199] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5

 6492 10:00:44.501385           Mounting sys-fs-fuse-conne… - FUSE Control File System...


 6493 10:00:44.511600  <3>[   13.673983] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6494 10:00:44.528343           Mountin<3>[   13.690672] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6495 10:00:44.534847  g sys-kernel-config…ernel Configuration File System...


 6496 10:00:44.545552  <3>[   13.707756] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6497 10:00:44.559902           Starting syste<3>[   13.724106] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6498 10:00:44.566386  md-journal-f…h Journal to Persistent Storage...


 6499 10:00:44.579153  <3>[   13.741760] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6500 10:00:44.597907           Starting syste<3>[   13.758196] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6501 10:00:44.600889  md-random-se…ice - Load/Save Random Seed...


 6502 10:00:44.613923  <3>[   13.776021] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6503 10:00:44.628801           Startin<3>[   13.791498] power_supply sbs-12-000b: driver failed to report `technology' property: -5

 6504 10:00:44.635273  g systemd-sysctl.se…ce - Apply Kernel Variables...


 6505 10:00:44.660018           Starting systemd-sysusers.…rvice - Create System Users...


 6506 10:00:44.673604  <46>[   13.836416] systemd-journald[312]: Received client request to flush runtime journal.

 6507 10:00:44.701271  [  OK  ] Finished systemd-udev-trig…e - Coldplug All udev Devices.


 6508 10:00:44.724699  [  OK  ] Mounted sys-fs-fuse-connec…nt - FUSE Control File System.


 6509 10:00:44.744843  [  OK  ] Mounted sys-kernel-config.… Kernel Configuration File System.


 6510 10:00:44.765669  [  OK  ] Finished systemd-random-se…rvice - Load/Save Random Seed.


 6511 10:00:44.785888  [  OK  ] Finished systemd-sysctl.service - Apply Kernel Variables.


 6512 10:00:45.453846  [  OK  ] Finished systemd-sysusers.service - Create System Users.


 6513 10:00:45.500356           Starting systemd-tmpfiles-…ate Static Device Nodes in /dev...


 6514 10:00:46.145105  [  OK  ] Finished systemd-journal-f…ush Journal to Persistent Storage.


 6515 10:00:46.207758  [  OK  ] Finished systemd-tmpfiles-…reate Static Device Nodes in /dev.


 6516 10:00:46.219620  [  OK  ] Reached target local-fs-pr…reparation for Local File Systems.


 6517 10:00:46.235653  [  OK  ] Reached target local-fs.target - Local File Systems.


 6518 10:00:46.280447           Starting systemd-tmpfiles-… Volatile Files and Directories...


 6519 10:00:46.305503           Starting systemd-udevd.ser…ger for Device Events and Files...


 6520 10:00:46.559966  [  OK  ] Started systemd-udevd.serv…nager for Device Events and Files.


 6521 10:00:46.591638           Starting systemd-networkd.…ice - Network Configuration...


 6522 10:00:46.675430  [  OK  ] Found device dev-ttyS0.device - /dev/ttyS0.


 6523 10:00:46.884682  [  OK  ] Created slice system-syste…- Slice /system/systemd-backlight.


 6524 10:00:46.947443           Starting systemd-backlight…ess of backlight:backlight_lcd0...


 6525 10:00:46.964607  [  OK  ] Finished systemd-tmpfiles-…te Volatile Files and Directories.


 6526 10:00:47.038900  [  OK  ] Reached target bluetooth.target - Bluetooth Support.


 6527 10:00:47.071182  [  OK  ] Listening on systemd-rfkil…l Switch Status /dev/rfkill Watch.


 6528 10:00:47.220563           Starting systemd-timesyncd… - Network Time Synchronization...


 6529 10:00:47.246918           Starting systemd-update-ut…rd System Boot/Shutdown in UTMP...


 6530 10:00:47.268156  [  OK  ] Finished systemd-backlight…tness of backlight:backlight_lcd0.


 6531 10:00:47.422067           Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...


 6532 10:00:47.447015           Starting modprobe@efi_psto…- Load Kernel Module efi_pstore...


 6533 10:00:47.468220           Starting modprobe@loop.ser…e - Load Kernel Module loop...


 6534 10:00:47.496934           Starting systemd-rfkill.se…Load/Save RF Kill Switch Status...


 6535 10:00:47.527233  [  OK  ] Started systemd-networkd.service - Network Configuration.


 6536 10:00:47.546339  [  OK  ] Started systemd-timesyncd.…0m - Network Time Synchronization.


 6537 10:00:47.566339  [  OK  ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod.


 6538 10:00:47.586827  [  OK  ] Started systemd-rfkill.ser…- Load/Save RF Kill Switch Status.


 6539 10:00:47.609435  [  OK  ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore.


 6540 10:00:47.634086  [  OK  ] Finished modprobe@loop.service - Load Kernel Module loop.


 6541 10:00:47.655072  [  OK  ] Reached target network.target - Network.


 6542 10:00:47.677087  [  OK  ] Reached target time-set.target - System Time Set.


 6543 10:00:47.700248  [  OK  ] Finished systemd-update-ut…cord System Boot/Shutdown in UTMP.


 6544 10:00:47.722878  [  OK  ] Reached target sysinit.target - System Initialization.


 6545 10:00:47.748951  [  OK  ] Started apt-daily.timer - Daily apt download activities.


 6546 10:00:47.771999  [  OK  ] Started apt-daily-upgrade.… apt upgrade and clean activities.


 6547 10:00:47.792594  [  OK  ] Started dpkg-db-backup.tim… Daily dpkg database backup timer.


 6548 10:00:47.815932  [  OK  ] Started e2scrub_all.timer…etadata Check for All Filesystems.


 6549 10:00:47.839709  [  OK  ] Started fstrim.timer - Discard unused blocks once a week.


 6550 10:00:47.849075  [  OK  ] Started systemd-tmpfiles-c… Cleanup of Temporary Directories.


 6551 10:00:47.869010  [  OK  ] Reached target timers.target - Timer Units.


 6552 10:00:47.895384  [  OK  ] Listening on dbus.socket[…- D-Bus System Message Bus Socket.


 6553 10:00:47.912536  [  OK  ] Reached target sockets.target - Socket Units.


 6554 10:00:47.919279  [  OK  ] Reached target basic.target - Basic System.


 6555 10:00:47.973873           Starting alsa-restore.serv…- Save/Restore Sound Card State...


 6556 10:00:47.984540           Starting dbus.service - D-Bus System Message Bus...


 6557 10:00:48.040808           Starting e2scrub_reap.serv…e ext4 Metadata Check Snapshots...


 6558 10:00:48.110016           Starting systemd-logind.se…ice - User Login Management...


 6559 10:00:48.138857           Starting systemd-user-sess…vice - Permit User Sessions...


 6560 10:00:48.157847  [  OK  ] Finished alsa-restore.serv…m - Save/Restore Sound Card State.


 6561 10:00:48.178651  [  OK  ] Reached target sound.target - Sound Card.


 6562 10:00:48.279366  [  OK  ] Finished systemd-user-sess…ervice - Permit User Sessions.


 6563 10:00:48.316454  [  OK  ] Started getty@tty1.service - Getty on tty1.


 6564 10:00:48.361928  [  OK  ] Started serial-getty@ttyS0…rvice - Serial Getty on ttyS0.


 6565 10:00:48.394926  [  OK  ] Reached target getty.target - Login Prompts.


 6566 10:00:48.417653  [  OK  ] Started dbus.service - D-Bus System Message Bus.


 6567 10:00:48.461585  [  OK  ] Finished e2scrub_reap.serv…ine ext4 Metadata Check Snapshots.


 6568 10:00:48.489295  [  OK  ] Started systemd-logind.service - User Login Management.


 6569 10:00:48.514972  [  OK  ] Reached target multi-user.target - Multi-User System.


 6570 10:00:48.538545  [  OK  ] Reached target graphical.target - Graphical Interface.


 6571 10:00:48.586272           Starting systemd-update-ut… Record Runlevel Change in UTMP...


 6572 10:00:48.645480  [  OK  ] Finished systemd-update-ut… - Record Runlevel Change in UTMP.


 6573 10:00:48.738764  


 6574 10:00:48.742081  Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0

 6575 10:00:48.742501  

 6576 10:00:48.745300  debian-bookworm-arm64 login: root (automatic login)

 6577 10:00:48.745720  


 6578 10:00:49.068794  Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024 aarch64

 6579 10:00:49.069333  

 6580 10:00:49.075460  The programs included with the Debian GNU/Linux system are free software;

 6581 10:00:49.082266  the exact distribution terms for each program are described in the

 6582 10:00:49.085292  individual files in /usr/share/doc/*/copyright.

 6583 10:00:49.085709  

 6584 10:00:49.091905  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent

 6585 10:00:49.095050  permitted by applicable law.

 6586 10:00:50.231694  Matched prompt #10: / #
 6588 10:00:50.232799  Setting prompt string to ['/ #']
 6589 10:00:50.233222  end: 2.2.5.1 login-action (duration 00:00:20) [common]
 6591 10:00:50.234205  end: 2.2.5 auto-login-action (duration 00:00:20) [common]
 6592 10:00:50.234639  start: 2.2.6 expect-shell-connection (timeout 00:03:45) [common]
 6593 10:00:50.234990  Setting prompt string to ['/ #']
 6594 10:00:50.235296  Forcing a shell prompt, looking for ['/ #']
 6596 10:00:50.286168  / # 

 6597 10:00:50.286702  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
 6598 10:00:50.287044  Waiting using forced prompt support (timeout 00:02:30)
 6599 10:00:50.292283  

 6600 10:00:50.293157  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
 6601 10:00:50.293652  start: 2.2.7 export-device-env (timeout 00:03:45) [common]
 6603 10:00:50.394935  / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch'

 6604 10:00:50.401132  export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407632/extract-nfsrootfs-08boljch'

 6606 10:00:50.502879  / # export NFS_SERVER_IP='192.168.201.1'

 6607 10:00:50.509805  export NFS_SERVER_IP='192.168.201.1'

 6608 10:00:50.510738  end: 2.2.7 export-device-env (duration 00:00:00) [common]
 6609 10:00:50.511256  end: 2.2 depthcharge-retry (duration 00:01:15) [common]
 6610 10:00:50.511837  end: 2 depthcharge-action (duration 00:01:15) [common]
 6611 10:00:50.512332  start: 3 lava-test-retry (timeout 00:08:03) [common]
 6612 10:00:50.512817  start: 3.1 lava-test-shell (timeout 00:08:03) [common]
 6613 10:00:50.513233  Using namespace: common
 6615 10:00:50.614437  / # #

 6616 10:00:50.615083  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
 6617 10:00:50.621308  #

 6618 10:00:50.622168  Using /lava-14407632
 6620 10:00:50.723646  / # export SHELL=/bin/bash

 6621 10:00:50.730219  export SHELL=/bin/bash

 6623 10:00:50.831916  / # . /lava-14407632/environment

 6624 10:00:50.838368  . /lava-14407632/environment

 6626 10:00:50.945665  / # /lava-14407632/bin/lava-test-runner /lava-14407632/0

 6627 10:00:50.946295  Test shell timeout: 10s (minimum of the action and connection timeout)
 6628 10:00:50.952012  /lava-14407632/bin/lava-test-runner /lava-14407632/0

 6629 10:00:51.254958  + export TESTRUN_ID=0_timesync-off

 6630 10:00:51.258278  + TESTRUN_ID=0_timesync-off

 6631 10:00:51.261353  + cd /lava-14407632/0/tests/0_timesync-off

 6632 10:00:51.264600  ++ cat uuid

 6633 10:00:51.271691  + UUID=14407632_1.6.2.3.1

 6634 10:00:51.271798  + set +x

 6635 10:00:51.278786  <LAVA_SIGNAL_STARTRUN 0_timesync-off 14407632_1.6.2.3.1>

 6636 10:00:51.279108  Received signal: <STARTRUN> 0_timesync-off 14407632_1.6.2.3.1
 6637 10:00:51.279220  Starting test lava.0_timesync-off (14407632_1.6.2.3.1)
 6638 10:00:51.279350  Skipping test definition patterns.
 6639 10:00:51.281550  + systemctl stop systemd-timesyncd

 6640 10:00:51.334214  + set +x

 6641 10:00:51.337459  <LAVA_SIGNAL_ENDRUN 0_timesync-off 14407632_1.6.2.3.1>

 6642 10:00:51.338130  Received signal: <ENDRUN> 0_timesync-off 14407632_1.6.2.3.1
 6643 10:00:51.338535  Ending use of test pattern.
 6644 10:00:51.338846  Ending test lava.0_timesync-off (14407632_1.6.2.3.1), duration 0.06
 6646 10:00:51.413191  + export TESTRUN_ID=1_kselftest-dt

 6647 10:00:51.416109  + TESTRUN_ID=1_kselftest-dt

 6648 10:00:51.419722  + cd /lava-14407632/0/tests/1_kselftest-dt

 6649 10:00:51.423008  ++ cat uuid

 6650 10:00:51.426182  + UUID=14407632_1.6.2.3.5

 6651 10:00:51.426604  + set +x

 6652 10:00:51.432820  <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 14407632_1.6.2.3.5>

 6653 10:00:51.433498  Received signal: <STARTRUN> 1_kselftest-dt 14407632_1.6.2.3.5
 6654 10:00:51.433848  Starting test lava.1_kselftest-dt (14407632_1.6.2.3.5)
 6655 10:00:51.434229  Skipping test definition patterns.
 6656 10:00:51.436090  + cd ./automated/linux/kselftest/

 6657 10:00:51.463081  + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1

 6658 10:00:51.503485  INFO: install_deps skipped

 6659 10:00:52.002628  --2024-06-18 09:59:53--  http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz

 6660 10:00:52.016454  Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82

 6661 10:00:52.144023  Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.

 6662 10:00:52.271733  HTTP request sent, awaiting response... 200 OK

 6663 10:00:52.275122  Length: 1642672 (1.6M) [application/octet-stream]

 6664 10:00:52.278805  Saving to: 'kselftest_armhf.tar.gz'

 6665 10:00:52.279356  

 6666 10:00:52.279854  

 6667 10:00:52.523531  kselftest_armhf.tar   0%[                    ]       0  --.-KB/s               

 6668 10:00:52.776181  kselftest_armhf.tar   2%[                    ]  44.98K   179KB/s               

 6669 10:00:53.077010  kselftest_armhf.tar  13%[=>                  ] 214.67K   426KB/s               

 6670 10:00:53.203539  kselftest_armhf.tar  52%[=========>          ] 841.10K  1.02MB/s               

 6671 10:00:53.210102  kselftest_armhf.tar 100%[===================>]   1.57M  1.68MB/s    in 0.9s    

 6672 10:00:53.210389  

 6673 10:00:53.354222  2024-06-18 09:59:54 (1.68 MB/s) - 'kselftest_armhf.tar.gz' saved [1642672/1642672]

 6674 10:00:53.354403  

 6675 10:00:58.200413  skiplist:

 6676 10:00:58.203907  ========================================

 6677 10:00:58.207456  ========================================

 6678 10:00:58.289812  ============== Tests to run ===============

 6679 10:00:58.292720  ===========End Tests to run ===============

 6680 10:00:58.297292  shardfile-dt fail

 6681 10:00:58.321957  ./kselftest.sh: 131: cannot open /lava-14407632/0/tests/1_kselftest-dt/automated/linux/kselftest/output/kselftest.txt: No such file

 6682 10:00:58.325432  + ../../utils/send-to-lava.sh ./output/result.txt

 6683 10:00:58.391962  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=fail>

 6684 10:00:58.392476  + set +x

 6685 10:00:58.393085  Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=fail
 6687 10:00:58.399392  <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 14407632_1.6.2.3.5>

 6688 10:00:58.400216  Received signal: <ENDRUN> 1_kselftest-dt 14407632_1.6.2.3.5
 6689 10:00:58.400587  Ending use of test pattern.
 6690 10:00:58.400894  Ending test lava.1_kselftest-dt (14407632_1.6.2.3.5), duration 6.97
 6692 10:00:58.402045  <LAVA_TEST_RUNNER EXIT>

 6693 10:00:58.402637  ok: lava_test_shell seems to have completed
 6694 10:00:58.403087  shardfile-dt: fail

 6695 10:00:58.403505  end: 3.1 lava-test-shell (duration 00:00:08) [common]
 6696 10:00:58.403911  end: 3 lava-test-retry (duration 00:00:08) [common]
 6697 10:00:58.404347  start: 4 finalize (timeout 00:07:55) [common]
 6698 10:00:58.404784  start: 4.1 power-off (timeout 00:00:30) [common]
 6699 10:00:58.405550  Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
 6700 10:00:59.745449  >> Command sent successfully.

 6701 10:00:59.756139  Returned 0 in 1 seconds
 6702 10:00:59.857399  end: 4.1 power-off (duration 00:00:01) [common]
 6704 10:00:59.859384  start: 4.2 read-feedback (timeout 00:07:54) [common]
 6705 10:00:59.861172  Listened to connection for namespace 'common' for up to 1s
 6706 10:01:00.861735  Finalising connection for namespace 'common'
 6707 10:01:00.862504  Disconnecting from shell: Finalise
 6708 10:01:00.862940  / # 
 6709 10:01:00.963849  end: 4.2 read-feedback (duration 00:00:01) [common]
 6710 10:01:00.964467  end: 4 finalize (duration 00:00:03) [common]
 6711 10:01:00.965020  Cleaning after the job
 6712 10:01:00.965497  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/ramdisk
 6713 10:01:00.974486  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/kernel
 6714 10:01:01.000332  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/dtb
 6715 10:01:01.000636  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/nfsrootfs
 6716 10:01:01.070411  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407632/tftp-deploy-39smngtf/modules
 6717 10:01:01.076393  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407632
 6718 10:01:01.682620  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407632
 6719 10:01:01.682817  Job finished correctly