Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 46
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 88
1 09:52:22.228135 lava-dispatcher, installed at version: 2024.03
2 09:52:22.228364 start: 0 validate
3 09:52:22.228481 Start time: 2024-06-18 09:52:22.228474+00:00 (UTC)
4 09:52:22.228611 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:52:22.228752 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:52:22.512598 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:52:22.513331 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 09:52:22.773500 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:52:22.773713 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 09:52:23.021782 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:52:23.021919 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:52:23.279942 Using caching service: 'http://localhost/cache/?uri=%s'
13 09:52:23.280154 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 09:52:23.529769 validate duration: 1.30
16 09:52:23.530044 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:52:23.530149 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:52:23.530242 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:52:23.530401 Not decompressing ramdisk as can be used compressed.
20 09:52:23.530499 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 09:52:23.530568 saving as /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/ramdisk/initrd.cpio.gz
22 09:52:23.530631 total size: 5628169 (5 MB)
23 09:52:23.531591 progress 0 % (0 MB)
24 09:52:23.533231 progress 5 % (0 MB)
25 09:52:23.534822 progress 10 % (0 MB)
26 09:52:23.536186 progress 15 % (0 MB)
27 09:52:23.537757 progress 20 % (1 MB)
28 09:52:23.539138 progress 25 % (1 MB)
29 09:52:23.540687 progress 30 % (1 MB)
30 09:52:23.542246 progress 35 % (1 MB)
31 09:52:23.543603 progress 40 % (2 MB)
32 09:52:23.545146 progress 45 % (2 MB)
33 09:52:23.546532 progress 50 % (2 MB)
34 09:52:23.548033 progress 55 % (2 MB)
35 09:52:23.549525 progress 60 % (3 MB)
36 09:52:23.550901 progress 65 % (3 MB)
37 09:52:23.552395 progress 70 % (3 MB)
38 09:52:23.553750 progress 75 % (4 MB)
39 09:52:23.555243 progress 80 % (4 MB)
40 09:52:23.556580 progress 85 % (4 MB)
41 09:52:23.558131 progress 90 % (4 MB)
42 09:52:23.559669 progress 95 % (5 MB)
43 09:52:23.561033 progress 100 % (5 MB)
44 09:52:23.561238 5 MB downloaded in 0.03 s (175.42 MB/s)
45 09:52:23.561387 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:52:23.561621 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:52:23.561703 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:52:23.561780 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:52:23.561912 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 09:52:23.561974 saving as /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/kernel/Image
52 09:52:23.562027 total size: 54813184 (52 MB)
53 09:52:23.562081 No compression specified
54 09:52:23.563096 progress 0 % (0 MB)
55 09:52:23.576658 progress 5 % (2 MB)
56 09:52:23.590246 progress 10 % (5 MB)
57 09:52:23.603747 progress 15 % (7 MB)
58 09:52:23.617616 progress 20 % (10 MB)
59 09:52:23.631377 progress 25 % (13 MB)
60 09:52:23.645060 progress 30 % (15 MB)
61 09:52:23.658799 progress 35 % (18 MB)
62 09:52:23.672636 progress 40 % (20 MB)
63 09:52:23.686205 progress 45 % (23 MB)
64 09:52:23.699893 progress 50 % (26 MB)
65 09:52:23.713581 progress 55 % (28 MB)
66 09:52:23.727277 progress 60 % (31 MB)
67 09:52:23.741335 progress 65 % (34 MB)
68 09:52:23.755380 progress 70 % (36 MB)
69 09:52:23.769691 progress 75 % (39 MB)
70 09:52:23.783618 progress 80 % (41 MB)
71 09:52:23.797156 progress 85 % (44 MB)
72 09:52:23.810846 progress 90 % (47 MB)
73 09:52:23.824320 progress 95 % (49 MB)
74 09:52:23.837593 progress 100 % (52 MB)
75 09:52:23.837805 52 MB downloaded in 0.28 s (189.55 MB/s)
76 09:52:23.837956 end: 1.2.1 http-download (duration 00:00:00) [common]
78 09:52:23.838166 end: 1.2 download-retry (duration 00:00:00) [common]
79 09:52:23.838248 start: 1.3 download-retry (timeout 00:10:00) [common]
80 09:52:23.838325 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 09:52:23.838456 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 09:52:23.838523 saving as /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 09:52:23.838577 total size: 57695 (0 MB)
84 09:52:23.838630 No compression specified
85 09:52:23.839763 progress 56 % (0 MB)
86 09:52:23.840024 progress 100 % (0 MB)
87 09:52:23.840217 0 MB downloaded in 0.00 s (33.59 MB/s)
88 09:52:23.840331 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:52:23.840535 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:52:23.840612 start: 1.4 download-retry (timeout 00:10:00) [common]
92 09:52:23.840688 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 09:52:23.840791 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 09:52:23.840851 saving as /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/nfsrootfs/full.rootfs.tar
95 09:52:23.840904 total size: 120894716 (115 MB)
96 09:52:23.840958 Using unxz to decompress xz
97 09:52:23.842124 progress 0 % (0 MB)
98 09:52:24.173146 progress 5 % (5 MB)
99 09:52:24.510350 progress 10 % (11 MB)
100 09:52:24.848648 progress 15 % (17 MB)
101 09:52:25.171156 progress 20 % (23 MB)
102 09:52:25.472311 progress 25 % (28 MB)
103 09:52:25.815237 progress 30 % (34 MB)
104 09:52:26.130528 progress 35 % (40 MB)
105 09:52:26.298298 progress 40 % (46 MB)
106 09:52:26.477564 progress 45 % (51 MB)
107 09:52:26.776743 progress 50 % (57 MB)
108 09:52:27.124598 progress 55 % (63 MB)
109 09:52:27.454744 progress 60 % (69 MB)
110 09:52:27.790566 progress 65 % (74 MB)
111 09:52:28.124655 progress 70 % (80 MB)
112 09:52:28.464969 progress 75 % (86 MB)
113 09:52:28.791987 progress 80 % (92 MB)
114 09:52:29.120829 progress 85 % (98 MB)
115 09:52:29.449418 progress 90 % (103 MB)
116 09:52:29.763433 progress 95 % (109 MB)
117 09:52:30.109241 progress 100 % (115 MB)
118 09:52:30.114590 115 MB downloaded in 6.27 s (18.38 MB/s)
119 09:52:30.114753 end: 1.4.1 http-download (duration 00:00:06) [common]
121 09:52:30.114986 end: 1.4 download-retry (duration 00:00:06) [common]
122 09:52:30.115077 start: 1.5 download-retry (timeout 00:09:53) [common]
123 09:52:30.115165 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 09:52:30.115303 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 09:52:30.115368 saving as /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/modules/modules.tar
126 09:52:30.115455 total size: 8619356 (8 MB)
127 09:52:30.115546 Using unxz to decompress xz
128 09:52:30.117263 progress 0 % (0 MB)
129 09:52:30.136141 progress 5 % (0 MB)
130 09:52:30.159640 progress 10 % (0 MB)
131 09:52:30.183769 progress 15 % (1 MB)
132 09:52:30.207394 progress 20 % (1 MB)
133 09:52:30.231374 progress 25 % (2 MB)
134 09:52:30.254695 progress 30 % (2 MB)
135 09:52:30.278534 progress 35 % (2 MB)
136 09:52:30.302196 progress 40 % (3 MB)
137 09:52:30.325764 progress 45 % (3 MB)
138 09:52:30.348546 progress 50 % (4 MB)
139 09:52:30.371974 progress 55 % (4 MB)
140 09:52:30.395109 progress 60 % (4 MB)
141 09:52:30.417947 progress 65 % (5 MB)
142 09:52:30.444818 progress 70 % (5 MB)
143 09:52:30.470401 progress 75 % (6 MB)
144 09:52:30.493375 progress 80 % (6 MB)
145 09:52:30.515863 progress 85 % (7 MB)
146 09:52:30.538354 progress 90 % (7 MB)
147 09:52:30.564643 progress 95 % (7 MB)
148 09:52:30.592345 progress 100 % (8 MB)
149 09:52:30.596853 8 MB downloaded in 0.48 s (17.08 MB/s)
150 09:52:30.597013 end: 1.5.1 http-download (duration 00:00:00) [common]
152 09:52:30.597223 end: 1.5 download-retry (duration 00:00:00) [common]
153 09:52:30.597301 start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
154 09:52:30.597377 start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
155 09:52:34.132807 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq
156 09:52:34.132981 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 09:52:34.133070 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 09:52:34.133230 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x
159 09:52:34.133350 makedir: /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin
160 09:52:34.133441 makedir: /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/tests
161 09:52:34.133528 makedir: /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/results
162 09:52:34.133649 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-add-keys
163 09:52:34.133779 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-add-sources
164 09:52:34.133897 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-background-process-start
165 09:52:34.134014 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-background-process-stop
166 09:52:34.134138 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-common-functions
167 09:52:34.134253 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-echo-ipv4
168 09:52:34.134366 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-install-packages
169 09:52:34.134479 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-installed-packages
170 09:52:34.134590 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-os-build
171 09:52:34.134706 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-probe-channel
172 09:52:34.134817 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-probe-ip
173 09:52:34.134928 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-target-ip
174 09:52:34.135040 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-target-mac
175 09:52:34.135151 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-target-storage
176 09:52:34.135265 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-case
177 09:52:34.135385 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-event
178 09:52:34.135496 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-feedback
179 09:52:34.135606 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-raise
180 09:52:34.135716 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-reference
181 09:52:34.135827 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-runner
182 09:52:34.135937 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-set
183 09:52:34.136046 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-test-shell
184 09:52:34.136159 Updating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-add-keys (debian)
185 09:52:34.136299 Updating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-add-sources (debian)
186 09:52:34.136425 Updating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-install-packages (debian)
187 09:52:34.136549 Updating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-installed-packages (debian)
188 09:52:34.136673 Updating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/bin/lava-os-build (debian)
189 09:52:34.136780 Creating /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/environment
190 09:52:34.136866 LAVA metadata
191 09:52:34.136931 - LAVA_JOB_ID=14407600
192 09:52:34.136987 - LAVA_DISPATCHER_IP=192.168.201.1
193 09:52:34.137077 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 09:52:34.137133 skipped lava-vland-overlay
195 09:52:34.137198 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 09:52:34.137268 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 09:52:34.137321 skipped lava-multinode-overlay
198 09:52:34.137383 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 09:52:34.137451 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 09:52:34.137511 Loading test definitions
201 09:52:34.137617 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 09:52:34.137688 Using /lava-14407600 at stage 0
203 09:52:34.137952 uuid=14407600_1.6.2.3.1 testdef=None
204 09:52:34.138032 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 09:52:34.138106 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 09:52:34.138499 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 09:52:34.138696 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 09:52:34.139190 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 09:52:34.139408 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 09:52:34.141322 runner path: /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/0/tests/0_timesync-off test_uuid 14407600_1.6.2.3.1
213 09:52:34.141863 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 09:52:34.142593 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 09:52:34.142834 Using /lava-14407600 at stage 0
217 09:52:34.143142 Fetching tests from https://github.com/kernelci/test-definitions.git
218 09:52:34.143413 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/0/tests/1_kselftest-rtc'
219 09:52:36.449592 Running '/usr/bin/git checkout kernelci.org
220 09:52:36.595524 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
221 09:52:36.595889 uuid=14407600_1.6.2.3.5 testdef=None
222 09:52:36.595990 end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
224 09:52:36.596184 start: 1.6.2.3.6 test-overlay (timeout 00:09:47) [common]
225 09:52:36.596815 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 09:52:36.597017 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:47) [common]
228 09:52:36.597976 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 09:52:36.598190 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
231 09:52:36.599035 runner path: /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/0/tests/1_kselftest-rtc test_uuid 14407600_1.6.2.3.5
232 09:52:36.599114 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 09:52:36.599173 BRANCH='cip'
234 09:52:36.599225 SKIPFILE='/dev/null'
235 09:52:36.599276 SKIP_INSTALL='True'
236 09:52:36.599326 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 09:52:36.599377 TST_CASENAME=''
238 09:52:36.599426 TST_CMDFILES='rtc'
239 09:52:36.599559 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 09:52:36.599740 Creating lava-test-runner.conf files
242 09:52:36.599796 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407600/lava-overlay-lekfj44x/lava-14407600/0 for stage 0
243 09:52:36.599878 - 0_timesync-off
244 09:52:36.599938 - 1_kselftest-rtc
245 09:52:36.600026 end: 1.6.2.3 test-definition (duration 00:00:02) [common]
246 09:52:36.600104 start: 1.6.2.4 compress-overlay (timeout 00:09:47) [common]
247 09:52:43.722136 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 09:52:43.722290 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
249 09:52:43.722408 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 09:52:43.722519 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 09:52:43.722633 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
252 09:52:43.881944 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 09:52:43.882077 start: 1.6.4 extract-modules (timeout 00:09:40) [common]
254 09:52:43.882157 extracting modules file /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq
255 09:52:44.141277 extracting modules file /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407600/extract-overlay-ramdisk-osc5cmti/ramdisk
256 09:52:44.389491 end: 1.6.4 extract-modules (duration 00:00:01) [common]
257 09:52:44.389675 start: 1.6.5 apply-overlay-tftp (timeout 00:09:39) [common]
258 09:52:44.389756 [common] Applying overlay to NFS
259 09:52:44.389816 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407600/compress-overlay-3vlgjigf/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq
260 09:52:45.260467 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 09:52:45.260600 start: 1.6.6 configure-preseed-file (timeout 00:09:38) [common]
262 09:52:45.260686 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 09:52:45.260766 start: 1.6.7 compress-ramdisk (timeout 00:09:38) [common]
264 09:52:45.260834 Building ramdisk /var/lib/lava/dispatcher/tmp/14407600/extract-overlay-ramdisk-osc5cmti/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407600/extract-overlay-ramdisk-osc5cmti/ramdisk
265 09:52:45.581178 >> 130466 blocks
266 09:52:47.661293 rename /var/lib/lava/dispatcher/tmp/14407600/extract-overlay-ramdisk-osc5cmti/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/ramdisk/ramdisk.cpio.gz
267 09:52:47.661458 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 09:52:47.661584 start: 1.6.8 prepare-kernel (timeout 00:09:36) [common]
269 09:52:47.661665 start: 1.6.8.1 prepare-fit (timeout 00:09:36) [common]
270 09:52:47.661743 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/kernel/Image']
271 09:53:01.274767 Returned 0 in 13 seconds
272 09:53:01.375509 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/kernel/image.itb
273 09:53:01.825246 output: FIT description: Kernel Image image with one or more FDT blobs
274 09:53:01.825377 output: Created: Tue Jun 18 10:53:01 2024
275 09:53:01.825440 output: Image 0 (kernel-1)
276 09:53:01.825494 output: Description:
277 09:53:01.825552 output: Created: Tue Jun 18 10:53:01 2024
278 09:53:01.825638 output: Type: Kernel Image
279 09:53:01.825693 output: Compression: lzma compressed
280 09:53:01.825749 output: Data Size: 13126726 Bytes = 12819.07 KiB = 12.52 MiB
281 09:53:01.825805 output: Architecture: AArch64
282 09:53:01.825858 output: OS: Linux
283 09:53:01.825912 output: Load Address: 0x00000000
284 09:53:01.825966 output: Entry Point: 0x00000000
285 09:53:01.826022 output: Hash algo: crc32
286 09:53:01.826078 output: Hash value: 4137a6e7
287 09:53:01.826131 output: Image 1 (fdt-1)
288 09:53:01.826185 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 09:53:01.826241 output: Created: Tue Jun 18 10:53:01 2024
290 09:53:01.826292 output: Type: Flat Device Tree
291 09:53:01.826343 output: Compression: uncompressed
292 09:53:01.826395 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 09:53:01.826450 output: Architecture: AArch64
294 09:53:01.826502 output: Hash algo: crc32
295 09:53:01.826551 output: Hash value: a9713552
296 09:53:01.826599 output: Image 2 (ramdisk-1)
297 09:53:01.826647 output: Description: unavailable
298 09:53:01.826695 output: Created: Tue Jun 18 10:53:01 2024
299 09:53:01.826743 output: Type: RAMDisk Image
300 09:53:01.826791 output: Compression: uncompressed
301 09:53:01.826838 output: Data Size: 18745130 Bytes = 18305.79 KiB = 17.88 MiB
302 09:53:01.826886 output: Architecture: AArch64
303 09:53:01.826933 output: OS: Linux
304 09:53:01.826981 output: Load Address: unavailable
305 09:53:01.827028 output: Entry Point: unavailable
306 09:53:01.827076 output: Hash algo: crc32
307 09:53:01.827122 output: Hash value: 3c5b60bb
308 09:53:01.827169 output: Default Configuration: 'conf-1'
309 09:53:01.827216 output: Configuration 0 (conf-1)
310 09:53:01.827264 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 09:53:01.827311 output: Kernel: kernel-1
312 09:53:01.827358 output: Init Ramdisk: ramdisk-1
313 09:53:01.827406 output: FDT: fdt-1
314 09:53:01.827453 output: Loadables: kernel-1
315 09:53:01.827499 output:
316 09:53:01.827634 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 09:53:01.827724 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 09:53:01.827816 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
319 09:53:01.827901 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:22) [common]
320 09:53:01.827967 No LXC device requested
321 09:53:01.828035 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 09:53:01.828114 start: 1.8 deploy-device-env (timeout 00:09:22) [common]
323 09:53:01.828182 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 09:53:01.828243 Checking files for TFTP limit of 4294967296 bytes.
325 09:53:01.828690 end: 1 tftp-deploy (duration 00:00:38) [common]
326 09:53:01.828787 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 09:53:01.828870 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 09:53:01.828984 substitutions:
329 09:53:01.829046 - {DTB}: 14407600/tftp-deploy-tzehc4ln/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 09:53:01.829104 - {INITRD}: 14407600/tftp-deploy-tzehc4ln/ramdisk/ramdisk.cpio.gz
331 09:53:01.829157 - {KERNEL}: 14407600/tftp-deploy-tzehc4ln/kernel/Image
332 09:53:01.829209 - {LAVA_MAC}: None
333 09:53:01.829260 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq
334 09:53:01.829310 - {NFS_SERVER_IP}: 192.168.201.1
335 09:53:01.829358 - {PRESEED_CONFIG}: None
336 09:53:01.829414 - {PRESEED_LOCAL}: None
337 09:53:01.829464 - {RAMDISK}: 14407600/tftp-deploy-tzehc4ln/ramdisk/ramdisk.cpio.gz
338 09:53:01.829512 - {ROOT_PART}: None
339 09:53:01.829581 - {ROOT}: None
340 09:53:01.829643 - {SERVER_IP}: 192.168.201.1
341 09:53:01.829691 - {TEE}: None
342 09:53:01.829740 Parsed boot commands:
343 09:53:01.829786 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 09:53:01.829966 Parsed boot commands: tftpboot 192.168.201.1 14407600/tftp-deploy-tzehc4ln/kernel/image.itb 14407600/tftp-deploy-tzehc4ln/kernel/cmdline
345 09:53:01.830048 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 09:53:01.830124 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 09:53:01.830205 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 09:53:01.830281 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 09:53:01.830340 Not connected, no need to disconnect.
350 09:53:01.830407 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 09:53:01.830480 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 09:53:01.830540 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
353 09:53:01.834108 Setting prompt string to ['lava-test: # ']
354 09:53:01.834431 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 09:53:01.834528 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 09:53:01.834617 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 09:53:01.834703 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 09:53:01.834948 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
359 09:53:10.976425 >> Command sent successfully.
360 09:53:10.991217 Returned 0 in 9 seconds
361 09:53:11.092165 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 09:53:11.093156 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 09:53:11.093420 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 09:53:11.093713 Setting prompt string to 'Starting depthcharge on Juniper...'
366 09:53:11.093928 Changing prompt to 'Starting depthcharge on Juniper...'
367 09:53:11.094076 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 09:53:11.094836 [Enter `^Ec?' for help]
369 09:53:12.808829 [DL] 00000000 00000000 010701
370 09:53:12.814209
371 09:53:12.814833
372 09:53:12.815185 F0: 102B 0000
373 09:53:12.815519
374 09:53:12.815829 F3: 1006 0033 [0200]
375 09:53:12.817008
376 09:53:12.817632 F3: 4001 00E0 [0200]
377 09:53:12.817988
378 09:53:12.818382 F3: 0000 0000
379 09:53:12.820416
380 09:53:12.820966 V0: 0000 0000 [0001]
381 09:53:12.821299
382 09:53:12.821641 00: 1027 0002
383 09:53:12.821943
384 09:53:12.823965 01: 0000 0000
385 09:53:12.824351
386 09:53:12.824676 BP: 0C00 0251 [0000]
387 09:53:12.824955
388 09:53:12.827525 G0: 1182 0000
389 09:53:12.827903
390 09:53:12.828209 EC: 0004 0000 [0001]
391 09:53:12.828498
392 09:53:12.830861 S7: 0000 0000 [0000]
393 09:53:12.831250
394 09:53:12.833594 CC: 0000 0000 [0001]
395 09:53:12.834001
396 09:53:12.834319 T0: 0000 00DB [000F]
397 09:53:12.834590
398 09:53:12.834844 Jump to BL
399 09:53:12.835111
400 09:53:12.869893
401 09:53:12.870272
402 09:53:12.876733 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 09:53:12.879874 ARM64: Exception handlers installed.
404 09:53:12.883077 ARM64: Testing exception
405 09:53:12.886559 ARM64: Done test exception
406 09:53:12.890652 WDT: Last reset was cold boot
407 09:53:12.893858 SPI0(PAD0) initialized at 992727 Hz
408 09:53:12.897801 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 09:53:12.898319 Manufacturer: ef
410 09:53:12.904100 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 09:53:12.916643 Probing TPM: . done!
412 09:53:12.917167 TPM ready after 0 ms
413 09:53:12.923219 Connected to device vid:did:rid of 1ae0:0028:00
414 09:53:12.933902 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
415 09:53:12.964675 Initialized TPM device CR50 revision 0
416 09:53:12.975954 tlcl_send_startup: Startup return code is 0
417 09:53:12.976514 TPM: setup succeeded
418 09:53:12.984485 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 09:53:12.987651 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 09:53:12.990874 in-header: 03 19 00 00 08 00 00 00
421 09:53:12.994334 in-data: a2 e0 47 00 13 00 00 00
422 09:53:12.997948 Chrome EC: UHEPI supported
423 09:53:13.004616 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 09:53:13.007584 in-header: 03 a1 00 00 08 00 00 00
425 09:53:13.011567 in-data: 84 60 60 10 00 00 00 00
426 09:53:13.012068 Phase 1
427 09:53:13.014223 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 09:53:13.021248 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 09:53:13.027651 VB2:vb2_check_recovery() Recovery was requested manually
430 09:53:13.030971 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 09:53:13.037341 Recovery requested (1009000e)
432 09:53:13.046783 tlcl_extend: response is 0
433 09:53:13.051929 tlcl_extend: response is 0
434 09:53:13.076421
435 09:53:13.076892
436 09:53:13.086956 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 09:53:13.089629 ARM64: Exception handlers installed.
438 09:53:13.090318 ARM64: Testing exception
439 09:53:13.092653 ARM64: Done test exception
440 09:53:13.107609 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2000
441 09:53:13.114439 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 09:53:13.117877 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 09:53:13.126541 [RTC]rtc_get_frequency_meter,134: input=0xf, output=821
444 09:53:13.133078 [RTC]rtc_get_frequency_meter,134: input=0x7, output=698
445 09:53:13.139845 [RTC]rtc_get_frequency_meter,134: input=0xb, output=761
446 09:53:13.146633 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
447 09:53:13.153623 [RTC]rtc_get_frequency_meter,134: input=0xe, output=807
448 09:53:13.161011 [RTC]rtc_get_frequency_meter,134: input=0xd, output=792
449 09:53:13.167642 [RTC]rtc_get_frequency_meter,134: input=0xe, output=806
450 09:53:13.174211 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
451 09:53:13.177215 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 09:53:13.181159 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 09:53:13.187411 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 09:53:13.190899 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 09:53:13.193746 in-header: 03 19 00 00 08 00 00 00
456 09:53:13.197505 in-data: a2 e0 47 00 13 00 00 00
457 09:53:13.197921 Chrome EC: UHEPI supported
458 09:53:13.203691 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 09:53:13.207306 in-header: 03 a1 00 00 08 00 00 00
460 09:53:13.210340 in-data: 84 60 60 10 00 00 00 00
461 09:53:13.213534 Skip loading cached calibration data
462 09:53:13.220175 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 09:53:13.223519 in-header: 03 a1 00 00 08 00 00 00
464 09:53:13.226594 in-data: 84 60 60 10 00 00 00 00
465 09:53:13.233109 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 09:53:13.236423 in-header: 03 a1 00 00 08 00 00 00
467 09:53:13.239910 in-data: 84 60 60 10 00 00 00 00
468 09:53:13.243029 ADC[3]: Raw value=213827 ID=1
469 09:53:13.243129 Manufacturer: ef
470 09:53:13.249456 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 09:53:13.252652 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 09:53:13.255955 CBFS @ 21000 size 3d4000
473 09:53:13.263013 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 09:53:13.266259 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
475 09:53:13.269412 CBFS: Found @ offset 3c700 size 44
476 09:53:13.272814 DRAM-K: Full Calibration
477 09:53:13.276048 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 09:53:13.279166 CBFS @ 21000 size 3d4000
479 09:53:13.285674 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 09:53:13.285802 CBFS: Locating 'fallback/dram'
481 09:53:13.289145 CBFS: Found @ offset 24b00 size 12268
482 09:53:13.318431 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
483 09:53:13.322039 ddr_geometry: 1, config: 0x0
484 09:53:13.325264 header.status = 0x0
485 09:53:13.328552 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 09:53:13.331892 header.version = 0x5 (expected: 0x5)
487 09:53:13.335040 header.size = 0x8f0 (expected: 0x8f0)
488 09:53:13.335118 header.config = 0x0
489 09:53:13.338306 header.flags = 0x0
490 09:53:13.341671 header.checksum = 0x0
491 09:53:13.348339 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 09:53:13.351686 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 09:53:13.358388 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 09:53:13.358471 ddr_geometry:1
495 09:53:13.361368 [EMI] new MDL number = 1
496 09:53:13.361468 dram_cbt_mode_extern: 0
497 09:53:13.365221 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 09:53:13.371458 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 09:53:13.371550
500 09:53:13.371610
501 09:53:13.374387 [Bianco] ETT version 0.0.0.1
502 09:53:13.377933 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 09:53:13.378015
504 09:53:13.381110 vSetVcoreByFreq with vcore:762500, freq=1600
505 09:53:13.381188
506 09:53:13.384380 [DramcInit]
507 09:53:13.387696 AutoRefreshCKEOff AutoREF OFF
508 09:53:13.387776 DDRPhyPLLSetting-CKEOFF
509 09:53:13.390766 DDRPhyPLLSetting-CKEON
510 09:53:13.390844
511 09:53:13.390904 Enable WDQS
512 09:53:13.395679 [ModeRegInit_LP4] CH0 RK0
513 09:53:13.399006 Write Rank0 MR13 =0x18
514 09:53:13.399089 Write Rank0 MR12 =0x5d
515 09:53:13.401924 Write Rank0 MR1 =0x56
516 09:53:13.405425 Write Rank0 MR2 =0x1a
517 09:53:13.405542 Write Rank0 MR11 =0x0
518 09:53:13.408637 Write Rank0 MR22 =0x38
519 09:53:13.412088 Write Rank0 MR14 =0x5d
520 09:53:13.412170 Write Rank0 MR3 =0x30
521 09:53:13.415652 Write Rank0 MR13 =0x58
522 09:53:13.415729 Write Rank0 MR12 =0x5d
523 09:53:13.418802 Write Rank0 MR1 =0x56
524 09:53:13.422129 Write Rank0 MR2 =0x2d
525 09:53:13.422204 Write Rank0 MR11 =0x23
526 09:53:13.425167 Write Rank0 MR22 =0x34
527 09:53:13.425243 Write Rank0 MR14 =0x10
528 09:53:13.428979 Write Rank0 MR3 =0x30
529 09:53:13.431748 Write Rank0 MR13 =0xd8
530 09:53:13.431897 [ModeRegInit_LP4] CH0 RK1
531 09:53:13.435621 Write Rank1 MR13 =0x18
532 09:53:13.439322 Write Rank1 MR12 =0x5d
533 09:53:13.439461 Write Rank1 MR1 =0x56
534 09:53:13.442517 Write Rank1 MR2 =0x1a
535 09:53:13.442658 Write Rank1 MR11 =0x0
536 09:53:13.445020 Write Rank1 MR22 =0x38
537 09:53:13.448485 Write Rank1 MR14 =0x5d
538 09:53:13.448624 Write Rank1 MR3 =0x30
539 09:53:13.451702 Write Rank1 MR13 =0x58
540 09:53:13.455850 Write Rank1 MR12 =0x5d
541 09:53:13.455996 Write Rank1 MR1 =0x56
542 09:53:13.458380 Write Rank1 MR2 =0x2d
543 09:53:13.458503 Write Rank1 MR11 =0x23
544 09:53:13.461566 Write Rank1 MR22 =0x34
545 09:53:13.464793 Write Rank1 MR14 =0x10
546 09:53:13.464949 Write Rank1 MR3 =0x30
547 09:53:13.468246 Write Rank1 MR13 =0xd8
548 09:53:13.472115 [ModeRegInit_LP4] CH1 RK0
549 09:53:13.472284 Write Rank0 MR13 =0x18
550 09:53:13.475537 Write Rank0 MR12 =0x5d
551 09:53:13.475712 Write Rank0 MR1 =0x56
552 09:53:13.478404 Write Rank0 MR2 =0x1a
553 09:53:13.481383 Write Rank0 MR11 =0x0
554 09:53:13.481545 Write Rank0 MR22 =0x38
555 09:53:13.484795 Write Rank0 MR14 =0x5d
556 09:53:13.484986 Write Rank0 MR3 =0x30
557 09:53:13.488365 Write Rank0 MR13 =0x58
558 09:53:13.491135 Write Rank0 MR12 =0x5d
559 09:53:13.491343 Write Rank0 MR1 =0x56
560 09:53:13.494773 Write Rank0 MR2 =0x2d
561 09:53:13.497859 Write Rank0 MR11 =0x23
562 09:53:13.498068 Write Rank0 MR22 =0x34
563 09:53:13.501378 Write Rank0 MR14 =0x10
564 09:53:13.501578 Write Rank0 MR3 =0x30
565 09:53:13.504764 Write Rank0 MR13 =0xd8
566 09:53:13.507788 [ModeRegInit_LP4] CH1 RK1
567 09:53:13.508055 Write Rank1 MR13 =0x18
568 09:53:13.511651 Write Rank1 MR12 =0x5d
569 09:53:13.514579 Write Rank1 MR1 =0x56
570 09:53:13.515169 Write Rank1 MR2 =0x1a
571 09:53:13.518064 Write Rank1 MR11 =0x0
572 09:53:13.518483 Write Rank1 MR22 =0x38
573 09:53:13.521741 Write Rank1 MR14 =0x5d
574 09:53:13.524828 Write Rank1 MR3 =0x30
575 09:53:13.525248 Write Rank1 MR13 =0x58
576 09:53:13.527841 Write Rank1 MR12 =0x5d
577 09:53:13.528222 Write Rank1 MR1 =0x56
578 09:53:13.531263 Write Rank1 MR2 =0x2d
579 09:53:13.534712 Write Rank1 MR11 =0x23
580 09:53:13.535093 Write Rank1 MR22 =0x34
581 09:53:13.538239 Write Rank1 MR14 =0x10
582 09:53:13.541877 Write Rank1 MR3 =0x30
583 09:53:13.542387 Write Rank1 MR13 =0xd8
584 09:53:13.544437 match AC timing 3
585 09:53:13.555426 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 09:53:13.555969 [MiockJmeterHQA]
587 09:53:13.557518 vSetVcoreByFreq with vcore:762500, freq=1600
588 09:53:13.665535
589 09:53:13.666096 MIOCK jitter meter ch=0
590 09:53:13.666430
591 09:53:13.668636 1T = (103-19) = 84 dly cells
592 09:53:13.675136 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
593 09:53:13.678657 vSetVcoreByFreq with vcore:725000, freq=1200
594 09:53:13.778518
595 09:53:13.779041 MIOCK jitter meter ch=0
596 09:53:13.779486
597 09:53:13.782236 1T = (97-19) = 78 dly cells
598 09:53:13.788761 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
599 09:53:13.791965 vSetVcoreByFreq with vcore:725000, freq=800
600 09:53:13.892019
601 09:53:13.892522 MIOCK jitter meter ch=0
602 09:53:13.892859
603 09:53:13.894909 1T = (97-19) = 78 dly cells
604 09:53:13.902258 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
605 09:53:13.905907 vSetVcoreByFreq with vcore:762500, freq=1600
606 09:53:13.908885 vSetVcoreByFreq with vcore:762500, freq=1600
607 09:53:13.909391
608 09:53:13.909767 K DRVP
609 09:53:13.912454 1. OCD DRVP=0 CALOUT=0
610 09:53:13.915351 1. OCD DRVP=1 CALOUT=0
611 09:53:13.915787 1. OCD DRVP=2 CALOUT=0
612 09:53:13.918407 1. OCD DRVP=3 CALOUT=0
613 09:53:13.922350 1. OCD DRVP=4 CALOUT=0
614 09:53:13.922867 1. OCD DRVP=5 CALOUT=0
615 09:53:13.925218 1. OCD DRVP=6 CALOUT=0
616 09:53:13.925685 1. OCD DRVP=7 CALOUT=0
617 09:53:13.928855 1. OCD DRVP=8 CALOUT=1
618 09:53:13.929369
619 09:53:13.931839 1. OCD DRVP calibration OK! DRVP=8
620 09:53:13.932271
621 09:53:13.932616
622 09:53:13.932921
623 09:53:13.933211 K ODTN
624 09:53:13.935021 3. OCD ODTN=0 ,CALOUT=1
625 09:53:13.938420 3. OCD ODTN=1 ,CALOUT=1
626 09:53:13.938933 3. OCD ODTN=2 ,CALOUT=1
627 09:53:13.941633 3. OCD ODTN=3 ,CALOUT=1
628 09:53:13.945035 3. OCD ODTN=4 ,CALOUT=1
629 09:53:13.945479 3. OCD ODTN=5 ,CALOUT=1
630 09:53:13.948013 3. OCD ODTN=6 ,CALOUT=1
631 09:53:13.951154 3. OCD ODTN=7 ,CALOUT=0
632 09:53:13.951584
633 09:53:13.954726 3. OCD ODTN calibration OK! ODTN=7
634 09:53:13.955232
635 09:53:13.957638 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
636 09:53:13.961300 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
637 09:53:13.968069 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
638 09:53:13.968581
639 09:53:13.968931 K DRVP
640 09:53:13.969237 1. OCD DRVP=0 CALOUT=0
641 09:53:13.970822 1. OCD DRVP=1 CALOUT=0
642 09:53:13.974454 1. OCD DRVP=2 CALOUT=0
643 09:53:13.974895 1. OCD DRVP=3 CALOUT=0
644 09:53:13.977500 1. OCD DRVP=4 CALOUT=0
645 09:53:13.981275 1. OCD DRVP=5 CALOUT=0
646 09:53:13.981818 1. OCD DRVP=6 CALOUT=0
647 09:53:13.984187 1. OCD DRVP=7 CALOUT=0
648 09:53:13.987125 1. OCD DRVP=8 CALOUT=0
649 09:53:13.987583 1. OCD DRVP=9 CALOUT=1
650 09:53:13.987923
651 09:53:13.991025 1. OCD DRVP calibration OK! DRVP=9
652 09:53:13.991556
653 09:53:13.991909
654 09:53:13.992214
655 09:53:13.994163 K ODTN
656 09:53:13.994649 3. OCD ODTN=0 ,CALOUT=1
657 09:53:13.997291 3. OCD ODTN=1 ,CALOUT=1
658 09:53:13.997729 3. OCD ODTN=2 ,CALOUT=1
659 09:53:14.000624 3. OCD ODTN=3 ,CALOUT=1
660 09:53:14.003780 3. OCD ODTN=4 ,CALOUT=1
661 09:53:14.004176 3. OCD ODTN=5 ,CALOUT=1
662 09:53:14.006886 3. OCD ODTN=6 ,CALOUT=1
663 09:53:14.010845 3. OCD ODTN=7 ,CALOUT=1
664 09:53:14.011418 3. OCD ODTN=8 ,CALOUT=1
665 09:53:14.013987 3. OCD ODTN=9 ,CALOUT=1
666 09:53:14.017191 3. OCD ODTN=10 ,CALOUT=1
667 09:53:14.017648 3. OCD ODTN=11 ,CALOUT=1
668 09:53:14.020731 3. OCD ODTN=12 ,CALOUT=1
669 09:53:14.023358 3. OCD ODTN=13 ,CALOUT=1
670 09:53:14.024015 3. OCD ODTN=14 ,CALOUT=0
671 09:53:14.026816
672 09:53:14.030034 3. OCD ODTN calibration OK! ODTN=14
673 09:53:14.030472
674 09:53:14.033649 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=14
675 09:53:14.036981 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14
676 09:53:14.039627 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14 (After Adjust)
677 09:53:14.040023
678 09:53:14.042968 [DramcInit]
679 09:53:14.046379 AutoRefreshCKEOff AutoREF OFF
680 09:53:14.046830 DDRPhyPLLSetting-CKEOFF
681 09:53:14.049741 DDRPhyPLLSetting-CKEON
682 09:53:14.050125
683 09:53:14.050427 Enable WDQS
684 09:53:14.050706 ==
685 09:53:14.056937 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
686 09:53:14.059991 fsp= 1, odt_onoff= 1, Byte mode= 0
687 09:53:14.060397 ==
688 09:53:14.063139 [Duty_Offset_Calibration]
689 09:53:14.063680
690 09:53:14.063993 ===========================
691 09:53:14.066054 B0:2 B1:2 CA:1
692 09:53:14.087360 ==
693 09:53:14.091322 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
694 09:53:14.094204 fsp= 1, odt_onoff= 1, Byte mode= 0
695 09:53:14.094727 ==
696 09:53:14.097453 [Duty_Offset_Calibration]
697 09:53:14.097911
698 09:53:14.100680 ===========================
699 09:53:14.101109 B0:0 B1:0 CA:0
700 09:53:14.133406 [ModeRegInit_LP4] CH0 RK0
701 09:53:14.136535 Write Rank0 MR13 =0x18
702 09:53:14.137042 Write Rank0 MR12 =0x5d
703 09:53:14.140102 Write Rank0 MR1 =0x56
704 09:53:14.143396 Write Rank0 MR2 =0x1a
705 09:53:14.143908 Write Rank0 MR11 =0x0
706 09:53:14.146268 Write Rank0 MR22 =0x38
707 09:53:14.149715 Write Rank0 MR14 =0x5d
708 09:53:14.150142 Write Rank0 MR3 =0x30
709 09:53:14.152989 Write Rank0 MR13 =0x58
710 09:53:14.153415 Write Rank0 MR12 =0x5d
711 09:53:14.156644 Write Rank0 MR1 =0x56
712 09:53:14.159057 Write Rank0 MR2 =0x2d
713 09:53:14.159486 Write Rank0 MR11 =0x23
714 09:53:14.162878 Write Rank0 MR22 =0x34
715 09:53:14.163308 Write Rank0 MR14 =0x10
716 09:53:14.166049 Write Rank0 MR3 =0x30
717 09:53:14.169380 Write Rank0 MR13 =0xd8
718 09:53:14.169992 [ModeRegInit_LP4] CH0 RK1
719 09:53:14.172754 Write Rank1 MR13 =0x18
720 09:53:14.176421 Write Rank1 MR12 =0x5d
721 09:53:14.176930 Write Rank1 MR1 =0x56
722 09:53:14.179800 Write Rank1 MR2 =0x1a
723 09:53:14.182683 Write Rank1 MR11 =0x0
724 09:53:14.183115 Write Rank1 MR22 =0x38
725 09:53:14.185936 Write Rank1 MR14 =0x5d
726 09:53:14.186597 Write Rank1 MR3 =0x30
727 09:53:14.189342 Write Rank1 MR13 =0x58
728 09:53:14.192309 Write Rank1 MR12 =0x5d
729 09:53:14.192735 Write Rank1 MR1 =0x56
730 09:53:14.195334 Write Rank1 MR2 =0x2d
731 09:53:14.195758 Write Rank1 MR11 =0x23
732 09:53:14.199092 Write Rank1 MR22 =0x34
733 09:53:14.201777 Write Rank1 MR14 =0x10
734 09:53:14.202203 Write Rank1 MR3 =0x30
735 09:53:14.205339 Write Rank1 MR13 =0xd8
736 09:53:14.208905 [ModeRegInit_LP4] CH1 RK0
737 09:53:14.209334 Write Rank0 MR13 =0x18
738 09:53:14.211719 Write Rank0 MR12 =0x5d
739 09:53:14.212149 Write Rank0 MR1 =0x56
740 09:53:14.214976 Write Rank0 MR2 =0x1a
741 09:53:14.218441 Write Rank0 MR11 =0x0
742 09:53:14.218742 Write Rank0 MR22 =0x38
743 09:53:14.221728 Write Rank0 MR14 =0x5d
744 09:53:14.225046 Write Rank0 MR3 =0x30
745 09:53:14.225222 Write Rank0 MR13 =0x58
746 09:53:14.227987 Write Rank0 MR12 =0x5d
747 09:53:14.228163 Write Rank0 MR1 =0x56
748 09:53:14.231319 Write Rank0 MR2 =0x2d
749 09:53:14.234921 Write Rank0 MR11 =0x23
750 09:53:14.235046 Write Rank0 MR22 =0x34
751 09:53:14.238772 Write Rank0 MR14 =0x10
752 09:53:14.238909 Write Rank0 MR3 =0x30
753 09:53:14.241516 Write Rank0 MR13 =0xd8
754 09:53:14.245080 [ModeRegInit_LP4] CH1 RK1
755 09:53:14.245177 Write Rank1 MR13 =0x18
756 09:53:14.248006 Write Rank1 MR12 =0x5d
757 09:53:14.250964 Write Rank1 MR1 =0x56
758 09:53:14.251062 Write Rank1 MR2 =0x1a
759 09:53:14.254462 Write Rank1 MR11 =0x0
760 09:53:14.254570 Write Rank1 MR22 =0x38
761 09:53:14.257810 Write Rank1 MR14 =0x5d
762 09:53:14.261327 Write Rank1 MR3 =0x30
763 09:53:14.261423 Write Rank1 MR13 =0x58
764 09:53:14.264682 Write Rank1 MR12 =0x5d
765 09:53:14.268166 Write Rank1 MR1 =0x56
766 09:53:14.268637 Write Rank1 MR2 =0x2d
767 09:53:14.271960 Write Rank1 MR11 =0x23
768 09:53:14.272346 Write Rank1 MR22 =0x34
769 09:53:14.274968 Write Rank1 MR14 =0x10
770 09:53:14.277816 Write Rank1 MR3 =0x30
771 09:53:14.278206 Write Rank1 MR13 =0xd8
772 09:53:14.281591 match AC timing 3
773 09:53:14.291934 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
774 09:53:14.292451 DramC Write-DBI off
775 09:53:14.295414 DramC Read-DBI off
776 09:53:14.295925 Write Rank0 MR13 =0x59
777 09:53:14.296259 ==
778 09:53:14.301696 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
779 09:53:14.304882 fsp= 1, odt_onoff= 1, Byte mode= 0
780 09:53:14.305385 ==
781 09:53:14.308405 === u2Vref_new: 0x56 --> 0x2d
782 09:53:14.311142 === u2Vref_new: 0x58 --> 0x38
783 09:53:14.314374 === u2Vref_new: 0x5a --> 0x39
784 09:53:14.318006 === u2Vref_new: 0x5c --> 0x3c
785 09:53:14.320887 === u2Vref_new: 0x5e --> 0x3d
786 09:53:14.321394 === u2Vref_new: 0x60 --> 0xa0
787 09:53:14.324544 [CA 0] Center 34 (6~63) winsize 58
788 09:53:14.328344 [CA 1] Center 35 (8~63) winsize 56
789 09:53:14.331639 [CA 2] Center 30 (1~59) winsize 59
790 09:53:14.334693 [CA 3] Center 25 (-3~53) winsize 57
791 09:53:14.337977 [CA 4] Center 25 (-2~53) winsize 56
792 09:53:14.341603 [CA 5] Center 31 (2~60) winsize 59
793 09:53:14.342116
794 09:53:14.344320 [CATrainingPosCal] consider 1 rank data
795 09:53:14.347599 u2DelayCellTimex100 = 744/100 ps
796 09:53:14.351149 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
797 09:53:14.354180 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
798 09:53:14.360971 CA2 delay=30 (1~59),Diff = 5 PI (6 cell)
799 09:53:14.364273 CA3 delay=25 (-3~53),Diff = 0 PI (0 cell)
800 09:53:14.367512 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
801 09:53:14.370893 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
802 09:53:14.371324
803 09:53:14.373946 CA PerBit enable=1, Macro0, CA PI delay=25
804 09:53:14.377391 === u2Vref_new: 0x5e --> 0x3d
805 09:53:14.377953
806 09:53:14.380870 Vref(ca) range 1: 30
807 09:53:14.381376
808 09:53:14.381750 CS Dly= 7 (38-0-32)
809 09:53:14.383962 Write Rank0 MR13 =0xd8
810 09:53:14.384467 Write Rank0 MR13 =0xd8
811 09:53:14.387546 Write Rank0 MR12 =0x5e
812 09:53:14.390883 Write Rank1 MR13 =0x59
813 09:53:14.391389 ==
814 09:53:14.394055 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
815 09:53:14.397745 fsp= 1, odt_onoff= 1, Byte mode= 0
816 09:53:14.398250 ==
817 09:53:14.400701 === u2Vref_new: 0x56 --> 0x2d
818 09:53:14.404241 === u2Vref_new: 0x58 --> 0x38
819 09:53:14.407312 === u2Vref_new: 0x5a --> 0x39
820 09:53:14.410423 === u2Vref_new: 0x5c --> 0x3c
821 09:53:14.414035 === u2Vref_new: 0x5e --> 0x3d
822 09:53:14.416979 === u2Vref_new: 0x60 --> 0xa0
823 09:53:14.420210 [CA 0] Center 36 (9~63) winsize 55
824 09:53:14.423795 [CA 1] Center 35 (8~63) winsize 56
825 09:53:14.426936 [CA 2] Center 30 (2~59) winsize 58
826 09:53:14.430477 [CA 3] Center 25 (-2~53) winsize 56
827 09:53:14.433604 [CA 4] Center 26 (-2~54) winsize 57
828 09:53:14.436946 [CA 5] Center 32 (2~62) winsize 61
829 09:53:14.437440
830 09:53:14.439971 [CATrainingPosCal] consider 2 rank data
831 09:53:14.443249 u2DelayCellTimex100 = 744/100 ps
832 09:53:14.446626 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
833 09:53:14.449838 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
834 09:53:14.452935 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
835 09:53:14.456730 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
836 09:53:14.460041 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
837 09:53:14.462968 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
838 09:53:14.463355
839 09:53:14.469808 CA PerBit enable=1, Macro0, CA PI delay=25
840 09:53:14.470198 === u2Vref_new: 0x5c --> 0x3c
841 09:53:14.470501
842 09:53:14.473054 Vref(ca) range 1: 28
843 09:53:14.473440
844 09:53:14.476422 CS Dly= 6 (37-0-32)
845 09:53:14.476830 Write Rank1 MR13 =0xd8
846 09:53:14.479838 Write Rank1 MR13 =0xd8
847 09:53:14.483248 Write Rank1 MR12 =0x5c
848 09:53:14.486328 [RankSwap] Rank num 2, (Multi 1), Rank 0
849 09:53:14.486719 Write Rank0 MR2 =0xad
850 09:53:14.489815 [Write Leveling]
851 09:53:14.492774 delay byte0 byte1 byte2 byte3
852 09:53:14.493236
853 09:53:14.493581 10 0 0
854 09:53:14.493887 11 0 0
855 09:53:14.496350 12 0 0
856 09:53:14.496740 13 0 0
857 09:53:14.499747 14 0 0
858 09:53:14.500153 15 0 0
859 09:53:14.502935 16 0 0
860 09:53:14.503327 17 0 0
861 09:53:14.503634 18 0 0
862 09:53:14.506406 19 0 0
863 09:53:14.506799 20 0 0
864 09:53:14.509660 21 0 0
865 09:53:14.510055 22 0 ff
866 09:53:14.512827 23 0 ff
867 09:53:14.513220 24 0 ff
868 09:53:14.513525 25 0 ff
869 09:53:14.516233 26 0 ff
870 09:53:14.516624 27 0 ff
871 09:53:14.519149 28 0 ff
872 09:53:14.519540 29 0 ff
873 09:53:14.523161 30 0 ff
874 09:53:14.523635 31 0 ff
875 09:53:14.526490 32 ff ff
876 09:53:14.526966 33 ff ff
877 09:53:14.527276 34 ff ff
878 09:53:14.529588 35 ff ff
879 09:53:14.530071 36 ff ff
880 09:53:14.532865 37 ff ff
881 09:53:14.533341 38 ff ff
882 09:53:14.539190 pass bytecount = 0xff (0xff: all bytes pass)
883 09:53:14.539658
884 09:53:14.539964 DQS0 dly: 32
885 09:53:14.540247 DQS1 dly: 22
886 09:53:14.542623 Write Rank0 MR2 =0x2d
887 09:53:14.545511 [RankSwap] Rank num 2, (Multi 1), Rank 0
888 09:53:14.549160 Write Rank0 MR1 =0xd6
889 09:53:14.549856 [Gating]
890 09:53:14.550187 ==
891 09:53:14.555613 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
892 09:53:14.558546 fsp= 1, odt_onoff= 1, Byte mode= 0
893 09:53:14.558937 ==
894 09:53:14.562206 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
895 09:53:14.565407 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
896 09:53:14.572147 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
897 09:53:14.575278 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
898 09:53:14.578687 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
899 09:53:14.585367 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
900 09:53:14.588844 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
901 09:53:14.592118 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
902 09:53:14.595181 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
903 09:53:14.601534 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
904 09:53:14.605137 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
905 09:53:14.608468 3 2 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
906 09:53:14.614822 3 2 16 |3d3d 909 |(11 11)(11 11) |(1 1)(0 0)| 0
907 09:53:14.618829 3 2 20 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
908 09:53:14.621746 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
909 09:53:14.628604 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
910 09:53:14.631772 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
911 09:53:14.634861 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
912 09:53:14.641695 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
913 09:53:14.644872 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
914 09:53:14.647861 3 3 16 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
915 09:53:14.654882 3 3 20 |1a19 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 09:53:14.657522 [Byte 0] Lead/lag Transition tap number (1)
917 09:53:14.660728 [Byte 1] Lead/lag falling Transition (3, 3, 20)
918 09:53:14.664292 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 09:53:14.670808 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 09:53:14.673860 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 09:53:14.677722 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
922 09:53:14.684090 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
923 09:53:14.687697 3 4 12 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
924 09:53:14.690460 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
925 09:53:14.697179 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
926 09:53:14.700830 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 09:53:14.703656 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 09:53:14.710266 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 09:53:14.713737 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 09:53:14.716974 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 09:53:14.723964 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 09:53:14.726950 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 09:53:14.730156 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 09:53:14.736890 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 09:53:14.740332 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 09:53:14.743856 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 09:53:14.750413 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
938 09:53:14.753706 [Byte 0] Lead/lag falling Transition (3, 6, 4)
939 09:53:14.756671 [Byte 1] Lead/lag falling Transition (3, 6, 4)
940 09:53:14.759603 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
941 09:53:14.766066 [Byte 0] Lead/lag Transition tap number (2)
942 09:53:14.769715 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
943 09:53:14.772935 [Byte 1] Lead/lag Transition tap number (3)
944 09:53:14.776392 3 6 16 |606 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
945 09:53:14.782750 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
946 09:53:14.783273 [Byte 0]First pass (3, 6, 20)
947 09:53:14.789078 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
948 09:53:14.789621 [Byte 1]First pass (3, 6, 24)
949 09:53:14.795972 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 09:53:14.799215 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 09:53:14.802878 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 09:53:14.805458 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 09:53:14.813328 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 09:53:14.816339 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 09:53:14.819486 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 09:53:14.822093 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
957 09:53:14.825898 All bytes gating window > 1UI, Early break!
958 09:53:14.826404
959 09:53:14.829194 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
960 09:53:14.832686
961 09:53:14.835940 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
962 09:53:14.836456
963 09:53:14.836798
964 09:53:14.837105
965 09:53:14.838723 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
966 09:53:14.839155
967 09:53:14.842076 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
968 09:53:14.842510
969 09:53:14.842844
970 09:53:14.845674 Write Rank0 MR1 =0x56
971 09:53:14.846102
972 09:53:14.849048 best RODT dly(2T, 0.5T) = (2, 3)
973 09:53:14.849603
974 09:53:14.852113 best RODT dly(2T, 0.5T) = (2, 3)
975 09:53:14.852548 ==
976 09:53:14.855508 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 09:53:14.859071 fsp= 1, odt_onoff= 1, Byte mode= 0
978 09:53:14.859503 ==
979 09:53:14.865478 Start DQ dly to find pass range UseTestEngine =0
980 09:53:14.868774 x-axis: bit #, y-axis: DQ dly (-127~63)
981 09:53:14.869205 RX Vref Scan = 0
982 09:53:14.872045 -26, [0] xxxxxxxx xxxxxxxx [MSB]
983 09:53:14.875597 -25, [0] xxxxxxxx xxxxxxxx [MSB]
984 09:53:14.878709 -24, [0] xxxxxxxx xxxxxxxx [MSB]
985 09:53:14.882152 -23, [0] xxxxxxxx xxxxxxxx [MSB]
986 09:53:14.885437 -22, [0] xxxxxxxx xxxxxxxx [MSB]
987 09:53:14.888580 -21, [0] xxxxxxxx xxxxxxxx [MSB]
988 09:53:14.889195 -20, [0] xxxxxxxx xxxxxxxx [MSB]
989 09:53:14.891276 -19, [0] xxxxxxxx xxxxxxxx [MSB]
990 09:53:14.894953 -18, [0] xxxxxxxx xxxxxxxx [MSB]
991 09:53:14.898114 -17, [0] xxxxxxxx xxxxxxxx [MSB]
992 09:53:14.901263 -16, [0] xxxxxxxx xxxxxxxx [MSB]
993 09:53:14.904540 -15, [0] xxxxxxxx xxxxxxxx [MSB]
994 09:53:14.908082 -14, [0] xxxxxxxx xxxxxxxx [MSB]
995 09:53:14.911466 -13, [0] xxxxxxxx xxxxxxxx [MSB]
996 09:53:14.914451 -12, [0] xxxxxxxx xxxxxxxx [MSB]
997 09:53:14.914849 -11, [0] xxxxxxxx xxxxxxxx [MSB]
998 09:53:14.918081 -10, [0] xxxxxxxx xxxxxxxx [MSB]
999 09:53:14.921466 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1000 09:53:14.924782 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1001 09:53:14.928198 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1002 09:53:14.931498 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1003 09:53:14.934323 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1004 09:53:14.937650 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1005 09:53:14.938092 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1006 09:53:14.940975 -2, [0] xxxoxxxx oxxxxxxx [MSB]
1007 09:53:14.944202 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1008 09:53:14.947675 0, [0] xxxoxoxx ooxoxxxx [MSB]
1009 09:53:14.950711 1, [0] xxxoxoox ooxooxxx [MSB]
1010 09:53:14.954093 2, [0] xxxoxoox ooxoooxx [MSB]
1011 09:53:14.957176 3, [0] xxxoxooo ooxoooox [MSB]
1012 09:53:14.957644 4, [0] xoxoxooo ooxoooox [MSB]
1013 09:53:14.961029 5, [0] xoxooooo ooxooooo [MSB]
1014 09:53:14.963735 6, [0] xooooooo ooxooooo [MSB]
1015 09:53:14.967165 7, [0] oooooooo ooxooooo [MSB]
1016 09:53:14.970458 33, [0] oooxoooo oooooooo [MSB]
1017 09:53:14.973627 34, [0] oooxoxoo oooooooo [MSB]
1018 09:53:14.977190 35, [0] oooxoxoo xooxoooo [MSB]
1019 09:53:14.977760 36, [0] oooxoxoo xxoxoooo [MSB]
1020 09:53:14.980770 37, [0] oooxoxoo xxoxxxoo [MSB]
1021 09:53:14.983429 38, [0] oooxoxxx xxoxxxxo [MSB]
1022 09:53:14.987235 39, [0] xxoxoxxx xxoxxxxo [MSB]
1023 09:53:14.990400 40, [0] xxoxoxxx xxoxxxxo [MSB]
1024 09:53:14.993864 41, [0] xxxxxxxx xxoxxxxx [MSB]
1025 09:53:14.997134 42, [0] xxxxxxxx xxoxxxxx [MSB]
1026 09:53:14.997722 43, [0] xxxxxxxx xxxxxxxx [MSB]
1027 09:53:15.000382 iDelay=43, Bit 0, Center 22 (7 ~ 38) 32
1028 09:53:15.006475 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
1029 09:53:15.010165 iDelay=43, Bit 2, Center 23 (6 ~ 40) 35
1030 09:53:15.013411 iDelay=43, Bit 3, Center 14 (-3 ~ 32) 36
1031 09:53:15.016680 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
1032 09:53:15.019785 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
1033 09:53:15.023632 iDelay=43, Bit 6, Center 19 (1 ~ 37) 37
1034 09:53:15.026378 iDelay=43, Bit 7, Center 20 (3 ~ 37) 35
1035 09:53:15.029592 iDelay=43, Bit 8, Center 16 (-2 ~ 34) 37
1036 09:53:15.033198 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
1037 09:53:15.036244 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1038 09:53:15.039824 iDelay=43, Bit 11, Center 16 (-1 ~ 34) 36
1039 09:53:15.046507 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
1040 09:53:15.049003 iDelay=43, Bit 13, Center 19 (2 ~ 36) 35
1041 09:53:15.052988 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
1042 09:53:15.055718 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
1043 09:53:15.056191 ==
1044 09:53:15.058783 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1045 09:53:15.062100 fsp= 1, odt_onoff= 1, Byte mode= 0
1046 09:53:15.066040 ==
1047 09:53:15.066472 DQS Delay:
1048 09:53:15.066805 DQS0 = 0, DQS1 = 0
1049 09:53:15.069163 DQM Delay:
1050 09:53:15.069635 DQM0 = 19, DQM1 = 19
1051 09:53:15.072506 DQ Delay:
1052 09:53:15.072949 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14
1053 09:53:15.075957 DQ4 =22, DQ5 =16, DQ6 =19, DQ7 =20
1054 09:53:15.078964 DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =16
1055 09:53:15.082043 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =22
1056 09:53:15.085242
1057 09:53:15.085772
1058 09:53:15.086247 DramC Write-DBI off
1059 09:53:15.086541 ==
1060 09:53:15.091988 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1061 09:53:15.095338 fsp= 1, odt_onoff= 1, Byte mode= 0
1062 09:53:15.095832 ==
1063 09:53:15.098707 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1064 09:53:15.099104
1065 09:53:15.101911 Begin, DQ Scan Range 918~1174
1066 09:53:15.102300
1067 09:53:15.102604
1068 09:53:15.105637 TX Vref Scan disable
1069 09:53:15.108511 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1070 09:53:15.111974 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1071 09:53:15.114860 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1072 09:53:15.118512 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1073 09:53:15.121865 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1074 09:53:15.124924 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1075 09:53:15.128452 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1076 09:53:15.131408 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1077 09:53:15.135207 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1078 09:53:15.137923 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1079 09:53:15.141643 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1080 09:53:15.144951 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1081 09:53:15.151742 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1082 09:53:15.154968 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1083 09:53:15.157948 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1084 09:53:15.161093 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1085 09:53:15.164881 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1086 09:53:15.168365 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1087 09:53:15.171443 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1088 09:53:15.174883 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1089 09:53:15.178062 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1090 09:53:15.181479 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1091 09:53:15.184673 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1092 09:53:15.188022 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1093 09:53:15.190927 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1094 09:53:15.197542 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1095 09:53:15.200910 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1096 09:53:15.204250 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1097 09:53:15.207395 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1098 09:53:15.210350 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1099 09:53:15.213987 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1100 09:53:15.217198 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1101 09:53:15.220402 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1102 09:53:15.224142 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1103 09:53:15.227102 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1104 09:53:15.230342 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1105 09:53:15.233724 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1106 09:53:15.236589 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1107 09:53:15.243202 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1108 09:53:15.246935 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1109 09:53:15.249738 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1110 09:53:15.253029 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1111 09:53:15.256753 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1112 09:53:15.260095 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1113 09:53:15.263566 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1114 09:53:15.266606 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1115 09:53:15.269659 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1116 09:53:15.272875 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1117 09:53:15.276615 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1118 09:53:15.279537 967 |3 6 7|[0] xxxxxxxx oxxxxxxx [MSB]
1119 09:53:15.282683 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1120 09:53:15.285987 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1121 09:53:15.289756 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1122 09:53:15.292805 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1123 09:53:15.296186 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1124 09:53:15.299951 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1125 09:53:15.303052 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1126 09:53:15.309649 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1127 09:53:15.312829 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1128 09:53:15.316240 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1129 09:53:15.319389 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1130 09:53:15.322218 979 |3 6 19|[0] xxxoooox oooooooo [MSB]
1131 09:53:15.325617 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1132 09:53:15.329726 981 |3 6 21|[0] xooooooo oooooooo [MSB]
1133 09:53:15.332188 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1134 09:53:15.335966 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1135 09:53:15.339142 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1136 09:53:15.342105 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1137 09:53:15.348642 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1138 09:53:15.352263 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1139 09:53:15.355595 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1140 09:53:15.358567 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1141 09:53:15.362312 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1142 09:53:15.365206 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1143 09:53:15.368693 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1144 09:53:15.372263 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1145 09:53:15.375424 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1146 09:53:15.378422 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1147 09:53:15.381621 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1148 09:53:15.385004 Byte0, DQ PI dly=988, DQM PI dly= 988
1149 09:53:15.392144 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1150 09:53:15.392754
1151 09:53:15.394952 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1152 09:53:15.395377
1153 09:53:15.398221 Byte1, DQ PI dly=977, DQM PI dly= 977
1154 09:53:15.401453 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1155 09:53:15.401905
1156 09:53:15.408215 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1157 09:53:15.408727
1158 09:53:15.409064 ==
1159 09:53:15.411639 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1160 09:53:15.414717 fsp= 1, odt_onoff= 1, Byte mode= 0
1161 09:53:15.415225 ==
1162 09:53:15.421637 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1163 09:53:15.422150
1164 09:53:15.424791 Begin, DQ Scan Range 953~1017
1165 09:53:15.425294 Write Rank0 MR14 =0x0
1166 09:53:15.434159
1167 09:53:15.434719 CH=0, VrefRange= 0, VrefLevel = 0
1168 09:53:15.440732 TX Bit0 (984~998) 15 991, Bit8 (971~981) 11 976,
1169 09:53:15.443877 TX Bit1 (983~995) 13 989, Bit9 (973~982) 10 977,
1170 09:53:15.450892 TX Bit2 (984~996) 13 990, Bit10 (976~986) 11 981,
1171 09:53:15.453838 TX Bit3 (977~990) 14 983, Bit11 (971~981) 11 976,
1172 09:53:15.457373 TX Bit4 (983~992) 10 987, Bit12 (973~982) 10 977,
1173 09:53:15.463748 TX Bit5 (980~990) 11 985, Bit13 (973~982) 10 977,
1174 09:53:15.466944 TX Bit6 (982~992) 11 987, Bit14 (973~984) 12 978,
1175 09:53:15.473894 TX Bit7 (983~992) 10 987, Bit15 (974~989) 16 981,
1176 09:53:15.474367
1177 09:53:15.474706 Write Rank0 MR14 =0x2
1178 09:53:15.482927
1179 09:53:15.483358 CH=0, VrefRange= 0, VrefLevel = 2
1180 09:53:15.490029 TX Bit0 (984~998) 15 991, Bit8 (971~981) 11 976,
1181 09:53:15.493053 TX Bit1 (982~996) 15 989, Bit9 (971~983) 13 977,
1182 09:53:15.499822 TX Bit2 (983~997) 15 990, Bit10 (975~988) 14 981,
1183 09:53:15.502553 TX Bit3 (977~991) 15 984, Bit11 (971~981) 11 976,
1184 09:53:15.506121 TX Bit4 (983~993) 11 988, Bit12 (972~983) 12 977,
1185 09:53:15.512685 TX Bit5 (980~991) 12 985, Bit13 (973~982) 10 977,
1186 09:53:15.515778 TX Bit6 (981~993) 13 987, Bit14 (972~986) 15 979,
1187 09:53:15.522315 TX Bit7 (983~993) 11 988, Bit15 (974~989) 16 981,
1188 09:53:15.522744
1189 09:53:15.523075 Write Rank0 MR14 =0x4
1190 09:53:15.531932
1191 09:53:15.532316 CH=0, VrefRange= 0, VrefLevel = 4
1192 09:53:15.539041 TX Bit0 (984~998) 15 991, Bit8 (970~982) 13 976,
1193 09:53:15.541746 TX Bit1 (982~997) 16 989, Bit9 (972~983) 12 977,
1194 09:53:15.548299 TX Bit2 (983~998) 16 990, Bit10 (975~989) 15 982,
1195 09:53:15.600304 TX Bit3 (977~991) 15 984, Bit11 (971~982) 12 976,
1196 09:53:15.600827 TX Bit4 (983~994) 12 988, Bit12 (972~983) 12 977,
1197 09:53:15.601169 TX Bit5 (979~992) 14 985, Bit13 (972~983) 12 977,
1198 09:53:15.601481 TX Bit6 (980~994) 15 987, Bit14 (972~986) 15 979,
1199 09:53:15.601812 TX Bit7 (982~995) 14 988, Bit15 (974~989) 16 981,
1200 09:53:15.602098
1201 09:53:15.602382 Write Rank0 MR14 =0x6
1202 09:53:15.602986
1203 09:53:15.603308 CH=0, VrefRange= 0, VrefLevel = 6
1204 09:53:15.603595 TX Bit0 (983~999) 17 991, Bit8 (969~982) 14 975,
1205 09:53:15.603881 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
1206 09:53:15.604160 TX Bit2 (983~998) 16 990, Bit10 (975~989) 15 982,
1207 09:53:15.604436 TX Bit3 (976~992) 17 984, Bit11 (970~982) 13 976,
1208 09:53:15.615495 TX Bit4 (982~995) 14 988, Bit12 (971~984) 14 977,
1209 09:53:15.616004 TX Bit5 (978~992) 15 985, Bit13 (972~983) 12 977,
1210 09:53:15.619079 TX Bit6 (980~995) 16 987, Bit14 (971~987) 17 979,
1211 09:53:15.622728 TX Bit7 (981~996) 16 988, Bit15 (974~989) 16 981,
1212 09:53:15.623240
1213 09:53:15.623575 Write Rank0 MR14 =0x8
1214 09:53:15.630535
1215 09:53:15.631126 CH=0, VrefRange= 0, VrefLevel = 8
1216 09:53:15.636751 TX Bit0 (983~999) 17 991, Bit8 (968~982) 15 975,
1217 09:53:15.640406 TX Bit1 (981~998) 18 989, Bit9 (971~985) 15 978,
1218 09:53:15.647146 TX Bit2 (983~999) 17 991, Bit10 (974~990) 17 982,
1219 09:53:15.650072 TX Bit3 (976~992) 17 984, Bit11 (970~983) 14 976,
1220 09:53:15.653171 TX Bit4 (982~996) 15 989, Bit12 (971~985) 15 978,
1221 09:53:15.659851 TX Bit5 (978~994) 17 986, Bit13 (971~984) 14 977,
1222 09:53:15.663308 TX Bit6 (979~995) 17 987, Bit14 (971~988) 18 979,
1223 09:53:15.669371 TX Bit7 (981~997) 17 989, Bit15 (974~990) 17 982,
1224 09:53:15.669890
1225 09:53:15.670225 Write Rank0 MR14 =0xa
1226 09:53:15.679996
1227 09:53:15.683358 CH=0, VrefRange= 0, VrefLevel = 10
1228 09:53:15.686251 TX Bit0 (983~1000) 18 991, Bit8 (968~983) 16 975,
1229 09:53:15.689424 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
1230 09:53:15.696374 TX Bit2 (982~999) 18 990, Bit10 (974~990) 17 982,
1231 09:53:15.699708 TX Bit3 (976~993) 18 984, Bit11 (969~983) 15 976,
1232 09:53:15.702520 TX Bit4 (981~997) 17 989, Bit12 (970~986) 17 978,
1233 09:53:15.709743 TX Bit5 (978~993) 16 985, Bit13 (970~985) 16 977,
1234 09:53:15.712546 TX Bit6 (978~997) 20 987, Bit14 (971~988) 18 979,
1235 09:53:15.719148 TX Bit7 (981~997) 17 989, Bit15 (973~991) 19 982,
1236 09:53:15.719661
1237 09:53:15.719995 Write Rank0 MR14 =0xc
1238 09:53:15.729631
1239 09:53:15.733012 CH=0, VrefRange= 0, VrefLevel = 12
1240 09:53:15.736052 TX Bit0 (983~1000) 18 991, Bit8 (967~984) 18 975,
1241 09:53:15.738964 TX Bit1 (980~999) 20 989, Bit9 (969~986) 18 977,
1242 09:53:15.745882 TX Bit2 (982~1000) 19 991, Bit10 (974~991) 18 982,
1243 09:53:15.748660 TX Bit3 (976~993) 18 984, Bit11 (968~984) 17 976,
1244 09:53:15.752472 TX Bit4 (980~997) 18 988, Bit12 (969~986) 18 977,
1245 09:53:15.758585 TX Bit5 (978~994) 17 986, Bit13 (970~985) 16 977,
1246 09:53:15.762117 TX Bit6 (978~997) 20 987, Bit14 (970~989) 20 979,
1247 09:53:15.768645 TX Bit7 (981~998) 18 989, Bit15 (973~991) 19 982,
1248 09:53:15.769085
1249 09:53:15.769703 Write Rank0 MR14 =0xe
1250 09:53:15.779114
1251 09:53:15.782391 CH=0, VrefRange= 0, VrefLevel = 14
1252 09:53:15.785636 TX Bit0 (982~1000) 19 991, Bit8 (967~984) 18 975,
1253 09:53:15.788738 TX Bit1 (980~1000) 21 990, Bit9 (969~987) 19 978,
1254 09:53:15.795660 TX Bit2 (981~1000) 20 990, Bit10 (974~991) 18 982,
1255 09:53:15.798382 TX Bit3 (976~994) 19 985, Bit11 (968~984) 17 976,
1256 09:53:15.801888 TX Bit4 (980~998) 19 989, Bit12 (969~988) 20 978,
1257 09:53:15.808315 TX Bit5 (977~996) 20 986, Bit13 (970~986) 17 978,
1258 09:53:15.811720 TX Bit6 (978~998) 21 988, Bit14 (971~989) 19 980,
1259 09:53:15.818457 TX Bit7 (980~998) 19 989, Bit15 (973~991) 19 982,
1260 09:53:15.818966
1261 09:53:15.819301 Write Rank0 MR14 =0x10
1262 09:53:15.829295
1263 09:53:15.831974 CH=0, VrefRange= 0, VrefLevel = 16
1264 09:53:15.835190 TX Bit0 (982~1001) 20 991, Bit8 (967~984) 18 975,
1265 09:53:15.838556 TX Bit1 (980~1000) 21 990, Bit9 (969~988) 20 978,
1266 09:53:15.845108 TX Bit2 (981~1000) 20 990, Bit10 (973~992) 20 982,
1267 09:53:15.848545 TX Bit3 (975~994) 20 984, Bit11 (968~985) 18 976,
1268 09:53:15.855244 TX Bit4 (980~998) 19 989, Bit12 (969~988) 20 978,
1269 09:53:15.858189 TX Bit5 (977~996) 20 986, Bit13 (970~987) 18 978,
1270 09:53:15.861973 TX Bit6 (977~998) 22 987, Bit14 (969~989) 21 979,
1271 09:53:15.867963 TX Bit7 (979~998) 20 988, Bit15 (972~992) 21 982,
1272 09:53:15.868393
1273 09:53:15.868725 Write Rank0 MR14 =0x12
1274 09:53:15.878846
1275 09:53:15.882213 CH=0, VrefRange= 0, VrefLevel = 18
1276 09:53:15.885487 TX Bit0 (982~1001) 20 991, Bit8 (967~985) 19 976,
1277 09:53:15.889148 TX Bit1 (979~1000) 22 989, Bit9 (968~988) 21 978,
1278 09:53:15.894961 TX Bit2 (981~1001) 21 991, Bit10 (973~992) 20 982,
1279 09:53:15.898196 TX Bit3 (975~994) 20 984, Bit11 (967~986) 20 976,
1280 09:53:15.902097 TX Bit4 (979~999) 21 989, Bit12 (968~989) 22 978,
1281 09:53:15.908681 TX Bit5 (977~997) 21 987, Bit13 (969~988) 20 978,
1282 09:53:15.911587 TX Bit6 (977~999) 23 988, Bit14 (969~989) 21 979,
1283 09:53:15.918769 TX Bit7 (980~999) 20 989, Bit15 (973~993) 21 983,
1284 09:53:15.919282
1285 09:53:15.919616 Write Rank0 MR14 =0x14
1286 09:53:15.928710
1287 09:53:15.932028 CH=0, VrefRange= 0, VrefLevel = 20
1288 09:53:15.935220 TX Bit0 (981~1001) 21 991, Bit8 (966~987) 22 976,
1289 09:53:15.938523 TX Bit1 (979~1001) 23 990, Bit9 (968~989) 22 978,
1290 09:53:15.945190 TX Bit2 (980~1001) 22 990, Bit10 (973~993) 21 983,
1291 09:53:15.948368 TX Bit3 (975~995) 21 985, Bit11 (967~987) 21 977,
1292 09:53:15.951374 TX Bit4 (979~999) 21 989, Bit12 (968~989) 22 978,
1293 09:53:15.958005 TX Bit5 (977~997) 21 987, Bit13 (968~989) 22 978,
1294 09:53:15.961255 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
1295 09:53:15.967931 TX Bit7 (979~1000) 22 989, Bit15 (973~993) 21 983,
1296 09:53:15.968428
1297 09:53:15.968768 Write Rank0 MR14 =0x16
1298 09:53:15.979123
1299 09:53:15.982119 CH=0, VrefRange= 0, VrefLevel = 22
1300 09:53:15.985628 TX Bit0 (981~1003) 23 992, Bit8 (966~987) 22 976,
1301 09:53:15.989029 TX Bit1 (979~1001) 23 990, Bit9 (967~989) 23 978,
1302 09:53:15.995202 TX Bit2 (981~1002) 22 991, Bit10 (973~994) 22 983,
1303 09:53:15.998906 TX Bit3 (975~996) 22 985, Bit11 (967~987) 21 977,
1304 09:53:16.002254 TX Bit4 (978~999) 22 988, Bit12 (967~990) 24 978,
1305 09:53:16.009103 TX Bit5 (977~998) 22 987, Bit13 (969~989) 21 979,
1306 09:53:16.011909 TX Bit6 (977~999) 23 988, Bit14 (968~990) 23 979,
1307 09:53:16.018209 TX Bit7 (978~999) 22 988, Bit15 (972~993) 22 982,
1308 09:53:16.018641
1309 09:53:16.018972 Write Rank0 MR14 =0x18
1310 09:53:16.029338
1311 09:53:16.032560 CH=0, VrefRange= 0, VrefLevel = 24
1312 09:53:16.035740 TX Bit0 (980~1003) 24 991, Bit8 (966~988) 23 977,
1313 09:53:16.039272 TX Bit1 (979~1001) 23 990, Bit9 (967~989) 23 978,
1314 09:53:16.045366 TX Bit2 (979~1002) 24 990, Bit10 (973~995) 23 984,
1315 09:53:16.048780 TX Bit3 (975~997) 23 986, Bit11 (966~988) 23 977,
1316 09:53:16.052185 TX Bit4 (978~1000) 23 989, Bit12 (967~990) 24 978,
1317 09:53:16.058487 TX Bit5 (977~998) 22 987, Bit13 (968~989) 22 978,
1318 09:53:16.062346 TX Bit6 (977~999) 23 988, Bit14 (968~991) 24 979,
1319 09:53:16.068266 TX Bit7 (978~1000) 23 989, Bit15 (971~994) 24 982,
1320 09:53:16.068701
1321 09:53:16.069036 Write Rank0 MR14 =0x1a
1322 09:53:16.079384
1323 09:53:16.083452 CH=0, VrefRange= 0, VrefLevel = 26
1324 09:53:16.086257 TX Bit0 (980~1003) 24 991, Bit8 (966~988) 23 977,
1325 09:53:16.089343 TX Bit1 (978~1002) 25 990, Bit9 (967~989) 23 978,
1326 09:53:16.096112 TX Bit2 (979~1003) 25 991, Bit10 (972~995) 24 983,
1327 09:53:16.099602 TX Bit3 (974~998) 25 986, Bit11 (966~989) 24 977,
1328 09:53:16.106121 TX Bit4 (978~1001) 24 989, Bit12 (967~990) 24 978,
1329 09:53:16.109174 TX Bit5 (976~998) 23 987, Bit13 (968~989) 22 978,
1330 09:53:16.112701 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
1331 09:53:16.119324 TX Bit7 (978~1001) 24 989, Bit15 (971~994) 24 982,
1332 09:53:16.119762
1333 09:53:16.120129 Write Rank0 MR14 =0x1c
1334 09:53:16.130365
1335 09:53:16.133601 CH=0, VrefRange= 0, VrefLevel = 28
1336 09:53:16.136766 TX Bit0 (980~1004) 25 992, Bit8 (965~988) 24 976,
1337 09:53:16.139969 TX Bit1 (978~1002) 25 990, Bit9 (967~989) 23 978,
1338 09:53:16.146366 TX Bit2 (979~1003) 25 991, Bit10 (972~996) 25 984,
1339 09:53:16.149935 TX Bit3 (974~997) 24 985, Bit11 (966~989) 24 977,
1340 09:53:16.153289 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1341 09:53:16.159970 TX Bit5 (976~999) 24 987, Bit13 (967~990) 24 978,
1342 09:53:16.163181 TX Bit6 (976~1000) 25 988, Bit14 (967~991) 25 979,
1343 09:53:16.170166 TX Bit7 (978~1001) 24 989, Bit15 (970~994) 25 982,
1344 09:53:16.170643
1345 09:53:16.170945 Write Rank0 MR14 =0x1e
1346 09:53:16.180686
1347 09:53:16.183656 CH=0, VrefRange= 0, VrefLevel = 30
1348 09:53:16.187503 TX Bit0 (979~1003) 25 991, Bit8 (965~988) 24 976,
1349 09:53:16.190644 TX Bit1 (978~1003) 26 990, Bit9 (967~989) 23 978,
1350 09:53:16.197148 TX Bit2 (979~1003) 25 991, Bit10 (972~995) 24 983,
1351 09:53:16.200445 TX Bit3 (974~997) 24 985, Bit11 (966~989) 24 977,
1352 09:53:16.204207 TX Bit4 (977~1002) 26 989, Bit12 (967~990) 24 978,
1353 09:53:16.210877 TX Bit5 (976~999) 24 987, Bit13 (967~990) 24 978,
1354 09:53:16.214079 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
1355 09:53:16.220655 TX Bit7 (978~1002) 25 990, Bit15 (970~994) 25 982,
1356 09:53:16.221169
1357 09:53:16.221504 Write Rank0 MR14 =0x20
1358 09:53:16.231782
1359 09:53:16.234870 CH=0, VrefRange= 0, VrefLevel = 32
1360 09:53:16.238066 TX Bit0 (979~1003) 25 991, Bit8 (965~988) 24 976,
1361 09:53:16.241070 TX Bit1 (978~1003) 26 990, Bit9 (967~989) 23 978,
1362 09:53:16.248060 TX Bit2 (979~1003) 25 991, Bit10 (972~995) 24 983,
1363 09:53:16.251231 TX Bit3 (974~997) 24 985, Bit11 (966~989) 24 977,
1364 09:53:16.254831 TX Bit4 (977~1002) 26 989, Bit12 (967~990) 24 978,
1365 09:53:16.261151 TX Bit5 (976~999) 24 987, Bit13 (967~990) 24 978,
1366 09:53:16.264630 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
1367 09:53:16.271334 TX Bit7 (978~1002) 25 990, Bit15 (970~994) 25 982,
1368 09:53:16.271770
1369 09:53:16.272101 Write Rank0 MR14 =0x22
1370 09:53:16.282033
1371 09:53:16.285010 CH=0, VrefRange= 0, VrefLevel = 34
1372 09:53:16.288760 TX Bit0 (979~1003) 25 991, Bit8 (965~988) 24 976,
1373 09:53:16.292082 TX Bit1 (978~1003) 26 990, Bit9 (967~989) 23 978,
1374 09:53:16.298220 TX Bit2 (979~1003) 25 991, Bit10 (972~995) 24 983,
1375 09:53:16.301796 TX Bit3 (974~997) 24 985, Bit11 (966~989) 24 977,
1376 09:53:16.308248 TX Bit4 (977~1002) 26 989, Bit12 (967~990) 24 978,
1377 09:53:16.311641 TX Bit5 (976~999) 24 987, Bit13 (967~990) 24 978,
1378 09:53:16.314981 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
1379 09:53:16.321759 TX Bit7 (978~1002) 25 990, Bit15 (970~994) 25 982,
1380 09:53:16.322223
1381 09:53:16.322529 Write Rank0 MR14 =0x24
1382 09:53:16.332788
1383 09:53:16.335624 CH=0, VrefRange= 0, VrefLevel = 36
1384 09:53:16.339212 TX Bit0 (979~1003) 25 991, Bit8 (965~988) 24 976,
1385 09:53:16.342237 TX Bit1 (978~1003) 26 990, Bit9 (967~989) 23 978,
1386 09:53:16.349751 TX Bit2 (979~1003) 25 991, Bit10 (972~995) 24 983,
1387 09:53:16.352946 TX Bit3 (974~997) 24 985, Bit11 (966~989) 24 977,
1388 09:53:16.356073 TX Bit4 (977~1002) 26 989, Bit12 (967~990) 24 978,
1389 09:53:16.361890 TX Bit5 (976~999) 24 987, Bit13 (967~990) 24 978,
1390 09:53:16.365510 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
1391 09:53:16.372257 TX Bit7 (978~1002) 25 990, Bit15 (970~994) 25 982,
1392 09:53:16.372770
1393 09:53:16.373103
1394 09:53:16.375798 TX Vref found, early break! 366< 372
1395 09:53:16.378908 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1396 09:53:16.382449 u1DelayCellOfst[0]=7 cells (6 PI)
1397 09:53:16.385723 u1DelayCellOfst[1]=6 cells (5 PI)
1398 09:53:16.388564 u1DelayCellOfst[2]=7 cells (6 PI)
1399 09:53:16.391995 u1DelayCellOfst[3]=0 cells (0 PI)
1400 09:53:16.395391 u1DelayCellOfst[4]=5 cells (4 PI)
1401 09:53:16.398448 u1DelayCellOfst[5]=2 cells (2 PI)
1402 09:53:16.401668 u1DelayCellOfst[6]=3 cells (3 PI)
1403 09:53:16.406899 u1DelayCellOfst[7]=6 cells (5 PI)
1404 09:53:16.408225 Byte0, DQ PI dly=985, DQM PI dly= 988
1405 09:53:16.412191 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1406 09:53:16.412703
1407 09:53:16.415320 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1408 09:53:16.415755
1409 09:53:16.418199 u1DelayCellOfst[8]=0 cells (0 PI)
1410 09:53:16.422238 u1DelayCellOfst[9]=2 cells (2 PI)
1411 09:53:16.424881 u1DelayCellOfst[10]=9 cells (7 PI)
1412 09:53:16.427957 u1DelayCellOfst[11]=1 cells (1 PI)
1413 09:53:16.431275 u1DelayCellOfst[12]=2 cells (2 PI)
1414 09:53:16.435067 u1DelayCellOfst[13]=2 cells (2 PI)
1415 09:53:16.437691 u1DelayCellOfst[14]=3 cells (3 PI)
1416 09:53:16.441310 u1DelayCellOfst[15]=7 cells (6 PI)
1417 09:53:16.444378 Byte1, DQ PI dly=976, DQM PI dly= 979
1418 09:53:16.447988 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1419 09:53:16.448490
1420 09:53:16.450862 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1421 09:53:16.454298
1422 09:53:16.454809 Write Rank0 MR14 =0x1e
1423 09:53:16.455144
1424 09:53:16.458176 Final TX Range 0 Vref 30
1425 09:53:16.458601
1426 09:53:16.464057 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1427 09:53:16.464607
1428 09:53:16.470711 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1429 09:53:16.477585 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1430 09:53:16.484242 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1431 09:53:16.487304 Write Rank0 MR3 =0xb0
1432 09:53:16.487807 DramC Write-DBI on
1433 09:53:16.488142 ==
1434 09:53:16.493990 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1435 09:53:16.497140 fsp= 1, odt_onoff= 1, Byte mode= 0
1436 09:53:16.497602 ==
1437 09:53:16.500462 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1438 09:53:16.501002
1439 09:53:16.503434 Begin, DQ Scan Range 699~763
1440 09:53:16.503863
1441 09:53:16.504193
1442 09:53:16.506881 TX Vref Scan disable
1443 09:53:16.510050 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1444 09:53:16.513817 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1445 09:53:16.516593 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1446 09:53:16.520554 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1447 09:53:16.523614 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1448 09:53:16.526724 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1449 09:53:16.529867 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1450 09:53:16.533035 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1451 09:53:16.536275 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1452 09:53:16.539912 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1453 09:53:16.543128 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1454 09:53:16.546262 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1455 09:53:16.549423 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1456 09:53:16.555965 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1457 09:53:16.559561 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1458 09:53:16.564121 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1459 09:53:16.565861 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1460 09:53:16.569740 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1461 09:53:16.572547 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1462 09:53:16.576136 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1463 09:53:16.579222 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1464 09:53:16.582178 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1465 09:53:16.590296 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1466 09:53:16.593303 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1467 09:53:16.596572 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1468 09:53:16.599900 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1469 09:53:16.602907 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1470 09:53:16.606505 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1471 09:53:16.609979 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1472 09:53:16.613391 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1473 09:53:16.616468 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1474 09:53:16.620003 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1475 09:53:16.623119 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1476 09:53:16.626159 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1477 09:53:16.629236 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
1478 09:53:16.635842 748 |2 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
1479 09:53:16.639131 Byte0, DQ PI dly=734, DQM PI dly= 734
1480 09:53:16.642717 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
1481 09:53:16.642913
1482 09:53:16.645969 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
1483 09:53:16.646159
1484 09:53:16.649145 Byte1, DQ PI dly=722, DQM PI dly= 722
1485 09:53:16.655695 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1486 09:53:16.655913
1487 09:53:16.658922 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1488 09:53:16.659094
1489 09:53:16.665415 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1490 09:53:16.672033 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1491 09:53:16.678370 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1492 09:53:16.681561 Write Rank0 MR3 =0x30
1493 09:53:16.681660 DramC Write-DBI off
1494 09:53:16.685472
1495 09:53:16.685633 [DATLAT]
1496 09:53:16.688378 Freq=1600, CH0 RK0, use_rxtx_scan=0
1497 09:53:16.688527
1498 09:53:16.688600 DATLAT Default: 0xf
1499 09:53:16.691749 7, 0xFFFF, sum=0
1500 09:53:16.691831 8, 0xFFFF, sum=0
1501 09:53:16.695408 9, 0xFFFF, sum=0
1502 09:53:16.695550 10, 0xFFFF, sum=0
1503 09:53:16.698262 11, 0xFFFF, sum=0
1504 09:53:16.698386 12, 0xFFFF, sum=0
1505 09:53:16.701859 13, 0xFFFF, sum=0
1506 09:53:16.702003 14, 0x0, sum=1
1507 09:53:16.705464 15, 0x0, sum=2
1508 09:53:16.705639 16, 0x0, sum=3
1509 09:53:16.705713 17, 0x0, sum=4
1510 09:53:16.711723 pattern=2 first_step=14 total pass=5 best_step=16
1511 09:53:16.711862 ==
1512 09:53:16.715242 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1513 09:53:16.718205 fsp= 1, odt_onoff= 1, Byte mode= 0
1514 09:53:16.718329 ==
1515 09:53:16.724591 Start DQ dly to find pass range UseTestEngine =1
1516 09:53:16.728067 x-axis: bit #, y-axis: DQ dly (-127~63)
1517 09:53:16.728224 RX Vref Scan = 1
1518 09:53:16.836636
1519 09:53:16.837151 RX Vref found, early break!
1520 09:53:16.837493
1521 09:53:16.843432 Final RX Vref 11, apply to both rank0 and 1
1522 09:53:16.843950 ==
1523 09:53:16.846811 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1524 09:53:16.850233 fsp= 1, odt_onoff= 1, Byte mode= 0
1525 09:53:16.850830 ==
1526 09:53:16.851186 DQS Delay:
1527 09:53:16.853451 DQS0 = 0, DQS1 = 0
1528 09:53:16.854007 DQM Delay:
1529 09:53:16.856444 DQM0 = 19, DQM1 = 18
1530 09:53:16.856956 DQ Delay:
1531 09:53:16.859926 DQ0 =23, DQ1 =21, DQ2 =23, DQ3 =14
1532 09:53:16.862794 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =20
1533 09:53:16.866017 DQ8 =15, DQ9 =16, DQ10 =24, DQ11 =16
1534 09:53:16.869135 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
1535 09:53:16.869611
1536 09:53:16.870037
1537 09:53:16.870435
1538 09:53:16.873021 [DramC_TX_OE_Calibration] TA2
1539 09:53:16.875704 Original DQ_B0 (3 6) =30, OEN = 27
1540 09:53:16.878926 Original DQ_B1 (3 6) =30, OEN = 27
1541 09:53:16.882608 23, 0x0, End_B0=23 End_B1=23
1542 09:53:16.886021 24, 0x0, End_B0=24 End_B1=24
1543 09:53:16.886538 25, 0x0, End_B0=25 End_B1=25
1544 09:53:16.889013 26, 0x0, End_B0=26 End_B1=26
1545 09:53:16.892485 27, 0x0, End_B0=27 End_B1=27
1546 09:53:16.895805 28, 0x0, End_B0=28 End_B1=28
1547 09:53:16.896320 29, 0x0, End_B0=29 End_B1=29
1548 09:53:16.898919 30, 0x0, End_B0=30 End_B1=30
1549 09:53:16.902364 31, 0xFFFF, End_B0=30 End_B1=30
1550 09:53:16.908858 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1551 09:53:16.912538 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1552 09:53:16.915471
1553 09:53:16.915895
1554 09:53:16.916223 Write Rank0 MR23 =0x3f
1555 09:53:16.916527 [DQSOSC]
1556 09:53:16.926068 [DQSOSCAuto] RK0, (LSB)MR18= 0xabab, (MSB)MR19= 0x202, tDQSOscB0 = 461 ps tDQSOscB1 = 461 ps
1557 09:53:16.932014 CH0_RK0: MR19=0x202, MR18=0xABAB, DQSOSC=461, MR23=63, INC=11, DEC=17
1558 09:53:16.932529 Write Rank0 MR23 =0x3f
1559 09:53:16.935444 [DQSOSC]
1560 09:53:16.942660 [DQSOSCAuto] RK0, (LSB)MR18= 0xacac, (MSB)MR19= 0x202, tDQSOscB0 = 460 ps tDQSOscB1 = 460 ps
1561 09:53:16.945762 CH0 RK0: MR19=202, MR18=ACAC
1562 09:53:16.948940 [RankSwap] Rank num 2, (Multi 1), Rank 1
1563 09:53:16.951901 Write Rank0 MR2 =0xad
1564 09:53:16.952326 [Write Leveling]
1565 09:53:16.955594 delay byte0 byte1 byte2 byte3
1566 09:53:16.956099
1567 09:53:16.956433 10 0 0
1568 09:53:16.958710 11 0 0
1569 09:53:16.959143 12 0 0
1570 09:53:16.962180 13 0 0
1571 09:53:16.962690 14 0 0
1572 09:53:16.965124 15 0 0
1573 09:53:16.965595 16 0 0
1574 09:53:16.965941 17 0 0
1575 09:53:16.968420 18 0 0
1576 09:53:16.968863 19 0 0
1577 09:53:16.971722 20 0 0
1578 09:53:16.972232 21 0 0
1579 09:53:16.972572 22 0 0
1580 09:53:16.974953 23 0 ff
1581 09:53:16.975490 24 0 ff
1582 09:53:16.978228 25 0 ff
1583 09:53:16.978658 26 0 ff
1584 09:53:16.981450 27 0 ff
1585 09:53:16.982002 28 0 ff
1586 09:53:16.985128 29 0 ff
1587 09:53:16.985690 30 0 ff
1588 09:53:16.986041 31 ff ff
1589 09:53:16.988067 32 ff ff
1590 09:53:16.988585 33 ff ff
1591 09:53:16.991628 34 ff ff
1592 09:53:16.992081 35 ff ff
1593 09:53:16.994681 36 ff ff
1594 09:53:16.995131 37 ff ff
1595 09:53:17.001121 pass bytecount = 0xff (0xff: all bytes pass)
1596 09:53:17.001680
1597 09:53:17.002121 DQS0 dly: 31
1598 09:53:17.002534 DQS1 dly: 23
1599 09:53:17.004260 Write Rank0 MR2 =0x2d
1600 09:53:17.007467 [RankSwap] Rank num 2, (Multi 1), Rank 0
1601 09:53:17.010753 Write Rank1 MR1 =0xd6
1602 09:53:17.011179 [Gating]
1603 09:53:17.011512 ==
1604 09:53:17.017737 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1605 09:53:17.018194 fsp= 1, odt_onoff= 1, Byte mode= 0
1606 09:53:17.021172 ==
1607 09:53:17.024346 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1608 09:53:17.027701 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1609 09:53:17.030668 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1610 09:53:17.037435 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1611 09:53:17.040435 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1612 09:53:17.044270 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1613 09:53:17.050390 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1614 09:53:17.053520 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1615 09:53:17.057208 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1616 09:53:17.063309 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1617 09:53:17.066510 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1618 09:53:17.070801 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1619 09:53:17.077417 3 2 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1620 09:53:17.080479 3 2 20 |3d3d 706 |(11 11)(11 11) |(1 1)(0 0)| 0
1621 09:53:17.083407 3 2 24 |3d3d 1413 |(11 11)(11 11) |(1 1)(0 0)| 0
1622 09:53:17.090075 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1623 09:53:17.093152 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1624 09:53:17.096623 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1625 09:53:17.103211 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1626 09:53:17.106111 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1627 09:53:17.110013 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1628 09:53:17.116190 3 3 20 |1a1a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1629 09:53:17.119843 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1630 09:53:17.122684 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1631 09:53:17.126333 [Byte 0] Lead/lag Transition tap number (1)
1632 09:53:17.132882 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1633 09:53:17.136290 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1634 09:53:17.139422 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1635 09:53:17.145757 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1636 09:53:17.149357 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1637 09:53:17.152367 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1638 09:53:17.158836 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1639 09:53:17.162320 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1640 09:53:17.165493 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1641 09:53:17.172242 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1642 09:53:17.175392 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1643 09:53:17.178736 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1644 09:53:17.185268 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1645 09:53:17.188393 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1646 09:53:17.191745 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1647 09:53:17.198194 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1648 09:53:17.202257 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1649 09:53:17.205170 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1650 09:53:17.211740 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1651 09:53:17.215071 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1652 09:53:17.218308 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1653 09:53:17.222090 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1654 09:53:17.228499 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1655 09:53:17.231558 [Byte 0] Lead/lag Transition tap number (3)
1656 09:53:17.235044 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1657 09:53:17.238367 [Byte 1] Lead/lag Transition tap number (3)
1658 09:53:17.244692 3 6 20 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1659 09:53:17.248181 3 6 24 |4646 e0e |(0 0)(11 11) |(0 0)(0 0)| 0
1660 09:53:17.251146 [Byte 0]First pass (3, 6, 24)
1661 09:53:17.254298 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1662 09:53:17.257764 [Byte 1]First pass (3, 6, 28)
1663 09:53:17.261119 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1664 09:53:17.264344 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1665 09:53:17.267490 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1666 09:53:17.274194 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1667 09:53:17.277634 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1668 09:53:17.281060 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1669 09:53:17.284340 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1670 09:53:17.290993 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1671 09:53:17.294236 All bytes gating window > 1UI, Early break!
1672 09:53:17.294663
1673 09:53:17.297334 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1674 09:53:17.297892
1675 09:53:17.300825 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1676 09:53:17.301370
1677 09:53:17.301775
1678 09:53:17.302089
1679 09:53:17.304067 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1680 09:53:17.307175
1681 09:53:17.310356 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1682 09:53:17.310784
1683 09:53:17.311118
1684 09:53:17.311426 Write Rank1 MR1 =0x56
1685 09:53:17.311723
1686 09:53:17.313463 best RODT dly(2T, 0.5T) = (2, 3)
1687 09:53:17.313947
1688 09:53:17.316796 best RODT dly(2T, 0.5T) = (2, 3)
1689 09:53:17.317227 ==
1690 09:53:17.323800 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1691 09:53:17.326908 fsp= 1, odt_onoff= 1, Byte mode= 0
1692 09:53:17.327340 ==
1693 09:53:17.330392 Start DQ dly to find pass range UseTestEngine =0
1694 09:53:17.333658 x-axis: bit #, y-axis: DQ dly (-127~63)
1695 09:53:17.337068 RX Vref Scan = 0
1696 09:53:17.339915 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1697 09:53:17.343489 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1698 09:53:17.344012 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1699 09:53:17.346541 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1700 09:53:17.350037 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1701 09:53:17.353117 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1702 09:53:17.356557 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1703 09:53:17.359841 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1704 09:53:17.362786 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1705 09:53:17.366017 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1706 09:53:17.369355 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1707 09:53:17.372989 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1708 09:53:17.373506 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1709 09:53:17.375808 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1710 09:53:17.379608 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1711 09:53:17.382366 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1712 09:53:17.385714 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1713 09:53:17.389233 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1714 09:53:17.392622 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1715 09:53:17.396257 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1716 09:53:17.396779 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1717 09:53:17.399539 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1718 09:53:17.402101 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1719 09:53:17.405509 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1720 09:53:17.409413 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1721 09:53:17.412175 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1722 09:53:17.415379 0, [0] xxxoxoxx oxxoxxxx [MSB]
1723 09:53:17.415847 1, [0] xxxoxoox oxxoxxxx [MSB]
1724 09:53:17.418786 2, [0] xxxoxooo oxxoxxxx [MSB]
1725 09:53:17.422147 3, [0] xxxooooo ooxooxxx [MSB]
1726 09:53:17.426067 4, [0] ooxooooo ooxoooxx [MSB]
1727 09:53:17.428888 5, [0] oooooooo ooxoooox [MSB]
1728 09:53:17.431917 6, [0] oooooooo ooxoooox [MSB]
1729 09:53:17.432352 7, [0] oooooooo ooxooooo [MSB]
1730 09:53:17.435262 8, [0] oooooooo ooxooooo [MSB]
1731 09:53:17.438452 32, [0] oooxoooo oooooooo [MSB]
1732 09:53:17.442254 33, [0] oooxoxoo oooooooo [MSB]
1733 09:53:17.446006 34, [0] oooxoxoo xooooooo [MSB]
1734 09:53:17.449194 35, [0] oooxoxoo xooxoooo [MSB]
1735 09:53:17.452268 36, [0] oooxoxoo xxoxxooo [MSB]
1736 09:53:17.452703 37, [0] oooxoxxx xxoxxxxo [MSB]
1737 09:53:17.455424 38, [0] xooxoxxx xxoxxxxo [MSB]
1738 09:53:17.458584 39, [0] xxoxoxxx xxoxxxxo [MSB]
1739 09:53:17.462236 40, [0] xxxxoxxx xxoxxxxo [MSB]
1740 09:53:17.465164 41, [0] xxxxxxxx xxoxxxxx [MSB]
1741 09:53:17.468722 42, [0] xxxxxxxx xxoxxxxx [MSB]
1742 09:53:17.472196 43, [0] xxxxxxxx xxxxxxxx [MSB]
1743 09:53:17.475366 iDelay=43, Bit 0, Center 20 (4 ~ 37) 34
1744 09:53:17.478450 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
1745 09:53:17.481954 iDelay=43, Bit 2, Center 22 (5 ~ 39) 35
1746 09:53:17.485055 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
1747 09:53:17.488656 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1748 09:53:17.491859 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
1749 09:53:17.495023 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1750 09:53:17.498031 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1751 09:53:17.501632 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
1752 09:53:17.504705 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
1753 09:53:17.507944 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
1754 09:53:17.514532 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1755 09:53:17.517829 iDelay=43, Bit 12, Center 19 (3 ~ 35) 33
1756 09:53:17.520989 iDelay=43, Bit 13, Center 20 (4 ~ 36) 33
1757 09:53:17.524623 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
1758 09:53:17.527574 iDelay=43, Bit 15, Center 23 (7 ~ 40) 34
1759 09:53:17.528010 ==
1760 09:53:17.534198 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1761 09:53:17.534710 fsp= 1, odt_onoff= 1, Byte mode= 0
1762 09:53:17.537807 ==
1763 09:53:17.538319 DQS Delay:
1764 09:53:17.538655 DQS0 = 0, DQS1 = 0
1765 09:53:17.541042 DQM Delay:
1766 09:53:17.541467 DQM0 = 18, DQM1 = 19
1767 09:53:17.544350 DQ Delay:
1768 09:53:17.544803 DQ0 =20, DQ1 =21, DQ2 =22, DQ3 =14
1769 09:53:17.547506 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1770 09:53:17.551281 DQ8 =16, DQ9 =19, DQ10 =25, DQ11 =17
1771 09:53:17.554312 DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23
1772 09:53:17.557655
1773 09:53:17.558177
1774 09:53:17.558516 DramC Write-DBI off
1775 09:53:17.558824 ==
1776 09:53:17.564212 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1777 09:53:17.567455 fsp= 1, odt_onoff= 1, Byte mode= 0
1778 09:53:17.567884 ==
1779 09:53:17.570511 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1780 09:53:17.570937
1781 09:53:17.573506 Begin, DQ Scan Range 919~1175
1782 09:53:17.573981
1783 09:53:17.574312
1784 09:53:17.577360 TX Vref Scan disable
1785 09:53:17.580525 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1786 09:53:17.583807 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1787 09:53:17.586974 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1788 09:53:17.590303 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1789 09:53:17.593244 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1790 09:53:17.596762 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1791 09:53:17.600196 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1792 09:53:17.603068 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1793 09:53:17.606915 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1794 09:53:17.609714 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1795 09:53:17.613057 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1796 09:53:17.620181 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1797 09:53:17.623545 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1798 09:53:17.626698 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1799 09:53:17.629859 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1800 09:53:17.632814 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1801 09:53:17.636729 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1802 09:53:17.639980 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1803 09:53:17.643038 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1804 09:53:17.646623 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1805 09:53:17.649656 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1806 09:53:17.652888 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1807 09:53:17.656453 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1808 09:53:17.659278 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1809 09:53:17.662722 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1810 09:53:17.669611 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1811 09:53:17.673207 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1812 09:53:17.675731 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1813 09:53:17.678964 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1814 09:53:17.682614 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1815 09:53:17.686073 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1816 09:53:17.689119 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1817 09:53:17.692637 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1818 09:53:17.695465 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1819 09:53:17.698464 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1820 09:53:17.702030 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1821 09:53:17.705118 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1822 09:53:17.711678 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1823 09:53:17.715161 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1824 09:53:17.718559 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1825 09:53:17.721584 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1826 09:53:17.724822 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1827 09:53:17.728886 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1828 09:53:17.731883 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1829 09:53:17.734793 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1830 09:53:17.738516 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1831 09:53:17.741485 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1832 09:53:17.744922 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1833 09:53:17.747813 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1834 09:53:17.751305 968 |3 6 8|[0] xxxxxxxx oxxxxxxx [MSB]
1835 09:53:17.754872 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1836 09:53:17.758036 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1837 09:53:17.761457 971 |3 6 11|[0] xxxxxxxx ooxoooxx [MSB]
1838 09:53:17.764576 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1839 09:53:17.770771 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1840 09:53:17.774478 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1841 09:53:17.777947 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1842 09:53:17.781170 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1843 09:53:17.784372 977 |3 6 17|[0] xxxoxoox oooooooo [MSB]
1844 09:53:17.787828 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1845 09:53:17.790820 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1846 09:53:17.794104 980 |3 6 20|[0] ooxooooo oooooooo [MSB]
1847 09:53:17.798075 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1848 09:53:17.804508 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1849 09:53:17.807435 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1850 09:53:17.810479 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1851 09:53:17.814356 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1852 09:53:17.817310 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1853 09:53:17.820671 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1854 09:53:17.823714 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1855 09:53:17.826763 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1856 09:53:17.830182 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1857 09:53:17.833761 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1858 09:53:17.837235 Byte0, DQ PI dly=987, DQM PI dly= 987
1859 09:53:17.843397 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1860 09:53:17.843833
1861 09:53:17.846787 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1862 09:53:17.847218
1863 09:53:17.850020 Byte1, DQ PI dly=980, DQM PI dly= 980
1864 09:53:17.853529 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1865 09:53:17.854207
1866 09:53:17.860016 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1867 09:53:17.860449
1868 09:53:17.860781 ==
1869 09:53:17.863328 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1870 09:53:17.866438 fsp= 1, odt_onoff= 1, Byte mode= 0
1871 09:53:17.866870 ==
1872 09:53:17.873262 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1873 09:53:17.873889
1874 09:53:17.876500 Begin, DQ Scan Range 956~1020
1875 09:53:17.877008 Write Rank1 MR14 =0x0
1876 09:53:17.885116
1877 09:53:17.885669 CH=0, VrefRange= 0, VrefLevel = 0
1878 09:53:17.891521 TX Bit0 (983~994) 12 988, Bit8 (972~982) 11 977,
1879 09:53:17.894703 TX Bit1 (982~993) 12 987, Bit9 (973~983) 11 978,
1880 09:53:17.901477 TX Bit2 (983~995) 13 989, Bit10 (976~990) 15 983,
1881 09:53:17.904490 TX Bit3 (976~990) 15 983, Bit11 (973~982) 10 977,
1882 09:53:17.907869 TX Bit4 (981~993) 13 987, Bit12 (973~984) 12 978,
1883 09:53:17.914299 TX Bit5 (978~991) 14 984, Bit13 (973~986) 14 979,
1884 09:53:17.917784 TX Bit6 (978~991) 14 984, Bit14 (974~987) 14 980,
1885 09:53:17.924270 TX Bit7 (981~994) 14 987, Bit15 (976~988) 13 982,
1886 09:53:17.924783
1887 09:53:17.925118 Write Rank1 MR14 =0x2
1888 09:53:17.932973
1889 09:53:17.933476 CH=0, VrefRange= 0, VrefLevel = 2
1890 09:53:17.939706 TX Bit0 (983~995) 13 989, Bit8 (971~983) 13 977,
1891 09:53:17.942764 TX Bit1 (981~994) 14 987, Bit9 (973~984) 12 978,
1892 09:53:17.949393 TX Bit2 (983~995) 13 989, Bit10 (976~991) 16 983,
1893 09:53:17.952691 TX Bit3 (976~990) 15 983, Bit11 (972~983) 12 977,
1894 09:53:17.955799 TX Bit4 (982~994) 13 988, Bit12 (973~985) 13 979,
1895 09:53:17.962216 TX Bit5 (978~992) 15 985, Bit13 (973~986) 14 979,
1896 09:53:17.965650 TX Bit6 (978~992) 15 985, Bit14 (973~988) 16 980,
1897 09:53:17.972010 TX Bit7 (980~995) 16 987, Bit15 (976~989) 14 982,
1898 09:53:17.972443
1899 09:53:17.972780 Write Rank1 MR14 =0x4
1900 09:53:17.981503
1901 09:53:17.982056 CH=0, VrefRange= 0, VrefLevel = 4
1902 09:53:17.987542 TX Bit0 (983~996) 14 989, Bit8 (970~983) 14 976,
1903 09:53:17.990755 TX Bit1 (982~995) 14 988, Bit9 (973~985) 13 979,
1904 09:53:17.997780 TX Bit2 (983~997) 15 990, Bit10 (976~991) 16 983,
1905 09:53:18.001234 TX Bit3 (976~990) 15 983, Bit11 (972~983) 12 977,
1906 09:53:18.004614 TX Bit4 (980~995) 16 987, Bit12 (973~985) 13 979,
1907 09:53:18.010945 TX Bit5 (978~992) 15 985, Bit13 (973~987) 15 980,
1908 09:53:18.014341 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1909 09:53:18.021109 TX Bit7 (979~996) 18 987, Bit15 (976~990) 15 983,
1910 09:53:18.021766
1911 09:53:18.022115 Write Rank1 MR14 =0x6
1912 09:53:18.030243
1913 09:53:18.030767 CH=0, VrefRange= 0, VrefLevel = 6
1914 09:53:18.036490 TX Bit0 (982~998) 17 990, Bit8 (969~984) 16 976,
1915 09:53:18.039828 TX Bit1 (981~996) 16 988, Bit9 (973~985) 13 979,
1916 09:53:18.046297 TX Bit2 (982~998) 17 990, Bit10 (975~992) 18 983,
1917 09:53:18.049776 TX Bit3 (976~991) 16 983, Bit11 (971~984) 14 977,
1918 09:53:18.053622 TX Bit4 (980~997) 18 988, Bit12 (973~987) 15 980,
1919 09:53:18.059968 TX Bit5 (977~993) 17 985, Bit13 (973~988) 16 980,
1920 09:53:18.063206 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1921 09:53:18.066358 TX Bit7 (979~997) 19 988, Bit15 (975~990) 16 982,
1922 09:53:18.069393
1923 09:53:18.069853 Write Rank1 MR14 =0x8
1924 09:53:18.078693
1925 09:53:18.079216 CH=0, VrefRange= 0, VrefLevel = 8
1926 09:53:18.085323 TX Bit0 (982~998) 17 990, Bit8 (969~985) 17 977,
1927 09:53:18.088711 TX Bit1 (980~997) 18 988, Bit9 (972~986) 15 979,
1928 09:53:18.095174 TX Bit2 (982~998) 17 990, Bit10 (975~992) 18 983,
1929 09:53:18.098201 TX Bit3 (976~991) 16 983, Bit11 (971~984) 14 977,
1930 09:53:18.101414 TX Bit4 (980~997) 18 988, Bit12 (972~988) 17 980,
1931 09:53:18.107763 TX Bit5 (977~994) 18 985, Bit13 (972~988) 17 980,
1932 09:53:18.111126 TX Bit6 (977~994) 18 985, Bit14 (972~990) 19 981,
1933 09:53:18.117692 TX Bit7 (978~998) 21 988, Bit15 (975~990) 16 982,
1934 09:53:18.118209
1935 09:53:18.118552 Write Rank1 MR14 =0xa
1936 09:53:18.127174
1937 09:53:18.130807 CH=0, VrefRange= 0, VrefLevel = 10
1938 09:53:18.133662 TX Bit0 (982~998) 17 990, Bit8 (968~985) 18 976,
1939 09:53:18.136882 TX Bit1 (980~998) 19 989, Bit9 (972~987) 16 979,
1940 09:53:18.143693 TX Bit2 (981~999) 19 990, Bit10 (975~992) 18 983,
1941 09:53:18.146632 TX Bit3 (976~992) 17 984, Bit11 (970~985) 16 977,
1942 09:53:18.150557 TX Bit4 (980~998) 19 989, Bit12 (972~988) 17 980,
1943 09:53:18.157209 TX Bit5 (977~994) 18 985, Bit13 (972~989) 18 980,
1944 09:53:18.160362 TX Bit6 (977~995) 19 986, Bit14 (972~990) 19 981,
1945 09:53:18.166874 TX Bit7 (978~998) 21 988, Bit15 (975~991) 17 983,
1946 09:53:18.167368
1947 09:53:18.167710 Write Rank1 MR14 =0xc
1948 09:53:18.176220
1949 09:53:18.179448 CH=0, VrefRange= 0, VrefLevel = 12
1950 09:53:18.182719 TX Bit0 (982~999) 18 990, Bit8 (968~986) 19 977,
1951 09:53:18.185997 TX Bit1 (979~999) 21 989, Bit9 (971~988) 18 979,
1952 09:53:18.192826 TX Bit2 (981~999) 19 990, Bit10 (975~993) 19 984,
1953 09:53:18.195937 TX Bit3 (975~992) 18 983, Bit11 (970~986) 17 978,
1954 09:53:18.199202 TX Bit4 (979~998) 20 988, Bit12 (972~989) 18 980,
1955 09:53:18.205541 TX Bit5 (977~994) 18 985, Bit13 (972~989) 18 980,
1956 09:53:18.209129 TX Bit6 (977~997) 21 987, Bit14 (972~991) 20 981,
1957 09:53:18.215487 TX Bit7 (978~999) 22 988, Bit15 (975~992) 18 983,
1958 09:53:18.215944
1959 09:53:18.216305 Write Rank1 MR14 =0xe
1960 09:53:18.224500
1961 09:53:18.228437 CH=0, VrefRange= 0, VrefLevel = 14
1962 09:53:18.231504 TX Bit0 (981~999) 19 990, Bit8 (968~987) 20 977,
1963 09:53:18.235283 TX Bit1 (979~999) 21 989, Bit9 (971~988) 18 979,
1964 09:53:18.241632 TX Bit2 (981~999) 19 990, Bit10 (975~994) 20 984,
1965 09:53:18.244459 TX Bit3 (974~993) 20 983, Bit11 (969~987) 19 978,
1966 09:53:18.248273 TX Bit4 (978~998) 21 988, Bit12 (970~989) 20 979,
1967 09:53:18.254733 TX Bit5 (976~996) 21 986, Bit13 (971~990) 20 980,
1968 09:53:18.258527 TX Bit6 (977~997) 21 987, Bit14 (971~991) 21 981,
1969 09:53:18.264527 TX Bit7 (978~999) 22 988, Bit15 (974~992) 19 983,
1970 09:53:18.265027
1971 09:53:18.265360 Write Rank1 MR14 =0x10
1972 09:53:18.274277
1973 09:53:18.277306 CH=0, VrefRange= 0, VrefLevel = 16
1974 09:53:18.280452 TX Bit0 (981~999) 19 990, Bit8 (967~988) 22 977,
1975 09:53:18.284217 TX Bit1 (978~999) 22 988, Bit9 (971~989) 19 980,
1976 09:53:18.290589 TX Bit2 (981~1000) 20 990, Bit10 (975~994) 20 984,
1977 09:53:18.293885 TX Bit3 (974~993) 20 983, Bit11 (969~988) 20 978,
1978 09:53:18.297109 TX Bit4 (979~999) 21 989, Bit12 (971~990) 20 980,
1979 09:53:18.303980 TX Bit5 (976~997) 22 986, Bit13 (971~990) 20 980,
1980 09:53:18.307023 TX Bit6 (977~998) 22 987, Bit14 (971~991) 21 981,
1981 09:53:18.313507 TX Bit7 (978~1000) 23 989, Bit15 (974~992) 19 983,
1982 09:53:18.314051
1983 09:53:18.314393 Write Rank1 MR14 =0x12
1984 09:53:18.323472
1985 09:53:18.326573 CH=0, VrefRange= 0, VrefLevel = 18
1986 09:53:18.329922 TX Bit0 (979~1000) 22 989, Bit8 (967~988) 22 977,
1987 09:53:18.333374 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
1988 09:53:18.339996 TX Bit2 (980~1000) 21 990, Bit10 (974~995) 22 984,
1989 09:53:18.342755 TX Bit3 (974~993) 20 983, Bit11 (968~988) 21 978,
1990 09:53:18.346845 TX Bit4 (978~999) 22 988, Bit12 (970~990) 21 980,
1991 09:53:18.353484 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
1992 09:53:18.356483 TX Bit6 (976~998) 23 987, Bit14 (971~992) 22 981,
1993 09:53:18.362800 TX Bit7 (978~1000) 23 989, Bit15 (974~994) 21 984,
1994 09:53:18.363298
1995 09:53:18.363627 Write Rank1 MR14 =0x14
1996 09:53:18.372904
1997 09:53:18.376115 CH=0, VrefRange= 0, VrefLevel = 20
1998 09:53:18.380334 TX Bit0 (980~1000) 21 990, Bit8 (967~989) 23 978,
1999 09:53:18.383373 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
2000 09:53:18.389140 TX Bit2 (979~1000) 22 989, Bit10 (974~996) 23 985,
2001 09:53:18.392678 TX Bit3 (975~994) 20 984, Bit11 (968~989) 22 978,
2002 09:53:18.396406 TX Bit4 (978~999) 22 988, Bit12 (969~991) 23 980,
2003 09:53:18.402270 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2004 09:53:18.405446 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2005 09:53:18.412484 TX Bit7 (977~1000) 24 988, Bit15 (974~994) 21 984,
2006 09:53:18.412994
2007 09:53:18.413327 Write Rank1 MR14 =0x16
2008 09:53:18.422226
2009 09:53:18.425448 CH=0, VrefRange= 0, VrefLevel = 22
2010 09:53:18.428766 TX Bit0 (980~1001) 22 990, Bit8 (967~989) 23 978,
2011 09:53:18.432440 TX Bit1 (978~1000) 23 989, Bit9 (970~990) 21 980,
2012 09:53:18.438659 TX Bit2 (979~1001) 23 990, Bit10 (974~996) 23 985,
2013 09:53:18.442040 TX Bit3 (974~995) 22 984, Bit11 (968~989) 22 978,
2014 09:53:18.448593 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
2015 09:53:18.452039 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
2016 09:53:18.455123 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2017 09:53:18.461911 TX Bit7 (977~1001) 25 989, Bit15 (973~995) 23 984,
2018 09:53:18.462424
2019 09:53:18.462761 Write Rank1 MR14 =0x18
2020 09:53:18.472344
2021 09:53:18.475317 CH=0, VrefRange= 0, VrefLevel = 24
2022 09:53:18.478720 TX Bit0 (978~1001) 24 989, Bit8 (966~990) 25 978,
2023 09:53:18.481747 TX Bit1 (977~1000) 24 988, Bit9 (969~990) 22 979,
2024 09:53:18.488189 TX Bit2 (978~1001) 24 989, Bit10 (974~997) 24 985,
2025 09:53:18.491715 TX Bit3 (973~995) 23 984, Bit11 (967~990) 24 978,
2026 09:53:18.498455 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
2027 09:53:18.501513 TX Bit5 (975~998) 24 986, Bit13 (969~991) 23 980,
2028 09:53:18.505536 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2029 09:53:18.511481 TX Bit7 (977~1001) 25 989, Bit15 (973~995) 23 984,
2030 09:53:18.511916
2031 09:53:18.512254 Write Rank1 MR14 =0x1a
2032 09:53:18.522421
2033 09:53:18.525276 CH=0, VrefRange= 0, VrefLevel = 26
2034 09:53:18.528853 TX Bit0 (979~1002) 24 990, Bit8 (966~989) 24 977,
2035 09:53:18.531939 TX Bit1 (978~1001) 24 989, Bit9 (969~991) 23 980,
2036 09:53:18.538535 TX Bit2 (978~1002) 25 990, Bit10 (973~997) 25 985,
2037 09:53:18.541390 TX Bit3 (973~996) 24 984, Bit11 (967~990) 24 978,
2038 09:53:18.545109 TX Bit4 (977~1001) 25 989, Bit12 (968~991) 24 979,
2039 09:53:18.551670 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2040 09:53:18.554598 TX Bit6 (976~999) 24 987, Bit14 (969~992) 24 980,
2041 09:53:18.561399 TX Bit7 (976~1001) 26 988, Bit15 (973~996) 24 984,
2042 09:53:18.561850
2043 09:53:18.562102 Write Rank1 MR14 =0x1c
2044 09:53:18.571567
2045 09:53:18.574833 CH=0, VrefRange= 0, VrefLevel = 28
2046 09:53:18.578038 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2047 09:53:18.581368 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
2048 09:53:18.588652 TX Bit2 (978~1002) 25 990, Bit10 (973~996) 24 984,
2049 09:53:18.591582 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2050 09:53:18.594902 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2051 09:53:18.601443 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2052 09:53:18.604785 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2053 09:53:18.611136 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2054 09:53:18.611270
2055 09:53:18.611334 Write Rank1 MR14 =0x1e
2056 09:53:18.621758
2057 09:53:18.625249 CH=0, VrefRange= 0, VrefLevel = 30
2058 09:53:18.628433 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2059 09:53:18.631952 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
2060 09:53:18.637941 TX Bit2 (978~1002) 25 990, Bit10 (973~996) 24 984,
2061 09:53:18.641574 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2062 09:53:18.644610 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2063 09:53:18.651804 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2064 09:53:18.654843 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2065 09:53:18.661131 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2066 09:53:18.661318
2067 09:53:18.661428 Write Rank1 MR14 =0x20
2068 09:53:18.671845
2069 09:53:18.674835 CH=0, VrefRange= 0, VrefLevel = 32
2070 09:53:18.678554 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2071 09:53:18.681300 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
2072 09:53:18.688376 TX Bit2 (978~1002) 25 990, Bit10 (973~996) 24 984,
2073 09:53:18.691764 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2074 09:53:18.698255 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2075 09:53:18.701295 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2076 09:53:18.704863 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2077 09:53:18.711275 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2078 09:53:18.711785
2079 09:53:18.712122 Write Rank1 MR14 =0x22
2080 09:53:18.722494
2081 09:53:18.725627 CH=0, VrefRange= 0, VrefLevel = 34
2082 09:53:18.728727 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2083 09:53:18.732054 TX Bit1 (977~1001) 25 989, Bit9 (968~991) 24 979,
2084 09:53:18.738359 TX Bit2 (978~1002) 25 990, Bit10 (973~996) 24 984,
2085 09:53:18.742216 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2086 09:53:18.745477 TX Bit4 (977~1001) 25 989, Bit12 (969~991) 23 980,
2087 09:53:18.751940 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2088 09:53:18.754639 TX Bit6 (976~999) 24 987, Bit14 (970~992) 23 981,
2089 09:53:18.761542 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2090 09:53:18.762098
2091 09:53:18.762440
2092 09:53:18.765196 TX Vref found, early break! 360< 370
2093 09:53:18.767885 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2094 09:53:18.771026 u1DelayCellOfst[0]=6 cells (5 PI)
2095 09:53:18.774412 u1DelayCellOfst[1]=5 cells (4 PI)
2096 09:53:18.777916 u1DelayCellOfst[2]=6 cells (5 PI)
2097 09:53:18.781819 u1DelayCellOfst[3]=0 cells (0 PI)
2098 09:53:18.784595 u1DelayCellOfst[4]=5 cells (4 PI)
2099 09:53:18.787932 u1DelayCellOfst[5]=2 cells (2 PI)
2100 09:53:18.791609 u1DelayCellOfst[6]=2 cells (2 PI)
2101 09:53:18.794575 u1DelayCellOfst[7]=5 cells (4 PI)
2102 09:53:18.797626 Byte0, DQ PI dly=985, DQM PI dly= 987
2103 09:53:18.801253 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2104 09:53:18.801835
2105 09:53:18.804702 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2106 09:53:18.805218
2107 09:53:18.807966 u1DelayCellOfst[8]=0 cells (0 PI)
2108 09:53:18.811630 u1DelayCellOfst[9]=2 cells (2 PI)
2109 09:53:18.814136 u1DelayCellOfst[10]=9 cells (7 PI)
2110 09:53:18.817076 u1DelayCellOfst[11]=1 cells (1 PI)
2111 09:53:18.820568 u1DelayCellOfst[12]=3 cells (3 PI)
2112 09:53:18.824002 u1DelayCellOfst[13]=2 cells (2 PI)
2113 09:53:18.827327 u1DelayCellOfst[14]=5 cells (4 PI)
2114 09:53:18.830738 u1DelayCellOfst[15]=9 cells (7 PI)
2115 09:53:18.834067 Byte1, DQ PI dly=977, DQM PI dly= 980
2116 09:53:18.837931 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2117 09:53:18.838497
2118 09:53:18.840618 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2119 09:53:18.841049
2120 09:53:18.844079 Write Rank1 MR14 =0x1c
2121 09:53:18.844609
2122 09:53:18.847192 Final TX Range 0 Vref 28
2123 09:53:18.847626
2124 09:53:18.854163 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2125 09:53:18.854679
2126 09:53:18.860358 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2127 09:53:18.867094 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2128 09:53:18.873905 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2129 09:53:18.877737 Write Rank1 MR3 =0xb0
2130 09:53:18.878255 DramC Write-DBI on
2131 09:53:18.878595 ==
2132 09:53:18.884380 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2133 09:53:18.887411 fsp= 1, odt_onoff= 1, Byte mode= 0
2134 09:53:18.887849 ==
2135 09:53:18.890837 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2136 09:53:18.891345
2137 09:53:18.894091 Begin, DQ Scan Range 700~764
2138 09:53:18.894594
2139 09:53:18.894982
2140 09:53:18.896946 TX Vref Scan disable
2141 09:53:18.900657 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2142 09:53:18.903627 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2143 09:53:18.907184 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2144 09:53:18.910115 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2145 09:53:18.913775 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2146 09:53:18.916756 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2147 09:53:18.920021 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2148 09:53:18.923966 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2149 09:53:18.926669 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2150 09:53:18.930447 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2151 09:53:18.933263 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2152 09:53:18.936693 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2153 09:53:18.939864 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2154 09:53:18.943049 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2155 09:53:18.946364 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2156 09:53:18.949799 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2157 09:53:18.956548 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2158 09:53:18.960704 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2159 09:53:18.963161 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2160 09:53:18.966603 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2161 09:53:18.969398 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2162 09:53:18.976734 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2163 09:53:18.980014 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2164 09:53:18.982710 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2165 09:53:18.986443 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2166 09:53:18.989683 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2167 09:53:18.993111 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2168 09:53:18.996427 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2169 09:53:18.999460 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2170 09:53:19.002978 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2171 09:53:19.006293 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2172 09:53:19.009454 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2173 09:53:19.012646 Byte0, DQ PI dly=733, DQM PI dly= 733
2174 09:53:19.019180 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2175 09:53:19.019680
2176 09:53:19.022668 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2177 09:53:19.023096
2178 09:53:19.025979 Byte1, DQ PI dly=724, DQM PI dly= 724
2179 09:53:19.029160 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2180 09:53:19.029898
2181 09:53:19.036097 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2182 09:53:19.036611
2183 09:53:19.042514 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2184 09:53:19.049220 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2185 09:53:19.055578 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2186 09:53:19.058914 Write Rank1 MR3 =0x30
2187 09:53:19.059346 DramC Write-DBI off
2188 09:53:19.059681
2189 09:53:19.059989 [DATLAT]
2190 09:53:19.062079 Freq=1600, CH0 RK1, use_rxtx_scan=0
2191 09:53:19.062509
2192 09:53:19.065601 DATLAT Default: 0x10
2193 09:53:19.068684 7, 0xFFFF, sum=0
2194 09:53:19.069119 8, 0xFFFF, sum=0
2195 09:53:19.069460 9, 0xFFFF, sum=0
2196 09:53:19.072055 10, 0xFFFF, sum=0
2197 09:53:19.072490 11, 0xFFFF, sum=0
2198 09:53:19.075485 12, 0xFFFF, sum=0
2199 09:53:19.075924 13, 0xFFFF, sum=0
2200 09:53:19.078594 14, 0x0, sum=1
2201 09:53:19.079030 15, 0x0, sum=2
2202 09:53:19.081738 16, 0x0, sum=3
2203 09:53:19.082170 17, 0x0, sum=4
2204 09:53:19.085062 pattern=2 first_step=14 total pass=5 best_step=16
2205 09:53:19.088849 ==
2206 09:53:19.091533 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2207 09:53:19.095400 fsp= 1, odt_onoff= 1, Byte mode= 0
2208 09:53:19.095930 ==
2209 09:53:19.098133 Start DQ dly to find pass range UseTestEngine =1
2210 09:53:19.104996 x-axis: bit #, y-axis: DQ dly (-127~63)
2211 09:53:19.105522 RX Vref Scan = 0
2212 09:53:19.108164 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2213 09:53:19.111727 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2214 09:53:19.114591 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2215 09:53:19.117923 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2216 09:53:19.118360 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2217 09:53:19.121200 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2218 09:53:19.124738 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2219 09:53:19.128098 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2220 09:53:19.131190 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2221 09:53:19.134772 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2222 09:53:19.138222 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2223 09:53:19.141280 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2224 09:53:19.144427 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2225 09:53:19.144944 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2226 09:53:19.147674 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2227 09:53:19.151114 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2228 09:53:19.154164 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2229 09:53:19.157229 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2230 09:53:19.160772 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2231 09:53:19.164043 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2232 09:53:19.167374 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2233 09:53:19.167825 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2234 09:53:19.170769 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2235 09:53:19.174180 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2236 09:53:19.177441 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2237 09:53:19.180766 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2238 09:53:19.183961 0, [0] xxxoxoxx oxxoxxxx [MSB]
2239 09:53:19.187586 1, [0] xxxoxoox oxxoxxxx [MSB]
2240 09:53:19.188063 2, [0] xxxoxoox ooxoxxxx [MSB]
2241 09:53:19.190753 3, [0] xoxoxoox ooxoooxx [MSB]
2242 09:53:19.193890 4, [0] xoxoxoox ooxoooxx [MSB]
2243 09:53:19.197161 5, [0] oooooooo ooxoooox [MSB]
2244 09:53:19.199995 6, [0] oooooooo ooxooooo [MSB]
2245 09:53:19.203580 7, [0] oooooooo ooxooooo [MSB]
2246 09:53:19.204059 8, [0] oooooooo ooxooooo [MSB]
2247 09:53:19.208732 32, [0] oooxoooo oooooooo [MSB]
2248 09:53:19.211694 33, [0] oooxoxoo oooooooo [MSB]
2249 09:53:19.215387 34, [0] oooxoxoo xooooooo [MSB]
2250 09:53:19.218815 35, [0] oooxoxoo xooxoooo [MSB]
2251 09:53:19.221822 36, [0] oooxoxxo xxoxoooo [MSB]
2252 09:53:19.225425 37, [0] oooxoxxo xxoxxxoo [MSB]
2253 09:53:19.228109 38, [0] oooxoxxx xxoxxxxo [MSB]
2254 09:53:19.228638 39, [0] xooxoxxx xxoxxxxo [MSB]
2255 09:53:19.231511 40, [0] xxoxxxxx xxoxxxxo [MSB]
2256 09:53:19.234961 41, [0] xxxxxxxx xxoxxxxx [MSB]
2257 09:53:19.237812 42, [0] xxxxxxxx xxoxxxxx [MSB]
2258 09:53:19.241516 43, [0] xxxxxxxx xxxxxxxx [MSB]
2259 09:53:19.244433 iDelay=43, Bit 0, Center 21 (5 ~ 38) 34
2260 09:53:19.247865 iDelay=43, Bit 1, Center 21 (3 ~ 39) 37
2261 09:53:19.251567 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
2262 09:53:19.254704 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
2263 09:53:19.258002 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
2264 09:53:19.261269 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
2265 09:53:19.264460 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2266 09:53:19.267662 iDelay=43, Bit 7, Center 21 (5 ~ 37) 33
2267 09:53:19.273962 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
2268 09:53:19.277500 iDelay=43, Bit 9, Center 18 (2 ~ 35) 34
2269 09:53:19.280989 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2270 09:53:19.283946 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2271 09:53:19.287990 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2272 09:53:19.290820 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2273 09:53:19.294232 iDelay=43, Bit 14, Center 21 (5 ~ 37) 33
2274 09:53:19.297402 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2275 09:53:19.297833 ==
2276 09:53:19.304393 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2277 09:53:19.307661 fsp= 1, odt_onoff= 1, Byte mode= 0
2278 09:53:19.308135 ==
2279 09:53:19.308440 DQS Delay:
2280 09:53:19.310968 DQS0 = 0, DQS1 = 0
2281 09:53:19.311356 DQM Delay:
2282 09:53:19.311667 DQM0 = 19, DQM1 = 19
2283 09:53:19.314083 DQ Delay:
2284 09:53:19.317248 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2285 09:53:19.320681 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =21
2286 09:53:19.323729 DQ8 =16, DQ9 =18, DQ10 =25, DQ11 =17
2287 09:53:19.326720 DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23
2288 09:53:19.327346
2289 09:53:19.327934
2290 09:53:19.328485
2291 09:53:19.330058 [DramC_TX_OE_Calibration] TA2
2292 09:53:19.333699 Original DQ_B0 (3 6) =30, OEN = 27
2293 09:53:19.336686 Original DQ_B1 (3 6) =30, OEN = 27
2294 09:53:19.337122 23, 0x0, End_B0=23 End_B1=23
2295 09:53:19.339863 24, 0x0, End_B0=24 End_B1=24
2296 09:53:19.343398 25, 0x0, End_B0=25 End_B1=25
2297 09:53:19.346518 26, 0x0, End_B0=26 End_B1=26
2298 09:53:19.349619 27, 0x0, End_B0=27 End_B1=27
2299 09:53:19.349863 28, 0x0, End_B0=28 End_B1=28
2300 09:53:19.353066 29, 0x0, End_B0=29 End_B1=29
2301 09:53:19.356126 30, 0x0, End_B0=30 End_B1=30
2302 09:53:19.359545 31, 0xFFFF, End_B0=30 End_B1=30
2303 09:53:19.362688 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2304 09:53:19.369348 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2305 09:53:19.369513
2306 09:53:19.369653
2307 09:53:19.373178 Write Rank1 MR23 =0x3f
2308 09:53:19.373270 [DQSOSC]
2309 09:53:19.383159 [DQSOSCAuto] RK1, (LSB)MR18= 0xafaf, (MSB)MR19= 0x202, tDQSOscB0 = 458 ps tDQSOscB1 = 458 ps
2310 09:53:19.386034 CH0_RK1: MR19=0x202, MR18=0xAFAF, DQSOSC=458, MR23=63, INC=11, DEC=17
2311 09:53:19.388972 Write Rank1 MR23 =0x3f
2312 09:53:19.389204 [DQSOSC]
2313 09:53:19.399265 [DQSOSCAuto] RK1, (LSB)MR18= 0xafaf, (MSB)MR19= 0x202, tDQSOscB0 = 458 ps tDQSOscB1 = 458 ps
2314 09:53:19.402443 CH0 RK1: MR19=202, MR18=AFAF
2315 09:53:19.402665 [RxdqsGatingPostProcess] freq 1600
2316 09:53:19.409002 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2317 09:53:19.409226 Rank: 0
2318 09:53:19.412258 best DQS0 dly(2T, 0.5T) = (2, 6)
2319 09:53:19.415630 best DQS1 dly(2T, 0.5T) = (2, 6)
2320 09:53:19.419189 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2321 09:53:19.422246 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2322 09:53:19.422602 Rank: 1
2323 09:53:19.425521 best DQS0 dly(2T, 0.5T) = (2, 6)
2324 09:53:19.428816 best DQS1 dly(2T, 0.5T) = (2, 6)
2325 09:53:19.432537 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2326 09:53:19.435369 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2327 09:53:19.441887 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2328 09:53:19.446043 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2329 09:53:19.448632 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2330 09:53:19.452337 Write Rank0 MR13 =0x59
2331 09:53:19.452722 ==
2332 09:53:19.455867 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2333 09:53:19.458717 fsp= 1, odt_onoff= 1, Byte mode= 0
2334 09:53:19.459111 ==
2335 09:53:19.462096 === u2Vref_new: 0x56 --> 0x3a
2336 09:53:19.465256 === u2Vref_new: 0x58 --> 0x58
2337 09:53:19.468736 === u2Vref_new: 0x5a --> 0x5a
2338 09:53:19.471631 === u2Vref_new: 0x5c --> 0x78
2339 09:53:19.475126 === u2Vref_new: 0x5e --> 0x7a
2340 09:53:19.478817 === u2Vref_new: 0x60 --> 0x90
2341 09:53:19.481995 [CA 0] Center 37 (12~63) winsize 52
2342 09:53:19.485230 [CA 1] Center 36 (10~63) winsize 54
2343 09:53:19.488378 [CA 2] Center 35 (7~63) winsize 57
2344 09:53:19.491618 [CA 3] Center 34 (6~63) winsize 58
2345 09:53:19.495054 [CA 4] Center 34 (6~63) winsize 58
2346 09:53:19.498099 [CA 5] Center 28 (0~57) winsize 58
2347 09:53:19.498489
2348 09:53:19.502267 [CATrainingPosCal] consider 1 rank data
2349 09:53:19.504996 u2DelayCellTimex100 = 744/100 ps
2350 09:53:19.508519 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2351 09:53:19.511315 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2352 09:53:19.514980 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2353 09:53:19.517676 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2354 09:53:19.521226 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2355 09:53:19.524749 CA5 delay=28 (0~57),Diff = 0 PI (0 cell)
2356 09:53:19.525233
2357 09:53:19.530705 CA PerBit enable=1, Macro0, CA PI delay=28
2358 09:53:19.531102 === u2Vref_new: 0x5e --> 0x7a
2359 09:53:19.531409
2360 09:53:19.534000 Vref(ca) range 1: 30
2361 09:53:19.534395
2362 09:53:19.538018 CS Dly= 11 (42-0-32)
2363 09:53:19.538407 Write Rank0 MR13 =0xd8
2364 09:53:19.541008 Write Rank0 MR13 =0xd8
2365 09:53:19.543839 Write Rank0 MR12 =0x5e
2366 09:53:19.544232 Write Rank1 MR13 =0x59
2367 09:53:19.544550 ==
2368 09:53:19.550784 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2369 09:53:19.554028 fsp= 1, odt_onoff= 1, Byte mode= 0
2370 09:53:19.554526 ==
2371 09:53:19.556910 === u2Vref_new: 0x56 --> 0x3a
2372 09:53:19.560141 === u2Vref_new: 0x58 --> 0x58
2373 09:53:19.563364 === u2Vref_new: 0x5a --> 0x5a
2374 09:53:19.566620 === u2Vref_new: 0x5c --> 0x78
2375 09:53:19.567009 === u2Vref_new: 0x5e --> 0x7a
2376 09:53:19.570460 === u2Vref_new: 0x60 --> 0x90
2377 09:53:19.573771 [CA 0] Center 37 (11~63) winsize 53
2378 09:53:19.576810 [CA 1] Center 36 (10~63) winsize 54
2379 09:53:19.580762 [CA 2] Center 35 (7~63) winsize 57
2380 09:53:19.583881 [CA 3] Center 34 (6~63) winsize 58
2381 09:53:19.587171 [CA 4] Center 34 (5~63) winsize 59
2382 09:53:19.590326 [CA 5] Center 28 (0~56) winsize 57
2383 09:53:19.590784
2384 09:53:19.593321 [CATrainingPosCal] consider 2 rank data
2385 09:53:19.597236 u2DelayCellTimex100 = 744/100 ps
2386 09:53:19.600338 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2387 09:53:19.606709 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2388 09:53:19.610158 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2389 09:53:19.613058 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2390 09:53:19.616142 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2391 09:53:19.619393 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2392 09:53:19.619854
2393 09:53:19.622993 CA PerBit enable=1, Macro0, CA PI delay=28
2394 09:53:19.626368 === u2Vref_new: 0x60 --> 0x90
2395 09:53:19.626752
2396 09:53:19.629621 Vref(ca) range 1: 32
2397 09:53:19.630005
2398 09:53:19.630301 CS Dly= 10 (41-0-32)
2399 09:53:19.632709 Write Rank1 MR13 =0xd8
2400 09:53:19.636422 Write Rank1 MR13 =0xd8
2401 09:53:19.636944 Write Rank1 MR12 =0x60
2402 09:53:19.639544 [RankSwap] Rank num 2, (Multi 1), Rank 0
2403 09:53:19.642471 Write Rank0 MR2 =0xad
2404 09:53:19.642854 [Write Leveling]
2405 09:53:19.646238 delay byte0 byte1 byte2 byte3
2406 09:53:19.646618
2407 09:53:19.649515 10 0 0
2408 09:53:19.650021 11 0 0
2409 09:53:19.652653 12 0 0
2410 09:53:19.653116 13 0 0
2411 09:53:19.653690 14 0 0
2412 09:53:19.655764 15 0 0
2413 09:53:19.656154 16 0 0
2414 09:53:19.659056 17 0 0
2415 09:53:19.659496 18 0 0
2416 09:53:19.662313 19 0 0
2417 09:53:19.662701 20 0 0
2418 09:53:19.663004 21 0 0
2419 09:53:19.665860 22 0 0
2420 09:53:19.666355 23 0 0
2421 09:53:19.668884 24 0 0
2422 09:53:19.669268 25 0 0
2423 09:53:19.669616 26 0 0
2424 09:53:19.672252 27 0 0
2425 09:53:19.672637 28 0 0
2426 09:53:19.675428 29 0 0
2427 09:53:19.675816 30 0 0
2428 09:53:19.678635 31 0 0
2429 09:53:19.679017 32 0 0
2430 09:53:19.679315 33 0 ff
2431 09:53:19.681862 34 ff ff
2432 09:53:19.682247 35 ff ff
2433 09:53:19.685521 36 ff ff
2434 09:53:19.686048 37 ff ff
2435 09:53:19.688408 38 ff ff
2436 09:53:19.688795 39 ff ff
2437 09:53:19.691885 40 ff ff
2438 09:53:19.695158 pass bytecount = 0xff (0xff: all bytes pass)
2439 09:53:19.695625
2440 09:53:19.695926 DQS0 dly: 34
2441 09:53:19.698550 DQS1 dly: 33
2442 09:53:19.698939 Write Rank0 MR2 =0x2d
2443 09:53:19.705220 [RankSwap] Rank num 2, (Multi 1), Rank 0
2444 09:53:19.705745 Write Rank0 MR1 =0xd6
2445 09:53:19.706058 [Gating]
2446 09:53:19.706336 ==
2447 09:53:19.711543 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2448 09:53:19.714896 fsp= 1, odt_onoff= 1, Byte mode= 0
2449 09:53:19.715392 ==
2450 09:53:19.717961 3 1 0 |2c2b 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2451 09:53:19.724448 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2452 09:53:19.728008 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2453 09:53:19.730817 3 1 12 |2c2b 2524 |(11 11)(11 11) |(1 1)(0 0)| 0
2454 09:53:19.737411 3 1 16 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2455 09:53:19.741165 [Byte 0] Lead/lag falling Transition (3, 1, 16)
2456 09:53:19.743948 3 1 20 |2c2b 1111 |(11 11)(11 11) |(1 0)(0 0)| 0
2457 09:53:19.750927 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2458 09:53:19.754188 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2459 09:53:19.757068 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2460 09:53:19.760513 [Byte 1] Lead/lag Transition tap number (1)
2461 09:53:19.767001 3 2 4 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2462 09:53:19.770040 3 2 8 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 0)| 0
2463 09:53:19.773814 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2464 09:53:19.780235 3 2 16 |2c2b 3434 |(11 11)(11 11) |(1 0)(1 1)| 0
2465 09:53:19.783181 3 2 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2466 09:53:19.786321 [Byte 0] Lead/lag Transition tap number (10)
2467 09:53:19.793300 3 2 24 |302 3434 |(11 11)(0 0) |(0 0)(0 1)| 0
2468 09:53:19.796420 3 2 28 |3534 909 |(11 11)(11 11) |(0 0)(1 1)| 0
2469 09:53:19.799582 3 3 0 |3534 2c2c |(11 11)(11 11) |(0 0)(1 1)| 0
2470 09:53:19.806661 3 3 4 |3534 3b3b |(11 11)(11 11) |(0 0)(1 1)| 0
2471 09:53:19.810088 3 3 8 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2472 09:53:19.813483 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2473 09:53:19.816292 3 3 16 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2474 09:53:19.822823 3 3 20 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2475 09:53:19.826154 3 3 24 |3534 3837 |(11 11)(11 11) |(1 1)(1 1)| 0
2476 09:53:19.832707 3 3 28 |3534 1010 |(11 11)(11 11) |(0 0)(1 1)| 0
2477 09:53:19.835850 3 4 0 |3534 1d1c |(11 11)(11 11) |(0 0)(1 1)| 0
2478 09:53:19.839216 [Byte 1] Lead/lag Transition tap number (1)
2479 09:53:19.842368 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2480 09:53:19.849155 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2481 09:53:19.852527 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2482 09:53:19.856157 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2483 09:53:19.862335 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2484 09:53:19.865649 3 4 24 |a09 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2485 09:53:19.868824 3 4 28 |e0e 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2486 09:53:19.875517 3 5 0 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
2487 09:53:19.878639 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2488 09:53:19.882403 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2489 09:53:19.888385 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2490 09:53:19.891083 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2491 09:53:19.894981 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2492 09:53:19.901070 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2493 09:53:19.904803 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2494 09:53:19.908095 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2495 09:53:19.914694 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2496 09:53:19.917645 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2497 09:53:19.921209 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2498 09:53:19.927985 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2499 09:53:19.930844 [Byte 0] Lead/lag falling Transition (3, 6, 16)
2500 09:53:19.934114 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2501 09:53:19.937578 [Byte 0] Lead/lag Transition tap number (2)
2502 09:53:19.944158 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2503 09:53:19.947530 3 6 24 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2504 09:53:19.950521 [Byte 1] Lead/lag Transition tap number (2)
2505 09:53:19.954279 3 6 28 |1010 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2506 09:53:19.960268 3 7 0 |4646 909 |(0 0)(11 11) |(0 0)(0 0)| 0
2507 09:53:19.964045 [Byte 0]First pass (3, 7, 0)
2508 09:53:19.966807 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2509 09:53:19.970338 [Byte 1]First pass (3, 7, 4)
2510 09:53:19.974078 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2511 09:53:19.976941 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2512 09:53:19.980495 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2513 09:53:19.983624 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2514 09:53:19.990106 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2515 09:53:19.992966 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2516 09:53:19.996344 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2517 09:53:19.999584 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2518 09:53:20.006546 All bytes gating window > 1UI, Early break!
2519 09:53:20.007046
2520 09:53:20.009544 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 20)
2521 09:53:20.010015
2522 09:53:20.012708 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)
2523 09:53:20.013132
2524 09:53:20.013435
2525 09:53:20.013766
2526 09:53:20.015725 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2527 09:53:20.016112
2528 09:53:20.019751 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)
2529 09:53:20.020232
2530 09:53:20.022821
2531 09:53:20.023207 Write Rank0 MR1 =0x56
2532 09:53:20.023509
2533 09:53:20.025864 best RODT dly(2T, 0.5T) = (2, 3)
2534 09:53:20.026249
2535 09:53:20.029307 best RODT dly(2T, 0.5T) = (2, 3)
2536 09:53:20.029746 ==
2537 09:53:20.035912 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2538 09:53:20.039210 fsp= 1, odt_onoff= 1, Byte mode= 0
2539 09:53:20.039720 ==
2540 09:53:20.042277 Start DQ dly to find pass range UseTestEngine =0
2541 09:53:20.045584 x-axis: bit #, y-axis: DQ dly (-127~63)
2542 09:53:20.049145 RX Vref Scan = 0
2543 09:53:20.049719 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2544 09:53:20.052361 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2545 09:53:20.055642 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2546 09:53:20.058700 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2547 09:53:20.062243 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2548 09:53:20.065758 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2549 09:53:20.068478 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2550 09:53:20.071906 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2551 09:53:20.075046 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2552 09:53:20.075486 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2553 09:53:20.078440 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2554 09:53:20.082060 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2555 09:53:20.084931 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2556 09:53:20.088730 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2557 09:53:20.091923 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2558 09:53:20.094968 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2559 09:53:20.098280 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2560 09:53:20.101742 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2561 09:53:20.102262 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2562 09:53:20.104705 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2563 09:53:20.108023 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2564 09:53:20.111472 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2565 09:53:20.114761 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2566 09:53:20.117936 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2567 09:53:20.120789 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2568 09:53:20.121185 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2569 09:53:20.124367 0, [0] xxxxxxxx xoxxxxxo [MSB]
2570 09:53:20.128233 1, [0] xxxoxxxx ooxxxxxo [MSB]
2571 09:53:20.131079 2, [0] xxxoxxxx ooxxxxxo [MSB]
2572 09:53:20.134497 3, [0] xxooxxxx oooxxxxo [MSB]
2573 09:53:20.137250 4, [0] xooooxxo ooooxxxo [MSB]
2574 09:53:20.140729 5, [0] xooooxxo ooooxooo [MSB]
2575 09:53:20.141268 6, [0] xooooxxo oooooooo [MSB]
2576 09:53:20.144062 7, [0] xooooooo oooooooo [MSB]
2577 09:53:20.147330 8, [0] xooooooo oooooooo [MSB]
2578 09:53:20.150859 33, [0] oooxoooo ooooooox [MSB]
2579 09:53:20.153884 34, [0] oooxoooo ooooooox [MSB]
2580 09:53:20.157379 35, [0] oooxoooo xoooooox [MSB]
2581 09:53:20.160525 36, [0] oooxoooo xxooooox [MSB]
2582 09:53:20.161039 37, [0] ooxxoooo xxooooox [MSB]
2583 09:53:20.163914 38, [0] ooxxoooo xxooooox [MSB]
2584 09:53:20.166803 39, [0] xxxxxoox xxooxoox [MSB]
2585 09:53:20.170255 40, [0] xxxxxoox xxxoxoox [MSB]
2586 09:53:20.173725 41, [0] xxxxxxxx xxxxxxxx [MSB]
2587 09:53:20.176815 iDelay=41, Bit 0, Center 23 (9 ~ 38) 30
2588 09:53:20.179767 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2589 09:53:20.183343 iDelay=41, Bit 2, Center 19 (3 ~ 36) 34
2590 09:53:20.186449 iDelay=41, Bit 3, Center 16 (1 ~ 32) 32
2591 09:53:20.190143 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
2592 09:53:20.193320 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2593 09:53:20.196637 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2594 09:53:20.203122 iDelay=41, Bit 7, Center 21 (4 ~ 38) 35
2595 09:53:20.206306 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
2596 09:53:20.209735 iDelay=41, Bit 9, Center 17 (0 ~ 35) 36
2597 09:53:20.212644 iDelay=41, Bit 10, Center 21 (3 ~ 39) 37
2598 09:53:20.216170 iDelay=41, Bit 11, Center 22 (4 ~ 40) 37
2599 09:53:20.219147 iDelay=41, Bit 12, Center 22 (6 ~ 38) 33
2600 09:53:20.222595 iDelay=41, Bit 13, Center 22 (5 ~ 40) 36
2601 09:53:20.226010 iDelay=41, Bit 14, Center 22 (5 ~ 40) 36
2602 09:53:20.229760 iDelay=41, Bit 15, Center 14 (-4 ~ 32) 37
2603 09:53:20.230265 ==
2604 09:53:20.236081 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2605 09:53:20.239595 fsp= 1, odt_onoff= 1, Byte mode= 0
2606 09:53:20.240105 ==
2607 09:53:20.240449 DQS Delay:
2608 09:53:20.242562 DQS0 = 0, DQS1 = 0
2609 09:53:20.242993 DQM Delay:
2610 09:53:20.245791 DQM0 = 20, DQM1 = 19
2611 09:53:20.246310 DQ Delay:
2612 09:53:20.248816 DQ0 =23, DQ1 =21, DQ2 =19, DQ3 =16
2613 09:53:20.252210 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2614 09:53:20.255381 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2615 09:53:20.258425 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
2616 09:53:20.258864
2617 09:53:20.259296
2618 09:53:20.261897 DramC Write-DBI off
2619 09:53:20.262323 ==
2620 09:53:20.264897 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2621 09:53:20.268172 fsp= 1, odt_onoff= 1, Byte mode= 0
2622 09:53:20.268602 ==
2623 09:53:20.275325 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2624 09:53:20.275761
2625 09:53:20.276070 Begin, DQ Scan Range 929~1185
2626 09:53:20.278261
2627 09:53:20.278650
2628 09:53:20.278949 TX Vref Scan disable
2629 09:53:20.281502 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2630 09:53:20.284604 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2631 09:53:20.288415 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2632 09:53:20.291573 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2633 09:53:20.298037 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2634 09:53:20.301280 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2635 09:53:20.304589 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2636 09:53:20.307884 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2637 09:53:20.311169 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2638 09:53:20.314504 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2639 09:53:20.317724 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2640 09:53:20.321001 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2641 09:53:20.324034 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2642 09:53:20.327639 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2643 09:53:20.330809 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2644 09:53:20.334000 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2645 09:53:20.340569 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2646 09:53:20.343693 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2647 09:53:20.347174 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2648 09:53:20.350390 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2649 09:53:20.353570 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2650 09:53:20.357009 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2651 09:53:20.360021 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2652 09:53:20.363221 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2653 09:53:20.366945 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2654 09:53:20.369691 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2655 09:53:20.373066 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2656 09:53:20.376668 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2657 09:53:20.379590 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2658 09:53:20.382769 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2659 09:53:20.389769 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2660 09:53:20.392709 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2661 09:53:20.396282 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2662 09:53:20.399089 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2663 09:53:20.402995 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2664 09:53:20.406135 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2665 09:53:20.409477 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2666 09:53:20.412719 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2667 09:53:20.416280 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2668 09:53:20.419220 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2669 09:53:20.422529 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2670 09:53:20.426095 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2671 09:53:20.429097 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2672 09:53:20.432652 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2673 09:53:20.435858 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2674 09:53:20.439172 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2675 09:53:20.442452 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2676 09:53:20.449197 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2677 09:53:20.452131 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2678 09:53:20.455484 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2679 09:53:20.458569 979 |3 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2680 09:53:20.461974 980 |3 6 20|[0] xxxxxxxx oxxxxxxo [MSB]
2681 09:53:20.465465 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2682 09:53:20.468676 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2683 09:53:20.471570 983 |3 6 23|[0] xxxxxxxx ooxxxxxo [MSB]
2684 09:53:20.475124 984 |3 6 24|[0] xooooxoo oooxxxoo [MSB]
2685 09:53:20.482621 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2686 09:53:20.485458 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2687 09:53:20.489189 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2688 09:53:20.492992 999 |3 6 39|[0] oooooooo oxooooox [MSB]
2689 09:53:20.495601 1000 |3 6 40|[0] oooooooo oxooooox [MSB]
2690 09:53:20.498914 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2691 09:53:20.502040 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2692 09:53:20.505716 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2693 09:53:20.509139 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2694 09:53:20.511597 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2695 09:53:20.518141 1006 |3 6 46|[0] ooxxooox xxxxxxxx [MSB]
2696 09:53:20.522154 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2697 09:53:20.525088 Byte0, DQ PI dly=993, DQM PI dly= 993
2698 09:53:20.528632 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2699 09:53:20.529138
2700 09:53:20.531791 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2701 09:53:20.532228
2702 09:53:20.534739 Byte1, DQ PI dly=989, DQM PI dly= 989
2703 09:53:20.542203 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2704 09:53:20.542714
2705 09:53:20.544806 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2706 09:53:20.545243
2707 09:53:20.545630 ==
2708 09:53:20.551204 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2709 09:53:20.554728 fsp= 1, odt_onoff= 1, Byte mode= 0
2710 09:53:20.555122 ==
2711 09:53:20.558400 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2712 09:53:20.558820
2713 09:53:20.560969 Begin, DQ Scan Range 965~1029
2714 09:53:20.564811 Write Rank0 MR14 =0x0
2715 09:53:20.570887
2716 09:53:20.571421 CH=1, VrefRange= 0, VrefLevel = 0
2717 09:53:20.577130 TX Bit0 (986~1002) 17 994, Bit8 (984~994) 11 989,
2718 09:53:20.580595 TX Bit1 (985~1001) 17 993, Bit9 (984~993) 10 988,
2719 09:53:20.587296 TX Bit2 (984~998) 15 991, Bit10 (986~997) 12 991,
2720 09:53:20.590160 TX Bit3 (983~994) 12 988, Bit11 (986~997) 12 991,
2721 09:53:20.593706 TX Bit4 (985~1000) 16 992, Bit12 (986~997) 12 991,
2722 09:53:20.600502 TX Bit5 (986~1001) 16 993, Bit13 (987~997) 11 992,
2723 09:53:20.603013 TX Bit6 (985~1001) 17 993, Bit14 (986~994) 9 990,
2724 09:53:20.610231 TX Bit7 (986~999) 14 992, Bit15 (981~989) 9 985,
2725 09:53:20.610696
2726 09:53:20.610997 Write Rank0 MR14 =0x2
2727 09:53:20.619103
2728 09:53:20.619483 CH=1, VrefRange= 0, VrefLevel = 2
2729 09:53:20.625641 TX Bit0 (986~1003) 18 994, Bit8 (984~994) 11 989,
2730 09:53:20.628510 TX Bit1 (985~1001) 17 993, Bit9 (984~994) 11 989,
2731 09:53:20.635124 TX Bit2 (984~998) 15 991, Bit10 (986~999) 14 992,
2732 09:53:20.638449 TX Bit3 (983~995) 13 989, Bit11 (987~998) 12 992,
2733 09:53:20.641963 TX Bit4 (985~1001) 17 993, Bit12 (986~998) 13 992,
2734 09:53:20.648548 TX Bit5 (986~1002) 17 994, Bit13 (987~997) 11 992,
2735 09:53:20.651557 TX Bit6 (985~1002) 18 993, Bit14 (986~995) 10 990,
2736 09:53:20.657799 TX Bit7 (985~1000) 16 992, Bit15 (981~991) 11 986,
2737 09:53:20.658251
2738 09:53:20.658549 Write Rank0 MR14 =0x4
2739 09:53:20.667662
2740 09:53:20.668043 CH=1, VrefRange= 0, VrefLevel = 4
2741 09:53:20.674398 TX Bit0 (985~1003) 19 994, Bit8 (983~995) 13 989,
2742 09:53:20.677338 TX Bit1 (984~1002) 19 993, Bit9 (984~994) 11 989,
2743 09:53:20.683419 TX Bit2 (983~999) 17 991, Bit10 (986~1000) 15 993,
2744 09:53:20.687689 TX Bit3 (982~996) 15 989, Bit11 (986~998) 13 992,
2745 09:53:20.690538 TX Bit4 (985~1002) 18 993, Bit12 (986~999) 14 992,
2746 09:53:20.697075 TX Bit5 (985~1003) 19 994, Bit13 (987~999) 13 993,
2747 09:53:20.700077 TX Bit6 (985~1002) 18 993, Bit14 (986~995) 10 990,
2748 09:53:20.706982 TX Bit7 (985~1000) 16 992, Bit15 (980~992) 13 986,
2749 09:53:20.707499
2750 09:53:20.707805 Write Rank0 MR14 =0x6
2751 09:53:20.716372
2752 09:53:20.716752 CH=1, VrefRange= 0, VrefLevel = 6
2753 09:53:20.722205 TX Bit0 (985~1004) 20 994, Bit8 (984~995) 12 989,
2754 09:53:20.726126 TX Bit1 (985~1003) 19 994, Bit9 (983~995) 13 989,
2755 09:53:20.732561 TX Bit2 (983~1000) 18 991, Bit10 (985~1000) 16 992,
2756 09:53:20.735569 TX Bit3 (982~997) 16 989, Bit11 (985~1000) 16 992,
2757 09:53:20.742295 TX Bit4 (984~1003) 20 993, Bit12 (985~1000) 16 992,
2758 09:53:20.745980 TX Bit5 (985~1004) 20 994, Bit13 (986~1000) 15 993,
2759 09:53:20.748526 TX Bit6 (985~1003) 19 994, Bit14 (985~997) 13 991,
2760 09:53:20.755317 TX Bit7 (985~1001) 17 993, Bit15 (979~992) 14 985,
2761 09:53:20.755772
2762 09:53:20.758407 Write Rank0 MR14 =0x8
2763 09:53:20.765071
2764 09:53:20.765453 CH=1, VrefRange= 0, VrefLevel = 8
2765 09:53:20.771625 TX Bit0 (985~1005) 21 995, Bit8 (982~996) 15 989,
2766 09:53:20.775052 TX Bit1 (984~1004) 21 994, Bit9 (982~995) 14 988,
2767 09:53:20.782146 TX Bit2 (983~1000) 18 991, Bit10 (985~1001) 17 993,
2768 09:53:20.785041 TX Bit3 (981~998) 18 989, Bit11 (986~1001) 16 993,
2769 09:53:20.791208 TX Bit4 (984~1003) 20 993, Bit12 (985~1000) 16 992,
2770 09:53:20.794912 TX Bit5 (985~1005) 21 995, Bit13 (986~1000) 15 993,
2771 09:53:20.798143 TX Bit6 (985~1004) 20 994, Bit14 (985~998) 14 991,
2772 09:53:20.805071 TX Bit7 (985~1002) 18 993, Bit15 (979~993) 15 986,
2773 09:53:20.805544
2774 09:53:20.807653 Write Rank0 MR14 =0xa
2775 09:53:20.814297
2776 09:53:20.817898 CH=1, VrefRange= 0, VrefLevel = 10
2777 09:53:20.821207 TX Bit0 (985~1005) 21 995, Bit8 (982~997) 16 989,
2778 09:53:20.824007 TX Bit1 (984~1005) 22 994, Bit9 (982~996) 15 989,
2779 09:53:20.830790 TX Bit2 (982~1001) 20 991, Bit10 (985~1001) 17 993,
2780 09:53:20.833888 TX Bit3 (981~998) 18 989, Bit11 (985~1001) 17 993,
2781 09:53:20.840536 TX Bit4 (984~1004) 21 994, Bit12 (985~1001) 17 993,
2782 09:53:20.843945 TX Bit5 (985~1005) 21 995, Bit13 (986~1001) 16 993,
2783 09:53:20.850238 TX Bit6 (984~1005) 22 994, Bit14 (985~998) 14 991,
2784 09:53:20.853807 TX Bit7 (984~1003) 20 993, Bit15 (979~993) 15 986,
2785 09:53:20.854322
2786 09:53:20.856778 Write Rank0 MR14 =0xc
2787 09:53:20.863806
2788 09:53:20.867064 CH=1, VrefRange= 0, VrefLevel = 12
2789 09:53:20.870537 TX Bit0 (985~1006) 22 995, Bit8 (982~998) 17 990,
2790 09:53:20.873711 TX Bit1 (984~1005) 22 994, Bit9 (982~997) 16 989,
2791 09:53:20.880162 TX Bit2 (983~1002) 20 992, Bit10 (985~1001) 17 993,
2792 09:53:20.883465 TX Bit3 (980~999) 20 989, Bit11 (985~1001) 17 993,
2793 09:53:20.890263 TX Bit4 (984~1005) 22 994, Bit12 (985~1001) 17 993,
2794 09:53:20.893226 TX Bit5 (985~1005) 21 995, Bit13 (986~1001) 16 993,
2795 09:53:20.899643 TX Bit6 (984~1005) 22 994, Bit14 (985~1000) 16 992,
2796 09:53:20.903298 TX Bit7 (984~1004) 21 994, Bit15 (979~994) 16 986,
2797 09:53:20.903816
2798 09:53:20.906387 Write Rank0 MR14 =0xe
2799 09:53:20.913591
2800 09:53:20.916964 CH=1, VrefRange= 0, VrefLevel = 14
2801 09:53:20.919992 TX Bit0 (985~1006) 22 995, Bit8 (981~998) 18 989,
2802 09:53:20.923047 TX Bit1 (984~1006) 23 995, Bit9 (981~997) 17 989,
2803 09:53:20.930232 TX Bit2 (982~1003) 22 992, Bit10 (984~1002) 19 993,
2804 09:53:20.933179 TX Bit3 (980~1000) 21 990, Bit11 (984~1001) 18 992,
2805 09:53:20.939794 TX Bit4 (984~1005) 22 994, Bit12 (985~1001) 17 993,
2806 09:53:20.942520 TX Bit5 (985~1006) 22 995, Bit13 (985~1001) 17 993,
2807 09:53:20.950000 TX Bit6 (984~1005) 22 994, Bit14 (985~1000) 16 992,
2808 09:53:20.952993 TX Bit7 (984~1005) 22 994, Bit15 (978~994) 17 986,
2809 09:53:20.953508
2810 09:53:20.956293 Write Rank0 MR14 =0x10
2811 09:53:20.963048
2812 09:53:20.966574 CH=1, VrefRange= 0, VrefLevel = 16
2813 09:53:20.970086 TX Bit0 (985~1006) 22 995, Bit8 (980~1000) 21 990,
2814 09:53:20.972886 TX Bit1 (983~1006) 24 994, Bit9 (981~997) 17 989,
2815 09:53:20.979325 TX Bit2 (982~1003) 22 992, Bit10 (984~1002) 19 993,
2816 09:53:20.982799 TX Bit3 (979~1000) 22 989, Bit11 (985~1002) 18 993,
2817 09:53:20.989088 TX Bit4 (984~1005) 22 994, Bit12 (985~1002) 18 993,
2818 09:53:20.993156 TX Bit5 (985~1006) 22 995, Bit13 (985~1002) 18 993,
2819 09:53:20.998845 TX Bit6 (984~1006) 23 995, Bit14 (984~1001) 18 992,
2820 09:53:21.002474 TX Bit7 (984~1005) 22 994, Bit15 (978~994) 17 986,
2821 09:53:21.002976
2822 09:53:21.005692 Write Rank0 MR14 =0x12
2823 09:53:21.012950
2824 09:53:21.016130 CH=1, VrefRange= 0, VrefLevel = 18
2825 09:53:21.019671 TX Bit0 (984~1007) 24 995, Bit8 (980~1000) 21 990,
2826 09:53:21.022961 TX Bit1 (983~1006) 24 994, Bit9 (980~999) 20 989,
2827 09:53:21.029362 TX Bit2 (981~1004) 24 992, Bit10 (983~1002) 20 992,
2828 09:53:21.032940 TX Bit3 (979~1001) 23 990, Bit11 (985~1002) 18 993,
2829 09:53:21.038810 TX Bit4 (984~1006) 23 995, Bit12 (984~1002) 19 993,
2830 09:53:21.042774 TX Bit5 (984~1006) 23 995, Bit13 (985~1002) 18 993,
2831 09:53:21.049410 TX Bit6 (984~1006) 23 995, Bit14 (984~1001) 18 992,
2832 09:53:21.052595 TX Bit7 (984~1006) 23 995, Bit15 (977~995) 19 986,
2833 09:53:21.053123
2834 09:53:21.055863 Write Rank0 MR14 =0x14
2835 09:53:21.063147
2836 09:53:21.066283 CH=1, VrefRange= 0, VrefLevel = 20
2837 09:53:21.069888 TX Bit0 (984~1007) 24 995, Bit8 (979~1000) 22 989,
2838 09:53:21.072643 TX Bit1 (983~1006) 24 994, Bit9 (980~1000) 21 990,
2839 09:53:21.078950 TX Bit2 (981~1005) 25 993, Bit10 (983~1003) 21 993,
2840 09:53:21.082834 TX Bit3 (979~1001) 23 990, Bit11 (985~1003) 19 994,
2841 09:53:21.088950 TX Bit4 (983~1006) 24 994, Bit12 (984~1002) 19 993,
2842 09:53:21.092494 TX Bit5 (984~1007) 24 995, Bit13 (985~1002) 18 993,
2843 09:53:21.099007 TX Bit6 (984~1006) 23 995, Bit14 (984~1001) 18 992,
2844 09:53:21.102154 TX Bit7 (983~1005) 23 994, Bit15 (978~995) 18 986,
2845 09:53:21.102583
2846 09:53:21.105720 Write Rank0 MR14 =0x16
2847 09:53:21.112969
2848 09:53:21.116372 CH=1, VrefRange= 0, VrefLevel = 22
2849 09:53:21.119574 TX Bit0 (984~1007) 24 995, Bit8 (979~1001) 23 990,
2850 09:53:21.122786 TX Bit1 (983~1007) 25 995, Bit9 (980~1000) 21 990,
2851 09:53:21.129360 TX Bit2 (980~1005) 26 992, Bit10 (983~1003) 21 993,
2852 09:53:21.132411 TX Bit3 (978~1001) 24 989, Bit11 (984~1003) 20 993,
2853 09:53:21.139268 TX Bit4 (983~1007) 25 995, Bit12 (984~1003) 20 993,
2854 09:53:21.142550 TX Bit5 (984~1007) 24 995, Bit13 (985~1003) 19 994,
2855 09:53:21.148905 TX Bit6 (983~1007) 25 995, Bit14 (984~1002) 19 993,
2856 09:53:21.152330 TX Bit7 (983~1006) 24 994, Bit15 (977~997) 21 987,
2857 09:53:21.152872
2858 09:53:21.155771 Write Rank0 MR14 =0x18
2859 09:53:21.163211
2860 09:53:21.166544 CH=1, VrefRange= 0, VrefLevel = 24
2861 09:53:21.170258 TX Bit0 (984~1008) 25 996, Bit8 (979~1001) 23 990,
2862 09:53:21.173384 TX Bit1 (983~1007) 25 995, Bit9 (980~1001) 22 990,
2863 09:53:21.179714 TX Bit2 (980~1006) 27 993, Bit10 (982~1004) 23 993,
2864 09:53:21.182743 TX Bit3 (978~1002) 25 990, Bit11 (983~1004) 22 993,
2865 09:53:21.189367 TX Bit4 (983~1006) 24 994, Bit12 (984~1003) 20 993,
2866 09:53:21.192435 TX Bit5 (984~1007) 24 995, Bit13 (985~1003) 19 994,
2867 09:53:21.199549 TX Bit6 (983~1006) 24 994, Bit14 (982~1002) 21 992,
2868 09:53:21.202549 TX Bit7 (983~1006) 24 994, Bit15 (977~997) 21 987,
2869 09:53:21.202979
2870 09:53:21.205394 Write Rank0 MR14 =0x1a
2871 09:53:21.213518
2872 09:53:21.216770 CH=1, VrefRange= 0, VrefLevel = 26
2873 09:53:21.219907 TX Bit0 (984~1008) 25 996, Bit8 (979~1001) 23 990,
2874 09:53:21.223317 TX Bit1 (982~1007) 26 994, Bit9 (979~1001) 23 990,
2875 09:53:21.229535 TX Bit2 (980~1006) 27 993, Bit10 (982~1003) 22 992,
2876 09:53:21.232788 TX Bit3 (978~1003) 26 990, Bit11 (983~1004) 22 993,
2877 09:53:21.240006 TX Bit4 (982~1007) 26 994, Bit12 (983~1004) 22 993,
2878 09:53:21.243004 TX Bit5 (984~1007) 24 995, Bit13 (984~1004) 21 994,
2879 09:53:21.249759 TX Bit6 (983~1007) 25 995, Bit14 (983~1002) 20 992,
2880 09:53:21.253062 TX Bit7 (983~1007) 25 995, Bit15 (977~998) 22 987,
2881 09:53:21.253617
2882 09:53:21.256219 Write Rank0 MR14 =0x1c
2883 09:53:21.263707
2884 09:53:21.266623 CH=1, VrefRange= 0, VrefLevel = 28
2885 09:53:21.269883 TX Bit0 (984~1008) 25 996, Bit8 (979~1002) 24 990,
2886 09:53:21.273208 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2887 09:53:21.279740 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2888 09:53:21.283122 TX Bit3 (978~1004) 27 991, Bit11 (983~1004) 22 993,
2889 09:53:21.289635 TX Bit4 (982~1007) 26 994, Bit12 (984~1004) 21 994,
2890 09:53:21.292892 TX Bit5 (984~1008) 25 996, Bit13 (984~1004) 21 994,
2891 09:53:21.299334 TX Bit6 (983~1007) 25 995, Bit14 (982~1003) 22 992,
2892 09:53:21.302662 TX Bit7 (982~1007) 26 994, Bit15 (976~999) 24 987,
2893 09:53:21.303176
2894 09:53:21.306022 Write Rank0 MR14 =0x1e
2895 09:53:21.313677
2896 09:53:21.317239 CH=1, VrefRange= 0, VrefLevel = 30
2897 09:53:21.320100 TX Bit0 (984~1008) 25 996, Bit8 (979~1002) 24 990,
2898 09:53:21.323572 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2899 09:53:21.329977 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2900 09:53:21.333331 TX Bit3 (978~1004) 27 991, Bit11 (983~1004) 22 993,
2901 09:53:21.339919 TX Bit4 (982~1007) 26 994, Bit12 (984~1004) 21 994,
2902 09:53:21.342880 TX Bit5 (984~1008) 25 996, Bit13 (984~1004) 21 994,
2903 09:53:21.349706 TX Bit6 (983~1007) 25 995, Bit14 (982~1003) 22 992,
2904 09:53:21.352711 TX Bit7 (982~1007) 26 994, Bit15 (976~999) 24 987,
2905 09:53:21.353146
2906 09:53:21.356030 Write Rank0 MR14 =0x20
2907 09:53:21.364349
2908 09:53:21.367513 CH=1, VrefRange= 0, VrefLevel = 32
2909 09:53:21.370657 TX Bit0 (984~1008) 25 996, Bit8 (979~1002) 24 990,
2910 09:53:21.373902 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2911 09:53:21.380072 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2912 09:53:21.383404 TX Bit3 (978~1004) 27 991, Bit11 (983~1004) 22 993,
2913 09:53:21.390318 TX Bit4 (982~1007) 26 994, Bit12 (984~1004) 21 994,
2914 09:53:21.393305 TX Bit5 (984~1008) 25 996, Bit13 (984~1004) 21 994,
2915 09:53:21.400276 TX Bit6 (983~1007) 25 995, Bit14 (982~1003) 22 992,
2916 09:53:21.402849 TX Bit7 (982~1007) 26 994, Bit15 (976~999) 24 987,
2917 09:53:21.403241
2918 09:53:21.406449 Write Rank0 MR14 =0x22
2919 09:53:21.414187
2920 09:53:21.417459 CH=1, VrefRange= 0, VrefLevel = 34
2921 09:53:21.420947 TX Bit0 (984~1008) 25 996, Bit8 (979~1002) 24 990,
2922 09:53:21.424046 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2923 09:53:21.430538 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2924 09:53:21.433717 TX Bit3 (978~1004) 27 991, Bit11 (983~1004) 22 993,
2925 09:53:21.440070 TX Bit4 (982~1007) 26 994, Bit12 (984~1004) 21 994,
2926 09:53:21.443358 TX Bit5 (984~1008) 25 996, Bit13 (984~1004) 21 994,
2927 09:53:21.450200 TX Bit6 (983~1007) 25 995, Bit14 (982~1003) 22 992,
2928 09:53:21.453512 TX Bit7 (982~1007) 26 994, Bit15 (976~999) 24 987,
2929 09:53:21.454024
2930 09:53:21.454329
2931 09:53:21.456665 TX Vref found, early break! 366< 368
2932 09:53:21.463592 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2933 09:53:21.466711 u1DelayCellOfst[0]=6 cells (5 PI)
2934 09:53:21.467223 u1DelayCellOfst[1]=5 cells (4 PI)
2935 09:53:21.469809 u1DelayCellOfst[2]=1 cells (1 PI)
2936 09:53:21.472847 u1DelayCellOfst[3]=0 cells (0 PI)
2937 09:53:21.476709 u1DelayCellOfst[4]=3 cells (3 PI)
2938 09:53:21.479927 u1DelayCellOfst[5]=6 cells (5 PI)
2939 09:53:21.483190 u1DelayCellOfst[6]=5 cells (4 PI)
2940 09:53:21.486151 u1DelayCellOfst[7]=3 cells (3 PI)
2941 09:53:21.489245 Byte0, DQ PI dly=991, DQM PI dly= 993
2942 09:53:21.493257 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2943 09:53:21.493869
2944 09:53:21.499398 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2945 09:53:21.499828
2946 09:53:21.502748 u1DelayCellOfst[8]=3 cells (3 PI)
2947 09:53:21.505588 u1DelayCellOfst[9]=2 cells (2 PI)
2948 09:53:21.506024 u1DelayCellOfst[10]=6 cells (5 PI)
2949 09:53:21.509544 u1DelayCellOfst[11]=7 cells (6 PI)
2950 09:53:21.512260 u1DelayCellOfst[12]=9 cells (7 PI)
2951 09:53:21.515974 u1DelayCellOfst[13]=9 cells (7 PI)
2952 09:53:21.518494 u1DelayCellOfst[14]=6 cells (5 PI)
2953 09:53:21.522183 u1DelayCellOfst[15]=0 cells (0 PI)
2954 09:53:21.525582 Byte1, DQ PI dly=987, DQM PI dly= 990
2955 09:53:21.531998 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2956 09:53:21.532537
2957 09:53:21.534748 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2958 09:53:21.535289
2959 09:53:21.538615 Write Rank0 MR14 =0x1c
2960 09:53:21.539169
2961 09:53:21.539607 Final TX Range 0 Vref 28
2962 09:53:21.539933
2963 09:53:21.544589 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2964 09:53:21.547932
2965 09:53:21.551148 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2966 09:53:21.561177 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2967 09:53:21.567683 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2968 09:53:21.568144 Write Rank0 MR3 =0xb0
2969 09:53:21.570698 DramC Write-DBI on
2970 09:53:21.571086 ==
2971 09:53:21.577544 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2972 09:53:21.577970 fsp= 1, odt_onoff= 1, Byte mode= 0
2973 09:53:21.580831 ==
2974 09:53:21.584205 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2975 09:53:21.584691
2976 09:53:21.587459 Begin, DQ Scan Range 710~774
2977 09:53:21.587937
2978 09:53:21.588245
2979 09:53:21.588524 TX Vref Scan disable
2980 09:53:21.590642 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2981 09:53:21.597313 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2982 09:53:21.600672 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2983 09:53:21.603479 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2984 09:53:21.606536 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2985 09:53:21.610556 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2986 09:53:21.613580 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2987 09:53:21.616813 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2988 09:53:21.619962 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2989 09:53:21.623056 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2990 09:53:21.626411 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2991 09:53:21.630097 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2992 09:53:21.632892 722 |2 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2993 09:53:21.636687 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2994 09:53:21.642778 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2995 09:53:21.646024 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2996 09:53:21.649652 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2997 09:53:21.652612 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2998 09:53:21.659814 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2999 09:53:21.662902 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3000 09:53:21.666177 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3001 09:53:21.669617 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3002 09:53:21.672771 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3003 09:53:21.676228 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3004 09:53:21.679291 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3005 09:53:21.683077 Byte0, DQ PI dly=740, DQM PI dly= 740
3006 09:53:21.686478 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 36)
3007 09:53:21.686989
3008 09:53:21.693059 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 36)
3009 09:53:21.693730
3010 09:53:21.696322 Byte1, DQ PI dly=734, DQM PI dly= 734
3011 09:53:21.699052 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
3012 09:53:21.699486
3013 09:53:21.702723 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
3014 09:53:21.705944
3015 09:53:21.709287 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3016 09:53:21.719008 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3017 09:53:21.725463 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3018 09:53:21.725924 Write Rank0 MR3 =0x30
3019 09:53:21.728801 DramC Write-DBI off
3020 09:53:21.729307
3021 09:53:21.729712 [DATLAT]
3022 09:53:21.732271 Freq=1600, CH1 RK0, use_rxtx_scan=0
3023 09:53:21.732698
3024 09:53:21.735543 DATLAT Default: 0xf
3025 09:53:21.735972 7, 0xFFFF, sum=0
3026 09:53:21.738654 8, 0xFFFF, sum=0
3027 09:53:21.739087 9, 0xFFFF, sum=0
3028 09:53:21.742124 10, 0xFFFF, sum=0
3029 09:53:21.742561 11, 0xFFFF, sum=0
3030 09:53:21.745441 12, 0xFFFF, sum=0
3031 09:53:21.746020 13, 0xFFFF, sum=0
3032 09:53:21.748617 14, 0x0, sum=1
3033 09:53:21.749137 15, 0x0, sum=2
3034 09:53:21.751913 16, 0x0, sum=3
3035 09:53:21.752462 17, 0x0, sum=4
3036 09:53:21.755338 pattern=2 first_step=14 total pass=5 best_step=16
3037 09:53:21.755852 ==
3038 09:53:21.761953 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3039 09:53:21.764822 fsp= 1, odt_onoff= 1, Byte mode= 0
3040 09:53:21.765333 ==
3041 09:53:21.768080 Start DQ dly to find pass range UseTestEngine =1
3042 09:53:21.771631 x-axis: bit #, y-axis: DQ dly (-127~63)
3043 09:53:21.774277 RX Vref Scan = 1
3044 09:53:21.881471
3045 09:53:21.881970 RX Vref found, early break!
3046 09:53:21.882308
3047 09:53:21.887630 Final RX Vref 11, apply to both rank0 and 1
3048 09:53:21.888021 ==
3049 09:53:21.891062 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3050 09:53:21.894207 fsp= 1, odt_onoff= 1, Byte mode= 0
3051 09:53:21.894598 ==
3052 09:53:21.897398 DQS Delay:
3053 09:53:21.897829 DQS0 = 0, DQS1 = 0
3054 09:53:21.898134 DQM Delay:
3055 09:53:21.901327 DQM0 = 20, DQM1 = 19
3056 09:53:21.901857 DQ Delay:
3057 09:53:21.904595 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
3058 09:53:21.907552 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
3059 09:53:21.910807 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
3060 09:53:21.914042 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
3061 09:53:21.914431
3062 09:53:21.914732
3063 09:53:21.915013
3064 09:53:21.917531 [DramC_TX_OE_Calibration] TA2
3065 09:53:21.920579 Original DQ_B0 (3 6) =30, OEN = 27
3066 09:53:21.923852 Original DQ_B1 (3 6) =30, OEN = 27
3067 09:53:21.927194 23, 0x0, End_B0=23 End_B1=23
3068 09:53:21.930388 24, 0x0, End_B0=24 End_B1=24
3069 09:53:21.930784 25, 0x0, End_B0=25 End_B1=25
3070 09:53:21.933846 26, 0x0, End_B0=26 End_B1=26
3071 09:53:21.937019 27, 0x0, End_B0=27 End_B1=27
3072 09:53:21.940072 28, 0x0, End_B0=28 End_B1=28
3073 09:53:21.943719 29, 0x0, End_B0=29 End_B1=29
3074 09:53:21.944128 30, 0x0, End_B0=30 End_B1=30
3075 09:53:21.946624 31, 0xFFFF, End_B0=30 End_B1=30
3076 09:53:21.953516 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3077 09:53:21.959973 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3078 09:53:21.960589
3079 09:53:21.961169
3080 09:53:21.961529 Write Rank0 MR23 =0x3f
3081 09:53:21.963286 [DQSOSC]
3082 09:53:21.969800 [DQSOSCAuto] RK0, (LSB)MR18= 0xacac, (MSB)MR19= 0x202, tDQSOscB0 = 460 ps tDQSOscB1 = 460 ps
3083 09:53:21.976623 CH1_RK0: MR19=0x202, MR18=0xACAC, DQSOSC=460, MR23=63, INC=11, DEC=17
3084 09:53:21.979873 Write Rank0 MR23 =0x3f
3085 09:53:21.980304 [DQSOSC]
3086 09:53:21.986739 [DQSOSCAuto] RK0, (LSB)MR18= 0xaaaa, (MSB)MR19= 0x202, tDQSOscB0 = 461 ps tDQSOscB1 = 461 ps
3087 09:53:21.990130 CH1 RK0: MR19=202, MR18=AAAA
3088 09:53:21.993270 [RankSwap] Rank num 2, (Multi 1), Rank 1
3089 09:53:21.995798 Write Rank0 MR2 =0xad
3090 09:53:21.996228 [Write Leveling]
3091 09:53:21.999665 delay byte0 byte1 byte2 byte3
3092 09:53:22.000190
3093 09:53:22.002705 10 0 0
3094 09:53:22.003142 11 0 0
3095 09:53:22.003485 12 0 0
3096 09:53:22.006013 13 0 0
3097 09:53:22.006452 14 0 0
3098 09:53:22.009237 15 0 0
3099 09:53:22.009717 16 0 0
3100 09:53:22.012417 17 0 0
3101 09:53:22.012855 18 0 0
3102 09:53:22.013197 19 0 0
3103 09:53:22.015503 20 0 0
3104 09:53:22.016001 21 0 0
3105 09:53:22.018958 22 0 0
3106 09:53:22.019424 23 0 0
3107 09:53:22.022097 24 0 0
3108 09:53:22.022535 25 0 0
3109 09:53:22.022890 26 0 0
3110 09:53:22.025182 27 0 0
3111 09:53:22.025611 28 0 0
3112 09:53:22.028762 29 0 ff
3113 09:53:22.029159 30 0 ff
3114 09:53:22.032046 31 0 ff
3115 09:53:22.032567 32 0 ff
3116 09:53:22.032887 33 ff ff
3117 09:53:22.035569 34 ff ff
3118 09:53:22.035969 35 ff ff
3119 09:53:22.038899 36 ff ff
3120 09:53:22.039299 37 ff ff
3121 09:53:22.042195 38 ff ff
3122 09:53:22.042594 39 ff ff
3123 09:53:22.048830 pass bytecount = 0xff (0xff: all bytes pass)
3124 09:53:22.049310
3125 09:53:22.049668 DQS0 dly: 33
3126 09:53:22.049965 DQS1 dly: 29
3127 09:53:22.051986 Write Rank0 MR2 =0x2d
3128 09:53:22.055273 [RankSwap] Rank num 2, (Multi 1), Rank 0
3129 09:53:22.058197 Write Rank1 MR1 =0xd6
3130 09:53:22.058598 [Gating]
3131 09:53:22.058910 ==
3132 09:53:22.064812 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3133 09:53:22.065295 fsp= 1, odt_onoff= 1, Byte mode= 0
3134 09:53:22.067869 ==
3135 09:53:22.071073 3 1 0 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
3136 09:53:22.074772 3 1 4 |2c2b 3333 |(11 11)(10 10) |(1 1)(0 0)| 0
3137 09:53:22.078029 3 1 8 |2c2b 3535 |(11 11)(0 0) |(1 1)(1 1)| 0
3138 09:53:22.084495 3 1 12 |2c2b 3535 |(11 11)(0 0) |(0 0)(1 1)| 0
3139 09:53:22.088200 3 1 16 |2c2b 3333 |(11 11)(11 11) |(1 0)(1 1)| 0
3140 09:53:22.090637 3 1 20 |2c2b 201f |(11 11)(11 11) |(1 0)(1 1)| 0
3141 09:53:22.097202 3 1 24 |2c2b 3535 |(11 11)(10 10) |(1 0)(1 1)| 0
3142 09:53:22.101354 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3143 09:53:22.104223 [Byte 1] Lead/lag Transition tap number (1)
3144 09:53:22.111269 3 2 0 |2c2b 807 |(11 11)(11 11) |(1 0)(0 0)| 0
3145 09:53:22.113845 3 2 4 |2c2b 504 |(11 11)(11 11) |(1 0)(0 0)| 0
3146 09:53:22.117314 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3147 09:53:22.124328 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3148 09:53:22.127462 3 2 16 |2c2c 3534 |(11 0)(11 11) |(0 0)(1 1)| 0
3149 09:53:22.130930 3 2 20 |201 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
3150 09:53:22.134059 3 2 24 |3534 e0e |(11 11)(11 11) |(0 0)(1 1)| 0
3151 09:53:22.140165 3 2 28 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3152 09:53:22.143934 3 3 0 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3153 09:53:22.146939 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3154 09:53:22.153219 3 3 8 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3155 09:53:22.156222 3 3 12 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3156 09:53:22.159952 3 3 16 |3534 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
3157 09:53:22.166737 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3158 09:53:22.170131 3 3 24 |3534 1818 |(11 11)(11 11) |(1 1)(1 1)| 0
3159 09:53:22.172863 [Byte 0] Lead/lag Transition tap number (1)
3160 09:53:22.179663 3 3 28 |3534 1716 |(11 11)(11 11) |(0 0)(1 1)| 0
3161 09:53:22.182780 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3162 09:53:22.186040 [Byte 1] Lead/lag Transition tap number (1)
3163 09:53:22.189437 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3164 09:53:22.196156 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3165 09:53:22.199414 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3166 09:53:22.202636 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3167 09:53:22.209075 3 4 20 |c0b 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3168 09:53:22.212364 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3169 09:53:22.215456 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3170 09:53:22.222014 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3171 09:53:22.225417 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3172 09:53:22.228841 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3173 09:53:22.235545 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3174 09:53:22.238632 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3175 09:53:22.241954 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3176 09:53:22.248836 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3177 09:53:22.251871 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3178 09:53:22.254710 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3179 09:53:22.261532 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3180 09:53:22.264564 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3181 09:53:22.267928 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3182 09:53:22.274632 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3183 09:53:22.277778 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3184 09:53:22.281481 [Byte 0] Lead/lag Transition tap number (3)
3185 09:53:22.284992 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3186 09:53:22.290736 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3187 09:53:22.293878 [Byte 1] Lead/lag Transition tap number (2)
3188 09:53:22.298070 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3189 09:53:22.300875 [Byte 0]First pass (3, 6, 24)
3190 09:53:22.303682 3 6 28 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3191 09:53:22.310519 3 7 0 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3192 09:53:22.313749 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3193 09:53:22.317264 [Byte 1]First pass (3, 7, 4)
3194 09:53:22.320729 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3195 09:53:22.323912 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3196 09:53:22.327336 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3197 09:53:22.330812 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3198 09:53:22.337596 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3199 09:53:22.340693 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3200 09:53:22.343987 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3201 09:53:22.347189 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3202 09:53:22.352980 All bytes gating window > 1UI, Early break!
3203 09:53:22.353488
3204 09:53:22.356348 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
3205 09:53:22.356776
3206 09:53:22.360173 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3207 09:53:22.360811
3208 09:53:22.361157
3209 09:53:22.361468
3210 09:53:22.363259 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3211 09:53:22.363684
3212 09:53:22.366498 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3213 09:53:22.366929
3214 09:53:22.367262
3215 09:53:22.369768 Write Rank1 MR1 =0x56
3216 09:53:22.370195
3217 09:53:22.373261 best RODT dly(2T, 0.5T) = (2, 3)
3218 09:53:22.373814
3219 09:53:22.376199 best RODT dly(2T, 0.5T) = (2, 3)
3220 09:53:22.376655 ==
3221 09:53:22.383112 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3222 09:53:22.386184 fsp= 1, odt_onoff= 1, Byte mode= 0
3223 09:53:22.386612 ==
3224 09:53:22.389736 Start DQ dly to find pass range UseTestEngine =0
3225 09:53:22.392972 x-axis: bit #, y-axis: DQ dly (-127~63)
3226 09:53:22.393487 RX Vref Scan = 0
3227 09:53:22.395724 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3228 09:53:22.399225 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3229 09:53:22.402399 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3230 09:53:22.405881 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3231 09:53:22.409296 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3232 09:53:22.412447 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3233 09:53:22.415612 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3234 09:53:22.419218 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3235 09:53:22.422714 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3236 09:53:22.423180 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3237 09:53:22.425627 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3238 09:53:22.429113 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3239 09:53:22.431580 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3240 09:53:22.435274 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3241 09:53:22.438360 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3242 09:53:22.441324 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3243 09:53:22.444611 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3244 09:53:22.448552 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3245 09:53:22.448948 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3246 09:53:22.451955 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3247 09:53:22.454462 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3248 09:53:22.458286 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3249 09:53:22.461579 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3250 09:53:22.464899 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3251 09:53:22.467928 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3252 09:53:22.471158 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3253 09:53:22.471557 0, [0] xxxoxxxx xxxxxxxo [MSB]
3254 09:53:22.474639 1, [0] xxxoxxxx xxxxxxxo [MSB]
3255 09:53:22.477830 2, [0] xxxoxxxx oxxxxxxo [MSB]
3256 09:53:22.481037 3, [0] xooooxxo ooxxxxxo [MSB]
3257 09:53:22.484646 4, [0] xooooxxo oooxxxxo [MSB]
3258 09:53:22.487977 5, [0] xooooxxo oooxxxxo [MSB]
3259 09:53:22.488460 6, [0] xooooooo ooooxxoo [MSB]
3260 09:53:22.490649 32, [0] oooxoooo ooooooox [MSB]
3261 09:53:22.494645 33, [0] oooxoooo ooooooox [MSB]
3262 09:53:22.498041 34, [0] oooxoooo xoooooox [MSB]
3263 09:53:22.500973 35, [0] ooxxoooo xoooooox [MSB]
3264 09:53:22.504528 36, [0] ooxxoooo xxooooox [MSB]
3265 09:53:22.507022 37, [0] ooxxoooo xxooooox [MSB]
3266 09:53:22.511031 38, [0] xxxxooox xxooxoox [MSB]
3267 09:53:22.511551 39, [0] xxxxxoox xxxoxoox [MSB]
3268 09:53:22.513823 40, [0] xxxxxoox xxxoxxox [MSB]
3269 09:53:22.517316 41, [0] xxxxxxxx xxxxxxxx [MSB]
3270 09:53:22.520756 iDelay=41, Bit 0, Center 22 (7 ~ 37) 31
3271 09:53:22.523430 iDelay=41, Bit 1, Center 20 (3 ~ 37) 35
3272 09:53:22.526980 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3273 09:53:22.530277 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
3274 09:53:22.536647 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3275 09:53:22.539833 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3276 09:53:22.542865 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3277 09:53:22.546136 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3278 09:53:22.549649 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3279 09:53:22.552618 iDelay=41, Bit 9, Center 19 (3 ~ 35) 33
3280 09:53:22.556435 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3281 09:53:22.559936 iDelay=41, Bit 11, Center 23 (6 ~ 40) 35
3282 09:53:22.562836 iDelay=41, Bit 12, Center 22 (7 ~ 37) 31
3283 09:53:22.566185 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3284 09:53:22.569315 iDelay=41, Bit 14, Center 23 (6 ~ 40) 35
3285 09:53:22.575753 iDelay=41, Bit 15, Center 14 (-2 ~ 31) 34
3286 09:53:22.576178 ==
3287 09:53:22.579014 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3288 09:53:22.582776 fsp= 1, odt_onoff= 1, Byte mode= 0
3289 09:53:22.583292 ==
3290 09:53:22.585532 DQS Delay:
3291 09:53:22.586003 DQS0 = 0, DQS1 = 0
3292 09:53:22.586342 DQM Delay:
3293 09:53:22.589885 DQM0 = 20, DQM1 = 20
3294 09:53:22.590430 DQ Delay:
3295 09:53:22.592344 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =15
3296 09:53:22.595844 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
3297 09:53:22.599507 DQ8 =17, DQ9 =19, DQ10 =21, DQ11 =23
3298 09:53:22.602429 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
3299 09:53:22.602876
3300 09:53:22.603312
3301 09:53:22.605599 DramC Write-DBI off
3302 09:53:22.606044 ==
3303 09:53:22.609134 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3304 09:53:22.612402 fsp= 1, odt_onoff= 1, Byte mode= 0
3305 09:53:22.612928 ==
3306 09:53:22.618946 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3307 09:53:22.619468
3308 09:53:22.622045 Begin, DQ Scan Range 925~1181
3309 09:53:22.622570
3310 09:53:22.623011
3311 09:53:22.623415 TX Vref Scan disable
3312 09:53:22.625054 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3313 09:53:22.631749 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3314 09:53:22.635053 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3315 09:53:22.638683 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3316 09:53:22.641923 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3317 09:53:22.644846 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3318 09:53:22.648546 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3319 09:53:22.651482 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3320 09:53:22.654969 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3321 09:53:22.657949 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3322 09:53:22.661626 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3323 09:53:22.664441 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3324 09:53:22.667876 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3325 09:53:22.670964 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3326 09:53:22.677755 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3327 09:53:22.681319 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3328 09:53:22.684278 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3329 09:53:22.687435 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3330 09:53:22.690620 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3331 09:53:22.693889 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3332 09:53:22.697249 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3333 09:53:22.701152 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3334 09:53:22.704293 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3335 09:53:22.707318 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3336 09:53:22.711049 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3337 09:53:22.713942 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3338 09:53:22.717270 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3339 09:53:22.723670 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3340 09:53:22.726931 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3341 09:53:22.729927 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3342 09:53:22.733162 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3343 09:53:22.736675 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3344 09:53:22.739793 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3345 09:53:22.743167 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3346 09:53:22.746206 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3347 09:53:22.749839 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3348 09:53:22.752946 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3349 09:53:22.756025 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3350 09:53:22.759212 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3351 09:53:22.762927 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3352 09:53:22.766467 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3353 09:53:22.769207 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3354 09:53:22.775875 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3355 09:53:22.779251 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3356 09:53:22.782968 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3357 09:53:22.785972 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3358 09:53:22.789173 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3359 09:53:22.792232 972 |3 6 12|[0] xxxxxxxx xxxxxxxo [MSB]
3360 09:53:22.795610 973 |3 6 13|[0] xxxxxxxx xxxxxxxo [MSB]
3361 09:53:22.798670 974 |3 6 14|[0] xxxxxxxx oxxxxxxo [MSB]
3362 09:53:22.802031 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3363 09:53:22.805053 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3364 09:53:22.808875 977 |3 6 17|[0] xxxxxxxx oooxxxoo [MSB]
3365 09:53:22.812191 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3366 09:53:22.815178 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3367 09:53:22.818669 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3368 09:53:22.824932 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3369 09:53:22.828498 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3370 09:53:22.831655 983 |3 6 23|[0] xooooooo oooooooo [MSB]
3371 09:53:22.834866 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3372 09:53:22.837996 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3373 09:53:22.841302 994 |3 6 34|[0] oooooooo oxooooox [MSB]
3374 09:53:22.844537 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3375 09:53:22.847636 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3376 09:53:22.854555 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3377 09:53:22.858163 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3378 09:53:22.860963 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3379 09:53:22.864651 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3380 09:53:22.868012 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3381 09:53:22.870796 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
3382 09:53:22.873976 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3383 09:53:22.877499 Byte0, DQ PI dly=991, DQM PI dly= 991
3384 09:53:22.883741 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3385 09:53:22.883979
3386 09:53:22.887133 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3387 09:53:22.887372
3388 09:53:22.890007 Byte1, DQ PI dly=983, DQM PI dly= 983
3389 09:53:22.893857 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3390 09:53:22.894052
3391 09:53:22.900199 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3392 09:53:22.900435
3393 09:53:22.900654 ==
3394 09:53:22.903455 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3395 09:53:22.906900 fsp= 1, odt_onoff= 1, Byte mode= 0
3396 09:53:22.907199 ==
3397 09:53:22.913215 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3398 09:53:22.913715
3399 09:53:22.914023 Begin, DQ Scan Range 959~1023
3400 09:53:22.916435 Write Rank1 MR14 =0x0
3401 09:53:22.925021
3402 09:53:22.925489 CH=1, VrefRange= 0, VrefLevel = 0
3403 09:53:22.932515 TX Bit0 (985~998) 14 991, Bit8 (977~991) 15 984,
3404 09:53:22.934932 TX Bit1 (984~997) 14 990, Bit9 (978~987) 10 982,
3405 09:53:22.941372 TX Bit2 (982~996) 15 989, Bit10 (979~992) 14 985,
3406 09:53:22.944927 TX Bit3 (980~993) 14 986, Bit11 (980~993) 14 986,
3407 09:53:22.947952 TX Bit4 (984~998) 15 991, Bit12 (980~993) 14 986,
3408 09:53:22.954435 TX Bit5 (985~998) 14 991, Bit13 (981~993) 13 987,
3409 09:53:22.958144 TX Bit6 (984~998) 15 991, Bit14 (980~992) 13 986,
3410 09:53:22.964770 TX Bit7 (984~998) 15 991, Bit15 (975~984) 10 979,
3411 09:53:22.965159
3412 09:53:22.965454 Write Rank1 MR14 =0x2
3413 09:53:22.973316
3414 09:53:22.973728 CH=1, VrefRange= 0, VrefLevel = 2
3415 09:53:22.979743 TX Bit0 (985~999) 15 992, Bit8 (977~991) 15 984,
3416 09:53:22.983377 TX Bit1 (984~998) 15 991, Bit9 (977~988) 12 982,
3417 09:53:22.989581 TX Bit2 (982~997) 16 989, Bit10 (979~993) 15 986,
3418 09:53:22.993000 TX Bit3 (979~993) 15 986, Bit11 (979~993) 15 986,
3419 09:53:22.995968 TX Bit4 (984~998) 15 991, Bit12 (980~993) 14 986,
3420 09:53:23.002998 TX Bit5 (985~998) 14 991, Bit13 (980~994) 15 987,
3421 09:53:23.006123 TX Bit6 (984~998) 15 991, Bit14 (979~992) 14 985,
3422 09:53:23.012915 TX Bit7 (984~998) 15 991, Bit15 (974~985) 12 979,
3423 09:53:23.013294
3424 09:53:23.013643 Write Rank1 MR14 =0x4
3425 09:53:23.021756
3426 09:53:23.022226 CH=1, VrefRange= 0, VrefLevel = 4
3427 09:53:23.028336 TX Bit0 (985~999) 15 992, Bit8 (977~992) 16 984,
3428 09:53:23.031486 TX Bit1 (983~999) 17 991, Bit9 (978~989) 12 983,
3429 09:53:23.038725 TX Bit2 (982~997) 16 989, Bit10 (979~993) 15 986,
3430 09:53:23.041323 TX Bit3 (979~994) 16 986, Bit11 (979~994) 16 986,
3431 09:53:23.044684 TX Bit4 (983~999) 17 991, Bit12 (979~993) 15 986,
3432 09:53:23.050885 TX Bit5 (985~999) 15 992, Bit13 (980~995) 16 987,
3433 09:53:23.054720 TX Bit6 (983~999) 17 991, Bit14 (980~993) 14 986,
3434 09:53:23.061313 TX Bit7 (984~999) 16 991, Bit15 (973~986) 14 979,
3435 09:53:23.061845
3436 09:53:23.062157 Write Rank1 MR14 =0x6
3437 09:53:23.070247
3438 09:53:23.070750 CH=1, VrefRange= 0, VrefLevel = 6
3439 09:53:23.076430 TX Bit0 (985~1000) 16 992, Bit8 (976~992) 17 984,
3440 09:53:23.080533 TX Bit1 (983~1000) 18 991, Bit9 (977~990) 14 983,
3441 09:53:23.086419 TX Bit2 (981~998) 18 989, Bit10 (978~994) 17 986,
3442 09:53:23.090199 TX Bit3 (979~995) 17 987, Bit11 (979~994) 16 986,
3443 09:53:23.093016 TX Bit4 (983~1000) 18 991, Bit12 (979~994) 16 986,
3444 09:53:23.099787 TX Bit5 (984~1000) 17 992, Bit13 (979~996) 18 987,
3445 09:53:23.102870 TX Bit6 (983~1000) 18 991, Bit14 (979~993) 15 986,
3446 09:53:23.109795 TX Bit7 (984~1000) 17 992, Bit15 (973~987) 15 980,
3447 09:53:23.110344
3448 09:53:23.110684 Write Rank1 MR14 =0x8
3449 09:53:23.119818
3450 09:53:23.120331 CH=1, VrefRange= 0, VrefLevel = 8
3451 09:53:23.126285 TX Bit0 (984~1001) 18 992, Bit8 (976~992) 17 984,
3452 09:53:23.129161 TX Bit1 (983~1000) 18 991, Bit9 (977~991) 15 984,
3453 09:53:23.135541 TX Bit2 (981~999) 19 990, Bit10 (978~994) 17 986,
3454 09:53:23.138728 TX Bit3 (978~995) 18 986, Bit11 (979~995) 17 987,
3455 09:53:23.141963 TX Bit4 (983~1000) 18 991, Bit12 (979~995) 17 987,
3456 09:53:23.149274 TX Bit5 (984~1000) 17 992, Bit13 (979~996) 18 987,
3457 09:53:23.152626 TX Bit6 (983~1000) 18 991, Bit14 (978~994) 17 986,
3458 09:53:23.159237 TX Bit7 (984~1000) 17 992, Bit15 (972~988) 17 980,
3459 09:53:23.159743
3460 09:53:23.162410 wait MRW command Rank1 MR14 =0xa fired (1)
3461 09:53:23.165497 Write Rank1 MR14 =0xa
3462 09:53:23.172786
3463 09:53:23.173292 CH=1, VrefRange= 0, VrefLevel = 10
3464 09:53:23.179171 TX Bit0 (984~1001) 18 992, Bit8 (975~993) 19 984,
3465 09:53:23.182211 TX Bit1 (983~1001) 19 992, Bit9 (976~991) 16 983,
3466 09:53:23.188820 TX Bit2 (980~999) 20 989, Bit10 (978~995) 18 986,
3467 09:53:23.192114 TX Bit3 (978~997) 20 987, Bit11 (979~995) 17 987,
3468 09:53:23.195073 TX Bit4 (982~1001) 20 991, Bit12 (979~995) 17 987,
3469 09:53:23.201988 TX Bit5 (984~1001) 18 992, Bit13 (979~997) 19 988,
3470 09:53:23.205299 TX Bit6 (983~1001) 19 992, Bit14 (978~994) 17 986,
3471 09:53:23.211387 TX Bit7 (983~1001) 19 992, Bit15 (972~990) 19 981,
3472 09:53:23.211815
3473 09:53:23.212168 Write Rank1 MR14 =0xc
3474 09:53:23.222106
3475 09:53:23.225114 CH=1, VrefRange= 0, VrefLevel = 12
3476 09:53:23.228414 TX Bit0 (984~1002) 19 993, Bit8 (975~993) 19 984,
3477 09:53:23.231631 TX Bit1 (982~1001) 20 991, Bit9 (976~992) 17 984,
3478 09:53:23.237894 TX Bit2 (980~999) 20 989, Bit10 (978~996) 19 987,
3479 09:53:23.241316 TX Bit3 (978~997) 20 987, Bit11 (978~997) 20 987,
3480 09:53:23.247528 TX Bit4 (982~1001) 20 991, Bit12 (978~996) 19 987,
3481 09:53:23.251200 TX Bit5 (984~1002) 19 993, Bit13 (979~998) 20 988,
3482 09:53:23.254402 TX Bit6 (983~1001) 19 992, Bit14 (978~995) 18 986,
3483 09:53:23.261227 TX Bit7 (983~1002) 20 992, Bit15 (972~990) 19 981,
3484 09:53:23.261742
3485 09:53:23.262050 Write Rank1 MR14 =0xe
3486 09:53:23.271496
3487 09:53:23.274823 CH=1, VrefRange= 0, VrefLevel = 14
3488 09:53:23.278022 TX Bit0 (984~1003) 20 993, Bit8 (975~993) 19 984,
3489 09:53:23.281300 TX Bit1 (982~1002) 21 992, Bit9 (975~992) 18 983,
3490 09:53:23.287966 TX Bit2 (980~1000) 21 990, Bit10 (977~996) 20 986,
3491 09:53:23.290902 TX Bit3 (977~998) 22 987, Bit11 (978~997) 20 987,
3492 09:53:23.297646 TX Bit4 (982~1002) 21 992, Bit12 (978~997) 20 987,
3493 09:53:23.300797 TX Bit5 (984~1002) 19 993, Bit13 (979~998) 20 988,
3494 09:53:23.304311 TX Bit6 (982~1002) 21 992, Bit14 (978~996) 19 987,
3495 09:53:23.310443 TX Bit7 (983~1001) 19 992, Bit15 (971~991) 21 981,
3496 09:53:23.310884
3497 09:53:23.311316 Write Rank1 MR14 =0x10
3498 09:53:23.321344
3499 09:53:23.324302 CH=1, VrefRange= 0, VrefLevel = 16
3500 09:53:23.327927 TX Bit0 (984~1004) 21 994, Bit8 (974~994) 21 984,
3501 09:53:23.330873 TX Bit1 (982~1003) 22 992, Bit9 (975~992) 18 983,
3502 09:53:23.337791 TX Bit2 (979~1000) 22 989, Bit10 (977~997) 21 987,
3503 09:53:23.340576 TX Bit3 (977~998) 22 987, Bit11 (978~998) 21 988,
3504 09:53:23.346993 TX Bit4 (981~1002) 22 991, Bit12 (978~998) 21 988,
3505 09:53:23.350375 TX Bit5 (983~1004) 22 993, Bit13 (978~999) 22 988,
3506 09:53:23.353773 TX Bit6 (982~1003) 22 992, Bit14 (978~996) 19 987,
3507 09:53:23.360606 TX Bit7 (982~1002) 21 992, Bit15 (971~991) 21 981,
3508 09:53:23.361117
3509 09:53:23.361454 Write Rank1 MR14 =0x12
3510 09:53:23.371524
3511 09:53:23.372024 CH=1, VrefRange= 0, VrefLevel = 18
3512 09:53:23.377828 TX Bit0 (983~1004) 22 993, Bit8 (973~994) 22 983,
3513 09:53:23.381183 TX Bit1 (981~1004) 24 992, Bit9 (974~993) 20 983,
3514 09:53:23.387287 TX Bit2 (979~1001) 23 990, Bit10 (977~998) 22 987,
3515 09:53:23.390615 TX Bit3 (977~999) 23 988, Bit11 (978~999) 22 988,
3516 09:53:23.397427 TX Bit4 (981~1003) 23 992, Bit12 (978~998) 21 988,
3517 09:53:23.401094 TX Bit5 (983~1004) 22 993, Bit13 (978~999) 22 988,
3518 09:53:23.404297 TX Bit6 (981~1003) 23 992, Bit14 (977~997) 21 987,
3519 09:53:23.410697 TX Bit7 (982~1003) 22 992, Bit15 (971~992) 22 981,
3520 09:53:23.411201
3521 09:53:23.411539 Write Rank1 MR14 =0x14
3522 09:53:23.420976
3523 09:53:23.424134 CH=1, VrefRange= 0, VrefLevel = 20
3524 09:53:23.427531 TX Bit0 (983~1004) 22 993, Bit8 (973~995) 23 984,
3525 09:53:23.430766 TX Bit1 (981~1004) 24 992, Bit9 (974~993) 20 983,
3526 09:53:23.437528 TX Bit2 (979~1001) 23 990, Bit10 (976~999) 24 987,
3527 09:53:23.440651 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3528 09:53:23.446845 TX Bit4 (981~1004) 24 992, Bit12 (978~999) 22 988,
3529 09:53:23.450580 TX Bit5 (983~1004) 22 993, Bit13 (978~999) 22 988,
3530 09:53:23.453762 TX Bit6 (981~1004) 24 992, Bit14 (977~998) 22 987,
3531 09:53:23.460052 TX Bit7 (982~1004) 23 993, Bit15 (971~992) 22 981,
3532 09:53:23.460490
3533 09:53:23.460843 Write Rank1 MR14 =0x16
3534 09:53:23.470811
3535 09:53:23.474141 CH=1, VrefRange= 0, VrefLevel = 22
3536 09:53:23.477230 TX Bit0 (983~1005) 23 994, Bit8 (973~996) 24 984,
3537 09:53:23.480406 TX Bit1 (981~1005) 25 993, Bit9 (973~993) 21 983,
3538 09:53:23.487338 TX Bit2 (979~1002) 24 990, Bit10 (976~999) 24 987,
3539 09:53:23.490606 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3540 09:53:23.496906 TX Bit4 (981~1005) 25 993, Bit12 (977~999) 23 988,
3541 09:53:23.500079 TX Bit5 (983~1005) 23 994, Bit13 (978~1000) 23 989,
3542 09:53:23.503455 TX Bit6 (980~1004) 25 992, Bit14 (977~999) 23 988,
3543 09:53:23.509850 TX Bit7 (981~1005) 25 993, Bit15 (971~993) 23 982,
3544 09:53:23.510255
3545 09:53:23.513186 Write Rank1 MR14 =0x18
3546 09:53:23.521193
3547 09:53:23.524635 CH=1, VrefRange= 0, VrefLevel = 24
3548 09:53:23.527672 TX Bit0 (983~1005) 23 994, Bit8 (972~997) 26 984,
3549 09:53:23.531050 TX Bit1 (981~1005) 25 993, Bit9 (973~994) 22 983,
3550 09:53:23.537985 TX Bit2 (978~1002) 25 990, Bit10 (976~999) 24 987,
3551 09:53:23.541044 TX Bit3 (977~999) 23 988, Bit11 (976~1000) 25 988,
3552 09:53:23.547390 TX Bit4 (980~1005) 26 992, Bit12 (977~999) 23 988,
3553 09:53:23.550701 TX Bit5 (983~1005) 23 994, Bit13 (978~1000) 23 989,
3554 09:53:23.553787 TX Bit6 (980~1005) 26 992, Bit14 (976~999) 24 987,
3555 09:53:23.560889 TX Bit7 (981~1005) 25 993, Bit15 (971~993) 23 982,
3556 09:53:23.561354
3557 09:53:23.563851 wait MRW command Rank1 MR14 =0x1a fired (1)
3558 09:53:23.567343 Write Rank1 MR14 =0x1a
3559 09:53:23.575502
3560 09:53:23.578493 CH=1, VrefRange= 0, VrefLevel = 26
3561 09:53:23.582007 TX Bit0 (983~1006) 24 994, Bit8 (972~996) 25 984,
3562 09:53:23.585383 TX Bit1 (980~1005) 26 992, Bit9 (973~994) 22 983,
3563 09:53:23.591777 TX Bit2 (978~1004) 27 991, Bit10 (976~999) 24 987,
3564 09:53:23.594695 TX Bit3 (976~1000) 25 988, Bit11 (976~1000) 25 988,
3565 09:53:23.601685 TX Bit4 (980~1006) 27 993, Bit12 (977~999) 23 988,
3566 09:53:23.604833 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3567 09:53:23.608155 TX Bit6 (980~1005) 26 992, Bit14 (976~999) 24 987,
3568 09:53:23.614278 TX Bit7 (981~1005) 25 993, Bit15 (970~994) 25 982,
3569 09:53:23.614714
3570 09:53:23.617946 Write Rank1 MR14 =0x1c
3571 09:53:23.626105
3572 09:53:23.629609 CH=1, VrefRange= 0, VrefLevel = 28
3573 09:53:23.632535 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3574 09:53:23.636070 TX Bit1 (980~1006) 27 993, Bit9 (972~995) 24 983,
3575 09:53:23.642581 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3576 09:53:23.645709 TX Bit3 (976~1001) 26 988, Bit11 (976~999) 24 987,
3577 09:53:23.652214 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3578 09:53:23.655512 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3579 09:53:23.658719 TX Bit6 (979~1005) 27 992, Bit14 (975~999) 25 987,
3580 09:53:23.665206 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3581 09:53:23.665671
3582 09:53:23.668792 Write Rank1 MR14 =0x1e
3583 09:53:23.676454
3584 09:53:23.679659 CH=1, VrefRange= 0, VrefLevel = 30
3585 09:53:23.683245 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3586 09:53:23.686098 TX Bit1 (980~1006) 27 993, Bit9 (972~995) 24 983,
3587 09:53:23.692914 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3588 09:53:23.695946 TX Bit3 (976~1001) 26 988, Bit11 (976~999) 24 987,
3589 09:53:23.702656 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3590 09:53:23.705784 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3591 09:53:23.709494 TX Bit6 (979~1005) 27 992, Bit14 (975~999) 25 987,
3592 09:53:23.715771 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3593 09:53:23.716335
3594 09:53:23.719130 Write Rank1 MR14 =0x20
3595 09:53:23.727245
3596 09:53:23.730259 CH=1, VrefRange= 0, VrefLevel = 32
3597 09:53:23.733935 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3598 09:53:23.736579 TX Bit1 (980~1006) 27 993, Bit9 (972~995) 24 983,
3599 09:53:23.743367 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3600 09:53:23.746944 TX Bit3 (976~1001) 26 988, Bit11 (976~999) 24 987,
3601 09:53:23.753517 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3602 09:53:23.756952 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3603 09:53:23.759969 TX Bit6 (979~1005) 27 992, Bit14 (975~999) 25 987,
3604 09:53:23.766287 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3605 09:53:23.766752
3606 09:53:23.769959 Write Rank1 MR14 =0x22
3607 09:53:23.778016
3608 09:53:23.781139 CH=1, VrefRange= 0, VrefLevel = 34
3609 09:53:23.784347 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3610 09:53:23.787692 TX Bit1 (980~1006) 27 993, Bit9 (972~995) 24 983,
3611 09:53:23.794266 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3612 09:53:23.797448 TX Bit3 (976~1001) 26 988, Bit11 (976~999) 24 987,
3613 09:53:23.804061 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3614 09:53:23.807406 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3615 09:53:23.810643 TX Bit6 (979~1005) 27 992, Bit14 (975~999) 25 987,
3616 09:53:23.817397 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3617 09:53:23.818091
3618 09:53:23.820650 Write Rank1 MR14 =0x24
3619 09:53:23.828642
3620 09:53:23.831574 CH=1, VrefRange= 0, VrefLevel = 36
3621 09:53:23.835665 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3622 09:53:23.838222 TX Bit1 (980~1006) 27 993, Bit9 (972~995) 24 983,
3623 09:53:23.845168 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3624 09:53:23.848421 TX Bit3 (976~1001) 26 988, Bit11 (976~999) 24 987,
3625 09:53:23.855048 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3626 09:53:23.857882 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3627 09:53:23.861181 TX Bit6 (979~1005) 27 992, Bit14 (975~999) 25 987,
3628 09:53:23.867805 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3629 09:53:23.868337
3630 09:53:23.868690
3631 09:53:23.871687 TX Vref found, early break! 382< 386
3632 09:53:23.874546 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3633 09:53:23.877871 u1DelayCellOfst[0]=7 cells (6 PI)
3634 09:53:23.881699 u1DelayCellOfst[1]=6 cells (5 PI)
3635 09:53:23.884419 u1DelayCellOfst[2]=3 cells (3 PI)
3636 09:53:23.887951 u1DelayCellOfst[3]=0 cells (0 PI)
3637 09:53:23.890789 u1DelayCellOfst[4]=6 cells (5 PI)
3638 09:53:23.893976 u1DelayCellOfst[5]=7 cells (6 PI)
3639 09:53:23.897350 u1DelayCellOfst[6]=5 cells (4 PI)
3640 09:53:23.900552 u1DelayCellOfst[7]=6 cells (5 PI)
3641 09:53:23.904431 Byte0, DQ PI dly=988, DQM PI dly= 991
3642 09:53:23.907366 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3643 09:53:23.907803
3644 09:53:23.913951 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3645 09:53:23.914385
3646 09:53:23.914716 u1DelayCellOfst[8]=3 cells (3 PI)
3647 09:53:23.917303 u1DelayCellOfst[9]=2 cells (2 PI)
3648 09:53:23.920675 u1DelayCellOfst[10]=7 cells (6 PI)
3649 09:53:23.923992 u1DelayCellOfst[11]=7 cells (6 PI)
3650 09:53:23.926979 u1DelayCellOfst[12]=9 cells (7 PI)
3651 09:53:23.930434 u1DelayCellOfst[13]=9 cells (7 PI)
3652 09:53:23.933895 u1DelayCellOfst[14]=7 cells (6 PI)
3653 09:53:23.936985 u1DelayCellOfst[15]=0 cells (0 PI)
3654 09:53:23.940216 Byte1, DQ PI dly=981, DQM PI dly= 984
3655 09:53:23.943427 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3656 09:53:23.943861
3657 09:53:23.950135 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3658 09:53:23.950641
3659 09:53:23.950978 Write Rank1 MR14 =0x1c
3660 09:53:23.951288
3661 09:53:23.953313 Final TX Range 0 Vref 28
3662 09:53:23.953858
3663 09:53:23.959692 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3664 09:53:23.960194
3665 09:53:23.966416 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3666 09:53:23.973326 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3667 09:53:23.979386 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3668 09:53:23.982748 Write Rank1 MR3 =0xb0
3669 09:53:23.986333 DramC Write-DBI on
3670 09:53:23.986755 ==
3671 09:53:23.989448 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3672 09:53:23.992979 fsp= 1, odt_onoff= 1, Byte mode= 0
3673 09:53:23.993483 ==
3674 09:53:23.999555 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3675 09:53:24.000056
3676 09:53:24.000478 Begin, DQ Scan Range 704~768
3677 09:53:24.000919
3678 09:53:24.002439
3679 09:53:24.002861 TX Vref Scan disable
3680 09:53:24.005344 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3681 09:53:24.009166 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3682 09:53:24.011921 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3683 09:53:24.015807 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3684 09:53:24.018877 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3685 09:53:24.021984 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3686 09:53:24.025217 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3687 09:53:24.031887 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3688 09:53:24.035154 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3689 09:53:24.038898 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3690 09:53:24.041867 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3691 09:53:24.045240 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3692 09:53:24.048475 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3693 09:53:24.051538 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3694 09:53:24.054825 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3695 09:53:24.057978 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3696 09:53:24.061411 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3697 09:53:24.064358 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3698 09:53:24.068225 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3699 09:53:24.071480 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3700 09:53:24.074101 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3701 09:53:24.083931 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3702 09:53:24.086760 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3703 09:53:24.090123 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3704 09:53:24.093291 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3705 09:53:24.096547 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3706 09:53:24.100330 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3707 09:53:24.103464 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3708 09:53:24.107074 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3709 09:53:24.109987 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3710 09:53:24.113364 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3711 09:53:24.116744 Byte0, DQ PI dly=738, DQM PI dly= 738
3712 09:53:24.123211 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
3713 09:53:24.123642
3714 09:53:24.126633 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
3715 09:53:24.127017
3716 09:53:24.130127 Byte1, DQ PI dly=729, DQM PI dly= 729
3717 09:53:24.133333 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3718 09:53:24.133765
3719 09:53:24.139347 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3720 09:53:24.139875
3721 09:53:24.146006 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3722 09:53:24.152686 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3723 09:53:24.158974 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3724 09:53:24.162374 Write Rank1 MR3 =0x30
3725 09:53:24.162918 DramC Write-DBI off
3726 09:53:24.163399
3727 09:53:24.163704 [DATLAT]
3728 09:53:24.165524 Freq=1600, CH1 RK1, use_rxtx_scan=0
3729 09:53:24.168899
3730 09:53:24.169399 DATLAT Default: 0x10
3731 09:53:24.172702 7, 0xFFFF, sum=0
3732 09:53:24.173220 8, 0xFFFF, sum=0
3733 09:53:24.175536 9, 0xFFFF, sum=0
3734 09:53:24.176044 10, 0xFFFF, sum=0
3735 09:53:24.179192 11, 0xFFFF, sum=0
3736 09:53:24.179728 12, 0xFFFF, sum=0
3737 09:53:24.182191 13, 0xFFFF, sum=0
3738 09:53:24.182646 14, 0x0, sum=1
3739 09:53:24.183130 15, 0x0, sum=2
3740 09:53:24.185509 16, 0x0, sum=3
3741 09:53:24.186072 17, 0x0, sum=4
3742 09:53:24.191781 pattern=2 first_step=14 total pass=5 best_step=16
3743 09:53:24.192320 ==
3744 09:53:24.195086 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3745 09:53:24.198843 fsp= 1, odt_onoff= 1, Byte mode= 0
3746 09:53:24.199260 ==
3747 09:53:24.205489 Start DQ dly to find pass range UseTestEngine =1
3748 09:53:24.208449 x-axis: bit #, y-axis: DQ dly (-127~63)
3749 09:53:24.208839 RX Vref Scan = 0
3750 09:53:24.211687 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3751 09:53:24.215046 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3752 09:53:24.218178 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3753 09:53:24.221482 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3754 09:53:24.224959 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3755 09:53:24.225359 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3756 09:53:24.227767 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3757 09:53:24.231527 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3758 09:53:24.234433 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3759 09:53:24.237690 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3760 09:53:24.241137 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3761 09:53:24.244315 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3762 09:53:24.247535 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3763 09:53:24.250995 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3764 09:53:24.251390 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3765 09:53:24.254374 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3766 09:53:24.257474 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3767 09:53:24.260772 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3768 09:53:24.264036 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3769 09:53:24.267402 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3770 09:53:24.270705 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3771 09:53:24.273884 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3772 09:53:24.274277 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3773 09:53:24.277423 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3774 09:53:24.280369 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3775 09:53:24.283679 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3776 09:53:24.286983 0, [0] xxxoxxxx xxxxxxxo [MSB]
3777 09:53:24.290130 1, [0] xxxoxxxx xoxxxxxo [MSB]
3778 09:53:24.293374 2, [0] xoxoxxxx ooxxxxxo [MSB]
3779 09:53:24.293792 3, [0] xooooxxx ooxxxxxo [MSB]
3780 09:53:24.296492 4, [0] xooooxxo oooxxxxo [MSB]
3781 09:53:24.300013 5, [0] xoooooxo oooxxxoo [MSB]
3782 09:53:24.303390 6, [0] ooooooxo ooooxxoo [MSB]
3783 09:53:24.307131 32, [0] oooooooo ooooooox [MSB]
3784 09:53:24.310548 33, [0] oooxoooo ooooooox [MSB]
3785 09:53:24.313773 34, [0] oooxoooo xoooooox [MSB]
3786 09:53:24.316751 35, [0] ooxxoooo xxooooox [MSB]
3787 09:53:24.319978 36, [0] ooxxoooo xxooooox [MSB]
3788 09:53:24.323239 37, [0] ooxxoooo xxooooox [MSB]
3789 09:53:24.326995 38, [0] oxxxooox xxooooox [MSB]
3790 09:53:24.327399 39, [0] xxxxxoox xxxoxoox [MSB]
3791 09:53:24.330105 40, [0] xxxxxoox xxxxxxxx [MSB]
3792 09:53:24.333278 41, [0] xxxxxxxx xxxxxxxx [MSB]
3793 09:53:24.336910 iDelay=41, Bit 0, Center 22 (6 ~ 38) 33
3794 09:53:24.340456 iDelay=41, Bit 1, Center 19 (2 ~ 37) 36
3795 09:53:24.343384 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3796 09:53:24.346843 iDelay=41, Bit 3, Center 16 (0 ~ 32) 33
3797 09:53:24.353049 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3798 09:53:24.356356 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3799 09:53:24.359577 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3800 09:53:24.363033 iDelay=41, Bit 7, Center 20 (4 ~ 37) 34
3801 09:53:24.365874 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3802 09:53:24.368931 iDelay=41, Bit 9, Center 17 (1 ~ 34) 34
3803 09:53:24.372779 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3804 09:53:24.375988 iDelay=41, Bit 11, Center 22 (6 ~ 39) 34
3805 09:53:24.379426 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3806 09:53:24.382455 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3807 09:53:24.385868 iDelay=41, Bit 14, Center 22 (5 ~ 39) 35
3808 09:53:24.391881 iDelay=41, Bit 15, Center 14 (-2 ~ 31) 34
3809 09:53:24.392266 ==
3810 09:53:24.395207 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3811 09:53:24.398931 fsp= 1, odt_onoff= 1, Byte mode= 0
3812 09:53:24.399325 ==
3813 09:53:24.402037 DQS Delay:
3814 09:53:24.402422 DQS0 = 0, DQS1 = 0
3815 09:53:24.402722 DQM Delay:
3816 09:53:24.405221 DQM0 = 20, DQM1 = 19
3817 09:53:24.405649 DQ Delay:
3818 09:53:24.408338 DQ0 =22, DQ1 =19, DQ2 =18, DQ3 =16
3819 09:53:24.411879 DQ4 =20, DQ5 =22, DQ6 =23, DQ7 =20
3820 09:53:24.415295 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
3821 09:53:24.418338 DQ12 =22, DQ13 =23, DQ14 =22, DQ15 =14
3822 09:53:24.418722
3823 09:53:24.419018
3824 09:53:24.419364
3825 09:53:24.421659 [DramC_TX_OE_Calibration] TA2
3826 09:53:24.424984 Original DQ_B0 (3 6) =30, OEN = 27
3827 09:53:24.428201 Original DQ_B1 (3 6) =30, OEN = 27
3828 09:53:24.431470 23, 0x0, End_B0=23 End_B1=23
3829 09:53:24.435320 24, 0x0, End_B0=24 End_B1=24
3830 09:53:24.435791 25, 0x0, End_B0=25 End_B1=25
3831 09:53:24.438629 26, 0x0, End_B0=26 End_B1=26
3832 09:53:24.441866 27, 0x0, End_B0=27 End_B1=27
3833 09:53:24.444906 28, 0x0, End_B0=28 End_B1=28
3834 09:53:24.447889 29, 0x0, End_B0=29 End_B1=29
3835 09:53:24.448279 30, 0x0, End_B0=30 End_B1=30
3836 09:53:24.451642 31, 0xFFFF, End_B0=30 End_B1=30
3837 09:53:24.457540 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3838 09:53:24.464202 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3839 09:53:24.464590
3840 09:53:24.464889
3841 09:53:24.465164 Write Rank1 MR23 =0x3f
3842 09:53:24.467488 [DQSOSC]
3843 09:53:24.474440 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3844 09:53:24.480932 CH1_RK1: MR19=0x202, MR18=0xB0B0, DQSOSC=457, MR23=63, INC=11, DEC=17
3845 09:53:24.484188 Write Rank1 MR23 =0x3f
3846 09:53:24.484570 [DQSOSC]
3847 09:53:24.490608 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps
3848 09:53:24.494230 CH1 RK1: MR19=202, MR18=B2B2
3849 09:53:24.497221 [RxdqsGatingPostProcess] freq 1600
3850 09:53:24.503418 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3851 09:53:24.503804 Rank: 0
3852 09:53:24.507392 best DQS0 dly(2T, 0.5T) = (2, 6)
3853 09:53:24.510853 best DQS1 dly(2T, 0.5T) = (2, 6)
3854 09:53:24.513629 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3855 09:53:24.517120 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3856 09:53:24.517505 Rank: 1
3857 09:53:24.519928 best DQS0 dly(2T, 0.5T) = (2, 6)
3858 09:53:24.523446 best DQS1 dly(2T, 0.5T) = (2, 6)
3859 09:53:24.526857 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3860 09:53:24.529870 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3861 09:53:24.533255 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3862 09:53:24.536357 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3863 09:53:24.542946 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3864 09:53:24.543420
3865 09:53:24.543859
3866 09:53:24.546457 [Calibration Summary] Freqency 1600
3867 09:53:24.546845 CH 0, Rank 0
3868 09:53:24.547147 All Pass.
3869 09:53:24.547424
3870 09:53:24.549467 CH 0, Rank 1
3871 09:53:24.549986 All Pass.
3872 09:53:24.550446
3873 09:53:24.552776 CH 1, Rank 0
3874 09:53:24.553192 All Pass.
3875 09:53:24.553494
3876 09:53:24.553908 CH 1, Rank 1
3877 09:53:24.556518 All Pass.
3878 09:53:24.556915
3879 09:53:24.562409 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 09:53:24.569620 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 09:53:24.575989 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 09:53:24.576380 Write Rank0 MR3 =0xb0
3883 09:53:24.582377 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3884 09:53:24.592180 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3885 09:53:24.598700 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3886 09:53:24.599102 Write Rank1 MR3 =0xb0
3887 09:53:24.605576 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3888 09:53:24.612185 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3889 09:53:24.622042 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3890 09:53:24.622429 Write Rank0 MR3 =0xb0
3891 09:53:24.628310 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3892 09:53:24.634536 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3893 09:53:24.641218 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3894 09:53:24.644410 Write Rank1 MR3 =0xb0
3895 09:53:24.647802 DramC Write-DBI on
3896 09:53:24.651033 [GetDramInforAfterCalByMRR] Vendor 6.
3897 09:53:24.654683 [GetDramInforAfterCalByMRR] Revision 505.
3898 09:53:24.655081 MR8 1111
3899 09:53:24.657450 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3900 09:53:24.661288 MR8 1111
3901 09:53:24.664091 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3902 09:53:24.664477 MR8 1111
3903 09:53:24.670437 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3904 09:53:24.670795 MR8 1111
3905 09:53:24.677034 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3906 09:53:24.683777 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3907 09:53:24.686941 Write Rank0 MR13 =0xd0
3908 09:53:24.690143 Write Rank1 MR13 =0xd0
3909 09:53:24.690529 Write Rank0 MR13 =0xd0
3910 09:53:24.693416 Write Rank1 MR13 =0xd0
3911 09:53:24.696757 Save calibration result to emmc
3912 09:53:24.697189
3913 09:53:24.697495
3914 09:53:24.700300 [DramcModeReg_Check] Freq_1600, FSP_1
3915 09:53:24.700687 FSP_1, CH_0, RK0
3916 09:53:24.703446 Write Rank0 MR13 =0xd8
3917 09:53:24.706621 MR12 = 0x5e (global = 0x5e) match
3918 09:53:24.710361 MR14 = 0x1e (global = 0x1e) match
3919 09:53:24.710745 FSP_1, CH_0, RK1
3920 09:53:24.713342 Write Rank1 MR13 =0xd8
3921 09:53:24.716714 MR12 = 0x5c (global = 0x5c) match
3922 09:53:24.720206 MR14 = 0x1c (global = 0x1c) match
3923 09:53:24.720640 FSP_1, CH_1, RK0
3924 09:53:24.723455 Write Rank0 MR13 =0xd8
3925 09:53:24.726894 MR12 = 0x5e (global = 0x5e) match
3926 09:53:24.730106 MR14 = 0x1c (global = 0x1c) match
3927 09:53:24.733266 FSP_1, CH_1, RK1
3928 09:53:24.733731 Write Rank1 MR13 =0xd8
3929 09:53:24.736685 MR12 = 0x60 (global = 0x60) match
3930 09:53:24.739804 MR14 = 0x1c (global = 0x1c) match
3931 09:53:24.740245
3932 09:53:24.742871 [MEM_TEST] 02: After DFS, before run time config
3933 09:53:24.755665 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3934 09:53:24.756174
3935 09:53:24.756478 [TA2_TEST]
3936 09:53:24.756753 === TA2 HW
3937 09:53:24.758600 TA2 PAT: XTALK
3938 09:53:24.761642 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3939 09:53:24.768197 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3940 09:53:24.771828 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3941 09:53:24.778059 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3942 09:53:24.778447
3943 09:53:24.778749
3944 09:53:24.779025 Settings after calibration
3945 09:53:24.779289
3946 09:53:24.781052 [DramcRunTimeConfig]
3947 09:53:24.784765 TransferPLLToSPMControl - MODE SW PHYPLL
3948 09:53:24.788484 TX_TRACKING: ON
3949 09:53:24.788870 RX_TRACKING: ON
3950 09:53:24.789165 HW_GATING: ON
3951 09:53:24.791313 HW_GATING DBG: OFF
3952 09:53:24.791698 ddr_geometry:1
3953 09:53:24.794818 ddr_geometry:1
3954 09:53:24.795203 ddr_geometry:1
3955 09:53:24.797538 ddr_geometry:1
3956 09:53:24.797964 ddr_geometry:1
3957 09:53:24.800949 ddr_geometry:1
3958 09:53:24.801345 ddr_geometry:1
3959 09:53:24.801711 ddr_geometry:1
3960 09:53:24.804243 High Freq DUMMY_READ_FOR_TRACKING: ON
3961 09:53:24.807425 ZQCS_ENABLE_LP4: OFF
3962 09:53:24.811188 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3963 09:53:24.814158 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3964 09:53:24.814547 SPM_CONTROL_AFTERK: ON
3965 09:53:24.817402 IMPEDANCE_TRACKING: ON
3966 09:53:24.820829 TEMP_SENSOR: ON
3967 09:53:24.821214 PER_BANK_REFRESH: ON
3968 09:53:24.824005 HW_SAVE_FOR_SR: ON
3969 09:53:24.827290 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3970 09:53:24.830365 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3971 09:53:24.833828 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3972 09:53:24.834224 Read ODT Tracking: ON
3973 09:53:24.837055 =========================
3974 09:53:24.837450
3975 09:53:24.837932 [TA2_TEST]
3976 09:53:24.840292 === TA2 HW
3977 09:53:24.843653 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3978 09:53:24.850016 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3979 09:53:24.853449 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3980 09:53:24.859787 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3981 09:53:24.860183
3982 09:53:24.863566 [MEM_TEST] 03: After run time config
3983 09:53:24.873294 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3984 09:53:24.876567 [complex_mem_test] start addr:0x40024000, len:131072
3985 09:53:25.080723 1st complex R/W mem test pass
3986 09:53:25.087306 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3987 09:53:25.090615 sync preloader write leveling
3988 09:53:25.094076 sync preloader cbt_mr12
3989 09:53:25.097074 sync preloader cbt_clk_dly
3990 09:53:25.097469 sync preloader cbt_cmd_dly
3991 09:53:25.100136 sync preloader cbt_cs
3992 09:53:25.103392 sync preloader cbt_ca_perbit_delay
3993 09:53:25.107217 sync preloader clk_delay
3994 09:53:25.107611 sync preloader dqs_delay
3995 09:53:25.110396 sync preloader u1Gating2T_Save
3996 09:53:25.113611 sync preloader u1Gating05T_Save
3997 09:53:25.116918 sync preloader u1Gatingfine_tune_Save
3998 09:53:25.119833 sync preloader u1Gatingucpass_count_Save
3999 09:53:25.122995 sync preloader u1TxWindowPerbitVref_Save
4000 09:53:25.126256 sync preloader u1TxCenter_min_Save
4001 09:53:25.129727 sync preloader u1TxCenter_max_Save
4002 09:53:25.132721 sync preloader u1Txwin_center_Save
4003 09:53:25.136119 sync preloader u1Txfirst_pass_Save
4004 09:53:25.139245 sync preloader u1Txlast_pass_Save
4005 09:53:25.142680 sync preloader u1RxDatlat_Save
4006 09:53:25.146238 sync preloader u1RxWinPerbitVref_Save
4007 09:53:25.149167 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4008 09:53:25.152892 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4009 09:53:25.156164 sync preloader delay_cell_unit
4010 09:53:25.162616 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4011 09:53:25.165904 sync preloader write leveling
4012 09:53:25.169143 sync preloader cbt_mr12
4013 09:53:25.169529 sync preloader cbt_clk_dly
4014 09:53:25.172326 sync preloader cbt_cmd_dly
4015 09:53:25.175397 sync preloader cbt_cs
4016 09:53:25.179034 sync preloader cbt_ca_perbit_delay
4017 09:53:25.179418 sync preloader clk_delay
4018 09:53:25.182233 sync preloader dqs_delay
4019 09:53:25.185292 sync preloader u1Gating2T_Save
4020 09:53:25.188724 sync preloader u1Gating05T_Save
4021 09:53:25.192207 sync preloader u1Gatingfine_tune_Save
4022 09:53:25.195620 sync preloader u1Gatingucpass_count_Save
4023 09:53:25.198322 sync preloader u1TxWindowPerbitVref_Save
4024 09:53:25.201568 sync preloader u1TxCenter_min_Save
4025 09:53:25.204793 sync preloader u1TxCenter_max_Save
4026 09:53:25.208346 sync preloader u1Txwin_center_Save
4027 09:53:25.212019 sync preloader u1Txfirst_pass_Save
4028 09:53:25.215018 sync preloader u1Txlast_pass_Save
4029 09:53:25.218120 sync preloader u1RxDatlat_Save
4030 09:53:25.221178 sync preloader u1RxWinPerbitVref_Save
4031 09:53:25.224649 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4032 09:53:25.228301 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4033 09:53:25.231008 sync preloader delay_cell_unit
4034 09:53:25.238085 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4035 09:53:25.241069 sync preloader write leveling
4036 09:53:25.241576 sync preloader cbt_mr12
4037 09:53:25.244318 sync preloader cbt_clk_dly
4038 09:53:25.247710 sync preloader cbt_cmd_dly
4039 09:53:25.250950 sync preloader cbt_cs
4040 09:53:25.251417 sync preloader cbt_ca_perbit_delay
4041 09:53:25.254355 sync preloader clk_delay
4042 09:53:25.257319 sync preloader dqs_delay
4043 09:53:25.260773 sync preloader u1Gating2T_Save
4044 09:53:25.263878 sync preloader u1Gating05T_Save
4045 09:53:25.267120 sync preloader u1Gatingfine_tune_Save
4046 09:53:25.270533 sync preloader u1Gatingucpass_count_Save
4047 09:53:25.273758 sync preloader u1TxWindowPerbitVref_Save
4048 09:53:25.277578 sync preloader u1TxCenter_min_Save
4049 09:53:25.280543 sync preloader u1TxCenter_max_Save
4050 09:53:25.283767 sync preloader u1Txwin_center_Save
4051 09:53:25.287088 sync preloader u1Txfirst_pass_Save
4052 09:53:25.287475 sync preloader u1Txlast_pass_Save
4053 09:53:25.290321 sync preloader u1RxDatlat_Save
4054 09:53:25.293472 sync preloader u1RxWinPerbitVref_Save
4055 09:53:25.299900 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4056 09:53:25.303729 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4057 09:53:25.306870 sync preloader delay_cell_unit
4058 09:53:25.310263 just_for_test_dump_coreboot_params dump all params
4059 09:53:25.312965 dump source = 0x0
4060 09:53:25.313438 dump params frequency:1600
4061 09:53:25.316502 dump params rank number:2
4062 09:53:25.316905
4063 09:53:25.320105 dump params write leveling
4064 09:53:25.322899 write leveling[0][0][0] = 0x20
4065 09:53:25.326748 write leveling[0][0][1] = 0x16
4066 09:53:25.327135 write leveling[0][1][0] = 0x1f
4067 09:53:25.330047 write leveling[0][1][1] = 0x17
4068 09:53:25.332954 write leveling[1][0][0] = 0x22
4069 09:53:25.336432 write leveling[1][0][1] = 0x21
4070 09:53:25.339982 write leveling[1][1][0] = 0x21
4071 09:53:25.342932 write leveling[1][1][1] = 0x1d
4072 09:53:25.343316 dump params cbt_cs
4073 09:53:25.346053 cbt_cs[0][0] = 0x6
4074 09:53:25.346474 cbt_cs[0][1] = 0x6
4075 09:53:25.349776 cbt_cs[1][0] = 0xa
4076 09:53:25.350160 cbt_cs[1][1] = 0xa
4077 09:53:25.353826 dump params cbt_mr12
4078 09:53:25.354209 cbt_mr12[0][0] = 0x1e
4079 09:53:25.355818 cbt_mr12[0][1] = 0x1c
4080 09:53:25.358921 cbt_mr12[1][0] = 0x1e
4081 09:53:25.359304 cbt_mr12[1][1] = 0x20
4082 09:53:25.362476 dump params tx window
4083 09:53:25.365614 tx_center_min[0][0][0] = 985
4084 09:53:25.366003 tx_center_max[0][0][0] = 991
4085 09:53:25.368771 tx_center_min[0][0][1] = 976
4086 09:53:25.372229 tx_center_max[0][0][1] = 983
4087 09:53:25.375527 tx_center_min[0][1][0] = 985
4088 09:53:25.378634 tx_center_max[0][1][0] = 990
4089 09:53:25.379021 tx_center_min[0][1][1] = 977
4090 09:53:25.382035 tx_center_max[0][1][1] = 984
4091 09:53:25.385524 tx_center_min[1][0][0] = 991
4092 09:53:25.388964 tx_center_max[1][0][0] = 996
4093 09:53:25.392242 tx_center_min[1][0][1] = 987
4094 09:53:25.392643 tx_center_max[1][0][1] = 994
4095 09:53:25.395445 tx_center_min[1][1][0] = 988
4096 09:53:25.398767 tx_center_max[1][1][0] = 994
4097 09:53:25.402127 tx_center_min[1][1][1] = 981
4098 09:53:25.405180 tx_center_max[1][1][1] = 988
4099 09:53:25.405599 dump params tx window
4100 09:53:25.408345 tx_win_center[0][0][0] = 991
4101 09:53:25.411483 tx_first_pass[0][0][0] = 979
4102 09:53:25.414799 tx_last_pass[0][0][0] = 1003
4103 09:53:25.415204 tx_win_center[0][0][1] = 990
4104 09:53:25.418034 tx_first_pass[0][0][1] = 978
4105 09:53:25.421415 tx_last_pass[0][0][1] = 1003
4106 09:53:25.424568 tx_win_center[0][0][2] = 991
4107 09:53:25.428414 tx_first_pass[0][0][2] = 979
4108 09:53:25.428799 tx_last_pass[0][0][2] = 1003
4109 09:53:25.431500 tx_win_center[0][0][3] = 985
4110 09:53:25.434653 tx_first_pass[0][0][3] = 974
4111 09:53:25.438023 tx_last_pass[0][0][3] = 997
4112 09:53:25.440955 tx_win_center[0][0][4] = 989
4113 09:53:25.441342 tx_first_pass[0][0][4] = 977
4114 09:53:25.444830 tx_last_pass[0][0][4] = 1002
4115 09:53:25.447925 tx_win_center[0][0][5] = 987
4116 09:53:25.451152 tx_first_pass[0][0][5] = 976
4117 09:53:25.454417 tx_last_pass[0][0][5] = 999
4118 09:53:25.454800 tx_win_center[0][0][6] = 988
4119 09:53:25.457495 tx_first_pass[0][0][6] = 976
4120 09:53:25.460794 tx_last_pass[0][0][6] = 1000
4121 09:53:25.464407 tx_win_center[0][0][7] = 990
4122 09:53:25.467271 tx_first_pass[0][0][7] = 978
4123 09:53:25.467672 tx_last_pass[0][0][7] = 1002
4124 09:53:25.470363 tx_win_center[0][0][8] = 976
4125 09:53:25.473863 tx_first_pass[0][0][8] = 965
4126 09:53:25.477311 tx_last_pass[0][0][8] = 988
4127 09:53:25.477736 tx_win_center[0][0][9] = 978
4128 09:53:25.480580 tx_first_pass[0][0][9] = 967
4129 09:53:25.483595 tx_last_pass[0][0][9] = 989
4130 09:53:25.487521 tx_win_center[0][0][10] = 983
4131 09:53:25.490517 tx_first_pass[0][0][10] = 972
4132 09:53:25.490924 tx_last_pass[0][0][10] = 995
4133 09:53:25.493589 tx_win_center[0][0][11] = 977
4134 09:53:25.496889 tx_first_pass[0][0][11] = 966
4135 09:53:25.500117 tx_last_pass[0][0][11] = 989
4136 09:53:25.503282 tx_win_center[0][0][12] = 978
4137 09:53:25.507019 tx_first_pass[0][0][12] = 967
4138 09:53:25.507407 tx_last_pass[0][0][12] = 990
4139 09:53:25.510235 tx_win_center[0][0][13] = 978
4140 09:53:25.513368 tx_first_pass[0][0][13] = 967
4141 09:53:25.516564 tx_last_pass[0][0][13] = 990
4142 09:53:25.519720 tx_win_center[0][0][14] = 979
4143 09:53:25.520109 tx_first_pass[0][0][14] = 968
4144 09:53:25.523026 tx_last_pass[0][0][14] = 991
4145 09:53:25.526933 tx_win_center[0][0][15] = 982
4146 09:53:25.530085 tx_first_pass[0][0][15] = 970
4147 09:53:25.533420 tx_last_pass[0][0][15] = 994
4148 09:53:25.533838 tx_win_center[0][1][0] = 990
4149 09:53:25.536410 tx_first_pass[0][1][0] = 978
4150 09:53:25.539784 tx_last_pass[0][1][0] = 1003
4151 09:53:25.542871 tx_win_center[0][1][1] = 989
4152 09:53:25.546171 tx_first_pass[0][1][1] = 977
4153 09:53:25.546558 tx_last_pass[0][1][1] = 1001
4154 09:53:25.549723 tx_win_center[0][1][2] = 990
4155 09:53:25.552785 tx_first_pass[0][1][2] = 978
4156 09:53:25.556349 tx_last_pass[0][1][2] = 1002
4157 09:53:25.559569 tx_win_center[0][1][3] = 985
4158 09:53:25.559955 tx_first_pass[0][1][3] = 973
4159 09:53:25.562845 tx_last_pass[0][1][3] = 997
4160 09:53:25.566123 tx_win_center[0][1][4] = 989
4161 09:53:25.569450 tx_first_pass[0][1][4] = 977
4162 09:53:25.572786 tx_last_pass[0][1][4] = 1001
4163 09:53:25.573172 tx_win_center[0][1][5] = 987
4164 09:53:25.576010 tx_first_pass[0][1][5] = 975
4165 09:53:25.579322 tx_last_pass[0][1][5] = 999
4166 09:53:25.582464 tx_win_center[0][1][6] = 987
4167 09:53:25.585817 tx_first_pass[0][1][6] = 976
4168 09:53:25.586205 tx_last_pass[0][1][6] = 999
4169 09:53:25.588758 tx_win_center[0][1][7] = 989
4170 09:53:25.591994 tx_first_pass[0][1][7] = 977
4171 09:53:25.595194 tx_last_pass[0][1][7] = 1001
4172 09:53:25.595592 tx_win_center[0][1][8] = 977
4173 09:53:25.598633 tx_first_pass[0][1][8] = 966
4174 09:53:25.601987 tx_last_pass[0][1][8] = 989
4175 09:53:25.605518 tx_win_center[0][1][9] = 979
4176 09:53:25.608576 tx_first_pass[0][1][9] = 968
4177 09:53:25.609201 tx_last_pass[0][1][9] = 991
4178 09:53:25.611805 tx_win_center[0][1][10] = 984
4179 09:53:25.614780 tx_first_pass[0][1][10] = 973
4180 09:53:25.618550 tx_last_pass[0][1][10] = 996
4181 09:53:25.621481 tx_win_center[0][1][11] = 978
4182 09:53:25.624910 tx_first_pass[0][1][11] = 967
4183 09:53:25.625453 tx_last_pass[0][1][11] = 990
4184 09:53:25.628148 tx_win_center[0][1][12] = 980
4185 09:53:25.631522 tx_first_pass[0][1][12] = 969
4186 09:53:25.635159 tx_last_pass[0][1][12] = 991
4187 09:53:25.638386 tx_win_center[0][1][13] = 979
4188 09:53:25.638808 tx_first_pass[0][1][13] = 968
4189 09:53:25.641623 tx_last_pass[0][1][13] = 991
4190 09:53:25.644614 tx_win_center[0][1][14] = 981
4191 09:53:25.647808 tx_first_pass[0][1][14] = 970
4192 09:53:25.651193 tx_last_pass[0][1][14] = 992
4193 09:53:25.651593 tx_win_center[0][1][15] = 984
4194 09:53:25.654478 tx_first_pass[0][1][15] = 973
4195 09:53:25.657534 tx_last_pass[0][1][15] = 996
4196 09:53:25.661093 tx_win_center[1][0][0] = 996
4197 09:53:25.663957 tx_first_pass[1][0][0] = 984
4198 09:53:25.667392 tx_last_pass[1][0][0] = 1008
4199 09:53:25.667826 tx_win_center[1][0][1] = 995
4200 09:53:25.670747 tx_first_pass[1][0][1] = 983
4201 09:53:25.674156 tx_last_pass[1][0][1] = 1007
4202 09:53:25.677383 tx_win_center[1][0][2] = 992
4203 09:53:25.677835 tx_first_pass[1][0][2] = 979
4204 09:53:25.680500 tx_last_pass[1][0][2] = 1006
4205 09:53:25.684404 tx_win_center[1][0][3] = 991
4206 09:53:25.687077 tx_first_pass[1][0][3] = 978
4207 09:53:25.690402 tx_last_pass[1][0][3] = 1004
4208 09:53:25.690793 tx_win_center[1][0][4] = 994
4209 09:53:25.693880 tx_first_pass[1][0][4] = 982
4210 09:53:25.696864 tx_last_pass[1][0][4] = 1007
4211 09:53:25.700701 tx_win_center[1][0][5] = 996
4212 09:53:25.703939 tx_first_pass[1][0][5] = 984
4213 09:53:25.704330 tx_last_pass[1][0][5] = 1008
4214 09:53:25.707039 tx_win_center[1][0][6] = 995
4215 09:53:25.710150 tx_first_pass[1][0][6] = 983
4216 09:53:25.713424 tx_last_pass[1][0][6] = 1007
4217 09:53:25.717033 tx_win_center[1][0][7] = 994
4218 09:53:25.717421 tx_first_pass[1][0][7] = 982
4219 09:53:25.719797 tx_last_pass[1][0][7] = 1007
4220 09:53:25.723013 tx_win_center[1][0][8] = 990
4221 09:53:25.726422 tx_first_pass[1][0][8] = 979
4222 09:53:25.730231 tx_last_pass[1][0][8] = 1002
4223 09:53:25.730622 tx_win_center[1][0][9] = 989
4224 09:53:25.733202 tx_first_pass[1][0][9] = 978
4225 09:53:25.736605 tx_last_pass[1][0][9] = 1001
4226 09:53:25.739805 tx_win_center[1][0][10] = 992
4227 09:53:25.742964 tx_first_pass[1][0][10] = 981
4228 09:53:25.743360 tx_last_pass[1][0][10] = 1003
4229 09:53:25.746162 tx_win_center[1][0][11] = 993
4230 09:53:25.749654 tx_first_pass[1][0][11] = 983
4231 09:53:25.752682 tx_last_pass[1][0][11] = 1004
4232 09:53:25.756333 tx_win_center[1][0][12] = 994
4233 09:53:25.759381 tx_first_pass[1][0][12] = 984
4234 09:53:25.759768 tx_last_pass[1][0][12] = 1004
4235 09:53:25.762628 tx_win_center[1][0][13] = 994
4236 09:53:25.765988 tx_first_pass[1][0][13] = 984
4237 09:53:25.768859 tx_last_pass[1][0][13] = 1004
4238 09:53:25.772298 tx_win_center[1][0][14] = 992
4239 09:53:25.775754 tx_first_pass[1][0][14] = 982
4240 09:53:25.776144 tx_last_pass[1][0][14] = 1003
4241 09:53:25.779287 tx_win_center[1][0][15] = 987
4242 09:53:25.782310 tx_first_pass[1][0][15] = 976
4243 09:53:25.785770 tx_last_pass[1][0][15] = 999
4244 09:53:25.789122 tx_win_center[1][1][0] = 994
4245 09:53:25.789508 tx_first_pass[1][1][0] = 982
4246 09:53:25.792388 tx_last_pass[1][1][0] = 1006
4247 09:53:25.795601 tx_win_center[1][1][1] = 993
4248 09:53:25.798942 tx_first_pass[1][1][1] = 980
4249 09:53:25.802331 tx_last_pass[1][1][1] = 1006
4250 09:53:25.802761 tx_win_center[1][1][2] = 991
4251 09:53:25.805533 tx_first_pass[1][1][2] = 978
4252 09:53:25.808844 tx_last_pass[1][1][2] = 1004
4253 09:53:25.811997 tx_win_center[1][1][3] = 988
4254 09:53:25.815246 tx_first_pass[1][1][3] = 976
4255 09:53:25.815630 tx_last_pass[1][1][3] = 1001
4256 09:53:25.818685 tx_win_center[1][1][4] = 993
4257 09:53:25.821768 tx_first_pass[1][1][4] = 980
4258 09:53:25.824905 tx_last_pass[1][1][4] = 1006
4259 09:53:25.828427 tx_win_center[1][1][5] = 994
4260 09:53:25.828832 tx_first_pass[1][1][5] = 982
4261 09:53:25.831224 tx_last_pass[1][1][5] = 1006
4262 09:53:25.834954 tx_win_center[1][1][6] = 992
4263 09:53:25.838393 tx_first_pass[1][1][6] = 979
4264 09:53:25.841597 tx_last_pass[1][1][6] = 1005
4265 09:53:25.842000 tx_win_center[1][1][7] = 993
4266 09:53:25.844443 tx_first_pass[1][1][7] = 980
4267 09:53:25.847957 tx_last_pass[1][1][7] = 1006
4268 09:53:25.851254 tx_win_center[1][1][8] = 984
4269 09:53:25.854490 tx_first_pass[1][1][8] = 972
4270 09:53:25.854929 tx_last_pass[1][1][8] = 996
4271 09:53:25.857961 tx_win_center[1][1][9] = 983
4272 09:53:25.860848 tx_first_pass[1][1][9] = 972
4273 09:53:25.864003 tx_last_pass[1][1][9] = 995
4274 09:53:25.867895 tx_win_center[1][1][10] = 987
4275 09:53:25.868310 tx_first_pass[1][1][10] = 975
4276 09:53:25.870759 tx_last_pass[1][1][10] = 1000
4277 09:53:25.873680 tx_win_center[1][1][11] = 987
4278 09:53:25.877186 tx_first_pass[1][1][11] = 976
4279 09:53:25.880715 tx_last_pass[1][1][11] = 999
4280 09:53:25.881109 tx_win_center[1][1][12] = 988
4281 09:53:25.883951 tx_first_pass[1][1][12] = 977
4282 09:53:25.886817 tx_last_pass[1][1][12] = 1000
4283 09:53:25.890272 tx_win_center[1][1][13] = 988
4284 09:53:25.893854 tx_first_pass[1][1][13] = 977
4285 09:53:25.897030 tx_last_pass[1][1][13] = 1000
4286 09:53:25.897644 tx_win_center[1][1][14] = 987
4287 09:53:25.900194 tx_first_pass[1][1][14] = 975
4288 09:53:25.903549 tx_last_pass[1][1][14] = 999
4289 09:53:25.906629 tx_win_center[1][1][15] = 981
4290 09:53:25.910178 tx_first_pass[1][1][15] = 970
4291 09:53:25.910596 tx_last_pass[1][1][15] = 993
4292 09:53:25.913256 dump params rx window
4293 09:53:25.916352 rx_firspass[0][0][0] = 5
4294 09:53:25.916739 rx_lastpass[0][0][0] = 39
4295 09:53:25.919615 rx_firspass[0][0][1] = 5
4296 09:53:25.923406 rx_lastpass[0][0][1] = 36
4297 09:53:25.926664 rx_firspass[0][0][2] = 7
4298 09:53:25.927052 rx_lastpass[0][0][2] = 38
4299 09:53:25.929648 rx_firspass[0][0][3] = -1
4300 09:53:25.933042 rx_lastpass[0][0][3] = 30
4301 09:53:25.933429 rx_firspass[0][0][4] = 5
4302 09:53:25.936517 rx_lastpass[0][0][4] = 36
4303 09:53:25.939583 rx_firspass[0][0][5] = 1
4304 09:53:25.942669 rx_lastpass[0][0][5] = 33
4305 09:53:25.943058 rx_firspass[0][0][6] = 5
4306 09:53:25.946186 rx_lastpass[0][0][6] = 34
4307 09:53:25.949598 rx_firspass[0][0][7] = 7
4308 09:53:25.949988 rx_lastpass[0][0][7] = 36
4309 09:53:25.952472 rx_firspass[0][0][8] = -1
4310 09:53:25.955815 rx_lastpass[0][0][8] = 31
4311 09:53:25.959138 rx_firspass[0][0][9] = 1
4312 09:53:25.959526 rx_lastpass[0][0][9] = 32
4313 09:53:25.962360 rx_firspass[0][0][10] = 9
4314 09:53:25.965481 rx_lastpass[0][0][10] = 39
4315 09:53:25.965905 rx_firspass[0][0][11] = 2
4316 09:53:25.968819 rx_lastpass[0][0][11] = 31
4317 09:53:25.972496 rx_firspass[0][0][12] = 1
4318 09:53:25.975602 rx_lastpass[0][0][12] = 34
4319 09:53:25.975995 rx_firspass[0][0][13] = 2
4320 09:53:25.979197 rx_lastpass[0][0][13] = 33
4321 09:53:25.982452 rx_firspass[0][0][14] = 3
4322 09:53:25.985670 rx_lastpass[0][0][14] = 36
4323 09:53:25.986059 rx_firspass[0][0][15] = 6
4324 09:53:25.989038 rx_lastpass[0][0][15] = 37
4325 09:53:25.992385 rx_firspass[0][1][0] = 5
4326 09:53:25.995606 rx_lastpass[0][1][0] = 38
4327 09:53:25.996013 rx_firspass[0][1][1] = 3
4328 09:53:25.999061 rx_lastpass[0][1][1] = 39
4329 09:53:26.002106 rx_firspass[0][1][2] = 5
4330 09:53:26.002490 rx_lastpass[0][1][2] = 40
4331 09:53:26.005250 rx_firspass[0][1][3] = -2
4332 09:53:26.008527 rx_lastpass[0][1][3] = 31
4333 09:53:26.011661 rx_firspass[0][1][4] = 5
4334 09:53:26.012047 rx_lastpass[0][1][4] = 39
4335 09:53:26.015224 rx_firspass[0][1][5] = 0
4336 09:53:26.018262 rx_lastpass[0][1][5] = 32
4337 09:53:26.018648 rx_firspass[0][1][6] = 1
4338 09:53:26.021801 rx_lastpass[0][1][6] = 35
4339 09:53:26.025001 rx_firspass[0][1][7] = 5
4340 09:53:26.028415 rx_lastpass[0][1][7] = 37
4341 09:53:26.028804 rx_firspass[0][1][8] = 0
4342 09:53:26.031649 rx_lastpass[0][1][8] = 33
4343 09:53:26.034652 rx_firspass[0][1][9] = 2
4344 09:53:26.035051 rx_lastpass[0][1][9] = 35
4345 09:53:26.037679 rx_firspass[0][1][10] = 9
4346 09:53:26.041340 rx_lastpass[0][1][10] = 42
4347 09:53:26.044708 rx_firspass[0][1][11] = 0
4348 09:53:26.045095 rx_lastpass[0][1][11] = 34
4349 09:53:26.047917 rx_firspass[0][1][12] = 3
4350 09:53:26.050934 rx_lastpass[0][1][12] = 36
4351 09:53:26.051322 rx_firspass[0][1][13] = 3
4352 09:53:26.054192 rx_lastpass[0][1][13] = 36
4353 09:53:26.057899 rx_firspass[0][1][14] = 5
4354 09:53:26.061066 rx_lastpass[0][1][14] = 37
4355 09:53:26.061453 rx_firspass[0][1][15] = 6
4356 09:53:26.064383 rx_lastpass[0][1][15] = 40
4357 09:53:26.067649 rx_firspass[1][0][0] = 5
4358 09:53:26.070859 rx_lastpass[1][0][0] = 39
4359 09:53:26.071245 rx_firspass[1][0][1] = 3
4360 09:53:26.073823 rx_lastpass[1][0][1] = 36
4361 09:53:26.077222 rx_firspass[1][0][2] = 4
4362 09:53:26.077648 rx_lastpass[1][0][2] = 36
4363 09:53:26.080656 rx_firspass[1][0][3] = -1
4364 09:53:26.084080 rx_lastpass[1][0][3] = 34
4365 09:53:26.087088 rx_firspass[1][0][4] = 4
4366 09:53:26.087477 rx_lastpass[1][0][4] = 36
4367 09:53:26.090356 rx_firspass[1][0][5] = 6
4368 09:53:26.093540 rx_lastpass[1][0][5] = 38
4369 09:53:26.093969 rx_firspass[1][0][6] = 10
4370 09:53:26.096954 rx_lastpass[1][0][6] = 39
4371 09:53:26.100323 rx_firspass[1][0][7] = 5
4372 09:53:26.103570 rx_lastpass[1][0][7] = 37
4373 09:53:26.104023 rx_firspass[1][0][8] = 0
4374 09:53:26.106725 rx_lastpass[1][0][8] = 33
4375 09:53:26.109858 rx_firspass[1][0][9] = 2
4376 09:53:26.110270 rx_lastpass[1][0][9] = 32
4377 09:53:26.113522 rx_firspass[1][0][10] = 5
4378 09:53:26.116630 rx_lastpass[1][0][10] = 36
4379 09:53:26.119648 rx_firspass[1][0][11] = 7
4380 09:53:26.120035 rx_lastpass[1][0][11] = 36
4381 09:53:26.123187 rx_firspass[1][0][12] = 5
4382 09:53:26.126441 rx_lastpass[1][0][12] = 38
4383 09:53:26.129982 rx_firspass[1][0][13] = 6
4384 09:53:26.130253 rx_lastpass[1][0][13] = 36
4385 09:53:26.132786 rx_firspass[1][0][14] = 7
4386 09:53:26.136331 rx_lastpass[1][0][14] = 37
4387 09:53:26.136602 rx_firspass[1][0][15] = 0
4388 09:53:26.139590 rx_lastpass[1][0][15] = 29
4389 09:53:26.142557 rx_firspass[1][1][0] = 6
4390 09:53:26.146003 rx_lastpass[1][1][0] = 38
4391 09:53:26.146276 rx_firspass[1][1][1] = 2
4392 09:53:26.149130 rx_lastpass[1][1][1] = 37
4393 09:53:26.152293 rx_firspass[1][1][2] = 3
4394 09:53:26.156029 rx_lastpass[1][1][2] = 34
4395 09:53:26.156302 rx_firspass[1][1][3] = 0
4396 09:53:26.159129 rx_lastpass[1][1][3] = 32
4397 09:53:26.162633 rx_firspass[1][1][4] = 3
4398 09:53:26.163014 rx_lastpass[1][1][4] = 38
4399 09:53:26.165653 rx_firspass[1][1][5] = 5
4400 09:53:26.169017 rx_lastpass[1][1][5] = 40
4401 09:53:26.169404 rx_firspass[1][1][6] = 7
4402 09:53:26.172251 rx_lastpass[1][1][6] = 40
4403 09:53:26.175426 rx_firspass[1][1][7] = 4
4404 09:53:26.178537 rx_lastpass[1][1][7] = 37
4405 09:53:26.178923 rx_firspass[1][1][8] = 2
4406 09:53:26.182316 rx_lastpass[1][1][8] = 33
4407 09:53:26.185234 rx_firspass[1][1][9] = 1
4408 09:53:26.185659 rx_lastpass[1][1][9] = 34
4409 09:53:26.188760 rx_firspass[1][1][10] = 4
4410 09:53:26.191654 rx_lastpass[1][1][10] = 38
4411 09:53:26.195315 rx_firspass[1][1][11] = 6
4412 09:53:26.195701 rx_lastpass[1][1][11] = 39
4413 09:53:26.198442 rx_firspass[1][1][12] = 7
4414 09:53:26.201695 rx_lastpass[1][1][12] = 38
4415 09:53:26.204919 rx_firspass[1][1][13] = 7
4416 09:53:26.205302 rx_lastpass[1][1][13] = 39
4417 09:53:26.208211 rx_firspass[1][1][14] = 5
4418 09:53:26.211425 rx_lastpass[1][1][14] = 39
4419 09:53:26.214804 rx_firspass[1][1][15] = -2
4420 09:53:26.215189 rx_lastpass[1][1][15] = 31
4421 09:53:26.218464 dump params clk_delay
4422 09:53:26.218850 clk_delay[0] = 1
4423 09:53:26.221626 clk_delay[1] = 0
4424 09:53:26.222010 dump params dqs_delay
4425 09:53:26.224778 dqs_delay[0][0] = 0
4426 09:53:26.227805 dqs_delay[0][1] = 0
4427 09:53:26.228188 dqs_delay[1][0] = -1
4428 09:53:26.231519 dqs_delay[1][1] = 0
4429 09:53:26.234784 dump params delay_cell_unit = 744
4430 09:53:26.235253 dump source = 0x0
4431 09:53:26.238069 dump params frequency:1200
4432 09:53:26.241028 dump params rank number:2
4433 09:53:26.241411
4434 09:53:26.241742 dump params write leveling
4435 09:53:26.244574 write leveling[0][0][0] = 0x0
4436 09:53:26.248172 write leveling[0][0][1] = 0x0
4437 09:53:26.251298 write leveling[0][1][0] = 0x0
4438 09:53:26.254696 write leveling[0][1][1] = 0x0
4439 09:53:26.255080 write leveling[1][0][0] = 0x0
4440 09:53:26.257240 write leveling[1][0][1] = 0x0
4441 09:53:26.260805 write leveling[1][1][0] = 0x0
4442 09:53:26.263925 write leveling[1][1][1] = 0x0
4443 09:53:26.264311 dump params cbt_cs
4444 09:53:26.267399 cbt_cs[0][0] = 0x0
4445 09:53:26.267782 cbt_cs[0][1] = 0x0
4446 09:53:26.270617 cbt_cs[1][0] = 0x0
4447 09:53:26.274470 cbt_cs[1][1] = 0x0
4448 09:53:26.274853 dump params cbt_mr12
4449 09:53:26.277043 cbt_mr12[0][0] = 0x0
4450 09:53:26.277441 cbt_mr12[0][1] = 0x0
4451 09:53:26.280550 cbt_mr12[1][0] = 0x0
4452 09:53:26.280932 cbt_mr12[1][1] = 0x0
4453 09:53:26.283873 dump params tx window
4454 09:53:26.287148 tx_center_min[0][0][0] = 0
4455 09:53:26.290311 tx_center_max[0][0][0] = 0
4456 09:53:26.290703 tx_center_min[0][0][1] = 0
4457 09:53:26.293397 tx_center_max[0][0][1] = 0
4458 09:53:26.297165 tx_center_min[0][1][0] = 0
4459 09:53:26.300213 tx_center_max[0][1][0] = 0
4460 09:53:26.300600 tx_center_min[0][1][1] = 0
4461 09:53:26.303087 tx_center_max[0][1][1] = 0
4462 09:53:26.306309 tx_center_min[1][0][0] = 0
4463 09:53:26.309575 tx_center_max[1][0][0] = 0
4464 09:53:26.310113 tx_center_min[1][0][1] = 0
4465 09:53:26.312934 tx_center_max[1][0][1] = 0
4466 09:53:26.316453 tx_center_min[1][1][0] = 0
4467 09:53:26.319730 tx_center_max[1][1][0] = 0
4468 09:53:26.320116 tx_center_min[1][1][1] = 0
4469 09:53:26.323183 tx_center_max[1][1][1] = 0
4470 09:53:26.326239 dump params tx window
4471 09:53:26.326620 tx_win_center[0][0][0] = 0
4472 09:53:26.329319 tx_first_pass[0][0][0] = 0
4473 09:53:26.333076 tx_last_pass[0][0][0] = 0
4474 09:53:26.336200 tx_win_center[0][0][1] = 0
4475 09:53:26.336591 tx_first_pass[0][0][1] = 0
4476 09:53:26.339428 tx_last_pass[0][0][1] = 0
4477 09:53:26.342773 tx_win_center[0][0][2] = 0
4478 09:53:26.345973 tx_first_pass[0][0][2] = 0
4479 09:53:26.346359 tx_last_pass[0][0][2] = 0
4480 09:53:26.349306 tx_win_center[0][0][3] = 0
4481 09:53:26.352483 tx_first_pass[0][0][3] = 0
4482 09:53:26.352869 tx_last_pass[0][0][3] = 0
4483 09:53:26.355664 tx_win_center[0][0][4] = 0
4484 09:53:26.358798 tx_first_pass[0][0][4] = 0
4485 09:53:26.362488 tx_last_pass[0][0][4] = 0
4486 09:53:26.362874 tx_win_center[0][0][5] = 0
4487 09:53:26.365502 tx_first_pass[0][0][5] = 0
4488 09:53:26.368564 tx_last_pass[0][0][5] = 0
4489 09:53:26.372011 tx_win_center[0][0][6] = 0
4490 09:53:26.372398 tx_first_pass[0][0][6] = 0
4491 09:53:26.375128 tx_last_pass[0][0][6] = 0
4492 09:53:26.379131 tx_win_center[0][0][7] = 0
4493 09:53:26.381862 tx_first_pass[0][0][7] = 0
4494 09:53:26.382237 tx_last_pass[0][0][7] = 0
4495 09:53:26.385409 tx_win_center[0][0][8] = 0
4496 09:53:26.388382 tx_first_pass[0][0][8] = 0
4497 09:53:26.391823 tx_last_pass[0][0][8] = 0
4498 09:53:26.392204 tx_win_center[0][0][9] = 0
4499 09:53:26.395186 tx_first_pass[0][0][9] = 0
4500 09:53:26.397895 tx_last_pass[0][0][9] = 0
4501 09:53:26.401397 tx_win_center[0][0][10] = 0
4502 09:53:26.401981 tx_first_pass[0][0][10] = 0
4503 09:53:26.404820 tx_last_pass[0][0][10] = 0
4504 09:53:26.407624 tx_win_center[0][0][11] = 0
4505 09:53:26.411216 tx_first_pass[0][0][11] = 0
4506 09:53:26.411603 tx_last_pass[0][0][11] = 0
4507 09:53:26.414810 tx_win_center[0][0][12] = 0
4508 09:53:26.418035 tx_first_pass[0][0][12] = 0
4509 09:53:26.421345 tx_last_pass[0][0][12] = 0
4510 09:53:26.421817 tx_win_center[0][0][13] = 0
4511 09:53:26.424652 tx_first_pass[0][0][13] = 0
4512 09:53:26.427731 tx_last_pass[0][0][13] = 0
4513 09:53:26.431024 tx_win_center[0][0][14] = 0
4514 09:53:26.431404 tx_first_pass[0][0][14] = 0
4515 09:53:26.434073 tx_last_pass[0][0][14] = 0
4516 09:53:26.437671 tx_win_center[0][0][15] = 0
4517 09:53:26.440680 tx_first_pass[0][0][15] = 0
4518 09:53:26.441060 tx_last_pass[0][0][15] = 0
4519 09:53:26.444204 tx_win_center[0][1][0] = 0
4520 09:53:26.447551 tx_first_pass[0][1][0] = 0
4521 09:53:26.450702 tx_last_pass[0][1][0] = 0
4522 09:53:26.451085 tx_win_center[0][1][1] = 0
4523 09:53:26.453882 tx_first_pass[0][1][1] = 0
4524 09:53:26.457071 tx_last_pass[0][1][1] = 0
4525 09:53:26.460607 tx_win_center[0][1][2] = 0
4526 09:53:26.460988 tx_first_pass[0][1][2] = 0
4527 09:53:26.463967 tx_last_pass[0][1][2] = 0
4528 09:53:26.467300 tx_win_center[0][1][3] = 0
4529 09:53:26.470354 tx_first_pass[0][1][3] = 0
4530 09:53:26.470734 tx_last_pass[0][1][3] = 0
4531 09:53:26.473747 tx_win_center[0][1][4] = 0
4532 09:53:26.476830 tx_first_pass[0][1][4] = 0
4533 09:53:26.477210 tx_last_pass[0][1][4] = 0
4534 09:53:26.480604 tx_win_center[0][1][5] = 0
4535 09:53:26.483609 tx_first_pass[0][1][5] = 0
4536 09:53:26.486676 tx_last_pass[0][1][5] = 0
4537 09:53:26.487060 tx_win_center[0][1][6] = 0
4538 09:53:26.489966 tx_first_pass[0][1][6] = 0
4539 09:53:26.493634 tx_last_pass[0][1][6] = 0
4540 09:53:26.496951 tx_win_center[0][1][7] = 0
4541 09:53:26.497330 tx_first_pass[0][1][7] = 0
4542 09:53:26.500126 tx_last_pass[0][1][7] = 0
4543 09:53:26.503173 tx_win_center[0][1][8] = 0
4544 09:53:26.506217 tx_first_pass[0][1][8] = 0
4545 09:53:26.506604 tx_last_pass[0][1][8] = 0
4546 09:53:26.509573 tx_win_center[0][1][9] = 0
4547 09:53:26.513367 tx_first_pass[0][1][9] = 0
4548 09:53:26.516506 tx_last_pass[0][1][9] = 0
4549 09:53:26.516886 tx_win_center[0][1][10] = 0
4550 09:53:26.519422 tx_first_pass[0][1][10] = 0
4551 09:53:26.522660 tx_last_pass[0][1][10] = 0
4552 09:53:26.525925 tx_win_center[0][1][11] = 0
4553 09:53:26.526416 tx_first_pass[0][1][11] = 0
4554 09:53:26.529596 tx_last_pass[0][1][11] = 0
4555 09:53:26.532851 tx_win_center[0][1][12] = 0
4556 09:53:26.536098 tx_first_pass[0][1][12] = 0
4557 09:53:26.536494 tx_last_pass[0][1][12] = 0
4558 09:53:26.539054 tx_win_center[0][1][13] = 0
4559 09:53:26.542327 tx_first_pass[0][1][13] = 0
4560 09:53:26.545641 tx_last_pass[0][1][13] = 0
4561 09:53:26.545845 tx_win_center[0][1][14] = 0
4562 09:53:26.548887 tx_first_pass[0][1][14] = 0
4563 09:53:26.552118 tx_last_pass[0][1][14] = 0
4564 09:53:26.555355 tx_win_center[0][1][15] = 0
4565 09:53:26.558613 tx_first_pass[0][1][15] = 0
4566 09:53:26.558827 tx_last_pass[0][1][15] = 0
4567 09:53:26.561955 tx_win_center[1][0][0] = 0
4568 09:53:26.565133 tx_first_pass[1][0][0] = 0
4569 09:53:26.565284 tx_last_pass[1][0][0] = 0
4570 09:53:26.568357 tx_win_center[1][0][1] = 0
4571 09:53:26.571601 tx_first_pass[1][0][1] = 0
4572 09:53:26.574699 tx_last_pass[1][0][1] = 0
4573 09:53:26.574830 tx_win_center[1][0][2] = 0
4574 09:53:26.578179 tx_first_pass[1][0][2] = 0
4575 09:53:26.581739 tx_last_pass[1][0][2] = 0
4576 09:53:26.584798 tx_win_center[1][0][3] = 0
4577 09:53:26.584932 tx_first_pass[1][0][3] = 0
4578 09:53:26.588216 tx_last_pass[1][0][3] = 0
4579 09:53:26.591406 tx_win_center[1][0][4] = 0
4580 09:53:26.594655 tx_first_pass[1][0][4] = 0
4581 09:53:26.594777 tx_last_pass[1][0][4] = 0
4582 09:53:26.597732 tx_win_center[1][0][5] = 0
4583 09:53:26.600971 tx_first_pass[1][0][5] = 0
4584 09:53:26.604700 tx_last_pass[1][0][5] = 0
4585 09:53:26.604785 tx_win_center[1][0][6] = 0
4586 09:53:26.608202 tx_first_pass[1][0][6] = 0
4587 09:53:26.611446 tx_last_pass[1][0][6] = 0
4588 09:53:26.611594 tx_win_center[1][0][7] = 0
4589 09:53:26.614592 tx_first_pass[1][0][7] = 0
4590 09:53:26.617830 tx_last_pass[1][0][7] = 0
4591 09:53:26.620855 tx_win_center[1][0][8] = 0
4592 09:53:26.620991 tx_first_pass[1][0][8] = 0
4593 09:53:26.624508 tx_last_pass[1][0][8] = 0
4594 09:53:26.627699 tx_win_center[1][0][9] = 0
4595 09:53:26.630920 tx_first_pass[1][0][9] = 0
4596 09:53:26.631105 tx_last_pass[1][0][9] = 0
4597 09:53:26.634374 tx_win_center[1][0][10] = 0
4598 09:53:26.637062 tx_first_pass[1][0][10] = 0
4599 09:53:26.640839 tx_last_pass[1][0][10] = 0
4600 09:53:26.641066 tx_win_center[1][0][11] = 0
4601 09:53:26.643738 tx_first_pass[1][0][11] = 0
4602 09:53:26.646794 tx_last_pass[1][0][11] = 0
4603 09:53:26.650470 tx_win_center[1][0][12] = 0
4604 09:53:26.650632 tx_first_pass[1][0][12] = 0
4605 09:53:26.653381 tx_last_pass[1][0][12] = 0
4606 09:53:26.657194 tx_win_center[1][0][13] = 0
4607 09:53:26.660393 tx_first_pass[1][0][13] = 0
4608 09:53:26.660550 tx_last_pass[1][0][13] = 0
4609 09:53:26.663631 tx_win_center[1][0][14] = 0
4610 09:53:26.666905 tx_first_pass[1][0][14] = 0
4611 09:53:26.670353 tx_last_pass[1][0][14] = 0
4612 09:53:26.673470 tx_win_center[1][0][15] = 0
4613 09:53:26.673598 tx_first_pass[1][0][15] = 0
4614 09:53:26.676794 tx_last_pass[1][0][15] = 0
4615 09:53:26.679969 tx_win_center[1][1][0] = 0
4616 09:53:26.683121 tx_first_pass[1][1][0] = 0
4617 09:53:26.683218 tx_last_pass[1][1][0] = 0
4618 09:53:26.686115 tx_win_center[1][1][1] = 0
4619 09:53:26.689750 tx_first_pass[1][1][1] = 0
4620 09:53:26.689835 tx_last_pass[1][1][1] = 0
4621 09:53:26.693487 tx_win_center[1][1][2] = 0
4622 09:53:26.696214 tx_first_pass[1][1][2] = 0
4623 09:53:26.699508 tx_last_pass[1][1][2] = 0
4624 09:53:26.699592 tx_win_center[1][1][3] = 0
4625 09:53:26.702963 tx_first_pass[1][1][3] = 0
4626 09:53:26.705940 tx_last_pass[1][1][3] = 0
4627 09:53:26.709208 tx_win_center[1][1][4] = 0
4628 09:53:26.709288 tx_first_pass[1][1][4] = 0
4629 09:53:26.713107 tx_last_pass[1][1][4] = 0
4630 09:53:26.716271 tx_win_center[1][1][5] = 0
4631 09:53:26.719485 tx_first_pass[1][1][5] = 0
4632 09:53:26.719567 tx_last_pass[1][1][5] = 0
4633 09:53:26.722742 tx_win_center[1][1][6] = 0
4634 09:53:26.725852 tx_first_pass[1][1][6] = 0
4635 09:53:26.728890 tx_last_pass[1][1][6] = 0
4636 09:53:26.728999 tx_win_center[1][1][7] = 0
4637 09:53:26.732007 tx_first_pass[1][1][7] = 0
4638 09:53:26.735834 tx_last_pass[1][1][7] = 0
4639 09:53:26.735911 tx_win_center[1][1][8] = 0
4640 09:53:26.739210 tx_first_pass[1][1][8] = 0
4641 09:53:26.742341 tx_last_pass[1][1][8] = 0
4642 09:53:26.745487 tx_win_center[1][1][9] = 0
4643 09:53:26.745622 tx_first_pass[1][1][9] = 0
4644 09:53:26.748625 tx_last_pass[1][1][9] = 0
4645 09:53:26.752190 tx_win_center[1][1][10] = 0
4646 09:53:26.755178 tx_first_pass[1][1][10] = 0
4647 09:53:26.755258 tx_last_pass[1][1][10] = 0
4648 09:53:26.758562 tx_win_center[1][1][11] = 0
4649 09:53:26.761758 tx_first_pass[1][1][11] = 0
4650 09:53:26.765352 tx_last_pass[1][1][11] = 0
4651 09:53:26.765441 tx_win_center[1][1][12] = 0
4652 09:53:26.768599 tx_first_pass[1][1][12] = 0
4653 09:53:26.771649 tx_last_pass[1][1][12] = 0
4654 09:53:26.775354 tx_win_center[1][1][13] = 0
4655 09:53:26.778066 tx_first_pass[1][1][13] = 0
4656 09:53:26.778152 tx_last_pass[1][1][13] = 0
4657 09:53:26.781333 tx_win_center[1][1][14] = 0
4658 09:53:26.784542 tx_first_pass[1][1][14] = 0
4659 09:53:26.788284 tx_last_pass[1][1][14] = 0
4660 09:53:26.788361 tx_win_center[1][1][15] = 0
4661 09:53:26.791355 tx_first_pass[1][1][15] = 0
4662 09:53:26.794768 tx_last_pass[1][1][15] = 0
4663 09:53:26.794904 dump params rx window
4664 09:53:26.797987 rx_firspass[0][0][0] = 0
4665 09:53:26.801367 rx_lastpass[0][0][0] = 0
4666 09:53:26.804223 rx_firspass[0][0][1] = 0
4667 09:53:26.804302 rx_lastpass[0][0][1] = 0
4668 09:53:26.807641 rx_firspass[0][0][2] = 0
4669 09:53:26.811105 rx_lastpass[0][0][2] = 0
4670 09:53:26.811250 rx_firspass[0][0][3] = 0
4671 09:53:26.814200 rx_lastpass[0][0][3] = 0
4672 09:53:26.817830 rx_firspass[0][0][4] = 0
4673 09:53:26.817905 rx_lastpass[0][0][4] = 0
4674 09:53:26.820897 rx_firspass[0][0][5] = 0
4675 09:53:26.823952 rx_lastpass[0][0][5] = 0
4676 09:53:26.827385 rx_firspass[0][0][6] = 0
4677 09:53:26.827540 rx_lastpass[0][0][6] = 0
4678 09:53:26.830792 rx_firspass[0][0][7] = 0
4679 09:53:26.833905 rx_lastpass[0][0][7] = 0
4680 09:53:26.834040 rx_firspass[0][0][8] = 0
4681 09:53:26.837461 rx_lastpass[0][0][8] = 0
4682 09:53:26.840666 rx_firspass[0][0][9] = 0
4683 09:53:26.840840 rx_lastpass[0][0][9] = 0
4684 09:53:26.844148 rx_firspass[0][0][10] = 0
4685 09:53:26.847192 rx_lastpass[0][0][10] = 0
4686 09:53:26.850639 rx_firspass[0][0][11] = 0
4687 09:53:26.850832 rx_lastpass[0][0][11] = 0
4688 09:53:26.853669 rx_firspass[0][0][12] = 0
4689 09:53:26.856989 rx_lastpass[0][0][12] = 0
4690 09:53:26.857146 rx_firspass[0][0][13] = 0
4691 09:53:26.860696 rx_lastpass[0][0][13] = 0
4692 09:53:26.863408 rx_firspass[0][0][14] = 0
4693 09:53:26.866885 rx_lastpass[0][0][14] = 0
4694 09:53:26.867178 rx_firspass[0][0][15] = 0
4695 09:53:26.870698 rx_lastpass[0][0][15] = 0
4696 09:53:26.873530 rx_firspass[0][1][0] = 0
4697 09:53:26.873873 rx_lastpass[0][1][0] = 0
4698 09:53:26.877250 rx_firspass[0][1][1] = 0
4699 09:53:26.880454 rx_lastpass[0][1][1] = 0
4700 09:53:26.883576 rx_firspass[0][1][2] = 0
4701 09:53:26.883989 rx_lastpass[0][1][2] = 0
4702 09:53:26.887010 rx_firspass[0][1][3] = 0
4703 09:53:26.890165 rx_lastpass[0][1][3] = 0
4704 09:53:26.890549 rx_firspass[0][1][4] = 0
4705 09:53:26.893334 rx_lastpass[0][1][4] = 0
4706 09:53:26.896747 rx_firspass[0][1][5] = 0
4707 09:53:26.897136 rx_lastpass[0][1][5] = 0
4708 09:53:26.900280 rx_firspass[0][1][6] = 0
4709 09:53:26.903067 rx_lastpass[0][1][6] = 0
4710 09:53:26.903498 rx_firspass[0][1][7] = 0
4711 09:53:26.906569 rx_lastpass[0][1][7] = 0
4712 09:53:26.909633 rx_firspass[0][1][8] = 0
4713 09:53:26.912963 rx_lastpass[0][1][8] = 0
4714 09:53:26.913355 rx_firspass[0][1][9] = 0
4715 09:53:26.916421 rx_lastpass[0][1][9] = 0
4716 09:53:26.919573 rx_firspass[0][1][10] = 0
4717 09:53:26.919957 rx_lastpass[0][1][10] = 0
4718 09:53:26.923083 rx_firspass[0][1][11] = 0
4719 09:53:26.926101 rx_lastpass[0][1][11] = 0
4720 09:53:26.929679 rx_firspass[0][1][12] = 0
4721 09:53:26.930067 rx_lastpass[0][1][12] = 0
4722 09:53:26.933282 rx_firspass[0][1][13] = 0
4723 09:53:26.936568 rx_lastpass[0][1][13] = 0
4724 09:53:26.937043 rx_firspass[0][1][14] = 0
4725 09:53:26.939736 rx_lastpass[0][1][14] = 0
4726 09:53:26.942578 rx_firspass[0][1][15] = 0
4727 09:53:26.945542 rx_lastpass[0][1][15] = 0
4728 09:53:26.946079 rx_firspass[1][0][0] = 0
4729 09:53:26.948981 rx_lastpass[1][0][0] = 0
4730 09:53:26.952139 rx_firspass[1][0][1] = 0
4731 09:53:26.952529 rx_lastpass[1][0][1] = 0
4732 09:53:26.955511 rx_firspass[1][0][2] = 0
4733 09:53:26.958767 rx_lastpass[1][0][2] = 0
4734 09:53:26.962181 rx_firspass[1][0][3] = 0
4735 09:53:26.962615 rx_lastpass[1][0][3] = 0
4736 09:53:26.965518 rx_firspass[1][0][4] = 0
4737 09:53:26.968646 rx_lastpass[1][0][4] = 0
4738 09:53:26.969074 rx_firspass[1][0][5] = 0
4739 09:53:26.971916 rx_lastpass[1][0][5] = 0
4740 09:53:26.975543 rx_firspass[1][0][6] = 0
4741 09:53:26.975980 rx_lastpass[1][0][6] = 0
4742 09:53:26.978839 rx_firspass[1][0][7] = 0
4743 09:53:26.981804 rx_lastpass[1][0][7] = 0
4744 09:53:26.982182 rx_firspass[1][0][8] = 0
4745 09:53:26.984795 rx_lastpass[1][0][8] = 0
4746 09:53:26.987784 rx_firspass[1][0][9] = 0
4747 09:53:26.991269 rx_lastpass[1][0][9] = 0
4748 09:53:26.991462 rx_firspass[1][0][10] = 0
4749 09:53:26.994775 rx_lastpass[1][0][10] = 0
4750 09:53:26.997820 rx_firspass[1][0][11] = 0
4751 09:53:27.001150 rx_lastpass[1][0][11] = 0
4752 09:53:27.001295 rx_firspass[1][0][12] = 0
4753 09:53:27.004454 rx_lastpass[1][0][12] = 0
4754 09:53:27.007474 rx_firspass[1][0][13] = 0
4755 09:53:27.007598 rx_lastpass[1][0][13] = 0
4756 09:53:27.010605 rx_firspass[1][0][14] = 0
4757 09:53:27.014015 rx_lastpass[1][0][14] = 0
4758 09:53:27.017395 rx_firspass[1][0][15] = 0
4759 09:53:27.017509 rx_lastpass[1][0][15] = 0
4760 09:53:27.020523 rx_firspass[1][1][0] = 0
4761 09:53:27.024153 rx_lastpass[1][1][0] = 0
4762 09:53:27.024234 rx_firspass[1][1][1] = 0
4763 09:53:27.027315 rx_lastpass[1][1][1] = 0
4764 09:53:27.030411 rx_firspass[1][1][2] = 0
4765 09:53:27.030546 rx_lastpass[1][1][2] = 0
4766 09:53:27.034006 rx_firspass[1][1][3] = 0
4767 09:53:27.037348 rx_lastpass[1][1][3] = 0
4768 09:53:27.041219 rx_firspass[1][1][4] = 0
4769 09:53:27.041784 rx_lastpass[1][1][4] = 0
4770 09:53:27.044243 rx_firspass[1][1][5] = 0
4771 09:53:27.047291 rx_lastpass[1][1][5] = 0
4772 09:53:27.047725 rx_firspass[1][1][6] = 0
4773 09:53:27.050592 rx_lastpass[1][1][6] = 0
4774 09:53:27.054248 rx_firspass[1][1][7] = 0
4775 09:53:27.054702 rx_lastpass[1][1][7] = 0
4776 09:53:27.057381 rx_firspass[1][1][8] = 0
4777 09:53:27.060698 rx_lastpass[1][1][8] = 0
4778 09:53:27.061111 rx_firspass[1][1][9] = 0
4779 09:53:27.064263 rx_lastpass[1][1][9] = 0
4780 09:53:27.067764 rx_firspass[1][1][10] = 0
4781 09:53:27.070566 rx_lastpass[1][1][10] = 0
4782 09:53:27.070991 rx_firspass[1][1][11] = 0
4783 09:53:27.074262 rx_lastpass[1][1][11] = 0
4784 09:53:27.077077 rx_firspass[1][1][12] = 0
4785 09:53:27.077502 rx_lastpass[1][1][12] = 0
4786 09:53:27.080475 rx_firspass[1][1][13] = 0
4787 09:53:27.083834 rx_lastpass[1][1][13] = 0
4788 09:53:27.087325 rx_firspass[1][1][14] = 0
4789 09:53:27.087827 rx_lastpass[1][1][14] = 0
4790 09:53:27.090734 rx_firspass[1][1][15] = 0
4791 09:53:27.094188 rx_lastpass[1][1][15] = 0
4792 09:53:27.094690 dump params clk_delay
4793 09:53:27.097220 clk_delay[0] = 0
4794 09:53:27.097799 clk_delay[1] = 0
4795 09:53:27.100032 dump params dqs_delay
4796 09:53:27.100456 dqs_delay[0][0] = 0
4797 09:53:27.103322 dqs_delay[0][1] = 0
4798 09:53:27.106898 dqs_delay[1][0] = 0
4799 09:53:27.107397 dqs_delay[1][1] = 0
4800 09:53:27.109903 dump params delay_cell_unit = 744
4801 09:53:27.113094 dump source = 0x0
4802 09:53:27.113517 dump params frequency:800
4803 09:53:27.116363 dump params rank number:2
4804 09:53:27.116785
4805 09:53:27.119962 dump params write leveling
4806 09:53:27.123240 write leveling[0][0][0] = 0x0
4807 09:53:27.123665 write leveling[0][0][1] = 0x0
4808 09:53:27.126331 write leveling[0][1][0] = 0x0
4809 09:53:27.129412 write leveling[0][1][1] = 0x0
4810 09:53:27.133202 write leveling[1][0][0] = 0x0
4811 09:53:27.136097 write leveling[1][0][1] = 0x0
4812 09:53:27.140198 write leveling[1][1][0] = 0x0
4813 09:53:27.140741 write leveling[1][1][1] = 0x0
4814 09:53:27.142829 dump params cbt_cs
4815 09:53:27.143252 cbt_cs[0][0] = 0x0
4816 09:53:27.145985 cbt_cs[0][1] = 0x0
4817 09:53:27.146590 cbt_cs[1][0] = 0x0
4818 09:53:27.149075 cbt_cs[1][1] = 0x0
4819 09:53:27.152428 dump params cbt_mr12
4820 09:53:27.152971 cbt_mr12[0][0] = 0x0
4821 09:53:27.155707 cbt_mr12[0][1] = 0x0
4822 09:53:27.156136 cbt_mr12[1][0] = 0x0
4823 09:53:27.158990 cbt_mr12[1][1] = 0x0
4824 09:53:27.159414 dump params tx window
4825 09:53:27.162448 tx_center_min[0][0][0] = 0
4826 09:53:27.165641 tx_center_max[0][0][0] = 0
4827 09:53:27.168704 tx_center_min[0][0][1] = 0
4828 09:53:27.169133 tx_center_max[0][0][1] = 0
4829 09:53:27.172282 tx_center_min[0][1][0] = 0
4830 09:53:27.175222 tx_center_max[0][1][0] = 0
4831 09:53:27.178664 tx_center_min[0][1][1] = 0
4832 09:53:27.179108 tx_center_max[0][1][1] = 0
4833 09:53:27.181898 tx_center_min[1][0][0] = 0
4834 09:53:27.185129 tx_center_max[1][0][0] = 0
4835 09:53:27.188696 tx_center_min[1][0][1] = 0
4836 09:53:27.189230 tx_center_max[1][0][1] = 0
4837 09:53:27.192192 tx_center_min[1][1][0] = 0
4838 09:53:27.195203 tx_center_max[1][1][0] = 0
4839 09:53:27.198633 tx_center_min[1][1][1] = 0
4840 09:53:27.199144 tx_center_max[1][1][1] = 0
4841 09:53:27.201750 dump params tx window
4842 09:53:27.204875 tx_win_center[0][0][0] = 0
4843 09:53:27.208004 tx_first_pass[0][0][0] = 0
4844 09:53:27.208390 tx_last_pass[0][0][0] = 0
4845 09:53:27.211534 tx_win_center[0][0][1] = 0
4846 09:53:27.215379 tx_first_pass[0][0][1] = 0
4847 09:53:27.215848 tx_last_pass[0][0][1] = 0
4848 09:53:27.218355 tx_win_center[0][0][2] = 0
4849 09:53:27.221829 tx_first_pass[0][0][2] = 0
4850 09:53:27.224782 tx_last_pass[0][0][2] = 0
4851 09:53:27.225174 tx_win_center[0][0][3] = 0
4852 09:53:27.228359 tx_first_pass[0][0][3] = 0
4853 09:53:27.231646 tx_last_pass[0][0][3] = 0
4854 09:53:27.234639 tx_win_center[0][0][4] = 0
4855 09:53:27.235027 tx_first_pass[0][0][4] = 0
4856 09:53:27.238007 tx_last_pass[0][0][4] = 0
4857 09:53:27.241508 tx_win_center[0][0][5] = 0
4858 09:53:27.244385 tx_first_pass[0][0][5] = 0
4859 09:53:27.244875 tx_last_pass[0][0][5] = 0
4860 09:53:27.247903 tx_win_center[0][0][6] = 0
4861 09:53:27.251044 tx_first_pass[0][0][6] = 0
4862 09:53:27.251431 tx_last_pass[0][0][6] = 0
4863 09:53:27.254384 tx_win_center[0][0][7] = 0
4864 09:53:27.258129 tx_first_pass[0][0][7] = 0
4865 09:53:27.260829 tx_last_pass[0][0][7] = 0
4866 09:53:27.261216 tx_win_center[0][0][8] = 0
4867 09:53:27.264468 tx_first_pass[0][0][8] = 0
4868 09:53:27.267179 tx_last_pass[0][0][8] = 0
4869 09:53:27.270588 tx_win_center[0][0][9] = 0
4870 09:53:27.271070 tx_first_pass[0][0][9] = 0
4871 09:53:27.273898 tx_last_pass[0][0][9] = 0
4872 09:53:27.277224 tx_win_center[0][0][10] = 0
4873 09:53:27.280318 tx_first_pass[0][0][10] = 0
4874 09:53:27.280667 tx_last_pass[0][0][10] = 0
4875 09:53:27.283867 tx_win_center[0][0][11] = 0
4876 09:53:27.286947 tx_first_pass[0][0][11] = 0
4877 09:53:27.290488 tx_last_pass[0][0][11] = 0
4878 09:53:27.290959 tx_win_center[0][0][12] = 0
4879 09:53:27.293587 tx_first_pass[0][0][12] = 0
4880 09:53:27.297387 tx_last_pass[0][0][12] = 0
4881 09:53:27.300341 tx_win_center[0][0][13] = 0
4882 09:53:27.300726 tx_first_pass[0][0][13] = 0
4883 09:53:27.303614 tx_last_pass[0][0][13] = 0
4884 09:53:27.307051 tx_win_center[0][0][14] = 0
4885 09:53:27.310197 tx_first_pass[0][0][14] = 0
4886 09:53:27.313264 tx_last_pass[0][0][14] = 0
4887 09:53:27.313771 tx_win_center[0][0][15] = 0
4888 09:53:27.316428 tx_first_pass[0][0][15] = 0
4889 09:53:27.320469 tx_last_pass[0][0][15] = 0
4890 09:53:27.323696 tx_win_center[0][1][0] = 0
4891 09:53:27.324207 tx_first_pass[0][1][0] = 0
4892 09:53:27.326671 tx_last_pass[0][1][0] = 0
4893 09:53:27.330012 tx_win_center[0][1][1] = 0
4894 09:53:27.333024 tx_first_pass[0][1][1] = 0
4895 09:53:27.333453 tx_last_pass[0][1][1] = 0
4896 09:53:27.336422 tx_win_center[0][1][2] = 0
4897 09:53:27.339888 tx_first_pass[0][1][2] = 0
4898 09:53:27.340397 tx_last_pass[0][1][2] = 0
4899 09:53:27.342816 tx_win_center[0][1][3] = 0
4900 09:53:27.346573 tx_first_pass[0][1][3] = 0
4901 09:53:27.349326 tx_last_pass[0][1][3] = 0
4902 09:53:27.349803 tx_win_center[0][1][4] = 0
4903 09:53:27.353228 tx_first_pass[0][1][4] = 0
4904 09:53:27.355843 tx_last_pass[0][1][4] = 0
4905 09:53:27.359090 tx_win_center[0][1][5] = 0
4906 09:53:27.359518 tx_first_pass[0][1][5] = 0
4907 09:53:27.362239 tx_last_pass[0][1][5] = 0
4908 09:53:27.366032 tx_win_center[0][1][6] = 0
4909 09:53:27.369007 tx_first_pass[0][1][6] = 0
4910 09:53:27.369514 tx_last_pass[0][1][6] = 0
4911 09:53:27.372166 tx_win_center[0][1][7] = 0
4912 09:53:27.375360 tx_first_pass[0][1][7] = 0
4913 09:53:27.375787 tx_last_pass[0][1][7] = 0
4914 09:53:27.378789 tx_win_center[0][1][8] = 0
4915 09:53:27.382667 tx_first_pass[0][1][8] = 0
4916 09:53:27.385317 tx_last_pass[0][1][8] = 0
4917 09:53:27.385814 tx_win_center[0][1][9] = 0
4918 09:53:27.388714 tx_first_pass[0][1][9] = 0
4919 09:53:27.392353 tx_last_pass[0][1][9] = 0
4920 09:53:27.395287 tx_win_center[0][1][10] = 0
4921 09:53:27.395794 tx_first_pass[0][1][10] = 0
4922 09:53:27.398752 tx_last_pass[0][1][10] = 0
4923 09:53:27.401812 tx_win_center[0][1][11] = 0
4924 09:53:27.405156 tx_first_pass[0][1][11] = 0
4925 09:53:27.405699 tx_last_pass[0][1][11] = 0
4926 09:53:27.408647 tx_win_center[0][1][12] = 0
4927 09:53:27.411669 tx_first_pass[0][1][12] = 0
4928 09:53:27.415222 tx_last_pass[0][1][12] = 0
4929 09:53:27.418182 tx_win_center[0][1][13] = 0
4930 09:53:27.418692 tx_first_pass[0][1][13] = 0
4931 09:53:27.421332 tx_last_pass[0][1][13] = 0
4932 09:53:27.425014 tx_win_center[0][1][14] = 0
4933 09:53:27.428280 tx_first_pass[0][1][14] = 0
4934 09:53:27.428705 tx_last_pass[0][1][14] = 0
4935 09:53:27.431762 tx_win_center[0][1][15] = 0
4936 09:53:27.434382 tx_first_pass[0][1][15] = 0
4937 09:53:27.437932 tx_last_pass[0][1][15] = 0
4938 09:53:27.438365 tx_win_center[1][0][0] = 0
4939 09:53:27.441589 tx_first_pass[1][0][0] = 0
4940 09:53:27.444580 tx_last_pass[1][0][0] = 0
4941 09:53:27.447646 tx_win_center[1][0][1] = 0
4942 09:53:27.448074 tx_first_pass[1][0][1] = 0
4943 09:53:27.450856 tx_last_pass[1][0][1] = 0
4944 09:53:27.454240 tx_win_center[1][0][2] = 0
4945 09:53:27.457959 tx_first_pass[1][0][2] = 0
4946 09:53:27.458469 tx_last_pass[1][0][2] = 0
4947 09:53:27.460417 tx_win_center[1][0][3] = 0
4948 09:53:27.464094 tx_first_pass[1][0][3] = 0
4949 09:53:27.464523 tx_last_pass[1][0][3] = 0
4950 09:53:27.467823 tx_win_center[1][0][4] = 0
4951 09:53:27.470506 tx_first_pass[1][0][4] = 0
4952 09:53:27.473982 tx_last_pass[1][0][4] = 0
4953 09:53:27.474489 tx_win_center[1][0][5] = 0
4954 09:53:27.477360 tx_first_pass[1][0][5] = 0
4955 09:53:27.480307 tx_last_pass[1][0][5] = 0
4956 09:53:27.483675 tx_win_center[1][0][6] = 0
4957 09:53:27.484103 tx_first_pass[1][0][6] = 0
4958 09:53:27.486764 tx_last_pass[1][0][6] = 0
4959 09:53:27.490710 tx_win_center[1][0][7] = 0
4960 09:53:27.493697 tx_first_pass[1][0][7] = 0
4961 09:53:27.494204 tx_last_pass[1][0][7] = 0
4962 09:53:27.496914 tx_win_center[1][0][8] = 0
4963 09:53:27.500147 tx_first_pass[1][0][8] = 0
4964 09:53:27.500722 tx_last_pass[1][0][8] = 0
4965 09:53:27.503894 tx_win_center[1][0][9] = 0
4966 09:53:27.506798 tx_first_pass[1][0][9] = 0
4967 09:53:27.509893 tx_last_pass[1][0][9] = 0
4968 09:53:27.510323 tx_win_center[1][0][10] = 0
4969 09:53:27.513306 tx_first_pass[1][0][10] = 0
4970 09:53:27.516782 tx_last_pass[1][0][10] = 0
4971 09:53:27.520098 tx_win_center[1][0][11] = 0
4972 09:53:27.523039 tx_first_pass[1][0][11] = 0
4973 09:53:27.523471 tx_last_pass[1][0][11] = 0
4974 09:53:27.526334 tx_win_center[1][0][12] = 0
4975 09:53:27.529605 tx_first_pass[1][0][12] = 0
4976 09:53:27.532685 tx_last_pass[1][0][12] = 0
4977 09:53:27.533244 tx_win_center[1][0][13] = 0
4978 09:53:27.535897 tx_first_pass[1][0][13] = 0
4979 09:53:27.539257 tx_last_pass[1][0][13] = 0
4980 09:53:27.543212 tx_win_center[1][0][14] = 0
4981 09:53:27.543640 tx_first_pass[1][0][14] = 0
4982 09:53:27.545999 tx_last_pass[1][0][14] = 0
4983 09:53:27.548891 tx_win_center[1][0][15] = 0
4984 09:53:27.553146 tx_first_pass[1][0][15] = 0
4985 09:53:27.553665 tx_last_pass[1][0][15] = 0
4986 09:53:27.556057 tx_win_center[1][1][0] = 0
4987 09:53:27.559276 tx_first_pass[1][1][0] = 0
4988 09:53:27.562624 tx_last_pass[1][1][0] = 0
4989 09:53:27.563066 tx_win_center[1][1][1] = 0
4990 09:53:27.565636 tx_first_pass[1][1][1] = 0
4991 09:53:27.568873 tx_last_pass[1][1][1] = 0
4992 09:53:27.572030 tx_win_center[1][1][2] = 0
4993 09:53:27.572482 tx_first_pass[1][1][2] = 0
4994 09:53:27.575847 tx_last_pass[1][1][2] = 0
4995 09:53:27.578639 tx_win_center[1][1][3] = 0
4996 09:53:27.582268 tx_first_pass[1][1][3] = 0
4997 09:53:27.582655 tx_last_pass[1][1][3] = 0
4998 09:53:27.585343 tx_win_center[1][1][4] = 0
4999 09:53:27.588595 tx_first_pass[1][1][4] = 0
5000 09:53:27.589080 tx_last_pass[1][1][4] = 0
5001 09:53:27.592057 tx_win_center[1][1][5] = 0
5002 09:53:27.595703 tx_first_pass[1][1][5] = 0
5003 09:53:27.598803 tx_last_pass[1][1][5] = 0
5004 09:53:27.599194 tx_win_center[1][1][6] = 0
5005 09:53:27.602180 tx_first_pass[1][1][6] = 0
5006 09:53:27.605445 tx_last_pass[1][1][6] = 0
5007 09:53:27.608433 tx_win_center[1][1][7] = 0
5008 09:53:27.608898 tx_first_pass[1][1][7] = 0
5009 09:53:27.611944 tx_last_pass[1][1][7] = 0
5010 09:53:27.614965 tx_win_center[1][1][8] = 0
5011 09:53:27.618356 tx_first_pass[1][1][8] = 0
5012 09:53:27.618834 tx_last_pass[1][1][8] = 0
5013 09:53:27.621519 tx_win_center[1][1][9] = 0
5014 09:53:27.624617 tx_first_pass[1][1][9] = 0
5015 09:53:27.625014 tx_last_pass[1][1][9] = 0
5016 09:53:27.627956 tx_win_center[1][1][10] = 0
5017 09:53:27.631766 tx_first_pass[1][1][10] = 0
5018 09:53:27.634669 tx_last_pass[1][1][10] = 0
5019 09:53:27.635055 tx_win_center[1][1][11] = 0
5020 09:53:27.638036 tx_first_pass[1][1][11] = 0
5021 09:53:27.641257 tx_last_pass[1][1][11] = 0
5022 09:53:27.644840 tx_win_center[1][1][12] = 0
5023 09:53:27.647788 tx_first_pass[1][1][12] = 0
5024 09:53:27.648175 tx_last_pass[1][1][12] = 0
5025 09:53:27.650903 tx_win_center[1][1][13] = 0
5026 09:53:27.654043 tx_first_pass[1][1][13] = 0
5027 09:53:27.658161 tx_last_pass[1][1][13] = 0
5028 09:53:27.658629 tx_win_center[1][1][14] = 0
5029 09:53:27.660952 tx_first_pass[1][1][14] = 0
5030 09:53:27.664431 tx_last_pass[1][1][14] = 0
5031 09:53:27.667734 tx_win_center[1][1][15] = 0
5032 09:53:27.668206 tx_first_pass[1][1][15] = 0
5033 09:53:27.670837 tx_last_pass[1][1][15] = 0
5034 09:53:27.674270 dump params rx window
5035 09:53:27.674747 rx_firspass[0][0][0] = 0
5036 09:53:27.677105 rx_lastpass[0][0][0] = 0
5037 09:53:27.680127 rx_firspass[0][0][1] = 0
5038 09:53:27.684699 rx_lastpass[0][0][1] = 0
5039 09:53:27.685167 rx_firspass[0][0][2] = 0
5040 09:53:27.686772 rx_lastpass[0][0][2] = 0
5041 09:53:27.690313 rx_firspass[0][0][3] = 0
5042 09:53:27.690830 rx_lastpass[0][0][3] = 0
5043 09:53:27.693693 rx_firspass[0][0][4] = 0
5044 09:53:27.696957 rx_lastpass[0][0][4] = 0
5045 09:53:27.697343 rx_firspass[0][0][5] = 0
5046 09:53:27.700394 rx_lastpass[0][0][5] = 0
5047 09:53:27.703837 rx_firspass[0][0][6] = 0
5048 09:53:27.706680 rx_lastpass[0][0][6] = 0
5049 09:53:27.707069 rx_firspass[0][0][7] = 0
5050 09:53:27.709960 rx_lastpass[0][0][7] = 0
5051 09:53:27.713376 rx_firspass[0][0][8] = 0
5052 09:53:27.713795 rx_lastpass[0][0][8] = 0
5053 09:53:27.716799 rx_firspass[0][0][9] = 0
5054 09:53:27.719587 rx_lastpass[0][0][9] = 0
5055 09:53:27.719976 rx_firspass[0][0][10] = 0
5056 09:53:27.722968 rx_lastpass[0][0][10] = 0
5057 09:53:27.726180 rx_firspass[0][0][11] = 0
5058 09:53:27.730270 rx_lastpass[0][0][11] = 0
5059 09:53:27.730656 rx_firspass[0][0][12] = 0
5060 09:53:27.732960 rx_lastpass[0][0][12] = 0
5061 09:53:27.735998 rx_firspass[0][0][13] = 0
5062 09:53:27.736408 rx_lastpass[0][0][13] = 0
5063 09:53:27.739817 rx_firspass[0][0][14] = 0
5064 09:53:27.742958 rx_lastpass[0][0][14] = 0
5065 09:53:27.745951 rx_firspass[0][0][15] = 0
5066 09:53:27.746340 rx_lastpass[0][0][15] = 0
5067 09:53:27.749484 rx_firspass[0][1][0] = 0
5068 09:53:27.752802 rx_lastpass[0][1][0] = 0
5069 09:53:27.753187 rx_firspass[0][1][1] = 0
5070 09:53:27.756189 rx_lastpass[0][1][1] = 0
5071 09:53:27.759187 rx_firspass[0][1][2] = 0
5072 09:53:27.759572 rx_lastpass[0][1][2] = 0
5073 09:53:27.762793 rx_firspass[0][1][3] = 0
5074 09:53:27.766174 rx_lastpass[0][1][3] = 0
5075 09:53:27.769004 rx_firspass[0][1][4] = 0
5076 09:53:27.769385 rx_lastpass[0][1][4] = 0
5077 09:53:27.772232 rx_firspass[0][1][5] = 0
5078 09:53:27.776474 rx_lastpass[0][1][5] = 0
5079 09:53:27.776948 rx_firspass[0][1][6] = 0
5080 09:53:27.779479 rx_lastpass[0][1][6] = 0
5081 09:53:27.782670 rx_firspass[0][1][7] = 0
5082 09:53:27.783056 rx_lastpass[0][1][7] = 0
5083 09:53:27.785950 rx_firspass[0][1][8] = 0
5084 09:53:27.789203 rx_lastpass[0][1][8] = 0
5085 09:53:27.792754 rx_firspass[0][1][9] = 0
5086 09:53:27.793225 rx_lastpass[0][1][9] = 0
5087 09:53:27.795650 rx_firspass[0][1][10] = 0
5088 09:53:27.798911 rx_lastpass[0][1][10] = 0
5089 09:53:27.799393 rx_firspass[0][1][11] = 0
5090 09:53:27.802417 rx_lastpass[0][1][11] = 0
5091 09:53:27.806061 rx_firspass[0][1][12] = 0
5092 09:53:27.809139 rx_lastpass[0][1][12] = 0
5093 09:53:27.809520 rx_firspass[0][1][13] = 0
5094 09:53:27.812517 rx_lastpass[0][1][13] = 0
5095 09:53:27.815516 rx_firspass[0][1][14] = 0
5096 09:53:27.815942 rx_lastpass[0][1][14] = 0
5097 09:53:27.818521 rx_firspass[0][1][15] = 0
5098 09:53:27.821964 rx_lastpass[0][1][15] = 0
5099 09:53:27.825068 rx_firspass[1][0][0] = 0
5100 09:53:27.825802 rx_lastpass[1][0][0] = 0
5101 09:53:27.828500 rx_firspass[1][0][1] = 0
5102 09:53:27.831978 rx_lastpass[1][0][1] = 0
5103 09:53:27.832503 rx_firspass[1][0][2] = 0
5104 09:53:27.834952 rx_lastpass[1][0][2] = 0
5105 09:53:27.838257 rx_firspass[1][0][3] = 0
5106 09:53:27.838692 rx_lastpass[1][0][3] = 0
5107 09:53:27.842405 rx_firspass[1][0][4] = 0
5108 09:53:27.844778 rx_lastpass[1][0][4] = 0
5109 09:53:27.848181 rx_firspass[1][0][5] = 0
5110 09:53:27.848617 rx_lastpass[1][0][5] = 0
5111 09:53:27.851674 rx_firspass[1][0][6] = 0
5112 09:53:27.854893 rx_lastpass[1][0][6] = 0
5113 09:53:27.855327 rx_firspass[1][0][7] = 0
5114 09:53:27.858006 rx_lastpass[1][0][7] = 0
5115 09:53:27.860920 rx_firspass[1][0][8] = 0
5116 09:53:27.861352 rx_lastpass[1][0][8] = 0
5117 09:53:27.864507 rx_firspass[1][0][9] = 0
5118 09:53:27.868178 rx_lastpass[1][0][9] = 0
5119 09:53:27.871180 rx_firspass[1][0][10] = 0
5120 09:53:27.871574 rx_lastpass[1][0][10] = 0
5121 09:53:27.874283 rx_firspass[1][0][11] = 0
5122 09:53:27.877266 rx_lastpass[1][0][11] = 0
5123 09:53:27.877698 rx_firspass[1][0][12] = 0
5124 09:53:27.881205 rx_lastpass[1][0][12] = 0
5125 09:53:27.883933 rx_firspass[1][0][13] = 0
5126 09:53:27.887726 rx_lastpass[1][0][13] = 0
5127 09:53:27.888164 rx_firspass[1][0][14] = 0
5128 09:53:27.890755 rx_lastpass[1][0][14] = 0
5129 09:53:27.894010 rx_firspass[1][0][15] = 0
5130 09:53:27.894482 rx_lastpass[1][0][15] = 0
5131 09:53:27.897340 rx_firspass[1][1][0] = 0
5132 09:53:27.900485 rx_lastpass[1][1][0] = 0
5133 09:53:27.904194 rx_firspass[1][1][1] = 0
5134 09:53:27.904590 rx_lastpass[1][1][1] = 0
5135 09:53:27.907227 rx_firspass[1][1][2] = 0
5136 09:53:27.910460 rx_lastpass[1][1][2] = 0
5137 09:53:27.910842 rx_firspass[1][1][3] = 0
5138 09:53:27.913895 rx_lastpass[1][1][3] = 0
5139 09:53:27.917206 rx_firspass[1][1][4] = 0
5140 09:53:27.917716 rx_lastpass[1][1][4] = 0
5141 09:53:27.920353 rx_firspass[1][1][5] = 0
5142 09:53:27.923716 rx_lastpass[1][1][5] = 0
5143 09:53:27.924335 rx_firspass[1][1][6] = 0
5144 09:53:27.926815 rx_lastpass[1][1][6] = 0
5145 09:53:27.930508 rx_firspass[1][1][7] = 0
5146 09:53:27.933611 rx_lastpass[1][1][7] = 0
5147 09:53:27.934028 rx_firspass[1][1][8] = 0
5148 09:53:27.937029 rx_lastpass[1][1][8] = 0
5149 09:53:27.940246 rx_firspass[1][1][9] = 0
5150 09:53:27.940731 rx_lastpass[1][1][9] = 0
5151 09:53:27.943492 rx_firspass[1][1][10] = 0
5152 09:53:27.946613 rx_lastpass[1][1][10] = 0
5153 09:53:27.947003 rx_firspass[1][1][11] = 0
5154 09:53:27.950220 rx_lastpass[1][1][11] = 0
5155 09:53:27.953166 rx_firspass[1][1][12] = 0
5156 09:53:27.956862 rx_lastpass[1][1][12] = 0
5157 09:53:27.957320 rx_firspass[1][1][13] = 0
5158 09:53:27.959844 rx_lastpass[1][1][13] = 0
5159 09:53:27.963417 rx_firspass[1][1][14] = 0
5160 09:53:27.966927 rx_lastpass[1][1][14] = 0
5161 09:53:27.967426 rx_firspass[1][1][15] = 0
5162 09:53:27.970084 rx_lastpass[1][1][15] = 0
5163 09:53:27.972725 dump params clk_delay
5164 09:53:27.973105 clk_delay[0] = 0
5165 09:53:27.973404 clk_delay[1] = 0
5166 09:53:27.976152 dump params dqs_delay
5167 09:53:27.979893 dqs_delay[0][0] = 0
5168 09:53:27.980279 dqs_delay[0][1] = 0
5169 09:53:27.983186 dqs_delay[1][0] = 0
5170 09:53:27.983585 dqs_delay[1][1] = 0
5171 09:53:27.986082 dump params delay_cell_unit = 744
5172 09:53:27.989506 mt_set_emi_preloader end
5173 09:53:27.992817 [mt_mem_init] dram size: 0x100000000, rank number: 2
5174 09:53:27.999154 [complex_mem_test] start addr:0x40000000, len:20480
5175 09:53:28.034888 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5176 09:53:28.041904 [complex_mem_test] start addr:0x80000000, len:20480
5177 09:53:28.077502 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5178 09:53:28.084251 [complex_mem_test] start addr:0xc0000000, len:20480
5179 09:53:28.119932 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5180 09:53:28.126481 [complex_mem_test] start addr:0x56000000, len:8192
5181 09:53:28.143545 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5182 09:53:28.146372 ddr_geometry:1
5183 09:53:28.149539 [complex_mem_test] start addr:0x80000000, len:8192
5184 09:53:28.166717 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5185 09:53:28.170285 dram_init: dram init end (result: 0)
5186 09:53:28.176275 Successfully loaded DRAM blobs and ran DRAM calibration
5187 09:53:28.186560 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5188 09:53:28.187063 CBMEM:
5189 09:53:28.191147 IMD: root @ 00000000fffff000 254 entries.
5190 09:53:28.192650 IMD: root @ 00000000ffffec00 62 entries.
5191 09:53:28.200118 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5192 09:53:28.206266 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5193 09:53:28.209790 in-header: 03 a1 00 00 08 00 00 00
5194 09:53:28.212687 in-data: 84 60 60 10 00 00 00 00
5195 09:53:28.215816 Chrome EC: clear events_b mask to 0x0000000020004000
5196 09:53:28.222845 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5197 09:53:28.226704 in-header: 03 fd 00 00 00 00 00 00
5198 09:53:28.230362 in-data:
5199 09:53:28.233197 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5200 09:53:28.237051 CBFS @ 21000 size 3d4000
5201 09:53:28.239714 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5202 09:53:28.243017 CBFS: Locating 'fallback/ramstage'
5203 09:53:28.246780 CBFS: Found @ offset 10d40 size d563
5204 09:53:28.269083 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5205 09:53:28.280932 Accumulated console time in romstage 13482 ms
5206 09:53:28.281437
5207 09:53:28.281826
5208 09:53:28.290535 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5209 09:53:28.294447 ARM64: Exception handlers installed.
5210 09:53:28.294953 ARM64: Testing exception
5211 09:53:28.297243 ARM64: Done test exception
5212 09:53:28.300718 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5213 09:53:28.303916 Manufacturer: ef
5214 09:53:28.310093 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5215 09:53:28.313947 WARNING: RO_VPD is uninitialized or empty.
5216 09:53:28.317059 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5217 09:53:28.320068 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5218 09:53:28.330497 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5219 09:53:28.333913 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5220 09:53:28.340426 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5221 09:53:28.340901 Enumerating buses...
5222 09:53:28.347150 Show all devs... Before device enumeration.
5223 09:53:28.347800 Root Device: enabled 1
5224 09:53:28.350232 CPU_CLUSTER: 0: enabled 1
5225 09:53:28.350658 CPU: 00: enabled 1
5226 09:53:28.353701 Compare with tree...
5227 09:53:28.356990 Root Device: enabled 1
5228 09:53:28.357503 CPU_CLUSTER: 0: enabled 1
5229 09:53:28.360189 CPU: 00: enabled 1
5230 09:53:28.363764 Root Device scanning...
5231 09:53:28.366552 root_dev_scan_bus for Root Device
5232 09:53:28.367064 CPU_CLUSTER: 0 enabled
5233 09:53:28.370060 root_dev_scan_bus for Root Device done
5234 09:53:28.376952 scan_bus: scanning of bus Root Device took 10690 usecs
5235 09:53:28.377471 done
5236 09:53:28.379422 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5237 09:53:28.382587 Allocating resources...
5238 09:53:28.386825 Reading resources...
5239 09:53:28.389760 Root Device read_resources bus 0 link: 0
5240 09:53:28.393243 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5241 09:53:28.396473 CPU: 00 missing read_resources
5242 09:53:28.399429 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5243 09:53:28.402707 Root Device read_resources bus 0 link: 0 done
5244 09:53:28.405919 Done reading resources.
5245 09:53:28.409032 Show resources in subtree (Root Device)...After reading.
5246 09:53:28.415776 Root Device child on link 0 CPU_CLUSTER: 0
5247 09:53:28.418956 CPU_CLUSTER: 0 child on link 0 CPU: 00
5248 09:53:28.425689 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5249 09:53:28.428490 CPU: 00
5250 09:53:28.428911 Setting resources...
5251 09:53:28.434995 Root Device assign_resources, bus 0 link: 0
5252 09:53:28.438427 CPU_CLUSTER: 0 missing set_resources
5253 09:53:28.442192 Root Device assign_resources, bus 0 link: 0
5254 09:53:28.442697 Done setting resources.
5255 09:53:28.448803 Show resources in subtree (Root Device)...After assigning values.
5256 09:53:28.451744 Root Device child on link 0 CPU_CLUSTER: 0
5257 09:53:28.455169 CPU_CLUSTER: 0 child on link 0 CPU: 00
5258 09:53:28.465596 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5259 09:53:28.466105 CPU: 00
5260 09:53:28.468726 Done allocating resources.
5261 09:53:28.474658 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5262 09:53:28.475147 Enabling resources...
5263 09:53:28.475479 done.
5264 09:53:28.481232 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5265 09:53:28.481834 Initializing devices...
5266 09:53:28.484746 Root Device init ...
5267 09:53:28.487823 mainboard_init: Starting display init.
5268 09:53:28.491022 ADC[4]: Raw value=75552 ID=0
5269 09:53:28.513427 anx7625_power_on_init: Init interface.
5270 09:53:28.516551 anx7625_disable_pd_protocol: Disabled PD feature.
5271 09:53:28.522888 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5272 09:53:28.570269 anx7625_start_dp_work: Secure OCM version=00
5273 09:53:28.573140 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5274 09:53:28.590626 sp_tx_get_edid_block: EDID Block = 1
5275 09:53:28.707720 Extracted contents:
5276 09:53:28.711205 header: 00 ff ff ff ff ff ff 00
5277 09:53:28.713896 serial number: 06 af 5c 14 00 00 00 00 00 1a
5278 09:53:28.718015 version: 01 04
5279 09:53:28.720487 basic params: 95 1a 0e 78 02
5280 09:53:28.724444 chroma info: 99 85 95 55 56 92 28 22 50 54
5281 09:53:28.727698 established: 00 00 00
5282 09:53:28.734462 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5283 09:53:28.740654 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5284 09:53:28.743995 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5285 09:53:28.750249 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5286 09:53:28.756974 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5287 09:53:28.760160 extensions: 00
5288 09:53:28.760637 checksum: ae
5289 09:53:28.760971
5290 09:53:28.766702 Manufacturer: AUO Model 145c Serial Number 0
5291 09:53:28.767155 Made week 0 of 2016
5292 09:53:28.770085 EDID version: 1.4
5293 09:53:28.770606 Digital display
5294 09:53:28.773354 6 bits per primary color channel
5295 09:53:28.776598 DisplayPort interface
5296 09:53:28.777060 Maximum image size: 26 cm x 14 cm
5297 09:53:28.780132 Gamma: 220%
5298 09:53:28.780514 Check DPMS levels
5299 09:53:28.782953 Supported color formats: RGB 4:4:4
5300 09:53:28.786511 First detailed timing is preferred timing
5301 09:53:28.789623 Established timings supported:
5302 09:53:28.793060 Standard timings supported:
5303 09:53:28.793746 Detailed timings
5304 09:53:28.799164 Hex of detail: ce1d56ea50001a3030204600009010000018
5305 09:53:28.802798 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5306 09:53:28.809149 0556 0586 05a6 0640 hborder 0
5307 09:53:28.812565 0300 0304 030a 031a vborder 0
5308 09:53:28.815799 -hsync -vsync
5309 09:53:28.816186 Did detailed timing
5310 09:53:28.822478 Hex of detail: 0000000f0000000000000000000000000020
5311 09:53:28.826197 Manufacturer-specified data, tag 15
5312 09:53:28.829145 Hex of detail: 000000fe0041554f0a202020202020202020
5313 09:53:28.829534 ASCII string: AUO
5314 09:53:28.835628 Hex of detail: 000000fe004231313658414230312e34200a
5315 09:53:28.839084 ASCII string: B116XAB01.4
5316 09:53:28.839470 Checksum
5317 09:53:28.839774 Checksum: 0xae (valid)
5318 09:53:28.845770 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5319 09:53:28.848223 DSI data_rate: 457800000 bps
5320 09:53:28.854993 anx7625_parse_edid: set default k value to 0x3d for panel
5321 09:53:28.858268 anx7625_parse_edid: pixelclock(76300).
5322 09:53:28.862033 hactive(1366), hsync(32), hfp(48), hbp(154)
5323 09:53:28.865187 vactive(768), vsync(6), vfp(4), vbp(16)
5324 09:53:28.868392 anx7625_dsi_config: config dsi.
5325 09:53:28.875792 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5326 09:53:28.896880 anx7625_dsi_config: success to config DSI
5327 09:53:28.900335 anx7625_dp_start: MIPI phy setup OK.
5328 09:53:28.903168 [SSUSB] Setting up USB HOST controller...
5329 09:53:28.906337 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5330 09:53:28.909880 [SSUSB] phy power-on done.
5331 09:53:28.913857 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5332 09:53:28.916973 in-header: 03 fc 01 00 00 00 00 00
5333 09:53:28.917359 in-data:
5334 09:53:28.923794 handle_proto3_response: EC response with error code: 1
5335 09:53:28.924189 SPM: pcm index = 1
5336 09:53:28.926642 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5337 09:53:28.930194 CBFS @ 21000 size 3d4000
5338 09:53:28.936831 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5339 09:53:28.939826 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5340 09:53:28.943658 CBFS: Found @ offset 1e7c0 size 1026
5341 09:53:28.949933 read SPI 0x3f808 0x1026: 1270 us, 3255 KB/s, 26.040 Mbps
5342 09:53:28.953049 SPM: binary array size = 2988
5343 09:53:28.956805 SPM: version = pcm_allinone_v1.17.2_20180829
5344 09:53:28.960189 SPM binary loaded in 32 msecs
5345 09:53:28.968318 spm_kick_im_to_fetch: ptr = 000000004021eec2
5346 09:53:28.971616 spm_kick_im_to_fetch: len = 2988
5347 09:53:28.972085 SPM: spm_kick_pcm_to_run
5348 09:53:28.974663 SPM: spm_kick_pcm_to_run done
5349 09:53:28.977788 SPM: spm_init done in 52 msecs
5350 09:53:28.981057 Root Device init finished in 495031 usecs
5351 09:53:28.984228 CPU_CLUSTER: 0 init ...
5352 09:53:28.994230 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5353 09:53:28.997657 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5354 09:53:29.001237 CBFS @ 21000 size 3d4000
5355 09:53:29.003878 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5356 09:53:29.007418 CBFS: Locating 'sspm.bin'
5357 09:53:29.010826 CBFS: Found @ offset 208c0 size 41cb
5358 09:53:29.021007 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5359 09:53:29.028668 CPU_CLUSTER: 0 init finished in 42802 usecs
5360 09:53:29.029197 Devices initialized
5361 09:53:29.032411 Show all devs... After init.
5362 09:53:29.035453 Root Device: enabled 1
5363 09:53:29.035881 CPU_CLUSTER: 0: enabled 1
5364 09:53:29.038915 CPU: 00: enabled 1
5365 09:53:29.042265 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5366 09:53:29.048648 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5367 09:53:29.052200 ELOG: NV offset 0x558000 size 0x1000
5368 09:53:29.054783 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5369 09:53:29.061939 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5370 09:53:29.068769 ELOG: Event(17) added with size 13 at 2024-06-18 09:53:28 UTC
5371 09:53:29.071331 out: cmd=0x121: 03 db 21 01 00 00 00 00
5372 09:53:29.074574 in-header: 03 a6 00 00 2c 00 00 00
5373 09:53:29.088152 in-data: 77 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 e0 d2 0a 00 06 80 00 00 75 f8 00 00 06 80 00 00 95 fa 06 00 06 80 00 00 4a 2f 08 00
5374 09:53:29.091201 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5375 09:53:29.094886 in-header: 03 19 00 00 08 00 00 00
5376 09:53:29.098175 in-data: a2 e0 47 00 13 00 00 00
5377 09:53:29.101090 Chrome EC: UHEPI supported
5378 09:53:29.108021 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5379 09:53:29.111143 in-header: 03 e1 00 00 08 00 00 00
5380 09:53:29.114244 in-data: 84 20 60 10 00 00 00 00
5381 09:53:29.117284 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5382 09:53:29.124629 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5383 09:53:29.127391 in-header: 03 e1 00 00 08 00 00 00
5384 09:53:29.130803 in-data: 84 20 60 10 00 00 00 00
5385 09:53:29.133599 ELOG: Event(A1) added with size 10 at 2024-06-18 09:53:28 UTC
5386 09:53:29.143620 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5387 09:53:29.147045 ELOG: Event(A0) added with size 9 at 2024-06-18 09:53:28 UTC
5388 09:53:29.150435 elog_add_boot_reason: Logged dev mode boot
5389 09:53:29.153538 Finalize devices...
5390 09:53:29.154002 Devices finalized
5391 09:53:29.160286 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5392 09:53:29.163176 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5393 09:53:29.169723 ELOG: Event(91) added with size 10 at 2024-06-18 09:53:28 UTC
5394 09:53:29.173136 Writing coreboot table at 0xffeda000
5395 09:53:29.176761 0. 0000000000114000-000000000011efff: RAMSTAGE
5396 09:53:29.182732 1. 0000000040000000-000000004023cfff: RAMSTAGE
5397 09:53:29.186173 2. 000000004023d000-00000000545fffff: RAM
5398 09:53:29.189990 3. 0000000054600000-000000005465ffff: BL31
5399 09:53:29.193091 4. 0000000054660000-00000000ffed9fff: RAM
5400 09:53:29.199338 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5401 09:53:29.203346 6. 0000000100000000-000000013fffffff: RAM
5402 09:53:29.205830 Passing 5 GPIOs to payload:
5403 09:53:29.209718 NAME | PORT | POLARITY | VALUE
5404 09:53:29.212873 write protect | 0x00000096 | low | high
5405 09:53:29.219185 EC in RW | 0x000000b1 | high | undefined
5406 09:53:29.222192 EC interrupt | 0x00000097 | low | undefined
5407 09:53:29.229001 TPM interrupt | 0x00000099 | high | undefined
5408 09:53:29.232033 speaker enable | 0x000000af | high | undefined
5409 09:53:29.235210 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5410 09:53:29.238888 in-header: 03 f7 00 00 02 00 00 00
5411 09:53:29.242252 in-data: 04 00
5412 09:53:29.242751 Board ID: 4
5413 09:53:29.245927 ADC[3]: Raw value=213114 ID=1
5414 09:53:29.246430 RAM code: 1
5415 09:53:29.246761 SKU ID: 16
5416 09:53:29.252073 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5417 09:53:29.255095 CBFS @ 21000 size 3d4000
5418 09:53:29.258125 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5419 09:53:29.264867 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 29a6
5420 09:53:29.268136 coreboot table: 940 bytes.
5421 09:53:29.271441 IMD ROOT 0. 00000000fffff000 00001000
5422 09:53:29.275204 IMD SMALL 1. 00000000ffffe000 00001000
5423 09:53:29.278154 CONSOLE 2. 00000000fffde000 00020000
5424 09:53:29.281144 FMAP 3. 00000000fffdd000 0000047c
5425 09:53:29.284290 TIME STAMP 4. 00000000fffdc000 00000910
5426 09:53:29.287763 RAMOOPS 5. 00000000ffedc000 00100000
5427 09:53:29.291631 COREBOOT 6. 00000000ffeda000 00002000
5428 09:53:29.294954 IMD small region:
5429 09:53:29.298043 IMD ROOT 0. 00000000ffffec00 00000400
5430 09:53:29.301464 VBOOT WORK 1. 00000000ffffeb00 00000100
5431 09:53:29.304139 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5432 09:53:29.310992 VPD 3. 00000000ffffea60 0000006c
5433 09:53:29.314429 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5434 09:53:29.321066 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5435 09:53:29.323941 in-header: 03 e1 00 00 08 00 00 00
5436 09:53:29.327605 in-data: 84 20 60 10 00 00 00 00
5437 09:53:29.331048 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5438 09:53:29.334120 CBFS @ 21000 size 3d4000
5439 09:53:29.340461 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5440 09:53:29.343732 CBFS: Locating 'fallback/payload'
5441 09:53:29.350935 CBFS: Found @ offset dc040 size 439a0
5442 09:53:29.438876 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5443 09:53:29.441791 Checking segment from ROM address 0x0000000040003a00
5444 09:53:29.448609 Checking segment from ROM address 0x0000000040003a1c
5445 09:53:29.452185 Loading segment from ROM address 0x0000000040003a00
5446 09:53:29.455148 code (compression=0)
5447 09:53:29.465097 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5448 09:53:29.471431 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5449 09:53:29.474454 it's not compressed!
5450 09:53:29.477670 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5451 09:53:29.484854 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5452 09:53:29.492866 Loading segment from ROM address 0x0000000040003a1c
5453 09:53:29.496303 Entry Point 0x0000000080000000
5454 09:53:29.496808 Loaded segments
5455 09:53:29.502651 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5456 09:53:29.505778 Jumping to boot code at 0000000080000000(00000000ffeda000)
5457 09:53:29.516149 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5458 09:53:29.522255 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5459 09:53:29.522788 CBFS @ 21000 size 3d4000
5460 09:53:29.529188 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5461 09:53:29.532631 CBFS: Locating 'fallback/bl31'
5462 09:53:29.535425 CBFS: Found @ offset 36dc0 size 5820
5463 09:53:29.546638 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5464 09:53:29.550084 Checking segment from ROM address 0x0000000040003a00
5465 09:53:29.557049 Checking segment from ROM address 0x0000000040003a1c
5466 09:53:29.559477 Loading segment from ROM address 0x0000000040003a00
5467 09:53:29.563171 code (compression=1)
5468 09:53:29.572618 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5469 09:53:29.579304 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5470 09:53:29.579695 using LZMA
5471 09:53:29.588551 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5472 09:53:29.595013 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5473 09:53:29.598432 Loading segment from ROM address 0x0000000040003a1c
5474 09:53:29.601998 Entry Point 0x0000000054601000
5475 09:53:29.602465 Loaded segments
5476 09:53:29.604864 NOTICE: MT8183 bl31_setup
5477 09:53:29.612887 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5478 09:53:29.615625 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5479 09:53:29.618596 INFO: [DEVAPC] dump DEVAPC registers:
5480 09:53:29.628918 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5481 09:53:29.635882 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5482 09:53:29.645516 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5483 09:53:29.652002 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5484 09:53:29.661915 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5485 09:53:29.668677 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5486 09:53:29.677603 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5487 09:53:29.684416 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5488 09:53:29.694565 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5489 09:53:29.701216 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5490 09:53:29.711163 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5491 09:53:29.717679 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5492 09:53:29.727237 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5493 09:53:29.733902 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5494 09:53:29.740250 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5495 09:53:29.747434 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5496 09:53:29.757498 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5497 09:53:29.763387 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5498 09:53:29.778127 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5499 09:53:29.778567 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5500 09:53:29.786160 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5501 09:53:29.792435 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5502 09:53:29.795813 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5503 09:53:29.799218 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5504 09:53:29.802391 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5505 09:53:29.806028 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5506 09:53:29.808614 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5507 09:53:29.815322 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5508 09:53:29.818683 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5509 09:53:29.822018 WARNING: region 0:
5510 09:53:29.825348 WARNING: apc:0x168, sa:0x0, ea:0xfff
5511 09:53:29.825821 WARNING: region 1:
5512 09:53:29.831832 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5513 09:53:29.832303 WARNING: region 2:
5514 09:53:29.834996 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5515 09:53:29.838059 WARNING: region 3:
5516 09:53:29.842240 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5517 09:53:29.842709 WARNING: region 4:
5518 09:53:29.848675 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5519 09:53:29.849148 WARNING: region 5:
5520 09:53:29.851499 WARNING: apc:0x0, sa:0x0, ea:0x0
5521 09:53:29.854823 WARNING: region 6:
5522 09:53:29.858160 WARNING: apc:0x0, sa:0x0, ea:0x0
5523 09:53:29.858629 WARNING: region 7:
5524 09:53:29.861139 WARNING: apc:0x0, sa:0x0, ea:0x0
5525 09:53:29.867827 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5526 09:53:29.870992 INFO: SPM: enable SPMC mode
5527 09:53:29.874609 NOTICE: spm_boot_init() start
5528 09:53:29.877920 NOTICE: spm_boot_init() end
5529 09:53:29.880766 INFO: BL31: Initializing runtime services
5530 09:53:29.887272 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5531 09:53:29.890689 INFO: BL31: Preparing for EL3 exit to normal world
5532 09:53:29.894277 INFO: Entry point address = 0x80000000
5533 09:53:29.897454 INFO: SPSR = 0x8
5534 09:53:29.918813
5535 09:53:29.918919
5536 09:53:29.918977
5537 09:53:29.919444 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
5538 09:53:29.919536 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
5539 09:53:29.919610 Setting prompt string to ['jacuzzi:']
5540 09:53:29.919680 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:32)
5541 09:53:29.922040 Starting depthcharge on Juniper...
5542 09:53:29.922117
5543 09:53:29.924555 vboot_handoff: creating legacy vboot_handoff structure
5544 09:53:29.924631
5545 09:53:29.928356 ec_init(0): CrosEC protocol v3 supported (544, 544)
5546 09:53:29.931215
5547 09:53:29.931292 Wipe memory regions:
5548 09:53:29.931351
5549 09:53:29.934486 [0x00000040000000, 0x00000054600000)
5550 09:53:29.977779
5551 09:53:29.977905 [0x00000054660000, 0x00000080000000)
5552 09:53:30.068917
5553 09:53:30.069053 [0x000000811994a0, 0x000000ffeda000)
5554 09:53:30.328148
5555 09:53:30.328280 [0x00000100000000, 0x00000140000000)
5556 09:53:30.461157
5557 09:53:30.464186 Initializing XHCI USB controller at 0x11200000.
5558 09:53:30.487287
5559 09:53:30.490813 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5560 09:53:30.491248
5561 09:53:30.491588
5562 09:53:30.492334 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5564 09:53:30.593395 jacuzzi: tftpboot 192.168.201.1 14407600/tftp-deploy-tzehc4ln/kernel/image.itb 14407600/tftp-deploy-tzehc4ln/kernel/cmdline
5565 09:53:30.593623 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5566 09:53:30.593706 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
5567 09:53:30.597883 tftpboot 192.168.201.1 14407600/tftp-deploy-tzehc4ln/kernel/image.ittp-deploy-tzehc4ln/kernel/cmdline
5568 09:53:30.597973
5569 09:53:30.598041 Waiting for link
5570 09:53:31.001601
5571 09:53:31.002249 R8152: Initializing
5572 09:53:31.002602
5573 09:53:31.005077 Version 9 (ocp_data = 6010)
5574 09:53:31.005818
5575 09:53:31.007837 R8152: Done initializing
5576 09:53:31.008279
5577 09:53:31.008610 Adding net device
5578 09:53:31.393678
5579 09:53:31.394203 done.
5580 09:53:31.394549
5581 09:53:31.394863 MAC: 00:e0:4c:72:3d:a6
5582 09:53:31.395162
5583 09:53:31.397007 Sending DHCP discover... done.
5584 09:53:31.397438
5585 09:53:31.400239 Waiting for reply... done.
5586 09:53:31.400745
5587 09:53:31.403960 Sending DHCP request... done.
5588 09:53:31.404392
5589 09:53:31.425814 Waiting for reply... done.
5590 09:53:31.426293
5591 09:53:31.426603 My ip is 192.168.201.20
5592 09:53:31.426885
5593 09:53:31.428879 The DHCP server ip is 192.168.201.1
5594 09:53:31.429349
5595 09:53:31.435084 TFTP server IP predefined by user: 192.168.201.1
5596 09:53:31.435478
5597 09:53:31.441652 Bootfile predefined by user: 14407600/tftp-deploy-tzehc4ln/kernel/image.itb
5598 09:53:31.442122
5599 09:53:31.445092 Sending tftp read request... done.
5600 09:53:31.445485
5601 09:53:31.452273 Waiting for the transfer...
5602 09:53:31.452661
5603 09:53:31.749323 00000000 ################################################################
5604 09:53:31.749459
5605 09:53:32.029651 00080000 ################################################################
5606 09:53:32.029781
5607 09:53:32.293030 00100000 ################################################################
5608 09:53:32.293153
5609 09:53:32.556068 00180000 ################################################################
5610 09:53:32.556190
5611 09:53:32.812253 00200000 ################################################################
5612 09:53:32.812377
5613 09:53:33.069903 00280000 ################################################################
5614 09:53:33.070029
5615 09:53:33.328893 00300000 ################################################################
5616 09:53:33.329025
5617 09:53:33.594067 00380000 ################################################################
5618 09:53:33.594191
5619 09:53:33.850283 00400000 ################################################################
5620 09:53:33.850410
5621 09:53:34.121078 00480000 ################################################################
5622 09:53:34.121267
5623 09:53:34.379227 00500000 ################################################################
5624 09:53:34.379375
5625 09:53:34.644721 00580000 ################################################################
5626 09:53:34.644842
5627 09:53:34.913828 00600000 ################################################################
5628 09:53:34.913973
5629 09:53:35.167926 00680000 ################################################################
5630 09:53:35.168158
5631 09:53:35.421667 00700000 ################################################################
5632 09:53:35.421789
5633 09:53:35.684987 00780000 ################################################################
5634 09:53:35.685113
5635 09:53:35.939992 00800000 ################################################################
5636 09:53:35.940135
5637 09:53:36.218386 00880000 ################################################################
5638 09:53:36.218511
5639 09:53:36.471403 00900000 ################################################################
5640 09:53:36.471528
5641 09:53:36.733383 00980000 ################################################################
5642 09:53:36.733502
5643 09:53:37.017297 00a00000 ################################################################
5644 09:53:37.017447
5645 09:53:37.283197 00a80000 ################################################################
5646 09:53:37.283320
5647 09:53:37.537356 00b00000 ################################################################
5648 09:53:37.537506
5649 09:53:37.820669 00b80000 ################################################################
5650 09:53:37.820795
5651 09:53:38.117575 00c00000 ################################################################
5652 09:53:38.117744
5653 09:53:38.409005 00c80000 ################################################################
5654 09:53:38.409131
5655 09:53:38.687283 00d00000 ################################################################
5656 09:53:38.687407
5657 09:53:39.037645 00d80000 ################################################################
5658 09:53:39.038238
5659 09:53:39.424140 00e00000 ################################################################
5660 09:53:39.424638
5661 09:53:39.733423 00e80000 ################################################################
5662 09:53:39.733592
5663 09:53:40.033969 00f00000 ################################################################
5664 09:53:40.034091
5665 09:53:40.338515 00f80000 ################################################################
5666 09:53:40.338641
5667 09:53:40.623608 01000000 ################################################################
5668 09:53:40.623734
5669 09:53:40.908993 01080000 ################################################################
5670 09:53:40.909147
5671 09:53:41.203277 01100000 ################################################################
5672 09:53:41.203404
5673 09:53:41.483571 01180000 ################################################################
5674 09:53:41.483696
5675 09:53:41.775033 01200000 ################################################################
5676 09:53:41.775160
5677 09:53:42.102665 01280000 ################################################################
5678 09:53:42.102790
5679 09:53:42.395478 01300000 ################################################################
5680 09:53:42.395604
5681 09:53:42.684188 01380000 ################################################################
5682 09:53:42.684312
5683 09:53:42.987046 01400000 ################################################################
5684 09:53:42.987171
5685 09:53:43.273295 01480000 ################################################################
5686 09:53:43.273419
5687 09:53:43.552985 01500000 ################################################################
5688 09:53:43.553142
5689 09:53:43.829750 01580000 ################################################################
5690 09:53:43.829877
5691 09:53:44.098048 01600000 ################################################################
5692 09:53:44.098173
5693 09:53:44.379607 01680000 ################################################################
5694 09:53:44.379730
5695 09:53:44.634836 01700000 ################################################################
5696 09:53:44.634962
5697 09:53:44.898037 01780000 ################################################################
5698 09:53:44.898168
5699 09:53:45.154907 01800000 ################################################################
5700 09:53:45.155022
5701 09:53:45.450104 01880000 ################################################################
5702 09:53:45.450229
5703 09:53:45.725683 01900000 ################################################################
5704 09:53:45.725813
5705 09:53:46.015786 01980000 ################################################################
5706 09:53:46.015914
5707 09:53:46.312384 01a00000 ################################################################
5708 09:53:46.312508
5709 09:53:46.606487 01a80000 ################################################################
5710 09:53:46.606612
5711 09:53:46.873142 01b00000 ################################################################
5712 09:53:46.873270
5713 09:53:47.132728 01b80000 ################################################################
5714 09:53:47.132854
5715 09:53:47.390466 01c00000 ################################################################
5716 09:53:47.390589
5717 09:53:47.657299 01c80000 ################################################################
5718 09:53:47.657422
5719 09:53:47.910824 01d00000 ################################################################
5720 09:53:47.911018
5721 09:53:48.172657 01d80000 ################################################################
5722 09:53:48.172777
5723 09:53:48.409518 01e00000 ########################################################## done.
5724 09:53:48.409671
5725 09:53:48.412702 The bootfile was 31931594 bytes long.
5726 09:53:48.412785
5727 09:53:48.416295 Sending tftp read request... done.
5728 09:53:48.416444
5729 09:53:48.416522 Waiting for the transfer...
5730 09:53:48.416594
5731 09:53:48.419573 00000000 # done.
5732 09:53:48.419725
5733 09:53:48.425868 Command line loaded dynamically from TFTP file: 14407600/tftp-deploy-tzehc4ln/kernel/cmdline
5734 09:53:48.426027
5735 09:53:48.452170 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5736 09:53:48.452409
5737 09:53:48.455500 Loading FIT.
5738 09:53:48.455687
5739 09:53:48.455831 Image ramdisk-1 has 18745130 bytes.
5740 09:53:48.459059
5741 09:53:48.459279 Image fdt-1 has 57695 bytes.
5742 09:53:48.459456
5743 09:53:48.462165 Image kernel-1 has 13126726 bytes.
5744 09:53:48.462384
5745 09:53:48.472547 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5746 09:53:48.473004
5747 09:53:48.484863 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5748 09:53:48.485365
5749 09:53:48.488508 Choosing best match conf-1 for compat google,juniper-sku16.
5750 09:53:48.493343
5751 09:53:48.498019 Connected to device vid:did:rid of 1ae0:0028:00
5752 09:53:48.505275
5753 09:53:48.508391 tpm_get_response: command 0x17b, return code 0x0
5754 09:53:48.508985
5755 09:53:48.511353 tpm_cleanup: add release locality here.
5756 09:53:48.511813
5757 09:53:48.514576 Shutting down all USB controllers.
5758 09:53:48.515007
5759 09:53:48.518252 Removing current net device
5760 09:53:48.518688
5761 09:53:48.521975 Exiting depthcharge with code 4 at timestamp: 35674526
5762 09:53:48.522489
5763 09:53:48.527975 LZMA decompressing kernel-1 to 0x80193568
5764 09:53:48.528413
5765 09:53:48.531270 LZMA decompressing kernel-1 to 0x40000000
5766 09:53:50.396574
5767 09:53:50.397087 jumping to kernel
5768 09:53:50.398799 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5769 09:53:50.399289 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
5770 09:53:50.399664 Setting prompt string to ['Linux version [0-9]']
5771 09:53:50.400026 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5772 09:53:50.400372 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5773 09:53:50.472262
5774 09:53:50.475987 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5775 09:53:50.479706 start: 2.2.5.1 login-action (timeout 00:04:11) [common]
5776 09:53:50.480223 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5777 09:53:50.480605 Setting prompt string to []
5778 09:53:50.481009 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5779 09:53:50.481373 Using line separator: #'\n'#
5780 09:53:50.481887 No login prompt set.
5781 09:53:50.482230 Parsing kernel messages
5782 09:53:50.482553 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5783 09:53:50.483120 [login-action] Waiting for messages, (timeout 00:04:11)
5784 09:53:50.483472 Waiting using forced prompt support (timeout 00:02:06)
5785 09:53:50.499487 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024
5786 09:53:50.502029 [ 0.000000] random: crng init done
5787 09:53:50.508025 [ 0.000000] Machine model: Google juniper sku16 board
5788 09:53:50.511884 [ 0.000000] efi: UEFI not found.
5789 09:53:50.518429 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5790 09:53:50.528540 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5791 09:53:50.534476 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5792 09:53:50.537662 [ 0.000000] printk: bootconsole [mtk8250] enabled
5793 09:53:50.546916 [ 0.000000] NUMA: No NUMA configuration found
5794 09:53:50.553493 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5795 09:53:50.560159 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5796 09:53:50.563560 [ 0.000000] Zone ranges:
5797 09:53:50.566730 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5798 09:53:50.569738 [ 0.000000] DMA32 empty
5799 09:53:50.576447 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5800 09:53:50.579442 [ 0.000000] Movable zone start for each node
5801 09:53:50.582585 [ 0.000000] Early memory node ranges
5802 09:53:50.589931 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5803 09:53:50.596339 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5804 09:53:50.602541 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5805 09:53:50.609231 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5806 09:53:50.615823 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5807 09:53:50.622870 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5808 09:53:50.639217 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5809 09:53:50.645895 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5810 09:53:50.652922 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5811 09:53:50.655918 [ 0.000000] psci: probing for conduit method from DT.
5812 09:53:50.662425 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5813 09:53:50.665830 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5814 09:53:50.672538 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5815 09:53:50.675361 [ 0.000000] psci: SMC Calling Convention v1.1
5816 09:53:50.681976 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5817 09:53:50.685762 [ 0.000000] Detected VIPT I-cache on CPU0
5818 09:53:50.692077 [ 0.000000] CPU features: detected: GIC system register CPU interface
5819 09:53:50.698484 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5820 09:53:50.705048 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5821 09:53:50.711948 [ 0.000000] CPU features: detected: ARM erratum 845719
5822 09:53:50.714942 [ 0.000000] alternatives: applying boot alternatives
5823 09:53:50.721722 [ 0.000000] Fallback order for Node 0: 0
5824 09:53:50.728189 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5825 09:53:50.731163 [ 0.000000] Policy zone: Normal
5826 09:53:50.757655 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5827 09:53:50.770657 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5828 09:53:50.777178 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5829 09:53:50.787417 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5830 09:53:50.793515 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5831 09:53:50.796845 <6>[ 0.000000] software IO TLB: area num 8.
5832 09:53:50.823119 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5833 09:53:50.880524 <6>[ 0.000000] Memory: 3896768K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261696K reserved, 32768K cma-reserved)
5834 09:53:50.887026 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5835 09:53:50.893709 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5836 09:53:50.897202 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5837 09:53:50.903764 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5838 09:53:50.910105 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5839 09:53:50.916538 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5840 09:53:50.923568 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5841 09:53:50.929738 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5842 09:53:50.936407 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5843 09:53:50.946315 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5844 09:53:50.949528 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5845 09:53:50.956096 <6>[ 0.000000] GICv3: 640 SPIs implemented
5846 09:53:50.959567 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5847 09:53:50.962891 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5848 09:53:50.969194 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5849 09:53:50.975566 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5850 09:53:50.985747 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5851 09:53:50.998874 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5852 09:53:51.006008 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5853 09:53:51.018061 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5854 09:53:51.031015 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5855 09:53:51.037284 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5856 09:53:51.044665 <6>[ 0.009470] Console: colour dummy device 80x25
5857 09:53:51.047888 <6>[ 0.014516] printk: console [tty1] enabled
5858 09:53:51.060935 <6>[ 0.018906] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5859 09:53:51.064154 <6>[ 0.029371] pid_max: default: 32768 minimum: 301
5860 09:53:51.070702 <6>[ 0.034253] LSM: Security Framework initializing
5861 09:53:51.077119 <6>[ 0.039169] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5862 09:53:51.083490 <6>[ 0.046791] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5863 09:53:51.090425 <4>[ 0.055665] cacheinfo: Unable to detect cache hierarchy for CPU 0
5864 09:53:51.100681 <6>[ 0.062292] cblist_init_generic: Setting adjustable number of callback queues.
5865 09:53:51.107505 <6>[ 0.069738] cblist_init_generic: Setting shift to 3 and lim to 1.
5866 09:53:51.114128 <6>[ 0.076091] cblist_init_generic: Setting adjustable number of callback queues.
5867 09:53:51.120265 <6>[ 0.083536] cblist_init_generic: Setting shift to 3 and lim to 1.
5868 09:53:51.123440 <6>[ 0.089934] rcu: Hierarchical SRCU implementation.
5869 09:53:51.129809 <6>[ 0.094960] rcu: Max phase no-delay instances is 1000.
5870 09:53:51.137526 <6>[ 0.102890] EFI services will not be available.
5871 09:53:51.141287 <6>[ 0.107838] smp: Bringing up secondary CPUs ...
5872 09:53:51.151891 <6>[ 0.113086] Detected VIPT I-cache on CPU1
5873 09:53:51.157946 <4>[ 0.113133] cacheinfo: Unable to detect cache hierarchy for CPU 1
5874 09:53:51.164638 <6>[ 0.113141] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5875 09:53:51.171034 <6>[ 0.113171] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5876 09:53:51.174675 <6>[ 0.113655] Detected VIPT I-cache on CPU2
5877 09:53:51.181023 <4>[ 0.113688] cacheinfo: Unable to detect cache hierarchy for CPU 2
5878 09:53:51.187894 <6>[ 0.113693] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5879 09:53:51.194413 <6>[ 0.113705] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5880 09:53:51.200693 <6>[ 0.114151] Detected VIPT I-cache on CPU3
5881 09:53:51.208128 <4>[ 0.114182] cacheinfo: Unable to detect cache hierarchy for CPU 3
5882 09:53:51.214131 <6>[ 0.114186] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5883 09:53:51.220569 <6>[ 0.114197] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5884 09:53:51.223903 <6>[ 0.114772] CPU features: detected: Spectre-v2
5885 09:53:51.230397 <6>[ 0.114782] CPU features: detected: Spectre-BHB
5886 09:53:51.233804 <6>[ 0.114786] CPU features: detected: ARM erratum 858921
5887 09:53:51.240546 <6>[ 0.114792] Detected VIPT I-cache on CPU4
5888 09:53:51.243831 <4>[ 0.114839] cacheinfo: Unable to detect cache hierarchy for CPU 4
5889 09:53:51.253699 <6>[ 0.114847] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5890 09:53:51.260242 <6>[ 0.114855] arch_timer: Enabling local workaround for ARM erratum 858921
5891 09:53:51.263459 <6>[ 0.114865] arch_timer: CPU4: Trapping CNTVCT access
5892 09:53:51.269785 <6>[ 0.114873] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5893 09:53:51.276412 <6>[ 0.115359] Detected VIPT I-cache on CPU5
5894 09:53:51.283010 <4>[ 0.115400] cacheinfo: Unable to detect cache hierarchy for CPU 5
5895 09:53:51.289268 <6>[ 0.115406] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5896 09:53:51.296026 <6>[ 0.115413] arch_timer: Enabling local workaround for ARM erratum 858921
5897 09:53:51.299197 <6>[ 0.115419] arch_timer: CPU5: Trapping CNTVCT access
5898 09:53:51.309323 <6>[ 0.115424] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5899 09:53:51.312711 <6>[ 0.115859] Detected VIPT I-cache on CPU6
5900 09:53:51.319156 <4>[ 0.115905] cacheinfo: Unable to detect cache hierarchy for CPU 6
5901 09:53:51.325663 <6>[ 0.115911] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5902 09:53:51.332824 <6>[ 0.115918] arch_timer: Enabling local workaround for ARM erratum 858921
5903 09:53:51.339214 <6>[ 0.115925] arch_timer: CPU6: Trapping CNTVCT access
5904 09:53:51.346039 <6>[ 0.115930] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5905 09:53:51.348509 <6>[ 0.116459] Detected VIPT I-cache on CPU7
5906 09:53:51.355787 <4>[ 0.116503] cacheinfo: Unable to detect cache hierarchy for CPU 7
5907 09:53:51.361821 <6>[ 0.116509] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5908 09:53:51.368893 <6>[ 0.116516] arch_timer: Enabling local workaround for ARM erratum 858921
5909 09:53:51.375003 <6>[ 0.116522] arch_timer: CPU7: Trapping CNTVCT access
5910 09:53:51.381526 <6>[ 0.116528] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5911 09:53:51.384997 <6>[ 0.116575] smp: Brought up 1 node, 8 CPUs
5912 09:53:51.392111 <6>[ 0.355474] SMP: Total of 8 processors activated.
5913 09:53:51.394798 <6>[ 0.360408] CPU features: detected: 32-bit EL0 Support
5914 09:53:51.401077 <6>[ 0.365786] CPU features: detected: 32-bit EL1 Support
5915 09:53:51.408468 <6>[ 0.371154] CPU features: detected: CRC32 instructions
5916 09:53:51.411368 <6>[ 0.376579] CPU: All CPU(s) started at EL2
5917 09:53:51.418137 <6>[ 0.380917] alternatives: applying system-wide alternatives
5918 09:53:51.421168 <6>[ 0.388911] devtmpfs: initialized
5919 09:53:51.439441 <6>[ 0.397872] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5920 09:53:51.445945 <6>[ 0.407820] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5921 09:53:51.452627 <6>[ 0.415551] pinctrl core: initialized pinctrl subsystem
5922 09:53:51.455951 <6>[ 0.422660] DMI not present or invalid.
5923 09:53:51.462422 <6>[ 0.427030] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5924 09:53:51.472523 <6>[ 0.433932] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5925 09:53:51.478733 <6>[ 0.441461] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5926 09:53:51.488518 <6>[ 0.449712] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5927 09:53:51.491806 <6>[ 0.457889] audit: initializing netlink subsys (disabled)
5928 09:53:51.501889 <5>[ 0.463594] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5929 09:53:51.508589 <6>[ 0.464561] thermal_sys: Registered thermal governor 'step_wise'
5930 09:53:51.514851 <6>[ 0.471559] thermal_sys: Registered thermal governor 'power_allocator'
5931 09:53:51.518099 <6>[ 0.477857] cpuidle: using governor menu
5932 09:53:51.524928 <6>[ 0.488816] NET: Registered PF_QIPCRTR protocol family
5933 09:53:51.531437 <6>[ 0.494311] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5934 09:53:51.538249 <6>[ 0.501407] ASID allocator initialised with 32768 entries
5935 09:53:51.540881 <6>[ 0.508173] Serial: AMBA PL011 UART driver
5936 09:53:51.553622 <4>[ 0.518571] Trying to register duplicate clock ID: 113
5937 09:53:51.613441 <6>[ 0.575007] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5938 09:53:51.627539 <6>[ 0.589346] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5939 09:53:51.631093 <6>[ 0.599101] KASLR enabled
5940 09:53:51.645790 <6>[ 0.607113] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5941 09:53:51.651597 <6>[ 0.614115] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5942 09:53:51.658447 <6>[ 0.620592] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5943 09:53:51.665512 <6>[ 0.627583] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5944 09:53:51.671916 <6>[ 0.634056] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5945 09:53:51.678382 <6>[ 0.641046] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5946 09:53:51.684549 <6>[ 0.647519] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5947 09:53:51.691393 <6>[ 0.654509] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5948 09:53:51.694756 <6>[ 0.662077] ACPI: Interpreter disabled.
5949 09:53:51.705024 <6>[ 0.670071] iommu: Default domain type: Translated
5950 09:53:51.711937 <6>[ 0.675177] iommu: DMA domain TLB invalidation policy: strict mode
5951 09:53:51.715019 <5>[ 0.681807] SCSI subsystem initialized
5952 09:53:51.721640 <6>[ 0.686223] usbcore: registered new interface driver usbfs
5953 09:53:51.728424 <6>[ 0.691951] usbcore: registered new interface driver hub
5954 09:53:51.731435 <6>[ 0.697494] usbcore: registered new device driver usb
5955 09:53:51.739115 <6>[ 0.703797] pps_core: LinuxPPS API ver. 1 registered
5956 09:53:51.748527 <6>[ 0.708983] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5957 09:53:51.752511 <6>[ 0.718307] PTP clock support registered
5958 09:53:51.755086 <6>[ 0.722561] EDAC MC: Ver: 3.0.0
5959 09:53:51.763344 <6>[ 0.728191] FPGA manager framework
5960 09:53:51.770220 <6>[ 0.731875] Advanced Linux Sound Architecture Driver Initialized.
5961 09:53:51.772922 <6>[ 0.738630] vgaarb: loaded
5962 09:53:51.779264 <6>[ 0.741759] clocksource: Switched to clocksource arch_sys_counter
5963 09:53:51.782677 <5>[ 0.748186] VFS: Disk quotas dquot_6.6.0
5964 09:53:51.789325 <6>[ 0.752362] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5965 09:53:51.793060 <6>[ 0.759536] pnp: PnP ACPI: disabled
5966 09:53:51.801803 <6>[ 0.766410] NET: Registered PF_INET protocol family
5967 09:53:51.808301 <6>[ 0.771632] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5968 09:53:51.819989 <6>[ 0.781528] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5969 09:53:51.829882 <6>[ 0.790281] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5970 09:53:51.836390 <6>[ 0.798233] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5971 09:53:51.843055 <6>[ 0.806466] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5972 09:53:51.853146 <6>[ 0.814560] TCP: Hash tables configured (established 32768 bind 32768)
5973 09:53:51.859740 <6>[ 0.821389] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5974 09:53:51.866179 <6>[ 0.828360] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5975 09:53:51.872230 <6>[ 0.835838] NET: Registered PF_UNIX/PF_LOCAL protocol family
5976 09:53:51.879656 <6>[ 0.841954] RPC: Registered named UNIX socket transport module.
5977 09:53:51.882573 <6>[ 0.848099] RPC: Registered udp transport module.
5978 09:53:51.889186 <6>[ 0.853023] RPC: Registered tcp transport module.
5979 09:53:51.895507 <6>[ 0.857947] RPC: Registered tcp NFSv4.1 backchannel transport module.
5980 09:53:51.898425 <6>[ 0.864600] PCI: CLS 0 bytes, default 64
5981 09:53:51.901963 <6>[ 0.868881] Unpacking initramfs...
5982 09:53:51.924170 <6>[ 0.885888] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5983 09:53:51.934280 <6>[ 0.894520] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5984 09:53:51.937476 <6>[ 0.903361] kvm [1]: IPA Size Limit: 40 bits
5985 09:53:51.945049 <6>[ 0.909682] kvm [1]: vgic-v2@c420000
5986 09:53:51.947934 <6>[ 0.913497] kvm [1]: GIC system register CPU interface enabled
5987 09:53:51.954752 <6>[ 0.919662] kvm [1]: vgic interrupt IRQ18
5988 09:53:51.957843 <6>[ 0.924015] kvm [1]: Hyp mode initialized successfully
5989 09:53:51.965065 <5>[ 0.930298] Initialise system trusted keyrings
5990 09:53:51.971839 <6>[ 0.935149] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5991 09:53:51.980173 <6>[ 0.945121] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5992 09:53:51.986960 <5>[ 0.951567] NFS: Registering the id_resolver key type
5993 09:53:51.989539 <5>[ 0.956876] Key type id_resolver registered
5994 09:53:51.996761 <5>[ 0.961292] Key type id_legacy registered
5995 09:53:52.003085 <6>[ 0.965607] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5996 09:53:52.009791 <6>[ 0.972527] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5997 09:53:52.016528 <6>[ 0.980291] 9p: Installing v9fs 9p2000 file system support
5998 09:53:52.043964 <5>[ 1.009177] Key type asymmetric registered
5999 09:53:52.047367 <5>[ 1.013521] Asymmetric key parser 'x509' registered
6000 09:53:52.057167 <6>[ 1.018674] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6001 09:53:52.060461 <6>[ 1.026293] io scheduler mq-deadline registered
6002 09:53:52.063772 <6>[ 1.031051] io scheduler kyber registered
6003 09:53:52.087127 <6>[ 1.051846] EINJ: ACPI disabled.
6004 09:53:52.093673 <4>[ 1.055624] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6005 09:53:52.132314 <6>[ 1.096754] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6006 09:53:52.140436 <6>[ 1.105235] printk: console [ttyS0] disabled
6007 09:53:52.168206 <6>[ 1.129890] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6008 09:53:52.175373 <6>[ 1.139365] printk: console [ttyS0] enabled
6009 09:53:52.177829 <6>[ 1.139365] printk: console [ttyS0] enabled
6010 09:53:52.184243 <6>[ 1.148281] printk: bootconsole [mtk8250] disabled
6011 09:53:52.187535 <6>[ 1.148281] printk: bootconsole [mtk8250] disabled
6012 09:53:52.197963 <3>[ 1.158812] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6013 09:53:52.203796 <3>[ 1.167194] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6014 09:53:52.234170 <6>[ 1.195611] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6015 09:53:52.240780 <6>[ 1.205267] serial serial0: tty port ttyS1 registered
6016 09:53:52.247282 <6>[ 1.211832] SuperH (H)SCI(F) driver initialized
6017 09:53:52.250463 <6>[ 1.217366] msm_serial: driver initialized
6018 09:53:52.266254 <6>[ 1.227707] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6019 09:53:52.276025 <6>[ 1.236307] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6020 09:53:52.282650 <6>[ 1.244885] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6021 09:53:52.292661 <6>[ 1.253457] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6022 09:53:52.302252 <6>[ 1.262110] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6023 09:53:52.309527 <6>[ 1.270774] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6024 09:53:52.318727 <6>[ 1.279514] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6025 09:53:52.325427 <6>[ 1.288254] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6026 09:53:52.335007 <6>[ 1.296821] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6027 09:53:52.345088 <6>[ 1.305621] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6028 09:53:52.352848 <4>[ 1.317996] cacheinfo: Unable to detect cache hierarchy for CPU 0
6029 09:53:52.362124 <6>[ 1.327376] loop: module loaded
6030 09:53:52.374088 <6>[ 1.339309] vsim1: Bringing 1800000uV into 2700000-2700000uV
6031 09:53:52.391900 <6>[ 1.357291] megasas: 07.719.03.00-rc1
6032 09:53:52.401197 <6>[ 1.366099] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6033 09:53:52.408117 <6>[ 1.373138] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6034 09:53:52.425193 <6>[ 1.390029] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6035 09:53:52.481913 <6>[ 1.440232] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
6036 09:53:52.517087 <6>[ 1.481627] Freeing initrd memory: 18300K
6037 09:53:52.531567 <4>[ 1.493430] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6038 09:53:52.538576 <4>[ 1.502661] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6039 09:53:52.544989 <4>[ 1.509360] Hardware name: Google juniper sku16 board (DT)
6040 09:53:52.548943 <4>[ 1.515099] Call trace:
6041 09:53:52.552038 <4>[ 1.517799] dump_backtrace.part.0+0xe0/0xf0
6042 09:53:52.554720 <4>[ 1.522336] show_stack+0x18/0x30
6043 09:53:52.561540 <4>[ 1.525908] dump_stack_lvl+0x68/0x84
6044 09:53:52.564533 <4>[ 1.529829] dump_stack+0x18/0x34
6045 09:53:52.568239 <4>[ 1.533399] sysfs_warn_dup+0x64/0x80
6046 09:53:52.571653 <4>[ 1.537320] sysfs_do_create_link_sd+0xf0/0x100
6047 09:53:52.574992 <4>[ 1.542107] sysfs_create_link+0x20/0x40
6048 09:53:52.581471 <4>[ 1.546286] bus_add_device+0x68/0x10c
6049 09:53:52.585053 <4>[ 1.550292] device_add+0x340/0x7ac
6050 09:53:52.588011 <4>[ 1.554035] of_device_add+0x44/0x60
6051 09:53:52.594121 <4>[ 1.557869] of_platform_device_create_pdata+0x90/0x120
6052 09:53:52.597732 <4>[ 1.563350] of_platform_bus_create+0x170/0x370
6053 09:53:52.601486 <4>[ 1.568137] of_platform_populate+0x50/0xfc
6054 09:53:52.607611 <4>[ 1.572576] parse_mtd_partitions+0x1dc/0x510
6055 09:53:52.610939 <4>[ 1.577189] mtd_device_parse_register+0xf8/0x2e0
6056 09:53:52.617974 <4>[ 1.582147] spi_nor_probe+0x21c/0x2f0
6057 09:53:52.621110 <4>[ 1.586153] spi_mem_probe+0x6c/0xb0
6058 09:53:52.624569 <4>[ 1.589986] spi_probe+0x84/0xe4
6059 09:53:52.627579 <4>[ 1.593468] really_probe+0xbc/0x2e0
6060 09:53:52.630598 <4>[ 1.597298] __driver_probe_device+0x78/0x11c
6061 09:53:52.638178 <4>[ 1.601910] driver_probe_device+0xd8/0x160
6062 09:53:52.641503 <4>[ 1.606348] __device_attach_driver+0xb8/0x134
6063 09:53:52.644262 <4>[ 1.611047] bus_for_each_drv+0x78/0xd0
6064 09:53:52.650827 <4>[ 1.615138] __device_attach+0xa8/0x1c0
6065 09:53:52.654248 <4>[ 1.619228] device_initial_probe+0x14/0x20
6066 09:53:52.657147 <4>[ 1.623667] bus_probe_device+0x9c/0xa4
6067 09:53:52.660700 <4>[ 1.627757] device_add+0x3ac/0x7ac
6068 09:53:52.667597 <4>[ 1.631499] __spi_add_device+0x78/0x120
6069 09:53:52.670289 <4>[ 1.635678] spi_add_device+0x40/0x7c
6070 09:53:52.673697 <4>[ 1.639595] spi_register_controller+0x610/0xad0
6071 09:53:52.680542 <4>[ 1.644468] devm_spi_register_controller+0x4c/0xa4
6072 09:53:52.683976 <4>[ 1.649601] mtk_spi_probe+0x3f8/0x650
6073 09:53:52.687437 <4>[ 1.653604] platform_probe+0x68/0xe0
6074 09:53:52.690288 <4>[ 1.657523] really_probe+0xbc/0x2e0
6075 09:53:52.697073 <4>[ 1.661353] __driver_probe_device+0x78/0x11c
6076 09:53:52.700042 <4>[ 1.665964] driver_probe_device+0xd8/0x160
6077 09:53:52.704139 <4>[ 1.670402] __driver_attach+0x94/0x19c
6078 09:53:52.709965 <4>[ 1.674493] bus_for_each_dev+0x70/0xd0
6079 09:53:52.713495 <4>[ 1.678583] driver_attach+0x24/0x30
6080 09:53:52.716757 <4>[ 1.682412] bus_add_driver+0x154/0x20c
6081 09:53:52.719900 <4>[ 1.686502] driver_register+0x78/0x130
6082 09:53:52.726617 <4>[ 1.690594] __platform_driver_register+0x28/0x34
6083 09:53:52.729501 <4>[ 1.695553] mtk_spi_driver_init+0x1c/0x28
6084 09:53:52.733369 <4>[ 1.699907] do_one_initcall+0x50/0x1d0
6085 09:53:52.739900 <4>[ 1.703997] kernel_init_freeable+0x21c/0x288
6086 09:53:52.743149 <4>[ 1.708611] kernel_init+0x24/0x12c
6087 09:53:52.746186 <4>[ 1.712356] ret_from_fork+0x10/0x20
6088 09:53:52.756286 <6>[ 1.721270] tun: Universal TUN/TAP device driver, 1.6
6089 09:53:52.759679 <6>[ 1.727571] thunder_xcv, ver 1.0
6090 09:53:52.766057 <6>[ 1.731087] thunder_bgx, ver 1.0
6091 09:53:52.766497 <6>[ 1.734590] nicpf, ver 1.0
6092 09:53:52.777120 <6>[ 1.738965] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6093 09:53:52.780815 <6>[ 1.746449] hns3: Copyright (c) 2017 Huawei Corporation.
6094 09:53:52.787186 <6>[ 1.752044] hclge is initializing
6095 09:53:52.790839 <6>[ 1.755634] e1000: Intel(R) PRO/1000 Network Driver
6096 09:53:52.797247 <6>[ 1.760769] e1000: Copyright (c) 1999-2006 Intel Corporation.
6097 09:53:52.803836 <6>[ 1.766794] e1000e: Intel(R) PRO/1000 Network Driver
6098 09:53:52.807054 <6>[ 1.772015] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6099 09:53:52.814151 <6>[ 1.778209] igb: Intel(R) Gigabit Ethernet Network Driver
6100 09:53:52.820343 <6>[ 1.783864] igb: Copyright (c) 2007-2014 Intel Corporation.
6101 09:53:52.826639 <6>[ 1.789707] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6102 09:53:52.833760 <6>[ 1.796230] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6103 09:53:52.836792 <6>[ 1.802786] sky2: driver version 1.30
6104 09:53:52.843151 <6>[ 1.808041] usbcore: registered new device driver r8152-cfgselector
6105 09:53:52.850196 <6>[ 1.814583] usbcore: registered new interface driver r8152
6106 09:53:52.856517 <6>[ 1.820412] VFIO - User Level meta-driver version: 0.3
6107 09:53:52.863329 <6>[ 1.828209] mtu3 11201000.usb: uwk - reg:0x420, version:101
6108 09:53:52.869952 <4>[ 1.834081] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6109 09:53:52.876305 <6>[ 1.841357] mtu3 11201000.usb: dr_mode: 1, drd: auto
6110 09:53:52.882677 <6>[ 1.846582] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6111 09:53:52.885986 <6>[ 1.852764] mtu3 11201000.usb: usb3-drd: 0
6112 09:53:52.896884 <6>[ 1.858321] mtu3 11201000.usb: xHCI platform device register success...
6113 09:53:52.902938 <4>[ 1.866963] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6114 09:53:52.910014 <6>[ 1.874925] xhci-mtk 11200000.usb: xHCI Host Controller
6115 09:53:52.916450 <6>[ 1.880429] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6116 09:53:52.922955 <6>[ 1.888146] xhci-mtk 11200000.usb: USB3 root hub has no ports
6117 09:53:52.933158 <6>[ 1.894155] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6118 09:53:52.940242 <6>[ 1.903599] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6119 09:53:52.946593 <6>[ 1.909666] xhci-mtk 11200000.usb: xHCI Host Controller
6120 09:53:52.952825 <6>[ 1.915155] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6121 09:53:52.959567 <6>[ 1.922812] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6122 09:53:52.962813 <6>[ 1.929633] hub 1-0:1.0: USB hub found
6123 09:53:52.969203 <6>[ 1.933682] hub 1-0:1.0: 1 port detected
6124 09:53:52.976597 <6>[ 1.939061] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6125 09:53:52.983234 <6>[ 1.947671] hub 2-0:1.0: USB hub found
6126 09:53:52.990275 <3>[ 1.951699] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6127 09:53:52.996296 <6>[ 1.959602] usbcore: registered new interface driver usb-storage
6128 09:53:53.002283 <6>[ 1.966228] usbcore: registered new device driver onboard-usb-hub
6129 09:53:53.020094 <4>[ 1.981872] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6130 09:53:53.029131 <6>[ 1.994166] mt6397-rtc mt6358-rtc: registered as rtc0
6131 09:53:53.038880 <6>[ 1.999650] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:53:52 UTC (1718704432)
6132 09:53:53.045364 <6>[ 2.009486] i2c_dev: i2c /dev entries driver
6133 09:53:53.055303 <6>[ 2.015913] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6134 09:53:53.062158 <6>[ 2.024235] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6135 09:53:53.069623 <6>[ 2.033138] i2c 4-0058: Fixed dependency cycle(s) with /panel
6136 09:53:53.075368 <6>[ 2.039170] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6137 09:53:53.084948 <3>[ 2.046635] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6138 09:53:53.101427 <6>[ 2.066536] cpu cpu0: EM: created perf domain
6139 09:53:53.114501 <6>[ 2.072044] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6140 09:53:53.117651 <6>[ 2.083319] cpu cpu4: EM: created perf domain
6141 09:53:53.124493 <6>[ 2.089912] sdhci: Secure Digital Host Controller Interface driver
6142 09:53:53.131441 <6>[ 2.096363] sdhci: Copyright(c) Pierre Ossman
6143 09:53:53.138226 <6>[ 2.101927] Synopsys Designware Multimedia Card Interface Driver
6144 09:53:53.144595 <6>[ 2.102391] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6145 09:53:53.148444 <6>[ 2.109005] sdhci-pltfm: SDHCI platform and OF driver helper
6146 09:53:53.156609 <6>[ 2.121590] ledtrig-cpu: registered to indicate activity on CPUs
6147 09:53:53.163974 <6>[ 2.129322] usbcore: registered new interface driver usbhid
6148 09:53:53.167874 <6>[ 2.135169] usbhid: USB HID core driver
6149 09:53:53.178203 <6>[ 2.139469] spi_master spi2: will run message pump with realtime priority
6150 09:53:53.186411 <4>[ 2.139611] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6151 09:53:53.192509 <4>[ 2.153762] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6152 09:53:53.202404 <6>[ 2.157097] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6153 09:53:53.220552 <6>[ 2.175707] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6154 09:53:53.227629 <4>[ 2.181906] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6155 09:53:53.233859 <6>[ 2.196515] cros-ec-spi spi2.0: Chrome EC device registered
6156 09:53:53.241016 <4>[ 2.204699] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6157 09:53:53.254802 <4>[ 2.215871] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6158 09:53:53.261399 <4>[ 2.224946] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6159 09:53:53.274681 <6>[ 2.236571] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6160 09:53:53.299401 <6>[ 2.263935] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6161 09:53:53.306001 <6>[ 2.270935] mmc0: new HS400 MMC card at address 0001
6162 09:53:53.312533 <6>[ 2.277496] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6163 09:53:53.322601 <6>[ 2.279042] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6164 09:53:53.326259 <6>[ 2.288240] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6165 09:53:53.339024 <6>[ 2.294490] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6166 09:53:53.342584 <6>[ 2.300089] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6167 09:53:53.355345 <6>[ 2.305758] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6168 09:53:53.365226 <6>[ 2.305981] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6169 09:53:53.372490 <6>[ 2.309459] NET: Registered PF_PACKET protocol family
6170 09:53:53.375663 <6>[ 2.314355] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6171 09:53:53.378668 <6>[ 2.325173] 9pnet: Installing 9P2000 support
6172 09:53:53.385312 <6>[ 2.335972] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6173 09:53:53.391587 <5>[ 2.340537] Key type dns_resolver registered
6174 09:53:53.398271 <6>[ 2.357869] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6175 09:53:53.401794 <6>[ 2.361797] registered taskstats version 1
6176 09:53:53.408735 <5>[ 2.372246] Loading compiled-in X.509 certificates
6177 09:53:53.461818 <3>[ 2.422965] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6178 09:53:53.493349 <6>[ 2.451848] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6179 09:53:53.505032 <6>[ 2.466159] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6180 09:53:53.513824 <6>[ 2.474725] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6181 09:53:53.520664 <6>[ 2.483524] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6182 09:53:53.530569 <6>[ 2.492116] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6183 09:53:53.540573 <6>[ 2.500644] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6184 09:53:53.547085 <6>[ 2.509163] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6185 09:53:53.550179 <6>[ 2.516575] hub 1-1:1.0: USB hub found
6186 09:53:53.560654 <6>[ 2.517676] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6187 09:53:53.563808 <6>[ 2.522053] hub 1-1:1.0: 3 ports detected
6188 09:53:53.570000 <6>[ 2.530839] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6189 09:53:53.576885 <6>[ 2.541821] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6190 09:53:53.583939 <6>[ 2.548972] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6191 09:53:53.594427 <6>[ 2.556096] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6192 09:53:53.600893 <6>[ 2.563391] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6193 09:53:53.607729 <6>[ 2.571382] panfrost 13040000.gpu: clock rate = 511999970
6194 09:53:53.616982 <6>[ 2.577063] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6195 09:53:53.624237 <6>[ 2.587086] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6196 09:53:53.633953 <6>[ 2.595097] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6197 09:53:53.646508 <6>[ 2.603538] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6198 09:53:53.653123 <6>[ 2.615618] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6199 09:53:53.663756 <6>[ 2.625236] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6200 09:53:53.673425 <6>[ 2.634345] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6201 09:53:53.683029 <6>[ 2.643499] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6202 09:53:53.693374 <6>[ 2.652630] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6203 09:53:53.700236 <6>[ 2.661757] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6204 09:53:53.709869 <6>[ 2.671058] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6205 09:53:53.719689 <6>[ 2.680358] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6206 09:53:53.729761 <6>[ 2.689832] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6207 09:53:53.739488 <6>[ 2.699305] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6208 09:53:53.749539 <6>[ 2.708431] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6209 09:53:53.819941 <6>[ 2.781317] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6210 09:53:53.829113 <6>[ 2.790174] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6211 09:53:53.840236 <6>[ 2.801783] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6212 09:53:53.864427 <6>[ 2.825875] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6213 09:53:54.526446 <6>[ 3.018219] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6214 09:53:54.536765 <4>[ 3.134969] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6215 09:53:54.542973 <4>[ 3.134984] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6216 09:53:54.549453 <6>[ 3.184658] r8152 1-1.2:1.0 eth0: v1.12.13
6217 09:53:54.555975 <6>[ 3.265780] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6218 09:53:54.562624 <6>[ 3.471326] Console: switching to colour frame buffer device 170x48
6219 09:53:54.569259 <6>[ 3.531981] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6220 09:53:54.590922 <6>[ 3.549309] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6221 09:53:54.608215 <6>[ 3.566221] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6222 09:53:54.614532 <6>[ 3.578244] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6223 09:53:54.625027 <6>[ 3.586305] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6224 09:53:54.634539 <6>[ 3.592346] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6225 09:53:54.653689 <6>[ 3.612206] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6226 09:53:55.851431 <6>[ 4.815803] r8152 1-1.2:1.0 eth0: carrier on
6227 09:53:58.441367 <5>[ 4.845777] Sending DHCP requests .., OK
6228 09:53:58.448121 <6>[ 7.410261] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6229 09:53:58.450975 <6>[ 7.418695] IP-Config: Complete:
6230 09:53:58.464653 <6>[ 7.422268] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6231 09:53:58.474376 <6>[ 7.433167] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6232 09:53:58.485799 <6>[ 7.447444] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6233 09:53:58.494805 <6>[ 7.447454] nameserver0=192.168.201.1
6234 09:53:58.502567 <6>[ 7.467182] clk: Disabling unused clocks
6235 09:53:58.506679 <6>[ 7.475126] ALSA device list:
6236 09:53:58.516372 <6>[ 7.481169] No soundcards found.
6237 09:53:58.525385 <6>[ 7.490140] Freeing unused kernel memory: 8512K
6238 09:53:58.532132 <6>[ 7.497208] Run /init as init process
6239 09:53:58.543740 Loading, please wait...
6240 09:53:58.580428 Starting systemd-udevd version 252.22-1~deb12u1
6241 09:53:58.892125 <3>[ 7.856840] mtk-scp 10500000.scp: invalid resource
6242 09:53:58.906191 <6>[ 7.867521] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6243 09:53:58.915831 <6>[ 7.870429] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6244 09:53:58.925429 <6>[ 7.870679] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6245 09:53:58.932455 <4>[ 7.887925] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6246 09:53:58.938554 <6>[ 7.896598] remoteproc remoteproc0: scp is available
6247 09:53:58.942065 <3>[ 7.903119] thermal_sys: Failed to find 'trips' node
6248 09:53:58.951591 <3>[ 7.903127] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6249 09:53:58.958739 <3>[ 7.903148] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6250 09:53:58.968493 <3>[ 7.903157] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6251 09:53:58.974666 <4>[ 7.906031] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6252 09:53:58.985260 <3>[ 7.906039] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6253 09:53:58.991998 <3>[ 7.906046] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6254 09:53:59.005129 <3>[ 7.906049] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6255 09:53:59.011438 <3>[ 7.906053] elan_i2c 2-0015: Error applying setting, reverse things back
6256 09:53:59.017993 <4>[ 7.907335] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6257 09:53:59.024573 <3>[ 7.912520] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6258 09:53:59.034356 <3>[ 7.916877] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6259 09:53:59.041744 <3>[ 7.916894] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6260 09:53:59.051921 <3>[ 7.916899] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6261 09:53:59.061690 <3>[ 7.916906] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6262 09:53:59.068531 <3>[ 7.916911] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6263 09:53:59.074918 <6>[ 7.921052] remoteproc remoteproc0: powering up scp
6264 09:53:59.081320 <4>[ 7.921085] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6265 09:53:59.091133 <3>[ 7.929638] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6266 09:53:59.097593 <3>[ 7.938118] remoteproc remoteproc0: request_firmware failed: -2
6267 09:53:59.108192 <3>[ 7.938486] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6268 09:53:59.114211 <4>[ 7.945418] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6269 09:53:59.117891 <6>[ 7.961497] mc: Linux media interface: v0.10
6270 09:53:59.124255 <3>[ 7.964858] thermal_sys: Failed to find 'trips' node
6271 09:53:59.131111 <6>[ 7.973370] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6272 09:53:59.137288 <3>[ 7.980098] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6273 09:53:59.147483 <3>[ 7.980109] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6274 09:53:59.153477 <4>[ 7.980114] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6275 09:53:59.163338 <4>[ 7.982981] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6276 09:53:59.174495 <6>[ 7.983140] cs_system_cfg: CoreSight Configuration manager initialised
6277 09:53:59.180786 <5>[ 7.987385] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6278 09:53:59.188109 <6>[ 7.992733] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6279 09:53:59.197462 <6>[ 7.996453] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6280 09:53:59.204019 <5>[ 8.003368] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6281 09:53:59.214119 <5>[ 8.003791] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6282 09:53:59.224117 <4>[ 8.003852] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6283 09:53:59.231773 <6>[ 8.003859] cfg80211: failed to load regulatory.db
6284 09:53:59.237834 <6>[ 8.004727] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6285 09:53:59.253002 <6>[ 8.014644] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6286 09:53:59.258937 <6>[ 8.021734] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6287 09:53:59.271782 <3>[ 8.030378] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6288 09:53:59.278828 <6>[ 8.038911] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6289 09:53:59.288330 <6>[ 8.046853] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6290 09:53:59.295048 <6>[ 8.052471] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6291 09:53:59.301776 <6>[ 8.068357] videodev: Linux video capture interface: v2.00
6292 09:53:59.311202 <6>[ 8.076717] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6293 09:53:59.314957 <6>[ 8.084967] Bluetooth: Core ver 2.22
6294 09:53:59.324686 <6>[ 8.088437] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6295 09:53:59.331496 <6>[ 8.093536] NET: Registered PF_BLUETOOTH protocol family
6296 09:53:59.337635 <6>[ 8.101428] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6297 09:53:59.345119 <6>[ 8.108540] Bluetooth: HCI device and connection manager initialized
6298 09:53:59.351574 <6>[ 8.108556] Bluetooth: HCI socket layer initialized
6299 09:53:59.358495 <6>[ 8.137588] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6300 09:53:59.365023 <6>[ 8.142807] Bluetooth: L2CAP socket layer initialized
6301 09:53:59.371565 <6>[ 8.151626] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6302 09:53:59.379005 <6>[ 8.158686] Bluetooth: SCO socket layer initialized
6303 09:53:59.382488 <6>[ 8.168756] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6304 09:53:59.395907 <6>[ 8.169026] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6305 09:53:59.403297 <6>[ 8.169130] usbcore: registered new interface driver uvcvideo
6306 09:53:59.409734 <6>[ 8.169674] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video2
6307 09:53:59.413264 <6>[ 8.196697] Bluetooth: HCI UART driver ver 2.3
6308 09:53:59.423126 <6>[ 8.201864] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6309 09:53:59.437380 <3>[ 8.202033] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6310 09:53:59.447985 Begin: Loading e<6>[ 8.202362] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6311 09:53:59.453729 <3>[ 8.202678] debugfs: File 'Playback' in directory 'dapm' already present!
6312 09:53:59.457019 ssential drivers ... done.
6313 09:53:59.466650 Begin: Running /scri<3>[ 8.202683] debugfs: File 'Capture' in directory 'dapm' already present!
6314 09:53:59.470308 pts/init-premount ... done.
6315 09:53:59.480441 Beg<6>[ 8.204275] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6316 09:53:59.486939 in: Mounting root file system ..<6>[ 8.209501] Bluetooth: HCI UART protocol H4 registered
6317 09:53:59.496908 . Begin: Running /scripts/nfs-to<6>[ 8.209554] Bluetooth: HCI UART protocol LL registered
6318 09:53:59.497428 p ... done.
6319 09:53:59.506419 Begin: Running /scr<6>[ 8.220400] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6320 09:53:59.516866 ipts/nfs-premount ... Waiting up<6>[ 8.228300] Bluetooth: HCI UART protocol Three-wire (H5) registered
6321 09:53:59.529929 to 60 secs for any ethernet to <6>[ 8.241040] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6322 09:53:59.532847 become available
6323 09:53:59.539818 Device /sys/cl<6>[ 8.248944] Bluetooth: HCI UART protocol Broadcom registered
6324 09:53:59.540287 ass/net/eth0 found
6325 09:53:59.542883 done.
6326 09:53:59.553060 Begin<4>[ 8.336003] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6327 09:53:59.556125 <4>[ 8.336003] Fallback method does not support PEC.
6328 09:53:59.566319 : Waiting up to 180 secs for any<6>[ 8.342277] Bluetooth: HCI UART protocol QCA registered
6329 09:53:59.572788 network device to become availa<6>[ 8.343349] Bluetooth: hci0: setting up ROME/QCA6390
6330 09:53:59.573322 ble ... done.
6331 09:53:59.582155 <3>[ 8.350026] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6332 09:53:59.589175 <6>[ 8.353576] Bluetooth: HCI UART protocol Marvell registered
6333 09:53:59.598495 <3>[ 8.372367] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 09:53:59.605457 <6>[ 8.408165] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6335 09:53:59.611979 <3>[ 8.556988] Bluetooth: hci0: Frame reassembly failed (-84)
6336 09:53:59.685173 IP-Config: eth0 hardware address 00:e0:4c:72:3d:a6 mtu 1500 DHCP
6337 09:53:59.692262 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6338 09:53:59.698558 address: 192.168.201.20 broadcast: 192.168.201.255 netmask: 255.255.255.0
6339 09:53:59.704899 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6340 09:53:59.711464 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-4
6341 09:53:59.718069 domain : lava-rack
6342 09:53:59.721367 rootserver: 192.168.201.1 rootpath:
6343 09:53:59.722164 filename :
6344 09:53:59.730425 done.
6345 09:53:59.737870 Begin: Running /scripts/nfs-bottom ... done.
6346 09:53:59.759180 Begin: Running /scripts/init-bottom ... done.
6347 09:53:59.877249 <6>[ 8.842393] Bluetooth: hci0: QCA Product ID :0x00000008
6348 09:53:59.885479 <6>[ 8.850567] Bluetooth: hci0: QCA SOC Version :0x00000044
6349 09:53:59.893872 <6>[ 8.858931] Bluetooth: hci0: QCA ROM Version :0x00000302
6350 09:53:59.902410 <6>[ 8.867600] Bluetooth: hci0: QCA Patch Version:0x00000111
6351 09:53:59.912442 <6>[ 8.876890] Bluetooth: hci0: QCA controller version 0x00440302
6352 09:53:59.924568 <6>[ 8.885918] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6353 09:53:59.934423 <4>[ 8.896399] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6354 09:53:59.945487 <3>[ 8.906917] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6355 09:53:59.951965 <3>[ 8.916257] Bluetooth: hci0: QCA Failed to download patch (-2)
6356 09:54:00.041722 <6>[ 9.002955] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6357 09:54:00.127097 <4>[ 9.088558] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6358 09:54:00.148540 <4>[ 9.109904] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6359 09:54:00.167628 <4>[ 9.128938] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6360 09:54:00.178368 <4>[ 9.143044] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6361 09:54:01.220723 <6>[ 10.185472] NET: Registered PF_INET6 protocol family
6362 09:54:01.233368 <6>[ 10.197982] Segment Routing with IPv6
6363 09:54:01.241431 <6>[ 10.206526] In-situ OAM (IOAM) with IPv6
6364 09:54:01.435974 <30>[ 10.371259] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6365 09:54:01.454782 <30>[ 10.418663] systemd[1]: Detected architecture arm64.
6366 09:54:01.466029
6367 09:54:01.468893 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6368 09:54:01.469319
6369 09:54:01.494673 <30>[ 10.459807] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6370 09:54:02.646625 <30>[ 11.607896] systemd[1]: Queued start job for default target graphical.target.
6371 09:54:02.685235 <30>[ 11.647050] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6372 09:54:02.698500 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6373 09:54:02.717876 <30>[ 11.679920] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6374 09:54:02.731419 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6375 09:54:02.750517 <30>[ 11.712328] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6376 09:54:02.765252 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6377 09:54:02.782035 <30>[ 11.743327] systemd[1]: Created slice user.slice - User and Session Slice.
6378 09:54:02.793615 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6379 09:54:02.816037 <30>[ 11.774362] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6380 09:54:02.829333 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6381 09:54:02.847986 <30>[ 11.806182] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6382 09:54:02.860157 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6383 09:54:02.886952 <30>[ 11.838155] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6384 09:54:02.906138 <30>[ 11.867251] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6385 09:54:02.913171 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6386 09:54:02.932579 <30>[ 11.893945] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6387 09:54:02.945044 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6388 09:54:02.964195 <30>[ 11.925999] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6389 09:54:02.978477 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6390 09:54:02.992776 <30>[ 11.958045] systemd[1]: Reached target paths.target - Path Units.
6391 09:54:03.007272 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6392 09:54:03.023817 <30>[ 11.985948] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6393 09:54:03.036086 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6394 09:54:03.051795 <30>[ 12.013925] systemd[1]: Reached target slices.target - Slice Units.
6395 09:54:03.063580 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6396 09:54:03.076702 <30>[ 12.041978] systemd[1]: Reached target swap.target - Swaps.
6397 09:54:03.087532 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6398 09:54:03.107887 <30>[ 12.070014] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6399 09:54:03.121324 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6400 09:54:03.140363 <30>[ 12.102416] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6401 09:54:03.153896 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6402 09:54:03.174985 <30>[ 12.137020] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6403 09:54:03.188154 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6404 09:54:03.205428 <30>[ 12.167700] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6405 09:54:03.219518 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6406 09:54:03.236619 <30>[ 12.198699] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6407 09:54:03.248837 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6408 09:54:03.269697 <30>[ 12.231789] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6409 09:54:03.283454 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6410 09:54:03.302851 <30>[ 12.264918] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6411 09:54:03.315793 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6412 09:54:03.332276 <30>[ 12.294527] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6413 09:54:03.345762 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6414 09:54:03.387944 <30>[ 12.350114] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6415 09:54:03.400342 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6416 09:54:03.413756 <30>[ 12.375675] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6417 09:54:03.426667 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6418 09:54:03.468546 <30>[ 12.430312] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6419 09:54:03.479771 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6420 09:54:03.503092 <30>[ 12.458841] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6421 09:54:03.527765 <30>[ 12.489904] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6422 09:54:03.540977 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6423 09:54:03.561995 <30>[ 12.524187] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6424 09:54:03.574240 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6425 09:54:03.598276 <30>[ 12.560329] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6426 09:54:03.610040 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6427 09:54:03.632213 <30>[ 12.594460] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6428 09:54:03.646445 Starting [0;1;39mmodpr<6>[ 12.606880] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6429 09:54:03.649730 obe@drm.service[0m - Load Kernel Module drm...
6430 09:54:03.696702 <30>[ 12.658988] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6431 09:54:03.709800 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6432 09:54:03.733151 <30>[ 12.695015] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6433 09:54:03.744548 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6434 09:54:03.765246 <30>[ 12.727022] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6435 09:54:03.773839 Startin<6>[ 12.739730] fuse: init (API version 7.37)
6436 09:54:03.779993 g [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6437 09:54:03.810188 <30>[ 12.772296] systemd[1]: Starting systemd-journald.service - Journal Service...
6438 09:54:03.822354 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6439 09:54:03.884675 <30>[ 12.846649] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6440 09:54:03.895451 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6441 09:54:03.919141 <30>[ 12.878124] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6442 09:54:03.929663 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6443 09:54:03.951123 <30>[ 12.913261] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6444 09:54:03.963245 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6445 09:54:03.979718 <3>[ 12.941320] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6446 09:54:03.992027 <30>[ 12.953090] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6447 09:54:03.998719 <3>[ 12.957438] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6448 09:54:04.010820 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6449 09:54:04.017977 <3>[ 12.980335] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6450 09:54:04.033729 <3>[ 12.995275] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6451 09:54:04.041276 <30>[ 12.995899] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6452 09:54:04.047718 <3>[ 13.008970] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6453 09:54:04.064678 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - H<3>[ 13.027490] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6454 09:54:04.067706 uge Pages File System.
6455 09:54:04.081690 <3>[ 13.043258] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6456 09:54:04.089028 <30>[ 13.052564] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6457 09:54:04.099001 <3>[ 13.057897] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6458 09:54:04.111119 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6459 09:54:04.128697 <30>[ 13.090415] systemd[1]: Started systemd-journald.service - Journal Service.
6460 09:54:04.138445 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6461 09:54:04.163957 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6462 09:54:04.185166 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6463 09:54:04.205674 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6464 09:54:04.231506 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6465 09:54:04.250796 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6466 09:54:04.271073 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6467 09:54:04.290806 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6468 09:54:04.310729 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6469 09:54:04.329243 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6470 09:54:04.349498 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6471 09:54:04.369668 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6472 09:54:04.390967 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6473 09:54:04.429403 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6474 09:54:04.453508 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6475 09:54:04.477494 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6476 09:54:04.501080 Startin<4>[ 13.462765] power_supply_show_property: 2 callbacks suppressed
6477 09:54:04.508646 g [0;1;39msyste<3>[ 13.462774] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6478 09:54:04.518492 md-random-se…i<3>[ 13.476215] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 09:54:04.535817 <4>[ 13.479825] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6480 09:54:04.545483 ce[0m - Load/Sa<3>[ 13.479835] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6481 09:54:04.545610 ve Random Seed...
6482 09:54:04.556476 <3>[ 13.495491] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6483 09:54:04.587423 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables..<3>[ 13.548232] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6484 09:54:04.587510 .
6485 09:54:04.604602 <3>[ 13.566213] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6486 09:54:04.622102 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users..<3>[ 13.582495] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6487 09:54:04.622187 .
6488 09:54:04.637845 <3>[ 13.599090] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6489 09:54:04.653396 <3>[ 13.615516] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6490 09:54:04.671679 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All u<3>[ 13.631526] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6491 09:54:04.671775 dev Devices.
6492 09:54:04.686839 <3>[ 13.648731] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6493 09:54:04.698287 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6494 09:54:04.710624 <46>[ 13.672385] systemd-journald[317]: Received client request to flush runtime journal.
6495 09:54:04.720980 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6496 09:54:04.742014 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6497 09:54:04.761437 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6498 09:54:04.782983 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6499 09:54:04.830330 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6500 09:54:06.175890 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6501 09:54:06.195435 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6502 09:54:06.217384 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6503 09:54:06.240445 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6504 09:54:06.285051 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6505 09:54:06.310936 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6506 09:54:06.541880 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6507 09:54:06.596772 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6508 09:54:06.649572 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6509 09:54:06.838646 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6510 09:54:06.904202 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6511 09:54:06.936147 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6512 09:54:06.952160 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6513 09:54:07.025219 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6514 09:54:07.049213 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6515 09:54:07.070997 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6516 09:54:07.163702 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6517 09:54:07.217214 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6518 09:54:07.251260 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6519 09:54:07.320595 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6520 09:54:07.341839 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6521 09:54:07.358365 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6522 09:54:07.400939 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6523 09:54:07.427695 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6524 09:54:07.476872 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6525 09:54:07.518176 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6526 09:54:07.541222 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6527 09:54:07.563362 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6528 09:54:07.583186 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6529 09:54:07.601977 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6530 09:54:07.620452 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6531 09:54:07.642193 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6532 09:54:07.662853 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6533 09:54:07.680488 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6534 09:54:07.700009 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6535 09:54:07.720047 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6536 09:54:07.736622 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6537 09:54:07.752508 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6538 09:54:07.771056 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6539 09:54:07.788851 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6540 09:54:07.805111 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6541 09:54:07.848978 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6542 09:54:07.871631 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6543 09:54:07.904785 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6544 09:54:07.970586 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6545 09:54:07.999228 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6546 09:54:08.025841 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6547 09:54:08.049744 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6548 09:54:08.164882 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6549 09:54:08.224684 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6550 09:54:08.287011 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6551 09:54:08.298031 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6552 09:54:08.322245 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6553 09:54:08.354545 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6554 09:54:08.378075 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6555 09:54:08.401389 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6556 09:54:08.423741 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6557 09:54:08.467069 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6558 09:54:08.514478 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6559 09:54:08.608231
6560 09:54:08.611308 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6561 09:54:08.611387
6562 09:54:08.614830 debian-bookworm-arm64 login: root (automatic login)
6563 09:54:08.614905
6564 09:54:08.889066 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024 aarch64
6565 09:54:08.889192
6566 09:54:08.895255 The programs included with the Debian GNU/Linux system are free software;
6567 09:54:08.901784 the exact distribution terms for each program are described in the
6568 09:54:08.904687 individual files in /usr/share/doc/*/copyright.
6569 09:54:08.904803
6570 09:54:08.911697 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6571 09:54:08.914784 permitted by applicable law.
6572 09:54:10.014721 Matched prompt #10: / #
6574 09:54:10.015008 Setting prompt string to ['/ #']
6575 09:54:10.015101 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6577 09:54:10.015303 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6578 09:54:10.015387 start: 2.2.6 expect-shell-connection (timeout 00:03:52) [common]
6579 09:54:10.015452 Setting prompt string to ['/ #']
6580 09:54:10.015509 Forcing a shell prompt, looking for ['/ #']
6582 09:54:10.065691 / #
6583 09:54:10.065871 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6584 09:54:10.065943 Waiting using forced prompt support (timeout 00:02:30)
6585 09:54:10.071303
6586 09:54:10.071568 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6587 09:54:10.071663 start: 2.2.7 export-device-env (timeout 00:03:52) [common]
6589 09:54:10.172007 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq'
6590 09:54:10.177313 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407600/extract-nfsrootfs-7ny40njq'
6592 09:54:10.277864 / # export NFS_SERVER_IP='192.168.201.1'
6593 09:54:10.283408 export NFS_SERVER_IP='192.168.201.1'
6594 09:54:10.283682 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6595 09:54:10.283773 end: 2.2 depthcharge-retry (duration 00:01:08) [common]
6596 09:54:10.283862 end: 2 depthcharge-action (duration 00:01:08) [common]
6597 09:54:10.283948 start: 3 lava-test-retry (timeout 00:08:13) [common]
6598 09:54:10.284033 start: 3.1 lava-test-shell (timeout 00:08:13) [common]
6599 09:54:10.284101 Using namespace: common
6601 09:54:10.384426 / # #
6602 09:54:10.384597 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6603 09:54:10.389995 #
6604 09:54:10.390248 Using /lava-14407600
6606 09:54:10.490522 / # export SHELL=/bin/bash
6607 09:54:10.495980 export SHELL=/bin/bash
6609 09:54:10.596475 / # . /lava-14407600/environment
6610 09:54:10.601402 . /lava-14407600/environment
6612 09:54:10.706320 / # /lava-14407600/bin/lava-test-runner /lava-14407600/0
6613 09:54:10.706485 Test shell timeout: 10s (minimum of the action and connection timeout)
6614 09:54:10.711441 /lava-14407600/bin/lava-test-runner /lava-14407600/0
6615 09:54:10.950148 + export TESTRUN_ID=0_timesync-off
6616 09:54:10.953165 + TESTRUN_ID=0_timesync-off
6617 09:54:10.956277 + cd /lava-14407600/0/tests/0_timesync-off
6618 09:54:10.960171 ++ cat uuid
6619 09:54:10.963315 + UUID=14407600_1.6.2.3.1
6620 09:54:10.963390 + set +x
6621 09:54:10.966499 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14407600_1.6.2.3.1>
6622 09:54:10.966778 Received signal: <STARTRUN> 0_timesync-off 14407600_1.6.2.3.1
6623 09:54:10.966842 Starting test lava.0_timesync-off (14407600_1.6.2.3.1)
6624 09:54:10.966938 Skipping test definition patterns.
6625 09:54:10.969775 + systemctl stop systemd-timesyncd
6626 09:54:11.023846 + set +x
6627 09:54:11.027289 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14407600_1.6.2.3.1>
6628 09:54:11.027548 Received signal: <ENDRUN> 0_timesync-off 14407600_1.6.2.3.1
6629 09:54:11.027627 Ending use of test pattern.
6630 09:54:11.027685 Ending test lava.0_timesync-off (14407600_1.6.2.3.1), duration 0.06
6632 09:54:11.094024 + export TESTRUN_ID=1_kselftest-rtc
6633 09:54:11.097197 + TESTRUN_ID=1_kselftest-rtc
6634 09:54:11.100441 + cd /lava-14407600/0/tests/1_kselftest-rtc
6635 09:54:11.103960 ++ cat uuid
6636 09:54:11.106983 + UUID=14407600_1.6.2.3.5
6637 09:54:11.107060 + set +x
6638 09:54:11.110298 <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14407600_1.6.2.3.5>
6639 09:54:11.110545 Received signal: <STARTRUN> 1_kselftest-rtc 14407600_1.6.2.3.5
6640 09:54:11.110612 Starting test lava.1_kselftest-rtc (14407600_1.6.2.3.5)
6641 09:54:11.110686 Skipping test definition patterns.
6642 09:54:11.113894 + cd ./automated/linux/kselftest/
6643 09:54:11.143275 + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6644 09:54:11.168818 INFO: install_deps skipped
6645 09:54:11.659320 --2024-06-18 09:54:11-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6646 09:54:11.676557 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6647 09:54:11.800559 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6648 09:54:11.925235 HTTP request sent, awaiting response... 200 OK
6649 09:54:11.927801 Length: 1642672 (1.6M) [application/octet-stream]
6650 09:54:11.931613 Saving to: 'kselftest_armhf.tar.gz'
6651 09:54:11.931688
6652 09:54:11.931746
6653 09:54:12.172923 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6654 09:54:12.422804 kselftest_armhf.tar 2%[ ] 46.39K 187KB/s
6655 09:54:12.718775 kselftest_armhf.tar 13%[=> ] 213.25K 429KB/s
6656 09:54:12.844100 kselftest_armhf.tar 52%[=========> ] 846.75K 1.04MB/s
6657 09:54:12.850737 kselftest_armhf.tar 100%[===================>] 1.57M 1.70MB/s in 0.9s
6658 09:54:12.850823
6659 09:54:12.994896 2024-06-18 09:54:12 (1.70 MB/s) - 'kselftest_armhf.tar.gz' saved [1642672/1642672]
6660 09:54:12.995027
6661 09:54:17.151296 skiplist:
6662 09:54:17.154819 ========================================
6663 09:54:17.157876 ========================================
6664 09:54:17.202579 rtc:rtctest
6665 09:54:17.221261 ============== Tests to run ===============
6666 09:54:17.224449 rtc:rtctest
6667 09:54:17.227645 ===========End Tests to run ===============
6668 09:54:17.232650 shardfile-rtc pass
6669 09:54:17.336452 <12>[ 26.301540] kselftest: Running tests in rtc
6670 09:54:17.344842 TAP version 13
6671 09:54:17.358315 1..1
6672 09:54:17.385955 # selftests: rtc: rtctest
6673 09:54:17.844341 # TAP version 13
6674 09:54:17.844473 # 1..8
6675 09:54:17.847505 # # Starting 8 tests from 2 test cases.
6676 09:54:17.850990 # # RUN rtc.date_read ...
6677 09:54:17.857363 # # rtctest.c:49:date_read:Current RTC date/time is 18/06/2024 09:54:17.
6678 09:54:17.861058 # # OK rtc.date_read
6679 09:54:17.864522 # ok 1 rtc.date_read
6680 09:54:17.867593 # # RUN rtc.date_read_loop ...
6681 09:54:17.877556 # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).
6682 09:54:29.026664 <6>[ 37.994307] vaux18: disabling
6683 09:54:29.033937 <6>[ 38.001155] vio28: disabling
6684 09:54:48.049667 # # rtctest.c:115:date_read_loop:Performed 2674 RTC time reads.
6685 09:54:48.053118 # # OK rtc.date_read_loop
6686 09:54:48.056013 # ok 2 rtc.date_read_loop
6687 09:54:48.059766 # # RUN rtc.uie_read ...
6688 09:54:51.025899 # # OK rtc.uie_read
6689 09:54:51.029250 # ok 3 rtc.uie_read
6690 09:54:51.032751 # # RUN rtc.uie_select ...
6691 09:54:54.026571 # # OK rtc.uie_select
6692 09:54:54.029634 # ok 4 rtc.uie_select
6693 09:54:54.032828 # # RUN rtc.alarm_alm_set ...
6694 09:54:54.039613 # # rtctest.c:202:alarm_alm_set:Alarm time now set to 09:54:57.
6695 09:54:54.046083 # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)
6696 09:54:54.049051 # # alarm_alm_set: Test terminated by assertion
6697 09:54:54.052636 # # FAIL rtc.alarm_alm_set
6698 09:54:54.056016 # not ok 5 rtc.alarm_alm_set
6699 09:54:54.059247 # # RUN rtc.alarm_wkalm_set ...
6700 09:54:54.065712 # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 18/06/2024 09:54:57.
6701 09:54:57.029067 # # OK rtc.alarm_wkalm_set
6702 09:54:57.029191 # ok 6 rtc.alarm_wkalm_set
6703 09:54:57.035651 # # RUN rtc.alarm_alm_set_minute ...
6704 09:54:57.042039 # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 09:55:00.
6705 09:54:57.045079 # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)
6706 09:54:57.052197 # # alarm_alm_set_minute: Test terminated by assertion
6707 09:54:57.055109 # # FAIL rtc.alarm_alm_set_minute
6708 09:54:57.058160 # not ok 7 rtc.alarm_alm_set_minute
6709 09:54:57.064700 # # RUN rtc.alarm_wkalm_set_minute ...
6710 09:54:57.071306 # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 18/06/2024 09:55:00.
6711 09:55:00.030151 # # OK rtc.alarm_wkalm_set_minute
6712 09:55:00.033339 # ok 8 rtc.alarm_wkalm_set_minute
6713 09:55:00.036334 # # FAILED: 6 / 8 tests passed.
6714 09:55:00.039708 # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0
6715 09:55:00.043139 not ok 1 selftests: rtc: rtctest # exit=1
6716 09:55:01.567094 rtc_rtctest_rtc_date_read pass
6717 09:55:01.570172 rtc_rtctest_rtc_date_read_loop pass
6718 09:55:01.573462 rtc_rtctest_rtc_uie_read pass
6719 09:55:01.576883 rtc_rtctest_rtc_uie_select pass
6720 09:55:01.579942 rtc_rtctest_rtc_alarm_alm_set fail
6721 09:55:01.583156 rtc_rtctest_rtc_alarm_wkalm_set pass
6722 09:55:01.586463 rtc_rtctest_rtc_alarm_alm_set_minute fail
6723 09:55:01.589685 rtc_rtctest_rtc_alarm_wkalm_set_minute pass
6724 09:55:01.592822 rtc_rtctest fail
6725 09:55:01.660489 + ../../utils/send-to-lava.sh ./output/result.txt
6726 09:55:01.723370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>
6727 09:55:01.723640 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
6729 09:55:01.764484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>
6730 09:55:01.764742 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
6732 09:55:01.805207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>
6733 09:55:01.805460 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
6735 09:55:01.841496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>
6736 09:55:01.841805 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
6738 09:55:01.881584 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
6740 09:55:01.884788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>
6741 09:55:01.922577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>
6742 09:55:01.922824 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
6744 09:55:01.960256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>
6745 09:55:01.960527 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
6747 09:55:02.000850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>
6748 09:55:02.001103 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
6750 09:55:02.038613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>
6751 09:55:02.038934 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
6753 09:55:02.077756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>
6754 09:55:02.077836 + set +x
6755 09:55:02.078062 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
6757 09:55:02.084474 <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14407600_1.6.2.3.5>
6758 09:55:02.084715 Received signal: <ENDRUN> 1_kselftest-rtc 14407600_1.6.2.3.5
6759 09:55:02.084786 Ending use of test pattern.
6760 09:55:02.084841 Ending test lava.1_kselftest-rtc (14407600_1.6.2.3.5), duration 50.97
6762 09:55:02.087431 <LAVA_TEST_RUNNER EXIT>
6763 09:55:02.087670 ok: lava_test_shell seems to have completed
6764 09:55:02.087795 rtc_rtctest: fail
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
shardfile-rtc: pass
6765 09:55:02.087886 end: 3.1 lava-test-shell (duration 00:00:52) [common]
6766 09:55:02.087963 end: 3 lava-test-retry (duration 00:00:52) [common]
6767 09:55:02.088045 start: 4 finalize (timeout 00:07:21) [common]
6768 09:55:02.088124 start: 4.1 power-off (timeout 00:00:30) [common]
6769 09:55:02.088258 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
6770 09:55:04.166452 >> Command sent successfully.
6771 09:55:04.169541 Returned 0 in 2 seconds
6772 09:55:04.269885 end: 4.1 power-off (duration 00:00:02) [common]
6774 09:55:04.270161 start: 4.2 read-feedback (timeout 00:07:19) [common]
6775 09:55:04.270388 Listened to connection for namespace 'common' for up to 1s
6776 09:55:05.271329 Finalising connection for namespace 'common'
6777 09:55:05.271471 Disconnecting from shell: Finalise
6778 09:55:05.271550 / #
6779 09:55:05.371776 end: 4.2 read-feedback (duration 00:00:01) [common]
6780 09:55:05.371919 end: 4 finalize (duration 00:00:03) [common]
6781 09:55:05.372036 Cleaning after the job
6782 09:55:05.372136 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/ramdisk
6783 09:55:05.374293 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/kernel
6784 09:55:05.385447 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/dtb
6785 09:55:05.385650 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/nfsrootfs
6786 09:55:05.453092 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407600/tftp-deploy-tzehc4ln/modules
6787 09:55:05.459068 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407600
6788 09:55:06.032272 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407600
6789 09:55:06.032436 Job finished correctly