Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 51
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 89
1 09:28:14.443791 lava-dispatcher, installed at version: 2024.03
2 09:28:14.444068 start: 0 validate
3 09:28:14.444276 Start time: 2024-06-18 09:28:14.444263+00:00 (UTC)
4 09:28:14.444522 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:28:14.444781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:28:14.712945 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:28:14.713129 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 09:28:14.970653 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:28:14.970852 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 09:28:15.230539 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:28:15.230715 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:28:15.748926 Using caching service: 'http://localhost/cache/?uri=%s'
13 09:28:15.749130 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 09:28:16.007856 validate duration: 1.56
16 09:28:16.008201 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:28:16.008323 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:28:16.008422 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:28:16.008565 Not decompressing ramdisk as can be used compressed.
20 09:28:16.008664 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:28:16.008739 saving as /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/ramdisk/initrd.cpio.gz
22 09:28:16.008814 total size: 5628182 (5 MB)
23 09:28:16.010006 progress 0 % (0 MB)
24 09:28:16.011844 progress 5 % (0 MB)
25 09:28:16.013606 progress 10 % (0 MB)
26 09:28:16.015181 progress 15 % (0 MB)
27 09:28:16.016925 progress 20 % (1 MB)
28 09:28:16.018514 progress 25 % (1 MB)
29 09:28:16.020253 progress 30 % (1 MB)
30 09:28:16.021994 progress 35 % (1 MB)
31 09:28:16.023519 progress 40 % (2 MB)
32 09:28:16.025226 progress 45 % (2 MB)
33 09:28:16.026789 progress 50 % (2 MB)
34 09:28:16.028489 progress 55 % (2 MB)
35 09:28:16.030195 progress 60 % (3 MB)
36 09:28:16.031714 progress 65 % (3 MB)
37 09:28:16.033438 progress 70 % (3 MB)
38 09:28:16.034965 progress 75 % (4 MB)
39 09:28:16.036662 progress 80 % (4 MB)
40 09:28:16.038248 progress 85 % (4 MB)
41 09:28:16.039982 progress 90 % (4 MB)
42 09:28:16.041700 progress 95 % (5 MB)
43 09:28:16.043243 progress 100 % (5 MB)
44 09:28:16.043475 5 MB downloaded in 0.03 s (154.86 MB/s)
45 09:28:16.043646 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:28:16.043916 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:28:16.044018 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:28:16.044120 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:28:16.044275 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 09:28:16.044360 saving as /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/kernel/Image
52 09:28:16.044431 total size: 54813184 (52 MB)
53 09:28:16.044503 No compression specified
54 09:28:16.045666 progress 0 % (0 MB)
55 09:28:16.060906 progress 5 % (2 MB)
56 09:28:16.077255 progress 10 % (5 MB)
57 09:28:16.092836 progress 15 % (7 MB)
58 09:28:16.108504 progress 20 % (10 MB)
59 09:28:16.123967 progress 25 % (13 MB)
60 09:28:16.139288 progress 30 % (15 MB)
61 09:28:16.154712 progress 35 % (18 MB)
62 09:28:16.170173 progress 40 % (20 MB)
63 09:28:16.185416 progress 45 % (23 MB)
64 09:28:16.200795 progress 50 % (26 MB)
65 09:28:16.216251 progress 55 % (28 MB)
66 09:28:16.231445 progress 60 % (31 MB)
67 09:28:16.246891 progress 65 % (34 MB)
68 09:28:16.262119 progress 70 % (36 MB)
69 09:28:16.277557 progress 75 % (39 MB)
70 09:28:16.292922 progress 80 % (41 MB)
71 09:28:16.308135 progress 85 % (44 MB)
72 09:28:16.323965 progress 90 % (47 MB)
73 09:28:16.339614 progress 95 % (49 MB)
74 09:28:16.355820 progress 100 % (52 MB)
75 09:28:16.356191 52 MB downloaded in 0.31 s (167.68 MB/s)
76 09:28:16.356439 end: 1.2.1 http-download (duration 00:00:00) [common]
78 09:28:16.356971 end: 1.2 download-retry (duration 00:00:00) [common]
79 09:28:16.357114 start: 1.3 download-retry (timeout 00:10:00) [common]
80 09:28:16.357248 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 09:28:16.357446 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 09:28:16.357563 saving as /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 09:28:16.357671 total size: 57695 (0 MB)
84 09:28:16.357776 No compression specified
85 09:28:16.359617 progress 56 % (0 MB)
86 09:28:16.359955 progress 100 % (0 MB)
87 09:28:16.360217 0 MB downloaded in 0.00 s (21.64 MB/s)
88 09:28:16.360413 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:28:16.360729 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:28:16.360865 start: 1.4 download-retry (timeout 00:10:00) [common]
92 09:28:16.360997 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 09:28:16.361167 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:28:16.361276 saving as /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/nfsrootfs/full.rootfs.tar
95 09:28:16.361379 total size: 107552908 (102 MB)
96 09:28:16.361496 Using unxz to decompress xz
97 09:28:16.365557 progress 0 % (0 MB)
98 09:28:16.690598 progress 5 % (5 MB)
99 09:28:17.040364 progress 10 % (10 MB)
100 09:28:17.390265 progress 15 % (15 MB)
101 09:28:17.757233 progress 20 % (20 MB)
102 09:28:18.048241 progress 25 % (25 MB)
103 09:28:18.367671 progress 30 % (30 MB)
104 09:28:18.711520 progress 35 % (35 MB)
105 09:28:18.894982 progress 40 % (41 MB)
106 09:28:19.116560 progress 45 % (46 MB)
107 09:28:19.451984 progress 50 % (51 MB)
108 09:28:19.793678 progress 55 % (56 MB)
109 09:28:20.171295 progress 60 % (61 MB)
110 09:28:20.532829 progress 65 % (66 MB)
111 09:28:20.886782 progress 70 % (71 MB)
112 09:28:21.263871 progress 75 % (76 MB)
113 09:28:21.618534 progress 80 % (82 MB)
114 09:28:21.972542 progress 85 % (87 MB)
115 09:28:22.320715 progress 90 % (92 MB)
116 09:28:22.667608 progress 95 % (97 MB)
117 09:28:23.030130 progress 100 % (102 MB)
118 09:28:23.035895 102 MB downloaded in 6.67 s (15.37 MB/s)
119 09:28:23.036183 end: 1.4.1 http-download (duration 00:00:07) [common]
121 09:28:23.036494 end: 1.4 download-retry (duration 00:00:07) [common]
122 09:28:23.036601 start: 1.5 download-retry (timeout 00:09:53) [common]
123 09:28:23.036702 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 09:28:23.036872 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 09:28:23.036956 saving as /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/modules/modules.tar
126 09:28:23.037028 total size: 8619356 (8 MB)
127 09:28:23.037102 Using unxz to decompress xz
128 09:28:23.041263 progress 0 % (0 MB)
129 09:28:23.064305 progress 5 % (0 MB)
130 09:28:23.092506 progress 10 % (0 MB)
131 09:28:23.120789 progress 15 % (1 MB)
132 09:28:23.148343 progress 20 % (1 MB)
133 09:28:23.176916 progress 25 % (2 MB)
134 09:28:23.205347 progress 30 % (2 MB)
135 09:28:23.234949 progress 35 % (2 MB)
136 09:28:23.263636 progress 40 % (3 MB)
137 09:28:23.292361 progress 45 % (3 MB)
138 09:28:23.320388 progress 50 % (4 MB)
139 09:28:23.349138 progress 55 % (4 MB)
140 09:28:23.377670 progress 60 % (4 MB)
141 09:28:23.404451 progress 65 % (5 MB)
142 09:28:23.435919 progress 70 % (5 MB)
143 09:28:23.463968 progress 75 % (6 MB)
144 09:28:23.491664 progress 80 % (6 MB)
145 09:28:23.518705 progress 85 % (7 MB)
146 09:28:23.546382 progress 90 % (7 MB)
147 09:28:23.579163 progress 95 % (7 MB)
148 09:28:23.613538 progress 100 % (8 MB)
149 09:28:23.618900 8 MB downloaded in 0.58 s (14.13 MB/s)
150 09:28:23.619185 end: 1.5.1 http-download (duration 00:00:01) [common]
152 09:28:23.619508 end: 1.5 download-retry (duration 00:00:01) [common]
153 09:28:23.619620 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 09:28:23.619727 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 09:28:26.038743 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh
156 09:28:26.038957 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 09:28:26.039076 start: 1.6.2 lava-overlay (timeout 00:09:50) [common]
158 09:28:26.039265 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6
159 09:28:26.039429 makedir: /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin
160 09:28:26.039564 makedir: /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/tests
161 09:28:26.039682 makedir: /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/results
162 09:28:26.039797 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-add-keys
163 09:28:26.039968 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-add-sources
164 09:28:26.040130 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-background-process-start
165 09:28:26.040290 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-background-process-stop
166 09:28:26.040436 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-common-functions
167 09:28:26.040577 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-echo-ipv4
168 09:28:26.040743 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-install-packages
169 09:28:26.040883 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-installed-packages
170 09:28:26.041037 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-os-build
171 09:28:26.041193 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-probe-channel
172 09:28:26.041333 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-probe-ip
173 09:28:26.041480 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-target-ip
174 09:28:26.041620 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-target-mac
175 09:28:26.041760 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-target-storage
176 09:28:26.041901 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-case
177 09:28:26.042041 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-event
178 09:28:26.042198 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-feedback
179 09:28:26.042343 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-raise
180 09:28:26.042486 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-reference
181 09:28:26.042626 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-runner
182 09:28:26.042771 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-set
183 09:28:26.042920 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-test-shell
184 09:28:26.043079 Updating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-install-packages (oe)
185 09:28:26.043250 Updating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/bin/lava-installed-packages (oe)
186 09:28:26.043387 Creating /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/environment
187 09:28:26.043503 LAVA metadata
188 09:28:26.043580 - LAVA_JOB_ID=14407646
189 09:28:26.043652 - LAVA_DISPATCHER_IP=192.168.201.1
190 09:28:26.043768 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:50) [common]
191 09:28:26.043844 skipped lava-vland-overlay
192 09:28:26.043929 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 09:28:26.044019 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
194 09:28:26.044090 skipped lava-multinode-overlay
195 09:28:26.044172 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 09:28:26.044260 start: 1.6.2.3 test-definition (timeout 00:09:50) [common]
197 09:28:26.044343 Loading test definitions
198 09:28:26.044443 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:50) [common]
199 09:28:26.044524 Using /lava-14407646 at stage 0
200 09:28:26.044867 uuid=14407646_1.6.2.3.1 testdef=None
201 09:28:26.044970 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 09:28:26.045069 start: 1.6.2.3.2 test-overlay (timeout 00:09:50) [common]
203 09:28:26.045921 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 09:28:26.046175 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:50) [common]
206 09:28:26.046896 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 09:28:26.047156 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
209 09:28:26.047848 runner path: /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/0/tests/0_dmesg test_uuid 14407646_1.6.2.3.1
210 09:28:26.048025 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 09:28:26.048257 Creating lava-test-runner.conf files
213 09:28:26.048329 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407646/lava-overlay-h4npasn6/lava-14407646/0 for stage 0
214 09:28:26.048430 - 0_dmesg
215 09:28:26.048540 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 09:28:26.048636 start: 1.6.2.4 compress-overlay (timeout 00:09:50) [common]
217 09:28:26.055224 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 09:28:26.055358 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
219 09:28:26.055457 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 09:28:26.055554 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 09:28:26.055650 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
222 09:28:26.236258 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 09:28:26.236662 start: 1.6.4 extract-modules (timeout 00:09:50) [common]
224 09:28:26.236783 extracting modules file /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh
225 09:28:26.497911 extracting modules file /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407646/extract-overlay-ramdisk-sgjh6k2h/ramdisk
226 09:28:26.757621 end: 1.6.4 extract-modules (duration 00:00:01) [common]
227 09:28:26.757792 start: 1.6.5 apply-overlay-tftp (timeout 00:09:49) [common]
228 09:28:26.757901 [common] Applying overlay to NFS
229 09:28:26.757983 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407646/compress-overlay-4n2688o3/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh
230 09:28:26.765462 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 09:28:26.765609 start: 1.6.6 configure-preseed-file (timeout 00:09:49) [common]
232 09:28:26.765732 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 09:28:26.765841 start: 1.6.7 compress-ramdisk (timeout 00:09:49) [common]
234 09:28:26.765936 Building ramdisk /var/lib/lava/dispatcher/tmp/14407646/extract-overlay-ramdisk-sgjh6k2h/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407646/extract-overlay-ramdisk-sgjh6k2h/ramdisk
235 09:28:27.105351 >> 130466 blocks
236 09:28:29.336191 rename /var/lib/lava/dispatcher/tmp/14407646/extract-overlay-ramdisk-sgjh6k2h/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/ramdisk/ramdisk.cpio.gz
237 09:28:29.336832 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
238 09:28:29.337033 start: 1.6.8 prepare-kernel (timeout 00:09:47) [common]
239 09:28:29.337211 start: 1.6.8.1 prepare-fit (timeout 00:09:47) [common]
240 09:28:29.337401 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/kernel/Image']
241 09:28:44.350911 Returned 0 in 15 seconds
242 09:28:44.451557 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/kernel/image.itb
243 09:28:44.855068 output: FIT description: Kernel Image image with one or more FDT blobs
244 09:28:44.855498 output: Created: Tue Jun 18 10:28:44 2024
245 09:28:44.855590 output: Image 0 (kernel-1)
246 09:28:44.855666 output: Description:
247 09:28:44.855741 output: Created: Tue Jun 18 10:28:44 2024
248 09:28:44.855813 output: Type: Kernel Image
249 09:28:44.855884 output: Compression: lzma compressed
250 09:28:44.855955 output: Data Size: 13126726 Bytes = 12819.07 KiB = 12.52 MiB
251 09:28:44.856027 output: Architecture: AArch64
252 09:28:44.856097 output: OS: Linux
253 09:28:44.856162 output: Load Address: 0x00000000
254 09:28:44.856227 output: Entry Point: 0x00000000
255 09:28:44.856293 output: Hash algo: crc32
256 09:28:44.856358 output: Hash value: 4137a6e7
257 09:28:44.856424 output: Image 1 (fdt-1)
258 09:28:44.856536 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 09:28:44.856637 output: Created: Tue Jun 18 10:28:44 2024
260 09:28:44.856726 output: Type: Flat Device Tree
261 09:28:44.856791 output: Compression: uncompressed
262 09:28:44.856853 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 09:28:44.856917 output: Architecture: AArch64
264 09:28:44.856978 output: Hash algo: crc32
265 09:28:44.857040 output: Hash value: a9713552
266 09:28:44.857102 output: Image 2 (ramdisk-1)
267 09:28:44.857164 output: Description: unavailable
268 09:28:44.857226 output: Created: Tue Jun 18 10:28:44 2024
269 09:28:44.857288 output: Type: RAMDisk Image
270 09:28:44.857350 output: Compression: Unknown Compression
271 09:28:44.857412 output: Data Size: 18748945 Bytes = 18309.52 KiB = 17.88 MiB
272 09:28:44.857484 output: Architecture: AArch64
273 09:28:44.857547 output: OS: Linux
274 09:28:44.857608 output: Load Address: unavailable
275 09:28:44.857668 output: Entry Point: unavailable
276 09:28:44.857729 output: Hash algo: crc32
277 09:28:44.857789 output: Hash value: 5974179d
278 09:28:44.857850 output: Default Configuration: 'conf-1'
279 09:28:44.857911 output: Configuration 0 (conf-1)
280 09:28:44.857972 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 09:28:44.858033 output: Kernel: kernel-1
282 09:28:44.858094 output: Init Ramdisk: ramdisk-1
283 09:28:44.858155 output: FDT: fdt-1
284 09:28:44.858216 output: Loadables: kernel-1
285 09:28:44.858276 output:
286 09:28:44.858507 end: 1.6.8.1 prepare-fit (duration 00:00:16) [common]
287 09:28:44.858618 end: 1.6.8 prepare-kernel (duration 00:00:16) [common]
288 09:28:44.858738 end: 1.6 prepare-tftp-overlay (duration 00:00:21) [common]
289 09:28:44.858840 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:31) [common]
290 09:28:44.858927 No LXC device requested
291 09:28:44.859019 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 09:28:44.859118 start: 1.8 deploy-device-env (timeout 00:09:31) [common]
293 09:28:44.859208 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 09:28:44.859287 Checking files for TFTP limit of 4294967296 bytes.
295 09:28:44.859873 end: 1 tftp-deploy (duration 00:00:29) [common]
296 09:28:44.859999 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 09:28:44.860109 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 09:28:44.860247 substitutions:
299 09:28:44.860324 - {DTB}: 14407646/tftp-deploy-20cyu2ei/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 09:28:44.860397 - {INITRD}: 14407646/tftp-deploy-20cyu2ei/ramdisk/ramdisk.cpio.gz
301 09:28:44.860465 - {KERNEL}: 14407646/tftp-deploy-20cyu2ei/kernel/Image
302 09:28:44.860532 - {LAVA_MAC}: None
303 09:28:44.860601 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh
304 09:28:44.860666 - {NFS_SERVER_IP}: 192.168.201.1
305 09:28:44.860732 - {PRESEED_CONFIG}: None
306 09:28:44.860796 - {PRESEED_LOCAL}: None
307 09:28:44.860859 - {RAMDISK}: 14407646/tftp-deploy-20cyu2ei/ramdisk/ramdisk.cpio.gz
308 09:28:44.860923 - {ROOT_PART}: None
309 09:28:44.860992 - {ROOT}: None
310 09:28:44.861056 - {SERVER_IP}: 192.168.201.1
311 09:28:44.861119 - {TEE}: None
312 09:28:44.861182 Parsed boot commands:
313 09:28:44.861244 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 09:28:44.861467 Parsed boot commands: tftpboot 192.168.201.1 14407646/tftp-deploy-20cyu2ei/kernel/image.itb 14407646/tftp-deploy-20cyu2ei/kernel/cmdline
315 09:28:44.861570 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 09:28:44.861672 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 09:28:44.861781 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 09:28:44.861876 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 09:28:44.861957 Not connected, no need to disconnect.
320 09:28:44.862044 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 09:28:44.862135 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 09:28:44.862213 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
323 09:28:44.865957 Setting prompt string to ['lava-test: # ']
324 09:28:44.866420 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 09:28:44.866551 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 09:28:44.866669 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 09:28:44.866775 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 09:28:44.866985 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
329 09:28:55.289529 Returned 0 in 10 seconds
330 09:28:55.390235 end: 2.2.2.1 pdu-reboot (duration 00:00:11) [common]
332 09:28:55.390622 end: 2.2.2 reset-device (duration 00:00:11) [common]
333 09:28:55.390748 start: 2.2.3 depthcharge-start (timeout 00:04:49) [common]
334 09:28:55.390853 Setting prompt string to 'Starting depthcharge on Juniper...'
335 09:28:55.390935 Changing prompt to 'Starting depthcharge on Juniper...'
336 09:28:55.391027 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
337 09:28:55.391607 [Enter `^Ec?' for help]
338 09:28:55.391735 [DL] 00000000 00000000 010701
339 09:28:55.391845
340 09:28:55.391961
341 09:28:55.392077 F0: 102B 0000
342 09:28:55.392193
343 09:28:55.392297 F3: 1006 0033 [0200]
344 09:28:55.392404
345 09:28:55.392511 F3: 4001 00E0 [0200]
346 09:28:55.392581
347 09:28:55.392647 F3: 0000 0000
348 09:28:55.392741
349 09:28:55.392849 V0: 0000 0000 [0001]
350 09:28:55.392948
351 09:28:55.393045 00: 1027 0002
352 09:28:55.393162
353 09:28:55.393273 01: 0000 0000
354 09:28:55.393375
355 09:28:55.393486 BP: 0C00 0251 [0000]
356 09:28:55.393580
357 09:28:55.393682 G0: 1182 0000
358 09:28:55.393780
359 09:28:55.393887 EC: 0004 0000 [0001]
360 09:28:55.393993
361 09:28:55.394091 S7: 0000 0000 [0000]
362 09:28:55.394201
363 09:28:55.394307 CC: 0000 0000 [0001]
364 09:28:55.394413
365 09:28:55.394523 T0: 0000 00DB [000F]
366 09:28:55.394631
367 09:28:55.394735 Jump to BL
368 09:28:55.394833
369 09:28:55.394928
370 09:28:55.395024
371 09:28:55.395122 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
372 09:28:55.395222 ARM64: Exception handlers installed.
373 09:28:55.395324 ARM64: Testing exception
374 09:28:55.395424 ARM64: Done test exception
375 09:28:55.395520 WDT: Last reset was cold boot
376 09:28:55.395629 SPI0(PAD0) initialized at 992727 Hz
377 09:28:55.395736 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
378 09:28:55.395838 Manufacturer: ef
379 09:28:55.395945 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
380 09:28:55.396045 Probing TPM: . done!
381 09:28:55.396153 TPM ready after 0 ms
382 09:28:55.396263 Connected to device vid:did:rid of 1ae0:0028:00
383 09:28:55.396363 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
384 09:28:55.396471 Initialized TPM device CR50 revision 0
385 09:28:55.396539 tlcl_send_startup: Startup return code is 0
386 09:28:55.396604 TPM: setup succeeded
387 09:28:55.396685 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
388 09:28:55.396777 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
389 09:28:55.396885 in-header: 03 19 00 00 08 00 00 00
390 09:28:55.396989 in-data: a2 e0 47 00 13 00 00 00
391 09:28:55.397100 Chrome EC: UHEPI supported
392 09:28:55.397207 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
393 09:28:55.397315 in-header: 03 a1 00 00 08 00 00 00
394 09:28:55.397415 in-data: 84 60 60 10 00 00 00 00
395 09:28:55.397498 Phase 1
396 09:28:55.397604 FMAP: area GBB found @ 3f5000 (12032 bytes)
397 09:28:55.397703 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
398 09:28:55.397801 VB2:vb2_check_recovery() Recovery was requested manually
399 09:28:55.397898 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
400 09:28:55.397994 Recovery requested (1009000e)
401 09:28:55.398090 tlcl_extend: response is 0
402 09:28:55.398187 tlcl_extend: response is 0
403 09:28:55.398282
404 09:28:55.398387
405 09:28:55.398495 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
406 09:28:55.398594 ARM64: Exception handlers installed.
407 09:28:55.398690 ARM64: Testing exception
408 09:28:55.398786 ARM64: Done test exception
409 09:28:55.398883 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x202c
410 09:28:55.398995 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
411 09:28:55.399094 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
412 09:28:55.399201 [RTC]rtc_get_frequency_meter,134: input=0xf, output=864
413 09:28:55.399299 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
414 09:28:55.399396 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
415 09:28:55.399502 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
416 09:28:55.399607 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
417 09:28:55.399721 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
418 09:28:55.399831 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
419 09:28:55.399930 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
420 09:28:55.400034 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
421 09:28:55.400132 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
422 09:28:55.400228 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
423 09:28:55.400324 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
424 09:28:55.400422 in-header: 03 19 00 00 08 00 00 00
425 09:28:55.400518 in-data: a2 e0 47 00 13 00 00 00
426 09:28:55.400614 Chrome EC: UHEPI supported
427 09:28:55.400711 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
428 09:28:55.400809 in-header: 03 a1 00 00 08 00 00 00
429 09:28:55.400905 in-data: 84 60 60 10 00 00 00 00
430 09:28:55.401000 Skip loading cached calibration data
431 09:28:55.401098 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
432 09:28:55.401195 in-header: 03 a1 00 00 08 00 00 00
433 09:28:55.401291 in-data: 84 60 60 10 00 00 00 00
434 09:28:55.401388 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
435 09:28:55.401488 in-header: 03 a1 00 00 08 00 00 00
436 09:28:55.401570 in-data: 84 60 60 10 00 00 00 00
437 09:28:55.401675 ADC[3]: Raw value=215404 ID=1
438 09:28:55.401772 Manufacturer: ef
439 09:28:55.401871 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
440 09:28:55.401945 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
441 09:28:55.402017 CBFS @ 21000 size 3d4000
442 09:28:55.402082 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
443 09:28:55.402155 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
444 09:28:55.402239 CBFS: Found @ offset 3c700 size 44
445 09:28:55.402320 DRAM-K: Full Calibration
446 09:28:55.402386 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
447 09:28:55.402494 CBFS @ 21000 size 3d4000
448 09:28:55.402604 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
449 09:28:55.402710 CBFS: Locating 'fallback/dram'
450 09:28:55.402815 CBFS: Found @ offset 24b00 size 12268
451 09:28:55.402921 read SPI 0x45b44 0x1224c: 22773 us, 3263 KB/s, 26.104 Mbps
452 09:28:55.403019 ddr_geometry: 1, config: 0x0
453 09:28:55.403129 header.status = 0x0
454 09:28:55.403227 header.magic = 0x44524d4b (expected: 0x44524d4b)
455 09:28:55.403330 header.version = 0x5 (expected: 0x5)
456 09:28:55.403652 header.size = 0x8f0 (expected: 0x8f0)
457 09:28:55.403760 header.config = 0x0
458 09:28:55.403858 header.flags = 0x0
459 09:28:55.403955 header.checksum = 0x0
460 09:28:55.404061 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
461 09:28:55.404164 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
462 09:28:55.404267 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
463 09:28:55.404378 ddr_geometry:1
464 09:28:55.404479 [EMI] new MDL number = 1
465 09:28:55.404559 dram_cbt_mode_extern: 0
466 09:28:55.404664 dram_cbt_mode [RK0]: 0, [RK1]: 0
467 09:28:55.404778 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
468 09:28:55.404882
469 09:28:55.404986
470 09:28:55.405082 [Bianco] ETT version 0.0.0.1
471 09:28:55.405194 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
472 09:28:55.405293
473 09:28:55.405390 vSetVcoreByFreq with vcore:762500, freq=1600
474 09:28:55.405509
475 09:28:55.405576 [DramcInit]
476 09:28:55.405640 AutoRefreshCKEOff AutoREF OFF
477 09:28:55.405718 DDRPhyPLLSetting-CKEOFF
478 09:28:55.405823 DDRPhyPLLSetting-CKEON
479 09:28:55.405919
480 09:28:55.406023 Enable WDQS
481 09:28:55.406119 [ModeRegInit_LP4] CH0 RK0
482 09:28:55.406215 Write Rank0 MR13 =0x18
483 09:28:55.406311 Write Rank0 MR12 =0x5d
484 09:28:55.406406 Write Rank0 MR1 =0x56
485 09:28:55.406501 Write Rank0 MR2 =0x1a
486 09:28:55.406597 Write Rank0 MR11 =0x0
487 09:28:55.406692 Write Rank0 MR22 =0x38
488 09:28:55.406788 Write Rank0 MR14 =0x5d
489 09:28:55.406883 Write Rank0 MR3 =0x30
490 09:28:55.406977 Write Rank0 MR13 =0x58
491 09:28:55.407073 Write Rank0 MR12 =0x5d
492 09:28:55.407168 Write Rank0 MR1 =0x56
493 09:28:55.407263 Write Rank0 MR2 =0x2d
494 09:28:55.407358 Write Rank0 MR11 =0x23
495 09:28:55.407453 Write Rank0 MR22 =0x34
496 09:28:55.407548 Write Rank0 MR14 =0x10
497 09:28:55.407643 Write Rank0 MR3 =0x30
498 09:28:55.407738 Write Rank0 MR13 =0xd8
499 09:28:55.407833 [ModeRegInit_LP4] CH0 RK1
500 09:28:55.407928 Write Rank1 MR13 =0x18
501 09:28:55.408023 Write Rank1 MR12 =0x5d
502 09:28:55.408118 Write Rank1 MR1 =0x56
503 09:28:55.408213 Write Rank1 MR2 =0x1a
504 09:28:55.408308 Write Rank1 MR11 =0x0
505 09:28:55.408413 Write Rank1 MR22 =0x38
506 09:28:55.408515 Write Rank1 MR14 =0x5d
507 09:28:55.408582 Write Rank1 MR3 =0x30
508 09:28:55.408680 Write Rank1 MR13 =0x58
509 09:28:55.408786 Write Rank1 MR12 =0x5d
510 09:28:55.408883 Write Rank1 MR1 =0x56
511 09:28:55.408988 Write Rank1 MR2 =0x2d
512 09:28:55.409099 Write Rank1 MR11 =0x23
513 09:28:55.409200 Write Rank1 MR22 =0x34
514 09:28:55.409304 Write Rank1 MR14 =0x10
515 09:28:55.409402 Write Rank1 MR3 =0x30
516 09:28:55.409534 Write Rank1 MR13 =0xd8
517 09:28:55.409617 [ModeRegInit_LP4] CH1 RK0
518 09:28:55.409683 Write Rank0 MR13 =0x18
519 09:28:55.409748 Write Rank0 MR12 =0x5d
520 09:28:55.409834 Write Rank0 MR1 =0x56
521 09:28:55.409911 Write Rank0 MR2 =0x1a
522 09:28:55.409975 Write Rank0 MR11 =0x0
523 09:28:55.410082 Write Rank0 MR22 =0x38
524 09:28:55.410186 Write Rank0 MR14 =0x5d
525 09:28:55.410299 Write Rank0 MR3 =0x30
526 09:28:55.410408 Write Rank0 MR13 =0x58
527 09:28:55.410509 Write Rank0 MR12 =0x5d
528 09:28:55.410614 Write Rank0 MR1 =0x56
529 09:28:55.410730 Write Rank0 MR2 =0x2d
530 09:28:55.410828 Write Rank0 MR11 =0x23
531 09:28:55.410932 Write Rank0 MR22 =0x34
532 09:28:55.411037 Write Rank0 MR14 =0x10
533 09:28:55.411148 Write Rank0 MR3 =0x30
534 09:28:55.411246 Write Rank0 MR13 =0xd8
535 09:28:55.411350 [ModeRegInit_LP4] CH1 RK1
536 09:28:55.411460 Write Rank1 MR13 =0x18
537 09:28:55.411557 Write Rank1 MR12 =0x5d
538 09:28:55.411660 Write Rank1 MR1 =0x56
539 09:28:55.411764 Write Rank1 MR2 =0x1a
540 09:28:55.411860 Write Rank1 MR11 =0x0
541 09:28:55.411969 Write Rank1 MR22 =0x38
542 09:28:55.412073 Write Rank1 MR14 =0x5d
543 09:28:55.412171 Write Rank1 MR3 =0x30
544 09:28:55.412266 Write Rank1 MR13 =0x58
545 09:28:55.412362 Write Rank1 MR12 =0x5d
546 09:28:55.412457 Write Rank1 MR1 =0x56
547 09:28:55.412553 Write Rank1 MR2 =0x2d
548 09:28:55.412648 Write Rank1 MR11 =0x23
549 09:28:55.412753 Write Rank1 MR22 =0x34
550 09:28:55.412857 Write Rank1 MR14 =0x10
551 09:28:55.412952 Write Rank1 MR3 =0x30
552 09:28:55.413048 Write Rank1 MR13 =0xd8
553 09:28:55.413152 match AC timing 3
554 09:28:55.413251 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
555 09:28:55.413351 [MiockJmeterHQA]
556 09:28:55.413457 vSetVcoreByFreq with vcore:762500, freq=1600
557 09:28:55.413524
558 09:28:55.413588 MIOCK jitter meter ch=0
559 09:28:55.413650
560 09:28:55.413713 1T = (101-17) = 84 dly cells
561 09:28:55.413778 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
562 09:28:55.413843 vSetVcoreByFreq with vcore:725000, freq=1200
563 09:28:55.413906
564 09:28:55.413969 MIOCK jitter meter ch=0
565 09:28:55.414031
566 09:28:55.414093 1T = (96-16) = 80 dly cells
567 09:28:55.414157 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
568 09:28:55.414221 vSetVcoreByFreq with vcore:725000, freq=800
569 09:28:55.414283
570 09:28:55.414366 MIOCK jitter meter ch=0
571 09:28:55.414431
572 09:28:55.414493 1T = (96-16) = 80 dly cells
573 09:28:55.414557 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
574 09:28:55.414621 vSetVcoreByFreq with vcore:762500, freq=1600
575 09:28:55.414683 vSetVcoreByFreq with vcore:762500, freq=1600
576 09:28:55.414759
577 09:28:55.414825 K DRVP
578 09:28:55.414906 1. OCD DRVP=0 CALOUT=0
579 09:28:55.414973 1. OCD DRVP=1 CALOUT=0
580 09:28:55.415037 1. OCD DRVP=2 CALOUT=0
581 09:28:55.415101 1. OCD DRVP=3 CALOUT=0
582 09:28:55.415166 1. OCD DRVP=4 CALOUT=0
583 09:28:55.415280 1. OCD DRVP=5 CALOUT=0
584 09:28:55.415380 1. OCD DRVP=6 CALOUT=0
585 09:28:55.415487 1. OCD DRVP=7 CALOUT=0
586 09:28:55.415589 1. OCD DRVP=8 CALOUT=1
587 09:28:55.415701
588 09:28:55.415788 1. OCD DRVP calibration OK! DRVP=8
589 09:28:55.415855
590 09:28:55.415928
591 09:28:55.415994
592 09:28:55.416060 K ODTN
593 09:28:55.416176 3. OCD ODTN=0 ,CALOUT=1
594 09:28:55.416297 3. OCD ODTN=1 ,CALOUT=1
595 09:28:55.416406 3. OCD ODTN=2 ,CALOUT=1
596 09:28:55.416520 3. OCD ODTN=3 ,CALOUT=1
597 09:28:55.416637 3. OCD ODTN=4 ,CALOUT=1
598 09:28:55.416754 3. OCD ODTN=5 ,CALOUT=1
599 09:28:55.416876 3. OCD ODTN=6 ,CALOUT=1
600 09:28:55.416980 3. OCD ODTN=7 ,CALOUT=0
601 09:28:55.417080
602 09:28:55.417178 3. OCD ODTN calibration OK! ODTN=7
603 09:28:55.417277
604 09:28:55.417382 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
605 09:28:55.417491 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
606 09:28:55.417591 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
607 09:28:55.417688
608 09:28:55.417784 K DRVP
609 09:28:55.417880 1. OCD DRVP=0 CALOUT=0
610 09:28:55.417979 1. OCD DRVP=1 CALOUT=0
611 09:28:55.418077 1. OCD DRVP=2 CALOUT=0
612 09:28:55.418176 1. OCD DRVP=3 CALOUT=0
613 09:28:55.418274 1. OCD DRVP=4 CALOUT=0
614 09:28:55.418380 1. OCD DRVP=5 CALOUT=0
615 09:28:55.418484 1. OCD DRVP=6 CALOUT=0
616 09:28:55.418558 1. OCD DRVP=7 CALOUT=0
617 09:28:55.418623 1. OCD DRVP=8 CALOUT=0
618 09:28:55.418698 1. OCD DRVP=9 CALOUT=0
619 09:28:55.418766 1. OCD DRVP=10 CALOUT=1
620 09:28:55.418830
621 09:28:55.419105 1. OCD DRVP calibration OK! DRVP=10
622 09:28:55.419219
623 09:28:55.419325
624 09:28:55.419421
625 09:28:55.419517 K ODTN
626 09:28:55.419622 3. OCD ODTN=0 ,CALOUT=1
627 09:28:55.419730 3. OCD ODTN=1 ,CALOUT=1
628 09:28:55.419830 3. OCD ODTN=2 ,CALOUT=1
629 09:28:55.419928 3. OCD ODTN=3 ,CALOUT=1
630 09:28:55.420026 3. OCD ODTN=4 ,CALOUT=1
631 09:28:55.420124 3. OCD ODTN=5 ,CALOUT=1
632 09:28:55.420221 3. OCD ODTN=6 ,CALOUT=1
633 09:28:55.420329 3. OCD ODTN=7 ,CALOUT=1
634 09:28:55.420427 3. OCD ODTN=8 ,CALOUT=1
635 09:28:55.420525 3. OCD ODTN=9 ,CALOUT=1
636 09:28:55.420623 3. OCD ODTN=10 ,CALOUT=1
637 09:28:55.420722 3. OCD ODTN=11 ,CALOUT=1
638 09:28:55.420822 3. OCD ODTN=12 ,CALOUT=1
639 09:28:55.420930 3. OCD ODTN=13 ,CALOUT=1
640 09:28:55.421028 3. OCD ODTN=14 ,CALOUT=1
641 09:28:55.421125 3. OCD ODTN=15 ,CALOUT=0
642 09:28:55.421223
643 09:28:55.421318 3. OCD ODTN calibration OK! ODTN=15
644 09:28:55.421416
645 09:28:55.421496 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
646 09:28:55.421561 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
647 09:28:55.421625 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
648 09:28:55.421714
649 09:28:55.421779 [DramcInit]
650 09:28:55.421849 AutoRefreshCKEOff AutoREF OFF
651 09:28:55.421940 DDRPhyPLLSetting-CKEOFF
652 09:28:55.422006 DDRPhyPLLSetting-CKEON
653 09:28:55.422069
654 09:28:55.422132 Enable WDQS
655 09:28:55.422194 ==
656 09:28:55.422257 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
657 09:28:55.422321 fsp= 1, odt_onoff= 1, Byte mode= 0
658 09:28:55.422385 ==
659 09:28:55.422466 [Duty_Offset_Calibration]
660 09:28:55.422529
661 09:28:55.422592 ===========================
662 09:28:55.422655 B0:1 B1:-1 CA:0
663 09:28:55.422733 ==
664 09:28:55.422797 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
665 09:28:55.422874 fsp= 1, odt_onoff= 1, Byte mode= 0
666 09:28:55.422941 ==
667 09:28:55.423046 [Duty_Offset_Calibration]
668 09:28:55.423154
669 09:28:55.423260 ===========================
670 09:28:55.423358 B0:0 B1:0 CA:0
671 09:28:55.423462 [ModeRegInit_LP4] CH0 RK0
672 09:28:55.423558 Write Rank0 MR13 =0x18
673 09:28:55.423654 Write Rank0 MR12 =0x5d
674 09:28:55.423758 Write Rank0 MR1 =0x56
675 09:28:55.423864 Write Rank0 MR2 =0x1a
676 09:28:55.423960 Write Rank0 MR11 =0x0
677 09:28:55.424065 Write Rank0 MR22 =0x38
678 09:28:55.424161 Write Rank0 MR14 =0x5d
679 09:28:55.424256 Write Rank0 MR3 =0x30
680 09:28:55.424366 Write Rank0 MR13 =0x58
681 09:28:55.424466 Write Rank0 MR12 =0x5d
682 09:28:55.424539 Write Rank0 MR1 =0x56
683 09:28:55.424603 Write Rank0 MR2 =0x2d
684 09:28:55.424684 Write Rank0 MR11 =0x23
685 09:28:55.424749 Write Rank0 MR22 =0x34
686 09:28:55.424811 Write Rank0 MR14 =0x10
687 09:28:55.424874 Write Rank0 MR3 =0x30
688 09:28:55.424985 Write Rank0 MR13 =0xd8
689 09:28:55.425083 [ModeRegInit_LP4] CH0 RK1
690 09:28:55.425193 Write Rank1 MR13 =0x18
691 09:28:55.425298 Write Rank1 MR12 =0x5d
692 09:28:55.425416 Write Rank1 MR1 =0x56
693 09:28:55.425526 Write Rank1 MR2 =0x1a
694 09:28:55.425630 Write Rank1 MR11 =0x0
695 09:28:55.425732 Write Rank1 MR22 =0x38
696 09:28:55.425801 Write Rank1 MR14 =0x5d
697 09:28:55.425865 Write Rank1 MR3 =0x30
698 09:28:55.425928 Write Rank1 MR13 =0x58
699 09:28:55.425991 Write Rank1 MR12 =0x5d
700 09:28:55.426053 Write Rank1 MR1 =0x56
701 09:28:55.426116 Write Rank1 MR2 =0x2d
702 09:28:55.426178 Write Rank1 MR11 =0x23
703 09:28:55.426241 Write Rank1 MR22 =0x34
704 09:28:55.426304 Write Rank1 MR14 =0x10
705 09:28:55.426366 Write Rank1 MR3 =0x30
706 09:28:55.426448 Write Rank1 MR13 =0xd8
707 09:28:55.426512 [ModeRegInit_LP4] CH1 RK0
708 09:28:55.426583 Write Rank0 MR13 =0x18
709 09:28:55.426683 Write Rank0 MR12 =0x5d
710 09:28:55.426778 Write Rank0 MR1 =0x56
711 09:28:55.426873 Write Rank0 MR2 =0x1a
712 09:28:55.426968 Write Rank0 MR11 =0x0
713 09:28:55.427062 Write Rank0 MR22 =0x38
714 09:28:55.427157 Write Rank0 MR14 =0x5d
715 09:28:55.427252 Write Rank0 MR3 =0x30
716 09:28:55.427357 Write Rank0 MR13 =0x58
717 09:28:55.427453 Write Rank0 MR12 =0x5d
718 09:28:55.427548 Write Rank0 MR1 =0x56
719 09:28:55.427643 Write Rank0 MR2 =0x2d
720 09:28:55.427738 Write Rank0 MR11 =0x23
721 09:28:55.427833 Write Rank0 MR22 =0x34
722 09:28:55.427928 Write Rank0 MR14 =0x10
723 09:28:55.428023 Write Rank0 MR3 =0x30
724 09:28:55.428118 Write Rank0 MR13 =0xd8
725 09:28:55.428213 [ModeRegInit_LP4] CH1 RK1
726 09:28:55.428308 Write Rank1 MR13 =0x18
727 09:28:55.428403 Write Rank1 MR12 =0x5d
728 09:28:55.428498 Write Rank1 MR1 =0x56
729 09:28:55.428593 Write Rank1 MR2 =0x1a
730 09:28:55.428697 Write Rank1 MR11 =0x0
731 09:28:55.428802 Write Rank1 MR22 =0x38
732 09:28:55.428898 Write Rank1 MR14 =0x5d
733 09:28:55.428993 Write Rank1 MR3 =0x30
734 09:28:55.429088 Write Rank1 MR13 =0x58
735 09:28:55.429188 Write Rank1 MR12 =0x5d
736 09:28:55.429287 Write Rank1 MR1 =0x56
737 09:28:55.429390 Write Rank1 MR2 =0x2d
738 09:28:55.429498 Write Rank1 MR11 =0x23
739 09:28:55.429569 Write Rank1 MR22 =0x34
740 09:28:55.429668 Write Rank1 MR14 =0x10
741 09:28:55.429733 Write Rank1 MR3 =0x30
742 09:28:55.429797 Write Rank1 MR13 =0xd8
743 09:28:55.429860 match AC timing 3
744 09:28:55.429951 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
745 09:28:55.430020 DramC Write-DBI off
746 09:28:55.430083 DramC Read-DBI off
747 09:28:55.430146 Write Rank0 MR13 =0x59
748 09:28:55.430209 ==
749 09:28:55.430271 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
750 09:28:55.430335 fsp= 1, odt_onoff= 1, Byte mode= 0
751 09:28:55.430398 ==
752 09:28:55.430461 === u2Vref_new: 0x56 --> 0x2d
753 09:28:55.430535 === u2Vref_new: 0x58 --> 0x38
754 09:28:55.430603 === u2Vref_new: 0x5a --> 0x39
755 09:28:55.430666 === u2Vref_new: 0x5c --> 0x3c
756 09:28:55.430729 === u2Vref_new: 0x5e --> 0x3d
757 09:28:55.430792 === u2Vref_new: 0x60 --> 0xa0
758 09:28:55.430854 [CA 0] Center 34 (6~63) winsize 58
759 09:28:55.430929 [CA 1] Center 35 (7~63) winsize 57
760 09:28:55.430994 [CA 2] Center 28 (-1~58) winsize 60
761 09:28:55.431057 [CA 3] Center 24 (-3~51) winsize 55
762 09:28:55.431120 [CA 4] Center 25 (-3~53) winsize 57
763 09:28:55.431201 [CA 5] Center 29 (0~59) winsize 60
764 09:28:55.431265
765 09:28:55.431327 [CATrainingPosCal] consider 1 rank data
766 09:28:55.431395 u2DelayCellTimex100 = 744/100 ps
767 09:28:55.431501 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
768 09:28:55.431610 CA1 delay=35 (7~63),Diff = 11 PI (14 cell)
769 09:28:55.431714 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
770 09:28:55.431811 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
771 09:28:55.431922 CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)
772 09:28:55.432027 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
773 09:28:55.432124
774 09:28:55.432220 CA PerBit enable=1, Macro0, CA PI delay=24
775 09:28:55.432316 === u2Vref_new: 0x5e --> 0x3d
776 09:28:55.432420
777 09:28:55.432520 Vref(ca) range 1: 30
778 09:28:55.432602
779 09:28:55.432679 CS Dly= 8 (39-0-32)
780 09:28:55.432789 Write Rank0 MR13 =0xd8
781 09:28:55.432887 Write Rank0 MR13 =0xd8
782 09:28:55.432997 Write Rank0 MR12 =0x5e
783 09:28:55.433095 Write Rank1 MR13 =0x59
784 09:28:55.433190 ==
785 09:28:55.433510 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
786 09:28:55.433611 fsp= 1, odt_onoff= 1, Byte mode= 0
787 09:28:55.433714 ==
788 09:28:55.433823 === u2Vref_new: 0x56 --> 0x2d
789 09:28:55.433926 === u2Vref_new: 0x58 --> 0x38
790 09:28:55.434035 === u2Vref_new: 0x5a --> 0x39
791 09:28:55.434142 === u2Vref_new: 0x5c --> 0x3c
792 09:28:55.434249 === u2Vref_new: 0x5e --> 0x3d
793 09:28:55.434355 === u2Vref_new: 0x60 --> 0xa0
794 09:28:55.434466 [CA 0] Center 35 (8~63) winsize 56
795 09:28:55.434580 [CA 1] Center 35 (8~63) winsize 56
796 09:28:55.434687 [CA 2] Center 28 (-1~58) winsize 60
797 09:28:55.434793 [CA 3] Center 22 (-6~51) winsize 58
798 09:28:55.434898 [CA 4] Center 23 (-5~51) winsize 57
799 09:28:55.435003 [CA 5] Center 29 (0~59) winsize 60
800 09:28:55.435100
801 09:28:55.435204 [CATrainingPosCal] consider 2 rank data
802 09:28:55.435313 u2DelayCellTimex100 = 744/100 ps
803 09:28:55.435421 CA0 delay=35 (8~63),Diff = 11 PI (14 cell)
804 09:28:55.435526 CA1 delay=35 (8~63),Diff = 11 PI (14 cell)
805 09:28:55.435637 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
806 09:28:55.435736 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
807 09:28:55.435841 CA4 delay=24 (-3~51),Diff = 0 PI (0 cell)
808 09:28:55.435943 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
809 09:28:55.436039
810 09:28:55.436135 CA PerBit enable=1, Macro0, CA PI delay=24
811 09:28:55.436239 === u2Vref_new: 0x5e --> 0x3d
812 09:28:55.436336
813 09:28:55.436432 Vref(ca) range 1: 30
814 09:28:55.436530
815 09:28:55.436636 CS Dly= 6 (37-0-32)
816 09:28:55.436732 Write Rank1 MR13 =0xd8
817 09:28:55.436843 Write Rank1 MR13 =0xd8
818 09:28:55.436940 Write Rank1 MR12 =0x5e
819 09:28:55.437041 [RankSwap] Rank num 2, (Multi 1), Rank 0
820 09:28:55.437149 Write Rank0 MR2 =0xad
821 09:28:55.437250 [Write Leveling]
822 09:28:55.437362 delay byte0 byte1 byte2 byte3
823 09:28:55.437485
824 09:28:55.437588 10 0 0
825 09:28:55.437691 11 0 0
826 09:28:55.437791 12 0 0
827 09:28:55.437900 13 0 0
828 09:28:55.438007 14 0 0
829 09:28:55.438116 15 0 0
830 09:28:55.438223 16 0 0
831 09:28:55.438329 17 0 0
832 09:28:55.438436 18 0 0
833 09:28:55.438542 19 0 0
834 09:28:55.438655 20 0 0
835 09:28:55.438762 21 0 0
836 09:28:55.438862 22 0 0
837 09:28:55.438966 23 0 0
838 09:28:55.439082 24 0 0
839 09:28:55.439186 25 0 0
840 09:28:55.439296 26 0 0
841 09:28:55.439402 27 0 ff
842 09:28:55.439502 28 0 ff
843 09:28:55.439609 29 0 ff
844 09:28:55.439720 30 0 ff
845 09:28:55.439827 31 ff ff
846 09:28:55.439933 32 ff ff
847 09:28:55.440040 33 ff ff
848 09:28:55.440147 34 ff ff
849 09:28:55.440259 35 ff ff
850 09:28:55.440362 36 ff ff
851 09:28:55.440470 37 ff ff
852 09:28:55.440579 pass bytecount = 0xff (0xff: all bytes pass)
853 09:28:55.440686
854 09:28:55.440796 DQS0 dly: 31
855 09:28:55.440893 DQS1 dly: 27
856 09:28:55.440999 Write Rank0 MR2 =0x2d
857 09:28:55.441108 [RankSwap] Rank num 2, (Multi 1), Rank 0
858 09:28:55.441223 Write Rank0 MR1 =0xd6
859 09:28:55.441330 [Gating]
860 09:28:55.441426 ==
861 09:28:55.441540 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
862 09:28:55.441647 fsp= 1, odt_onoff= 1, Byte mode= 0
863 09:28:55.441751 ==
864 09:28:55.441857 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
865 09:28:55.441959 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
866 09:28:55.442069 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
867 09:28:55.442174 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
868 09:28:55.442280 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
869 09:28:55.442389 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
870 09:28:55.442491 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
871 09:28:55.442603 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
872 09:28:55.442704 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
873 09:28:55.442806 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
874 09:28:55.442916 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
875 09:28:55.443015 3 2 12 |b0a 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
876 09:28:55.443121 3 2 16 |3534 201f |(11 11)(11 11) |(0 0)(0 0)| 0
877 09:28:55.443229 3 2 20 |3534 1110 |(11 11)(11 11) |(0 0)(0 0)| 0
878 09:28:55.443328 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
879 09:28:55.443439 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
880 09:28:55.443541 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
881 09:28:55.443647 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
882 09:28:55.443749 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
883 09:28:55.443855 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
884 09:28:55.443962 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
885 09:28:55.444062 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
886 09:28:55.444169 [Byte 0] Lead/lag Transition tap number (1)
887 09:28:55.444268 [Byte 1] Lead/lag falling Transition (3, 3, 20)
888 09:28:55.444364 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
889 09:28:55.444472 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
890 09:28:55.444571 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
891 09:28:55.444679 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
892 09:28:55.444778 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
893 09:28:55.444881 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
894 09:28:55.444984 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
895 09:28:55.445090 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
896 09:28:55.445198 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 09:28:55.445298 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 09:28:55.445397 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 09:28:55.445501 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 09:28:55.445568 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 09:28:55.445633 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 09:28:55.445698 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 09:28:55.445762 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 09:28:55.445853 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 09:28:55.445920 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
906 09:28:55.445985 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
907 09:28:55.446278 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
908 09:28:55.446382 [Byte 0] Lead/lag falling Transition (3, 6, 4)
909 09:28:55.446482 [Byte 1] Lead/lag falling Transition (3, 6, 4)
910 09:28:55.446580 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
911 09:28:55.446680 [Byte 0] Lead/lag Transition tap number (2)
912 09:28:55.446778 [Byte 1] Lead/lag Transition tap number (2)
913 09:28:55.446883 3 6 12 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
914 09:28:55.446985 3 6 16 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
915 09:28:55.447083 [Byte 0]First pass (3, 6, 16)
916 09:28:55.447180 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 09:28:55.447279 [Byte 1]First pass (3, 6, 20)
918 09:28:55.447385 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 09:28:55.447485 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 09:28:55.447584 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 09:28:55.447683 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 09:28:55.447782 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 09:28:55.447890 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 09:28:55.447989 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
925 09:28:55.448099 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
926 09:28:55.448199 All bytes gating window > 1UI, Early break!
927 09:28:55.448294
928 09:28:55.448406 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
929 09:28:55.448503
930 09:28:55.448602 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
931 09:28:55.448668
932 09:28:55.448731
933 09:28:55.448794
934 09:28:55.448856 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
935 09:28:55.448919
936 09:28:55.448982 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
937 09:28:55.449045
938 09:28:55.449148
939 09:28:55.449248 Write Rank0 MR1 =0x56
940 09:28:55.449344
941 09:28:55.449450 best RODT dly(2T, 0.5T) = (2, 3)
942 09:28:55.449520
943 09:28:55.449597 best RODT dly(2T, 0.5T) = (2, 3)
944 09:28:55.449661 ==
945 09:28:55.449723 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
946 09:28:55.449786 fsp= 1, odt_onoff= 1, Byte mode= 0
947 09:28:55.449850 ==
948 09:28:55.449912 Start DQ dly to find pass range UseTestEngine =0
949 09:28:55.449975 x-axis: bit #, y-axis: DQ dly (-127~63)
950 09:28:55.450037 RX Vref Scan = 0
951 09:28:55.450100 -26, [0] xxxxxxxx xxxxxxxx [MSB]
952 09:28:55.450169 -25, [0] xxxxxxxx xxxxxxxx [MSB]
953 09:28:55.450276 -24, [0] xxxxxxxx xxxxxxxx [MSB]
954 09:28:55.450343 -23, [0] xxxxxxxx xxxxxxxx [MSB]
955 09:28:55.450408 -22, [0] xxxxxxxx xxxxxxxx [MSB]
956 09:28:55.450472 -21, [0] xxxxxxxx xxxxxxxx [MSB]
957 09:28:55.450536 -20, [0] xxxxxxxx xxxxxxxx [MSB]
958 09:28:55.450600 -19, [0] xxxxxxxx xxxxxxxx [MSB]
959 09:28:55.450663 -18, [0] xxxxxxxx xxxxxxxx [MSB]
960 09:28:55.450747 -17, [0] xxxxxxxx xxxxxxxx [MSB]
961 09:28:55.450813 -16, [0] xxxxxxxx xxxxxxxx [MSB]
962 09:28:55.450920 -15, [0] xxxxxxxx xxxxxxxx [MSB]
963 09:28:55.451019 -14, [0] xxxxxxxx xxxxxxxx [MSB]
964 09:28:55.451131 -13, [0] xxxxxxxx xxxxxxxx [MSB]
965 09:28:55.451231 -12, [0] xxxxxxxx xxxxxxxx [MSB]
966 09:28:55.451336 -11, [0] xxxxxxxx xxxxxxxx [MSB]
967 09:28:55.451436 -10, [0] xxxxxxxx xxxxxxxx [MSB]
968 09:28:55.451534 -9, [0] xxxxxxxx xxxxxxxx [MSB]
969 09:28:55.451631 -8, [0] xxxxxxxx xxxxxxxx [MSB]
970 09:28:55.451729 -7, [0] xxxxxxxx xxxxxxxx [MSB]
971 09:28:55.451833 -6, [0] xxxxxxxx xxxxxxxx [MSB]
972 09:28:55.451933 -5, [0] xxxxxxxx xxxxxxxx [MSB]
973 09:28:55.452030 -4, [0] xxxxxxxx oxxxxxxx [MSB]
974 09:28:55.452127 -3, [0] xxxxxxxx oxxxxxxx [MSB]
975 09:28:55.452224 -2, [0] xxxoxxxx oxxoxxxx [MSB]
976 09:28:55.452321 -1, [0] xxxoxxxx oxxoxxxx [MSB]
977 09:28:55.452427 0, [0] xxxoxxxx ooxoooxx [MSB]
978 09:28:55.452526 1, [0] xxxoxxxx ooxoooxx [MSB]
979 09:28:55.452621 2, [0] xxxoxoox ooxoooox [MSB]
980 09:28:55.452687 3, [0] xxxoxoox ooxoooox [MSB]
981 09:28:55.452751 4, [0] xxxoxooo ooxooooo [MSB]
982 09:28:55.452815 5, [0] oxxooooo ooxooooo [MSB]
983 09:28:55.452886 6, [0] oxxooooo ooxooooo [MSB]
984 09:28:55.452989 7, [0] oooooooo ooxooooo [MSB]
985 09:28:55.453090 32, [0] oooxoooo oooooooo [MSB]
986 09:28:55.453192 33, [0] oooxoooo xooooooo [MSB]
987 09:28:55.453305 34, [0] oooxoooo xooxoooo [MSB]
988 09:28:55.453404 35, [0] oooxoooo xxoxxooo [MSB]
989 09:28:55.453496 36, [0] oooxoxoo xxoxxoxo [MSB]
990 09:28:55.453583 37, [0] oooxoxxx xxoxxxxo [MSB]
991 09:28:55.453649 38, [0] oooxoxxx xxoxxxxo [MSB]
992 09:28:55.453714 39, [0] oooxoxxx xxoxxxxx [MSB]
993 09:28:55.453790 40, [0] ooxxxxxx xxoxxxxx [MSB]
994 09:28:55.453870 41, [0] xxxxxxxx xxoxxxxx [MSB]
995 09:28:55.453935 42, [0] xxxxxxxx xxxxxxxx [MSB]
996 09:28:55.453999 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
997 09:28:55.454063 iDelay=42, Bit 1, Center 23 (7 ~ 40) 34
998 09:28:55.454138 iDelay=42, Bit 2, Center 23 (7 ~ 39) 33
999 09:28:55.454217 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
1000 09:28:55.454282 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
1001 09:28:55.454344 iDelay=42, Bit 5, Center 18 (2 ~ 35) 34
1002 09:28:55.454407 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
1003 09:28:55.454470 iDelay=42, Bit 7, Center 20 (4 ~ 36) 33
1004 09:28:55.454532 iDelay=42, Bit 8, Center 14 (-4 ~ 32) 37
1005 09:28:55.454595 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
1006 09:28:55.454702 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
1007 09:28:55.454799 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
1008 09:28:55.454895 iDelay=42, Bit 12, Center 17 (0 ~ 34) 35
1009 09:28:55.454999 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1010 09:28:55.455104 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
1011 09:28:55.455202 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
1012 09:28:55.455297 ==
1013 09:28:55.455401 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1014 09:28:55.455499 fsp= 1, odt_onoff= 1, Byte mode= 0
1015 09:28:55.455603 ==
1016 09:28:55.455708 DQS Delay:
1017 09:28:55.455804 DQS0 = 0, DQS1 = 0
1018 09:28:55.455900 DQM Delay:
1019 09:28:55.455995 DQM0 = 20, DQM1 = 18
1020 09:28:55.456099 DQ Delay:
1021 09:28:55.456195 DQ0 =22, DQ1 =23, DQ2 =23, DQ3 =14
1022 09:28:55.456290 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
1023 09:28:55.456397 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
1024 09:28:55.456494 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
1025 09:28:55.456601
1026 09:28:55.456681
1027 09:28:55.456746 DramC Write-DBI off
1028 09:28:55.456810 ==
1029 09:28:55.456921 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1030 09:28:55.457019 fsp= 1, odt_onoff= 1, Byte mode= 0
1031 09:28:55.457115 ==
1032 09:28:55.457210 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1033 09:28:55.457315
1034 09:28:55.457411 Begin, DQ Scan Range 923~1179
1035 09:28:55.457538
1036 09:28:55.457605
1037 09:28:55.457682 TX Vref Scan disable
1038 09:28:55.458011 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1039 09:28:55.458120 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1040 09:28:55.458227 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1041 09:28:55.458327 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1042 09:28:55.458395 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1043 09:28:55.458461 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1044 09:28:55.458533 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1045 09:28:55.458607 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1046 09:28:55.458672 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1047 09:28:55.458736 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1048 09:28:55.458800 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1049 09:28:55.458864 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1050 09:28:55.458927 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1051 09:28:55.458996 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1052 09:28:55.459069 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1053 09:28:55.459134 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1054 09:28:55.459198 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1055 09:28:55.459261 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1056 09:28:55.459329 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1057 09:28:55.459392 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1058 09:28:55.459497 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1059 09:28:55.459604 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1060 09:28:55.459703 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1061 09:28:55.459801 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1062 09:28:55.459907 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1063 09:28:55.460007 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1064 09:28:55.460112 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1065 09:28:55.460222 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1066 09:28:55.460328 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1067 09:28:55.460427 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1068 09:28:55.460526 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1069 09:28:55.460613 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1070 09:28:55.460679 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1071 09:28:55.460770 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1072 09:28:55.460877 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1073 09:28:55.460985 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1074 09:28:55.461086 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1075 09:28:55.461191 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1076 09:28:55.461289 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1077 09:28:55.461395 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1078 09:28:55.461486 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1079 09:28:55.461551 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1080 09:28:55.461633 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1081 09:28:55.461730 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1082 09:28:55.461830 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1083 09:28:55.461907 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1084 09:28:55.461971 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1085 09:28:55.462034 970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]
1086 09:28:55.462118 971 |3 6 11|[0] xxxxxxxx ooxooxxx [MSB]
1087 09:28:55.462224 972 |3 6 12|[0] xxxxxxxx ooxoooxx [MSB]
1088 09:28:55.462322 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1089 09:28:55.462429 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1090 09:28:55.462527 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1091 09:28:55.462637 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1092 09:28:55.462737 977 |3 6 17|[0] xxxoooox oooooooo [MSB]
1093 09:28:55.462834 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1094 09:28:55.462940 979 |3 6 19|[0] xooooooo oooooooo [MSB]
1095 09:28:55.463039 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1096 09:28:55.463162 991 |3 6 31|[0] oooooooo xooxxxoo [MSB]
1097 09:28:55.463273 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1098 09:28:55.463379 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1099 09:28:55.463477 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1100 09:28:55.463589 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1101 09:28:55.463689 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1102 09:28:55.463787 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1103 09:28:55.463891 998 |3 6 38|[0] oooxoxxo xxxxxxxx [MSB]
1104 09:28:55.463989 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1105 09:28:55.464093 Byte0, DQ PI dly=987, DQM PI dly= 987
1106 09:28:55.464197 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1107 09:28:55.464299
1108 09:28:55.464413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1109 09:28:55.464512
1110 09:28:55.464589 Byte1, DQ PI dly=981, DQM PI dly= 981
1111 09:28:55.464688 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1112 09:28:55.464791
1113 09:28:55.464886 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1114 09:28:55.464981
1115 09:28:55.465075 ==
1116 09:28:55.465170 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1117 09:28:55.465266 fsp= 1, odt_onoff= 1, Byte mode= 0
1118 09:28:55.465360 ==
1119 09:28:55.465468 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1120 09:28:55.465544
1121 09:28:55.465607 Begin, DQ Scan Range 957~1021
1122 09:28:55.465669 Write Rank0 MR14 =0x0
1123 09:28:55.465731
1124 09:28:55.465813 CH=0, VrefRange= 0, VrefLevel = 0
1125 09:28:55.465877 TX Bit0 (983~994) 12 988, Bit8 (971~985) 15 978,
1126 09:28:55.465946 TX Bit1 (981~994) 14 987, Bit9 (973~987) 15 980,
1127 09:28:55.466018 TX Bit2 (982~995) 14 988, Bit10 (978~991) 14 984,
1128 09:28:55.466081 TX Bit3 (976~990) 15 983, Bit11 (972~984) 13 978,
1129 09:28:55.466175 TX Bit4 (980~993) 14 986, Bit12 (976~985) 10 980,
1130 09:28:55.466279 TX Bit5 (978~991) 14 984, Bit13 (976~985) 10 980,
1131 09:28:55.466378 TX Bit6 (978~991) 14 984, Bit14 (976~989) 14 982,
1132 09:28:55.466478 TX Bit7 (980~992) 13 986, Bit15 (977~991) 15 984,
1133 09:28:55.466584
1134 09:28:55.466680 Write Rank0 MR14 =0x2
1135 09:28:55.466774
1136 09:28:55.466889 CH=0, VrefRange= 0, VrefLevel = 2
1137 09:28:55.466992 TX Bit0 (982~995) 14 988, Bit8 (970~986) 17 978,
1138 09:28:55.467090 TX Bit1 (980~995) 16 987, Bit9 (973~988) 16 980,
1139 09:28:55.467194 TX Bit2 (982~996) 15 989, Bit10 (977~992) 16 984,
1140 09:28:55.467296 TX Bit3 (976~991) 16 983, Bit11 (972~984) 13 978,
1141 09:28:55.467407 TX Bit4 (980~994) 15 987, Bit12 (975~986) 12 980,
1142 09:28:55.467504 TX Bit5 (977~992) 16 984, Bit13 (975~986) 12 980,
1143 09:28:55.467831 TX Bit6 (978~992) 15 985, Bit14 (975~990) 16 982,
1144 09:28:55.467946 TX Bit7 (980~993) 14 986, Bit15 (977~992) 16 984,
1145 09:28:55.468045
1146 09:28:55.468148 Write Rank0 MR14 =0x4
1147 09:28:55.468262
1148 09:28:55.468361 CH=0, VrefRange= 0, VrefLevel = 4
1149 09:28:55.468465 TX Bit0 (982~996) 15 989, Bit8 (970~987) 18 978,
1150 09:28:55.468533 TX Bit1 (979~996) 18 987, Bit9 (972~989) 18 980,
1151 09:28:55.468599 TX Bit2 (981~997) 17 989, Bit10 (977~993) 17 985,
1152 09:28:55.468706 TX Bit3 (976~991) 16 983, Bit11 (971~986) 16 978,
1153 09:28:55.468803 TX Bit4 (979~994) 16 986, Bit12 (974~987) 14 980,
1154 09:28:55.468898 TX Bit5 (977~992) 16 984, Bit13 (975~987) 13 981,
1155 09:28:55.468993 TX Bit6 (978~992) 15 985, Bit14 (975~990) 16 982,
1156 09:28:55.469092 TX Bit7 (980~993) 14 986, Bit15 (977~992) 16 984,
1157 09:28:55.469187
1158 09:28:55.469281 Write Rank0 MR14 =0x6
1159 09:28:55.469384
1160 09:28:55.469492 CH=0, VrefRange= 0, VrefLevel = 6
1161 09:28:55.469598 TX Bit0 (982~997) 16 989, Bit8 (970~988) 19 979,
1162 09:28:55.469695 TX Bit1 (979~997) 19 988, Bit9 (972~989) 18 980,
1163 09:28:55.469791 TX Bit2 (981~998) 18 989, Bit10 (977~993) 17 985,
1164 09:28:55.469896 TX Bit3 (975~992) 18 983, Bit11 (971~987) 17 979,
1165 09:28:55.469993 TX Bit4 (978~996) 19 987, Bit12 (974~988) 15 981,
1166 09:28:55.470096 TX Bit5 (977~993) 17 985, Bit13 (974~988) 15 981,
1167 09:28:55.470199 TX Bit6 (977~992) 16 984, Bit14 (974~991) 18 982,
1168 09:28:55.470287 TX Bit7 (979~994) 16 986, Bit15 (976~993) 18 984,
1169 09:28:55.470375
1170 09:28:55.470440 Write Rank0 MR14 =0x8
1171 09:28:55.470503
1172 09:28:55.470580 CH=0, VrefRange= 0, VrefLevel = 8
1173 09:28:55.470643 TX Bit0 (981~997) 17 989, Bit8 (969~989) 21 979,
1174 09:28:55.470706 TX Bit1 (978~997) 20 987, Bit9 (972~989) 18 980,
1175 09:28:55.470807 TX Bit2 (980~998) 19 989, Bit10 (977~994) 18 985,
1176 09:28:55.470905 TX Bit3 (975~992) 18 983, Bit11 (970~988) 19 979,
1177 09:28:55.471015 TX Bit4 (978~996) 19 987, Bit12 (973~989) 17 981,
1178 09:28:55.471118 TX Bit5 (977~993) 17 985, Bit13 (974~989) 16 981,
1179 09:28:55.471223 TX Bit6 (977~993) 17 985, Bit14 (974~991) 18 982,
1180 09:28:55.471325 TX Bit7 (979~995) 17 987, Bit15 (976~995) 20 985,
1181 09:28:55.471436
1182 09:28:55.471533 Write Rank0 MR14 =0xa
1183 09:28:55.471634
1184 09:28:55.471730 CH=0, VrefRange= 0, VrefLevel = 10
1185 09:28:55.471826 TX Bit0 (981~998) 18 989, Bit8 (969~989) 21 979,
1186 09:28:55.471931 TX Bit1 (978~998) 21 988, Bit9 (972~990) 19 981,
1187 09:28:55.472037 TX Bit2 (980~999) 20 989, Bit10 (977~996) 20 986,
1188 09:28:55.472147 TX Bit3 (975~992) 18 983, Bit11 (970~989) 20 979,
1189 09:28:55.472252 TX Bit4 (978~997) 20 987, Bit12 (973~989) 17 981,
1190 09:28:55.472349 TX Bit5 (977~994) 18 985, Bit13 (973~989) 17 981,
1191 09:28:55.472456 TX Bit6 (977~994) 18 985, Bit14 (974~992) 19 983,
1192 09:28:55.472527 TX Bit7 (979~996) 18 987, Bit15 (976~995) 20 985,
1193 09:28:55.472590
1194 09:28:55.472693 Write Rank0 MR14 =0xc
1195 09:28:55.472793
1196 09:28:55.472892 CH=0, VrefRange= 0, VrefLevel = 12
1197 09:28:55.472998 TX Bit0 (981~999) 19 990, Bit8 (969~990) 22 979,
1198 09:28:55.473095 TX Bit1 (978~998) 21 988, Bit9 (971~990) 20 980,
1199 09:28:55.473202 TX Bit2 (979~999) 21 989, Bit10 (976~996) 21 986,
1200 09:28:55.473307 TX Bit3 (975~993) 19 984, Bit11 (970~989) 20 979,
1201 09:28:55.473414 TX Bit4 (978~997) 20 987, Bit12 (972~990) 19 981,
1202 09:28:55.473497 TX Bit5 (976~994) 19 985, Bit13 (973~989) 17 981,
1203 09:28:55.473576 TX Bit6 (977~994) 18 985, Bit14 (973~992) 20 982,
1204 09:28:55.473681 TX Bit7 (978~996) 19 987, Bit15 (976~996) 21 986,
1205 09:28:55.473778
1206 09:28:55.473884 Write Rank0 MR14 =0xe
1207 09:28:55.473990
1208 09:28:55.474096 CH=0, VrefRange= 0, VrefLevel = 14
1209 09:28:55.474196 TX Bit0 (980~999) 20 989, Bit8 (969~990) 22 979,
1210 09:28:55.474294 TX Bit1 (978~999) 22 988, Bit9 (971~990) 20 980,
1211 09:28:55.474390 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
1212 09:28:55.474486 TX Bit3 (975~993) 19 984, Bit11 (969~989) 21 979,
1213 09:28:55.474582 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
1214 09:28:55.474678 TX Bit5 (976~995) 20 985, Bit13 (972~990) 19 981,
1215 09:28:55.474773 TX Bit6 (977~995) 19 986, Bit14 (973~993) 21 983,
1216 09:28:55.474869 TX Bit7 (978~997) 20 987, Bit15 (975~997) 23 986,
1217 09:28:55.474963
1218 09:28:55.475058 Write Rank0 MR14 =0x10
1219 09:28:55.475151
1220 09:28:55.475246 CH=0, VrefRange= 0, VrefLevel = 16
1221 09:28:55.475341 TX Bit0 (980~999) 20 989, Bit8 (969~990) 22 979,
1222 09:28:55.475437 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1223 09:28:55.475532 TX Bit2 (978~999) 22 988, Bit10 (976~997) 22 986,
1224 09:28:55.475628 TX Bit3 (974~993) 20 983, Bit11 (969~989) 21 979,
1225 09:28:55.475723 TX Bit4 (978~998) 21 988, Bit12 (971~990) 20 980,
1226 09:28:55.475819 TX Bit5 (976~996) 21 986, Bit13 (971~990) 20 980,
1227 09:28:55.475914 TX Bit6 (977~996) 20 986, Bit14 (972~993) 22 982,
1228 09:28:55.476009 TX Bit7 (978~998) 21 988, Bit15 (975~997) 23 986,
1229 09:28:55.476103
1230 09:28:55.476197 Write Rank0 MR14 =0x12
1231 09:28:55.476291
1232 09:28:55.476385 CH=0, VrefRange= 0, VrefLevel = 18
1233 09:28:55.476480 TX Bit0 (979~1000) 22 989, Bit8 (968~990) 23 979,
1234 09:28:55.476575 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
1235 09:28:55.476671 TX Bit2 (979~1000) 22 989, Bit10 (976~997) 22 986,
1236 09:28:55.476766 TX Bit3 (974~994) 21 984, Bit11 (969~990) 22 979,
1237 09:28:55.476861 TX Bit4 (977~999) 23 988, Bit12 (971~990) 20 980,
1238 09:28:55.476957 TX Bit5 (976~996) 21 986, Bit13 (971~990) 20 980,
1239 09:28:55.477052 TX Bit6 (976~997) 22 986, Bit14 (972~994) 23 983,
1240 09:28:55.477147 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
1241 09:28:55.477241
1242 09:28:55.477335 Write Rank0 MR14 =0x14
1243 09:28:55.477435
1244 09:28:55.477540 CH=0, VrefRange= 0, VrefLevel = 20
1245 09:28:55.477636 TX Bit0 (979~1000) 22 989, Bit8 (968~991) 24 979,
1246 09:28:55.477939 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1247 09:28:55.478075 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1248 09:28:55.478186 TX Bit3 (974~994) 21 984, Bit11 (969~990) 22 979,
1249 09:28:55.478292 TX Bit4 (977~999) 23 988, Bit12 (971~991) 21 981,
1250 09:28:55.478395 TX Bit5 (976~997) 22 986, Bit13 (971~991) 21 981,
1251 09:28:55.478496 TX Bit6 (976~997) 22 986, Bit14 (972~995) 24 983,
1252 09:28:55.478596 TX Bit7 (978~1000) 23 989, Bit15 (974~997) 24 985,
1253 09:28:55.478700
1254 09:28:55.478809 Write Rank0 MR14 =0x16
1255 09:28:55.478911
1256 09:28:55.479010 CH=0, VrefRange= 0, VrefLevel = 22
1257 09:28:55.479112 TX Bit0 (979~1000) 22 989, Bit8 (968~991) 24 979,
1258 09:28:55.479212 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
1259 09:28:55.479314 TX Bit2 (978~1000) 23 989, Bit10 (975~998) 24 986,
1260 09:28:55.479412 TX Bit3 (974~995) 22 984, Bit11 (969~990) 22 979,
1261 09:28:55.479509 TX Bit4 (977~999) 23 988, Bit12 (970~992) 23 981,
1262 09:28:55.479607 TX Bit5 (976~998) 23 987, Bit13 (970~992) 23 981,
1263 09:28:55.479705 TX Bit6 (976~998) 23 987, Bit14 (971~995) 25 983,
1264 09:28:55.479801 TX Bit7 (977~1000) 24 988, Bit15 (974~998) 25 986,
1265 09:28:55.479904
1266 09:28:55.480001 Write Rank0 MR14 =0x18
1267 09:28:55.480097
1268 09:28:55.480204 CH=0, VrefRange= 0, VrefLevel = 24
1269 09:28:55.480306 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1270 09:28:55.480407 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1271 09:28:55.480510 TX Bit2 (978~1001) 24 989, Bit10 (975~998) 24 986,
1272 09:28:55.480582 TX Bit3 (973~995) 23 984, Bit11 (969~991) 23 980,
1273 09:28:55.480650 TX Bit4 (977~999) 23 988, Bit12 (970~992) 23 981,
1274 09:28:55.480736 TX Bit5 (975~998) 24 986, Bit13 (970~992) 23 981,
1275 09:28:55.480838 TX Bit6 (976~999) 24 987, Bit14 (971~996) 26 983,
1276 09:28:55.480936 TX Bit7 (977~1000) 24 988, Bit15 (974~998) 25 986,
1277 09:28:55.481034
1278 09:28:55.481134 Write Rank0 MR14 =0x1a
1279 09:28:55.481229
1280 09:28:55.481331 CH=0, VrefRange= 0, VrefLevel = 26
1281 09:28:55.481440 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
1282 09:28:55.481510 TX Bit1 (977~1000) 24 988, Bit9 (969~993) 25 981,
1283 09:28:55.481581 TX Bit2 (978~1001) 24 989, Bit10 (974~999) 26 986,
1284 09:28:55.481646 TX Bit3 (972~996) 25 984, Bit11 (968~991) 24 979,
1285 09:28:55.481711 TX Bit4 (977~1000) 24 988, Bit12 (970~993) 24 981,
1286 09:28:55.481796 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1287 09:28:55.481894 TX Bit6 (976~999) 24 987, Bit14 (971~997) 27 984,
1288 09:28:55.481993 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1289 09:28:55.482090
1290 09:28:55.482192 Write Rank0 MR14 =0x1c
1291 09:28:55.482300
1292 09:28:55.482401 CH=0, VrefRange= 0, VrefLevel = 28
1293 09:28:55.482508 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1294 09:28:55.482610 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1295 09:28:55.482717 TX Bit2 (978~1002) 25 990, Bit10 (974~998) 25 986,
1296 09:28:55.482819 TX Bit3 (972~996) 25 984, Bit11 (968~992) 25 980,
1297 09:28:55.482917 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1298 09:28:55.483023 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1299 09:28:55.483123 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1300 09:28:55.483225 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1301 09:28:55.483332
1302 09:28:55.483431 Write Rank0 MR14 =0x1e
1303 09:28:55.483529
1304 09:28:55.483628 CH=0, VrefRange= 0, VrefLevel = 30
1305 09:28:55.483738 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1306 09:28:55.483837 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1307 09:28:55.483947 TX Bit2 (978~1002) 25 990, Bit10 (974~998) 25 986,
1308 09:28:55.484049 TX Bit3 (972~996) 25 984, Bit11 (968~992) 25 980,
1309 09:28:55.484155 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1310 09:28:55.484253 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1311 09:28:55.484362 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1312 09:28:55.484462 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1313 09:28:55.484561
1314 09:28:55.484663 Write Rank0 MR14 =0x20
1315 09:28:55.484765
1316 09:28:55.484863 CH=0, VrefRange= 0, VrefLevel = 32
1317 09:28:55.484965 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1318 09:28:55.485071 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1319 09:28:55.485173 TX Bit2 (978~1002) 25 990, Bit10 (974~998) 25 986,
1320 09:28:55.485270 TX Bit3 (972~996) 25 984, Bit11 (968~992) 25 980,
1321 09:28:55.485371 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1322 09:28:55.485494 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1323 09:28:55.485603 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1324 09:28:55.485707 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1325 09:28:55.485804
1326 09:28:55.485911 Write Rank0 MR14 =0x22
1327 09:28:55.486020
1328 09:28:55.486120 CH=0, VrefRange= 0, VrefLevel = 34
1329 09:28:55.486217 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1330 09:28:55.486315 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1331 09:28:55.486412 TX Bit2 (978~1002) 25 990, Bit10 (974~998) 25 986,
1332 09:28:55.486509 TX Bit3 (972~996) 25 984, Bit11 (968~992) 25 980,
1333 09:28:55.486605 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1334 09:28:55.486700 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1335 09:28:55.486796 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1336 09:28:55.486892 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1337 09:28:55.486986
1338 09:28:55.487081 Write Rank0 MR14 =0x24
1339 09:28:55.487175
1340 09:28:55.487269 CH=0, VrefRange= 0, VrefLevel = 36
1341 09:28:55.487365 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1342 09:28:55.487461 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1343 09:28:55.487556 TX Bit2 (978~1002) 25 990, Bit10 (974~998) 25 986,
1344 09:28:55.487652 TX Bit3 (972~996) 25 984, Bit11 (968~992) 25 980,
1345 09:28:55.487959 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1346 09:28:55.488061 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1347 09:28:55.488158 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1348 09:28:55.488254 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1349 09:28:55.488349
1350 09:28:55.488444 Write Rank0 MR14 =0x26
1351 09:28:55.488541
1352 09:28:55.488635 CH=0, VrefRange= 0, VrefLevel = 38
1353 09:28:55.488743 TX Bit0 (978~1002) 25 990, Bit8 (968~991) 24 979,
1354 09:28:55.488840 TX Bit1 (977~1001) 25 989, Bit9 (969~993) 25 981,
1355 09:28:55.488936 TX Bit2 (978~1002) 25 990, Bit10 (974~998) 25 986,
1356 09:28:55.489032 TX Bit3 (972~996) 25 984, Bit11 (968~992) 25 980,
1357 09:28:55.489128 TX Bit4 (977~1000) 24 988, Bit12 (969~994) 26 981,
1358 09:28:55.489224 TX Bit5 (975~999) 25 987, Bit13 (970~993) 24 981,
1359 09:28:55.489319 TX Bit6 (976~1000) 25 988, Bit14 (970~996) 27 983,
1360 09:28:55.489415 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
1361 09:28:55.489500
1362 09:28:55.489564
1363 09:28:55.489626 TX Vref found, early break! 372< 380
1364 09:28:55.489690 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1365 09:28:55.489753 u1DelayCellOfst[0]=7 cells (6 PI)
1366 09:28:55.489815 u1DelayCellOfst[1]=6 cells (5 PI)
1367 09:28:55.489879 u1DelayCellOfst[2]=7 cells (6 PI)
1368 09:28:55.489942 u1DelayCellOfst[3]=0 cells (0 PI)
1369 09:28:55.490004 u1DelayCellOfst[4]=5 cells (4 PI)
1370 09:28:55.490067 u1DelayCellOfst[5]=3 cells (3 PI)
1371 09:28:55.490128 u1DelayCellOfst[6]=5 cells (4 PI)
1372 09:28:55.490191 u1DelayCellOfst[7]=6 cells (5 PI)
1373 09:28:55.490253 Byte0, DQ PI dly=984, DQM PI dly= 987
1374 09:28:55.490318 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1375 09:28:55.490381
1376 09:28:55.490444 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1377 09:28:55.490507
1378 09:28:55.490569 u1DelayCellOfst[8]=0 cells (0 PI)
1379 09:28:55.490631 u1DelayCellOfst[9]=2 cells (2 PI)
1380 09:28:55.490693 u1DelayCellOfst[10]=9 cells (7 PI)
1381 09:28:55.490755 u1DelayCellOfst[11]=1 cells (1 PI)
1382 09:28:55.490817 u1DelayCellOfst[12]=2 cells (2 PI)
1383 09:28:55.490879 u1DelayCellOfst[13]=2 cells (2 PI)
1384 09:28:55.490941 u1DelayCellOfst[14]=5 cells (4 PI)
1385 09:28:55.491003 u1DelayCellOfst[15]=9 cells (7 PI)
1386 09:28:55.491066 Byte1, DQ PI dly=979, DQM PI dly= 982
1387 09:28:55.491128 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1388 09:28:55.491190
1389 09:28:55.491253 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1390 09:28:55.491315
1391 09:28:55.491377 Write Rank0 MR14 =0x1c
1392 09:28:55.491439
1393 09:28:55.491501 Final TX Range 0 Vref 28
1394 09:28:55.491563
1395 09:28:55.491626 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1396 09:28:55.491688
1397 09:28:55.491750 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1398 09:28:55.491812 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1399 09:28:55.491875 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1400 09:28:55.491954 Write Rank0 MR3 =0xb0
1401 09:28:55.492025 DramC Write-DBI on
1402 09:28:55.492089 ==
1403 09:28:55.492194 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1404 09:28:55.492297 fsp= 1, odt_onoff= 1, Byte mode= 0
1405 09:28:55.492394 ==
1406 09:28:55.492492 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1407 09:28:55.492576
1408 09:28:55.492674 Begin, DQ Scan Range 702~766
1409 09:28:55.492773
1410 09:28:55.492870
1411 09:28:55.492967 TX Vref Scan disable
1412 09:28:55.493062 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1413 09:28:55.493164 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1414 09:28:55.493262 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1415 09:28:55.493363 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1416 09:28:55.493472 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1417 09:28:55.493540 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1418 09:28:55.493604 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1419 09:28:55.493668 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1420 09:28:55.493738 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1421 09:28:55.493802 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1422 09:28:55.493865 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1423 09:28:55.493943 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1424 09:28:55.494044 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1425 09:28:55.494142 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1426 09:28:55.494240 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1427 09:28:55.494337 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1428 09:28:55.494437 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1429 09:28:55.494535 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1430 09:28:55.494632 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1431 09:28:55.494738 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1432 09:28:55.494838 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1433 09:28:55.494941 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1434 09:28:55.495039 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1435 09:28:55.495148 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1436 09:28:55.495246 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1437 09:28:55.495344 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1438 09:28:55.495440 Byte0, DQ PI dly=732, DQM PI dly= 732
1439 09:28:55.495535 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1440 09:28:55.495630
1441 09:28:55.495725 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1442 09:28:55.495819
1443 09:28:55.495914 Byte1, DQ PI dly=725, DQM PI dly= 725
1444 09:28:55.496009 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1445 09:28:55.496105
1446 09:28:55.496200 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1447 09:28:55.496294
1448 09:28:55.496389 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1449 09:28:55.496485 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1450 09:28:55.496581 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1451 09:28:55.496675 Write Rank0 MR3 =0x30
1452 09:28:55.496769 DramC Write-DBI off
1453 09:28:55.496862
1454 09:28:55.496957 [DATLAT]
1455 09:28:55.497051 Freq=1600, CH0 RK0, use_rxtx_scan=0
1456 09:28:55.497145
1457 09:28:55.497239 DATLAT Default: 0xf
1458 09:28:55.497333 7, 0xFFFF, sum=0
1459 09:28:55.497435 8, 0xFFFF, sum=0
1460 09:28:55.497518 9, 0xFFFF, sum=0
1461 09:28:55.497584 10, 0xFFFF, sum=0
1462 09:28:55.497648 11, 0xFFFF, sum=0
1463 09:28:55.497712 12, 0xFFFF, sum=0
1464 09:28:55.497775 13, 0xFFFF, sum=0
1465 09:28:55.498051 14, 0x0, sum=1
1466 09:28:55.498122 15, 0x0, sum=2
1467 09:28:55.498187 16, 0x0, sum=3
1468 09:28:55.498251 17, 0x0, sum=4
1469 09:28:55.498314 pattern=2 first_step=14 total pass=5 best_step=16
1470 09:28:55.498376 ==
1471 09:28:55.498440 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1472 09:28:55.498530 fsp= 1, odt_onoff= 1, Byte mode= 0
1473 09:28:55.498596 ==
1474 09:28:55.498659 Start DQ dly to find pass range UseTestEngine =1
1475 09:28:55.498723 x-axis: bit #, y-axis: DQ dly (-127~63)
1476 09:28:55.498785 RX Vref Scan = 1
1477 09:28:55.498874
1478 09:28:55.498954 RX Vref found, early break!
1479 09:28:55.499106
1480 09:28:55.499270 Final RX Vref 11, apply to both rank0 and 1
1481 09:28:55.499389 ==
1482 09:28:55.499475 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1483 09:28:55.499574 fsp= 1, odt_onoff= 1, Byte mode= 0
1484 09:28:55.499680 ==
1485 09:28:55.499778 DQS Delay:
1486 09:28:55.499878 DQS0 = 0, DQS1 = 0
1487 09:28:55.499976 DQM Delay:
1488 09:28:55.500071 DQM0 = 19, DQM1 = 17
1489 09:28:55.500165 DQ Delay:
1490 09:28:55.500260 DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =14
1491 09:28:55.500356 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1492 09:28:55.500450 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1493 09:28:55.500545 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1494 09:28:55.500639
1495 09:28:55.500732
1496 09:28:55.500826
1497 09:28:55.500920 [DramC_TX_OE_Calibration] TA2
1498 09:28:55.501015 Original DQ_B0 (3 6) =30, OEN = 27
1499 09:28:55.501110 Original DQ_B1 (3 6) =30, OEN = 27
1500 09:28:55.501205 23, 0x0, End_B0=23 End_B1=23
1501 09:28:55.501302 24, 0x0, End_B0=24 End_B1=24
1502 09:28:55.501399 25, 0x0, End_B0=25 End_B1=25
1503 09:28:55.501498 26, 0x0, End_B0=26 End_B1=26
1504 09:28:55.501564 27, 0x0, End_B0=27 End_B1=27
1505 09:28:55.501628 28, 0x0, End_B0=28 End_B1=28
1506 09:28:55.501691 29, 0x0, End_B0=29 End_B1=29
1507 09:28:55.501755 30, 0x0, End_B0=30 End_B1=30
1508 09:28:55.501846 31, 0xFFFF, End_B0=30 End_B1=30
1509 09:28:55.501911 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1510 09:28:55.501975 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1511 09:28:55.502037
1512 09:28:55.502100
1513 09:28:55.502162 Write Rank0 MR23 =0x3f
1514 09:28:55.502224 [DQSOSC]
1515 09:28:55.502287 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1516 09:28:55.502351 CH0_RK0: MR19=0x202, MR18=0xC2C2, DQSOSC=446, MR23=63, INC=12, DEC=18
1517 09:28:55.502414 Write Rank0 MR23 =0x3f
1518 09:28:55.502475 [DQSOSC]
1519 09:28:55.502538 [DQSOSCAuto] RK0, (LSB)MR18= 0xbfbf, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
1520 09:28:55.502601 CH0 RK0: MR19=202, MR18=BFBF
1521 09:28:55.502663 [RankSwap] Rank num 2, (Multi 1), Rank 1
1522 09:28:55.502725 Write Rank0 MR2 =0xad
1523 09:28:55.502792 [Write Leveling]
1524 09:28:55.502855 delay byte0 byte1 byte2 byte3
1525 09:28:55.502918
1526 09:28:55.502979 10 0 0
1527 09:28:55.503043 11 0 0
1528 09:28:55.503113 12 0 0
1529 09:28:55.503178 13 0 0
1530 09:28:55.503241 14 0 0
1531 09:28:55.503305 15 0 0
1532 09:28:55.503368 16 0 0
1533 09:28:55.503431 17 0 0
1534 09:28:55.503494 18 0 0
1535 09:28:55.503557 19 0 0
1536 09:28:55.503620 20 0 0
1537 09:28:55.503693 21 0 0
1538 09:28:55.503790 22 0 0
1539 09:28:55.503886 23 0 0
1540 09:28:55.503982 24 0 0
1541 09:28:55.504089 25 0 0
1542 09:28:55.504156 26 0 ff
1543 09:28:55.504220 27 0 ff
1544 09:28:55.504283 28 ff ff
1545 09:28:55.504347 29 0 ff
1546 09:28:55.504410 30 ff ff
1547 09:28:55.504484 31 ff ff
1548 09:28:55.504555 32 ff ff
1549 09:28:55.504653 33 ff ff
1550 09:28:55.504749 34 ff ff
1551 09:28:55.504845 35 ff ff
1552 09:28:55.504942 36 ff ff
1553 09:28:55.505042 pass bytecount = 0xff (0xff: all bytes pass)
1554 09:28:55.505137
1555 09:28:55.505240 DQS0 dly: 30
1556 09:28:55.505341 DQS1 dly: 26
1557 09:28:55.505445 Write Rank0 MR2 =0x2d
1558 09:28:55.505513 [RankSwap] Rank num 2, (Multi 1), Rank 0
1559 09:28:55.505582 Write Rank1 MR1 =0xd6
1560 09:28:55.505645 [Gating]
1561 09:28:55.505708 ==
1562 09:28:55.505770 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1563 09:28:55.505834 fsp= 1, odt_onoff= 1, Byte mode= 0
1564 09:28:55.505897 ==
1565 09:28:55.505960 3 1 0 |2c2b 101 |(11 11)(11 11) |(1 1)(1 1)| 0
1566 09:28:55.506030 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1567 09:28:55.506117 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1568 09:28:55.506182 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1569 09:28:55.506251 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1570 09:28:55.506339 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1571 09:28:55.506465 [Byte 1] Lead/lag falling Transition (3, 1, 20)
1572 09:28:55.506634 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1573 09:28:55.506758 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1574 09:28:55.506862 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1575 09:28:55.506966 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1576 09:28:55.507065 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1577 09:28:55.507164 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1578 09:28:55.507261 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1579 09:28:55.507359 3 2 16 |2c2c 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1580 09:28:55.507456 [Byte 0] Lead/lag Transition tap number (7)
1581 09:28:55.507551 3 2 20 |2b2a 2c2b |(11 1)(11 11) |(0 0)(1 0)| 0
1582 09:28:55.507648 [Byte 1] Lead/lag Transition tap number (9)
1583 09:28:55.507744 3 2 24 |303 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1584 09:28:55.507841 3 2 28 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1585 09:28:55.507938 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1586 09:28:55.508036 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1587 09:28:55.508138 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1588 09:28:55.508237 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1589 09:28:55.508337 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1590 09:28:55.508449 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1591 09:28:55.508549 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1592 09:28:55.508629 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1593 09:28:55.508694 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1594 09:28:55.508757 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1595 09:28:55.508849 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1596 09:28:55.508947 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1597 09:28:55.509262 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1598 09:28:55.509369 3 4 20 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1599 09:28:55.509481 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1600 09:28:55.509580 3 4 28 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
1601 09:28:55.509678 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1602 09:28:55.509776 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1603 09:28:55.509873 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1604 09:28:55.509971 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1605 09:28:55.510075 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1606 09:28:55.510186 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1607 09:28:55.510289 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1608 09:28:55.510387 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1609 09:28:55.510484 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1610 09:28:55.510581 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1611 09:28:55.510679 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1612 09:28:55.510776 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1613 09:28:55.510873 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1614 09:28:55.510968 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1615 09:28:55.511063 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1616 09:28:55.511160 [Byte 0] Lead/lag Transition tap number (2)
1617 09:28:55.511255 3 6 20 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1618 09:28:55.511354 [Byte 1] Lead/lag Transition tap number (3)
1619 09:28:55.511436 3 6 24 |1010 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1620 09:28:55.511501 3 6 28 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1621 09:28:55.511586 [Byte 0]First pass (3, 6, 28)
1622 09:28:55.511686 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1623 09:28:55.511783 [Byte 1]First pass (3, 7, 0)
1624 09:28:55.511878 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1625 09:28:55.511975 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1626 09:28:55.512072 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1627 09:28:55.512151 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1628 09:28:55.512225 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1629 09:28:55.512313 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1630 09:28:55.512417 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1631 09:28:55.512520 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1632 09:28:55.512620 All bytes gating window > 1UI, Early break!
1633 09:28:55.512693
1634 09:28:55.512793 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1635 09:28:55.512891
1636 09:28:55.512991 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1637 09:28:55.513086
1638 09:28:55.513183
1639 09:28:55.513276
1640 09:28:55.513375 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1641 09:28:55.513475
1642 09:28:55.513550 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1643 09:28:55.513639
1644 09:28:55.513733
1645 09:28:55.513829 Write Rank1 MR1 =0x56
1646 09:28:55.513927
1647 09:28:55.514026 best RODT dly(2T, 0.5T) = (2, 3)
1648 09:28:55.514127
1649 09:28:55.514226 best RODT dly(2T, 0.5T) = (2, 3)
1650 09:28:55.514322 ==
1651 09:28:55.514422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1652 09:28:55.514517 fsp= 1, odt_onoff= 1, Byte mode= 0
1653 09:28:55.514616 ==
1654 09:28:55.514714 Start DQ dly to find pass range UseTestEngine =0
1655 09:28:55.514824 x-axis: bit #, y-axis: DQ dly (-127~63)
1656 09:28:55.514921 RX Vref Scan = 0
1657 09:28:55.515021 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1658 09:28:55.515120 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1659 09:28:55.515217 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1660 09:28:55.515318 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1661 09:28:55.515415 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1662 09:28:55.515511 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1663 09:28:55.515612 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1664 09:28:55.515709 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1665 09:28:55.515806 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1666 09:28:55.515907 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1667 09:28:55.516005 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1668 09:28:55.516104 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1669 09:28:55.516201 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1670 09:28:55.516296 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1671 09:28:55.516400 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1672 09:28:55.516496 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1673 09:28:55.516594 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1674 09:28:55.516693 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1675 09:28:55.516789 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1676 09:28:55.516889 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1677 09:28:55.516998 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1678 09:28:55.517107 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1679 09:28:55.517209 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1680 09:28:55.517311 -3, [0] xxxoxxxx oxxoxxxx [MSB]
1681 09:28:55.517409 -2, [0] xxxoxxxx ooxoooxx [MSB]
1682 09:28:55.517495 -1, [0] xxxoxoxx ooxoooxx [MSB]
1683 09:28:55.517561 0, [0] xxxoxoox ooxoooxx [MSB]
1684 09:28:55.517634 1, [0] xxxoxoox ooxoooox [MSB]
1685 09:28:55.517700 2, [0] xxxooooo ooxoooox [MSB]
1686 09:28:55.517767 3, [0] xxxooooo ooxooooo [MSB]
1687 09:28:55.517867 4, [0] ooxooooo ooxooooo [MSB]
1688 09:28:55.517964 32, [0] oooxoooo oooooooo [MSB]
1689 09:28:55.518069 33, [0] oooxoooo xooooooo [MSB]
1690 09:28:55.518182 34, [0] oooxoooo xooxoooo [MSB]
1691 09:28:55.518287 35, [0] oooxoooo xxoxoooo [MSB]
1692 09:28:55.518388 36, [0] oooxoxxo xxoxxoxo [MSB]
1693 09:28:55.518487 37, [0] oooxoxxx xxoxxxxo [MSB]
1694 09:28:55.518585 38, [0] oooxoxxx xxoxxxxo [MSB]
1695 09:28:55.518683 39, [0] oooxxxxx xxoxxxxx [MSB]
1696 09:28:55.518782 40, [0] xoxxxxxx xxoxxxxx [MSB]
1697 09:28:55.518879 41, [0] xxxxxxxx xxoxxxxx [MSB]
1698 09:28:55.518976 42, [0] xxxxxxxx xxoxxxxx [MSB]
1699 09:28:55.519073 43, [0] xxxxxxxx xxxxxxxx [MSB]
1700 09:28:55.519172 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1701 09:28:55.519268 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1702 09:28:55.519363 iDelay=43, Bit 2, Center 22 (5 ~ 39) 35
1703 09:28:55.519458 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1704 09:28:55.519555 iDelay=43, Bit 4, Center 20 (2 ~ 38) 37
1705 09:28:55.519650 iDelay=43, Bit 5, Center 17 (-1 ~ 35) 37
1706 09:28:55.519745 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1707 09:28:55.519842 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1708 09:28:55.519937 iDelay=43, Bit 8, Center 14 (-3 ~ 32) 36
1709 09:28:55.520031 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
1710 09:28:55.520136 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1711 09:28:55.520447 iDelay=43, Bit 11, Center 15 (-3 ~ 33) 37
1712 09:28:55.520550 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1713 09:28:55.520629 iDelay=43, Bit 13, Center 17 (-2 ~ 36) 39
1714 09:28:55.520702 iDelay=43, Bit 14, Center 18 (1 ~ 35) 35
1715 09:28:55.520799 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1716 09:28:55.520893 ==
1717 09:28:55.520989 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1718 09:28:55.521085 fsp= 1, odt_onoff= 1, Byte mode= 0
1719 09:28:55.521183 ==
1720 09:28:55.521278 DQS Delay:
1721 09:28:55.521396 DQS0 = 0, DQS1 = 0
1722 09:28:55.521514 DQM Delay:
1723 09:28:55.521698 DQM0 = 18, DQM1 = 17
1724 09:28:55.521817 DQ Delay:
1725 09:28:55.521913 DQ0 =21, DQ1 =22, DQ2 =22, DQ3 =13
1726 09:28:55.521986 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =19
1727 09:28:55.522065 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
1728 09:28:55.522130 DQ12 =16, DQ13 =17, DQ14 =18, DQ15 =20
1729 09:28:55.522194
1730 09:28:55.522257
1731 09:28:55.522319 DramC Write-DBI off
1732 09:28:55.522382 ==
1733 09:28:55.522445 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1734 09:28:55.522508 fsp= 1, odt_onoff= 1, Byte mode= 0
1735 09:28:55.522571 ==
1736 09:28:55.522634 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1737 09:28:55.522697
1738 09:28:55.522759 Begin, DQ Scan Range 922~1178
1739 09:28:55.522822
1740 09:28:55.522884
1741 09:28:55.522946 TX Vref Scan disable
1742 09:28:55.523009 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1743 09:28:55.523074 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1744 09:28:55.523138 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1745 09:28:55.523202 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1746 09:28:55.523265 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1747 09:28:55.523329 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1748 09:28:55.523393 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1749 09:28:55.523456 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1750 09:28:55.523520 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1751 09:28:55.523583 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1752 09:28:55.523647 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1753 09:28:55.523710 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1754 09:28:55.523773 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1755 09:28:55.523836 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1756 09:28:55.523900 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1757 09:28:55.523980 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1758 09:28:55.524082 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1759 09:28:55.524183 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1760 09:28:55.524281 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1761 09:28:55.524385 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1762 09:28:55.524486 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1763 09:28:55.524586 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1764 09:28:55.524686 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1765 09:28:55.524800 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1766 09:28:55.524899 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1767 09:28:55.524997 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1768 09:28:55.525094 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1769 09:28:55.525192 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1770 09:28:55.525295 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1771 09:28:55.525393 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1772 09:28:55.525483 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1773 09:28:55.525549 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1774 09:28:55.525612 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1775 09:28:55.525676 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1776 09:28:55.525740 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1777 09:28:55.525803 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1778 09:28:55.525867 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1779 09:28:55.525931 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1780 09:28:55.525995 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1781 09:28:55.526058 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1782 09:28:55.526122 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1783 09:28:55.526185 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1784 09:28:55.526249 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1785 09:28:55.526312 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1786 09:28:55.526376 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1787 09:28:55.526439 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1788 09:28:55.526503 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1789 09:28:55.526566 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1790 09:28:55.526629 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1791 09:28:55.526693 971 |3 6 11|[0] xxxxxxxx oxxxxxxx [MSB]
1792 09:28:55.526762 972 |3 6 12|[0] xxxxxxxx oxxoxxxx [MSB]
1793 09:28:55.526827 973 |3 6 13|[0] xxxxxxxx ooxoxxxx [MSB]
1794 09:28:55.526893 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1795 09:28:55.526960 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1796 09:28:55.527025 976 |3 6 16|[0] xxxxxxxx ooxooooo [MSB]
1797 09:28:55.527090 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1798 09:28:55.527172 978 |3 6 18|[0] xxxoxoox oooooooo [MSB]
1799 09:28:55.527269 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1800 09:28:55.527371 991 |3 6 31|[0] oooooooo oooxoooo [MSB]
1801 09:28:55.527540 992 |3 6 32|[0] oooooooo xxoxoooo [MSB]
1802 09:28:55.527679 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1803 09:28:55.527795 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1804 09:28:55.527895 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1805 09:28:55.528011 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1806 09:28:55.528117 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1807 09:28:55.528226 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1808 09:28:55.528327 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1809 09:28:55.528424 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1810 09:28:55.528523 Byte0, DQ PI dly=987, DQM PI dly= 987
1811 09:28:55.528619 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1812 09:28:55.528714
1813 09:28:55.528810 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1814 09:28:55.528905
1815 09:28:55.529000 Byte1, DQ PI dly=982, DQM PI dly= 982
1816 09:28:55.529095 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1817 09:28:55.529190
1818 09:28:55.529285 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1819 09:28:55.529380
1820 09:28:55.529476 ==
1821 09:28:55.529542 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1822 09:28:55.529606 fsp= 1, odt_onoff= 1, Byte mode= 0
1823 09:28:55.529670 ==
1824 09:28:55.529733 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1825 09:28:55.529797
1826 09:28:55.529860 Begin, DQ Scan Range 958~1022
1827 09:28:55.529923 Write Rank1 MR14 =0x0
1828 09:28:55.529986
1829 09:28:55.530048 CH=0, VrefRange= 0, VrefLevel = 0
1830 09:28:55.530364 TX Bit0 (984~995) 12 989, Bit8 (974~986) 13 980,
1831 09:28:55.530490 TX Bit1 (982~995) 14 988, Bit9 (976~987) 12 981,
1832 09:28:55.530563 TX Bit2 (984~994) 11 989, Bit10 (980~992) 13 986,
1833 09:28:55.530632 TX Bit3 (977~990) 14 983, Bit11 (975~984) 10 979,
1834 09:28:55.530698 TX Bit4 (982~994) 13 988, Bit12 (977~987) 11 982,
1835 09:28:55.530763 TX Bit5 (979~991) 13 985, Bit13 (976~988) 13 982,
1836 09:28:55.530827 TX Bit6 (979~993) 15 986, Bit14 (976~991) 16 983,
1837 09:28:55.530891 TX Bit7 (981~994) 14 987, Bit15 (979~992) 14 985,
1838 09:28:55.530954
1839 09:28:55.531018 Write Rank1 MR14 =0x2
1840 09:28:55.531081
1841 09:28:55.531144 CH=0, VrefRange= 0, VrefLevel = 2
1842 09:28:55.531207 TX Bit0 (983~996) 14 989, Bit8 (974~988) 15 981,
1843 09:28:55.531270 TX Bit1 (981~997) 17 989, Bit9 (975~988) 14 981,
1844 09:28:55.531333 TX Bit2 (983~995) 13 989, Bit10 (980~994) 15 987,
1845 09:28:55.531407 TX Bit3 (977~991) 15 984, Bit11 (975~985) 11 980,
1846 09:28:55.531514 TX Bit4 (981~996) 16 988, Bit12 (976~988) 13 982,
1847 09:28:55.531611 TX Bit5 (979~992) 14 985, Bit13 (976~989) 14 982,
1848 09:28:55.531707 TX Bit6 (979~994) 16 986, Bit14 (975~992) 18 983,
1849 09:28:55.531787 TX Bit7 (981~996) 16 988, Bit15 (979~993) 15 986,
1850 09:28:55.531852
1851 09:28:55.531915 Write Rank1 MR14 =0x4
1852 09:28:55.531978
1853 09:28:55.532040 CH=0, VrefRange= 0, VrefLevel = 4
1854 09:28:55.532104 TX Bit0 (983~997) 15 990, Bit8 (972~989) 18 980,
1855 09:28:55.532167 TX Bit1 (980~998) 19 989, Bit9 (975~989) 15 982,
1856 09:28:55.532231 TX Bit2 (983~996) 14 989, Bit10 (979~995) 17 987,
1857 09:28:55.532294 TX Bit3 (977~991) 15 984, Bit11 (974~986) 13 980,
1858 09:28:55.532356 TX Bit4 (981~997) 17 989, Bit12 (976~989) 14 982,
1859 09:28:55.532418 TX Bit5 (978~992) 15 985, Bit13 (975~989) 15 982,
1860 09:28:55.532481 TX Bit6 (978~994) 17 986, Bit14 (975~993) 19 984,
1861 09:28:55.532543 TX Bit7 (981~996) 16 988, Bit15 (978~994) 17 986,
1862 09:28:55.532605
1863 09:28:55.532667 Write Rank1 MR14 =0x6
1864 09:28:55.532730
1865 09:28:55.532792 CH=0, VrefRange= 0, VrefLevel = 6
1866 09:28:55.532854 TX Bit0 (982~998) 17 990, Bit8 (972~989) 18 980,
1867 09:28:55.532917 TX Bit1 (981~999) 19 990, Bit9 (975~989) 15 982,
1868 09:28:55.532979 TX Bit2 (982~998) 17 990, Bit10 (979~996) 18 987,
1869 09:28:55.533042 TX Bit3 (976~991) 16 983, Bit11 (974~987) 14 980,
1870 09:28:55.533108 TX Bit4 (980~998) 19 989, Bit12 (975~989) 15 982,
1871 09:28:55.533172 TX Bit5 (978~993) 16 985, Bit13 (975~990) 16 982,
1872 09:28:55.533235 TX Bit6 (979~995) 17 987, Bit14 (975~994) 20 984,
1873 09:28:55.533297 TX Bit7 (980~997) 18 988, Bit15 (977~995) 19 986,
1874 09:28:55.533360
1875 09:28:55.533422 Write Rank1 MR14 =0x8
1876 09:28:55.533508
1877 09:28:55.533571 CH=0, VrefRange= 0, VrefLevel = 8
1878 09:28:55.533633 TX Bit0 (982~998) 17 990, Bit8 (971~989) 19 980,
1879 09:28:55.533696 TX Bit1 (980~999) 20 989, Bit9 (974~990) 17 982,
1880 09:28:55.533759 TX Bit2 (983~998) 16 990, Bit10 (978~996) 19 987,
1881 09:28:55.533822 TX Bit3 (976~992) 17 984, Bit11 (974~988) 15 981,
1882 09:28:55.533884 TX Bit4 (980~998) 19 989, Bit12 (975~990) 16 982,
1883 09:28:55.533948 TX Bit5 (978~993) 16 985, Bit13 (975~990) 16 982,
1884 09:28:55.534010 TX Bit6 (978~996) 19 987, Bit14 (975~994) 20 984,
1885 09:28:55.534073 TX Bit7 (980~998) 19 989, Bit15 (978~996) 19 987,
1886 09:28:55.534135
1887 09:28:55.534197 Write Rank1 MR14 =0xa
1888 09:28:55.534259
1889 09:28:55.534321 CH=0, VrefRange= 0, VrefLevel = 10
1890 09:28:55.534387 TX Bit0 (981~999) 19 990, Bit8 (971~990) 20 980,
1891 09:28:55.534451 TX Bit1 (981~999) 19 990, Bit9 (974~990) 17 982,
1892 09:28:55.534519 TX Bit2 (981~998) 18 989, Bit10 (978~997) 20 987,
1893 09:28:55.534586 TX Bit3 (976~992) 17 984, Bit11 (973~989) 17 981,
1894 09:28:55.534650 TX Bit4 (979~998) 20 988, Bit12 (975~990) 16 982,
1895 09:28:55.534722 TX Bit5 (978~994) 17 986, Bit13 (974~991) 18 982,
1896 09:28:55.534801 TX Bit6 (978~997) 20 987, Bit14 (975~995) 21 985,
1897 09:28:55.534869 TX Bit7 (979~999) 21 989, Bit15 (977~996) 20 986,
1898 09:28:55.534936
1899 09:28:55.535021 Write Rank1 MR14 =0xc
1900 09:28:55.535119
1901 09:28:55.535214 CH=0, VrefRange= 0, VrefLevel = 12
1902 09:28:55.535310 TX Bit0 (981~999) 19 990, Bit8 (971~990) 20 980,
1903 09:28:55.535406 TX Bit1 (980~1000) 21 990, Bit9 (974~990) 17 982,
1904 09:28:55.535502 TX Bit2 (982~999) 18 990, Bit10 (978~997) 20 987,
1905 09:28:55.535598 TX Bit3 (975~993) 19 984, Bit11 (973~989) 17 981,
1906 09:28:55.535694 TX Bit4 (979~999) 21 989, Bit12 (975~990) 16 982,
1907 09:28:55.535791 TX Bit5 (978~995) 18 986, Bit13 (974~991) 18 982,
1908 09:28:55.535887 TX Bit6 (978~998) 21 988, Bit14 (974~996) 23 985,
1909 09:28:55.535983 TX Bit7 (979~999) 21 989, Bit15 (977~997) 21 987,
1910 09:28:55.536077
1911 09:28:55.536171 Write Rank1 MR14 =0xe
1912 09:28:55.536265
1913 09:28:55.536416 CH=0, VrefRange= 0, VrefLevel = 14
1914 09:28:55.536567 TX Bit0 (981~1000) 20 990, Bit8 (970~991) 22 980,
1915 09:28:55.536685 TX Bit1 (979~1000) 22 989, Bit9 (974~991) 18 982,
1916 09:28:55.536785 TX Bit2 (981~999) 19 990, Bit10 (977~997) 21 987,
1917 09:28:55.536882 TX Bit3 (975~993) 19 984, Bit11 (972~990) 19 981,
1918 09:28:55.536978 TX Bit4 (979~999) 21 989, Bit12 (974~991) 18 982,
1919 09:28:55.537074 TX Bit5 (978~996) 19 987, Bit13 (974~992) 19 983,
1920 09:28:55.537170 TX Bit6 (978~998) 21 988, Bit14 (974~996) 23 985,
1921 09:28:55.537266 TX Bit7 (979~1000) 22 989, Bit15 (977~997) 21 987,
1922 09:28:55.537360
1923 09:28:55.537467 Write Rank1 MR14 =0x10
1924 09:28:55.537562
1925 09:28:55.537658 CH=0, VrefRange= 0, VrefLevel = 16
1926 09:28:55.537753 TX Bit0 (980~1000) 21 990, Bit8 (970~991) 22 980,
1927 09:28:55.537849 TX Bit1 (979~1000) 22 989, Bit9 (973~991) 19 982,
1928 09:28:55.537946 TX Bit2 (981~1000) 20 990, Bit10 (977~998) 22 987,
1929 09:28:55.538052 TX Bit3 (975~994) 20 984, Bit11 (972~990) 19 981,
1930 09:28:55.538330 TX Bit4 (979~999) 21 989, Bit12 (974~991) 18 982,
1931 09:28:55.538409 TX Bit5 (977~997) 21 987, Bit13 (974~992) 19 983,
1932 09:28:55.538474 TX Bit6 (978~999) 22 988, Bit14 (974~997) 24 985,
1933 09:28:55.538539 TX Bit7 (979~1000) 22 989, Bit15 (977~998) 22 987,
1934 09:28:55.538616
1935 09:28:55.538688 Write Rank1 MR14 =0x12
1936 09:28:55.538776
1937 09:28:55.538844 CH=0, VrefRange= 0, VrefLevel = 18
1938 09:28:55.538907 TX Bit0 (980~1001) 22 990, Bit8 (970~991) 22 980,
1939 09:28:55.538971 TX Bit1 (979~1001) 23 990, Bit9 (973~992) 20 982,
1940 09:28:55.539037 TX Bit2 (980~1000) 21 990, Bit10 (977~998) 22 987,
1941 09:28:55.539113 TX Bit3 (974~994) 21 984, Bit11 (971~990) 20 980,
1942 09:28:55.539220 TX Bit4 (978~1000) 23 989, Bit12 (973~992) 20 982,
1943 09:28:55.757504 TX Bit5 (977~998) 22 987, Bit13 (973~993) 21 983,
1944 09:28:55.757656 TX Bit6 (978~999) 22 988, Bit14 (973~997) 25 985,
1945 09:28:55.757734 TX Bit7 (979~1000) 22 989, Bit15 (976~998) 23 987,
1946 09:28:55.757805
1947 09:28:55.757875 Write Rank1 MR14 =0x14
1948 09:28:55.757942
1949 09:28:55.758007 CH=0, VrefRange= 0, VrefLevel = 20
1950 09:28:55.758072 TX Bit0 (979~1001) 23 990, Bit8 (970~992) 23 981,
1951 09:28:55.758138 TX Bit1 (978~1001) 24 989, Bit9 (972~992) 21 982,
1952 09:28:55.758202 TX Bit2 (980~1000) 21 990, Bit10 (977~999) 23 988,
1953 09:28:55.758266 TX Bit3 (974~995) 22 984, Bit11 (971~991) 21 981,
1954 09:28:55.758329 TX Bit4 (978~1000) 23 989, Bit12 (973~993) 21 983,
1955 09:28:55.758393 TX Bit5 (977~998) 22 987, Bit13 (973~994) 22 983,
1956 09:28:55.758456 TX Bit6 (977~1000) 24 988, Bit14 (973~997) 25 985,
1957 09:28:55.758519 TX Bit7 (979~1001) 23 990, Bit15 (976~998) 23 987,
1958 09:28:55.758582
1959 09:28:55.758646 Write Rank1 MR14 =0x16
1960 09:28:55.758708
1961 09:28:55.758770 CH=0, VrefRange= 0, VrefLevel = 22
1962 09:28:55.758833 TX Bit0 (979~1002) 24 990, Bit8 (969~992) 24 980,
1963 09:28:55.758895 TX Bit1 (979~1002) 24 990, Bit9 (972~993) 22 982,
1964 09:28:55.758958 TX Bit2 (980~1001) 22 990, Bit10 (977~999) 23 988,
1965 09:28:55.759021 TX Bit3 (974~995) 22 984, Bit11 (970~991) 22 980,
1966 09:28:55.759084 TX Bit4 (978~1000) 23 989, Bit12 (973~993) 21 983,
1967 09:28:55.759146 TX Bit5 (976~999) 24 987, Bit13 (972~995) 24 983,
1968 09:28:55.759209 TX Bit6 (977~1000) 24 988, Bit14 (972~998) 27 985,
1969 09:28:55.759271 TX Bit7 (978~1001) 24 989, Bit15 (976~999) 24 987,
1970 09:28:55.759333
1971 09:28:55.759395 Write Rank1 MR14 =0x18
1972 09:28:55.759456
1973 09:28:55.759518 CH=0, VrefRange= 0, VrefLevel = 24
1974 09:28:55.759581 TX Bit0 (979~1002) 24 990, Bit8 (969~993) 25 981,
1975 09:28:55.759643 TX Bit1 (978~1002) 25 990, Bit9 (971~993) 23 982,
1976 09:28:55.759706 TX Bit2 (979~1002) 24 990, Bit10 (976~999) 24 987,
1977 09:28:55.759768 TX Bit3 (973~996) 24 984, Bit11 (970~992) 23 981,
1978 09:28:55.759830 TX Bit4 (978~1001) 24 989, Bit12 (972~994) 23 983,
1979 09:28:55.759893 TX Bit5 (976~999) 24 987, Bit13 (972~996) 25 984,
1980 09:28:55.759955 TX Bit6 (977~1000) 24 988, Bit14 (972~997) 26 984,
1981 09:28:55.760017 TX Bit7 (978~1002) 25 990, Bit15 (976~999) 24 987,
1982 09:28:55.760079
1983 09:28:55.760141 Write Rank1 MR14 =0x1a
1984 09:28:55.760204
1985 09:28:55.760266 CH=0, VrefRange= 0, VrefLevel = 26
1986 09:28:55.760328 TX Bit0 (979~1003) 25 991, Bit8 (969~994) 26 981,
1987 09:28:55.760390 TX Bit1 (978~1002) 25 990, Bit9 (971~995) 25 983,
1988 09:28:55.760453 TX Bit2 (979~1002) 24 990, Bit10 (976~1000) 25 988,
1989 09:28:55.760515 TX Bit3 (973~997) 25 985, Bit11 (970~993) 24 981,
1990 09:28:55.760577 TX Bit4 (978~1002) 25 990, Bit12 (972~995) 24 983,
1991 09:28:55.760639 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
1992 09:28:55.760701 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
1993 09:28:55.760763 TX Bit7 (978~1002) 25 990, Bit15 (976~999) 24 987,
1994 09:28:55.760824
1995 09:28:55.760887 Write Rank1 MR14 =0x1c
1996 09:28:55.760949
1997 09:28:55.761011 CH=0, VrefRange= 0, VrefLevel = 28
1998 09:28:55.761073 TX Bit0 (979~1004) 26 991, Bit8 (969~994) 26 981,
1999 09:28:55.761135 TX Bit1 (978~1003) 26 990, Bit9 (971~995) 25 983,
2000 09:28:55.761198 TX Bit2 (979~1003) 25 991, Bit10 (976~1000) 25 988,
2001 09:28:55.761260 TX Bit3 (972~998) 27 985, Bit11 (970~994) 25 982,
2002 09:28:55.761322 TX Bit4 (978~1002) 25 990, Bit12 (971~996) 26 983,
2003 09:28:55.761387 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
2004 09:28:55.761460 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
2005 09:28:55.761525 TX Bit7 (978~1003) 26 990, Bit15 (975~999) 25 987,
2006 09:28:55.761587
2007 09:28:55.761649 Write Rank1 MR14 =0x1e
2008 09:28:55.761711
2009 09:28:55.761772 CH=0, VrefRange= 0, VrefLevel = 30
2010 09:28:55.761834 TX Bit0 (979~1004) 26 991, Bit8 (969~994) 26 981,
2011 09:28:55.761897 TX Bit1 (978~1003) 26 990, Bit9 (971~995) 25 983,
2012 09:28:55.761959 TX Bit2 (979~1003) 25 991, Bit10 (976~1000) 25 988,
2013 09:28:55.762021 TX Bit3 (972~998) 27 985, Bit11 (970~994) 25 982,
2014 09:28:55.762083 TX Bit4 (978~1002) 25 990, Bit12 (971~996) 26 983,
2015 09:28:55.762146 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
2016 09:28:55.762208 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
2017 09:28:55.762270 TX Bit7 (978~1003) 26 990, Bit15 (975~999) 25 987,
2018 09:28:55.762332
2019 09:28:55.762412 Write Rank1 MR14 =0x20
2020 09:28:55.762480
2021 09:28:55.762543 CH=0, VrefRange= 0, VrefLevel = 32
2022 09:28:55.762605 TX Bit0 (979~1004) 26 991, Bit8 (969~994) 26 981,
2023 09:28:55.762668 TX Bit1 (978~1003) 26 990, Bit9 (971~995) 25 983,
2024 09:28:55.762730 TX Bit2 (979~1003) 25 991, Bit10 (976~1000) 25 988,
2025 09:28:55.762793 TX Bit3 (972~998) 27 985, Bit11 (970~994) 25 982,
2026 09:28:55.762855 TX Bit4 (978~1002) 25 990, Bit12 (971~996) 26 983,
2027 09:28:55.762917 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
2028 09:28:55.762979 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
2029 09:28:55.763251 TX Bit7 (978~1003) 26 990, Bit15 (975~999) 25 987,
2030 09:28:55.763321
2031 09:28:55.763385 Write Rank1 MR14 =0x22
2032 09:28:55.763447
2033 09:28:55.763510 CH=0, VrefRange= 0, VrefLevel = 34
2034 09:28:55.763573 TX Bit0 (979~1004) 26 991, Bit8 (969~994) 26 981,
2035 09:28:55.763637 TX Bit1 (978~1003) 26 990, Bit9 (971~995) 25 983,
2036 09:28:55.763701 TX Bit2 (979~1003) 25 991, Bit10 (976~1000) 25 988,
2037 09:28:55.763764 TX Bit3 (972~998) 27 985, Bit11 (970~994) 25 982,
2038 09:28:55.763826 TX Bit4 (978~1002) 25 990, Bit12 (971~996) 26 983,
2039 09:28:55.763889 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
2040 09:28:55.763953 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
2041 09:28:55.764018 TX Bit7 (978~1003) 26 990, Bit15 (975~999) 25 987,
2042 09:28:55.764081
2043 09:28:55.764144 Write Rank1 MR14 =0x24
2044 09:28:55.764207
2045 09:28:55.764270 CH=0, VrefRange= 0, VrefLevel = 36
2046 09:28:55.764332 TX Bit0 (979~1004) 26 991, Bit8 (969~994) 26 981,
2047 09:28:55.764395 TX Bit1 (978~1003) 26 990, Bit9 (971~995) 25 983,
2048 09:28:55.764458 TX Bit2 (979~1003) 25 991, Bit10 (976~1000) 25 988,
2049 09:28:55.764521 TX Bit3 (972~998) 27 985, Bit11 (970~994) 25 982,
2050 09:28:55.764583 TX Bit4 (978~1002) 25 990, Bit12 (971~996) 26 983,
2051 09:28:55.764646 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
2052 09:28:55.764708 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
2053 09:28:55.764771 TX Bit7 (978~1003) 26 990, Bit15 (975~999) 25 987,
2054 09:28:55.764833
2055 09:28:55.764895 Write Rank1 MR14 =0x26
2056 09:28:55.764958
2057 09:28:55.765020 CH=0, VrefRange= 0, VrefLevel = 38
2058 09:28:55.765083 TX Bit0 (979~1004) 26 991, Bit8 (969~994) 26 981,
2059 09:28:55.765146 TX Bit1 (978~1003) 26 990, Bit9 (971~995) 25 983,
2060 09:28:55.765209 TX Bit2 (979~1003) 25 991, Bit10 (976~1000) 25 988,
2061 09:28:55.765273 TX Bit3 (972~998) 27 985, Bit11 (970~994) 25 982,
2062 09:28:55.765336 TX Bit4 (978~1002) 25 990, Bit12 (971~996) 26 983,
2063 09:28:55.765398 TX Bit5 (976~999) 24 987, Bit13 (971~996) 26 983,
2064 09:28:55.765470 TX Bit6 (977~1001) 25 989, Bit14 (972~998) 27 985,
2065 09:28:55.765533 TX Bit7 (978~1003) 26 990, Bit15 (975~999) 25 987,
2066 09:28:55.765596
2067 09:28:55.765659
2068 09:28:55.765721 TX Vref found, early break! 368< 388
2069 09:28:55.765785 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2070 09:28:55.765847 u1DelayCellOfst[0]=7 cells (6 PI)
2071 09:28:55.765910 u1DelayCellOfst[1]=6 cells (5 PI)
2072 09:28:55.765972 u1DelayCellOfst[2]=7 cells (6 PI)
2073 09:28:55.766035 u1DelayCellOfst[3]=0 cells (0 PI)
2074 09:28:55.766097 u1DelayCellOfst[4]=6 cells (5 PI)
2075 09:28:55.766159 u1DelayCellOfst[5]=2 cells (2 PI)
2076 09:28:55.766221 u1DelayCellOfst[6]=5 cells (4 PI)
2077 09:28:55.766283 u1DelayCellOfst[7]=6 cells (5 PI)
2078 09:28:55.766351 Byte0, DQ PI dly=985, DQM PI dly= 988
2079 09:28:55.766439 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2080 09:28:55.766504
2081 09:28:55.766566 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2082 09:28:55.766630
2083 09:28:55.766692 u1DelayCellOfst[8]=0 cells (0 PI)
2084 09:28:55.766754 u1DelayCellOfst[9]=2 cells (2 PI)
2085 09:28:55.766816 u1DelayCellOfst[10]=9 cells (7 PI)
2086 09:28:55.766879 u1DelayCellOfst[11]=1 cells (1 PI)
2087 09:28:55.766940 u1DelayCellOfst[12]=2 cells (2 PI)
2088 09:28:55.767002 u1DelayCellOfst[13]=2 cells (2 PI)
2089 09:28:55.767064 u1DelayCellOfst[14]=5 cells (4 PI)
2090 09:28:55.767126 u1DelayCellOfst[15]=7 cells (6 PI)
2091 09:28:55.767188 Byte1, DQ PI dly=981, DQM PI dly= 984
2092 09:28:55.767250 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2093 09:28:55.767313
2094 09:28:55.767376 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2095 09:28:55.767440
2096 09:28:55.767502 Write Rank1 MR14 =0x1c
2097 09:28:55.767565
2098 09:28:55.767627 Final TX Range 0 Vref 28
2099 09:28:55.767690
2100 09:28:55.767752 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2101 09:28:55.767816
2102 09:28:55.767878 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2103 09:28:55.767942 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2104 09:28:55.768005 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2105 09:28:55.768068 wait MRW command Rank1 MR3 =0xb0 fired (1)
2106 09:28:55.768131 Write Rank1 MR3 =0xb0
2107 09:28:55.768194 DramC Write-DBI on
2108 09:28:55.768256 ==
2109 09:28:55.768319 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2110 09:28:55.768382 fsp= 1, odt_onoff= 1, Byte mode= 0
2111 09:28:55.768446 ==
2112 09:28:55.768509 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2113 09:28:55.768571
2114 09:28:55.768634 Begin, DQ Scan Range 704~768
2115 09:28:55.768696
2116 09:28:55.768758
2117 09:28:55.768820 TX Vref Scan disable
2118 09:28:55.768883 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2119 09:28:55.768948 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2120 09:28:55.769012 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2121 09:28:55.769076 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2122 09:28:55.769140 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2123 09:28:55.769203 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2124 09:28:55.769266 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2125 09:28:55.769331 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2126 09:28:55.769394 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2127 09:28:55.769463 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2128 09:28:55.769526 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2129 09:28:55.769589 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2130 09:28:55.769653 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2131 09:28:55.769716 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2132 09:28:55.769779 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2133 09:28:55.769843 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2134 09:28:55.769906 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2135 09:28:55.769970 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2136 09:28:55.770034 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2137 09:28:55.770097 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2138 09:28:55.770160 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2139 09:28:55.770224 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2140 09:28:55.770288 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2141 09:28:55.770562 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2142 09:28:55.770642 Byte0, DQ PI dly=733, DQM PI dly= 733
2143 09:28:55.770709 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2144 09:28:55.770774
2145 09:28:55.770839 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2146 09:28:55.770903
2147 09:28:55.770967 Byte1, DQ PI dly=727, DQM PI dly= 727
2148 09:28:55.771030 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
2149 09:28:55.771094
2150 09:28:55.771157 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
2151 09:28:55.771221
2152 09:28:55.771283 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2153 09:28:55.771347 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2154 09:28:55.771411 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2155 09:28:55.771474 wait MRW command Rank1 MR3 =0x30 fired (1)
2156 09:28:55.771537 Write Rank1 MR3 =0x30
2157 09:28:55.771600 DramC Write-DBI off
2158 09:28:55.771662
2159 09:28:55.771724 [DATLAT]
2160 09:28:55.771786 Freq=1600, CH0 RK1, use_rxtx_scan=0
2161 09:28:55.771850
2162 09:28:55.771911 DATLAT Default: 0x10
2163 09:28:55.771974 7, 0xFFFF, sum=0
2164 09:28:55.772037 8, 0xFFFF, sum=0
2165 09:28:55.772101 9, 0xFFFF, sum=0
2166 09:28:55.772164 10, 0xFFFF, sum=0
2167 09:28:55.772228 11, 0xFFFF, sum=0
2168 09:28:55.772291 12, 0xFFFF, sum=0
2169 09:28:55.772354 13, 0xFFFF, sum=0
2170 09:28:55.772417 14, 0x0, sum=1
2171 09:28:55.772480 15, 0x0, sum=2
2172 09:28:55.772543 16, 0x0, sum=3
2173 09:28:55.772607 17, 0x0, sum=4
2174 09:28:55.772670 pattern=2 first_step=14 total pass=5 best_step=16
2175 09:28:55.772732 ==
2176 09:28:55.772796 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2177 09:28:55.772859 fsp= 1, odt_onoff= 1, Byte mode= 0
2178 09:28:55.772922 ==
2179 09:28:55.773180 Start DQ dly to find pass range UseTestEngine =1
2180 09:28:55.779894 x-axis: bit #, y-axis: DQ dly (-127~63)
2181 09:28:55.780000 RX Vref Scan = 0
2182 09:28:55.782965 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2183 09:28:55.786294 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2184 09:28:55.789489 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2185 09:28:55.792814 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2186 09:28:55.796170 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2187 09:28:55.796292 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2188 09:28:55.799512 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2189 09:28:55.802638 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2190 09:28:55.805706 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2191 09:28:55.809241 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2192 09:28:55.812238 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2193 09:28:55.815557 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2194 09:28:55.818750 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2195 09:28:55.822195 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2196 09:28:55.822296 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2197 09:28:55.825401 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2198 09:28:55.828562 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2199 09:28:55.832065 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2200 09:28:55.835288 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2201 09:28:55.838475 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2202 09:28:55.841859 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2203 09:28:55.844997 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2204 09:28:55.845100 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2205 09:28:55.848582 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2206 09:28:55.851900 -2, [0] xxxoxxxx ooxoxxxx [MSB]
2207 09:28:55.855217 -1, [0] xxxoxxxx ooxoooxx [MSB]
2208 09:28:55.858006 0, [0] xxxoxoxx ooxoooxx [MSB]
2209 09:28:55.861461 1, [0] xxxoxoox ooxoooxx [MSB]
2210 09:28:55.864888 2, [0] xxxoxoox ooxoooox [MSB]
2211 09:28:55.864993 3, [0] xxxoooox ooxoooox [MSB]
2212 09:28:55.868110 4, [0] ooxooooo ooxoooox [MSB]
2213 09:28:55.871428 5, [0] ooxooooo ooxooooo [MSB]
2214 09:28:55.875701 32, [0] oooxoooo oooooooo [MSB]
2215 09:28:55.878608 33, [0] oooxoooo xooxoooo [MSB]
2216 09:28:55.882311 34, [0] oooxoooo xooxoooo [MSB]
2217 09:28:55.885230 35, [0] oooxoxoo xxoxxxoo [MSB]
2218 09:28:55.888661 36, [0] oooxoxxo xxoxxxxo [MSB]
2219 09:28:55.891839 37, [0] oooxoxxx xxoxxxxo [MSB]
2220 09:28:55.895175 38, [0] oooxoxxx xxoxxxxx [MSB]
2221 09:28:55.895305 39, [0] oxoxxxxx xxoxxxxx [MSB]
2222 09:28:55.898539 40, [0] xxoxxxxx xxoxxxxx [MSB]
2223 09:28:55.901860 41, [0] xxxxxxxx xxxxxxxx [MSB]
2224 09:28:55.904805 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2225 09:28:55.908067 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2226 09:28:55.911384 iDelay=41, Bit 2, Center 23 (6 ~ 40) 35
2227 09:28:55.917853 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2228 09:28:55.921269 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
2229 09:28:55.924517 iDelay=41, Bit 5, Center 17 (0 ~ 34) 35
2230 09:28:55.927816 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2231 09:28:55.931143 iDelay=41, Bit 7, Center 20 (4 ~ 36) 33
2232 09:28:55.934410 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2233 09:28:55.937765 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2234 09:28:55.940982 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
2235 09:28:55.944304 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2236 09:28:55.947395 iDelay=41, Bit 12, Center 16 (-1 ~ 34) 36
2237 09:28:55.954087 iDelay=41, Bit 13, Center 16 (-1 ~ 34) 36
2238 09:28:55.957304 iDelay=41, Bit 14, Center 18 (2 ~ 35) 34
2239 09:28:55.960528 iDelay=41, Bit 15, Center 21 (5 ~ 37) 33
2240 09:28:55.960625 ==
2241 09:28:55.963891 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2242 09:28:55.967171 fsp= 1, odt_onoff= 1, Byte mode= 0
2243 09:28:55.967269 ==
2244 09:28:55.970497 DQS Delay:
2245 09:28:55.970593 DQS0 = 0, DQS1 = 0
2246 09:28:55.973842 DQM Delay:
2247 09:28:55.973938 DQM0 = 19, DQM1 = 17
2248 09:28:55.974015 DQ Delay:
2249 09:28:55.976820 DQ0 =21, DQ1 =21, DQ2 =23, DQ3 =14
2250 09:28:55.980055 DQ4 =20, DQ5 =17, DQ6 =18, DQ7 =20
2251 09:28:55.983762 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2252 09:28:55.987006 DQ12 =16, DQ13 =16, DQ14 =18, DQ15 =21
2253 09:28:55.987105
2254 09:28:55.990146
2255 09:28:55.990242
2256 09:28:55.990319 [DramC_TX_OE_Calibration] TA2
2257 09:28:55.993242 Original DQ_B0 (3 6) =30, OEN = 27
2258 09:28:55.996560 Original DQ_B1 (3 6) =30, OEN = 27
2259 09:28:55.999822 23, 0x0, End_B0=23 End_B1=23
2260 09:28:56.003138 24, 0x0, End_B0=24 End_B1=24
2261 09:28:56.006436 25, 0x0, End_B0=25 End_B1=25
2262 09:28:56.006543 26, 0x0, End_B0=26 End_B1=26
2263 09:28:56.009831 27, 0x0, End_B0=27 End_B1=27
2264 09:28:56.013084 28, 0x0, End_B0=28 End_B1=28
2265 09:28:56.016166 29, 0x0, End_B0=29 End_B1=29
2266 09:28:56.019538 30, 0x0, End_B0=30 End_B1=30
2267 09:28:56.019646 31, 0xFFFF, End_B0=30 End_B1=30
2268 09:28:56.025940 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2269 09:28:56.032825 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2270 09:28:56.032932
2271 09:28:56.033011
2272 09:28:56.036115 Write Rank1 MR23 =0x3f
2273 09:28:56.036239 [DQSOSC]
2274 09:28:56.042459 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5a5, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2275 09:28:56.048789 CH0_RK1: MR19=0x202, MR18=0xA5A5, DQSOSC=465, MR23=63, INC=11, DEC=17
2276 09:28:56.052317 Write Rank1 MR23 =0x3f
2277 09:28:56.052443 [DQSOSC]
2278 09:28:56.062105 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6a6, (MSB)MR19= 0x202, tDQSOscB0 = 464 ps tDQSOscB1 = 464 ps
2279 09:28:56.062209 CH0 RK1: MR19=202, MR18=A6A6
2280 09:28:56.065280 [RxdqsGatingPostProcess] freq 1600
2281 09:28:56.072035 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2282 09:28:56.072139 Rank: 0
2283 09:28:56.075084 best DQS0 dly(2T, 0.5T) = (2, 6)
2284 09:28:56.078549 best DQS1 dly(2T, 0.5T) = (2, 6)
2285 09:28:56.081901 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2286 09:28:56.085241 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2287 09:28:56.085339 Rank: 1
2288 09:28:56.088248 best DQS0 dly(2T, 0.5T) = (2, 6)
2289 09:28:56.091454 best DQS1 dly(2T, 0.5T) = (2, 6)
2290 09:28:56.094690 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2291 09:28:56.098347 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2292 09:28:56.101384 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2293 09:28:56.104754 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2294 09:28:56.111335 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2295 09:28:56.114650 Write Rank0 MR13 =0x59
2296 09:28:56.114782 ==
2297 09:28:56.117972 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2298 09:28:56.121115 fsp= 1, odt_onoff= 1, Byte mode= 0
2299 09:28:56.121290 ==
2300 09:28:56.124212 === u2Vref_new: 0x56 --> 0x3a
2301 09:28:56.127619 === u2Vref_new: 0x58 --> 0x58
2302 09:28:56.130659 === u2Vref_new: 0x5a --> 0x5a
2303 09:28:56.134185 === u2Vref_new: 0x5c --> 0x78
2304 09:28:56.137390 === u2Vref_new: 0x5e --> 0x7a
2305 09:28:56.140870 === u2Vref_new: 0x60 --> 0x90
2306 09:28:56.143715 [CA 0] Center 37 (12~63) winsize 52
2307 09:28:56.147160 [CA 1] Center 37 (12~63) winsize 52
2308 09:28:56.150458 [CA 2] Center 35 (7~63) winsize 57
2309 09:28:56.153477 [CA 3] Center 35 (7~63) winsize 57
2310 09:28:56.156816 [CA 4] Center 34 (5~63) winsize 59
2311 09:28:56.160081 [CA 5] Center 28 (-1~58) winsize 60
2312 09:28:56.160291
2313 09:28:56.163285 [CATrainingPosCal] consider 1 rank data
2314 09:28:56.166701 u2DelayCellTimex100 = 744/100 ps
2315 09:28:56.169847 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2316 09:28:56.173190 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2317 09:28:56.176583 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2318 09:28:56.179763 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2319 09:28:56.183142 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2320 09:28:56.186531 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2321 09:28:56.186653
2322 09:28:56.193054 CA PerBit enable=1, Macro0, CA PI delay=28
2323 09:28:56.193161 === u2Vref_new: 0x5a --> 0x5a
2324 09:28:56.193238
2325 09:28:56.196317 Vref(ca) range 1: 26
2326 09:28:56.196412
2327 09:28:56.199687 CS Dly= 11 (42-0-32)
2328 09:28:56.199790 Write Rank0 MR13 =0xd8
2329 09:28:56.202722 Write Rank0 MR13 =0xd8
2330 09:28:56.206044 Write Rank0 MR12 =0x5a
2331 09:28:56.206149 Write Rank1 MR13 =0x59
2332 09:28:56.206224 ==
2333 09:28:56.212452 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2334 09:28:56.215816 fsp= 1, odt_onoff= 1, Byte mode= 0
2335 09:28:56.215910 ==
2336 09:28:56.219181 === u2Vref_new: 0x56 --> 0x3a
2337 09:28:56.222560 === u2Vref_new: 0x58 --> 0x58
2338 09:28:56.225648 === u2Vref_new: 0x5a --> 0x5a
2339 09:28:56.228688 === u2Vref_new: 0x5c --> 0x78
2340 09:28:56.232228 === u2Vref_new: 0x5e --> 0x7a
2341 09:28:56.232315 === u2Vref_new: 0x60 --> 0x90
2342 09:28:56.235902 [CA 0] Center 37 (12~63) winsize 52
2343 09:28:56.238867 [CA 1] Center 37 (11~63) winsize 53
2344 09:28:56.242428 [CA 2] Center 34 (5~63) winsize 59
2345 09:28:56.245300 [CA 3] Center 35 (8~63) winsize 56
2346 09:28:56.248673 [CA 4] Center 34 (5~63) winsize 59
2347 09:28:56.252180 [CA 5] Center 28 (-1~58) winsize 60
2348 09:28:56.252269
2349 09:28:56.255248 [CATrainingPosCal] consider 2 rank data
2350 09:28:56.258598 u2DelayCellTimex100 = 744/100 ps
2351 09:28:56.261737 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2352 09:28:56.268354 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2353 09:28:56.271786 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2354 09:28:56.274989 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2355 09:28:56.278358 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2356 09:28:56.281425 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2357 09:28:56.281525
2358 09:28:56.284926 CA PerBit enable=1, Macro0, CA PI delay=28
2359 09:28:56.288183 === u2Vref_new: 0x5c --> 0x78
2360 09:28:56.288277
2361 09:28:56.291253 Vref(ca) range 1: 28
2362 09:28:56.291346
2363 09:28:56.291419 CS Dly= 11 (42-0-32)
2364 09:28:56.294678 Write Rank1 MR13 =0xd8
2365 09:28:56.297992 Write Rank1 MR13 =0xd8
2366 09:28:56.298087 Write Rank1 MR12 =0x5c
2367 09:28:56.301162 [RankSwap] Rank num 2, (Multi 1), Rank 0
2368 09:28:56.304544 Write Rank0 MR2 =0xad
2369 09:28:56.304636 [Write Leveling]
2370 09:28:56.307927 delay byte0 byte1 byte2 byte3
2371 09:28:56.308019
2372 09:28:56.311127 10 0 0
2373 09:28:56.311221 11 0 0
2374 09:28:56.314108 12 0 0
2375 09:28:56.314203 13 0 0
2376 09:28:56.317715 14 0 0
2377 09:28:56.317802 15 0 0
2378 09:28:56.317882 16 0 0
2379 09:28:56.320718 17 0 0
2380 09:28:56.320816 18 0 0
2381 09:28:56.323918 19 0 0
2382 09:28:56.324067 20 0 0
2383 09:28:56.324196 21 0 0
2384 09:28:56.327175 22 0 0
2385 09:28:56.327312 23 0 0
2386 09:28:56.330754 24 0 0
2387 09:28:56.330851 25 0 0
2388 09:28:56.333874 26 0 0
2389 09:28:56.333982 27 0 0
2390 09:28:56.334074 28 0 0
2391 09:28:56.337021 29 0 ff
2392 09:28:56.337138 30 0 ff
2393 09:28:56.340448 31 0 ff
2394 09:28:56.340543 32 0 ff
2395 09:28:56.343768 33 0 ff
2396 09:28:56.343893 34 0 ff
2397 09:28:56.346976 35 0 ff
2398 09:28:56.347099 36 ff ff
2399 09:28:56.347215 37 0 ff
2400 09:28:56.350330 38 ff ff
2401 09:28:56.350444 39 ff ff
2402 09:28:56.353548 40 ff ff
2403 09:28:56.353648 41 ff ff
2404 09:28:56.356825 42 ff ff
2405 09:28:56.356954 43 ff ff
2406 09:28:56.360018 44 ff ff
2407 09:28:56.363327 pass bytecount = 0xff (0xff: all bytes pass)
2408 09:28:56.363418
2409 09:28:56.363499 DQS0 dly: 38
2410 09:28:56.366808 DQS1 dly: 29
2411 09:28:56.366944 Write Rank0 MR2 =0x2d
2412 09:28:56.373050 [RankSwap] Rank num 2, (Multi 1), Rank 0
2413 09:28:56.373188 Write Rank0 MR1 =0xd6
2414 09:28:56.373318 [Gating]
2415 09:28:56.373464 ==
2416 09:28:56.379638 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2417 09:28:56.382969 fsp= 1, odt_onoff= 1, Byte mode= 0
2418 09:28:56.383088 ==
2419 09:28:56.386431 3 1 0 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2420 09:28:56.392866 3 1 4 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2421 09:28:56.396071 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2422 09:28:56.399562 3 1 12 |2c2b 100f |(11 11)(11 11) |(0 0)(0 0)| 0
2423 09:28:56.406084 3 1 16 |2c2b 3636 |(11 11)(0 0) |(1 0)(0 0)| 0
2424 09:28:56.409354 3 1 20 |2c2b 1212 |(11 11)(11 11) |(1 0)(1 1)| 0
2425 09:28:56.412540 3 1 24 |2c2b f0f |(11 11)(11 11) |(1 0)(1 1)| 0
2426 09:28:56.419194 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2427 09:28:56.422412 3 2 0 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 1)| 0
2428 09:28:56.425374 3 2 4 |2c2b 3332 |(11 11)(11 11) |(1 0)(1 1)| 0
2429 09:28:56.432165 3 2 8 |2c2b 1a1a |(11 11)(11 11) |(1 0)(1 1)| 0
2430 09:28:56.435526 [Byte 1] Lead/lag falling Transition (3, 2, 8)
2431 09:28:56.438674 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2432 09:28:56.441999 3 2 16 |302 3433 |(11 11)(11 11) |(0 0)(0 1)| 0
2433 09:28:56.448289 3 2 20 |3534 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
2434 09:28:56.451744 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2435 09:28:56.455049 3 2 28 |3534 3b3a |(11 11)(11 11) |(0 0)(1 1)| 0
2436 09:28:56.461606 [Byte 1] Lead/lag Transition tap number (1)
2437 09:28:56.464918 3 3 0 |3534 1817 |(11 11)(11 11) |(0 0)(0 0)| 0
2438 09:28:56.468043 3 3 4 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
2439 09:28:56.474741 3 3 8 |3534 3b3b |(11 11)(11 11) |(1 1)(0 0)| 0
2440 09:28:56.478002 3 3 12 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
2441 09:28:56.481292 3 3 16 |3534 100f |(11 11)(11 11) |(1 1)(1 1)| 0
2442 09:28:56.487627 3 3 20 |3534 2d2d |(11 11)(11 11) |(1 1)(1 1)| 0
2443 09:28:56.491128 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2444 09:28:56.494469 3 3 24 |3534 706 |(11 11)(11 11) |(0 1)(1 1)| 0
2445 09:28:56.500985 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2446 09:28:56.504324 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2447 09:28:56.507319 [Byte 1] Lead/lag falling Transition (3, 4, 0)
2448 09:28:56.510577 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2449 09:28:56.517186 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2450 09:28:56.520531 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2451 09:28:56.523912 3 4 16 |504 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2452 09:28:56.530499 3 4 20 |1818 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2453 09:28:56.533455 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2454 09:28:56.537064 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2455 09:28:56.543384 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2456 09:28:56.546937 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2457 09:28:56.549978 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2458 09:28:56.556587 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2459 09:28:56.559961 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2460 09:28:56.563241 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2461 09:28:56.569632 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2462 09:28:56.572734 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2463 09:28:56.576310 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2464 09:28:56.582859 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2465 09:28:56.586174 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2466 09:28:56.589364 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2467 09:28:56.595745 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2468 09:28:56.599081 [Byte 0] Lead/lag Transition tap number (3)
2469 09:28:56.602312 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2470 09:28:56.605873 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2471 09:28:56.612230 [Byte 1] Lead/lag Transition tap number (2)
2472 09:28:56.615454 3 6 20 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
2473 09:28:56.618990 [Byte 0]First pass (3, 6, 20)
2474 09:28:56.622168 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2475 09:28:56.625329 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2476 09:28:56.628692 [Byte 1]First pass (3, 6, 28)
2477 09:28:56.632006 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2478 09:28:56.634969 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2479 09:28:56.641844 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2480 09:28:56.644959 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2481 09:28:56.648061 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2482 09:28:56.651620 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2483 09:28:56.658181 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2484 09:28:56.661325 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2485 09:28:56.664661 All bytes gating window > 1UI, Early break!
2486 09:28:56.664759
2487 09:28:56.667797 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2488 09:28:56.667893
2489 09:28:56.671183 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2490 09:28:56.671315
2491 09:28:56.671422
2492 09:28:56.671532
2493 09:28:56.677906 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2494 09:28:56.678007
2495 09:28:56.681065 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2496 09:28:56.681198
2497 09:28:56.681311
2498 09:28:56.684117 Write Rank0 MR1 =0x56
2499 09:28:56.684214
2500 09:28:56.687467 best RODT dly(2T, 0.5T) = (2, 3)
2501 09:28:56.687561
2502 09:28:56.690836 best RODT dly(2T, 0.5T) = (2, 3)
2503 09:28:56.690924 ==
2504 09:28:56.694140 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2505 09:28:56.697272 fsp= 1, odt_onoff= 1, Byte mode= 0
2506 09:28:56.697387 ==
2507 09:28:56.703677 Start DQ dly to find pass range UseTestEngine =0
2508 09:28:56.706996 x-axis: bit #, y-axis: DQ dly (-127~63)
2509 09:28:56.707094 RX Vref Scan = 0
2510 09:28:56.710132 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2511 09:28:56.713786 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2512 09:28:56.716915 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2513 09:28:56.720274 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2514 09:28:56.723501 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2515 09:28:56.723647 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2516 09:28:56.726775 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2517 09:28:56.730224 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2518 09:28:56.733080 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2519 09:28:56.736458 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2520 09:28:56.739783 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2521 09:28:56.742969 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2522 09:28:56.746154 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2523 09:28:56.749808 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2524 09:28:56.749927 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2525 09:28:56.753068 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2526 09:28:56.756000 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2527 09:28:56.759639 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2528 09:28:56.762793 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2529 09:28:56.766063 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2530 09:28:56.769084 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2531 09:28:56.772430 -5, [0] xxxxxxxx xxxxxxxo [MSB]
2532 09:28:56.772513 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2533 09:28:56.775770 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2534 09:28:56.779051 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2535 09:28:56.782293 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2536 09:28:56.785614 0, [0] xxxoxxxx ooxxxxxo [MSB]
2537 09:28:56.788614 1, [0] xxooxxxo oooxxxxo [MSB]
2538 09:28:56.792233 2, [0] xxooxxxo oooxxxxo [MSB]
2539 09:28:56.792328 3, [0] xxooxxxo ooooxxxo [MSB]
2540 09:28:56.795599 4, [0] xooooxxo oooooooo [MSB]
2541 09:28:56.798556 5, [0] oooooxoo oooooooo [MSB]
2542 09:28:56.801775 32, [0] oooooooo ooooooox [MSB]
2543 09:28:56.805337 33, [0] oooooooo ooooooox [MSB]
2544 09:28:56.808512 34, [0] oooooooo ooooooox [MSB]
2545 09:28:56.811480 35, [0] ooxooooo oxooooox [MSB]
2546 09:28:56.814987 36, [0] ooxxoooo oxooooox [MSB]
2547 09:28:56.815094 37, [0] ooxxoooo xxooooox [MSB]
2548 09:28:56.818205 38, [0] ooxxoooo xxooooox [MSB]
2549 09:28:56.821455 39, [0] oxxxooox xxxxxoox [MSB]
2550 09:28:56.824884 40, [0] oxxxxoox xxxxxoox [MSB]
2551 09:28:56.828084 41, [0] xxxxxoxx xxxxxxxx [MSB]
2552 09:28:56.831036 42, [0] xxxxxxxx xxxxxxxx [MSB]
2553 09:28:56.834592 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
2554 09:28:56.837899 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
2555 09:28:56.841185 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
2556 09:28:56.844476 iDelay=42, Bit 3, Center 17 (-1 ~ 35) 37
2557 09:28:56.847785 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2558 09:28:56.850966 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2559 09:28:56.854133 iDelay=42, Bit 6, Center 22 (5 ~ 40) 36
2560 09:28:56.857359 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
2561 09:28:56.863904 iDelay=42, Bit 8, Center 18 (0 ~ 36) 37
2562 09:28:56.867261 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2563 09:28:56.870427 iDelay=42, Bit 10, Center 19 (1 ~ 38) 38
2564 09:28:56.873569 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
2565 09:28:56.876899 iDelay=42, Bit 12, Center 21 (4 ~ 38) 35
2566 09:28:56.880350 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2567 09:28:56.883407 iDelay=42, Bit 14, Center 22 (4 ~ 40) 37
2568 09:28:56.886938 iDelay=42, Bit 15, Center 13 (-5 ~ 31) 37
2569 09:28:56.887033 ==
2570 09:28:56.893453 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2571 09:28:56.896719 fsp= 1, odt_onoff= 1, Byte mode= 0
2572 09:28:56.896820 ==
2573 09:28:56.896902 DQS Delay:
2574 09:28:56.899970 DQS0 = 0, DQS1 = 0
2575 09:28:56.900070 DQM Delay:
2576 09:28:56.903047 DQM0 = 20, DQM1 = 18
2577 09:28:56.903140 DQ Delay:
2578 09:28:56.906682 DQ0 =22, DQ1 =21, DQ2 =17, DQ3 =17
2579 09:28:56.909817 DQ4 =21, DQ5 =23, DQ6 =22, DQ7 =19
2580 09:28:56.913087 DQ8 =18, DQ9 =16, DQ10 =19, DQ11 =20
2581 09:28:56.916282 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
2582 09:28:56.916400
2583 09:28:56.916479
2584 09:28:56.919462 DramC Write-DBI off
2585 09:28:56.919548 ==
2586 09:28:56.923084 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2587 09:28:56.926252 fsp= 1, odt_onoff= 1, Byte mode= 0
2588 09:28:56.926347 ==
2589 09:28:56.932807 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2590 09:28:56.932930
2591 09:28:56.933037 Begin, DQ Scan Range 925~1181
2592 09:28:56.933139
2593 09:28:56.936126
2594 09:28:56.936219 TX Vref Scan disable
2595 09:28:56.939255 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2596 09:28:56.942689 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2597 09:28:56.945982 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2598 09:28:56.948941 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2599 09:28:56.955665 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2600 09:28:56.958922 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2601 09:28:56.962182 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2602 09:28:56.965488 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2603 09:28:56.968897 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2604 09:28:56.971833 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2605 09:28:56.975239 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2606 09:28:56.978532 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2607 09:28:56.981675 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2608 09:28:56.985158 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2609 09:28:56.988138 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2610 09:28:56.991787 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2611 09:28:56.994838 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2612 09:28:57.001539 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2613 09:28:57.005014 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2614 09:28:57.007920 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2615 09:28:57.011287 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2616 09:28:57.014349 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2617 09:28:57.017852 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2618 09:28:57.020854 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2619 09:28:57.024452 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2620 09:28:57.027630 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2621 09:28:57.030792 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2622 09:28:57.034088 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2623 09:28:57.037293 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2624 09:28:57.043891 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2625 09:28:57.047040 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2626 09:28:57.050690 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2627 09:28:57.053484 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2628 09:28:57.056818 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2629 09:28:57.060316 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2630 09:28:57.063442 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2631 09:28:57.066830 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2632 09:28:57.070184 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2633 09:28:57.073496 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2634 09:28:57.076851 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2635 09:28:57.080038 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2636 09:28:57.083000 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2637 09:28:57.086346 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2638 09:28:57.089846 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2639 09:28:57.093122 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2640 09:28:57.099495 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2641 09:28:57.102822 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2642 09:28:57.106116 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2643 09:28:57.109456 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2644 09:28:57.112862 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2645 09:28:57.116033 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
2646 09:28:57.119039 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
2647 09:28:57.122392 977 |3 6 17|[0] xxxxxxxx oooxoxoo [MSB]
2648 09:28:57.125896 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2649 09:28:57.128868 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2650 09:28:57.132296 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2651 09:28:57.135483 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2652 09:28:57.141872 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2653 09:28:57.145447 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
2654 09:28:57.148452 984 |3 6 24|[0] xooooxxx oooooooo [MSB]
2655 09:28:57.151893 992 |3 6 32|[0] oooooooo ooooooox [MSB]
2656 09:28:57.155050 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2657 09:28:57.158300 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2658 09:28:57.161582 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2659 09:28:57.164798 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2660 09:28:57.167999 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2661 09:28:57.174860 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2662 09:28:57.178244 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2663 09:28:57.181484 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2664 09:28:57.184866 1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]
2665 09:28:57.188087 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2666 09:28:57.190940 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2667 09:28:57.194512 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2668 09:28:57.197892 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2669 09:28:57.200918 1006 |3 6 46|[0] ooxxoooo xxxxxxxx [MSB]
2670 09:28:57.204289 1007 |3 6 47|[0] oxxxxoxx xxxxxxxx [MSB]
2671 09:28:57.210770 1008 |3 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2672 09:28:57.213976 Byte0, DQ PI dly=994, DQM PI dly= 994
2673 09:28:57.217162 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 34)
2674 09:28:57.217335
2675 09:28:57.220612 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 34)
2676 09:28:57.220752
2677 09:28:57.223957 Byte1, DQ PI dly=984, DQM PI dly= 984
2678 09:28:57.230421 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2679 09:28:57.230591
2680 09:28:57.233641 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2681 09:28:57.233762
2682 09:28:57.233841 ==
2683 09:28:57.240313 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2684 09:28:57.243698 fsp= 1, odt_onoff= 1, Byte mode= 0
2685 09:28:57.243838 ==
2686 09:28:57.246958 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2687 09:28:57.247098
2688 09:28:57.250130 Begin, DQ Scan Range 960~1024
2689 09:28:57.253064 Write Rank0 MR14 =0x0
2690 09:28:57.260356
2691 09:28:57.260519 CH=1, VrefRange= 0, VrefLevel = 0
2692 09:28:57.266704 TX Bit0 (989~1002) 14 995, Bit8 (976~990) 15 983,
2693 09:28:57.270169 TX Bit1 (985~1002) 18 993, Bit9 (977~988) 12 982,
2694 09:28:57.276647 TX Bit2 (984~999) 16 991, Bit10 (978~992) 15 985,
2695 09:28:57.280001 TX Bit3 (983~997) 15 990, Bit11 (981~991) 11 986,
2696 09:28:57.283263 TX Bit4 (985~1001) 17 993, Bit12 (979~991) 13 985,
2697 09:28:57.289673 TX Bit5 (988~1002) 15 995, Bit13 (982~993) 12 987,
2698 09:28:57.292926 TX Bit6 (986~1000) 15 993, Bit14 (979~991) 13 985,
2699 09:28:57.299462 TX Bit7 (986~1000) 15 993, Bit15 (975~984) 10 979,
2700 09:28:57.299690
2701 09:28:57.299815 Write Rank0 MR14 =0x2
2702 09:28:57.309756
2703 09:28:57.312996 CH=1, VrefRange= 0, VrefLevel = 2
2704 09:28:57.315889 TX Bit0 (988~1003) 16 995, Bit8 (976~991) 16 983,
2705 09:28:57.319196 TX Bit1 (985~1002) 18 993, Bit9 (976~989) 14 982,
2706 09:28:57.325821 TX Bit2 (984~999) 16 991, Bit10 (978~993) 16 985,
2707 09:28:57.329172 TX Bit3 (982~998) 17 990, Bit11 (980~992) 13 986,
2708 09:28:57.335489 TX Bit4 (985~1001) 17 993, Bit12 (979~992) 14 985,
2709 09:28:57.338912 TX Bit5 (987~1003) 17 995, Bit13 (980~993) 14 986,
2710 09:28:57.342236 TX Bit6 (986~1001) 16 993, Bit14 (979~992) 14 985,
2711 09:28:57.348472 TX Bit7 (986~1001) 16 993, Bit15 (975~984) 10 979,
2712 09:28:57.348599
2713 09:28:57.348699 Write Rank0 MR14 =0x4
2714 09:28:57.358876
2715 09:28:57.362118 CH=1, VrefRange= 0, VrefLevel = 4
2716 09:28:57.365286 TX Bit0 (987~1004) 18 995, Bit8 (977~991) 15 984,
2717 09:28:57.368820 TX Bit1 (985~1003) 19 994, Bit9 (976~989) 14 982,
2718 09:28:57.375231 TX Bit2 (984~1000) 17 992, Bit10 (978~993) 16 985,
2719 09:28:57.378629 TX Bit3 (982~999) 18 990, Bit11 (979~992) 14 985,
2720 09:28:57.385168 TX Bit4 (985~1002) 18 993, Bit12 (978~992) 15 985,
2721 09:28:57.388225 TX Bit5 (987~1004) 18 995, Bit13 (980~994) 15 987,
2722 09:28:57.391442 TX Bit6 (986~1002) 17 994, Bit14 (978~992) 15 985,
2723 09:28:57.398084 TX Bit7 (986~1002) 17 994, Bit15 (975~986) 12 980,
2724 09:28:57.398299
2725 09:28:57.398433 Write Rank0 MR14 =0x6
2726 09:28:57.408578
2727 09:28:57.408728 CH=1, VrefRange= 0, VrefLevel = 6
2728 09:28:57.415102 TX Bit0 (986~1005) 20 995, Bit8 (976~991) 16 983,
2729 09:28:57.418435 TX Bit1 (985~1004) 20 994, Bit9 (976~990) 15 983,
2730 09:28:57.424875 TX Bit2 (984~1000) 17 992, Bit10 (977~994) 18 985,
2731 09:28:57.428180 TX Bit3 (981~999) 19 990, Bit11 (979~993) 15 986,
2732 09:28:57.434903 TX Bit4 (984~1003) 20 993, Bit12 (978~993) 16 985,
2733 09:28:57.438231 TX Bit5 (986~1004) 19 995, Bit13 (979~995) 17 987,
2734 09:28:57.441268 TX Bit6 (985~1003) 19 994, Bit14 (978~993) 16 985,
2735 09:28:57.447791 TX Bit7 (986~1003) 18 994, Bit15 (974~987) 14 980,
2736 09:28:57.447896
2737 09:28:57.447973 Write Rank0 MR14 =0x8
2738 09:28:57.458506
2739 09:28:57.458672 CH=1, VrefRange= 0, VrefLevel = 8
2740 09:28:57.464787 TX Bit0 (986~1006) 21 996, Bit8 (976~992) 17 984,
2741 09:28:57.468223 TX Bit1 (985~1005) 21 995, Bit9 (975~990) 16 982,
2742 09:28:57.474674 TX Bit2 (984~1001) 18 992, Bit10 (977~994) 18 985,
2743 09:28:57.478064 TX Bit3 (981~999) 19 990, Bit11 (979~994) 16 986,
2744 09:28:57.484696 TX Bit4 (984~1004) 21 994, Bit12 (978~994) 17 986,
2745 09:28:57.487762 TX Bit5 (986~1005) 20 995, Bit13 (979~996) 18 987,
2746 09:28:57.491422 TX Bit6 (985~1003) 19 994, Bit14 (977~993) 17 985,
2747 09:28:57.497670 TX Bit7 (985~1003) 19 994, Bit15 (973~988) 16 980,
2748 09:28:57.497830
2749 09:28:57.497909 Write Rank0 MR14 =0xa
2750 09:28:57.508029
2751 09:28:57.511636 CH=1, VrefRange= 0, VrefLevel = 10
2752 09:28:57.514492 TX Bit0 (986~1006) 21 996, Bit8 (976~992) 17 984,
2753 09:28:57.517807 TX Bit1 (984~1005) 22 994, Bit9 (975~991) 17 983,
2754 09:28:57.524763 TX Bit2 (983~1002) 20 992, Bit10 (977~995) 19 986,
2755 09:28:57.527617 TX Bit3 (981~999) 19 990, Bit11 (978~994) 17 986,
2756 09:28:57.534333 TX Bit4 (984~1004) 21 994, Bit12 (977~995) 19 986,
2757 09:28:57.537450 TX Bit5 (986~1005) 20 995, Bit13 (979~997) 19 988,
2758 09:28:57.541025 TX Bit6 (985~1005) 21 995, Bit14 (977~994) 18 985,
2759 09:28:57.547591 TX Bit7 (985~1004) 20 994, Bit15 (972~989) 18 980,
2760 09:28:57.547742
2761 09:28:57.547867 Write Rank0 MR14 =0xc
2762 09:28:57.557889
2763 09:28:57.561143 CH=1, VrefRange= 0, VrefLevel = 12
2764 09:28:57.564704 TX Bit0 (985~1006) 22 995, Bit8 (975~993) 19 984,
2765 09:28:57.567909 TX Bit1 (985~1005) 21 995, Bit9 (975~991) 17 983,
2766 09:28:57.574235 TX Bit2 (983~1003) 21 993, Bit10 (977~996) 20 986,
2767 09:28:57.577505 TX Bit3 (982~1000) 19 991, Bit11 (978~995) 18 986,
2768 09:28:57.583940 TX Bit4 (984~1005) 22 994, Bit12 (978~996) 19 987,
2769 09:28:57.587689 TX Bit5 (986~1005) 20 995, Bit13 (978~997) 20 987,
2770 09:28:57.590940 TX Bit6 (985~1005) 21 995, Bit14 (977~995) 19 986,
2771 09:28:57.597462 TX Bit7 (985~1005) 21 995, Bit15 (973~990) 18 981,
2772 09:28:57.597570
2773 09:28:57.600300 Write Rank0 MR14 =0xe
2774 09:28:57.608204
2775 09:28:57.611278 CH=1, VrefRange= 0, VrefLevel = 14
2776 09:28:57.614483 TX Bit0 (986~1006) 21 996, Bit8 (975~993) 19 984,
2777 09:28:57.617925 TX Bit1 (984~1006) 23 995, Bit9 (974~991) 18 982,
2778 09:28:57.624507 TX Bit2 (983~1004) 22 993, Bit10 (976~997) 22 986,
2779 09:28:57.627695 TX Bit3 (980~1000) 21 990, Bit11 (978~996) 19 987,
2780 09:28:57.634200 TX Bit4 (984~1006) 23 995, Bit12 (978~996) 19 987,
2781 09:28:57.637740 TX Bit5 (985~1006) 22 995, Bit13 (978~998) 21 988,
2782 09:28:57.640959 TX Bit6 (985~1005) 21 995, Bit14 (977~996) 20 986,
2783 09:28:57.647186 TX Bit7 (985~1005) 21 995, Bit15 (971~990) 20 980,
2784 09:28:57.647291
2785 09:28:57.650490 Write Rank0 MR14 =0x10
2786 09:28:57.658225
2787 09:28:57.661123 CH=1, VrefRange= 0, VrefLevel = 16
2788 09:28:57.664687 TX Bit0 (985~1006) 22 995, Bit8 (975~994) 20 984,
2789 09:28:57.667819 TX Bit1 (984~1006) 23 995, Bit9 (974~992) 19 983,
2790 09:28:57.674330 TX Bit2 (983~1005) 23 994, Bit10 (976~997) 22 986,
2791 09:28:57.677704 TX Bit3 (979~1001) 23 990, Bit11 (978~997) 20 987,
2792 09:28:57.684110 TX Bit4 (984~1006) 23 995, Bit12 (977~997) 21 987,
2793 09:28:57.687526 TX Bit5 (985~1006) 22 995, Bit13 (978~998) 21 988,
2794 09:28:57.690772 TX Bit6 (985~1006) 22 995, Bit14 (977~997) 21 987,
2795 09:28:57.697310 TX Bit7 (985~1006) 22 995, Bit15 (971~991) 21 981,
2796 09:28:57.697450
2797 09:28:57.700650 Write Rank0 MR14 =0x12
2798 09:28:57.708374
2799 09:28:57.711773 CH=1, VrefRange= 0, VrefLevel = 18
2800 09:28:57.714763 TX Bit0 (985~1007) 23 996, Bit8 (975~995) 21 985,
2801 09:28:57.718109 TX Bit1 (984~1006) 23 995, Bit9 (974~992) 19 983,
2802 09:28:57.724742 TX Bit2 (982~1005) 24 993, Bit10 (976~998) 23 987,
2803 09:28:57.727808 TX Bit3 (980~1001) 22 990, Bit11 (978~998) 21 988,
2804 09:28:57.734433 TX Bit4 (984~1006) 23 995, Bit12 (977~998) 22 987,
2805 09:28:57.737883 TX Bit5 (985~1006) 22 995, Bit13 (978~998) 21 988,
2806 09:28:57.741288 TX Bit6 (985~1006) 22 995, Bit14 (976~997) 22 986,
2807 09:28:57.747697 TX Bit7 (985~1006) 22 995, Bit15 (971~990) 20 980,
2808 09:28:57.747799
2809 09:28:57.750643 Write Rank0 MR14 =0x14
2810 09:28:57.758450
2811 09:28:57.761794 CH=1, VrefRange= 0, VrefLevel = 20
2812 09:28:57.765040 TX Bit0 (985~1007) 23 996, Bit8 (974~995) 22 984,
2813 09:28:57.768046 TX Bit1 (984~1006) 23 995, Bit9 (973~992) 20 982,
2814 09:28:57.774737 TX Bit2 (982~1005) 24 993, Bit10 (976~998) 23 987,
2815 09:28:57.777880 TX Bit3 (979~1002) 24 990, Bit11 (977~998) 22 987,
2816 09:28:57.784680 TX Bit4 (983~1006) 24 994, Bit12 (976~998) 23 987,
2817 09:28:57.787984 TX Bit5 (985~1007) 23 996, Bit13 (977~999) 23 988,
2818 09:28:57.791299 TX Bit6 (984~1006) 23 995, Bit14 (977~998) 22 987,
2819 09:28:57.797674 TX Bit7 (985~1006) 22 995, Bit15 (970~991) 22 980,
2820 09:28:57.797828
2821 09:28:57.800625 Write Rank0 MR14 =0x16
2822 09:28:57.808728
2823 09:28:57.812104 CH=1, VrefRange= 0, VrefLevel = 22
2824 09:28:57.815464 TX Bit0 (985~1007) 23 996, Bit8 (974~996) 23 985,
2825 09:28:57.936315 TX Bit1 (984~1007) 24 995, Bit9 (972~993) 22 982,
2826 09:28:57.936557 TX Bit2 (982~1005) 24 993, Bit10 (976~998) 23 987,
2827 09:28:57.936691 TX Bit3 (978~1002) 25 990, Bit11 (977~998) 22 987,
2828 09:28:57.936843 TX Bit4 (983~1007) 25 995, Bit12 (977~998) 22 987,
2829 09:28:57.936950 TX Bit5 (985~1007) 23 996, Bit13 (977~999) 23 988,
2830 09:28:57.937095 TX Bit6 (984~1007) 24 995, Bit14 (976~998) 23 987,
2831 09:28:57.937198 TX Bit7 (984~1006) 23 995, Bit15 (970~991) 22 980,
2832 09:28:57.937296
2833 09:28:57.937442 Write Rank0 MR14 =0x18
2834 09:28:57.937546
2835 09:28:57.937692 CH=1, VrefRange= 0, VrefLevel = 24
2836 09:28:57.937796 TX Bit0 (985~1007) 23 996, Bit8 (974~996) 23 985,
2837 09:28:57.937946 TX Bit1 (984~1007) 24 995, Bit9 (972~994) 23 983,
2838 09:28:57.938048 TX Bit2 (982~1006) 25 994, Bit10 (976~998) 23 987,
2839 09:28:57.938116 TX Bit3 (978~1003) 26 990, Bit11 (977~999) 23 988,
2840 09:28:57.938244 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2841 09:28:57.938345 TX Bit5 (985~1007) 23 996, Bit13 (977~999) 23 988,
2842 09:28:57.938450 TX Bit6 (984~1007) 24 995, Bit14 (976~998) 23 987,
2843 09:28:57.938554 TX Bit7 (984~1006) 23 995, Bit15 (970~991) 22 980,
2844 09:28:57.938648
2845 09:28:57.938755 Write Rank0 MR14 =0x1a
2846 09:28:57.938853
2847 09:28:57.938956 CH=1, VrefRange= 0, VrefLevel = 26
2848 09:28:57.939061 TX Bit0 (985~1008) 24 996, Bit8 (973~997) 25 985,
2849 09:28:57.939169 TX Bit1 (983~1007) 25 995, Bit9 (972~994) 23 983,
2850 09:28:57.939269 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2851 09:28:57.939364 TX Bit3 (978~1003) 26 990, Bit11 (977~999) 23 988,
2852 09:28:57.939460 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2853 09:28:57.939763 TX Bit5 (985~1007) 23 996, Bit13 (977~999) 23 988,
2854 09:28:57.941969 TX Bit6 (984~1007) 24 995, Bit14 (976~999) 24 987,
2855 09:28:57.948664 TX Bit7 (984~1007) 24 995, Bit15 (970~992) 23 981,
2856 09:28:57.948802
2857 09:28:57.951836 Write Rank0 MR14 =0x1c
2858 09:28:57.959641
2859 09:28:57.963148 CH=1, VrefRange= 0, VrefLevel = 28
2860 09:28:57.966164 TX Bit0 (984~1008) 25 996, Bit8 (972~997) 26 984,
2861 09:28:57.970102 TX Bit1 (983~1007) 25 995, Bit9 (972~995) 24 983,
2862 09:28:57.976305 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2863 09:28:57.979449 TX Bit3 (978~1004) 27 991, Bit11 (976~999) 24 987,
2864 09:28:57.986039 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2865 09:28:57.989739 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
2866 09:28:57.992331 TX Bit6 (984~1007) 24 995, Bit14 (975~999) 25 987,
2867 09:28:57.999037 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
2868 09:28:57.999259
2869 09:28:58.002358 Write Rank0 MR14 =0x1e
2870 09:28:58.010345
2871 09:28:58.013705 CH=1, VrefRange= 0, VrefLevel = 30
2872 09:28:58.016595 TX Bit0 (984~1009) 26 996, Bit8 (972~997) 26 984,
2873 09:28:58.019985 TX Bit1 (983~1008) 26 995, Bit9 (971~995) 25 983,
2874 09:28:58.026424 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2875 09:28:58.029830 TX Bit3 (977~1004) 28 990, Bit11 (976~999) 24 987,
2876 09:28:58.036465 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2877 09:28:58.039759 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
2878 09:28:58.043067 TX Bit6 (984~1007) 24 995, Bit14 (975~999) 25 987,
2879 09:28:58.049279 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
2880 09:28:58.049406
2881 09:28:58.052604 Write Rank0 MR14 =0x20
2882 09:28:58.060870
2883 09:28:58.064015 CH=1, VrefRange= 0, VrefLevel = 32
2884 09:28:58.067344 TX Bit0 (984~1009) 26 996, Bit8 (972~997) 26 984,
2885 09:28:58.070590 TX Bit1 (983~1008) 26 995, Bit9 (971~995) 25 983,
2886 09:28:58.077139 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2887 09:28:58.080359 TX Bit3 (977~1004) 28 990, Bit11 (976~999) 24 987,
2888 09:28:58.086884 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2889 09:28:58.090164 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
2890 09:28:58.093722 TX Bit6 (984~1007) 24 995, Bit14 (975~999) 25 987,
2891 09:28:58.100227 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
2892 09:28:58.100440
2893 09:28:58.103241 Write Rank0 MR14 =0x22
2894 09:28:58.111146
2895 09:28:58.114559 CH=1, VrefRange= 0, VrefLevel = 34
2896 09:28:58.117510 TX Bit0 (984~1009) 26 996, Bit8 (972~997) 26 984,
2897 09:28:58.121266 TX Bit1 (983~1008) 26 995, Bit9 (971~995) 25 983,
2898 09:28:58.127594 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2899 09:28:58.130833 TX Bit3 (977~1004) 28 990, Bit11 (976~999) 24 987,
2900 09:28:58.137295 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2901 09:28:58.140743 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
2902 09:28:58.143893 TX Bit6 (984~1007) 24 995, Bit14 (975~999) 25 987,
2903 09:28:58.150297 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
2904 09:28:58.150422
2905 09:28:58.153648 Write Rank0 MR14 =0x24
2906 09:28:58.161683
2907 09:28:58.164848 CH=1, VrefRange= 0, VrefLevel = 36
2908 09:28:58.167942 TX Bit0 (984~1009) 26 996, Bit8 (972~997) 26 984,
2909 09:28:58.171227 TX Bit1 (983~1008) 26 995, Bit9 (971~995) 25 983,
2910 09:28:58.177847 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2911 09:28:58.181202 TX Bit3 (977~1004) 28 990, Bit11 (976~999) 24 987,
2912 09:28:58.187881 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2913 09:28:58.191118 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
2914 09:28:58.194095 TX Bit6 (984~1007) 24 995, Bit14 (975~999) 25 987,
2915 09:28:58.200669 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
2916 09:28:58.200778
2917 09:28:58.203878 Write Rank0 MR14 =0x26
2918 09:28:58.211855
2919 09:28:58.215013 CH=1, VrefRange= 0, VrefLevel = 38
2920 09:28:58.218414 TX Bit0 (984~1009) 26 996, Bit8 (972~997) 26 984,
2921 09:28:58.221885 TX Bit1 (983~1008) 26 995, Bit9 (971~995) 25 983,
2922 09:28:58.228174 TX Bit2 (981~1006) 26 993, Bit10 (975~999) 25 987,
2923 09:28:58.231467 TX Bit3 (977~1004) 28 990, Bit11 (976~999) 24 987,
2924 09:28:58.238054 TX Bit4 (983~1007) 25 995, Bit12 (976~999) 24 987,
2925 09:28:58.241446 TX Bit5 (984~1008) 25 996, Bit13 (976~999) 24 987,
2926 09:28:58.244561 TX Bit6 (984~1007) 24 995, Bit14 (975~999) 25 987,
2927 09:28:58.251326 TX Bit7 (983~1007) 25 995, Bit15 (969~992) 24 980,
2928 09:28:58.251466
2929 09:28:58.251550
2930 09:28:58.254683 TX Vref found, early break! 378< 381
2931 09:28:58.257898 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2932 09:28:58.261203 u1DelayCellOfst[0]=7 cells (6 PI)
2933 09:28:58.264242 u1DelayCellOfst[1]=6 cells (5 PI)
2934 09:28:58.267516 u1DelayCellOfst[2]=3 cells (3 PI)
2935 09:28:58.271104 u1DelayCellOfst[3]=0 cells (0 PI)
2936 09:28:58.274433 u1DelayCellOfst[4]=6 cells (5 PI)
2937 09:28:58.277251 u1DelayCellOfst[5]=7 cells (6 PI)
2938 09:28:58.280597 u1DelayCellOfst[6]=6 cells (5 PI)
2939 09:28:58.283866 u1DelayCellOfst[7]=6 cells (5 PI)
2940 09:28:58.287207 Byte0, DQ PI dly=990, DQM PI dly= 993
2941 09:28:58.290524 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2942 09:28:58.290611
2943 09:28:58.293831 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2944 09:28:58.297087
2945 09:28:58.297181 u1DelayCellOfst[8]=5 cells (4 PI)
2946 09:28:58.300369 u1DelayCellOfst[9]=3 cells (3 PI)
2947 09:28:58.303698 u1DelayCellOfst[10]=9 cells (7 PI)
2948 09:28:58.306797 u1DelayCellOfst[11]=9 cells (7 PI)
2949 09:28:58.310013 u1DelayCellOfst[12]=9 cells (7 PI)
2950 09:28:58.313187 u1DelayCellOfst[13]=9 cells (7 PI)
2951 09:28:58.316431 u1DelayCellOfst[14]=9 cells (7 PI)
2952 09:28:58.319715 u1DelayCellOfst[15]=0 cells (0 PI)
2953 09:28:58.323024 Byte1, DQ PI dly=980, DQM PI dly= 983
2954 09:28:58.326304 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2955 09:28:58.329755
2956 09:28:58.333049 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2957 09:28:58.333172
2958 09:28:58.333278 Write Rank0 MR14 =0x1e
2959 09:28:58.336099
2960 09:28:58.336191 Final TX Range 0 Vref 30
2961 09:28:58.336270
2962 09:28:58.342915 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2963 09:28:58.343010
2964 09:28:58.349323 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2965 09:28:58.355849 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2966 09:28:58.365539 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2967 09:28:58.365644 Write Rank0 MR3 =0xb0
2968 09:28:58.368974 DramC Write-DBI on
2969 09:28:58.369072 ==
2970 09:28:58.372282 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2971 09:28:58.375412 fsp= 1, odt_onoff= 1, Byte mode= 0
2972 09:28:58.375513 ==
2973 09:28:58.382089 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2974 09:28:58.382192
2975 09:28:58.382270 Begin, DQ Scan Range 703~767
2976 09:28:58.385409
2977 09:28:58.385512
2978 09:28:58.385598 TX Vref Scan disable
2979 09:28:58.388314 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2980 09:28:58.391792 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2981 09:28:58.395095 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2982 09:28:58.398424 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2983 09:28:58.405009 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2984 09:28:58.408292 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2985 09:28:58.411502 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2986 09:28:58.414789 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2987 09:28:58.417981 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2988 09:28:58.421344 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2989 09:28:58.424593 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2990 09:28:58.427617 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2991 09:28:58.430813 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2992 09:28:58.434211 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2993 09:28:58.437774 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2994 09:28:58.440681 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2995 09:28:58.443913 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2996 09:28:58.447229 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2997 09:28:58.450839 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2998 09:28:58.457053 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2999 09:28:58.460603 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3000 09:28:58.463747 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3001 09:28:58.466888 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3002 09:28:58.470379 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3003 09:28:58.476909 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3004 09:28:58.480199 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3005 09:28:58.483743 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3006 09:28:58.486934 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3007 09:28:58.489956 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3008 09:28:58.493347 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3009 09:28:58.496755 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3010 09:28:58.499914 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3011 09:28:58.503421 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3012 09:28:58.506380 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3013 09:28:58.509731 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3014 09:28:58.513164 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3015 09:28:58.516390 Byte0, DQ PI dly=739, DQM PI dly= 739
3016 09:28:58.522831 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
3017 09:28:58.522969
3018 09:28:58.526157 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
3019 09:28:58.526243
3020 09:28:58.529416 Byte1, DQ PI dly=728, DQM PI dly= 728
3021 09:28:58.536112 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3022 09:28:58.536208
3023 09:28:58.539140 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3024 09:28:58.539234
3025 09:28:58.545644 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3026 09:28:58.552338 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3027 09:28:58.558727 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3028 09:28:58.562101 wait MRW command Rank0 MR3 =0x30 fired (1)
3029 09:28:58.565784 Write Rank0 MR3 =0x30
3030 09:28:58.568842 DramC Write-DBI off
3031 09:28:58.568935
3032 09:28:58.569015 [DATLAT]
3033 09:28:58.572146 Freq=1600, CH1 RK0, use_rxtx_scan=0
3034 09:28:58.572239
3035 09:28:58.572313 DATLAT Default: 0xf
3036 09:28:58.575512 7, 0xFFFF, sum=0
3037 09:28:58.575608 8, 0xFFFF, sum=0
3038 09:28:58.578760 9, 0xFFFF, sum=0
3039 09:28:58.578860 10, 0xFFFF, sum=0
3040 09:28:58.581676 11, 0xFFFF, sum=0
3041 09:28:58.581771 12, 0xFFFF, sum=0
3042 09:28:58.585100 13, 0xFFFF, sum=0
3043 09:28:58.585202 14, 0x0, sum=1
3044 09:28:58.588172 15, 0x0, sum=2
3045 09:28:58.588258 16, 0x0, sum=3
3046 09:28:58.591671 17, 0x0, sum=4
3047 09:28:58.595037 pattern=2 first_step=14 total pass=5 best_step=16
3048 09:28:58.595141 ==
3049 09:28:58.601555 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3050 09:28:58.601680 fsp= 1, odt_onoff= 1, Byte mode= 0
3051 09:28:58.604853 ==
3052 09:28:58.607874 Start DQ dly to find pass range UseTestEngine =1
3053 09:28:58.611337 x-axis: bit #, y-axis: DQ dly (-127~63)
3054 09:28:58.611433 RX Vref Scan = 1
3055 09:28:58.720281
3056 09:28:58.720442 RX Vref found, early break!
3057 09:28:58.720523
3058 09:28:58.726551 Final RX Vref 11, apply to both rank0 and 1
3059 09:28:58.726663 ==
3060 09:28:58.729902 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3061 09:28:58.733155 fsp= 1, odt_onoff= 1, Byte mode= 0
3062 09:28:58.733272 ==
3063 09:28:58.736382 DQS Delay:
3064 09:28:58.736477 DQS0 = 0, DQS1 = 0
3065 09:28:58.736555 DQM Delay:
3066 09:28:58.739711 DQM0 = 19, DQM1 = 18
3067 09:28:58.739808 DQ Delay:
3068 09:28:58.742761 DQ0 =20, DQ1 =21, DQ2 =17, DQ3 =15
3069 09:28:58.746283 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3070 09:28:58.749397 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
3071 09:28:58.752632 DQ12 =20, DQ13 =21, DQ14 =21, DQ15 =12
3072 09:28:58.752759
3073 09:28:58.752874
3074 09:28:58.752986
3075 09:28:58.755949 [DramC_TX_OE_Calibration] TA2
3076 09:28:58.759454 Original DQ_B0 (3 6) =30, OEN = 27
3077 09:28:58.762765 Original DQ_B1 (3 6) =30, OEN = 27
3078 09:28:58.765702 23, 0x0, End_B0=23 End_B1=23
3079 09:28:58.769066 24, 0x0, End_B0=24 End_B1=24
3080 09:28:58.769199 25, 0x0, End_B0=25 End_B1=25
3081 09:28:58.772365 26, 0x0, End_B0=26 End_B1=26
3082 09:28:58.775636 27, 0x0, End_B0=27 End_B1=27
3083 09:28:58.779163 28, 0x0, End_B0=28 End_B1=28
3084 09:28:58.782368 29, 0x0, End_B0=29 End_B1=29
3085 09:28:58.782466 30, 0x0, End_B0=30 End_B1=30
3086 09:28:58.785778 31, 0xFFFF, End_B0=30 End_B1=30
3087 09:28:58.792099 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3088 09:28:58.798869 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3089 09:28:58.798969
3090 09:28:58.799046
3091 09:28:58.799118 Write Rank0 MR23 =0x3f
3092 09:28:58.802110 [DQSOSC]
3093 09:28:58.808390 [DQSOSCAuto] RK0, (LSB)MR18= 0xb5b5, (MSB)MR19= 0x202, tDQSOscB0 = 454 ps tDQSOscB1 = 454 ps
3094 09:28:58.815057 CH1_RK0: MR19=0x202, MR18=0xB5B5, DQSOSC=454, MR23=63, INC=11, DEC=17
3095 09:28:58.818352 Write Rank0 MR23 =0x3f
3096 09:28:58.818448 [DQSOSC]
3097 09:28:58.824793 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3098 09:28:58.828091 CH1 RK0: MR19=202, MR18=B6B6
3099 09:28:58.831390 [RankSwap] Rank num 2, (Multi 1), Rank 1
3100 09:28:58.834632 Write Rank0 MR2 =0xad
3101 09:28:58.834727 [Write Leveling]
3102 09:28:58.837860 delay byte0 byte1 byte2 byte3
3103 09:28:58.837960
3104 09:28:58.841161 10 0 0
3105 09:28:58.841288 11 0 0
3106 09:28:58.844580 12 0 0
3107 09:28:58.844677 13 0 0
3108 09:28:58.844754 14 0 0
3109 09:28:58.847953 15 0 0
3110 09:28:58.848059 16 0 0
3111 09:28:58.850873 17 0 0
3112 09:28:58.850970 18 0 0
3113 09:28:58.851048 19 0 0
3114 09:28:58.854209 20 0 0
3115 09:28:58.854306 21 0 0
3116 09:28:58.857543 22 0 0
3117 09:28:58.857647 23 0 0
3118 09:28:58.861038 24 0 0
3119 09:28:58.861134 25 0 0
3120 09:28:58.861247 26 0 0
3121 09:28:58.864110 27 0 0
3122 09:28:58.864223 28 0 0
3123 09:28:58.867583 29 0 0
3124 09:28:58.867679 30 0 ff
3125 09:28:58.870794 31 0 ff
3126 09:28:58.870897 32 0 ff
3127 09:28:58.870983 33 0 ff
3128 09:28:58.873938 34 0 ff
3129 09:28:58.874035 35 ff ff
3130 09:28:58.877280 36 ff ff
3131 09:28:58.877400 37 ff ff
3132 09:28:58.880701 38 ff ff
3133 09:28:58.880786 39 ff ff
3134 09:28:58.883894 40 ff ff
3135 09:28:58.884009 41 ff ff
3136 09:28:58.887198 pass bytecount = 0xff (0xff: all bytes pass)
3137 09:28:58.890579
3138 09:28:58.890663 DQS0 dly: 35
3139 09:28:58.890736 DQS1 dly: 30
3140 09:28:58.893828 Write Rank0 MR2 =0x2d
3141 09:28:58.897069 [RankSwap] Rank num 2, (Multi 1), Rank 0
3142 09:28:58.900145 Write Rank1 MR1 =0xd6
3143 09:28:58.900268 [Gating]
3144 09:28:58.900376 ==
3145 09:28:58.903445 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3146 09:28:58.906745 fsp= 1, odt_onoff= 1, Byte mode= 0
3147 09:28:58.906873 ==
3148 09:28:58.913268 3 1 0 |2c2b 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
3149 09:28:58.916392 3 1 4 |2c2b 3636 |(11 11)(0 0) |(1 1)(1 1)| 0
3150 09:28:58.919697 3 1 8 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3151 09:28:58.926565 3 1 12 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3152 09:28:58.929815 3 1 16 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 0)| 0
3153 09:28:58.933098 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3154 09:28:58.939306 3 1 24 |2c2b 808 |(11 11)(11 11) |(1 0)(1 1)| 0
3155 09:28:58.942796 3 1 28 |2c2b 1716 |(11 11)(11 11) |(1 0)(1 1)| 0
3156 09:28:58.945942 3 2 0 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 1)| 0
3157 09:28:58.952735 3 2 4 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 1)| 0
3158 09:28:58.956102 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3159 09:28:58.959348 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3160 09:28:58.965807 3 2 16 |2c2c 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
3161 09:28:58.968772 3 2 20 |201 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
3162 09:28:58.972252 3 2 24 |3534 303 |(11 11)(1 11) |(0 0)(1 1)| 0
3163 09:28:58.979030 3 2 28 |3534 3d3d |(11 11)(10 10) |(0 0)(1 1)| 0
3164 09:28:58.981835 3 3 0 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3165 09:28:58.985177 3 3 4 |3534 1b1b |(11 11)(11 11) |(0 0)(1 1)| 0
3166 09:28:58.988410 3 3 8 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3167 09:28:58.995278 3 3 12 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3168 09:28:58.998465 3 3 16 |3534 e0e |(11 11)(11 11) |(1 1)(1 1)| 0
3169 09:28:59.001737 3 3 20 |3534 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
3170 09:28:59.008201 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3171 09:28:59.011502 3 3 24 |3534 1716 |(11 11)(11 11) |(0 1)(1 1)| 0
3172 09:28:59.014717 3 3 28 |3534 2524 |(11 11)(11 11) |(0 1)(1 1)| 0
3173 09:28:59.021325 [Byte 1] Lead/lag falling Transition (3, 3, 28)
3174 09:28:59.024461 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3175 09:28:59.027797 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3176 09:28:59.034572 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3177 09:28:59.037436 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3178 09:28:59.040778 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3179 09:28:59.047423 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3180 09:28:59.050464 3 4 24 |3d3d 2625 |(11 11)(11 11) |(1 1)(1 1)| 0
3181 09:28:59.053900 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3182 09:28:59.060421 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3183 09:28:59.063714 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3184 09:28:59.067135 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3185 09:28:59.073708 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3186 09:28:59.076866 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3187 09:28:59.080244 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3188 09:28:59.086847 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3189 09:28:59.089881 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3190 09:28:59.093335 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3191 09:28:59.099615 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3192 09:28:59.103156 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3193 09:28:59.106530 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3194 09:28:59.112829 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3195 09:28:59.116131 [Byte 0] Lead/lag Transition tap number (2)
3196 09:28:59.119365 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3197 09:28:59.122609 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3198 09:28:59.129257 [Byte 1] Lead/lag Transition tap number (2)
3199 09:28:59.132791 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3200 09:28:59.135739 3 6 24 |4646 909 |(0 0)(11 11) |(0 0)(0 0)| 0
3201 09:28:59.139263 [Byte 0]First pass (3, 6, 24)
3202 09:28:59.142488 3 6 28 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
3203 09:28:59.145345 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3204 09:28:59.148775 [Byte 1]First pass (3, 7, 0)
3205 09:28:59.152174 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3206 09:28:59.158957 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3207 09:28:59.162112 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3208 09:28:59.165317 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3209 09:28:59.168492 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3210 09:28:59.174815 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3211 09:28:59.178287 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3212 09:28:59.181450 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3213 09:28:59.184950 All bytes gating window > 1UI, Early break!
3214 09:28:59.185069
3215 09:28:59.188030 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3216 09:28:59.188142
3217 09:28:59.194797 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
3218 09:28:59.194885
3219 09:28:59.194959
3220 09:28:59.195027
3221 09:28:59.198054 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3222 09:28:59.198137
3223 09:28:59.201293 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
3224 09:28:59.201377
3225 09:28:59.201458
3226 09:28:59.204422 Write Rank1 MR1 =0x56
3227 09:28:59.204523
3228 09:28:59.207671 best RODT dly(2T, 0.5T) = (2, 3)
3229 09:28:59.207796
3230 09:28:59.211100 best RODT dly(2T, 0.5T) = (2, 3)
3231 09:28:59.211248 ==
3232 09:28:59.214513 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3233 09:28:59.217827 fsp= 1, odt_onoff= 1, Byte mode= 0
3234 09:28:59.217959 ==
3235 09:28:59.224293 Start DQ dly to find pass range UseTestEngine =0
3236 09:28:59.227607 x-axis: bit #, y-axis: DQ dly (-127~63)
3237 09:28:59.227726 RX Vref Scan = 0
3238 09:28:59.230890 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3239 09:28:59.234248 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3240 09:28:59.237153 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3241 09:28:59.240520 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3242 09:28:59.243811 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3243 09:28:59.247150 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3244 09:28:59.250403 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3245 09:28:59.250506 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3246 09:28:59.253727 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3247 09:28:59.257042 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3248 09:28:59.260138 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3249 09:28:59.263366 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3250 09:28:59.266677 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3251 09:28:59.270260 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3252 09:28:59.273355 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3253 09:28:59.276630 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3254 09:28:59.279937 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3255 09:28:59.280056 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3256 09:28:59.283097 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3257 09:28:59.286316 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3258 09:28:59.289914 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3259 09:28:59.293037 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3260 09:28:59.296254 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3261 09:28:59.299466 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3262 09:28:59.299559 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3263 09:28:59.302897 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3264 09:28:59.306292 0, [0] xxxoxxxx ooxxxxxo [MSB]
3265 09:28:59.309191 1, [0] xxxoxxxx ooxxxxxo [MSB]
3266 09:28:59.312495 2, [0] xxxoxxxx ooxxoxxo [MSB]
3267 09:28:59.316067 3, [0] xxooxxxo oooxoxxo [MSB]
3268 09:28:59.319198 4, [0] oooooxxo oooooooo [MSB]
3269 09:28:59.319295 6, [0] oooooxoo oooooooo [MSB]
3270 09:28:59.322534 32, [0] oooooooo ooooooox [MSB]
3271 09:28:59.325836 33, [0] oooooooo ooooooox [MSB]
3272 09:28:59.328901 34, [0] oooooooo oxooooox [MSB]
3273 09:28:59.332263 35, [0] ooxxoooo oxooooox [MSB]
3274 09:28:59.335476 36, [0] ooxxoooo xxooooox [MSB]
3275 09:28:59.338821 37, [0] ooxxoooo xxooooox [MSB]
3276 09:28:59.338919 38, [0] ooxxoooo xxooooox [MSB]
3277 09:28:59.342198 39, [0] oxxxooox xxooooox [MSB]
3278 09:28:59.345163 40, [0] oxxxooox xxxxxoox [MSB]
3279 09:28:59.348449 41, [0] xxxxxoxx xxxxxoox [MSB]
3280 09:28:59.352056 42, [0] xxxxxoxx xxxxxoxx [MSB]
3281 09:28:59.355052 43, [0] xxxxxxxx xxxxxxxx [MSB]
3282 09:28:59.358509 iDelay=43, Bit 0, Center 22 (4 ~ 40) 37
3283 09:28:59.361901 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
3284 09:28:59.364887 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3285 09:28:59.368157 iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36
3286 09:28:59.371470 iDelay=43, Bit 4, Center 22 (4 ~ 40) 37
3287 09:28:59.374712 iDelay=43, Bit 5, Center 24 (7 ~ 42) 36
3288 09:28:59.378222 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3289 09:28:59.384458 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3290 09:28:59.388114 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
3291 09:28:59.391302 iDelay=43, Bit 9, Center 16 (-1 ~ 33) 35
3292 09:28:59.394503 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3293 09:28:59.397686 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3294 09:28:59.401047 iDelay=43, Bit 12, Center 20 (2 ~ 39) 38
3295 09:28:59.404396 iDelay=43, Bit 13, Center 23 (4 ~ 42) 39
3296 09:28:59.407819 iDelay=43, Bit 14, Center 22 (4 ~ 41) 38
3297 09:28:59.410815 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3298 09:28:59.410981 ==
3299 09:28:59.417335 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3300 09:28:59.420827 fsp= 1, odt_onoff= 1, Byte mode= 0
3301 09:28:59.420955 ==
3302 09:28:59.421033 DQS Delay:
3303 09:28:59.423691 DQS0 = 0, DQS1 = 0
3304 09:28:59.423785 DQM Delay:
3305 09:28:59.427026 DQM0 = 20, DQM1 = 19
3306 09:28:59.427121 DQ Delay:
3307 09:28:59.430233 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3308 09:28:59.433659 DQ4 =22, DQ5 =24, DQ6 =22, DQ7 =20
3309 09:28:59.436816 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =21
3310 09:28:59.440289 DQ12 =20, DQ13 =23, DQ14 =22, DQ15 =13
3311 09:28:59.440384
3312 09:28:59.440461
3313 09:28:59.443713 DramC Write-DBI off
3314 09:28:59.443814 ==
3315 09:28:59.446868 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3316 09:28:59.450243 fsp= 1, odt_onoff= 1, Byte mode= 0
3317 09:28:59.450354 ==
3318 09:28:59.456780 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3319 09:28:59.456905
3320 09:28:59.456999 Begin, DQ Scan Range 926~1182
3321 09:28:59.459738
3322 09:28:59.459836
3323 09:28:59.459912 TX Vref Scan disable
3324 09:28:59.463276 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3325 09:28:59.466361 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3326 09:28:59.469791 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3327 09:28:59.472882 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3328 09:28:59.479574 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3329 09:28:59.482681 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3330 09:28:59.485762 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3331 09:28:59.489118 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3332 09:28:59.492522 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3333 09:28:59.495628 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3334 09:28:59.499258 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3335 09:28:59.502295 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3336 09:28:59.505528 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3337 09:28:59.509003 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3338 09:28:59.512389 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3339 09:28:59.515646 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3340 09:28:59.521882 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3341 09:28:59.525276 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3342 09:28:59.528547 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3343 09:28:59.531954 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3344 09:28:59.534850 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3345 09:28:59.538176 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3346 09:28:59.541878 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3347 09:28:59.544795 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3348 09:28:59.548312 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3349 09:28:59.551428 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3350 09:28:59.554811 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3351 09:28:59.558201 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3352 09:28:59.561538 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3353 09:28:59.567867 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3354 09:28:59.571196 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3355 09:28:59.574265 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3356 09:28:59.577656 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3357 09:28:59.580920 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3358 09:28:59.584131 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3359 09:28:59.587343 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3360 09:28:59.590684 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3361 09:28:59.594028 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3362 09:28:59.597265 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3363 09:28:59.600527 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3364 09:28:59.603913 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3365 09:28:59.606898 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3366 09:28:59.610465 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3367 09:28:59.613297 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3368 09:28:59.620101 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3369 09:28:59.623472 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3370 09:28:59.626689 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3371 09:28:59.629798 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3372 09:28:59.633088 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3373 09:28:59.636353 975 |3 6 15|[0] xxxxxxxx xxxxxxxo [MSB]
3374 09:28:59.639724 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3375 09:28:59.643004 977 |3 6 17|[0] xxxxxxxx oooxxxoo [MSB]
3376 09:28:59.646316 978 |3 6 18|[0] xxxxxxxx ooooxxoo [MSB]
3377 09:28:59.649268 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3378 09:28:59.652741 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3379 09:28:59.656041 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3380 09:28:59.659198 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3381 09:28:59.665972 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
3382 09:28:59.669005 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3383 09:28:59.672335 993 |3 6 33|[0] oooooooo ooooooox [MSB]
3384 09:28:59.675547 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3385 09:28:59.678869 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3386 09:28:59.682098 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3387 09:28:59.685550 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3388 09:28:59.692019 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3389 09:28:59.695110 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3390 09:28:59.698457 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3391 09:28:59.701842 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3392 09:28:59.704888 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3393 09:28:59.708259 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3394 09:28:59.711584 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3395 09:28:59.714951 1005 |3 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
3396 09:28:59.718090 Byte0, DQ PI dly=992, DQM PI dly= 992
3397 09:28:59.724692 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3398 09:28:59.724826
3399 09:28:59.727926 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3400 09:28:59.728021
3401 09:28:59.731240 Byte1, DQ PI dly=985, DQM PI dly= 985
3402 09:28:59.734752 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3403 09:28:59.734846
3404 09:28:59.741273 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3405 09:28:59.741402
3406 09:28:59.741515 ==
3407 09:28:59.744506 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3408 09:28:59.747430 fsp= 1, odt_onoff= 1, Byte mode= 0
3409 09:28:59.747553 ==
3410 09:28:59.754001 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3411 09:28:59.754126
3412 09:28:59.757300 Begin, DQ Scan Range 961~1025
3413 09:28:59.757425 Write Rank1 MR14 =0x0
3414 09:28:59.766227
3415 09:28:59.766345 CH=1, VrefRange= 0, VrefLevel = 0
3416 09:28:59.772741 TX Bit0 (985~1001) 17 993, Bit8 (980~990) 11 985,
3417 09:28:59.776066 TX Bit1 (985~999) 15 992, Bit9 (977~989) 13 983,
3418 09:28:59.782768 TX Bit2 (983~997) 15 990, Bit10 (979~993) 15 986,
3419 09:28:59.786017 TX Bit3 (981~993) 13 987, Bit11 (981~993) 13 987,
3420 09:28:59.789287 TX Bit4 (984~999) 16 991, Bit12 (983~991) 9 987,
3421 09:28:59.795889 TX Bit5 (985~1001) 17 993, Bit13 (982~994) 13 988,
3422 09:28:59.799067 TX Bit6 (985~999) 15 992, Bit14 (980~992) 13 986,
3423 09:28:59.805662 TX Bit7 (985~998) 14 991, Bit15 (976~985) 10 980,
3424 09:28:59.805759
3425 09:28:59.805835 Write Rank1 MR14 =0x2
3426 09:28:59.815066
3427 09:28:59.815163 CH=1, VrefRange= 0, VrefLevel = 2
3428 09:28:59.821741 TX Bit0 (985~1003) 19 994, Bit8 (978~990) 13 984,
3429 09:28:59.824804 TX Bit1 (984~999) 16 991, Bit9 (977~990) 14 983,
3430 09:28:59.831245 TX Bit2 (983~998) 16 990, Bit10 (978~994) 17 986,
3431 09:28:59.834672 TX Bit3 (980~994) 15 987, Bit11 (980~994) 15 987,
3432 09:28:59.838129 TX Bit4 (984~1000) 17 992, Bit12 (982~992) 11 987,
3433 09:28:59.844455 TX Bit5 (985~1001) 17 993, Bit13 (982~995) 14 988,
3434 09:28:59.847712 TX Bit6 (985~1000) 16 992, Bit14 (979~992) 14 985,
3435 09:28:59.854374 TX Bit7 (985~998) 14 991, Bit15 (976~986) 11 981,
3436 09:28:59.854584
3437 09:28:59.854735 Write Rank1 MR14 =0x4
3438 09:28:59.863988
3439 09:28:59.864151 CH=1, VrefRange= 0, VrefLevel = 4
3440 09:28:59.870686 TX Bit0 (985~1003) 19 994, Bit8 (978~991) 14 984,
3441 09:28:59.873685 TX Bit1 (985~1000) 16 992, Bit9 (977~990) 14 983,
3442 09:28:59.880482 TX Bit2 (983~998) 16 990, Bit10 (978~995) 18 986,
3443 09:28:59.883660 TX Bit3 (980~996) 17 988, Bit11 (980~994) 15 987,
3444 09:28:59.886774 TX Bit4 (984~1001) 18 992, Bit12 (982~992) 11 987,
3445 09:28:59.893236 TX Bit5 (985~1002) 18 993, Bit13 (981~996) 16 988,
3446 09:28:59.896880 TX Bit6 (985~1000) 16 992, Bit14 (979~993) 15 986,
3447 09:28:59.903168 TX Bit7 (985~999) 15 992, Bit15 (975~987) 13 981,
3448 09:28:59.903273
3449 09:28:59.903355 Write Rank1 MR14 =0x6
3450 09:28:59.912967
3451 09:28:59.916312 CH=1, VrefRange= 0, VrefLevel = 6
3452 09:28:59.919783 TX Bit0 (985~1004) 20 994, Bit8 (977~991) 15 984,
3453 09:28:59.922803 TX Bit1 (984~1001) 18 992, Bit9 (977~991) 15 984,
3454 09:28:59.929750 TX Bit2 (982~999) 18 990, Bit10 (978~995) 18 986,
3455 09:28:59.932951 TX Bit3 (980~996) 17 988, Bit11 (979~995) 17 987,
3456 09:28:59.939504 TX Bit4 (984~1002) 19 993, Bit12 (981~993) 13 987,
3457 09:28:59.942552 TX Bit5 (985~1003) 19 994, Bit13 (981~997) 17 989,
3458 09:28:59.945934 TX Bit6 (984~1001) 18 992, Bit14 (979~994) 16 986,
3459 09:28:59.952144 TX Bit7 (984~1000) 17 992, Bit15 (975~989) 15 982,
3460 09:28:59.952310
3461 09:28:59.952420 Write Rank1 MR14 =0x8
3462 09:28:59.962604
3463 09:28:59.965492 CH=1, VrefRange= 0, VrefLevel = 8
3464 09:28:59.969022 TX Bit0 (985~1004) 20 994, Bit8 (977~991) 15 984,
3465 09:28:59.972298 TX Bit1 (984~1002) 19 993, Bit9 (976~991) 16 983,
3466 09:28:59.978952 TX Bit2 (982~999) 18 990, Bit10 (978~997) 20 987,
3467 09:28:59.982002 TX Bit3 (979~997) 19 988, Bit11 (979~996) 18 987,
3468 09:28:59.988777 TX Bit4 (984~1002) 19 993, Bit12 (980~994) 15 987,
3469 09:28:59.991832 TX Bit5 (985~1004) 20 994, Bit13 (980~998) 19 989,
3470 09:28:59.994984 TX Bit6 (984~1002) 19 993, Bit14 (978~995) 18 986,
3471 09:29:00.001453 TX Bit7 (984~1000) 17 992, Bit15 (975~990) 16 982,
3472 09:29:00.001620
3473 09:29:00.001750 Write Rank1 MR14 =0xa
3474 09:29:00.012091
3475 09:29:00.015322 CH=1, VrefRange= 0, VrefLevel = 10
3476 09:29:00.018400 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3477 09:29:00.021839 TX Bit1 (983~1002) 20 992, Bit9 (976~991) 16 983,
3478 09:29:00.028493 TX Bit2 (981~1000) 20 990, Bit10 (977~997) 21 987,
3479 09:29:00.031443 TX Bit3 (979~997) 19 988, Bit11 (978~997) 20 987,
3480 09:29:00.038039 TX Bit4 (983~1003) 21 993, Bit12 (979~995) 17 987,
3481 09:29:00.041426 TX Bit5 (984~1004) 21 994, Bit13 (979~998) 20 988,
3482 09:29:00.044645 TX Bit6 (984~1003) 20 993, Bit14 (978~995) 18 986,
3483 09:29:00.051065 TX Bit7 (984~1001) 18 992, Bit15 (975~990) 16 982,
3484 09:29:00.051223
3485 09:29:00.051347 Write Rank1 MR14 =0xc
3486 09:29:00.061400
3487 09:29:00.064751 CH=1, VrefRange= 0, VrefLevel = 12
3488 09:29:00.068107 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3489 09:29:00.071117 TX Bit1 (984~1003) 20 993, Bit9 (976~992) 17 984,
3490 09:29:00.077973 TX Bit2 (981~1001) 21 991, Bit10 (977~998) 22 987,
3491 09:29:00.081332 TX Bit3 (978~998) 21 988, Bit11 (978~998) 21 988,
3492 09:29:00.087755 TX Bit4 (983~1003) 21 993, Bit12 (979~996) 18 987,
3493 09:29:00.091122 TX Bit5 (984~1005) 22 994, Bit13 (979~998) 20 988,
3494 09:29:00.094184 TX Bit6 (984~1004) 21 994, Bit14 (977~996) 20 986,
3495 09:29:00.100831 TX Bit7 (984~1002) 19 993, Bit15 (974~991) 18 982,
3496 09:29:00.100926
3497 09:29:00.101002 Write Rank1 MR14 =0xe
3498 09:29:00.111215
3499 09:29:00.114358 CH=1, VrefRange= 0, VrefLevel = 14
3500 09:29:00.117707 TX Bit0 (984~1005) 22 994, Bit8 (977~993) 17 985,
3501 09:29:00.121003 TX Bit1 (984~1004) 21 994, Bit9 (976~992) 17 984,
3502 09:29:00.127528 TX Bit2 (981~1001) 21 991, Bit10 (977~998) 22 987,
3503 09:29:00.130602 TX Bit3 (978~998) 21 988, Bit11 (978~998) 21 988,
3504 09:29:00.137539 TX Bit4 (982~1004) 23 993, Bit12 (979~997) 19 988,
3505 09:29:00.140810 TX Bit5 (984~1005) 22 994, Bit13 (979~999) 21 989,
3506 09:29:00.143812 TX Bit6 (983~1004) 22 993, Bit14 (977~997) 21 987,
3507 09:29:00.150277 TX Bit7 (983~1003) 21 993, Bit15 (973~991) 19 982,
3508 09:29:00.150373
3509 09:29:00.153795 Write Rank1 MR14 =0x10
3510 09:29:00.161043
3511 09:29:00.164393 CH=1, VrefRange= 0, VrefLevel = 16
3512 09:29:00.167718 TX Bit0 (984~1006) 23 995, Bit8 (976~993) 18 984,
3513 09:29:00.170980 TX Bit1 (984~1005) 22 994, Bit9 (976~993) 18 984,
3514 09:29:00.177337 TX Bit2 (980~1002) 23 991, Bit10 (977~999) 23 988,
3515 09:29:00.180794 TX Bit3 (978~998) 21 988, Bit11 (978~999) 22 988,
3516 09:29:00.187408 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3517 09:29:00.190518 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3518 09:29:00.193803 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
3519 09:29:00.200336 TX Bit7 (983~1003) 21 993, Bit15 (972~991) 20 981,
3520 09:29:00.200430
3521 09:29:00.200505 Write Rank1 MR14 =0x12
3522 09:29:00.211010
3523 09:29:00.214363 CH=1, VrefRange= 0, VrefLevel = 18
3524 09:29:00.217369 TX Bit0 (984~1006) 23 995, Bit8 (976~994) 19 985,
3525 09:29:00.220840 TX Bit1 (983~1005) 23 994, Bit9 (976~993) 18 984,
3526 09:29:00.227368 TX Bit2 (980~1003) 24 991, Bit10 (977~999) 23 988,
3527 09:29:00.230734 TX Bit3 (978~999) 22 988, Bit11 (978~999) 22 988,
3528 09:29:00.237140 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3529 09:29:00.240219 TX Bit5 (983~1005) 23 994, Bit13 (978~999) 22 988,
3530 09:29:00.243757 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
3531 09:29:00.250117 TX Bit7 (983~1004) 22 993, Bit15 (973~992) 20 982,
3532 09:29:00.250338
3533 09:29:00.253227 Write Rank1 MR14 =0x14
3534 09:29:00.260835
3535 09:29:00.264186 CH=1, VrefRange= 0, VrefLevel = 20
3536 09:29:00.267436 TX Bit0 (984~1006) 23 995, Bit8 (976~995) 20 985,
3537 09:29:00.270634 TX Bit1 (982~1005) 24 993, Bit9 (975~993) 19 984,
3538 09:29:00.277330 TX Bit2 (980~1003) 24 991, Bit10 (976~999) 24 987,
3539 09:29:00.280283 TX Bit3 (978~1000) 23 989, Bit11 (977~999) 23 988,
3540 09:29:00.286831 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3541 09:29:00.290275 TX Bit5 (983~1006) 24 994, Bit13 (978~999) 22 988,
3542 09:29:00.293825 TX Bit6 (982~1005) 24 993, Bit14 (977~998) 22 987,
3543 09:29:00.300095 TX Bit7 (983~1005) 23 994, Bit15 (971~992) 22 981,
3544 09:29:00.300228
3545 09:29:00.303417 Write Rank1 MR14 =0x16
3546 09:29:00.310615
3547 09:29:00.314067 CH=1, VrefRange= 0, VrefLevel = 22
3548 09:29:00.317549 TX Bit0 (984~1006) 23 995, Bit8 (976~996) 21 986,
3549 09:29:00.320874 TX Bit1 (982~1005) 24 993, Bit9 (975~994) 20 984,
3550 09:29:00.327384 TX Bit2 (980~1004) 25 992, Bit10 (976~999) 24 987,
3551 09:29:00.330495 TX Bit3 (977~1000) 24 988, Bit11 (977~1000) 24 988,
3552 09:29:00.336976 TX Bit4 (981~1005) 25 993, Bit12 (977~999) 23 988,
3553 09:29:00.340374 TX Bit5 (983~1006) 24 994, Bit13 (978~1000) 23 989,
3554 09:29:00.343623 TX Bit6 (982~1005) 24 993, Bit14 (977~999) 23 988,
3555 09:29:00.350256 TX Bit7 (982~1005) 24 993, Bit15 (971~993) 23 982,
3556 09:29:00.350364
3557 09:29:00.353440 Write Rank1 MR14 =0x18
3558 09:29:00.361067
3559 09:29:00.363989 CH=1, VrefRange= 0, VrefLevel = 24
3560 09:29:00.367223 TX Bit0 (983~1006) 24 994, Bit8 (975~997) 23 986,
3561 09:29:00.370644 TX Bit1 (982~1006) 25 994, Bit9 (975~995) 21 985,
3562 09:29:00.377484 TX Bit2 (979~1004) 26 991, Bit10 (976~1000) 25 988,
3563 09:29:00.380397 TX Bit3 (977~1000) 24 988, Bit11 (977~1000) 24 988,
3564 09:29:00.386988 TX Bit4 (981~1006) 26 993, Bit12 (977~999) 23 988,
3565 09:29:00.390237 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3566 09:29:00.397123 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
3567 09:29:00.400177 TX Bit7 (982~1005) 24 993, Bit15 (970~993) 24 981,
3568 09:29:00.400324
3569 09:29:00.403429 Write Rank1 MR14 =0x1a
3570 09:29:00.411333
3571 09:29:00.414462 CH=1, VrefRange= 0, VrefLevel = 26
3572 09:29:00.417798 TX Bit0 (983~1006) 24 994, Bit8 (975~997) 23 986,
3573 09:29:00.420943 TX Bit1 (981~1006) 26 993, Bit9 (975~996) 22 985,
3574 09:29:00.427779 TX Bit2 (979~1005) 27 992, Bit10 (976~1000) 25 988,
3575 09:29:00.431129 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3576 09:29:00.437472 TX Bit4 (980~1006) 27 993, Bit12 (977~999) 23 988,
3577 09:29:00.440749 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3578 09:29:00.443803 TX Bit6 (981~1006) 26 993, Bit14 (977~999) 23 988,
3579 09:29:00.450421 TX Bit7 (982~1006) 25 994, Bit15 (971~994) 24 982,
3580 09:29:00.450544
3581 09:29:00.453791 Write Rank1 MR14 =0x1c
3582 09:29:00.461663
3583 09:29:00.464931 CH=1, VrefRange= 0, VrefLevel = 28
3584 09:29:00.468202 TX Bit0 (982~1007) 26 994, Bit8 (976~998) 23 987,
3585 09:29:00.471617 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3586 09:29:00.478263 TX Bit2 (979~1005) 27 992, Bit10 (977~1000) 24 988,
3587 09:29:00.481268 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3588 09:29:00.487818 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3589 09:29:00.491289 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3590 09:29:00.497852 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3591 09:29:00.500838 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3592 09:29:00.500937
3593 09:29:00.504233 Write Rank1 MR14 =0x1e
3594 09:29:00.512270
3595 09:29:00.515634 CH=1, VrefRange= 0, VrefLevel = 30
3596 09:29:00.518658 TX Bit0 (982~1007) 26 994, Bit8 (976~998) 23 987,
3597 09:29:00.522032 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3598 09:29:00.528505 TX Bit2 (979~1005) 27 992, Bit10 (977~1000) 24 988,
3599 09:29:00.531858 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3600 09:29:00.538357 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3601 09:29:00.541457 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3602 09:29:00.548372 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3603 09:29:00.551448 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3604 09:29:00.551571
3605 09:29:00.554502 Write Rank1 MR14 =0x20
3606 09:29:00.562796
3607 09:29:00.566209 CH=1, VrefRange= 0, VrefLevel = 32
3608 09:29:00.569375 TX Bit0 (982~1007) 26 994, Bit8 (976~998) 23 987,
3609 09:29:00.572552 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3610 09:29:00.579043 TX Bit2 (979~1005) 27 992, Bit10 (977~1000) 24 988,
3611 09:29:00.582330 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3612 09:29:00.589005 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3613 09:29:00.592027 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3614 09:29:00.598719 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3615 09:29:00.601969 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3616 09:29:00.602064
3617 09:29:00.605070 Write Rank1 MR14 =0x22
3618 09:29:00.613084
3619 09:29:00.616586 CH=1, VrefRange= 0, VrefLevel = 34
3620 09:29:00.619944 TX Bit0 (982~1007) 26 994, Bit8 (976~998) 23 987,
3621 09:29:00.623013 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3622 09:29:00.629379 TX Bit2 (979~1005) 27 992, Bit10 (977~1000) 24 988,
3623 09:29:00.632861 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3624 09:29:00.639463 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3625 09:29:00.642897 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3626 09:29:00.649159 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3627 09:29:00.652576 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3628 09:29:00.652697
3629 09:29:00.655913 Write Rank1 MR14 =0x24
3630 09:29:00.664032
3631 09:29:00.667090 CH=1, VrefRange= 0, VrefLevel = 36
3632 09:29:00.670616 TX Bit0 (982~1007) 26 994, Bit8 (976~998) 23 987,
3633 09:29:00.673887 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3634 09:29:00.680330 TX Bit2 (979~1005) 27 992, Bit10 (977~1000) 24 988,
3635 09:29:00.683765 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3636 09:29:00.690251 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3637 09:29:00.693600 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3638 09:29:00.700396 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3639 09:29:00.703264 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3640 09:29:00.703647
3641 09:29:00.706682 Write Rank1 MR14 =0x26
3642 09:29:00.714415
3643 09:29:00.717673 CH=1, VrefRange= 0, VrefLevel = 38
3644 09:29:00.721091 TX Bit0 (982~1007) 26 994, Bit8 (976~998) 23 987,
3645 09:29:00.724437 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3646 09:29:00.730826 TX Bit2 (979~1005) 27 992, Bit10 (977~1000) 24 988,
3647 09:29:00.734242 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3648 09:29:00.740607 TX Bit4 (980~1006) 27 993, Bit12 (977~1000) 24 988,
3649 09:29:00.743883 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3650 09:29:00.750333 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3651 09:29:00.753788 TX Bit7 (981~1006) 26 993, Bit15 (970~994) 25 982,
3652 09:29:00.754161
3653 09:29:00.754456
3654 09:29:00.757249 TX Vref found, early break! 371< 380
3655 09:29:00.763707 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3656 09:29:00.764074 u1DelayCellOfst[0]=6 cells (5 PI)
3657 09:29:00.767107 u1DelayCellOfst[1]=5 cells (4 PI)
3658 09:29:00.770113 u1DelayCellOfst[2]=3 cells (3 PI)
3659 09:29:00.773286 u1DelayCellOfst[3]=0 cells (0 PI)
3660 09:29:00.776851 u1DelayCellOfst[4]=5 cells (4 PI)
3661 09:29:00.780109 u1DelayCellOfst[5]=6 cells (5 PI)
3662 09:29:00.783243 u1DelayCellOfst[6]=5 cells (4 PI)
3663 09:29:00.786497 u1DelayCellOfst[7]=5 cells (4 PI)
3664 09:29:00.789832 Byte0, DQ PI dly=989, DQM PI dly= 991
3665 09:29:00.793056 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3666 09:29:00.793425
3667 09:29:00.799482 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3668 09:29:00.799852
3669 09:29:00.802720 u1DelayCellOfst[8]=6 cells (5 PI)
3670 09:29:00.806138 u1DelayCellOfst[9]=3 cells (3 PI)
3671 09:29:00.806506 u1DelayCellOfst[10]=7 cells (6 PI)
3672 09:29:00.809527 u1DelayCellOfst[11]=7 cells (6 PI)
3673 09:29:00.812827 u1DelayCellOfst[12]=7 cells (6 PI)
3674 09:29:00.815866 u1DelayCellOfst[13]=9 cells (7 PI)
3675 09:29:00.819317 u1DelayCellOfst[14]=7 cells (6 PI)
3676 09:29:00.822457 u1DelayCellOfst[15]=0 cells (0 PI)
3677 09:29:00.825903 Byte1, DQ PI dly=982, DQM PI dly= 985
3678 09:29:00.832136 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3679 09:29:00.832511
3680 09:29:00.835641 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3681 09:29:00.836013
3682 09:29:00.839236 Write Rank1 MR14 =0x1c
3683 09:29:00.839601
3684 09:29:00.839896 Final TX Range 0 Vref 28
3685 09:29:00.840175
3686 09:29:00.845359 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3687 09:29:00.845783
3688 09:29:00.851867 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3689 09:29:00.861740 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3690 09:29:00.868265 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3691 09:29:00.868636 Write Rank1 MR3 =0xb0
3692 09:29:00.871619 DramC Write-DBI on
3693 09:29:00.871986 ==
3694 09:29:00.874773 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3695 09:29:00.878258 fsp= 1, odt_onoff= 1, Byte mode= 0
3696 09:29:00.878626 ==
3697 09:29:00.884511 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3698 09:29:00.884908
3699 09:29:00.887717 Begin, DQ Scan Range 705~769
3700 09:29:00.888084
3701 09:29:00.888383
3702 09:29:00.888663 TX Vref Scan disable
3703 09:29:00.891281 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3704 09:29:00.894609 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3705 09:29:00.897586 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3706 09:29:00.904387 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3707 09:29:00.907412 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3708 09:29:00.910915 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3709 09:29:00.913941 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3710 09:29:00.917301 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3711 09:29:00.920698 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3712 09:29:00.923882 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3713 09:29:00.927367 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3714 09:29:00.930267 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3715 09:29:00.933673 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3716 09:29:00.936982 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3717 09:29:00.940137 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3718 09:29:00.943525 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3719 09:29:00.946990 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3720 09:29:00.953269 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3721 09:29:00.956499 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3722 09:29:00.959892 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3723 09:29:00.966663 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3724 09:29:00.970067 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3725 09:29:00.973189 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3726 09:29:00.976553 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3727 09:29:00.980109 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3728 09:29:00.983103 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3729 09:29:00.986561 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3730 09:29:00.989605 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3731 09:29:00.992993 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3732 09:29:00.996065 Byte0, DQ PI dly=737, DQM PI dly= 737
3733 09:29:01.002754 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3734 09:29:01.003261
3735 09:29:01.005912 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3736 09:29:01.006353
3737 09:29:01.009093 Byte1, DQ PI dly=729, DQM PI dly= 729
3738 09:29:01.012517 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3739 09:29:01.012954
3740 09:29:01.018980 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3741 09:29:01.019339
3742 09:29:01.025548 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3743 09:29:01.032105 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3744 09:29:01.038672 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3745 09:29:01.041818 Write Rank1 MR3 =0x30
3746 09:29:01.042178 DramC Write-DBI off
3747 09:29:01.042545
3748 09:29:01.042893 [DATLAT]
3749 09:29:01.045184 Freq=1600, CH1 RK1, use_rxtx_scan=0
3750 09:29:01.045799
3751 09:29:01.048503 DATLAT Default: 0x10
3752 09:29:01.051859 7, 0xFFFF, sum=0
3753 09:29:01.052467 8, 0xFFFF, sum=0
3754 09:29:01.052802 9, 0xFFFF, sum=0
3755 09:29:01.055081 10, 0xFFFF, sum=0
3756 09:29:01.055605 11, 0xFFFF, sum=0
3757 09:29:01.058350 12, 0xFFFF, sum=0
3758 09:29:01.058759 13, 0xFFFF, sum=0
3759 09:29:01.061727 14, 0x0, sum=1
3760 09:29:01.062161 15, 0x0, sum=2
3761 09:29:01.064962 16, 0x0, sum=3
3762 09:29:01.065375 17, 0x0, sum=4
3763 09:29:01.071392 pattern=2 first_step=14 total pass=5 best_step=16
3764 09:29:01.071753 ==
3765 09:29:01.074926 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3766 09:29:01.078327 fsp= 1, odt_onoff= 1, Byte mode= 0
3767 09:29:01.078777 ==
3768 09:29:01.081252 Start DQ dly to find pass range UseTestEngine =1
3769 09:29:01.087716 x-axis: bit #, y-axis: DQ dly (-127~63)
3770 09:29:01.088379 RX Vref Scan = 0
3771 09:29:01.091215 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3772 09:29:01.094142 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3773 09:29:01.097524 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3774 09:29:01.101059 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3775 09:29:01.104266 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3776 09:29:01.104670 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3777 09:29:01.107263 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3778 09:29:01.110708 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3779 09:29:01.114152 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3780 09:29:01.117015 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3781 09:29:01.120676 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3782 09:29:01.123592 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3783 09:29:01.127120 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3784 09:29:01.130357 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3785 09:29:01.130728 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3786 09:29:01.133386 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3787 09:29:01.136640 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3788 09:29:01.140057 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3789 09:29:01.143473 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3790 09:29:01.146481 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3791 09:29:01.149822 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3792 09:29:01.153340 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3793 09:29:01.153973 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3794 09:29:01.156288 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3795 09:29:01.159873 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3796 09:29:01.163156 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3797 09:29:01.166428 0, [0] xxxoxxxx ooxxxxxo [MSB]
3798 09:29:01.169487 1, [0] xxxoxxxx ooxxxxxo [MSB]
3799 09:29:01.172921 2, [0] xxxoxxxx ooxxxxxo [MSB]
3800 09:29:01.173365 3, [0] xxooxxxo oooooxxo [MSB]
3801 09:29:01.176082 4, [0] oooooxxo oooooooo [MSB]
3802 09:29:01.179247 5, [0] oooooxxo oooooooo [MSB]
3803 09:29:01.183534 32, [0] oooooooo ooooooox [MSB]
3804 09:29:01.186754 33, [0] oooooooo oxooooox [MSB]
3805 09:29:01.190261 34, [0] oooxoooo oxooooox [MSB]
3806 09:29:01.192951 35, [0] ooxxoooo oxooooox [MSB]
3807 09:29:01.196329 36, [0] ooxxoooo xxooooox [MSB]
3808 09:29:01.199796 37, [0] ooxxoooo xxooooox [MSB]
3809 09:29:01.203174 38, [0] ooxxooox xxooxoox [MSB]
3810 09:29:01.203268 39, [0] oxxxooox xxxxxoox [MSB]
3811 09:29:01.206045 40, [0] oxxxxoox xxxxxxox [MSB]
3812 09:29:01.209683 41, [0] xxxxxxxx xxxxxxxx [MSB]
3813 09:29:01.212629 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3814 09:29:01.216052 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3815 09:29:01.219495 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3816 09:29:01.226105 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3817 09:29:01.229056 iDelay=41, Bit 4, Center 21 (4 ~ 39) 36
3818 09:29:01.232384 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3819 09:29:01.235736 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3820 09:29:01.239105 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3821 09:29:01.242229 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3822 09:29:01.245662 iDelay=41, Bit 9, Center 15 (-2 ~ 32) 35
3823 09:29:01.248898 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3824 09:29:01.252391 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3825 09:29:01.255716 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3826 09:29:01.258942 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3827 09:29:01.265276 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3828 09:29:01.268678 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3829 09:29:01.269107 ==
3830 09:29:01.272092 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3831 09:29:01.275621 fsp= 1, odt_onoff= 1, Byte mode= 0
3832 09:29:01.276311 ==
3833 09:29:01.278685 DQS Delay:
3834 09:29:01.279318 DQS0 = 0, DQS1 = 0
3835 09:29:01.282072 DQM Delay:
3836 09:29:01.282578 DQM0 = 20, DQM1 = 18
3837 09:29:01.283214 DQ Delay:
3838 09:29:01.285038 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3839 09:29:01.288531 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3840 09:29:01.291915 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3841 09:29:01.295087 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3842 09:29:01.295596
3843 09:29:01.296024
3844 09:29:01.298145
3845 09:29:01.298682 [DramC_TX_OE_Calibration] TA2
3846 09:29:01.301347 Original DQ_B0 (3 6) =30, OEN = 27
3847 09:29:01.304609 Original DQ_B1 (3 6) =30, OEN = 27
3848 09:29:01.307958 23, 0x0, End_B0=23 End_B1=23
3849 09:29:01.311141 24, 0x0, End_B0=24 End_B1=24
3850 09:29:01.314857 25, 0x0, End_B0=25 End_B1=25
3851 09:29:01.315251 26, 0x0, End_B0=26 End_B1=26
3852 09:29:01.317788 27, 0x0, End_B0=27 End_B1=27
3853 09:29:01.321240 28, 0x0, End_B0=28 End_B1=28
3854 09:29:01.324550 29, 0x0, End_B0=29 End_B1=29
3855 09:29:01.327821 30, 0x0, End_B0=30 End_B1=30
3856 09:29:01.328327 31, 0xFFFF, End_B0=30 End_B1=30
3857 09:29:01.334156 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3858 09:29:01.341034 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3859 09:29:01.341427
3860 09:29:01.341780
3861 09:29:01.343954 Write Rank1 MR23 =0x3f
3862 09:29:01.344447 [DQSOSC]
3863 09:29:01.350688 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3864 09:29:01.357165 CH1_RK1: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3865 09:29:01.360521 Write Rank1 MR23 =0x3f
3866 09:29:01.361254 [DQSOSC]
3867 09:29:01.370170 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3868 09:29:01.370611 CH1 RK1: MR19=202, MR18=B7B7
3869 09:29:01.373472 [RxdqsGatingPostProcess] freq 1600
3870 09:29:01.380069 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3871 09:29:01.380472 Rank: 0
3872 09:29:01.383515 best DQS0 dly(2T, 0.5T) = (2, 6)
3873 09:29:01.386565 best DQS1 dly(2T, 0.5T) = (2, 6)
3874 09:29:01.389814 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3875 09:29:01.393019 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3876 09:29:01.393388 Rank: 1
3877 09:29:01.396391 best DQS0 dly(2T, 0.5T) = (2, 6)
3878 09:29:01.399862 best DQS1 dly(2T, 0.5T) = (2, 6)
3879 09:29:01.403021 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3880 09:29:01.406156 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3881 09:29:01.409327 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3882 09:29:01.412525 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3883 09:29:01.419216 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3884 09:29:01.419585
3885 09:29:01.419881
3886 09:29:01.422435 [Calibration Summary] Freqency 1600
3887 09:29:01.422802 CH 0, Rank 0
3888 09:29:01.425745 All Pass.
3889 09:29:01.426109
3890 09:29:01.426404 CH 0, Rank 1
3891 09:29:01.426682 All Pass.
3892 09:29:01.426949
3893 09:29:01.429178 CH 1, Rank 0
3894 09:29:01.429751 All Pass.
3895 09:29:01.430274
3896 09:29:01.430610 CH 1, Rank 1
3897 09:29:01.432223 All Pass.
3898 09:29:01.432582
3899 09:29:01.438854 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3900 09:29:01.445576 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3901 09:29:01.451967 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3902 09:29:01.455271 Write Rank0 MR3 =0xb0
3903 09:29:01.461707 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3904 09:29:01.468368 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3905 09:29:01.474935 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3906 09:29:01.478224 Write Rank1 MR3 =0xb0
3907 09:29:01.481726 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3908 09:29:01.491492 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3909 09:29:01.498105 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3910 09:29:01.498503 Write Rank0 MR3 =0xb0
3911 09:29:01.504508 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3912 09:29:01.511204 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3913 09:29:01.520522 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3914 09:29:01.520921 Write Rank1 MR3 =0xb0
3915 09:29:01.524104 DramC Write-DBI on
3916 09:29:01.527419 [GetDramInforAfterCalByMRR] Vendor 6.
3917 09:29:01.530721 [GetDramInforAfterCalByMRR] Revision 505.
3918 09:29:01.531124 MR8 1111
3919 09:29:01.539095 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3920 09:29:01.539794 MR8 1111
3921 09:29:01.540949 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3922 09:29:01.543805 MR8 1111
3923 09:29:01.546971 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3924 09:29:01.547374 MR8 1111
3925 09:29:01.553352 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3926 09:29:01.563522 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3927 09:29:01.563918 Write Rank0 MR13 =0xd0
3928 09:29:01.566368 Write Rank1 MR13 =0xd0
3929 09:29:01.569879 Write Rank0 MR13 =0xd0
3930 09:29:01.570271 Write Rank1 MR13 =0xd0
3931 09:29:01.572985 Save calibration result to emmc
3932 09:29:01.573374
3933 09:29:01.573746
3934 09:29:01.576415 [DramcModeReg_Check] Freq_1600, FSP_1
3935 09:29:01.579469 FSP_1, CH_0, RK0
3936 09:29:01.579864 Write Rank0 MR13 =0xd8
3937 09:29:01.583195 MR12 = 0x5e (global = 0x5e) match
3938 09:29:01.586359 MR14 = 0x1c (global = 0x1c) match
3939 09:29:01.589614 FSP_1, CH_0, RK1
3940 09:29:01.590061 Write Rank1 MR13 =0xd8
3941 09:29:01.592648 MR12 = 0x5e (global = 0x5e) match
3942 09:29:01.596082 MR14 = 0x1c (global = 0x1c) match
3943 09:29:01.599058 FSP_1, CH_1, RK0
3944 09:29:01.599453 Write Rank0 MR13 =0xd8
3945 09:29:01.602438 MR12 = 0x5a (global = 0x5a) match
3946 09:29:01.605965 MR14 = 0x1e (global = 0x1e) match
3947 09:29:01.608974 FSP_1, CH_1, RK1
3948 09:29:01.609528 Write Rank1 MR13 =0xd8
3949 09:29:01.612319 MR12 = 0x5c (global = 0x5c) match
3950 09:29:01.615657 MR14 = 0x1c (global = 0x1c) match
3951 09:29:01.616054
3952 09:29:01.622244 [MEM_TEST] 02: After DFS, before run time config
3953 09:29:01.632301 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3954 09:29:01.632705
3955 09:29:01.633025 [TA2_TEST]
3956 09:29:01.633321 === TA2 HW
3957 09:29:01.635239 TA2 PAT: XTALK
3958 09:29:01.638478 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3959 09:29:01.645118 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3960 09:29:01.648368 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3961 09:29:01.654931 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3962 09:29:01.655359
3963 09:29:01.655689
3964 09:29:01.656040 Settings after calibration
3965 09:29:01.658021
3966 09:29:01.658429 [DramcRunTimeConfig]
3967 09:29:01.661392 TransferPLLToSPMControl - MODE SW PHYPLL
3968 09:29:01.664664 TX_TRACKING: ON
3969 09:29:01.665059 RX_TRACKING: ON
3970 09:29:01.667932 HW_GATING: ON
3971 09:29:01.668488 HW_GATING DBG: OFF
3972 09:29:01.668828 ddr_geometry:1
3973 09:29:01.671037 ddr_geometry:1
3974 09:29:01.671409 ddr_geometry:1
3975 09:29:01.674500 ddr_geometry:1
3976 09:29:01.674877 ddr_geometry:1
3977 09:29:01.677518 ddr_geometry:1
3978 09:29:01.677909 ddr_geometry:1
3979 09:29:01.678236 ddr_geometry:1
3980 09:29:01.680980 High Freq DUMMY_READ_FOR_TRACKING: ON
3981 09:29:01.684284 ZQCS_ENABLE_LP4: OFF
3982 09:29:01.687312 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3983 09:29:01.690852 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3984 09:29:01.693865 SPM_CONTROL_AFTERK: ON
3985 09:29:01.694308 IMPEDANCE_TRACKING: ON
3986 09:29:01.697176 TEMP_SENSOR: ON
3987 09:29:01.697595 PER_BANK_REFRESH: ON
3988 09:29:01.700486 HW_SAVE_FOR_SR: ON
3989 09:29:01.704077 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3990 09:29:01.707011 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3991 09:29:01.710353 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3992 09:29:01.710749 Read ODT Tracking: ON
3993 09:29:01.713815 =========================
3994 09:29:01.714231
3995 09:29:01.717139 [TA2_TEST]
3996 09:29:01.717517 === TA2 HW
3997 09:29:01.720102 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3998 09:29:01.726828 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3999 09:29:01.730062 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4000 09:29:01.736866 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4001 09:29:01.737423
4002 09:29:01.739738 [MEM_TEST] 03: After run time config
4003 09:29:01.749669 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4004 09:29:01.753292 [complex_mem_test] start addr:0x40024000, len:131072
4005 09:29:01.957373 1st complex R/W mem test pass
4006 09:29:01.964112 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4007 09:29:01.967022 sync preloader write leveling
4008 09:29:01.970476 sync preloader cbt_mr12
4009 09:29:01.973844 sync preloader cbt_clk_dly
4010 09:29:01.974269 sync preloader cbt_cmd_dly
4011 09:29:01.977043 sync preloader cbt_cs
4012 09:29:01.980305 sync preloader cbt_ca_perbit_delay
4013 09:29:01.983779 sync preloader clk_delay
4014 09:29:01.984333 sync preloader dqs_delay
4015 09:29:01.986690 sync preloader u1Gating2T_Save
4016 09:29:01.990252 sync preloader u1Gating05T_Save
4017 09:29:01.993283 sync preloader u1Gatingfine_tune_Save
4018 09:29:01.996789 sync preloader u1Gatingucpass_count_Save
4019 09:29:01.999962 sync preloader u1TxWindowPerbitVref_Save
4020 09:29:02.003108 sync preloader u1TxCenter_min_Save
4021 09:29:02.006465 sync preloader u1TxCenter_max_Save
4022 09:29:02.009659 sync preloader u1Txwin_center_Save
4023 09:29:02.013015 sync preloader u1Txfirst_pass_Save
4024 09:29:02.016092 sync preloader u1Txlast_pass_Save
4025 09:29:02.019339 sync preloader u1RxDatlat_Save
4026 09:29:02.022811 sync preloader u1RxWinPerbitVref_Save
4027 09:29:02.025964 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4028 09:29:02.029213 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4029 09:29:02.032498 sync preloader delay_cell_unit
4030 09:29:02.039362 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4031 09:29:02.042290 sync preloader write leveling
4032 09:29:02.045859 sync preloader cbt_mr12
4033 09:29:02.046246 sync preloader cbt_clk_dly
4034 09:29:02.049105 sync preloader cbt_cmd_dly
4035 09:29:02.052311 sync preloader cbt_cs
4036 09:29:02.055513 sync preloader cbt_ca_perbit_delay
4037 09:29:02.056026 sync preloader clk_delay
4038 09:29:02.058841 sync preloader dqs_delay
4039 09:29:02.062230 sync preloader u1Gating2T_Save
4040 09:29:02.065643 sync preloader u1Gating05T_Save
4041 09:29:02.068649 sync preloader u1Gatingfine_tune_Save
4042 09:29:02.072310 sync preloader u1Gatingucpass_count_Save
4043 09:29:02.075319 sync preloader u1TxWindowPerbitVref_Save
4044 09:29:02.078595 sync preloader u1TxCenter_min_Save
4045 09:29:02.081801 sync preloader u1TxCenter_max_Save
4046 09:29:02.085194 sync preloader u1Txwin_center_Save
4047 09:29:02.088179 sync preloader u1Txfirst_pass_Save
4048 09:29:02.091415 sync preloader u1Txlast_pass_Save
4049 09:29:02.094726 sync preloader u1RxDatlat_Save
4050 09:29:02.097914 sync preloader u1RxWinPerbitVref_Save
4051 09:29:02.101322 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4052 09:29:02.104776 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4053 09:29:02.107769 sync preloader delay_cell_unit
4054 09:29:02.114351 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4055 09:29:02.117731 sync preloader write leveling
4056 09:29:02.120897 sync preloader cbt_mr12
4057 09:29:02.121486 sync preloader cbt_clk_dly
4058 09:29:02.124296 sync preloader cbt_cmd_dly
4059 09:29:02.127376 sync preloader cbt_cs
4060 09:29:02.130830 sync preloader cbt_ca_perbit_delay
4061 09:29:02.131235 sync preloader clk_delay
4062 09:29:02.134021 sync preloader dqs_delay
4063 09:29:02.137129 sync preloader u1Gating2T_Save
4064 09:29:02.140545 sync preloader u1Gating05T_Save
4065 09:29:02.143946 sync preloader u1Gatingfine_tune_Save
4066 09:29:02.146956 sync preloader u1Gatingucpass_count_Save
4067 09:29:02.150425 sync preloader u1TxWindowPerbitVref_Save
4068 09:29:02.153314 sync preloader u1TxCenter_min_Save
4069 09:29:02.157017 sync preloader u1TxCenter_max_Save
4070 09:29:02.159934 sync preloader u1Txwin_center_Save
4071 09:29:02.163349 sync preloader u1Txfirst_pass_Save
4072 09:29:02.166496 sync preloader u1Txlast_pass_Save
4073 09:29:02.166625 sync preloader u1RxDatlat_Save
4074 09:29:02.169684 sync preloader u1RxWinPerbitVref_Save
4075 09:29:02.176236 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4076 09:29:02.179764 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4077 09:29:02.183115 sync preloader delay_cell_unit
4078 09:29:02.186202 just_for_test_dump_coreboot_params dump all params
4079 09:29:02.189419 dump source = 0x0
4080 09:29:02.189537 dump params frequency:1600
4081 09:29:02.192908 dump params rank number:2
4082 09:29:02.193001
4083 09:29:02.195790 dump params write leveling
4084 09:29:02.199015 write leveling[0][0][0] = 0x1f
4085 09:29:02.202498 write leveling[0][0][1] = 0x1b
4086 09:29:02.205799 write leveling[0][1][0] = 0x1e
4087 09:29:02.205892 write leveling[0][1][1] = 0x1a
4088 09:29:02.209301 write leveling[1][0][0] = 0x26
4089 09:29:02.212383 write leveling[1][0][1] = 0x1d
4090 09:29:02.216248 write leveling[1][1][0] = 0x23
4091 09:29:02.219042 write leveling[1][1][1] = 0x1e
4092 09:29:02.219240 dump params cbt_cs
4093 09:29:02.222728 cbt_cs[0][0] = 0x7
4094 09:29:02.222918 cbt_cs[0][1] = 0x7
4095 09:29:02.225392 cbt_cs[1][0] = 0xb
4096 09:29:02.225541 cbt_cs[1][1] = 0xb
4097 09:29:02.229243 dump params cbt_mr12
4098 09:29:02.232424 cbt_mr12[0][0] = 0x1e
4099 09:29:02.233083 cbt_mr12[0][1] = 0x1e
4100 09:29:02.235586 cbt_mr12[1][0] = 0x1a
4101 09:29:02.235967 cbt_mr12[1][1] = 0x1c
4102 09:29:02.238745 dump params tx window
4103 09:29:02.242215 tx_center_min[0][0][0] = 984
4104 09:29:02.245577 tx_center_max[0][0][0] = 990
4105 09:29:02.246009 tx_center_min[0][0][1] = 979
4106 09:29:02.248755 tx_center_max[0][0][1] = 986
4107 09:29:02.251741 tx_center_min[0][1][0] = 985
4108 09:29:02.255033 tx_center_max[0][1][0] = 991
4109 09:29:02.258330 tx_center_min[0][1][1] = 981
4110 09:29:02.258906 tx_center_max[0][1][1] = 988
4111 09:29:02.261873 tx_center_min[1][0][0] = 990
4112 09:29:02.264800 tx_center_max[1][0][0] = 996
4113 09:29:02.268240 tx_center_min[1][0][1] = 980
4114 09:29:02.271580 tx_center_max[1][0][1] = 987
4115 09:29:02.271996 tx_center_min[1][1][0] = 989
4116 09:29:02.274683 tx_center_max[1][1][0] = 994
4117 09:29:02.278111 tx_center_min[1][1][1] = 982
4118 09:29:02.281154 tx_center_max[1][1][1] = 989
4119 09:29:02.281525 dump params tx window
4120 09:29:02.284581 tx_win_center[0][0][0] = 990
4121 09:29:02.287952 tx_first_pass[0][0][0] = 978
4122 09:29:02.291053 tx_last_pass[0][0][0] = 1002
4123 09:29:02.294461 tx_win_center[0][0][1] = 989
4124 09:29:02.294898 tx_first_pass[0][0][1] = 977
4125 09:29:02.297798 tx_last_pass[0][0][1] = 1001
4126 09:29:02.301230 tx_win_center[0][0][2] = 990
4127 09:29:02.304324 tx_first_pass[0][0][2] = 978
4128 09:29:02.307595 tx_last_pass[0][0][2] = 1002
4129 09:29:02.308035 tx_win_center[0][0][3] = 984
4130 09:29:02.310954 tx_first_pass[0][0][3] = 972
4131 09:29:02.313899 tx_last_pass[0][0][3] = 996
4132 09:29:02.317192 tx_win_center[0][0][4] = 988
4133 09:29:02.320714 tx_first_pass[0][0][4] = 977
4134 09:29:02.321166 tx_last_pass[0][0][4] = 1000
4135 09:29:02.324143 tx_win_center[0][0][5] = 987
4136 09:29:02.327289 tx_first_pass[0][0][5] = 975
4137 09:29:02.330266 tx_last_pass[0][0][5] = 999
4138 09:29:02.333542 tx_win_center[0][0][6] = 988
4139 09:29:02.334095 tx_first_pass[0][0][6] = 976
4140 09:29:02.336911 tx_last_pass[0][0][6] = 1000
4141 09:29:02.340369 tx_win_center[0][0][7] = 989
4142 09:29:02.343772 tx_first_pass[0][0][7] = 977
4143 09:29:02.346746 tx_last_pass[0][0][7] = 1001
4144 09:29:02.347183 tx_win_center[0][0][8] = 979
4145 09:29:02.350069 tx_first_pass[0][0][8] = 968
4146 09:29:02.353537 tx_last_pass[0][0][8] = 991
4147 09:29:02.357083 tx_win_center[0][0][9] = 981
4148 09:29:02.357526 tx_first_pass[0][0][9] = 969
4149 09:29:02.359956 tx_last_pass[0][0][9] = 993
4150 09:29:02.363275 tx_win_center[0][0][10] = 986
4151 09:29:02.366595 tx_first_pass[0][0][10] = 974
4152 09:29:02.369834 tx_last_pass[0][0][10] = 998
4153 09:29:02.372969 tx_win_center[0][0][11] = 980
4154 09:29:02.373407 tx_first_pass[0][0][11] = 968
4155 09:29:02.376312 tx_last_pass[0][0][11] = 992
4156 09:29:02.379624 tx_win_center[0][0][12] = 981
4157 09:29:02.383190 tx_first_pass[0][0][12] = 969
4158 09:29:02.386542 tx_last_pass[0][0][12] = 994
4159 09:29:02.387033 tx_win_center[0][0][13] = 981
4160 09:29:02.389419 tx_first_pass[0][0][13] = 970
4161 09:29:02.392634 tx_last_pass[0][0][13] = 993
4162 09:29:02.396087 tx_win_center[0][0][14] = 983
4163 09:29:02.399295 tx_first_pass[0][0][14] = 970
4164 09:29:02.399724 tx_last_pass[0][0][14] = 996
4165 09:29:02.402518 tx_win_center[0][0][15] = 986
4166 09:29:02.405892 tx_first_pass[0][0][15] = 974
4167 09:29:02.408610 tx_last_pass[0][0][15] = 998
4168 09:29:02.411903 tx_win_center[0][1][0] = 991
4169 09:29:02.415277 tx_first_pass[0][1][0] = 979
4170 09:29:02.415363 tx_last_pass[0][1][0] = 1004
4171 09:29:02.418808 tx_win_center[0][1][1] = 990
4172 09:29:02.421706 tx_first_pass[0][1][1] = 978
4173 09:29:02.425084 tx_last_pass[0][1][1] = 1003
4174 09:29:02.428511 tx_win_center[0][1][2] = 991
4175 09:29:02.428601 tx_first_pass[0][1][2] = 979
4176 09:29:02.431751 tx_last_pass[0][1][2] = 1003
4177 09:29:02.434731 tx_win_center[0][1][3] = 985
4178 09:29:02.438079 tx_first_pass[0][1][3] = 972
4179 09:29:02.438178 tx_last_pass[0][1][3] = 998
4180 09:29:02.441678 tx_win_center[0][1][4] = 990
4181 09:29:02.444951 tx_first_pass[0][1][4] = 978
4182 09:29:02.447900 tx_last_pass[0][1][4] = 1002
4183 09:29:02.451266 tx_win_center[0][1][5] = 987
4184 09:29:02.451358 tx_first_pass[0][1][5] = 976
4185 09:29:02.454785 tx_last_pass[0][1][5] = 999
4186 09:29:02.457753 tx_win_center[0][1][6] = 989
4187 09:29:02.461166 tx_first_pass[0][1][6] = 977
4188 09:29:02.464311 tx_last_pass[0][1][6] = 1001
4189 09:29:02.464411 tx_win_center[0][1][7] = 990
4190 09:29:02.467777 tx_first_pass[0][1][7] = 978
4191 09:29:02.471130 tx_last_pass[0][1][7] = 1003
4192 09:29:02.474128 tx_win_center[0][1][8] = 981
4193 09:29:02.477827 tx_first_pass[0][1][8] = 969
4194 09:29:02.477948 tx_last_pass[0][1][8] = 994
4195 09:29:02.480960 tx_win_center[0][1][9] = 983
4196 09:29:02.483917 tx_first_pass[0][1][9] = 971
4197 09:29:02.487298 tx_last_pass[0][1][9] = 995
4198 09:29:02.490473 tx_win_center[0][1][10] = 988
4199 09:29:02.490632 tx_first_pass[0][1][10] = 976
4200 09:29:02.493930 tx_last_pass[0][1][10] = 1000
4201 09:29:02.497294 tx_win_center[0][1][11] = 982
4202 09:29:02.500509 tx_first_pass[0][1][11] = 970
4203 09:29:02.503724 tx_last_pass[0][1][11] = 994
4204 09:29:02.506974 tx_win_center[0][1][12] = 983
4205 09:29:02.507307 tx_first_pass[0][1][12] = 971
4206 09:29:02.510538 tx_last_pass[0][1][12] = 996
4207 09:29:02.513818 tx_win_center[0][1][13] = 983
4208 09:29:02.516845 tx_first_pass[0][1][13] = 971
4209 09:29:02.520253 tx_last_pass[0][1][13] = 996
4210 09:29:02.520711 tx_win_center[0][1][14] = 985
4211 09:29:02.523739 tx_first_pass[0][1][14] = 972
4212 09:29:02.527235 tx_last_pass[0][1][14] = 998
4213 09:29:02.530202 tx_win_center[0][1][15] = 987
4214 09:29:02.533552 tx_first_pass[0][1][15] = 975
4215 09:29:02.534083 tx_last_pass[0][1][15] = 999
4216 09:29:02.537004 tx_win_center[1][0][0] = 996
4217 09:29:02.540020 tx_first_pass[1][0][0] = 984
4218 09:29:02.543192 tx_last_pass[1][0][0] = 1009
4219 09:29:02.546378 tx_win_center[1][0][1] = 995
4220 09:29:02.546717 tx_first_pass[1][0][1] = 983
4221 09:29:02.549910 tx_last_pass[1][0][1] = 1008
4222 09:29:02.553186 tx_win_center[1][0][2] = 993
4223 09:29:02.556102 tx_first_pass[1][0][2] = 981
4224 09:29:02.559404 tx_last_pass[1][0][2] = 1006
4225 09:29:02.559584 tx_win_center[1][0][3] = 990
4226 09:29:02.562941 tx_first_pass[1][0][3] = 977
4227 09:29:02.566304 tx_last_pass[1][0][3] = 1004
4228 09:29:02.569143 tx_win_center[1][0][4] = 995
4229 09:29:02.572440 tx_first_pass[1][0][4] = 983
4230 09:29:02.572655 tx_last_pass[1][0][4] = 1007
4231 09:29:02.575818 tx_win_center[1][0][5] = 996
4232 09:29:02.578823 tx_first_pass[1][0][5] = 984
4233 09:29:02.582226 tx_last_pass[1][0][5] = 1008
4234 09:29:02.585673 tx_win_center[1][0][6] = 995
4235 09:29:02.585798 tx_first_pass[1][0][6] = 984
4236 09:29:02.589019 tx_last_pass[1][0][6] = 1007
4237 09:29:02.592046 tx_win_center[1][0][7] = 995
4238 09:29:02.595508 tx_first_pass[1][0][7] = 983
4239 09:29:02.598764 tx_last_pass[1][0][7] = 1007
4240 09:29:02.598921 tx_win_center[1][0][8] = 984
4241 09:29:02.602047 tx_first_pass[1][0][8] = 972
4242 09:29:02.605275 tx_last_pass[1][0][8] = 997
4243 09:29:02.608497 tx_win_center[1][0][9] = 983
4244 09:29:02.611745 tx_first_pass[1][0][9] = 971
4245 09:29:02.611847 tx_last_pass[1][0][9] = 995
4246 09:29:02.614987 tx_win_center[1][0][10] = 987
4247 09:29:02.618298 tx_first_pass[1][0][10] = 975
4248 09:29:02.621890 tx_last_pass[1][0][10] = 999
4249 09:29:02.625245 tx_win_center[1][0][11] = 987
4250 09:29:02.625734 tx_first_pass[1][0][11] = 976
4251 09:29:02.628406 tx_last_pass[1][0][11] = 999
4252 09:29:02.631867 tx_win_center[1][0][12] = 987
4253 09:29:02.635011 tx_first_pass[1][0][12] = 976
4254 09:29:02.638274 tx_last_pass[1][0][12] = 999
4255 09:29:02.641306 tx_win_center[1][0][13] = 987
4256 09:29:02.641750 tx_first_pass[1][0][13] = 976
4257 09:29:02.644596 tx_last_pass[1][0][13] = 999
4258 09:29:02.648052 tx_win_center[1][0][14] = 987
4259 09:29:02.651310 tx_first_pass[1][0][14] = 975
4260 09:29:02.654620 tx_last_pass[1][0][14] = 999
4261 09:29:02.655033 tx_win_center[1][0][15] = 980
4262 09:29:02.658087 tx_first_pass[1][0][15] = 969
4263 09:29:02.661036 tx_last_pass[1][0][15] = 992
4264 09:29:02.664343 tx_win_center[1][1][0] = 994
4265 09:29:02.667457 tx_first_pass[1][1][0] = 982
4266 09:29:02.667740 tx_last_pass[1][1][0] = 1007
4267 09:29:02.670759 tx_win_center[1][1][1] = 993
4268 09:29:02.674129 tx_first_pass[1][1][1] = 981
4269 09:29:02.677499 tx_last_pass[1][1][1] = 1006
4270 09:29:02.680705 tx_win_center[1][1][2] = 992
4271 09:29:02.680904 tx_first_pass[1][1][2] = 979
4272 09:29:02.683690 tx_last_pass[1][1][2] = 1005
4273 09:29:02.687090 tx_win_center[1][1][3] = 989
4274 09:29:02.690484 tx_first_pass[1][1][3] = 977
4275 09:29:02.693577 tx_last_pass[1][1][3] = 1001
4276 09:29:02.693681 tx_win_center[1][1][4] = 993
4277 09:29:02.696971 tx_first_pass[1][1][4] = 980
4278 09:29:02.699994 tx_last_pass[1][1][4] = 1006
4279 09:29:02.703317 tx_win_center[1][1][5] = 994
4280 09:29:02.706652 tx_first_pass[1][1][5] = 982
4281 09:29:02.706751 tx_last_pass[1][1][5] = 1006
4282 09:29:02.709979 tx_win_center[1][1][6] = 993
4283 09:29:02.713164 tx_first_pass[1][1][6] = 981
4284 09:29:02.716659 tx_last_pass[1][1][6] = 1006
4285 09:29:02.719769 tx_win_center[1][1][7] = 993
4286 09:29:02.719865 tx_first_pass[1][1][7] = 981
4287 09:29:02.723056 tx_last_pass[1][1][7] = 1006
4288 09:29:02.726043 tx_win_center[1][1][8] = 987
4289 09:29:02.729515 tx_first_pass[1][1][8] = 976
4290 09:29:02.732898 tx_last_pass[1][1][8] = 998
4291 09:29:02.732998 tx_win_center[1][1][9] = 985
4292 09:29:02.736272 tx_first_pass[1][1][9] = 974
4293 09:29:02.739413 tx_last_pass[1][1][9] = 996
4294 09:29:02.742508 tx_win_center[1][1][10] = 988
4295 09:29:02.745938 tx_first_pass[1][1][10] = 977
4296 09:29:02.746038 tx_last_pass[1][1][10] = 1000
4297 09:29:02.749133 tx_win_center[1][1][11] = 988
4298 09:29:02.752292 tx_first_pass[1][1][11] = 977
4299 09:29:02.755945 tx_last_pass[1][1][11] = 1000
4300 09:29:02.758919 tx_win_center[1][1][12] = 988
4301 09:29:02.762219 tx_first_pass[1][1][12] = 977
4302 09:29:02.762323 tx_last_pass[1][1][12] = 1000
4303 09:29:02.765535 tx_win_center[1][1][13] = 989
4304 09:29:02.768871 tx_first_pass[1][1][13] = 977
4305 09:29:02.772129 tx_last_pass[1][1][13] = 1001
4306 09:29:02.775519 tx_win_center[1][1][14] = 988
4307 09:29:02.778510 tx_first_pass[1][1][14] = 977
4308 09:29:02.778611 tx_last_pass[1][1][14] = 1000
4309 09:29:02.781911 tx_win_center[1][1][15] = 982
4310 09:29:02.784977 tx_first_pass[1][1][15] = 970
4311 09:29:02.788347 tx_last_pass[1][1][15] = 994
4312 09:29:02.788455 dump params rx window
4313 09:29:02.791712 rx_firspass[0][0][0] = 7
4314 09:29:02.794740 rx_lastpass[0][0][0] = 36
4315 09:29:02.798081 rx_firspass[0][0][1] = 8
4316 09:29:02.798186 rx_lastpass[0][0][1] = 36
4317 09:29:02.801443 rx_firspass[0][0][2] = 6
4318 09:29:02.804956 rx_lastpass[0][0][2] = 39
4319 09:29:02.805062 rx_firspass[0][0][3] = -3
4320 09:29:02.807874 rx_lastpass[0][0][3] = 30
4321 09:29:02.811086 rx_firspass[0][0][4] = 5
4322 09:29:02.814544 rx_lastpass[0][0][4] = 36
4323 09:29:02.814640 rx_firspass[0][0][5] = 3
4324 09:29:02.817946 rx_lastpass[0][0][5] = 33
4325 09:29:02.821268 rx_firspass[0][0][6] = 3
4326 09:29:02.821361 rx_lastpass[0][0][6] = 33
4327 09:29:02.824244 rx_firspass[0][0][7] = 5
4328 09:29:02.827462 rx_lastpass[0][0][7] = 36
4329 09:29:02.830767 rx_firspass[0][0][8] = -2
4330 09:29:02.830860 rx_lastpass[0][0][8] = 30
4331 09:29:02.834076 rx_firspass[0][0][9] = 2
4332 09:29:02.837548 rx_lastpass[0][0][9] = 32
4333 09:29:02.837647 rx_firspass[0][0][10] = 8
4334 09:29:02.840457 rx_lastpass[0][0][10] = 37
4335 09:29:02.844267 rx_firspass[0][0][11] = 0
4336 09:29:02.847205 rx_lastpass[0][0][11] = 30
4337 09:29:02.847298 rx_firspass[0][0][12] = 3
4338 09:29:02.850501 rx_lastpass[0][0][12] = 31
4339 09:29:02.853893 rx_firspass[0][0][13] = 1
4340 09:29:02.857464 rx_lastpass[0][0][13] = 32
4341 09:29:02.857557 rx_firspass[0][0][14] = 0
4342 09:29:02.860469 rx_lastpass[0][0][14] = 35
4343 09:29:02.863660 rx_firspass[0][0][15] = 4
4344 09:29:02.866705 rx_lastpass[0][0][15] = 36
4345 09:29:02.866797 rx_firspass[0][1][0] = 4
4346 09:29:02.869976 rx_lastpass[0][1][0] = 39
4347 09:29:02.873364 rx_firspass[0][1][1] = 4
4348 09:29:02.873462 rx_lastpass[0][1][1] = 38
4349 09:29:02.876710 rx_firspass[0][1][2] = 6
4350 09:29:02.880050 rx_lastpass[0][1][2] = 40
4351 09:29:02.883300 rx_firspass[0][1][3] = -2
4352 09:29:02.883393 rx_lastpass[0][1][3] = 31
4353 09:29:02.886559 rx_firspass[0][1][4] = 3
4354 09:29:02.889947 rx_lastpass[0][1][4] = 38
4355 09:29:02.890039 rx_firspass[0][1][5] = 0
4356 09:29:02.892969 rx_lastpass[0][1][5] = 34
4357 09:29:02.896300 rx_firspass[0][1][6] = 1
4358 09:29:02.899801 rx_lastpass[0][1][6] = 35
4359 09:29:02.899893 rx_firspass[0][1][7] = 4
4360 09:29:02.902920 rx_lastpass[0][1][7] = 36
4361 09:29:02.906387 rx_firspass[0][1][8] = -4
4362 09:29:02.906479 rx_lastpass[0][1][8] = 32
4363 09:29:02.909784 rx_firspass[0][1][9] = -2
4364 09:29:02.912963 rx_lastpass[0][1][9] = 34
4365 09:29:02.916186 rx_firspass[0][1][10] = 6
4366 09:29:02.916574 rx_lastpass[0][1][10] = 40
4367 09:29:02.919670 rx_firspass[0][1][11] = -2
4368 09:29:02.922719 rx_lastpass[0][1][11] = 32
4369 09:29:02.925940 rx_firspass[0][1][12] = -1
4370 09:29:02.926330 rx_lastpass[0][1][12] = 34
4371 09:29:02.929419 rx_firspass[0][1][13] = -1
4372 09:29:02.932740 rx_lastpass[0][1][13] = 34
4373 09:29:02.936156 rx_firspass[0][1][14] = 2
4374 09:29:02.936555 rx_lastpass[0][1][14] = 35
4375 09:29:02.939099 rx_firspass[0][1][15] = 5
4376 09:29:02.942200 rx_lastpass[0][1][15] = 37
4377 09:29:02.942596 rx_firspass[1][0][0] = 5
4378 09:29:02.945546 rx_lastpass[1][0][0] = 36
4379 09:29:02.949115 rx_firspass[1][0][1] = 3
4380 09:29:02.952120 rx_lastpass[1][0][1] = 36
4381 09:29:02.952506 rx_firspass[1][0][2] = 0
4382 09:29:02.955517 rx_lastpass[1][0][2] = 34
4383 09:29:02.958737 rx_firspass[1][0][3] = 0
4384 09:29:02.959125 rx_lastpass[1][0][3] = 31
4385 09:29:02.962002 rx_firspass[1][0][4] = 5
4386 09:29:02.965157 rx_lastpass[1][0][4] = 35
4387 09:29:02.968697 rx_firspass[1][0][5] = 9
4388 09:29:02.969098 rx_lastpass[1][0][5] = 38
4389 09:29:02.972052 rx_firspass[1][0][6] = 6
4390 09:29:02.975035 rx_lastpass[1][0][6] = 38
4391 09:29:02.975424 rx_firspass[1][0][7] = 5
4392 09:29:02.978435 rx_lastpass[1][0][7] = 34
4393 09:29:02.981568 rx_firspass[1][0][8] = 1
4394 09:29:02.984858 rx_lastpass[1][0][8] = 33
4395 09:29:02.985256 rx_firspass[1][0][9] = 0
4396 09:29:02.988159 rx_lastpass[1][0][9] = 31
4397 09:29:02.991700 rx_firspass[1][0][10] = 3
4398 09:29:02.992085 rx_lastpass[1][0][10] = 36
4399 09:29:02.994600 rx_firspass[1][0][11] = 4
4400 09:29:02.998136 rx_lastpass[1][0][11] = 36
4401 09:29:03.001200 rx_firspass[1][0][12] = 6
4402 09:29:03.001631 rx_lastpass[1][0][12] = 34
4403 09:29:03.004440 rx_firspass[1][0][13] = 5
4404 09:29:03.007874 rx_lastpass[1][0][13] = 36
4405 09:29:03.011281 rx_firspass[1][0][14] = 5
4406 09:29:03.011700 rx_lastpass[1][0][14] = 36
4407 09:29:03.014609 rx_firspass[1][0][15] = -4
4408 09:29:03.017638 rx_lastpass[1][0][15] = 29
4409 09:29:03.020950 rx_firspass[1][1][0] = 4
4410 09:29:03.021340 rx_lastpass[1][1][0] = 40
4411 09:29:03.024314 rx_firspass[1][1][1] = 4
4412 09:29:03.027690 rx_lastpass[1][1][1] = 38
4413 09:29:03.028082 rx_firspass[1][1][2] = 3
4414 09:29:03.030961 rx_lastpass[1][1][2] = 34
4415 09:29:03.033985 rx_firspass[1][1][3] = -2
4416 09:29:03.037323 rx_lastpass[1][1][3] = 33
4417 09:29:03.037763 rx_firspass[1][1][4] = 4
4418 09:29:03.040758 rx_lastpass[1][1][4] = 39
4419 09:29:03.043697 rx_firspass[1][1][5] = 6
4420 09:29:03.044089 rx_lastpass[1][1][5] = 40
4421 09:29:03.047190 rx_firspass[1][1][6] = 6
4422 09:29:03.050585 rx_lastpass[1][1][6] = 40
4423 09:29:03.053803 rx_firspass[1][1][7] = 3
4424 09:29:03.054193 rx_lastpass[1][1][7] = 37
4425 09:29:03.057178 rx_firspass[1][1][8] = -1
4426 09:29:03.060382 rx_lastpass[1][1][8] = 35
4427 09:29:03.060774 rx_firspass[1][1][9] = -2
4428 09:29:03.063405 rx_lastpass[1][1][9] = 32
4429 09:29:03.066789 rx_firspass[1][1][10] = 3
4430 09:29:03.069924 rx_lastpass[1][1][10] = 38
4431 09:29:03.070317 rx_firspass[1][1][11] = 3
4432 09:29:03.073336 rx_lastpass[1][1][11] = 38
4433 09:29:03.076733 rx_firspass[1][1][12] = 3
4434 09:29:03.079892 rx_lastpass[1][1][12] = 37
4435 09:29:03.080290 rx_firspass[1][1][13] = 4
4436 09:29:03.083348 rx_lastpass[1][1][13] = 39
4437 09:29:03.086393 rx_firspass[1][1][14] = 4
4438 09:29:03.089661 rx_lastpass[1][1][14] = 40
4439 09:29:03.090053 rx_firspass[1][1][15] = -4
4440 09:29:03.092992 rx_lastpass[1][1][15] = 31
4441 09:29:03.096477 dump params clk_delay
4442 09:29:03.096965 clk_delay[0] = -1
4443 09:29:03.099424 clk_delay[1] = 0
4444 09:29:03.099956 dump params dqs_delay
4445 09:29:03.103034 dqs_delay[0][0] = -1
4446 09:29:03.103427 dqs_delay[0][1] = 0
4447 09:29:03.106002 dqs_delay[1][0] = 0
4448 09:29:03.106420 dqs_delay[1][1] = -1
4449 09:29:03.109396 dump params delay_cell_unit = 744
4450 09:29:03.112613 dump source = 0x0
4451 09:29:03.115736 dump params frequency:1200
4452 09:29:03.116146 dump params rank number:2
4453 09:29:03.116465
4454 09:29:03.119258 dump params write leveling
4455 09:29:03.122683 write leveling[0][0][0] = 0x0
4456 09:29:03.125849 write leveling[0][0][1] = 0x0
4457 09:29:03.128837 write leveling[0][1][0] = 0x0
4458 09:29:03.129390 write leveling[0][1][1] = 0x0
4459 09:29:03.132071 write leveling[1][0][0] = 0x0
4460 09:29:03.135051 write leveling[1][0][1] = 0x0
4461 09:29:03.138439 write leveling[1][1][0] = 0x0
4462 09:29:03.141879 write leveling[1][1][1] = 0x0
4463 09:29:03.141972 dump params cbt_cs
4464 09:29:03.144903 cbt_cs[0][0] = 0x0
4465 09:29:03.144999 cbt_cs[0][1] = 0x0
4466 09:29:03.148394 cbt_cs[1][0] = 0x0
4467 09:29:03.148487 cbt_cs[1][1] = 0x0
4468 09:29:03.151914 dump params cbt_mr12
4469 09:29:03.152006 cbt_mr12[0][0] = 0x0
4470 09:29:03.155092 cbt_mr12[0][1] = 0x0
4471 09:29:03.158482 cbt_mr12[1][0] = 0x0
4472 09:29:03.158871 cbt_mr12[1][1] = 0x0
4473 09:29:03.161783 dump params tx window
4474 09:29:03.165164 tx_center_min[0][0][0] = 0
4475 09:29:03.165724 tx_center_max[0][0][0] = 0
4476 09:29:03.168094 tx_center_min[0][0][1] = 0
4477 09:29:03.171587 tx_center_max[0][0][1] = 0
4478 09:29:03.174924 tx_center_min[0][1][0] = 0
4479 09:29:03.175563 tx_center_max[0][1][0] = 0
4480 09:29:03.177983 tx_center_min[0][1][1] = 0
4481 09:29:03.181368 tx_center_max[0][1][1] = 0
4482 09:29:03.184402 tx_center_min[1][0][0] = 0
4483 09:29:03.184883 tx_center_max[1][0][0] = 0
4484 09:29:03.187874 tx_center_min[1][0][1] = 0
4485 09:29:03.191171 tx_center_max[1][0][1] = 0
4486 09:29:03.194638 tx_center_min[1][1][0] = 0
4487 09:29:03.195029 tx_center_max[1][1][0] = 0
4488 09:29:03.197534 tx_center_min[1][1][1] = 0
4489 09:29:03.201240 tx_center_max[1][1][1] = 0
4490 09:29:03.201725 dump params tx window
4491 09:29:03.204215 tx_win_center[0][0][0] = 0
4492 09:29:03.207620 tx_first_pass[0][0][0] = 0
4493 09:29:03.210783 tx_last_pass[0][0][0] = 0
4494 09:29:03.211331 tx_win_center[0][0][1] = 0
4495 09:29:03.213996 tx_first_pass[0][0][1] = 0
4496 09:29:03.217234 tx_last_pass[0][0][1] = 0
4497 09:29:03.220598 tx_win_center[0][0][2] = 0
4498 09:29:03.221124 tx_first_pass[0][0][2] = 0
4499 09:29:03.223864 tx_last_pass[0][0][2] = 0
4500 09:29:03.227325 tx_win_center[0][0][3] = 0
4501 09:29:03.230777 tx_first_pass[0][0][3] = 0
4502 09:29:03.231170 tx_last_pass[0][0][3] = 0
4503 09:29:03.233708 tx_win_center[0][0][4] = 0
4504 09:29:03.236961 tx_first_pass[0][0][4] = 0
4505 09:29:03.237567 tx_last_pass[0][0][4] = 0
4506 09:29:03.240412 tx_win_center[0][0][5] = 0
4507 09:29:03.244078 tx_first_pass[0][0][5] = 0
4508 09:29:03.247124 tx_last_pass[0][0][5] = 0
4509 09:29:03.247629 tx_win_center[0][0][6] = 0
4510 09:29:03.250151 tx_first_pass[0][0][6] = 0
4511 09:29:03.253375 tx_last_pass[0][0][6] = 0
4512 09:29:03.256663 tx_win_center[0][0][7] = 0
4513 09:29:03.257093 tx_first_pass[0][0][7] = 0
4514 09:29:03.260036 tx_last_pass[0][0][7] = 0
4515 09:29:03.263119 tx_win_center[0][0][8] = 0
4516 09:29:03.266550 tx_first_pass[0][0][8] = 0
4517 09:29:03.266984 tx_last_pass[0][0][8] = 0
4518 09:29:03.269875 tx_win_center[0][0][9] = 0
4519 09:29:03.272906 tx_first_pass[0][0][9] = 0
4520 09:29:03.276431 tx_last_pass[0][0][9] = 0
4521 09:29:03.276824 tx_win_center[0][0][10] = 0
4522 09:29:03.279574 tx_first_pass[0][0][10] = 0
4523 09:29:03.282543 tx_last_pass[0][0][10] = 0
4524 09:29:03.286145 tx_win_center[0][0][11] = 0
4525 09:29:03.286607 tx_first_pass[0][0][11] = 0
4526 09:29:03.289241 tx_last_pass[0][0][11] = 0
4527 09:29:03.292269 tx_win_center[0][0][12] = 0
4528 09:29:03.295825 tx_first_pass[0][0][12] = 0
4529 09:29:03.296445 tx_last_pass[0][0][12] = 0
4530 09:29:03.298822 tx_win_center[0][0][13] = 0
4531 09:29:03.302078 tx_first_pass[0][0][13] = 0
4532 09:29:03.305553 tx_last_pass[0][0][13] = 0
4533 09:29:03.308970 tx_win_center[0][0][14] = 0
4534 09:29:03.309366 tx_first_pass[0][0][14] = 0
4535 09:29:03.312304 tx_last_pass[0][0][14] = 0
4536 09:29:03.315450 tx_win_center[0][0][15] = 0
4537 09:29:03.318769 tx_first_pass[0][0][15] = 0
4538 09:29:03.319199 tx_last_pass[0][0][15] = 0
4539 09:29:03.322061 tx_win_center[0][1][0] = 0
4540 09:29:03.325192 tx_first_pass[0][1][0] = 0
4541 09:29:03.328294 tx_last_pass[0][1][0] = 0
4542 09:29:03.328745 tx_win_center[0][1][1] = 0
4543 09:29:03.331828 tx_first_pass[0][1][1] = 0
4544 09:29:03.335190 tx_last_pass[0][1][1] = 0
4545 09:29:03.335591 tx_win_center[0][1][2] = 0
4546 09:29:03.338126 tx_first_pass[0][1][2] = 0
4547 09:29:03.341780 tx_last_pass[0][1][2] = 0
4548 09:29:03.344784 tx_win_center[0][1][3] = 0
4549 09:29:03.345181 tx_first_pass[0][1][3] = 0
4550 09:29:03.348030 tx_last_pass[0][1][3] = 0
4551 09:29:03.351361 tx_win_center[0][1][4] = 0
4552 09:29:03.354806 tx_first_pass[0][1][4] = 0
4553 09:29:03.355203 tx_last_pass[0][1][4] = 0
4554 09:29:03.358176 tx_win_center[0][1][5] = 0
4555 09:29:03.361055 tx_first_pass[0][1][5] = 0
4556 09:29:03.364478 tx_last_pass[0][1][5] = 0
4557 09:29:03.364921 tx_win_center[0][1][6] = 0
4558 09:29:03.367804 tx_first_pass[0][1][6] = 0
4559 09:29:03.371277 tx_last_pass[0][1][6] = 0
4560 09:29:03.374155 tx_win_center[0][1][7] = 0
4561 09:29:03.374555 tx_first_pass[0][1][7] = 0
4562 09:29:03.377557 tx_last_pass[0][1][7] = 0
4563 09:29:03.380970 tx_win_center[0][1][8] = 0
4564 09:29:03.384361 tx_first_pass[0][1][8] = 0
4565 09:29:03.384763 tx_last_pass[0][1][8] = 0
4566 09:29:03.387792 tx_win_center[0][1][9] = 0
4567 09:29:03.390791 tx_first_pass[0][1][9] = 0
4568 09:29:03.391189 tx_last_pass[0][1][9] = 0
4569 09:29:03.393848 tx_win_center[0][1][10] = 0
4570 09:29:03.397242 tx_first_pass[0][1][10] = 0
4571 09:29:03.400375 tx_last_pass[0][1][10] = 0
4572 09:29:03.400774 tx_win_center[0][1][11] = 0
4573 09:29:03.403891 tx_first_pass[0][1][11] = 0
4574 09:29:03.407043 tx_last_pass[0][1][11] = 0
4575 09:29:03.410453 tx_win_center[0][1][12] = 0
4576 09:29:03.413665 tx_first_pass[0][1][12] = 0
4577 09:29:03.414061 tx_last_pass[0][1][12] = 0
4578 09:29:03.417124 tx_win_center[0][1][13] = 0
4579 09:29:03.420206 tx_first_pass[0][1][13] = 0
4580 09:29:03.423485 tx_last_pass[0][1][13] = 0
4581 09:29:03.423885 tx_win_center[0][1][14] = 0
4582 09:29:03.426747 tx_first_pass[0][1][14] = 0
4583 09:29:03.430061 tx_last_pass[0][1][14] = 0
4584 09:29:03.433488 tx_win_center[0][1][15] = 0
4585 09:29:03.433887 tx_first_pass[0][1][15] = 0
4586 09:29:03.436506 tx_last_pass[0][1][15] = 0
4587 09:29:03.439658 tx_win_center[1][0][0] = 0
4588 09:29:03.442952 tx_first_pass[1][0][0] = 0
4589 09:29:03.443349 tx_last_pass[1][0][0] = 0
4590 09:29:03.446152 tx_win_center[1][0][1] = 0
4591 09:29:03.449546 tx_first_pass[1][0][1] = 0
4592 09:29:03.453023 tx_last_pass[1][0][1] = 0
4593 09:29:03.453578 tx_win_center[1][0][2] = 0
4594 09:29:03.456039 tx_first_pass[1][0][2] = 0
4595 09:29:03.459447 tx_last_pass[1][0][2] = 0
4596 09:29:03.462810 tx_win_center[1][0][3] = 0
4597 09:29:03.463208 tx_first_pass[1][0][3] = 0
4598 09:29:03.465725 tx_last_pass[1][0][3] = 0
4599 09:29:03.469035 tx_win_center[1][0][4] = 0
4600 09:29:03.472634 tx_first_pass[1][0][4] = 0
4601 09:29:03.473196 tx_last_pass[1][0][4] = 0
4602 09:29:03.475815 tx_win_center[1][0][5] = 0
4603 09:29:03.479199 tx_first_pass[1][0][5] = 0
4604 09:29:03.479604 tx_last_pass[1][0][5] = 0
4605 09:29:03.482267 tx_win_center[1][0][6] = 0
4606 09:29:03.485705 tx_first_pass[1][0][6] = 0
4607 09:29:03.488937 tx_last_pass[1][0][6] = 0
4608 09:29:03.489341 tx_win_center[1][0][7] = 0
4609 09:29:03.492180 tx_first_pass[1][0][7] = 0
4610 09:29:03.495300 tx_last_pass[1][0][7] = 0
4611 09:29:03.498695 tx_win_center[1][0][8] = 0
4612 09:29:03.499182 tx_first_pass[1][0][8] = 0
4613 09:29:03.501730 tx_last_pass[1][0][8] = 0
4614 09:29:03.504999 tx_win_center[1][0][9] = 0
4615 09:29:03.508251 tx_first_pass[1][0][9] = 0
4616 09:29:03.508659 tx_last_pass[1][0][9] = 0
4617 09:29:03.511594 tx_win_center[1][0][10] = 0
4618 09:29:03.514627 tx_first_pass[1][0][10] = 0
4619 09:29:03.518217 tx_last_pass[1][0][10] = 0
4620 09:29:03.518621 tx_win_center[1][0][11] = 0
4621 09:29:03.521337 tx_first_pass[1][0][11] = 0
4622 09:29:03.524645 tx_last_pass[1][0][11] = 0
4623 09:29:03.528011 tx_win_center[1][0][12] = 0
4624 09:29:03.528416 tx_first_pass[1][0][12] = 0
4625 09:29:03.531307 tx_last_pass[1][0][12] = 0
4626 09:29:03.534620 tx_win_center[1][0][13] = 0
4627 09:29:03.537750 tx_first_pass[1][0][13] = 0
4628 09:29:03.541129 tx_last_pass[1][0][13] = 0
4629 09:29:03.541708 tx_win_center[1][0][14] = 0
4630 09:29:03.544373 tx_first_pass[1][0][14] = 0
4631 09:29:03.547456 tx_last_pass[1][0][14] = 0
4632 09:29:03.550914 tx_win_center[1][0][15] = 0
4633 09:29:03.551465 tx_first_pass[1][0][15] = 0
4634 09:29:03.554166 tx_last_pass[1][0][15] = 0
4635 09:29:03.557584 tx_win_center[1][1][0] = 0
4636 09:29:03.560618 tx_first_pass[1][1][0] = 0
4637 09:29:03.561016 tx_last_pass[1][1][0] = 0
4638 09:29:03.563914 tx_win_center[1][1][1] = 0
4639 09:29:03.567504 tx_first_pass[1][1][1] = 0
4640 09:29:03.570712 tx_last_pass[1][1][1] = 0
4641 09:29:03.571112 tx_win_center[1][1][2] = 0
4642 09:29:03.573735 tx_first_pass[1][1][2] = 0
4643 09:29:03.577001 tx_last_pass[1][1][2] = 0
4644 09:29:03.577397 tx_win_center[1][1][3] = 0
4645 09:29:03.580423 tx_first_pass[1][1][3] = 0
4646 09:29:03.583868 tx_last_pass[1][1][3] = 0
4647 09:29:03.586921 tx_win_center[1][1][4] = 0
4648 09:29:03.587315 tx_first_pass[1][1][4] = 0
4649 09:29:03.590221 tx_last_pass[1][1][4] = 0
4650 09:29:03.593659 tx_win_center[1][1][5] = 0
4651 09:29:03.596703 tx_first_pass[1][1][5] = 0
4652 09:29:03.597110 tx_last_pass[1][1][5] = 0
4653 09:29:03.600084 tx_win_center[1][1][6] = 0
4654 09:29:03.603306 tx_first_pass[1][1][6] = 0
4655 09:29:03.606437 tx_last_pass[1][1][6] = 0
4656 09:29:03.606845 tx_win_center[1][1][7] = 0
4657 09:29:03.609767 tx_first_pass[1][1][7] = 0
4658 09:29:03.613016 tx_last_pass[1][1][7] = 0
4659 09:29:03.616130 tx_win_center[1][1][8] = 0
4660 09:29:03.616226 tx_first_pass[1][1][8] = 0
4661 09:29:03.619290 tx_last_pass[1][1][8] = 0
4662 09:29:03.622305 tx_win_center[1][1][9] = 0
4663 09:29:03.625755 tx_first_pass[1][1][9] = 0
4664 09:29:03.625852 tx_last_pass[1][1][9] = 0
4665 09:29:03.629228 tx_win_center[1][1][10] = 0
4666 09:29:03.632150 tx_first_pass[1][1][10] = 0
4667 09:29:03.636099 tx_last_pass[1][1][10] = 0
4668 09:29:03.636506 tx_win_center[1][1][11] = 0
4669 09:29:03.639099 tx_first_pass[1][1][11] = 0
4670 09:29:03.642592 tx_last_pass[1][1][11] = 0
4671 09:29:03.645867 tx_win_center[1][1][12] = 0
4672 09:29:03.646272 tx_first_pass[1][1][12] = 0
4673 09:29:03.648905 tx_last_pass[1][1][12] = 0
4674 09:29:03.652126 tx_win_center[1][1][13] = 0
4675 09:29:03.655414 tx_first_pass[1][1][13] = 0
4676 09:29:03.656029 tx_last_pass[1][1][13] = 0
4677 09:29:03.658991 tx_win_center[1][1][14] = 0
4678 09:29:03.661936 tx_first_pass[1][1][14] = 0
4679 09:29:03.665527 tx_last_pass[1][1][14] = 0
4680 09:29:03.666265 tx_win_center[1][1][15] = 0
4681 09:29:03.668662 tx_first_pass[1][1][15] = 0
4682 09:29:03.672067 tx_last_pass[1][1][15] = 0
4683 09:29:03.675347 dump params rx window
4684 09:29:03.675744 rx_firspass[0][0][0] = 0
4685 09:29:03.678384 rx_lastpass[0][0][0] = 0
4686 09:29:03.681814 rx_firspass[0][0][1] = 0
4687 09:29:03.682281 rx_lastpass[0][0][1] = 0
4688 09:29:03.685318 rx_firspass[0][0][2] = 0
4689 09:29:03.688278 rx_lastpass[0][0][2] = 0
4690 09:29:03.688670 rx_firspass[0][0][3] = 0
4691 09:29:03.691555 rx_lastpass[0][0][3] = 0
4692 09:29:03.694883 rx_firspass[0][0][4] = 0
4693 09:29:03.698038 rx_lastpass[0][0][4] = 0
4694 09:29:03.698615 rx_firspass[0][0][5] = 0
4695 09:29:03.701291 rx_lastpass[0][0][5] = 0
4696 09:29:03.704698 rx_firspass[0][0][6] = 0
4697 09:29:03.705244 rx_lastpass[0][0][6] = 0
4698 09:29:03.707811 rx_firspass[0][0][7] = 0
4699 09:29:03.711146 rx_lastpass[0][0][7] = 0
4700 09:29:03.711678 rx_firspass[0][0][8] = 0
4701 09:29:03.714392 rx_lastpass[0][0][8] = 0
4702 09:29:03.717522 rx_firspass[0][0][9] = 0
4703 09:29:03.720976 rx_lastpass[0][0][9] = 0
4704 09:29:03.721241 rx_firspass[0][0][10] = 0
4705 09:29:03.724204 rx_lastpass[0][0][10] = 0
4706 09:29:03.727333 rx_firspass[0][0][11] = 0
4707 09:29:03.727622 rx_lastpass[0][0][11] = 0
4708 09:29:03.730605 rx_firspass[0][0][12] = 0
4709 09:29:03.733965 rx_lastpass[0][0][12] = 0
4710 09:29:03.737332 rx_firspass[0][0][13] = 0
4711 09:29:03.737629 rx_lastpass[0][0][13] = 0
4712 09:29:03.740515 rx_firspass[0][0][14] = 0
4713 09:29:03.743894 rx_lastpass[0][0][14] = 0
4714 09:29:03.744179 rx_firspass[0][0][15] = 0
4715 09:29:03.747216 rx_lastpass[0][0][15] = 0
4716 09:29:03.750257 rx_firspass[0][1][0] = 0
4717 09:29:03.753608 rx_lastpass[0][1][0] = 0
4718 09:29:03.753906 rx_firspass[0][1][1] = 0
4719 09:29:03.756899 rx_lastpass[0][1][1] = 0
4720 09:29:03.760007 rx_firspass[0][1][2] = 0
4721 09:29:03.760307 rx_lastpass[0][1][2] = 0
4722 09:29:03.763412 rx_firspass[0][1][3] = 0
4723 09:29:03.766696 rx_lastpass[0][1][3] = 0
4724 09:29:03.766988 rx_firspass[0][1][4] = 0
4725 09:29:03.769943 rx_lastpass[0][1][4] = 0
4726 09:29:03.773056 rx_firspass[0][1][5] = 0
4727 09:29:03.776441 rx_lastpass[0][1][5] = 0
4728 09:29:03.776727 rx_firspass[0][1][6] = 0
4729 09:29:03.779813 rx_lastpass[0][1][6] = 0
4730 09:29:03.783120 rx_firspass[0][1][7] = 0
4731 09:29:03.783385 rx_lastpass[0][1][7] = 0
4732 09:29:03.786587 rx_firspass[0][1][8] = 0
4733 09:29:03.789542 rx_lastpass[0][1][8] = 0
4734 09:29:03.789924 rx_firspass[0][1][9] = 0
4735 09:29:03.792959 rx_lastpass[0][1][9] = 0
4736 09:29:03.796342 rx_firspass[0][1][10] = 0
4737 09:29:03.799790 rx_lastpass[0][1][10] = 0
4738 09:29:03.800320 rx_firspass[0][1][11] = 0
4739 09:29:03.802720 rx_lastpass[0][1][11] = 0
4740 09:29:03.806086 rx_firspass[0][1][12] = 0
4741 09:29:03.806649 rx_lastpass[0][1][12] = 0
4742 09:29:03.809424 rx_firspass[0][1][13] = 0
4743 09:29:03.812488 rx_lastpass[0][1][13] = 0
4744 09:29:03.815905 rx_firspass[0][1][14] = 0
4745 09:29:03.816489 rx_lastpass[0][1][14] = 0
4746 09:29:03.819273 rx_firspass[0][1][15] = 0
4747 09:29:03.822355 rx_lastpass[0][1][15] = 0
4748 09:29:03.825729 rx_firspass[1][0][0] = 0
4749 09:29:03.826236 rx_lastpass[1][0][0] = 0
4750 09:29:03.829087 rx_firspass[1][0][1] = 0
4751 09:29:03.832181 rx_lastpass[1][0][1] = 0
4752 09:29:03.832712 rx_firspass[1][0][2] = 0
4753 09:29:03.835749 rx_lastpass[1][0][2] = 0
4754 09:29:03.838715 rx_firspass[1][0][3] = 0
4755 09:29:03.839406 rx_lastpass[1][0][3] = 0
4756 09:29:03.841969 rx_firspass[1][0][4] = 0
4757 09:29:03.845243 rx_lastpass[1][0][4] = 0
4758 09:29:03.845886 rx_firspass[1][0][5] = 0
4759 09:29:03.848553 rx_lastpass[1][0][5] = 0
4760 09:29:03.852074 rx_firspass[1][0][6] = 0
4761 09:29:03.855163 rx_lastpass[1][0][6] = 0
4762 09:29:03.855290 rx_firspass[1][0][7] = 0
4763 09:29:03.858366 rx_lastpass[1][0][7] = 0
4764 09:29:03.861527 rx_firspass[1][0][8] = 0
4765 09:29:03.861656 rx_lastpass[1][0][8] = 0
4766 09:29:03.864858 rx_firspass[1][0][9] = 0
4767 09:29:03.867833 rx_lastpass[1][0][9] = 0
4768 09:29:03.867960 rx_firspass[1][0][10] = 0
4769 09:29:03.871232 rx_lastpass[1][0][10] = 0
4770 09:29:03.874409 rx_firspass[1][0][11] = 0
4771 09:29:03.878065 rx_lastpass[1][0][11] = 0
4772 09:29:03.878158 rx_firspass[1][0][12] = 0
4773 09:29:03.881108 rx_lastpass[1][0][12] = 0
4774 09:29:03.884623 rx_firspass[1][0][13] = 0
4775 09:29:03.887811 rx_lastpass[1][0][13] = 0
4776 09:29:03.887904 rx_firspass[1][0][14] = 0
4777 09:29:03.891017 rx_lastpass[1][0][14] = 0
4778 09:29:03.894307 rx_firspass[1][0][15] = 0
4779 09:29:03.894400 rx_lastpass[1][0][15] = 0
4780 09:29:03.897277 rx_firspass[1][1][0] = 0
4781 09:29:03.900776 rx_lastpass[1][1][0] = 0
4782 09:29:03.904187 rx_firspass[1][1][1] = 0
4783 09:29:03.904280 rx_lastpass[1][1][1] = 0
4784 09:29:03.907182 rx_firspass[1][1][2] = 0
4785 09:29:03.910491 rx_lastpass[1][1][2] = 0
4786 09:29:03.910584 rx_firspass[1][1][3] = 0
4787 09:29:03.913996 rx_lastpass[1][1][3] = 0
4788 09:29:03.917357 rx_firspass[1][1][4] = 0
4789 09:29:03.917465 rx_lastpass[1][1][4] = 0
4790 09:29:03.920386 rx_firspass[1][1][5] = 0
4791 09:29:03.923872 rx_lastpass[1][1][5] = 0
4792 09:29:03.927177 rx_firspass[1][1][6] = 0
4793 09:29:03.927295 rx_lastpass[1][1][6] = 0
4794 09:29:03.930232 rx_firspass[1][1][7] = 0
4795 09:29:03.933553 rx_lastpass[1][1][7] = 0
4796 09:29:03.933684 rx_firspass[1][1][8] = 0
4797 09:29:03.936856 rx_lastpass[1][1][8] = 0
4798 09:29:03.940234 rx_firspass[1][1][9] = 0
4799 09:29:03.940409 rx_lastpass[1][1][9] = 0
4800 09:29:03.943274 rx_firspass[1][1][10] = 0
4801 09:29:03.946738 rx_lastpass[1][1][10] = 0
4802 09:29:03.949939 rx_firspass[1][1][11] = 0
4803 09:29:03.950032 rx_lastpass[1][1][11] = 0
4804 09:29:03.953242 rx_firspass[1][1][12] = 0
4805 09:29:03.956203 rx_lastpass[1][1][12] = 0
4806 09:29:03.956327 rx_firspass[1][1][13] = 0
4807 09:29:03.959754 rx_lastpass[1][1][13] = 0
4808 09:29:03.963070 rx_firspass[1][1][14] = 0
4809 09:29:03.966372 rx_lastpass[1][1][14] = 0
4810 09:29:03.966459 rx_firspass[1][1][15] = 0
4811 09:29:03.969700 rx_lastpass[1][1][15] = 0
4812 09:29:03.972935 dump params clk_delay
4813 09:29:03.973066 clk_delay[0] = 0
4814 09:29:03.975859 clk_delay[1] = 0
4815 09:29:03.975942 dump params dqs_delay
4816 09:29:03.979321 dqs_delay[0][0] = 0
4817 09:29:03.979403 dqs_delay[0][1] = 0
4818 09:29:03.982554 dqs_delay[1][0] = 0
4819 09:29:03.982634 dqs_delay[1][1] = 0
4820 09:29:03.985902 dump params delay_cell_unit = 744
4821 09:29:03.989166 dump source = 0x0
4822 09:29:03.992541 dump params frequency:800
4823 09:29:03.992661 dump params rank number:2
4824 09:29:03.992774
4825 09:29:03.995920 dump params write leveling
4826 09:29:03.999218 write leveling[0][0][0] = 0x0
4827 09:29:04.002112 write leveling[0][0][1] = 0x0
4828 09:29:04.005394 write leveling[0][1][0] = 0x0
4829 09:29:04.005509 write leveling[0][1][1] = 0x0
4830 09:29:04.008858 write leveling[1][0][0] = 0x0
4831 09:29:04.011958 write leveling[1][0][1] = 0x0
4832 09:29:04.015333 write leveling[1][1][0] = 0x0
4833 09:29:04.018748 write leveling[1][1][1] = 0x0
4834 09:29:04.018871 dump params cbt_cs
4835 09:29:04.021837 cbt_cs[0][0] = 0x0
4836 09:29:04.021980 cbt_cs[0][1] = 0x0
4837 09:29:04.025161 cbt_cs[1][0] = 0x0
4838 09:29:04.025308 cbt_cs[1][1] = 0x0
4839 09:29:04.028642 dump params cbt_mr12
4840 09:29:04.028793 cbt_mr12[0][0] = 0x0
4841 09:29:04.031669 cbt_mr12[0][1] = 0x0
4842 09:29:04.035466 cbt_mr12[1][0] = 0x0
4843 09:29:04.035551 cbt_mr12[1][1] = 0x0
4844 09:29:04.038101 dump params tx window
4845 09:29:04.041236 tx_center_min[0][0][0] = 0
4846 09:29:04.041376 tx_center_max[0][0][0] = 0
4847 09:29:04.044586 tx_center_min[0][0][1] = 0
4848 09:29:04.048236 tx_center_max[0][0][1] = 0
4849 09:29:04.051230 tx_center_min[0][1][0] = 0
4850 09:29:04.051350 tx_center_max[0][1][0] = 0
4851 09:29:04.054428 tx_center_min[0][1][1] = 0
4852 09:29:04.058140 tx_center_max[0][1][1] = 0
4853 09:29:04.061024 tx_center_min[1][0][0] = 0
4854 09:29:04.061172 tx_center_max[1][0][0] = 0
4855 09:29:04.064559 tx_center_min[1][0][1] = 0
4856 09:29:04.067619 tx_center_max[1][0][1] = 0
4857 09:29:04.070861 tx_center_min[1][1][0] = 0
4858 09:29:04.071114 tx_center_max[1][1][0] = 0
4859 09:29:04.074141 tx_center_min[1][1][1] = 0
4860 09:29:04.077800 tx_center_max[1][1][1] = 0
4861 09:29:04.078030 dump params tx window
4862 09:29:04.081223 tx_win_center[0][0][0] = 0
4863 09:29:04.084159 tx_first_pass[0][0][0] = 0
4864 09:29:04.087529 tx_last_pass[0][0][0] = 0
4865 09:29:04.087895 tx_win_center[0][0][1] = 0
4866 09:29:04.090908 tx_first_pass[0][0][1] = 0
4867 09:29:04.094164 tx_last_pass[0][0][1] = 0
4868 09:29:04.097285 tx_win_center[0][0][2] = 0
4869 09:29:04.097773 tx_first_pass[0][0][2] = 0
4870 09:29:04.100685 tx_last_pass[0][0][2] = 0
4871 09:29:04.104054 tx_win_center[0][0][3] = 0
4872 09:29:04.107233 tx_first_pass[0][0][3] = 0
4873 09:29:04.107601 tx_last_pass[0][0][3] = 0
4874 09:29:04.110579 tx_win_center[0][0][4] = 0
4875 09:29:04.113963 tx_first_pass[0][0][4] = 0
4876 09:29:04.114353 tx_last_pass[0][0][4] = 0
4877 09:29:04.117257 tx_win_center[0][0][5] = 0
4878 09:29:04.120229 tx_first_pass[0][0][5] = 0
4879 09:29:04.123509 tx_last_pass[0][0][5] = 0
4880 09:29:04.123902 tx_win_center[0][0][6] = 0
4881 09:29:04.127013 tx_first_pass[0][0][6] = 0
4882 09:29:04.130151 tx_last_pass[0][0][6] = 0
4883 09:29:04.133426 tx_win_center[0][0][7] = 0
4884 09:29:04.133856 tx_first_pass[0][0][7] = 0
4885 09:29:04.136927 tx_last_pass[0][0][7] = 0
4886 09:29:04.139881 tx_win_center[0][0][8] = 0
4887 09:29:04.143434 tx_first_pass[0][0][8] = 0
4888 09:29:04.143827 tx_last_pass[0][0][8] = 0
4889 09:29:04.146554 tx_win_center[0][0][9] = 0
4890 09:29:04.149807 tx_first_pass[0][0][9] = 0
4891 09:29:04.150201 tx_last_pass[0][0][9] = 0
4892 09:29:04.153231 tx_win_center[0][0][10] = 0
4893 09:29:04.156606 tx_first_pass[0][0][10] = 0
4894 09:29:04.159705 tx_last_pass[0][0][10] = 0
4895 09:29:04.163046 tx_win_center[0][0][11] = 0
4896 09:29:04.163441 tx_first_pass[0][0][11] = 0
4897 09:29:04.166421 tx_last_pass[0][0][11] = 0
4898 09:29:04.169807 tx_win_center[0][0][12] = 0
4899 09:29:04.172747 tx_first_pass[0][0][12] = 0
4900 09:29:04.173141 tx_last_pass[0][0][12] = 0
4901 09:29:04.176151 tx_win_center[0][0][13] = 0
4902 09:29:04.179431 tx_first_pass[0][0][13] = 0
4903 09:29:04.182782 tx_last_pass[0][0][13] = 0
4904 09:29:04.183175 tx_win_center[0][0][14] = 0
4905 09:29:04.185928 tx_first_pass[0][0][14] = 0
4906 09:29:04.189111 tx_last_pass[0][0][14] = 0
4907 09:29:04.192483 tx_win_center[0][0][15] = 0
4908 09:29:04.193098 tx_first_pass[0][0][15] = 0
4909 09:29:04.195723 tx_last_pass[0][0][15] = 0
4910 09:29:04.199265 tx_win_center[0][1][0] = 0
4911 09:29:04.202467 tx_first_pass[0][1][0] = 0
4912 09:29:04.202959 tx_last_pass[0][1][0] = 0
4913 09:29:04.205596 tx_win_center[0][1][1] = 0
4914 09:29:04.208839 tx_first_pass[0][1][1] = 0
4915 09:29:04.211857 tx_last_pass[0][1][1] = 0
4916 09:29:04.212250 tx_win_center[0][1][2] = 0
4917 09:29:04.215282 tx_first_pass[0][1][2] = 0
4918 09:29:04.218400 tx_last_pass[0][1][2] = 0
4919 09:29:04.222044 tx_win_center[0][1][3] = 0
4920 09:29:04.222436 tx_first_pass[0][1][3] = 0
4921 09:29:04.225056 tx_last_pass[0][1][3] = 0
4922 09:29:04.228435 tx_win_center[0][1][4] = 0
4923 09:29:04.231506 tx_first_pass[0][1][4] = 0
4924 09:29:04.231896 tx_last_pass[0][1][4] = 0
4925 09:29:04.234767 tx_win_center[0][1][5] = 0
4926 09:29:04.238249 tx_first_pass[0][1][5] = 0
4927 09:29:04.241724 tx_last_pass[0][1][5] = 0
4928 09:29:04.242328 tx_win_center[0][1][6] = 0
4929 09:29:04.244615 tx_first_pass[0][1][6] = 0
4930 09:29:04.247985 tx_last_pass[0][1][6] = 0
4931 09:29:04.248713 tx_win_center[0][1][7] = 0
4932 09:29:04.251257 tx_first_pass[0][1][7] = 0
4933 09:29:04.254555 tx_last_pass[0][1][7] = 0
4934 09:29:04.257786 tx_win_center[0][1][8] = 0
4935 09:29:04.258273 tx_first_pass[0][1][8] = 0
4936 09:29:04.261126 tx_last_pass[0][1][8] = 0
4937 09:29:04.264427 tx_win_center[0][1][9] = 0
4938 09:29:04.267851 tx_first_pass[0][1][9] = 0
4939 09:29:04.268267 tx_last_pass[0][1][9] = 0
4940 09:29:04.271192 tx_win_center[0][1][10] = 0
4941 09:29:04.274212 tx_first_pass[0][1][10] = 0
4942 09:29:04.277383 tx_last_pass[0][1][10] = 0
4943 09:29:04.277826 tx_win_center[0][1][11] = 0
4944 09:29:04.280743 tx_first_pass[0][1][11] = 0
4945 09:29:04.283926 tx_last_pass[0][1][11] = 0
4946 09:29:04.287352 tx_win_center[0][1][12] = 0
4947 09:29:04.287745 tx_first_pass[0][1][12] = 0
4948 09:29:04.290761 tx_last_pass[0][1][12] = 0
4949 09:29:04.293950 tx_win_center[0][1][13] = 0
4950 09:29:04.296874 tx_first_pass[0][1][13] = 0
4951 09:29:04.300245 tx_last_pass[0][1][13] = 0
4952 09:29:04.300648 tx_win_center[0][1][14] = 0
4953 09:29:04.303514 tx_first_pass[0][1][14] = 0
4954 09:29:04.307106 tx_last_pass[0][1][14] = 0
4955 09:29:04.310393 tx_win_center[0][1][15] = 0
4956 09:29:04.310787 tx_first_pass[0][1][15] = 0
4957 09:29:04.313421 tx_last_pass[0][1][15] = 0
4958 09:29:04.316738 tx_win_center[1][0][0] = 0
4959 09:29:04.320111 tx_first_pass[1][0][0] = 0
4960 09:29:04.320540 tx_last_pass[1][0][0] = 0
4961 09:29:04.323103 tx_win_center[1][0][1] = 0
4962 09:29:04.326754 tx_first_pass[1][0][1] = 0
4963 09:29:04.329639 tx_last_pass[1][0][1] = 0
4964 09:29:04.330147 tx_win_center[1][0][2] = 0
4965 09:29:04.333395 tx_first_pass[1][0][2] = 0
4966 09:29:04.336548 tx_last_pass[1][0][2] = 0
4967 09:29:04.336952 tx_win_center[1][0][3] = 0
4968 09:29:04.339881 tx_first_pass[1][0][3] = 0
4969 09:29:04.342895 tx_last_pass[1][0][3] = 0
4970 09:29:04.346375 tx_win_center[1][0][4] = 0
4971 09:29:04.346848 tx_first_pass[1][0][4] = 0
4972 09:29:04.349274 tx_last_pass[1][0][4] = 0
4973 09:29:04.352724 tx_win_center[1][0][5] = 0
4974 09:29:04.356119 tx_first_pass[1][0][5] = 0
4975 09:29:04.356514 tx_last_pass[1][0][5] = 0
4976 09:29:04.359350 tx_win_center[1][0][6] = 0
4977 09:29:04.362547 tx_first_pass[1][0][6] = 0
4978 09:29:04.365968 tx_last_pass[1][0][6] = 0
4979 09:29:04.366367 tx_win_center[1][0][7] = 0
4980 09:29:04.369179 tx_first_pass[1][0][7] = 0
4981 09:29:04.372318 tx_last_pass[1][0][7] = 0
4982 09:29:04.375743 tx_win_center[1][0][8] = 0
4983 09:29:04.376142 tx_first_pass[1][0][8] = 0
4984 09:29:04.379309 tx_last_pass[1][0][8] = 0
4985 09:29:04.382161 tx_win_center[1][0][9] = 0
4986 09:29:04.382705 tx_first_pass[1][0][9] = 0
4987 09:29:04.385675 tx_last_pass[1][0][9] = 0
4988 09:29:04.388753 tx_win_center[1][0][10] = 0
4989 09:29:04.392089 tx_first_pass[1][0][10] = 0
4990 09:29:04.392487 tx_last_pass[1][0][10] = 0
4991 09:29:04.395590 tx_win_center[1][0][11] = 0
4992 09:29:04.398515 tx_first_pass[1][0][11] = 0
4993 09:29:04.402230 tx_last_pass[1][0][11] = 0
4994 09:29:04.405185 tx_win_center[1][0][12] = 0
4995 09:29:04.405620 tx_first_pass[1][0][12] = 0
4996 09:29:04.408356 tx_last_pass[1][0][12] = 0
4997 09:29:04.411628 tx_win_center[1][0][13] = 0
4998 09:29:04.415008 tx_first_pass[1][0][13] = 0
4999 09:29:04.415406 tx_last_pass[1][0][13] = 0
5000 09:29:04.418339 tx_win_center[1][0][14] = 0
5001 09:29:04.421314 tx_first_pass[1][0][14] = 0
5002 09:29:04.424588 tx_last_pass[1][0][14] = 0
5003 09:29:04.425047 tx_win_center[1][0][15] = 0
5004 09:29:04.428043 tx_first_pass[1][0][15] = 0
5005 09:29:04.431203 tx_last_pass[1][0][15] = 0
5006 09:29:04.434458 tx_win_center[1][1][0] = 0
5007 09:29:04.434856 tx_first_pass[1][1][0] = 0
5008 09:29:04.438004 tx_last_pass[1][1][0] = 0
5009 09:29:04.441066 tx_win_center[1][1][1] = 0
5010 09:29:04.444244 tx_first_pass[1][1][1] = 0
5011 09:29:04.444760 tx_last_pass[1][1][1] = 0
5012 09:29:04.447383 tx_win_center[1][1][2] = 0
5013 09:29:04.451096 tx_first_pass[1][1][2] = 0
5014 09:29:04.454053 tx_last_pass[1][1][2] = 0
5015 09:29:04.454581 tx_win_center[1][1][3] = 0
5016 09:29:04.457278 tx_first_pass[1][1][3] = 0
5017 09:29:04.460653 tx_last_pass[1][1][3] = 0
5018 09:29:04.463896 tx_win_center[1][1][4] = 0
5019 09:29:04.464412 tx_first_pass[1][1][4] = 0
5020 09:29:04.467160 tx_last_pass[1][1][4] = 0
5021 09:29:04.470565 tx_win_center[1][1][5] = 0
5022 09:29:04.473973 tx_first_pass[1][1][5] = 0
5023 09:29:04.474561 tx_last_pass[1][1][5] = 0
5024 09:29:04.477147 tx_win_center[1][1][6] = 0
5025 09:29:04.480171 tx_first_pass[1][1][6] = 0
5026 09:29:04.480696 tx_last_pass[1][1][6] = 0
5027 09:29:04.483615 tx_win_center[1][1][7] = 0
5028 09:29:04.487049 tx_first_pass[1][1][7] = 0
5029 09:29:04.490184 tx_last_pass[1][1][7] = 0
5030 09:29:04.490590 tx_win_center[1][1][8] = 0
5031 09:29:04.493420 tx_first_pass[1][1][8] = 0
5032 09:29:04.497004 tx_last_pass[1][1][8] = 0
5033 09:29:04.500293 tx_win_center[1][1][9] = 0
5034 09:29:04.500717 tx_first_pass[1][1][9] = 0
5035 09:29:04.503209 tx_last_pass[1][1][9] = 0
5036 09:29:04.506510 tx_win_center[1][1][10] = 0
5037 09:29:04.509698 tx_first_pass[1][1][10] = 0
5038 09:29:04.510411 tx_last_pass[1][1][10] = 0
5039 09:29:04.513154 tx_win_center[1][1][11] = 0
5040 09:29:04.516495 tx_first_pass[1][1][11] = 0
5041 09:29:04.519655 tx_last_pass[1][1][11] = 0
5042 09:29:04.520188 tx_win_center[1][1][12] = 0
5043 09:29:04.522947 tx_first_pass[1][1][12] = 0
5044 09:29:04.526230 tx_last_pass[1][1][12] = 0
5045 09:29:04.529493 tx_win_center[1][1][13] = 0
5046 09:29:04.529899 tx_first_pass[1][1][13] = 0
5047 09:29:04.533022 tx_last_pass[1][1][13] = 0
5048 09:29:04.535939 tx_win_center[1][1][14] = 0
5049 09:29:04.539314 tx_first_pass[1][1][14] = 0
5050 09:29:04.539751 tx_last_pass[1][1][14] = 0
5051 09:29:04.542582 tx_win_center[1][1][15] = 0
5052 09:29:04.546156 tx_first_pass[1][1][15] = 0
5053 09:29:04.549401 tx_last_pass[1][1][15] = 0
5054 09:29:04.549863 dump params rx window
5055 09:29:04.552517 rx_firspass[0][0][0] = 0
5056 09:29:04.555955 rx_lastpass[0][0][0] = 0
5057 09:29:04.556352 rx_firspass[0][0][1] = 0
5058 09:29:04.559242 rx_lastpass[0][0][1] = 0
5059 09:29:04.562405 rx_firspass[0][0][2] = 0
5060 09:29:04.565501 rx_lastpass[0][0][2] = 0
5061 09:29:04.565870 rx_firspass[0][0][3] = 0
5062 09:29:04.568814 rx_lastpass[0][0][3] = 0
5063 09:29:04.572016 rx_firspass[0][0][4] = 0
5064 09:29:04.572529 rx_lastpass[0][0][4] = 0
5065 09:29:04.575301 rx_firspass[0][0][5] = 0
5066 09:29:04.578522 rx_lastpass[0][0][5] = 0
5067 09:29:04.578934 rx_firspass[0][0][6] = 0
5068 09:29:04.581814 rx_lastpass[0][0][6] = 0
5069 09:29:04.585193 rx_firspass[0][0][7] = 0
5070 09:29:04.588633 rx_lastpass[0][0][7] = 0
5071 09:29:04.589161 rx_firspass[0][0][8] = 0
5072 09:29:04.591551 rx_lastpass[0][0][8] = 0
5073 09:29:04.594945 rx_firspass[0][0][9] = 0
5074 09:29:04.595382 rx_lastpass[0][0][9] = 0
5075 09:29:04.598427 rx_firspass[0][0][10] = 0
5076 09:29:04.601723 rx_lastpass[0][0][10] = 0
5077 09:29:04.602110 rx_firspass[0][0][11] = 0
5078 09:29:04.604819 rx_lastpass[0][0][11] = 0
5079 09:29:04.608193 rx_firspass[0][0][12] = 0
5080 09:29:04.611423 rx_lastpass[0][0][12] = 0
5081 09:29:04.611796 rx_firspass[0][0][13] = 0
5082 09:29:04.614610 rx_lastpass[0][0][13] = 0
5083 09:29:04.617858 rx_firspass[0][0][14] = 0
5084 09:29:04.621291 rx_lastpass[0][0][14] = 0
5085 09:29:04.621729 rx_firspass[0][0][15] = 0
5086 09:29:04.624563 rx_lastpass[0][0][15] = 0
5087 09:29:04.627794 rx_firspass[0][1][0] = 0
5088 09:29:04.628144 rx_lastpass[0][1][0] = 0
5089 09:29:04.631193 rx_firspass[0][1][1] = 0
5090 09:29:04.634304 rx_lastpass[0][1][1] = 0
5091 09:29:04.634699 rx_firspass[0][1][2] = 0
5092 09:29:04.637754 rx_lastpass[0][1][2] = 0
5093 09:29:04.640788 rx_firspass[0][1][3] = 0
5094 09:29:04.643767 rx_lastpass[0][1][3] = 0
5095 09:29:04.643891 rx_firspass[0][1][4] = 0
5096 09:29:04.647241 rx_lastpass[0][1][4] = 0
5097 09:29:04.650546 rx_firspass[0][1][5] = 0
5098 09:29:04.650639 rx_lastpass[0][1][5] = 0
5099 09:29:04.653782 rx_firspass[0][1][6] = 0
5100 09:29:04.656799 rx_lastpass[0][1][6] = 0
5101 09:29:04.656893 rx_firspass[0][1][7] = 0
5102 09:29:04.660216 rx_lastpass[0][1][7] = 0
5103 09:29:04.663591 rx_firspass[0][1][8] = 0
5104 09:29:04.666824 rx_lastpass[0][1][8] = 0
5105 09:29:04.666918 rx_firspass[0][1][9] = 0
5106 09:29:04.669994 rx_lastpass[0][1][9] = 0
5107 09:29:04.673492 rx_firspass[0][1][10] = 0
5108 09:29:04.673586 rx_lastpass[0][1][10] = 0
5109 09:29:04.676574 rx_firspass[0][1][11] = 0
5110 09:29:04.679653 rx_lastpass[0][1][11] = 0
5111 09:29:04.682991 rx_firspass[0][1][12] = 0
5112 09:29:04.683085 rx_lastpass[0][1][12] = 0
5113 09:29:04.686400 rx_firspass[0][1][13] = 0
5114 09:29:04.689767 rx_lastpass[0][1][13] = 0
5115 09:29:04.689861 rx_firspass[0][1][14] = 0
5116 09:29:04.693194 rx_lastpass[0][1][14] = 0
5117 09:29:04.696149 rx_firspass[0][1][15] = 0
5118 09:29:04.699689 rx_lastpass[0][1][15] = 0
5119 09:29:04.699783 rx_firspass[1][0][0] = 0
5120 09:29:04.703131 rx_lastpass[1][0][0] = 0
5121 09:29:04.706179 rx_firspass[1][0][1] = 0
5122 09:29:04.706273 rx_lastpass[1][0][1] = 0
5123 09:29:04.709563 rx_firspass[1][0][2] = 0
5124 09:29:04.712830 rx_lastpass[1][0][2] = 0
5125 09:29:04.715806 rx_firspass[1][0][3] = 0
5126 09:29:04.715892 rx_lastpass[1][0][3] = 0
5127 09:29:04.719157 rx_firspass[1][0][4] = 0
5128 09:29:04.722420 rx_lastpass[1][0][4] = 0
5129 09:29:04.722514 rx_firspass[1][0][5] = 0
5130 09:29:04.725701 rx_lastpass[1][0][5] = 0
5131 09:29:04.728844 rx_firspass[1][0][6] = 0
5132 09:29:04.728938 rx_lastpass[1][0][6] = 0
5133 09:29:04.732495 rx_firspass[1][0][7] = 0
5134 09:29:04.735684 rx_lastpass[1][0][7] = 0
5135 09:29:04.735778 rx_firspass[1][0][8] = 0
5136 09:29:04.739022 rx_lastpass[1][0][8] = 0
5137 09:29:04.742342 rx_firspass[1][0][9] = 0
5138 09:29:04.745363 rx_lastpass[1][0][9] = 0
5139 09:29:04.745461 rx_firspass[1][0][10] = 0
5140 09:29:04.748818 rx_lastpass[1][0][10] = 0
5141 09:29:04.751769 rx_firspass[1][0][11] = 0
5142 09:29:04.751881 rx_lastpass[1][0][11] = 0
5143 09:29:04.755273 rx_firspass[1][0][12] = 0
5144 09:29:04.758689 rx_lastpass[1][0][12] = 0
5145 09:29:04.761949 rx_firspass[1][0][13] = 0
5146 09:29:04.762046 rx_lastpass[1][0][13] = 0
5147 09:29:04.765043 rx_firspass[1][0][14] = 0
5148 09:29:04.768349 rx_lastpass[1][0][14] = 0
5149 09:29:04.771568 rx_firspass[1][0][15] = 0
5150 09:29:04.771662 rx_lastpass[1][0][15] = 0
5151 09:29:04.774990 rx_firspass[1][1][0] = 0
5152 09:29:04.778255 rx_lastpass[1][1][0] = 0
5153 09:29:04.778349 rx_firspass[1][1][1] = 0
5154 09:29:04.781234 rx_lastpass[1][1][1] = 0
5155 09:29:04.784774 rx_firspass[1][1][2] = 0
5156 09:29:04.784868 rx_lastpass[1][1][2] = 0
5157 09:29:04.787877 rx_firspass[1][1][3] = 0
5158 09:29:04.791206 rx_lastpass[1][1][3] = 0
5159 09:29:04.794739 rx_firspass[1][1][4] = 0
5160 09:29:04.794834 rx_lastpass[1][1][4] = 0
5161 09:29:04.797600 rx_firspass[1][1][5] = 0
5162 09:29:04.800958 rx_lastpass[1][1][5] = 0
5163 09:29:04.801053 rx_firspass[1][1][6] = 0
5164 09:29:04.804393 rx_lastpass[1][1][6] = 0
5165 09:29:04.807891 rx_firspass[1][1][7] = 0
5166 09:29:04.807985 rx_lastpass[1][1][7] = 0
5167 09:29:04.810807 rx_firspass[1][1][8] = 0
5168 09:29:04.814129 rx_lastpass[1][1][8] = 0
5169 09:29:04.817437 rx_firspass[1][1][9] = 0
5170 09:29:04.817527 rx_lastpass[1][1][9] = 0
5171 09:29:04.820770 rx_firspass[1][1][10] = 0
5172 09:29:04.824051 rx_lastpass[1][1][10] = 0
5173 09:29:04.824145 rx_firspass[1][1][11] = 0
5174 09:29:04.827288 rx_lastpass[1][1][11] = 0
5175 09:29:04.830553 rx_firspass[1][1][12] = 0
5176 09:29:04.833795 rx_lastpass[1][1][12] = 0
5177 09:29:04.833888 rx_firspass[1][1][13] = 0
5178 09:29:04.837093 rx_lastpass[1][1][13] = 0
5179 09:29:04.840324 rx_firspass[1][1][14] = 0
5180 09:29:04.840418 rx_lastpass[1][1][14] = 0
5181 09:29:04.843476 rx_firspass[1][1][15] = 0
5182 09:29:04.846840 rx_lastpass[1][1][15] = 0
5183 09:29:04.850200 dump params clk_delay
5184 09:29:04.850294 clk_delay[0] = 0
5185 09:29:04.850370 clk_delay[1] = 0
5186 09:29:04.853631 dump params dqs_delay
5187 09:29:04.856514 dqs_delay[0][0] = 0
5188 09:29:04.856609 dqs_delay[0][1] = 0
5189 09:29:04.859864 dqs_delay[1][0] = 0
5190 09:29:04.859958 dqs_delay[1][1] = 0
5191 09:29:04.863292 dump params delay_cell_unit = 744
5192 09:29:04.866641 mt_set_emi_preloader end
5193 09:29:04.869703 [mt_mem_init] dram size: 0x100000000, rank number: 2
5194 09:29:04.876196 [complex_mem_test] start addr:0x40000000, len:20480
5195 09:29:04.911856 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5196 09:29:04.918468 [complex_mem_test] start addr:0x80000000, len:20480
5197 09:29:04.954375 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5198 09:29:04.960651 [complex_mem_test] start addr:0xc0000000, len:20480
5199 09:29:04.996905 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5200 09:29:05.003441 [complex_mem_test] start addr:0x56000000, len:8192
5201 09:29:05.020197 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5202 09:29:05.023586 ddr_geometry:1
5203 09:29:05.026630 [complex_mem_test] start addr:0x80000000, len:8192
5204 09:29:05.043836 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5205 09:29:05.047367 dram_init: dram init end (result: 0)
5206 09:29:05.053917 Successfully loaded DRAM blobs and ran DRAM calibration
5207 09:29:05.063683 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5208 09:29:05.064118 CBMEM:
5209 09:29:05.067077 IMD: root @ 00000000fffff000 254 entries.
5210 09:29:05.070015 IMD: root @ 00000000ffffec00 62 entries.
5211 09:29:05.076827 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5212 09:29:05.083506 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5213 09:29:05.086699 in-header: 03 a1 00 00 08 00 00 00
5214 09:29:05.089982 in-data: 84 60 60 10 00 00 00 00
5215 09:29:05.092955 Chrome EC: clear events_b mask to 0x0000000020004000
5216 09:29:05.099452 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5217 09:29:05.103522 in-header: 03 fd 00 00 00 00 00 00
5218 09:29:05.106836 in-data:
5219 09:29:05.109700 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5220 09:29:05.113317 CBFS @ 21000 size 3d4000
5221 09:29:05.116282 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5222 09:29:05.119820 CBFS: Locating 'fallback/ramstage'
5223 09:29:05.122859 CBFS: Found @ offset 10d40 size d563
5224 09:29:05.145736 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5225 09:29:05.157927 Accumulated console time in romstage 13660 ms
5226 09:29:05.158360
5227 09:29:05.158699
5228 09:29:05.168169 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5229 09:29:05.171261 ARM64: Exception handlers installed.
5230 09:29:05.171686 ARM64: Testing exception
5231 09:29:05.174616 ARM64: Done test exception
5232 09:29:05.177635 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5233 09:29:05.181021 Manufacturer: ef
5234 09:29:05.187313 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5235 09:29:05.190735 WARNING: RO_VPD is uninitialized or empty.
5236 09:29:05.194056 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5237 09:29:05.196950 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5238 09:29:05.207542 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5239 09:29:05.210964 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5240 09:29:05.217248 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5241 09:29:05.217698 Enumerating buses...
5242 09:29:05.223822 Show all devs... Before device enumeration.
5243 09:29:05.224459 Root Device: enabled 1
5244 09:29:05.227209 CPU_CLUSTER: 0: enabled 1
5245 09:29:05.230605 CPU: 00: enabled 1
5246 09:29:05.231236 Compare with tree...
5247 09:29:05.233662 Root Device: enabled 1
5248 09:29:05.234091 CPU_CLUSTER: 0: enabled 1
5249 09:29:05.237045 CPU: 00: enabled 1
5250 09:29:05.240371 Root Device scanning...
5251 09:29:05.243391 root_dev_scan_bus for Root Device
5252 09:29:05.243795 CPU_CLUSTER: 0 enabled
5253 09:29:05.246749 root_dev_scan_bus for Root Device done
5254 09:29:05.253393 scan_bus: scanning of bus Root Device took 10689 usecs
5255 09:29:05.253813 done
5256 09:29:05.256708 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5257 09:29:05.259855 Allocating resources...
5258 09:29:05.263032 Reading resources...
5259 09:29:05.266229 Root Device read_resources bus 0 link: 0
5260 09:29:05.269489 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5261 09:29:05.273101 CPU: 00 missing read_resources
5262 09:29:05.276265 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5263 09:29:05.279679 Root Device read_resources bus 0 link: 0 done
5264 09:29:05.282890 Done reading resources.
5265 09:29:05.289281 Show resources in subtree (Root Device)...After reading.
5266 09:29:05.292302 Root Device child on link 0 CPU_CLUSTER: 0
5267 09:29:05.295746 CPU_CLUSTER: 0 child on link 0 CPU: 00
5268 09:29:05.302175 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5269 09:29:05.305522 CPU: 00
5270 09:29:05.305650 Setting resources...
5271 09:29:05.312274 Root Device assign_resources, bus 0 link: 0
5272 09:29:05.315373 CPU_CLUSTER: 0 missing set_resources
5273 09:29:05.318493 Root Device assign_resources, bus 0 link: 0
5274 09:29:05.318618 Done setting resources.
5275 09:29:05.325211 Show resources in subtree (Root Device)...After assigning values.
5276 09:29:05.328695 Root Device child on link 0 CPU_CLUSTER: 0
5277 09:29:05.331913 CPU_CLUSTER: 0 child on link 0 CPU: 00
5278 09:29:05.341756 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5279 09:29:05.341986 CPU: 00
5280 09:29:05.345080 Done allocating resources.
5281 09:29:05.351721 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5282 09:29:05.352134 Enabling resources...
5283 09:29:05.352483 done.
5284 09:29:05.358390 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5285 09:29:05.358939 Initializing devices...
5286 09:29:05.361728 Root Device init ...
5287 09:29:05.364650 mainboard_init: Starting display init.
5288 09:29:05.367927 ADC[4]: Raw value=76192 ID=0
5289 09:29:05.390373 anx7625_power_on_init: Init interface.
5290 09:29:05.393484 anx7625_disable_pd_protocol: Disabled PD feature.
5291 09:29:05.400188 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5292 09:29:05.446926 anx7625_start_dp_work: Secure OCM version=00
5293 09:29:05.450217 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5294 09:29:05.467322 sp_tx_get_edid_block: EDID Block = 1
5295 09:29:05.584324 Extracted contents:
5296 09:29:05.587676 header: 00 ff ff ff ff ff ff 00
5297 09:29:05.591056 serial number: 06 af 5c 14 00 00 00 00 00 1a
5298 09:29:05.594073 version: 01 04
5299 09:29:05.597350 basic params: 95 1a 0e 78 02
5300 09:29:05.600689 chroma info: 99 85 95 55 56 92 28 22 50 54
5301 09:29:05.603929 established: 00 00 00
5302 09:29:05.610620 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5303 09:29:05.617078 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5304 09:29:05.620461 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5305 09:29:05.626821 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5306 09:29:05.633256 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5307 09:29:05.636538 extensions: 00
5308 09:29:05.636631 checksum: ae
5309 09:29:05.636706
5310 09:29:05.643002 Manufacturer: AUO Model 145c Serial Number 0
5311 09:29:05.643096 Made week 0 of 2016
5312 09:29:05.646444 EDID version: 1.4
5313 09:29:05.646538 Digital display
5314 09:29:05.649685 6 bits per primary color channel
5315 09:29:05.652910 DisplayPort interface
5316 09:29:05.656377 Maximum image size: 26 cm x 14 cm
5317 09:29:05.656470 Gamma: 220%
5318 09:29:05.656546 Check DPMS levels
5319 09:29:05.659462 Supported color formats: RGB 4:4:4
5320 09:29:05.666101 First detailed timing is preferred timing
5321 09:29:05.666195 Established timings supported:
5322 09:29:05.669424 Standard timings supported:
5323 09:29:05.672576 Detailed timings
5324 09:29:05.675889 Hex of detail: ce1d56ea50001a3030204600009010000018
5325 09:29:05.682250 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5326 09:29:05.685747 0556 0586 05a6 0640 hborder 0
5327 09:29:05.688959 0300 0304 030a 031a vborder 0
5328 09:29:05.692199 -hsync -vsync
5329 09:29:05.692296 Did detailed timing
5330 09:29:05.698990 Hex of detail: 0000000f0000000000000000000000000020
5331 09:29:05.702256 Manufacturer-specified data, tag 15
5332 09:29:05.705389 Hex of detail: 000000fe0041554f0a202020202020202020
5333 09:29:05.708756 ASCII string: AUO
5334 09:29:05.712226 Hex of detail: 000000fe004231313658414230312e34200a
5335 09:29:05.715217 ASCII string: B116XAB01.4
5336 09:29:05.715417 Checksum
5337 09:29:05.718611 Checksum: 0xae (valid)
5338 09:29:05.722091 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5339 09:29:05.725035 DSI data_rate: 457800000 bps
5340 09:29:05.731698 anx7625_parse_edid: set default k value to 0x3d for panel
5341 09:29:05.734987 anx7625_parse_edid: pixelclock(76300).
5342 09:29:05.738107 hactive(1366), hsync(32), hfp(48), hbp(154)
5343 09:29:05.741329 vactive(768), vsync(6), vfp(4), vbp(16)
5344 09:29:05.744814 anx7625_dsi_config: config dsi.
5345 09:29:05.753148 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5346 09:29:05.773795 anx7625_dsi_config: success to config DSI
5347 09:29:05.777131 anx7625_dp_start: MIPI phy setup OK.
5348 09:29:05.780537 [SSUSB] Setting up USB HOST controller...
5349 09:29:05.783769 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5350 09:29:05.787006 [SSUSB] phy power-on done.
5351 09:29:05.790732 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5352 09:29:05.793950 in-header: 03 fc 01 00 00 00 00 00
5353 09:29:05.794377 in-data:
5354 09:29:05.800641 handle_proto3_response: EC response with error code: 1
5355 09:29:05.801169 SPM: pcm index = 1
5356 09:29:05.806927 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5357 09:29:05.807410 CBFS @ 21000 size 3d4000
5358 09:29:05.813805 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5359 09:29:05.816694 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5360 09:29:05.820227 CBFS: Found @ offset 1e7c0 size 1026
5361 09:29:05.826670 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5362 09:29:05.829976 SPM: binary array size = 2988
5363 09:29:05.833383 SPM: version = pcm_allinone_v1.17.2_20180829
5364 09:29:05.836318 SPM binary loaded in 32 msecs
5365 09:29:05.845058 spm_kick_im_to_fetch: ptr = 000000004021eec2
5366 09:29:05.848278 spm_kick_im_to_fetch: len = 2988
5367 09:29:05.848970 SPM: spm_kick_pcm_to_run
5368 09:29:05.851825 SPM: spm_kick_pcm_to_run done
5369 09:29:05.855058 SPM: spm_init done in 52 msecs
5370 09:29:05.858050 Root Device init finished in 494995 usecs
5371 09:29:05.861468 CPU_CLUSTER: 0 init ...
5372 09:29:05.871142 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5373 09:29:05.874731 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5374 09:29:05.877740 CBFS @ 21000 size 3d4000
5375 09:29:05.881372 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5376 09:29:05.884690 CBFS: Locating 'sspm.bin'
5377 09:29:05.887553 CBFS: Found @ offset 208c0 size 41cb
5378 09:29:05.898332 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5379 09:29:05.906093 CPU_CLUSTER: 0 init finished in 42802 usecs
5380 09:29:05.906539 Devices initialized
5381 09:29:05.909419 Show all devs... After init.
5382 09:29:05.912781 Root Device: enabled 1
5383 09:29:05.913308 CPU_CLUSTER: 0: enabled 1
5384 09:29:05.915973 CPU: 00: enabled 1
5385 09:29:05.919141 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5386 09:29:05.925981 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5387 09:29:05.929021 ELOG: NV offset 0x558000 size 0x1000
5388 09:29:05.932411 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5389 09:29:05.938811 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5390 09:29:05.945500 ELOG: Event(17) added with size 13 at 2024-06-18 09:29:05 UTC
5391 09:29:05.948654 out: cmd=0x121: 03 db 21 01 00 00 00 00
5392 09:29:05.952199 in-header: 03 e7 00 00 2c 00 00 00
5393 09:29:05.964980 in-data: 44 4c 00 00 00 00 00 00 02 10 00 00 06 80 00 00 3e 93 01 00 06 80 00 00 95 21 01 00 06 80 00 00 16 5e 03 00 06 80 00 00 f4 38 04 00
5394 09:29:05.968372 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5395 09:29:05.971582 in-header: 03 19 00 00 08 00 00 00
5396 09:29:05.975051 in-data: a2 e0 47 00 13 00 00 00
5397 09:29:05.978265 Chrome EC: UHEPI supported
5398 09:29:05.984497 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5399 09:29:05.987984 in-header: 03 e1 00 00 08 00 00 00
5400 09:29:05.991284 in-data: 84 20 60 10 00 00 00 00
5401 09:29:05.994242 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5402 09:29:06.000942 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5403 09:29:06.004289 in-header: 03 e1 00 00 08 00 00 00
5404 09:29:06.007362 in-data: 84 20 60 10 00 00 00 00
5405 09:29:06.014140 ELOG: Event(A1) added with size 10 at 2024-06-18 09:29:05 UTC
5406 09:29:06.020589 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5407 09:29:06.023940 ELOG: Event(A0) added with size 9 at 2024-06-18 09:29:05 UTC
5408 09:29:06.027290 elog_add_boot_reason: Logged dev mode boot
5409 09:29:06.030176 Finalize devices...
5410 09:29:06.033495 Devices finalized
5411 09:29:06.037168 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5412 09:29:06.040358 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5413 09:29:06.046811 ELOG: Event(91) added with size 10 at 2024-06-18 09:29:05 UTC
5414 09:29:06.050156 Writing coreboot table at 0xffeda000
5415 09:29:06.053381 0. 0000000000114000-000000000011efff: RAMSTAGE
5416 09:29:06.059879 1. 0000000040000000-000000004023cfff: RAMSTAGE
5417 09:29:06.062970 2. 000000004023d000-00000000545fffff: RAM
5418 09:29:06.066216 3. 0000000054600000-000000005465ffff: BL31
5419 09:29:06.069510 4. 0000000054660000-00000000ffed9fff: RAM
5420 09:29:06.076138 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5421 09:29:06.079504 6. 0000000100000000-000000013fffffff: RAM
5422 09:29:06.082804 Passing 5 GPIOs to payload:
5423 09:29:06.085946 NAME | PORT | POLARITY | VALUE
5424 09:29:06.092469 write protect | 0x00000096 | low | high
5425 09:29:06.095842 EC in RW | 0x000000b1 | high | undefined
5426 09:29:06.099073 EC interrupt | 0x00000097 | low | undefined
5427 09:29:06.105743 TPM interrupt | 0x00000099 | high | undefined
5428 09:29:06.109019 speaker enable | 0x000000af | high | undefined
5429 09:29:06.112207 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5430 09:29:06.115588 in-header: 03 f7 00 00 02 00 00 00
5431 09:29:06.118866 in-data: 04 00
5432 09:29:06.119336 Board ID: 4
5433 09:29:06.122225 ADC[3]: Raw value=215048 ID=1
5434 09:29:06.122614 RAM code: 1
5435 09:29:06.125537 SKU ID: 16
5436 09:29:06.128543 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5437 09:29:06.131891 CBFS @ 21000 size 3d4000
5438 09:29:06.135153 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5439 09:29:06.141580 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 3830
5440 09:29:06.144882 coreboot table: 940 bytes.
5441 09:29:06.148252 IMD ROOT 0. 00000000fffff000 00001000
5442 09:29:06.151497 IMD SMALL 1. 00000000ffffe000 00001000
5443 09:29:06.154810 CONSOLE 2. 00000000fffde000 00020000
5444 09:29:06.158046 FMAP 3. 00000000fffdd000 0000047c
5445 09:29:06.161367 TIME STAMP 4. 00000000fffdc000 00000910
5446 09:29:06.167928 RAMOOPS 5. 00000000ffedc000 00100000
5447 09:29:06.171215 COREBOOT 6. 00000000ffeda000 00002000
5448 09:29:06.171609 IMD small region:
5449 09:29:06.174530 IMD ROOT 0. 00000000ffffec00 00000400
5450 09:29:06.177425 VBOOT WORK 1. 00000000ffffeb00 00000100
5451 09:29:06.184027 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5452 09:29:06.187275 VPD 3. 00000000ffffea60 0000006c
5453 09:29:06.190932 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5454 09:29:06.197298 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5455 09:29:06.200607 in-header: 03 e1 00 00 08 00 00 00
5456 09:29:06.203619 in-data: 84 20 60 10 00 00 00 00
5457 09:29:06.210083 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5458 09:29:06.210490 CBFS @ 21000 size 3d4000
5459 09:29:06.217006 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5460 09:29:06.219958 CBFS: Locating 'fallback/payload'
5461 09:29:06.227883 CBFS: Found @ offset dc040 size 439a0
5462 09:29:06.315674 read SPI 0xfd078 0x439a0: 84378 us, 3281 KB/s, 26.248 Mbps
5463 09:29:06.318952 Checking segment from ROM address 0x0000000040003a00
5464 09:29:06.325560 Checking segment from ROM address 0x0000000040003a1c
5465 09:29:06.328784 Loading segment from ROM address 0x0000000040003a00
5466 09:29:06.332196 code (compression=0)
5467 09:29:06.341693 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5468 09:29:06.348532 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5469 09:29:06.351946 it's not compressed!
5470 09:29:06.355044 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5471 09:29:06.361474 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5472 09:29:06.369889 Loading segment from ROM address 0x0000000040003a1c
5473 09:29:06.373298 Entry Point 0x0000000080000000
5474 09:29:06.373729 Loaded segments
5475 09:29:06.379948 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5476 09:29:06.383208 Jumping to boot code at 0000000080000000(00000000ffeda000)
5477 09:29:06.393120 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5478 09:29:06.399581 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5479 09:29:06.399980 CBFS @ 21000 size 3d4000
5480 09:29:06.406087 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5481 09:29:06.409086 CBFS: Locating 'fallback/bl31'
5482 09:29:06.412339 CBFS: Found @ offset 36dc0 size 5820
5483 09:29:06.423857 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5484 09:29:06.427156 Checking segment from ROM address 0x0000000040003a00
5485 09:29:06.433350 Checking segment from ROM address 0x0000000040003a1c
5486 09:29:06.436645 Loading segment from ROM address 0x0000000040003a00
5487 09:29:06.439984 code (compression=1)
5488 09:29:06.449772 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5489 09:29:06.456178 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5490 09:29:06.456273 using LZMA
5491 09:29:06.465530 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5492 09:29:06.471844 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5493 09:29:06.475119 Loading segment from ROM address 0x0000000040003a1c
5494 09:29:06.478219 Entry Point 0x0000000054601000
5495 09:29:06.478312 Loaded segments
5496 09:29:06.481591 NOTICE: MT8183 bl31_setup
5497 09:29:06.489134 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5498 09:29:06.492339 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5499 09:29:06.495899 INFO: [DEVAPC] dump DEVAPC registers:
5500 09:29:06.505446 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5501 09:29:06.511782 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5502 09:29:06.521699 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5503 09:29:06.528214 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5504 09:29:06.538348 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5505 09:29:06.544786 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5506 09:29:06.554432 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5507 09:29:06.561255 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5508 09:29:06.571042 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5509 09:29:06.577778 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5510 09:29:06.587488 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5511 09:29:06.593947 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5512 09:29:06.603940 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5513 09:29:06.610422 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5514 09:29:06.616593 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5515 09:29:06.626724 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5516 09:29:06.633025 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5517 09:29:06.639830 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5518 09:29:06.646198 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5519 09:29:06.652877 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5520 09:29:06.662644 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5521 09:29:06.669360 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5522 09:29:06.672385 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5523 09:29:06.675819 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5524 09:29:06.679214 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5525 09:29:06.682576 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5526 09:29:06.685398 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5527 09:29:06.692333 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5528 09:29:06.695372 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5529 09:29:06.698857 WARNING: region 0:
5530 09:29:06.702185 WARNING: apc:0x168, sa:0x0, ea:0xfff
5531 09:29:06.705199 WARNING: region 1:
5532 09:29:06.708566 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5533 09:29:06.708828 WARNING: region 2:
5534 09:29:06.711877 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5535 09:29:06.715281 WARNING: region 3:
5536 09:29:06.718562 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5537 09:29:06.721851 WARNING: region 4:
5538 09:29:06.725035 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5539 09:29:06.725402 WARNING: region 5:
5540 09:29:06.728305 WARNING: apc:0x0, sa:0x0, ea:0x0
5541 09:29:06.732008 WARNING: region 6:
5542 09:29:06.734948 WARNING: apc:0x0, sa:0x0, ea:0x0
5543 09:29:06.735385 WARNING: region 7:
5544 09:29:06.738485 WARNING: apc:0x0, sa:0x0, ea:0x0
5545 09:29:06.744784 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5546 09:29:06.748215 INFO: SPM: enable SPMC mode
5547 09:29:06.751521 NOTICE: spm_boot_init() start
5548 09:29:06.754484 NOTICE: spm_boot_init() end
5549 09:29:06.757858 INFO: BL31: Initializing runtime services
5550 09:29:06.764643 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5551 09:29:06.767799 INFO: BL31: Preparing for EL3 exit to normal world
5552 09:29:06.771182 INFO: Entry point address = 0x80000000
5553 09:29:06.774240 INFO: SPSR = 0x8
5554 09:29:06.795944
5555 09:29:06.796533
5556 09:29:06.796984
5557 09:29:06.799211 Starting depthcharge on Juniper...
5558 09:29:06.799721
5559 09:29:06.801800 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5560 09:29:06.802422 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5561 09:29:06.803060 Setting prompt string to ['jacuzzi:']
5562 09:29:06.803676 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5563 09:29:06.804587 vboot_handoff: creating legacy vboot_handoff structure
5564 09:29:06.805068
5565 09:29:06.805688 ec_init(0): CrosEC protocol v3 supported (544, 544)
5566 09:29:06.808982
5567 09:29:06.809717 Wipe memory regions:
5568 09:29:06.810243
5569 09:29:06.812220 [0x00000040000000, 0x00000054600000)
5570 09:29:06.855313
5571 09:29:06.855777 [0x00000054660000, 0x00000080000000)
5572 09:29:06.946703
5573 09:29:06.946862 [0x000000811994a0, 0x000000ffeda000)
5574 09:29:07.206673
5575 09:29:07.206835 [0x00000100000000, 0x00000140000000)
5576 09:29:07.339493
5577 09:29:07.342434 Initializing XHCI USB controller at 0x11200000.
5578 09:29:07.365592
5579 09:29:07.368732 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5580 09:29:07.368820
5581 09:29:07.368894
5582 09:29:07.369190 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5584 09:29:07.469527 jacuzzi: tftpboot 192.168.201.1 14407646/tftp-deploy-20cyu2ei/kernel/image.itb 14407646/tftp-deploy-20cyu2ei/kernel/cmdline
5585 09:29:07.469708 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5586 09:29:07.469801 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
5587 09:29:07.474054 tftpboot 192.168.201.1 14407646/tftp-deploy-20cyu2ei/kernel/image.itp-deploy-20cyu2ei/kernel/cmdline
5588 09:29:07.474149
5589 09:29:07.474234 Waiting for link
5590 09:29:07.879647
5591 09:29:07.879826 R8152: Initializing
5592 09:29:07.879917
5593 09:29:07.882695 Version 9 (ocp_data = 6010)
5594 09:29:07.882812
5595 09:29:07.886062 R8152: Done initializing
5596 09:29:07.886150
5597 09:29:07.886231 Adding net device
5598 09:29:08.271942
5599 09:29:08.272106 done.
5600 09:29:08.272186
5601 09:29:08.272257 MAC: 00:e0:4c:78:85:cb
5602 09:29:08.272326
5603 09:29:08.274951 Sending DHCP discover... done.
5604 09:29:08.275042
5605 09:29:08.278555 Waiting for reply... done.
5606 09:29:08.278648
5607 09:29:08.281850 Sending DHCP request... done.
5608 09:29:08.281944
5609 09:29:08.282020 Waiting for reply... done.
5610 09:29:08.282091
5611 09:29:08.284764 My ip is 192.168.201.22
5612 09:29:08.284858
5613 09:29:08.288435 The DHCP server ip is 192.168.201.1
5614 09:29:08.288547
5615 09:29:08.291525 TFTP server IP predefined by user: 192.168.201.1
5616 09:29:08.291619
5617 09:29:08.297832 Bootfile predefined by user: 14407646/tftp-deploy-20cyu2ei/kernel/image.itb
5618 09:29:08.297944
5619 09:29:08.301220 Sending tftp read request... done.
5620 09:29:08.301349
5621 09:29:08.304571 Waiting for the transfer...
5622 09:29:08.304704
5623 09:29:08.563544 00000000 ################################################################
5624 09:29:08.563736
5625 09:29:08.812271 00080000 ################################################################
5626 09:29:08.812432
5627 09:29:09.059979 00100000 ################################################################
5628 09:29:09.060174
5629 09:29:09.306279 00180000 ################################################################
5630 09:29:09.306468
5631 09:29:09.562307 00200000 ################################################################
5632 09:29:09.562506
5633 09:29:09.812920 00280000 ################################################################
5634 09:29:09.813107
5635 09:29:10.057223 00300000 ################################################################
5636 09:29:10.057423
5637 09:29:10.305336 00380000 ################################################################
5638 09:29:10.305536
5639 09:29:10.554683 00400000 ################################################################
5640 09:29:10.554849
5641 09:29:10.801519 00480000 ################################################################
5642 09:29:10.801690
5643 09:29:11.048929 00500000 ################################################################
5644 09:29:11.049133
5645 09:29:11.298493 00580000 ################################################################
5646 09:29:11.298698
5647 09:29:11.545160 00600000 ################################################################
5648 09:29:11.545342
5649 09:29:11.794609 00680000 ################################################################
5650 09:29:11.794817
5651 09:29:12.040949 00700000 ################################################################
5652 09:29:12.041123
5653 09:29:12.300897 00780000 ################################################################
5654 09:29:12.301061
5655 09:29:12.559015 00800000 ################################################################
5656 09:29:12.559234
5657 09:29:12.817283 00880000 ################################################################
5658 09:29:12.817483
5659 09:29:13.078153 00900000 ################################################################
5660 09:29:13.078364
5661 09:29:13.335742 00980000 ################################################################
5662 09:29:13.335907
5663 09:29:13.592517 00a00000 ################################################################
5664 09:29:13.592690
5665 09:29:13.855015 00a80000 ################################################################
5666 09:29:13.855186
5667 09:29:14.118048 00b00000 ################################################################
5668 09:29:14.118201
5669 09:29:14.370121 00b80000 ################################################################
5670 09:29:14.370295
5671 09:29:14.616603 00c00000 ################################################################
5672 09:29:14.616771
5673 09:29:14.862422 00c80000 ################################################################
5674 09:29:14.862581
5675 09:29:15.107014 00d00000 ################################################################
5676 09:29:15.107237
5677 09:29:15.359861 00d80000 ################################################################
5678 09:29:15.360020
5679 09:29:15.604040 00e00000 ################################################################
5680 09:29:15.604243
5681 09:29:15.849080 00e80000 ################################################################
5682 09:29:15.849282
5683 09:29:16.091641 00f00000 ################################################################
5684 09:29:16.091836
5685 09:29:16.336224 00f80000 ################################################################
5686 09:29:16.336429
5687 09:29:16.582226 01000000 ################################################################
5688 09:29:16.582391
5689 09:29:16.825464 01080000 ################################################################
5690 09:29:16.825627
5691 09:29:17.073789 01100000 ################################################################
5692 09:29:17.073968
5693 09:29:17.318626 01180000 ################################################################
5694 09:29:17.318809
5695 09:29:17.562285 01200000 ################################################################
5696 09:29:17.562478
5697 09:29:17.811944 01280000 ################################################################
5698 09:29:17.812133
5699 09:29:18.066605 01300000 ################################################################
5700 09:29:18.066775
5701 09:29:18.332511 01380000 ################################################################
5702 09:29:18.332715
5703 09:29:18.580925 01400000 ################################################################
5704 09:29:18.581090
5705 09:29:18.827606 01480000 ################################################################
5706 09:29:18.827769
5707 09:29:19.072473 01500000 ################################################################
5708 09:29:19.072662
5709 09:29:19.326870 01580000 ################################################################
5710 09:29:19.327035
5711 09:29:19.572529 01600000 ################################################################
5712 09:29:19.572738
5713 09:29:19.821954 01680000 ################################################################
5714 09:29:19.822149
5715 09:29:20.067470 01700000 ################################################################
5716 09:29:20.067636
5717 09:29:20.325669 01780000 ################################################################
5718 09:29:20.325831
5719 09:29:20.578090 01800000 ################################################################
5720 09:29:20.578293
5721 09:29:20.825538 01880000 ################################################################
5722 09:29:20.825691
5723 09:29:21.071952 01900000 ################################################################
5724 09:29:21.072110
5725 09:29:21.332553 01980000 ################################################################
5726 09:29:21.332722
5727 09:29:21.588773 01a00000 ################################################################
5728 09:29:21.588940
5729 09:29:21.845295 01a80000 ################################################################
5730 09:29:21.845491
5731 09:29:22.097578 01b00000 ################################################################
5732 09:29:22.097739
5733 09:29:22.357839 01b80000 ################################################################
5734 09:29:22.358006
5735 09:29:22.614005 01c00000 ################################################################
5736 09:29:22.614169
5737 09:29:22.865273 01c80000 ################################################################
5738 09:29:22.865488
5739 09:29:23.113866 01d00000 ################################################################
5740 09:29:23.114024
5741 09:29:23.368285 01d80000 ################################################################
5742 09:29:23.368460
5743 09:29:23.595644 01e00000 ########################################################### done.
5744 09:29:23.595806
5745 09:29:23.598606 The bootfile was 31935418 bytes long.
5746 09:29:23.598717
5747 09:29:23.602057 Sending tftp read request... done.
5748 09:29:23.602154
5749 09:29:23.605450 Waiting for the transfer...
5750 09:29:23.605547
5751 09:29:23.605623 00000000 # done.
5752 09:29:23.605697
5753 09:29:23.615322 Command line loaded dynamically from TFTP file: 14407646/tftp-deploy-20cyu2ei/kernel/cmdline
5754 09:29:23.615419
5755 09:29:23.641213 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5756 09:29:23.641352
5757 09:29:23.641468 Loading FIT.
5758 09:29:23.641574
5759 09:29:23.644797 Image ramdisk-1 has 18748945 bytes.
5760 09:29:23.644892
5761 09:29:23.647713 Image fdt-1 has 57695 bytes.
5762 09:29:23.647841
5763 09:29:23.651153 Image kernel-1 has 13126726 bytes.
5764 09:29:23.651249
5765 09:29:23.657604 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5766 09:29:23.657702
5767 09:29:23.670700 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5768 09:29:23.670805
5769 09:29:23.677196 Choosing best match conf-1 for compat google,juniper-sku16.
5770 09:29:23.677298
5771 09:29:23.684473 Connected to device vid:did:rid of 1ae0:0028:00
5772 09:29:23.691597
5773 09:29:23.694988 tpm_get_response: command 0x17b, return code 0x0
5774 09:29:23.695084
5775 09:29:23.698305 tpm_cleanup: add release locality here.
5776 09:29:23.698401
5777 09:29:23.701780 Shutting down all USB controllers.
5778 09:29:23.701874
5779 09:29:23.704793 Removing current net device
5780 09:29:23.704887
5781 09:29:23.708147 Exiting depthcharge with code 4 at timestamp: 34198038
5782 09:29:23.708243
5783 09:29:23.714601 LZMA decompressing kernel-1 to 0x80193568
5784 09:29:23.714702
5785 09:29:23.717980 LZMA decompressing kernel-1 to 0x40000000
5786 09:29:25.583319
5787 09:29:25.583478 jumping to kernel
5788 09:29:25.584004 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5789 09:29:25.584134 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
5790 09:29:25.584232 Setting prompt string to ['Linux version [0-9]']
5791 09:29:25.584357 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5792 09:29:25.584482 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5793 09:29:25.658735
5794 09:29:25.661957 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5795 09:29:25.665566 start: 2.2.5.1 login-action (timeout 00:04:19) [common]
5796 09:29:25.665677 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5797 09:29:25.665762 Setting prompt string to []
5798 09:29:25.665849 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5799 09:29:25.665933 Using line separator: #'\n'#
5800 09:29:25.666002 No login prompt set.
5801 09:29:25.666074 Parsing kernel messages
5802 09:29:25.666139 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5803 09:29:25.666257 [login-action] Waiting for messages, (timeout 00:04:19)
5804 09:29:25.666331 Waiting using forced prompt support (timeout 00:02:10)
5805 09:29:25.685100 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024
5806 09:29:25.688094 [ 0.000000] random: crng init done
5807 09:29:25.694577 [ 0.000000] Machine model: Google juniper sku16 board
5808 09:29:25.698093 [ 0.000000] efi: UEFI not found.
5809 09:29:25.704344 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5810 09:29:25.714236 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5811 09:29:25.721006 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5812 09:29:25.724021 [ 0.000000] printk: bootconsole [mtk8250] enabled
5813 09:29:25.733451 [ 0.000000] NUMA: No NUMA configuration found
5814 09:29:25.740125 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5815 09:29:25.746581 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5816 09:29:25.746676 [ 0.000000] Zone ranges:
5817 09:29:25.753296 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5818 09:29:25.756603 [ 0.000000] DMA32 empty
5819 09:29:25.762887 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5820 09:29:25.766318 [ 0.000000] Movable zone start for each node
5821 09:29:25.769560 [ 0.000000] Early memory node ranges
5822 09:29:25.776078 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5823 09:29:25.782603 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5824 09:29:25.789259 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5825 09:29:25.795994 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5826 09:29:25.802493 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5827 09:29:25.808859 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5828 09:29:25.825862 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5829 09:29:25.832494 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5830 09:29:25.838947 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5831 09:29:25.842391 [ 0.000000] psci: probing for conduit method from DT.
5832 09:29:25.848989 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5833 09:29:25.852309 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5834 09:29:25.858641 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5835 09:29:25.861909 [ 0.000000] psci: SMC Calling Convention v1.1
5836 09:29:25.868625 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5837 09:29:25.871731 [ 0.000000] Detected VIPT I-cache on CPU0
5838 09:29:25.878458 [ 0.000000] CPU features: detected: GIC system register CPU interface
5839 09:29:25.884942 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5840 09:29:25.891402 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5841 09:29:25.897875 [ 0.000000] CPU features: detected: ARM erratum 845719
5842 09:29:25.901263 [ 0.000000] alternatives: applying boot alternatives
5843 09:29:25.907607 [ 0.000000] Fallback order for Node 0: 0
5844 09:29:25.914416 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5845 09:29:25.917592 [ 0.000000] Policy zone: Normal
5846 09:29:25.943958 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5847 09:29:25.956826 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5848 09:29:25.963144 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5849 09:29:25.973285 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5850 09:29:25.980088 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5851 09:29:25.983094 <6>[ 0.000000] software IO TLB: area num 8.
5852 09:29:26.008981 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5853 09:29:26.067113 <6>[ 0.000000] Memory: 3896764K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261700K reserved, 32768K cma-reserved)
5854 09:29:26.073770 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5855 09:29:26.080425 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5856 09:29:26.083436 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5857 09:29:26.090342 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5858 09:29:26.096597 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5859 09:29:26.103420 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5860 09:29:26.109818 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5861 09:29:26.116452 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5862 09:29:26.122743 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5863 09:29:26.132730 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5864 09:29:26.139294 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5865 09:29:26.142316 <6>[ 0.000000] GICv3: 640 SPIs implemented
5866 09:29:26.145791 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5867 09:29:26.152221 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5868 09:29:26.155596 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5869 09:29:26.162126 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5870 09:29:26.174963 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5871 09:29:26.188108 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5872 09:29:26.194531 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5873 09:29:26.204192 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5874 09:29:26.217299 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5875 09:29:26.223973 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5876 09:29:26.230971 <6>[ 0.009472] Console: colour dummy device 80x25
5877 09:29:26.234404 <6>[ 0.014516] printk: console [tty1] enabled
5878 09:29:26.247633 <6>[ 0.018905] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5879 09:29:26.250806 <6>[ 0.029370] pid_max: default: 32768 minimum: 301
5880 09:29:26.257002 <6>[ 0.034251] LSM: Security Framework initializing
5881 09:29:26.263887 <6>[ 0.039168] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5882 09:29:26.270105 <6>[ 0.046792] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5883 09:29:26.277175 <4>[ 0.055661] cacheinfo: Unable to detect cache hierarchy for CPU 0
5884 09:29:26.287089 <6>[ 0.062288] cblist_init_generic: Setting adjustable number of callback queues.
5885 09:29:26.293836 <6>[ 0.069733] cblist_init_generic: Setting shift to 3 and lim to 1.
5886 09:29:26.300195 <6>[ 0.076086] cblist_init_generic: Setting adjustable number of callback queues.
5887 09:29:26.306960 <6>[ 0.083531] cblist_init_generic: Setting shift to 3 and lim to 1.
5888 09:29:26.309908 <6>[ 0.089930] rcu: Hierarchical SRCU implementation.
5889 09:29:26.316525 <6>[ 0.094956] rcu: Max phase no-delay instances is 1000.
5890 09:29:26.324218 <6>[ 0.102884] EFI services will not be available.
5891 09:29:26.327692 <6>[ 0.107832] smp: Bringing up secondary CPUs ...
5892 09:29:26.337979 <6>[ 0.113125] Detected VIPT I-cache on CPU1
5893 09:29:26.344692 <4>[ 0.113172] cacheinfo: Unable to detect cache hierarchy for CPU 1
5894 09:29:26.351284 <6>[ 0.113181] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5895 09:29:26.357685 <6>[ 0.113213] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5896 09:29:26.361157 <6>[ 0.113693] Detected VIPT I-cache on CPU2
5897 09:29:26.367588 <4>[ 0.113726] cacheinfo: Unable to detect cache hierarchy for CPU 2
5898 09:29:26.374304 <6>[ 0.113731] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5899 09:29:26.380624 <6>[ 0.113743] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5900 09:29:26.387116 <6>[ 0.114190] Detected VIPT I-cache on CPU3
5901 09:29:26.393631 <4>[ 0.114221] cacheinfo: Unable to detect cache hierarchy for CPU 3
5902 09:29:26.400421 <6>[ 0.114226] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5903 09:29:26.406670 <6>[ 0.114237] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5904 09:29:26.410035 <6>[ 0.114810] CPU features: detected: Spectre-v2
5905 09:29:26.416817 <6>[ 0.114820] CPU features: detected: Spectre-BHB
5906 09:29:26.419965 <6>[ 0.114824] CPU features: detected: ARM erratum 858921
5907 09:29:26.426712 <6>[ 0.114829] Detected VIPT I-cache on CPU4
5908 09:29:26.432859 <4>[ 0.114878] cacheinfo: Unable to detect cache hierarchy for CPU 4
5909 09:29:26.439240 <6>[ 0.114886] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5910 09:29:26.445980 <6>[ 0.114894] arch_timer: Enabling local workaround for ARM erratum 858921
5911 09:29:26.452368 <6>[ 0.114904] arch_timer: CPU4: Trapping CNTVCT access
5912 09:29:26.458857 <6>[ 0.114912] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5913 09:29:26.462336 <6>[ 0.115397] Detected VIPT I-cache on CPU5
5914 09:29:26.468855 <4>[ 0.115437] cacheinfo: Unable to detect cache hierarchy for CPU 5
5915 09:29:26.475488 <6>[ 0.115443] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5916 09:29:26.481952 <6>[ 0.115449] arch_timer: Enabling local workaround for ARM erratum 858921
5917 09:29:26.488610 <6>[ 0.115456] arch_timer: CPU5: Trapping CNTVCT access
5918 09:29:26.494942 <6>[ 0.115461] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5919 09:29:26.498407 <6>[ 0.115897] Detected VIPT I-cache on CPU6
5920 09:29:26.504792 <4>[ 0.115942] cacheinfo: Unable to detect cache hierarchy for CPU 6
5921 09:29:26.511603 <6>[ 0.115947] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5922 09:29:26.518003 <6>[ 0.115955] arch_timer: Enabling local workaround for ARM erratum 858921
5923 09:29:26.524339 <6>[ 0.115961] arch_timer: CPU6: Trapping CNTVCT access
5924 09:29:26.530751 <6>[ 0.115966] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5925 09:29:26.534042 <6>[ 0.116497] Detected VIPT I-cache on CPU7
5926 09:29:26.540780 <4>[ 0.116541] cacheinfo: Unable to detect cache hierarchy for CPU 7
5927 09:29:26.550350 <6>[ 0.116547] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5928 09:29:26.557085 <6>[ 0.116554] arch_timer: Enabling local workaround for ARM erratum 858921
5929 09:29:26.560174 <6>[ 0.116560] arch_timer: CPU7: Trapping CNTVCT access
5930 09:29:26.567056 <6>[ 0.116566] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5931 09:29:26.573532 <6>[ 0.116618] smp: Brought up 1 node, 8 CPUs
5932 09:29:26.576789 <6>[ 0.355488] SMP: Total of 8 processors activated.
5933 09:29:26.583446 <6>[ 0.360424] CPU features: detected: 32-bit EL0 Support
5934 09:29:26.586733 <6>[ 0.365795] CPU features: detected: 32-bit EL1 Support
5935 09:29:26.593060 <6>[ 0.371161] CPU features: detected: CRC32 instructions
5936 09:29:26.596572 <6>[ 0.376588] CPU: All CPU(s) started at EL2
5937 09:29:26.602935 <6>[ 0.380926] alternatives: applying system-wide alternatives
5938 09:29:26.610351 <6>[ 0.388914] devtmpfs: initialized
5939 09:29:26.625818 <6>[ 0.397880] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5940 09:29:26.632393 <6>[ 0.407828] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5941 09:29:26.639098 <6>[ 0.415554] pinctrl core: initialized pinctrl subsystem
5942 09:29:26.642240 <6>[ 0.422663] DMI not present or invalid.
5943 09:29:26.648748 <6>[ 0.427035] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5944 09:29:26.658615 <6>[ 0.433944] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5945 09:29:26.665233 <6>[ 0.441473] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5946 09:29:26.675125 <6>[ 0.449721] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5947 09:29:26.681923 <6>[ 0.457899] audit: initializing netlink subsys (disabled)
5948 09:29:26.688171 <5>[ 0.463604] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5949 09:29:26.694620 <6>[ 0.464584] thermal_sys: Registered thermal governor 'step_wise'
5950 09:29:26.701143 <6>[ 0.471569] thermal_sys: Registered thermal governor 'power_allocator'
5951 09:29:26.704188 <6>[ 0.477867] cpuidle: using governor menu
5952 09:29:26.711186 <6>[ 0.488828] NET: Registered PF_QIPCRTR protocol family
5953 09:29:26.717555 <6>[ 0.494321] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5954 09:29:26.723957 <6>[ 0.501417] ASID allocator initialised with 32768 entries
5955 09:29:26.730531 <6>[ 0.508186] Serial: AMBA PL011 UART driver
5956 09:29:26.740265 <4>[ 0.518577] Trying to register duplicate clock ID: 113
5957 09:29:26.799842 <6>[ 0.574927] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5958 09:29:26.814117 <6>[ 0.589260] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5959 09:29:26.817143 <6>[ 0.599014] KASLR enabled
5960 09:29:26.831662 <6>[ 0.607020] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5961 09:29:26.838295 <6>[ 0.614021] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5962 09:29:26.844755 <6>[ 0.620498] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5963 09:29:26.851288 <6>[ 0.627489] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5964 09:29:26.858025 <6>[ 0.633963] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5965 09:29:26.864443 <6>[ 0.640953] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5966 09:29:26.870875 <6>[ 0.647426] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5967 09:29:26.877583 <6>[ 0.654415] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5968 09:29:26.883904 <6>[ 0.661983] ACPI: Interpreter disabled.
5969 09:29:26.891630 <6>[ 0.669982] iommu: Default domain type: Translated
5970 09:29:26.898006 <6>[ 0.675089] iommu: DMA domain TLB invalidation policy: strict mode
5971 09:29:26.901399 <5>[ 0.681721] SCSI subsystem initialized
5972 09:29:26.907756 <6>[ 0.686138] usbcore: registered new interface driver usbfs
5973 09:29:26.914607 <6>[ 0.691865] usbcore: registered new interface driver hub
5974 09:29:26.917871 <6>[ 0.697407] usbcore: registered new device driver usb
5975 09:29:26.925388 <6>[ 0.703716] pps_core: LinuxPPS API ver. 1 registered
5976 09:29:26.935012 <6>[ 0.708900] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5977 09:29:26.938205 <6>[ 0.718224] PTP clock support registered
5978 09:29:26.941636 <6>[ 0.722477] EDAC MC: Ver: 3.0.0
5979 09:29:26.949653 <6>[ 0.728115] FPGA manager framework
5980 09:29:26.956411 <6>[ 0.731800] Advanced Linux Sound Architecture Driver Initialized.
5981 09:29:26.959484 <6>[ 0.738552] vgaarb: loaded
5982 09:29:26.965878 <6>[ 0.741681] clocksource: Switched to clocksource arch_sys_counter
5983 09:29:26.969051 <5>[ 0.748111] VFS: Disk quotas dquot_6.6.0
5984 09:29:26.975845 <6>[ 0.752287] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5985 09:29:26.978833 <6>[ 0.759461] pnp: PnP ACPI: disabled
5986 09:29:26.987824 <6>[ 0.766355] NET: Registered PF_INET protocol family
5987 09:29:26.994627 <6>[ 0.771586] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5988 09:29:27.006541 <6>[ 0.781497] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5989 09:29:27.015984 <6>[ 0.790250] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5990 09:29:27.022538 <6>[ 0.798200] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5991 09:29:27.029087 <6>[ 0.806433] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5992 09:29:27.039263 <6>[ 0.814528] TCP: Hash tables configured (established 32768 bind 32768)
5993 09:29:27.045871 <6>[ 0.821354] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5994 09:29:27.052493 <6>[ 0.828324] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5995 09:29:27.058931 <6>[ 0.835805] NET: Registered PF_UNIX/PF_LOCAL protocol family
5996 09:29:27.065629 <6>[ 0.841897] RPC: Registered named UNIX socket transport module.
5997 09:29:27.068695 <6>[ 0.848040] RPC: Registered udp transport module.
5998 09:29:27.075184 <6>[ 0.852965] RPC: Registered tcp transport module.
5999 09:29:27.081936 <6>[ 0.857888] RPC: Registered tcp NFSv4.1 backchannel transport module.
6000 09:29:27.085011 <6>[ 0.864540] PCI: CLS 0 bytes, default 64
6001 09:29:27.088416 <6>[ 0.868823] Unpacking initramfs...
6002 09:29:27.110819 <6>[ 0.885820] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6003 09:29:27.120384 <6>[ 0.894448] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6004 09:29:27.123588 <6>[ 0.903294] kvm [1]: IPA Size Limit: 40 bits
6005 09:29:27.131189 <6>[ 0.909618] kvm [1]: vgic-v2@c420000
6006 09:29:27.137560 <6>[ 0.913433] kvm [1]: GIC system register CPU interface enabled
6007 09:29:27.140807 <6>[ 0.919605] kvm [1]: vgic interrupt IRQ18
6008 09:29:27.147305 <6>[ 0.923967] kvm [1]: Hyp mode initialized successfully
6009 09:29:27.150663 <5>[ 0.930318] Initialise system trusted keyrings
6010 09:29:27.157161 <6>[ 0.935175] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6011 09:29:27.166776 <6>[ 0.945141] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6012 09:29:27.173117 <5>[ 0.951567] NFS: Registering the id_resolver key type
6013 09:29:27.176217 <5>[ 0.956870] Key type id_resolver registered
6014 09:29:27.182888 <5>[ 0.961281] Key type id_legacy registered
6015 09:29:27.189537 <6>[ 0.965589] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6016 09:29:27.195955 <6>[ 0.972509] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6017 09:29:27.202207 <6>[ 0.980236] 9p: Installing v9fs 9p2000 file system support
6018 09:29:27.230101 <5>[ 1.008523] Key type asymmetric registered
6019 09:29:27.233605 <5>[ 1.012867] Asymmetric key parser 'x509' registered
6020 09:29:27.243393 <6>[ 1.018021] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6021 09:29:27.246454 <6>[ 1.025646] io scheduler mq-deadline registered
6022 09:29:27.249871 <6>[ 1.030407] io scheduler kyber registered
6023 09:29:27.272809 <6>[ 1.051171] EINJ: ACPI disabled.
6024 09:29:27.279405 <4>[ 1.054950] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6025 09:29:27.317495 <6>[ 1.095864] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6026 09:29:27.326113 <6>[ 1.104361] printk: console [ttyS0] disabled
6027 09:29:27.353948 <6>[ 1.129010] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6028 09:29:27.360307 <6>[ 1.138490] printk: console [ttyS0] enabled
6029 09:29:27.363707 <6>[ 1.138490] printk: console [ttyS0] enabled
6030 09:29:27.370221 <6>[ 1.147408] printk: bootconsole [mtk8250] disabled
6031 09:29:27.373278 <6>[ 1.147408] printk: bootconsole [mtk8250] disabled
6032 09:29:27.383386 <3>[ 1.157956] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6033 09:29:27.389707 <3>[ 1.166336] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6034 09:29:27.419654 <6>[ 1.194753] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6035 09:29:27.426114 <6>[ 1.204409] serial serial0: tty port ttyS1 registered
6036 09:29:27.432485 <6>[ 1.210996] SuperH (H)SCI(F) driver initialized
6037 09:29:27.436022 <6>[ 1.216500] msm_serial: driver initialized
6038 09:29:27.451574 <6>[ 1.226839] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6039 09:29:27.461185 <6>[ 1.235446] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6040 09:29:27.467832 <6>[ 1.244027] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6041 09:29:27.477672 <6>[ 1.252600] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6042 09:29:27.487289 <6>[ 1.261258] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6043 09:29:27.493821 <6>[ 1.269917] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6044 09:29:27.503578 <6>[ 1.278658] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6045 09:29:27.513645 <6>[ 1.287398] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6046 09:29:27.520150 <6>[ 1.295965] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6047 09:29:27.529815 <6>[ 1.304767] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6048 09:29:27.538860 <4>[ 1.317160] cacheinfo: Unable to detect cache hierarchy for CPU 0
6049 09:29:27.548209 <6>[ 1.326542] loop: module loaded
6050 09:29:27.560153 <6>[ 1.338495] vsim1: Bringing 1800000uV into 2700000-2700000uV
6051 09:29:27.577848 <6>[ 1.356482] megasas: 07.719.03.00-rc1
6052 09:29:27.586598 <6>[ 1.365252] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6053 09:29:27.598002 <6>[ 1.373065] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6054 09:29:27.610857 <6>[ 1.389416] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6055 09:29:27.670856 <6>[ 1.442740] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6056 09:29:27.704102 <6>[ 1.482402] Freeing initrd memory: 18304K
6057 09:29:27.719076 <4>[ 1.494243] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6058 09:29:27.725651 <4>[ 1.503473] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6059 09:29:27.732133 <4>[ 1.510171] Hardware name: Google juniper sku16 board (DT)
6060 09:29:27.735552 <4>[ 1.515910] Call trace:
6061 09:29:27.738775 <4>[ 1.518611] dump_backtrace.part.0+0xe0/0xf0
6062 09:29:27.741832 <4>[ 1.523148] show_stack+0x18/0x30
6063 09:29:27.748528 <4>[ 1.526720] dump_stack_lvl+0x68/0x84
6064 09:29:27.752008 <4>[ 1.530640] dump_stack+0x18/0x34
6065 09:29:27.755010 <4>[ 1.534210] sysfs_warn_dup+0x64/0x80
6066 09:29:27.758269 <4>[ 1.538131] sysfs_do_create_link_sd+0xf0/0x100
6067 09:29:27.764895 <4>[ 1.542918] sysfs_create_link+0x20/0x40
6068 09:29:27.768261 <4>[ 1.547097] bus_add_device+0x68/0x10c
6069 09:29:27.771713 <4>[ 1.551103] device_add+0x340/0x7ac
6070 09:29:27.774723 <4>[ 1.554847] of_device_add+0x44/0x60
6071 09:29:27.781410 <4>[ 1.558680] of_platform_device_create_pdata+0x90/0x120
6072 09:29:27.784430 <4>[ 1.564162] of_platform_bus_create+0x170/0x370
6073 09:29:27.791171 <4>[ 1.568948] of_platform_populate+0x50/0xfc
6074 09:29:27.794405 <4>[ 1.573388] parse_mtd_partitions+0x1dc/0x510
6075 09:29:27.800865 <4>[ 1.578001] mtd_device_parse_register+0xf8/0x2e0
6076 09:29:27.804172 <4>[ 1.582959] spi_nor_probe+0x21c/0x2f0
6077 09:29:27.807404 <4>[ 1.586965] spi_mem_probe+0x6c/0xb0
6078 09:29:27.810701 <4>[ 1.590798] spi_probe+0x84/0xe4
6079 09:29:27.814082 <4>[ 1.594279] really_probe+0xbc/0x2e0
6080 09:29:27.820801 <4>[ 1.598110] __driver_probe_device+0x78/0x11c
6081 09:29:27.824060 <4>[ 1.602722] driver_probe_device+0xd8/0x160
6082 09:29:27.827365 <4>[ 1.607160] __device_attach_driver+0xb8/0x134
6083 09:29:27.833670 <4>[ 1.611859] bus_for_each_drv+0x78/0xd0
6084 09:29:27.836995 <4>[ 1.615949] __device_attach+0xa8/0x1c0
6085 09:29:27.840448 <4>[ 1.620040] device_initial_probe+0x14/0x20
6086 09:29:27.843779 <4>[ 1.624478] bus_probe_device+0x9c/0xa4
6087 09:29:27.850254 <4>[ 1.628569] device_add+0x3ac/0x7ac
6088 09:29:27.853217 <4>[ 1.632311] __spi_add_device+0x78/0x120
6089 09:29:27.856572 <4>[ 1.636489] spi_add_device+0x40/0x7c
6090 09:29:27.863169 <4>[ 1.640407] spi_register_controller+0x610/0xad0
6091 09:29:27.866669 <4>[ 1.645280] devm_spi_register_controller+0x4c/0xa4
6092 09:29:27.869769 <4>[ 1.650414] mtk_spi_probe+0x3f8/0x650
6093 09:29:27.876219 <4>[ 1.654418] platform_probe+0x68/0xe0
6094 09:29:27.879616 <4>[ 1.658336] really_probe+0xbc/0x2e0
6095 09:29:27.883014 <4>[ 1.662167] __driver_probe_device+0x78/0x11c
6096 09:29:27.889341 <4>[ 1.666778] driver_probe_device+0xd8/0x160
6097 09:29:27.892837 <4>[ 1.671216] __driver_attach+0x94/0x19c
6098 09:29:27.895829 <4>[ 1.675306] bus_for_each_dev+0x70/0xd0
6099 09:29:27.899015 <4>[ 1.679396] driver_attach+0x24/0x30
6100 09:29:27.902568 <4>[ 1.683226] bus_add_driver+0x154/0x20c
6101 09:29:27.909123 <4>[ 1.687316] driver_register+0x78/0x130
6102 09:29:27.912411 <4>[ 1.691407] __platform_driver_register+0x28/0x34
6103 09:29:27.919121 <4>[ 1.696366] mtk_spi_driver_init+0x1c/0x28
6104 09:29:27.922434 <4>[ 1.700720] do_one_initcall+0x50/0x1d0
6105 09:29:27.925695 <4>[ 1.704810] kernel_init_freeable+0x21c/0x288
6106 09:29:27.928852 <4>[ 1.709424] kernel_init+0x24/0x12c
6107 09:29:27.932290 <4>[ 1.713168] ret_from_fork+0x10/0x20
6108 09:29:27.943861 <6>[ 1.722092] tun: Universal TUN/TAP device driver, 1.6
6109 09:29:27.946878 <6>[ 1.728375] thunder_xcv, ver 1.0
6110 09:29:27.953358 <6>[ 1.731891] thunder_bgx, ver 1.0
6111 09:29:27.953486 <6>[ 1.735396] nicpf, ver 1.0
6112 09:29:27.964815 <6>[ 1.739763] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6113 09:29:27.968080 <6>[ 1.747250] hns3: Copyright (c) 2017 Huawei Corporation.
6114 09:29:27.974513 <6>[ 1.752847] hclge is initializing
6115 09:29:27.977743 <6>[ 1.756431] e1000: Intel(R) PRO/1000 Network Driver
6116 09:29:27.984380 <6>[ 1.761566] e1000: Copyright (c) 1999-2006 Intel Corporation.
6117 09:29:27.990654 <6>[ 1.767589] e1000e: Intel(R) PRO/1000 Network Driver
6118 09:29:27.994085 <6>[ 1.772810] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6119 09:29:28.000747 <6>[ 1.779003] igb: Intel(R) Gigabit Ethernet Network Driver
6120 09:29:28.007284 <6>[ 1.784658] igb: Copyright (c) 2007-2014 Intel Corporation.
6121 09:29:28.013762 <6>[ 1.790502] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6122 09:29:28.020232 <6>[ 1.797026] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6123 09:29:28.023497 <6>[ 1.803579] sky2: driver version 1.30
6124 09:29:28.030519 <6>[ 1.808822] usbcore: registered new device driver r8152-cfgselector
6125 09:29:28.036874 <6>[ 1.815366] usbcore: registered new interface driver r8152
6126 09:29:28.043495 <6>[ 1.821197] VFIO - User Level meta-driver version: 0.3
6127 09:29:28.050372 <6>[ 1.828973] mtu3 11201000.usb: uwk - reg:0x420, version:101
6128 09:29:28.060231 <4>[ 1.834850] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6129 09:29:28.063626 <6>[ 1.842126] mtu3 11201000.usb: dr_mode: 1, drd: auto
6130 09:29:28.070082 <6>[ 1.847353] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6131 09:29:28.073549 <6>[ 1.853541] mtu3 11201000.usb: usb3-drd: 0
6132 09:29:28.083952 <6>[ 1.859096] mtu3 11201000.usb: xHCI platform device register success...
6133 09:29:28.090576 <4>[ 1.867722] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6134 09:29:28.097401 <6>[ 1.875682] xhci-mtk 11200000.usb: xHCI Host Controller
6135 09:29:28.106786 <6>[ 1.881193] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6136 09:29:28.110280 <6>[ 1.888919] xhci-mtk 11200000.usb: USB3 root hub has no ports
6137 09:29:28.120384 <6>[ 1.894927] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6138 09:29:28.126840 <6>[ 1.904348] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6139 09:29:28.133551 <6>[ 1.910430] xhci-mtk 11200000.usb: xHCI Host Controller
6140 09:29:28.139902 <6>[ 1.915918] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6141 09:29:28.146376 <6>[ 1.923576] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6142 09:29:28.149533 <6>[ 1.930398] hub 1-0:1.0: USB hub found
6143 09:29:28.156372 <6>[ 1.934426] hub 1-0:1.0: 1 port detected
6144 09:29:28.166288 <6>[ 1.939784] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6145 09:29:28.169275 <6>[ 1.948399] hub 2-0:1.0: USB hub found
6146 09:29:28.176074 <3>[ 1.952426] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6147 09:29:28.182413 <6>[ 1.960314] usbcore: registered new interface driver usb-storage
6148 09:29:28.188888 <6>[ 1.966923] usbcore: registered new device driver onboard-usb-hub
6149 09:29:28.206681 <4>[ 1.981777] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6150 09:29:28.215558 <6>[ 1.994010] mt6397-rtc mt6358-rtc: registered as rtc0
6151 09:29:28.225414 <6>[ 1.999489] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:29:27 UTC (1718702967)
6152 09:29:28.232036 <6>[ 2.009366] i2c_dev: i2c /dev entries driver
6153 09:29:28.241651 <6>[ 2.015796] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6154 09:29:28.248411 <6>[ 2.024117] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6155 09:29:28.255032 <6>[ 2.033022] i2c 4-0058: Fixed dependency cycle(s) with /panel
6156 09:29:28.261306 <6>[ 2.039055] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6157 09:29:28.271347 <3>[ 2.046522] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6158 09:29:28.287936 <6>[ 2.066434] cpu cpu0: EM: created perf domain
6159 09:29:28.301211 <6>[ 2.071918] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6160 09:29:28.304301 <6>[ 2.083202] cpu cpu4: EM: created perf domain
6161 09:29:28.312052 <6>[ 2.090393] sdhci: Secure Digital Host Controller Interface driver
6162 09:29:28.318657 <6>[ 2.096849] sdhci: Copyright(c) Pierre Ossman
6163 09:29:28.325110 <6>[ 2.102256] Synopsys Designware Multimedia Card Interface Driver
6164 09:29:28.331422 <6>[ 2.102775] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6165 09:29:28.338151 <6>[ 2.109314] sdhci-pltfm: SDHCI platform and OF driver helper
6166 09:29:28.344769 <6>[ 2.122820] ledtrig-cpu: registered to indicate activity on CPUs
6167 09:29:28.352082 <6>[ 2.130572] usbcore: registered new interface driver usbhid
6168 09:29:28.358475 <6>[ 2.136411] usbhid: USB HID core driver
6169 09:29:28.365122 <6>[ 2.140729] spi_master spi2: will run message pump with realtime priority
6170 09:29:28.372427 <4>[ 2.140921] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6171 09:29:28.379118 <4>[ 2.155334] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6172 09:29:28.403864 <6>[ 2.175553] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6173 09:29:28.422820 <6>[ 2.191203] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6174 09:29:28.429184 <4>[ 2.202577] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6175 09:29:28.435547 <6>[ 2.206142] cros-ec-spi spi2.0: Chrome EC device registered
6176 09:29:28.447218 <4>[ 2.222295] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6177 09:29:28.458671 <4>[ 2.233857] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6178 09:29:28.465363 <4>[ 2.242495] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6179 09:29:28.484431 <6>[ 2.259627] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6180 09:29:28.487719 <6>[ 2.259789] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6181 09:29:28.495969 <6>[ 2.274237] mmc0: new HS400 MMC card at address 0001
6182 09:29:28.502226 <6>[ 2.280464] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6183 09:29:28.512158 <6>[ 2.285969] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6184 09:29:28.526856 <6>[ 2.298798] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6185 09:29:28.533732 <6>[ 2.300318] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6186 09:29:28.543374 <6>[ 2.301851] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6187 09:29:28.553082 <6>[ 2.309781] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6188 09:29:28.559610 <6>[ 2.311583] NET: Registered PF_PACKET protocol family
6189 09:29:28.562671 <6>[ 2.311698] 9pnet: Installing 9P2000 support
6190 09:29:28.569403 <5>[ 2.311752] Key type dns_resolver registered
6191 09:29:28.572471 <6>[ 2.312170] registered taskstats version 1
6192 09:29:28.579044 <5>[ 2.312188] Loading compiled-in X.509 certificates
6193 09:29:28.582726 <6>[ 2.318016] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6194 09:29:28.589080 <6>[ 2.357693] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6195 09:29:28.598843 <3>[ 2.361840] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6196 09:29:28.605694 <6>[ 2.362841] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6197 09:29:28.611772 <6>[ 2.364157] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6198 09:29:28.642367 <6>[ 2.414334] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6199 09:29:28.653509 <6>[ 2.428789] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6200 09:29:28.663590 <6>[ 2.437357] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6201 09:29:28.669995 <6>[ 2.445949] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6202 09:29:28.679901 <6>[ 2.454479] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6203 09:29:28.689676 <6>[ 2.462998] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6204 09:29:28.696389 <6>[ 2.471517] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6205 09:29:28.706048 <6>[ 2.480035] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6206 09:29:28.712409 <6>[ 2.489249] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6207 09:29:28.718820 <6>[ 2.496765] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6208 09:29:28.725859 <6>[ 2.504052] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6209 09:29:28.736194 <6>[ 2.511286] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6210 09:29:28.739510 <6>[ 2.516711] hub 1-1:1.0: USB hub found
6211 09:29:28.745884 <6>[ 2.518746] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6212 09:29:28.749250 <6>[ 2.522388] hub 1-1:1.0: 3 ports detected
6213 09:29:28.755645 <6>[ 2.530285] panfrost 13040000.gpu: clock rate = 511999970
6214 09:29:28.765374 <6>[ 2.538630] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6215 09:29:28.772038 <6>[ 2.548659] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6216 09:29:28.781633 <6>[ 2.556672] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6217 09:29:28.795040 <6>[ 2.565105] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6218 09:29:28.801376 <6>[ 2.577183] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6219 09:29:28.812233 <6>[ 2.587351] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6220 09:29:28.821878 <6>[ 2.596548] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6221 09:29:28.831888 <6>[ 2.605721] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6222 09:29:28.841550 <6>[ 2.614852] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6223 09:29:28.851430 <6>[ 2.623979] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6224 09:29:28.858175 <6>[ 2.633279] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6225 09:29:28.867543 <6>[ 2.642581] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6226 09:29:28.877559 <6>[ 2.652054] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6227 09:29:28.887060 <6>[ 2.661531] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6228 09:29:28.896844 <6>[ 2.670657] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6229 09:29:28.967643 <6>[ 2.742748] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6230 09:29:28.977518 <6>[ 2.751616] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6231 09:29:28.988809 <6>[ 2.763832] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6232 09:29:29.066372 <6>[ 2.841715] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6233 09:29:29.712137 <6>[ 3.034016] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6234 09:29:29.721786 <4>[ 3.150879] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6235 09:29:29.728415 <4>[ 3.150898] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6236 09:29:29.734851 <6>[ 3.203895] r8152 1-1.2:1.0 eth0: v1.12.13
6237 09:29:29.741340 <6>[ 3.285711] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6238 09:29:29.748096 <6>[ 3.470626] Console: switching to colour frame buffer device 170x48
6239 09:29:29.757594 <6>[ 3.531262] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6240 09:29:29.776741 <6>[ 3.548765] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6241 09:29:29.794199 <6>[ 3.565939] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6242 09:29:29.803763 <6>[ 3.578529] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6243 09:29:29.810532 <6>[ 3.587230] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6244 09:29:29.823665 <6>[ 3.594915] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6245 09:29:29.841548 <6>[ 3.613417] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6246 09:29:31.101119 <6>[ 4.879641] r8152 1-1.2:1.0 eth0: carrier on
6247 09:29:34.087334 <5>[ 4.905695] Sending DHCP requests .., OK
6248 09:29:34.093905 <6>[ 7.870034] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6249 09:29:34.097344 <6>[ 7.878504] IP-Config: Complete:
6250 09:29:34.110362 <6>[ 7.882076] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6251 09:29:34.120027 <6>[ 7.892977] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6252 09:29:34.132030 <6>[ 7.907255] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6253 09:29:34.140628 <6>[ 7.907266] nameserver0=192.168.201.1
6254 09:29:34.148815 <6>[ 7.927061] clk: Disabling unused clocks
6255 09:29:34.153417 <6>[ 7.935020] ALSA device list:
6256 09:29:34.162492 <6>[ 7.941065] No soundcards found.
6257 09:29:34.171810 <6>[ 7.950183] Freeing unused kernel memory: 8512K
6258 09:29:34.179137 <6>[ 7.957324] Run /init as init process
6259 09:29:34.190901 Loading, please wait...
6260 09:29:34.225785 Starting systemd-udevd version 252.22-1~deb12u1
6261 09:29:34.529015 <6>[ 8.300793] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6262 09:29:34.535778 <6>[ 8.302349] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6263 09:29:34.542152 <3>[ 8.318993] thermal_sys: Failed to find 'trips' node
6264 09:29:34.552557 <3>[ 8.327570] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6265 09:29:34.559249 <4>[ 8.327723] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6266 09:29:34.568742 <3>[ 8.334895] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6267 09:29:34.575333 <4>[ 8.334903] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6268 09:29:34.585325 <3>[ 8.342308] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6269 09:29:34.591920 <3>[ 8.342933] mtk-scp 10500000.scp: invalid resource
6270 09:29:34.598340 <6>[ 8.343003] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6271 09:29:34.608177 <3>[ 8.343576] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6272 09:29:34.617753 <3>[ 8.343592] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6273 09:29:34.624562 <3>[ 8.343600] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6274 09:29:34.634397 <3>[ 8.343671] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6275 09:29:34.644035 <3>[ 8.343676] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6276 09:29:34.650560 <3>[ 8.343681] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6277 09:29:34.660452 <3>[ 8.343686] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6278 09:29:34.667011 <3>[ 8.343691] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6279 09:29:34.676853 <3>[ 8.343722] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6280 09:29:34.683141 <4>[ 8.362503] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6281 09:29:34.694106 <3>[ 8.369112] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6282 09:29:34.700531 <3>[ 8.369782] thermal_sys: Failed to find 'trips' node
6283 09:29:34.710475 <3>[ 8.369785] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6284 09:29:34.720361 <3>[ 8.369791] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6285 09:29:34.730097 <4>[ 8.369794] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6286 09:29:34.733045 <6>[ 8.369952] remoteproc remoteproc0: scp is available
6287 09:29:34.743737 <4>[ 8.370031] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6288 09:29:34.750774 <6>[ 8.370038] remoteproc remoteproc0: powering up scp
6289 09:29:34.761144 <4>[ 8.370054] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6290 09:29:34.767845 <3>[ 8.370057] remoteproc remoteproc0: request_firmware failed: -2
6291 09:29:34.782106 <4>[ 8.374584] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6292 09:29:34.791858 <3>[ 8.381693] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6293 09:29:34.802986 <3>[ 8.381702] elan_i2c 2-0015: Error applying setting, reverse things back
6294 09:29:34.812731 <5>[ 8.394006] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6295 09:29:34.822320 <6>[ 8.401382] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6296 09:29:34.829181 <6>[ 8.417955] mc: Linux media interface: v0.10
6297 09:29:34.835547 <5>[ 8.422263] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6298 09:29:34.846646 <5>[ 8.422685] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6299 09:29:34.856373 <4>[ 8.422743] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6300 09:29:34.863596 <6>[ 8.422750] cfg80211: failed to load regulatory.db
6301 09:29:34.876542 <6>[ 8.433896] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6302 09:29:34.886284 <6>[ 8.438852] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6303 09:29:34.892851 <6>[ 8.443276] cs_system_cfg: CoreSight Configuration manager initialised
6304 09:29:34.906380 <3>[ 8.443344] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6305 09:29:34.913493 <6>[ 8.452332] videodev: Linux video capture interface: v2.00
6306 09:29:34.924173 <6>[ 8.510090] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6307 09:29:34.959343 <6>[ 8.734250] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6308 09:29:34.972470 <3>[ 8.734394] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6309 09:29:34.978708 <6>[ 8.742847] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6310 09:29:34.985206 <3>[ 8.755492] debugfs: File 'Playback' in directory 'dapm' already present!
6311 09:29:34.988703 <6>[ 8.755701] Bluetooth: Core ver 2.22
6312 09:29:34.995169 <6>[ 8.755748] NET: Registered PF_BLUETOOTH protocol family
6313 09:29:35.001530 <6>[ 8.755750] Bluetooth: HCI device and connection manager initialized
6314 09:29:35.008296 <6>[ 8.755763] Bluetooth: HCI socket layer initialized
6315 09:29:35.011518 <6>[ 8.755768] Bluetooth: L2CAP socket layer initialized
6316 09:29:35.018133 <6>[ 8.755777] Bluetooth: SCO socket layer initialized
6317 09:29:35.024421 <6>[ 8.762297] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6318 09:29:35.030877 <3>[ 8.769004] debugfs: File 'Capture' in directory 'dapm' already present!
6319 09:29:35.040838 <6>[ 8.773147] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6320 09:29:35.050859 <6>[ 8.780813] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6321 09:29:35.060570 <6>[ 8.785357] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6322 09:29:35.063661 <6>[ 8.785517] Bluetooth: HCI UART driver ver 2.3
6323 09:29:35.070396 <6>[ 8.785521] Bluetooth: HCI UART protocol H4 registered
6324 09:29:35.076914 <6>[ 8.785564] Bluetooth: HCI UART protocol LL registered
6325 09:29:35.083665 <6>[ 8.785577] Bluetooth: HCI UART protocol Three-wire (H5) registered
6326 09:29:35.090002 <6>[ 8.790506] Bluetooth: HCI UART protocol Broadcom registered
6327 09:29:35.100579 <6>[ 8.791510] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6328 09:29:35.107759 <6>[ 8.791903] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6329 09:29:35.119913 <6>[ 8.792946] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6330 09:29:35.126786 <6>[ 8.796121] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6331 09:29:35.138203 <6>[ 8.800669] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6332 09:29:35.144882 <6>[ 8.800689] Bluetooth: HCI UART protocol QCA registered
6333 09:29:35.152149 <6>[ 8.800702] Bluetooth: HCI UART protocol Marvell registered
6334 09:29:35.159971 <6>[ 8.801435] Bluetooth: hci0: setting up ROME/QCA6390
6335 09:29:35.173116 Begin: Loading essential drivers<6>[ 8.808802] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6336 09:29:35.173244 ... done.
6337 09:29:35.186103 Begin: Running /<6>[ 8.810180] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6338 09:29:35.192926 <6>[ 8.810326] usbcore: registered new interface driver uvcvideo
6339 09:29:35.199722 <6>[ 8.815661] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6340 09:29:35.209811 scripts/init-pre<6>[ 8.851941] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6341 09:29:35.212999 mount ... done.
6342 09:29:35.219475 <6>[ 8.854322] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6343 09:29:35.219595
6344 09:29:35.229575 Begin: Mounting<6>[ 8.859588] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6345 09:29:35.239503 root file syste<4>[ 8.958361] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6346 09:29:35.245595 <4>[ 8.958361] Fallback method does not support PEC.
6347 09:29:35.259818 m ... Begin: Run<6>[ 8.969560] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6348 09:29:35.266188 <3>[ 8.977931] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6349 09:29:35.272750 ning /scripts/nf<3>[ 9.024470] Bluetooth: hci0: Frame reassembly failed (-84)
6350 09:29:35.276095 s-top ... done.
6351 09:29:35.282735 <3>[ 9.034951] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6352 09:29:35.282834
6353 09:29:35.292407 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6354 09:29:35.295639 Device /sys/class/net/eth0 found
6355 09:29:35.295734 done.
6356 09:29:35.305384 Begin: Waiting up to 180 secs for any network device to become available ... done.
6357 09:29:35.331875 IP-Config: eth0 hardware address 00:e0:4c:78:85:cb mtu 1500 DHCP
6358 09:29:35.338517 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6359 09:29:35.345123 address: 192.168.201.22 broadcast: 192.168.201.255 netmask: 255.255.255.0
6360 09:29:35.358114 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0<6>[ 9.132660] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6361 09:29:35.358217
6362 09:29:35.364489 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-2
6363 09:29:35.374370 domain : lava-rack
6364 09:29:35.377461 rootserver: 192.168.201.1 rootpath:
6365 09:29:35.377552 filename :
6366 09:29:35.506025 done.
6367 09:29:35.513007 Begin: Running /scripts/nfs-bottom ... done.
6368 09:29:35.527696 Begin: Running /scripts/init-bottom ... done.
6369 09:29:35.544077 <6>[ 9.322129] Bluetooth: hci0: QCA Product ID :0x00000008
6370 09:29:35.552975 <6>[ 9.331313] Bluetooth: hci0: QCA SOC Version :0x00000044
6371 09:29:35.562450 <6>[ 9.340591] Bluetooth: hci0: QCA ROM Version :0x00000302
6372 09:29:35.571668 <6>[ 9.349846] Bluetooth: hci0: QCA Patch Version:0x00000111
6373 09:29:35.580528 <6>[ 9.358731] Bluetooth: hci0: QCA controller version 0x00440302
6374 09:29:35.592604 <6>[ 9.367589] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6375 09:29:35.602467 <4>[ 9.376759] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6376 09:29:35.613146 <3>[ 9.388108] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6377 09:29:35.620057 <3>[ 9.398252] Bluetooth: hci0: QCA Failed to download patch (-2)
6378 09:29:35.841575 <6>[ 9.616695] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6379 09:29:35.925540 <4>[ 9.700711] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6380 09:29:35.944366 <4>[ 9.719555] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6381 09:29:35.960157 <4>[ 9.735320] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6382 09:29:35.969963 <4>[ 9.748439] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6383 09:29:36.830130 <6>[ 10.608369] NET: Registered PF_INET6 protocol family
6384 09:29:36.842105 <6>[ 10.620419] Segment Routing with IPv6
6385 09:29:36.850308 <6>[ 10.628548] In-situ OAM (IOAM) with IPv6
6386 09:29:37.027544 <30>[ 10.776212] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6387 09:29:37.045012 <30>[ 10.823411] systemd[1]: Detected architecture arm64.
6388 09:29:37.056418
6389 09:29:37.059843 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6390 09:29:37.059970
6391 09:29:37.084469 <30>[ 10.862639] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6392 09:29:38.032967 <30>[ 11.807837] systemd[1]: Queued start job for default target graphical.target.
6393 09:29:38.075366 <30>[ 11.850165] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6394 09:29:38.087572 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6395 09:29:38.109113 <30>[ 11.884028] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6396 09:29:38.122764 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6397 09:29:38.141110 <30>[ 11.916145] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6398 09:29:38.155643 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6399 09:29:38.176234 <30>[ 11.951337] systemd[1]: Created slice user.slice - User and Session Slice.
6400 09:29:38.188512 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6401 09:29:38.210316 <30>[ 11.982284] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6402 09:29:38.223826 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6403 09:29:38.246305 <30>[ 12.018104] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6404 09:29:38.258959 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6405 09:29:38.285042 <30>[ 12.050018] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6406 09:29:38.304433 <30>[ 12.079616] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6407 09:29:38.315738 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6408 09:29:38.330793 <30>[ 12.105879] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6409 09:29:38.343778 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6410 09:29:38.363138 <30>[ 12.137947] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6411 09:29:38.377109 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6412 09:29:38.391767 <30>[ 12.169995] systemd[1]: Reached target paths.target - Path Units.
6413 09:29:38.406272 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6414 09:29:38.422944 <30>[ 12.197881] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6415 09:29:38.435106 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6416 09:29:38.450657 <30>[ 12.225846] systemd[1]: Reached target slices.target - Slice Units.
6417 09:29:38.462231 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6418 09:29:38.475736 <30>[ 12.253895] systemd[1]: Reached target swap.target - Swaps.
6419 09:29:38.486352 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6420 09:29:38.507039 <30>[ 12.281914] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6421 09:29:38.520459 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6422 09:29:38.539277 <30>[ 12.314311] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6423 09:29:38.553332 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6424 09:29:38.573589 <30>[ 12.348724] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6425 09:29:38.587367 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6426 09:29:38.604396 <30>[ 12.379290] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6427 09:29:38.618198 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6428 09:29:38.635774 <30>[ 12.410825] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6429 09:29:38.648216 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6430 09:29:38.668798 <30>[ 12.443597] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6431 09:29:38.682353 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6432 09:29:38.701335 <30>[ 12.476286] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6433 09:29:38.714341 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6434 09:29:38.731577 <30>[ 12.506493] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6435 09:29:38.744278 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6436 09:29:38.787023 <30>[ 12.562136] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6437 09:29:38.799314 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6438 09:29:38.812737 <30>[ 12.587669] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6439 09:29:38.826031 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6440 09:29:38.846313 <30>[ 12.621472] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6441 09:29:38.859148 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6442 09:29:38.885909 <30>[ 12.654278] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6443 09:29:38.907363 <30>[ 12.682309] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6444 09:29:38.920777 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6445 09:29:38.944560 <30>[ 12.719386] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6446 09:29:38.956727 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6447 09:29:39.019641 <30>[ 12.794780] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6448 09:29:39.031975 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6449 09:29:39.057611 <30>[ 12.832440] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6450 09:29:39.074031 Starting [0;1;39mmodpr<6>[ 12.847452] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6451 09:29:39.077504 obe@drm.service[0m - Load Kernel Module drm...
6452 09:29:39.123926 <30>[ 12.898807] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6453 09:29:39.137894 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6454 09:29:39.161504 <30>[ 12.936525] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6455 09:29:39.172306 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6456 09:29:39.195475 <30>[ 12.970234] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6457 09:29:39.202340 <6>[ 12.979540] fuse: init (API version 7.37)
6458 09:29:39.212026 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6459 09:29:39.239958 <30>[ 13.014912] systemd[1]: Starting systemd-journald.service - Journal Service...
6460 09:29:39.249958 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6461 09:29:39.277690 <30>[ 13.052564] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6462 09:29:39.289210 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6463 09:29:39.335320 <30>[ 13.106830] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6464 09:29:39.346590 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6465 09:29:39.366538 <30>[ 13.141382] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6466 09:29:39.378348 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6467 09:29:39.399116 <30>[ 13.173968] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6468 09:29:39.411447 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6469 09:29:39.417704 <3>[ 13.192523] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6470 09:29:39.433150 <30>[ 13.207492] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6471 09:29:39.439652 <3>[ 13.207568] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6472 09:29:39.450800 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6473 09:29:39.457070 <3>[ 13.233590] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6474 09:29:39.468447 <30>[ 13.242809] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6475 09:29:39.474788 <3>[ 13.248894] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6476 09:29:39.493635 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 13.267695] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6477 09:29:39.493794 File System.
6478 09:29:39.509988 <3>[ 13.284706] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 09:29:39.520392 <30>[ 13.293801] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6480 09:29:39.526783 <3>[ 13.301356] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6481 09:29:39.546590 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m<3>[ 13.320003] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6482 09:29:39.546736 - Kernel Debug File System.
6483 09:29:39.568165 <30>[ 13.342886] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6484 09:29:39.579856 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6485 09:29:39.599874 <30>[ 13.375033] systemd[1]: Started systemd-journald.service - Journal Service.
6486 09:29:39.611648 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6487 09:29:39.632313 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6488 09:29:39.654338 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6489 09:29:39.673509 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6490 09:29:39.693888 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6491 09:29:39.713717 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6492 09:29:39.733680 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6493 09:29:39.756708 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6494 09:29:39.776642 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6495 09:29:39.796451 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6496 09:29:39.818169 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6497 09:29:39.863522 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6498 09:29:39.894912 <4>[ 13.663240] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6499 09:29:39.906100 <3>[ 13.680980] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6500 09:29:39.919284 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6501 09:29:39.965034 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6502 09:29:39.991935 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6503 09:29:40.019320 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6504 09:29:40.039498 <46>[ 13.814356] systemd-journald[317]: Received client request to flush runtime journal.
6505 09:29:40.084443 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6506 09:29:40.360414 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6507 09:29:40.381542 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6508 09:29:40.401099 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6509 09:29:40.422793 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6510 09:29:40.821064 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6511 09:29:41.192772 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6512 09:29:41.241136 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6513 09:29:41.499061 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6514 09:29:41.590166 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6515 09:29:41.607964 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6516 09:29:41.627282 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6517 09:29:41.667899 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6518 09:29:41.695267 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6519 09:29:41.948247 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6520 09:29:41.967694 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6521 09:29:42.031259 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6522 09:29:42.199125 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6523 09:29:42.216918 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6524 09:29:42.280717 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6525 09:29:42.287081 <4>[ 16.064551] power_supply_show_property: 4 callbacks suppressed
6526 09:29:42.297441 <3>[ 16.064563] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6527 09:29:42.303790 <3>[ 16.066773] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6528 09:29:42.313651 <3>[ 16.077768] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6529 09:29:42.332760 <3>[ 16.107403] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6530 09:29:42.350230 <3>[ 16.124776] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6531 09:29:42.366274 <3>[ 16.141193] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6532 09:29:42.382980 <3>[ 16.157641] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6533 09:29:42.399521 <3>[ 16.174070] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6534 09:29:42.414562 <3>[ 16.188997] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6535 09:29:42.431304 <3>[ 16.206109] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6536 09:29:42.542979 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6537 09:29:42.578282 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6538 09:29:42.595361 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6539 09:29:42.611522 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6540 09:29:42.628002 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6541 09:29:42.672287 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6542 09:29:42.692102 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6543 09:29:42.713397 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6544 09:29:42.737981 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6545 09:29:42.758047 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6546 09:29:42.776108 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6547 09:29:42.795768 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6548 09:29:42.815495 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6549 09:29:42.868996 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6550 09:29:42.889929 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6551 09:29:42.907515 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6552 09:29:42.926234 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6553 09:29:42.946496 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6554 09:29:42.963774 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6555 09:29:42.981526 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6556 09:29:42.999789 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6557 09:29:43.020406 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6558 09:29:43.062769 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6559 09:29:43.134502 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6560 09:29:43.266691 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6561 09:29:43.294758 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6562 09:29:43.321296 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6563 09:29:43.470908 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6564 09:29:43.512519 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6565 09:29:43.536399 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6566 09:29:43.555542 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6567 09:29:43.576307 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6568 09:29:43.607896 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6569 09:29:43.630297 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6570 09:29:43.655818 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6571 09:29:43.674572 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6572 09:29:43.693848 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6573 09:29:43.740746 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6574 09:29:43.831653 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6575 09:29:43.923504
6576 09:29:43.926425 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6577 09:29:43.926569
6578 09:29:43.929923 debian-bookworm-arm64 login: root (automatic login)
6579 09:29:43.930060
6580 09:29:44.173183 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024 aarch64
6581 09:29:44.173353
6582 09:29:44.179813 The programs included with the Debian GNU/Linux system are free software;
6583 09:29:44.186272 the exact distribution terms for each program are described in the
6584 09:29:44.189683 individual files in /usr/share/doc/*/copyright.
6585 09:29:44.189813
6586 09:29:44.196097 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6587 09:29:44.199319 permitted by applicable law.
6588 09:29:44.252863 Matched prompt #10: / #
6590 09:29:44.253272 Setting prompt string to ['/ #']
6591 09:29:44.253424 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6593 09:29:44.253686 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6594 09:29:44.253806 start: 2.2.6 expect-shell-connection (timeout 00:04:01) [common]
6595 09:29:44.253893 Setting prompt string to ['/ #']
6596 09:29:44.253964 Forcing a shell prompt, looking for ['/ #']
6598 09:29:44.304175 / #
6599 09:29:44.304343 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6600 09:29:44.304460 Waiting using forced prompt support (timeout 00:02:30)
6601 09:29:44.309204
6602 09:29:44.309548 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6603 09:29:44.309697 start: 2.2.7 export-device-env (timeout 00:04:01) [common]
6605 09:29:44.410110 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh'
6606 09:29:44.415175 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407646/extract-nfsrootfs-qfl6r5wh'
6608 09:29:44.515777 / # export NFS_SERVER_IP='192.168.201.1'
6609 09:29:44.520771 export NFS_SERVER_IP='192.168.201.1'
6610 09:29:44.521075 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6611 09:29:44.521185 end: 2.2 depthcharge-retry (duration 00:01:00) [common]
6612 09:29:44.521285 end: 2 depthcharge-action (duration 00:01:00) [common]
6613 09:29:44.521391 start: 3 lava-test-retry (timeout 00:01:00) [common]
6614 09:29:44.521501 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6615 09:29:44.521586 Using namespace: common
6617 09:29:44.621901 / # #
6618 09:29:44.622103 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6619 09:29:44.626579 #
6620 09:29:44.626882 Using /lava-14407646
6622 09:29:44.727187 / # export SHELL=/bin/sh
6623 09:29:44.731442 export SHELL=/bin/sh
6625 09:29:44.831971 / # . /lava-14407646/environment
6626 09:29:44.837401 . /lava-14407646/environment
6628 09:29:44.942676 / # /lava-14407646/bin/lava-test-runner /lava-14407646/0
6629 09:29:44.942845 Test shell timeout: 10s (minimum of the action and connection timeout)
6630 09:29:44.947765 /lava-14407646/bin/lava-test-runner /lava-14407646/0
6631 09:29:45.128143 + export TESTRUN_ID=0_dmesg
6632 09:29:45.131264 + cd /lava-14407646/0/tests/0_dmesg
6633 09:29:45.134512 + cat uuid
6634 09:29:45.141167 + UUID=14407646_1.<8>[ 18.917962] <LAVA_SIGNAL_STARTRUN 0_dmesg 14407646_1.6.2.3.1>
6635 09:29:45.141461 Received signal: <STARTRUN> 0_dmesg 14407646_1.6.2.3.1
6636 09:29:45.141551 Starting test lava.0_dmesg (14407646_1.6.2.3.1)
6637 09:29:45.141648 Skipping test definition patterns.
6638 09:29:45.144564 6.2.3.1
6639 09:29:45.144661 + set +x
6640 09:29:45.147785 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6641 09:29:45.231419 <8>[ 19.006146] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6642 09:29:45.231775 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6644 09:29:45.285130 <8>[ 19.059926] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6645 09:29:45.285443 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6647 09:29:45.339256 <8>[ 19.114009] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6648 09:29:45.339578 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6650 09:29:45.345998 + <8>[ 19.123691] <LAVA_SIGNAL_ENDRUN 0_dmesg 14407646_1.6.2.3.1>
6651 09:29:45.346097 set +x
6652 09:29:45.346347 Received signal: <ENDRUN> 0_dmesg 14407646_1.6.2.3.1
6653 09:29:45.346439 Ending use of test pattern.
6654 09:29:45.346511 Ending test lava.0_dmesg (14407646_1.6.2.3.1), duration 0.20
6656 09:29:45.351307 <LAVA_TEST_RUNNER EXIT>
6657 09:29:45.351601 ok: lava_test_shell seems to have completed
6658 09:29:45.351724 alert: pass
crit: pass
emerg: pass
6659 09:29:45.351826 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6660 09:29:45.351922 end: 3 lava-test-retry (duration 00:00:01) [common]
6661 09:29:45.352020 start: 4 finalize (timeout 00:08:31) [common]
6662 09:29:45.352119 start: 4.1 power-off (timeout 00:00:30) [common]
6663 09:29:45.352297 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6664 09:29:45.533164 >> Command sent successfully.
6665 09:29:45.536281 Returned 0 in 0 seconds
6666 09:29:45.636697 end: 4.1 power-off (duration 00:00:00) [common]
6668 09:29:45.637175 start: 4.2 read-feedback (timeout 00:08:30) [common]
6669 09:29:45.637518 Listened to connection for namespace 'common' for up to 1s
6670 09:29:46.637502 Finalising connection for namespace 'common'
6671 09:29:46.637734 Disconnecting from shell: Finalise
6672 09:29:46.637881 / #
6673 09:29:46.738240 end: 4.2 read-feedback (duration 00:00:01) [common]
6674 09:29:46.738436 end: 4 finalize (duration 00:00:01) [common]
6675 09:29:46.738572 Cleaning after the job
6676 09:29:46.738689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/ramdisk
6677 09:29:46.740732 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/kernel
6678 09:29:46.750896 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/dtb
6679 09:29:46.751081 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/nfsrootfs
6680 09:29:46.805982 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407646/tftp-deploy-20cyu2ei/modules
6681 09:29:46.811415 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407646
6682 09:29:47.157472 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407646
6683 09:29:47.157680 Job finished correctly