Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 40
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 84
1 09:56:32.099462 lava-dispatcher, installed at version: 2024.03
2 09:56:32.099689 start: 0 validate
3 09:56:32.099836 Start time: 2024-06-18 09:56:32.099826+00:00 (UTC)
4 09:56:32.099966 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:56:32.100107 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 09:56:32.605654 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:56:32.606380 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 09:56:32.868158 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:56:32.868932 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 09:56:33.123197 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:56:33.123963 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:56:33.386169 validate duration: 1.29
14 09:56:33.387441 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:56:33.388020 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:56:33.388510 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:56:33.389107 Not decompressing ramdisk as can be used compressed.
18 09:56:33.389539 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/arm64/rootfs.cpio.gz
19 09:56:33.389885 saving as /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/ramdisk/rootfs.cpio.gz
20 09:56:33.390216 total size: 39026414 (37 MB)
21 09:56:33.395075 progress 0 % (0 MB)
22 09:56:33.426192 progress 5 % (1 MB)
23 09:56:33.440472 progress 10 % (3 MB)
24 09:56:33.451610 progress 15 % (5 MB)
25 09:56:33.462844 progress 20 % (7 MB)
26 09:56:33.473837 progress 25 % (9 MB)
27 09:56:33.485023 progress 30 % (11 MB)
28 09:56:33.496052 progress 35 % (13 MB)
29 09:56:33.507292 progress 40 % (14 MB)
30 09:56:33.518298 progress 45 % (16 MB)
31 09:56:33.529654 progress 50 % (18 MB)
32 09:56:33.540835 progress 55 % (20 MB)
33 09:56:33.551835 progress 60 % (22 MB)
34 09:56:33.563017 progress 65 % (24 MB)
35 09:56:33.574109 progress 70 % (26 MB)
36 09:56:33.585343 progress 75 % (27 MB)
37 09:56:33.596350 progress 80 % (29 MB)
38 09:56:33.607544 progress 85 % (31 MB)
39 09:56:33.618498 progress 90 % (33 MB)
40 09:56:33.629395 progress 95 % (35 MB)
41 09:56:33.640198 progress 100 % (37 MB)
42 09:56:33.640517 37 MB downloaded in 0.25 s (148.68 MB/s)
43 09:56:33.640691 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:56:33.640971 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:56:33.641073 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:56:33.641168 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:56:33.641318 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 09:56:33.641402 saving as /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/kernel/Image
50 09:56:33.641472 total size: 54813184 (52 MB)
51 09:56:33.641543 No compression specified
52 09:56:33.642765 progress 0 % (0 MB)
53 09:56:33.658176 progress 5 % (2 MB)
54 09:56:33.673868 progress 10 % (5 MB)
55 09:56:33.689416 progress 15 % (7 MB)
56 09:56:33.705030 progress 20 % (10 MB)
57 09:56:33.720619 progress 25 % (13 MB)
58 09:56:33.735981 progress 30 % (15 MB)
59 09:56:33.751528 progress 35 % (18 MB)
60 09:56:33.767128 progress 40 % (20 MB)
61 09:56:33.782540 progress 45 % (23 MB)
62 09:56:33.798259 progress 50 % (26 MB)
63 09:56:33.813863 progress 55 % (28 MB)
64 09:56:33.829213 progress 60 % (31 MB)
65 09:56:33.844783 progress 65 % (34 MB)
66 09:56:33.860227 progress 70 % (36 MB)
67 09:56:33.875900 progress 75 % (39 MB)
68 09:56:33.891539 progress 80 % (41 MB)
69 09:56:33.906999 progress 85 % (44 MB)
70 09:56:33.922607 progress 90 % (47 MB)
71 09:56:33.938049 progress 95 % (49 MB)
72 09:56:33.953162 progress 100 % (52 MB)
73 09:56:33.953423 52 MB downloaded in 0.31 s (167.57 MB/s)
74 09:56:33.953589 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:56:33.953850 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:56:33.953949 start: 1.3 download-retry (timeout 00:09:59) [common]
78 09:56:33.954044 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 09:56:33.954194 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 09:56:33.954282 saving as /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 09:56:33.954351 total size: 57695 (0 MB)
82 09:56:33.954421 No compression specified
83 09:56:33.955640 progress 56 % (0 MB)
84 09:56:33.955951 progress 100 % (0 MB)
85 09:56:33.956175 0 MB downloaded in 0.00 s (30.21 MB/s)
86 09:56:33.956314 end: 1.3.1 http-download (duration 00:00:00) [common]
88 09:56:33.956565 end: 1.3 download-retry (duration 00:00:00) [common]
89 09:56:33.956661 start: 1.4 download-retry (timeout 00:09:59) [common]
90 09:56:33.956755 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 09:56:33.956881 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 09:56:33.956959 saving as /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/modules/modules.tar
93 09:56:33.957027 total size: 8619356 (8 MB)
94 09:56:33.957097 Using unxz to decompress xz
95 09:56:33.961483 progress 0 % (0 MB)
96 09:56:33.983369 progress 5 % (0 MB)
97 09:56:34.010363 progress 10 % (0 MB)
98 09:56:34.038236 progress 15 % (1 MB)
99 09:56:34.065438 progress 20 % (1 MB)
100 09:56:34.093530 progress 25 % (2 MB)
101 09:56:34.120900 progress 30 % (2 MB)
102 09:56:34.148401 progress 35 % (2 MB)
103 09:56:34.175359 progress 40 % (3 MB)
104 09:56:34.202573 progress 45 % (3 MB)
105 09:56:34.228978 progress 50 % (4 MB)
106 09:56:34.256174 progress 55 % (4 MB)
107 09:56:34.282940 progress 60 % (4 MB)
108 09:56:34.309041 progress 65 % (5 MB)
109 09:56:34.340020 progress 70 % (5 MB)
110 09:56:34.368624 progress 75 % (6 MB)
111 09:56:34.394973 progress 80 % (6 MB)
112 09:56:34.420964 progress 85 % (7 MB)
113 09:56:34.447001 progress 90 % (7 MB)
114 09:56:34.478254 progress 95 % (7 MB)
115 09:56:34.511860 progress 100 % (8 MB)
116 09:56:34.516997 8 MB downloaded in 0.56 s (14.68 MB/s)
117 09:56:34.517262 end: 1.4.1 http-download (duration 00:00:01) [common]
119 09:56:34.517557 end: 1.4 download-retry (duration 00:00:01) [common]
120 09:56:34.517661 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 09:56:34.517767 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 09:56:34.517859 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 09:56:34.517956 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 09:56:34.518208 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0
125 09:56:34.518357 makedir: /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin
126 09:56:34.518472 makedir: /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/tests
127 09:56:34.518580 makedir: /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/results
128 09:56:34.518709 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-add-keys
129 09:56:34.518867 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-add-sources
130 09:56:34.519010 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-background-process-start
131 09:56:34.519153 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-background-process-stop
132 09:56:34.519290 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-common-functions
133 09:56:34.519437 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-echo-ipv4
134 09:56:34.519574 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-install-packages
135 09:56:34.519713 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-installed-packages
136 09:56:34.519847 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-os-build
137 09:56:34.519982 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-probe-channel
138 09:56:34.520117 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-probe-ip
139 09:56:34.520252 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-target-ip
140 09:56:34.520387 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-target-mac
141 09:56:34.520521 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-target-storage
142 09:56:34.520660 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-case
143 09:56:34.520845 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-event
144 09:56:34.520987 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-feedback
145 09:56:34.521128 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-raise
146 09:56:34.521263 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-reference
147 09:56:34.521400 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-runner
148 09:56:34.521535 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-set
149 09:56:34.521674 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-test-shell
150 09:56:34.521816 Updating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-install-packages (oe)
151 09:56:34.521979 Updating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/bin/lava-installed-packages (oe)
152 09:56:34.522110 Creating /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/environment
153 09:56:34.522219 LAVA metadata
154 09:56:34.522302 - LAVA_JOB_ID=14407621
155 09:56:34.522375 - LAVA_DISPATCHER_IP=192.168.201.1
156 09:56:34.522488 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 09:56:34.522567 skipped lava-vland-overlay
158 09:56:34.522648 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 09:56:34.522739 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 09:56:34.522818 skipped lava-multinode-overlay
161 09:56:34.522898 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 09:56:34.522993 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 09:56:34.523078 Loading test definitions
164 09:56:34.523180 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 09:56:34.523264 Using /lava-14407621 at stage 0
166 09:56:34.523622 uuid=14407621_1.5.2.3.1 testdef=None
167 09:56:34.523720 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 09:56:34.523821 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 09:56:34.524418 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 09:56:34.524665 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 09:56:34.525331 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 09:56:34.525597 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 09:56:34.526245 runner path: /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/0/tests/0_cros-ec test_uuid 14407621_1.5.2.3.1
176 09:56:34.526417 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 09:56:34.526646 Creating lava-test-runner.conf files
179 09:56:34.526717 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407621/lava-overlay-j5mnzyj0/lava-14407621/0 for stage 0
180 09:56:34.526817 - 0_cros-ec
181 09:56:34.526926 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 09:56:34.527024 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 09:56:34.534927 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 09:56:34.535042 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 09:56:34.535139 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 09:56:34.535236 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 09:56:34.535331 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 09:56:35.862188 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 09:56:35.862623 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 09:56:35.862759 extracting modules file /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407621/extract-overlay-ramdisk-h2u0uuoy/ramdisk
191 09:56:36.105029 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 09:56:36.105212 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 09:56:36.105318 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407621/compress-overlay-hs1gnmsc/overlay-1.5.2.4.tar.gz to ramdisk
194 09:56:36.105400 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407621/compress-overlay-hs1gnmsc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407621/extract-overlay-ramdisk-h2u0uuoy/ramdisk
195 09:56:36.112665 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 09:56:36.112788 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 09:56:36.112892 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 09:56:36.112988 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 09:56:36.113074 Building ramdisk /var/lib/lava/dispatcher/tmp/14407621/extract-overlay-ramdisk-h2u0uuoy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407621/extract-overlay-ramdisk-h2u0uuoy/ramdisk
200 09:56:37.025301 >> 336002 blocks
201 09:56:42.787731 rename /var/lib/lava/dispatcher/tmp/14407621/extract-overlay-ramdisk-h2u0uuoy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/ramdisk/ramdisk.cpio.gz
202 09:56:42.788229 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 09:56:42.788372 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
204 09:56:42.788489 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
205 09:56:42.788621 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/kernel/Image']
206 09:56:56.881667 Returned 0 in 14 seconds
207 09:56:56.982675 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/kernel/image.itb
208 09:56:57.829836 output: FIT description: Kernel Image image with one or more FDT blobs
209 09:56:57.830257 output: Created: Tue Jun 18 10:56:57 2024
210 09:56:57.830346 output: Image 0 (kernel-1)
211 09:56:57.830420 output: Description:
212 09:56:57.830492 output: Created: Tue Jun 18 10:56:57 2024
213 09:56:57.830562 output: Type: Kernel Image
214 09:56:57.830631 output: Compression: lzma compressed
215 09:56:57.830700 output: Data Size: 13126726 Bytes = 12819.07 KiB = 12.52 MiB
216 09:56:57.830763 output: Architecture: AArch64
217 09:56:57.830826 output: OS: Linux
218 09:56:57.830889 output: Load Address: 0x00000000
219 09:56:57.830953 output: Entry Point: 0x00000000
220 09:56:57.831018 output: Hash algo: crc32
221 09:56:57.831079 output: Hash value: 4137a6e7
222 09:56:57.831146 output: Image 1 (fdt-1)
223 09:56:57.831211 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 09:56:57.831278 output: Created: Tue Jun 18 10:56:57 2024
225 09:56:57.831362 output: Type: Flat Device Tree
226 09:56:57.831482 output: Compression: uncompressed
227 09:56:57.831564 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 09:56:57.831629 output: Architecture: AArch64
229 09:56:57.831691 output: Hash algo: crc32
230 09:56:57.831751 output: Hash value: a9713552
231 09:56:57.831811 output: Image 2 (ramdisk-1)
232 09:56:57.831871 output: Description: unavailable
233 09:56:57.831931 output: Created: Tue Jun 18 10:56:57 2024
234 09:56:57.831991 output: Type: RAMDisk Image
235 09:56:57.832052 output: Compression: Unknown Compression
236 09:56:57.832111 output: Data Size: 52146804 Bytes = 50924.61 KiB = 49.73 MiB
237 09:56:57.832172 output: Architecture: AArch64
238 09:56:57.832231 output: OS: Linux
239 09:56:57.832291 output: Load Address: unavailable
240 09:56:57.832351 output: Entry Point: unavailable
241 09:56:57.832410 output: Hash algo: crc32
242 09:56:57.832471 output: Hash value: e756cee3
243 09:56:57.832530 output: Default Configuration: 'conf-1'
244 09:56:57.832590 output: Configuration 0 (conf-1)
245 09:56:57.832649 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 09:56:57.832709 output: Kernel: kernel-1
247 09:56:57.832769 output: Init Ramdisk: ramdisk-1
248 09:56:57.832828 output: FDT: fdt-1
249 09:56:57.832888 output: Loadables: kernel-1
250 09:56:57.832948 output:
251 09:56:57.833182 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 09:56:57.833292 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 09:56:57.833416 end: 1.5 prepare-tftp-overlay (duration 00:00:23) [common]
254 09:56:57.833520 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
255 09:56:57.833612 No LXC device requested
256 09:56:57.833703 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 09:56:57.833799 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
258 09:56:57.833887 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 09:56:57.833965 Checking files for TFTP limit of 4294967296 bytes.
260 09:56:57.834563 end: 1 tftp-deploy (duration 00:00:24) [common]
261 09:56:57.834686 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 09:56:57.834793 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 09:56:57.834934 substitutions:
264 09:56:57.835010 - {DTB}: 14407621/tftp-deploy-ah9_vzaf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 09:56:57.835084 - {INITRD}: 14407621/tftp-deploy-ah9_vzaf/ramdisk/ramdisk.cpio.gz
266 09:56:57.835154 - {KERNEL}: 14407621/tftp-deploy-ah9_vzaf/kernel/Image
267 09:56:57.835220 - {LAVA_MAC}: None
268 09:56:57.835285 - {PRESEED_CONFIG}: None
269 09:56:57.835348 - {PRESEED_LOCAL}: None
270 09:56:57.835419 - {RAMDISK}: 14407621/tftp-deploy-ah9_vzaf/ramdisk/ramdisk.cpio.gz
271 09:56:57.835486 - {ROOT_PART}: None
272 09:56:57.835548 - {ROOT}: None
273 09:56:57.835611 - {SERVER_IP}: 192.168.201.1
274 09:56:57.835673 - {TEE}: None
275 09:56:57.835734 Parsed boot commands:
276 09:56:57.835795 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 09:56:57.835993 Parsed boot commands: tftpboot 192.168.201.1 14407621/tftp-deploy-ah9_vzaf/kernel/image.itb 14407621/tftp-deploy-ah9_vzaf/kernel/cmdline
278 09:56:57.836094 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 09:56:57.836193 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 09:56:57.836296 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 09:56:57.836395 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 09:56:57.836473 Not connected, no need to disconnect.
283 09:56:57.836557 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 09:56:57.836686 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 09:56:57.836811 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 09:56:57.840821 Setting prompt string to ['lava-test: # ']
287 09:56:57.841236 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 09:56:57.841351 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 09:56:57.841462 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 09:56:57.841566 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 09:56:57.841818 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
292 09:57:21.490836 Returned 0 in 23 seconds
293 09:57:21.592368 end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
295 09:57:21.593962 end: 2.2.2 reset-device (duration 00:00:24) [common]
296 09:57:21.594529 start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
297 09:57:21.595020 Setting prompt string to 'Starting depthcharge on Juniper...'
298 09:57:21.595573 Changing prompt to 'Starting depthcharge on Juniper...'
299 09:57:21.595969 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 09:57:21.598150 [Enter `^Ec?' for help]
301 09:57:21.598617 [DL] 00000000 00000000 010701
302 09:57:21.599011
303 09:57:21.599396
304 09:57:21.599890 F0: 102B 0000
305 09:57:21.600379
306 09:57:21.600732 F3: 1006 0033 [0200]
307 09:57:21.601068
308 09:57:21.601386 F3: 4001 00E0 [0200]
309 09:57:21.601709
310 09:57:21.601988 F3: 0000 0000
311 09:57:21.602267
312 09:57:21.602543 V0: 0000 0000 [0001]
313 09:57:21.602819
314 09:57:21.603093 00: 1027 0002
315 09:57:21.603387
316 09:57:21.603708 01: 0000 0000
317 09:57:21.603995
318 09:57:21.604271 BP: 0C00 0251 [0000]
319 09:57:21.604544
320 09:57:21.604851 G0: 1182 0000
321 09:57:21.605135
322 09:57:21.605408 EC: 0004 0000 [0001]
323 09:57:21.605682
324 09:57:21.605954 S7: 0000 0000 [0000]
325 09:57:21.606228
326 09:57:21.606498 CC: 0000 0000 [0001]
327 09:57:21.606771
328 09:57:21.607160 T0: 0000 00DB [000F]
329 09:57:21.607633
330 09:57:21.607930 Jump to BL
331 09:57:21.608209
332 09:57:21.608487
333 09:57:21.608874
334 09:57:21.609161 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 09:57:21.609459 ARM64: Exception handlers installed.
336 09:57:21.609738 ARM64: Testing exception
337 09:57:21.610013 ARM64: Done test exception
338 09:57:21.610289 WDT: Last reset was cold boot
339 09:57:21.610564 SPI0(PAD0) initialized at 992727 Hz
340 09:57:21.610838 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 09:57:21.611116 Manufacturer: ef
342 09:57:21.611390 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 09:57:21.611848 Probing TPM: . done!
344 09:57:21.612139 TPM ready after 0 ms
345 09:57:21.612426 Connected to device vid:did:rid of 1ae0:0028:00
346 09:57:21.612704 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 09:57:21.612985 Initialized TPM device CR50 revision 0
348 09:57:21.613259 tlcl_send_startup: Startup return code is 0
349 09:57:21.613536 TPM: setup succeeded
350 09:57:21.613811 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 09:57:21.614083 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 09:57:21.614358 in-header: 03 19 00 00 08 00 00 00
353 09:57:21.614631 in-data: a2 e0 47 00 13 00 00 00
354 09:57:21.614904 Chrome EC: UHEPI supported
355 09:57:21.615174 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 09:57:21.615495 in-header: 03 a1 00 00 08 00 00 00
357 09:57:21.615780 in-data: 84 60 60 10 00 00 00 00
358 09:57:21.616052 Phase 1
359 09:57:21.616324 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 09:57:21.616600 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 09:57:21.616875 VB2:vb2_check_recovery() Recovery was requested manually
362 09:57:21.617147 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 09:57:21.617420 Recovery requested (1009000e)
364 09:57:21.617692 tlcl_extend: response is 0
365 09:57:21.617966 tlcl_extend: response is 0
366 09:57:21.618236
367 09:57:21.618509
368 09:57:21.618780 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 09:57:21.619057 ARM64: Exception handlers installed.
370 09:57:21.619328 ARM64: Testing exception
371 09:57:21.619623 ARM64: Done test exception
372 09:57:21.619895 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2014
373 09:57:21.620171 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 09:57:21.620444 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 09:57:21.620717 [RTC]rtc_get_frequency_meter,134: input=0xf, output=912
376 09:57:21.620989 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
377 09:57:21.621261 [RTC]rtc_get_frequency_meter,134: input=0xb, output=847
378 09:57:21.621534 [RTC]rtc_get_frequency_meter,134: input=0x9, output=814
379 09:57:21.621754 [RTC]rtc_get_frequency_meter,134: input=0x8, output=795
380 09:57:21.621948 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
381 09:57:21.622141 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 09:57:21.622334 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 09:57:21.622527 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 09:57:21.622722 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 09:57:21.622916 in-header: 03 19 00 00 08 00 00 00
386 09:57:21.623111 in-data: a2 e0 47 00 13 00 00 00
387 09:57:21.623304 Chrome EC: UHEPI supported
388 09:57:21.623515 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 09:57:21.623713 in-header: 03 a1 00 00 08 00 00 00
390 09:57:21.623905 in-data: 84 60 60 10 00 00 00 00
391 09:57:21.624097 Skip loading cached calibration data
392 09:57:21.624290 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 09:57:21.624484 in-header: 03 a1 00 00 08 00 00 00
394 09:57:21.624676 in-data: 84 60 60 10 00 00 00 00
395 09:57:21.624871 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 09:57:21.625065 in-header: 03 a1 00 00 08 00 00 00
397 09:57:21.625307 in-data: 84 60 60 10 00 00 00 00
398 09:57:21.625518 ADC[3]: Raw value=216571 ID=1
399 09:57:21.625713 Manufacturer: ef
400 09:57:21.625908 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 09:57:21.626106 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 09:57:21.626303 CBFS @ 21000 size 3d4000
403 09:57:21.626498 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 09:57:21.626675 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 09:57:21.626823 CBFS: Found @ offset 3c700 size 44
406 09:57:21.626969 DRAM-K: Full Calibration
407 09:57:21.627116 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 09:57:21.627263 CBFS @ 21000 size 3d4000
409 09:57:21.627427 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 09:57:21.627580 CBFS: Locating 'fallback/dram'
411 09:57:21.627728 CBFS: Found @ offset 24b00 size 12268
412 09:57:21.627875 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
413 09:57:21.628024 ddr_geometry: 1, config: 0x0
414 09:57:21.628171 header.status = 0x0
415 09:57:21.628317 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 09:57:21.628463 header.version = 0x5 (expected: 0x5)
417 09:57:21.628610 header.size = 0x8f0 (expected: 0x8f0)
418 09:57:21.628756 header.config = 0x0
419 09:57:21.628902 header.flags = 0x0
420 09:57:21.629047 header.checksum = 0x0
421 09:57:21.629447 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 09:57:21.629626 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 09:57:21.629780 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 09:57:21.629930 ddr_geometry:1
425 09:57:21.630079 [EMI] new MDL number = 1
426 09:57:21.630227 dram_cbt_mode_extern: 0
427 09:57:21.630374 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 09:57:21.630523 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 09:57:21.630669
430 09:57:21.630816
431 09:57:21.631002 [Bianco] ETT version 0.0.0.1
432 09:57:21.631152 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 09:57:21.631302
434 09:57:21.631467 vSetVcoreByFreq with vcore:762500, freq=1600
435 09:57:21.631628
436 09:57:21.631746 [DramcInit]
437 09:57:21.631865 AutoRefreshCKEOff AutoREF OFF
438 09:57:21.631984 DDRPhyPLLSetting-CKEOFF
439 09:57:21.632100 DDRPhyPLLSetting-CKEON
440 09:57:21.632215
441 09:57:21.632333 Enable WDQS
442 09:57:21.632450 [ModeRegInit_LP4] CH0 RK0
443 09:57:21.632568 Write Rank0 MR13 =0x18
444 09:57:21.632684 Write Rank0 MR12 =0x5d
445 09:57:21.632801 Write Rank0 MR1 =0x56
446 09:57:21.632940 Write Rank0 MR2 =0x1a
447 09:57:21.633069 Write Rank0 MR11 =0x0
448 09:57:21.633186 Write Rank0 MR22 =0x38
449 09:57:21.633303 Write Rank0 MR14 =0x5d
450 09:57:21.633420 Write Rank0 MR3 =0x30
451 09:57:21.633537 Write Rank0 MR13 =0x58
452 09:57:21.633653 Write Rank0 MR12 =0x5d
453 09:57:21.633769 Write Rank0 MR1 =0x56
454 09:57:21.633885 Write Rank0 MR2 =0x2d
455 09:57:21.634002 Write Rank0 MR11 =0x23
456 09:57:21.634118 Write Rank0 MR22 =0x34
457 09:57:21.634235 Write Rank0 MR14 =0x10
458 09:57:21.634351 Write Rank0 MR3 =0x30
459 09:57:21.634468 Write Rank0 MR13 =0xd8
460 09:57:21.634584 [ModeRegInit_LP4] CH0 RK1
461 09:57:21.634700 Write Rank1 MR13 =0x18
462 09:57:21.634816 Write Rank1 MR12 =0x5d
463 09:57:21.634963 Write Rank1 MR1 =0x56
464 09:57:21.635084 Write Rank1 MR2 =0x1a
465 09:57:21.635202 Write Rank1 MR11 =0x0
466 09:57:21.635318 Write Rank1 MR22 =0x38
467 09:57:21.635450 Write Rank1 MR14 =0x5d
468 09:57:21.635569 Write Rank1 MR3 =0x30
469 09:57:21.635685 Write Rank1 MR13 =0x58
470 09:57:21.635802 Write Rank1 MR12 =0x5d
471 09:57:21.635919 Write Rank1 MR1 =0x56
472 09:57:21.636036 Write Rank1 MR2 =0x2d
473 09:57:21.636153 Write Rank1 MR11 =0x23
474 09:57:21.636270 Write Rank1 MR22 =0x34
475 09:57:21.636385 Write Rank1 MR14 =0x10
476 09:57:21.636502 Write Rank1 MR3 =0x30
477 09:57:21.636623 Write Rank1 MR13 =0xd8
478 09:57:21.636720 [ModeRegInit_LP4] CH1 RK0
479 09:57:21.636816 Write Rank0 MR13 =0x18
480 09:57:21.636913 Write Rank0 MR12 =0x5d
481 09:57:21.637010 Write Rank0 MR1 =0x56
482 09:57:21.637107 Write Rank0 MR2 =0x1a
483 09:57:21.637203 Write Rank0 MR11 =0x0
484 09:57:21.637301 Write Rank0 MR22 =0x38
485 09:57:21.637398 Write Rank0 MR14 =0x5d
486 09:57:21.637495 Write Rank0 MR3 =0x30
487 09:57:21.637591 Write Rank0 MR13 =0x58
488 09:57:21.637688 Write Rank0 MR12 =0x5d
489 09:57:21.637785 Write Rank0 MR1 =0x56
490 09:57:21.637883 Write Rank0 MR2 =0x2d
491 09:57:21.637980 Write Rank0 MR11 =0x23
492 09:57:21.638077 Write Rank0 MR22 =0x34
493 09:57:21.638175 Write Rank0 MR14 =0x10
494 09:57:21.638272 Write Rank0 MR3 =0x30
495 09:57:21.638369 Write Rank0 MR13 =0xd8
496 09:57:21.638466 [ModeRegInit_LP4] CH1 RK1
497 09:57:21.638563 Write Rank1 MR13 =0x18
498 09:57:21.638659 Write Rank1 MR12 =0x5d
499 09:57:21.638756 Write Rank1 MR1 =0x56
500 09:57:21.638853 Write Rank1 MR2 =0x1a
501 09:57:21.638950 Write Rank1 MR11 =0x0
502 09:57:21.639047 Write Rank1 MR22 =0x38
503 09:57:21.639144 Write Rank1 MR14 =0x5d
504 09:57:21.639241 Write Rank1 MR3 =0x30
505 09:57:21.639338 Write Rank1 MR13 =0x58
506 09:57:21.639442 Write Rank1 MR12 =0x5d
507 09:57:21.639540 Write Rank1 MR1 =0x56
508 09:57:21.639636 Write Rank1 MR2 =0x2d
509 09:57:21.639733 Write Rank1 MR11 =0x23
510 09:57:21.639828 Write Rank1 MR22 =0x34
511 09:57:21.639924 Write Rank1 MR14 =0x10
512 09:57:21.640022 Write Rank1 MR3 =0x30
513 09:57:21.640119 Write Rank1 MR13 =0xd8
514 09:57:21.640216 match AC timing 3
515 09:57:21.640315 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 09:57:21.640414 [MiockJmeterHQA]
517 09:57:21.640512 vSetVcoreByFreq with vcore:762500, freq=1600
518 09:57:21.640609
519 09:57:21.640708 MIOCK jitter meter ch=0
520 09:57:21.640806
521 09:57:21.640904 1T = (102-17) = 85 dly cells
522 09:57:21.641005 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
523 09:57:21.641105 vSetVcoreByFreq with vcore:725000, freq=1200
524 09:57:21.641203
525 09:57:21.641300 MIOCK jitter meter ch=0
526 09:57:21.641397
527 09:57:21.641496 1T = (97-16) = 81 dly cells
528 09:57:21.641609 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
529 09:57:21.641693 vSetVcoreByFreq with vcore:725000, freq=800
530 09:57:21.641777
531 09:57:21.641861 MIOCK jitter meter ch=0
532 09:57:21.641944
533 09:57:21.642028 1T = (97-16) = 81 dly cells
534 09:57:21.642114 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
535 09:57:21.642199 vSetVcoreByFreq with vcore:762500, freq=1600
536 09:57:21.642284 vSetVcoreByFreq with vcore:762500, freq=1600
537 09:57:21.642367
538 09:57:21.642451 K DRVP
539 09:57:21.642535 1. OCD DRVP=0 CALOUT=0
540 09:57:21.642621 1. OCD DRVP=1 CALOUT=0
541 09:57:21.642708 1. OCD DRVP=2 CALOUT=0
542 09:57:21.642795 1. OCD DRVP=3 CALOUT=0
543 09:57:21.642888 1. OCD DRVP=4 CALOUT=0
544 09:57:21.642977 1. OCD DRVP=5 CALOUT=0
545 09:57:21.643063 1. OCD DRVP=6 CALOUT=0
546 09:57:21.643149 1. OCD DRVP=7 CALOUT=0
547 09:57:21.643234 1. OCD DRVP=8 CALOUT=0
548 09:57:21.643319 1. OCD DRVP=9 CALOUT=1
549 09:57:21.643410
550 09:57:21.643496 1. OCD DRVP calibration OK! DRVP=9
551 09:57:21.643584
552 09:57:21.643668
553 09:57:21.643753
554 09:57:21.643839 K ODTN
555 09:57:21.643923 3. OCD ODTN=0 ,CALOUT=1
556 09:57:21.644014 3. OCD ODTN=1 ,CALOUT=1
557 09:57:21.644100 3. OCD ODTN=2 ,CALOUT=1
558 09:57:21.644186 3. OCD ODTN=3 ,CALOUT=1
559 09:57:21.644272 3. OCD ODTN=4 ,CALOUT=1
560 09:57:21.644358 3. OCD ODTN=5 ,CALOUT=1
561 09:57:21.644444 3. OCD ODTN=6 ,CALOUT=1
562 09:57:21.644529 3. OCD ODTN=7 ,CALOUT=0
563 09:57:21.644615
564 09:57:21.644699 3. OCD ODTN calibration OK! ODTN=7
565 09:57:21.644785
566 09:57:21.644869 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
567 09:57:21.644954 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
568 09:57:21.645039 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
569 09:57:21.645124
570 09:57:21.645208 K DRVP
571 09:57:21.645292 1. OCD DRVP=0 CALOUT=0
572 09:57:21.645379 1. OCD DRVP=1 CALOUT=0
573 09:57:21.645465 1. OCD DRVP=2 CALOUT=0
574 09:57:21.645551 1. OCD DRVP=3 CALOUT=0
575 09:57:21.645637 1. OCD DRVP=4 CALOUT=0
576 09:57:21.645722 1. OCD DRVP=5 CALOUT=0
577 09:57:21.645808 1. OCD DRVP=6 CALOUT=0
578 09:57:21.645893 1. OCD DRVP=7 CALOUT=0
579 09:57:21.645978 1. OCD DRVP=8 CALOUT=0
580 09:57:21.646065 1. OCD DRVP=9 CALOUT=0
581 09:57:21.646151 1. OCD DRVP=10 CALOUT=0
582 09:57:21.646237 1. OCD DRVP=11 CALOUT=1
583 09:57:21.646323
584 09:57:21.646407 1. OCD DRVP calibration OK! DRVP=11
585 09:57:21.646493
586 09:57:21.646589
587 09:57:21.646663
588 09:57:21.646736 K ODTN
589 09:57:21.646810 3. OCD ODTN=0 ,CALOUT=1
590 09:57:21.647100 3. OCD ODTN=1 ,CALOUT=1
591 09:57:21.647197 3. OCD ODTN=2 ,CALOUT=1
592 09:57:21.647278 3. OCD ODTN=3 ,CALOUT=1
593 09:57:21.647363 3. OCD ODTN=4 ,CALOUT=1
594 09:57:21.647470 3. OCD ODTN=5 ,CALOUT=1
595 09:57:21.647550 3. OCD ODTN=6 ,CALOUT=1
596 09:57:21.647626 3. OCD ODTN=7 ,CALOUT=1
597 09:57:21.647703 3. OCD ODTN=8 ,CALOUT=1
598 09:57:21.647779 3. OCD ODTN=9 ,CALOUT=1
599 09:57:21.647855 3. OCD ODTN=10 ,CALOUT=1
600 09:57:21.647931 3. OCD ODTN=11 ,CALOUT=1
601 09:57:21.648007 3. OCD ODTN=12 ,CALOUT=1
602 09:57:21.648083 3. OCD ODTN=13 ,CALOUT=1
603 09:57:21.648159 3. OCD ODTN=14 ,CALOUT=1
604 09:57:21.648234 3. OCD ODTN=15 ,CALOUT=0
605 09:57:21.648309
606 09:57:21.648384 3. OCD ODTN calibration OK! ODTN=15
607 09:57:21.648460
608 09:57:21.648534 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
609 09:57:21.648609 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
610 09:57:21.648683 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
611 09:57:21.648757
612 09:57:21.648831 [DramcInit]
613 09:57:21.648905 AutoRefreshCKEOff AutoREF OFF
614 09:57:21.648979 DDRPhyPLLSetting-CKEOFF
615 09:57:21.649051 DDRPhyPLLSetting-CKEON
616 09:57:21.649124
617 09:57:21.649197 Enable WDQS
618 09:57:21.649270 ==
619 09:57:21.649343 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 09:57:21.649417 fsp= 1, odt_onoff= 1, Byte mode= 0
621 09:57:21.649491 ==
622 09:57:21.649565 [Duty_Offset_Calibration]
623 09:57:21.649638
624 09:57:21.649712 ===========================
625 09:57:21.649786 B0:1 B1:1 CA:1
626 09:57:21.649859 ==
627 09:57:21.649933 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 09:57:21.650007 fsp= 1, odt_onoff= 1, Byte mode= 0
629 09:57:21.650082 ==
630 09:57:21.650156 [Duty_Offset_Calibration]
631 09:57:21.650229
632 09:57:21.650337 ===========================
633 09:57:21.650415 B0:1 B1:0 CA:2
634 09:57:21.650490 [ModeRegInit_LP4] CH0 RK0
635 09:57:21.650564 Write Rank0 MR13 =0x18
636 09:57:21.650639 Write Rank0 MR12 =0x5d
637 09:57:21.650713 Write Rank0 MR1 =0x56
638 09:57:21.650786 Write Rank0 MR2 =0x1a
639 09:57:21.650860 Write Rank0 MR11 =0x0
640 09:57:21.650934 Write Rank0 MR22 =0x38
641 09:57:21.651007 Write Rank0 MR14 =0x5d
642 09:57:21.651081 Write Rank0 MR3 =0x30
643 09:57:21.651154 Write Rank0 MR13 =0x58
644 09:57:21.651227 Write Rank0 MR12 =0x5d
645 09:57:21.651300 Write Rank0 MR1 =0x56
646 09:57:21.651373 Write Rank0 MR2 =0x2d
647 09:57:21.651460 Write Rank0 MR11 =0x23
648 09:57:21.651535 Write Rank0 MR22 =0x34
649 09:57:21.651609 Write Rank0 MR14 =0x10
650 09:57:21.651690 Write Rank0 MR3 =0x30
651 09:57:21.651756 Write Rank0 MR13 =0xd8
652 09:57:21.651821 [ModeRegInit_LP4] CH0 RK1
653 09:57:21.651886 Write Rank1 MR13 =0x18
654 09:57:21.651951 Write Rank1 MR12 =0x5d
655 09:57:21.652016 Write Rank1 MR1 =0x56
656 09:57:21.652081 Write Rank1 MR2 =0x1a
657 09:57:21.652146 Write Rank1 MR11 =0x0
658 09:57:21.652211 Write Rank1 MR22 =0x38
659 09:57:21.652276 Write Rank1 MR14 =0x5d
660 09:57:21.652341 Write Rank1 MR3 =0x30
661 09:57:21.652407 Write Rank1 MR13 =0x58
662 09:57:21.652472 Write Rank1 MR12 =0x5d
663 09:57:21.652537 Write Rank1 MR1 =0x56
664 09:57:21.652602 Write Rank1 MR2 =0x2d
665 09:57:21.652667 Write Rank1 MR11 =0x23
666 09:57:21.652733 Write Rank1 MR22 =0x34
667 09:57:21.652799 Write Rank1 MR14 =0x10
668 09:57:21.652864 Write Rank1 MR3 =0x30
669 09:57:21.652930 Write Rank1 MR13 =0xd8
670 09:57:21.652995 [ModeRegInit_LP4] CH1 RK0
671 09:57:21.653061 Write Rank0 MR13 =0x18
672 09:57:21.653126 Write Rank0 MR12 =0x5d
673 09:57:21.653191 Write Rank0 MR1 =0x56
674 09:57:21.653256 Write Rank0 MR2 =0x1a
675 09:57:21.653320 Write Rank0 MR11 =0x0
676 09:57:21.653385 Write Rank0 MR22 =0x38
677 09:57:21.653450 Write Rank0 MR14 =0x5d
678 09:57:21.653527 Write Rank0 MR3 =0x30
679 09:57:21.653605 Write Rank0 MR13 =0x58
680 09:57:21.653672 Write Rank0 MR12 =0x5d
681 09:57:21.653738 Write Rank0 MR1 =0x56
682 09:57:21.653804 Write Rank0 MR2 =0x2d
683 09:57:21.653869 Write Rank0 MR11 =0x23
684 09:57:21.653934 Write Rank0 MR22 =0x34
685 09:57:21.654000 Write Rank0 MR14 =0x10
686 09:57:21.654065 Write Rank0 MR3 =0x30
687 09:57:21.654131 Write Rank0 MR13 =0xd8
688 09:57:21.654197 [ModeRegInit_LP4] CH1 RK1
689 09:57:21.654263 Write Rank1 MR13 =0x18
690 09:57:21.654328 Write Rank1 MR12 =0x5d
691 09:57:21.654394 Write Rank1 MR1 =0x56
692 09:57:21.654460 Write Rank1 MR2 =0x1a
693 09:57:21.654526 Write Rank1 MR11 =0x0
694 09:57:21.654592 Write Rank1 MR22 =0x38
695 09:57:21.654658 Write Rank1 MR14 =0x5d
696 09:57:21.654723 Write Rank1 MR3 =0x30
697 09:57:21.654788 Write Rank1 MR13 =0x58
698 09:57:21.654854 Write Rank1 MR12 =0x5d
699 09:57:21.654919 Write Rank1 MR1 =0x56
700 09:57:21.654983 Write Rank1 MR2 =0x2d
701 09:57:21.655048 Write Rank1 MR11 =0x23
702 09:57:21.655114 Write Rank1 MR22 =0x34
703 09:57:21.655179 Write Rank1 MR14 =0x10
704 09:57:21.655244 Write Rank1 MR3 =0x30
705 09:57:21.655309 Write Rank1 MR13 =0xd8
706 09:57:21.655375 match AC timing 3
707 09:57:21.655447 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 09:57:21.655514 DramC Write-DBI off
709 09:57:21.655584 DramC Read-DBI off
710 09:57:21.655650 Write Rank0 MR13 =0x59
711 09:57:21.655715 ==
712 09:57:21.655781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 09:57:21.655848 fsp= 1, odt_onoff= 1, Byte mode= 0
714 09:57:21.655914 ==
715 09:57:21.655980 === u2Vref_new: 0x56 --> 0x2d
716 09:57:21.656046 === u2Vref_new: 0x58 --> 0x38
717 09:57:21.656116 === u2Vref_new: 0x5a --> 0x39
718 09:57:21.656181 === u2Vref_new: 0x5c --> 0x3c
719 09:57:21.656247 === u2Vref_new: 0x5e --> 0x3d
720 09:57:21.656313 === u2Vref_new: 0x60 --> 0xa0
721 09:57:21.656379 [CA 0] Center 34 (6~63) winsize 58
722 09:57:21.656444 [CA 1] Center 36 (9~63) winsize 55
723 09:57:21.656510 [CA 2] Center 29 (0~59) winsize 60
724 09:57:21.656575 [CA 3] Center 25 (-2~52) winsize 55
725 09:57:21.656647 [CA 4] Center 25 (-2~53) winsize 56
726 09:57:21.656706 [CA 5] Center 30 (0~60) winsize 61
727 09:57:21.656764
728 09:57:21.656823 [CATrainingPosCal] consider 1 rank data
729 09:57:21.656883 u2DelayCellTimex100 = 735/100 ps
730 09:57:21.656942 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
731 09:57:21.657001 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
732 09:57:21.657077 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
733 09:57:21.657143 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
734 09:57:21.657203 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
735 09:57:21.657262 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
736 09:57:21.657321
737 09:57:21.657381 CA PerBit enable=1, Macro0, CA PI delay=25
738 09:57:21.657440 === u2Vref_new: 0x60 --> 0xa0
739 09:57:21.657500
740 09:57:21.657559 Vref(ca) range 1: 32
741 09:57:21.657618
742 09:57:21.657677 CS Dly= 9 (40-0-32)
743 09:57:21.657736 Write Rank0 MR13 =0xd8
744 09:57:21.657795 Write Rank0 MR13 =0xd8
745 09:57:21.657853 Write Rank0 MR12 =0x60
746 09:57:21.657912 Write Rank1 MR13 =0x59
747 09:57:21.657971 ==
748 09:57:21.658030 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 09:57:21.658295 fsp= 1, odt_onoff= 1, Byte mode= 0
750 09:57:21.658364 ==
751 09:57:21.658425 === u2Vref_new: 0x56 --> 0x2d
752 09:57:21.658486 === u2Vref_new: 0x58 --> 0x38
753 09:57:21.658546 === u2Vref_new: 0x5a --> 0x39
754 09:57:21.658606 === u2Vref_new: 0x5c --> 0x3c
755 09:57:21.658666 === u2Vref_new: 0x5e --> 0x3d
756 09:57:21.658725 === u2Vref_new: 0x60 --> 0xa0
757 09:57:21.658784 [CA 0] Center 36 (9~63) winsize 55
758 09:57:21.658844 [CA 1] Center 36 (9~63) winsize 55
759 09:57:21.658903 [CA 2] Center 31 (2~60) winsize 59
760 09:57:21.658962 [CA 3] Center 25 (-3~54) winsize 58
761 09:57:21.659021 [CA 4] Center 25 (-3~54) winsize 58
762 09:57:21.659080 [CA 5] Center 31 (2~61) winsize 60
763 09:57:21.659139
764 09:57:21.659198 [CATrainingPosCal] consider 2 rank data
765 09:57:21.659257 u2DelayCellTimex100 = 735/100 ps
766 09:57:21.659316 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
767 09:57:21.659378 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
768 09:57:21.659446 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
769 09:57:21.659506 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
770 09:57:21.659565 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
771 09:57:21.659624 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
772 09:57:21.659683
773 09:57:21.659742 CA PerBit enable=1, Macro0, CA PI delay=25
774 09:57:21.659802 === u2Vref_new: 0x5c --> 0x3c
775 09:57:21.659861
776 09:57:21.659920 Vref(ca) range 1: 28
777 09:57:21.659980
778 09:57:21.660038 CS Dly= 7 (38-0-32)
779 09:57:21.660097 Write Rank1 MR13 =0xd8
780 09:57:21.660156 Write Rank1 MR13 =0xd8
781 09:57:21.660214 Write Rank1 MR12 =0x5c
782 09:57:21.660273 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 09:57:21.660332 Write Rank0 MR2 =0xad
784 09:57:21.660390 [Write Leveling]
785 09:57:21.660449 delay byte0 byte1 byte2 byte3
786 09:57:21.660518
787 09:57:21.660589 10 0 0
788 09:57:21.660649 11 0 0
789 09:57:21.660710 12 0 0
790 09:57:21.660770 13 0 0
791 09:57:21.660830 14 0 0
792 09:57:21.660889 15 0 0
793 09:57:21.660948 16 0 0
794 09:57:21.661008 17 0 0
795 09:57:21.661068 18 0 0
796 09:57:21.661127 19 0 0
797 09:57:21.661187 20 0 0
798 09:57:21.661246 21 0 0
799 09:57:21.661306 22 0 0
800 09:57:21.661366 23 0 ff
801 09:57:21.661425 24 0 ff
802 09:57:21.661484 25 0 ff
803 09:57:21.661544 26 0 ff
804 09:57:21.661603 27 0 ff
805 09:57:21.661663 28 0 ff
806 09:57:21.661723 29 0 ff
807 09:57:21.661782 30 0 ff
808 09:57:21.661842 31 0 ff
809 09:57:21.661902 32 ff ff
810 09:57:21.661961 33 ff ff
811 09:57:21.662021 34 ff ff
812 09:57:21.662080 35 ff ff
813 09:57:21.662140 36 ff ff
814 09:57:21.662199 37 ff ff
815 09:57:21.662259 38 ff ff
816 09:57:21.662318 pass bytecount = 0xff (0xff: all bytes pass)
817 09:57:21.662377
818 09:57:21.662439 DQS0 dly: 32
819 09:57:21.662498 DQS1 dly: 23
820 09:57:21.662557 Write Rank0 MR2 =0x2d
821 09:57:21.662616 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 09:57:21.662674 Write Rank0 MR1 =0xd6
823 09:57:21.662733 [Gating]
824 09:57:21.662792 ==
825 09:57:21.662852 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
826 09:57:21.662911 fsp= 1, odt_onoff= 1, Byte mode= 0
827 09:57:21.662971 ==
828 09:57:21.663030 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
829 09:57:21.663091 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
830 09:57:21.663152 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
831 09:57:21.663212 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
832 09:57:21.663272 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 09:57:21.663332 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 09:57:21.663392 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
835 09:57:21.663458 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
836 09:57:21.663518 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
837 09:57:21.663578 3 2 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
838 09:57:21.663639 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
839 09:57:21.663700 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 09:57:21.663760 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 09:57:21.663820 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
842 09:57:21.663905 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
843 09:57:21.663968 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 09:57:21.664029 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
845 09:57:21.664090 3 3 4 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
846 09:57:21.664150 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
847 09:57:21.664211 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
848 09:57:21.664271 [Byte 1] Lead/lag falling Transition (3, 3, 12)
849 09:57:21.664330 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 09:57:21.664391 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
851 09:57:21.664451 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
852 09:57:21.664511 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
853 09:57:21.664571 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
854 09:57:21.664632 3 4 4 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
855 09:57:21.664692 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 09:57:21.664752 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 09:57:21.664813 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 09:57:21.664873 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 09:57:21.664934 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 09:57:21.664994 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 09:57:21.665054 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 09:57:21.665114 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 09:57:21.665175 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 09:57:21.665235 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 09:57:21.665295 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 09:57:21.665355 [Byte 0] Lead/lag falling Transition (3, 5, 16)
867 09:57:21.665415 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
868 09:57:21.665475 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
869 09:57:21.665535 [Byte 0] Lead/lag Transition tap number (3)
870 09:57:21.665595 [Byte 1] Lead/lag falling Transition (3, 5, 24)
871 09:57:21.665654 3 5 28 |1616 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
872 09:57:21.665714 3 6 0 |4646 909 |(0 0)(11 11) |(0 0)(1 0)| 0
873 09:57:21.665971 [Byte 0]First pass (3, 6, 0)
874 09:57:21.666038 [Byte 1] Lead/lag Transition tap number (3)
875 09:57:21.666099 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
876 09:57:21.666161 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
877 09:57:21.666223 [Byte 1]First pass (3, 6, 8)
878 09:57:21.666283 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 09:57:21.666345 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 09:57:21.666406 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 09:57:21.666467 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 09:57:21.666527 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 09:57:21.666587 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 09:57:21.666647 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 09:57:21.666708 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 09:57:21.666769 All bytes gating window > 1UI, Early break!
887 09:57:21.666828
888 09:57:21.666887 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
889 09:57:21.666946
890 09:57:21.667005 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
891 09:57:21.667064
892 09:57:21.667123
893 09:57:21.667204
894 09:57:21.667310 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
895 09:57:21.667415
896 09:57:21.667481 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
897 09:57:21.667542
898 09:57:21.667601
899 09:57:21.667660 Write Rank0 MR1 =0x56
900 09:57:21.667718
901 09:57:21.667777 best RODT dly(2T, 0.5T) = (2, 2)
902 09:57:21.667836
903 09:57:21.667895 best RODT dly(2T, 0.5T) = (2, 2)
904 09:57:21.667954 ==
905 09:57:21.668013 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
906 09:57:21.668073 fsp= 1, odt_onoff= 1, Byte mode= 0
907 09:57:21.668133 ==
908 09:57:21.668192 Start DQ dly to find pass range UseTestEngine =0
909 09:57:21.668251 x-axis: bit #, y-axis: DQ dly (-127~63)
910 09:57:21.668311 RX Vref Scan = 0
911 09:57:21.668369 -26, [0] xxxxxxxx xxxxxxxx [MSB]
912 09:57:21.668430 -25, [0] xxxxxxxx xxxxxxxx [MSB]
913 09:57:21.668491 -24, [0] xxxxxxxx xxxxxxxx [MSB]
914 09:57:21.668551 -23, [0] xxxxxxxx xxxxxxxx [MSB]
915 09:57:21.668611 -22, [0] xxxxxxxx xxxxxxxx [MSB]
916 09:57:21.668671 -21, [0] xxxxxxxx xxxxxxxx [MSB]
917 09:57:21.668730 -20, [0] xxxxxxxx xxxxxxxx [MSB]
918 09:57:21.668791 -19, [0] xxxxxxxx xxxxxxxx [MSB]
919 09:57:21.668850 -18, [0] xxxxxxxx xxxxxxxx [MSB]
920 09:57:21.668911 -17, [0] xxxxxxxx xxxxxxxx [MSB]
921 09:57:21.668971 -16, [0] xxxxxxxx xxxxxxxx [MSB]
922 09:57:21.669031 -15, [0] xxxxxxxx xxxxxxxx [MSB]
923 09:57:21.669091 -14, [0] xxxxxxxx xxxxxxxx [MSB]
924 09:57:21.669150 -13, [0] xxxxxxxx xxxxxxxx [MSB]
925 09:57:21.669211 -12, [0] xxxxxxxx xxxxxxxx [MSB]
926 09:57:21.669271 -11, [0] xxxxxxxx xxxxxxxx [MSB]
927 09:57:21.669331 -10, [0] xxxxxxxx xxxxxxxx [MSB]
928 09:57:21.669390 -9, [0] xxxxxxxx xxxxxxxx [MSB]
929 09:57:21.669450 -8, [0] xxxxxxxx xxxxxxxx [MSB]
930 09:57:21.669511 -7, [0] xxxxxxxx xxxxxxxx [MSB]
931 09:57:21.669571 -6, [0] xxxxxxxx xxxxxxxx [MSB]
932 09:57:21.669631 -5, [0] xxxxxxxx xxxxxxxx [MSB]
933 09:57:21.669691 -4, [0] xxxxxxxx xxxxxxxx [MSB]
934 09:57:21.669751 -3, [0] xxxxxxxx oxxxxxxx [MSB]
935 09:57:21.669813 -2, [0] xxxxxxxx xxxxxxxx [MSB]
936 09:57:21.669873 -1, [0] xxxoxxxx oxxxxxxx [MSB]
937 09:57:21.669933 0, [0] xxxoxoxx ooxoxxxx [MSB]
938 09:57:21.669994 1, [0] xxxoxoxx ooxoxoxx [MSB]
939 09:57:21.670054 2, [0] xxxoxoox ooxoooxx [MSB]
940 09:57:21.670113 3, [0] xxxoxoox ooxoooxx [MSB]
941 09:57:21.670172 4, [0] xoooxooo ooxooooo [MSB]
942 09:57:21.670232 5, [0] xooooooo ooxooooo [MSB]
943 09:57:21.670296 6, [0] oooooooo ooxooooo [MSB]
944 09:57:21.670356 7, [0] oooooooo ooxooooo [MSB]
945 09:57:21.670415 32, [0] oooxoooo xooooooo [MSB]
946 09:57:21.670483 33, [0] oooxoooo xooooooo [MSB]
947 09:57:21.670558 34, [0] oooxoooo xooooooo [MSB]
948 09:57:21.670619 35, [0] oooxoooo xooooooo [MSB]
949 09:57:21.670678 36, [0] oooxoxox xooxoooo [MSB]
950 09:57:21.670738 37, [0] oooxoxxx xxoxxooo [MSB]
951 09:57:21.670797 38, [0] oooxoxxx xxoxxoxo [MSB]
952 09:57:21.670857 39, [0] oooxxxxx xxoxxxxo [MSB]
953 09:57:21.670917 40, [0] xxoxxxxx xxoxxxxo [MSB]
954 09:57:21.670976 41, [0] xxxxxxxx xxoxxxxo [MSB]
955 09:57:21.671035 42, [0] xxxxxxxx xxoxxxxx [MSB]
956 09:57:21.671094 43, [0] xxxxxxxx xxoxxxxx [MSB]
957 09:57:21.671153 44, [0] xxxxxxxx xxxxxxxx [MSB]
958 09:57:21.671212 iDelay=44, Bit 0, Center 22 (6 ~ 39) 34
959 09:57:21.671271 iDelay=44, Bit 1, Center 21 (4 ~ 39) 36
960 09:57:21.671329 iDelay=44, Bit 2, Center 22 (4 ~ 40) 37
961 09:57:21.671388 iDelay=44, Bit 3, Center 15 (-1 ~ 31) 33
962 09:57:21.671453 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
963 09:57:21.671512 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
964 09:57:21.671570 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
965 09:57:21.671629 iDelay=44, Bit 7, Center 19 (4 ~ 35) 32
966 09:57:21.671688 iDelay=44, Bit 8, Center 15 (-1 ~ 31) 33
967 09:57:21.671746 iDelay=44, Bit 9, Center 18 (0 ~ 36) 37
968 09:57:21.671805 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
969 09:57:21.671863 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
970 09:57:21.671922 iDelay=44, Bit 12, Center 19 (2 ~ 36) 35
971 09:57:21.671979 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
972 09:57:21.672038 iDelay=44, Bit 14, Center 20 (4 ~ 37) 34
973 09:57:21.672096 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
974 09:57:21.672154 ==
975 09:57:21.672213 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 09:57:21.672271 fsp= 1, odt_onoff= 1, Byte mode= 0
977 09:57:21.672330 ==
978 09:57:21.672388 DQS Delay:
979 09:57:21.672446 DQS0 = 0, DQS1 = 0
980 09:57:21.672504 DQM Delay:
981 09:57:21.672563 DQM0 = 19, DQM1 = 19
982 09:57:21.672621 DQ Delay:
983 09:57:21.672680 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
984 09:57:21.672739 DQ4 =21, DQ5 =17, DQ6 =19, DQ7 =19
985 09:57:21.672797 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =17
986 09:57:21.672856 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
987 09:57:21.672914
988 09:57:21.672972
989 09:57:21.673031 DramC Write-DBI off
990 09:57:21.673090 ==
991 09:57:21.673148 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 09:57:21.673208 fsp= 1, odt_onoff= 1, Byte mode= 0
993 09:57:21.673267 ==
994 09:57:21.673326 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 09:57:21.673384
996 09:57:21.673442 Begin, DQ Scan Range 919~1175
997 09:57:21.673501
998 09:57:21.673558
999 09:57:21.673616 TX Vref Scan disable
1000 09:57:21.673674 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1001 09:57:21.673735 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1002 09:57:21.673795 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1003 09:57:21.673881 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1004 09:57:21.674141 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1005 09:57:21.674209 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1006 09:57:21.674271 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1007 09:57:21.674333 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1008 09:57:21.674393 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1009 09:57:21.674453 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1010 09:57:21.674513 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1011 09:57:21.674573 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1012 09:57:21.674633 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1013 09:57:21.674694 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1014 09:57:21.674754 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1015 09:57:21.674814 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1016 09:57:21.674874 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1017 09:57:21.674936 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1018 09:57:21.674997 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1019 09:57:21.675057 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1020 09:57:21.675117 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1021 09:57:21.675176 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1022 09:57:21.675236 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1023 09:57:21.675296 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1024 09:57:21.675356 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1025 09:57:21.675431 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1026 09:57:21.675496 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1027 09:57:21.675557 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1028 09:57:21.675617 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1029 09:57:21.675677 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1030 09:57:21.675737 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1031 09:57:21.675797 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1032 09:57:21.675856 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1033 09:57:21.675916 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1034 09:57:21.675976 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1035 09:57:21.676036 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1036 09:57:21.676095 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1037 09:57:21.676155 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1038 09:57:21.676214 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1039 09:57:21.676273 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1040 09:57:21.676333 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1041 09:57:21.676392 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1042 09:57:21.676451 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1043 09:57:21.676511 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1044 09:57:21.676570 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1045 09:57:21.676630 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1046 09:57:21.676689 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1047 09:57:21.676749 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1048 09:57:21.676808 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1049 09:57:21.676867 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1050 09:57:21.676926 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1051 09:57:21.676986 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1052 09:57:21.677046 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1053 09:57:21.677105 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1054 09:57:21.677190 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1055 09:57:21.677252 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1056 09:57:21.677312 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1057 09:57:21.677372 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1058 09:57:21.677433 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1059 09:57:21.677494 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1060 09:57:21.677554 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1061 09:57:21.677614 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1062 09:57:21.677673 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1063 09:57:21.677733 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1064 09:57:21.677793 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1065 09:57:21.677853 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1066 09:57:21.677913 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1067 09:57:21.677973 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1068 09:57:21.678032 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1069 09:57:21.678092 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1070 09:57:21.678151 996 |3 6 36|[0] oooxxxxx xxxxxxxx [MSB]
1071 09:57:21.678211 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1072 09:57:21.678270 Byte0, DQ PI dly=984, DQM PI dly= 984
1073 09:57:21.678329 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1074 09:57:21.678388
1075 09:57:21.678447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1076 09:57:21.678506
1077 09:57:21.678564 Byte1, DQ PI dly=975, DQM PI dly= 975
1078 09:57:21.678622 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1079 09:57:21.678681
1080 09:57:21.678739 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1081 09:57:21.678798
1082 09:57:21.678856 ==
1083 09:57:21.678914 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1084 09:57:21.678973 fsp= 1, odt_onoff= 1, Byte mode= 0
1085 09:57:21.679032 ==
1086 09:57:21.679090 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1087 09:57:21.679149
1088 09:57:21.679207 Begin, DQ Scan Range 951~1015
1089 09:57:21.679265 Write Rank0 MR14 =0x0
1090 09:57:21.679323
1091 09:57:21.679382 CH=0, VrefRange= 0, VrefLevel = 0
1092 09:57:21.679450 TX Bit0 (979~993) 15 986, Bit8 (967~976) 10 971,
1093 09:57:21.679510 TX Bit1 (977~992) 16 984, Bit9 (968~982) 15 975,
1094 09:57:21.679570 TX Bit2 (978~993) 16 985, Bit10 (974~985) 12 979,
1095 09:57:21.679629 TX Bit3 (975~985) 11 980, Bit11 (967~980) 14 973,
1096 09:57:21.679689 TX Bit4 (978~991) 14 984, Bit12 (969~982) 14 975,
1097 09:57:21.679748 TX Bit5 (976~990) 15 983, Bit13 (969~983) 15 976,
1098 09:57:21.679807 TX Bit6 (977~990) 14 983, Bit14 (968~983) 16 975,
1099 09:57:21.679866 TX Bit7 (978~991) 14 984, Bit15 (973~984) 12 978,
1100 09:57:21.679925
1101 09:57:21.679983 Write Rank0 MR14 =0x2
1102 09:57:21.680041
1103 09:57:21.680099 CH=0, VrefRange= 0, VrefLevel = 2
1104 09:57:21.680158 TX Bit0 (978~993) 16 985, Bit8 (967~977) 11 972,
1105 09:57:21.680218 TX Bit1 (977~992) 16 984, Bit9 (968~983) 16 975,
1106 09:57:21.680276 TX Bit2 (978~993) 16 985, Bit10 (974~986) 13 980,
1107 09:57:21.680335 TX Bit3 (974~986) 13 980, Bit11 (967~981) 15 974,
1108 09:57:21.680421 TX Bit4 (977~991) 15 984, Bit12 (969~983) 15 976,
1109 09:57:21.680483 TX Bit5 (976~991) 16 983, Bit13 (968~983) 16 975,
1110 09:57:21.680740 TX Bit6 (977~991) 15 984, Bit14 (968~984) 17 976,
1111 09:57:21.680810 TX Bit7 (978~992) 15 985, Bit15 (973~985) 13 979,
1112 09:57:21.680871
1113 09:57:21.680930 Write Rank0 MR14 =0x4
1114 09:57:21.680989
1115 09:57:21.681048 CH=0, VrefRange= 0, VrefLevel = 4
1116 09:57:21.681107 TX Bit0 (978~994) 17 986, Bit8 (966~978) 13 972,
1117 09:57:21.681167 TX Bit1 (977~993) 17 985, Bit9 (968~983) 16 975,
1118 09:57:21.681226 TX Bit2 (978~993) 16 985, Bit10 (973~987) 15 980,
1119 09:57:21.681285 TX Bit3 (974~988) 15 981, Bit11 (967~982) 16 974,
1120 09:57:21.681344 TX Bit4 (977~992) 16 984, Bit12 (968~983) 16 975,
1121 09:57:21.681403 TX Bit5 (975~991) 17 983, Bit13 (968~983) 16 975,
1122 09:57:21.681465 TX Bit6 (976~991) 16 983, Bit14 (968~984) 17 976,
1123 09:57:21.681523 TX Bit7 (977~992) 16 984, Bit15 (972~986) 15 979,
1124 09:57:21.681593
1125 09:57:21.681653 Write Rank0 MR14 =0x6
1126 09:57:21.681712
1127 09:57:21.681770 CH=0, VrefRange= 0, VrefLevel = 6
1128 09:57:21.681829 TX Bit0 (978~994) 17 986, Bit8 (966~979) 14 972,
1129 09:57:21.681888 TX Bit1 (977~993) 17 985, Bit9 (967~984) 18 975,
1130 09:57:21.681946 TX Bit2 (978~994) 17 986, Bit10 (973~988) 16 980,
1131 09:57:21.682005 TX Bit3 (973~988) 16 980, Bit11 (966~982) 17 974,
1132 09:57:21.682064 TX Bit4 (977~993) 17 985, Bit12 (969~983) 15 976,
1133 09:57:21.682122 TX Bit5 (975~991) 17 983, Bit13 (968~984) 17 976,
1134 09:57:21.682181 TX Bit6 (976~992) 17 984, Bit14 (968~985) 18 976,
1135 09:57:21.682241 TX Bit7 (977~992) 16 984, Bit15 (972~987) 16 979,
1136 09:57:21.682299
1137 09:57:21.682357 Write Rank0 MR14 =0x8
1138 09:57:21.682415
1139 09:57:21.682473 CH=0, VrefRange= 0, VrefLevel = 8
1140 09:57:21.682531 TX Bit0 (977~995) 19 986, Bit8 (965~981) 17 973,
1141 09:57:21.682590 TX Bit1 (977~994) 18 985, Bit9 (967~984) 18 975,
1142 09:57:21.682649 TX Bit2 (977~994) 18 985, Bit10 (972~989) 18 980,
1143 09:57:21.682708 TX Bit3 (972~989) 18 980, Bit11 (966~983) 18 974,
1144 09:57:21.682766 TX Bit4 (977~993) 17 985, Bit12 (968~984) 17 976,
1145 09:57:21.682825 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1146 09:57:21.682884 TX Bit6 (976~992) 17 984, Bit14 (967~985) 19 976,
1147 09:57:21.682942 TX Bit7 (977~993) 17 985, Bit15 (972~987) 16 979,
1148 09:57:21.683001
1149 09:57:21.683058 Write Rank0 MR14 =0xa
1150 09:57:21.683117
1151 09:57:21.683175 CH=0, VrefRange= 0, VrefLevel = 10
1152 09:57:21.683234 TX Bit0 (977~995) 19 986, Bit8 (965~982) 18 973,
1153 09:57:21.683292 TX Bit1 (976~994) 19 985, Bit9 (967~984) 18 975,
1154 09:57:21.683351 TX Bit2 (977~995) 19 986, Bit10 (971~989) 19 980,
1155 09:57:21.683423 TX Bit3 (973~990) 18 981, Bit11 (966~983) 18 974,
1156 09:57:21.683485 TX Bit4 (976~993) 18 984, Bit12 (968~984) 17 976,
1157 09:57:21.683569 TX Bit5 (975~992) 18 983, Bit13 (968~984) 17 976,
1158 09:57:21.683631 TX Bit6 (976~993) 18 984, Bit14 (967~985) 19 976,
1159 09:57:21.683691 TX Bit7 (977~993) 17 985, Bit15 (971~988) 18 979,
1160 09:57:21.683750
1161 09:57:21.683809 Write Rank0 MR14 =0xc
1162 09:57:21.683868
1163 09:57:21.683926 CH=0, VrefRange= 0, VrefLevel = 12
1164 09:57:21.683986 TX Bit0 (977~996) 20 986, Bit8 (965~982) 18 973,
1165 09:57:21.684045 TX Bit1 (977~995) 19 986, Bit9 (967~984) 18 975,
1166 09:57:21.684105 TX Bit2 (977~996) 20 986, Bit10 (971~990) 20 980,
1167 09:57:21.684164 TX Bit3 (971~991) 21 981, Bit11 (966~983) 18 974,
1168 09:57:21.684222 TX Bit4 (976~994) 19 985, Bit12 (968~985) 18 976,
1169 09:57:21.684281 TX Bit5 (974~993) 20 983, Bit13 (967~985) 19 976,
1170 09:57:21.684340 TX Bit6 (976~993) 18 984, Bit14 (967~986) 20 976,
1171 09:57:21.684399 TX Bit7 (977~994) 18 985, Bit15 (970~989) 20 979,
1172 09:57:21.684458
1173 09:57:21.684516 Write Rank0 MR14 =0xe
1174 09:57:21.684574
1175 09:57:21.684633 CH=0, VrefRange= 0, VrefLevel = 14
1176 09:57:21.684691 TX Bit0 (977~997) 21 987, Bit8 (965~982) 18 973,
1177 09:57:21.684750 TX Bit1 (976~995) 20 985, Bit9 (966~985) 20 975,
1178 09:57:21.684809 TX Bit2 (977~997) 21 987, Bit10 (970~990) 21 980,
1179 09:57:21.684868 TX Bit3 (971~991) 21 981, Bit11 (966~984) 19 975,
1180 09:57:21.684927 TX Bit4 (976~995) 20 985, Bit12 (968~985) 18 976,
1181 09:57:21.684986 TX Bit5 (974~993) 20 983, Bit13 (967~985) 19 976,
1182 09:57:21.685044 TX Bit6 (975~994) 20 984, Bit14 (967~986) 20 976,
1183 09:57:21.685103 TX Bit7 (976~994) 19 985, Bit15 (970~990) 21 980,
1184 09:57:21.685162
1185 09:57:21.685219 Write Rank0 MR14 =0x10
1186 09:57:21.685278
1187 09:57:21.685336 CH=0, VrefRange= 0, VrefLevel = 16
1188 09:57:21.685395 TX Bit0 (977~997) 21 987, Bit8 (964~983) 20 973,
1189 09:57:21.685454 TX Bit1 (976~996) 21 986, Bit9 (967~985) 19 976,
1190 09:57:21.685513 TX Bit2 (976~997) 22 986, Bit10 (970~990) 21 980,
1191 09:57:21.685572 TX Bit3 (971~991) 21 981, Bit11 (965~984) 20 974,
1192 09:57:21.685631 TX Bit4 (976~995) 20 985, Bit12 (967~986) 20 976,
1193 09:57:21.685689 TX Bit5 (974~994) 21 984, Bit13 (967~986) 20 976,
1194 09:57:21.685748 TX Bit6 (975~994) 20 984, Bit14 (967~987) 21 977,
1195 09:57:21.685807 TX Bit7 (976~995) 20 985, Bit15 (969~990) 22 979,
1196 09:57:21.685865
1197 09:57:21.685923 Write Rank0 MR14 =0x12
1198 09:57:21.685980
1199 09:57:21.686039 CH=0, VrefRange= 0, VrefLevel = 18
1200 09:57:21.686096 TX Bit0 (977~998) 22 987, Bit8 (964~983) 20 973,
1201 09:57:21.686156 TX Bit1 (976~997) 22 986, Bit9 (966~986) 21 976,
1202 09:57:21.686215 TX Bit2 (977~998) 22 987, Bit10 (970~991) 22 980,
1203 09:57:21.686274 TX Bit3 (971~992) 22 981, Bit11 (965~985) 21 975,
1204 09:57:21.686332 TX Bit4 (976~996) 21 986, Bit12 (967~986) 20 976,
1205 09:57:21.686391 TX Bit5 (973~994) 22 983, Bit13 (967~987) 21 977,
1206 09:57:21.686450 TX Bit6 (975~994) 20 984, Bit14 (967~988) 22 977,
1207 09:57:21.686509 TX Bit7 (976~995) 20 985, Bit15 (969~990) 22 979,
1208 09:57:21.686567
1209 09:57:21.686624 Write Rank0 MR14 =0x14
1210 09:57:21.686683
1211 09:57:21.686750 CH=0, VrefRange= 0, VrefLevel = 20
1212 09:57:21.687016 TX Bit0 (977~998) 22 987, Bit8 (963~984) 22 973,
1213 09:57:21.687086 TX Bit1 (976~997) 22 986, Bit9 (966~986) 21 976,
1214 09:57:21.687148 TX Bit2 (976~998) 23 987, Bit10 (970~991) 22 980,
1215 09:57:21.687208 TX Bit3 (970~992) 23 981, Bit11 (965~985) 21 975,
1216 09:57:21.687268 TX Bit4 (976~996) 21 986, Bit12 (967~987) 21 977,
1217 09:57:21.687328 TX Bit5 (973~994) 22 983, Bit13 (967~987) 21 977,
1218 09:57:21.687387 TX Bit6 (974~995) 22 984, Bit14 (966~989) 24 977,
1219 09:57:21.687458 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
1220 09:57:21.687517
1221 09:57:21.687577 Write Rank0 MR14 =0x16
1222 09:57:21.687636
1223 09:57:21.687695 CH=0, VrefRange= 0, VrefLevel = 22
1224 09:57:21.687753 TX Bit0 (976~999) 24 987, Bit8 (962~984) 23 973,
1225 09:57:21.687812 TX Bit1 (976~998) 23 987, Bit9 (965~987) 23 976,
1226 09:57:21.687871 TX Bit2 (976~999) 24 987, Bit10 (969~991) 23 980,
1227 09:57:21.687930 TX Bit3 (970~992) 23 981, Bit11 (964~985) 22 974,
1228 09:57:21.687990 TX Bit4 (975~996) 22 985, Bit12 (967~987) 21 977,
1229 09:57:21.688049 TX Bit5 (972~995) 24 983, Bit13 (966~988) 23 977,
1230 09:57:21.688108 TX Bit6 (974~995) 22 984, Bit14 (966~989) 24 977,
1231 09:57:21.688167 TX Bit7 (976~997) 22 986, Bit15 (969~991) 23 980,
1232 09:57:21.688225
1233 09:57:21.688283 Write Rank0 MR14 =0x18
1234 09:57:21.688341
1235 09:57:21.688399 CH=0, VrefRange= 0, VrefLevel = 24
1236 09:57:21.688458 TX Bit0 (976~999) 24 987, Bit8 (962~984) 23 973,
1237 09:57:21.688516 TX Bit1 (976~999) 24 987, Bit9 (965~988) 24 976,
1238 09:57:21.688575 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1239 09:57:21.688634 TX Bit3 (970~993) 24 981, Bit11 (964~987) 24 975,
1240 09:57:21.688693 TX Bit4 (975~997) 23 986, Bit12 (967~988) 22 977,
1241 09:57:21.688752 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1242 09:57:21.688810 TX Bit6 (974~996) 23 985, Bit14 (966~990) 25 978,
1243 09:57:21.688869 TX Bit7 (976~998) 23 987, Bit15 (969~991) 23 980,
1244 09:57:21.688927
1245 09:57:21.688985 Write Rank0 MR14 =0x1a
1246 09:57:21.689044
1247 09:57:21.689102 CH=0, VrefRange= 0, VrefLevel = 26
1248 09:57:21.689160 TX Bit0 (976~999) 24 987, Bit8 (962~985) 24 973,
1249 09:57:21.689219 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1250 09:57:21.689278 TX Bit2 (976~999) 24 987, Bit10 (969~992) 24 980,
1251 09:57:21.689337 TX Bit3 (969~993) 25 981, Bit11 (964~987) 24 975,
1252 09:57:21.689396 TX Bit4 (975~998) 24 986, Bit12 (967~989) 23 978,
1253 09:57:21.689454 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1254 09:57:21.689513 TX Bit6 (973~997) 25 985, Bit14 (966~990) 25 978,
1255 09:57:21.689572 TX Bit7 (975~998) 24 986, Bit15 (968~991) 24 979,
1256 09:57:21.689631
1257 09:57:21.689689 Write Rank0 MR14 =0x1c
1258 09:57:21.689747
1259 09:57:21.689806 CH=0, VrefRange= 0, VrefLevel = 28
1260 09:57:21.689864 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1261 09:57:21.689923 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1262 09:57:21.689983 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1263 09:57:21.690042 TX Bit3 (969~993) 25 981, Bit11 (963~987) 25 975,
1264 09:57:21.690101 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1265 09:57:21.690159 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1266 09:57:21.690218 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1267 09:57:21.690277 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1268 09:57:21.690336
1269 09:57:21.690394 Write Rank0 MR14 =0x1e
1270 09:57:21.690452
1271 09:57:21.690511 CH=0, VrefRange= 0, VrefLevel = 30
1272 09:57:21.690570 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1273 09:57:21.690629 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1274 09:57:21.690689 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1275 09:57:21.690765 TX Bit3 (969~993) 25 981, Bit11 (963~987) 25 975,
1276 09:57:21.690830 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1277 09:57:21.690890 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1278 09:57:21.690950 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1279 09:57:21.691009 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1280 09:57:21.691067
1281 09:57:21.691126 Write Rank0 MR14 =0x20
1282 09:57:21.691184
1283 09:57:21.691242 CH=0, VrefRange= 0, VrefLevel = 32
1284 09:57:21.691301 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1285 09:57:21.691360 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1286 09:57:21.691428 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1287 09:57:21.691489 TX Bit3 (969~993) 25 981, Bit11 (963~987) 25 975,
1288 09:57:21.691549 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1289 09:57:21.691607 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1290 09:57:21.691666 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1291 09:57:21.691725 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1292 09:57:21.691783
1293 09:57:21.691841 Write Rank0 MR14 =0x22
1294 09:57:21.691900
1295 09:57:21.691958 CH=0, VrefRange= 0, VrefLevel = 34
1296 09:57:21.692016 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1297 09:57:21.692075 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1298 09:57:21.692134 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1299 09:57:21.692192 TX Bit3 (969~993) 25 981, Bit11 (963~987) 25 975,
1300 09:57:21.692251 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1301 09:57:21.692309 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1302 09:57:21.692367 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1303 09:57:21.692425 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1304 09:57:21.692483
1305 09:57:21.692541 Write Rank0 MR14 =0x24
1306 09:57:21.692599
1307 09:57:21.692656 CH=0, VrefRange= 0, VrefLevel = 36
1308 09:57:21.692715 TX Bit0 (976~1000) 25 988, Bit8 (962~986) 25 974,
1309 09:57:21.692773 TX Bit1 (975~999) 25 987, Bit9 (965~988) 24 976,
1310 09:57:21.692838 TX Bit2 (976~999) 24 987, Bit10 (968~993) 26 980,
1311 09:57:21.692910 TX Bit3 (969~993) 25 981, Bit11 (963~987) 25 975,
1312 09:57:21.693165 TX Bit4 (975~999) 25 987, Bit12 (966~990) 25 978,
1313 09:57:21.693231 TX Bit5 (972~995) 24 983, Bit13 (966~989) 24 977,
1314 09:57:21.693291 TX Bit6 (973~998) 26 985, Bit14 (966~990) 25 978,
1315 09:57:21.693351 TX Bit7 (975~999) 25 987, Bit15 (968~992) 25 980,
1316 09:57:21.693409
1317 09:57:21.693467
1318 09:57:21.693524 TX Vref found, early break! 366< 378
1319 09:57:21.693582 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1320 09:57:21.693640 u1DelayCellOfst[0]=9 cells (7 PI)
1321 09:57:21.693697 u1DelayCellOfst[1]=7 cells (6 PI)
1322 09:57:21.693755 u1DelayCellOfst[2]=7 cells (6 PI)
1323 09:57:21.693813 u1DelayCellOfst[3]=0 cells (0 PI)
1324 09:57:21.693894 u1DelayCellOfst[4]=7 cells (6 PI)
1325 09:57:21.693956 u1DelayCellOfst[5]=2 cells (2 PI)
1326 09:57:21.694014 u1DelayCellOfst[6]=5 cells (4 PI)
1327 09:57:21.694072 u1DelayCellOfst[7]=7 cells (6 PI)
1328 09:57:21.694129 Byte0, DQ PI dly=981, DQM PI dly= 984
1329 09:57:21.694187 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1330 09:57:21.694245
1331 09:57:21.694304 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1332 09:57:21.694362
1333 09:57:21.694419 u1DelayCellOfst[8]=0 cells (0 PI)
1334 09:57:21.694477 u1DelayCellOfst[9]=2 cells (2 PI)
1335 09:57:21.694535 u1DelayCellOfst[10]=7 cells (6 PI)
1336 09:57:21.694592 u1DelayCellOfst[11]=1 cells (1 PI)
1337 09:57:21.694650 u1DelayCellOfst[12]=5 cells (4 PI)
1338 09:57:21.694707 u1DelayCellOfst[13]=3 cells (3 PI)
1339 09:57:21.694765 u1DelayCellOfst[14]=5 cells (4 PI)
1340 09:57:21.694823 u1DelayCellOfst[15]=7 cells (6 PI)
1341 09:57:21.694880 Byte1, DQ PI dly=974, DQM PI dly= 977
1342 09:57:21.694938 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1343 09:57:21.694996
1344 09:57:21.695053 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1345 09:57:21.695111
1346 09:57:21.695169 Write Rank0 MR14 =0x1c
1347 09:57:21.695226
1348 09:57:21.695283 Final TX Range 0 Vref 28
1349 09:57:21.695341
1350 09:57:21.695398 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1351 09:57:21.695468
1352 09:57:21.695526 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1353 09:57:21.695600 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1354 09:57:21.695659 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1355 09:57:21.695718 Write Rank0 MR3 =0xb0
1356 09:57:21.695775 DramC Write-DBI on
1357 09:57:21.695832 ==
1358 09:57:21.695890 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1359 09:57:21.695948 fsp= 1, odt_onoff= 1, Byte mode= 0
1360 09:57:21.696005 ==
1361 09:57:21.696063 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1362 09:57:21.696121
1363 09:57:21.696177 Begin, DQ Scan Range 697~761
1364 09:57:21.696235
1365 09:57:21.696292
1366 09:57:21.696349 TX Vref Scan disable
1367 09:57:21.696406 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1368 09:57:21.696465 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1369 09:57:21.696524 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1370 09:57:21.696583 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1371 09:57:21.696643 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1372 09:57:21.696702 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1373 09:57:21.696761 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1374 09:57:21.696819 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1375 09:57:21.696878 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1376 09:57:21.696936 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1377 09:57:21.696995 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1378 09:57:21.697054 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1379 09:57:21.697112 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1380 09:57:21.697170 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1381 09:57:21.697239 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1382 09:57:21.697310 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1383 09:57:21.697369 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1384 09:57:21.697429 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1385 09:57:21.697496 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1386 09:57:21.697561 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1387 09:57:21.697630 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1388 09:57:21.697704 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1389 09:57:21.697765 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1390 09:57:21.697823 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1391 09:57:21.697886 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1392 09:57:21.697945 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1393 09:57:21.698004 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1394 09:57:21.698067 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1395 09:57:21.698126 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1396 09:57:21.698185 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1397 09:57:21.698247 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1398 09:57:21.698307 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1399 09:57:21.698365 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1400 09:57:21.698424 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1401 09:57:21.698482 Byte0, DQ PI dly=731, DQM PI dly= 731
1402 09:57:21.698540 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1403 09:57:21.698598
1404 09:57:21.698654 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1405 09:57:21.698712
1406 09:57:21.698769 Byte1, DQ PI dly=720, DQM PI dly= 720
1407 09:57:21.698826 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
1408 09:57:21.698884
1409 09:57:21.698942 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
1410 09:57:21.699000
1411 09:57:21.699057 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1412 09:57:21.699116 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1413 09:57:21.699173 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1414 09:57:21.699231 Write Rank0 MR3 =0x30
1415 09:57:21.699289 DramC Write-DBI off
1416 09:57:21.699346
1417 09:57:21.699402 [DATLAT]
1418 09:57:21.699472 Freq=1600, CH0 RK0, use_rxtx_scan=0
1419 09:57:21.699534
1420 09:57:21.699636 DATLAT Default: 0xf
1421 09:57:21.699701 7, 0xFFFF, sum=0
1422 09:57:21.699760 8, 0xFFFF, sum=0
1423 09:57:21.699819 9, 0xFFFF, sum=0
1424 09:57:21.699878 10, 0xFFFF, sum=0
1425 09:57:21.699937 11, 0xFFFF, sum=0
1426 09:57:21.699995 12, 0xFFFF, sum=0
1427 09:57:21.700054 13, 0xFFFF, sum=0
1428 09:57:21.700113 14, 0x0, sum=1
1429 09:57:21.700171 15, 0x0, sum=2
1430 09:57:21.700230 16, 0x0, sum=3
1431 09:57:21.700288 17, 0x0, sum=4
1432 09:57:21.700346 pattern=2 first_step=14 total pass=5 best_step=16
1433 09:57:21.700404 ==
1434 09:57:21.700462 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1435 09:57:21.700719 fsp= 1, odt_onoff= 1, Byte mode= 0
1436 09:57:21.700787 ==
1437 09:57:21.700846 Start DQ dly to find pass range UseTestEngine =1
1438 09:57:21.700909 x-axis: bit #, y-axis: DQ dly (-127~63)
1439 09:57:21.700987 RX Vref Scan = 1
1440 09:57:21.701046
1441 09:57:21.701105 RX Vref found, early break!
1442 09:57:21.701163
1443 09:57:21.701220 Final RX Vref 12, apply to both rank0 and 1
1444 09:57:21.701278 ==
1445 09:57:21.701337 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1446 09:57:21.701395 fsp= 1, odt_onoff= 1, Byte mode= 0
1447 09:57:21.701453 ==
1448 09:57:21.701511 DQS Delay:
1449 09:57:21.701569 DQS0 = 0, DQS1 = 0
1450 09:57:21.701627 DQM Delay:
1451 09:57:21.701685 DQM0 = 19, DQM1 = 18
1452 09:57:21.701742 DQ Delay:
1453 09:57:21.701799 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1454 09:57:21.701857 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1455 09:57:21.701915 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1456 09:57:21.701973 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1457 09:57:21.702031
1458 09:57:21.702087
1459 09:57:21.702144
1460 09:57:21.702201 [DramC_TX_OE_Calibration] TA2
1461 09:57:21.702259 Original DQ_B0 (3 6) =30, OEN = 27
1462 09:57:21.702317 Original DQ_B1 (3 6) =30, OEN = 27
1463 09:57:21.702375 23, 0x0, End_B0=23 End_B1=23
1464 09:57:21.702434 24, 0x0, End_B0=24 End_B1=24
1465 09:57:21.702493 25, 0x0, End_B0=25 End_B1=25
1466 09:57:21.702551 26, 0x0, End_B0=26 End_B1=26
1467 09:57:21.702611 27, 0x0, End_B0=27 End_B1=27
1468 09:57:21.702669 28, 0x0, End_B0=28 End_B1=28
1469 09:57:21.702728 29, 0x0, End_B0=29 End_B1=29
1470 09:57:21.702786 30, 0x0, End_B0=30 End_B1=30
1471 09:57:21.702844 31, 0xFFFF, End_B0=30 End_B1=30
1472 09:57:21.702903 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1473 09:57:21.702960 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1474 09:57:21.703018
1475 09:57:21.703075
1476 09:57:21.703132 Write Rank0 MR23 =0x3f
1477 09:57:21.703190 [DQSOSC]
1478 09:57:21.703247 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1479 09:57:21.703306 CH0_RK0: MR19=0x303, MR18=0x1212, DQSOSC=400, MR23=63, INC=15, DEC=23
1480 09:57:21.703364 Write Rank0 MR23 =0x3f
1481 09:57:21.703431 [DQSOSC]
1482 09:57:21.703491 [DQSOSCAuto] RK0, (LSB)MR18= 0xf0f, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 402 ps
1483 09:57:21.703548 CH0 RK0: MR19=303, MR18=F0F
1484 09:57:21.703606 [RankSwap] Rank num 2, (Multi 1), Rank 1
1485 09:57:21.703664 Write Rank0 MR2 =0xad
1486 09:57:21.703722 [Write Leveling]
1487 09:57:21.703779 delay byte0 byte1 byte2 byte3
1488 09:57:21.703836
1489 09:57:21.703919 10 0 0
1490 09:57:21.703979 11 0 0
1491 09:57:21.704040 12 0 0
1492 09:57:21.704100 13 0 0
1493 09:57:21.704159 14 0 0
1494 09:57:21.704218 15 0 0
1495 09:57:21.704277 16 0 0
1496 09:57:21.704335 17 0 0
1497 09:57:21.704393 18 0 0
1498 09:57:21.704452 19 0 0
1499 09:57:21.704510 20 0 0
1500 09:57:21.704568 21 0 0
1501 09:57:21.704625 22 0 0
1502 09:57:21.704684 23 0 ff
1503 09:57:21.704742 24 0 ff
1504 09:57:21.704801 25 0 ff
1505 09:57:21.704860 26 ff ff
1506 09:57:21.704918 27 ff ff
1507 09:57:21.704976 28 ff ff
1508 09:57:21.705034 29 ff ff
1509 09:57:21.705093 30 ff ff
1510 09:57:21.705151 31 ff ff
1511 09:57:21.705210 32 ff ff
1512 09:57:21.705269 pass bytecount = 0xff (0xff: all bytes pass)
1513 09:57:21.705327
1514 09:57:21.705385 DQS0 dly: 26
1515 09:57:21.705442 DQS1 dly: 23
1516 09:57:21.705499 Write Rank0 MR2 =0x2d
1517 09:57:21.705568 [RankSwap] Rank num 2, (Multi 1), Rank 0
1518 09:57:21.705627 Write Rank1 MR1 =0xd6
1519 09:57:21.705684 [Gating]
1520 09:57:21.705741 ==
1521 09:57:21.705799 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1522 09:57:21.705857 fsp= 1, odt_onoff= 1, Byte mode= 0
1523 09:57:21.705916 ==
1524 09:57:21.705974 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1525 09:57:21.706033 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1526 09:57:21.706093 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1527 09:57:21.706152 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1528 09:57:21.706211 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1529 09:57:21.706270 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1530 09:57:21.706328 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1531 09:57:21.706387 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1532 09:57:21.706446 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1533 09:57:21.706506 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1534 09:57:21.706566 3 2 8 |303 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1535 09:57:21.706625 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1536 09:57:21.706684 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1537 09:57:21.706743 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1538 09:57:21.706802 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1539 09:57:21.706861 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1540 09:57:21.706919 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1541 09:57:21.706978 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1542 09:57:21.707037 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 09:57:21.707095 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 09:57:21.707154 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1545 09:57:21.707213 3 3 20 |3534 3d3d |(11 11)(10 10) |(0 0)(1 1)| 0
1546 09:57:21.707272 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1547 09:57:21.707330 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1548 09:57:21.707388 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1549 09:57:21.707458 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 09:57:21.707518 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1551 09:57:21.707577 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1552 09:57:21.707635 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1553 09:57:21.707694 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1554 09:57:21.707754 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 09:57:21.707818 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 09:57:21.707894 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 09:57:21.707954 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 09:57:21.708012 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 09:57:21.708072 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 09:57:21.708131 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 09:57:21.708387 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 09:57:21.708454 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 09:57:21.708515 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 09:57:21.708575 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 09:57:21.708634 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 09:57:21.708694 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1567 09:57:21.708754 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1568 09:57:21.708827 [Byte 0] Lead/lag Transition tap number (2)
1569 09:57:21.708890 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1570 09:57:21.708949 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1571 09:57:21.709009 [Byte 1] Lead/lag Transition tap number (2)
1572 09:57:21.709067 3 6 12 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
1573 09:57:21.709126 [Byte 0]First pass (3, 6, 12)
1574 09:57:21.709184 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1575 09:57:21.709243 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 09:57:21.709302 [Byte 1]First pass (3, 6, 20)
1577 09:57:21.709360 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 09:57:21.709419 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 09:57:21.709477 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 09:57:21.709541 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 09:57:21.709600 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 09:57:21.709659 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 09:57:21.709728 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 09:57:21.709790 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 09:57:21.709849 All bytes gating window > 1UI, Early break!
1586 09:57:21.709915
1587 09:57:21.709974 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1588 09:57:21.710033
1589 09:57:21.710097 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1590 09:57:21.710157
1591 09:57:21.710215
1592 09:57:21.710280
1593 09:57:21.710340 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1594 09:57:21.710398
1595 09:57:21.710461 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1596 09:57:21.710521
1597 09:57:21.710578
1598 09:57:21.710641 Write Rank1 MR1 =0x56
1599 09:57:21.710732
1600 09:57:21.710824 best RODT dly(2T, 0.5T) = (2, 3)
1601 09:57:21.710918
1602 09:57:21.710979 best RODT dly(2T, 0.5T) = (2, 3)
1603 09:57:21.711041 ==
1604 09:57:21.711100 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1605 09:57:21.711159 fsp= 1, odt_onoff= 1, Byte mode= 0
1606 09:57:21.711218 ==
1607 09:57:21.711275 Start DQ dly to find pass range UseTestEngine =0
1608 09:57:21.711334 x-axis: bit #, y-axis: DQ dly (-127~63)
1609 09:57:21.711392 RX Vref Scan = 0
1610 09:57:21.711464 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1611 09:57:21.711524 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1612 09:57:21.711616 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1613 09:57:21.711710 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1614 09:57:21.711803 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1615 09:57:21.711880 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1616 09:57:21.711940 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1617 09:57:21.712000 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1618 09:57:21.712058 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1619 09:57:21.712117 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1620 09:57:21.712176 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1621 09:57:21.712235 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1622 09:57:21.712293 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1623 09:57:21.712352 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1624 09:57:21.712410 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1625 09:57:21.712469 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1626 09:57:21.712527 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1627 09:57:21.712585 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1628 09:57:21.712645 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1629 09:57:21.712703 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1630 09:57:21.712761 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1631 09:57:21.712819 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1632 09:57:21.712878 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1633 09:57:21.712936 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1634 09:57:21.712995 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1635 09:57:21.713053 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1636 09:57:21.713111 0, [0] xxxoxxxx oxxoxxxx [MSB]
1637 09:57:21.713170 1, [0] xxxoxoxx ooxoooxx [MSB]
1638 09:57:21.713228 2, [0] xxxoxooo ooxoooxx [MSB]
1639 09:57:21.713287 3, [0] xxxooooo ooxoooox [MSB]
1640 09:57:21.713344 4, [0] xooooooo ooxoooox [MSB]
1641 09:57:21.713403 5, [0] oooooooo ooxooooo [MSB]
1642 09:57:21.713461 6, [0] oooooooo ooxooooo [MSB]
1643 09:57:21.713519 33, [0] oooooooo xooooooo [MSB]
1644 09:57:21.713579 34, [0] oooooooo xooooooo [MSB]
1645 09:57:21.713639 35, [0] oooxoooo xooooooo [MSB]
1646 09:57:21.713698 36, [0] oooxoooo xooxoooo [MSB]
1647 09:57:21.713756 37, [0] oooxoxoo xxoxoxoo [MSB]
1648 09:57:21.713814 38, [0] oooxoxoo xxoxoxxo [MSB]
1649 09:57:21.713873 39, [0] oooxoxox xxoxxxxo [MSB]
1650 09:57:21.713930 40, [0] oooxoxxx xxoxxxxo [MSB]
1651 09:57:21.713989 41, [0] oxxxoxxx xxoxxxxx [MSB]
1652 09:57:21.714047 42, [0] oxxxxxxx xxoxxxxx [MSB]
1653 09:57:21.714105 43, [0] xxxxxxxx xxoxxxxx [MSB]
1654 09:57:21.714163 44, [0] xxxxxxxx xxoxxxxx [MSB]
1655 09:57:21.714222 45, [0] xxxxxxxx xxxxxxxx [MSB]
1656 09:57:21.714308 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1657 09:57:21.714371 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1658 09:57:21.714430 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1659 09:57:21.714488 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1660 09:57:21.714545 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1661 09:57:21.714603 iDelay=45, Bit 5, Center 18 (1 ~ 36) 36
1662 09:57:21.714661 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1663 09:57:21.714719 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1664 09:57:21.714777 iDelay=45, Bit 8, Center 14 (-3 ~ 32) 36
1665 09:57:21.714834 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1666 09:57:21.714891 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1667 09:57:21.714949 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1668 09:57:21.715006 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1669 09:57:21.715063 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1670 09:57:21.715120 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1671 09:57:21.715178 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1672 09:57:21.715235 ==
1673 09:57:21.715292 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1674 09:57:21.715351 fsp= 1, odt_onoff= 1, Byte mode= 0
1675 09:57:21.715419 ==
1676 09:57:21.715480 DQS Delay:
1677 09:57:21.715537 DQS0 = 0, DQS1 = 0
1678 09:57:21.715594 DQM Delay:
1679 09:57:21.715651 DQM0 = 20, DQM1 = 19
1680 09:57:21.715709 DQ Delay:
1681 09:57:21.715766 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =16
1682 09:57:21.715825 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1683 09:57:21.716079 DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =16
1684 09:57:21.716145 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1685 09:57:21.716205
1686 09:57:21.716262
1687 09:57:21.716320 DramC Write-DBI off
1688 09:57:21.716377 ==
1689 09:57:21.716435 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1690 09:57:21.716493 fsp= 1, odt_onoff= 1, Byte mode= 0
1691 09:57:21.716552 ==
1692 09:57:21.716609 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1693 09:57:21.716667
1694 09:57:21.716725 Begin, DQ Scan Range 919~1175
1695 09:57:21.716782
1696 09:57:21.716839
1697 09:57:21.716896 TX Vref Scan disable
1698 09:57:21.716954 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1699 09:57:21.717012 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1700 09:57:21.717071 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1701 09:57:21.717130 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1702 09:57:21.717189 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1703 09:57:21.717248 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1704 09:57:21.717307 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1705 09:57:21.717366 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1706 09:57:21.717434 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1707 09:57:21.717511 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1708 09:57:21.717570 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1709 09:57:21.717630 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1710 09:57:21.717688 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1711 09:57:21.717748 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1712 09:57:21.717807 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1713 09:57:21.717865 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1714 09:57:21.717924 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1715 09:57:21.717983 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1716 09:57:21.718041 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1717 09:57:21.718100 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1718 09:57:21.718159 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1719 09:57:21.718218 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1720 09:57:21.718277 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1721 09:57:21.718336 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1722 09:57:21.718395 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1723 09:57:21.718455 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1724 09:57:21.718514 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1725 09:57:21.718573 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1726 09:57:21.718632 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1727 09:57:21.718691 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1728 09:57:21.718749 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1729 09:57:21.718807 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1730 09:57:21.718866 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1731 09:57:21.718925 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1732 09:57:21.718984 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1733 09:57:21.719043 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1734 09:57:21.719102 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1735 09:57:21.719161 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1736 09:57:21.719220 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1737 09:57:21.719278 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1738 09:57:21.719337 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1739 09:57:21.719396 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1740 09:57:21.719466 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1741 09:57:21.719536 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1742 09:57:21.719620 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1743 09:57:21.719704 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1744 09:57:21.719766 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1745 09:57:21.719826 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1746 09:57:21.719886 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1747 09:57:21.719945 968 |3 6 8|[0] xxxxxxxx ooxooxxx [MSB]
1748 09:57:21.720004 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1749 09:57:21.720063 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1750 09:57:21.720122 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1751 09:57:21.720181 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1752 09:57:21.720240 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1753 09:57:21.720299 974 |3 6 14|[0] xoxooooo oooooooo [MSB]
1754 09:57:21.720359 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1755 09:57:21.720418 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1756 09:57:21.720477 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1757 09:57:21.720535 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1758 09:57:21.720595 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1759 09:57:21.720672 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1760 09:57:21.720741 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1761 09:57:21.720801 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1762 09:57:21.720860 Byte0, DQ PI dly=982, DQM PI dly= 982
1763 09:57:21.720918 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1764 09:57:21.720977
1765 09:57:21.721035 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1766 09:57:21.721094
1767 09:57:21.721152 Byte1, DQ PI dly=977, DQM PI dly= 977
1768 09:57:21.721209 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1769 09:57:21.721267
1770 09:57:21.721325 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1771 09:57:21.721383
1772 09:57:21.721440 ==
1773 09:57:21.721497 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1774 09:57:21.721556 fsp= 1, odt_onoff= 1, Byte mode= 0
1775 09:57:21.721619 ==
1776 09:57:21.721677 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1777 09:57:21.721736
1778 09:57:21.721800 Begin, DQ Scan Range 953~1017
1779 09:57:21.721862 Write Rank1 MR14 =0x0
1780 09:57:21.721919
1781 09:57:21.721987 CH=0, VrefRange= 0, VrefLevel = 0
1782 09:57:21.722048 TX Bit0 (977~991) 15 984, Bit8 (968~981) 14 974,
1783 09:57:21.722107 TX Bit1 (977~987) 11 982, Bit9 (969~983) 15 976,
1784 09:57:21.722172 TX Bit2 (977~990) 14 983, Bit10 (976~984) 9 980,
1785 09:57:21.722234 TX Bit3 (971~982) 12 976, Bit11 (969~982) 14 975,
1786 09:57:21.722293 TX Bit4 (976~988) 13 982, Bit12 (971~983) 13 977,
1787 09:57:21.722355 TX Bit5 (973~985) 13 979, Bit13 (973~982) 10 977,
1788 09:57:21.722414 TX Bit6 (975~987) 13 981, Bit14 (972~983) 12 977,
1789 09:57:21.722472 TX Bit7 (976~990) 15 983, Bit15 (975~984) 10 979,
1790 09:57:21.722534
1791 09:57:21.722596 Write Rank1 MR14 =0x2
1792 09:57:21.722653
1793 09:57:21.722714 CH=0, VrefRange= 0, VrefLevel = 2
1794 09:57:21.722807 TX Bit0 (977~991) 15 984, Bit8 (968~982) 15 975,
1795 09:57:21.722900 TX Bit1 (976~989) 14 982, Bit9 (969~984) 16 976,
1796 09:57:21.722993 TX Bit2 (977~990) 14 983, Bit10 (976~989) 14 982,
1797 09:57:21.723287 TX Bit3 (970~983) 14 976, Bit11 (968~982) 15 975,
1798 09:57:21.723388 TX Bit4 (976~989) 14 982, Bit12 (970~984) 15 977,
1799 09:57:21.723492 TX Bit5 (972~986) 15 979, Bit13 (973~982) 10 977,
1800 09:57:21.723585 TX Bit6 (974~987) 14 980, Bit14 (972~984) 13 978,
1801 09:57:21.723679 TX Bit7 (976~990) 15 983, Bit15 (974~987) 14 980,
1802 09:57:21.723770
1803 09:57:21.723861 Write Rank1 MR14 =0x4
1804 09:57:21.723951
1805 09:57:21.724057 CH=0, VrefRange= 0, VrefLevel = 4
1806 09:57:21.724151 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1807 09:57:21.724244 TX Bit1 (976~990) 15 983, Bit9 (969~984) 16 976,
1808 09:57:21.724336 TX Bit2 (977~991) 15 984, Bit10 (975~989) 15 982,
1809 09:57:21.724427 TX Bit3 (970~984) 15 977, Bit11 (968~983) 16 975,
1810 09:57:21.724519 TX Bit4 (976~990) 15 983, Bit12 (970~984) 15 977,
1811 09:57:21.724612 TX Bit5 (972~986) 15 979, Bit13 (971~983) 13 977,
1812 09:57:21.724703 TX Bit6 (974~989) 16 981, Bit14 (971~985) 15 978,
1813 09:57:21.724795 TX Bit7 (975~991) 17 983, Bit15 (975~989) 15 982,
1814 09:57:21.724886
1815 09:57:21.724976 Write Rank1 MR14 =0x6
1816 09:57:21.725066
1817 09:57:21.725156 CH=0, VrefRange= 0, VrefLevel = 6
1818 09:57:21.725247 TX Bit0 (976~992) 17 984, Bit8 (968~983) 16 975,
1819 09:57:21.725339 TX Bit1 (976~990) 15 983, Bit9 (969~985) 17 977,
1820 09:57:21.725432 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1821 09:57:21.725495 TX Bit3 (970~984) 15 977, Bit11 (968~983) 16 975,
1822 09:57:21.725553 TX Bit4 (975~991) 17 983, Bit12 (970~985) 16 977,
1823 09:57:21.725612 TX Bit5 (972~988) 17 980, Bit13 (971~983) 13 977,
1824 09:57:21.725671 TX Bit6 (973~990) 18 981, Bit14 (970~985) 16 977,
1825 09:57:21.725729 TX Bit7 (975~991) 17 983, Bit15 (974~990) 17 982,
1826 09:57:21.725786
1827 09:57:21.725843 Write Rank1 MR14 =0x8
1828 09:57:21.725900
1829 09:57:21.725957 CH=0, VrefRange= 0, VrefLevel = 8
1830 09:57:21.726015 TX Bit0 (976~993) 18 984, Bit8 (968~983) 16 975,
1831 09:57:21.726074 TX Bit1 (976~991) 16 983, Bit9 (969~985) 17 977,
1832 09:57:21.726132 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1833 09:57:21.726191 TX Bit3 (969~985) 17 977, Bit11 (968~983) 16 975,
1834 09:57:21.726250 TX Bit4 (975~991) 17 983, Bit12 (970~985) 16 977,
1835 09:57:21.726308 TX Bit5 (971~989) 19 980, Bit13 (971~984) 14 977,
1836 09:57:21.726366 TX Bit6 (973~990) 18 981, Bit14 (970~986) 17 978,
1837 09:57:21.726424 TX Bit7 (974~991) 18 982, Bit15 (972~990) 19 981,
1838 09:57:21.726481
1839 09:57:21.726538 Write Rank1 MR14 =0xa
1840 09:57:21.726595
1841 09:57:21.726653 CH=0, VrefRange= 0, VrefLevel = 10
1842 09:57:21.726710 TX Bit0 (976~993) 18 984, Bit8 (968~983) 16 975,
1843 09:57:21.726768 TX Bit1 (975~991) 17 983, Bit9 (968~986) 19 977,
1844 09:57:21.726826 TX Bit2 (976~992) 17 984, Bit10 (975~990) 16 982,
1845 09:57:21.726884 TX Bit3 (969~986) 18 977, Bit11 (968~984) 17 976,
1846 09:57:21.726942 TX Bit4 (974~992) 19 983, Bit12 (969~986) 18 977,
1847 09:57:21.726999 TX Bit5 (971~989) 19 980, Bit13 (970~984) 15 977,
1848 09:57:21.727057 TX Bit6 (972~990) 19 981, Bit14 (970~987) 18 978,
1849 09:57:21.727115 TX Bit7 (974~992) 19 983, Bit15 (974~991) 18 982,
1850 09:57:21.727172
1851 09:57:21.727229 Write Rank1 MR14 =0xc
1852 09:57:21.727286
1853 09:57:21.727343 CH=0, VrefRange= 0, VrefLevel = 12
1854 09:57:21.727436 TX Bit0 (976~993) 18 984, Bit8 (967~984) 18 975,
1855 09:57:21.727498 TX Bit1 (975~992) 18 983, Bit9 (968~986) 19 977,
1856 09:57:21.727557 TX Bit2 (976~992) 17 984, Bit10 (974~991) 18 982,
1857 09:57:21.727615 TX Bit3 (969~987) 19 978, Bit11 (968~984) 17 976,
1858 09:57:21.727673 TX Bit4 (974~992) 19 983, Bit12 (969~987) 19 978,
1859 09:57:21.727731 TX Bit5 (970~990) 21 980, Bit13 (970~985) 16 977,
1860 09:57:21.727790 TX Bit6 (972~991) 20 981, Bit14 (969~988) 20 978,
1861 09:57:21.727848 TX Bit7 (973~992) 20 982, Bit15 (973~991) 19 982,
1862 09:57:21.727907
1863 09:57:21.727964 Write Rank1 MR14 =0xe
1864 09:57:21.728022
1865 09:57:21.728079 CH=0, VrefRange= 0, VrefLevel = 14
1866 09:57:21.728137 TX Bit0 (976~994) 19 985, Bit8 (967~984) 18 975,
1867 09:57:21.728195 TX Bit1 (975~992) 18 983, Bit9 (968~987) 20 977,
1868 09:57:21.728253 TX Bit2 (976~993) 18 984, Bit10 (973~991) 19 982,
1869 09:57:21.728312 TX Bit3 (969~988) 20 978, Bit11 (967~984) 18 975,
1870 09:57:21.728371 TX Bit4 (974~992) 19 983, Bit12 (969~988) 20 978,
1871 09:57:21.728428 TX Bit5 (970~990) 21 980, Bit13 (970~985) 16 977,
1872 09:57:21.728486 TX Bit6 (971~991) 21 981, Bit14 (969~989) 21 979,
1873 09:57:21.728544 TX Bit7 (973~992) 20 982, Bit15 (973~991) 19 982,
1874 09:57:21.728602
1875 09:57:21.728659 Write Rank1 MR14 =0x10
1876 09:57:21.728716
1877 09:57:21.728773 CH=0, VrefRange= 0, VrefLevel = 16
1878 09:57:21.728831 TX Bit0 (976~994) 19 985, Bit8 (967~985) 19 976,
1879 09:57:21.728889 TX Bit1 (974~992) 19 983, Bit9 (968~988) 21 978,
1880 09:57:21.728947 TX Bit2 (976~993) 18 984, Bit10 (973~992) 20 982,
1881 09:57:21.729006 TX Bit3 (968~988) 21 978, Bit11 (967~985) 19 976,
1882 09:57:21.729064 TX Bit4 (973~993) 21 983, Bit12 (969~989) 21 979,
1883 09:57:21.729122 TX Bit5 (970~991) 22 980, Bit13 (969~986) 18 977,
1884 09:57:21.729180 TX Bit6 (971~992) 22 981, Bit14 (969~989) 21 979,
1885 09:57:21.729238 TX Bit7 (973~993) 21 983, Bit15 (972~991) 20 981,
1886 09:57:21.729296
1887 09:57:21.729352 Write Rank1 MR14 =0x12
1888 09:57:21.729410
1889 09:57:21.729467 CH=0, VrefRange= 0, VrefLevel = 18
1890 09:57:21.729525 TX Bit0 (975~995) 21 985, Bit8 (966~985) 20 975,
1891 09:57:21.729583 TX Bit1 (974~993) 20 983, Bit9 (968~989) 22 978,
1892 09:57:21.729642 TX Bit2 (975~994) 20 984, Bit10 (974~992) 19 983,
1893 09:57:21.729700 TX Bit3 (968~989) 22 978, Bit11 (967~986) 20 976,
1894 09:57:21.729757 TX Bit4 (972~993) 22 982, Bit12 (968~989) 22 978,
1895 09:57:21.729815 TX Bit5 (970~991) 22 980, Bit13 (969~986) 18 977,
1896 09:57:21.729873 TX Bit6 (971~992) 22 981, Bit14 (969~989) 21 979,
1897 09:57:21.730128 TX Bit7 (972~993) 22 982, Bit15 (971~992) 22 981,
1898 09:57:21.730196
1899 09:57:21.730255 Write Rank1 MR14 =0x14
1900 09:57:21.730313
1901 09:57:21.730371 CH=0, VrefRange= 0, VrefLevel = 20
1902 09:57:21.730455 TX Bit0 (975~996) 22 985, Bit8 (966~986) 21 976,
1903 09:57:21.730516 TX Bit1 (974~994) 21 984, Bit9 (968~989) 22 978,
1904 09:57:21.730576 TX Bit2 (975~994) 20 984, Bit10 (972~992) 21 982,
1905 09:57:21.862933 TX Bit3 (968~990) 23 979, Bit11 (967~986) 20 976,
1906 09:57:21.863554 TX Bit4 (972~994) 23 983, Bit12 (968~990) 23 979,
1907 09:57:21.863905 TX Bit5 (970~991) 22 980, Bit13 (969~987) 19 978,
1908 09:57:21.864221 TX Bit6 (970~992) 23 981, Bit14 (968~990) 23 979,
1909 09:57:21.864517 TX Bit7 (972~994) 23 983, Bit15 (971~992) 22 981,
1910 09:57:21.864805
1911 09:57:21.865085 Write Rank1 MR14 =0x16
1912 09:57:21.865364
1913 09:57:21.865653 CH=0, VrefRange= 0, VrefLevel = 22
1914 09:57:21.865715 TX Bit0 (975~996) 22 985, Bit8 (966~986) 21 976,
1915 09:57:21.865776 TX Bit1 (973~994) 22 983, Bit9 (967~990) 24 978,
1916 09:57:21.865836 TX Bit2 (975~995) 21 985, Bit10 (972~993) 22 982,
1917 09:57:21.865896 TX Bit3 (968~990) 23 979, Bit11 (967~987) 21 977,
1918 09:57:21.865955 TX Bit4 (972~994) 23 983, Bit12 (968~990) 23 979,
1919 09:57:21.866014 TX Bit5 (969~992) 24 980, Bit13 (969~989) 21 979,
1920 09:57:21.866073 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1921 09:57:21.866132 TX Bit7 (971~994) 24 982, Bit15 (971~993) 23 982,
1922 09:57:21.866191
1923 09:57:21.866249 Write Rank1 MR14 =0x18
1924 09:57:21.866307
1925 09:57:21.866373 CH=0, VrefRange= 0, VrefLevel = 24
1926 09:57:21.866443 TX Bit0 (975~997) 23 986, Bit8 (966~987) 22 976,
1927 09:57:21.866503 TX Bit1 (972~994) 23 983, Bit9 (967~990) 24 978,
1928 09:57:21.866562 TX Bit2 (975~995) 21 985, Bit10 (972~993) 22 982,
1929 09:57:21.866621 TX Bit3 (968~990) 23 979, Bit11 (966~989) 24 977,
1930 09:57:21.866679 TX Bit4 (971~994) 24 982, Bit12 (968~990) 23 979,
1931 09:57:21.866739 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
1932 09:57:21.866797 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1933 09:57:21.866856 TX Bit7 (971~995) 25 983, Bit15 (971~993) 23 982,
1934 09:57:21.866914
1935 09:57:21.866972 Write Rank1 MR14 =0x1a
1936 09:57:21.867031
1937 09:57:21.867088 CH=0, VrefRange= 0, VrefLevel = 26
1938 09:57:21.867147 TX Bit0 (974~997) 24 985, Bit8 (965~988) 24 976,
1939 09:57:21.867205 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
1940 09:57:21.867264 TX Bit2 (975~996) 22 985, Bit10 (971~994) 24 982,
1941 09:57:21.867322 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1942 09:57:21.867381 TX Bit4 (971~995) 25 983, Bit12 (968~991) 24 979,
1943 09:57:21.867447 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
1944 09:57:21.867506 TX Bit6 (970~994) 25 982, Bit14 (968~991) 24 979,
1945 09:57:21.867565 TX Bit7 (971~995) 25 983, Bit15 (970~993) 24 981,
1946 09:57:21.867623
1947 09:57:21.867680 Write Rank1 MR14 =0x1c
1948 09:57:21.867737
1949 09:57:21.867795 CH=0, VrefRange= 0, VrefLevel = 28
1950 09:57:21.867853 TX Bit0 (973~998) 26 985, Bit8 (965~989) 25 977,
1951 09:57:21.867912 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
1952 09:57:21.867970 TX Bit2 (974~997) 24 985, Bit10 (970~994) 25 982,
1953 09:57:21.868028 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
1954 09:57:21.868087 TX Bit4 (971~996) 26 983, Bit12 (968~991) 24 979,
1955 09:57:21.868145 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
1956 09:57:21.868204 TX Bit6 (970~994) 25 982, Bit14 (968~991) 24 979,
1957 09:57:21.868262 TX Bit7 (970~996) 27 983, Bit15 (970~994) 25 982,
1958 09:57:21.868320
1959 09:57:21.868377 Write Rank1 MR14 =0x1e
1960 09:57:21.868435
1961 09:57:21.868493 CH=0, VrefRange= 0, VrefLevel = 30
1962 09:57:21.868550 TX Bit0 (974~998) 25 986, Bit8 (964~989) 26 976,
1963 09:57:21.868609 TX Bit1 (972~996) 25 984, Bit9 (967~990) 24 978,
1964 09:57:21.868667 TX Bit2 (974~997) 24 985, Bit10 (971~995) 25 983,
1965 09:57:21.868726 TX Bit3 (967~991) 25 979, Bit11 (966~990) 25 978,
1966 09:57:21.868784 TX Bit4 (971~997) 27 984, Bit12 (967~991) 25 979,
1967 09:57:21.868842 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
1968 09:57:21.868900 TX Bit6 (969~995) 27 982, Bit14 (967~991) 25 979,
1969 09:57:21.868958 TX Bit7 (971~996) 26 983, Bit15 (970~993) 24 981,
1970 09:57:21.869016
1971 09:57:21.869073 Write Rank1 MR14 =0x20
1972 09:57:21.869131
1973 09:57:21.869188 CH=0, VrefRange= 0, VrefLevel = 32
1974 09:57:21.869246 TX Bit0 (973~998) 26 985, Bit8 (964~989) 26 976,
1975 09:57:21.869305 TX Bit1 (972~997) 26 984, Bit9 (967~990) 24 978,
1976 09:57:21.869363 TX Bit2 (974~998) 25 986, Bit10 (970~995) 26 982,
1977 09:57:21.869422 TX Bit3 (968~991) 24 979, Bit11 (966~990) 25 978,
1978 09:57:21.869507 TX Bit4 (970~997) 28 983, Bit12 (967~990) 24 978,
1979 09:57:21.869580 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
1980 09:57:21.869639 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
1981 09:57:21.869698 TX Bit7 (971~996) 26 983, Bit15 (969~993) 25 981,
1982 09:57:21.869756
1983 09:57:21.869813 Write Rank1 MR14 =0x22
1984 09:57:21.869871
1985 09:57:21.869930 CH=0, VrefRange= 0, VrefLevel = 34
1986 09:57:21.869987 TX Bit0 (973~998) 26 985, Bit8 (964~989) 26 976,
1987 09:57:21.870046 TX Bit1 (972~997) 26 984, Bit9 (967~990) 24 978,
1988 09:57:21.870104 TX Bit2 (974~998) 25 986, Bit10 (970~995) 26 982,
1989 09:57:21.870163 TX Bit3 (968~991) 24 979, Bit11 (966~990) 25 978,
1990 09:57:21.870221 TX Bit4 (970~997) 28 983, Bit12 (967~990) 24 978,
1991 09:57:21.870279 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
1992 09:57:21.870337 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
1993 09:57:21.870395 TX Bit7 (971~996) 26 983, Bit15 (969~993) 25 981,
1994 09:57:21.870453
1995 09:57:21.870510 Write Rank1 MR14 =0x24
1996 09:57:21.870567
1997 09:57:21.870625 CH=0, VrefRange= 0, VrefLevel = 36
1998 09:57:21.870682 TX Bit0 (973~998) 26 985, Bit8 (964~989) 26 976,
1999 09:57:21.870952 TX Bit1 (972~997) 26 984, Bit9 (967~990) 24 978,
2000 09:57:21.871020 TX Bit2 (974~998) 25 986, Bit10 (970~995) 26 982,
2001 09:57:21.871081 TX Bit3 (968~991) 24 979, Bit11 (966~990) 25 978,
2002 09:57:21.871141 TX Bit4 (970~997) 28 983, Bit12 (967~990) 24 978,
2003 09:57:21.871200 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
2004 09:57:21.871260 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
2005 09:57:21.871319 TX Bit7 (971~996) 26 983, Bit15 (969~993) 25 981,
2006 09:57:21.871381
2007 09:57:21.871450 Write Rank1 MR14 =0x26
2008 09:57:21.871510
2009 09:57:21.871568 CH=0, VrefRange= 0, VrefLevel = 38
2010 09:57:21.871627 TX Bit0 (973~998) 26 985, Bit8 (964~989) 26 976,
2011 09:57:21.871686 TX Bit1 (972~997) 26 984, Bit9 (967~990) 24 978,
2012 09:57:21.871745 TX Bit2 (974~998) 25 986, Bit10 (970~995) 26 982,
2013 09:57:21.871803 TX Bit3 (968~991) 24 979, Bit11 (966~990) 25 978,
2014 09:57:21.871862 TX Bit4 (970~997) 28 983, Bit12 (967~990) 24 978,
2015 09:57:21.871920 TX Bit5 (968~993) 26 980, Bit13 (968~990) 23 979,
2016 09:57:21.871979 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
2017 09:57:21.872037 TX Bit7 (971~996) 26 983, Bit15 (969~993) 25 981,
2018 09:57:21.872095
2019 09:57:21.872152
2020 09:57:21.872210 TX Vref found, early break! 375< 384
2021 09:57:21.872268 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2022 09:57:21.872327 u1DelayCellOfst[0]=7 cells (6 PI)
2023 09:57:21.872386 u1DelayCellOfst[1]=6 cells (5 PI)
2024 09:57:21.872444 u1DelayCellOfst[2]=9 cells (7 PI)
2025 09:57:21.872502 u1DelayCellOfst[3]=0 cells (0 PI)
2026 09:57:21.872582 u1DelayCellOfst[4]=5 cells (4 PI)
2027 09:57:21.872642 u1DelayCellOfst[5]=1 cells (1 PI)
2028 09:57:21.872701 u1DelayCellOfst[6]=2 cells (2 PI)
2029 09:57:21.872759 u1DelayCellOfst[7]=5 cells (4 PI)
2030 09:57:21.872817 Byte0, DQ PI dly=979, DQM PI dly= 982
2031 09:57:21.872876 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2032 09:57:21.872936
2033 09:57:21.872994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2034 09:57:21.873053
2035 09:57:21.873110 u1DelayCellOfst[8]=0 cells (0 PI)
2036 09:57:21.873169 u1DelayCellOfst[9]=2 cells (2 PI)
2037 09:57:21.873227 u1DelayCellOfst[10]=7 cells (6 PI)
2038 09:57:21.873286 u1DelayCellOfst[11]=2 cells (2 PI)
2039 09:57:21.873344 u1DelayCellOfst[12]=2 cells (2 PI)
2040 09:57:21.873402 u1DelayCellOfst[13]=3 cells (3 PI)
2041 09:57:21.873460 u1DelayCellOfst[14]=3 cells (3 PI)
2042 09:57:21.873517 u1DelayCellOfst[15]=6 cells (5 PI)
2043 09:57:21.873575 Byte1, DQ PI dly=976, DQM PI dly= 979
2044 09:57:21.873633 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2045 09:57:21.873692
2046 09:57:21.873750 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2047 09:57:21.873809
2048 09:57:21.873867 Write Rank1 MR14 =0x20
2049 09:57:21.873925
2050 09:57:21.873982 Final TX Range 0 Vref 32
2051 09:57:21.874040
2052 09:57:21.874098 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2053 09:57:21.874157
2054 09:57:21.874215 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2055 09:57:21.874274 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2056 09:57:21.874334 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2057 09:57:21.874392 Write Rank1 MR3 =0xb0
2058 09:57:21.874450 DramC Write-DBI on
2059 09:57:21.874508 ==
2060 09:57:21.874566 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2061 09:57:21.874625 fsp= 1, odt_onoff= 1, Byte mode= 0
2062 09:57:21.874684 ==
2063 09:57:21.874741 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2064 09:57:21.874800
2065 09:57:21.874859 Begin, DQ Scan Range 699~763
2066 09:57:21.874917
2067 09:57:21.874974
2068 09:57:21.875032 TX Vref Scan disable
2069 09:57:21.875090 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2070 09:57:21.875149 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2071 09:57:21.875210 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2072 09:57:21.875269 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2073 09:57:21.875329 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2074 09:57:21.875388 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2075 09:57:21.875455 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2076 09:57:21.875515 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2077 09:57:21.875574 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2078 09:57:21.875633 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2079 09:57:21.875692 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2080 09:57:21.875751 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2081 09:57:21.875809 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2082 09:57:21.875868 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2083 09:57:21.875927 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2084 09:57:21.875986 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2085 09:57:21.876045 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2086 09:57:21.876104 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2087 09:57:21.876163 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2088 09:57:21.876221 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2089 09:57:21.876303 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2090 09:57:21.876366 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2091 09:57:21.876427 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
2092 09:57:21.876486 Byte0, DQ PI dly=727, DQM PI dly= 727
2093 09:57:21.876545 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
2094 09:57:21.876604
2095 09:57:21.876662 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
2096 09:57:21.876722
2097 09:57:21.876780 Byte1, DQ PI dly=722, DQM PI dly= 722
2098 09:57:21.876840 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2099 09:57:21.876899
2100 09:57:21.876956 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2101 09:57:21.877016
2102 09:57:21.877074 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2103 09:57:21.877132 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2104 09:57:21.877191 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2105 09:57:21.877250 Write Rank1 MR3 =0x30
2106 09:57:21.877308 DramC Write-DBI off
2107 09:57:21.877366
2108 09:57:21.877424 [DATLAT]
2109 09:57:21.877482 Freq=1600, CH0 RK1, use_rxtx_scan=0
2110 09:57:21.877558
2111 09:57:21.877617 DATLAT Default: 0x10
2112 09:57:21.877675 7, 0xFFFF, sum=0
2113 09:57:21.877735 8, 0xFFFF, sum=0
2114 09:57:21.877795 9, 0xFFFF, sum=0
2115 09:57:21.877854 10, 0xFFFF, sum=0
2116 09:57:21.877913 11, 0xFFFF, sum=0
2117 09:57:21.877972 12, 0xFFFF, sum=0
2118 09:57:21.878031 13, 0xFFFF, sum=0
2119 09:57:21.878284 14, 0x0, sum=1
2120 09:57:21.878351 15, 0x0, sum=2
2121 09:57:21.878412 16, 0x0, sum=3
2122 09:57:21.878471 17, 0x0, sum=4
2123 09:57:21.878530 pattern=2 first_step=14 total pass=5 best_step=16
2124 09:57:21.878589 ==
2125 09:57:21.878647 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2126 09:57:21.878706 fsp= 1, odt_onoff= 1, Byte mode= 0
2127 09:57:21.878764 ==
2128 09:57:21.878823 Start DQ dly to find pass range UseTestEngine =1
2129 09:57:21.878882 x-axis: bit #, y-axis: DQ dly (-127~63)
2130 09:57:21.878941 RX Vref Scan = 0
2131 09:57:21.878999 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2132 09:57:21.879059 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2133 09:57:21.879119 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2134 09:57:21.879178 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2135 09:57:21.879244 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2136 09:57:21.879351 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2137 09:57:21.879449 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2138 09:57:21.879522 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2139 09:57:21.879585 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2140 09:57:21.879646 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2141 09:57:21.879706 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2142 09:57:21.879766 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2143 09:57:21.879826 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2144 09:57:21.879886 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2145 09:57:21.879946 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2146 09:57:21.880005 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2147 09:57:21.880064 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2148 09:57:21.880124 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2149 09:57:21.880183 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2150 09:57:21.880243 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2151 09:57:21.880303 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2152 09:57:21.880362 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2153 09:57:21.880421 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2154 09:57:21.880480 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2155 09:57:21.880540 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2156 09:57:21.880598 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2157 09:57:21.880657 0, [0] xxxoxxxx oxxoxxxx [MSB]
2158 09:57:21.880718 1, [0] xxxoxoxx ooxooxxx [MSB]
2159 09:57:21.880777 2, [0] xxxoxoxx ooxoooxx [MSB]
2160 09:57:21.880836 3, [0] xxxoxooo ooxoooox [MSB]
2161 09:57:21.880896 4, [0] xxxoxooo ooxoooox [MSB]
2162 09:57:21.880954 5, [0] xoxooooo ooxoooox [MSB]
2163 09:57:21.881014 6, [0] oooooooo ooxooooo [MSB]
2164 09:57:21.881073 33, [0] oooooooo xooooooo [MSB]
2165 09:57:21.881134 34, [0] oooxoooo xooooooo [MSB]
2166 09:57:21.881193 35, [0] oooxoxoo xooxoooo [MSB]
2167 09:57:21.881252 36, [0] oooxoxoo xooxoxoo [MSB]
2168 09:57:21.881312 37, [0] oooxoxoo xxoxoxoo [MSB]
2169 09:57:21.881371 38, [0] oooxoxxo xxoxxxxo [MSB]
2170 09:57:21.881430 39, [0] oxxxoxxx xxoxxxxo [MSB]
2171 09:57:21.881488 40, [0] oxxxxxxx xxoxxxxx [MSB]
2172 09:57:21.881553 41, [0] xxxxxxxx xxoxxxxx [MSB]
2173 09:57:21.881612 42, [0] xxxxxxxx xxoxxxxx [MSB]
2174 09:57:21.881672 43, [0] xxxxxxxx xxoxxxxx [MSB]
2175 09:57:21.881731 44, [0] xxxxxxxx xxxxxxxx [MSB]
2176 09:57:21.881790 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2177 09:57:21.881849 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2178 09:57:21.881906 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2179 09:57:21.881965 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2180 09:57:21.882023 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2181 09:57:21.882082 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2182 09:57:21.882140 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2183 09:57:21.882198 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2184 09:57:21.882257 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2185 09:57:21.882315 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2186 09:57:21.882373 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2187 09:57:21.882432 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2188 09:57:21.882490 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2189 09:57:21.882548 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2190 09:57:21.882606 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2191 09:57:21.882664 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2192 09:57:21.882722 ==
2193 09:57:21.882780 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2194 09:57:21.882855 fsp= 1, odt_onoff= 1, Byte mode= 0
2195 09:57:21.882926 ==
2196 09:57:21.882985 DQS Delay:
2197 09:57:21.883043 DQS0 = 0, DQS1 = 0
2198 09:57:21.883102 DQM Delay:
2199 09:57:21.883161 DQM0 = 20, DQM1 = 19
2200 09:57:21.883219 DQ Delay:
2201 09:57:21.883278 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2202 09:57:21.883336 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2203 09:57:21.883415 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2204 09:57:21.883511 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2205 09:57:21.886049
2206 09:57:21.886127
2207 09:57:21.886191
2208 09:57:21.886252 [DramC_TX_OE_Calibration] TA2
2209 09:57:21.889751 Original DQ_B0 (3 6) =30, OEN = 27
2210 09:57:21.892748 Original DQ_B1 (3 6) =30, OEN = 27
2211 09:57:21.896295 23, 0x0, End_B0=23 End_B1=23
2212 09:57:21.899541 24, 0x0, End_B0=24 End_B1=24
2213 09:57:21.902926 25, 0x0, End_B0=25 End_B1=25
2214 09:57:21.903099 26, 0x0, End_B0=26 End_B1=26
2215 09:57:21.906853 27, 0x0, End_B0=27 End_B1=27
2216 09:57:21.909956 28, 0x0, End_B0=28 End_B1=28
2217 09:57:21.913134 29, 0x0, End_B0=29 End_B1=29
2218 09:57:21.913293 30, 0x0, End_B0=30 End_B1=30
2219 09:57:21.916655 31, 0xFFFF, End_B0=30 End_B1=30
2220 09:57:21.923369 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2221 09:57:21.930093 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2222 09:57:21.930322
2223 09:57:21.930449
2224 09:57:21.930563 Write Rank1 MR23 =0x3f
2225 09:57:21.933489 [DQSOSC]
2226 09:57:21.939901 [DQSOSCAuto] RK1, (LSB)MR18= 0xd6d6, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2227 09:57:21.946480 CH0_RK1: MR19=0x202, MR18=0xD6D6, DQSOSC=433, MR23=63, INC=13, DEC=19
2228 09:57:21.946864 Write Rank1 MR23 =0x3f
2229 09:57:21.950508 [DQSOSC]
2230 09:57:21.956516 [DQSOSCAuto] RK1, (LSB)MR18= 0xd8d8, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2231 09:57:21.960016 CH0 RK1: MR19=202, MR18=D8D8
2232 09:57:21.963735 [RxdqsGatingPostProcess] freq 1600
2233 09:57:21.969994 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2234 09:57:21.970499 Rank: 0
2235 09:57:21.973675 best DQS0 dly(2T, 0.5T) = (2, 5)
2236 09:57:21.976980 best DQS1 dly(2T, 0.5T) = (2, 5)
2237 09:57:21.977503 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2238 09:57:21.980307 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2239 09:57:21.983675 Rank: 1
2240 09:57:21.986934 best DQS0 dly(2T, 0.5T) = (2, 6)
2241 09:57:21.987400 best DQS1 dly(2T, 0.5T) = (2, 6)
2242 09:57:21.990312 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2243 09:57:21.993385 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2244 09:57:22.000203 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2245 09:57:22.003546 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2246 09:57:22.007097 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2247 09:57:22.009808 Write Rank0 MR13 =0x59
2248 09:57:22.010290 ==
2249 09:57:22.013221 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2250 09:57:22.016625 fsp= 1, odt_onoff= 1, Byte mode= 0
2251 09:57:22.017057 ==
2252 09:57:22.020127 === u2Vref_new: 0x56 --> 0x3a
2253 09:57:22.023539 === u2Vref_new: 0x58 --> 0x58
2254 09:57:22.026585 === u2Vref_new: 0x5a --> 0x5a
2255 09:57:22.030346 === u2Vref_new: 0x5c --> 0x78
2256 09:57:22.033128 === u2Vref_new: 0x5e --> 0x7a
2257 09:57:22.036819 === u2Vref_new: 0x60 --> 0x90
2258 09:57:22.039981 [CA 0] Center 37 (12~63) winsize 52
2259 09:57:22.043258 [CA 1] Center 37 (12~63) winsize 52
2260 09:57:22.046594 [CA 2] Center 34 (6~63) winsize 58
2261 09:57:22.049714 [CA 3] Center 34 (6~63) winsize 58
2262 09:57:22.053610 [CA 4] Center 34 (6~63) winsize 58
2263 09:57:22.056451 [CA 5] Center 28 (-2~58) winsize 61
2264 09:57:22.057116
2265 09:57:22.059943 [CATrainingPosCal] consider 1 rank data
2266 09:57:22.063249 u2DelayCellTimex100 = 735/100 ps
2267 09:57:22.066865 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2268 09:57:22.070122 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2269 09:57:22.073456 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2270 09:57:22.076844 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2271 09:57:22.080197 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2272 09:57:22.083471 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2273 09:57:22.084002
2274 09:57:22.089941 CA PerBit enable=1, Macro0, CA PI delay=28
2275 09:57:22.090478 === u2Vref_new: 0x5e --> 0x7a
2276 09:57:22.090828
2277 09:57:22.093287 Vref(ca) range 1: 30
2278 09:57:22.093711
2279 09:57:22.096999 CS Dly= 11 (42-0-32)
2280 09:57:22.097527 Write Rank0 MR13 =0xd8
2281 09:57:22.100593 Write Rank0 MR13 =0xd8
2282 09:57:22.101120 Write Rank0 MR12 =0x5e
2283 09:57:22.103826 Write Rank1 MR13 =0x59
2284 09:57:22.104353 ==
2285 09:57:22.109791 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2286 09:57:22.113367 fsp= 1, odt_onoff= 1, Byte mode= 0
2287 09:57:22.113794 ==
2288 09:57:22.114131 === u2Vref_new: 0x56 --> 0x3a
2289 09:57:22.116811 === u2Vref_new: 0x58 --> 0x58
2290 09:57:22.120381 === u2Vref_new: 0x5a --> 0x5a
2291 09:57:22.123805 === u2Vref_new: 0x5c --> 0x78
2292 09:57:22.127034 === u2Vref_new: 0x5e --> 0x7a
2293 09:57:22.130216 === u2Vref_new: 0x60 --> 0x90
2294 09:57:22.133913 [CA 0] Center 37 (12~63) winsize 52
2295 09:57:22.136955 [CA 1] Center 37 (12~63) winsize 52
2296 09:57:22.140394 [CA 2] Center 35 (7~63) winsize 57
2297 09:57:22.143623 [CA 3] Center 34 (6~63) winsize 58
2298 09:57:22.146931 [CA 4] Center 34 (6~63) winsize 58
2299 09:57:22.150500 [CA 5] Center 27 (-3~57) winsize 61
2300 09:57:22.150923
2301 09:57:22.153819 [CATrainingPosCal] consider 2 rank data
2302 09:57:22.157004 u2DelayCellTimex100 = 735/100 ps
2303 09:57:22.160643 CA0 delay=37 (12~63),Diff = 10 PI (13 cell)
2304 09:57:22.163831 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2305 09:57:22.167307 CA2 delay=35 (7~63),Diff = 8 PI (10 cell)
2306 09:57:22.170575 CA3 delay=34 (6~63),Diff = 7 PI (9 cell)
2307 09:57:22.174143 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2308 09:57:22.177138 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2309 09:57:22.180353
2310 09:57:22.183765 CA PerBit enable=1, Macro0, CA PI delay=27
2311 09:57:22.184190 === u2Vref_new: 0x5e --> 0x7a
2312 09:57:22.184528
2313 09:57:22.187804 Vref(ca) range 1: 30
2314 09:57:22.188331
2315 09:57:22.190952 CS Dly= 11 (42-0-32)
2316 09:57:22.191535 Write Rank1 MR13 =0xd8
2317 09:57:22.193988 Write Rank1 MR13 =0xd8
2318 09:57:22.197456 Write Rank1 MR12 =0x5e
2319 09:57:22.200628 [RankSwap] Rank num 2, (Multi 1), Rank 0
2320 09:57:22.201156 Write Rank0 MR2 =0xad
2321 09:57:22.204168 [Write Leveling]
2322 09:57:22.207541 delay byte0 byte1 byte2 byte3
2323 09:57:22.207976
2324 09:57:22.208462 10 0 0
2325 09:57:22.208797 11 0 0
2326 09:57:22.210705 12 0 0
2327 09:57:22.211125 13 0 0
2328 09:57:22.213798 14 0 0
2329 09:57:22.214213 15 0 0
2330 09:57:22.217691 16 0 0
2331 09:57:22.218215 17 0 0
2332 09:57:22.218549 18 0 0
2333 09:57:22.220947 19 0 0
2334 09:57:22.221369 20 0 0
2335 09:57:22.223969 21 0 0
2336 09:57:22.224389 22 0 0
2337 09:57:22.224719 23 0 0
2338 09:57:22.227224 24 0 ff
2339 09:57:22.227719 25 0 ff
2340 09:57:22.230729 26 0 ff
2341 09:57:22.231265 27 0 ff
2342 09:57:22.233754 28 0 ff
2343 09:57:22.234283 29 0 ff
2344 09:57:22.237282 30 0 ff
2345 09:57:22.237711 31 0 ff
2346 09:57:22.238049 32 0 ff
2347 09:57:22.240998 33 ff ff
2348 09:57:22.241593 34 ff ff
2349 09:57:22.243900 35 ff ff
2350 09:57:22.244327 36 ff ff
2351 09:57:22.247124 37 ff ff
2352 09:57:22.247654 38 ff ff
2353 09:57:22.250506 39 ff ff
2354 09:57:22.254066 pass bytecount = 0xff (0xff: all bytes pass)
2355 09:57:22.254598
2356 09:57:22.254935 DQS0 dly: 33
2357 09:57:22.257510 DQS1 dly: 24
2358 09:57:22.258005 Write Rank0 MR2 =0x2d
2359 09:57:22.260403 [RankSwap] Rank num 2, (Multi 1), Rank 0
2360 09:57:22.264091 Write Rank0 MR1 =0xd6
2361 09:57:22.264515 [Gating]
2362 09:57:22.264846 ==
2363 09:57:22.270408 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2364 09:57:22.273974 fsp= 1, odt_onoff= 1, Byte mode= 0
2365 09:57:22.274399 ==
2366 09:57:22.277198 3 1 0 |3636 2c2b |(0 0)(11 11) |(0 0)(1 1)| 0
2367 09:57:22.280585 3 1 4 |2525 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2368 09:57:22.287580 3 1 8 |202 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2369 09:57:22.290910 3 1 12 |808 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2370 09:57:22.293926 3 1 16 |3635 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2371 09:57:22.300769 3 1 20 |3030 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2372 09:57:22.304071 3 1 24 |e0e 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2373 09:57:22.307098 3 1 28 |3434 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2374 09:57:22.310332 3 2 0 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2375 09:57:22.317422 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2376 09:57:22.320630 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2377 09:57:22.323813 3 2 12 |3434 2c2b |(10 10)(11 11) |(1 0)(1 0)| 0
2378 09:57:22.330661 3 2 16 |504 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2379 09:57:22.334109 3 2 20 |c0c 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2380 09:57:22.337052 3 2 24 |3d3d 1211 |(11 11)(11 11) |(1 1)(0 0)| 0
2381 09:57:22.344022 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2382 09:57:22.347470 3 3 0 |605 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2383 09:57:22.350522 3 3 4 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2384 09:57:22.354043 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2385 09:57:22.360795 3 3 12 |3c3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2386 09:57:22.363740 3 3 16 |1e1d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2387 09:57:22.367376 [Byte 1] Lead/lag Transition tap number (1)
2388 09:57:22.370871 3 3 20 |505 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2389 09:57:22.377483 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2390 09:57:22.380946 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2391 09:57:22.384298 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2392 09:57:22.390985 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2393 09:57:22.394200 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2394 09:57:22.397675 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2395 09:57:22.400687 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2396 09:57:22.407763 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2397 09:57:22.411206 3 4 20 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2398 09:57:22.414524 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2399 09:57:22.420690 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2400 09:57:22.424080 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 09:57:22.427714 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 09:57:22.434264 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 09:57:22.437252 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 09:57:22.440753 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2405 09:57:22.447552 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2406 09:57:22.450731 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2407 09:57:22.453883 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2408 09:57:22.460449 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2409 09:57:22.464142 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2410 09:57:22.467558 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2411 09:57:22.470684 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2412 09:57:22.476942 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2413 09:57:22.480823 [Byte 0] Lead/lag Transition tap number (2)
2414 09:57:22.484141 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2415 09:57:22.487031 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2416 09:57:22.494163 3 6 20 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2417 09:57:22.497062 [Byte 1] Lead/lag Transition tap number (2)
2418 09:57:22.500767 3 6 24 |4646 1918 |(0 0)(11 11) |(0 0)(0 0)| 0
2419 09:57:22.504020 [Byte 0]First pass (3, 6, 24)
2420 09:57:22.506908 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 09:57:22.510093 [Byte 1]First pass (3, 6, 28)
2422 09:57:22.514112 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2423 09:57:22.517354 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2424 09:57:22.523859 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2425 09:57:22.527053 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2426 09:57:22.530277 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2427 09:57:22.533520 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2428 09:57:22.540287 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2429 09:57:22.543576 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2430 09:57:22.547015 All bytes gating window > 1UI, Early break!
2431 09:57:22.547629
2432 09:57:22.550310 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2433 09:57:22.550867
2434 09:57:22.553605 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2435 09:57:22.554184
2436 09:57:22.554554
2437 09:57:22.554891
2438 09:57:22.559970 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2439 09:57:22.560428
2440 09:57:22.563213 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2441 09:57:22.563723
2442 09:57:22.564099
2443 09:57:22.566314 Write Rank0 MR1 =0x56
2444 09:57:22.566771
2445 09:57:22.567132 best RODT dly(2T, 0.5T) = (2, 3)
2446 09:57:22.567515
2447 09:57:22.569645 best RODT dly(2T, 0.5T) = (2, 3)
2448 09:57:22.570098 ==
2449 09:57:22.576940 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2450 09:57:22.579932 fsp= 1, odt_onoff= 1, Byte mode= 0
2451 09:57:22.580353 ==
2452 09:57:22.582990 Start DQ dly to find pass range UseTestEngine =0
2453 09:57:22.586430 x-axis: bit #, y-axis: DQ dly (-127~63)
2454 09:57:22.590308 RX Vref Scan = 0
2455 09:57:22.593568 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2456 09:57:22.596560 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2457 09:57:22.596986 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2458 09:57:22.599880 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2459 09:57:22.603189 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2460 09:57:22.606545 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2461 09:57:22.610043 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2462 09:57:22.613396 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2463 09:57:22.617010 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2464 09:57:22.619938 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2465 09:57:22.620407 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2466 09:57:22.623144 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2467 09:57:22.626911 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2468 09:57:22.630014 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2469 09:57:22.633348 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2470 09:57:22.636510 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2471 09:57:22.640317 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2472 09:57:22.643341 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2473 09:57:22.643855 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2474 09:57:22.646580 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2475 09:57:22.649915 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2476 09:57:22.653895 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2477 09:57:22.656922 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2478 09:57:22.660008 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2479 09:57:22.663389 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2480 09:57:22.663891 -1, [0] xxxxxxxx xoxxxxxo [MSB]
2481 09:57:22.666526 0, [0] xxxoxxxx ooxxxxxo [MSB]
2482 09:57:22.670194 1, [0] xxxoxxxx ooxxxxxo [MSB]
2483 09:57:22.673324 2, [0] xxooxxxx oooxxxxo [MSB]
2484 09:57:22.676620 3, [0] xxooxxxo oooxxxxo [MSB]
2485 09:57:22.679819 4, [0] oxoooxxo oooxooxo [MSB]
2486 09:57:22.680361 5, [0] oooooxoo ooooooxo [MSB]
2487 09:57:22.683570 6, [0] oooooooo ooooooxo [MSB]
2488 09:57:22.686854 32, [0] oooooooo ooooooox [MSB]
2489 09:57:22.690184 33, [0] oooooooo ooooooox [MSB]
2490 09:57:22.693189 34, [0] oooooooo ooooooox [MSB]
2491 09:57:22.696732 35, [0] oooxoooo xxooooox [MSB]
2492 09:57:22.700294 36, [0] oooxoooo xxooooox [MSB]
2493 09:57:22.701001 37, [0] ooxxoooo xxooooox [MSB]
2494 09:57:22.703299 38, [0] ooxxoooo xxooooox [MSB]
2495 09:57:22.706569 39, [0] ooxxooox xxooooox [MSB]
2496 09:57:22.709695 40, [0] oxxxxoox xxxoooox [MSB]
2497 09:57:22.713312 41, [0] oxxxxoox xxxxxxox [MSB]
2498 09:57:22.716210 42, [0] xxxxxxxx xxxxxxxx [MSB]
2499 09:57:22.719749 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
2500 09:57:22.722962 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2501 09:57:22.726362 iDelay=42, Bit 2, Center 19 (2 ~ 36) 35
2502 09:57:22.729651 iDelay=42, Bit 3, Center 17 (0 ~ 34) 35
2503 09:57:22.732756 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2504 09:57:22.736228 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2505 09:57:22.739332 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2506 09:57:22.742900 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2507 09:57:22.746003 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2508 09:57:22.749376 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2509 09:57:22.756098 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
2510 09:57:22.759094 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2511 09:57:22.762770 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2512 09:57:22.765954 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2513 09:57:22.769545 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
2514 09:57:22.772788 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2515 09:57:22.773367 ==
2516 09:57:22.778904 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2517 09:57:22.782850 fsp= 1, odt_onoff= 1, Byte mode= 0
2518 09:57:22.783383 ==
2519 09:57:22.783774 DQS Delay:
2520 09:57:22.784093 DQS0 = 0, DQS1 = 0
2521 09:57:22.785870 DQM Delay:
2522 09:57:22.786284 DQM0 = 20, DQM1 = 19
2523 09:57:22.789460 DQ Delay:
2524 09:57:22.792556 DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =17
2525 09:57:22.795827 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2526 09:57:22.796241 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2527 09:57:22.802290 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2528 09:57:22.802706
2529 09:57:22.803031
2530 09:57:22.803335 DramC Write-DBI off
2531 09:57:22.803708 ==
2532 09:57:22.809453 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2533 09:57:22.812425 fsp= 1, odt_onoff= 1, Byte mode= 0
2534 09:57:22.812848 ==
2535 09:57:22.815797 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2536 09:57:22.816214
2537 09:57:22.819317 Begin, DQ Scan Range 920~1176
2538 09:57:22.819871
2539 09:57:22.820209
2540 09:57:22.822574 TX Vref Scan disable
2541 09:57:22.825786 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2542 09:57:22.829030 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2543 09:57:22.831897 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2544 09:57:22.835549 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2545 09:57:22.838690 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2546 09:57:22.841887 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2547 09:57:22.845376 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2548 09:57:22.848588 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2549 09:57:22.851913 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2550 09:57:22.855592 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2551 09:57:22.858737 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2552 09:57:22.862244 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2553 09:57:22.865343 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2554 09:57:22.871780 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2555 09:57:22.875399 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2556 09:57:22.878718 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2557 09:57:22.881708 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2558 09:57:22.885616 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2559 09:57:22.888829 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2560 09:57:22.892049 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2561 09:57:22.895224 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2562 09:57:22.898659 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2563 09:57:22.902539 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2564 09:57:22.905855 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2565 09:57:22.908872 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2566 09:57:22.912094 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2567 09:57:22.915592 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2568 09:57:22.918874 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2569 09:57:22.922053 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2570 09:57:22.925480 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2571 09:57:22.932419 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2572 09:57:22.935351 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2573 09:57:22.938548 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2574 09:57:22.942326 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2575 09:57:22.945343 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2576 09:57:22.948411 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2577 09:57:22.952315 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2578 09:57:22.955454 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2579 09:57:22.958586 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2580 09:57:22.961809 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2581 09:57:22.965557 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2582 09:57:22.968626 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2583 09:57:22.972088 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2584 09:57:22.975142 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2585 09:57:22.978656 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2586 09:57:22.982183 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2587 09:57:22.984988 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2588 09:57:22.988521 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2589 09:57:22.991911 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2590 09:57:22.995110 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2591 09:57:22.999012 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2592 09:57:23.005688 971 |3 6 11|[0] xxxxxxxx oooxoxoo [MSB]
2593 09:57:23.008796 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2594 09:57:23.011972 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2595 09:57:23.015497 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2596 09:57:23.018898 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2597 09:57:23.022206 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2598 09:57:23.025229 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2599 09:57:23.028428 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2600 09:57:23.031936 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2601 09:57:23.035265 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2602 09:57:23.038475 981 |3 6 21|[0] xxxxxxxo oooooooo [MSB]
2603 09:57:23.041799 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2604 09:57:23.045183 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2605 09:57:23.051930 987 |3 6 27|[0] oooooooo oxooooox [MSB]
2606 09:57:23.055363 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2607 09:57:23.058401 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
2608 09:57:23.061850 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2609 09:57:23.065180 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2610 09:57:23.068719 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2611 09:57:23.072152 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2612 09:57:23.075466 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2613 09:57:23.078428 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2614 09:57:23.081564 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2615 09:57:23.084684 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2616 09:57:23.088381 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2617 09:57:23.091627 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2618 09:57:23.095083 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2619 09:57:23.098589 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
2620 09:57:23.105140 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2621 09:57:23.108323 Byte0, DQ PI dly=991, DQM PI dly= 991
2622 09:57:23.111565 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2623 09:57:23.111992
2624 09:57:23.114918 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2625 09:57:23.115476
2626 09:57:23.118352 Byte1, DQ PI dly=979, DQM PI dly= 979
2627 09:57:23.124812 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2628 09:57:23.125370
2629 09:57:23.128284 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2630 09:57:23.128712
2631 09:57:23.129052 ==
2632 09:57:23.134605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2633 09:57:23.138073 fsp= 1, odt_onoff= 1, Byte mode= 0
2634 09:57:23.138492 ==
2635 09:57:23.141667 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2636 09:57:23.142185
2637 09:57:23.144986 Begin, DQ Scan Range 955~1019
2638 09:57:23.145503 Write Rank0 MR14 =0x0
2639 09:57:23.155084
2640 09:57:23.155704 CH=1, VrefRange= 0, VrefLevel = 0
2641 09:57:23.161089 TX Bit0 (984~999) 16 991, Bit8 (972~984) 13 978,
2642 09:57:23.164717 TX Bit1 (983~997) 15 990, Bit9 (973~983) 11 978,
2643 09:57:23.171544 TX Bit2 (981~996) 16 988, Bit10 (975~986) 12 980,
2644 09:57:23.174540 TX Bit3 (980~992) 13 986, Bit11 (976~986) 11 981,
2645 09:57:23.177853 TX Bit4 (983~997) 15 990, Bit12 (975~986) 12 980,
2646 09:57:23.184434 TX Bit5 (985~998) 14 991, Bit13 (977~987) 11 982,
2647 09:57:23.187680 TX Bit6 (984~998) 15 991, Bit14 (975~986) 12 980,
2648 09:57:23.191194 TX Bit7 (983~996) 14 989, Bit15 (969~979) 11 974,
2649 09:57:23.191901
2650 09:57:23.194160 Write Rank0 MR14 =0x2
2651 09:57:23.204058
2652 09:57:23.204571 CH=1, VrefRange= 0, VrefLevel = 2
2653 09:57:23.210282 TX Bit0 (984~1000) 17 992, Bit8 (972~984) 13 978,
2654 09:57:23.213769 TX Bit1 (983~996) 14 989, Bit9 (972~983) 12 977,
2655 09:57:23.220578 TX Bit2 (981~997) 17 989, Bit10 (975~986) 12 980,
2656 09:57:23.223633 TX Bit3 (979~992) 14 985, Bit11 (975~987) 13 981,
2657 09:57:23.227177 TX Bit4 (982~998) 17 990, Bit12 (975~987) 13 981,
2658 09:57:23.233638 TX Bit5 (984~998) 15 991, Bit13 (976~987) 12 981,
2659 09:57:23.237370 TX Bit6 (983~998) 16 990, Bit14 (975~986) 12 980,
2660 09:57:23.240280 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2661 09:57:23.243759
2662 09:57:23.244315 Write Rank0 MR14 =0x4
2663 09:57:23.253389
2664 09:57:23.253944 CH=1, VrefRange= 0, VrefLevel = 4
2665 09:57:23.259607 TX Bit0 (984~1000) 17 992, Bit8 (971~985) 15 978,
2666 09:57:23.262813 TX Bit1 (983~998) 16 990, Bit9 (972~984) 13 978,
2667 09:57:23.269429 TX Bit2 (980~998) 19 989, Bit10 (975~987) 13 981,
2668 09:57:23.272911 TX Bit3 (979~993) 15 986, Bit11 (975~988) 14 981,
2669 09:57:23.276365 TX Bit4 (982~999) 18 990, Bit12 (974~988) 15 981,
2670 09:57:23.282795 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2671 09:57:23.286066 TX Bit6 (983~998) 16 990, Bit14 (974~988) 15 981,
2672 09:57:23.289364 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2673 09:57:23.289888
2674 09:57:23.292860 Write Rank0 MR14 =0x6
2675 09:57:23.302336
2676 09:57:23.302896 CH=1, VrefRange= 0, VrefLevel = 6
2677 09:57:23.308743 TX Bit0 (983~1001) 19 992, Bit8 (971~985) 15 978,
2678 09:57:23.312534 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2679 09:57:23.319097 TX Bit2 (979~998) 20 988, Bit10 (974~987) 14 980,
2680 09:57:23.322314 TX Bit3 (978~994) 17 986, Bit11 (975~989) 15 982,
2681 09:57:23.325588 TX Bit4 (982~999) 18 990, Bit12 (974~989) 16 981,
2682 09:57:23.332142 TX Bit5 (984~1000) 17 992, Bit13 (975~989) 15 982,
2683 09:57:23.335671 TX Bit6 (983~999) 17 991, Bit14 (974~989) 16 981,
2684 09:57:23.339123 TX Bit7 (983~998) 16 990, Bit15 (969~983) 15 976,
2685 09:57:23.342539
2686 09:57:23.343094 Write Rank0 MR14 =0x8
2687 09:57:23.351583
2688 09:57:23.352135 CH=1, VrefRange= 0, VrefLevel = 8
2689 09:57:23.357735 TX Bit0 (983~1001) 19 992, Bit8 (970~985) 16 977,
2690 09:57:23.361075 TX Bit1 (982~999) 18 990, Bit9 (972~985) 14 978,
2691 09:57:23.367951 TX Bit2 (979~998) 20 988, Bit10 (973~989) 17 981,
2692 09:57:23.371359 TX Bit3 (978~994) 17 986, Bit11 (975~990) 16 982,
2693 09:57:23.374748 TX Bit4 (982~999) 18 990, Bit12 (973~989) 17 981,
2694 09:57:23.381516 TX Bit5 (984~1000) 17 992, Bit13 (975~990) 16 982,
2695 09:57:23.384672 TX Bit6 (982~999) 18 990, Bit14 (974~990) 17 982,
2696 09:57:23.387978 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2697 09:57:23.391167
2698 09:57:23.391893 Write Rank0 MR14 =0xa
2699 09:57:23.400848
2700 09:57:23.404287 CH=1, VrefRange= 0, VrefLevel = 10
2701 09:57:23.407568 TX Bit0 (983~1001) 19 992, Bit8 (970~986) 17 978,
2702 09:57:23.410589 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
2703 09:57:23.416952 TX Bit2 (979~999) 21 989, Bit10 (973~990) 18 981,
2704 09:57:23.420461 TX Bit3 (978~996) 19 987, Bit11 (974~991) 18 982,
2705 09:57:23.423571 TX Bit4 (981~1000) 20 990, Bit12 (973~991) 19 982,
2706 09:57:23.430862 TX Bit5 (984~1001) 18 992, Bit13 (975~991) 17 983,
2707 09:57:23.434126 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2708 09:57:23.440865 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2709 09:57:23.441427
2710 09:57:23.441798 Write Rank0 MR14 =0xc
2711 09:57:23.450646
2712 09:57:23.454238 CH=1, VrefRange= 0, VrefLevel = 12
2713 09:57:23.457667 TX Bit0 (982~1002) 21 992, Bit8 (970~986) 17 978,
2714 09:57:23.460310 TX Bit1 (981~1000) 20 990, Bit9 (970~985) 16 977,
2715 09:57:23.467020 TX Bit2 (979~999) 21 989, Bit10 (973~990) 18 981,
2716 09:57:23.470212 TX Bit3 (977~996) 20 986, Bit11 (973~991) 19 982,
2717 09:57:23.474389 TX Bit4 (981~1001) 21 991, Bit12 (972~992) 21 982,
2718 09:57:23.480669 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2719 09:57:23.484030 TX Bit6 (981~1000) 20 990, Bit14 (972~992) 21 982,
2720 09:57:23.490745 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2721 09:57:23.491268
2722 09:57:23.493960 wait MRW command Rank0 MR14 =0xe fired (1)
2723 09:57:23.494478 Write Rank0 MR14 =0xe
2724 09:57:23.504482
2725 09:57:23.507510 CH=1, VrefRange= 0, VrefLevel = 14
2726 09:57:23.511579 TX Bit0 (982~1003) 22 992, Bit8 (970~987) 18 978,
2727 09:57:23.514413 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2728 09:57:23.520803 TX Bit2 (978~999) 22 988, Bit10 (971~991) 21 981,
2729 09:57:23.524338 TX Bit3 (977~997) 21 987, Bit11 (974~991) 18 982,
2730 09:57:23.527749 TX Bit4 (981~1001) 21 991, Bit12 (972~992) 21 982,
2731 09:57:23.534438 TX Bit5 (983~1002) 20 992, Bit13 (974~991) 18 982,
2732 09:57:23.537678 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2733 09:57:23.544277 TX Bit7 (981~1000) 20 990, Bit15 (968~985) 18 976,
2734 09:57:23.544847
2735 09:57:23.545218 Write Rank0 MR14 =0x10
2736 09:57:23.555082
2737 09:57:23.555674 CH=1, VrefRange= 0, VrefLevel = 16
2738 09:57:23.561658 TX Bit0 (982~1003) 22 992, Bit8 (970~988) 19 979,
2739 09:57:23.564565 TX Bit1 (980~1001) 22 990, Bit9 (970~986) 17 978,
2740 09:57:23.571186 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2741 09:57:23.575177 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2742 09:57:23.577849 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2743 09:57:23.584755 TX Bit5 (983~1002) 20 992, Bit13 (974~992) 19 983,
2744 09:57:23.588079 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2745 09:57:23.594923 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2746 09:57:23.595529
2747 09:57:23.595902 Write Rank0 MR14 =0x12
2748 09:57:23.604948
2749 09:57:23.608195 CH=1, VrefRange= 0, VrefLevel = 18
2750 09:57:23.611485 TX Bit0 (982~1004) 23 993, Bit8 (969~988) 20 978,
2751 09:57:23.614802 TX Bit1 (980~1001) 22 990, Bit9 (970~987) 18 978,
2752 09:57:23.621631 TX Bit2 (978~1001) 24 989, Bit10 (971~991) 21 981,
2753 09:57:23.624896 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2754 09:57:23.628277 TX Bit4 (980~1002) 23 991, Bit12 (972~993) 22 982,
2755 09:57:23.634880 TX Bit5 (982~1002) 21 992, Bit13 (973~992) 20 982,
2756 09:57:23.638627 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2757 09:57:23.644917 TX Bit7 (981~1001) 21 991, Bit15 (967~986) 20 976,
2758 09:57:23.645434
2759 09:57:23.645764 Write Rank0 MR14 =0x14
2760 09:57:23.656061
2761 09:57:23.658769 CH=1, VrefRange= 0, VrefLevel = 20
2762 09:57:23.661873 TX Bit0 (981~1004) 24 992, Bit8 (970~990) 21 980,
2763 09:57:23.665590 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
2764 09:57:23.671987 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2765 09:57:23.675681 TX Bit3 (977~998) 22 987, Bit11 (971~992) 22 981,
2766 09:57:23.678778 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2767 09:57:23.685119 TX Bit5 (982~1003) 22 992, Bit13 (973~992) 20 982,
2768 09:57:23.689159 TX Bit6 (980~1002) 23 991, Bit14 (971~993) 23 982,
2769 09:57:23.695628 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2770 09:57:23.696193
2771 09:57:23.696563 Write Rank0 MR14 =0x16
2772 09:57:23.706521
2773 09:57:23.709664 CH=1, VrefRange= 0, VrefLevel = 22
2774 09:57:23.712829 TX Bit0 (982~1005) 24 993, Bit8 (969~990) 22 979,
2775 09:57:23.715903 TX Bit1 (979~1002) 24 990, Bit9 (969~988) 20 978,
2776 09:57:23.723086 TX Bit2 (977~1001) 25 989, Bit10 (971~992) 22 981,
2777 09:57:23.726285 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2778 09:57:23.729209 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2779 09:57:23.736328 TX Bit5 (981~1003) 23 992, Bit13 (972~993) 22 982,
2780 09:57:23.739444 TX Bit6 (980~1002) 23 991, Bit14 (971~993) 23 982,
2781 09:57:23.746200 TX Bit7 (979~1002) 24 990, Bit15 (967~987) 21 977,
2782 09:57:23.746715
2783 09:57:23.747046 Write Rank0 MR14 =0x18
2784 09:57:23.757154
2785 09:57:23.760442 CH=1, VrefRange= 0, VrefLevel = 24
2786 09:57:23.763913 TX Bit0 (980~1006) 27 993, Bit8 (969~991) 23 980,
2787 09:57:23.766861 TX Bit1 (978~1002) 25 990, Bit9 (969~989) 21 979,
2788 09:57:23.773721 TX Bit2 (977~1001) 25 989, Bit10 (970~992) 23 981,
2789 09:57:23.777321 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2790 09:57:23.779910 TX Bit4 (979~1003) 25 991, Bit12 (971~993) 23 982,
2791 09:57:23.787203 TX Bit5 (981~1004) 24 992, Bit13 (972~993) 22 982,
2792 09:57:23.790549 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2793 09:57:23.796534 TX Bit7 (979~1002) 24 990, Bit15 (967~987) 21 977,
2794 09:57:23.797007
2795 09:57:23.797474 Write Rank0 MR14 =0x1a
2796 09:57:23.807557
2797 09:57:23.810945 CH=1, VrefRange= 0, VrefLevel = 26
2798 09:57:23.813838 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2799 09:57:23.817713 TX Bit1 (979~1003) 25 991, Bit9 (969~990) 22 979,
2800 09:57:23.824346 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2801 09:57:23.827618 TX Bit3 (976~1000) 25 988, Bit11 (971~993) 23 982,
2802 09:57:23.831042 TX Bit4 (978~1004) 27 991, Bit12 (970~994) 25 982,
2803 09:57:23.837905 TX Bit5 (980~1005) 26 992, Bit13 (972~993) 22 982,
2804 09:57:23.840779 TX Bit6 (979~1003) 25 991, Bit14 (970~994) 25 982,
2805 09:57:23.847649 TX Bit7 (979~1002) 24 990, Bit15 (966~988) 23 977,
2806 09:57:23.848221
2807 09:57:23.848590 Write Rank0 MR14 =0x1c
2808 09:57:23.858659
2809 09:57:23.861503 CH=1, VrefRange= 0, VrefLevel = 28
2810 09:57:23.864831 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2811 09:57:23.868229 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2812 09:57:23.875250 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2813 09:57:23.878456 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2814 09:57:23.881384 TX Bit4 (978~1005) 28 991, Bit12 (970~994) 25 982,
2815 09:57:23.888093 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2816 09:57:23.891258 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2817 09:57:23.897917 TX Bit7 (979~1003) 25 991, Bit15 (966~987) 22 976,
2818 09:57:23.898471
2819 09:57:23.898943 Write Rank0 MR14 =0x1e
2820 09:57:23.908979
2821 09:57:23.909612 CH=1, VrefRange= 0, VrefLevel = 30
2822 09:57:23.915606 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2823 09:57:23.918935 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2824 09:57:23.925664 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2825 09:57:23.928922 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2826 09:57:23.931994 TX Bit4 (979~1005) 27 992, Bit12 (970~993) 24 981,
2827 09:57:23.939019 TX Bit5 (980~1006) 27 993, Bit13 (971~994) 24 982,
2828 09:57:23.942441 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2829 09:57:23.949128 TX Bit7 (978~1004) 27 991, Bit15 (965~987) 23 976,
2830 09:57:23.949574
2831 09:57:23.949912 Write Rank0 MR14 =0x20
2832 09:57:23.960225
2833 09:57:23.963530 CH=1, VrefRange= 0, VrefLevel = 32
2834 09:57:23.966737 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2835 09:57:23.969888 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2836 09:57:23.976295 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2837 09:57:23.979911 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2838 09:57:23.983201 TX Bit4 (979~1005) 27 992, Bit12 (970~993) 24 981,
2839 09:57:23.989865 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2840 09:57:23.992961 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2841 09:57:23.999945 TX Bit7 (978~1004) 27 991, Bit15 (964~987) 24 975,
2842 09:57:24.000465
2843 09:57:24.000797 Write Rank0 MR14 =0x22
2844 09:57:24.011122
2845 09:57:24.014324 CH=1, VrefRange= 0, VrefLevel = 34
2846 09:57:24.017494 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2847 09:57:24.021179 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2848 09:57:24.027620 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2849 09:57:24.031182 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2850 09:57:24.034377 TX Bit4 (979~1005) 27 992, Bit12 (970~993) 24 981,
2851 09:57:24.040958 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2852 09:57:24.044158 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2853 09:57:24.050992 TX Bit7 (978~1004) 27 991, Bit15 (964~987) 24 975,
2854 09:57:24.051607
2855 09:57:24.051983 Write Rank0 MR14 =0x24
2856 09:57:24.061492
2857 09:57:24.064918 CH=1, VrefRange= 0, VrefLevel = 36
2858 09:57:24.068101 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2859 09:57:24.071462 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2860 09:57:24.078428 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2861 09:57:24.081705 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2862 09:57:24.085232 TX Bit4 (979~1005) 27 992, Bit12 (970~993) 24 981,
2863 09:57:24.091673 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2864 09:57:24.094732 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2865 09:57:24.101617 TX Bit7 (978~1004) 27 991, Bit15 (964~987) 24 975,
2866 09:57:24.102180
2867 09:57:24.102549 Write Rank0 MR14 =0x26
2868 09:57:24.112382
2869 09:57:24.112936 CH=1, VrefRange= 0, VrefLevel = 38
2870 09:57:24.119044 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2871 09:57:24.122091 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2872 09:57:24.129001 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2873 09:57:24.132158 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2874 09:57:24.135802 TX Bit4 (979~1005) 27 992, Bit12 (970~993) 24 981,
2875 09:57:24.141990 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2876 09:57:24.145317 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2877 09:57:24.152336 TX Bit7 (978~1004) 27 991, Bit15 (964~987) 24 975,
2878 09:57:24.152894
2879 09:57:24.153265
2880 09:57:24.155740 TX Vref found, early break! 375< 388
2881 09:57:24.158612 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2882 09:57:24.161864 u1DelayCellOfst[0]=5 cells (4 PI)
2883 09:57:24.165524 u1DelayCellOfst[1]=3 cells (3 PI)
2884 09:57:24.168666 u1DelayCellOfst[2]=1 cells (1 PI)
2885 09:57:24.172114 u1DelayCellOfst[3]=0 cells (0 PI)
2886 09:57:24.175307 u1DelayCellOfst[4]=5 cells (4 PI)
2887 09:57:24.178724 u1DelayCellOfst[5]=5 cells (4 PI)
2888 09:57:24.182000 u1DelayCellOfst[6]=3 cells (3 PI)
2889 09:57:24.182464 u1DelayCellOfst[7]=3 cells (3 PI)
2890 09:57:24.185601 Byte0, DQ PI dly=988, DQM PI dly= 990
2891 09:57:24.192372 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2892 09:57:24.192897
2893 09:57:24.195801 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2894 09:57:24.196330
2895 09:57:24.198871 u1DelayCellOfst[8]=6 cells (5 PI)
2896 09:57:24.202092 u1DelayCellOfst[9]=6 cells (5 PI)
2897 09:57:24.205396 u1DelayCellOfst[10]=7 cells (6 PI)
2898 09:57:24.208777 u1DelayCellOfst[11]=9 cells (7 PI)
2899 09:57:24.212046 u1DelayCellOfst[12]=7 cells (6 PI)
2900 09:57:24.214981 u1DelayCellOfst[13]=9 cells (7 PI)
2901 09:57:24.218813 u1DelayCellOfst[14]=7 cells (6 PI)
2902 09:57:24.221735 u1DelayCellOfst[15]=0 cells (0 PI)
2903 09:57:24.225154 Byte1, DQ PI dly=975, DQM PI dly= 978
2904 09:57:24.228493 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2905 09:57:24.228919
2906 09:57:24.231525 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2907 09:57:24.231952
2908 09:57:24.235377 Write Rank0 MR14 =0x20
2909 09:57:24.235942
2910 09:57:24.238676 Final TX Range 0 Vref 32
2911 09:57:24.239256
2912 09:57:24.245328 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2913 09:57:24.245850
2914 09:57:24.252151 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2915 09:57:24.258920 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2916 09:57:24.265140 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2917 09:57:24.265604 Write Rank0 MR3 =0xb0
2918 09:57:24.268408 DramC Write-DBI on
2919 09:57:24.269117 ==
2920 09:57:24.275016 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2921 09:57:24.275635 fsp= 1, odt_onoff= 1, Byte mode= 0
2922 09:57:24.278070 ==
2923 09:57:24.281388 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2924 09:57:24.281851
2925 09:57:24.285024 Begin, DQ Scan Range 698~762
2926 09:57:24.285608
2927 09:57:24.285977
2928 09:57:24.286365 TX Vref Scan disable
2929 09:57:24.288638 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2930 09:57:24.294918 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2931 09:57:24.298073 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2932 09:57:24.301407 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2933 09:57:24.304664 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2934 09:57:24.307818 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2935 09:57:24.311175 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2936 09:57:24.314737 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2937 09:57:24.318070 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2938 09:57:24.321349 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2939 09:57:24.324370 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2940 09:57:24.328216 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2941 09:57:24.331175 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2942 09:57:24.334654 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2943 09:57:24.337617 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2944 09:57:24.341651 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2945 09:57:24.344689 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2946 09:57:24.348004 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2947 09:57:24.350943 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2948 09:57:24.354329 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2949 09:57:24.361198 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2950 09:57:24.364431 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2951 09:57:24.368168 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2952 09:57:24.370975 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2953 09:57:24.374605 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2954 09:57:24.381045 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2955 09:57:24.384791 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2956 09:57:24.387482 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2957 09:57:24.391056 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2958 09:57:24.394430 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2959 09:57:24.397784 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2960 09:57:24.400856 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2961 09:57:24.404723 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2962 09:57:24.407798 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2963 09:57:24.411374 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2964 09:57:24.414495 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2965 09:57:24.417445 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2966 09:57:24.420673 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2967 09:57:24.424327 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2968 09:57:24.427908 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2969 09:57:24.430989 Byte0, DQ PI dly=736, DQM PI dly= 736
2970 09:57:24.437969 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2971 09:57:24.438503
2972 09:57:24.440871 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2973 09:57:24.441381
2974 09:57:24.444055 Byte1, DQ PI dly=724, DQM PI dly= 724
2975 09:57:24.447711 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2976 09:57:24.448244
2977 09:57:24.454058 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2978 09:57:24.454488
2979 09:57:24.461092 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2980 09:57:24.467521 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2981 09:57:24.474261 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2982 09:57:24.477695 Write Rank0 MR3 =0x30
2983 09:57:24.478214 DramC Write-DBI off
2984 09:57:24.478556
2985 09:57:24.478870 [DATLAT]
2986 09:57:24.481192 Freq=1600, CH1 RK0, use_rxtx_scan=0
2987 09:57:24.481727
2988 09:57:24.483916 DATLAT Default: 0xf
2989 09:57:24.484387 7, 0xFFFF, sum=0
2990 09:57:24.487456 8, 0xFFFF, sum=0
2991 09:57:24.488029 9, 0xFFFF, sum=0
2992 09:57:24.490920 10, 0xFFFF, sum=0
2993 09:57:24.491548 11, 0xFFFF, sum=0
2994 09:57:24.494769 12, 0xFFFF, sum=0
2995 09:57:24.495344 13, 0xFFFF, sum=0
2996 09:57:24.498120 14, 0x0, sum=1
2997 09:57:24.498713 15, 0x0, sum=2
2998 09:57:24.500713 16, 0x0, sum=3
2999 09:57:24.501187 17, 0x0, sum=4
3000 09:57:24.504070 pattern=2 first_step=14 total pass=5 best_step=16
3001 09:57:24.504539 ==
3002 09:57:24.510812 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3003 09:57:24.514295 fsp= 1, odt_onoff= 1, Byte mode= 0
3004 09:57:24.514838 ==
3005 09:57:24.517573 Start DQ dly to find pass range UseTestEngine =1
3006 09:57:24.520721 x-axis: bit #, y-axis: DQ dly (-127~63)
3007 09:57:24.523986 RX Vref Scan = 1
3008 09:57:24.631071
3009 09:57:24.631701 RX Vref found, early break!
3010 09:57:24.632079
3011 09:57:24.637403 Final RX Vref 11, apply to both rank0 and 1
3012 09:57:24.637956 ==
3013 09:57:24.640195 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3014 09:57:24.643750 fsp= 1, odt_onoff= 1, Byte mode= 0
3015 09:57:24.644222 ==
3016 09:57:24.644591 DQS Delay:
3017 09:57:24.647363 DQS0 = 0, DQS1 = 0
3018 09:57:24.647966 DQM Delay:
3019 09:57:24.651009 DQM0 = 20, DQM1 = 19
3020 09:57:24.651634 DQ Delay:
3021 09:57:24.653833 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3022 09:57:24.657094 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3023 09:57:24.660471 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3024 09:57:24.664111 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =14
3025 09:57:24.664583
3026 09:57:24.665013
3027 09:57:24.665366
3028 09:57:24.666799 [DramC_TX_OE_Calibration] TA2
3029 09:57:24.670553 Original DQ_B0 (3 6) =30, OEN = 27
3030 09:57:24.673310 Original DQ_B1 (3 6) =30, OEN = 27
3031 09:57:24.676921 23, 0x0, End_B0=23 End_B1=23
3032 09:57:24.677450 24, 0x0, End_B0=24 End_B1=24
3033 09:57:24.679986 25, 0x0, End_B0=25 End_B1=25
3034 09:57:24.683640 26, 0x0, End_B0=26 End_B1=26
3035 09:57:24.686742 27, 0x0, End_B0=27 End_B1=27
3036 09:57:24.690182 28, 0x0, End_B0=28 End_B1=28
3037 09:57:24.690708 29, 0x0, End_B0=29 End_B1=29
3038 09:57:24.693583 30, 0x0, End_B0=30 End_B1=30
3039 09:57:24.696623 31, 0xFFFF, End_B0=30 End_B1=30
3040 09:57:24.703261 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3041 09:57:24.706993 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3042 09:57:24.707586
3043 09:57:24.707934
3044 09:57:24.710512 Write Rank0 MR23 =0x3f
3045 09:57:24.711031 [DQSOSC]
3046 09:57:24.719650 [DQSOSCAuto] RK0, (LSB)MR18= 0xbcbc, (MSB)MR19= 0x202, tDQSOscB0 = 450 ps tDQSOscB1 = 450 ps
3047 09:57:24.727143 CH1_RK0: MR19=0x202, MR18=0xBCBC, DQSOSC=450, MR23=63, INC=12, DEC=18
3048 09:57:24.727713 Write Rank0 MR23 =0x3f
3049 09:57:24.728058 [DQSOSC]
3050 09:57:24.737019 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3051 09:57:24.740389 CH1 RK0: MR19=202, MR18=C0C0
3052 09:57:24.743340 [RankSwap] Rank num 2, (Multi 1), Rank 1
3053 09:57:24.743801 Write Rank0 MR2 =0xad
3054 09:57:24.746945 [Write Leveling]
3055 09:57:24.750330 delay byte0 byte1 byte2 byte3
3056 09:57:24.750846
3057 09:57:24.751184 10 0 0
3058 09:57:24.753607 11 0 0
3059 09:57:24.754127 12 0 0
3060 09:57:24.754470 13 0 0
3061 09:57:24.756437 14 0 0
3062 09:57:24.756869 15 0 0
3063 09:57:24.759857 16 0 0
3064 09:57:24.760387 17 0 0
3065 09:57:24.763012 18 0 0
3066 09:57:24.763476 19 0 0
3067 09:57:24.763836 20 0 0
3068 09:57:24.766708 21 0 0
3069 09:57:24.767237 22 0 0
3070 09:57:24.769331 23 0 0
3071 09:57:24.769765 24 0 0
3072 09:57:24.770106 25 0 ff
3073 09:57:24.773349 26 0 ff
3074 09:57:24.773882 27 0 ff
3075 09:57:24.776334 28 0 ff
3076 09:57:24.776838 29 0 ff
3077 09:57:24.779339 30 0 ff
3078 09:57:24.779843 31 0 ff
3079 09:57:24.783026 32 0 ff
3080 09:57:24.783597 33 0 ff
3081 09:57:24.783953 34 ff ff
3082 09:57:24.786288 35 ff ff
3083 09:57:24.786717 36 ff ff
3084 09:57:24.789627 37 ff ff
3085 09:57:24.790060 38 ff ff
3086 09:57:24.792795 39 ff ff
3087 09:57:24.793225 40 ff ff
3088 09:57:24.799504 pass bytecount = 0xff (0xff: all bytes pass)
3089 09:57:24.799934
3090 09:57:24.800271 DQS0 dly: 34
3091 09:57:24.800656 DQS1 dly: 25
3092 09:57:24.802684 Write Rank0 MR2 =0x2d
3093 09:57:24.805835 [RankSwap] Rank num 2, (Multi 1), Rank 0
3094 09:57:24.809485 Write Rank1 MR1 =0xd6
3095 09:57:24.810006 [Gating]
3096 09:57:24.810342 ==
3097 09:57:24.812779 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3098 09:57:24.815922 fsp= 1, odt_onoff= 1, Byte mode= 0
3099 09:57:24.819591 ==
3100 09:57:24.822965 3 1 0 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
3101 09:57:24.825823 3 1 4 |3635 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3102 09:57:24.829387 3 1 8 |3535 2c2b |(10 10)(11 11) |(0 1)(1 1)| 0
3103 09:57:24.836119 3 1 12 |3635 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3104 09:57:24.838871 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3105 09:57:24.842701 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3106 09:57:24.849433 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3107 09:57:24.852834 3 1 28 |403 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3108 09:57:24.856136 3 2 0 |3434 2c2b |(0 0)(11 11) |(1 1)(1 0)| 0
3109 09:57:24.862254 3 2 4 |1f1e 2c2b |(11 1)(11 11) |(1 1)(1 0)| 0
3110 09:57:24.865537 3 2 8 |3434 2c2b |(1 1)(11 11) |(1 1)(1 0)| 0
3111 09:57:24.868948 3 2 12 |3d3c 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
3112 09:57:24.872263 3 2 16 |3d3c 504 |(11 11)(11 11) |(1 1)(0 0)| 0
3113 09:57:24.879268 3 2 20 |1a19 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3114 09:57:24.882593 3 2 24 |3a3a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3115 09:57:24.885375 3 2 28 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3116 09:57:24.892330 3 3 0 |3c3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3117 09:57:24.895358 3 3 4 |3b3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3118 09:57:24.899197 3 3 8 |b0a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3119 09:57:24.905631 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3120 09:57:24.908554 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3121 09:57:24.912116 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3122 09:57:24.915373 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3123 09:57:24.922003 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3124 09:57:24.925449 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3125 09:57:24.928773 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3126 09:57:24.935057 3 4 4 |403 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3127 09:57:24.938816 3 4 8 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3128 09:57:24.941800 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3129 09:57:24.949093 3 4 16 |3d3d e0e |(11 11)(11 11) |(1 1)(1 1)| 0
3130 09:57:24.951954 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3131 09:57:24.955103 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3132 09:57:24.961319 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3133 09:57:24.965129 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3134 09:57:24.968632 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3135 09:57:24.971837 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3136 09:57:24.978214 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3137 09:57:24.981353 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3138 09:57:24.984639 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3139 09:57:24.991709 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3140 09:57:24.994470 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3141 09:57:24.998538 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3142 09:57:25.005209 [Byte 0] Lead/lag Transition tap number (2)
3143 09:57:25.008220 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3144 09:57:25.011622 [Byte 1] Lead/lag falling Transition (3, 6, 0)
3145 09:57:25.015360 3 6 4 |1010 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3146 09:57:25.021358 3 6 8 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
3147 09:57:25.021884 [Byte 0]First pass (3, 6, 8)
3148 09:57:25.028308 [Byte 1] Lead/lag Transition tap number (3)
3149 09:57:25.031519 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3150 09:57:25.035227 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3151 09:57:25.038115 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3152 09:57:25.041819 [Byte 1]First pass (3, 6, 20)
3153 09:57:25.045312 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3154 09:57:25.051531 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3155 09:57:25.054922 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3156 09:57:25.058346 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3157 09:57:25.061098 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3158 09:57:25.064887 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3159 09:57:25.071606 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3160 09:57:25.074773 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3161 09:57:25.078151 All bytes gating window > 1UI, Early break!
3162 09:57:25.078711
3163 09:57:25.081273 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3164 09:57:25.081741
3165 09:57:25.084486 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
3166 09:57:25.084953
3167 09:57:25.085321
3168 09:57:25.085657
3169 09:57:25.091116 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3170 09:57:25.091874
3171 09:57:25.094667 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3172 09:57:25.095221
3173 09:57:25.095676
3174 09:57:25.096028 Write Rank1 MR1 =0x56
3175 09:57:25.096362
3176 09:57:25.097963 best RODT dly(2T, 0.5T) = (2, 2)
3177 09:57:25.098423
3178 09:57:25.101130 best RODT dly(2T, 0.5T) = (2, 3)
3179 09:57:25.101595 ==
3180 09:57:25.107900 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3181 09:57:25.111221 fsp= 1, odt_onoff= 1, Byte mode= 0
3182 09:57:25.111838 ==
3183 09:57:25.114773 Start DQ dly to find pass range UseTestEngine =0
3184 09:57:25.117641 x-axis: bit #, y-axis: DQ dly (-127~63)
3185 09:57:25.120890 RX Vref Scan = 0
3186 09:57:25.124452 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3187 09:57:25.127982 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3188 09:57:25.128557 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3189 09:57:25.131244 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3190 09:57:25.134299 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3191 09:57:25.137776 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3192 09:57:25.140735 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3193 09:57:25.144220 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3194 09:57:25.147513 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3195 09:57:25.151181 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3196 09:57:25.151765 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3197 09:57:25.154466 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3198 09:57:25.157555 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3199 09:57:25.161241 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3200 09:57:25.164085 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3201 09:57:25.168180 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3202 09:57:25.171652 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3203 09:57:25.174500 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3204 09:57:25.174971 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3205 09:57:25.177809 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3206 09:57:25.180770 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3207 09:57:25.184489 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3208 09:57:25.187555 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3209 09:57:25.190611 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3210 09:57:25.194580 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3211 09:57:25.195010 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3212 09:57:25.197501 0, [0] xxooxxxx ooxxxxxo [MSB]
3213 09:57:25.200803 1, [0] xxooxxxx ooxxxxxo [MSB]
3214 09:57:25.204273 2, [0] xxooxxxx ooxxxxxo [MSB]
3215 09:57:25.207541 3, [0] xxooxxxo oooxxxxo [MSB]
3216 09:57:25.210953 4, [0] xxooxxxo oooxxxxo [MSB]
3217 09:57:25.211539 6, [0] oooooooo ooooooxo [MSB]
3218 09:57:25.214314 32, [0] oooooooo ooooooox [MSB]
3219 09:57:25.217344 33, [0] oooooooo ooooooox [MSB]
3220 09:57:25.220868 34, [0] oooooooo ooooooox [MSB]
3221 09:57:25.224221 35, [0] oooxoooo oxooooox [MSB]
3222 09:57:25.227847 36, [0] oooxoooo xxooooox [MSB]
3223 09:57:25.230916 37, [0] ooxxoooo xxooooox [MSB]
3224 09:57:25.231599 38, [0] ooxxooox xxooooox [MSB]
3225 09:57:25.234022 39, [0] oxxxooox xxooooox [MSB]
3226 09:57:25.237432 40, [0] oxxxxoox xxxoooox [MSB]
3227 09:57:25.240756 41, [0] oxxxxoox xxxxxxox [MSB]
3228 09:57:25.244255 42, [0] xxxxxxxx xxxxxxxx [MSB]
3229 09:57:25.247466 iDelay=42, Bit 0, Center 23 (5 ~ 41) 37
3230 09:57:25.251069 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3231 09:57:25.254329 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3232 09:57:25.257527 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3233 09:57:25.260663 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
3234 09:57:25.263913 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3235 09:57:25.267151 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3236 09:57:25.270447 iDelay=42, Bit 7, Center 20 (3 ~ 37) 35
3237 09:57:25.273622 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3238 09:57:25.280455 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3239 09:57:25.284190 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3240 09:57:25.287186 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3241 09:57:25.290625 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3242 09:57:25.293868 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3243 09:57:25.296907 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
3244 09:57:25.300608 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3245 09:57:25.301217 ==
3246 09:57:25.306771 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3247 09:57:25.310271 fsp= 1, odt_onoff= 1, Byte mode= 0
3248 09:57:25.310831 ==
3249 09:57:25.311202 DQS Delay:
3250 09:57:25.313784 DQS0 = 0, DQS1 = 0
3251 09:57:25.314340 DQM Delay:
3252 09:57:25.314705 DQM0 = 20, DQM1 = 19
3253 09:57:25.317020 DQ Delay:
3254 09:57:25.320615 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3255 09:57:25.323265 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3256 09:57:25.326915 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3257 09:57:25.330185 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =14
3258 09:57:25.330702
3259 09:57:25.331082
3260 09:57:25.331461 DramC Write-DBI off
3261 09:57:25.331782 ==
3262 09:57:25.336906 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3263 09:57:25.340126 fsp= 1, odt_onoff= 1, Byte mode= 0
3264 09:57:25.340655 ==
3265 09:57:25.343227 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3266 09:57:25.343832
3267 09:57:25.347031 Begin, DQ Scan Range 921~1177
3268 09:57:25.347653
3269 09:57:25.348026
3270 09:57:25.350284 TX Vref Scan disable
3271 09:57:25.353329 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3272 09:57:25.356676 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3273 09:57:25.359672 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3274 09:57:25.363047 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3275 09:57:25.366421 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3276 09:57:25.370013 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3277 09:57:25.373589 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3278 09:57:25.376939 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3279 09:57:25.380358 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3280 09:57:25.383300 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3281 09:57:25.390090 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3282 09:57:25.393039 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3283 09:57:25.396867 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3284 09:57:25.399543 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3285 09:57:25.402874 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3286 09:57:25.406331 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3287 09:57:25.409881 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3288 09:57:25.412949 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3289 09:57:25.416199 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3290 09:57:25.419790 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3291 09:57:25.423246 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3292 09:57:25.426420 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3293 09:57:25.429665 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3294 09:57:25.432954 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3295 09:57:25.436127 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3296 09:57:25.442663 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3297 09:57:25.446315 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3298 09:57:25.449448 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3299 09:57:25.452618 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3300 09:57:25.456050 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3301 09:57:25.459262 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3302 09:57:25.462292 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3303 09:57:25.466251 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3304 09:57:25.469587 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3305 09:57:25.472596 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3306 09:57:25.475848 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3307 09:57:25.479131 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3308 09:57:25.482737 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3309 09:57:25.486025 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3310 09:57:25.489098 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3311 09:57:25.492426 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3312 09:57:25.495756 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3313 09:57:25.502910 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3314 09:57:25.505687 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3315 09:57:25.509649 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3316 09:57:25.512917 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3317 09:57:25.516189 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3318 09:57:25.519330 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3319 09:57:25.522872 969 |3 6 9|[0] xxxxxxxx oxxxxxxo [MSB]
3320 09:57:25.525862 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3321 09:57:25.529045 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
3322 09:57:25.532581 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
3323 09:57:25.535652 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3324 09:57:25.539077 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3325 09:57:25.542559 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3326 09:57:25.545855 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3327 09:57:25.549488 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3328 09:57:25.552566 978 |3 6 18|[0] xooooxxx oooooooo [MSB]
3329 09:57:25.555949 979 |3 6 19|[0] xoooooox oooooooo [MSB]
3330 09:57:25.562953 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3331 09:57:25.566186 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3332 09:57:25.569971 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3333 09:57:25.572701 989 |3 6 29|[0] oooooooo xxoxxxxx [MSB]
3334 09:57:25.576236 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3335 09:57:25.579804 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3336 09:57:25.582952 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3337 09:57:25.586576 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3338 09:57:25.589630 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3339 09:57:25.593180 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3340 09:57:25.596642 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3341 09:57:25.599296 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3342 09:57:25.602749 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3343 09:57:25.605905 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
3344 09:57:25.612933 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3345 09:57:25.616085 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3346 09:57:25.619475 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3347 09:57:25.622755 Byte0, DQ PI dly=988, DQM PI dly= 988
3348 09:57:25.626171 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3349 09:57:25.626734
3350 09:57:25.629368 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3351 09:57:25.629926
3352 09:57:25.632496 Byte1, DQ PI dly=978, DQM PI dly= 978
3353 09:57:25.639547 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3354 09:57:25.640096
3355 09:57:25.642790 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3356 09:57:25.643343
3357 09:57:25.643761 ==
3358 09:57:25.649705 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3359 09:57:25.652538 fsp= 1, odt_onoff= 1, Byte mode= 0
3360 09:57:25.653004 ==
3361 09:57:25.656275 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3362 09:57:25.656840
3363 09:57:25.659323 Begin, DQ Scan Range 954~1018
3364 09:57:25.659945 Write Rank1 MR14 =0x0
3365 09:57:25.669690
3366 09:57:25.670244 CH=1, VrefRange= 0, VrefLevel = 0
3367 09:57:25.676129 TX Bit0 (983~998) 16 990, Bit8 (971~985) 15 978,
3368 09:57:25.679467 TX Bit1 (981~996) 16 988, Bit9 (972~984) 13 978,
3369 09:57:25.686530 TX Bit2 (979~993) 15 986, Bit10 (976~986) 11 981,
3370 09:57:25.689604 TX Bit3 (978~990) 13 984, Bit11 (976~987) 12 981,
3371 09:57:25.692873 TX Bit4 (981~995) 15 988, Bit12 (976~985) 10 980,
3372 09:57:25.699654 TX Bit5 (982~998) 17 990, Bit13 (977~988) 12 982,
3373 09:57:25.703030 TX Bit6 (982~997) 16 989, Bit14 (976~985) 10 980,
3374 09:57:25.706100 TX Bit7 (983~994) 12 988, Bit15 (969~979) 11 974,
3375 09:57:25.706642
3376 09:57:25.709266 Write Rank1 MR14 =0x2
3377 09:57:25.718521
3378 09:57:25.719079 CH=1, VrefRange= 0, VrefLevel = 2
3379 09:57:25.724889 TX Bit0 (982~998) 17 990, Bit8 (971~985) 15 978,
3380 09:57:25.728072 TX Bit1 (980~997) 18 988, Bit9 (972~985) 14 978,
3381 09:57:25.735343 TX Bit2 (979~994) 16 986, Bit10 (976~986) 11 981,
3382 09:57:25.738685 TX Bit3 (977~990) 14 983, Bit11 (976~988) 13 982,
3383 09:57:25.741745 TX Bit4 (980~997) 18 988, Bit12 (976~987) 12 981,
3384 09:57:25.748175 TX Bit5 (982~998) 17 990, Bit13 (976~988) 13 982,
3385 09:57:25.751555 TX Bit6 (981~997) 17 989, Bit14 (976~986) 11 981,
3386 09:57:25.754956 TX Bit7 (983~994) 12 988, Bit15 (969~981) 13 975,
3387 09:57:25.758403
3388 09:57:25.758952 Write Rank1 MR14 =0x4
3389 09:57:25.767824
3390 09:57:25.768493 CH=1, VrefRange= 0, VrefLevel = 4
3391 09:57:25.774857 TX Bit0 (982~999) 18 990, Bit8 (971~985) 15 978,
3392 09:57:25.777307 TX Bit1 (980~997) 18 988, Bit9 (971~985) 15 978,
3393 09:57:25.784370 TX Bit2 (978~995) 18 986, Bit10 (975~987) 13 981,
3394 09:57:25.787547 TX Bit3 (978~991) 14 984, Bit11 (975~989) 15 982,
3395 09:57:25.791006 TX Bit4 (980~997) 18 988, Bit12 (976~987) 12 981,
3396 09:57:25.797428 TX Bit5 (982~999) 18 990, Bit13 (975~990) 16 982,
3397 09:57:25.800981 TX Bit6 (981~998) 18 989, Bit14 (975~987) 13 981,
3398 09:57:25.804599 TX Bit7 (983~995) 13 989, Bit15 (969~981) 13 975,
3399 09:57:25.805181
3400 09:57:25.807434 Write Rank1 MR14 =0x6
3401 09:57:25.817096
3402 09:57:25.817650 CH=1, VrefRange= 0, VrefLevel = 6
3403 09:57:25.823102 TX Bit0 (981~999) 19 990, Bit8 (970~986) 17 978,
3404 09:57:25.827254 TX Bit1 (980~998) 19 989, Bit9 (971~986) 16 978,
3405 09:57:25.833317 TX Bit2 (978~996) 19 987, Bit10 (974~988) 15 981,
3406 09:57:25.836300 TX Bit3 (977~992) 16 984, Bit11 (975~989) 15 982,
3407 09:57:25.839466 TX Bit4 (979~998) 20 988, Bit12 (975~988) 14 981,
3408 09:57:25.846740 TX Bit5 (981~999) 19 990, Bit13 (975~990) 16 982,
3409 09:57:25.850257 TX Bit6 (980~998) 19 989, Bit14 (975~987) 13 981,
3410 09:57:25.853128 TX Bit7 (982~997) 16 989, Bit15 (969~983) 15 976,
3411 09:57:25.853745
3412 09:57:25.856241 Write Rank1 MR14 =0x8
3413 09:57:25.865603
3414 09:57:25.865701 CH=1, VrefRange= 0, VrefLevel = 8
3415 09:57:25.872023 TX Bit0 (981~999) 19 990, Bit8 (970~987) 18 978,
3416 09:57:25.875373 TX Bit1 (980~998) 19 989, Bit9 (971~986) 16 978,
3417 09:57:25.882323 TX Bit2 (978~997) 20 987, Bit10 (974~988) 15 981,
3418 09:57:25.885984 TX Bit3 (978~992) 15 985, Bit11 (974~990) 17 982,
3419 09:57:25.889011 TX Bit4 (979~998) 20 988, Bit12 (974~988) 15 981,
3420 09:57:25.895315 TX Bit5 (981~999) 19 990, Bit13 (975~991) 17 983,
3421 09:57:25.898751 TX Bit6 (980~999) 20 989, Bit14 (974~988) 15 981,
3422 09:57:25.902113 TX Bit7 (981~997) 17 989, Bit15 (969~983) 15 976,
3423 09:57:25.905673
3424 09:57:25.906184 Write Rank1 MR14 =0xa
3425 09:57:25.915137
3426 09:57:25.918557 CH=1, VrefRange= 0, VrefLevel = 10
3427 09:57:25.921456 TX Bit0 (981~1000) 20 990, Bit8 (970~987) 18 978,
3428 09:57:25.925034 TX Bit1 (979~999) 21 989, Bit9 (970~987) 18 978,
3429 09:57:25.931682 TX Bit2 (978~998) 21 988, Bit10 (973~989) 17 981,
3430 09:57:25.934873 TX Bit3 (977~994) 18 985, Bit11 (974~991) 18 982,
3431 09:57:25.938576 TX Bit4 (979~998) 20 988, Bit12 (975~990) 16 982,
3432 09:57:25.944556 TX Bit5 (981~1000) 20 990, Bit13 (975~991) 17 983,
3433 09:57:25.948206 TX Bit6 (980~999) 20 989, Bit14 (973~989) 17 981,
3434 09:57:25.954957 TX Bit7 (981~998) 18 989, Bit15 (968~984) 17 976,
3435 09:57:25.955549
3436 09:57:25.955919 Write Rank1 MR14 =0xc
3437 09:57:25.964499
3438 09:57:25.967653 CH=1, VrefRange= 0, VrefLevel = 12
3439 09:57:25.971193 TX Bit0 (980~1000) 21 990, Bit8 (970~988) 19 979,
3440 09:57:25.974803 TX Bit1 (979~999) 21 989, Bit9 (970~987) 18 978,
3441 09:57:25.981241 TX Bit2 (977~998) 22 987, Bit10 (973~990) 18 981,
3442 09:57:25.984780 TX Bit3 (977~994) 18 985, Bit11 (974~991) 18 982,
3443 09:57:25.987581 TX Bit4 (979~999) 21 989, Bit12 (973~990) 18 981,
3444 09:57:25.994378 TX Bit5 (980~1001) 22 990, Bit13 (975~992) 18 983,
3445 09:57:25.997790 TX Bit6 (979~999) 21 989, Bit14 (974~990) 17 982,
3446 09:57:26.004307 TX Bit7 (981~998) 18 989, Bit15 (968~985) 18 976,
3447 09:57:26.004730
3448 09:57:26.005134 Write Rank1 MR14 =0xe
3449 09:57:26.014328
3450 09:57:26.017464 CH=1, VrefRange= 0, VrefLevel = 14
3451 09:57:26.020867 TX Bit0 (980~1001) 22 990, Bit8 (969~988) 20 978,
3452 09:57:26.024233 TX Bit1 (979~999) 21 989, Bit9 (970~987) 18 978,
3453 09:57:26.031043 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
3454 09:57:26.034192 TX Bit3 (977~995) 19 986, Bit11 (973~992) 20 982,
3455 09:57:26.037082 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
3456 09:57:26.044320 TX Bit5 (979~1001) 23 990, Bit13 (974~992) 19 983,
3457 09:57:26.047468 TX Bit6 (979~1000) 22 989, Bit14 (973~991) 19 982,
3458 09:57:26.054484 TX Bit7 (980~998) 19 989, Bit15 (967~985) 19 976,
3459 09:57:26.055000
3460 09:57:26.055337 Write Rank1 MR14 =0x10
3461 09:57:26.064470
3462 09:57:26.067728 CH=1, VrefRange= 0, VrefLevel = 16
3463 09:57:26.070960 TX Bit0 (980~1001) 22 990, Bit8 (969~989) 21 979,
3464 09:57:26.074134 TX Bit1 (978~999) 22 988, Bit9 (970~987) 18 978,
3465 09:57:26.080996 TX Bit2 (977~998) 22 987, Bit10 (972~991) 20 981,
3466 09:57:26.083974 TX Bit3 (976~996) 21 986, Bit11 (973~992) 20 982,
3467 09:57:26.087119 TX Bit4 (978~999) 22 988, Bit12 (972~992) 21 982,
3468 09:57:26.093870 TX Bit5 (980~1001) 22 990, Bit13 (973~992) 20 982,
3469 09:57:26.096826 TX Bit6 (979~1000) 22 989, Bit14 (973~991) 19 982,
3470 09:57:26.104202 TX Bit7 (980~999) 20 989, Bit15 (968~985) 18 976,
3471 09:57:26.104724
3472 09:57:26.105056 Write Rank1 MR14 =0x12
3473 09:57:26.114215
3474 09:57:26.117428 CH=1, VrefRange= 0, VrefLevel = 18
3475 09:57:26.120743 TX Bit0 (979~1002) 24 990, Bit8 (969~989) 21 979,
3476 09:57:26.124215 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
3477 09:57:26.130698 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
3478 09:57:26.134037 TX Bit3 (976~996) 21 986, Bit11 (972~992) 21 982,
3479 09:57:26.137455 TX Bit4 (978~1000) 23 989, Bit12 (973~992) 20 982,
3480 09:57:26.143917 TX Bit5 (979~1002) 24 990, Bit13 (972~992) 21 982,
3481 09:57:26.147014 TX Bit6 (979~1001) 23 990, Bit14 (972~992) 21 982,
3482 09:57:26.154309 TX Bit7 (979~999) 21 989, Bit15 (967~986) 20 976,
3483 09:57:26.154836
3484 09:57:26.155171 Write Rank1 MR14 =0x14
3485 09:57:26.164550
3486 09:57:26.167852 CH=1, VrefRange= 0, VrefLevel = 20
3487 09:57:26.171387 TX Bit0 (979~1002) 24 990, Bit8 (969~990) 22 979,
3488 09:57:26.174740 TX Bit1 (978~1001) 24 989, Bit9 (970~989) 20 979,
3489 09:57:26.181513 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
3490 09:57:26.184532 TX Bit3 (976~997) 22 986, Bit11 (972~993) 22 982,
3491 09:57:26.187859 TX Bit4 (978~1001) 24 989, Bit12 (972~992) 21 982,
3492 09:57:26.194431 TX Bit5 (979~1002) 24 990, Bit13 (972~993) 22 982,
3493 09:57:26.197795 TX Bit6 (978~1001) 24 989, Bit14 (972~992) 21 982,
3494 09:57:26.204321 TX Bit7 (979~1000) 22 989, Bit15 (967~986) 20 976,
3495 09:57:26.204786
3496 09:57:26.205151 Write Rank1 MR14 =0x16
3497 09:57:26.215120
3498 09:57:26.218093 CH=1, VrefRange= 0, VrefLevel = 22
3499 09:57:26.221679 TX Bit0 (979~1003) 25 991, Bit8 (969~991) 23 980,
3500 09:57:26.224976 TX Bit1 (978~1001) 24 989, Bit9 (969~990) 22 979,
3501 09:57:26.231680 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
3502 09:57:26.234747 TX Bit3 (976~998) 23 987, Bit11 (972~993) 22 982,
3503 09:57:26.237992 TX Bit4 (978~1001) 24 989, Bit12 (972~992) 21 982,
3504 09:57:26.244729 TX Bit5 (978~1003) 26 990, Bit13 (972~993) 22 982,
3505 09:57:26.247755 TX Bit6 (978~1002) 25 990, Bit14 (971~992) 22 981,
3506 09:57:26.254697 TX Bit7 (979~1000) 22 989, Bit15 (967~987) 21 977,
3507 09:57:26.255259
3508 09:57:26.255678 Write Rank1 MR14 =0x18
3509 09:57:26.265432
3510 09:57:26.268474 CH=1, VrefRange= 0, VrefLevel = 24
3511 09:57:26.272284 TX Bit0 (979~1004) 26 991, Bit8 (969~991) 23 980,
3512 09:57:26.275504 TX Bit1 (978~1002) 25 990, Bit9 (969~991) 23 980,
3513 09:57:26.282414 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
3514 09:57:26.285593 TX Bit3 (976~998) 23 987, Bit11 (971~993) 23 982,
3515 09:57:26.288651 TX Bit4 (977~1002) 26 989, Bit12 (971~993) 23 982,
3516 09:57:26.295574 TX Bit5 (978~1004) 27 991, Bit13 (972~994) 23 983,
3517 09:57:26.298756 TX Bit6 (978~1002) 25 990, Bit14 (971~992) 22 981,
3518 09:57:26.305764 TX Bit7 (978~1001) 24 989, Bit15 (966~987) 22 976,
3519 09:57:26.306329
3520 09:57:26.306693 Write Rank1 MR14 =0x1a
3521 09:57:26.315728
3522 09:57:26.319591 CH=1, VrefRange= 0, VrefLevel = 26
3523 09:57:26.322718 TX Bit0 (978~1004) 27 991, Bit8 (968~992) 25 980,
3524 09:57:26.325905 TX Bit1 (978~1002) 25 990, Bit9 (969~991) 23 980,
3525 09:57:26.333198 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
3526 09:57:26.335695 TX Bit3 (975~998) 24 986, Bit11 (971~993) 23 982,
3527 09:57:26.339333 TX Bit4 (977~1002) 26 989, Bit12 (971~993) 23 982,
3528 09:57:26.346011 TX Bit5 (978~1004) 27 991, Bit13 (971~994) 24 982,
3529 09:57:26.349110 TX Bit6 (978~1002) 25 990, Bit14 (971~993) 23 982,
3530 09:57:26.355742 TX Bit7 (978~1001) 24 989, Bit15 (966~988) 23 977,
3531 09:57:26.356246
3532 09:57:26.356625 Write Rank1 MR14 =0x1c
3533 09:57:26.367057
3534 09:57:26.370157 CH=1, VrefRange= 0, VrefLevel = 28
3535 09:57:26.373270 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3536 09:57:26.376823 TX Bit1 (978~1003) 26 990, Bit9 (969~992) 24 980,
3537 09:57:26.383761 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
3538 09:57:26.387017 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3539 09:57:26.390269 TX Bit4 (978~1002) 25 990, Bit12 (971~993) 23 982,
3540 09:57:26.396778 TX Bit5 (978~1005) 28 991, Bit13 (971~995) 25 983,
3541 09:57:26.399683 TX Bit6 (978~1003) 26 990, Bit14 (971~993) 23 982,
3542 09:57:26.406575 TX Bit7 (978~1002) 25 990, Bit15 (965~988) 24 976,
3543 09:57:26.407109
3544 09:57:26.407481 Write Rank1 MR14 =0x1e
3545 09:57:26.417752
3546 09:57:26.420897 CH=1, VrefRange= 0, VrefLevel = 30
3547 09:57:26.424277 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3548 09:57:26.427525 TX Bit1 (977~1003) 27 990, Bit9 (969~992) 24 980,
3549 09:57:26.434411 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3550 09:57:26.437443 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3551 09:57:26.440814 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3552 09:57:26.447538 TX Bit5 (978~1005) 28 991, Bit13 (971~994) 24 982,
3553 09:57:26.451050 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3554 09:57:26.457708 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3555 09:57:26.458277
3556 09:57:26.458710 Write Rank1 MR14 =0x20
3557 09:57:26.468622
3558 09:57:26.472136 CH=1, VrefRange= 0, VrefLevel = 32
3559 09:57:26.475583 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3560 09:57:26.478671 TX Bit1 (977~1003) 27 990, Bit9 (969~992) 24 980,
3561 09:57:26.484946 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3562 09:57:26.488119 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3563 09:57:26.491588 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3564 09:57:26.498323 TX Bit5 (978~1005) 28 991, Bit13 (971~994) 24 982,
3565 09:57:26.502241 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3566 09:57:26.508346 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3567 09:57:26.508913
3568 09:57:26.509278 Write Rank1 MR14 =0x22
3569 09:57:26.519099
3570 09:57:26.522480 CH=1, VrefRange= 0, VrefLevel = 34
3571 09:57:26.525588 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3572 09:57:26.529444 TX Bit1 (977~1003) 27 990, Bit9 (969~992) 24 980,
3573 09:57:26.535901 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3574 09:57:26.539132 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3575 09:57:26.542820 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3576 09:57:26.549552 TX Bit5 (978~1005) 28 991, Bit13 (971~994) 24 982,
3577 09:57:26.552804 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3578 09:57:26.559501 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3579 09:57:26.560067
3580 09:57:26.560433 Write Rank1 MR14 =0x24
3581 09:57:26.569896
3582 09:57:26.570526 CH=1, VrefRange= 0, VrefLevel = 36
3583 09:57:26.576969 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3584 09:57:26.580110 TX Bit1 (977~1003) 27 990, Bit9 (969~992) 24 980,
3585 09:57:26.586848 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3586 09:57:26.589804 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3587 09:57:26.593731 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3588 09:57:26.600015 TX Bit5 (978~1005) 28 991, Bit13 (971~994) 24 982,
3589 09:57:26.603308 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3590 09:57:26.610194 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3591 09:57:26.610759
3592 09:57:26.611126 Write Rank1 MR14 =0x26
3593 09:57:26.620512
3594 09:57:26.621079 CH=1, VrefRange= 0, VrefLevel = 38
3595 09:57:26.627562 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3596 09:57:26.630446 TX Bit1 (977~1003) 27 990, Bit9 (969~992) 24 980,
3597 09:57:26.636827 TX Bit2 (976~1001) 26 988, Bit10 (970~993) 24 981,
3598 09:57:26.640307 TX Bit3 (975~999) 25 987, Bit11 (970~994) 25 982,
3599 09:57:26.643608 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3600 09:57:26.650284 TX Bit5 (978~1005) 28 991, Bit13 (971~994) 24 982,
3601 09:57:26.653937 TX Bit6 (978~1004) 27 991, Bit14 (970~993) 24 981,
3602 09:57:26.660419 TX Bit7 (978~1002) 25 990, Bit15 (965~989) 25 977,
3603 09:57:26.660986
3604 09:57:26.661347
3605 09:57:26.663897 TX Vref found, early break! 378< 386
3606 09:57:26.667004 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3607 09:57:26.670349 u1DelayCellOfst[0]=5 cells (4 PI)
3608 09:57:26.673539 u1DelayCellOfst[1]=3 cells (3 PI)
3609 09:57:26.677160 u1DelayCellOfst[2]=1 cells (1 PI)
3610 09:57:26.680450 u1DelayCellOfst[3]=0 cells (0 PI)
3611 09:57:26.683597 u1DelayCellOfst[4]=3 cells (3 PI)
3612 09:57:26.686714 u1DelayCellOfst[5]=5 cells (4 PI)
3613 09:57:26.690016 u1DelayCellOfst[6]=5 cells (4 PI)
3614 09:57:26.693435 u1DelayCellOfst[7]=3 cells (3 PI)
3615 09:57:26.696322 Byte0, DQ PI dly=987, DQM PI dly= 989
3616 09:57:26.699999 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3617 09:57:26.700461
3618 09:57:26.702994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3619 09:57:26.703501
3620 09:57:26.706740 u1DelayCellOfst[8]=3 cells (3 PI)
3621 09:57:26.709721 u1DelayCellOfst[9]=3 cells (3 PI)
3622 09:57:26.713195 u1DelayCellOfst[10]=5 cells (4 PI)
3623 09:57:26.716784 u1DelayCellOfst[11]=6 cells (5 PI)
3624 09:57:26.719549 u1DelayCellOfst[12]=6 cells (5 PI)
3625 09:57:26.723165 u1DelayCellOfst[13]=6 cells (5 PI)
3626 09:57:26.726097 u1DelayCellOfst[14]=5 cells (4 PI)
3627 09:57:26.730344 u1DelayCellOfst[15]=0 cells (0 PI)
3628 09:57:26.733274 Byte1, DQ PI dly=977, DQM PI dly= 979
3629 09:57:26.736697 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3630 09:57:26.737162
3631 09:57:26.739801 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3632 09:57:26.740265
3633 09:57:26.743199 Write Rank1 MR14 =0x1e
3634 09:57:26.743646
3635 09:57:26.746518 Final TX Range 0 Vref 30
3636 09:57:26.747105
3637 09:57:26.752928 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3638 09:57:26.753437
3639 09:57:26.759709 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3640 09:57:26.766463 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3641 09:57:26.773278 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3642 09:57:26.773703 Write Rank1 MR3 =0xb0
3643 09:57:26.776677 DramC Write-DBI on
3644 09:57:26.777202 ==
3645 09:57:26.782993 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3646 09:57:26.786451 fsp= 1, odt_onoff= 1, Byte mode= 0
3647 09:57:26.786971 ==
3648 09:57:26.789880 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3649 09:57:26.790435
3650 09:57:26.793086 Begin, DQ Scan Range 699~763
3651 09:57:26.793643
3652 09:57:26.794013
3653 09:57:26.794354 TX Vref Scan disable
3654 09:57:26.799752 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3655 09:57:26.802752 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3656 09:57:26.806222 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3657 09:57:26.809567 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3658 09:57:26.812904 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3659 09:57:26.816348 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3660 09:57:26.819371 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3661 09:57:26.823129 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3662 09:57:26.826114 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3663 09:57:26.829421 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3664 09:57:26.833003 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3665 09:57:26.835977 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3666 09:57:26.839228 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3667 09:57:26.842521 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3668 09:57:26.846055 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3669 09:57:26.849474 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3670 09:57:26.852757 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3671 09:57:26.856034 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3672 09:57:26.859256 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3673 09:57:26.865652 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3674 09:57:26.868959 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3675 09:57:26.872220 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3676 09:57:26.875715 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3677 09:57:26.882010 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3678 09:57:26.885692 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3679 09:57:26.888688 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3680 09:57:26.892062 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3681 09:57:26.895473 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3682 09:57:26.899018 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3683 09:57:26.902262 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3684 09:57:26.905524 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3685 09:57:26.908882 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3686 09:57:26.912412 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3687 09:57:26.915945 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3688 09:57:26.919148 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3689 09:57:26.922451 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3690 09:57:26.925642 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3691 09:57:26.929041 Byte0, DQ PI dly=735, DQM PI dly= 735
3692 09:57:26.935617 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3693 09:57:26.936167
3694 09:57:26.938957 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3695 09:57:26.939454
3696 09:57:26.942255 Byte1, DQ PI dly=724, DQM PI dly= 724
3697 09:57:26.945823 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3698 09:57:26.946255
3699 09:57:26.952321 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3700 09:57:26.952886
3701 09:57:26.958796 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3702 09:57:26.965341 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3703 09:57:26.971710 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3704 09:57:26.975734 Write Rank1 MR3 =0x30
3705 09:57:26.976275 DramC Write-DBI off
3706 09:57:26.976613
3707 09:57:26.976922 [DATLAT]
3708 09:57:26.978866 Freq=1600, CH1 RK1, use_rxtx_scan=0
3709 09:57:26.979395
3710 09:57:26.982258 DATLAT Default: 0x10
3711 09:57:26.982843 7, 0xFFFF, sum=0
3712 09:57:26.985640 8, 0xFFFF, sum=0
3713 09:57:26.986207 9, 0xFFFF, sum=0
3714 09:57:26.988330 10, 0xFFFF, sum=0
3715 09:57:26.988805 11, 0xFFFF, sum=0
3716 09:57:26.991925 12, 0xFFFF, sum=0
3717 09:57:26.992395 13, 0xFFFF, sum=0
3718 09:57:26.995482 14, 0x0, sum=1
3719 09:57:26.996037 15, 0x0, sum=2
3720 09:57:26.998568 16, 0x0, sum=3
3721 09:57:26.998996 17, 0x0, sum=4
3722 09:57:27.001962 pattern=2 first_step=14 total pass=5 best_step=16
3723 09:57:27.002484 ==
3724 09:57:27.008796 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3725 09:57:27.012093 fsp= 1, odt_onoff= 1, Byte mode= 0
3726 09:57:27.012518 ==
3727 09:57:27.015448 Start DQ dly to find pass range UseTestEngine =1
3728 09:57:27.018906 x-axis: bit #, y-axis: DQ dly (-127~63)
3729 09:57:27.021956 RX Vref Scan = 0
3730 09:57:27.025469 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3731 09:57:27.028627 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3732 09:57:27.029060 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3733 09:57:27.032128 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3734 09:57:27.035154 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3735 09:57:27.038565 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3736 09:57:27.042145 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3737 09:57:27.045097 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3738 09:57:27.048216 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3739 09:57:27.051574 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3740 09:57:27.052024 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3741 09:57:27.054983 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3742 09:57:27.058199 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3743 09:57:27.061693 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3744 09:57:27.065207 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3745 09:57:27.068668 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3746 09:57:27.071931 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3747 09:57:27.074850 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3748 09:57:27.075665 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3749 09:57:27.078231 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3750 09:57:27.081837 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3751 09:57:27.085079 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3752 09:57:27.088516 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3753 09:57:27.091798 -3, [0] xxxoxxxx xxxxxxxo [MSB]
3754 09:57:27.094891 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3755 09:57:27.095318 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3756 09:57:27.098469 0, [0] xxxoxxxx ooxxxxxo [MSB]
3757 09:57:27.101891 1, [0] xxooxxxx ooxxxxxo [MSB]
3758 09:57:27.105297 2, [0] xxooxxxx ooxxxxxo [MSB]
3759 09:57:27.108242 3, [0] xxooxxxo oooxxxxo [MSB]
3760 09:57:27.111514 4, [0] oooooxxo ooooxxxo [MSB]
3761 09:57:27.112039 5, [0] ooooooxo oooooooo [MSB]
3762 09:57:27.117051 32, [0] oooooooo ooooooox [MSB]
3763 09:57:27.119854 33, [0] oooooooo ooooooox [MSB]
3764 09:57:27.123387 34, [0] oooooooo ooooooox [MSB]
3765 09:57:27.126856 35, [0] oooxoooo oxooooox [MSB]
3766 09:57:27.130246 36, [0] oooxoooo xxooooox [MSB]
3767 09:57:27.133618 37, [0] ooxxoooo xxooooox [MSB]
3768 09:57:27.134144 38, [0] ooxxoooo xxooooox [MSB]
3769 09:57:27.136455 39, [0] ooxxooox xxooooox [MSB]
3770 09:57:27.139843 40, [0] oxxxxoox xxxoooox [MSB]
3771 09:57:27.143469 41, [0] xxxxxxox xxxxxxxx [MSB]
3772 09:57:27.146629 42, [0] xxxxxxxx xxxxxxxx [MSB]
3773 09:57:27.150433 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3774 09:57:27.153906 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3775 09:57:27.157007 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3776 09:57:27.160390 iDelay=42, Bit 3, Center 15 (-3 ~ 34) 38
3777 09:57:27.164523 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3778 09:57:27.166505 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3779 09:57:27.170032 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
3780 09:57:27.173285 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3781 09:57:27.176760 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3782 09:57:27.183687 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3783 09:57:27.186602 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3784 09:57:27.189927 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3785 09:57:27.193213 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3786 09:57:27.196631 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3787 09:57:27.200087 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3788 09:57:27.203580 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3789 09:57:27.204091 ==
3790 09:57:27.209801 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3791 09:57:27.213374 fsp= 1, odt_onoff= 1, Byte mode= 0
3792 09:57:27.213890 ==
3793 09:57:27.214223 DQS Delay:
3794 09:57:27.216658 DQS0 = 0, DQS1 = 0
3795 09:57:27.217179 DQM Delay:
3796 09:57:27.217513 DQM0 = 20, DQM1 = 19
3797 09:57:27.219846 DQ Delay:
3798 09:57:27.223378 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3799 09:57:27.226468 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3800 09:57:27.230011 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3801 09:57:27.234230 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3802 09:57:27.234745
3803 09:57:27.235073
3804 09:57:27.235380
3805 09:57:27.236639 [DramC_TX_OE_Calibration] TA2
3806 09:57:27.237051 Original DQ_B0 (3 6) =30, OEN = 27
3807 09:57:27.240362 Original DQ_B1 (3 6) =30, OEN = 27
3808 09:57:27.243312 23, 0x0, End_B0=23 End_B1=23
3809 09:57:27.246679 24, 0x0, End_B0=24 End_B1=24
3810 09:57:27.250053 25, 0x0, End_B0=25 End_B1=25
3811 09:57:27.250575 26, 0x0, End_B0=26 End_B1=26
3812 09:57:27.253447 27, 0x0, End_B0=27 End_B1=27
3813 09:57:27.256766 28, 0x0, End_B0=28 End_B1=28
3814 09:57:27.260596 29, 0x0, End_B0=29 End_B1=29
3815 09:57:27.264017 30, 0x0, End_B0=30 End_B1=30
3816 09:57:27.264541 31, 0xFFFF, End_B0=30 End_B1=30
3817 09:57:27.269867 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3818 09:57:27.277218 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3819 09:57:27.277733
3820 09:57:27.278068
3821 09:57:27.278380 Write Rank1 MR23 =0x3f
3822 09:57:27.280157 [DQSOSC]
3823 09:57:27.286786 [DQSOSCAuto] RK1, (LSB)MR18= 0xcfcf, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3824 09:57:27.292988 CH1_RK1: MR19=0x202, MR18=0xCFCF, DQSOSC=438, MR23=63, INC=12, DEC=19
3825 09:57:27.296343 Write Rank1 MR23 =0x3f
3826 09:57:27.296877 [DQSOSC]
3827 09:57:27.303234 [DQSOSCAuto] RK1, (LSB)MR18= 0xcaca, (MSB)MR19= 0x202, tDQSOscB0 = 441 ps tDQSOscB1 = 441 ps
3828 09:57:27.306398 CH1 RK1: MR19=202, MR18=CACA
3829 09:57:27.309438 [RxdqsGatingPostProcess] freq 1600
3830 09:57:27.316635 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3831 09:57:27.317156 Rank: 0
3832 09:57:27.319913 best DQS0 dly(2T, 0.5T) = (2, 6)
3833 09:57:27.322922 best DQS1 dly(2T, 0.5T) = (2, 6)
3834 09:57:27.326346 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3835 09:57:27.329985 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3836 09:57:27.330522 Rank: 1
3837 09:57:27.332925 best DQS0 dly(2T, 0.5T) = (2, 5)
3838 09:57:27.336048 best DQS1 dly(2T, 0.5T) = (2, 6)
3839 09:57:27.340170 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3840 09:57:27.343429 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3841 09:57:27.346619 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3842 09:57:27.349869 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3843 09:57:27.353168 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3844 09:57:27.356501
3845 09:57:27.356921
3846 09:57:27.359422 [Calibration Summary] Freqency 1600
3847 09:57:27.359843 CH 0, Rank 0
3848 09:57:27.360176 All Pass.
3849 09:57:27.360484
3850 09:57:27.363493 CH 0, Rank 1
3851 09:57:27.364009 All Pass.
3852 09:57:27.364348
3853 09:57:27.364657 CH 1, Rank 0
3854 09:57:27.366639 All Pass.
3855 09:57:27.367057
3856 09:57:27.367386 CH 1, Rank 1
3857 09:57:27.367731 All Pass.
3858 09:57:27.368033
3859 09:57:27.373138 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3860 09:57:27.379812 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3861 09:57:27.389385 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3862 09:57:27.389800 Write Rank0 MR3 =0xb0
3863 09:57:27.396375 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3864 09:57:27.402977 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3865 09:57:27.410018 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3866 09:57:27.412829 Write Rank1 MR3 =0xb0
3867 09:57:27.419351 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3868 09:57:27.426032 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3869 09:57:27.432452 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3870 09:57:27.435775 Write Rank0 MR3 =0xb0
3871 09:57:27.442803 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3872 09:57:27.449469 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3873 09:57:27.456111 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3874 09:57:27.456535 Write Rank1 MR3 =0xb0
3875 09:57:27.459535 DramC Write-DBI on
3876 09:57:27.462655 [GetDramInforAfterCalByMRR] Vendor 6.
3877 09:57:27.466498 [GetDramInforAfterCalByMRR] Revision 505.
3878 09:57:27.467088 MR8 1111
3879 09:57:27.472697 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3880 09:57:27.473215 MR8 1111
3881 09:57:27.475897 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3882 09:57:27.479331 MR8 1111
3883 09:57:27.482767 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3884 09:57:27.483280 MR8 1111
3885 09:57:27.489578 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3886 09:57:27.499453 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3887 09:57:27.499968 Write Rank0 MR13 =0xd0
3888 09:57:27.502835 Write Rank1 MR13 =0xd0
3889 09:57:27.503348 Write Rank0 MR13 =0xd0
3890 09:57:27.506049 Write Rank1 MR13 =0xd0
3891 09:57:27.509492 Save calibration result to emmc
3892 09:57:27.510009
3893 09:57:27.510340
3894 09:57:27.512677 [DramcModeReg_Check] Freq_1600, FSP_1
3895 09:57:27.516128 FSP_1, CH_0, RK0
3896 09:57:27.516687 Write Rank0 MR13 =0xd8
3897 09:57:27.519454 MR12 = 0x60 (global = 0x60) match
3898 09:57:27.522843 MR14 = 0x1c (global = 0x1c) match
3899 09:57:27.525934 FSP_1, CH_0, RK1
3900 09:57:27.526493 Write Rank1 MR13 =0xd8
3901 09:57:27.529089 MR12 = 0x5c (global = 0x5c) match
3902 09:57:27.532349 MR14 = 0x20 (global = 0x20) match
3903 09:57:27.536175 FSP_1, CH_1, RK0
3904 09:57:27.536751 Write Rank0 MR13 =0xd8
3905 09:57:27.538947 MR12 = 0x5e (global = 0x5e) match
3906 09:57:27.542484 MR14 = 0x20 (global = 0x20) match
3907 09:57:27.545789 FSP_1, CH_1, RK1
3908 09:57:27.546258 Write Rank1 MR13 =0xd8
3909 09:57:27.549080 MR12 = 0x5e (global = 0x5e) match
3910 09:57:27.552729 MR14 = 0x1e (global = 0x1e) match
3911 09:57:27.553434
3912 09:57:27.555852 [MEM_TEST] 02: After DFS, before run time config
3913 09:57:27.568009 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3914 09:57:27.568520
3915 09:57:27.568870 [TA2_TEST]
3916 09:57:27.569185 === TA2 HW
3917 09:57:27.571351 TA2 PAT: XTALK
3918 09:57:27.574372 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3919 09:57:27.581477 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3920 09:57:27.584538 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3921 09:57:27.587763 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3922 09:57:27.590963
3923 09:57:27.591374
3924 09:57:27.591732 Settings after calibration
3925 09:57:27.592045
3926 09:57:27.594627 [DramcRunTimeConfig]
3927 09:57:27.598241 TransferPLLToSPMControl - MODE SW PHYPLL
3928 09:57:27.598765 TX_TRACKING: ON
3929 09:57:27.601095 RX_TRACKING: ON
3930 09:57:27.601511 HW_GATING: ON
3931 09:57:27.604463 HW_GATING DBG: OFF
3932 09:57:27.604879 ddr_geometry:1
3933 09:57:27.607873 ddr_geometry:1
3934 09:57:27.608287 ddr_geometry:1
3935 09:57:27.608619 ddr_geometry:1
3936 09:57:27.611133 ddr_geometry:1
3937 09:57:27.611574 ddr_geometry:1
3938 09:57:27.614844 ddr_geometry:1
3939 09:57:27.615362 ddr_geometry:1
3940 09:57:27.617739 High Freq DUMMY_READ_FOR_TRACKING: ON
3941 09:57:27.621503 ZQCS_ENABLE_LP4: OFF
3942 09:57:27.624172 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3943 09:57:27.627721 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3944 09:57:27.628245 SPM_CONTROL_AFTERK: ON
3945 09:57:27.631239 IMPEDANCE_TRACKING: ON
3946 09:57:27.631818 TEMP_SENSOR: ON
3947 09:57:27.634698 PER_BANK_REFRESH: ON
3948 09:57:27.635260 HW_SAVE_FOR_SR: ON
3949 09:57:27.637808 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3950 09:57:27.640920 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3951 09:57:27.644165 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3952 09:57:27.648042 Read ODT Tracking: ON
3953 09:57:27.651034 =========================
3954 09:57:27.651656
3955 09:57:27.652029 [TA2_TEST]
3956 09:57:27.652371 === TA2 HW
3957 09:57:27.657734 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3958 09:57:27.660895 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3959 09:57:27.667991 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3960 09:57:27.670483 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3961 09:57:27.670903
3962 09:57:27.674320 [MEM_TEST] 03: After run time config
3963 09:57:27.685952 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3964 09:57:27.689299 [complex_mem_test] start addr:0x40024000, len:131072
3965 09:57:27.893724 1st complex R/W mem test pass
3966 09:57:27.899758 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3967 09:57:27.903520 sync preloader write leveling
3968 09:57:27.907111 sync preloader cbt_mr12
3969 09:57:27.910093 sync preloader cbt_clk_dly
3970 09:57:27.910654 sync preloader cbt_cmd_dly
3971 09:57:27.913365 sync preloader cbt_cs
3972 09:57:27.916906 sync preloader cbt_ca_perbit_delay
3973 09:57:27.917469 sync preloader clk_delay
3974 09:57:27.920105 sync preloader dqs_delay
3975 09:57:27.923516 sync preloader u1Gating2T_Save
3976 09:57:27.926767 sync preloader u1Gating05T_Save
3977 09:57:27.930073 sync preloader u1Gatingfine_tune_Save
3978 09:57:27.933715 sync preloader u1Gatingucpass_count_Save
3979 09:57:27.936556 sync preloader u1TxWindowPerbitVref_Save
3980 09:57:27.940113 sync preloader u1TxCenter_min_Save
3981 09:57:27.942927 sync preloader u1TxCenter_max_Save
3982 09:57:27.946101 sync preloader u1Txwin_center_Save
3983 09:57:27.950174 sync preloader u1Txfirst_pass_Save
3984 09:57:27.953102 sync preloader u1Txlast_pass_Save
3985 09:57:27.956273 sync preloader u1RxDatlat_Save
3986 09:57:27.959542 sync preloader u1RxWinPerbitVref_Save
3987 09:57:27.962652 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3988 09:57:27.966017 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3989 09:57:27.969771 sync preloader delay_cell_unit
3990 09:57:27.976091 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3991 09:57:27.979362 sync preloader write leveling
3992 09:57:27.979845 sync preloader cbt_mr12
3993 09:57:27.982840 sync preloader cbt_clk_dly
3994 09:57:27.986053 sync preloader cbt_cmd_dly
3995 09:57:27.986344 sync preloader cbt_cs
3996 09:57:27.989224 sync preloader cbt_ca_perbit_delay
3997 09:57:27.992438 sync preloader clk_delay
3998 09:57:27.995668 sync preloader dqs_delay
3999 09:57:27.999037 sync preloader u1Gating2T_Save
4000 09:57:27.999214 sync preloader u1Gating05T_Save
4001 09:57:28.002593 sync preloader u1Gatingfine_tune_Save
4002 09:57:28.009272 sync preloader u1Gatingucpass_count_Save
4003 09:57:28.012339 sync preloader u1TxWindowPerbitVref_Save
4004 09:57:28.016248 sync preloader u1TxCenter_min_Save
4005 09:57:28.016512 sync preloader u1TxCenter_max_Save
4006 09:57:28.019507 sync preloader u1Txwin_center_Save
4007 09:57:28.023005 sync preloader u1Txfirst_pass_Save
4008 09:57:28.026109 sync preloader u1Txlast_pass_Save
4009 09:57:28.029452 sync preloader u1RxDatlat_Save
4010 09:57:28.032514 sync preloader u1RxWinPerbitVref_Save
4011 09:57:28.035978 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4012 09:57:28.042384 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4013 09:57:28.042881 sync preloader delay_cell_unit
4014 09:57:28.049294 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4015 09:57:28.052534 sync preloader write leveling
4016 09:57:28.056221 sync preloader cbt_mr12
4017 09:57:28.059368 sync preloader cbt_clk_dly
4018 09:57:28.059978 sync preloader cbt_cmd_dly
4019 09:57:28.063260 sync preloader cbt_cs
4020 09:57:28.066441 sync preloader cbt_ca_perbit_delay
4021 09:57:28.069276 sync preloader clk_delay
4022 09:57:28.069742 sync preloader dqs_delay
4023 09:57:28.072302 sync preloader u1Gating2T_Save
4024 09:57:28.075981 sync preloader u1Gating05T_Save
4025 09:57:28.079185 sync preloader u1Gatingfine_tune_Save
4026 09:57:28.082733 sync preloader u1Gatingucpass_count_Save
4027 09:57:28.086273 sync preloader u1TxWindowPerbitVref_Save
4028 09:57:28.089139 sync preloader u1TxCenter_min_Save
4029 09:57:28.092814 sync preloader u1TxCenter_max_Save
4030 09:57:28.095628 sync preloader u1Txwin_center_Save
4031 09:57:28.099306 sync preloader u1Txfirst_pass_Save
4032 09:57:28.102563 sync preloader u1Txlast_pass_Save
4033 09:57:28.103071 sync preloader u1RxDatlat_Save
4034 09:57:28.106408 sync preloader u1RxWinPerbitVref_Save
4035 09:57:28.112836 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4036 09:57:28.116071 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4037 09:57:28.119148 sync preloader delay_cell_unit
4038 09:57:28.122550 just_for_test_dump_coreboot_params dump all params
4039 09:57:28.125293 dump source = 0x0
4040 09:57:28.125711 dump params frequency:1600
4041 09:57:28.129141 dump params rank number:2
4042 09:57:28.129559
4043 09:57:28.132249 dump params write leveling
4044 09:57:28.135526 write leveling[0][0][0] = 0x20
4045 09:57:28.138865 write leveling[0][0][1] = 0x17
4046 09:57:28.139282 write leveling[0][1][0] = 0x1a
4047 09:57:28.141856 write leveling[0][1][1] = 0x17
4048 09:57:28.145253 write leveling[1][0][0] = 0x21
4049 09:57:28.148666 write leveling[1][0][1] = 0x18
4050 09:57:28.151941 write leveling[1][1][0] = 0x22
4051 09:57:28.155658 write leveling[1][1][1] = 0x19
4052 09:57:28.156173 dump params cbt_cs
4053 09:57:28.158885 cbt_cs[0][0] = 0x8
4054 09:57:28.159481 cbt_cs[0][1] = 0x8
4055 09:57:28.161977 cbt_cs[1][0] = 0xb
4056 09:57:28.162486 cbt_cs[1][1] = 0xb
4057 09:57:28.165772 dump params cbt_mr12
4058 09:57:28.166282 cbt_mr12[0][0] = 0x20
4059 09:57:28.168471 cbt_mr12[0][1] = 0x1c
4060 09:57:28.171863 cbt_mr12[1][0] = 0x1e
4061 09:57:28.172283 cbt_mr12[1][1] = 0x1e
4062 09:57:28.175643 dump params tx window
4063 09:57:28.178991 tx_center_min[0][0][0] = 981
4064 09:57:28.179552 tx_center_max[0][0][0] = 988
4065 09:57:28.182083 tx_center_min[0][0][1] = 974
4066 09:57:28.185483 tx_center_max[0][0][1] = 980
4067 09:57:28.188890 tx_center_min[0][1][0] = 979
4068 09:57:28.189312 tx_center_max[0][1][0] = 986
4069 09:57:28.192205 tx_center_min[0][1][1] = 976
4070 09:57:28.195519 tx_center_max[0][1][1] = 982
4071 09:57:28.198699 tx_center_min[1][0][0] = 988
4072 09:57:28.202285 tx_center_max[1][0][0] = 992
4073 09:57:28.202800 tx_center_min[1][0][1] = 975
4074 09:57:28.205625 tx_center_max[1][0][1] = 982
4075 09:57:28.208832 tx_center_min[1][1][0] = 987
4076 09:57:28.212092 tx_center_max[1][1][0] = 991
4077 09:57:28.215230 tx_center_min[1][1][1] = 977
4078 09:57:28.215669 tx_center_max[1][1][1] = 982
4079 09:57:28.219089 dump params tx window
4080 09:57:28.221890 tx_win_center[0][0][0] = 988
4081 09:57:28.225411 tx_first_pass[0][0][0] = 976
4082 09:57:28.225844 tx_last_pass[0][0][0] = 1000
4083 09:57:28.228886 tx_win_center[0][0][1] = 987
4084 09:57:28.232018 tx_first_pass[0][0][1] = 975
4085 09:57:28.235515 tx_last_pass[0][0][1] = 999
4086 09:57:28.238382 tx_win_center[0][0][2] = 987
4087 09:57:28.238797 tx_first_pass[0][0][2] = 976
4088 09:57:28.242071 tx_last_pass[0][0][2] = 999
4089 09:57:28.245156 tx_win_center[0][0][3] = 981
4090 09:57:28.248695 tx_first_pass[0][0][3] = 969
4091 09:57:28.249228 tx_last_pass[0][0][3] = 993
4092 09:57:28.251902 tx_win_center[0][0][4] = 987
4093 09:57:28.255111 tx_first_pass[0][0][4] = 975
4094 09:57:28.258375 tx_last_pass[0][0][4] = 999
4095 09:57:28.261700 tx_win_center[0][0][5] = 983
4096 09:57:28.262116 tx_first_pass[0][0][5] = 972
4097 09:57:28.265020 tx_last_pass[0][0][5] = 995
4098 09:57:28.268363 tx_win_center[0][0][6] = 985
4099 09:57:28.271661 tx_first_pass[0][0][6] = 973
4100 09:57:28.272115 tx_last_pass[0][0][6] = 998
4101 09:57:28.274804 tx_win_center[0][0][7] = 987
4102 09:57:28.278378 tx_first_pass[0][0][7] = 975
4103 09:57:28.281394 tx_last_pass[0][0][7] = 999
4104 09:57:28.281689 tx_win_center[0][0][8] = 974
4105 09:57:28.284992 tx_first_pass[0][0][8] = 962
4106 09:57:28.288098 tx_last_pass[0][0][8] = 986
4107 09:57:28.291685 tx_win_center[0][0][9] = 976
4108 09:57:28.295056 tx_first_pass[0][0][9] = 965
4109 09:57:28.295283 tx_last_pass[0][0][9] = 988
4110 09:57:28.298275 tx_win_center[0][0][10] = 980
4111 09:57:28.301517 tx_first_pass[0][0][10] = 968
4112 09:57:28.304823 tx_last_pass[0][0][10] = 993
4113 09:57:28.308068 tx_win_center[0][0][11] = 975
4114 09:57:28.308379 tx_first_pass[0][0][11] = 963
4115 09:57:28.311630 tx_last_pass[0][0][11] = 987
4116 09:57:28.314908 tx_win_center[0][0][12] = 978
4117 09:57:28.318304 tx_first_pass[0][0][12] = 966
4118 09:57:28.321710 tx_last_pass[0][0][12] = 990
4119 09:57:28.322173 tx_win_center[0][0][13] = 977
4120 09:57:28.324975 tx_first_pass[0][0][13] = 966
4121 09:57:28.328454 tx_last_pass[0][0][13] = 989
4122 09:57:28.331718 tx_win_center[0][0][14] = 978
4123 09:57:28.334867 tx_first_pass[0][0][14] = 966
4124 09:57:28.335394 tx_last_pass[0][0][14] = 990
4125 09:57:28.338397 tx_win_center[0][0][15] = 980
4126 09:57:28.341901 tx_first_pass[0][0][15] = 968
4127 09:57:28.345264 tx_last_pass[0][0][15] = 992
4128 09:57:28.348128 tx_win_center[0][1][0] = 985
4129 09:57:28.348551 tx_first_pass[0][1][0] = 973
4130 09:57:28.351388 tx_last_pass[0][1][0] = 998
4131 09:57:28.354695 tx_win_center[0][1][1] = 984
4132 09:57:28.358092 tx_first_pass[0][1][1] = 972
4133 09:57:28.358612 tx_last_pass[0][1][1] = 997
4134 09:57:28.361299 tx_win_center[0][1][2] = 986
4135 09:57:28.364716 tx_first_pass[0][1][2] = 974
4136 09:57:28.368235 tx_last_pass[0][1][2] = 998
4137 09:57:28.371532 tx_win_center[0][1][3] = 979
4138 09:57:28.371956 tx_first_pass[0][1][3] = 968
4139 09:57:28.375223 tx_last_pass[0][1][3] = 991
4140 09:57:28.378277 tx_win_center[0][1][4] = 983
4141 09:57:28.381721 tx_first_pass[0][1][4] = 970
4142 09:57:28.382254 tx_last_pass[0][1][4] = 997
4143 09:57:28.384900 tx_win_center[0][1][5] = 980
4144 09:57:28.388187 tx_first_pass[0][1][5] = 968
4145 09:57:28.391134 tx_last_pass[0][1][5] = 993
4146 09:57:28.395097 tx_win_center[0][1][6] = 981
4147 09:57:28.395555 tx_first_pass[0][1][6] = 969
4148 09:57:28.397995 tx_last_pass[0][1][6] = 994
4149 09:57:28.401616 tx_win_center[0][1][7] = 983
4150 09:57:28.404498 tx_first_pass[0][1][7] = 971
4151 09:57:28.405060 tx_last_pass[0][1][7] = 996
4152 09:57:28.407907 tx_win_center[0][1][8] = 976
4153 09:57:28.411674 tx_first_pass[0][1][8] = 964
4154 09:57:28.414661 tx_last_pass[0][1][8] = 989
4155 09:57:28.417743 tx_win_center[0][1][9] = 978
4156 09:57:28.418337 tx_first_pass[0][1][9] = 967
4157 09:57:28.421125 tx_last_pass[0][1][9] = 990
4158 09:57:28.424332 tx_win_center[0][1][10] = 982
4159 09:57:28.428003 tx_first_pass[0][1][10] = 970
4160 09:57:28.431365 tx_last_pass[0][1][10] = 995
4161 09:57:28.431837 tx_win_center[0][1][11] = 978
4162 09:57:28.434613 tx_first_pass[0][1][11] = 966
4163 09:57:28.437808 tx_last_pass[0][1][11] = 990
4164 09:57:28.441316 tx_win_center[0][1][12] = 978
4165 09:57:28.444247 tx_first_pass[0][1][12] = 967
4166 09:57:28.444664 tx_last_pass[0][1][12] = 990
4167 09:57:28.448149 tx_win_center[0][1][13] = 979
4168 09:57:28.451221 tx_first_pass[0][1][13] = 968
4169 09:57:28.454384 tx_last_pass[0][1][13] = 990
4170 09:57:28.457799 tx_win_center[0][1][14] = 979
4171 09:57:28.458232 tx_first_pass[0][1][14] = 967
4172 09:57:28.461062 tx_last_pass[0][1][14] = 991
4173 09:57:28.464819 tx_win_center[0][1][15] = 981
4174 09:57:28.467762 tx_first_pass[0][1][15] = 969
4175 09:57:28.471148 tx_last_pass[0][1][15] = 993
4176 09:57:28.471722 tx_win_center[1][0][0] = 992
4177 09:57:28.474239 tx_first_pass[1][0][0] = 979
4178 09:57:28.477747 tx_last_pass[1][0][0] = 1006
4179 09:57:28.481311 tx_win_center[1][0][1] = 991
4180 09:57:28.484405 tx_first_pass[1][0][1] = 978
4181 09:57:28.484833 tx_last_pass[1][0][1] = 1004
4182 09:57:28.487733 tx_win_center[1][0][2] = 989
4183 09:57:28.491113 tx_first_pass[1][0][2] = 977
4184 09:57:28.494234 tx_last_pass[1][0][2] = 1002
4185 09:57:28.497945 tx_win_center[1][0][3] = 988
4186 09:57:28.498473 tx_first_pass[1][0][3] = 976
4187 09:57:28.501390 tx_last_pass[1][0][3] = 1000
4188 09:57:28.504576 tx_win_center[1][0][4] = 992
4189 09:57:28.507341 tx_first_pass[1][0][4] = 979
4190 09:57:28.507795 tx_last_pass[1][0][4] = 1005
4191 09:57:28.511104 tx_win_center[1][0][5] = 992
4192 09:57:28.514602 tx_first_pass[1][0][5] = 979
4193 09:57:28.517742 tx_last_pass[1][0][5] = 1006
4194 09:57:28.520428 tx_win_center[1][0][6] = 991
4195 09:57:28.520846 tx_first_pass[1][0][6] = 978
4196 09:57:28.524036 tx_last_pass[1][0][6] = 1005
4197 09:57:28.527097 tx_win_center[1][0][7] = 991
4198 09:57:28.530555 tx_first_pass[1][0][7] = 978
4199 09:57:28.534641 tx_last_pass[1][0][7] = 1004
4200 09:57:28.535191 tx_win_center[1][0][8] = 980
4201 09:57:28.538050 tx_first_pass[1][0][8] = 968
4202 09:57:28.541129 tx_last_pass[1][0][8] = 992
4203 09:57:28.543737 tx_win_center[1][0][9] = 980
4204 09:57:28.547814 tx_first_pass[1][0][9] = 969
4205 09:57:28.548367 tx_last_pass[1][0][9] = 991
4206 09:57:28.550881 tx_win_center[1][0][10] = 981
4207 09:57:28.554371 tx_first_pass[1][0][10] = 970
4208 09:57:28.557587 tx_last_pass[1][0][10] = 993
4209 09:57:28.560776 tx_win_center[1][0][11] = 982
4210 09:57:28.561292 tx_first_pass[1][0][11] = 970
4211 09:57:28.563913 tx_last_pass[1][0][11] = 994
4212 09:57:28.567126 tx_win_center[1][0][12] = 981
4213 09:57:28.570573 tx_first_pass[1][0][12] = 970
4214 09:57:28.573989 tx_last_pass[1][0][12] = 993
4215 09:57:28.574502 tx_win_center[1][0][13] = 982
4216 09:57:28.576985 tx_first_pass[1][0][13] = 971
4217 09:57:28.580779 tx_last_pass[1][0][13] = 994
4218 09:57:28.583551 tx_win_center[1][0][14] = 981
4219 09:57:28.586803 tx_first_pass[1][0][14] = 970
4220 09:57:28.587215 tx_last_pass[1][0][14] = 993
4221 09:57:28.590178 tx_win_center[1][0][15] = 975
4222 09:57:28.593976 tx_first_pass[1][0][15] = 964
4223 09:57:28.597467 tx_last_pass[1][0][15] = 987
4224 09:57:28.600891 tx_win_center[1][1][0] = 991
4225 09:57:28.601404 tx_first_pass[1][1][0] = 978
4226 09:57:28.603784 tx_last_pass[1][1][0] = 1005
4227 09:57:28.607084 tx_win_center[1][1][1] = 990
4228 09:57:28.610868 tx_first_pass[1][1][1] = 977
4229 09:57:28.611378 tx_last_pass[1][1][1] = 1003
4230 09:57:28.613832 tx_win_center[1][1][2] = 988
4231 09:57:28.616921 tx_first_pass[1][1][2] = 976
4232 09:57:28.620445 tx_last_pass[1][1][2] = 1001
4233 09:57:28.623526 tx_win_center[1][1][3] = 987
4234 09:57:28.623951 tx_first_pass[1][1][3] = 975
4235 09:57:28.626671 tx_last_pass[1][1][3] = 999
4236 09:57:28.630516 tx_win_center[1][1][4] = 990
4237 09:57:28.633323 tx_first_pass[1][1][4] = 978
4238 09:57:28.637513 tx_last_pass[1][1][4] = 1003
4239 09:57:28.638029 tx_win_center[1][1][5] = 991
4240 09:57:28.640845 tx_first_pass[1][1][5] = 978
4241 09:57:28.643909 tx_last_pass[1][1][5] = 1005
4242 09:57:28.647531 tx_win_center[1][1][6] = 991
4243 09:57:28.648043 tx_first_pass[1][1][6] = 978
4244 09:57:28.650837 tx_last_pass[1][1][6] = 1004
4245 09:57:28.654185 tx_win_center[1][1][7] = 990
4246 09:57:28.657503 tx_first_pass[1][1][7] = 978
4247 09:57:28.660781 tx_last_pass[1][1][7] = 1002
4248 09:57:28.661289 tx_win_center[1][1][8] = 980
4249 09:57:28.663901 tx_first_pass[1][1][8] = 968
4250 09:57:28.667461 tx_last_pass[1][1][8] = 992
4251 09:57:28.670368 tx_win_center[1][1][9] = 980
4252 09:57:28.670789 tx_first_pass[1][1][9] = 969
4253 09:57:28.674197 tx_last_pass[1][1][9] = 992
4254 09:57:28.676952 tx_win_center[1][1][10] = 981
4255 09:57:28.680563 tx_first_pass[1][1][10] = 970
4256 09:57:28.683320 tx_last_pass[1][1][10] = 993
4257 09:57:28.683791 tx_win_center[1][1][11] = 982
4258 09:57:28.686661 tx_first_pass[1][1][11] = 970
4259 09:57:28.690305 tx_last_pass[1][1][11] = 994
4260 09:57:28.693563 tx_win_center[1][1][12] = 982
4261 09:57:28.696461 tx_first_pass[1][1][12] = 971
4262 09:57:28.696878 tx_last_pass[1][1][12] = 994
4263 09:57:28.700076 tx_win_center[1][1][13] = 982
4264 09:57:28.703718 tx_first_pass[1][1][13] = 971
4265 09:57:28.707028 tx_last_pass[1][1][13] = 994
4266 09:57:28.710225 tx_win_center[1][1][14] = 981
4267 09:57:28.713490 tx_first_pass[1][1][14] = 970
4268 09:57:28.714000 tx_last_pass[1][1][14] = 993
4269 09:57:28.716894 tx_win_center[1][1][15] = 977
4270 09:57:28.720295 tx_first_pass[1][1][15] = 965
4271 09:57:28.723523 tx_last_pass[1][1][15] = 989
4272 09:57:28.724036 dump params rx window
4273 09:57:28.726812 rx_firspass[0][0][0] = 5
4274 09:57:28.729743 rx_lastpass[0][0][0] = 38
4275 09:57:28.730270 rx_firspass[0][0][1] = 5
4276 09:57:28.732897 rx_lastpass[0][0][1] = 37
4277 09:57:28.736895 rx_firspass[0][0][2] = 6
4278 09:57:28.740247 rx_lastpass[0][0][2] = 36
4279 09:57:28.740663 rx_firspass[0][0][3] = -2
4280 09:57:28.743696 rx_lastpass[0][0][3] = 31
4281 09:57:28.747230 rx_firspass[0][0][4] = 4
4282 09:57:28.747805 rx_lastpass[0][0][4] = 37
4283 09:57:28.750103 rx_firspass[0][0][5] = 1
4284 09:57:28.753537 rx_lastpass[0][0][5] = 32
4285 09:57:28.754064 rx_firspass[0][0][6] = 3
4286 09:57:28.756495 rx_lastpass[0][0][6] = 34
4287 09:57:28.760082 rx_firspass[0][0][7] = 5
4288 09:57:28.763475 rx_lastpass[0][0][7] = 36
4289 09:57:28.764006 rx_firspass[0][0][8] = -3
4290 09:57:28.766734 rx_lastpass[0][0][8] = 33
4291 09:57:28.770103 rx_firspass[0][0][9] = 0
4292 09:57:28.770686 rx_lastpass[0][0][9] = 32
4293 09:57:28.773117 rx_firspass[0][0][10] = 8
4294 09:57:28.776345 rx_lastpass[0][0][10] = 41
4295 09:57:28.780053 rx_firspass[0][0][11] = 1
4296 09:57:28.780498 rx_lastpass[0][0][11] = 32
4297 09:57:28.783006 rx_firspass[0][0][12] = 2
4298 09:57:28.786334 rx_lastpass[0][0][12] = 37
4299 09:57:28.786752 rx_firspass[0][0][13] = 3
4300 09:57:28.789815 rx_lastpass[0][0][13] = 34
4301 09:57:28.793116 rx_firspass[0][0][14] = 2
4302 09:57:28.796541 rx_lastpass[0][0][14] = 37
4303 09:57:28.796961 rx_firspass[0][0][15] = 5
4304 09:57:28.800129 rx_lastpass[0][0][15] = 37
4305 09:57:28.803497 rx_firspass[0][1][0] = 6
4306 09:57:28.804014 rx_lastpass[0][1][0] = 40
4307 09:57:28.807032 rx_firspass[0][1][1] = 5
4308 09:57:28.810230 rx_lastpass[0][1][1] = 38
4309 09:57:28.813818 rx_firspass[0][1][2] = 6
4310 09:57:28.814330 rx_lastpass[0][1][2] = 38
4311 09:57:28.817117 rx_firspass[0][1][3] = -2
4312 09:57:28.820056 rx_lastpass[0][1][3] = 33
4313 09:57:28.820789 rx_firspass[0][1][4] = 5
4314 09:57:28.823273 rx_lastpass[0][1][4] = 39
4315 09:57:28.826509 rx_firspass[0][1][5] = 1
4316 09:57:28.826928 rx_lastpass[0][1][5] = 34
4317 09:57:28.830135 rx_firspass[0][1][6] = 3
4318 09:57:28.833528 rx_lastpass[0][1][6] = 37
4319 09:57:28.836463 rx_firspass[0][1][7] = 3
4320 09:57:28.836977 rx_lastpass[0][1][7] = 38
4321 09:57:28.839836 rx_firspass[0][1][8] = -2
4322 09:57:28.843492 rx_lastpass[0][1][8] = 32
4323 09:57:28.844006 rx_firspass[0][1][9] = 1
4324 09:57:28.846313 rx_lastpass[0][1][9] = 36
4325 09:57:28.850076 rx_firspass[0][1][10] = 7
4326 09:57:28.853039 rx_lastpass[0][1][10] = 43
4327 09:57:28.853459 rx_firspass[0][1][11] = -2
4328 09:57:28.856427 rx_lastpass[0][1][11] = 34
4329 09:57:28.860063 rx_firspass[0][1][12] = 1
4330 09:57:28.860578 rx_lastpass[0][1][12] = 37
4331 09:57:28.863445 rx_firspass[0][1][13] = 2
4332 09:57:28.866817 rx_lastpass[0][1][13] = 35
4333 09:57:28.870028 rx_firspass[0][1][14] = 3
4334 09:57:28.870566 rx_lastpass[0][1][14] = 37
4335 09:57:28.873009 rx_firspass[0][1][15] = 6
4336 09:57:28.876522 rx_lastpass[0][1][15] = 39
4337 09:57:28.877037 rx_firspass[1][0][0] = 5
4338 09:57:28.879905 rx_lastpass[1][0][0] = 39
4339 09:57:28.883507 rx_firspass[1][0][1] = 4
4340 09:57:28.886747 rx_lastpass[1][0][1] = 38
4341 09:57:28.887266 rx_firspass[1][0][2] = 2
4342 09:57:28.889818 rx_lastpass[1][0][2] = 36
4343 09:57:28.893285 rx_firspass[1][0][3] = -1
4344 09:57:28.893868 rx_lastpass[1][0][3] = 33
4345 09:57:28.896740 rx_firspass[1][0][4] = 5
4346 09:57:28.899717 rx_lastpass[1][0][4] = 38
4347 09:57:28.900133 rx_firspass[1][0][5] = 7
4348 09:57:28.903188 rx_lastpass[1][0][5] = 39
4349 09:57:28.906354 rx_firspass[1][0][6] = 7
4350 09:57:28.909830 rx_lastpass[1][0][6] = 40
4351 09:57:28.910252 rx_firspass[1][0][7] = 5
4352 09:57:28.913545 rx_lastpass[1][0][7] = 38
4353 09:57:28.916518 rx_firspass[1][0][8] = 1
4354 09:57:28.916948 rx_lastpass[1][0][8] = 34
4355 09:57:28.920064 rx_firspass[1][0][9] = 0
4356 09:57:28.923299 rx_lastpass[1][0][9] = 32
4357 09:57:28.926546 rx_firspass[1][0][10] = 5
4358 09:57:28.927108 rx_lastpass[1][0][10] = 35
4359 09:57:28.929793 rx_firspass[1][0][11] = 5
4360 09:57:28.932811 rx_lastpass[1][0][11] = 38
4361 09:57:28.933276 rx_firspass[1][0][12] = 6
4362 09:57:28.936629 rx_lastpass[1][0][12] = 38
4363 09:57:28.939494 rx_firspass[1][0][13] = 6
4364 09:57:28.943071 rx_lastpass[1][0][13] = 37
4365 09:57:28.943707 rx_firspass[1][0][14] = 7
4366 09:57:28.946126 rx_lastpass[1][0][14] = 38
4367 09:57:28.949814 rx_firspass[1][0][15] = -3
4368 09:57:28.952756 rx_lastpass[1][0][15] = 30
4369 09:57:28.953176 rx_firspass[1][1][0] = 4
4370 09:57:28.956374 rx_lastpass[1][1][0] = 40
4371 09:57:28.959539 rx_firspass[1][1][1] = 4
4372 09:57:28.960056 rx_lastpass[1][1][1] = 39
4373 09:57:28.962988 rx_firspass[1][1][2] = 1
4374 09:57:28.966239 rx_lastpass[1][1][2] = 36
4375 09:57:28.966831 rx_firspass[1][1][3] = -3
4376 09:57:28.970036 rx_lastpass[1][1][3] = 34
4377 09:57:28.973010 rx_firspass[1][1][4] = 4
4378 09:57:28.976201 rx_lastpass[1][1][4] = 39
4379 09:57:28.976635 rx_firspass[1][1][5] = 5
4380 09:57:28.979550 rx_lastpass[1][1][5] = 40
4381 09:57:28.983183 rx_firspass[1][1][6] = 6
4382 09:57:28.983771 rx_lastpass[1][1][6] = 41
4383 09:57:28.986405 rx_firspass[1][1][7] = 3
4384 09:57:28.989514 rx_lastpass[1][1][7] = 38
4385 09:57:28.989954 rx_firspass[1][1][8] = 0
4386 09:57:28.992894 rx_lastpass[1][1][8] = 35
4387 09:57:28.996032 rx_firspass[1][1][9] = -1
4388 09:57:28.999503 rx_lastpass[1][1][9] = 34
4389 09:57:28.999939 rx_firspass[1][1][10] = 3
4390 09:57:29.002995 rx_lastpass[1][1][10] = 39
4391 09:57:29.006272 rx_firspass[1][1][11] = 4
4392 09:57:29.009013 rx_lastpass[1][1][11] = 40
4393 09:57:29.009452 rx_firspass[1][1][12] = 5
4394 09:57:29.012452 rx_lastpass[1][1][12] = 40
4395 09:57:29.015649 rx_firspass[1][1][13] = 5
4396 09:57:29.016108 rx_lastpass[1][1][13] = 40
4397 09:57:29.019469 rx_firspass[1][1][14] = 5
4398 09:57:29.022884 rx_lastpass[1][1][14] = 40
4399 09:57:29.025732 rx_firspass[1][1][15] = -3
4400 09:57:29.026157 rx_lastpass[1][1][15] = 31
4401 09:57:29.029491 dump params clk_delay
4402 09:57:29.030017 clk_delay[0] = 1
4403 09:57:29.032469 clk_delay[1] = 0
4404 09:57:29.035719 dump params dqs_delay
4405 09:57:29.036245 dqs_delay[0][0] = -2
4406 09:57:29.039784 dqs_delay[0][1] = 0
4407 09:57:29.040312 dqs_delay[1][0] = 0
4408 09:57:29.043126 dqs_delay[1][1] = 0
4409 09:57:29.046470 dump params delay_cell_unit = 735
4410 09:57:29.046997 dump source = 0x0
4411 09:57:29.049201 dump params frequency:1200
4412 09:57:29.052748 dump params rank number:2
4413 09:57:29.053283
4414 09:57:29.053627 dump params write leveling
4415 09:57:29.055860 write leveling[0][0][0] = 0x0
4416 09:57:29.059364 write leveling[0][0][1] = 0x0
4417 09:57:29.062846 write leveling[0][1][0] = 0x0
4418 09:57:29.066400 write leveling[0][1][1] = 0x0
4419 09:57:29.066957 write leveling[1][0][0] = 0x0
4420 09:57:29.069840 write leveling[1][0][1] = 0x0
4421 09:57:29.072543 write leveling[1][1][0] = 0x0
4422 09:57:29.076218 write leveling[1][1][1] = 0x0
4423 09:57:29.076792 dump params cbt_cs
4424 09:57:29.079020 cbt_cs[0][0] = 0x0
4425 09:57:29.079478 cbt_cs[0][1] = 0x0
4426 09:57:29.082603 cbt_cs[1][0] = 0x0
4427 09:57:29.083023 cbt_cs[1][1] = 0x0
4428 09:57:29.086247 dump params cbt_mr12
4429 09:57:29.086768 cbt_mr12[0][0] = 0x0
4430 09:57:29.089361 cbt_mr12[0][1] = 0x0
4431 09:57:29.092789 cbt_mr12[1][0] = 0x0
4432 09:57:29.093307 cbt_mr12[1][1] = 0x0
4433 09:57:29.095979 dump params tx window
4434 09:57:29.099286 tx_center_min[0][0][0] = 0
4435 09:57:29.099860 tx_center_max[0][0][0] = 0
4436 09:57:29.102683 tx_center_min[0][0][1] = 0
4437 09:57:29.105769 tx_center_max[0][0][1] = 0
4438 09:57:29.106300 tx_center_min[0][1][0] = 0
4439 09:57:29.109240 tx_center_max[0][1][0] = 0
4440 09:57:29.112795 tx_center_min[0][1][1] = 0
4441 09:57:29.115932 tx_center_max[0][1][1] = 0
4442 09:57:29.116462 tx_center_min[1][0][0] = 0
4443 09:57:29.119584 tx_center_max[1][0][0] = 0
4444 09:57:29.122304 tx_center_min[1][0][1] = 0
4445 09:57:29.125489 tx_center_max[1][0][1] = 0
4446 09:57:29.125943 tx_center_min[1][1][0] = 0
4447 09:57:29.129367 tx_center_max[1][1][0] = 0
4448 09:57:29.132168 tx_center_min[1][1][1] = 0
4449 09:57:29.135880 tx_center_max[1][1][1] = 0
4450 09:57:29.136307 dump params tx window
4451 09:57:29.139220 tx_win_center[0][0][0] = 0
4452 09:57:29.142685 tx_first_pass[0][0][0] = 0
4453 09:57:29.143552 tx_last_pass[0][0][0] = 0
4454 09:57:29.145793 tx_win_center[0][0][1] = 0
4455 09:57:29.148875 tx_first_pass[0][0][1] = 0
4456 09:57:29.152153 tx_last_pass[0][0][1] = 0
4457 09:57:29.152682 tx_win_center[0][0][2] = 0
4458 09:57:29.155617 tx_first_pass[0][0][2] = 0
4459 09:57:29.158828 tx_last_pass[0][0][2] = 0
4460 09:57:29.159544 tx_win_center[0][0][3] = 0
4461 09:57:29.161902 tx_first_pass[0][0][3] = 0
4462 09:57:29.165381 tx_last_pass[0][0][3] = 0
4463 09:57:29.168932 tx_win_center[0][0][4] = 0
4464 09:57:29.169058 tx_first_pass[0][0][4] = 0
4465 09:57:29.171426 tx_last_pass[0][0][4] = 0
4466 09:57:29.175295 tx_win_center[0][0][5] = 0
4467 09:57:29.178310 tx_first_pass[0][0][5] = 0
4468 09:57:29.178903 tx_last_pass[0][0][5] = 0
4469 09:57:29.182176 tx_win_center[0][0][6] = 0
4470 09:57:29.185489 tx_first_pass[0][0][6] = 0
4471 09:57:29.185957 tx_last_pass[0][0][6] = 0
4472 09:57:29.188443 tx_win_center[0][0][7] = 0
4473 09:57:29.191942 tx_first_pass[0][0][7] = 0
4474 09:57:29.195053 tx_last_pass[0][0][7] = 0
4475 09:57:29.195591 tx_win_center[0][0][8] = 0
4476 09:57:29.198539 tx_first_pass[0][0][8] = 0
4477 09:57:29.201832 tx_last_pass[0][0][8] = 0
4478 09:57:29.205872 tx_win_center[0][0][9] = 0
4479 09:57:29.206569 tx_first_pass[0][0][9] = 0
4480 09:57:29.208649 tx_last_pass[0][0][9] = 0
4481 09:57:29.211850 tx_win_center[0][0][10] = 0
4482 09:57:29.215475 tx_first_pass[0][0][10] = 0
4483 09:57:29.215997 tx_last_pass[0][0][10] = 0
4484 09:57:29.218754 tx_win_center[0][0][11] = 0
4485 09:57:29.221836 tx_first_pass[0][0][11] = 0
4486 09:57:29.225288 tx_last_pass[0][0][11] = 0
4487 09:57:29.225809 tx_win_center[0][0][12] = 0
4488 09:57:29.228288 tx_first_pass[0][0][12] = 0
4489 09:57:29.231734 tx_last_pass[0][0][12] = 0
4490 09:57:29.235247 tx_win_center[0][0][13] = 0
4491 09:57:29.235850 tx_first_pass[0][0][13] = 0
4492 09:57:29.238375 tx_last_pass[0][0][13] = 0
4493 09:57:29.241848 tx_win_center[0][0][14] = 0
4494 09:57:29.244950 tx_first_pass[0][0][14] = 0
4495 09:57:29.245369 tx_last_pass[0][0][14] = 0
4496 09:57:29.248822 tx_win_center[0][0][15] = 0
4497 09:57:29.252285 tx_first_pass[0][0][15] = 0
4498 09:57:29.255265 tx_last_pass[0][0][15] = 0
4499 09:57:29.255812 tx_win_center[0][1][0] = 0
4500 09:57:29.258708 tx_first_pass[0][1][0] = 0
4501 09:57:29.262089 tx_last_pass[0][1][0] = 0
4502 09:57:29.265297 tx_win_center[0][1][1] = 0
4503 09:57:29.265814 tx_first_pass[0][1][1] = 0
4504 09:57:29.268674 tx_last_pass[0][1][1] = 0
4505 09:57:29.271401 tx_win_center[0][1][2] = 0
4506 09:57:29.271964 tx_first_pass[0][1][2] = 0
4507 09:57:29.274994 tx_last_pass[0][1][2] = 0
4508 09:57:29.278444 tx_win_center[0][1][3] = 0
4509 09:57:29.281747 tx_first_pass[0][1][3] = 0
4510 09:57:29.282270 tx_last_pass[0][1][3] = 0
4511 09:57:29.284995 tx_win_center[0][1][4] = 0
4512 09:57:29.288277 tx_first_pass[0][1][4] = 0
4513 09:57:29.291581 tx_last_pass[0][1][4] = 0
4514 09:57:29.292134 tx_win_center[0][1][5] = 0
4515 09:57:29.294950 tx_first_pass[0][1][5] = 0
4516 09:57:29.298466 tx_last_pass[0][1][5] = 0
4517 09:57:29.298980 tx_win_center[0][1][6] = 0
4518 09:57:29.301886 tx_first_pass[0][1][6] = 0
4519 09:57:29.305184 tx_last_pass[0][1][6] = 0
4520 09:57:29.307870 tx_win_center[0][1][7] = 0
4521 09:57:29.308338 tx_first_pass[0][1][7] = 0
4522 09:57:29.311529 tx_last_pass[0][1][7] = 0
4523 09:57:29.314945 tx_win_center[0][1][8] = 0
4524 09:57:29.318272 tx_first_pass[0][1][8] = 0
4525 09:57:29.318826 tx_last_pass[0][1][8] = 0
4526 09:57:29.321616 tx_win_center[0][1][9] = 0
4527 09:57:29.325000 tx_first_pass[0][1][9] = 0
4528 09:57:29.325557 tx_last_pass[0][1][9] = 0
4529 09:57:29.328232 tx_win_center[0][1][10] = 0
4530 09:57:29.331476 tx_first_pass[0][1][10] = 0
4531 09:57:29.334824 tx_last_pass[0][1][10] = 0
4532 09:57:29.335250 tx_win_center[0][1][11] = 0
4533 09:57:29.338385 tx_first_pass[0][1][11] = 0
4534 09:57:29.341805 tx_last_pass[0][1][11] = 0
4535 09:57:29.344726 tx_win_center[0][1][12] = 0
4536 09:57:29.345228 tx_first_pass[0][1][12] = 0
4537 09:57:29.347877 tx_last_pass[0][1][12] = 0
4538 09:57:29.351538 tx_win_center[0][1][13] = 0
4539 09:57:29.354785 tx_first_pass[0][1][13] = 0
4540 09:57:29.355222 tx_last_pass[0][1][13] = 0
4541 09:57:29.358173 tx_win_center[0][1][14] = 0
4542 09:57:29.361283 tx_first_pass[0][1][14] = 0
4543 09:57:29.364744 tx_last_pass[0][1][14] = 0
4544 09:57:29.365268 tx_win_center[0][1][15] = 0
4545 09:57:29.367990 tx_first_pass[0][1][15] = 0
4546 09:57:29.371394 tx_last_pass[0][1][15] = 0
4547 09:57:29.374616 tx_win_center[1][0][0] = 0
4548 09:57:29.375032 tx_first_pass[1][0][0] = 0
4549 09:57:29.377859 tx_last_pass[1][0][0] = 0
4550 09:57:29.381019 tx_win_center[1][0][1] = 0
4551 09:57:29.384673 tx_first_pass[1][0][1] = 0
4552 09:57:29.385094 tx_last_pass[1][0][1] = 0
4553 09:57:29.387466 tx_win_center[1][0][2] = 0
4554 09:57:29.391322 tx_first_pass[1][0][2] = 0
4555 09:57:29.394822 tx_last_pass[1][0][2] = 0
4556 09:57:29.395443 tx_win_center[1][0][3] = 0
4557 09:57:29.397523 tx_first_pass[1][0][3] = 0
4558 09:57:29.401093 tx_last_pass[1][0][3] = 0
4559 09:57:29.401617 tx_win_center[1][0][4] = 0
4560 09:57:29.404754 tx_first_pass[1][0][4] = 0
4561 09:57:29.407727 tx_last_pass[1][0][4] = 0
4562 09:57:29.410928 tx_win_center[1][0][5] = 0
4563 09:57:29.411388 tx_first_pass[1][0][5] = 0
4564 09:57:29.414359 tx_last_pass[1][0][5] = 0
4565 09:57:29.417624 tx_win_center[1][0][6] = 0
4566 09:57:29.421046 tx_first_pass[1][0][6] = 0
4567 09:57:29.421464 tx_last_pass[1][0][6] = 0
4568 09:57:29.424429 tx_win_center[1][0][7] = 0
4569 09:57:29.427483 tx_first_pass[1][0][7] = 0
4570 09:57:29.428001 tx_last_pass[1][0][7] = 0
4571 09:57:29.430750 tx_win_center[1][0][8] = 0
4572 09:57:29.434178 tx_first_pass[1][0][8] = 0
4573 09:57:29.437606 tx_last_pass[1][0][8] = 0
4574 09:57:29.438131 tx_win_center[1][0][9] = 0
4575 09:57:29.441046 tx_first_pass[1][0][9] = 0
4576 09:57:29.444278 tx_last_pass[1][0][9] = 0
4577 09:57:29.447792 tx_win_center[1][0][10] = 0
4578 09:57:29.448209 tx_first_pass[1][0][10] = 0
4579 09:57:29.450973 tx_last_pass[1][0][10] = 0
4580 09:57:29.454281 tx_win_center[1][0][11] = 0
4581 09:57:29.457703 tx_first_pass[1][0][11] = 0
4582 09:57:29.458227 tx_last_pass[1][0][11] = 0
4583 09:57:29.461247 tx_win_center[1][0][12] = 0
4584 09:57:29.464280 tx_first_pass[1][0][12] = 0
4585 09:57:29.468016 tx_last_pass[1][0][12] = 0
4586 09:57:29.468541 tx_win_center[1][0][13] = 0
4587 09:57:29.470954 tx_first_pass[1][0][13] = 0
4588 09:57:29.474232 tx_last_pass[1][0][13] = 0
4589 09:57:29.477546 tx_win_center[1][0][14] = 0
4590 09:57:29.477974 tx_first_pass[1][0][14] = 0
4591 09:57:29.481083 tx_last_pass[1][0][14] = 0
4592 09:57:29.484326 tx_win_center[1][0][15] = 0
4593 09:57:29.487567 tx_first_pass[1][0][15] = 0
4594 09:57:29.488095 tx_last_pass[1][0][15] = 0
4595 09:57:29.491171 tx_win_center[1][1][0] = 0
4596 09:57:29.494393 tx_first_pass[1][1][0] = 0
4597 09:57:29.494923 tx_last_pass[1][1][0] = 0
4598 09:57:29.497289 tx_win_center[1][1][1] = 0
4599 09:57:29.500960 tx_first_pass[1][1][1] = 0
4600 09:57:29.503872 tx_last_pass[1][1][1] = 0
4601 09:57:29.504293 tx_win_center[1][1][2] = 0
4602 09:57:29.507124 tx_first_pass[1][1][2] = 0
4603 09:57:29.510524 tx_last_pass[1][1][2] = 0
4604 09:57:29.514183 tx_win_center[1][1][3] = 0
4605 09:57:29.514703 tx_first_pass[1][1][3] = 0
4606 09:57:29.517213 tx_last_pass[1][1][3] = 0
4607 09:57:29.520996 tx_win_center[1][1][4] = 0
4608 09:57:29.521536 tx_first_pass[1][1][4] = 0
4609 09:57:29.523850 tx_last_pass[1][1][4] = 0
4610 09:57:29.527010 tx_win_center[1][1][5] = 0
4611 09:57:29.530898 tx_first_pass[1][1][5] = 0
4612 09:57:29.531471 tx_last_pass[1][1][5] = 0
4613 09:57:29.533791 tx_win_center[1][1][6] = 0
4614 09:57:29.537265 tx_first_pass[1][1][6] = 0
4615 09:57:29.540928 tx_last_pass[1][1][6] = 0
4616 09:57:29.541347 tx_win_center[1][1][7] = 0
4617 09:57:29.543624 tx_first_pass[1][1][7] = 0
4618 09:57:29.547854 tx_last_pass[1][1][7] = 0
4619 09:57:29.548416 tx_win_center[1][1][8] = 0
4620 09:57:29.550777 tx_first_pass[1][1][8] = 0
4621 09:57:29.553885 tx_last_pass[1][1][8] = 0
4622 09:57:29.557567 tx_win_center[1][1][9] = 0
4623 09:57:29.558233 tx_first_pass[1][1][9] = 0
4624 09:57:29.560663 tx_last_pass[1][1][9] = 0
4625 09:57:29.563843 tx_win_center[1][1][10] = 0
4626 09:57:29.567243 tx_first_pass[1][1][10] = 0
4627 09:57:29.567823 tx_last_pass[1][1][10] = 0
4628 09:57:29.570642 tx_win_center[1][1][11] = 0
4629 09:57:29.573901 tx_first_pass[1][1][11] = 0
4630 09:57:29.576720 tx_last_pass[1][1][11] = 0
4631 09:57:29.577140 tx_win_center[1][1][12] = 0
4632 09:57:29.580657 tx_first_pass[1][1][12] = 0
4633 09:57:29.583635 tx_last_pass[1][1][12] = 0
4634 09:57:29.587564 tx_win_center[1][1][13] = 0
4635 09:57:29.588094 tx_first_pass[1][1][13] = 0
4636 09:57:29.589967 tx_last_pass[1][1][13] = 0
4637 09:57:29.593573 tx_win_center[1][1][14] = 0
4638 09:57:29.596782 tx_first_pass[1][1][14] = 0
4639 09:57:29.597396 tx_last_pass[1][1][14] = 0
4640 09:57:29.600415 tx_win_center[1][1][15] = 0
4641 09:57:29.603765 tx_first_pass[1][1][15] = 0
4642 09:57:29.607386 tx_last_pass[1][1][15] = 0
4643 09:57:29.607988 dump params rx window
4644 09:57:29.610438 rx_firspass[0][0][0] = 0
4645 09:57:29.614104 rx_lastpass[0][0][0] = 0
4646 09:57:29.614626 rx_firspass[0][0][1] = 0
4647 09:57:29.617375 rx_lastpass[0][0][1] = 0
4648 09:57:29.620590 rx_firspass[0][0][2] = 0
4649 09:57:29.621112 rx_lastpass[0][0][2] = 0
4650 09:57:29.623675 rx_firspass[0][0][3] = 0
4651 09:57:29.626704 rx_lastpass[0][0][3] = 0
4652 09:57:29.627121 rx_firspass[0][0][4] = 0
4653 09:57:29.630540 rx_lastpass[0][0][4] = 0
4654 09:57:29.633617 rx_firspass[0][0][5] = 0
4655 09:57:29.634039 rx_lastpass[0][0][5] = 0
4656 09:57:29.637147 rx_firspass[0][0][6] = 0
4657 09:57:29.640361 rx_lastpass[0][0][6] = 0
4658 09:57:29.643919 rx_firspass[0][0][7] = 0
4659 09:57:29.644440 rx_lastpass[0][0][7] = 0
4660 09:57:29.647095 rx_firspass[0][0][8] = 0
4661 09:57:29.650103 rx_lastpass[0][0][8] = 0
4662 09:57:29.650539 rx_firspass[0][0][9] = 0
4663 09:57:29.653752 rx_lastpass[0][0][9] = 0
4664 09:57:29.656933 rx_firspass[0][0][10] = 0
4665 09:57:29.657349 rx_lastpass[0][0][10] = 0
4666 09:57:29.660230 rx_firspass[0][0][11] = 0
4667 09:57:29.663522 rx_lastpass[0][0][11] = 0
4668 09:57:29.667195 rx_firspass[0][0][12] = 0
4669 09:57:29.667660 rx_lastpass[0][0][12] = 0
4670 09:57:29.670178 rx_firspass[0][0][13] = 0
4671 09:57:29.673065 rx_lastpass[0][0][13] = 0
4672 09:57:29.673484 rx_firspass[0][0][14] = 0
4673 09:57:29.676503 rx_lastpass[0][0][14] = 0
4674 09:57:29.679970 rx_firspass[0][0][15] = 0
4675 09:57:29.683974 rx_lastpass[0][0][15] = 0
4676 09:57:29.684539 rx_firspass[0][1][0] = 0
4677 09:57:29.687103 rx_lastpass[0][1][0] = 0
4678 09:57:29.689977 rx_firspass[0][1][1] = 0
4679 09:57:29.690396 rx_lastpass[0][1][1] = 0
4680 09:57:29.693397 rx_firspass[0][1][2] = 0
4681 09:57:29.696644 rx_lastpass[0][1][2] = 0
4682 09:57:29.697080 rx_firspass[0][1][3] = 0
4683 09:57:29.699950 rx_lastpass[0][1][3] = 0
4684 09:57:29.703446 rx_firspass[0][1][4] = 0
4685 09:57:29.703867 rx_lastpass[0][1][4] = 0
4686 09:57:29.706918 rx_firspass[0][1][5] = 0
4687 09:57:29.710315 rx_lastpass[0][1][5] = 0
4688 09:57:29.710733 rx_firspass[0][1][6] = 0
4689 09:57:29.713694 rx_lastpass[0][1][6] = 0
4690 09:57:29.717223 rx_firspass[0][1][7] = 0
4691 09:57:29.717741 rx_lastpass[0][1][7] = 0
4692 09:57:29.720582 rx_firspass[0][1][8] = 0
4693 09:57:29.723983 rx_lastpass[0][1][8] = 0
4694 09:57:29.724499 rx_firspass[0][1][9] = 0
4695 09:57:29.726922 rx_lastpass[0][1][9] = 0
4696 09:57:29.730204 rx_firspass[0][1][10] = 0
4697 09:57:29.733368 rx_lastpass[0][1][10] = 0
4698 09:57:29.733857 rx_firspass[0][1][11] = 0
4699 09:57:29.737295 rx_lastpass[0][1][11] = 0
4700 09:57:29.740529 rx_firspass[0][1][12] = 0
4701 09:57:29.741080 rx_lastpass[0][1][12] = 0
4702 09:57:29.744033 rx_firspass[0][1][13] = 0
4703 09:57:29.747222 rx_lastpass[0][1][13] = 0
4704 09:57:29.750531 rx_firspass[0][1][14] = 0
4705 09:57:29.751067 rx_lastpass[0][1][14] = 0
4706 09:57:29.753823 rx_firspass[0][1][15] = 0
4707 09:57:29.756964 rx_lastpass[0][1][15] = 0
4708 09:57:29.757392 rx_firspass[1][0][0] = 0
4709 09:57:29.760311 rx_lastpass[1][0][0] = 0
4710 09:57:29.763724 rx_firspass[1][0][1] = 0
4711 09:57:29.766781 rx_lastpass[1][0][1] = 0
4712 09:57:29.767207 rx_firspass[1][0][2] = 0
4713 09:57:29.770235 rx_lastpass[1][0][2] = 0
4714 09:57:29.773399 rx_firspass[1][0][3] = 0
4715 09:57:29.773924 rx_lastpass[1][0][3] = 0
4716 09:57:29.776497 rx_firspass[1][0][4] = 0
4717 09:57:29.779921 rx_lastpass[1][0][4] = 0
4718 09:57:29.780343 rx_firspass[1][0][5] = 0
4719 09:57:29.783274 rx_lastpass[1][0][5] = 0
4720 09:57:29.786848 rx_firspass[1][0][6] = 0
4721 09:57:29.787362 rx_lastpass[1][0][6] = 0
4722 09:57:29.789950 rx_firspass[1][0][7] = 0
4723 09:57:29.793160 rx_lastpass[1][0][7] = 0
4724 09:57:29.793584 rx_firspass[1][0][8] = 0
4725 09:57:29.796601 rx_lastpass[1][0][8] = 0
4726 09:57:29.799922 rx_firspass[1][0][9] = 0
4727 09:57:29.803159 rx_lastpass[1][0][9] = 0
4728 09:57:29.803618 rx_firspass[1][0][10] = 0
4729 09:57:29.806449 rx_lastpass[1][0][10] = 0
4730 09:57:29.809905 rx_firspass[1][0][11] = 0
4731 09:57:29.810347 rx_lastpass[1][0][11] = 0
4732 09:57:29.813103 rx_firspass[1][0][12] = 0
4733 09:57:29.816205 rx_lastpass[1][0][12] = 0
4734 09:57:29.819443 rx_firspass[1][0][13] = 0
4735 09:57:29.819879 rx_lastpass[1][0][13] = 0
4736 09:57:29.823172 rx_firspass[1][0][14] = 0
4737 09:57:29.826151 rx_lastpass[1][0][14] = 0
4738 09:57:29.826573 rx_firspass[1][0][15] = 0
4739 09:57:29.829650 rx_lastpass[1][0][15] = 0
4740 09:57:29.832975 rx_firspass[1][1][0] = 0
4741 09:57:29.833396 rx_lastpass[1][1][0] = 0
4742 09:57:29.836191 rx_firspass[1][1][1] = 0
4743 09:57:29.839996 rx_lastpass[1][1][1] = 0
4744 09:57:29.842984 rx_firspass[1][1][2] = 0
4745 09:57:29.843440 rx_lastpass[1][1][2] = 0
4746 09:57:29.846407 rx_firspass[1][1][3] = 0
4747 09:57:29.850033 rx_lastpass[1][1][3] = 0
4748 09:57:29.850552 rx_firspass[1][1][4] = 0
4749 09:57:29.853339 rx_lastpass[1][1][4] = 0
4750 09:57:29.856530 rx_firspass[1][1][5] = 0
4751 09:57:29.857048 rx_lastpass[1][1][5] = 0
4752 09:57:29.860238 rx_firspass[1][1][6] = 0
4753 09:57:29.863177 rx_lastpass[1][1][6] = 0
4754 09:57:29.863739 rx_firspass[1][1][7] = 0
4755 09:57:29.866294 rx_lastpass[1][1][7] = 0
4756 09:57:29.869708 rx_firspass[1][1][8] = 0
4757 09:57:29.870223 rx_lastpass[1][1][8] = 0
4758 09:57:29.872791 rx_firspass[1][1][9] = 0
4759 09:57:29.876092 rx_lastpass[1][1][9] = 0
4760 09:57:29.879960 rx_firspass[1][1][10] = 0
4761 09:57:29.880380 rx_lastpass[1][1][10] = 0
4762 09:57:29.883115 rx_firspass[1][1][11] = 0
4763 09:57:29.886345 rx_lastpass[1][1][11] = 0
4764 09:57:29.886857 rx_firspass[1][1][12] = 0
4765 09:57:29.889751 rx_lastpass[1][1][12] = 0
4766 09:57:29.892571 rx_firspass[1][1][13] = 0
4767 09:57:29.895834 rx_lastpass[1][1][13] = 0
4768 09:57:29.896283 rx_firspass[1][1][14] = 0
4769 09:57:29.899355 rx_lastpass[1][1][14] = 0
4770 09:57:29.903064 rx_firspass[1][1][15] = 0
4771 09:57:29.903639 rx_lastpass[1][1][15] = 0
4772 09:57:29.905896 dump params clk_delay
4773 09:57:29.906327 clk_delay[0] = 0
4774 09:57:29.909283 clk_delay[1] = 0
4775 09:57:29.912527 dump params dqs_delay
4776 09:57:29.913145 dqs_delay[0][0] = 0
4777 09:57:29.915977 dqs_delay[0][1] = 0
4778 09:57:29.916395 dqs_delay[1][0] = 0
4779 09:57:29.919452 dqs_delay[1][1] = 0
4780 09:57:29.922763 dump params delay_cell_unit = 735
4781 09:57:29.923279 dump source = 0x0
4782 09:57:29.925731 dump params frequency:800
4783 09:57:29.929097 dump params rank number:2
4784 09:57:29.929517
4785 09:57:29.929853 dump params write leveling
4786 09:57:29.932304 write leveling[0][0][0] = 0x0
4787 09:57:29.935790 write leveling[0][0][1] = 0x0
4788 09:57:29.939464 write leveling[0][1][0] = 0x0
4789 09:57:29.942775 write leveling[0][1][1] = 0x0
4790 09:57:29.943288 write leveling[1][0][0] = 0x0
4791 09:57:29.945891 write leveling[1][0][1] = 0x0
4792 09:57:29.949063 write leveling[1][1][0] = 0x0
4793 09:57:29.952401 write leveling[1][1][1] = 0x0
4794 09:57:29.952840 dump params cbt_cs
4795 09:57:29.955770 cbt_cs[0][0] = 0x0
4796 09:57:29.956178 cbt_cs[0][1] = 0x0
4797 09:57:29.959164 cbt_cs[1][0] = 0x0
4798 09:57:29.959612 cbt_cs[1][1] = 0x0
4799 09:57:29.962492 dump params cbt_mr12
4800 09:57:29.966075 cbt_mr12[0][0] = 0x0
4801 09:57:29.966592 cbt_mr12[0][1] = 0x0
4802 09:57:29.969077 cbt_mr12[1][0] = 0x0
4803 09:57:29.969496 cbt_mr12[1][1] = 0x0
4804 09:57:29.972190 dump params tx window
4805 09:57:29.975577 tx_center_min[0][0][0] = 0
4806 09:57:29.976003 tx_center_max[0][0][0] = 0
4807 09:57:29.979202 tx_center_min[0][0][1] = 0
4808 09:57:29.982385 tx_center_max[0][0][1] = 0
4809 09:57:29.986132 tx_center_min[0][1][0] = 0
4810 09:57:29.986653 tx_center_max[0][1][0] = 0
4811 09:57:29.989238 tx_center_min[0][1][1] = 0
4812 09:57:29.992795 tx_center_max[0][1][1] = 0
4813 09:57:29.993308 tx_center_min[1][0][0] = 0
4814 09:57:29.995694 tx_center_max[1][0][0] = 0
4815 09:57:29.998825 tx_center_min[1][0][1] = 0
4816 09:57:30.002024 tx_center_max[1][0][1] = 0
4817 09:57:30.002446 tx_center_min[1][1][0] = 0
4818 09:57:30.005380 tx_center_max[1][1][0] = 0
4819 09:57:30.008618 tx_center_min[1][1][1] = 0
4820 09:57:30.012066 tx_center_max[1][1][1] = 0
4821 09:57:30.012491 dump params tx window
4822 09:57:30.015569 tx_win_center[0][0][0] = 0
4823 09:57:30.019045 tx_first_pass[0][0][0] = 0
4824 09:57:30.019617 tx_last_pass[0][0][0] = 0
4825 09:57:30.022771 tx_win_center[0][0][1] = 0
4826 09:57:30.025663 tx_first_pass[0][0][1] = 0
4827 09:57:30.029075 tx_last_pass[0][0][1] = 0
4828 09:57:30.029518 tx_win_center[0][0][2] = 0
4829 09:57:30.032248 tx_first_pass[0][0][2] = 0
4830 09:57:30.035722 tx_last_pass[0][0][2] = 0
4831 09:57:30.039068 tx_win_center[0][0][3] = 0
4832 09:57:30.039624 tx_first_pass[0][0][3] = 0
4833 09:57:30.042467 tx_last_pass[0][0][3] = 0
4834 09:57:30.045285 tx_win_center[0][0][4] = 0
4835 09:57:30.045702 tx_first_pass[0][0][4] = 0
4836 09:57:30.048837 tx_last_pass[0][0][4] = 0
4837 09:57:30.052446 tx_win_center[0][0][5] = 0
4838 09:57:30.055451 tx_first_pass[0][0][5] = 0
4839 09:57:30.055976 tx_last_pass[0][0][5] = 0
4840 09:57:30.058991 tx_win_center[0][0][6] = 0
4841 09:57:30.062262 tx_first_pass[0][0][6] = 0
4842 09:57:30.065429 tx_last_pass[0][0][6] = 0
4843 09:57:30.065949 tx_win_center[0][0][7] = 0
4844 09:57:30.068805 tx_first_pass[0][0][7] = 0
4845 09:57:30.072163 tx_last_pass[0][0][7] = 0
4846 09:57:30.072592 tx_win_center[0][0][8] = 0
4847 09:57:30.075345 tx_first_pass[0][0][8] = 0
4848 09:57:30.079177 tx_last_pass[0][0][8] = 0
4849 09:57:30.081814 tx_win_center[0][0][9] = 0
4850 09:57:30.082239 tx_first_pass[0][0][9] = 0
4851 09:57:30.085713 tx_last_pass[0][0][9] = 0
4852 09:57:30.088633 tx_win_center[0][0][10] = 0
4853 09:57:30.091843 tx_first_pass[0][0][10] = 0
4854 09:57:30.092266 tx_last_pass[0][0][10] = 0
4855 09:57:30.095499 tx_win_center[0][0][11] = 0
4856 09:57:30.098569 tx_first_pass[0][0][11] = 0
4857 09:57:30.101702 tx_last_pass[0][0][11] = 0
4858 09:57:30.102125 tx_win_center[0][0][12] = 0
4859 09:57:30.105336 tx_first_pass[0][0][12] = 0
4860 09:57:30.108717 tx_last_pass[0][0][12] = 0
4861 09:57:30.111956 tx_win_center[0][0][13] = 0
4862 09:57:30.112381 tx_first_pass[0][0][13] = 0
4863 09:57:30.115574 tx_last_pass[0][0][13] = 0
4864 09:57:30.118898 tx_win_center[0][0][14] = 0
4865 09:57:30.122317 tx_first_pass[0][0][14] = 0
4866 09:57:30.122837 tx_last_pass[0][0][14] = 0
4867 09:57:30.125579 tx_win_center[0][0][15] = 0
4868 09:57:30.128569 tx_first_pass[0][0][15] = 0
4869 09:57:30.132098 tx_last_pass[0][0][15] = 0
4870 09:57:30.132618 tx_win_center[0][1][0] = 0
4871 09:57:30.135087 tx_first_pass[0][1][0] = 0
4872 09:57:30.139147 tx_last_pass[0][1][0] = 0
4873 09:57:30.139716 tx_win_center[0][1][1] = 0
4874 09:57:30.142389 tx_first_pass[0][1][1] = 0
4875 09:57:30.145698 tx_last_pass[0][1][1] = 0
4876 09:57:30.148769 tx_win_center[0][1][2] = 0
4877 09:57:30.149416 tx_first_pass[0][1][2] = 0
4878 09:57:30.151985 tx_last_pass[0][1][2] = 0
4879 09:57:30.155557 tx_win_center[0][1][3] = 0
4880 09:57:30.158630 tx_first_pass[0][1][3] = 0
4881 09:57:30.159156 tx_last_pass[0][1][3] = 0
4882 09:57:30.161816 tx_win_center[0][1][4] = 0
4883 09:57:30.165111 tx_first_pass[0][1][4] = 0
4884 09:57:30.165644 tx_last_pass[0][1][4] = 0
4885 09:57:30.168399 tx_win_center[0][1][5] = 0
4886 09:57:30.171688 tx_first_pass[0][1][5] = 0
4887 09:57:30.175430 tx_last_pass[0][1][5] = 0
4888 09:57:30.175858 tx_win_center[0][1][6] = 0
4889 09:57:30.178494 tx_first_pass[0][1][6] = 0
4890 09:57:30.181672 tx_last_pass[0][1][6] = 0
4891 09:57:30.185130 tx_win_center[0][1][7] = 0
4892 09:57:30.185555 tx_first_pass[0][1][7] = 0
4893 09:57:30.188626 tx_last_pass[0][1][7] = 0
4894 09:57:30.191518 tx_win_center[0][1][8] = 0
4895 09:57:30.191944 tx_first_pass[0][1][8] = 0
4896 09:57:30.195233 tx_last_pass[0][1][8] = 0
4897 09:57:30.198279 tx_win_center[0][1][9] = 0
4898 09:57:30.201601 tx_first_pass[0][1][9] = 0
4899 09:57:30.202109 tx_last_pass[0][1][9] = 0
4900 09:57:30.204777 tx_win_center[0][1][10] = 0
4901 09:57:30.208000 tx_first_pass[0][1][10] = 0
4902 09:57:30.211233 tx_last_pass[0][1][10] = 0
4903 09:57:30.211866 tx_win_center[0][1][11] = 0
4904 09:57:30.214783 tx_first_pass[0][1][11] = 0
4905 09:57:30.217906 tx_last_pass[0][1][11] = 0
4906 09:57:30.221290 tx_win_center[0][1][12] = 0
4907 09:57:30.221847 tx_first_pass[0][1][12] = 0
4908 09:57:30.225001 tx_last_pass[0][1][12] = 0
4909 09:57:30.227708 tx_win_center[0][1][13] = 0
4910 09:57:30.231072 tx_first_pass[0][1][13] = 0
4911 09:57:30.231648 tx_last_pass[0][1][13] = 0
4912 09:57:30.234391 tx_win_center[0][1][14] = 0
4913 09:57:30.237702 tx_first_pass[0][1][14] = 0
4914 09:57:30.241242 tx_last_pass[0][1][14] = 0
4915 09:57:30.241824 tx_win_center[0][1][15] = 0
4916 09:57:30.244830 tx_first_pass[0][1][15] = 0
4917 09:57:30.247986 tx_last_pass[0][1][15] = 0
4918 09:57:30.250847 tx_win_center[1][0][0] = 0
4919 09:57:30.251464 tx_first_pass[1][0][0] = 0
4920 09:57:30.254549 tx_last_pass[1][0][0] = 0
4921 09:57:30.257842 tx_win_center[1][0][1] = 0
4922 09:57:30.261229 tx_first_pass[1][0][1] = 0
4923 09:57:30.261651 tx_last_pass[1][0][1] = 0
4924 09:57:30.264455 tx_win_center[1][0][2] = 0
4925 09:57:30.267516 tx_first_pass[1][0][2] = 0
4926 09:57:30.271091 tx_last_pass[1][0][2] = 0
4927 09:57:30.271661 tx_win_center[1][0][3] = 0
4928 09:57:30.274278 tx_first_pass[1][0][3] = 0
4929 09:57:30.277598 tx_last_pass[1][0][3] = 0
4930 09:57:30.278025 tx_win_center[1][0][4] = 0
4931 09:57:30.280723 tx_first_pass[1][0][4] = 0
4932 09:57:30.284186 tx_last_pass[1][0][4] = 0
4933 09:57:30.287770 tx_win_center[1][0][5] = 0
4934 09:57:30.288290 tx_first_pass[1][0][5] = 0
4935 09:57:30.290769 tx_last_pass[1][0][5] = 0
4936 09:57:30.294769 tx_win_center[1][0][6] = 0
4937 09:57:30.297533 tx_first_pass[1][0][6] = 0
4938 09:57:30.297974 tx_last_pass[1][0][6] = 0
4939 09:57:30.300805 tx_win_center[1][0][7] = 0
4940 09:57:30.304336 tx_first_pass[1][0][7] = 0
4941 09:57:30.304760 tx_last_pass[1][0][7] = 0
4942 09:57:30.307535 tx_win_center[1][0][8] = 0
4943 09:57:30.310816 tx_first_pass[1][0][8] = 0
4944 09:57:30.314340 tx_last_pass[1][0][8] = 0
4945 09:57:30.314828 tx_win_center[1][0][9] = 0
4946 09:57:30.317830 tx_first_pass[1][0][9] = 0
4947 09:57:30.320872 tx_last_pass[1][0][9] = 0
4948 09:57:30.324005 tx_win_center[1][0][10] = 0
4949 09:57:30.324432 tx_first_pass[1][0][10] = 0
4950 09:57:30.327636 tx_last_pass[1][0][10] = 0
4951 09:57:30.330701 tx_win_center[1][0][11] = 0
4952 09:57:30.334040 tx_first_pass[1][0][11] = 0
4953 09:57:30.334556 tx_last_pass[1][0][11] = 0
4954 09:57:30.337614 tx_win_center[1][0][12] = 0
4955 09:57:30.341465 tx_first_pass[1][0][12] = 0
4956 09:57:30.344458 tx_last_pass[1][0][12] = 0
4957 09:57:30.344884 tx_win_center[1][0][13] = 0
4958 09:57:30.347703 tx_first_pass[1][0][13] = 0
4959 09:57:30.350914 tx_last_pass[1][0][13] = 0
4960 09:57:30.354299 tx_win_center[1][0][14] = 0
4961 09:57:30.354723 tx_first_pass[1][0][14] = 0
4962 09:57:30.357455 tx_last_pass[1][0][14] = 0
4963 09:57:30.360683 tx_win_center[1][0][15] = 0
4964 09:57:30.363948 tx_first_pass[1][0][15] = 0
4965 09:57:30.364371 tx_last_pass[1][0][15] = 0
4966 09:57:30.367248 tx_win_center[1][1][0] = 0
4967 09:57:30.370717 tx_first_pass[1][1][0] = 0
4968 09:57:30.371229 tx_last_pass[1][1][0] = 0
4969 09:57:30.373857 tx_win_center[1][1][1] = 0
4970 09:57:30.377742 tx_first_pass[1][1][1] = 0
4971 09:57:30.380878 tx_last_pass[1][1][1] = 0
4972 09:57:30.381399 tx_win_center[1][1][2] = 0
4973 09:57:30.384087 tx_first_pass[1][1][2] = 0
4974 09:57:30.387191 tx_last_pass[1][1][2] = 0
4975 09:57:30.390771 tx_win_center[1][1][3] = 0
4976 09:57:30.391290 tx_first_pass[1][1][3] = 0
4977 09:57:30.394204 tx_last_pass[1][1][3] = 0
4978 09:57:30.397707 tx_win_center[1][1][4] = 0
4979 09:57:30.400791 tx_first_pass[1][1][4] = 0
4980 09:57:30.401232 tx_last_pass[1][1][4] = 0
4981 09:57:30.404053 tx_win_center[1][1][5] = 0
4982 09:57:30.407227 tx_first_pass[1][1][5] = 0
4983 09:57:30.407782 tx_last_pass[1][1][5] = 0
4984 09:57:30.411027 tx_win_center[1][1][6] = 0
4985 09:57:30.414021 tx_first_pass[1][1][6] = 0
4986 09:57:30.417722 tx_last_pass[1][1][6] = 0
4987 09:57:30.418138 tx_win_center[1][1][7] = 0
4988 09:57:30.420619 tx_first_pass[1][1][7] = 0
4989 09:57:30.423976 tx_last_pass[1][1][7] = 0
4990 09:57:30.424492 tx_win_center[1][1][8] = 0
4991 09:57:30.427009 tx_first_pass[1][1][8] = 0
4992 09:57:30.430239 tx_last_pass[1][1][8] = 0
4993 09:57:30.433979 tx_win_center[1][1][9] = 0
4994 09:57:30.434419 tx_first_pass[1][1][9] = 0
4995 09:57:30.437251 tx_last_pass[1][1][9] = 0
4996 09:57:30.440701 tx_win_center[1][1][10] = 0
4997 09:57:30.443609 tx_first_pass[1][1][10] = 0
4998 09:57:30.444034 tx_last_pass[1][1][10] = 0
4999 09:57:30.446871 tx_win_center[1][1][11] = 0
5000 09:57:30.450569 tx_first_pass[1][1][11] = 0
5001 09:57:30.453643 tx_last_pass[1][1][11] = 0
5002 09:57:30.454151 tx_win_center[1][1][12] = 0
5003 09:57:30.456667 tx_first_pass[1][1][12] = 0
5004 09:57:30.460217 tx_last_pass[1][1][12] = 0
5005 09:57:30.463458 tx_win_center[1][1][13] = 0
5006 09:57:30.463877 tx_first_pass[1][1][13] = 0
5007 09:57:30.466570 tx_last_pass[1][1][13] = 0
5008 09:57:30.469943 tx_win_center[1][1][14] = 0
5009 09:57:30.473364 tx_first_pass[1][1][14] = 0
5010 09:57:30.473785 tx_last_pass[1][1][14] = 0
5011 09:57:30.476778 tx_win_center[1][1][15] = 0
5012 09:57:30.480309 tx_first_pass[1][1][15] = 0
5013 09:57:30.483650 tx_last_pass[1][1][15] = 0
5014 09:57:30.484163 dump params rx window
5015 09:57:30.486990 rx_firspass[0][0][0] = 0
5016 09:57:30.490239 rx_lastpass[0][0][0] = 0
5017 09:57:30.490761 rx_firspass[0][0][1] = 0
5018 09:57:30.493811 rx_lastpass[0][0][1] = 0
5019 09:57:30.496751 rx_firspass[0][0][2] = 0
5020 09:57:30.497168 rx_lastpass[0][0][2] = 0
5021 09:57:30.500062 rx_firspass[0][0][3] = 0
5022 09:57:30.503778 rx_lastpass[0][0][3] = 0
5023 09:57:30.504300 rx_firspass[0][0][4] = 0
5024 09:57:30.506885 rx_lastpass[0][0][4] = 0
5025 09:57:30.510334 rx_firspass[0][0][5] = 0
5026 09:57:30.513406 rx_lastpass[0][0][5] = 0
5027 09:57:30.513825 rx_firspass[0][0][6] = 0
5028 09:57:30.516655 rx_lastpass[0][0][6] = 0
5029 09:57:30.519930 rx_firspass[0][0][7] = 0
5030 09:57:30.520346 rx_lastpass[0][0][7] = 0
5031 09:57:30.523593 rx_firspass[0][0][8] = 0
5032 09:57:30.526898 rx_lastpass[0][0][8] = 0
5033 09:57:30.527454 rx_firspass[0][0][9] = 0
5034 09:57:30.530344 rx_lastpass[0][0][9] = 0
5035 09:57:30.533372 rx_firspass[0][0][10] = 0
5036 09:57:30.533790 rx_lastpass[0][0][10] = 0
5037 09:57:30.536775 rx_firspass[0][0][11] = 0
5038 09:57:30.540072 rx_lastpass[0][0][11] = 0
5039 09:57:30.543623 rx_firspass[0][0][12] = 0
5040 09:57:30.544136 rx_lastpass[0][0][12] = 0
5041 09:57:30.546576 rx_firspass[0][0][13] = 0
5042 09:57:30.550368 rx_lastpass[0][0][13] = 0
5043 09:57:30.550883 rx_firspass[0][0][14] = 0
5044 09:57:30.553603 rx_lastpass[0][0][14] = 0
5045 09:57:30.556907 rx_firspass[0][0][15] = 0
5046 09:57:30.560057 rx_lastpass[0][0][15] = 0
5047 09:57:30.560474 rx_firspass[0][1][0] = 0
5048 09:57:30.563424 rx_lastpass[0][1][0] = 0
5049 09:57:30.566853 rx_firspass[0][1][1] = 0
5050 09:57:30.567362 rx_lastpass[0][1][1] = 0
5051 09:57:30.569672 rx_firspass[0][1][2] = 0
5052 09:57:30.572926 rx_lastpass[0][1][2] = 0
5053 09:57:30.573395 rx_firspass[0][1][3] = 0
5054 09:57:30.576585 rx_lastpass[0][1][3] = 0
5055 09:57:30.579504 rx_firspass[0][1][4] = 0
5056 09:57:30.579937 rx_lastpass[0][1][4] = 0
5057 09:57:30.582863 rx_firspass[0][1][5] = 0
5058 09:57:30.586493 rx_lastpass[0][1][5] = 0
5059 09:57:30.589764 rx_firspass[0][1][6] = 0
5060 09:57:30.590282 rx_lastpass[0][1][6] = 0
5061 09:57:30.592949 rx_firspass[0][1][7] = 0
5062 09:57:30.596133 rx_lastpass[0][1][7] = 0
5063 09:57:30.596547 rx_firspass[0][1][8] = 0
5064 09:57:30.599546 rx_lastpass[0][1][8] = 0
5065 09:57:30.602658 rx_firspass[0][1][9] = 0
5066 09:57:30.603075 rx_lastpass[0][1][9] = 0
5067 09:57:30.606491 rx_firspass[0][1][10] = 0
5068 09:57:30.609909 rx_lastpass[0][1][10] = 0
5069 09:57:30.612638 rx_firspass[0][1][11] = 0
5070 09:57:30.613072 rx_lastpass[0][1][11] = 0
5071 09:57:30.616328 rx_firspass[0][1][12] = 0
5072 09:57:30.619960 rx_lastpass[0][1][12] = 0
5073 09:57:30.620473 rx_firspass[0][1][13] = 0
5074 09:57:30.622704 rx_lastpass[0][1][13] = 0
5075 09:57:30.626097 rx_firspass[0][1][14] = 0
5076 09:57:30.629185 rx_lastpass[0][1][14] = 0
5077 09:57:30.629601 rx_firspass[0][1][15] = 0
5078 09:57:30.632415 rx_lastpass[0][1][15] = 0
5079 09:57:30.636053 rx_firspass[1][0][0] = 0
5080 09:57:30.636571 rx_lastpass[1][0][0] = 0
5081 09:57:30.639529 rx_firspass[1][0][1] = 0
5082 09:57:30.642478 rx_lastpass[1][0][1] = 0
5083 09:57:30.643035 rx_firspass[1][0][2] = 0
5084 09:57:30.646310 rx_lastpass[1][0][2] = 0
5085 09:57:30.649558 rx_firspass[1][0][3] = 0
5086 09:57:30.652578 rx_lastpass[1][0][3] = 0
5087 09:57:30.653103 rx_firspass[1][0][4] = 0
5088 09:57:30.655815 rx_lastpass[1][0][4] = 0
5089 09:57:30.659112 rx_firspass[1][0][5] = 0
5090 09:57:30.659671 rx_lastpass[1][0][5] = 0
5091 09:57:30.662373 rx_firspass[1][0][6] = 0
5092 09:57:30.665495 rx_lastpass[1][0][6] = 0
5093 09:57:30.665917 rx_firspass[1][0][7] = 0
5094 09:57:30.669224 rx_lastpass[1][0][7] = 0
5095 09:57:30.672318 rx_firspass[1][0][8] = 0
5096 09:57:30.672735 rx_lastpass[1][0][8] = 0
5097 09:57:30.675690 rx_firspass[1][0][9] = 0
5098 09:57:30.678671 rx_lastpass[1][0][9] = 0
5099 09:57:30.682368 rx_firspass[1][0][10] = 0
5100 09:57:30.682889 rx_lastpass[1][0][10] = 0
5101 09:57:30.685606 rx_firspass[1][0][11] = 0
5102 09:57:30.688699 rx_lastpass[1][0][11] = 0
5103 09:57:30.689212 rx_firspass[1][0][12] = 0
5104 09:57:30.691886 rx_lastpass[1][0][12] = 0
5105 09:57:30.695356 rx_firspass[1][0][13] = 0
5106 09:57:30.698408 rx_lastpass[1][0][13] = 0
5107 09:57:30.698824 rx_firspass[1][0][14] = 0
5108 09:57:30.702270 rx_lastpass[1][0][14] = 0
5109 09:57:30.705889 rx_firspass[1][0][15] = 0
5110 09:57:30.706414 rx_lastpass[1][0][15] = 0
5111 09:57:30.709240 rx_firspass[1][1][0] = 0
5112 09:57:30.712235 rx_lastpass[1][1][0] = 0
5113 09:57:30.712659 rx_firspass[1][1][1] = 0
5114 09:57:30.715582 rx_lastpass[1][1][1] = 0
5115 09:57:30.719182 rx_firspass[1][1][2] = 0
5116 09:57:30.722259 rx_lastpass[1][1][2] = 0
5117 09:57:30.723000 rx_firspass[1][1][3] = 0
5118 09:57:30.725407 rx_lastpass[1][1][3] = 0
5119 09:57:30.728750 rx_firspass[1][1][4] = 0
5120 09:57:30.729306 rx_lastpass[1][1][4] = 0
5121 09:57:30.731956 rx_firspass[1][1][5] = 0
5122 09:57:30.735206 rx_lastpass[1][1][5] = 0
5123 09:57:30.735810 rx_firspass[1][1][6] = 0
5124 09:57:30.738887 rx_lastpass[1][1][6] = 0
5125 09:57:30.742009 rx_firspass[1][1][7] = 0
5126 09:57:30.742474 rx_lastpass[1][1][7] = 0
5127 09:57:30.745228 rx_firspass[1][1][8] = 0
5128 09:57:30.748543 rx_lastpass[1][1][8] = 0
5129 09:57:30.752135 rx_firspass[1][1][9] = 0
5130 09:57:30.752694 rx_lastpass[1][1][9] = 0
5131 09:57:30.755070 rx_firspass[1][1][10] = 0
5132 09:57:30.758211 rx_lastpass[1][1][10] = 0
5133 09:57:30.758673 rx_firspass[1][1][11] = 0
5134 09:57:30.761793 rx_lastpass[1][1][11] = 0
5135 09:57:30.765102 rx_firspass[1][1][12] = 0
5136 09:57:30.768395 rx_lastpass[1][1][12] = 0
5137 09:57:30.768956 rx_firspass[1][1][13] = 0
5138 09:57:30.772016 rx_lastpass[1][1][13] = 0
5139 09:57:30.775218 rx_firspass[1][1][14] = 0
5140 09:57:30.775815 rx_lastpass[1][1][14] = 0
5141 09:57:30.778687 rx_firspass[1][1][15] = 0
5142 09:57:30.781756 rx_lastpass[1][1][15] = 0
5143 09:57:30.782274 dump params clk_delay
5144 09:57:30.785073 clk_delay[0] = 0
5145 09:57:30.785586 clk_delay[1] = 0
5146 09:57:30.788324 dump params dqs_delay
5147 09:57:30.788840 dqs_delay[0][0] = 0
5148 09:57:30.791583 dqs_delay[0][1] = 0
5149 09:57:30.794837 dqs_delay[1][0] = 0
5150 09:57:30.795257 dqs_delay[1][1] = 0
5151 09:57:30.798196 dump params delay_cell_unit = 735
5152 09:57:30.801196 mt_set_emi_preloader end
5153 09:57:30.805042 [mt_mem_init] dram size: 0x100000000, rank number: 2
5154 09:57:30.811142 [complex_mem_test] start addr:0x40000000, len:20480
5155 09:57:30.846888 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5156 09:57:30.853406 [complex_mem_test] start addr:0x80000000, len:20480
5157 09:57:30.889387 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5158 09:57:30.895072 [complex_mem_test] start addr:0xc0000000, len:20480
5159 09:57:30.931441 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5160 09:57:30.937493 [complex_mem_test] start addr:0x56000000, len:8192
5161 09:57:30.954764 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5162 09:57:30.955322 ddr_geometry:1
5163 09:57:30.961018 [complex_mem_test] start addr:0x80000000, len:8192
5164 09:57:30.978196 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5165 09:57:30.981476 dram_init: dram init end (result: 0)
5166 09:57:30.988414 Successfully loaded DRAM blobs and ran DRAM calibration
5167 09:57:30.998119 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5168 09:57:30.998683 CBMEM:
5169 09:57:31.001414 IMD: root @ 00000000fffff000 254 entries.
5170 09:57:31.004586 IMD: root @ 00000000ffffec00 62 entries.
5171 09:57:31.011794 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5172 09:57:31.017985 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5173 09:57:31.021166 in-header: 03 a1 00 00 08 00 00 00
5174 09:57:31.025132 in-data: 84 60 60 10 00 00 00 00
5175 09:57:31.027981 Chrome EC: clear events_b mask to 0x0000000020004000
5176 09:57:31.035319 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5177 09:57:31.038756 in-header: 03 fd 00 00 00 00 00 00
5178 09:57:31.039324 in-data:
5179 09:57:31.045700 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5180 09:57:31.046331 CBFS @ 21000 size 3d4000
5181 09:57:31.052229 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5182 09:57:31.055713 CBFS: Locating 'fallback/ramstage'
5183 09:57:31.059040 CBFS: Found @ offset 10d40 size d563
5184 09:57:31.080149 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5185 09:57:31.092130 Accumulated console time in romstage 13615 ms
5186 09:57:31.092732
5187 09:57:31.093154
5188 09:57:31.102361 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5189 09:57:31.105473 ARM64: Exception handlers installed.
5190 09:57:31.105935 ARM64: Testing exception
5191 09:57:31.108524 ARM64: Done test exception
5192 09:57:31.112093 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5193 09:57:31.115457 Manufacturer: ef
5194 09:57:31.118559 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5195 09:57:31.125395 WARNING: RO_VPD is uninitialized or empty.
5196 09:57:31.128951 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5197 09:57:31.131576 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5198 09:57:31.142329 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5199 09:57:31.145399 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5200 09:57:31.151528 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5201 09:57:31.151992 Enumerating buses...
5202 09:57:31.158527 Show all devs... Before device enumeration.
5203 09:57:31.159085 Root Device: enabled 1
5204 09:57:31.161904 CPU_CLUSTER: 0: enabled 1
5205 09:57:31.162456 CPU: 00: enabled 1
5206 09:57:31.164816 Compare with tree...
5207 09:57:31.168216 Root Device: enabled 1
5208 09:57:31.168674 CPU_CLUSTER: 0: enabled 1
5209 09:57:31.171576 CPU: 00: enabled 1
5210 09:57:31.175151 Root Device scanning...
5211 09:57:31.175727 root_dev_scan_bus for Root Device
5212 09:57:31.178459 CPU_CLUSTER: 0 enabled
5213 09:57:31.181811 root_dev_scan_bus for Root Device done
5214 09:57:31.188372 scan_bus: scanning of bus Root Device took 10689 usecs
5215 09:57:31.188887 done
5216 09:57:31.191628 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5217 09:57:31.194722 Allocating resources...
5218 09:57:31.195107 Reading resources...
5219 09:57:31.198115 Root Device read_resources bus 0 link: 0
5220 09:57:31.204606 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5221 09:57:31.205094 CPU: 00 missing read_resources
5222 09:57:31.211674 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5223 09:57:31.214875 Root Device read_resources bus 0 link: 0 done
5224 09:57:31.218240 Done reading resources.
5225 09:57:31.221812 Show resources in subtree (Root Device)...After reading.
5226 09:57:31.224807 Root Device child on link 0 CPU_CLUSTER: 0
5227 09:57:31.228253 CPU_CLUSTER: 0 child on link 0 CPU: 00
5228 09:57:31.238158 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5229 09:57:31.238715 CPU: 00
5230 09:57:31.241390 Setting resources...
5231 09:57:31.244621 Root Device assign_resources, bus 0 link: 0
5232 09:57:31.247715 CPU_CLUSTER: 0 missing set_resources
5233 09:57:31.250973 Root Device assign_resources, bus 0 link: 0
5234 09:57:31.254664 Done setting resources.
5235 09:57:31.261253 Show resources in subtree (Root Device)...After assigning values.
5236 09:57:31.264232 Root Device child on link 0 CPU_CLUSTER: 0
5237 09:57:31.268003 CPU_CLUSTER: 0 child on link 0 CPU: 00
5238 09:57:31.278026 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5239 09:57:31.278456 CPU: 00
5240 09:57:31.281364 Done allocating resources.
5241 09:57:31.284774 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5242 09:57:31.287520 Enabling resources...
5243 09:57:31.287952 done.
5244 09:57:31.291253 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5245 09:57:31.294722 Initializing devices...
5246 09:57:31.295282 Root Device init ...
5247 09:57:31.297873 mainboard_init: Starting display init.
5248 09:57:31.301045 ADC[4]: Raw value=75746 ID=0
5249 09:57:31.324633 anx7625_power_on_init: Init interface.
5250 09:57:31.327967 anx7625_disable_pd_protocol: Disabled PD feature.
5251 09:57:31.334284 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5252 09:57:31.381409 anx7625_start_dp_work: Secure OCM version=00
5253 09:57:31.384224 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5254 09:57:31.401968 sp_tx_get_edid_block: EDID Block = 1
5255 09:57:31.519245 Extracted contents:
5256 09:57:31.521934 header: 00 ff ff ff ff ff ff 00
5257 09:57:31.525798 serial number: 06 af 5c 14 00 00 00 00 00 1a
5258 09:57:31.528993 version: 01 04
5259 09:57:31.532216 basic params: 95 1a 0e 78 02
5260 09:57:31.535609 chroma info: 99 85 95 55 56 92 28 22 50 54
5261 09:57:31.538409 established: 00 00 00
5262 09:57:31.545012 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5263 09:57:31.548727 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5264 09:57:31.555349 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5265 09:57:31.562205 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5266 09:57:31.568548 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5267 09:57:31.571713 extensions: 00
5268 09:57:31.572172 checksum: ae
5269 09:57:31.572534
5270 09:57:31.575253 Manufacturer: AUO Model 145c Serial Number 0
5271 09:57:31.578947 Made week 0 of 2016
5272 09:57:31.579549 EDID version: 1.4
5273 09:57:31.581937 Digital display
5274 09:57:31.585329 6 bits per primary color channel
5275 09:57:31.585941 DisplayPort interface
5276 09:57:31.588610 Maximum image size: 26 cm x 14 cm
5277 09:57:31.591840 Gamma: 220%
5278 09:57:31.592419 Check DPMS levels
5279 09:57:31.595233 Supported color formats: RGB 4:4:4
5280 09:57:31.598224 First detailed timing is preferred timing
5281 09:57:31.602054 Established timings supported:
5282 09:57:31.605034 Standard timings supported:
5283 09:57:31.605456 Detailed timings
5284 09:57:31.611548 Hex of detail: ce1d56ea50001a3030204600009010000018
5285 09:57:31.614946 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5286 09:57:31.618610 0556 0586 05a6 0640 hborder 0
5287 09:57:31.621783 0300 0304 030a 031a vborder 0
5288 09:57:31.624965 -hsync -vsync
5289 09:57:31.628212 Did detailed timing
5290 09:57:31.631265 Hex of detail: 0000000f0000000000000000000000000020
5291 09:57:31.634748 Manufacturer-specified data, tag 15
5292 09:57:31.641778 Hex of detail: 000000fe0041554f0a202020202020202020
5293 09:57:31.642209 ASCII string: AUO
5294 09:57:31.645015 Hex of detail: 000000fe004231313658414230312e34200a
5295 09:57:31.647916 ASCII string: B116XAB01.4
5296 09:57:31.648466 Checksum
5297 09:57:31.651774 Checksum: 0xae (valid)
5298 09:57:31.658275 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5299 09:57:31.658807 DSI data_rate: 457800000 bps
5300 09:57:31.665849 anx7625_parse_edid: set default k value to 0x3d for panel
5301 09:57:31.669037 anx7625_parse_edid: pixelclock(76300).
5302 09:57:31.672531 hactive(1366), hsync(32), hfp(48), hbp(154)
5303 09:57:31.675941 vactive(768), vsync(6), vfp(4), vbp(16)
5304 09:57:31.679146 anx7625_dsi_config: config dsi.
5305 09:57:31.686866 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5306 09:57:31.707722 anx7625_dsi_config: success to config DSI
5307 09:57:31.711136 anx7625_dp_start: MIPI phy setup OK.
5308 09:57:31.714695 [SSUSB] Setting up USB HOST controller...
5309 09:57:31.718091 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5310 09:57:31.721312 [SSUSB] phy power-on done.
5311 09:57:31.725127 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5312 09:57:31.728214 in-header: 03 fc 01 00 00 00 00 00
5313 09:57:31.728630 in-data:
5314 09:57:31.735186 handle_proto3_response: EC response with error code: 1
5315 09:57:31.735766 SPM: pcm index = 1
5316 09:57:31.738294 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5317 09:57:31.741837 CBFS @ 21000 size 3d4000
5318 09:57:31.748514 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5319 09:57:31.751503 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5320 09:57:31.755518 CBFS: Found @ offset 1e7c0 size 1026
5321 09:57:31.761988 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5322 09:57:31.765293 SPM: binary array size = 2988
5323 09:57:31.768361 SPM: version = pcm_allinone_v1.17.2_20180829
5324 09:57:31.771432 SPM binary loaded in 32 msecs
5325 09:57:31.779164 spm_kick_im_to_fetch: ptr = 000000004021eec2
5326 09:57:31.782800 spm_kick_im_to_fetch: len = 2988
5327 09:57:31.783350 SPM: spm_kick_pcm_to_run
5328 09:57:31.785835 SPM: spm_kick_pcm_to_run done
5329 09:57:31.789315 SPM: spm_init done in 52 msecs
5330 09:57:31.792331 Root Device init finished in 494984 usecs
5331 09:57:31.795905 CPU_CLUSTER: 0 init ...
5332 09:57:31.806382 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5333 09:57:31.809614 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5334 09:57:31.812220 CBFS @ 21000 size 3d4000
5335 09:57:31.816019 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5336 09:57:31.819471 CBFS: Locating 'sspm.bin'
5337 09:57:31.822697 CBFS: Found @ offset 208c0 size 41cb
5338 09:57:31.832356 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5339 09:57:31.840248 CPU_CLUSTER: 0 init finished in 42800 usecs
5340 09:57:31.840694 Devices initialized
5341 09:57:31.843476 Show all devs... After init.
5342 09:57:31.846974 Root Device: enabled 1
5343 09:57:31.847532 CPU_CLUSTER: 0: enabled 1
5344 09:57:31.849935 CPU: 00: enabled 1
5345 09:57:31.854050 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5346 09:57:31.857158 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5347 09:57:31.860329 ELOG: NV offset 0x558000 size 0x1000
5348 09:57:31.868219 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5349 09:57:31.874524 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5350 09:57:31.877804 ELOG: Event(17) added with size 13 at 2024-06-18 09:56:34 UTC
5351 09:57:31.884382 out: cmd=0x121: 03 db 21 01 00 00 00 00
5352 09:57:31.887588 in-header: 03 07 00 00 2c 00 00 00
5353 09:57:31.897365 in-data: 6f 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 35 04 01 00 06 80 00 00 7e 00 02 00 06 80 00 00 b4 44 01 00 06 80 00 00 f5 3c 02 00
5354 09:57:31.900989 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5355 09:57:31.904595 in-header: 03 19 00 00 08 00 00 00
5356 09:57:31.907914 in-data: a2 e0 47 00 13 00 00 00
5357 09:57:31.911093 Chrome EC: UHEPI supported
5358 09:57:31.917735 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5359 09:57:31.921338 in-header: 03 e1 00 00 08 00 00 00
5360 09:57:31.924465 in-data: 84 20 60 10 00 00 00 00
5361 09:57:31.927808 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5362 09:57:31.934594 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5363 09:57:31.937818 in-header: 03 e1 00 00 08 00 00 00
5364 09:57:31.941007 in-data: 84 20 60 10 00 00 00 00
5365 09:57:31.948005 ELOG: Event(A1) added with size 10 at 2024-06-18 09:56:34 UTC
5366 09:57:31.954321 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5367 09:57:31.958036 ELOG: Event(A0) added with size 9 at 2024-06-18 09:56:34 UTC
5368 09:57:31.964488 elog_add_boot_reason: Logged dev mode boot
5369 09:57:31.965049 Finalize devices...
5370 09:57:31.967998 Devices finalized
5371 09:57:31.970733 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5372 09:57:31.974212 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5373 09:57:31.980887 ELOG: Event(91) added with size 10 at 2024-06-18 09:56:34 UTC
5374 09:57:31.984268 Writing coreboot table at 0xffeda000
5375 09:57:31.987147 0. 0000000000114000-000000000011efff: RAMSTAGE
5376 09:57:31.994379 1. 0000000040000000-000000004023cfff: RAMSTAGE
5377 09:57:31.997866 2. 000000004023d000-00000000545fffff: RAM
5378 09:57:32.000476 3. 0000000054600000-000000005465ffff: BL31
5379 09:57:32.004148 4. 0000000054660000-00000000ffed9fff: RAM
5380 09:57:32.010759 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5381 09:57:32.014544 6. 0000000100000000-000000013fffffff: RAM
5382 09:57:32.017579 Passing 5 GPIOs to payload:
5383 09:57:32.021215 NAME | PORT | POLARITY | VALUE
5384 09:57:32.024169 write protect | 0x00000096 | low | low
5385 09:57:32.031172 EC in RW | 0x000000b1 | high | undefined
5386 09:57:32.034230 EC interrupt | 0x00000097 | low | undefined
5387 09:57:32.041234 TPM interrupt | 0x00000099 | high | undefined
5388 09:57:32.044260 speaker enable | 0x000000af | high | undefined
5389 09:57:32.047734 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5390 09:57:32.050641 in-header: 03 f7 00 00 02 00 00 00
5391 09:57:32.051147 in-data: 04 00
5392 09:57:32.054391 Board ID: 4
5393 09:57:32.057479 ADC[3]: Raw value=215504 ID=1
5394 09:57:32.057990 RAM code: 1
5395 09:57:32.058321 SKU ID: 16
5396 09:57:32.064069 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5397 09:57:32.064590 CBFS @ 21000 size 3d4000
5398 09:57:32.070605 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5399 09:57:32.077339 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 77ff
5400 09:57:32.077851 coreboot table: 940 bytes.
5401 09:57:32.083612 IMD ROOT 0. 00000000fffff000 00001000
5402 09:57:32.087227 IMD SMALL 1. 00000000ffffe000 00001000
5403 09:57:32.090656 CONSOLE 2. 00000000fffde000 00020000
5404 09:57:32.093827 FMAP 3. 00000000fffdd000 0000047c
5405 09:57:32.097448 TIME STAMP 4. 00000000fffdc000 00000910
5406 09:57:32.100375 RAMOOPS 5. 00000000ffedc000 00100000
5407 09:57:32.103935 COREBOOT 6. 00000000ffeda000 00002000
5408 09:57:32.106914 IMD small region:
5409 09:57:32.109965 IMD ROOT 0. 00000000ffffec00 00000400
5410 09:57:32.114042 VBOOT WORK 1. 00000000ffffeb00 00000100
5411 09:57:32.117094 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5412 09:57:32.120649 VPD 3. 00000000ffffea60 0000006c
5413 09:57:32.127367 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5414 09:57:32.134266 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5415 09:57:32.137230 in-header: 03 e1 00 00 08 00 00 00
5416 09:57:32.140232 in-data: 84 20 60 10 00 00 00 00
5417 09:57:32.143553 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5418 09:57:32.146960 CBFS @ 21000 size 3d4000
5419 09:57:32.150101 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5420 09:57:32.153396 CBFS: Locating 'fallback/payload'
5421 09:57:32.162161 CBFS: Found @ offset dc040 size 439a0
5422 09:57:32.250043 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5423 09:57:32.253056 Checking segment from ROM address 0x0000000040003a00
5424 09:57:32.259491 Checking segment from ROM address 0x0000000040003a1c
5425 09:57:32.262919 Loading segment from ROM address 0x0000000040003a00
5426 09:57:32.266203 code (compression=0)
5427 09:57:32.276591 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5428 09:57:32.282890 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5429 09:57:32.286062 it's not compressed!
5430 09:57:32.289512 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5431 09:57:32.296304 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5432 09:57:32.304154 Loading segment from ROM address 0x0000000040003a1c
5433 09:57:32.307483 Entry Point 0x0000000080000000
5434 09:57:32.307902 Loaded segments
5435 09:57:32.314018 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5436 09:57:32.317322 Jumping to boot code at 0000000080000000(00000000ffeda000)
5437 09:57:32.327167 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5438 09:57:32.330388 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5439 09:57:32.333758 CBFS @ 21000 size 3d4000
5440 09:57:32.340322 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5441 09:57:32.343137 CBFS: Locating 'fallback/bl31'
5442 09:57:32.346870 CBFS: Found @ offset 36dc0 size 5820
5443 09:57:32.357868 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5444 09:57:32.361334 Checking segment from ROM address 0x0000000040003a00
5445 09:57:32.367521 Checking segment from ROM address 0x0000000040003a1c
5446 09:57:32.370945 Loading segment from ROM address 0x0000000040003a00
5447 09:57:32.374482 code (compression=1)
5448 09:57:32.381425 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5449 09:57:32.391093 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5450 09:57:32.391564 using LZMA
5451 09:57:32.399948 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5452 09:57:32.406657 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5453 09:57:32.410006 Loading segment from ROM address 0x0000000040003a1c
5454 09:57:32.413594 Entry Point 0x0000000054601000
5455 09:57:32.414190 Loaded segments
5456 09:57:32.416465 NOTICE: MT8183 bl31_setup
5457 09:57:32.423829 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5458 09:57:32.427286 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5459 09:57:32.430613 INFO: [DEVAPC] dump DEVAPC registers:
5460 09:57:32.440084 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5461 09:57:32.446865 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5462 09:57:32.456931 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5463 09:57:32.463526 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5464 09:57:32.473278 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5465 09:57:32.479314 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5466 09:57:32.489940 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5467 09:57:32.496450 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5468 09:57:32.506352 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5469 09:57:32.512929 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5470 09:57:32.522884 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5471 09:57:32.529881 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5472 09:57:32.535983 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5473 09:57:32.546382 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5474 09:57:32.552873 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5475 09:57:32.559576 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5476 09:57:32.565836 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5477 09:57:32.572691 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5478 09:57:32.582847 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5479 09:57:32.589607 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5480 09:57:32.595534 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5481 09:57:32.602533 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5482 09:57:32.605682 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5483 09:57:32.609086 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5484 09:57:32.612187 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5485 09:57:32.615771 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5486 09:57:32.619146 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5487 09:57:32.625619 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5488 09:57:32.632368 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5489 09:57:32.632929 WARNING: region 0:
5490 09:57:32.635489 WARNING: apc:0x168, sa:0x0, ea:0xfff
5491 09:57:32.639094 WARNING: region 1:
5492 09:57:32.642595 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5493 09:57:32.643150 WARNING: region 2:
5494 09:57:32.648570 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5495 09:57:32.649112 WARNING: region 3:
5496 09:57:32.652142 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5497 09:57:32.656028 WARNING: region 4:
5498 09:57:32.659117 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5499 09:57:32.659713 WARNING: region 5:
5500 09:57:32.662377 WARNING: apc:0x0, sa:0x0, ea:0x0
5501 09:57:32.665829 WARNING: region 6:
5502 09:57:32.669061 WARNING: apc:0x0, sa:0x0, ea:0x0
5503 09:57:32.669629 WARNING: region 7:
5504 09:57:32.672028 WARNING: apc:0x0, sa:0x0, ea:0x0
5505 09:57:32.678709 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5506 09:57:32.682020 INFO: SPM: enable SPMC mode
5507 09:57:32.685425 NOTICE: spm_boot_init() start
5508 09:57:32.688575 NOTICE: spm_boot_init() end
5509 09:57:32.692400 INFO: BL31: Initializing runtime services
5510 09:57:32.698735 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5511 09:57:32.702101 INFO: BL31: Preparing for EL3 exit to normal world
5512 09:57:32.705468 INFO: Entry point address = 0x80000000
5513 09:57:32.708650 INFO: SPSR = 0x8
5514 09:57:32.730183
5515 09:57:32.730734
5516 09:57:32.731096
5517 09:57:32.732965 Starting depthcharge on Juniper...
5518 09:57:32.733422
5519 09:57:32.735143 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5520 09:57:32.735714 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5521 09:57:32.736173 Setting prompt string to ['jacuzzi:']
5522 09:57:32.736825 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5523 09:57:32.737597 vboot_handoff: creating legacy vboot_handoff structure
5524 09:57:32.737990
5525 09:57:32.739887 ec_init(0): CrosEC protocol v3 supported (544, 544)
5526 09:57:32.743473
5527 09:57:32.743987 Wipe memory regions:
5528 09:57:32.744318
5529 09:57:32.746521 [0x00000040000000, 0x00000054600000)
5530 09:57:32.789823
5531 09:57:32.790381 [0x00000054660000, 0x00000080000000)
5532 09:57:32.880917
5533 09:57:32.881471 [0x000000811994a0, 0x000000ffeda000)
5534 09:57:33.141205
5535 09:57:33.141759 [0x00000100000000, 0x00000140000000)
5536 09:57:33.274503
5537 09:57:33.277151 Initializing XHCI USB controller at 0x11200000.
5538 09:57:33.300534
5539 09:57:33.303581 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5540 09:57:33.304178
5541 09:57:33.304550
5542 09:57:33.305352 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5544 09:57:33.406564 jacuzzi: tftpboot 192.168.201.1 14407621/tftp-deploy-ah9_vzaf/kernel/image.itb 14407621/tftp-deploy-ah9_vzaf/kernel/cmdline
5545 09:57:33.407365 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5546 09:57:33.407895 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5547 09:57:33.411976 tftpboot 192.168.201.1 14407621/tftp-deploy-ah9_vzaf/kernel/image.ittp-deploy-ah9_vzaf/kernel/cmdline
5548 09:57:33.412423
5549 09:57:33.412752 Waiting for link
5550 09:57:33.814430
5551 09:57:33.814977 R8152: Initializing
5552 09:57:33.815343
5553 09:57:33.817565 Version 9 (ocp_data = 6010)
5554 09:57:33.818019
5555 09:57:33.820767 R8152: Done initializing
5556 09:57:33.821222
5557 09:57:33.821580 Adding net device
5558 09:57:34.206676
5559 09:57:34.207609 done.
5560 09:57:34.208021
5561 09:57:34.208365 MAC: 00:e0:4c:68:0b:b9
5562 09:57:34.208699
5563 09:57:34.209662 Sending DHCP discover... done.
5564 09:57:34.210118
5565 09:57:34.213382 Waiting for reply... done.
5566 09:57:34.213911
5567 09:57:34.216489 Sending DHCP request... done.
5568 09:57:34.216903
5569 09:57:34.217229 Waiting for reply... done.
5570 09:57:34.217536
5571 09:57:34.219916 My ip is 192.168.201.13
5572 09:57:34.220326
5573 09:57:34.222693 The DHCP server ip is 192.168.201.1
5574 09:57:34.223108
5575 09:57:34.226366 TFTP server IP predefined by user: 192.168.201.1
5576 09:57:34.226883
5577 09:57:34.232595 Bootfile predefined by user: 14407621/tftp-deploy-ah9_vzaf/kernel/image.itb
5578 09:57:34.233099
5579 09:57:34.235849 Sending tftp read request... done.
5580 09:57:34.236264
5581 09:57:34.244605 Waiting for the transfer...
5582 09:57:34.245024
5583 09:57:34.530080 00000000 ################################################################
5584 09:57:34.530238
5585 09:57:34.810889 00080000 ################################################################
5586 09:57:34.811038
5587 09:57:35.091129 00100000 ################################################################
5588 09:57:35.091308
5589 09:57:35.371557 00180000 ################################################################
5590 09:57:35.371706
5591 09:57:35.647159 00200000 ################################################################
5592 09:57:35.647313
5593 09:57:35.929332 00280000 ################################################################
5594 09:57:35.929508
5595 09:57:36.209480 00300000 ################################################################
5596 09:57:36.209658
5597 09:57:36.489106 00380000 ################################################################
5598 09:57:36.489284
5599 09:57:36.766817 00400000 ################################################################
5600 09:57:36.766978
5601 09:57:37.057897 00480000 ################################################################
5602 09:57:37.058053
5603 09:57:37.338136 00500000 ################################################################
5604 09:57:37.338284
5605 09:57:37.592282 00580000 ################################################################
5606 09:57:37.592522
5607 09:57:37.846701 00600000 ################################################################
5608 09:57:37.846859
5609 09:57:38.103666 00680000 ################################################################
5610 09:57:38.103840
5611 09:57:38.359191 00700000 ################################################################
5612 09:57:38.359339
5613 09:57:38.630024 00780000 ################################################################
5614 09:57:38.630174
5615 09:57:38.922836 00800000 ################################################################
5616 09:57:38.922985
5617 09:57:39.218738 00880000 ################################################################
5618 09:57:39.218897
5619 09:57:39.503136 00900000 ################################################################
5620 09:57:39.503292
5621 09:57:39.780553 00980000 ################################################################
5622 09:57:39.780716
5623 09:57:40.064412 00a00000 ################################################################
5624 09:57:40.064596
5625 09:57:40.347718 00a80000 ################################################################
5626 09:57:40.347864
5627 09:57:40.635098 00b00000 ################################################################
5628 09:57:40.635253
5629 09:57:40.900925 00b80000 ################################################################
5630 09:57:40.901081
5631 09:57:41.155569 00c00000 ################################################################
5632 09:57:41.155722
5633 09:57:41.410010 00c80000 ################################################################
5634 09:57:41.410160
5635 09:57:41.665335 00d00000 ################################################################
5636 09:57:41.665482
5637 09:57:41.919219 00d80000 ################################################################
5638 09:57:41.919381
5639 09:57:42.185655 00e00000 ################################################################
5640 09:57:42.185834
5641 09:57:42.468690 00e80000 ################################################################
5642 09:57:42.468863
5643 09:57:42.768819 00f00000 ################################################################
5644 09:57:42.768966
5645 09:57:43.049536 00f80000 ################################################################
5646 09:57:43.049693
5647 09:57:43.345891 01000000 ################################################################
5648 09:57:43.346044
5649 09:57:43.649302 01080000 ################################################################
5650 09:57:43.649465
5651 09:57:43.940707 01100000 ################################################################
5652 09:57:43.940868
5653 09:57:44.194681 01180000 ################################################################
5654 09:57:44.194838
5655 09:57:44.449522 01200000 ################################################################
5656 09:57:44.449667
5657 09:57:44.704678 01280000 ################################################################
5658 09:57:44.704834
5659 09:57:44.957833 01300000 ################################################################
5660 09:57:44.957989
5661 09:57:45.211324 01380000 ################################################################
5662 09:57:45.211498
5663 09:57:45.465889 01400000 ################################################################
5664 09:57:45.466041
5665 09:57:45.720714 01480000 ################################################################
5666 09:57:45.720860
5667 09:57:45.994367 01500000 ################################################################
5668 09:57:45.994550
5669 09:57:46.264062 01580000 ################################################################
5670 09:57:46.264217
5671 09:57:46.519007 01600000 ################################################################
5672 09:57:46.519156
5673 09:57:46.774030 01680000 ################################################################
5674 09:57:46.774177
5675 09:57:47.028965 01700000 ################################################################
5676 09:57:47.029112
5677 09:57:47.299018 01780000 ################################################################
5678 09:57:47.299174
5679 09:57:47.556199 01800000 ################################################################
5680 09:57:47.556353
5681 09:57:47.810767 01880000 ################################################################
5682 09:57:47.810913
5683 09:57:48.087779 01900000 ################################################################
5684 09:57:48.087927
5685 09:57:48.365100 01980000 ################################################################
5686 09:57:48.365261
5687 09:57:48.638788 01a00000 ################################################################
5688 09:57:48.638946
5689 09:57:48.904301 01a80000 ################################################################
5690 09:57:48.904476
5691 09:57:49.199710 01b00000 ################################################################
5692 09:57:49.199868
5693 09:57:49.455179 01b80000 ################################################################
5694 09:57:49.455367
5695 09:57:49.710049 01c00000 ################################################################
5696 09:57:49.710222
5697 09:57:49.964654 01c80000 ################################################################
5698 09:57:49.964830
5699 09:57:50.218668 01d00000 ################################################################
5700 09:57:50.218854
5701 09:57:50.479085 01d80000 ################################################################
5702 09:57:50.479249
5703 09:57:50.761551 01e00000 ################################################################
5704 09:57:50.761700
5705 09:57:51.053358 01e80000 ################################################################
5706 09:57:51.053512
5707 09:57:51.344772 01f00000 ################################################################
5708 09:57:51.344926
5709 09:57:51.627034 01f80000 ################################################################
5710 09:57:51.627183
5711 09:57:51.910267 02000000 ################################################################
5712 09:57:51.910422
5713 09:57:52.203761 02080000 ################################################################
5714 09:57:52.203919
5715 09:57:52.487966 02100000 ################################################################
5716 09:57:52.488126
5717 09:57:52.769522 02180000 ################################################################
5718 09:57:52.769674
5719 09:57:53.056767 02200000 ################################################################
5720 09:57:53.056917
5721 09:57:53.354496 02280000 ################################################################
5722 09:57:53.354773
5723 09:57:53.638902 02300000 ################################################################
5724 09:57:53.639056
5725 09:57:53.921290 02380000 ################################################################
5726 09:57:53.921439
5727 09:57:54.207839 02400000 ################################################################
5728 09:57:54.207988
5729 09:57:54.487789 02480000 ################################################################
5730 09:57:54.487947
5731 09:57:54.779634 02500000 ################################################################
5732 09:57:54.779799
5733 09:57:55.063458 02580000 ################################################################
5734 09:57:55.063608
5735 09:57:55.344145 02600000 ################################################################
5736 09:57:55.344297
5737 09:57:55.626159 02680000 ################################################################
5738 09:57:55.626318
5739 09:57:55.907325 02700000 ################################################################
5740 09:57:55.907503
5741 09:57:56.189307 02780000 ################################################################
5742 09:57:56.189459
5743 09:57:56.473462 02800000 ################################################################
5744 09:57:56.473615
5745 09:57:56.758999 02880000 ################################################################
5746 09:57:56.759155
5747 09:57:57.047585 02900000 ################################################################
5748 09:57:57.047741
5749 09:57:57.345749 02980000 ################################################################
5750 09:57:57.345900
5751 09:57:57.623821 02a00000 ################################################################
5752 09:57:57.623978
5753 09:57:57.904779 02a80000 ################################################################
5754 09:57:57.904938
5755 09:57:58.209918 02b00000 ################################################################
5756 09:57:58.210436
5757 09:57:58.552744 02b80000 ################################################################
5758 09:57:58.552901
5759 09:57:58.823642 02c00000 ################################################################
5760 09:57:58.823800
5761 09:57:59.099371 02c80000 ################################################################
5762 09:57:59.099535
5763 09:57:59.354058 02d00000 ################################################################
5764 09:57:59.354203
5765 09:57:59.610275 02d80000 ################################################################
5766 09:57:59.610435
5767 09:57:59.863417 02e00000 ################################################################
5768 09:57:59.863576
5769 09:58:00.150254 02e80000 ################################################################
5770 09:58:00.150434
5771 09:58:00.435157 02f00000 ################################################################
5772 09:58:00.435316
5773 09:58:00.702147 02f80000 ################################################################
5774 09:58:00.702301
5775 09:58:00.956456 03000000 ################################################################
5776 09:58:00.956614
5777 09:58:01.211449 03080000 ################################################################
5778 09:58:01.211598
5779 09:58:01.469851 03100000 ################################################################
5780 09:58:01.470006
5781 09:58:01.738414 03180000 ################################################################
5782 09:58:01.738600
5783 09:58:01.991581 03200000 ################################################################
5784 09:58:01.991741
5785 09:58:02.248638 03280000 ################################################################
5786 09:58:02.248789
5787 09:58:02.502778 03300000 ################################################################
5788 09:58:02.502931
5789 09:58:02.756311 03380000 ################################################################
5790 09:58:02.756463
5791 09:58:03.010045 03400000 ################################################################
5792 09:58:03.010208
5793 09:58:03.264409 03480000 ################################################################
5794 09:58:03.264559
5795 09:58:03.519255 03500000 ################################################################
5796 09:58:03.519416
5797 09:58:03.774736 03580000 ################################################################
5798 09:58:03.774880
5799 09:58:04.027774 03600000 ################################################################
5800 09:58:04.027939
5801 09:58:04.283059 03680000 ################################################################
5802 09:58:04.283203
5803 09:58:04.537866 03700000 ################################################################
5804 09:58:04.538014
5805 09:58:04.792721 03780000 ################################################################
5806 09:58:04.792869
5807 09:58:05.049809 03800000 ################################################################
5808 09:58:05.049963
5809 09:58:05.310771 03880000 ################################################################
5810 09:58:05.310917
5811 09:58:05.593444 03900000 ################################################################
5812 09:58:05.593598
5813 09:58:05.886487 03980000 ################################################################
5814 09:58:05.886642
5815 09:58:06.170283 03a00000 ################################################################
5816 09:58:06.170438
5817 09:58:06.424095 03a80000 ################################################################
5818 09:58:06.424245
5819 09:58:06.678914 03b00000 ################################################################
5820 09:58:06.679061
5821 09:58:06.932286 03b80000 ################################################################
5822 09:58:06.932434
5823 09:58:07.184675 03c00000 ################################################################
5824 09:58:07.184834
5825 09:58:07.439434 03c80000 ################################################################
5826 09:58:07.439584
5827 09:58:07.700100 03d00000 ################################################################
5828 09:58:07.700247
5829 09:58:07.988175 03d80000 ################################################################
5830 09:58:07.988332
5831 09:58:08.161806 03e00000 ######################################## done.
5832 09:58:08.161961
5833 09:58:08.164923 The bootfile was 65333274 bytes long.
5834 09:58:08.165017
5835 09:58:08.168289 Sending tftp read request... done.
5836 09:58:08.168390
5837 09:58:08.171681 Waiting for the transfer...
5838 09:58:08.171794
5839 09:58:08.171908 00000000 # done.
5840 09:58:08.172017
5841 09:58:08.181763 Command line loaded dynamically from TFTP file: 14407621/tftp-deploy-ah9_vzaf/kernel/cmdline
5842 09:58:08.181983
5843 09:58:08.198681 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5844 09:58:08.198983
5845 09:58:08.199206 Loading FIT.
5846 09:58:08.199477
5847 09:58:08.201576 Image ramdisk-1 has 52146804 bytes.
5848 09:58:08.201813
5849 09:58:08.204883 Image fdt-1 has 57695 bytes.
5850 09:58:08.205118
5851 09:58:08.208114 Image kernel-1 has 13126726 bytes.
5852 09:58:08.208404
5853 09:58:08.214917 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5854 09:58:08.218635
5855 09:58:08.228270 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5856 09:58:08.228821
5857 09:58:08.235162 Choosing best match conf-1 for compat google,juniper-sku16.
5858 09:58:08.235740
5859 09:58:08.243383 Connected to device vid:did:rid of 1ae0:0028:00
5860 09:58:08.250979
5861 09:58:08.254294 tpm_get_response: command 0x17b, return code 0x0
5862 09:58:08.254836
5863 09:58:08.257701 tpm_cleanup: add release locality here.
5864 09:58:08.258243
5865 09:58:08.260881 Shutting down all USB controllers.
5866 09:58:08.261320
5867 09:58:08.263995 Removing current net device
5868 09:58:08.264432
5869 09:58:08.267591 Exiting depthcharge with code 4 at timestamp: 52803317
5870 09:58:08.268131
5871 09:58:08.270712 LZMA decompressing kernel-1 to 0x80193568
5872 09:58:08.271130
5873 09:58:08.277581 LZMA decompressing kernel-1 to 0x40000000
5874 09:58:10.143104
5875 09:58:10.143753 jumping to kernel
5876 09:58:10.145862 end: 2.2.4 bootloader-commands (duration 00:00:37) [common]
5877 09:58:10.146392 start: 2.2.5 auto-login-action (timeout 00:03:48) [common]
5878 09:58:10.146805 Setting prompt string to ['Linux version [0-9]']
5879 09:58:10.147184 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5880 09:58:10.147631 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5881 09:58:10.218285
5882 09:58:10.221718 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5883 09:58:10.225575 start: 2.2.5.1 login-action (timeout 00:03:48) [common]
5884 09:58:10.226178 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5885 09:58:10.226590 Setting prompt string to []
5886 09:58:10.227016 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5887 09:58:10.227454 Using line separator: #'\n'#
5888 09:58:10.227828 No login prompt set.
5889 09:58:10.228181 Parsing kernel messages
5890 09:58:10.228493 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5891 09:58:10.229054 [login-action] Waiting for messages, (timeout 00:03:48)
5892 09:58:10.229443 Waiting using forced prompt support (timeout 00:01:54)
5893 09:58:10.244810 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024
5894 09:58:10.248158 [ 0.000000] random: crng init done
5895 09:58:10.254848 [ 0.000000] Machine model: Google juniper sku16 board
5896 09:58:10.258589 [ 0.000000] efi: UEFI not found.
5897 09:58:10.264757 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5898 09:58:10.271431 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5899 09:58:10.281204 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5900 09:58:10.284323 [ 0.000000] printk: bootconsole [mtk8250] enabled
5901 09:58:10.293269 [ 0.000000] NUMA: No NUMA configuration found
5902 09:58:10.299827 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5903 09:58:10.306481 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5904 09:58:10.307038 [ 0.000000] Zone ranges:
5905 09:58:10.313581 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5906 09:58:10.316203 [ 0.000000] DMA32 empty
5907 09:58:10.322850 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5908 09:58:10.326793 [ 0.000000] Movable zone start for each node
5909 09:58:10.329686 [ 0.000000] Early memory node ranges
5910 09:58:10.336219 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5911 09:58:10.342979 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5912 09:58:10.349292 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5913 09:58:10.356141 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5914 09:58:10.363219 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5915 09:58:10.369125 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5916 09:58:10.385421 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5917 09:58:10.392531 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5918 09:58:10.399195 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5919 09:58:10.402598 [ 0.000000] psci: probing for conduit method from DT.
5920 09:58:10.408964 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5921 09:58:10.412802 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5922 09:58:10.418694 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5923 09:58:10.422219 [ 0.000000] psci: SMC Calling Convention v1.1
5924 09:58:10.428874 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5925 09:58:10.431723 [ 0.000000] Detected VIPT I-cache on CPU0
5926 09:58:10.439072 [ 0.000000] CPU features: detected: GIC system register CPU interface
5927 09:58:10.445368 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5928 09:58:10.452172 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5929 09:58:10.458737 [ 0.000000] CPU features: detected: ARM erratum 845719
5930 09:58:10.462024 [ 0.000000] alternatives: applying boot alternatives
5931 09:58:10.465449 [ 0.000000] Fallback order for Node 0: 0
5932 09:58:10.472162 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5933 09:58:10.475105 [ 0.000000] Policy zone: Normal
5934 09:58:10.495309 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5935 09:58:10.508482 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5936 09:58:10.515214 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5937 09:58:10.524575 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5938 09:58:10.531816 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5939 09:58:10.535035 <6>[ 0.000000] software IO TLB: area num 8.
5940 09:58:10.560763 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5941 09:58:10.618469 <6>[ 0.000000] Memory: 3864152K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 294312K reserved, 32768K cma-reserved)
5942 09:58:10.624763 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5943 09:58:10.631499 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5944 09:58:10.634938 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5945 09:58:10.641343 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5946 09:58:10.647734 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5947 09:58:10.651569 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5948 09:58:10.661089 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5949 09:58:10.667816 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5950 09:58:10.674191 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5951 09:58:10.684325 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5952 09:58:10.687643 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5953 09:58:10.694666 <6>[ 0.000000] GICv3: 640 SPIs implemented
5954 09:58:10.697675 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5955 09:58:10.700932 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5956 09:58:10.707197 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5957 09:58:10.714403 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5958 09:58:10.723957 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5959 09:58:10.737249 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5960 09:58:10.743957 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5961 09:58:10.755582 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5962 09:58:10.768925 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5963 09:58:10.774998 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5964 09:58:10.781696 <6>[ 0.009479] Console: colour dummy device 80x25
5965 09:58:10.785048 <6>[ 0.014520] printk: console [tty1] enabled
5966 09:58:10.795040 <6>[ 0.018907] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5967 09:58:10.802294 <6>[ 0.029371] pid_max: default: 32768 minimum: 301
5968 09:58:10.805144 <6>[ 0.034252] LSM: Security Framework initializing
5969 09:58:10.815164 <6>[ 0.039169] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5970 09:58:10.822058 <6>[ 0.046791] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5971 09:58:10.828418 <4>[ 0.055667] cacheinfo: Unable to detect cache hierarchy for CPU 0
5972 09:58:10.838686 <6>[ 0.062297] cblist_init_generic: Setting adjustable number of callback queues.
5973 09:58:10.845252 <6>[ 0.069743] cblist_init_generic: Setting shift to 3 and lim to 1.
5974 09:58:10.851997 <6>[ 0.076095] cblist_init_generic: Setting adjustable number of callback queues.
5975 09:58:10.858526 <6>[ 0.083539] cblist_init_generic: Setting shift to 3 and lim to 1.
5976 09:58:10.862036 <6>[ 0.089939] rcu: Hierarchical SRCU implementation.
5977 09:58:10.868598 <6>[ 0.094964] rcu: Max phase no-delay instances is 1000.
5978 09:58:10.875266 <6>[ 0.102902] EFI services will not be available.
5979 09:58:10.878525 <6>[ 0.107851] smp: Bringing up secondary CPUs ...
5980 09:58:10.889460 <6>[ 0.113095] Detected VIPT I-cache on CPU1
5981 09:58:10.895549 <4>[ 0.113142] cacheinfo: Unable to detect cache hierarchy for CPU 1
5982 09:58:10.902478 <6>[ 0.113151] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5983 09:58:10.909630 <6>[ 0.113187] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5984 09:58:10.912159 <6>[ 0.113763] Detected VIPT I-cache on CPU2
5985 09:58:10.919508 <4>[ 0.113796] cacheinfo: Unable to detect cache hierarchy for CPU 2
5986 09:58:10.925706 <6>[ 0.113800] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5987 09:58:10.932516 <6>[ 0.113813] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5988 09:58:10.935907 <6>[ 0.114259] Detected VIPT I-cache on CPU3
5989 09:58:10.942870 <4>[ 0.114289] cacheinfo: Unable to detect cache hierarchy for CPU 3
5990 09:58:10.949499 <6>[ 0.114293] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5991 09:58:10.956004 <6>[ 0.114304] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5992 09:58:10.962575 <6>[ 0.114879] CPU features: detected: Spectre-v2
5993 09:58:10.965897 <6>[ 0.114889] CPU features: detected: Spectre-BHB
5994 09:58:10.972261 <6>[ 0.114894] CPU features: detected: ARM erratum 858921
5995 09:58:10.975730 <6>[ 0.114899] Detected VIPT I-cache on CPU4
5996 09:58:10.982314 <4>[ 0.114947] cacheinfo: Unable to detect cache hierarchy for CPU 4
5997 09:58:10.989081 <6>[ 0.114955] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5998 09:58:10.995932 <6>[ 0.114963] arch_timer: Enabling local workaround for ARM erratum 858921
5999 09:58:11.002370 <6>[ 0.114974] arch_timer: CPU4: Trapping CNTVCT access
6000 09:58:11.009327 <6>[ 0.114981] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6001 09:58:11.012148 <6>[ 0.115466] Detected VIPT I-cache on CPU5
6002 09:58:11.019173 <4>[ 0.115506] cacheinfo: Unable to detect cache hierarchy for CPU 5
6003 09:58:11.025528 <6>[ 0.115511] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6004 09:58:11.032214 <6>[ 0.115518] arch_timer: Enabling local workaround for ARM erratum 858921
6005 09:58:11.039321 <6>[ 0.115524] arch_timer: CPU5: Trapping CNTVCT access
6006 09:58:11.045222 <6>[ 0.115529] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6007 09:58:11.048778 <6>[ 0.115966] Detected VIPT I-cache on CPU6
6008 09:58:11.055815 <4>[ 0.116012] cacheinfo: Unable to detect cache hierarchy for CPU 6
6009 09:58:11.062033 <6>[ 0.116018] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6010 09:58:11.068819 <6>[ 0.116025] arch_timer: Enabling local workaround for ARM erratum 858921
6011 09:58:11.075502 <6>[ 0.116031] arch_timer: CPU6: Trapping CNTVCT access
6012 09:58:11.081889 <6>[ 0.116036] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6013 09:58:11.085041 <6>[ 0.116566] Detected VIPT I-cache on CPU7
6014 09:58:11.092116 <4>[ 0.116611] cacheinfo: Unable to detect cache hierarchy for CPU 7
6015 09:58:11.098642 <6>[ 0.116617] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6016 09:58:11.105471 <6>[ 0.116624] arch_timer: Enabling local workaround for ARM erratum 858921
6017 09:58:11.111877 <6>[ 0.116630] arch_timer: CPU7: Trapping CNTVCT access
6018 09:58:11.118854 <6>[ 0.116635] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6019 09:58:11.121931 <6>[ 0.116683] smp: Brought up 1 node, 8 CPUs
6020 09:58:11.128210 <6>[ 0.355549] SMP: Total of 8 processors activated.
6021 09:58:11.135356 <6>[ 0.360486] CPU features: detected: 32-bit EL0 Support
6022 09:58:11.138564 <6>[ 0.365857] CPU features: detected: 32-bit EL1 Support
6023 09:58:11.145037 <6>[ 0.371222] CPU features: detected: CRC32 instructions
6024 09:58:11.148815 <6>[ 0.376650] CPU: All CPU(s) started at EL2
6025 09:58:11.155559 <6>[ 0.380988] alternatives: applying system-wide alternatives
6026 09:58:11.158647 <6>[ 0.388992] devtmpfs: initialized
6027 09:58:11.174202 <6>[ 0.397914] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6028 09:58:11.183953 <6>[ 0.407863] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6029 09:58:11.187227 <6>[ 0.415591] pinctrl core: initialized pinctrl subsystem
6030 09:58:11.194975 <6>[ 0.422713] DMI not present or invalid.
6031 09:58:11.201676 <6>[ 0.427081] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6032 09:58:11.208674 <6>[ 0.433974] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6033 09:58:11.218711 <6>[ 0.441501] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6034 09:58:11.225072 <6>[ 0.449751] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6035 09:58:11.231590 <6>[ 0.457929] audit: initializing netlink subsys (disabled)
6036 09:58:11.237860 <5>[ 0.463631] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6037 09:58:11.244982 <6>[ 0.464604] thermal_sys: Registered thermal governor 'step_wise'
6038 09:58:11.251845 <6>[ 0.471597] thermal_sys: Registered thermal governor 'power_allocator'
6039 09:58:11.254631 <6>[ 0.477893] cpuidle: using governor menu
6040 09:58:11.261726 <6>[ 0.488854] NET: Registered PF_QIPCRTR protocol family
6041 09:58:11.268314 <6>[ 0.494336] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6042 09:58:11.274758 <6>[ 0.501432] ASID allocator initialised with 32768 entries
6043 09:58:11.281270 <6>[ 0.508205] Serial: AMBA PL011 UART driver
6044 09:58:11.291276 <4>[ 0.518618] Trying to register duplicate clock ID: 113
6045 09:58:11.351113 <6>[ 0.575015] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6046 09:58:11.365412 <6>[ 0.589381] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6047 09:58:11.368590 <6>[ 0.599134] KASLR enabled
6048 09:58:11.382634 <6>[ 0.607131] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6049 09:58:11.389628 <6>[ 0.614134] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6050 09:58:11.397111 <6>[ 0.620612] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6051 09:58:11.403187 <6>[ 0.627602] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6052 09:58:11.409280 <6>[ 0.634076] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6053 09:58:11.416096 <6>[ 0.641066] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6054 09:58:11.423020 <6>[ 0.647540] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6055 09:58:11.429639 <6>[ 0.654529] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6056 09:58:11.432655 <6>[ 0.662095] ACPI: Interpreter disabled.
6057 09:58:11.442892 <6>[ 0.670095] iommu: Default domain type: Translated
6058 09:58:11.449288 <6>[ 0.675201] iommu: DMA domain TLB invalidation policy: strict mode
6059 09:58:11.452677 <5>[ 0.681831] SCSI subsystem initialized
6060 09:58:11.459300 <6>[ 0.686247] usbcore: registered new interface driver usbfs
6061 09:58:11.466296 <6>[ 0.691975] usbcore: registered new interface driver hub
6062 09:58:11.469085 <6>[ 0.697518] usbcore: registered new device driver usb
6063 09:58:11.476246 <6>[ 0.703827] pps_core: LinuxPPS API ver. 1 registered
6064 09:58:11.486666 <6>[ 0.709011] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6065 09:58:11.490035 <6>[ 0.718335] PTP clock support registered
6066 09:58:11.493435 <6>[ 0.722589] EDAC MC: Ver: 3.0.0
6067 09:58:11.500860 <6>[ 0.728227] FPGA manager framework
6068 09:58:11.507669 <6>[ 0.731910] Advanced Linux Sound Architecture Driver Initialized.
6069 09:58:11.511224 <6>[ 0.738664] vgaarb: loaded
6070 09:58:11.514619 <6>[ 0.741781] clocksource: Switched to clocksource arch_sys_counter
6071 09:58:11.520907 <5>[ 0.748210] VFS: Disk quotas dquot_6.6.0
6072 09:58:11.527630 <6>[ 0.752386] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6073 09:58:11.531154 <6>[ 0.759560] pnp: PnP ACPI: disabled
6074 09:58:11.539077 <6>[ 0.766433] NET: Registered PF_INET protocol family
6075 09:58:11.545762 <6>[ 0.771657] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6076 09:58:11.558030 <6>[ 0.781553] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6077 09:58:11.567286 <6>[ 0.790306] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6078 09:58:11.574426 <6>[ 0.798256] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6079 09:58:11.580924 <6>[ 0.806490] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6080 09:58:11.587515 <6>[ 0.814584] TCP: Hash tables configured (established 32768 bind 32768)
6081 09:58:11.597679 <6>[ 0.821409] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6082 09:58:11.604354 <6>[ 0.828380] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6083 09:58:11.610575 <6>[ 0.835862] NET: Registered PF_UNIX/PF_LOCAL protocol family
6084 09:58:11.617206 <6>[ 0.841977] RPC: Registered named UNIX socket transport module.
6085 09:58:11.620500 <6>[ 0.848123] RPC: Registered udp transport module.
6086 09:58:11.627261 <6>[ 0.853048] RPC: Registered tcp transport module.
6087 09:58:11.633959 <6>[ 0.857971] RPC: Registered tcp NFSv4.1 backchannel transport module.
6088 09:58:11.637347 <6>[ 0.864624] PCI: CLS 0 bytes, default 64
6089 09:58:11.640427 <6>[ 0.868905] Unpacking initramfs...
6090 09:58:11.662194 <6>[ 0.885926] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6091 09:58:11.671800 <6>[ 0.894555] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6092 09:58:11.674696 <6>[ 0.903407] kvm [1]: IPA Size Limit: 40 bits
6093 09:58:11.682617 <6>[ 0.909730] kvm [1]: vgic-v2@c420000
6094 09:58:11.685648 <6>[ 0.913543] kvm [1]: GIC system register CPU interface enabled
6095 09:58:11.691969 <6>[ 0.919711] kvm [1]: vgic interrupt IRQ18
6096 09:58:11.695921 <6>[ 0.924072] kvm [1]: Hyp mode initialized successfully
6097 09:58:11.703258 <5>[ 0.930370] Initialise system trusted keyrings
6098 09:58:11.709778 <6>[ 0.935228] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6099 09:58:11.718052 <6>[ 0.945193] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6100 09:58:11.724655 <5>[ 0.951644] NFS: Registering the id_resolver key type
6101 09:58:11.727635 <5>[ 0.956955] Key type id_resolver registered
6102 09:58:11.734127 <5>[ 0.961367] Key type id_legacy registered
6103 09:58:11.741141 <6>[ 0.965675] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6104 09:58:11.747713 <6>[ 0.972596] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6105 09:58:11.754496 <6>[ 0.980346] 9p: Installing v9fs 9p2000 file system support
6106 09:58:11.781503 <5>[ 1.009010] Key type asymmetric registered
6107 09:58:11.784878 <5>[ 1.013355] Asymmetric key parser 'x509' registered
6108 09:58:11.795110 <6>[ 1.018512] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6109 09:58:11.798391 <6>[ 1.026134] io scheduler mq-deadline registered
6110 09:58:11.801622 <6>[ 1.030893] io scheduler kyber registered
6111 09:58:11.824386 <6>[ 1.051677] EINJ: ACPI disabled.
6112 09:58:11.830760 <4>[ 1.055452] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6113 09:58:11.868640 <6>[ 1.096162] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6114 09:58:11.877710 <6>[ 1.104645] printk: console [ttyS0] disabled
6115 09:58:11.905589 <6>[ 1.129303] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6116 09:58:11.912137 <6>[ 1.138781] printk: console [ttyS0] enabled
6117 09:58:11.915456 <6>[ 1.138781] printk: console [ttyS0] enabled
6118 09:58:11.922141 <6>[ 1.147698] printk: bootconsole [mtk8250] disabled
6119 09:58:11.925171 <6>[ 1.147698] printk: bootconsole [mtk8250] disabled
6120 09:58:11.935513 <3>[ 1.158232] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6121 09:58:11.941697 <3>[ 1.166614] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6122 09:58:11.971251 <6>[ 1.195024] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6123 09:58:11.977668 <6>[ 1.204686] serial serial0: tty port ttyS1 registered
6124 09:58:11.984470 <6>[ 1.211271] SuperH (H)SCI(F) driver initialized
6125 09:58:11.987883 <6>[ 1.216745] msm_serial: driver initialized
6126 09:58:12.003058 <6>[ 1.227091] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6127 09:58:12.012880 <6>[ 1.235702] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6128 09:58:12.019621 <6>[ 1.244280] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6129 09:58:12.029580 <6>[ 1.252852] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6130 09:58:12.036065 <6>[ 1.261508] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6131 09:58:12.046128 <6>[ 1.270167] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6132 09:58:12.055840 <6>[ 1.278906] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6133 09:58:12.063086 <6>[ 1.287646] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6134 09:58:12.072991 <6>[ 1.296211] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6135 09:58:12.083095 <6>[ 1.305014] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6136 09:58:12.090420 <4>[ 1.317440] cacheinfo: Unable to detect cache hierarchy for CPU 0
6137 09:58:12.099020 <6>[ 1.326817] loop: module loaded
6138 09:58:12.111144 <6>[ 1.338772] vsim1: Bringing 1800000uV into 2700000-2700000uV
6139 09:58:12.128796 <6>[ 1.356598] megasas: 07.719.03.00-rc1
6140 09:58:12.138189 <6>[ 1.365450] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6141 09:58:12.145668 <6>[ 1.373174] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6142 09:58:12.162414 <6>[ 1.389959] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6143 09:58:12.218842 <6>[ 1.439953] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6144 09:58:13.323947 <6>[ 2.551214] Freeing initrd memory: 50920K
6145 09:58:13.338917 <4>[ 2.563167] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6146 09:58:13.345663 <4>[ 2.572399] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6147 09:58:13.352087 <4>[ 2.579098] Hardware name: Google juniper sku16 board (DT)
6148 09:58:13.355461 <4>[ 2.584837] Call trace:
6149 09:58:13.358825 <4>[ 2.587537] dump_backtrace.part.0+0xe0/0xf0
6150 09:58:13.361876 <4>[ 2.592074] show_stack+0x18/0x30
6151 09:58:13.365558 <4>[ 2.595646] dump_stack_lvl+0x68/0x84
6152 09:58:13.372069 <4>[ 2.599567] dump_stack+0x18/0x34
6153 09:58:13.375634 <4>[ 2.603137] sysfs_warn_dup+0x64/0x80
6154 09:58:13.378886 <4>[ 2.607059] sysfs_do_create_link_sd+0xf0/0x100
6155 09:58:13.382280 <4>[ 2.611846] sysfs_create_link+0x20/0x40
6156 09:58:13.388757 <4>[ 2.616025] bus_add_device+0x68/0x10c
6157 09:58:13.391873 <4>[ 2.620031] device_add+0x340/0x7ac
6158 09:58:13.395543 <4>[ 2.623774] of_device_add+0x44/0x60
6159 09:58:13.402189 <4>[ 2.627608] of_platform_device_create_pdata+0x90/0x120
6160 09:58:13.405205 <4>[ 2.633090] of_platform_bus_create+0x170/0x370
6161 09:58:13.408739 <4>[ 2.637876] of_platform_populate+0x50/0xfc
6162 09:58:13.415239 <4>[ 2.642315] parse_mtd_partitions+0x1dc/0x510
6163 09:58:13.418274 <4>[ 2.646928] mtd_device_parse_register+0xf8/0x2e0
6164 09:58:13.421742 <4>[ 2.651886] spi_nor_probe+0x21c/0x2f0
6165 09:58:13.428509 <4>[ 2.655892] spi_mem_probe+0x6c/0xb0
6166 09:58:13.431642 <4>[ 2.659724] spi_probe+0x84/0xe4
6167 09:58:13.434856 <4>[ 2.663206] really_probe+0xbc/0x2e0
6168 09:58:13.438238 <4>[ 2.667037] __driver_probe_device+0x78/0x11c
6169 09:58:13.445321 <4>[ 2.671648] driver_probe_device+0xd8/0x160
6170 09:58:13.448208 <4>[ 2.676086] __device_attach_driver+0xb8/0x134
6171 09:58:13.452081 <4>[ 2.680785] bus_for_each_drv+0x78/0xd0
6172 09:58:13.455257 <4>[ 2.684875] __device_attach+0xa8/0x1c0
6173 09:58:13.461720 <4>[ 2.688965] device_initial_probe+0x14/0x20
6174 09:58:13.465516 <4>[ 2.693403] bus_probe_device+0x9c/0xa4
6175 09:58:13.468562 <4>[ 2.697493] device_add+0x3ac/0x7ac
6176 09:58:13.471856 <4>[ 2.701235] __spi_add_device+0x78/0x120
6177 09:58:13.478517 <4>[ 2.705413] spi_add_device+0x40/0x7c
6178 09:58:13.481412 <4>[ 2.709331] spi_register_controller+0x610/0xad0
6179 09:58:13.487932 <4>[ 2.714203] devm_spi_register_controller+0x4c/0xa4
6180 09:58:13.491355 <4>[ 2.719337] mtk_spi_probe+0x3f8/0x650
6181 09:58:13.494776 <4>[ 2.723341] platform_probe+0x68/0xe0
6182 09:58:13.498177 <4>[ 2.727259] really_probe+0xbc/0x2e0
6183 09:58:13.504901 <4>[ 2.731089] __driver_probe_device+0x78/0x11c
6184 09:58:13.508592 <4>[ 2.735700] driver_probe_device+0xd8/0x160
6185 09:58:13.511575 <4>[ 2.740138] __driver_attach+0x94/0x19c
6186 09:58:13.515023 <4>[ 2.744228] bus_for_each_dev+0x70/0xd0
6187 09:58:13.518205 <4>[ 2.748318] driver_attach+0x24/0x30
6188 09:58:13.524457 <4>[ 2.752148] bus_add_driver+0x154/0x20c
6189 09:58:13.528377 <4>[ 2.756238] driver_register+0x78/0x130
6190 09:58:13.531220 <4>[ 2.760329] __platform_driver_register+0x28/0x34
6191 09:58:13.538516 <4>[ 2.765288] mtk_spi_driver_init+0x1c/0x28
6192 09:58:13.541258 <4>[ 2.769641] do_one_initcall+0x50/0x1d0
6193 09:58:13.544687 <4>[ 2.773732] kernel_init_freeable+0x21c/0x288
6194 09:58:13.551591 <4>[ 2.778346] kernel_init+0x24/0x12c
6195 09:58:13.554428 <4>[ 2.782090] ret_from_fork+0x10/0x20
6196 09:58:13.564015 <6>[ 2.790972] tun: Universal TUN/TAP device driver, 1.6
6197 09:58:13.567220 <6>[ 2.797281] thunder_xcv, ver 1.0
6198 09:58:13.570245 <6>[ 2.800797] thunder_bgx, ver 1.0
6199 09:58:13.573780 <6>[ 2.804303] nicpf, ver 1.0
6200 09:58:13.584676 <6>[ 2.808682] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6201 09:58:13.587843 <6>[ 2.816167] hns3: Copyright (c) 2017 Huawei Corporation.
6202 09:58:13.594638 <6>[ 2.821764] hclge is initializing
6203 09:58:13.598201 <6>[ 2.825354] e1000: Intel(R) PRO/1000 Network Driver
6204 09:58:13.604919 <6>[ 2.830490] e1000: Copyright (c) 1999-2006 Intel Corporation.
6205 09:58:13.607598 <6>[ 2.836517] e1000e: Intel(R) PRO/1000 Network Driver
6206 09:58:13.614492 <6>[ 2.841738] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6207 09:58:13.621216 <6>[ 2.847931] igb: Intel(R) Gigabit Ethernet Network Driver
6208 09:58:13.627509 <6>[ 2.853586] igb: Copyright (c) 2007-2014 Intel Corporation.
6209 09:58:13.634861 <6>[ 2.859429] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6210 09:58:13.641357 <6>[ 2.865952] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6211 09:58:13.644858 <6>[ 2.872518] sky2: driver version 1.30
6212 09:58:13.651556 <6>[ 2.877790] usbcore: registered new device driver r8152-cfgselector
6213 09:58:13.657486 <6>[ 2.884335] usbcore: registered new interface driver r8152
6214 09:58:13.664591 <6>[ 2.890198] VFIO - User Level meta-driver version: 0.3
6215 09:58:13.670940 <6>[ 2.898033] mtu3 11201000.usb: uwk - reg:0x420, version:101
6216 09:58:13.677575 <4>[ 2.903901] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6217 09:58:13.684354 <6>[ 2.911171] mtu3 11201000.usb: dr_mode: 1, drd: auto
6218 09:58:13.691062 <6>[ 2.916396] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6219 09:58:13.694712 <6>[ 2.922581] mtu3 11201000.usb: usb3-drd: 0
6220 09:58:13.704067 <6>[ 2.928133] mtu3 11201000.usb: xHCI platform device register success...
6221 09:58:13.711149 <4>[ 2.936792] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6222 09:58:13.717343 <6>[ 2.944734] xhci-mtk 11200000.usb: xHCI Host Controller
6223 09:58:13.723874 <6>[ 2.950236] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6224 09:58:13.730626 <6>[ 2.957956] xhci-mtk 11200000.usb: USB3 root hub has no ports
6225 09:58:13.740424 <6>[ 2.963963] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6226 09:58:13.747155 <6>[ 2.973388] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6227 09:58:13.753965 <6>[ 2.979469] xhci-mtk 11200000.usb: xHCI Host Controller
6228 09:58:13.760331 <6>[ 2.984958] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6229 09:58:13.767492 <6>[ 2.992615] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6230 09:58:13.770480 <6>[ 2.999480] hub 1-0:1.0: USB hub found
6231 09:58:13.773797 <6>[ 3.003509] hub 1-0:1.0: 1 port detected
6232 09:58:13.785201 <6>[ 3.008852] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6233 09:58:13.788128 <6>[ 3.017497] hub 2-0:1.0: USB hub found
6234 09:58:13.798154 <3>[ 3.021550] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6235 09:58:13.805015 <6>[ 3.029475] usbcore: registered new interface driver usb-storage
6236 09:58:13.811201 <6>[ 3.036095] usbcore: registered new device driver onboard-usb-hub
6237 09:58:13.821696 <4>[ 3.045876] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6238 09:58:13.831264 <6>[ 3.058155] mt6397-rtc mt6358-rtc: registered as rtc0
6239 09:58:13.840788 <6>[ 3.063632] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:57:16 UTC (1718704636)
6240 09:58:13.847429 <6>[ 3.073530] i2c_dev: i2c /dev entries driver
6241 09:58:13.857176 <6>[ 3.079964] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6242 09:58:13.863880 <6>[ 3.088283] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6243 09:58:13.870519 <6>[ 3.097186] i2c 4-0058: Fixed dependency cycle(s) with /panel
6244 09:58:13.877262 <6>[ 3.103215] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6245 09:58:13.887327 <3>[ 3.110686] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6246 09:58:13.903362 <6>[ 3.130641] cpu cpu0: EM: created perf domain
6247 09:58:13.913283 <6>[ 3.136122] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6248 09:58:13.919997 <6>[ 3.147401] cpu cpu4: EM: created perf domain
6249 09:58:13.927451 <6>[ 3.154548] sdhci: Secure Digital Host Controller Interface driver
6250 09:58:13.934088 <6>[ 3.161002] sdhci: Copyright(c) Pierre Ossman
6251 09:58:13.940706 <6>[ 3.166419] Synopsys Designware Multimedia Card Interface Driver
6252 09:58:13.947225 <6>[ 3.166940] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6253 09:58:13.950852 <6>[ 3.173609] sdhci-pltfm: SDHCI platform and OF driver helper
6254 09:58:13.959218 <6>[ 3.186433] ledtrig-cpu: registered to indicate activity on CPUs
6255 09:58:13.967308 <6>[ 3.194313] usbcore: registered new interface driver usbhid
6256 09:58:13.970681 <6>[ 3.200167] usbhid: USB HID core driver
6257 09:58:13.981359 <6>[ 3.204503] spi_master spi2: will run message pump with realtime priority
6258 09:58:13.984986 <4>[ 3.204843] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6259 09:58:13.992977 <4>[ 3.218896] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6260 09:58:14.005413 <6>[ 3.225106] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6261 09:58:14.025809 <6>[ 3.242944] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6262 09:58:14.032361 <6>[ 3.257590] cros-ec-spi spi2.0: Chrome EC device registered
6263 09:58:14.038813 <4>[ 3.265152] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6264 09:58:14.056418 <4>[ 3.280630] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6265 09:58:14.069902 <4>[ 3.293460] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6266 09:58:14.076087 <4>[ 3.302639] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6267 09:58:14.088575 <6>[ 3.312489] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6268 09:58:14.095209 <6>[ 3.319302] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6269 09:58:14.101601 <6>[ 3.320621] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6270 09:58:14.111877 <6>[ 3.332371] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6271 09:58:14.118320 <6>[ 3.335464] mmc0: new HS400 MMC card at address 0001
6272 09:58:14.121713 <6>[ 3.346350] NET: Registered PF_PACKET protocol family
6273 09:58:14.128337 <6>[ 3.350855] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6274 09:58:14.132059 <6>[ 3.355712] 9pnet: Installing 9P2000 support
6275 09:58:14.138191 <5>[ 3.365112] Key type dns_resolver registered
6276 09:58:14.148508 <6>[ 3.366092] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6277 09:58:14.154995 <6>[ 3.367641] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6278 09:58:14.158135 <6>[ 3.370163] registered taskstats version 1
6279 09:58:14.164911 <6>[ 3.370806] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6280 09:58:14.171063 <6>[ 3.372219] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6281 09:58:14.178034 <6>[ 3.373400] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6282 09:58:14.187840 <6>[ 3.382126] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6283 09:58:14.190886 <5>[ 3.387786] Loading compiled-in X.509 certificates
6284 09:58:14.205918 <6>[ 3.429904] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6285 09:58:14.241151 <3>[ 3.465126] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6286 09:58:14.273829 <6>[ 3.494103] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6287 09:58:14.284941 <6>[ 3.508393] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6288 09:58:14.294628 <6>[ 3.516962] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6289 09:58:14.301309 <6>[ 3.525522] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6290 09:58:14.310535 <6>[ 3.534094] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6291 09:58:14.317139 <6>[ 3.542624] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6292 09:58:14.327157 <6>[ 3.551143] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6293 09:58:14.337682 <6>[ 3.559661] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6294 09:58:14.344081 <6>[ 3.569015] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6295 09:58:14.350528 <6>[ 3.576579] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6296 09:58:14.357065 <6>[ 3.583921] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6297 09:58:14.360603 <6>[ 3.584894] hub 1-1:1.0: USB hub found
6298 09:58:14.370413 <6>[ 3.591233] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6299 09:58:14.373765 <6>[ 3.594841] hub 1-1:1.0: 3 ports detected
6300 09:58:14.380411 <6>[ 3.601902] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6301 09:58:14.386660 <6>[ 3.613864] panfrost 13040000.gpu: clock rate = 511999970
6302 09:58:14.396568 <6>[ 3.619554] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6303 09:58:14.406716 <6>[ 3.629652] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6304 09:58:14.413368 <6>[ 3.637657] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6305 09:58:14.426715 <6>[ 3.646095] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6306 09:58:14.433205 <6>[ 3.658173] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6307 09:58:14.443176 <6>[ 3.667206] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6308 09:58:14.453271 <6>[ 3.676478] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6309 09:58:14.463269 <6>[ 3.685653] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6310 09:58:14.473357 <6>[ 3.694786] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6311 09:58:14.479302 <6>[ 3.703912] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6312 09:58:14.489546 <6>[ 3.713212] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6313 09:58:14.499455 <6>[ 3.722513] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6314 09:58:14.509667 <6>[ 3.731988] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6315 09:58:14.519028 <6>[ 3.741461] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6316 09:58:14.528988 <6>[ 3.750589] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6317 09:58:14.599151 <6>[ 3.822989] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6318 09:58:14.609208 <6>[ 3.831849] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6319 09:58:14.619883 <6>[ 3.843645] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6320 09:58:14.678025 <6>[ 3.901818] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6321 09:58:15.308038 <6>[ 4.098273] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6322 09:58:15.314826 <6>[ 4.241508] r8152 1-1.2:1.0: load rtl8153b-2 v1 10/23/19 successfully
6323 09:58:15.318336 <6>[ 4.279472] r8152 1-1.2:1.0 eth0: v1.12.13
6324 09:58:15.328041 <6>[ 4.357811] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6325 09:58:15.334732 <6>[ 4.515339] Console: switching to colour frame buffer device 170x48
6326 09:58:15.341222 <6>[ 4.565419] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6327 09:58:15.362265 <6>[ 4.582657] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6328 09:58:15.379043 <6>[ 4.599557] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6329 09:58:15.385276 <6>[ 4.611700] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6330 09:58:15.396398 <6>[ 4.620172] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6331 09:58:15.406026 <6>[ 4.625303] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6332 09:58:15.423692 <6>[ 4.644333] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6333 09:58:16.832968 <6>[ 6.060383] r8152 1-1.2:1.0 eth0: carrier on
6334 09:58:19.578643 <5>[ 6.085795] Sending DHCP requests .., OK
6335 09:58:19.585161 <6>[ 8.810269] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6336 09:58:19.588669 <6>[ 8.818706] IP-Config: Complete:
6337 09:58:19.601607 <6>[ 8.822277] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6338 09:58:19.611834 <6>[ 8.833178] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6339 09:58:19.618509 <6>[ 8.842656] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6340 09:58:19.627799 <6>[ 8.842666] nameserver0=192.168.201.1
6341 09:58:19.635931 <6>[ 8.863403] clk: Disabling unused clocks
6342 09:58:19.640851 <6>[ 8.871711] ALSA device list:
6343 09:58:19.650563 <6>[ 8.877910] No soundcards found.
6344 09:58:19.659759 <6>[ 8.887333] Freeing unused kernel memory: 8512K
6345 09:58:19.667350 <6>[ 8.894605] Run /init as init process
6346 09:58:19.698980 <6>[ 8.926300] NET: Registered PF_INET6 protocol family
6347 09:58:19.705642 <6>[ 8.933353] Segment Routing with IPv6
6348 09:58:19.708957 <6>[ 8.938021] In-situ OAM (IOAM) with IPv6
6349 09:58:19.756816 <30>[ 8.957715] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6350 09:58:19.769432 <30>[ 8.996244] systemd[1]: Detected architecture arm64.
6351 09:58:19.773831
6352 09:58:19.776942 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6353 09:58:19.777658
6354 09:58:19.791471 <30>[ 9.018537] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6355 09:58:19.931314 <30>[ 9.155505] systemd[1]: Queued start job for default target graphical.target.
6356 09:58:19.956051 <30>[ 9.179545] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6357 09:58:19.962515 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6358 09:58:19.982765 <30>[ 9.206758] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6359 09:58:19.992875 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6360 09:58:20.011888 <30>[ 9.235152] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6361 09:58:20.022557 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6362 09:58:20.039118 <30>[ 9.262748] systemd[1]: Created slice user.slice - User and Session Slice.
6363 09:58:20.049081 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6364 09:58:20.070103 <30>[ 9.290238] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6365 09:58:20.081885 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6366 09:58:20.101917 <30>[ 9.322188] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6367 09:58:20.113354 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6368 09:58:20.140079 <30>[ 9.354052] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6369 09:58:20.159091 <30>[ 9.382075] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6370 09:58:20.165399 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6371 09:58:20.186282 <30>[ 9.409979] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6372 09:58:20.197902 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6373 09:58:20.214420 <30>[ 9.438024] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6374 09:58:20.228621 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6375 09:58:20.242831 <30>[ 9.470079] systemd[1]: Reached target paths.target - Path Units.
6376 09:58:20.257527 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6377 09:58:20.274215 <30>[ 9.497988] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6378 09:58:20.286606 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6379 09:58:20.298695 <30>[ 9.525950] systemd[1]: Reached target slices.target - Slice Units.
6380 09:58:20.313720 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6381 09:58:20.326778 <30>[ 9.553996] systemd[1]: Reached target swap.target - Swaps.
6382 09:58:20.337151 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6383 09:58:20.357890 <30>[ 9.582038] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6384 09:58:20.371689 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6385 09:58:20.391570 <30>[ 9.615255] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6386 09:58:20.405593 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6387 09:58:20.424019 <30>[ 9.647811] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6388 09:58:20.437346 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6389 09:58:20.455273 <30>[ 9.678695] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6390 09:58:20.468815 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6391 09:58:20.486745 <30>[ 9.710560] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6392 09:58:20.499035 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6393 09:58:20.515442 <30>[ 9.738742] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6394 09:58:20.528287 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6395 09:58:20.546813 <30>[ 9.770629] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6396 09:58:20.559611 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6397 09:58:20.578965 <30>[ 9.802413] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6398 09:58:20.591569 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6399 09:58:20.638544 <30>[ 9.862216] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6400 09:58:20.650249 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6401 09:58:20.671483 <30>[ 9.895229] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6402 09:58:20.682143 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6403 09:58:20.703554 <30>[ 9.927388] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6404 09:58:20.714078 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6405 09:58:20.737201 <30>[ 9.954652] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6406 09:58:20.760217 <30>[ 9.983839] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6407 09:58:20.771865 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6408 09:58:20.818586 <30>[ 10.042546] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6409 09:58:20.829955 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6410 09:58:20.849826 <30>[ 10.073168] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6411 09:58:20.865738 Startin<6>[ 10.087183] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6412 09:58:20.869174 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6413 09:58:20.895878 <30>[ 10.119735] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6414 09:58:20.906646 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6415 09:58:20.927807 <30>[ 10.152086] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6416 09:58:20.942294 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6417 09:58:20.995215 <30>[ 10.218851] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6418 09:58:21.006846 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6419 09:58:21.032988 <30>[ 10.256999] systemd[1]: Starting systemd-journald.service - Journal Service...
6420 09:58:21.043352 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6421 09:58:21.061550 <30>[ 10.285471] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6422 09:58:21.071510 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6423 09:58:21.097959 <30>[ 10.318457] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6424 09:58:21.108418 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6425 09:58:21.130972 <30>[ 10.354643] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6426 09:58:21.143206 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6427 09:58:21.165153 <30>[ 10.389052] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6428 09:58:21.176147 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6429 09:58:21.202084 <30>[ 10.425602] systemd[1]: Started systemd-journald.service - Journal Service.
6430 09:58:21.211842 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6431 09:58:21.232107 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6432 09:58:21.250677 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6433 09:58:21.267025 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6434 09:58:21.283173 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6435 09:58:21.303533 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6436 09:58:21.323316 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6437 09:58:21.345407 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6438 09:58:21.363040 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6439 09:58:21.383184 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6440 09:58:21.403103 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6441 09:58:21.426886 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6442 09:58:21.451690 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6443 09:58:21.471262 See 'systemctl status systemd-remount-fs.service' for details.
6444 09:58:21.495930 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6445 09:58:21.554881 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6446 09:58:21.580530 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6447 09:58:21.593282 <46>[ 10.816976] systemd-journald[198]: Received client request to flush runtime journal.
6448 09:58:21.606598 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6449 09:58:21.626079 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6450 09:58:21.645566 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6451 09:58:21.669920 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6452 09:58:21.688087 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6453 09:58:21.708779 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6454 09:58:21.729123 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6455 09:58:21.747630 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6456 09:58:21.767629 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6457 09:58:21.810846 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6458 09:58:21.850106 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6459 09:58:21.867776 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6460 09:58:21.887043 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6461 09:58:21.927052 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6462 09:58:21.952098 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6463 09:58:21.975352 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6464 09:58:22.027447 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6465 09:58:22.048487 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6466 09:58:22.066853 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6467 09:58:22.102846 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6468 09:58:22.124956 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6469 09:58:22.142272 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6470 09:58:22.154977 <46>[ 11.378753] systemd-journald[198]: Time jumped backwards, rotating.
6471 09:58:22.264873 <6>[ 11.488676] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6472 09:58:22.271368 <3>[ 11.489248] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6473 09:58:22.285093 <3>[ 11.492398] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6474 09:58:22.291681 <3>[ 11.492410] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6475 09:58:22.301722 <3>[ 11.492415] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6476 09:58:22.311364 <3>[ 11.492420] elan_i2c 2-0015: Error applying setting, reverse things back
6477 09:58:22.321428 <4>[ 11.503086] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6478 09:58:22.328265 <3>[ 11.505677] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6479 09:58:22.337880 <6>[ 11.522914] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6480 09:58:22.347461 <3>[ 11.524061] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6481 09:58:22.350845 <3>[ 11.526156] mtk-scp 10500000.scp: invalid resource
6482 09:58:22.360984 <6>[ 11.526222] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6483 09:58:22.371249 <6>[ 11.538934] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6484 09:58:22.374556 <6>[ 11.542218] remoteproc remoteproc0: scp is available
6485 09:58:22.384845 <4>[ 11.555276] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6486 09:58:22.391872 <4>[ 11.560566] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6487 09:58:22.398022 <4>[ 11.575489] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6488 09:58:22.408392 <3>[ 11.575630] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6489 09:58:22.418539 <3>[ 11.575644] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6490 09:58:22.425066 <3>[ 11.575649] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6491 09:58:22.434982 <3>[ 11.575656] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6492 09:58:22.445173 <3>[ 11.575660] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6493 09:58:22.451542 <6>[ 11.578952] remoteproc remoteproc0: powering up scp
6494 09:58:22.458056 <3>[ 11.580873] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6495 09:58:22.465403 <6>[ 11.587804] mc: Linux media interface: v0.10
6496 09:58:22.475720 <4>[ 11.591935] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6497 09:58:22.485134 <3>[ 11.612204] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6498 09:58:22.494282 <3>[ 11.615861] remoteproc remoteproc0: request_firmware failed: -2
6499 09:58:22.501710 <6>[ 11.635453] videodev: Linux video capture interface: v2.00
6500 09:58:22.508422 <5>[ 11.643426] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6501 09:58:22.519064 <6>[ 11.645017] cs_system_cfg: CoreSight Configuration manager initialised
6502 09:58:22.525173 <6>[ 11.700735] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6503 09:58:22.531698 <5>[ 11.719467] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6504 09:58:22.542664 <6>[ 11.727694] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6505 09:58:22.552744 <5>[ 11.728718] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6506 09:58:22.559297 <6>[ 11.776153] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6507 09:58:22.569290 <4>[ 11.776495] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6508 09:58:22.578947 <6>[ 11.785734] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6509 09:58:22.582279 <6>[ 11.792758] cfg80211: failed to load regulatory.db
6510 09:58:22.589510 <6>[ 11.801942] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6511 09:58:22.596130 <6>[ 11.810611] Bluetooth: Core ver 2.22
6512 09:58:22.602394 <6>[ 11.815614] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6513 09:58:22.615389 <3>[ 11.823140] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6514 09:58:22.618732 <6>[ 11.824226] NET: Registered PF_BLUETOOTH protocol family
6515 09:58:22.625803 <6>[ 11.824235] Bluetooth: HCI device and connection manager initialized
6516 09:58:22.632140 <6>[ 11.824249] Bluetooth: HCI socket layer initialized
6517 09:58:22.635907 <6>[ 11.824254] Bluetooth: L2CAP socket layer initialized
6518 09:58:22.642974 <6>[ 11.824270] Bluetooth: SCO socket layer initialized
6519 09:58:22.649361 <6>[ 11.828331] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6520 09:58:22.659666 <3>[ 11.835560] debugfs: File 'Playback' in directory 'dapm' already present!
6521 09:58:22.666660 <6>[ 11.850437] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6522 09:58:22.672544 <3>[ 11.851817] debugfs: File 'Capture' in directory 'dapm' already present!
6523 09:58:22.683019 <6>[ 11.859627] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6524 09:58:22.689736 <6>[ 11.860457] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6525 09:58:22.695822 <6>[ 11.865052] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6526 09:58:22.706048 <6>[ 11.865220] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6527 09:58:22.709641 <6>[ 11.865673] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6528 09:58:22.719584 <6>[ 11.870161] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6529 09:58:22.728825 <6>[ 11.885822] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6530 09:58:22.743192 <6>[ 11.886962] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6531 09:58:22.746357 <6>[ 11.887423] usbcore: registered new interface driver uvcvideo
6532 09:58:22.756365 <6>[ 11.897656] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6533 09:58:22.759307 <6>[ 11.902240] Bluetooth: HCI UART driver ver 2.3
6534 09:58:22.766590 <3>[ 11.906717] thermal_sys: Failed to find 'trips' node
6535 09:58:22.770128 <6>[ 11.914167] Bluetooth: HCI UART protocol H4 registered
6536 09:58:22.779349 <3>[ 11.920240] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6537 09:58:22.786303 <6>[ 11.929002] Bluetooth: HCI UART protocol LL registered
6538 09:58:22.792697 <3>[ 11.936659] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6539 09:58:22.799632 <6>[ 11.943061] Bluetooth: HCI UART protocol Three-wire (H5) registered
6540 09:58:22.810154 <4>[ 11.951040] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6541 09:58:22.816990 <6>[ 11.962107] Bluetooth: HCI UART protocol Broadcom registered
6542 09:58:22.826851 <6>[ 11.962839] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6543 09:58:22.836532 <6>[ 11.962857] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6544 09:58:22.846843 <6>[ 11.963233] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6545 09:58:22.856892 <3>[ 11.974823] thermal_sys: Failed to find 'trips' node
6546 09:58:22.864268 <6>[ 11.979578] Bluetooth: HCI UART protocol QCA registered
6547 09:58:22.871447 <6>[ 11.981094] Bluetooth: hci0: setting up ROME/QCA6390
6548 09:58:22.881988 <3>[ 11.987429] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6549 09:58:22.892052 <3>[ 11.987438] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6550 09:58:22.898079 <6>[ 11.992157] Bluetooth: HCI UART protocol Marvell registered
6551 09:58:22.909285 <4>[ 11.997345] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6552 09:58:22.919213 <4>[ 12.066832] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6553 09:58:22.925935 <4>[ 12.066832] Fallback method does not support PEC.
6554 09:58:22.964605 <6>[ 12.186113] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6555 09:58:22.969044 <3>[ 12.195953] Bluetooth: hci0: Frame reassembly failed (-84)
6556 09:58:22.978624 <3>[ 12.201824] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6557 09:58:23.056181 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6558 09:58:23.063991 <3>[ 12.287189] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6559 09:58:23.070164 <3>[ 12.290278] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6560 09:58:23.083635 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6561 09:58:23.103279 <3>[ 12.325684] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6562 09:58:23.113740 [[0;32m OK [0m] Listening on<3>[ 12.337562] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6563 09:58:23.125153 <3>[ 12.337949] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6564 09:58:23.131659 <3>[ 12.340382] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6565 09:58:23.141499 [0;1;39msystemd-rfkil…l Swit<3>[ 12.354685] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6566 09:58:23.145201 ch Status /dev/rfkill Watch.
6567 09:58:23.161644 <3>[ 12.385284] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6568 09:58:23.177666 <3>[ 12.400842] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6569 09:58:23.204781 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6570 09:58:23.228828 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6571 09:58:23.252439 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6572 09:58:23.259234 <6>[ 12.486303] Bluetooth: hci0: QCA Product ID :0x00000008
6573 09:58:23.267064 <6>[ 12.493634] Bluetooth: hci0: QCA SOC Version :0x00000044
6574 09:58:23.274759 <6>[ 12.501563] Bluetooth: hci0: QCA ROM Version :0x00000302
6575 09:58:23.282571 <6>[ 12.509756] Bluetooth: hci0: QCA Patch Version:0x00000111
6576 09:58:23.290578 <6>[ 12.517867] Bluetooth: hci0: QCA controller version 0x00440302
6577 09:58:23.302510 <6>[ 12.526123] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6578 09:58:23.308738 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6579 09:58:23.330564 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6580 09:58:23.346530 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6581 09:58:23.363840 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6582 09:58:23.382396 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6583 09:58:23.398141 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6584 09:58:23.415083 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6585 09:58:23.434642 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6586 09:58:23.450494 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6587 09:58:23.492006 <6>[ 12.715891] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6588 09:58:23.501023 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6589 09:58:23.533482 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6590 09:58:23.559934 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6591 09:58:23.573284 <4>[ 12.797093] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6592 09:58:23.587014 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Conf<3>[ 12.813671] Bluetooth: hci0: Frame reassembly failed (-84)
6593 09:58:23.590544 iguration.
6594 09:58:23.600464 <4>[ 12.821137] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6595 09:58:23.611175 [[0;32m OK [<4>[ 12.835474] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6596 09:58:23.621438 0m] Started [0;<4>[ 12.846018] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6597 09:58:23.624503 1;39mdbus.service[0m - D-Bus System Message Bus.
6598 09:58:23.656187 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6599 09:58:23.693618 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6600 09:58:23.722390 <6>[ 12.945848] Bluetooth: hci0: QCA Downloading qca/nvm_00440302_i2s.bin
6601 09:58:23.732157 <4>[ 12.954615] bluetooth hci0: Direct firmware load for qca/nvm_00440302_i2s.bin failed with error -2
6602 09:58:23.741719 <3>[ 12.965635] Bluetooth: hci0: QCA Failed to request file: qca/nvm_00440302_i2s.bin (-2)
6603 09:58:23.751821 Startin<3>[ 12.975815] Bluetooth: hci0: QCA Failed to download NVM (-2)
6604 09:58:23.758594 g [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6605 09:58:23.776104 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6606 09:58:23.795950 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6607 09:58:23.848232 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6608 09:58:23.908273 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6609 09:58:23.927634 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6610 09:58:23.943346 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6611 09:58:23.963111 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6612 09:58:24.007682 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6613 09:58:24.048968 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6614 09:58:24.109491
6615 09:58:24.112936 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6616 09:58:24.113516
6617 09:58:24.116322 debian-bookworm-arm64 login: root (automatic login)
6618 09:58:24.116792
6619 09:58:24.137847 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024 aarch64
6620 09:58:24.138427
6621 09:58:24.144091 The programs included with the Debian GNU/Linux system are free software;
6622 09:58:24.150649 the exact distribution terms for each program are described in the
6623 09:58:24.154509 individual files in /usr/share/doc/*/copyright.
6624 09:58:24.155083
6625 09:58:24.160785 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6626 09:58:24.163975 permitted by applicable law.
6627 09:58:24.165481 Matched prompt #10: / #
6629 09:58:24.166625 Setting prompt string to ['/ #']
6630 09:58:24.167150 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6632 09:58:24.168444 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6633 09:58:24.168957 start: 2.2.6 expect-shell-connection (timeout 00:03:34) [common]
6634 09:58:24.169368 Setting prompt string to ['/ #']
6635 09:58:24.169748 Forcing a shell prompt, looking for ['/ #']
6637 09:58:24.220901 / #
6638 09:58:24.221582 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6639 09:58:24.222097 Waiting using forced prompt support (timeout 00:02:30)
6640 09:58:24.227776
6641 09:58:24.228779 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6642 09:58:24.229350 start: 2.2.7 export-device-env (timeout 00:03:34) [common]
6643 09:58:24.229945 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6644 09:58:24.230541 end: 2.2 depthcharge-retry (duration 00:01:26) [common]
6645 09:58:24.231106 end: 2 depthcharge-action (duration 00:01:26) [common]
6646 09:58:24.231738 start: 3 lava-test-retry (timeout 00:05:00) [common]
6647 09:58:24.232321 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6648 09:58:24.232838 Using namespace: common
6650 09:58:24.334277 / # #
6651 09:58:24.334995 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6652 09:58:24.341097 #
6653 09:58:24.342017 Using /lava-14407621
6655 09:58:24.443469 / # export SHELL=/bin/sh
6656 09:58:24.450938 export SHELL=/bin/sh
6658 09:58:24.552855 / # . /lava-14407621/environment
6659 09:58:24.559383 . /lava-14407621/environment
6661 09:58:24.661197 / # /lava-14407621/bin/lava-test-runner /lava-14407621/0
6662 09:58:24.661875 Test shell timeout: 10s (minimum of the action and connection timeout)
6663 09:58:24.667488 /lava-14407621/bin/lava-test-runner /lava-14407621/0
6664 09:58:24.694217 + export TESTRUN_ID=0_cros-ec
6665 09:58:24.700675 +<8>[ 13.926859] <LAVA_SIGNAL_STARTRUN 0_cros-ec 14407621_1.5.2.3.1>
6666 09:58:24.701474 Received signal: <STARTRUN> 0_cros-ec 14407621_1.5.2.3.1
6667 09:58:24.701840 Starting test lava.0_cros-ec (14407621_1.5.2.3.1)
6668 09:58:24.702229 Skipping test definition patterns.
6669 09:58:24.703959 cd /lava-14407621/0/tests/0_cros-ec
6670 09:58:24.707228 + cat uuid
6671 09:58:24.707817 + UUID=14407621_1.5.2.3.1
6672 09:58:24.708156 + set +x
6673 09:58:24.713961 + python3 -m cros.runners.lava_runner -v
6674 09:58:25.309756 test_cros_ec_accel_iio_abi (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_abi)
6675 09:58:25.316242 Checks the cros-ec accelerometer IIO ABI. ... skipped 'No cros-ec-accel found'
6676 09:58:25.316835
6677 09:58:25.322679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip>
6678 09:58:25.323569 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip
6680 09:58:25.336150 test_cros_ec_accel_iio_data_is_valid (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_data_is_valid)
6681 09:58:25.346244 Validates accelerometer data by computing the magnitude. If the ... skipped 'No accelerometer found'
6682 09:58:25.346818
6683 09:58:25.352611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip>
6684 09:58:25.353537 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip
6686 09:58:25.362682 test_cros_ec_gyro_iio_abi (cros.tests.cros_ec_gyro.TestCrosECGyro.test_cros_ec_gyro_iio_abi)
6687 09:58:25.369142 Checks the cros-ec gyroscope IIO ABI. ... skipped 'No cros-ec-gyro found'
6688 09:58:25.369950
6689 09:58:25.375559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip>
6690 09:58:25.376236 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip
6692 09:58:25.382446 test_cros_ec_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_abi)
6693 09:58:25.389004 Checks the standard ABI for the main Embedded Controller. ... ok
6694 09:58:25.389449
6695 09:58:25.395585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_abi RESULT=pass>
6696 09:58:25.396264 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_abi RESULT=pass
6698 09:58:25.401990 test_cros_ec_chardev (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_chardev)
6699 09:58:25.409465 Checks the main Embedded controller character device. ... ok
6700 09:58:25.409999
6701 09:58:25.415196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_chardev RESULT=pass>
6702 09:58:25.415953 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_chardev RESULT=pass
6704 09:58:25.422263 test_cros_ec_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_hello)
6705 09:58:25.428548 Checks basic comunication with the main Embedded controller. ... ok
6706 09:58:25.428981
6707 09:58:25.435366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_hello RESULT=pass>
6708 09:58:25.436223 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_hello RESULT=pass
6710 09:58:25.441815 test_cros_fp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_abi)
6711 09:58:25.449039 Checks the standard ABI for the Fingerprint EC. ... skipped 'MCU cros_fp not supported'
6712 09:58:25.449570
6713 09:58:25.455062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_abi RESULT=skip>
6714 09:58:25.455807 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_abi RESULT=skip
6716 09:58:25.461816 test_cros_fp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_hello)
6717 09:58:25.472144 Checks basic comunication with the fingerprint controller. ... skipped 'MCU cros_fp not found'
6718 09:58:25.472715
6719 09:58:25.478153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_hello RESULT=skip>
6720 09:58:25.478828 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_hello RESULT=skip
6722 09:58:25.485275 test_cros_fp_reboot (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_reboot)
6723 09:58:25.491967 Test reboot command on Fingerprint MCU. ... skipped 'MCU cros_fp not found'
6724 09:58:25.492489
6725 09:58:25.498417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_reboot RESULT=skip>
6726 09:58:25.499213 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_reboot RESULT=skip
6728 09:58:25.505160 test_cros_pd_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_abi)
6729 09:58:25.515126 Checks the standard ABI for the Power Delivery EC. ... skipped 'MCU cros_pd not supported'
6730 09:58:25.515711
6731 09:58:25.518984 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_abi RESULT=skip
6733 09:58:25.521638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_abi RESULT=skip>
6734 09:58:25.527959 test_cros_pd_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_hello)
6735 09:58:25.534436 Checks basic comunication with the power delivery controller. ... skipped 'MCU cros_pd not found'
6736 09:58:25.534996
6737 09:58:25.541070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_hello RESULT=skip>
6738 09:58:25.541846 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_hello RESULT=skip
6740 09:58:25.547778 test_cros_tp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_abi)
6741 09:58:25.554213 Checks the standard ABI for the Touchpad EC. ... skipped 'MCU cros_tp not supported'
6742 09:58:25.557838
6743 09:58:25.561022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_abi RESULT=skip>
6744 09:58:25.561876 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_abi RESULT=skip
6746 09:58:25.567833 test_cros_tp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_hello)
6747 09:58:25.577509 Checks basic comunication with the touchpad controller. ... skipped 'MCU cros_tp not found'
6748 09:58:25.578084
6749 09:58:25.584066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_hello RESULT=skip>
6750 09:58:25.584817 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_hello RESULT=skip
6752 09:58:25.590397 test_cros_ec_pwm_backlight (cros.tests.cros_ec_pwm.TestCrosECPWM.test_cros_ec_pwm_backlight)
6753 09:58:25.600548 Check that the backlight is connected to a pwm of the EC and that ... skipped 'No backlight pwm found'
6754 09:58:25.600977
6755 09:58:25.607088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip>
6756 09:58:25.607989 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip
6758 09:58:25.617016 test_cros_ec_battery_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_battery_abi)
6759 09:58:25.620617 Check the cros battery ABI. ... skipped 'No BAT found'
6760 09:58:25.621048
6761 09:58:25.626918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip>
6762 09:58:25.627762 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip
6764 09:58:25.636745 test_cros_ec_usbpd_charger_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_usbpd_charger_abi)
6765 09:58:25.643097 Check the cros USBPD charger ABI. ... skipped 'No CROS_USBPD_CHARGER found'
6766 09:58:25.643693
6767 09:58:25.649942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip>
6768 09:58:25.650806 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip
6770 09:58:25.656310 test_cros_ec_rtc_abi (cros.tests.cros_ec_rtc.TestCrosECRTC.test_cros_ec_rtc_abi)
6771 09:58:25.663217 Check the cros RTC ABI. ... skipped 'EC_FEATURE_RTC not supported, skipping'
6772 09:58:25.663803
6773 09:58:25.669955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip>
6774 09:58:25.670806 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip
6776 09:58:25.679311 test_cros_ec_extcon_usbc_abi (cros.tests.cros_ec_extcon.TestCrosECextcon.test_cros_ec_extcon_usbc_abi)
6777 09:58:25.686344 Checks the cros-ec extcon ABI. ... skipped 'No extcon device found'
6778 09:58:25.687021
6779 09:58:25.693163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip>
6780 09:58:25.693670
6781 09:58:25.694262 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip
6783 09:58:25.702706 ----------------------------------------------------------<8>[ 14.928867] <LAVA_SIGNAL_ENDRUN 0_cros-ec 14407621_1.5.2.3.1>
6784 09:58:25.703543 Received signal: <ENDRUN> 0_cros-ec 14407621_1.5.2.3.1
6785 09:58:25.703949 Ending use of test pattern.
6786 09:58:25.704269 Ending test lava.0_cros-ec (14407621_1.5.2.3.1), duration 1.00
6788 09:58:25.705800 ------------
6789 09:58:25.706149 Ran 18 tests in 0.353s
6790 09:58:25.709715
6791 09:58:25.710220 OK (skipped=15)
6792 09:58:25.710552 + set +x
6793 09:58:25.712828 <LAVA_TEST_RUNNER EXIT>
6794 09:58:25.713496 ok: lava_test_shell seems to have completed
6795 09:58:25.714381 test_cros_ec_abi: pass
test_cros_ec_accel_iio_abi: skip
test_cros_ec_accel_iio_data_is_valid: skip
test_cros_ec_battery_abi: skip
test_cros_ec_chardev: pass
test_cros_ec_extcon_usbc_abi: skip
test_cros_ec_gyro_iio_abi: skip
test_cros_ec_hello: pass
test_cros_ec_pwm_backlight: skip
test_cros_ec_rtc_abi: skip
test_cros_ec_usbpd_charger_abi: skip
test_cros_fp_abi: skip
test_cros_fp_hello: skip
test_cros_fp_reboot: skip
test_cros_pd_abi: skip
test_cros_pd_hello: skip
test_cros_tp_abi: skip
test_cros_tp_hello: skip
6796 09:58:25.714839 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6797 09:58:25.715269 end: 3 lava-test-retry (duration 00:00:01) [common]
6798 09:58:25.715735 start: 4 finalize (timeout 00:08:08) [common]
6799 09:58:25.716179 start: 4.1 power-off (timeout 00:00:30) [common]
6800 09:58:25.716938 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6801 09:58:27.100565 >> Command sent successfully.
6802 09:58:27.110695 Returned 0 in 1 seconds
6803 09:58:27.212239 end: 4.1 power-off (duration 00:00:01) [common]
6805 09:58:27.213743 start: 4.2 read-feedback (timeout 00:08:06) [common]
6806 09:58:27.215199 Listened to connection for namespace 'common' for up to 1s
6807 09:58:28.215777 Finalising connection for namespace 'common'
6808 09:58:28.216566 Disconnecting from shell: Finalise
6809 09:58:28.217224 / #
6810 09:58:28.318346 end: 4.2 read-feedback (duration 00:00:01) [common]
6811 09:58:28.319044 end: 4 finalize (duration 00:00:03) [common]
6812 09:58:28.319827 Cleaning after the job
6813 09:58:28.320341 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/ramdisk
6814 09:58:28.345370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/kernel
6815 09:58:28.373685 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/dtb
6816 09:58:28.374134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407621/tftp-deploy-ah9_vzaf/modules
6817 09:58:28.380897 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407621
6818 09:58:28.476157 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407621
6819 09:58:28.476345 Job finished correctly