Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 44
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 103
1 09:55:38.067675 lava-dispatcher, installed at version: 2024.03
2 09:55:38.067890 start: 0 validate
3 09:55:38.068005 Start time: 2024-06-18 09:55:38.067998+00:00 (UTC)
4 09:55:38.068141 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:55:38.068284 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:55:38.327998 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:55:38.328737 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 09:55:38.582259 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:55:38.583118 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 09:55:38.837784 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:55:38.838484 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:55:39.093600 Using caching service: 'http://localhost/cache/?uri=%s'
13 09:55:39.094368 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22-32-g866364c7d80d0%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 09:55:39.354927 validate duration: 1.29
16 09:55:39.356156 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:55:39.356729 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:55:39.357259 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:55:39.358048 Not decompressing ramdisk as can be used compressed.
20 09:55:39.358624 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/arm64/initrd.cpio.gz
21 09:55:39.359022 saving as /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/ramdisk/initrd.cpio.gz
22 09:55:39.359404 total size: 5628143 (5 MB)
23 09:55:39.364161 progress 0 % (0 MB)
24 09:55:39.373660 progress 5 % (0 MB)
25 09:55:39.381199 progress 10 % (0 MB)
26 09:55:39.385732 progress 15 % (0 MB)
27 09:55:39.389858 progress 20 % (1 MB)
28 09:55:39.393058 progress 25 % (1 MB)
29 09:55:39.396024 progress 30 % (1 MB)
30 09:55:39.398879 progress 35 % (1 MB)
31 09:55:39.401078 progress 40 % (2 MB)
32 09:55:39.403543 progress 45 % (2 MB)
33 09:55:39.405492 progress 50 % (2 MB)
34 09:55:39.407679 progress 55 % (2 MB)
35 09:55:39.409643 progress 60 % (3 MB)
36 09:55:39.411352 progress 65 % (3 MB)
37 09:55:39.413264 progress 70 % (3 MB)
38 09:55:39.414806 progress 75 % (4 MB)
39 09:55:39.416510 progress 80 % (4 MB)
40 09:55:39.418043 progress 85 % (4 MB)
41 09:55:39.419634 progress 90 % (4 MB)
42 09:55:39.421189 progress 95 % (5 MB)
43 09:55:39.422600 progress 100 % (5 MB)
44 09:55:39.422816 5 MB downloaded in 0.06 s (84.64 MB/s)
45 09:55:39.422966 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:55:39.423198 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:55:39.423278 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:55:39.423354 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:55:39.423479 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 09:55:39.423544 saving as /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/kernel/Image
52 09:55:39.423598 total size: 54813184 (52 MB)
53 09:55:39.423652 No compression specified
54 09:55:39.424648 progress 0 % (0 MB)
55 09:55:39.438123 progress 5 % (2 MB)
56 09:55:39.451648 progress 10 % (5 MB)
57 09:55:39.465236 progress 15 % (7 MB)
58 09:55:39.478840 progress 20 % (10 MB)
59 09:55:39.492421 progress 25 % (13 MB)
60 09:55:39.506082 progress 30 % (15 MB)
61 09:55:39.520026 progress 35 % (18 MB)
62 09:55:39.533646 progress 40 % (20 MB)
63 09:55:39.547105 progress 45 % (23 MB)
64 09:55:39.560724 progress 50 % (26 MB)
65 09:55:39.574671 progress 55 % (28 MB)
66 09:55:39.588074 progress 60 % (31 MB)
67 09:55:39.601697 progress 65 % (34 MB)
68 09:55:39.615323 progress 70 % (36 MB)
69 09:55:39.629149 progress 75 % (39 MB)
70 09:55:39.642898 progress 80 % (41 MB)
71 09:55:39.656543 progress 85 % (44 MB)
72 09:55:39.670187 progress 90 % (47 MB)
73 09:55:39.683591 progress 95 % (49 MB)
74 09:55:39.696933 progress 100 % (52 MB)
75 09:55:39.697148 52 MB downloaded in 0.27 s (191.10 MB/s)
76 09:55:39.697297 end: 1.2.1 http-download (duration 00:00:00) [common]
78 09:55:39.697505 end: 1.2 download-retry (duration 00:00:00) [common]
79 09:55:39.697587 start: 1.3 download-retry (timeout 00:10:00) [common]
80 09:55:39.697664 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 09:55:39.697792 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 09:55:39.697854 saving as /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 09:55:39.697907 total size: 57695 (0 MB)
84 09:55:39.697960 No compression specified
85 09:55:39.699112 progress 56 % (0 MB)
86 09:55:39.699372 progress 100 % (0 MB)
87 09:55:39.699573 0 MB downloaded in 0.00 s (33.09 MB/s)
88 09:55:39.699684 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:55:39.699887 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:55:39.699964 start: 1.4 download-retry (timeout 00:10:00) [common]
92 09:55:39.700040 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 09:55:39.700142 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/arm64/full.rootfs.tar.xz
94 09:55:39.700201 saving as /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/nfsrootfs/full.rootfs.tar
95 09:55:39.700252 total size: 55895280 (53 MB)
96 09:55:39.700304 Using unxz to decompress xz
97 09:55:39.701442 progress 0 % (0 MB)
98 09:55:39.850303 progress 5 % (2 MB)
99 09:55:40.004397 progress 10 % (5 MB)
100 09:55:40.144135 progress 15 % (8 MB)
101 09:55:40.288959 progress 20 % (10 MB)
102 09:55:40.439583 progress 25 % (13 MB)
103 09:55:40.590584 progress 30 % (16 MB)
104 09:55:40.708999 progress 35 % (18 MB)
105 09:55:40.777726 progress 40 % (21 MB)
106 09:55:40.915762 progress 45 % (24 MB)
107 09:55:41.072766 progress 50 % (26 MB)
108 09:55:41.223256 progress 55 % (29 MB)
109 09:55:41.369567 progress 60 % (32 MB)
110 09:55:41.519433 progress 65 % (34 MB)
111 09:55:41.677840 progress 70 % (37 MB)
112 09:55:41.838170 progress 75 % (40 MB)
113 09:55:41.972983 progress 80 % (42 MB)
114 09:55:42.109167 progress 85 % (45 MB)
115 09:55:42.270857 progress 90 % (48 MB)
116 09:55:42.429934 progress 95 % (50 MB)
117 09:55:42.588338 progress 100 % (53 MB)
118 09:55:42.594420 53 MB downloaded in 2.89 s (18.42 MB/s)
119 09:55:42.594607 end: 1.4.1 http-download (duration 00:00:03) [common]
121 09:55:42.594820 end: 1.4 download-retry (duration 00:00:03) [common]
122 09:55:42.594900 start: 1.5 download-retry (timeout 00:09:57) [common]
123 09:55:42.594976 start: 1.5.1 http-download (timeout 00:09:57) [common]
124 09:55:42.595104 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22-32-g866364c7d80d0/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 09:55:42.595165 saving as /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/modules/modules.tar
126 09:55:42.595218 total size: 8619356 (8 MB)
127 09:55:42.595273 Using unxz to decompress xz
128 09:55:42.596583 progress 0 % (0 MB)
129 09:55:42.615744 progress 5 % (0 MB)
130 09:55:42.639215 progress 10 % (0 MB)
131 09:55:42.663088 progress 15 % (1 MB)
132 09:55:42.686809 progress 20 % (1 MB)
133 09:55:42.711637 progress 25 % (2 MB)
134 09:55:42.735434 progress 30 % (2 MB)
135 09:55:42.759659 progress 35 % (2 MB)
136 09:55:42.783304 progress 40 % (3 MB)
137 09:55:42.807111 progress 45 % (3 MB)
138 09:55:42.830937 progress 50 % (4 MB)
139 09:55:42.872968 progress 55 % (4 MB)
140 09:55:42.898282 progress 60 % (4 MB)
141 09:55:42.921222 progress 65 % (5 MB)
142 09:55:42.948396 progress 70 % (5 MB)
143 09:55:42.972038 progress 75 % (6 MB)
144 09:55:42.994826 progress 80 % (6 MB)
145 09:55:43.017622 progress 85 % (7 MB)
146 09:55:43.040351 progress 90 % (7 MB)
147 09:55:43.066580 progress 95 % (7 MB)
148 09:55:43.094371 progress 100 % (8 MB)
149 09:55:43.098719 8 MB downloaded in 0.50 s (16.33 MB/s)
150 09:55:43.098881 end: 1.5.1 http-download (duration 00:00:01) [common]
152 09:55:43.099097 end: 1.5 download-retry (duration 00:00:01) [common]
153 09:55:43.099176 start: 1.6 prepare-tftp-overlay (timeout 00:09:56) [common]
154 09:55:43.099251 start: 1.6.1 extract-nfsrootfs (timeout 00:09:56) [common]
155 09:55:44.353422 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq
156 09:55:44.353592 end: 1.6.1 extract-nfsrootfs (duration 00:00:01) [common]
157 09:55:44.353684 start: 1.6.2 lava-overlay (timeout 00:09:55) [common]
158 09:55:44.353832 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a
159 09:55:44.353949 makedir: /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin
160 09:55:44.354040 makedir: /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/tests
161 09:55:44.354126 makedir: /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/results
162 09:55:44.354207 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-add-keys
163 09:55:44.354385 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-add-sources
164 09:55:44.354505 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-background-process-start
165 09:55:44.354622 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-background-process-stop
166 09:55:44.354747 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-common-functions
167 09:55:44.354863 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-echo-ipv4
168 09:55:44.354978 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-install-packages
169 09:55:44.355091 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-installed-packages
170 09:55:44.355251 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-os-build
171 09:55:44.355373 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-probe-channel
172 09:55:44.355489 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-probe-ip
173 09:55:44.355605 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-target-ip
174 09:55:44.355718 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-target-mac
175 09:55:44.355832 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-target-storage
176 09:55:44.355949 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-case
177 09:55:44.356062 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-event
178 09:55:44.356176 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-feedback
179 09:55:44.356289 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-raise
180 09:55:44.356402 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-reference
181 09:55:44.356513 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-runner
182 09:55:44.356625 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-set
183 09:55:44.356737 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-test-shell
184 09:55:44.356850 Updating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-install-packages (oe)
185 09:55:44.356989 Updating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/bin/lava-installed-packages (oe)
186 09:55:44.357105 Creating /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/environment
187 09:55:44.357224 LAVA metadata
188 09:55:44.357293 - LAVA_JOB_ID=14407613
189 09:55:44.357350 - LAVA_DISPATCHER_IP=192.168.201.1
190 09:55:44.357443 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:55) [common]
191 09:55:44.357500 skipped lava-vland-overlay
192 09:55:44.357568 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 09:55:44.357639 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
194 09:55:44.357692 skipped lava-multinode-overlay
195 09:55:44.357759 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 09:55:44.357830 start: 1.6.2.3 test-definition (timeout 00:09:55) [common]
197 09:55:44.357898 Loading test definitions
198 09:55:44.357974 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:55) [common]
199 09:55:44.358033 Using /lava-14407613 at stage 0
200 09:55:44.358363 uuid=14407613_1.6.2.3.1 testdef=None
201 09:55:44.358446 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 09:55:44.358522 start: 1.6.2.3.2 test-overlay (timeout 00:09:55) [common]
203 09:55:44.358946 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 09:55:44.359144 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:55) [common]
206 09:55:44.359692 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 09:55:44.359900 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
209 09:55:44.360435 runner path: /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/0/tests/0_wifi-basic test_uuid 14407613_1.6.2.3.1
210 09:55:44.360580 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 09:55:44.360764 Creating lava-test-runner.conf files
213 09:55:44.360819 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14407613/lava-overlay-w0tipy2a/lava-14407613/0 for stage 0
214 09:55:44.360899 - 0_wifi-basic
215 09:55:44.360990 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 09:55:44.361068 start: 1.6.2.4 compress-overlay (timeout 00:09:55) [common]
217 09:55:44.366524 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 09:55:44.366619 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
219 09:55:44.366696 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 09:55:44.366773 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 09:55:44.366850 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
222 09:55:44.523409 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 09:55:44.523559 start: 1.6.4 extract-modules (timeout 00:09:55) [common]
224 09:55:44.523635 extracting modules file /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq
225 09:55:44.741554 extracting modules file /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14407613/extract-overlay-ramdisk-egqf7mnu/ramdisk
226 09:55:44.965780 end: 1.6.4 extract-modules (duration 00:00:00) [common]
227 09:55:44.965921 start: 1.6.5 apply-overlay-tftp (timeout 00:09:54) [common]
228 09:55:44.966005 [common] Applying overlay to NFS
229 09:55:44.966064 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14407613/compress-overlay-j460nwus/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq
230 09:55:44.972182 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 09:55:44.972278 start: 1.6.6 configure-preseed-file (timeout 00:09:54) [common]
232 09:55:44.972360 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 09:55:44.972437 start: 1.6.7 compress-ramdisk (timeout 00:09:54) [common]
234 09:55:44.972503 Building ramdisk /var/lib/lava/dispatcher/tmp/14407613/extract-overlay-ramdisk-egqf7mnu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14407613/extract-overlay-ramdisk-egqf7mnu/ramdisk
235 09:55:45.301432 >> 130466 blocks
236 09:55:47.365237 rename /var/lib/lava/dispatcher/tmp/14407613/extract-overlay-ramdisk-egqf7mnu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/ramdisk/ramdisk.cpio.gz
237 09:55:47.365409 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
238 09:55:47.365497 start: 1.6.8 prepare-kernel (timeout 00:09:52) [common]
239 09:55:47.365578 start: 1.6.8.1 prepare-fit (timeout 00:09:52) [common]
240 09:55:47.365652 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/kernel/Image']
241 09:56:00.603900 Returned 0 in 13 seconds
242 09:56:00.704771 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/kernel/image.itb
243 09:56:01.182693 output: FIT description: Kernel Image image with one or more FDT blobs
244 09:56:01.182833 output: Created: Tue Jun 18 10:56:01 2024
245 09:56:01.182901 output: Image 0 (kernel-1)
246 09:56:01.182964 output: Description:
247 09:56:01.183024 output: Created: Tue Jun 18 10:56:01 2024
248 09:56:01.183084 output: Type: Kernel Image
249 09:56:01.183142 output: Compression: lzma compressed
250 09:56:01.183201 output: Data Size: 13126726 Bytes = 12819.07 KiB = 12.52 MiB
251 09:56:01.183258 output: Architecture: AArch64
252 09:56:01.183311 output: OS: Linux
253 09:56:01.183362 output: Load Address: 0x00000000
254 09:56:01.183413 output: Entry Point: 0x00000000
255 09:56:01.183461 output: Hash algo: crc32
256 09:56:01.183512 output: Hash value: 4137a6e7
257 09:56:01.183562 output: Image 1 (fdt-1)
258 09:56:01.183610 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 09:56:01.183659 output: Created: Tue Jun 18 10:56:01 2024
260 09:56:01.183709 output: Type: Flat Device Tree
261 09:56:01.183757 output: Compression: uncompressed
262 09:56:01.183804 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 09:56:01.183854 output: Architecture: AArch64
264 09:56:01.183902 output: Hash algo: crc32
265 09:56:01.183970 output: Hash value: a9713552
266 09:56:01.184021 output: Image 2 (ramdisk-1)
267 09:56:01.184072 output: Description: unavailable
268 09:56:01.184120 output: Created: Tue Jun 18 10:56:01 2024
269 09:56:01.184170 output: Type: RAMDisk Image
270 09:56:01.184220 output: Compression: uncompressed
271 09:56:01.184268 output: Data Size: 18742690 Bytes = 18303.41 KiB = 17.87 MiB
272 09:56:01.184317 output: Architecture: AArch64
273 09:56:01.184365 output: OS: Linux
274 09:56:01.184413 output: Load Address: unavailable
275 09:56:01.184461 output: Entry Point: unavailable
276 09:56:01.184508 output: Hash algo: crc32
277 09:56:01.184554 output: Hash value: 5fad2df0
278 09:56:01.184601 output: Default Configuration: 'conf-1'
279 09:56:01.184649 output: Configuration 0 (conf-1)
280 09:56:01.184697 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 09:56:01.184744 output: Kernel: kernel-1
282 09:56:01.184791 output: Init Ramdisk: ramdisk-1
283 09:56:01.184838 output: FDT: fdt-1
284 09:56:01.184885 output: Loadables: kernel-1
285 09:56:01.184932 output:
286 09:56:01.185065 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
287 09:56:01.185155 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
288 09:56:01.185245 end: 1.6 prepare-tftp-overlay (duration 00:00:18) [common]
289 09:56:01.185326 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:38) [common]
290 09:56:01.185395 No LXC device requested
291 09:56:01.185463 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 09:56:01.185539 start: 1.8 deploy-device-env (timeout 00:09:38) [common]
293 09:56:01.185609 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 09:56:01.185670 Checking files for TFTP limit of 4294967296 bytes.
295 09:56:01.186115 end: 1 tftp-deploy (duration 00:00:22) [common]
296 09:56:01.186255 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 09:56:01.186355 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 09:56:01.186467 substitutions:
299 09:56:01.186528 - {DTB}: 14407613/tftp-deploy-rfubl4mt/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 09:56:01.186585 - {INITRD}: 14407613/tftp-deploy-rfubl4mt/ramdisk/ramdisk.cpio.gz
301 09:56:01.186637 - {KERNEL}: 14407613/tftp-deploy-rfubl4mt/kernel/Image
302 09:56:01.186691 - {LAVA_MAC}: None
303 09:56:01.186741 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq
304 09:56:01.186790 - {NFS_SERVER_IP}: 192.168.201.1
305 09:56:01.186839 - {PRESEED_CONFIG}: None
306 09:56:01.186893 - {PRESEED_LOCAL}: None
307 09:56:01.186942 - {RAMDISK}: 14407613/tftp-deploy-rfubl4mt/ramdisk/ramdisk.cpio.gz
308 09:56:01.186991 - {ROOT_PART}: None
309 09:56:01.187039 - {ROOT}: None
310 09:56:01.187087 - {SERVER_IP}: 192.168.201.1
311 09:56:01.187135 - {TEE}: None
312 09:56:01.187182 Parsed boot commands:
313 09:56:01.187230 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 09:56:01.187377 Parsed boot commands: tftpboot 192.168.201.1 14407613/tftp-deploy-rfubl4mt/kernel/image.itb 14407613/tftp-deploy-rfubl4mt/kernel/cmdline
315 09:56:01.187460 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 09:56:01.187536 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 09:56:01.187615 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 09:56:01.187691 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 09:56:01.187753 Not connected, no need to disconnect.
320 09:56:01.187819 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 09:56:01.187892 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 09:56:01.187951 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
323 09:56:01.191362 Setting prompt string to ['lava-test: # ']
324 09:56:01.191674 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 09:56:01.191769 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 09:56:01.191862 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 09:56:01.191942 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 09:56:01.192120 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
329 09:56:10.386572 >> Command sent successfully.
330 09:56:10.401725 Returned 0 in 9 seconds
331 09:56:10.502991 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
333 09:56:10.504460 end: 2.2.2 reset-device (duration 00:00:09) [common]
334 09:56:10.504992 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
335 09:56:10.505493 Setting prompt string to 'Starting depthcharge on Juniper...'
336 09:56:10.505870 Changing prompt to 'Starting depthcharge on Juniper...'
337 09:56:10.506263 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
338 09:56:10.508037 [Enter `^Ec?' for help]
339 09:56:16.932125 [DL] 00000000 00000000 010701
340 09:56:16.937117
341 09:56:16.937648
342 09:56:16.938013 F0: 102B 0000
343 09:56:16.938388
344 09:56:16.938696 F3: 1006 0033 [0200]
345 09:56:16.940291
346 09:56:16.940719 F3: 4001 00E0 [0200]
347 09:56:16.941062
348 09:56:16.941383 F3: 0000 0000
349 09:56:16.943711
350 09:56:16.944224 V0: 0000 0000 [0001]
351 09:56:16.944578
352 09:56:16.944886 00: 1027 0002
353 09:56:16.945192
354 09:56:16.946837 01: 0000 0000
355 09:56:16.947297
356 09:56:16.947649 BP: 0C00 0251 [0000]
357 09:56:16.947973
358 09:56:16.950423 G0: 1182 0000
359 09:56:16.950968
360 09:56:16.951444 EC: 0004 0000 [0001]
361 09:56:16.951777
362 09:56:16.953524 S7: 0000 0000 [0000]
363 09:56:16.953956
364 09:56:16.954346 CC: 0000 0000 [0001]
365 09:56:16.956919
366 09:56:16.957370 T0: 0000 00DB [000F]
367 09:56:16.957714
368 09:56:16.958023 Jump to BL
369 09:56:16.958353
370 09:56:16.993257
371 09:56:16.993769
372 09:56:16.999542 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
373 09:56:17.002855 ARM64: Exception handlers installed.
374 09:56:17.006497 ARM64: Testing exception
375 09:56:17.009827 ARM64: Done test exception
376 09:56:17.013649 WDT: Last reset was cold boot
377 09:56:17.014408 SPI0(PAD0) initialized at 992727 Hz
378 09:56:17.020106 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
379 09:56:17.020639 Manufacturer: ef
380 09:56:17.026876 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
381 09:56:17.039873 Probing TPM: . done!
382 09:56:17.040389 TPM ready after 0 ms
383 09:56:17.046641 Connected to device vid:did:rid of 1ae0:0028:00
384 09:56:17.053261 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
385 09:56:17.056914 Initialized TPM device CR50 revision 0
386 09:56:17.098797 tlcl_send_startup: Startup return code is 0
387 09:56:17.099333 TPM: setup succeeded
388 09:56:17.107947 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
389 09:56:17.111156 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
390 09:56:17.114573 in-header: 03 19 00 00 08 00 00 00
391 09:56:17.118034 in-data: a2 e0 47 00 13 00 00 00
392 09:56:17.121146 Chrome EC: UHEPI supported
393 09:56:17.127459 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
394 09:56:17.131097 in-header: 03 a1 00 00 08 00 00 00
395 09:56:17.134443 in-data: 84 60 60 10 00 00 00 00
396 09:56:17.134893 Phase 1
397 09:56:17.137918 FMAP: area GBB found @ 3f5000 (12032 bytes)
398 09:56:17.144547 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 09:56:17.151179 VB2:vb2_check_recovery() Recovery was requested manually
400 09:56:17.154467 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
401 09:56:17.160433 Recovery requested (1009000e)
402 09:56:17.169269 tlcl_extend: response is 0
403 09:56:17.174843 tlcl_extend: response is 0
404 09:56:17.199436
405 09:56:17.199957
406 09:56:17.206368 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
407 09:56:17.209825 ARM64: Exception handlers installed.
408 09:56:17.212800 ARM64: Testing exception
409 09:56:17.216548 ARM64: Done test exception
410 09:56:17.232324 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2030
411 09:56:17.238369 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
412 09:56:17.241896 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
413 09:56:17.250430 [RTC]rtc_get_frequency_meter,134: input=0xf, output=779
414 09:56:17.256992 [RTC]rtc_get_frequency_meter,134: input=0x17, output=960
415 09:56:17.263922 [RTC]rtc_get_frequency_meter,134: input=0x13, output=868
416 09:56:17.271141 [RTC]rtc_get_frequency_meter,134: input=0x11, output=823
417 09:56:17.278037 [RTC]rtc_get_frequency_meter,134: input=0x10, output=800
418 09:56:17.284899 [RTC]rtc_get_frequency_meter,134: input=0xf, output=778
419 09:56:17.292150 [RTC]rtc_get_frequency_meter,134: input=0x10, output=801
420 09:56:17.295390 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa70
421 09:56:17.301776 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
422 09:56:17.305588 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
423 09:56:17.308749 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
424 09:56:17.312317 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
425 09:56:17.316075 in-header: 03 19 00 00 08 00 00 00
426 09:56:17.319193 in-data: a2 e0 47 00 13 00 00 00
427 09:56:17.322543 Chrome EC: UHEPI supported
428 09:56:17.329007 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
429 09:56:17.332274 in-header: 03 a1 00 00 08 00 00 00
430 09:56:17.335653 in-data: 84 60 60 10 00 00 00 00
431 09:56:17.338817 Skip loading cached calibration data
432 09:56:17.345664 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
433 09:56:17.348995 in-header: 03 a1 00 00 08 00 00 00
434 09:56:17.352535 in-data: 84 60 60 10 00 00 00 00
435 09:56:17.359108 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
436 09:56:17.362324 in-header: 03 a1 00 00 08 00 00 00
437 09:56:17.365988 in-data: 84 60 60 10 00 00 00 00
438 09:56:17.369404 ADC[3]: Raw value=1041369 ID=8
439 09:56:17.369932 Manufacturer: ef
440 09:56:17.375806 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
441 09:56:17.379110 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
442 09:56:17.382972 CBFS @ 21000 size 3d4000
443 09:56:17.385699 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
444 09:56:17.392806 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
445 09:56:17.396007 CBFS: Found @ offset 3c880 size 4b
446 09:56:17.396518 DRAM-K: Full Calibration
447 09:56:17.402714 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
448 09:56:17.403230 CBFS @ 21000 size 3d4000
449 09:56:17.409739 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
450 09:56:17.412813 CBFS: Locating 'fallback/dram'
451 09:56:17.416033 CBFS: Found @ offset 24b00 size 12268
452 09:56:17.443620 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
453 09:56:17.446870 ddr_geometry: 1, config: 0x0
454 09:56:17.450192 header.status = 0x0
455 09:56:17.453608 header.magic = 0x44524d4b (expected: 0x44524d4b)
456 09:56:17.456877 header.version = 0x5 (expected: 0x5)
457 09:56:17.460292 header.size = 0x8f0 (expected: 0x8f0)
458 09:56:17.460726 header.config = 0x0
459 09:56:17.463626 header.flags = 0x0
460 09:56:17.464135 header.checksum = 0x0
461 09:56:17.469991 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
462 09:56:17.477613 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
463 09:56:17.480264 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
464 09:56:17.483895 ddr_geometry:1
465 09:56:17.484427 [EMI] new MDL number = 1
466 09:56:17.487042 dram_cbt_mode_extern: 0
467 09:56:17.490334 dram_cbt_mode [RK0]: 0, [RK1]: 0
468 09:56:17.497211 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
469 09:56:17.497883
470 09:56:17.498466
471 09:56:17.498844 [Bianco] ETT version 0.0.0.1
472 09:56:17.503978 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
473 09:56:17.504486
474 09:56:17.507608 vSetVcoreByFreq with vcore:762500, freq=1600
475 09:56:17.508041
476 09:56:17.508394 [DramcInit]
477 09:56:17.510435 AutoRefreshCKEOff AutoREF OFF
478 09:56:17.513710 DDRPhyPLLSetting-CKEOFF
479 09:56:17.514334 DDRPhyPLLSetting-CKEON
480 09:56:17.517249
481 09:56:17.517679 Enable WDQS
482 09:56:17.520502 [ModeRegInit_LP4] CH0 RK0
483 09:56:17.523972 Write Rank0 MR13 =0x18
484 09:56:17.524452 Write Rank0 MR12 =0x5d
485 09:56:17.527217 Write Rank0 MR1 =0x56
486 09:56:17.530914 Write Rank0 MR2 =0x1a
487 09:56:17.531426 Write Rank0 MR11 =0x0
488 09:56:17.533848 Write Rank0 MR22 =0x38
489 09:56:17.534334 Write Rank0 MR14 =0x5d
490 09:56:17.537303 Write Rank0 MR3 =0x30
491 09:56:17.540901 Write Rank0 MR13 =0x58
492 09:56:17.541409 Write Rank0 MR12 =0x5d
493 09:56:17.544095 Write Rank0 MR1 =0x56
494 09:56:17.544568 Write Rank0 MR2 =0x2d
495 09:56:17.547368 Write Rank0 MR11 =0x23
496 09:56:17.550754 Write Rank0 MR22 =0x34
497 09:56:17.551186 Write Rank0 MR14 =0x10
498 09:56:17.554548 Write Rank0 MR3 =0x30
499 09:56:17.555063 Write Rank0 MR13 =0xd8
500 09:56:17.557565 [ModeRegInit_LP4] CH0 RK1
501 09:56:17.560932 Write Rank1 MR13 =0x18
502 09:56:17.561467 Write Rank1 MR12 =0x5d
503 09:56:17.564402 Write Rank1 MR1 =0x56
504 09:56:17.567633 Write Rank1 MR2 =0x1a
505 09:56:17.568067 Write Rank1 MR11 =0x0
506 09:56:17.570751 Write Rank1 MR22 =0x38
507 09:56:17.571198 Write Rank1 MR14 =0x5d
508 09:56:17.574398 Write Rank1 MR3 =0x30
509 09:56:17.577851 Write Rank1 MR13 =0x58
510 09:56:17.578412 Write Rank1 MR12 =0x5d
511 09:56:17.581102 Write Rank1 MR1 =0x56
512 09:56:17.581610 Write Rank1 MR2 =0x2d
513 09:56:17.584665 Write Rank1 MR11 =0x23
514 09:56:17.587933 Write Rank1 MR22 =0x34
515 09:56:17.588458 Write Rank1 MR14 =0x10
516 09:56:17.591390 Write Rank1 MR3 =0x30
517 09:56:17.591899 Write Rank1 MR13 =0xd8
518 09:56:17.594759 [ModeRegInit_LP4] CH1 RK0
519 09:56:17.598157 Write Rank0 MR13 =0x18
520 09:56:17.598719 Write Rank0 MR12 =0x5d
521 09:56:17.601280 Write Rank0 MR1 =0x56
522 09:56:17.604621 Write Rank0 MR2 =0x1a
523 09:56:17.605053 Write Rank0 MR11 =0x0
524 09:56:17.607890 Write Rank0 MR22 =0x38
525 09:56:17.608321 Write Rank0 MR14 =0x5d
526 09:56:17.611611 Write Rank0 MR3 =0x30
527 09:56:17.614830 Write Rank0 MR13 =0x58
528 09:56:17.615334 Write Rank0 MR12 =0x5d
529 09:56:17.618348 Write Rank0 MR1 =0x56
530 09:56:17.618781 Write Rank0 MR2 =0x2d
531 09:56:17.621431 Write Rank0 MR11 =0x23
532 09:56:17.624884 Write Rank0 MR22 =0x34
533 09:56:17.625508 Write Rank0 MR14 =0x10
534 09:56:17.628199 Write Rank0 MR3 =0x30
535 09:56:17.628637 Write Rank0 MR13 =0xd8
536 09:56:17.631482 [ModeRegInit_LP4] CH1 RK1
537 09:56:17.635087 Write Rank1 MR13 =0x18
538 09:56:17.635516 Write Rank1 MR12 =0x5d
539 09:56:17.638691 Write Rank1 MR1 =0x56
540 09:56:17.639121 Write Rank1 MR2 =0x1a
541 09:56:17.641719 Write Rank1 MR11 =0x0
542 09:56:17.644978 Write Rank1 MR22 =0x38
543 09:56:17.645412 Write Rank1 MR14 =0x5d
544 09:56:17.648228 Write Rank1 MR3 =0x30
545 09:56:17.651623 Write Rank1 MR13 =0x58
546 09:56:17.652061 Write Rank1 MR12 =0x5d
547 09:56:17.654939 Write Rank1 MR1 =0x56
548 09:56:17.655372 Write Rank1 MR2 =0x2d
549 09:56:17.658590 Write Rank1 MR11 =0x23
550 09:56:17.661997 Write Rank1 MR22 =0x34
551 09:56:17.662547 Write Rank1 MR14 =0x10
552 09:56:17.665615 Write Rank1 MR3 =0x30
553 09:56:17.666270 Write Rank1 MR13 =0xd8
554 09:56:17.668763 match AC timing 3
555 09:56:17.678827 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
556 09:56:17.679354 [MiockJmeterHQA]
557 09:56:17.682041 vSetVcoreByFreq with vcore:762500, freq=1600
558 09:56:17.786850
559 09:56:17.787439 MIOCK jitter meter ch=0
560 09:56:17.787786
561 09:56:17.790125 1T = (100-18) = 82 dly cells
562 09:56:17.796770 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
563 09:56:17.800052 vSetVcoreByFreq with vcore:725000, freq=1200
564 09:56:17.898290
565 09:56:17.898816 MIOCK jitter meter ch=0
566 09:56:17.899225
567 09:56:17.901262 1T = (95-16) = 79 dly cells
568 09:56:17.908412 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
569 09:56:17.911520 vSetVcoreByFreq with vcore:725000, freq=800
570 09:56:18.009774
571 09:56:18.010338 MIOCK jitter meter ch=0
572 09:56:18.010679
573 09:56:18.013009 1T = (95-16) = 79 dly cells
574 09:56:18.019631 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
575 09:56:18.022810 vSetVcoreByFreq with vcore:762500, freq=1600
576 09:56:18.026240 vSetVcoreByFreq with vcore:762500, freq=1600
577 09:56:18.026700
578 09:56:18.027155 K DRVP
579 09:56:18.029370 1. OCD DRVP=0 CALOUT=0
580 09:56:18.032891 1. OCD DRVP=1 CALOUT=0
581 09:56:18.033418 1. OCD DRVP=2 CALOUT=0
582 09:56:18.036225 1. OCD DRVP=3 CALOUT=0
583 09:56:18.036752 1. OCD DRVP=4 CALOUT=0
584 09:56:18.039672 1. OCD DRVP=5 CALOUT=0
585 09:56:18.042997 1. OCD DRVP=6 CALOUT=0
586 09:56:18.043520 1. OCD DRVP=7 CALOUT=0
587 09:56:18.046618 1. OCD DRVP=8 CALOUT=1
588 09:56:18.047139
589 09:56:18.049696 1. OCD DRVP calibration OK! DRVP=8
590 09:56:18.050253
591 09:56:18.050607
592 09:56:18.050917
593 09:56:18.051211 K ODTN
594 09:56:18.053140 3. OCD ODTN=0 ,CALOUT=1
595 09:56:18.056636 3. OCD ODTN=1 ,CALOUT=1
596 09:56:18.057160 3. OCD ODTN=2 ,CALOUT=1
597 09:56:18.059876 3. OCD ODTN=3 ,CALOUT=1
598 09:56:18.060401 3. OCD ODTN=4 ,CALOUT=1
599 09:56:18.063025 3. OCD ODTN=5 ,CALOUT=1
600 09:56:18.066774 3. OCD ODTN=6 ,CALOUT=1
601 09:56:18.067299 3. OCD ODTN=7 ,CALOUT=0
602 09:56:18.067646
603 09:56:18.069963 3. OCD ODTN calibration OK! ODTN=7
604 09:56:18.070533
605 09:56:18.073272 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
606 09:56:18.079836 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
607 09:56:18.083561 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
608 09:56:18.084082
609 09:56:18.084419 K DRVP
610 09:56:18.086419 1. OCD DRVP=0 CALOUT=0
611 09:56:18.089919 1. OCD DRVP=1 CALOUT=0
612 09:56:18.090489 1. OCD DRVP=2 CALOUT=0
613 09:56:18.093285 1. OCD DRVP=3 CALOUT=0
614 09:56:18.096746 1. OCD DRVP=4 CALOUT=0
615 09:56:18.097267 1. OCD DRVP=5 CALOUT=0
616 09:56:18.099951 1. OCD DRVP=6 CALOUT=0
617 09:56:18.100386 1. OCD DRVP=7 CALOUT=0
618 09:56:18.103116 1. OCD DRVP=8 CALOUT=0
619 09:56:18.106773 1. OCD DRVP=9 CALOUT=1
620 09:56:18.107317
621 09:56:18.109997 1. OCD DRVP calibration OK! DRVP=9
622 09:56:18.110586
623 09:56:18.110931
624 09:56:18.111238
625 09:56:18.111536 K ODTN
626 09:56:18.113481 3. OCD ODTN=0 ,CALOUT=1
627 09:56:18.114007 3. OCD ODTN=1 ,CALOUT=1
628 09:56:18.116768 3. OCD ODTN=2 ,CALOUT=1
629 09:56:18.119879 3. OCD ODTN=3 ,CALOUT=1
630 09:56:18.120321 3. OCD ODTN=4 ,CALOUT=1
631 09:56:18.123306 3. OCD ODTN=5 ,CALOUT=1
632 09:56:18.123747 3. OCD ODTN=6 ,CALOUT=1
633 09:56:18.126727 3. OCD ODTN=7 ,CALOUT=1
634 09:56:18.130181 3. OCD ODTN=8 ,CALOUT=1
635 09:56:18.130656 3. OCD ODTN=9 ,CALOUT=1
636 09:56:18.133787 3. OCD ODTN=10 ,CALOUT=1
637 09:56:18.136975 3. OCD ODTN=11 ,CALOUT=1
638 09:56:18.137519 3. OCD ODTN=12 ,CALOUT=1
639 09:56:18.140355 3. OCD ODTN=13 ,CALOUT=0
640 09:56:18.140878
641 09:56:18.143408 3. OCD ODTN calibration OK! ODTN=13
642 09:56:18.143919
643 09:56:18.146927 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=13
644 09:56:18.150633 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13
645 09:56:18.157388 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13 (After Adjust)
646 09:56:18.157901
647 09:56:18.158268 [DramcInit]
648 09:56:18.160662 AutoRefreshCKEOff AutoREF OFF
649 09:56:18.164355 DDRPhyPLLSetting-CKEOFF
650 09:56:18.164859 DDRPhyPLLSetting-CKEON
651 09:56:18.165191
652 09:56:18.167360 Enable WDQS
653 09:56:18.167863 ==
654 09:56:18.170472 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
655 09:56:18.174035 fsp= 1, odt_onoff= 1, Byte mode= 0
656 09:56:18.174600 ==
657 09:56:18.177401 [Duty_Offset_Calibration]
658 09:56:18.177904
659 09:56:18.180712 ===========================
660 09:56:18.181221 B0:1 B1:0 CA:0
661 09:56:18.204101 ==
662 09:56:18.207272 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
663 09:56:18.210600 fsp= 1, odt_onoff= 1, Byte mode= 0
664 09:56:18.211111 ==
665 09:56:18.213854 [Duty_Offset_Calibration]
666 09:56:18.214454
667 09:56:18.217121 ===========================
668 09:56:18.217626 B0:1 B1:0 CA:-1
669 09:56:18.250599 [ModeRegInit_LP4] CH0 RK0
670 09:56:18.253809 Write Rank0 MR13 =0x18
671 09:56:18.254396 Write Rank0 MR12 =0x5d
672 09:56:18.257253 Write Rank0 MR1 =0x56
673 09:56:18.260536 Write Rank0 MR2 =0x1a
674 09:56:18.261056 Write Rank0 MR11 =0x0
675 09:56:18.263883 Write Rank0 MR22 =0x38
676 09:56:18.264390 Write Rank0 MR14 =0x5d
677 09:56:18.267058 Write Rank0 MR3 =0x30
678 09:56:18.270394 Write Rank0 MR13 =0x58
679 09:56:18.270779 Write Rank0 MR12 =0x5d
680 09:56:18.273955 Write Rank0 MR1 =0x56
681 09:56:18.274530 Write Rank0 MR2 =0x2d
682 09:56:18.277335 Write Rank0 MR11 =0x23
683 09:56:18.280760 Write Rank0 MR22 =0x34
684 09:56:18.281268 Write Rank0 MR14 =0x10
685 09:56:18.283991 Write Rank0 MR3 =0x30
686 09:56:18.287165 Write Rank0 MR13 =0xd8
687 09:56:18.287672 [ModeRegInit_LP4] CH0 RK1
688 09:56:18.290397 Write Rank1 MR13 =0x18
689 09:56:18.290829 Write Rank1 MR12 =0x5d
690 09:56:18.294188 Write Rank1 MR1 =0x56
691 09:56:18.297386 Write Rank1 MR2 =0x1a
692 09:56:18.297896 Write Rank1 MR11 =0x0
693 09:56:18.300736 Write Rank1 MR22 =0x38
694 09:56:18.301162 Write Rank1 MR14 =0x5d
695 09:56:18.303871 Write Rank1 MR3 =0x30
696 09:56:18.307237 Write Rank1 MR13 =0x58
697 09:56:18.307664 Write Rank1 MR12 =0x5d
698 09:56:18.310595 Write Rank1 MR1 =0x56
699 09:56:18.311148 Write Rank1 MR2 =0x2d
700 09:56:18.314181 Write Rank1 MR11 =0x23
701 09:56:18.317696 Write Rank1 MR22 =0x34
702 09:56:18.318254 Write Rank1 MR14 =0x10
703 09:56:18.320606 Write Rank1 MR3 =0x30
704 09:56:18.321028 Write Rank1 MR13 =0xd8
705 09:56:18.324120 [ModeRegInit_LP4] CH1 RK0
706 09:56:18.327603 Write Rank0 MR13 =0x18
707 09:56:18.328053 Write Rank0 MR12 =0x5d
708 09:56:18.330923 Write Rank0 MR1 =0x56
709 09:56:18.334353 Write Rank0 MR2 =0x1a
710 09:56:18.334905 Write Rank0 MR11 =0x0
711 09:56:18.337798 Write Rank0 MR22 =0x38
712 09:56:18.338369 Write Rank0 MR14 =0x5d
713 09:56:18.341240 Write Rank0 MR3 =0x30
714 09:56:18.344303 Write Rank0 MR13 =0x58
715 09:56:18.344732 Write Rank0 MR12 =0x5d
716 09:56:18.348047 Write Rank0 MR1 =0x56
717 09:56:18.348553 Write Rank0 MR2 =0x2d
718 09:56:18.351104 Write Rank0 MR11 =0x23
719 09:56:18.354363 Write Rank0 MR22 =0x34
720 09:56:18.354867 Write Rank0 MR14 =0x10
721 09:56:18.357848 Write Rank0 MR3 =0x30
722 09:56:18.358486 Write Rank0 MR13 =0xd8
723 09:56:18.361298 [ModeRegInit_LP4] CH1 RK1
724 09:56:18.364755 Write Rank1 MR13 =0x18
725 09:56:18.365239 Write Rank1 MR12 =0x5d
726 09:56:18.368024 Write Rank1 MR1 =0x56
727 09:56:18.371375 Write Rank1 MR2 =0x1a
728 09:56:18.371900 Write Rank1 MR11 =0x0
729 09:56:18.374756 Write Rank1 MR22 =0x38
730 09:56:18.375279 Write Rank1 MR14 =0x5d
731 09:56:18.377871 Write Rank1 MR3 =0x30
732 09:56:18.381569 Write Rank1 MR13 =0x58
733 09:56:18.382259 Write Rank1 MR12 =0x5d
734 09:56:18.384678 Write Rank1 MR1 =0x56
735 09:56:18.385181 Write Rank1 MR2 =0x2d
736 09:56:18.387886 Write Rank1 MR11 =0x23
737 09:56:18.391599 Write Rank1 MR22 =0x34
738 09:56:18.392106 Write Rank1 MR14 =0x10
739 09:56:18.394728 Write Rank1 MR3 =0x30
740 09:56:18.395151 Write Rank1 MR13 =0xd8
741 09:56:18.398272 match AC timing 3
742 09:56:18.408258 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
743 09:56:18.408779 DramC Write-DBI off
744 09:56:18.411595 DramC Read-DBI off
745 09:56:18.412022 Write Rank0 MR13 =0x59
746 09:56:18.415099 ==
747 09:56:18.418276 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
748 09:56:18.421982 fsp= 1, odt_onoff= 1, Byte mode= 0
749 09:56:18.422556 ==
750 09:56:18.425240 === u2Vref_new: 0x56 --> 0x2d
751 09:56:18.428535 === u2Vref_new: 0x58 --> 0x38
752 09:56:18.431579 === u2Vref_new: 0x5a --> 0x39
753 09:56:18.435227 === u2Vref_new: 0x5c --> 0x3c
754 09:56:18.435740 === u2Vref_new: 0x5e --> 0x3d
755 09:56:18.438722 === u2Vref_new: 0x60 --> 0xa0
756 09:56:18.442244 [CA 0] Center 34 (5~63) winsize 59
757 09:56:18.445291 [CA 1] Center 34 (6~63) winsize 58
758 09:56:18.448809 [CA 2] Center 27 (-1~56) winsize 58
759 09:56:18.452184 [CA 3] Center 23 (-4~51) winsize 56
760 09:56:18.455554 [CA 4] Center 24 (-3~51) winsize 55
761 09:56:18.458635 [CA 5] Center 28 (-1~58) winsize 60
762 09:56:18.459073
763 09:56:18.462009 [CATrainingPosCal] consider 1 rank data
764 09:56:18.465437 u2DelayCellTimex100 = 762/100 ps
765 09:56:18.468854 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
766 09:56:18.472393 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
767 09:56:18.476215 CA2 delay=27 (-1~56),Diff = 4 PI (5 cell)
768 09:56:18.482541 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
769 09:56:18.485826 CA4 delay=24 (-3~51),Diff = 1 PI (1 cell)
770 09:56:18.489039 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
771 09:56:18.489466
772 09:56:18.492901 CA PerBit enable=1, Macro0, CA PI delay=23
773 09:56:18.495952 === u2Vref_new: 0x56 --> 0x2d
774 09:56:18.496489
775 09:56:18.496833 Vref(ca) range 1: 22
776 09:56:18.497146
777 09:56:18.499627 CS Dly= 10 (41-0-32)
778 09:56:18.502529 Write Rank0 MR13 =0xd8
779 09:56:18.502981 Write Rank0 MR13 =0xd8
780 09:56:18.505895 Write Rank0 MR12 =0x56
781 09:56:18.506346 Write Rank1 MR13 =0x59
782 09:56:18.509606 ==
783 09:56:18.512864 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
784 09:56:18.516337 fsp= 1, odt_onoff= 1, Byte mode= 0
785 09:56:18.516769 ==
786 09:56:18.519555 === u2Vref_new: 0x56 --> 0x2d
787 09:56:18.523184 === u2Vref_new: 0x58 --> 0x38
788 09:56:18.526268 === u2Vref_new: 0x5a --> 0x39
789 09:56:18.529177 === u2Vref_new: 0x5c --> 0x3c
790 09:56:18.529803 === u2Vref_new: 0x5e --> 0x3d
791 09:56:18.533164 === u2Vref_new: 0x60 --> 0xa0
792 09:56:18.536908 [CA 0] Center 34 (5~63) winsize 59
793 09:56:18.540162 [CA 1] Center 34 (5~63) winsize 59
794 09:56:18.543100 [CA 2] Center 28 (0~56) winsize 57
795 09:56:18.546914 [CA 3] Center 24 (-4~52) winsize 57
796 09:56:18.549905 [CA 4] Center 24 (-3~52) winsize 56
797 09:56:18.553485 [CA 5] Center 29 (1~58) winsize 58
798 09:56:18.553991
799 09:56:18.556805 [CATrainingPosCal] consider 2 rank data
800 09:56:18.559838 u2DelayCellTimex100 = 762/100 ps
801 09:56:18.563467 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
802 09:56:18.566883 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
803 09:56:18.570204 CA2 delay=28 (0~56),Diff = 5 PI (6 cell)
804 09:56:18.573463 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
805 09:56:18.580325 CA4 delay=24 (-3~51),Diff = 1 PI (1 cell)
806 09:56:18.583785 CA5 delay=29 (1~58),Diff = 6 PI (7 cell)
807 09:56:18.584296
808 09:56:18.586773 CA PerBit enable=1, Macro0, CA PI delay=23
809 09:56:18.590416 === u2Vref_new: 0x56 --> 0x2d
810 09:56:18.590920
811 09:56:18.591257 Vref(ca) range 1: 22
812 09:56:18.591569
813 09:56:18.593996 CS Dly= 7 (38-0-32)
814 09:56:18.594564 Write Rank1 MR13 =0xd8
815 09:56:18.597176 Write Rank1 MR13 =0xd8
816 09:56:18.600158 Write Rank1 MR12 =0x56
817 09:56:18.603800 [RankSwap] Rank num 2, (Multi 1), Rank 0
818 09:56:18.604231 Write Rank0 MR2 =0xad
819 09:56:18.607195 [Write Leveling]
820 09:56:18.610850 delay byte0 byte1 byte2 byte3
821 09:56:18.611355
822 09:56:18.611688 10 0 0
823 09:56:18.613893 11 0 0
824 09:56:18.614447 12 0 0
825 09:56:18.614794 13 0 0
826 09:56:18.617487 14 0 0
827 09:56:18.618172 15 0 0
828 09:56:18.620746 16 0 0
829 09:56:18.621181 17 0 0
830 09:56:18.621519 18 0 0
831 09:56:18.624091 19 0 0
832 09:56:18.624601 20 0 0
833 09:56:18.627687 21 0 0
834 09:56:18.628203 22 0 0
835 09:56:18.628544 23 0 0
836 09:56:18.630638 24 0 0
837 09:56:18.631148 25 0 0
838 09:56:18.633794 26 0 ff
839 09:56:18.634261 27 0 0
840 09:56:18.637711 28 0 ff
841 09:56:18.638275 29 0 ff
842 09:56:18.638637 30 0 ff
843 09:56:18.640724 31 0 ff
844 09:56:18.641237 32 0 ff
845 09:56:18.644039 33 ff ff
846 09:56:18.644477 34 ff ff
847 09:56:18.647593 35 ff ff
848 09:56:18.648103 36 ff ff
849 09:56:18.650833 37 ff ff
850 09:56:18.651266 38 ff ff
851 09:56:18.651609 39 ff ff
852 09:56:18.657983 pass bytecount = 0xff (0xff: all bytes pass)
853 09:56:18.658556
854 09:56:18.658893 DQS0 dly: 33
855 09:56:18.659196 DQS1 dly: 28
856 09:56:18.660874 Write Rank0 MR2 =0x2d
857 09:56:18.664479 [RankSwap] Rank num 2, (Multi 1), Rank 0
858 09:56:18.667659 Write Rank0 MR1 =0xd6
859 09:56:18.668327 [Gating]
860 09:56:18.668669 ==
861 09:56:18.674393 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
862 09:56:18.674936 fsp= 1, odt_onoff= 1, Byte mode= 0
863 09:56:18.677601 ==
864 09:56:18.681017 3 1 0 |3534 2f2f |(11 11)(11 11) |(1 1)(1 1)| 0
865 09:56:18.684447 3 1 4 |3534 1615 |(11 11)(11 11) |(1 1)(1 1)| 0
866 09:56:18.687910 3 1 8 |3534 3635 |(11 11)(11 11) |(0 0)(0 1)| 0
867 09:56:18.694919 3 1 12 |3534 3535 |(11 11)(11 11) |(0 0)(0 1)| 0
868 09:56:18.697737 3 1 16 |3534 504 |(11 11)(11 11) |(0 0)(0 1)| 0
869 09:56:18.701191 3 1 20 |3534 2b2b |(11 11)(11 11) |(0 0)(0 1)| 0
870 09:56:18.708031 3 1 24 |3534 3434 |(11 11)(11 11) |(0 1)(1 0)| 0
871 09:56:18.711213 3 1 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
872 09:56:18.714551 3 2 0 |403 504 |(11 11)(11 11) |(1 1)(0 1)| 0
873 09:56:18.718057 3 2 4 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
874 09:56:18.724788 3 2 8 |3d3d 3939 |(11 11)(11 11) |(1 1)(1 1)| 0
875 09:56:18.728253 3 2 12 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
876 09:56:18.731797 3 2 16 |3d3d 1716 |(11 11)(11 11) |(1 1)(1 1)| 0
877 09:56:18.738442 3 2 20 |3d3d 3c3c |(11 11)(0 0) |(1 1)(1 1)| 0
878 09:56:18.741749 3 2 24 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
879 09:56:18.745447 3 2 28 |3d3d 2c2c |(11 11)(11 11) |(1 1)(1 1)| 0
880 09:56:18.748828 3 3 0 |3d3d 3c3c |(11 11)(0 0) |(1 1)(1 1)| 0
881 09:56:18.755358 3 3 4 |3d3d 303 |(11 11)(11 11) |(1 1)(1 1)| 0
882 09:56:18.758565 3 3 8 |403 b0b |(11 11)(11 11) |(1 1)(1 1)| 0
883 09:56:18.762066 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
884 09:56:18.765484 [Byte 0] Lead/lag Transition tap number (1)
885 09:56:18.772576 [Byte 1] Lead/lag falling Transition (3, 3, 12)
886 09:56:18.775659 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
887 09:56:18.779029 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
888 09:56:18.782079 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
889 09:56:18.788862 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
890 09:56:18.792232 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
891 09:56:18.795811 3 4 4 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
892 09:56:18.802289 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
893 09:56:18.806041 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
894 09:56:18.809225 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 09:56:18.812605 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 09:56:18.819378 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 09:56:18.822416 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 09:56:18.825785 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 09:56:18.832711 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 09:56:18.836183 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 09:56:18.839167 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 09:56:18.846174 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 09:56:18.849790 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 09:56:18.852660 [Byte 0] Lead/lag falling Transition (3, 5, 20)
905 09:56:18.856080 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
906 09:56:18.863012 [Byte 1] Lead/lag falling Transition (3, 5, 24)
907 09:56:18.866251 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
908 09:56:18.869902 [Byte 0] Lead/lag Transition tap number (3)
909 09:56:18.873250 [Byte 1] Lead/lag Transition tap number (2)
910 09:56:18.879911 3 6 0 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
911 09:56:18.883576 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
912 09:56:18.886904 [Byte 0]First pass (3, 6, 4)
913 09:56:18.889788 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
914 09:56:18.890397 [Byte 1]First pass (3, 6, 8)
915 09:56:18.896585 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
916 09:56:18.899882 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 09:56:18.903155 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 09:56:18.906817 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 09:56:18.913439 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 09:56:18.916924 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 09:56:18.920224 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 09:56:18.923793 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 09:56:18.926655 All bytes gating window > 1UI, Early break!
924 09:56:18.927086
925 09:56:18.930315 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
926 09:56:18.930880
927 09:56:18.933305 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
928 09:56:18.937069
929 09:56:18.937576
930 09:56:18.937909
931 09:56:18.940082 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
932 09:56:18.940646
933 09:56:18.943520 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
934 09:56:18.944029
935 09:56:18.944367
936 09:56:18.946747 Write Rank0 MR1 =0x56
937 09:56:18.947176
938 09:56:18.950043 best RODT dly(2T, 0.5T) = (2, 2)
939 09:56:18.950506
940 09:56:18.953713 best RODT dly(2T, 0.5T) = (2, 2)
941 09:56:18.954260 ==
942 09:56:18.956937 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
943 09:56:18.960224 fsp= 1, odt_onoff= 1, Byte mode= 0
944 09:56:18.960660 ==
945 09:56:18.963600 Start DQ dly to find pass range UseTestEngine =0
946 09:56:18.966877 x-axis: bit #, y-axis: DQ dly (-127~63)
947 09:56:18.970517 RX Vref Scan = 0
948 09:56:18.974156 -26, [0] xxxxxxxx xxxxxxxx [MSB]
949 09:56:18.977236 -25, [0] xxxxxxxx xxxxxxxx [MSB]
950 09:56:18.981002 -24, [0] xxxxxxxx xxxxxxxx [MSB]
951 09:56:18.981520 -23, [0] xxxxxxxx xxxxxxxx [MSB]
952 09:56:18.983677 -22, [0] xxxxxxxx xxxxxxxx [MSB]
953 09:56:18.987186 -21, [0] xxxxxxxx xxxxxxxx [MSB]
954 09:56:18.990457 -20, [0] xxxxxxxx xxxxxxxx [MSB]
955 09:56:18.994086 -19, [0] xxxxxxxx xxxxxxxx [MSB]
956 09:56:18.997041 -18, [0] xxxxxxxx xxxxxxxx [MSB]
957 09:56:19.001141 -17, [0] xxxxxxxx xxxxxxxx [MSB]
958 09:56:19.001652 -16, [0] xxxxxxxx xxxxxxxx [MSB]
959 09:56:19.003974 -15, [0] xxxxxxxx xxxxxxxx [MSB]
960 09:56:19.007680 -14, [0] xxxxxxxx xxxxxxxx [MSB]
961 09:56:19.011115 -13, [0] xxxxxxxx xxxxxxxx [MSB]
962 09:56:19.014454 -12, [0] xxxxxxxx xxxxxxxx [MSB]
963 09:56:19.017622 -11, [0] xxxxxxxx xxxxxxxx [MSB]
964 09:56:19.020996 -10, [0] xxxxxxxx xxxxxxxx [MSB]
965 09:56:19.024208 -9, [0] xxxxxxxx xxxxxxxx [MSB]
966 09:56:19.024650 -8, [0] xxxxxxxx xxxxxxxx [MSB]
967 09:56:19.027616 -7, [0] xxxxxxxx xxxxxxxx [MSB]
968 09:56:19.030752 -6, [0] xxxxxxxx xxxxxxxx [MSB]
969 09:56:19.034315 -5, [0] xxxxxxxx xxxxxxxx [MSB]
970 09:56:19.037863 -4, [0] xxxxxxxx xxxxxxxx [MSB]
971 09:56:19.041048 -3, [0] xxxoxxxx xxxxxxxx [MSB]
972 09:56:19.041574 -2, [0] xxxoxxxx xxxxxxxx [MSB]
973 09:56:19.044627 -1, [0] xxxoxoxx xxxxxxxx [MSB]
974 09:56:19.048363 0, [0] xxxoxoox xxxxxoxx [MSB]
975 09:56:19.050956 1, [0] xxxoxooo xxxxxoxx [MSB]
976 09:56:19.054799 2, [0] xxxoxooo ooxxxoxx [MSB]
977 09:56:19.058009 3, [0] xxxoxooo ooxoooxx [MSB]
978 09:56:19.058568 4, [0] xxxoxooo ooxooooo [MSB]
979 09:56:19.061356 5, [0] xxxoxooo ooxooooo [MSB]
980 09:56:19.064945 6, [0] xxxooooo oooooooo [MSB]
981 09:56:19.068001 7, [0] xooooooo oooooooo [MSB]
982 09:56:19.071474 30, [0] oooxoooo oooooooo [MSB]
983 09:56:19.075090 31, [0] oooxoooo oooooooo [MSB]
984 09:56:19.075607 32, [0] oooxoxxo oooooooo [MSB]
985 09:56:19.078078 33, [0] oooxoxxo ooooooxo [MSB]
986 09:56:19.081682 34, [0] oooxoxxo oooxooxo [MSB]
987 09:56:19.084968 35, [0] oooxoxxx xooxooxo [MSB]
988 09:56:19.088226 36, [0] oooxoxxx xooxoxxo [MSB]
989 09:56:19.091548 37, [0] oooxoxxx xooxxxxo [MSB]
990 09:56:19.095060 38, [0] oooxxxxx xxoxxxxx [MSB]
991 09:56:19.095579 39, [0] oxoxxxxx xxoxxxxx [MSB]
992 09:56:19.098180 40, [0] oxxxxxxx xxoxxxxx [MSB]
993 09:56:19.101581 41, [0] xxxxxxxx xxxxxxxx [MSB]
994 09:56:19.104795 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
995 09:56:19.108484 iDelay=41, Bit 1, Center 22 (7 ~ 38) 32
996 09:56:19.111646 iDelay=41, Bit 2, Center 23 (7 ~ 39) 33
997 09:56:19.114810 iDelay=41, Bit 3, Center 13 (-3 ~ 29) 33
998 09:56:19.118545 iDelay=41, Bit 4, Center 21 (6 ~ 37) 32
999 09:56:19.121480 iDelay=41, Bit 5, Center 15 (-1 ~ 31) 33
1000 09:56:19.128644 iDelay=41, Bit 6, Center 15 (0 ~ 31) 32
1001 09:56:19.131679 iDelay=41, Bit 7, Center 17 (1 ~ 34) 34
1002 09:56:19.134850 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
1003 09:56:19.138683 iDelay=41, Bit 9, Center 19 (2 ~ 37) 36
1004 09:56:19.142099 iDelay=41, Bit 10, Center 23 (6 ~ 40) 35
1005 09:56:19.145141 iDelay=41, Bit 11, Center 18 (3 ~ 33) 31
1006 09:56:19.148436 iDelay=41, Bit 12, Center 19 (3 ~ 36) 34
1007 09:56:19.151947 iDelay=41, Bit 13, Center 17 (0 ~ 35) 36
1008 09:56:19.155505 iDelay=41, Bit 14, Center 18 (4 ~ 32) 29
1009 09:56:19.158655 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
1010 09:56:19.159160 ==
1011 09:56:19.165422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1012 09:56:19.168747 fsp= 1, odt_onoff= 1, Byte mode= 0
1013 09:56:19.169260 ==
1014 09:56:19.169601 DQS Delay:
1015 09:56:19.172170 DQS0 = 0, DQS1 = 0
1016 09:56:19.172677 DQM Delay:
1017 09:56:19.173015 DQM0 = 18, DQM1 = 19
1018 09:56:19.175486 DQ Delay:
1019 09:56:19.178910 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13
1020 09:56:19.182380 DQ4 =21, DQ5 =15, DQ6 =15, DQ7 =17
1021 09:56:19.185788 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =18
1022 09:56:19.189150 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1023 09:56:19.189663
1024 09:56:19.190044
1025 09:56:19.190511 DramC Write-DBI off
1026 09:56:19.190827 ==
1027 09:56:19.195695 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1028 09:56:19.199154 fsp= 1, odt_onoff= 1, Byte mode= 0
1029 09:56:19.199663 ==
1030 09:56:19.202554 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1031 09:56:19.203061
1032 09:56:19.205778 Begin, DQ Scan Range 924~1180
1033 09:56:19.206332
1034 09:56:19.206672
1035 09:56:19.209183 TX Vref Scan disable
1036 09:56:19.212345 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1037 09:56:19.215754 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1038 09:56:19.219179 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1039 09:56:19.222820 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1040 09:56:19.225760 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1041 09:56:19.229401 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1042 09:56:19.232330 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1043 09:56:19.235928 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1044 09:56:19.239574 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1045 09:56:19.242487 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1046 09:56:19.245969 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1047 09:56:19.249441 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1048 09:56:19.252734 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1049 09:56:19.256072 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1050 09:56:19.259400 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1051 09:56:19.262574 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1052 09:56:19.266353 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1053 09:56:19.269723 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1054 09:56:19.276255 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1055 09:56:19.279685 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1056 09:56:19.282839 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1057 09:56:19.286547 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1058 09:56:19.289879 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1059 09:56:19.293298 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1060 09:56:19.296611 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1061 09:56:19.299838 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1062 09:56:19.303166 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1063 09:56:19.306795 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1064 09:56:19.310042 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1065 09:56:19.313189 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1066 09:56:19.316628 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1067 09:56:19.319891 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1068 09:56:19.323414 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1069 09:56:19.326614 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1070 09:56:19.329981 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1071 09:56:19.333215 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1072 09:56:19.336708 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1073 09:56:19.339913 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1074 09:56:19.346658 962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]
1075 09:56:19.350421 963 |3 6 3|[0] xxxxxxxx oxxoxxxx [MSB]
1076 09:56:19.353173 964 |3 6 4|[0] xxxxxxxx oxxoxxox [MSB]
1077 09:56:19.357007 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1078 09:56:19.360196 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1079 09:56:19.363882 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1080 09:56:19.367085 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1081 09:56:19.370259 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1082 09:56:19.373772 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1083 09:56:19.377163 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1084 09:56:19.380468 972 |3 6 12|[0] xxxoxooo oooooooo [MSB]
1085 09:56:19.383624 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1086 09:56:19.387322 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1087 09:56:19.390453 975 |3 6 15|[0] xooooooo oooooooo [MSB]
1088 09:56:19.397617 988 |3 6 28|[0] oooooooo xooooooo [MSB]
1089 09:56:19.400857 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1090 09:56:19.404096 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1091 09:56:19.407366 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1092 09:56:19.411030 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1093 09:56:19.414291 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1094 09:56:19.417792 994 |3 6 34|[0] oooxoxxo xxxxxxxx [MSB]
1095 09:56:19.421059 995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1096 09:56:19.424422 Byte0, DQ PI dly=982, DQM PI dly= 982
1097 09:56:19.427717 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1098 09:56:19.428234
1099 09:56:19.434330 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1100 09:56:19.435006
1101 09:56:19.437454 Byte1, DQ PI dly=976, DQM PI dly= 976
1102 09:56:19.441021 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1103 09:56:19.441532
1104 09:56:19.444558 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1105 09:56:19.445074
1106 09:56:19.445409 ==
1107 09:56:19.451345 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1108 09:56:19.454391 fsp= 1, odt_onoff= 1, Byte mode= 0
1109 09:56:19.454823 ==
1110 09:56:19.457879 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1111 09:56:19.458353
1112 09:56:19.461216 Begin, DQ Scan Range 952~1016
1113 09:56:19.461647 Write Rank0 MR14 =0x0
1114 09:56:19.471360
1115 09:56:19.471860 CH=0, VrefRange= 0, VrefLevel = 0
1116 09:56:19.478015 TX Bit0 (977~994) 18 985, Bit8 (965~984) 20 974,
1117 09:56:19.481373 TX Bit1 (977~992) 16 984, Bit9 (967~986) 20 976,
1118 09:56:19.488171 TX Bit2 (977~993) 17 985, Bit10 (970~990) 21 980,
1119 09:56:19.491121 TX Bit3 (970~988) 19 979, Bit11 (966~984) 19 975,
1120 09:56:19.494732 TX Bit4 (976~994) 19 985, Bit12 (968~986) 19 977,
1121 09:56:19.501665 TX Bit5 (974~989) 16 981, Bit13 (967~984) 18 975,
1122 09:56:19.504851 TX Bit6 (975~990) 16 982, Bit14 (968~985) 18 976,
1123 09:56:19.508324 TX Bit7 (975~991) 17 983, Bit15 (969~988) 20 978,
1124 09:56:19.508835
1125 09:56:19.511588 Write Rank0 MR14 =0x2
1126 09:56:19.520260
1127 09:56:19.520766 CH=0, VrefRange= 0, VrefLevel = 2
1128 09:56:19.526915 TX Bit0 (977~995) 19 986, Bit8 (965~984) 20 974,
1129 09:56:19.530289 TX Bit1 (977~993) 17 985, Bit9 (967~987) 21 977,
1130 09:56:19.533776 TX Bit2 (977~994) 18 985, Bit10 (970~990) 21 980,
1131 09:56:19.540478 TX Bit3 (970~989) 20 979, Bit11 (966~985) 20 975,
1132 09:56:19.543532 TX Bit4 (976~994) 19 985, Bit12 (968~987) 20 977,
1133 09:56:19.550352 TX Bit5 (974~990) 17 982, Bit13 (967~984) 18 975,
1134 09:56:19.553820 TX Bit6 (975~990) 16 982, Bit14 (967~985) 19 976,
1135 09:56:19.557240 TX Bit7 (975~992) 18 983, Bit15 (969~989) 21 979,
1136 09:56:19.557753
1137 09:56:19.560497 Write Rank0 MR14 =0x4
1138 09:56:19.569155
1139 09:56:19.569660 CH=0, VrefRange= 0, VrefLevel = 4
1140 09:56:19.575633 TX Bit0 (977~996) 20 986, Bit8 (964~984) 21 974,
1141 09:56:19.578993 TX Bit1 (977~993) 17 985, Bit9 (966~988) 23 977,
1142 09:56:19.582914 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1143 09:56:19.589145 TX Bit3 (969~989) 21 979, Bit11 (965~986) 22 975,
1144 09:56:19.592269 TX Bit4 (976~994) 19 985, Bit12 (967~987) 21 977,
1145 09:56:19.599490 TX Bit5 (973~990) 18 981, Bit13 (967~985) 19 976,
1146 09:56:19.602399 TX Bit6 (974~990) 17 982, Bit14 (967~986) 20 976,
1147 09:56:19.605696 TX Bit7 (974~993) 20 983, Bit15 (969~989) 21 979,
1148 09:56:19.606128
1149 09:56:19.609540 Write Rank0 MR14 =0x6
1150 09:56:19.617658
1151 09:56:19.618163 CH=0, VrefRange= 0, VrefLevel = 6
1152 09:56:19.624456 TX Bit0 (976~995) 20 985, Bit8 (964~985) 22 974,
1153 09:56:19.627791 TX Bit1 (976~993) 18 984, Bit9 (966~988) 23 977,
1154 09:56:19.631055 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1155 09:56:19.637765 TX Bit3 (969~990) 22 979, Bit11 (965~986) 22 975,
1156 09:56:19.641146 TX Bit4 (975~995) 21 985, Bit12 (966~988) 23 977,
1157 09:56:19.647663 TX Bit5 (973~990) 18 981, Bit13 (966~986) 21 976,
1158 09:56:19.651340 TX Bit6 (974~991) 18 982, Bit14 (967~987) 21 977,
1159 09:56:19.654417 TX Bit7 (974~993) 20 983, Bit15 (968~989) 22 978,
1160 09:56:19.654856
1161 09:56:19.657602 Write Rank0 MR14 =0x8
1162 09:56:19.667152
1163 09:56:19.667656 CH=0, VrefRange= 0, VrefLevel = 8
1164 09:56:19.673425 TX Bit0 (976~997) 22 986, Bit8 (964~985) 22 974,
1165 09:56:19.676788 TX Bit1 (976~994) 19 985, Bit9 (966~988) 23 977,
1166 09:56:19.683594 TX Bit2 (976~995) 20 985, Bit10 (969~991) 23 980,
1167 09:56:19.686964 TX Bit3 (969~990) 22 979, Bit11 (965~987) 23 976,
1168 09:56:19.690298 TX Bit4 (975~996) 22 985, Bit12 (966~988) 23 977,
1169 09:56:19.697258 TX Bit5 (973~990) 18 981, Bit13 (966~986) 21 976,
1170 09:56:19.700639 TX Bit6 (973~991) 19 982, Bit14 (966~988) 23 977,
1171 09:56:19.703579 TX Bit7 (974~993) 20 983, Bit15 (968~990) 23 979,
1172 09:56:19.704008
1173 09:56:19.706754 Write Rank0 MR14 =0xa
1174 09:56:19.716188
1175 09:56:19.719076 CH=0, VrefRange= 0, VrefLevel = 10
1176 09:56:19.722693 TX Bit0 (976~997) 22 986, Bit8 (964~986) 23 975,
1177 09:56:19.773746 TX Bit1 (976~995) 20 985, Bit9 (966~989) 24 977,
1178 09:56:19.774491 TX Bit2 (976~995) 20 985, Bit10 (969~991) 23 980,
1179 09:56:19.775389 TX Bit3 (968~991) 24 979, Bit11 (964~987) 24 975,
1180 09:56:19.775898 TX Bit4 (975~996) 22 985, Bit12 (966~989) 24 977,
1181 09:56:19.776368 TX Bit5 (972~991) 20 981, Bit13 (966~987) 22 976,
1182 09:56:19.776823 TX Bit6 (972~992) 21 982, Bit14 (966~988) 23 977,
1183 09:56:19.777269 TX Bit7 (974~994) 21 984, Bit15 (968~990) 23 979,
1184 09:56:19.777734
1185 09:56:19.778125 Write Rank0 MR14 =0xc
1186 09:56:19.778451
1187 09:56:19.778736 CH=0, VrefRange= 0, VrefLevel = 12
1188 09:56:19.779018 TX Bit0 (976~997) 22 986, Bit8 (963~986) 24 974,
1189 09:56:19.779364 TX Bit1 (976~995) 20 985, Bit9 (965~989) 25 977,
1190 09:56:19.781486 TX Bit2 (976~997) 22 986, Bit10 (969~991) 23 980,
1191 09:56:19.784915 TX Bit3 (968~991) 24 979, Bit11 (964~988) 25 976,
1192 09:56:19.788439 TX Bit4 (975~997) 23 986, Bit12 (965~989) 25 977,
1193 09:56:19.794927 TX Bit5 (971~991) 21 981, Bit13 (966~988) 23 977,
1194 09:56:19.798447 TX Bit6 (972~992) 21 982, Bit14 (965~988) 24 976,
1195 09:56:19.801525 TX Bit7 (973~994) 22 983, Bit15 (968~990) 23 979,
1196 09:56:19.802065
1197 09:56:19.804889 Write Rank0 MR14 =0xe
1198 09:56:19.814250
1199 09:56:19.817724 CH=0, VrefRange= 0, VrefLevel = 14
1200 09:56:19.820949 TX Bit0 (976~998) 23 987, Bit8 (963~987) 25 975,
1201 09:56:19.824496 TX Bit1 (976~996) 21 986, Bit9 (964~989) 26 976,
1202 09:56:19.827513 TX Bit2 (975~997) 23 986, Bit10 (969~992) 24 980,
1203 09:56:19.834572 TX Bit3 (968~991) 24 979, Bit11 (963~988) 26 975,
1204 09:56:19.837805 TX Bit4 (974~997) 24 985, Bit12 (964~989) 26 976,
1205 09:56:19.844264 TX Bit5 (971~991) 21 981, Bit13 (965~988) 24 976,
1206 09:56:19.847915 TX Bit6 (972~992) 21 982, Bit14 (965~989) 25 977,
1207 09:56:19.850936 TX Bit7 (972~995) 24 983, Bit15 (967~990) 24 978,
1208 09:56:19.851365
1209 09:56:19.854395 Write Rank0 MR14 =0x10
1210 09:56:19.863386
1211 09:56:19.866785 CH=0, VrefRange= 0, VrefLevel = 16
1212 09:56:19.869981 TX Bit0 (976~998) 23 987, Bit8 (962~988) 27 975,
1213 09:56:19.873853 TX Bit1 (976~996) 21 986, Bit9 (964~989) 26 976,
1214 09:56:19.880222 TX Bit2 (975~997) 23 986, Bit10 (969~992) 24 980,
1215 09:56:19.883353 TX Bit3 (968~991) 24 979, Bit11 (963~989) 27 976,
1216 09:56:19.886818 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1217 09:56:19.894049 TX Bit5 (970~992) 23 981, Bit13 (965~988) 24 976,
1218 09:56:19.897082 TX Bit6 (971~992) 22 981, Bit14 (965~989) 25 977,
1219 09:56:19.900503 TX Bit7 (972~996) 25 984, Bit15 (967~991) 25 979,
1220 09:56:19.901016
1221 09:56:19.903569 Write Rank0 MR14 =0x12
1222 09:56:19.913038
1223 09:56:19.916142 CH=0, VrefRange= 0, VrefLevel = 18
1224 09:56:19.919810 TX Bit0 (976~999) 24 987, Bit8 (962~988) 27 975,
1225 09:56:19.923068 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1226 09:56:19.929738 TX Bit2 (975~998) 24 986, Bit10 (969~992) 24 980,
1227 09:56:19.932921 TX Bit3 (967~991) 25 979, Bit11 (963~989) 27 976,
1228 09:56:19.936380 TX Bit4 (974~998) 25 986, Bit12 (964~990) 27 977,
1229 09:56:19.943053 TX Bit5 (970~992) 23 981, Bit13 (964~989) 26 976,
1230 09:56:19.946490 TX Bit6 (971~993) 23 982, Bit14 (964~989) 26 976,
1231 09:56:19.949839 TX Bit7 (971~997) 27 984, Bit15 (967~991) 25 979,
1232 09:56:19.950347
1233 09:56:19.953378 Write Rank0 MR14 =0x14
1234 09:56:19.962466
1235 09:56:19.965863 CH=0, VrefRange= 0, VrefLevel = 20
1236 09:56:19.969142 TX Bit0 (976~999) 24 987, Bit8 (962~989) 28 975,
1237 09:56:19.972964 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1238 09:56:19.979068 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1239 09:56:19.982430 TX Bit3 (967~992) 26 979, Bit11 (962~989) 28 975,
1240 09:56:19.985814 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1241 09:56:19.993010 TX Bit5 (970~992) 23 981, Bit13 (964~989) 26 976,
1242 09:56:19.996328 TX Bit6 (971~994) 24 982, Bit14 (963~989) 27 976,
1243 09:56:19.999492 TX Bit7 (971~996) 26 983, Bit15 (967~991) 25 979,
1244 09:56:20.000018
1245 09:56:20.002744 Write Rank0 MR14 =0x16
1246 09:56:20.012232
1247 09:56:20.012757 CH=0, VrefRange= 0, VrefLevel = 22
1248 09:56:20.018692 TX Bit0 (976~999) 24 987, Bit8 (962~989) 28 975,
1249 09:56:20.022377 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1250 09:56:20.028811 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1251 09:56:20.032135 TX Bit3 (967~992) 26 979, Bit11 (962~989) 28 975,
1252 09:56:20.035504 TX Bit4 (974~998) 25 986, Bit12 (963~989) 27 976,
1253 09:56:20.042375 TX Bit5 (970~992) 23 981, Bit13 (964~989) 26 976,
1254 09:56:20.046142 TX Bit6 (971~994) 24 982, Bit14 (963~989) 27 976,
1255 09:56:20.048868 TX Bit7 (971~996) 26 983, Bit15 (967~991) 25 979,
1256 09:56:20.049327
1257 09:56:20.052060 Write Rank0 MR14 =0x18
1258 09:56:20.061714
1259 09:56:20.064929 CH=0, VrefRange= 0, VrefLevel = 24
1260 09:56:20.068185 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1261 09:56:20.071501 TX Bit1 (974~998) 25 986, Bit9 (965~989) 25 977,
1262 09:56:20.078606 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1263 09:56:20.081572 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1264 09:56:20.085004 TX Bit4 (975~998) 24 986, Bit12 (965~989) 25 977,
1265 09:56:20.091854 TX Bit5 (969~993) 25 981, Bit13 (962~988) 27 975,
1266 09:56:20.094922 TX Bit6 (970~994) 25 982, Bit14 (965~989) 25 977,
1267 09:56:20.098718 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1268 09:56:20.099147
1269 09:56:20.101641 Write Rank0 MR14 =0x1a
1270 09:56:20.110988
1271 09:56:20.114321 CH=0, VrefRange= 0, VrefLevel = 26
1272 09:56:20.117651 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1273 09:56:20.121357 TX Bit1 (974~998) 25 986, Bit9 (965~989) 25 977,
1274 09:56:20.127835 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1275 09:56:20.131328 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1276 09:56:20.134480 TX Bit4 (975~998) 24 986, Bit12 (965~989) 25 977,
1277 09:56:20.141250 TX Bit5 (969~993) 25 981, Bit13 (962~988) 27 975,
1278 09:56:20.144738 TX Bit6 (970~994) 25 982, Bit14 (965~989) 25 977,
1279 09:56:20.147975 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1280 09:56:20.148431
1281 09:56:20.150919 Write Rank0 MR14 =0x1c
1282 09:56:20.160594
1283 09:56:20.163976 CH=0, VrefRange= 0, VrefLevel = 28
1284 09:56:20.167221 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1285 09:56:20.170401 TX Bit1 (974~998) 25 986, Bit9 (965~989) 25 977,
1286 09:56:20.177018 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1287 09:56:20.180888 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1288 09:56:20.183936 TX Bit4 (975~998) 24 986, Bit12 (965~989) 25 977,
1289 09:56:20.190679 TX Bit5 (969~993) 25 981, Bit13 (962~988) 27 975,
1290 09:56:20.194319 TX Bit6 (970~994) 25 982, Bit14 (965~989) 25 977,
1291 09:56:20.197489 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1292 09:56:20.198115
1293 09:56:20.198535
1294 09:56:20.200689 TX Vref found, early break! 378< 381
1295 09:56:20.207158 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1296 09:56:20.210663 u1DelayCellOfst[0]=10 cells (8 PI)
1297 09:56:20.214458 u1DelayCellOfst[1]=8 cells (7 PI)
1298 09:56:20.217272 u1DelayCellOfst[2]=8 cells (7 PI)
1299 09:56:20.217701 u1DelayCellOfst[3]=0 cells (0 PI)
1300 09:56:20.220676 u1DelayCellOfst[4]=8 cells (7 PI)
1301 09:56:20.224345 u1DelayCellOfst[5]=2 cells (2 PI)
1302 09:56:20.227576 u1DelayCellOfst[6]=3 cells (3 PI)
1303 09:56:20.230787 u1DelayCellOfst[7]=5 cells (4 PI)
1304 09:56:20.234141 Byte0, DQ PI dly=979, DQM PI dly= 983
1305 09:56:20.237455 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1306 09:56:20.237891
1307 09:56:20.244067 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1308 09:56:20.244498
1309 09:56:20.247425 u1DelayCellOfst[8]=0 cells (0 PI)
1310 09:56:20.250735 u1DelayCellOfst[9]=2 cells (2 PI)
1311 09:56:20.251162 u1DelayCellOfst[10]=5 cells (4 PI)
1312 09:56:20.254442 u1DelayCellOfst[11]=1 cells (1 PI)
1313 09:56:20.257801 u1DelayCellOfst[12]=2 cells (2 PI)
1314 09:56:20.261034 u1DelayCellOfst[13]=0 cells (0 PI)
1315 09:56:20.264401 u1DelayCellOfst[14]=2 cells (2 PI)
1316 09:56:20.267858 u1DelayCellOfst[15]=3 cells (3 PI)
1317 09:56:20.271058 Byte1, DQ PI dly=975, DQM PI dly= 977
1318 09:56:20.274794 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1319 09:56:20.275303
1320 09:56:20.281186 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1321 09:56:20.281697
1322 09:56:20.282036 Write Rank0 MR14 =0x18
1323 09:56:20.282370
1324 09:56:20.284967 Final TX Range 0 Vref 24
1325 09:56:20.285475
1326 09:56:20.291219 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1327 09:56:20.291732
1328 09:56:20.297802 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1329 09:56:20.305001 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1330 09:56:20.311553 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1331 09:56:20.314584 Write Rank0 MR3 =0xb0
1332 09:56:20.315094 DramC Write-DBI on
1333 09:56:20.315559 ==
1334 09:56:20.321222 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1335 09:56:20.324875 fsp= 1, odt_onoff= 1, Byte mode= 0
1336 09:56:20.325394 ==
1337 09:56:20.327885 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1338 09:56:20.328390
1339 09:56:20.331372 Begin, DQ Scan Range 697~761
1340 09:56:20.331794
1341 09:56:20.332122
1342 09:56:20.334620 TX Vref Scan disable
1343 09:56:20.338118 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1344 09:56:20.341481 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1345 09:56:20.344941 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1346 09:56:20.348237 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1347 09:56:20.351400 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1348 09:56:20.354891 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1349 09:56:20.358388 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1350 09:56:20.361948 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1351 09:56:20.364743 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1352 09:56:20.368653 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1353 09:56:20.371623 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1354 09:56:20.375023 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1355 09:56:20.378677 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1356 09:56:20.382091 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1357 09:56:20.385692 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1358 09:56:20.388898 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1359 09:56:20.391880 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1360 09:56:20.401466 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1361 09:56:20.404616 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1362 09:56:20.408213 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1363 09:56:20.411229 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1364 09:56:20.414727 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1365 09:56:20.418296 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1366 09:56:20.421629 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1367 09:56:20.425026 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1368 09:56:20.428331 742 |2 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1369 09:56:20.431405 Byte0, DQ PI dly=727, DQM PI dly= 727
1370 09:56:20.434736 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1371 09:56:20.435162
1372 09:56:20.441670 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1373 09:56:20.442161
1374 09:56:20.445132 Byte1, DQ PI dly=719, DQM PI dly= 719
1375 09:56:20.448867 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1376 09:56:20.449383
1377 09:56:20.451644 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1378 09:56:20.452080
1379 09:56:20.458952 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1380 09:56:20.465085 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1381 09:56:20.472299 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1382 09:56:20.475045 Write Rank0 MR3 =0x30
1383 09:56:20.478912 DramC Write-DBI off
1384 09:56:20.479419
1385 09:56:20.479746 [DATLAT]
1386 09:56:20.482043 Freq=1600, CH0 RK0, use_rxtx_scan=0
1387 09:56:20.482510
1388 09:56:20.482860 DATLAT Default: 0xf
1389 09:56:20.485424 7, 0xFFFF, sum=0
1390 09:56:20.485929 8, 0xFFFF, sum=0
1391 09:56:20.488776 9, 0xFFFF, sum=0
1392 09:56:20.489283 10, 0xFFFF, sum=0
1393 09:56:20.491898 11, 0xFFFF, sum=0
1394 09:56:20.492381 12, 0xFFFF, sum=0
1395 09:56:20.495547 13, 0xFFFF, sum=0
1396 09:56:20.496063 14, 0x0, sum=1
1397 09:56:20.498753 15, 0x0, sum=2
1398 09:56:20.499216 16, 0x0, sum=3
1399 09:56:20.499550 17, 0x0, sum=4
1400 09:56:20.505530 pattern=2 first_step=14 total pass=5 best_step=16
1401 09:56:20.506102 ==
1402 09:56:20.508649 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1403 09:56:20.512114 fsp= 1, odt_onoff= 1, Byte mode= 0
1404 09:56:20.512618 ==
1405 09:56:20.518788 Start DQ dly to find pass range UseTestEngine =1
1406 09:56:20.522397 x-axis: bit #, y-axis: DQ dly (-127~63)
1407 09:56:20.522912 RX Vref Scan = 1
1408 09:56:20.644999
1409 09:56:20.645505 RX Vref found, early break!
1410 09:56:20.645839
1411 09:56:20.648637 Final RX Vref 13, apply to both rank0 and 1
1412 09:56:20.651639 ==
1413 09:56:20.654904 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1414 09:56:20.658697 fsp= 1, odt_onoff= 1, Byte mode= 0
1415 09:56:20.659211 ==
1416 09:56:20.659551 DQS Delay:
1417 09:56:20.661416 DQS0 = 0, DQS1 = 0
1418 09:56:20.661837 DQM Delay:
1419 09:56:20.664866 DQM0 = 19, DQM1 = 18
1420 09:56:20.665292 DQ Delay:
1421 09:56:20.668598 DQ0 =24, DQ1 =23, DQ2 =23, DQ3 =13
1422 09:56:20.671869 DQ4 =22, DQ5 =15, DQ6 =17, DQ7 =18
1423 09:56:20.675308 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
1424 09:56:20.678729 DQ12 =19, DQ13 =16, DQ14 =17, DQ15 =19
1425 09:56:20.679246
1426 09:56:20.679585
1427 09:56:20.679888
1428 09:56:20.681964 [DramC_TX_OE_Calibration] TA2
1429 09:56:20.685403 Original DQ_B0 (3 6) =30, OEN = 27
1430 09:56:20.688844 Original DQ_B1 (3 6) =30, OEN = 27
1431 09:56:20.689357 23, 0x0, End_B0=23 End_B1=23
1432 09:56:20.691959 24, 0x0, End_B0=24 End_B1=24
1433 09:56:20.695470 25, 0x0, End_B0=25 End_B1=25
1434 09:56:20.698948 26, 0x0, End_B0=26 End_B1=26
1435 09:56:20.702135 27, 0x0, End_B0=27 End_B1=27
1436 09:56:20.702686 28, 0x0, End_B0=28 End_B1=28
1437 09:56:20.705262 29, 0x0, End_B0=29 End_B1=29
1438 09:56:20.708879 30, 0x0, End_B0=30 End_B1=30
1439 09:56:20.712219 31, 0xFFFF, End_B0=30 End_B1=30
1440 09:56:20.715709 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1441 09:56:20.722289 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1442 09:56:20.722809
1443 09:56:20.723145
1444 09:56:20.725693 Write Rank0 MR23 =0x3f
1445 09:56:20.726200 [DQSOSC]
1446 09:56:20.732289 [DQSOSCAuto] RK0, (LSB)MR18= 0x9d, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1447 09:56:20.739164 CH0_RK0: MR19=0x3, MR18=0x9D, DQSOSC=340, MR23=63, INC=21, DEC=31
1448 09:56:20.742157 Write Rank0 MR23 =0x3f
1449 09:56:20.742626 [DQSOSC]
1450 09:56:20.749165 [DQSOSCAuto] RK0, (LSB)MR18= 0x9b, (MSB)MR19= 0x3, tDQSOscB0 = 341 ps tDQSOscB1 = 0 ps
1451 09:56:20.752867 CH0 RK0: MR19=3, MR18=9B
1452 09:56:20.755771 [RankSwap] Rank num 2, (Multi 1), Rank 1
1453 09:56:20.756205 Write Rank0 MR2 =0xad
1454 09:56:20.759152 [Write Leveling]
1455 09:56:20.762337 delay byte0 byte1 byte2 byte3
1456 09:56:20.762766
1457 09:56:20.763122 10 0 0
1458 09:56:20.765670 11 0 0
1459 09:56:20.766101 12 0 0
1460 09:56:20.766530 13 0 0
1461 09:56:20.769340 14 0 0
1462 09:56:20.769854 15 0 0
1463 09:56:20.772881 16 0 0
1464 09:56:20.773397 17 0 0
1465 09:56:20.773741 18 0 0
1466 09:56:20.775994 19 0 0
1467 09:56:20.776431 20 0 0
1468 09:56:20.779317 21 0 0
1469 09:56:20.779751 22 0 0
1470 09:56:20.782633 23 0 0
1471 09:56:20.783067 24 0 0
1472 09:56:20.783403 25 0 0
1473 09:56:20.786304 26 0 0
1474 09:56:20.786820 27 0 0
1475 09:56:20.789465 28 0 0
1476 09:56:20.789983 29 0 0
1477 09:56:20.790373 30 0 ff
1478 09:56:20.792616 31 0 ff
1479 09:56:20.793110 32 0 ff
1480 09:56:20.796089 33 0 ff
1481 09:56:20.796603 34 ff ff
1482 09:56:20.799597 35 ff ff
1483 09:56:20.800108 36 ff ff
1484 09:56:20.803157 37 ff ff
1485 09:56:20.803671 38 ff ff
1486 09:56:20.804016 39 ff ff
1487 09:56:20.806050 40 ff ff
1488 09:56:20.809322 pass bytecount = 0xff (0xff: all bytes pass)
1489 09:56:20.809746
1490 09:56:20.813127 DQS0 dly: 34
1491 09:56:20.813811 DQS1 dly: 30
1492 09:56:20.816545 Write Rank0 MR2 =0x2d
1493 09:56:20.819870 [RankSwap] Rank num 2, (Multi 1), Rank 0
1494 09:56:20.820378 Write Rank1 MR1 =0xd6
1495 09:56:20.820714 [Gating]
1496 09:56:20.823061 ==
1497 09:56:20.826583 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1498 09:56:20.829705 fsp= 1, odt_onoff= 1, Byte mode= 0
1499 09:56:20.830207 ==
1500 09:56:20.833351 3 1 0 |3534 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
1501 09:56:20.840108 3 1 4 |3534 1f1f |(11 11)(11 11) |(0 0)(0 0)| 0
1502 09:56:20.843419 3 1 8 |3534 3535 |(11 11)(0 0) |(1 1)(1 1)| 0
1503 09:56:20.846643 3 1 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1504 09:56:20.850056 3 1 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1505 09:56:20.856855 3 1 20 |3534 3535 |(11 11)(0 0) |(0 0)(0 1)| 0
1506 09:56:20.860194 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1507 09:56:20.863686 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1508 09:56:20.869984 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1509 09:56:20.873684 3 2 4 |3534 3434 |(11 11)(10 10) |(0 1)(1 0)| 0
1510 09:56:20.876801 3 2 8 |403 0 |(11 11)(11 11) |(1 1)(0 1)| 0
1511 09:56:20.880153 3 2 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1512 09:56:20.886989 3 2 16 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1513 09:56:20.890551 3 2 20 |3d3d f0e |(11 11)(11 11) |(1 1)(1 1)| 0
1514 09:56:20.893534 [Byte 1] Lead/lag Transition tap number (1)
1515 09:56:20.897081 3 2 24 |3d3d 3c3c |(11 11)(11 11) |(1 1)(0 0)| 0
1516 09:56:20.903671 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1517 09:56:20.907063 3 3 0 |3d3d 0 |(11 11)(1 1) |(1 1)(1 1)| 0
1518 09:56:20.910184 3 3 4 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
1519 09:56:20.913518 3 3 8 |3d3d 1514 |(11 11)(11 11) |(1 1)(1 1)| 0
1520 09:56:20.920591 3 3 12 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1521 09:56:20.923993 3 3 16 |302f 0 |(11 11)(11 11) |(1 1)(1 1)| 0
1522 09:56:20.927228 [Byte 1] Lead/lag falling Transition (3, 3, 16)
1523 09:56:20.930654 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1524 09:56:20.937508 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1525 09:56:20.940839 [Byte 0] Lead/lag Transition tap number (1)
1526 09:56:20.944068 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1527 09:56:20.947271 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1528 09:56:20.954345 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1529 09:56:20.957516 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1530 09:56:20.960999 3 4 8 |b0a 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1531 09:56:20.967470 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1532 09:56:20.970673 3 4 16 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
1533 09:56:20.974399 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1534 09:56:20.977615 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1535 09:56:20.984137 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1536 09:56:20.987534 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1537 09:56:20.990946 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1538 09:56:20.997687 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1539 09:56:21.000926 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1540 09:56:21.004444 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 09:56:21.010799 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1542 09:56:21.014815 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 09:56:21.017953 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 09:56:21.021202 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1545 09:56:21.027798 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1546 09:56:21.031332 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1547 09:56:21.034563 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1548 09:56:21.038039 [Byte 0] Lead/lag Transition tap number (2)
1549 09:56:21.041683 [Byte 1] Lead/lag Transition tap number (2)
1550 09:56:21.048192 3 6 8 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1551 09:56:21.051457 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1552 09:56:21.054885 [Byte 0]First pass (3, 6, 12)
1553 09:56:21.058298 3 6 16 |4646 1010 |(0 0)(1 1) |(0 0)(0 0)| 0
1554 09:56:21.061763 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1555 09:56:21.064825 [Byte 1]First pass (3, 6, 20)
1556 09:56:21.068189 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1557 09:56:21.071688 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1558 09:56:21.078347 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1559 09:56:21.082042 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1560 09:56:21.085068 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1561 09:56:21.088488 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1562 09:56:21.091919 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1563 09:56:21.098874 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1564 09:56:21.101987 All bytes gating window > 1UI, Early break!
1565 09:56:21.102549
1566 09:56:21.105453 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1567 09:56:21.105963
1568 09:56:21.108691 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1569 09:56:21.109118
1570 09:56:21.109450
1571 09:56:21.109754
1572 09:56:21.111974 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1573 09:56:21.112404
1574 09:56:21.115545 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1575 09:56:21.116054
1576 09:56:21.116384
1577 09:56:21.118662 Write Rank1 MR1 =0x56
1578 09:56:21.119168
1579 09:56:21.122183 best RODT dly(2T, 0.5T) = (2, 3)
1580 09:56:21.122730
1581 09:56:21.125587 best RODT dly(2T, 0.5T) = (2, 3)
1582 09:56:21.126114 ==
1583 09:56:21.128788 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1584 09:56:21.132288 fsp= 1, odt_onoff= 1, Byte mode= 0
1585 09:56:21.132797 ==
1586 09:56:21.138956 Start DQ dly to find pass range UseTestEngine =0
1587 09:56:21.142661 x-axis: bit #, y-axis: DQ dly (-127~63)
1588 09:56:21.143221 RX Vref Scan = 0
1589 09:56:21.145629 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1590 09:56:21.149353 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1591 09:56:21.152958 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1592 09:56:21.156218 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1593 09:56:21.159222 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1594 09:56:21.159739 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1595 09:56:21.162762 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1596 09:56:21.165834 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1597 09:56:21.169551 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1598 09:56:21.172840 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1599 09:56:21.176611 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1600 09:56:21.179471 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1601 09:56:21.182920 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1602 09:56:21.183433 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1603 09:56:21.186372 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1604 09:56:21.189722 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1605 09:56:21.192938 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1606 09:56:21.196062 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1607 09:56:21.199540 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1608 09:56:21.202847 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1609 09:56:21.203284 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1610 09:56:21.206399 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1611 09:56:21.209517 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1612 09:56:21.212993 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1613 09:56:21.216456 -2, [0] xxxoxoxx xxxxxxxx [MSB]
1614 09:56:21.219649 -1, [0] xxxoxoox oxxxxxxx [MSB]
1615 09:56:21.220164 0, [0] xxxoxooo oxxxxxxx [MSB]
1616 09:56:21.223114 1, [0] xxxoxooo ooxoooox [MSB]
1617 09:56:21.226613 2, [0] xxxoxooo ooxooooo [MSB]
1618 09:56:21.229694 3, [0] xxxoxooo ooxooooo [MSB]
1619 09:56:21.233038 4, [0] xxxooooo oooooooo [MSB]
1620 09:56:21.236430 5, [0] xooooooo oooooooo [MSB]
1621 09:56:21.236871 6, [0] xooooooo oooooooo [MSB]
1622 09:56:21.239863 33, [0] oooxoooo oooooooo [MSB]
1623 09:56:21.243233 34, [0] oooxoxoo oooooooo [MSB]
1624 09:56:21.246319 35, [0] oooxoxoo oooxooxo [MSB]
1625 09:56:21.249684 36, [0] oooxoxxx xooxooxo [MSB]
1626 09:56:21.253139 37, [0] oooxoxxx xooxoxxo [MSB]
1627 09:56:21.256612 38, [0] oooxoxxx xxoxoxxo [MSB]
1628 09:56:21.257128 39, [0] oooxoxxx xxoxxxxo [MSB]
1629 09:56:21.259750 40, [0] oxoxxxxx xxoxxxxx [MSB]
1630 09:56:21.263134 41, [0] oxxxxxxx xxoxxxxx [MSB]
1631 09:56:21.266574 42, [0] xxxxxxxx xxoxxxxx [MSB]
1632 09:56:21.270083 43, [0] xxxxxxxx xxxxxxxx [MSB]
1633 09:56:21.273626 iDelay=43, Bit 0, Center 24 (7 ~ 41) 35
1634 09:56:21.276994 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1635 09:56:21.279815 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1636 09:56:21.283314 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
1637 09:56:21.286869 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
1638 09:56:21.290368 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
1639 09:56:21.293366 iDelay=43, Bit 6, Center 17 (-1 ~ 35) 37
1640 09:56:21.296824 iDelay=43, Bit 7, Center 17 (0 ~ 35) 36
1641 09:56:21.300212 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
1642 09:56:21.303829 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
1643 09:56:21.306835 iDelay=43, Bit 10, Center 23 (4 ~ 42) 39
1644 09:56:21.313760 iDelay=43, Bit 11, Center 17 (1 ~ 34) 34
1645 09:56:21.316968 iDelay=43, Bit 12, Center 19 (1 ~ 38) 38
1646 09:56:21.320464 iDelay=43, Bit 13, Center 18 (1 ~ 36) 36
1647 09:56:21.323676 iDelay=43, Bit 14, Center 17 (1 ~ 34) 34
1648 09:56:21.327193 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1649 09:56:21.327621 ==
1650 09:56:21.330487 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1651 09:56:21.333905 fsp= 1, odt_onoff= 1, Byte mode= 0
1652 09:56:21.334382 ==
1653 09:56:21.337211 DQS Delay:
1654 09:56:21.337634 DQS0 = 0, DQS1 = 0
1655 09:56:21.340899 DQM Delay:
1656 09:56:21.341461 DQM0 = 19, DQM1 = 18
1657 09:56:21.342071 DQ Delay:
1658 09:56:21.343997 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =14
1659 09:56:21.347360 DQ4 =21, DQ5 =15, DQ6 =17, DQ7 =17
1660 09:56:21.350740 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
1661 09:56:21.353967 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1662 09:56:21.354501
1663 09:56:21.354844
1664 09:56:21.357255 DramC Write-DBI off
1665 09:56:21.357683 ==
1666 09:56:21.360727 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1667 09:56:21.364253 fsp= 1, odt_onoff= 1, Byte mode= 0
1668 09:56:21.364683 ==
1669 09:56:21.370741 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1670 09:56:21.371171
1671 09:56:21.374085 Begin, DQ Scan Range 926~1182
1672 09:56:21.374573
1673 09:56:21.374909
1674 09:56:21.375217 TX Vref Scan disable
1675 09:56:21.377299 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1676 09:56:21.380641 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1677 09:56:21.384180 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1678 09:56:21.387689 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1679 09:56:21.394093 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1680 09:56:21.397561 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1681 09:56:21.401148 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1682 09:56:21.404685 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1683 09:56:21.407971 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1684 09:56:21.411005 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1685 09:56:21.414480 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1686 09:56:21.417985 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1687 09:56:21.421277 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1688 09:56:21.425181 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1689 09:56:21.427954 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1690 09:56:21.431483 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1691 09:56:21.434587 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1692 09:56:21.438005 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1693 09:56:21.441313 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1694 09:56:21.444639 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1695 09:56:21.448615 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1696 09:56:21.451512 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1697 09:56:21.454731 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1698 09:56:21.458334 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1699 09:56:21.464639 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1700 09:56:21.468134 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1701 09:56:21.471538 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1702 09:56:21.474787 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1703 09:56:21.478550 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1704 09:56:21.481863 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1705 09:56:21.485089 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1706 09:56:21.488591 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1707 09:56:21.491644 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1708 09:56:21.495326 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1709 09:56:21.498900 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1710 09:56:21.502017 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1711 09:56:21.505293 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1712 09:56:21.508634 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1713 09:56:21.511885 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1714 09:56:21.515155 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1715 09:56:21.518897 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1716 09:56:21.522065 967 |3 6 7|[0] xxxxxxxx oxxxxxxx [MSB]
1717 09:56:21.525714 968 |3 6 8|[0] xxxxxxxx ooxoxoox [MSB]
1718 09:56:21.528898 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1719 09:56:21.532283 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1720 09:56:21.535416 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1721 09:56:21.538700 972 |3 6 12|[0] xxxoxoox ooxooooo [MSB]
1722 09:56:21.545520 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1723 09:56:21.549034 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1724 09:56:21.552107 975 |3 6 15|[0] xxxoxooo oooooooo [MSB]
1725 09:56:21.555728 976 |3 6 16|[0] xooooooo oooooooo [MSB]
1726 09:56:21.558766 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1727 09:56:21.562288 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1728 09:56:21.565903 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1729 09:56:21.569102 993 |3 6 33|[0] oooooxoo xxxxxxxx [MSB]
1730 09:56:21.575741 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1731 09:56:21.579154 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1732 09:56:21.582867 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1733 09:56:21.586438 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1734 09:56:21.589147 Byte0, DQ PI dly=984, DQM PI dly= 984
1735 09:56:21.592803 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1736 09:56:21.593315
1737 09:56:21.595690 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1738 09:56:21.596217
1739 09:56:21.599044 Byte1, DQ PI dly=979, DQM PI dly= 979
1740 09:56:21.605794 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1741 09:56:21.606342
1742 09:56:21.609077 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1743 09:56:21.609505
1744 09:56:21.609834 ==
1745 09:56:21.616188 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1746 09:56:21.619495 fsp= 1, odt_onoff= 1, Byte mode= 0
1747 09:56:21.620007 ==
1748 09:56:21.622722 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1749 09:56:21.623152
1750 09:56:21.626286 Begin, DQ Scan Range 955~1019
1751 09:56:21.626816 Write Rank1 MR14 =0x0
1752 09:56:21.635857
1753 09:56:21.636363 CH=0, VrefRange= 0, VrefLevel = 0
1754 09:56:21.642655 TX Bit0 (978~997) 20 987, Bit8 (968~988) 21 978,
1755 09:56:21.646150 TX Bit1 (978~996) 19 987, Bit9 (971~989) 19 980,
1756 09:56:21.649170 TX Bit2 (978~996) 19 987, Bit10 (975~991) 17 983,
1757 09:56:21.655871 TX Bit3 (974~990) 17 982, Bit11 (969~988) 20 978,
1758 09:56:21.659095 TX Bit4 (977~997) 21 987, Bit12 (971~989) 19 980,
1759 09:56:21.666108 TX Bit5 (975~990) 16 982, Bit13 (970~987) 18 978,
1760 09:56:21.669606 TX Bit6 (975~991) 17 983, Bit14 (970~989) 20 979,
1761 09:56:21.673009 TX Bit7 (977~992) 16 984, Bit15 (973~991) 19 982,
1762 09:56:21.673522
1763 09:56:21.676089 Write Rank1 MR14 =0x2
1764 09:56:21.684601
1765 09:56:21.685114 CH=0, VrefRange= 0, VrefLevel = 2
1766 09:56:21.691465 TX Bit0 (978~998) 21 988, Bit8 (968~988) 21 978,
1767 09:56:21.694936 TX Bit1 (977~996) 20 986, Bit9 (971~989) 19 980,
1768 09:56:21.698370 TX Bit2 (978~996) 19 987, Bit10 (974~991) 18 982,
1769 09:56:21.704843 TX Bit3 (973~990) 18 981, Bit11 (969~988) 20 978,
1770 09:56:21.708578 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1771 09:56:21.714732 TX Bit5 (975~991) 17 983, Bit13 (970~986) 17 978,
1772 09:56:21.718380 TX Bit6 (975~991) 17 983, Bit14 (970~989) 20 979,
1773 09:56:21.722057 TX Bit7 (977~993) 17 985, Bit15 (972~991) 20 981,
1774 09:56:21.722614
1775 09:56:21.725056 Write Rank1 MR14 =0x4
1776 09:56:21.733286
1777 09:56:21.733791 CH=0, VrefRange= 0, VrefLevel = 4
1778 09:56:21.739654 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1779 09:56:21.743380 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1780 09:56:21.749890 TX Bit2 (977~997) 21 987, Bit10 (974~992) 19 983,
1781 09:56:21.753573 TX Bit3 (973~990) 18 981, Bit11 (969~989) 21 979,
1782 09:56:21.756756 TX Bit4 (977~997) 21 987, Bit12 (969~990) 22 979,
1783 09:56:21.763430 TX Bit5 (974~990) 17 982, Bit13 (969~987) 19 978,
1784 09:56:21.766480 TX Bit6 (974~991) 18 982, Bit14 (970~989) 20 979,
1785 09:56:21.770350 TX Bit7 (977~994) 18 985, Bit15 (972~991) 20 981,
1786 09:56:21.770862
1787 09:56:21.773444 Write Rank1 MR14 =0x6
1788 09:56:21.782075
1789 09:56:21.782646 CH=0, VrefRange= 0, VrefLevel = 6
1790 09:56:21.788781 TX Bit0 (977~998) 22 987, Bit8 (967~989) 23 978,
1791 09:56:21.792127 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1792 09:56:21.795624 TX Bit2 (977~997) 21 987, Bit10 (974~992) 19 983,
1793 09:56:21.802582 TX Bit3 (972~991) 20 981, Bit11 (969~989) 21 979,
1794 09:56:21.805661 TX Bit4 (976~998) 23 987, Bit12 (969~990) 22 979,
1795 09:56:21.812471 TX Bit5 (974~991) 18 982, Bit13 (970~989) 20 979,
1796 09:56:21.816076 TX Bit6 (975~992) 18 983, Bit14 (969~990) 22 979,
1797 09:56:21.818989 TX Bit7 (976~994) 19 985, Bit15 (972~991) 20 981,
1798 09:56:21.819417
1799 09:56:21.822434 wait MRW command Rank1 MR14 =0x8 fired (1)
1800 09:56:21.825635 Write Rank1 MR14 =0x8
1801 09:56:21.834763
1802 09:56:21.835272 CH=0, VrefRange= 0, VrefLevel = 8
1803 09:56:21.841237 TX Bit0 (977~998) 22 987, Bit8 (967~989) 23 978,
1804 09:56:21.845162 TX Bit1 (976~997) 22 986, Bit9 (969~990) 22 979,
1805 09:56:21.848201 TX Bit2 (977~997) 21 987, Bit10 (974~992) 19 983,
1806 09:56:21.854545 TX Bit3 (972~991) 20 981, Bit11 (968~989) 22 978,
1807 09:56:21.858159 TX Bit4 (977~998) 22 987, Bit12 (970~990) 21 980,
1808 09:56:21.864938 TX Bit5 (974~991) 18 982, Bit13 (969~989) 21 979,
1809 09:56:21.868389 TX Bit6 (974~992) 19 983, Bit14 (970~990) 21 980,
1810 09:56:21.871498 TX Bit7 (976~995) 20 985, Bit15 (971~992) 22 981,
1811 09:56:21.872001
1812 09:56:21.874940 Write Rank1 MR14 =0xa
1813 09:56:21.883709
1814 09:56:21.886784 CH=0, VrefRange= 0, VrefLevel = 10
1815 09:56:21.890177 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1816 09:56:21.893705 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
1817 09:56:21.900340 TX Bit2 (977~998) 22 987, Bit10 (974~993) 20 983,
1818 09:56:21.903659 TX Bit3 (971~991) 21 981, Bit11 (968~990) 23 979,
1819 09:56:21.907079 TX Bit4 (976~998) 23 987, Bit12 (969~990) 22 979,
1820 09:56:21.913742 TX Bit5 (973~992) 20 982, Bit13 (969~989) 21 979,
1821 09:56:21.917265 TX Bit6 (974~993) 20 983, Bit14 (969~990) 22 979,
1822 09:56:21.920601 TX Bit7 (976~995) 20 985, Bit15 (971~992) 22 981,
1823 09:56:21.921114
1824 09:56:21.923988 Write Rank1 MR14 =0xc
1825 09:56:21.932722
1826 09:56:21.935741 CH=0, VrefRange= 0, VrefLevel = 12
1827 09:56:21.939087 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1828 09:56:21.942811 TX Bit1 (976~998) 23 987, Bit9 (968~990) 23 979,
1829 09:56:21.949129 TX Bit2 (977~998) 22 987, Bit10 (973~993) 21 983,
1830 09:56:21.952738 TX Bit3 (971~992) 22 981, Bit11 (968~990) 23 979,
1831 09:56:21.956133 TX Bit4 (976~998) 23 987, Bit12 (969~990) 22 979,
1832 09:56:21.962688 TX Bit5 (973~992) 20 982, Bit13 (968~989) 22 978,
1833 09:56:21.966085 TX Bit6 (973~993) 21 983, Bit14 (969~990) 22 979,
1834 09:56:21.969600 TX Bit7 (976~997) 22 986, Bit15 (971~992) 22 981,
1835 09:56:21.970115
1836 09:56:21.972562 Write Rank1 MR14 =0xe
1837 09:56:21.981958
1838 09:56:21.982528 CH=0, VrefRange= 0, VrefLevel = 14
1839 09:56:21.988430 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
1840 09:56:21.991801 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
1841 09:56:21.998263 TX Bit2 (976~998) 23 987, Bit10 (973~994) 22 983,
1842 09:56:22.001930 TX Bit3 (971~992) 22 981, Bit11 (968~990) 23 979,
1843 09:56:22.005277 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1844 09:56:22.011802 TX Bit5 (972~992) 21 982, Bit13 (968~990) 23 979,
1845 09:56:22.015330 TX Bit6 (973~994) 22 983, Bit14 (968~991) 24 979,
1846 09:56:22.018999 TX Bit7 (976~997) 22 986, Bit15 (970~993) 24 981,
1847 09:56:22.019511
1848 09:56:22.022121 Write Rank1 MR14 =0x10
1849 09:56:22.031176
1850 09:56:22.034276 CH=0, VrefRange= 0, VrefLevel = 16
1851 09:56:22.037486 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1852 09:56:22.040974 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
1853 09:56:22.047395 TX Bit2 (976~999) 24 987, Bit10 (973~994) 22 983,
1854 09:56:22.050821 TX Bit3 (970~993) 24 981, Bit11 (968~990) 23 979,
1855 09:56:22.053983 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1856 09:56:22.061115 TX Bit5 (971~993) 23 982, Bit13 (968~990) 23 979,
1857 09:56:22.064576 TX Bit6 (972~995) 24 983, Bit14 (968~991) 24 979,
1858 09:56:22.067533 TX Bit7 (975~997) 23 986, Bit15 (970~993) 24 981,
1859 09:56:22.067968
1860 09:56:22.070748 Write Rank1 MR14 =0x12
1861 09:56:22.080440
1862 09:56:22.083452 CH=0, VrefRange= 0, VrefLevel = 18
1863 09:56:22.086910 TX Bit0 (977~1000) 24 988, Bit8 (966~990) 25 978,
1864 09:56:22.090459 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1865 09:56:22.097073 TX Bit2 (976~999) 24 987, Bit10 (972~995) 24 983,
1866 09:56:22.100446 TX Bit3 (970~993) 24 981, Bit11 (967~991) 25 979,
1867 09:56:22.103669 TX Bit4 (975~999) 25 987, Bit12 (968~991) 24 979,
1868 09:56:22.110589 TX Bit5 (971~993) 23 982, Bit13 (968~990) 23 979,
1869 09:56:22.113862 TX Bit6 (972~995) 24 983, Bit14 (968~991) 24 979,
1870 09:56:22.117435 TX Bit7 (976~998) 23 987, Bit15 (969~994) 26 981,
1871 09:56:22.117954
1872 09:56:22.120532 Write Rank1 MR14 =0x14
1873 09:56:22.129883
1874 09:56:22.133121 CH=0, VrefRange= 0, VrefLevel = 20
1875 09:56:22.136180 TX Bit0 (976~1000) 25 988, Bit8 (966~990) 25 978,
1876 09:56:22.139975 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1877 09:56:22.146452 TX Bit2 (976~999) 24 987, Bit10 (972~995) 24 983,
1878 09:56:22.149572 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1879 09:56:22.152863 TX Bit4 (975~1000) 26 987, Bit12 (968~991) 24 979,
1880 09:56:22.159591 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1881 09:56:22.162950 TX Bit6 (972~996) 25 984, Bit14 (968~991) 24 979,
1882 09:56:22.166572 TX Bit7 (975~998) 24 986, Bit15 (969~994) 26 981,
1883 09:56:22.167150
1884 09:56:22.169731 Write Rank1 MR14 =0x16
1885 09:56:22.179398
1886 09:56:22.182810 CH=0, VrefRange= 0, VrefLevel = 22
1887 09:56:22.185784 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1888 09:56:22.189270 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1889 09:56:22.195773 TX Bit2 (976~999) 24 987, Bit10 (972~996) 25 984,
1890 09:56:22.199570 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1891 09:56:22.202489 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1892 09:56:22.209860 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1893 09:56:22.212618 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1894 09:56:22.216530 TX Bit7 (975~998) 24 986, Bit15 (969~993) 25 981,
1895 09:56:22.217046
1896 09:56:22.219255 Write Rank1 MR14 =0x18
1897 09:56:22.228774
1898 09:56:22.232369 CH=0, VrefRange= 0, VrefLevel = 24
1899 09:56:22.235307 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1900 09:56:22.238681 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1901 09:56:22.245914 TX Bit2 (976~999) 24 987, Bit10 (972~996) 25 984,
1902 09:56:22.249136 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1903 09:56:22.252505 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1904 09:56:22.258951 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1905 09:56:22.262187 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1906 09:56:22.265947 TX Bit7 (975~998) 24 986, Bit15 (969~993) 25 981,
1907 09:56:22.266508
1908 09:56:22.269272 Write Rank1 MR14 =0x1a
1909 09:56:22.278574
1910 09:56:22.281661 CH=0, VrefRange= 0, VrefLevel = 26
1911 09:56:22.285128 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1912 09:56:22.288457 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1913 09:56:22.295216 TX Bit2 (976~999) 24 987, Bit10 (972~996) 25 984,
1914 09:56:22.298421 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1915 09:56:22.302107 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1916 09:56:22.308763 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1917 09:56:22.311591 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1918 09:56:22.315360 TX Bit7 (975~998) 24 986, Bit15 (969~993) 25 981,
1919 09:56:22.315870
1920 09:56:22.318174 Write Rank1 MR14 =0x1c
1921 09:56:22.327810
1922 09:56:22.331384 CH=0, VrefRange= 0, VrefLevel = 28
1923 09:56:22.334796 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1924 09:56:22.337932 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1925 09:56:22.344935 TX Bit2 (976~999) 24 987, Bit10 (972~996) 25 984,
1926 09:56:22.348051 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1927 09:56:22.351311 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1928 09:56:22.358056 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1929 09:56:22.361609 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1930 09:56:22.365383 TX Bit7 (975~998) 24 986, Bit15 (969~993) 25 981,
1931 09:56:22.365906
1932 09:56:22.367939 Write Rank1 MR14 =0x1e
1933 09:56:22.377365
1934 09:56:22.381004 CH=0, VrefRange= 0, VrefLevel = 30
1935 09:56:22.384017 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
1936 09:56:22.387423 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1937 09:56:22.393702 TX Bit2 (976~999) 24 987, Bit10 (972~996) 25 984,
1938 09:56:22.396990 TX Bit3 (969~994) 26 981, Bit11 (967~991) 25 979,
1939 09:56:22.400394 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1940 09:56:22.407023 TX Bit5 (970~994) 25 982, Bit13 (968~990) 23 979,
1941 09:56:22.410641 TX Bit6 (971~995) 25 983, Bit14 (968~991) 24 979,
1942 09:56:22.413889 TX Bit7 (975~998) 24 986, Bit15 (969~993) 25 981,
1943 09:56:22.417309
1944 09:56:22.417812
1945 09:56:22.420823 TX Vref found, early break! 372< 376
1946 09:56:22.423799 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1947 09:56:22.427327 u1DelayCellOfst[0]=8 cells (7 PI)
1948 09:56:22.430627 u1DelayCellOfst[1]=7 cells (6 PI)
1949 09:56:22.433944 u1DelayCellOfst[2]=7 cells (6 PI)
1950 09:56:22.437121 u1DelayCellOfst[3]=0 cells (0 PI)
1951 09:56:22.437554 u1DelayCellOfst[4]=8 cells (7 PI)
1952 09:56:22.440557 u1DelayCellOfst[5]=1 cells (1 PI)
1953 09:56:22.444044 u1DelayCellOfst[6]=2 cells (2 PI)
1954 09:56:22.447308 u1DelayCellOfst[7]=6 cells (5 PI)
1955 09:56:22.450538 Byte0, DQ PI dly=981, DQM PI dly= 984
1956 09:56:22.454407 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1957 09:56:22.457296
1958 09:56:22.460753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1959 09:56:22.461217
1960 09:56:22.463972 u1DelayCellOfst[8]=0 cells (0 PI)
1961 09:56:22.467479 u1DelayCellOfst[9]=1 cells (1 PI)
1962 09:56:22.470537 u1DelayCellOfst[10]=7 cells (6 PI)
1963 09:56:22.473775 u1DelayCellOfst[11]=1 cells (1 PI)
1964 09:56:22.474164 u1DelayCellOfst[12]=2 cells (2 PI)
1965 09:56:22.477286 u1DelayCellOfst[13]=1 cells (1 PI)
1966 09:56:22.480962 u1DelayCellOfst[14]=1 cells (1 PI)
1967 09:56:22.484071 u1DelayCellOfst[15]=3 cells (3 PI)
1968 09:56:22.487248 Byte1, DQ PI dly=978, DQM PI dly= 981
1969 09:56:22.494123 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1970 09:56:22.494552
1971 09:56:22.497468 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1972 09:56:22.497857
1973 09:56:22.500881 Write Rank1 MR14 =0x16
1974 09:56:22.501302
1975 09:56:22.501603 Final TX Range 0 Vref 22
1976 09:56:22.501918
1977 09:56:22.507316 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1978 09:56:22.507706
1979 09:56:22.513939 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1980 09:56:22.520869 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1981 09:56:22.527670 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1982 09:56:22.531030 Write Rank1 MR3 =0xb0
1983 09:56:22.534309 DramC Write-DBI on
1984 09:56:22.534699 ==
1985 09:56:22.537623 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1986 09:56:22.541279 fsp= 1, odt_onoff= 1, Byte mode= 0
1987 09:56:22.541765 ==
1988 09:56:22.544584 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1989 09:56:22.545058
1990 09:56:22.547592 Begin, DQ Scan Range 701~765
1991 09:56:22.547981
1992 09:56:22.548284
1993 09:56:22.550817 TX Vref Scan disable
1994 09:56:22.554390 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1995 09:56:22.557777 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1996 09:56:22.560969 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1997 09:56:22.564684 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1998 09:56:22.568018 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1999 09:56:22.571321 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2000 09:56:22.574569 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2001 09:56:22.578020 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2002 09:56:22.581424 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2003 09:56:22.584502 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2004 09:56:22.587953 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2005 09:56:22.591390 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2006 09:56:22.594684 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2007 09:56:22.598083 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2008 09:56:22.601165 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2009 09:56:22.610898 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2010 09:56:22.614557 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2011 09:56:22.617826 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2012 09:56:22.621054 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2013 09:56:22.624626 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2014 09:56:22.628031 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2015 09:56:22.631460 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2016 09:56:22.634504 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2017 09:56:22.637787 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2018 09:56:22.641166 Byte0, DQ PI dly=729, DQM PI dly= 729
2019 09:56:22.644939 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2020 09:56:22.645447
2021 09:56:22.651315 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2022 09:56:22.652012
2023 09:56:22.654605 Byte1, DQ PI dly=722, DQM PI dly= 722
2024 09:56:22.658353 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2025 09:56:22.658866
2026 09:56:22.661849 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2027 09:56:22.662325
2028 09:56:22.668069 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2029 09:56:22.674860 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2030 09:56:22.681545 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2031 09:56:22.688416 wait MRW command Rank1 MR3 =0x30 fired (1)
2032 09:56:22.688896 Write Rank1 MR3 =0x30
2033 09:56:22.692012 DramC Write-DBI off
2034 09:56:22.692524
2035 09:56:22.692864 [DATLAT]
2036 09:56:22.695208 Freq=1600, CH0 RK1, use_rxtx_scan=0
2037 09:56:22.695639
2038 09:56:22.698527 DATLAT Default: 0x10
2039 09:56:22.698991 7, 0xFFFF, sum=0
2040 09:56:22.699308 8, 0xFFFF, sum=0
2041 09:56:22.701721 9, 0xFFFF, sum=0
2042 09:56:22.702115 10, 0xFFFF, sum=0
2043 09:56:22.705350 11, 0xFFFF, sum=0
2044 09:56:22.705885 12, 0xFFFF, sum=0
2045 09:56:22.708766 13, 0xFFFF, sum=0
2046 09:56:22.709241 14, 0x0, sum=1
2047 09:56:22.711950 15, 0x0, sum=2
2048 09:56:22.712610 16, 0x0, sum=3
2049 09:56:22.714929 17, 0x0, sum=4
2050 09:56:22.718382 pattern=2 first_step=14 total pass=5 best_step=16
2051 09:56:22.718814 ==
2052 09:56:22.722306 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2053 09:56:22.725473 fsp= 1, odt_onoff= 1, Byte mode= 0
2054 09:56:22.725906 ==
2055 09:56:22.731811 Start DQ dly to find pass range UseTestEngine =1
2056 09:56:22.735194 x-axis: bit #, y-axis: DQ dly (-127~63)
2057 09:56:22.735628 RX Vref Scan = 0
2058 09:56:22.738426 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2059 09:56:22.742145 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2060 09:56:22.746018 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2061 09:56:22.750187 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2062 09:56:22.750672 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2063 09:56:22.753553 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2064 09:56:22.757139 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2065 09:56:22.760527 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2066 09:56:22.764189 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2067 09:56:22.764589 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2068 09:56:22.767263 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2069 09:56:22.770675 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2070 09:56:22.774032 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2071 09:56:22.777435 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2072 09:56:22.781070 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2073 09:56:22.784250 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2074 09:56:22.787354 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2075 09:56:22.787748 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2076 09:56:22.792018 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2077 09:56:22.794176 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2078 09:56:22.798145 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2079 09:56:22.801177 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2080 09:56:22.804864 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2081 09:56:22.805386 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2082 09:56:22.808065 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2083 09:56:22.811253 -1, [0] xxxoxoxx xxxxxxxx [MSB]
2084 09:56:22.814391 0, [0] xxxoxoxx oxxoxxxx [MSB]
2085 09:56:22.817865 1, [0] xxxoxoxx oxxoxxxx [MSB]
2086 09:56:22.821667 2, [0] xxxoxoox oxxoxoox [MSB]
2087 09:56:22.822184 3, [0] xxxoxooo ooxooooo [MSB]
2088 09:56:22.824526 4, [0] xxxoxooo ooxooooo [MSB]
2089 09:56:22.828087 5, [0] xoxoxooo ooxooooo [MSB]
2090 09:56:22.831715 6, [0] xoxooooo oooooooo [MSB]
2091 09:56:22.835732 32, [0] oooxoooo oooooooo [MSB]
2092 09:56:22.839598 33, [0] oooxoooo oooooooo [MSB]
2093 09:56:22.840034 34, [0] oooxoxoo oooooxoo [MSB]
2094 09:56:22.843572 35, [0] oooxoxxx oooxoxxo [MSB]
2095 09:56:22.847761 36, [0] oooxoxxx xooxoxxo [MSB]
2096 09:56:22.851127 37, [0] oooxoxxx xxoxoxxo [MSB]
2097 09:56:22.851565 38, [0] oooxoxxx xxoxxxxx [MSB]
2098 09:56:22.854677 39, [0] oooxoxxx xxoxxxxx [MSB]
2099 09:56:22.857693 40, [0] ooxxoxxx xxxxxxxx [MSB]
2100 09:56:22.861442 41, [0] oxxxxxxx xxxxxxxx [MSB]
2101 09:56:22.864613 42, [0] xxxxxxxx xxxxxxxx [MSB]
2102 09:56:22.867659 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
2103 09:56:22.871305 iDelay=42, Bit 1, Center 22 (5 ~ 40) 36
2104 09:56:22.874703 iDelay=42, Bit 2, Center 23 (7 ~ 39) 33
2105 09:56:22.877653 iDelay=42, Bit 3, Center 14 (-3 ~ 31) 35
2106 09:56:22.881292 iDelay=42, Bit 4, Center 23 (6 ~ 40) 35
2107 09:56:22.884779 iDelay=42, Bit 5, Center 16 (-1 ~ 33) 35
2108 09:56:22.887792 iDelay=42, Bit 6, Center 18 (2 ~ 34) 33
2109 09:56:22.890895 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
2110 09:56:22.894403 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2111 09:56:22.901523 iDelay=42, Bit 9, Center 19 (3 ~ 36) 34
2112 09:56:22.904579 iDelay=42, Bit 10, Center 22 (6 ~ 39) 34
2113 09:56:22.908217 iDelay=42, Bit 11, Center 17 (0 ~ 34) 35
2114 09:56:22.911050 iDelay=42, Bit 12, Center 20 (3 ~ 37) 35
2115 09:56:22.915208 iDelay=42, Bit 13, Center 17 (2 ~ 33) 32
2116 09:56:22.918581 iDelay=42, Bit 14, Center 18 (2 ~ 34) 33
2117 09:56:22.921835 iDelay=42, Bit 15, Center 20 (3 ~ 37) 35
2118 09:56:22.922295 ==
2119 09:56:22.925284 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2120 09:56:22.928306 fsp= 1, odt_onoff= 1, Byte mode= 0
2121 09:56:22.928614 ==
2122 09:56:22.931781 DQS Delay:
2123 09:56:22.932086 DQS0 = 0, DQS1 = 0
2124 09:56:22.934939 DQM Delay:
2125 09:56:22.935166 DQM0 = 19, DQM1 = 18
2126 09:56:22.935341 DQ Delay:
2127 09:56:22.938474 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =14
2128 09:56:22.941727 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
2129 09:56:22.945076 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
2130 09:56:22.948202 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
2131 09:56:22.948339
2132 09:56:22.948438
2133 09:56:22.948526
2134 09:56:22.951699 [DramC_TX_OE_Calibration] TA2
2135 09:56:22.955508 Original DQ_B0 (3 6) =30, OEN = 27
2136 09:56:22.958321 Original DQ_B1 (3 6) =30, OEN = 27
2137 09:56:22.961809 23, 0x0, End_B0=23 End_B1=23
2138 09:56:22.965135 24, 0x0, End_B0=24 End_B1=24
2139 09:56:22.965246 25, 0x0, End_B0=25 End_B1=25
2140 09:56:22.968405 26, 0x0, End_B0=26 End_B1=26
2141 09:56:22.971718 27, 0x0, End_B0=27 End_B1=27
2142 09:56:22.975207 28, 0x0, End_B0=28 End_B1=28
2143 09:56:22.975295 29, 0x0, End_B0=29 End_B1=29
2144 09:56:22.978812 30, 0x0, End_B0=30 End_B1=30
2145 09:56:22.981986 31, 0xFFFF, End_B0=30 End_B1=30
2146 09:56:22.988875 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2147 09:56:22.992165 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2148 09:56:22.992558
2149 09:56:22.992856
2150 09:56:22.995794 Write Rank1 MR23 =0x3f
2151 09:56:22.996273 [DQSOSC]
2152 09:56:23.005889 [DQSOSCAuto] RK1, (LSB)MR18= 0x8b, (MSB)MR19= 0x3, tDQSOscB0 = 347 ps tDQSOscB1 = 0 ps
2153 09:56:23.009386 CH0_RK1: MR19=0x3, MR18=0x8B, DQSOSC=347, MR23=63, INC=20, DEC=30
2154 09:56:23.012303 Write Rank1 MR23 =0x3f
2155 09:56:23.012740 [DQSOSC]
2156 09:56:23.019513 [DQSOSCAuto] RK1, (LSB)MR18= 0x8f, (MSB)MR19= 0x3, tDQSOscB0 = 345 ps tDQSOscB1 = 0 ps
2157 09:56:23.022671 CH0 RK1: MR19=3, MR18=8F
2158 09:56:23.026594 [RxdqsGatingPostProcess] freq 1600
2159 09:56:23.032743 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2160 09:56:23.033178 Rank: 0
2161 09:56:23.035980 best DQS0 dly(2T, 0.5T) = (2, 5)
2162 09:56:23.039622 best DQS1 dly(2T, 0.5T) = (2, 5)
2163 09:56:23.042863 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2164 09:56:23.046154 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2165 09:56:23.046664 Rank: 1
2166 09:56:23.049242 best DQS0 dly(2T, 0.5T) = (2, 6)
2167 09:56:23.052833 best DQS1 dly(2T, 0.5T) = (2, 6)
2168 09:56:23.053221 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2169 09:56:23.056290 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2170 09:56:23.062773 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2171 09:56:23.066152 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2172 09:56:23.069599 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2173 09:56:23.073050 Write Rank0 MR13 =0x59
2174 09:56:23.073523 ==
2175 09:56:23.076506 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2176 09:56:23.080001 fsp= 1, odt_onoff= 1, Byte mode= 0
2177 09:56:23.080483 ==
2178 09:56:23.082930 === u2Vref_new: 0x56 --> 0x3a
2179 09:56:23.085956 === u2Vref_new: 0x58 --> 0x58
2180 09:56:23.089448 === u2Vref_new: 0x5a --> 0x5a
2181 09:56:23.092595 === u2Vref_new: 0x5c --> 0x78
2182 09:56:23.096361 === u2Vref_new: 0x5e --> 0x7a
2183 09:56:23.099549 === u2Vref_new: 0x60 --> 0x90
2184 09:56:23.100111
2185 09:56:23.103056 CBT Vref found, early break!
2186 09:56:23.106445 [CA 0] Center 37 (11~63) winsize 53
2187 09:56:23.109699 [CA 1] Center 36 (9~63) winsize 55
2188 09:56:23.113303 [CA 2] Center 33 (4~63) winsize 60
2189 09:56:23.116475 [CA 3] Center 33 (4~63) winsize 60
2190 09:56:23.119870 [CA 4] Center 34 (6~63) winsize 58
2191 09:56:23.120342 [CA 5] Center 28 (-1~57) winsize 59
2192 09:56:23.123260
2193 09:56:23.126579 [CATrainingPosCal] consider 1 rank data
2194 09:56:23.127101 u2DelayCellTimex100 = 762/100 ps
2195 09:56:23.132899 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2196 09:56:23.136469 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2197 09:56:23.139494 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2198 09:56:23.143316 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2199 09:56:23.146795 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2200 09:56:23.149625 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2201 09:56:23.150013
2202 09:56:23.153340 CA PerBit enable=1, Macro0, CA PI delay=28
2203 09:56:23.156676 === u2Vref_new: 0x56 --> 0x3a
2204 09:56:23.157150
2205 09:56:23.159901 Vref(ca) range 1: 22
2206 09:56:23.160372
2207 09:56:23.160676 CS Dly= 13 (44-0-32)
2208 09:56:23.163478 Write Rank0 MR13 =0xd8
2209 09:56:23.163953 Write Rank0 MR13 =0xd8
2210 09:56:23.166738 Write Rank0 MR12 =0x56
2211 09:56:23.170008 Write Rank1 MR13 =0x59
2212 09:56:23.170443 ==
2213 09:56:23.173283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2214 09:56:23.176982 fsp= 1, odt_onoff= 1, Byte mode= 0
2215 09:56:23.177470 ==
2216 09:56:23.180274 === u2Vref_new: 0x56 --> 0x3a
2217 09:56:23.183264 === u2Vref_new: 0x58 --> 0x58
2218 09:56:23.186991 === u2Vref_new: 0x5a --> 0x5a
2219 09:56:23.190020 === u2Vref_new: 0x5c --> 0x78
2220 09:56:23.193357 === u2Vref_new: 0x5e --> 0x7a
2221 09:56:23.196720 === u2Vref_new: 0x60 --> 0x90
2222 09:56:23.197152
2223 09:56:23.199989 CBT Vref found, early break!
2224 09:56:23.203557 [CA 0] Center 37 (11~63) winsize 53
2225 09:56:23.206983 [CA 1] Center 35 (8~63) winsize 56
2226 09:56:23.207459 [CA 2] Center 33 (4~63) winsize 60
2227 09:56:23.210603 [CA 3] Center 33 (4~63) winsize 60
2228 09:56:23.213543 [CA 4] Center 35 (7~63) winsize 57
2229 09:56:23.216826 [CA 5] Center 28 (-1~57) winsize 59
2230 09:56:23.217216
2231 09:56:23.220808 [CATrainingPosCal] consider 2 rank data
2232 09:56:23.223913 u2DelayCellTimex100 = 762/100 ps
2233 09:56:23.226933 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2234 09:56:23.230481 CA1 delay=36 (9~63),Diff = 8 PI (10 cell)
2235 09:56:23.233750 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2236 09:56:23.240457 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2237 09:56:23.244296 CA4 delay=35 (7~63),Diff = 7 PI (8 cell)
2238 09:56:23.247799 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2239 09:56:23.248319
2240 09:56:23.250775 CA PerBit enable=1, Macro0, CA PI delay=28
2241 09:56:23.254255 === u2Vref_new: 0x56 --> 0x3a
2242 09:56:23.255057
2243 09:56:23.255641 Vref(ca) range 1: 22
2244 09:56:23.256060
2245 09:56:23.257253 CS Dly= 12 (43-0-32)
2246 09:56:23.261031 Write Rank1 MR13 =0xd8
2247 09:56:23.261553 Write Rank1 MR13 =0xd8
2248 09:56:23.264174 Write Rank1 MR12 =0x56
2249 09:56:23.267551 [RankSwap] Rank num 2, (Multi 1), Rank 0
2250 09:56:23.267983 Write Rank0 MR2 =0xad
2251 09:56:23.271284 [Write Leveling]
2252 09:56:23.274440 delay byte0 byte1 byte2 byte3
2253 09:56:23.274970
2254 09:56:23.275462 10 0 0
2255 09:56:23.277569 11 0 0
2256 09:56:23.278007 12 0 0
2257 09:56:23.281129 13 0 0
2258 09:56:23.281649 14 0 0
2259 09:56:23.281993 15 0 0
2260 09:56:23.284448 16 0 0
2261 09:56:23.285004 17 0 0
2262 09:56:23.288263 18 0 0
2263 09:56:23.288787 19 0 0
2264 09:56:23.289131 20 0 0
2265 09:56:23.291446 21 0 0
2266 09:56:23.291972 22 0 0
2267 09:56:23.294607 23 0 0
2268 09:56:23.295131 24 0 0
2269 09:56:23.295479 25 0 0
2270 09:56:23.297619 26 0 0
2271 09:56:23.298057 27 0 0
2272 09:56:23.301230 28 0 0
2273 09:56:23.301666 29 0 0
2274 09:56:23.302005 30 0 0
2275 09:56:23.304648 31 0 0
2276 09:56:23.305164 32 0 0
2277 09:56:23.308226 33 0 ff
2278 09:56:23.308743 34 0 ff
2279 09:56:23.311593 35 0 ff
2280 09:56:23.312112 36 ff ff
2281 09:56:23.314848 37 ff ff
2282 09:56:23.315369 38 ff ff
2283 09:56:23.315716 39 ff ff
2284 09:56:23.318787 40 ff ff
2285 09:56:23.319304 41 ff ff
2286 09:56:23.321495 42 ff ff
2287 09:56:23.324874 pass bytecount = 0xff (0xff: all bytes pass)
2288 09:56:23.325310
2289 09:56:23.325648 DQS0 dly: 36
2290 09:56:23.328137 DQS1 dly: 33
2291 09:56:23.328568 Write Rank0 MR2 =0x2d
2292 09:56:23.331868 [RankSwap] Rank num 2, (Multi 1), Rank 0
2293 09:56:23.334931 Write Rank0 MR1 =0xd6
2294 09:56:23.335446 [Gating]
2295 09:56:23.335784 ==
2296 09:56:23.341550 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2297 09:56:23.344988 fsp= 1, odt_onoff= 1, Byte mode= 0
2298 09:56:23.345421 ==
2299 09:56:23.348791 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2300 09:56:23.351832 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2301 09:56:23.358507 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2302 09:56:23.361808 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2303 09:56:23.365305 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2304 09:56:23.372211 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2305 09:56:23.375120 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2306 09:56:23.378349 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2307 09:56:23.385126 3 2 0 |403 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2308 09:56:23.388596 3 2 4 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2309 09:56:23.392008 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2310 09:56:23.395372 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2311 09:56:23.402197 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2312 09:56:23.405674 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2313 09:56:23.408889 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2314 09:56:23.415647 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2315 09:56:23.418759 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2316 09:56:23.422014 3 3 4 |605 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2317 09:56:23.425948 3 3 8 |b0a 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2318 09:56:23.432352 [Byte 0] Lead/lag Transition tap number (1)
2319 09:56:23.435907 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2320 09:56:23.438884 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2321 09:56:23.445914 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2322 09:56:23.449360 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2323 09:56:23.452467 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2324 09:56:23.455711 3 4 0 |908 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2325 09:56:23.462486 3 4 4 |3d3d 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
2326 09:56:23.465716 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2327 09:56:23.469202 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2328 09:56:23.475960 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2329 09:56:23.479647 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2330 09:56:23.483143 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2331 09:56:23.486248 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2332 09:56:23.493106 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2333 09:56:23.496306 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2334 09:56:23.499528 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2335 09:56:23.506628 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2336 09:56:23.509918 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2337 09:56:23.512922 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2338 09:56:23.520043 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2339 09:56:23.522887 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2340 09:56:23.526517 [Byte 0] Lead/lag Transition tap number (2)
2341 09:56:23.529835 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2342 09:56:23.536276 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2343 09:56:23.539454 3 6 0 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2344 09:56:23.542754 [Byte 1] Lead/lag Transition tap number (3)
2345 09:56:23.546312 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
2346 09:56:23.549541 [Byte 0]First pass (3, 6, 4)
2347 09:56:23.553026 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2348 09:56:23.556573 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2349 09:56:23.560065 [Byte 1]First pass (3, 6, 12)
2350 09:56:23.563230 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2351 09:56:23.569550 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2352 09:56:23.573181 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2353 09:56:23.576780 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2354 09:56:23.579785 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2355 09:56:23.582674 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2356 09:56:23.589815 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2357 09:56:23.593015 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2358 09:56:23.596719 All bytes gating window > 1UI, Early break!
2359 09:56:23.597228
2360 09:56:23.599859 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2361 09:56:23.600282
2362 09:56:23.603137 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2363 09:56:23.603565
2364 09:56:23.603890
2365 09:56:23.604189
2366 09:56:23.610139 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2367 09:56:23.610695
2368 09:56:23.613420 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2369 09:56:23.613927
2370 09:56:23.614313
2371 09:56:23.616385 Write Rank0 MR1 =0x56
2372 09:56:23.616808
2373 09:56:23.617139 best RODT dly(2T, 0.5T) = (2, 2)
2374 09:56:23.617452
2375 09:56:23.619973 best RODT dly(2T, 0.5T) = (2, 2)
2376 09:56:23.620481 ==
2377 09:56:23.626662 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2378 09:56:23.630056 fsp= 1, odt_onoff= 1, Byte mode= 0
2379 09:56:23.630609 ==
2380 09:56:23.633254 Start DQ dly to find pass range UseTestEngine =0
2381 09:56:23.636569 x-axis: bit #, y-axis: DQ dly (-127~63)
2382 09:56:23.639898 RX Vref Scan = 0
2383 09:56:23.643324 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2384 09:56:23.646568 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2385 09:56:23.647007 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2386 09:56:23.649734 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2387 09:56:23.653542 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2388 09:56:23.656835 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2389 09:56:23.660334 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2390 09:56:23.663726 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2391 09:56:23.667048 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2392 09:56:23.667566 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2393 09:56:23.670059 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2394 09:56:23.673716 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2395 09:56:23.677197 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2396 09:56:23.680190 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2397 09:56:23.683668 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2398 09:56:23.687205 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2399 09:56:23.690500 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2400 09:56:23.691021 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2401 09:56:23.693511 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2402 09:56:23.696807 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2403 09:56:23.700043 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2404 09:56:23.703580 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2405 09:56:23.706783 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2406 09:56:23.710110 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2407 09:56:23.710587 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2408 09:56:23.713572 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2409 09:56:23.717136 0, [0] xxxoxxxx xxxxxxxo [MSB]
2410 09:56:23.719988 1, [0] xxooxxxx xxoxxxxo [MSB]
2411 09:56:23.723564 2, [0] xxooxxxo oxoxxxxo [MSB]
2412 09:56:23.726695 3, [0] xxoooxxo oooxxxxo [MSB]
2413 09:56:23.727104 4, [0] xxoooxxo oooxxxxo [MSB]
2414 09:56:23.730168 5, [0] xxoooxxo ooooxooo [MSB]
2415 09:56:23.733676 6, [0] xooooxxo oooooooo [MSB]
2416 09:56:23.736854 31, [0] oooxoooo oooooooo [MSB]
2417 09:56:23.740210 32, [0] ooxxoooo ooooooox [MSB]
2418 09:56:23.743691 33, [0] ooxxoooo oxooooox [MSB]
2419 09:56:23.746933 34, [0] ooxxoooo oxxxooox [MSB]
2420 09:56:23.747337 35, [0] ooxxoooo xxxxooxx [MSB]
2421 09:56:23.750195 36, [0] ooxxxoox xxxxooxx [MSB]
2422 09:56:23.753584 37, [0] ooxxxoox xxxxoxxx [MSB]
2423 09:56:23.756692 38, [0] ooxxxoox xxxxoxxx [MSB]
2424 09:56:23.760529 39, [0] ooxxxoox xxxxxxxx [MSB]
2425 09:56:23.763870 40, [0] ooxxxoxx xxxxxxxx [MSB]
2426 09:56:23.764505 41, [0] xxxxxxxx xxxxxxxx [MSB]
2427 09:56:23.770274 iDelay=41, Bit 0, Center 23 (7 ~ 40) 34
2428 09:56:23.774014 iDelay=41, Bit 1, Center 23 (6 ~ 40) 35
2429 09:56:23.776871 iDelay=41, Bit 2, Center 16 (1 ~ 31) 31
2430 09:56:23.780390 iDelay=41, Bit 3, Center 15 (0 ~ 30) 31
2431 09:56:23.783518 iDelay=41, Bit 4, Center 19 (3 ~ 35) 33
2432 09:56:23.786989 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2433 09:56:23.790169 iDelay=41, Bit 6, Center 23 (7 ~ 39) 33
2434 09:56:23.793478 iDelay=41, Bit 7, Center 18 (2 ~ 35) 34
2435 09:56:23.797230 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
2436 09:56:23.800080 iDelay=41, Bit 9, Center 17 (3 ~ 32) 30
2437 09:56:23.803738 iDelay=41, Bit 10, Center 17 (1 ~ 33) 33
2438 09:56:23.806943 iDelay=41, Bit 11, Center 19 (5 ~ 33) 29
2439 09:56:23.810710 iDelay=41, Bit 12, Center 22 (6 ~ 38) 33
2440 09:56:23.813624 iDelay=41, Bit 13, Center 20 (5 ~ 36) 32
2441 09:56:23.816925 iDelay=41, Bit 14, Center 19 (5 ~ 34) 30
2442 09:56:23.823655 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
2443 09:56:23.824182 ==
2444 09:56:23.827353 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2445 09:56:23.830314 fsp= 1, odt_onoff= 1, Byte mode= 0
2446 09:56:23.830763 ==
2447 09:56:23.833897 DQS Delay:
2448 09:56:23.834470 DQS0 = 0, DQS1 = 0
2449 09:56:23.834913 DQM Delay:
2450 09:56:23.836857 DQM0 = 20, DQM1 = 18
2451 09:56:23.837300 DQ Delay:
2452 09:56:23.840811 DQ0 =23, DQ1 =23, DQ2 =16, DQ3 =15
2453 09:56:23.843665 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =18
2454 09:56:23.847178 DQ8 =18, DQ9 =17, DQ10 =17, DQ11 =19
2455 09:56:23.850445 DQ12 =22, DQ13 =20, DQ14 =19, DQ15 =15
2456 09:56:23.850889
2457 09:56:23.851322
2458 09:56:23.853742 DramC Write-DBI off
2459 09:56:23.854181 ==
2460 09:56:23.857050 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2461 09:56:23.860407 fsp= 1, odt_onoff= 1, Byte mode= 0
2462 09:56:23.860855 ==
2463 09:56:23.866886 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2464 09:56:23.867331
2465 09:56:23.867761 Begin, DQ Scan Range 929~1185
2466 09:56:23.870148
2467 09:56:23.870586
2468 09:56:23.870979 TX Vref Scan disable
2469 09:56:23.873576 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2470 09:56:23.876794 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2471 09:56:23.880571 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2472 09:56:23.883556 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2473 09:56:23.887007 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2474 09:56:23.890478 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2475 09:56:23.897149 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2476 09:56:23.900385 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2477 09:56:23.903844 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2478 09:56:23.907337 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2479 09:56:23.910576 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2480 09:56:23.914277 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2481 09:56:23.917251 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2482 09:56:23.920567 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2483 09:56:23.923832 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2484 09:56:23.927450 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2485 09:56:23.930615 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2486 09:56:23.934209 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2487 09:56:23.937340 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2488 09:56:23.940356 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2489 09:56:23.943987 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2490 09:56:23.947175 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2491 09:56:23.950552 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2492 09:56:23.957000 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2493 09:56:23.960755 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2494 09:56:23.964112 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2495 09:56:23.966946 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2496 09:56:23.970489 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2497 09:56:23.974258 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2498 09:56:23.977360 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2499 09:56:23.980709 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2500 09:56:23.983751 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2501 09:56:23.987663 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2502 09:56:23.990551 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2503 09:56:23.994315 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2504 09:56:23.997218 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2505 09:56:24.000594 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2506 09:56:24.004508 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2507 09:56:24.007551 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2508 09:56:24.010906 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2509 09:56:24.014193 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2510 09:56:24.017148 970 |3 6 10|[0] xxxxxxxx oooxxxoo [MSB]
2511 09:56:24.020672 971 |3 6 11|[0] xxxoxxxx oooooxoo [MSB]
2512 09:56:24.024093 972 |3 6 12|[0] xxxoxxxx oooooooo [MSB]
2513 09:56:24.030919 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2514 09:56:24.034359 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2515 09:56:24.037335 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
2516 09:56:24.040463 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2517 09:56:24.044261 992 |3 6 32|[0] oooooooo oxxxxxxx [MSB]
2518 09:56:24.050617 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
2519 09:56:24.054026 994 |3 6 34|[0] ooxxoooo xxxxxxxx [MSB]
2520 09:56:24.057452 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2521 09:56:24.060371 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2522 09:56:24.064081 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
2523 09:56:24.067391 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2524 09:56:24.070653 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2525 09:56:24.074041 Byte0, DQ PI dly=984, DQM PI dly= 984
2526 09:56:24.077134 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2527 09:56:24.077661
2528 09:56:24.083768 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2529 09:56:24.084285
2530 09:56:24.087200 Byte1, DQ PI dly=980, DQM PI dly= 980
2531 09:56:24.090899 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2532 09:56:24.091432
2533 09:56:24.093944 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2534 09:56:24.094537
2535 09:56:24.094979 ==
2536 09:56:24.100328 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2537 09:56:24.104043 fsp= 1, odt_onoff= 1, Byte mode= 0
2538 09:56:24.104595 ==
2539 09:56:24.107533 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2540 09:56:24.108052
2541 09:56:24.110700 Begin, DQ Scan Range 956~1020
2542 09:56:24.113900 Write Rank0 MR14 =0x0
2543 09:56:24.120659
2544 09:56:24.121087 CH=1, VrefRange= 0, VrefLevel = 0
2545 09:56:24.128000 TX Bit0 (979~996) 18 987, Bit8 (971~990) 20 980,
2546 09:56:24.131459 TX Bit1 (977~994) 18 985, Bit9 (971~989) 19 980,
2547 09:56:24.134428 TX Bit2 (976~990) 15 983, Bit10 (974~989) 16 981,
2548 09:56:24.141059 TX Bit3 (975~989) 15 982, Bit11 (975~990) 16 982,
2549 09:56:24.144454 TX Bit4 (976~991) 16 983, Bit12 (975~992) 18 983,
2550 09:56:24.151050 TX Bit5 (978~997) 20 987, Bit13 (976~991) 16 983,
2551 09:56:24.154463 TX Bit6 (978~997) 20 987, Bit14 (974~990) 17 982,
2552 09:56:24.157806 TX Bit7 (977~991) 15 984, Bit15 (970~987) 18 978,
2553 09:56:24.158364
2554 09:56:24.160855 Write Rank0 MR14 =0x2
2555 09:56:24.169304
2556 09:56:24.169819 CH=1, VrefRange= 0, VrefLevel = 2
2557 09:56:24.175959 TX Bit0 (978~997) 20 987, Bit8 (971~991) 21 981,
2558 09:56:24.179218 TX Bit1 (977~995) 19 986, Bit9 (971~989) 19 980,
2559 09:56:24.186071 TX Bit2 (976~990) 15 983, Bit10 (973~990) 18 981,
2560 09:56:24.189387 TX Bit3 (974~990) 17 982, Bit11 (973~992) 20 982,
2561 09:56:24.192788 TX Bit4 (976~992) 17 984, Bit12 (974~992) 19 983,
2562 09:56:24.199457 TX Bit5 (978~997) 20 987, Bit13 (976~991) 16 983,
2563 09:56:24.202693 TX Bit6 (978~997) 20 987, Bit14 (974~990) 17 982,
2564 09:56:24.206326 TX Bit7 (977~992) 16 984, Bit15 (970~987) 18 978,
2565 09:56:24.206758
2566 09:56:24.209694 Write Rank0 MR14 =0x4
2567 09:56:24.217776
2568 09:56:24.218311 CH=1, VrefRange= 0, VrefLevel = 4
2569 09:56:24.224712 TX Bit0 (978~997) 20 987, Bit8 (971~991) 21 981,
2570 09:56:24.227978 TX Bit1 (977~996) 20 986, Bit9 (971~990) 20 980,
2571 09:56:24.234475 TX Bit2 (976~991) 16 983, Bit10 (972~990) 19 981,
2572 09:56:24.238057 TX Bit3 (974~990) 17 982, Bit11 (973~992) 20 982,
2573 09:56:24.240944 TX Bit4 (976~993) 18 984, Bit12 (974~992) 19 983,
2574 09:56:24.248056 TX Bit5 (977~997) 21 987, Bit13 (975~991) 17 983,
2575 09:56:24.251136 TX Bit6 (977~997) 21 987, Bit14 (973~991) 19 982,
2576 09:56:24.254467 TX Bit7 (977~992) 16 984, Bit15 (970~988) 19 979,
2577 09:56:24.254977
2578 09:56:24.257654 Write Rank0 MR14 =0x6
2579 09:56:24.266183
2580 09:56:24.266731 CH=1, VrefRange= 0, VrefLevel = 6
2581 09:56:24.272871 TX Bit0 (978~997) 20 987, Bit8 (970~991) 22 980,
2582 09:56:24.276277 TX Bit1 (977~996) 20 986, Bit9 (971~991) 21 981,
2583 09:56:24.283002 TX Bit2 (976~991) 16 983, Bit10 (972~991) 20 981,
2584 09:56:24.286553 TX Bit3 (974~990) 17 982, Bit11 (972~992) 21 982,
2585 09:56:24.289787 TX Bit4 (976~993) 18 984, Bit12 (973~993) 21 983,
2586 09:56:24.296322 TX Bit5 (977~997) 21 987, Bit13 (975~992) 18 983,
2587 09:56:24.300432 TX Bit6 (977~997) 21 987, Bit14 (972~991) 20 981,
2588 09:56:24.302588 TX Bit7 (976~992) 17 984, Bit15 (969~988) 20 978,
2589 09:56:24.303023
2590 09:56:24.305762 Write Rank0 MR14 =0x8
2591 09:56:24.314766
2592 09:56:24.315278 CH=1, VrefRange= 0, VrefLevel = 8
2593 09:56:24.321388 TX Bit0 (977~998) 22 987, Bit8 (970~992) 23 981,
2594 09:56:24.324656 TX Bit1 (977~996) 20 986, Bit9 (971~991) 21 981,
2595 09:56:24.331322 TX Bit2 (976~991) 16 983, Bit10 (972~992) 21 982,
2596 09:56:24.334733 TX Bit3 (973~991) 19 982, Bit11 (972~992) 21 982,
2597 09:56:24.337954 TX Bit4 (976~994) 19 985, Bit12 (973~993) 21 983,
2598 09:56:24.344403 TX Bit5 (977~998) 22 987, Bit13 (974~992) 19 983,
2599 09:56:24.348263 TX Bit6 (977~998) 22 987, Bit14 (972~992) 21 982,
2600 09:56:24.351253 TX Bit7 (976~993) 18 984, Bit15 (969~989) 21 979,
2601 09:56:24.351766
2602 09:56:24.354379 Write Rank0 MR14 =0xa
2603 09:56:24.363339
2604 09:56:24.366806 CH=1, VrefRange= 0, VrefLevel = 10
2605 09:56:24.369960 TX Bit0 (977~998) 22 987, Bit8 (970~992) 23 981,
2606 09:56:24.373316 TX Bit1 (976~997) 22 986, Bit9 (970~991) 22 980,
2607 09:56:24.380122 TX Bit2 (975~992) 18 983, Bit10 (972~992) 21 982,
2608 09:56:24.383190 TX Bit3 (972~991) 20 981, Bit11 (972~992) 21 982,
2609 09:56:24.386911 TX Bit4 (976~995) 20 985, Bit12 (973~993) 21 983,
2610 09:56:24.393731 TX Bit5 (977~998) 22 987, Bit13 (974~992) 19 983,
2611 09:56:24.396703 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
2612 09:56:24.400010 TX Bit7 (976~994) 19 985, Bit15 (969~989) 21 979,
2613 09:56:24.400440
2614 09:56:24.403194 Write Rank0 MR14 =0xc
2615 09:56:24.412213
2616 09:56:24.412751 CH=1, VrefRange= 0, VrefLevel = 12
2617 09:56:24.418446 TX Bit0 (977~998) 22 987, Bit8 (970~992) 23 981,
2618 09:56:24.422058 TX Bit1 (976~997) 22 986, Bit9 (970~991) 22 980,
2619 09:56:24.428814 TX Bit2 (975~992) 18 983, Bit10 (972~992) 21 982,
2620 09:56:24.432306 TX Bit3 (972~992) 21 982, Bit11 (971~993) 23 982,
2621 09:56:24.435533 TX Bit4 (976~995) 20 985, Bit12 (972~993) 22 982,
2622 09:56:24.442080 TX Bit5 (977~998) 22 987, Bit13 (973~992) 20 982,
2623 09:56:24.445494 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
2624 09:56:24.448856 TX Bit7 (976~994) 19 985, Bit15 (969~990) 22 979,
2625 09:56:24.449374
2626 09:56:24.452045 Write Rank0 MR14 =0xe
2627 09:56:24.460579
2628 09:56:24.463583 CH=1, VrefRange= 0, VrefLevel = 14
2629 09:56:24.467127 TX Bit0 (977~998) 22 987, Bit8 (969~992) 24 980,
2630 09:56:24.470395 TX Bit1 (976~997) 22 986, Bit9 (970~992) 23 981,
2631 09:56:24.477480 TX Bit2 (975~993) 19 984, Bit10 (970~992) 23 981,
2632 09:56:24.481079 TX Bit3 (972~992) 21 982, Bit11 (971~993) 23 982,
2633 09:56:24.484030 TX Bit4 (975~996) 22 985, Bit12 (971~994) 24 982,
2634 09:56:24.491081 TX Bit5 (977~998) 22 987, Bit13 (973~993) 21 983,
2635 09:56:24.494480 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
2636 09:56:24.497788 TX Bit7 (976~995) 20 985, Bit15 (969~991) 23 980,
2637 09:56:24.498353
2638 09:56:24.500849 Write Rank0 MR14 =0x10
2639 09:56:24.509545
2640 09:56:24.512975 CH=1, VrefRange= 0, VrefLevel = 16
2641 09:56:24.515932 TX Bit0 (977~999) 23 988, Bit8 (970~992) 23 981,
2642 09:56:24.519608 TX Bit1 (976~997) 22 986, Bit9 (970~992) 23 981,
2643 09:56:24.526341 TX Bit2 (974~993) 20 983, Bit10 (970~992) 23 981,
2644 09:56:24.529746 TX Bit3 (971~993) 23 982, Bit11 (971~993) 23 982,
2645 09:56:24.532685 TX Bit4 (975~997) 23 986, Bit12 (971~994) 24 982,
2646 09:56:24.539779 TX Bit5 (976~998) 23 987, Bit13 (972~993) 22 982,
2647 09:56:24.542608 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
2648 09:56:24.546386 TX Bit7 (976~996) 21 986, Bit15 (969~991) 23 980,
2649 09:56:24.546911
2650 09:56:24.549603 Write Rank0 MR14 =0x12
2651 09:56:24.558507
2652 09:56:24.561776 CH=1, VrefRange= 0, VrefLevel = 18
2653 09:56:24.565096 TX Bit0 (977~999) 23 988, Bit8 (969~992) 24 980,
2654 09:56:24.568421 TX Bit1 (976~998) 23 987, Bit9 (970~992) 23 981,
2655 09:56:24.575216 TX Bit2 (974~994) 21 984, Bit10 (970~993) 24 981,
2656 09:56:24.578120 TX Bit3 (971~993) 23 982, Bit11 (971~993) 23 982,
2657 09:56:24.581509 TX Bit4 (975~997) 23 986, Bit12 (971~994) 24 982,
2658 09:56:24.588534 TX Bit5 (976~999) 24 987, Bit13 (972~993) 22 982,
2659 09:56:24.591733 TX Bit6 (977~999) 23 988, Bit14 (971~993) 23 982,
2660 09:56:24.595046 TX Bit7 (975~997) 23 986, Bit15 (968~992) 25 980,
2661 09:56:24.595481
2662 09:56:24.598621 Write Rank0 MR14 =0x14
2663 09:56:24.607273
2664 09:56:24.610781 CH=1, VrefRange= 0, VrefLevel = 20
2665 09:56:24.614034 TX Bit0 (976~999) 24 987, Bit8 (969~993) 25 981,
2666 09:56:24.617009 TX Bit1 (976~998) 23 987, Bit9 (970~992) 23 981,
2667 09:56:24.623874 TX Bit2 (973~994) 22 983, Bit10 (970~993) 24 981,
2668 09:56:24.627346 TX Bit3 (970~994) 25 982, Bit11 (971~994) 24 982,
2669 09:56:24.630801 TX Bit4 (974~997) 24 985, Bit12 (971~995) 25 983,
2670 09:56:24.637522 TX Bit5 (976~999) 24 987, Bit13 (972~994) 23 983,
2671 09:56:24.640758 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2672 09:56:24.644396 TX Bit7 (975~997) 23 986, Bit15 (968~992) 25 980,
2673 09:56:24.647082
2674 09:56:24.647599 Write Rank0 MR14 =0x16
2675 09:56:24.656086
2676 09:56:24.659613 CH=1, VrefRange= 0, VrefLevel = 22
2677 09:56:24.662965 TX Bit0 (976~999) 24 987, Bit8 (969~992) 24 980,
2678 09:56:24.666172 TX Bit1 (976~998) 23 987, Bit9 (969~992) 24 980,
2679 09:56:24.672855 TX Bit2 (973~995) 23 984, Bit10 (969~993) 25 981,
2680 09:56:24.676499 TX Bit3 (970~994) 25 982, Bit11 (970~994) 25 982,
2681 09:56:24.680015 TX Bit4 (974~997) 24 985, Bit12 (971~994) 24 982,
2682 09:56:24.686437 TX Bit5 (976~999) 24 987, Bit13 (971~994) 24 982,
2683 09:56:24.690052 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2684 09:56:24.693114 TX Bit7 (974~997) 24 985, Bit15 (968~992) 25 980,
2685 09:56:24.693626
2686 09:56:24.696543 Write Rank0 MR14 =0x18
2687 09:56:24.705259
2688 09:56:24.708755 CH=1, VrefRange= 0, VrefLevel = 24
2689 09:56:24.712050 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2690 09:56:24.715454 TX Bit1 (976~998) 23 987, Bit9 (969~992) 24 980,
2691 09:56:24.722284 TX Bit2 (972~996) 25 984, Bit10 (969~993) 25 981,
2692 09:56:24.725070 TX Bit3 (970~994) 25 982, Bit11 (970~994) 25 982,
2693 09:56:24.728706 TX Bit4 (974~997) 24 985, Bit12 (971~994) 24 982,
2694 09:56:24.735295 TX Bit5 (976~998) 23 987, Bit13 (970~993) 24 981,
2695 09:56:24.738916 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2696 09:56:24.741983 TX Bit7 (974~997) 24 985, Bit15 (968~992) 25 980,
2697 09:56:24.742468
2698 09:56:24.745259 Write Rank0 MR14 =0x1a
2699 09:56:24.754387
2700 09:56:24.757776 CH=1, VrefRange= 0, VrefLevel = 26
2701 09:56:24.761336 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2702 09:56:24.764401 TX Bit1 (976~998) 23 987, Bit9 (969~992) 24 980,
2703 09:56:24.771436 TX Bit2 (972~996) 25 984, Bit10 (969~993) 25 981,
2704 09:56:24.774520 TX Bit3 (970~994) 25 982, Bit11 (970~994) 25 982,
2705 09:56:24.777610 TX Bit4 (974~997) 24 985, Bit12 (971~994) 24 982,
2706 09:56:24.784400 TX Bit5 (976~998) 23 987, Bit13 (970~993) 24 981,
2707 09:56:24.788167 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2708 09:56:24.791268 TX Bit7 (974~997) 24 985, Bit15 (968~992) 25 980,
2709 09:56:24.791843
2710 09:56:24.794544 Write Rank0 MR14 =0x1c
2711 09:56:24.803675
2712 09:56:24.806957 CH=1, VrefRange= 0, VrefLevel = 28
2713 09:56:24.810245 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2714 09:56:24.813427 TX Bit1 (976~998) 23 987, Bit9 (969~992) 24 980,
2715 09:56:24.820523 TX Bit2 (972~996) 25 984, Bit10 (969~993) 25 981,
2716 09:56:24.823871 TX Bit3 (970~994) 25 982, Bit11 (970~994) 25 982,
2717 09:56:24.827125 TX Bit4 (974~997) 24 985, Bit12 (971~994) 24 982,
2718 09:56:24.833710 TX Bit5 (976~998) 23 987, Bit13 (970~993) 24 981,
2719 09:56:24.837102 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2720 09:56:24.840544 TX Bit7 (974~997) 24 985, Bit15 (968~992) 25 980,
2721 09:56:24.841067
2722 09:56:24.843565 Write Rank0 MR14 =0x1e
2723 09:56:24.852567
2724 09:56:24.856041 CH=1, VrefRange= 0, VrefLevel = 30
2725 09:56:24.859398 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2726 09:56:24.862518 TX Bit1 (976~998) 23 987, Bit9 (969~992) 24 980,
2727 09:56:24.869467 TX Bit2 (972~996) 25 984, Bit10 (969~993) 25 981,
2728 09:56:24.872450 TX Bit3 (970~994) 25 982, Bit11 (970~994) 25 982,
2729 09:56:24.875818 TX Bit4 (974~997) 24 985, Bit12 (971~994) 24 982,
2730 09:56:24.882865 TX Bit5 (976~998) 23 987, Bit13 (970~993) 24 981,
2731 09:56:24.886138 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2732 09:56:24.889762 TX Bit7 (974~997) 24 985, Bit15 (968~992) 25 980,
2733 09:56:24.890326
2734 09:56:24.892525 Write Rank0 MR14 =0x20
2735 09:56:24.901636
2736 09:56:24.904553 CH=1, VrefRange= 0, VrefLevel = 32
2737 09:56:24.907993 TX Bit0 (977~1000) 24 988, Bit8 (969~992) 24 980,
2738 09:56:24.911401 TX Bit1 (976~998) 23 987, Bit9 (969~992) 24 980,
2739 09:56:24.918206 TX Bit2 (972~996) 25 984, Bit10 (969~993) 25 981,
2740 09:56:24.921267 TX Bit3 (970~994) 25 982, Bit11 (970~994) 25 982,
2741 09:56:24.925011 TX Bit4 (974~997) 24 985, Bit12 (971~994) 24 982,
2742 09:56:24.931282 TX Bit5 (976~998) 23 987, Bit13 (970~993) 24 981,
2743 09:56:24.934657 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
2744 09:56:24.938149 TX Bit7 (974~997) 24 985, Bit15 (968~992) 25 980,
2745 09:56:24.941258
2746 09:56:24.941685
2747 09:56:24.945091 TX Vref found, early break! 358< 367
2748 09:56:24.948543 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2749 09:56:24.951575 u1DelayCellOfst[0]=7 cells (6 PI)
2750 09:56:24.954908 u1DelayCellOfst[1]=6 cells (5 PI)
2751 09:56:24.958138 u1DelayCellOfst[2]=2 cells (2 PI)
2752 09:56:24.961921 u1DelayCellOfst[3]=0 cells (0 PI)
2753 09:56:24.962478 u1DelayCellOfst[4]=3 cells (3 PI)
2754 09:56:24.964928 u1DelayCellOfst[5]=6 cells (5 PI)
2755 09:56:24.968398 u1DelayCellOfst[6]=6 cells (5 PI)
2756 09:56:24.971518 u1DelayCellOfst[7]=3 cells (3 PI)
2757 09:56:24.974888 Byte0, DQ PI dly=982, DQM PI dly= 985
2758 09:56:24.978434 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2759 09:56:24.978872
2760 09:56:24.985434 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2761 09:56:24.985929
2762 09:56:24.988642 u1DelayCellOfst[8]=0 cells (0 PI)
2763 09:56:24.991554 u1DelayCellOfst[9]=0 cells (0 PI)
2764 09:56:24.994852 u1DelayCellOfst[10]=1 cells (1 PI)
2765 09:56:24.995281 u1DelayCellOfst[11]=2 cells (2 PI)
2766 09:56:24.998541 u1DelayCellOfst[12]=2 cells (2 PI)
2767 09:56:25.001747 u1DelayCellOfst[13]=1 cells (1 PI)
2768 09:56:25.005020 u1DelayCellOfst[14]=1 cells (1 PI)
2769 09:56:25.008514 u1DelayCellOfst[15]=0 cells (0 PI)
2770 09:56:25.011559 Byte1, DQ PI dly=980, DQM PI dly= 981
2771 09:56:25.018508 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2772 09:56:25.019013
2773 09:56:25.021814 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2774 09:56:25.022347
2775 09:56:25.024722 Write Rank0 MR14 =0x18
2776 09:56:25.025182
2777 09:56:25.025546 Final TX Range 0 Vref 24
2778 09:56:25.025864
2779 09:56:25.031500 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2780 09:56:25.031929
2781 09:56:25.038628 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2782 09:56:25.045256 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2783 09:56:25.051613 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2784 09:56:25.055239 Write Rank0 MR3 =0xb0
2785 09:56:25.058489 DramC Write-DBI on
2786 09:56:25.058918 ==
2787 09:56:25.061582 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2788 09:56:25.065096 fsp= 1, odt_onoff= 1, Byte mode= 0
2789 09:56:25.065526 ==
2790 09:56:25.068550 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2791 09:56:25.069091
2792 09:56:25.071673 Begin, DQ Scan Range 701~765
2793 09:56:25.072142
2794 09:56:25.072522
2795 09:56:25.074978 TX Vref Scan disable
2796 09:56:25.078440 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2797 09:56:25.081802 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2798 09:56:25.085515 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2799 09:56:25.088599 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2800 09:56:25.091730 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2801 09:56:25.094985 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2802 09:56:25.098311 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2803 09:56:25.101623 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2804 09:56:25.105161 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2805 09:56:25.108822 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2806 09:56:25.112083 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2807 09:56:25.115678 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2808 09:56:25.118429 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2809 09:56:25.121816 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2810 09:56:25.128228 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2811 09:56:25.131299 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2812 09:56:25.138773 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2813 09:56:25.141731 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2814 09:56:25.145079 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2815 09:56:25.148469 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2816 09:56:25.151812 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2817 09:56:25.155027 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2818 09:56:25.158566 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2819 09:56:25.162129 Byte0, DQ PI dly=729, DQM PI dly= 729
2820 09:56:25.165154 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2821 09:56:25.165594
2822 09:56:25.171818 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2823 09:56:25.172262
2824 09:56:25.175410 Byte1, DQ PI dly=724, DQM PI dly= 724
2825 09:56:25.178633 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2826 09:56:25.179074
2827 09:56:25.181786 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2828 09:56:25.182263
2829 09:56:25.188660 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2830 09:56:25.195190 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2831 09:56:25.202162 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2832 09:56:25.208711 wait MRW command Rank0 MR3 =0x30 fired (1)
2833 09:56:25.209150 Write Rank0 MR3 =0x30
2834 09:56:25.212082 DramC Write-DBI off
2835 09:56:25.212514
2836 09:56:25.212852 [DATLAT]
2837 09:56:25.215418 Freq=1600, CH1 RK0, use_rxtx_scan=0
2838 09:56:25.215852
2839 09:56:25.218660 DATLAT Default: 0xf
2840 09:56:25.219114 7, 0xFFFF, sum=0
2841 09:56:25.221936 8, 0xFFFF, sum=0
2842 09:56:25.222419 9, 0xFFFF, sum=0
2843 09:56:25.222766 10, 0xFFFF, sum=0
2844 09:56:25.225335 11, 0xFFFF, sum=0
2845 09:56:25.225883 12, 0xFFFF, sum=0
2846 09:56:25.228677 13, 0xFFFF, sum=0
2847 09:56:25.229200 14, 0x0, sum=1
2848 09:56:25.232018 15, 0x0, sum=2
2849 09:56:25.232459 16, 0x0, sum=3
2850 09:56:25.235424 17, 0x0, sum=4
2851 09:56:25.238609 pattern=2 first_step=14 total pass=5 best_step=16
2852 09:56:25.239044 ==
2853 09:56:25.245722 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2854 09:56:25.246292 fsp= 1, odt_onoff= 1, Byte mode= 0
2855 09:56:25.248707 ==
2856 09:56:25.252284 Start DQ dly to find pass range UseTestEngine =1
2857 09:56:25.255306 x-axis: bit #, y-axis: DQ dly (-127~63)
2858 09:56:25.255742 RX Vref Scan = 1
2859 09:56:25.379226
2860 09:56:25.379743 RX Vref found, early break!
2861 09:56:25.380086
2862 09:56:25.386097 Final RX Vref 13, apply to both rank0 and 1
2863 09:56:25.386672 ==
2864 09:56:25.389244 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2865 09:56:25.392298 fsp= 1, odt_onoff= 1, Byte mode= 0
2866 09:56:25.392825 ==
2867 09:56:25.393172 DQS Delay:
2868 09:56:25.395531 DQS0 = 0, DQS1 = 0
2869 09:56:25.396048 DQM Delay:
2870 09:56:25.398807 DQM0 = 20, DQM1 = 18
2871 09:56:25.399242 DQ Delay:
2872 09:56:25.402019 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
2873 09:56:25.405233 DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =19
2874 09:56:25.408877 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
2875 09:56:25.412882 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2876 09:56:25.413401
2877 09:56:25.413739
2878 09:56:25.414048
2879 09:56:25.415386 [DramC_TX_OE_Calibration] TA2
2880 09:56:25.418911 Original DQ_B0 (3 6) =30, OEN = 27
2881 09:56:25.422653 Original DQ_B1 (3 6) =30, OEN = 27
2882 09:56:25.425811 23, 0x0, End_B0=23 End_B1=23
2883 09:56:25.426375 24, 0x0, End_B0=24 End_B1=24
2884 09:56:25.429088 25, 0x0, End_B0=25 End_B1=25
2885 09:56:25.432451 26, 0x0, End_B0=26 End_B1=26
2886 09:56:25.435854 27, 0x0, End_B0=27 End_B1=27
2887 09:56:25.436378 28, 0x0, End_B0=28 End_B1=28
2888 09:56:25.438937 29, 0x0, End_B0=29 End_B1=29
2889 09:56:25.442549 30, 0x0, End_B0=30 End_B1=30
2890 09:56:25.445837 31, 0xFFFF, End_B0=30 End_B1=30
2891 09:56:25.449376 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2892 09:56:25.455921 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2893 09:56:25.456440
2894 09:56:25.456779
2895 09:56:25.459038 Write Rank0 MR23 =0x3f
2896 09:56:25.459472 [DQSOSC]
2897 09:56:25.466015 [DQSOSCAuto] RK0, (LSB)MR18= 0xa3, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
2898 09:56:25.472867 CH1_RK0: MR19=0x3, MR18=0xA3, DQSOSC=338, MR23=63, INC=21, DEC=32
2899 09:56:25.476194 Write Rank0 MR23 =0x3f
2900 09:56:25.476716 [DQSOSC]
2901 09:56:25.482478 [DQSOSCAuto] RK0, (LSB)MR18= 0xa2, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
2902 09:56:25.486121 CH1 RK0: MR19=3, MR18=A2
2903 09:56:25.489562 [RankSwap] Rank num 2, (Multi 1), Rank 1
2904 09:56:25.492581 Write Rank0 MR2 =0xad
2905 09:56:25.493099 [Write Leveling]
2906 09:56:25.495985 delay byte0 byte1 byte2 byte3
2907 09:56:25.496502
2908 09:56:25.496845 10 0 0
2909 09:56:25.499409 11 0 0
2910 09:56:25.499931 12 0 0
2911 09:56:25.502434 13 0 0
2912 09:56:25.502871 14 0 0
2913 09:56:25.503216 15 0 0
2914 09:56:25.505816 16 0 0
2915 09:56:25.506307 17 0 0
2916 09:56:25.509552 18 0 0
2917 09:56:25.510084 19 0 0
2918 09:56:25.512692 20 0 0
2919 09:56:25.513229 21 0 0
2920 09:56:25.513683 22 0 0
2921 09:56:25.515735 23 0 0
2922 09:56:25.516186 24 0 0
2923 09:56:25.519033 25 0 0
2924 09:56:25.519485 26 0 0
2925 09:56:25.519953 27 0 0
2926 09:56:25.522587 28 0 0
2927 09:56:25.523126 29 0 0
2928 09:56:25.526125 30 0 0
2929 09:56:25.526714 31 0 ff
2930 09:56:25.529196 32 0 ff
2931 09:56:25.529650 33 0 ff
2932 09:56:25.530098 34 0 ff
2933 09:56:25.532429 35 0 ff
2934 09:56:25.532881 36 0 ff
2935 09:56:25.535940 37 ff ff
2936 09:56:25.536394 38 ff ff
2937 09:56:25.539314 39 ff ff
2938 09:56:25.539766 40 ff ff
2939 09:56:25.542771 41 ff ff
2940 09:56:25.543284 42 ff ff
2941 09:56:25.546312 43 ff ff
2942 09:56:25.549171 pass bytecount = 0xff (0xff: all bytes pass)
2943 09:56:25.549619
2944 09:56:25.550064 DQS0 dly: 37
2945 09:56:25.552493 DQS1 dly: 31
2946 09:56:25.552938 Write Rank0 MR2 =0x2d
2947 09:56:25.556063 [RankSwap] Rank num 2, (Multi 1), Rank 0
2948 09:56:25.559472 Write Rank1 MR1 =0xd6
2949 09:56:25.560003 [Gating]
2950 09:56:25.560453 ==
2951 09:56:25.565951 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2952 09:56:25.569247 fsp= 1, odt_onoff= 1, Byte mode= 0
2953 09:56:25.570044 ==
2954 09:56:25.572581 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2955 09:56:25.575913 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2956 09:56:25.582610 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2957 09:56:25.586391 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2958 09:56:25.589472 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2959 09:56:25.596127 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2960 09:56:25.599411 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2961 09:56:25.602523 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2962 09:56:25.606358 3 2 0 |100f 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2963 09:56:25.613103 3 2 4 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2964 09:56:25.616371 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2965 09:56:25.619676 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2966 09:56:25.626399 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2967 09:56:25.629752 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2968 09:56:25.633053 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2969 09:56:25.639534 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2970 09:56:25.642625 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2971 09:56:25.646022 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2972 09:56:25.649426 3 3 8 |f0f 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2973 09:56:25.656156 [Byte 0] Lead/lag Transition tap number (1)
2974 09:56:25.659709 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2975 09:56:25.662953 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2976 09:56:25.669800 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2977 09:56:25.672989 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2978 09:56:25.676500 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2979 09:56:25.679903 3 4 0 |505 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2980 09:56:25.686745 3 4 4 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
2981 09:56:25.689770 3 4 8 |3d3d 3d3d |(11 11)(1 1) |(1 1)(1 1)| 0
2982 09:56:25.693126 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2983 09:56:25.699972 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2984 09:56:25.703153 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2985 09:56:25.706619 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2986 09:56:25.713103 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2987 09:56:25.716844 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2988 09:56:25.719793 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2989 09:56:25.723204 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2990 09:56:25.729745 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2991 09:56:25.733032 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2992 09:56:25.736680 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2993 09:56:25.743139 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2994 09:56:25.746428 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2995 09:56:25.749737 [Byte 0] Lead/lag Transition tap number (2)
2996 09:56:25.753253 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2997 09:56:25.759585 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2998 09:56:25.763330 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2999 09:56:25.766346 [Byte 1] Lead/lag Transition tap number (3)
3000 09:56:25.769927 3 6 4 |1c1c 3a3a |(11 11)(11 11) |(0 0)(0 0)| 0
3001 09:56:25.775997 3 6 8 |4646 3838 |(0 0)(11 11) |(0 0)(0 0)| 0
3002 09:56:25.776434 [Byte 0]First pass (3, 6, 8)
3003 09:56:25.783124 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3004 09:56:25.783644 [Byte 1]First pass (3, 6, 12)
3005 09:56:25.789806 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3006 09:56:25.793026 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3007 09:56:25.796310 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3008 09:56:25.799955 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3009 09:56:25.802922 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3010 09:56:25.809906 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3011 09:56:25.813276 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3012 09:56:25.816611 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3013 09:56:25.820015 All bytes gating window > 1UI, Early break!
3014 09:56:25.820528
3015 09:56:25.823208 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
3016 09:56:25.823725
3017 09:56:25.829752 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
3018 09:56:25.830290
3019 09:56:25.830634
3020 09:56:25.830939
3021 09:56:25.833240 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
3022 09:56:25.833754
3023 09:56:25.836202 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3024 09:56:25.836739
3025 09:56:25.837082
3026 09:56:25.839890 Write Rank1 MR1 =0x56
3027 09:56:25.840398
3028 09:56:25.842773 best RODT dly(2T, 0.5T) = (2, 2)
3029 09:56:25.843202
3030 09:56:25.846624 best RODT dly(2T, 0.5T) = (2, 2)
3031 09:56:25.847071 ==
3032 09:56:25.849546 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3033 09:56:25.853202 fsp= 1, odt_onoff= 1, Byte mode= 0
3034 09:56:25.853728 ==
3035 09:56:25.859372 Start DQ dly to find pass range UseTestEngine =0
3036 09:56:25.862897 x-axis: bit #, y-axis: DQ dly (-127~63)
3037 09:56:25.863422 RX Vref Scan = 0
3038 09:56:25.866357 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3039 09:56:25.869780 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3040 09:56:25.872490 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3041 09:56:25.876057 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3042 09:56:25.876596 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3043 09:56:25.879155 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3044 09:56:25.882872 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3045 09:56:25.886192 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3046 09:56:25.889552 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3047 09:56:25.892900 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3048 09:56:25.896048 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3049 09:56:25.899190 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3050 09:56:25.899642 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3051 09:56:25.902733 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3052 09:56:25.905963 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3053 09:56:25.909834 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3054 09:56:25.912917 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3055 09:56:25.916346 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3056 09:56:25.919693 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3057 09:56:25.922791 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3058 09:56:25.923255 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3059 09:56:25.926045 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3060 09:56:25.929465 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3061 09:56:25.932774 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3062 09:56:25.936498 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3063 09:56:25.939620 -1, [0] xxooxxxx xxxxxxxo [MSB]
3064 09:56:25.940160 0, [0] xxooxxxx xxoxxxxo [MSB]
3065 09:56:25.943022 1, [0] xxooxxxx oxoxxxxo [MSB]
3066 09:56:25.946042 2, [0] xxooxxxo oooxxxxo [MSB]
3067 09:56:25.949741 3, [0] xxoooxxo ooooxxoo [MSB]
3068 09:56:25.953164 4, [0] xxoooxxo ooooxxoo [MSB]
3069 09:56:25.956301 5, [0] xxoooxxo oooooooo [MSB]
3070 09:56:25.956853 6, [0] xoooooxo oooooooo [MSB]
3071 09:56:25.959596 33, [0] oooxoooo oooooooo [MSB]
3072 09:56:25.963145 34, [0] oooxoooo ooooooox [MSB]
3073 09:56:25.966374 35, [0] ooxxoooo ooooooox [MSB]
3074 09:56:25.969705 36, [0] ooxxoooo oxooooox [MSB]
3075 09:56:25.972890 37, [0] ooxxoooo xxxxooox [MSB]
3076 09:56:25.976467 38, [0] ooxxoooo xxxxooox [MSB]
3077 09:56:25.977017 39, [0] ooxxxoox xxxxooxx [MSB]
3078 09:56:25.979700 40, [0] ooxxxoox xxxxoxxx [MSB]
3079 09:56:25.982947 41, [0] ooxxxoox xxxxxxxx [MSB]
3080 09:56:25.986317 42, [0] ooxxxxox xxxxxxxx [MSB]
3081 09:56:25.989751 43, [0] oxxxxxxx xxxxxxxx [MSB]
3082 09:56:25.992619 44, [0] xxxxxxxx xxxxxxxx [MSB]
3083 09:56:25.996257 iDelay=44, Bit 0, Center 25 (7 ~ 43) 37
3084 09:56:25.999568 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3085 09:56:26.003008 iDelay=44, Bit 2, Center 16 (-1 ~ 34) 36
3086 09:56:26.006329 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
3087 09:56:26.009834 iDelay=44, Bit 4, Center 20 (3 ~ 38) 36
3088 09:56:26.013185 iDelay=44, Bit 5, Center 23 (6 ~ 41) 36
3089 09:56:26.016413 iDelay=44, Bit 6, Center 24 (7 ~ 42) 36
3090 09:56:26.019640 iDelay=44, Bit 7, Center 20 (2 ~ 38) 37
3091 09:56:26.023104 iDelay=44, Bit 8, Center 18 (1 ~ 36) 36
3092 09:56:26.026705 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3093 09:56:26.029940 iDelay=44, Bit 10, Center 18 (0 ~ 36) 37
3094 09:56:26.033550 iDelay=44, Bit 11, Center 19 (3 ~ 36) 34
3095 09:56:26.039942 iDelay=44, Bit 12, Center 22 (5 ~ 40) 36
3096 09:56:26.043062 iDelay=44, Bit 13, Center 22 (5 ~ 39) 35
3097 09:56:26.046838 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
3098 09:56:26.049964 iDelay=44, Bit 15, Center 15 (-2 ~ 33) 36
3099 09:56:26.050510 ==
3100 09:56:26.053384 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3101 09:56:26.056773 fsp= 1, odt_onoff= 1, Byte mode= 0
3102 09:56:26.057287 ==
3103 09:56:26.059639 DQS Delay:
3104 09:56:26.060068 DQS0 = 0, DQS1 = 0
3105 09:56:26.063406 DQM Delay:
3106 09:56:26.064059 DQM0 = 20, DQM1 = 19
3107 09:56:26.064417 DQ Delay:
3108 09:56:26.066620 DQ0 =25, DQ1 =24, DQ2 =16, DQ3 =15
3109 09:56:26.069969 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =20
3110 09:56:26.073111 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3111 09:56:26.076651 DQ12 =22, DQ13 =22, DQ14 =20, DQ15 =15
3112 09:56:26.077163
3113 09:56:26.077502
3114 09:56:26.080237 DramC Write-DBI off
3115 09:56:26.080743 ==
3116 09:56:26.083156 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3117 09:56:26.086506 fsp= 1, odt_onoff= 1, Byte mode= 0
3118 09:56:26.089917 ==
3119 09:56:26.093858 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3120 09:56:26.094401
3121 09:56:26.096519 Begin, DQ Scan Range 927~1183
3122 09:56:26.096946
3123 09:56:26.097279
3124 09:56:26.097589 TX Vref Scan disable
3125 09:56:26.100300 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3126 09:56:26.103315 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3127 09:56:26.106514 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3128 09:56:26.113409 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3129 09:56:26.116840 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3130 09:56:26.120382 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3131 09:56:26.123421 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3132 09:56:26.126933 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3133 09:56:26.130277 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3134 09:56:26.133873 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3135 09:56:26.136952 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3136 09:56:26.140193 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3137 09:56:26.143633 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3138 09:56:26.146819 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3139 09:56:26.150303 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3140 09:56:26.153988 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3141 09:56:26.157027 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3142 09:56:26.160339 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3143 09:56:26.163564 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3144 09:56:26.166976 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3145 09:56:26.170392 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3146 09:56:26.177010 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3147 09:56:26.180519 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3148 09:56:26.183681 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3149 09:56:26.186899 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3150 09:56:26.190121 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3151 09:56:26.193668 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3152 09:56:26.197152 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3153 09:56:26.200673 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3154 09:56:26.203599 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3155 09:56:26.207005 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3156 09:56:26.210754 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3157 09:56:26.213768 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3158 09:56:26.217304 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3159 09:56:26.220633 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3160 09:56:26.223712 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3161 09:56:26.227037 963 |3 6 3|[0] xxxxxxxx xxxxxxxo [MSB]
3162 09:56:26.230856 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
3163 09:56:26.233835 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
3164 09:56:26.237350 966 |3 6 6|[0] xxxxxxxx oxxxxxxo [MSB]
3165 09:56:26.240672 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
3166 09:56:26.243799 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
3167 09:56:26.247299 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
3168 09:56:26.250930 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3169 09:56:26.257227 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3170 09:56:26.260788 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3171 09:56:26.264392 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3172 09:56:26.268088 974 |3 6 14|[0] xxoooxxx oooooooo [MSB]
3173 09:56:26.271030 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
3174 09:56:26.274169 976 |3 6 16|[0] xooooooo oooooooo [MSB]
3175 09:56:26.277319 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3176 09:56:26.284145 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3177 09:56:26.287824 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3178 09:56:26.291017 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3179 09:56:26.294189 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3180 09:56:26.297712 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3181 09:56:26.300762 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3182 09:56:26.304496 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3183 09:56:26.307486 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3184 09:56:26.310770 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3185 09:56:26.314313 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3186 09:56:26.317626 Byte0, DQ PI dly=986, DQM PI dly= 986
3187 09:56:26.320759 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3188 09:56:26.321313
3189 09:56:26.327352 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3190 09:56:26.327791
3191 09:56:26.330847 Byte1, DQ PI dly=977, DQM PI dly= 977
3192 09:56:26.333991 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3193 09:56:26.334490
3194 09:56:26.337560 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3195 09:56:26.338044
3196 09:56:26.340829 ==
3197 09:56:26.343971 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3198 09:56:26.347359 fsp= 1, odt_onoff= 1, Byte mode= 0
3199 09:56:26.347756 ==
3200 09:56:26.350799 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3201 09:56:26.351193
3202 09:56:26.354102 Begin, DQ Scan Range 953~1017
3203 09:56:26.357531 Write Rank1 MR14 =0x0
3204 09:56:26.365989
3205 09:56:26.366488 CH=1, VrefRange= 0, VrefLevel = 0
3206 09:56:26.372534 TX Bit0 (978~998) 21 988, Bit8 (969~987) 19 978,
3207 09:56:26.375865 TX Bit1 (977~997) 21 987, Bit9 (969~985) 17 977,
3208 09:56:26.378930 TX Bit2 (975~992) 18 983, Bit10 (970~985) 16 977,
3209 09:56:26.385931 TX Bit3 (975~991) 17 983, Bit11 (971~988) 18 979,
3210 09:56:26.389482 TX Bit4 (976~994) 19 985, Bit12 (971~990) 20 980,
3211 09:56:26.395875 TX Bit5 (978~998) 21 988, Bit13 (971~986) 16 978,
3212 09:56:26.399279 TX Bit6 (978~998) 21 988, Bit14 (970~986) 17 978,
3213 09:56:26.402490 TX Bit7 (977~995) 19 986, Bit15 (967~985) 19 976,
3214 09:56:26.402924
3215 09:56:26.405671 Write Rank1 MR14 =0x2
3216 09:56:26.414803
3217 09:56:26.415274 CH=1, VrefRange= 0, VrefLevel = 2
3218 09:56:26.421580 TX Bit0 (977~998) 22 987, Bit8 (969~987) 19 978,
3219 09:56:26.424454 TX Bit1 (977~997) 21 987, Bit9 (969~986) 18 977,
3220 09:56:26.431798 TX Bit2 (975~992) 18 983, Bit10 (970~985) 16 977,
3221 09:56:26.435079 TX Bit3 (974~991) 18 982, Bit11 (971~989) 19 980,
3222 09:56:26.438191 TX Bit4 (976~995) 20 985, Bit12 (971~990) 20 980,
3223 09:56:26.444801 TX Bit5 (977~998) 22 987, Bit13 (970~987) 18 978,
3224 09:56:26.447920 TX Bit6 (977~998) 22 987, Bit14 (970~987) 18 978,
3225 09:56:26.451698 TX Bit7 (977~995) 19 986, Bit15 (966~985) 20 975,
3226 09:56:26.452215
3227 09:56:26.454768 Write Rank1 MR14 =0x4
3228 09:56:26.463737
3229 09:56:26.464237 CH=1, VrefRange= 0, VrefLevel = 4
3230 09:56:26.470322 TX Bit0 (977~998) 22 987, Bit8 (969~987) 19 978,
3231 09:56:26.473714 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
3232 09:56:26.480590 TX Bit2 (975~993) 19 984, Bit10 (969~986) 18 977,
3233 09:56:26.483737 TX Bit3 (974~992) 19 983, Bit11 (970~989) 20 979,
3234 09:56:26.487125 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3235 09:56:26.493915 TX Bit5 (977~998) 22 987, Bit13 (970~987) 18 978,
3236 09:56:26.497532 TX Bit6 (977~998) 22 987, Bit14 (970~987) 18 978,
3237 09:56:26.500450 TX Bit7 (977~996) 20 986, Bit15 (966~985) 20 975,
3238 09:56:26.500846
3239 09:56:26.504318 Write Rank1 MR14 =0x6
3240 09:56:26.513193
3241 09:56:26.513694 CH=1, VrefRange= 0, VrefLevel = 6
3242 09:56:26.519777 TX Bit0 (977~999) 23 988, Bit8 (969~988) 20 978,
3243 09:56:26.522907 TX Bit1 (976~998) 23 987, Bit9 (969~987) 19 978,
3244 09:56:26.529742 TX Bit2 (975~993) 19 984, Bit10 (969~987) 19 978,
3245 09:56:26.533456 TX Bit3 (974~992) 19 983, Bit11 (970~990) 21 980,
3246 09:56:26.536893 TX Bit4 (976~996) 21 986, Bit12 (970~991) 22 980,
3247 09:56:26.543497 TX Bit5 (977~998) 22 987, Bit13 (970~988) 19 979,
3248 09:56:26.546707 TX Bit6 (977~999) 23 988, Bit14 (970~988) 19 979,
3249 09:56:26.550073 TX Bit7 (977~997) 21 987, Bit15 (965~986) 22 975,
3250 09:56:26.550627
3251 09:56:26.553496 Write Rank1 MR14 =0x8
3252 09:56:26.562679
3253 09:56:26.563187 CH=1, VrefRange= 0, VrefLevel = 8
3254 09:56:26.568988 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
3255 09:56:26.572506 TX Bit1 (976~998) 23 987, Bit9 (969~987) 19 978,
3256 09:56:26.578921 TX Bit2 (975~993) 19 984, Bit10 (969~987) 19 978,
3257 09:56:26.582538 TX Bit3 (974~993) 20 983, Bit11 (970~991) 22 980,
3258 09:56:26.586078 TX Bit4 (975~996) 22 985, Bit12 (971~991) 21 981,
3259 09:56:26.592684 TX Bit5 (977~999) 23 988, Bit13 (970~989) 20 979,
3260 09:56:26.595980 TX Bit6 (977~999) 23 988, Bit14 (970~989) 20 979,
3261 09:56:26.598913 TX Bit7 (976~997) 22 986, Bit15 (964~986) 23 975,
3262 09:56:26.599343
3263 09:56:26.602500 Write Rank1 MR14 =0xa
3264 09:56:26.611725
3265 09:56:26.614938 CH=1, VrefRange= 0, VrefLevel = 10
3266 09:56:26.618670 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
3267 09:56:26.621714 TX Bit1 (976~998) 23 987, Bit9 (968~988) 21 978,
3268 09:56:26.628398 TX Bit2 (974~994) 21 984, Bit10 (969~988) 20 978,
3269 09:56:26.631757 TX Bit3 (973~994) 22 983, Bit11 (970~991) 22 980,
3270 09:56:26.635130 TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980,
3271 09:56:26.641710 TX Bit5 (977~999) 23 988, Bit13 (970~990) 21 980,
3272 09:56:26.645031 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
3273 09:56:26.648476 TX Bit7 (976~997) 22 986, Bit15 (964~987) 24 975,
3274 09:56:26.648987
3275 09:56:26.651730 Write Rank1 MR14 =0xc
3276 09:56:26.661306
3277 09:56:26.664644 CH=1, VrefRange= 0, VrefLevel = 12
3278 09:56:26.667886 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
3279 09:56:26.671163 TX Bit1 (976~998) 23 987, Bit9 (967~989) 23 978,
3280 09:56:26.677743 TX Bit2 (973~995) 23 984, Bit10 (969~989) 21 979,
3281 09:56:26.681430 TX Bit3 (972~994) 23 983, Bit11 (970~991) 22 980,
3282 09:56:26.684644 TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980,
3283 09:56:26.691301 TX Bit5 (977~999) 23 988, Bit13 (969~990) 22 979,
3284 09:56:26.694511 TX Bit6 (977~1000) 24 988, Bit14 (969~990) 22 979,
3285 09:56:26.697773 TX Bit7 (976~997) 22 986, Bit15 (964~987) 24 975,
3286 09:56:26.698206
3287 09:56:26.701106 Write Rank1 MR14 =0xe
3288 09:56:26.710777
3289 09:56:26.714363 CH=1, VrefRange= 0, VrefLevel = 14
3290 09:56:26.717869 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
3291 09:56:26.721104 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
3292 09:56:26.727785 TX Bit2 (973~996) 24 984, Bit10 (968~990) 23 979,
3293 09:56:26.730880 TX Bit3 (972~995) 24 983, Bit11 (969~991) 23 980,
3294 09:56:26.734751 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3295 09:56:26.741011 TX Bit5 (976~999) 24 987, Bit13 (969~990) 22 979,
3296 09:56:26.744053 TX Bit6 (977~1000) 24 988, Bit14 (969~990) 22 979,
3297 09:56:26.747455 TX Bit7 (975~997) 23 986, Bit15 (964~988) 25 976,
3298 09:56:26.750892
3299 09:56:26.751396 Write Rank1 MR14 =0x10
3300 09:56:26.760684
3301 09:56:26.764206 CH=1, VrefRange= 0, VrefLevel = 16
3302 09:56:26.767444 TX Bit0 (977~1000) 24 988, Bit8 (966~991) 26 978,
3303 09:56:26.771124 TX Bit1 (976~998) 23 987, Bit9 (967~990) 24 978,
3304 09:56:26.777463 TX Bit2 (972~997) 26 984, Bit10 (968~990) 23 979,
3305 09:56:26.780794 TX Bit3 (972~996) 25 984, Bit11 (969~991) 23 980,
3306 09:56:26.784172 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3307 09:56:26.790539 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3308 09:56:26.794140 TX Bit6 (976~1000) 25 988, Bit14 (969~991) 23 980,
3309 09:56:26.797378 TX Bit7 (976~998) 23 987, Bit15 (964~988) 25 976,
3310 09:56:26.800522
3311 09:56:26.801028 Write Rank1 MR14 =0x12
3312 09:56:26.810613
3313 09:56:26.814142 CH=1, VrefRange= 0, VrefLevel = 18
3314 09:56:26.817516 TX Bit0 (976~1001) 26 988, Bit8 (966~991) 26 978,
3315 09:56:26.820762 TX Bit1 (976~999) 24 987, Bit9 (966~991) 26 978,
3316 09:56:26.827556 TX Bit2 (972~997) 26 984, Bit10 (968~991) 24 979,
3317 09:56:26.830729 TX Bit3 (971~996) 26 983, Bit11 (969~992) 24 980,
3318 09:56:26.834182 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3319 09:56:26.840862 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3320 09:56:26.844275 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
3321 09:56:26.847425 TX Bit7 (975~998) 24 986, Bit15 (963~989) 27 976,
3322 09:56:26.850859
3323 09:56:26.851363 Write Rank1 MR14 =0x14
3324 09:56:26.861051
3325 09:56:26.864123 CH=1, VrefRange= 0, VrefLevel = 20
3326 09:56:26.867503 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3327 09:56:26.870927 TX Bit1 (975~999) 25 987, Bit9 (966~991) 26 978,
3328 09:56:26.877415 TX Bit2 (971~997) 27 984, Bit10 (967~991) 25 979,
3329 09:56:26.881090 TX Bit3 (971~997) 27 984, Bit11 (968~992) 25 980,
3330 09:56:26.884480 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3331 09:56:26.891180 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
3332 09:56:26.894390 TX Bit6 (976~1001) 26 988, Bit14 (968~991) 24 979,
3333 09:56:26.897751 TX Bit7 (975~998) 24 986, Bit15 (963~990) 28 976,
3334 09:56:26.900973
3335 09:56:26.904087 wait MRW command Rank1 MR14 =0x16 fired (1)
3336 09:56:26.904516 Write Rank1 MR14 =0x16
3337 09:56:26.915087
3338 09:56:26.918791 CH=1, VrefRange= 0, VrefLevel = 22
3339 09:56:26.921641 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3340 09:56:26.924722 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3341 09:56:26.931365 TX Bit2 (972~997) 26 984, Bit10 (966~991) 26 978,
3342 09:56:26.934781 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3343 09:56:26.938235 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3344 09:56:26.944779 TX Bit5 (976~1000) 25 988, Bit13 (968~992) 25 980,
3345 09:56:26.947914 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3346 09:56:26.951350 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3347 09:56:26.954405
3348 09:56:26.954547 Write Rank1 MR14 =0x18
3349 09:56:26.964661
3350 09:56:26.964848 CH=1, VrefRange= 0, VrefLevel = 24
3351 09:56:26.971545 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3352 09:56:26.974639 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3353 09:56:26.981616 TX Bit2 (972~997) 26 984, Bit10 (966~991) 26 978,
3354 09:56:26.984725 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3355 09:56:26.988531 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3356 09:56:26.995213 TX Bit5 (976~1000) 25 988, Bit13 (968~992) 25 980,
3357 09:56:26.998590 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3358 09:56:27.001808 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3359 09:56:27.002375
3360 09:56:27.004999 Write Rank1 MR14 =0x1a
3361 09:56:27.015073
3362 09:56:27.018509 CH=1, VrefRange= 0, VrefLevel = 26
3363 09:56:27.021818 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3364 09:56:27.025115 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3365 09:56:27.031862 TX Bit2 (972~997) 26 984, Bit10 (966~991) 26 978,
3366 09:56:27.035046 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3367 09:56:27.038366 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3368 09:56:27.045259 TX Bit5 (976~1000) 25 988, Bit13 (968~992) 25 980,
3369 09:56:27.048458 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3370 09:56:27.051787 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3371 09:56:27.052301
3372 09:56:27.055316 Write Rank1 MR14 =0x1c
3373 09:56:27.065094
3374 09:56:27.068409 CH=1, VrefRange= 0, VrefLevel = 28
3375 09:56:27.071755 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3376 09:56:27.075149 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3377 09:56:27.081388 TX Bit2 (972~997) 26 984, Bit10 (966~991) 26 978,
3378 09:56:27.084696 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3379 09:56:27.088434 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3380 09:56:27.094761 TX Bit5 (976~1000) 25 988, Bit13 (968~992) 25 980,
3381 09:56:27.098500 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3382 09:56:27.105003 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3383 09:56:27.105525
3384 09:56:27.105860 Write Rank1 MR14 =0x1e
3385 09:56:27.114910
3386 09:56:27.118665 CH=1, VrefRange= 0, VrefLevel = 30
3387 09:56:27.122012 TX Bit0 (976~1002) 27 989, Bit8 (965~991) 27 978,
3388 09:56:27.124799 TX Bit1 (975~999) 25 987, Bit9 (965~991) 27 978,
3389 09:56:27.131931 TX Bit2 (972~997) 26 984, Bit10 (966~991) 26 978,
3390 09:56:27.135174 TX Bit3 (970~997) 28 983, Bit11 (968~992) 25 980,
3391 09:56:27.138569 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3392 09:56:27.144820 TX Bit5 (976~1000) 25 988, Bit13 (968~992) 25 980,
3393 09:56:27.148119 TX Bit6 (976~1001) 26 988, Bit14 (968~992) 25 980,
3394 09:56:27.152255 TX Bit7 (974~998) 25 986, Bit15 (963~990) 28 976,
3395 09:56:27.154920
3396 09:56:27.155349
3397 09:56:27.158415 TX Vref found, early break! 390< 393
3398 09:56:27.161697 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3399 09:56:27.165310 u1DelayCellOfst[0]=7 cells (6 PI)
3400 09:56:27.168765 u1DelayCellOfst[1]=5 cells (4 PI)
3401 09:56:27.172123 u1DelayCellOfst[2]=1 cells (1 PI)
3402 09:56:27.175360 u1DelayCellOfst[3]=0 cells (0 PI)
3403 09:56:27.175866 u1DelayCellOfst[4]=3 cells (3 PI)
3404 09:56:27.178606 u1DelayCellOfst[5]=6 cells (5 PI)
3405 09:56:27.181830 u1DelayCellOfst[6]=6 cells (5 PI)
3406 09:56:27.185532 u1DelayCellOfst[7]=3 cells (3 PI)
3407 09:56:27.188641 Byte0, DQ PI dly=983, DQM PI dly= 986
3408 09:56:27.192097 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3409 09:56:27.195619
3410 09:56:27.199055 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3411 09:56:27.199572
3412 09:56:27.202020 u1DelayCellOfst[8]=2 cells (2 PI)
3413 09:56:27.205450 u1DelayCellOfst[9]=2 cells (2 PI)
3414 09:56:27.208658 u1DelayCellOfst[10]=2 cells (2 PI)
3415 09:56:27.212375 u1DelayCellOfst[11]=5 cells (4 PI)
3416 09:56:27.212882 u1DelayCellOfst[12]=5 cells (4 PI)
3417 09:56:27.215484 u1DelayCellOfst[13]=5 cells (4 PI)
3418 09:56:27.218779 u1DelayCellOfst[14]=5 cells (4 PI)
3419 09:56:27.222194 u1DelayCellOfst[15]=0 cells (0 PI)
3420 09:56:27.225100 Byte1, DQ PI dly=976, DQM PI dly= 978
3421 09:56:27.232041 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
3422 09:56:27.232553
3423 09:56:27.235366 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
3424 09:56:27.235877
3425 09:56:27.238867 Write Rank1 MR14 =0x16
3426 09:56:27.239370
3427 09:56:27.239709 Final TX Range 0 Vref 22
3428 09:56:27.240021
3429 09:56:27.245621 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3430 09:56:27.246132
3431 09:56:27.251924 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3432 09:56:27.258638 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3433 09:56:27.265613 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3434 09:56:27.268656 Write Rank1 MR3 =0xb0
3435 09:56:27.271800 DramC Write-DBI on
3436 09:56:27.272227 ==
3437 09:56:27.275254 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3438 09:56:27.278515 fsp= 1, odt_onoff= 1, Byte mode= 0
3439 09:56:27.278945 ==
3440 09:56:27.281910 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3441 09:56:27.285142
3442 09:56:27.285571 Begin, DQ Scan Range 698~762
3443 09:56:27.285905
3444 09:56:27.286208
3445 09:56:27.288479 TX Vref Scan disable
3446 09:56:27.291979 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3447 09:56:27.295359 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3448 09:56:27.298666 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3449 09:56:27.301919 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3450 09:56:27.305450 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3451 09:56:27.308361 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3452 09:56:27.311910 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3453 09:56:27.315323 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3454 09:56:27.318847 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3455 09:56:27.322106 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
3456 09:56:27.325099 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3457 09:56:27.332085 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3458 09:56:27.335676 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3459 09:56:27.339141 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3460 09:56:27.342154 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3461 09:56:27.345352 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3462 09:56:27.348755 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3463 09:56:27.351972 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3464 09:56:27.355792 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3465 09:56:27.358419 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3466 09:56:27.366470 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3467 09:56:27.369310 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3468 09:56:27.373065 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3469 09:56:27.376020 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3470 09:56:27.379525 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3471 09:56:27.382864 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3472 09:56:27.386008 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3473 09:56:27.389505 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3474 09:56:27.393066 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3475 09:56:27.396297 Byte0, DQ PI dly=730, DQM PI dly= 730
3476 09:56:27.399543 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3477 09:56:27.399978
3478 09:56:27.406025 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3479 09:56:27.406591
3480 09:56:27.409838 Byte1, DQ PI dly=721, DQM PI dly= 721
3481 09:56:27.412992 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3482 09:56:27.413499
3483 09:56:27.416310 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3484 09:56:27.416820
3485 09:56:27.423055 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3486 09:56:27.429927 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3487 09:56:27.439821 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3488 09:56:27.440336 Write Rank1 MR3 =0x30
3489 09:56:27.443115 DramC Write-DBI off
3490 09:56:27.443625
3491 09:56:27.443959 [DATLAT]
3492 09:56:27.446575 Freq=1600, CH1 RK1, use_rxtx_scan=0
3493 09:56:27.447250
3494 09:56:27.449697 DATLAT Default: 0x10
3495 09:56:27.450207 7, 0xFFFF, sum=0
3496 09:56:27.450618 8, 0xFFFF, sum=0
3497 09:56:27.452988 9, 0xFFFF, sum=0
3498 09:56:27.453502 10, 0xFFFF, sum=0
3499 09:56:27.456502 11, 0xFFFF, sum=0
3500 09:56:27.457019 12, 0xFFFF, sum=0
3501 09:56:27.459463 13, 0xFFFF, sum=0
3502 09:56:27.459897 14, 0x0, sum=1
3503 09:56:27.462824 15, 0x0, sum=2
3504 09:56:27.463260 16, 0x0, sum=3
3505 09:56:27.466648 17, 0x0, sum=4
3506 09:56:27.470049 pattern=2 first_step=14 total pass=5 best_step=16
3507 09:56:27.470625 ==
3508 09:56:27.473343 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3509 09:56:27.476421 fsp= 1, odt_onoff= 1, Byte mode= 0
3510 09:56:27.476854 ==
3511 09:56:27.482959 Start DQ dly to find pass range UseTestEngine =1
3512 09:56:27.486697 x-axis: bit #, y-axis: DQ dly (-127~63)
3513 09:56:27.487125 RX Vref Scan = 0
3514 09:56:27.489664 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3515 09:56:27.493431 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3516 09:56:27.496633 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3517 09:56:27.500264 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3518 09:56:27.503154 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3519 09:56:27.506954 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3520 09:56:27.507485 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3521 09:56:27.509686 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3522 09:56:27.513243 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3523 09:56:27.516714 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3524 09:56:27.519720 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3525 09:56:27.523149 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3526 09:56:27.526354 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3527 09:56:27.529689 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3528 09:56:27.530296 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3529 09:56:27.533054 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3530 09:56:27.536708 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3531 09:56:27.539699 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3532 09:56:27.542986 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3533 09:56:27.546656 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3534 09:56:27.549988 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3535 09:56:27.553065 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3536 09:56:27.553579 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3537 09:56:27.556760 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3538 09:56:27.559473 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3539 09:56:27.563369 -1, [0] xxooxxxx xxxxxxxo [MSB]
3540 09:56:27.566568 0, [0] xxooxxxx xxxxxxxo [MSB]
3541 09:56:27.569418 1, [0] xxooxxxx ooxxxxxo [MSB]
3542 09:56:27.569853 2, [0] xxooxxxx oooxxxxo [MSB]
3543 09:56:27.573361 3, [0] xxooxxxx ooooxxoo [MSB]
3544 09:56:27.576313 4, [0] xxoooxxo ooooxxoo [MSB]
3545 09:56:27.579630 5, [0] xxoooxxo ooooxooo [MSB]
3546 09:56:27.583073 6, [0] xxoooxxo oooooooo [MSB]
3547 09:56:27.586291 7, [0] xoooooxo oooooooo [MSB]
3548 09:56:27.589793 33, [0] oooxoooo ooooooox [MSB]
3549 09:56:27.592792 34, [0] oooxoooo ooooooox [MSB]
3550 09:56:27.596383 35, [0] oooxoooo ooooooox [MSB]
3551 09:56:27.599892 36, [0] ooxxoooo ooxoooox [MSB]
3552 09:56:27.600414 37, [0] ooxxxooo xxxxooxx [MSB]
3553 09:56:27.602706 38, [0] ooxxxoox xxxxooxx [MSB]
3554 09:56:27.606522 39, [0] ooxxxoox xxxxxxxx [MSB]
3555 09:56:27.609511 40, [0] ooxxxoox xxxxxxxx [MSB]
3556 09:56:27.612932 41, [0] ooxxxxox xxxxxxxx [MSB]
3557 09:56:27.616494 42, [0] xxxxxxxx xxxxxxxx [MSB]
3558 09:56:27.619596 iDelay=42, Bit 0, Center 24 (8 ~ 41) 34
3559 09:56:27.623162 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
3560 09:56:27.626304 iDelay=42, Bit 2, Center 17 (-1 ~ 35) 37
3561 09:56:27.629588 iDelay=42, Bit 3, Center 14 (-3 ~ 32) 36
3562 09:56:27.632834 iDelay=42, Bit 4, Center 20 (4 ~ 36) 33
3563 09:56:27.636157 iDelay=42, Bit 5, Center 23 (7 ~ 40) 34
3564 09:56:27.639635 iDelay=42, Bit 6, Center 24 (8 ~ 41) 34
3565 09:56:27.642913 iDelay=42, Bit 7, Center 20 (4 ~ 37) 34
3566 09:56:27.645922 iDelay=42, Bit 8, Center 18 (1 ~ 36) 36
3567 09:56:27.649356 iDelay=42, Bit 9, Center 18 (1 ~ 36) 36
3568 09:56:27.652802 iDelay=42, Bit 10, Center 18 (2 ~ 35) 34
3569 09:56:27.659411 iDelay=42, Bit 11, Center 19 (3 ~ 36) 34
3570 09:56:27.662714 iDelay=42, Bit 12, Center 22 (6 ~ 38) 33
3571 09:56:27.666114 iDelay=42, Bit 13, Center 21 (5 ~ 38) 34
3572 09:56:27.669480 iDelay=42, Bit 14, Center 19 (3 ~ 36) 34
3573 09:56:27.672867 iDelay=42, Bit 15, Center 15 (-1 ~ 32) 34
3574 09:56:27.673304 ==
3575 09:56:27.676186 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3576 09:56:27.679487 fsp= 1, odt_onoff= 1, Byte mode= 0
3577 09:56:27.682900 ==
3578 09:56:27.683567 DQS Delay:
3579 09:56:27.683964 DQS0 = 0, DQS1 = 0
3580 09:56:27.685985 DQM Delay:
3581 09:56:27.686468 DQM0 = 20, DQM1 = 18
3582 09:56:27.689491 DQ Delay:
3583 09:56:27.689917 DQ0 =24, DQ1 =24, DQ2 =17, DQ3 =14
3584 09:56:27.692756 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =20
3585 09:56:27.696306 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =19
3586 09:56:27.699435 DQ12 =22, DQ13 =21, DQ14 =19, DQ15 =15
3587 09:56:27.699877
3588 09:56:27.702644
3589 09:56:27.703113
3590 09:56:27.703570 [DramC_TX_OE_Calibration] TA2
3591 09:56:27.706124 Original DQ_B0 (3 6) =30, OEN = 27
3592 09:56:27.709336 Original DQ_B1 (3 6) =30, OEN = 27
3593 09:56:27.712641 23, 0x0, End_B0=23 End_B1=23
3594 09:56:27.716092 24, 0x0, End_B0=24 End_B1=24
3595 09:56:27.719670 25, 0x0, End_B0=25 End_B1=25
3596 09:56:27.720149 26, 0x0, End_B0=26 End_B1=26
3597 09:56:27.722780 27, 0x0, End_B0=27 End_B1=27
3598 09:56:27.726208 28, 0x0, End_B0=28 End_B1=28
3599 09:56:27.729734 29, 0x0, End_B0=29 End_B1=29
3600 09:56:27.730251 30, 0x0, End_B0=30 End_B1=30
3601 09:56:27.732790 31, 0xFFFF, End_B0=30 End_B1=30
3602 09:56:27.739468 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3603 09:56:27.746473 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3604 09:56:27.747057
3605 09:56:27.747569
3606 09:56:27.747945 Write Rank1 MR23 =0x3f
3607 09:56:27.749455 [DQSOSC]
3608 09:56:27.756635 [DQSOSCAuto] RK1, (LSB)MR18= 0xa4, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3609 09:56:27.762912 CH1_RK1: MR19=0x3, MR18=0xA4, DQSOSC=337, MR23=63, INC=21, DEC=32
3610 09:56:27.763392 Write Rank1 MR23 =0x3f
3611 09:56:27.763792 [DQSOSC]
3612 09:56:27.773086 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6, (MSB)MR19= 0x3, tDQSOscB0 = 337 ps tDQSOscB1 = 0 ps
3613 09:56:27.773571 CH1 RK1: MR19=3, MR18=A6
3614 09:56:27.776278 [RxdqsGatingPostProcess] freq 1600
3615 09:56:27.782990 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3616 09:56:27.783463 Rank: 0
3617 09:56:27.786386 best DQS0 dly(2T, 0.5T) = (2, 5)
3618 09:56:27.790174 best DQS1 dly(2T, 0.5T) = (2, 5)
3619 09:56:27.793192 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3620 09:56:27.798017 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3621 09:56:27.798581 Rank: 1
3622 09:56:27.799763 best DQS0 dly(2T, 0.5T) = (2, 5)
3623 09:56:27.803158 best DQS1 dly(2T, 0.5T) = (2, 5)
3624 09:56:27.806769 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3625 09:56:27.809937 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3626 09:56:27.813387 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3627 09:56:27.816990 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3628 09:56:27.823471 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3629 09:56:27.823981
3630 09:56:27.824319
3631 09:56:27.826527 [Calibration Summary] Freqency 1600
3632 09:56:27.826964 CH 0, Rank 0
3633 09:56:27.827305 All Pass.
3634 09:56:27.827617
3635 09:56:27.830135 CH 0, Rank 1
3636 09:56:27.830705 All Pass.
3637 09:56:27.831052
3638 09:56:27.831361 CH 1, Rank 0
3639 09:56:27.833411 All Pass.
3640 09:56:27.833840
3641 09:56:27.834172 CH 1, Rank 1
3642 09:56:27.834579 All Pass.
3643 09:56:27.834894
3644 09:56:27.840193 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3645 09:56:27.846944 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3646 09:56:27.856882 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3647 09:56:27.857396 Write Rank0 MR3 =0xb0
3648 09:56:27.863052 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3649 09:56:27.870185 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3650 09:56:27.876858 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3651 09:56:27.880264 Write Rank1 MR3 =0xb0
3652 09:56:27.886986 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3653 09:56:27.893739 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3654 09:56:27.900624 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3655 09:56:27.903518 Write Rank0 MR3 =0xb0
3656 09:56:27.907375 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3657 09:56:27.917297 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3658 09:56:27.923743 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3659 09:56:27.924251 Write Rank1 MR3 =0xb0
3660 09:56:27.926826 DramC Write-DBI on
3661 09:56:27.930363 [GetDramInforAfterCalByMRR] Vendor 1.
3662 09:56:27.934035 [GetDramInforAfterCalByMRR] Revision 7.
3663 09:56:27.934597 MR8 12
3664 09:56:27.940620 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3665 09:56:27.941133 MR8 12
3666 09:56:27.943976 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3667 09:56:27.944485 MR8 12
3668 09:56:27.950788 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3669 09:56:27.951306 MR8 12
3670 09:56:27.953884 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3671 09:56:27.963782 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3672 09:56:27.967140 Write Rank0 MR13 =0xd0
3673 09:56:27.967648 Write Rank1 MR13 =0xd0
3674 09:56:27.970740 Write Rank0 MR13 =0xd0
3675 09:56:27.973925 Write Rank1 MR13 =0xd0
3676 09:56:27.974548 Save calibration result to emmc
3677 09:56:27.976889
3678 09:56:27.977314
3679 09:56:27.980472 [DramcModeReg_Check] Freq_1600, FSP_1
3680 09:56:27.980982 FSP_1, CH_0, RK0
3681 09:56:27.983525 Write Rank0 MR13 =0xd8
3682 09:56:27.986924 MR12 = 0x56 (global = 0x56) match
3683 09:56:27.990748 MR14 = 0x18 (global = 0x18) match
3684 09:56:27.991260 FSP_1, CH_0, RK1
3685 09:56:27.993895 Write Rank1 MR13 =0xd8
3686 09:56:27.997450 MR12 = 0x56 (global = 0x56) match
3687 09:56:28.000785 MR14 = 0x16 (global = 0x16) match
3688 09:56:28.001294 FSP_1, CH_1, RK0
3689 09:56:28.004121 Write Rank0 MR13 =0xd8
3690 09:56:28.007417 MR12 = 0x56 (global = 0x56) match
3691 09:56:28.010525 MR14 = 0x18 (global = 0x18) match
3692 09:56:28.010957 FSP_1, CH_1, RK1
3693 09:56:28.014288 Write Rank1 MR13 =0xd8
3694 09:56:28.017348 MR12 = 0x56 (global = 0x56) match
3695 09:56:28.017781 MR14 = 0x16 (global = 0x16) match
3696 09:56:28.020904
3697 09:56:28.024073 [MEM_TEST] 02: After DFS, before run time config
3698 09:56:28.034453 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3699 09:56:28.034965
3700 09:56:28.035306 [TA2_TEST]
3701 09:56:28.035617 === TA2 HW
3702 09:56:28.037807 TA2 PAT: XTALK
3703 09:56:28.041396 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3704 09:56:28.047763 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3705 09:56:28.051159 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3706 09:56:28.054855 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3707 09:56:28.055382
3708 09:56:28.057588
3709 09:56:28.058014 Settings after calibration
3710 09:56:28.058424
3711 09:56:28.061196 [DramcRunTimeConfig]
3712 09:56:28.064510 TransferPLLToSPMControl - MODE SW PHYPLL
3713 09:56:28.065023 TX_TRACKING: ON
3714 09:56:28.067543 RX_TRACKING: ON
3715 09:56:28.067974 HW_GATING: ON
3716 09:56:28.071164 HW_GATING DBG: OFF
3717 09:56:28.071675 ddr_geometry:1
3718 09:56:28.074504 ddr_geometry:1
3719 09:56:28.075010 ddr_geometry:1
3720 09:56:28.075348 ddr_geometry:1
3721 09:56:28.077806 ddr_geometry:1
3722 09:56:28.078317 ddr_geometry:1
3723 09:56:28.081441 ddr_geometry:1
3724 09:56:28.081950 ddr_geometry:1
3725 09:56:28.084833 High Freq DUMMY_READ_FOR_TRACKING: ON
3726 09:56:28.087834 ZQCS_ENABLE_LP4: OFF
3727 09:56:28.090914 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3728 09:56:28.091518 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3729 09:56:28.094594 SPM_CONTROL_AFTERK: ON
3730 09:56:28.098061 IMPEDANCE_TRACKING: ON
3731 09:56:28.098665 TEMP_SENSOR: ON
3732 09:56:28.101138 PER_BANK_REFRESH: ON
3733 09:56:28.101648 HW_SAVE_FOR_SR: ON
3734 09:56:28.104744 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3735 09:56:28.107753 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3736 09:56:28.111256 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3737 09:56:28.114433 Read ODT Tracking: ON
3738 09:56:28.117797 =========================
3739 09:56:28.118358
3740 09:56:28.118699 [TA2_TEST]
3741 09:56:28.119009 === TA2 HW
3742 09:56:28.124471 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3743 09:56:28.127885 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3744 09:56:28.134596 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3745 09:56:28.137983 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3746 09:56:28.138547
3747 09:56:28.141050 [MEM_TEST] 03: After run time config
3748 09:56:28.152435 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3749 09:56:28.155563 [complex_mem_test] start addr:0x40024000, len:131072
3750 09:56:28.359696 1st complex R/W mem test pass
3751 09:56:28.366700 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3752 09:56:28.369749 sync preloader write leveling
3753 09:56:28.373210 sync preloader cbt_mr12
3754 09:56:28.373715 sync preloader cbt_clk_dly
3755 09:56:28.376616 sync preloader cbt_cmd_dly
3756 09:56:28.379621 sync preloader cbt_cs
3757 09:56:28.383074 sync preloader cbt_ca_perbit_delay
3758 09:56:28.383583 sync preloader clk_delay
3759 09:56:28.386322 sync preloader dqs_delay
3760 09:56:28.389898 sync preloader u1Gating2T_Save
3761 09:56:28.393005 sync preloader u1Gating05T_Save
3762 09:56:28.396752 sync preloader u1Gatingfine_tune_Save
3763 09:56:28.400051 sync preloader u1Gatingucpass_count_Save
3764 09:56:28.403022 sync preloader u1TxWindowPerbitVref_Save
3765 09:56:28.406505 sync preloader u1TxCenter_min_Save
3766 09:56:28.409918 sync preloader u1TxCenter_max_Save
3767 09:56:28.412823 sync preloader u1Txwin_center_Save
3768 09:56:28.416746 sync preloader u1Txfirst_pass_Save
3769 09:56:28.419739 sync preloader u1Txlast_pass_Save
3770 09:56:28.420246 sync preloader u1RxDatlat_Save
3771 09:56:28.423289 sync preloader u1RxWinPerbitVref_Save
3772 09:56:28.429668 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3773 09:56:28.433122 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3774 09:56:28.436195 sync preloader delay_cell_unit
3775 09:56:28.443070 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3776 09:56:28.446598 sync preloader write leveling
3777 09:56:28.447103 sync preloader cbt_mr12
3778 09:56:28.449788 sync preloader cbt_clk_dly
3779 09:56:28.453479 sync preloader cbt_cmd_dly
3780 09:56:28.453989 sync preloader cbt_cs
3781 09:56:28.456538 sync preloader cbt_ca_perbit_delay
3782 09:56:28.459774 sync preloader clk_delay
3783 09:56:28.463204 sync preloader dqs_delay
3784 09:56:28.463714 sync preloader u1Gating2T_Save
3785 09:56:28.466548 sync preloader u1Gating05T_Save
3786 09:56:28.470030 sync preloader u1Gatingfine_tune_Save
3787 09:56:28.473543 sync preloader u1Gatingucpass_count_Save
3788 09:56:28.476834 sync preloader u1TxWindowPerbitVref_Save
3789 09:56:28.479872 sync preloader u1TxCenter_min_Save
3790 09:56:28.483284 sync preloader u1TxCenter_max_Save
3791 09:56:28.486469 sync preloader u1Txwin_center_Save
3792 09:56:28.490159 sync preloader u1Txfirst_pass_Save
3793 09:56:28.493260 sync preloader u1Txlast_pass_Save
3794 09:56:28.496737 sync preloader u1RxDatlat_Save
3795 09:56:28.499741 sync preloader u1RxWinPerbitVref_Save
3796 09:56:28.503311 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3797 09:56:28.506607 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3798 09:56:28.509917 sync preloader delay_cell_unit
3799 09:56:28.516358 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3800 09:56:28.519947 sync preloader write leveling
3801 09:56:28.523430 sync preloader cbt_mr12
3802 09:56:28.523938 sync preloader cbt_clk_dly
3803 09:56:28.526744 sync preloader cbt_cmd_dly
3804 09:56:28.529952 sync preloader cbt_cs
3805 09:56:28.533420 sync preloader cbt_ca_perbit_delay
3806 09:56:28.533928 sync preloader clk_delay
3807 09:56:28.536859 sync preloader dqs_delay
3808 09:56:28.540082 sync preloader u1Gating2T_Save
3809 09:56:28.543581 sync preloader u1Gating05T_Save
3810 09:56:28.546492 sync preloader u1Gatingfine_tune_Save
3811 09:56:28.549891 sync preloader u1Gatingucpass_count_Save
3812 09:56:28.553510 sync preloader u1TxWindowPerbitVref_Save
3813 09:56:28.556540 sync preloader u1TxCenter_min_Save
3814 09:56:28.559956 sync preloader u1TxCenter_max_Save
3815 09:56:28.563226 sync preloader u1Txwin_center_Save
3816 09:56:28.563832 sync preloader u1Txfirst_pass_Save
3817 09:56:28.566372 sync preloader u1Txlast_pass_Save
3818 09:56:28.570076 sync preloader u1RxDatlat_Save
3819 09:56:28.573451 sync preloader u1RxWinPerbitVref_Save
3820 09:56:28.576887 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3821 09:56:28.583304 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3822 09:56:28.583741 sync preloader delay_cell_unit
3823 09:56:28.590234 just_for_test_dump_coreboot_params dump all params
3824 09:56:28.590752 dump source = 0x0
3825 09:56:28.593766 dump params frequency:1600
3826 09:56:28.596756 dump params rank number:2
3827 09:56:28.597262
3828 09:56:28.599934 dump params write leveling
3829 09:56:28.600366 write leveling[0][0][0] = 0x21
3830 09:56:28.603245 write leveling[0][0][1] = 0x1c
3831 09:56:28.606798 write leveling[0][1][0] = 0x22
3832 09:56:28.610298 write leveling[0][1][1] = 0x1e
3833 09:56:28.613382 write leveling[1][0][0] = 0x24
3834 09:56:28.616735 write leveling[1][0][1] = 0x21
3835 09:56:28.617161 write leveling[1][1][0] = 0x25
3836 09:56:28.619862 write leveling[1][1][1] = 0x1f
3837 09:56:28.623625 dump params cbt_cs
3838 09:56:28.624135 cbt_cs[0][0] = 0x8
3839 09:56:28.626966 cbt_cs[0][1] = 0x8
3840 09:56:28.627519 cbt_cs[1][0] = 0xc
3841 09:56:28.630139 cbt_cs[1][1] = 0xc
3842 09:56:28.630751 dump params cbt_mr12
3843 09:56:28.633426 cbt_mr12[0][0] = 0x16
3844 09:56:28.633927 cbt_mr12[0][1] = 0x16
3845 09:56:28.636962 cbt_mr12[1][0] = 0x16
3846 09:56:28.640322 cbt_mr12[1][1] = 0x16
3847 09:56:28.640831 dump params tx window
3848 09:56:28.643467 tx_center_min[0][0][0] = 979
3849 09:56:28.647031 tx_center_max[0][0][0] = 987
3850 09:56:28.650147 tx_center_min[0][0][1] = 975
3851 09:56:28.650634 tx_center_max[0][0][1] = 979
3852 09:56:28.653701 tx_center_min[0][1][0] = 981
3853 09:56:28.657019 tx_center_max[0][1][0] = 988
3854 09:56:28.660133 tx_center_min[0][1][1] = 978
3855 09:56:28.663685 tx_center_max[0][1][1] = 984
3856 09:56:28.664228 tx_center_min[1][0][0] = 982
3857 09:56:28.666778 tx_center_max[1][0][0] = 988
3858 09:56:28.670370 tx_center_min[1][0][1] = 980
3859 09:56:28.673732 tx_center_max[1][0][1] = 982
3860 09:56:28.674293 tx_center_min[1][1][0] = 983
3861 09:56:28.677120 tx_center_max[1][1][0] = 989
3862 09:56:28.680150 tx_center_min[1][1][1] = 976
3863 09:56:28.683293 tx_center_max[1][1][1] = 980
3864 09:56:28.683726 dump params tx window
3865 09:56:28.686587 tx_win_center[0][0][0] = 987
3866 09:56:28.689909 tx_first_pass[0][0][0] = 975
3867 09:56:28.693257 tx_last_pass[0][0][0] = 999
3868 09:56:28.696757 tx_win_center[0][0][1] = 986
3869 09:56:28.697329 tx_first_pass[0][0][1] = 974
3870 09:56:28.700030 tx_last_pass[0][0][1] = 998
3871 09:56:28.703349 tx_win_center[0][0][2] = 986
3872 09:56:28.706741 tx_first_pass[0][0][2] = 974
3873 09:56:28.707175 tx_last_pass[0][0][2] = 998
3874 09:56:28.710185 tx_win_center[0][0][3] = 979
3875 09:56:28.713358 tx_first_pass[0][0][3] = 968
3876 09:56:28.716702 tx_last_pass[0][0][3] = 991
3877 09:56:28.720108 tx_win_center[0][0][4] = 986
3878 09:56:28.720520 tx_first_pass[0][0][4] = 975
3879 09:56:28.723300 tx_last_pass[0][0][4] = 998
3880 09:56:28.726760 tx_win_center[0][0][5] = 981
3881 09:56:28.729956 tx_first_pass[0][0][5] = 969
3882 09:56:28.730473 tx_last_pass[0][0][5] = 993
3883 09:56:28.733628 tx_win_center[0][0][6] = 982
3884 09:56:28.736787 tx_first_pass[0][0][6] = 970
3885 09:56:28.740279 tx_last_pass[0][0][6] = 994
3886 09:56:28.743347 tx_win_center[0][0][7] = 983
3887 09:56:28.743857 tx_first_pass[0][0][7] = 971
3888 09:56:28.746916 tx_last_pass[0][0][7] = 995
3889 09:56:28.749989 tx_win_center[0][0][8] = 975
3890 09:56:28.753292 tx_first_pass[0][0][8] = 962
3891 09:56:28.753799 tx_last_pass[0][0][8] = 988
3892 09:56:28.756842 tx_win_center[0][0][9] = 977
3893 09:56:28.760077 tx_first_pass[0][0][9] = 965
3894 09:56:28.763646 tx_last_pass[0][0][9] = 989
3895 09:56:28.767191 tx_win_center[0][0][10] = 979
3896 09:56:28.767700 tx_first_pass[0][0][10] = 968
3897 09:56:28.770420 tx_last_pass[0][0][10] = 991
3898 09:56:28.773527 tx_win_center[0][0][11] = 976
3899 09:56:28.776975 tx_first_pass[0][0][11] = 964
3900 09:56:28.777510 tx_last_pass[0][0][11] = 989
3901 09:56:28.780273 tx_win_center[0][0][12] = 977
3902 09:56:28.783460 tx_first_pass[0][0][12] = 965
3903 09:56:28.787054 tx_last_pass[0][0][12] = 989
3904 09:56:28.790335 tx_win_center[0][0][13] = 975
3905 09:56:28.793906 tx_first_pass[0][0][13] = 962
3906 09:56:28.794491 tx_last_pass[0][0][13] = 988
3907 09:56:28.796797 tx_win_center[0][0][14] = 977
3908 09:56:28.800488 tx_first_pass[0][0][14] = 965
3909 09:56:28.803388 tx_last_pass[0][0][14] = 989
3910 09:56:28.804045 tx_win_center[0][0][15] = 978
3911 09:56:28.806998 tx_first_pass[0][0][15] = 966
3912 09:56:28.809964 tx_last_pass[0][0][15] = 990
3913 09:56:28.813502 tx_win_center[0][1][0] = 988
3914 09:56:28.817007 tx_first_pass[0][1][0] = 976
3915 09:56:28.817517 tx_last_pass[0][1][0] = 1001
3916 09:56:28.820453 tx_win_center[0][1][1] = 987
3917 09:56:28.823773 tx_first_pass[0][1][1] = 976
3918 09:56:28.826855 tx_last_pass[0][1][1] = 999
3919 09:56:28.830136 tx_win_center[0][1][2] = 987
3920 09:56:28.830592 tx_first_pass[0][1][2] = 976
3921 09:56:28.833813 tx_last_pass[0][1][2] = 999
3922 09:56:28.836940 tx_win_center[0][1][3] = 981
3923 09:56:28.840337 tx_first_pass[0][1][3] = 969
3924 09:56:28.840848 tx_last_pass[0][1][3] = 994
3925 09:56:28.843757 tx_win_center[0][1][4] = 988
3926 09:56:28.847119 tx_first_pass[0][1][4] = 976
3927 09:56:28.850259 tx_last_pass[0][1][4] = 1000
3928 09:56:28.853870 tx_win_center[0][1][5] = 982
3929 09:56:28.854424 tx_first_pass[0][1][5] = 970
3930 09:56:28.857086 tx_last_pass[0][1][5] = 994
3931 09:56:28.860384 tx_win_center[0][1][6] = 983
3932 09:56:28.863867 tx_first_pass[0][1][6] = 971
3933 09:56:28.864383 tx_last_pass[0][1][6] = 995
3934 09:56:28.866975 tx_win_center[0][1][7] = 986
3935 09:56:28.870466 tx_first_pass[0][1][7] = 975
3936 09:56:28.873756 tx_last_pass[0][1][7] = 998
3937 09:56:28.874311 tx_win_center[0][1][8] = 978
3938 09:56:28.877010 tx_first_pass[0][1][8] = 966
3939 09:56:28.880542 tx_last_pass[0][1][8] = 991
3940 09:56:28.883648 tx_win_center[0][1][9] = 979
3941 09:56:28.886938 tx_first_pass[0][1][9] = 968
3942 09:56:28.887416 tx_last_pass[0][1][9] = 991
3943 09:56:28.890451 tx_win_center[0][1][10] = 984
3944 09:56:28.894178 tx_first_pass[0][1][10] = 972
3945 09:56:28.897660 tx_last_pass[0][1][10] = 996
3946 09:56:28.900549 tx_win_center[0][1][11] = 979
3947 09:56:28.900980 tx_first_pass[0][1][11] = 967
3948 09:56:28.903603 tx_last_pass[0][1][11] = 991
3949 09:56:28.906953 tx_win_center[0][1][12] = 980
3950 09:56:28.910439 tx_first_pass[0][1][12] = 968
3951 09:56:28.913921 tx_last_pass[0][1][12] = 992
3952 09:56:28.914424 tx_win_center[0][1][13] = 979
3953 09:56:28.917025 tx_first_pass[0][1][13] = 968
3954 09:56:28.920565 tx_last_pass[0][1][13] = 990
3955 09:56:28.923947 tx_win_center[0][1][14] = 979
3956 09:56:28.926939 tx_first_pass[0][1][14] = 968
3957 09:56:28.927384 tx_last_pass[0][1][14] = 991
3958 09:56:28.930424 tx_win_center[0][1][15] = 981
3959 09:56:28.933795 tx_first_pass[0][1][15] = 969
3960 09:56:28.937027 tx_last_pass[0][1][15] = 993
3961 09:56:28.940758 tx_win_center[1][0][0] = 988
3962 09:56:28.941278 tx_first_pass[1][0][0] = 977
3963 09:56:28.943933 tx_last_pass[1][0][0] = 1000
3964 09:56:28.947202 tx_win_center[1][0][1] = 987
3965 09:56:28.950358 tx_first_pass[1][0][1] = 976
3966 09:56:28.950808 tx_last_pass[1][0][1] = 998
3967 09:56:28.954094 tx_win_center[1][0][2] = 984
3968 09:56:28.957286 tx_first_pass[1][0][2] = 972
3969 09:56:28.960345 tx_last_pass[1][0][2] = 996
3970 09:56:28.964061 tx_win_center[1][0][3] = 982
3971 09:56:28.964593 tx_first_pass[1][0][3] = 970
3972 09:56:28.967823 tx_last_pass[1][0][3] = 994
3973 09:56:28.970831 tx_win_center[1][0][4] = 985
3974 09:56:28.974167 tx_first_pass[1][0][4] = 974
3975 09:56:28.974717 tx_last_pass[1][0][4] = 997
3976 09:56:28.977418 tx_win_center[1][0][5] = 987
3977 09:56:28.980760 tx_first_pass[1][0][5] = 976
3978 09:56:28.984410 tx_last_pass[1][0][5] = 998
3979 09:56:28.984934 tx_win_center[1][0][6] = 987
3980 09:56:28.987717 tx_first_pass[1][0][6] = 976
3981 09:56:28.990940 tx_last_pass[1][0][6] = 999
3982 09:56:28.994192 tx_win_center[1][0][7] = 985
3983 09:56:28.997868 tx_first_pass[1][0][7] = 974
3984 09:56:28.998438 tx_last_pass[1][0][7] = 997
3985 09:56:29.001005 tx_win_center[1][0][8] = 980
3986 09:56:29.004563 tx_first_pass[1][0][8] = 969
3987 09:56:29.007784 tx_last_pass[1][0][8] = 992
3988 09:56:29.008304 tx_win_center[1][0][9] = 980
3989 09:56:29.010893 tx_first_pass[1][0][9] = 969
3990 09:56:29.014477 tx_last_pass[1][0][9] = 992
3991 09:56:29.018470 tx_win_center[1][0][10] = 981
3992 09:56:29.020989 tx_first_pass[1][0][10] = 969
3993 09:56:29.021622 tx_last_pass[1][0][10] = 993
3994 09:56:29.024413 tx_win_center[1][0][11] = 982
3995 09:56:29.027470 tx_first_pass[1][0][11] = 970
3996 09:56:29.030691 tx_last_pass[1][0][11] = 994
3997 09:56:29.034255 tx_win_center[1][0][12] = 982
3998 09:56:29.034772 tx_first_pass[1][0][12] = 971
3999 09:56:29.037292 tx_last_pass[1][0][12] = 994
4000 09:56:29.041201 tx_win_center[1][0][13] = 981
4001 09:56:29.044376 tx_first_pass[1][0][13] = 970
4002 09:56:29.047653 tx_last_pass[1][0][13] = 993
4003 09:56:29.048162 tx_win_center[1][0][14] = 981
4004 09:56:29.050755 tx_first_pass[1][0][14] = 970
4005 09:56:29.054197 tx_last_pass[1][0][14] = 993
4006 09:56:29.057734 tx_win_center[1][0][15] = 980
4007 09:56:29.061004 tx_first_pass[1][0][15] = 968
4008 09:56:29.061440 tx_last_pass[1][0][15] = 992
4009 09:56:29.064272 tx_win_center[1][1][0] = 989
4010 09:56:29.068109 tx_first_pass[1][1][0] = 976
4011 09:56:29.071172 tx_last_pass[1][1][0] = 1002
4012 09:56:29.071693 tx_win_center[1][1][1] = 987
4013 09:56:29.074473 tx_first_pass[1][1][1] = 975
4014 09:56:29.077837 tx_last_pass[1][1][1] = 999
4015 09:56:29.080792 tx_win_center[1][1][2] = 984
4016 09:56:29.083893 tx_first_pass[1][1][2] = 972
4017 09:56:29.084334 tx_last_pass[1][1][2] = 997
4018 09:56:29.087588 tx_win_center[1][1][3] = 983
4019 09:56:29.090997 tx_first_pass[1][1][3] = 970
4020 09:56:29.094284 tx_last_pass[1][1][3] = 997
4021 09:56:29.094803 tx_win_center[1][1][4] = 986
4022 09:56:29.097685 tx_first_pass[1][1][4] = 974
4023 09:56:29.100946 tx_last_pass[1][1][4] = 998
4024 09:56:29.104303 tx_win_center[1][1][5] = 988
4025 09:56:29.108001 tx_first_pass[1][1][5] = 976
4026 09:56:29.108522 tx_last_pass[1][1][5] = 1000
4027 09:56:29.110743 tx_win_center[1][1][6] = 988
4028 09:56:29.114439 tx_first_pass[1][1][6] = 976
4029 09:56:29.117885 tx_last_pass[1][1][6] = 1001
4030 09:56:29.120912 tx_win_center[1][1][7] = 986
4031 09:56:29.121424 tx_first_pass[1][1][7] = 974
4032 09:56:29.124108 tx_last_pass[1][1][7] = 998
4033 09:56:29.127841 tx_win_center[1][1][8] = 978
4034 09:56:29.130696 tx_first_pass[1][1][8] = 965
4035 09:56:29.131130 tx_last_pass[1][1][8] = 991
4036 09:56:29.134107 tx_win_center[1][1][9] = 978
4037 09:56:29.137624 tx_first_pass[1][1][9] = 965
4038 09:56:29.140992 tx_last_pass[1][1][9] = 991
4039 09:56:29.144502 tx_win_center[1][1][10] = 978
4040 09:56:29.145014 tx_first_pass[1][1][10] = 966
4041 09:56:29.147728 tx_last_pass[1][1][10] = 991
4042 09:56:29.150913 tx_win_center[1][1][11] = 980
4043 09:56:29.154062 tx_first_pass[1][1][11] = 968
4044 09:56:29.157583 tx_last_pass[1][1][11] = 992
4045 09:56:29.158127 tx_win_center[1][1][12] = 980
4046 09:56:29.160814 tx_first_pass[1][1][12] = 969
4047 09:56:29.163908 tx_last_pass[1][1][12] = 992
4048 09:56:29.167491 tx_win_center[1][1][13] = 980
4049 09:56:29.170891 tx_first_pass[1][1][13] = 968
4050 09:56:29.171409 tx_last_pass[1][1][13] = 992
4051 09:56:29.174324 tx_win_center[1][1][14] = 980
4052 09:56:29.177674 tx_first_pass[1][1][14] = 968
4053 09:56:29.180971 tx_last_pass[1][1][14] = 992
4054 09:56:29.184205 tx_win_center[1][1][15] = 976
4055 09:56:29.184659 tx_first_pass[1][1][15] = 963
4056 09:56:29.187568 tx_last_pass[1][1][15] = 990
4057 09:56:29.190802 dump params rx window
4058 09:56:29.191244 rx_firspass[0][0][0] = 8
4059 09:56:29.194596 rx_lastpass[0][0][0] = 40
4060 09:56:29.197952 rx_firspass[0][0][1] = 7
4061 09:56:29.198520 rx_lastpass[0][0][1] = 39
4062 09:56:29.201175 rx_firspass[0][0][2] = 9
4063 09:56:29.204702 rx_lastpass[0][0][2] = 38
4064 09:56:29.207986 rx_firspass[0][0][3] = -3
4065 09:56:29.208493 rx_lastpass[0][0][3] = 28
4066 09:56:29.211016 rx_firspass[0][0][4] = 7
4067 09:56:29.214504 rx_lastpass[0][0][4] = 38
4068 09:56:29.214951 rx_firspass[0][0][5] = 0
4069 09:56:29.218129 rx_lastpass[0][0][5] = 30
4070 09:56:29.221614 rx_firspass[0][0][6] = 1
4071 09:56:29.222126 rx_lastpass[0][0][6] = 32
4072 09:56:29.224464 rx_firspass[0][0][7] = 3
4073 09:56:29.227833 rx_lastpass[0][0][7] = 32
4074 09:56:29.228343 rx_firspass[0][0][8] = 0
4075 09:56:29.231465 rx_lastpass[0][0][8] = 34
4076 09:56:29.234956 rx_firspass[0][0][9] = 4
4077 09:56:29.237858 rx_lastpass[0][0][9] = 34
4078 09:56:29.238411 rx_firspass[0][0][10] = 7
4079 09:56:29.240956 rx_lastpass[0][0][10] = 38
4080 09:56:29.244606 rx_firspass[0][0][11] = 1
4081 09:56:29.245112 rx_lastpass[0][0][11] = 34
4082 09:56:29.248289 rx_firspass[0][0][12] = 2
4083 09:56:29.251239 rx_lastpass[0][0][12] = 36
4084 09:56:29.254357 rx_firspass[0][0][13] = 2
4085 09:56:29.254799 rx_lastpass[0][0][13] = 30
4086 09:56:29.258354 rx_firspass[0][0][14] = 0
4087 09:56:29.261344 rx_lastpass[0][0][14] = 35
4088 09:56:29.264335 rx_firspass[0][0][15] = 3
4089 09:56:29.264786 rx_lastpass[0][0][15] = 36
4090 09:56:29.268024 rx_firspass[0][1][0] = 7
4091 09:56:29.271008 rx_lastpass[0][1][0] = 41
4092 09:56:29.271448 rx_firspass[0][1][1] = 5
4093 09:56:29.275077 rx_lastpass[0][1][1] = 40
4094 09:56:29.277924 rx_firspass[0][1][2] = 7
4095 09:56:29.278503 rx_lastpass[0][1][2] = 39
4096 09:56:29.281024 rx_firspass[0][1][3] = -3
4097 09:56:29.284364 rx_lastpass[0][1][3] = 31
4098 09:56:29.288207 rx_firspass[0][1][4] = 6
4099 09:56:29.288725 rx_lastpass[0][1][4] = 40
4100 09:56:29.291125 rx_firspass[0][1][5] = -1
4101 09:56:29.294505 rx_lastpass[0][1][5] = 33
4102 09:56:29.294936 rx_firspass[0][1][6] = 2
4103 09:56:29.298184 rx_lastpass[0][1][6] = 34
4104 09:56:29.301411 rx_firspass[0][1][7] = 3
4105 09:56:29.301924 rx_lastpass[0][1][7] = 34
4106 09:56:29.304922 rx_firspass[0][1][8] = 0
4107 09:56:29.308115 rx_lastpass[0][1][8] = 35
4108 09:56:29.311113 rx_firspass[0][1][9] = 3
4109 09:56:29.311544 rx_lastpass[0][1][9] = 36
4110 09:56:29.314812 rx_firspass[0][1][10] = 6
4111 09:56:29.318335 rx_lastpass[0][1][10] = 39
4112 09:56:29.318852 rx_firspass[0][1][11] = 0
4113 09:56:29.321289 rx_lastpass[0][1][11] = 34
4114 09:56:29.324659 rx_firspass[0][1][12] = 3
4115 09:56:29.328215 rx_lastpass[0][1][12] = 37
4116 09:56:29.328742 rx_firspass[0][1][13] = 2
4117 09:56:29.331410 rx_lastpass[0][1][13] = 33
4118 09:56:29.334864 rx_firspass[0][1][14] = 2
4119 09:56:29.337800 rx_lastpass[0][1][14] = 34
4120 09:56:29.338264 rx_firspass[0][1][15] = 3
4121 09:56:29.341383 rx_lastpass[0][1][15] = 37
4122 09:56:29.345010 rx_firspass[1][0][0] = 8
4123 09:56:29.345522 rx_lastpass[1][0][0] = 40
4124 09:56:29.348128 rx_firspass[1][0][1] = 7
4125 09:56:29.351230 rx_lastpass[1][0][1] = 39
4126 09:56:29.351676 rx_firspass[1][0][2] = 0
4127 09:56:29.354721 rx_lastpass[1][0][2] = 34
4128 09:56:29.358381 rx_firspass[1][0][3] = -2
4129 09:56:29.361466 rx_lastpass[1][0][3] = 32
4130 09:56:29.361982 rx_firspass[1][0][4] = 4
4131 09:56:29.364953 rx_lastpass[1][0][4] = 34
4132 09:56:29.368381 rx_firspass[1][0][5] = 8
4133 09:56:29.368909 rx_lastpass[1][0][5] = 40
4134 09:56:29.371874 rx_firspass[1][0][6] = 9
4135 09:56:29.375078 rx_lastpass[1][0][6] = 40
4136 09:56:29.375596 rx_firspass[1][0][7] = 4
4137 09:56:29.378069 rx_lastpass[1][0][7] = 34
4138 09:56:29.381195 rx_firspass[1][0][8] = 1
4139 09:56:29.381629 rx_lastpass[1][0][8] = 35
4140 09:56:29.384811 rx_firspass[1][0][9] = 1
4141 09:56:29.388550 rx_lastpass[1][0][9] = 35
4142 09:56:29.391283 rx_firspass[1][0][10] = 2
4143 09:56:29.391739 rx_lastpass[1][0][10] = 33
4144 09:56:29.394704 rx_firspass[1][0][11] = 2
4145 09:56:29.397838 rx_lastpass[1][0][11] = 36
4146 09:56:29.398294 rx_firspass[1][0][12] = 5
4147 09:56:29.401164 rx_lastpass[1][0][12] = 37
4148 09:56:29.404946 rx_firspass[1][0][13] = 3
4149 09:56:29.408383 rx_lastpass[1][0][13] = 35
4150 09:56:29.408879 rx_firspass[1][0][14] = 3
4151 09:56:29.411824 rx_lastpass[1][0][14] = 35
4152 09:56:29.414654 rx_firspass[1][0][15] = -1
4153 09:56:29.418410 rx_lastpass[1][0][15] = 31
4154 09:56:29.418914 rx_firspass[1][1][0] = 8
4155 09:56:29.421771 rx_lastpass[1][1][0] = 41
4156 09:56:29.425409 rx_firspass[1][1][1] = 7
4157 09:56:29.425915 rx_lastpass[1][1][1] = 41
4158 09:56:29.428166 rx_firspass[1][1][2] = -1
4159 09:56:29.431733 rx_lastpass[1][1][2] = 35
4160 09:56:29.432256 rx_firspass[1][1][3] = -3
4161 09:56:29.434956 rx_lastpass[1][1][3] = 32
4162 09:56:29.438483 rx_firspass[1][1][4] = 4
4163 09:56:29.441824 rx_lastpass[1][1][4] = 36
4164 09:56:29.442364 rx_firspass[1][1][5] = 7
4165 09:56:29.445300 rx_lastpass[1][1][5] = 40
4166 09:56:29.448828 rx_firspass[1][1][6] = 8
4167 09:56:29.449334 rx_lastpass[1][1][6] = 41
4168 09:56:29.451656 rx_firspass[1][1][7] = 4
4169 09:56:29.455185 rx_lastpass[1][1][7] = 37
4170 09:56:29.455693 rx_firspass[1][1][8] = 1
4171 09:56:29.458552 rx_lastpass[1][1][8] = 36
4172 09:56:29.461660 rx_firspass[1][1][9] = 1
4173 09:56:29.462087 rx_lastpass[1][1][9] = 36
4174 09:56:29.465223 rx_firspass[1][1][10] = 2
4175 09:56:29.468849 rx_lastpass[1][1][10] = 35
4176 09:56:29.471867 rx_firspass[1][1][11] = 3
4177 09:56:29.472376 rx_lastpass[1][1][11] = 36
4178 09:56:29.475146 rx_firspass[1][1][12] = 6
4179 09:56:29.478730 rx_lastpass[1][1][12] = 38
4180 09:56:29.481760 rx_firspass[1][1][13] = 5
4181 09:56:29.482189 rx_lastpass[1][1][13] = 38
4182 09:56:29.485342 rx_firspass[1][1][14] = 3
4183 09:56:29.488421 rx_lastpass[1][1][14] = 36
4184 09:56:29.488852 rx_firspass[1][1][15] = -1
4185 09:56:29.491688 rx_lastpass[1][1][15] = 32
4186 09:56:29.495551 dump params clk_delay
4187 09:56:29.496056 clk_delay[0] = 0
4188 09:56:29.498514 clk_delay[1] = 0
4189 09:56:29.498942 dump params dqs_delay
4190 09:56:29.502043 dqs_delay[0][0] = -1
4191 09:56:29.502550 dqs_delay[0][1] = 2
4192 09:56:29.505553 dqs_delay[1][0] = 0
4193 09:56:29.506059 dqs_delay[1][1] = 0
4194 09:56:29.508697 dump params delay_cell_unit = 762
4195 09:56:29.511821 dump source = 0x0
4196 09:56:29.515262 dump params frequency:1200
4197 09:56:29.515843 dump params rank number:2
4198 09:56:29.516190
4199 09:56:29.518329 dump params write leveling
4200 09:56:29.522028 write leveling[0][0][0] = 0x0
4201 09:56:29.525236 write leveling[0][0][1] = 0x0
4202 09:56:29.528509 write leveling[0][1][0] = 0x0
4203 09:56:29.528939 write leveling[0][1][1] = 0x0
4204 09:56:29.531754 write leveling[1][0][0] = 0x0
4205 09:56:29.535516 write leveling[1][0][1] = 0x0
4206 09:56:29.538672 write leveling[1][1][0] = 0x0
4207 09:56:29.542074 write leveling[1][1][1] = 0x0
4208 09:56:29.542619 dump params cbt_cs
4209 09:56:29.545622 cbt_cs[0][0] = 0x0
4210 09:56:29.546127 cbt_cs[0][1] = 0x0
4211 09:56:29.548694 cbt_cs[1][0] = 0x0
4212 09:56:29.549200 cbt_cs[1][1] = 0x0
4213 09:56:29.551804 dump params cbt_mr12
4214 09:56:29.552232 cbt_mr12[0][0] = 0x0
4215 09:56:29.555159 cbt_mr12[0][1] = 0x0
4216 09:56:29.555588 cbt_mr12[1][0] = 0x0
4217 09:56:29.558725 cbt_mr12[1][1] = 0x0
4218 09:56:29.562000 dump params tx window
4219 09:56:29.562452 tx_center_min[0][0][0] = 0
4220 09:56:29.565501 tx_center_max[0][0][0] = 0
4221 09:56:29.568738 tx_center_min[0][0][1] = 0
4222 09:56:29.569252 tx_center_max[0][0][1] = 0
4223 09:56:29.572136 tx_center_min[0][1][0] = 0
4224 09:56:29.575361 tx_center_max[0][1][0] = 0
4225 09:56:29.579146 tx_center_min[0][1][1] = 0
4226 09:56:29.579649 tx_center_max[0][1][1] = 0
4227 09:56:29.582022 tx_center_min[1][0][0] = 0
4228 09:56:29.585209 tx_center_max[1][0][0] = 0
4229 09:56:29.588979 tx_center_min[1][0][1] = 0
4230 09:56:29.589491 tx_center_max[1][0][1] = 0
4231 09:56:29.591954 tx_center_min[1][1][0] = 0
4232 09:56:29.595663 tx_center_max[1][1][0] = 0
4233 09:56:29.598912 tx_center_min[1][1][1] = 0
4234 09:56:29.599350 tx_center_max[1][1][1] = 0
4235 09:56:29.602192 dump params tx window
4236 09:56:29.605846 tx_win_center[0][0][0] = 0
4237 09:56:29.606416 tx_first_pass[0][0][0] = 0
4238 09:56:29.608827 tx_last_pass[0][0][0] = 0
4239 09:56:29.612142 tx_win_center[0][0][1] = 0
4240 09:56:29.615497 tx_first_pass[0][0][1] = 0
4241 09:56:29.615989 tx_last_pass[0][0][1] = 0
4242 09:56:29.618941 tx_win_center[0][0][2] = 0
4243 09:56:29.622532 tx_first_pass[0][0][2] = 0
4244 09:56:29.623041 tx_last_pass[0][0][2] = 0
4245 09:56:29.625276 tx_win_center[0][0][3] = 0
4246 09:56:29.628799 tx_first_pass[0][0][3] = 0
4247 09:56:29.632335 tx_last_pass[0][0][3] = 0
4248 09:56:29.632847 tx_win_center[0][0][4] = 0
4249 09:56:29.635490 tx_first_pass[0][0][4] = 0
4250 09:56:29.638756 tx_last_pass[0][0][4] = 0
4251 09:56:29.639189 tx_win_center[0][0][5] = 0
4252 09:56:29.642462 tx_first_pass[0][0][5] = 0
4253 09:56:29.645998 tx_last_pass[0][0][5] = 0
4254 09:56:29.649236 tx_win_center[0][0][6] = 0
4255 09:56:29.649953 tx_first_pass[0][0][6] = 0
4256 09:56:29.652576 tx_last_pass[0][0][6] = 0
4257 09:56:29.655660 tx_win_center[0][0][7] = 0
4258 09:56:29.656094 tx_first_pass[0][0][7] = 0
4259 09:56:29.659044 tx_last_pass[0][0][7] = 0
4260 09:56:29.662808 tx_win_center[0][0][8] = 0
4261 09:56:29.666011 tx_first_pass[0][0][8] = 0
4262 09:56:29.666591 tx_last_pass[0][0][8] = 0
4263 09:56:29.669312 tx_win_center[0][0][9] = 0
4264 09:56:29.672789 tx_first_pass[0][0][9] = 0
4265 09:56:29.673302 tx_last_pass[0][0][9] = 0
4266 09:56:29.676071 tx_win_center[0][0][10] = 0
4267 09:56:29.679418 tx_first_pass[0][0][10] = 0
4268 09:56:29.682874 tx_last_pass[0][0][10] = 0
4269 09:56:29.683308 tx_win_center[0][0][11] = 0
4270 09:56:29.685963 tx_first_pass[0][0][11] = 0
4271 09:56:29.689762 tx_last_pass[0][0][11] = 0
4272 09:56:29.692750 tx_win_center[0][0][12] = 0
4273 09:56:29.693469 tx_first_pass[0][0][12] = 0
4274 09:56:29.696299 tx_last_pass[0][0][12] = 0
4275 09:56:29.699056 tx_win_center[0][0][13] = 0
4276 09:56:29.702714 tx_first_pass[0][0][13] = 0
4277 09:56:29.703226 tx_last_pass[0][0][13] = 0
4278 09:56:29.706129 tx_win_center[0][0][14] = 0
4279 09:56:29.709369 tx_first_pass[0][0][14] = 0
4280 09:56:29.712749 tx_last_pass[0][0][14] = 0
4281 09:56:29.713258 tx_win_center[0][0][15] = 0
4282 09:56:29.715853 tx_first_pass[0][0][15] = 0
4283 09:56:29.719195 tx_last_pass[0][0][15] = 0
4284 09:56:29.722856 tx_win_center[0][1][0] = 0
4285 09:56:29.723367 tx_first_pass[0][1][0] = 0
4286 09:56:29.726330 tx_last_pass[0][1][0] = 0
4287 09:56:29.729632 tx_win_center[0][1][1] = 0
4288 09:56:29.732647 tx_first_pass[0][1][1] = 0
4289 09:56:29.733152 tx_last_pass[0][1][1] = 0
4290 09:56:29.735759 tx_win_center[0][1][2] = 0
4291 09:56:29.739363 tx_first_pass[0][1][2] = 0
4292 09:56:29.739874 tx_last_pass[0][1][2] = 0
4293 09:56:29.742754 tx_win_center[0][1][3] = 0
4294 09:56:29.745973 tx_first_pass[0][1][3] = 0
4295 09:56:29.749410 tx_last_pass[0][1][3] = 0
4296 09:56:29.749836 tx_win_center[0][1][4] = 0
4297 09:56:29.752574 tx_first_pass[0][1][4] = 0
4298 09:56:29.756053 tx_last_pass[0][1][4] = 0
4299 09:56:29.756483 tx_win_center[0][1][5] = 0
4300 09:56:29.759212 tx_first_pass[0][1][5] = 0
4301 09:56:29.762708 tx_last_pass[0][1][5] = 0
4302 09:56:29.766454 tx_win_center[0][1][6] = 0
4303 09:56:29.766978 tx_first_pass[0][1][6] = 0
4304 09:56:29.769754 tx_last_pass[0][1][6] = 0
4305 09:56:29.773024 tx_win_center[0][1][7] = 0
4306 09:56:29.776110 tx_first_pass[0][1][7] = 0
4307 09:56:29.776545 tx_last_pass[0][1][7] = 0
4308 09:56:29.779285 tx_win_center[0][1][8] = 0
4309 09:56:29.782749 tx_first_pass[0][1][8] = 0
4310 09:56:29.783184 tx_last_pass[0][1][8] = 0
4311 09:56:29.786006 tx_win_center[0][1][9] = 0
4312 09:56:29.789721 tx_first_pass[0][1][9] = 0
4313 09:56:29.793001 tx_last_pass[0][1][9] = 0
4314 09:56:29.793549 tx_win_center[0][1][10] = 0
4315 09:56:29.796315 tx_first_pass[0][1][10] = 0
4316 09:56:29.799841 tx_last_pass[0][1][10] = 0
4317 09:56:29.802823 tx_win_center[0][1][11] = 0
4318 09:56:29.803341 tx_first_pass[0][1][11] = 0
4319 09:56:29.806181 tx_last_pass[0][1][11] = 0
4320 09:56:29.809800 tx_win_center[0][1][12] = 0
4321 09:56:29.812978 tx_first_pass[0][1][12] = 0
4322 09:56:29.813493 tx_last_pass[0][1][12] = 0
4323 09:56:29.816343 tx_win_center[0][1][13] = 0
4324 09:56:29.820107 tx_first_pass[0][1][13] = 0
4325 09:56:29.820628 tx_last_pass[0][1][13] = 0
4326 09:56:29.823357 tx_win_center[0][1][14] = 0
4327 09:56:29.826633 tx_first_pass[0][1][14] = 0
4328 09:56:29.830325 tx_last_pass[0][1][14] = 0
4329 09:56:29.830860 tx_win_center[0][1][15] = 0
4330 09:56:29.833326 tx_first_pass[0][1][15] = 0
4331 09:56:29.836690 tx_last_pass[0][1][15] = 0
4332 09:56:29.839972 tx_win_center[1][0][0] = 0
4333 09:56:29.840489 tx_first_pass[1][0][0] = 0
4334 09:56:29.843266 tx_last_pass[1][0][0] = 0
4335 09:56:29.846533 tx_win_center[1][0][1] = 0
4336 09:56:29.849914 tx_first_pass[1][0][1] = 0
4337 09:56:29.850460 tx_last_pass[1][0][1] = 0
4338 09:56:29.852782 tx_win_center[1][0][2] = 0
4339 09:56:29.856367 tx_first_pass[1][0][2] = 0
4340 09:56:29.859665 tx_last_pass[1][0][2] = 0
4341 09:56:29.860094 tx_win_center[1][0][3] = 0
4342 09:56:29.862822 tx_first_pass[1][0][3] = 0
4343 09:56:29.866373 tx_last_pass[1][0][3] = 0
4344 09:56:29.866900 tx_win_center[1][0][4] = 0
4345 09:56:29.869571 tx_first_pass[1][0][4] = 0
4346 09:56:29.872832 tx_last_pass[1][0][4] = 0
4347 09:56:29.876256 tx_win_center[1][0][5] = 0
4348 09:56:29.876685 tx_first_pass[1][0][5] = 0
4349 09:56:29.879411 tx_last_pass[1][0][5] = 0
4350 09:56:29.882589 tx_win_center[1][0][6] = 0
4351 09:56:29.886172 tx_first_pass[1][0][6] = 0
4352 09:56:29.886613 tx_last_pass[1][0][6] = 0
4353 09:56:29.889614 tx_win_center[1][0][7] = 0
4354 09:56:29.892748 tx_first_pass[1][0][7] = 0
4355 09:56:29.893130 tx_last_pass[1][0][7] = 0
4356 09:56:29.895965 tx_win_center[1][0][8] = 0
4357 09:56:29.899559 tx_first_pass[1][0][8] = 0
4358 09:56:29.902973 tx_last_pass[1][0][8] = 0
4359 09:56:29.903352 tx_win_center[1][0][9] = 0
4360 09:56:29.906131 tx_first_pass[1][0][9] = 0
4361 09:56:29.909834 tx_last_pass[1][0][9] = 0
4362 09:56:29.910294 tx_win_center[1][0][10] = 0
4363 09:56:29.913215 tx_first_pass[1][0][10] = 0
4364 09:56:29.916369 tx_last_pass[1][0][10] = 0
4365 09:56:29.919506 tx_win_center[1][0][11] = 0
4366 09:56:29.919938 tx_first_pass[1][0][11] = 0
4367 09:56:29.922996 tx_last_pass[1][0][11] = 0
4368 09:56:29.926355 tx_win_center[1][0][12] = 0
4369 09:56:29.929683 tx_first_pass[1][0][12] = 0
4370 09:56:29.930112 tx_last_pass[1][0][12] = 0
4371 09:56:29.933096 tx_win_center[1][0][13] = 0
4372 09:56:29.936658 tx_first_pass[1][0][13] = 0
4373 09:56:29.939809 tx_last_pass[1][0][13] = 0
4374 09:56:29.940238 tx_win_center[1][0][14] = 0
4375 09:56:29.943102 tx_first_pass[1][0][14] = 0
4376 09:56:29.946561 tx_last_pass[1][0][14] = 0
4377 09:56:29.949864 tx_win_center[1][0][15] = 0
4378 09:56:29.950418 tx_first_pass[1][0][15] = 0
4379 09:56:29.953120 tx_last_pass[1][0][15] = 0
4380 09:56:29.956386 tx_win_center[1][1][0] = 0
4381 09:56:29.959768 tx_first_pass[1][1][0] = 0
4382 09:56:29.960192 tx_last_pass[1][1][0] = 0
4383 09:56:29.963145 tx_win_center[1][1][1] = 0
4384 09:56:29.966343 tx_first_pass[1][1][1] = 0
4385 09:56:29.966768 tx_last_pass[1][1][1] = 0
4386 09:56:29.969874 tx_win_center[1][1][2] = 0
4387 09:56:29.973255 tx_first_pass[1][1][2] = 0
4388 09:56:29.977028 tx_last_pass[1][1][2] = 0
4389 09:56:29.977543 tx_win_center[1][1][3] = 0
4390 09:56:29.979886 tx_first_pass[1][1][3] = 0
4391 09:56:29.983280 tx_last_pass[1][1][3] = 0
4392 09:56:29.986457 tx_win_center[1][1][4] = 0
4393 09:56:29.986888 tx_first_pass[1][1][4] = 0
4394 09:56:29.989714 tx_last_pass[1][1][4] = 0
4395 09:56:29.993265 tx_win_center[1][1][5] = 0
4396 09:56:29.993776 tx_first_pass[1][1][5] = 0
4397 09:56:29.996950 tx_last_pass[1][1][5] = 0
4398 09:56:29.999850 tx_win_center[1][1][6] = 0
4399 09:56:30.003106 tx_first_pass[1][1][6] = 0
4400 09:56:30.003556 tx_last_pass[1][1][6] = 0
4401 09:56:30.006708 tx_win_center[1][1][7] = 0
4402 09:56:30.009898 tx_first_pass[1][1][7] = 0
4403 09:56:30.010355 tx_last_pass[1][1][7] = 0
4404 09:56:30.013372 tx_win_center[1][1][8] = 0
4405 09:56:30.016751 tx_first_pass[1][1][8] = 0
4406 09:56:30.020471 tx_last_pass[1][1][8] = 0
4407 09:56:30.020986 tx_win_center[1][1][9] = 0
4408 09:56:30.023560 tx_first_pass[1][1][9] = 0
4409 09:56:30.026865 tx_last_pass[1][1][9] = 0
4410 09:56:30.029933 tx_win_center[1][1][10] = 0
4411 09:56:30.030397 tx_first_pass[1][1][10] = 0
4412 09:56:30.033472 tx_last_pass[1][1][10] = 0
4413 09:56:30.036606 tx_win_center[1][1][11] = 0
4414 09:56:30.040113 tx_first_pass[1][1][11] = 0
4415 09:56:30.040543 tx_last_pass[1][1][11] = 0
4416 09:56:30.043446 tx_win_center[1][1][12] = 0
4417 09:56:30.046695 tx_first_pass[1][1][12] = 0
4418 09:56:30.050119 tx_last_pass[1][1][12] = 0
4419 09:56:30.050579 tx_win_center[1][1][13] = 0
4420 09:56:30.053679 tx_first_pass[1][1][13] = 0
4421 09:56:30.057004 tx_last_pass[1][1][13] = 0
4422 09:56:30.060018 tx_win_center[1][1][14] = 0
4423 09:56:30.060452 tx_first_pass[1][1][14] = 0
4424 09:56:30.063412 tx_last_pass[1][1][14] = 0
4425 09:56:30.066804 tx_win_center[1][1][15] = 0
4426 09:56:30.069986 tx_first_pass[1][1][15] = 0
4427 09:56:30.070467 tx_last_pass[1][1][15] = 0
4428 09:56:30.073585 dump params rx window
4429 09:56:30.076859 rx_firspass[0][0][0] = 0
4430 09:56:30.077292 rx_lastpass[0][0][0] = 0
4431 09:56:30.080136 rx_firspass[0][0][1] = 0
4432 09:56:30.083454 rx_lastpass[0][0][1] = 0
4433 09:56:30.083884 rx_firspass[0][0][2] = 0
4434 09:56:30.086767 rx_lastpass[0][0][2] = 0
4435 09:56:30.090193 rx_firspass[0][0][3] = 0
4436 09:56:30.090646 rx_lastpass[0][0][3] = 0
4437 09:56:30.093492 rx_firspass[0][0][4] = 0
4438 09:56:30.096738 rx_lastpass[0][0][4] = 0
4439 09:56:30.097173 rx_firspass[0][0][5] = 0
4440 09:56:30.100296 rx_lastpass[0][0][5] = 0
4441 09:56:30.103398 rx_firspass[0][0][6] = 0
4442 09:56:30.103837 rx_lastpass[0][0][6] = 0
4443 09:56:30.107020 rx_firspass[0][0][7] = 0
4444 09:56:30.110108 rx_lastpass[0][0][7] = 0
4445 09:56:30.110665 rx_firspass[0][0][8] = 0
4446 09:56:30.113507 rx_lastpass[0][0][8] = 0
4447 09:56:30.116828 rx_firspass[0][0][9] = 0
4448 09:56:30.120283 rx_lastpass[0][0][9] = 0
4449 09:56:30.120796 rx_firspass[0][0][10] = 0
4450 09:56:30.123775 rx_lastpass[0][0][10] = 0
4451 09:56:30.127090 rx_firspass[0][0][11] = 0
4452 09:56:30.127618 rx_lastpass[0][0][11] = 0
4453 09:56:30.130376 rx_firspass[0][0][12] = 0
4454 09:56:30.133696 rx_lastpass[0][0][12] = 0
4455 09:56:30.134136 rx_firspass[0][0][13] = 0
4456 09:56:30.137019 rx_lastpass[0][0][13] = 0
4457 09:56:30.140079 rx_firspass[0][0][14] = 0
4458 09:56:30.143553 rx_lastpass[0][0][14] = 0
4459 09:56:30.143985 rx_firspass[0][0][15] = 0
4460 09:56:30.146818 rx_lastpass[0][0][15] = 0
4461 09:56:30.150246 rx_firspass[0][1][0] = 0
4462 09:56:30.150681 rx_lastpass[0][1][0] = 0
4463 09:56:30.153522 rx_firspass[0][1][1] = 0
4464 09:56:30.156932 rx_lastpass[0][1][1] = 0
4465 09:56:30.157362 rx_firspass[0][1][2] = 0
4466 09:56:30.160571 rx_lastpass[0][1][2] = 0
4467 09:56:30.163883 rx_firspass[0][1][3] = 0
4468 09:56:30.164397 rx_lastpass[0][1][3] = 0
4469 09:56:30.166920 rx_firspass[0][1][4] = 0
4470 09:56:30.170366 rx_lastpass[0][1][4] = 0
4471 09:56:30.173617 rx_firspass[0][1][5] = 0
4472 09:56:30.174044 rx_lastpass[0][1][5] = 0
4473 09:56:30.177265 rx_firspass[0][1][6] = 0
4474 09:56:30.180289 rx_lastpass[0][1][6] = 0
4475 09:56:30.180971 rx_firspass[0][1][7] = 0
4476 09:56:30.183640 rx_lastpass[0][1][7] = 0
4477 09:56:30.187124 rx_firspass[0][1][8] = 0
4478 09:56:30.187553 rx_lastpass[0][1][8] = 0
4479 09:56:30.190428 rx_firspass[0][1][9] = 0
4480 09:56:30.193512 rx_lastpass[0][1][9] = 0
4481 09:56:30.193940 rx_firspass[0][1][10] = 0
4482 09:56:30.196915 rx_lastpass[0][1][10] = 0
4483 09:56:30.200456 rx_firspass[0][1][11] = 0
4484 09:56:30.203577 rx_lastpass[0][1][11] = 0
4485 09:56:30.204070 rx_firspass[0][1][12] = 0
4486 09:56:30.206893 rx_lastpass[0][1][12] = 0
4487 09:56:30.210319 rx_firspass[0][1][13] = 0
4488 09:56:30.210748 rx_lastpass[0][1][13] = 0
4489 09:56:30.213509 rx_firspass[0][1][14] = 0
4490 09:56:30.216929 rx_lastpass[0][1][14] = 0
4491 09:56:30.220285 rx_firspass[0][1][15] = 0
4492 09:56:30.220712 rx_lastpass[0][1][15] = 0
4493 09:56:30.223901 rx_firspass[1][0][0] = 0
4494 09:56:30.226844 rx_lastpass[1][0][0] = 0
4495 09:56:30.227273 rx_firspass[1][0][1] = 0
4496 09:56:30.230428 rx_lastpass[1][0][1] = 0
4497 09:56:30.233851 rx_firspass[1][0][2] = 0
4498 09:56:30.234565 rx_lastpass[1][0][2] = 0
4499 09:56:30.236935 rx_firspass[1][0][3] = 0
4500 09:56:30.240074 rx_lastpass[1][0][3] = 0
4501 09:56:30.240501 rx_firspass[1][0][4] = 0
4502 09:56:30.243954 rx_lastpass[1][0][4] = 0
4503 09:56:30.247022 rx_firspass[1][0][5] = 0
4504 09:56:30.247451 rx_lastpass[1][0][5] = 0
4505 09:56:30.250593 rx_firspass[1][0][6] = 0
4506 09:56:30.253809 rx_lastpass[1][0][6] = 0
4507 09:56:30.254278 rx_firspass[1][0][7] = 0
4508 09:56:30.257191 rx_lastpass[1][0][7] = 0
4509 09:56:30.260558 rx_firspass[1][0][8] = 0
4510 09:56:30.264041 rx_lastpass[1][0][8] = 0
4511 09:56:30.264573 rx_firspass[1][0][9] = 0
4512 09:56:30.266987 rx_lastpass[1][0][9] = 0
4513 09:56:30.270622 rx_firspass[1][0][10] = 0
4514 09:56:30.271142 rx_lastpass[1][0][10] = 0
4515 09:56:30.273952 rx_firspass[1][0][11] = 0
4516 09:56:30.277419 rx_lastpass[1][0][11] = 0
4517 09:56:30.277927 rx_firspass[1][0][12] = 0
4518 09:56:30.280549 rx_lastpass[1][0][12] = 0
4519 09:56:30.283871 rx_firspass[1][0][13] = 0
4520 09:56:30.287088 rx_lastpass[1][0][13] = 0
4521 09:56:30.287514 rx_firspass[1][0][14] = 0
4522 09:56:30.290629 rx_lastpass[1][0][14] = 0
4523 09:56:30.293789 rx_firspass[1][0][15] = 0
4524 09:56:30.294353 rx_lastpass[1][0][15] = 0
4525 09:56:30.297019 rx_firspass[1][1][0] = 0
4526 09:56:30.300765 rx_lastpass[1][1][0] = 0
4527 09:56:30.303656 rx_firspass[1][1][1] = 0
4528 09:56:30.304089 rx_lastpass[1][1][1] = 0
4529 09:56:30.306812 rx_firspass[1][1][2] = 0
4530 09:56:30.310060 rx_lastpass[1][1][2] = 0
4531 09:56:30.310579 rx_firspass[1][1][3] = 0
4532 09:56:30.313697 rx_lastpass[1][1][3] = 0
4533 09:56:30.317002 rx_firspass[1][1][4] = 0
4534 09:56:30.317619 rx_lastpass[1][1][4] = 0
4535 09:56:30.320441 rx_firspass[1][1][5] = 0
4536 09:56:30.323708 rx_lastpass[1][1][5] = 0
4537 09:56:30.324227 rx_firspass[1][1][6] = 0
4538 09:56:30.326869 rx_lastpass[1][1][6] = 0
4539 09:56:30.330390 rx_firspass[1][1][7] = 0
4540 09:56:30.330899 rx_lastpass[1][1][7] = 0
4541 09:56:30.333523 rx_firspass[1][1][8] = 0
4542 09:56:30.336987 rx_lastpass[1][1][8] = 0
4543 09:56:30.340175 rx_firspass[1][1][9] = 0
4544 09:56:30.340691 rx_lastpass[1][1][9] = 0
4545 09:56:30.343713 rx_firspass[1][1][10] = 0
4546 09:56:30.346695 rx_lastpass[1][1][10] = 0
4547 09:56:30.347127 rx_firspass[1][1][11] = 0
4548 09:56:30.350589 rx_lastpass[1][1][11] = 0
4549 09:56:30.353383 rx_firspass[1][1][12] = 0
4550 09:56:30.357007 rx_lastpass[1][1][12] = 0
4551 09:56:30.357438 rx_firspass[1][1][13] = 0
4552 09:56:30.359961 rx_lastpass[1][1][13] = 0
4553 09:56:30.363375 rx_firspass[1][1][14] = 0
4554 09:56:30.363817 rx_lastpass[1][1][14] = 0
4555 09:56:30.367099 rx_firspass[1][1][15] = 0
4556 09:56:30.370297 rx_lastpass[1][1][15] = 0
4557 09:56:30.370817 dump params clk_delay
4558 09:56:30.373850 clk_delay[0] = 0
4559 09:56:30.374408 clk_delay[1] = 0
4560 09:56:30.377049 dump params dqs_delay
4561 09:56:30.377571 dqs_delay[0][0] = 0
4562 09:56:30.380251 dqs_delay[0][1] = 0
4563 09:56:30.383655 dqs_delay[1][0] = 0
4564 09:56:30.384089 dqs_delay[1][1] = 0
4565 09:56:30.386703 dump params delay_cell_unit = 762
4566 09:56:30.387136 dump source = 0x0
4567 09:56:30.390734 dump params frequency:800
4568 09:56:30.393671 dump params rank number:2
4569 09:56:30.394189
4570 09:56:30.396901 dump params write leveling
4571 09:56:30.397374 write leveling[0][0][0] = 0x0
4572 09:56:30.400446 write leveling[0][0][1] = 0x0
4573 09:56:30.403500 write leveling[0][1][0] = 0x0
4574 09:56:30.406772 write leveling[0][1][1] = 0x0
4575 09:56:30.410037 write leveling[1][0][0] = 0x0
4576 09:56:30.410504 write leveling[1][0][1] = 0x0
4577 09:56:30.413932 write leveling[1][1][0] = 0x0
4578 09:56:30.416968 write leveling[1][1][1] = 0x0
4579 09:56:30.420509 dump params cbt_cs
4580 09:56:30.421019 cbt_cs[0][0] = 0x0
4581 09:56:30.423682 cbt_cs[0][1] = 0x0
4582 09:56:30.424188 cbt_cs[1][0] = 0x0
4583 09:56:30.426926 cbt_cs[1][1] = 0x0
4584 09:56:30.427356 dump params cbt_mr12
4585 09:56:30.430657 cbt_mr12[0][0] = 0x0
4586 09:56:30.431168 cbt_mr12[0][1] = 0x0
4587 09:56:30.433798 cbt_mr12[1][0] = 0x0
4588 09:56:30.434269 cbt_mr12[1][1] = 0x0
4589 09:56:30.437753 dump params tx window
4590 09:56:30.440429 tx_center_min[0][0][0] = 0
4591 09:56:30.440935 tx_center_max[0][0][0] = 0
4592 09:56:30.444087 tx_center_min[0][0][1] = 0
4593 09:56:30.447258 tx_center_max[0][0][1] = 0
4594 09:56:30.450448 tx_center_min[0][1][0] = 0
4595 09:56:30.450954 tx_center_max[0][1][0] = 0
4596 09:56:30.453653 tx_center_min[0][1][1] = 0
4597 09:56:30.457337 tx_center_max[0][1][1] = 0
4598 09:56:30.460416 tx_center_min[1][0][0] = 0
4599 09:56:30.460845 tx_center_max[1][0][0] = 0
4600 09:56:30.463739 tx_center_min[1][0][1] = 0
4601 09:56:30.467253 tx_center_max[1][0][1] = 0
4602 09:56:30.470798 tx_center_min[1][1][0] = 0
4603 09:56:30.471398 tx_center_max[1][1][0] = 0
4604 09:56:30.474252 tx_center_min[1][1][1] = 0
4605 09:56:30.477272 tx_center_max[1][1][1] = 0
4606 09:56:30.477776 dump params tx window
4607 09:56:30.480430 tx_win_center[0][0][0] = 0
4608 09:56:30.483766 tx_first_pass[0][0][0] = 0
4609 09:56:30.487130 tx_last_pass[0][0][0] = 0
4610 09:56:30.487638 tx_win_center[0][0][1] = 0
4611 09:56:30.490493 tx_first_pass[0][0][1] = 0
4612 09:56:30.493903 tx_last_pass[0][0][1] = 0
4613 09:56:30.494448 tx_win_center[0][0][2] = 0
4614 09:56:30.497263 tx_first_pass[0][0][2] = 0
4615 09:56:30.500620 tx_last_pass[0][0][2] = 0
4616 09:56:30.503701 tx_win_center[0][0][3] = 0
4617 09:56:30.504129 tx_first_pass[0][0][3] = 0
4618 09:56:30.507237 tx_last_pass[0][0][3] = 0
4619 09:56:30.510470 tx_win_center[0][0][4] = 0
4620 09:56:30.510896 tx_first_pass[0][0][4] = 0
4621 09:56:30.514031 tx_last_pass[0][0][4] = 0
4622 09:56:30.517090 tx_win_center[0][0][5] = 0
4623 09:56:30.520882 tx_first_pass[0][0][5] = 0
4624 09:56:30.521531 tx_last_pass[0][0][5] = 0
4625 09:56:30.524181 tx_win_center[0][0][6] = 0
4626 09:56:30.527385 tx_first_pass[0][0][6] = 0
4627 09:56:30.530649 tx_last_pass[0][0][6] = 0
4628 09:56:30.531079 tx_win_center[0][0][7] = 0
4629 09:56:30.533857 tx_first_pass[0][0][7] = 0
4630 09:56:30.537478 tx_last_pass[0][0][7] = 0
4631 09:56:30.537988 tx_win_center[0][0][8] = 0
4632 09:56:30.540766 tx_first_pass[0][0][8] = 0
4633 09:56:30.544197 tx_last_pass[0][0][8] = 0
4634 09:56:30.547220 tx_win_center[0][0][9] = 0
4635 09:56:30.547738 tx_first_pass[0][0][9] = 0
4636 09:56:30.550841 tx_last_pass[0][0][9] = 0
4637 09:56:30.554100 tx_win_center[0][0][10] = 0
4638 09:56:30.557611 tx_first_pass[0][0][10] = 0
4639 09:56:30.558119 tx_last_pass[0][0][10] = 0
4640 09:56:30.561058 tx_win_center[0][0][11] = 0
4641 09:56:30.564070 tx_first_pass[0][0][11] = 0
4642 09:56:30.567396 tx_last_pass[0][0][11] = 0
4643 09:56:30.567944 tx_win_center[0][0][12] = 0
4644 09:56:30.570697 tx_first_pass[0][0][12] = 0
4645 09:56:30.574337 tx_last_pass[0][0][12] = 0
4646 09:56:30.577432 tx_win_center[0][0][13] = 0
4647 09:56:30.577955 tx_first_pass[0][0][13] = 0
4648 09:56:30.580796 tx_last_pass[0][0][13] = 0
4649 09:56:30.584068 tx_win_center[0][0][14] = 0
4650 09:56:30.587701 tx_first_pass[0][0][14] = 0
4651 09:56:30.588206 tx_last_pass[0][0][14] = 0
4652 09:56:30.590599 tx_win_center[0][0][15] = 0
4653 09:56:30.594054 tx_first_pass[0][0][15] = 0
4654 09:56:30.594614 tx_last_pass[0][0][15] = 0
4655 09:56:30.597350 tx_win_center[0][1][0] = 0
4656 09:56:30.601102 tx_first_pass[0][1][0] = 0
4657 09:56:30.604127 tx_last_pass[0][1][0] = 0
4658 09:56:30.604565 tx_win_center[0][1][1] = 0
4659 09:56:30.607379 tx_first_pass[0][1][1] = 0
4660 09:56:30.610665 tx_last_pass[0][1][1] = 0
4661 09:56:30.614160 tx_win_center[0][1][2] = 0
4662 09:56:30.614642 tx_first_pass[0][1][2] = 0
4663 09:56:30.617756 tx_last_pass[0][1][2] = 0
4664 09:56:30.621021 tx_win_center[0][1][3] = 0
4665 09:56:30.621527 tx_first_pass[0][1][3] = 0
4666 09:56:30.624244 tx_last_pass[0][1][3] = 0
4667 09:56:30.627636 tx_win_center[0][1][4] = 0
4668 09:56:30.630932 tx_first_pass[0][1][4] = 0
4669 09:56:30.631360 tx_last_pass[0][1][4] = 0
4670 09:56:30.633982 tx_win_center[0][1][5] = 0
4671 09:56:30.637951 tx_first_pass[0][1][5] = 0
4672 09:56:30.638524 tx_last_pass[0][1][5] = 0
4673 09:56:30.640629 tx_win_center[0][1][6] = 0
4674 09:56:30.644111 tx_first_pass[0][1][6] = 0
4675 09:56:30.647604 tx_last_pass[0][1][6] = 0
4676 09:56:30.648110 tx_win_center[0][1][7] = 0
4677 09:56:30.651056 tx_first_pass[0][1][7] = 0
4678 09:56:30.654059 tx_last_pass[0][1][7] = 0
4679 09:56:30.657420 tx_win_center[0][1][8] = 0
4680 09:56:30.657845 tx_first_pass[0][1][8] = 0
4681 09:56:30.660898 tx_last_pass[0][1][8] = 0
4682 09:56:30.664413 tx_win_center[0][1][9] = 0
4683 09:56:30.664922 tx_first_pass[0][1][9] = 0
4684 09:56:30.667598 tx_last_pass[0][1][9] = 0
4685 09:56:30.670887 tx_win_center[0][1][10] = 0
4686 09:56:30.674755 tx_first_pass[0][1][10] = 0
4687 09:56:30.675283 tx_last_pass[0][1][10] = 0
4688 09:56:30.677758 tx_win_center[0][1][11] = 0
4689 09:56:30.681153 tx_first_pass[0][1][11] = 0
4690 09:56:30.684149 tx_last_pass[0][1][11] = 0
4691 09:56:30.684682 tx_win_center[0][1][12] = 0
4692 09:56:30.687894 tx_first_pass[0][1][12] = 0
4693 09:56:30.691279 tx_last_pass[0][1][12] = 0
4694 09:56:30.694558 tx_win_center[0][1][13] = 0
4695 09:56:30.695062 tx_first_pass[0][1][13] = 0
4696 09:56:30.697854 tx_last_pass[0][1][13] = 0
4697 09:56:30.701449 tx_win_center[0][1][14] = 0
4698 09:56:30.704218 tx_first_pass[0][1][14] = 0
4699 09:56:30.704653 tx_last_pass[0][1][14] = 0
4700 09:56:30.707540 tx_win_center[0][1][15] = 0
4701 09:56:30.710926 tx_first_pass[0][1][15] = 0
4702 09:56:30.714594 tx_last_pass[0][1][15] = 0
4703 09:56:30.715118 tx_win_center[1][0][0] = 0
4704 09:56:30.717661 tx_first_pass[1][0][0] = 0
4705 09:56:30.721415 tx_last_pass[1][0][0] = 0
4706 09:56:30.721926 tx_win_center[1][0][1] = 0
4707 09:56:30.724441 tx_first_pass[1][0][1] = 0
4708 09:56:30.727703 tx_last_pass[1][0][1] = 0
4709 09:56:30.731220 tx_win_center[1][0][2] = 0
4710 09:56:30.731648 tx_first_pass[1][0][2] = 0
4711 09:56:30.734402 tx_last_pass[1][0][2] = 0
4712 09:56:30.738093 tx_win_center[1][0][3] = 0
4713 09:56:30.741196 tx_first_pass[1][0][3] = 0
4714 09:56:30.741702 tx_last_pass[1][0][3] = 0
4715 09:56:30.744863 tx_win_center[1][0][4] = 0
4716 09:56:30.747851 tx_first_pass[1][0][4] = 0
4717 09:56:30.748354 tx_last_pass[1][0][4] = 0
4718 09:56:30.751366 tx_win_center[1][0][5] = 0
4719 09:56:30.754453 tx_first_pass[1][0][5] = 0
4720 09:56:30.758003 tx_last_pass[1][0][5] = 0
4721 09:56:30.758565 tx_win_center[1][0][6] = 0
4722 09:56:30.761085 tx_first_pass[1][0][6] = 0
4723 09:56:30.764474 tx_last_pass[1][0][6] = 0
4724 09:56:30.764902 tx_win_center[1][0][7] = 0
4725 09:56:30.767937 tx_first_pass[1][0][7] = 0
4726 09:56:30.771494 tx_last_pass[1][0][7] = 0
4727 09:56:30.774503 tx_win_center[1][0][8] = 0
4728 09:56:30.775013 tx_first_pass[1][0][8] = 0
4729 09:56:30.778078 tx_last_pass[1][0][8] = 0
4730 09:56:30.781255 tx_win_center[1][0][9] = 0
4731 09:56:30.784399 tx_first_pass[1][0][9] = 0
4732 09:56:30.784829 tx_last_pass[1][0][9] = 0
4733 09:56:30.787825 tx_win_center[1][0][10] = 0
4734 09:56:30.791255 tx_first_pass[1][0][10] = 0
4735 09:56:30.794561 tx_last_pass[1][0][10] = 0
4736 09:56:30.795087 tx_win_center[1][0][11] = 0
4737 09:56:30.797903 tx_first_pass[1][0][11] = 0
4738 09:56:30.801323 tx_last_pass[1][0][11] = 0
4739 09:56:30.804773 tx_win_center[1][0][12] = 0
4740 09:56:30.805303 tx_first_pass[1][0][12] = 0
4741 09:56:30.808004 tx_last_pass[1][0][12] = 0
4742 09:56:30.811522 tx_win_center[1][0][13] = 0
4743 09:56:30.812034 tx_first_pass[1][0][13] = 0
4744 09:56:30.814546 tx_last_pass[1][0][13] = 0
4745 09:56:30.818172 tx_win_center[1][0][14] = 0
4746 09:56:30.821581 tx_first_pass[1][0][14] = 0
4747 09:56:30.822089 tx_last_pass[1][0][14] = 0
4748 09:56:30.825166 tx_win_center[1][0][15] = 0
4749 09:56:30.827824 tx_first_pass[1][0][15] = 0
4750 09:56:30.831375 tx_last_pass[1][0][15] = 0
4751 09:56:30.831921 tx_win_center[1][1][0] = 0
4752 09:56:30.834510 tx_first_pass[1][1][0] = 0
4753 09:56:30.838094 tx_last_pass[1][1][0] = 0
4754 09:56:30.841316 tx_win_center[1][1][1] = 0
4755 09:56:30.841846 tx_first_pass[1][1][1] = 0
4756 09:56:30.845010 tx_last_pass[1][1][1] = 0
4757 09:56:30.847941 tx_win_center[1][1][2] = 0
4758 09:56:30.851549 tx_first_pass[1][1][2] = 0
4759 09:56:30.852057 tx_last_pass[1][1][2] = 0
4760 09:56:30.854669 tx_win_center[1][1][3] = 0
4761 09:56:30.858267 tx_first_pass[1][1][3] = 0
4762 09:56:30.858780 tx_last_pass[1][1][3] = 0
4763 09:56:30.861243 tx_win_center[1][1][4] = 0
4764 09:56:30.864676 tx_first_pass[1][1][4] = 0
4765 09:56:30.868102 tx_last_pass[1][1][4] = 0
4766 09:56:30.868610 tx_win_center[1][1][5] = 0
4767 09:56:30.871673 tx_first_pass[1][1][5] = 0
4768 09:56:30.875065 tx_last_pass[1][1][5] = 0
4769 09:56:30.875570 tx_win_center[1][1][6] = 0
4770 09:56:30.878358 tx_first_pass[1][1][6] = 0
4771 09:56:30.881409 tx_last_pass[1][1][6] = 0
4772 09:56:30.884627 tx_win_center[1][1][7] = 0
4773 09:56:30.885183 tx_first_pass[1][1][7] = 0
4774 09:56:30.888322 tx_last_pass[1][1][7] = 0
4775 09:56:30.891429 tx_win_center[1][1][8] = 0
4776 09:56:30.894951 tx_first_pass[1][1][8] = 0
4777 09:56:30.895458 tx_last_pass[1][1][8] = 0
4778 09:56:30.898352 tx_win_center[1][1][9] = 0
4779 09:56:30.901423 tx_first_pass[1][1][9] = 0
4780 09:56:30.901847 tx_last_pass[1][1][9] = 0
4781 09:56:30.904871 tx_win_center[1][1][10] = 0
4782 09:56:30.908004 tx_first_pass[1][1][10] = 0
4783 09:56:30.911553 tx_last_pass[1][1][10] = 0
4784 09:56:30.912075 tx_win_center[1][1][11] = 0
4785 09:56:30.914917 tx_first_pass[1][1][11] = 0
4786 09:56:30.918327 tx_last_pass[1][1][11] = 0
4787 09:56:30.921465 tx_win_center[1][1][12] = 0
4788 09:56:30.922001 tx_first_pass[1][1][12] = 0
4789 09:56:30.924776 tx_last_pass[1][1][12] = 0
4790 09:56:30.928183 tx_win_center[1][1][13] = 0
4791 09:56:30.931471 tx_first_pass[1][1][13] = 0
4792 09:56:30.931899 tx_last_pass[1][1][13] = 0
4793 09:56:30.934868 tx_win_center[1][1][14] = 0
4794 09:56:30.938403 tx_first_pass[1][1][14] = 0
4795 09:56:30.941653 tx_last_pass[1][1][14] = 0
4796 09:56:30.942179 tx_win_center[1][1][15] = 0
4797 09:56:30.944879 tx_first_pass[1][1][15] = 0
4798 09:56:30.948183 tx_last_pass[1][1][15] = 0
4799 09:56:30.948716 dump params rx window
4800 09:56:30.951347 rx_firspass[0][0][0] = 0
4801 09:56:30.954888 rx_lastpass[0][0][0] = 0
4802 09:56:30.958440 rx_firspass[0][0][1] = 0
4803 09:56:30.958955 rx_lastpass[0][0][1] = 0
4804 09:56:30.961660 rx_firspass[0][0][2] = 0
4805 09:56:30.965027 rx_lastpass[0][0][2] = 0
4806 09:56:30.965537 rx_firspass[0][0][3] = 0
4807 09:56:30.968363 rx_lastpass[0][0][3] = 0
4808 09:56:30.971795 rx_firspass[0][0][4] = 0
4809 09:56:30.972499 rx_lastpass[0][0][4] = 0
4810 09:56:30.975101 rx_firspass[0][0][5] = 0
4811 09:56:30.978626 rx_lastpass[0][0][5] = 0
4812 09:56:30.979133 rx_firspass[0][0][6] = 0
4813 09:56:30.981881 rx_lastpass[0][0][6] = 0
4814 09:56:30.984860 rx_firspass[0][0][7] = 0
4815 09:56:30.985319 rx_lastpass[0][0][7] = 0
4816 09:56:30.988797 rx_firspass[0][0][8] = 0
4817 09:56:30.991731 rx_lastpass[0][0][8] = 0
4818 09:56:30.992222 rx_firspass[0][0][9] = 0
4819 09:56:30.995276 rx_lastpass[0][0][9] = 0
4820 09:56:30.998640 rx_firspass[0][0][10] = 0
4821 09:56:30.999147 rx_lastpass[0][0][10] = 0
4822 09:56:31.001659 rx_firspass[0][0][11] = 0
4823 09:56:31.005619 rx_lastpass[0][0][11] = 0
4824 09:56:31.008613 rx_firspass[0][0][12] = 0
4825 09:56:31.009123 rx_lastpass[0][0][12] = 0
4826 09:56:31.011937 rx_firspass[0][0][13] = 0
4827 09:56:31.015092 rx_lastpass[0][0][13] = 0
4828 09:56:31.015603 rx_firspass[0][0][14] = 0
4829 09:56:31.018599 rx_lastpass[0][0][14] = 0
4830 09:56:31.021994 rx_firspass[0][0][15] = 0
4831 09:56:31.025066 rx_lastpass[0][0][15] = 0
4832 09:56:31.025491 rx_firspass[0][1][0] = 0
4833 09:56:31.028580 rx_lastpass[0][1][0] = 0
4834 09:56:31.031898 rx_firspass[0][1][1] = 0
4835 09:56:31.032404 rx_lastpass[0][1][1] = 0
4836 09:56:31.035012 rx_firspass[0][1][2] = 0
4837 09:56:31.038793 rx_lastpass[0][1][2] = 0
4838 09:56:31.039326 rx_firspass[0][1][3] = 0
4839 09:56:31.042111 rx_lastpass[0][1][3] = 0
4840 09:56:31.045533 rx_firspass[0][1][4] = 0
4841 09:56:31.046052 rx_lastpass[0][1][4] = 0
4842 09:56:31.048744 rx_firspass[0][1][5] = 0
4843 09:56:31.052084 rx_lastpass[0][1][5] = 0
4844 09:56:31.052603 rx_firspass[0][1][6] = 0
4845 09:56:31.055065 rx_lastpass[0][1][6] = 0
4846 09:56:31.058409 rx_firspass[0][1][7] = 0
4847 09:56:31.061980 rx_lastpass[0][1][7] = 0
4848 09:56:31.062700 rx_firspass[0][1][8] = 0
4849 09:56:31.065292 rx_lastpass[0][1][8] = 0
4850 09:56:31.068583 rx_firspass[0][1][9] = 0
4851 09:56:31.069098 rx_lastpass[0][1][9] = 0
4852 09:56:31.071896 rx_firspass[0][1][10] = 0
4853 09:56:31.075668 rx_lastpass[0][1][10] = 0
4854 09:56:31.076171 rx_firspass[0][1][11] = 0
4855 09:56:31.078885 rx_lastpass[0][1][11] = 0
4856 09:56:31.081993 rx_firspass[0][1][12] = 0
4857 09:56:31.085103 rx_lastpass[0][1][12] = 0
4858 09:56:31.085530 rx_firspass[0][1][13] = 0
4859 09:56:31.088616 rx_lastpass[0][1][13] = 0
4860 09:56:31.092168 rx_firspass[0][1][14] = 0
4861 09:56:31.092675 rx_lastpass[0][1][14] = 0
4862 09:56:31.095235 rx_firspass[0][1][15] = 0
4863 09:56:31.098777 rx_lastpass[0][1][15] = 0
4864 09:56:31.099283 rx_firspass[1][0][0] = 0
4865 09:56:31.101925 rx_lastpass[1][0][0] = 0
4866 09:56:31.105628 rx_firspass[1][0][1] = 0
4867 09:56:31.106134 rx_lastpass[1][0][1] = 0
4868 09:56:31.108838 rx_firspass[1][0][2] = 0
4869 09:56:31.112365 rx_lastpass[1][0][2] = 0
4870 09:56:31.115261 rx_firspass[1][0][3] = 0
4871 09:56:31.115687 rx_lastpass[1][0][3] = 0
4872 09:56:31.118690 rx_firspass[1][0][4] = 0
4873 09:56:31.122160 rx_lastpass[1][0][4] = 0
4874 09:56:31.122718 rx_firspass[1][0][5] = 0
4875 09:56:31.125347 rx_lastpass[1][0][5] = 0
4876 09:56:31.128956 rx_firspass[1][0][6] = 0
4877 09:56:31.129493 rx_lastpass[1][0][6] = 0
4878 09:56:31.131969 rx_firspass[1][0][7] = 0
4879 09:56:31.135460 rx_lastpass[1][0][7] = 0
4880 09:56:31.136072 rx_firspass[1][0][8] = 0
4881 09:56:31.138932 rx_lastpass[1][0][8] = 0
4882 09:56:31.142086 rx_firspass[1][0][9] = 0
4883 09:56:31.142678 rx_lastpass[1][0][9] = 0
4884 09:56:31.145505 rx_firspass[1][0][10] = 0
4885 09:56:31.148923 rx_lastpass[1][0][10] = 0
4886 09:56:31.152338 rx_firspass[1][0][11] = 0
4887 09:56:31.152895 rx_lastpass[1][0][11] = 0
4888 09:56:31.155291 rx_firspass[1][0][12] = 0
4889 09:56:31.159005 rx_lastpass[1][0][12] = 0
4890 09:56:31.159516 rx_firspass[1][0][13] = 0
4891 09:56:31.162121 rx_lastpass[1][0][13] = 0
4892 09:56:31.165602 rx_firspass[1][0][14] = 0
4893 09:56:31.168562 rx_lastpass[1][0][14] = 0
4894 09:56:31.168990 rx_firspass[1][0][15] = 0
4895 09:56:31.172178 rx_lastpass[1][0][15] = 0
4896 09:56:31.175584 rx_firspass[1][1][0] = 0
4897 09:56:31.176093 rx_lastpass[1][1][0] = 0
4898 09:56:31.178856 rx_firspass[1][1][1] = 0
4899 09:56:31.182436 rx_lastpass[1][1][1] = 0
4900 09:56:31.182939 rx_firspass[1][1][2] = 0
4901 09:56:31.185317 rx_lastpass[1][1][2] = 0
4902 09:56:31.188949 rx_firspass[1][1][3] = 0
4903 09:56:31.189468 rx_lastpass[1][1][3] = 0
4904 09:56:31.191930 rx_firspass[1][1][4] = 0
4905 09:56:31.195686 rx_lastpass[1][1][4] = 0
4906 09:56:31.199314 rx_firspass[1][1][5] = 0
4907 09:56:31.199858 rx_lastpass[1][1][5] = 0
4908 09:56:31.202070 rx_firspass[1][1][6] = 0
4909 09:56:31.205284 rx_lastpass[1][1][6] = 0
4910 09:56:31.205706 rx_firspass[1][1][7] = 0
4911 09:56:31.208995 rx_lastpass[1][1][7] = 0
4912 09:56:31.212595 rx_firspass[1][1][8] = 0
4913 09:56:31.213104 rx_lastpass[1][1][8] = 0
4914 09:56:31.215511 rx_firspass[1][1][9] = 0
4915 09:56:31.219182 rx_lastpass[1][1][9] = 0
4916 09:56:31.219821 rx_firspass[1][1][10] = 0
4917 09:56:31.222361 rx_lastpass[1][1][10] = 0
4918 09:56:31.225701 rx_firspass[1][1][11] = 0
4919 09:56:31.226292 rx_lastpass[1][1][11] = 0
4920 09:56:31.229151 rx_firspass[1][1][12] = 0
4921 09:56:31.232102 rx_lastpass[1][1][12] = 0
4922 09:56:31.235486 rx_firspass[1][1][13] = 0
4923 09:56:31.235911 rx_lastpass[1][1][13] = 0
4924 09:56:31.238933 rx_firspass[1][1][14] = 0
4925 09:56:31.242551 rx_lastpass[1][1][14] = 0
4926 09:56:31.243056 rx_firspass[1][1][15] = 0
4927 09:56:31.245625 rx_lastpass[1][1][15] = 0
4928 09:56:31.249301 dump params clk_delay
4929 09:56:31.249803 clk_delay[0] = 0
4930 09:56:31.252401 clk_delay[1] = 0
4931 09:56:31.252907 dump params dqs_delay
4932 09:56:31.255492 dqs_delay[0][0] = 0
4933 09:56:31.255916 dqs_delay[0][1] = 0
4934 09:56:31.259343 dqs_delay[1][0] = 0
4935 09:56:31.259850 dqs_delay[1][1] = 0
4936 09:56:31.262195 dump params delay_cell_unit = 762
4937 09:56:31.265734 mt_set_emi_preloader end
4938 09:56:31.269551 [mt_mem_init] dram size: 0x100000000, rank number: 2
4939 09:56:31.275674 [complex_mem_test] start addr:0x40000000, len:20480
4940 09:56:31.311785 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4941 09:56:31.318006 [complex_mem_test] start addr:0x80000000, len:20480
4942 09:56:31.354043 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4943 09:56:31.360945 [complex_mem_test] start addr:0xc0000000, len:20480
4944 09:56:31.396454 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4945 09:56:31.402848 [complex_mem_test] start addr:0x56000000, len:8192
4946 09:56:31.419556 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4947 09:56:31.420163 ddr_geometry:1
4948 09:56:31.426328 [complex_mem_test] start addr:0x80000000, len:8192
4949 09:56:31.443044 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4950 09:56:31.446335 dram_init: dram init end (result: 0)
4951 09:56:31.453024 Successfully loaded DRAM blobs and ran DRAM calibration
4952 09:56:31.463037 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4953 09:56:31.463539 CBMEM:
4954 09:56:31.466423 IMD: root @ 00000000fffff000 254 entries.
4955 09:56:31.469615 IMD: root @ 00000000ffffec00 62 entries.
4956 09:56:31.476781 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4957 09:56:31.483555 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4958 09:56:31.486623 in-header: 03 a1 00 00 08 00 00 00
4959 09:56:31.490036 in-data: 84 60 60 10 00 00 00 00
4960 09:56:31.493239 Chrome EC: clear events_b mask to 0x0000000020004000
4961 09:56:31.500648 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4962 09:56:31.503659 in-header: 03 fd 00 00 00 00 00 00
4963 09:56:31.504090 in-data:
4964 09:56:31.510565 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4965 09:56:31.510997 CBFS @ 21000 size 3d4000
4966 09:56:31.517267 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4967 09:56:31.520472 CBFS: Locating 'fallback/ramstage'
4968 09:56:31.523687 CBFS: Found @ offset 10d40 size d563
4969 09:56:31.545399 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4970 09:56:31.557334 Accumulated console time in romstage 12689 ms
4971 09:56:31.557845
4972 09:56:31.558182
4973 09:56:31.567353 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4974 09:56:31.570876 ARM64: Exception handlers installed.
4975 09:56:31.571389 ARM64: Testing exception
4976 09:56:31.573997 ARM64: Done test exception
4977 09:56:31.577444 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4978 09:56:31.580775 Manufacturer: ef
4979 09:56:31.584278 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4980 09:56:31.590968 WARNING: RO_VPD is uninitialized or empty.
4981 09:56:31.594507 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4982 09:56:31.597433 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4983 09:56:31.606934 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4984 09:56:31.610148 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4985 09:56:31.617257 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4986 09:56:31.617775 Enumerating buses...
4987 09:56:31.623964 Show all devs... Before device enumeration.
4988 09:56:31.624472 Root Device: enabled 1
4989 09:56:31.627419 CPU_CLUSTER: 0: enabled 1
4990 09:56:31.627931 CPU: 00: enabled 1
4991 09:56:31.630362 Compare with tree...
4992 09:56:31.633933 Root Device: enabled 1
4993 09:56:31.634508 CPU_CLUSTER: 0: enabled 1
4994 09:56:31.637006 CPU: 00: enabled 1
4995 09:56:31.637450 Root Device scanning...
4996 09:56:31.640450 root_dev_scan_bus for Root Device
4997 09:56:31.644097 CPU_CLUSTER: 0 enabled
4998 09:56:31.647184 root_dev_scan_bus for Root Device done
4999 09:56:31.650627 scan_bus: scanning of bus Root Device took 10690 usecs
5000 09:56:31.653676 done
5001 09:56:31.656722 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5002 09:56:31.660465 Allocating resources...
5003 09:56:31.660975 Reading resources...
5004 09:56:31.663595 Root Device read_resources bus 0 link: 0
5005 09:56:31.670567 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5006 09:56:31.671080 CPU: 00 missing read_resources
5007 09:56:31.677298 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5008 09:56:31.680524 Root Device read_resources bus 0 link: 0 done
5009 09:56:31.683897 Done reading resources.
5010 09:56:31.687194 Show resources in subtree (Root Device)...After reading.
5011 09:56:31.690640 Root Device child on link 0 CPU_CLUSTER: 0
5012 09:56:31.693934 CPU_CLUSTER: 0 child on link 0 CPU: 00
5013 09:56:31.703683 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5014 09:56:31.704420 CPU: 00
5015 09:56:31.706783 Setting resources...
5016 09:56:31.710160 Root Device assign_resources, bus 0 link: 0
5017 09:56:31.713728 CPU_CLUSTER: 0 missing set_resources
5018 09:56:31.716951 Root Device assign_resources, bus 0 link: 0
5019 09:56:31.720293 Done setting resources.
5020 09:56:31.723617 Show resources in subtree (Root Device)...After assigning values.
5021 09:56:31.730767 Root Device child on link 0 CPU_CLUSTER: 0
5022 09:56:31.734015 CPU_CLUSTER: 0 child on link 0 CPU: 00
5023 09:56:31.740760 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5024 09:56:31.744270 CPU: 00
5025 09:56:31.744790 Done allocating resources.
5026 09:56:31.750651 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5027 09:56:31.751177 Enabling resources...
5028 09:56:31.754240 done.
5029 09:56:31.757079 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5030 09:56:31.760696 Initializing devices...
5031 09:56:31.761214 Root Device init ...
5032 09:56:31.763834 mainboard_init: Starting display init.
5033 09:56:31.766775 ADC[4]: Raw value=77032 ID=0
5034 09:56:31.789553 anx7625_power_on_init: Init interface.
5035 09:56:31.793307 anx7625_disable_pd_protocol: Disabled PD feature.
5036 09:56:31.799503 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5037 09:56:31.857053 anx7625_start_dp_work: Secure OCM version=00
5038 09:56:31.860012 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5039 09:56:31.877246 sp_tx_get_edid_block: EDID Block = 1
5040 09:56:31.994493 Extracted contents:
5041 09:56:31.997979 header: 00 ff ff ff ff ff ff 00
5042 09:56:32.000903 serial number: 06 af 5c 14 00 00 00 00 00 1a
5043 09:56:32.004275 version: 01 04
5044 09:56:32.007522 basic params: 95 1a 0e 78 02
5045 09:56:32.011113 chroma info: 99 85 95 55 56 92 28 22 50 54
5046 09:56:32.014474 established: 00 00 00
5047 09:56:32.020846 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5048 09:56:32.024450 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5049 09:56:32.030979 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5050 09:56:32.037711 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5051 09:56:32.044451 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5052 09:56:32.047626 extensions: 00
5053 09:56:32.048060 checksum: ae
5054 09:56:32.048416
5055 09:56:32.051016 Manufacturer: AUO Model 145c Serial Number 0
5056 09:56:32.054152 Made week 0 of 2016
5057 09:56:32.054718 EDID version: 1.4
5058 09:56:32.057534 Digital display
5059 09:56:32.060930 6 bits per primary color channel
5060 09:56:32.061475 DisplayPort interface
5061 09:56:32.064247 Maximum image size: 26 cm x 14 cm
5062 09:56:32.067538 Gamma: 220%
5063 09:56:32.067972 Check DPMS levels
5064 09:56:32.071157 Supported color formats: RGB 4:4:4
5065 09:56:32.074401 First detailed timing is preferred timing
5066 09:56:32.077626 Established timings supported:
5067 09:56:32.080972 Standard timings supported:
5068 09:56:32.081484 Detailed timings
5069 09:56:32.084575 Hex of detail: ce1d56ea50001a3030204600009010000018
5070 09:56:32.091100 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5071 09:56:32.094442 0556 0586 05a6 0640 hborder 0
5072 09:56:32.097613 0300 0304 030a 031a vborder 0
5073 09:56:32.101492 -hsync -vsync
5074 09:56:32.104519 Did detailed timing
5075 09:56:32.107464 Hex of detail: 0000000f0000000000000000000000000020
5076 09:56:32.110866 Manufacturer-specified data, tag 15
5077 09:56:32.114287 Hex of detail: 000000fe0041554f0a202020202020202020
5078 09:56:32.117782 ASCII string: AUO
5079 09:56:32.121003 Hex of detail: 000000fe004231313658414230312e34200a
5080 09:56:32.124323 ASCII string: B116XAB01.4
5081 09:56:32.124846 Checksum
5082 09:56:32.127930 Checksum: 0xae (valid)
5083 09:56:32.131667 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5084 09:56:32.134342 DSI data_rate: 457800000 bps
5085 09:56:32.141662 anx7625_parse_edid: set default k value to 0x3d for panel
5086 09:56:32.144768 anx7625_parse_edid: pixelclock(76300).
5087 09:56:32.148162 hactive(1366), hsync(32), hfp(48), hbp(154)
5088 09:56:32.151432 vactive(768), vsync(6), vfp(4), vbp(16)
5089 09:56:32.154755 anx7625_dsi_config: config dsi.
5090 09:56:32.162585 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5091 09:56:32.183476 anx7625_dsi_config: success to config DSI
5092 09:56:32.186977 anx7625_dp_start: MIPI phy setup OK.
5093 09:56:32.190029 [SSUSB] Setting up USB HOST controller...
5094 09:56:32.193619 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5095 09:56:32.196792 [SSUSB] phy power-on done.
5096 09:56:32.200819 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5097 09:56:32.203927 in-header: 03 fc 01 00 00 00 00 00
5098 09:56:32.204366 in-data:
5099 09:56:32.207165 handle_proto3_response: EC response with error code: 1
5100 09:56:32.210605 SPM: pcm index = 1
5101 09:56:32.213875 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5102 09:56:32.217442 CBFS @ 21000 size 3d4000
5103 09:56:32.223819 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5104 09:56:32.227509 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5105 09:56:32.230526 CBFS: Found @ offset 1e7c0 size 1026
5106 09:56:32.237121 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5107 09:56:32.240533 SPM: binary array size = 2988
5108 09:56:32.244127 SPM: version = pcm_allinone_v1.17.2_20180829
5109 09:56:32.246967 SPM binary loaded in 32 msecs
5110 09:56:32.255015 spm_kick_im_to_fetch: ptr = 000000004021eec2
5111 09:56:32.257904 spm_kick_im_to_fetch: len = 2988
5112 09:56:32.258380 SPM: spm_kick_pcm_to_run
5113 09:56:32.261607 SPM: spm_kick_pcm_to_run done
5114 09:56:32.264801 SPM: spm_init done in 52 msecs
5115 09:56:32.267777 Root Device init finished in 505263 usecs
5116 09:56:32.271494 CPU_CLUSTER: 0 init ...
5117 09:56:32.278080 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5118 09:56:32.284795 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5119 09:56:32.288134 CBFS @ 21000 size 3d4000
5120 09:56:32.291400 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5121 09:56:32.295152 CBFS: Locating 'sspm.bin'
5122 09:56:32.298135 CBFS: Found @ offset 208c0 size 41cb
5123 09:56:32.307654 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5124 09:56:32.315871 CPU_CLUSTER: 0 init finished in 42801 usecs
5125 09:56:32.316405 Devices initialized
5126 09:56:32.319204 Show all devs... After init.
5127 09:56:32.322853 Root Device: enabled 1
5128 09:56:32.323371 CPU_CLUSTER: 0: enabled 1
5129 09:56:32.325777 CPU: 00: enabled 1
5130 09:56:32.329289 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5131 09:56:32.332575 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5132 09:56:32.335745 ELOG: NV offset 0x558000 size 0x1000
5133 09:56:32.343070 read SPI 0x558000 0x1000: 1264 us, 3240 KB/s, 25.920 Mbps
5134 09:56:32.350047 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5135 09:56:32.353591 ELOG: Event(17) added with size 13 at 2024-06-18 09:56:32 UTC
5136 09:56:32.356617 out: cmd=0x121: 03 db 21 01 00 00 00 00
5137 09:56:32.360110 in-header: 03 62 00 00 2c 00 00 00
5138 09:56:32.373164 in-data: f2 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 07 ba 19 00 06 80 00 00 d0 f6 1a 00 06 80 00 00 08 95 01 00 06 80 00 00 16 9b 02 00
5139 09:56:32.376668 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5140 09:56:32.380346 in-header: 03 19 00 00 08 00 00 00
5141 09:56:32.383333 in-data: a2 e0 47 00 13 00 00 00
5142 09:56:32.386673 Chrome EC: UHEPI supported
5143 09:56:32.393376 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5144 09:56:32.396758 in-header: 03 e1 00 00 08 00 00 00
5145 09:56:32.400010 in-data: 84 20 60 10 00 00 00 00
5146 09:56:32.403231 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5147 09:56:32.409912 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5148 09:56:32.413735 in-header: 03 e1 00 00 08 00 00 00
5149 09:56:32.416524 in-data: 84 20 60 10 00 00 00 00
5150 09:56:32.423339 ELOG: Event(A1) added with size 10 at 2024-06-18 09:56:32 UTC
5151 09:56:32.430471 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5152 09:56:32.433730 ELOG: Event(A0) added with size 9 at 2024-06-18 09:56:32 UTC
5153 09:56:32.436830 elog_add_boot_reason: Logged dev mode boot
5154 09:56:32.440025 Finalize devices...
5155 09:56:32.443521 Devices finalized
5156 09:56:32.446708 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5157 09:56:32.450301 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5158 09:56:32.456755 ELOG: Event(91) added with size 10 at 2024-06-18 09:56:32 UTC
5159 09:56:32.460334 Writing coreboot table at 0xffeda000
5160 09:56:32.463602 0. 0000000000114000-000000000011efff: RAMSTAGE
5161 09:56:32.470390 1. 0000000040000000-000000004023cfff: RAMSTAGE
5162 09:56:32.473384 2. 000000004023d000-00000000545fffff: RAM
5163 09:56:32.477167 3. 0000000054600000-000000005465ffff: BL31
5164 09:56:32.480283 4. 0000000054660000-00000000ffed9fff: RAM
5165 09:56:32.486715 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5166 09:56:32.490055 6. 0000000100000000-000000013fffffff: RAM
5167 09:56:32.490542 Passing 5 GPIOs to payload:
5168 09:56:32.496802 NAME | PORT | POLARITY | VALUE
5169 09:56:32.500244 write protect | 0x00000096 | low | high
5170 09:56:32.506929 EC in RW | 0x000000b1 | high | undefined
5171 09:56:32.510145 EC interrupt | 0x00000097 | low | undefined
5172 09:56:32.513843 TPM interrupt | 0x00000099 | high | undefined
5173 09:56:32.520341 speaker enable | 0x000000af | high | undefined
5174 09:56:32.523374 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5175 09:56:32.526963 in-header: 03 f7 00 00 02 00 00 00
5176 09:56:32.527400 in-data: 04 00
5177 09:56:32.530387 Board ID: 4
5178 09:56:32.530822 ADC[3]: Raw value=1040656 ID=8
5179 09:56:32.533920 RAM code: 8
5180 09:56:32.534580 SKU ID: 16
5181 09:56:32.537267 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5182 09:56:32.540333 CBFS @ 21000 size 3d4000
5183 09:56:32.547136 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5184 09:56:32.550140 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5eb1
5185 09:56:32.553919 coreboot table: 940 bytes.
5186 09:56:32.557006 IMD ROOT 0. 00000000fffff000 00001000
5187 09:56:32.560486 IMD SMALL 1. 00000000ffffe000 00001000
5188 09:56:32.563504 CONSOLE 2. 00000000fffde000 00020000
5189 09:56:32.570250 FMAP 3. 00000000fffdd000 0000047c
5190 09:56:32.573661 TIME STAMP 4. 00000000fffdc000 00000910
5191 09:56:32.577170 RAMOOPS 5. 00000000ffedc000 00100000
5192 09:56:32.580393 COREBOOT 6. 00000000ffeda000 00002000
5193 09:56:32.580905 IMD small region:
5194 09:56:32.583487 IMD ROOT 0. 00000000ffffec00 00000400
5195 09:56:32.590322 VBOOT WORK 1. 00000000ffffeb00 00000100
5196 09:56:32.593377 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5197 09:56:32.597050 VPD 3. 00000000ffffea60 0000006c
5198 09:56:32.600370 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5199 09:56:32.607047 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5200 09:56:32.610272 in-header: 03 e1 00 00 08 00 00 00
5201 09:56:32.613892 in-data: 84 20 60 10 00 00 00 00
5202 09:56:32.617034 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5203 09:56:32.620136 CBFS @ 21000 size 3d4000
5204 09:56:32.627187 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5205 09:56:32.630290 CBFS: Locating 'fallback/payload'
5206 09:56:32.637251 CBFS: Found @ offset dc040 size 439a0
5207 09:56:32.725096 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5208 09:56:32.728646 Checking segment from ROM address 0x0000000040003a00
5209 09:56:32.735382 Checking segment from ROM address 0x0000000040003a1c
5210 09:56:32.738608 Loading segment from ROM address 0x0000000040003a00
5211 09:56:32.742093 code (compression=0)
5212 09:56:32.748980 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5213 09:56:32.758620 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5214 09:56:32.762392 it's not compressed!
5215 09:56:32.765821 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5216 09:56:32.772498 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5217 09:56:32.779968 Loading segment from ROM address 0x0000000040003a1c
5218 09:56:32.783127 Entry Point 0x0000000080000000
5219 09:56:32.783638 Loaded segments
5220 09:56:32.789825 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5221 09:56:32.792996 Jumping to boot code at 0000000080000000(00000000ffeda000)
5222 09:56:32.803326 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5223 09:56:32.806634 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5224 09:56:32.809650 CBFS @ 21000 size 3d4000
5225 09:56:32.816567 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5226 09:56:32.817087 CBFS: Locating 'fallback/bl31'
5227 09:56:32.819949 CBFS: Found @ offset 36dc0 size 5820
5228 09:56:32.833651 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5229 09:56:32.837131 Checking segment from ROM address 0x0000000040003a00
5230 09:56:32.843691 Checking segment from ROM address 0x0000000040003a1c
5231 09:56:32.846820 Loading segment from ROM address 0x0000000040003a00
5232 09:56:32.850312 code (compression=1)
5233 09:56:32.856913 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5234 09:56:32.866850 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5235 09:56:32.867382 using LZMA
5236 09:56:32.875464 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5237 09:56:32.882300 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5238 09:56:32.885700 Loading segment from ROM address 0x0000000040003a1c
5239 09:56:32.888738 Entry Point 0x0000000054601000
5240 09:56:32.889176 Loaded segments
5241 09:56:32.891898 NOTICE: MT8183 bl31_setup
5242 09:56:32.899362 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5243 09:56:32.902473 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5244 09:56:32.905864 INFO: [DEVAPC] dump DEVAPC registers:
5245 09:56:32.915959 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5246 09:56:32.922819 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5247 09:56:32.929488 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5248 09:56:32.939165 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5249 09:56:32.949424 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5250 09:56:32.955742 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5251 09:56:32.962894 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5252 09:56:32.972562 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5253 09:56:32.979314 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5254 09:56:32.989409 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5255 09:56:32.996016 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5256 09:56:33.005971 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5257 09:56:33.012309 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5258 09:56:33.019039 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5259 09:56:33.029424 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5260 09:56:33.036198 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5261 09:56:33.042442 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5262 09:56:33.049502 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5263 09:56:33.056155 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5264 09:56:33.065970 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5265 09:56:33.072724 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5266 09:56:33.079165 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5267 09:56:33.082737 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5268 09:56:33.086041 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5269 09:56:33.089145 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5270 09:56:33.092309 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5271 09:56:33.095723 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5272 09:56:33.102658 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5273 09:56:33.105682 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5274 09:56:33.108814 WARNING: region 0:
5275 09:56:33.112090 WARNING: apc:0x168, sa:0x0, ea:0xfff
5276 09:56:33.112726 WARNING: region 1:
5277 09:56:33.119014 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5278 09:56:33.119446 WARNING: region 2:
5279 09:56:33.122587 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5280 09:56:33.125694 WARNING: region 3:
5281 09:56:33.128964 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5282 09:56:33.129471 WARNING: region 4:
5283 09:56:33.132524 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5284 09:56:33.135655 WARNING: region 5:
5285 09:56:33.138851 WARNING: apc:0x0, sa:0x0, ea:0x0
5286 09:56:33.139284 WARNING: region 6:
5287 09:56:33.142279 WARNING: apc:0x0, sa:0x0, ea:0x0
5288 09:56:33.145806 WARNING: region 7:
5289 09:56:33.148979 WARNING: apc:0x0, sa:0x0, ea:0x0
5290 09:56:33.155584 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5291 09:56:33.159223 INFO: SPM: enable SPMC mode
5292 09:56:33.162408 NOTICE: spm_boot_init() start
5293 09:56:33.162937 NOTICE: spm_boot_init() end
5294 09:56:33.168956 INFO: BL31: Initializing runtime services
5295 09:56:33.172573 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5296 09:56:33.179096 INFO: BL31: Preparing for EL3 exit to normal world
5297 09:56:33.182429 INFO: Entry point address = 0x80000000
5298 09:56:33.182953 INFO: SPSR = 0x8
5299 09:56:33.205900
5300 09:56:33.206445
5301 09:56:33.206786
5302 09:56:33.208365 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5303 09:56:33.208877 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5304 09:56:33.209296 Setting prompt string to ['jacuzzi:']
5305 09:56:33.209681 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5306 09:56:33.210358 Starting depthcharge on Juniper...
5307 09:56:33.210709
5308 09:56:33.212387 vboot_handoff: creating legacy vboot_handoff structure
5309 09:56:33.212824
5310 09:56:33.215778 ec_init(0): CrosEC protocol v3 supported (544, 544)
5311 09:56:33.216300
5312 09:56:33.218895 Wipe memory regions:
5313 09:56:33.219328
5314 09:56:33.222378 [0x00000040000000, 0x00000054600000)
5315 09:56:33.265231
5316 09:56:33.265741 [0x00000054660000, 0x00000080000000)
5317 09:56:33.356705
5318 09:56:33.357217 [0x000000811994a0, 0x000000ffeda000)
5319 09:56:33.616502
5320 09:56:33.617004 [0x00000100000000, 0x00000140000000)
5321 09:56:33.749407
5322 09:56:33.752696 Initializing XHCI USB controller at 0x11200000.
5323 09:56:33.775968
5324 09:56:33.778805 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5325 09:56:33.779240
5326 09:56:33.779577
5327 09:56:33.780309 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5329 09:56:33.881548 jacuzzi: tftpboot 192.168.201.1 14407613/tftp-deploy-rfubl4mt/kernel/image.itb 14407613/tftp-deploy-rfubl4mt/kernel/cmdline
5330 09:56:33.882274 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5331 09:56:33.882737 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5332 09:56:33.887138 tftpboot 192.168.201.1 14407613/tftp-deploy-rfubl4mt/kernel/image.ittp-deploy-rfubl4mt/kernel/cmdline
5333 09:56:33.887668
5334 09:56:33.888004 Waiting for link
5335 09:56:34.435151
5336 09:56:34.435655 R8152: Initializing
5337 09:56:34.435992
5338 09:56:34.438424 Version 9 (ocp_data = 6010)
5339 09:56:34.438854
5340 09:56:34.441863 R8152: Done initializing
5341 09:56:34.442313
5342 09:56:34.442647 Adding net device
5343 09:56:34.620845
5344 09:56:34.621523 R8152: Initializing
5345 09:56:34.621879
5346 09:56:34.624333 Version 9 (ocp_data = 6010)
5347 09:56:34.624839
5348 09:56:34.627558 R8152: Done initializing
5349 09:56:34.627984
5350 09:56:34.630715 net_add_device: Attemp to include the same device
5351 09:56:35.017211
5352 09:56:35.017722 done.
5353 09:56:35.018063
5354 09:56:35.018449 MAC: 00:e0:4c:68:03:2b
5355 09:56:35.018762
5356 09:56:35.020517 Sending DHCP discover... done.
5357 09:56:35.021079
5358 09:56:35.023879 Waiting for reply... done.
5359 09:56:35.024362
5360 09:56:35.026959 Sending DHCP request... done.
5361 09:56:35.027386
5362 09:56:35.033167 Waiting for reply... done.
5363 09:56:35.033598
5364 09:56:35.033933 My ip is 192.168.201.17
5365 09:56:35.034292
5366 09:56:35.036482 The DHCP server ip is 192.168.201.1
5367 09:56:35.036913
5368 09:56:35.042976 TFTP server IP predefined by user: 192.168.201.1
5369 09:56:35.043761
5370 09:56:35.049816 Bootfile predefined by user: 14407613/tftp-deploy-rfubl4mt/kernel/image.itb
5371 09:56:35.050372
5372 09:56:35.050718 Sending tftp read request... done.
5373 09:56:35.052961
5374 09:56:35.060250 Waiting for the transfer...
5375 09:56:35.060754
5376 09:56:35.338892 00000000 ################################################################
5377 09:56:35.339023
5378 09:56:35.633053 00080000 ################################################################
5379 09:56:35.633172
5380 09:56:35.932023 00100000 ################################################################
5381 09:56:35.932159
5382 09:56:36.227728 00180000 ################################################################
5383 09:56:36.227844
5384 09:56:36.492494 00200000 ################################################################
5385 09:56:36.492616
5386 09:56:36.747869 00280000 ################################################################
5387 09:56:36.747986
5388 09:56:37.002616 00300000 ################################################################
5389 09:56:37.002725
5390 09:56:37.257797 00380000 ################################################################
5391 09:56:37.257911
5392 09:56:37.512562 00400000 ################################################################
5393 09:56:37.512678
5394 09:56:37.798752 00480000 ################################################################
5395 09:56:37.798867
5396 09:56:38.075271 00500000 ################################################################
5397 09:56:38.075389
5398 09:56:38.360757 00580000 ################################################################
5399 09:56:38.360904
5400 09:56:38.637834 00600000 ################################################################
5401 09:56:38.637952
5402 09:56:38.916296 00680000 ################################################################
5403 09:56:38.916417
5404 09:56:39.192504 00700000 ################################################################
5405 09:56:39.192636
5406 09:56:39.469320 00780000 ################################################################
5407 09:56:39.469491
5408 09:56:39.728422 00800000 ################################################################
5409 09:56:39.728540
5410 09:56:39.988435 00880000 ################################################################
5411 09:56:39.988553
5412 09:56:40.253227 00900000 ################################################################
5413 09:56:40.253352
5414 09:56:40.507819 00980000 ################################################################
5415 09:56:40.507937
5416 09:56:40.785814 00a00000 ################################################################
5417 09:56:40.785932
5418 09:56:41.065280 00a80000 ################################################################
5419 09:56:41.065404
5420 09:56:41.337963 00b00000 ################################################################
5421 09:56:41.338105
5422 09:56:41.601187 00b80000 ################################################################
5423 09:56:41.601306
5424 09:56:41.876393 00c00000 ################################################################
5425 09:56:41.876510
5426 09:56:42.152670 00c80000 ################################################################
5427 09:56:42.152789
5428 09:56:42.407281 00d00000 ################################################################
5429 09:56:42.407396
5430 09:56:42.691888 00d80000 ################################################################
5431 09:56:42.692011
5432 09:56:42.972602 00e00000 ################################################################
5433 09:56:42.972719
5434 09:56:43.252788 00e80000 ################################################################
5435 09:56:43.252919
5436 09:56:43.523423 00f00000 ################################################################
5437 09:56:43.523535
5438 09:56:43.799093 00f80000 ################################################################
5439 09:56:43.799214
5440 09:56:44.085291 01000000 ################################################################
5441 09:56:44.085412
5442 09:56:44.348488 01080000 ################################################################
5443 09:56:44.348602
5444 09:56:44.610701 01100000 ################################################################
5445 09:56:44.610816
5446 09:56:44.868925 01180000 ################################################################
5447 09:56:44.869042
5448 09:56:45.143055 01200000 ################################################################
5449 09:56:45.143179
5450 09:56:45.416276 01280000 ################################################################
5451 09:56:45.416396
5452 09:56:45.680379 01300000 ################################################################
5453 09:56:45.680492
5454 09:56:45.967531 01380000 ################################################################
5455 09:56:45.967661
5456 09:56:46.232479 01400000 ################################################################
5457 09:56:46.232593
5458 09:56:46.521323 01480000 ################################################################
5459 09:56:46.521447
5460 09:56:46.819764 01500000 ################################################################
5461 09:56:46.819889
5462 09:56:47.105020 01580000 ################################################################
5463 09:56:47.105142
5464 09:56:47.390444 01600000 ################################################################
5465 09:56:47.390567
5466 09:56:47.672426 01680000 ################################################################
5467 09:56:47.672551
5468 09:56:47.967567 01700000 ################################################################
5469 09:56:47.967688
5470 09:56:48.244869 01780000 ################################################################
5471 09:56:48.244987
5472 09:56:48.510992 01800000 ################################################################
5473 09:56:48.511106
5474 09:56:48.770059 01880000 ################################################################
5475 09:56:48.770182
5476 09:56:49.056559 01900000 ################################################################
5477 09:56:49.056684
5478 09:56:49.355548 01980000 ################################################################
5479 09:56:49.355665
5480 09:56:49.650202 01a00000 ################################################################
5481 09:56:49.650379
5482 09:56:49.946462 01a80000 ################################################################
5483 09:56:49.946589
5484 09:56:50.202232 01b00000 ################################################################
5485 09:56:50.202391
5486 09:56:50.494117 01b80000 ################################################################
5487 09:56:50.494278
5488 09:56:50.786389 01c00000 ################################################################
5489 09:56:50.786506
5490 09:56:51.073019 01c80000 ################################################################
5491 09:56:51.073136
5492 09:56:51.357740 01d00000 ################################################################
5493 09:56:51.357868
5494 09:56:51.616864 01d80000 ################################################################
5495 09:56:51.616986
5496 09:56:51.883728 01e00000 ########################################################## done.
5497 09:56:51.887237
5498 09:56:51.890479 The bootfile was 31929154 bytes long.
5499 09:56:51.890561
5500 09:56:51.890624 Sending tftp read request... done.
5501 09:56:51.890682
5502 09:56:51.893606 Waiting for the transfer...
5503 09:56:51.893692
5504 09:56:51.897400 00000000 # done.
5505 09:56:51.897495
5506 09:56:51.904009 Command line loaded dynamically from TFTP file: 14407613/tftp-deploy-rfubl4mt/kernel/cmdline
5507 09:56:51.904173
5508 09:56:51.930624 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5509 09:56:51.930873
5510 09:56:51.931021 Loading FIT.
5511 09:56:51.931154
5512 09:56:51.934322 Image ramdisk-1 has 18742690 bytes.
5513 09:56:51.934604
5514 09:56:51.937569 Image fdt-1 has 57695 bytes.
5515 09:56:51.937896
5516 09:56:51.941058 Image kernel-1 has 13126726 bytes.
5517 09:56:51.941391
5518 09:56:51.947658 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5519 09:56:51.948098
5520 09:56:51.961339 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5521 09:56:51.961860
5522 09:56:51.967921 Choosing best match conf-1 for compat google,juniper-sku16.
5523 09:56:51.968354
5524 09:56:51.975536 Connected to device vid:did:rid of 1ae0:0028:00
5525 09:56:51.982592
5526 09:56:51.985471 tpm_get_response: command 0x17b, return code 0x0
5527 09:56:51.985910
5528 09:56:51.989346 tpm_cleanup: add release locality here.
5529 09:56:51.989851
5530 09:56:51.992450 Shutting down all USB controllers.
5531 09:56:51.993139
5532 09:56:51.995757 Removing current net device
5533 09:56:51.996189
5534 09:56:51.998747 Exiting depthcharge with code 4 at timestamp: 35029087
5535 09:56:51.999182
5536 09:56:52.002776 LZMA decompressing kernel-1 to 0x80193568
5537 09:56:52.003287
5538 09:56:52.005897 LZMA decompressing kernel-1 to 0x40000000
5539 09:56:53.874065
5540 09:56:53.874620 jumping to kernel
5541 09:56:53.876429 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5542 09:56:53.876947 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5543 09:56:53.877325 Setting prompt string to ['Linux version [0-9]']
5544 09:56:53.877674 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5545 09:56:53.878028 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5546 09:56:53.949558
5547 09:56:53.952918 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5548 09:56:53.956401 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5549 09:56:53.956932 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5550 09:56:53.957312 Setting prompt string to []
5551 09:56:53.957716 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5552 09:56:53.958075 Using line separator: #'\n'#
5553 09:56:53.958462 No login prompt set.
5554 09:56:53.958806 Parsing kernel messages
5555 09:56:53.959330 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5556 09:56:53.959897 [login-action] Waiting for messages, (timeout 00:04:07)
5557 09:56:53.960481 Waiting using forced prompt support (timeout 00:02:04)
5558 09:56:53.975900 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j235720-arm64-gcc-10-defconfig-arm64-chromebook-gjv8m) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024
5559 09:56:53.979651 [ 0.000000] random: crng init done
5560 09:56:53.983197 [ 0.000000] Machine model: Google juniper sku16 board
5561 09:56:53.986446 [ 0.000000] efi: UEFI not found.
5562 09:56:53.996378 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5563 09:56:54.003026 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5564 09:56:54.013137 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5565 09:56:54.016430 [ 0.000000] printk: bootconsole [mtk8250] enabled
5566 09:56:54.024405 [ 0.000000] NUMA: No NUMA configuration found
5567 09:56:54.031470 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5568 09:56:54.037673 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5569 09:56:54.038183 [ 0.000000] Zone ranges:
5570 09:56:54.044646 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5571 09:56:54.047824 [ 0.000000] DMA32 empty
5572 09:56:54.054555 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5573 09:56:54.057518 [ 0.000000] Movable zone start for each node
5574 09:56:54.060977 [ 0.000000] Early memory node ranges
5575 09:56:54.067563 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5576 09:56:54.074494 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5577 09:56:54.081481 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5578 09:56:54.087457 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5579 09:56:54.094364 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5580 09:56:54.100753 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5581 09:56:54.117296 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5582 09:56:54.123499 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5583 09:56:54.130378 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5584 09:56:54.133569 [ 0.000000] psci: probing for conduit method from DT.
5585 09:56:54.140139 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5586 09:56:54.143042 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5587 09:56:54.150060 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5588 09:56:54.153608 [ 0.000000] psci: SMC Calling Convention v1.1
5589 09:56:54.159918 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5590 09:56:54.163598 [ 0.000000] Detected VIPT I-cache on CPU0
5591 09:56:54.170366 [ 0.000000] CPU features: detected: GIC system register CPU interface
5592 09:56:54.176961 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5593 09:56:54.183573 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5594 09:56:54.186811 [ 0.000000] CPU features: detected: ARM erratum 845719
5595 09:56:54.193516 [ 0.000000] alternatives: applying boot alternatives
5596 09:56:54.196890 [ 0.000000] Fallback order for Node 0: 0
5597 09:56:54.203572 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5598 09:56:54.206849 [ 0.000000] Policy zone: Normal
5599 09:56:54.233593 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5600 09:56:54.246886 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5601 09:56:54.256807 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5602 09:56:54.263280 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5603 09:56:54.270036 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5604 09:56:54.273265 <6>[ 0.000000] software IO TLB: area num 8.
5605 09:56:54.300124 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5606 09:56:54.358318 <6>[ 0.000000] Memory: 3896772K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261692K reserved, 32768K cma-reserved)
5607 09:56:54.365150 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5608 09:56:54.371532 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5609 09:56:54.374933 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5610 09:56:54.381540 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5611 09:56:54.387949 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5612 09:56:54.391335 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5613 09:56:54.401389 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5614 09:56:54.408248 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5615 09:56:54.411401 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5616 09:56:54.423524 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5617 09:56:54.430145 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5618 09:56:54.433608 <6>[ 0.000000] GICv3: 640 SPIs implemented
5619 09:56:54.436817 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5620 09:56:54.440314 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5621 09:56:54.446955 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5622 09:56:54.453286 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5623 09:56:54.463050 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5624 09:56:54.476650 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5625 09:56:54.483218 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5626 09:56:54.495392 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5627 09:56:54.508677 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5628 09:56:54.515185 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5629 09:56:54.521960 <6>[ 0.009469] Console: colour dummy device 80x25
5630 09:56:54.525503 <6>[ 0.014512] printk: console [tty1] enabled
5631 09:56:54.535239 <6>[ 0.018899] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5632 09:56:54.541779 <6>[ 0.029363] pid_max: default: 32768 minimum: 301
5633 09:56:54.545479 <6>[ 0.034245] LSM: Security Framework initializing
5634 09:56:54.555519 <6>[ 0.039161] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5635 09:56:54.561875 <6>[ 0.046784] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5636 09:56:54.569064 <4>[ 0.055651] cacheinfo: Unable to detect cache hierarchy for CPU 0
5637 09:56:54.575506 <6>[ 0.062278] cblist_init_generic: Setting adjustable number of callback queues.
5638 09:56:54.582373 <6>[ 0.069724] cblist_init_generic: Setting shift to 3 and lim to 1.
5639 09:56:54.592191 <6>[ 0.076077] cblist_init_generic: Setting adjustable number of callback queues.
5640 09:56:54.598878 <6>[ 0.083522] cblist_init_generic: Setting shift to 3 and lim to 1.
5641 09:56:54.601837 <6>[ 0.089920] rcu: Hierarchical SRCU implementation.
5642 09:56:54.608654 <6>[ 0.094945] rcu: Max phase no-delay instances is 1000.
5643 09:56:54.615302 <6>[ 0.102873] EFI services will not be available.
5644 09:56:54.618723 <6>[ 0.107822] smp: Bringing up secondary CPUs ...
5645 09:56:54.629132 <6>[ 0.113046] Detected VIPT I-cache on CPU1
5646 09:56:54.635864 <4>[ 0.113093] cacheinfo: Unable to detect cache hierarchy for CPU 1
5647 09:56:54.642577 <6>[ 0.113103] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5648 09:56:54.649051 <6>[ 0.113136] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5649 09:56:54.652437 <6>[ 0.113615] Detected VIPT I-cache on CPU2
5650 09:56:54.658898 <4>[ 0.113648] cacheinfo: Unable to detect cache hierarchy for CPU 2
5651 09:56:54.665774 <6>[ 0.113652] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5652 09:56:54.672376 <6>[ 0.113665] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5653 09:56:54.675493 <6>[ 0.114112] Detected VIPT I-cache on CPU3
5654 09:56:54.682351 <4>[ 0.114142] cacheinfo: Unable to detect cache hierarchy for CPU 3
5655 09:56:54.688660 <6>[ 0.114146] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5656 09:56:54.696118 <6>[ 0.114157] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5657 09:56:54.702327 <6>[ 0.114732] CPU features: detected: Spectre-v2
5658 09:56:54.705448 <6>[ 0.114742] CPU features: detected: Spectre-BHB
5659 09:56:54.712611 <6>[ 0.114746] CPU features: detected: ARM erratum 858921
5660 09:56:54.715560 <6>[ 0.114752] Detected VIPT I-cache on CPU4
5661 09:56:54.722387 <4>[ 0.114800] cacheinfo: Unable to detect cache hierarchy for CPU 4
5662 09:56:54.729234 <6>[ 0.114807] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5663 09:56:54.735648 <6>[ 0.114815] arch_timer: Enabling local workaround for ARM erratum 858921
5664 09:56:54.742264 <6>[ 0.114826] arch_timer: CPU4: Trapping CNTVCT access
5665 09:56:54.749088 <6>[ 0.114834] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5666 09:56:54.752228 <6>[ 0.115319] Detected VIPT I-cache on CPU5
5667 09:56:54.758937 <4>[ 0.115360] cacheinfo: Unable to detect cache hierarchy for CPU 5
5668 09:56:54.765568 <6>[ 0.115365] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5669 09:56:54.772227 <6>[ 0.115372] arch_timer: Enabling local workaround for ARM erratum 858921
5670 09:56:54.779148 <6>[ 0.115378] arch_timer: CPU5: Trapping CNTVCT access
5671 09:56:54.785701 <6>[ 0.115383] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5672 09:56:54.788820 <6>[ 0.115818] Detected VIPT I-cache on CPU6
5673 09:56:54.795733 <4>[ 0.115864] cacheinfo: Unable to detect cache hierarchy for CPU 6
5674 09:56:54.802799 <6>[ 0.115870] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5675 09:56:54.809108 <6>[ 0.115877] arch_timer: Enabling local workaround for ARM erratum 858921
5676 09:56:54.815752 <6>[ 0.115883] arch_timer: CPU6: Trapping CNTVCT access
5677 09:56:54.822153 <6>[ 0.115888] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5678 09:56:54.825980 <6>[ 0.116419] Detected VIPT I-cache on CPU7
5679 09:56:54.832415 <4>[ 0.116461] cacheinfo: Unable to detect cache hierarchy for CPU 7
5680 09:56:54.839143 <6>[ 0.116467] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5681 09:56:54.845818 <6>[ 0.116474] arch_timer: Enabling local workaround for ARM erratum 858921
5682 09:56:54.852240 <6>[ 0.116480] arch_timer: CPU7: Trapping CNTVCT access
5683 09:56:54.858723 <6>[ 0.116486] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5684 09:56:54.861955 <6>[ 0.116534] smp: Brought up 1 node, 8 CPUs
5685 09:56:54.868849 <6>[ 0.355433] SMP: Total of 8 processors activated.
5686 09:56:54.871902 <6>[ 0.360368] CPU features: detected: 32-bit EL0 Support
5687 09:56:54.878896 <6>[ 0.365747] CPU features: detected: 32-bit EL1 Support
5688 09:56:54.885222 <6>[ 0.371114] CPU features: detected: CRC32 instructions
5689 09:56:54.888600 <6>[ 0.376537] CPU: All CPU(s) started at EL2
5690 09:56:54.895422 <6>[ 0.380879] alternatives: applying system-wide alternatives
5691 09:56:54.898397 <6>[ 0.388878] devtmpfs: initialized
5692 09:56:54.913352 <6>[ 0.397846] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5693 09:56:54.923790 <6>[ 0.407794] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5694 09:56:54.927137 <6>[ 0.415523] pinctrl core: initialized pinctrl subsystem
5695 09:56:54.934844 <6>[ 0.422629] DMI not present or invalid.
5696 09:56:54.941627 <6>[ 0.426999] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5697 09:56:54.948612 <6>[ 0.433902] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5698 09:56:54.958423 <6>[ 0.441433] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5699 09:56:54.965210 <6>[ 0.449683] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5700 09:56:54.971253 <6>[ 0.457861] audit: initializing netlink subsys (disabled)
5701 09:56:54.978616 <5>[ 0.463565] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5702 09:56:54.984754 <6>[ 0.464546] thermal_sys: Registered thermal governor 'step_wise'
5703 09:56:54.991410 <6>[ 0.471531] thermal_sys: Registered thermal governor 'power_allocator'
5704 09:56:54.994771 <6>[ 0.477830] cpuidle: using governor menu
5705 09:56:55.001128 <6>[ 0.488791] NET: Registered PF_QIPCRTR protocol family
5706 09:56:55.008142 <6>[ 0.494286] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5707 09:56:55.014801 <6>[ 0.501381] ASID allocator initialised with 32768 entries
5708 09:56:55.021048 <6>[ 0.508147] Serial: AMBA PL011 UART driver
5709 09:56:55.030793 <4>[ 0.518558] Trying to register duplicate clock ID: 113
5710 09:56:55.090417 <6>[ 0.574749] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5711 09:56:55.104667 <6>[ 0.589091] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5712 09:56:55.108514 <6>[ 0.598847] KASLR enabled
5713 09:56:55.122634 <6>[ 0.606855] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5714 09:56:55.129250 <6>[ 0.613857] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5715 09:56:55.136033 <6>[ 0.620334] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5716 09:56:55.142779 <6>[ 0.627325] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5717 09:56:55.149370 <6>[ 0.633798] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5718 09:56:55.155738 <6>[ 0.640788] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5719 09:56:55.162839 <6>[ 0.647260] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5720 09:56:55.169143 <6>[ 0.654251] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5721 09:56:55.172240 <6>[ 0.661817] ACPI: Interpreter disabled.
5722 09:56:55.182133 <6>[ 0.669810] iommu: Default domain type: Translated
5723 09:56:55.188959 <6>[ 0.674916] iommu: DMA domain TLB invalidation policy: strict mode
5724 09:56:55.192141 <5>[ 0.681545] SCSI subsystem initialized
5725 09:56:55.198911 <6>[ 0.685962] usbcore: registered new interface driver usbfs
5726 09:56:55.205652 <6>[ 0.691689] usbcore: registered new interface driver hub
5727 09:56:55.208891 <6>[ 0.697231] usbcore: registered new device driver usb
5728 09:56:55.215690 <6>[ 0.703532] pps_core: LinuxPPS API ver. 1 registered
5729 09:56:55.226119 <6>[ 0.708717] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5730 09:56:55.229819 <6>[ 0.718042] PTP clock support registered
5731 09:56:55.232842 <6>[ 0.722295] EDAC MC: Ver: 3.0.0
5732 09:56:55.240246 <6>[ 0.727939] FPGA manager framework
5733 09:56:55.243427 <6>[ 0.731622] Advanced Linux Sound Architecture Driver Initialized.
5734 09:56:55.247469 <6>[ 0.738374] vgaarb: loaded
5735 09:56:55.254072 <6>[ 0.741502] clocksource: Switched to clocksource arch_sys_counter
5736 09:56:55.260868 <5>[ 0.747934] VFS: Disk quotas dquot_6.6.0
5737 09:56:55.267364 <6>[ 0.752109] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5738 09:56:55.270918 <6>[ 0.759283] pnp: PnP ACPI: disabled
5739 09:56:55.278405 <6>[ 0.766178] NET: Registered PF_INET protocol family
5740 09:56:55.285690 <6>[ 0.771410] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5741 09:56:55.297355 <6>[ 0.781324] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5742 09:56:55.307097 <6>[ 0.790077] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5743 09:56:55.313559 <6>[ 0.798027] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5744 09:56:55.320571 <6>[ 0.806259] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5745 09:56:55.326955 <6>[ 0.814353] TCP: Hash tables configured (established 32768 bind 32768)
5746 09:56:55.334110 <6>[ 0.821177] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5747 09:56:55.344217 <6>[ 0.828147] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5748 09:56:55.347363 <6>[ 0.835627] NET: Registered PF_UNIX/PF_LOCAL protocol family
5749 09:56:55.354353 <6>[ 0.841722] RPC: Registered named UNIX socket transport module.
5750 09:56:55.360803 <6>[ 0.847865] RPC: Registered udp transport module.
5751 09:56:55.364155 <6>[ 0.852790] RPC: Registered tcp transport module.
5752 09:56:55.370928 <6>[ 0.857713] RPC: Registered tcp NFSv4.1 backchannel transport module.
5753 09:56:55.377397 <6>[ 0.864364] PCI: CLS 0 bytes, default 64
5754 09:56:55.381055 <6>[ 0.868648] Unpacking initramfs...
5755 09:56:55.393957 <6>[ 0.878063] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5756 09:56:55.403714 <6>[ 0.886681] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5757 09:56:55.407118 <6>[ 0.895526] kvm [1]: IPA Size Limit: 40 bits
5758 09:56:55.413977 <6>[ 0.901853] kvm [1]: vgic-v2@c420000
5759 09:56:55.417330 <6>[ 0.905667] kvm [1]: GIC system register CPU interface enabled
5760 09:56:55.424139 <6>[ 0.911841] kvm [1]: vgic interrupt IRQ18
5761 09:56:55.427640 <6>[ 0.916203] kvm [1]: Hyp mode initialized successfully
5762 09:56:55.435182 <5>[ 0.922476] Initialise system trusted keyrings
5763 09:56:55.441707 <6>[ 0.927308] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5764 09:56:55.449898 <6>[ 0.937248] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5765 09:56:55.456384 <5>[ 0.943724] NFS: Registering the id_resolver key type
5766 09:56:55.459835 <5>[ 0.949032] Key type id_resolver registered
5767 09:56:55.466288 <5>[ 0.953445] Key type id_legacy registered
5768 09:56:55.473129 <6>[ 0.957757] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5769 09:56:55.479389 <6>[ 0.964679] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5770 09:56:55.486306 <6>[ 0.972454] 9p: Installing v9fs 9p2000 file system support
5771 09:56:55.513824 <5>[ 1.001531] Key type asymmetric registered
5772 09:56:55.517203 <5>[ 1.005875] Asymmetric key parser 'x509' registered
5773 09:56:55.527283 <6>[ 1.011040] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5774 09:56:55.530790 <6>[ 1.018654] io scheduler mq-deadline registered
5775 09:56:55.533647 <6>[ 1.023409] io scheduler kyber registered
5776 09:56:55.556866 <6>[ 1.044291] EINJ: ACPI disabled.
5777 09:56:55.563233 <4>[ 1.048094] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5778 09:56:55.601499 <6>[ 1.089070] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5779 09:56:55.610079 <6>[ 1.097612] printk: console [ttyS0] disabled
5780 09:56:55.638665 <6>[ 1.122256] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5781 09:56:55.644474 <6>[ 1.131732] printk: console [ttyS0] enabled
5782 09:56:55.647905 <6>[ 1.131732] printk: console [ttyS0] enabled
5783 09:56:55.654840 <6>[ 1.140650] printk: bootconsole [mtk8250] disabled
5784 09:56:55.658105 <6>[ 1.140650] printk: bootconsole [mtk8250] disabled
5785 09:56:55.667841 <3>[ 1.151194] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5786 09:56:55.674429 <3>[ 1.159576] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5787 09:56:55.703726 <6>[ 1.187988] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5788 09:56:55.710560 <6>[ 1.197649] serial serial0: tty port ttyS1 registered
5789 09:56:55.716994 <6>[ 1.204250] SuperH (H)SCI(F) driver initialized
5790 09:56:55.720706 <6>[ 1.209773] msm_serial: driver initialized
5791 09:56:55.736053 <6>[ 1.220096] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5792 09:56:55.745947 <6>[ 1.228694] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5793 09:56:55.752470 <6>[ 1.237269] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5794 09:56:55.762569 <6>[ 1.245841] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5795 09:56:55.768853 <6>[ 1.254498] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5796 09:56:55.778948 <6>[ 1.263156] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5797 09:56:55.789175 <6>[ 1.271895] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5798 09:56:55.795979 <6>[ 1.280634] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5799 09:56:55.805904 <6>[ 1.289198] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5800 09:56:55.812382 <6>[ 1.297999] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5801 09:56:55.822985 <4>[ 1.310409] cacheinfo: Unable to detect cache hierarchy for CPU 0
5802 09:56:55.832344 <6>[ 1.319820] loop: module loaded
5803 09:56:55.844318 <6>[ 1.331772] vsim1: Bringing 1800000uV into 2700000-2700000uV
5804 09:56:55.861826 <6>[ 1.349787] megasas: 07.719.03.00-rc1
5805 09:56:55.870694 <6>[ 1.358527] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5806 09:56:55.881486 <6>[ 1.368880] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5807 09:56:55.898443 <6>[ 1.385607] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5808 09:56:55.954877 <6>[ 1.435707] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5809 09:56:55.991144 <6>[ 1.478826] Freeing initrd memory: 18296K
5810 09:56:56.006338 <4>[ 1.490653] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5811 09:56:56.013458 <4>[ 1.499882] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5812 09:56:56.019942 <4>[ 1.506582] Hardware name: Google juniper sku16 board (DT)
5813 09:56:56.023262 <4>[ 1.512320] Call trace:
5814 09:56:56.026954 <4>[ 1.515021] dump_backtrace.part.0+0xe0/0xf0
5815 09:56:56.029946 <4>[ 1.519557] show_stack+0x18/0x30
5816 09:56:56.033394 <4>[ 1.523130] dump_stack_lvl+0x68/0x84
5817 09:56:56.036958 <4>[ 1.527051] dump_stack+0x18/0x34
5818 09:56:56.043345 <4>[ 1.530621] sysfs_warn_dup+0x64/0x80
5819 09:56:56.046682 <4>[ 1.534543] sysfs_do_create_link_sd+0xf0/0x100
5820 09:56:56.049971 <4>[ 1.539330] sysfs_create_link+0x20/0x40
5821 09:56:56.056537 <4>[ 1.543510] bus_add_device+0x68/0x10c
5822 09:56:56.060064 <4>[ 1.547516] device_add+0x340/0x7ac
5823 09:56:56.062990 <4>[ 1.551259] of_device_add+0x44/0x60
5824 09:56:56.066329 <4>[ 1.555093] of_platform_device_create_pdata+0x90/0x120
5825 09:56:56.073208 <4>[ 1.560575] of_platform_bus_create+0x170/0x370
5826 09:56:56.076564 <4>[ 1.565361] of_platform_populate+0x50/0xfc
5827 09:56:56.083037 <4>[ 1.569801] parse_mtd_partitions+0x1dc/0x510
5828 09:56:56.086246 <4>[ 1.574415] mtd_device_parse_register+0xf8/0x2e0
5829 09:56:56.089838 <4>[ 1.579373] spi_nor_probe+0x21c/0x2f0
5830 09:56:56.093263 <4>[ 1.583378] spi_mem_probe+0x6c/0xb0
5831 09:56:56.096472 <4>[ 1.587211] spi_probe+0x84/0xe4
5832 09:56:56.103091 <4>[ 1.590693] really_probe+0xbc/0x2e0
5833 09:56:56.106685 <4>[ 1.594523] __driver_probe_device+0x78/0x11c
5834 09:56:56.110123 <4>[ 1.599135] driver_probe_device+0xd8/0x160
5835 09:56:56.116744 <4>[ 1.603573] __device_attach_driver+0xb8/0x134
5836 09:56:56.120082 <4>[ 1.608272] bus_for_each_drv+0x78/0xd0
5837 09:56:56.123331 <4>[ 1.612362] __device_attach+0xa8/0x1c0
5838 09:56:56.129789 <4>[ 1.616453] device_initial_probe+0x14/0x20
5839 09:56:56.133362 <4>[ 1.620891] bus_probe_device+0x9c/0xa4
5840 09:56:56.136638 <4>[ 1.624981] device_add+0x3ac/0x7ac
5841 09:56:56.140066 <4>[ 1.628723] __spi_add_device+0x78/0x120
5842 09:56:56.143461 <4>[ 1.632902] spi_add_device+0x40/0x7c
5843 09:56:56.150115 <4>[ 1.636819] spi_register_controller+0x610/0xad0
5844 09:56:56.153591 <4>[ 1.641692] devm_spi_register_controller+0x4c/0xa4
5845 09:56:56.156902 <4>[ 1.646826] mtk_spi_probe+0x3f8/0x650
5846 09:56:56.163239 <4>[ 1.650830] platform_probe+0x68/0xe0
5847 09:56:56.166555 <4>[ 1.654748] really_probe+0xbc/0x2e0
5848 09:56:56.169769 <4>[ 1.658578] __driver_probe_device+0x78/0x11c
5849 09:56:56.176720 <4>[ 1.663190] driver_probe_device+0xd8/0x160
5850 09:56:56.180007 <4>[ 1.667627] __driver_attach+0x94/0x19c
5851 09:56:56.183423 <4>[ 1.671718] bus_for_each_dev+0x70/0xd0
5852 09:56:56.186554 <4>[ 1.675808] driver_attach+0x24/0x30
5853 09:56:56.190029 <4>[ 1.679638] bus_add_driver+0x154/0x20c
5854 09:56:56.196523 <4>[ 1.683728] driver_register+0x78/0x130
5855 09:56:56.199998 <4>[ 1.687819] __platform_driver_register+0x28/0x34
5856 09:56:56.203173 <4>[ 1.692779] mtk_spi_driver_init+0x1c/0x28
5857 09:56:56.210315 <4>[ 1.697132] do_one_initcall+0x50/0x1d0
5858 09:56:56.213530 <4>[ 1.701223] kernel_init_freeable+0x21c/0x288
5859 09:56:56.216509 <4>[ 1.705836] kernel_init+0x24/0x12c
5860 09:56:56.220095 <4>[ 1.709581] ret_from_fork+0x10/0x20
5861 09:56:56.230854 <6>[ 1.718512] tun: Universal TUN/TAP device driver, 1.6
5862 09:56:56.234452 <6>[ 1.724799] thunder_xcv, ver 1.0
5863 09:56:56.238076 <6>[ 1.728315] thunder_bgx, ver 1.0
5864 09:56:56.241243 <6>[ 1.731817] nicpf, ver 1.0
5865 09:56:56.252105 <6>[ 1.736194] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5866 09:56:56.255316 <6>[ 1.743679] hns3: Copyright (c) 2017 Huawei Corporation.
5867 09:56:56.258592 <6>[ 1.749275] hclge is initializing
5868 09:56:56.265437 <6>[ 1.752860] e1000: Intel(R) PRO/1000 Network Driver
5869 09:56:56.271973 <6>[ 1.757995] e1000: Copyright (c) 1999-2006 Intel Corporation.
5870 09:56:56.275468 <6>[ 1.764016] e1000e: Intel(R) PRO/1000 Network Driver
5871 09:56:56.282032 <6>[ 1.769237] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5872 09:56:56.288629 <6>[ 1.775432] igb: Intel(R) Gigabit Ethernet Network Driver
5873 09:56:56.295512 <6>[ 1.781087] igb: Copyright (c) 2007-2014 Intel Corporation.
5874 09:56:56.302072 <6>[ 1.786930] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5875 09:56:56.305428 <6>[ 1.793453] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5876 09:56:56.312412 <6>[ 1.800006] sky2: driver version 1.30
5877 09:56:56.319151 <6>[ 1.805255] usbcore: registered new device driver r8152-cfgselector
5878 09:56:56.325904 <6>[ 1.811797] usbcore: registered new interface driver r8152
5879 09:56:56.329069 <6>[ 1.817627] VFIO - User Level meta-driver version: 0.3
5880 09:56:56.337954 <6>[ 1.825423] mtu3 11201000.usb: uwk - reg:0x420, version:101
5881 09:56:56.344736 <4>[ 1.831295] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5882 09:56:56.351237 <6>[ 1.838568] mtu3 11201000.usb: dr_mode: 1, drd: auto
5883 09:56:56.357885 <6>[ 1.843794] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5884 09:56:56.361399 <6>[ 1.849977] mtu3 11201000.usb: usb3-drd: 0
5885 09:56:56.371125 <6>[ 1.855536] mtu3 11201000.usb: xHCI platform device register success...
5886 09:56:56.377864 <4>[ 1.864205] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5887 09:56:56.384839 <6>[ 1.872169] xhci-mtk 11200000.usb: xHCI Host Controller
5888 09:56:56.391262 <6>[ 1.877679] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5889 09:56:56.397834 <6>[ 1.885400] xhci-mtk 11200000.usb: USB3 root hub has no ports
5890 09:56:56.408259 <6>[ 1.891410] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5891 09:56:56.414766 <6>[ 1.900838] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5892 09:56:56.421404 <6>[ 1.906922] xhci-mtk 11200000.usb: xHCI Host Controller
5893 09:56:56.427962 <6>[ 1.912411] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5894 09:56:56.434728 <6>[ 1.920068] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5895 09:56:56.438190 <6>[ 1.926890] hub 1-0:1.0: USB hub found
5896 09:56:56.441465 <6>[ 1.930918] hub 1-0:1.0: 1 port detected
5897 09:56:56.452380 <6>[ 1.936276] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5898 09:56:56.455421 <6>[ 1.944891] hub 2-0:1.0: USB hub found
5899 09:56:56.462170 <3>[ 1.948918] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5900 09:56:56.469224 <6>[ 1.956802] usbcore: registered new interface driver usb-storage
5901 09:56:56.475842 <6>[ 1.963417] usbcore: registered new device driver onboard-usb-hub
5902 09:56:56.493727 <4>[ 1.977602] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5903 09:56:56.502435 <6>[ 1.989946] mt6397-rtc mt6358-rtc: registered as rtc0
5904 09:56:56.512575 <6>[ 1.995425] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-18T09:56:56 UTC (1718704616)
5905 09:56:56.515752 <6>[ 2.005327] i2c_dev: i2c /dev entries driver
5906 09:56:56.527945 <6>[ 2.011766] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5907 09:56:56.538059 <6>[ 2.020083] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5908 09:56:56.541511 <6>[ 2.028990] i2c 4-0058: Fixed dependency cycle(s) with /panel
5909 09:56:56.547830 <6>[ 2.035027] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5910 09:56:56.558416 <3>[ 2.042493] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5911 09:56:56.574818 <6>[ 2.062404] cpu cpu0: EM: created perf domain
5912 09:56:56.584662 <6>[ 2.067922] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5913 09:56:56.591427 <6>[ 2.079217] cpu cpu4: EM: created perf domain
5914 09:56:56.598360 <6>[ 2.086011] sdhci: Secure Digital Host Controller Interface driver
5915 09:56:56.605201 <6>[ 2.092466] sdhci: Copyright(c) Pierre Ossman
5916 09:56:56.612273 <6>[ 2.097863] Synopsys Designware Multimedia Card Interface Driver
5917 09:56:56.615405 <6>[ 2.098351] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5918 09:56:56.622161 <6>[ 2.104939] sdhci-pltfm: SDHCI platform and OF driver helper
5919 09:56:56.630280 <6>[ 2.117454] ledtrig-cpu: registered to indicate activity on CPUs
5920 09:56:56.637726 <6>[ 2.125168] usbcore: registered new interface driver usbhid
5921 09:56:56.641037 <6>[ 2.131008] usbhid: USB HID core driver
5922 09:56:56.651874 <6>[ 2.135326] spi_master spi2: will run message pump with realtime priority
5923 09:56:56.655867 <4>[ 2.135480] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5924 09:56:56.665964 <4>[ 2.149624] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5925 09:56:56.675731 <6>[ 2.153268] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5926 09:56:56.695111 <6>[ 2.172610] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5927 09:56:56.701732 <4>[ 2.181754] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5928 09:56:56.705339 <6>[ 2.193450] cros-ec-spi spi2.0: Chrome EC device registered
5929 09:56:56.716464 <4>[ 2.200751] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5930 09:56:56.728353 <4>[ 2.212473] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5931 09:56:56.734929 <4>[ 2.221518] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5932 09:56:56.747548 <6>[ 2.231817] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5933 09:56:56.764388 <6>[ 2.251963] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5934 09:56:56.771164 <6>[ 2.258252] mmc0: new HS400 MMC card at address 0001
5935 09:56:56.777878 <6>[ 2.264841] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5936 09:56:56.788109 <6>[ 2.275398] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5937 09:56:56.797918 <6>[ 2.275594] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5938 09:56:56.801262 <6>[ 2.284609] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5939 09:56:56.814683 <6>[ 2.293992] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5940 09:56:56.821306 <6>[ 2.307084] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5941 09:56:56.824328 <6>[ 2.307881] NET: Registered PF_PACKET protocol family
5942 09:56:56.838134 <6>[ 2.310597] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5943 09:56:56.841303 <6>[ 2.329914] 9pnet: Installing 9P2000 support
5944 09:56:56.851046 <6>[ 2.330008] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5945 09:56:56.858090 <6>[ 2.330396] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5946 09:56:56.861253 <5>[ 2.334482] Key type dns_resolver registered
5947 09:56:56.868903 <6>[ 2.355991] registered taskstats version 1
5948 09:56:56.871771 <5>[ 2.360365] Loading compiled-in X.509 certificates
5949 09:56:56.878296 <6>[ 2.365518] usb 1-1: new high-speed USB device number 2 using xhci-mtk
5950 09:56:56.911028 <3>[ 2.395114] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
5951 09:56:56.943197 <6>[ 2.424092] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5952 09:56:56.954490 <6>[ 2.438420] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
5953 09:56:56.964020 <6>[ 2.447025] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
5954 09:56:56.970810 <6>[ 2.455682] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
5955 09:56:56.980944 <6>[ 2.464249] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
5956 09:56:56.987653 <6>[ 2.472770] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
5957 09:56:56.997461 <6>[ 2.481290] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
5958 09:56:57.007250 <6>[ 2.489809] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
5959 09:56:57.013870 <6>[ 2.499168] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
5960 09:56:57.020229 <6>[ 2.506719] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
5961 09:56:57.027041 <6>[ 2.514020] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
5962 09:56:57.033788 <6>[ 2.521254] hub 1-1:1.0: USB hub found
5963 09:56:57.040487 <6>[ 2.521315] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
5964 09:56:57.043946 <6>[ 2.525738] hub 1-1:1.0: 3 ports detected
5965 09:56:57.050497 <6>[ 2.532727] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
5966 09:56:57.057128 <6>[ 2.544646] panfrost 13040000.gpu: clock rate = 511999970
5967 09:56:57.067140 <6>[ 2.550346] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
5968 09:56:57.076896 <6>[ 2.560308] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
5969 09:56:57.083499 <6>[ 2.568317] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
5970 09:56:57.097105 <6>[ 2.576754] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
5971 09:56:57.103707 <6>[ 2.588832] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
5972 09:56:57.116134 <6>[ 2.600145] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
5973 09:56:57.126014 <6>[ 2.608930] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
5974 09:56:57.136053 <6>[ 2.618079] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
5975 09:56:57.142948 <6>[ 2.627210] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
5976 09:56:57.152704 <6>[ 2.636337] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
5977 09:56:57.162459 <6>[ 2.645638] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
5978 09:56:57.172505 <6>[ 2.654937] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
5979 09:56:57.182466 <6>[ 2.664410] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
5980 09:56:57.189154 <6>[ 2.673884] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
5981 09:56:57.198706 <6>[ 2.683010] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
5982 09:56:57.272902 <6>[ 2.757288] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
5983 09:56:57.282934 <6>[ 2.766177] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
5984 09:56:57.293318 <6>[ 2.777520] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
5985 09:56:57.341324 <6>[ 2.825542] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
5986 09:56:57.450100 <6>[ 2.937322] hub 1-1.1:1.0: USB hub found
5987 09:56:57.453122 <6>[ 2.941881] hub 1-1.1:1.0: 4 ports detected
5988 09:56:57.992771 <6>[ 3.463698] Console: switching to colour frame buffer device 170x48
5989 09:56:58.002545 <6>[ 3.486937] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
5990 09:56:58.028618 <6>[ 3.509470] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5991 09:56:58.047920 <6>[ 3.528872] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5992 09:56:58.054618 <6>[ 3.541454] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
5993 09:56:58.065878 <6>[ 3.550008] input: volume-buttons as /devices/platform/volume-buttons/input/input5
5994 09:56:58.075703 <6>[ 3.557395] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5995 09:56:58.093952 <6>[ 3.577570] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
5996 09:56:58.103398 <6>[ 3.578104] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5997 09:56:58.109821 <6>[ 3.595954] Trying to probe devices needed for running init ...
5998 09:56:58.127248 <3>[ 3.611435] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: could not get audiosys reset:-517
5999 09:56:58.146046 <6>[ 3.627078] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6000 09:56:58.301813 <6>[ 3.785534] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6001 09:56:58.489699 <6>[ 3.973880] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6002 09:56:58.615020 <4>[ 4.098703] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6003 09:56:58.624820 <4>[ 4.107958] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6004 09:56:58.676241 <6>[ 4.163761] r8152 1-1.2:1.0 eth0: v1.12.13
6005 09:56:58.689809 <6>[ 4.173829] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6006 09:56:58.707520 <6>[ 4.188647] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6007 09:56:58.730165 <6>[ 4.211251] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6008 09:56:58.834800 <4>[ 4.318960] r8152 1-1.1.1:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6009 09:56:58.849615 <4>[ 4.333393] r8152 1-1.1.1:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6010 09:56:58.912227 <6>[ 4.399704] r8152 1-1.1.1:1.0 eth1: v1.12.13
6011 09:56:58.924770 <6>[ 4.409250] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6012 09:56:58.949740 <6>[ 4.430537] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6013 09:56:59.065048 <6>[ 4.545954] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6014 09:57:00.282947 <6>[ 5.770395] r8152 1-1.2:1.0 eth0: carrier on
6015 09:57:02.421979 <5>[ 5.797529] Sending DHCP requests .., OK
6016 09:57:02.434409 <6>[ 7.918810] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6017 09:57:02.444604 <6>[ 7.932067] IP-Config: Complete:
6018 09:57:02.459464 <6>[ 7.940434] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6019 09:57:02.471950 <6>[ 7.956220] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6020 09:57:02.485466 <6>[ 7.969476] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6021 09:57:02.492690 <6>[ 7.969484] nameserver0=192.168.201.1
6022 09:57:02.514902 <6>[ 8.002520] clk: Disabling unused clocks
6023 09:57:02.521954 <6>[ 8.012581] ALSA device list:
6024 09:57:02.532839 <6>[ 8.020623] No soundcards found.
6025 09:57:02.546633 <6>[ 8.034352] Freeing unused kernel memory: 8512K
6026 09:57:02.555801 <6>[ 8.043220] Run /init as init process
6027 09:57:02.568646 Loading, please wait...
6028 09:57:02.600465 Starting systemd-udevd version 252.22-1~deb12u1
6029 09:57:02.908325 <3>[ 8.395680] mtk-scp 10500000.scp: invalid resource
6030 09:57:02.914870 <6>[ 8.396572] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6031 09:57:02.925206 <6>[ 8.400822] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6032 09:57:02.934960 <6>[ 8.405550] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6033 09:57:02.944929 <4>[ 8.415589] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6034 09:57:02.951885 <6>[ 8.419664] remoteproc remoteproc0: scp is available
6035 09:57:02.961945 <3>[ 8.427585] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6036 09:57:02.968527 <4>[ 8.431296] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6037 09:57:02.978349 <6>[ 8.431298] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6038 09:57:02.985130 <4>[ 8.431412] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6039 09:57:02.994916 <6>[ 8.434648] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6040 09:57:03.004718 <4>[ 8.437260] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6041 09:57:03.018135 <3>[ 8.438706] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6042 09:57:03.024644 <3>[ 8.442615] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6043 09:57:03.031108 <6>[ 8.452558] remoteproc remoteproc0: powering up scp
6044 09:57:03.041272 <3>[ 8.460039] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6045 09:57:03.051398 <4>[ 8.469828] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6046 09:57:03.057714 <3>[ 8.477249] elan_i2c 2-0015: Error applying setting, reverse things back
6047 09:57:03.065809 <6>[ 8.485493] mc: Linux media interface: v0.10
6048 09:57:03.075715 <5>[ 8.485902] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6049 09:57:03.082346 <3>[ 8.488046] remoteproc remoteproc0: request_firmware failed: -2
6050 09:57:03.093869 <5>[ 8.500623] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6051 09:57:03.100041 <6>[ 8.511502] cs_system_cfg: CoreSight Configuration manager initialised
6052 09:57:03.111144 <5>[ 8.518230] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6053 09:57:03.121757 <3>[ 8.526703] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6054 09:57:03.128938 <6>[ 8.527914] videodev: Linux video capture interface: v2.00
6055 09:57:03.136770 <6>[ 8.533022] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6056 09:57:03.146586 <6>[ 8.624252] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6057 09:57:03.157144 <3>[ 8.630381] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6058 09:57:03.163591 <6>[ 8.631116] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6059 09:57:03.173282 <6>[ 8.651311] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6060 09:57:03.180063 <4>[ 8.657258] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6061 09:57:03.191697 <3>[ 8.657580] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6062 09:57:03.201545 <3>[ 8.657669] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6063 09:57:03.208009 <3>[ 8.657676] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6064 09:57:03.218375 <3>[ 8.657681] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6065 09:57:03.224848 <3>[ 8.657688] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6066 09:57:03.234663 <3>[ 8.657693] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6067 09:57:03.244500 <3>[ 8.657720] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6068 09:57:03.251516 <6>[ 8.673628] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6069 09:57:03.264881 <3>[ 8.676030] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6070 09:57:03.267763 <6>[ 8.677816] Bluetooth: Core ver 2.22
6071 09:57:03.274624 <6>[ 8.677876] NET: Registered PF_BLUETOOTH protocol family
6072 09:57:03.280943 <6>[ 8.677878] Bluetooth: HCI device and connection manager initialized
6073 09:57:03.284009 <6>[ 8.677891] Bluetooth: HCI socket layer initialized
6074 09:57:03.291154 <6>[ 8.677895] Bluetooth: L2CAP socket layer initialized
6075 09:57:03.297747 <6>[ 8.677902] Bluetooth: SCO socket layer initialized
6076 09:57:03.300457 <6>[ 8.679253] cfg80211: failed to load regulatory.db
6077 09:57:03.310914 <6>[ 8.684398] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6078 09:57:03.317900 Begin: Loading e<3>[ 8.694794] debugfs: File 'Playback' in directory 'dapm' already present!
6079 09:57:03.327637 <6>[ 8.702017] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6080 09:57:03.334164 <3>[ 8.709968] debugfs: File 'Capture' in directory 'dapm' already present!
6081 09:57:03.340947 <6>[ 8.712191] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6082 09:57:03.347921 <6>[ 8.726962] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6083 09:57:03.354296 <6>[ 8.728015] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6084 09:57:03.364269 <6>[ 8.729975] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6085 09:57:03.370535 ssential drivers<6>[ 8.736607] Bluetooth: HCI UART driver ver 2.3
6086 09:57:03.371054 ... done.
6087 09:57:03.384877 Begi<6>[ 8.737770] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6088 09:57:03.391269 n: Running /scri<6>[ 8.737995] usbcore: registered new interface driver uvcvideo
6089 09:57:03.400870 pts/init-premoun<6>[ 8.744487] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6090 09:57:03.401371 t ... done.
6091 09:57:03.411111 Beg<6>[ 8.744742] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video2 (81,2)
6092 09:57:03.417949 in: Mounting roo<6>[ 8.756135] Bluetooth: HCI UART protocol H4 registered
6093 09:57:03.424408 t file system ..<3>[ 8.760605] thermal_sys: Failed to find 'trips' node
6094 09:57:03.434253 . Begin: Running<6>[ 8.760778] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6095 09:57:03.441002 /scripts/nfs-to<6>[ 8.760955] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6096 09:57:03.444432 p ... done.
6097 09:57:03.451109 Beg<6>[ 8.761378] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6098 09:57:03.460824 in: Running /scr<6>[ 8.765514] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6099 09:57:03.467149 ipts/nfs-premoun<6>[ 8.765573] Bluetooth: HCI UART protocol LL registered
6100 09:57:03.473796 t ... Waiting up<6>[ 8.765589] Bluetooth: HCI UART protocol Three-wire (H5) registered
6101 09:57:03.484053 to 60 secs for <6>[ 8.765904] Bluetooth: HCI UART protocol Broadcom registered
6102 09:57:03.490337 any ethernet to <6>[ 8.765926] Bluetooth: HCI UART protocol QCA registered
6103 09:57:03.497099 become available<6>[ 8.765937] Bluetooth: HCI UART protocol Marvell registered
6104 09:57:03.497624
6105 09:57:03.504471 Device /sys/cl<6>[ 8.766955] Bluetooth: hci0: setting up ROME/QCA6390
6106 09:57:03.511230 ass/net/enx88541<3>[ 8.772079] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6107 09:57:03.514501 f0f7aca found
6108 09:57:03.521359 d<3>[ 8.772087] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6109 09:57:03.521881 one.
6110 09:57:03.534539 Begin: Wai<6>[ 8.803874] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6111 09:57:03.544561 ting up to 180 secs for any netw<4>[ 8.811424] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6112 09:57:03.551531 ork device to become available .<3>[ 8.812682] thermal_sys: Failed to find 'trips' node
6113 09:57:03.554547 .. done.
6114 09:57:03.564588 <6>[ 8.819357] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6115 09:57:03.570828 <3>[ 8.826297] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6116 09:57:03.585706 <6>[ 8.832811] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6117 09:57:03.595432 <3>[ 8.840629] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6118 09:57:03.605429 <4>[ 8.984225] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6119 09:57:03.612086 <4>[ 8.984225] Fallback method does not support PEC.
6120 09:57:03.618679 <3>[ 8.984393] Bluetooth: hci0: Frame reassembly failed (-84)
6121 09:57:03.629311 <4>[ 8.989001] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6122 09:57:03.638949 <3>[ 8.998139] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6123 09:57:03.648899 <6>[ 9.006175] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6124 09:57:03.736665 <3>[ 9.220584] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6125 09:57:03.746529 IP-Config: eth0 hardware address 00:e0:4c:68:03:2b mtu 1500 DHCP
6126 09:57:03.770681 <6>[ 9.258190] Bluetooth: hci0: QCA Product ID :0x00000008
6127 09:57:03.778675 <6>[ 9.266206] Bluetooth: hci0: QCA SOC Version :0x00000044
6128 09:57:03.788595 IP-Config: enx88541f0f7aca hardw<6>[ 9.274210] Bluetooth: hci0: QCA ROM Version :0x00000302
6129 09:57:03.798988 are address 88:54:1f:0f:7a:ca mt<6>[ 9.283283] Bluetooth: hci0: QCA Patch Version:0x00000111
6130 09:57:03.799446 u 1500 DHCP
6131 09:57:03.805514 <6>[ 9.292136] Bluetooth: hci0: QCA controller version 0x00440302
6132 09:57:03.815809 <6>[ 9.300020] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6133 09:57:03.825827 <4>[ 9.308687] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6134 09:57:03.835636 <3>[ 9.319827] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6135 09:57:03.842373 <3>[ 9.329907] Bluetooth: hci0: QCA Failed to download patch (-2)
6136 09:57:03.858760 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6137 09:57:03.865931 address: 192.168.201.17 broadcast: 192.168.201.255 netmask: 255.255.255.0
6138 09:57:03.872302 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6139 09:57:03.878792 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-5
6140 09:57:03.885283 domain : lava-rack
6141 09:57:03.888725 rootserver: 192.168.201.1 rootpath:
6142 09:57:03.891661 filename :
6143 09:57:03.927096 done.
6144 09:57:03.934767 Begin: Running /scripts/nfs-bottom ... done.
6145 09:57:03.946864 Begin: Running /scripts/init-bottom ... done.
6146 09:57:04.155605 <6>[ 9.639599] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6147 09:57:04.237915 <4>[ 9.722033] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6148 09:57:04.257292 <4>[ 9.741340] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6149 09:57:04.272440 <4>[ 9.756554] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6150 09:57:04.282509 <4>[ 9.769730] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6151 09:57:05.347472 <6>[ 10.835128] NET: Registered PF_INET6 protocol family
6152 09:57:05.359215 <6>[ 10.846805] Segment Routing with IPv6
6153 09:57:05.366124 <6>[ 10.853609] In-situ OAM (IOAM) with IPv6
6154 09:57:05.549516 <30>[ 11.010001] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6155 09:57:05.568152 <30>[ 11.055571] systemd[1]: Detected architecture arm64.
6156 09:57:05.581783
6157 09:57:05.585094 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6158 09:57:05.585619
6159 09:57:05.612627 <30>[ 11.099919] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6160 09:57:06.720964 <30>[ 12.204613] systemd[1]: Queued start job for default target graphical.target.
6161 09:57:06.759210 <30>[ 12.243147] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6162 09:57:06.772309 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6163 09:57:06.791707 <30>[ 12.275772] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6164 09:57:06.805358 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6165 09:57:06.823910 <30>[ 12.307920] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6166 09:57:06.838117 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6167 09:57:06.855052 <30>[ 12.339219] systemd[1]: Created slice user.slice - User and Session Slice.
6168 09:57:06.867307 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6169 09:57:06.889429 <30>[ 12.370105] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6170 09:57:06.902315 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6171 09:57:06.925235 <30>[ 12.406053] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6172 09:57:06.937927 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6173 09:57:06.964067 <30>[ 12.437879] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6174 09:57:06.983362 <30>[ 12.467270] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6175 09:57:06.990882 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6176 09:57:07.009950 <30>[ 12.493715] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6177 09:57:07.022717 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6178 09:57:07.041632 <30>[ 12.525759] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6179 09:57:07.056032 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6180 09:57:07.070376 <30>[ 12.557814] systemd[1]: Reached target paths.target - Path Units.
6181 09:57:07.085186 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6182 09:57:07.101385 <30>[ 12.585721] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6183 09:57:07.113781 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6184 09:57:07.126870 <30>[ 12.613682] systemd[1]: Reached target slices.target - Slice Units.
6185 09:57:07.140912 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6186 09:57:07.154422 <30>[ 12.641720] systemd[1]: Reached target swap.target - Swaps.
6187 09:57:07.165062 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6188 09:57:07.185815 <30>[ 12.669762] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6189 09:57:07.199160 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6190 09:57:07.217986 <30>[ 12.702132] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6191 09:57:07.232031 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6192 09:57:07.252781 <30>[ 12.736635] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6193 09:57:07.266431 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6194 09:57:07.283223 <30>[ 12.767421] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6195 09:57:07.297772 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6196 09:57:07.314621 <30>[ 12.798480] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6197 09:57:07.326488 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6198 09:57:07.347436 <30>[ 12.831571] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6199 09:57:07.361407 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6200 09:57:07.380996 <30>[ 12.864962] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6201 09:57:07.394196 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6202 09:57:07.410011 <30>[ 12.894287] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6203 09:57:07.423222 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6204 09:57:07.473810 <30>[ 12.957926] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6205 09:57:07.486650 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6206 09:57:07.511629 <30>[ 12.995687] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6207 09:57:07.523492 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6208 09:57:07.545526 <30>[ 13.029601] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6209 09:57:07.557561 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6210 09:57:07.580690 <30>[ 13.058319] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6211 09:57:07.622107 <30>[ 13.106295] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6212 09:57:07.636080 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6213 09:57:07.659204 <30>[ 13.143276] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6214 09:57:07.670757 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6215 09:57:07.700443 <30>[ 13.184241] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6216 09:57:07.711133 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6217 09:57:07.733730 <30>[ 13.217889] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6218 09:57:07.748310 Starting [0;1;39mmodprobe@drm.service<6>[ 13.232907] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6219 09:57:07.751658 [0m - Load Kernel Module drm...
6220 09:57:07.802607 <30>[ 13.286717] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6221 09:57:07.815623 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6222 09:57:07.862324 <30>[ 13.346414] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6223 09:57:07.874082 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6224 09:57:07.899969 <30>[ 13.384149] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6225 09:57:07.913728 Starting [0;1;39mmodprobe@loop.ser…e<6>[ 13.401699] fuse: init (API version 7.37)
6226 09:57:07.916919 [0m - Load Kernel Module loop...
6227 09:57:07.958833 <30>[ 13.442762] systemd[1]: Starting systemd-journald.service - Journal Service...
6228 09:57:07.968919 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6229 09:57:08.002550 <30>[ 13.486457] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6230 09:57:08.015547 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6231 09:57:08.041359 <30>[ 13.522086] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6232 09:57:08.053557 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6233 09:57:08.122718 <30>[ 13.606929] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6234 09:57:08.137521 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6235 09:57:08.163501 <30>[ 13.647290] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6236 09:57:08.175479 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6237 09:57:08.199276 <30>[ 13.683271] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6238 09:57:08.209179 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6239 09:57:08.226078 <30>[ 13.710292] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6240 09:57:08.245451 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue <3>[ 13.727746] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6241 09:57:08.245901 File System.
6242 09:57:08.260481 <3>[ 13.744323] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6243 09:57:08.267833 <30>[ 13.753609] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6244 09:57:08.280752 <3>[ 13.762187] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6245 09:57:08.298614 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 13.780475] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6246 09:57:08.299078 File System.
6247 09:57:08.313458 <3>[ 13.797366] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6248 09:57:08.324296 <30>[ 13.806676] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6249 09:57:08.331298 <3>[ 13.813373] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6250 09:57:08.352592 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static D<3>[ 13.835350] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6251 09:57:08.353148 evice Nodes.
6252 09:57:08.368420 <3>[ 13.851944] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6253 09:57:08.375951 <30>[ 13.861663] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6254 09:57:08.388568 <30>[ 13.872097] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6255 09:57:08.399427 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6256 09:57:08.418321 <30>[ 13.902497] systemd[1]: Started systemd-journald.service - Journal Service.
6257 09:57:08.429577 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6258 09:57:08.450902 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6259 09:57:08.476554 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6260 09:57:08.496557 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6261 09:57:08.516278 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6262 09:57:08.536563 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6263 09:57:08.555730 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6264 09:57:08.575714 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6265 09:57:08.595448 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6266 09:57:08.616822 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6267 09:57:08.664510 <4>[ 14.151280] power_supply_show_property: 2 callbacks suppressed
6268 09:57:08.675046 <3>[ 14.151289] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6269 09:57:08.681784 <3>[ 14.164384] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6270 09:57:08.699452 <4>[ 14.166333] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6271 09:57:08.706069 <3>[ 14.180510] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6272 09:57:08.718633 <3>[ 14.190909] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6273 09:57:08.742096 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6274 09:57:08.748800 <3>[ 14.232136] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6275 09:57:08.767361 Mounting [0;1;39msys-kernel-config…ernel Configurati<3>[ 14.252061] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6276 09:57:08.770505 on File System...
6277 09:57:08.788555 <3>[ 14.271999] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6278 09:57:08.805870 Starting [0;1;39msystemd-journal-f…h Journal to Pers<3>[ 14.290298] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6279 09:57:08.809108 istent Storage...
6280 09:57:08.823438 <3>[ 14.307225] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6281 09:57:08.841897 Starting [0;1;39msyste<3>[ 14.323584] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6282 09:57:08.845230 md-random-se…ice[0m - Load/Save Random Seed...
6283 09:57:08.859695 <3>[ 14.343398] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6284 09:57:08.881381 Startin<46>[ 14.365813] systemd-journald[315]: Received client request to flush runtime journal.
6285 09:57:08.887783 g [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6286 09:57:08.934549 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6287 09:57:09.208891 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6288 09:57:09.228058 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6289 09:57:09.247270 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6290 09:57:09.269079 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6291 09:57:09.661610 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6292 09:57:10.290620 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6293 09:57:10.342596 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6294 09:57:10.385091 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6295 09:57:10.488217 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6296 09:57:10.506562 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6297 09:57:10.525984 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6298 09:57:10.574425 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6299 09:57:10.603486 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6300 09:57:10.897592 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6301 09:57:10.919414 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6302 09:57:10.970495 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6303 09:57:11.149434 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6304 09:57:11.217743 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6305 09:57:11.287547 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6306 09:57:11.469488 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6307 09:57:11.522274 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6308 09:57:11.541356 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6309 09:57:11.561438 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6310 09:57:11.578259 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6311 09:57:11.630348 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6312 09:57:11.654977 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6313 09:57:11.675128 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6314 09:57:11.696323 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6315 09:57:11.712662 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6316 09:57:11.730029 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6317 09:57:11.746198 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6318 09:57:11.762151 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6319 09:57:11.799343 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6320 09:57:11.821663 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6321 09:57:11.838777 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6322 09:57:11.857288 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6323 09:57:11.877719 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6324 09:57:11.893783 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6325 09:57:11.913991 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6326 09:57:11.930344 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6327 09:57:11.946070 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6328 09:57:11.984698 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6329 09:57:12.039984 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6330 09:57:12.138995 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6331 09:57:12.164791 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6332 09:57:12.186299 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6333 09:57:12.346631 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6334 09:57:12.399446 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6335 09:57:12.419907 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6336 09:57:12.440062 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6337 09:57:12.461667 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6338 09:57:12.479194 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6339 09:57:12.512416 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6340 09:57:12.535893 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6341 09:57:12.557720 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6342 09:57:12.575877 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6343 09:57:12.619915 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6344 09:57:12.672552 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6345 09:57:12.791426
6346 09:57:12.794599 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6347 09:57:12.795025
6348 09:57:12.797956 debian-bookworm-arm64 login: root (automatic login)
6349 09:57:12.798418
6350 09:57:13.035658 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 18 09:11:54 UTC 2024 aarch64
6351 09:57:13.035780
6352 09:57:13.042125 The programs included with the Debian GNU/Linux system are free software;
6353 09:57:13.049218 the exact distribution terms for each program are described in the
6354 09:57:13.052349 individual files in /usr/share/doc/*/copyright.
6355 09:57:13.052792
6356 09:57:13.059179 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6357 09:57:13.062333 permitted by applicable law.
6358 09:57:13.145844 Matched prompt #10: / #
6360 09:57:13.146888 Setting prompt string to ['/ #']
6361 09:57:13.147298 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6363 09:57:13.148200 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6364 09:57:13.148602 start: 2.2.6 expect-shell-connection (timeout 00:03:48) [common]
6365 09:57:13.148987 Setting prompt string to ['/ #']
6366 09:57:13.149282 Forcing a shell prompt, looking for ['/ #']
6368 09:57:13.200016 / #
6369 09:57:13.200678 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6370 09:57:13.201087 Waiting using forced prompt support (timeout 00:02:30)
6371 09:57:13.206662
6372 09:57:13.207521 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6373 09:57:13.208019 start: 2.2.7 export-device-env (timeout 00:03:48) [common]
6375 09:57:13.309142 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq'
6376 09:57:13.315801 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14407613/extract-nfsrootfs-g0sg9pbq'
6378 09:57:13.417379 / # export NFS_SERVER_IP='192.168.201.1'
6379 09:57:13.423925 export NFS_SERVER_IP='192.168.201.1'
6380 09:57:13.424806 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6381 09:57:13.425384 end: 2.2 depthcharge-retry (duration 00:01:12) [common]
6382 09:57:13.425885 end: 2 depthcharge-action (duration 00:01:12) [common]
6383 09:57:13.426387 start: 3 lava-test-retry (timeout 00:08:26) [common]
6384 09:57:13.426849 start: 3.1 lava-test-shell (timeout 00:08:26) [common]
6385 09:57:13.427232 Using namespace: common
6387 09:57:13.528323 / # #
6388 09:57:13.528974 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6389 09:57:13.534779 #
6390 09:57:13.535829 Using /lava-14407613
6392 09:57:13.637232 / # export SHELL=/bin/sh
6393 09:57:13.643699 export SHELL=/bin/sh
6395 09:57:13.745356 / # . /lava-14407613/environment
6396 09:57:13.751584 . /lava-14407613/environment
6398 09:57:13.859134 / # /lava-14407613/bin/lava-test-runner /lava-14407613/0
6399 09:57:13.859773 Test shell timeout: 10s (minimum of the action and connection timeout)
6400 09:57:13.865911 /lava-14407613/bin/lava-test-runner /lava-14407613/0
6401 09:57:14.078351 + export TESTRUN_ID=0_wifi-basic
6402 09:57:14.081937 + cd /lava-14407613/0/tests/0_wifi-basic
6403 09:57:14.084969 + cat uuid
6404 09:57:14.088779 + UUID=14407613_1.6.2.3.1
6405 09:57:14.088856 + set +x
6406 09:57:14.095193 <LAVA_SIGNAL_STARTRUN 0_wifi-basic 14407613_1.6.2.3.1>
6407 09:57:14.095449 Received signal: <STARTRUN> 0_wifi-basic 14407613_1.6.2.3.1
6408 09:57:14.095514 Starting test lava.0_wifi-basic (14407613_1.6.2.3.1)
6409 09:57:14.095597 Skipping test definition patterns.
6410 09:57:14.098253 + KERNELCI_LAVA=y /usr/bin/wifi-basic-parser.sh
6411 09:57:14.213801 wlan interfaces found:
6412 09:57:14.214014 wlan0
6413 09:57:14.246902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-present RESULT=pass>
6414 09:57:14.247160 Received signal: <TESTCASE> TEST_CASE_ID=wlan-present RESULT=pass
6416 09:57:14.250000 Received signal: <TESTSET> START wlan-rfkill
6417 09:57:14.250080 Starting test_set wlan-rfkill
6418 09:57:14.253074 <LAVA_SIGNAL_TESTSET START wlan-rfkill>
6419 09:57:14.293656 1 wlan
6420 09:57:14.320256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-present RESULT=pass>
6421 09:57:14.321012 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-present RESULT=pass
6423 09:57:14.459228 <4>[ 19.943413] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6424 09:57:14.476923 <4>[ 19.960831] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6425 09:57:14.488963 <4>[ 19.972741] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6426 09:57:14.495693 <4>[ 19.981820] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6427 09:57:14.554932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-soft-block RESULT=pass>
6428 09:57:14.555691 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-soft-block RESULT=pass
6430 09:57:14.604547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rfkill-wlan-soft-unblock RESULT=pass>
6431 09:57:14.604794 Received signal: <TESTCASE> TEST_CASE_ID=rfkill-wlan-soft-unblock RESULT=pass
6433 09:57:14.607896 <LAVA_SIGNAL_TESTSET STOP>
6434 09:57:14.608138 Received signal: <TESTSET> STOP
6435 09:57:14.608200 Closing test_set wlan-rfkill
6436 09:57:14.612020 Received signal: <TESTSET> START wlan-scan
6437 09:57:14.612096 Starting test_set wlan-scan
6438 09:57:14.615415 <LAVA_SIGNAL_TESTSET START wlan-scan>
6439 09:57:20.216147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-scan RESULT=pass UNITS=networks MEASUREMENT=61>
6440 09:57:20.216444 Received signal: <TESTCASE> TEST_CASE_ID=wlan-scan RESULT=pass UNITS=networks MEASUREMENT=61
6442 09:57:20.219583 <LAVA_SIGNAL_TESTSET STOP>
6443 09:57:20.219823 Received signal: <TESTSET> STOP
6444 09:57:20.219917 Closing test_set wlan-scan
6445 09:57:20.222951 <LAVA_SIGNAL_TESTSET START wlan-monitor>
6446 09:57:20.223191 Received signal: <TESTSET> START wlan-monitor
6447 09:57:20.223252 Starting test_set wlan-monitor
6448 09:57:20.383484 <4>[ 25.870182] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6449 09:57:20.403938 <4>[ 25.887593] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6450 09:57:20.415843 <4>[ 25.899521] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6451 09:57:20.422253 <4>[ 25.908357] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6452 09:57:20.945853 <6>[ 26.432930] IPv6: ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
6453 09:57:20.964724 wlan0 is in monitor mode
6454 09:57:20.986220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-monitor-mode RESULT=pass>
6455 09:57:20.986486 Received signal: <TESTCASE> TEST_CASE_ID=wlan-monitor-mode RESULT=pass
6457 09:57:21.098647 <4>[ 26.582584] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6458 09:57:21.116083 <4>[ 26.599791] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6459 09:57:21.128091 <4>[ 26.611641] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6460 09:57:21.134610 <4>[ 26.620472] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6461 09:57:21.626819 wlan0 is in managed mode
6462 09:57:21.651885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=wlan-managed-mode RESULT=pass>
6463 09:57:21.652142 Received signal: <TESTCASE> TEST_CASE_ID=wlan-managed-mode RESULT=pass
6465 09:57:21.655097 <LAVA_SIGNAL_TESTSET STOP>
6466 09:57:21.655171 + set +x
6467 09:57:21.655395 Received signal: <TESTSET> STOP
6468 09:57:21.655453 Closing test_set wlan-monitor
6469 09:57:21.661827 <LAVA_SIGNAL_ENDRUN 0_wifi-basic 14407613_1.6.2.3.1>
6470 09:57:21.661907 <LAVA_TEST_RUNNER EXIT>
6471 09:57:21.662136 Received signal: <ENDRUN> 0_wifi-basic 14407613_1.6.2.3.1
6472 09:57:21.662221 Ending use of test pattern.
6473 09:57:21.662280 Ending test lava.0_wifi-basic (14407613_1.6.2.3.1), duration 7.57
6475 09:57:21.662540 ok: lava_test_shell seems to have completed
6476 09:57:21.662707 rfkill-wlan-present:
result: pass
set: wlan-rfkill
rfkill-wlan-soft-block:
result: pass
set: wlan-rfkill
rfkill-wlan-soft-unblock:
result: pass
set: wlan-rfkill
wlan-managed-mode:
result: pass
set: wlan-monitor
wlan-monitor-mode:
result: pass
set: wlan-monitor
wlan-present: pass
wlan-scan:
result: pass
set: wlan-scan
6477 09:57:21.662800 end: 3.1 lava-test-shell (duration 00:00:08) [common]
6478 09:57:21.662881 end: 3 lava-test-retry (duration 00:00:08) [common]
6479 09:57:21.662965 start: 4 finalize (timeout 00:08:18) [common]
6480 09:57:21.663053 start: 4.1 power-off (timeout 00:00:30) [common]
6481 09:57:21.663210 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6482 09:57:23.759570 >> Command sent successfully.
6483 09:57:23.766464 Returned 0 in 2 seconds
6484 09:57:23.867317 end: 4.1 power-off (duration 00:00:02) [common]
6486 09:57:23.868774 start: 4.2 read-feedback (timeout 00:08:15) [common]
6487 09:57:23.869902 Listened to connection for namespace 'common' for up to 1s
6488 09:57:24.870513 Finalising connection for namespace 'common'
6489 09:57:24.871164 Disconnecting from shell: Finalise
6490 09:57:24.871567 / #
6491 09:57:24.972593 end: 4.2 read-feedback (duration 00:00:01) [common]
6492 09:57:24.973319 end: 4 finalize (duration 00:00:03) [common]
6493 09:57:24.973962 Cleaning after the job
6494 09:57:24.974498 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/ramdisk
6495 09:57:24.979107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/kernel
6496 09:57:24.989749 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/dtb
6497 09:57:24.989902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/nfsrootfs
6498 09:57:25.021203 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14407613/tftp-deploy-rfubl4mt/modules
6499 09:57:25.027164 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14407613
6500 09:57:25.231077 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14407613
6501 09:57:25.231246 Job finished correctly