Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 50
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 23:43:37.738082 lava-dispatcher, installed at version: 2024.03
2 23:43:37.738323 start: 0 validate
3 23:43:37.738484 Start time: 2024-06-04 23:43:37.738475+00:00 (UTC)
4 23:43:37.738628 Using caching service: 'http://localhost/cache/?uri=%s'
5 23:43:37.738776 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:43:37.998491 Using caching service: 'http://localhost/cache/?uri=%s'
7 23:43:37.998666 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 23:43:38.247184 Using caching service: 'http://localhost/cache/?uri=%s'
9 23:43:38.247508 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 23:43:38.499607 Using caching service: 'http://localhost/cache/?uri=%s'
11 23:43:38.499867 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:43:38.758759 Using caching service: 'http://localhost/cache/?uri=%s'
13 23:43:38.759047 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 23:43:39.020418 validate duration: 1.28
16 23:43:39.020905 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:43:39.021104 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:43:39.021247 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:43:39.021457 Not decompressing ramdisk as can be used compressed.
20 23:43:39.021597 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 23:43:39.021720 saving as /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/ramdisk/initrd.cpio.gz
22 23:43:39.021843 total size: 5628169 (5 MB)
23 23:43:39.023590 progress 0 % (0 MB)
24 23:43:39.026401 progress 5 % (0 MB)
25 23:43:39.028953 progress 10 % (0 MB)
26 23:43:39.031254 progress 15 % (0 MB)
27 23:43:39.033773 progress 20 % (1 MB)
28 23:43:39.035942 progress 25 % (1 MB)
29 23:43:39.038418 progress 30 % (1 MB)
30 23:43:39.041114 progress 35 % (1 MB)
31 23:43:39.043539 progress 40 % (2 MB)
32 23:43:39.046229 progress 45 % (2 MB)
33 23:43:39.048673 progress 50 % (2 MB)
34 23:43:39.051364 progress 55 % (2 MB)
35 23:43:39.054075 progress 60 % (3 MB)
36 23:43:39.056558 progress 65 % (3 MB)
37 23:43:39.059420 progress 70 % (3 MB)
38 23:43:39.061824 progress 75 % (4 MB)
39 23:43:39.064384 progress 80 % (4 MB)
40 23:43:39.066523 progress 85 % (4 MB)
41 23:43:39.069098 progress 90 % (4 MB)
42 23:43:39.071878 progress 95 % (5 MB)
43 23:43:39.074000 progress 100 % (5 MB)
44 23:43:39.074264 5 MB downloaded in 0.05 s (102.39 MB/s)
45 23:43:39.074447 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:43:39.074721 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:43:39.074818 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:43:39.074911 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:43:39.075064 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 23:43:39.075140 saving as /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/kernel/Image
52 23:43:39.075208 total size: 54682112 (52 MB)
53 23:43:39.075277 No compression specified
54 23:43:39.076528 progress 0 % (0 MB)
55 23:43:39.091998 progress 5 % (2 MB)
56 23:43:39.107436 progress 10 % (5 MB)
57 23:43:39.123093 progress 15 % (7 MB)
58 23:43:39.138588 progress 20 % (10 MB)
59 23:43:39.154746 progress 25 % (13 MB)
60 23:43:39.171325 progress 30 % (15 MB)
61 23:43:39.188169 progress 35 % (18 MB)
62 23:43:39.204226 progress 40 % (20 MB)
63 23:43:39.220038 progress 45 % (23 MB)
64 23:43:39.236517 progress 50 % (26 MB)
65 23:43:39.252621 progress 55 % (28 MB)
66 23:43:39.268815 progress 60 % (31 MB)
67 23:43:39.284980 progress 65 % (33 MB)
68 23:43:39.301484 progress 70 % (36 MB)
69 23:43:39.317398 progress 75 % (39 MB)
70 23:43:39.333291 progress 80 % (41 MB)
71 23:43:39.348847 progress 85 % (44 MB)
72 23:43:39.364776 progress 90 % (46 MB)
73 23:43:39.381087 progress 95 % (49 MB)
74 23:43:39.396436 progress 100 % (52 MB)
75 23:43:39.396737 52 MB downloaded in 0.32 s (162.19 MB/s)
76 23:43:39.396907 end: 1.2.1 http-download (duration 00:00:00) [common]
78 23:43:39.397216 end: 1.2 download-retry (duration 00:00:00) [common]
79 23:43:39.397365 start: 1.3 download-retry (timeout 00:10:00) [common]
80 23:43:39.397510 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 23:43:39.397667 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 23:43:39.397743 saving as /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 23:43:39.397811 total size: 57695 (0 MB)
84 23:43:39.397879 No compression specified
85 23:43:39.399077 progress 56 % (0 MB)
86 23:43:39.399430 progress 100 % (0 MB)
87 23:43:39.399655 0 MB downloaded in 0.00 s (29.89 MB/s)
88 23:43:39.399883 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:43:39.400137 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:43:39.400231 start: 1.4 download-retry (timeout 00:10:00) [common]
92 23:43:39.400323 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 23:43:39.400449 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 23:43:39.400523 saving as /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/nfsrootfs/full.rootfs.tar
95 23:43:39.400589 total size: 120894716 (115 MB)
96 23:43:39.400657 Using unxz to decompress xz
97 23:43:39.405237 progress 0 % (0 MB)
98 23:43:39.792640 progress 5 % (5 MB)
99 23:43:40.190571 progress 10 % (11 MB)
100 23:43:40.580695 progress 15 % (17 MB)
101 23:43:40.943682 progress 20 % (23 MB)
102 23:43:41.267081 progress 25 % (28 MB)
103 23:43:41.667615 progress 30 % (34 MB)
104 23:43:42.043875 progress 35 % (40 MB)
105 23:43:42.231364 progress 40 % (46 MB)
106 23:43:42.436896 progress 45 % (51 MB)
107 23:43:42.797461 progress 50 % (57 MB)
108 23:43:43.224577 progress 55 % (63 MB)
109 23:43:43.724852 progress 60 % (69 MB)
110 23:43:44.273810 progress 65 % (74 MB)
111 23:43:44.815318 progress 70 % (80 MB)
112 23:43:45.322965 progress 75 % (86 MB)
113 23:43:45.738037 progress 80 % (92 MB)
114 23:43:46.160267 progress 85 % (98 MB)
115 23:43:46.645317 progress 90 % (103 MB)
116 23:43:47.162711 progress 95 % (109 MB)
117 23:43:47.715337 progress 100 % (115 MB)
118 23:43:47.723585 115 MB downloaded in 8.32 s (13.85 MB/s)
119 23:43:47.724028 end: 1.4.1 http-download (duration 00:00:08) [common]
121 23:43:47.724563 end: 1.4 download-retry (duration 00:00:08) [common]
122 23:43:47.724733 start: 1.5 download-retry (timeout 00:09:51) [common]
123 23:43:47.724899 start: 1.5.1 http-download (timeout 00:09:51) [common]
124 23:43:47.725141 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 23:43:47.725271 saving as /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/modules/modules.tar
126 23:43:47.725390 total size: 8603924 (8 MB)
127 23:43:47.725530 Using unxz to decompress xz
128 23:43:47.732053 progress 0 % (0 MB)
129 23:43:47.763951 progress 5 % (0 MB)
130 23:43:47.802326 progress 10 % (0 MB)
131 23:43:47.842906 progress 15 % (1 MB)
132 23:43:47.882296 progress 20 % (1 MB)
133 23:43:47.922821 progress 25 % (2 MB)
134 23:43:47.962612 progress 30 % (2 MB)
135 23:43:47.999890 progress 35 % (2 MB)
136 23:43:48.041539 progress 40 % (3 MB)
137 23:43:48.080503 progress 45 % (3 MB)
138 23:43:48.118712 progress 50 % (4 MB)
139 23:43:48.158103 progress 55 % (4 MB)
140 23:43:48.196657 progress 60 % (4 MB)
141 23:43:48.234454 progress 65 % (5 MB)
142 23:43:48.276654 progress 70 % (5 MB)
143 23:43:48.316521 progress 75 % (6 MB)
144 23:43:48.356606 progress 80 % (6 MB)
145 23:43:48.394508 progress 85 % (7 MB)
146 23:43:48.432534 progress 90 % (7 MB)
147 23:43:48.479276 progress 95 % (7 MB)
148 23:43:48.524588 progress 100 % (8 MB)
149 23:43:48.533104 8 MB downloaded in 0.81 s (10.16 MB/s)
150 23:43:48.533538 end: 1.5.1 http-download (duration 00:00:01) [common]
152 23:43:48.534058 end: 1.5 download-retry (duration 00:00:01) [common]
153 23:43:48.534232 start: 1.6 prepare-tftp-overlay (timeout 00:09:50) [common]
154 23:43:48.534403 start: 1.6.1 extract-nfsrootfs (timeout 00:09:50) [common]
155 23:43:53.946688 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j
156 23:43:53.946916 end: 1.6.1 extract-nfsrootfs (duration 00:00:05) [common]
157 23:43:53.947032 start: 1.6.2 lava-overlay (timeout 00:09:45) [common]
158 23:43:53.947226 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a
159 23:43:53.947380 makedir: /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin
160 23:43:53.947494 makedir: /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/tests
161 23:43:53.947605 makedir: /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/results
162 23:43:53.947717 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-add-keys
163 23:43:53.947875 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-add-sources
164 23:43:53.948030 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-background-process-start
165 23:43:53.948180 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-background-process-stop
166 23:43:53.948322 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-common-functions
167 23:43:53.948461 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-echo-ipv4
168 23:43:53.948627 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-install-packages
169 23:43:53.948769 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-installed-packages
170 23:43:53.948917 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-os-build
171 23:43:53.949058 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-probe-channel
172 23:43:53.949197 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-probe-ip
173 23:43:53.949334 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-target-ip
174 23:43:53.949485 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-target-mac
175 23:43:53.949624 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-target-storage
176 23:43:53.949766 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-case
177 23:43:53.949911 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-event
178 23:43:53.950060 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-feedback
179 23:43:53.950198 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-raise
180 23:43:53.950341 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-reference
181 23:43:53.950481 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-runner
182 23:43:53.950619 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-set
183 23:43:53.950760 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-test-shell
184 23:43:53.950910 Updating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-add-keys (debian)
185 23:43:53.951093 Updating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-add-sources (debian)
186 23:43:53.951270 Updating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-install-packages (debian)
187 23:43:53.951441 Updating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-installed-packages (debian)
188 23:43:53.951613 Updating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/bin/lava-os-build (debian)
189 23:43:53.951751 Creating /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/environment
190 23:43:53.951874 LAVA metadata
191 23:43:53.951950 - LAVA_JOB_ID=14172955
192 23:43:53.952021 - LAVA_DISPATCHER_IP=192.168.201.1
193 23:43:53.952149 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:45) [common]
194 23:43:53.952224 skipped lava-vland-overlay
195 23:43:53.952310 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 23:43:53.952400 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
197 23:43:53.952471 skipped lava-multinode-overlay
198 23:43:53.952552 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 23:43:53.952637 start: 1.6.2.3 test-definition (timeout 00:09:45) [common]
200 23:43:53.952722 Loading test definitions
201 23:43:53.952821 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:45) [common]
202 23:43:53.952903 Using /lava-14172955 at stage 0
203 23:43:53.953298 uuid=14172955_1.6.2.3.1 testdef=None
204 23:43:53.953609 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 23:43:53.953757 start: 1.6.2.3.2 test-overlay (timeout 00:09:45) [common]
206 23:43:53.954296 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 23:43:53.954545 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:45) [common]
209 23:43:53.955185 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 23:43:53.955442 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
212 23:43:53.956046 runner path: /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/0/tests/0_timesync-off test_uuid 14172955_1.6.2.3.1
213 23:43:53.956228 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 23:43:53.956481 start: 1.6.2.3.5 git-repo-action (timeout 00:09:45) [common]
216 23:43:53.956563 Using /lava-14172955 at stage 0
217 23:43:53.956675 Fetching tests from https://github.com/kernelci/test-definitions.git
218 23:43:53.956773 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/0/tests/1_kselftest-tpm2'
219 23:43:56.474326 Running '/usr/bin/git checkout kernelci.org
220 23:43:56.644676 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 23:43:56.645528 uuid=14172955_1.6.2.3.5 testdef=None
222 23:43:56.645713 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 23:43:56.645992 start: 1.6.2.3.6 test-overlay (timeout 00:09:42) [common]
225 23:43:56.646859 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 23:43:56.647308 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:42) [common]
228 23:43:56.648594 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 23:43:56.648862 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
231 23:43:56.649923 runner path: /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/0/tests/1_kselftest-tpm2 test_uuid 14172955_1.6.2.3.5
232 23:43:56.650028 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 23:43:56.650099 BRANCH='cip'
234 23:43:56.650166 SKIPFILE='/dev/null'
235 23:43:56.650231 SKIP_INSTALL='True'
236 23:43:56.650294 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 23:43:56.650358 TST_CASENAME=''
238 23:43:56.650419 TST_CMDFILES='tpm2'
239 23:43:56.650580 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 23:43:56.650809 Creating lava-test-runner.conf files
242 23:43:56.650879 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14172955/lava-overlay-brflvl8a/lava-14172955/0 for stage 0
243 23:43:56.650983 - 0_timesync-off
244 23:43:56.651060 - 1_kselftest-tpm2
245 23:43:56.651173 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 23:43:56.651271 start: 1.6.2.4 compress-overlay (timeout 00:09:42) [common]
247 23:44:05.325530 end: 1.6.2.4 compress-overlay (duration 00:00:09) [common]
248 23:44:05.325728 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
249 23:44:05.325875 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 23:44:05.326013 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 23:44:05.326142 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
252 23:44:05.530896 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 23:44:05.531329 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
254 23:44:05.531450 extracting modules file /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j
255 23:44:05.818271 extracting modules file /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14172955/extract-overlay-ramdisk-97xjkq4i/ramdisk
256 23:44:06.109350 end: 1.6.4 extract-modules (duration 00:00:01) [common]
257 23:44:06.109538 start: 1.6.5 apply-overlay-tftp (timeout 00:09:33) [common]
258 23:44:06.109645 [common] Applying overlay to NFS
259 23:44:06.109723 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14172955/compress-overlay-5y9dz9_n/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j
260 23:44:07.235389 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 23:44:07.235567 start: 1.6.6 configure-preseed-file (timeout 00:09:32) [common]
262 23:44:07.235683 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 23:44:07.235784 start: 1.6.7 compress-ramdisk (timeout 00:09:32) [common]
264 23:44:07.235880 Building ramdisk /var/lib/lava/dispatcher/tmp/14172955/extract-overlay-ramdisk-97xjkq4i/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14172955/extract-overlay-ramdisk-97xjkq4i/ramdisk
265 23:44:07.581829 >> 130337 blocks
266 23:44:09.961113 rename /var/lib/lava/dispatcher/tmp/14172955/extract-overlay-ramdisk-97xjkq4i/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/ramdisk/ramdisk.cpio.gz
267 23:44:09.961598 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 23:44:09.961738 start: 1.6.8 prepare-kernel (timeout 00:09:29) [common]
269 23:44:09.961859 start: 1.6.8.1 prepare-fit (timeout 00:09:29) [common]
270 23:44:09.961978 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/kernel/Image']
271 23:44:25.790205 Returned 0 in 15 seconds
272 23:44:25.890832 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/kernel/image.itb
273 23:44:26.292785 output: FIT description: Kernel Image image with one or more FDT blobs
274 23:44:26.293193 output: Created: Wed Jun 5 00:44:26 2024
275 23:44:26.293285 output: Image 0 (kernel-1)
276 23:44:26.293358 output: Description:
277 23:44:26.293427 output: Created: Wed Jun 5 00:44:26 2024
278 23:44:26.293514 output: Type: Kernel Image
279 23:44:26.293581 output: Compression: lzma compressed
280 23:44:26.293646 output: Data Size: 13061430 Bytes = 12755.30 KiB = 12.46 MiB
281 23:44:26.293713 output: Architecture: AArch64
282 23:44:26.293777 output: OS: Linux
283 23:44:26.293841 output: Load Address: 0x00000000
284 23:44:26.293904 output: Entry Point: 0x00000000
285 23:44:26.293965 output: Hash algo: crc32
286 23:44:26.294026 output: Hash value: ecfb5096
287 23:44:26.294086 output: Image 1 (fdt-1)
288 23:44:26.294170 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 23:44:26.294231 output: Created: Wed Jun 5 00:44:26 2024
290 23:44:26.294290 output: Type: Flat Device Tree
291 23:44:26.294349 output: Compression: uncompressed
292 23:44:26.294407 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 23:44:26.294467 output: Architecture: AArch64
294 23:44:26.294525 output: Hash algo: crc32
295 23:44:26.294583 output: Hash value: a9713552
296 23:44:26.294658 output: Image 2 (ramdisk-1)
297 23:44:26.294725 output: Description: unavailable
298 23:44:26.294784 output: Created: Wed Jun 5 00:44:26 2024
299 23:44:26.294873 output: Type: RAMDisk Image
300 23:44:26.294934 output: Compression: Unknown Compression
301 23:44:26.294994 output: Data Size: 18727138 Bytes = 18288.22 KiB = 17.86 MiB
302 23:44:26.295053 output: Architecture: AArch64
303 23:44:26.295111 output: OS: Linux
304 23:44:26.295169 output: Load Address: unavailable
305 23:44:26.295227 output: Entry Point: unavailable
306 23:44:26.295284 output: Hash algo: crc32
307 23:44:26.295357 output: Hash value: 3206e3bb
308 23:44:26.295418 output: Default Configuration: 'conf-1'
309 23:44:26.295476 output: Configuration 0 (conf-1)
310 23:44:26.295556 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 23:44:26.295617 output: Kernel: kernel-1
312 23:44:26.295675 output: Init Ramdisk: ramdisk-1
313 23:44:26.295734 output: FDT: fdt-1
314 23:44:26.295793 output: Loadables: kernel-1
315 23:44:26.295851 output:
316 23:44:26.296075 end: 1.6.8.1 prepare-fit (duration 00:00:16) [common]
317 23:44:26.296183 end: 1.6.8 prepare-kernel (duration 00:00:16) [common]
318 23:44:26.296298 end: 1.6 prepare-tftp-overlay (duration 00:00:38) [common]
319 23:44:26.296407 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:13) [common]
320 23:44:26.296500 No LXC device requested
321 23:44:26.296590 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 23:44:26.296685 start: 1.8 deploy-device-env (timeout 00:09:13) [common]
323 23:44:26.296771 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 23:44:26.296842 Checking files for TFTP limit of 4294967296 bytes.
325 23:44:26.297598 end: 1 tftp-deploy (duration 00:00:47) [common]
326 23:44:26.297721 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 23:44:26.297825 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 23:44:26.297961 substitutions:
329 23:44:26.298037 - {DTB}: 14172955/tftp-deploy-74mqdctt/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 23:44:26.298110 - {INITRD}: 14172955/tftp-deploy-74mqdctt/ramdisk/ramdisk.cpio.gz
331 23:44:26.298176 - {KERNEL}: 14172955/tftp-deploy-74mqdctt/kernel/Image
332 23:44:26.298240 - {LAVA_MAC}: None
333 23:44:26.298302 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j
334 23:44:26.298366 - {NFS_SERVER_IP}: 192.168.201.1
335 23:44:26.298426 - {PRESEED_CONFIG}: None
336 23:44:26.298486 - {PRESEED_LOCAL}: None
337 23:44:26.298546 - {RAMDISK}: 14172955/tftp-deploy-74mqdctt/ramdisk/ramdisk.cpio.gz
338 23:44:26.298606 - {ROOT_PART}: None
339 23:44:26.298665 - {ROOT}: None
340 23:44:26.298724 - {SERVER_IP}: 192.168.201.1
341 23:44:26.298784 - {TEE}: None
342 23:44:26.298843 Parsed boot commands:
343 23:44:26.298903 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 23:44:26.299097 Parsed boot commands: tftpboot 192.168.201.1 14172955/tftp-deploy-74mqdctt/kernel/image.itb 14172955/tftp-deploy-74mqdctt/kernel/cmdline
345 23:44:26.299196 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 23:44:26.299291 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 23:44:26.299390 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 23:44:26.299510 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 23:44:26.299610 Not connected, no need to disconnect.
350 23:44:26.299702 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 23:44:26.299795 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 23:44:26.299878 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
353 23:44:26.304198 Setting prompt string to ['lava-test: # ']
354 23:44:26.304618 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 23:44:26.304740 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 23:44:26.304856 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 23:44:26.304960 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 23:44:26.305236 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
359 23:44:55.170497 Returned 0 in 28 seconds
360 23:44:55.271638 end: 2.2.2.1 pdu-reboot (duration 00:00:29) [common]
362 23:44:55.273337 end: 2.2.2 reset-device (duration 00:00:29) [common]
363 23:44:55.274147 start: 2.2.3 depthcharge-start (timeout 00:04:31) [common]
364 23:44:55.274719 Setting prompt string to 'Starting depthcharge on Juniper...'
365 23:44:55.275145 Changing prompt to 'Starting depthcharge on Juniper...'
366 23:44:55.275582 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 23:44:55.277883 [Enter `^Ec?' for help]
368 23:44:55.278365 [DL] 00000000 00000000 010701
369 23:44:55.278785
370 23:44:55.279313
371 23:44:55.279797 F0: 102B 0000
372 23:44:55.280222
373 23:44:55.280577 F3: 1006 0033 [0200]
374 23:44:55.281051
375 23:44:55.281689 F3: 4001 00E0 [0200]
376 23:44:55.282077
377 23:44:55.282437 F3: 0000 0000
378 23:44:55.282789
379 23:44:55.283142 V0: 0000 0000 [0001]
380 23:44:55.283520
381 23:44:55.283892 00: 1027 0002
382 23:44:55.284290
383 23:44:55.284645 01: 0000 0000
384 23:44:55.284974
385 23:44:55.285471 BP: 0C00 0251 [0000]
386 23:44:55.285810
387 23:44:55.286162 G0: 1182 0000
388 23:44:55.286509
389 23:44:55.286854 EC: 0004 0000 [0001]
390 23:44:55.287217
391 23:44:55.287677 S7: 0000 0000 [0000]
392 23:44:55.288051
393 23:44:55.288421 CC: 0000 0000 [0001]
394 23:44:55.288768
395 23:44:55.289115 T0: 0000 00DB [000F]
396 23:44:55.289497
397 23:44:55.289831 Jump to BL
398 23:44:55.290171
399 23:44:55.290513
400 23:44:55.290890
401 23:44:55.291389 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 23:44:55.291776 ARM64: Exception handlers installed.
403 23:44:55.292130 ARM64: Testing exception
404 23:44:55.292481 ARM64: Done test exception
405 23:44:55.292838 WDT: Last reset was cold boot
406 23:44:55.293160 SPI0(PAD0) initialized at 992727 Hz
407 23:44:55.293616 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 23:44:55.293998 Manufacturer: ef
409 23:44:55.294323 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 23:44:55.294698 Probing TPM: . done!
411 23:44:55.295048 TPM ready after 0 ms
412 23:44:55.295408 Connected to device vid:did:rid of 1ae0:0028:00
413 23:44:55.295761 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
414 23:44:55.296115 Initialized TPM device CR50 revision 0
415 23:44:55.296434 tlcl_send_startup: Startup return code is 0
416 23:44:55.296780 TPM: setup succeeded
417 23:44:55.297125 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 23:44:55.297398 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 23:44:55.297676 in-header: 03 19 00 00 08 00 00 00
420 23:44:55.297921 in-data: a2 e0 47 00 13 00 00 00
421 23:44:55.298153 Chrome EC: UHEPI supported
422 23:44:55.298406 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 23:44:55.298636 in-header: 03 a5 00 00 08 00 00 00
424 23:44:55.298918 in-data: 00 20 20 10 00 00 00 00
425 23:44:55.299282 Phase 1
426 23:44:55.299642 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 23:44:55.300000 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 23:44:55.300395 Phase 2
429 23:44:55.300810 Phase 3
430 23:44:55.301208 FMAP: area GBB found @ 3f5000 (12032 bytes)
431 23:44:55.301539 read SPI 0x3f5180 0x1000: 1294 us, 3165 KB/s, 25.320 Mbps
432 23:44:55.301958 VB2:vb2_report_dev_firmware() This is developer signed firmware
433 23:44:55.302287 FMAP: area VBLOCK_A found @ 400000 (8192 bytes)
434 23:44:55.302478 FMAP: area VBLOCK_A found @ 400000 (8192 bytes)
435 23:44:55.302695 VB2:vb2_verify_keyblock() Checking key block signature...
436 23:44:55.302873 FMAP: area VBLOCK_A found @ 400000 (8192 bytes)
437 23:44:55.303058 FMAP: area VBLOCK_A found @ 400000 (8192 bytes)
438 23:44:55.303233 VB2:vb2_verify_fw_preamble() Verifying preamble.
439 23:44:55.303389 Phase 4
440 23:44:55.303572 FMAP: area FW_MAIN_A found @ 402000 (1367808 bytes)
441 23:44:55.303763 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
442 23:44:55.303938 [DL] 00000000 00000000 010701
443 23:44:55.304123
444 23:44:55.304295
445 23:44:55.304469 F0: 102B 0000
446 23:44:55.304639
447 23:44:55.304848 F3: 1006 0033 [0200]
448 23:44:55.305082
449 23:44:55.305276 F3: 4001 00E0 [0200]
450 23:44:55.305489
451 23:44:55.305669 F3: 0000 0000
452 23:44:55.305844
453 23:44:55.306015 V0: 0000 0000 [0001]
454 23:44:55.306187
455 23:44:55.306355 00: 1027 0002
456 23:44:55.306512
457 23:44:55.306680 01: 0000 0000
458 23:44:55.306855
459 23:44:55.307027 BP: 0C00 0251 [0000]
460 23:44:55.307202
461 23:44:55.307366 G0: 1182 0000
462 23:44:55.307504
463 23:44:55.307631 EC: 0004 0000 [0001]
464 23:44:55.307768
465 23:44:55.307963 S7: 0000 0000 [0000]
466 23:44:55.308101
467 23:44:55.308222 CC: 0000 0000 [0001]
468 23:44:55.308359
469 23:44:55.308494 T0: 0000 00DB [000F]
470 23:44:55.308615
471 23:44:55.308751 Jump to BL
472 23:44:55.308887
473 23:44:55.309008
474 23:44:55.309141
475 23:44:55.309288 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
476 23:44:55.309426 ARM64: Exception handlers installed.
477 23:44:55.309577 ARM64: Testing exception
478 23:44:55.309780 ARM64: Done test exception
479 23:44:55.309913 WDT: Last reset was cold boot
480 23:44:55.310061 SPI0(PAD0) initialized at 992727 Hz
481 23:44:55.310209 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
482 23:44:55.310334 Manufacturer: ef
483 23:44:55.310481 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
484 23:44:55.310629 Probing TPM: . done!
485 23:44:55.310762 TPM ready after 0 ms
486 23:44:55.310886 Connected to device vid:did:rid of 1ae0:0028:00
487 23:44:55.311032 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
488 23:44:55.311173 Initialized TPM device CR50 revision 0
489 23:44:55.311296 tlcl_send_startup: Startup return code is 0
490 23:44:55.311443 TPM: setup succeeded
491 23:44:55.311580 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
492 23:44:55.311723 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
493 23:44:55.311850 in-header: 03 19 00 00 08 00 00 00
494 23:44:55.311985 in-data: a2 e0 47 00 13 00 00 00
495 23:44:55.312128 Chrome EC: UHEPI supported
496 23:44:55.312252 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
497 23:44:55.312395 in-header: 03 a1 00 00 08 00 00 00
498 23:44:55.312507 in-data: 84 60 60 10 00 00 00 00
499 23:44:55.312608 Phase 1
500 23:44:55.312721 FMAP: area GBB found @ 3f5000 (12032 bytes)
501 23:44:55.312824 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
502 23:44:55.312957 VB2:vb2_check_recovery() Recovery was requested manually
503 23:44:55.313075 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
504 23:44:55.313182 Recovery requested (1009000e)
505 23:44:55.313301 tlcl_extend: response is 0
506 23:44:55.313405 tlcl_extend: response is 0
507 23:44:55.313544
508 23:44:55.313646
509 23:44:55.313759 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
510 23:44:55.313862 ARM64: Exception handlers installed.
511 23:44:55.313986 ARM64: Testing exception
512 23:44:55.314107 ARM64: Done test exception
513 23:44:55.314209 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x203a
514 23:44:55.314558 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
515 23:44:55.314686 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
516 23:44:55.314791 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
517 23:44:55.314906 [RTC]rtc_get_frequency_meter,134: input=0x7, output=734
518 23:44:55.315041 [RTC]rtc_get_frequency_meter,134: input=0xb, output=800
519 23:44:55.315151 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
520 23:44:55.315265 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
521 23:44:55.315367 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
522 23:44:55.315484 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
523 23:44:55.315590 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
524 23:44:55.315713 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
525 23:44:55.315834 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
526 23:44:55.315938 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
527 23:44:55.316052 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
528 23:44:55.316153 in-header: 03 19 00 00 08 00 00 00
529 23:44:55.316274 in-data: a2 e0 47 00 13 00 00 00
530 23:44:55.316387 Chrome EC: UHEPI supported
531 23:44:55.316490 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
532 23:44:55.316603 in-header: 03 a1 00 00 08 00 00 00
533 23:44:55.316704 in-data: 84 60 60 10 00 00 00 00
534 23:44:55.316818 Skip loading cached calibration data
535 23:44:55.316919 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
536 23:44:55.317043 in-header: 03 a1 00 00 08 00 00 00
537 23:44:55.317154 in-data: 84 60 60 10 00 00 00 00
538 23:44:55.317268 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
539 23:44:55.317371 in-header: 03 a1 00 00 08 00 00 00
540 23:44:55.317479 in-data: 84 60 60 10 00 00 00 00
541 23:44:55.317589 ADC[3]: Raw value=215760 ID=1
542 23:44:55.317677 Manufacturer: ef
543 23:44:55.317774 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
544 23:44:55.317862 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
545 23:44:55.317968 CBFS @ 21000 size 3d4000
546 23:44:55.318055 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
547 23:44:55.318153 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
548 23:44:55.318240 CBFS: Found @ offset 3c700 size 44
549 23:44:55.318343 DRAM-K: Full Calibration
550 23:44:55.318430 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
551 23:44:55.318569 CBFS @ 21000 size 3d4000
552 23:44:55.318694 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
553 23:44:55.318786 CBFS: Locating 'fallback/dram'
554 23:44:55.318883 CBFS: Found @ offset 24b00 size 12268
555 23:44:55.318981 read SPI 0x45b44 0x1224c: 22773 us, 3263 KB/s, 26.104 Mbps
556 23:44:55.319069 ddr_geometry: 1, config: 0x0
557 23:44:55.319167 header.status = 0x0
558 23:44:55.319255 header.magic = 0x44524d4b (expected: 0x44524d4b)
559 23:44:55.319361 header.version = 0x5 (expected: 0x5)
560 23:44:55.319447 header.size = 0x8f0 (expected: 0x8f0)
561 23:44:55.319547 header.config = 0x0
562 23:44:55.319633 header.flags = 0x0
563 23:44:55.319738 header.checksum = 0x0
564 23:44:55.319825 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
565 23:44:55.319923 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
566 23:44:55.320012 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
567 23:44:55.320116 ddr_geometry:1
568 23:44:55.320204 [EMI] new MDL number = 1
569 23:44:55.320300 dram_cbt_mode_extern: 0
570 23:44:55.320386 dram_cbt_mode [RK0]: 0, [RK1]: 0
571 23:44:55.320488 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
572 23:44:55.320576
573 23:44:55.320679
574 23:44:55.320767 [Bianco] ETT version 0.0.0.1
575 23:44:55.320862 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
576 23:44:55.320949
577 23:44:55.321044 vSetVcoreByFreq with vcore:762500, freq=1600
578 23:44:55.321157
579 23:44:55.321257 [DramcInit]
580 23:44:55.321344 AutoRefreshCKEOff AutoREF OFF
581 23:44:55.321459 DDRPhyPLLSetting-CKEOFF
582 23:44:55.321550 DDRPhyPLLSetting-CKEON
583 23:44:55.321647
584 23:44:55.321735 Enable WDQS
585 23:44:55.321830 [ModeRegInit_LP4] CH0 RK0
586 23:44:55.321918 Write Rank0 MR13 =0x18
587 23:44:55.322015 Write Rank0 MR12 =0x5d
588 23:44:55.322102 Write Rank0 MR1 =0x56
589 23:44:55.322204 Write Rank0 MR2 =0x1a
590 23:44:55.322303 Write Rank0 MR11 =0x0
591 23:44:55.322392 Write Rank0 MR22 =0x38
592 23:44:55.322469 Write Rank0 MR14 =0x5d
593 23:44:55.322543 Write Rank0 MR3 =0x30
594 23:44:55.322627 Write Rank0 MR13 =0x58
595 23:44:55.322702 Write Rank0 MR12 =0x5d
596 23:44:55.322790 Write Rank0 MR1 =0x56
597 23:44:55.322866 Write Rank0 MR2 =0x2d
598 23:44:55.322948 Write Rank0 MR11 =0x23
599 23:44:55.323026 Write Rank0 MR22 =0x34
600 23:44:55.323100 Write Rank0 MR14 =0x10
601 23:44:55.323192 Write Rank0 MR3 =0x30
602 23:44:55.323266 Write Rank0 MR13 =0xd8
603 23:44:55.323350 [ModeRegInit_LP4] CH0 RK1
604 23:44:55.323426 Write Rank1 MR13 =0x18
605 23:44:55.323499 Write Rank1 MR12 =0x5d
606 23:44:55.323584 Write Rank1 MR1 =0x56
607 23:44:55.323658 Write Rank1 MR2 =0x1a
608 23:44:55.323740 Write Rank1 MR11 =0x0
609 23:44:55.323814 Write Rank1 MR22 =0x38
610 23:44:55.323888 Write Rank1 MR14 =0x5d
611 23:44:55.323973 Write Rank1 MR3 =0x30
612 23:44:55.324047 Write Rank1 MR13 =0x58
613 23:44:55.324140 Write Rank1 MR12 =0x5d
614 23:44:55.324216 Write Rank1 MR1 =0x56
615 23:44:55.324301 Write Rank1 MR2 =0x2d
616 23:44:55.324377 Write Rank1 MR11 =0x23
617 23:44:55.324451 Write Rank1 MR22 =0x34
618 23:44:55.324541 Write Rank1 MR14 =0x10
619 23:44:55.324617 Write Rank1 MR3 =0x30
620 23:44:55.324691 Write Rank1 MR13 =0xd8
621 23:44:55.324782 [ModeRegInit_LP4] CH1 RK0
622 23:44:55.324856 Write Rank0 MR13 =0x18
623 23:44:55.324939 Write Rank0 MR12 =0x5d
624 23:44:55.325015 Write Rank0 MR1 =0x56
625 23:44:55.325088 Write Rank0 MR2 =0x1a
626 23:44:55.325173 Write Rank0 MR11 =0x0
627 23:44:55.325248 Write Rank0 MR22 =0x38
628 23:44:55.325331 Write Rank0 MR14 =0x5d
629 23:44:55.325406 Write Rank0 MR3 =0x30
630 23:44:55.325511 Write Rank0 MR13 =0x58
631 23:44:55.325589 Write Rank0 MR12 =0x5d
632 23:44:55.325663 Write Rank0 MR1 =0x56
633 23:44:55.325750 Write Rank0 MR2 =0x2d
634 23:44:55.325824 Write Rank0 MR11 =0x23
635 23:44:55.325909 Write Rank0 MR22 =0x34
636 23:44:55.325984 Write Rank0 MR14 =0x10
637 23:44:55.326058 Write Rank0 MR3 =0x30
638 23:44:55.326143 Write Rank0 MR13 =0xd8
639 23:44:55.326217 [ModeRegInit_LP4] CH1 RK1
640 23:44:55.326512 Write Rank1 MR13 =0x18
641 23:44:55.326600 Write Rank1 MR12 =0x5d
642 23:44:55.326690 Write Rank1 MR1 =0x56
643 23:44:55.326766 Write Rank1 MR2 =0x1a
644 23:44:55.326850 Write Rank1 MR11 =0x0
645 23:44:55.326926 Write Rank1 MR22 =0x38
646 23:44:55.327000 Write Rank1 MR14 =0x5d
647 23:44:55.327086 Write Rank1 MR3 =0x30
648 23:44:55.327161 Write Rank1 MR13 =0x58
649 23:44:55.327256 Write Rank1 MR12 =0x5d
650 23:44:55.327324 Write Rank1 MR1 =0x56
651 23:44:55.327391 Write Rank1 MR2 =0x2d
652 23:44:55.327481 Write Rank1 MR11 =0x23
653 23:44:55.327572 Write Rank1 MR22 =0x34
654 23:44:55.327652 Write Rank1 MR14 =0x10
655 23:44:55.327719 Write Rank1 MR3 =0x30
656 23:44:55.327785 Write Rank1 MR13 =0xd8
657 23:44:55.327861 match AC timing 3
658 23:44:55.327928 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
659 23:44:55.328004 [MiockJmeterHQA]
660 23:44:55.328072 vSetVcoreByFreq with vcore:762500, freq=1600
661 23:44:55.328139
662 23:44:55.328213 MIOCK jitter meter ch=0
663 23:44:55.328282
664 23:44:55.328348 1T = (101-17) = 84 dly cells
665 23:44:55.328431 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
666 23:44:55.328500 vSetVcoreByFreq with vcore:725000, freq=1200
667 23:44:55.328574
668 23:44:55.328643 MIOCK jitter meter ch=0
669 23:44:55.328710
670 23:44:55.328784 1T = (96-16) = 80 dly cells
671 23:44:55.328855 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
672 23:44:55.328922 vSetVcoreByFreq with vcore:725000, freq=800
673 23:44:55.328997
674 23:44:55.329064 MIOCK jitter meter ch=0
675 23:44:55.329130
676 23:44:55.329206 1T = (96-16) = 80 dly cells
677 23:44:55.329275 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
678 23:44:55.329350 vSetVcoreByFreq with vcore:762500, freq=1600
679 23:44:55.329417 vSetVcoreByFreq with vcore:762500, freq=1600
680 23:44:55.329503
681 23:44:55.329581 K DRVP
682 23:44:55.329649 1. OCD DRVP=0 CALOUT=0
683 23:44:55.329741 1. OCD DRVP=1 CALOUT=0
684 23:44:55.329813 1. OCD DRVP=2 CALOUT=0
685 23:44:55.329880 1. OCD DRVP=3 CALOUT=0
686 23:44:55.329960 1. OCD DRVP=4 CALOUT=0
687 23:44:55.330042 1. OCD DRVP=5 CALOUT=0
688 23:44:55.330119 1. OCD DRVP=6 CALOUT=0
689 23:44:55.330203 1. OCD DRVP=7 CALOUT=0
690 23:44:55.330272 1. OCD DRVP=8 CALOUT=1
691 23:44:55.330340
692 23:44:55.330416 1. OCD DRVP calibration OK! DRVP=8
693 23:44:55.330485
694 23:44:55.330561
695 23:44:55.330628
696 23:44:55.330694 K ODTN
697 23:44:55.330770 3. OCD ODTN=0 ,CALOUT=1
698 23:44:55.330842 3. OCD ODTN=1 ,CALOUT=1
699 23:44:55.330910 3. OCD ODTN=2 ,CALOUT=1
700 23:44:55.330988 3. OCD ODTN=3 ,CALOUT=1
701 23:44:55.331056 3. OCD ODTN=4 ,CALOUT=1
702 23:44:55.331134 3. OCD ODTN=5 ,CALOUT=1
703 23:44:55.331203 3. OCD ODTN=6 ,CALOUT=1
704 23:44:55.331271 3. OCD ODTN=7 ,CALOUT=0
705 23:44:55.331348
706 23:44:55.331415 3. OCD ODTN calibration OK! ODTN=7
707 23:44:55.331490
708 23:44:55.331558 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
709 23:44:55.331625 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
710 23:44:55.331701 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
711 23:44:55.331769
712 23:44:55.331836 K DRVP
713 23:44:55.331911 1. OCD DRVP=0 CALOUT=0
714 23:44:55.331980 1. OCD DRVP=1 CALOUT=0
715 23:44:55.332062 1. OCD DRVP=2 CALOUT=0
716 23:44:55.332176 1. OCD DRVP=3 CALOUT=0
717 23:44:55.332285 1. OCD DRVP=4 CALOUT=0
718 23:44:55.332348 1. OCD DRVP=5 CALOUT=0
719 23:44:55.332410 1. OCD DRVP=6 CALOUT=0
720 23:44:55.332479 1. OCD DRVP=7 CALOUT=0
721 23:44:55.332542 1. OCD DRVP=8 CALOUT=0
722 23:44:55.332603 1. OCD DRVP=9 CALOUT=0
723 23:44:55.332672 1. OCD DRVP=10 CALOUT=1
724 23:44:55.332734
725 23:44:55.332794 1. OCD DRVP calibration OK! DRVP=10
726 23:44:55.332864
727 23:44:55.332926
728 23:44:55.332985
729 23:44:55.333051 K ODTN
730 23:44:55.333112 3. OCD ODTN=0 ,CALOUT=1
731 23:44:55.333173 3. OCD ODTN=1 ,CALOUT=1
732 23:44:55.333242 3. OCD ODTN=2 ,CALOUT=1
733 23:44:55.333304 3. OCD ODTN=3 ,CALOUT=1
734 23:44:55.333365 3. OCD ODTN=4 ,CALOUT=1
735 23:44:55.333441 3. OCD ODTN=5 ,CALOUT=1
736 23:44:55.333508 3. OCD ODTN=6 ,CALOUT=1
737 23:44:55.333569 3. OCD ODTN=7 ,CALOUT=1
738 23:44:55.333640 3. OCD ODTN=8 ,CALOUT=1
739 23:44:55.333702 3. OCD ODTN=9 ,CALOUT=1
740 23:44:55.333763 3. OCD ODTN=10 ,CALOUT=1
741 23:44:55.333833 3. OCD ODTN=11 ,CALOUT=1
742 23:44:55.333894 3. OCD ODTN=12 ,CALOUT=1
743 23:44:55.333955 3. OCD ODTN=13 ,CALOUT=1
744 23:44:55.334029 3. OCD ODTN=14 ,CALOUT=1
745 23:44:55.334092 3. OCD ODTN=15 ,CALOUT=0
746 23:44:55.334152
747 23:44:55.334221 3. OCD ODTN calibration OK! ODTN=15
748 23:44:55.334303
749 23:44:55.334366 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
750 23:44:55.334437 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
751 23:44:55.334498 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
752 23:44:55.334566
753 23:44:55.334628 [DramcInit]
754 23:44:55.334687 AutoRefreshCKEOff AutoREF OFF
755 23:44:55.334746 DDRPhyPLLSetting-CKEOFF
756 23:44:55.334814 DDRPhyPLLSetting-CKEON
757 23:44:55.334873
758 23:44:55.334933 Enable WDQS
759 23:44:55.335006 ==
760 23:44:55.335066 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
761 23:44:55.335127 fsp= 1, odt_onoff= 1, Byte mode= 0
762 23:44:55.335197 ==
763 23:44:55.335257 [Duty_Offset_Calibration]
764 23:44:55.335317
765 23:44:55.335399 ===========================
766 23:44:55.335459 B0:1 B1:-1 CA:0
767 23:44:55.335528 ==
768 23:44:55.335589 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
769 23:44:55.335650 fsp= 1, odt_onoff= 1, Byte mode= 0
770 23:44:55.335716 ==
771 23:44:55.335791 [Duty_Offset_Calibration]
772 23:44:55.335852
773 23:44:55.335912 ===========================
774 23:44:55.335980 B0:0 B1:0 CA:0
775 23:44:55.336045 [ModeRegInit_LP4] CH0 RK0
776 23:44:55.336134 Write Rank0 MR13 =0x18
777 23:44:55.336212 Write Rank0 MR12 =0x5d
778 23:44:55.336272 Write Rank0 MR1 =0x56
779 23:44:55.336339 Write Rank0 MR2 =0x1a
780 23:44:55.336401 Write Rank0 MR11 =0x0
781 23:44:55.336460 Write Rank0 MR22 =0x38
782 23:44:55.336519 Write Rank0 MR14 =0x5d
783 23:44:55.336591 Write Rank0 MR3 =0x30
784 23:44:55.336650 Write Rank0 MR13 =0x58
785 23:44:55.336709 Write Rank0 MR12 =0x5d
786 23:44:55.336776 Write Rank0 MR1 =0x56
787 23:44:55.336836 Write Rank0 MR2 =0x2d
788 23:44:55.336895 Write Rank0 MR11 =0x23
789 23:44:55.336964 Write Rank0 MR22 =0x34
790 23:44:55.337023 Write Rank0 MR14 =0x10
791 23:44:55.337086 Write Rank0 MR3 =0x30
792 23:44:55.337154 Write Rank0 MR13 =0xd8
793 23:44:55.337213 [ModeRegInit_LP4] CH0 RK1
794 23:44:55.337273 Write Rank1 MR13 =0x18
795 23:44:55.337341 Write Rank1 MR12 =0x5d
796 23:44:55.337401 Write Rank1 MR1 =0x56
797 23:44:55.337474 Write Rank1 MR2 =0x1a
798 23:44:55.337548 Write Rank1 MR11 =0x0
799 23:44:55.337609 Write Rank1 MR22 =0x38
800 23:44:55.337669 Write Rank1 MR14 =0x5d
801 23:44:55.337737 Write Rank1 MR3 =0x30
802 23:44:55.337797 Write Rank1 MR13 =0x58
803 23:44:55.337856 Write Rank1 MR12 =0x5d
804 23:44:55.337925 Write Rank1 MR1 =0x56
805 23:44:55.337984 Write Rank1 MR2 =0x2d
806 23:44:55.338044 Write Rank1 MR11 =0x23
807 23:44:55.338112 Write Rank1 MR22 =0x34
808 23:44:55.338172 Write Rank1 MR14 =0x10
809 23:44:55.338231 Write Rank1 MR3 =0x30
810 23:44:55.338300 Write Rank1 MR13 =0xd8
811 23:44:55.338361 [ModeRegInit_LP4] CH1 RK0
812 23:44:55.338642 Write Rank0 MR13 =0x18
813 23:44:55.338716 Write Rank0 MR12 =0x5d
814 23:44:55.338777 Write Rank0 MR1 =0x56
815 23:44:55.338846 Write Rank0 MR2 =0x1a
816 23:44:55.338908 Write Rank0 MR11 =0x0
817 23:44:55.338967 Write Rank0 MR22 =0x38
818 23:44:55.339026 Write Rank0 MR14 =0x5d
819 23:44:55.339093 Write Rank0 MR3 =0x30
820 23:44:55.339153 Write Rank0 MR13 =0x58
821 23:44:55.339212 Write Rank0 MR12 =0x5d
822 23:44:55.339280 Write Rank0 MR1 =0x56
823 23:44:55.339340 Write Rank0 MR2 =0x2d
824 23:44:55.339400 Write Rank0 MR11 =0x23
825 23:44:55.339467 Write Rank0 MR22 =0x34
826 23:44:55.339527 Write Rank0 MR14 =0x10
827 23:44:55.339585 Write Rank0 MR3 =0x30
828 23:44:55.339651 Write Rank0 MR13 =0xd8
829 23:44:55.339723 [ModeRegInit_LP4] CH1 RK1
830 23:44:55.339786 Write Rank1 MR13 =0x18
831 23:44:55.339856 Write Rank1 MR12 =0x5d
832 23:44:55.339916 Write Rank1 MR1 =0x56
833 23:44:55.339976 Write Rank1 MR2 =0x1a
834 23:44:55.340044 Write Rank1 MR11 =0x0
835 23:44:55.340104 Write Rank1 MR22 =0x38
836 23:44:55.340164 Write Rank1 MR14 =0x5d
837 23:44:55.340232 Write Rank1 MR3 =0x30
838 23:44:55.340292 Write Rank1 MR13 =0x58
839 23:44:55.340351 Write Rank1 MR12 =0x5d
840 23:44:55.340419 Write Rank1 MR1 =0x56
841 23:44:55.340479 Write Rank1 MR2 =0x2d
842 23:44:55.340539 Write Rank1 MR11 =0x23
843 23:44:55.340611 Write Rank1 MR22 =0x34
844 23:44:55.340672 Write Rank1 MR14 =0x10
845 23:44:55.340731 Write Rank1 MR3 =0x30
846 23:44:55.340800 Write Rank1 MR13 =0xd8
847 23:44:55.340860 match AC timing 3
848 23:44:55.340920 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
849 23:44:55.341002 DramC Write-DBI off
850 23:44:55.341063 DramC Read-DBI off
851 23:44:55.341123 Write Rank0 MR13 =0x59
852 23:44:55.341194 ==
853 23:44:55.341255 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
854 23:44:55.341316 fsp= 1, odt_onoff= 1, Byte mode= 0
855 23:44:55.341390 ==
856 23:44:55.341466 === u2Vref_new: 0x56 --> 0x2d
857 23:44:55.341531 === u2Vref_new: 0x58 --> 0x38
858 23:44:55.341605 === u2Vref_new: 0x5a --> 0x39
859 23:44:55.341667 === u2Vref_new: 0x5c --> 0x3c
860 23:44:55.341727 === u2Vref_new: 0x5e --> 0x3d
861 23:44:55.341795 === u2Vref_new: 0x60 --> 0xa0
862 23:44:55.341857 [CA 0] Center 34 (6~63) winsize 58
863 23:44:55.341916 [CA 1] Center 35 (7~63) winsize 57
864 23:44:55.341985 [CA 2] Center 28 (-1~58) winsize 60
865 23:44:55.342046 [CA 3] Center 23 (-4~51) winsize 56
866 23:44:55.342105 [CA 4] Center 24 (-4~53) winsize 58
867 23:44:55.342172 [CA 5] Center 29 (0~59) winsize 60
868 23:44:55.342232
869 23:44:55.342292 [CATrainingPosCal] consider 1 rank data
870 23:44:55.342364 u2DelayCellTimex100 = 744/100 ps
871 23:44:55.342425 CA0 delay=34 (6~63),Diff = 11 PI (14 cell)
872 23:44:55.342485 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
873 23:44:55.342552 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
874 23:44:55.342613 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
875 23:44:55.342673 CA4 delay=24 (-4~53),Diff = 1 PI (1 cell)
876 23:44:55.342743 CA5 delay=29 (0~59),Diff = 6 PI (7 cell)
877 23:44:55.342805
878 23:44:55.342865 CA PerBit enable=1, Macro0, CA PI delay=23
879 23:44:55.342933 === u2Vref_new: 0x5c --> 0x3c
880 23:44:55.342994
881 23:44:55.343054 Vref(ca) range 1: 28
882 23:44:55.343125
883 23:44:55.343187 CS Dly= 7 (38-0-32)
884 23:44:55.343247 Write Rank0 MR13 =0xd8
885 23:44:55.343312 Write Rank0 MR13 =0xd8
886 23:44:55.343372 Write Rank0 MR12 =0x5c
887 23:44:55.343432 Write Rank1 MR13 =0x59
888 23:44:55.343491 ==
889 23:44:55.343560 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
890 23:44:55.343620 fsp= 1, odt_onoff= 1, Byte mode= 0
891 23:44:55.343687 ==
892 23:44:55.343749 === u2Vref_new: 0x56 --> 0x2d
893 23:44:55.343809 === u2Vref_new: 0x58 --> 0x38
894 23:44:55.343868 === u2Vref_new: 0x5a --> 0x39
895 23:44:55.343936 === u2Vref_new: 0x5c --> 0x3c
896 23:44:55.343996 === u2Vref_new: 0x5e --> 0x3d
897 23:44:55.344056 === u2Vref_new: 0x60 --> 0xa0
898 23:44:55.344126 [CA 0] Center 35 (7~63) winsize 57
899 23:44:55.344186 [CA 1] Center 35 (7~63) winsize 57
900 23:44:55.344246 [CA 2] Center 28 (-1~58) winsize 60
901 23:44:55.344313 [CA 3] Center 22 (-6~51) winsize 58
902 23:44:55.344373 [CA 4] Center 23 (-5~51) winsize 57
903 23:44:55.344432 [CA 5] Center 28 (-1~58) winsize 60
904 23:44:55.344500
905 23:44:55.344560 [CATrainingPosCal] consider 2 rank data
906 23:44:55.344620 u2DelayCellTimex100 = 744/100 ps
907 23:44:55.344688 CA0 delay=35 (7~63),Diff = 12 PI (15 cell)
908 23:44:55.344748 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
909 23:44:55.344808 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
910 23:44:55.344877 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
911 23:44:55.344937 CA4 delay=23 (-4~51),Diff = 0 PI (0 cell)
912 23:44:55.345001 CA5 delay=29 (0~58),Diff = 6 PI (7 cell)
913 23:44:55.345069
914 23:44:55.345129 CA PerBit enable=1, Macro0, CA PI delay=23
915 23:44:55.345189 === u2Vref_new: 0x5e --> 0x3d
916 23:44:55.345261
917 23:44:55.345321 Vref(ca) range 1: 30
918 23:44:55.345381
919 23:44:55.345457 CS Dly= 5 (36-0-32)
920 23:44:55.345552 Write Rank1 MR13 =0xd8
921 23:44:55.345655 Write Rank1 MR13 =0xd8
922 23:44:55.345732 Write Rank1 MR12 =0x5e
923 23:44:55.345793 [RankSwap] Rank num 2, (Multi 1), Rank 0
924 23:44:55.345869 Write Rank0 MR2 =0xad
925 23:44:55.345929 [Write Leveling]
926 23:44:55.345995 delay byte0 byte1 byte2 byte3
927 23:44:55.346057
928 23:44:55.346118 10 0 0
929 23:44:55.346184 11 0 0
930 23:44:55.346248 12 0 0
931 23:44:55.346320 13 0 0
932 23:44:55.346407 14 0 0
933 23:44:55.346470 15 0 0
934 23:44:55.346531 16 0 0
935 23:44:55.346607 17 0 0
936 23:44:55.346668 18 0 0
937 23:44:55.346728 19 0 0
938 23:44:55.346795 20 0 0
939 23:44:55.346856 21 0 0
940 23:44:55.346917 22 0 0
941 23:44:55.346984 23 0 0
942 23:44:55.347058 24 0 0
943 23:44:55.347120 25 0 ff
944 23:44:55.347181 26 0 ff
945 23:44:55.347250 27 0 ff
946 23:44:55.347311 28 0 ff
947 23:44:55.347371 29 0 ff
948 23:44:55.347439 30 0 ff
949 23:44:55.347500 31 ff ff
950 23:44:55.347561 32 ff ff
951 23:44:55.347630 33 ff ff
952 23:44:55.347692 34 ff ff
953 23:44:55.347751 35 ff ff
954 23:44:55.347821 36 ff ff
955 23:44:55.347882 37 ff ff
956 23:44:55.347942 pass bytecount = 0xff (0xff: all bytes pass)
957 23:44:55.348009
958 23:44:55.348070 DQS0 dly: 31
959 23:44:55.348130 DQS1 dly: 25
960 23:44:55.348197 Write Rank0 MR2 =0x2d
961 23:44:55.348259 [RankSwap] Rank num 2, (Multi 1), Rank 0
962 23:44:55.348319 Write Rank0 MR1 =0xd6
963 23:44:55.348386 [Gating]
964 23:44:55.348446 ==
965 23:44:55.348505 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
966 23:44:55.348573 fsp= 1, odt_onoff= 1, Byte mode= 0
967 23:44:55.348634 ==
968 23:44:55.348693 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
969 23:44:55.348762 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
970 23:44:55.349026 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
971 23:44:55.349096 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
972 23:44:55.349170 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
973 23:44:55.349232 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
974 23:44:55.349293 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
975 23:44:55.349362 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
976 23:44:55.349423 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
977 23:44:55.349519 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
978 23:44:55.349585 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(1 0)(1 0)| 0
979 23:44:55.349647 3 2 12 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
980 23:44:55.349715 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
981 23:44:55.349780 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
982 23:44:55.349842 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
983 23:44:55.349915 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
984 23:44:55.349978 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
985 23:44:55.350039 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
986 23:44:55.350107 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
987 23:44:55.350170 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
988 23:44:55.350230 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
989 23:44:55.350302 [Byte 0] Lead/lag Transition tap number (1)
990 23:44:55.350365 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
991 23:44:55.350425 [Byte 1] Lead/lag falling Transition (3, 3, 20)
992 23:44:55.350492 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
993 23:44:55.350553 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
994 23:44:55.350614 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
995 23:44:55.350686 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
996 23:44:55.350750 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
997 23:44:55.350810 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
998 23:44:55.350879 3 4 16 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
999 23:44:55.350941 3 4 20 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
1000 23:44:55.351001 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1001 23:44:55.351074 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1002 23:44:55.351137 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1003 23:44:55.351198 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1004 23:44:55.351271 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1005 23:44:55.351333 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1006 23:44:55.351395 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1007 23:44:55.351462 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1008 23:44:55.351524 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1009 23:44:55.351585 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1010 23:44:55.351654 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1011 23:44:55.351718 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1012 23:44:55.351780 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1013 23:44:55.351848 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1014 23:44:55.351909 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1015 23:44:55.362404 [Byte 0] Lead/lag Transition tap number (2)
1016 23:44:55.362507 3 6 12 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1017 23:44:55.362583 [Byte 1] Lead/lag Transition tap number (3)
1018 23:44:55.362660 3 6 16 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
1019 23:44:55.362742 [Byte 0]First pass (3, 6, 16)
1020 23:44:55.362808 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1021 23:44:55.362879 [Byte 1]First pass (3, 6, 20)
1022 23:44:55.362963 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1023 23:44:55.363030 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1024 23:44:55.363105 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1025 23:44:55.363179 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1026 23:44:55.363245 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1027 23:44:55.363317 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1028 23:44:55.363379 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1029 23:44:55.363440 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1030 23:44:55.363511 All bytes gating window > 1UI, Early break!
1031 23:44:55.363571
1032 23:44:55.363671 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
1033 23:44:55.363736
1034 23:44:55.363796 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
1035 23:44:55.363865
1036 23:44:55.363925
1037 23:44:55.363985
1038 23:44:55.364053 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1039 23:44:55.364114
1040 23:44:55.364172 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1041 23:44:55.364238
1042 23:44:55.364298
1043 23:44:55.364356 Write Rank0 MR1 =0x56
1044 23:44:55.364422
1045 23:44:55.364482 best RODT dly(2T, 0.5T) = (2, 3)
1046 23:44:55.364541
1047 23:44:55.364607 best RODT dly(2T, 0.5T) = (2, 3)
1048 23:44:55.364667 ==
1049 23:44:55.364725 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1050 23:44:55.364784 fsp= 1, odt_onoff= 1, Byte mode= 0
1051 23:44:55.364852 ==
1052 23:44:55.364912 Start DQ dly to find pass range UseTestEngine =0
1053 23:44:55.364978 x-axis: bit #, y-axis: DQ dly (-127~63)
1054 23:44:55.365052 RX Vref Scan = 0
1055 23:44:55.365159 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1056 23:44:55.365270 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1057 23:44:55.365373 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1058 23:44:55.365491 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1059 23:44:55.365556 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1060 23:44:55.365626 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1061 23:44:55.365686 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1062 23:44:55.365754 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1063 23:44:55.365816 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1064 23:44:55.365876 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1065 23:44:55.365936 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1066 23:44:55.366005 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1067 23:44:55.366066 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1068 23:44:55.366126 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1069 23:44:55.366195 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1070 23:44:55.366254 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1071 23:44:55.366314 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1072 23:44:55.366382 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1073 23:44:55.366645 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1074 23:44:55.366722 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1075 23:44:55.366784 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1076 23:44:55.366845 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1077 23:44:55.366912 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1078 23:44:55.366973 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1079 23:44:55.367033 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1080 23:44:55.367099 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1081 23:44:55.367161 0, [0] xxxoxxxx ooxoooxx [MSB]
1082 23:44:55.367221 1, [0] xxxoxoox ooxoooxx [MSB]
1083 23:44:55.367281 2, [0] xxxoxoox ooxoooox [MSB]
1084 23:44:55.367349 3, [0] xxxoxoox ooxoooox [MSB]
1085 23:44:55.367409 4, [0] xxxoxoox ooxoooox [MSB]
1086 23:44:55.367469 5, [0] xxxooooo ooxooooo [MSB]
1087 23:44:55.367538 6, [0] oooooooo ooxooooo [MSB]
1088 23:44:55.367597 7, [0] oooooooo ooxooooo [MSB]
1089 23:44:55.367657 32, [0] oooxoooo oooooooo [MSB]
1090 23:44:55.367725 33, [0] oooxoooo xooooooo [MSB]
1091 23:44:55.367785 34, [0] oooxoooo xooxoooo [MSB]
1092 23:44:55.367845 35, [0] oooxoooo xxoxoooo [MSB]
1093 23:44:55.367914 36, [0] oooxoxoo xxoxxoxo [MSB]
1094 23:44:55.367974 37, [0] oooxoxxx xxoxxxxo [MSB]
1095 23:44:55.368034 38, [0] oooxoxxx xxoxxxxo [MSB]
1096 23:44:55.368102 39, [0] oooxoxxx xxoxxxxx [MSB]
1097 23:44:55.368162 40, [0] oooxoxxx xxoxxxxx [MSB]
1098 23:44:55.368222 41, [0] xxxxxxxx xxoxxxxx [MSB]
1099 23:44:55.368290 42, [0] xxxxxxxx xxoxxxxx [MSB]
1100 23:44:55.368350 43, [0] xxxxxxxx xxxxxxxx [MSB]
1101 23:44:55.368413 iDelay=43, Bit 0, Center 23 (6 ~ 40) 35
1102 23:44:55.368531 iDelay=43, Bit 1, Center 23 (6 ~ 40) 35
1103 23:44:55.368598 iDelay=43, Bit 2, Center 23 (6 ~ 40) 35
1104 23:44:55.368667 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
1105 23:44:55.368728 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
1106 23:44:55.368787 iDelay=43, Bit 5, Center 18 (1 ~ 35) 35
1107 23:44:55.368873 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1108 23:44:55.368934 iDelay=43, Bit 7, Center 20 (5 ~ 36) 32
1109 23:44:55.368994 iDelay=43, Bit 8, Center 14 (-3 ~ 32) 36
1110 23:44:55.369062 iDelay=43, Bit 9, Center 17 (0 ~ 34) 35
1111 23:44:55.369122 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1112 23:44:55.369180 iDelay=43, Bit 11, Center 15 (-2 ~ 33) 36
1113 23:44:55.369255 iDelay=43, Bit 12, Center 17 (0 ~ 35) 36
1114 23:44:55.369315 iDelay=43, Bit 13, Center 18 (0 ~ 36) 37
1115 23:44:55.369373 iDelay=43, Bit 14, Center 18 (2 ~ 35) 34
1116 23:44:55.369442 iDelay=43, Bit 15, Center 21 (5 ~ 38) 34
1117 23:44:55.369518 ==
1118 23:44:55.369578 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1119 23:44:55.369638 fsp= 1, odt_onoff= 1, Byte mode= 0
1120 23:44:55.369707 ==
1121 23:44:55.369766 DQS Delay:
1122 23:44:55.369831 DQS0 = 0, DQS1 = 0
1123 23:44:55.369891 DQM Delay:
1124 23:44:55.369949 DQM0 = 20, DQM1 = 18
1125 23:44:55.370007 DQ Delay:
1126 23:44:55.370074 DQ0 =23, DQ1 =23, DQ2 =23, DQ3 =14
1127 23:44:55.370133 DQ4 =22, DQ5 =18, DQ6 =18, DQ7 =20
1128 23:44:55.370191 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =15
1129 23:44:55.370259 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
1130 23:44:55.370318
1131 23:44:55.370376
1132 23:44:55.370442 DramC Write-DBI off
1133 23:44:55.370500 ==
1134 23:44:55.370560 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1135 23:44:55.370628 fsp= 1, odt_onoff= 1, Byte mode= 0
1136 23:44:55.370691 ==
1137 23:44:55.370751 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1138 23:44:55.370818
1139 23:44:55.370877 Begin, DQ Scan Range 921~1177
1140 23:44:55.370936
1141 23:44:55.371006
1142 23:44:55.371067 TX Vref Scan disable
1143 23:44:55.371126 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1144 23:44:55.371195 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1145 23:44:55.371257 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1146 23:44:55.371317 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1147 23:44:55.371386 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1148 23:44:55.371448 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1149 23:44:55.371508 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1150 23:44:55.371575 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1151 23:44:55.371636 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1152 23:44:55.371697 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1153 23:44:55.371765 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1154 23:44:55.371827 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1155 23:44:55.371887 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1156 23:44:55.371954 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1157 23:44:55.372015 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1158 23:44:55.372075 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1159 23:44:55.372135 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1160 23:44:55.372205 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1161 23:44:55.372265 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1162 23:44:55.372332 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1163 23:44:55.372428 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1164 23:44:55.372492 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1165 23:44:55.372561 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1166 23:44:55.372622 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1167 23:44:55.372683 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1168 23:44:55.372752 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1169 23:44:55.372813 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1170 23:44:55.372873 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1171 23:44:55.372942 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1172 23:44:55.373003 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1173 23:44:55.373064 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1174 23:44:55.373133 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1175 23:44:55.373194 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1176 23:44:55.373255 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1177 23:44:55.373323 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1178 23:44:55.373385 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1179 23:44:55.373456 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1180 23:44:55.373528 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1181 23:44:55.373590 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1182 23:44:55.373650 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1183 23:44:55.373720 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1184 23:44:55.373781 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1185 23:44:55.373841 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1186 23:44:55.373910 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1187 23:44:55.373971 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1188 23:44:55.374031 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1189 23:44:55.374100 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1190 23:44:55.374161 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1191 23:44:55.374421 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1192 23:44:55.374507 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1193 23:44:55.374570 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1194 23:44:55.374631 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1195 23:44:55.374705 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1196 23:44:55.374766 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1197 23:44:55.374835 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1198 23:44:55.374903 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1199 23:44:55.374964 977 |3 6 17|[0] xxxoooox oooooooo [MSB]
1200 23:44:55.375025 978 |3 6 18|[0] xooooooo oooooooo [MSB]
1201 23:44:55.375096 990 |3 6 30|[0] oooooooo xooxxxoo [MSB]
1202 23:44:55.375157 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1203 23:44:55.375217 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1204 23:44:55.375285 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1205 23:44:55.375346 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1206 23:44:55.375406 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1207 23:44:55.375475 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1208 23:44:55.375537 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1209 23:44:55.375597 Byte0, DQ PI dly=985, DQM PI dly= 985
1210 23:44:55.375664 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1211 23:44:55.375724
1212 23:44:55.375783 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1213 23:44:55.375849
1214 23:44:55.375910 Byte1, DQ PI dly=980, DQM PI dly= 980
1215 23:44:55.375969 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1216 23:44:55.376035
1217 23:44:55.376096 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1218 23:44:55.376155
1219 23:44:55.376215 ==
1220 23:44:55.376283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1221 23:44:55.376343 fsp= 1, odt_onoff= 1, Byte mode= 0
1222 23:44:55.376408 ==
1223 23:44:55.376469 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1224 23:44:55.376528
1225 23:44:55.376586 Begin, DQ Scan Range 956~1020
1226 23:44:55.376658 Write Rank0 MR14 =0x0
1227 23:44:55.376718
1228 23:44:55.376777 CH=0, VrefRange= 0, VrefLevel = 0
1229 23:44:55.376846 TX Bit0 (982~993) 12 987, Bit8 (969~984) 16 976,
1230 23:44:55.376906 TX Bit1 (979~993) 15 986, Bit9 (971~985) 15 978,
1231 23:44:55.376965 TX Bit2 (981~993) 13 987, Bit10 (976~990) 15 983,
1232 23:44:55.377033 TX Bit3 (976~988) 13 982, Bit11 (970~983) 14 976,
1233 23:44:55.377093 TX Bit4 (979~992) 14 985, Bit12 (973~983) 11 978,
1234 23:44:55.377152 TX Bit5 (977~991) 15 984, Bit13 (974~983) 10 978,
1235 23:44:55.377220 TX Bit6 (978~991) 14 984, Bit14 (974~989) 16 981,
1236 23:44:55.377280 TX Bit7 (979~992) 14 985, Bit15 (976~990) 15 983,
1237 23:44:55.377339
1238 23:44:55.377406 Write Rank0 MR14 =0x2
1239 23:44:55.377480
1240 23:44:55.377540 CH=0, VrefRange= 0, VrefLevel = 2
1241 23:44:55.377614 TX Bit0 (982~993) 12 987, Bit8 (969~985) 17 977,
1242 23:44:55.377674 TX Bit1 (979~993) 15 986, Bit9 (971~986) 16 978,
1243 23:44:55.377734 TX Bit2 (980~994) 15 987, Bit10 (977~991) 15 984,
1244 23:44:55.377803 TX Bit3 (975~989) 15 982, Bit11 (970~983) 14 976,
1245 23:44:55.377864 TX Bit4 (979~992) 14 985, Bit12 (973~984) 12 978,
1246 23:44:55.377923 TX Bit5 (977~991) 15 984, Bit13 (973~984) 12 978,
1247 23:44:55.377991 TX Bit6 (978~992) 15 985, Bit14 (974~989) 16 981,
1248 23:44:55.378051 TX Bit7 (979~993) 15 986, Bit15 (975~991) 17 983,
1249 23:44:55.378110
1250 23:44:55.378178 Write Rank0 MR14 =0x4
1251 23:44:55.378237
1252 23:44:55.378296 CH=0, VrefRange= 0, VrefLevel = 4
1253 23:44:55.378363 TX Bit0 (981~994) 14 987, Bit8 (969~985) 17 977,
1254 23:44:55.378423 TX Bit1 (979~994) 16 986, Bit9 (970~987) 18 978,
1255 23:44:55.378482 TX Bit2 (980~994) 15 987, Bit10 (976~991) 16 983,
1256 23:44:55.378549 TX Bit3 (975~991) 17 983, Bit11 (969~984) 16 976,
1257 23:44:55.378610 TX Bit4 (978~993) 16 985, Bit12 (973~985) 13 979,
1258 23:44:55.378669 TX Bit5 (977~992) 16 984, Bit13 (973~985) 13 979,
1259 23:44:55.378736 TX Bit6 (978~992) 15 985, Bit14 (974~989) 16 981,
1260 23:44:55.378797 TX Bit7 (979~994) 16 986, Bit15 (975~991) 17 983,
1261 23:44:55.378856
1262 23:44:55.378923 Write Rank0 MR14 =0x6
1263 23:44:55.378983
1264 23:44:55.379042 CH=0, VrefRange= 0, VrefLevel = 6
1265 23:44:55.379108 TX Bit0 (980~994) 15 987, Bit8 (969~986) 18 977,
1266 23:44:55.379169 TX Bit1 (978~994) 17 986, Bit9 (970~988) 19 979,
1267 23:44:55.379228 TX Bit2 (980~995) 16 987, Bit10 (976~992) 17 984,
1268 23:44:55.379294 TX Bit3 (975~991) 17 983, Bit11 (969~985) 17 977,
1269 23:44:55.379355 TX Bit4 (978~993) 16 985, Bit12 (972~986) 15 979,
1270 23:44:55.379414 TX Bit5 (977~992) 16 984, Bit13 (972~986) 15 979,
1271 23:44:55.379473 TX Bit6 (977~993) 17 985, Bit14 (972~990) 19 981,
1272 23:44:55.379540 TX Bit7 (978~994) 17 986, Bit15 (976~992) 17 984,
1273 23:44:55.379600
1274 23:44:55.379659 Write Rank0 MR14 =0x8
1275 23:44:55.379727
1276 23:44:55.379786 CH=0, VrefRange= 0, VrefLevel = 8
1277 23:44:55.379846 TX Bit0 (980~996) 17 988, Bit8 (968~987) 20 977,
1278 23:44:55.379913 TX Bit1 (978~995) 18 986, Bit9 (970~989) 20 979,
1279 23:44:55.379973 TX Bit2 (979~996) 18 987, Bit10 (975~993) 19 984,
1280 23:44:55.380033 TX Bit3 (975~991) 17 983, Bit11 (969~986) 18 977,
1281 23:44:55.380113 TX Bit4 (978~994) 17 986, Bit12 (971~987) 17 979,
1282 23:44:55.380173 TX Bit5 (976~992) 17 984, Bit13 (972~987) 16 979,
1283 23:44:55.380233 TX Bit6 (977~993) 17 985, Bit14 (972~990) 19 981,
1284 23:44:55.380302 TX Bit7 (978~995) 18 986, Bit15 (975~993) 19 984,
1285 23:44:55.380361
1286 23:44:55.380420 Write Rank0 MR14 =0xa
1287 23:44:55.380490
1288 23:44:55.380549 CH=0, VrefRange= 0, VrefLevel = 10
1289 23:44:55.380609 TX Bit0 (979~996) 18 987, Bit8 (968~988) 21 978,
1290 23:44:55.380675 TX Bit1 (978~996) 19 987, Bit9 (969~989) 21 979,
1291 23:44:55.380737 TX Bit2 (979~997) 19 988, Bit10 (975~993) 19 984,
1292 23:44:55.380797 TX Bit3 (974~992) 19 983, Bit11 (969~987) 19 978,
1293 23:44:55.380856 TX Bit4 (978~995) 18 986, Bit12 (971~988) 18 979,
1294 23:44:55.380924 TX Bit5 (976~993) 18 984, Bit13 (971~988) 18 979,
1295 23:44:55.380984 TX Bit6 (977~994) 18 985, Bit14 (972~991) 20 981,
1296 23:44:55.381245 TX Bit7 (978~996) 19 987, Bit15 (974~993) 20 983,
1297 23:44:55.381325
1298 23:44:55.381388 Write Rank0 MR14 =0xc
1299 23:44:55.381472
1300 23:44:55.381536 CH=0, VrefRange= 0, VrefLevel = 12
1301 23:44:55.381596 TX Bit0 (979~997) 19 988, Bit8 (968~989) 22 978,
1302 23:44:55.381664 TX Bit1 (978~997) 20 987, Bit9 (969~989) 21 979,
1303 23:44:55.381725 TX Bit2 (979~997) 19 988, Bit10 (975~994) 20 984,
1304 23:44:55.381785 TX Bit3 (974~992) 19 983, Bit11 (969~987) 19 978,
1305 23:44:55.381852 TX Bit4 (978~995) 18 986, Bit12 (970~989) 20 979,
1306 23:44:55.381913 TX Bit5 (976~993) 18 984, Bit13 (971~989) 19 980,
1307 23:44:55.381973 TX Bit6 (977~995) 19 986, Bit14 (971~991) 21 981,
1308 23:44:55.382039 TX Bit7 (978~997) 20 987, Bit15 (975~994) 20 984,
1309 23:44:55.382099
1310 23:44:55.382158 Write Rank0 MR14 =0xe
1311 23:44:55.382223
1312 23:44:55.382283 CH=0, VrefRange= 0, VrefLevel = 14
1313 23:44:55.382343 TX Bit0 (979~998) 20 988, Bit8 (968~989) 22 978,
1314 23:44:55.382409 TX Bit1 (978~998) 21 988, Bit9 (969~990) 22 979,
1315 23:44:55.382470 TX Bit2 (978~998) 21 988, Bit10 (975~995) 21 985,
1316 23:44:55.382529 TX Bit3 (974~992) 19 983, Bit11 (968~988) 21 978,
1317 23:44:55.382589 TX Bit4 (978~995) 18 986, Bit12 (970~989) 20 979,
1318 23:44:55.382656 TX Bit5 (976~994) 19 985, Bit13 (970~989) 20 979,
1319 23:44:55.382716 TX Bit6 (976~996) 21 986, Bit14 (971~991) 21 981,
1320 23:44:55.382776 TX Bit7 (978~998) 21 988, Bit15 (974~995) 22 984,
1321 23:44:55.382843
1322 23:44:55.382902 Write Rank0 MR14 =0x10
1323 23:44:55.382960
1324 23:44:55.383026 CH=0, VrefRange= 0, VrefLevel = 16
1325 23:44:55.383086 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1326 23:44:55.383145 TX Bit1 (978~998) 21 988, Bit9 (969~990) 22 979,
1327 23:44:55.383218 TX Bit2 (978~998) 21 988, Bit10 (974~996) 23 985,
1328 23:44:55.383280 TX Bit3 (974~992) 19 983, Bit11 (968~989) 22 978,
1329 23:44:55.383340 TX Bit4 (978~997) 20 987, Bit12 (970~990) 21 980,
1330 23:44:55.383408 TX Bit5 (976~994) 19 985, Bit13 (970~989) 20 979,
1331 23:44:55.383469 TX Bit6 (976~996) 21 986, Bit14 (970~992) 23 981,
1332 23:44:55.383528 TX Bit7 (977~998) 22 987, Bit15 (974~995) 22 984,
1333 23:44:55.383595
1334 23:44:55.383656 Write Rank0 MR14 =0x12
1335 23:44:55.383714
1336 23:44:55.383783 CH=0, VrefRange= 0, VrefLevel = 18
1337 23:44:55.383844 TX Bit0 (978~999) 22 988, Bit8 (967~990) 24 978,
1338 23:44:55.383904 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
1339 23:44:55.383970 TX Bit2 (978~999) 22 988, Bit10 (974~997) 24 985,
1340 23:44:55.384031 TX Bit3 (973~993) 21 983, Bit11 (968~989) 22 978,
1341 23:44:55.384090 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1342 23:44:55.384160 TX Bit5 (975~994) 20 984, Bit13 (970~990) 21 980,
1343 23:44:55.384221 TX Bit6 (976~997) 22 986, Bit14 (970~992) 23 981,
1344 23:44:55.384279 TX Bit7 (977~999) 23 988, Bit15 (973~996) 24 984,
1345 23:44:55.384346
1346 23:44:55.384406 Write Rank0 MR14 =0x14
1347 23:44:55.384465
1348 23:44:55.384531 CH=0, VrefRange= 0, VrefLevel = 20
1349 23:44:55.384592 TX Bit0 (978~999) 22 988, Bit8 (967~990) 24 978,
1350 23:44:55.384652 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
1351 23:44:55.384711 TX Bit2 (978~999) 22 988, Bit10 (974~997) 24 985,
1352 23:44:55.384779 TX Bit3 (973~993) 21 983, Bit11 (968~989) 22 978,
1353 23:44:55.384839 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1354 23:44:55.384898 TX Bit5 (975~995) 21 985, Bit13 (969~990) 22 979,
1355 23:44:55.384965 TX Bit6 (976~997) 22 986, Bit14 (970~993) 24 981,
1356 23:44:55.385024 TX Bit7 (977~999) 23 988, Bit15 (973~996) 24 984,
1357 23:44:55.385084
1358 23:44:55.385151 Write Rank0 MR14 =0x16
1359 23:44:55.385210
1360 23:44:55.385268 CH=0, VrefRange= 0, VrefLevel = 22
1361 23:44:55.385336 TX Bit0 (978~999) 22 988, Bit8 (967~990) 24 978,
1362 23:44:55.385396 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1363 23:44:55.385468 TX Bit2 (978~999) 22 988, Bit10 (973~997) 25 985,
1364 23:44:55.385539 TX Bit3 (972~993) 22 982, Bit11 (967~990) 24 978,
1365 23:44:55.385598 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1366 23:44:55.385657 TX Bit5 (975~996) 22 985, Bit13 (969~990) 22 979,
1367 23:44:55.385740 TX Bit6 (975~998) 24 986, Bit14 (969~993) 25 981,
1368 23:44:55.385800 TX Bit7 (977~999) 23 988, Bit15 (973~997) 25 985,
1369 23:44:55.385858
1370 23:44:55.385929 Write Rank0 MR14 =0x18
1371 23:44:55.385989
1372 23:44:55.386047 CH=0, VrefRange= 0, VrefLevel = 24
1373 23:44:55.386117 TX Bit0 (978~1000) 23 989, Bit8 (967~991) 25 979,
1374 23:44:55.386177 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1375 23:44:55.386236 TX Bit2 (978~1000) 23 989, Bit10 (973~997) 25 985,
1376 23:44:55.386303 TX Bit3 (972~994) 23 983, Bit11 (967~990) 24 978,
1377 23:44:55.386364 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
1378 23:44:55.386424 TX Bit5 (975~997) 23 986, Bit13 (969~991) 23 980,
1379 23:44:55.386483 TX Bit6 (975~998) 24 986, Bit14 (969~993) 25 981,
1380 23:44:55.386550 TX Bit7 (977~1000) 24 988, Bit15 (973~997) 25 985,
1381 23:44:55.386610
1382 23:44:55.386668 Write Rank0 MR14 =0x1a
1383 23:44:55.386739
1384 23:44:55.386798 CH=0, VrefRange= 0, VrefLevel = 26
1385 23:44:55.386856 TX Bit0 (978~1000) 23 989, Bit8 (966~990) 25 978,
1386 23:44:55.386924 TX Bit1 (977~1000) 24 988, Bit9 (968~992) 25 980,
1387 23:44:55.386983 TX Bit2 (977~1000) 24 988, Bit10 (973~998) 26 985,
1388 23:44:55.387043 TX Bit3 (971~994) 24 982, Bit11 (967~990) 24 978,
1389 23:44:55.387111 TX Bit4 (976~999) 24 987, Bit12 (969~991) 23 980,
1390 23:44:55.387171 TX Bit5 (974~997) 24 985, Bit13 (969~991) 23 980,
1391 23:44:55.387230 TX Bit6 (975~999) 25 987, Bit14 (969~994) 26 981,
1392 23:44:55.387297 TX Bit7 (977~1000) 24 988, Bit15 (971~997) 27 984,
1393 23:44:55.387356
1394 23:44:55.387414 Write Rank0 MR14 =0x1c
1395 23:44:55.387481
1396 23:44:55.387541 CH=0, VrefRange= 0, VrefLevel = 28
1397 23:44:55.387601 TX Bit0 (978~1000) 23 989, Bit8 (966~990) 25 978,
1398 23:44:55.387669 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
1399 23:44:55.387927 TX Bit2 (977~1000) 24 988, Bit10 (972~998) 27 985,
1400 23:44:55.387994 TX Bit3 (971~994) 24 982, Bit11 (967~991) 25 979,
1401 23:44:55.388064 TX Bit4 (976~999) 24 987, Bit12 (968~992) 25 980,
1402 23:44:55.388124 TX Bit5 (974~998) 25 986, Bit13 (969~991) 23 980,
1403 23:44:55.388183 TX Bit6 (975~999) 25 987, Bit14 (969~995) 27 982,
1404 23:44:55.388250 TX Bit7 (977~1000) 24 988, Bit15 (971~998) 28 984,
1405 23:44:55.388310
1406 23:44:55.388368 Write Rank0 MR14 =0x1e
1407 23:44:55.388435
1408 23:44:55.388495 CH=0, VrefRange= 0, VrefLevel = 30
1409 23:44:55.388554 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1410 23:44:55.388620 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1411 23:44:55.388680 TX Bit2 (978~1001) 24 989, Bit10 (972~997) 26 984,
1412 23:44:55.388739 TX Bit3 (971~994) 24 982, Bit11 (967~991) 25 979,
1413 23:44:55.388805 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1414 23:44:55.388866 TX Bit5 (974~997) 24 985, Bit13 (969~992) 24 980,
1415 23:44:55.388924 TX Bit6 (975~999) 25 987, Bit14 (969~995) 27 982,
1416 23:44:55.388989 TX Bit7 (976~1000) 25 988, Bit15 (971~997) 27 984,
1417 23:44:55.389049
1418 23:44:55.389107 Write Rank0 MR14 =0x20
1419 23:44:55.389166
1420 23:44:55.389237 CH=0, VrefRange= 0, VrefLevel = 32
1421 23:44:55.389297 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1422 23:44:55.389356 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1423 23:44:55.389425 TX Bit2 (978~1001) 24 989, Bit10 (972~997) 26 984,
1424 23:44:55.389500 TX Bit3 (971~994) 24 982, Bit11 (967~991) 25 979,
1425 23:44:55.389560 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1426 23:44:55.389630 TX Bit5 (974~997) 24 985, Bit13 (969~992) 24 980,
1427 23:44:55.389690 TX Bit6 (975~999) 25 987, Bit14 (969~995) 27 982,
1428 23:44:55.389756 TX Bit7 (976~1000) 25 988, Bit15 (971~997) 27 984,
1429 23:44:55.389853
1430 23:44:55.389916 Write Rank0 MR14 =0x22
1431 23:44:55.389985
1432 23:44:55.390045 CH=0, VrefRange= 0, VrefLevel = 34
1433 23:44:55.390104 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1434 23:44:55.390172 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1435 23:44:55.390232 TX Bit2 (978~1001) 24 989, Bit10 (972~997) 26 984,
1436 23:44:55.390291 TX Bit3 (971~994) 24 982, Bit11 (967~991) 25 979,
1437 23:44:55.390359 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1438 23:44:55.390420 TX Bit5 (974~997) 24 985, Bit13 (969~992) 24 980,
1439 23:44:55.390479 TX Bit6 (975~999) 25 987, Bit14 (969~995) 27 982,
1440 23:44:55.390547 TX Bit7 (976~1000) 25 988, Bit15 (971~997) 27 984,
1441 23:44:55.390606
1442 23:44:55.390664 Write Rank0 MR14 =0x24
1443 23:44:55.390729
1444 23:44:55.390789 CH=0, VrefRange= 0, VrefLevel = 36
1445 23:44:55.390848 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1446 23:44:55.390914 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1447 23:44:55.390975 TX Bit2 (978~1001) 24 989, Bit10 (972~997) 26 984,
1448 23:44:55.391034 TX Bit3 (971~994) 24 982, Bit11 (967~991) 25 979,
1449 23:44:55.391105 TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980,
1450 23:44:55.391166 TX Bit5 (974~997) 24 985, Bit13 (969~992) 24 980,
1451 23:44:55.391225 TX Bit6 (975~999) 25 987, Bit14 (969~995) 27 982,
1452 23:44:55.391301 TX Bit7 (976~1000) 25 988, Bit15 (971~997) 27 984,
1453 23:44:55.391362
1454 23:44:55.391421
1455 23:44:55.391490 TX Vref found, early break! 376< 378
1456 23:44:55.391558 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1457 23:44:55.391621 u1DelayCellOfst[0]=9 cells (7 PI)
1458 23:44:55.391680 u1DelayCellOfst[1]=7 cells (6 PI)
1459 23:44:55.391739 u1DelayCellOfst[2]=9 cells (7 PI)
1460 23:44:55.391806 u1DelayCellOfst[3]=0 cells (0 PI)
1461 23:44:55.391866 u1DelayCellOfst[4]=7 cells (6 PI)
1462 23:44:55.391924 u1DelayCellOfst[5]=3 cells (3 PI)
1463 23:44:55.391988 u1DelayCellOfst[6]=6 cells (5 PI)
1464 23:44:55.392048 u1DelayCellOfst[7]=7 cells (6 PI)
1465 23:44:55.392105 Byte0, DQ PI dly=982, DQM PI dly= 985
1466 23:44:55.392171 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1467 23:44:55.392232
1468 23:44:55.392291 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1469 23:44:55.392350
1470 23:44:55.392418 u1DelayCellOfst[8]=0 cells (0 PI)
1471 23:44:55.392477 u1DelayCellOfst[9]=1 cells (1 PI)
1472 23:44:55.392535 u1DelayCellOfst[10]=7 cells (6 PI)
1473 23:44:55.392603 u1DelayCellOfst[11]=1 cells (1 PI)
1474 23:44:55.392662 u1DelayCellOfst[12]=2 cells (2 PI)
1475 23:44:55.392719 u1DelayCellOfst[13]=2 cells (2 PI)
1476 23:44:55.392786 u1DelayCellOfst[14]=5 cells (4 PI)
1477 23:44:55.392846 u1DelayCellOfst[15]=7 cells (6 PI)
1478 23:44:55.392905 Byte1, DQ PI dly=978, DQM PI dly= 981
1479 23:44:55.392971 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1480 23:44:55.393030
1481 23:44:55.393089 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1482 23:44:55.393157
1483 23:44:55.393216 Write Rank0 MR14 =0x1e
1484 23:44:55.393274
1485 23:44:55.393339 Final TX Range 0 Vref 30
1486 23:44:55.393399
1487 23:44:55.393481 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1488 23:44:55.393583
1489 23:44:55.393678 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1490 23:44:55.393762 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1491 23:44:55.393824 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1492 23:44:55.393883 Write Rank0 MR3 =0xb0
1493 23:44:55.393951 DramC Write-DBI on
1494 23:44:55.394010 ==
1495 23:44:55.394069 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1496 23:44:55.394136 fsp= 1, odt_onoff= 1, Byte mode= 0
1497 23:44:55.394196 ==
1498 23:44:55.394255 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1499 23:44:55.394327
1500 23:44:55.394386 Begin, DQ Scan Range 701~765
1501 23:44:55.394445
1502 23:44:55.394512
1503 23:44:55.394571 TX Vref Scan disable
1504 23:44:55.394629 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1505 23:44:55.394699 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1506 23:44:55.394760 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1507 23:44:55.394819 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1508 23:44:55.394888 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1509 23:44:55.395147 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1510 23:44:55.395216 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1511 23:44:55.395287 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1512 23:44:55.395349 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1513 23:44:55.395409 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1514 23:44:55.395478 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1515 23:44:55.395539 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1516 23:44:55.395598 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1517 23:44:55.395667 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1518 23:44:55.395728 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1519 23:44:55.395788 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1520 23:44:55.395854 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1521 23:44:55.395915 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1522 23:44:55.395974 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1523 23:44:55.396041 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1524 23:44:55.396102 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1525 23:44:55.396161 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1526 23:44:55.396228 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1527 23:44:55.396289 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1528 23:44:55.396348 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1529 23:44:55.396416 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1530 23:44:55.396477 Byte0, DQ PI dly=731, DQM PI dly= 731
1531 23:44:55.396535 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1532 23:44:55.396601
1533 23:44:55.396661 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1534 23:44:55.396719
1535 23:44:55.396796 Byte1, DQ PI dly=724, DQM PI dly= 724
1536 23:44:55.396858 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1537 23:44:55.396917
1538 23:44:55.396975 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1539 23:44:55.397050
1540 23:44:55.397108 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1541 23:44:55.397167 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1542 23:44:55.397238 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1543 23:44:55.397297 Write Rank0 MR3 =0x30
1544 23:44:55.397355 DramC Write-DBI off
1545 23:44:55.397420
1546 23:44:55.397492 [DATLAT]
1547 23:44:55.397552 Freq=1600, CH0 RK0, use_rxtx_scan=0
1548 23:44:55.397619
1549 23:44:55.397680 DATLAT Default: 0xf
1550 23:44:55.397738 7, 0xFFFF, sum=0
1551 23:44:55.397805 8, 0xFFFF, sum=0
1552 23:44:55.397866 9, 0xFFFF, sum=0
1553 23:44:55.397925 10, 0xFFFF, sum=0
1554 23:44:55.397991 11, 0xFFFF, sum=0
1555 23:44:55.398052 12, 0xFFFF, sum=0
1556 23:44:55.398111 13, 0xFFFF, sum=0
1557 23:44:55.398170 14, 0x0, sum=1
1558 23:44:55.398244 15, 0x0, sum=2
1559 23:44:55.398304 16, 0x0, sum=3
1560 23:44:55.398370 17, 0x0, sum=4
1561 23:44:55.398431 pattern=2 first_step=14 total pass=5 best_step=16
1562 23:44:55.398489 ==
1563 23:44:55.398547 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1564 23:44:55.398618 fsp= 1, odt_onoff= 1, Byte mode= 0
1565 23:44:55.398678 ==
1566 23:44:55.398736 Start DQ dly to find pass range UseTestEngine =1
1567 23:44:55.398808 x-axis: bit #, y-axis: DQ dly (-127~63)
1568 23:44:55.398867 RX Vref Scan = 1
1569 23:44:55.398926
1570 23:44:55.398992 RX Vref found, early break!
1571 23:44:55.399051
1572 23:44:55.399126 Final RX Vref 11, apply to both rank0 and 1
1573 23:44:55.399210 ==
1574 23:44:55.399269 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1575 23:44:55.399336 fsp= 1, odt_onoff= 1, Byte mode= 0
1576 23:44:55.399397 ==
1577 23:44:55.399456 DQS Delay:
1578 23:44:55.399515 DQS0 = 0, DQS1 = 0
1579 23:44:55.399588 DQM Delay:
1580 23:44:55.399647 DQM0 = 19, DQM1 = 17
1581 23:44:55.399705 DQ Delay:
1582 23:44:55.399771 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14
1583 23:44:55.399830 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1584 23:44:55.399887 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1585 23:44:55.399957 DQ12 =17, DQ13 =17, DQ14 =18, DQ15 =20
1586 23:44:55.400016
1587 23:44:55.400074
1588 23:44:55.400141
1589 23:44:55.400199 [DramC_TX_OE_Calibration] TA2
1590 23:44:55.400257 Original DQ_B0 (3 6) =30, OEN = 27
1591 23:44:55.400325 Original DQ_B1 (3 6) =30, OEN = 27
1592 23:44:55.400386 23, 0x0, End_B0=23 End_B1=23
1593 23:44:55.400446 24, 0x0, End_B0=24 End_B1=24
1594 23:44:55.400519 25, 0x0, End_B0=25 End_B1=25
1595 23:44:55.400579 26, 0x0, End_B0=26 End_B1=26
1596 23:44:55.400639 27, 0x0, End_B0=27 End_B1=27
1597 23:44:55.400706 28, 0x0, End_B0=28 End_B1=28
1598 23:44:55.400766 29, 0x0, End_B0=29 End_B1=29
1599 23:44:55.400825 30, 0x0, End_B0=30 End_B1=30
1600 23:44:55.400897 31, 0xFFFF, End_B0=30 End_B1=30
1601 23:44:55.400957 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1602 23:44:55.401017 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1603 23:44:55.401085
1604 23:44:55.401144
1605 23:44:55.401201 Write Rank0 MR23 =0x3f
1606 23:44:55.401271 [DQSOSC]
1607 23:44:55.401332 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1608 23:44:55.401392 CH0_RK0: MR19=0x202, MR18=0xC1C1, DQSOSC=446, MR23=63, INC=12, DEC=18
1609 23:44:55.401469 Write Rank0 MR23 =0x3f
1610 23:44:55.401530 [DQSOSC]
1611 23:44:55.401589 [DQSOSCAuto] RK0, (LSB)MR18= 0xc2c2, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1612 23:44:55.401661 CH0 RK0: MR19=202, MR18=C2C2
1613 23:44:55.401722 [RankSwap] Rank num 2, (Multi 1), Rank 1
1614 23:44:55.401781 Write Rank0 MR2 =0xad
1615 23:44:55.401848 [Write Leveling]
1616 23:44:55.401907 delay byte0 byte1 byte2 byte3
1617 23:44:55.401965
1618 23:44:55.402035 10 0 0
1619 23:44:55.402097 11 0 0
1620 23:44:55.402157 12 0 0
1621 23:44:55.402228 13 0 0
1622 23:44:55.402289 14 0 0
1623 23:44:55.402348 15 0 0
1624 23:44:55.402418 16 0 0
1625 23:44:55.402480 17 0 0
1626 23:44:55.402539 18 0 0
1627 23:44:55.402606 19 0 0
1628 23:44:55.402682 20 0 0
1629 23:44:55.402742 21 0 0
1630 23:44:55.402810 22 0 0
1631 23:44:55.402879 23 0 0
1632 23:44:55.402938 24 0 ff
1633 23:44:55.402999 25 0 ff
1634 23:44:55.403073 26 0 ff
1635 23:44:55.403134 27 0 ff
1636 23:44:55.403192 28 0 ff
1637 23:44:55.403261 29 ff ff
1638 23:44:55.403321 30 ff ff
1639 23:44:55.403380 31 ff ff
1640 23:44:55.403446 32 ff ff
1641 23:44:55.403506 33 ff ff
1642 23:44:55.403565 34 ff ff
1643 23:44:55.403636 35 ff ff
1644 23:44:55.403697 pass bytecount = 0xff (0xff: all bytes pass)
1645 23:44:55.403756
1646 23:44:55.403824 DQS0 dly: 29
1647 23:44:55.403883 DQS1 dly: 24
1648 23:44:55.403941 Write Rank0 MR2 =0x2d
1649 23:44:55.404008 [RankSwap] Rank num 2, (Multi 1), Rank 0
1650 23:44:55.404068 Write Rank1 MR1 =0xd6
1651 23:44:55.404126 [Gating]
1652 23:44:55.404191 ==
1653 23:44:55.404250 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1654 23:44:55.404309 fsp= 1, odt_onoff= 1, Byte mode= 0
1655 23:44:55.404375 ==
1656 23:44:55.404434 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1657 23:44:55.404693 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1658 23:44:55.404770 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1659 23:44:55.404832 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1660 23:44:55.404893 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1661 23:44:55.404961 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1662 23:44:55.405022 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1663 23:44:55.405081 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1664 23:44:55.405146 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1665 23:44:55.405208 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1666 23:44:55.405267 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1667 23:44:55.405326 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1668 23:44:55.405401 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1669 23:44:55.405472 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1670 23:44:55.405541 [Byte 0] Lead/lag Transition tap number (7)
1671 23:44:55.405602 3 2 20 |302 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1672 23:44:55.405661 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1673 23:44:55.405733 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1674 23:44:55.405796 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1675 23:44:55.405856 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1676 23:44:55.405928 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1677 23:44:55.405990 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1678 23:44:55.406050 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1679 23:44:55.406118 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1680 23:44:55.406179 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1681 23:44:55.406238 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1682 23:44:55.406310 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1683 23:44:55.406370 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1684 23:44:55.406430 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1685 23:44:55.406496 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1686 23:44:55.406558 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1687 23:44:55.406618 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1688 23:44:55.406689 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1689 23:44:55.406752 3 4 24 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1690 23:44:55.406811 3 4 28 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1691 23:44:55.406877 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1692 23:44:55.406938 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1693 23:44:55.406998 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1694 23:44:55.407058 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1695 23:44:55.407138 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1696 23:44:55.407201 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1697 23:44:55.407270 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1698 23:44:55.407332 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1699 23:44:55.407392 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1700 23:44:55.407460 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1701 23:44:55.407521 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1702 23:44:55.407580 [Byte 0] Lead/lag falling Transition (3, 6, 8)
1703 23:44:55.407647 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1704 23:44:55.407708 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1705 23:44:55.407767 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1706 23:44:55.407832 [Byte 0] Lead/lag Transition tap number (3)
1707 23:44:55.407919 [Byte 1] Lead/lag Transition tap number (2)
1708 23:44:55.407985 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1709 23:44:55.408055 3 6 24 |1010 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1710 23:44:55.408115 3 6 28 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
1711 23:44:55.408175 [Byte 0]First pass (3, 6, 28)
1712 23:44:55.408243 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1713 23:44:55.408304 [Byte 1]First pass (3, 7, 0)
1714 23:44:55.408362 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1715 23:44:55.408431 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1716 23:44:55.408491 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1717 23:44:55.408552 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1718 23:44:55.408619 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1719 23:44:55.408679 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1720 23:44:55.408739 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1721 23:44:55.408806 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1722 23:44:55.408867 All bytes gating window > 1UI, Early break!
1723 23:44:55.408926
1724 23:44:55.408991 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
1725 23:44:55.409050
1726 23:44:55.409108 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
1727 23:44:55.409166
1728 23:44:55.409233
1729 23:44:55.409291
1730 23:44:55.409355 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1731 23:44:55.409416
1732 23:44:55.409491 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1733 23:44:55.409551
1734 23:44:55.409619
1735 23:44:55.409677 Write Rank1 MR1 =0x56
1736 23:44:55.409743
1737 23:44:55.409804 best RODT dly(2T, 0.5T) = (2, 3)
1738 23:44:55.409862
1739 23:44:55.409920 best RODT dly(2T, 0.5T) = (2, 3)
1740 23:44:55.409988 ==
1741 23:44:55.410047 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1742 23:44:55.410106 fsp= 1, odt_onoff= 1, Byte mode= 0
1743 23:44:55.410174 ==
1744 23:44:55.410233 Start DQ dly to find pass range UseTestEngine =0
1745 23:44:55.410291 x-axis: bit #, y-axis: DQ dly (-127~63)
1746 23:44:55.410357 RX Vref Scan = 0
1747 23:44:55.410418 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1748 23:44:55.410478 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1749 23:44:55.410547 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1750 23:44:55.410607 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1751 23:44:55.410665 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1752 23:44:55.410733 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1753 23:44:55.410795 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1754 23:44:55.410854 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1755 23:44:55.410920 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1756 23:44:55.410982 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1757 23:44:55.411041 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1758 23:44:55.411312 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1759 23:44:55.411380 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1760 23:44:55.411440 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1761 23:44:55.411514 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1762 23:44:55.411574 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1763 23:44:55.411633 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1764 23:44:55.411701 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1765 23:44:55.411761 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1766 23:44:55.411820 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1767 23:44:55.411888 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1768 23:44:55.411948 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1769 23:44:55.412007 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1770 23:44:55.412073 -3, [0] xxxoxxxx oxxoxxxx [MSB]
1771 23:44:55.412133 -2, [0] xxxoxxxx ooxoxoxx [MSB]
1772 23:44:55.412192 -1, [0] xxxoxoxx ooxoooxx [MSB]
1773 23:44:55.412258 0, [0] xxxoxoox ooxoooxx [MSB]
1774 23:44:55.412320 1, [0] xxxoxooo ooxoooox [MSB]
1775 23:44:55.412380 2, [0] xxxooooo ooxoooox [MSB]
1776 23:44:55.412446 3, [0] xxxooooo ooxooooo [MSB]
1777 23:44:55.412507 4, [0] ooxooooo ooxooooo [MSB]
1778 23:44:55.412566 32, [0] oooxoooo oooooooo [MSB]
1779 23:44:55.412625 33, [0] oooxoooo xooooooo [MSB]
1780 23:44:55.412693 34, [0] oooxoooo xooooooo [MSB]
1781 23:44:55.412753 35, [0] oooxoooo xxoxoooo [MSB]
1782 23:44:55.412819 36, [0] oooxoxxo xxoxxxxo [MSB]
1783 23:44:55.412880 37, [0] oooxoxxx xxoxxxxo [MSB]
1784 23:44:55.412939 38, [0] oooxoxxx xxoxxxxo [MSB]
1785 23:44:55.412998 39, [0] ooxxxxxx xxoxxxxx [MSB]
1786 23:44:55.413066 40, [0] xoxxxxxx xxoxxxxx [MSB]
1787 23:44:55.413125 41, [0] xxxxxxxx xxoxxxxx [MSB]
1788 23:44:55.413185 42, [0] xxxxxxxx xxoxxxxx [MSB]
1789 23:44:55.413253 43, [0] xxxxxxxx xxxxxxxx [MSB]
1790 23:44:55.413313 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1791 23:44:55.413371 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1792 23:44:55.413457 iDelay=43, Bit 2, Center 21 (5 ~ 38) 34
1793 23:44:55.413519 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1794 23:44:55.413599 iDelay=43, Bit 4, Center 20 (2 ~ 38) 37
1795 23:44:55.413662 iDelay=43, Bit 5, Center 17 (-1 ~ 35) 37
1796 23:44:55.413721 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1797 23:44:55.413787 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
1798 23:44:55.413847 iDelay=43, Bit 8, Center 14 (-3 ~ 32) 36
1799 23:44:55.413905 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
1800 23:44:55.413970 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1801 23:44:55.414034 iDelay=43, Bit 11, Center 15 (-3 ~ 34) 38
1802 23:44:55.414092 iDelay=43, Bit 12, Center 17 (-1 ~ 35) 37
1803 23:44:55.414151 iDelay=43, Bit 13, Center 16 (-2 ~ 35) 38
1804 23:44:55.414209 iDelay=43, Bit 14, Center 18 (1 ~ 35) 35
1805 23:44:55.414277 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1806 23:44:55.414336 ==
1807 23:44:55.414395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1808 23:44:55.414462 fsp= 1, odt_onoff= 1, Byte mode= 0
1809 23:44:55.414522 ==
1810 23:44:55.414580 DQS Delay:
1811 23:44:55.414651 DQS0 = 0, DQS1 = 0
1812 23:44:55.414710 DQM Delay:
1813 23:44:55.414768 DQM0 = 18, DQM1 = 17
1814 23:44:55.414836 DQ Delay:
1815 23:44:55.414895 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =13
1816 23:44:55.414954 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =18
1817 23:44:55.415022 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
1818 23:44:55.415081 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1819 23:44:55.415148
1820 23:44:55.415226
1821 23:44:55.415286 DramC Write-DBI off
1822 23:44:55.415344 ==
1823 23:44:55.415411 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1824 23:44:55.415471 fsp= 1, odt_onoff= 1, Byte mode= 0
1825 23:44:55.415529 ==
1826 23:44:55.415597 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1827 23:44:55.415657
1828 23:44:55.415716 Begin, DQ Scan Range 920~1176
1829 23:44:55.415782
1830 23:44:55.415841
1831 23:44:55.415899 TX Vref Scan disable
1832 23:44:55.415966 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1833 23:44:55.416027 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1834 23:44:55.416086 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1835 23:44:55.416153 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1836 23:44:55.416214 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1837 23:44:55.416273 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1838 23:44:55.416341 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1839 23:44:55.416435 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1840 23:44:55.416498 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1841 23:44:55.416569 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1842 23:44:55.416630 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1843 23:44:55.416689 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1844 23:44:55.416758 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1845 23:44:55.416818 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1846 23:44:55.416878 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1847 23:44:55.416948 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1848 23:44:55.417008 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1849 23:44:55.417068 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1850 23:44:55.417136 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1851 23:44:55.417196 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1852 23:44:55.417256 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1853 23:44:55.417325 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1854 23:44:55.417386 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1855 23:44:55.417455 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1856 23:44:55.417526 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1857 23:44:55.417587 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1858 23:44:55.417647 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1859 23:44:55.417716 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1860 23:44:55.417777 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1861 23:44:55.417836 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1862 23:44:55.417903 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1863 23:44:55.417963 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1864 23:44:55.418024 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1865 23:44:55.418096 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1866 23:44:55.418157 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1867 23:44:55.418217 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1868 23:44:55.418286 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1869 23:44:55.418347 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1870 23:44:55.418407 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1871 23:44:55.418475 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1872 23:44:55.418535 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1873 23:44:55.418594 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1874 23:44:55.418663 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1875 23:44:55.418724 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1876 23:44:55.418982 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1877 23:44:55.419077 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1878 23:44:55.419140 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1879 23:44:55.419201 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1880 23:44:55.419271 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1881 23:44:55.419331 969 |3 6 9|[0] xxxxxxxx oxxxxxxx [MSB]
1882 23:44:55.419398 970 |3 6 10|[0] xxxxxxxx oxxoxxxx [MSB]
1883 23:44:55.419466 971 |3 6 11|[0] xxxxxxxx ooxoxxxx [MSB]
1884 23:44:55.419527 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1885 23:44:55.419587 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1886 23:44:55.419657 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1887 23:44:55.419720 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1888 23:44:55.419780 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1889 23:44:55.419848 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1890 23:44:55.419909 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1891 23:44:55.419969 989 |3 6 29|[0] oooooooo oooxoooo [MSB]
1892 23:44:55.420035 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1893 23:44:55.420097 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1894 23:44:55.420156 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1895 23:44:55.420223 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1896 23:44:55.420284 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1897 23:44:55.420344 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1898 23:44:55.420403 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1899 23:44:55.420471 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1900 23:44:55.420532 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1901 23:44:55.420591 Byte0, DQ PI dly=986, DQM PI dly= 986
1902 23:44:55.420659 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1903 23:44:55.420717
1904 23:44:55.420776 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1905 23:44:55.420843
1906 23:44:55.420901 Byte1, DQ PI dly=981, DQM PI dly= 981
1907 23:44:55.420959 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1908 23:44:55.421027
1909 23:44:55.421086 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1910 23:44:55.421144
1911 23:44:55.421222 ==
1912 23:44:55.421285 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1913 23:44:55.421345 fsp= 1, odt_onoff= 1, Byte mode= 0
1914 23:44:55.421413 ==
1915 23:44:55.421483 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1916 23:44:55.421543
1917 23:44:55.421610 Begin, DQ Scan Range 957~1021
1918 23:44:55.421669 Write Rank1 MR14 =0x0
1919 23:44:55.421728
1920 23:44:55.421794 CH=0, VrefRange= 0, VrefLevel = 0
1921 23:44:55.421853 TX Bit0 (982~992) 11 987, Bit8 (971~984) 14 977,
1922 23:44:55.421912 TX Bit1 (979~993) 15 986, Bit9 (974~984) 11 979,
1923 23:44:55.421980 TX Bit2 (982~992) 11 987, Bit10 (978~991) 14 984,
1924 23:44:55.422039 TX Bit3 (976~990) 15 983, Bit11 (973~983) 11 978,
1925 23:44:55.422097 TX Bit4 (980~992) 13 986, Bit12 (975~984) 10 979,
1926 23:44:55.422163 TX Bit5 (978~989) 12 983, Bit13 (974~985) 12 979,
1927 23:44:55.422223 TX Bit6 (979~991) 13 985, Bit14 (975~990) 16 982,
1928 23:44:55.422281 TX Bit7 (979~992) 14 985, Bit15 (977~991) 15 984,
1929 23:44:55.422351
1930 23:44:55.422411 Write Rank1 MR14 =0x2
1931 23:44:55.422469
1932 23:44:55.422533 CH=0, VrefRange= 0, VrefLevel = 2
1933 23:44:55.422593 TX Bit0 (981~993) 13 987, Bit8 (971~984) 14 977,
1934 23:44:55.422652 TX Bit1 (979~993) 15 986, Bit9 (974~985) 12 979,
1935 23:44:55.422710 TX Bit2 (981~992) 12 986, Bit10 (977~991) 15 984,
1936 23:44:55.422779 TX Bit3 (976~990) 15 983, Bit11 (973~983) 11 978,
1937 23:44:55.422838 TX Bit4 (979~992) 14 985, Bit12 (975~985) 11 980,
1938 23:44:55.422904 TX Bit5 (978~990) 13 984, Bit13 (974~986) 13 980,
1939 23:44:55.422965 TX Bit6 (978~992) 15 985, Bit14 (974~990) 17 982,
1940 23:44:55.423025 TX Bit7 (979~993) 15 986, Bit15 (977~991) 15 984,
1941 23:44:55.423083
1942 23:44:55.423149 Write Rank1 MR14 =0x4
1943 23:44:55.423207
1944 23:44:55.423266 CH=0, VrefRange= 0, VrefLevel = 4
1945 23:44:55.423332 TX Bit0 (981~994) 14 987, Bit8 (971~985) 15 978,
1946 23:44:55.423391 TX Bit1 (979~994) 16 986, Bit9 (973~986) 14 979,
1947 23:44:55.423451 TX Bit2 (981~993) 13 987, Bit10 (977~992) 16 984,
1948 23:44:55.423519 TX Bit3 (975~991) 17 983, Bit11 (972~984) 13 978,
1949 23:44:55.423579 TX Bit4 (979~993) 15 986, Bit12 (975~986) 12 980,
1950 23:44:55.423638 TX Bit5 (978~990) 13 984, Bit13 (974~987) 14 980,
1951 23:44:55.423705 TX Bit6 (978~992) 15 985, Bit14 (974~991) 18 982,
1952 23:44:55.423765 TX Bit7 (979~994) 16 986, Bit15 (977~992) 16 984,
1953 23:44:55.423823
1954 23:44:55.423888 Write Rank1 MR14 =0x6
1955 23:44:55.423948
1956 23:44:55.424006 CH=0, VrefRange= 0, VrefLevel = 6
1957 23:44:55.424072 TX Bit0 (980~994) 15 987, Bit8 (970~986) 17 978,
1958 23:44:55.424132 TX Bit1 (979~995) 17 987, Bit9 (973~986) 14 979,
1959 23:44:55.424191 TX Bit2 (980~994) 15 987, Bit10 (977~993) 17 985,
1960 23:44:55.424257 TX Bit3 (975~991) 17 983, Bit11 (972~984) 13 978,
1961 23:44:55.424317 TX Bit4 (979~994) 16 986, Bit12 (974~986) 13 980,
1962 23:44:55.424376 TX Bit5 (978~991) 14 984, Bit13 (974~988) 15 981,
1963 23:44:55.424434 TX Bit6 (978~993) 16 985, Bit14 (973~991) 19 982,
1964 23:44:55.424502 TX Bit7 (979~995) 17 987, Bit15 (977~992) 16 984,
1965 23:44:55.424561
1966 23:44:55.424645 Write Rank1 MR14 =0x8
1967 23:44:55.424714
1968 23:44:55.424773 CH=0, VrefRange= 0, VrefLevel = 8
1969 23:44:55.424851 TX Bit0 (980~995) 16 987, Bit8 (970~987) 18 978,
1970 23:44:55.424912 TX Bit1 (979~996) 18 987, Bit9 (973~987) 15 980,
1971 23:44:55.424972 TX Bit2 (981~995) 15 988, Bit10 (976~993) 18 984,
1972 23:44:55.425039 TX Bit3 (974~991) 18 982, Bit11 (971~985) 15 978,
1973 23:44:55.425100 TX Bit4 (978~995) 18 986, Bit12 (974~987) 14 980,
1974 23:44:55.425158 TX Bit5 (977~992) 16 984, Bit13 (973~989) 17 981,
1975 23:44:55.573647 TX Bit6 (978~993) 16 985, Bit14 (974~992) 19 983,
1976 23:44:55.573793 TX Bit7 (978~996) 19 987, Bit15 (976~992) 17 984,
1977 23:44:55.573870
1978 23:44:55.573947 Write Rank1 MR14 =0xa
1979 23:44:55.574013
1980 23:44:55.574077 CH=0, VrefRange= 0, VrefLevel = 10
1981 23:44:55.574150 TX Bit0 (980~996) 17 988, Bit8 (969~987) 19 978,
1982 23:44:55.574212 TX Bit1 (978~997) 20 987, Bit9 (972~988) 17 980,
1983 23:44:55.574518 TX Bit2 (980~996) 17 988, Bit10 (976~994) 19 985,
1984 23:44:55.574594 TX Bit3 (974~991) 18 982, Bit11 (971~985) 15 978,
1985 23:44:55.574667 TX Bit4 (978~996) 19 987, Bit12 (974~989) 16 981,
1986 23:44:55.574733 TX Bit5 (977~992) 16 984, Bit13 (973~990) 18 981,
1987 23:44:55.574795 TX Bit6 (978~994) 17 986, Bit14 (973~992) 20 982,
1988 23:44:55.574863 TX Bit7 (978~996) 19 987, Bit15 (976~993) 18 984,
1989 23:44:55.574925
1990 23:44:55.574985 Write Rank1 MR14 =0xc
1991 23:44:55.575052
1992 23:44:55.575112 CH=0, VrefRange= 0, VrefLevel = 12
1993 23:44:55.575172 TX Bit0 (979~997) 19 988, Bit8 (969~988) 20 978,
1994 23:44:55.575233 TX Bit1 (978~998) 21 988, Bit9 (972~989) 18 980,
1995 23:44:55.575300 TX Bit2 (980~997) 18 988, Bit10 (976~994) 19 985,
1996 23:44:55.575361 TX Bit3 (974~992) 19 983, Bit11 (970~986) 17 978,
1997 23:44:55.575428 TX Bit4 (978~997) 20 987, Bit12 (973~989) 17 981,
1998 23:44:55.575490 TX Bit5 (977~992) 16 984, Bit13 (973~990) 18 981,
1999 23:44:55.575549 TX Bit6 (978~995) 18 986, Bit14 (972~992) 21 982,
2000 23:44:55.575609 TX Bit7 (978~997) 20 987, Bit15 (976~994) 19 985,
2001 23:44:55.575678
2002 23:44:55.575737 Write Rank1 MR14 =0xe
2003 23:44:55.575795
2004 23:44:55.575864 CH=0, VrefRange= 0, VrefLevel = 14
2005 23:44:55.575924 TX Bit0 (979~998) 20 988, Bit8 (969~989) 21 979,
2006 23:44:55.575984 TX Bit1 (978~998) 21 988, Bit9 (971~990) 20 980,
2007 23:44:55.576052 TX Bit2 (979~998) 20 988, Bit10 (976~995) 20 985,
2008 23:44:55.576112 TX Bit3 (973~992) 20 982, Bit11 (970~987) 18 978,
2009 23:44:55.576172 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
2010 23:44:55.576240 TX Bit5 (977~993) 17 985, Bit13 (972~990) 19 981,
2011 23:44:55.576301 TX Bit6 (978~995) 18 986, Bit14 (972~993) 22 982,
2012 23:44:55.576359 TX Bit7 (978~998) 21 988, Bit15 (975~995) 21 985,
2013 23:44:55.576427
2014 23:44:55.576486 Write Rank1 MR14 =0x10
2015 23:44:55.576544
2016 23:44:55.576610 CH=0, VrefRange= 0, VrefLevel = 16
2017 23:44:55.576671 TX Bit0 (979~998) 20 988, Bit8 (969~990) 22 979,
2018 23:44:55.576731 TX Bit1 (978~999) 22 988, Bit9 (971~990) 20 980,
2019 23:44:55.576798 TX Bit2 (979~998) 20 988, Bit10 (976~995) 20 985,
2020 23:44:55.576858 TX Bit3 (973~992) 20 982, Bit11 (969~988) 20 978,
2021 23:44:55.576917 TX Bit4 (978~998) 21 988, Bit12 (972~990) 19 981,
2022 23:44:55.576984 TX Bit5 (976~994) 19 985, Bit13 (971~991) 21 981,
2023 23:44:55.577045 TX Bit6 (977~995) 19 986, Bit14 (971~993) 23 982,
2024 23:44:55.577104 TX Bit7 (978~998) 21 988, Bit15 (975~995) 21 985,
2025 23:44:55.577170
2026 23:44:55.577229 Write Rank1 MR14 =0x12
2027 23:44:55.577288
2028 23:44:55.577347 CH=0, VrefRange= 0, VrefLevel = 18
2029 23:44:55.577414 TX Bit0 (979~999) 21 989, Bit8 (968~990) 23 979,
2030 23:44:55.577486 TX Bit1 (978~999) 22 988, Bit9 (971~990) 20 980,
2031 23:44:55.577555 TX Bit2 (979~999) 21 989, Bit10 (976~997) 22 986,
2032 23:44:55.577617 TX Bit3 (972~993) 22 982, Bit11 (969~989) 21 979,
2033 23:44:55.577676 TX Bit4 (978~998) 21 988, Bit12 (971~990) 20 980,
2034 23:44:55.577742 TX Bit5 (976~994) 19 985, Bit13 (971~991) 21 981,
2035 23:44:55.577803 TX Bit6 (977~997) 21 987, Bit14 (971~993) 23 982,
2036 23:44:55.577862 TX Bit7 (978~999) 22 988, Bit15 (975~996) 22 985,
2037 23:44:55.577928
2038 23:44:55.577988 Write Rank1 MR14 =0x14
2039 23:44:55.578047
2040 23:44:55.578106 CH=0, VrefRange= 0, VrefLevel = 20
2041 23:44:55.578173 TX Bit0 (979~999) 21 989, Bit8 (968~990) 23 979,
2042 23:44:55.578232 TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980,
2043 23:44:55.578291 TX Bit2 (979~999) 21 989, Bit10 (975~997) 23 986,
2044 23:44:55.578360 TX Bit3 (972~993) 22 982, Bit11 (969~989) 21 979,
2045 23:44:55.578419 TX Bit4 (978~999) 22 988, Bit12 (971~991) 21 981,
2046 23:44:55.578478 TX Bit5 (976~995) 20 985, Bit13 (971~992) 22 981,
2047 23:44:55.578547 TX Bit6 (977~998) 22 987, Bit14 (971~994) 24 982,
2048 23:44:55.578607 TX Bit7 (978~999) 22 988, Bit15 (975~997) 23 986,
2049 23:44:55.578666
2050 23:44:55.578732 Write Rank1 MR14 =0x16
2051 23:44:55.578792
2052 23:44:55.578851 CH=0, VrefRange= 0, VrefLevel = 22
2053 23:44:55.578925 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
2054 23:44:55.578985 TX Bit1 (977~999) 23 988, Bit9 (970~991) 22 980,
2055 23:44:55.579045 TX Bit2 (979~999) 21 989, Bit10 (975~997) 23 986,
2056 23:44:55.579112 TX Bit3 (971~994) 24 982, Bit11 (969~990) 22 979,
2057 23:44:55.579173 TX Bit4 (977~999) 23 988, Bit12 (971~991) 21 981,
2058 23:44:55.579232 TX Bit5 (976~996) 21 986, Bit13 (970~992) 23 981,
2059 23:44:55.579299 TX Bit6 (977~998) 22 987, Bit14 (970~994) 25 982,
2060 23:44:55.579359 TX Bit7 (977~999) 23 988, Bit15 (975~997) 23 986,
2061 23:44:55.579418
2062 23:44:55.579482 Write Rank1 MR14 =0x18
2063 23:44:55.579542
2064 23:44:55.579600 CH=0, VrefRange= 0, VrefLevel = 24
2065 23:44:55.579666 TX Bit0 (978~1000) 23 989, Bit8 (968~991) 24 979,
2066 23:44:55.579727 TX Bit1 (977~1000) 24 988, Bit9 (970~991) 22 980,
2067 23:44:55.579787 TX Bit2 (979~1000) 22 989, Bit10 (975~998) 24 986,
2068 23:44:55.579855 TX Bit3 (971~994) 24 982, Bit11 (968~991) 24 979,
2069 23:44:55.579916 TX Bit4 (977~999) 23 988, Bit12 (970~992) 23 981,
2070 23:44:55.579975 TX Bit5 (976~996) 21 986, Bit13 (969~993) 25 981,
2071 23:44:55.580035 TX Bit6 (977~998) 22 987, Bit14 (970~995) 26 982,
2072 23:44:55.580104 TX Bit7 (977~1000) 24 988, Bit15 (975~997) 23 986,
2073 23:44:55.580163
2074 23:44:55.580228 Write Rank1 MR14 =0x1a
2075 23:44:55.580289
2076 23:44:55.580347 CH=0, VrefRange= 0, VrefLevel = 26
2077 23:44:55.580406 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979,
2078 23:44:55.580474 TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980,
2079 23:44:55.580534 TX Bit2 (979~1000) 22 989, Bit10 (975~998) 24 986,
2080 23:44:55.580594 TX Bit3 (971~995) 25 983, Bit11 (968~991) 24 979,
2081 23:44:55.580663 TX Bit4 (977~1000) 24 988, Bit12 (970~992) 23 981,
2082 23:44:55.580722 TX Bit5 (975~997) 23 986, Bit13 (969~993) 25 981,
2083 23:44:55.580978 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
2084 23:44:55.581053 TX Bit7 (977~1000) 24 988, Bit15 (974~998) 25 986,
2085 23:44:55.581114
2086 23:44:55.581174 Write Rank1 MR14 =0x1c
2087 23:44:55.581242
2088 23:44:55.581302 CH=0, VrefRange= 0, VrefLevel = 28
2089 23:44:55.581361 TX Bit0 (978~1001) 24 989, Bit8 (967~992) 26 979,
2090 23:44:55.581450 TX Bit1 (977~1001) 25 989, Bit9 (969~992) 24 980,
2091 23:44:55.581514 TX Bit2 (978~1000) 23 989, Bit10 (975~999) 25 987,
2092 23:44:55.581581 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2093 23:44:55.581643 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
2094 23:44:55.581703 TX Bit5 (975~998) 24 986, Bit13 (969~993) 25 981,
2095 23:44:55.581769 TX Bit6 (976~999) 24 987, Bit14 (969~996) 28 982,
2096 23:44:55.581837 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
2097 23:44:55.581899
2098 23:44:55.581957 Write Rank1 MR14 =0x1e
2099 23:44:55.582017
2100 23:44:55.582089 CH=0, VrefRange= 0, VrefLevel = 30
2101 23:44:55.582149 TX Bit0 (978~1002) 25 990, Bit8 (967~992) 26 979,
2102 23:44:55.582208 TX Bit1 (978~1001) 24 989, Bit9 (969~993) 25 981,
2103 23:44:55.582276 TX Bit2 (978~1001) 24 989, Bit10 (974~999) 26 986,
2104 23:44:55.582336 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2105 23:44:55.582395 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
2106 23:44:55.582478 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
2107 23:44:55.582553 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
2108 23:44:55.582622 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
2109 23:44:55.582684
2110 23:44:55.582744 Write Rank1 MR14 =0x20
2111 23:44:55.582811
2112 23:44:55.582872 CH=0, VrefRange= 0, VrefLevel = 32
2113 23:44:55.582931 TX Bit0 (978~1002) 25 990, Bit8 (967~992) 26 979,
2114 23:44:55.582999 TX Bit1 (978~1001) 24 989, Bit9 (969~993) 25 981,
2115 23:44:55.583060 TX Bit2 (978~1001) 24 989, Bit10 (974~999) 26 986,
2116 23:44:55.583120 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2117 23:44:55.583186 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
2118 23:44:55.583248 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
2119 23:44:55.583307 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
2120 23:44:55.583374 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
2121 23:44:55.583435
2122 23:44:55.583494 Write Rank1 MR14 =0x22
2123 23:44:55.583553
2124 23:44:55.583620 CH=0, VrefRange= 0, VrefLevel = 34
2125 23:44:55.583679 TX Bit0 (978~1002) 25 990, Bit8 (967~992) 26 979,
2126 23:44:55.583739 TX Bit1 (978~1001) 24 989, Bit9 (969~993) 25 981,
2127 23:44:55.583808 TX Bit2 (978~1001) 24 989, Bit10 (974~999) 26 986,
2128 23:44:55.583868 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2129 23:44:55.583928 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
2130 23:44:55.583997 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
2131 23:44:55.584056 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
2132 23:44:55.584116 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
2133 23:44:55.584184
2134 23:44:55.584244 Write Rank1 MR14 =0x24
2135 23:44:55.584302
2136 23:44:55.584370 CH=0, VrefRange= 0, VrefLevel = 36
2137 23:44:55.584430 TX Bit0 (978~1002) 25 990, Bit8 (967~992) 26 979,
2138 23:44:55.584490 TX Bit1 (978~1001) 24 989, Bit9 (969~993) 25 981,
2139 23:44:55.584557 TX Bit2 (978~1001) 24 989, Bit10 (974~999) 26 986,
2140 23:44:55.584618 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2141 23:44:55.584677 TX Bit4 (977~1000) 24 988, Bit12 (969~993) 25 981,
2142 23:44:55.584749 TX Bit5 (974~998) 25 986, Bit13 (969~993) 25 981,
2143 23:44:55.584810 TX Bit6 (976~999) 24 987, Bit14 (970~996) 27 983,
2144 23:44:55.584870 TX Bit7 (977~1001) 25 989, Bit15 (974~998) 25 986,
2145 23:44:55.584938
2146 23:44:55.584997
2147 23:44:55.585056 TX Vref found, early break! 379< 380
2148 23:44:55.585136 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2149 23:44:55.585231 u1DelayCellOfst[0]=9 cells (7 PI)
2150 23:44:55.585333 u1DelayCellOfst[1]=7 cells (6 PI)
2151 23:44:55.585425 u1DelayCellOfst[2]=7 cells (6 PI)
2152 23:44:55.585520 u1DelayCellOfst[3]=0 cells (0 PI)
2153 23:44:55.585581 u1DelayCellOfst[4]=6 cells (5 PI)
2154 23:44:55.585641 u1DelayCellOfst[5]=3 cells (3 PI)
2155 23:44:55.585709 u1DelayCellOfst[6]=5 cells (4 PI)
2156 23:44:55.585770 u1DelayCellOfst[7]=7 cells (6 PI)
2157 23:44:55.585829 Byte0, DQ PI dly=983, DQM PI dly= 986
2158 23:44:55.585897 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2159 23:44:55.585958
2160 23:44:55.586017 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2161 23:44:55.586090
2162 23:44:55.586150 u1DelayCellOfst[8]=0 cells (0 PI)
2163 23:44:55.586210 u1DelayCellOfst[9]=2 cells (2 PI)
2164 23:44:55.586283 u1DelayCellOfst[10]=9 cells (7 PI)
2165 23:44:55.586345 u1DelayCellOfst[11]=1 cells (1 PI)
2166 23:44:55.586404 u1DelayCellOfst[12]=2 cells (2 PI)
2167 23:44:55.586472 u1DelayCellOfst[13]=2 cells (2 PI)
2168 23:44:55.586532 u1DelayCellOfst[14]=5 cells (4 PI)
2169 23:44:55.586591 u1DelayCellOfst[15]=9 cells (7 PI)
2170 23:44:55.586658 Byte1, DQ PI dly=979, DQM PI dly= 982
2171 23:44:55.586718 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2172 23:44:55.586778
2173 23:44:55.586865 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2174 23:44:55.586926
2175 23:44:55.586985 Write Rank1 MR14 =0x1e
2176 23:44:55.587054
2177 23:44:55.587115 Final TX Range 0 Vref 30
2178 23:44:55.587174
2179 23:44:55.587242 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2180 23:44:55.587305
2181 23:44:55.587364 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2182 23:44:55.587423 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2183 23:44:55.587491 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2184 23:44:55.587551 Write Rank1 MR3 =0xb0
2185 23:44:55.587610 DramC Write-DBI on
2186 23:44:55.587678 ==
2187 23:44:55.587739 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2188 23:44:55.587798 fsp= 1, odt_onoff= 1, Byte mode= 0
2189 23:44:55.587867 ==
2190 23:44:55.587927 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2191 23:44:55.587987
2192 23:44:55.588261 Begin, DQ Scan Range 702~766
2193 23:44:55.588329
2194 23:44:55.588389
2195 23:44:55.588457 TX Vref Scan disable
2196 23:44:55.588518 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2197 23:44:55.588579 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2198 23:44:55.588650 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2199 23:44:55.588711 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2200 23:44:55.588772 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2201 23:44:55.588841 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2202 23:44:55.588901 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2203 23:44:55.588961 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2204 23:44:55.589036 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2205 23:44:55.589097 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2206 23:44:55.589157 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2207 23:44:55.589227 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2208 23:44:55.589288 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2209 23:44:55.589348 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2210 23:44:55.589418 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2211 23:44:55.589490 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2212 23:44:55.589551 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2213 23:44:55.589622 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2214 23:44:55.589682 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2215 23:44:55.589749 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2216 23:44:55.589811 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2217 23:44:55.589872 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2218 23:44:55.589932 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2219 23:44:55.590000 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2220 23:44:55.590061 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2221 23:44:55.590121 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2222 23:44:55.590221 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2223 23:44:55.590285 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2224 23:44:55.590355 Byte0, DQ PI dly=733, DQM PI dly= 733
2225 23:44:55.590417 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2226 23:44:55.590478
2227 23:44:55.590544 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2228 23:44:55.590607
2229 23:44:55.590666 Byte1, DQ PI dly=724, DQM PI dly= 724
2230 23:44:55.590734 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2231 23:44:55.590795
2232 23:44:55.590854 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2233 23:44:55.590921
2234 23:44:55.590981 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2235 23:44:55.591041 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2236 23:44:55.591108 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2237 23:44:55.591170 Write Rank1 MR3 =0x30
2238 23:44:55.591230 DramC Write-DBI off
2239 23:44:55.591296
2240 23:44:55.591356 [DATLAT]
2241 23:44:55.591415 Freq=1600, CH0 RK1, use_rxtx_scan=0
2242 23:44:55.591475
2243 23:44:55.591542 DATLAT Default: 0x10
2244 23:44:55.591600 7, 0xFFFF, sum=0
2245 23:44:55.591660 8, 0xFFFF, sum=0
2246 23:44:55.591729 9, 0xFFFF, sum=0
2247 23:44:55.591790 10, 0xFFFF, sum=0
2248 23:44:55.591850 11, 0xFFFF, sum=0
2249 23:44:55.591918 12, 0xFFFF, sum=0
2250 23:44:55.591978 13, 0xFFFF, sum=0
2251 23:44:55.592038 14, 0x0, sum=1
2252 23:44:55.592107 15, 0x0, sum=2
2253 23:44:55.592168 16, 0x0, sum=3
2254 23:44:55.592228 17, 0x0, sum=4
2255 23:44:55.592295 pattern=2 first_step=14 total pass=5 best_step=16
2256 23:44:55.592354 ==
2257 23:44:55.592414 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2258 23:44:55.592493 fsp= 1, odt_onoff= 1, Byte mode= 0
2259 23:44:55.592554 ==
2260 23:44:55.592613 Start DQ dly to find pass range UseTestEngine =1
2261 23:44:55.592683 x-axis: bit #, y-axis: DQ dly (-127~63)
2262 23:44:55.592744 RX Vref Scan = 0
2263 23:44:55.592803 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2264 23:44:55.592874 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2265 23:44:55.592936 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2266 23:44:55.592996 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2267 23:44:55.593064 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2268 23:44:55.593126 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2269 23:44:55.593187 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2270 23:44:55.593247 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2271 23:44:55.593315 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2272 23:44:55.593376 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2273 23:44:55.593460 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2274 23:44:55.593524 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2275 23:44:55.593584 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2276 23:44:55.593651 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2277 23:44:55.593713 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2278 23:44:55.593774 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2279 23:44:55.593841 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2280 23:44:55.593903 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2281 23:44:55.593987 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2282 23:44:55.594057 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2283 23:44:55.594119 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2284 23:44:55.594179 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2285 23:44:55.594249 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2286 23:44:55.594311 -3, [0] xxxoxxxx oxxoxxxx [MSB]
2287 23:44:55.594372 -2, [0] xxxoxxxx ooxoxoxx [MSB]
2288 23:44:55.594441 -1, [0] xxxoxoxx ooxoxoxx [MSB]
2289 23:44:55.594501 0, [0] xxxoxoxx ooxoooxx [MSB]
2290 23:44:55.594563 1, [0] xxxoxoox ooxoooxx [MSB]
2291 23:44:55.594636 2, [0] xxxoxoox ooxoooox [MSB]
2292 23:44:55.594698 3, [0] oxxoxooo ooxoooox [MSB]
2293 23:44:55.594759 4, [0] ooxooooo ooxooooo [MSB]
2294 23:44:55.594828 5, [0] oooooooo ooxooooo [MSB]
2295 23:44:55.594888 6, [0] oooooooo ooxooooo [MSB]
2296 23:44:55.594949 32, [0] oooxoooo oooooooo [MSB]
2297 23:44:55.595017 33, [0] oooxoooo xooxoooo [MSB]
2298 23:44:55.595078 34, [0] oooxoooo xooxoxoo [MSB]
2299 23:44:55.595139 35, [0] oooxoxoo xxoxxxoo [MSB]
2300 23:44:55.595209 36, [0] oooxoxxo xxoxxxxo [MSB]
2301 23:44:55.595270 37, [0] oooxoxxo xxoxxxxo [MSB]
2302 23:44:55.595330 38, [0] oooxoxxx xxoxxxxx [MSB]
2303 23:44:55.595397 39, [0] oxoxxxxx xxoxxxxx [MSB]
2304 23:44:55.595457 40, [0] xxoxxxxx xxoxxxxx [MSB]
2305 23:44:55.595517 41, [0] xxxxxxxx xxxxxxxx [MSB]
2306 23:44:55.595588 iDelay=41, Bit 0, Center 21 (3 ~ 39) 37
2307 23:44:55.595650 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2308 23:44:55.595709 iDelay=41, Bit 2, Center 22 (5 ~ 40) 36
2309 23:44:55.595776 iDelay=41, Bit 3, Center 14 (-3 ~ 31) 35
2310 23:44:55.595836 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
2311 23:44:55.595895 iDelay=41, Bit 5, Center 16 (-1 ~ 34) 36
2312 23:44:55.595961 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2313 23:44:55.596021 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
2314 23:44:55.596080 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2315 23:44:55.596343 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2316 23:44:55.596411 iDelay=41, Bit 10, Center 23 (7 ~ 40) 34
2317 23:44:55.596472 iDelay=41, Bit 11, Center 14 (-3 ~ 32) 36
2318 23:44:55.596539 iDelay=41, Bit 12, Center 17 (0 ~ 34) 35
2319 23:44:55.596600 iDelay=41, Bit 13, Center 15 (-2 ~ 33) 36
2320 23:44:55.596659 iDelay=41, Bit 14, Center 18 (2 ~ 35) 34
2321 23:44:55.596726 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
2322 23:44:55.596787 ==
2323 23:44:55.596847 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2324 23:44:55.596914 fsp= 1, odt_onoff= 1, Byte mode= 0
2325 23:44:55.596975 ==
2326 23:44:55.597034 DQS Delay:
2327 23:44:55.597094 DQS0 = 0, DQS1 = 0
2328 23:44:55.597161 DQM Delay:
2329 23:44:55.597220 DQM0 = 19, DQM1 = 17
2330 23:44:55.597279 DQ Delay:
2331 23:44:55.597347 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2332 23:44:55.597407 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =20
2333 23:44:55.597483 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =14
2334 23:44:55.597545 DQ12 =17, DQ13 =15, DQ14 =18, DQ15 =20
2335 23:44:55.597604
2336 23:44:55.597662
2337 23:44:55.597730
2338 23:44:55.597789 [DramC_TX_OE_Calibration] TA2
2339 23:44:55.597848 Original DQ_B0 (3 6) =30, OEN = 27
2340 23:44:55.597917 Original DQ_B1 (3 6) =30, OEN = 27
2341 23:44:55.597976 23, 0x0, End_B0=23 End_B1=23
2342 23:44:55.598036 24, 0x0, End_B0=24 End_B1=24
2343 23:44:55.598121 25, 0x0, End_B0=25 End_B1=25
2344 23:44:55.598211 26, 0x0, End_B0=26 End_B1=26
2345 23:44:55.598284 27, 0x0, End_B0=27 End_B1=27
2346 23:44:55.598345 28, 0x0, End_B0=28 End_B1=28
2347 23:44:55.598405 29, 0x0, End_B0=29 End_B1=29
2348 23:44:55.598474 30, 0x0, End_B0=30 End_B1=30
2349 23:44:55.598538 31, 0xFFFF, End_B0=30 End_B1=30
2350 23:44:55.598598 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2351 23:44:55.598674 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2352 23:44:55.598746
2353 23:44:55.598808
2354 23:44:55.600043 Write Rank1 MR23 =0x3f
2355 23:44:55.600134 [DQSOSC]
2356 23:44:55.606741 [DQSOSCAuto] RK1, (LSB)MR18= 0xa8a8, (MSB)MR19= 0x202, tDQSOscB0 = 463 ps tDQSOscB1 = 463 ps
2357 23:44:55.612863 CH0_RK1: MR19=0x202, MR18=0xA8A8, DQSOSC=463, MR23=63, INC=11, DEC=17
2358 23:44:55.616257 Write Rank1 MR23 =0x3f
2359 23:44:55.616358 [DQSOSC]
2360 23:44:55.626087 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5a5, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2361 23:44:55.626189 CH0 RK1: MR19=202, MR18=A5A5
2362 23:44:55.629501 [RxdqsGatingPostProcess] freq 1600
2363 23:44:55.636027 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2364 23:44:55.636118 Rank: 0
2365 23:44:55.639379 best DQS0 dly(2T, 0.5T) = (2, 6)
2366 23:44:55.642684 best DQS1 dly(2T, 0.5T) = (2, 6)
2367 23:44:55.646017 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2368 23:44:55.649239 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2369 23:44:55.649334 Rank: 1
2370 23:44:55.652576 best DQS0 dly(2T, 0.5T) = (2, 6)
2371 23:44:55.655618 best DQS1 dly(2T, 0.5T) = (2, 6)
2372 23:44:55.658921 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2373 23:44:55.662286 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2374 23:44:55.665313 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2375 23:44:55.668545 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2376 23:44:55.675096 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2377 23:44:55.675193 Write Rank0 MR13 =0x59
2378 23:44:55.678503 ==
2379 23:44:55.682062 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2380 23:44:55.685191 fsp= 1, odt_onoff= 1, Byte mode= 0
2381 23:44:55.685285 ==
2382 23:44:55.688407 === u2Vref_new: 0x56 --> 0x3a
2383 23:44:55.691567 === u2Vref_new: 0x58 --> 0x58
2384 23:44:55.694966 === u2Vref_new: 0x5a --> 0x5a
2385 23:44:55.698004 === u2Vref_new: 0x5c --> 0x78
2386 23:44:55.701554 === u2Vref_new: 0x5e --> 0x7a
2387 23:44:55.705033 === u2Vref_new: 0x60 --> 0x90
2388 23:44:55.707843 [CA 0] Center 37 (12~63) winsize 52
2389 23:44:55.711145 [CA 1] Center 37 (11~63) winsize 53
2390 23:44:55.714609 [CA 2] Center 34 (6~63) winsize 58
2391 23:44:55.717970 [CA 3] Center 34 (6~63) winsize 58
2392 23:44:55.721013 [CA 4] Center 34 (5~63) winsize 59
2393 23:44:55.724210 [CA 5] Center 28 (-1~58) winsize 60
2394 23:44:55.724291
2395 23:44:55.727327 [CATrainingPosCal] consider 1 rank data
2396 23:44:55.730955 u2DelayCellTimex100 = 744/100 ps
2397 23:44:55.734086 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2398 23:44:55.737236 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2399 23:44:55.740548 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2400 23:44:55.743825 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2401 23:44:55.747110 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2402 23:44:55.750462 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2403 23:44:55.750593
2404 23:44:55.756951 CA PerBit enable=1, Macro0, CA PI delay=28
2405 23:44:55.757039 === u2Vref_new: 0x5e --> 0x7a
2406 23:44:55.757119
2407 23:44:55.760217 Vref(ca) range 1: 30
2408 23:44:55.760297
2409 23:44:55.763564 CS Dly= 11 (42-0-32)
2410 23:44:55.763647 Write Rank0 MR13 =0xd8
2411 23:44:55.766980 Write Rank0 MR13 =0xd8
2412 23:44:55.770016 Write Rank0 MR12 =0x5e
2413 23:44:55.770100 Write Rank1 MR13 =0x59
2414 23:44:55.770180 ==
2415 23:44:55.776791 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2416 23:44:55.780003 fsp= 1, odt_onoff= 1, Byte mode= 0
2417 23:44:55.780092 ==
2418 23:44:55.783279 === u2Vref_new: 0x56 --> 0x3a
2419 23:44:55.786384 === u2Vref_new: 0x58 --> 0x58
2420 23:44:55.789520 === u2Vref_new: 0x5a --> 0x5a
2421 23:44:55.792875 === u2Vref_new: 0x5c --> 0x78
2422 23:44:55.792984 === u2Vref_new: 0x5e --> 0x7a
2423 23:44:55.796617 === u2Vref_new: 0x60 --> 0x90
2424 23:44:55.799953 [CA 0] Center 37 (12~63) winsize 52
2425 23:44:55.802974 [CA 1] Center 37 (11~63) winsize 53
2426 23:44:55.806536 [CA 2] Center 34 (5~63) winsize 59
2427 23:44:55.809718 [CA 3] Center 34 (6~63) winsize 58
2428 23:44:55.812891 [CA 4] Center 33 (4~63) winsize 60
2429 23:44:55.816398 [CA 5] Center 29 (0~58) winsize 59
2430 23:44:55.816482
2431 23:44:55.819812 [CATrainingPosCal] consider 2 rank data
2432 23:44:55.822931 u2DelayCellTimex100 = 744/100 ps
2433 23:44:55.826046 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2434 23:44:55.832625 CA1 delay=37 (11~63),Diff = 8 PI (10 cell)
2435 23:44:55.836172 CA2 delay=34 (6~63),Diff = 5 PI (6 cell)
2436 23:44:55.839312 CA3 delay=34 (6~63),Diff = 5 PI (6 cell)
2437 23:44:55.842279 CA4 delay=34 (5~63),Diff = 5 PI (6 cell)
2438 23:44:55.845625 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2439 23:44:55.845717
2440 23:44:55.848952 CA PerBit enable=1, Macro0, CA PI delay=29
2441 23:44:55.852222 === u2Vref_new: 0x60 --> 0x90
2442 23:44:55.852319
2443 23:44:55.855476 Vref(ca) range 1: 32
2444 23:44:55.855561
2445 23:44:55.855631 CS Dly= 11 (42-0-32)
2446 23:44:55.858579 Write Rank1 MR13 =0xd8
2447 23:44:55.861849 Write Rank1 MR13 =0xd8
2448 23:44:55.861935 Write Rank1 MR12 =0x60
2449 23:44:55.865097 [RankSwap] Rank num 2, (Multi 1), Rank 0
2450 23:44:55.868424 Write Rank0 MR2 =0xad
2451 23:44:55.868541 [Write Leveling]
2452 23:44:55.871706 delay byte0 byte1 byte2 byte3
2453 23:44:55.871820
2454 23:44:55.875216 10 0 0
2455 23:44:55.875322 11 0 0
2456 23:44:55.878539 12 0 0
2457 23:44:55.878632 13 0 0
2458 23:44:55.878704 14 0 0
2459 23:44:55.881696 15 0 0
2460 23:44:55.881787 16 0 0
2461 23:44:55.884996 17 0 0
2462 23:44:55.885209 18 0 0
2463 23:44:55.888173 19 0 0
2464 23:44:55.888292 20 0 0
2465 23:44:55.888395 21 0 0
2466 23:44:55.891538 22 0 0
2467 23:44:55.891630 23 0 0
2468 23:44:55.894744 24 0 0
2469 23:44:55.894971 25 0 0
2470 23:44:55.895097 26 0 0
2471 23:44:55.898057 27 0 0
2472 23:44:55.898136 28 0 ff
2473 23:44:55.901290 29 0 0
2474 23:44:55.901412 30 0 ff
2475 23:44:55.904475 31 0 ff
2476 23:44:55.904591 32 0 ff
2477 23:44:55.907813 33 0 ff
2478 23:44:55.907938 34 0 ff
2479 23:44:55.908047 35 0 ff
2480 23:44:55.911288 36 0 ff
2481 23:44:55.911380 37 ff ff
2482 23:44:55.914288 38 ff ff
2483 23:44:55.914433 39 ff ff
2484 23:44:55.917500 40 ff ff
2485 23:44:55.917641 41 ff ff
2486 23:44:55.921065 42 ff ff
2487 23:44:55.921190 43 ff ff
2488 23:44:55.924225 pass bytecount = 0xff (0xff: all bytes pass)
2489 23:44:55.927311
2490 23:44:55.927409 DQS0 dly: 37
2491 23:44:55.927499 DQS1 dly: 30
2492 23:44:55.931017 Write Rank0 MR2 =0x2d
2493 23:44:55.934298 [RankSwap] Rank num 2, (Multi 1), Rank 0
2494 23:44:55.937208 Write Rank0 MR1 =0xd6
2495 23:44:55.937325 [Gating]
2496 23:44:55.937435 ==
2497 23:44:55.940933 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2498 23:44:55.943706 fsp= 1, odt_onoff= 1, Byte mode= 0
2499 23:44:55.943819 ==
2500 23:44:55.950472 3 1 0 |2c2b 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
2501 23:44:55.953715 3 1 4 |2c2b 3636 |(11 11)(11 11) |(1 1)(0 0)| 0
2502 23:44:55.956977 3 1 8 |2c2b 3636 |(11 11)(11 11) |(1 1)(0 0)| 0
2503 23:44:55.963433 3 1 12 |2c2b 3636 |(11 11)(11 11) |(0 0)(1 1)| 0
2504 23:44:55.966618 3 1 16 |2c2b 3636 |(11 11)(10 10) |(1 0)(0 0)| 0
2505 23:44:55.970135 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2506 23:44:55.976329 3 1 24 |2c2b 3636 |(11 11)(10 10) |(1 0)(1 1)| 0
2507 23:44:55.979619 3 1 28 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2508 23:44:55.983260 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2509 23:44:55.989724 3 2 0 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 1)| 0
2510 23:44:55.992968 3 2 4 |2c2b 605 |(11 11)(11 11) |(1 0)(0 1)| 0
2511 23:44:55.996320 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2512 23:44:56.002909 [Byte 1] Lead/lag Transition tap number (4)
2513 23:44:56.006014 3 2 12 |2c2b 3333 |(11 11)(11 11) |(1 0)(0 0)| 0
2514 23:44:56.009277 3 2 16 |201 100 |(11 11)(11 11) |(0 0)(0 1)| 0
2515 23:44:56.015692 3 2 20 |303 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2516 23:44:56.019109 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2517 23:44:56.022197 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2518 23:44:56.025486 3 3 0 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2519 23:44:56.032318 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2520 23:44:56.035494 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2521 23:44:56.038625 3 3 12 |3534 1818 |(11 11)(11 11) |(0 0)(1 1)| 0
2522 23:44:56.045317 3 3 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2523 23:44:56.048583 3 3 20 |3534 1918 |(11 11)(11 11) |(1 1)(1 1)| 0
2524 23:44:56.051920 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2525 23:44:56.058216 3 3 24 |3534 202 |(11 11)(11 11) |(0 1)(1 1)| 0
2526 23:44:56.061484 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2527 23:44:56.064859 [Byte 1] Lead/lag falling Transition (3, 3, 28)
2528 23:44:56.071400 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2529 23:44:56.074703 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2530 23:44:56.077970 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2531 23:44:56.084664 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2532 23:44:56.087954 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2533 23:44:56.091220 3 4 20 |908 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2534 23:44:56.097510 3 4 24 |3d3d f0f |(11 11)(11 11) |(1 1)(1 1)| 0
2535 23:44:56.100803 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2536 23:44:56.104029 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2537 23:44:56.110624 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2538 23:44:56.113947 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2539 23:44:56.117240 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2540 23:44:56.123709 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2541 23:44:56.127260 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2542 23:44:56.130263 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2543 23:44:56.137070 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2544 23:44:56.140422 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2545 23:44:56.143303 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2546 23:44:56.149905 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2547 23:44:56.153079 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2548 23:44:56.156390 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2549 23:44:56.159621 [Byte 0] Lead/lag Transition tap number (3)
2550 23:44:56.166273 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2551 23:44:56.169538 3 6 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2552 23:44:56.172822 [Byte 1] Lead/lag Transition tap number (2)
2553 23:44:56.176179 3 6 20 |c0c 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2554 23:44:56.182846 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2555 23:44:56.185790 [Byte 0]First pass (3, 6, 24)
2556 23:44:56.189055 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2557 23:44:56.192661 [Byte 1]First pass (3, 6, 28)
2558 23:44:56.195652 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2559 23:44:56.198862 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2560 23:44:56.202267 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2561 23:44:56.205617 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2562 23:44:56.211943 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2563 23:44:56.215594 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2564 23:44:56.218871 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2565 23:44:56.221958 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2566 23:44:56.228488 All bytes gating window > 1UI, Early break!
2567 23:44:56.228602
2568 23:44:56.231782 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2569 23:44:56.231893
2570 23:44:56.235075 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2571 23:44:56.235198
2572 23:44:56.235310
2573 23:44:56.235406
2574 23:44:56.238290 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2575 23:44:56.238386
2576 23:44:56.244792 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2577 23:44:56.244915
2578 23:44:56.245026
2579 23:44:56.245141 Write Rank0 MR1 =0x56
2580 23:44:56.245238
2581 23:44:56.247985 best RODT dly(2T, 0.5T) = (2, 3)
2582 23:44:56.248098
2583 23:44:56.251203 best RODT dly(2T, 0.5T) = (2, 3)
2584 23:44:56.251281 ==
2585 23:44:56.258087 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2586 23:44:56.261222 fsp= 1, odt_onoff= 1, Byte mode= 0
2587 23:44:56.261347 ==
2588 23:44:56.264579 Start DQ dly to find pass range UseTestEngine =0
2589 23:44:56.267819 x-axis: bit #, y-axis: DQ dly (-127~63)
2590 23:44:56.271280 RX Vref Scan = 0
2591 23:44:56.274488 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2592 23:44:56.274605 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2593 23:44:56.277634 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2594 23:44:56.281014 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2595 23:44:56.284244 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2596 23:44:56.287528 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2597 23:44:56.290717 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2598 23:44:56.293978 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2599 23:44:56.297400 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2600 23:44:56.300689 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2601 23:44:56.300772 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2602 23:44:56.303958 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2603 23:44:56.307090 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2604 23:44:56.310321 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2605 23:44:56.313472 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2606 23:44:56.317061 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2607 23:44:56.320258 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2608 23:44:56.323281 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2609 23:44:56.326837 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2610 23:44:56.326931 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2611 23:44:56.330071 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2612 23:44:56.333454 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2613 23:44:56.336575 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2614 23:44:56.339652 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2615 23:44:56.343230 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2616 23:44:56.346389 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2617 23:44:56.349590 0, [0] xxxoxxxx ooxxxxxo [MSB]
2618 23:44:56.349671 1, [0] xxooxxxx ooxxxxxo [MSB]
2619 23:44:56.353163 2, [0] xxooxxxo oooxxxxo [MSB]
2620 23:44:56.356295 3, [0] xxooxxxo oooooxoo [MSB]
2621 23:44:56.359466 4, [0] xooooxxo oooooooo [MSB]
2622 23:44:56.363066 5, [0] oooooxxo oooooooo [MSB]
2623 23:44:56.366138 6, [0] oooooxoo oooooooo [MSB]
2624 23:44:56.366229 32, [0] oooooooo ooooooox [MSB]
2625 23:44:56.369220 33, [0] oooooooo ooooooox [MSB]
2626 23:44:56.372853 34, [0] oooooooo ooooooox [MSB]
2627 23:44:56.375809 35, [0] ooxxoooo oxooooox [MSB]
2628 23:44:56.379007 36, [0] ooxxoooo oxooooox [MSB]
2629 23:44:56.382320 37, [0] ooxxoooo xxooooox [MSB]
2630 23:44:56.385596 38, [0] ooxxoooo xxooooox [MSB]
2631 23:44:56.389072 39, [0] oxxxooox xxoxooox [MSB]
2632 23:44:56.389194 40, [0] oxxxxoox xxxxxoox [MSB]
2633 23:44:56.392091 41, [0] xxxxxoxx xxxxxxxx [MSB]
2634 23:44:56.395572 42, [0] xxxxxxxx xxxxxxxx [MSB]
2635 23:44:56.399025 iDelay=42, Bit 0, Center 22 (5 ~ 40) 36
2636 23:44:56.401815 iDelay=42, Bit 1, Center 21 (4 ~ 38) 35
2637 23:44:56.405446 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
2638 23:44:56.411715 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2639 23:44:56.415182 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2640 23:44:56.418405 iDelay=42, Bit 5, Center 24 (7 ~ 41) 35
2641 23:44:56.421625 iDelay=42, Bit 6, Center 23 (6 ~ 40) 35
2642 23:44:56.425002 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
2643 23:44:56.428311 iDelay=42, Bit 8, Center 17 (-1 ~ 36) 38
2644 23:44:56.431488 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2645 23:44:56.434928 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
2646 23:44:56.437928 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
2647 23:44:56.441321 iDelay=42, Bit 12, Center 21 (3 ~ 39) 37
2648 23:44:56.444696 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2649 23:44:56.450923 iDelay=42, Bit 14, Center 21 (3 ~ 40) 38
2650 23:44:56.454532 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2651 23:44:56.454647 ==
2652 23:44:56.457523 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2653 23:44:56.461065 fsp= 1, odt_onoff= 1, Byte mode= 0
2654 23:44:56.461175 ==
2655 23:44:56.464317 DQS Delay:
2656 23:44:56.464425 DQS0 = 0, DQS1 = 0
2657 23:44:56.467614 DQM Delay:
2658 23:44:56.467693 DQM0 = 20, DQM1 = 18
2659 23:44:56.467761 DQ Delay:
2660 23:44:56.470894 DQ0 =22, DQ1 =21, DQ2 =17, DQ3 =16
2661 23:44:56.474191 DQ4 =21, DQ5 =24, DQ6 =23, DQ7 =20
2662 23:44:56.477418 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2663 23:44:56.480753 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =13
2664 23:44:56.480844
2665 23:44:56.480916
2666 23:44:56.484009 DramC Write-DBI off
2667 23:44:56.484100 ==
2668 23:44:56.490629 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2669 23:44:56.493568 fsp= 1, odt_onoff= 1, Byte mode= 0
2670 23:44:56.493660 ==
2671 23:44:56.496919 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2672 23:44:56.497035
2673 23:44:56.500159 Begin, DQ Scan Range 926~1182
2674 23:44:56.500259
2675 23:44:56.500331
2676 23:44:56.503296 TX Vref Scan disable
2677 23:44:56.507017 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2678 23:44:56.510018 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2679 23:44:56.513329 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2680 23:44:56.516540 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2681 23:44:56.520112 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2682 23:44:56.523292 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2683 23:44:56.526474 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2684 23:44:56.529572 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2685 23:44:56.533018 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2686 23:44:56.536031 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2687 23:44:56.539640 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2688 23:44:56.542649 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2689 23:44:56.549300 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2690 23:44:56.552611 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2691 23:44:56.555734 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2692 23:44:56.559299 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2693 23:44:56.562461 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2694 23:44:56.565961 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2695 23:44:56.568969 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2696 23:44:56.572118 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2697 23:44:56.575591 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2698 23:44:56.578787 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2699 23:44:56.581985 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2700 23:44:56.585383 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2701 23:44:56.588598 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2702 23:44:56.595225 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2703 23:44:56.598337 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2704 23:44:56.601837 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2705 23:44:56.605013 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2706 23:44:56.608247 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2707 23:44:56.611636 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2708 23:44:56.614754 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2709 23:44:56.618297 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2710 23:44:56.621273 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2711 23:44:56.624656 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2712 23:44:56.628026 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2713 23:44:56.631067 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2714 23:44:56.634586 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2715 23:44:56.637704 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2716 23:44:56.644458 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2717 23:44:56.647453 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2718 23:44:56.650961 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2719 23:44:56.654080 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2720 23:44:56.657356 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2721 23:44:56.660934 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2722 23:44:56.664055 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2723 23:44:56.667106 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2724 23:44:56.670672 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2725 23:44:56.673965 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2726 23:44:56.677137 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
2727 23:44:56.680355 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
2728 23:44:56.683609 977 |3 6 17|[0] xxxxxxxx oooxoxoo [MSB]
2729 23:44:56.686677 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2730 23:44:56.693316 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2731 23:44:56.696735 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2732 23:44:56.699926 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2733 23:44:56.703376 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2734 23:44:56.706609 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
2735 23:44:56.709751 984 |3 6 24|[0] xooooxoo oooooooo [MSB]
2736 23:44:56.712980 992 |3 6 32|[0] oooooooo ooooooox [MSB]
2737 23:44:56.716416 993 |3 6 33|[0] oooooooo oxooooox [MSB]
2738 23:44:56.719616 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2739 23:44:56.726323 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2740 23:44:56.729406 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2741 23:44:56.732518 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2742 23:44:56.735917 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2743 23:44:56.739287 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2744 23:44:56.742733 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2745 23:44:56.745633 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2746 23:44:56.748847 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2747 23:44:56.752295 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2748 23:44:56.755648 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2749 23:44:56.762211 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2750 23:44:56.765542 1006 |3 6 46|[0] oxxxxoxx xxxxxxxx [MSB]
2751 23:44:56.768670 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2752 23:44:56.771843 Byte0, DQ PI dly=993, DQM PI dly= 993
2753 23:44:56.775323 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2754 23:44:56.775416
2755 23:44:56.778448 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2756 23:44:56.778556
2757 23:44:56.785079 Byte1, DQ PI dly=984, DQM PI dly= 984
2758 23:44:56.788275 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2759 23:44:56.788378
2760 23:44:56.791492 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2761 23:44:56.791589
2762 23:44:56.791670 ==
2763 23:44:56.798148 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2764 23:44:56.801232 fsp= 1, odt_onoff= 1, Byte mode= 0
2765 23:44:56.801322 ==
2766 23:44:56.804855 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2767 23:44:56.804982
2768 23:44:56.808078 Begin, DQ Scan Range 960~1024
2769 23:44:56.811139 Write Rank0 MR14 =0x0
2770 23:44:56.818375
2771 23:44:56.818466 CH=1, VrefRange= 0, VrefLevel = 0
2772 23:44:56.824914 TX Bit0 (986~1001) 16 993, Bit8 (977~991) 15 984,
2773 23:44:56.828411 TX Bit1 (985~1000) 16 992, Bit9 (977~988) 12 982,
2774 23:44:56.834976 TX Bit2 (984~998) 15 991, Bit10 (979~992) 14 985,
2775 23:44:56.838326 TX Bit3 (981~996) 16 988, Bit11 (982~992) 11 987,
2776 23:44:56.841394 TX Bit4 (985~999) 15 992, Bit12 (980~992) 13 986,
2777 23:44:56.847988 TX Bit5 (986~1001) 16 993, Bit13 (982~993) 12 987,
2778 23:44:56.851343 TX Bit6 (985~1000) 16 992, Bit14 (980~992) 13 986,
2779 23:44:56.857658 TX Bit7 (985~999) 15 992, Bit15 (976~984) 9 980,
2780 23:44:56.857761
2781 23:44:56.857856 Write Rank0 MR14 =0x2
2782 23:44:56.867375
2783 23:44:56.867503 CH=1, VrefRange= 0, VrefLevel = 2
2784 23:44:56.873706 TX Bit0 (986~1002) 17 994, Bit8 (977~991) 15 984,
2785 23:44:56.877275 TX Bit1 (985~1001) 17 993, Bit9 (977~990) 14 983,
2786 23:44:56.883525 TX Bit2 (983~999) 17 991, Bit10 (978~993) 16 985,
2787 23:44:56.886730 TX Bit3 (980~997) 18 988, Bit11 (982~992) 11 987,
2788 23:44:56.890378 TX Bit4 (985~1000) 16 992, Bit12 (980~993) 14 986,
2789 23:44:56.896624 TX Bit5 (986~1001) 16 993, Bit13 (981~994) 14 987,
2790 23:44:56.900075 TX Bit6 (985~1000) 16 992, Bit14 (980~992) 13 986,
2791 23:44:56.906499 TX Bit7 (985~1000) 16 992, Bit15 (976~985) 10 980,
2792 23:44:56.906618
2793 23:44:56.906735 Write Rank0 MR14 =0x4
2794 23:44:56.916325
2795 23:44:56.916449 CH=1, VrefRange= 0, VrefLevel = 4
2796 23:44:56.923256 TX Bit0 (986~1003) 18 994, Bit8 (976~992) 17 984,
2797 23:44:56.926357 TX Bit1 (985~1002) 18 993, Bit9 (976~990) 15 983,
2798 23:44:56.932828 TX Bit2 (983~999) 17 991, Bit10 (978~994) 17 986,
2799 23:44:56.936096 TX Bit3 (981~997) 17 989, Bit11 (980~993) 14 986,
2800 23:44:56.939264 TX Bit4 (984~1000) 17 992, Bit12 (980~994) 15 987,
2801 23:44:56.945892 TX Bit5 (986~1002) 17 994, Bit13 (980~995) 16 987,
2802 23:44:56.949058 TX Bit6 (985~1001) 17 993, Bit14 (979~993) 15 986,
2803 23:44:56.955812 TX Bit7 (985~1000) 16 992, Bit15 (975~986) 12 980,
2804 23:44:56.955932
2805 23:44:56.956040 Write Rank0 MR14 =0x6
2806 23:44:56.966070
2807 23:44:56.966189 CH=1, VrefRange= 0, VrefLevel = 6
2808 23:44:56.972428 TX Bit0 (986~1004) 19 995, Bit8 (976~992) 17 984,
2809 23:44:56.975567 TX Bit1 (984~1003) 20 993, Bit9 (976~991) 16 983,
2810 23:44:56.982365 TX Bit2 (983~1000) 18 991, Bit10 (978~995) 18 986,
2811 23:44:56.985340 TX Bit3 (979~998) 20 988, Bit11 (980~994) 15 987,
2812 23:44:56.992178 TX Bit4 (984~1001) 18 992, Bit12 (979~994) 16 986,
2813 23:44:56.995474 TX Bit5 (985~1003) 19 994, Bit13 (981~996) 16 988,
2814 23:44:56.998446 TX Bit6 (985~1002) 18 993, Bit14 (978~994) 17 986,
2815 23:44:57.004938 TX Bit7 (985~1001) 17 993, Bit15 (975~987) 13 981,
2816 23:44:57.005067
2817 23:44:57.005175 Write Rank0 MR14 =0x8
2818 23:44:57.015345
2819 23:44:57.015468 CH=1, VrefRange= 0, VrefLevel = 8
2820 23:44:57.021785 TX Bit0 (985~1004) 20 994, Bit8 (976~992) 17 984,
2821 23:44:57.025297 TX Bit1 (984~1003) 20 993, Bit9 (976~991) 16 983,
2822 23:44:57.031725 TX Bit2 (983~1000) 18 991, Bit10 (977~996) 20 986,
2823 23:44:57.035221 TX Bit3 (980~998) 19 989, Bit11 (979~995) 17 987,
2824 23:44:57.041499 TX Bit4 (984~1002) 19 993, Bit12 (978~995) 18 986,
2825 23:44:57.044843 TX Bit5 (985~1004) 20 994, Bit13 (980~997) 18 988,
2826 23:44:57.047925 TX Bit6 (985~1003) 19 994, Bit14 (979~994) 16 986,
2827 23:44:57.054517 TX Bit7 (984~1001) 18 992, Bit15 (975~989) 15 982,
2828 23:44:57.054646
2829 23:44:57.057688 wait MRW command Rank0 MR14 =0xa fired (1)
2830 23:44:57.060912 Write Rank0 MR14 =0xa
2831 23:44:57.068997
2832 23:44:57.072240 CH=1, VrefRange= 0, VrefLevel = 10
2833 23:44:57.075388 TX Bit0 (985~1005) 21 995, Bit8 (976~993) 18 984,
2834 23:44:57.078607 TX Bit1 (984~1004) 21 994, Bit9 (976~991) 16 983,
2835 23:44:57.085334 TX Bit2 (982~1001) 20 991, Bit10 (977~996) 20 986,
2836 23:44:57.088513 TX Bit3 (979~999) 21 989, Bit11 (979~995) 17 987,
2837 23:44:57.095066 TX Bit4 (984~1003) 20 993, Bit12 (978~996) 19 987,
2838 23:44:57.098433 TX Bit5 (985~1004) 20 994, Bit13 (979~998) 20 988,
2839 23:44:57.101699 TX Bit6 (984~1003) 20 993, Bit14 (978~995) 18 986,
2840 23:44:57.108167 TX Bit7 (984~1003) 20 993, Bit15 (975~990) 16 982,
2841 23:44:57.108295
2842 23:44:57.108404 Write Rank0 MR14 =0xc
2843 23:44:57.118760
2844 23:44:57.121927 CH=1, VrefRange= 0, VrefLevel = 12
2845 23:44:57.125073 TX Bit0 (985~1005) 21 995, Bit8 (976~994) 19 985,
2846 23:44:57.128195 TX Bit1 (984~1005) 22 994, Bit9 (976~992) 17 984,
2847 23:44:57.134937 TX Bit2 (982~1001) 20 991, Bit10 (977~997) 21 987,
2848 23:44:57.138133 TX Bit3 (979~999) 21 989, Bit11 (979~996) 18 987,
2849 23:44:57.144848 TX Bit4 (984~1004) 21 994, Bit12 (978~997) 20 987,
2850 23:44:57.147999 TX Bit5 (985~1005) 21 995, Bit13 (979~998) 20 988,
2851 23:44:57.151552 TX Bit6 (984~1004) 21 994, Bit14 (978~996) 19 987,
2852 23:44:57.157766 TX Bit7 (984~1003) 20 993, Bit15 (974~990) 17 982,
2853 23:44:57.157893
2854 23:44:57.161083 wait MRW command Rank0 MR14 =0xe fired (1)
2855 23:44:57.164289 Write Rank0 MR14 =0xe
2856 23:44:57.172363
2857 23:44:57.175766 CH=1, VrefRange= 0, VrefLevel = 14
2858 23:44:57.178801 TX Bit0 (985~1006) 22 995, Bit8 (976~994) 19 985,
2859 23:44:57.181903 TX Bit1 (983~1005) 23 994, Bit9 (975~992) 18 983,
2860 23:44:57.188576 TX Bit2 (982~1002) 21 992, Bit10 (977~997) 21 987,
2861 23:44:57.191770 TX Bit3 (979~999) 21 989, Bit11 (978~997) 20 987,
2862 23:44:57.198346 TX Bit4 (983~1005) 23 994, Bit12 (978~998) 21 988,
2863 23:44:57.201576 TX Bit5 (985~1005) 21 995, Bit13 (979~998) 20 988,
2864 23:44:57.204759 TX Bit6 (984~1005) 22 994, Bit14 (977~996) 20 986,
2865 23:44:57.211503 TX Bit7 (985~1004) 20 994, Bit15 (974~990) 17 982,
2866 23:44:57.211632
2867 23:44:57.214467 Write Rank0 MR14 =0x10
2868 23:44:57.222242
2869 23:44:57.225409 CH=1, VrefRange= 0, VrefLevel = 16
2870 23:44:57.228869 TX Bit0 (985~1006) 22 995, Bit8 (975~995) 21 985,
2871 23:44:57.232023 TX Bit1 (983~1005) 23 994, Bit9 (975~992) 18 983,
2872 23:44:57.238515 TX Bit2 (982~1003) 22 992, Bit10 (977~998) 22 987,
2873 23:44:57.242088 TX Bit3 (978~1000) 23 989, Bit11 (978~998) 21 988,
2874 23:44:57.248396 TX Bit4 (983~1005) 23 994, Bit12 (977~998) 22 987,
2875 23:44:57.251610 TX Bit5 (985~1006) 22 995, Bit13 (978~998) 21 988,
2876 23:44:57.254823 TX Bit6 (984~1005) 22 994, Bit14 (977~998) 22 987,
2877 23:44:57.261468 TX Bit7 (984~1005) 22 994, Bit15 (973~991) 19 982,
2878 23:44:57.261600
2879 23:44:57.264545 Write Rank0 MR14 =0x12
2880 23:44:57.272408
2881 23:44:57.275567 CH=1, VrefRange= 0, VrefLevel = 18
2882 23:44:57.278907 TX Bit0 (985~1006) 22 995, Bit8 (975~996) 22 985,
2883 23:44:57.282173 TX Bit1 (984~1006) 23 995, Bit9 (975~993) 19 984,
2884 23:44:57.288823 TX Bit2 (981~1003) 23 992, Bit10 (977~998) 22 987,
2885 23:44:57.291999 TX Bit3 (978~1000) 23 989, Bit11 (978~998) 21 988,
2886 23:44:57.298298 TX Bit4 (983~1005) 23 994, Bit12 (977~998) 22 987,
2887 23:44:57.301679 TX Bit5 (985~1006) 22 995, Bit13 (978~999) 22 988,
2888 23:44:57.305226 TX Bit6 (984~1005) 22 994, Bit14 (977~998) 22 987,
2889 23:44:57.311632 TX Bit7 (984~1005) 22 994, Bit15 (971~991) 21 981,
2890 23:44:57.311725
2891 23:44:57.314702 Write Rank0 MR14 =0x14
2892 23:44:57.322337
2893 23:44:57.325438 CH=1, VrefRange= 0, VrefLevel = 20
2894 23:44:57.328937 TX Bit0 (985~1006) 22 995, Bit8 (975~996) 22 985,
2895 23:44:57.331987 TX Bit1 (983~1006) 24 994, Bit9 (975~993) 19 984,
2896 23:44:57.338597 TX Bit2 (981~1004) 24 992, Bit10 (976~998) 23 987,
2897 23:44:57.342121 TX Bit3 (978~1000) 23 989, Bit11 (978~999) 22 988,
2898 23:44:57.348527 TX Bit4 (982~1006) 25 994, Bit12 (977~999) 23 988,
2899 23:44:57.351676 TX Bit5 (984~1006) 23 995, Bit13 (978~999) 22 988,
2900 23:44:57.355118 TX Bit6 (984~1006) 23 995, Bit14 (977~998) 22 987,
2901 23:44:57.361601 TX Bit7 (984~1005) 22 994, Bit15 (972~991) 20 981,
2902 23:44:57.361729
2903 23:44:57.364768 Write Rank0 MR14 =0x16
2904 23:44:57.372390
2905 23:44:57.375620 CH=1, VrefRange= 0, VrefLevel = 22
2906 23:44:57.379191 TX Bit0 (984~1007) 24 995, Bit8 (975~997) 23 986,
2907 23:44:57.382302 TX Bit1 (982~1006) 25 994, Bit9 (974~994) 21 984,
2908 23:44:57.389045 TX Bit2 (980~1005) 26 992, Bit10 (976~999) 24 987,
2909 23:44:57.392141 TX Bit3 (978~1001) 24 989, Bit11 (977~999) 23 988,
2910 23:44:57.398501 TX Bit4 (982~1006) 25 994, Bit12 (977~999) 23 988,
2911 23:44:57.402057 TX Bit5 (984~1006) 23 995, Bit13 (977~999) 23 988,
2912 23:44:57.405098 TX Bit6 (983~1006) 24 994, Bit14 (976~998) 23 987,
2913 23:44:57.411798 TX Bit7 (983~1006) 24 994, Bit15 (971~992) 22 981,
2914 23:44:57.411915
2915 23:44:57.414876 Write Rank0 MR14 =0x18
2916 23:44:57.422754
2917 23:44:57.425898 CH=1, VrefRange= 0, VrefLevel = 24
2918 23:44:57.429501 TX Bit0 (984~1007) 24 995, Bit8 (974~998) 25 986,
2919 23:44:57.432630 TX Bit1 (982~1006) 25 994, Bit9 (974~995) 22 984,
2920 23:44:57.439029 TX Bit2 (981~1005) 25 993, Bit10 (976~999) 24 987,
2921 23:44:57.442395 TX Bit3 (977~1002) 26 989, Bit11 (977~999) 23 988,
2922 23:44:57.449182 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2923 23:44:57.452228 TX Bit5 (984~1007) 24 995, Bit13 (978~999) 22 988,
2924 23:44:57.455340 TX Bit6 (983~1006) 24 994, Bit14 (976~999) 24 987,
2925 23:44:57.462110 TX Bit7 (983~1006) 24 994, Bit15 (971~992) 22 981,
2926 23:44:57.462228
2927 23:44:57.465313 Write Rank0 MR14 =0x1a
2928 23:44:57.472884
2929 23:44:57.476332 CH=1, VrefRange= 0, VrefLevel = 26
2930 23:44:57.479549 TX Bit0 (984~1007) 24 995, Bit8 (974~998) 25 986,
2931 23:44:57.482713 TX Bit1 (982~1006) 25 994, Bit9 (973~995) 23 984,
2932 23:44:57.489444 TX Bit2 (979~1005) 27 992, Bit10 (976~999) 24 987,
2933 23:44:57.492709 TX Bit3 (978~1002) 25 990, Bit11 (977~999) 23 988,
2934 23:44:57.499169 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2935 23:44:57.502542 TX Bit5 (984~1007) 24 995, Bit13 (977~1000) 24 988,
2936 23:44:57.505671 TX Bit6 (983~1006) 24 994, Bit14 (976~999) 24 987,
2937 23:44:57.512188 TX Bit7 (983~1006) 24 994, Bit15 (970~992) 23 981,
2938 23:44:57.512308
2939 23:44:57.515306 Write Rank0 MR14 =0x1c
2940 23:44:57.523188
2941 23:44:57.526696 CH=1, VrefRange= 0, VrefLevel = 28
2942 23:44:57.529864 TX Bit0 (984~1007) 24 995, Bit8 (974~998) 25 986,
2943 23:44:57.533035 TX Bit1 (982~1007) 26 994, Bit9 (974~996) 23 985,
2944 23:44:57.539656 TX Bit2 (981~1005) 25 993, Bit10 (975~999) 25 987,
2945 23:44:57.543143 TX Bit3 (978~1003) 26 990, Bit11 (977~1000) 24 988,
2946 23:44:57.549370 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2947 23:44:57.552656 TX Bit5 (984~1007) 24 995, Bit13 (977~1000) 24 988,
2948 23:44:57.556161 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
2949 23:44:57.562448 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
2950 23:44:57.562568
2951 23:44:57.565519 Write Rank0 MR14 =0x1e
2952 23:44:57.573866
2953 23:44:57.576959 CH=1, VrefRange= 0, VrefLevel = 30
2954 23:44:57.580343 TX Bit0 (984~1008) 25 996, Bit8 (973~997) 25 985,
2955 23:44:57.583489 TX Bit1 (982~1007) 26 994, Bit9 (972~995) 24 983,
2956 23:44:57.590202 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2957 23:44:57.593241 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
2958 23:44:57.599970 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2959 23:44:57.603128 TX Bit5 (983~1008) 26 995, Bit13 (977~1000) 24 988,
2960 23:44:57.606408 TX Bit6 (982~1007) 26 994, Bit14 (976~999) 24 987,
2961 23:44:57.613012 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
2962 23:44:57.613130
2963 23:44:57.616202 Write Rank0 MR14 =0x20
2964 23:44:57.624541
2965 23:44:57.627641 CH=1, VrefRange= 0, VrefLevel = 32
2966 23:44:57.630930 TX Bit0 (984~1008) 25 996, Bit8 (973~997) 25 985,
2967 23:44:57.634364 TX Bit1 (982~1007) 26 994, Bit9 (972~995) 24 983,
2968 23:44:57.640661 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2969 23:44:57.643932 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
2970 23:44:57.650396 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2971 23:44:57.653928 TX Bit5 (983~1008) 26 995, Bit13 (977~1000) 24 988,
2972 23:44:57.657055 TX Bit6 (982~1007) 26 994, Bit14 (976~999) 24 987,
2973 23:44:57.663542 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
2974 23:44:57.663667
2975 23:44:57.666778 Write Rank0 MR14 =0x22
2976 23:44:57.674938
2977 23:44:57.678322 CH=1, VrefRange= 0, VrefLevel = 34
2978 23:44:57.681467 TX Bit0 (984~1008) 25 996, Bit8 (973~997) 25 985,
2979 23:44:57.684608 TX Bit1 (982~1007) 26 994, Bit9 (972~995) 24 983,
2980 23:44:57.691442 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2981 23:44:57.694564 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
2982 23:44:57.701194 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2983 23:44:57.704337 TX Bit5 (983~1008) 26 995, Bit13 (977~1000) 24 988,
2984 23:44:57.707478 TX Bit6 (982~1007) 26 994, Bit14 (976~999) 24 987,
2985 23:44:57.714078 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
2986 23:44:57.714163
2987 23:44:57.717378 Write Rank0 MR14 =0x24
2988 23:44:57.725315
2989 23:44:57.728475 CH=1, VrefRange= 0, VrefLevel = 36
2990 23:44:57.731837 TX Bit0 (984~1008) 25 996, Bit8 (973~997) 25 985,
2991 23:44:57.735210 TX Bit1 (982~1007) 26 994, Bit9 (972~995) 24 983,
2992 23:44:57.741560 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
2993 23:44:57.745089 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
2994 23:44:57.751473 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
2995 23:44:57.754757 TX Bit5 (983~1008) 26 995, Bit13 (977~1000) 24 988,
2996 23:44:57.758264 TX Bit6 (982~1007) 26 994, Bit14 (976~999) 24 987,
2997 23:44:57.764689 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
2998 23:44:57.764779
2999 23:44:57.767846 Write Rank0 MR14 =0x26
3000 23:44:57.775760
3001 23:44:57.778966 CH=1, VrefRange= 0, VrefLevel = 38
3002 23:44:57.782010 TX Bit0 (984~1008) 25 996, Bit8 (973~997) 25 985,
3003 23:44:57.785358 TX Bit1 (982~1007) 26 994, Bit9 (972~995) 24 983,
3004 23:44:57.792159 TX Bit2 (979~1005) 27 992, Bit10 (975~999) 25 987,
3005 23:44:57.795437 TX Bit3 (977~1002) 26 989, Bit11 (977~1000) 24 988,
3006 23:44:57.801824 TX Bit4 (982~1006) 25 994, Bit12 (976~999) 24 987,
3007 23:44:57.805211 TX Bit5 (983~1008) 26 995, Bit13 (977~1000) 24 988,
3008 23:44:57.808543 TX Bit6 (982~1007) 26 994, Bit14 (976~999) 24 987,
3009 23:44:57.814944 TX Bit7 (982~1006) 25 994, Bit15 (970~993) 24 981,
3010 23:44:57.815063
3011 23:44:57.815175
3012 23:44:57.818465 TX Vref found, early break! 375< 380
3013 23:44:57.821414 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3014 23:44:57.825087 u1DelayCellOfst[0]=9 cells (7 PI)
3015 23:44:57.828220 u1DelayCellOfst[1]=6 cells (5 PI)
3016 23:44:57.831426 u1DelayCellOfst[2]=3 cells (3 PI)
3017 23:44:57.834850 u1DelayCellOfst[3]=0 cells (0 PI)
3018 23:44:57.837842 u1DelayCellOfst[4]=6 cells (5 PI)
3019 23:44:57.841362 u1DelayCellOfst[5]=7 cells (6 PI)
3020 23:44:57.844446 u1DelayCellOfst[6]=6 cells (5 PI)
3021 23:44:57.847736 u1DelayCellOfst[7]=6 cells (5 PI)
3022 23:44:57.850914 Byte0, DQ PI dly=989, DQM PI dly= 992
3023 23:44:57.854244 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3024 23:44:57.854361
3025 23:44:57.857851 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3026 23:44:57.860767
3027 23:44:57.860875 u1DelayCellOfst[8]=5 cells (4 PI)
3028 23:44:57.864025 u1DelayCellOfst[9]=2 cells (2 PI)
3029 23:44:57.867214 u1DelayCellOfst[10]=7 cells (6 PI)
3030 23:44:57.870879 u1DelayCellOfst[11]=9 cells (7 PI)
3031 23:44:57.873987 u1DelayCellOfst[12]=7 cells (6 PI)
3032 23:44:57.877162 u1DelayCellOfst[13]=9 cells (7 PI)
3033 23:44:57.880494 u1DelayCellOfst[14]=7 cells (6 PI)
3034 23:44:57.884025 u1DelayCellOfst[15]=0 cells (0 PI)
3035 23:44:57.887051 Byte1, DQ PI dly=981, DQM PI dly= 984
3036 23:44:57.890171 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3037 23:44:57.890288
3038 23:44:57.897147 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3039 23:44:57.897275
3040 23:44:57.897378 Write Rank0 MR14 =0x1e
3041 23:44:57.900372
3042 23:44:57.900467 Final TX Range 0 Vref 30
3043 23:44:57.900539
3044 23:44:57.906760 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3045 23:44:57.906850
3046 23:44:57.913444 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3047 23:44:57.919626 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3048 23:44:57.929389 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3049 23:44:57.929514 Write Rank0 MR3 =0xb0
3050 23:44:57.933007 DramC Write-DBI on
3051 23:44:57.933116 ==
3052 23:44:57.936171 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3053 23:44:57.939489 fsp= 1, odt_onoff= 1, Byte mode= 0
3054 23:44:57.939581 ==
3055 23:44:57.946030 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3056 23:44:57.946123
3057 23:44:57.946207 Begin, DQ Scan Range 704~768
3058 23:44:57.949281
3059 23:44:57.949398
3060 23:44:57.949489 TX Vref Scan disable
3061 23:44:57.952481 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3062 23:44:57.955609 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3063 23:44:57.959067 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3064 23:44:57.962429 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3065 23:44:57.965778 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3066 23:44:57.969129 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3067 23:44:57.975537 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3068 23:44:57.978819 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3069 23:44:57.981903 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3070 23:44:57.985069 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3071 23:44:57.988680 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3072 23:44:57.991611 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3073 23:44:57.995081 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3074 23:44:57.998246 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3075 23:44:58.001439 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3076 23:44:58.005151 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3077 23:44:58.008207 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3078 23:44:58.011386 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3079 23:44:58.014822 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3080 23:44:58.018180 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3081 23:44:58.024653 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3082 23:44:58.027716 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3083 23:44:58.034348 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3084 23:44:58.037838 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3085 23:44:58.040937 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3086 23:44:58.044012 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3087 23:44:58.047457 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3088 23:44:58.050624 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3089 23:44:58.054184 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3090 23:44:58.057311 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3091 23:44:58.060537 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3092 23:44:58.063834 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3093 23:44:58.066884 Byte0, DQ PI dly=738, DQM PI dly= 738
3094 23:44:58.073833 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
3095 23:44:58.073919
3096 23:44:58.077013 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
3097 23:44:58.077119
3098 23:44:58.080056 Byte1, DQ PI dly=729, DQM PI dly= 729
3099 23:44:58.083442 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3100 23:44:58.083522
3101 23:44:58.089837 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3102 23:44:58.089922
3103 23:44:58.096337 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3104 23:44:58.103157 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3105 23:44:58.109499 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3106 23:44:58.112743 Write Rank0 MR3 =0x30
3107 23:44:58.112821 DramC Write-DBI off
3108 23:44:58.112894
3109 23:44:58.116261 [DATLAT]
3110 23:44:58.119510 Freq=1600, CH1 RK0, use_rxtx_scan=0
3111 23:44:58.119590
3112 23:44:58.119664 DATLAT Default: 0xf
3113 23:44:58.122927 7, 0xFFFF, sum=0
3114 23:44:58.123005 8, 0xFFFF, sum=0
3115 23:44:58.125934 9, 0xFFFF, sum=0
3116 23:44:58.126011 10, 0xFFFF, sum=0
3117 23:44:58.129136 11, 0xFFFF, sum=0
3118 23:44:58.129253 12, 0xFFFF, sum=0
3119 23:44:58.132714 13, 0xFFFF, sum=0
3120 23:44:58.132795 14, 0x0, sum=1
3121 23:44:58.132864 15, 0x0, sum=2
3122 23:44:58.135754 16, 0x0, sum=3
3123 23:44:58.135841 17, 0x0, sum=4
3124 23:44:58.142191 pattern=2 first_step=14 total pass=5 best_step=16
3125 23:44:58.142274 ==
3126 23:44:58.145500 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3127 23:44:58.148937 fsp= 1, odt_onoff= 1, Byte mode= 0
3128 23:44:58.149048 ==
3129 23:44:58.155492 Start DQ dly to find pass range UseTestEngine =1
3130 23:44:58.158635 x-axis: bit #, y-axis: DQ dly (-127~63)
3131 23:44:58.158723 RX Vref Scan = 1
3132 23:44:58.266437
3133 23:44:58.266580 RX Vref found, early break!
3134 23:44:58.266654
3135 23:44:58.272984 Final RX Vref 11, apply to both rank0 and 1
3136 23:44:58.273108 ==
3137 23:44:58.276350 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3138 23:44:58.279717 fsp= 1, odt_onoff= 1, Byte mode= 0
3139 23:44:58.279832 ==
3140 23:44:58.282711 DQS Delay:
3141 23:44:58.282798 DQS0 = 0, DQS1 = 0
3142 23:44:58.282869 DQM Delay:
3143 23:44:58.285912 DQM0 = 20, DQM1 = 18
3144 23:44:58.285993 DQ Delay:
3145 23:44:58.289481 DQ0 =21, DQ1 =21, DQ2 =17, DQ3 =16
3146 23:44:58.292620 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =20
3147 23:44:58.296168 DQ8 =17, DQ9 =15, DQ10 =19, DQ11 =20
3148 23:44:58.298964 DQ12 =20, DQ13 =21, DQ14 =21, DQ15 =12
3149 23:44:58.299056
3150 23:44:58.299125
3151 23:44:58.299197
3152 23:44:58.302561 [DramC_TX_OE_Calibration] TA2
3153 23:44:58.305584 Original DQ_B0 (3 6) =30, OEN = 27
3154 23:44:58.308966 Original DQ_B1 (3 6) =30, OEN = 27
3155 23:44:58.312315 23, 0x0, End_B0=23 End_B1=23
3156 23:44:58.315611 24, 0x0, End_B0=24 End_B1=24
3157 23:44:58.315697 25, 0x0, End_B0=25 End_B1=25
3158 23:44:58.318804 26, 0x0, End_B0=26 End_B1=26
3159 23:44:58.321982 27, 0x0, End_B0=27 End_B1=27
3160 23:44:58.325182 28, 0x0, End_B0=28 End_B1=28
3161 23:44:58.328870 29, 0x0, End_B0=29 End_B1=29
3162 23:44:58.329000 30, 0x0, End_B0=30 End_B1=30
3163 23:44:58.332014 31, 0xFFFF, End_B0=30 End_B1=30
3164 23:44:58.338516 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3165 23:44:58.344903 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3166 23:44:58.345031
3167 23:44:58.345141
3168 23:44:58.345244 Write Rank0 MR23 =0x3f
3169 23:44:58.348351 [DQSOSC]
3170 23:44:58.354647 [DQSOSCAuto] RK0, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3171 23:44:58.361343 CH1_RK0: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3172 23:44:58.364509 Write Rank0 MR23 =0x3f
3173 23:44:58.364627 [DQSOSC]
3174 23:44:58.370944 [DQSOSCAuto] RK0, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3175 23:44:58.374354 CH1 RK0: MR19=202, MR18=B7B7
3176 23:44:58.377415 [RankSwap] Rank num 2, (Multi 1), Rank 1
3177 23:44:58.380818 Write Rank0 MR2 =0xad
3178 23:44:58.380933 [Write Leveling]
3179 23:44:58.383903 delay byte0 byte1 byte2 byte3
3180 23:44:58.383985
3181 23:44:58.387328 10 0 0
3182 23:44:58.387416 11 0 0
3183 23:44:58.390859 12 0 0
3184 23:44:58.390942 13 0 0
3185 23:44:58.391017 14 0 0
3186 23:44:58.393964 15 0 0
3187 23:44:58.394090 16 0 0
3188 23:44:58.397211 17 0 0
3189 23:44:58.397326 18 0 0
3190 23:44:58.400633 19 0 0
3191 23:44:58.400749 20 0 0
3192 23:44:58.400861 21 0 0
3193 23:44:58.403664 22 0 0
3194 23:44:58.403753 23 0 0
3195 23:44:58.407228 24 0 0
3196 23:44:58.407314 25 0 0
3197 23:44:58.407400 26 0 0
3198 23:44:58.410361 27 0 0
3199 23:44:58.410444 28 0 0
3200 23:44:58.413504 29 0 ff
3201 23:44:58.413614 30 0 0
3202 23:44:58.416679 31 0 ff
3203 23:44:58.416787 32 0 ff
3204 23:44:58.420288 33 0 ff
3205 23:44:58.420373 34 0 ff
3206 23:44:58.420441 35 0 ff
3207 23:44:58.423420 36 ff ff
3208 23:44:58.423541 37 ff ff
3209 23:44:58.426693 38 ff ff
3210 23:44:58.426784 39 ff ff
3211 23:44:58.430063 40 ff ff
3212 23:44:58.430157 41 ff ff
3213 23:44:58.433102 42 ff ff
3214 23:44:58.436393 pass bytecount = 0xff (0xff: all bytes pass)
3215 23:44:58.436516
3216 23:44:58.436632 DQS0 dly: 36
3217 23:44:58.439772 DQS1 dly: 31
3218 23:44:58.439887 Write Rank0 MR2 =0x2d
3219 23:44:58.442868 [RankSwap] Rank num 2, (Multi 1), Rank 0
3220 23:44:58.446379 Write Rank1 MR1 =0xd6
3221 23:44:58.446475 [Gating]
3222 23:44:58.446555 ==
3223 23:44:58.452986 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3224 23:44:58.455988 fsp= 1, odt_onoff= 1, Byte mode= 0
3225 23:44:58.456072 ==
3226 23:44:58.459474 3 1 0 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3227 23:44:58.466101 3 1 4 |2c2b 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
3228 23:44:58.469089 3 1 8 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3229 23:44:58.472583 3 1 12 |2c2b 3736 |(11 11)(11 11) |(0 0)(1 1)| 0
3230 23:44:58.478835 3 1 16 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3231 23:44:58.482141 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 0)| 0
3232 23:44:58.485407 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3233 23:44:58.491994 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3234 23:44:58.495412 [Byte 1] Lead/lag falling Transition (3, 1, 28)
3235 23:44:58.498580 3 2 0 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
3236 23:44:58.504993 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3237 23:44:58.508352 3 2 8 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3238 23:44:58.511747 3 2 12 |2c2b 303 |(11 11)(1 1) |(1 0)(1 1)| 0
3239 23:44:58.514836 [Byte 1] Lead/lag falling Transition (3, 2, 12)
3240 23:44:58.521322 3 2 16 |2c2c 3434 |(11 0)(0 0) |(0 0)(0 1)| 0
3241 23:44:58.524575 3 2 20 |201 3433 |(11 11)(11 11) |(0 0)(0 1)| 0
3242 23:44:58.528164 3 2 24 |3534 3434 |(11 11)(0 11) |(0 0)(1 1)| 0
3243 23:44:58.534443 3 2 28 |3534 3d3d |(11 11)(10 10) |(0 0)(1 1)| 0
3244 23:44:58.537851 3 3 0 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3245 23:44:58.541204 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3246 23:44:58.547549 3 3 8 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3247 23:44:58.550977 3 3 12 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3248 23:44:58.554158 3 3 16 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3249 23:44:58.560826 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3250 23:44:58.564130 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3251 23:44:58.567282 3 3 24 |3534 403 |(11 11)(11 11) |(0 1)(1 1)| 0
3252 23:44:58.573829 3 3 28 |3534 2c2c |(11 11)(11 11) |(0 1)(1 1)| 0
3253 23:44:58.577055 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3254 23:44:58.580248 [Byte 1] Lead/lag falling Transition (3, 4, 0)
3255 23:44:58.587084 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3256 23:44:58.590033 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3257 23:44:58.593324 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3258 23:44:58.600029 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3259 23:44:58.603350 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3260 23:44:58.606749 3 4 24 |3d3d 808 |(11 11)(11 11) |(1 1)(1 1)| 0
3261 23:44:58.609947 3 4 28 |3d3d c0c |(11 11)(11 11) |(1 1)(1 1)| 0
3262 23:44:58.616388 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3263 23:44:58.619818 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3264 23:44:58.622910 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3265 23:44:58.629367 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3266 23:44:58.632686 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3267 23:44:58.636350 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3268 23:44:58.642812 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3269 23:44:58.646020 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3270 23:44:58.649013 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3271 23:44:58.655897 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3272 23:44:58.659135 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3273 23:44:58.662296 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3274 23:44:58.668784 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3275 23:44:58.672357 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3276 23:44:58.675601 [Byte 0] Lead/lag Transition tap number (3)
3277 23:44:58.678918 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3278 23:44:58.685130 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3279 23:44:58.688317 [Byte 1] Lead/lag Transition tap number (2)
3280 23:44:58.691929 3 6 24 |4646 909 |(0 0)(11 11) |(0 0)(0 0)| 0
3281 23:44:58.694949 [Byte 0]First pass (3, 6, 24)
3282 23:44:58.698570 3 6 28 |4646 2020 |(0 0)(11 11) |(0 0)(0 0)| 0
3283 23:44:58.704952 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3284 23:44:58.705072 [Byte 1]First pass (3, 7, 0)
3285 23:44:58.711518 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3286 23:44:58.714858 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3287 23:44:58.718175 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3288 23:44:58.721358 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3289 23:44:58.724580 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3290 23:44:58.731134 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3291 23:44:58.734287 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3292 23:44:58.737599 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3293 23:44:58.740941 All bytes gating window > 1UI, Early break!
3294 23:44:58.741051
3295 23:44:58.747275 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
3296 23:44:58.747387
3297 23:44:58.750880 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3298 23:44:58.750995
3299 23:44:58.751095
3300 23:44:58.751217
3301 23:44:58.753968 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3302 23:44:58.754078
3303 23:44:58.757257 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3304 23:44:58.757368
3305 23:44:58.757486
3306 23:44:58.760484 Write Rank1 MR1 =0x56
3307 23:44:58.760605
3308 23:44:58.763885 best RODT dly(2T, 0.5T) = (2, 3)
3309 23:44:58.764005
3310 23:44:58.767024 best RODT dly(2T, 0.5T) = (2, 3)
3311 23:44:58.767137 ==
3312 23:44:58.770182 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3313 23:44:58.773620 fsp= 1, odt_onoff= 1, Byte mode= 0
3314 23:44:58.776732 ==
3315 23:44:58.779948 Start DQ dly to find pass range UseTestEngine =0
3316 23:44:58.783289 x-axis: bit #, y-axis: DQ dly (-127~63)
3317 23:44:58.783419 RX Vref Scan = 0
3318 23:44:58.786937 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3319 23:44:58.790080 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3320 23:44:58.793360 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3321 23:44:58.796503 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3322 23:44:58.799681 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3323 23:44:58.803021 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3324 23:44:58.806547 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3325 23:44:58.809460 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3326 23:44:58.809549 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3327 23:44:58.812773 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3328 23:44:58.816178 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3329 23:44:58.819518 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3330 23:44:58.822723 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3331 23:44:58.826029 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3332 23:44:58.829322 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3333 23:44:58.832552 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3334 23:44:58.835782 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3335 23:44:58.835909 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3336 23:44:58.838854 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3337 23:44:58.842198 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3338 23:44:58.845409 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3339 23:44:58.848975 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3340 23:44:58.852223 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3341 23:44:58.855385 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3342 23:44:58.858899 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3343 23:44:58.859018 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3344 23:44:58.861860 0, [0] xxxoxxxx ooxxxxxo [MSB]
3345 23:44:58.865339 1, [0] xxxoxxxx ooxxxxxo [MSB]
3346 23:44:58.868317 2, [0] xxooxxxx ooxxoxxo [MSB]
3347 23:44:58.871604 3, [0] xxooxxxo oooxoxxo [MSB]
3348 23:44:58.875175 4, [0] oooooxxo oooooooo [MSB]
3349 23:44:58.875293 5, [0] oooooxoo oooooooo [MSB]
3350 23:44:58.878476 32, [0] oooooooo ooooooox [MSB]
3351 23:44:58.881677 33, [0] oooooooo ooooooox [MSB]
3352 23:44:58.885028 34, [0] oooooooo oxooooox [MSB]
3353 23:44:58.888388 35, [0] ooxxoooo oxooooox [MSB]
3354 23:44:58.891338 36, [0] ooxxoooo xxooooox [MSB]
3355 23:44:58.894651 37, [0] ooxxoooo xxooooox [MSB]
3356 23:44:58.898241 38, [0] ooxxoooo xxooooox [MSB]
3357 23:44:58.898367 39, [0] oxxxooox xxooooox [MSB]
3358 23:44:58.901554 40, [0] oxxxooox xxxxooox [MSB]
3359 23:44:58.904520 41, [0] xxxxxoxx xxxxxoox [MSB]
3360 23:44:58.908048 42, [0] xxxxxoxx xxxxxxxx [MSB]
3361 23:44:58.911206 43, [0] xxxxxxxx xxxxxxxx [MSB]
3362 23:44:58.914424 iDelay=43, Bit 0, Center 22 (4 ~ 40) 37
3363 23:44:58.917673 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
3364 23:44:58.921228 iDelay=43, Bit 2, Center 18 (2 ~ 34) 33
3365 23:44:58.924400 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
3366 23:44:58.927581 iDelay=43, Bit 4, Center 22 (4 ~ 40) 37
3367 23:44:58.930868 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
3368 23:44:58.933985 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3369 23:44:58.940427 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3370 23:44:58.943962 iDelay=43, Bit 8, Center 17 (0 ~ 35) 36
3371 23:44:58.947300 iDelay=43, Bit 9, Center 15 (-2 ~ 33) 36
3372 23:44:58.950339 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3373 23:44:58.953856 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3374 23:44:58.956941 iDelay=43, Bit 12, Center 21 (2 ~ 40) 39
3375 23:44:58.960397 iDelay=43, Bit 13, Center 22 (4 ~ 41) 38
3376 23:44:58.963824 iDelay=43, Bit 14, Center 22 (4 ~ 41) 38
3377 23:44:58.967001 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3378 23:44:58.969995 ==
3379 23:44:58.973458 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3380 23:44:58.976604 fsp= 1, odt_onoff= 1, Byte mode= 0
3381 23:44:58.976692 ==
3382 23:44:58.976762 DQS Delay:
3383 23:44:58.979898 DQS0 = 0, DQS1 = 0
3384 23:44:58.979994 DQM Delay:
3385 23:44:58.983109 DQM0 = 20, DQM1 = 19
3386 23:44:58.983224 DQ Delay:
3387 23:44:58.986400 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3388 23:44:58.989672 DQ4 =22, DQ5 =24, DQ6 =22, DQ7 =20
3389 23:44:58.992974 DQ8 =17, DQ9 =15, DQ10 =21, DQ11 =21
3390 23:44:58.996452 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
3391 23:44:58.996568
3392 23:44:58.996654
3393 23:44:58.999455 DramC Write-DBI off
3394 23:44:58.999563 ==
3395 23:44:59.002702 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3396 23:44:59.006218 fsp= 1, odt_onoff= 1, Byte mode= 0
3397 23:44:59.006314 ==
3398 23:44:59.012434 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3399 23:44:59.012546
3400 23:44:59.015701 Begin, DQ Scan Range 927~1183
3401 23:44:59.015780
3402 23:44:59.015852
3403 23:44:59.015914 TX Vref Scan disable
3404 23:44:59.019258 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3405 23:44:59.022507 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3406 23:44:59.025848 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3407 23:44:59.032248 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3408 23:44:59.035372 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3409 23:44:59.038901 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3410 23:44:59.042082 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3411 23:44:59.045375 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3412 23:44:59.048623 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3413 23:44:59.052097 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3414 23:44:59.055038 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3415 23:44:59.058463 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3416 23:44:59.062074 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3417 23:44:59.064873 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3418 23:44:59.068130 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3419 23:44:59.074888 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3420 23:44:59.078207 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3421 23:44:59.081229 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3422 23:44:59.084563 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3423 23:44:59.088006 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3424 23:44:59.091243 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3425 23:44:59.094412 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3426 23:44:59.097631 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3427 23:44:59.100945 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3428 23:44:59.104124 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3429 23:44:59.107852 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3430 23:44:59.111051 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3431 23:44:59.114025 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3432 23:44:59.120783 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3433 23:44:59.124140 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3434 23:44:59.127282 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3435 23:44:59.130466 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3436 23:44:59.133682 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3437 23:44:59.136910 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3438 23:44:59.140253 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3439 23:44:59.143839 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3440 23:44:59.146667 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3441 23:44:59.150266 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3442 23:44:59.153530 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3443 23:44:59.156824 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3444 23:44:59.160005 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3445 23:44:59.163239 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3446 23:44:59.166703 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3447 23:44:59.169671 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3448 23:44:59.176348 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3449 23:44:59.179579 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3450 23:44:59.182795 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3451 23:44:59.186026 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3452 23:44:59.189374 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
3453 23:44:59.192836 976 |3 6 16|[0] xxxxxxxx xxxxxxxo [MSB]
3454 23:44:59.196104 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3455 23:44:59.199303 978 |3 6 18|[0] xxxxxxxx oooxxxoo [MSB]
3456 23:44:59.202691 979 |3 6 19|[0] xxxxxxxx ooooxxoo [MSB]
3457 23:44:59.205869 980 |3 6 20|[0] xxxxxxxx oooooxoo [MSB]
3458 23:44:59.208956 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3459 23:44:59.212351 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3460 23:44:59.215621 983 |3 6 23|[0] xoooxxxx oooooooo [MSB]
3461 23:44:59.223742 993 |3 6 33|[0] oooooooo ooooooox [MSB]
3462 23:44:59.226798 994 |3 6 34|[0] oooooooo oxooooox [MSB]
3463 23:44:59.230075 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3464 23:44:59.233182 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3465 23:44:59.236688 997 |3 6 37|[0] oooooooo xxooooox [MSB]
3466 23:44:59.239744 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3467 23:44:59.243053 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3468 23:44:59.246339 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3469 23:44:59.249666 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3470 23:44:59.252871 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3471 23:44:59.259622 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
3472 23:44:59.262830 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
3473 23:44:59.266008 1005 |3 6 45|[0] ooxxooox xxxxxxxx [MSB]
3474 23:44:59.269186 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3475 23:44:59.272439 Byte0, DQ PI dly=992, DQM PI dly= 992
3476 23:44:59.275983 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3477 23:44:59.276076
3478 23:44:59.282464 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3479 23:44:59.282558
3480 23:44:59.285554 Byte1, DQ PI dly=986, DQM PI dly= 986
3481 23:44:59.288992 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3482 23:44:59.289084
3483 23:44:59.292147 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3484 23:44:59.292239
3485 23:44:59.292311 ==
3486 23:44:59.298884 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3487 23:44:59.302079 fsp= 1, odt_onoff= 1, Byte mode= 0
3488 23:44:59.302171 ==
3489 23:44:59.305194 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3490 23:44:59.305285
3491 23:44:59.308695 Begin, DQ Scan Range 962~1026
3492 23:44:59.311845 Write Rank1 MR14 =0x0
3493 23:44:59.319584
3494 23:44:59.319677 CH=1, VrefRange= 0, VrefLevel = 0
3495 23:44:59.325942 TX Bit0 (986~1002) 17 994, Bit8 (981~991) 11 986,
3496 23:44:59.329231 TX Bit1 (985~999) 15 992, Bit9 (979~990) 12 984,
3497 23:44:59.335828 TX Bit2 (984~998) 15 991, Bit10 (981~994) 14 987,
3498 23:44:59.338813 TX Bit3 (981~994) 14 987, Bit11 (984~994) 11 989,
3499 23:44:59.342329 TX Bit4 (985~1000) 16 992, Bit12 (984~992) 9 988,
3500 23:44:59.348708 TX Bit5 (985~1001) 17 993, Bit13 (984~996) 13 990,
3501 23:44:59.352077 TX Bit6 (985~1000) 16 992, Bit14 (982~993) 12 987,
3502 23:44:59.358419 TX Bit7 (985~998) 14 991, Bit15 (977~986) 10 981,
3503 23:44:59.358511
3504 23:44:59.358594 Write Rank1 MR14 =0x2
3505 23:44:59.368065
3506 23:44:59.371400 CH=1, VrefRange= 0, VrefLevel = 2
3507 23:44:59.374695 TX Bit0 (986~1003) 18 994, Bit8 (980~991) 12 985,
3508 23:44:59.377956 TX Bit1 (985~1000) 16 992, Bit9 (978~991) 14 984,
3509 23:44:59.384298 TX Bit2 (984~998) 15 991, Bit10 (981~995) 15 988,
3510 23:44:59.387768 TX Bit3 (981~995) 15 988, Bit11 (983~995) 13 989,
3511 23:44:59.394102 TX Bit4 (985~1000) 16 992, Bit12 (984~993) 10 988,
3512 23:44:59.397248 TX Bit5 (986~1002) 17 994, Bit13 (983~996) 14 989,
3513 23:44:59.400625 TX Bit6 (986~1000) 15 993, Bit14 (982~994) 13 988,
3514 23:44:59.407279 TX Bit7 (985~998) 14 991, Bit15 (977~987) 11 982,
3515 23:44:59.407405
3516 23:44:59.407540 Write Rank1 MR14 =0x4
3517 23:44:59.417089
3518 23:44:59.417216 CH=1, VrefRange= 0, VrefLevel = 4
3519 23:44:59.423667 TX Bit0 (985~1004) 20 994, Bit8 (980~991) 12 985,
3520 23:44:59.427059 TX Bit1 (985~1001) 17 993, Bit9 (978~991) 14 984,
3521 23:44:59.433456 TX Bit2 (983~999) 17 991, Bit10 (980~996) 17 988,
3522 23:44:59.436585 TX Bit3 (980~996) 17 988, Bit11 (982~996) 15 989,
3523 23:44:59.439852 TX Bit4 (984~1002) 19 993, Bit12 (983~994) 12 988,
3524 23:44:59.446621 TX Bit5 (985~1003) 19 994, Bit13 (983~998) 16 990,
3525 23:44:59.449918 TX Bit6 (985~1001) 17 993, Bit14 (981~994) 14 987,
3526 23:44:59.456387 TX Bit7 (985~1000) 16 992, Bit15 (976~989) 14 982,
3527 23:44:59.456510
3528 23:44:59.456613 Write Rank1 MR14 =0x6
3529 23:44:59.466518
3530 23:44:59.466636 CH=1, VrefRange= 0, VrefLevel = 6
3531 23:44:59.472984 TX Bit0 (985~1005) 21 995, Bit8 (979~992) 14 985,
3532 23:44:59.476240 TX Bit1 (984~1001) 18 992, Bit9 (978~991) 14 984,
3533 23:44:59.482997 TX Bit2 (983~1000) 18 991, Bit10 (980~997) 18 988,
3534 23:44:59.486343 TX Bit3 (980~997) 18 988, Bit11 (982~997) 16 989,
3535 23:44:59.492539 TX Bit4 (984~1002) 19 993, Bit12 (983~995) 13 989,
3536 23:44:59.495688 TX Bit5 (985~1004) 20 994, Bit13 (983~998) 16 990,
3537 23:44:59.499186 TX Bit6 (985~1002) 18 993, Bit14 (981~995) 15 988,
3538 23:44:59.505766 TX Bit7 (985~1000) 16 992, Bit15 (976~990) 15 983,
3539 23:44:59.505890
3540 23:44:59.505995 Write Rank1 MR14 =0x8
3541 23:44:59.515629
3542 23:44:59.515753 CH=1, VrefRange= 0, VrefLevel = 8
3543 23:44:59.522355 TX Bit0 (985~1005) 21 995, Bit8 (979~992) 14 985,
3544 23:44:59.525490 TX Bit1 (985~1002) 18 993, Bit9 (978~992) 15 985,
3545 23:44:59.532027 TX Bit2 (983~1000) 18 991, Bit10 (979~998) 20 988,
3546 23:44:59.535262 TX Bit3 (980~997) 18 988, Bit11 (981~998) 18 989,
3547 23:44:59.541840 TX Bit4 (984~1003) 20 993, Bit12 (982~996) 15 989,
3548 23:44:59.545337 TX Bit5 (985~1004) 20 994, Bit13 (982~999) 18 990,
3549 23:44:59.548798 TX Bit6 (984~1003) 20 993, Bit14 (980~996) 17 988,
3550 23:44:59.554870 TX Bit7 (984~1001) 18 992, Bit15 (976~991) 16 983,
3551 23:44:59.555019
3552 23:44:59.555130 Write Rank1 MR14 =0xa
3553 23:44:59.565054
3554 23:44:59.568530 CH=1, VrefRange= 0, VrefLevel = 10
3555 23:44:59.571784 TX Bit0 (985~1005) 21 995, Bit8 (978~992) 15 985,
3556 23:44:59.575026 TX Bit1 (985~1003) 19 994, Bit9 (977~992) 16 984,
3557 23:44:59.581668 TX Bit2 (982~1000) 19 991, Bit10 (978~998) 21 988,
3558 23:44:59.584968 TX Bit3 (979~998) 20 988, Bit11 (981~999) 19 990,
3559 23:44:59.591637 TX Bit4 (984~1004) 21 994, Bit12 (982~997) 16 989,
3560 23:44:59.594569 TX Bit5 (985~1005) 21 995, Bit13 (982~999) 18 990,
3561 23:44:59.597799 TX Bit6 (984~1004) 21 994, Bit14 (979~997) 19 988,
3562 23:44:59.604342 TX Bit7 (984~1002) 19 993, Bit15 (976~991) 16 983,
3563 23:44:59.604466
3564 23:44:59.604577 Write Rank1 MR14 =0xc
3565 23:44:59.614847
3566 23:44:59.618026 CH=1, VrefRange= 0, VrefLevel = 12
3567 23:44:59.621193 TX Bit0 (985~1005) 21 995, Bit8 (978~993) 16 985,
3568 23:44:59.624646 TX Bit1 (984~1004) 21 994, Bit9 (977~993) 17 985,
3569 23:44:59.631190 TX Bit2 (982~1001) 20 991, Bit10 (978~999) 22 988,
3570 23:44:59.634335 TX Bit3 (979~998) 20 988, Bit11 (980~999) 20 989,
3571 23:44:59.640839 TX Bit4 (984~1005) 22 994, Bit12 (981~998) 18 989,
3572 23:44:59.644156 TX Bit5 (984~1005) 22 994, Bit13 (981~999) 19 990,
3573 23:44:59.647436 TX Bit6 (984~1005) 22 994, Bit14 (979~998) 20 988,
3574 23:44:59.653813 TX Bit7 (984~1003) 20 993, Bit15 (976~991) 16 983,
3575 23:44:59.653922
3576 23:44:59.653997 Write Rank1 MR14 =0xe
3577 23:44:59.664143
3578 23:44:59.667395 CH=1, VrefRange= 0, VrefLevel = 14
3579 23:44:59.670628 TX Bit0 (984~1006) 23 995, Bit8 (978~994) 17 986,
3580 23:44:59.674147 TX Bit1 (984~1005) 22 994, Bit9 (977~993) 17 985,
3581 23:44:59.680497 TX Bit2 (982~1002) 21 992, Bit10 (978~999) 22 988,
3582 23:44:59.683814 TX Bit3 (978~998) 21 988, Bit11 (980~999) 20 989,
3583 23:44:59.690285 TX Bit4 (983~1005) 23 994, Bit12 (980~998) 19 989,
3584 23:44:59.693538 TX Bit5 (984~1005) 22 994, Bit13 (981~999) 19 990,
3585 23:44:59.697014 TX Bit6 (984~1005) 22 994, Bit14 (979~998) 20 988,
3586 23:44:59.703669 TX Bit7 (984~1003) 20 993, Bit15 (974~992) 19 983,
3587 23:44:59.703796
3588 23:44:59.706875 Write Rank1 MR14 =0x10
3589 23:44:59.713952
3590 23:44:59.717417 CH=1, VrefRange= 0, VrefLevel = 16
3591 23:44:59.720533 TX Bit0 (984~1006) 23 995, Bit8 (978~995) 18 986,
3592 23:44:59.723730 TX Bit1 (984~1005) 22 994, Bit9 (976~993) 18 984,
3593 23:44:59.730628 TX Bit2 (982~1003) 22 992, Bit10 (978~1000) 23 989,
3594 23:44:59.733566 TX Bit3 (978~999) 22 988, Bit11 (979~1000) 22 989,
3595 23:44:59.740153 TX Bit4 (983~1005) 23 994, Bit12 (980~998) 19 989,
3596 23:44:59.743375 TX Bit5 (984~1006) 23 995, Bit13 (980~999) 20 989,
3597 23:44:59.746775 TX Bit6 (984~1005) 22 994, Bit14 (978~999) 22 988,
3598 23:44:59.753453 TX Bit7 (984~1004) 21 994, Bit15 (974~992) 19 983,
3599 23:44:59.753552
3600 23:44:59.756525 Write Rank1 MR14 =0x12
3601 23:44:59.763977
3602 23:44:59.767050 CH=1, VrefRange= 0, VrefLevel = 18
3603 23:44:59.770564 TX Bit0 (984~1006) 23 995, Bit8 (977~996) 20 986,
3604 23:44:59.773755 TX Bit1 (983~1005) 23 994, Bit9 (977~994) 18 985,
3605 23:44:59.780090 TX Bit2 (981~1004) 24 992, Bit10 (977~1000) 24 988,
3606 23:44:59.783495 TX Bit3 (978~999) 22 988, Bit11 (979~1000) 22 989,
3607 23:44:59.789992 TX Bit4 (983~1005) 23 994, Bit12 (980~999) 20 989,
3608 23:44:59.793193 TX Bit5 (984~1006) 23 995, Bit13 (980~1000) 21 990,
3609 23:44:59.796782 TX Bit6 (983~1005) 23 994, Bit14 (978~999) 22 988,
3610 23:44:59.802975 TX Bit7 (983~1005) 23 994, Bit15 (975~992) 18 983,
3611 23:44:59.803068
3612 23:44:59.806264 Write Rank1 MR14 =0x14
3613 23:44:59.814081
3614 23:44:59.817258 CH=1, VrefRange= 0, VrefLevel = 20
3615 23:44:59.820794 TX Bit0 (984~1007) 24 995, Bit8 (977~996) 20 986,
3616 23:44:59.823826 TX Bit1 (983~1006) 24 994, Bit9 (976~995) 20 985,
3617 23:44:59.830406 TX Bit2 (980~1005) 26 992, Bit10 (977~1000) 24 988,
3618 23:44:59.833647 TX Bit3 (978~1000) 23 989, Bit11 (979~1000) 22 989,
3619 23:44:59.840101 TX Bit4 (982~1006) 25 994, Bit12 (979~999) 21 989,
3620 23:44:59.843576 TX Bit5 (984~1006) 23 995, Bit13 (979~1001) 23 990,
3621 23:44:59.846674 TX Bit6 (983~1006) 24 994, Bit14 (978~999) 22 988,
3622 23:44:59.853299 TX Bit7 (983~1005) 23 994, Bit15 (974~993) 20 983,
3623 23:44:59.853444
3624 23:44:59.856762 Write Rank1 MR14 =0x16
3625 23:44:59.864402
3626 23:44:59.867726 CH=1, VrefRange= 0, VrefLevel = 22
3627 23:44:59.870940 TX Bit0 (984~1007) 24 995, Bit8 (977~997) 21 987,
3628 23:44:59.874039 TX Bit1 (983~1006) 24 994, Bit9 (976~995) 20 985,
3629 23:44:59.880757 TX Bit2 (980~1004) 25 992, Bit10 (977~1000) 24 988,
3630 23:44:59.883891 TX Bit3 (978~1000) 23 989, Bit11 (978~1000) 23 989,
3631 23:44:59.890413 TX Bit4 (982~1006) 25 994, Bit12 (979~999) 21 989,
3632 23:44:59.893890 TX Bit5 (984~1006) 23 995, Bit13 (980~1001) 22 990,
3633 23:44:59.900171 TX Bit6 (983~1006) 24 994, Bit14 (977~1000) 24 988,
3634 23:44:59.903663 TX Bit7 (983~1005) 23 994, Bit15 (974~994) 21 984,
3635 23:44:59.903754
3636 23:44:59.906751 Write Rank1 MR14 =0x18
3637 23:44:59.914474
3638 23:44:59.918105 CH=1, VrefRange= 0, VrefLevel = 24
3639 23:44:59.921246 TX Bit0 (984~1007) 24 995, Bit8 (977~997) 21 987,
3640 23:44:59.924323 TX Bit1 (982~1006) 25 994, Bit9 (976~997) 22 986,
3641 23:44:59.930930 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3642 23:44:59.934479 TX Bit3 (977~1001) 25 989, Bit11 (978~1001) 24 989,
3643 23:44:59.940644 TX Bit4 (982~1006) 25 994, Bit12 (978~1000) 23 989,
3644 23:44:59.944208 TX Bit5 (983~1006) 24 994, Bit13 (979~1001) 23 990,
3645 23:44:59.950521 TX Bit6 (982~1006) 25 994, Bit14 (977~1000) 24 988,
3646 23:44:59.953711 TX Bit7 (983~1006) 24 994, Bit15 (974~994) 21 984,
3647 23:44:59.953808
3648 23:44:59.956867 Write Rank1 MR14 =0x1a
3649 23:44:59.965142
3650 23:44:59.968141 CH=1, VrefRange= 0, VrefLevel = 26
3651 23:44:59.971672 TX Bit0 (983~1007) 25 995, Bit8 (977~998) 22 987,
3652 23:44:59.974825 TX Bit1 (982~1006) 25 994, Bit9 (975~997) 23 986,
3653 23:44:59.981454 TX Bit2 (980~1005) 26 992, Bit10 (977~1001) 25 989,
3654 23:44:59.984551 TX Bit3 (977~1002) 26 989, Bit11 (977~1001) 25 989,
3655 23:44:59.991357 TX Bit4 (982~1006) 25 994, Bit12 (978~1000) 23 989,
3656 23:44:59.994423 TX Bit5 (983~1007) 25 995, Bit13 (978~1001) 24 989,
3657 23:45:00.001212 TX Bit6 (982~1006) 25 994, Bit14 (977~1000) 24 988,
3658 23:45:00.004270 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3659 23:45:00.004388
3660 23:45:00.007440 Write Rank1 MR14 =0x1c
3661 23:45:00.015303
3662 23:45:00.018580 CH=1, VrefRange= 0, VrefLevel = 28
3663 23:45:00.021987 TX Bit0 (983~1007) 25 995, Bit8 (976~998) 23 987,
3664 23:45:00.025151 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3665 23:45:00.031889 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3666 23:45:00.034932 TX Bit3 (977~1002) 26 989, Bit11 (978~1001) 24 989,
3667 23:45:00.041629 TX Bit4 (981~1006) 26 993, Bit12 (978~1001) 24 989,
3668 23:45:00.044793 TX Bit5 (983~1007) 25 995, Bit13 (978~1002) 25 990,
3669 23:45:00.051430 TX Bit6 (982~1006) 25 994, Bit14 (978~1000) 23 989,
3670 23:45:00.054644 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3671 23:45:00.054727
3672 23:45:00.057825 Write Rank1 MR14 =0x1e
3673 23:45:00.066061
3674 23:45:00.069189 CH=1, VrefRange= 0, VrefLevel = 30
3675 23:45:00.072471 TX Bit0 (983~1007) 25 995, Bit8 (976~998) 23 987,
3676 23:45:00.076057 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3677 23:45:00.082269 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3678 23:45:00.085531 TX Bit3 (977~1002) 26 989, Bit11 (978~1001) 24 989,
3679 23:45:00.092097 TX Bit4 (981~1006) 26 993, Bit12 (978~1001) 24 989,
3680 23:45:00.095340 TX Bit5 (983~1007) 25 995, Bit13 (978~1002) 25 990,
3681 23:45:00.101962 TX Bit6 (982~1006) 25 994, Bit14 (978~1000) 23 989,
3682 23:45:00.105168 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3683 23:45:00.105252
3684 23:45:00.108268 Write Rank1 MR14 =0x20
3685 23:45:00.116496
3686 23:45:00.119605 CH=1, VrefRange= 0, VrefLevel = 32
3687 23:45:00.122937 TX Bit0 (983~1007) 25 995, Bit8 (976~998) 23 987,
3688 23:45:00.126046 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3689 23:45:00.132655 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3690 23:45:00.136172 TX Bit3 (977~1002) 26 989, Bit11 (978~1001) 24 989,
3691 23:45:00.142469 TX Bit4 (981~1006) 26 993, Bit12 (978~1001) 24 989,
3692 23:45:00.146028 TX Bit5 (983~1007) 25 995, Bit13 (978~1002) 25 990,
3693 23:45:00.152426 TX Bit6 (982~1006) 25 994, Bit14 (978~1000) 23 989,
3694 23:45:00.155594 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3695 23:45:00.155687
3696 23:45:00.158766 Write Rank1 MR14 =0x22
3697 23:45:00.166892
3698 23:45:00.170033 CH=1, VrefRange= 0, VrefLevel = 34
3699 23:45:00.173198 TX Bit0 (983~1007) 25 995, Bit8 (976~998) 23 987,
3700 23:45:00.176859 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3701 23:45:00.183116 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3702 23:45:00.186470 TX Bit3 (977~1002) 26 989, Bit11 (978~1001) 24 989,
3703 23:45:00.193034 TX Bit4 (981~1006) 26 993, Bit12 (978~1001) 24 989,
3704 23:45:00.196079 TX Bit5 (983~1007) 25 995, Bit13 (978~1002) 25 990,
3705 23:45:00.202799 TX Bit6 (982~1006) 25 994, Bit14 (978~1000) 23 989,
3706 23:45:00.206211 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3707 23:45:00.206303
3708 23:45:00.209506 Write Rank1 MR14 =0x24
3709 23:45:00.217289
3710 23:45:00.220442 CH=1, VrefRange= 0, VrefLevel = 36
3711 23:45:00.223627 TX Bit0 (983~1007) 25 995, Bit8 (976~998) 23 987,
3712 23:45:00.226965 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3713 23:45:00.233645 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3714 23:45:00.236789 TX Bit3 (977~1002) 26 989, Bit11 (978~1001) 24 989,
3715 23:45:00.243396 TX Bit4 (981~1006) 26 993, Bit12 (978~1001) 24 989,
3716 23:45:00.246825 TX Bit5 (983~1007) 25 995, Bit13 (978~1002) 25 990,
3717 23:45:00.253168 TX Bit6 (982~1006) 25 994, Bit14 (978~1000) 23 989,
3718 23:45:00.256455 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3719 23:45:00.256548
3720 23:45:00.259568 Write Rank1 MR14 =0x26
3721 23:45:00.267477
3722 23:45:00.271042 CH=1, VrefRange= 0, VrefLevel = 38
3723 23:45:00.274143 TX Bit0 (983~1007) 25 995, Bit8 (976~998) 23 987,
3724 23:45:00.277347 TX Bit1 (981~1006) 26 993, Bit9 (975~998) 24 986,
3725 23:45:00.283996 TX Bit2 (979~1005) 27 992, Bit10 (977~1001) 25 989,
3726 23:45:00.287107 TX Bit3 (977~1002) 26 989, Bit11 (978~1001) 24 989,
3727 23:45:00.293948 TX Bit4 (981~1006) 26 993, Bit12 (978~1001) 24 989,
3728 23:45:00.297023 TX Bit5 (983~1007) 25 995, Bit13 (978~1002) 25 990,
3729 23:45:00.303734 TX Bit6 (982~1006) 25 994, Bit14 (978~1000) 23 989,
3730 23:45:00.306953 TX Bit7 (982~1006) 25 994, Bit15 (972~995) 24 983,
3731 23:45:00.307096
3732 23:45:00.307203
3733 23:45:00.310034 TX Vref found, early break! 369< 377
3734 23:45:00.316655 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3735 23:45:00.316755 u1DelayCellOfst[0]=7 cells (6 PI)
3736 23:45:00.320055 u1DelayCellOfst[1]=5 cells (4 PI)
3737 23:45:00.323084 u1DelayCellOfst[2]=3 cells (3 PI)
3738 23:45:00.326447 u1DelayCellOfst[3]=0 cells (0 PI)
3739 23:45:00.329736 u1DelayCellOfst[4]=5 cells (4 PI)
3740 23:45:00.333024 u1DelayCellOfst[5]=7 cells (6 PI)
3741 23:45:00.336345 u1DelayCellOfst[6]=6 cells (5 PI)
3742 23:45:00.339522 u1DelayCellOfst[7]=6 cells (5 PI)
3743 23:45:00.342777 Byte0, DQ PI dly=989, DQM PI dly= 992
3744 23:45:00.346154 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3745 23:45:00.346294
3746 23:45:00.352555 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3747 23:45:00.352693
3748 23:45:00.355820 u1DelayCellOfst[8]=5 cells (4 PI)
3749 23:45:00.359266 u1DelayCellOfst[9]=3 cells (3 PI)
3750 23:45:00.359407 u1DelayCellOfst[10]=7 cells (6 PI)
3751 23:45:00.362379 u1DelayCellOfst[11]=7 cells (6 PI)
3752 23:45:00.365531 u1DelayCellOfst[12]=7 cells (6 PI)
3753 23:45:00.369001 u1DelayCellOfst[13]=9 cells (7 PI)
3754 23:45:00.372171 u1DelayCellOfst[14]=7 cells (6 PI)
3755 23:45:00.375587 u1DelayCellOfst[15]=0 cells (0 PI)
3756 23:45:00.378877 Byte1, DQ PI dly=983, DQM PI dly= 986
3757 23:45:00.385169 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3758 23:45:00.385297
3759 23:45:00.388689 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3760 23:45:00.388821
3761 23:45:00.391852 Write Rank1 MR14 =0x1c
3762 23:45:00.391972
3763 23:45:00.392090 Final TX Range 0 Vref 28
3764 23:45:00.392220
3765 23:45:00.398599 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3766 23:45:00.398721
3767 23:45:00.404796 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3768 23:45:00.414689 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3769 23:45:00.421473 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3770 23:45:00.421590 Write Rank1 MR3 =0xb0
3771 23:45:00.424642 DramC Write-DBI on
3772 23:45:00.424756 ==
3773 23:45:00.427771 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3774 23:45:00.431300 fsp= 1, odt_onoff= 1, Byte mode= 0
3775 23:45:00.431387 ==
3776 23:45:00.437475 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3777 23:45:00.437604
3778 23:45:00.440892 Begin, DQ Scan Range 706~770
3779 23:45:00.441015
3780 23:45:00.441125
3781 23:45:00.441257 TX Vref Scan disable
3782 23:45:00.443984 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3783 23:45:00.447537 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3784 23:45:00.450559 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3785 23:45:00.457183 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3786 23:45:00.460673 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3787 23:45:00.463904 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3788 23:45:00.466968 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3789 23:45:00.470583 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3790 23:45:00.473662 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3791 23:45:00.476785 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3792 23:45:00.480274 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3793 23:45:00.483493 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3794 23:45:00.486965 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3795 23:45:00.490142 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3796 23:45:00.493337 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3797 23:45:00.496542 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3798 23:45:00.499989 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3799 23:45:00.506242 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3800 23:45:00.509810 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3801 23:45:00.512814 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3802 23:45:00.519882 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3803 23:45:00.523069 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3804 23:45:00.526182 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3805 23:45:00.529672 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3806 23:45:00.533093 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3807 23:45:00.536120 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3808 23:45:00.539343 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3809 23:45:00.542842 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3810 23:45:00.545867 Byte0, DQ PI dly=738, DQM PI dly= 738
3811 23:45:00.552274 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
3812 23:45:00.552405
3813 23:45:00.555569 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
3814 23:45:00.555653
3815 23:45:00.558844 Byte1, DQ PI dly=731, DQM PI dly= 731
3816 23:45:00.562146 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3817 23:45:00.562228
3818 23:45:00.568797 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3819 23:45:00.568926
3820 23:45:00.575374 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3821 23:45:00.581780 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3822 23:45:00.588394 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3823 23:45:00.591648 Write Rank1 MR3 =0x30
3824 23:45:00.591751 DramC Write-DBI off
3825 23:45:00.591822
3826 23:45:00.591887 [DATLAT]
3827 23:45:00.594991 Freq=1600, CH1 RK1, use_rxtx_scan=0
3828 23:45:00.595085
3829 23:45:00.598215 DATLAT Default: 0x10
3830 23:45:00.601386 7, 0xFFFF, sum=0
3831 23:45:00.601489 8, 0xFFFF, sum=0
3832 23:45:00.601563 9, 0xFFFF, sum=0
3833 23:45:00.604875 10, 0xFFFF, sum=0
3834 23:45:00.604968 11, 0xFFFF, sum=0
3835 23:45:00.608094 12, 0xFFFF, sum=0
3836 23:45:00.608187 13, 0xFFFF, sum=0
3837 23:45:00.611321 14, 0x0, sum=1
3838 23:45:00.611458 15, 0x0, sum=2
3839 23:45:00.614546 16, 0x0, sum=3
3840 23:45:00.614686 17, 0x0, sum=4
3841 23:45:00.617912 pattern=2 first_step=14 total pass=5 best_step=16
3842 23:45:00.621054 ==
3843 23:45:00.624279 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3844 23:45:00.627596 fsp= 1, odt_onoff= 1, Byte mode= 0
3845 23:45:00.627729 ==
3846 23:45:00.630841 Start DQ dly to find pass range UseTestEngine =1
3847 23:45:00.637312 x-axis: bit #, y-axis: DQ dly (-127~63)
3848 23:45:00.637456 RX Vref Scan = 0
3849 23:45:00.640884 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3850 23:45:00.644077 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3851 23:45:00.647247 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3852 23:45:00.650465 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3853 23:45:00.650563 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3854 23:45:00.654066 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3855 23:45:00.657242 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3856 23:45:00.660263 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3857 23:45:00.663731 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3858 23:45:00.666809 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3859 23:45:00.670267 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3860 23:45:00.673653 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3861 23:45:00.676667 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3862 23:45:00.680146 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3863 23:45:00.680277 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3864 23:45:00.683413 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3865 23:45:00.686454 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3866 23:45:00.690029 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3867 23:45:00.693279 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3868 23:45:00.696588 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3869 23:45:00.699892 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3870 23:45:00.703112 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3871 23:45:00.703231 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3872 23:45:00.706293 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3873 23:45:00.709531 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3874 23:45:00.712736 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3875 23:45:00.716005 0, [0] xxxoxxxx ooxxxxxo [MSB]
3876 23:45:00.719483 1, [0] xxxoxxxx ooxxxxxo [MSB]
3877 23:45:00.722920 2, [0] xxxoxxxx ooxxxxxo [MSB]
3878 23:45:00.723059 3, [0] oxooxxxo ooooooxo [MSB]
3879 23:45:00.726024 4, [0] oooooxxo oooooooo [MSB]
3880 23:45:00.729159 5, [0] ooooooxo oooooooo [MSB]
3881 23:45:00.733446 32, [0] oooooooo ooooooox [MSB]
3882 23:45:00.736677 33, [0] oooooooo oxooooox [MSB]
3883 23:45:00.739890 34, [0] oooxoooo oxooooox [MSB]
3884 23:45:00.743088 35, [0] ooxxoooo oxooooox [MSB]
3885 23:45:00.746468 36, [0] ooxxoooo xxooooox [MSB]
3886 23:45:00.749792 37, [0] ooxxoooo xxooooox [MSB]
3887 23:45:00.752941 38, [0] ooxxoooo xxooxoox [MSB]
3888 23:45:00.753087 39, [0] oxxxooox xxxxxoox [MSB]
3889 23:45:00.756107 40, [0] oxxxxoox xxxxxxox [MSB]
3890 23:45:00.759324 41, [0] xxxxxxxx xxxxxxxx [MSB]
3891 23:45:00.762567 iDelay=41, Bit 0, Center 21 (3 ~ 40) 38
3892 23:45:00.766246 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3893 23:45:00.769462 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3894 23:45:00.775815 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3895 23:45:00.779102 iDelay=41, Bit 4, Center 21 (4 ~ 39) 36
3896 23:45:00.782505 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3897 23:45:00.785827 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3898 23:45:00.788979 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3899 23:45:00.792154 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3900 23:45:00.795573 iDelay=41, Bit 9, Center 15 (-2 ~ 32) 35
3901 23:45:00.798619 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3902 23:45:00.801994 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3903 23:45:00.805341 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3904 23:45:00.808413 iDelay=41, Bit 13, Center 21 (3 ~ 39) 37
3905 23:45:00.815014 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3906 23:45:00.818246 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3907 23:45:00.818386 ==
3908 23:45:00.821594 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3909 23:45:00.824812 fsp= 1, odt_onoff= 1, Byte mode= 0
3910 23:45:00.824950 ==
3911 23:45:00.828068 DQS Delay:
3912 23:45:00.828191 DQS0 = 0, DQS1 = 0
3913 23:45:00.831365 DQM Delay:
3914 23:45:00.831494 DQM0 = 20, DQM1 = 18
3915 23:45:00.831599 DQ Delay:
3916 23:45:00.834539 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =15
3917 23:45:00.838194 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3918 23:45:00.841261 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3919 23:45:00.844534 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3920 23:45:00.844626
3921 23:45:00.844703
3922 23:45:00.847902
3923 23:45:00.848022 [DramC_TX_OE_Calibration] TA2
3924 23:45:00.851179 Original DQ_B0 (3 6) =30, OEN = 27
3925 23:45:00.854353 Original DQ_B1 (3 6) =30, OEN = 27
3926 23:45:00.857625 23, 0x0, End_B0=23 End_B1=23
3927 23:45:00.860803 24, 0x0, End_B0=24 End_B1=24
3928 23:45:00.864050 25, 0x0, End_B0=25 End_B1=25
3929 23:45:00.864196 26, 0x0, End_B0=26 End_B1=26
3930 23:45:00.867265 27, 0x0, End_B0=27 End_B1=27
3931 23:45:00.870416 28, 0x0, End_B0=28 End_B1=28
3932 23:45:00.873655 29, 0x0, End_B0=29 End_B1=29
3933 23:45:00.877273 30, 0x0, End_B0=30 End_B1=30
3934 23:45:00.877408 31, 0xFFFF, End_B0=30 End_B1=30
3935 23:45:00.883458 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3936 23:45:00.889953 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3937 23:45:00.890076
3938 23:45:00.890185
3939 23:45:00.893243 Write Rank1 MR23 =0x3f
3940 23:45:00.893361 [DQSOSC]
3941 23:45:00.900074 [DQSOSCAuto] RK1, (LSB)MR18= 0xbaba, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3942 23:45:00.906416 CH1_RK1: MR19=0x202, MR18=0xBABA, DQSOSC=451, MR23=63, INC=12, DEC=18
3943 23:45:00.909791 Write Rank1 MR23 =0x3f
3944 23:45:00.909923 [DQSOSC]
3945 23:45:00.919600 [DQSOSCAuto] RK1, (LSB)MR18= 0xbaba, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3946 23:45:00.919706 CH1 RK1: MR19=202, MR18=BABA
3947 23:45:00.922731 [RxdqsGatingPostProcess] freq 1600
3948 23:45:00.929171 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3949 23:45:00.929297 Rank: 0
3950 23:45:00.932800 best DQS0 dly(2T, 0.5T) = (2, 6)
3951 23:45:00.936050 best DQS1 dly(2T, 0.5T) = (2, 6)
3952 23:45:00.939295 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3953 23:45:00.942624 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3954 23:45:00.942714 Rank: 1
3955 23:45:00.945796 best DQS0 dly(2T, 0.5T) = (2, 6)
3956 23:45:00.949057 best DQS1 dly(2T, 0.5T) = (2, 6)
3957 23:45:00.952228 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3958 23:45:00.955828 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3959 23:45:00.959129 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3960 23:45:00.962205 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3961 23:45:00.968685 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3962 23:45:00.968827
3963 23:45:00.968938
3964 23:45:00.971911 [Calibration Summary] Freqency 1600
3965 23:45:00.972039 CH 0, Rank 0
3966 23:45:00.975257 All Pass.
3967 23:45:00.975389
3968 23:45:00.975495 CH 0, Rank 1
3969 23:45:00.975610 All Pass.
3970 23:45:00.975724
3971 23:45:00.978543 CH 1, Rank 0
3972 23:45:00.978659 All Pass.
3973 23:45:00.978760
3974 23:45:00.978859 CH 1, Rank 1
3975 23:45:00.981818 All Pass.
3976 23:45:00.981930
3977 23:45:00.988482 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3978 23:45:00.995037 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3979 23:45:01.001480 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3980 23:45:01.004620 Write Rank0 MR3 =0xb0
3981 23:45:01.011262 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3982 23:45:01.017902 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3983 23:45:01.024219 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3984 23:45:01.027403 Write Rank1 MR3 =0xb0
3985 23:45:01.034248 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3986 23:45:01.040562 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3987 23:45:01.047107 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3988 23:45:01.047226 Write Rank0 MR3 =0xb0
3989 23:45:01.053860 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3990 23:45:01.063469 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3991 23:45:01.070319 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3992 23:45:01.070453 Write Rank1 MR3 =0xb0
3993 23:45:01.073658 DramC Write-DBI on
3994 23:45:01.076854 [GetDramInforAfterCalByMRR] Vendor 6.
3995 23:45:01.079925 [GetDramInforAfterCalByMRR] Revision 505.
3996 23:45:01.080020 MR8 1111
3997 23:45:01.086506 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3998 23:45:01.086648 MR8 1111
3999 23:45:01.089803 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
4000 23:45:01.092985 MR8 1111
4001 23:45:01.096216 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
4002 23:45:01.096323 MR8 1111
4003 23:45:01.103036 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
4004 23:45:01.112516 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
4005 23:45:01.112629 Write Rank0 MR13 =0xd0
4006 23:45:01.115893 Write Rank1 MR13 =0xd0
4007 23:45:01.119262 Write Rank0 MR13 =0xd0
4008 23:45:01.119356 Write Rank1 MR13 =0xd0
4009 23:45:01.122479 Save calibration result to emmc
4010 23:45:01.122586
4011 23:45:01.122661
4012 23:45:01.125826 [DramcModeReg_Check] Freq_1600, FSP_1
4013 23:45:01.129205 FSP_1, CH_0, RK0
4014 23:45:01.129301 Write Rank0 MR13 =0xd8
4015 23:45:01.132256 MR12 = 0x5c (global = 0x5c) match
4016 23:45:01.135758 MR14 = 0x1e (global = 0x1e) match
4017 23:45:01.138920 FSP_1, CH_0, RK1
4018 23:45:01.139022 Write Rank1 MR13 =0xd8
4019 23:45:01.142094 MR12 = 0x5e (global = 0x5e) match
4020 23:45:01.145553 MR14 = 0x1e (global = 0x1e) match
4021 23:45:01.148803 FSP_1, CH_1, RK0
4022 23:45:01.148903 Write Rank0 MR13 =0xd8
4023 23:45:01.151965 MR12 = 0x5e (global = 0x5e) match
4024 23:45:01.155240 MR14 = 0x1e (global = 0x1e) match
4025 23:45:01.158491 FSP_1, CH_1, RK1
4026 23:45:01.158590 Write Rank1 MR13 =0xd8
4027 23:45:01.161834 MR12 = 0x60 (global = 0x60) match
4028 23:45:01.164995 MR14 = 0x1c (global = 0x1c) match
4029 23:45:01.165119
4030 23:45:01.171693 [MEM_TEST] 02: After DFS, before run time config
4031 23:45:01.181680 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4032 23:45:01.181806
4033 23:45:01.181883 [TA2_TEST]
4034 23:45:01.181951 === TA2 HW
4035 23:45:01.184861 TA2 PAT: XTALK
4036 23:45:01.188161 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
4037 23:45:01.194729 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
4038 23:45:01.197797 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
4039 23:45:01.204259 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
4040 23:45:01.204379
4041 23:45:01.204500
4042 23:45:01.204571 Settings after calibration
4043 23:45:01.207895
4044 23:45:01.208008 [DramcRunTimeConfig]
4045 23:45:01.211092 TransferPLLToSPMControl - MODE SW PHYPLL
4046 23:45:01.214220 TX_TRACKING: ON
4047 23:45:01.214307 RX_TRACKING: ON
4048 23:45:01.217361 HW_GATING: ON
4049 23:45:01.217472 HW_GATING DBG: OFF
4050 23:45:01.217542 ddr_geometry:1
4051 23:45:01.220939 ddr_geometry:1
4052 23:45:01.221069 ddr_geometry:1
4053 23:45:01.224194 ddr_geometry:1
4054 23:45:01.224322 ddr_geometry:1
4055 23:45:01.227402 ddr_geometry:1
4056 23:45:01.227497 ddr_geometry:1
4057 23:45:01.227568 ddr_geometry:1
4058 23:45:01.230394 High Freq DUMMY_READ_FOR_TRACKING: ON
4059 23:45:01.234097 ZQCS_ENABLE_LP4: OFF
4060 23:45:01.237127 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
4061 23:45:01.240363 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
4062 23:45:01.243530 SPM_CONTROL_AFTERK: ON
4063 23:45:01.243684 IMPEDANCE_TRACKING: ON
4064 23:45:01.246955 TEMP_SENSOR: ON
4065 23:45:01.247079 PER_BANK_REFRESH: ON
4066 23:45:01.250253 HW_SAVE_FOR_SR: ON
4067 23:45:01.253720 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4068 23:45:01.256844 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
4069 23:45:01.260103 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
4070 23:45:01.260197 Read ODT Tracking: ON
4071 23:45:01.263237 =========================
4072 23:45:01.263355
4073 23:45:01.266408 [TA2_TEST]
4074 23:45:01.266528 === TA2 HW
4075 23:45:01.270066 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4076 23:45:01.276324 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4077 23:45:01.279574 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4078 23:45:01.286395 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4079 23:45:01.286484
4080 23:45:01.289541 [MEM_TEST] 03: After run time config
4081 23:45:01.299180 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4082 23:45:01.302790 [complex_mem_test] start addr:0x40024000, len:131072
4083 23:45:01.507202 1st complex R/W mem test pass
4084 23:45:01.513511 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4085 23:45:01.516745 sync preloader write leveling
4086 23:45:01.520019 sync preloader cbt_mr12
4087 23:45:01.523270 sync preloader cbt_clk_dly
4088 23:45:01.523360 sync preloader cbt_cmd_dly
4089 23:45:01.526813 sync preloader cbt_cs
4090 23:45:01.530011 sync preloader cbt_ca_perbit_delay
4091 23:45:01.533046 sync preloader clk_delay
4092 23:45:01.533142 sync preloader dqs_delay
4093 23:45:01.536334 sync preloader u1Gating2T_Save
4094 23:45:01.539830 sync preloader u1Gating05T_Save
4095 23:45:01.542939 sync preloader u1Gatingfine_tune_Save
4096 23:45:01.546291 sync preloader u1Gatingucpass_count_Save
4097 23:45:01.549850 sync preloader u1TxWindowPerbitVref_Save
4098 23:45:01.553016 sync preloader u1TxCenter_min_Save
4099 23:45:01.556278 sync preloader u1TxCenter_max_Save
4100 23:45:01.559507 sync preloader u1Txwin_center_Save
4101 23:45:01.562764 sync preloader u1Txfirst_pass_Save
4102 23:45:01.565953 sync preloader u1Txlast_pass_Save
4103 23:45:01.569268 sync preloader u1RxDatlat_Save
4104 23:45:01.572385 sync preloader u1RxWinPerbitVref_Save
4105 23:45:01.575623 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4106 23:45:01.579114 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4107 23:45:01.582471 sync preloader delay_cell_unit
4108 23:45:01.588810 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4109 23:45:01.591970 sync preloader write leveling
4110 23:45:01.595622 sync preloader cbt_mr12
4111 23:45:01.595710 sync preloader cbt_clk_dly
4112 23:45:01.598604 sync preloader cbt_cmd_dly
4113 23:45:01.602152 sync preloader cbt_cs
4114 23:45:01.605308 sync preloader cbt_ca_perbit_delay
4115 23:45:01.605399 sync preloader clk_delay
4116 23:45:01.608571 sync preloader dqs_delay
4117 23:45:01.611803 sync preloader u1Gating2T_Save
4118 23:45:01.614953 sync preloader u1Gating05T_Save
4119 23:45:01.618216 sync preloader u1Gatingfine_tune_Save
4120 23:45:01.621858 sync preloader u1Gatingucpass_count_Save
4121 23:45:01.625106 sync preloader u1TxWindowPerbitVref_Save
4122 23:45:01.628234 sync preloader u1TxCenter_min_Save
4123 23:45:01.631482 sync preloader u1TxCenter_max_Save
4124 23:45:01.634585 sync preloader u1Txwin_center_Save
4125 23:45:01.637915 sync preloader u1Txfirst_pass_Save
4126 23:45:01.641169 sync preloader u1Txlast_pass_Save
4127 23:45:01.644672 sync preloader u1RxDatlat_Save
4128 23:45:01.647643 sync preloader u1RxWinPerbitVref_Save
4129 23:45:01.650974 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4130 23:45:01.654485 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4131 23:45:01.657670 sync preloader delay_cell_unit
4132 23:45:01.664176 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4133 23:45:01.667331 sync preloader write leveling
4134 23:45:01.670915 sync preloader cbt_mr12
4135 23:45:01.671047 sync preloader cbt_clk_dly
4136 23:45:01.674024 sync preloader cbt_cmd_dly
4137 23:45:01.677411 sync preloader cbt_cs
4138 23:45:01.680820 sync preloader cbt_ca_perbit_delay
4139 23:45:01.680910 sync preloader clk_delay
4140 23:45:01.684024 sync preloader dqs_delay
4141 23:45:01.687238 sync preloader u1Gating2T_Save
4142 23:45:01.690281 sync preloader u1Gating05T_Save
4143 23:45:01.693552 sync preloader u1Gatingfine_tune_Save
4144 23:45:01.696966 sync preloader u1Gatingucpass_count_Save
4145 23:45:01.700276 sync preloader u1TxWindowPerbitVref_Save
4146 23:45:01.703586 sync preloader u1TxCenter_min_Save
4147 23:45:01.706900 sync preloader u1TxCenter_max_Save
4148 23:45:01.709886 sync preloader u1Txwin_center_Save
4149 23:45:01.713277 sync preloader u1Txfirst_pass_Save
4150 23:45:01.716352 sync preloader u1Txlast_pass_Save
4151 23:45:01.716466 sync preloader u1RxDatlat_Save
4152 23:45:01.719732 sync preloader u1RxWinPerbitVref_Save
4153 23:45:01.726462 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4154 23:45:01.729650 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4155 23:45:01.732863 sync preloader delay_cell_unit
4156 23:45:01.736424 just_for_test_dump_coreboot_params dump all params
4157 23:45:01.739628 dump source = 0x0
4158 23:45:01.739707 dump params frequency:1600
4159 23:45:01.742998 dump params rank number:2
4160 23:45:01.743106
4161 23:45:01.746182 dump params write leveling
4162 23:45:01.749262 write leveling[0][0][0] = 0x1f
4163 23:45:01.752457 write leveling[0][0][1] = 0x19
4164 23:45:01.752547 write leveling[0][1][0] = 0x1d
4165 23:45:01.755916 write leveling[0][1][1] = 0x18
4166 23:45:01.759182 write leveling[1][0][0] = 0x25
4167 23:45:01.762284 write leveling[1][0][1] = 0x1e
4168 23:45:01.765585 write leveling[1][1][0] = 0x24
4169 23:45:01.769018 write leveling[1][1][1] = 0x1f
4170 23:45:01.769110 dump params cbt_cs
4171 23:45:01.772275 cbt_cs[0][0] = 0x6
4172 23:45:01.772365 cbt_cs[0][1] = 0x6
4173 23:45:01.775496 cbt_cs[1][0] = 0xb
4174 23:45:01.775597 cbt_cs[1][1] = 0xb
4175 23:45:01.778896 dump params cbt_mr12
4176 23:45:01.778986 cbt_mr12[0][0] = 0x1c
4177 23:45:01.782184 cbt_mr12[0][1] = 0x1e
4178 23:45:01.785232 cbt_mr12[1][0] = 0x1e
4179 23:45:01.785351 cbt_mr12[1][1] = 0x20
4180 23:45:01.788681 dump params tx window
4181 23:45:01.791776 tx_center_min[0][0][0] = 982
4182 23:45:01.795006 tx_center_max[0][0][0] = 989
4183 23:45:01.795097 tx_center_min[0][0][1] = 978
4184 23:45:01.798268 tx_center_max[0][0][1] = 984
4185 23:45:01.801391 tx_center_min[0][1][0] = 983
4186 23:45:01.805107 tx_center_max[0][1][0] = 990
4187 23:45:01.808032 tx_center_min[0][1][1] = 979
4188 23:45:01.808122 tx_center_max[0][1][1] = 986
4189 23:45:01.811253 tx_center_min[1][0][0] = 989
4190 23:45:01.814606 tx_center_max[1][0][0] = 996
4191 23:45:01.817953 tx_center_min[1][0][1] = 981
4192 23:45:01.821392 tx_center_max[1][0][1] = 988
4193 23:45:01.821492 tx_center_min[1][1][0] = 989
4194 23:45:01.824468 tx_center_max[1][1][0] = 995
4195 23:45:01.827703 tx_center_min[1][1][1] = 983
4196 23:45:01.830894 tx_center_max[1][1][1] = 990
4197 23:45:01.831024 dump params tx window
4198 23:45:01.834149 tx_win_center[0][0][0] = 989
4199 23:45:01.837742 tx_first_pass[0][0][0] = 977
4200 23:45:01.841036 tx_last_pass[0][0][0] = 1001
4201 23:45:01.843978 tx_win_center[0][0][1] = 988
4202 23:45:01.844070 tx_first_pass[0][0][1] = 977
4203 23:45:01.847676 tx_last_pass[0][0][1] = 1000
4204 23:45:01.850848 tx_win_center[0][0][2] = 989
4205 23:45:01.854086 tx_first_pass[0][0][2] = 978
4206 23:45:01.857439 tx_last_pass[0][0][2] = 1001
4207 23:45:01.857531 tx_win_center[0][0][3] = 982
4208 23:45:01.860531 tx_first_pass[0][0][3] = 971
4209 23:45:01.863902 tx_last_pass[0][0][3] = 994
4210 23:45:01.867182 tx_win_center[0][0][4] = 988
4211 23:45:01.870358 tx_first_pass[0][0][4] = 976
4212 23:45:01.870484 tx_last_pass[0][0][4] = 1000
4213 23:45:01.873419 tx_win_center[0][0][5] = 985
4214 23:45:01.876810 tx_first_pass[0][0][5] = 974
4215 23:45:01.879961 tx_last_pass[0][0][5] = 997
4216 23:45:01.880046 tx_win_center[0][0][6] = 987
4217 23:45:01.883583 tx_first_pass[0][0][6] = 975
4218 23:45:01.886546 tx_last_pass[0][0][6] = 999
4219 23:45:01.889860 tx_win_center[0][0][7] = 988
4220 23:45:01.893389 tx_first_pass[0][0][7] = 976
4221 23:45:01.893506 tx_last_pass[0][0][7] = 1000
4222 23:45:01.896544 tx_win_center[0][0][8] = 978
4223 23:45:01.899820 tx_first_pass[0][0][8] = 967
4224 23:45:01.902974 tx_last_pass[0][0][8] = 990
4225 23:45:01.906664 tx_win_center[0][0][9] = 979
4226 23:45:01.906784 tx_first_pass[0][0][9] = 968
4227 23:45:01.909494 tx_last_pass[0][0][9] = 991
4228 23:45:01.913151 tx_win_center[0][0][10] = 984
4229 23:45:01.916225 tx_first_pass[0][0][10] = 972
4230 23:45:01.919470 tx_last_pass[0][0][10] = 997
4231 23:45:01.919563 tx_win_center[0][0][11] = 979
4232 23:45:01.922769 tx_first_pass[0][0][11] = 967
4233 23:45:01.926205 tx_last_pass[0][0][11] = 991
4234 23:45:01.929247 tx_win_center[0][0][12] = 980
4235 23:45:01.932701 tx_first_pass[0][0][12] = 968
4236 23:45:01.935963 tx_last_pass[0][0][12] = 992
4237 23:45:01.936048 tx_win_center[0][0][13] = 980
4238 23:45:01.939130 tx_first_pass[0][0][13] = 969
4239 23:45:01.942383 tx_last_pass[0][0][13] = 992
4240 23:45:01.945552 tx_win_center[0][0][14] = 982
4241 23:45:01.949217 tx_first_pass[0][0][14] = 969
4242 23:45:01.949347 tx_last_pass[0][0][14] = 995
4243 23:45:01.952354 tx_win_center[0][0][15] = 984
4244 23:45:01.955505 tx_first_pass[0][0][15] = 971
4245 23:45:01.958728 tx_last_pass[0][0][15] = 997
4246 23:45:01.962235 tx_win_center[0][1][0] = 990
4247 23:45:01.962321 tx_first_pass[0][1][0] = 978
4248 23:45:01.965435 tx_last_pass[0][1][0] = 1002
4249 23:45:01.968872 tx_win_center[0][1][1] = 989
4250 23:45:01.971916 tx_first_pass[0][1][1] = 978
4251 23:45:01.975279 tx_last_pass[0][1][1] = 1001
4252 23:45:01.975406 tx_win_center[0][1][2] = 989
4253 23:45:01.978784 tx_first_pass[0][1][2] = 978
4254 23:45:01.981652 tx_last_pass[0][1][2] = 1001
4255 23:45:01.985140 tx_win_center[0][1][3] = 983
4256 23:45:01.988212 tx_first_pass[0][1][3] = 971
4257 23:45:01.988328 tx_last_pass[0][1][3] = 995
4258 23:45:01.991357 tx_win_center[0][1][4] = 988
4259 23:45:01.994681 tx_first_pass[0][1][4] = 977
4260 23:45:01.997899 tx_last_pass[0][1][4] = 1000
4261 23:45:02.001469 tx_win_center[0][1][5] = 986
4262 23:45:02.001608 tx_first_pass[0][1][5] = 974
4263 23:45:02.004398 tx_last_pass[0][1][5] = 998
4264 23:45:02.007767 tx_win_center[0][1][6] = 987
4265 23:45:02.011180 tx_first_pass[0][1][6] = 976
4266 23:45:02.014288 tx_last_pass[0][1][6] = 999
4267 23:45:02.014381 tx_win_center[0][1][7] = 989
4268 23:45:02.017509 tx_first_pass[0][1][7] = 977
4269 23:45:02.020883 tx_last_pass[0][1][7] = 1001
4270 23:45:02.024427 tx_win_center[0][1][8] = 979
4271 23:45:02.027389 tx_first_pass[0][1][8] = 967
4272 23:45:02.027518 tx_last_pass[0][1][8] = 992
4273 23:45:02.030627 tx_win_center[0][1][9] = 981
4274 23:45:02.034071 tx_first_pass[0][1][9] = 969
4275 23:45:02.037226 tx_last_pass[0][1][9] = 993
4276 23:45:02.040760 tx_win_center[0][1][10] = 986
4277 23:45:02.040846 tx_first_pass[0][1][10] = 974
4278 23:45:02.043891 tx_last_pass[0][1][10] = 999
4279 23:45:02.047202 tx_win_center[0][1][11] = 980
4280 23:45:02.050386 tx_first_pass[0][1][11] = 968
4281 23:45:02.053669 tx_last_pass[0][1][11] = 992
4282 23:45:02.053769 tx_win_center[0][1][12] = 981
4283 23:45:02.056798 tx_first_pass[0][1][12] = 969
4284 23:45:02.060386 tx_last_pass[0][1][12] = 993
4285 23:45:02.063650 tx_win_center[0][1][13] = 981
4286 23:45:02.066857 tx_first_pass[0][1][13] = 969
4287 23:45:02.066982 tx_last_pass[0][1][13] = 993
4288 23:45:02.070067 tx_win_center[0][1][14] = 983
4289 23:45:02.073179 tx_first_pass[0][1][14] = 970
4290 23:45:02.076626 tx_last_pass[0][1][14] = 996
4291 23:45:02.079878 tx_win_center[0][1][15] = 986
4292 23:45:02.083085 tx_first_pass[0][1][15] = 974
4293 23:45:02.083207 tx_last_pass[0][1][15] = 998
4294 23:45:02.086347 tx_win_center[1][0][0] = 996
4295 23:45:02.089721 tx_first_pass[1][0][0] = 984
4296 23:45:02.092861 tx_last_pass[1][0][0] = 1008
4297 23:45:02.096335 tx_win_center[1][0][1] = 994
4298 23:45:02.096461 tx_first_pass[1][0][1] = 982
4299 23:45:02.099548 tx_last_pass[1][0][1] = 1007
4300 23:45:02.102631 tx_win_center[1][0][2] = 992
4301 23:45:02.106139 tx_first_pass[1][0][2] = 979
4302 23:45:02.109343 tx_last_pass[1][0][2] = 1005
4303 23:45:02.109470 tx_win_center[1][0][3] = 989
4304 23:45:02.112680 tx_first_pass[1][0][3] = 977
4305 23:45:02.116027 tx_last_pass[1][0][3] = 1002
4306 23:45:02.119284 tx_win_center[1][0][4] = 994
4307 23:45:02.122561 tx_first_pass[1][0][4] = 982
4308 23:45:02.122683 tx_last_pass[1][0][4] = 1006
4309 23:45:02.125819 tx_win_center[1][0][5] = 995
4310 23:45:02.129171 tx_first_pass[1][0][5] = 983
4311 23:45:02.132431 tx_last_pass[1][0][5] = 1008
4312 23:45:02.135664 tx_win_center[1][0][6] = 994
4313 23:45:02.135789 tx_first_pass[1][0][6] = 982
4314 23:45:02.138721 tx_last_pass[1][0][6] = 1007
4315 23:45:02.142017 tx_win_center[1][0][7] = 994
4316 23:45:02.145554 tx_first_pass[1][0][7] = 982
4317 23:45:02.148699 tx_last_pass[1][0][7] = 1006
4318 23:45:02.148829 tx_win_center[1][0][8] = 985
4319 23:45:02.151791 tx_first_pass[1][0][8] = 973
4320 23:45:02.155221 tx_last_pass[1][0][8] = 997
4321 23:45:02.158485 tx_win_center[1][0][9] = 983
4322 23:45:02.161664 tx_first_pass[1][0][9] = 972
4323 23:45:02.161817 tx_last_pass[1][0][9] = 995
4324 23:45:02.165010 tx_win_center[1][0][10] = 987
4325 23:45:02.168310 tx_first_pass[1][0][10] = 975
4326 23:45:02.171796 tx_last_pass[1][0][10] = 999
4327 23:45:02.175121 tx_win_center[1][0][11] = 988
4328 23:45:02.175244 tx_first_pass[1][0][11] = 977
4329 23:45:02.178220 tx_last_pass[1][0][11] = 1000
4330 23:45:02.181280 tx_win_center[1][0][12] = 987
4331 23:45:02.184552 tx_first_pass[1][0][12] = 976
4332 23:45:02.187827 tx_last_pass[1][0][12] = 999
4333 23:45:02.187948 tx_win_center[1][0][13] = 988
4334 23:45:02.191319 tx_first_pass[1][0][13] = 977
4335 23:45:02.194576 tx_last_pass[1][0][13] = 1000
4336 23:45:02.197831 tx_win_center[1][0][14] = 987
4337 23:45:02.201061 tx_first_pass[1][0][14] = 976
4338 23:45:02.204234 tx_last_pass[1][0][14] = 999
4339 23:45:02.204349 tx_win_center[1][0][15] = 981
4340 23:45:02.207515 tx_first_pass[1][0][15] = 970
4341 23:45:02.210969 tx_last_pass[1][0][15] = 993
4342 23:45:02.214077 tx_win_center[1][1][0] = 995
4343 23:45:02.217213 tx_first_pass[1][1][0] = 983
4344 23:45:02.217353 tx_last_pass[1][1][0] = 1007
4345 23:45:02.220786 tx_win_center[1][1][1] = 993
4346 23:45:02.223759 tx_first_pass[1][1][1] = 981
4347 23:45:02.227437 tx_last_pass[1][1][1] = 1006
4348 23:45:02.230773 tx_win_center[1][1][2] = 992
4349 23:45:02.230864 tx_first_pass[1][1][2] = 979
4350 23:45:02.233869 tx_last_pass[1][1][2] = 1005
4351 23:45:02.237150 tx_win_center[1][1][3] = 989
4352 23:45:02.240389 tx_first_pass[1][1][3] = 977
4353 23:45:02.243542 tx_last_pass[1][1][3] = 1002
4354 23:45:02.243653 tx_win_center[1][1][4] = 993
4355 23:45:02.247105 tx_first_pass[1][1][4] = 981
4356 23:45:02.250062 tx_last_pass[1][1][4] = 1006
4357 23:45:02.253293 tx_win_center[1][1][5] = 995
4358 23:45:02.256615 tx_first_pass[1][1][5] = 983
4359 23:45:02.256733 tx_last_pass[1][1][5] = 1007
4360 23:45:02.260150 tx_win_center[1][1][6] = 994
4361 23:45:02.263481 tx_first_pass[1][1][6] = 982
4362 23:45:02.266379 tx_last_pass[1][1][6] = 1006
4363 23:45:02.269658 tx_win_center[1][1][7] = 994
4364 23:45:02.269770 tx_first_pass[1][1][7] = 982
4365 23:45:02.273074 tx_last_pass[1][1][7] = 1006
4366 23:45:02.276183 tx_win_center[1][1][8] = 987
4367 23:45:02.279780 tx_first_pass[1][1][8] = 976
4368 23:45:02.282919 tx_last_pass[1][1][8] = 998
4369 23:45:02.283044 tx_win_center[1][1][9] = 986
4370 23:45:02.286114 tx_first_pass[1][1][9] = 975
4371 23:45:02.289572 tx_last_pass[1][1][9] = 998
4372 23:45:02.292874 tx_win_center[1][1][10] = 989
4373 23:45:02.296152 tx_first_pass[1][1][10] = 977
4374 23:45:02.296272 tx_last_pass[1][1][10] = 1001
4375 23:45:02.299293 tx_win_center[1][1][11] = 989
4376 23:45:02.302576 tx_first_pass[1][1][11] = 978
4377 23:45:02.305890 tx_last_pass[1][1][11] = 1001
4378 23:45:02.309101 tx_win_center[1][1][12] = 989
4379 23:45:02.312264 tx_first_pass[1][1][12] = 978
4380 23:45:02.312376 tx_last_pass[1][1][12] = 1001
4381 23:45:02.315812 tx_win_center[1][1][13] = 990
4382 23:45:02.318899 tx_first_pass[1][1][13] = 978
4383 23:45:02.322170 tx_last_pass[1][1][13] = 1002
4384 23:45:02.325548 tx_win_center[1][1][14] = 989
4385 23:45:02.325658 tx_first_pass[1][1][14] = 978
4386 23:45:02.328660 tx_last_pass[1][1][14] = 1000
4387 23:45:02.331885 tx_win_center[1][1][15] = 983
4388 23:45:02.335388 tx_first_pass[1][1][15] = 972
4389 23:45:02.338331 tx_last_pass[1][1][15] = 995
4390 23:45:02.338449 dump params rx window
4391 23:45:02.341870 rx_firspass[0][0][0] = 6
4392 23:45:02.344997 rx_lastpass[0][0][0] = 37
4393 23:45:02.345088 rx_firspass[0][0][1] = 7
4394 23:45:02.348321 rx_lastpass[0][0][1] = 36
4395 23:45:02.351536 rx_firspass[0][0][2] = 5
4396 23:45:02.354801 rx_lastpass[0][0][2] = 39
4397 23:45:02.354915 rx_firspass[0][0][3] = -3
4398 23:45:02.358320 rx_lastpass[0][0][3] = 31
4399 23:45:02.361326 rx_firspass[0][0][4] = 6
4400 23:45:02.361446 rx_lastpass[0][0][4] = 36
4401 23:45:02.364616 rx_firspass[0][0][5] = 2
4402 23:45:02.367823 rx_lastpass[0][0][5] = 33
4403 23:45:02.371392 rx_firspass[0][0][6] = 3
4404 23:45:02.371506 rx_lastpass[0][0][6] = 33
4405 23:45:02.374384 rx_firspass[0][0][7] = 4
4406 23:45:02.377967 rx_lastpass[0][0][7] = 36
4407 23:45:02.378071 rx_firspass[0][0][8] = -1
4408 23:45:02.381120 rx_lastpass[0][0][8] = 30
4409 23:45:02.384318 rx_firspass[0][0][9] = 2
4410 23:45:02.387732 rx_lastpass[0][0][9] = 33
4411 23:45:02.387845 rx_firspass[0][0][10] = 9
4412 23:45:02.390897 rx_lastpass[0][0][10] = 37
4413 23:45:02.394091 rx_firspass[0][0][11] = 0
4414 23:45:02.397412 rx_lastpass[0][0][11] = 30
4415 23:45:02.397501 rx_firspass[0][0][12] = 3
4416 23:45:02.400772 rx_lastpass[0][0][12] = 32
4417 23:45:02.404019 rx_firspass[0][0][13] = 1
4418 23:45:02.407173 rx_lastpass[0][0][13] = 32
4419 23:45:02.407250 rx_firspass[0][0][14] = 1
4420 23:45:02.410391 rx_lastpass[0][0][14] = 36
4421 23:45:02.413580 rx_firspass[0][0][15] = 4
4422 23:45:02.413655 rx_lastpass[0][0][15] = 36
4423 23:45:02.416912 rx_firspass[0][1][0] = 3
4424 23:45:02.420184 rx_lastpass[0][1][0] = 39
4425 23:45:02.423442 rx_firspass[0][1][1] = 4
4426 23:45:02.423548 rx_lastpass[0][1][1] = 38
4427 23:45:02.426707 rx_firspass[0][1][2] = 5
4428 23:45:02.430203 rx_lastpass[0][1][2] = 40
4429 23:45:02.430286 rx_firspass[0][1][3] = -3
4430 23:45:02.433417 rx_lastpass[0][1][3] = 31
4431 23:45:02.436540 rx_firspass[0][1][4] = 4
4432 23:45:02.439906 rx_lastpass[0][1][4] = 38
4433 23:45:02.440023 rx_firspass[0][1][5] = -1
4434 23:45:02.443024 rx_lastpass[0][1][5] = 34
4435 23:45:02.446418 rx_firspass[0][1][6] = 1
4436 23:45:02.446529 rx_lastpass[0][1][6] = 35
4437 23:45:02.449617 rx_firspass[0][1][7] = 3
4438 23:45:02.453012 rx_lastpass[0][1][7] = 37
4439 23:45:02.456424 rx_firspass[0][1][8] = -4
4440 23:45:02.456547 rx_lastpass[0][1][8] = 32
4441 23:45:02.459295 rx_firspass[0][1][9] = -2
4442 23:45:02.462957 rx_lastpass[0][1][9] = 34
4443 23:45:02.466142 rx_firspass[0][1][10] = 7
4444 23:45:02.466222 rx_lastpass[0][1][10] = 40
4445 23:45:02.469129 rx_firspass[0][1][11] = -3
4446 23:45:02.472768 rx_lastpass[0][1][11] = 32
4447 23:45:02.472856 rx_firspass[0][1][12] = 0
4448 23:45:02.475981 rx_lastpass[0][1][12] = 34
4449 23:45:02.479179 rx_firspass[0][1][13] = -2
4450 23:45:02.482604 rx_lastpass[0][1][13] = 33
4451 23:45:02.482693 rx_firspass[0][1][14] = 2
4452 23:45:02.485884 rx_lastpass[0][1][14] = 35
4453 23:45:02.488945 rx_firspass[0][1][15] = 4
4454 23:45:02.492256 rx_lastpass[0][1][15] = 37
4455 23:45:02.492366 rx_firspass[1][0][0] = 5
4456 23:45:02.495355 rx_lastpass[1][0][0] = 36
4457 23:45:02.498850 rx_firspass[1][0][1] = 4
4458 23:45:02.502204 rx_lastpass[1][0][1] = 37
4459 23:45:02.502329 rx_firspass[1][0][2] = 1
4460 23:45:02.505253 rx_lastpass[1][0][2] = 35
4461 23:45:02.508692 rx_firspass[1][0][3] = 0
4462 23:45:02.508785 rx_lastpass[1][0][3] = 31
4463 23:45:02.511932 rx_firspass[1][0][4] = 5
4464 23:45:02.515190 rx_lastpass[1][0][4] = 35
4465 23:45:02.518465 rx_firspass[1][0][5] = 9
4466 23:45:02.518576 rx_lastpass[1][0][5] = 38
4467 23:45:02.521764 rx_firspass[1][0][6] = 6
4468 23:45:02.525016 rx_lastpass[1][0][6] = 38
4469 23:45:02.525126 rx_firspass[1][0][7] = 5
4470 23:45:02.528095 rx_lastpass[1][0][7] = 34
4471 23:45:02.531375 rx_firspass[1][0][8] = 0
4472 23:45:02.534668 rx_lastpass[1][0][8] = 33
4473 23:45:02.534750 rx_firspass[1][0][9] = -1
4474 23:45:02.538061 rx_lastpass[1][0][9] = 31
4475 23:45:02.541348 rx_firspass[1][0][10] = 3
4476 23:45:02.541460 rx_lastpass[1][0][10] = 36
4477 23:45:02.544566 rx_firspass[1][0][11] = 4
4478 23:45:02.547778 rx_lastpass[1][0][11] = 36
4479 23:45:02.551010 rx_firspass[1][0][12] = 5
4480 23:45:02.551130 rx_lastpass[1][0][12] = 35
4481 23:45:02.554556 rx_firspass[1][0][13] = 5
4482 23:45:02.557591 rx_lastpass[1][0][13] = 36
4483 23:45:02.560853 rx_firspass[1][0][14] = 5
4484 23:45:02.560968 rx_lastpass[1][0][14] = 37
4485 23:45:02.564331 rx_firspass[1][0][15] = -4
4486 23:45:02.567359 rx_lastpass[1][0][15] = 29
4487 23:45:02.570554 rx_firspass[1][1][0] = 3
4488 23:45:02.570651 rx_lastpass[1][1][0] = 40
4489 23:45:02.573853 rx_firspass[1][1][1] = 4
4490 23:45:02.577339 rx_lastpass[1][1][1] = 38
4491 23:45:02.577455 rx_firspass[1][1][2] = 3
4492 23:45:02.580510 rx_lastpass[1][1][2] = 34
4493 23:45:02.583767 rx_firspass[1][1][3] = -2
4494 23:45:02.587036 rx_lastpass[1][1][3] = 33
4495 23:45:02.587142 rx_firspass[1][1][4] = 4
4496 23:45:02.590414 rx_lastpass[1][1][4] = 39
4497 23:45:02.593591 rx_firspass[1][1][5] = 5
4498 23:45:02.593707 rx_lastpass[1][1][5] = 40
4499 23:45:02.596836 rx_firspass[1][1][6] = 6
4500 23:45:02.600120 rx_lastpass[1][1][6] = 40
4501 23:45:02.600236 rx_firspass[1][1][7] = 3
4502 23:45:02.603494 rx_lastpass[1][1][7] = 38
4503 23:45:02.606767 rx_firspass[1][1][8] = -1
4504 23:45:02.610124 rx_lastpass[1][1][8] = 35
4505 23:45:02.610210 rx_firspass[1][1][9] = -2
4506 23:45:02.613335 rx_lastpass[1][1][9] = 32
4507 23:45:02.616519 rx_firspass[1][1][10] = 3
4508 23:45:02.619756 rx_lastpass[1][1][10] = 38
4509 23:45:02.619835 rx_firspass[1][1][11] = 3
4510 23:45:02.623062 rx_lastpass[1][1][11] = 38
4511 23:45:02.626318 rx_firspass[1][1][12] = 3
4512 23:45:02.629518 rx_lastpass[1][1][12] = 37
4513 23:45:02.629641 rx_firspass[1][1][13] = 3
4514 23:45:02.632795 rx_lastpass[1][1][13] = 39
4515 23:45:02.636317 rx_firspass[1][1][14] = 4
4516 23:45:02.639654 rx_lastpass[1][1][14] = 40
4517 23:45:02.639748 rx_firspass[1][1][15] = -4
4518 23:45:02.642723 rx_lastpass[1][1][15] = 31
4519 23:45:02.645859 dump params clk_delay
4520 23:45:02.645975 clk_delay[0] = 0
4521 23:45:02.649042 clk_delay[1] = 0
4522 23:45:02.649117 dump params dqs_delay
4523 23:45:02.652691 dqs_delay[0][0] = 0
4524 23:45:02.652812 dqs_delay[0][1] = 0
4525 23:45:02.655952 dqs_delay[1][0] = 0
4526 23:45:02.656040 dqs_delay[1][1] = -1
4527 23:45:02.659215 dump params delay_cell_unit = 744
4528 23:45:02.662393 dump source = 0x0
4529 23:45:02.665442 dump params frequency:1200
4530 23:45:02.665521 dump params rank number:2
4531 23:45:02.665586
4532 23:45:02.668813 dump params write leveling
4533 23:45:02.672401 write leveling[0][0][0] = 0x0
4534 23:45:02.675391 write leveling[0][0][1] = 0x0
4535 23:45:02.678735 write leveling[0][1][0] = 0x0
4536 23:45:02.678855 write leveling[0][1][1] = 0x0
4537 23:45:02.682133 write leveling[1][0][0] = 0x0
4538 23:45:02.685228 write leveling[1][0][1] = 0x0
4539 23:45:02.688424 write leveling[1][1][0] = 0x0
4540 23:45:02.691694 write leveling[1][1][1] = 0x0
4541 23:45:02.691812 dump params cbt_cs
4542 23:45:02.694966 cbt_cs[0][0] = 0x0
4543 23:45:02.695050 cbt_cs[0][1] = 0x0
4544 23:45:02.698346 cbt_cs[1][0] = 0x0
4545 23:45:02.698421 cbt_cs[1][1] = 0x0
4546 23:45:02.701813 dump params cbt_mr12
4547 23:45:02.701903 cbt_mr12[0][0] = 0x0
4548 23:45:02.704775 cbt_mr12[0][1] = 0x0
4549 23:45:02.708265 cbt_mr12[1][0] = 0x0
4550 23:45:02.708396 cbt_mr12[1][1] = 0x0
4551 23:45:02.711659 dump params tx window
4552 23:45:02.711789 tx_center_min[0][0][0] = 0
4553 23:45:02.714574 tx_center_max[0][0][0] = 0
4554 23:45:02.717932 tx_center_min[0][0][1] = 0
4555 23:45:02.721407 tx_center_max[0][0][1] = 0
4556 23:45:02.721506 tx_center_min[0][1][0] = 0
4557 23:45:02.724357 tx_center_max[0][1][0] = 0
4558 23:45:02.727985 tx_center_min[0][1][1] = 0
4559 23:45:02.731119 tx_center_max[0][1][1] = 0
4560 23:45:02.731230 tx_center_min[1][0][0] = 0
4561 23:45:02.734328 tx_center_max[1][0][0] = 0
4562 23:45:02.737697 tx_center_min[1][0][1] = 0
4563 23:45:02.741132 tx_center_max[1][0][1] = 0
4564 23:45:02.741252 tx_center_min[1][1][0] = 0
4565 23:45:02.744144 tx_center_max[1][1][0] = 0
4566 23:45:02.747590 tx_center_min[1][1][1] = 0
4567 23:45:02.750862 tx_center_max[1][1][1] = 0
4568 23:45:02.750944 dump params tx window
4569 23:45:02.753897 tx_win_center[0][0][0] = 0
4570 23:45:02.757160 tx_first_pass[0][0][0] = 0
4571 23:45:02.760518 tx_last_pass[0][0][0] = 0
4572 23:45:02.760637 tx_win_center[0][0][1] = 0
4573 23:45:02.763752 tx_first_pass[0][0][1] = 0
4574 23:45:02.766963 tx_last_pass[0][0][1] = 0
4575 23:45:02.770476 tx_win_center[0][0][2] = 0
4576 23:45:02.770565 tx_first_pass[0][0][2] = 0
4577 23:45:02.773674 tx_last_pass[0][0][2] = 0
4578 23:45:02.776867 tx_win_center[0][0][3] = 0
4579 23:45:02.777006 tx_first_pass[0][0][3] = 0
4580 23:45:02.780202 tx_last_pass[0][0][3] = 0
4581 23:45:02.783481 tx_win_center[0][0][4] = 0
4582 23:45:02.786589 tx_first_pass[0][0][4] = 0
4583 23:45:02.786713 tx_last_pass[0][0][4] = 0
4584 23:45:02.790016 tx_win_center[0][0][5] = 0
4585 23:45:02.793170 tx_first_pass[0][0][5] = 0
4586 23:45:02.796383 tx_last_pass[0][0][5] = 0
4587 23:45:02.796498 tx_win_center[0][0][6] = 0
4588 23:45:02.799912 tx_first_pass[0][0][6] = 0
4589 23:45:02.803134 tx_last_pass[0][0][6] = 0
4590 23:45:02.806272 tx_win_center[0][0][7] = 0
4591 23:45:02.806358 tx_first_pass[0][0][7] = 0
4592 23:45:02.809593 tx_last_pass[0][0][7] = 0
4593 23:45:02.812773 tx_win_center[0][0][8] = 0
4594 23:45:02.816076 tx_first_pass[0][0][8] = 0
4595 23:45:02.816155 tx_last_pass[0][0][8] = 0
4596 23:45:02.819582 tx_win_center[0][0][9] = 0
4597 23:45:02.822577 tx_first_pass[0][0][9] = 0
4598 23:45:02.822689 tx_last_pass[0][0][9] = 0
4599 23:45:02.825992 tx_win_center[0][0][10] = 0
4600 23:45:02.829091 tx_first_pass[0][0][10] = 0
4601 23:45:02.832440 tx_last_pass[0][0][10] = 0
4602 23:45:02.835845 tx_win_center[0][0][11] = 0
4603 23:45:02.835937 tx_first_pass[0][0][11] = 0
4604 23:45:02.838891 tx_last_pass[0][0][11] = 0
4605 23:45:02.842249 tx_win_center[0][0][12] = 0
4606 23:45:02.845441 tx_first_pass[0][0][12] = 0
4607 23:45:02.845553 tx_last_pass[0][0][12] = 0
4608 23:45:02.848777 tx_win_center[0][0][13] = 0
4609 23:45:02.852122 tx_first_pass[0][0][13] = 0
4610 23:45:02.855560 tx_last_pass[0][0][13] = 0
4611 23:45:02.855646 tx_win_center[0][0][14] = 0
4612 23:45:02.858479 tx_first_pass[0][0][14] = 0
4613 23:45:02.861809 tx_last_pass[0][0][14] = 0
4614 23:45:02.865035 tx_win_center[0][0][15] = 0
4615 23:45:02.865120 tx_first_pass[0][0][15] = 0
4616 23:45:02.868668 tx_last_pass[0][0][15] = 0
4617 23:45:02.871996 tx_win_center[0][1][0] = 0
4618 23:45:02.875199 tx_first_pass[0][1][0] = 0
4619 23:45:02.875279 tx_last_pass[0][1][0] = 0
4620 23:45:02.878575 tx_win_center[0][1][1] = 0
4621 23:45:02.881778 tx_first_pass[0][1][1] = 0
4622 23:45:02.884925 tx_last_pass[0][1][1] = 0
4623 23:45:02.885042 tx_win_center[0][1][2] = 0
4624 23:45:02.888345 tx_first_pass[0][1][2] = 0
4625 23:45:02.891268 tx_last_pass[0][1][2] = 0
4626 23:45:02.894787 tx_win_center[0][1][3] = 0
4627 23:45:02.894902 tx_first_pass[0][1][3] = 0
4628 23:45:02.897852 tx_last_pass[0][1][3] = 0
4629 23:45:02.901140 tx_win_center[0][1][4] = 0
4630 23:45:02.904419 tx_first_pass[0][1][4] = 0
4631 23:45:02.904506 tx_last_pass[0][1][4] = 0
4632 23:45:02.907662 tx_win_center[0][1][5] = 0
4633 23:45:02.911165 tx_first_pass[0][1][5] = 0
4634 23:45:02.911248 tx_last_pass[0][1][5] = 0
4635 23:45:02.914100 tx_win_center[0][1][6] = 0
4636 23:45:02.917793 tx_first_pass[0][1][6] = 0
4637 23:45:02.920951 tx_last_pass[0][1][6] = 0
4638 23:45:02.921035 tx_win_center[0][1][7] = 0
4639 23:45:02.924251 tx_first_pass[0][1][7] = 0
4640 23:45:02.927505 tx_last_pass[0][1][7] = 0
4641 23:45:02.930863 tx_win_center[0][1][8] = 0
4642 23:45:02.930948 tx_first_pass[0][1][8] = 0
4643 23:45:02.933910 tx_last_pass[0][1][8] = 0
4644 23:45:02.937302 tx_win_center[0][1][9] = 0
4645 23:45:02.940476 tx_first_pass[0][1][9] = 0
4646 23:45:02.940583 tx_last_pass[0][1][9] = 0
4647 23:45:02.943729 tx_win_center[0][1][10] = 0
4648 23:45:02.947055 tx_first_pass[0][1][10] = 0
4649 23:45:02.950381 tx_last_pass[0][1][10] = 0
4650 23:45:02.950501 tx_win_center[0][1][11] = 0
4651 23:45:02.953599 tx_first_pass[0][1][11] = 0
4652 23:45:02.957063 tx_last_pass[0][1][11] = 0
4653 23:45:02.960013 tx_win_center[0][1][12] = 0
4654 23:45:02.960096 tx_first_pass[0][1][12] = 0
4655 23:45:02.963587 tx_last_pass[0][1][12] = 0
4656 23:45:02.966689 tx_win_center[0][1][13] = 0
4657 23:45:02.969995 tx_first_pass[0][1][13] = 0
4658 23:45:02.970114 tx_last_pass[0][1][13] = 0
4659 23:45:02.973225 tx_win_center[0][1][14] = 0
4660 23:45:02.976536 tx_first_pass[0][1][14] = 0
4661 23:45:02.979911 tx_last_pass[0][1][14] = 0
4662 23:45:02.983215 tx_win_center[0][1][15] = 0
4663 23:45:02.983306 tx_first_pass[0][1][15] = 0
4664 23:45:02.986474 tx_last_pass[0][1][15] = 0
4665 23:45:02.989807 tx_win_center[1][0][0] = 0
4666 23:45:02.992940 tx_first_pass[1][0][0] = 0
4667 23:45:02.993032 tx_last_pass[1][0][0] = 0
4668 23:45:02.996040 tx_win_center[1][0][1] = 0
4669 23:45:02.999354 tx_first_pass[1][0][1] = 0
4670 23:45:02.999448 tx_last_pass[1][0][1] = 0
4671 23:45:03.002894 tx_win_center[1][0][2] = 0
4672 23:45:03.006078 tx_first_pass[1][0][2] = 0
4673 23:45:03.009179 tx_last_pass[1][0][2] = 0
4674 23:45:03.009303 tx_win_center[1][0][3] = 0
4675 23:45:03.012629 tx_first_pass[1][0][3] = 0
4676 23:45:03.015646 tx_last_pass[1][0][3] = 0
4677 23:45:03.018998 tx_win_center[1][0][4] = 0
4678 23:45:03.019088 tx_first_pass[1][0][4] = 0
4679 23:45:03.022267 tx_last_pass[1][0][4] = 0
4680 23:45:03.025776 tx_win_center[1][0][5] = 0
4681 23:45:03.028901 tx_first_pass[1][0][5] = 0
4682 23:45:03.028999 tx_last_pass[1][0][5] = 0
4683 23:45:03.032259 tx_win_center[1][0][6] = 0
4684 23:45:03.035454 tx_first_pass[1][0][6] = 0
4685 23:45:03.038633 tx_last_pass[1][0][6] = 0
4686 23:45:03.038713 tx_win_center[1][0][7] = 0
4687 23:45:03.042109 tx_first_pass[1][0][7] = 0
4688 23:45:03.045316 tx_last_pass[1][0][7] = 0
4689 23:45:03.045425 tx_win_center[1][0][8] = 0
4690 23:45:03.048499 tx_first_pass[1][0][8] = 0
4691 23:45:03.051710 tx_last_pass[1][0][8] = 0
4692 23:45:03.055251 tx_win_center[1][0][9] = 0
4693 23:45:03.055333 tx_first_pass[1][0][9] = 0
4694 23:45:03.058575 tx_last_pass[1][0][9] = 0
4695 23:45:03.061524 tx_win_center[1][0][10] = 0
4696 23:45:03.064936 tx_first_pass[1][0][10] = 0
4697 23:45:03.065021 tx_last_pass[1][0][10] = 0
4698 23:45:03.068286 tx_win_center[1][0][11] = 0
4699 23:45:03.071560 tx_first_pass[1][0][11] = 0
4700 23:45:03.074851 tx_last_pass[1][0][11] = 0
4701 23:45:03.078093 tx_win_center[1][0][12] = 0
4702 23:45:03.078170 tx_first_pass[1][0][12] = 0
4703 23:45:03.081367 tx_last_pass[1][0][12] = 0
4704 23:45:03.084680 tx_win_center[1][0][13] = 0
4705 23:45:03.087941 tx_first_pass[1][0][13] = 0
4706 23:45:03.088021 tx_last_pass[1][0][13] = 0
4707 23:45:03.091233 tx_win_center[1][0][14] = 0
4708 23:45:03.094358 tx_first_pass[1][0][14] = 0
4709 23:45:03.097643 tx_last_pass[1][0][14] = 0
4710 23:45:03.097753 tx_win_center[1][0][15] = 0
4711 23:45:03.100799 tx_first_pass[1][0][15] = 0
4712 23:45:03.104345 tx_last_pass[1][0][15] = 0
4713 23:45:03.107372 tx_win_center[1][1][0] = 0
4714 23:45:03.107453 tx_first_pass[1][1][0] = 0
4715 23:45:03.110968 tx_last_pass[1][1][0] = 0
4716 23:45:03.114234 tx_win_center[1][1][1] = 0
4717 23:45:03.117441 tx_first_pass[1][1][1] = 0
4718 23:45:03.117519 tx_last_pass[1][1][1] = 0
4719 23:45:03.120583 tx_win_center[1][1][2] = 0
4720 23:45:03.123766 tx_first_pass[1][1][2] = 0
4721 23:45:03.127044 tx_last_pass[1][1][2] = 0
4722 23:45:03.127152 tx_win_center[1][1][3] = 0
4723 23:45:03.130505 tx_first_pass[1][1][3] = 0
4724 23:45:03.134000 tx_last_pass[1][1][3] = 0
4725 23:45:03.134078 tx_win_center[1][1][4] = 0
4726 23:45:03.136767 tx_first_pass[1][1][4] = 0
4727 23:45:03.140378 tx_last_pass[1][1][4] = 0
4728 23:45:03.143669 tx_win_center[1][1][5] = 0
4729 23:45:03.143778 tx_first_pass[1][1][5] = 0
4730 23:45:03.146961 tx_last_pass[1][1][5] = 0
4731 23:45:03.150188 tx_win_center[1][1][6] = 0
4732 23:45:03.153331 tx_first_pass[1][1][6] = 0
4733 23:45:03.153455 tx_last_pass[1][1][6] = 0
4734 23:45:03.156568 tx_win_center[1][1][7] = 0
4735 23:45:03.159861 tx_first_pass[1][1][7] = 0
4736 23:45:03.163217 tx_last_pass[1][1][7] = 0
4737 23:45:03.163309 tx_win_center[1][1][8] = 0
4738 23:45:03.166363 tx_first_pass[1][1][8] = 0
4739 23:45:03.169567 tx_last_pass[1][1][8] = 0
4740 23:45:03.173078 tx_win_center[1][1][9] = 0
4741 23:45:03.173157 tx_first_pass[1][1][9] = 0
4742 23:45:03.176496 tx_last_pass[1][1][9] = 0
4743 23:45:03.179586 tx_win_center[1][1][10] = 0
4744 23:45:03.182741 tx_first_pass[1][1][10] = 0
4745 23:45:03.182855 tx_last_pass[1][1][10] = 0
4746 23:45:03.186071 tx_win_center[1][1][11] = 0
4747 23:45:03.189361 tx_first_pass[1][1][11] = 0
4748 23:45:03.192554 tx_last_pass[1][1][11] = 0
4749 23:45:03.192635 tx_win_center[1][1][12] = 0
4750 23:45:03.195807 tx_first_pass[1][1][12] = 0
4751 23:45:03.199002 tx_last_pass[1][1][12] = 0
4752 23:45:03.202250 tx_win_center[1][1][13] = 0
4753 23:45:03.202328 tx_first_pass[1][1][13] = 0
4754 23:45:03.205673 tx_last_pass[1][1][13] = 0
4755 23:45:03.209143 tx_win_center[1][1][14] = 0
4756 23:45:03.212259 tx_first_pass[1][1][14] = 0
4757 23:45:03.212365 tx_last_pass[1][1][14] = 0
4758 23:45:03.215512 tx_win_center[1][1][15] = 0
4759 23:45:03.218824 tx_first_pass[1][1][15] = 0
4760 23:45:03.222078 tx_last_pass[1][1][15] = 0
4761 23:45:03.222192 dump params rx window
4762 23:45:03.225124 rx_firspass[0][0][0] = 0
4763 23:45:03.228479 rx_lastpass[0][0][0] = 0
4764 23:45:03.228605 rx_firspass[0][0][1] = 0
4765 23:45:03.231740 rx_lastpass[0][0][1] = 0
4766 23:45:03.235130 rx_firspass[0][0][2] = 0
4767 23:45:03.238237 rx_lastpass[0][0][2] = 0
4768 23:45:03.238349 rx_firspass[0][0][3] = 0
4769 23:45:03.241886 rx_lastpass[0][0][3] = 0
4770 23:45:03.245009 rx_firspass[0][0][4] = 0
4771 23:45:03.245129 rx_lastpass[0][0][4] = 0
4772 23:45:03.248240 rx_firspass[0][0][5] = 0
4773 23:45:03.251499 rx_lastpass[0][0][5] = 0
4774 23:45:03.251609 rx_firspass[0][0][6] = 0
4775 23:45:03.254746 rx_lastpass[0][0][6] = 0
4776 23:45:03.258034 rx_firspass[0][0][7] = 0
4777 23:45:03.261324 rx_lastpass[0][0][7] = 0
4778 23:45:03.261445 rx_firspass[0][0][8] = 0
4779 23:45:03.264478 rx_lastpass[0][0][8] = 0
4780 23:45:03.267752 rx_firspass[0][0][9] = 0
4781 23:45:03.267868 rx_lastpass[0][0][9] = 0
4782 23:45:03.271284 rx_firspass[0][0][10] = 0
4783 23:45:03.274416 rx_lastpass[0][0][10] = 0
4784 23:45:03.274534 rx_firspass[0][0][11] = 0
4785 23:45:03.277833 rx_lastpass[0][0][11] = 0
4786 23:45:03.281067 rx_firspass[0][0][12] = 0
4787 23:45:03.284178 rx_lastpass[0][0][12] = 0
4788 23:45:03.284296 rx_firspass[0][0][13] = 0
4789 23:45:03.287384 rx_lastpass[0][0][13] = 0
4790 23:45:03.290801 rx_firspass[0][0][14] = 0
4791 23:45:03.294119 rx_lastpass[0][0][14] = 0
4792 23:45:03.294208 rx_firspass[0][0][15] = 0
4793 23:45:03.297272 rx_lastpass[0][0][15] = 0
4794 23:45:03.300541 rx_firspass[0][1][0] = 0
4795 23:45:03.300627 rx_lastpass[0][1][0] = 0
4796 23:45:03.303806 rx_firspass[0][1][1] = 0
4797 23:45:03.307049 rx_lastpass[0][1][1] = 0
4798 23:45:03.307131 rx_firspass[0][1][2] = 0
4799 23:45:03.310682 rx_lastpass[0][1][2] = 0
4800 23:45:03.313885 rx_firspass[0][1][3] = 0
4801 23:45:03.317268 rx_lastpass[0][1][3] = 0
4802 23:45:03.317388 rx_firspass[0][1][4] = 0
4803 23:45:03.320441 rx_lastpass[0][1][4] = 0
4804 23:45:03.323722 rx_firspass[0][1][5] = 0
4805 23:45:03.323815 rx_lastpass[0][1][5] = 0
4806 23:45:03.326780 rx_firspass[0][1][6] = 0
4807 23:45:03.330244 rx_lastpass[0][1][6] = 0
4808 23:45:03.330364 rx_firspass[0][1][7] = 0
4809 23:45:03.333427 rx_lastpass[0][1][7] = 0
4810 23:45:03.336661 rx_firspass[0][1][8] = 0
4811 23:45:03.339846 rx_lastpass[0][1][8] = 0
4812 23:45:03.339929 rx_firspass[0][1][9] = 0
4813 23:45:03.343093 rx_lastpass[0][1][9] = 0
4814 23:45:03.346587 rx_firspass[0][1][10] = 0
4815 23:45:03.346678 rx_lastpass[0][1][10] = 0
4816 23:45:03.349686 rx_firspass[0][1][11] = 0
4817 23:45:03.352994 rx_lastpass[0][1][11] = 0
4818 23:45:03.356577 rx_firspass[0][1][12] = 0
4819 23:45:03.356673 rx_lastpass[0][1][12] = 0
4820 23:45:03.359698 rx_firspass[0][1][13] = 0
4821 23:45:03.362958 rx_lastpass[0][1][13] = 0
4822 23:45:03.363064 rx_firspass[0][1][14] = 0
4823 23:45:03.366361 rx_lastpass[0][1][14] = 0
4824 23:45:03.369406 rx_firspass[0][1][15] = 0
4825 23:45:03.372888 rx_lastpass[0][1][15] = 0
4826 23:45:03.373021 rx_firspass[1][0][0] = 0
4827 23:45:03.375936 rx_lastpass[1][0][0] = 0
4828 23:45:03.379201 rx_firspass[1][0][1] = 0
4829 23:45:03.379345 rx_lastpass[1][0][1] = 0
4830 23:45:03.382845 rx_firspass[1][0][2] = 0
4831 23:45:03.386128 rx_lastpass[1][0][2] = 0
4832 23:45:03.386322 rx_firspass[1][0][3] = 0
4833 23:45:03.389302 rx_lastpass[1][0][3] = 0
4834 23:45:03.392460 rx_firspass[1][0][4] = 0
4835 23:45:03.395847 rx_lastpass[1][0][4] = 0
4836 23:45:03.396129 rx_firspass[1][0][5] = 0
4837 23:45:03.399259 rx_lastpass[1][0][5] = 0
4838 23:45:03.402454 rx_firspass[1][0][6] = 0
4839 23:45:03.402825 rx_lastpass[1][0][6] = 0
4840 23:45:03.405651 rx_firspass[1][0][7] = 0
4841 23:45:03.409253 rx_lastpass[1][0][7] = 0
4842 23:45:03.409769 rx_firspass[1][0][8] = 0
4843 23:45:03.412409 rx_lastpass[1][0][8] = 0
4844 23:45:03.415550 rx_firspass[1][0][9] = 0
4845 23:45:03.418752 rx_lastpass[1][0][9] = 0
4846 23:45:03.419165 rx_firspass[1][0][10] = 0
4847 23:45:03.421980 rx_lastpass[1][0][10] = 0
4848 23:45:03.425417 rx_firspass[1][0][11] = 0
4849 23:45:03.425870 rx_lastpass[1][0][11] = 0
4850 23:45:03.428682 rx_firspass[1][0][12] = 0
4851 23:45:03.431959 rx_lastpass[1][0][12] = 0
4852 23:45:03.435203 rx_firspass[1][0][13] = 0
4853 23:45:03.435614 rx_lastpass[1][0][13] = 0
4854 23:45:03.438601 rx_firspass[1][0][14] = 0
4855 23:45:03.441841 rx_lastpass[1][0][14] = 0
4856 23:45:03.444885 rx_firspass[1][0][15] = 0
4857 23:45:03.445311 rx_lastpass[1][0][15] = 0
4858 23:45:03.448546 rx_firspass[1][1][0] = 0
4859 23:45:03.451738 rx_lastpass[1][1][0] = 0
4860 23:45:03.452286 rx_firspass[1][1][1] = 0
4861 23:45:03.454931 rx_lastpass[1][1][1] = 0
4862 23:45:03.458041 rx_firspass[1][1][2] = 0
4863 23:45:03.458536 rx_lastpass[1][1][2] = 0
4864 23:45:03.461244 rx_firspass[1][1][3] = 0
4865 23:45:03.464601 rx_lastpass[1][1][3] = 0
4866 23:45:03.468175 rx_firspass[1][1][4] = 0
4867 23:45:03.468590 rx_lastpass[1][1][4] = 0
4868 23:45:03.471439 rx_firspass[1][1][5] = 0
4869 23:45:03.474659 rx_lastpass[1][1][5] = 0
4870 23:45:03.475104 rx_firspass[1][1][6] = 0
4871 23:45:03.478085 rx_lastpass[1][1][6] = 0
4872 23:45:03.480955 rx_firspass[1][1][7] = 0
4873 23:45:03.481363 rx_lastpass[1][1][7] = 0
4874 23:45:03.484512 rx_firspass[1][1][8] = 0
4875 23:45:03.487564 rx_lastpass[1][1][8] = 0
4876 23:45:03.487974 rx_firspass[1][1][9] = 0
4877 23:45:03.490796 rx_lastpass[1][1][9] = 0
4878 23:45:03.494040 rx_firspass[1][1][10] = 0
4879 23:45:03.497521 rx_lastpass[1][1][10] = 0
4880 23:45:03.497997 rx_firspass[1][1][11] = 0
4881 23:45:03.500814 rx_lastpass[1][1][11] = 0
4882 23:45:03.504174 rx_firspass[1][1][12] = 0
4883 23:45:03.507384 rx_lastpass[1][1][12] = 0
4884 23:45:03.507945 rx_firspass[1][1][13] = 0
4885 23:45:03.510690 rx_lastpass[1][1][13] = 0
4886 23:45:03.513880 rx_firspass[1][1][14] = 0
4887 23:45:03.514428 rx_lastpass[1][1][14] = 0
4888 23:45:03.517329 rx_firspass[1][1][15] = 0
4889 23:45:03.520366 rx_lastpass[1][1][15] = 0
4890 23:45:03.520862 dump params clk_delay
4891 23:45:03.523631 clk_delay[0] = 0
4892 23:45:03.524229 clk_delay[1] = 0
4893 23:45:03.527021 dump params dqs_delay
4894 23:45:03.530158 dqs_delay[0][0] = 0
4895 23:45:03.530625 dqs_delay[0][1] = 0
4896 23:45:03.533622 dqs_delay[1][0] = 0
4897 23:45:03.534140 dqs_delay[1][1] = 0
4898 23:45:03.536798 dump params delay_cell_unit = 744
4899 23:45:03.540116 dump source = 0x0
4900 23:45:03.540643 dump params frequency:800
4901 23:45:03.543288 dump params rank number:2
4902 23:45:03.543815
4903 23:45:03.546513 dump params write leveling
4904 23:45:03.549787 write leveling[0][0][0] = 0x0
4905 23:45:03.553341 write leveling[0][0][1] = 0x0
4906 23:45:03.553810 write leveling[0][1][0] = 0x0
4907 23:45:03.556396 write leveling[0][1][1] = 0x0
4908 23:45:03.559825 write leveling[1][0][0] = 0x0
4909 23:45:03.563234 write leveling[1][0][1] = 0x0
4910 23:45:03.566399 write leveling[1][1][0] = 0x0
4911 23:45:03.566827 write leveling[1][1][1] = 0x0
4912 23:45:03.569588 dump params cbt_cs
4913 23:45:03.570013 cbt_cs[0][0] = 0x0
4914 23:45:03.572775 cbt_cs[0][1] = 0x0
4915 23:45:03.576061 cbt_cs[1][0] = 0x0
4916 23:45:03.576484 cbt_cs[1][1] = 0x0
4917 23:45:03.579666 dump params cbt_mr12
4918 23:45:03.580094 cbt_mr12[0][0] = 0x0
4919 23:45:03.582443 cbt_mr12[0][1] = 0x0
4920 23:45:03.582926 cbt_mr12[1][0] = 0x0
4921 23:45:03.586156 cbt_mr12[1][1] = 0x0
4922 23:45:03.589202 dump params tx window
4923 23:45:03.589672 tx_center_min[0][0][0] = 0
4924 23:45:03.592592 tx_center_max[0][0][0] = 0
4925 23:45:03.595882 tx_center_min[0][0][1] = 0
4926 23:45:03.598935 tx_center_max[0][0][1] = 0
4927 23:45:03.599362 tx_center_min[0][1][0] = 0
4928 23:45:03.602246 tx_center_max[0][1][0] = 0
4929 23:45:03.605675 tx_center_min[0][1][1] = 0
4930 23:45:03.608965 tx_center_max[0][1][1] = 0
4931 23:45:03.609385 tx_center_min[1][0][0] = 0
4932 23:45:03.612089 tx_center_max[1][0][0] = 0
4933 23:45:03.615421 tx_center_min[1][0][1] = 0
4934 23:45:03.618801 tx_center_max[1][0][1] = 0
4935 23:45:03.619214 tx_center_min[1][1][0] = 0
4936 23:45:03.622053 tx_center_max[1][1][0] = 0
4937 23:45:03.625305 tx_center_min[1][1][1] = 0
4938 23:45:03.628811 tx_center_max[1][1][1] = 0
4939 23:45:03.629225 dump params tx window
4940 23:45:03.631915 tx_win_center[0][0][0] = 0
4941 23:45:03.635117 tx_first_pass[0][0][0] = 0
4942 23:45:03.635532 tx_last_pass[0][0][0] = 0
4943 23:45:03.638336 tx_win_center[0][0][1] = 0
4944 23:45:03.641687 tx_first_pass[0][0][1] = 0
4945 23:45:03.645001 tx_last_pass[0][0][1] = 0
4946 23:45:03.645569 tx_win_center[0][0][2] = 0
4947 23:45:03.648314 tx_first_pass[0][0][2] = 0
4948 23:45:03.651430 tx_last_pass[0][0][2] = 0
4949 23:45:03.654469 tx_win_center[0][0][3] = 0
4950 23:45:03.654975 tx_first_pass[0][0][3] = 0
4951 23:45:03.658096 tx_last_pass[0][0][3] = 0
4952 23:45:03.661236 tx_win_center[0][0][4] = 0
4953 23:45:03.664366 tx_first_pass[0][0][4] = 0
4954 23:45:03.664917 tx_last_pass[0][0][4] = 0
4955 23:45:03.667536 tx_win_center[0][0][5] = 0
4956 23:45:03.671098 tx_first_pass[0][0][5] = 0
4957 23:45:03.671600 tx_last_pass[0][0][5] = 0
4958 23:45:03.674429 tx_win_center[0][0][6] = 0
4959 23:45:03.677549 tx_first_pass[0][0][6] = 0
4960 23:45:03.680793 tx_last_pass[0][0][6] = 0
4961 23:45:03.681284 tx_win_center[0][0][7] = 0
4962 23:45:03.683864 tx_first_pass[0][0][7] = 0
4963 23:45:03.687123 tx_last_pass[0][0][7] = 0
4964 23:45:03.690682 tx_win_center[0][0][8] = 0
4965 23:45:03.691170 tx_first_pass[0][0][8] = 0
4966 23:45:03.693639 tx_last_pass[0][0][8] = 0
4967 23:45:03.696970 tx_win_center[0][0][9] = 0
4968 23:45:03.700283 tx_first_pass[0][0][9] = 0
4969 23:45:03.700756 tx_last_pass[0][0][9] = 0
4970 23:45:03.703720 tx_win_center[0][0][10] = 0
4971 23:45:03.707087 tx_first_pass[0][0][10] = 0
4972 23:45:03.710326 tx_last_pass[0][0][10] = 0
4973 23:45:03.710807 tx_win_center[0][0][11] = 0
4974 23:45:03.713586 tx_first_pass[0][0][11] = 0
4975 23:45:03.716838 tx_last_pass[0][0][11] = 0
4976 23:45:03.720146 tx_win_center[0][0][12] = 0
4977 23:45:03.720566 tx_first_pass[0][0][12] = 0
4978 23:45:03.723504 tx_last_pass[0][0][12] = 0
4979 23:45:03.726730 tx_win_center[0][0][13] = 0
4980 23:45:03.729939 tx_first_pass[0][0][13] = 0
4981 23:45:03.730406 tx_last_pass[0][0][13] = 0
4982 23:45:03.733232 tx_win_center[0][0][14] = 0
4983 23:45:03.736459 tx_first_pass[0][0][14] = 0
4984 23:45:03.739610 tx_last_pass[0][0][14] = 0
4985 23:45:03.740052 tx_win_center[0][0][15] = 0
4986 23:45:03.742789 tx_first_pass[0][0][15] = 0
4987 23:45:03.746285 tx_last_pass[0][0][15] = 0
4988 23:45:03.749571 tx_win_center[0][1][0] = 0
4989 23:45:03.752780 tx_first_pass[0][1][0] = 0
4990 23:45:03.753196 tx_last_pass[0][1][0] = 0
4991 23:45:03.756280 tx_win_center[0][1][1] = 0
4992 23:45:03.759386 tx_first_pass[0][1][1] = 0
4993 23:45:03.759801 tx_last_pass[0][1][1] = 0
4994 23:45:03.762694 tx_win_center[0][1][2] = 0
4995 23:45:03.766013 tx_first_pass[0][1][2] = 0
4996 23:45:03.769244 tx_last_pass[0][1][2] = 0
4997 23:45:03.769785 tx_win_center[0][1][3] = 0
4998 23:45:03.772681 tx_first_pass[0][1][3] = 0
4999 23:45:03.775622 tx_last_pass[0][1][3] = 0
5000 23:45:03.778936 tx_win_center[0][1][4] = 0
5001 23:45:03.779517 tx_first_pass[0][1][4] = 0
5002 23:45:03.782190 tx_last_pass[0][1][4] = 0
5003 23:45:03.785658 tx_win_center[0][1][5] = 0
5004 23:45:03.788920 tx_first_pass[0][1][5] = 0
5005 23:45:03.789665 tx_last_pass[0][1][5] = 0
5006 23:45:03.792140 tx_win_center[0][1][6] = 0
5007 23:45:03.795378 tx_first_pass[0][1][6] = 0
5008 23:45:03.795866 tx_last_pass[0][1][6] = 0
5009 23:45:03.798515 tx_win_center[0][1][7] = 0
5010 23:45:03.801782 tx_first_pass[0][1][7] = 0
5011 23:45:03.804952 tx_last_pass[0][1][7] = 0
5012 23:45:03.805364 tx_win_center[0][1][8] = 0
5013 23:45:03.808728 tx_first_pass[0][1][8] = 0
5014 23:45:03.811948 tx_last_pass[0][1][8] = 0
5015 23:45:03.815201 tx_win_center[0][1][9] = 0
5016 23:45:03.815620 tx_first_pass[0][1][9] = 0
5017 23:45:03.818499 tx_last_pass[0][1][9] = 0
5018 23:45:03.821559 tx_win_center[0][1][10] = 0
5019 23:45:03.824889 tx_first_pass[0][1][10] = 0
5020 23:45:03.825721 tx_last_pass[0][1][10] = 0
5021 23:45:03.828216 tx_win_center[0][1][11] = 0
5022 23:45:03.831562 tx_first_pass[0][1][11] = 0
5023 23:45:03.834858 tx_last_pass[0][1][11] = 0
5024 23:45:03.835264 tx_win_center[0][1][12] = 0
5025 23:45:03.838252 tx_first_pass[0][1][12] = 0
5026 23:45:03.841272 tx_last_pass[0][1][12] = 0
5027 23:45:03.844474 tx_win_center[0][1][13] = 0
5028 23:45:03.847666 tx_first_pass[0][1][13] = 0
5029 23:45:03.848111 tx_last_pass[0][1][13] = 0
5030 23:45:03.851039 tx_win_center[0][1][14] = 0
5031 23:45:03.854111 tx_first_pass[0][1][14] = 0
5032 23:45:03.857668 tx_last_pass[0][1][14] = 0
5033 23:45:03.858322 tx_win_center[0][1][15] = 0
5034 23:45:03.860846 tx_first_pass[0][1][15] = 0
5035 23:45:03.863934 tx_last_pass[0][1][15] = 0
5036 23:45:03.867428 tx_win_center[1][0][0] = 0
5037 23:45:03.867871 tx_first_pass[1][0][0] = 0
5038 23:45:03.870758 tx_last_pass[1][0][0] = 0
5039 23:45:03.873959 tx_win_center[1][0][1] = 0
5040 23:45:03.877487 tx_first_pass[1][0][1] = 0
5041 23:45:03.877950 tx_last_pass[1][0][1] = 0
5042 23:45:03.880483 tx_win_center[1][0][2] = 0
5043 23:45:03.883777 tx_first_pass[1][0][2] = 0
5044 23:45:03.884216 tx_last_pass[1][0][2] = 0
5045 23:45:03.887155 tx_win_center[1][0][3] = 0
5046 23:45:03.890363 tx_first_pass[1][0][3] = 0
5047 23:45:03.894008 tx_last_pass[1][0][3] = 0
5048 23:45:03.894419 tx_win_center[1][0][4] = 0
5049 23:45:03.896632 tx_first_pass[1][0][4] = 0
5050 23:45:03.900209 tx_last_pass[1][0][4] = 0
5051 23:45:03.903500 tx_win_center[1][0][5] = 0
5052 23:45:03.903927 tx_first_pass[1][0][5] = 0
5053 23:45:03.906670 tx_last_pass[1][0][5] = 0
5054 23:45:03.909829 tx_win_center[1][0][6] = 0
5055 23:45:03.913464 tx_first_pass[1][0][6] = 0
5056 23:45:03.913895 tx_last_pass[1][0][6] = 0
5057 23:45:03.916712 tx_win_center[1][0][7] = 0
5058 23:45:03.919573 tx_first_pass[1][0][7] = 0
5059 23:45:03.923307 tx_last_pass[1][0][7] = 0
5060 23:45:03.923738 tx_win_center[1][0][8] = 0
5061 23:45:03.926469 tx_first_pass[1][0][8] = 0
5062 23:45:03.929338 tx_last_pass[1][0][8] = 0
5063 23:45:03.932983 tx_win_center[1][0][9] = 0
5064 23:45:03.933401 tx_first_pass[1][0][9] = 0
5065 23:45:03.936256 tx_last_pass[1][0][9] = 0
5066 23:45:03.939303 tx_win_center[1][0][10] = 0
5067 23:45:03.942649 tx_first_pass[1][0][10] = 0
5068 23:45:03.943062 tx_last_pass[1][0][10] = 0
5069 23:45:03.945865 tx_win_center[1][0][11] = 0
5070 23:45:03.949134 tx_first_pass[1][0][11] = 0
5071 23:45:03.952405 tx_last_pass[1][0][11] = 0
5072 23:45:03.952821 tx_win_center[1][0][12] = 0
5073 23:45:03.956063 tx_first_pass[1][0][12] = 0
5074 23:45:03.959115 tx_last_pass[1][0][12] = 0
5075 23:45:03.962417 tx_win_center[1][0][13] = 0
5076 23:45:03.962830 tx_first_pass[1][0][13] = 0
5077 23:45:03.965623 tx_last_pass[1][0][13] = 0
5078 23:45:03.968879 tx_win_center[1][0][14] = 0
5079 23:45:03.972002 tx_first_pass[1][0][14] = 0
5080 23:45:03.972426 tx_last_pass[1][0][14] = 0
5081 23:45:03.975426 tx_win_center[1][0][15] = 0
5082 23:45:03.978977 tx_first_pass[1][0][15] = 0
5083 23:45:03.981862 tx_last_pass[1][0][15] = 0
5084 23:45:03.982279 tx_win_center[1][1][0] = 0
5085 23:45:03.985148 tx_first_pass[1][1][0] = 0
5086 23:45:03.988434 tx_last_pass[1][1][0] = 0
5087 23:45:03.991794 tx_win_center[1][1][1] = 0
5088 23:45:03.992259 tx_first_pass[1][1][1] = 0
5089 23:45:03.995075 tx_last_pass[1][1][1] = 0
5090 23:45:03.998131 tx_win_center[1][1][2] = 0
5091 23:45:04.001718 tx_first_pass[1][1][2] = 0
5092 23:45:04.002138 tx_last_pass[1][1][2] = 0
5093 23:45:04.004966 tx_win_center[1][1][3] = 0
5094 23:45:04.008169 tx_first_pass[1][1][3] = 0
5095 23:45:04.011442 tx_last_pass[1][1][3] = 0
5096 23:45:04.011983 tx_win_center[1][1][4] = 0
5097 23:45:04.014789 tx_first_pass[1][1][4] = 0
5098 23:45:04.017852 tx_last_pass[1][1][4] = 0
5099 23:45:04.021396 tx_win_center[1][1][5] = 0
5100 23:45:04.022051 tx_first_pass[1][1][5] = 0
5101 23:45:04.024653 tx_last_pass[1][1][5] = 0
5102 23:45:04.027840 tx_win_center[1][1][6] = 0
5103 23:45:04.028269 tx_first_pass[1][1][6] = 0
5104 23:45:04.031094 tx_last_pass[1][1][6] = 0
5105 23:45:04.034193 tx_win_center[1][1][7] = 0
5106 23:45:04.037974 tx_first_pass[1][1][7] = 0
5107 23:45:04.038392 tx_last_pass[1][1][7] = 0
5108 23:45:04.040665 tx_win_center[1][1][8] = 0
5109 23:45:04.044122 tx_first_pass[1][1][8] = 0
5110 23:45:04.047265 tx_last_pass[1][1][8] = 0
5111 23:45:04.047699 tx_win_center[1][1][9] = 0
5112 23:45:04.050650 tx_first_pass[1][1][9] = 0
5113 23:45:04.053830 tx_last_pass[1][1][9] = 0
5114 23:45:04.057161 tx_win_center[1][1][10] = 0
5115 23:45:04.057607 tx_first_pass[1][1][10] = 0
5116 23:45:04.060556 tx_last_pass[1][1][10] = 0
5117 23:45:04.063725 tx_win_center[1][1][11] = 0
5118 23:45:04.067123 tx_first_pass[1][1][11] = 0
5119 23:45:04.067535 tx_last_pass[1][1][11] = 0
5120 23:45:04.070412 tx_win_center[1][1][12] = 0
5121 23:45:04.073542 tx_first_pass[1][1][12] = 0
5122 23:45:04.076805 tx_last_pass[1][1][12] = 0
5123 23:45:04.077217 tx_win_center[1][1][13] = 0
5124 23:45:04.080363 tx_first_pass[1][1][13] = 0
5125 23:45:04.083470 tx_last_pass[1][1][13] = 0
5126 23:45:04.086735 tx_win_center[1][1][14] = 0
5127 23:45:04.089802 tx_first_pass[1][1][14] = 0
5128 23:45:04.090218 tx_last_pass[1][1][14] = 0
5129 23:45:04.093298 tx_win_center[1][1][15] = 0
5130 23:45:04.096215 tx_first_pass[1][1][15] = 0
5131 23:45:04.099545 tx_last_pass[1][1][15] = 0
5132 23:45:04.099986 dump params rx window
5133 23:45:04.102823 rx_firspass[0][0][0] = 0
5134 23:45:04.106374 rx_lastpass[0][0][0] = 0
5135 23:45:04.106850 rx_firspass[0][0][1] = 0
5136 23:45:04.109413 rx_lastpass[0][0][1] = 0
5137 23:45:04.112813 rx_firspass[0][0][2] = 0
5138 23:45:04.113359 rx_lastpass[0][0][2] = 0
5139 23:45:04.115860 rx_firspass[0][0][3] = 0
5140 23:45:04.119251 rx_lastpass[0][0][3] = 0
5141 23:45:04.119656 rx_firspass[0][0][4] = 0
5142 23:45:04.122560 rx_lastpass[0][0][4] = 0
5143 23:45:04.125692 rx_firspass[0][0][5] = 0
5144 23:45:04.129286 rx_lastpass[0][0][5] = 0
5145 23:45:04.129737 rx_firspass[0][0][6] = 0
5146 23:45:04.132465 rx_lastpass[0][0][6] = 0
5147 23:45:04.135764 rx_firspass[0][0][7] = 0
5148 23:45:04.136206 rx_lastpass[0][0][7] = 0
5149 23:45:04.138885 rx_firspass[0][0][8] = 0
5150 23:45:04.142366 rx_lastpass[0][0][8] = 0
5151 23:45:04.142983 rx_firspass[0][0][9] = 0
5152 23:45:04.145692 rx_lastpass[0][0][9] = 0
5153 23:45:04.148664 rx_firspass[0][0][10] = 0
5154 23:45:04.152214 rx_lastpass[0][0][10] = 0
5155 23:45:04.152717 rx_firspass[0][0][11] = 0
5156 23:45:04.155249 rx_lastpass[0][0][11] = 0
5157 23:45:04.158477 rx_firspass[0][0][12] = 0
5158 23:45:04.158907 rx_lastpass[0][0][12] = 0
5159 23:45:04.162106 rx_firspass[0][0][13] = 0
5160 23:45:04.165235 rx_lastpass[0][0][13] = 0
5161 23:45:04.168263 rx_firspass[0][0][14] = 0
5162 23:45:04.168683 rx_lastpass[0][0][14] = 0
5163 23:45:04.171486 rx_firspass[0][0][15] = 0
5164 23:45:04.174900 rx_lastpass[0][0][15] = 0
5165 23:45:04.178500 rx_firspass[0][1][0] = 0
5166 23:45:04.178965 rx_lastpass[0][1][0] = 0
5167 23:45:04.181722 rx_firspass[0][1][1] = 0
5168 23:45:04.184711 rx_lastpass[0][1][1] = 0
5169 23:45:04.185154 rx_firspass[0][1][2] = 0
5170 23:45:04.188004 rx_lastpass[0][1][2] = 0
5171 23:45:04.191208 rx_firspass[0][1][3] = 0
5172 23:45:04.191341 rx_lastpass[0][1][3] = 0
5173 23:45:04.194138 rx_firspass[0][1][4] = 0
5174 23:45:04.197287 rx_lastpass[0][1][4] = 0
5175 23:45:04.200516 rx_firspass[0][1][5] = 0
5176 23:45:04.200606 rx_lastpass[0][1][5] = 0
5177 23:45:04.204002 rx_firspass[0][1][6] = 0
5178 23:45:04.207250 rx_lastpass[0][1][6] = 0
5179 23:45:04.207342 rx_firspass[0][1][7] = 0
5180 23:45:04.210830 rx_lastpass[0][1][7] = 0
5181 23:45:04.213917 rx_firspass[0][1][8] = 0
5182 23:45:04.214015 rx_lastpass[0][1][8] = 0
5183 23:45:04.217302 rx_firspass[0][1][9] = 0
5184 23:45:04.220458 rx_lastpass[0][1][9] = 0
5185 23:45:04.223748 rx_firspass[0][1][10] = 0
5186 23:45:04.223839 rx_lastpass[0][1][10] = 0
5187 23:45:04.226995 rx_firspass[0][1][11] = 0
5188 23:45:04.230426 rx_lastpass[0][1][11] = 0
5189 23:45:04.230502 rx_firspass[0][1][12] = 0
5190 23:45:04.233292 rx_lastpass[0][1][12] = 0
5191 23:45:04.236770 rx_firspass[0][1][13] = 0
5192 23:45:04.240125 rx_lastpass[0][1][13] = 0
5193 23:45:04.240215 rx_firspass[0][1][14] = 0
5194 23:45:04.243160 rx_lastpass[0][1][14] = 0
5195 23:45:04.246418 rx_firspass[0][1][15] = 0
5196 23:45:04.249833 rx_lastpass[0][1][15] = 0
5197 23:45:04.249925 rx_firspass[1][0][0] = 0
5198 23:45:04.253096 rx_lastpass[1][0][0] = 0
5199 23:45:04.256317 rx_firspass[1][0][1] = 0
5200 23:45:04.256404 rx_lastpass[1][0][1] = 0
5201 23:45:04.259472 rx_firspass[1][0][2] = 0
5202 23:45:04.262953 rx_lastpass[1][0][2] = 0
5203 23:45:04.263046 rx_firspass[1][0][3] = 0
5204 23:45:04.266149 rx_lastpass[1][0][3] = 0
5205 23:45:04.269265 rx_firspass[1][0][4] = 0
5206 23:45:04.269357 rx_lastpass[1][0][4] = 0
5207 23:45:04.272533 rx_firspass[1][0][5] = 0
5208 23:45:04.275886 rx_lastpass[1][0][5] = 0
5209 23:45:04.279243 rx_firspass[1][0][6] = 0
5210 23:45:04.279337 rx_lastpass[1][0][6] = 0
5211 23:45:04.282338 rx_firspass[1][0][7] = 0
5212 23:45:04.285554 rx_lastpass[1][0][7] = 0
5213 23:45:04.285650 rx_firspass[1][0][8] = 0
5214 23:45:04.289179 rx_lastpass[1][0][8] = 0
5215 23:45:04.292407 rx_firspass[1][0][9] = 0
5216 23:45:04.292501 rx_lastpass[1][0][9] = 0
5217 23:45:04.295570 rx_firspass[1][0][10] = 0
5218 23:45:04.298782 rx_lastpass[1][0][10] = 0
5219 23:45:04.302032 rx_firspass[1][0][11] = 0
5220 23:45:04.302141 rx_lastpass[1][0][11] = 0
5221 23:45:04.305448 rx_firspass[1][0][12] = 0
5222 23:45:04.308832 rx_lastpass[1][0][12] = 0
5223 23:45:04.311930 rx_firspass[1][0][13] = 0
5224 23:45:04.312021 rx_lastpass[1][0][13] = 0
5225 23:45:04.315409 rx_firspass[1][0][14] = 0
5226 23:45:04.318684 rx_lastpass[1][0][14] = 0
5227 23:45:04.318774 rx_firspass[1][0][15] = 0
5228 23:45:04.321924 rx_lastpass[1][0][15] = 0
5229 23:45:04.324909 rx_firspass[1][1][0] = 0
5230 23:45:04.328201 rx_lastpass[1][1][0] = 0
5231 23:45:04.328292 rx_firspass[1][1][1] = 0
5232 23:45:04.331869 rx_lastpass[1][1][1] = 0
5233 23:45:04.335080 rx_firspass[1][1][2] = 0
5234 23:45:04.335170 rx_lastpass[1][1][2] = 0
5235 23:45:04.338159 rx_firspass[1][1][3] = 0
5236 23:45:04.341338 rx_lastpass[1][1][3] = 0
5237 23:45:04.341467 rx_firspass[1][1][4] = 0
5238 23:45:04.344759 rx_lastpass[1][1][4] = 0
5239 23:45:04.347850 rx_firspass[1][1][5] = 0
5240 23:45:04.351302 rx_lastpass[1][1][5] = 0
5241 23:45:04.351392 rx_firspass[1][1][6] = 0
5242 23:45:04.354407 rx_lastpass[1][1][6] = 0
5243 23:45:04.357823 rx_firspass[1][1][7] = 0
5244 23:45:04.357913 rx_lastpass[1][1][7] = 0
5245 23:45:04.360912 rx_firspass[1][1][8] = 0
5246 23:45:04.364507 rx_lastpass[1][1][8] = 0
5247 23:45:04.364598 rx_firspass[1][1][9] = 0
5248 23:45:04.367843 rx_lastpass[1][1][9] = 0
5249 23:45:04.370906 rx_firspass[1][1][10] = 0
5250 23:45:04.374275 rx_lastpass[1][1][10] = 0
5251 23:45:04.374365 rx_firspass[1][1][11] = 0
5252 23:45:04.377312 rx_lastpass[1][1][11] = 0
5253 23:45:04.380642 rx_firspass[1][1][12] = 0
5254 23:45:04.380761 rx_lastpass[1][1][12] = 0
5255 23:45:04.383971 rx_firspass[1][1][13] = 0
5256 23:45:04.387123 rx_lastpass[1][1][13] = 0
5257 23:45:04.390578 rx_firspass[1][1][14] = 0
5258 23:45:04.390675 rx_lastpass[1][1][14] = 0
5259 23:45:04.393822 rx_firspass[1][1][15] = 0
5260 23:45:04.397008 rx_lastpass[1][1][15] = 0
5261 23:45:04.397094 dump params clk_delay
5262 23:45:04.400488 clk_delay[0] = 0
5263 23:45:04.400575 clk_delay[1] = 0
5264 23:45:04.403451 dump params dqs_delay
5265 23:45:04.403541 dqs_delay[0][0] = 0
5266 23:45:04.407070 dqs_delay[0][1] = 0
5267 23:45:04.410253 dqs_delay[1][0] = 0
5268 23:45:04.410336 dqs_delay[1][1] = 0
5269 23:45:04.413471 dump params delay_cell_unit = 744
5270 23:45:04.416614 mt_set_emi_preloader end
5271 23:45:04.420012 [mt_mem_init] dram size: 0x100000000, rank number: 2
5272 23:45:04.426350 [complex_mem_test] start addr:0x40000000, len:20480
5273 23:45:04.461814 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5274 23:45:04.468270 [complex_mem_test] start addr:0x80000000, len:20480
5275 23:45:04.503906 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5276 23:45:04.510597 [complex_mem_test] start addr:0xc0000000, len:20480
5277 23:45:04.546349 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5278 23:45:04.552762 [complex_mem_test] start addr:0x56000000, len:8192
5279 23:45:04.569662 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5280 23:45:04.573129 ddr_geometry:1
5281 23:45:04.576115 [complex_mem_test] start addr:0x80000000, len:8192
5282 23:45:04.593548 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5283 23:45:04.596702 dram_init: dram init end (result: 0)
5284 23:45:04.603098 Successfully loaded DRAM blobs and ran DRAM calibration
5285 23:45:04.612972 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5286 23:45:04.613085 CBMEM:
5287 23:45:04.616453 IMD: root @ 00000000fffff000 254 entries.
5288 23:45:04.619254 IMD: root @ 00000000ffffec00 62 entries.
5289 23:45:04.626399 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5290 23:45:04.632713 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5291 23:45:04.635983 in-header: 03 a1 00 00 08 00 00 00
5292 23:45:04.639592 in-data: 84 60 60 10 00 00 00 00
5293 23:45:04.642795 Chrome EC: clear events_b mask to 0x0000000020004000
5294 23:45:04.649125 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5295 23:45:04.652807 in-header: 03 fd 00 00 00 00 00 00
5296 23:45:04.656396 in-data:
5297 23:45:04.659608 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5298 23:45:04.662649 CBFS @ 21000 size 3d4000
5299 23:45:04.665906 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5300 23:45:04.669514 CBFS: Locating 'fallback/ramstage'
5301 23:45:04.672432 CBFS: Found @ offset 10d40 size d563
5302 23:45:04.695244 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5303 23:45:04.707403 Accumulated console time in romstage 13568 ms
5304 23:45:04.707503
5305 23:45:04.707604
5306 23:45:04.717310 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5307 23:45:04.720340 ARM64: Exception handlers installed.
5308 23:45:04.720427 ARM64: Testing exception
5309 23:45:04.723941 ARM64: Done test exception
5310 23:45:04.726756 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5311 23:45:04.730405 Manufacturer: ef
5312 23:45:04.736931 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5313 23:45:04.739947 WARNING: RO_VPD is uninitialized or empty.
5314 23:45:04.743109 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5315 23:45:04.746690 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5316 23:45:04.756972 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5317 23:45:04.760171 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5318 23:45:04.767029 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5319 23:45:04.767121 Enumerating buses...
5320 23:45:04.773331 Show all devs... Before device enumeration.
5321 23:45:04.773460 Root Device: enabled 1
5322 23:45:04.776862 CPU_CLUSTER: 0: enabled 1
5323 23:45:04.780044 CPU: 00: enabled 1
5324 23:45:04.780129 Compare with tree...
5325 23:45:04.783190 Root Device: enabled 1
5326 23:45:04.783277 CPU_CLUSTER: 0: enabled 1
5327 23:45:04.786568 CPU: 00: enabled 1
5328 23:45:04.789797 Root Device scanning...
5329 23:45:04.793007 root_dev_scan_bus for Root Device
5330 23:45:04.793095 CPU_CLUSTER: 0 enabled
5331 23:45:04.796418 root_dev_scan_bus for Root Device done
5332 23:45:04.802764 scan_bus: scanning of bus Root Device took 10689 usecs
5333 23:45:04.802852 done
5334 23:45:04.806135 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5335 23:45:04.809598 Allocating resources...
5336 23:45:04.812855 Reading resources...
5337 23:45:04.816064 Root Device read_resources bus 0 link: 0
5338 23:45:04.819393 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5339 23:45:04.822595 CPU: 00 missing read_resources
5340 23:45:04.825784 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5341 23:45:04.828972 Root Device read_resources bus 0 link: 0 done
5342 23:45:04.832244 Done reading resources.
5343 23:45:04.835938 Show resources in subtree (Root Device)...After reading.
5344 23:45:04.842162 Root Device child on link 0 CPU_CLUSTER: 0
5345 23:45:04.845360 CPU_CLUSTER: 0 child on link 0 CPU: 00
5346 23:45:04.851951 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5347 23:45:04.855564 CPU: 00
5348 23:45:04.855685 Setting resources...
5349 23:45:04.862140 Root Device assign_resources, bus 0 link: 0
5350 23:45:04.865344 CPU_CLUSTER: 0 missing set_resources
5351 23:45:04.868676 Root Device assign_resources, bus 0 link: 0
5352 23:45:04.868764 Done setting resources.
5353 23:45:04.875029 Show resources in subtree (Root Device)...After assigning values.
5354 23:45:04.878159 Root Device child on link 0 CPU_CLUSTER: 0
5355 23:45:04.881650 CPU_CLUSTER: 0 child on link 0 CPU: 00
5356 23:45:04.891555 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5357 23:45:04.891672 CPU: 00
5358 23:45:04.894764 Done allocating resources.
5359 23:45:04.901308 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5360 23:45:04.901422 Enabling resources...
5361 23:45:04.901502 done.
5362 23:45:04.907794 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5363 23:45:04.907905 Initializing devices...
5364 23:45:04.911005 Root Device init ...
5365 23:45:04.914556 mainboard_init: Starting display init.
5366 23:45:04.917381 ADC[4]: Raw value=76192 ID=0
5367 23:45:04.939928 anx7625_power_on_init: Init interface.
5368 23:45:04.943150 anx7625_disable_pd_protocol: Disabled PD feature.
5369 23:45:04.949539 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5370 23:45:05.007027 anx7625_start_dp_work: Secure OCM version=00
5371 23:45:05.009955 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5372 23:45:05.027461 sp_tx_get_edid_block: EDID Block = 1
5373 23:45:05.144485 Extracted contents:
5374 23:45:05.148043 header: 00 ff ff ff ff ff ff 00
5375 23:45:05.150987 serial number: 06 af 5c 14 00 00 00 00 00 1a
5376 23:45:05.154509 version: 01 04
5377 23:45:05.157697 basic params: 95 1a 0e 78 02
5378 23:45:05.160964 chroma info: 99 85 95 55 56 92 28 22 50 54
5379 23:45:05.164090 established: 00 00 00
5380 23:45:05.170790 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5381 23:45:05.177223 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5382 23:45:05.180721 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5383 23:45:05.187338 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5384 23:45:05.193827 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5385 23:45:05.197190 extensions: 00
5386 23:45:05.197622 checksum: ae
5387 23:45:05.197902
5388 23:45:05.203737 Manufacturer: AUO Model 145c Serial Number 0
5389 23:45:05.204346 Made week 0 of 2016
5390 23:45:05.206825 EDID version: 1.4
5391 23:45:05.207389 Digital display
5392 23:45:05.210068 6 bits per primary color channel
5393 23:45:05.213401 DisplayPort interface
5394 23:45:05.216659 Maximum image size: 26 cm x 14 cm
5395 23:45:05.217070 Gamma: 220%
5396 23:45:05.217663 Check DPMS levels
5397 23:45:05.220052 Supported color formats: RGB 4:4:4
5398 23:45:05.226797 First detailed timing is preferred timing
5399 23:45:05.227209 Established timings supported:
5400 23:45:05.229975 Standard timings supported:
5401 23:45:05.233127 Detailed timings
5402 23:45:05.236480 Hex of detail: ce1d56ea50001a3030204600009010000018
5403 23:45:05.242877 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5404 23:45:05.246161 0556 0586 05a6 0640 hborder 0
5405 23:45:05.249543 0300 0304 030a 031a vborder 0
5406 23:45:05.252861 -hsync -vsync
5407 23:45:05.253304 Did detailed timing
5408 23:45:05.259546 Hex of detail: 0000000f0000000000000000000000000020
5409 23:45:05.262768 Manufacturer-specified data, tag 15
5410 23:45:05.266087 Hex of detail: 000000fe0041554f0a202020202020202020
5411 23:45:05.269114 ASCII string: AUO
5412 23:45:05.272582 Hex of detail: 000000fe004231313658414230312e34200a
5413 23:45:05.275703 ASCII string: B116XAB01.4
5414 23:45:05.276184 Checksum
5415 23:45:05.278908 Checksum: 0xae (valid)
5416 23:45:05.282444 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5417 23:45:05.285774 DSI data_rate: 457800000 bps
5418 23:45:05.292253 anx7625_parse_edid: set default k value to 0x3d for panel
5419 23:45:05.295552 anx7625_parse_edid: pixelclock(76300).
5420 23:45:05.298652 hactive(1366), hsync(32), hfp(48), hbp(154)
5421 23:45:05.302270 vactive(768), vsync(6), vfp(4), vbp(16)
5422 23:45:05.305362 anx7625_dsi_config: config dsi.
5423 23:45:05.313060 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5424 23:45:05.333664 anx7625_dsi_config: success to config DSI
5425 23:45:05.336866 anx7625_dp_start: MIPI phy setup OK.
5426 23:45:05.340239 [SSUSB] Setting up USB HOST controller...
5427 23:45:05.343389 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5428 23:45:05.346615 [SSUSB] phy power-on done.
5429 23:45:05.350317 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5430 23:45:05.353486 in-header: 03 fc 01 00 00 00 00 00
5431 23:45:05.353598 in-data:
5432 23:45:05.359995 handle_proto3_response: EC response with error code: 1
5433 23:45:05.360126 SPM: pcm index = 1
5434 23:45:05.366638 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5435 23:45:05.366755 CBFS @ 21000 size 3d4000
5436 23:45:05.373265 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5437 23:45:05.376460 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5438 23:45:05.379612 CBFS: Found @ offset 1e7c0 size 1026
5439 23:45:05.386489 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5440 23:45:05.389689 SPM: binary array size = 2988
5441 23:45:05.393102 SPM: version = pcm_allinone_v1.17.2_20180829
5442 23:45:05.396137 SPM binary loaded in 32 msecs
5443 23:45:05.404871 spm_kick_im_to_fetch: ptr = 000000004021eec2
5444 23:45:05.407970 spm_kick_im_to_fetch: len = 2988
5445 23:45:05.408054 SPM: spm_kick_pcm_to_run
5446 23:45:05.411574 SPM: spm_kick_pcm_to_run done
5447 23:45:05.414564 SPM: spm_init done in 52 msecs
5448 23:45:05.417865 Root Device init finished in 505262 usecs
5449 23:45:05.421366 CPU_CLUSTER: 0 init ...
5450 23:45:05.431037 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5451 23:45:05.434187 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5452 23:45:05.437406 CBFS @ 21000 size 3d4000
5453 23:45:05.440998 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5454 23:45:05.444111 CBFS: Locating 'sspm.bin'
5455 23:45:05.447470 CBFS: Found @ offset 208c0 size 41cb
5456 23:45:05.458215 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5457 23:45:05.465763 CPU_CLUSTER: 0 init finished in 42800 usecs
5458 23:45:05.465885 Devices initialized
5459 23:45:05.469110 Show all devs... After init.
5460 23:45:05.472508 Root Device: enabled 1
5461 23:45:05.472593 CPU_CLUSTER: 0: enabled 1
5462 23:45:05.475826 CPU: 00: enabled 1
5463 23:45:05.479140 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5464 23:45:05.485586 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5465 23:45:05.488889 ELOG: NV offset 0x558000 size 0x1000
5466 23:45:05.492016 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5467 23:45:05.498739 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5468 23:45:05.505123 ELOG: Event(17) added with size 13 at 2024-06-04 23:45:05 UTC
5469 23:45:05.508440 out: cmd=0x121: 03 db 21 01 00 00 00 00
5470 23:45:05.511803 in-header: 03 70 00 00 2c 00 00 00
5471 23:45:05.524924 in-data: 1f 49 00 00 00 00 00 00 22 10 00 00 06 80 00 00 23 8f 07 00 06 80 00 00 f6 13 1f 00 06 80 00 00 d5 bd 00 00 06 80 00 00 47 f4 01 00
5472 23:45:05.528115 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5473 23:45:05.531431 in-header: 03 19 00 00 08 00 00 00
5474 23:45:05.534507 in-data: a2 e0 47 00 13 00 00 00
5475 23:45:05.537821 Chrome EC: UHEPI supported
5476 23:45:05.544271 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5477 23:45:05.547477 in-header: 03 e1 00 00 08 00 00 00
5478 23:45:05.551012 in-data: 84 20 60 10 00 00 00 00
5479 23:45:05.554079 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5480 23:45:05.560818 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5481 23:45:05.564183 in-header: 03 e1 00 00 08 00 00 00
5482 23:45:05.567478 in-data: 84 20 60 10 00 00 00 00
5483 23:45:05.573763 ELOG: Event(A1) added with size 10 at 2024-06-04 23:45:05 UTC
5484 23:45:05.580298 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5485 23:45:05.583667 ELOG: Event(A0) added with size 9 at 2024-06-04 23:45:05 UTC
5486 23:45:05.590021 elog_add_boot_reason: Logged dev mode boot
5487 23:45:05.590110 Finalize devices...
5488 23:45:05.593202 Devices finalized
5489 23:45:05.596650 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5490 23:45:05.599877 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5491 23:45:05.606372 ELOG: Event(91) added with size 10 at 2024-06-04 23:45:05 UTC
5492 23:45:05.609590 Writing coreboot table at 0xffeda000
5493 23:45:05.612929 0. 0000000000114000-000000000011efff: RAMSTAGE
5494 23:45:05.619400 1. 0000000040000000-000000004023cfff: RAMSTAGE
5495 23:45:05.622940 2. 000000004023d000-00000000545fffff: RAM
5496 23:45:05.626209 3. 0000000054600000-000000005465ffff: BL31
5497 23:45:05.629467 4. 0000000054660000-00000000ffed9fff: RAM
5498 23:45:05.636110 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5499 23:45:05.639395 6. 0000000100000000-000000013fffffff: RAM
5500 23:45:05.642505 Passing 5 GPIOs to payload:
5501 23:45:05.645666 NAME | PORT | POLARITY | VALUE
5502 23:45:05.652329 write protect | 0x00000096 | low | high
5503 23:45:05.655569 EC in RW | 0x000000b1 | high | undefined
5504 23:45:05.658775 EC interrupt | 0x00000097 | low | undefined
5505 23:45:05.665220 TPM interrupt | 0x00000099 | high | undefined
5506 23:45:05.668395 speaker enable | 0x000000af | high | undefined
5507 23:45:05.672046 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5508 23:45:05.675114 in-header: 03 f7 00 00 02 00 00 00
5509 23:45:05.678437 in-data: 04 00
5510 23:45:05.678528 Board ID: 4
5511 23:45:05.681603 ADC[3]: Raw value=215404 ID=1
5512 23:45:05.681694 RAM code: 1
5513 23:45:05.684840 SKU ID: 16
5514 23:45:05.688191 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5515 23:45:05.691363 CBFS @ 21000 size 3d4000
5516 23:45:05.694708 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5517 23:45:05.701362 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 5784
5518 23:45:05.704361 coreboot table: 940 bytes.
5519 23:45:05.708012 IMD ROOT 0. 00000000fffff000 00001000
5520 23:45:05.710838 IMD SMALL 1. 00000000ffffe000 00001000
5521 23:45:05.714168 CONSOLE 2. 00000000fffde000 00020000
5522 23:45:05.717494 FMAP 3. 00000000fffdd000 0000047c
5523 23:45:05.724251 TIME STAMP 4. 00000000fffdc000 00000910
5524 23:45:05.727388 RAMOOPS 5. 00000000ffedc000 00100000
5525 23:45:05.730865 COREBOOT 6. 00000000ffeda000 00002000
5526 23:45:05.730981 IMD small region:
5527 23:45:05.733838 IMD ROOT 0. 00000000ffffec00 00000400
5528 23:45:05.740383 VBOOT WORK 1. 00000000ffffeb00 00000100
5529 23:45:05.743766 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5530 23:45:05.747032 VPD 3. 00000000ffffea60 0000006c
5531 23:45:05.750263 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5532 23:45:05.756891 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5533 23:45:05.760112 in-header: 03 e1 00 00 08 00 00 00
5534 23:45:05.763359 in-data: 84 20 60 10 00 00 00 00
5535 23:45:05.770055 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5536 23:45:05.770169 CBFS @ 21000 size 3d4000
5537 23:45:05.776471 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5538 23:45:05.779700 CBFS: Locating 'fallback/payload'
5539 23:45:05.787667 CBFS: Found @ offset dc040 size 439a0
5540 23:45:05.875680 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5541 23:45:05.879023 Checking segment from ROM address 0x0000000040003a00
5542 23:45:05.885449 Checking segment from ROM address 0x0000000040003a1c
5543 23:45:05.888786 Loading segment from ROM address 0x0000000040003a00
5544 23:45:05.892079 code (compression=0)
5545 23:45:05.901828 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5546 23:45:05.908229 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5547 23:45:05.911331 it's not compressed!
5548 23:45:05.914832 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5549 23:45:05.921183 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5550 23:45:05.929913 Loading segment from ROM address 0x0000000040003a1c
5551 23:45:05.933205 Entry Point 0x0000000080000000
5552 23:45:05.933313 Loaded segments
5553 23:45:05.939480 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5554 23:45:05.942819 Jumping to boot code at 0000000080000000(00000000ffeda000)
5555 23:45:05.952744 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5556 23:45:05.959116 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5557 23:45:05.959215 CBFS @ 21000 size 3d4000
5558 23:45:05.965850 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5559 23:45:05.968960 CBFS: Locating 'fallback/bl31'
5560 23:45:05.972356 CBFS: Found @ offset 36dc0 size 5820
5561 23:45:05.983554 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5562 23:45:05.986905 Checking segment from ROM address 0x0000000040003a00
5563 23:45:05.993332 Checking segment from ROM address 0x0000000040003a1c
5564 23:45:05.996793 Loading segment from ROM address 0x0000000040003a00
5565 23:45:05.999952 code (compression=1)
5566 23:45:06.009718 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5567 23:45:06.016310 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5568 23:45:06.016442 using LZMA
5569 23:45:06.025537 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5570 23:45:06.032178 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5571 23:45:06.035384 Loading segment from ROM address 0x0000000040003a1c
5572 23:45:06.038694 Entry Point 0x0000000054601000
5573 23:45:06.038791 Loaded segments
5574 23:45:06.041806 NOTICE: MT8183 bl31_setup
5575 23:45:06.049286 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5576 23:45:06.052595 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5577 23:45:06.055850 INFO: [DEVAPC] dump DEVAPC registers:
5578 23:45:06.065464 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5579 23:45:06.072354 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5580 23:45:06.081991 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5581 23:45:06.088549 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5582 23:45:06.098270 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5583 23:45:06.104784 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5584 23:45:06.114787 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5585 23:45:06.121039 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5586 23:45:06.130927 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5587 23:45:06.137577 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5588 23:45:06.147481 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5589 23:45:06.153921 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5590 23:45:06.163482 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5591 23:45:06.170158 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5592 23:45:06.176754 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5593 23:45:06.186795 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5594 23:45:06.193036 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5595 23:45:06.199545 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5596 23:45:06.206229 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5597 23:45:06.216177 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5598 23:45:06.222525 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5599 23:45:06.229185 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5600 23:45:06.232374 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5601 23:45:06.235555 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5602 23:45:06.239066 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5603 23:45:06.242210 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5604 23:45:06.245523 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5605 23:45:06.252319 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5606 23:45:06.255484 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5607 23:45:06.258966 WARNING: region 0:
5608 23:45:06.262044 WARNING: apc:0x168, sa:0x0, ea:0xfff
5609 23:45:06.265460 WARNING: region 1:
5610 23:45:06.268646 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5611 23:45:06.268741 WARNING: region 2:
5612 23:45:06.271813 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5613 23:45:06.275348 WARNING: region 3:
5614 23:45:06.278606 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5615 23:45:06.281809 WARNING: region 4:
5616 23:45:06.284962 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5617 23:45:06.285075 WARNING: region 5:
5618 23:45:06.288393 WARNING: apc:0x0, sa:0x0, ea:0x0
5619 23:45:06.291600 WARNING: region 6:
5620 23:45:06.294769 WARNING: apc:0x0, sa:0x0, ea:0x0
5621 23:45:06.294881 WARNING: region 7:
5622 23:45:06.297928 WARNING: apc:0x0, sa:0x0, ea:0x0
5623 23:45:06.304578 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5624 23:45:06.307996 INFO: SPM: enable SPMC mode
5625 23:45:06.311288 NOTICE: spm_boot_init() start
5626 23:45:06.314288 NOTICE: spm_boot_init() end
5627 23:45:06.317550 INFO: BL31: Initializing runtime services
5628 23:45:06.324363 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5629 23:45:06.327455 INFO: BL31: Preparing for EL3 exit to normal world
5630 23:45:06.330824 INFO: Entry point address = 0x80000000
5631 23:45:06.333815 INFO: SPSR = 0x8
5632 23:45:06.355635
5633 23:45:06.355734
5634 23:45:06.355807
5635 23:45:06.356304 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5636 23:45:06.356415 start: 2.2.4 bootloader-commands (timeout 00:04:20) [common]
5637 23:45:06.356513 Setting prompt string to ['jacuzzi:']
5638 23:45:06.356614 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:20)
5639 23:45:06.358960 Starting depthcharge on Juniper...
5640 23:45:06.359046
5641 23:45:06.362190 vboot_handoff: creating legacy vboot_handoff structure
5642 23:45:06.362270
5643 23:45:06.365401 ec_init(0): CrosEC protocol v3 supported (544, 544)
5644 23:45:06.368839
5645 23:45:06.368920 Wipe memory regions:
5646 23:45:06.368989
5647 23:45:06.372003 [0x00000040000000, 0x00000054600000)
5648 23:45:06.415327
5649 23:45:06.415547 [0x00000054660000, 0x00000080000000)
5650 23:45:06.506584
5651 23:45:06.506748 [0x000000811994a0, 0x000000ffeda000)
5652 23:45:06.766134
5653 23:45:06.766284 [0x00000100000000, 0x00000140000000)
5654 23:45:06.898654
5655 23:45:06.902034 Initializing XHCI USB controller at 0x11200000.
5656 23:45:06.925163
5657 23:45:06.928296 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5658 23:45:06.928395
5659 23:45:06.928467
5660 23:45:06.928764 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5662 23:45:07.029345 jacuzzi: tftpboot 192.168.201.1 14172955/tftp-deploy-74mqdctt/kernel/image.itb 14172955/tftp-deploy-74mqdctt/kernel/cmdline
5663 23:45:07.029929 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5664 23:45:07.030319 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:19)
5665 23:45:07.034536 tftpboot 192.168.201.1 14172955/tftp-deploy-74mqdctt/kernel/image.itp-deploy-74mqdctt/kernel/cmdline
5666 23:45:07.034957
5667 23:45:07.035282 Waiting for link
5668 23:45:07.438848
5669 23:45:07.439040 R8152: Initializing
5670 23:45:07.439143
5671 23:45:07.442453 Version 9 (ocp_data = 6010)
5672 23:45:07.442544
5673 23:45:07.445373 R8152: Done initializing
5674 23:45:07.445503
5675 23:45:07.445606 Adding net device
5676 23:45:07.831375
5677 23:45:07.831522 done.
5678 23:45:07.831597
5679 23:45:07.831665 MAC: 00:e0:4c:78:85:cb
5680 23:45:07.831730
5681 23:45:07.834657 Sending DHCP discover... done.
5682 23:45:07.834779
5683 23:45:07.837893 Waiting for reply... done.
5684 23:45:07.837978
5685 23:45:07.841123 Sending DHCP request... done.
5686 23:45:07.841244
5687 23:45:07.841347 Waiting for reply... done.
5688 23:45:07.841457
5689 23:45:07.844465 My ip is 192.168.201.22
5690 23:45:07.844555
5691 23:45:07.847815 The DHCP server ip is 192.168.201.1
5692 23:45:07.847906
5693 23:45:07.850915 TFTP server IP predefined by user: 192.168.201.1
5694 23:45:07.851007
5695 23:45:07.857536 Bootfile predefined by user: 14172955/tftp-deploy-74mqdctt/kernel/image.itb
5696 23:45:07.857629
5697 23:45:07.860660 Sending tftp read request... done.
5698 23:45:07.860751
5699 23:45:07.863878 Waiting for the transfer...
5700 23:45:07.867011
5701 23:45:08.148808 00000000 ################################################################
5702 23:45:08.148964
5703 23:45:08.422068 00080000 ################################################################
5704 23:45:08.422241
5705 23:45:08.698998 00100000 ################################################################
5706 23:45:08.699152
5707 23:45:08.970739 00180000 ################################################################
5708 23:45:08.970896
5709 23:45:09.240792 00200000 ################################################################
5710 23:45:09.240975
5711 23:45:09.515314 00280000 ################################################################
5712 23:45:09.515458
5713 23:45:09.793209 00300000 ################################################################
5714 23:45:09.793394
5715 23:45:10.065328 00380000 ################################################################
5716 23:45:10.065525
5717 23:45:10.336086 00400000 ################################################################
5718 23:45:10.336247
5719 23:45:10.607926 00480000 ################################################################
5720 23:45:10.608109
5721 23:45:10.872200 00500000 ################################################################
5722 23:45:10.872386
5723 23:45:11.141332 00580000 ################################################################
5724 23:45:11.141526
5725 23:45:11.429268 00600000 ################################################################
5726 23:45:11.429458
5727 23:45:11.701207 00680000 ################################################################
5728 23:45:11.701362
5729 23:45:11.970941 00700000 ################################################################
5730 23:45:11.971111
5731 23:45:12.235221 00780000 ################################################################
5732 23:45:12.235375
5733 23:45:12.491604 00800000 ################################################################
5734 23:45:12.491760
5735 23:45:12.754232 00880000 ################################################################
5736 23:45:12.754415
5737 23:45:13.033031 00900000 ################################################################
5738 23:45:13.033196
5739 23:45:13.310740 00980000 ################################################################
5740 23:45:13.310893
5741 23:45:13.571407 00a00000 ################################################################
5742 23:45:13.571561
5743 23:45:13.829335 00a80000 ################################################################
5744 23:45:13.829509
5745 23:45:14.097246 00b00000 ################################################################
5746 23:45:14.097418
5747 23:45:14.374505 00b80000 ################################################################
5748 23:45:14.374648
5749 23:45:14.639672 00c00000 ################################################################
5750 23:45:14.639817
5751 23:45:14.908439 00c80000 ################################################################
5752 23:45:14.908601
5753 23:45:15.162628 00d00000 ################################################################
5754 23:45:15.162773
5755 23:45:15.420800 00d80000 ################################################################
5756 23:45:15.420941
5757 23:45:15.673168 00e00000 ################################################################
5758 23:45:15.673338
5759 23:45:15.929559 00e80000 ################################################################
5760 23:45:15.929734
5761 23:45:16.197141 00f00000 ################################################################
5762 23:45:16.197303
5763 23:45:16.500453 00f80000 ################################################################
5764 23:45:16.500632
5765 23:45:16.771522 01000000 ################################################################
5766 23:45:16.771665
5767 23:45:17.045260 01080000 ################################################################
5768 23:45:17.045437
5769 23:45:17.314723 01100000 ################################################################
5770 23:45:17.314893
5771 23:45:17.594769 01180000 ################################################################
5772 23:45:17.594950
5773 23:45:17.872052 01200000 ################################################################
5774 23:45:17.872198
5775 23:45:18.139015 01280000 ################################################################
5776 23:45:18.139157
5777 23:45:18.405837 01300000 ################################################################
5778 23:45:18.405986
5779 23:45:18.673590 01380000 ################################################################
5780 23:45:18.673726
5781 23:45:18.941519 01400000 ################################################################
5782 23:45:18.941663
5783 23:45:19.211715 01480000 ################################################################
5784 23:45:19.211861
5785 23:45:19.485195 01500000 ################################################################
5786 23:45:19.485337
5787 23:45:19.742164 01580000 ################################################################
5788 23:45:19.742307
5789 23:45:19.999337 01600000 ################################################################
5790 23:45:19.999486
5791 23:45:20.262846 01680000 ################################################################
5792 23:45:20.262994
5793 23:45:20.525412 01700000 ################################################################
5794 23:45:20.525567
5795 23:45:20.793767 01780000 ################################################################
5796 23:45:20.793913
5797 23:45:21.056824 01800000 ################################################################
5798 23:45:21.056965
5799 23:45:21.317438 01880000 ################################################################
5800 23:45:21.317614
5801 23:45:21.577201 01900000 ################################################################
5802 23:45:21.577370
5803 23:45:21.838301 01980000 ################################################################
5804 23:45:21.838451
5805 23:45:22.107135 01a00000 ################################################################
5806 23:45:22.107278
5807 23:45:22.371213 01a80000 ################################################################
5808 23:45:22.371355
5809 23:45:22.636341 01b00000 ################################################################
5810 23:45:22.636481
5811 23:45:22.902298 01b80000 ################################################################
5812 23:45:22.902440
5813 23:45:23.166772 01c00000 ################################################################
5814 23:45:23.166915
5815 23:45:23.431796 01c80000 ################################################################
5816 23:45:23.431932
5817 23:45:23.719834 01d00000 ################################################################
5818 23:45:23.719974
5819 23:45:23.983849 01d80000 ################################################################
5820 23:45:23.983989
5821 23:45:24.192719 01e00000 ################################################ done.
5822 23:45:24.192858
5823 23:45:24.195729 The bootfile was 31848314 bytes long.
5824 23:45:24.195824
5825 23:45:24.195896 Sending tftp read request... done.
5826 23:45:24.199237
5827 23:45:24.199334 Waiting for the transfer...
5828 23:45:24.199411
5829 23:45:24.202655 00000000 # done.
5830 23:45:24.202763
5831 23:45:24.209199 Command line loaded dynamically from TFTP file: 14172955/tftp-deploy-74mqdctt/kernel/cmdline
5832 23:45:24.209394
5833 23:45:24.235346 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5834 23:45:24.235667
5835 23:45:24.235943 Loading FIT.
5836 23:45:24.236166
5837 23:45:24.239176 Image ramdisk-1 has 18727138 bytes.
5838 23:45:24.239541
5839 23:45:24.242238 Image fdt-1 has 57695 bytes.
5840 23:45:24.242591
5841 23:45:24.245162 Image kernel-1 has 13061430 bytes.
5842 23:45:24.245548
5843 23:45:24.254607 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5844 23:45:24.254698
5845 23:45:24.264877 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5846 23:45:24.268326
5847 23:45:24.272158 Choosing best match conf-1 for compat google,juniper-sku16.
5848 23:45:24.276182
5849 23:45:24.280111 Connected to device vid:did:rid of 1ae0:0028:00
5850 23:45:24.287807
5851 23:45:24.290585 tpm_get_response: command 0x17b, return code 0x0
5852 23:45:24.291007
5853 23:45:24.293973 tpm_cleanup: add release locality here.
5854 23:45:24.294578
5855 23:45:24.297145 Shutting down all USB controllers.
5856 23:45:24.297589
5857 23:45:24.300734 Removing current net device
5858 23:45:24.301143
5859 23:45:24.304171 Exiting depthcharge with code 4 at timestamp: 35127040
5860 23:45:24.304712
5861 23:45:24.310491 LZMA decompressing kernel-1 to 0x80193568
5862 23:45:24.310900
5863 23:45:24.313469 LZMA decompressing kernel-1 to 0x40000000
5864 23:45:26.169231
5865 23:45:26.169399 jumping to kernel
5866 23:45:26.170121 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5867 23:45:26.170231 start: 2.2.5 auto-login-action (timeout 00:04:00) [common]
5868 23:45:26.170312 Setting prompt string to ['Linux version [0-9]']
5869 23:45:26.170388 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5870 23:45:26.170460 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5871 23:45:26.244368
5872 23:45:26.247671 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5873 23:45:26.251394 start: 2.2.5.1 login-action (timeout 00:04:00) [common]
5874 23:45:26.251502 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5875 23:45:26.251583 Setting prompt string to []
5876 23:45:26.251665 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5877 23:45:26.251744 Using line separator: #'\n'#
5878 23:45:26.251808 No login prompt set.
5879 23:45:26.251875 Parsing kernel messages
5880 23:45:26.251935 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5881 23:45:26.252048 [login-action] Waiting for messages, (timeout 00:04:00)
5882 23:45:26.252120 Waiting using forced prompt support (timeout 00:02:00)
5883 23:45:26.270924 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j217067-arm64-gcc-10-defconfig-arm64-chromebook-s48tj) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 4 23:28:43 UTC 2024
5884 23:45:26.274083 [ 0.000000] random: crng init done
5885 23:45:26.280834 [ 0.000000] Machine model: Google juniper sku16 board
5886 23:45:26.283933 [ 0.000000] efi: UEFI not found.
5887 23:45:26.290085 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5888 23:45:26.300422 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5889 23:45:26.306738 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5890 23:45:26.310084 [ 0.000000] printk: bootconsole [mtk8250] enabled
5891 23:45:26.319234 [ 0.000000] NUMA: No NUMA configuration found
5892 23:45:26.326011 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5893 23:45:26.332403 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5894 23:45:26.332493 [ 0.000000] Zone ranges:
5895 23:45:26.338894 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5896 23:45:26.342236 [ 0.000000] DMA32 empty
5897 23:45:26.348948 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5898 23:45:26.352193 [ 0.000000] Movable zone start for each node
5899 23:45:26.358534 [ 0.000000] Early memory node ranges
5900 23:45:26.362013 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5901 23:45:26.368307 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5902 23:45:26.375064 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5903 23:45:26.381297 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5904 23:45:26.387923 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5905 23:45:26.394423 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5906 23:45:26.411578 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5907 23:45:26.418258 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5908 23:45:26.424856 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5909 23:45:26.428010 [ 0.000000] psci: probing for conduit method from DT.
5910 23:45:26.434725 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5911 23:45:26.437769 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5912 23:45:26.444419 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5913 23:45:26.447688 [ 0.000000] psci: SMC Calling Convention v1.1
5914 23:45:26.454317 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5915 23:45:26.457652 [ 0.000000] Detected VIPT I-cache on CPU0
5916 23:45:26.464067 [ 0.000000] CPU features: detected: GIC system register CPU interface
5917 23:45:26.470595 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5918 23:45:26.477375 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5919 23:45:26.483969 [ 0.000000] CPU features: detected: ARM erratum 845719
5920 23:45:26.487183 [ 0.000000] alternatives: applying boot alternatives
5921 23:45:26.493846 [ 0.000000] Fallback order for Node 0: 0
5922 23:45:26.500465 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5923 23:45:26.503884 [ 0.000000] Policy zone: Normal
5924 23:45:26.529707 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5925 23:45:26.542688 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5926 23:45:26.549418 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5927 23:45:26.559126 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5928 23:45:26.565641 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5929 23:45:26.568975 <6>[ 0.000000] software IO TLB: area num 8.
5930 23:45:26.594981 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5931 23:45:26.652759 <6>[ 0.000000] Memory: 3896912K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 261552K reserved, 32768K cma-reserved)
5932 23:45:26.659571 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5933 23:45:26.666021 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5934 23:45:26.669139 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5935 23:45:26.675856 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5936 23:45:26.682333 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5937 23:45:26.688834 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5938 23:45:26.695341 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5939 23:45:26.701935 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5940 23:45:26.708407 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5941 23:45:26.718193 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5942 23:45:26.724871 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5943 23:45:26.727899 <6>[ 0.000000] GICv3: 640 SPIs implemented
5944 23:45:26.731331 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5945 23:45:26.737817 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5946 23:45:26.741260 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5947 23:45:26.747466 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5948 23:45:26.760660 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5949 23:45:26.773735 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5950 23:45:26.780030 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5951 23:45:26.789911 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5952 23:45:26.803282 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5953 23:45:26.809597 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5954 23:45:26.816965 <6>[ 0.009469] Console: colour dummy device 80x25
5955 23:45:26.820057 <6>[ 0.014514] printk: console [tty1] enabled
5956 23:45:26.833145 <6>[ 0.018904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5957 23:45:26.836288 <6>[ 0.029369] pid_max: default: 32768 minimum: 301
5958 23:45:26.842847 <6>[ 0.034251] LSM: Security Framework initializing
5959 23:45:26.849632 <6>[ 0.039167] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5960 23:45:26.855964 <6>[ 0.046790] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5961 23:45:26.863034 <4>[ 0.055663] cacheinfo: Unable to detect cache hierarchy for CPU 0
5962 23:45:26.872897 <6>[ 0.062290] cblist_init_generic: Setting adjustable number of callback queues.
5963 23:45:26.879648 <6>[ 0.069735] cblist_init_generic: Setting shift to 3 and lim to 1.
5964 23:45:26.885815 <6>[ 0.076088] cblist_init_generic: Setting adjustable number of callback queues.
5965 23:45:26.892588 <6>[ 0.083533] cblist_init_generic: Setting shift to 3 and lim to 1.
5966 23:45:26.895692 <6>[ 0.089931] rcu: Hierarchical SRCU implementation.
5967 23:45:26.902265 <6>[ 0.094957] rcu: Max phase no-delay instances is 1000.
5968 23:45:26.910196 <6>[ 0.102877] EFI services will not be available.
5969 23:45:26.913219 <6>[ 0.107827] smp: Bringing up secondary CPUs ...
5970 23:45:26.924109 <6>[ 0.113131] Detected VIPT I-cache on CPU1
5971 23:45:26.930572 <4>[ 0.113178] cacheinfo: Unable to detect cache hierarchy for CPU 1
5972 23:45:26.937002 <6>[ 0.113187] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5973 23:45:26.943567 <6>[ 0.113218] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5974 23:45:26.947338 <6>[ 0.113703] Detected VIPT I-cache on CPU2
5975 23:45:26.953576 <4>[ 0.113736] cacheinfo: Unable to detect cache hierarchy for CPU 2
5976 23:45:26.960113 <6>[ 0.113742] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5977 23:45:26.966613 <6>[ 0.113755] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5978 23:45:26.973012 <6>[ 0.114196] Detected VIPT I-cache on CPU3
5979 23:45:26.979623 <4>[ 0.114226] cacheinfo: Unable to detect cache hierarchy for CPU 3
5980 23:45:26.986048 <6>[ 0.114231] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5981 23:45:26.992446 <6>[ 0.114242] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5982 23:45:26.995805 <6>[ 0.114817] CPU features: detected: Spectre-v2
5983 23:45:27.002645 <6>[ 0.114827] CPU features: detected: Spectre-BHB
5984 23:45:27.005916 <6>[ 0.114832] CPU features: detected: ARM erratum 858921
5985 23:45:27.012106 <6>[ 0.114837] Detected VIPT I-cache on CPU4
5986 23:45:27.018631 <4>[ 0.114885] cacheinfo: Unable to detect cache hierarchy for CPU 4
5987 23:45:27.025232 <6>[ 0.114893] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5988 23:45:27.031742 <6>[ 0.114902] arch_timer: Enabling local workaround for ARM erratum 858921
5989 23:45:27.038322 <6>[ 0.114912] arch_timer: CPU4: Trapping CNTVCT access
5990 23:45:27.044772 <6>[ 0.114919] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5991 23:45:27.048047 <6>[ 0.115404] Detected VIPT I-cache on CPU5
5992 23:45:27.054679 <4>[ 0.115445] cacheinfo: Unable to detect cache hierarchy for CPU 5
5993 23:45:27.061417 <6>[ 0.115450] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5994 23:45:27.067928 <6>[ 0.115458] arch_timer: Enabling local workaround for ARM erratum 858921
5995 23:45:27.074066 <6>[ 0.115464] arch_timer: CPU5: Trapping CNTVCT access
5996 23:45:27.080927 <6>[ 0.115469] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5997 23:45:27.084116 <6>[ 0.116004] Detected VIPT I-cache on CPU6
5998 23:45:27.090667 <4>[ 0.116050] cacheinfo: Unable to detect cache hierarchy for CPU 6
5999 23:45:27.097297 <6>[ 0.116056] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6000 23:45:27.103780 <6>[ 0.116063] arch_timer: Enabling local workaround for ARM erratum 858921
6001 23:45:27.110475 <6>[ 0.116070] arch_timer: CPU6: Trapping CNTVCT access
6002 23:45:27.117119 <6>[ 0.116074] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6003 23:45:27.120119 <6>[ 0.116603] Detected VIPT I-cache on CPU7
6004 23:45:27.126878 <4>[ 0.116647] cacheinfo: Unable to detect cache hierarchy for CPU 7
6005 23:45:27.133362 <6>[ 0.116653] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6006 23:45:27.143029 <6>[ 0.116660] arch_timer: Enabling local workaround for ARM erratum 858921
6007 23:45:27.146159 <6>[ 0.116666] arch_timer: CPU7: Trapping CNTVCT access
6008 23:45:27.152820 <6>[ 0.116672] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6009 23:45:27.159312 <6>[ 0.116720] smp: Brought up 1 node, 8 CPUs
6010 23:45:27.162858 <6>[ 0.355589] SMP: Total of 8 processors activated.
6011 23:45:27.169375 <6>[ 0.360526] CPU features: detected: 32-bit EL0 Support
6012 23:45:27.172461 <6>[ 0.365896] CPU features: detected: 32-bit EL1 Support
6013 23:45:27.179016 <6>[ 0.371261] CPU features: detected: CRC32 instructions
6014 23:45:27.182389 <6>[ 0.376688] CPU: All CPU(s) started at EL2
6015 23:45:27.188828 <6>[ 0.381025] alternatives: applying system-wide alternatives
6016 23:45:27.196396 <6>[ 0.389044] devtmpfs: initialized
6017 23:45:27.212324 <6>[ 0.398026] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6018 23:45:27.218745 <6>[ 0.407977] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6019 23:45:27.224890 <6>[ 0.415705] pinctrl core: initialized pinctrl subsystem
6020 23:45:27.228133 <6>[ 0.422808] DMI not present or invalid.
6021 23:45:27.234550 <6>[ 0.427176] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6022 23:45:27.244818 <6>[ 0.434081] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6023 23:45:27.251600 <6>[ 0.441611] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6024 23:45:27.261062 <6>[ 0.449860] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6025 23:45:27.267808 <6>[ 0.458041] audit: initializing netlink subsys (disabled)
6026 23:45:27.274979 <5>[ 0.463744] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6027 23:45:27.281348 <6>[ 0.464711] thermal_sys: Registered thermal governor 'step_wise'
6028 23:45:27.287647 <6>[ 0.471709] thermal_sys: Registered thermal governor 'power_allocator'
6029 23:45:27.290736 <6>[ 0.478007] cpuidle: using governor menu
6030 23:45:27.297555 <6>[ 0.488969] NET: Registered PF_QIPCRTR protocol family
6031 23:45:27.304098 <6>[ 0.494465] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6032 23:45:27.310559 <6>[ 0.501561] ASID allocator initialised with 32768 entries
6033 23:45:27.313815 <6>[ 0.508318] Serial: AMBA PL011 UART driver
6034 23:45:27.326313 <4>[ 0.518702] Trying to register duplicate clock ID: 113
6035 23:45:27.384915 <6>[ 0.574253] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6036 23:45:27.399271 <6>[ 0.588563] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6037 23:45:27.402427 <6>[ 0.598307] KASLR enabled
6038 23:45:27.417005 <6>[ 0.606348] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6039 23:45:27.423369 <6>[ 0.613352] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6040 23:45:27.430126 <6>[ 0.619830] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6041 23:45:27.436312 <6>[ 0.626821] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6042 23:45:27.443038 <6>[ 0.633295] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6043 23:45:27.449387 <6>[ 0.640285] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6044 23:45:27.455848 <6>[ 0.646758] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6045 23:45:27.462672 <6>[ 0.653748] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6046 23:45:27.469138 <6>[ 0.661317] ACPI: Interpreter disabled.
6047 23:45:27.476322 <6>[ 0.669280] iommu: Default domain type: Translated
6048 23:45:27.482996 <6>[ 0.674389] iommu: DMA domain TLB invalidation policy: strict mode
6049 23:45:27.486183 <5>[ 0.681021] SCSI subsystem initialized
6050 23:45:27.492603 <6>[ 0.685437] usbcore: registered new interface driver usbfs
6051 23:45:27.499098 <6>[ 0.691166] usbcore: registered new interface driver hub
6052 23:45:27.505794 <6>[ 0.696707] usbcore: registered new device driver usb
6053 23:45:27.508919 <6>[ 0.702999] pps_core: LinuxPPS API ver. 1 registered
6054 23:45:27.518939 <6>[ 0.708183] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6055 23:45:27.525328 <6>[ 0.717507] PTP clock support registered
6056 23:45:27.528620 <6>[ 0.721760] EDAC MC: Ver: 3.0.0
6057 23:45:27.532061 <6>[ 0.727392] FPGA manager framework
6058 23:45:27.538283 <6>[ 0.731075] Advanced Linux Sound Architecture Driver Initialized.
6059 23:45:27.541928 <6>[ 0.737826] vgaarb: loaded
6060 23:45:27.548628 <6>[ 0.740961] clocksource: Switched to clocksource arch_sys_counter
6061 23:45:27.554945 <5>[ 0.747397] VFS: Disk quotas dquot_6.6.0
6062 23:45:27.561741 <6>[ 0.751573] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6063 23:45:27.565575 <6>[ 0.758746] pnp: PnP ACPI: disabled
6064 23:45:27.573148 <6>[ 0.765611] NET: Registered PF_INET protocol family
6065 23:45:27.579672 <6>[ 0.770840] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6066 23:45:27.591552 <6>[ 0.780752] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6067 23:45:27.601543 <6>[ 0.789505] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6068 23:45:27.608014 <6>[ 0.797455] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6069 23:45:27.614932 <6>[ 0.805686] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6070 23:45:27.624734 <6>[ 0.813780] TCP: Hash tables configured (established 32768 bind 32768)
6071 23:45:27.630976 <6>[ 0.820605] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6072 23:45:27.638198 <6>[ 0.827577] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6073 23:45:27.644065 <6>[ 0.835055] NET: Registered PF_UNIX/PF_LOCAL protocol family
6074 23:45:27.650575 <6>[ 0.841153] RPC: Registered named UNIX socket transport module.
6075 23:45:27.654173 <6>[ 0.847296] RPC: Registered udp transport module.
6076 23:45:27.660272 <6>[ 0.852223] RPC: Registered tcp transport module.
6077 23:45:27.666860 <6>[ 0.857146] RPC: Registered tcp NFSv4.1 backchannel transport module.
6078 23:45:27.670163 <6>[ 0.863797] PCI: CLS 0 bytes, default 64
6079 23:45:27.673322 <6>[ 0.868081] Unpacking initramfs...
6080 23:45:27.688258 <6>[ 0.877605] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6081 23:45:27.698033 <6>[ 0.886233] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6082 23:45:27.701125 <6>[ 0.895081] kvm [1]: IPA Size Limit: 40 bits
6083 23:45:27.708709 <6>[ 0.901402] kvm [1]: vgic-v2@c420000
6084 23:45:27.715263 <6>[ 0.905219] kvm [1]: GIC system register CPU interface enabled
6085 23:45:27.718159 <6>[ 0.911396] kvm [1]: vgic interrupt IRQ18
6086 23:45:27.724999 <6>[ 0.915764] kvm [1]: Hyp mode initialized successfully
6087 23:45:27.728185 <5>[ 0.922057] Initialise system trusted keyrings
6088 23:45:27.734678 <6>[ 0.926884] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6089 23:45:27.744029 <6>[ 0.936735] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6090 23:45:27.750481 <5>[ 0.943193] NFS: Registering the id_resolver key type
6091 23:45:27.753741 <5>[ 0.948499] Key type id_resolver registered
6092 23:45:27.760373 <5>[ 0.952910] Key type id_legacy registered
6093 23:45:27.766705 <6>[ 0.957218] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6094 23:45:27.773471 <6>[ 0.964139] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6095 23:45:27.779963 <6>[ 0.971894] 9p: Installing v9fs 9p2000 file system support
6096 23:45:27.808124 <5>[ 1.000941] Key type asymmetric registered
6097 23:45:27.811555 <5>[ 1.005289] Asymmetric key parser 'x509' registered
6098 23:45:27.821123 <6>[ 1.010442] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6099 23:45:27.824660 <6>[ 1.018053] io scheduler mq-deadline registered
6100 23:45:27.827615 <6>[ 1.022813] io scheduler kyber registered
6101 23:45:27.851004 <6>[ 1.043472] EINJ: ACPI disabled.
6102 23:45:27.857424 <4>[ 1.047233] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6103 23:45:27.895724 <6>[ 1.087772] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6104 23:45:27.903825 <6>[ 1.096225] printk: console [ttyS0] disabled
6105 23:45:27.931915 <6>[ 1.120885] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6106 23:45:27.938440 <6>[ 1.130359] printk: console [ttyS0] enabled
6107 23:45:27.941563 <6>[ 1.130359] printk: console [ttyS0] enabled
6108 23:45:27.948503 <6>[ 1.139282] printk: bootconsole [mtk8250] disabled
6109 23:45:27.952058 <6>[ 1.139282] printk: bootconsole [mtk8250] disabled
6110 23:45:27.961671 <3>[ 1.149816] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6111 23:45:27.967752 <3>[ 1.158196] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6112 23:45:27.997341 <6>[ 1.186604] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6113 23:45:28.004302 <6>[ 1.196262] serial serial0: tty port ttyS1 registered
6114 23:45:28.010612 <6>[ 1.202819] SuperH (H)SCI(F) driver initialized
6115 23:45:28.013647 <6>[ 1.208310] msm_serial: driver initialized
6116 23:45:28.029906 <6>[ 1.218609] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6117 23:45:28.039365 <6>[ 1.227208] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6118 23:45:28.046181 <6>[ 1.235789] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6119 23:45:28.055618 <6>[ 1.244362] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6120 23:45:28.065483 <6>[ 1.253022] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6121 23:45:28.071920 <6>[ 1.261682] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6122 23:45:28.081901 <6>[ 1.270422] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6123 23:45:28.091531 <6>[ 1.279160] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6124 23:45:28.098212 <6>[ 1.287739] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6125 23:45:28.107820 <6>[ 1.296549] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6126 23:45:28.116299 <4>[ 1.308911] cacheinfo: Unable to detect cache hierarchy for CPU 0
6127 23:45:28.125670 <6>[ 1.318305] loop: module loaded
6128 23:45:28.137768 <6>[ 1.330206] vsim1: Bringing 1800000uV into 2700000-2700000uV
6129 23:45:28.155668 <6>[ 1.348154] megasas: 07.719.03.00-rc1
6130 23:45:28.164523 <6>[ 1.356918] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6131 23:45:28.175533 <6>[ 1.364337] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6132 23:45:28.189007 <6>[ 1.380918] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6133 23:45:28.248798 <6>[ 1.434483] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6134 23:45:28.286427 <6>[ 1.478492] Freeing initrd memory: 18284K
6135 23:45:28.300996 <4>[ 1.490274] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6136 23:45:28.307447 <4>[ 1.499508] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6137 23:45:28.314386 <4>[ 1.506206] Hardware name: Google juniper sku16 board (DT)
6138 23:45:28.317315 <4>[ 1.511945] Call trace:
6139 23:45:28.320670 <4>[ 1.514646] dump_backtrace.part.0+0xe0/0xf0
6140 23:45:28.324000 <4>[ 1.519182] show_stack+0x18/0x30
6141 23:45:28.330701 <4>[ 1.522754] dump_stack_lvl+0x68/0x84
6142 23:45:28.334307 <4>[ 1.526675] dump_stack+0x18/0x34
6143 23:45:28.337269 <4>[ 1.530246] sysfs_warn_dup+0x64/0x80
6144 23:45:28.340731 <4>[ 1.534168] sysfs_do_create_link_sd+0xf0/0x100
6145 23:45:28.347497 <4>[ 1.538955] sysfs_create_link+0x20/0x40
6146 23:45:28.350600 <4>[ 1.543134] bus_add_device+0x68/0x10c
6147 23:45:28.353549 <4>[ 1.547140] device_add+0x340/0x7ac
6148 23:45:28.356960 <4>[ 1.550883] of_device_add+0x44/0x60
6149 23:45:28.363678 <4>[ 1.554718] of_platform_device_create_pdata+0x90/0x120
6150 23:45:28.366889 <4>[ 1.560200] of_platform_bus_create+0x170/0x370
6151 23:45:28.373104 <4>[ 1.564986] of_platform_populate+0x50/0xfc
6152 23:45:28.376685 <4>[ 1.569426] parse_mtd_partitions+0x1dc/0x510
6153 23:45:28.383048 <4>[ 1.574039] mtd_device_parse_register+0xf8/0x2e0
6154 23:45:28.386460 <4>[ 1.578997] spi_nor_probe+0x21c/0x2f0
6155 23:45:28.389930 <4>[ 1.583003] spi_mem_probe+0x6c/0xb0
6156 23:45:28.393033 <4>[ 1.586835] spi_probe+0x84/0xe4
6157 23:45:28.396105 <4>[ 1.590317] really_probe+0xbc/0x2e0
6158 23:45:28.402733 <4>[ 1.594147] __driver_probe_device+0x78/0x11c
6159 23:45:28.405674 <4>[ 1.598759] driver_probe_device+0xd8/0x160
6160 23:45:28.409194 <4>[ 1.603197] __device_attach_driver+0xb8/0x134
6161 23:45:28.415629 <4>[ 1.607895] bus_for_each_drv+0x78/0xd0
6162 23:45:28.419144 <4>[ 1.611985] __device_attach+0xa8/0x1c0
6163 23:45:28.422087 <4>[ 1.616076] device_initial_probe+0x14/0x20
6164 23:45:28.425338 <4>[ 1.620514] bus_probe_device+0x9c/0xa4
6165 23:45:28.431982 <4>[ 1.624604] device_add+0x3ac/0x7ac
6166 23:45:28.435286 <4>[ 1.628346] __spi_add_device+0x78/0x120
6167 23:45:28.438389 <4>[ 1.632524] spi_add_device+0x40/0x7c
6168 23:45:28.445114 <4>[ 1.636442] spi_register_controller+0x610/0xad0
6169 23:45:28.448670 <4>[ 1.641315] devm_spi_register_controller+0x4c/0xa4
6170 23:45:28.451805 <4>[ 1.646448] mtk_spi_probe+0x3f8/0x650
6171 23:45:28.455428 <4>[ 1.650452] platform_probe+0x68/0xe0
6172 23:45:28.461607 <4>[ 1.654370] really_probe+0xbc/0x2e0
6173 23:45:28.465056 <4>[ 1.658200] __driver_probe_device+0x78/0x11c
6174 23:45:28.468379 <4>[ 1.662811] driver_probe_device+0xd8/0x160
6175 23:45:28.474888 <4>[ 1.667249] __driver_attach+0x94/0x19c
6176 23:45:28.478021 <4>[ 1.671340] bus_for_each_dev+0x70/0xd0
6177 23:45:28.481309 <4>[ 1.675429] driver_attach+0x24/0x30
6178 23:45:28.484675 <4>[ 1.679259] bus_add_driver+0x154/0x20c
6179 23:45:28.491072 <4>[ 1.683349] driver_register+0x78/0x130
6180 23:45:28.494407 <4>[ 1.687440] __platform_driver_register+0x28/0x34
6181 23:45:28.497822 <4>[ 1.692400] mtk_spi_driver_init+0x1c/0x28
6182 23:45:28.504132 <4>[ 1.696754] do_one_initcall+0x50/0x1d0
6183 23:45:28.507490 <4>[ 1.700844] kernel_init_freeable+0x21c/0x288
6184 23:45:28.510854 <4>[ 1.705457] kernel_init+0x24/0x12c
6185 23:45:28.513939 <4>[ 1.709202] ret_from_fork+0x10/0x20
6186 23:45:28.525236 <6>[ 1.718118] tun: Universal TUN/TAP device driver, 1.6
6187 23:45:28.528634 <6>[ 1.724405] thunder_xcv, ver 1.0
6188 23:45:28.535327 <6>[ 1.727919] thunder_bgx, ver 1.0
6189 23:45:28.535454 <6>[ 1.731421] nicpf, ver 1.0
6190 23:45:28.546466 <6>[ 1.735777] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6191 23:45:28.549552 <6>[ 1.743261] hns3: Copyright (c) 2017 Huawei Corporation.
6192 23:45:28.556223 <6>[ 1.748858] hclge is initializing
6193 23:45:28.559369 <6>[ 1.752442] e1000: Intel(R) PRO/1000 Network Driver
6194 23:45:28.565841 <6>[ 1.757577] e1000: Copyright (c) 1999-2006 Intel Corporation.
6195 23:45:28.572462 <6>[ 1.763597] e1000e: Intel(R) PRO/1000 Network Driver
6196 23:45:28.575571 <6>[ 1.768817] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6197 23:45:28.582361 <6>[ 1.775012] igb: Intel(R) Gigabit Ethernet Network Driver
6198 23:45:28.588802 <6>[ 1.780667] igb: Copyright (c) 2007-2014 Intel Corporation.
6199 23:45:28.595360 <6>[ 1.786511] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6200 23:45:28.602031 <6>[ 1.793034] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6201 23:45:28.605382 <6>[ 1.799582] sky2: driver version 1.30
6202 23:45:28.612544 <6>[ 1.804827] usbcore: registered new device driver r8152-cfgselector
6203 23:45:28.618788 <6>[ 1.811369] usbcore: registered new interface driver r8152
6204 23:45:28.625227 <6>[ 1.817202] VFIO - User Level meta-driver version: 0.3
6205 23:45:28.632190 <6>[ 1.824998] mtu3 11201000.usb: uwk - reg:0x420, version:101
6206 23:45:28.638829 <4>[ 1.830869] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6207 23:45:28.645737 <6>[ 1.838152] mtu3 11201000.usb: dr_mode: 1, drd: auto
6208 23:45:28.652113 <6>[ 1.843377] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6209 23:45:28.655398 <6>[ 1.849562] mtu3 11201000.usb: usb3-drd: 0
6210 23:45:28.666109 <6>[ 1.855109] mtu3 11201000.usb: xHCI platform device register success...
6211 23:45:28.672169 <4>[ 1.863734] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6212 23:45:28.678929 <6>[ 1.871689] xhci-mtk 11200000.usb: xHCI Host Controller
6213 23:45:28.688868 <6>[ 1.877200] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6214 23:45:28.692450 <6>[ 1.884923] xhci-mtk 11200000.usb: USB3 root hub has no ports
6215 23:45:28.701852 <6>[ 1.890932] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6216 23:45:28.708533 <6>[ 1.900374] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6217 23:45:28.715009 <6>[ 1.906449] xhci-mtk 11200000.usb: xHCI Host Controller
6218 23:45:28.721696 <6>[ 1.911936] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6219 23:45:28.728076 <6>[ 1.919594] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6220 23:45:28.731446 <6>[ 1.926409] hub 1-0:1.0: USB hub found
6221 23:45:28.737739 <6>[ 1.930442] hub 1-0:1.0: 1 port detected
6222 23:45:28.747711 <6>[ 1.935789] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6223 23:45:28.750876 <6>[ 1.944396] hub 2-0:1.0: USB hub found
6224 23:45:28.757412 <3>[ 1.948424] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6225 23:45:28.764079 <6>[ 1.956309] usbcore: registered new interface driver usb-storage
6226 23:45:28.770949 <6>[ 1.962920] usbcore: registered new device driver onboard-usb-hub
6227 23:45:28.787711 <4>[ 1.977074] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6228 23:45:28.796533 <6>[ 1.989317] mt6397-rtc mt6358-rtc: registered as rtc0
6229 23:45:28.806441 <6>[ 1.994795] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-04T23:45:28 UTC (1717544728)
6230 23:45:28.812976 <6>[ 2.004676] i2c_dev: i2c /dev entries driver
6231 23:45:28.822990 <6>[ 2.011081] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6232 23:45:28.829543 <6>[ 2.019399] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6233 23:45:28.835692 <6>[ 2.028304] i2c 4-0058: Fixed dependency cycle(s) with /panel
6234 23:45:28.842573 <6>[ 2.034336] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6235 23:45:28.852131 <3>[ 2.041803] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6236 23:45:28.869251 <6>[ 2.058827] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6237 23:45:28.877445 <6>[ 2.070291] cpu cpu0: EM: created perf domain
6238 23:45:28.890760 <6>[ 2.075762] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6239 23:45:28.894149 <6>[ 2.087073] cpu cpu4: EM: created perf domain
6240 23:45:28.901352 <6>[ 2.094020] sdhci: Secure Digital Host Controller Interface driver
6241 23:45:28.907939 <6>[ 2.100476] sdhci: Copyright(c) Pierre Ossman
6242 23:45:28.915169 <6>[ 2.105891] Synopsys Designware Multimedia Card Interface Driver
6243 23:45:28.921219 <6>[ 2.106415] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6244 23:45:28.924487 <6>[ 2.112968] sdhci-pltfm: SDHCI platform and OF driver helper
6245 23:45:28.934210 <6>[ 2.126609] ledtrig-cpu: registered to indicate activity on CPUs
6246 23:45:28.941830 <6>[ 2.134346] usbcore: registered new interface driver usbhid
6247 23:45:28.948265 <6>[ 2.140186] usbhid: USB HID core driver
6248 23:45:28.955463 <6>[ 2.144499] spi_master spi2: will run message pump with realtime priority
6249 23:45:28.961836 <4>[ 2.144730] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6250 23:45:28.968464 <4>[ 2.159107] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6251 23:45:28.992814 <6>[ 2.178877] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6252 23:45:29.011883 <6>[ 2.194385] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6253 23:45:29.018693 <4>[ 2.207398] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6254 23:45:29.021751 <6>[ 2.208856] cros-ec-spi spi2.0: Chrome EC device registered
6255 23:45:29.035709 <4>[ 2.224762] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6256 23:45:29.047933 <4>[ 2.237134] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6257 23:45:29.054790 <6>[ 2.238875] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6258 23:45:29.061411 <4>[ 2.246083] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6259 23:45:29.064497 <6>[ 2.252787] mmc0: new HS400 MMC card at address 0001
6260 23:45:29.071284 <6>[ 2.263741] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6261 23:45:29.083193 <6>[ 2.272183] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6262 23:45:29.086293 <6>[ 2.274901] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6263 23:45:29.095257 <6>[ 2.287209] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6264 23:45:29.104588 <6>[ 2.289586] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6265 23:45:29.111333 <6>[ 2.302050] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6266 23:45:29.121192 <6>[ 2.307337] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6267 23:45:29.134016 <6>[ 2.309586] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6268 23:45:29.137712 <6>[ 2.320000] NET: Registered PF_PACKET protocol family
6269 23:45:29.144375 <6>[ 2.330346] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6270 23:45:29.154039 <6>[ 2.330467] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6271 23:45:29.160666 <6>[ 2.335729] 9pnet: Installing 9P2000 support
6272 23:45:29.167093 <6>[ 2.352987] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6273 23:45:29.170563 <5>[ 2.363522] Key type dns_resolver registered
6274 23:45:29.177028 <6>[ 2.368479] registered taskstats version 1
6275 23:45:29.180162 <5>[ 2.372852] Loading compiled-in X.509 certificates
6276 23:45:29.222201 <3>[ 2.411750] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6277 23:45:29.251375 <4>[ 2.437755] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6278 23:45:29.261697 <6>[ 2.448308] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6279 23:45:29.274627 <6>[ 2.460291] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6280 23:45:29.287695 <3>[ 2.471689] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6281 23:45:29.302451 <3>[ 2.488030] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6282 23:45:29.308583 <3>[ 2.500541] debugfs: File 'Playback' in directory 'dapm' already present!
6283 23:45:29.318780 <3>[ 2.507596] debugfs: File 'Capture' in directory 'dapm' already present!
6284 23:45:29.321573 <6>[ 2.516208] hub 1-1:1.0: USB hub found
6285 23:45:29.327908 <6>[ 2.520593] hub 1-1:1.0: 3 ports detected
6286 23:45:29.337743 <6>[ 2.522131] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6287 23:45:29.350014 <6>[ 2.538937] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6288 23:45:29.359603 <6>[ 2.547514] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6289 23:45:29.366276 <6>[ 2.556068] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6290 23:45:29.376542 <6>[ 2.564592] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6291 23:45:29.385679 <6>[ 2.573115] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6292 23:45:29.392127 <6>[ 2.581634] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6293 23:45:29.401963 <6>[ 2.590152] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6294 23:45:29.408185 <6>[ 2.599346] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6295 23:45:29.414848 <6>[ 2.606857] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6296 23:45:29.421455 <6>[ 2.614144] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6297 23:45:29.432128 <6>[ 2.621395] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6298 23:45:29.438692 <6>[ 2.628802] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6299 23:45:29.445350 <6>[ 2.637051] panfrost 13040000.gpu: clock rate = 511999970
6300 23:45:29.455656 <6>[ 2.642738] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6301 23:45:29.464832 <6>[ 2.652768] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6302 23:45:29.471297 <6>[ 2.660778] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6303 23:45:29.484371 <6>[ 2.669219] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6304 23:45:29.490733 <6>[ 2.681298] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6305 23:45:29.504165 <6>[ 2.693252] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6306 23:45:29.514032 <6>[ 2.702350] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6307 23:45:29.523972 <6>[ 2.711497] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6308 23:45:29.533482 <6>[ 2.720625] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6309 23:45:29.543596 <6>[ 2.729753] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6310 23:45:29.550119 <6>[ 2.739053] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6311 23:45:29.559916 <6>[ 2.748353] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6312 23:45:29.569487 <6>[ 2.757827] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6313 23:45:29.579294 <6>[ 2.767301] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6314 23:45:29.589013 <6>[ 2.776428] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6315 23:45:29.624109 <6>[ 2.812996] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6316 23:45:29.660620 <6>[ 2.849672] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6317 23:45:29.670583 <6>[ 2.858543] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6318 23:45:29.682057 <6>[ 2.870888] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6319 23:45:29.816689 <6>[ 3.005544] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6320 23:45:30.388721 <4>[ 3.130152] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6321 23:45:30.398333 <4>[ 3.130177] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6322 23:45:30.401839 <6>[ 3.179180] r8152 1-1.2:1.0 eth0: v1.12.13
6323 23:45:30.408168 <6>[ 3.260979] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6324 23:45:30.414987 <6>[ 3.561240] Console: switching to colour frame buffer device 170x48
6325 23:45:30.424902 <6>[ 3.613425] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6326 23:45:30.443402 <6>[ 3.632177] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6327 23:45:30.449938 <6>[ 3.640204] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6328 23:45:31.585794 <6>[ 4.778122] r8152 1-1.2:1.0 eth0: carrier on
6329 23:45:34.364443 <5>[ 4.804985] Sending DHCP requests .., OK
6330 23:45:34.371509 <6>[ 7.561507] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6331 23:45:34.374574 <6>[ 7.569948] IP-Config: Complete:
6332 23:45:34.387537 <6>[ 7.573518] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6333 23:45:34.397425 <6>[ 7.584419] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6334 23:45:34.404057 <6>[ 7.593901] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6335 23:45:34.407039 <6>[ 7.593911] nameserver0=192.168.201.1
6336 23:45:34.414165 <6>[ 7.606295] clk: Disabling unused clocks
6337 23:45:34.417539 <6>[ 7.611415] ALSA device list:
6338 23:45:34.423753 <6>[ 7.614711] #0: mt8183_mt6358_ts3a227_max98357
6339 23:45:34.433858 <6>[ 7.626558] Freeing unused kernel memory: 8512K
6340 23:45:34.441364 <6>[ 7.634243] Run /init as init process
6341 23:45:34.453269 Loading, please wait...
6342 23:45:34.490976 Starting systemd-udevd version 252.22-1~deb12u1
6343 23:45:34.807663 <3>[ 7.999944] mtk-scp 10500000.scp: invalid resource
6344 23:45:34.817937 <6>[ 8.007017] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6345 23:45:34.821305 <3>[ 8.009602] thermal_sys: Failed to find 'trips' node
6346 23:45:34.827835 <6>[ 8.016085] remoteproc remoteproc0: scp is available
6347 23:45:34.837374 <3>[ 8.018073] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6348 23:45:34.843702 <3>[ 8.018084] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6349 23:45:34.856617 <3>[ 8.018089] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6350 23:45:34.863410 <3>[ 8.018094] elan_i2c 2-0015: Error applying setting, reverse things back
6351 23:45:34.873383 <3>[ 8.019830] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6352 23:45:34.880030 <3>[ 8.019839] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6353 23:45:34.886607 <4>[ 8.019842] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6354 23:45:34.896897 <4>[ 8.020490] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6355 23:45:34.899617 <3>[ 8.021102] thermal_sys: Failed to find 'trips' node
6356 23:45:34.909807 <3>[ 8.021104] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6357 23:45:34.916251 <3>[ 8.021110] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6358 23:45:34.922333 <4>[ 8.021112] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6359 23:45:34.933041 <4>[ 8.025187] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6360 23:45:34.939098 <4>[ 8.035874] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6361 23:45:34.945954 <6>[ 8.041910] remoteproc remoteproc0: powering up scp
6362 23:45:34.955656 <3>[ 8.060470] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6363 23:45:34.962504 <4>[ 8.061880] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6364 23:45:34.972717 <3>[ 8.069149] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6365 23:45:34.979068 <3>[ 8.077586] remoteproc remoteproc0: request_firmware failed: -2
6366 23:45:34.985384 <6>[ 8.082837] mc: Linux media interface: v0.10
6367 23:45:34.995541 <3>[ 8.085155] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6368 23:45:35.001934 <6>[ 8.092873] cs_system_cfg: CoreSight Configuration manager initialised
6369 23:45:35.008307 <5>[ 8.099459] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6370 23:45:35.018132 <3>[ 8.110422] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6371 23:45:35.024729 <6>[ 8.122535] videodev: Linux video capture interface: v2.00
6372 23:45:35.031101 <6>[ 8.126327] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6373 23:45:35.037662 <5>[ 8.129013] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6374 23:45:35.049047 <5>[ 8.129439] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6375 23:45:35.058717 <4>[ 8.129499] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6376 23:45:35.061809 <6>[ 8.129506] cfg80211: failed to load regulatory.db
6377 23:45:35.072171 <3>[ 8.130396] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6378 23:45:35.081985 <6>[ 8.189805] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6379 23:45:35.091819 <3>[ 8.191524] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6380 23:45:35.098215 <6>[ 8.208650] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6381 23:45:35.107820 <3>[ 8.215788] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6382 23:45:35.114747 <3>[ 8.215802] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6383 23:45:35.124372 <3>[ 8.215882] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6384 23:45:35.130916 <6>[ 8.221783] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6385 23:45:35.134198 <6>[ 8.222776] Bluetooth: Core ver 2.22
6386 23:45:35.140797 <6>[ 8.222843] NET: Registered PF_BLUETOOTH protocol family
6387 23:45:35.147327 <6>[ 8.222846] Bluetooth: HCI device and connection manager initialized
6388 23:45:35.153851 <6>[ 8.222861] Bluetooth: HCI socket layer initialized
6389 23:45:35.160716 <6>[ 8.222868] Bluetooth: L2CAP socket layer initialized
6390 23:45:35.167476 <6>[ 8.222879] Bluetooth: SCO socket layer initialized
6391 23:45:35.174132 <6>[ 8.238049] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6392 23:45:35.180377 <6>[ 8.238519] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6393 23:45:35.190579 <6>[ 8.247334] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6394 23:45:35.193961 <6>[ 8.260810] Bluetooth: HCI UART driver ver 2.3
6395 23:45:35.200164 <6>[ 8.261530] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6396 23:45:35.209764 <6>[ 8.261599] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6397 23:45:35.216653 <6>[ 8.262143] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6398 23:45:35.230011 <6>[ 8.264565] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6399 23:45:35.236951 <6>[ 8.264666] usbcore: registered new interface driver uvcvideo
6400 23:45:35.243377 <6>[ 8.269805] Bluetooth: HCI UART protocol H4 registered
6401 23:45:35.249871 <6>[ 8.269865] Bluetooth: HCI UART protocol LL registered
6402 23:45:35.256506 <6>[ 8.279319] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6403 23:45:35.269686 <6>[ 8.279477] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6404 23:45:35.279764 <6>[ 8.287766] Bluetooth: HCI UART protocol Three-wire (H5) registered
6405 23:45:35.293819 <6>[ 8.295950] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6406 23:45:35.309777 <6>[ 8.297453] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6407 23:45:35.321254 <6>[ 8.297460] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6408 23:45:35.337357 <6>[ 8.297781] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6409 23:45:35.346351 <6>[ 8.304391] Bluetooth: HCI UART protocol Broadcom registered
6410 23:45:35.359653 <6>[ 8.312732] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6411 23:45:35.368985 <6>[ 8.321114] Bluetooth: HCI UART protocol QCA registered
6412 23:45:35.379097 <6>[ 8.322233] Bluetooth: hci0: setting up ROME/QCA6390
6413 23:45:35.392375 <6>[ 8.332841] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6414 23:45:35.401774 <6>[ 8.333563] Bluetooth: HCI UART protocol Marvell registered
6415 23:45:35.411300 Begin: Loading e<6>[ 8.446020] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6416 23:45:35.418178 ssential drivers<3>[ 8.589873] Bluetooth: hci0: Frame reassembly failed (-84)
6417 23:45:35.421258 ... done.
6418 23:45:35.424270 Begin: Running /scripts/init-premount ... done.
6419 23:45:35.431259 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6420 23:45:35.441137 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6421 23:45:35.441228 Device /sys/class/net/eth0 found
6422 23:45:35.444117 done.
6423 23:45:35.454086 <4>[ 8.642468] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6424 23:45:35.457290 <4>[ 8.642468] Fallback method does not support PEC.
6425 23:45:35.471215 <3>[ 8.660165] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6426 23:45:35.478593 Begin: Waiting up to 180 secs for any network device to become available ... done.
6427 23:45:35.488300 <3>[ 8.675523] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6428 23:45:35.536690 IP-Config: eth0 hardware address 00:e0:4c:78:85:cb mtu 1500 DHCP
6429 23:45:35.543390 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6430 23:45:35.549988 address: 192.168.201.22 broadcast: 192.168.201.255 netmask: 255.255.255.0
6431 23:45:35.556341 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6432 23:45:35.562717 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-2
6433 23:45:35.569371 domain : lava-rack
6434 23:45:35.572799 rootserver: 192.168.201.1 rootpath:
6435 23:45:35.572889 filename :
6436 23:45:35.613125 <6>[ 8.805688] Bluetooth: hci0: QCA Product ID :0x00000008
6437 23:45:35.623300 <6>[ 8.815692] Bluetooth: hci0: QCA SOC Version :0x00000044
6438 23:45:35.632859 <6>[ 8.825553] Bluetooth: hci0: QCA ROM Version :0x00000302
6439 23:45:35.641910 <6>[ 8.834419] Bluetooth: hci0: QCA Patch Version:0x00000111
6440 23:45:35.650511 <6>[ 8.842982] Bluetooth: hci0: QCA controller version 0x00440302
6441 23:45:35.662202 <6>[ 8.851576] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6442 23:45:35.672077 <4>[ 8.860638] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6443 23:45:35.682639 <3>[ 8.871930] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6444 23:45:35.689375 <3>[ 8.881902] Bluetooth: hci0: QCA Failed to download patch (-2)
6445 23:45:35.694072 done.
6446 23:45:35.700682 Begin: Running /scripts/nfs-bottom ... done.
6447 23:45:35.731961 Begin: Running /scripts/init-bottom ... done.
6448 23:45:35.748888 <6>[ 8.937513] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6449 23:45:35.828683 <4>[ 9.017670] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6450 23:45:35.845330 <4>[ 9.034295] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6451 23:45:35.858571 <4>[ 9.047544] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6452 23:45:35.866038 <4>[ 9.058065] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6453 23:45:37.126743 <6>[ 10.319001] NET: Registered PF_INET6 protocol family
6454 23:45:37.138965 <6>[ 10.331353] Segment Routing with IPv6
6455 23:45:37.147416 <6>[ 10.339544] In-situ OAM (IOAM) with IPv6
6456 23:45:37.333116 <30>[ 10.496259] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6457 23:45:37.350497 <30>[ 10.543032] systemd[1]: Detected architecture arm64.
6458 23:45:37.360470
6459 23:45:37.363855 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6460 23:45:37.363951
6461 23:45:37.386591 <30>[ 10.578998] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6462 23:45:38.421993 <30>[ 11.611237] systemd[1]: Queued start job for default target graphical.target.
6463 23:45:38.456290 <30>[ 11.645644] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6464 23:45:38.468568 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6465 23:45:38.486041 <30>[ 11.675212] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6466 23:45:38.499582 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6467 23:45:38.518328 <30>[ 11.707616] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6468 23:45:38.532581 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6469 23:45:38.553448 <30>[ 11.742576] systemd[1]: Created slice user.slice - User and Session Slice.
6470 23:45:38.564872 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6471 23:45:38.587417 <30>[ 11.773552] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6472 23:45:38.600272 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6473 23:45:38.619193 <30>[ 11.805378] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6474 23:45:38.631376 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6475 23:45:38.661029 <30>[ 11.837355] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6476 23:45:38.676951 <30>[ 11.866293] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6477 23:45:38.684442 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6478 23:45:38.703948 <30>[ 11.893173] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6479 23:45:38.716319 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6480 23:45:38.735896 <30>[ 11.925218] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6481 23:45:38.749992 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6482 23:45:38.764594 <30>[ 11.957245] systemd[1]: Reached target paths.target - Path Units.
6483 23:45:38.779151 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6484 23:45:38.795780 <30>[ 11.985155] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6485 23:45:38.807982 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6486 23:45:38.823776 <30>[ 12.013119] systemd[1]: Reached target slices.target - Slice Units.
6487 23:45:38.834926 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6488 23:45:38.848627 <30>[ 12.041163] systemd[1]: Reached target swap.target - Swaps.
6489 23:45:38.858906 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6490 23:45:38.879941 <30>[ 12.069191] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6491 23:45:38.892957 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6492 23:45:38.912298 <30>[ 12.101560] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6493 23:45:38.925818 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6494 23:45:38.946886 <30>[ 12.135966] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6495 23:45:38.959993 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6496 23:45:38.977467 <30>[ 12.166652] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6497 23:45:38.991315 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6498 23:45:39.008803 <30>[ 12.197888] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6499 23:45:39.020574 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6500 23:45:39.041835 <30>[ 12.230964] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6501 23:45:39.055421 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6502 23:45:39.075460 <30>[ 12.264494] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6503 23:45:39.089080 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6504 23:45:39.108772 <30>[ 12.297739] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6505 23:45:39.121735 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6506 23:45:39.164900 <30>[ 12.353785] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6507 23:45:39.176497 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6508 23:45:39.196739 <30>[ 12.385961] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6509 23:45:39.207280 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6510 23:45:39.230479 <30>[ 12.419280] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6511 23:45:39.243425 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6512 23:45:39.267133 <30>[ 12.449622] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6513 23:45:39.309026 <30>[ 12.497949] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6514 23:45:39.322547 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6515 23:45:39.345879 <30>[ 12.534771] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6516 23:45:39.357156 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6517 23:45:39.386829 <30>[ 12.575650] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6518 23:45:39.399344 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6519 23:45:39.425666 <30>[ 12.614589] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6520 23:45:39.438109 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6521 23:45:39.456990 <6>[ 12.645918] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6522 23:45:39.467081 <30>[ 12.651649] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6523 23:45:39.481153 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6524 23:45:39.541412 <30>[ 12.730400] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6525 23:45:39.554446 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6526 23:45:39.579210 <30>[ 12.768250] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6527 23:45:39.593186 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kern<6>[ 12.786287] fuse: init (API version 7.37)
6528 23:45:39.596296 el Module loop...
6529 23:45:39.644954 <30>[ 12.833824] systemd[1]: Starting systemd-journald.service - Journal Service...
6530 23:45:39.654917 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6531 23:45:39.681605 <30>[ 12.870341] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6532 23:45:39.691353 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6533 23:45:39.716186 <30>[ 12.901973] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6534 23:45:39.728669 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6535 23:45:39.773097 <30>[ 12.962323] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6536 23:45:39.787674 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6537 23:45:39.803486 <30>[ 12.992608] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6538 23:45:39.816814 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6539 23:45:39.838459 <30>[ 13.027326] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6540 23:45:39.848743 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6541 23:45:39.864794 <30>[ 13.053851] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6542 23:45:39.874823 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6543 23:45:39.893056 <3>[ 13.081594] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6544 23:45:39.900138 <30>[ 13.082068] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6545 23:45:39.910055 <3>[ 13.096452] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6546 23:45:39.919758 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6547 23:45:39.926676 <3>[ 13.117063] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6548 23:45:39.938755 <30>[ 13.126955] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6549 23:45:39.948365 <3>[ 13.132349] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6550 23:45:39.961808 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate <3>[ 13.151809] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6551 23:45:39.965146 List of Static Device Nodes.
6552 23:45:39.978302 <3>[ 13.166681] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6553 23:45:39.989058 <30>[ 13.177191] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6554 23:45:39.995650 <3>[ 13.181792] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6555 23:45:40.005701 <30>[ 13.185522] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6556 23:45:40.012354 <3>[ 13.198709] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6557 23:45:40.023945 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6558 23:45:40.040837 <30>[ 13.229973] systemd[1]: Started systemd-journald.service - Journal Service.
6559 23:45:40.050579 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6560 23:45:40.073070 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6561 23:45:40.095733 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6562 23:45:40.115664 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6563 23:45:40.135508 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6564 23:45:40.154410 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6565 23:45:40.173264 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6566 23:45:40.193214 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6567 23:45:40.213342 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6568 23:45:40.233315 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6569 23:45:40.288721 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6570 23:45:40.310011 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6571 23:45:40.340785 <4>[ 13.522889] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6572 23:45:40.351385 <3>[ 13.540669] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6573 23:45:40.372666 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6574 23:45:40.396711 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6575 23:45:40.426406 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6576 23:45:40.437066 <46>[ 13.625906] systemd-journald[316]: Received client request to flush runtime journal.
6577 23:45:40.460898 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6578 23:45:40.496575 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6579 23:45:40.513771 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6580 23:45:40.539027 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6581 23:45:40.559231 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6582 23:45:41.231684 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6583 23:45:41.251409 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6584 23:45:41.309946 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6585 23:45:41.901691 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6586 23:45:41.959795 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6587 23:45:41.980529 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6588 23:45:42.004208 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6589 23:45:42.053011 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6590 23:45:42.078364 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6591 23:45:42.358486 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6592 23:45:42.433329 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6593 23:45:42.452894 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6594 23:45:42.521941 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6595 23:45:42.669217 <4>[ 15.861587] power_supply_show_property: 4 callbacks suppressed
6596 23:45:42.681640 <3>[ 15.861601] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6597 23:45:42.688268 <3>[ 15.873891] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6598 23:45:42.717660 <3>[ 15.906019] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6599 23:45:42.723869 <3>[ 15.908295] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6600 23:45:42.741835 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 15.929781] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6601 23:45:42.741948 d-backlight.
6602 23:45:42.756635 <3>[ 15.945731] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6603 23:45:42.770564 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m<3>[ 15.960385] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6604 23:45:42.773882 - Bluetooth Support.
6605 23:45:42.786613 <3>[ 15.975349] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6606 23:45:42.802233 <3>[ 15.991200] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6607 23:45:42.816980 <3>[ 16.005609] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6608 23:45:42.823764 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6609 23:45:42.867893 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6610 23:45:42.896280 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6611 23:45:43.007435 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6612 23:45:43.049241 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6613 23:45:43.070338 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6614 23:45:43.116199 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6615 23:45:43.136349 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6616 23:45:43.206545 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6617 23:45:43.257043 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6618 23:45:43.280175 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6619 23:45:43.309834 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6620 23:45:43.333554 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6621 23:45:43.355305 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6622 23:45:43.378019 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6623 23:45:43.397352 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6624 23:45:43.419598 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6625 23:45:43.443975 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6626 23:45:43.463524 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6627 23:45:43.493212 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6628 23:45:43.515960 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6629 23:45:43.532720 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6630 23:45:43.555942 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6631 23:45:43.579154 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6632 23:45:43.598231 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6633 23:45:43.614007 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6634 23:45:43.631744 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6635 23:45:43.648357 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6636 23:45:43.654816 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6637 23:45:43.698718 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6638 23:45:43.721257 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6639 23:45:43.753045 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6640 23:45:43.832548 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6641 23:45:43.861929 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6642 23:45:43.888148 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6643 23:45:43.908390 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6644 23:45:44.074723 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6645 23:45:44.093572 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6646 23:45:44.146638 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6647 23:45:44.165941 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6648 23:45:44.185189 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6649 23:45:44.201283 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6650 23:45:44.235456 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6651 23:45:44.260936 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6652 23:45:44.282018 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6653 23:45:44.329683 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6654 23:45:44.384565 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6655 23:45:44.458831
6656 23:45:44.461875 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6657 23:45:44.461979
6658 23:45:44.465088 debian-bookworm-arm64 login: root (automatic login)
6659 23:45:44.465195
6660 23:45:44.768522 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 4 23:28:43 UTC 2024 aarch64
6661 23:45:44.768678
6662 23:45:44.775388 The programs included with the Debian GNU/Linux system are free software;
6663 23:45:44.781702 the exact distribution terms for each program are described in the
6664 23:45:44.784866 individual files in /usr/share/doc/*/copyright.
6665 23:45:44.784947
6666 23:45:44.791389 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6667 23:45:44.794755 permitted by applicable law.
6668 23:45:45.965943 Matched prompt #10: / #
6670 23:45:45.966246 Setting prompt string to ['/ #']
6671 23:45:45.966348 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6673 23:45:45.966567 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6674 23:45:45.966666 start: 2.2.6 expect-shell-connection (timeout 00:03:40) [common]
6675 23:45:45.966743 Setting prompt string to ['/ #']
6676 23:45:45.966809 Forcing a shell prompt, looking for ['/ #']
6678 23:45:46.017009 / #
6679 23:45:46.017138 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6680 23:45:46.017226 Waiting using forced prompt support (timeout 00:02:30)
6681 23:45:46.022144
6682 23:45:46.022430 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6683 23:45:46.022530 start: 2.2.7 export-device-env (timeout 00:03:40) [common]
6685 23:45:46.122843 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j'
6686 23:45:46.128122 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14172955/extract-nfsrootfs-_1ta2p0j'
6688 23:45:46.228688 / # export NFS_SERVER_IP='192.168.201.1'
6689 23:45:46.233527 export NFS_SERVER_IP='192.168.201.1'
6690 23:45:46.233830 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6691 23:45:46.233939 end: 2.2 depthcharge-retry (duration 00:01:20) [common]
6692 23:45:46.234037 end: 2 depthcharge-action (duration 00:01:20) [common]
6693 23:45:46.234131 start: 3 lava-test-retry (timeout 00:07:53) [common]
6694 23:45:46.234228 start: 3.1 lava-test-shell (timeout 00:07:53) [common]
6695 23:45:46.234310 Using namespace: common
6697 23:45:46.334632 / # #
6698 23:45:46.334780 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6699 23:45:46.339605 #
6700 23:45:46.339879 Using /lava-14172955
6702 23:45:46.440205 / # export SHELL=/bin/bash
6703 23:45:46.445309 export SHELL=/bin/bash
6705 23:45:46.545847 / # . /lava-14172955/environment
6706 23:45:46.550979 . /lava-14172955/environment
6708 23:45:46.655964 / # /lava-14172955/bin/lava-test-runner /lava-14172955/0
6709 23:45:46.656128 Test shell timeout: 10s (minimum of the action and connection timeout)
6710 23:45:46.660802 /lava-14172955/bin/lava-test-runner /lava-14172955/0
6711 23:45:46.888098 + export TESTRUN_ID=0_timesync-off
6712 23:45:46.891424 + TESTRUN_ID=0_timesync-off
6713 23:45:46.894539 + cd /lava-14172955/0/tests/0_timesync-off
6714 23:45:46.897983 ++ cat uuid
6715 23:45:46.901004 + UUID=14172955_1.6.2.3.1
6716 23:45:46.901098 + set +x
6717 23:45:46.907690 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14172955_1.6.2.3.1>
6718 23:45:46.907971 Received signal: <STARTRUN> 0_timesync-off 14172955_1.6.2.3.1
6719 23:45:46.908056 Starting test lava.0_timesync-off (14172955_1.6.2.3.1)
6720 23:45:46.908154 Skipping test definition patterns.
6721 23:45:46.911005 + systemctl stop systemd-timesyncd
6722 23:45:46.977225 + set +x
6723 23:45:46.980264 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14172955_1.6.2.3.1>
6724 23:45:46.980533 Received signal: <ENDRUN> 0_timesync-off 14172955_1.6.2.3.1
6725 23:45:46.980625 Ending use of test pattern.
6726 23:45:46.980694 Ending test lava.0_timesync-off (14172955_1.6.2.3.1), duration 0.07
6728 23:45:47.037048 + export TESTRUN_ID=1_kselftest-tpm2
6729 23:45:47.037174 + TESTRUN_ID=1_kselftest-tpm2
6730 23:45:47.043380 + cd /lava-14172955/0/tests/1_kselftest-tpm2
6731 23:45:47.043474 ++ cat uuid
6732 23:45:47.046589 + UUID=14172955_1.6.2.3.5
6733 23:45:47.046682 + set +x
6734 23:45:47.049723 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14172955_1.6.2.3.5>
6735 23:45:47.049991 Received signal: <STARTRUN> 1_kselftest-tpm2 14172955_1.6.2.3.5
6736 23:45:47.050068 Starting test lava.1_kselftest-tpm2 (14172955_1.6.2.3.5)
6737 23:45:47.050159 Skipping test definition patterns.
6738 23:45:47.053273 + cd ./automated/linux/kselftest/
6739 23:45:47.079150 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6740 23:45:47.108463 INFO: install_deps skipped
6741 23:45:47.592332 --2024-06-04 23:45:47-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6742 23:45:47.598811 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6743 23:45:47.727142 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6744 23:45:47.856020 HTTP request sent, awaiting response... 200 OK
6745 23:45:47.859520 Length: 1642752 (1.6M) [application/octet-stream]
6746 23:45:47.862489 Saving to: 'kselftest_armhf.tar.gz'
6747 23:45:47.862579
6748 23:45:47.862652
6749 23:45:48.114584 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6750 23:45:48.372904 kselftest_armhf.tar 2%[ ] 43.57K 165KB/s
6751 23:45:48.678677 kselftest_armhf.tar 13%[=> ] 213.25K 405KB/s
6752 23:45:48.808159 kselftest_armhf.tar 53%[=========> ] 851.00K 1015KB/s
6753 23:45:48.814803 kselftest_armhf.tar 100%[===================>] 1.57M 1.61MB/s in 1.0s
6754 23:45:48.814920
6755 23:45:48.958858 2024-06-04 23:45:48 (1.61 MB/s) - 'kselftest_armhf.tar.gz' saved [1642752/1642752]
6756 23:45:48.959045
6757 23:45:53.344710 skiplist:
6758 23:45:53.348089 ========================================
6759 23:45:53.351202 ========================================
6760 23:45:53.400876 tpm2:test_smoke.sh
6761 23:45:53.403867 tpm2:test_space.sh
6762 23:45:53.421545 ============== Tests to run ===============
6763 23:45:53.424647 tpm2:test_smoke.sh
6764 23:45:53.424740 tpm2:test_space.sh
6765 23:45:53.427781 ===========End Tests to run ===============
6766 23:45:53.431140 shardfile-tpm2 pass
6767 23:45:53.549672 <12>[ 26.742073] kselftest: Running tests in tpm2
6768 23:45:53.560502 TAP version 13
6769 23:45:53.575750 1..2
6770 23:45:53.612896 # selftests: tpm2: test_smoke.sh
6771 23:45:55.553912 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6772 23:45:55.560496 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6773 23:45:55.566880 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6774 23:45:55.570121 # Traceback (most recent call last):
6775 23:45:55.580105 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6776 23:45:55.580645 # if self.tpm:
6777 23:45:55.583214 # ^^^^^^^^
6778 23:45:55.586271 # AttributeError: 'Client' object has no attribute 'tpm'
6779 23:45:55.592957 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6780 23:45:55.599572 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6781 23:45:55.602961 # Traceback (most recent call last):
6782 23:45:55.612661 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6783 23:45:55.615989 # if self.tpm:
6784 23:45:55.616381 # ^^^^^^^^
6785 23:45:55.622446 # AttributeError: 'Client' object has no attribute 'tpm'
6786 23:45:55.629064 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6787 23:45:55.635841 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6788 23:45:55.638966 # Traceback (most recent call last):
6789 23:45:55.648682 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6790 23:45:55.649103 # if self.tpm:
6791 23:45:55.652032 # ^^^^^^^^
6792 23:45:55.655400 # AttributeError: 'Client' object has no attribute 'tpm'
6793 23:45:55.665185 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6794 23:45:55.671852 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6795 23:45:55.675195 # Traceback (most recent call last):
6796 23:45:55.684906 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6797 23:45:55.684998 # if self.tpm:
6798 23:45:55.687927 # ^^^^^^^^
6799 23:45:55.691368 # AttributeError: 'Client' object has no attribute 'tpm'
6800 23:45:55.697809 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6801 23:45:55.704334 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6802 23:45:55.707639 # Traceback (most recent call last):
6803 23:45:55.717897 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6804 23:45:55.720970 # if self.tpm:
6805 23:45:55.721058 # ^^^^^^^^
6806 23:45:55.727402 # AttributeError: 'Client' object has no attribute 'tpm'
6807 23:45:55.734123 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6808 23:45:55.737457 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6809 23:45:55.740556 # Traceback (most recent call last):
6810 23:45:55.750784 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6811 23:45:55.753825 # if self.tpm:
6812 23:45:55.753943 # ^^^^^^^^
6813 23:45:55.760385 # AttributeError: 'Client' object has no attribute 'tpm'
6814 23:45:55.770142 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6815 23:45:55.773252 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6816 23:45:55.776862 # Traceback (most recent call last):
6817 23:45:55.786763 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6818 23:45:55.789830 # if self.tpm:
6819 23:45:55.789930 # ^^^^^^^^
6820 23:45:55.796216 # AttributeError: 'Client' object has no attribute 'tpm'
6821 23:45:55.802990 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6822 23:45:55.809325 # Exception ignored in: <function Client.__del__ at 0xffffa787ccc0>
6823 23:45:55.812633 # Traceback (most recent call last):
6824 23:45:55.822449 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6825 23:45:55.825573 # if self.tpm:
6826 23:45:55.829223 # ^^^^^^^^
6827 23:45:55.832499 # AttributeError: 'Client' object has no attribute 'tpm'
6828 23:45:55.832617 #
6829 23:45:55.838918 # ======================================================================
6830 23:45:55.849057 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6831 23:45:55.855181 # ----------------------------------------------------------------------
6832 23:45:55.858433 # Traceback (most recent call last):
6833 23:45:55.868316 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6834 23:45:55.871534 # self.root_key = self.client.create_root_key()
6835 23:45:55.877922 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6836 23:45:55.887848 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6837 23:45:55.894642 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6838 23:45:55.897655 # ^^^^^^^^^^^^^^^^^^
6839 23:45:55.907644 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6840 23:45:55.910828 # raise ProtocolError(cc, rc)
6841 23:45:55.917410 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6842 23:45:55.917567 #
6843 23:45:55.924052 # ======================================================================
6844 23:45:55.930895 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6845 23:45:55.937237 # ----------------------------------------------------------------------
6846 23:45:55.940658 # Traceback (most recent call last):
6847 23:45:55.954146 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6848 23:45:55.954568 # self.client = tpm2.Client()
6849 23:45:55.956853 # ^^^^^^^^^^^^^
6850 23:45:55.971440 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6851 23:45:55.974643 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6852 23:45:55.977937 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6853 23:45:55.984498 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6854 23:45:55.985020 #
6855 23:45:55.991119 # ======================================================================
6856 23:45:55.997796 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6857 23:45:56.004237 # ----------------------------------------------------------------------
6858 23:45:56.007541 # Traceback (most recent call last):
6859 23:45:56.017279 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6860 23:45:56.020700 # self.client = tpm2.Client()
6861 23:45:56.023798 # ^^^^^^^^^^^^^
6862 23:45:56.033618 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6863 23:45:56.037149 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6864 23:45:56.043696 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6865 23:45:56.047052 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6866 23:45:56.047559 #
6867 23:45:56.053524 # ======================================================================
6868 23:45:56.059886 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6869 23:45:56.066168 # ----------------------------------------------------------------------
6870 23:45:56.069310 # Traceback (most recent call last):
6871 23:45:56.078834 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6872 23:45:56.082328 # self.client = tpm2.Client()
6873 23:45:56.085629 # ^^^^^^^^^^^^^
6874 23:45:56.095662 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6875 23:45:56.102239 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6876 23:45:56.105137 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6877 23:45:56.111459 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6878 23:45:56.111552 #
6879 23:45:56.118251 # ======================================================================
6880 23:45:56.124901 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6881 23:45:56.131630 # ----------------------------------------------------------------------
6882 23:45:56.135119 # Traceback (most recent call last):
6883 23:45:56.144835 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6884 23:45:56.147799 # self.client = tpm2.Client()
6885 23:45:56.151331 # ^^^^^^^^^^^^^
6886 23:45:56.160974 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6887 23:45:56.167722 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6888 23:45:56.171109 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6889 23:45:56.177759 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6890 23:45:56.178257 #
6891 23:45:56.184173 # ======================================================================
6892 23:45:56.190935 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6893 23:45:56.197158 # ----------------------------------------------------------------------
6894 23:45:56.200686 # Traceback (most recent call last):
6895 23:45:56.210236 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6896 23:45:56.213813 # self.client = tpm2.Client()
6897 23:45:56.216606 # ^^^^^^^^^^^^^
6898 23:45:56.226884 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6899 23:45:56.233299 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6900 23:45:56.236744 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6901 23:45:56.243163 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6902 23:45:56.243847 #
6903 23:45:56.249490 # ======================================================================
6904 23:45:56.256176 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6905 23:45:56.262583 # ----------------------------------------------------------------------
6906 23:45:56.266241 # Traceback (most recent call last):
6907 23:45:56.275748 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6908 23:45:56.279098 # self.client = tpm2.Client()
6909 23:45:56.282422 # ^^^^^^^^^^^^^
6910 23:45:56.292205 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6911 23:45:56.298491 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6912 23:45:56.302202 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6913 23:45:56.308623 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6914 23:45:56.309218 #
6915 23:45:56.315083 # ======================================================================
6916 23:45:56.321784 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6917 23:45:56.328276 # ----------------------------------------------------------------------
6918 23:45:56.331621 # Traceback (most recent call last):
6919 23:45:56.341484 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6920 23:45:56.344778 # self.client = tpm2.Client()
6921 23:45:56.347812 # ^^^^^^^^^^^^^
6922 23:45:56.357773 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6923 23:45:56.364532 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6924 23:45:56.367489 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6925 23:45:56.374290 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6926 23:45:56.374674 #
6927 23:45:56.380646 # ======================================================================
6928 23:45:56.387740 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6929 23:45:56.394893 # ----------------------------------------------------------------------
6930 23:45:56.398213 # Traceback (most recent call last):
6931 23:45:56.408543 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6932 23:45:56.414291 # self.client = tpm2.Client()
6933 23:45:56.414793 # ^^^^^^^^^^^^^
6934 23:45:56.424212 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6935 23:45:56.428564 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6936 23:45:56.435083 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6937 23:45:56.438731 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6938 23:45:56.439238 #
6939 23:45:56.445999 # ----------------------------------------------------------------------
6940 23:45:56.449374 # Ran 9 tests in 0.064s
6941 23:45:56.449827 #
6942 23:45:56.450156 # FAILED (errors=9)
6943 23:45:56.456067 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6944 23:45:56.462446 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6945 23:45:56.462999 #
6946 23:45:56.469083 # ----------------------------------------------------------------------
6947 23:45:56.472297 # Ran 2 tests in 0.035s
6948 23:45:56.472887 #
6949 23:45:56.473413 # OK
6950 23:45:56.475958 ok 1 selftests: tpm2: test_smoke.sh
6951 23:45:56.479237 # selftests: tpm2: test_space.sh
6952 23:45:56.485858 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6953 23:45:56.492179 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6954 23:45:56.498813 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6955 23:45:56.505242 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6956 23:45:56.505772 #
6957 23:45:56.511903 # ======================================================================
6958 23:45:56.518279 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6959 23:45:56.525023 # ----------------------------------------------------------------------
6960 23:45:56.528027 # Traceback (most recent call last):
6961 23:45:56.538250 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6962 23:45:56.541532 # root1 = space1.create_root_key()
6963 23:45:56.544909 # ^^^^^^^^^^^^^^^^^^^^^^^^
6964 23:45:56.557827 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6965 23:45:56.561130 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6966 23:45:56.567536 # ^^^^^^^^^^^^^^^^^^
6967 23:45:56.577482 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6968 23:45:56.580869 # raise ProtocolError(cc, rc)
6969 23:45:56.584092 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6970 23:45:56.584682 #
6971 23:45:56.590790 # ======================================================================
6972 23:45:56.597131 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6973 23:45:56.603806 # ----------------------------------------------------------------------
6974 23:45:56.607214 # Traceback (most recent call last):
6975 23:45:56.619977 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6976 23:45:56.620419 # space1.create_root_key()
6977 23:45:56.633380 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6978 23:45:56.636472 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6979 23:45:56.642964 # ^^^^^^^^^^^^^^^^^^
6980 23:45:56.652984 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6981 23:45:56.655995 # raise ProtocolError(cc, rc)
6982 23:45:56.659528 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6983 23:45:56.662973 #
6984 23:45:56.669372 # ======================================================================
6985 23:45:56.672412 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6986 23:45:56.679157 # ----------------------------------------------------------------------
6987 23:45:56.682188 # Traceback (most recent call last):
6988 23:45:56.695524 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6989 23:45:56.698902 # root1 = space1.create_root_key()
6990 23:45:56.702000 # ^^^^^^^^^^^^^^^^^^^^^^^^
6991 23:45:56.711790 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6992 23:45:56.718375 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6993 23:45:56.721511 # ^^^^^^^^^^^^^^^^^^
6994 23:45:56.731281 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6995 23:45:56.734835 # raise ProtocolError(cc, rc)
6996 23:45:56.741253 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6997 23:45:56.741374 #
6998 23:45:56.747725 # ======================================================================
6999 23:45:56.754575 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
7000 23:45:56.760936 # ----------------------------------------------------------------------
7001 23:45:56.764405 # Traceback (most recent call last):
7002 23:45:56.774467 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
7003 23:45:56.777309 # root1 = space1.create_root_key()
7004 23:45:56.783799 # ^^^^^^^^^^^^^^^^^^^^^^^^
7005 23:45:56.793750 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
7006 23:45:56.796988 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
7007 23:45:56.803456 # ^^^^^^^^^^^^^^^^^^
7008 23:45:56.813411 # File "/lava-14172955/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
7009 23:45:56.816834 # raise ProtocolError(cc, rc)
7010 23:45:56.823121 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
7011 23:45:56.823211 #
7012 23:45:56.830001 # ----------------------------------------------------------------------
7013 23:45:56.833367 # Ran 4 tests in 0.083s
7014 23:45:56.833482 #
7015 23:45:56.833554 # FAILED (errors=4)
7016 23:45:56.839493 not ok 2 selftests: tpm2: test_space.sh # exit=1
7017 23:45:57.242484 tpm2_test_smoke_sh pass
7018 23:45:57.245637 tpm2_test_space_sh fail
7019 23:45:57.329001 + ../../utils/send-to-lava.sh ./output/result.txt
7020 23:45:57.396127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
7021 23:45:57.396477 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
7023 23:45:57.443144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
7024 23:45:57.443470 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
7026 23:45:57.482871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
7027 23:45:57.483170 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
7029 23:45:57.486301 + set +x
7030 23:45:57.489453 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14172955_1.6.2.3.5>
7031 23:45:57.489721 Received signal: <ENDRUN> 1_kselftest-tpm2 14172955_1.6.2.3.5
7032 23:45:57.489811 Ending use of test pattern.
7033 23:45:57.489896 Ending test lava.1_kselftest-tpm2 (14172955_1.6.2.3.5), duration 10.44
7035 23:45:57.492755 <LAVA_TEST_RUNNER EXIT>
7036 23:45:57.493023 ok: lava_test_shell seems to have completed
7037 23:45:57.493150 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
7038 23:45:57.493247 end: 3.1 lava-test-shell (duration 00:00:11) [common]
7039 23:45:57.493353 end: 3 lava-test-retry (duration 00:00:11) [common]
7040 23:45:57.493465 start: 4 finalize (timeout 00:07:42) [common]
7041 23:45:57.493579 start: 4.1 power-off (timeout 00:00:30) [common]
7042 23:45:57.493759 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
7043 23:45:58.852587 >> Command sent successfully.
7044 23:45:58.855208 Returned 0 in 1 seconds
7045 23:45:58.955589 end: 4.1 power-off (duration 00:00:01) [common]
7047 23:45:58.955945 start: 4.2 read-feedback (timeout 00:07:40) [common]
7048 23:45:58.956247 Listened to connection for namespace 'common' for up to 1s
7049 23:45:59.956673 Finalising connection for namespace 'common'
7050 23:45:59.956902 Disconnecting from shell: Finalise
7051 23:45:59.956992 / #
7052 23:46:00.057361 end: 4.2 read-feedback (duration 00:00:01) [common]
7053 23:46:00.057671 end: 4 finalize (duration 00:00:03) [common]
7054 23:46:00.057912 Cleaning after the job
7055 23:46:00.058121 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/ramdisk
7056 23:46:00.061859 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/kernel
7057 23:46:00.073528 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/dtb
7058 23:46:00.073709 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/nfsrootfs
7059 23:46:00.141287 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172955/tftp-deploy-74mqdctt/modules
7060 23:46:00.147315 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14172955
7061 23:46:00.759867 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14172955
7062 23:46:00.760089 Job finished correctly