Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 40
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 85
1 23:41:50.789447 lava-dispatcher, installed at version: 2024.03
2 23:41:50.789687 start: 0 validate
3 23:41:50.789834 Start time: 2024-06-04 23:41:50.789825+00:00 (UTC)
4 23:41:50.789978 Using caching service: 'http://localhost/cache/?uri=%s'
5 23:41:50.790122 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 23:41:51.053935 Using caching service: 'http://localhost/cache/?uri=%s'
7 23:41:51.054754 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 23:42:01.558672 Using caching service: 'http://localhost/cache/?uri=%s'
9 23:42:01.559400 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 23:42:01.814980 Using caching service: 'http://localhost/cache/?uri=%s'
11 23:42:01.815696 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.92-cip22%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 23:42:05.069776 validate duration: 14.28
14 23:42:05.070480 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 23:42:05.070816 start: 1.1 download-retry (timeout 00:10:00) [common]
16 23:42:05.071198 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 23:42:05.071581 Not decompressing ramdisk as can be used compressed.
18 23:42:05.071833 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
19 23:42:05.072027 saving as /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/ramdisk/rootfs.cpio.gz
20 23:42:05.072216 total size: 28105535 (26 MB)
21 23:42:05.332653 progress 0 % (0 MB)
22 23:42:05.348949 progress 5 % (1 MB)
23 23:42:05.359974 progress 10 % (2 MB)
24 23:42:05.368522 progress 15 % (4 MB)
25 23:42:05.376966 progress 20 % (5 MB)
26 23:42:05.385437 progress 25 % (6 MB)
27 23:42:05.393768 progress 30 % (8 MB)
28 23:42:05.402011 progress 35 % (9 MB)
29 23:42:05.410097 progress 40 % (10 MB)
30 23:42:05.418360 progress 45 % (12 MB)
31 23:42:05.426646 progress 50 % (13 MB)
32 23:42:05.435571 progress 55 % (14 MB)
33 23:42:05.443898 progress 60 % (16 MB)
34 23:42:05.452186 progress 65 % (17 MB)
35 23:42:05.460499 progress 70 % (18 MB)
36 23:42:05.468905 progress 75 % (20 MB)
37 23:42:05.477347 progress 80 % (21 MB)
38 23:42:05.485616 progress 85 % (22 MB)
39 23:42:05.493580 progress 90 % (24 MB)
40 23:42:05.501717 progress 95 % (25 MB)
41 23:42:05.509651 progress 100 % (26 MB)
42 23:42:05.509899 26 MB downloaded in 0.44 s (61.24 MB/s)
43 23:42:05.510076 end: 1.1.1 http-download (duration 00:00:00) [common]
45 23:42:05.510344 end: 1.1 download-retry (duration 00:00:00) [common]
46 23:42:05.510440 start: 1.2 download-retry (timeout 00:10:00) [common]
47 23:42:05.510537 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 23:42:05.510695 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 23:42:05.510780 saving as /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/kernel/Image
50 23:42:05.510849 total size: 54682112 (52 MB)
51 23:42:05.510918 No compression specified
52 23:42:05.512161 progress 0 % (0 MB)
53 23:42:05.528307 progress 5 % (2 MB)
54 23:42:05.544256 progress 10 % (5 MB)
55 23:42:05.560497 progress 15 % (7 MB)
56 23:42:05.576612 progress 20 % (10 MB)
57 23:42:05.592398 progress 25 % (13 MB)
58 23:42:05.608067 progress 30 % (15 MB)
59 23:42:05.624185 progress 35 % (18 MB)
60 23:42:05.640744 progress 40 % (20 MB)
61 23:42:05.657249 progress 45 % (23 MB)
62 23:42:05.673204 progress 50 % (26 MB)
63 23:42:05.688966 progress 55 % (28 MB)
64 23:42:05.705172 progress 60 % (31 MB)
65 23:42:05.721465 progress 65 % (33 MB)
66 23:42:05.737675 progress 70 % (36 MB)
67 23:42:05.753573 progress 75 % (39 MB)
68 23:42:05.769705 progress 80 % (41 MB)
69 23:42:05.785854 progress 85 % (44 MB)
70 23:42:05.802085 progress 90 % (46 MB)
71 23:42:05.817999 progress 95 % (49 MB)
72 23:42:05.834048 progress 100 % (52 MB)
73 23:42:05.834377 52 MB downloaded in 0.32 s (161.19 MB/s)
74 23:42:05.834559 end: 1.2.1 http-download (duration 00:00:00) [common]
76 23:42:05.834841 end: 1.2 download-retry (duration 00:00:00) [common]
77 23:42:05.834947 start: 1.3 download-retry (timeout 00:09:59) [common]
78 23:42:05.835040 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 23:42:05.835198 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 23:42:05.835284 saving as /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 23:42:05.835352 total size: 57695 (0 MB)
82 23:42:05.835429 No compression specified
83 23:42:05.836712 progress 56 % (0 MB)
84 23:42:05.837059 progress 100 % (0 MB)
85 23:42:05.837302 0 MB downloaded in 0.00 s (28.25 MB/s)
86 23:42:05.837448 end: 1.3.1 http-download (duration 00:00:00) [common]
88 23:42:05.837715 end: 1.3 download-retry (duration 00:00:00) [common]
89 23:42:05.837814 start: 1.4 download-retry (timeout 00:09:59) [common]
90 23:42:05.837907 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 23:42:05.838033 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.92-cip22/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 23:42:05.838107 saving as /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/modules/modules.tar
93 23:42:05.838173 total size: 8603924 (8 MB)
94 23:42:05.838241 Using unxz to decompress xz
95 23:42:05.842484 progress 0 % (0 MB)
96 23:42:05.864453 progress 5 % (0 MB)
97 23:42:05.891382 progress 10 % (0 MB)
98 23:42:05.919719 progress 15 % (1 MB)
99 23:42:05.947219 progress 20 % (1 MB)
100 23:42:05.975589 progress 25 % (2 MB)
101 23:42:06.003328 progress 30 % (2 MB)
102 23:42:06.029504 progress 35 % (2 MB)
103 23:42:06.058392 progress 40 % (3 MB)
104 23:42:06.085605 progress 45 % (3 MB)
105 23:42:06.112646 progress 50 % (4 MB)
106 23:42:06.141419 progress 55 % (4 MB)
107 23:42:06.170421 progress 60 % (4 MB)
108 23:42:06.196854 progress 65 % (5 MB)
109 23:42:06.226263 progress 70 % (5 MB)
110 23:42:06.254212 progress 75 % (6 MB)
111 23:42:06.282316 progress 80 % (6 MB)
112 23:42:06.308657 progress 85 % (7 MB)
113 23:42:06.335215 progress 90 % (7 MB)
114 23:42:06.367728 progress 95 % (7 MB)
115 23:42:06.398706 progress 100 % (8 MB)
116 23:42:06.404820 8 MB downloaded in 0.57 s (14.48 MB/s)
117 23:42:06.405105 end: 1.4.1 http-download (duration 00:00:01) [common]
119 23:42:06.405435 end: 1.4 download-retry (duration 00:00:01) [common]
120 23:42:06.405541 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 23:42:06.405658 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 23:42:06.405767 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 23:42:06.405875 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 23:42:06.406137 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g
125 23:42:06.406293 makedir: /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin
126 23:42:06.406430 makedir: /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/tests
127 23:42:06.406554 makedir: /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/results
128 23:42:06.406684 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-add-keys
129 23:42:06.406856 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-add-sources
130 23:42:06.407011 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-background-process-start
131 23:42:06.407174 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-background-process-stop
132 23:42:06.407324 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-common-functions
133 23:42:06.407490 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-echo-ipv4
134 23:42:06.407632 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-install-packages
135 23:42:06.407783 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-installed-packages
136 23:42:06.407933 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-os-build
137 23:42:06.408081 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-probe-channel
138 23:42:06.408219 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-probe-ip
139 23:42:06.408367 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-target-ip
140 23:42:06.408543 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-target-mac
141 23:42:06.408703 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-target-storage
142 23:42:06.408865 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-case
143 23:42:06.409004 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-event
144 23:42:06.409153 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-feedback
145 23:42:06.409303 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-raise
146 23:42:06.409449 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-reference
147 23:42:06.409587 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-runner
148 23:42:06.409733 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-set
149 23:42:06.409886 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-test-shell
150 23:42:06.410040 Updating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-install-packages (oe)
151 23:42:06.410214 Updating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/bin/lava-installed-packages (oe)
152 23:42:06.410392 Creating /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/environment
153 23:42:06.410510 LAVA metadata
154 23:42:06.410608 - LAVA_JOB_ID=14172910
155 23:42:06.410680 - LAVA_DISPATCHER_IP=192.168.201.1
156 23:42:06.410807 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 23:42:06.410882 skipped lava-vland-overlay
158 23:42:06.410965 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 23:42:06.411073 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 23:42:06.411156 skipped lava-multinode-overlay
161 23:42:06.411249 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 23:42:06.411341 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 23:42:06.411444 Loading test definitions
164 23:42:06.411549 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 23:42:06.411641 Using /lava-14172910 at stage 0
166 23:42:06.412006 uuid=14172910_1.5.2.3.1 testdef=None
167 23:42:06.412112 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 23:42:06.412257 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 23:42:06.412881 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 23:42:06.413141 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 23:42:06.413864 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 23:42:06.414129 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 23:42:06.414840 runner path: /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/0/tests/0_v4l2-compliance-uvc test_uuid 14172910_1.5.2.3.1
176 23:42:06.415029 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 23:42:06.415274 Creating lava-test-runner.conf files
179 23:42:06.415384 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14172910/lava-overlay-j8mn5b0g/lava-14172910/0 for stage 0
180 23:42:06.415499 - 0_v4l2-compliance-uvc
181 23:42:06.415607 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 23:42:06.415703 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 23:42:06.424856 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 23:42:06.424994 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 23:42:06.425093 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 23:42:06.425189 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 23:42:06.425289 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 23:42:07.413924 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 23:42:07.414364 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 23:42:07.414492 extracting modules file /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14172910/extract-overlay-ramdisk-4dwcxs4f/ramdisk
191 23:42:07.675938 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 23:42:07.676133 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 23:42:07.676242 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14172910/compress-overlay-8pgsodx8/overlay-1.5.2.4.tar.gz to ramdisk
194 23:42:07.676335 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14172910/compress-overlay-8pgsodx8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14172910/extract-overlay-ramdisk-4dwcxs4f/ramdisk
195 23:42:07.684551 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 23:42:07.684686 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 23:42:07.684788 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 23:42:07.684886 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 23:42:07.684977 Building ramdisk /var/lib/lava/dispatcher/tmp/14172910/extract-overlay-ramdisk-4dwcxs4f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14172910/extract-overlay-ramdisk-4dwcxs4f/ramdisk
200 23:42:08.484965 >> 275883 blocks
201 23:42:12.978135 rename /var/lib/lava/dispatcher/tmp/14172910/extract-overlay-ramdisk-4dwcxs4f/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/ramdisk/ramdisk.cpio.gz
202 23:42:12.978650 end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
203 23:42:12.978804 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
204 23:42:12.978917 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
205 23:42:12.979051 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/kernel/Image']
206 23:42:27.595177 Returned 0 in 14 seconds
207 23:42:27.695876 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/kernel/image.itb
208 23:42:28.394291 output: FIT description: Kernel Image image with one or more FDT blobs
209 23:42:28.394729 output: Created: Wed Jun 5 00:42:28 2024
210 23:42:28.394841 output: Image 0 (kernel-1)
211 23:42:28.394917 output: Description:
212 23:42:28.395037 output: Created: Wed Jun 5 00:42:28 2024
213 23:42:28.395153 output: Type: Kernel Image
214 23:42:28.395256 output: Compression: lzma compressed
215 23:42:28.395367 output: Data Size: 13061430 Bytes = 12755.30 KiB = 12.46 MiB
216 23:42:28.395474 output: Architecture: AArch64
217 23:42:28.395593 output: OS: Linux
218 23:42:28.395673 output: Load Address: 0x00000000
219 23:42:28.395762 output: Entry Point: 0x00000000
220 23:42:28.395827 output: Hash algo: crc32
221 23:42:28.395890 output: Hash value: ecfb5096
222 23:42:28.395972 output: Image 1 (fdt-1)
223 23:42:28.396036 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 23:42:28.396114 output: Created: Wed Jun 5 00:42:28 2024
225 23:42:28.396180 output: Type: Flat Device Tree
226 23:42:28.396239 output: Compression: uncompressed
227 23:42:28.396307 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 23:42:28.396368 output: Architecture: AArch64
229 23:42:28.396426 output: Hash algo: crc32
230 23:42:28.396493 output: Hash value: a9713552
231 23:42:28.396553 output: Image 2 (ramdisk-1)
232 23:42:28.396612 output: Description: unavailable
233 23:42:28.396679 output: Created: Wed Jun 5 00:42:28 2024
234 23:42:28.396740 output: Type: RAMDisk Image
235 23:42:28.396799 output: Compression: Unknown Compression
236 23:42:28.396864 output: Data Size: 41214259 Bytes = 40248.30 KiB = 39.30 MiB
237 23:42:28.396926 output: Architecture: AArch64
238 23:42:28.396985 output: OS: Linux
239 23:42:28.397050 output: Load Address: unavailable
240 23:42:28.397111 output: Entry Point: unavailable
241 23:42:28.397169 output: Hash algo: crc32
242 23:42:28.397227 output: Hash value: dc1ee65e
243 23:42:28.397294 output: Default Configuration: 'conf-1'
244 23:42:28.397352 output: Configuration 0 (conf-1)
245 23:42:28.397411 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 23:42:28.397480 output: Kernel: kernel-1
247 23:42:28.397539 output: Init Ramdisk: ramdisk-1
248 23:42:28.397597 output: FDT: fdt-1
249 23:42:28.397681 output: Loadables: kernel-1
250 23:42:28.397776 output:
251 23:42:28.398043 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 23:42:28.398154 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 23:42:28.398280 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 23:42:28.398390 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
255 23:42:28.398488 No LXC device requested
256 23:42:28.398579 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 23:42:28.398684 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
258 23:42:28.398784 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 23:42:28.398867 Checking files for TFTP limit of 4294967296 bytes.
260 23:42:28.399573 end: 1 tftp-deploy (duration 00:00:23) [common]
261 23:42:28.399693 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 23:42:28.399809 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 23:42:28.399964 substitutions:
264 23:42:28.400052 - {DTB}: 14172910/tftp-deploy-imj4l_g0/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 23:42:28.400131 - {INITRD}: 14172910/tftp-deploy-imj4l_g0/ramdisk/ramdisk.cpio.gz
266 23:42:28.400200 - {KERNEL}: 14172910/tftp-deploy-imj4l_g0/kernel/Image
267 23:42:28.400266 - {LAVA_MAC}: None
268 23:42:28.400339 - {PRESEED_CONFIG}: None
269 23:42:28.400403 - {PRESEED_LOCAL}: None
270 23:42:28.400464 - {RAMDISK}: 14172910/tftp-deploy-imj4l_g0/ramdisk/ramdisk.cpio.gz
271 23:42:28.400535 - {ROOT_PART}: None
272 23:42:28.400597 - {ROOT}: None
273 23:42:28.400657 - {SERVER_IP}: 192.168.201.1
274 23:42:28.400730 - {TEE}: None
275 23:42:28.400792 Parsed boot commands:
276 23:42:28.400853 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 23:42:28.401050 Parsed boot commands: tftpboot 192.168.201.1 14172910/tftp-deploy-imj4l_g0/kernel/image.itb 14172910/tftp-deploy-imj4l_g0/kernel/cmdline
278 23:42:28.401164 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 23:42:28.401273 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 23:42:28.401380 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 23:42:28.401484 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 23:42:28.401568 Not connected, no need to disconnect.
283 23:42:28.401654 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 23:42:28.401759 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 23:42:28.401834 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 23:42:28.405823 Setting prompt string to ['lava-test: # ']
287 23:42:28.406302 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 23:42:28.406427 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 23:42:28.406551 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 23:42:28.406661 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 23:42:28.406876 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
292 23:42:52.960012 Returned 0 in 24 seconds
293 23:42:53.061145 end: 2.2.2.1 pdu-reboot (duration 00:00:25) [common]
295 23:42:53.063885 end: 2.2.2 reset-device (duration 00:00:25) [common]
296 23:42:53.064391 start: 2.2.3 depthcharge-start (timeout 00:04:35) [common]
297 23:42:53.064860 Setting prompt string to 'Starting depthcharge on Juniper...'
298 23:42:53.065230 Changing prompt to 'Starting depthcharge on Juniper...'
299 23:42:53.065556 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 23:42:53.067482 [Enter `^Ec?' for help]
301 23:42:53.067970 [DL] 00000000 00000000 010701
302 23:42:53.068305
303 23:42:53.068637
304 23:42:53.068950 F0: 102B 0000
305 23:42:53.069355
306 23:42:53.069677 F3: 1006 0033 [0200]
307 23:42:53.069983
308 23:42:53.070273 F3: 4001 00E0 [0200]
309 23:42:53.070619
310 23:42:53.070900 F3: 0000 0000
311 23:42:53.071178
312 23:42:53.071520 V0: 0000 0000 [0001]
313 23:42:53.071880
314 23:42:53.072160 00: 1027 0002
315 23:42:53.072454
316 23:42:53.072728 01: 0000 0000
317 23:42:53.073111
318 23:42:53.073419 BP: 0C00 0251 [0000]
319 23:42:53.073692
320 23:42:53.074057 G0: 1182 0000
321 23:42:53.074409
322 23:42:53.074690 EC: 0004 0000 [0001]
323 23:42:53.074964
324 23:42:53.075235 S7: 0000 0000 [0000]
325 23:42:53.075614
326 23:42:53.075904 CC: 0000 0000 [0001]
327 23:42:53.076237
328 23:42:53.076517 T0: 0000 00DB [000F]
329 23:42:53.076794
330 23:42:53.077128 Jump to BL
331 23:42:53.077403
332 23:42:53.077674
333 23:42:53.077943
334 23:42:53.078247 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 23:42:53.078727 ARM64: Exception handlers installed.
336 23:42:53.079039 ARM64: Testing exception
337 23:42:53.079317 ARM64: Done test exception
338 23:42:53.079750 WDT: Last reset was cold boot
339 23:42:53.080037 SPI0(PAD0) initialized at 992727 Hz
340 23:42:53.080314 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 23:42:53.080591 Manufacturer: ef
342 23:42:53.081007 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 23:42:53.081332 Probing TPM: . done!
344 23:42:53.081609 TPM ready after 0 ms
345 23:42:53.081887 Connected to device vid:did:rid of 1ae0:0028:00
346 23:42:53.082262 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 23:42:53.082622 Initialized TPM device CR50 revision 0
348 23:42:53.083089 tlcl_send_startup: Startup return code is 0
349 23:42:53.083386 TPM: setup succeeded
350 23:42:53.083755 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 23:42:53.084064 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 23:42:53.084343 in-header: 03 19 00 00 08 00 00 00
353 23:42:53.084617 in-data: a2 e0 47 00 13 00 00 00
354 23:42:53.085012 Chrome EC: UHEPI supported
355 23:42:53.085328 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 23:42:53.085610 in-header: 03 a1 00 00 08 00 00 00
357 23:42:53.085885 in-data: 84 60 60 10 00 00 00 00
358 23:42:53.086254 Phase 1
359 23:42:53.086562 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 23:42:53.086860 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 23:42:53.087142 VB2:vb2_check_recovery() Recovery was requested manually
362 23:42:53.087491 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 23:42:53.087820 Recovery requested (1009000e)
364 23:42:53.088096 tlcl_extend: response is 0
365 23:42:53.088372 tlcl_extend: response is 0
366 23:42:53.088645
367 23:42:53.088980
368 23:42:53.089285 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 23:42:53.089538 ARM64: Exception handlers installed.
370 23:42:53.089754 ARM64: Testing exception
371 23:42:53.089949 ARM64: Done test exception
372 23:42:53.090173 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2004
373 23:42:53.090398 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 23:42:53.090597 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 23:42:53.090826 [RTC]rtc_get_frequency_meter,134: input=0xf, output=915
376 23:42:53.091157 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
377 23:42:53.091427 [RTC]rtc_get_frequency_meter,134: input=0xb, output=846
378 23:42:53.091660 [RTC]rtc_get_frequency_meter,134: input=0x9, output=815
379 23:42:53.091858 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
380 23:42:53.092054 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
381 23:42:53.092249 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 23:42:53.092445 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 23:42:53.092723 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 23:42:53.092959 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 23:42:53.093184 in-header: 03 19 00 00 08 00 00 00
386 23:42:53.093399 in-data: a2 e0 47 00 13 00 00 00
387 23:42:53.093630 Chrome EC: UHEPI supported
388 23:42:53.093830 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 23:42:53.094109 in-header: 03 a1 00 00 08 00 00 00
390 23:42:53.094330 in-data: 84 60 60 10 00 00 00 00
391 23:42:53.094498 Skip loading cached calibration data
392 23:42:53.094740 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 23:42:53.094898 in-header: 03 a1 00 00 08 00 00 00
394 23:42:53.095044 in-data: 84 60 60 10 00 00 00 00
395 23:42:53.095217 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 23:42:53.095383 in-header: 03 a1 00 00 08 00 00 00
397 23:42:53.095542 in-data: 84 60 60 10 00 00 00 00
398 23:42:53.095689 ADC[3]: Raw value=216571 ID=1
399 23:42:53.095835 Manufacturer: ef
400 23:42:53.095983 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 23:42:53.096153 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 23:42:53.096310 CBFS @ 21000 size 3d4000
403 23:42:53.096481 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 23:42:53.096651 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 23:42:53.096803 CBFS: Found @ offset 3c700 size 44
406 23:42:53.096949 DRAM-K: Full Calibration
407 23:42:53.097094 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 23:42:53.097238 CBFS @ 21000 size 3d4000
409 23:42:53.097383 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 23:42:53.097529 CBFS: Locating 'fallback/dram'
411 23:42:53.097696 CBFS: Found @ offset 24b00 size 12268
412 23:42:53.097855 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
413 23:42:53.098002 ddr_geometry: 1, config: 0x0
414 23:42:53.098146 header.status = 0x0
415 23:42:53.098291 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 23:42:53.098437 header.version = 0x5 (expected: 0x5)
417 23:42:53.098583 header.size = 0x8f0 (expected: 0x8f0)
418 23:42:53.098824 header.config = 0x0
419 23:42:53.098990 header.flags = 0x0
420 23:42:53.099138 header.checksum = 0x0
421 23:42:53.099505 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 23:42:53.099741 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 23:42:53.100019 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 23:42:53.100291 ddr_geometry:1
425 23:42:53.100546 [EMI] new MDL number = 1
426 23:42:53.100807 dram_cbt_mode_extern: 0
427 23:42:53.101061 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 23:42:53.101318 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 23:42:53.101520
430 23:42:53.101706
431 23:42:53.101892 [Bianco] ETT version 0.0.0.1
432 23:42:53.102078 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 23:42:53.102261
434 23:42:53.102444 vSetVcoreByFreq with vcore:762500, freq=1600
435 23:42:53.102652
436 23:42:53.102892 [DramcInit]
437 23:42:53.103094 AutoRefreshCKEOff AutoREF OFF
438 23:42:53.103280 DDRPhyPLLSetting-CKEOFF
439 23:42:53.103477 DDRPhyPLLSetting-CKEON
440 23:42:53.103603
441 23:42:53.103721 Enable WDQS
442 23:42:53.103839 [ModeRegInit_LP4] CH0 RK0
443 23:42:53.103985 Write Rank0 MR13 =0x18
444 23:42:53.104109 Write Rank0 MR12 =0x5d
445 23:42:53.104228 Write Rank0 MR1 =0x56
446 23:42:53.104346 Write Rank0 MR2 =0x1a
447 23:42:53.104458 Write Rank0 MR11 =0x0
448 23:42:53.104555 Write Rank0 MR22 =0x38
449 23:42:53.104651 Write Rank0 MR14 =0x5d
450 23:42:53.104754 Write Rank0 MR3 =0x30
451 23:42:53.104878 Write Rank0 MR13 =0x58
452 23:42:53.104980 Write Rank0 MR12 =0x5d
453 23:42:53.105077 Write Rank0 MR1 =0x56
454 23:42:53.105192 Write Rank0 MR2 =0x2d
455 23:42:53.105300 Write Rank0 MR11 =0x23
456 23:42:53.105398 Write Rank0 MR22 =0x34
457 23:42:53.105495 Write Rank0 MR14 =0x10
458 23:42:53.105592 Write Rank0 MR3 =0x30
459 23:42:53.105690 Write Rank0 MR13 =0xd8
460 23:42:53.105801 [ModeRegInit_LP4] CH0 RK1
461 23:42:53.105901 Write Rank1 MR13 =0x18
462 23:42:53.105998 Write Rank1 MR12 =0x5d
463 23:42:53.106095 Write Rank1 MR1 =0x56
464 23:42:53.106191 Write Rank1 MR2 =0x1a
465 23:42:53.106287 Write Rank1 MR11 =0x0
466 23:42:53.106397 Write Rank1 MR22 =0x38
467 23:42:53.106504 Write Rank1 MR14 =0x5d
468 23:42:53.106603 Write Rank1 MR3 =0x30
469 23:42:53.106700 Write Rank1 MR13 =0x58
470 23:42:53.106797 Write Rank1 MR12 =0x5d
471 23:42:53.106894 Write Rank1 MR1 =0x56
472 23:42:53.106990 Write Rank1 MR2 =0x2d
473 23:42:53.107087 Write Rank1 MR11 =0x23
474 23:42:53.107183 Write Rank1 MR22 =0x34
475 23:42:53.107292 Write Rank1 MR14 =0x10
476 23:42:53.107396 Write Rank1 MR3 =0x30
477 23:42:53.107512 Write Rank1 MR13 =0xd8
478 23:42:53.107609 [ModeRegInit_LP4] CH1 RK0
479 23:42:53.107707 Write Rank0 MR13 =0x18
480 23:42:53.107803 Write Rank0 MR12 =0x5d
481 23:42:53.107900 Write Rank0 MR1 =0x56
482 23:42:53.107997 Write Rank0 MR2 =0x1a
483 23:42:53.108094 Write Rank0 MR11 =0x0
484 23:42:53.108190 Write Rank0 MR22 =0x38
485 23:42:53.108288 Write Rank0 MR14 =0x5d
486 23:42:53.108384 Write Rank0 MR3 =0x30
487 23:42:53.108481 Write Rank0 MR13 =0x58
488 23:42:53.108598 Write Rank0 MR12 =0x5d
489 23:42:53.108699 Write Rank0 MR1 =0x56
490 23:42:53.108796 Write Rank0 MR2 =0x2d
491 23:42:53.108900 Write Rank0 MR11 =0x23
492 23:42:53.108997 Write Rank0 MR22 =0x34
493 23:42:53.109098 Write Rank0 MR14 =0x10
494 23:42:53.109206 Write Rank0 MR3 =0x30
495 23:42:53.109304 Write Rank0 MR13 =0xd8
496 23:42:53.109420 [ModeRegInit_LP4] CH1 RK1
497 23:42:53.109510 Write Rank1 MR13 =0x18
498 23:42:53.109596 Write Rank1 MR12 =0x5d
499 23:42:53.109679 Write Rank1 MR1 =0x56
500 23:42:53.109762 Write Rank1 MR2 =0x1a
501 23:42:53.109845 Write Rank1 MR11 =0x0
502 23:42:53.109928 Write Rank1 MR22 =0x38
503 23:42:53.110011 Write Rank1 MR14 =0x5d
504 23:42:53.110094 Write Rank1 MR3 =0x30
505 23:42:53.110178 Write Rank1 MR13 =0x58
506 23:42:53.110261 Write Rank1 MR12 =0x5d
507 23:42:53.110343 Write Rank1 MR1 =0x56
508 23:42:53.110427 Write Rank1 MR2 =0x2d
509 23:42:53.110510 Write Rank1 MR11 =0x23
510 23:42:53.110594 Write Rank1 MR22 =0x34
511 23:42:53.110690 Write Rank1 MR14 =0x10
512 23:42:53.110781 Write Rank1 MR3 =0x30
513 23:42:53.110866 Write Rank1 MR13 =0xd8
514 23:42:53.110987 match AC timing 3
515 23:42:53.111074 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 23:42:53.111160 [MiockJmeterHQA]
517 23:42:53.111244 vSetVcoreByFreq with vcore:762500, freq=1600
518 23:42:53.111329
519 23:42:53.111420 MIOCK jitter meter ch=0
520 23:42:53.111519
521 23:42:53.111610 1T = (102-17) = 85 dly cells
522 23:42:53.111701 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
523 23:42:53.111786 vSetVcoreByFreq with vcore:725000, freq=1200
524 23:42:53.111870
525 23:42:53.111954 MIOCK jitter meter ch=0
526 23:42:53.112038
527 23:42:53.112121 1T = (97-16) = 81 dly cells
528 23:42:53.112206 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
529 23:42:53.112290 vSetVcoreByFreq with vcore:725000, freq=800
530 23:42:53.112374
531 23:42:53.112456 MIOCK jitter meter ch=0
532 23:42:53.112540
533 23:42:53.112622 1T = (97-16) = 81 dly cells
534 23:42:53.112707 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
535 23:42:53.112816 vSetVcoreByFreq with vcore:762500, freq=1600
536 23:42:53.112926 vSetVcoreByFreq with vcore:762500, freq=1600
537 23:42:53.113013
538 23:42:53.113096 K DRVP
539 23:42:53.113180 1. OCD DRVP=0 CALOUT=0
540 23:42:53.113265 1. OCD DRVP=1 CALOUT=0
541 23:42:53.113351 1. OCD DRVP=2 CALOUT=0
542 23:42:53.113436 1. OCD DRVP=3 CALOUT=0
543 23:42:53.113521 1. OCD DRVP=4 CALOUT=0
544 23:42:53.113605 1. OCD DRVP=5 CALOUT=0
545 23:42:53.113704 1. OCD DRVP=6 CALOUT=0
546 23:42:53.113797 1. OCD DRVP=7 CALOUT=0
547 23:42:53.113882 1. OCD DRVP=8 CALOUT=0
548 23:42:53.113967 1. OCD DRVP=9 CALOUT=1
549 23:42:53.114052
550 23:42:53.114136 1. OCD DRVP calibration OK! DRVP=9
551 23:42:53.114221
552 23:42:53.114304
553 23:42:53.114392
554 23:42:53.114464 K ODTN
555 23:42:53.114537 3. OCD ODTN=0 ,CALOUT=1
556 23:42:53.114616 3. OCD ODTN=1 ,CALOUT=1
557 23:42:53.114691 3. OCD ODTN=2 ,CALOUT=1
558 23:42:53.114765 3. OCD ODTN=3 ,CALOUT=1
559 23:42:53.114839 3. OCD ODTN=4 ,CALOUT=1
560 23:42:53.114942 3. OCD ODTN=5 ,CALOUT=1
561 23:42:53.115080 3. OCD ODTN=6 ,CALOUT=1
562 23:42:53.115163 3. OCD ODTN=7 ,CALOUT=0
563 23:42:53.115240
564 23:42:53.115314 3. OCD ODTN calibration OK! ODTN=7
565 23:42:53.115390
566 23:42:53.115481 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
567 23:42:53.115556 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
568 23:42:53.115631 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
569 23:42:53.115705
570 23:42:53.115779 K DRVP
571 23:42:53.115852 1. OCD DRVP=0 CALOUT=0
572 23:42:53.115927 1. OCD DRVP=1 CALOUT=0
573 23:42:53.116002 1. OCD DRVP=2 CALOUT=0
574 23:42:53.116077 1. OCD DRVP=3 CALOUT=0
575 23:42:53.116165 1. OCD DRVP=4 CALOUT=0
576 23:42:53.116246 1. OCD DRVP=5 CALOUT=0
577 23:42:53.116323 1. OCD DRVP=6 CALOUT=0
578 23:42:53.116410 1. OCD DRVP=7 CALOUT=0
579 23:42:53.116486 1. OCD DRVP=8 CALOUT=0
580 23:42:53.116561 1. OCD DRVP=9 CALOUT=0
581 23:42:53.116635 1. OCD DRVP=10 CALOUT=0
582 23:42:53.116710 1. OCD DRVP=11 CALOUT=1
583 23:42:53.116784
584 23:42:53.116857 1. OCD DRVP calibration OK! DRVP=11
585 23:42:53.116933
586 23:42:53.117006
587 23:42:53.117079
588 23:42:53.117152 K ODTN
589 23:42:53.117225 3. OCD ODTN=0 ,CALOUT=1
590 23:42:53.117505 3. OCD ODTN=1 ,CALOUT=1
591 23:42:53.117593 3. OCD ODTN=2 ,CALOUT=1
592 23:42:53.117671 3. OCD ODTN=3 ,CALOUT=1
593 23:42:53.117747 3. OCD ODTN=4 ,CALOUT=1
594 23:42:53.117822 3. OCD ODTN=5 ,CALOUT=1
595 23:42:53.117897 3. OCD ODTN=6 ,CALOUT=1
596 23:42:53.117972 3. OCD ODTN=7 ,CALOUT=1
597 23:42:53.118047 3. OCD ODTN=8 ,CALOUT=1
598 23:42:53.118122 3. OCD ODTN=9 ,CALOUT=1
599 23:42:53.118196 3. OCD ODTN=10 ,CALOUT=1
600 23:42:53.118271 3. OCD ODTN=11 ,CALOUT=1
601 23:42:53.118346 3. OCD ODTN=12 ,CALOUT=1
602 23:42:53.118421 3. OCD ODTN=13 ,CALOUT=1
603 23:42:53.118495 3. OCD ODTN=14 ,CALOUT=1
604 23:42:53.118569 3. OCD ODTN=15 ,CALOUT=0
605 23:42:53.118656
606 23:42:53.118736 3. OCD ODTN calibration OK! ODTN=15
607 23:42:53.118813
608 23:42:53.118887 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
609 23:42:53.118961 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
610 23:42:53.119036 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
611 23:42:53.119110
612 23:42:53.119183 [DramcInit]
613 23:42:53.119257 AutoRefreshCKEOff AutoREF OFF
614 23:42:53.119330 DDRPhyPLLSetting-CKEOFF
615 23:42:53.119420 DDRPhyPLLSetting-CKEON
616 23:42:53.119495
617 23:42:53.119562 Enable WDQS
618 23:42:53.119632 ==
619 23:42:53.119700 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 23:42:53.119777 fsp= 1, odt_onoff= 1, Byte mode= 0
621 23:42:53.119845 ==
622 23:42:53.119910 [Duty_Offset_Calibration]
623 23:42:53.119976
624 23:42:53.120040 ===========================
625 23:42:53.120106 B0:1 B1:1 CA:1
626 23:42:53.120171 ==
627 23:42:53.120236 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 23:42:53.120301 fsp= 1, odt_onoff= 1, Byte mode= 0
629 23:42:53.120367 ==
630 23:42:53.120432 [Duty_Offset_Calibration]
631 23:42:53.120497
632 23:42:53.120561 ===========================
633 23:42:53.120627 B0:1 B1:0 CA:2
634 23:42:53.120691 [ModeRegInit_LP4] CH0 RK0
635 23:42:53.120765 Write Rank0 MR13 =0x18
636 23:42:53.120836 Write Rank0 MR12 =0x5d
637 23:42:53.120903 Write Rank0 MR1 =0x56
638 23:42:53.120968 Write Rank0 MR2 =0x1a
639 23:42:53.121034 Write Rank0 MR11 =0x0
640 23:42:53.121098 Write Rank0 MR22 =0x38
641 23:42:53.121164 Write Rank0 MR14 =0x5d
642 23:42:53.121229 Write Rank0 MR3 =0x30
643 23:42:53.121294 Write Rank0 MR13 =0x58
644 23:42:53.121359 Write Rank0 MR12 =0x5d
645 23:42:53.121424 Write Rank0 MR1 =0x56
646 23:42:53.121489 Write Rank0 MR2 =0x2d
647 23:42:53.121554 Write Rank0 MR11 =0x23
648 23:42:53.121619 Write Rank0 MR22 =0x34
649 23:42:53.121683 Write Rank0 MR14 =0x10
650 23:42:53.121748 Write Rank0 MR3 =0x30
651 23:42:53.121813 Write Rank0 MR13 =0xd8
652 23:42:53.121878 [ModeRegInit_LP4] CH0 RK1
653 23:42:53.121942 Write Rank1 MR13 =0x18
654 23:42:53.122006 Write Rank1 MR12 =0x5d
655 23:42:53.122072 Write Rank1 MR1 =0x56
656 23:42:53.122137 Write Rank1 MR2 =0x1a
657 23:42:53.122201 Write Rank1 MR11 =0x0
658 23:42:53.122266 Write Rank1 MR22 =0x38
659 23:42:53.122331 Write Rank1 MR14 =0x5d
660 23:42:53.122396 Write Rank1 MR3 =0x30
661 23:42:53.122461 Write Rank1 MR13 =0x58
662 23:42:53.122525 Write Rank1 MR12 =0x5d
663 23:42:53.122590 Write Rank1 MR1 =0x56
664 23:42:53.122655 Write Rank1 MR2 =0x2d
665 23:42:53.122719 Write Rank1 MR11 =0x23
666 23:42:53.122784 Write Rank1 MR22 =0x34
667 23:42:53.122849 Write Rank1 MR14 =0x10
668 23:42:53.122914 Write Rank1 MR3 =0x30
669 23:42:53.122979 Write Rank1 MR13 =0xd8
670 23:42:53.123043 [ModeRegInit_LP4] CH1 RK0
671 23:42:53.123118 Write Rank0 MR13 =0x18
672 23:42:53.123205 Write Rank0 MR12 =0x5d
673 23:42:53.123274 Write Rank0 MR1 =0x56
674 23:42:53.123339 Write Rank0 MR2 =0x1a
675 23:42:53.123414 Write Rank0 MR11 =0x0
676 23:42:53.123483 Write Rank0 MR22 =0x38
677 23:42:53.123548 Write Rank0 MR14 =0x5d
678 23:42:53.123614 Write Rank0 MR3 =0x30
679 23:42:53.123679 Write Rank0 MR13 =0x58
680 23:42:53.123744 Write Rank0 MR12 =0x5d
681 23:42:53.123808 Write Rank0 MR1 =0x56
682 23:42:53.123873 Write Rank0 MR2 =0x2d
683 23:42:53.123938 Write Rank0 MR11 =0x23
684 23:42:53.124003 Write Rank0 MR22 =0x34
685 23:42:53.124067 Write Rank0 MR14 =0x10
686 23:42:53.124133 Write Rank0 MR3 =0x30
687 23:42:53.124197 Write Rank0 MR13 =0xd8
688 23:42:53.124262 [ModeRegInit_LP4] CH1 RK1
689 23:42:53.124340 Write Rank1 MR13 =0x18
690 23:42:53.124399 Write Rank1 MR12 =0x5d
691 23:42:53.124457 Write Rank1 MR1 =0x56
692 23:42:53.124516 Write Rank1 MR2 =0x1a
693 23:42:53.124573 Write Rank1 MR11 =0x0
694 23:42:53.124631 Write Rank1 MR22 =0x38
695 23:42:53.124690 Write Rank1 MR14 =0x5d
696 23:42:53.124748 Write Rank1 MR3 =0x30
697 23:42:53.124805 Write Rank1 MR13 =0x58
698 23:42:53.124863 Write Rank1 MR12 =0x5d
699 23:42:53.124921 Write Rank1 MR1 =0x56
700 23:42:53.124979 Write Rank1 MR2 =0x2d
701 23:42:53.125037 Write Rank1 MR11 =0x23
702 23:42:53.125099 Write Rank1 MR22 =0x34
703 23:42:53.125165 Write Rank1 MR14 =0x10
704 23:42:53.125245 Write Rank1 MR3 =0x30
705 23:42:53.125348 Write Rank1 MR13 =0xd8
706 23:42:53.125455 match AC timing 3
707 23:42:53.125557 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 23:42:53.125652 DramC Write-DBI off
709 23:42:53.125744 DramC Read-DBI off
710 23:42:53.125840 Write Rank0 MR13 =0x59
711 23:42:53.125936 ==
712 23:42:53.126030 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 23:42:53.126124 fsp= 1, odt_onoff= 1, Byte mode= 0
714 23:42:53.126203 ==
715 23:42:53.126265 === u2Vref_new: 0x56 --> 0x2d
716 23:42:53.126326 === u2Vref_new: 0x58 --> 0x38
717 23:42:53.126385 === u2Vref_new: 0x5a --> 0x39
718 23:42:53.126445 === u2Vref_new: 0x5c --> 0x3c
719 23:42:53.126505 === u2Vref_new: 0x5e --> 0x3d
720 23:42:53.126564 === u2Vref_new: 0x60 --> 0xa0
721 23:42:53.126623 [CA 0] Center 34 (6~63) winsize 58
722 23:42:53.126682 [CA 1] Center 36 (9~63) winsize 55
723 23:42:53.126741 [CA 2] Center 29 (0~58) winsize 59
724 23:42:53.126802 [CA 3] Center 24 (-3~52) winsize 56
725 23:42:53.126861 [CA 4] Center 25 (-3~54) winsize 58
726 23:42:53.126920 [CA 5] Center 29 (0~59) winsize 60
727 23:42:53.126979
728 23:42:53.127038 [CATrainingPosCal] consider 1 rank data
729 23:42:53.127101 u2DelayCellTimex100 = 735/100 ps
730 23:42:53.127161 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
731 23:42:53.127220 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
732 23:42:53.127279 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
733 23:42:53.127338 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
734 23:42:53.127400 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
735 23:42:53.127472 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
736 23:42:53.127534
737 23:42:53.127593 CA PerBit enable=1, Macro0, CA PI delay=24
738 23:42:53.127652 === u2Vref_new: 0x5e --> 0x3d
739 23:42:53.127711
740 23:42:53.127770 Vref(ca) range 1: 30
741 23:42:53.127834
742 23:42:53.127893 CS Dly= 9 (40-0-32)
743 23:42:53.127952 Write Rank0 MR13 =0xd8
744 23:42:53.128010 Write Rank0 MR13 =0xd8
745 23:42:53.128069 Write Rank0 MR12 =0x5e
746 23:42:53.128127 Write Rank1 MR13 =0x59
747 23:42:53.128185 ==
748 23:42:53.128251 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 23:42:53.128522 fsp= 1, odt_onoff= 1, Byte mode= 0
750 23:42:53.128591 ==
751 23:42:53.128651 === u2Vref_new: 0x56 --> 0x2d
752 23:42:53.128712 === u2Vref_new: 0x58 --> 0x38
753 23:42:53.128772 === u2Vref_new: 0x5a --> 0x39
754 23:42:53.128835 === u2Vref_new: 0x5c --> 0x3c
755 23:42:53.128897 === u2Vref_new: 0x5e --> 0x3d
756 23:42:53.128957 === u2Vref_new: 0x60 --> 0xa0
757 23:42:53.129016 [CA 0] Center 35 (8~63) winsize 56
758 23:42:53.129076 [CA 1] Center 36 (9~63) winsize 55
759 23:42:53.129134 [CA 2] Center 31 (3~60) winsize 58
760 23:42:53.129198 [CA 3] Center 26 (-2~54) winsize 57
761 23:42:53.129257 [CA 4] Center 26 (-2~55) winsize 58
762 23:42:53.129317 [CA 5] Center 31 (2~61) winsize 60
763 23:42:53.129375
764 23:42:53.129433 [CATrainingPosCal] consider 2 rank data
765 23:42:53.129492 u2DelayCellTimex100 = 735/100 ps
766 23:42:53.129551 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
767 23:42:53.129617 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
768 23:42:53.129677 CA2 delay=30 (3~58),Diff = 5 PI (6 cell)
769 23:42:53.129736 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
770 23:42:53.129795 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
771 23:42:53.129854 CA5 delay=30 (2~59),Diff = 5 PI (6 cell)
772 23:42:53.129913
773 23:42:53.129972 CA PerBit enable=1, Macro0, CA PI delay=25
774 23:42:53.130031 === u2Vref_new: 0x60 --> 0xa0
775 23:42:53.130091
776 23:42:53.130150 Vref(ca) range 1: 32
777 23:42:53.130208
778 23:42:53.130266 CS Dly= 8 (39-0-32)
779 23:42:53.130324 Write Rank1 MR13 =0xd8
780 23:42:53.130383 Write Rank1 MR13 =0xd8
781 23:42:53.130441 Write Rank1 MR12 =0x60
782 23:42:53.130499 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 23:42:53.130558 Write Rank0 MR2 =0xad
784 23:42:53.130616 [Write Leveling]
785 23:42:53.130675 delay byte0 byte1 byte2 byte3
786 23:42:53.130733
787 23:42:53.130791 10 0 0
788 23:42:53.130850 11 0 0
789 23:42:53.130910 12 0 0
790 23:42:53.130969 13 0 0
791 23:42:53.131032 14 0 0
792 23:42:53.131091 15 0 0
793 23:42:53.131150 16 0 0
794 23:42:53.131210 17 0 0
795 23:42:53.131270 18 0 0
796 23:42:53.131329 19 0 0
797 23:42:53.131388 20 0 0
798 23:42:53.131457 21 0 0
799 23:42:53.131517 22 0 0
800 23:42:53.131577 23 0 0
801 23:42:53.131637 24 0 ff
802 23:42:53.131696 25 0 ff
803 23:42:53.131756 26 0 ff
804 23:42:53.131815 27 0 ff
805 23:42:53.131874 28 0 ff
806 23:42:53.131934 29 0 ff
807 23:42:53.131996 30 0 ff
808 23:42:53.132056 31 0 ff
809 23:42:53.132115 32 0 ff
810 23:42:53.132174 33 ff ff
811 23:42:53.132233 34 ff ff
812 23:42:53.132296 35 ff ff
813 23:42:53.132358 36 ff ff
814 23:42:53.132417 37 ff ff
815 23:42:53.132476 38 ff ff
816 23:42:53.132536 39 ff ff
817 23:42:53.132598 pass bytecount = 0xff (0xff: all bytes pass)
818 23:42:53.132658
819 23:42:53.132721 DQS0 dly: 33
820 23:42:53.132780 DQS1 dly: 24
821 23:42:53.132838 Write Rank0 MR2 =0x2d
822 23:42:53.132897 [RankSwap] Rank num 2, (Multi 1), Rank 0
823 23:42:53.132959 Write Rank0 MR1 =0xd6
824 23:42:53.133020 [Gating]
825 23:42:53.133078 ==
826 23:42:53.133162 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
827 23:42:53.133230 fsp= 1, odt_onoff= 1, Byte mode= 0
828 23:42:53.133306 ==
829 23:42:53.133380 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
830 23:42:53.133444 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
831 23:42:53.133504 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
832 23:42:53.133565 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 23:42:53.133626 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 23:42:53.133686 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
835 23:42:53.133747 3 1 24 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
836 23:42:53.133807 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
837 23:42:53.133878 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
838 23:42:53.133940 3 2 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
839 23:42:53.134016 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 23:42:53.134078 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 23:42:53.134141 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
842 23:42:53.134203 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 23:42:53.134265 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 23:42:53.134325 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 23:42:53.134386 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 23:42:53.134450 3 3 4 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
847 23:42:53.134515 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
848 23:42:53.134575 [Byte 1] Lead/lag falling Transition (3, 3, 8)
849 23:42:53.134638 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 23:42:53.134699 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 23:42:53.134759 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 23:42:53.134819 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
853 23:42:53.134879 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
854 23:42:53.134938 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
855 23:42:53.134999 3 4 4 |3d3d b0a |(11 11)(11 11) |(1 1)(1 1)| 0
856 23:42:53.135059 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 23:42:53.135119 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 23:42:53.135179 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 23:42:53.135238 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 23:42:53.135299 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 23:42:53.135359 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 23:42:53.135431 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 23:42:53.135494 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 23:42:53.135554 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 23:42:53.135614 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 23:42:53.135674 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 23:42:53.135734 [Byte 0] Lead/lag falling Transition (3, 5, 16)
868 23:42:53.135794 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
869 23:42:53.135854 [Byte 0] Lead/lag Transition tap number (2)
870 23:42:53.135914 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
871 23:42:53.135974 [Byte 1] Lead/lag falling Transition (3, 5, 24)
872 23:42:53.136033 3 5 28 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
873 23:42:53.136287 [Byte 1] Lead/lag Transition tap number (2)
874 23:42:53.136362 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
875 23:42:53.136426 [Byte 0]First pass (3, 6, 0)
876 23:42:53.136487 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
877 23:42:53.136548 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
878 23:42:53.136609 [Byte 1]First pass (3, 6, 8)
879 23:42:53.136669 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 23:42:53.136730 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 23:42:53.136791 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 23:42:53.136850 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 23:42:53.136911 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 23:42:53.136970 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 23:42:53.137030 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 23:42:53.137091 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 23:42:53.137150 All bytes gating window > 1UI, Early break!
888 23:42:53.137230
889 23:42:53.137315 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
890 23:42:53.137377
891 23:42:53.137447 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
892 23:42:53.137518
893 23:42:53.137584
894 23:42:53.137654
895 23:42:53.137714 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
896 23:42:53.137774
897 23:42:53.137838 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
898 23:42:53.137914
899 23:42:53.137981
900 23:42:53.138041 Write Rank0 MR1 =0x56
901 23:42:53.138101
902 23:42:53.138160 best RODT dly(2T, 0.5T) = (2, 2)
903 23:42:53.138218
904 23:42:53.138277 best RODT dly(2T, 0.5T) = (2, 2)
905 23:42:53.138336 ==
906 23:42:53.138395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
907 23:42:53.138454 fsp= 1, odt_onoff= 1, Byte mode= 0
908 23:42:53.138514 ==
909 23:42:53.138573 Start DQ dly to find pass range UseTestEngine =0
910 23:42:53.138632 x-axis: bit #, y-axis: DQ dly (-127~63)
911 23:42:53.138692 RX Vref Scan = 0
912 23:42:53.138750 -26, [0] xxxxxxxx xxxxxxxx [MSB]
913 23:42:53.138811 -25, [0] xxxxxxxx xxxxxxxx [MSB]
914 23:42:53.138871 -24, [0] xxxxxxxx xxxxxxxx [MSB]
915 23:42:53.138932 -23, [0] xxxxxxxx xxxxxxxx [MSB]
916 23:42:53.138992 -22, [0] xxxxxxxx xxxxxxxx [MSB]
917 23:42:53.139052 -21, [0] xxxxxxxx xxxxxxxx [MSB]
918 23:42:53.139112 -20, [0] xxxxxxxx xxxxxxxx [MSB]
919 23:42:53.139215 -19, [0] xxxxxxxx xxxxxxxx [MSB]
920 23:42:53.139313 -18, [0] xxxxxxxx xxxxxxxx [MSB]
921 23:42:53.139418 -17, [0] xxxxxxxx xxxxxxxx [MSB]
922 23:42:53.139483 -16, [0] xxxxxxxx xxxxxxxx [MSB]
923 23:42:53.139544 -15, [0] xxxxxxxx xxxxxxxx [MSB]
924 23:42:53.139606 -14, [0] xxxxxxxx xxxxxxxx [MSB]
925 23:42:53.139670 -13, [0] xxxxxxxx xxxxxxxx [MSB]
926 23:42:53.139738 -12, [0] xxxxxxxx xxxxxxxx [MSB]
927 23:42:53.139804 -11, [0] xxxxxxxx xxxxxxxx [MSB]
928 23:42:53.139867 -10, [0] xxxxxxxx xxxxxxxx [MSB]
929 23:42:53.139929 -9, [0] xxxxxxxx xxxxxxxx [MSB]
930 23:42:53.139989 -8, [0] xxxxxxxx xxxxxxxx [MSB]
931 23:42:53.140049 -7, [0] xxxxxxxx xxxxxxxx [MSB]
932 23:42:53.140130 -6, [0] xxxxxxxx xxxxxxxx [MSB]
933 23:42:53.140193 -5, [0] xxxxxxxx xxxxxxxx [MSB]
934 23:42:53.140254 -4, [0] xxxxxxxx xxxxxxxx [MSB]
935 23:42:53.140327 -3, [0] xxxxxxxx xxxxxxxx [MSB]
936 23:42:53.140389 -2, [0] xxxoxxxx ooxxxxxx [MSB]
937 23:42:53.140450 -1, [0] xxxoxxxx ooxoxxxx [MSB]
938 23:42:53.140521 0, [0] xxxoxoxx ooxoxxxx [MSB]
939 23:42:53.140584 1, [0] xxxoxoxx ooxoxoxx [MSB]
940 23:42:53.140644 2, [0] xxxoxoox ooxoooxx [MSB]
941 23:42:53.140704 3, [0] xxxoxooo ooxoooox [MSB]
942 23:42:53.140764 4, [0] xxxoxooo ooxooooo [MSB]
943 23:42:53.140828 5, [0] xooooooo ooxooooo [MSB]
944 23:42:53.140889 6, [0] oooooooo ooxooooo [MSB]
945 23:42:53.140948 32, [0] oooxoooo oooooooo [MSB]
946 23:42:53.141018 33, [0] oooxoooo xooooooo [MSB]
947 23:42:53.141093 34, [0] oooxoooo xooooooo [MSB]
948 23:42:53.141163 35, [0] oooxoooo xooooooo [MSB]
949 23:42:53.141240 36, [0] oooxoxoo xooxoooo [MSB]
950 23:42:53.141303 37, [0] oooxoxxx xxoxoooo [MSB]
951 23:42:53.141363 38, [0] oooxoxxx xxoxxoxo [MSB]
952 23:42:53.141426 39, [0] oooxxxxx xxoxxxxo [MSB]
953 23:42:53.141486 40, [0] oooxxxxx xxoxxxxo [MSB]
954 23:42:53.141547 41, [0] xxoxxxxx xxoxxxxo [MSB]
955 23:42:53.141607 42, [0] xxxxxxxx xxoxxxxx [MSB]
956 23:42:53.141667 43, [0] xxxxxxxx xxoxxxxx [MSB]
957 23:42:53.141731 44, [0] xxxxxxxx xxxxxxxx [MSB]
958 23:42:53.141796 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
959 23:42:53.141856 iDelay=44, Bit 1, Center 22 (5 ~ 40) 36
960 23:42:53.141915 iDelay=44, Bit 2, Center 23 (5 ~ 41) 37
961 23:42:53.141978 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
962 23:42:53.142040 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
963 23:42:53.142099 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
964 23:42:53.142157 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
965 23:42:53.142216 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
966 23:42:53.142275 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
967 23:42:53.142334 iDelay=44, Bit 9, Center 17 (-2 ~ 36) 39
968 23:42:53.142411 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
969 23:42:53.142473 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
970 23:42:53.142543 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36
971 23:42:53.142616 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
972 23:42:53.142676 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
973 23:42:53.142736 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
974 23:42:53.142794 ==
975 23:42:53.142875 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 23:42:53.142938 fsp= 1, odt_onoff= 1, Byte mode= 0
977 23:42:53.143009 ==
978 23:42:53.143082 DQS Delay:
979 23:42:53.143155 DQS0 = 0, DQS1 = 0
980 23:42:53.143215 DQM Delay:
981 23:42:53.143274 DQM0 = 19, DQM1 = 19
982 23:42:53.143333 DQ Delay:
983 23:42:53.143392 DQ0 =23, DQ1 =22, DQ2 =23, DQ3 =14
984 23:42:53.143463 DQ4 =21, DQ5 =17, DQ6 =19, DQ7 =19
985 23:42:53.143532 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
986 23:42:53.143592 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
987 23:42:53.143667
988 23:42:53.143729
989 23:42:53.143788 DramC Write-DBI off
990 23:42:53.143848 ==
991 23:42:53.143907 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 23:42:53.143967 fsp= 1, odt_onoff= 1, Byte mode= 0
993 23:42:53.144027 ==
994 23:42:53.144086 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 23:42:53.144146
996 23:42:53.144205 Begin, DQ Scan Range 920~1176
997 23:42:53.144265
998 23:42:53.144327
999 23:42:53.144385 TX Vref Scan disable
1000 23:42:53.144444 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1001 23:42:53.144514 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1002 23:42:53.144581 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1003 23:42:53.144642 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1004 23:42:53.144702 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1005 23:42:53.144966 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1006 23:42:53.145035 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1007 23:42:53.145099 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1008 23:42:53.145160 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1009 23:42:53.145222 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1010 23:42:53.145283 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1011 23:42:53.145343 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1012 23:42:53.145404 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1013 23:42:53.145464 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1014 23:42:53.145524 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1015 23:42:53.145584 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1016 23:42:53.145645 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1017 23:42:53.145708 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1018 23:42:53.145770 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1019 23:42:53.145831 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1020 23:42:53.145891 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1021 23:42:53.145951 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1022 23:42:53.146012 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1023 23:42:53.146072 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1024 23:42:53.146132 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1025 23:42:53.146214 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1026 23:42:53.146279 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1027 23:42:53.146341 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1028 23:42:53.146401 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1029 23:42:53.146462 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1030 23:42:53.146544 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1031 23:42:53.146606 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1032 23:42:53.146678 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1033 23:42:53.146767 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1034 23:42:53.146830 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1035 23:42:53.146919 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1036 23:42:53.147001 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1037 23:42:53.147074 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1038 23:42:53.147146 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1039 23:42:53.147221 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1040 23:42:53.147283 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1041 23:42:53.147351 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1042 23:42:53.147438 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1043 23:42:53.147503 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1044 23:42:53.147571 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1045 23:42:53.147665 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1046 23:42:53.147733 966 |3 6 6|[0] xxxxxxxx oxxxxxxx [MSB]
1047 23:42:53.147804 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1048 23:42:53.147880 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1049 23:42:53.147941 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1050 23:42:53.148010 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1051 23:42:53.148072 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1052 23:42:53.148131 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1053 23:42:53.148191 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1054 23:42:53.148260 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1055 23:42:53.148321 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1056 23:42:53.148395 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1057 23:42:53.148455 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1058 23:42:53.148515 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1059 23:42:53.148574 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1060 23:42:53.148634 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1061 23:42:53.148693 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1062 23:42:53.148753 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1063 23:42:53.148813 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1064 23:42:53.148872 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1065 23:42:53.148932 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1066 23:42:53.148991 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1067 23:42:53.149051 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1068 23:42:53.149110 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1069 23:42:53.149170 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1070 23:42:53.149229 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1071 23:42:53.149288 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1072 23:42:53.149348 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1073 23:42:53.149408 Byte0, DQ PI dly=986, DQM PI dly= 986
1074 23:42:53.149478 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1075 23:42:53.149538
1076 23:42:53.149597 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1077 23:42:53.149657
1078 23:42:53.149715 Byte1, DQ PI dly=977, DQM PI dly= 977
1079 23:42:53.149774 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1080 23:42:53.149833
1081 23:42:53.149892 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1082 23:42:53.149951
1083 23:42:53.150008 ==
1084 23:42:53.150066 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1085 23:42:53.150125 fsp= 1, odt_onoff= 1, Byte mode= 0
1086 23:42:53.150184 ==
1087 23:42:53.150242 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1088 23:42:53.150300
1089 23:42:53.150358 Begin, DQ Scan Range 953~1017
1090 23:42:53.150416 Write Rank0 MR14 =0x0
1091 23:42:53.150475
1092 23:42:53.150533 CH=0, VrefRange= 0, VrefLevel = 0
1093 23:42:53.150592 TX Bit0 (980~994) 15 987, Bit8 (967~978) 12 972,
1094 23:42:53.150656 TX Bit1 (979~993) 15 986, Bit9 (969~983) 15 976,
1095 23:42:53.150715 TX Bit2 (980~994) 15 987, Bit10 (975~987) 13 981,
1096 23:42:53.150777 TX Bit3 (975~987) 13 981, Bit11 (968~982) 15 975,
1097 23:42:53.150837 TX Bit4 (979~992) 14 985, Bit12 (971~983) 13 977,
1098 23:42:53.150908 TX Bit5 (977~991) 15 984, Bit13 (970~984) 15 977,
1099 23:42:53.150969 TX Bit6 (978~991) 14 984, Bit14 (969~984) 16 976,
1100 23:42:53.151028 TX Bit7 (980~992) 13 986, Bit15 (975~986) 12 980,
1101 23:42:53.151087
1102 23:42:53.151156 Write Rank0 MR14 =0x2
1103 23:42:53.151219
1104 23:42:53.151279 CH=0, VrefRange= 0, VrefLevel = 2
1105 23:42:53.151341 TX Bit0 (979~994) 16 986, Bit8 (967~980) 14 973,
1106 23:42:53.151414 TX Bit1 (978~993) 16 985, Bit9 (968~984) 17 976,
1107 23:42:53.151476 TX Bit2 (980~994) 15 987, Bit10 (975~988) 14 981,
1108 23:42:53.151536 TX Bit3 (975~988) 14 981, Bit11 (968~982) 15 975,
1109 23:42:53.151595 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1110 23:42:53.151859 TX Bit5 (977~992) 16 984, Bit13 (969~984) 16 976,
1111 23:42:53.151927 TX Bit6 (977~991) 15 984, Bit14 (969~985) 17 977,
1112 23:42:53.151988 TX Bit7 (979~992) 14 985, Bit15 (975~986) 12 980,
1113 23:42:53.152047
1114 23:42:53.152106 Write Rank0 MR14 =0x4
1115 23:42:53.152166
1116 23:42:53.152224 CH=0, VrefRange= 0, VrefLevel = 4
1117 23:42:53.152283 TX Bit0 (979~996) 18 987, Bit8 (967~981) 15 974,
1118 23:42:53.152343 TX Bit1 (978~994) 17 986, Bit9 (968~984) 17 976,
1119 23:42:53.152414 TX Bit2 (979~995) 17 987, Bit10 (974~989) 16 981,
1120 23:42:53.152476 TX Bit3 (975~990) 16 982, Bit11 (968~983) 16 975,
1121 23:42:53.152542 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1122 23:42:53.152603 TX Bit5 (976~992) 17 984, Bit13 (969~985) 17 977,
1123 23:42:53.152662 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1124 23:42:53.152720 TX Bit7 (978~993) 16 985, Bit15 (974~988) 15 981,
1125 23:42:53.152783
1126 23:42:53.152843 Write Rank0 MR14 =0x6
1127 23:42:53.152904
1128 23:42:53.152964 CH=0, VrefRange= 0, VrefLevel = 6
1129 23:42:53.153027 TX Bit0 (978~996) 19 987, Bit8 (967~982) 16 974,
1130 23:42:53.153091 TX Bit1 (978~995) 18 986, Bit9 (969~985) 17 977,
1131 23:42:53.153157 TX Bit2 (979~996) 18 987, Bit10 (974~990) 17 982,
1132 23:42:53.153222 TX Bit3 (975~990) 16 982, Bit11 (968~983) 16 975,
1133 23:42:53.153341 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1134 23:42:53.153458 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1135 23:42:53.153578 TX Bit6 (977~993) 17 985, Bit14 (968~986) 19 977,
1136 23:42:53.153678 TX Bit7 (978~993) 16 985, Bit15 (973~989) 17 981,
1137 23:42:53.153788
1138 23:42:53.153880 Write Rank0 MR14 =0x8
1139 23:42:53.153975
1140 23:42:53.154068 CH=0, VrefRange= 0, VrefLevel = 8
1141 23:42:53.154161 TX Bit0 (979~997) 19 988, Bit8 (967~982) 16 974,
1142 23:42:53.154253 TX Bit1 (978~995) 18 986, Bit9 (968~985) 18 976,
1143 23:42:53.154352 TX Bit2 (978~997) 20 987, Bit10 (974~990) 17 982,
1144 23:42:53.154458 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1145 23:42:53.154524 TX Bit4 (978~994) 17 986, Bit12 (969~986) 18 977,
1146 23:42:53.154589 TX Bit5 (976~993) 18 984, Bit13 (968~985) 18 976,
1147 23:42:53.154649 TX Bit6 (977~993) 17 985, Bit14 (968~987) 20 977,
1148 23:42:53.154708 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1149 23:42:53.154778
1150 23:42:53.154837 Write Rank0 MR14 =0xa
1151 23:42:53.154896
1152 23:42:53.154954 CH=0, VrefRange= 0, VrefLevel = 10
1153 23:42:53.155017 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1154 23:42:53.155081 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
1155 23:42:53.155144 TX Bit2 (978~998) 21 988, Bit10 (973~991) 19 982,
1156 23:42:53.155205 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1157 23:42:53.155267 TX Bit4 (977~995) 19 986, Bit12 (969~986) 18 977,
1158 23:42:53.155362 TX Bit5 (976~994) 19 985, Bit13 (968~986) 19 977,
1159 23:42:53.155450 TX Bit6 (977~994) 18 985, Bit14 (968~988) 21 978,
1160 23:42:53.155515 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1161 23:42:53.155577
1162 23:42:53.155646 Write Rank0 MR14 =0xc
1163 23:42:53.155715
1164 23:42:53.155774 CH=0, VrefRange= 0, VrefLevel = 12
1165 23:42:53.155834 TX Bit0 (978~999) 22 988, Bit8 (966~983) 18 974,
1166 23:42:53.155894 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
1167 23:42:53.155959 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
1168 23:42:53.156020 TX Bit3 (974~991) 18 982, Bit11 (967~985) 19 976,
1169 23:42:53.156090 TX Bit4 (977~995) 19 986, Bit12 (968~986) 19 977,
1170 23:42:53.156152 TX Bit5 (976~994) 19 985, Bit13 (968~987) 20 977,
1171 23:42:53.156219 TX Bit6 (976~994) 19 985, Bit14 (968~988) 21 978,
1172 23:42:53.156281 TX Bit7 (978~995) 18 986, Bit15 (972~990) 19 981,
1173 23:42:53.156340
1174 23:42:53.156399 Write Rank0 MR14 =0xe
1175 23:42:53.156464
1176 23:42:53.156538 CH=0, VrefRange= 0, VrefLevel = 14
1177 23:42:53.156607 TX Bit0 (978~999) 22 988, Bit8 (966~983) 18 974,
1178 23:42:53.156671 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1179 23:42:53.156736 TX Bit2 (978~999) 22 988, Bit10 (972~991) 20 981,
1180 23:42:53.156798 TX Bit3 (973~992) 20 982, Bit11 (967~986) 20 976,
1181 23:42:53.156856 TX Bit4 (977~996) 20 986, Bit12 (968~987) 20 977,
1182 23:42:53.156922 TX Bit5 (975~995) 21 985, Bit13 (968~987) 20 977,
1183 23:42:53.156983 TX Bit6 (976~995) 20 985, Bit14 (968~989) 22 978,
1184 23:42:53.157099 TX Bit7 (978~996) 19 987, Bit15 (972~991) 20 981,
1185 23:42:53.157207
1186 23:42:53.157308 Write Rank0 MR14 =0x10
1187 23:42:53.157399
1188 23:42:53.157504 CH=0, VrefRange= 0, VrefLevel = 16
1189 23:42:53.157597 TX Bit0 (977~999) 23 988, Bit8 (966~984) 19 975,
1190 23:42:53.157704 TX Bit1 (977~998) 22 987, Bit9 (967~987) 21 977,
1191 23:42:53.157797 TX Bit2 (978~999) 22 988, Bit10 (972~992) 21 982,
1192 23:42:53.157889 TX Bit3 (973~992) 20 982, Bit11 (967~985) 19 976,
1193 23:42:53.157982 TX Bit4 (977~998) 22 987, Bit12 (968~987) 20 977,
1194 23:42:53.158074 TX Bit5 (975~995) 21 985, Bit13 (968~987) 20 977,
1195 23:42:53.158166 TX Bit6 (976~995) 20 985, Bit14 (968~989) 22 978,
1196 23:42:53.158258 TX Bit7 (977~997) 21 987, Bit15 (972~991) 20 981,
1197 23:42:53.158352
1198 23:42:53.158443 Write Rank0 MR14 =0x12
1199 23:42:53.158534
1200 23:42:53.158625 CH=0, VrefRange= 0, VrefLevel = 18
1201 23:42:53.158716 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1202 23:42:53.158812 TX Bit1 (976~999) 24 987, Bit9 (967~987) 21 977,
1203 23:42:53.158913 TX Bit2 (977~999) 23 988, Bit10 (972~992) 21 982,
1204 23:42:53.159006 TX Bit3 (972~993) 22 982, Bit11 (966~986) 21 976,
1205 23:42:53.159098 TX Bit4 (977~998) 22 987, Bit12 (968~988) 21 978,
1206 23:42:53.159190 TX Bit5 (975~995) 21 985, Bit13 (968~988) 21 978,
1207 23:42:53.159282 TX Bit6 (976~996) 21 986, Bit14 (968~990) 23 979,
1208 23:42:53.159374 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1209 23:42:53.159457
1210 23:42:53.159516 Write Rank0 MR14 =0x14
1211 23:42:53.159575
1212 23:42:53.159638 CH=0, VrefRange= 0, VrefLevel = 20
1213 23:42:53.159957 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1214 23:42:53.160083 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
1215 23:42:53.160160 TX Bit2 (977~1000) 24 988, Bit10 (972~992) 21 982,
1216 23:42:53.160230 TX Bit3 (972~993) 22 982, Bit11 (966~987) 22 976,
1217 23:42:53.160314 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1218 23:42:53.160385 TX Bit5 (975~996) 22 985, Bit13 (967~989) 23 978,
1219 23:42:53.160461 TX Bit6 (976~997) 22 986, Bit14 (967~990) 24 978,
1220 23:42:53.160553 TX Bit7 (977~997) 21 987, Bit15 (970~992) 23 981,
1221 23:42:53.160618
1222 23:42:53.160678 Write Rank0 MR14 =0x16
1223 23:42:53.160738
1224 23:42:53.160800 CH=0, VrefRange= 0, VrefLevel = 22
1225 23:42:53.160863 TX Bit0 (977~1000) 24 988, Bit8 (965~986) 22 975,
1226 23:42:53.160925 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
1227 23:42:53.161021 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1228 23:42:53.161087 TX Bit3 (971~993) 23 982, Bit11 (966~987) 22 976,
1229 23:42:53.161158 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1230 23:42:53.161232 TX Bit5 (974~996) 23 985, Bit13 (967~989) 23 978,
1231 23:42:53.161298 TX Bit6 (975~998) 24 986, Bit14 (967~990) 24 978,
1232 23:42:53.161357 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1233 23:42:53.161416
1234 23:42:53.161493 Write Rank0 MR14 =0x18
1235 23:42:53.161557
1236 23:42:53.161638 CH=0, VrefRange= 0, VrefLevel = 24
1237 23:42:53.161708 TX Bit0 (977~1000) 24 988, Bit8 (964~986) 23 975,
1238 23:42:53.161785 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
1239 23:42:53.161849 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1240 23:42:53.161912 TX Bit3 (971~994) 24 982, Bit11 (966~988) 23 977,
1241 23:42:53.161973 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1242 23:42:53.162035 TX Bit5 (974~997) 24 985, Bit13 (967~990) 24 978,
1243 23:42:53.162102 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1244 23:42:53.162161 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1245 23:42:53.162220
1246 23:42:53.162292 Write Rank0 MR14 =0x1a
1247 23:42:53.162352
1248 23:42:53.162410 CH=0, VrefRange= 0, VrefLevel = 26
1249 23:42:53.162469 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1250 23:42:53.162528 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1251 23:42:53.162586 TX Bit2 (976~1000) 25 988, Bit10 (970~994) 25 982,
1252 23:42:53.162644 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1253 23:42:53.162702 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1254 23:42:53.162760 TX Bit5 (974~998) 25 986, Bit13 (967~990) 24 978,
1255 23:42:53.162818 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1256 23:42:53.162876 TX Bit7 (976~999) 24 987, Bit15 (969~993) 25 981,
1257 23:42:53.162935
1258 23:42:53.162992 Write Rank0 MR14 =0x1c
1259 23:42:53.163050
1260 23:42:53.163107 CH=0, VrefRange= 0, VrefLevel = 28
1261 23:42:53.163165 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1262 23:42:53.163224 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1263 23:42:53.163282 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1264 23:42:53.163340 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1265 23:42:53.163398 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1266 23:42:53.163465 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1267 23:42:53.163524 TX Bit6 (975~999) 25 987, Bit14 (967~990) 24 978,
1268 23:42:53.163582 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1269 23:42:53.163640
1270 23:42:53.163698 Write Rank0 MR14 =0x1e
1271 23:42:53.163756
1272 23:42:53.163814 CH=0, VrefRange= 0, VrefLevel = 30
1273 23:42:53.163872 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1274 23:42:53.163930 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1275 23:42:53.163989 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1276 23:42:53.164047 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1277 23:42:53.164106 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1278 23:42:53.164164 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1279 23:42:53.164223 TX Bit6 (975~999) 25 987, Bit14 (967~990) 24 978,
1280 23:42:53.164280 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1281 23:42:53.164338
1282 23:42:53.164395 Write Rank0 MR14 =0x20
1283 23:42:53.164457
1284 23:42:53.164527 CH=0, VrefRange= 0, VrefLevel = 32
1285 23:42:53.164586 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1286 23:42:53.164645 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1287 23:42:53.164704 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1288 23:42:53.164762 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1289 23:42:53.164820 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1290 23:42:53.164877 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1291 23:42:53.164936 TX Bit6 (975~999) 25 987, Bit14 (967~990) 24 978,
1292 23:42:53.164994 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1293 23:42:53.165053
1294 23:42:53.165110 Write Rank0 MR14 =0x22
1295 23:42:53.165168
1296 23:42:53.165224 CH=0, VrefRange= 0, VrefLevel = 34
1297 23:42:53.165282 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1298 23:42:53.165339 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1299 23:42:53.165398 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1300 23:42:53.165455 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1301 23:42:53.165513 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1302 23:42:53.165570 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1303 23:42:53.165628 TX Bit6 (975~999) 25 987, Bit14 (967~990) 24 978,
1304 23:42:53.165685 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1305 23:42:53.165742
1306 23:42:53.165799 Write Rank0 MR14 =0x24
1307 23:42:53.165857
1308 23:42:53.165913 CH=0, VrefRange= 0, VrefLevel = 36
1309 23:42:53.165971 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1310 23:42:53.166028 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1311 23:42:53.166086 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
1312 23:42:53.166338 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1313 23:42:53.166403 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1314 23:42:53.166462 TX Bit5 (973~998) 26 985, Bit13 (967~990) 24 978,
1315 23:42:53.166521 TX Bit6 (975~999) 25 987, Bit14 (967~990) 24 978,
1316 23:42:53.166579 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1317 23:42:53.166637
1318 23:42:53.166694
1319 23:42:53.166752 TX Vref found, early break! 370< 377
1320 23:42:53.166809 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1321 23:42:53.166886 u1DelayCellOfst[0]=9 cells (7 PI)
1322 23:42:53.166950 u1DelayCellOfst[1]=7 cells (6 PI)
1323 23:42:53.167008 u1DelayCellOfst[2]=9 cells (7 PI)
1324 23:42:53.167088 u1DelayCellOfst[3]=0 cells (0 PI)
1325 23:42:53.167151 u1DelayCellOfst[4]=7 cells (6 PI)
1326 23:42:53.167209 u1DelayCellOfst[5]=3 cells (3 PI)
1327 23:42:53.167266 u1DelayCellOfst[6]=6 cells (5 PI)
1328 23:42:53.167322 u1DelayCellOfst[7]=7 cells (6 PI)
1329 23:42:53.167379 Byte0, DQ PI dly=982, DQM PI dly= 985
1330 23:42:53.167451 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1331 23:42:53.167522
1332 23:42:53.167596 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1333 23:42:53.167660
1334 23:42:53.167718 u1DelayCellOfst[8]=0 cells (0 PI)
1335 23:42:53.167775 u1DelayCellOfst[9]=3 cells (3 PI)
1336 23:42:53.167833 u1DelayCellOfst[10]=9 cells (7 PI)
1337 23:42:53.167890 u1DelayCellOfst[11]=2 cells (2 PI)
1338 23:42:53.167947 u1DelayCellOfst[12]=3 cells (3 PI)
1339 23:42:53.168004 u1DelayCellOfst[13]=3 cells (3 PI)
1340 23:42:53.168061 u1DelayCellOfst[14]=3 cells (3 PI)
1341 23:42:53.168118 u1DelayCellOfst[15]=7 cells (6 PI)
1342 23:42:53.168175 Byte1, DQ PI dly=975, DQM PI dly= 978
1343 23:42:53.168233 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1344 23:42:53.168291
1345 23:42:53.168347 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1346 23:42:53.168405
1347 23:42:53.168462 Write Rank0 MR14 =0x1c
1348 23:42:53.168519
1349 23:42:53.168576 Final TX Range 0 Vref 28
1350 23:42:53.168633
1351 23:42:53.168690 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1352 23:42:53.168748
1353 23:42:53.168804 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1354 23:42:53.168862 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1355 23:42:53.168920 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1356 23:42:53.168979 Write Rank0 MR3 =0xb0
1357 23:42:53.169036 DramC Write-DBI on
1358 23:42:53.169093 ==
1359 23:42:53.169150 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1360 23:42:53.169208 fsp= 1, odt_onoff= 1, Byte mode= 0
1361 23:42:53.169266 ==
1362 23:42:53.169341 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1363 23:42:53.169401
1364 23:42:53.169468 Begin, DQ Scan Range 698~762
1365 23:42:53.169539
1366 23:42:53.169597
1367 23:42:53.169654 TX Vref Scan disable
1368 23:42:53.169718 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1369 23:42:53.169828 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1370 23:42:53.169896 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1371 23:42:53.169962 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1372 23:42:53.170045 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1373 23:42:53.170106 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1374 23:42:53.170171 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1375 23:42:53.170233 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1376 23:42:53.170296 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1377 23:42:53.170357 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1378 23:42:53.170415 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1379 23:42:53.170478 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1380 23:42:53.170539 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1381 23:42:53.170598 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1382 23:42:53.170656 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1383 23:42:53.170715 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1384 23:42:53.170776 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1385 23:42:53.170838 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1386 23:42:53.170899 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1387 23:42:53.170961 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1388 23:42:53.171021 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1389 23:42:53.171079 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1390 23:42:53.171156 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1391 23:42:53.171215 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1392 23:42:53.171296 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1393 23:42:53.171373 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1394 23:42:53.171451 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1395 23:42:53.171534 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1396 23:42:53.171598 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1397 23:42:53.171660 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1398 23:42:53.171719 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1399 23:42:53.171810 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1400 23:42:53.171876 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1401 23:42:53.171954 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1402 23:42:53.172020 Byte0, DQ PI dly=732, DQM PI dly= 732
1403 23:42:53.172079 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1404 23:42:53.172137
1405 23:42:53.172194 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1406 23:42:53.172253
1407 23:42:53.172309 Byte1, DQ PI dly=722, DQM PI dly= 722
1408 23:42:53.172368 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1409 23:42:53.172427
1410 23:42:53.172484 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1411 23:42:53.172542
1412 23:42:53.172599 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1413 23:42:53.172657 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1414 23:42:53.172721 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1415 23:42:53.172793 Write Rank0 MR3 =0x30
1416 23:42:53.172852 DramC Write-DBI off
1417 23:42:53.172909
1418 23:42:53.172966 [DATLAT]
1419 23:42:53.173023 Freq=1600, CH0 RK0, use_rxtx_scan=0
1420 23:42:53.173082
1421 23:42:53.173139 DATLAT Default: 0xf
1422 23:42:53.173196 7, 0xFFFF, sum=0
1423 23:42:53.173253 8, 0xFFFF, sum=0
1424 23:42:53.173311 9, 0xFFFF, sum=0
1425 23:42:53.173369 10, 0xFFFF, sum=0
1426 23:42:53.173428 11, 0xFFFF, sum=0
1427 23:42:53.173485 12, 0xFFFF, sum=0
1428 23:42:53.173543 13, 0xFFFF, sum=0
1429 23:42:53.173601 14, 0x0, sum=1
1430 23:42:53.173659 15, 0x0, sum=2
1431 23:42:53.173716 16, 0x0, sum=3
1432 23:42:53.173773 17, 0x0, sum=4
1433 23:42:53.173831 pattern=2 first_step=14 total pass=5 best_step=16
1434 23:42:53.173888 ==
1435 23:42:53.174160 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1436 23:42:53.174227 fsp= 1, odt_onoff= 1, Byte mode= 0
1437 23:42:53.174286 ==
1438 23:42:53.174344 Start DQ dly to find pass range UseTestEngine =1
1439 23:42:53.174417 x-axis: bit #, y-axis: DQ dly (-127~63)
1440 23:42:53.174477 RX Vref Scan = 1
1441 23:42:53.174538
1442 23:42:53.174596 RX Vref found, early break!
1443 23:42:53.174654
1444 23:42:53.174711 Final RX Vref 12, apply to both rank0 and 1
1445 23:42:53.174769 ==
1446 23:42:53.174827 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1447 23:42:53.174885 fsp= 1, odt_onoff= 1, Byte mode= 0
1448 23:42:53.174942 ==
1449 23:42:53.175000 DQS Delay:
1450 23:42:53.175058 DQS0 = 0, DQS1 = 0
1451 23:42:53.175115 DQM Delay:
1452 23:42:53.175172 DQM0 = 19, DQM1 = 18
1453 23:42:53.175230 DQ Delay:
1454 23:42:53.175287 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1455 23:42:53.175344 DQ4 =20, DQ5 =17, DQ6 =18, DQ7 =20
1456 23:42:53.175401 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =17
1457 23:42:53.175469 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =21
1458 23:42:53.175527
1459 23:42:53.175583
1460 23:42:53.175640
1461 23:42:53.175696 [DramC_TX_OE_Calibration] TA2
1462 23:42:53.175753 Original DQ_B0 (3 6) =30, OEN = 27
1463 23:42:53.175810 Original DQ_B1 (3 6) =30, OEN = 27
1464 23:42:53.175868 23, 0x0, End_B0=23 End_B1=23
1465 23:42:53.175926 24, 0x0, End_B0=24 End_B1=24
1466 23:42:53.175984 25, 0x0, End_B0=25 End_B1=25
1467 23:42:53.176042 26, 0x0, End_B0=26 End_B1=26
1468 23:42:53.176100 27, 0x0, End_B0=27 End_B1=27
1469 23:42:53.176158 28, 0x0, End_B0=28 End_B1=28
1470 23:42:53.176217 29, 0x0, End_B0=29 End_B1=29
1471 23:42:53.176275 30, 0x0, End_B0=30 End_B1=30
1472 23:42:53.176333 31, 0xFFFF, End_B0=30 End_B1=30
1473 23:42:53.176392 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1474 23:42:53.176449 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1475 23:42:53.176507
1476 23:42:53.176564
1477 23:42:53.176620 Write Rank0 MR23 =0x3f
1478 23:42:53.176677 [DQSOSC]
1479 23:42:53.176734 [DQSOSCAuto] RK0, (LSB)MR18= 0x1414, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1480 23:42:53.176793 CH0_RK0: MR19=0x303, MR18=0x1414, DQSOSC=399, MR23=63, INC=15, DEC=23
1481 23:42:53.176851 Write Rank0 MR23 =0x3f
1482 23:42:53.176908 [DQSOSC]
1483 23:42:53.176965 [DQSOSCAuto] RK0, (LSB)MR18= 0x1414, (MSB)MR19= 0x303, tDQSOscB0 = 399 ps tDQSOscB1 = 399 ps
1484 23:42:53.177023 CH0 RK0: MR19=303, MR18=1414
1485 23:42:53.177080 [RankSwap] Rank num 2, (Multi 1), Rank 1
1486 23:42:53.177137 Write Rank0 MR2 =0xad
1487 23:42:53.177194 [Write Leveling]
1488 23:42:53.177251 delay byte0 byte1 byte2 byte3
1489 23:42:53.177308
1490 23:42:53.177364 10 0 0
1491 23:42:53.177422 11 0 0
1492 23:42:53.177480 12 0 0
1493 23:42:53.177538 13 0 0
1494 23:42:53.177595 14 0 0
1495 23:42:53.177653 15 0 0
1496 23:42:53.177710 16 0 0
1497 23:42:53.177768 17 0 0
1498 23:42:53.177826 18 0 0
1499 23:42:53.177884 19 0 0
1500 23:42:53.177941 20 0 0
1501 23:42:53.177998 21 0 0
1502 23:42:53.178055 22 0 0
1503 23:42:53.178113 23 0 0
1504 23:42:53.178170 24 0 ff
1505 23:42:53.178228 25 ff ff
1506 23:42:53.178286 26 ff ff
1507 23:42:53.178343 27 ff ff
1508 23:42:53.178401 28 ff ff
1509 23:42:53.178458 29 ff ff
1510 23:42:53.178515 30 ff ff
1511 23:42:53.178573 31 ff ff
1512 23:42:53.178630 pass bytecount = 0xff (0xff: all bytes pass)
1513 23:42:53.178688
1514 23:42:53.178744 DQS0 dly: 25
1515 23:42:53.178801 DQS1 dly: 24
1516 23:42:53.178858 Write Rank0 MR2 =0x2d
1517 23:42:53.178915 [RankSwap] Rank num 2, (Multi 1), Rank 0
1518 23:42:53.178972 Write Rank1 MR1 =0xd6
1519 23:42:53.179028 [Gating]
1520 23:42:53.179085 ==
1521 23:42:53.179142 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1522 23:42:53.179199 fsp= 1, odt_onoff= 1, Byte mode= 0
1523 23:42:53.179256 ==
1524 23:42:53.179312 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1525 23:42:53.179371 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1526 23:42:53.179461 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1527 23:42:53.179523 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1528 23:42:53.179582 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1529 23:42:53.179640 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1530 23:42:53.179698 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1531 23:42:53.179756 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1532 23:42:53.179814 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1533 23:42:53.179874 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1534 23:42:53.179933 3 2 8 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1535 23:42:53.179991 3 2 12 |3534 2f2e |(11 11)(11 11) |(0 0)(1 1)| 0
1536 23:42:53.180050 3 2 16 |3534 1918 |(11 11)(11 11) |(0 0)(1 1)| 0
1537 23:42:53.180108 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1538 23:42:53.180166 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1539 23:42:53.180224 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1540 23:42:53.180282 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 23:42:53.180363 3 3 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1542 23:42:53.180424 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 23:42:53.180482 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 23:42:53.180541 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1545 23:42:53.180600 3 3 20 |3534 e0d |(11 11)(11 11) |(0 0)(1 1)| 0
1546 23:42:53.180659 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1547 23:42:53.180717 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1548 23:42:53.180776 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1549 23:42:53.180834 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 23:42:53.180893 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1551 23:42:53.180951 3 4 8 |b0b 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1552 23:42:53.181010 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1553 23:42:53.181068 3 4 16 |3d3d 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
1554 23:42:53.181125 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 23:42:53.181184 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 23:42:53.181242 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 23:42:53.181300 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 23:42:53.181358 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 23:42:53.181416 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 23:42:53.181669 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 23:42:53.181736 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 23:42:53.181796 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 23:42:53.181855 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 23:42:53.181914 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 23:42:53.181973 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 23:42:53.182031 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1567 23:42:53.182091 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1568 23:42:53.182149 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1569 23:42:53.182207 3 6 8 |605 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1570 23:42:53.182265 [Byte 0] Lead/lag Transition tap number (3)
1571 23:42:53.182322 [Byte 1] Lead/lag Transition tap number (2)
1572 23:42:53.182379 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1573 23:42:53.182438 [Byte 0]First pass (3, 6, 12)
1574 23:42:53.182495 3 6 16 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
1575 23:42:53.182553 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1576 23:42:53.182611 [Byte 1]First pass (3, 6, 20)
1577 23:42:53.182668 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 23:42:53.182726 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 23:42:53.182784 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 23:42:53.182842 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 23:42:53.182900 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 23:42:53.182958 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 23:42:53.183016 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 23:42:53.183074 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 23:42:53.183133 All bytes gating window > 1UI, Early break!
1586 23:42:53.183191
1587 23:42:53.183247 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1588 23:42:53.183305
1589 23:42:53.183363 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1590 23:42:53.183427
1591 23:42:53.183484
1592 23:42:53.183540
1593 23:42:53.183597 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1594 23:42:53.183654
1595 23:42:53.183711 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1596 23:42:53.183768
1597 23:42:53.183824
1598 23:42:53.183881 Write Rank1 MR1 =0x56
1599 23:42:53.183937
1600 23:42:53.183993 best RODT dly(2T, 0.5T) = (2, 3)
1601 23:42:53.184051
1602 23:42:53.184107 best RODT dly(2T, 0.5T) = (2, 3)
1603 23:42:53.184164 ==
1604 23:42:53.184221 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1605 23:42:53.184278 fsp= 1, odt_onoff= 1, Byte mode= 0
1606 23:42:53.184336 ==
1607 23:42:53.184394 Start DQ dly to find pass range UseTestEngine =0
1608 23:42:53.184451 x-axis: bit #, y-axis: DQ dly (-127~63)
1609 23:42:53.184509 RX Vref Scan = 0
1610 23:42:53.184566 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1611 23:42:53.184624 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1612 23:42:53.184683 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1613 23:42:53.184742 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1614 23:42:53.184800 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1615 23:42:53.184859 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1616 23:42:53.184922 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1617 23:42:53.184980 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1618 23:42:53.185038 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1619 23:42:53.185096 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1620 23:42:53.185153 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1621 23:42:53.185211 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1622 23:42:53.185270 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1623 23:42:53.185328 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1624 23:42:53.185386 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1625 23:42:53.185444 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1626 23:42:53.185503 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1627 23:42:53.185560 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1628 23:42:53.185618 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1629 23:42:53.185677 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1630 23:42:53.185735 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1631 23:42:53.185793 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1632 23:42:53.185850 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1633 23:42:53.185908 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1634 23:42:53.185966 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1635 23:42:53.186025 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1636 23:42:53.186083 0, [0] xxxoxxxx oxxoxxxx [MSB]
1637 23:42:53.186141 1, [0] xxxoxoxx ooxooxxx [MSB]
1638 23:42:53.186199 2, [0] xxxoxooo ooxoooxx [MSB]
1639 23:42:53.186257 3, [0] xxxoxooo ooxoooox [MSB]
1640 23:42:53.186315 4, [0] xooooooo ooxoooox [MSB]
1641 23:42:53.186373 5, [0] oooooooo ooxooooo [MSB]
1642 23:42:53.186431 6, [0] oooooooo ooxooooo [MSB]
1643 23:42:53.186489 34, [0] oooooooo xooooooo [MSB]
1644 23:42:53.186548 35, [0] oooxoooo xooooooo [MSB]
1645 23:42:53.186606 36, [0] oooxoooo xooxoooo [MSB]
1646 23:42:53.186665 37, [0] oooxoxoo xxoxoxoo [MSB]
1647 23:42:53.186724 38, [0] oooxoxoo xxoxoxxo [MSB]
1648 23:42:53.186782 39, [0] oooxoxxx xxoxxxxo [MSB]
1649 23:42:53.186840 40, [0] oooxoxxx xxoxxxxo [MSB]
1650 23:42:53.186898 41, [0] oxxxxxxx xxoxxxxx [MSB]
1651 23:42:53.186956 42, [0] oxxxxxxx xxoxxxxx [MSB]
1652 23:42:53.187015 43, [0] xxxxxxxx xxoxxxxx [MSB]
1653 23:42:53.187073 44, [0] xxxxxxxx xxoxxxxx [MSB]
1654 23:42:53.187131 45, [0] xxxxxxxx xxxxxxxx [MSB]
1655 23:42:53.187189 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1656 23:42:53.187247 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1657 23:42:53.187304 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1658 23:42:53.187361 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1659 23:42:53.187423 iDelay=45, Bit 4, Center 22 (4 ~ 40) 37
1660 23:42:53.187481 iDelay=45, Bit 5, Center 18 (1 ~ 36) 36
1661 23:42:53.187537 iDelay=45, Bit 6, Center 20 (2 ~ 38) 37
1662 23:42:53.187595 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1663 23:42:53.187652 iDelay=45, Bit 8, Center 15 (-2 ~ 33) 36
1664 23:42:53.187709 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1665 23:42:53.187766 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1666 23:42:53.187824 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1667 23:42:53.187881 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1668 23:42:53.187938 iDelay=45, Bit 13, Center 19 (2 ~ 36) 35
1669 23:42:53.187994 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1670 23:42:53.188051 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1671 23:42:53.188107 ==
1672 23:42:53.188168 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1673 23:42:53.188225 fsp= 1, odt_onoff= 1, Byte mode= 0
1674 23:42:53.188283 ==
1675 23:42:53.188339 DQS Delay:
1676 23:42:53.188396 DQS0 = 0, DQS1 = 0
1677 23:42:53.188453 DQM Delay:
1678 23:42:53.188509 DQM0 = 20, DQM1 = 19
1679 23:42:53.188567 DQ Delay:
1680 23:42:53.188624 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =16
1681 23:42:53.188681 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1682 23:42:53.188930 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1683 23:42:53.188994 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
1684 23:42:53.189054
1685 23:42:53.189113
1686 23:42:53.189171 DramC Write-DBI off
1687 23:42:53.189228 ==
1688 23:42:53.189286 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1689 23:42:53.189343 fsp= 1, odt_onoff= 1, Byte mode= 0
1690 23:42:53.189400 ==
1691 23:42:53.189457 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1692 23:42:53.189515
1693 23:42:53.189571 Begin, DQ Scan Range 920~1176
1694 23:42:53.189628
1695 23:42:53.189684
1696 23:42:53.189741 TX Vref Scan disable
1697 23:42:53.189798 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1698 23:42:53.189856 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1699 23:42:53.189915 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1700 23:42:53.189974 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1701 23:42:53.190032 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1702 23:42:53.190089 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1703 23:42:53.190147 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1704 23:42:53.190205 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1705 23:42:53.190263 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1706 23:42:53.190321 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1707 23:42:53.190379 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1708 23:42:53.190438 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1709 23:42:53.190496 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1710 23:42:53.190554 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1711 23:42:53.190611 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1712 23:42:53.190668 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1713 23:42:53.190726 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1714 23:42:53.190784 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1715 23:42:53.190842 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1716 23:42:53.190900 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1717 23:42:53.190958 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1718 23:42:53.191016 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1719 23:42:53.191085 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1720 23:42:53.191148 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1721 23:42:53.191207 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1722 23:42:53.191265 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1723 23:42:53.191323 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1724 23:42:53.191383 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1725 23:42:53.191456 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1726 23:42:53.191516 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1727 23:42:53.191575 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1728 23:42:53.191633 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1729 23:42:53.191692 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1730 23:42:53.191750 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1731 23:42:53.191808 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1732 23:42:53.191866 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1733 23:42:53.191924 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1734 23:42:53.191983 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1735 23:42:53.192041 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1736 23:42:53.192100 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1737 23:42:53.192158 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1738 23:42:53.192215 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1739 23:42:53.192274 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1740 23:42:53.192332 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1741 23:42:53.192391 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1742 23:42:53.192448 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1743 23:42:53.192506 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1744 23:42:53.192564 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1745 23:42:53.192622 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1746 23:42:53.192680 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1747 23:42:53.192738 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1748 23:42:53.192796 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1749 23:42:53.192855 972 |3 6 12|[0] xxxooooo ooxoooox [MSB]
1750 23:42:53.192913 973 |3 6 13|[0] xoxooooo ooxoooox [MSB]
1751 23:42:53.192971 974 |3 6 14|[0] ooxooooo ooxooooo [MSB]
1752 23:42:53.193029 987 |3 6 27|[0] oooxoooo xooooooo [MSB]
1753 23:42:53.193088 988 |3 6 28|[0] oooxoooo xooooooo [MSB]
1754 23:42:53.193146 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1755 23:42:53.193204 990 |3 6 30|[0] oooxoxoo xxxxxxxx [MSB]
1756 23:42:53.193263 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1757 23:42:53.193321 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1758 23:42:53.193379 Byte0, DQ PI dly=981, DQM PI dly= 981
1759 23:42:53.193436 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1760 23:42:53.193495
1761 23:42:53.193552 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1762 23:42:53.193610
1763 23:42:53.193667 Byte1, DQ PI dly=979, DQM PI dly= 979
1764 23:42:53.193724 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1765 23:42:53.193781
1766 23:42:53.193838 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1767 23:42:53.193895
1768 23:42:53.193951 ==
1769 23:42:53.194009 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1770 23:42:53.194066 fsp= 1, odt_onoff= 1, Byte mode= 0
1771 23:42:53.194123 ==
1772 23:42:53.194179 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1773 23:42:53.194237
1774 23:42:53.194314 Begin, DQ Scan Range 955~1019
1775 23:42:53.194373 Write Rank1 MR14 =0x0
1776 23:42:53.194430
1777 23:42:53.194487 CH=0, VrefRange= 0, VrefLevel = 0
1778 23:42:53.194544 TX Bit0 (976~990) 15 983, Bit8 (969~982) 14 975,
1779 23:42:53.194602 TX Bit1 (976~986) 11 981, Bit9 (971~985) 15 978,
1780 23:42:53.194681 TX Bit2 (976~987) 12 981, Bit10 (977~988) 12 982,
1781 23:42:53.194740 TX Bit3 (969~981) 13 975, Bit11 (970~983) 14 976,
1782 23:42:53.194798 TX Bit4 (975~986) 12 980, Bit12 (973~985) 13 979,
1783 23:42:53.194855 TX Bit5 (972~984) 13 978, Bit13 (975~983) 9 979,
1784 23:42:53.194912 TX Bit6 (973~985) 13 979, Bit14 (974~985) 12 979,
1785 23:42:53.194971 TX Bit7 (974~987) 14 980, Bit15 (976~988) 13 982,
1786 23:42:53.195028
1787 23:42:53.195106 Write Rank1 MR14 =0x2
1788 23:42:53.195164
1789 23:42:53.195222 CH=0, VrefRange= 0, VrefLevel = 2
1790 23:42:53.195280 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1791 23:42:53.195338 TX Bit1 (975~987) 13 981, Bit9 (971~985) 15 978,
1792 23:42:53.195396 TX Bit2 (976~989) 14 982, Bit10 (977~990) 14 983,
1793 23:42:53.195470 TX Bit3 (969~983) 15 976, Bit11 (970~983) 14 976,
1794 23:42:53.195529 TX Bit4 (974~987) 14 980, Bit12 (973~985) 13 979,
1795 23:42:53.195783 TX Bit5 (971~984) 14 977, Bit13 (974~983) 10 978,
1796 23:42:53.195849 TX Bit6 (973~986) 14 979, Bit14 (974~986) 13 980,
1797 23:42:53.195908 TX Bit7 (974~988) 15 981, Bit15 (976~990) 15 983,
1798 23:42:53.195967
1799 23:42:53.196025 Write Rank1 MR14 =0x4
1800 23:42:53.196082
1801 23:42:53.196139 CH=0, VrefRange= 0, VrefLevel = 4
1802 23:42:53.196196 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1803 23:42:53.196254 TX Bit1 (975~988) 14 981, Bit9 (970~986) 17 978,
1804 23:42:53.196312 TX Bit2 (976~990) 15 983, Bit10 (976~991) 16 983,
1805 23:42:53.196370 TX Bit3 (969~983) 15 976, Bit11 (970~984) 15 977,
1806 23:42:53.196428 TX Bit4 (974~988) 15 981, Bit12 (973~986) 14 979,
1807 23:42:53.196485 TX Bit5 (971~985) 15 978, Bit13 (974~984) 11 979,
1808 23:42:53.196543 TX Bit6 (972~987) 16 979, Bit14 (973~987) 15 980,
1809 23:42:53.196600 TX Bit7 (973~989) 17 981, Bit15 (976~990) 15 983,
1810 23:42:53.196657
1811 23:42:53.196714 Write Rank1 MR14 =0x6
1812 23:42:53.196770
1813 23:42:53.196827 CH=0, VrefRange= 0, VrefLevel = 6
1814 23:42:53.196884 TX Bit0 (976~991) 16 983, Bit8 (968~984) 17 976,
1815 23:42:53.196942 TX Bit1 (975~989) 15 982, Bit9 (970~986) 17 978,
1816 23:42:53.196999 TX Bit2 (976~990) 15 983, Bit10 (976~991) 16 983,
1817 23:42:53.197065 TX Bit3 (969~984) 16 976, Bit11 (969~984) 16 976,
1818 23:42:53.197124 TX Bit4 (974~989) 16 981, Bit12 (972~987) 16 979,
1819 23:42:53.197182 TX Bit5 (971~986) 16 978, Bit13 (973~984) 12 978,
1820 23:42:53.197240 TX Bit6 (972~988) 17 980, Bit14 (973~988) 16 980,
1821 23:42:53.197297 TX Bit7 (972~990) 19 981, Bit15 (975~991) 17 983,
1822 23:42:53.197354
1823 23:42:53.197411 Write Rank1 MR14 =0x8
1824 23:42:53.197468
1825 23:42:53.197525 CH=0, VrefRange= 0, VrefLevel = 8
1826 23:42:53.197581 TX Bit0 (975~991) 17 983, Bit8 (968~984) 17 976,
1827 23:42:53.197639 TX Bit1 (974~989) 16 981, Bit9 (970~987) 18 978,
1828 23:42:53.197696 TX Bit2 (976~991) 16 983, Bit10 (976~992) 17 984,
1829 23:42:53.197754 TX Bit3 (968~984) 17 976, Bit11 (969~985) 17 977,
1830 23:42:53.197811 TX Bit4 (973~990) 18 981, Bit12 (971~987) 17 979,
1831 23:42:53.197868 TX Bit5 (970~987) 18 978, Bit13 (973~985) 13 979,
1832 23:42:53.197926 TX Bit6 (972~987) 16 979, Bit14 (972~989) 18 980,
1833 23:42:53.197984 TX Bit7 (972~990) 19 981, Bit15 (975~991) 17 983,
1834 23:42:53.198042
1835 23:42:53.198099 Write Rank1 MR14 =0xa
1836 23:42:53.198156
1837 23:42:53.198212 CH=0, VrefRange= 0, VrefLevel = 10
1838 23:42:53.198270 TX Bit0 (975~992) 18 983, Bit8 (968~984) 17 976,
1839 23:42:53.198328 TX Bit1 (974~990) 17 982, Bit9 (970~988) 19 979,
1840 23:42:53.198386 TX Bit2 (975~991) 17 983, Bit10 (976~992) 17 984,
1841 23:42:53.198443 TX Bit3 (968~985) 18 976, Bit11 (969~985) 17 977,
1842 23:42:53.198500 TX Bit4 (972~991) 20 981, Bit12 (970~989) 20 979,
1843 23:42:53.198558 TX Bit5 (970~987) 18 978, Bit13 (972~986) 15 979,
1844 23:42:53.198615 TX Bit6 (971~989) 19 980, Bit14 (971~989) 19 980,
1845 23:42:53.198672 TX Bit7 (972~991) 20 981, Bit15 (975~992) 18 983,
1846 23:42:53.198730
1847 23:42:53.198786 Write Rank1 MR14 =0xc
1848 23:42:53.198843
1849 23:42:53.198900 CH=0, VrefRange= 0, VrefLevel = 12
1850 23:42:53.198957 TX Bit0 (975~992) 18 983, Bit8 (968~985) 18 976,
1851 23:42:53.199015 TX Bit1 (974~991) 18 982, Bit9 (969~989) 21 979,
1852 23:42:53.199087 TX Bit2 (975~991) 17 983, Bit10 (975~992) 18 983,
1853 23:42:53.199146 TX Bit3 (968~985) 18 976, Bit11 (969~986) 18 977,
1854 23:42:53.199204 TX Bit4 (972~991) 20 981, Bit12 (970~989) 20 979,
1855 23:42:53.199262 TX Bit5 (970~987) 18 978, Bit13 (972~987) 16 979,
1856 23:42:53.199320 TX Bit6 (971~990) 20 980, Bit14 (971~990) 20 980,
1857 23:42:53.199377 TX Bit7 (971~991) 21 981, Bit15 (974~992) 19 983,
1858 23:42:53.199446
1859 23:42:53.199503 Write Rank1 MR14 =0xe
1860 23:42:53.199561
1861 23:42:53.199618 CH=0, VrefRange= 0, VrefLevel = 14
1862 23:42:53.199675 TX Bit0 (974~993) 20 983, Bit8 (968~985) 18 976,
1863 23:42:53.199733 TX Bit1 (973~991) 19 982, Bit9 (969~989) 21 979,
1864 23:42:53.199790 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1865 23:42:53.199848 TX Bit3 (968~986) 19 977, Bit11 (968~987) 20 977,
1866 23:42:53.199906 TX Bit4 (972~991) 20 981, Bit12 (970~990) 21 980,
1867 23:42:53.199963 TX Bit5 (970~988) 19 979, Bit13 (971~988) 18 979,
1868 23:42:53.200021 TX Bit6 (970~991) 22 980, Bit14 (971~990) 20 980,
1869 23:42:53.200079 TX Bit7 (972~992) 21 982, Bit15 (975~992) 18 983,
1870 23:42:53.200137
1871 23:42:53.200195 Write Rank1 MR14 =0x10
1872 23:42:53.200272
1873 23:42:53.200331 CH=0, VrefRange= 0, VrefLevel = 16
1874 23:42:53.200389 TX Bit0 (974~993) 20 983, Bit8 (967~986) 20 976,
1875 23:42:53.200446 TX Bit1 (973~992) 20 982, Bit9 (968~989) 22 978,
1876 23:42:53.200504 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1877 23:42:53.200562 TX Bit3 (968~986) 19 977, Bit11 (968~987) 20 977,
1878 23:42:53.200620 TX Bit4 (972~992) 21 982, Bit12 (970~990) 21 980,
1879 23:42:53.200677 TX Bit5 (969~988) 20 978, Bit13 (971~989) 19 980,
1880 23:42:53.200734 TX Bit6 (970~991) 22 980, Bit14 (970~990) 21 980,
1881 23:42:53.200792 TX Bit7 (971~992) 22 981, Bit15 (974~993) 20 983,
1882 23:42:53.200869
1883 23:42:53.200928 Write Rank1 MR14 =0x12
1884 23:42:53.200986
1885 23:42:53.201053 CH=0, VrefRange= 0, VrefLevel = 18
1886 23:42:53.201155 TX Bit0 (974~994) 21 984, Bit8 (967~987) 21 977,
1887 23:42:53.201221 TX Bit1 (973~992) 20 982, Bit9 (969~990) 22 979,
1888 23:42:53.201281 TX Bit2 (975~992) 18 983, Bit10 (974~994) 21 984,
1889 23:42:53.201340 TX Bit3 (967~987) 21 977, Bit11 (968~988) 21 978,
1890 23:42:53.201398 TX Bit4 (971~992) 22 981, Bit12 (969~990) 22 979,
1891 23:42:53.201455 TX Bit5 (969~990) 22 979, Bit13 (970~989) 20 979,
1892 23:42:53.201514 TX Bit6 (970~991) 22 980, Bit14 (970~990) 21 980,
1893 23:42:53.201571 TX Bit7 (971~992) 22 981, Bit15 (974~993) 20 983,
1894 23:42:53.201629
1895 23:42:53.201686 Write Rank1 MR14 =0x14
1896 23:42:53.201744
1897 23:42:53.201801 CH=0, VrefRange= 0, VrefLevel = 20
1898 23:42:53.202053 TX Bit0 (974~994) 21 984, Bit8 (967~988) 22 977,
1899 23:42:53.202119 TX Bit1 (972~992) 21 982, Bit9 (968~990) 23 979,
1900 23:42:53.202178 TX Bit2 (974~993) 20 983, Bit10 (974~995) 22 984,
1901 23:42:53.202237 TX Bit3 (967~988) 22 977, Bit11 (968~989) 22 978,
1902 23:42:53.202295 TX Bit4 (971~992) 22 981, Bit12 (969~991) 23 980,
1903 23:42:53.202353 TX Bit5 (969~991) 23 980, Bit13 (970~989) 20 979,
1904 23:42:53.202411 TX Bit6 (969~991) 23 980, Bit14 (969~991) 23 980,
1905 23:42:53.202469 TX Bit7 (970~992) 23 981, Bit15 (974~994) 21 984,
1906 23:42:53.354584
1907 23:42:53.355105 Write Rank1 MR14 =0x16
1908 23:42:53.355516
1909 23:42:53.355863 CH=0, VrefRange= 0, VrefLevel = 22
1910 23:42:53.356189 TX Bit0 (974~994) 21 984, Bit8 (967~989) 23 978,
1911 23:42:53.356512 TX Bit1 (972~992) 21 982, Bit9 (968~990) 23 979,
1912 23:42:53.356826 TX Bit2 (974~993) 20 983, Bit10 (973~995) 23 984,
1913 23:42:53.357134 TX Bit3 (967~988) 22 977, Bit11 (967~989) 23 978,
1914 23:42:53.357438 TX Bit4 (970~993) 24 981, Bit12 (969~991) 23 980,
1915 23:42:53.357742 TX Bit5 (969~991) 23 980, Bit13 (969~990) 22 979,
1916 23:42:53.358043 TX Bit6 (969~992) 24 980, Bit14 (969~991) 23 980,
1917 23:42:53.358403 TX Bit7 (970~993) 24 981, Bit15 (973~994) 22 983,
1918 23:42:53.358712
1919 23:42:53.359013 Write Rank1 MR14 =0x18
1920 23:42:53.359312
1921 23:42:53.359646 CH=0, VrefRange= 0, VrefLevel = 24
1922 23:42:53.359942 TX Bit0 (973~994) 22 983, Bit8 (967~989) 23 978,
1923 23:42:53.360240 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1924 23:42:53.360536 TX Bit2 (974~994) 21 984, Bit10 (974~995) 22 984,
1925 23:42:53.360831 TX Bit3 (967~988) 22 977, Bit11 (967~990) 24 978,
1926 23:42:53.361124 TX Bit4 (970~993) 24 981, Bit12 (968~991) 24 979,
1927 23:42:53.361427 TX Bit5 (968~991) 24 979, Bit13 (969~990) 22 979,
1928 23:42:53.361692 TX Bit6 (969~992) 24 980, Bit14 (969~992) 24 980,
1929 23:42:53.361957 TX Bit7 (970~993) 24 981, Bit15 (973~994) 22 983,
1930 23:42:53.362220
1931 23:42:53.362482 Write Rank1 MR14 =0x1a
1932 23:42:53.362746
1933 23:42:53.363006 CH=0, VrefRange= 0, VrefLevel = 26
1934 23:42:53.363270 TX Bit0 (972~995) 24 983, Bit8 (966~990) 25 978,
1935 23:42:53.363607 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1936 23:42:53.363890 TX Bit2 (973~994) 22 983, Bit10 (973~996) 24 984,
1937 23:42:53.364159 TX Bit3 (966~989) 24 977, Bit11 (967~990) 24 978,
1938 23:42:53.364426 TX Bit4 (970~993) 24 981, Bit12 (968~992) 25 980,
1939 23:42:53.364694 TX Bit5 (969~991) 23 980, Bit13 (969~990) 22 979,
1940 23:42:53.365043 TX Bit6 (969~992) 24 980, Bit14 (969~992) 24 980,
1941 23:42:53.365319 TX Bit7 (970~993) 24 981, Bit15 (972~995) 24 983,
1942 23:42:53.365588
1943 23:42:53.365851 Write Rank1 MR14 =0x1c
1944 23:42:53.366120
1945 23:42:53.366385 CH=0, VrefRange= 0, VrefLevel = 28
1946 23:42:53.366652 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
1947 23:42:53.366918 TX Bit1 (970~994) 25 982, Bit9 (968~991) 24 979,
1948 23:42:53.367185 TX Bit2 (973~995) 23 984, Bit10 (973~997) 25 985,
1949 23:42:53.367497 TX Bit3 (966~989) 24 977, Bit11 (967~990) 24 978,
1950 23:42:53.367780 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
1951 23:42:53.368047 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
1952 23:42:53.368313 TX Bit6 (969~993) 25 981, Bit14 (968~992) 25 980,
1953 23:42:53.368580 TX Bit7 (970~994) 25 982, Bit15 (972~996) 25 984,
1954 23:42:53.368845
1955 23:42:53.369107 Write Rank1 MR14 =0x1e
1956 23:42:53.369372
1957 23:42:53.369632 CH=0, VrefRange= 0, VrefLevel = 30
1958 23:42:53.369897 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
1959 23:42:53.370164 TX Bit1 (970~994) 25 982, Bit9 (968~990) 23 979,
1960 23:42:53.370430 TX Bit2 (973~995) 23 984, Bit10 (973~997) 25 985,
1961 23:42:53.370697 TX Bit3 (966~991) 26 978, Bit11 (967~990) 24 978,
1962 23:42:53.370962 TX Bit4 (969~994) 26 981, Bit12 (968~992) 25 980,
1963 23:42:53.371225 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
1964 23:42:53.371529 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
1965 23:42:53.371803 TX Bit7 (969~994) 26 981, Bit15 (972~996) 25 984,
1966 23:42:53.372070
1967 23:42:53.372387 Write Rank1 MR14 =0x20
1968 23:42:53.372655
1969 23:42:53.372920 CH=0, VrefRange= 0, VrefLevel = 32
1970 23:42:53.373240 TX Bit0 (972~997) 26 984, Bit8 (966~990) 25 978,
1971 23:42:53.373524 TX Bit1 (970~995) 26 982, Bit9 (968~991) 24 979,
1972 23:42:53.373792 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
1973 23:42:53.374058 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1974 23:42:53.374363 TX Bit4 (969~995) 27 982, Bit12 (968~992) 25 980,
1975 23:42:53.374658 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
1976 23:42:53.374960 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
1977 23:42:53.375228 TX Bit7 (969~995) 27 982, Bit15 (971~996) 26 983,
1978 23:42:53.375545
1979 23:42:53.375821 Write Rank1 MR14 =0x22
1980 23:42:53.376088
1981 23:42:53.376350 CH=0, VrefRange= 0, VrefLevel = 34
1982 23:42:53.376616 TX Bit0 (972~997) 26 984, Bit8 (966~990) 25 978,
1983 23:42:53.376881 TX Bit1 (970~995) 26 982, Bit9 (968~991) 24 979,
1984 23:42:53.377149 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
1985 23:42:53.377417 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1986 23:42:53.377686 TX Bit4 (969~995) 27 982, Bit12 (968~992) 25 980,
1987 23:42:53.377953 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
1988 23:42:53.378220 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
1989 23:42:53.378484 TX Bit7 (969~995) 27 982, Bit15 (971~996) 26 983,
1990 23:42:53.378747
1991 23:42:53.379008 Write Rank1 MR14 =0x24
1992 23:42:53.379272
1993 23:42:53.379588 CH=0, VrefRange= 0, VrefLevel = 36
1994 23:42:53.379861 TX Bit0 (972~997) 26 984, Bit8 (966~990) 25 978,
1995 23:42:53.380126 TX Bit1 (970~995) 26 982, Bit9 (968~991) 24 979,
1996 23:42:53.380396 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
1997 23:42:53.381052 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
1998 23:42:53.381382 TX Bit4 (969~995) 27 982, Bit12 (968~992) 25 980,
1999 23:42:53.381664 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
2000 23:42:53.381938 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2001 23:42:53.382207 TX Bit7 (969~995) 27 982, Bit15 (971~996) 26 983,
2002 23:42:53.382474
2003 23:42:53.382740 Write Rank1 MR14 =0x26
2004 23:42:53.383074
2005 23:42:53.383350 CH=0, VrefRange= 0, VrefLevel = 38
2006 23:42:53.383656 TX Bit0 (972~997) 26 984, Bit8 (966~990) 25 978,
2007 23:42:53.383930 TX Bit1 (970~995) 26 982, Bit9 (968~991) 24 979,
2008 23:42:53.384201 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
2009 23:42:53.384452 TX Bit3 (966~990) 25 978, Bit11 (967~990) 24 978,
2010 23:42:53.384642 TX Bit4 (969~995) 27 982, Bit12 (968~992) 25 980,
2011 23:42:53.384833 TX Bit5 (967~992) 26 979, Bit13 (969~991) 23 980,
2012 23:42:53.385022 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2013 23:42:53.385213 TX Bit7 (969~995) 27 982, Bit15 (971~996) 26 983,
2014 23:42:53.385402
2015 23:42:53.385590
2016 23:42:53.385780 TX Vref found, early break! 378< 385
2017 23:42:53.385973 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2018 23:42:53.386164 u1DelayCellOfst[0]=7 cells (6 PI)
2019 23:42:53.386356 u1DelayCellOfst[1]=5 cells (4 PI)
2020 23:42:53.386547 u1DelayCellOfst[2]=7 cells (6 PI)
2021 23:42:53.386736 u1DelayCellOfst[3]=0 cells (0 PI)
2022 23:42:53.386923 u1DelayCellOfst[4]=5 cells (4 PI)
2023 23:42:53.387172 u1DelayCellOfst[5]=1 cells (1 PI)
2024 23:42:53.387366 u1DelayCellOfst[6]=2 cells (2 PI)
2025 23:42:53.387574 u1DelayCellOfst[7]=5 cells (4 PI)
2026 23:42:53.387766 Byte0, DQ PI dly=978, DQM PI dly= 981
2027 23:42:53.387957 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2028 23:42:53.388150
2029 23:42:53.388340 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2030 23:42:53.388534
2031 23:42:53.388722 u1DelayCellOfst[8]=0 cells (0 PI)
2032 23:42:53.388913 u1DelayCellOfst[9]=1 cells (1 PI)
2033 23:42:53.389123 u1DelayCellOfst[10]=7 cells (6 PI)
2034 23:42:53.389316 u1DelayCellOfst[11]=0 cells (0 PI)
2035 23:42:53.389480 u1DelayCellOfst[12]=2 cells (2 PI)
2036 23:42:53.389625 u1DelayCellOfst[13]=2 cells (2 PI)
2037 23:42:53.389768 u1DelayCellOfst[14]=2 cells (2 PI)
2038 23:42:53.389911 u1DelayCellOfst[15]=6 cells (5 PI)
2039 23:42:53.390054 Byte1, DQ PI dly=978, DQM PI dly= 981
2040 23:42:53.390197 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2041 23:42:53.390342
2042 23:42:53.390484 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2043 23:42:53.390627
2044 23:42:53.390769 Write Rank1 MR14 =0x20
2045 23:42:53.390913
2046 23:42:53.391067 Final TX Range 0 Vref 32
2047 23:42:53.391211
2048 23:42:53.391353 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2049 23:42:53.391524
2050 23:42:53.391670 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2051 23:42:53.391816 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2052 23:42:53.391960 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2053 23:42:53.392104 Write Rank1 MR3 =0xb0
2054 23:42:53.392248 DramC Write-DBI on
2055 23:42:53.392392 ==
2056 23:42:53.392536 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2057 23:42:53.392681 fsp= 1, odt_onoff= 1, Byte mode= 0
2058 23:42:53.392825 ==
2059 23:42:53.392990 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2060 23:42:53.393139
2061 23:42:53.393283 Begin, DQ Scan Range 701~765
2062 23:42:53.393426
2063 23:42:53.393568
2064 23:42:53.393709 TX Vref Scan disable
2065 23:42:53.393853 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2066 23:42:53.394001 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2067 23:42:53.394147 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2068 23:42:53.394293 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2069 23:42:53.394434 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2070 23:42:53.394551 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2071 23:42:53.394669 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2072 23:42:53.394786 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2073 23:42:53.394904 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2074 23:42:53.395020 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2075 23:42:53.395137 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2076 23:42:53.395253 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2077 23:42:53.395370 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2078 23:42:53.395561 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2079 23:42:53.395750 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2080 23:42:53.395875 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2081 23:42:53.395995 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2082 23:42:53.396112 740 |2 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
2083 23:42:53.396232 Byte0, DQ PI dly=726, DQM PI dly= 726
2084 23:42:53.396347 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2085 23:42:53.396463
2086 23:42:53.396578 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2087 23:42:53.396695
2088 23:42:53.396809 Byte1, DQ PI dly=723, DQM PI dly= 723
2089 23:42:53.396925 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2090 23:42:53.397128
2091 23:42:53.397263 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2092 23:42:53.397383
2093 23:42:53.397500 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2094 23:42:53.397618 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2095 23:42:53.397763 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2096 23:42:53.397883 Write Rank1 MR3 =0x30
2097 23:42:53.398000 DramC Write-DBI off
2098 23:42:53.398114
2099 23:42:53.398230 [DATLAT]
2100 23:42:53.398344 Freq=1600, CH0 RK1, use_rxtx_scan=0
2101 23:42:53.398460
2102 23:42:53.398575 DATLAT Default: 0x10
2103 23:42:53.398691 7, 0xFFFF, sum=0
2104 23:42:53.398807 8, 0xFFFF, sum=0
2105 23:42:53.398925 9, 0xFFFF, sum=0
2106 23:42:53.399043 10, 0xFFFF, sum=0
2107 23:42:53.399161 11, 0xFFFF, sum=0
2108 23:42:53.399277 12, 0xFFFF, sum=0
2109 23:42:53.399395 13, 0xFFFF, sum=0
2110 23:42:53.399505 14, 0x0, sum=1
2111 23:42:53.399604 15, 0x0, sum=2
2112 23:42:53.399701 16, 0x0, sum=3
2113 23:42:53.399799 17, 0x0, sum=4
2114 23:42:53.399896 pattern=2 first_step=14 total pass=5 best_step=16
2115 23:42:53.399993 ==
2116 23:42:53.400090 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2117 23:42:53.400188 fsp= 1, odt_onoff= 1, Byte mode= 0
2118 23:42:53.400283 ==
2119 23:42:53.400380 Start DQ dly to find pass range UseTestEngine =1
2120 23:42:53.400476 x-axis: bit #, y-axis: DQ dly (-127~63)
2121 23:42:53.400799 RX Vref Scan = 0
2122 23:42:53.400911 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2123 23:42:53.401012 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2124 23:42:53.401113 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2125 23:42:53.401234 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2126 23:42:53.401339 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2127 23:42:53.401440 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2128 23:42:53.401539 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2129 23:42:53.401638 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2130 23:42:53.401737 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2131 23:42:53.401835 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2132 23:42:53.401934 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2133 23:42:53.402031 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2134 23:42:53.402128 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2135 23:42:53.402226 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2136 23:42:53.402324 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2137 23:42:53.402421 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2138 23:42:53.402519 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2139 23:42:53.402618 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2140 23:42:53.402717 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2141 23:42:53.402815 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2142 23:42:53.402913 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2143 23:42:53.403010 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2144 23:42:53.403107 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2145 23:42:53.403209 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2146 23:42:53.403308 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2147 23:42:53.403419 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2148 23:42:53.403523 0, [0] xxxoxxxx oxxoxxxx [MSB]
2149 23:42:53.403623 1, [0] xxxoxoxx ooxooxxx [MSB]
2150 23:42:53.403722 2, [0] xxxoxoxx ooxoooox [MSB]
2151 23:42:53.403820 3, [0] xxxoxooo ooxoooox [MSB]
2152 23:42:53.403918 4, [0] xxxoxooo ooxoooox [MSB]
2153 23:42:53.404016 5, [0] xoxooooo ooxoooox [MSB]
2154 23:42:53.404114 6, [0] ooxooooo ooxoooox [MSB]
2155 23:42:53.404211 34, [0] oooooooo xooooooo [MSB]
2156 23:42:53.404309 35, [0] oooxoxoo xooxoxoo [MSB]
2157 23:42:53.404410 36, [0] oooxoxoo xooxoxoo [MSB]
2158 23:42:53.404494 37, [0] oooxoxoo xxoxoxoo [MSB]
2159 23:42:53.404577 38, [0] oooxoxxo xxoxxxoo [MSB]
2160 23:42:53.404662 39, [0] oxxxxxxx xxoxxxxo [MSB]
2161 23:42:53.404746 40, [0] oxxxxxxx xxoxxxxx [MSB]
2162 23:42:53.404830 41, [0] xxxxxxxx xxoxxxxx [MSB]
2163 23:42:53.404914 42, [0] xxxxxxxx xxoxxxxx [MSB]
2164 23:42:53.404997 43, [0] xxxxxxxx xxoxxxxx [MSB]
2165 23:42:53.405081 44, [0] xxxxxxxx xxxxxxxx [MSB]
2166 23:42:53.405164 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2167 23:42:53.405247 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2168 23:42:53.405329 iDelay=44, Bit 2, Center 22 (7 ~ 38) 32
2169 23:42:53.405411 iDelay=44, Bit 3, Center 16 (-2 ~ 34) 37
2170 23:42:53.405493 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
2171 23:42:53.405575 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2172 23:42:53.405657 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2173 23:42:53.405739 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2174 23:42:53.405820 iDelay=44, Bit 8, Center 15 (-3 ~ 33) 37
2175 23:42:53.405902 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2176 23:42:53.405985 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2177 23:42:53.406068 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2178 23:42:53.406151 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2179 23:42:53.406234 iDelay=44, Bit 13, Center 18 (2 ~ 34) 33
2180 23:42:53.406317 iDelay=44, Bit 14, Center 20 (2 ~ 38) 37
2181 23:42:53.406399 iDelay=44, Bit 15, Center 23 (7 ~ 39) 33
2182 23:42:53.406481 ==
2183 23:42:53.406563 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2184 23:42:53.406648 fsp= 1, odt_onoff= 1, Byte mode= 0
2185 23:42:53.406732 ==
2186 23:42:53.406815 DQS Delay:
2187 23:42:53.406896 DQS0 = 0, DQS1 = 0
2188 23:42:53.406979 DQM Delay:
2189 23:42:53.407061 DQM0 = 20, DQM1 = 19
2190 23:42:53.407144 DQ Delay:
2191 23:42:53.407226 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
2192 23:42:53.407309 DQ4 =21, DQ5 =17, DQ6 =20, DQ7 =20
2193 23:42:53.407392 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2194 23:42:53.407491 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =23
2195 23:42:53.407575
2196 23:42:53.407657
2197 23:42:53.407739
2198 23:42:53.407821 [DramC_TX_OE_Calibration] TA2
2199 23:42:53.407904 Original DQ_B0 (3 6) =30, OEN = 27
2200 23:42:53.407987 Original DQ_B1 (3 6) =30, OEN = 27
2201 23:42:53.408069 23, 0x0, End_B0=23 End_B1=23
2202 23:42:53.408153 24, 0x0, End_B0=24 End_B1=24
2203 23:42:53.408237 25, 0x0, End_B0=25 End_B1=25
2204 23:42:53.408321 26, 0x0, End_B0=26 End_B1=26
2205 23:42:53.408404 27, 0x0, End_B0=27 End_B1=27
2206 23:42:53.408488 28, 0x0, End_B0=28 End_B1=28
2207 23:42:53.408571 29, 0x0, End_B0=29 End_B1=29
2208 23:42:53.408654 30, 0x0, End_B0=30 End_B1=30
2209 23:42:53.408737 31, 0xFFFF, End_B0=30 End_B1=30
2210 23:42:53.408821 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2211 23:42:53.408904 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2212 23:42:53.408987
2213 23:42:53.409069
2214 23:42:53.409151 Write Rank1 MR23 =0x3f
2215 23:42:53.409233 [DQSOSC]
2216 23:42:53.409316 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2217 23:42:53.409405 CH0_RK1: MR19=0x202, MR18=0xD7D7, DQSOSC=433, MR23=63, INC=13, DEC=19
2218 23:42:53.409478 Write Rank1 MR23 =0x3f
2219 23:42:53.409551 [DQSOSC]
2220 23:42:53.409623 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2221 23:42:53.409696 CH0 RK1: MR19=202, MR18=D9D9
2222 23:42:53.409769 [RxdqsGatingPostProcess] freq 1600
2223 23:42:53.409858 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2224 23:42:53.409958 Rank: 0
2225 23:42:53.410035 best DQS0 dly(2T, 0.5T) = (2, 5)
2226 23:42:53.411820 best DQS1 dly(2T, 0.5T) = (2, 5)
2227 23:42:53.415456 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2228 23:42:53.419037 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2229 23:42:53.419215 Rank: 1
2230 23:42:53.422062 best DQS0 dly(2T, 0.5T) = (2, 6)
2231 23:42:53.425612 best DQS1 dly(2T, 0.5T) = (2, 6)
2232 23:42:53.425780 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2233 23:42:53.428943 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2234 23:42:53.435771 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2235 23:42:53.438790 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2236 23:42:53.442504 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2237 23:42:53.446078 Write Rank0 MR13 =0x59
2238 23:42:53.446249 ==
2239 23:42:53.449539 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2240 23:42:53.452931 fsp= 1, odt_onoff= 1, Byte mode= 0
2241 23:42:53.455899 ==
2242 23:42:53.456087 === u2Vref_new: 0x56 --> 0x3a
2243 23:42:53.459289 === u2Vref_new: 0x58 --> 0x58
2244 23:42:53.463024 === u2Vref_new: 0x5a --> 0x5a
2245 23:42:53.466290 === u2Vref_new: 0x5c --> 0x78
2246 23:42:53.469060 === u2Vref_new: 0x5e --> 0x7a
2247 23:42:53.472739 === u2Vref_new: 0x60 --> 0x90
2248 23:42:53.475861 [CA 0] Center 38 (13~63) winsize 51
2249 23:42:53.479086 [CA 1] Center 37 (12~63) winsize 52
2250 23:42:53.482812 [CA 2] Center 34 (6~63) winsize 58
2251 23:42:53.486095 [CA 3] Center 34 (6~63) winsize 58
2252 23:42:53.489218 [CA 4] Center 34 (6~63) winsize 58
2253 23:42:53.492664 [CA 5] Center 28 (-1~58) winsize 60
2254 23:42:53.493008
2255 23:42:53.496126 [CATrainingPosCal] consider 1 rank data
2256 23:42:53.499870 u2DelayCellTimex100 = 735/100 ps
2257 23:42:53.503268 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2258 23:42:53.506161 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2259 23:42:53.509299 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2260 23:42:53.512851 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2261 23:42:53.516203 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2262 23:42:53.519365 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2263 23:42:53.519819
2264 23:42:53.523127 CA PerBit enable=1, Macro0, CA PI delay=28
2265 23:42:53.526152 === u2Vref_new: 0x60 --> 0x90
2266 23:42:53.526611
2267 23:42:53.529626 Vref(ca) range 1: 32
2268 23:42:53.529919
2269 23:42:53.532741 CS Dly= 11 (42-0-32)
2270 23:42:53.533034 Write Rank0 MR13 =0xd8
2271 23:42:53.536162 Write Rank0 MR13 =0xd8
2272 23:42:53.536384 Write Rank0 MR12 =0x60
2273 23:42:53.539438 Write Rank1 MR13 =0x59
2274 23:42:53.539620 ==
2275 23:42:53.546123 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2276 23:42:53.549339 fsp= 1, odt_onoff= 1, Byte mode= 0
2277 23:42:53.549488 ==
2278 23:42:53.549591 === u2Vref_new: 0x56 --> 0x3a
2279 23:42:53.552996 === u2Vref_new: 0x58 --> 0x58
2280 23:42:53.556908 === u2Vref_new: 0x5a --> 0x5a
2281 23:42:53.559538 === u2Vref_new: 0x5c --> 0x78
2282 23:42:53.562746 === u2Vref_new: 0x5e --> 0x7a
2283 23:42:53.566079 === u2Vref_new: 0x60 --> 0x90
2284 23:42:53.569531 [CA 0] Center 37 (12~63) winsize 52
2285 23:42:53.572792 [CA 1] Center 37 (12~63) winsize 52
2286 23:42:53.576112 [CA 2] Center 35 (7~63) winsize 57
2287 23:42:53.579828 [CA 3] Center 34 (6~63) winsize 58
2288 23:42:53.582892 [CA 4] Center 35 (7~63) winsize 57
2289 23:42:53.586581 [CA 5] Center 28 (-2~58) winsize 61
2290 23:42:53.586681
2291 23:42:53.589705 [CATrainingPosCal] consider 2 rank data
2292 23:42:53.592758 u2DelayCellTimex100 = 735/100 ps
2293 23:42:53.596193 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2294 23:42:53.599717 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2295 23:42:53.603030 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2296 23:42:53.606640 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2297 23:42:53.609886 CA4 delay=35 (7~63),Diff = 7 PI (9 cell)
2298 23:42:53.613038 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2299 23:42:53.613159
2300 23:42:53.620211 CA PerBit enable=1, Macro0, CA PI delay=28
2301 23:42:53.620425 === u2Vref_new: 0x60 --> 0x90
2302 23:42:53.620541
2303 23:42:53.622646 Vref(ca) range 1: 32
2304 23:42:53.622784
2305 23:42:53.626488 CS Dly= 11 (42-0-32)
2306 23:42:53.626718 Write Rank1 MR13 =0xd8
2307 23:42:53.629589 Write Rank1 MR13 =0xd8
2308 23:42:53.632988 Write Rank1 MR12 =0x60
2309 23:42:53.636300 [RankSwap] Rank num 2, (Multi 1), Rank 0
2310 23:42:53.636583 Write Rank0 MR2 =0xad
2311 23:42:53.639757 [Write Leveling]
2312 23:42:53.643153 delay byte0 byte1 byte2 byte3
2313 23:42:53.643508
2314 23:42:53.643712 10 0 0
2315 23:42:53.643893 11 0 0
2316 23:42:53.646719 12 0 0
2317 23:42:53.647108 13 0 0
2318 23:42:53.650327 14 0 0
2319 23:42:53.650810 15 0 0
2320 23:42:53.653515 16 0 0
2321 23:42:53.653893 17 0 0
2322 23:42:53.654197 18 0 0
2323 23:42:53.656679 19 0 0
2324 23:42:53.657102 20 0 0
2325 23:42:53.660180 21 0 0
2326 23:42:53.660596 22 0 0
2327 23:42:53.660924 23 0 0
2328 23:42:53.663022 24 0 ff
2329 23:42:53.663488 25 0 ff
2330 23:42:53.666940 26 0 ff
2331 23:42:53.667493 27 0 ff
2332 23:42:53.670308 28 0 ff
2333 23:42:53.670825 29 0 ff
2334 23:42:53.673434 30 0 ff
2335 23:42:53.673915 31 0 ff
2336 23:42:53.674258 32 0 ff
2337 23:42:53.676580 33 ff ff
2338 23:42:53.677002 34 ff ff
2339 23:42:53.680341 35 ff ff
2340 23:42:53.680856 36 ff ff
2341 23:42:53.683758 37 ff ff
2342 23:42:53.684273 38 ff ff
2343 23:42:53.686881 39 ff ff
2344 23:42:53.690120 pass bytecount = 0xff (0xff: all bytes pass)
2345 23:42:53.690636
2346 23:42:53.690961 DQS0 dly: 33
2347 23:42:53.693496 DQS1 dly: 24
2348 23:42:53.693950 Write Rank0 MR2 =0x2d
2349 23:42:53.696747 [RankSwap] Rank num 2, (Multi 1), Rank 0
2350 23:42:53.700125 Write Rank0 MR1 =0xd6
2351 23:42:53.700652 [Gating]
2352 23:42:53.700983 ==
2353 23:42:53.707062 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2354 23:42:53.710309 fsp= 1, odt_onoff= 1, Byte mode= 0
2355 23:42:53.710822 ==
2356 23:42:53.713566 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2357 23:42:53.716694 3 1 4 |3535 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2358 23:42:53.723769 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2359 23:42:53.727147 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2360 23:42:53.730330 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2361 23:42:53.737093 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2362 23:42:53.740531 [Byte 1] Lead/lag falling Transition (3, 1, 20)
2363 23:42:53.743925 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2364 23:42:53.746657 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2365 23:42:53.753887 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2366 23:42:53.756721 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2367 23:42:53.760574 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2368 23:42:53.767265 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2369 23:42:53.770615 3 2 16 |807 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2370 23:42:53.773370 3 2 20 |707 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2371 23:42:53.776704 [Byte 1] Lead/lag Transition tap number (9)
2372 23:42:53.783865 3 2 24 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2373 23:42:53.787013 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2374 23:42:53.790184 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2375 23:42:53.797200 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2376 23:42:53.800775 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2377 23:42:53.803806 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2378 23:42:53.807463 3 3 16 |e0e 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2379 23:42:53.813616 3 3 20 |e0d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2380 23:42:53.817100 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2381 23:42:53.820424 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2382 23:42:53.827218 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2383 23:42:53.830406 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2384 23:42:53.833207 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2385 23:42:53.840569 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2386 23:42:53.843836 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2387 23:42:53.847481 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2388 23:42:53.850491 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2389 23:42:53.857386 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2390 23:42:53.860413 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2391 23:42:53.863898 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2392 23:42:53.870931 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 23:42:53.873947 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 23:42:53.877392 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 23:42:53.883964 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 23:42:53.887486 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 23:42:53.890677 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 23:42:53.897201 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 23:42:53.901078 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 23:42:53.903961 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 23:42:53.907385 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 23:42:53.914249 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2403 23:42:53.917336 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2404 23:42:53.920954 [Byte 0] Lead/lag Transition tap number (2)
2405 23:42:53.924392 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2406 23:42:53.930907 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2407 23:42:53.934159 3 6 20 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
2408 23:42:53.937717 [Byte 0]First pass (3, 6, 20)
2409 23:42:53.941058 [Byte 1] Lead/lag Transition tap number (2)
2410 23:42:53.944376 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2411 23:42:53.947253 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2412 23:42:53.950658 [Byte 1]First pass (3, 6, 28)
2413 23:42:53.953797 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2414 23:42:53.960761 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2415 23:42:53.963889 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2416 23:42:53.967318 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 23:42:53.970737 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2418 23:42:53.973645 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 23:42:53.980877 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 23:42:53.983751 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 23:42:53.987567 All bytes gating window > 1UI, Early break!
2422 23:42:53.988261
2423 23:42:53.990615 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2424 23:42:53.991081
2425 23:42:53.993508 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2426 23:42:53.993986
2427 23:42:53.994578
2428 23:42:53.994942
2429 23:42:54.000477 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2430 23:42:54.001032
2431 23:42:54.003677 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2432 23:42:54.004406
2433 23:42:54.004784
2434 23:42:54.006936 wait MRW command Rank0 MR1 =0x56 fired (1)
2435 23:42:54.010354 Write Rank0 MR1 =0x56
2436 23:42:54.010770
2437 23:42:54.013522 best RODT dly(2T, 0.5T) = (2, 3)
2438 23:42:54.013940
2439 23:42:54.016923 best RODT dly(2T, 0.5T) = (2, 3)
2440 23:42:54.017352 ==
2441 23:42:54.020190 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2442 23:42:54.023311 fsp= 1, odt_onoff= 1, Byte mode= 0
2443 23:42:54.023758 ==
2444 23:42:54.026681 Start DQ dly to find pass range UseTestEngine =0
2445 23:42:54.033779 x-axis: bit #, y-axis: DQ dly (-127~63)
2446 23:42:54.034202 RX Vref Scan = 0
2447 23:42:54.036591 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2448 23:42:54.039982 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2449 23:42:54.043552 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2450 23:42:54.047010 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2451 23:42:54.047575 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2452 23:42:54.050183 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2453 23:42:54.053548 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2454 23:42:54.056810 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2455 23:42:54.060442 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2456 23:42:54.063684 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2457 23:42:54.066463 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2458 23:42:54.069442 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2459 23:42:54.072933 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2460 23:42:54.073375 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2461 23:42:54.076241 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2462 23:42:54.079962 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2463 23:42:54.082771 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2464 23:42:54.086074 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2465 23:42:54.089618 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2466 23:42:54.092704 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2467 23:42:54.096081 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2468 23:42:54.096525 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2469 23:42:54.099656 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2470 23:42:54.103150 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2471 23:42:54.106428 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2472 23:42:54.109205 -1, [0] xxxxxxxx xoxxxxxo [MSB]
2473 23:42:54.112804 0, [0] xxxoxxxx ooxxxxxo [MSB]
2474 23:42:54.115838 1, [0] xxxoxxxx ooxxxxxo [MSB]
2475 23:42:54.116528 2, [0] xxooxxxx ooxxxxxo [MSB]
2476 23:42:54.119392 3, [0] oxooxxxo oooxxxxo [MSB]
2477 23:42:54.122946 4, [0] oooooxxo oooxooxo [MSB]
2478 23:42:54.125772 5, [0] oooooxoo ooooooxo [MSB]
2479 23:42:54.129299 32, [0] oooooooo ooooooox [MSB]
2480 23:42:54.132365 33, [0] oooooooo ooooooox [MSB]
2481 23:42:54.132859 34, [0] oooooooo ooooooox [MSB]
2482 23:42:54.135907 35, [0] oooxoooo ooooooox [MSB]
2483 23:42:54.139360 36, [0] oooxoooo xxooooox [MSB]
2484 23:42:54.142805 37, [0] ooxxoooo xxooooox [MSB]
2485 23:42:54.146172 38, [0] ooxxoooo xxooooox [MSB]
2486 23:42:54.149629 39, [0] ooxxooox xxooooox [MSB]
2487 23:42:54.152307 40, [0] oxxxxoox xxxoooox [MSB]
2488 23:42:54.152812 41, [0] oxxxxoox xxxxxoox [MSB]
2489 23:42:54.155646 42, [0] xxxxxxxx xxxxxxxx [MSB]
2490 23:42:54.159350 iDelay=42, Bit 0, Center 22 (3 ~ 41) 39
2491 23:42:54.162719 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2492 23:42:54.169515 iDelay=42, Bit 2, Center 19 (2 ~ 36) 35
2493 23:42:54.172380 iDelay=42, Bit 3, Center 17 (0 ~ 34) 35
2494 23:42:54.175578 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2495 23:42:54.178673 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2496 23:42:54.182003 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2497 23:42:54.185800 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2498 23:42:54.188493 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2499 23:42:54.191729 iDelay=42, Bit 9, Center 16 (-2 ~ 35) 38
2500 23:42:54.195080 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2501 23:42:54.198218 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2502 23:42:54.201243 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2503 23:42:54.204578 iDelay=42, Bit 13, Center 22 (4 ~ 41) 38
2504 23:42:54.211781 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
2505 23:42:54.214543 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
2506 23:42:54.214635 ==
2507 23:42:54.218139 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2508 23:42:54.221511 fsp= 1, odt_onoff= 1, Byte mode= 0
2509 23:42:54.221688 ==
2510 23:42:54.224813 DQS Delay:
2511 23:42:54.224998 DQS0 = 0, DQS1 = 0
2512 23:42:54.225092 DQM Delay:
2513 23:42:54.227897 DQM0 = 20, DQM1 = 19
2514 23:42:54.228057 DQ Delay:
2515 23:42:54.231555 DQ0 =22, DQ1 =21, DQ2 =19, DQ3 =17
2516 23:42:54.235297 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2517 23:42:54.238217 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2518 23:42:54.242104 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
2519 23:42:54.242331
2520 23:42:54.242459
2521 23:42:54.244606 DramC Write-DBI off
2522 23:42:54.244777 ==
2523 23:42:54.248030 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2524 23:42:54.251178 fsp= 1, odt_onoff= 1, Byte mode= 0
2525 23:42:54.251370 ==
2526 23:42:54.258369 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2527 23:42:54.258686
2528 23:42:54.261426 Begin, DQ Scan Range 920~1176
2529 23:42:54.261707
2530 23:42:54.261927
2531 23:42:54.262132 TX Vref Scan disable
2532 23:42:54.265113 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2533 23:42:54.268441 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2534 23:42:54.271825 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2535 23:42:54.278236 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2536 23:42:54.281935 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2537 23:42:54.284535 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2538 23:42:54.288308 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2539 23:42:54.291274 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2540 23:42:54.295252 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2541 23:42:54.298349 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2542 23:42:54.301128 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2543 23:42:54.304691 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2544 23:42:54.307932 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2545 23:42:54.311439 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2546 23:42:54.314777 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2547 23:42:54.317740 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2548 23:42:54.321293 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2549 23:42:54.324965 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2550 23:42:54.331695 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2551 23:42:54.334914 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2552 23:42:54.338628 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2553 23:42:54.341514 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2554 23:42:54.345087 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2555 23:42:54.348055 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2556 23:42:54.351442 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2557 23:42:54.354458 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2558 23:42:54.357854 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2559 23:42:54.361078 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2560 23:42:54.364555 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2561 23:42:54.367878 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2562 23:42:54.371183 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2563 23:42:54.374504 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2564 23:42:54.377671 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2565 23:42:54.381252 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2566 23:42:54.384356 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2567 23:42:54.391168 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2568 23:42:54.394706 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2569 23:42:54.397730 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2570 23:42:54.401027 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2571 23:42:54.404252 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2572 23:42:54.408127 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2573 23:42:54.410792 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2574 23:42:54.414411 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2575 23:42:54.418037 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2576 23:42:54.420821 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2577 23:42:54.424127 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2578 23:42:54.427830 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2579 23:42:54.431002 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2580 23:42:54.434674 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2581 23:42:54.438091 969 |3 6 9|[0] xxxxxxxx oxxxxxxo [MSB]
2582 23:42:54.441298 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2583 23:42:54.444313 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2584 23:42:54.447715 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2585 23:42:54.451152 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2586 23:42:54.455102 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2587 23:42:54.461264 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2588 23:42:54.464714 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2589 23:42:54.467783 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2590 23:42:54.471101 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2591 23:42:54.474338 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2592 23:42:54.477542 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2593 23:42:54.481047 981 |3 6 21|[0] oooooxoo oooooooo [MSB]
2594 23:42:54.484370 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2595 23:42:54.487302 987 |3 6 27|[0] oooooooo oxooooox [MSB]
2596 23:42:54.491115 988 |3 6 28|[0] oooooooo xxooooox [MSB]
2597 23:42:54.494235 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
2598 23:42:54.497694 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2599 23:42:54.500827 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2600 23:42:54.507256 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2601 23:42:54.511221 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2602 23:42:54.514307 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2603 23:42:54.517617 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2604 23:42:54.520887 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2605 23:42:54.524064 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2606 23:42:54.527389 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2607 23:42:54.530872 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2608 23:42:54.534269 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2609 23:42:54.537497 1001 |3 6 41|[0] ooxxooox xxxxxxxx [MSB]
2610 23:42:54.540807 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2611 23:42:54.544264 Byte0, DQ PI dly=990, DQM PI dly= 990
2612 23:42:54.550787 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2613 23:42:54.551205
2614 23:42:54.554492 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2615 23:42:54.555012
2616 23:42:54.557499 Byte1, DQ PI dly=979, DQM PI dly= 979
2617 23:42:54.560846 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2618 23:42:54.561388
2619 23:42:54.567469 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2620 23:42:54.567981
2621 23:42:54.568314 ==
2622 23:42:54.570926 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2623 23:42:54.574413 fsp= 1, odt_onoff= 1, Byte mode= 0
2624 23:42:54.574833 ==
2625 23:42:54.580753 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2626 23:42:54.581295
2627 23:42:54.581655 Begin, DQ Scan Range 955~1019
2628 23:42:54.584034 Write Rank0 MR14 =0x0
2629 23:42:54.593177
2630 23:42:54.593688 CH=1, VrefRange= 0, VrefLevel = 0
2631 23:42:54.600010 TX Bit0 (984~999) 16 991, Bit8 (973~984) 12 978,
2632 23:42:54.603388 TX Bit1 (983~995) 13 989, Bit9 (973~983) 11 978,
2633 23:42:54.609252 TX Bit2 (981~995) 15 988, Bit10 (975~986) 12 980,
2634 23:42:54.612850 TX Bit3 (980~992) 13 986, Bit11 (976~986) 11 981,
2635 23:42:54.615646 TX Bit4 (983~997) 15 990, Bit12 (975~987) 13 981,
2636 23:42:54.622826 TX Bit5 (984~998) 15 991, Bit13 (977~987) 11 982,
2637 23:42:54.626379 TX Bit6 (984~997) 14 990, Bit14 (975~986) 12 980,
2638 23:42:54.629250 TX Bit7 (983~996) 14 989, Bit15 (970~979) 10 974,
2639 23:42:54.629773
2640 23:42:54.632444 Write Rank0 MR14 =0x2
2641 23:42:54.641827
2642 23:42:54.642341 CH=1, VrefRange= 0, VrefLevel = 2
2643 23:42:54.648225 TX Bit0 (984~1000) 17 992, Bit8 (972~984) 13 978,
2644 23:42:54.652015 TX Bit1 (983~997) 15 990, Bit9 (973~983) 11 978,
2645 23:42:54.658367 TX Bit2 (981~996) 16 988, Bit10 (975~986) 12 980,
2646 23:42:54.661812 TX Bit3 (979~993) 15 986, Bit11 (975~987) 13 981,
2647 23:42:54.665681 TX Bit4 (982~998) 17 990, Bit12 (975~987) 13 981,
2648 23:42:54.671895 TX Bit5 (984~999) 16 991, Bit13 (976~988) 13 982,
2649 23:42:54.675109 TX Bit6 (983~998) 16 990, Bit14 (974~987) 14 980,
2650 23:42:54.678418 TX Bit7 (983~996) 14 989, Bit15 (969~980) 12 974,
2651 23:42:54.681937
2652 23:42:54.682532 Write Rank0 MR14 =0x4
2653 23:42:54.691206
2654 23:42:54.691826 CH=1, VrefRange= 0, VrefLevel = 4
2655 23:42:54.697230 TX Bit0 (983~1000) 18 991, Bit8 (971~985) 15 978,
2656 23:42:54.701204 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2657 23:42:54.707364 TX Bit2 (980~998) 19 989, Bit10 (974~987) 14 980,
2658 23:42:54.710586 TX Bit3 (979~993) 15 986, Bit11 (975~988) 14 981,
2659 23:42:54.713746 TX Bit4 (982~999) 18 990, Bit12 (975~988) 14 981,
2660 23:42:54.720430 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2661 23:42:54.724023 TX Bit6 (983~998) 16 990, Bit14 (974~988) 15 981,
2662 23:42:54.727473 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2663 23:42:54.730939
2664 23:42:54.731462 Write Rank0 MR14 =0x6
2665 23:42:54.740389
2666 23:42:54.741034 CH=1, VrefRange= 0, VrefLevel = 6
2667 23:42:54.747060 TX Bit0 (984~1000) 17 992, Bit8 (970~985) 16 977,
2668 23:42:54.750394 TX Bit1 (982~998) 17 990, Bit9 (971~984) 14 977,
2669 23:42:54.757031 TX Bit2 (979~997) 19 988, Bit10 (974~988) 15 981,
2670 23:42:54.759946 TX Bit3 (978~994) 17 986, Bit11 (974~989) 16 981,
2671 23:42:54.763308 TX Bit4 (982~999) 18 990, Bit12 (974~989) 16 981,
2672 23:42:54.770270 TX Bit5 (984~1000) 17 992, Bit13 (976~989) 14 982,
2673 23:42:54.774344 TX Bit6 (983~999) 17 991, Bit14 (973~989) 17 981,
2674 23:42:54.776809 TX Bit7 (983~998) 16 990, Bit15 (969~983) 15 976,
2675 23:42:54.777273
2676 23:42:54.780143 Write Rank0 MR14 =0x8
2677 23:42:54.789933
2678 23:42:54.790483 CH=1, VrefRange= 0, VrefLevel = 8
2679 23:42:54.796316 TX Bit0 (983~1001) 19 992, Bit8 (971~985) 15 978,
2680 23:42:54.799746 TX Bit1 (981~999) 19 990, Bit9 (971~984) 14 977,
2681 23:42:54.806118 TX Bit2 (979~998) 20 988, Bit10 (974~989) 16 981,
2682 23:42:54.809136 TX Bit3 (978~995) 18 986, Bit11 (974~990) 17 982,
2683 23:42:54.813175 TX Bit4 (981~999) 19 990, Bit12 (973~990) 18 981,
2684 23:42:54.819253 TX Bit5 (984~1000) 17 992, Bit13 (975~990) 16 982,
2685 23:42:54.822616 TX Bit6 (982~999) 18 990, Bit14 (974~990) 17 982,
2686 23:42:54.825994 TX Bit7 (982~999) 18 990, Bit15 (968~983) 16 975,
2687 23:42:54.829186
2688 23:42:54.829596 Write Rank0 MR14 =0xa
2689 23:42:54.839044
2690 23:42:54.842578 CH=1, VrefRange= 0, VrefLevel = 10
2691 23:42:54.845913 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2692 23:42:54.849099 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
2693 23:42:54.855338 TX Bit2 (979~999) 21 989, Bit10 (973~990) 18 981,
2694 23:42:54.858793 TX Bit3 (978~995) 18 986, Bit11 (974~990) 17 982,
2695 23:42:54.861847 TX Bit4 (982~1000) 19 991, Bit12 (973~991) 19 982,
2696 23:42:54.868683 TX Bit5 (983~1000) 18 991, Bit13 (975~991) 17 983,
2697 23:42:54.871759 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2698 23:42:54.878359 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2699 23:42:54.878940
2700 23:42:54.879343 Write Rank0 MR14 =0xc
2701 23:42:54.888676
2702 23:42:54.892009 CH=1, VrefRange= 0, VrefLevel = 12
2703 23:42:54.895291 TX Bit0 (982~1002) 21 992, Bit8 (970~986) 17 978,
2704 23:42:54.898524 TX Bit1 (980~999) 20 989, Bit9 (970~985) 16 977,
2705 23:42:54.905187 TX Bit2 (978~999) 22 988, Bit10 (972~990) 19 981,
2706 23:42:54.908483 TX Bit3 (977~996) 20 986, Bit11 (974~991) 18 982,
2707 23:42:54.911919 TX Bit4 (981~1001) 21 991, Bit12 (973~992) 20 982,
2708 23:42:54.918493 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2709 23:42:54.921659 TX Bit6 (981~1000) 20 990, Bit14 (973~991) 19 982,
2710 23:42:54.928216 TX Bit7 (981~1000) 20 990, Bit15 (968~984) 17 976,
2711 23:42:54.928633
2712 23:42:54.928958 Write Rank0 MR14 =0xe
2713 23:42:54.938339
2714 23:42:54.941522 CH=1, VrefRange= 0, VrefLevel = 14
2715 23:42:54.944953 TX Bit0 (982~1002) 21 992, Bit8 (970~987) 18 978,
2716 23:42:54.948637 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2717 23:42:54.955244 TX Bit2 (978~1000) 23 989, Bit10 (973~991) 19 982,
2718 23:42:54.958544 TX Bit3 (977~998) 22 987, Bit11 (973~991) 19 982,
2719 23:42:54.961625 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2720 23:42:54.968152 TX Bit5 (983~1001) 19 992, Bit13 (974~991) 18 982,
2721 23:42:54.971520 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2722 23:42:54.978179 TX Bit7 (980~1000) 21 990, Bit15 (968~985) 18 976,
2723 23:42:54.978608
2724 23:42:54.978979 Write Rank0 MR14 =0x10
2725 23:42:54.988514
2726 23:42:54.991874 CH=1, VrefRange= 0, VrefLevel = 16
2727 23:42:54.995389 TX Bit0 (982~1003) 22 992, Bit8 (969~988) 20 978,
2728 23:42:54.999062 TX Bit1 (979~1000) 22 989, Bit9 (970~986) 17 978,
2729 23:42:55.004997 TX Bit2 (978~1000) 23 989, Bit10 (971~991) 21 981,
2730 23:42:55.008264 TX Bit3 (977~997) 21 987, Bit11 (973~992) 20 982,
2731 23:42:55.011588 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2732 23:42:55.018684 TX Bit5 (983~1002) 20 992, Bit13 (974~992) 19 983,
2733 23:42:55.021709 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2734 23:42:55.028596 TX Bit7 (980~1000) 21 990, Bit15 (967~985) 19 976,
2735 23:42:55.029225
2736 23:42:55.029681 Write Rank0 MR14 =0x12
2737 23:42:55.038781
2738 23:42:55.042334 CH=1, VrefRange= 0, VrefLevel = 18
2739 23:42:55.045645 TX Bit0 (981~1003) 23 992, Bit8 (969~989) 21 979,
2740 23:42:55.049167 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2741 23:42:55.055623 TX Bit2 (978~1000) 23 989, Bit10 (971~991) 21 981,
2742 23:42:55.058945 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2743 23:42:55.062159 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2744 23:42:55.068543 TX Bit5 (982~1002) 21 992, Bit13 (973~992) 20 982,
2745 23:42:55.071798 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2746 23:42:55.078583 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2747 23:42:55.079009
2748 23:42:55.079342 Write Rank0 MR14 =0x14
2749 23:42:55.089481
2750 23:42:55.092759 CH=1, VrefRange= 0, VrefLevel = 20
2751 23:42:55.096129 TX Bit0 (981~1004) 24 992, Bit8 (969~989) 21 979,
2752 23:42:55.099727 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
2753 23:42:55.106431 TX Bit2 (978~1000) 23 989, Bit10 (971~992) 22 981,
2754 23:42:55.109100 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2755 23:42:55.112635 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2756 23:42:55.119694 TX Bit5 (982~1002) 21 992, Bit13 (972~992) 21 982,
2757 23:42:55.122502 TX Bit6 (980~1002) 23 991, Bit14 (971~993) 23 982,
2758 23:42:55.129390 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2759 23:42:55.129958
2760 23:42:55.130325 Write Rank0 MR14 =0x16
2761 23:42:55.139941
2762 23:42:55.140506 CH=1, VrefRange= 0, VrefLevel = 22
2763 23:42:55.146647 TX Bit0 (982~1004) 23 993, Bit8 (969~989) 21 979,
2764 23:42:55.150130 TX Bit1 (979~1002) 24 990, Bit9 (969~988) 20 978,
2765 23:42:55.156805 TX Bit2 (977~1001) 25 989, Bit10 (970~992) 23 981,
2766 23:42:55.159797 TX Bit3 (977~999) 23 988, Bit11 (971~992) 22 981,
2767 23:42:55.163086 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2768 23:42:55.170041 TX Bit5 (982~1003) 22 992, Bit13 (972~993) 22 982,
2769 23:42:55.173136 TX Bit6 (979~1002) 24 990, Bit14 (971~993) 23 982,
2770 23:42:55.180063 TX Bit7 (980~1001) 22 990, Bit15 (966~987) 22 976,
2771 23:42:55.180615
2772 23:42:55.180957 Write Rank0 MR14 =0x18
2773 23:42:55.190698
2774 23:42:55.193780 CH=1, VrefRange= 0, VrefLevel = 24
2775 23:42:55.197726 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2776 23:42:55.200766 TX Bit1 (978~1002) 25 990, Bit9 (969~989) 21 979,
2777 23:42:55.206920 TX Bit2 (977~1001) 25 989, Bit10 (970~992) 23 981,
2778 23:42:55.210767 TX Bit3 (976~999) 24 987, Bit11 (971~993) 23 982,
2779 23:42:55.213826 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2780 23:42:55.220048 TX Bit5 (982~1003) 22 992, Bit13 (972~993) 22 982,
2781 23:42:55.223230 TX Bit6 (979~1002) 24 990, Bit14 (970~993) 24 981,
2782 23:42:55.229859 TX Bit7 (979~1002) 24 990, Bit15 (966~987) 22 976,
2783 23:42:55.230565
2784 23:42:55.231163 Write Rank0 MR14 =0x1a
2785 23:42:55.241160
2786 23:42:55.244157 CH=1, VrefRange= 0, VrefLevel = 26
2787 23:42:55.247473 TX Bit0 (980~1006) 27 993, Bit8 (969~991) 23 980,
2788 23:42:55.250599 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
2789 23:42:55.257536 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2790 23:42:55.260717 TX Bit3 (976~999) 24 987, Bit11 (971~993) 23 982,
2791 23:42:55.264139 TX Bit4 (978~1003) 26 990, Bit12 (970~994) 25 982,
2792 23:42:55.271093 TX Bit5 (980~1004) 25 992, Bit13 (971~993) 23 982,
2793 23:42:55.274141 TX Bit6 (979~1002) 24 990, Bit14 (970~993) 24 981,
2794 23:42:55.280978 TX Bit7 (979~1002) 24 990, Bit15 (966~988) 23 977,
2795 23:42:55.281482
2796 23:42:55.281815 Write Rank0 MR14 =0x1c
2797 23:42:55.292049
2798 23:42:55.295272 CH=1, VrefRange= 0, VrefLevel = 28
2799 23:42:55.298815 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2800 23:42:55.302242 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2801 23:42:55.308439 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2802 23:42:55.311922 TX Bit3 (976~1000) 25 988, Bit11 (970~993) 24 981,
2803 23:42:55.315850 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2804 23:42:55.321943 TX Bit5 (981~1005) 25 993, Bit13 (973~994) 22 983,
2805 23:42:55.325238 TX Bit6 (978~1003) 26 990, Bit14 (970~993) 24 981,
2806 23:42:55.331604 TX Bit7 (979~1003) 25 991, Bit15 (965~988) 24 976,
2807 23:42:55.332097
2808 23:42:55.332427 Write Rank0 MR14 =0x1e
2809 23:42:55.342803
2810 23:42:55.346549 CH=1, VrefRange= 0, VrefLevel = 30
2811 23:42:55.349785 TX Bit0 (979~1006) 28 992, Bit8 (968~991) 24 979,
2812 23:42:55.353043 TX Bit1 (978~1004) 27 991, Bit9 (969~990) 22 979,
2813 23:42:55.359449 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2814 23:42:55.363313 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2815 23:42:55.366352 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2816 23:42:55.372646 TX Bit5 (980~1005) 26 992, Bit13 (971~994) 24 982,
2817 23:42:55.375672 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2818 23:42:55.382838 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2819 23:42:55.383390
2820 23:42:55.383799 Write Rank0 MR14 =0x20
2821 23:42:55.393895
2822 23:42:55.396606 CH=1, VrefRange= 0, VrefLevel = 32
2823 23:42:55.399996 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2824 23:42:55.403727 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2825 23:42:55.409991 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
2826 23:42:55.413607 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2827 23:42:55.417287 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2828 23:42:55.423220 TX Bit5 (979~1005) 27 992, Bit13 (971~994) 24 982,
2829 23:42:55.427337 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2830 23:42:55.433988 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2831 23:42:55.434506
2832 23:42:55.434835 Write Rank0 MR14 =0x22
2833 23:42:55.444143
2834 23:42:55.447982 CH=1, VrefRange= 0, VrefLevel = 34
2835 23:42:55.451138 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2836 23:42:55.454344 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2837 23:42:55.461188 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
2838 23:42:55.463773 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2839 23:42:55.470667 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2840 23:42:55.474310 TX Bit5 (979~1005) 27 992, Bit13 (971~994) 24 982,
2841 23:42:55.477518 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2842 23:42:55.483915 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2843 23:42:55.484350
2844 23:42:55.484678 Write Rank0 MR14 =0x24
2845 23:42:55.495576
2846 23:42:55.496089 CH=1, VrefRange= 0, VrefLevel = 36
2847 23:42:55.502069 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2848 23:42:55.505441 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2849 23:42:55.511833 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
2850 23:42:55.515545 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2851 23:42:55.518813 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2852 23:42:55.525102 TX Bit5 (979~1005) 27 992, Bit13 (971~994) 24 982,
2853 23:42:55.528668 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2854 23:42:55.535085 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2855 23:42:55.535696
2856 23:42:55.536066 Write Rank0 MR14 =0x26
2857 23:42:55.545911
2858 23:42:55.549443 CH=1, VrefRange= 0, VrefLevel = 38
2859 23:42:55.553086 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2860 23:42:55.555852 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2861 23:42:55.563214 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
2862 23:42:55.566095 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2863 23:42:55.569131 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2864 23:42:55.575583 TX Bit5 (979~1005) 27 992, Bit13 (971~994) 24 982,
2865 23:42:55.578774 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2866 23:42:55.585712 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2867 23:42:55.586216
2868 23:42:55.586546 Write Rank0 MR14 =0x28
2869 23:42:55.596874
2870 23:42:55.600400 CH=1, VrefRange= 0, VrefLevel = 40
2871 23:42:55.603101 TX Bit0 (980~1006) 27 993, Bit8 (968~991) 24 979,
2872 23:42:55.606327 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2873 23:42:55.613132 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
2874 23:42:55.616532 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2875 23:42:55.619767 TX Bit4 (979~1004) 26 991, Bit12 (970~993) 24 981,
2876 23:42:55.626649 TX Bit5 (979~1005) 27 992, Bit13 (971~994) 24 982,
2877 23:42:55.629954 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2878 23:42:55.635997 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2879 23:42:55.636458
2880 23:42:55.636822
2881 23:42:55.639344 TX Vref found, early break! 370< 380
2882 23:42:55.642815 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2883 23:42:55.646156 u1DelayCellOfst[0]=6 cells (5 PI)
2884 23:42:55.649527 u1DelayCellOfst[1]=2 cells (2 PI)
2885 23:42:55.652922 u1DelayCellOfst[2]=1 cells (1 PI)
2886 23:42:55.656019 u1DelayCellOfst[3]=0 cells (0 PI)
2887 23:42:55.659001 u1DelayCellOfst[4]=3 cells (3 PI)
2888 23:42:55.662448 u1DelayCellOfst[5]=5 cells (4 PI)
2889 23:42:55.665938 u1DelayCellOfst[6]=3 cells (3 PI)
2890 23:42:55.669166 u1DelayCellOfst[7]=2 cells (2 PI)
2891 23:42:55.672598 Byte0, DQ PI dly=988, DQM PI dly= 990
2892 23:42:55.675617 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2893 23:42:55.676035
2894 23:42:55.679079 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2895 23:42:55.679537
2896 23:42:55.682498 u1DelayCellOfst[8]=3 cells (3 PI)
2897 23:42:55.685741 u1DelayCellOfst[9]=5 cells (4 PI)
2898 23:42:55.688942 u1DelayCellOfst[10]=6 cells (5 PI)
2899 23:42:55.692732 u1DelayCellOfst[11]=7 cells (6 PI)
2900 23:42:55.695713 u1DelayCellOfst[12]=6 cells (5 PI)
2901 23:42:55.699169 u1DelayCellOfst[13]=7 cells (6 PI)
2902 23:42:55.702651 u1DelayCellOfst[14]=6 cells (5 PI)
2903 23:42:55.706096 u1DelayCellOfst[15]=0 cells (0 PI)
2904 23:42:55.709382 Byte1, DQ PI dly=976, DQM PI dly= 979
2905 23:42:55.712690 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2906 23:42:55.713107
2907 23:42:55.716131 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2908 23:42:55.716549
2909 23:42:55.719328 Write Rank0 MR14 =0x20
2910 23:42:55.719844
2911 23:42:55.722811 Final TX Range 0 Vref 32
2912 23:42:55.723379
2913 23:42:55.729178 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2914 23:42:55.729637
2915 23:42:55.735855 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2916 23:42:55.742445 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2917 23:42:55.749581 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2918 23:42:55.750090 Write Rank0 MR3 =0xb0
2919 23:42:55.752262 DramC Write-DBI on
2920 23:42:55.752675 ==
2921 23:42:55.759115 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2922 23:42:55.762268 fsp= 1, odt_onoff= 1, Byte mode= 0
2923 23:42:55.762687 ==
2924 23:42:55.765826 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2925 23:42:55.766245
2926 23:42:55.769186 Begin, DQ Scan Range 699~763
2927 23:42:55.769632
2928 23:42:55.769968
2929 23:42:55.770276 TX Vref Scan disable
2930 23:42:55.772381 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2931 23:42:55.779252 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2932 23:42:55.782394 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2933 23:42:55.785556 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2934 23:42:55.789054 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2935 23:42:55.791955 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2936 23:42:55.795625 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2937 23:42:55.798942 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2938 23:42:55.801904 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2939 23:42:55.805190 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2940 23:42:55.808325 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2941 23:42:55.811767 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2942 23:42:55.815379 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2943 23:42:55.818701 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2944 23:42:55.822178 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2945 23:42:55.825300 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2946 23:42:55.828862 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2947 23:42:55.832142 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2948 23:42:55.835649 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2949 23:42:55.838483 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2950 23:42:55.842136 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2951 23:42:55.848990 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2952 23:42:55.852167 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2953 23:42:55.855970 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2954 23:42:55.858863 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2955 23:42:55.862342 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2956 23:42:55.866189 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2957 23:42:55.872619 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2958 23:42:55.876009 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2959 23:42:55.879468 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2960 23:42:55.882747 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2961 23:42:55.886164 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2962 23:42:55.889213 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2963 23:42:55.892352 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2964 23:42:55.895885 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2965 23:42:55.898886 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2966 23:42:55.902233 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2967 23:42:55.905603 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2968 23:42:55.908876 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2969 23:42:55.912482 Byte0, DQ PI dly=736, DQM PI dly= 736
2970 23:42:55.918977 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2971 23:42:55.919574
2972 23:42:55.922171 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2973 23:42:55.922665
2974 23:42:55.925767 Byte1, DQ PI dly=724, DQM PI dly= 724
2975 23:42:55.929575 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2976 23:42:55.930133
2977 23:42:55.936128 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2978 23:42:55.936702
2979 23:42:55.942415 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2980 23:42:55.949159 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2981 23:42:55.955543 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2982 23:42:55.956101 Write Rank0 MR3 =0x30
2983 23:42:55.958905 DramC Write-DBI off
2984 23:42:55.959505
2985 23:42:55.959882 [DATLAT]
2986 23:42:55.962108 Freq=1600, CH1 RK0, use_rxtx_scan=0
2987 23:42:55.962574
2988 23:42:55.965611 DATLAT Default: 0xf
2989 23:42:55.966171 7, 0xFFFF, sum=0
2990 23:42:55.969097 8, 0xFFFF, sum=0
2991 23:42:55.969664 9, 0xFFFF, sum=0
2992 23:42:55.972308 10, 0xFFFF, sum=0
2993 23:42:55.972783 11, 0xFFFF, sum=0
2994 23:42:55.975486 12, 0xFFFF, sum=0
2995 23:42:55.976057 13, 0xFFFF, sum=0
2996 23:42:55.978671 14, 0x0, sum=1
2997 23:42:55.979142 15, 0x0, sum=2
2998 23:42:55.979588 16, 0x0, sum=3
2999 23:42:55.981954 17, 0x0, sum=4
3000 23:42:55.985429 pattern=2 first_step=14 total pass=5 best_step=16
3001 23:42:55.985992 ==
3002 23:42:55.991632 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3003 23:42:55.995460 fsp= 1, odt_onoff= 1, Byte mode= 0
3004 23:42:55.995978 ==
3005 23:42:55.998617 Start DQ dly to find pass range UseTestEngine =1
3006 23:42:56.002045 x-axis: bit #, y-axis: DQ dly (-127~63)
3007 23:42:56.005094 RX Vref Scan = 1
3008 23:42:56.111055
3009 23:42:56.111644 RX Vref found, early break!
3010 23:42:56.112021
3011 23:42:56.117603 Final RX Vref 11, apply to both rank0 and 1
3012 23:42:56.118149 ==
3013 23:42:56.121296 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3014 23:42:56.124280 fsp= 1, odt_onoff= 1, Byte mode= 0
3015 23:42:56.124746 ==
3016 23:42:56.125112 DQS Delay:
3017 23:42:56.127748 DQS0 = 0, DQS1 = 0
3018 23:42:56.128168 DQM Delay:
3019 23:42:56.131530 DQM0 = 21, DQM1 = 19
3020 23:42:56.132042 DQ Delay:
3021 23:42:56.134391 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =17
3022 23:42:56.137864 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3023 23:42:56.141004 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3024 23:42:56.144917 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3025 23:42:56.145356
3026 23:42:56.145691
3027 23:42:56.146002
3028 23:42:56.147496 [DramC_TX_OE_Calibration] TA2
3029 23:42:56.151222 Original DQ_B0 (3 6) =30, OEN = 27
3030 23:42:56.154392 Original DQ_B1 (3 6) =30, OEN = 27
3031 23:42:56.157636 23, 0x0, End_B0=23 End_B1=23
3032 23:42:56.158153 24, 0x0, End_B0=24 End_B1=24
3033 23:42:56.161020 25, 0x0, End_B0=25 End_B1=25
3034 23:42:56.164679 26, 0x0, End_B0=26 End_B1=26
3035 23:42:56.168085 27, 0x0, End_B0=27 End_B1=27
3036 23:42:56.168508 28, 0x0, End_B0=28 End_B1=28
3037 23:42:56.171109 29, 0x0, End_B0=29 End_B1=29
3038 23:42:56.174434 30, 0x0, End_B0=30 End_B1=30
3039 23:42:56.178007 31, 0xFFFF, End_B0=30 End_B1=30
3040 23:42:56.184714 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3041 23:42:56.188091 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3042 23:42:56.188610
3043 23:42:56.188943
3044 23:42:56.191128 Write Rank0 MR23 =0x3f
3045 23:42:56.191575 [DQSOSC]
3046 23:42:56.201243 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3047 23:42:56.207588 CH1_RK0: MR19=0x202, MR18=0xC0C0, DQSOSC=447, MR23=63, INC=12, DEC=18
3048 23:42:56.208097 Write Rank0 MR23 =0x3f
3049 23:42:56.208502 [DQSOSC]
3050 23:42:56.217399 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3051 23:42:56.220685 CH1 RK0: MR19=202, MR18=C1C1
3052 23:42:56.224067 [RankSwap] Rank num 2, (Multi 1), Rank 1
3053 23:42:56.224623 Write Rank0 MR2 =0xad
3054 23:42:56.227190 [Write Leveling]
3055 23:42:56.231439 delay byte0 byte1 byte2 byte3
3056 23:42:56.231958
3057 23:42:56.232289 10 0 0
3058 23:42:56.234213 11 0 0
3059 23:42:56.234635 12 0 0
3060 23:42:56.234972 13 0 0
3061 23:42:56.237503 14 0 0
3062 23:42:56.238036 15 0 0
3063 23:42:56.240469 16 0 0
3064 23:42:56.240893 17 0 0
3065 23:42:56.241234 18 0 0
3066 23:42:56.243864 19 0 0
3067 23:42:56.244291 20 0 0
3068 23:42:56.247496 21 0 0
3069 23:42:56.248062 22 0 0
3070 23:42:56.250622 23 0 0
3071 23:42:56.251155 24 0 ff
3072 23:42:56.251696 25 0 ff
3073 23:42:56.254034 26 0 ff
3074 23:42:56.254551 27 0 ff
3075 23:42:56.257392 28 0 ff
3076 23:42:56.257915 29 0 ff
3077 23:42:56.260543 30 0 ff
3078 23:42:56.260966 31 0 ff
3079 23:42:56.263696 32 0 ff
3080 23:42:56.264185 33 0 ff
3081 23:42:56.264724 34 0 ff
3082 23:42:56.267474 35 ff ff
3083 23:42:56.267857 36 ff ff
3084 23:42:56.270448 37 ff ff
3085 23:42:56.271012 38 ff ff
3086 23:42:56.274005 39 ff ff
3087 23:42:56.274441 40 ff ff
3088 23:42:56.277418 41 ff ff
3089 23:42:56.280703 pass bytecount = 0xff (0xff: all bytes pass)
3090 23:42:56.281309
3091 23:42:56.281849 DQS0 dly: 35
3092 23:42:56.284152 DQS1 dly: 24
3093 23:42:56.284807 Write Rank0 MR2 =0x2d
3094 23:42:56.286864 [RankSwap] Rank num 2, (Multi 1), Rank 0
3095 23:42:56.290208 Write Rank1 MR1 =0xd6
3096 23:42:56.290745 [Gating]
3097 23:42:56.291209 ==
3098 23:42:56.296918 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3099 23:42:56.300352 fsp= 1, odt_onoff= 1, Byte mode= 0
3100 23:42:56.300772 ==
3101 23:42:56.303635 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3102 23:42:56.306960 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3103 23:42:56.313946 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3104 23:42:56.317349 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3105 23:42:56.320270 3 1 16 |3535 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3106 23:42:56.327238 3 1 20 |3535 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3107 23:42:56.330584 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3108 23:42:56.334007 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3109 23:42:56.340409 3 2 0 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3110 23:42:56.343882 3 2 4 |3433 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3111 23:42:56.347301 3 2 8 |1312 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3112 23:42:56.350530 3 2 12 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
3113 23:42:56.356783 3 2 16 |3d3d c0c |(11 11)(11 11) |(1 1)(0 0)| 0
3114 23:42:56.360657 3 2 20 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3115 23:42:56.363784 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3116 23:42:56.370324 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3117 23:42:56.373615 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3118 23:42:56.376964 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3119 23:42:56.383638 3 3 8 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3120 23:42:56.386697 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3121 23:42:56.390149 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3122 23:42:56.393859 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3123 23:42:56.400292 [Byte 1] Lead/lag Transition tap number (1)
3124 23:42:56.403546 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3125 23:42:56.406563 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3126 23:42:56.413782 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3127 23:42:56.416858 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3128 23:42:56.420124 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3129 23:42:56.423825 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3130 23:42:56.430560 3 4 12 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3131 23:42:56.433975 3 4 16 |3d3d 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
3132 23:42:56.437215 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3133 23:42:56.443796 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3134 23:42:56.446874 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3135 23:42:56.450162 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3136 23:42:56.456919 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3137 23:42:56.460533 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3138 23:42:56.464340 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3139 23:42:56.469960 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3140 23:42:56.473679 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3141 23:42:56.476666 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3142 23:42:56.480242 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3143 23:42:56.486565 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3144 23:42:56.490122 [Byte 0] Lead/lag Transition tap number (2)
3145 23:42:56.492927 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3146 23:42:56.497217 [Byte 1] Lead/lag falling Transition (3, 6, 0)
3147 23:42:56.503245 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3148 23:42:56.506362 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3149 23:42:56.509757 [Byte 1] Lead/lag Transition tap number (3)
3150 23:42:56.513250 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3151 23:42:56.516512 [Byte 0]First pass (3, 6, 12)
3152 23:42:56.523489 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3153 23:42:56.526597 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3154 23:42:56.530183 [Byte 1]First pass (3, 6, 20)
3155 23:42:56.532935 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3156 23:42:56.536218 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3157 23:42:56.539494 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3158 23:42:56.543073 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3159 23:42:56.549721 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3160 23:42:56.552920 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3161 23:42:56.555708 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3162 23:42:56.559348 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3163 23:42:56.562779 All bytes gating window > 1UI, Early break!
3164 23:42:56.562872
3165 23:42:56.569682 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3166 23:42:56.569802
3167 23:42:56.572509 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
3168 23:42:56.572619
3169 23:42:56.572696
3170 23:42:56.572770
3171 23:42:56.575984 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3172 23:42:56.576091
3173 23:42:56.579459 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3174 23:42:56.579538
3175 23:42:56.579604
3176 23:42:56.582454 Write Rank1 MR1 =0x56
3177 23:42:56.582545
3178 23:42:56.585863 best RODT dly(2T, 0.5T) = (2, 2)
3179 23:42:56.585961
3180 23:42:56.589532 best RODT dly(2T, 0.5T) = (2, 3)
3181 23:42:56.589705 ==
3182 23:42:56.592865 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3183 23:42:56.596284 fsp= 1, odt_onoff= 1, Byte mode= 0
3184 23:42:56.596461 ==
3185 23:42:56.603083 Start DQ dly to find pass range UseTestEngine =0
3186 23:42:56.606596 x-axis: bit #, y-axis: DQ dly (-127~63)
3187 23:42:56.606833 RX Vref Scan = 0
3188 23:42:56.609343 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3189 23:42:56.612958 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3190 23:42:56.616408 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3191 23:42:56.619476 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3192 23:42:56.623167 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3193 23:42:56.623508 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3194 23:42:56.626140 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3195 23:42:56.629177 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3196 23:42:56.632661 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3197 23:42:56.635957 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3198 23:42:56.640040 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3199 23:42:56.643316 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3200 23:42:56.646240 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3201 23:42:56.646661 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3202 23:42:56.649834 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3203 23:42:56.653527 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3204 23:42:56.656758 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3205 23:42:56.660013 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3206 23:42:56.662887 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3207 23:42:56.666217 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3208 23:42:56.669862 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3209 23:42:56.670573 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3210 23:42:56.672828 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3211 23:42:56.676034 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3212 23:42:56.679308 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3213 23:42:56.683064 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3214 23:42:56.686225 0, [0] xxxoxxxx xoxxxxxo [MSB]
3215 23:42:56.686652 1, [0] xxooxxxx ooxxxxxo [MSB]
3216 23:42:56.689498 2, [0] xxooxxxx ooxxxxxo [MSB]
3217 23:42:56.692807 3, [0] xxooxxxo ooxxxxxo [MSB]
3218 23:42:56.695983 4, [0] oxoooxxo oooxoxxo [MSB]
3219 23:42:56.699724 5, [0] oooooxoo ooooooxo [MSB]
3220 23:42:56.703248 32, [0] oooooooo ooooooox [MSB]
3221 23:42:56.705986 33, [0] oooooooo ooooooox [MSB]
3222 23:42:56.706414 34, [0] oooooooo ooooooox [MSB]
3223 23:42:56.709422 35, [0] oooxoooo oxooooox [MSB]
3224 23:42:56.712872 36, [0] oooxoooo xxooooox [MSB]
3225 23:42:56.716525 37, [0] ooxxoooo xxooooox [MSB]
3226 23:42:56.719236 38, [0] ooxxoooo xxooooox [MSB]
3227 23:42:56.723165 39, [0] oxxxooox xxooooox [MSB]
3228 23:42:56.726044 40, [0] oxxxxoox xxxoooox [MSB]
3229 23:42:56.726566 41, [0] oxxxxoox xxxxxoox [MSB]
3230 23:42:56.729262 42, [0] xxxxxxxx xxxxxxxx [MSB]
3231 23:42:56.732631 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3232 23:42:56.735978 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3233 23:42:56.739554 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3234 23:42:56.746037 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3235 23:42:56.749383 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3236 23:42:56.752665 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3237 23:42:56.755871 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3238 23:42:56.759594 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3239 23:42:56.762359 iDelay=42, Bit 8, Center 18 (1 ~ 35) 35
3240 23:42:56.765994 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3241 23:42:56.769290 iDelay=42, Bit 10, Center 21 (4 ~ 39) 36
3242 23:42:56.772409 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3243 23:42:56.775544 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3244 23:42:56.779157 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3245 23:42:56.782737 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3246 23:42:56.786152 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3247 23:42:56.789351 ==
3248 23:42:56.792206 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3249 23:42:56.795484 fsp= 1, odt_onoff= 1, Byte mode= 0
3250 23:42:56.796066 ==
3251 23:42:56.796418 DQS Delay:
3252 23:42:56.798991 DQS0 = 0, DQS1 = 0
3253 23:42:56.799476 DQM Delay:
3254 23:42:56.802243 DQM0 = 20, DQM1 = 19
3255 23:42:56.802665 DQ Delay:
3256 23:42:56.805898 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3257 23:42:56.809300 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3258 23:42:56.812526 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =22
3259 23:42:56.815668 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
3260 23:42:56.816087
3261 23:42:56.816423
3262 23:42:56.819368 DramC Write-DBI off
3263 23:42:56.819819 ==
3264 23:42:56.822661 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3265 23:42:56.825970 fsp= 1, odt_onoff= 1, Byte mode= 0
3266 23:42:56.826392 ==
3267 23:42:56.832644 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3268 23:42:56.833065
3269 23:42:56.833402 Begin, DQ Scan Range 920~1176
3270 23:42:56.833734
3271 23:42:56.834043
3272 23:42:56.835757 TX Vref Scan disable
3273 23:42:56.839156 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3274 23:42:56.842499 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3275 23:42:56.845571 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3276 23:42:56.849159 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3277 23:42:56.852086 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3278 23:42:56.855477 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3279 23:42:56.862042 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3280 23:42:56.865213 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3281 23:42:56.868548 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3282 23:42:56.872079 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3283 23:42:56.875313 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3284 23:42:56.878482 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3285 23:42:56.882285 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3286 23:42:56.885346 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3287 23:42:56.888347 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3288 23:42:56.891673 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3289 23:42:56.895071 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3290 23:42:56.898606 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3291 23:42:56.902153 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3292 23:42:56.905381 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3293 23:42:56.908627 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3294 23:42:56.915094 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3295 23:42:56.918664 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3296 23:42:56.921933 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3297 23:42:56.925435 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3298 23:42:56.928739 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3299 23:42:56.932053 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3300 23:42:56.935372 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3301 23:42:56.938663 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3302 23:42:56.941616 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3303 23:42:56.945034 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3304 23:42:56.948177 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3305 23:42:56.951812 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3306 23:42:56.954582 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3307 23:42:56.958012 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3308 23:42:56.961205 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3309 23:42:56.967529 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3310 23:42:56.970868 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3311 23:42:56.974487 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3312 23:42:56.977909 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3313 23:42:56.981310 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3314 23:42:56.984622 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3315 23:42:56.987901 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3316 23:42:56.990997 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3317 23:42:56.994342 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3318 23:42:56.997787 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3319 23:42:57.001104 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3320 23:42:57.004485 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3321 23:42:57.008185 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3322 23:42:57.011471 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3323 23:42:57.014555 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
3324 23:42:57.017846 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3325 23:42:57.021020 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3326 23:42:57.024213 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3327 23:42:57.027941 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3328 23:42:57.030802 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3329 23:42:57.037915 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3330 23:42:57.041316 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3331 23:42:57.044626 978 |3 6 18|[0] xxooxxxx oooooooo [MSB]
3332 23:42:57.047902 979 |3 6 19|[0] xooooxox oooooooo [MSB]
3333 23:42:57.051370 980 |3 6 20|[0] ooooooox oooooooo [MSB]
3334 23:42:57.054885 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3335 23:42:57.058097 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3336 23:42:57.061535 987 |3 6 27|[0] oooooooo oxooooox [MSB]
3337 23:42:57.064684 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3338 23:42:57.068144 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3339 23:42:57.070952 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3340 23:42:57.074558 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3341 23:42:57.081422 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3342 23:42:57.084585 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3343 23:42:57.087822 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3344 23:42:57.091380 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3345 23:42:57.094070 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3346 23:42:57.097615 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3347 23:42:57.101145 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3348 23:42:57.104454 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3349 23:42:57.108077 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3350 23:42:57.111148 1001 |3 6 41|[0] ooxxxoox xxxxxxxx [MSB]
3351 23:42:57.114491 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3352 23:42:57.117700 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3353 23:42:57.121033 Byte0, DQ PI dly=989, DQM PI dly= 989
3354 23:42:57.128050 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3355 23:42:57.128566
3356 23:42:57.131130 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3357 23:42:57.131601
3358 23:42:57.134519 Byte1, DQ PI dly=977, DQM PI dly= 977
3359 23:42:57.137722 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3360 23:42:57.138135
3361 23:42:57.144576 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3362 23:42:57.145078
3363 23:42:57.145409 ==
3364 23:42:57.148046 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3365 23:42:57.151242 fsp= 1, odt_onoff= 1, Byte mode= 0
3366 23:42:57.151709 ==
3367 23:42:57.157591 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3368 23:42:57.158092
3369 23:42:57.158418 Begin, DQ Scan Range 953~1017
3370 23:42:57.161158 Write Rank1 MR14 =0x0
3371 23:42:57.170623
3372 23:42:57.171156 CH=1, VrefRange= 0, VrefLevel = 0
3373 23:42:57.176601 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3374 23:42:57.179660 TX Bit1 (982~997) 16 989, Bit9 (970~983) 14 976,
3375 23:42:57.186583 TX Bit2 (979~994) 16 986, Bit10 (973~985) 13 979,
3376 23:42:57.189653 TX Bit3 (978~991) 14 984, Bit11 (974~985) 12 979,
3377 23:42:57.193034 TX Bit4 (982~997) 16 989, Bit12 (973~985) 13 979,
3378 23:42:57.199510 TX Bit5 (983~998) 16 990, Bit13 (973~986) 14 979,
3379 23:42:57.202866 TX Bit6 (983~998) 16 990, Bit14 (974~984) 11 979,
3380 23:42:57.206275 TX Bit7 (984~995) 12 989, Bit15 (968~978) 11 973,
3381 23:42:57.209857
3382 23:42:57.210265 Write Rank1 MR14 =0x2
3383 23:42:57.219129
3384 23:42:57.219849 CH=1, VrefRange= 0, VrefLevel = 2
3385 23:42:57.226214 TX Bit0 (983~999) 17 991, Bit8 (969~984) 16 976,
3386 23:42:57.229279 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3387 23:42:57.235452 TX Bit2 (979~995) 17 987, Bit10 (973~985) 13 979,
3388 23:42:57.239111 TX Bit3 (978~992) 15 985, Bit11 (974~986) 13 980,
3389 23:42:57.242090 TX Bit4 (981~997) 17 989, Bit12 (973~985) 13 979,
3390 23:42:57.248969 TX Bit5 (983~999) 17 991, Bit13 (974~987) 14 980,
3391 23:42:57.252147 TX Bit6 (982~998) 17 990, Bit14 (974~985) 12 979,
3392 23:42:57.255539 TX Bit7 (983~997) 15 990, Bit15 (968~979) 12 973,
3393 23:42:57.258974
3394 23:42:57.259390 Write Rank1 MR14 =0x4
3395 23:42:57.268595
3396 23:42:57.269011 CH=1, VrefRange= 0, VrefLevel = 4
3397 23:42:57.275236 TX Bit0 (982~999) 18 990, Bit8 (969~985) 17 977,
3398 23:42:57.278259 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3399 23:42:57.285267 TX Bit2 (979~997) 19 988, Bit10 (972~986) 15 979,
3400 23:42:57.288259 TX Bit3 (978~992) 15 985, Bit11 (974~987) 14 980,
3401 23:42:57.291621 TX Bit4 (981~998) 18 989, Bit12 (974~986) 13 980,
3402 23:42:57.297988 TX Bit5 (983~999) 17 991, Bit13 (973~988) 16 980,
3403 23:42:57.301633 TX Bit6 (981~998) 18 989, Bit14 (972~985) 14 978,
3404 23:42:57.304609 TX Bit7 (983~997) 15 990, Bit15 (967~979) 13 973,
3405 23:42:57.307871
3406 23:42:57.308290 Write Rank1 MR14 =0x6
3407 23:42:57.317772
3408 23:42:57.318190 CH=1, VrefRange= 0, VrefLevel = 6
3409 23:42:57.324420 TX Bit0 (982~999) 18 990, Bit8 (969~985) 17 977,
3410 23:42:57.327892 TX Bit1 (981~999) 19 990, Bit9 (970~984) 15 977,
3411 23:42:57.334533 TX Bit2 (979~997) 19 988, Bit10 (972~986) 15 979,
3412 23:42:57.337967 TX Bit3 (978~993) 16 985, Bit11 (973~987) 15 980,
3413 23:42:57.341320 TX Bit4 (980~998) 19 989, Bit12 (972~986) 15 979,
3414 23:42:57.347929 TX Bit5 (982~999) 18 990, Bit13 (972~988) 17 980,
3415 23:42:57.350982 TX Bit6 (981~999) 19 990, Bit14 (972~986) 15 979,
3416 23:42:57.354161 TX Bit7 (983~997) 15 990, Bit15 (967~981) 15 974,
3417 23:42:57.354865
3418 23:42:57.357853 Write Rank1 MR14 =0x8
3419 23:42:57.367505
3420 23:42:57.367931 CH=1, VrefRange= 0, VrefLevel = 8
3421 23:42:57.373846 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3422 23:42:57.377484 TX Bit1 (980~999) 20 989, Bit9 (970~985) 16 977,
3423 23:42:57.383813 TX Bit2 (978~998) 21 988, Bit10 (971~987) 17 979,
3424 23:42:57.387162 TX Bit3 (978~994) 17 986, Bit11 (972~988) 17 980,
3425 23:42:57.390619 TX Bit4 (980~999) 20 989, Bit12 (971~988) 18 979,
3426 23:42:57.397107 TX Bit5 (982~1000) 19 991, Bit13 (972~989) 18 980,
3427 23:42:57.400290 TX Bit6 (980~999) 20 989, Bit14 (972~987) 16 979,
3428 23:42:57.403737 TX Bit7 (982~998) 17 990, Bit15 (967~982) 16 974,
3429 23:42:57.407236
3430 23:42:57.407681 Write Rank1 MR14 =0xa
3431 23:42:57.416665
3432 23:42:57.420526 CH=1, VrefRange= 0, VrefLevel = 10
3433 23:42:57.423516 TX Bit0 (981~1000) 20 990, Bit8 (969~986) 18 977,
3434 23:42:57.426756 TX Bit1 (980~999) 20 989, Bit9 (969~985) 17 977,
3435 23:42:57.433706 TX Bit2 (978~998) 21 988, Bit10 (971~987) 17 979,
3436 23:42:57.436864 TX Bit3 (977~995) 19 986, Bit11 (972~989) 18 980,
3437 23:42:57.439840 TX Bit4 (980~999) 20 989, Bit12 (972~988) 17 980,
3438 23:42:57.446603 TX Bit5 (982~1000) 19 991, Bit13 (972~990) 19 981,
3439 23:42:57.449834 TX Bit6 (980~999) 20 989, Bit14 (971~987) 17 979,
3440 23:42:57.456675 TX Bit7 (982~999) 18 990, Bit15 (967~983) 17 975,
3441 23:42:57.457106
3442 23:42:57.457463 Write Rank1 MR14 =0xc
3443 23:42:57.466985
3444 23:42:57.470005 CH=1, VrefRange= 0, VrefLevel = 12
3445 23:42:57.473315 TX Bit0 (982~1001) 20 991, Bit8 (968~986) 19 977,
3446 23:42:57.476646 TX Bit1 (980~1000) 21 990, Bit9 (969~985) 17 977,
3447 23:42:57.483293 TX Bit2 (978~998) 21 988, Bit10 (971~988) 18 979,
3448 23:42:57.486542 TX Bit3 (977~996) 20 986, Bit11 (972~990) 19 981,
3449 23:42:57.489799 TX Bit4 (979~999) 21 989, Bit12 (972~989) 18 980,
3450 23:42:57.496354 TX Bit5 (981~1001) 21 991, Bit13 (972~990) 19 981,
3451 23:42:57.499472 TX Bit6 (980~1000) 21 990, Bit14 (971~988) 18 979,
3452 23:42:57.506237 TX Bit7 (982~999) 18 990, Bit15 (966~983) 18 974,
3453 23:42:57.506665
3454 23:42:57.507015 Write Rank1 MR14 =0xe
3455 23:42:57.516965
3456 23:42:57.520099 CH=1, VrefRange= 0, VrefLevel = 14
3457 23:42:57.523156 TX Bit0 (981~1002) 22 991, Bit8 (968~986) 19 977,
3458 23:42:57.526687 TX Bit1 (980~1000) 21 990, Bit9 (969~986) 18 977,
3459 23:42:57.533474 TX Bit2 (978~998) 21 988, Bit10 (970~989) 20 979,
3460 23:42:57.536871 TX Bit3 (977~997) 21 987, Bit11 (971~991) 21 981,
3461 23:42:57.540199 TX Bit4 (979~1000) 22 989, Bit12 (971~989) 19 980,
3462 23:42:57.546939 TX Bit5 (981~1001) 21 991, Bit13 (972~991) 20 981,
3463 23:42:57.549949 TX Bit6 (979~1001) 23 990, Bit14 (971~989) 19 980,
3464 23:42:57.556739 TX Bit7 (981~999) 19 990, Bit15 (966~984) 19 975,
3465 23:42:57.557159
3466 23:42:57.557490 Write Rank1 MR14 =0x10
3467 23:42:57.567375
3468 23:42:57.570438 CH=1, VrefRange= 0, VrefLevel = 16
3469 23:42:57.573977 TX Bit0 (980~1003) 24 991, Bit8 (968~987) 20 977,
3470 23:42:57.577168 TX Bit1 (980~1001) 22 990, Bit9 (968~986) 19 977,
3471 23:42:57.583934 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
3472 23:42:57.587347 TX Bit3 (977~997) 21 987, Bit11 (970~991) 22 980,
3473 23:42:57.590440 TX Bit4 (979~1000) 22 989, Bit12 (970~990) 21 980,
3474 23:42:57.597372 TX Bit5 (980~1002) 23 991, Bit13 (971~991) 21 981,
3475 23:42:57.600837 TX Bit6 (979~1001) 23 990, Bit14 (970~990) 21 980,
3476 23:42:57.606759 TX Bit7 (980~1000) 21 990, Bit15 (965~984) 20 974,
3477 23:42:57.607238
3478 23:42:57.607713 Write Rank1 MR14 =0x12
3479 23:42:57.617767
3480 23:42:57.621307 CH=1, VrefRange= 0, VrefLevel = 18
3481 23:42:57.624118 TX Bit0 (980~1003) 24 991, Bit8 (968~988) 21 978,
3482 23:42:57.628105 TX Bit1 (979~1001) 23 990, Bit9 (968~987) 20 977,
3483 23:42:57.634824 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
3484 23:42:57.638121 TX Bit3 (976~998) 23 987, Bit11 (970~991) 22 980,
3485 23:42:57.641104 TX Bit4 (979~1001) 23 990, Bit12 (970~991) 22 980,
3486 23:42:57.648023 TX Bit5 (980~1003) 24 991, Bit13 (971~992) 22 981,
3487 23:42:57.651354 TX Bit6 (979~1001) 23 990, Bit14 (970~990) 21 980,
3488 23:42:57.657485 TX Bit7 (980~1000) 21 990, Bit15 (965~984) 20 974,
3489 23:42:57.657914
3490 23:42:57.658342 Write Rank1 MR14 =0x14
3491 23:42:57.668746
3492 23:42:57.672309 CH=1, VrefRange= 0, VrefLevel = 20
3493 23:42:57.675487 TX Bit0 (979~1004) 26 991, Bit8 (968~989) 22 978,
3494 23:42:57.678516 TX Bit1 (978~1001) 24 989, Bit9 (968~988) 21 978,
3495 23:42:57.685135 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
3496 23:42:57.688401 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3497 23:42:57.691890 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3498 23:42:57.698185 TX Bit5 (979~1003) 25 991, Bit13 (970~992) 23 981,
3499 23:42:57.701288 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3500 23:42:57.708343 TX Bit7 (980~1001) 22 990, Bit15 (966~985) 20 975,
3501 23:42:57.708796
3502 23:42:57.709131 Write Rank1 MR14 =0x16
3503 23:42:57.719735
3504 23:42:57.722519 CH=1, VrefRange= 0, VrefLevel = 22
3505 23:42:57.726385 TX Bit0 (979~1005) 27 992, Bit8 (968~989) 22 978,
3506 23:42:57.728859 TX Bit1 (979~1002) 24 990, Bit9 (968~988) 21 978,
3507 23:42:57.735391 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
3508 23:42:57.738800 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3509 23:42:57.742687 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3510 23:42:57.748865 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3511 23:42:57.752319 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3512 23:42:57.758920 TX Bit7 (980~1001) 22 990, Bit15 (964~985) 22 974,
3513 23:42:57.759038
3514 23:42:57.759131 Write Rank1 MR14 =0x18
3515 23:42:57.770504
3516 23:42:57.773312 CH=1, VrefRange= 0, VrefLevel = 24
3517 23:42:57.776695 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3518 23:42:57.780283 TX Bit1 (978~1003) 26 990, Bit9 (968~989) 22 978,
3519 23:42:57.787214 TX Bit2 (978~1000) 23 989, Bit10 (969~992) 24 980,
3520 23:42:57.790523 TX Bit3 (976~999) 24 987, Bit11 (970~992) 23 981,
3521 23:42:57.793763 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3522 23:42:57.800458 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3523 23:42:57.803723 TX Bit6 (978~1003) 26 990, Bit14 (969~991) 23 980,
3524 23:42:57.810374 TX Bit7 (979~1002) 24 990, Bit15 (963~986) 24 974,
3525 23:42:57.810797
3526 23:42:57.811194 Write Rank1 MR14 =0x1a
3527 23:42:57.821687
3528 23:42:57.824993 CH=1, VrefRange= 0, VrefLevel = 26
3529 23:42:57.827962 TX Bit0 (979~1005) 27 992, Bit8 (967~991) 25 979,
3530 23:42:57.831194 TX Bit1 (978~1003) 26 990, Bit9 (967~990) 24 978,
3531 23:42:57.838158 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3532 23:42:57.841498 TX Bit3 (976~999) 24 987, Bit11 (969~992) 24 980,
3533 23:42:57.844557 TX Bit4 (978~1003) 26 990, Bit12 (970~992) 23 981,
3534 23:42:57.851182 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3535 23:42:57.854485 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3536 23:42:57.860831 TX Bit7 (979~1002) 24 990, Bit15 (963~987) 25 975,
3537 23:42:57.860923
3538 23:42:57.860996 Write Rank1 MR14 =0x1c
3539 23:42:57.872337
3540 23:42:57.875800 CH=1, VrefRange= 0, VrefLevel = 28
3541 23:42:57.879049 TX Bit0 (978~1006) 29 992, Bit8 (967~990) 24 978,
3542 23:42:57.882637 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3543 23:42:57.889021 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3544 23:42:57.892558 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3545 23:42:57.895704 TX Bit4 (978~1004) 27 991, Bit12 (969~992) 24 980,
3546 23:42:57.902237 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3547 23:42:57.905718 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3548 23:42:57.912278 TX Bit7 (979~1003) 25 991, Bit15 (962~987) 26 974,
3549 23:42:57.912699
3550 23:42:57.913029 Write Rank1 MR14 =0x1e
3551 23:42:57.923631
3552 23:42:57.926959 CH=1, VrefRange= 0, VrefLevel = 30
3553 23:42:57.930484 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3554 23:42:57.933809 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3555 23:42:57.940363 TX Bit2 (978~1002) 25 990, Bit10 (969~992) 24 980,
3556 23:42:57.943581 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3557 23:42:57.946761 TX Bit4 (978~1004) 27 991, Bit12 (969~993) 25 981,
3558 23:42:57.953470 TX Bit5 (979~1005) 27 992, Bit13 (969~993) 25 981,
3559 23:42:57.956816 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3560 23:42:57.963480 TX Bit7 (978~1004) 27 991, Bit15 (962~987) 26 974,
3561 23:42:57.963955
3562 23:42:57.964431 Write Rank1 MR14 =0x20
3563 23:42:57.975219
3564 23:42:57.978419 CH=1, VrefRange= 0, VrefLevel = 32
3565 23:42:57.981827 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3566 23:42:57.984784 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3567 23:42:57.991258 TX Bit2 (978~1002) 25 990, Bit10 (969~992) 24 980,
3568 23:42:57.994995 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3569 23:42:57.997952 TX Bit4 (978~1004) 27 991, Bit12 (969~993) 25 981,
3570 23:42:58.005111 TX Bit5 (979~1005) 27 992, Bit13 (969~993) 25 981,
3571 23:42:58.007993 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3572 23:42:58.014730 TX Bit7 (978~1004) 27 991, Bit15 (962~987) 26 974,
3573 23:42:58.015148
3574 23:42:58.015516 Write Rank1 MR14 =0x22
3575 23:42:58.025919
3576 23:42:58.029052 CH=1, VrefRange= 0, VrefLevel = 34
3577 23:42:58.032499 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3578 23:42:58.035945 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3579 23:42:58.042918 TX Bit2 (978~1002) 25 990, Bit10 (969~992) 24 980,
3580 23:42:58.045954 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3581 23:42:58.048844 TX Bit4 (978~1004) 27 991, Bit12 (969~993) 25 981,
3582 23:42:58.055844 TX Bit5 (979~1005) 27 992, Bit13 (969~993) 25 981,
3583 23:42:58.059304 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3584 23:42:58.065953 TX Bit7 (978~1004) 27 991, Bit15 (962~987) 26 974,
3585 23:42:58.066480
3586 23:42:58.066808 Write Rank1 MR14 =0x24
3587 23:42:58.077130
3588 23:42:58.080345 CH=1, VrefRange= 0, VrefLevel = 36
3589 23:42:58.083575 TX Bit0 (979~1006) 28 992, Bit8 (967~990) 24 978,
3590 23:42:58.086985 TX Bit1 (978~1004) 27 991, Bit9 (967~990) 24 978,
3591 23:42:58.093554 TX Bit2 (978~1002) 25 990, Bit10 (969~992) 24 980,
3592 23:42:58.096805 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3593 23:42:58.100054 TX Bit4 (978~1004) 27 991, Bit12 (969~993) 25 981,
3594 23:42:58.106974 TX Bit5 (979~1005) 27 992, Bit13 (969~993) 25 981,
3595 23:42:58.110340 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3596 23:42:58.116939 TX Bit7 (978~1004) 27 991, Bit15 (962~987) 26 974,
3597 23:42:58.117455
3598 23:42:58.117787
3599 23:42:58.119923 TX Vref found, early break! 389< 390
3600 23:42:58.123379 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3601 23:42:58.126910 u1DelayCellOfst[0]=6 cells (5 PI)
3602 23:42:58.130626 u1DelayCellOfst[1]=5 cells (4 PI)
3603 23:42:58.133547 u1DelayCellOfst[2]=3 cells (3 PI)
3604 23:42:58.136901 u1DelayCellOfst[3]=0 cells (0 PI)
3605 23:42:58.140253 u1DelayCellOfst[4]=5 cells (4 PI)
3606 23:42:58.143481 u1DelayCellOfst[5]=6 cells (5 PI)
3607 23:42:58.143930 u1DelayCellOfst[6]=5 cells (4 PI)
3608 23:42:58.146445 u1DelayCellOfst[7]=5 cells (4 PI)
3609 23:42:58.149861 Byte0, DQ PI dly=987, DQM PI dly= 989
3610 23:42:58.157064 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
3611 23:42:58.157648
3612 23:42:58.160081 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
3613 23:42:58.160601
3614 23:42:58.163369 u1DelayCellOfst[8]=5 cells (4 PI)
3615 23:42:58.166425 u1DelayCellOfst[9]=5 cells (4 PI)
3616 23:42:58.170103 u1DelayCellOfst[10]=7 cells (6 PI)
3617 23:42:58.172988 u1DelayCellOfst[11]=9 cells (7 PI)
3618 23:42:58.176944 u1DelayCellOfst[12]=9 cells (7 PI)
3619 23:42:58.180332 u1DelayCellOfst[13]=9 cells (7 PI)
3620 23:42:58.183509 u1DelayCellOfst[14]=7 cells (6 PI)
3621 23:42:58.183988 u1DelayCellOfst[15]=0 cells (0 PI)
3622 23:42:58.186579 Byte1, DQ PI dly=974, DQM PI dly= 977
3623 23:42:58.193152 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
3624 23:42:58.193569
3625 23:42:58.196958 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
3626 23:42:58.197379
3627 23:42:58.200294 Write Rank1 MR14 =0x1e
3628 23:42:58.200740
3629 23:42:58.201082 Final TX Range 0 Vref 30
3630 23:42:58.203701
3631 23:42:58.206692 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3632 23:42:58.209974
3633 23:42:58.213224 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3634 23:42:58.223300 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3635 23:42:58.229667 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3636 23:42:58.230092 Write Rank1 MR3 =0xb0
3637 23:42:58.233630 DramC Write-DBI on
3638 23:42:58.234055 ==
3639 23:42:58.236422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3640 23:42:58.239641 fsp= 1, odt_onoff= 1, Byte mode= 0
3641 23:42:58.240082 ==
3642 23:42:58.246309 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3643 23:42:58.246731
3644 23:42:58.249838 Begin, DQ Scan Range 697~761
3645 23:42:58.250256
3646 23:42:58.250588
3647 23:42:58.250896 TX Vref Scan disable
3648 23:42:58.253038 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3649 23:42:58.256560 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3650 23:42:58.259742 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3651 23:42:58.266182 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3652 23:42:58.270006 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3653 23:42:58.273132 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3654 23:42:58.276432 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3655 23:42:58.279509 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3656 23:42:58.283068 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3657 23:42:58.286248 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3658 23:42:58.289431 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3659 23:42:58.292846 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3660 23:42:58.296180 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3661 23:42:58.299302 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3662 23:42:58.302998 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3663 23:42:58.306169 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3664 23:42:58.309647 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3665 23:42:58.312804 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3666 23:42:58.316806 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3667 23:42:58.320219 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3668 23:42:58.323699 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3669 23:42:58.327147 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3670 23:42:58.329696 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3671 23:42:58.332931 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3672 23:42:58.339584 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3673 23:42:58.342860 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3674 23:42:58.345982 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3675 23:42:58.349199 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3676 23:42:58.355814 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3677 23:42:58.359113 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3678 23:42:58.362879 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3679 23:42:58.365981 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3680 23:42:58.369711 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3681 23:42:58.372413 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3682 23:42:58.376453 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3683 23:42:58.379223 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3684 23:42:58.382542 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3685 23:42:58.385964 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3686 23:42:58.389237 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3687 23:42:58.392353 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3688 23:42:58.395869 Byte0, DQ PI dly=735, DQM PI dly= 735
3689 23:42:58.402316 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3690 23:42:58.403010
3691 23:42:58.405950 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3692 23:42:58.406555
3693 23:42:58.409475 Byte1, DQ PI dly=723, DQM PI dly= 723
3694 23:42:58.412589 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3695 23:42:58.413283
3696 23:42:58.419329 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3697 23:42:58.419805
3698 23:42:58.425717 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3699 23:42:58.432490 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3700 23:42:58.439161 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3701 23:42:58.442803 wait MRW command Rank1 MR3 =0x30 fired (1)
3702 23:42:58.445584 Write Rank1 MR3 =0x30
3703 23:42:58.446003 DramC Write-DBI off
3704 23:42:58.446457
3705 23:42:58.446784 [DATLAT]
3706 23:42:58.449228 Freq=1600, CH1 RK1, use_rxtx_scan=0
3707 23:42:58.449649
3708 23:42:58.452197 DATLAT Default: 0x10
3709 23:42:58.452684 7, 0xFFFF, sum=0
3710 23:42:58.455587 8, 0xFFFF, sum=0
3711 23:42:58.456022 9, 0xFFFF, sum=0
3712 23:42:58.458852 10, 0xFFFF, sum=0
3713 23:42:58.459284 11, 0xFFFF, sum=0
3714 23:42:58.462393 12, 0xFFFF, sum=0
3715 23:42:58.462818 13, 0xFFFF, sum=0
3716 23:42:58.465604 14, 0x0, sum=1
3717 23:42:58.466028 15, 0x0, sum=2
3718 23:42:58.469074 16, 0x0, sum=3
3719 23:42:58.469496 17, 0x0, sum=4
3720 23:42:58.472552 pattern=2 first_step=14 total pass=5 best_step=16
3721 23:42:58.472970 ==
3722 23:42:58.478490 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3723 23:42:58.482039 fsp= 1, odt_onoff= 1, Byte mode= 0
3724 23:42:58.482132 ==
3725 23:42:58.485310 Start DQ dly to find pass range UseTestEngine =1
3726 23:42:58.488997 x-axis: bit #, y-axis: DQ dly (-127~63)
3727 23:42:58.492072 RX Vref Scan = 0
3728 23:42:58.495337 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3729 23:42:58.498330 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3730 23:42:58.498454 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3731 23:42:58.501964 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3732 23:42:58.505213 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3733 23:42:58.508531 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3734 23:42:58.511866 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3735 23:42:58.515120 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3736 23:42:58.518719 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3737 23:42:58.522108 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3738 23:42:58.522227 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3739 23:42:58.525132 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3740 23:42:58.528512 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3741 23:42:58.531916 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3742 23:42:58.535443 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3743 23:42:58.538488 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3744 23:42:58.542003 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3745 23:42:58.545614 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3746 23:42:58.545724 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3747 23:42:58.548618 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3748 23:42:58.551890 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3749 23:42:58.555163 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3750 23:42:58.558679 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3751 23:42:58.562297 -3, [0] xxxoxxxx xxxxxxxo [MSB]
3752 23:42:58.565056 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3753 23:42:58.565204 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3754 23:42:58.568656 0, [0] xxxoxxxx ooxxxxxo [MSB]
3755 23:42:58.572099 1, [0] xxooxxxx ooxxxxxo [MSB]
3756 23:42:58.575390 2, [0] xxooxxxx ooxxxxxo [MSB]
3757 23:42:58.578793 3, [0] xxooxxxo ooxxxxxo [MSB]
3758 23:42:58.581908 4, [0] oooooxxo ooooooxo [MSB]
3759 23:42:58.585342 32, [0] oooooooo ooooooox [MSB]
3760 23:42:58.588545 33, [0] oooooooo ooooooox [MSB]
3761 23:42:58.591995 34, [0] oooooooo ooooooox [MSB]
3762 23:42:58.595371 35, [0] oooxoooo oxooooox [MSB]
3763 23:42:58.598543 36, [0] oooxoooo xxooooox [MSB]
3764 23:42:58.599144 37, [0] ooxxoooo xxooooox [MSB]
3765 23:42:58.602017 38, [0] ooxxoooo xxooooox [MSB]
3766 23:42:58.605292 39, [0] ooxxooox xxooooox [MSB]
3767 23:42:58.608834 40, [0] oxxxxoox xxxoooox [MSB]
3768 23:42:58.611881 41, [0] xxxxxxox xxxxxxxx [MSB]
3769 23:42:58.615489 42, [0] xxxxxxxx xxxxxxxx [MSB]
3770 23:42:58.618774 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3771 23:42:58.621577 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3772 23:42:58.624843 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3773 23:42:58.628231 iDelay=42, Bit 3, Center 15 (-3 ~ 34) 38
3774 23:42:58.631700 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3775 23:42:58.634956 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3776 23:42:58.638865 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3777 23:42:58.641714 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3778 23:42:58.645080 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3779 23:42:58.648323 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3780 23:42:58.651748 iDelay=42, Bit 10, Center 21 (4 ~ 39) 36
3781 23:42:58.658468 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3782 23:42:58.661904 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3783 23:42:58.664590 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3784 23:42:58.668108 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3785 23:42:58.671338 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3786 23:42:58.671550 ==
3787 23:42:58.674809 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3788 23:42:58.678159 fsp= 1, odt_onoff= 1, Byte mode= 0
3789 23:42:58.681315 ==
3790 23:42:58.681571 DQS Delay:
3791 23:42:58.681804 DQS0 = 0, DQS1 = 0
3792 23:42:58.684767 DQM Delay:
3793 23:42:58.684937 DQM0 = 20, DQM1 = 19
3794 23:42:58.688511 DQ Delay:
3795 23:42:58.688786 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3796 23:42:58.691496 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3797 23:42:58.694634 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3798 23:42:58.698138 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3799 23:42:58.698326
3800 23:42:58.701568
3801 23:42:58.701722
3802 23:42:58.701845 [DramC_TX_OE_Calibration] TA2
3803 23:42:58.704559 Original DQ_B0 (3 6) =30, OEN = 27
3804 23:42:58.707926 Original DQ_B1 (3 6) =30, OEN = 27
3805 23:42:58.711595 23, 0x0, End_B0=23 End_B1=23
3806 23:42:58.714762 24, 0x0, End_B0=24 End_B1=24
3807 23:42:58.718044 25, 0x0, End_B0=25 End_B1=25
3808 23:42:58.718163 26, 0x0, End_B0=26 End_B1=26
3809 23:42:58.721207 27, 0x0, End_B0=27 End_B1=27
3810 23:42:58.724894 28, 0x0, End_B0=28 End_B1=28
3811 23:42:58.727859 29, 0x0, End_B0=29 End_B1=29
3812 23:42:58.727979 30, 0x0, End_B0=30 End_B1=30
3813 23:42:58.731352 31, 0xFFFF, End_B0=30 End_B1=30
3814 23:42:58.738098 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3815 23:42:58.744686 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3816 23:42:58.744818
3817 23:42:58.744913
3818 23:42:58.744998 Write Rank1 MR23 =0x3f
3819 23:42:58.748058 [DQSOSC]
3820 23:42:58.754811 [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3821 23:42:58.761252 CH1_RK1: MR19=0x202, MR18=0xCECE, DQSOSC=438, MR23=63, INC=12, DEC=19
3822 23:42:58.764376 Write Rank1 MR23 =0x3f
3823 23:42:58.764613 [DQSOSC]
3824 23:42:58.771447 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3825 23:42:58.774760 CH1 RK1: MR19=202, MR18=CCCC
3826 23:42:58.778391 [RxdqsGatingPostProcess] freq 1600
3827 23:42:58.784394 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3828 23:42:58.784744 Rank: 0
3829 23:42:58.787893 best DQS0 dly(2T, 0.5T) = (2, 6)
3830 23:42:58.791522 best DQS1 dly(2T, 0.5T) = (2, 6)
3831 23:42:58.795235 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3832 23:42:58.798173 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3833 23:42:58.798749 Rank: 1
3834 23:42:58.801397 best DQS0 dly(2T, 0.5T) = (2, 5)
3835 23:42:58.804777 best DQS1 dly(2T, 0.5T) = (2, 6)
3836 23:42:58.808251 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3837 23:42:58.808805 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3838 23:42:58.815099 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3839 23:42:58.818157 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3840 23:42:58.821360 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3841 23:42:58.821818
3842 23:42:58.824652
3843 23:42:58.825141 [Calibration Summary] Freqency 1600
3844 23:42:58.827830 CH 0, Rank 0
3845 23:42:58.828284 All Pass.
3846 23:42:58.828681
3847 23:42:58.831564 CH 0, Rank 1
3848 23:42:58.832070 All Pass.
3849 23:42:58.832398
3850 23:42:58.832744 CH 1, Rank 0
3851 23:42:58.834315 All Pass.
3852 23:42:58.834739
3853 23:42:58.835070 CH 1, Rank 1
3854 23:42:58.835376 All Pass.
3855 23:42:58.835721
3856 23:42:58.841529 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3857 23:42:58.847526 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3858 23:42:58.857799 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3859 23:42:58.858310 Write Rank0 MR3 =0xb0
3860 23:42:58.863918 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3861 23:42:58.871543 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3862 23:42:58.877514 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3863 23:42:58.881035 Write Rank1 MR3 =0xb0
3864 23:42:58.887938 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3865 23:42:58.894248 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3866 23:42:58.900613 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3867 23:42:58.903827 Write Rank0 MR3 =0xb0
3868 23:42:58.911185 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3869 23:42:58.917325 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3870 23:42:58.924419 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3871 23:42:58.924967 Write Rank1 MR3 =0xb0
3872 23:42:58.927554 DramC Write-DBI on
3873 23:42:58.930995 [GetDramInforAfterCalByMRR] Vendor 6.
3874 23:42:58.934285 [GetDramInforAfterCalByMRR] Revision 505.
3875 23:42:58.934826 MR8 1111
3876 23:42:58.940708 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3877 23:42:58.941191 MR8 1111
3878 23:42:58.944286 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3879 23:42:58.947472 MR8 1111
3880 23:42:58.950694 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3881 23:42:58.951248 MR8 1111
3882 23:42:58.957486 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3883 23:42:58.967256 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3884 23:42:58.967877 Write Rank0 MR13 =0xd0
3885 23:42:58.970849 Write Rank1 MR13 =0xd0
3886 23:42:58.971402 Write Rank0 MR13 =0xd0
3887 23:42:58.973742 Write Rank1 MR13 =0xd0
3888 23:42:58.977203 Save calibration result to emmc
3889 23:42:58.977714
3890 23:42:58.978085
3891 23:42:58.980220 [DramcModeReg_Check] Freq_1600, FSP_1
3892 23:42:58.983967 FSP_1, CH_0, RK0
3893 23:42:58.984380 Write Rank0 MR13 =0xd8
3894 23:42:58.987468 MR12 = 0x5e (global = 0x5e) match
3895 23:42:58.990375 MR14 = 0x1c (global = 0x1c) match
3896 23:42:58.993748 FSP_1, CH_0, RK1
3897 23:42:58.994262 Write Rank1 MR13 =0xd8
3898 23:42:58.997051 MR12 = 0x60 (global = 0x60) match
3899 23:42:59.000402 MR14 = 0x20 (global = 0x20) match
3900 23:42:59.004061 FSP_1, CH_1, RK0
3901 23:42:59.004618 Write Rank0 MR13 =0xd8
3902 23:42:59.007311 MR12 = 0x60 (global = 0x60) match
3903 23:42:59.010604 MR14 = 0x20 (global = 0x20) match
3904 23:42:59.013812 FSP_1, CH_1, RK1
3905 23:42:59.014270 Write Rank1 MR13 =0xd8
3906 23:42:59.017085 MR12 = 0x60 (global = 0x60) match
3907 23:42:59.020263 MR14 = 0x1e (global = 0x1e) match
3908 23:42:59.020723
3909 23:42:59.023686 [MEM_TEST] 02: After DFS, before run time config
3910 23:42:59.036101 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3911 23:42:59.036658
3912 23:42:59.037021 [TA2_TEST]
3913 23:42:59.037381 === TA2 HW
3914 23:42:59.039271 TA2 PAT: XTALK
3915 23:42:59.042819 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3916 23:42:59.049416 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3917 23:42:59.052843 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3918 23:42:59.055821 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3919 23:42:59.059542
3920 23:42:59.060109
3921 23:42:59.060516 Settings after calibration
3922 23:42:59.060860
3923 23:42:59.062839 [DramcRunTimeConfig]
3924 23:42:59.066124 TransferPLLToSPMControl - MODE SW PHYPLL
3925 23:42:59.066855 TX_TRACKING: ON
3926 23:42:59.068979 RX_TRACKING: ON
3927 23:42:59.069475 HW_GATING: ON
3928 23:42:59.072436 HW_GATING DBG: OFF
3929 23:42:59.072890 ddr_geometry:1
3930 23:42:59.075683 ddr_geometry:1
3931 23:42:59.076306 ddr_geometry:1
3932 23:42:59.078856 ddr_geometry:1
3933 23:42:59.079340 ddr_geometry:1
3934 23:42:59.079797 ddr_geometry:1
3935 23:42:59.082272 ddr_geometry:1
3936 23:42:59.082707 ddr_geometry:1
3937 23:42:59.085389 High Freq DUMMY_READ_FOR_TRACKING: ON
3938 23:42:59.089309 ZQCS_ENABLE_LP4: OFF
3939 23:42:59.092313 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3940 23:42:59.095390 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3941 23:42:59.095961 SPM_CONTROL_AFTERK: ON
3942 23:42:59.098882 IMPEDANCE_TRACKING: ON
3943 23:42:59.099323 TEMP_SENSOR: ON
3944 23:42:59.102376 PER_BANK_REFRESH: ON
3945 23:42:59.102934 HW_SAVE_FOR_SR: ON
3946 23:42:59.105567 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3947 23:42:59.108995 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3948 23:42:59.112377 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3949 23:42:59.115690 Read ODT Tracking: ON
3950 23:42:59.118974 =========================
3951 23:42:59.119536
3952 23:42:59.119873 [TA2_TEST]
3953 23:42:59.120183 === TA2 HW
3954 23:42:59.125522 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3955 23:42:59.128758 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3956 23:42:59.136028 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3957 23:42:59.138558 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3958 23:42:59.138973
3959 23:42:59.141939 [MEM_TEST] 03: After run time config
3960 23:42:59.154135 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3961 23:42:59.157219 [complex_mem_test] start addr:0x40024000, len:131072
3962 23:42:59.361404 1st complex R/W mem test pass
3963 23:42:59.368132 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3964 23:42:59.371485 sync preloader write leveling
3965 23:42:59.374524 sync preloader cbt_mr12
3966 23:42:59.377790 sync preloader cbt_clk_dly
3967 23:42:59.378347 sync preloader cbt_cmd_dly
3968 23:42:59.381056 sync preloader cbt_cs
3969 23:42:59.384260 sync preloader cbt_ca_perbit_delay
3970 23:42:59.384725 sync preloader clk_delay
3971 23:42:59.387667 sync preloader dqs_delay
3972 23:42:59.391300 sync preloader u1Gating2T_Save
3973 23:42:59.394520 sync preloader u1Gating05T_Save
3974 23:42:59.397980 sync preloader u1Gatingfine_tune_Save
3975 23:42:59.400756 sync preloader u1Gatingucpass_count_Save
3976 23:42:59.404394 sync preloader u1TxWindowPerbitVref_Save
3977 23:42:59.407857 sync preloader u1TxCenter_min_Save
3978 23:42:59.410957 sync preloader u1TxCenter_max_Save
3979 23:42:59.414297 sync preloader u1Txwin_center_Save
3980 23:42:59.417478 sync preloader u1Txfirst_pass_Save
3981 23:42:59.420953 sync preloader u1Txlast_pass_Save
3982 23:42:59.424162 sync preloader u1RxDatlat_Save
3983 23:42:59.427529 sync preloader u1RxWinPerbitVref_Save
3984 23:42:59.430814 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3985 23:42:59.433839 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3986 23:42:59.437397 sync preloader delay_cell_unit
3987 23:42:59.443935 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3988 23:42:59.447430 sync preloader write leveling
3989 23:42:59.447987 sync preloader cbt_mr12
3990 23:42:59.450452 sync preloader cbt_clk_dly
3991 23:42:59.453691 sync preloader cbt_cmd_dly
3992 23:42:59.454201 sync preloader cbt_cs
3993 23:42:59.456988 sync preloader cbt_ca_perbit_delay
3994 23:42:59.460274 sync preloader clk_delay
3995 23:42:59.464000 sync preloader dqs_delay
3996 23:42:59.466915 sync preloader u1Gating2T_Save
3997 23:42:59.467511 sync preloader u1Gating05T_Save
3998 23:42:59.470753 sync preloader u1Gatingfine_tune_Save
3999 23:42:59.477473 sync preloader u1Gatingucpass_count_Save
4000 23:42:59.480620 sync preloader u1TxWindowPerbitVref_Save
4001 23:42:59.483542 sync preloader u1TxCenter_min_Save
4002 23:42:59.483957 sync preloader u1TxCenter_max_Save
4003 23:42:59.487297 sync preloader u1Txwin_center_Save
4004 23:42:59.491101 sync preloader u1Txfirst_pass_Save
4005 23:42:59.493620 sync preloader u1Txlast_pass_Save
4006 23:42:59.497203 sync preloader u1RxDatlat_Save
4007 23:42:59.500505 sync preloader u1RxWinPerbitVref_Save
4008 23:42:59.503669 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4009 23:42:59.510575 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4010 23:42:59.511085 sync preloader delay_cell_unit
4011 23:42:59.516984 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4012 23:42:59.520769 sync preloader write leveling
4013 23:42:59.523630 sync preloader cbt_mr12
4014 23:42:59.526972 sync preloader cbt_clk_dly
4015 23:42:59.527381 sync preloader cbt_cmd_dly
4016 23:42:59.530681 sync preloader cbt_cs
4017 23:42:59.533797 sync preloader cbt_ca_perbit_delay
4018 23:42:59.537451 sync preloader clk_delay
4019 23:42:59.538118 sync preloader dqs_delay
4020 23:42:59.540599 sync preloader u1Gating2T_Save
4021 23:42:59.544128 sync preloader u1Gating05T_Save
4022 23:42:59.547490 sync preloader u1Gatingfine_tune_Save
4023 23:42:59.550546 sync preloader u1Gatingucpass_count_Save
4024 23:42:59.554189 sync preloader u1TxWindowPerbitVref_Save
4025 23:42:59.557172 sync preloader u1TxCenter_min_Save
4026 23:42:59.560315 sync preloader u1TxCenter_max_Save
4027 23:42:59.563517 sync preloader u1Txwin_center_Save
4028 23:42:59.567065 sync preloader u1Txfirst_pass_Save
4029 23:42:59.570673 sync preloader u1Txlast_pass_Save
4030 23:42:59.573923 sync preloader u1RxDatlat_Save
4031 23:42:59.577520 sync preloader u1RxWinPerbitVref_Save
4032 23:42:59.580667 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4033 23:42:59.583665 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4034 23:42:59.586792 sync preloader delay_cell_unit
4035 23:42:59.590655 just_for_test_dump_coreboot_params dump all params
4036 23:42:59.593482 dump source = 0x0
4037 23:42:59.593901 dump params frequency:1600
4038 23:42:59.597155 dump params rank number:2
4039 23:42:59.597681
4040 23:42:59.600359 dump params write leveling
4041 23:42:59.603933 write leveling[0][0][0] = 0x21
4042 23:42:59.607054 write leveling[0][0][1] = 0x18
4043 23:42:59.607619 write leveling[0][1][0] = 0x19
4044 23:42:59.610711 write leveling[0][1][1] = 0x18
4045 23:42:59.614362 write leveling[1][0][0] = 0x21
4046 23:42:59.616760 write leveling[1][0][1] = 0x18
4047 23:42:59.620403 write leveling[1][1][0] = 0x23
4048 23:42:59.623882 write leveling[1][1][1] = 0x18
4049 23:42:59.624437 dump params cbt_cs
4050 23:42:59.626697 cbt_cs[0][0] = 0x8
4051 23:42:59.627169 cbt_cs[0][1] = 0x8
4052 23:42:59.630847 cbt_cs[1][0] = 0xb
4053 23:42:59.631447 cbt_cs[1][1] = 0xb
4054 23:42:59.633442 dump params cbt_mr12
4055 23:42:59.634009 cbt_mr12[0][0] = 0x1e
4056 23:42:59.637446 cbt_mr12[0][1] = 0x20
4057 23:42:59.640288 cbt_mr12[1][0] = 0x20
4058 23:42:59.640867 cbt_mr12[1][1] = 0x20
4059 23:42:59.643027 dump params tx window
4060 23:42:59.646785 tx_center_min[0][0][0] = 982
4061 23:42:59.647351 tx_center_max[0][0][0] = 989
4062 23:42:59.650190 tx_center_min[0][0][1] = 975
4063 23:42:59.653240 tx_center_max[0][0][1] = 982
4064 23:42:59.656726 tx_center_min[0][1][0] = 978
4065 23:42:59.660101 tx_center_max[0][1][0] = 984
4066 23:42:59.660655 tx_center_min[0][1][1] = 978
4067 23:42:59.663356 tx_center_max[0][1][1] = 984
4068 23:42:59.666713 tx_center_min[1][0][0] = 988
4069 23:42:59.670103 tx_center_max[1][0][0] = 993
4070 23:42:59.670793 tx_center_min[1][0][1] = 976
4071 23:42:59.672969 tx_center_max[1][0][1] = 982
4072 23:42:59.676696 tx_center_min[1][1][0] = 987
4073 23:42:59.679944 tx_center_max[1][1][0] = 992
4074 23:42:59.683118 tx_center_min[1][1][1] = 974
4075 23:42:59.683781 tx_center_max[1][1][1] = 981
4076 23:42:59.686645 dump params tx window
4077 23:42:59.690007 tx_win_center[0][0][0] = 989
4078 23:42:59.692749 tx_first_pass[0][0][0] = 977
4079 23:42:59.693225 tx_last_pass[0][0][0] = 1001
4080 23:42:59.695980 tx_win_center[0][0][1] = 988
4081 23:42:59.699343 tx_first_pass[0][0][1] = 976
4082 23:42:59.703099 tx_last_pass[0][0][1] = 1000
4083 23:42:59.706499 tx_win_center[0][0][2] = 989
4084 23:42:59.707084 tx_first_pass[0][0][2] = 977
4085 23:42:59.709760 tx_last_pass[0][0][2] = 1001
4086 23:42:59.713189 tx_win_center[0][0][3] = 982
4087 23:42:59.716055 tx_first_pass[0][0][3] = 970
4088 23:42:59.719750 tx_last_pass[0][0][3] = 995
4089 23:42:59.720314 tx_win_center[0][0][4] = 988
4090 23:42:59.722585 tx_first_pass[0][0][4] = 976
4091 23:42:59.726050 tx_last_pass[0][0][4] = 1000
4092 23:42:59.730029 tx_win_center[0][0][5] = 985
4093 23:42:59.730558 tx_first_pass[0][0][5] = 973
4094 23:42:59.732921 tx_last_pass[0][0][5] = 998
4095 23:42:59.735989 tx_win_center[0][0][6] = 987
4096 23:42:59.739987 tx_first_pass[0][0][6] = 975
4097 23:42:59.742433 tx_last_pass[0][0][6] = 999
4098 23:42:59.742899 tx_win_center[0][0][7] = 988
4099 23:42:59.745900 tx_first_pass[0][0][7] = 976
4100 23:42:59.749797 tx_last_pass[0][0][7] = 1000
4101 23:42:59.752818 tx_win_center[0][0][8] = 975
4102 23:42:59.756219 tx_first_pass[0][0][8] = 964
4103 23:42:59.756685 tx_last_pass[0][0][8] = 987
4104 23:42:59.759303 tx_win_center[0][0][9] = 978
4105 23:42:59.762748 tx_first_pass[0][0][9] = 967
4106 23:42:59.766309 tx_last_pass[0][0][9] = 990
4107 23:42:59.766881 tx_win_center[0][0][10] = 982
4108 23:42:59.769392 tx_first_pass[0][0][10] = 970
4109 23:42:59.772866 tx_last_pass[0][0][10] = 994
4110 23:42:59.776343 tx_win_center[0][0][11] = 977
4111 23:42:59.779643 tx_first_pass[0][0][11] = 965
4112 23:42:59.780210 tx_last_pass[0][0][11] = 989
4113 23:42:59.782983 tx_win_center[0][0][12] = 978
4114 23:42:59.786601 tx_first_pass[0][0][12] = 967
4115 23:42:59.789618 tx_last_pass[0][0][12] = 990
4116 23:42:59.792589 tx_win_center[0][0][13] = 978
4117 23:42:59.793105 tx_first_pass[0][0][13] = 967
4118 23:42:59.796143 tx_last_pass[0][0][13] = 990
4119 23:42:59.799375 tx_win_center[0][0][14] = 978
4120 23:42:59.802960 tx_first_pass[0][0][14] = 967
4121 23:42:59.806270 tx_last_pass[0][0][14] = 990
4122 23:42:59.806844 tx_win_center[0][0][15] = 981
4123 23:42:59.809335 tx_first_pass[0][0][15] = 969
4124 23:42:59.812661 tx_last_pass[0][0][15] = 993
4125 23:42:59.815717 tx_win_center[0][1][0] = 984
4126 23:42:59.818865 tx_first_pass[0][1][0] = 972
4127 23:42:59.819296 tx_last_pass[0][1][0] = 997
4128 23:42:59.822500 tx_win_center[0][1][1] = 982
4129 23:42:59.825846 tx_first_pass[0][1][1] = 970
4130 23:42:59.829083 tx_last_pass[0][1][1] = 995
4131 23:42:59.829503 tx_win_center[0][1][2] = 984
4132 23:42:59.832774 tx_first_pass[0][1][2] = 972
4133 23:42:59.835779 tx_last_pass[0][1][2] = 996
4134 23:42:59.839097 tx_win_center[0][1][3] = 978
4135 23:42:59.842485 tx_first_pass[0][1][3] = 966
4136 23:42:59.843016 tx_last_pass[0][1][3] = 990
4137 23:42:59.845886 tx_win_center[0][1][4] = 982
4138 23:42:59.848803 tx_first_pass[0][1][4] = 969
4139 23:42:59.852667 tx_last_pass[0][1][4] = 995
4140 23:42:59.853081 tx_win_center[0][1][5] = 979
4141 23:42:59.855932 tx_first_pass[0][1][5] = 967
4142 23:42:59.859222 tx_last_pass[0][1][5] = 992
4143 23:42:59.862763 tx_win_center[0][1][6] = 980
4144 23:42:59.865513 tx_first_pass[0][1][6] = 968
4145 23:42:59.865929 tx_last_pass[0][1][6] = 993
4146 23:42:59.868973 tx_win_center[0][1][7] = 982
4147 23:42:59.872377 tx_first_pass[0][1][7] = 969
4148 23:42:59.875712 tx_last_pass[0][1][7] = 995
4149 23:42:59.876130 tx_win_center[0][1][8] = 978
4150 23:42:59.879040 tx_first_pass[0][1][8] = 966
4151 23:42:59.882443 tx_last_pass[0][1][8] = 990
4152 23:42:59.885521 tx_win_center[0][1][9] = 979
4153 23:42:59.888763 tx_first_pass[0][1][9] = 968
4154 23:42:59.889190 tx_last_pass[0][1][9] = 991
4155 23:42:59.892113 tx_win_center[0][1][10] = 984
4156 23:42:59.895683 tx_first_pass[0][1][10] = 972
4157 23:42:59.898589 tx_last_pass[0][1][10] = 997
4158 23:42:59.902184 tx_win_center[0][1][11] = 978
4159 23:42:59.902611 tx_first_pass[0][1][11] = 967
4160 23:42:59.905199 tx_last_pass[0][1][11] = 990
4161 23:42:59.908512 tx_win_center[0][1][12] = 980
4162 23:42:59.911943 tx_first_pass[0][1][12] = 968
4163 23:42:59.915330 tx_last_pass[0][1][12] = 992
4164 23:42:59.915790 tx_win_center[0][1][13] = 980
4165 23:42:59.918786 tx_first_pass[0][1][13] = 969
4166 23:42:59.921765 tx_last_pass[0][1][13] = 991
4167 23:42:59.925646 tx_win_center[0][1][14] = 980
4168 23:42:59.928676 tx_first_pass[0][1][14] = 968
4169 23:42:59.928935 tx_last_pass[0][1][14] = 992
4170 23:42:59.931933 tx_win_center[0][1][15] = 983
4171 23:42:59.935307 tx_first_pass[0][1][15] = 971
4172 23:42:59.938273 tx_last_pass[0][1][15] = 996
4173 23:42:59.941879 tx_win_center[1][0][0] = 993
4174 23:42:59.942138 tx_first_pass[1][0][0] = 980
4175 23:42:59.945053 tx_last_pass[1][0][0] = 1006
4176 23:42:59.948108 tx_win_center[1][0][1] = 990
4177 23:42:59.951793 tx_first_pass[1][0][1] = 978
4178 23:42:59.955262 tx_last_pass[1][0][1] = 1003
4179 23:42:59.955459 tx_win_center[1][0][2] = 989
4180 23:42:59.958184 tx_first_pass[1][0][2] = 977
4181 23:42:59.961765 tx_last_pass[1][0][2] = 1001
4182 23:42:59.965143 tx_win_center[1][0][3] = 988
4183 23:42:59.965376 tx_first_pass[1][0][3] = 976
4184 23:42:59.968602 tx_last_pass[1][0][3] = 1000
4185 23:42:59.971977 tx_win_center[1][0][4] = 991
4186 23:42:59.975269 tx_first_pass[1][0][4] = 979
4187 23:42:59.978230 tx_last_pass[1][0][4] = 1004
4188 23:42:59.978642 tx_win_center[1][0][5] = 992
4189 23:42:59.981892 tx_first_pass[1][0][5] = 979
4190 23:42:59.984999 tx_last_pass[1][0][5] = 1005
4191 23:42:59.988453 tx_win_center[1][0][6] = 991
4192 23:42:59.991482 tx_first_pass[1][0][6] = 978
4193 23:42:59.991899 tx_last_pass[1][0][6] = 1005
4194 23:42:59.994818 tx_win_center[1][0][7] = 990
4195 23:42:59.998528 tx_first_pass[1][0][7] = 978
4196 23:43:00.001715 tx_last_pass[1][0][7] = 1003
4197 23:43:00.004897 tx_win_center[1][0][8] = 979
4198 23:43:00.005316 tx_first_pass[1][0][8] = 968
4199 23:43:00.008496 tx_last_pass[1][0][8] = 991
4200 23:43:00.011866 tx_win_center[1][0][9] = 980
4201 23:43:00.015251 tx_first_pass[1][0][9] = 969
4202 23:43:00.015704 tx_last_pass[1][0][9] = 991
4203 23:43:00.018504 tx_win_center[1][0][10] = 981
4204 23:43:00.021902 tx_first_pass[1][0][10] = 970
4205 23:43:00.025078 tx_last_pass[1][0][10] = 993
4206 23:43:00.028063 tx_win_center[1][0][11] = 982
4207 23:43:00.028480 tx_first_pass[1][0][11] = 970
4208 23:43:00.031928 tx_last_pass[1][0][11] = 994
4209 23:43:00.035318 tx_win_center[1][0][12] = 981
4210 23:43:00.038222 tx_first_pass[1][0][12] = 970
4211 23:43:00.041501 tx_last_pass[1][0][12] = 993
4212 23:43:00.041916 tx_win_center[1][0][13] = 982
4213 23:43:00.045500 tx_first_pass[1][0][13] = 971
4214 23:43:00.048682 tx_last_pass[1][0][13] = 994
4215 23:43:00.051715 tx_win_center[1][0][14] = 981
4216 23:43:00.054860 tx_first_pass[1][0][14] = 970
4217 23:43:00.055275 tx_last_pass[1][0][14] = 993
4218 23:43:00.058323 tx_win_center[1][0][15] = 976
4219 23:43:00.061727 tx_first_pass[1][0][15] = 965
4220 23:43:00.064947 tx_last_pass[1][0][15] = 987
4221 23:43:00.068163 tx_win_center[1][1][0] = 992
4222 23:43:00.068577 tx_first_pass[1][1][0] = 979
4223 23:43:00.071349 tx_last_pass[1][1][0] = 1006
4224 23:43:00.074915 tx_win_center[1][1][1] = 991
4225 23:43:00.078084 tx_first_pass[1][1][1] = 978
4226 23:43:00.081543 tx_last_pass[1][1][1] = 1004
4227 23:43:00.081957 tx_win_center[1][1][2] = 990
4228 23:43:00.084703 tx_first_pass[1][1][2] = 978
4229 23:43:00.088393 tx_last_pass[1][1][2] = 1002
4230 23:43:00.091908 tx_win_center[1][1][3] = 987
4231 23:43:00.094763 tx_first_pass[1][1][3] = 975
4232 23:43:00.095180 tx_last_pass[1][1][3] = 999
4233 23:43:00.098393 tx_win_center[1][1][4] = 991
4234 23:43:00.101701 tx_first_pass[1][1][4] = 978
4235 23:43:00.104721 tx_last_pass[1][1][4] = 1004
4236 23:43:00.105133 tx_win_center[1][1][5] = 992
4237 23:43:00.108021 tx_first_pass[1][1][5] = 979
4238 23:43:00.111327 tx_last_pass[1][1][5] = 1005
4239 23:43:00.114561 tx_win_center[1][1][6] = 991
4240 23:43:00.117986 tx_first_pass[1][1][6] = 978
4241 23:43:00.118400 tx_last_pass[1][1][6] = 1005
4242 23:43:00.121046 tx_win_center[1][1][7] = 991
4243 23:43:00.124656 tx_first_pass[1][1][7] = 978
4244 23:43:00.127813 tx_last_pass[1][1][7] = 1004
4245 23:43:00.131702 tx_win_center[1][1][8] = 978
4246 23:43:00.132127 tx_first_pass[1][1][8] = 967
4247 23:43:00.134412 tx_last_pass[1][1][8] = 990
4248 23:43:00.137706 tx_win_center[1][1][9] = 978
4249 23:43:00.141103 tx_first_pass[1][1][9] = 967
4250 23:43:00.141519 tx_last_pass[1][1][9] = 990
4251 23:43:00.144504 tx_win_center[1][1][10] = 980
4252 23:43:00.147767 tx_first_pass[1][1][10] = 969
4253 23:43:00.151111 tx_last_pass[1][1][10] = 992
4254 23:43:00.154350 tx_win_center[1][1][11] = 981
4255 23:43:00.154780 tx_first_pass[1][1][11] = 969
4256 23:43:00.157651 tx_last_pass[1][1][11] = 993
4257 23:43:00.161308 tx_win_center[1][1][12] = 981
4258 23:43:00.164309 tx_first_pass[1][1][12] = 969
4259 23:43:00.167952 tx_last_pass[1][1][12] = 993
4260 23:43:00.168369 tx_win_center[1][1][13] = 981
4261 23:43:00.171495 tx_first_pass[1][1][13] = 969
4262 23:43:00.174296 tx_last_pass[1][1][13] = 993
4263 23:43:00.177720 tx_win_center[1][1][14] = 980
4264 23:43:00.181142 tx_first_pass[1][1][14] = 969
4265 23:43:00.181556 tx_last_pass[1][1][14] = 992
4266 23:43:00.184672 tx_win_center[1][1][15] = 974
4267 23:43:00.187694 tx_first_pass[1][1][15] = 962
4268 23:43:00.190918 tx_last_pass[1][1][15] = 987
4269 23:43:00.194150 dump params rx window
4270 23:43:00.194678 rx_firspass[0][0][0] = 5
4271 23:43:00.197726 rx_lastpass[0][0][0] = 38
4272 23:43:00.201182 rx_firspass[0][0][1] = 6
4273 23:43:00.201600 rx_lastpass[0][0][1] = 36
4274 23:43:00.204048 rx_firspass[0][0][2] = 6
4275 23:43:00.207671 rx_lastpass[0][0][2] = 35
4276 23:43:00.208086 rx_firspass[0][0][3] = -2
4277 23:43:00.210971 rx_lastpass[0][0][3] = 30
4278 23:43:00.214144 rx_firspass[0][0][4] = 5
4279 23:43:00.214563 rx_lastpass[0][0][4] = 36
4280 23:43:00.217647 rx_firspass[0][0][5] = 2
4281 23:43:00.220844 rx_lastpass[0][0][5] = 31
4282 23:43:00.224462 rx_firspass[0][0][6] = 4
4283 23:43:00.224878 rx_lastpass[0][0][6] = 33
4284 23:43:00.227382 rx_firspass[0][0][7] = 5
4285 23:43:00.230848 rx_lastpass[0][0][7] = 36
4286 23:43:00.231262 rx_firspass[0][0][8] = -3
4287 23:43:00.233898 rx_lastpass[0][0][8] = 32
4288 23:43:00.237252 rx_firspass[0][0][9] = 1
4289 23:43:00.240613 rx_lastpass[0][0][9] = 32
4290 23:43:00.241029 rx_firspass[0][0][10] = 8
4291 23:43:00.244371 rx_lastpass[0][0][10] = 40
4292 23:43:00.247460 rx_firspass[0][0][11] = 1
4293 23:43:00.247991 rx_lastpass[0][0][11] = 32
4294 23:43:00.250594 rx_firspass[0][0][12] = 2
4295 23:43:00.253994 rx_lastpass[0][0][12] = 36
4296 23:43:00.257535 rx_firspass[0][0][13] = 3
4297 23:43:00.257993 rx_lastpass[0][0][13] = 33
4298 23:43:00.260885 rx_firspass[0][0][14] = 2
4299 23:43:00.264205 rx_lastpass[0][0][14] = 36
4300 23:43:00.267040 rx_firspass[0][0][15] = 6
4301 23:43:00.267486 rx_lastpass[0][0][15] = 36
4302 23:43:00.270564 rx_firspass[0][1][0] = 6
4303 23:43:00.274119 rx_lastpass[0][1][0] = 40
4304 23:43:00.274540 rx_firspass[0][1][1] = 5
4305 23:43:00.277506 rx_lastpass[0][1][1] = 38
4306 23:43:00.280888 rx_firspass[0][1][2] = 7
4307 23:43:00.281297 rx_lastpass[0][1][2] = 38
4308 23:43:00.283718 rx_firspass[0][1][3] = -2
4309 23:43:00.287128 rx_lastpass[0][1][3] = 34
4310 23:43:00.290349 rx_firspass[0][1][4] = 5
4311 23:43:00.290779 rx_lastpass[0][1][4] = 38
4312 23:43:00.294403 rx_firspass[0][1][5] = 1
4313 23:43:00.297049 rx_lastpass[0][1][5] = 34
4314 23:43:00.297461 rx_firspass[0][1][6] = 3
4315 23:43:00.300364 rx_lastpass[0][1][6] = 37
4316 23:43:00.303358 rx_firspass[0][1][7] = 3
4317 23:43:00.306679 rx_lastpass[0][1][7] = 38
4318 23:43:00.307090 rx_firspass[0][1][8] = -3
4319 23:43:00.310045 rx_lastpass[0][1][8] = 33
4320 23:43:00.313418 rx_firspass[0][1][9] = 1
4321 23:43:00.313831 rx_lastpass[0][1][9] = 36
4322 23:43:00.316796 rx_firspass[0][1][10] = 7
4323 23:43:00.320199 rx_lastpass[0][1][10] = 43
4324 23:43:00.323381 rx_firspass[0][1][11] = -2
4325 23:43:00.323831 rx_lastpass[0][1][11] = 34
4326 23:43:00.327136 rx_firspass[0][1][12] = 1
4327 23:43:00.330341 rx_lastpass[0][1][12] = 37
4328 23:43:00.333439 rx_firspass[0][1][13] = 2
4329 23:43:00.333854 rx_lastpass[0][1][13] = 34
4330 23:43:00.336754 rx_firspass[0][1][14] = 2
4331 23:43:00.340133 rx_lastpass[0][1][14] = 38
4332 23:43:00.340578 rx_firspass[0][1][15] = 7
4333 23:43:00.343699 rx_lastpass[0][1][15] = 39
4334 23:43:00.347026 rx_firspass[1][0][0] = 6
4335 23:43:00.350246 rx_lastpass[1][0][0] = 38
4336 23:43:00.350692 rx_firspass[1][0][1] = 5
4337 23:43:00.353624 rx_lastpass[1][0][1] = 38
4338 23:43:00.356920 rx_firspass[1][0][2] = 2
4339 23:43:00.357365 rx_lastpass[1][0][2] = 35
4340 23:43:00.360168 rx_firspass[1][0][3] = 0
4341 23:43:00.363507 rx_lastpass[1][0][3] = 33
4342 23:43:00.363923 rx_firspass[1][0][4] = 5
4343 23:43:00.366721 rx_lastpass[1][0][4] = 38
4344 23:43:00.370142 rx_firspass[1][0][5] = 7
4345 23:43:00.373613 rx_lastpass[1][0][5] = 38
4346 23:43:00.374022 rx_firspass[1][0][6] = 7
4347 23:43:00.377129 rx_lastpass[1][0][6] = 40
4348 23:43:00.380249 rx_firspass[1][0][7] = 4
4349 23:43:00.380659 rx_lastpass[1][0][7] = 38
4350 23:43:00.383753 rx_firspass[1][0][8] = 1
4351 23:43:00.386659 rx_lastpass[1][0][8] = 33
4352 23:43:00.387072 rx_firspass[1][0][9] = 1
4353 23:43:00.390009 rx_lastpass[1][0][9] = 32
4354 23:43:00.393355 rx_firspass[1][0][10] = 5
4355 23:43:00.396577 rx_lastpass[1][0][10] = 35
4356 23:43:00.396987 rx_firspass[1][0][11] = 5
4357 23:43:00.400083 rx_lastpass[1][0][11] = 38
4358 23:43:00.403276 rx_firspass[1][0][12] = 6
4359 23:43:00.403733 rx_lastpass[1][0][12] = 38
4360 23:43:00.407258 rx_firspass[1][0][13] = 6
4361 23:43:00.410043 rx_lastpass[1][0][13] = 37
4362 23:43:00.413423 rx_firspass[1][0][14] = 7
4363 23:43:00.413834 rx_lastpass[1][0][14] = 38
4364 23:43:00.416579 rx_firspass[1][0][15] = -3
4365 23:43:00.419913 rx_lastpass[1][0][15] = 30
4366 23:43:00.423364 rx_firspass[1][1][0] = 4
4367 23:43:00.423825 rx_lastpass[1][1][0] = 40
4368 23:43:00.426886 rx_firspass[1][1][1] = 4
4369 23:43:00.430163 rx_lastpass[1][1][1] = 39
4370 23:43:00.430574 rx_firspass[1][1][2] = 1
4371 23:43:00.433194 rx_lastpass[1][1][2] = 36
4372 23:43:00.436551 rx_firspass[1][1][3] = -3
4373 23:43:00.436962 rx_lastpass[1][1][3] = 34
4374 23:43:00.440195 rx_firspass[1][1][4] = 4
4375 23:43:00.443517 rx_lastpass[1][1][4] = 39
4376 23:43:00.446757 rx_firspass[1][1][5] = 5
4377 23:43:00.447172 rx_lastpass[1][1][5] = 40
4378 23:43:00.450181 rx_firspass[1][1][6] = 5
4379 23:43:00.453576 rx_lastpass[1][1][6] = 41
4380 23:43:00.454007 rx_firspass[1][1][7] = 3
4381 23:43:00.456877 rx_lastpass[1][1][7] = 38
4382 23:43:00.460136 rx_firspass[1][1][8] = 0
4383 23:43:00.460544 rx_lastpass[1][1][8] = 35
4384 23:43:00.463292 rx_firspass[1][1][9] = -1
4385 23:43:00.466252 rx_lastpass[1][1][9] = 34
4386 23:43:00.469992 rx_firspass[1][1][10] = 4
4387 23:43:00.470427 rx_lastpass[1][1][10] = 39
4388 23:43:00.473424 rx_firspass[1][1][11] = 4
4389 23:43:00.476679 rx_lastpass[1][1][11] = 40
4390 23:43:00.479808 rx_firspass[1][1][12] = 4
4391 23:43:00.480224 rx_lastpass[1][1][12] = 40
4392 23:43:00.483090 rx_firspass[1][1][13] = 4
4393 23:43:00.486556 rx_lastpass[1][1][13] = 40
4394 23:43:00.487194 rx_firspass[1][1][14] = 5
4395 23:43:00.489808 rx_lastpass[1][1][14] = 40
4396 23:43:00.492907 rx_firspass[1][1][15] = -3
4397 23:43:00.496455 rx_lastpass[1][1][15] = 31
4398 23:43:00.496865 dump params clk_delay
4399 23:43:00.499920 clk_delay[0] = 1
4400 23:43:00.500513 clk_delay[1] = 0
4401 23:43:00.502881 dump params dqs_delay
4402 23:43:00.503327 dqs_delay[0][0] = -2
4403 23:43:00.506048 dqs_delay[0][1] = 0
4404 23:43:00.506455 dqs_delay[1][0] = 0
4405 23:43:00.510000 dqs_delay[1][1] = 0
4406 23:43:00.513199 dump params delay_cell_unit = 735
4407 23:43:00.513618 dump source = 0x0
4408 23:43:00.516568 dump params frequency:1200
4409 23:43:00.519890 dump params rank number:2
4410 23:43:00.520437
4411 23:43:00.523097 dump params write leveling
4412 23:43:00.523641 write leveling[0][0][0] = 0x0
4413 23:43:00.526298 write leveling[0][0][1] = 0x0
4414 23:43:00.529575 write leveling[0][1][0] = 0x0
4415 23:43:00.532993 write leveling[0][1][1] = 0x0
4416 23:43:00.536288 write leveling[1][0][0] = 0x0
4417 23:43:00.536700 write leveling[1][0][1] = 0x0
4418 23:43:00.539834 write leveling[1][1][0] = 0x0
4419 23:43:00.542908 write leveling[1][1][1] = 0x0
4420 23:43:00.546327 dump params cbt_cs
4421 23:43:00.546754 cbt_cs[0][0] = 0x0
4422 23:43:00.549554 cbt_cs[0][1] = 0x0
4423 23:43:00.549976 cbt_cs[1][0] = 0x0
4424 23:43:00.553091 cbt_cs[1][1] = 0x0
4425 23:43:00.553508 dump params cbt_mr12
4426 23:43:00.556565 cbt_mr12[0][0] = 0x0
4427 23:43:00.556989 cbt_mr12[0][1] = 0x0
4428 23:43:00.559746 cbt_mr12[1][0] = 0x0
4429 23:43:00.560166 cbt_mr12[1][1] = 0x0
4430 23:43:00.563226 dump params tx window
4431 23:43:00.566515 tx_center_min[0][0][0] = 0
4432 23:43:00.569822 tx_center_max[0][0][0] = 0
4433 23:43:00.570243 tx_center_min[0][0][1] = 0
4434 23:43:00.573056 tx_center_max[0][0][1] = 0
4435 23:43:00.576108 tx_center_min[0][1][0] = 0
4436 23:43:00.576523 tx_center_max[0][1][0] = 0
4437 23:43:00.579575 tx_center_min[0][1][1] = 0
4438 23:43:00.583086 tx_center_max[0][1][1] = 0
4439 23:43:00.586108 tx_center_min[1][0][0] = 0
4440 23:43:00.586525 tx_center_max[1][0][0] = 0
4441 23:43:00.590187 tx_center_min[1][0][1] = 0
4442 23:43:00.592849 tx_center_max[1][0][1] = 0
4443 23:43:00.596482 tx_center_min[1][1][0] = 0
4444 23:43:00.596924 tx_center_max[1][1][0] = 0
4445 23:43:00.599506 tx_center_min[1][1][1] = 0
4446 23:43:00.602920 tx_center_max[1][1][1] = 0
4447 23:43:00.603336 dump params tx window
4448 23:43:00.606190 tx_win_center[0][0][0] = 0
4449 23:43:00.609553 tx_first_pass[0][0][0] = 0
4450 23:43:00.613302 tx_last_pass[0][0][0] = 0
4451 23:43:00.613837 tx_win_center[0][0][1] = 0
4452 23:43:00.616320 tx_first_pass[0][0][1] = 0
4453 23:43:00.619350 tx_last_pass[0][0][1] = 0
4454 23:43:00.622825 tx_win_center[0][0][2] = 0
4455 23:43:00.623354 tx_first_pass[0][0][2] = 0
4456 23:43:00.626259 tx_last_pass[0][0][2] = 0
4457 23:43:00.630030 tx_win_center[0][0][3] = 0
4458 23:43:00.630548 tx_first_pass[0][0][3] = 0
4459 23:43:00.633279 tx_last_pass[0][0][3] = 0
4460 23:43:00.636486 tx_win_center[0][0][4] = 0
4461 23:43:00.639851 tx_first_pass[0][0][4] = 0
4462 23:43:00.640414 tx_last_pass[0][0][4] = 0
4463 23:43:00.642857 tx_win_center[0][0][5] = 0
4464 23:43:00.646218 tx_first_pass[0][0][5] = 0
4465 23:43:00.649428 tx_last_pass[0][0][5] = 0
4466 23:43:00.649896 tx_win_center[0][0][6] = 0
4467 23:43:00.652666 tx_first_pass[0][0][6] = 0
4468 23:43:00.656386 tx_last_pass[0][0][6] = 0
4469 23:43:00.656872 tx_win_center[0][0][7] = 0
4470 23:43:00.659537 tx_first_pass[0][0][7] = 0
4471 23:43:00.663004 tx_last_pass[0][0][7] = 0
4472 23:43:00.666342 tx_win_center[0][0][8] = 0
4473 23:43:00.666763 tx_first_pass[0][0][8] = 0
4474 23:43:00.669931 tx_last_pass[0][0][8] = 0
4475 23:43:00.673381 tx_win_center[0][0][9] = 0
4476 23:43:00.675744 tx_first_pass[0][0][9] = 0
4477 23:43:00.676168 tx_last_pass[0][0][9] = 0
4478 23:43:00.679853 tx_win_center[0][0][10] = 0
4479 23:43:00.683069 tx_first_pass[0][0][10] = 0
4480 23:43:00.685773 tx_last_pass[0][0][10] = 0
4481 23:43:00.686195 tx_win_center[0][0][11] = 0
4482 23:43:00.689559 tx_first_pass[0][0][11] = 0
4483 23:43:00.692460 tx_last_pass[0][0][11] = 0
4484 23:43:00.695657 tx_win_center[0][0][12] = 0
4485 23:43:00.696080 tx_first_pass[0][0][12] = 0
4486 23:43:00.699003 tx_last_pass[0][0][12] = 0
4487 23:43:00.702486 tx_win_center[0][0][13] = 0
4488 23:43:00.705852 tx_first_pass[0][0][13] = 0
4489 23:43:00.706379 tx_last_pass[0][0][13] = 0
4490 23:43:00.708988 tx_win_center[0][0][14] = 0
4491 23:43:00.712415 tx_first_pass[0][0][14] = 0
4492 23:43:00.715966 tx_last_pass[0][0][14] = 0
4493 23:43:00.716512 tx_win_center[0][0][15] = 0
4494 23:43:00.719341 tx_first_pass[0][0][15] = 0
4495 23:43:00.722284 tx_last_pass[0][0][15] = 0
4496 23:43:00.726046 tx_win_center[0][1][0] = 0
4497 23:43:00.726577 tx_first_pass[0][1][0] = 0
4498 23:43:00.729109 tx_last_pass[0][1][0] = 0
4499 23:43:00.732309 tx_win_center[0][1][1] = 0
4500 23:43:00.732747 tx_first_pass[0][1][1] = 0
4501 23:43:00.736021 tx_last_pass[0][1][1] = 0
4502 23:43:00.739135 tx_win_center[0][1][2] = 0
4503 23:43:00.742353 tx_first_pass[0][1][2] = 0
4504 23:43:00.742776 tx_last_pass[0][1][2] = 0
4505 23:43:00.745527 tx_win_center[0][1][3] = 0
4506 23:43:00.748772 tx_first_pass[0][1][3] = 0
4507 23:43:00.752325 tx_last_pass[0][1][3] = 0
4508 23:43:00.752746 tx_win_center[0][1][4] = 0
4509 23:43:00.756304 tx_first_pass[0][1][4] = 0
4510 23:43:00.759191 tx_last_pass[0][1][4] = 0
4511 23:43:00.759757 tx_win_center[0][1][5] = 0
4512 23:43:00.762354 tx_first_pass[0][1][5] = 0
4513 23:43:00.765761 tx_last_pass[0][1][5] = 0
4514 23:43:00.768621 tx_win_center[0][1][6] = 0
4515 23:43:00.769059 tx_first_pass[0][1][6] = 0
4516 23:43:00.771927 tx_last_pass[0][1][6] = 0
4517 23:43:00.775453 tx_win_center[0][1][7] = 0
4518 23:43:00.779062 tx_first_pass[0][1][7] = 0
4519 23:43:00.779518 tx_last_pass[0][1][7] = 0
4520 23:43:00.781894 tx_win_center[0][1][8] = 0
4521 23:43:00.785298 tx_first_pass[0][1][8] = 0
4522 23:43:00.785759 tx_last_pass[0][1][8] = 0
4523 23:43:00.788970 tx_win_center[0][1][9] = 0
4524 23:43:00.791876 tx_first_pass[0][1][9] = 0
4525 23:43:00.795129 tx_last_pass[0][1][9] = 0
4526 23:43:00.795567 tx_win_center[0][1][10] = 0
4527 23:43:00.798768 tx_first_pass[0][1][10] = 0
4528 23:43:00.802102 tx_last_pass[0][1][10] = 0
4529 23:43:00.805118 tx_win_center[0][1][11] = 0
4530 23:43:00.805651 tx_first_pass[0][1][11] = 0
4531 23:43:00.808738 tx_last_pass[0][1][11] = 0
4532 23:43:00.812052 tx_win_center[0][1][12] = 0
4533 23:43:00.815689 tx_first_pass[0][1][12] = 0
4534 23:43:00.816225 tx_last_pass[0][1][12] = 0
4535 23:43:00.818881 tx_win_center[0][1][13] = 0
4536 23:43:00.822537 tx_first_pass[0][1][13] = 0
4537 23:43:00.825552 tx_last_pass[0][1][13] = 0
4538 23:43:00.826121 tx_win_center[0][1][14] = 0
4539 23:43:00.828669 tx_first_pass[0][1][14] = 0
4540 23:43:00.832438 tx_last_pass[0][1][14] = 0
4541 23:43:00.835698 tx_win_center[0][1][15] = 0
4542 23:43:00.836266 tx_first_pass[0][1][15] = 0
4543 23:43:00.838941 tx_last_pass[0][1][15] = 0
4544 23:43:00.842731 tx_win_center[1][0][0] = 0
4545 23:43:00.845127 tx_first_pass[1][0][0] = 0
4546 23:43:00.845592 tx_last_pass[1][0][0] = 0
4547 23:43:00.848573 tx_win_center[1][0][1] = 0
4548 23:43:00.852116 tx_first_pass[1][0][1] = 0
4549 23:43:00.855580 tx_last_pass[1][0][1] = 0
4550 23:43:00.856046 tx_win_center[1][0][2] = 0
4551 23:43:00.858907 tx_first_pass[1][0][2] = 0
4552 23:43:00.862307 tx_last_pass[1][0][2] = 0
4553 23:43:00.862882 tx_win_center[1][0][3] = 0
4554 23:43:00.865542 tx_first_pass[1][0][3] = 0
4555 23:43:00.868645 tx_last_pass[1][0][3] = 0
4556 23:43:00.872187 tx_win_center[1][0][4] = 0
4557 23:43:00.872764 tx_first_pass[1][0][4] = 0
4558 23:43:00.875466 tx_last_pass[1][0][4] = 0
4559 23:43:00.878833 tx_win_center[1][0][5] = 0
4560 23:43:00.881879 tx_first_pass[1][0][5] = 0
4561 23:43:00.882446 tx_last_pass[1][0][5] = 0
4562 23:43:00.885192 tx_win_center[1][0][6] = 0
4563 23:43:00.888502 tx_first_pass[1][0][6] = 0
4564 23:43:00.888960 tx_last_pass[1][0][6] = 0
4565 23:43:00.891891 tx_win_center[1][0][7] = 0
4566 23:43:00.895102 tx_first_pass[1][0][7] = 0
4567 23:43:00.898586 tx_last_pass[1][0][7] = 0
4568 23:43:00.899138 tx_win_center[1][0][8] = 0
4569 23:43:00.901830 tx_first_pass[1][0][8] = 0
4570 23:43:00.905017 tx_last_pass[1][0][8] = 0
4571 23:43:00.905440 tx_win_center[1][0][9] = 0
4572 23:43:00.908557 tx_first_pass[1][0][9] = 0
4573 23:43:00.912014 tx_last_pass[1][0][9] = 0
4574 23:43:00.914888 tx_win_center[1][0][10] = 0
4575 23:43:00.915488 tx_first_pass[1][0][10] = 0
4576 23:43:00.918389 tx_last_pass[1][0][10] = 0
4577 23:43:00.922189 tx_win_center[1][0][11] = 0
4578 23:43:00.925543 tx_first_pass[1][0][11] = 0
4579 23:43:00.926111 tx_last_pass[1][0][11] = 0
4580 23:43:00.928297 tx_win_center[1][0][12] = 0
4581 23:43:00.932310 tx_first_pass[1][0][12] = 0
4582 23:43:00.935509 tx_last_pass[1][0][12] = 0
4583 23:43:00.935975 tx_win_center[1][0][13] = 0
4584 23:43:00.938575 tx_first_pass[1][0][13] = 0
4585 23:43:00.941650 tx_last_pass[1][0][13] = 0
4586 23:43:00.945525 tx_win_center[1][0][14] = 0
4587 23:43:00.945993 tx_first_pass[1][0][14] = 0
4588 23:43:00.948631 tx_last_pass[1][0][14] = 0
4589 23:43:00.951804 tx_win_center[1][0][15] = 0
4590 23:43:00.955179 tx_first_pass[1][0][15] = 0
4591 23:43:00.955649 tx_last_pass[1][0][15] = 0
4592 23:43:00.958958 tx_win_center[1][1][0] = 0
4593 23:43:00.961913 tx_first_pass[1][1][0] = 0
4594 23:43:00.964809 tx_last_pass[1][1][0] = 0
4595 23:43:00.965231 tx_win_center[1][1][1] = 0
4596 23:43:00.968735 tx_first_pass[1][1][1] = 0
4597 23:43:00.972248 tx_last_pass[1][1][1] = 0
4598 23:43:00.972673 tx_win_center[1][1][2] = 0
4599 23:43:00.975297 tx_first_pass[1][1][2] = 0
4600 23:43:00.978786 tx_last_pass[1][1][2] = 0
4601 23:43:00.982067 tx_win_center[1][1][3] = 0
4602 23:43:00.982597 tx_first_pass[1][1][3] = 0
4603 23:43:00.985228 tx_last_pass[1][1][3] = 0
4604 23:43:00.988695 tx_win_center[1][1][4] = 0
4605 23:43:00.991677 tx_first_pass[1][1][4] = 0
4606 23:43:00.992219 tx_last_pass[1][1][4] = 0
4607 23:43:00.995369 tx_win_center[1][1][5] = 0
4608 23:43:00.998372 tx_first_pass[1][1][5] = 0
4609 23:43:00.998798 tx_last_pass[1][1][5] = 0
4610 23:43:01.001825 tx_win_center[1][1][6] = 0
4611 23:43:01.004727 tx_first_pass[1][1][6] = 0
4612 23:43:01.008262 tx_last_pass[1][1][6] = 0
4613 23:43:01.008708 tx_win_center[1][1][7] = 0
4614 23:43:01.011567 tx_first_pass[1][1][7] = 0
4615 23:43:01.015036 tx_last_pass[1][1][7] = 0
4616 23:43:01.018650 tx_win_center[1][1][8] = 0
4617 23:43:01.019191 tx_first_pass[1][1][8] = 0
4618 23:43:01.021576 tx_last_pass[1][1][8] = 0
4619 23:43:01.025743 tx_win_center[1][1][9] = 0
4620 23:43:01.026268 tx_first_pass[1][1][9] = 0
4621 23:43:01.028130 tx_last_pass[1][1][9] = 0
4622 23:43:01.031793 tx_win_center[1][1][10] = 0
4623 23:43:01.035044 tx_first_pass[1][1][10] = 0
4624 23:43:01.035609 tx_last_pass[1][1][10] = 0
4625 23:43:01.038148 tx_win_center[1][1][11] = 0
4626 23:43:01.041701 tx_first_pass[1][1][11] = 0
4627 23:43:01.044860 tx_last_pass[1][1][11] = 0
4628 23:43:01.045335 tx_win_center[1][1][12] = 0
4629 23:43:01.048107 tx_first_pass[1][1][12] = 0
4630 23:43:01.051833 tx_last_pass[1][1][12] = 0
4631 23:43:01.054878 tx_win_center[1][1][13] = 0
4632 23:43:01.058422 tx_first_pass[1][1][13] = 0
4633 23:43:01.058993 tx_last_pass[1][1][13] = 0
4634 23:43:01.061168 tx_win_center[1][1][14] = 0
4635 23:43:01.064708 tx_first_pass[1][1][14] = 0
4636 23:43:01.068312 tx_last_pass[1][1][14] = 0
4637 23:43:01.068886 tx_win_center[1][1][15] = 0
4638 23:43:01.071796 tx_first_pass[1][1][15] = 0
4639 23:43:01.074794 tx_last_pass[1][1][15] = 0
4640 23:43:01.075369 dump params rx window
4641 23:43:01.078552 rx_firspass[0][0][0] = 0
4642 23:43:01.081484 rx_lastpass[0][0][0] = 0
4643 23:43:01.081955 rx_firspass[0][0][1] = 0
4644 23:43:01.084493 rx_lastpass[0][0][1] = 0
4645 23:43:01.087810 rx_firspass[0][0][2] = 0
4646 23:43:01.091617 rx_lastpass[0][0][2] = 0
4647 23:43:01.092176 rx_firspass[0][0][3] = 0
4648 23:43:01.094981 rx_lastpass[0][0][3] = 0
4649 23:43:01.098329 rx_firspass[0][0][4] = 0
4650 23:43:01.098899 rx_lastpass[0][0][4] = 0
4651 23:43:01.101530 rx_firspass[0][0][5] = 0
4652 23:43:01.105014 rx_lastpass[0][0][5] = 0
4653 23:43:01.105603 rx_firspass[0][0][6] = 0
4654 23:43:01.108008 rx_lastpass[0][0][6] = 0
4655 23:43:01.111172 rx_firspass[0][0][7] = 0
4656 23:43:01.111819 rx_lastpass[0][0][7] = 0
4657 23:43:01.114690 rx_firspass[0][0][8] = 0
4658 23:43:01.118312 rx_lastpass[0][0][8] = 0
4659 23:43:01.118890 rx_firspass[0][0][9] = 0
4660 23:43:01.120995 rx_lastpass[0][0][9] = 0
4661 23:43:01.124383 rx_firspass[0][0][10] = 0
4662 23:43:01.128087 rx_lastpass[0][0][10] = 0
4663 23:43:01.128657 rx_firspass[0][0][11] = 0
4664 23:43:01.131054 rx_lastpass[0][0][11] = 0
4665 23:43:01.134623 rx_firspass[0][0][12] = 0
4666 23:43:01.135176 rx_lastpass[0][0][12] = 0
4667 23:43:01.137494 rx_firspass[0][0][13] = 0
4668 23:43:01.141210 rx_lastpass[0][0][13] = 0
4669 23:43:01.144408 rx_firspass[0][0][14] = 0
4670 23:43:01.145113 rx_lastpass[0][0][14] = 0
4671 23:43:01.147674 rx_firspass[0][0][15] = 0
4672 23:43:01.151162 rx_lastpass[0][0][15] = 0
4673 23:43:01.151674 rx_firspass[0][1][0] = 0
4674 23:43:01.154226 rx_lastpass[0][1][0] = 0
4675 23:43:01.157690 rx_firspass[0][1][1] = 0
4676 23:43:01.158248 rx_lastpass[0][1][1] = 0
4677 23:43:01.161787 rx_firspass[0][1][2] = 0
4678 23:43:01.164745 rx_lastpass[0][1][2] = 0
4679 23:43:01.165315 rx_firspass[0][1][3] = 0
4680 23:43:01.167524 rx_lastpass[0][1][3] = 0
4681 23:43:01.171063 rx_firspass[0][1][4] = 0
4682 23:43:01.174511 rx_lastpass[0][1][4] = 0
4683 23:43:01.174973 rx_firspass[0][1][5] = 0
4684 23:43:01.177629 rx_lastpass[0][1][5] = 0
4685 23:43:01.181104 rx_firspass[0][1][6] = 0
4686 23:43:01.181567 rx_lastpass[0][1][6] = 0
4687 23:43:01.184478 rx_firspass[0][1][7] = 0
4688 23:43:01.187625 rx_lastpass[0][1][7] = 0
4689 23:43:01.188048 rx_firspass[0][1][8] = 0
4690 23:43:01.191182 rx_lastpass[0][1][8] = 0
4691 23:43:01.194568 rx_firspass[0][1][9] = 0
4692 23:43:01.195090 rx_lastpass[0][1][9] = 0
4693 23:43:01.197619 rx_firspass[0][1][10] = 0
4694 23:43:01.201021 rx_lastpass[0][1][10] = 0
4695 23:43:01.204535 rx_firspass[0][1][11] = 0
4696 23:43:01.205058 rx_lastpass[0][1][11] = 0
4697 23:43:01.207703 rx_firspass[0][1][12] = 0
4698 23:43:01.211280 rx_lastpass[0][1][12] = 0
4699 23:43:01.211862 rx_firspass[0][1][13] = 0
4700 23:43:01.214238 rx_lastpass[0][1][13] = 0
4701 23:43:01.217711 rx_firspass[0][1][14] = 0
4702 23:43:01.220630 rx_lastpass[0][1][14] = 0
4703 23:43:01.221051 rx_firspass[0][1][15] = 0
4704 23:43:01.224046 rx_lastpass[0][1][15] = 0
4705 23:43:01.227982 rx_firspass[1][0][0] = 0
4706 23:43:01.228507 rx_lastpass[1][0][0] = 0
4707 23:43:01.231166 rx_firspass[1][0][1] = 0
4708 23:43:01.233984 rx_lastpass[1][0][1] = 0
4709 23:43:01.234404 rx_firspass[1][0][2] = 0
4710 23:43:01.237478 rx_lastpass[1][0][2] = 0
4711 23:43:01.241198 rx_firspass[1][0][3] = 0
4712 23:43:01.241797 rx_lastpass[1][0][3] = 0
4713 23:43:01.243883 rx_firspass[1][0][4] = 0
4714 23:43:01.247789 rx_lastpass[1][0][4] = 0
4715 23:43:01.250701 rx_firspass[1][0][5] = 0
4716 23:43:01.251192 rx_lastpass[1][0][5] = 0
4717 23:43:01.254140 rx_firspass[1][0][6] = 0
4718 23:43:01.257289 rx_lastpass[1][0][6] = 0
4719 23:43:01.257711 rx_firspass[1][0][7] = 0
4720 23:43:01.261212 rx_lastpass[1][0][7] = 0
4721 23:43:01.264302 rx_firspass[1][0][8] = 0
4722 23:43:01.264736 rx_lastpass[1][0][8] = 0
4723 23:43:01.267250 rx_firspass[1][0][9] = 0
4724 23:43:01.270478 rx_lastpass[1][0][9] = 0
4725 23:43:01.271031 rx_firspass[1][0][10] = 0
4726 23:43:01.273720 rx_lastpass[1][0][10] = 0
4727 23:43:01.277344 rx_firspass[1][0][11] = 0
4728 23:43:01.280328 rx_lastpass[1][0][11] = 0
4729 23:43:01.280748 rx_firspass[1][0][12] = 0
4730 23:43:01.283751 rx_lastpass[1][0][12] = 0
4731 23:43:01.287194 rx_firspass[1][0][13] = 0
4732 23:43:01.287678 rx_lastpass[1][0][13] = 0
4733 23:43:01.290332 rx_firspass[1][0][14] = 0
4734 23:43:01.294371 rx_lastpass[1][0][14] = 0
4735 23:43:01.297441 rx_firspass[1][0][15] = 0
4736 23:43:01.297866 rx_lastpass[1][0][15] = 0
4737 23:43:01.301092 rx_firspass[1][1][0] = 0
4738 23:43:01.304103 rx_lastpass[1][1][0] = 0
4739 23:43:01.304630 rx_firspass[1][1][1] = 0
4740 23:43:01.307482 rx_lastpass[1][1][1] = 0
4741 23:43:01.310449 rx_firspass[1][1][2] = 0
4742 23:43:01.311014 rx_lastpass[1][1][2] = 0
4743 23:43:01.313573 rx_firspass[1][1][3] = 0
4744 23:43:01.317262 rx_lastpass[1][1][3] = 0
4745 23:43:01.317780 rx_firspass[1][1][4] = 0
4746 23:43:01.320527 rx_lastpass[1][1][4] = 0
4747 23:43:01.324072 rx_firspass[1][1][5] = 0
4748 23:43:01.327086 rx_lastpass[1][1][5] = 0
4749 23:43:01.327627 rx_firspass[1][1][6] = 0
4750 23:43:01.330227 rx_lastpass[1][1][6] = 0
4751 23:43:01.334529 rx_firspass[1][1][7] = 0
4752 23:43:01.335052 rx_lastpass[1][1][7] = 0
4753 23:43:01.337330 rx_firspass[1][1][8] = 0
4754 23:43:01.340601 rx_lastpass[1][1][8] = 0
4755 23:43:01.341129 rx_firspass[1][1][9] = 0
4756 23:43:01.344100 rx_lastpass[1][1][9] = 0
4757 23:43:01.347358 rx_firspass[1][1][10] = 0
4758 23:43:01.347926 rx_lastpass[1][1][10] = 0
4759 23:43:01.350225 rx_firspass[1][1][11] = 0
4760 23:43:01.354064 rx_lastpass[1][1][11] = 0
4761 23:43:01.356923 rx_firspass[1][1][12] = 0
4762 23:43:01.357348 rx_lastpass[1][1][12] = 0
4763 23:43:01.360738 rx_firspass[1][1][13] = 0
4764 23:43:01.363761 rx_lastpass[1][1][13] = 0
4765 23:43:01.364184 rx_firspass[1][1][14] = 0
4766 23:43:01.367153 rx_lastpass[1][1][14] = 0
4767 23:43:01.370625 rx_firspass[1][1][15] = 0
4768 23:43:01.373721 rx_lastpass[1][1][15] = 0
4769 23:43:01.374146 dump params clk_delay
4770 23:43:01.377242 clk_delay[0] = 0
4771 23:43:01.377757 clk_delay[1] = 0
4772 23:43:01.380123 dump params dqs_delay
4773 23:43:01.380543 dqs_delay[0][0] = 0
4774 23:43:01.384060 dqs_delay[0][1] = 0
4775 23:43:01.384751 dqs_delay[1][0] = 0
4776 23:43:01.386926 dqs_delay[1][1] = 0
4777 23:43:01.390342 dump params delay_cell_unit = 735
4778 23:43:01.390763 dump source = 0x0
4779 23:43:01.393446 dump params frequency:800
4780 23:43:01.396839 dump params rank number:2
4781 23:43:01.397366
4782 23:43:01.397705 dump params write leveling
4783 23:43:01.400120 write leveling[0][0][0] = 0x0
4784 23:43:01.403615 write leveling[0][0][1] = 0x0
4785 23:43:01.407145 write leveling[0][1][0] = 0x0
4786 23:43:01.410249 write leveling[0][1][1] = 0x0
4787 23:43:01.413627 write leveling[1][0][0] = 0x0
4788 23:43:01.414151 write leveling[1][0][1] = 0x0
4789 23:43:01.417147 write leveling[1][1][0] = 0x0
4790 23:43:01.420253 write leveling[1][1][1] = 0x0
4791 23:43:01.420772 dump params cbt_cs
4792 23:43:01.423865 cbt_cs[0][0] = 0x0
4793 23:43:01.424397 cbt_cs[0][1] = 0x0
4794 23:43:01.426811 cbt_cs[1][0] = 0x0
4795 23:43:01.427229 cbt_cs[1][1] = 0x0
4796 23:43:01.430199 dump params cbt_mr12
4797 23:43:01.433903 cbt_mr12[0][0] = 0x0
4798 23:43:01.434426 cbt_mr12[0][1] = 0x0
4799 23:43:01.437326 cbt_mr12[1][0] = 0x0
4800 23:43:01.437860 cbt_mr12[1][1] = 0x0
4801 23:43:01.440633 dump params tx window
4802 23:43:01.444041 tx_center_min[0][0][0] = 0
4803 23:43:01.444572 tx_center_max[0][0][0] = 0
4804 23:43:01.446602 tx_center_min[0][0][1] = 0
4805 23:43:01.449992 tx_center_max[0][0][1] = 0
4806 23:43:01.453612 tx_center_min[0][1][0] = 0
4807 23:43:01.454143 tx_center_max[0][1][0] = 0
4808 23:43:01.456580 tx_center_min[0][1][1] = 0
4809 23:43:01.459959 tx_center_max[0][1][1] = 0
4810 23:43:01.463640 tx_center_min[1][0][0] = 0
4811 23:43:01.464163 tx_center_max[1][0][0] = 0
4812 23:43:01.466702 tx_center_min[1][0][1] = 0
4813 23:43:01.470047 tx_center_max[1][0][1] = 0
4814 23:43:01.473599 tx_center_min[1][1][0] = 0
4815 23:43:01.474021 tx_center_max[1][1][0] = 0
4816 23:43:01.476288 tx_center_min[1][1][1] = 0
4817 23:43:01.479764 tx_center_max[1][1][1] = 0
4818 23:43:01.480303 dump params tx window
4819 23:43:01.482797 tx_win_center[0][0][0] = 0
4820 23:43:01.486017 tx_first_pass[0][0][0] = 0
4821 23:43:01.489665 tx_last_pass[0][0][0] = 0
4822 23:43:01.490086 tx_win_center[0][0][1] = 0
4823 23:43:01.493005 tx_first_pass[0][0][1] = 0
4824 23:43:01.496427 tx_last_pass[0][0][1] = 0
4825 23:43:01.499720 tx_win_center[0][0][2] = 0
4826 23:43:01.500176 tx_first_pass[0][0][2] = 0
4827 23:43:01.502611 tx_last_pass[0][0][2] = 0
4828 23:43:01.506330 tx_win_center[0][0][3] = 0
4829 23:43:01.506750 tx_first_pass[0][0][3] = 0
4830 23:43:01.509599 tx_last_pass[0][0][3] = 0
4831 23:43:01.513616 tx_win_center[0][0][4] = 0
4832 23:43:01.516345 tx_first_pass[0][0][4] = 0
4833 23:43:01.516880 tx_last_pass[0][0][4] = 0
4834 23:43:01.519792 tx_win_center[0][0][5] = 0
4835 23:43:01.522821 tx_first_pass[0][0][5] = 0
4836 23:43:01.526429 tx_last_pass[0][0][5] = 0
4837 23:43:01.526957 tx_win_center[0][0][6] = 0
4838 23:43:01.529657 tx_first_pass[0][0][6] = 0
4839 23:43:01.533151 tx_last_pass[0][0][6] = 0
4840 23:43:01.533674 tx_win_center[0][0][7] = 0
4841 23:43:01.536551 tx_first_pass[0][0][7] = 0
4842 23:43:01.539957 tx_last_pass[0][0][7] = 0
4843 23:43:01.542935 tx_win_center[0][0][8] = 0
4844 23:43:01.543511 tx_first_pass[0][0][8] = 0
4845 23:43:01.546060 tx_last_pass[0][0][8] = 0
4846 23:43:01.550032 tx_win_center[0][0][9] = 0
4847 23:43:01.550701 tx_first_pass[0][0][9] = 0
4848 23:43:01.553242 tx_last_pass[0][0][9] = 0
4849 23:43:01.556347 tx_win_center[0][0][10] = 0
4850 23:43:01.560007 tx_first_pass[0][0][10] = 0
4851 23:43:01.560531 tx_last_pass[0][0][10] = 0
4852 23:43:01.563221 tx_win_center[0][0][11] = 0
4853 23:43:01.566646 tx_first_pass[0][0][11] = 0
4854 23:43:01.569856 tx_last_pass[0][0][11] = 0
4855 23:43:01.570399 tx_win_center[0][0][12] = 0
4856 23:43:01.572737 tx_first_pass[0][0][12] = 0
4857 23:43:01.576008 tx_last_pass[0][0][12] = 0
4858 23:43:01.579723 tx_win_center[0][0][13] = 0
4859 23:43:01.582584 tx_first_pass[0][0][13] = 0
4860 23:43:01.583005 tx_last_pass[0][0][13] = 0
4861 23:43:01.585827 tx_win_center[0][0][14] = 0
4862 23:43:01.589545 tx_first_pass[0][0][14] = 0
4863 23:43:01.589965 tx_last_pass[0][0][14] = 0
4864 23:43:01.592607 tx_win_center[0][0][15] = 0
4865 23:43:01.596543 tx_first_pass[0][0][15] = 0
4866 23:43:01.599638 tx_last_pass[0][0][15] = 0
4867 23:43:01.600061 tx_win_center[0][1][0] = 0
4868 23:43:01.602592 tx_first_pass[0][1][0] = 0
4869 23:43:01.606376 tx_last_pass[0][1][0] = 0
4870 23:43:01.609335 tx_win_center[0][1][1] = 0
4871 23:43:01.609861 tx_first_pass[0][1][1] = 0
4872 23:43:01.612776 tx_last_pass[0][1][1] = 0
4873 23:43:01.615977 tx_win_center[0][1][2] = 0
4874 23:43:01.619312 tx_first_pass[0][1][2] = 0
4875 23:43:01.619803 tx_last_pass[0][1][2] = 0
4876 23:43:01.622389 tx_win_center[0][1][3] = 0
4877 23:43:01.626050 tx_first_pass[0][1][3] = 0
4878 23:43:01.626468 tx_last_pass[0][1][3] = 0
4879 23:43:01.629511 tx_win_center[0][1][4] = 0
4880 23:43:01.632685 tx_first_pass[0][1][4] = 0
4881 23:43:01.636077 tx_last_pass[0][1][4] = 0
4882 23:43:01.636500 tx_win_center[0][1][5] = 0
4883 23:43:01.639214 tx_first_pass[0][1][5] = 0
4884 23:43:01.643091 tx_last_pass[0][1][5] = 0
4885 23:43:01.646299 tx_win_center[0][1][6] = 0
4886 23:43:01.646719 tx_first_pass[0][1][6] = 0
4887 23:43:01.649938 tx_last_pass[0][1][6] = 0
4888 23:43:01.653243 tx_win_center[0][1][7] = 0
4889 23:43:01.653768 tx_first_pass[0][1][7] = 0
4890 23:43:01.655797 tx_last_pass[0][1][7] = 0
4891 23:43:01.659440 tx_win_center[0][1][8] = 0
4892 23:43:01.662935 tx_first_pass[0][1][8] = 0
4893 23:43:01.663514 tx_last_pass[0][1][8] = 0
4894 23:43:01.666015 tx_win_center[0][1][9] = 0
4895 23:43:01.669343 tx_first_pass[0][1][9] = 0
4896 23:43:01.672583 tx_last_pass[0][1][9] = 0
4897 23:43:01.673004 tx_win_center[0][1][10] = 0
4898 23:43:01.675990 tx_first_pass[0][1][10] = 0
4899 23:43:01.679127 tx_last_pass[0][1][10] = 0
4900 23:43:01.679578 tx_win_center[0][1][11] = 0
4901 23:43:01.683189 tx_first_pass[0][1][11] = 0
4902 23:43:01.686003 tx_last_pass[0][1][11] = 0
4903 23:43:01.689473 tx_win_center[0][1][12] = 0
4904 23:43:01.692827 tx_first_pass[0][1][12] = 0
4905 23:43:01.693249 tx_last_pass[0][1][12] = 0
4906 23:43:01.696120 tx_win_center[0][1][13] = 0
4907 23:43:01.699881 tx_first_pass[0][1][13] = 0
4908 23:43:01.702631 tx_last_pass[0][1][13] = 0
4909 23:43:01.703160 tx_win_center[0][1][14] = 0
4910 23:43:01.706530 tx_first_pass[0][1][14] = 0
4911 23:43:01.709304 tx_last_pass[0][1][14] = 0
4912 23:43:01.712718 tx_win_center[0][1][15] = 0
4913 23:43:01.713247 tx_first_pass[0][1][15] = 0
4914 23:43:01.715763 tx_last_pass[0][1][15] = 0
4915 23:43:01.719529 tx_win_center[1][0][0] = 0
4916 23:43:01.720089 tx_first_pass[1][0][0] = 0
4917 23:43:01.722908 tx_last_pass[1][0][0] = 0
4918 23:43:01.726148 tx_win_center[1][0][1] = 0
4919 23:43:01.729481 tx_first_pass[1][0][1] = 0
4920 23:43:01.729902 tx_last_pass[1][0][1] = 0
4921 23:43:01.732754 tx_win_center[1][0][2] = 0
4922 23:43:01.736076 tx_first_pass[1][0][2] = 0
4923 23:43:01.739332 tx_last_pass[1][0][2] = 0
4924 23:43:01.739794 tx_win_center[1][0][3] = 0
4925 23:43:01.742419 tx_first_pass[1][0][3] = 0
4926 23:43:01.746122 tx_last_pass[1][0][3] = 0
4927 23:43:01.746542 tx_win_center[1][0][4] = 0
4928 23:43:01.749356 tx_first_pass[1][0][4] = 0
4929 23:43:01.752512 tx_last_pass[1][0][4] = 0
4930 23:43:01.755964 tx_win_center[1][0][5] = 0
4931 23:43:01.756409 tx_first_pass[1][0][5] = 0
4932 23:43:01.758906 tx_last_pass[1][0][5] = 0
4933 23:43:01.762416 tx_win_center[1][0][6] = 0
4934 23:43:01.765846 tx_first_pass[1][0][6] = 0
4935 23:43:01.766308 tx_last_pass[1][0][6] = 0
4936 23:43:01.769251 tx_win_center[1][0][7] = 0
4937 23:43:01.772640 tx_first_pass[1][0][7] = 0
4938 23:43:01.773075 tx_last_pass[1][0][7] = 0
4939 23:43:01.775969 tx_win_center[1][0][8] = 0
4940 23:43:01.779124 tx_first_pass[1][0][8] = 0
4941 23:43:01.782469 tx_last_pass[1][0][8] = 0
4942 23:43:01.782706 tx_win_center[1][0][9] = 0
4943 23:43:01.785712 tx_first_pass[1][0][9] = 0
4944 23:43:01.788889 tx_last_pass[1][0][9] = 0
4945 23:43:01.792292 tx_win_center[1][0][10] = 0
4946 23:43:01.792470 tx_first_pass[1][0][10] = 0
4947 23:43:01.795549 tx_last_pass[1][0][10] = 0
4948 23:43:01.798655 tx_win_center[1][0][11] = 0
4949 23:43:01.802117 tx_first_pass[1][0][11] = 0
4950 23:43:01.802271 tx_last_pass[1][0][11] = 0
4951 23:43:01.805270 tx_win_center[1][0][12] = 0
4952 23:43:01.808549 tx_first_pass[1][0][12] = 0
4953 23:43:01.811865 tx_last_pass[1][0][12] = 0
4954 23:43:01.811973 tx_win_center[1][0][13] = 0
4955 23:43:01.815756 tx_first_pass[1][0][13] = 0
4956 23:43:01.819157 tx_last_pass[1][0][13] = 0
4957 23:43:01.821986 tx_win_center[1][0][14] = 0
4958 23:43:01.822078 tx_first_pass[1][0][14] = 0
4959 23:43:01.825517 tx_last_pass[1][0][14] = 0
4960 23:43:01.829048 tx_win_center[1][0][15] = 0
4961 23:43:01.832320 tx_first_pass[1][0][15] = 0
4962 23:43:01.832475 tx_last_pass[1][0][15] = 0
4963 23:43:01.835689 tx_win_center[1][1][0] = 0
4964 23:43:01.838595 tx_first_pass[1][1][0] = 0
4965 23:43:01.838744 tx_last_pass[1][1][0] = 0
4966 23:43:01.842261 tx_win_center[1][1][1] = 0
4967 23:43:01.845529 tx_first_pass[1][1][1] = 0
4968 23:43:01.848909 tx_last_pass[1][1][1] = 0
4969 23:43:01.849096 tx_win_center[1][1][2] = 0
4970 23:43:01.851642 tx_first_pass[1][1][2] = 0
4971 23:43:01.854935 tx_last_pass[1][1][2] = 0
4972 23:43:01.858641 tx_win_center[1][1][3] = 0
4973 23:43:01.858859 tx_first_pass[1][1][3] = 0
4974 23:43:01.862467 tx_last_pass[1][1][3] = 0
4975 23:43:01.865317 tx_win_center[1][1][4] = 0
4976 23:43:01.868620 tx_first_pass[1][1][4] = 0
4977 23:43:01.868851 tx_last_pass[1][1][4] = 0
4978 23:43:01.871868 tx_win_center[1][1][5] = 0
4979 23:43:01.874924 tx_first_pass[1][1][5] = 0
4980 23:43:01.875124 tx_last_pass[1][1][5] = 0
4981 23:43:01.878488 tx_win_center[1][1][6] = 0
4982 23:43:01.882308 tx_first_pass[1][1][6] = 0
4983 23:43:01.884887 tx_last_pass[1][1][6] = 0
4984 23:43:01.885209 tx_win_center[1][1][7] = 0
4985 23:43:01.888500 tx_first_pass[1][1][7] = 0
4986 23:43:01.892034 tx_last_pass[1][1][7] = 0
4987 23:43:01.892514 tx_win_center[1][1][8] = 0
4988 23:43:01.895056 tx_first_pass[1][1][8] = 0
4989 23:43:01.898872 tx_last_pass[1][1][8] = 0
4990 23:43:01.901866 tx_win_center[1][1][9] = 0
4991 23:43:01.902331 tx_first_pass[1][1][9] = 0
4992 23:43:01.905022 tx_last_pass[1][1][9] = 0
4993 23:43:01.908526 tx_win_center[1][1][10] = 0
4994 23:43:01.911595 tx_first_pass[1][1][10] = 0
4995 23:43:01.912063 tx_last_pass[1][1][10] = 0
4996 23:43:01.915224 tx_win_center[1][1][11] = 0
4997 23:43:01.918743 tx_first_pass[1][1][11] = 0
4998 23:43:01.921534 tx_last_pass[1][1][11] = 0
4999 23:43:01.921959 tx_win_center[1][1][12] = 0
5000 23:43:01.924978 tx_first_pass[1][1][12] = 0
5001 23:43:01.928400 tx_last_pass[1][1][12] = 0
5002 23:43:01.931557 tx_win_center[1][1][13] = 0
5003 23:43:01.931981 tx_first_pass[1][1][13] = 0
5004 23:43:01.935205 tx_last_pass[1][1][13] = 0
5005 23:43:01.938887 tx_win_center[1][1][14] = 0
5006 23:43:01.942005 tx_first_pass[1][1][14] = 0
5007 23:43:01.942426 tx_last_pass[1][1][14] = 0
5008 23:43:01.944952 tx_win_center[1][1][15] = 0
5009 23:43:01.948394 tx_first_pass[1][1][15] = 0
5010 23:43:01.951568 tx_last_pass[1][1][15] = 0
5011 23:43:01.951886 dump params rx window
5012 23:43:01.954958 rx_firspass[0][0][0] = 0
5013 23:43:01.958400 rx_lastpass[0][0][0] = 0
5014 23:43:01.958552 rx_firspass[0][0][1] = 0
5015 23:43:01.961586 rx_lastpass[0][0][1] = 0
5016 23:43:01.964770 rx_firspass[0][0][2] = 0
5017 23:43:01.964901 rx_lastpass[0][0][2] = 0
5018 23:43:01.968184 rx_firspass[0][0][3] = 0
5019 23:43:01.971357 rx_lastpass[0][0][3] = 0
5020 23:43:01.971481 rx_firspass[0][0][4] = 0
5021 23:43:01.974488 rx_lastpass[0][0][4] = 0
5022 23:43:01.978300 rx_firspass[0][0][5] = 0
5023 23:43:01.978408 rx_lastpass[0][0][5] = 0
5024 23:43:01.981223 rx_firspass[0][0][6] = 0
5025 23:43:01.984764 rx_lastpass[0][0][6] = 0
5026 23:43:01.988274 rx_firspass[0][0][7] = 0
5027 23:43:01.988365 rx_lastpass[0][0][7] = 0
5028 23:43:01.991547 rx_firspass[0][0][8] = 0
5029 23:43:01.995137 rx_lastpass[0][0][8] = 0
5030 23:43:01.995300 rx_firspass[0][0][9] = 0
5031 23:43:01.998660 rx_lastpass[0][0][9] = 0
5032 23:43:02.001698 rx_firspass[0][0][10] = 0
5033 23:43:02.001835 rx_lastpass[0][0][10] = 0
5034 23:43:02.005147 rx_firspass[0][0][11] = 0
5035 23:43:02.008807 rx_lastpass[0][0][11] = 0
5036 23:43:02.008963 rx_firspass[0][0][12] = 0
5037 23:43:02.011707 rx_lastpass[0][0][12] = 0
5038 23:43:02.014926 rx_firspass[0][0][13] = 0
5039 23:43:02.018417 rx_lastpass[0][0][13] = 0
5040 23:43:02.018619 rx_firspass[0][0][14] = 0
5041 23:43:02.021236 rx_lastpass[0][0][14] = 0
5042 23:43:02.025049 rx_firspass[0][0][15] = 0
5043 23:43:02.028568 rx_lastpass[0][0][15] = 0
5044 23:43:02.028783 rx_firspass[0][1][0] = 0
5045 23:43:02.031441 rx_lastpass[0][1][0] = 0
5046 23:43:02.034598 rx_firspass[0][1][1] = 0
5047 23:43:02.034763 rx_lastpass[0][1][1] = 0
5048 23:43:02.037969 rx_firspass[0][1][2] = 0
5049 23:43:02.041343 rx_lastpass[0][1][2] = 0
5050 23:43:02.041534 rx_firspass[0][1][3] = 0
5051 23:43:02.044471 rx_lastpass[0][1][3] = 0
5052 23:43:02.047945 rx_firspass[0][1][4] = 0
5053 23:43:02.048207 rx_lastpass[0][1][4] = 0
5054 23:43:02.051501 rx_firspass[0][1][5] = 0
5055 23:43:02.054966 rx_lastpass[0][1][5] = 0
5056 23:43:02.055449 rx_firspass[0][1][6] = 0
5057 23:43:02.058328 rx_lastpass[0][1][6] = 0
5058 23:43:02.061921 rx_firspass[0][1][7] = 0
5059 23:43:02.065081 rx_lastpass[0][1][7] = 0
5060 23:43:02.065502 rx_firspass[0][1][8] = 0
5061 23:43:02.068341 rx_lastpass[0][1][8] = 0
5062 23:43:02.071834 rx_firspass[0][1][9] = 0
5063 23:43:02.072345 rx_lastpass[0][1][9] = 0
5064 23:43:02.075068 rx_firspass[0][1][10] = 0
5065 23:43:02.077706 rx_lastpass[0][1][10] = 0
5066 23:43:02.078125 rx_firspass[0][1][11] = 0
5067 23:43:02.081398 rx_lastpass[0][1][11] = 0
5068 23:43:02.084959 rx_firspass[0][1][12] = 0
5069 23:43:02.088276 rx_lastpass[0][1][12] = 0
5070 23:43:02.088695 rx_firspass[0][1][13] = 0
5071 23:43:02.091301 rx_lastpass[0][1][13] = 0
5072 23:43:02.094381 rx_firspass[0][1][14] = 0
5073 23:43:02.094800 rx_lastpass[0][1][14] = 0
5074 23:43:02.098214 rx_firspass[0][1][15] = 0
5075 23:43:02.101211 rx_lastpass[0][1][15] = 0
5076 23:43:02.104371 rx_firspass[1][0][0] = 0
5077 23:43:02.104797 rx_lastpass[1][0][0] = 0
5078 23:43:02.108083 rx_firspass[1][0][1] = 0
5079 23:43:02.111386 rx_lastpass[1][0][1] = 0
5080 23:43:02.111846 rx_firspass[1][0][2] = 0
5081 23:43:02.115022 rx_lastpass[1][0][2] = 0
5082 23:43:02.117964 rx_firspass[1][0][3] = 0
5083 23:43:02.118475 rx_lastpass[1][0][3] = 0
5084 23:43:02.121273 rx_firspass[1][0][4] = 0
5085 23:43:02.124506 rx_lastpass[1][0][4] = 0
5086 23:43:02.124927 rx_firspass[1][0][5] = 0
5087 23:43:02.128081 rx_lastpass[1][0][5] = 0
5088 23:43:02.131202 rx_firspass[1][0][6] = 0
5089 23:43:02.131661 rx_lastpass[1][0][6] = 0
5090 23:43:02.134567 rx_firspass[1][0][7] = 0
5091 23:43:02.138610 rx_lastpass[1][0][7] = 0
5092 23:43:02.141027 rx_firspass[1][0][8] = 0
5093 23:43:02.141541 rx_lastpass[1][0][8] = 0
5094 23:43:02.144130 rx_firspass[1][0][9] = 0
5095 23:43:02.147587 rx_lastpass[1][0][9] = 0
5096 23:43:02.148010 rx_firspass[1][0][10] = 0
5097 23:43:02.151107 rx_lastpass[1][0][10] = 0
5098 23:43:02.154058 rx_firspass[1][0][11] = 0
5099 23:43:02.154480 rx_lastpass[1][0][11] = 0
5100 23:43:02.158094 rx_firspass[1][0][12] = 0
5101 23:43:02.161178 rx_lastpass[1][0][12] = 0
5102 23:43:02.164365 rx_firspass[1][0][13] = 0
5103 23:43:02.164790 rx_lastpass[1][0][13] = 0
5104 23:43:02.167952 rx_firspass[1][0][14] = 0
5105 23:43:02.170945 rx_lastpass[1][0][14] = 0
5106 23:43:02.171366 rx_firspass[1][0][15] = 0
5107 23:43:02.174112 rx_lastpass[1][0][15] = 0
5108 23:43:02.178231 rx_firspass[1][1][0] = 0
5109 23:43:02.180861 rx_lastpass[1][1][0] = 0
5110 23:43:02.181282 rx_firspass[1][1][1] = 0
5111 23:43:02.184922 rx_lastpass[1][1][1] = 0
5112 23:43:02.187461 rx_firspass[1][1][2] = 0
5113 23:43:02.187893 rx_lastpass[1][1][2] = 0
5114 23:43:02.191079 rx_firspass[1][1][3] = 0
5115 23:43:02.194346 rx_lastpass[1][1][3] = 0
5116 23:43:02.194867 rx_firspass[1][1][4] = 0
5117 23:43:02.197797 rx_lastpass[1][1][4] = 0
5118 23:43:02.200651 rx_firspass[1][1][5] = 0
5119 23:43:02.201072 rx_lastpass[1][1][5] = 0
5120 23:43:02.203857 rx_firspass[1][1][6] = 0
5121 23:43:02.207560 rx_lastpass[1][1][6] = 0
5122 23:43:02.207982 rx_firspass[1][1][7] = 0
5123 23:43:02.210628 rx_lastpass[1][1][7] = 0
5124 23:43:02.214448 rx_firspass[1][1][8] = 0
5125 23:43:02.217274 rx_lastpass[1][1][8] = 0
5126 23:43:02.217789 rx_firspass[1][1][9] = 0
5127 23:43:02.220527 rx_lastpass[1][1][9] = 0
5128 23:43:02.224276 rx_firspass[1][1][10] = 0
5129 23:43:02.224794 rx_lastpass[1][1][10] = 0
5130 23:43:02.227428 rx_firspass[1][1][11] = 0
5131 23:43:02.231278 rx_lastpass[1][1][11] = 0
5132 23:43:02.233980 rx_firspass[1][1][12] = 0
5133 23:43:02.234630 rx_lastpass[1][1][12] = 0
5134 23:43:02.237306 rx_firspass[1][1][13] = 0
5135 23:43:02.240639 rx_lastpass[1][1][13] = 0
5136 23:43:02.241059 rx_firspass[1][1][14] = 0
5137 23:43:02.244257 rx_lastpass[1][1][14] = 0
5138 23:43:02.247464 rx_firspass[1][1][15] = 0
5139 23:43:02.247972 rx_lastpass[1][1][15] = 0
5140 23:43:02.251178 dump params clk_delay
5141 23:43:02.253794 clk_delay[0] = 0
5142 23:43:02.254219 clk_delay[1] = 0
5143 23:43:02.257686 dump params dqs_delay
5144 23:43:02.258104 dqs_delay[0][0] = 0
5145 23:43:02.260544 dqs_delay[0][1] = 0
5146 23:43:02.260963 dqs_delay[1][0] = 0
5147 23:43:02.263912 dqs_delay[1][1] = 0
5148 23:43:02.267782 dump params delay_cell_unit = 735
5149 23:43:02.268358 mt_set_emi_preloader end
5150 23:43:02.274314 [mt_mem_init] dram size: 0x100000000, rank number: 2
5151 23:43:02.277611 [complex_mem_test] start addr:0x40000000, len:20480
5152 23:43:02.314652 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5153 23:43:02.320966 [complex_mem_test] start addr:0x80000000, len:20480
5154 23:43:02.357056 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5155 23:43:02.363845 [complex_mem_test] start addr:0xc0000000, len:20480
5156 23:43:02.399510 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5157 23:43:02.405864 [complex_mem_test] start addr:0x56000000, len:8192
5158 23:43:02.422963 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5159 23:43:02.423588 ddr_geometry:1
5160 23:43:02.428912 [complex_mem_test] start addr:0x80000000, len:8192
5161 23:43:02.446545 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5162 23:43:02.449781 dram_init: dram init end (result: 0)
5163 23:43:02.456264 Successfully loaded DRAM blobs and ran DRAM calibration
5164 23:43:02.466263 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5165 23:43:02.466844 CBMEM:
5166 23:43:02.469404 IMD: root @ 00000000fffff000 254 entries.
5167 23:43:02.472855 IMD: root @ 00000000ffffec00 62 entries.
5168 23:43:02.479532 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5169 23:43:02.486341 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5170 23:43:02.489070 in-header: 03 a1 00 00 08 00 00 00
5171 23:43:02.492567 in-data: 84 60 60 10 00 00 00 00
5172 23:43:02.495669 Chrome EC: clear events_b mask to 0x0000000020004000
5173 23:43:02.503212 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5174 23:43:02.506702 in-header: 03 fd 00 00 00 00 00 00
5175 23:43:02.507121 in-data:
5176 23:43:02.513587 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5177 23:43:02.514122 CBFS @ 21000 size 3d4000
5178 23:43:02.519859 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5179 23:43:02.523013 CBFS: Locating 'fallback/ramstage'
5180 23:43:02.526566 CBFS: Found @ offset 10d40 size d563
5181 23:43:02.548085 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5182 23:43:02.559856 Accumulated console time in romstage 13613 ms
5183 23:43:02.560408
5184 23:43:02.560775
5185 23:43:02.570339 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5186 23:43:02.573180 ARM64: Exception handlers installed.
5187 23:43:02.573650 ARM64: Testing exception
5188 23:43:02.576773 ARM64: Done test exception
5189 23:43:02.579865 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5190 23:43:02.583022 Manufacturer: ef
5191 23:43:02.587064 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5192 23:43:02.593753 WARNING: RO_VPD is uninitialized or empty.
5193 23:43:02.596765 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5194 23:43:02.600257 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5195 23:43:02.609667 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5196 23:43:02.613324 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5197 23:43:02.619680 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5198 23:43:02.620244 Enumerating buses...
5199 23:43:02.626650 Show all devs... Before device enumeration.
5200 23:43:02.627211 Root Device: enabled 1
5201 23:43:02.629776 CPU_CLUSTER: 0: enabled 1
5202 23:43:02.630345 CPU: 00: enabled 1
5203 23:43:02.633093 Compare with tree...
5204 23:43:02.636075 Root Device: enabled 1
5205 23:43:02.636510 CPU_CLUSTER: 0: enabled 1
5206 23:43:02.639391 CPU: 00: enabled 1
5207 23:43:02.642687 Root Device scanning...
5208 23:43:02.643106 root_dev_scan_bus for Root Device
5209 23:43:02.646126 CPU_CLUSTER: 0 enabled
5210 23:43:02.649645 root_dev_scan_bus for Root Device done
5211 23:43:02.655866 scan_bus: scanning of bus Root Device took 10689 usecs
5212 23:43:02.656391 done
5213 23:43:02.659718 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5214 23:43:02.663053 Allocating resources...
5215 23:43:02.663696 Reading resources...
5216 23:43:02.669714 Root Device read_resources bus 0 link: 0
5217 23:43:02.673047 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5218 23:43:02.675693 CPU: 00 missing read_resources
5219 23:43:02.679326 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5220 23:43:02.682499 Root Device read_resources bus 0 link: 0 done
5221 23:43:02.685901 Done reading resources.
5222 23:43:02.689050 Show resources in subtree (Root Device)...After reading.
5223 23:43:02.692348 Root Device child on link 0 CPU_CLUSTER: 0
5224 23:43:02.695707 CPU_CLUSTER: 0 child on link 0 CPU: 00
5225 23:43:02.706304 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5226 23:43:02.706876 CPU: 00
5227 23:43:02.709234 Setting resources...
5228 23:43:02.712720 Root Device assign_resources, bus 0 link: 0
5229 23:43:02.715672 CPU_CLUSTER: 0 missing set_resources
5230 23:43:02.719228 Root Device assign_resources, bus 0 link: 0
5231 23:43:02.722641 Done setting resources.
5232 23:43:02.729018 Show resources in subtree (Root Device)...After assigning values.
5233 23:43:02.732047 Root Device child on link 0 CPU_CLUSTER: 0
5234 23:43:02.735726 CPU_CLUSTER: 0 child on link 0 CPU: 00
5235 23:43:02.745837 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5236 23:43:02.746370 CPU: 00
5237 23:43:02.748346 Done allocating resources.
5238 23:43:02.752264 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5239 23:43:02.755398 Enabling resources...
5240 23:43:02.755856 done.
5241 23:43:02.758984 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5242 23:43:02.762268 Initializing devices...
5243 23:43:02.765625 Root Device init ...
5244 23:43:02.768136 mainboard_init: Starting display init.
5245 23:43:02.768570 ADC[4]: Raw value=76102 ID=0
5246 23:43:02.792444 anx7625_power_on_init: Init interface.
5247 23:43:02.796126 anx7625_disable_pd_protocol: Disabled PD feature.
5248 23:43:02.802989 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5249 23:43:02.849322 anx7625_start_dp_work: Secure OCM version=00
5250 23:43:02.852671 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5251 23:43:02.869759 sp_tx_get_edid_block: EDID Block = 1
5252 23:43:02.986922 Extracted contents:
5253 23:43:02.989864 header: 00 ff ff ff ff ff ff 00
5254 23:43:02.993996 serial number: 06 af 5c 14 00 00 00 00 00 1a
5255 23:43:02.996781 version: 01 04
5256 23:43:02.999796 basic params: 95 1a 0e 78 02
5257 23:43:03.003730 chroma info: 99 85 95 55 56 92 28 22 50 54
5258 23:43:03.006954 established: 00 00 00
5259 23:43:03.013409 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5260 23:43:03.017270 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5261 23:43:03.023705 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5262 23:43:03.030585 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5263 23:43:03.036901 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5264 23:43:03.040441 extensions: 00
5265 23:43:03.040859 checksum: ae
5266 23:43:03.041192
5267 23:43:03.043592 Manufacturer: AUO Model 145c Serial Number 0
5268 23:43:03.047228 Made week 0 of 2016
5269 23:43:03.047686 EDID version: 1.4
5270 23:43:03.050304 Digital display
5271 23:43:03.053797 6 bits per primary color channel
5272 23:43:03.054224 DisplayPort interface
5273 23:43:03.056862 Maximum image size: 26 cm x 14 cm
5274 23:43:03.057283 Gamma: 220%
5275 23:43:03.060599 Check DPMS levels
5276 23:43:03.064084 Supported color formats: RGB 4:4:4
5277 23:43:03.067338 First detailed timing is preferred timing
5278 23:43:03.070724 Established timings supported:
5279 23:43:03.073869 Standard timings supported:
5280 23:43:03.074287 Detailed timings
5281 23:43:03.077123 Hex of detail: ce1d56ea50001a3030204600009010000018
5282 23:43:03.084031 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5283 23:43:03.087399 0556 0586 05a6 0640 hborder 0
5284 23:43:03.090723 0300 0304 030a 031a vborder 0
5285 23:43:03.094081 -hsync -vsync
5286 23:43:03.096904 Did detailed timing
5287 23:43:03.100395 Hex of detail: 0000000f0000000000000000000000000020
5288 23:43:03.103937 Manufacturer-specified data, tag 15
5289 23:43:03.106878 Hex of detail: 000000fe0041554f0a202020202020202020
5290 23:43:03.110206 ASCII string: AUO
5291 23:43:03.113813 Hex of detail: 000000fe004231313658414230312e34200a
5292 23:43:03.116833 ASCII string: B116XAB01.4
5293 23:43:03.117359 Checksum
5294 23:43:03.120203 Checksum: 0xae (valid)
5295 23:43:03.123392 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5296 23:43:03.126883 DSI data_rate: 457800000 bps
5297 23:43:03.133401 anx7625_parse_edid: set default k value to 0x3d for panel
5298 23:43:03.137025 anx7625_parse_edid: pixelclock(76300).
5299 23:43:03.140309 hactive(1366), hsync(32), hfp(48), hbp(154)
5300 23:43:03.143530 vactive(768), vsync(6), vfp(4), vbp(16)
5301 23:43:03.147146 anx7625_dsi_config: config dsi.
5302 23:43:03.155017 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5303 23:43:03.176248 anx7625_dsi_config: success to config DSI
5304 23:43:03.179175 anx7625_dp_start: MIPI phy setup OK.
5305 23:43:03.182918 [SSUSB] Setting up USB HOST controller...
5306 23:43:03.186160 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5307 23:43:03.189172 [SSUSB] phy power-on done.
5308 23:43:03.193112 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5309 23:43:03.197001 in-header: 03 fc 01 00 00 00 00 00
5310 23:43:03.197413 in-data:
5311 23:43:03.200200 handle_proto3_response: EC response with error code: 1
5312 23:43:03.203221 SPM: pcm index = 1
5313 23:43:03.206939 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5314 23:43:03.210052 CBFS @ 21000 size 3d4000
5315 23:43:03.216556 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5316 23:43:03.220258 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5317 23:43:03.223343 CBFS: Found @ offset 1e7c0 size 1026
5318 23:43:03.230124 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5319 23:43:03.233364 SPM: binary array size = 2988
5320 23:43:03.236970 SPM: version = pcm_allinone_v1.17.2_20180829
5321 23:43:03.240096 SPM binary loaded in 32 msecs
5322 23:43:03.247803 spm_kick_im_to_fetch: ptr = 000000004021eec2
5323 23:43:03.250917 spm_kick_im_to_fetch: len = 2988
5324 23:43:03.251343 SPM: spm_kick_pcm_to_run
5325 23:43:03.254221 SPM: spm_kick_pcm_to_run done
5326 23:43:03.257325 SPM: spm_init done in 52 msecs
5327 23:43:03.260573 Root Device init finished in 494982 usecs
5328 23:43:03.263916 CPU_CLUSTER: 0 init ...
5329 23:43:03.270633 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5330 23:43:03.277525 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5331 23:43:03.280542 CBFS @ 21000 size 3d4000
5332 23:43:03.284315 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5333 23:43:03.287654 CBFS: Locating 'sspm.bin'
5334 23:43:03.290823 CBFS: Found @ offset 208c0 size 41cb
5335 23:43:03.300173 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5336 23:43:03.308379 CPU_CLUSTER: 0 init finished in 42799 usecs
5337 23:43:03.308873 Devices initialized
5338 23:43:03.311578 Show all devs... After init.
5339 23:43:03.315318 Root Device: enabled 1
5340 23:43:03.315877 CPU_CLUSTER: 0: enabled 1
5341 23:43:03.318508 CPU: 00: enabled 1
5342 23:43:03.321692 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5343 23:43:03.325005 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5344 23:43:03.328562 ELOG: NV offset 0x558000 size 0x1000
5345 23:43:03.336005 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5346 23:43:03.342895 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5347 23:43:03.346100 ELOG: Event(17) added with size 13 at 2024-06-04 23:42:06 UTC
5348 23:43:03.349011 out: cmd=0x121: 03 db 21 01 00 00 00 00
5349 23:43:03.353166 in-header: 03 94 00 00 2c 00 00 00
5350 23:43:03.365880 in-data: 6c 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 cb e4 03 00 06 80 00 00 8d 36 21 00 06 80 00 00 bb 96 07 00 06 80 00 00 37 d4 63 00
5351 23:43:03.369450 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5352 23:43:03.372636 in-header: 03 19 00 00 08 00 00 00
5353 23:43:03.375877 in-data: a2 e0 47 00 13 00 00 00
5354 23:43:03.378938 Chrome EC: UHEPI supported
5355 23:43:03.385956 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5356 23:43:03.388993 in-header: 03 e1 00 00 08 00 00 00
5357 23:43:03.392218 in-data: 84 20 60 10 00 00 00 00
5358 23:43:03.395828 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5359 23:43:03.402730 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5360 23:43:03.405524 in-header: 03 e1 00 00 08 00 00 00
5361 23:43:03.409114 in-data: 84 20 60 10 00 00 00 00
5362 23:43:03.415520 ELOG: Event(A1) added with size 10 at 2024-06-04 23:42:06 UTC
5363 23:43:03.422191 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5364 23:43:03.425660 ELOG: Event(A0) added with size 9 at 2024-06-04 23:42:06 UTC
5365 23:43:03.432464 elog_add_boot_reason: Logged dev mode boot
5366 23:43:03.432976 Finalize devices...
5367 23:43:03.435516 Devices finalized
5368 23:43:03.439287 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5369 23:43:03.445974 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5370 23:43:03.449186 ELOG: Event(91) added with size 10 at 2024-06-04 23:42:06 UTC
5371 23:43:03.452474 Writing coreboot table at 0xffeda000
5372 23:43:03.455941 0. 0000000000114000-000000000011efff: RAMSTAGE
5373 23:43:03.462530 1. 0000000040000000-000000004023cfff: RAMSTAGE
5374 23:43:03.465760 2. 000000004023d000-00000000545fffff: RAM
5375 23:43:03.468743 3. 0000000054600000-000000005465ffff: BL31
5376 23:43:03.472117 4. 0000000054660000-00000000ffed9fff: RAM
5377 23:43:03.478587 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5378 23:43:03.482362 6. 0000000100000000-000000013fffffff: RAM
5379 23:43:03.485553 Passing 5 GPIOs to payload:
5380 23:43:03.488703 NAME | PORT | POLARITY | VALUE
5381 23:43:03.491861 write protect | 0x00000096 | low | high
5382 23:43:03.502821 EC in RW | 0x000000b1 | high | undefined
5383 23:43:03.503343 EC interrupt | 0x00000097 | low | undefined
5384 23:43:03.508696 TPM interrupt | 0x00000099 | high | undefined
5385 23:43:03.512160 speaker enable | 0x000000af | high | undefined
5386 23:43:03.515065 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5387 23:43:03.518799 in-header: 03 f7 00 00 02 00 00 00
5388 23:43:03.521775 in-data: 04 00
5389 23:43:03.522240 Board ID: 4
5390 23:43:03.524944 ADC[3]: Raw value=215504 ID=1
5391 23:43:03.525363 RAM code: 1
5392 23:43:03.525696 SKU ID: 16
5393 23:43:03.532295 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5394 23:43:03.532823 CBFS @ 21000 size 3d4000
5395 23:43:03.538530 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5396 23:43:03.545497 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 834c
5397 23:43:03.548521 coreboot table: 940 bytes.
5398 23:43:03.551711 IMD ROOT 0. 00000000fffff000 00001000
5399 23:43:03.554737 IMD SMALL 1. 00000000ffffe000 00001000
5400 23:43:03.558063 CONSOLE 2. 00000000fffde000 00020000
5401 23:43:03.561353 FMAP 3. 00000000fffdd000 0000047c
5402 23:43:03.565052 TIME STAMP 4. 00000000fffdc000 00000910
5403 23:43:03.568299 RAMOOPS 5. 00000000ffedc000 00100000
5404 23:43:03.571521 COREBOOT 6. 00000000ffeda000 00002000
5405 23:43:03.574956 IMD small region:
5406 23:43:03.577888 IMD ROOT 0. 00000000ffffec00 00000400
5407 23:43:03.581706 VBOOT WORK 1. 00000000ffffeb00 00000100
5408 23:43:03.585086 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5409 23:43:03.588171 VPD 3. 00000000ffffea60 0000006c
5410 23:43:03.594845 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5411 23:43:03.601722 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5412 23:43:03.604793 in-header: 03 e1 00 00 08 00 00 00
5413 23:43:03.608217 in-data: 84 20 60 10 00 00 00 00
5414 23:43:03.611139 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5415 23:43:03.614391 CBFS @ 21000 size 3d4000
5416 23:43:03.617823 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5417 23:43:03.621083 CBFS: Locating 'fallback/payload'
5418 23:43:03.629960 CBFS: Found @ offset dc040 size 439a0
5419 23:43:03.717812 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5420 23:43:03.721114 Checking segment from ROM address 0x0000000040003a00
5421 23:43:03.727689 Checking segment from ROM address 0x0000000040003a1c
5422 23:43:03.731393 Loading segment from ROM address 0x0000000040003a00
5423 23:43:03.734368 code (compression=0)
5424 23:43:03.744498 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5425 23:43:03.751087 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5426 23:43:03.754469 it's not compressed!
5427 23:43:03.758180 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5428 23:43:03.765048 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5429 23:43:03.772227 Loading segment from ROM address 0x0000000040003a1c
5430 23:43:03.775445 Entry Point 0x0000000080000000
5431 23:43:03.775869 Loaded segments
5432 23:43:03.782356 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5433 23:43:03.785404 Jumping to boot code at 0000000080000000(00000000ffeda000)
5434 23:43:03.795528 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5435 23:43:03.798856 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5436 23:43:03.802270 CBFS @ 21000 size 3d4000
5437 23:43:03.809263 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5438 23:43:03.812470 CBFS: Locating 'fallback/bl31'
5439 23:43:03.815302 CBFS: Found @ offset 36dc0 size 5820
5440 23:43:03.826681 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5441 23:43:03.830314 Checking segment from ROM address 0x0000000040003a00
5442 23:43:03.836410 Checking segment from ROM address 0x0000000040003a1c
5443 23:43:03.839950 Loading segment from ROM address 0x0000000040003a00
5444 23:43:03.842935 code (compression=1)
5445 23:43:03.849352 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5446 23:43:03.859537 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5447 23:43:03.860038 using LZMA
5448 23:43:03.868208 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5449 23:43:03.875045 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5450 23:43:03.878323 Loading segment from ROM address 0x0000000040003a1c
5451 23:43:03.881533 Entry Point 0x0000000054601000
5452 23:43:03.881953 Loaded segments
5453 23:43:03.884891 NOTICE: MT8183 bl31_setup
5454 23:43:03.891597 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5455 23:43:03.895131 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5456 23:43:03.898795 INFO: [DEVAPC] dump DEVAPC registers:
5457 23:43:03.908353 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5458 23:43:03.914926 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5459 23:43:03.924824 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5460 23:43:03.931563 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5461 23:43:03.941330 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5462 23:43:03.948692 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5463 23:43:03.957986 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5464 23:43:03.964527 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5465 23:43:03.974709 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5466 23:43:03.981452 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5467 23:43:03.988368 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5468 23:43:03.998008 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5469 23:43:04.004646 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5470 23:43:04.014601 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5471 23:43:04.021126 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5472 23:43:04.027481 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5473 23:43:04.033988 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5474 23:43:04.040658 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5475 23:43:04.050705 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5476 23:43:04.057338 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5477 23:43:04.063995 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5478 23:43:04.070644 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5479 23:43:04.073750 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5480 23:43:04.077227 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5481 23:43:04.080693 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5482 23:43:04.084016 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5483 23:43:04.087270 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5484 23:43:04.094110 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5485 23:43:04.100960 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5486 23:43:04.101188 WARNING: region 0:
5487 23:43:04.104043 WARNING: apc:0x168, sa:0x0, ea:0xfff
5488 23:43:04.107493 WARNING: region 1:
5489 23:43:04.110608 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5490 23:43:04.110892 WARNING: region 2:
5491 23:43:04.114400 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5492 23:43:04.117531 WARNING: region 3:
5493 23:43:04.120790 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5494 23:43:04.124317 WARNING: region 4:
5495 23:43:04.127733 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5496 23:43:04.128223 WARNING: region 5:
5497 23:43:04.130814 WARNING: apc:0x0, sa:0x0, ea:0x0
5498 23:43:04.134173 WARNING: region 6:
5499 23:43:04.137550 WARNING: apc:0x0, sa:0x0, ea:0x0
5500 23:43:04.137971 WARNING: region 7:
5501 23:43:04.140752 WARNING: apc:0x0, sa:0x0, ea:0x0
5502 23:43:04.147704 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5503 23:43:04.151315 INFO: SPM: enable SPMC mode
5504 23:43:04.154534 NOTICE: spm_boot_init() start
5505 23:43:04.157919 NOTICE: spm_boot_init() end
5506 23:43:04.161040 INFO: BL31: Initializing runtime services
5507 23:43:04.167649 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5508 23:43:04.170890 INFO: BL31: Preparing for EL3 exit to normal world
5509 23:43:04.174211 INFO: Entry point address = 0x80000000
5510 23:43:04.177817 INFO: SPSR = 0x8
5511 23:43:04.198248
5512 23:43:04.198816
5513 23:43:04.199184
5514 23:43:04.200931 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5515 23:43:04.201462 start: 2.2.4 bootloader-commands (timeout 00:04:24) [common]
5516 23:43:04.201907 Setting prompt string to ['jacuzzi:']
5517 23:43:04.202355 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:24)
5518 23:43:04.203221 Starting depthcharge on Juniper...
5519 23:43:04.203695
5520 23:43:04.204871 vboot_handoff: creating legacy vboot_handoff structure
5521 23:43:04.205350
5522 23:43:04.208151 ec_init(0): CrosEC protocol v3 supported (544, 544)
5523 23:43:04.208628
5524 23:43:04.211635 Wipe memory regions:
5525 23:43:04.212120
5526 23:43:04.214901 [0x00000040000000, 0x00000054600000)
5527 23:43:04.257908
5528 23:43:04.258475 [0x00000054660000, 0x00000080000000)
5529 23:43:04.348676
5530 23:43:04.351932 [0x000000811994a0, 0x000000ffeda000)
5531 23:43:04.608297
5532 23:43:04.608863 [0x00000100000000, 0x00000140000000)
5533 23:43:04.740688
5534 23:43:04.744181 Initializing XHCI USB controller at 0x11200000.
5535 23:43:04.766939
5536 23:43:04.770122 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5537 23:43:04.770595
5538 23:43:04.771073
5539 23:43:04.772131 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5541 23:43:04.873513 jacuzzi: tftpboot 192.168.201.1 14172910/tftp-deploy-imj4l_g0/kernel/image.itb 14172910/tftp-deploy-imj4l_g0/kernel/cmdline
5542 23:43:04.874229 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5543 23:43:04.874743 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5544 23:43:04.878867 tftpboot 192.168.201.1 14172910/tftp-deploy-imj4l_g0/kernel/image.ittp-deploy-imj4l_g0/kernel/cmdline
5545 23:43:04.879352
5546 23:43:04.879863 Waiting for link
5547 23:43:05.280832
5548 23:43:05.281399 R8152: Initializing
5549 23:43:05.281881
5550 23:43:05.283765 Version 9 (ocp_data = 6010)
5551 23:43:05.284244
5552 23:43:05.287128 R8152: Done initializing
5553 23:43:05.287640
5554 23:43:05.288114 Adding net device
5555 23:43:05.672858
5556 23:43:05.673590 done.
5557 23:43:05.673984
5558 23:43:05.674346 MAC: 00:e0:4c:68:0b:b9
5559 23:43:05.674698
5560 23:43:05.675940 Sending DHCP discover... done.
5561 23:43:05.676353
5562 23:43:05.679580 Waiting for reply... done.
5563 23:43:05.680041
5564 23:43:05.682659 Sending DHCP request... done.
5565 23:43:05.683335
5566 23:43:05.688343 Waiting for reply... done.
5567 23:43:05.688909
5568 23:43:05.689274 My ip is 192.168.201.13
5569 23:43:05.689611
5570 23:43:05.691478 The DHCP server ip is 192.168.201.1
5571 23:43:05.691940
5572 23:43:05.698140 TFTP server IP predefined by user: 192.168.201.1
5573 23:43:05.698663
5574 23:43:05.704548 Bootfile predefined by user: 14172910/tftp-deploy-imj4l_g0/kernel/image.itb
5575 23:43:05.705147
5576 23:43:05.705516 Sending tftp read request... done.
5577 23:43:05.707750
5578 23:43:05.714179 Waiting for the transfer...
5579 23:43:05.714595
5580 23:43:06.049031 00000000 ################################################################
5581 23:43:06.049191
5582 23:43:06.333483 00080000 ################################################################
5583 23:43:06.333641
5584 23:43:06.622480 00100000 ################################################################
5585 23:43:06.622632
5586 23:43:06.912846 00180000 ################################################################
5587 23:43:06.912997
5588 23:43:07.192204 00200000 ################################################################
5589 23:43:07.192361
5590 23:43:07.488304 00280000 ################################################################
5591 23:43:07.488462
5592 23:43:07.789562 00300000 ################################################################
5593 23:43:07.789748
5594 23:43:08.064407 00380000 ################################################################
5595 23:43:08.064555
5596 23:43:08.316002 00400000 ################################################################
5597 23:43:08.316144
5598 23:43:08.567809 00480000 ################################################################
5599 23:43:08.567953
5600 23:43:08.819804 00500000 ################################################################
5601 23:43:08.819946
5602 23:43:09.067415 00580000 ################################################################
5603 23:43:09.067556
5604 23:43:09.321160 00600000 ################################################################
5605 23:43:09.321300
5606 23:43:09.567444 00680000 ################################################################
5607 23:43:09.567616
5608 23:43:09.812948 00700000 ################################################################
5609 23:43:09.813094
5610 23:43:10.057397 00780000 ################################################################
5611 23:43:10.057583
5612 23:43:10.302512 00800000 ################################################################
5613 23:43:10.302681
5614 23:43:10.551444 00880000 ################################################################
5615 23:43:10.551590
5616 23:43:10.799940 00900000 ################################################################
5617 23:43:10.800118
5618 23:43:11.048898 00980000 ################################################################
5619 23:43:11.049054
5620 23:43:11.298302 00a00000 ################################################################
5621 23:43:11.298476
5622 23:43:11.551601 00a80000 ################################################################
5623 23:43:11.551739
5624 23:43:11.802457 00b00000 ################################################################
5625 23:43:11.802625
5626 23:43:12.053210 00b80000 ################################################################
5627 23:43:12.053379
5628 23:43:12.300050 00c00000 ################################################################
5629 23:43:12.300191
5630 23:43:12.544102 00c80000 ################################################################
5631 23:43:12.544255
5632 23:43:12.790067 00d00000 ################################################################
5633 23:43:12.790246
5634 23:43:13.035341 00d80000 ################################################################
5635 23:43:13.035523
5636 23:43:13.279644 00e00000 ################################################################
5637 23:43:13.279787
5638 23:43:13.525469 00e80000 ################################################################
5639 23:43:13.525637
5640 23:43:13.772324 00f00000 ################################################################
5641 23:43:13.772477
5642 23:43:14.020321 00f80000 ################################################################
5643 23:43:14.020462
5644 23:43:14.268943 01000000 ################################################################
5645 23:43:14.269117
5646 23:43:14.520202 01080000 ################################################################
5647 23:43:14.520344
5648 23:43:14.772175 01100000 ################################################################
5649 23:43:14.772349
5650 23:43:15.022257 01180000 ################################################################
5651 23:43:15.022399
5652 23:43:15.271741 01200000 ################################################################
5653 23:43:15.271886
5654 23:43:15.523287 01280000 ################################################################
5655 23:43:15.523443
5656 23:43:15.771897 01300000 ################################################################
5657 23:43:15.772041
5658 23:43:16.024291 01380000 ################################################################
5659 23:43:16.024484
5660 23:43:16.274711 01400000 ################################################################
5661 23:43:16.274857
5662 23:43:16.523465 01480000 ################################################################
5663 23:43:16.523611
5664 23:43:16.773548 01500000 ################################################################
5665 23:43:16.773684
5666 23:43:17.039600 01580000 ################################################################
5667 23:43:17.039740
5668 23:43:17.306456 01600000 ################################################################
5669 23:43:17.306601
5670 23:43:17.562522 01680000 ################################################################
5671 23:43:17.562698
5672 23:43:17.816448 01700000 ################################################################
5673 23:43:17.816591
5674 23:43:18.067485 01780000 ################################################################
5675 23:43:18.067625
5676 23:43:18.317815 01800000 ################################################################
5677 23:43:18.317958
5678 23:43:18.574505 01880000 ################################################################
5679 23:43:18.574654
5680 23:43:18.837417 01900000 ################################################################
5681 23:43:18.837560
5682 23:43:19.112802 01980000 ################################################################
5683 23:43:19.112953
5684 23:43:19.371161 01a00000 ################################################################
5685 23:43:19.371315
5686 23:43:19.625351 01a80000 ################################################################
5687 23:43:19.625541
5688 23:43:19.870470 01b00000 ################################################################
5689 23:43:19.870616
5690 23:43:20.117697 01b80000 ################################################################
5691 23:43:20.117847
5692 23:43:20.366277 01c00000 ################################################################
5693 23:43:20.366425
5694 23:43:20.618345 01c80000 ################################################################
5695 23:43:20.618603
5696 23:43:20.870831 01d00000 ################################################################
5697 23:43:20.871013
5698 23:43:21.123811 01d80000 ################################################################
5699 23:43:21.123961
5700 23:43:21.375130 01e00000 ################################################################
5701 23:43:21.375271
5702 23:43:21.624990 01e80000 ################################################################
5703 23:43:21.625159
5704 23:43:21.875702 01f00000 ################################################################
5705 23:43:21.875849
5706 23:43:22.128409 01f80000 ################################################################
5707 23:43:22.128560
5708 23:43:22.380115 02000000 ################################################################
5709 23:43:22.380259
5710 23:43:22.631293 02080000 ################################################################
5711 23:43:22.631466
5712 23:43:22.895383 02100000 ################################################################
5713 23:43:22.895542
5714 23:43:23.159418 02180000 ################################################################
5715 23:43:23.159594
5716 23:43:23.450246 02200000 ################################################################
5717 23:43:23.450401
5718 23:43:23.719048 02280000 ################################################################
5719 23:43:23.719199
5720 23:43:24.005946 02300000 ################################################################
5721 23:43:24.006098
5722 23:43:24.304083 02380000 ################################################################
5723 23:43:24.304226
5724 23:43:24.595229 02400000 ################################################################
5725 23:43:24.595414
5726 23:43:24.872870 02480000 ################################################################
5727 23:43:24.873025
5728 23:43:25.158950 02500000 ################################################################
5729 23:43:25.159101
5730 23:43:25.443661 02580000 ################################################################
5731 23:43:25.443809
5732 23:43:25.724982 02600000 ################################################################
5733 23:43:25.725155
5734 23:43:25.980289 02680000 ################################################################
5735 23:43:25.980433
5736 23:43:26.239360 02700000 ################################################################
5737 23:43:26.239546
5738 23:43:26.503742 02780000 ################################################################
5739 23:43:26.503885
5740 23:43:26.757207 02800000 ################################################################
5741 23:43:26.757351
5742 23:43:27.020346 02880000 ################################################################
5743 23:43:27.020489
5744 23:43:27.280371 02900000 ################################################################
5745 23:43:27.280507
5746 23:43:27.533889 02980000 ################################################################
5747 23:43:27.534031
5748 23:43:27.803247 02a00000 ################################################################
5749 23:43:27.803426
5750 23:43:28.092675 02a80000 ################################################################
5751 23:43:28.092828
5752 23:43:28.368764 02b00000 ################################################################
5753 23:43:28.368901
5754 23:43:28.624897 02b80000 ################################################################
5755 23:43:28.625033
5756 23:43:28.880356 02c00000 ################################################################
5757 23:43:28.880494
5758 23:43:29.157570 02c80000 ################################################################
5759 23:43:29.157715
5760 23:43:29.454159 02d00000 ################################################################
5761 23:43:29.454310
5762 23:43:29.754108 02d80000 ################################################################
5763 23:43:29.754253
5764 23:43:30.141856 02e00000 ################################################################
5765 23:43:30.142416
5766 23:43:30.449291 02e80000 ################################################################
5767 23:43:30.449440
5768 23:43:30.744968 02f00000 ################################################################
5769 23:43:30.745115
5770 23:43:31.040074 02f80000 ################################################################
5771 23:43:31.040219
5772 23:43:31.337575 03000000 ################################################################
5773 23:43:31.337733
5774 23:43:31.634585 03080000 ################################################################
5775 23:43:31.634768
5776 23:43:31.921733 03100000 ################################################################
5777 23:43:31.921884
5778 23:43:32.236213 03180000 ################################################################
5779 23:43:32.236814
5780 23:43:32.637032 03200000 ################################################################
5781 23:43:32.637559
5782 23:43:33.025516 03280000 ################################################################
5783 23:43:33.026034
5784 23:43:33.375378 03300000 ################################################################
5785 23:43:33.375543
5786 23:43:33.569510 03380000 ######################################### done.
5787 23:43:33.569652
5788 23:43:33.572490 The bootfile was 54335434 bytes long.
5789 23:43:33.572582
5790 23:43:33.576243 Sending tftp read request... done.
5791 23:43:33.576428
5792 23:43:33.576529 Waiting for the transfer...
5793 23:43:33.576613
5794 23:43:33.579477 00000000 # done.
5795 23:43:33.579927
5796 23:43:33.586531 Command line loaded dynamically from TFTP file: 14172910/tftp-deploy-imj4l_g0/kernel/cmdline
5797 23:43:33.587051
5798 23:43:33.603142 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5799 23:43:33.603713
5800 23:43:33.606286 Loading FIT.
5801 23:43:33.606695
5802 23:43:33.609777 Image ramdisk-1 has 41214259 bytes.
5803 23:43:33.610187
5804 23:43:33.610530 Image fdt-1 has 57695 bytes.
5805 23:43:33.613028
5806 23:43:33.613436 Image kernel-1 has 13061430 bytes.
5807 23:43:33.613764
5808 23:43:33.623221 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5809 23:43:33.623786
5810 23:43:33.635990 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5811 23:43:33.636492
5812 23:43:33.639480 Choosing best match conf-1 for compat google,juniper-sku16.
5813 23:43:33.644600
5814 23:43:33.649278 Connected to device vid:did:rid of 1ae0:0028:00
5815 23:43:33.657947
5816 23:43:33.661201 tpm_get_response: command 0x17b, return code 0x0
5817 23:43:33.661714
5818 23:43:33.664637 tpm_cleanup: add release locality here.
5819 23:43:33.665150
5820 23:43:33.667711 Shutting down all USB controllers.
5821 23:43:33.668125
5822 23:43:33.670942 Removing current net device
5823 23:43:33.671357
5824 23:43:33.674196 Exiting depthcharge with code 4 at timestamp: 46737065
5825 23:43:33.674701
5826 23:43:33.677886 LZMA decompressing kernel-1 to 0x80193568
5827 23:43:33.678404
5828 23:43:33.684329 LZMA decompressing kernel-1 to 0x40000000
5829 23:43:35.539960
5830 23:43:35.540509 jumping to kernel
5831 23:43:35.542570 end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
5832 23:43:35.543098 start: 2.2.5 auto-login-action (timeout 00:03:53) [common]
5833 23:43:35.543570 Setting prompt string to ['Linux version [0-9]']
5834 23:43:35.543956 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5835 23:43:35.544331 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5836 23:43:35.615328
5837 23:43:35.618647 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5838 23:43:35.622115 start: 2.2.5.1 login-action (timeout 00:03:53) [common]
5839 23:43:35.622644 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5840 23:43:35.623043 Setting prompt string to []
5841 23:43:35.623493 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5842 23:43:35.623893 Using line separator: #'\n'#
5843 23:43:35.624249 No login prompt set.
5844 23:43:35.624652 Parsing kernel messages
5845 23:43:35.624998 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5846 23:43:35.625714 [login-action] Waiting for messages, (timeout 00:03:53)
5847 23:43:35.626204 Waiting using forced prompt support (timeout 00:01:56)
5848 23:43:35.642332 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j217067-arm64-gcc-10-defconfig-arm64-chromebook-s48tj) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Tue Jun 4 23:28:43 UTC 2024
5849 23:43:35.644725 [ 0.000000] random: crng init done
5850 23:43:35.651522 [ 0.000000] Machine model: Google juniper sku16 board
5851 23:43:35.654738 [ 0.000000] efi: UEFI not found.
5852 23:43:35.662005 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5853 23:43:35.668626 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5854 23:43:35.678531 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5855 23:43:35.681818 [ 0.000000] printk: bootconsole [mtk8250] enabled
5856 23:43:35.690650 [ 0.000000] NUMA: No NUMA configuration found
5857 23:43:35.696832 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5858 23:43:35.703515 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bda00-0x13f7bffff]
5859 23:43:35.704094 [ 0.000000] Zone ranges:
5860 23:43:35.710301 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5861 23:43:35.713521 [ 0.000000] DMA32 empty
5862 23:43:35.720134 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5863 23:43:35.723618 [ 0.000000] Movable zone start for each node
5864 23:43:35.726422 [ 0.000000] Early memory node ranges
5865 23:43:35.733628 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5866 23:43:35.740154 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5867 23:43:35.747007 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5868 23:43:35.753309 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5869 23:43:35.760040 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5870 23:43:35.766754 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5871 23:43:35.782672 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5872 23:43:35.788911 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5873 23:43:35.795661 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5874 23:43:35.799060 [ 0.000000] psci: probing for conduit method from DT.
5875 23:43:35.805734 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5876 23:43:35.809447 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5877 23:43:35.815880 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5878 23:43:35.819210 [ 0.000000] psci: SMC Calling Convention v1.1
5879 23:43:35.825844 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5880 23:43:35.829016 [ 0.000000] Detected VIPT I-cache on CPU0
5881 23:43:35.835783 [ 0.000000] CPU features: detected: GIC system register CPU interface
5882 23:43:35.842022 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5883 23:43:35.848621 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5884 23:43:35.855302 [ 0.000000] CPU features: detected: ARM erratum 845719
5885 23:43:35.858901 [ 0.000000] alternatives: applying boot alternatives
5886 23:43:35.862151 [ 0.000000] Fallback order for Node 0: 0
5887 23:43:35.868466 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5888 23:43:35.872021 [ 0.000000] Policy zone: Normal
5889 23:43:35.891916 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5890 23:43:35.905361 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5891 23:43:35.912050 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5892 23:43:35.921686 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5893 23:43:35.928640 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5894 23:43:35.931583 <6>[ 0.000000] software IO TLB: area num 8.
5895 23:43:35.956767 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5896 23:43:36.014743 <6>[ 0.000000] Memory: 3874952K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 283512K reserved, 32768K cma-reserved)
5897 23:43:36.021399 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5898 23:43:36.028090 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5899 23:43:36.031494 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5900 23:43:36.038432 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5901 23:43:36.045133 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5902 23:43:36.048577 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5903 23:43:36.057842 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5904 23:43:36.064825 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5905 23:43:36.071375 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5906 23:43:36.081791 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5907 23:43:36.085085 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5908 23:43:36.088520 <6>[ 0.000000] GICv3: 640 SPIs implemented
5909 23:43:36.095157 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5910 23:43:36.098366 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5911 23:43:36.101527 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5912 23:43:36.111461 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5913 23:43:36.121540 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5914 23:43:36.134769 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5915 23:43:36.141387 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5916 23:43:36.151860 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5917 23:43:36.165670 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5918 23:43:36.172391 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5919 23:43:36.179039 <6>[ 0.009478] Console: colour dummy device 80x25
5920 23:43:36.182914 <6>[ 0.014520] printk: console [tty1] enabled
5921 23:43:36.192398 <6>[ 0.018910] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5922 23:43:36.199375 <6>[ 0.029375] pid_max: default: 32768 minimum: 301
5923 23:43:36.202594 <6>[ 0.034258] LSM: Security Framework initializing
5924 23:43:36.212245 <6>[ 0.039174] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5925 23:43:36.218898 <6>[ 0.046797] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5926 23:43:36.225609 <4>[ 0.055670] cacheinfo: Unable to detect cache hierarchy for CPU 0
5927 23:43:36.235379 <6>[ 0.062299] cblist_init_generic: Setting adjustable number of callback queues.
5928 23:43:36.239249 <6>[ 0.069746] cblist_init_generic: Setting shift to 3 and lim to 1.
5929 23:43:36.248665 <6>[ 0.076099] cblist_init_generic: Setting adjustable number of callback queues.
5930 23:43:36.255346 <6>[ 0.083544] cblist_init_generic: Setting shift to 3 and lim to 1.
5931 23:43:36.258768 <6>[ 0.089943] rcu: Hierarchical SRCU implementation.
5932 23:43:36.265130 <6>[ 0.094969] rcu: Max phase no-delay instances is 1000.
5933 23:43:36.272432 <6>[ 0.102902] EFI services will not be available.
5934 23:43:36.276115 <6>[ 0.107848] smp: Bringing up secondary CPUs ...
5935 23:43:36.286019 <6>[ 0.113114] Detected VIPT I-cache on CPU1
5936 23:43:36.292488 <4>[ 0.113159] cacheinfo: Unable to detect cache hierarchy for CPU 1
5937 23:43:36.299067 <6>[ 0.113169] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5938 23:43:36.305502 <6>[ 0.113200] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5939 23:43:36.308785 <6>[ 0.113685] Detected VIPT I-cache on CPU2
5940 23:43:36.315838 <4>[ 0.113718] cacheinfo: Unable to detect cache hierarchy for CPU 2
5941 23:43:36.321881 <6>[ 0.113723] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5942 23:43:36.328736 <6>[ 0.113736] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5943 23:43:36.335389 <6>[ 0.114180] Detected VIPT I-cache on CPU3
5944 23:43:36.338288 <4>[ 0.114209] cacheinfo: Unable to detect cache hierarchy for CPU 3
5945 23:43:36.348170 <6>[ 0.114214] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5946 23:43:36.354892 <6>[ 0.114225] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5947 23:43:36.358669 <6>[ 0.114800] CPU features: detected: Spectre-v2
5948 23:43:36.364667 <6>[ 0.114810] CPU features: detected: Spectre-BHB
5949 23:43:36.368040 <6>[ 0.114814] CPU features: detected: ARM erratum 858921
5950 23:43:36.371461 <6>[ 0.114819] Detected VIPT I-cache on CPU4
5951 23:43:36.378232 <4>[ 0.114867] cacheinfo: Unable to detect cache hierarchy for CPU 4
5952 23:43:36.388259 <6>[ 0.114875] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5953 23:43:36.394977 <6>[ 0.114883] arch_timer: Enabling local workaround for ARM erratum 858921
5954 23:43:36.398095 <6>[ 0.114894] arch_timer: CPU4: Trapping CNTVCT access
5955 23:43:36.404440 <6>[ 0.114902] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5956 23:43:36.411382 <6>[ 0.115387] Detected VIPT I-cache on CPU5
5957 23:43:36.414672 <4>[ 0.115426] cacheinfo: Unable to detect cache hierarchy for CPU 5
5958 23:43:36.424613 <6>[ 0.115432] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5959 23:43:36.431648 <6>[ 0.115439] arch_timer: Enabling local workaround for ARM erratum 858921
5960 23:43:36.435054 <6>[ 0.115446] arch_timer: CPU5: Trapping CNTVCT access
5961 23:43:36.441411 <6>[ 0.115451] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5962 23:43:36.447881 <6>[ 0.115886] Detected VIPT I-cache on CPU6
5963 23:43:36.451276 <4>[ 0.115931] cacheinfo: Unable to detect cache hierarchy for CPU 6
5964 23:43:36.461439 <6>[ 0.115937] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5965 23:43:36.467759 <6>[ 0.115945] arch_timer: Enabling local workaround for ARM erratum 858921
5966 23:43:36.471540 <6>[ 0.115951] arch_timer: CPU6: Trapping CNTVCT access
5967 23:43:36.477797 <6>[ 0.115956] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5968 23:43:36.484458 <6>[ 0.116487] Detected VIPT I-cache on CPU7
5969 23:43:36.490960 <4>[ 0.116531] cacheinfo: Unable to detect cache hierarchy for CPU 7
5970 23:43:36.497932 <6>[ 0.116537] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5971 23:43:36.504512 <6>[ 0.116544] arch_timer: Enabling local workaround for ARM erratum 858921
5972 23:43:36.507716 <6>[ 0.116550] arch_timer: CPU7: Trapping CNTVCT access
5973 23:43:36.513881 <6>[ 0.116556] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5974 23:43:36.520915 <6>[ 0.116619] smp: Brought up 1 node, 8 CPUs
5975 23:43:36.524161 <6>[ 0.355510] SMP: Total of 8 processors activated.
5976 23:43:36.530762 <6>[ 0.360445] CPU features: detected: 32-bit EL0 Support
5977 23:43:36.534627 <6>[ 0.365824] CPU features: detected: 32-bit EL1 Support
5978 23:43:36.541101 <6>[ 0.371192] CPU features: detected: CRC32 instructions
5979 23:43:36.544274 <6>[ 0.376618] CPU: All CPU(s) started at EL2
5980 23:43:36.550726 <6>[ 0.380960] alternatives: applying system-wide alternatives
5981 23:43:36.557963 <6>[ 0.388971] devtmpfs: initialized
5982 23:43:36.570531 <6>[ 0.397915] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5983 23:43:36.580813 <6>[ 0.407866] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5984 23:43:36.583782 <6>[ 0.415593] pinctrl core: initialized pinctrl subsystem
5985 23:43:36.592277 <6>[ 0.422686] DMI not present or invalid.
5986 23:43:36.599132 <6>[ 0.427053] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5987 23:43:36.604954 <6>[ 0.433950] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5988 23:43:36.612366 <6>[ 0.441479] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5989 23:43:36.622297 <6>[ 0.449729] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5990 23:43:36.628986 <6>[ 0.457907] audit: initializing netlink subsys (disabled)
5991 23:43:36.635534 <5>[ 0.463612] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5992 23:43:36.642411 <6>[ 0.464595] thermal_sys: Registered thermal governor 'step_wise'
5993 23:43:36.648859 <6>[ 0.471579] thermal_sys: Registered thermal governor 'power_allocator'
5994 23:43:36.652329 <6>[ 0.477877] cpuidle: using governor menu
5995 23:43:36.658920 <6>[ 0.488841] NET: Registered PF_QIPCRTR protocol family
5996 23:43:36.665624 <6>[ 0.494327] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5997 23:43:36.672666 <6>[ 0.501422] ASID allocator initialised with 32768 entries
5998 23:43:36.675721 <6>[ 0.508181] Serial: AMBA PL011 UART driver
5999 23:43:36.688004 <4>[ 0.518594] Trying to register duplicate clock ID: 113
6000 23:43:36.746982 <6>[ 0.573992] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6001 23:43:36.761075 <6>[ 0.588318] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6002 23:43:36.764616 <6>[ 0.598058] KASLR enabled
6003 23:43:36.779502 <6>[ 0.606088] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6004 23:43:36.785056 <6>[ 0.613093] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6005 23:43:36.792077 <6>[ 0.619570] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6006 23:43:36.799130 <6>[ 0.626560] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6007 23:43:36.805316 <6>[ 0.633035] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6008 23:43:36.812048 <6>[ 0.640024] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6009 23:43:36.818473 <6>[ 0.646497] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6010 23:43:36.825341 <6>[ 0.653486] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6011 23:43:36.828400 <6>[ 0.661052] ACPI: Interpreter disabled.
6012 23:43:36.838578 <6>[ 0.669019] iommu: Default domain type: Translated
6013 23:43:36.845045 <6>[ 0.674130] iommu: DMA domain TLB invalidation policy: strict mode
6014 23:43:36.848272 <5>[ 0.680763] SCSI subsystem initialized
6015 23:43:36.855138 <6>[ 0.685177] usbcore: registered new interface driver usbfs
6016 23:43:36.861935 <6>[ 0.690905] usbcore: registered new interface driver hub
6017 23:43:36.865212 <6>[ 0.696446] usbcore: registered new device driver usb
6018 23:43:36.871829 <6>[ 0.702747] pps_core: LinuxPPS API ver. 1 registered
6019 23:43:36.881964 <6>[ 0.707933] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6020 23:43:36.885191 <6>[ 0.717259] PTP clock support registered
6021 23:43:36.888282 <6>[ 0.721513] EDAC MC: Ver: 3.0.0
6022 23:43:36.896358 <6>[ 0.727149] FPGA manager framework
6023 23:43:36.902719 <6>[ 0.730832] Advanced Linux Sound Architecture Driver Initialized.
6024 23:43:36.906387 <6>[ 0.737588] vgaarb: loaded
6025 23:43:36.913055 <6>[ 0.740706] clocksource: Switched to clocksource arch_sys_counter
6026 23:43:36.916164 <5>[ 0.747136] VFS: Disk quotas dquot_6.6.0
6027 23:43:36.923171 <6>[ 0.751310] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6028 23:43:36.926765 <6>[ 0.758483] pnp: PnP ACPI: disabled
6029 23:43:36.934937 <6>[ 0.765337] NET: Registered PF_INET protocol family
6030 23:43:36.940882 <6>[ 0.770567] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6031 23:43:36.953215 <6>[ 0.780477] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6032 23:43:36.963457 <6>[ 0.789230] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6033 23:43:36.969637 <6>[ 0.797179] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6034 23:43:36.976625 <6>[ 0.805410] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6035 23:43:36.982736 <6>[ 0.813504] TCP: Hash tables configured (established 32768 bind 32768)
6036 23:43:36.992953 <6>[ 0.820331] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6037 23:43:36.999831 <6>[ 0.827302] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6038 23:43:37.006710 <6>[ 0.834783] NET: Registered PF_UNIX/PF_LOCAL protocol family
6039 23:43:37.010225 <6>[ 0.840877] RPC: Registered named UNIX socket transport module.
6040 23:43:37.016732 <6>[ 0.847021] RPC: Registered udp transport module.
6041 23:43:37.020086 <6>[ 0.851944] RPC: Registered tcp transport module.
6042 23:43:37.026434 <6>[ 0.856866] RPC: Registered tcp NFSv4.1 backchannel transport module.
6043 23:43:37.032985 <6>[ 0.863518] PCI: CLS 0 bytes, default 64
6044 23:43:37.036214 <6>[ 0.867808] Unpacking initramfs...
6045 23:43:37.049974 <6>[ 0.877264] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6046 23:43:37.059911 <6>[ 0.885888] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6047 23:43:37.063612 <6>[ 0.894738] kvm [1]: IPA Size Limit: 40 bits
6048 23:43:37.070514 <6>[ 0.901054] kvm [1]: vgic-v2@c420000
6049 23:43:37.073815 <6>[ 0.904869] kvm [1]: GIC system register CPU interface enabled
6050 23:43:37.080731 <6>[ 0.911050] kvm [1]: vgic interrupt IRQ18
6051 23:43:37.084348 <6>[ 0.915428] kvm [1]: Hyp mode initialized successfully
6052 23:43:37.091098 <5>[ 0.921671] Initialise system trusted keyrings
6053 23:43:37.097398 <6>[ 0.926505] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6054 23:43:37.106312 <6>[ 0.936438] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6055 23:43:37.112361 <5>[ 0.942903] NFS: Registering the id_resolver key type
6056 23:43:37.115786 <5>[ 0.948213] Key type id_resolver registered
6057 23:43:37.122332 <5>[ 0.952625] Key type id_legacy registered
6058 23:43:37.128787 <6>[ 0.956935] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6059 23:43:37.135356 <6>[ 0.963857] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6060 23:43:37.142585 <6>[ 0.971629] 9p: Installing v9fs 9p2000 file system support
6061 23:43:37.170458 <5>[ 1.001179] Key type asymmetric registered
6062 23:43:37.174147 <5>[ 1.005526] Asymmetric key parser 'x509' registered
6063 23:43:37.183627 <6>[ 1.010684] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6064 23:43:37.187664 <6>[ 1.018294] io scheduler mq-deadline registered
6065 23:43:37.190806 <6>[ 1.023055] io scheduler kyber registered
6066 23:43:37.213053 <6>[ 1.043775] EINJ: ACPI disabled.
6067 23:43:37.219475 <4>[ 1.047549] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6068 23:43:37.257358 <6>[ 1.087982] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6069 23:43:37.266225 <6>[ 1.096440] printk: console [ttyS0] disabled
6070 23:43:37.293866 <6>[ 1.121088] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6071 23:43:37.300875 <6>[ 1.130560] printk: console [ttyS0] enabled
6072 23:43:37.304134 <6>[ 1.130560] printk: console [ttyS0] enabled
6073 23:43:37.310449 <6>[ 1.139478] printk: bootconsole [mtk8250] disabled
6074 23:43:37.313707 <6>[ 1.139478] printk: bootconsole [mtk8250] disabled
6075 23:43:37.323493 <3>[ 1.150004] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6076 23:43:37.330920 <3>[ 1.158386] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6077 23:43:37.359362 <6>[ 1.186800] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6078 23:43:37.365679 <6>[ 1.196453] serial serial0: tty port ttyS1 registered
6079 23:43:37.373186 <6>[ 1.203003] SuperH (H)SCI(F) driver initialized
6080 23:43:37.375934 <6>[ 1.208494] msm_serial: driver initialized
6081 23:43:37.391173 <6>[ 1.218801] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6082 23:43:37.400894 <6>[ 1.227408] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6083 23:43:37.407699 <6>[ 1.235986] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6084 23:43:37.417619 <6>[ 1.244555] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6085 23:43:37.424391 <6>[ 1.253210] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6086 23:43:37.434371 <6>[ 1.261872] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6087 23:43:37.444388 <6>[ 1.270612] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6088 23:43:37.451236 <6>[ 1.279351] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6089 23:43:37.460491 <6>[ 1.287931] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6090 23:43:37.470811 <6>[ 1.296740] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6091 23:43:37.478525 <4>[ 1.309145] cacheinfo: Unable to detect cache hierarchy for CPU 0
6092 23:43:37.488113 <6>[ 1.318507] loop: module loaded
6093 23:43:37.499958 <6>[ 1.330476] vsim1: Bringing 1800000uV into 2700000-2700000uV
6094 23:43:37.517860 <6>[ 1.348473] megasas: 07.719.03.00-rc1
6095 23:43:37.526812 <6>[ 1.357405] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6096 23:43:37.537556 <6>[ 1.368093] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6097 23:43:37.554814 <6>[ 1.384918] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6098 23:43:37.611361 <6>[ 1.435237] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6099 23:43:38.343121 <6>[ 2.173285] Freeing initrd memory: 40244K
6100 23:43:38.357808 <4>[ 2.185294] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6101 23:43:38.365029 <4>[ 2.194527] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6102 23:43:38.372050 <4>[ 2.201225] Hardware name: Google juniper sku16 board (DT)
6103 23:43:38.374791 <4>[ 2.206964] Call trace:
6104 23:43:38.378229 <4>[ 2.209664] dump_backtrace.part.0+0xe0/0xf0
6105 23:43:38.381388 <4>[ 2.214200] show_stack+0x18/0x30
6106 23:43:38.384409 <4>[ 2.217772] dump_stack_lvl+0x68/0x84
6107 23:43:38.388773 <4>[ 2.221694] dump_stack+0x18/0x34
6108 23:43:38.395037 <4>[ 2.225264] sysfs_warn_dup+0x64/0x80
6109 23:43:38.398416 <4>[ 2.229186] sysfs_do_create_link_sd+0xf0/0x100
6110 23:43:38.401568 <4>[ 2.233973] sysfs_create_link+0x20/0x40
6111 23:43:38.408211 <4>[ 2.238152] bus_add_device+0x68/0x10c
6112 23:43:38.411609 <4>[ 2.242159] device_add+0x340/0x7ac
6113 23:43:38.414629 <4>[ 2.245902] of_device_add+0x44/0x60
6114 23:43:38.417812 <4>[ 2.249737] of_platform_device_create_pdata+0x90/0x120
6115 23:43:38.424338 <4>[ 2.255218] of_platform_bus_create+0x170/0x370
6116 23:43:38.427666 <4>[ 2.260005] of_platform_populate+0x50/0xfc
6117 23:43:38.434372 <4>[ 2.264444] parse_mtd_partitions+0x1dc/0x510
6118 23:43:38.437943 <4>[ 2.269058] mtd_device_parse_register+0xf8/0x2e0
6119 23:43:38.441342 <4>[ 2.274016] spi_nor_probe+0x21c/0x2f0
6120 23:43:38.444749 <4>[ 2.278022] spi_mem_probe+0x6c/0xb0
6121 23:43:38.451326 <4>[ 2.281854] spi_probe+0x84/0xe4
6122 23:43:38.454757 <4>[ 2.285337] really_probe+0xbc/0x2e0
6123 23:43:38.457881 <4>[ 2.289166] __driver_probe_device+0x78/0x11c
6124 23:43:38.461160 <4>[ 2.293778] driver_probe_device+0xd8/0x160
6125 23:43:38.467932 <4>[ 2.298216] __device_attach_driver+0xb8/0x134
6126 23:43:38.471600 <4>[ 2.302915] bus_for_each_drv+0x78/0xd0
6127 23:43:38.474594 <4>[ 2.307005] __device_attach+0xa8/0x1c0
6128 23:43:38.481623 <4>[ 2.311095] device_initial_probe+0x14/0x20
6129 23:43:38.484608 <4>[ 2.315533] bus_probe_device+0x9c/0xa4
6130 23:43:38.488146 <4>[ 2.319623] device_add+0x3ac/0x7ac
6131 23:43:38.491438 <4>[ 2.323365] __spi_add_device+0x78/0x120
6132 23:43:38.494446 <4>[ 2.327544] spi_add_device+0x40/0x7c
6133 23:43:38.501694 <4>[ 2.331461] spi_register_controller+0x610/0xad0
6134 23:43:38.504722 <4>[ 2.336334] devm_spi_register_controller+0x4c/0xa4
6135 23:43:38.511500 <4>[ 2.341467] mtk_spi_probe+0x3f8/0x650
6136 23:43:38.514622 <4>[ 2.345472] platform_probe+0x68/0xe0
6137 23:43:38.518018 <4>[ 2.349390] really_probe+0xbc/0x2e0
6138 23:43:38.521696 <4>[ 2.353220] __driver_probe_device+0x78/0x11c
6139 23:43:38.527882 <4>[ 2.357832] driver_probe_device+0xd8/0x160
6140 23:43:38.531060 <4>[ 2.362269] __driver_attach+0x94/0x19c
6141 23:43:38.534719 <4>[ 2.366360] bus_for_each_dev+0x70/0xd0
6142 23:43:38.537991 <4>[ 2.370450] driver_attach+0x24/0x30
6143 23:43:38.541013 <4>[ 2.374279] bus_add_driver+0x154/0x20c
6144 23:43:38.547582 <4>[ 2.378370] driver_register+0x78/0x130
6145 23:43:38.551197 <4>[ 2.382460] __platform_driver_register+0x28/0x34
6146 23:43:38.558445 <4>[ 2.387420] mtk_spi_driver_init+0x1c/0x28
6147 23:43:38.561183 <4>[ 2.391774] do_one_initcall+0x50/0x1d0
6148 23:43:38.564487 <4>[ 2.395864] kernel_init_freeable+0x21c/0x288
6149 23:43:38.568010 <4>[ 2.400477] kernel_init+0x24/0x12c
6150 23:43:38.571160 <4>[ 2.404222] ret_from_fork+0x10/0x20
6151 23:43:38.582597 <6>[ 2.413158] tun: Universal TUN/TAP device driver, 1.6
6152 23:43:38.586849 <6>[ 2.419435] thunder_xcv, ver 1.0
6153 23:43:38.589619 <6>[ 2.422949] thunder_bgx, ver 1.0
6154 23:43:38.592810 <6>[ 2.426455] nicpf, ver 1.0
6155 23:43:38.603831 <6>[ 2.430808] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6156 23:43:38.607099 <6>[ 2.438294] hns3: Copyright (c) 2017 Huawei Corporation.
6157 23:43:38.613583 <6>[ 2.443891] hclge is initializing
6158 23:43:38.617074 <6>[ 2.447481] e1000: Intel(R) PRO/1000 Network Driver
6159 23:43:38.623384 <6>[ 2.452616] e1000: Copyright (c) 1999-2006 Intel Corporation.
6160 23:43:38.626653 <6>[ 2.458640] e1000e: Intel(R) PRO/1000 Network Driver
6161 23:43:38.633509 <6>[ 2.463861] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6162 23:43:38.640300 <6>[ 2.470055] igb: Intel(R) Gigabit Ethernet Network Driver
6163 23:43:38.646654 <6>[ 2.475710] igb: Copyright (c) 2007-2014 Intel Corporation.
6164 23:43:38.653491 <6>[ 2.481552] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6165 23:43:38.659667 <6>[ 2.488075] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6166 23:43:38.663348 <6>[ 2.494627] sky2: driver version 1.30
6167 23:43:38.670279 <6>[ 2.499871] usbcore: registered new device driver r8152-cfgselector
6168 23:43:38.676125 <6>[ 2.506416] usbcore: registered new interface driver r8152
6169 23:43:38.683092 <6>[ 2.512244] VFIO - User Level meta-driver version: 0.3
6170 23:43:38.689982 <6>[ 2.520003] mtu3 11201000.usb: uwk - reg:0x420, version:101
6171 23:43:38.696543 <4>[ 2.525881] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6172 23:43:38.703059 <6>[ 2.533152] mtu3 11201000.usb: dr_mode: 1, drd: auto
6173 23:43:38.710021 <6>[ 2.538378] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6174 23:43:38.712748 <6>[ 2.544562] mtu3 11201000.usb: usb3-drd: 0
6175 23:43:38.723018 <6>[ 2.550083] mtu3 11201000.usb: xHCI platform device register success...
6176 23:43:38.729549 <4>[ 2.558755] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6177 23:43:38.736630 <6>[ 2.566726] xhci-mtk 11200000.usb: xHCI Host Controller
6178 23:43:38.742778 <6>[ 2.572240] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6179 23:43:38.749371 <6>[ 2.579961] xhci-mtk 11200000.usb: USB3 root hub has no ports
6180 23:43:38.759566 <6>[ 2.585969] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6181 23:43:38.766339 <6>[ 2.595390] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6182 23:43:38.772889 <6>[ 2.601474] xhci-mtk 11200000.usb: xHCI Host Controller
6183 23:43:38.779484 <6>[ 2.606962] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6184 23:43:38.786220 <6>[ 2.614619] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6185 23:43:38.789660 <6>[ 2.621436] hub 1-0:1.0: USB hub found
6186 23:43:38.792163 <6>[ 2.625465] hub 1-0:1.0: 1 port detected
6187 23:43:38.803501 <6>[ 2.630803] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6188 23:43:38.807069 <6>[ 2.639416] hub 2-0:1.0: USB hub found
6189 23:43:38.817196 <3>[ 2.643443] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6190 23:43:38.823633 <6>[ 2.651333] usbcore: registered new interface driver usb-storage
6191 23:43:38.830236 <6>[ 2.657945] usbcore: registered new device driver onboard-usb-hub
6192 23:43:38.845728 <4>[ 2.672805] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6193 23:43:38.854693 <6>[ 2.685103] mt6397-rtc mt6358-rtc: registered as rtc0
6194 23:43:38.864335 <6>[ 2.690584] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-04T23:42:41 UTC (1717544561)
6195 23:43:38.867986 <6>[ 2.700468] i2c_dev: i2c /dev entries driver
6196 23:43:38.880090 <6>[ 2.706885] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6197 23:43:38.889198 <6>[ 2.715206] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6198 23:43:38.892564 <6>[ 2.724111] i2c 4-0058: Fixed dependency cycle(s) with /panel
6199 23:43:38.903020 <6>[ 2.730141] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6200 23:43:38.909310 <3>[ 2.737597] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6201 23:43:38.926970 <6>[ 2.754624] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6202 23:43:38.935549 <6>[ 2.766052] cpu cpu0: EM: created perf domain
6203 23:43:38.945681 <6>[ 2.771543] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6204 23:43:38.952285 <6>[ 2.782834] cpu cpu4: EM: created perf domain
6205 23:43:38.959098 <6>[ 2.789569] sdhci: Secure Digital Host Controller Interface driver
6206 23:43:38.965453 <6>[ 2.796026] sdhci: Copyright(c) Pierre Ossman
6207 23:43:38.972518 <6>[ 2.801424] Synopsys Designware Multimedia Card Interface Driver
6208 23:43:38.979142 <6>[ 2.801912] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6209 23:43:38.982380 <6>[ 2.808490] sdhci-pltfm: SDHCI platform and OF driver helper
6210 23:43:38.990604 <6>[ 2.821221] ledtrig-cpu: registered to indicate activity on CPUs
6211 23:43:38.998480 <6>[ 2.828968] usbcore: registered new interface driver usbhid
6212 23:43:39.002059 <6>[ 2.834807] usbhid: USB HID core driver
6213 23:43:39.012441 <6>[ 2.839112] spi_master spi2: will run message pump with realtime priority
6214 23:43:39.016156 <4>[ 2.839125] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6215 23:43:39.023681 <4>[ 2.853382] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6216 23:43:39.036466 <6>[ 2.858382] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6217 23:43:39.055788 <6>[ 2.876594] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6218 23:43:39.063035 <4>[ 2.887018] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6219 23:43:39.066236 <6>[ 2.891334] cros-ec-spi spi2.0: Chrome EC device registered
6220 23:43:39.080083 <4>[ 2.907487] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6221 23:43:39.091519 <4>[ 2.919000] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6222 23:43:39.098634 <4>[ 2.927660] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6223 23:43:39.105507 <6>[ 2.930917] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6224 23:43:39.111614 <6>[ 2.936846] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6225 23:43:39.115013 <6>[ 2.940960] mmc0: new HS400 MMC card at address 0001
6226 23:43:39.121864 <6>[ 2.952383] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6227 23:43:39.131502 <6>[ 2.961513] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6228 23:43:39.140167 <6>[ 2.970540] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6229 23:43:39.146724 <6>[ 2.977089] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6230 23:43:39.156995 <6>[ 2.977293] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6231 23:43:39.163346 <6>[ 2.983298] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6232 23:43:39.172775 <6>[ 2.995145] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6233 23:43:39.186434 <6>[ 3.000813] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6234 23:43:39.189568 <6>[ 3.009983] NET: Registered PF_PACKET protocol family
6235 23:43:39.199886 <6>[ 3.020610] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6236 23:43:39.206857 <6>[ 3.025875] 9pnet: Installing 9P2000 support
6237 23:43:39.209351 <5>[ 3.040463] Key type dns_resolver registered
6238 23:43:39.212862 <6>[ 3.045424] registered taskstats version 1
6239 23:43:39.219814 <5>[ 3.049792] Loading compiled-in X.509 certificates
6240 23:43:39.233429 <6>[ 3.060716] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6241 23:43:39.264117 <3>[ 3.091371] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6242 23:43:39.288049 <4>[ 3.112431] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6243 23:43:39.298615 <6>[ 3.123082] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6244 23:43:39.311592 <6>[ 3.134598] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6245 23:43:39.321190 <3>[ 3.145816] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6246 23:43:39.337561 <3>[ 3.161362] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6247 23:43:39.344423 <3>[ 3.173785] debugfs: File 'Playback' in directory 'dapm' already present!
6248 23:43:39.350819 <3>[ 3.180832] debugfs: File 'Capture' in directory 'dapm' already present!
6249 23:43:39.366977 <6>[ 3.190733] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6250 23:43:39.377641 <6>[ 3.204580] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6251 23:43:39.387569 <6>[ 3.213150] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6252 23:43:39.390797 <6>[ 3.216376] hub 1-1:1.0: USB hub found
6253 23:43:39.397164 <6>[ 3.221667] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6254 23:43:39.404286 <6>[ 3.226263] hub 1-1:1.0: 3 ports detected
6255 23:43:39.410148 <6>[ 3.234178] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6256 23:43:39.420392 <6>[ 3.246970] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6257 23:43:39.427461 <6>[ 3.255490] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6258 23:43:39.436553 <6>[ 3.264008] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6259 23:43:39.443448 <6>[ 3.273216] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6260 23:43:39.449697 <6>[ 3.280751] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6261 23:43:39.457080 <6>[ 3.288052] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6262 23:43:39.464944 <6>[ 3.295289] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6263 23:43:39.472239 <6>[ 3.302715] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6264 23:43:39.480197 <6>[ 3.310993] panfrost 13040000.gpu: clock rate = 511999970
6265 23:43:39.490332 <6>[ 3.316696] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6266 23:43:39.500504 <6>[ 3.326969] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6267 23:43:39.507044 <6>[ 3.334986] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6268 23:43:39.519936 <6>[ 3.343419] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6269 23:43:39.526643 <6>[ 3.355496] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6270 23:43:39.539329 <6>[ 3.366435] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6271 23:43:39.548789 <6>[ 3.375372] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6272 23:43:39.559375 <6>[ 3.384521] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6273 23:43:39.565996 <6>[ 3.393652] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6274 23:43:39.575835 <6>[ 3.402780] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6275 23:43:39.585872 <6>[ 3.412080] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6276 23:43:39.595882 <6>[ 3.421379] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6277 23:43:39.605755 <6>[ 3.430852] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6278 23:43:39.615881 <6>[ 3.440326] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6279 23:43:39.622344 <6>[ 3.449453] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6280 23:43:39.694682 <6>[ 3.521938] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6281 23:43:39.704631 <6>[ 3.530828] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6282 23:43:39.714777 <6>[ 3.542084] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6283 23:43:39.733466 <6>[ 3.560844] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6284 23:43:40.428624 <6>[ 3.753062] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6285 23:43:40.438200 <4>[ 3.870032] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6286 23:43:40.444760 <4>[ 3.870050] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6287 23:43:40.451305 <6>[ 3.918630] r8152 1-1.2:1.0 eth0: v1.12.13
6288 23:43:40.458449 <6>[ 3.996753] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6289 23:43:40.465214 <6>[ 4.239122] Console: switching to colour frame buffer device 170x48
6290 23:43:40.471781 <6>[ 4.299778] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6291 23:43:40.489666 <6>[ 4.316972] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6292 23:43:40.496166 <6>[ 4.324941] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6293 23:43:41.707644 <6>[ 5.538185] r8152 1-1.2:1.0 eth0: carrier on
6294 23:43:43.890019 <5>[ 5.568725] Sending DHCP requests .., OK
6295 23:43:43.896610 <6>[ 7.725083] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6296 23:43:43.899797 <6>[ 7.733530] IP-Config: Complete:
6297 23:43:43.913447 <6>[ 7.737097] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6298 23:43:43.923507 <6>[ 7.747998] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6299 23:43:43.930039 <6>[ 7.757481] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6300 23:43:43.933259 <6>[ 7.757491] nameserver0=192.168.201.1
6301 23:43:43.940066 <6>[ 7.769843] clk: Disabling unused clocks
6302 23:43:43.942865 <6>[ 7.774976] ALSA device list:
6303 23:43:43.951007 <6>[ 7.781588] #0: mt8183_mt6358_ts3a227_max98357
6304 23:43:43.962281 <6>[ 7.792877] Freeing unused kernel memory: 8512K
6305 23:43:43.969822 <6>[ 7.800337] Run /init as init process
6306 23:43:44.003591 <6>[ 7.834359] NET: Registered PF_INET6 protocol family
6307 23:43:44.010873 <6>[ 7.841073] Segment Routing with IPv6
6308 23:43:44.013840 <6>[ 7.845759] In-situ OAM (IOAM) with IPv6
6309 23:43:44.056087 <30>[ 7.860181] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6310 23:43:44.067292 <30>[ 7.897986] systemd[1]: Detected architecture arm64.
6311 23:43:44.071031
6312 23:43:44.074144 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6313 23:43:44.074609
6314 23:43:44.090389 <30>[ 7.920856] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6315 23:43:44.236992 <30>[ 8.063927] systemd[1]: Queued start job for default target graphical.target.
6316 23:43:44.259542 <30>[ 8.086485] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6317 23:43:44.266734 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6318 23:43:44.286513 <30>[ 8.113527] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6319 23:43:44.296329 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6320 23:43:44.314729 <30>[ 8.142130] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6321 23:43:44.326194 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6322 23:43:44.343048 <30>[ 8.169693] systemd[1]: Created slice user.slice - User and Session Slice.
6323 23:43:44.352728 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6324 23:43:44.373505 <30>[ 8.197143] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6325 23:43:44.384630 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6326 23:43:44.405606 <30>[ 8.229138] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6327 23:43:44.417096 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6328 23:43:44.444102 <30>[ 8.261029] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6329 23:43:44.462135 <30>[ 8.289286] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6330 23:43:44.469402 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6331 23:43:44.489600 <30>[ 8.316883] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6332 23:43:44.502377 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6333 23:43:44.517793 <30>[ 8.344958] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6334 23:43:44.532043 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6335 23:43:44.546832 <30>[ 8.376992] systemd[1]: Reached target paths.target - Path Units.
6336 23:43:44.561328 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6337 23:43:44.577367 <30>[ 8.404913] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6338 23:43:44.590293 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6339 23:43:44.602834 <30>[ 8.432879] systemd[1]: Reached target slices.target - Slice Units.
6340 23:43:44.616855 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6341 23:43:44.630498 <30>[ 8.460926] systemd[1]: Reached target swap.target - Swaps.
6342 23:43:44.641330 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6343 23:43:44.662090 <30>[ 8.488945] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6344 23:43:44.675284 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6345 23:43:44.694136 <30>[ 8.521293] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6346 23:43:44.708024 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6347 23:43:44.727527 <30>[ 8.554628] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6348 23:43:44.740934 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6349 23:43:44.758553 <30>[ 8.585766] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6350 23:43:44.772283 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6351 23:43:44.790081 <30>[ 8.617535] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6352 23:43:44.802537 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6353 23:43:44.822536 <30>[ 8.649713] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6354 23:43:44.835912 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6355 23:43:44.854143 <30>[ 8.681574] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6356 23:43:44.867238 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6357 23:43:44.886567 <30>[ 8.713392] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6358 23:43:44.899448 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6359 23:43:44.941927 <30>[ 8.769074] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6360 23:43:44.952404 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6361 23:43:44.973765 <30>[ 8.800846] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6362 23:43:44.984116 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6363 23:43:45.005516 <30>[ 8.832567] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6364 23:43:45.017457 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6365 23:43:45.041162 <30>[ 8.861577] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6366 23:43:45.082144 <30>[ 8.909345] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6367 23:43:45.095229 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6368 23:43:45.120093 <30>[ 8.946775] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6369 23:43:45.133769 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6370 23:43:45.174737 <30>[ 9.002066] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6371 23:43:45.189491 Startin<6>[ 9.013796] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6372 23:43:45.192041 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6373 23:43:45.215371 <30>[ 9.042432] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6374 23:43:45.224025 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6375 23:43:45.247329 <30>[ 9.074447] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6376 23:43:45.261599 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6377 23:43:45.283518 <30>[ 9.110525] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6378 23:43:45.295117 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6379 23:43:45.346186 <30>[ 9.173515] systemd[1]: Starting systemd-journald.service - Journal Service...
6380 23:43:45.356510 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6381 23:43:45.377660 <30>[ 9.204760] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6382 23:43:45.387559 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6383 23:43:45.413956 <30>[ 9.237588] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6384 23:43:45.426338 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6385 23:43:45.467366 <30>[ 9.293847] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6386 23:43:45.478869 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6387 23:43:45.505165 <30>[ 9.331974] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6388 23:43:45.515745 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6389 23:43:45.542865 <30>[ 9.369794] systemd[1]: Started systemd-journald.service - Journal Service.
6390 23:43:45.552996 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6391 23:43:45.572307 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6392 23:43:45.590911 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6393 23:43:45.611096 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6394 23:43:45.635387 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6395 23:43:45.660680 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6396 23:43:45.680557 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6397 23:43:45.705315 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6398 23:43:45.728970 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6399 23:43:45.748770 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6400 23:43:45.767527 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6401 23:43:45.786602 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6402 23:43:45.806388 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6403 23:43:45.826342 See 'systemctl status systemd-remount-fs.service' for details.
6404 23:43:45.852528 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6405 23:43:45.877478 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6406 23:43:45.918547 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6407 23:43:45.947889 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6408 23:43:45.960096 <46>[ 9.787034] systemd-journald[201]: Received client request to flush runtime journal.
6409 23:43:45.973839 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6410 23:43:45.995888 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6411 23:43:46.022007 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6412 23:43:46.049318 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6413 23:43:46.071550 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6414 23:43:46.095569 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6415 23:43:46.115348 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6416 23:43:46.135337 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6417 23:43:46.186456 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6418 23:43:46.226567 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6419 23:43:46.246625 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6420 23:43:46.265953 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6421 23:43:46.302276 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6422 23:43:46.325268 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6423 23:43:46.346075 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6424 23:43:46.369310 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6425 23:43:46.392561 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6426 23:43:46.409938 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6427 23:43:46.437839 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6428 23:43:46.454454 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6429 23:43:46.483949 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6430 23:43:46.622817 <3>[ 10.446713] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6431 23:43:46.626166 <3>[ 10.447338] thermal_sys: Failed to find 'trips' node
6432 23:43:46.632702 <4>[ 10.447354] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6433 23:43:46.639731 <3>[ 10.456752] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6434 23:43:46.649659 <4>[ 10.461803] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6435 23:43:46.655955 <3>[ 10.461972] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6436 23:43:46.662656 <3>[ 10.461986] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6437 23:43:46.672741 <4>[ 10.461991] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6438 23:43:46.676005 <3>[ 10.463314] mtk-scp 10500000.scp: invalid resource
6439 23:43:46.683755 <3>[ 10.466193] thermal_sys: Failed to find 'trips' node
6440 23:43:46.690398 <3>[ 10.466198] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6441 23:43:46.700486 <3>[ 10.466204] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6442 23:43:46.707107 <4>[ 10.466208] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6443 23:43:46.716613 <3>[ 10.469415] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6444 23:43:46.726705 <6>[ 10.476352] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6445 23:43:46.733395 <3>[ 10.483476] elan_i2c 2-0015: Error applying setting, reverse things back
6446 23:43:46.743265 <3>[ 10.494040] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6447 23:43:46.746457 <6>[ 10.515152] remoteproc remoteproc0: scp is available
6448 23:43:46.757739 <3>[ 10.519726] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6449 23:43:46.761051 <6>[ 10.520452] mc: Linux media interface: v0.10
6450 23:43:46.771453 <4>[ 10.526954] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6451 23:43:46.780685 <3>[ 10.535155] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6452 23:43:46.787538 <6>[ 10.535961] cs_system_cfg: CoreSight Configuration manager initialised
6453 23:43:46.790712 <6>[ 10.542845] remoteproc remoteproc0: powering up scp
6454 23:43:46.801872 <3>[ 10.549632] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6455 23:43:46.808588 <3>[ 10.549656] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6456 23:43:46.818432 <3>[ 10.549661] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6457 23:43:46.825484 <3>[ 10.549668] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6458 23:43:46.835270 <3>[ 10.549672] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6459 23:43:46.845474 <3>[ 10.561603] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6460 23:43:46.852017 <4>[ 10.562213] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6461 23:43:46.862139 <6>[ 10.562416] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6462 23:43:46.868806 <6>[ 10.564244] videodev: Linux video capture interface: v2.00
6463 23:43:46.875369 <6>[ 10.564648] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6464 23:43:46.885245 <6>[ 10.569138] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6465 23:43:46.891878 <5>[ 10.571793] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6466 23:43:46.898542 <3>[ 10.577639] remoteproc remoteproc0: request_firmware failed: -2
6467 23:43:46.904919 <5>[ 10.586832] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6468 23:43:46.911874 <6>[ 10.594078] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6469 23:43:46.922162 <5>[ 10.598350] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6470 23:43:46.932100 <6>[ 10.606780] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6471 23:43:46.942186 <4>[ 10.614986] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6472 23:43:46.951854 <6>[ 10.622123] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6473 23:43:46.958593 <6>[ 10.627143] cfg80211: failed to load regulatory.db
6474 23:43:46.965313 <6>[ 10.635759] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6475 23:43:46.975313 <6>[ 10.635811] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6476 23:43:46.978595 <6>[ 10.664109] Bluetooth: Core ver 2.22
6477 23:43:46.988342 <6>[ 10.671702] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6478 23:43:46.991510 <6>[ 10.679977] NET: Registered PF_BLUETOOTH protocol family
6479 23:43:47.002229 <6>[ 10.696288] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6480 23:43:47.008846 <6>[ 10.697113] Bluetooth: HCI device and connection manager initialized
6481 23:43:47.015488 <6>[ 10.697128] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6482 23:43:47.022262 <6>[ 10.697931] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6483 23:43:47.029477 <6>[ 10.698318] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6484 23:43:47.039456 <6>[ 10.698432] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6485 23:43:47.049372 <6>[ 10.698835] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6486 23:43:47.059728 <6>[ 10.715989] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6487 23:43:47.066437 <6>[ 10.719167] Bluetooth: HCI socket layer initialized
6488 23:43:47.073288 <6>[ 10.727354] usbcore: registered new interface driver uvcvideo
6489 23:43:47.079724 <6>[ 10.733318] Bluetooth: L2CAP socket layer initialized
6490 23:43:47.086254 <6>[ 10.733331] Bluetooth: SCO socket layer initialized
6491 23:43:47.096118 <6>[ 10.746521] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6492 23:43:47.102697 <6>[ 10.786951] Bluetooth: HCI UART driver ver 2.3
6493 23:43:47.109347 <6>[ 10.788536] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6494 23:43:47.116059 <6>[ 10.793540] Bluetooth: HCI UART protocol H4 registered
6495 23:43:47.122965 <6>[ 10.793581] Bluetooth: HCI UART protocol LL registered
6496 23:43:47.135941 <6>[ 10.801767] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6497 23:43:47.142941 <6>[ 10.810760] Bluetooth: HCI UART protocol Three-wire (H5) registered
6498 23:43:47.150236 <6>[ 10.962918] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6499 23:43:47.153645 <6>[ 10.970794] Bluetooth: HCI UART protocol Broadcom registered
6500 23:43:47.162435 <4>[ 10.981251] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6501 23:43:47.169455 <4>[ 10.981251] Fallback method does not support PEC.
6502 23:43:47.177448 <3>[ 10.984234] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6503 23:43:47.180661 <6>[ 10.984349] Bluetooth: HCI UART protocol QCA registered
6504 23:43:47.191305 <6>[ 10.984382] Bluetooth: HCI UART protocol Marvell registered
6505 23:43:47.201358 <6>[ 10.987120] Bluetooth: hci0: setting up ROME/QCA6390
6506 23:43:47.214264 <3>[ 10.993905] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6507 23:43:47.226425 <3>[ 10.996285] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6508 23:43:47.237684 <3>[ 11.002103] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6509 23:43:47.249729 <3>[ 11.009416] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6510 23:43:47.255862 <3>[ 11.081902] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6511 23:43:47.268704 <3>[ 11.094691] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6512 23:43:47.276044 <3>[ 11.101829] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6513 23:43:47.285759 <3>[ 11.109956] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6514 23:43:47.356200 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 11.182173] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6515 23:43:47.356501 d-backlight.
6516 23:43:47.375487 [[0;32m OK [0m] Reached targ<3>[ 11.203602] Bluetooth: hci0: Frame reassembly failed (-84)
6517 23:43:47.378692 et [0;1;39msound.target[0m - Sound Card.
6518 23:43:47.393635 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6519 23:43:47.434557 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6520 23:43:47.464222 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6521 23:43:47.489357 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6522 23:43:47.514011 <6>[ 11.341024] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6523 23:43:47.526287 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6524 23:43:47.542292 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6525 23:43:47.559487 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6526 23:43:47.578652 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6527 23:43:47.598201 [[0;32m OK [<4>[ 11.426167] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6528 23:43:47.604857 0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6529 23:43:47.617916 <4>[ 11.445365] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6530 23:43:47.631395 [[0;32m OK [0m] Listening on [0;1;39mdbus.s<4>[ 11.459274] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6531 23:43:47.634707 ocket[…- D-Bus System Message Bus Socket.
6532 23:43:47.641845 <4>[ 11.472307] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6533 23:43:47.655373 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6534 23:43:47.663828 <6>[ 11.494260] Bluetooth: hci0: QCA Product ID :0x00000008
6535 23:43:47.670186 <6>[ 11.500638] Bluetooth: hci0: QCA SOC Version :0x00000044
6536 23:43:47.677080 <6>[ 11.506902] Bluetooth: hci0: QCA ROM Version :0x00000302
6537 23:43:47.683711 <6>[ 11.506906] Bluetooth: hci0: QCA Patch Version:0x00000111
6538 23:43:47.690091 [[0;32m OK [<6>[ 11.506913] Bluetooth: hci0: QCA controller version 0x00440302
6539 23:43:47.700245 0m] Listening on [0;1;39msystem<6>[ 11.527787] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6540 23:43:47.709979 d-rfkil…l Swit<4>[ 11.536751] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6541 23:43:47.720111 ch Status /dev/r<3>[ 11.547466] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6542 23:43:47.723363 fkill Watch.
6543 23:43:47.726858 <3>[ 11.557017] Bluetooth: hci0: QCA Failed to download patch (-2)
6544 23:43:47.738177 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6545 23:43:47.782776 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6546 23:43:47.808457 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6547 23:43:47.826909 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6548 23:43:47.846572 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6549 23:43:47.887070 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6550 23:43:47.941720 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6551 23:43:47.965827 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6552 23:43:47.982766 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6553 23:43:48.008112 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6554 23:43:48.027492 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6555 23:43:48.079529 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6556 23:43:48.124397 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6557 23:43:48.147822 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6558 23:43:48.162821 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6559 23:43:48.182984 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6560 23:43:48.226752 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6561 23:43:48.262867 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6562 23:43:48.316880
6563 23:43:48.320227 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6564 23:43:48.320688
6565 23:43:48.323899 debian-bookworm-arm64 login: root (automatic login)
6566 23:43:48.324464
6567 23:43:48.345029 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Tue Jun 4 23:28:43 UTC 2024 aarch64
6568 23:43:48.345582
6569 23:43:48.352404 The programs included with the Debian GNU/Linux system are free software;
6570 23:43:48.358226 the exact distribution terms for each program are described in the
6571 23:43:48.362269 individual files in /usr/share/doc/*/copyright.
6572 23:43:48.362861
6573 23:43:48.368335 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6574 23:43:48.371797 permitted by applicable law.
6575 23:43:48.373275 Matched prompt #10: / #
6577 23:43:48.374281 Setting prompt string to ['/ #']
6578 23:43:48.374711 end: 2.2.5.1 login-action (duration 00:00:13) [common]
6580 23:43:48.375749 end: 2.2.5 auto-login-action (duration 00:00:13) [common]
6581 23:43:48.376197 start: 2.2.6 expect-shell-connection (timeout 00:03:40) [common]
6582 23:43:48.376550 Setting prompt string to ['/ #']
6583 23:43:48.376861 Forcing a shell prompt, looking for ['/ #']
6585 23:43:48.427579 / #
6586 23:43:48.428168 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6587 23:43:48.428668 Waiting using forced prompt support (timeout 00:02:30)
6588 23:43:48.433925
6589 23:43:48.434687 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6590 23:43:48.435174 start: 2.2.7 export-device-env (timeout 00:03:40) [common]
6591 23:43:48.435678 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6592 23:43:48.436145 end: 2.2 depthcharge-retry (duration 00:01:20) [common]
6593 23:43:48.436559 end: 2 depthcharge-action (duration 00:01:20) [common]
6594 23:43:48.437192 start: 3 lava-test-retry (timeout 00:08:17) [common]
6595 23:43:48.437640 start: 3.1 lava-test-shell (timeout 00:08:17) [common]
6596 23:43:48.438017 Using namespace: common
6598 23:43:48.538990 / # #
6599 23:43:48.539543 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6600 23:43:48.544644 #
6601 23:43:48.545411 Using /lava-14172910
6603 23:43:48.646430 / # export SHELL=/bin/sh
6604 23:43:48.652745 export SHELL=/bin/sh
6606 23:43:48.754305 / # . /lava-14172910/environment
6607 23:43:48.760232 . /lava-14172910/environment
6609 23:43:48.861920 / # /lava-14172910/bin/lava-test-runner /lava-14172910/0
6610 23:43:48.862599 Test shell timeout: 10s (minimum of the action and connection timeout)
6611 23:43:48.868226 /lava-14172910/bin/lava-test-runner /lava-14172910/0
6612 23:43:48.897902 + export TESTRUN_ID=0_v4l2-compliance-uvc
6613 23:43:48.900954 + cd /lava-14172910/0/tests/0_v4l2-compliance-uvc
6614 23:43:48.901380 + cat uuid
6615 23:43:48.904769 + UUID=14172910_1.5.2.3.1
6616 23:43:48.905347 + set +x
6617 23:43:48.911168 <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14172910_1.5.2.3.1>
6618 23:43:48.911887 Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14172910_1.5.2.3.1
6619 23:43:48.912249 Starting test lava.0_v4l2-compliance-uvc (14172910_1.5.2.3.1)
6620 23:43:48.912637 Skipping test definition patterns.
6621 23:43:48.914737 + /usr/bin/v4l2-parser.sh -d uvcvideo
6622 23:43:48.921058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>
6623 23:43:48.921600 device: /dev/video2
6624 23:43:48.922204 Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
6626 23:43:55.819921 v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t
6627 23:43:55.834530 v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54
6628 23:43:55.846268
6629 23:43:55.863016 Compliance test for uvcvideo device /dev/video2:
6630 23:43:55.874702
6631 23:43:55.889164 Driver Info:
6632 23:43:55.901891 Driver name : uvcvideo
6633 23:43:55.919071 Card type : HD WebCam: HD WebCam
6634 23:43:55.934874 Bus info : usb-11200000.usb-1.3
6635 23:43:55.945553 Driver version : 6.1.92
6636 23:43:55.959570 Capabilities : 0x84a00001
6637 23:43:55.977015 Metadata Capture
6638 23:43:55.992396 Streaming
6639 23:43:56.006065 Extended Pix Format
6640 23:43:56.019000 Device Capabilities
6641 23:43:56.035412 Device Caps : 0x04200001
6642 23:43:56.054265 Streaming
6643 23:43:56.068333 Extended Pix Format
6644 23:43:56.081771 Media Driver Info:
6645 23:43:56.098087 Driver name : uvcvideo
6646 23:43:56.115244 Model : HD WebCam: HD WebCam
6647 23:43:56.126002 Serial :
6648 23:43:56.144411 Bus info : usb-11200000.usb-1.3
6649 23:43:56.154901 Media version : 6.1.92
6650 23:43:56.172868 Hardware revision: 0x00003269 (12905)
6651 23:43:56.182364 Driver version : 6.1.92
6652 23:43:56.197225 Interface Info:
6653 23:43:56.216030 <LAVA_SIGNAL_TESTSET START Interface-Info>
6654 23:43:56.216278 ID : 0x03000002
6655 23:43:56.216681 Received signal: <TESTSET> START Interface-Info
6656 23:43:56.216878 Starting test_set Interface-Info
6657 23:43:56.231303 Type : V4L Video
6658 23:43:56.247915 Entity Info:
6659 23:43:56.257245 <LAVA_SIGNAL_TESTSET STOP>
6660 23:43:56.258092 Received signal: <TESTSET> STOP
6661 23:43:56.258493 Closing test_set Interface-Info
6662 23:43:56.266593 <LAVA_SIGNAL_TESTSET START Entity-Info>
6663 23:43:56.267515 Received signal: <TESTSET> START Entity-Info
6664 23:43:56.268172 Starting test_set Entity-Info
6665 23:43:56.269654 ID : 0x00000001 (1)
6666 23:43:56.285919 Name : HD WebCam: HD WebCam
6667 23:43:56.300318 Function : V4L2 I/O
6668 23:43:56.313794 Flags : default
6669 23:43:56.329164 Pad 0x01000007 : 0: Sink
6670 23:43:56.353077 Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable
6671 23:43:56.356943
6672 23:43:56.371656 Required ioctls:
6673 23:43:56.379215 <LAVA_SIGNAL_TESTSET STOP>
6674 23:43:56.380000 Received signal: <TESTSET> STOP
6675 23:43:56.380421 Closing test_set Entity-Info
6676 23:43:56.391113 <LAVA_SIGNAL_TESTSET START Required-ioctls>
6677 23:43:56.391787 Received signal: <TESTSET> START Required-ioctls
6678 23:43:56.392166 Starting test_set Required-ioctls
6679 23:43:56.393741 test MC information (see 'Media Driver Info' above): OK
6680 23:43:56.424150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>
6681 23:43:56.424466 Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
6683 23:43:56.426593 test VIDIOC_QUERYCAP: OK
6684 23:43:56.450204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6685 23:43:56.450694 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6687 23:43:56.453567 test invalid ioctls: OK
6688 23:43:56.481542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>
6689 23:43:56.482066
6690 23:43:56.482667 Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
6692 23:43:56.495792 Allow for multiple opens:
6693 23:43:56.506840 <LAVA_SIGNAL_TESTSET STOP>
6694 23:43:56.507529 Received signal: <TESTSET> STOP
6695 23:43:56.507892 Closing test_set Required-ioctls
6696 23:43:56.517330 <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>
6697 23:43:56.518018 Received signal: <TESTSET> START Allow-for-multiple-opens
6698 23:43:56.518378 Starting test_set Allow-for-multiple-opens
6699 23:43:56.520796 test second /dev/video2 open: OK
6700 23:43:56.547319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video2-open RESULT=pass>
6701 23:43:56.547628 Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video2-open RESULT=pass
6703 23:43:56.550798 test VIDIOC_QUERYCAP: OK
6704 23:43:56.577374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6705 23:43:56.577912 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6707 23:43:56.580539 test VIDIOC_G/S_PRIORITY: OK
6708 23:43:56.608194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>
6709 23:43:56.608794 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
6711 23:43:56.611036 test for unlimited opens: OK
6712 23:43:56.637933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>
6713 23:43:56.638468
6714 23:43:56.639039 Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
6716 23:43:56.651953 Debug ioctls:
6717 23:43:56.662365 <LAVA_SIGNAL_TESTSET STOP>
6718 23:43:56.662939 Received signal: <TESTSET> STOP
6719 23:43:56.663179 Closing test_set Allow-for-multiple-opens
6720 23:43:56.673410 <LAVA_SIGNAL_TESTSET START Debug-ioctls>
6721 23:43:56.674099 Received signal: <TESTSET> START Debug-ioctls
6722 23:43:56.674461 Starting test_set Debug-ioctls
6723 23:43:56.676659 test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
6724 23:43:56.702366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>
6725 23:43:56.703039 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
6727 23:43:56.709238 test VIDIOC_LOG_STATUS: OK (Not Supported)
6728 23:43:56.732603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>
6729 23:43:56.732891
6730 23:43:56.733332 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
6732 23:43:56.748895 Input ioctls:
6733 23:43:56.757698 <LAVA_SIGNAL_TESTSET STOP>
6734 23:43:56.758410 Received signal: <TESTSET> STOP
6735 23:43:56.758769 Closing test_set Debug-ioctls
6736 23:43:56.768550 <LAVA_SIGNAL_TESTSET START Input-ioctls>
6737 23:43:56.768819 Received signal: <TESTSET> START Input-ioctls
6738 23:43:56.768908 Starting test_set Input-ioctls
6739 23:43:56.772035 test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
6740 23:43:56.795668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>
6741 23:43:56.795936 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
6743 23:43:56.799664 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6744 23:43:56.822327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6745 23:43:56.823005 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6747 23:43:56.828650 test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
6748 23:43:56.852341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>
6749 23:43:56.853058 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
6751 23:43:56.855591 test VIDIOC_ENUMAUDIO: OK (Not Supported)
6752 23:43:56.881961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>
6753 23:43:56.882631 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
6755 23:43:56.885215 test VIDIOC_G/S/ENUMINPUT: OK
6756 23:43:56.911163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>
6757 23:43:56.911910 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
6759 23:43:56.914630 test VIDIOC_G/S_AUDIO: OK (Not Supported)
6760 23:43:56.943182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>
6761 23:43:56.944159 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
6763 23:43:56.946258 Inputs: 1 Audio Inputs: 0 Tuners: 0
6764 23:43:56.957643
6765 23:43:56.978952 test VIDIOC_G/S_MODULATOR: OK (Not Supported)
6766 23:43:57.004544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>
6767 23:43:57.005292 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
6769 23:43:57.011216 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6770 23:43:57.034035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6771 23:43:57.034719 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6773 23:43:57.040339 test VIDIOC_ENUMAUDOUT: OK (Not Supported)
6774 23:43:57.064015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>
6775 23:43:57.064698 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
6777 23:43:57.070845 test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
6778 23:43:57.093491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>
6779 23:43:57.094231 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
6781 23:43:57.100275 test VIDIOC_G/S_AUDOUT: OK (Not Supported)
6782 23:43:57.126046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>
6783 23:43:57.126319 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
6785 23:43:57.131324
6786 23:43:57.152635 test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
6787 23:43:57.180215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>
6788 23:43:57.180898 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
6790 23:43:57.186708 test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
6791 23:43:57.215121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>
6792 23:43:57.215821 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
6794 23:43:57.218342 test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
6795 23:43:57.242395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>
6796 23:43:57.243192 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
6798 23:43:57.249014 test VIDIOC_G/S_EDID: OK (Not Supported)
6799 23:43:57.275464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>
6800 23:43:57.275900
6801 23:43:57.276487 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
6803 23:43:57.290235 Control ioctls (Input 0):
6804 23:43:57.300521 <LAVA_SIGNAL_TESTSET STOP>
6805 23:43:57.301199 Received signal: <TESTSET> STOP
6806 23:43:57.301573 Closing test_set Input-ioctls
6807 23:43:57.312146 <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>
6808 23:43:57.312910 Received signal: <TESTSET> START Control-ioctls-Input-0
6809 23:43:57.313270 Starting test_set Control-ioctls-Input-0
6810 23:43:57.315109 test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
6811 23:43:57.344720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>
6812 23:43:57.345220 test VIDIOC_QUERYCTRL: OK
6813 23:43:57.345811 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
6815 23:43:57.372382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>
6816 23:43:57.372710 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
6818 23:43:57.375641 test VIDIOC_G/S_CTRL: OK
6819 23:43:57.403861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>
6820 23:43:57.404160 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
6822 23:43:57.407740 test VIDIOC_G/S/TRY_EXT_CTRLS: OK
6823 23:43:57.433363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>
6824 23:43:57.433779 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
6826 23:43:57.439896 test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
6827 23:43:57.468332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>
6828 23:43:57.469150 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
6830 23:43:57.471810 test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
6831 23:43:57.497977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>
6832 23:43:57.498965 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
6834 23:43:57.501127 Standard Controls: 15 Private Controls: 0
6835 23:43:57.513362
6836 23:43:57.528928 Format ioctls (Input 0):
6837 23:43:57.538070 <LAVA_SIGNAL_TESTSET STOP>
6838 23:43:57.538737 Received signal: <TESTSET> STOP
6839 23:43:57.539088 Closing test_set Control-ioctls-Input-0
6840 23:43:57.549901 <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>
6841 23:43:57.550573 Received signal: <TESTSET> START Format-ioctls-Input-0
6842 23:43:57.550945 Starting test_set Format-ioctls-Input-0
6843 23:43:57.552975 test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
6844 23:43:57.581364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>
6845 23:43:57.582072 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
6847 23:43:57.584146 test VIDIOC_G/S_PARM: OK
6848 23:43:57.611120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>
6849 23:43:57.611853 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
6851 23:43:57.614031 test VIDIOC_G_FBUF: OK (Not Supported)
6852 23:43:57.642298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>
6853 23:43:57.643089 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
6855 23:43:57.645661 test VIDIOC_G_FMT: OK
6856 23:43:57.677103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>
6857 23:43:57.677918 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
6859 23:43:57.680467 test VIDIOC_TRY_FMT: OK
6860 23:43:57.705498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>
6861 23:43:57.706298 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
6863 23:43:57.712156 warn: v4l2-test-formats.cpp(1046): Could not set fmt2
6864 23:43:57.720225 test VIDIOC_S_FMT: OK
6865 23:43:57.749620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>
6866 23:43:57.750427 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
6868 23:43:57.755903 test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
6869 23:43:57.792994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>
6870 23:43:57.793788 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
6872 23:43:57.796049 test Cropping: OK (Not Supported)
6873 23:43:57.824285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>
6874 23:43:57.825145 Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
6876 23:43:57.826967 test Composing: OK (Not Supported)
6877 23:43:57.855365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>
6878 23:43:57.856170 Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
6880 23:43:57.858593 test Scaling: OK (Not Supported)
6881 23:43:57.885808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>
6882 23:43:57.886234
6883 23:43:57.886960 Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
6885 23:43:57.901890 Codec ioctls (Input 0):
6886 23:43:57.911240 <LAVA_SIGNAL_TESTSET STOP>
6887 23:43:57.911543 Received signal: <TESTSET> STOP
6888 23:43:57.911623 Closing test_set Format-ioctls-Input-0
6889 23:43:57.922102 <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>
6890 23:43:57.922365 Received signal: <TESTSET> START Codec-ioctls-Input-0
6891 23:43:57.922446 Starting test_set Codec-ioctls-Input-0
6892 23:43:57.925410 test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
6893 23:43:57.954377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>
6894 23:43:57.954871 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
6896 23:43:57.960704 test VIDIOC_G_ENC_INDEX: OK (Not Supported)
6897 23:43:57.981757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>
6898 23:43:57.982430 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
6900 23:43:57.988285 test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
6901 23:43:58.014098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>
6902 23:43:58.014521
6903 23:43:58.015101 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
6905 23:43:58.030138 Buffer ioctls (Input 0):
6906 23:43:58.040660 <LAVA_SIGNAL_TESTSET STOP>
6907 23:43:58.041335 Received signal: <TESTSET> STOP
6908 23:43:58.041682 Closing test_set Codec-ioctls-Input-0
6909 23:43:58.052044 <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>
6910 23:43:58.052713 Received signal: <TESTSET> START Buffer-ioctls-Input-0
6911 23:43:58.053069 Starting test_set Buffer-ioctls-Input-0
6912 23:43:58.055595 test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
6913 23:43:58.085594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>
6914 23:43:58.086270 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
6916 23:43:58.088693 test CREATE_BUFS maximum buffers: OK
6917 23:43:58.117158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>
6918 23:43:58.117579 test VIDIOC_EXPBUF: OK
6919 23:43:58.118167 Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
6921 23:43:58.145285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>
6922 23:43:58.146045 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
6924 23:43:58.148680 test Requests: OK (Not Supported)
6925 23:43:58.178864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>
6926 23:43:58.179284
6927 23:43:58.179915 Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
6929 23:43:58.193260 Test input 0:
6930 23:43:58.205064
6931 23:43:58.221256 Streaming ioctls:
6932 23:43:58.230083 <LAVA_SIGNAL_TESTSET STOP>
6933 23:43:58.230492 Received signal: <TESTSET> STOP
6934 23:43:58.230625 Closing test_set Buffer-ioctls-Input-0
6935 23:43:58.242088 <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>
6936 23:43:58.242521 Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
6937 23:43:58.242668 Starting test_set Streaming-ioctls_Test-input-0
6938 23:43:58.244986 test read/write: OK (Not Supported)
6939 23:43:58.271872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>
6940 23:43:58.272643 Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
6942 23:43:58.275221 test blocking wait: OK
6943 23:43:58.304003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>
6944 23:43:58.304841 Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
6946 23:43:58.310370 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6947 23:43:58.316445 test MMAP (no poll): FAIL
6948 23:43:58.346876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>
6949 23:43:58.347559 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
6951 23:43:58.353385 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6952 23:43:58.362545 test MMAP (select): FAIL
6953 23:43:58.390790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>
6954 23:43:58.391511 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
6956 23:43:58.397665 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6957 23:43:58.405516 test MMAP (epoll): FAIL
6958 23:43:58.436337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>
6959 23:43:58.437113
6960 23:43:58.438079 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
6962 23:43:58.665306
6963 23:43:58.675303 test USERPTR (no poll): OK
6964 23:43:58.707175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>
6965 23:43:58.707758
6966 23:43:58.708385 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
6968 23:43:58.939923
6969 23:43:58.950139 test USERPTR (select): OK
6970 23:43:58.980385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>
6971 23:43:58.981210 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
6973 23:43:58.986933 test DMABUF: Cannot test, specify --expbuf-device
6974 23:43:58.993275
6975 23:43:59.016747 Total for uvcvideo device /dev/video2: 54, Succeeded: 51, Failed: 3, Warnings: 1
6976 23:43:59.022743 <LAVA_TEST_RUNNER EXIT>
6977 23:43:59.023548 ok: lava_test_shell seems to have completed
6978 23:43:59.023963 Marking unfinished test run as failed
6980 23:43:59.029415 CREATE_BUFS-maximum-buffers:
result: pass
set: Buffer-ioctls-Input-0
Composing:
result: pass
set: Format-ioctls-Input-0
Cropping:
result: pass
set: Format-ioctls-Input-0
MC-information-see-Media-Driver-Info-above:
result: pass
set: Required-ioctls
MMAP-epoll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-no-poll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-select:
result: fail
set: Streaming-ioctls_Test-input-0
Requests:
result: pass
set: Buffer-ioctls-Input-0
Scaling:
result: pass
set: Format-ioctls-Input-0
USERPTR-no-poll:
result: pass
set: Streaming-ioctls_Test-input-0
USERPTR-select:
result: pass
set: Streaming-ioctls_Test-input-0
VIDIOC_DBG_G/S_REGISTER:
result: pass
set: Debug-ioctls
VIDIOC_DV_TIMINGS_CAP:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_STD:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDIO:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDOUT:
result: pass
set: Input-ioctls
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
result: pass
set: Format-ioctls-Input-0
VIDIOC_EXPBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_G/S/ENUMINPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/ENUMOUTPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/TRY_EXT_CTRLS:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_AUDIO:
result: pass
set: Input-ioctls
VIDIOC_G/S_AUDOUT:
result: pass
set: Input-ioctls
VIDIOC_G/S_CTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_EDID:
result: pass
set: Input-ioctls
VIDIOC_G/S_FREQUENCY:
result: pass
set: Input-ioctls
VIDIOC_G/S_JPEGCOMP:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_MODULATOR:
result: pass
set: Input-ioctls
VIDIOC_G/S_PARM:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G/S_PRIORITY:
result: pass
set: Allow-for-multiple-opens
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
result: pass
set: Input-ioctls
VIDIOC_G_ENC_INDEX:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_G_FBUF:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_SLICED_VBI_CAP:
result: pass
set: Format-ioctls-Input-0
VIDIOC_LOG_STATUS:
result: pass
set: Debug-ioctls
VIDIOC_QUERYCAP:
result: pass
set: Allow-for-multiple-opens
VIDIOC_QUERYCTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
result: pass
set: Control-ioctls-Input-0
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_S_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_S_HW_FREQ_SEEK:
result: pass
set: Input-ioctls
VIDIOC_TRY_DECODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_ENCODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
result: pass
set: Control-ioctls-Input-0
blocking-wait:
result: pass
set: Streaming-ioctls_Test-input-0
device-presence: pass
for-unlimited-opens:
result: pass
set: Allow-for-multiple-opens
invalid-ioctls:
result: pass
set: Required-ioctls
read/write:
result: pass
set: Streaming-ioctls_Test-input-0
second-/dev/video2-open:
result: pass
set: Allow-for-multiple-opens
6981 23:43:59.030093 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6982 23:43:59.030571 end: 3 lava-test-retry (duration 00:00:11) [common]
6983 23:43:59.031095 start: 4 finalize (timeout 00:08:06) [common]
6984 23:43:59.031627 start: 4.1 power-off (timeout 00:00:30) [common]
6985 23:43:59.032468 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6986 23:44:00.157467 >> Command sent successfully.
6987 23:44:00.160090 Returned 0 in 1 seconds
6988 23:44:00.260522 end: 4.1 power-off (duration 00:00:01) [common]
6990 23:44:00.260899 start: 4.2 read-feedback (timeout 00:08:05) [common]
6991 23:44:00.261195 Listened to connection for namespace 'common' for up to 1s
6992 23:44:01.262119 Finalising connection for namespace 'common'
6993 23:44:01.262341 Disconnecting from shell: Finalise
6994 23:44:01.262461 / #
6995 23:44:01.362809 end: 4.2 read-feedback (duration 00:00:01) [common]
6996 23:44:01.362999 end: 4 finalize (duration 00:00:02) [common]
6997 23:44:01.363127 Cleaning after the job
6998 23:44:01.363238 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/ramdisk
6999 23:44:01.368072 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/kernel
7000 23:44:01.381870 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/dtb
7001 23:44:01.382102 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14172910/tftp-deploy-imj4l_g0/modules
7002 23:44:01.388072 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14172910
7003 23:44:01.457080 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14172910
7004 23:44:01.457273 Job finished correctly