[Enter `^Ec?' for help] [DL] 00000000 00000000 010701 F0: 102B 0000 F3: 1006 0033 [0200] F3: 4001 00E0 [0200] F3: 0000 0000 V0: 0000 0000 [0001] 00: 1027 0002 01: 0000 0000 BP: 0C00 0251 [0000] G0: 1182 0000 EC: 0004 0000 [0001] S7: 0000 0000 [0000] CC: 0000 0000 [0001] T0: 0000 00DB [000F] Jump to BL coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)... ARM64: Exception handlers installed. ARM64: Testing exception ARM64: Done test exception WDT: Last reset was cold boot SPI0(PAD0) initialized at 992727 Hz FMAP: area RW_NVRAM found @ 554000 (8192 bytes) Manufacturer: ef SF: Detected W25Q64DW with sector size 0x1000, total 0x800000 Probing TPM: . done! TPM ready after 0 ms Connected to device vid:did:rid of 1ae0:0028:00 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c Initialized TPM device CR50 revision 0 tlcl_send_startup: Startup return code is 0 TPM: setup succeeded src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0 out: cmd=0xd: 03 f0 0d 00 00 00 00 00 in-header: 03 19 00 00 08 00 00 00 in-data: a2 e0 47 00 13 00 00 00 Chrome EC: UHEPI supported out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 in-header: 03 a1 00 00 08 00 00 00 in-data: 84 60 60 10 00 00 00 00 Phase 1 FMAP: area GBB found @ 3f5000 (12032 bytes) VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0 VB2:vb2_check_recovery() Recovery was requested manually VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0 Recovery requested (1009000e) tlcl_extend: response is 0 tlcl_extend: response is 0 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)... ARM64: Exception handlers installed. ARM64: Testing exception ARM64: Done test exception [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a [RTC]rtc_get_frequency_meter,134: input=0xf, output=863 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733 [RTC]rtc_get_frequency_meter,134: input=0xb, output=796 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9 out: cmd=0xd: 03 f0 0d 00 00 00 00 00 in-header: 03 19 00 00 08 00 00 00 in-data: a2 e0 47 00 13 00 00 00 Chrome EC: UHEPI supported out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00 in-header: 03 a1 00 00 08 00 00 00 in-data: 84 60 60 10 00 00 00 00 Skip loading cached calibration data out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00 in-header: 03 a1 00 00 08 00 00 00 in-data: 84 60 60 10 00 00 00 00 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10 in-header: 03 a1 00 00 08 00 00 00 in-data: 84 60 60 10 00 00 00 00 ADC[3]: Raw value=1037832 ID=8 Manufacturer: ef SF: Detected W25Q64DW with sector size 0x1000, total 0x800000 FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB' CBFS: Found @ offset 3c880 size 4b DRAM-K: Full Calibration FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'fallback/dram' CBFS: Found @ offset 24b00 size 12268 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps ddr_geometry: 1, config: 0x0 header.status = 0x0 header.magic = 0x44524d4b (expected: 0x44524d4b) header.version = 0x5 (expected: 0x5) header.size = 0x8f0 (expected: 0x8f0) header.config = 0x0 header.flags = 0x0 header.checksum = 0x0 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5 Set DRAM voltage: vdram1 = 1125000, vddq = 600000 Get DRAM voltage to vdram1 = 1125000, vddq = 600000 ddr_geometry:1 [EMI] new MDL number = 1 dram_cbt_mode_extern: 0 dram_cbt_mode [RK0]: 0, [RK1]: 0 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154] [Bianco] ETT version 0.0.0.1 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6 vSetVcoreByFreq with vcore:762500, freq=1600 [DramcInit] AutoRefreshCKEOff AutoREF OFF DDRPhyPLLSetting-CKEOFF DDRPhyPLLSetting-CKEON Enable WDQS [ModeRegInit_LP4] CH0 RK0 Write Rank0 MR13 =0x18 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x1a Write Rank0 MR11 =0x0 Write Rank0 MR22 =0x38 Write Rank0 MR14 =0x5d Write Rank0 MR3 =0x30 Write Rank0 MR13 =0x58 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x2d Write Rank0 MR11 =0x23 Write Rank0 MR22 =0x34 Write Rank0 MR14 =0x10 Write Rank0 MR3 =0x30 Write Rank0 MR13 =0xd8 [ModeRegInit_LP4] CH0 RK1 Write Rank1 MR13 =0x18 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x1a Write Rank1 MR11 =0x0 Write Rank1 MR22 =0x38 Write Rank1 MR14 =0x5d Write Rank1 MR3 =0x30 Write Rank1 MR13 =0x58 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x2d Write Rank1 MR11 =0x23 Write Rank1 MR22 =0x34 Write Rank1 MR14 =0x10 Write Rank1 MR3 =0x30 Write Rank1 MR13 =0xd8 [ModeRegInit_LP4] CH1 RK0 Write Rank0 MR13 =0x18 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x1a Write Rank0 MR11 =0x0 Write Rank0 MR22 =0x38 Write Rank0 MR14 =0x5d Write Rank0 MR3 =0x30 Write Rank0 MR13 =0x58 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x2d Write Rank0 MR11 =0x23 Write Rank0 MR22 =0x34 Write Rank0 MR14 =0x10 Write Rank0 MR3 =0x30 Write Rank0 MR13 =0xd8 [ModeRegInit_LP4] CH1 RK1 Write Rank1 MR13 =0x18 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x1a Write Rank1 MR11 =0x0 Write Rank1 MR22 =0x38 Write Rank1 MR14 =0x5d Write Rank1 MR3 =0x30 Write Rank1 MR13 =0x58 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x2d Write Rank1 MR11 =0x23 Write Rank1 MR22 =0x34 Write Rank1 MR14 =0x10 Write Rank1 MR3 =0x30 Write Rank1 MR13 =0xd8 match AC timing 3 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0 [MiockJmeterHQA] vSetVcoreByFreq with vcore:762500, freq=1600 MIOCK jitter meter ch=0 1T = (100-18) = 82 dly cells Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps vSetVcoreByFreq with vcore:725000, freq=1200 MIOCK jitter meter ch=0 1T = (95-17) = 78 dly cells Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps vSetVcoreByFreq with vcore:725000, freq=800 MIOCK jitter meter ch=0 1T = (95-17) = 78 dly cells Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps vSetVcoreByFreq with vcore:762500, freq=1600 vSetVcoreByFreq with vcore:762500, freq=1600 K DRVP 1. OCD DRVP=0 CALOUT=0 1. OCD DRVP=1 CALOUT=0 1. OCD DRVP=2 CALOUT=0 1. OCD DRVP=3 CALOUT=0 1. OCD DRVP=4 CALOUT=0 1. OCD DRVP=5 CALOUT=0 1. OCD DRVP=6 CALOUT=0 1. OCD DRVP=7 CALOUT=0 1. OCD DRVP=8 CALOUT=0 1. OCD DRVP=9 CALOUT=1 1. OCD DRVP calibration OK! DRVP=9 K ODTN 3. OCD ODTN=0 ,CALOUT=1 3. OCD ODTN=1 ,CALOUT=1 3. OCD ODTN=2 ,CALOUT=1 3. OCD ODTN=3 ,CALOUT=1 3. OCD ODTN=4 ,CALOUT=1 3. OCD ODTN=5 ,CALOUT=1 3. OCD ODTN=6 ,CALOUT=1 3. OCD ODTN=7 ,CALOUT=0 3. OCD ODTN calibration OK! ODTN=7 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust) K DRVP 1. OCD DRVP=0 CALOUT=0 1. OCD DRVP=1 CALOUT=0 1. OCD DRVP=2 CALOUT=0 1. OCD DRVP=3 CALOUT=0 1. OCD DRVP=4 CALOUT=0 1. OCD DRVP=5 CALOUT=0 1. OCD DRVP=6 CALOUT=0 1. OCD DRVP=7 CALOUT=0 1. OCD DRVP=8 CALOUT=0 1. OCD DRVP=9 CALOUT=0 1. OCD DRVP=10 CALOUT=1 1. OCD DRVP calibration OK! DRVP=10 K ODTN 3. OCD ODTN=0 ,CALOUT=1 3. OCD ODTN=1 ,CALOUT=1 3. OCD ODTN=2 ,CALOUT=1 3. OCD ODTN=3 ,CALOUT=1 3. OCD ODTN=4 ,CALOUT=1 3. OCD ODTN=5 ,CALOUT=1 3. OCD ODTN=6 ,CALOUT=1 3. OCD ODTN=7 ,CALOUT=1 3. OCD ODTN=8 ,CALOUT=1 3. OCD ODTN=9 ,CALOUT=1 3. OCD ODTN=10 ,CALOUT=1 3. OCD ODTN=11 ,CALOUT=1 3. OCD ODTN=12 ,CALOUT=1 3. OCD ODTN=13 ,CALOUT=1 3. OCD ODTN=14 ,CALOUT=0 3. OCD ODTN calibration OK! ODTN=14 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust) [DramcInit] AutoRefreshCKEOff AutoREF OFF DDRPhyPLLSetting-CKEOFF DDRPhyPLLSetting-CKEON Enable WDQS == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [Duty_Offset_Calibration] =========================== B0:0 B1:1 CA:1 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [Duty_Offset_Calibration] =========================== B0:1 B1:1 CA:0 [ModeRegInit_LP4] CH0 RK0 Write Rank0 MR13 =0x18 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x1a Write Rank0 MR11 =0x0 Write Rank0 MR22 =0x38 Write Rank0 MR14 =0x5d Write Rank0 MR3 =0x30 Write Rank0 MR13 =0x58 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x2d Write Rank0 MR11 =0x23 Write Rank0 MR22 =0x34 Write Rank0 MR14 =0x10 Write Rank0 MR3 =0x30 Write Rank0 MR13 =0xd8 [ModeRegInit_LP4] CH0 RK1 Write Rank1 MR13 =0x18 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x1a Write Rank1 MR11 =0x0 Write Rank1 MR22 =0x38 Write Rank1 MR14 =0x5d Write Rank1 MR3 =0x30 Write Rank1 MR13 =0x58 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x2d Write Rank1 MR11 =0x23 Write Rank1 MR22 =0x34 Write Rank1 MR14 =0x10 Write Rank1 MR3 =0x30 Write Rank1 MR13 =0xd8 [ModeRegInit_LP4] CH1 RK0 Write Rank0 MR13 =0x18 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x1a Write Rank0 MR11 =0x0 Write Rank0 MR22 =0x38 Write Rank0 MR14 =0x5d Write Rank0 MR3 =0x30 Write Rank0 MR13 =0x58 Write Rank0 MR12 =0x5d Write Rank0 MR1 =0x56 Write Rank0 MR2 =0x2d Write Rank0 MR11 =0x23 Write Rank0 MR22 =0x34 Write Rank0 MR14 =0x10 Write Rank0 MR3 =0x30 Write Rank0 MR13 =0xd8 [ModeRegInit_LP4] CH1 RK1 Write Rank1 MR13 =0x18 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x1a Write Rank1 MR11 =0x0 Write Rank1 MR22 =0x38 Write Rank1 MR14 =0x5d Write Rank1 MR3 =0x30 Write Rank1 MR13 =0x58 Write Rank1 MR12 =0x5d Write Rank1 MR1 =0x56 Write Rank1 MR2 =0x2d Write Rank1 MR11 =0x23 Write Rank1 MR22 =0x34 Write Rank1 MR14 =0x10 Write Rank1 MR3 =0x30 Write Rank1 MR13 =0xd8 match AC timing 3 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0 DramC Write-DBI off DramC Read-DBI off Write Rank0 MR13 =0x59 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == === u2Vref_new: 0x56 --> 0x2d === u2Vref_new: 0x58 --> 0x38 === u2Vref_new: 0x5a --> 0x39 === u2Vref_new: 0x5c --> 0x3c === u2Vref_new: 0x5e --> 0x3d === u2Vref_new: 0x60 --> 0xa0 CBT Vref found, early break! [CA 0] Center 33 (4~63) winsize 60 [CA 1] Center 34 (5~63) winsize 59 [CA 2] Center 29 (1~57) winsize 57 [CA 3] Center 24 (-3~51) winsize 55 [CA 4] Center 25 (-3~53) winsize 57 [CA 5] Center 30 (2~58) winsize 57 [CATrainingPosCal] consider 1 rank data u2DelayCellTimex100 = 762/100 ps CA0 delay=33 (4~63),Diff = 9 PI (11 cell) CA1 delay=34 (5~63),Diff = 10 PI (12 cell) CA2 delay=29 (1~57),Diff = 5 PI (6 cell) CA3 delay=24 (-3~51),Diff = 0 PI (0 cell) CA4 delay=25 (-3~53),Diff = 1 PI (1 cell) CA5 delay=30 (2~58),Diff = 6 PI (7 cell) CA PerBit enable=1, Macro0, CA PI delay=24 === u2Vref_new: 0x56 --> 0x2d Vref(ca) range 1: 22 CS Dly= 10 (41-0-32) Write Rank0 MR13 =0xd8 Write Rank0 MR13 =0xd8 Write Rank0 MR12 =0x56 Write Rank1 MR13 =0x59 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == === u2Vref_new: 0x56 --> 0x2d === u2Vref_new: 0x58 --> 0x38 === u2Vref_new: 0x5a --> 0x39 === u2Vref_new: 0x5c --> 0x3c === u2Vref_new: 0x5e --> 0x3d === u2Vref_new: 0x60 --> 0xa0 [CA 0] Center 34 (5~63) winsize 59 [CA 1] Center 34 (6~63) winsize 58 [CA 2] Center 29 (0~58) winsize 59 [CA 3] Center 23 (-4~51) winsize 56 [CA 4] Center 24 (-3~52) winsize 56 [CA 5] Center 30 (1~59) winsize 59 [CATrainingPosCal] consider 2 rank data u2DelayCellTimex100 = 762/100 ps CA0 delay=34 (5~63),Diff = 10 PI (12 cell) CA1 delay=34 (6~63),Diff = 10 PI (12 cell) CA2 delay=29 (1~57),Diff = 5 PI (6 cell) CA3 delay=24 (-3~51),Diff = 0 PI (0 cell) CA4 delay=24 (-3~52),Diff = 0 PI (0 cell) CA5 delay=30 (2~58),Diff = 6 PI (7 cell) CA PerBit enable=1, Macro0, CA PI delay=24 === u2Vref_new: 0x56 --> 0x2d Vref(ca) range 1: 22 CS Dly= 11 (42-0-32) Write Rank1 MR13 =0xd8 Write Rank1 MR13 =0xd8 Write Rank1 MR12 =0x56 [RankSwap] Rank num 2, (Multi 1), Rank 0 Write Rank0 MR2 =0xad [Write Leveling] delay byte0 byte1 byte2 byte3 10 0 0 11 0 0 12 0 0 13 0 0 14 0 0 15 0 0 16 0 0 17 0 0 18 0 0 19 0 0 20 0 0 21 0 0 22 0 0 23 0 0 24 0 0 25 0 0 26 0 0 27 0 0 28 0 ff 29 0 ff 30 0 ff 31 0 ff 32 ff ff 33 ff ff 34 ff ff 35 ff ff 36 ff ff 37 ff ff 38 ff ff pass bytecount = 0xff (0xff: all bytes pass) DQS0 dly: 32 DQS1 dly: 28 Write Rank0 MR2 =0x2d [RankSwap] Rank num 2, (Multi 1), Rank 0 Write Rank0 MR1 =0xd6 [Gating] == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 28 |302 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 2 0 |606 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0 3 2 4 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 4 0 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 8 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 [Byte 0] Lead/lag falling Transition (3, 5, 24) [Byte 1] Lead/lag falling Transition (3, 5, 24) 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0 [Byte 0] Lead/lag Transition tap number (2) [Byte 1] Lead/lag Transition tap number (2) 3 6 0 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0 3 6 4 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0 [Byte 0]First pass (3, 6, 4) 3 6 8 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 [Byte 1]First pass (3, 6, 12) 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 All bytes gating window > 1UI, Early break! best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28) best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28) best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28) best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28) Write Rank0 MR1 =0x56 best RODT dly(2T, 0.5T) = (2, 2) best RODT dly(2T, 0.5T) = (2, 2) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =0 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 0 -26, [0] xxxxxxxx xxxxxxxx [MSB] -25, [0] xxxxxxxx xxxxxxxx [MSB] -24, [0] xxxxxxxx xxxxxxxx [MSB] -23, [0] xxxxxxxx xxxxxxxx [MSB] -22, [0] xxxxxxxx xxxxxxxx [MSB] -21, [0] xxxxxxxx xxxxxxxx [MSB] -20, [0] xxxxxxxx xxxxxxxx [MSB] -19, [0] xxxxxxxx xxxxxxxx [MSB] -18, [0] xxxxxxxx xxxxxxxx [MSB] -17, [0] xxxxxxxx xxxxxxxx [MSB] -16, [0] xxxxxxxx xxxxxxxx [MSB] -15, [0] xxxxxxxx xxxxxxxx [MSB] -14, [0] xxxxxxxx xxxxxxxx [MSB] -13, [0] xxxxxxxx xxxxxxxx [MSB] -12, [0] xxxxxxxx xxxxxxxx [MSB] -11, [0] xxxxxxxx xxxxxxxx [MSB] -10, [0] xxxxxxxx xxxxxxxx [MSB] -9, [0] xxxxxxxx xxxxxxxx [MSB] -8, [0] xxxxxxxx xxxxxxxx [MSB] -7, [0] xxxxxxxx xxxxxxxx [MSB] -6, [0] xxxxxxxx xxxxxxxx [MSB] -5, [0] xxxxxxxx xxxxxxxx [MSB] -4, [0] xxxxxxxx xxxxxxxx [MSB] -3, [0] xxxxxxxx xxxxxxxx [MSB] -2, [0] xxxxxxxx xxxxxxxx [MSB] -1, [0] xxxxxxxx xxxxxxxx [MSB] 0, [0] xxxoxxxx xxxxxxxx [MSB] 1, [0] xxxoxoxx xxxoxxxx [MSB] 2, [0] xxxoxoxx xxxoxxxx [MSB] 3, [0] xxxoxooo oxxoxoox [MSB] 4, [0] xxxoxooo oxxoxoox [MSB] 5, [0] xxxoxooo ooxooooo [MSB] 6, [0] xxxoxooo ooxooooo [MSB] 7, [0] xxoooooo ooxooooo [MSB] 8, [0] xooooooo oooooooo [MSB] 9, [0] xooooooo oooooooo [MSB] 31, [0] oooooooo oooooooo [MSB] 32, [0] oooxoooo oooooooo [MSB] 33, [0] oooxoooo oooooxoo [MSB] 34, [0] oooxoxxo oooooxxo [MSB] 35, [0] oooxoxxx xooooxxo [MSB] 36, [0] oooxoxxx xooxoxxx [MSB] 37, [0] oooxoxxx xxoxxxxx [MSB] 38, [0] oooxoxxx xxoxxxxx [MSB] 39, [0] oooxoxxx xxoxxxxx [MSB] 40, [0] oooxoxxx xxoxxxxx [MSB] 41, [0] xoxxxxxx xxoxxxxx [MSB] 42, [0] xxxxxxxx xxoxxxxx [MSB] 43, [0] xxxxxxxx xxxxxxxx [MSB] iDelay=43, Bit 0, Center 25 (10 ~ 40) 31 iDelay=43, Bit 1, Center 24 (8 ~ 41) 34 iDelay=43, Bit 2, Center 23 (7 ~ 40) 34 iDelay=43, Bit 3, Center 15 (0 ~ 31) 32 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34 iDelay=43, Bit 5, Center 17 (1 ~ 33) 33 iDelay=43, Bit 6, Center 18 (3 ~ 33) 31 iDelay=43, Bit 7, Center 18 (3 ~ 34) 32 iDelay=43, Bit 8, Center 18 (3 ~ 34) 32 iDelay=43, Bit 9, Center 20 (5 ~ 36) 32 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35 iDelay=43, Bit 11, Center 18 (1 ~ 35) 35 iDelay=43, Bit 12, Center 20 (5 ~ 36) 32 iDelay=43, Bit 13, Center 17 (3 ~ 32) 30 iDelay=43, Bit 14, Center 18 (3 ~ 33) 31 iDelay=43, Bit 15, Center 20 (5 ~ 35) 31 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 19 DQ Delay: DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15 DQ4 =23, DQ5 =17, DQ6 =18, DQ7 =18 DQ8 =18, DQ9 =20, DQ10 =25, DQ11 =18 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20 DramC Write-DBI off == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=2, VrefScanEnable 0 Begin, DQ Scan Range 924~1180 TX Vref Scan disable 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB] 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB] 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB] 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB] 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB] 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB] 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB] 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB] 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB] 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB] 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB] 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB] 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB] 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB] 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB] 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB] 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB] 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB] 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB] 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB] 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB] 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB] 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB] 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB] 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB] 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB] 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB] 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB] 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB] 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB] 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB] 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 962 |3 6 2|[0] xxxxxxxx xxxoxxxx [MSB] 963 |3 6 3|[0] xxxxxxxx xxxoxxxx [MSB] 964 |3 6 4|[0] xxxxxxxx ooxoxoxx [MSB] 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB] 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB] 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB] 968 |3 6 8|[0] xxxoxxxx ooxooooo [MSB] 969 |3 6 9|[0] xxxoxoox oooooooo [MSB] 970 |3 6 10|[0] xxxoxoox oooooooo [MSB] 971 |3 6 11|[0] xxxoooox oooooooo [MSB] 972 |3 6 12|[0] xxxooooo oooooooo [MSB] 973 |3 6 13|[0] xxoooooo oooooooo [MSB] 974 |3 6 14|[0] xooooooo oooooooo [MSB] 987 |3 6 27|[0] oooooooo oooooxoo [MSB] 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB] 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB] 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB] 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB] 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=980, DQM PI dly= 980 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20) Byte1, DQ PI dly=976, DQM PI dly= 976 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=0, VrefScanEnable 1 Begin, DQ Scan Range 952~1016 Write Rank0 MR14 =0x0 CH=0, VrefRange= 0, VrefLevel = 0 TX Bit0 (976~993) 18 984, Bit8 (966~983) 18 974, TX Bit1 (976~992) 17 984, Bit9 (967~984) 18 975, TX Bit2 (976~991) 16 983, Bit10 (970~989) 20 979, TX Bit3 (969~985) 17 977, Bit11 (966~983) 18 974, TX Bit4 (974~992) 19 983, Bit12 (967~983) 17 975, TX Bit5 (970~986) 17 978, Bit13 (967~982) 16 974, TX Bit6 (972~986) 15 979, Bit14 (968~984) 17 976, TX Bit7 (976~989) 14 982, Bit15 (969~985) 17 977, Write Rank0 MR14 =0x2 CH=0, VrefRange= 0, VrefLevel = 2 TX Bit0 (976~993) 18 984, Bit8 (966~984) 19 975, TX Bit1 (975~992) 18 983, Bit9 (967~984) 18 975, TX Bit2 (975~992) 18 983, Bit10 (970~989) 20 979, TX Bit3 (969~985) 17 977, Bit11 (965~984) 20 974, TX Bit4 (974~992) 19 983, Bit12 (967~984) 18 975, TX Bit5 (970~986) 17 978, Bit13 (966~983) 18 974, TX Bit6 (971~987) 17 979, Bit14 (968~984) 17 976, TX Bit7 (976~990) 15 983, Bit15 (969~986) 18 977, Write Rank0 MR14 =0x4 CH=0, VrefRange= 0, VrefLevel = 4 TX Bit0 (976~993) 18 984, Bit8 (965~984) 20 974, TX Bit1 (976~992) 17 984, Bit9 (967~984) 18 975, TX Bit2 (975~992) 18 983, Bit10 (970~989) 20 979, TX Bit3 (969~985) 17 977, Bit11 (964~984) 21 974, TX Bit4 (974~992) 19 983, Bit12 (967~984) 18 975, TX Bit5 (970~986) 17 978, Bit13 (966~983) 18 974, TX Bit6 (971~988) 18 979, Bit14 (967~985) 19 976, TX Bit7 (975~990) 16 982, Bit15 (969~987) 19 978, Write Rank0 MR14 =0x6 CH=0, VrefRange= 0, VrefLevel = 6 TX Bit0 (976~994) 19 985, Bit8 (964~985) 22 974, TX Bit1 (975~993) 19 984, Bit9 (966~985) 20 975, TX Bit2 (975~992) 18 983, Bit10 (969~990) 22 979, TX Bit3 (969~986) 18 977, Bit11 (964~984) 21 974, TX Bit4 (974~993) 20 983, Bit12 (967~985) 19 976, TX Bit5 (970~987) 18 978, Bit13 (966~984) 19 975, TX Bit6 (971~988) 18 979, Bit14 (967~985) 19 976, TX Bit7 (975~991) 17 983, Bit15 (969~988) 20 978, Write Rank0 MR14 =0x8 CH=0, VrefRange= 0, VrefLevel = 8 TX Bit0 (976~994) 19 985, Bit8 (964~985) 22 974, TX Bit1 (975~993) 19 984, Bit9 (966~985) 20 975, TX Bit2 (975~993) 19 984, Bit10 (969~990) 22 979, TX Bit3 (968~986) 19 977, Bit11 (964~985) 22 974, TX Bit4 (973~993) 21 983, Bit12 (966~985) 20 975, TX Bit5 (969~988) 20 978, Bit13 (965~983) 19 974, TX Bit6 (970~989) 20 979, Bit14 (967~986) 20 976, TX Bit7 (974~991) 18 982, Bit15 (969~988) 20 978, Write Rank0 MR14 =0xa CH=0, VrefRange= 0, VrefLevel = 10 TX Bit0 (975~994) 20 984, Bit8 (963~985) 23 974, TX Bit1 (975~993) 19 984, Bit9 (965~986) 22 975, TX Bit2 (974~993) 20 983, Bit10 (969~990) 22 979, TX Bit3 (968~987) 20 977, Bit11 (963~985) 23 974, TX Bit4 (973~993) 21 983, Bit12 (965~986) 22 975, TX Bit5 (969~988) 20 978, Bit13 (965~984) 20 974, TX Bit6 (970~990) 21 980, Bit14 (966~987) 22 976, TX Bit7 (973~991) 19 982, Bit15 (968~988) 21 978, Write Rank0 MR14 =0xc CH=0, VrefRange= 0, VrefLevel = 12 TX Bit0 (975~994) 20 984, Bit8 (963~986) 24 974, TX Bit1 (974~994) 21 984, Bit9 (966~986) 21 976, TX Bit2 (974~993) 20 983, Bit10 (969~990) 22 979, TX Bit3 (968~987) 20 977, Bit11 (963~986) 24 974, TX Bit4 (972~994) 23 983, Bit12 (965~986) 22 975, TX Bit5 (969~990) 22 979, Bit13 (964~984) 21 974, TX Bit6 (969~990) 22 979, Bit14 (966~988) 23 977, TX Bit7 (972~992) 21 982, Bit15 (968~989) 22 978, Write Rank0 MR14 =0xe CH=0, VrefRange= 0, VrefLevel = 14 TX Bit0 (975~995) 21 985, Bit8 (963~986) 24 974, TX Bit1 (974~993) 20 983, Bit9 (966~987) 22 976, TX Bit2 (974~993) 20 983, Bit10 (969~991) 23 980, TX Bit3 (968~988) 21 978, Bit11 (963~986) 24 974, TX Bit4 (972~994) 23 983, Bit12 (965~987) 23 976, TX Bit5 (969~990) 22 979, Bit13 (964~985) 22 974, TX Bit6 (969~991) 23 980, Bit14 (966~988) 23 977, TX Bit7 (972~992) 21 982, Bit15 (968~989) 22 978, Write Rank0 MR14 =0x10 CH=0, VrefRange= 0, VrefLevel = 16 TX Bit0 (975~996) 22 985, Bit8 (962~987) 26 974, TX Bit1 (974~994) 21 984, Bit9 (964~988) 25 976, TX Bit2 (973~994) 22 983, Bit10 (969~991) 23 980, TX Bit3 (967~988) 22 977, Bit11 (962~987) 26 974, TX Bit4 (971~995) 25 983, Bit12 (964~988) 25 976, TX Bit5 (969~990) 22 979, Bit13 (963~986) 24 974, TX Bit6 (969~991) 23 980, Bit14 (965~988) 24 976, TX Bit7 (972~992) 21 982, Bit15 (968~989) 22 978, Write Rank0 MR14 =0x12 CH=0, VrefRange= 0, VrefLevel = 18 TX Bit0 (974~996) 23 985, Bit8 (963~988) 26 975, TX Bit1 (974~994) 21 984, Bit9 (965~988) 24 976, TX Bit2 (973~994) 22 983, Bit10 (969~991) 23 980, TX Bit3 (967~989) 23 978, Bit11 (962~987) 26 974, TX Bit4 (971~995) 25 983, Bit12 (963~988) 26 975, TX Bit5 (968~991) 24 979, Bit13 (963~986) 24 974, TX Bit6 (969~991) 23 980, Bit14 (964~988) 25 976, TX Bit7 (971~993) 23 982, Bit15 (968~990) 23 979, Write Rank0 MR14 =0x14 CH=0, VrefRange= 0, VrefLevel = 20 TX Bit0 (974~996) 23 985, Bit8 (963~988) 26 975, TX Bit1 (973~995) 23 984, Bit9 (964~988) 25 976, TX Bit2 (972~994) 23 983, Bit10 (969~992) 24 980, TX Bit3 (967~990) 24 978, Bit11 (962~988) 27 975, TX Bit4 (970~995) 26 982, Bit12 (963~989) 27 976, TX Bit5 (968~991) 24 979, Bit13 (962~987) 26 974, TX Bit6 (969~992) 24 980, Bit14 (964~989) 26 976, TX Bit7 (971~993) 23 982, Bit15 (968~990) 23 979, Write Rank0 MR14 =0x16 CH=0, VrefRange= 0, VrefLevel = 22 TX Bit0 (973~997) 25 985, Bit8 (962~987) 26 974, TX Bit1 (972~995) 24 983, Bit9 (963~989) 27 976, TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979, TX Bit3 (967~990) 24 978, Bit11 (962~988) 27 975, TX Bit4 (971~996) 26 983, Bit12 (963~988) 26 975, TX Bit5 (968~991) 24 979, Bit13 (963~987) 25 975, TX Bit6 (968~992) 25 980, Bit14 (963~989) 27 976, TX Bit7 (971~993) 23 982, Bit15 (967~990) 24 978, Write Rank0 MR14 =0x18 CH=0, VrefRange= 0, VrefLevel = 24 TX Bit0 (973~997) 25 985, Bit8 (962~986) 25 974, TX Bit1 (972~995) 24 983, Bit9 (963~988) 26 975, TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979, TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975, TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976, TX Bit5 (968~991) 24 979, Bit13 (962~987) 26 974, TX Bit6 (968~992) 25 980, Bit14 (964~988) 25 976, TX Bit7 (970~993) 24 981, Bit15 (967~990) 24 978, Write Rank0 MR14 =0x1a CH=0, VrefRange= 0, VrefLevel = 26 TX Bit0 (973~997) 25 985, Bit8 (962~986) 25 974, TX Bit1 (972~995) 24 983, Bit9 (963~988) 26 975, TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979, TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975, TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976, TX Bit5 (968~991) 24 979, Bit13 (962~987) 26 974, TX Bit6 (968~992) 25 980, Bit14 (964~988) 25 976, TX Bit7 (970~993) 24 981, Bit15 (967~990) 24 978, Write Rank0 MR14 =0x1c CH=0, VrefRange= 0, VrefLevel = 28 TX Bit0 (973~997) 25 985, Bit8 (962~986) 25 974, TX Bit1 (972~995) 24 983, Bit9 (963~988) 26 975, TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979, TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975, TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976, TX Bit5 (968~991) 24 979, Bit13 (962~987) 26 974, TX Bit6 (968~992) 25 980, Bit14 (964~988) 25 976, TX Bit7 (970~993) 24 981, Bit15 (967~990) 24 978, Write Rank0 MR14 =0x1e CH=0, VrefRange= 0, VrefLevel = 30 TX Bit0 (973~997) 25 985, Bit8 (962~986) 25 974, TX Bit1 (972~995) 24 983, Bit9 (963~988) 26 975, TX Bit2 (972~995) 24 983, Bit10 (968~991) 24 979, TX Bit3 (967~991) 25 979, Bit11 (962~988) 27 975, TX Bit4 (972~996) 25 984, Bit12 (963~989) 27 976, TX Bit5 (968~991) 24 979, Bit13 (962~987) 26 974, TX Bit6 (968~992) 25 980, Bit14 (964~988) 25 976, TX Bit7 (970~993) 24 981, Bit15 (967~990) 24 978, TX Vref found, early break! 369< 380 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps u1DelayCellOfst[0]=7 cells (6 PI) u1DelayCellOfst[1]=5 cells (4 PI) u1DelayCellOfst[2]=5 cells (4 PI) u1DelayCellOfst[3]=0 cells (0 PI) u1DelayCellOfst[4]=6 cells (5 PI) u1DelayCellOfst[5]=0 cells (0 PI) u1DelayCellOfst[6]=1 cells (1 PI) u1DelayCellOfst[7]=2 cells (2 PI) Byte0, DQ PI dly=979, DQM PI dly= 982 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19) u1DelayCellOfst[8]=0 cells (0 PI) u1DelayCellOfst[9]=1 cells (1 PI) u1DelayCellOfst[10]=6 cells (5 PI) u1DelayCellOfst[11]=1 cells (1 PI) u1DelayCellOfst[12]=2 cells (2 PI) u1DelayCellOfst[13]=0 cells (0 PI) u1DelayCellOfst[14]=2 cells (2 PI) u1DelayCellOfst[15]=5 cells (4 PI) Byte1, DQ PI dly=974, DQM PI dly= 976 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14) Write Rank0 MR14 =0x18 Final TX Range 0 Vref 24 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec. Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank0 MR3 =0xb0 DramC Write-DBI on == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=1, VrefScanEnable 0 Begin, DQ Scan Range 696~760 TX Vref Scan disable 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB] 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB] 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB] 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB] 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB] 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB] 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB] 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB] 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB] 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB] 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB] 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB] 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB] 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB] 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB] 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB] 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB] 739 |2 6 35|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=726, DQM PI dly= 726 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22) Byte1, DQ PI dly=719, DQM PI dly= 719 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15) Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 Write Rank0 MR3 =0x30 DramC Write-DBI off [DATLAT] Freq=1600, CH0 RK0, use_rxtx_scan=0 DATLAT Default: 0xf 7, 0xFFFF, sum=0 8, 0xFFFF, sum=0 9, 0xFFFF, sum=0 10, 0xFFFF, sum=0 11, 0xFFFF, sum=0 12, 0xFFFF, sum=0 13, 0xFFFF, sum=0 14, 0x0, sum=1 15, 0x0, sum=2 16, 0x0, sum=3 17, 0x0, sum=4 pattern=2 first_step=14 total pass=5 best_step=16 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =1 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 1 RX Vref found, early break! Final RX Vref 13, apply to both rank0 and 1 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 19 DQ Delay: DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =19 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20 [DramC_TX_OE_Calibration] TA2 Original DQ_B0 (3 6) =30, OEN = 27 Original DQ_B1 (3 6) =30, OEN = 27 23, 0x0, End_B0=23 End_B1=23 24, 0x0, End_B0=24 End_B1=24 25, 0x0, End_B0=25 End_B1=25 26, 0x0, End_B0=26 End_B1=26 27, 0x0, End_B0=27 End_B1=27 28, 0x0, End_B0=28 End_B1=28 29, 0x0, End_B0=29 End_B1=29 30, 0x0, End_B0=30 End_B1=30 31, 0xFFFF, End_B0=30 End_B1=30 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Write Rank0 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps CH0_RK0: MR19=0x3, MR18=0xAA, DQSOSC=335, MR23=63, INC=21, DEC=32 Write Rank0 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK0, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps CH0 RK0: MR19=3, MR18=AD [RankSwap] Rank num 2, (Multi 1), Rank 1 Write Rank0 MR2 =0xad [Write Leveling] delay byte0 byte1 byte2 byte3 10 0 0 11 0 0 12 0 0 13 0 0 14 0 0 15 0 0 16 0 0 17 0 0 18 0 0 19 0 0 20 0 0 21 0 0 22 0 0 23 0 0 24 0 0 25 0 0 26 0 0 27 0 0 28 0 0 29 0 0 30 0 0 31 0 ff 32 0 ff 33 0 ff 34 ff ff 35 ff ff 36 ff ff 37 ff ff 38 ff ff 39 ff ff 40 ff ff pass bytecount = 0xff (0xff: all bytes pass) DQS0 dly: 34 DQS1 dly: 31 Write Rank0 MR2 =0x2d [RankSwap] Rank num 2, (Multi 1), Rank 0 Write Rank1 MR1 =0xd6 [Gating] == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 1)| 0 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0 3 2 8 |2c2b 2c2b |(11 1)(11 11) |(1 0)(1 0)| 0 3 2 12 |201 2c2c |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 4 8 |1110 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 4 12 |706 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 16 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 [Byte 0] Lead/lag falling Transition (3, 6, 0) 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0 [Byte 0] Lead/lag Transition tap number (2) [Byte 1] Lead/lag Transition tap number (1) 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0 3 6 12 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0 [Byte 0]First pass (3, 6, 16) 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 [Byte 1]First pass (3, 6, 20) 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 All bytes gating window > 1UI, Early break! best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4) best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6) best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4) best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6) Write Rank1 MR1 =0x56 best RODT dly(2T, 0.5T) = (2, 3) best RODT dly(2T, 0.5T) = (2, 3) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =0 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 0 -26, [0] xxxxxxxx xxxxxxxx [MSB] -25, [0] xxxxxxxx xxxxxxxx [MSB] -24, [0] xxxxxxxx xxxxxxxx [MSB] -23, [0] xxxxxxxx xxxxxxxx [MSB] -22, [0] xxxxxxxx xxxxxxxx [MSB] -21, [0] xxxxxxxx xxxxxxxx [MSB] -20, [0] xxxxxxxx xxxxxxxx [MSB] -19, [0] xxxxxxxx xxxxxxxx [MSB] -18, [0] xxxxxxxx xxxxxxxx [MSB] -17, [0] xxxxxxxx xxxxxxxx [MSB] -16, [0] xxxxxxxx xxxxxxxx [MSB] -15, [0] xxxxxxxx xxxxxxxx [MSB] -14, [0] xxxxxxxx xxxxxxxx [MSB] -13, [0] xxxxxxxx xxxxxxxx [MSB] -12, [0] xxxxxxxx xxxxxxxx [MSB] -11, [0] xxxxxxxx xxxxxxxx [MSB] -10, [0] xxxxxxxx xxxxxxxx [MSB] -9, [0] xxxxxxxx xxxxxxxx [MSB] -8, [0] xxxxxxxx xxxxxxxx [MSB] -7, [0] xxxxxxxx xxxxxxxx [MSB] -6, [0] xxxxxxxx xxxxxxxx [MSB] -5, [0] xxxxxxxx xxxxxxxx [MSB] -4, [0] xxxxxxxx xxxxxxxx [MSB] -3, [0] xxxxxxxx xxxxxxxx [MSB] -2, [0] xxxxxxxx xxxxxxxx [MSB] -1, [0] xxxoxxxx xxxxxxxx [MSB] 0, [0] xxxoxxxx oxxoxoox [MSB] 1, [0] xxxoxoxx oxxoxoox [MSB] 2, [0] xxxoxooo ooxoooox [MSB] 3, [0] xxxoxooo ooxooooo [MSB] 4, [0] xxxoxooo ooxooooo [MSB] 5, [0] xxxoxooo ooxooooo [MSB] 6, [0] xxxooooo oooooooo [MSB] 7, [0] xooooooo oooooooo [MSB] 8, [0] xooooooo oooooooo [MSB] 34, [0] oooooooo oooooooo [MSB] 35, [0] oooxoooo oooxoooo [MSB] 36, [0] oooxoooo oooxoxxo [MSB] 37, [0] oooxoxxx xooxoxxo [MSB] 38, [0] oooxoxxx xxoxxxxo [MSB] 39, [0] oooxoxxx xxoxxxxx [MSB] 40, [0] oooxoxxx xxoxxxxx [MSB] 41, [0] oooxoxxx xxoxxxxx [MSB] 42, [0] oooxxxxx xxoxxxxx [MSB] 43, [0] xoxxxxxx xxxxxxxx [MSB] 44, [0] xxxxxxxx xxxxxxxx [MSB] iDelay=44, Bit 0, Center 25 (9 ~ 42) 34 iDelay=44, Bit 1, Center 25 (7 ~ 43) 37 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36 iDelay=44, Bit 5, Center 18 (1 ~ 36) 36 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37 iDelay=44, Bit 9, Center 19 (2 ~ 37) 36 iDelay=44, Bit 10, Center 24 (6 ~ 42) 37 iDelay=44, Bit 11, Center 17 (0 ~ 34) 35 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36 iDelay=44, Bit 13, Center 17 (0 ~ 35) 36 iDelay=44, Bit 14, Center 17 (0 ~ 35) 36 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 21, DQM1 = 18 DQ Delay: DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =16 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =19 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17 DQ12 =19, DQ13 =17, DQ14 =17, DQ15 =20 DramC Write-DBI off == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=2, VrefScanEnable 0 Begin, DQ Scan Range 927~1183 TX Vref Scan disable 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB] 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB] 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB] 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB] 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB] 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB] 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB] 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB] 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB] 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB] 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB] 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB] 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB] 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB] 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB] 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB] 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB] 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB] 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB] 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB] 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB] 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB] 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB] 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB] 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB] 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB] 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB] 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB] 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB] 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB] 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB] 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB] 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB] 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB] 968 |3 6 8|[0] xxxxxxxx xxxoxxxx [MSB] 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB] 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB] 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB] 972 |3 6 12|[0] xxxoxoxx ooxoooox [MSB] 973 |3 6 13|[0] xxxoxoox ooxooooo [MSB] 974 |3 6 14|[0] xxxoxoox ooxooooo [MSB] 975 |3 6 15|[0] xxxoxoox oooooooo [MSB] 976 |3 6 16|[0] xxxoxooo oooooooo [MSB] 977 |3 6 17|[0] xooooooo oooooooo [MSB] 991 |3 6 31|[0] oooooooo oxxxxxxx [MSB] 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB] 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB] 994 |3 6 34|[0] oooooxoo xxxxxxxx [MSB] 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB] 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB] 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=984, DQM PI dly= 984 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24) Byte1, DQ PI dly=980, DQM PI dly= 980 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=0, VrefScanEnable 1 Begin, DQ Scan Range 956~1020 Write Rank1 MR14 =0x0 CH=0, VrefRange= 0, VrefLevel = 0 TX Bit0 (979~998) 20 988, Bit8 (971~988) 18 979, TX Bit1 (979~996) 18 987, Bit9 (973~989) 17 981, TX Bit2 (979~996) 18 987, Bit10 (976~992) 17 984, TX Bit3 (973~991) 19 982, Bit11 (969~989) 21 979, TX Bit4 (979~996) 18 987, Bit12 (972~989) 18 980, TX Bit5 (976~990) 15 983, Bit13 (970~987) 18 978, TX Bit6 (976~992) 17 984, Bit14 (973~989) 17 981, TX Bit7 (977~993) 17 985, Bit15 (976~990) 15 983, Write Rank1 MR14 =0x2 CH=0, VrefRange= 0, VrefLevel = 2 TX Bit0 (979~998) 20 988, Bit8 (971~989) 19 980, TX Bit1 (978~997) 20 987, Bit9 (971~989) 19 980, TX Bit2 (979~996) 18 987, Bit10 (976~992) 17 984, TX Bit3 (973~991) 19 982, Bit11 (969~989) 21 979, TX Bit4 (978~997) 20 987, Bit12 (971~990) 20 980, TX Bit5 (976~991) 16 983, Bit13 (970~988) 19 979, TX Bit6 (976~992) 17 984, Bit14 (971~989) 19 980, TX Bit7 (977~993) 17 985, Bit15 (975~990) 16 982, Write Rank1 MR14 =0x4 CH=0, VrefRange= 0, VrefLevel = 4 TX Bit0 (979~999) 21 989, Bit8 (971~989) 19 980, TX Bit1 (978~997) 20 987, Bit9 (972~990) 19 981, TX Bit2 (978~997) 20 987, Bit10 (976~993) 18 984, TX Bit3 (972~991) 20 981, Bit11 (970~989) 20 979, TX Bit4 (978~998) 21 988, Bit12 (971~990) 20 980, TX Bit5 (976~991) 16 983, Bit13 (970~989) 20 979, TX Bit6 (975~992) 18 983, Bit14 (971~990) 20 980, TX Bit7 (977~994) 18 985, Bit15 (975~991) 17 983, Write Rank1 MR14 =0x6 CH=0, VrefRange= 0, VrefLevel = 6 TX Bit0 (978~999) 22 988, Bit8 (970~990) 21 980, TX Bit1 (978~998) 21 988, Bit9 (972~990) 19 981, TX Bit2 (978~998) 21 988, Bit10 (976~993) 18 984, TX Bit3 (972~992) 21 982, Bit11 (969~990) 22 979, TX Bit4 (978~998) 21 988, Bit12 (971~990) 20 980, TX Bit5 (975~991) 17 983, Bit13 (970~989) 20 979, TX Bit6 (975~993) 19 984, Bit14 (971~990) 20 980, TX Bit7 (977~994) 18 985, Bit15 (974~991) 18 982, Write Rank1 MR14 =0x8 CH=0, VrefRange= 0, VrefLevel = 8 TX Bit0 (978~999) 22 988, Bit8 (970~990) 21 980, TX Bit1 (977~998) 22 987, Bit9 (971~991) 21 981, TX Bit2 (978~998) 21 988, Bit10 (976~993) 18 984, TX Bit3 (971~992) 22 981, Bit11 (968~990) 23 979, TX Bit4 (977~998) 22 987, Bit12 (970~991) 22 980, TX Bit5 (975~992) 18 983, Bit13 (969~990) 22 979, TX Bit6 (975~993) 19 984, Bit14 (971~990) 20 980, TX Bit7 (977~995) 19 986, Bit15 (975~991) 17 983, Write Rank1 MR14 =0xa CH=0, VrefRange= 0, VrefLevel = 10 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979, TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980, TX Bit2 (977~998) 22 987, Bit10 (975~994) 20 984, TX Bit3 (971~993) 23 982, Bit11 (969~990) 22 979, TX Bit4 (978~999) 22 988, Bit12 (970~991) 22 980, TX Bit5 (974~992) 19 983, Bit13 (969~990) 22 979, TX Bit6 (974~994) 21 984, Bit14 (970~990) 21 980, TX Bit7 (976~996) 21 986, Bit15 (974~992) 19 983, Write Rank1 MR14 =0xc CH=0, VrefRange= 0, VrefLevel = 12 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979, TX Bit1 (978~999) 22 988, Bit9 (971~991) 21 981, TX Bit2 (977~999) 23 988, Bit10 (975~994) 20 984, TX Bit3 (970~993) 24 981, Bit11 (969~991) 23 980, TX Bit4 (978~999) 22 988, Bit12 (969~991) 23 980, TX Bit5 (974~992) 19 983, Bit13 (969~990) 22 979, TX Bit6 (974~994) 21 984, Bit14 (969~991) 23 980, TX Bit7 (976~995) 20 985, Bit15 (974~992) 19 983, Write Rank1 MR14 =0xe CH=0, VrefRange= 0, VrefLevel = 14 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980, TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980, TX Bit2 (977~999) 23 988, Bit10 (975~995) 21 985, TX Bit3 (970~993) 24 981, Bit11 (968~991) 24 979, TX Bit4 (977~999) 23 988, Bit12 (969~991) 23 980, TX Bit5 (973~993) 21 983, Bit13 (969~990) 22 979, TX Bit6 (973~995) 23 984, Bit14 (970~991) 22 980, TX Bit7 (976~997) 22 986, Bit15 (973~993) 21 983, Write Rank1 MR14 =0x10 CH=0, VrefRange= 0, VrefLevel = 16 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980, TX Bit1 (978~999) 22 988, Bit9 (970~991) 22 980, TX Bit2 (977~999) 23 988, Bit10 (975~995) 21 985, TX Bit3 (970~993) 24 981, Bit11 (968~991) 24 979, TX Bit4 (977~999) 23 988, Bit12 (969~991) 23 980, TX Bit5 (973~993) 21 983, Bit13 (969~990) 22 979, TX Bit6 (973~995) 23 984, Bit14 (970~991) 22 980, TX Bit7 (976~997) 22 986, Bit15 (973~993) 21 983, Write Rank1 MR14 =0x12 CH=0, VrefRange= 0, VrefLevel = 18 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~999) 23 988, Bit10 (974~996) 23 985, TX Bit3 (970~994) 25 982, Bit11 (968~991) 24 979, TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980, TX Bit5 (972~994) 23 983, Bit13 (968~991) 24 979, TX Bit6 (972~996) 25 984, Bit14 (969~991) 23 980, TX Bit7 (976~998) 23 987, Bit15 (972~993) 22 982, Write Rank1 MR14 =0x14 CH=0, VrefRange= 0, VrefLevel = 20 TX Bit0 (978~1001) 24 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~999) 23 988, Bit10 (975~997) 23 986, TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979, TX Bit4 (976~1000) 25 988, Bit12 (968~992) 25 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (972~997) 26 984, Bit14 (969~992) 24 980, TX Bit7 (975~998) 24 986, Bit15 (971~994) 24 982, Write Rank1 MR14 =0x16 CH=0, VrefRange= 0, VrefLevel = 22 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985, TX Bit3 (969~995) 27 982, Bit11 (968~991) 24 979, TX Bit4 (976~1000) 25 988, Bit12 (969~992) 24 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (971~998) 28 984, Bit14 (969~992) 24 980, TX Bit7 (974~998) 25 986, Bit15 (971~994) 24 982, Write Rank1 MR14 =0x18 CH=0, VrefRange= 0, VrefLevel = 24 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985, TX Bit3 (969~995) 27 982, Bit11 (968~991) 24 979, TX Bit4 (976~1000) 25 988, Bit12 (969~992) 24 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (971~998) 28 984, Bit14 (969~992) 24 980, TX Bit7 (974~998) 25 986, Bit15 (971~994) 24 982, Write Rank1 MR14 =0x1a CH=0, VrefRange= 0, VrefLevel = 26 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985, TX Bit3 (969~995) 27 982, Bit11 (968~991) 24 979, TX Bit4 (976~1000) 25 988, Bit12 (969~992) 24 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (971~998) 28 984, Bit14 (969~992) 24 980, TX Bit7 (974~998) 25 986, Bit15 (971~994) 24 982, Write Rank1 MR14 =0x1c CH=0, VrefRange= 0, VrefLevel = 28 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985, TX Bit3 (969~995) 27 982, Bit11 (968~991) 24 979, TX Bit4 (976~1000) 25 988, Bit12 (969~992) 24 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (971~998) 28 984, Bit14 (969~992) 24 980, TX Bit7 (974~998) 25 986, Bit15 (971~994) 24 982, Write Rank1 MR14 =0x1e CH=0, VrefRange= 0, VrefLevel = 30 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985, TX Bit3 (969~995) 27 982, Bit11 (968~991) 24 979, TX Bit4 (976~1000) 25 988, Bit12 (969~992) 24 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (971~998) 28 984, Bit14 (969~992) 24 980, TX Bit7 (974~998) 25 986, Bit15 (971~994) 24 982, Write Rank1 MR14 =0x20 CH=0, VrefRange= 0, VrefLevel = 32 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979, TX Bit1 (977~1000) 24 988, Bit9 (969~992) 24 980, TX Bit2 (977~1000) 24 988, Bit10 (974~997) 24 985, TX Bit3 (969~995) 27 982, Bit11 (968~991) 24 979, TX Bit4 (976~1000) 25 988, Bit12 (969~992) 24 980, TX Bit5 (971~994) 24 982, Bit13 (968~991) 24 979, TX Bit6 (971~998) 28 984, Bit14 (969~992) 24 980, TX Bit7 (974~998) 25 986, Bit15 (971~994) 24 982, TX Vref found, early break! 368< 374 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps u1DelayCellOfst[0]=8 cells (7 PI) u1DelayCellOfst[1]=7 cells (6 PI) u1DelayCellOfst[2]=7 cells (6 PI) u1DelayCellOfst[3]=0 cells (0 PI) u1DelayCellOfst[4]=7 cells (6 PI) u1DelayCellOfst[5]=0 cells (0 PI) u1DelayCellOfst[6]=2 cells (2 PI) u1DelayCellOfst[7]=5 cells (4 PI) Byte0, DQ PI dly=982, DQM PI dly= 985 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22) u1DelayCellOfst[8]=0 cells (0 PI) u1DelayCellOfst[9]=1 cells (1 PI) u1DelayCellOfst[10]=7 cells (6 PI) u1DelayCellOfst[11]=0 cells (0 PI) u1DelayCellOfst[12]=1 cells (1 PI) u1DelayCellOfst[13]=0 cells (0 PI) u1DelayCellOfst[14]=1 cells (1 PI) u1DelayCellOfst[15]=3 cells (3 PI) Byte1, DQ PI dly=979, DQM PI dly= 982 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19) Write Rank1 MR14 =0x16 Final TX Range 0 Vref 22 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec. Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank1 MR3 =0xb0 DramC Write-DBI on == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=1, VrefScanEnable 0 Begin, DQ Scan Range 702~766 TX Vref Scan disable 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB] 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB] 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB] 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB] 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB] 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB] 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB] 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB] 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB] 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB] 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB] 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB] 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB] 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB] 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB] 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB] 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB] 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB] 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=730, DQM PI dly= 730 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26) Byte1, DQ PI dly=723, DQM PI dly= 723 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19) Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 Write Rank1 MR3 =0x30 DramC Write-DBI off [DATLAT] Freq=1600, CH0 RK1, use_rxtx_scan=0 DATLAT Default: 0x10 7, 0xFFFF, sum=0 8, 0xFFFF, sum=0 9, 0xFFFF, sum=0 10, 0xFFFF, sum=0 11, 0xFFFF, sum=0 12, 0xFFFF, sum=0 13, 0xFFFF, sum=0 14, 0x0, sum=1 15, 0x0, sum=2 16, 0x0, sum=3 17, 0x0, sum=4 pattern=2 first_step=14 total pass=5 best_step=16 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =1 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 0 -26, [0] xxxxxxxx xxxxxxxx [MSB] -25, [0] xxxxxxxx xxxxxxxx [MSB] -24, [0] xxxxxxxx xxxxxxxx [MSB] -23, [0] xxxxxxxx xxxxxxxx [MSB] -22, [0] xxxxxxxx xxxxxxxx [MSB] -21, [0] xxxxxxxx xxxxxxxx [MSB] -20, [0] xxxxxxxx xxxxxxxx [MSB] -19, [0] xxxxxxxx xxxxxxxx [MSB] -18, [0] xxxxxxxx xxxxxxxx [MSB] -17, [0] xxxxxxxx xxxxxxxx [MSB] -16, [0] xxxxxxxx xxxxxxxx [MSB] -15, [0] xxxxxxxx xxxxxxxx [MSB] -14, [0] xxxxxxxx xxxxxxxx [MSB] -13, [0] xxxxxxxx xxxxxxxx [MSB] -12, [0] xxxxxxxx xxxxxxxx [MSB] -11, [0] xxxxxxxx xxxxxxxx [MSB] -10, [0] xxxxxxxx xxxxxxxx [MSB] -9, [0] xxxxxxxx xxxxxxxx [MSB] -8, [0] xxxxxxxx xxxxxxxx [MSB] -7, [0] xxxxxxxx xxxxxxxx [MSB] -6, [0] xxxxxxxx xxxxxxxx [MSB] -5, [0] xxxxxxxx xxxxxxxx [MSB] -4, [0] xxxxxxxx xxxxxxxx [MSB] -3, [0] xxxxxxxx xxxxxxxx [MSB] -2, [0] xxxoxxxx xxxxxxxx [MSB] -1, [0] xxxoxxxx xxxxxoxx [MSB] 0, [0] xxxoxxxx oxxxxoxx [MSB] 1, [0] xxxoxoxx oxxoooox [MSB] 2, [0] xxxoxooo ooxoooox [MSB] 3, [0] xxxoxooo ooxooooo [MSB] 4, [0] xxxoxooo ooxooooo [MSB] 5, [0] xxxooooo ooxooooo [MSB] 6, [0] xxxooooo oooooooo [MSB] 7, [0] xooooooo oooooooo [MSB] 8, [0] xooooooo oooooooo [MSB] 34, [0] oooxoooo oooxoooo [MSB] 35, [0] oooxoxoo oooxoxoo [MSB] 36, [0] oooxoxxo oooxoxoo [MSB] 37, [0] oooxoxxx xooxxxxo [MSB] 38, [0] oooxoxxx xooxxxxo [MSB] 39, [0] oooxoxxx xxoxxxxx [MSB] 40, [0] oooxoxxx xxoxxxxx [MSB] 41, [0] oooxxxxx xxoxxxxx [MSB] 42, [0] oooxxxxx xxxxxxxx [MSB] 43, [0] oxxxxxxx xxxxxxxx [MSB] 44, [0] xxxxxxxx xxxxxxxx [MSB] iDelay=44, Bit 0, Center 26 (9 ~ 43) 35 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36 iDelay=44, Bit 4, Center 22 (5 ~ 40) 36 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37 iDelay=44, Bit 9, Center 20 (2 ~ 38) 37 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36 iDelay=44, Bit 11, Center 17 (1 ~ 33) 33 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36 iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 18 DQ Delay: DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19 DQ8 =18, DQ9 =20, DQ10 =23, DQ11 =17 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20 [DramC_TX_OE_Calibration] TA2 Original DQ_B0 (3 6) =30, OEN = 27 Original DQ_B1 (3 6) =30, OEN = 27 23, 0x0, End_B0=23 End_B1=23 24, 0x0, End_B0=24 End_B1=24 25, 0x0, End_B0=25 End_B1=25 26, 0x0, End_B0=26 End_B1=26 27, 0x0, End_B0=27 End_B1=27 28, 0x0, End_B0=28 End_B1=28 29, 0x0, End_B0=29 End_B1=29 30, 0x0, End_B0=30 End_B1=30 31, 0xFFFF, End_B0=30 End_B1=30 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Write Rank1 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK1, (LSB)MR18= 0x79, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps CH0_RK1: MR19=0x3, MR18=0x79, DQSOSC=354, MR23=63, INC=19, DEC=29 Write Rank1 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK1, (LSB)MR18= 0x7a, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps CH0 RK1: MR19=3, MR18=7A [RxdqsGatingPostProcess] freq 1600 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3 Rank: 0 best DQS0 dly(2T, 0.5T) = (2, 5) best DQS1 dly(2T, 0.5T) = (2, 5) best DQS0 P1 dly(2T, 0.5T) = (3, 1) best DQS1 P1 dly(2T, 0.5T) = (3, 1) Rank: 1 best DQS0 dly(2T, 0.5T) = (2, 6) best DQS1 dly(2T, 0.5T) = (2, 6) best DQS0 P1 dly(2T, 0.5T) = (3, 2) best DQS1 P1 dly(2T, 0.5T) = (3, 2) TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16 Write Rank0 MR13 =0x59 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == === u2Vref_new: 0x56 --> 0x3a === u2Vref_new: 0x58 --> 0x58 === u2Vref_new: 0x5a --> 0x5a === u2Vref_new: 0x5c --> 0x78 === u2Vref_new: 0x5e --> 0x7a === u2Vref_new: 0x60 --> 0x90 [CA 0] Center 36 (9~63) winsize 55 [CA 1] Center 35 (7~63) winsize 57 [CA 2] Center 32 (3~62) winsize 60 [CA 3] Center 32 (3~62) winsize 60 [CA 4] Center 33 (4~63) winsize 60 [CA 5] Center 25 (-2~53) winsize 56 [CATrainingPosCal] consider 1 rank data u2DelayCellTimex100 = 762/100 ps CA0 delay=36 (9~63),Diff = 11 PI (14 cell) CA1 delay=35 (7~63),Diff = 10 PI (12 cell) CA2 delay=32 (3~62),Diff = 7 PI (8 cell) CA3 delay=32 (3~62),Diff = 7 PI (8 cell) CA4 delay=33 (4~63),Diff = 8 PI (10 cell) CA5 delay=25 (-2~53),Diff = 0 PI (0 cell) CA PerBit enable=1, Macro0, CA PI delay=25 === u2Vref_new: 0x56 --> 0x3a Vref(ca) range 1: 22 CS Dly= 11 (42-0-32) Write Rank0 MR13 =0xd8 Write Rank0 MR13 =0xd8 Write Rank0 MR12 =0x56 Write Rank1 MR13 =0x59 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == === u2Vref_new: 0x56 --> 0x3a === u2Vref_new: 0x58 --> 0x58 === u2Vref_new: 0x5a --> 0x5a === u2Vref_new: 0x5c --> 0x78 === u2Vref_new: 0x5e --> 0x7a === u2Vref_new: 0x60 --> 0x90 [CA 0] Center 36 (10~63) winsize 54 [CA 1] Center 35 (8~63) winsize 56 [CA 2] Center 33 (3~63) winsize 61 [CA 3] Center 33 (3~63) winsize 61 [CA 4] Center 33 (4~63) winsize 60 [CA 5] Center 25 (-2~53) winsize 56 [CATrainingPosCal] consider 2 rank data u2DelayCellTimex100 = 762/100 ps CA0 delay=36 (10~63),Diff = 11 PI (14 cell) CA1 delay=35 (8~63),Diff = 10 PI (12 cell) CA2 delay=32 (3~62),Diff = 7 PI (8 cell) CA3 delay=32 (3~62),Diff = 7 PI (8 cell) CA4 delay=33 (4~63),Diff = 8 PI (10 cell) CA5 delay=25 (-2~53),Diff = 0 PI (0 cell) CA PerBit enable=1, Macro0, CA PI delay=25 === u2Vref_new: 0x56 --> 0x3a Vref(ca) range 1: 22 CS Dly= 11 (42-0-32) Write Rank1 MR13 =0xd8 Write Rank1 MR13 =0xd8 Write Rank1 MR12 =0x56 [RankSwap] Rank num 2, (Multi 1), Rank 0 Write Rank0 MR2 =0xad [Write Leveling] delay byte0 byte1 byte2 byte3 10 0 0 11 0 0 12 0 0 13 0 0 14 0 0 15 0 0 16 0 0 17 0 0 18 0 0 19 0 0 20 0 0 21 0 0 22 0 0 23 0 0 24 0 0 25 0 0 26 0 0 27 0 0 28 0 0 29 0 0 30 0 0 31 0 ff 32 0 ff 33 0 ff 34 0 ff 35 0 ff 36 ff ff 37 ff ff 38 ff ff 39 ff ff 40 ff ff 41 ff ff 42 ff ff pass bytecount = 0xff (0xff: all bytes pass) DQS0 dly: 36 DQS1 dly: 31 Write Rank0 MR2 =0x2d [RankSwap] Rank num 2, (Multi 1), Rank 0 Write Rank0 MR1 =0xd6 [Gating] == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == 3 1 0 |1615 3534 |(11 11)(11 11) |(0 1)(1 1)| 0 3 1 4 |2d2d 3534 |(11 11)(11 11) |(1 0)(1 1)| 0 3 1 8 |2d2c 3534 |(11 11)(11 11) |(1 0)(0 1)| 0 3 1 12 |2d2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0 3 1 16 |302f 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 1 20 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 1 24 |3131 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 1 28 |303 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 2 0 |2d2c 201 |(11 11)(11 11) |(1 1)(1 1)| 0 3 2 4 |1a1a 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 8 |1b1a 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 12 |1817 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 16 |3c3b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 2 20 |3131 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 24 |3636 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 2 28 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 0 |504 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 4 |3534 909 |(11 11)(11 11) |(1 1)(1 1)| 0 [Byte 0] Lead/lag falling Transition (3, 3, 4) 3 3 8 |3534 2f2e |(11 11)(11 11) |(0 1)(1 1)| 0 [Byte 1] Lead/lag falling Transition (3, 3, 8) 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 4 0 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 [Byte 0] Lead/lag falling Transition (3, 5, 16) 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0 [Byte 0] Lead/lag Transition tap number (2) 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 [Byte 1] Lead/lag falling Transition (3, 5, 24) 3 5 28 |909 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0 [Byte 1] Lead/lag Transition tap number (2) 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0 [Byte 0]First pass (3, 6, 0) 3 6 4 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 [Byte 1]First pass (3, 6, 8) 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 All bytes gating window > 1UI, Early break! best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20) best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28) best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20) best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28) Write Rank0 MR1 =0x56 best RODT dly(2T, 0.5T) = (2, 2) best RODT dly(2T, 0.5T) = (2, 2) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =0 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 0 -26, [0] xxxxxxxx xxxxxxxx [MSB] -25, [0] xxxxxxxx xxxxxxxx [MSB] -24, [0] xxxxxxxx xxxxxxxx [MSB] -23, [0] xxxxxxxx xxxxxxxx [MSB] -22, [0] xxxxxxxx xxxxxxxx [MSB] -21, [0] xxxxxxxx xxxxxxxx [MSB] -20, [0] xxxxxxxx xxxxxxxx [MSB] -19, [0] xxxxxxxx xxxxxxxx [MSB] -18, [0] xxxxxxxx xxxxxxxx [MSB] -17, [0] xxxxxxxx xxxxxxxx [MSB] -16, [0] xxxxxxxx xxxxxxxx [MSB] -15, [0] xxxxxxxx xxxxxxxx [MSB] -14, [0] xxxxxxxx xxxxxxxx [MSB] -13, [0] xxxxxxxx xxxxxxxx [MSB] -12, [0] xxxxxxxx xxxxxxxx [MSB] -11, [0] xxxxxxxx xxxxxxxx [MSB] -10, [0] xxxxxxxx xxxxxxxx [MSB] -9, [0] xxxxxxxx xxxxxxxx [MSB] -8, [0] xxxxxxxx xxxxxxxx [MSB] -7, [0] xxxxxxxx xxxxxxxx [MSB] -6, [0] xxxxxxxx xxxxxxxx [MSB] -5, [0] xxxxxxxx xxxxxxxx [MSB] -4, [0] xxxxxxxx xxxxxxxx [MSB] -3, [0] xxxxxxxx xxxxxxxx [MSB] -2, [0] xxxxxxxx xxxxxxxx [MSB] -1, [0] xxxxxxxx xxxxxxxx [MSB] 0, [0] xxxoxxxx xxxxxxxx [MSB] 1, [0] xxooxxxx xxxxxxxo [MSB] 2, [0] xxooxxxo xxxxxxxo [MSB] 3, [0] xxoooxxo oooxxoxo [MSB] 4, [0] xxoooxxo oooxooxo [MSB] 5, [0] xxoooxxo oooooooo [MSB] 6, [0] xoooooxo oooooooo [MSB] 7, [0] xoooooxo oooooooo [MSB] 8, [0] xoooooxo oooooooo [MSB] 32, [0] ooxxoooo oooooooo [MSB] 33, [0] ooxxoooo ooooooox [MSB] 34, [0] ooxxoooo ooooooox [MSB] 35, [0] ooxxoooo ooxoooox [MSB] 36, [0] ooxxxooo ooxoooox [MSB] 37, [0] ooxxxoox xxxxoxxx [MSB] 38, [0] ooxxxoox xxxxoxxx [MSB] 39, [0] ooxxxoox xxxxxxxx [MSB] 40, [0] xxxxxoox xxxxxxxx [MSB] 41, [0] xxxxxxxx xxxxxxxx [MSB] iDelay=41, Bit 0, Center 24 (9 ~ 39) 31 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34 iDelay=41, Bit 2, Center 16 (1 ~ 31) 31 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32 iDelay=41, Bit 4, Center 19 (3 ~ 35) 33 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32 iDelay=41, Bit 7, Center 19 (2 ~ 36) 35 iDelay=41, Bit 8, Center 19 (3 ~ 36) 34 iDelay=41, Bit 9, Center 19 (3 ~ 36) 34 iDelay=41, Bit 10, Center 18 (3 ~ 34) 32 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35 iDelay=41, Bit 13, Center 19 (3 ~ 36) 34 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 19 DQ Delay: DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =20 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =16 DramC Write-DBI off == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=2, VrefScanEnable 0 Begin, DQ Scan Range 927~1183 TX Vref Scan disable 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB] 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB] 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB] 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB] 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB] 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB] 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB] 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB] 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB] 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB] 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB] 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB] 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB] 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB] 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB] 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB] 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB] 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB] 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB] 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB] 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB] 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB] 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB] 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB] 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB] 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB] 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB] 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB] 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB] 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB] 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB] 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB] 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB] 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB] 968 |3 6 8|[0] xxxxxxxx ooxxxxoo [MSB] 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB] 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB] 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB] 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB] 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB] 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB] 975 |3 6 15|[0] xxooxxxx oooooooo [MSB] 976 |3 6 16|[0] xooooxxo oooooooo [MSB] 977 |3 6 17|[0] xoooooxo oooooooo [MSB] 989 |3 6 29|[0] oooooooo ooooooox [MSB] 990 |3 6 30|[0] oooooooo xxooooox [MSB] 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB] 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB] 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB] 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB] 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB] 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB] 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB] 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB] 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=986, DQM PI dly= 986 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26) Byte1, DQ PI dly=978, DQM PI dly= 978 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=0, VrefScanEnable 1 Begin, DQ Scan Range 954~1018 Write Rank0 MR14 =0x0 CH=1, VrefRange= 0, VrefLevel = 0 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977, TX Bit1 (978~996) 19 987, Bit9 (969~985) 17 977, TX Bit2 (977~992) 16 984, Bit10 (970~985) 16 977, TX Bit3 (975~990) 16 982, Bit11 (972~988) 17 980, TX Bit4 (977~993) 17 985, Bit12 (970~988) 19 979, TX Bit5 (978~997) 20 987, Bit13 (972~988) 17 980, TX Bit6 (980~997) 18 988, Bit14 (970~986) 17 978, TX Bit7 (978~992) 15 985, Bit15 (967~985) 19 976, Write Rank0 MR14 =0x2 CH=1, VrefRange= 0, VrefLevel = 2 TX Bit0 (979~998) 20 988, Bit8 (968~985) 18 976, TX Bit1 (977~997) 21 987, Bit9 (968~985) 18 976, TX Bit2 (977~992) 16 984, Bit10 (970~985) 16 977, TX Bit3 (975~990) 16 982, Bit11 (971~988) 18 979, TX Bit4 (978~994) 17 986, Bit12 (970~989) 20 979, TX Bit5 (978~997) 20 987, Bit13 (972~988) 17 980, TX Bit6 (979~997) 19 988, Bit14 (970~986) 17 978, TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976, Write Rank0 MR14 =0x4 CH=1, VrefRange= 0, VrefLevel = 4 TX Bit0 (978~998) 21 988, Bit8 (968~985) 18 976, TX Bit1 (977~997) 21 987, Bit9 (969~986) 18 977, TX Bit2 (977~993) 17 985, Bit10 (970~986) 17 978, TX Bit3 (975~991) 17 983, Bit11 (970~989) 20 979, TX Bit4 (977~995) 19 986, Bit12 (970~989) 20 979, TX Bit5 (978~998) 21 988, Bit13 (971~989) 19 980, TX Bit6 (979~998) 20 988, Bit14 (970~987) 18 978, TX Bit7 (977~993) 17 985, Bit15 (966~985) 20 975, Write Rank0 MR14 =0x6 CH=1, VrefRange= 0, VrefLevel = 6 TX Bit0 (978~998) 21 988, Bit8 (968~986) 19 977, TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977, TX Bit2 (976~993) 18 984, Bit10 (970~987) 18 978, TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980, TX Bit4 (977~995) 19 986, Bit12 (970~990) 21 980, TX Bit5 (977~998) 22 987, Bit13 (971~990) 20 980, TX Bit6 (979~998) 20 988, Bit14 (970~988) 19 979, TX Bit7 (977~993) 17 985, Bit15 (966~986) 21 976, Write Rank0 MR14 =0x8 CH=1, VrefRange= 0, VrefLevel = 8 TX Bit0 (978~998) 21 988, Bit8 (968~987) 20 977, TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977, TX Bit2 (976~994) 19 985, Bit10 (969~987) 19 978, TX Bit3 (974~992) 19 983, Bit11 (970~990) 21 980, TX Bit4 (977~996) 20 986, Bit12 (969~990) 22 979, TX Bit5 (978~998) 21 988, Bit13 (971~990) 20 980, TX Bit6 (979~998) 20 988, Bit14 (969~988) 20 978, TX Bit7 (977~994) 18 985, Bit15 (966~986) 21 976, Write Rank0 MR14 =0xa CH=1, VrefRange= 0, VrefLevel = 10 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978, TX Bit1 (977~997) 21 987, Bit9 (968~987) 20 977, TX Bit2 (976~994) 19 985, Bit10 (969~988) 20 978, TX Bit3 (974~992) 19 983, Bit11 (970~991) 22 980, TX Bit4 (977~997) 21 987, Bit12 (969~991) 23 980, TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980, TX Bit6 (978~999) 22 988, Bit14 (969~989) 21 979, TX Bit7 (977~995) 19 986, Bit15 (966~987) 22 976, Write Rank0 MR14 =0xc CH=1, VrefRange= 0, VrefLevel = 12 TX Bit0 (978~1000) 23 989, Bit8 (967~988) 22 977, TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978, TX Bit2 (976~995) 20 985, Bit10 (968~989) 22 978, TX Bit3 (974~993) 20 983, Bit11 (970~991) 22 980, TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980, TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980, TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979, TX Bit7 (976~996) 21 986, Bit15 (966~987) 22 976, Write Rank0 MR14 =0xe CH=1, VrefRange= 0, VrefLevel = 14 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978, TX Bit1 (976~998) 23 987, Bit9 (968~989) 22 978, TX Bit2 (975~996) 22 985, Bit10 (968~990) 23 979, TX Bit3 (973~993) 21 983, Bit11 (969~991) 23 980, TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980, TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980, TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979, TX Bit7 (976~996) 21 986, Bit15 (965~988) 24 976, Write Rank0 MR14 =0x10 CH=1, VrefRange= 0, VrefLevel = 16 TX Bit0 (978~1000) 23 989, Bit8 (967~990) 24 978, TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978, TX Bit2 (975~996) 22 985, Bit10 (968~990) 23 979, TX Bit3 (972~993) 22 982, Bit11 (969~991) 23 980, TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980, TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980, TX Bit6 (978~1000) 23 989, Bit14 (969~990) 22 979, TX Bit7 (976~997) 22 986, Bit15 (964~988) 25 976, Write Rank0 MR14 =0x12 CH=1, VrefRange= 0, VrefLevel = 18 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978, TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978, TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979, TX Bit3 (972~994) 23 983, Bit11 (969~992) 24 980, TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980, TX Bit5 (977~1000) 24 988, Bit13 (970~991) 22 980, TX Bit6 (977~1000) 24 988, Bit14 (969~991) 23 980, TX Bit7 (976~997) 22 986, Bit15 (963~989) 27 976, Write Rank0 MR14 =0x14 CH=1, VrefRange= 0, VrefLevel = 20 TX Bit0 (977~1001) 25 989, Bit8 (967~991) 25 979, TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978, TX Bit2 (975~997) 23 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980, TX Bit6 (977~1001) 25 989, Bit14 (969~991) 23 980, TX Bit7 (976~998) 23 987, Bit15 (963~989) 27 976, Write Rank0 MR14 =0x16 CH=1, VrefRange= 0, VrefLevel = 22 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978, TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978, TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979, TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979, TX Bit7 (975~998) 24 986, Bit15 (964~988) 25 976, Write Rank0 MR14 =0x18 CH=1, VrefRange= 0, VrefLevel = 24 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978, TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978, TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979, TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979, TX Bit7 (975~998) 24 986, Bit15 (964~988) 25 976, Write Rank0 MR14 =0x1a CH=1, VrefRange= 0, VrefLevel = 26 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978, TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978, TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979, TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979, TX Bit7 (975~998) 24 986, Bit15 (964~988) 25 976, Write Rank0 MR14 =0x1c CH=1, VrefRange= 0, VrefLevel = 28 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978, TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978, TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979, TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979, TX Bit7 (975~998) 24 986, Bit15 (964~988) 25 976, Write Rank0 MR14 =0x1e CH=1, VrefRange= 0, VrefLevel = 30 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978, TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978, TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979, TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979, TX Bit7 (975~998) 24 986, Bit15 (964~988) 25 976, Write Rank0 MR14 =0x20 CH=1, VrefRange= 0, VrefLevel = 32 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978, TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978, TX Bit2 (974~998) 25 986, Bit10 (967~991) 25 979, TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980, TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980, TX Bit5 (977~1001) 25 989, Bit13 (968~991) 24 979, TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979, TX Bit7 (975~998) 24 986, Bit15 (964~988) 25 976, TX Vref found, early break! 369< 379 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps u1DelayCellOfst[0]=7 cells (6 PI) u1DelayCellOfst[1]=6 cells (5 PI) u1DelayCellOfst[2]=3 cells (3 PI) u1DelayCellOfst[3]=0 cells (0 PI) u1DelayCellOfst[4]=5 cells (4 PI) u1DelayCellOfst[5]=7 cells (6 PI) u1DelayCellOfst[6]=7 cells (6 PI) u1DelayCellOfst[7]=3 cells (3 PI) Byte0, DQ PI dly=983, DQM PI dly= 986 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23) u1DelayCellOfst[8]=2 cells (2 PI) u1DelayCellOfst[9]=2 cells (2 PI) u1DelayCellOfst[10]=3 cells (3 PI) u1DelayCellOfst[11]=5 cells (4 PI) u1DelayCellOfst[12]=5 cells (4 PI) u1DelayCellOfst[13]=3 cells (3 PI) u1DelayCellOfst[14]=3 cells (3 PI) u1DelayCellOfst[15]=0 cells (0 PI) Byte1, DQ PI dly=976, DQM PI dly= 978 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16) Write Rank0 MR14 =0x16 Final TX Range 0 Vref 22 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec. Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank0 MR3 =0xb0 DramC Write-DBI on == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=1, VrefScanEnable 0 Begin, DQ Scan Range 698~762 TX Vref Scan disable 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB] 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB] 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB] 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB] 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB] 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB] 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB] 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB] 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB] 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB] 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB] 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB] 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB] 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB] 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB] 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB] 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB] 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB] 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB] 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB] 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB] 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB] 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB] 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=731, DQM PI dly= 731 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27) Byte1, DQ PI dly=721, DQM PI dly= 721 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17) Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 Write Rank0 MR3 =0x30 DramC Write-DBI off [DATLAT] Freq=1600, CH1 RK0, use_rxtx_scan=0 DATLAT Default: 0xf 7, 0xFFFF, sum=0 8, 0xFFFF, sum=0 9, 0xFFFF, sum=0 10, 0xFFFF, sum=0 11, 0xFFFF, sum=0 12, 0xFFFF, sum=0 13, 0xFFFF, sum=0 14, 0x0, sum=1 15, 0x0, sum=2 16, 0x0, sum=3 17, 0x0, sum=4 pattern=2 first_step=14 total pass=5 best_step=16 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =1 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 1 RX Vref found, early break! Final RX Vref 12, apply to both rank0 and 1 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 19 DQ Delay: DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15 DQ4 =19, DQ5 =24, DQ6 =24, DQ7 =19 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =20 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17 [DramC_TX_OE_Calibration] TA2 Original DQ_B0 (3 6) =30, OEN = 27 Original DQ_B1 (3 6) =30, OEN = 27 23, 0x0, End_B0=23 End_B1=23 24, 0x0, End_B0=24 End_B1=24 25, 0x0, End_B0=25 End_B1=25 26, 0x0, End_B0=26 End_B1=26 27, 0x0, End_B0=27 End_B1=27 28, 0x0, End_B0=28 End_B1=28 29, 0x0, End_B0=29 End_B1=29 30, 0x0, End_B0=30 End_B1=30 31, 0xFFFF, End_B0=30 End_B1=30 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Write Rank0 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK0, (LSB)MR18= 0xbf, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps CH1_RK0: MR19=0x3, MR18=0xBF, DQSOSC=328, MR23=63, INC=22, DEC=34 Write Rank0 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK0, (LSB)MR18= 0xbe, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps CH1 RK0: MR19=3, MR18=BE [RankSwap] Rank num 2, (Multi 1), Rank 1 Write Rank0 MR2 =0xad [Write Leveling] delay byte0 byte1 byte2 byte3 10 0 0 11 0 0 12 0 0 13 0 0 14 0 0 15 0 0 16 0 0 17 0 0 18 0 0 19 0 0 20 0 0 21 0 0 22 0 0 23 0 0 24 0 0 25 0 0 26 0 0 27 0 0 28 0 0 29 0 0 30 0 0 31 0 0 32 0 ff 33 0 ff 34 0 ff 35 ff ff 36 ff ff 37 ff ff 38 ff ff 39 ff ff 40 ff ff 41 ff ff pass bytecount = 0xff (0xff: all bytes pass) DQS0 dly: 35 DQS1 dly: 32 Write Rank0 MR2 =0x2d [RankSwap] Rank num 2, (Multi 1), Rank 0 Write Rank1 MR1 =0xd6 [Gating] == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == 3 1 0 |3030 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 1 4 |3231 3534 |(11 11)(11 11) |(1 1)(1 1)| 0 3 1 8 |2d2c 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 1 12 |302 3534 |(11 11)(11 11) |(1 0)(0 1)| 0 3 1 16 |2b2a 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 1 20 |2e2e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 1 24 |2e2e 3534 |(0 11)(11 11) |(0 1)(0 1)| 0 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0 3 2 0 |1e1e 908 |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 4 |3636 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0 3 2 8 |3737 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0 3 2 12 |3231 3d3d |(1 1)(11 11) |(0 0)(1 1)| 0 3 2 16 |3535 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 20 |3535 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 3 2 24 |3636 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0 3 2 28 |1a19 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 3 0 |2f2e 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 [Byte 0] Lead/lag falling Transition (3, 3, 0) 3 3 4 |3534 1010 |(11 11)(11 11) |(0 1)(1 1)| 0 3 3 8 |3534 807 |(11 11)(11 11) |(0 1)(1 1)| 0 [Byte 1] Lead/lag falling Transition (3, 3, 8) 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0 [Byte 0] Lead/lag falling Transition (3, 5, 12) 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0 [Byte 0] Lead/lag Transition tap number (3) 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0 [Byte 1] Lead/lag Transition tap number (1) 3 5 28 |605 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0 [Byte 0]First pass (3, 6, 0) 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 [Byte 1]First pass (3, 6, 4) 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0 All bytes gating window > 1UI, Early break! best DQS0 dly(2T, 0.5T, PI) = (3, 5, 18) best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26) best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 18) best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26) Write Rank1 MR1 =0x56 best RODT dly(2T, 0.5T) = (2, 2) best RODT dly(2T, 0.5T) = (2, 2) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =0 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 0 -26, [0] xxxxxxxx xxxxxxxx [MSB] -25, [0] xxxxxxxx xxxxxxxx [MSB] -24, [0] xxxxxxxx xxxxxxxx [MSB] -23, [0] xxxxxxxx xxxxxxxx [MSB] -22, [0] xxxxxxxx xxxxxxxx [MSB] -21, [0] xxxxxxxx xxxxxxxx [MSB] -20, [0] xxxxxxxx xxxxxxxx [MSB] -19, [0] xxxxxxxx xxxxxxxx [MSB] -18, [0] xxxxxxxx xxxxxxxx [MSB] -17, [0] xxxxxxxx xxxxxxxx [MSB] -16, [0] xxxxxxxx xxxxxxxx [MSB] -15, [0] xxxxxxxx xxxxxxxx [MSB] -14, [0] xxxxxxxx xxxxxxxx [MSB] -13, [0] xxxxxxxx xxxxxxxx [MSB] -12, [0] xxxxxxxx xxxxxxxx [MSB] -11, [0] xxxxxxxx xxxxxxxx [MSB] -10, [0] xxxxxxxx xxxxxxxx [MSB] -9, [0] xxxxxxxx xxxxxxxx [MSB] -8, [0] xxxxxxxx xxxxxxxx [MSB] -7, [0] xxxxxxxx xxxxxxxx [MSB] -6, [0] xxxxxxxx xxxxxxxx [MSB] -5, [0] xxxxxxxx xxxxxxxx [MSB] -4, [0] xxxxxxxx xxxxxxxx [MSB] -3, [0] xxxxxxxx xxxxxxxx [MSB] -2, [0] xxxxxxxx xxxxxxxx [MSB] -1, [0] xxxoxxxx xxxxxxxx [MSB] 0, [0] xxxoxxxx xxxxxxxo [MSB] 1, [0] xxooxxxx xxxxxxxo [MSB] 2, [0] xxooxxxo xxxxxxxo [MSB] 3, [0] xxoooxxo oooxxoxo [MSB] 4, [0] xxoooxxo oooxxoxo [MSB] 5, [0] xooooxxo oooooooo [MSB] 6, [0] xooooxxo oooooooo [MSB] 7, [0] xoooooxo oooooooo [MSB] 33, [0] oooxoooo oooooooo [MSB] 34, [0] ooxxoooo ooooooox [MSB] 35, [0] ooxxoooo ooooooox [MSB] 36, [0] ooxxoooo ooxoooox [MSB] 37, [0] ooxxxoox xoxoooox [MSB] 38, [0] ooxxxoox xxxooxxx [MSB] 39, [0] ooxxxoox xxxxoxxx [MSB] 40, [0] ooxxxoox xxxxoxxx [MSB] 41, [0] oxxxxxxx xxxxxxxx [MSB] 42, [0] xxxxxxxx xxxxxxxx [MSB] iDelay=42, Bit 0, Center 24 (8 ~ 41) 34 iDelay=42, Bit 1, Center 22 (5 ~ 40) 36 iDelay=42, Bit 2, Center 17 (1 ~ 33) 33 iDelay=42, Bit 3, Center 15 (-1 ~ 32) 34 iDelay=42, Bit 4, Center 19 (3 ~ 36) 34 iDelay=42, Bit 5, Center 23 (7 ~ 40) 34 iDelay=42, Bit 6, Center 24 (8 ~ 40) 33 iDelay=42, Bit 7, Center 19 (2 ~ 36) 35 iDelay=42, Bit 8, Center 19 (3 ~ 36) 34 iDelay=42, Bit 9, Center 20 (3 ~ 37) 35 iDelay=42, Bit 10, Center 19 (3 ~ 35) 33 iDelay=42, Bit 11, Center 21 (5 ~ 38) 34 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35 iDelay=42, Bit 14, Center 21 (5 ~ 37) 33 iDelay=42, Bit 15, Center 16 (0 ~ 33) 34 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 19 DQ Delay: DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =21 DQ12 =22, DQ13 =20, DQ14 =21, DQ15 =16 DramC Write-DBI off == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=2, VrefScanEnable 0 Begin, DQ Scan Range 928~1184 TX Vref Scan disable 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB] 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB] 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB] 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB] 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB] 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB] 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB] 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB] 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB] 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB] 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB] 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB] 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB] 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB] 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB] 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB] 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB] 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB] 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB] 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB] 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB] 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB] 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB] 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB] 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB] 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB] 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB] 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB] 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB] 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB] 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB] 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB] 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB] 968 |3 6 8|[0] xxxxxxxx xoxxxxxo [MSB] 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB] 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB] 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB] 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB] 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB] 974 |3 6 14|[0] xxooxxxx oooooooo [MSB] 975 |3 6 15|[0] xxoooxxx oooooooo [MSB] 976 |3 6 16|[0] xxoooxxo oooooooo [MSB] 989 |3 6 29|[0] oooooooo ooooooox [MSB] 990 |3 6 30|[0] oooooooo ooooooox [MSB] 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB] 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB] 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB] 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB] 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB] 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB] 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB] 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB] 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=985, DQM PI dly= 985 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25) Byte1, DQ PI dly=978, DQM PI dly= 978 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18) == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=0, VrefScanEnable 1 Begin, DQ Scan Range 954~1018 Write Rank1 MR14 =0x0 CH=1, VrefRange= 0, VrefLevel = 0 TX Bit0 (979~998) 20 988, Bit8 (971~986) 16 978, TX Bit1 (978~996) 19 987, Bit9 (970~986) 17 978, TX Bit2 (976~991) 16 983, Bit10 (972~986) 15 979, TX Bit3 (975~990) 16 982, Bit11 (974~990) 17 982, TX Bit4 (976~992) 17 984, Bit12 (973~988) 16 980, TX Bit5 (978~997) 20 987, Bit13 (975~987) 13 981, TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980, TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976, Write Rank1 MR14 =0x2 CH=1, VrefRange= 0, VrefLevel = 2 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979, TX Bit1 (978~996) 19 987, Bit9 (970~987) 18 978, TX Bit2 (976~991) 16 983, Bit10 (972~987) 16 979, TX Bit3 (975~991) 17 983, Bit11 (973~991) 19 982, TX Bit4 (976~993) 18 984, Bit12 (972~988) 17 980, TX Bit5 (978~997) 20 987, Bit13 (974~987) 14 980, TX Bit6 (978~998) 21 988, Bit14 (973~988) 16 980, TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976, Write Rank1 MR14 =0x4 CH=1, VrefRange= 0, VrefLevel = 4 TX Bit0 (979~998) 20 988, Bit8 (970~987) 18 978, TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978, TX Bit2 (975~992) 18 983, Bit10 (971~987) 17 979, TX Bit3 (974~991) 18 982, Bit11 (973~991) 19 982, TX Bit4 (976~994) 19 985, Bit12 (972~989) 18 980, TX Bit5 (978~997) 20 987, Bit13 (974~988) 15 981, TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980, TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976, Write Rank1 MR14 =0x6 CH=1, VrefRange= 0, VrefLevel = 6 TX Bit0 (978~998) 21 988, Bit8 (970~988) 19 979, TX Bit1 (977~997) 21 987, Bit9 (969~987) 19 978, TX Bit2 (975~992) 18 983, Bit10 (970~987) 18 978, TX Bit3 (974~991) 18 982, Bit11 (972~991) 20 981, TX Bit4 (976~994) 19 985, Bit12 (972~990) 19 981, TX Bit5 (978~998) 21 988, Bit13 (973~989) 17 981, TX Bit6 (978~998) 21 988, Bit14 (972~989) 18 980, TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977, Write Rank1 MR14 =0x8 CH=1, VrefRange= 0, VrefLevel = 8 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979, TX Bit1 (978~997) 20 987, Bit9 (970~988) 19 979, TX Bit2 (975~992) 18 983, Bit10 (970~988) 19 979, TX Bit3 (973~992) 20 982, Bit11 (972~991) 20 981, TX Bit4 (976~994) 19 985, Bit12 (971~990) 20 980, TX Bit5 (978~998) 21 988, Bit13 (972~989) 18 980, TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980, TX Bit7 (977~994) 18 985, Bit15 (968~986) 19 977, Write Rank1 MR14 =0xa CH=1, VrefRange= 0, VrefLevel = 10 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979, TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978, TX Bit2 (975~993) 19 984, Bit10 (970~989) 20 979, TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982, TX Bit4 (976~995) 20 985, Bit12 (970~991) 22 980, TX Bit5 (977~998) 22 987, Bit13 (972~990) 19 981, TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980, TX Bit7 (977~994) 18 985, Bit15 (967~986) 20 976, Write Rank1 MR14 =0xc CH=1, VrefRange= 0, VrefLevel = 12 TX Bit0 (978~999) 22 988, Bit8 (969~991) 23 980, TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979, TX Bit2 (975~993) 19 984, Bit10 (970~991) 22 980, TX Bit3 (973~993) 21 983, Bit11 (971~992) 22 981, TX Bit4 (975~996) 22 985, Bit12 (970~991) 22 980, TX Bit5 (977~998) 22 987, Bit13 (972~991) 20 981, TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980, TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977, Write Rank1 MR14 =0xe CH=1, VrefRange= 0, VrefLevel = 14 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980, TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979, TX Bit2 (974~994) 21 984, Bit10 (970~991) 22 980, TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981, TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980, TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981, TX Bit6 (977~1000) 24 988, Bit14 (970~991) 22 980, TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977, Write Rank1 MR14 =0x10 CH=1, VrefRange= 0, VrefLevel = 16 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980, TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979, TX Bit2 (973~994) 22 983, Bit10 (970~991) 22 980, TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981, TX Bit4 (975~997) 23 986, Bit12 (970~991) 22 980, TX Bit5 (977~999) 23 988, Bit13 (972~991) 20 981, TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980, TX Bit7 (976~996) 21 986, Bit15 (967~987) 21 977, Write Rank1 MR14 =0x12 CH=1, VrefRange= 0, VrefLevel = 18 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980, TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980, TX Bit2 (973~995) 23 984, Bit10 (969~991) 23 980, TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981, TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981, TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981, TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981, TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977, Write Rank1 MR14 =0x14 CH=1, VrefRange= 0, VrefLevel = 20 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~997) 24 985, Bit12 (970~992) 23 981, TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981, TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981, TX Bit7 (975~997) 23 986, Bit15 (967~988) 22 977, Write Rank1 MR14 =0x16 CH=1, VrefRange= 0, VrefLevel = 22 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980, TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981, TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980, TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977, Write Rank1 MR14 =0x18 CH=1, VrefRange= 0, VrefLevel = 24 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980, TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981, TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980, TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977, Write Rank1 MR14 =0x1a CH=1, VrefRange= 0, VrefLevel = 26 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980, TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981, TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980, TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977, Write Rank1 MR14 =0x1c CH=1, VrefRange= 0, VrefLevel = 28 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980, TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981, TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980, TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977, Write Rank1 MR14 =0x1e CH=1, VrefRange= 0, VrefLevel = 30 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980, TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981, TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980, TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977, Write Rank1 MR14 =0x20 CH=1, VrefRange= 0, VrefLevel = 32 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980, TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979, TX Bit2 (973~996) 24 984, Bit10 (968~991) 24 979, TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981, TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980, TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981, TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980, TX Bit7 (975~997) 23 986, Bit15 (966~989) 24 977, TX Vref found, early break! 358< 368 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps u1DelayCellOfst[0]=8 cells (7 PI) u1DelayCellOfst[1]=7 cells (6 PI) u1DelayCellOfst[2]=2 cells (2 PI) u1DelayCellOfst[3]=0 cells (0 PI) u1DelayCellOfst[4]=5 cells (4 PI) u1DelayCellOfst[5]=7 cells (6 PI) u1DelayCellOfst[6]=7 cells (6 PI) u1DelayCellOfst[7]=5 cells (4 PI) Byte0, DQ PI dly=982, DQM PI dly= 985 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22) u1DelayCellOfst[8]=3 cells (3 PI) u1DelayCellOfst[9]=2 cells (2 PI) u1DelayCellOfst[10]=2 cells (2 PI) u1DelayCellOfst[11]=5 cells (4 PI) u1DelayCellOfst[12]=3 cells (3 PI) u1DelayCellOfst[13]=5 cells (4 PI) u1DelayCellOfst[14]=3 cells (3 PI) u1DelayCellOfst[15]=0 cells (0 PI) Byte1, DQ PI dly=977, DQM PI dly= 979 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17) OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17) Write Rank1 MR14 =0x16 Final TX Range 0 Vref 22 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec. Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank1 MR3 =0xb0 DramC Write-DBI on == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == [TxWindowPerbitCal] calType=1, VrefScanEnable 0 Begin, DQ Scan Range 699~763 TX Vref Scan disable 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB] 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB] 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB] 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB] 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB] 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB] 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB] 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB] 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB] 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB] 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB] 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB] 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB] 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB] 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB] 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB] 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB] 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB] 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB] 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB] 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB] 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB] 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB] 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB] 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB] 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB] 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB] 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB] 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB] Byte0, DQ PI dly=731, DQM PI dly= 731 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27) Byte1, DQ PI dly=723, DQM PI dly= 723 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19) OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19) Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 Write Rank1 MR3 =0x30 DramC Write-DBI off [DATLAT] Freq=1600, CH1 RK1, use_rxtx_scan=0 DATLAT Default: 0x10 7, 0xFFFF, sum=0 8, 0xFFFF, sum=0 9, 0xFFFF, sum=0 10, 0xFFFF, sum=0 11, 0xFFFF, sum=0 12, 0xFFFF, sum=0 13, 0xFFFF, sum=0 14, 0x0, sum=1 15, 0x0, sum=2 16, 0x0, sum=3 17, 0x0, sum=4 pattern=2 first_step=14 total pass=5 best_step=16 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == Start DQ dly to find pass range UseTestEngine =1 x-axis: bit #, y-axis: DQ dly (-127~63) RX Vref Scan = 0 -26, [0] xxxxxxxx xxxxxxxx [MSB] -25, [0] xxxxxxxx xxxxxxxx [MSB] -24, [0] xxxxxxxx xxxxxxxx [MSB] -23, [0] xxxxxxxx xxxxxxxx [MSB] -22, [0] xxxxxxxx xxxxxxxx [MSB] -21, [0] xxxxxxxx xxxxxxxx [MSB] -20, [0] xxxxxxxx xxxxxxxx [MSB] -19, [0] xxxxxxxx xxxxxxxx [MSB] -18, [0] xxxxxxxx xxxxxxxx [MSB] -17, [0] xxxxxxxx xxxxxxxx [MSB] -16, [0] xxxxxxxx xxxxxxxx [MSB] -15, [0] xxxxxxxx xxxxxxxx [MSB] -14, [0] xxxxxxxx xxxxxxxx [MSB] -13, [0] xxxxxxxx xxxxxxxx [MSB] -12, [0] xxxxxxxx xxxxxxxx [MSB] -11, [0] xxxxxxxx xxxxxxxx [MSB] -10, [0] xxxxxxxx xxxxxxxx [MSB] -9, [0] xxxxxxxx xxxxxxxx [MSB] -8, [0] xxxxxxxx xxxxxxxx [MSB] -7, [0] xxxxxxxx xxxxxxxx [MSB] -6, [0] xxxxxxxx xxxxxxxx [MSB] -5, [0] xxxxxxxx xxxxxxxx [MSB] -4, [0] xxxxxxxx xxxxxxxx [MSB] -3, [0] xxxxxxxx xxxxxxxx [MSB] -2, [0] xxxoxxxx xxxxxxxx [MSB] -1, [0] xxxoxxxx xxxxxxxx [MSB] 0, [0] xxxoxxxx xxxxxxxx [MSB] 1, [0] xxooxxxx xxxxxxxo [MSB] 2, [0] xxoooxxo ooxxxxxo [MSB] 3, [0] xxoooxxo oooxxooo [MSB] 4, [0] xxoooxxo ooooxooo [MSB] 5, [0] xoooooxo oooooooo [MSB] 6, [0] xoooooxo oooooooo [MSB] 7, [0] ooooooxo oooooooo [MSB] 8, [0] ooooooxo oooooooo [MSB] 33, [0] oooxoooo oooooooo [MSB] 34, [0] oooxoooo ooooooox [MSB] 35, [0] ooxxoooo ooxoooox [MSB] 36, [0] ooxxoooo ooxoooox [MSB] 37, [0] ooxxxoox oxxoooxx [MSB] 38, [0] ooxxxoox xxxooxxx [MSB] 39, [0] ooxxxoox xxxxoxxx [MSB] 40, [0] ooxxxoox xxxxoxxx [MSB] 41, [0] ooxxxxox xxxxxxxx [MSB] 42, [0] xxxxxxxx xxxxxxxx [MSB] iDelay=42, Bit 0, Center 24 (7 ~ 41) 35 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34 iDelay=42, Bit 3, Center 15 (-2 ~ 32) 35 iDelay=42, Bit 4, Center 19 (2 ~ 36) 35 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36 iDelay=42, Bit 6, Center 25 (9 ~ 41) 33 iDelay=42, Bit 7, Center 19 (2 ~ 36) 35 iDelay=42, Bit 8, Center 19 (2 ~ 37) 36 iDelay=42, Bit 9, Center 19 (2 ~ 36) 35 iDelay=42, Bit 10, Center 18 (3 ~ 34) 32 iDelay=42, Bit 11, Center 21 (4 ~ 38) 35 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35 iDelay=42, Bit 14, Center 19 (3 ~ 36) 34 iDelay=42, Bit 15, Center 17 (1 ~ 33) 33 == Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1 fsp= 1, odt_onoff= 1, Byte mode= 0 == DQS Delay: DQS0 = 0, DQS1 = 0 DQM Delay: DQM0 = 20, DQM1 = 19 DQ Delay: DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15 DQ4 =19, DQ5 =22, DQ6 =25, DQ7 =19 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =21 DQ12 =22, DQ13 =20, DQ14 =19, DQ15 =17 [DramC_TX_OE_Calibration] TA2 Original DQ_B0 (3 6) =30, OEN = 27 Original DQ_B1 (3 6) =30, OEN = 27 23, 0x0, End_B0=23 End_B1=23 24, 0x0, End_B0=24 End_B1=24 25, 0x0, End_B0=25 End_B1=25 26, 0x0, End_B0=26 End_B1=26 27, 0x0, End_B0=27 End_B1=27 28, 0x0, End_B0=28 End_B1=28 29, 0x0, End_B0=29 End_B1=29 30, 0x0, End_B0=30 End_B1=30 31, 0xFFFF, End_B0=30 End_B1=30 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3) Write Rank1 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps CH1_RK1: MR19=0x3, MR18=0xB3, DQSOSC=332, MR23=63, INC=22, DEC=33 Write Rank1 MR23 =0x3f [DQSOSC] [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps CH1 RK1: MR19=3, MR18=B3 [RxdqsGatingPostProcess] freq 1600 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3 Rank: 0 best DQS0 dly(2T, 0.5T) = (2, 5) best DQS1 dly(2T, 0.5T) = (2, 5) best DQS0 P1 dly(2T, 0.5T) = (3, 1) best DQS1 P1 dly(2T, 0.5T) = (3, 1) Rank: 1 best DQS0 dly(2T, 0.5T) = (2, 5) best DQS1 dly(2T, 0.5T) = (2, 5) best DQS0 P1 dly(2T, 0.5T) = (3, 1) best DQS1 P1 dly(2T, 0.5T) = (3, 1) TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16 [Calibration Summary] Freqency 1600 CH 0, Rank 0 All Pass. CH 0, Rank 1 All Pass. CH 1, Rank 0 All Pass. CH 1, Rank 1 All Pass. Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank0 MR3 =0xb0 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank1 MR3 =0xb0 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank0 MR3 =0xb0 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2 Write Rank1 MR3 =0xb0 DramC Write-DBI on [GetDramInforAfterCalByMRR] Vendor 1. [GetDramInforAfterCalByMRR] Revision 7. MR8 12 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000. MR8 12 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000. MR8 12 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000. MR8 12 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000. [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0 Write Rank0 MR13 =0xd0 Write Rank1 MR13 =0xd0 Write Rank0 MR13 =0xd0 Write Rank1 MR13 =0xd0 Save calibration result to emmc [DramcModeReg_Check] Freq_1600, FSP_1 FSP_1, CH_0, RK0 Write Rank0 MR13 =0xd8 MR12 = 0x56 (global = 0x56) match MR14 = 0x18 (global = 0x18) match FSP_1, CH_0, RK1 Write Rank1 MR13 =0xd8 MR12 = 0x56 (global = 0x56) match MR14 = 0x16 (global = 0x16) match FSP_1, CH_1, RK0 Write Rank0 MR13 =0xd8 MR12 = 0x56 (global = 0x56) match MR14 = 0x16 (global = 0x16) match FSP_1, CH_1, RK1 Write Rank1 MR13 =0xd8 MR12 = 0x56 (global = 0x56) match MR14 = 0x16 (global = 0x16) match [MEM_TEST] 02: After DFS, before run time config [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0) [TA2_TEST] === TA2 HW TA2 PAT: XTALK HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0 Settings after calibration [DramcRunTimeConfig] TransferPLLToSPMControl - MODE SW PHYPLL TX_TRACKING: ON RX_TRACKING: ON HW_GATING: ON HW_GATING DBG: OFF ddr_geometry:1 ddr_geometry:1 ddr_geometry:1 ddr_geometry:1 ddr_geometry:1 ddr_geometry:1 ddr_geometry:1 ddr_geometry:1 High Freq DUMMY_READ_FOR_TRACKING: ON ZQCS_ENABLE_LP4: OFF LOWPOWER_GOLDEN_SETTINGS(DCM): ON DUMMY_READ_FOR_DQS_GATING_RETRY: OFF SPM_CONTROL_AFTERK: ON IMPEDANCE_TRACKING: ON TEMP_SENSOR: ON PER_BANK_REFRESH: ON HW_SAVE_FOR_SR: ON SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON CLK_FREE_FUN_FOR_DRAMC_PSEL: ON PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON Read ODT Tracking: ON ========================= [TA2_TEST] === TA2 HW HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0 [MEM_TEST] 03: After run time config [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0) [complex_mem_test] start addr:0x40024000, len:131072 1st complex R/W mem test pass save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0 sync preloader write leveling sync preloader cbt_mr12 sync preloader cbt_clk_dly sync preloader cbt_cmd_dly sync preloader cbt_cs sync preloader cbt_ca_perbit_delay sync preloader clk_delay sync preloader dqs_delay sync preloader u1Gating2T_Save sync preloader u1Gating05T_Save sync preloader u1Gatingfine_tune_Save sync preloader u1Gatingucpass_count_Save sync preloader u1TxWindowPerbitVref_Save sync preloader u1TxCenter_min_Save sync preloader u1TxCenter_max_Save sync preloader u1Txwin_center_Save sync preloader u1Txfirst_pass_Save sync preloader u1Txlast_pass_Save sync preloader u1RxDatlat_Save sync preloader u1RxWinPerbitVref_Save sync preloader u1RxWinPerbitDQ_firsbypass_Save sync preloader u1RxWinPerbitDQ_lastbypass_Save sync preloader delay_cell_unit save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1 sync preloader write leveling sync preloader cbt_mr12 sync preloader cbt_clk_dly sync preloader cbt_cmd_dly sync preloader cbt_cs sync preloader cbt_ca_perbit_delay sync preloader clk_delay sync preloader dqs_delay sync preloader u1Gating2T_Save sync preloader u1Gating05T_Save sync preloader u1Gatingfine_tune_Save sync preloader u1Gatingucpass_count_Save sync preloader u1TxWindowPerbitVref_Save sync preloader u1TxCenter_min_Save sync preloader u1TxCenter_max_Save sync preloader u1Txwin_center_Save sync preloader u1Txfirst_pass_Save sync preloader u1Txlast_pass_Save sync preloader u1RxDatlat_Save sync preloader u1RxWinPerbitVref_Save sync preloader u1RxWinPerbitDQ_firsbypass_Save sync preloader u1RxWinPerbitDQ_lastbypass_Save sync preloader delay_cell_unit save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2 sync preloader write leveling sync preloader cbt_mr12 sync preloader cbt_clk_dly sync preloader cbt_cmd_dly sync preloader cbt_cs sync preloader cbt_ca_perbit_delay sync preloader clk_delay sync preloader dqs_delay sync preloader u1Gating2T_Save sync preloader u1Gating05T_Save sync preloader u1Gatingfine_tune_Save sync preloader u1Gatingucpass_count_Save sync preloader u1TxWindowPerbitVref_Save sync preloader u1TxCenter_min_Save sync preloader u1TxCenter_max_Save sync preloader u1Txwin_center_Save sync preloader u1Txfirst_pass_Save sync preloader u1Txlast_pass_Save sync preloader u1RxDatlat_Save sync preloader u1RxWinPerbitVref_Save sync preloader u1RxWinPerbitDQ_firsbypass_Save sync preloader u1RxWinPerbitDQ_lastbypass_Save sync preloader delay_cell_unit just_for_test_dump_coreboot_params dump all params dump source = 0x0 dump params frequency:1600 dump params rank number:2 dump params write leveling write leveling[0][0][0] = 0x20 write leveling[0][0][1] = 0x1c write leveling[0][1][0] = 0x22 write leveling[0][1][1] = 0x1f write leveling[1][0][0] = 0x24 write leveling[1][0][1] = 0x1f write leveling[1][1][0] = 0x23 write leveling[1][1][1] = 0x20 dump params cbt_cs cbt_cs[0][0] = 0xa cbt_cs[0][1] = 0xa cbt_cs[1][0] = 0xb cbt_cs[1][1] = 0xb dump params cbt_mr12 cbt_mr12[0][0] = 0x16 cbt_mr12[0][1] = 0x16 cbt_mr12[1][0] = 0x16 cbt_mr12[1][1] = 0x16 dump params tx window tx_center_min[0][0][0] = 979 tx_center_max[0][0][0] = 985 tx_center_min[0][0][1] = 974 tx_center_max[0][0][1] = 979 tx_center_min[0][1][0] = 982 tx_center_max[0][1][0] = 989 tx_center_min[0][1][1] = 979 tx_center_max[0][1][1] = 985 tx_center_min[1][0][0] = 983 tx_center_max[1][0][0] = 989 tx_center_min[1][0][1] = 976 tx_center_max[1][0][1] = 980 tx_center_min[1][1][0] = 982 tx_center_max[1][1][0] = 989 tx_center_min[1][1][1] = 977 tx_center_max[1][1][1] = 981 dump params tx window tx_win_center[0][0][0] = 985 tx_first_pass[0][0][0] = 973 tx_last_pass[0][0][0] = 997 tx_win_center[0][0][1] = 983 tx_first_pass[0][0][1] = 972 tx_last_pass[0][0][1] = 995 tx_win_center[0][0][2] = 983 tx_first_pass[0][0][2] = 972 tx_last_pass[0][0][2] = 995 tx_win_center[0][0][3] = 979 tx_first_pass[0][0][3] = 967 tx_last_pass[0][0][3] = 991 tx_win_center[0][0][4] = 984 tx_first_pass[0][0][4] = 972 tx_last_pass[0][0][4] = 996 tx_win_center[0][0][5] = 979 tx_first_pass[0][0][5] = 968 tx_last_pass[0][0][5] = 991 tx_win_center[0][0][6] = 980 tx_first_pass[0][0][6] = 968 tx_last_pass[0][0][6] = 992 tx_win_center[0][0][7] = 981 tx_first_pass[0][0][7] = 970 tx_last_pass[0][0][7] = 993 tx_win_center[0][0][8] = 974 tx_first_pass[0][0][8] = 962 tx_last_pass[0][0][8] = 986 tx_win_center[0][0][9] = 975 tx_first_pass[0][0][9] = 963 tx_last_pass[0][0][9] = 988 tx_win_center[0][0][10] = 979 tx_first_pass[0][0][10] = 968 tx_last_pass[0][0][10] = 991 tx_win_center[0][0][11] = 975 tx_first_pass[0][0][11] = 962 tx_last_pass[0][0][11] = 988 tx_win_center[0][0][12] = 976 tx_first_pass[0][0][12] = 963 tx_last_pass[0][0][12] = 989 tx_win_center[0][0][13] = 974 tx_first_pass[0][0][13] = 962 tx_last_pass[0][0][13] = 987 tx_win_center[0][0][14] = 976 tx_first_pass[0][0][14] = 964 tx_last_pass[0][0][14] = 988 tx_win_center[0][0][15] = 978 tx_first_pass[0][0][15] = 967 tx_last_pass[0][0][15] = 990 tx_win_center[0][1][0] = 989 tx_first_pass[0][1][0] = 977 tx_last_pass[0][1][0] = 1001 tx_win_center[0][1][1] = 988 tx_first_pass[0][1][1] = 977 tx_last_pass[0][1][1] = 1000 tx_win_center[0][1][2] = 988 tx_first_pass[0][1][2] = 977 tx_last_pass[0][1][2] = 1000 tx_win_center[0][1][3] = 982 tx_first_pass[0][1][3] = 969 tx_last_pass[0][1][3] = 995 tx_win_center[0][1][4] = 988 tx_first_pass[0][1][4] = 976 tx_last_pass[0][1][4] = 1000 tx_win_center[0][1][5] = 982 tx_first_pass[0][1][5] = 971 tx_last_pass[0][1][5] = 994 tx_win_center[0][1][6] = 984 tx_first_pass[0][1][6] = 971 tx_last_pass[0][1][6] = 998 tx_win_center[0][1][7] = 986 tx_first_pass[0][1][7] = 974 tx_last_pass[0][1][7] = 998 tx_win_center[0][1][8] = 979 tx_first_pass[0][1][8] = 968 tx_last_pass[0][1][8] = 991 tx_win_center[0][1][9] = 980 tx_first_pass[0][1][9] = 969 tx_last_pass[0][1][9] = 992 tx_win_center[0][1][10] = 985 tx_first_pass[0][1][10] = 974 tx_last_pass[0][1][10] = 997 tx_win_center[0][1][11] = 979 tx_first_pass[0][1][11] = 968 tx_last_pass[0][1][11] = 991 tx_win_center[0][1][12] = 980 tx_first_pass[0][1][12] = 969 tx_last_pass[0][1][12] = 992 tx_win_center[0][1][13] = 979 tx_first_pass[0][1][13] = 968 tx_last_pass[0][1][13] = 991 tx_win_center[0][1][14] = 980 tx_first_pass[0][1][14] = 969 tx_last_pass[0][1][14] = 992 tx_win_center[0][1][15] = 982 tx_first_pass[0][1][15] = 971 tx_last_pass[0][1][15] = 994 tx_win_center[1][0][0] = 989 tx_first_pass[1][0][0] = 977 tx_last_pass[1][0][0] = 1002 tx_win_center[1][0][1] = 988 tx_first_pass[1][0][1] = 976 tx_last_pass[1][0][1] = 1000 tx_win_center[1][0][2] = 986 tx_first_pass[1][0][2] = 974 tx_last_pass[1][0][2] = 998 tx_win_center[1][0][3] = 983 tx_first_pass[1][0][3] = 971 tx_last_pass[1][0][3] = 995 tx_win_center[1][0][4] = 987 tx_first_pass[1][0][4] = 975 tx_last_pass[1][0][4] = 999 tx_win_center[1][0][5] = 989 tx_first_pass[1][0][5] = 977 tx_last_pass[1][0][5] = 1001 tx_win_center[1][0][6] = 989 tx_first_pass[1][0][6] = 977 tx_last_pass[1][0][6] = 1001 tx_win_center[1][0][7] = 986 tx_first_pass[1][0][7] = 975 tx_last_pass[1][0][7] = 998 tx_win_center[1][0][8] = 978 tx_first_pass[1][0][8] = 966 tx_last_pass[1][0][8] = 991 tx_win_center[1][0][9] = 978 tx_first_pass[1][0][9] = 966 tx_last_pass[1][0][9] = 991 tx_win_center[1][0][10] = 979 tx_first_pass[1][0][10] = 967 tx_last_pass[1][0][10] = 991 tx_win_center[1][0][11] = 980 tx_first_pass[1][0][11] = 969 tx_last_pass[1][0][11] = 992 tx_win_center[1][0][12] = 980 tx_first_pass[1][0][12] = 968 tx_last_pass[1][0][12] = 992 tx_win_center[1][0][13] = 979 tx_first_pass[1][0][13] = 968 tx_last_pass[1][0][13] = 991 tx_win_center[1][0][14] = 979 tx_first_pass[1][0][14] = 968 tx_last_pass[1][0][14] = 991 tx_win_center[1][0][15] = 976 tx_first_pass[1][0][15] = 964 tx_last_pass[1][0][15] = 988 tx_win_center[1][1][0] = 989 tx_first_pass[1][1][0] = 977 tx_last_pass[1][1][0] = 1001 tx_win_center[1][1][1] = 988 tx_first_pass[1][1][1] = 977 tx_last_pass[1][1][1] = 1000 tx_win_center[1][1][2] = 984 tx_first_pass[1][1][2] = 973 tx_last_pass[1][1][2] = 996 tx_win_center[1][1][3] = 982 tx_first_pass[1][1][3] = 970 tx_last_pass[1][1][3] = 995 tx_win_center[1][1][4] = 986 tx_first_pass[1][1][4] = 974 tx_last_pass[1][1][4] = 998 tx_win_center[1][1][5] = 988 tx_first_pass[1][1][5] = 976 tx_last_pass[1][1][5] = 1000 tx_win_center[1][1][6] = 988 tx_first_pass[1][1][6] = 976 tx_last_pass[1][1][6] = 1001 tx_win_center[1][1][7] = 986 tx_first_pass[1][1][7] = 975 tx_last_pass[1][1][7] = 997 tx_win_center[1][1][8] = 980 tx_first_pass[1][1][8] = 969 tx_last_pass[1][1][8] = 991 tx_win_center[1][1][9] = 979 tx_first_pass[1][1][9] = 968 tx_last_pass[1][1][9] = 991 tx_win_center[1][1][10] = 979 tx_first_pass[1][1][10] = 968 tx_last_pass[1][1][10] = 991 tx_win_center[1][1][11] = 981 tx_first_pass[1][1][11] = 970 tx_last_pass[1][1][11] = 993 tx_win_center[1][1][12] = 980 tx_first_pass[1][1][12] = 969 tx_last_pass[1][1][12] = 992 tx_win_center[1][1][13] = 981 tx_first_pass[1][1][13] = 970 tx_last_pass[1][1][13] = 992 tx_win_center[1][1][14] = 980 tx_first_pass[1][1][14] = 969 tx_last_pass[1][1][14] = 992 tx_win_center[1][1][15] = 977 tx_first_pass[1][1][15] = 966 tx_last_pass[1][1][15] = 989 dump params rx window rx_firspass[0][0][0] = 9 rx_lastpass[0][0][0] = 42 rx_firspass[0][0][1] = 8 rx_lastpass[0][0][1] = 40 rx_firspass[0][0][2] = 9 rx_lastpass[0][0][2] = 39 rx_firspass[0][0][3] = -1 rx_lastpass[0][0][3] = 31 rx_firspass[0][0][4] = 7 rx_lastpass[0][0][4] = 39 rx_firspass[0][0][5] = 3 rx_lastpass[0][0][5] = 29 rx_firspass[0][0][6] = 2 rx_lastpass[0][0][6] = 32 rx_firspass[0][0][7] = 4 rx_lastpass[0][0][7] = 34 rx_firspass[0][0][8] = 2 rx_lastpass[0][0][8] = 34 rx_firspass[0][0][9] = 5 rx_lastpass[0][0][9] = 35 rx_firspass[0][0][10] = 9 rx_lastpass[0][0][10] = 38 rx_firspass[0][0][11] = 3 rx_lastpass[0][0][11] = 31 rx_firspass[0][0][12] = 5 rx_lastpass[0][0][12] = 34 rx_firspass[0][0][13] = 1 rx_lastpass[0][0][13] = 32 rx_firspass[0][0][14] = 3 rx_lastpass[0][0][14] = 33 rx_firspass[0][0][15] = 4 rx_lastpass[0][0][15] = 35 rx_firspass[0][1][0] = 9 rx_lastpass[0][1][0] = 43 rx_firspass[0][1][1] = 7 rx_lastpass[0][1][1] = 42 rx_firspass[0][1][2] = 7 rx_lastpass[0][1][2] = 42 rx_firspass[0][1][3] = -2 rx_lastpass[0][1][3] = 33 rx_firspass[0][1][4] = 5 rx_lastpass[0][1][4] = 40 rx_firspass[0][1][5] = 1 rx_lastpass[0][1][5] = 34 rx_firspass[0][1][6] = 2 rx_lastpass[0][1][6] = 35 rx_firspass[0][1][7] = 2 rx_lastpass[0][1][7] = 36 rx_firspass[0][1][8] = 0 rx_lastpass[0][1][8] = 36 rx_firspass[0][1][9] = 2 rx_lastpass[0][1][9] = 38 rx_firspass[0][1][10] = 6 rx_lastpass[0][1][10] = 41 rx_firspass[0][1][11] = 1 rx_lastpass[0][1][11] = 33 rx_firspass[0][1][12] = 1 rx_lastpass[0][1][12] = 36 rx_firspass[0][1][13] = -1 rx_lastpass[0][1][13] = 34 rx_firspass[0][1][14] = 1 rx_lastpass[0][1][14] = 36 rx_firspass[0][1][15] = 3 rx_lastpass[0][1][15] = 38 rx_firspass[1][0][0] = 8 rx_lastpass[1][0][0] = 40 rx_firspass[1][0][1] = 7 rx_lastpass[1][0][1] = 38 rx_firspass[1][0][2] = 1 rx_lastpass[1][0][2] = 32 rx_firspass[1][0][3] = 0 rx_lastpass[1][0][3] = 31 rx_firspass[1][0][4] = 4 rx_lastpass[1][0][4] = 33 rx_firspass[1][0][5] = 9 rx_lastpass[1][0][5] = 38 rx_firspass[1][0][6] = 10 rx_lastpass[1][0][6] = 40 rx_firspass[1][0][7] = 5 rx_lastpass[1][0][7] = 33 rx_firspass[1][0][8] = 3 rx_lastpass[1][0][8] = 34 rx_firspass[1][0][9] = 3 rx_lastpass[1][0][9] = 35 rx_firspass[1][0][10] = 2 rx_lastpass[1][0][10] = 34 rx_firspass[1][0][11] = 4 rx_lastpass[1][0][11] = 34 rx_firspass[1][0][12] = 5 rx_lastpass[1][0][12] = 35 rx_firspass[1][0][13] = 5 rx_lastpass[1][0][13] = 32 rx_firspass[1][0][14] = 4 rx_lastpass[1][0][14] = 34 rx_firspass[1][0][15] = 0 rx_lastpass[1][0][15] = 32 rx_firspass[1][1][0] = 7 rx_lastpass[1][1][0] = 41 rx_firspass[1][1][1] = 5 rx_lastpass[1][1][1] = 41 rx_firspass[1][1][2] = 1 rx_lastpass[1][1][2] = 34 rx_firspass[1][1][3] = -2 rx_lastpass[1][1][3] = 32 rx_firspass[1][1][4] = 2 rx_lastpass[1][1][4] = 36 rx_firspass[1][1][5] = 5 rx_lastpass[1][1][5] = 40 rx_firspass[1][1][6] = 9 rx_lastpass[1][1][6] = 41 rx_firspass[1][1][7] = 2 rx_lastpass[1][1][7] = 36 rx_firspass[1][1][8] = 2 rx_lastpass[1][1][8] = 37 rx_firspass[1][1][9] = 2 rx_lastpass[1][1][9] = 36 rx_firspass[1][1][10] = 3 rx_lastpass[1][1][10] = 34 rx_firspass[1][1][11] = 4 rx_lastpass[1][1][11] = 38 rx_firspass[1][1][12] = 5 rx_lastpass[1][1][12] = 40 rx_firspass[1][1][13] = 3 rx_lastpass[1][1][13] = 37 rx_firspass[1][1][14] = 3 rx_lastpass[1][1][14] = 36 rx_firspass[1][1][15] = 1 rx_lastpass[1][1][15] = 33 dump params clk_delay clk_delay[0] = -1 clk_delay[1] = 0 dump params dqs_delay dqs_delay[0][0] = 0 dqs_delay[0][1] = 0 dqs_delay[1][0] = -1 dqs_delay[1][1] = 0 dump params delay_cell_unit = 762 dump source = 0x0 dump params frequency:1200 dump params rank number:2 dump params write leveling write leveling[0][0][0] = 0x0 write leveling[0][0][1] = 0x0 write leveling[0][1][0] = 0x0 write leveling[0][1][1] = 0x0 write leveling[1][0][0] = 0x0 write leveling[1][0][1] = 0x0 write leveling[1][1][0] = 0x0 write leveling[1][1][1] = 0x0 dump params cbt_cs cbt_cs[0][0] = 0x0 cbt_cs[0][1] = 0x0 cbt_cs[1][0] = 0x0 cbt_cs[1][1] = 0x0 dump params cbt_mr12 cbt_mr12[0][0] = 0x0 cbt_mr12[0][1] = 0x0 cbt_mr12[1][0] = 0x0 cbt_mr12[1][1] = 0x0 dump params tx window tx_center_min[0][0][0] = 0 tx_center_max[0][0][0] = 0 tx_center_min[0][0][1] = 0 tx_center_max[0][0][1] = 0 tx_center_min[0][1][0] = 0 tx_center_max[0][1][0] = 0 tx_center_min[0][1][1] = 0 tx_center_max[0][1][1] = 0 tx_center_min[1][0][0] = 0 tx_center_max[1][0][0] = 0 tx_center_min[1][0][1] = 0 tx_center_max[1][0][1] = 0 tx_center_min[1][1][0] = 0 tx_center_max[1][1][0] = 0 tx_center_min[1][1][1] = 0 tx_center_max[1][1][1] = 0 dump params tx window tx_win_center[0][0][0] = 0 tx_first_pass[0][0][0] = 0 tx_last_pass[0][0][0] = 0 tx_win_center[0][0][1] = 0 tx_first_pass[0][0][1] = 0 tx_last_pass[0][0][1] = 0 tx_win_center[0][0][2] = 0 tx_first_pass[0][0][2] = 0 tx_last_pass[0][0][2] = 0 tx_win_center[0][0][3] = 0 tx_first_pass[0][0][3] = 0 tx_last_pass[0][0][3] = 0 tx_win_center[0][0][4] = 0 tx_first_pass[0][0][4] = 0 tx_last_pass[0][0][4] = 0 tx_win_center[0][0][5] = 0 tx_first_pass[0][0][5] = 0 tx_last_pass[0][0][5] = 0 tx_win_center[0][0][6] = 0 tx_first_pass[0][0][6] = 0 tx_last_pass[0][0][6] = 0 tx_win_center[0][0][7] = 0 tx_first_pass[0][0][7] = 0 tx_last_pass[0][0][7] = 0 tx_win_center[0][0][8] = 0 tx_first_pass[0][0][8] = 0 tx_last_pass[0][0][8] = 0 tx_win_center[0][0][9] = 0 tx_first_pass[0][0][9] = 0 tx_last_pass[0][0][9] = 0 tx_win_center[0][0][10] = 0 tx_first_pass[0][0][10] = 0 tx_last_pass[0][0][10] = 0 tx_win_center[0][0][11] = 0 tx_first_pass[0][0][11] = 0 tx_last_pass[0][0][11] = 0 tx_win_center[0][0][12] = 0 tx_first_pass[0][0][12] = 0 tx_last_pass[0][0][12] = 0 tx_win_center[0][0][13] = 0 tx_first_pass[0][0][13] = 0 tx_last_pass[0][0][13] = 0 tx_win_center[0][0][14] = 0 tx_first_pass[0][0][14] = 0 tx_last_pass[0][0][14] = 0 tx_win_center[0][0][15] = 0 tx_first_pass[0][0][15] = 0 tx_last_pass[0][0][15] = 0 tx_win_center[0][1][0] = 0 tx_first_pass[0][1][0] = 0 tx_last_pass[0][1][0] = 0 tx_win_center[0][1][1] = 0 tx_first_pass[0][1][1] = 0 tx_last_pass[0][1][1] = 0 tx_win_center[0][1][2] = 0 tx_first_pass[0][1][2] = 0 tx_last_pass[0][1][2] = 0 tx_win_center[0][1][3] = 0 tx_first_pass[0][1][3] = 0 tx_last_pass[0][1][3] = 0 tx_win_center[0][1][4] = 0 tx_first_pass[0][1][4] = 0 tx_last_pass[0][1][4] = 0 tx_win_center[0][1][5] = 0 tx_first_pass[0][1][5] = 0 tx_last_pass[0][1][5] = 0 tx_win_center[0][1][6] = 0 tx_first_pass[0][1][6] = 0 tx_last_pass[0][1][6] = 0 tx_win_center[0][1][7] = 0 tx_first_pass[0][1][7] = 0 tx_last_pass[0][1][7] = 0 tx_win_center[0][1][8] = 0 tx_first_pass[0][1][8] = 0 tx_last_pass[0][1][8] = 0 tx_win_center[0][1][9] = 0 tx_first_pass[0][1][9] = 0 tx_last_pass[0][1][9] = 0 tx_win_center[0][1][10] = 0 tx_first_pass[0][1][10] = 0 tx_last_pass[0][1][10] = 0 tx_win_center[0][1][11] = 0 tx_first_pass[0][1][11] = 0 tx_last_pass[0][1][11] = 0 tx_win_center[0][1][12] = 0 tx_first_pass[0][1][12] = 0 tx_last_pass[0][1][12] = 0 tx_win_center[0][1][13] = 0 tx_first_pass[0][1][13] = 0 tx_last_pass[0][1][13] = 0 tx_win_center[0][1][14] = 0 tx_first_pass[0][1][14] = 0 tx_last_pass[0][1][14] = 0 tx_win_center[0][1][15] = 0 tx_first_pass[0][1][15] = 0 tx_last_pass[0][1][15] = 0 tx_win_center[1][0][0] = 0 tx_first_pass[1][0][0] = 0 tx_last_pass[1][0][0] = 0 tx_win_center[1][0][1] = 0 tx_first_pass[1][0][1] = 0 tx_last_pass[1][0][1] = 0 tx_win_center[1][0][2] = 0 tx_first_pass[1][0][2] = 0 tx_last_pass[1][0][2] = 0 tx_win_center[1][0][3] = 0 tx_first_pass[1][0][3] = 0 tx_last_pass[1][0][3] = 0 tx_win_center[1][0][4] = 0 tx_first_pass[1][0][4] = 0 tx_last_pass[1][0][4] = 0 tx_win_center[1][0][5] = 0 tx_first_pass[1][0][5] = 0 tx_last_pass[1][0][5] = 0 tx_win_center[1][0][6] = 0 tx_first_pass[1][0][6] = 0 tx_last_pass[1][0][6] = 0 tx_win_center[1][0][7] = 0 tx_first_pass[1][0][7] = 0 tx_last_pass[1][0][7] = 0 tx_win_center[1][0][8] = 0 tx_first_pass[1][0][8] = 0 tx_last_pass[1][0][8] = 0 tx_win_center[1][0][9] = 0 tx_first_pass[1][0][9] = 0 tx_last_pass[1][0][9] = 0 tx_win_center[1][0][10] = 0 tx_first_pass[1][0][10] = 0 tx_last_pass[1][0][10] = 0 tx_win_center[1][0][11] = 0 tx_first_pass[1][0][11] = 0 tx_last_pass[1][0][11] = 0 tx_win_center[1][0][12] = 0 tx_first_pass[1][0][12] = 0 tx_last_pass[1][0][12] = 0 tx_win_center[1][0][13] = 0 tx_first_pass[1][0][13] = 0 tx_last_pass[1][0][13] = 0 tx_win_center[1][0][14] = 0 tx_first_pass[1][0][14] = 0 tx_last_pass[1][0][14] = 0 tx_win_center[1][0][15] = 0 tx_first_pass[1][0][15] = 0 tx_last_pass[1][0][15] = 0 tx_win_center[1][1][0] = 0 tx_first_pass[1][1][0] = 0 tx_last_pass[1][1][0] = 0 tx_win_center[1][1][1] = 0 tx_first_pass[1][1][1] = 0 tx_last_pass[1][1][1] = 0 tx_win_center[1][1][2] = 0 tx_first_pass[1][1][2] = 0 tx_last_pass[1][1][2] = 0 tx_win_center[1][1][3] = 0 tx_first_pass[1][1][3] = 0 tx_last_pass[1][1][3] = 0 tx_win_center[1][1][4] = 0 tx_first_pass[1][1][4] = 0 tx_last_pass[1][1][4] = 0 tx_win_center[1][1][5] = 0 tx_first_pass[1][1][5] = 0 tx_last_pass[1][1][5] = 0 tx_win_center[1][1][6] = 0 tx_first_pass[1][1][6] = 0 tx_last_pass[1][1][6] = 0 tx_win_center[1][1][7] = 0 tx_first_pass[1][1][7] = 0 tx_last_pass[1][1][7] = 0 tx_win_center[1][1][8] = 0 tx_first_pass[1][1][8] = 0 tx_last_pass[1][1][8] = 0 tx_win_center[1][1][9] = 0 tx_first_pass[1][1][9] = 0 tx_last_pass[1][1][9] = 0 tx_win_center[1][1][10] = 0 tx_first_pass[1][1][10] = 0 tx_last_pass[1][1][10] = 0 tx_win_center[1][1][11] = 0 tx_first_pass[1][1][11] = 0 tx_last_pass[1][1][11] = 0 tx_win_center[1][1][12] = 0 tx_first_pass[1][1][12] = 0 tx_last_pass[1][1][12] = 0 tx_win_center[1][1][13] = 0 tx_first_pass[1][1][13] = 0 tx_last_pass[1][1][13] = 0 tx_win_center[1][1][14] = 0 tx_first_pass[1][1][14] = 0 tx_last_pass[1][1][14] = 0 tx_win_center[1][1][15] = 0 tx_first_pass[1][1][15] = 0 tx_last_pass[1][1][15] = 0 dump params rx window rx_firspass[0][0][0] = 0 rx_lastpass[0][0][0] = 0 rx_firspass[0][0][1] = 0 rx_lastpass[0][0][1] = 0 rx_firspass[0][0][2] = 0 rx_lastpass[0][0][2] = 0 rx_firspass[0][0][3] = 0 rx_lastpass[0][0][3] = 0 rx_firspass[0][0][4] = 0 rx_lastpass[0][0][4] = 0 rx_firspass[0][0][5] = 0 rx_lastpass[0][0][5] = 0 rx_firspass[0][0][6] = 0 rx_lastpass[0][0][6] = 0 rx_firspass[0][0][7] = 0 rx_lastpass[0][0][7] = 0 rx_firspass[0][0][8] = 0 rx_lastpass[0][0][8] = 0 rx_firspass[0][0][9] = 0 rx_lastpass[0][0][9] = 0 rx_firspass[0][0][10] = 0 rx_lastpass[0][0][10] = 0 rx_firspass[0][0][11] = 0 rx_lastpass[0][0][11] = 0 rx_firspass[0][0][12] = 0 rx_lastpass[0][0][12] = 0 rx_firspass[0][0][13] = 0 rx_lastpass[0][0][13] = 0 rx_firspass[0][0][14] = 0 rx_lastpass[0][0][14] = 0 rx_firspass[0][0][15] = 0 rx_lastpass[0][0][15] = 0 rx_firspass[0][1][0] = 0 rx_lastpass[0][1][0] = 0 rx_firspass[0][1][1] = 0 rx_lastpass[0][1][1] = 0 rx_firspass[0][1][2] = 0 rx_lastpass[0][1][2] = 0 rx_firspass[0][1][3] = 0 rx_lastpass[0][1][3] = 0 rx_firspass[0][1][4] = 0 rx_lastpass[0][1][4] = 0 rx_firspass[0][1][5] = 0 rx_lastpass[0][1][5] = 0 rx_firspass[0][1][6] = 0 rx_lastpass[0][1][6] = 0 rx_firspass[0][1][7] = 0 rx_lastpass[0][1][7] = 0 rx_firspass[0][1][8] = 0 rx_lastpass[0][1][8] = 0 rx_firspass[0][1][9] = 0 rx_lastpass[0][1][9] = 0 rx_firspass[0][1][10] = 0 rx_lastpass[0][1][10] = 0 rx_firspass[0][1][11] = 0 rx_lastpass[0][1][11] = 0 rx_firspass[0][1][12] = 0 rx_lastpass[0][1][12] = 0 rx_firspass[0][1][13] = 0 rx_lastpass[0][1][13] = 0 rx_firspass[0][1][14] = 0 rx_lastpass[0][1][14] = 0 rx_firspass[0][1][15] = 0 rx_lastpass[0][1][15] = 0 rx_firspass[1][0][0] = 0 rx_lastpass[1][0][0] = 0 rx_firspass[1][0][1] = 0 rx_lastpass[1][0][1] = 0 rx_firspass[1][0][2] = 0 rx_lastpass[1][0][2] = 0 rx_firspass[1][0][3] = 0 rx_lastpass[1][0][3] = 0 rx_firspass[1][0][4] = 0 rx_lastpass[1][0][4] = 0 rx_firspass[1][0][5] = 0 rx_lastpass[1][0][5] = 0 rx_firspass[1][0][6] = 0 rx_lastpass[1][0][6] = 0 rx_firspass[1][0][7] = 0 rx_lastpass[1][0][7] = 0 rx_firspass[1][0][8] = 0 rx_lastpass[1][0][8] = 0 rx_firspass[1][0][9] = 0 rx_lastpass[1][0][9] = 0 rx_firspass[1][0][10] = 0 rx_lastpass[1][0][10] = 0 rx_firspass[1][0][11] = 0 rx_lastpass[1][0][11] = 0 rx_firspass[1][0][12] = 0 rx_lastpass[1][0][12] = 0 rx_firspass[1][0][13] = 0 rx_lastpass[1][0][13] = 0 rx_firspass[1][0][14] = 0 rx_lastpass[1][0][14] = 0 rx_firspass[1][0][15] = 0 rx_lastpass[1][0][15] = 0 rx_firspass[1][1][0] = 0 rx_lastpass[1][1][0] = 0 rx_firspass[1][1][1] = 0 rx_lastpass[1][1][1] = 0 rx_firspass[1][1][2] = 0 rx_lastpass[1][1][2] = 0 rx_firspass[1][1][3] = 0 rx_lastpass[1][1][3] = 0 rx_firspass[1][1][4] = 0 rx_lastpass[1][1][4] = 0 rx_firspass[1][1][5] = 0 rx_lastpass[1][1][5] = 0 rx_firspass[1][1][6] = 0 rx_lastpass[1][1][6] = 0 rx_firspass[1][1][7] = 0 rx_lastpass[1][1][7] = 0 rx_firspass[1][1][8] = 0 rx_lastpass[1][1][8] = 0 rx_firspass[1][1][9] = 0 rx_lastpass[1][1][9] = 0 rx_firspass[1][1][10] = 0 rx_lastpass[1][1][10] = 0 rx_firspass[1][1][11] = 0 rx_lastpass[1][1][11] = 0 rx_firspass[1][1][12] = 0 rx_lastpass[1][1][12] = 0 rx_firspass[1][1][13] = 0 rx_lastpass[1][1][13] = 0 rx_firspass[1][1][14] = 0 rx_lastpass[1][1][14] = 0 rx_firspass[1][1][15] = 0 rx_lastpass[1][1][15] = 0 dump params clk_delay clk_delay[0] = 0 clk_delay[1] = 0 dump params dqs_delay dqs_delay[0][0] = 0 dqs_delay[0][1] = 0 dqs_delay[1][0] = 0 dqs_delay[1][1] = 0 dump params delay_cell_unit = 762 dump source = 0x0 dump params frequency:800 dump params rank number:2 dump params write leveling write leveling[0][0][0] = 0x0 write leveling[0][0][1] = 0x0 write leveling[0][1][0] = 0x0 write leveling[0][1][1] = 0x0 write leveling[1][0][0] = 0x0 write leveling[1][0][1] = 0x0 write leveling[1][1][0] = 0x0 write leveling[1][1][1] = 0x0 dump params cbt_cs cbt_cs[0][0] = 0x0 cbt_cs[0][1] = 0x0 cbt_cs[1][0] = 0x0 cbt_cs[1][1] = 0x0 dump params cbt_mr12 cbt_mr12[0][0] = 0x0 cbt_mr12[0][1] = 0x0 cbt_mr12[1][0] = 0x0 cbt_mr12[1][1] = 0x0 dump params tx window tx_center_min[0][0][0] = 0 tx_center_max[0][0][0] = 0 tx_center_min[0][0][1] = 0 tx_center_max[0][0][1] = 0 tx_center_min[0][1][0] = 0 tx_center_max[0][1][0] = 0 tx_center_min[0][1][1] = 0 tx_center_max[0][1][1] = 0 tx_center_min[1][0][0] = 0 tx_center_max[1][0][0] = 0 tx_center_min[1][0][1] = 0 tx_center_max[1][0][1] = 0 tx_center_min[1][1][0] = 0 tx_center_max[1][1][0] = 0 tx_center_min[1][1][1] = 0 tx_center_max[1][1][1] = 0 dump params tx window tx_win_center[0][0][0] = 0 tx_first_pass[0][0][0] = 0 tx_last_pass[0][0][0] = 0 tx_win_center[0][0][1] = 0 tx_first_pass[0][0][1] = 0 tx_last_pass[0][0][1] = 0 tx_win_center[0][0][2] = 0 tx_first_pass[0][0][2] = 0 tx_last_pass[0][0][2] = 0 tx_win_center[0][0][3] = 0 tx_first_pass[0][0][3] = 0 tx_last_pass[0][0][3] = 0 tx_win_center[0][0][4] = 0 tx_first_pass[0][0][4] = 0 tx_last_pass[0][0][4] = 0 tx_win_center[0][0][5] = 0 tx_first_pass[0][0][5] = 0 tx_last_pass[0][0][5] = 0 tx_win_center[0][0][6] = 0 tx_first_pass[0][0][6] = 0 tx_last_pass[0][0][6] = 0 tx_win_center[0][0][7] = 0 tx_first_pass[0][0][7] = 0 tx_last_pass[0][0][7] = 0 tx_win_center[0][0][8] = 0 tx_first_pass[0][0][8] = 0 tx_last_pass[0][0][8] = 0 tx_win_center[0][0][9] = 0 tx_first_pass[0][0][9] = 0 tx_last_pass[0][0][9] = 0 tx_win_center[0][0][10] = 0 tx_first_pass[0][0][10] = 0 tx_last_pass[0][0][10] = 0 tx_win_center[0][0][11] = 0 tx_first_pass[0][0][11] = 0 tx_last_pass[0][0][11] = 0 tx_win_center[0][0][12] = 0 tx_first_pass[0][0][12] = 0 tx_last_pass[0][0][12] = 0 tx_win_center[0][0][13] = 0 tx_first_pass[0][0][13] = 0 tx_last_pass[0][0][13] = 0 tx_win_center[0][0][14] = 0 tx_first_pass[0][0][14] = 0 tx_last_pass[0][0][14] = 0 tx_win_center[0][0][15] = 0 tx_first_pass[0][0][15] = 0 tx_last_pass[0][0][15] = 0 tx_win_center[0][1][0] = 0 tx_first_pass[0][1][0] = 0 tx_last_pass[0][1][0] = 0 tx_win_center[0][1][1] = 0 tx_first_pass[0][1][1] = 0 tx_last_pass[0][1][1] = 0 tx_win_center[0][1][2] = 0 tx_first_pass[0][1][2] = 0 tx_last_pass[0][1][2] = 0 tx_win_center[0][1][3] = 0 tx_first_pass[0][1][3] = 0 tx_last_pass[0][1][3] = 0 tx_win_center[0][1][4] = 0 tx_first_pass[0][1][4] = 0 tx_last_pass[0][1][4] = 0 tx_win_center[0][1][5] = 0 tx_first_pass[0][1][5] = 0 tx_last_pass[0][1][5] = 0 tx_win_center[0][1][6] = 0 tx_first_pass[0][1][6] = 0 tx_last_pass[0][1][6] = 0 tx_win_center[0][1][7] = 0 tx_first_pass[0][1][7] = 0 tx_last_pass[0][1][7] = 0 tx_win_center[0][1][8] = 0 tx_first_pass[0][1][8] = 0 tx_last_pass[0][1][8] = 0 tx_win_center[0][1][9] = 0 tx_first_pass[0][1][9] = 0 tx_last_pass[0][1][9] = 0 tx_win_center[0][1][10] = 0 tx_first_pass[0][1][10] = 0 tx_last_pass[0][1][10] = 0 tx_win_center[0][1][11] = 0 tx_first_pass[0][1][11] = 0 tx_last_pass[0][1][11] = 0 tx_win_center[0][1][12] = 0 tx_first_pass[0][1][12] = 0 tx_last_pass[0][1][12] = 0 tx_win_center[0][1][13] = 0 tx_first_pass[0][1][13] = 0 tx_last_pass[0][1][13] = 0 tx_win_center[0][1][14] = 0 tx_first_pass[0][1][14] = 0 tx_last_pass[0][1][14] = 0 tx_win_center[0][1][15] = 0 tx_first_pass[0][1][15] = 0 tx_last_pass[0][1][15] = 0 tx_win_center[1][0][0] = 0 tx_first_pass[1][0][0] = 0 tx_last_pass[1][0][0] = 0 tx_win_center[1][0][1] = 0 tx_first_pass[1][0][1] = 0 tx_last_pass[1][0][1] = 0 tx_win_center[1][0][2] = 0 tx_first_pass[1][0][2] = 0 tx_last_pass[1][0][2] = 0 tx_win_center[1][0][3] = 0 tx_first_pass[1][0][3] = 0 tx_last_pass[1][0][3] = 0 tx_win_center[1][0][4] = 0 tx_first_pass[1][0][4] = 0 tx_last_pass[1][0][4] = 0 tx_win_center[1][0][5] = 0 tx_first_pass[1][0][5] = 0 tx_last_pass[1][0][5] = 0 tx_win_center[1][0][6] = 0 tx_first_pass[1][0][6] = 0 tx_last_pass[1][0][6] = 0 tx_win_center[1][0][7] = 0 tx_first_pass[1][0][7] = 0 tx_last_pass[1][0][7] = 0 tx_win_center[1][0][8] = 0 tx_first_pass[1][0][8] = 0 tx_last_pass[1][0][8] = 0 tx_win_center[1][0][9] = 0 tx_first_pass[1][0][9] = 0 tx_last_pass[1][0][9] = 0 tx_win_center[1][0][10] = 0 tx_first_pass[1][0][10] = 0 tx_last_pass[1][0][10] = 0 tx_win_center[1][0][11] = 0 tx_first_pass[1][0][11] = 0 tx_last_pass[1][0][11] = 0 tx_win_center[1][0][12] = 0 tx_first_pass[1][0][12] = 0 tx_last_pass[1][0][12] = 0 tx_win_center[1][0][13] = 0 tx_first_pass[1][0][13] = 0 tx_last_pass[1][0][13] = 0 tx_win_center[1][0][14] = 0 tx_first_pass[1][0][14] = 0 tx_last_pass[1][0][14] = 0 tx_win_center[1][0][15] = 0 tx_first_pass[1][0][15] = 0 tx_last_pass[1][0][15] = 0 tx_win_center[1][1][0] = 0 tx_first_pass[1][1][0] = 0 tx_last_pass[1][1][0] = 0 tx_win_center[1][1][1] = 0 tx_first_pass[1][1][1] = 0 tx_last_pass[1][1][1] = 0 tx_win_center[1][1][2] = 0 tx_first_pass[1][1][2] = 0 tx_last_pass[1][1][2] = 0 tx_win_center[1][1][3] = 0 tx_first_pass[1][1][3] = 0 tx_last_pass[1][1][3] = 0 tx_win_center[1][1][4] = 0 tx_first_pass[1][1][4] = 0 tx_last_pass[1][1][4] = 0 tx_win_center[1][1][5] = 0 tx_first_pass[1][1][5] = 0 tx_last_pass[1][1][5] = 0 tx_win_center[1][1][6] = 0 tx_first_pass[1][1][6] = 0 tx_last_pass[1][1][6] = 0 tx_win_center[1][1][7] = 0 tx_first_pass[1][1][7] = 0 tx_last_pass[1][1][7] = 0 tx_win_center[1][1][8] = 0 tx_first_pass[1][1][8] = 0 tx_last_pass[1][1][8] = 0 tx_win_center[1][1][9] = 0 tx_first_pass[1][1][9] = 0 tx_last_pass[1][1][9] = 0 tx_win_center[1][1][10] = 0 tx_first_pass[1][1][10] = 0 tx_last_pass[1][1][10] = 0 tx_win_center[1][1][11] = 0 tx_first_pass[1][1][11] = 0 tx_last_pass[1][1][11] = 0 tx_win_center[1][1][12] = 0 tx_first_pass[1][1][12] = 0 tx_last_pass[1][1][12] = 0 tx_win_center[1][1][13] = 0 tx_first_pass[1][1][13] = 0 tx_last_pass[1][1][13] = 0 tx_win_center[1][1][14] = 0 tx_first_pass[1][1][14] = 0 tx_last_pass[1][1][14] = 0 tx_win_center[1][1][15] = 0 tx_first_pass[1][1][15] = 0 tx_last_pass[1][1][15] = 0 dump params rx window rx_firspass[0][0][0] = 0 rx_lastpass[0][0][0] = 0 rx_firspass[0][0][1] = 0 rx_lastpass[0][0][1] = 0 rx_firspass[0][0][2] = 0 rx_lastpass[0][0][2] = 0 rx_firspass[0][0][3] = 0 rx_lastpass[0][0][3] = 0 rx_firspass[0][0][4] = 0 rx_lastpass[0][0][4] = 0 rx_firspass[0][0][5] = 0 rx_lastpass[0][0][5] = 0 rx_firspass[0][0][6] = 0 rx_lastpass[0][0][6] = 0 rx_firspass[0][0][7] = 0 rx_lastpass[0][0][7] = 0 rx_firspass[0][0][8] = 0 rx_lastpass[0][0][8] = 0 rx_firspass[0][0][9] = 0 rx_lastpass[0][0][9] = 0 rx_firspass[0][0][10] = 0 rx_lastpass[0][0][10] = 0 rx_firspass[0][0][11] = 0 rx_lastpass[0][0][11] = 0 rx_firspass[0][0][12] = 0 rx_lastpass[0][0][12] = 0 rx_firspass[0][0][13] = 0 rx_lastpass[0][0][13] = 0 rx_firspass[0][0][14] = 0 rx_lastpass[0][0][14] = 0 rx_firspass[0][0][15] = 0 rx_lastpass[0][0][15] = 0 rx_firspass[0][1][0] = 0 rx_lastpass[0][1][0] = 0 rx_firspass[0][1][1] = 0 rx_lastpass[0][1][1] = 0 rx_firspass[0][1][2] = 0 rx_lastpass[0][1][2] = 0 rx_firspass[0][1][3] = 0 rx_lastpass[0][1][3] = 0 rx_firspass[0][1][4] = 0 rx_lastpass[0][1][4] = 0 rx_firspass[0][1][5] = 0 rx_lastpass[0][1][5] = 0 rx_firspass[0][1][6] = 0 rx_lastpass[0][1][6] = 0 rx_firspass[0][1][7] = 0 rx_lastpass[0][1][7] = 0 rx_firspass[0][1][8] = 0 rx_lastpass[0][1][8] = 0 rx_firspass[0][1][9] = 0 rx_lastpass[0][1][9] = 0 rx_firspass[0][1][10] = 0 rx_lastpass[0][1][10] = 0 rx_firspass[0][1][11] = 0 rx_lastpass[0][1][11] = 0 rx_firspass[0][1][12] = 0 rx_lastpass[0][1][12] = 0 rx_firspass[0][1][13] = 0 rx_lastpass[0][1][13] = 0 rx_firspass[0][1][14] = 0 rx_lastpass[0][1][14] = 0 rx_firspass[0][1][15] = 0 rx_lastpass[0][1][15] = 0 rx_firspass[1][0][0] = 0 rx_lastpass[1][0][0] = 0 rx_firspass[1][0][1] = 0 rx_lastpass[1][0][1] = 0 rx_firspass[1][0][2] = 0 rx_lastpass[1][0][2] = 0 rx_firspass[1][0][3] = 0 rx_lastpass[1][0][3] = 0 rx_firspass[1][0][4] = 0 rx_lastpass[1][0][4] = 0 rx_firspass[1][0][5] = 0 rx_lastpass[1][0][5] = 0 rx_firspass[1][0][6] = 0 rx_lastpass[1][0][6] = 0 rx_firspass[1][0][7] = 0 rx_lastpass[1][0][7] = 0 rx_firspass[1][0][8] = 0 rx_lastpass[1][0][8] = 0 rx_firspass[1][0][9] = 0 rx_lastpass[1][0][9] = 0 rx_firspass[1][0][10] = 0 rx_lastpass[1][0][10] = 0 rx_firspass[1][0][11] = 0 rx_lastpass[1][0][11] = 0 rx_firspass[1][0][12] = 0 rx_lastpass[1][0][12] = 0 rx_firspass[1][0][13] = 0 rx_lastpass[1][0][13] = 0 rx_firspass[1][0][14] = 0 rx_lastpass[1][0][14] = 0 rx_firspass[1][0][15] = 0 rx_lastpass[1][0][15] = 0 rx_firspass[1][1][0] = 0 rx_lastpass[1][1][0] = 0 rx_firspass[1][1][1] = 0 rx_lastpass[1][1][1] = 0 rx_firspass[1][1][2] = 0 rx_lastpass[1][1][2] = 0 rx_firspass[1][1][3] = 0 rx_lastpass[1][1][3] = 0 rx_firspass[1][1][4] = 0 rx_lastpass[1][1][4] = 0 rx_firspass[1][1][5] = 0 rx_lastpass[1][1][5] = 0 rx_firspass[1][1][6] = 0 rx_lastpass[1][1][6] = 0 rx_firspass[1][1][7] = 0 rx_lastpass[1][1][7] = 0 rx_firspass[1][1][8] = 0 rx_lastpass[1][1][8] = 0 rx_firspass[1][1][9] = 0 rx_lastpass[1][1][9] = 0 rx_firspass[1][1][10] = 0 rx_lastpass[1][1][10] = 0 rx_firspass[1][1][11] = 0 rx_lastpass[1][1][11] = 0 rx_firspass[1][1][12] = 0 rx_lastpass[1][1][12] = 0 rx_firspass[1][1][13] = 0 rx_lastpass[1][1][13] = 0 rx_firspass[1][1][14] = 0 rx_lastpass[1][1][14] = 0 rx_firspass[1][1][15] = 0 rx_lastpass[1][1][15] = 0 dump params clk_delay clk_delay[0] = 0 clk_delay[1] = 0 dump params dqs_delay dqs_delay[0][0] = 0 dqs_delay[0][1] = 0 dqs_delay[1][0] = 0 dqs_delay[1][1] = 0 dump params delay_cell_unit = 762 mt_set_emi_preloader end [mt_mem_init] dram size: 0x100000000, rank number: 2 [complex_mem_test] start addr:0x40000000, len:20480 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0 [complex_mem_test] start addr:0x80000000, len:20480 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0 [complex_mem_test] start addr:0xc0000000, len:20480 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0 [complex_mem_test] start addr:0x56000000, len:8192 [MEM] 1st complex R/W mem test pass (start addr:0x56000000) ddr_geometry:1 [complex_mem_test] start addr:0x80000000, len:8192 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1) dram_init: dram init end (result: 0) Successfully loaded DRAM blobs and ran DRAM calibration Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal CBMEM: IMD: root @ 00000000fffff000 254 entries. IMD: root @ 00000000ffffec00 62 entries. VBOOT: copying vboot_working_data (256 bytes) to CBMEM... out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00 in-header: 03 a1 00 00 08 00 00 00 in-data: 84 60 60 10 00 00 00 00 Chrome EC: clear events_b mask to 0x0000000020004000 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00 in-header: 03 fd 00 00 00 00 00 00 in-data: FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 10d40 size d563 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps Accumulated console time in romstage 12793 ms coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)... ARM64: Exception handlers installed. ARM64: Testing exception ARM64: Done test exception FMAP: area RO_VPD found @ 3f8000 (32768 bytes) Manufacturer: ef SF: Detected W25Q64DW with sector size 0x1000, total 0x800000 WARNING: RO_VPD is uninitialized or empty. FMAP: area RW_VPD found @ 550000 (16384 bytes) FMAP: area RW_VPD found @ 550000 (16384 bytes) read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 CPU: 00: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 CPU: 00: enabled 1 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 10689 usecs done BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0 Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU: 00 missing read_resources CPU_CLUSTER: 0 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 CPU: 00 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0 CPU: 00 Setting resources... Root Device assign_resources, bus 0 link: 0 CPU_CLUSTER: 0 missing set_resources Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 CPU: 00 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0 CPU: 00 Done allocating resources. BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0 Enabling resources... done. BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0 Initializing devices... Root Device init ... mainboard_init: Starting display init. ADC[4]: Raw value=76494 ID=0 anx7625_power_on_init: Init interface. anx7625_disable_pd_protocol: Disabled PD feature. anx7625_power_on_init: Firmware: ver 0x13, rev 0x0. anx7625_start_dp_work: Secure OCM version=00 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91 sp_tx_get_edid_block: EDID Block = 1 Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 06 af 5c 14 00 00 00 00 00 1a version: 01 04 basic params: 95 1a 0e 78 02 chroma info: 99 85 95 55 56 92 28 22 50 54 established: 00 00 00 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a extensions: 00 checksum: ae Manufacturer: AUO Model 145c Serial Number 0 Made week 0 of 2016 EDID version: 1.4 Digital display 6 bits per primary color channel DisplayPort interface Maximum image size: 26 cm x 14 cm Gamma: 220% Check DPMS levels Supported color formats: RGB 4:4:4 First detailed timing is preferred timing Established timings supported: Standard timings supported: Detailed timings Hex of detail: ce1d56ea50001a3030204600009010000018 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm 0556 0586 05a6 0640 hborder 0 0300 0304 030a 031a vborder 0 -hsync -vsync Did detailed timing Hex of detail: 0000000f0000000000000000000000000020 Manufacturer-specified data, tag 15 Hex of detail: 000000fe0041554f0a202020202020202020 ASCII string: AUO Hex of detail: 000000fe004231313658414230312e34200a ASCII string: B116XAB01.4 Checksum Checksum: 0xae (valid) get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz DSI data_rate: 457800000 bps anx7625_parse_edid: set default k value to 0x3d for panel anx7625_parse_edid: pixelclock(76300). hactive(1366), hsync(32), hfp(48), hbp(154) vactive(768), vsync(6), vfp(4), vbp(16) anx7625_dsi_config: config dsi. anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8). anx7625_dsi_config: success to config DSI anx7625_dp_start: MIPI phy setup OK. [SSUSB] Setting up USB HOST controller... [SSUSB] u3phy_ports_enable u2p:1, u3p:0 [SSUSB] phy power-on done. out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00 in-header: 03 fc 01 00 00 00 00 00 in-data: handle_proto3_response: EC response with error code: 1 SPM: pcm index = 1 FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'pcm_allinone_lp4_3200.bin' CBFS: Found @ offset 1e7c0 size 1026 read SPI 0x3f808 0x1026: 1270 us, 3255 KB/s, 26.040 Mbps SPM: binary array size = 2988 SPM: version = pcm_allinone_v1.17.2_20180829 SPM binary loaded in 32 msecs spm_kick_im_to_fetch: ptr = 000000004021eec2 spm_kick_im_to_fetch: len = 2988 SPM: spm_kick_pcm_to_run SPM: spm_kick_pcm_to_run done SPM: spm_init done in 52 msecs Root Device init finished in 494997 usecs CPU_CLUSTER: 0 init ... Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'sspm.bin' CBFS: Found @ offset 208c0 size 41cb read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps CPU_CLUSTER: 0 init finished in 42801 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 CPU: 00: enabled 1 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0 FMAP: area RW_ELOG found @ 558000 (4096 bytes) ELOG: NV offset 0x558000 size 0x1000 read SPI 0x558000 0x1000: 1263 us, 3243 KB/s, 25.944 Mbps ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024 ELOG: Event(17) added with size 13 at 2024-06-21 01:57:03 UTC out: cmd=0x121: 03 db 21 01 00 00 00 00 in-header: 03 64 00 00 2c 00 00 00 in-data: fc 47 00 00 00 00 00 00 02 10 00 00 06 80 00 00 06 33 01 00 06 80 00 00 ba 2b 02 00 06 80 00 00 4d 2b 01 00 06 80 00 00 2a 3a 02 00 out: cmd=0xd: 03 f0 0d 00 00 00 00 00 in-header: 03 19 00 00 08 00 00 00 in-data: a2 e0 47 00 13 00 00 00 Chrome EC: UHEPI supported out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00 in-header: 03 e1 00 00 08 00 00 00 in-data: 84 20 60 10 00 00 00 00 FMAP: area RW_NVRAM found @ 554000 (8192 bytes) out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00 in-header: 03 e1 00 00 08 00 00 00 in-data: 84 20 60 10 00 00 00 00 ELOG: Event(A1) added with size 10 at 2024-06-21 01:57:04 UTC ELOG: Event(16) added with size 11 at 2024-06-21 01:57:04 UTC SF: Successfully erased 4096 bytes @ 0x558000 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02 ELOG: Event(A0) added with size 9 at 2024-06-21 01:57:04 UTC elog_add_boot_reason: Logged dev mode boot Finalize devices... Devices finalized BS: BS_POST_DEVICE times (ms): entry 82 run 0 exit 0 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0 ELOG: Event(91) added with size 10 at 2024-06-21 01:57:04 UTC Writing coreboot table at 0xffeda000 0. 0000000000114000-000000000011efff: RAMSTAGE 1. 0000000040000000-000000004023cfff: RAMSTAGE 2. 000000004023d000-00000000545fffff: RAM 3. 0000000054600000-000000005465ffff: BL31 4. 0000000054660000-00000000ffed9fff: RAM 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES 6. 0000000100000000-000000013fffffff: RAM Passing 5 GPIOs to payload: NAME | PORT | POLARITY | VALUE write protect | 0x00000096 | low | high EC in RW | 0x000000b1 | high | undefined EC interrupt | 0x00000097 | low | undefined TPM interrupt | 0x00000099 | high | undefined speaker enable | 0x000000af | high | undefined out: cmd=0x6: 03 f7 06 00 00 00 00 00 in-header: 03 f7 00 00 02 00 00 00 in-data: 04 00 Board ID: 4 ADC[3]: Raw value=1034629 ID=8 RAM code: 8 SKU ID: 16 FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 26c5 coreboot table: 940 bytes. IMD ROOT 0. 00000000fffff000 00001000 IMD SMALL 1. 00000000ffffe000 00001000 CONSOLE 2. 00000000fffde000 00020000 FMAP 3. 00000000fffdd000 0000047c TIME STAMP 4. 00000000fffdc000 00000910 RAMOOPS 5. 00000000ffedc000 00100000 COREBOOT 6. 00000000ffeda000 00002000 IMD small region: IMD ROOT 0. 00000000ffffec00 00000400 VBOOT WORK 1. 00000000ffffeb00 00000100 EC HOSTEVENT 2. 00000000ffffeae0 00000008 VPD 3. 00000000ffffea60 0000006c BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00 in-header: 03 e1 00 00 08 00 00 00 in-data: 84 20 60 10 00 00 00 00 FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'fallback/payload' CBFS: Found @ offset dc040 size 439a0 read SPI 0xfd078 0x439a0: 84378 us, 3281 KB/s, 26.248 Mbps Checking segment from ROM address 0x0000000040003a00 Checking segment from ROM address 0x0000000040003a1c Loading segment from ROM address 0x0000000040003a00 code (compression=0) New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968 it's not compressed! [ 0x80000000, 80043968, 0x811994a0) <- 40003a38 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38 Loading segment from ROM address 0x0000000040003a1c Entry Point 0x0000000080000000 Loaded segments BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0 Jumping to boot code at 0000000080000000(00000000ffeda000) CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes FMAP: area COREBOOT found @ 21000 (4014080 bytes) CBFS @ 21000 size 3d4000 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000) CBFS: Locating 'fallback/bl31' CBFS: Found @ offset 36dc0 size 5820 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps Checking segment from ROM address 0x0000000040003a00 Checking segment from ROM address 0x0000000040003a1c Loading segment from ROM address 0x0000000040003a00 code (compression=1) New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8 using LZMA [ 0x54600000, 5460f420, 0x54629000) <- 40003a38 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0 Loading segment from ROM address 0x0000000040003a1c Entry Point 0x0000000054601000 Loaded segments NOTICE: MT8183 bl31_setup NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022 INFO: [DEVAPC] dump DEVAPC registers: INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0 INFO: [DEVAPC] MAS_DOM_0 = 0x1 INFO: [DEVAPC] MAS_DOM_1 = 0x200 INFO: [DEVAPC] MAS_DOM_2 = 0x0 INFO: [DEVAPC] MAS_DOM_3 = 0x2000 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24 WARNING: region 0: WARNING: apc:0x168, sa:0x0, ea:0xfff WARNING: region 1: WARNING: apc:0x140, sa:0x1000, ea:0x128f WARNING: region 2: WARNING: apc:0x168, sa:0x1290, ea:0x1fff WARNING: region 3: WARNING: apc:0x168, sa:0x2000, ea:0xbfff WARNING: region 4: WARNING: apc:0x168, sa:0xc000, ea:0x1ffff WARNING: region 5: WARNING: apc:0x0, sa:0x0, ea:0x0 WARNING: region 6: WARNING: apc:0x0, sa:0x0, ea:0x0 WARNING: region 7: WARNING: apc:0x0, sa:0x0, ea:0x0 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3 INFO: SPM: enable SPMC mode NOTICE: spm_boot_init() start NOTICE: spm_boot_init() end INFO: BL31: Initializing runtime services INFO: BL31: cortex_a53: CPU workaround for 855873 was applied INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x80000000 INFO: SPSR = 0x8 Starting depthcharge on Juniper... vboot_handoff: creating legacy vboot_handoff structure ec_init(0): CrosEC protocol v3 supported (544, 544) Wipe memory regions: [0x00000040000000, 0x00000054600000) [0x00000054660000, 0x00000080000000) [0x000000811994a0, 0x000000ffeda000) [0x00000100000000, 0x00000140000000) Initializing XHCI USB controller at 0x11200000. [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54 jacuzzi: tftpboot 192.168.201.1 14479169/tftp-deploy-fdqb7x23/kernel/image.itb 14479169/tftp-deploy-fdqb7x23/kernel/cmdline tftpboot 192.168.201.1 14479169/tftp-deploy-fdqb7x23/kernel/image.ittp-deploy-fdqb7x23/kernel/cmdline Waiting for link R8152: Initializing Version 9 (ocp_data = 6010) R8152: Done initializing Adding net device done. MAC: 00:e0:4c:71:a7:1f Sending DHCP discover... done. Waiting for reply... done. Sending DHCP request... done. Waiting for reply... done. My ip is 192.168.201.23 The DHCP server ip is 192.168.201.1 TFTP server IP predefined by user: 192.168.201.1 Bootfile predefined by user: 14479169/tftp-deploy-fdqb7x23/kernel/image.itb Sending tftp read request... done. Waiting for the transfer... 00000000 ################################################################ 00080000 ################################################################ 00100000 ################################################################ 00180000 ################################################################ 00200000 ################################################################ 00280000 ################################################################ 00300000 ################################################################ 00380000 ################################################################ 00400000 ################################################################ 00480000 ################################################################ 00500000 ################################################################ 00580000 ################################################################ 00600000 ################################################################ 00680000 ################################################################ 00700000 ################################################################ 00780000 ################################################################ 00800000 ################################################################ 00880000 ################################################################ 00900000 ################################################################ 00980000 ################################################################ 00a00000 ################################################################ 00a80000 ################################################################ 00b00000 ################################################################ 00b80000 ################################################################ 00c00000 ################################################################ 00c80000 ################################################################ 00d00000 ################################################################ 00d80000 ################################################################ 00e00000 ################################################################ 00e80000 ################################################################ 00f00000 ################################################################ 00f80000 ################################################################ 01000000 ################################################################ 01080000 ################################################################ 01100000 ################################################################ 01180000 ################################################################ 01200000 ################################################################ 01280000 ################################################################ 01300000 ################################################################ 01380000 ################################################################ 01400000 ################################################################ 01480000 ################################################################ 01500000 ################################################################ 01580000 ################################################################ 01600000 ################################################################ 01680000 ################################################################ 01700000 ################################################################ 01780000 ################################################################ 01800000 ################################################################ 01880000 ################################################################ 01900000 ################################################################ 01980000 ################################################################ 01a00000 ################################################################ 01a80000 ################################################################ 01b00000 ################################################################ 01b80000 ################################################################ 01c00000 ################################################################ 01c80000 ################################################################ 01d00000 ################################################################ 01d80000 ################################################################ 01e00000 ######################################################### done. The bootfile was 31923266 bytes long. Sending tftp read request... done. Waiting for the transfer... 00000000 # done. Command line loaded dynamically from TFTP file: 14479169/tftp-deploy-fdqb7x23/kernel/cmdline The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479169/extract-nfsrootfs-rq4f2012,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1 Loading FIT. Image ramdisk-1 has 18738626 bytes. Image fdt-1 has 57695 bytes. Image kernel-1 has 13124896 bytes. Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183 Choosing best match conf-1 for compat google,juniper-sku16. Connected to device vid:did:rid of 1ae0:0028:00 tpm_get_response: command 0x17b, return code 0x0 tpm_cleanup: add release locality here. Shutting down all USB controllers. Removing current net device Exiting depthcharge with code 4 at timestamp: 35153369 LZMA decompressing kernel-1 to 0x80193568 LZMA decompressing kernel-1 to 0x40000000 jumping to kernel [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034] [ 0.000000] Linux version 6.1.94-cip23 (KernelCI@build-j239242-arm64-gcc-10-defconfig-arm64-chromebook-c5lwc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 [ 0.000000] random: crng init done [ 0.000000] Machine model: Google juniper sku16 board [ 0.000000] efi: UEFI not found. [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8') [ 0.000000] printk: bootconsole [mtk8250] enabled [ 0.000000] NUMA: No NUMA configuration found [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff] [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bda00-0x13f7bffff] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff] [ 0.000000] DMA32 empty [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff] [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff] [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff] [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff] [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff] [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.1 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.1 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: GIC system register CPU interface [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI) [ 0.000000] CPU features: detected: ARM erratum 845719 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Fallback order for Node 0: 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424 [ 0.000000] Policy zone: Normal [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14479169/extract-nfsrootfs-rq4f2012,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space. <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off <6>[ 0.000000] software IO TLB: area num 8. <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB) <6>[ 0.000000] Memory: 3896768K/4191232K available (18112K kernel code, 4120K rwdata, 22648K rodata, 8512K init, 616K bss, 261696K reserved, 32768K cma-reserved) <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation. <6>[ 0.000000] rcu: RCU event tracing is enabled. <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8. <6>[ 0.000000] Trampoline variant of Tasks RCU enabled. <6>[ 0.000000] Tracing variant of Tasks RCU enabled. <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode <6>[ 0.000000] GICv3: 640 SPIs implemented <6>[ 0.000000] GICv3: 0 Extended SPIs implemented <6>[ 0.000000] Root IRQ handler: gic_handle_irq <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] } <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] } <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys). <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns <6>[ 0.009469] Console: colour dummy device 80x25 <6>[ 0.014513] printk: console [tty1] enabled <6>[ 0.018903] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000) <6>[ 0.029368] pid_max: default: 32768 minimum: 301 <6>[ 0.034250] LSM: Security Framework initializing <6>[ 0.039166] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) <6>[ 0.046789] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) <4>[ 0.055653] cacheinfo: Unable to detect cache hierarchy for CPU 0 <6>[ 0.062280] cblist_init_generic: Setting adjustable number of callback queues. <6>[ 0.069726] cblist_init_generic: Setting shift to 3 and lim to 1. <6>[ 0.076079] cblist_init_generic: Setting adjustable number of callback queues. <6>[ 0.083524] cblist_init_generic: Setting shift to 3 and lim to 1. <6>[ 0.089923] rcu: Hierarchical SRCU implementation. <6>[ 0.094949] rcu: Max phase no-delay instances is 1000. <6>[ 0.102858] EFI services will not be available. <6>[ 0.107808] smp: Bringing up secondary CPUs ... <6>[ 0.113111] Detected VIPT I-cache on CPU1 <4>[ 0.113157] cacheinfo: Unable to detect cache hierarchy for CPU 1 <6>[ 0.113166] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000 <6>[ 0.113197] CPU1: Booted secondary processor 0x0000000001 [0x410fd034] <6>[ 0.113679] Detected VIPT I-cache on CPU2 <4>[ 0.113711] cacheinfo: Unable to detect cache hierarchy for CPU 2 <6>[ 0.113716] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000 <6>[ 0.113729] CPU2: Booted secondary processor 0x0000000002 [0x410fd034] <6>[ 0.114176] Detected VIPT I-cache on CPU3 <4>[ 0.114206] cacheinfo: Unable to detect cache hierarchy for CPU 3 <6>[ 0.114210] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000 <6>[ 0.114222] CPU3: Booted secondary processor 0x0000000003 [0x410fd034] <6>[ 0.114797] CPU features: detected: Spectre-v2 <6>[ 0.114808] CPU features: detected: Spectre-BHB <6>[ 0.114812] CPU features: detected: ARM erratum 858921 <6>[ 0.114817] Detected VIPT I-cache on CPU4 <4>[ 0.114865] cacheinfo: Unable to detect cache hierarchy for CPU 4 <6>[ 0.114873] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000 <6>[ 0.114881] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.114891] arch_timer: CPU4: Trapping CNTVCT access <6>[ 0.114899] CPU4: Booted secondary processor 0x0000000100 [0x410fd092] <6>[ 0.115384] Detected VIPT I-cache on CPU5 <4>[ 0.115425] cacheinfo: Unable to detect cache hierarchy for CPU 5 <6>[ 0.115430] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000 <6>[ 0.115437] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.115443] arch_timer: CPU5: Trapping CNTVCT access <6>[ 0.115448] CPU5: Booted secondary processor 0x0000000101 [0x410fd092] <6>[ 0.115884] Detected VIPT I-cache on CPU6 <4>[ 0.115931] cacheinfo: Unable to detect cache hierarchy for CPU 6 <6>[ 0.115937] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000 <6>[ 0.115944] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.115950] arch_timer: CPU6: Trapping CNTVCT access <6>[ 0.115956] CPU6: Booted secondary processor 0x0000000102 [0x410fd092] <6>[ 0.116484] Detected VIPT I-cache on CPU7 <4>[ 0.116530] cacheinfo: Unable to detect cache hierarchy for CPU 7 <6>[ 0.116536] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000 <6>[ 0.116543] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.116549] arch_timer: CPU7: Trapping CNTVCT access <6>[ 0.116554] CPU7: Booted secondary processor 0x0000000103 [0x410fd092] <6>[ 0.116630] smp: Brought up 1 node, 8 CPUs <6>[ 0.355512] SMP: Total of 8 processors activated. <6>[ 0.360450] CPU features: detected: 32-bit EL0 Support <6>[ 0.365822] CPU features: detected: 32-bit EL1 Support <6>[ 0.371188] CPU features: detected: CRC32 instructions <6>[ 0.376615] CPU: All CPU(s) started at EL2 <6>[ 0.380953] alternatives: applying system-wide alternatives <6>[ 0.389079] devtmpfs: initialized <6>[ 0.398037] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns <6>[ 0.407984] futex hash table entries: 2048 (order: 5, 131072 bytes, linear) <6>[ 0.415717] pinctrl core: initialized pinctrl subsystem <6>[ 0.422812] DMI not present or invalid. <6>[ 0.427181] NET: Registered PF_NETLINK/PF_ROUTE protocol family <6>[ 0.434087] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations <6>[ 0.441617] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations <6>[ 0.449867] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations <6>[ 0.458043] audit: initializing netlink subsys (disabled) <5>[ 0.463748] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1 <6>[ 0.464717] thermal_sys: Registered thermal governor 'step_wise' <6>[ 0.471714] thermal_sys: Registered thermal governor 'power_allocator' <6>[ 0.478011] cpuidle: using governor menu <6>[ 0.488973] NET: Registered PF_QIPCRTR protocol family <6>[ 0.494469] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. <6>[ 0.501566] ASID allocator initialised with 32768 entries <6>[ 0.508318] Serial: AMBA PL011 UART driver <4>[ 0.518693] Trying to register duplicate clock ID: 113 <6>[ 0.574904] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58 <6>[ 0.589216] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58 <6>[ 0.598954] KASLR enabled <6>[ 0.606985] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages <6>[ 0.613988] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page <6>[ 0.620464] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages <6>[ 0.627456] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page <6>[ 0.633929] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages <6>[ 0.640919] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page <6>[ 0.647393] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages <6>[ 0.654382] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page <6>[ 0.661944] ACPI: Interpreter disabled. <6>[ 0.669899] iommu: Default domain type: Translated <6>[ 0.675006] iommu: DMA domain TLB invalidation policy: strict mode <5>[ 0.681639] SCSI subsystem initialized <6>[ 0.686054] usbcore: registered new interface driver usbfs <6>[ 0.691784] usbcore: registered new interface driver hub <6>[ 0.697326] usbcore: registered new device driver usb <6>[ 0.703623] pps_core: LinuxPPS API ver. 1 registered <6>[ 0.708808] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <6>[ 0.718134] PTP clock support registered <6>[ 0.722385] EDAC MC: Ver: 3.0.0 <6>[ 0.728015] FPGA manager framework <6>[ 0.731696] Advanced Linux Sound Architecture Driver Initialized. <6>[ 0.738450] vgaarb: loaded <6>[ 0.741579] clocksource: Switched to clocksource arch_sys_counter <5>[ 0.748009] VFS: Disk quotas dquot_6.6.0 <6>[ 0.752185] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) <6>[ 0.759356] pnp: PnP ACPI: disabled <6>[ 0.766227] NET: Registered PF_INET protocol family <6>[ 0.771452] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear) <6>[ 0.781358] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear) <6>[ 0.790111] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) <6>[ 0.798062] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear) <6>[ 0.806297] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear) <6>[ 0.814395] TCP: Hash tables configured (established 32768 bind 32768) <6>[ 0.821223] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear) <6>[ 0.828196] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear) <6>[ 0.835677] NET: Registered PF_UNIX/PF_LOCAL protocol family <6>[ 0.841805] RPC: Registered named UNIX socket transport module. <6>[ 0.847949] RPC: Registered udp transport module. <6>[ 0.852874] RPC: Registered tcp transport module. <6>[ 0.857797] RPC: Registered tcp NFSv4.1 backchannel transport module. <6>[ 0.864450] PCI: CLS 0 bytes, default 64 <6>[ 0.868733] Unpacking initramfs... <6>[ 0.889627] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available <6>[ 0.898397] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available <6>[ 0.907312] kvm [1]: IPA Size Limit: 40 bits <6>[ 0.913677] kvm [1]: vgic-v2@c420000 <6>[ 0.917505] kvm [1]: GIC system register CPU interface enabled <6>[ 0.923695] kvm [1]: vgic interrupt IRQ18 <6>[ 0.928070] kvm [1]: Hyp mode initialized successfully <5>[ 0.934442] Initialise system trusted keyrings <6>[ 0.939300] workingset: timestamp_bits=42 max_order=20 bucket_order=0 <6>[ 0.949294] squashfs: version 4.0 (2009/01/31) Phillip Lougher <5>[ 0.955757] NFS: Registering the id_resolver key type <5>[ 0.961067] Key type id_resolver registered <5>[ 0.965482] Key type id_legacy registered <6>[ 0.969791] nfs4filelayout_init: NFSv4 File Layout Driver Registering... <6>[ 0.976711] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... <6>[ 0.984475] 9p: Installing v9fs 9p2000 file system support <5>[ 1.013352] Key type asymmetric registered <5>[ 1.017703] Asymmetric key parser 'x509' registered <6>[ 1.022859] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243) <6>[ 1.030479] io scheduler mq-deadline registered <6>[ 1.035237] io scheduler kyber registered <6>[ 1.055949] EINJ: ACPI disabled. <4>[ 1.059704] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17 <6>[ 1.100393] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled <6>[ 1.108887] printk: console [ttyS0] disabled <6>[ 1.133541] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2 <6>[ 1.143018] printk: console [ttyS0] enabled <6>[ 1.143018] printk: console [ttyS0] enabled <6>[ 1.151941] printk: bootconsole [mtk8250] disabled <6>[ 1.151941] printk: bootconsole [mtk8250] disabled <3>[ 1.162481] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47 <3>[ 1.170862] mt6577-uart 11003000.serial: Error applying setting, reverse things back <6>[ 1.199276] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2 <6>[ 1.208934] serial serial0: tty port ttyS1 registered <6>[ 1.215473] SuperH (H)SCI(F) driver initialized <6>[ 1.220959] msm_serial: driver initialized <6>[ 1.231279] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000 <6>[ 1.239879] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000 <6>[ 1.248453] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000 <6>[ 1.257025] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000 <6>[ 1.265687] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000 <6>[ 1.274353] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000 <6>[ 1.283095] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000 <6>[ 1.291834] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000 <6>[ 1.300402] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000 <6>[ 1.309200] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000 <4>[ 1.321548] cacheinfo: Unable to detect cache hierarchy for CPU 0 <6>[ 1.330903] loop: module loaded <6>[ 1.342883] vsim1: Bringing 1800000uV into 2700000-2700000uV <6>[ 1.360867] megasas: 07.719.03.00-rc1 <6>[ 1.369643] spi-nor spi1.0: w25q64dw (8192 Kbytes) <6>[ 1.376963] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2 <6>[ 1.393565] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0) <6>[ 1.443518] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d <6>[ 1.486008] Freeing initrd memory: 18296K <4>[ 1.497821] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m' <4>[ 1.507052] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.94-cip23 #1 <4>[ 1.513751] Hardware name: Google juniper sku16 board (DT) <4>[ 1.519490] Call trace: <4>[ 1.522190] dump_backtrace.part.0+0xe0/0xf0 <4>[ 1.526727] show_stack+0x18/0x30 <4>[ 1.530299] dump_stack_lvl+0x68/0x84 <4>[ 1.534221] dump_stack+0x18/0x34 <4>[ 1.537791] sysfs_warn_dup+0x64/0x80 <4>[ 1.541712] sysfs_do_create_link_sd+0xf0/0x100 <4>[ 1.546498] sysfs_create_link+0x20/0x40 <4>[ 1.550674] bus_add_device+0x68/0x10c <4>[ 1.554680] device_add+0x364/0x7cc <4>[ 1.558423] of_device_add+0x44/0x60 <4>[ 1.562257] of_platform_device_create_pdata+0x90/0x120 <4>[ 1.567739] of_platform_bus_create+0x170/0x370 <4>[ 1.572523] of_platform_populate+0x50/0xfc <4>[ 1.576960] parse_mtd_partitions+0x1dc/0x510 <4>[ 1.581573] mtd_device_parse_register+0xf0/0x2e4 <4>[ 1.586532] spi_nor_probe+0x21c/0x2f0 <4>[ 1.590538] spi_mem_probe+0x6c/0xb0 <4>[ 1.594370] spi_probe+0x84/0xe4 <4>[ 1.597852] really_probe+0xbc/0x2e0 <4>[ 1.601682] __driver_probe_device+0x78/0x11c <4>[ 1.606294] driver_probe_device+0xd8/0x160 <4>[ 1.610733] __device_attach_driver+0xb8/0x134 <4>[ 1.615432] bus_for_each_drv+0x78/0xd0 <4>[ 1.619522] __device_attach+0xa8/0x1c0 <4>[ 1.623613] device_initial_probe+0x14/0x20 <4>[ 1.628051] bus_probe_device+0x9c/0xa4 <4>[ 1.632142] device_add+0x3d0/0x7cc <4>[ 1.635885] __spi_add_device+0x78/0x120 <4>[ 1.640063] spi_add_device+0x40/0x7c <4>[ 1.643981] spi_register_controller+0x610/0xad0 <4>[ 1.648854] devm_spi_register_controller+0x4c/0xa4 <4>[ 1.653987] mtk_spi_probe+0x3f8/0x650 <4>[ 1.657991] platform_probe+0x68/0xe0 <4>[ 1.661910] really_probe+0xbc/0x2e0 <4>[ 1.665740] __driver_probe_device+0x78/0x11c <4>[ 1.670352] driver_probe_device+0xd8/0x160 <4>[ 1.674790] __driver_attach+0x94/0x19c <4>[ 1.678880] bus_for_each_dev+0x70/0xd0 <4>[ 1.682970] driver_attach+0x24/0x30 <4>[ 1.686800] bus_add_driver+0x154/0x20c <4>[ 1.690891] driver_register+0x78/0x130 <4>[ 1.694982] __platform_driver_register+0x28/0x34 <4>[ 1.699941] mtk_spi_driver_init+0x1c/0x28 <4>[ 1.704295] do_one_initcall+0x50/0x1d0 <4>[ 1.708385] kernel_init_freeable+0x21c/0x288 <4>[ 1.712998] kernel_init+0x24/0x12c <4>[ 1.716744] ret_from_fork+0x10/0x20 <6>[ 1.725687] tun: Universal TUN/TAP device driver, 1.6 <6>[ 1.731968] thunder_xcv, ver 1.0 <6>[ 1.735484] thunder_bgx, ver 1.0 <6>[ 1.738987] nicpf, ver 1.0 <6>[ 1.743347] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version <6>[ 1.750832] hns3: Copyright (c) 2017 Huawei Corporation. <6>[ 1.756429] hclge is initializing <6>[ 1.760014] e1000: Intel(R) PRO/1000 Network Driver <6>[ 1.765149] e1000: Copyright (c) 1999-2006 Intel Corporation. <6>[ 1.771173] e1000e: Intel(R) PRO/1000 Network Driver <6>[ 1.776394] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. <6>[ 1.782590] igb: Intel(R) Gigabit Ethernet Network Driver <6>[ 1.788245] igb: Copyright (c) 2007-2014 Intel Corporation. <6>[ 1.794089] igbvf: Intel(R) Gigabit Virtual Function Network Driver <6>[ 1.800612] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. <6>[ 1.807161] sky2: driver version 1.30 <6>[ 1.812412] usbcore: registered new device driver r8152-cfgselector <6>[ 1.818955] usbcore: registered new interface driver r8152 <6>[ 1.824794] VFIO - User Level meta-driver version: 0.3 <6>[ 1.832590] mtu3 11201000.usb: uwk - reg:0x420, version:101 <4>[ 1.838463] mtu3 11201000.usb: supply vbus not found, using dummy regulator <6>[ 1.845741] mtu3 11201000.usb: dr_mode: 1, drd: auto <6>[ 1.850971] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0 <6>[ 1.857156] mtu3 11201000.usb: usb3-drd: 0 <6>[ 1.862718] mtu3 11201000.usb: xHCI platform device register success... <4>[ 1.871334] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator <6>[ 1.879273] xhci-mtk 11200000.usb: xHCI Host Controller <6>[ 1.884777] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1 <6>[ 1.892507] xhci-mtk 11200000.usb: USB3 root hub has no ports <6>[ 1.898516] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010 <6>[ 1.907938] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000 <6>[ 1.914004] xhci-mtk 11200000.usb: xHCI Host Controller <6>[ 1.919491] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2 <6>[ 1.927149] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed <6>[ 1.933968] hub 1-0:1.0: USB hub found <6>[ 1.937997] hub 1-0:1.0: 1 port detected <6>[ 1.943357] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. <6>[ 1.951976] hub 2-0:1.0: USB hub found <3>[ 1.956002] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19) <6>[ 1.963887] usbcore: registered new interface driver usb-storage <6>[ 1.970497] usbcore: registered new device driver onboard-usb-hub <4>[ 1.985679] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator <6>[ 1.997965] mt6397-rtc mt6358-rtc: registered as rtc0 <6>[ 2.003447] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-21T01:57:28 UTC (1718935048) <6>[ 2.013335] i2c_dev: i2c /dev entries driver <6>[ 2.019748] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58 <6>[ 2.028072] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58 <6>[ 2.036979] i2c 4-0058: Fixed dependency cycle(s) with /panel <6>[ 2.043011] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000 <6>[ 2.062505] cpu cpu0: EM: created perf domain <6>[ 2.068024] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz <6>[ 2.079304] cpu cpu4: EM: created perf domain <6>[ 2.086390] sdhci: Secure Digital Host Controller Interface driver <6>[ 2.092846] sdhci: Copyright(c) Pierre Ossman <6>[ 2.098261] Synopsys Designware Multimedia Card Interface Driver <6>[ 2.098810] mtk-msdc 11240000.mmc: allocated mmc-pwrseq <6>[ 2.105324] sdhci-pltfm: SDHCI platform and OF driver helper <6>[ 2.118872] ledtrig-cpu: registered to indicate activity on CPUs <6>[ 2.126632] usbcore: registered new interface driver usbhid <6>[ 2.132471] usbhid: USB HID core driver <6>[ 2.136787] spi_master spi2: will run message pump with realtime priority <4>[ 2.137006] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator <4>[ 2.151086] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator <6>[ 2.154531] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0 <6>[ 2.173162] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1 <4>[ 2.182302] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes) <6>[ 2.194460] cros-ec-spi spi2.0: Chrome EC device registered <4>[ 2.202184] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes) <4>[ 2.213405] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes) <4>[ 2.222266] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes) <6>[ 2.232488] mmc1: new ultra high speed SDR104 SDIO card at address 0001 <6>[ 2.248563] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14 <6>[ 2.254957] mmc0: new HS400 MMC card at address 0001 <6>[ 2.261009] mmcblk0: mmc0:0001 TB2932 29.2 GiB <6>[ 2.269363] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 <6>[ 2.278764] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB <6>[ 2.285602] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB <6>[ 2.292171] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0) <6>[ 2.295408] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound <6>[ 2.305714] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2 <6>[ 2.311008] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <6>[ 2.319648] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c <6>[ 2.331886] NET: Registered PF_PACKET protocol family <6>[ 2.345728] 9pnet: Installing 9P2000 support <5>[ 2.350310] Key type dns_resolver registered <6>[ 2.355646] registered taskstats version 1 <5>[ 2.360168] Loading compiled-in X.509 certificates <6>[ 2.365592] usb 1-1: new high-speed USB device number 2 using xhci-mtk <3>[ 2.400795] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517 <6>[ 2.429253] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <6>[ 2.443601] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.452186] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.460935] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.469528] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.478059] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.486581] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.495101] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops) <6>[ 2.504455] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0 <6>[ 2.511994] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0 <6>[ 2.519319] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0 <6>[ 2.521136] hub 1-1:1.0: USB hub found <6>[ 2.526633] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0 <6>[ 2.530401] hub 1-1:1.0: 3 ports detected <6>[ 2.537313] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0 <6>[ 2.549244] panfrost 13040000.gpu: clock rate = 511999970 <6>[ 2.554950] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet <6>[ 2.565006] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0 <6>[ 2.573015] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400 <6>[ 2.581448] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7 <6>[ 2.593529] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1 <6>[ 2.603963] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0 <6>[ 2.612807] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops) <6>[ 2.621955] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops) <6>[ 2.631086] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops) <6>[ 2.640213] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops) <6>[ 2.649513] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops) <6>[ 2.658814] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops) <6>[ 2.668287] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops) <6>[ 2.677761] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops) <6>[ 2.686887] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops) <6>[ 2.761455] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops) <6>[ 2.770380] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing <6>[ 2.782883] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1 <6>[ 2.829630] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk <6>[ 3.013877] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk <4>[ 3.117280] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2 <4>[ 3.117297] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2) <6>[ 3.154728] r8152 1-1.2:1.0 eth0: v1.12.13 <6>[ 3.233648] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk <6>[ 3.459079] Console: switching to colour frame buffer device 170x48 <6>[ 3.519746] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device <6>[ 3.535835] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <6>[ 3.552899] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <6>[ 3.565423] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4 <6>[ 3.573668] input: volume-buttons as /devices/platform/volume-buttons/input/input5 <6>[ 3.580215] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <6>[ 3.599567] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <6>[ 4.737481] r8152 1-1.2:1.0 eth0: carrier on <5>[ 4.761618] Sending DHCP requests .., OK <6>[ 6.950000] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23 <6>[ 6.958467] IP-Config: Complete: <6>[ 6.962040] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1 <6>[ 6.972946] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none) <6>[ 6.987321] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath= <6>[ 6.987332] nameserver0=192.168.201.1 <6>[ 7.007218] clk: Disabling unused clocks <6>[ 7.015164] ALSA device list: <6>[ 7.021213] No soundcards found. <6>[ 7.030236] Freeing unused kernel memory: 8512K <6>[ 7.037392] Run /init as init process Loading, please wait... Starting systemd-udevd version 252.22-1~deb12u1 <6>[ 7.390268] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0) <4>[ 7.407575] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW <3>[ 7.413501] mtk-scp 10500000.scp: invalid resource <6>[ 7.424324] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20 <6>[ 7.424739] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000 <6>[ 7.439417] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19 <3>[ 7.445339] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015 <6>[ 7.453584] mc: Linux media interface: v0.10 <4>[ 7.453825] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator <4>[ 7.453942] elants_i2c 0-0010: supply vccio not found, using dummy regulator <6>[ 7.462731] remoteproc remoteproc0: scp is available <3>[ 7.463105] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22 <4>[ 7.463499] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2 <6>[ 7.463512] remoteproc remoteproc0: powering up scp <4>[ 7.463538] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2 <3>[ 7.463543] remoteproc remoteproc0: request_firmware failed: -2 <5>[ 7.497551] cfg80211: Loading compiled-in X.509 certificates for regulatory database <3>[ 7.497639] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris <5>[ 7.515767] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7' <3>[ 7.520491] elan_i2c 2-0015: Error applying setting, reverse things back <3>[ 7.527167] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present! <6>[ 7.527179] videodev: Linux video capture interface: v2.00 <3>[ 7.528642] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <5>[ 7.529279] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600' <4>[ 7.529361] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2 <6>[ 7.529370] cfg80211: failed to load regulatory.db <6>[ 7.556299] cs_system_cfg: CoreSight Configuration manager initialised <3>[ 7.563028] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.584294] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered <6>[ 7.589464] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7 <3>[ 7.590908] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.617688] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized <3>[ 7.630979] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.632106] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized <3>[ 7.641073] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.649420] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized <6>[ 7.651989] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567) <3>[ 7.657617] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.665698] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized <6>[ 7.666225] Bluetooth: Core ver 2.22 <6>[ 7.666267] NET: Registered PF_BLUETOOTH protocol family <6>[ 7.666269] Bluetooth: HCI device and connection manager initialized <3>[ 7.674162] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.674225] Bluetooth: HCI socket layer initialized <6>[ 7.674237] Bluetooth: L2CAP socket layer initialized <6>[ 7.674251] Bluetooth: SCO socket layer initialized <3>[ 7.674263] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t' <3>[ 7.675046] debugfs: File 'Playback' in directory 'dapm' already present! <3>[ 7.675051] debugfs: File 'Capture' in directory 'dapm' already present! <6>[ 7.676317] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6 <3>[ 7.678973] thermal_sys: Failed to find 'trips' node <3>[ 7.678977] thermal_sys: Failed to find trip points for thermal-sensor1 id=0 <3>[ 7.678985] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22 <4>[ 7.678989] generic-adc-thermal: probe of thermal-sensor1 failed with error -22 <3>[ 7.681473] thermal_sys: Failed to find 'trips' node <3>[ 7.681477] thermal_sys: Failed to find trip points for thermal-sensor2 id=0 <3>[ 7.681485] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22 <4>[ 7.681489] generic-adc-thermal: probe of thermal-sensor2 failed with error -22 <6>[ 7.682176] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized <6>[ 7.682698] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0 <6>[ 7.683188] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0 <6>[ 7.684325] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0) <6>[ 7.684412] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1 <6>[ 7.685368] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8 <6>[ 7.685874] usbcore: registered new interface driver uvcvideo <3>[ 7.690430] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.698555] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized <3>[ 7.704967] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0 <6>[ 7.713464] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized <6>[ 7.713643] Bluetooth: HCI UART driver ver 2.3 <6>[ 7.713648] Bluetooth: HCI UART protocol H4 registered <6>[ 7.713684] Bluetooth: HCI UART protocol LL registered <6>[ 7.713697] Bluetooth: HCI UART protocol Three-wire (H5) registered <6>[ 7.714010] Bluetooth: HCI UART protocol Broadcom registered <6>[ 7.714029] Bluetooth: HCI UART protocol QCA registered <6>[ 7.714041] Bluetooth: HCI UART protocol Marvell registered <6>[ 7.714945] Bluetooth: hci0: setting up ROME/QCA6390 <6>[ 7.718552] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000 <6>[ 7.718558] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 <6>[ 7.718648] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77 <6>[ 7.866679] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91 <6>[ 7.868237] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized <3>[ 7.932659] Bluetooth: hci0: Frame reassembly failed (-84) Begin: Loading e<4>[ 8.144743] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA. <4>[ 8.144743] Fallback method does not support PEC. ssential drivers ... done. Begin: Running /scripts/init-premount ... done. Beg<3>[ 8.165126] power_supply sbs-12-000b: driver failed to report `technology' property: -5 in: Mounting root file system ... Begin: Running /scripts/nfs-top ... done. Begin: Running /scr<3>[ 8.182382] power_supply sbs-12-000b: driver failed to report `technology' property: -5 ipts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available Device /sys/cl<6>[ 8.198189] Bluetooth: hci0: QCA Product ID :0x00000008 ass/net/eth0 found done. <6>[ 8.207212] Bluetooth: hci0: QCA SOC Version :0x00000044 <6>[ 8.215850] Bluetooth: hci0: QCA ROM Version :0x00000302 Begin: Waiting up to 180 secs for any network de<6>[ 8.225178] Bluetooth: hci0: QCA Patch Version:0x00000111 vice to become available ... done. <6>[ 8.235186] Bluetooth: hci0: QCA controller version 0x00440302 <6>[ 8.244233] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin <4>[ 8.253915] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2 IP-Config: eth0 hardware address<3>[ 8.265654] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2) 00:e0:4c:71:a7:1f mtu 1500 DHCP<3>[ 8.276236] Bluetooth: hci0: QCA Failed to download patch (-2) IP-Config: eth0 complete (dhcp from 192.168.201.1): address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3 domain : lava-rack rootserver: 192.168.201.1 rootpath: filename : <6>[ 8.434628] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1 done. Begin: Running /scripts/nfs-bottom ... done. Begin: Running /scripts/init-bottom ... done. <4>[ 8.521973] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes) <4>[ 8.540444] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes) <4>[ 8.553792] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes) <4>[ 8.564732] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes) <6>[ 9.848978] NET: Registered PF_INET6 protocol family <6>[ 9.860172] Segment Routing with IPv6 <6>[ 9.868066] In-situ OAM (IOAM) with IPv6 <30>[ 10.028725] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified) <30>[ 10.074458] systemd[1]: Detected architecture arm64. Welcome to Debian GNU/Linux 12 (bookworm)! <30>[ 10.116021] systemd[1]: Hostname set to . <30>[ 11.263018] systemd[1]: Queued start job for default target graphical.target. <30>[ 11.298885] systemd[1]: Created slice system-getty.slice - Slice /system/getty. [ OK ] Created slice system-getty.slice - Slice /system/getty. <30>[ 11.331757] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe. [ OK ] Created slice system-modpr…lice - Slice /system/modprobe. <30>[ 11.364026] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty. [ OK ] Created slice system-seria… - Slice /system/serial-getty. <30>[ 11.395361] systemd[1]: Created slice user.slice - User and Session Slice. [ OK ] Created slice user.slice - User and Session Slice. <30>[ 11.426219] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch. [ OK ] Started systemd-ask-passwo…quests to Console Directory Watch. <30>[ 11.458007] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch. [ OK ] Started systemd-ask-passwo… Requests to Wall Directory Watch. <30>[ 11.489949] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc). <30>[ 11.518897] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0... Expecting device dev-ttyS0.device - /dev/ttyS0... <30>[ 11.545787] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes. [ OK ] Reached target cryptsetup.…get - Local Encrypted Volumes. <30>[ 11.577832] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes. [ OK ] Reached target integrityse…Local Integrity Protected Volumes. <30>[ 11.609891] systemd[1]: Reached target paths.target - Path Units. [ OK ] Reached target paths.target - Path Units. <30>[ 11.637778] systemd[1]: Reached target remote-fs.target - Remote File Systems. [ OK ] Reached target remote-fs.target - Remote File Systems. <30>[ 11.665744] systemd[1]: Reached target slices.target - Slice Units. [ OK ] Reached target slices.target - Slice Units. <30>[ 11.693792] systemd[1]: Reached target swap.target - Swaps. [ OK ] Reached target swap.target - Swaps. <30>[ 11.721840] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes. [ OK ] Reached target veritysetup… - Local Verity Protected Volumes. <30>[ 11.754175] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe. [ OK ] Listening on systemd-initc… initctl Compatibility Named Pipe. <30>[ 11.789436] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket. [ OK ] Listening on systemd-journ…socket - Journal Audit Socket. <30>[ 11.820156] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log). [ OK ] Listening on systemd-journ…t - Journal Socket (/dev/log). <30>[ 11.854466] systemd[1]: Listening on systemd-journald.socket - Journal Socket. [ OK ] Listening on systemd-journald.socket - Journal Socket. <30>[ 11.887773] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket. [ OK ] Listening on systemd-netwo… - Network Service Netlink Socket. <30>[ 11.921287] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket. [ OK ] Listening on systemd-udevd….socket - udev Control Socket. <30>[ 11.954379] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket. [ OK ] Listening on systemd-udevd…l.socket - udev Kernel Socket. <30>[ 12.009959] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System... Mounting dev-hugepages.mount - Huge Pages File System... <30>[ 12.045114] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System... Mounting dev-mqueue.mount…POSIX Message Queue File System... <30>[ 12.078748] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System... Mounting sys-kernel-debug.… - Kernel Debug File System... <30>[ 12.110435] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing). <30>[ 12.158763] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes... Starting kmod-static-nodes…ate List of Static Device Nodes... <30>[ 12.196192] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs... Starting modprobe@configfs…m - Load Kernel Module configfs... <30>[ 12.231536] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod... Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod... <6>[ 12.276830] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com <30>[ 12.298817] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm... Starting modprobe@drm.service - Load Kernel Module drm... <30>[ 12.336790] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore... Starting modprobe@efi_psto…- Load Kernel Module efi_pstore... <30>[ 12.375613] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse... Starting modprobe@fuse.ser…e - Load Kernel Module fuse... <30>[ 12.416793] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop... Starting modprobe@loop.ser…e - Load Kernel Module loop... <6>[ 12.468484] fuse: init (API version 7.37) <30>[ 12.498986] systemd[1]: Starting systemd-journald.service - Journal Service... Starting systemd-journald.service - Journal Service... <30>[ 12.534490] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules... Starting systemd-modules-l…rvice - Load Kernel Modules... <30>[ 12.568034] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line... Starting systemd-network-g… units from Kernel command line... <30>[ 12.612704] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems... Starting systemd-remount-f…nt Root and Kernel File Systems... <30>[ 12.652586] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices... Starting systemd-udev-trig…[0m - Coldplug All udev Devices... <30>[ 12.688328] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System. [ OK ] Mounted dev-hugepages.mount - Huge Pages File System. <30>[ 12.718388] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System. [ OK ] Mounted dev-mqueue.mount[…- POSIX Message Queue <3>[ 12.736643] power_supply sbs-12-000b: driver failed to report `technology' property: -5 File System. <3>[ 12.752819] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <30>[ 12.763361] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System. <3>[ 12.770851] power_supply sbs-12-000b: driver failed to report `technology' property: -5 [ OK ] Mounted sys-kernel-debug.m…nt - Kernel Debug <3>[ 12.788135] power_supply sbs-12-000b: driver failed to report `technology' property: -5 File System. <3>[ 12.804802] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <30>[ 12.814236] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes. [ OK ] Finished kmod-static-nodes…reate <3>[ 12.831477] power_supply sbs-12-000b: driver failed to report `technology' property: -5 List of Static Device Nodes. <3>[ 12.847983] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <30>[ 12.859291] systemd[1]: modprobe@configfs.service: Deactivated successfully. <3>[ 12.863956] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <30>[ 12.867293] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs. [ OK ] Finished modprobe@configfs…[0m - Load Kernel Module configfs. <30>[ 12.906492] systemd[1]: Started systemd-journald.service - Journal Service. [ OK ] Started systemd-journald.service - Journal Service. [ OK ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod. [ OK ] Finished modprobe@drm.service - Load Kernel Module drm. [ OK ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore. [ OK ] Finished modprobe@fuse.service - Load Kernel Module fuse. [ OK ] Finished modprobe@loop.service - Load Kernel Module loop. [ OK ] Finished systemd-modules-l…service - Load Kernel Modules. [ OK ] Finished systemd-network-g…rk units from Kernel command line. [ OK ] Finished systemd-remount-f…ount Root and Kernel File Systems. [ OK ] Reached target network-pre…get - Preparation for Network. <4>[ 13.141992] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent <3>[ 13.159742] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5 <4>[ 13.174515] power_supply_show_property: 3 callbacks suppressed <3>[ 13.174529] power_supply sbs-12-000b: driver failed to report `technology' property: -5 Mountin<3>[ 13.208067] power_supply sbs-12-000b: driver failed to report `technology' property: -5 g sys-fs-fuse-conne… - FUSE Control File System... <3>[ 13.228156] power_supply sbs-12-000b: driver failed to report `technology' property: -5 Mounting sys-kernel-config…ernel Configuration File System..<3>[ 13.247683] power_supply sbs-12-000b: driver failed to report `technology' property: -5 . <3>[ 13.268859] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <3>[ 13.285003] power_supply sbs-12-000b: driver failed to report `technology' property: -5 Starting systemd-journal-f…h Journal to Persistent Storage..<3>[ 13.301822] power_supply sbs-12-000b: driver failed to report `technology' property: -5 . <3>[ 13.318342] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <3>[ 13.337258] power_supply sbs-12-000b: driver failed to report `technology' property: -5 <3>[ 13.358227] power_supply sbs-12-000b: driver failed to report `technology' property: -5 Starting systemd-random-se…ice - Load/Sa<46>[ 13.375006] systemd-journald[319]: Received client request to flush runtime journal. ve Random Seed... Starting systemd-sysctl.se…ce - Apply Kernel Variables... Starting systemd-sysusers.…rvice - Create System Users... [ OK ] Finished systemd-udev-trig…e - Coldplug All udev Devices. [ OK ] Mounted sys-fs-fuse-connec…nt - FUSE Control File System. [ OK ] Mounted sys-kernel-config.… Kernel Configuration File System. [ OK ] Finished systemd-random-se…rvice - Load/Save Random Seed. [ OK ] Finished systemd-sysctl.service - Apply Kernel Variables. [ OK ] Finished systemd-sysusers.service - Create System Users. Starting systemd-tmpfiles-…ate Static Device Nodes in /dev... [ OK ] Finished systemd-journal-f…ush Journal to Persistent Storage. [ OK ] Finished systemd-tmpfiles-…reate Static Device Nodes in /dev. [ OK ] Reached target local-fs-pr…reparation for Local File Systems. [ OK ] Reached target local-fs.target - Local File Systems. Starting systemd-tmpfiles-… Volatile Files and Directories... Starting systemd-udevd.ser…ger for Device Events and Files... [ OK ] Started systemd-udevd.serv…nager for Device Events and Files. Starting systemd-networkd.…ice - Network Configuration... [ OK ] Found device dev-ttyS0.device - /dev/ttyS0. [ OK ] Created slice system-syste…- Slice /system/systemd-backlight. [ OK ] Reached target bluetooth.target - Bluetooth Support. Starting systemd-backlight…ess of backlight:backlight_lcd0... [ OK ] Finished systemd-tmpfiles-…te Volatile Files and Directories. [ OK ] Listening on systemd-rfkil…l Switch Status /dev/rfkill Watch. Starting systemd-timesyncd… - Network Time Synchronization... Starting systemd-update-ut…rd System Boot/Shutdown in UTMP... Starting systemd-rfkill.se…Load/Save RF Kill Switch Status... [ OK ] Finished systemd-backlight…tness of backlight:backlight_lcd0. [ OK ] Started systemd-rfkill.ser…- Load/Save RF Kill Switch Status. [ OK ] Started systemd-networkd.service - Network Configuration. [ OK ] Reached target network.target - Network. Starting modprobe@dm_mod.s…[0m - Load Kernel Module dm_mod... Starting modprobe@efi_psto…- Load Kernel Module efi_pstore... Starting modprobe@loop.ser…e - Load Kernel Module loop... [ OK ] Finished modprobe@dm_mod.s…e - Load Kernel Module dm_mod. [ OK ] Finished modprobe@efi_psto…m - Load Kernel Module efi_pstore. [ OK ] Finished modprobe@loop.service - Load Kernel Module loop. [ OK ] Started systemd-timesyncd.…0m - Network Time Synchronization. [ OK ] Reached target time-set.target - System Time Set. [ OK ] Finished systemd-update-ut…cord System Boot/Shutdown in UTMP. [ OK ] Reached target sysinit.target - System Initialization. [ OK ] Started apt-daily.timer - Daily apt download activities. [ OK ] Started apt-daily-upgrade.… apt upgrade and clean activities. [ OK ] Started dpkg-db-backup.tim… Daily dpkg database backup timer. [ OK ] Started e2scrub_all.timer…etadata Check for All Filesystems. [ OK ] Started fstrim.timer - Discard unused blocks once a week. [ OK ] Started systemd-tmpfiles-c… Cleanup of Temporary Directories. [ OK ] Reached target timers.target - Timer Units. [ OK ] Listening on dbus.socket[…- D-Bus System Message Bus Socket. [ OK ] Reached target sockets.target - Socket Units. [ OK ] Reached target basic.target - Basic System. Starting alsa-restore.serv…- Save/Restore Sound Card State... Starting dbus.service - D-Bus System Message Bus... Starting e2scrub_reap.serv…e ext4 Metadata Check Snapshots... Starting systemd-logind.se…ice - User Login Management... Starting systemd-user-sess…vice - Permit User Sessions... [ OK ] Finished alsa-restore.serv…m - Save/Restore Sound Card State. [ OK ] Reached target sound.target - Sound Card. [ OK ] Finished systemd-user-sess…ervice - Permit User Sessions. [ OK ] Started dbus.service - D-Bus System Message Bus. [ OK ] Finished e2scrub_reap.serv…ine ext4 Metadata Check Snapshots. [ OK ] Started getty@tty1.service - Getty on tty1. [ OK ] Started serial-getty@ttyS0…rvice - Serial Getty on ttyS0. [ OK ] Reached target getty.target - Login Prompts. [ OK ] Started systemd-logind.service - User Login Management. [ OK ] Reached target multi-user.target - Multi-User System. [ OK ] Reached target graphical.target - Graphical Interface. Starting systemd-update-ut… Record Runlevel Change in UTMP... [ OK ] Finished systemd-update-ut… - Record Runlevel Change in UTMP. Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0 debian-bookworm-arm64 login: root (automatic login) Linux debian-bookworm-arm64 6.1.94-cip23 #1 SMP PREEMPT Fri Jun 21 00:04:56 UTC 2024 aarch64 The programs included with the Debian GNU/Linux system are free software; the exact distribution terms for each program are described in the individual files in /usr/share/doc/*/copyright. Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent permitted by applicable law. / # / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479169/extract-nfsrootfs-rq4f2012' export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14479169/extract-nfsrootfs-rq4f2012' / # export NFS_SERVER_IP='192.168.201.1' export NFS_SERVER_IP='192.168.201.1' / # # # / # export SHELL=/bin/bash export SHELL=/bin/bash / # . /lava-14479169/environment . /lava-14479169/environment / # /lava-14479169/bin/lava-test-runner /lava-14479169/0 /lava-14479169/bin/lava-test-runner /lava-14479169/0 + export TESTRUN_ID=0_timesync-off + TESTRUN_ID=0_timesync-off + cd /lava-14479169/0/tests/0_timesync-off ++ cat uuid + UUID=14479169_1.6.2.3.1 + set +x + systemctl stop systemd-timesyncd + set +x + export TESTRUN_ID=1_kselftest-alsa + TESTRUN_ID=1_kselftest-alsa + cd /lava-14479169/0/tests/1_kselftest-alsa ++ cat uuid + UUID=14479169_1.6.2.3.5 + set +x + cd ./automated/linux/kselftest/ + ./kselftest.sh -c alsa -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 INFO: install_deps skipped --2024-06-21 01:57:47-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.94-cip23/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected. HTTP request sent, awaiting response... 200 OK Length: 1642760 (1.6M) [application/octet-stream] Saving to: 'kselftest_armhf.tar.gz' kselftest_armhf.tar 0%[ ] 0 --.-KB/s kselftest_armhf.tar 2%[ ] 44.98K 174KB/s kselftest_armhf.tar 13%[=> ] 216.08K 419KB/s kselftest_armhf.tar 51%[=========> ] 826.96K 1008KB/s kselftest_armhf.tar 100%[===================>] 1.57M 1.65MB/s in 0.9s 2024-06-21 01:57:48 (1.65 MB/s) - 'kselftest_armhf.tar.gz' saved [1642760/1642760] skiplist: ======================================== ======================================== alsa:mixer-test ============== Tests to run =============== alsa:mixer-test ===========End Tests to run =============== shardfile-alsa pass <12>[ 26.983225] kselftest: Running tests in alsa TAP version 13 1..1 # selftests: alsa: mixer-test <6>[ 27.150297] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_adda_dmic_set(), kcontrol name MTKAIF_DMIC, mtkaif_dmic 0 <6>[ 27.162969] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_adda_dmic_set(), kcontrol name MTKAIF_DMIC, mtkaif_dmic 0 <6>[ 27.175739] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_adda_dmic_set(), kcontrol name MTKAIF_DMIC, mtkaif_dmic 1 <6>[ 27.188361] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_adda_dmic_set(), kcontrol name MTKAIF_DMIC, mtkaif_dmic 0 <6>[ 27.200822] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_adda_dmic_set(), kcontrol name MTKAIF_DMIC, mtkaif_dmic 0 <6>[ 27.213241] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S5_HD_Mux, hd_en 0 <6>[ 27.224801] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S5_HD_Mux, hd_en 0 <6>[ 27.236390] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S5_HD_Mux, hd_en 1 <6>[ 27.247991] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S5_HD_Mux, hd_en 0 <6>[ 27.259543] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S5_HD_Mux, hd_en 0 <6>[ 27.271041] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S3_HD_Mux, hd_en 0 <6>[ 27.282502] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S3_HD_Mux, hd_en 0 <6>[ 27.293889] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S3_HD_Mux, hd_en 1 <6>[ 27.305234] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S3_HD_Mux, hd_en 0 <6>[ 27.316576] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S3_HD_Mux, hd_en 0 <6>[ 27.327916] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S2_HD_Mux, hd_en 0 <6>[ 27.339247] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S2_HD_Mux, hd_en 0 <6>[ 27.350578] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S2_HD_Mux, hd_en 1 <6>[ 27.361938] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S2_HD_Mux, hd_en 0 <6>[ 27.373280] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S2_HD_Mux, hd_en 0 <6>[ 27.384623] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S1_HD_Mux, hd_en 0 <6>[ 27.395958] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S1_HD_Mux, hd_en 0 <6>[ 27.407286] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S1_HD_Mux, hd_en 1 <6>[ 27.418615] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S1_HD_Mux, hd_en 0 <6>[ 27.429952] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S1_HD_Mux, hd_en 0 <6>[ 27.441296] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S0_HD_Mux, hd_en 0 <6>[ 27.452627] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S0_HD_Mux, hd_en 0 <6>[ 27.463954] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S0_HD_Mux, hd_en 1 <6>[ 27.475282] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S0_HD_Mux, hd_en 0 <6>[ 27.486617] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mt8183_i2s_hd_set(), kcontrol name I2S0_HD_Mux, hd_en 0 # TAP version 13 # 1..658 # ok 1 get_value.0.93 # ok 2 name.0.93 # ok 3 write_default.0.93 # ok 4 write_valid.0.93 # ok 5 write_invalid.0.93 # ok 6 event_missing.0.93 # ok 7 event_spurious.0.93 # ok 8 get_value.0.92 # ok 9 name.0.92 # ok 10 write_default.0.92 # ok 11 write_valid.0.92 # ok 12 write_invalid.0.92 # ok 13 event_missing.0.92 # ok 14 event_spurious.0.92 # ok 15 get_value.0.91 # ok 16 name.0.91 # ok 17 write_default.0.91 # ok 18 write_valid.0.91 # ok 19 write_invalid.0.91 # ok 20 event_missing.0.91 # ok 21 event_spurious.0.91 # ok 22 get_value.0.90 # ok 23 name.0.90 # ok 24 write_default.0.90 # ok 25 write_valid.0.90 # ok 26 write_invalid.0.90 # ok 27 event_missing.0.90 # ok 28 event_spurious.0.90 # ok 29 get_value.0.89 # ok 30 name.0.89 # ok 31 write_default.0.89 # ok 32 write_valid.0.89 # ok 33 write_invalid.0.89 # ok 34 event_missing.0.89 # ok 35 event_spurious.0.89 # ok 36 get_value.0.88 # ok 37 name.0.88 # ok 38 write_default.0.88 # # Spurious event generated for AIF Out Mux # # AIF Out Mux.0 expected 1 but read 0, is_volatile 0 # # Spurious event generated for AIF Out Mux # not ok 39 write_valid.0.88 # ok 40 write_invalid.0.88 # ok 41 event_missing.0.88 # not ok 42 event_spurious.0.88 # ok 43 get_value.0.87 # ok 44 name.0.87 # ok 45 write_default.0.87 # ok 46 write_valid.0.87 # ok 47 write_invalid.0.87 # ok 48 event_missing.0.87 # ok 49 event_spurious.0.87 # ok 50 get_value.0.86 # ok 51 name.0.86 # ok 52 write_default.0.86 # # HPR Mux.0 expected 5 but read 0, is_volatile 0 # # HPR Mux.0 expected 6 but read 0, is_volatile 0 # # HPR Mux.0 expected 7 but read 0, is_volatile 0 # not ok 53 write_valid.0.86 # ok 54 write_invalid.0.86 # ok 55 event_missing.0.86 # ok 56 event_spurious.0.86 # ok 57 get_value.0.85 # ok 58 name.0.85 # ok 59 write_default.0.85 # # HPL Mux.0 expected 5 but read 0, is_volatile 0 # # HPL Mux.0 expected 6 but read 0, is_volatile 0 # # HPL Mux.0 expected 7 but read 0, is_volatile 0 # not ok 60 write_valid.0.85 # ok 61 write_invalid.0.85 # ok 62 event_missing.0.85 # ok 63 event_spurious.0.85 # ok 64 get_value.0.84 # ok 65 name.0.84 # ok 66 write_default.0.84 # ok 67 write_valid.0.84 # ok 68 write_invalid.0.84 # ok 69 event_missing.0.84 # ok 70 event_spurious.0.84 # ok 71 get_value.0.83 # ok 72 name.0.83 # ok 73 write_default.0.83 # ok 74 write_valid.0.83 # ok 75 write_invalid.0.83 # ok 76 event_missing.0.83 # ok 77 event_spurious.0.83 # ok 78 get_value.0.82 # ok 79 name.0.82 # # Headset Jack is not writeable # ok 80 # SKIP write_default.0.82 # # Headset Jack is not writeable # ok 81 # SKIP write_valid.0.82 # # Headset Jack is not writeable # ok 82 # SKIP write_invalid.0.82 # ok 83 event_missing.0.82 # ok 84 event_spurious.0.82 # ok 85 get_value.0.81 # ok 86 name.0.81 # ok 87 write_default.0.81 # # No event generated for Wake-on-Voice Phase2 Switch # # No event generated for Wake-on-Voice Phase2 Switch # ok 88 write_valid.0.81 # # Wake-on-Voice Phase2 Switch.0 Invalid boolean value 2 # # No event generated for Wake-on-Voice Phase2 Switch # not ok 89 write_invalid.0.81 # not ok 90 event_missing.0.81 # ok 91 event_spurious.0.81 # ok 92 get_value.0.80 # ok 93 name.0.80 # ok 94 write_default.0.80 # ok 95 write_valid.0.80 # ok 96 write_invalid.0.80 # ok 97 event_missing.0.80 # ok 98 event_spurious.0.80 # # Handset Volume.0 value -13 less than minimum 0 # not ok 99 get_value.0.79 # ok 100 name.0.79 # # snd_ctl_elem_write() failed: Invalid argument # not ok 101 write_default.0.79 # # snd_ctl_elem_write() failed: Invalid argument # not ok 102 write_valid.0.79 # # snd_ctl_elem_write() failed: Invalid argument # not ok 103 write_invalid.0.79 # ok 104 event_missing.0.79 # ok 105 event_spurious.0.79 # # Lineout Volume.0 value -13 less than minimum 0 # # Lineout Volume.1 value -13 less than minimum 0 # not ok 106 get_value.0.78 # ok 107 name.0.78 # # snd_ctl_elem_write() failed: Invalid argument # not ok 108 write_default.0.78 # # snd_ctl_elem_write() failed: Invalid argument # not ok 109 write_valid.0.78 # # snd_ctl_elem_write() failed: Invalid argument # not ok 110 write_invalid.0.78 # ok 111 event_missing.0.78 # ok 112 event_spurious.0.78 # # Headphone Volume.0 value -13 less than minimum 0 # # Headphone Volume.1 value -13 less than minimum 0 # not ok 113 get_value.0.77 # ok 114 name.0.77 # # snd_ctl_elem_write() failed: Invalid argument # not ok 115 write_default.0.77 # # snd_ctl_elem_write() failed: Invalid argument # not ok 116 write_valid.0.77 # # snd_ctl_elem_write() failed: Invalid argument # not ok 117 write_invalid.0.77 # ok 118 event_missing.0.77 # ok 119 event_spurious.0.77 # ok 120 get_value.0.76 # # 0.76 ADDA_DL_CH2 PCM_2_CAP_CH2 is a writeable boolean but not a Switch # not ok 121 name.0.76 # ok 122 write_default.0.76 # ok 123 write_valid.0.76 # ok 124 write_invalid.0.76 # ok 125 event_missing.0.76 # ok 126 event_spurious.0.76 # ok 127 get_value.0.75 # # 0.75 ADDA_DL_CH2 PCM_1_CAP_CH2 is a writeable boolean but not a Switch # not ok 128 name.0.75 # ok 129 write_default.0.75 # ok 130 write_valid.0.75 # ok 131 write_invalid.0.75 # ok 132 event_missing.0.75 # ok 133 event_spurious.0.75 # ok 134 get_value.0.74 # # 0.74 ADDA_DL_CH2 PCM_2_CAP_CH1 is a writeable boolean but not a Switch # not ok 135 name.0.74 # ok 136 write_default.0.74 # ok 137 write_valid.0.74 # ok 138 write_invalid.0.74 # ok 139 event_missing.0.74 # ok 140 event_spurious.0.74 # ok 141 get_value.0.73 # # 0.73 ADDA_DL_CH2 PCM_1_CAP_CH1 is a writeable boolean but not a Switch # not ok 142 name.0.73 # ok 143 write_default.0.73 # ok 144 write_valid.0.73 # ok 145 write_invalid.0.73 # ok 146 event_missing.0.73 # ok 147 event_spurious.0.73 # ok 148 get_value.0.72 # # 0.72 ADDA_DL_CH2 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 149 name.0.72 # ok 150 write_default.0.72 # ok 151 write_valid.0.72 # ok 152 write_invalid.0.72 # ok 153 event_missing.0.72 # ok 154 event_spurious.0.72 # ok 155 get_value.0.71 # # 0.71 ADDA_DL_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 156 name.0.71 # ok 157 write_default.0.71 # ok 158 write_valid.0.71 # ok 159 write_invalid.0.71 # ok 160 event_missing.0.71 # ok 161 event_spurious.0.71 # ok 162 get_value.0.70 # # 0.70 ADDA_DL_CH2 DL3_CH2 is a writeable boolean but not a Switch # not ok 163 name.0.70 # ok 164 write_default.0.70 # ok 165 write_valid.0.70 # ok 166 write_invalid.0.70 # ok 167 event_missing.0.70 # ok 168 event_spurious.0.70 # ok 169 get_value.0.69 # # 0.69 ADDA_DL_CH2 DL3_CH1 is a writeable boolean but not a Switch # not ok 170 name.0.69 # ok 171 write_default.0.69 # ok 172 write_valid.0.69 # ok 173 write_invalid.0.69 # ok 174 event_missing.0.69 # ok 175 event_spurious.0.69 # ok 176 get_value.0.68 # # 0.68 ADDA_DL_CH2 DL2_CH2 is a writeable boolean but not a Switch # not ok 177 name.0.68 # ok 178 write_default.0.68 # ok 179 write_valid.0.68 # ok 180 write_invalid.0.68 # ok 181 event_missing.0.68 # ok 182 event_spurious.0.68 # ok 183 get_value.0.67 # # 0.67 ADDA_DL_CH2 DL2_CH1 is a writeable boolean but not a Switch # not ok 184 name.0.67 # ok 185 write_default.0.67 # ok 186 write_valid.0.67 # ok 187 write_invalid.0.67 # ok 188 event_missing.0.67 # ok 189 event_spurious.0.67 # ok 190 get_value.0.66 # # 0.66 ADDA_DL_CH2 DL1_CH2 is a writeable boolean but not a Switch # not ok 191 name.0.66 # ok 192 write_default.0.66 # ok 193 write_valid.0.66 # ok 194 write_invalid.0.66 # ok 195 event_missing.0.66 # ok 196 event_spurious.0.66 # ok 197 get_value.0.65 # # 0.65 ADDA_DL_CH2 DL1_CH1 is a writeable boolean but not a Switch # not ok 198 name.0.65 # ok 199 write_default.0.65 # ok 200 write_valid.0.65 # ok 201 write_invalid.0.65 # ok 202 event_missing.0.65 # ok 203 event_spurious.0.65 # ok 204 get_value.0.64 # # 0.64 ADDA_DL_CH1 PCM_2_CAP_CH1 is a writeable boolean but not a Switch # not ok 205 name.0.64 # ok 206 write_default.0.64 # ok 207 write_valid.0.64 # ok 208 write_invalid.0.64 # ok 209 event_missing.0.64 # ok 210 event_spurious.0.64 # ok 211 get_value.0.63 # # 0.63 ADDA_DL_CH1 PCM_1_CAP_CH1 is a writeable boolean but not a Switch # not ok 212 name.0.63 # ok 213 write_default.0.63 # ok 214 write_valid.0.63 # ok 215 write_invalid.0.63 # ok 216 event_missing.0.63 # ok 217 event_spurious.0.63 # ok 218 get_value.0.62 # # 0.62 ADDA_DL_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 219 name.0.62 # ok 220 write_default.0.62 # ok 221 write_valid.0.62 # ok 222 write_invalid.0.62 # ok 223 event_missing.0.62 # ok 224 event_spurious.0.62 # ok 225 get_value.0.61 # # 0.61 ADDA_DL_CH1 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 226 name.0.61 # ok 227 write_default.0.61 # ok 228 write_valid.0.61 # ok 229 write_invalid.0.61 # ok 230 event_missing.0.61 # ok 231 event_spurious.0.61 # ok 232 get_value.0.60 # # 0.60 ADDA_DL_CH1 DL3_CH1 is a writeable boolean but not a Switch # not ok 233 name.0.60 # ok 234 write_default.0.60 # ok 235 write_valid.0.60 # ok 236 write_invalid.0.60 # ok 237 event_missing.0.60 # ok 238 event_spurious.0.60 # ok 239 get_value.0.59 # # 0.59 ADDA_DL_CH1 DL2_CH1 is a writeable boolean but not a Switch # not ok 240 name.0.59 # ok 241 write_default.0.59 # ok 242 write_valid.0.59 # ok 243 write_invalid.0.59 # ok 244 event_missing.0.59 # ok 245 event_spurious.0.59 # ok 246 get_value.0.58 # # 0.58 ADDA_DL_CH1 DL1_CH1 is a writeable boolean but not a Switch # not ok 247 name.0.58 # ok 248 write_default.0.58 # ok 249 write_valid.0.58 # ok 250 write_invalid.0.58 # ok 251 event_missing.0.58 # ok 252 event_spurious.0.58 # ok 253 get_value.0.57 # # 0.57 I2S5_CH2 DL3_CH2 is a writeable boolean but not a Switch # not ok 254 name.0.57 # ok 255 write_default.0.57 # ok 256 write_valid.0.57 # ok 257 write_invalid.0.57 # ok 258 event_missing.0.57 # ok 259 event_spurious.0.57 # ok 260 get_value.0.56 # # 0.56 I2S5_CH2 DL2_CH2 is a writeable boolean but not a Switch # not ok 261 name.0.56 # ok 262 write_default.0.56 # ok 263 write_valid.0.56 # ok 264 write_invalid.0.56 # ok 265 event_missing.0.56 # ok 266 event_spurious.0.56 # ok 267 get_value.0.55 # # 0.55 I2S5_CH2 DL1_CH2 is a writeable boolean but not a Switch # not ok 268 name.0.55 # ok 269 write_default.0.55 # ok 270 write_valid.0.55 # ok 271 write_invalid.0.55 # ok 272 event_missing.0.55 # ok 273 event_spurious.0.55 # ok 274 get_value.0.54 # # 0.54 I2S5_CH1 DL3_CH1 is a writeable boolean but not a Switch # not ok 275 name.0.54 # ok 276 write_default.0.54 # ok 277 write_valid.0.54 # ok 278 write_invalid.0.54 # ok 279 event_missing.0.54 # ok 280 event_spurious.0.54 # ok 281 get_value.0.53 # # 0.53 I2S5_CH1 DL2_CH1 is a writeable boolean but not a Switch # not ok 282 name.0.53 # ok 283 write_default.0.53 # ok 284 write_valid.0.53 # ok 285 write_invalid.0.53 # ok 286 event_missing.0.53 # ok 287 event_spurious.0.53 # ok 288 get_value.0.52 # # 0.52 I2S5_CH1 DL1_CH1 is a writeable boolean but not a Switch # not ok 289 name.0.52 # ok 290 write_default.0.52 # ok 291 write_valid.0.52 # ok 292 write_invalid.0.52 # ok 293 event_missing.0.52 # ok 294 event_spurious.0.52 # ok 295 get_value.0.51 # # 0.51 I2S3_CH2 DL3_CH2 is a writeable boolean but not a Switch # not ok 296 name.0.51 # ok 297 write_default.0.51 # ok 298 write_valid.0.51 # ok 299 write_invalid.0.51 # ok 300 event_missing.0.51 # ok 301 event_spurious.0.51 # ok 302 get_value.0.50 # # 0.50 I2S3_CH2 DL2_CH2 is a writeable boolean but not a Switch # not ok 303 name.0.50 # ok 304 write_default.0.50 # ok 305 write_valid.0.50 # ok 306 write_invalid.0.50 # ok 307 event_missing.0.50 # ok 308 event_spurious.0.50 # ok 309 get_value.0.49 # # 0.49 I2S3_CH2 DL1_CH2 is a writeable boolean but not a Switch # not ok 310 name.0.49 # ok 311 write_default.0.49 # ok 312 write_valid.0.49 # ok 313 write_invalid.0.49 # ok 314 event_missing.0.49 # ok 315 event_spurious.0.49 # ok 316 get_value.0.48 # # 0.48 I2S3_CH1 DL3_CH1 is a writeable boolean but not a Switch # not ok 317 name.0.48 # ok 318 write_default.0.48 # ok 319 write_valid.0.48 # ok 320 write_invalid.0.48 # ok 321 event_missing.0.48 # ok 322 event_spurious.0.48 # ok 323 get_value.0.47 # # 0.47 I2S3_CH1 DL2_CH1 is a writeable boolean but not a Switch # not ok 324 name.0.47 # ok 325 write_default.0.47 # ok 326 write_valid.0.47 # ok 327 write_invalid.0.47 # ok 328 event_missing.0.47 # ok 329 event_spurious.0.47 # ok 330 get_value.0.46 # # 0.46 I2S3_CH1 DL1_CH1 is a writeable boolean but not a Switch # not ok 331 name.0.46 # ok 332 write_default.0.46 # ok 333 write_valid.0.46 # ok 334 write_invalid.0.46 # ok 335 event_missing.0.46 # ok 336 event_spurious.0.46 # ok 337 get_value.0.45 # # 0.45 I2S1_CH2 DL3_CH2 is a writeable boolean but not a Switch # not ok 338 name.0.45 # ok 339 write_default.0.45 # ok 340 write_valid.0.45 # ok 341 write_invalid.0.45 # ok 342 event_missing.0.45 # ok 343 event_spurious.0.45 # ok 344 get_value.0.44 # # 0.44 I2S1_CH2 DL2_CH2 is a writeable boolean but not a Switch # not ok 345 name.0.44 # ok 346 write_default.0.44 # ok 347 write_valid.0.44 # ok 348 write_invalid.0.44 # ok 349 event_missing.0.44 # ok 350 event_spurious.0.44 # ok 351 get_value.0.43 # # 0.43 I2S1_CH2 DL1_CH2 is a writeable boolean but not a Switch # not ok 352 name.0.43 # ok 353 write_default.0.43 # ok 354 write_valid.0.43 # ok 355 write_invalid.0.43 # ok 356 event_missing.0.43 # ok 357 event_spurious.0.43 # ok 358 get_value.0.42 # # 0.42 I2S1_CH1 DL3_CH1 is a writeable boolean but not a Switch # not ok 359 name.0.42 # ok 360 write_default.0.42 # ok 361 write_valid.0.42 # ok 362 write_invalid.0.42 # ok 363 event_missing.0.42 # ok 364 event_spurious.0.42 # ok 365 get_value.0.41 # # 0.41 I2S1_CH1 DL2_CH1 is a writeable boolean but not a Switch # not ok 366 name.0.41 # ok 367 write_default.0.41 # ok 368 write_valid.0.41 # ok 369 write_invalid.0.41 # ok 370 event_missing.0.41 # ok 371 event_spurious.0.41 # ok 372 get_value.0.40 # # 0.40 I2S1_CH1 DL1_CH1 is a writeable boolean but not a Switch # not ok 373 name.0.40 # ok 374 write_default.0.40 # ok 375 write_valid.0.40 # ok 376 write_invalid.0.40 # ok 377 event_missing.0.40 # ok 378 event_spurious.0.40 # ok 379 get_value.0.39 # # 0.39 PCM_2_PB_CH4 DL1_CH1 is a writeable boolean but not a Switch # not ok 380 name.0.39 # ok 381 write_default.0.39 # ok 382 write_valid.0.39 # ok 383 write_invalid.0.39 # ok 384 event_missing.0.39 # ok 385 event_spurious.0.39 # ok 386 get_value.0.38 # # 0.38 PCM_2_PB_CH2 DL2_CH2 is a writeable boolean but not a Switch # not ok 387 name.0.38 # ok 388 write_default.0.38 # ok 389 write_valid.0.38 # ok 390 write_invalid.0.38 # ok 391 event_missing.0.38 # ok 392 event_spurious.0.38 # ok 393 get_value.0.37 # # 0.37 PCM_2_PB_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 394 name.0.37 # ok 395 write_default.0.37 # ok 396 write_valid.0.37 # ok 397 write_invalid.0.37 # ok 398 event_missing.0.37 # ok 399 event_spurious.0.37 # ok 400 get_value.0.36 # # 0.36 PCM_2_PB_CH1 DL2_CH1 is a writeable boolean but not a Switch # not ok 401 name.0.36 # ok 402 write_default.0.36 # ok 403 write_valid.0.36 # ok 404 write_invalid.0.36 # ok 405 event_missing.0.36 # ok 406 event_spurious.0.36 # ok 407 get_value.0.35 # # 0.35 PCM_2_PB_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 408 name.0.35 # ok 409 write_default.0.35 # ok 410 write_valid.0.35 # ok 411 write_invalid.0.35 # ok 412 event_missing.0.35 # ok 413 event_spurious.0.35 # ok 414 get_value.0.34 # # 0.34 PCM_1_PB_CH4 DL1_CH1 is a writeable boolean but not a Switch # not ok 415 name.0.34 # ok 416 write_default.0.34 # ok 417 write_valid.0.34 # ok 418 write_invalid.0.34 # ok 419 event_missing.0.34 # ok 420 event_spurious.0.34 # ok 421 get_value.0.33 # # 0.33 PCM_1_PB_CH2 DL2_CH2 is a writeable boolean but not a Switch # not ok 422 name.0.33 # ok 423 write_default.0.33 # ok 424 write_valid.0.33 # ok 425 write_invalid.0.33 # ok 426 event_missing.0.33 # ok 427 event_spurious.0.33 # ok 428 get_value.0.32 # # 0.32 PCM_1_PB_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 429 name.0.32 # ok 430 write_default.0.32 # ok 431 write_valid.0.32 # ok 432 write_invalid.0.32 # ok 433 event_missing.0.32 # ok 434 event_spurious.0.32 # ok 435 get_value.0.31 # # 0.31 PCM_1_PB_CH1 DL2_CH1 is a writeable boolean but not a Switch # not ok 436 name.0.31 # ok 437 write_default.0.31 # ok 438 write_valid.0.31 # ok 439 write_invalid.0.31 # ok 440 event_missing.0.31 # ok 441 event_spurious.0.31 # ok 442 get_value.0.30 # # 0.30 PCM_1_PB_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 443 name.0.30 # ok 444 write_default.0.30 # ok 445 write_valid.0.30 # ok 446 write_invalid.0.30 # ok 447 event_missing.0.30 # ok 448 event_spurious.0.30 # ok 449 get_value.0.29 # ok 450 name.0.29 # ok 451 write_default.0.29 # ok 452 write_valid.0.29 # ok 453 write_invalid.0.29 # ok 454 event_missing.0.29 # ok 455 event_spurious.0.29 # ok 456 get_value.0.28 # ok 457 name.0.28 # ok 458 write_default.0.28 # ok 459 write_valid.0.28 # ok 460 write_invalid.0.28 # ok 461 event_missing.0.28 # ok 462 event_spurious.0.28 # ok 463 get_value.0.27 # ok 464 name.0.27 # ok 465 write_default.0.27 # ok 466 write_valid.0.27 # ok 467 write_invalid.0.27 # ok 468 event_missing.0.27 # ok 469 event_spurious.0.27 # ok 470 get_value.0.26 # ok 471 name.0.26 # ok 472 write_default.0.26 # ok 473 write_valid.0.26 # ok 474 write_invalid.0.26 # ok 475 event_missing.0.26 # ok 476 event_spurious.0.26 # ok 477 get_value.0.25 # ok 478 name.0.25 # ok 479 write_default.0.25 # ok 480 write_valid.0.25 # ok 481 write_invalid.0.25 # ok 482 event_missing.0.25 # ok 483 event_spurious.0.25 # ok 484 get_value.0.24 # ok 485 name.0.24 # ok 486 write_default.0.24 # ok 487 write_valid.0.24 # ok 488 write_invalid.0.24 # ok 489 event_missing.0.24 # ok 490 event_spurious.0.24 # ok 491 get_value.0.23 # ok 492 name.0.23 # ok 493 write_default.0.23 # ok 494 write_valid.0.23 # ok 495 write_invalid.0.23 # ok 496 event_missing.0.23 # ok 497 event_spurious.0.23 # ok 498 get_value.0.22 # ok 499 name.0.22 # ok 500 write_default.0.22 # ok 501 write_valid.0.22 # ok 502 write_invalid.0.22 # ok 503 event_missing.0.22 # ok 504 event_spurious.0.22 # ok 505 get_value.0.21 # # 0.21 UL_MONO_1_CH1 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 506 name.0.21 # ok 507 write_default.0.21 # ok 508 write_valid.0.21 # ok 509 write_invalid.0.21 # ok 510 event_missing.0.21 # ok 511 event_spurious.0.21 # ok 512 get_value.0.20 # # 0.20 UL_MONO_1_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 513 name.0.20 # ok 514 write_default.0.20 # ok 515 write_valid.0.20 # ok 516 write_invalid.0.20 # ok 517 event_missing.0.20 # ok 518 event_spurious.0.20 # ok 519 get_value.0.19 # # 0.19 UL4_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 520 name.0.19 # ok 521 write_default.0.19 # ok 522 write_valid.0.19 # ok 523 write_invalid.0.19 # ok 524 event_missing.0.19 # ok 525 event_spurious.0.19 # ok 526 get_value.0.18 # # 0.18 UL4_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 527 name.0.18 # ok 528 write_default.0.18 # ok 529 write_valid.0.18 # ok 530 write_invalid.0.18 # ok 531 event_missing.0.18 # ok 532 event_spurious.0.18 # ok 533 get_value.0.17 # # 0.17 UL3_CH2 I2S2_CH2 is a writeable boolean but not a Switch # not ok 534 name.0.17 # ok 535 write_default.0.17 # ok 536 write_valid.0.17 # ok 537 write_invalid.0.17 # ok 538 event_missing.0.17 # ok 539 event_spurious.0.17 # ok 540 get_value.0.16 # # 0.16 UL3_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 541 name.0.16 # ok 542 write_default.0.16 # ok 543 write_valid.0.16 # ok 544 write_invalid.0.16 # ok 545 event_missing.0.16 # ok 546 event_spurious.0.16 # ok 547 get_value.0.15 # # 0.15 UL3_CH1 I2S2_CH1 is a writeable boolean but not a Switch # not ok 548 name.0.15 # ok 549 write_default.0.15 # ok 550 write_valid.0.15 # ok 551 write_invalid.0.15 # ok 552 event_missing.0.15 # ok 553 event_spurious.0.15 # ok 554 get_value.0.14 # # 0.14 UL3_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 555 name.0.14 # ok 556 write_default.0.14 # ok 557 write_valid.0.14 # ok 558 write_invalid.0.14 # ok 559 event_missing.0.14 # ok 560 event_spurious.0.14 # ok 561 get_value.0.13 # # 0.13 UL2_CH2 I2S2_CH2 is a writeable boolean but not a Switch # not ok 562 name.0.13 # ok 563 write_default.0.13 # ok 564 write_valid.0.13 # ok 565 write_invalid.0.13 # ok 566 event_missing.0.13 # ok 567 event_spurious.0.13 # ok 568 get_value.0.12 # # 0.12 UL2_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 569 name.0.12 # ok 570 write_default.0.12 # ok 571 write_valid.0.12 # ok 572 write_invalid.0.12 # ok 573 event_missing.0.12 # ok 574 event_spurious.0.12 # ok 575 get_value.0.11 # # 0.11 UL2_CH1 I2S2_CH1 is a writeable boolean but not a Switch # not ok 576 name.0.11 # ok 577 write_default.0.11 # ok 578 write_valid.0.11 # ok 579 write_invalid.0.11 # ok 580 event_missing.0.11 # ok 581 event_spurious.0.11 # ok 582 get_value.0.10 # # 0.10 UL2_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 583 name.0.10 # ok 584 write_default.0.10 # ok 585 write_valid.0.10 # ok 586 write_invalid.0.10 # ok 587 event_missing.0.10 # ok 588 event_spurious.0.10 # ok 589 get_value.0.9 # # 0.9 UL1_CH2 I2S0_CH2 is a writeable boolean but not a Switch # not ok 590 name.0.9 # ok 591 write_default.0.9 # ok 592 write_valid.0.9 # ok 593 write_invalid.0.9 # ok 594 event_missing.0.9 # ok 595 event_spurious.0.9 # ok 596 get_value.0.8 # # 0.8 UL1_CH2 ADDA_UL_CH2 is a writeable boolean but not a Switch # not ok 597 name.0.8 # ok 598 write_default.0.8 # ok 599 write_valid.0.8 # ok 600 write_invalid.0.8 # ok 601 event_missing.0.8 # ok 602 event_spurious.0.8 # ok 603 get_value.0.7 # # 0.7 UL1_CH1 I2S0_CH1 is a writeable boolean but not a Switch # not ok 604 name.0.7 # ok 605 write_default.0.7 # ok 606 write_valid.0.7 # ok 607 write_invalid.0.7 # ok 608 event_missing.0.7 # ok 609 event_spurious.0.7 # ok 610 get_value.0.6 # # 0.6 UL1_CH1 ADDA_UL_CH1 is a writeable boolean but not a Switch # not ok 611 name.0.6 # ok 612 write_default.0.6 # ok 613 write_valid.0.6 # ok 614 write_invalid.0.6 # ok 615 event_missing.0.6 # ok 616 event_spurious.0.6 # ok 617 get_value.0.5 # ok 618 name.0.5 # ok 619 write_default.0.5 # # No event generated for MTKAIF_DMIC # # No event generated for MTKAIF_DMIC # ok 620 write_valid.0.5 # ok 621 write_invalid.0.5 # not ok 622 event_missing.0.5 # ok 623 event_spurious.0.5 # ok 624 get_value.0.4 # ok 625 name.0.4 # ok 626 write_default.0.4 # # No event generated for I2S5_HD_Mux # # No event generated for I2S5_HD_Mux # ok 627 write_valid.0.4 # ok 628 write_invalid.0.4 # not ok 629 event_missing.0.4 # ok 630 event_spurious.0.4 # ok 631 get_value.0.3 # ok 632 name.0.3 # ok 633 write_default.0.3 # # No event generated for I2S3_HD_Mux # # No event generated for I2S3_HD_Mux # ok 634 write_valid.0.3 # ok 635 write_invalid.0.3 # not ok 636 event_missing.0.3 # ok 637 event_spurious.0.3 # ok 638 get_value.0.2 # ok 639 name.0.2 # ok 640 write_default.0.2 # # No event generated for I2S2_HD_Mux # # No event generated for I2S2_HD_Mux # ok 641 write_valid.0.2 # ok 642 write_invalid.0.2 # not ok 643 event_missing.0.2 # ok 644 event_spurious.0.2 # ok 645 get_value.0.1 # ok 646 name.0.1 # ok 647 write_default.0.1 # # No event generated for I2S1_HD_Mux # # No event generated for I2S1_HD_Mux # ok 648 write_valid.0.1 # ok 649 write_invalid.0.1 # not ok 650 event_missing.0.1 # ok 651 event_spurious.0.1 # ok 652 get_value.0.0 # ok 653 name.0.0 # ok 654 write_default.0.0 # # No event generated for I2S0_HD_Mux # # No event generated for I2S0_HD_Mux # ok 655 write_valid.0.0 # ok 656 write_invalid.0.0 # not ok 657 event_missing.0.0 # ok 658 event_spurious.0.0 # # Totals: pass:568 fail:87 xfail:0 xpass:0 skip:3 error:0 ok 1 selftests: alsa: mixer-test alsa_mixer-test_get_value_0_93 pass alsa_mixer-test_name_0_93 pass alsa_mixer-test_write_default_0_93 pass alsa_mixer-test_write_valid_0_93 pass alsa_mixer-test_write_invalid_0_93 pass alsa_mixer-test_event_missing_0_93 pass alsa_mixer-test_event_spurious_0_93 pass alsa_mixer-test_get_value_0_92 pass alsa_mixer-test_name_0_92 pass alsa_mixer-test_write_default_0_92 pass alsa_mixer-test_write_valid_0_92 pass alsa_mixer-test_write_invalid_0_92 pass alsa_mixer-test_event_missing_0_92 pass alsa_mixer-test_event_spurious_0_92 pass alsa_mixer-test_get_value_0_91 pass alsa_mixer-test_name_0_91 pass alsa_mixer-test_write_default_0_91 pass alsa_mixer-test_write_valid_0_91 pass alsa_mixer-test_write_invalid_0_91 pass alsa_mixer-test_event_missing_0_91 pass alsa_mixer-test_event_spurious_0_91 pass alsa_mixer-test_get_value_0_90 pass alsa_mixer-test_name_0_90 pass alsa_mixer-test_write_default_0_90 pass alsa_mixer-test_write_valid_0_90 pass alsa_mixer-test_write_invalid_0_90 pass alsa_mixer-test_event_missing_0_90 pass alsa_mixer-test_event_spurious_0_90 pass alsa_mixer-test_get_value_0_89 pass alsa_mixer-test_name_0_89 pass alsa_mixer-test_write_default_0_89 pass alsa_mixer-test_write_valid_0_89 pass alsa_mixer-test_write_invalid_0_89 pass alsa_mixer-test_event_missing_0_89 pass alsa_mixer-test_event_spurious_0_89 pass alsa_mixer-test_get_value_0_88 pass alsa_mixer-test_name_0_88 pass alsa_mixer-test_write_default_0_88 pass alsa_mixer-test_write_valid_0_88 fail alsa_mixer-test_write_invalid_0_88 pass alsa_mixer-test_event_missing_0_88 pass alsa_mixer-test_event_spurious_0_88 fail alsa_mixer-test_get_value_0_87 pass alsa_mixer-test_name_0_87 pass alsa_mixer-test_write_default_0_87 pass alsa_mixer-test_write_valid_0_87 pass alsa_mixer-test_write_invalid_0_87 pass alsa_mixer-test_event_missing_0_87 pass alsa_mixer-test_event_spurious_0_87 pass alsa_mixer-test_get_value_0_86 pass alsa_mixer-test_name_0_86 pass alsa_mixer-test_write_default_0_86 pass alsa_mixer-test_write_valid_0_86 fail alsa_mixer-test_write_invalid_0_86 pass alsa_mixer-test_event_missing_0_86 pass alsa_mixer-test_event_spurious_0_86 pass alsa_mixer-test_get_value_0_85 pass alsa_mixer-test_name_0_85 pass alsa_mixer-test_write_default_0_85 pass alsa_mixer-test_write_valid_0_85 fail alsa_mixer-test_write_invalid_0_85 pass alsa_mixer-test_event_missing_0_85 pass alsa_mixer-test_event_spurious_0_85 pass alsa_mixer-test_get_value_0_84 pass alsa_mixer-test_name_0_84 pass alsa_mixer-test_write_default_0_84 pass alsa_mixer-test_write_valid_0_84 pass alsa_mixer-test_write_invalid_0_84 pass alsa_mixer-test_event_missing_0_84 pass alsa_mixer-test_event_spurious_0_84 pass alsa_mixer-test_get_value_0_83 pass alsa_mixer-test_name_0_83 pass alsa_mixer-test_write_default_0_83 pass alsa_mixer-test_write_valid_0_83 pass alsa_mixer-test_write_invalid_0_83 pass alsa_mixer-test_event_missing_0_83 pass alsa_mixer-test_event_spurious_0_83 pass alsa_mixer-test_get_value_0_82 pass alsa_mixer-test_name_0_82 pass alsa_mixer-test_write_default_0_82 skip alsa_mixer-test_write_valid_0_82 skip alsa_mixer-test_write_invalid_0_82 skip alsa_mixer-test_event_missing_0_82 pass alsa_mixer-test_event_spurious_0_82 pass alsa_mixer-test_get_value_0_81 pass alsa_mixer-test_name_0_81 pass alsa_mixer-test_write_default_0_81 pass alsa_mixer-test_write_valid_0_81 pass alsa_mixer-test_write_invalid_0_81 fail alsa_mixer-test_event_missing_0_81 fail alsa_mixer-test_event_spurious_0_81 pass alsa_mixer-test_get_value_0_80 pass alsa_mixer-test_name_0_80 pass alsa_mixer-test_write_default_0_80 pass alsa_mixer-test_write_valid_0_80 pass alsa_mixer-test_write_invalid_0_80 pass alsa_mixer-test_event_missing_0_80 pass alsa_mixer-test_event_spurious_0_80 pass alsa_mixer-test_get_value_0_79 fail alsa_mixer-test_name_0_79 pass alsa_mixer-test_write_default_0_79 fail alsa_mixer-test_write_valid_0_79 fail alsa_mixer-test_write_invalid_0_79 fail alsa_mixer-test_event_missing_0_79 pass alsa_mixer-test_event_spurious_0_79 pass alsa_mixer-test_get_value_0_78 fail alsa_mixer-test_name_0_78 pass alsa_mixer-test_write_default_0_78 fail alsa_mixer-test_write_valid_0_78 fail alsa_mixer-test_write_invalid_0_78 fail alsa_mixer-test_event_missing_0_78 pass alsa_mixer-test_event_spurious_0_78 pass alsa_mixer-test_get_value_0_77 fail alsa_mixer-test_name_0_77 pass alsa_mixer-test_write_default_0_77 fail alsa_mixer-test_write_valid_0_77 fail alsa_mixer-test_write_invalid_0_77 fail alsa_mixer-test_event_missing_0_77 pass alsa_mixer-test_event_spurious_0_77 pass alsa_mixer-test_get_value_0_76 pass alsa_mixer-test_name_0_76 fail alsa_mixer-test_write_default_0_76 pass alsa_mixer-test_write_valid_0_76 pass alsa_mixer-test_write_invalid_0_76 pass alsa_mixer-test_event_missing_0_76 pass alsa_mixer-test_event_spurious_0_76 pass alsa_mixer-test_get_value_0_75 pass alsa_mixer-test_name_0_75 fail alsa_mixer-test_write_default_0_75 pass alsa_mixer-test_write_valid_0_75 pass alsa_mixer-test_write_invalid_0_75 pass alsa_mixer-test_event_missing_0_75 pass alsa_mixer-test_event_spurious_0_75 pass alsa_mixer-test_get_value_0_74 pass alsa_mixer-test_name_0_74 fail alsa_mixer-test_write_default_0_74 pass alsa_mixer-test_write_valid_0_74 pass alsa_mixer-test_write_invalid_0_74 pass alsa_mixer-test_event_missing_0_74 pass alsa_mixer-test_event_spurious_0_74 pass alsa_mixer-test_get_value_0_73 pass alsa_mixer-test_name_0_73 fail alsa_mixer-test_write_default_0_73 pass alsa_mixer-test_write_valid_0_73 pass alsa_mixer-test_write_invalid_0_73 pass alsa_mixer-test_event_missing_0_73 pass alsa_mixer-test_event_spurious_0_73 pass alsa_mixer-test_get_value_0_72 pass alsa_mixer-test_name_0_72 fail alsa_mixer-test_write_default_0_72 pass alsa_mixer-test_write_valid_0_72 pass alsa_mixer-test_write_invalid_0_72 pass alsa_mixer-test_event_missing_0_72 pass alsa_mixer-test_event_spurious_0_72 pass alsa_mixer-test_get_value_0_71 pass alsa_mixer-test_name_0_71 fail alsa_mixer-test_write_default_0_71 pass alsa_mixer-test_write_valid_0_71 pass alsa_mixer-test_write_invalid_0_71 pass alsa_mixer-test_event_missing_0_71 pass alsa_mixer-test_event_spurious_0_71 pass alsa_mixer-test_get_value_0_70 pass alsa_mixer-test_name_0_70 fail alsa_mixer-test_write_default_0_70 pass alsa_mixer-test_write_valid_0_70 pass alsa_mixer-test_write_invalid_0_70 pass alsa_mixer-test_event_missing_0_70 pass alsa_mixer-test_event_spurious_0_70 pass alsa_mixer-test_get_value_0_69 pass alsa_mixer-test_name_0_69 fail alsa_mixer-test_write_default_0_69 pass alsa_mixer-test_write_valid_0_69 pass alsa_mixer-test_write_invalid_0_69 pass alsa_mixer-test_event_missing_0_69 pass alsa_mixer-test_event_spurious_0_69 pass alsa_mixer-test_get_value_0_68 pass alsa_mixer-test_name_0_68 fail alsa_mixer-test_write_default_0_68 pass alsa_mixer-test_write_valid_0_68 pass alsa_mixer-test_write_invalid_0_68 pass alsa_mixer-test_event_missing_0_68 pass alsa_mixer-test_event_spurious_0_68 pass alsa_mixer-test_get_value_0_67 pass alsa_mixer-test_name_0_67 fail alsa_mixer-test_write_default_0_67 pass alsa_mixer-test_write_valid_0_67 pass alsa_mixer-test_write_invalid_0_67 pass alsa_mixer-test_event_missing_0_67 pass alsa_mixer-test_event_spurious_0_67 pass alsa_mixer-test_get_value_0_66 pass alsa_mixer-test_name_0_66 fail alsa_mixer-test_write_default_0_66 pass alsa_mixer-test_write_valid_0_66 pass alsa_mixer-test_write_invalid_0_66 pass alsa_mixer-test_event_missing_0_66 pass alsa_mixer-test_event_spurious_0_66 pass alsa_mixer-test_get_value_0_65 pass alsa_mixer-test_name_0_65 fail alsa_mixer-test_write_default_0_65 pass alsa_mixer-test_write_valid_0_65 pass alsa_mixer-test_write_invalid_0_65 pass alsa_mixer-test_event_missing_0_65 pass alsa_mixer-test_event_spurious_0_65 pass alsa_mixer-test_get_value_0_64 pass alsa_mixer-test_name_0_64 fail alsa_mixer-test_write_default_0_64 pass alsa_mixer-test_write_valid_0_64 pass alsa_mixer-test_write_invalid_0_64 pass alsa_mixer-test_event_missing_0_64 pass alsa_mixer-test_event_spurious_0_64 pass alsa_mixer-test_get_value_0_63 pass alsa_mixer-test_name_0_63 fail alsa_mixer-test_write_default_0_63 pass alsa_mixer-test_write_valid_0_63 pass alsa_mixer-test_write_invalid_0_63 pass alsa_mixer-test_event_missing_0_63 pass alsa_mixer-test_event_spurious_0_63 pass alsa_mixer-test_get_value_0_62 pass alsa_mixer-test_name_0_62 fail alsa_mixer-test_write_default_0_62 pass alsa_mixer-test_write_valid_0_62 pass alsa_mixer-test_write_invalid_0_62 pass alsa_mixer-test_event_missing_0_62 pass alsa_mixer-test_event_spurious_0_62 pass alsa_mixer-test_get_value_0_61 pass alsa_mixer-test_name_0_61 fail alsa_mixer-test_write_default_0_61 pass alsa_mixer-test_write_valid_0_61 pass alsa_mixer-test_write_invalid_0_61 pass alsa_mixer-test_event_missing_0_61 pass alsa_mixer-test_event_spurious_0_61 pass alsa_mixer-test_get_value_0_60 pass alsa_mixer-test_name_0_60 fail alsa_mixer-test_write_default_0_60 pass alsa_mixer-test_write_valid_0_60 pass alsa_mixer-test_write_invalid_0_60 pass alsa_mixer-test_event_missing_0_60 pass alsa_mixer-test_event_spurious_0_60 pass alsa_mixer-test_get_value_0_59 pass alsa_mixer-test_name_0_59 fail alsa_mixer-test_write_default_0_59 pass alsa_mixer-test_write_valid_0_59 pass alsa_mixer-test_write_invalid_0_59 pass alsa_mixer-test_event_missing_0_59 pass alsa_mixer-test_event_spurious_0_59 pass alsa_mixer-test_get_value_0_58 pass alsa_mixer-test_name_0_58 fail alsa_mixer-test_write_default_0_58 pass alsa_mixer-test_write_valid_0_58 pass alsa_mixer-test_write_invalid_0_58 pass alsa_mixer-test_event_missing_0_58 pass alsa_mixer-test_event_spurious_0_58 pass alsa_mixer-test_get_value_0_57 pass alsa_mixer-test_name_0_57 fail alsa_mixer-test_write_default_0_57 pass alsa_mixer-test_write_valid_0_57 pass alsa_mixer-test_write_invalid_0_57 pass alsa_mixer-test_event_missing_0_57 pass alsa_mixer-test_event_spurious_0_57 pass alsa_mixer-test_get_value_0_56 pass alsa_mixer-test_name_0_56 fail alsa_mixer-test_write_default_0_56 pass alsa_mixer-test_write_valid_0_56 pass alsa_mixer-test_write_invalid_0_56 pass alsa_mixer-test_event_missing_0_56 pass alsa_mixer-test_event_spurious_0_56 pass alsa_mixer-test_get_value_0_55 pass alsa_mixer-test_name_0_55 fail alsa_mixer-test_write_default_0_55 pass alsa_mixer-test_write_valid_0_55 pass alsa_mixer-test_write_invalid_0_55 pass alsa_mixer-test_event_missing_0_55 pass alsa_mixer-test_event_spurious_0_55 pass alsa_mixer-test_get_value_0_54 pass alsa_mixer-test_name_0_54 fail alsa_mixer-test_write_default_0_54 pass alsa_mixer-test_write_valid_0_54 pass alsa_mixer-test_write_invalid_0_54 pass alsa_mixer-test_event_missing_0_54 pass alsa_mixer-test_event_spurious_0_54 pass alsa_mixer-test_get_value_0_53 pass alsa_mixer-test_name_0_53 fail alsa_mixer-test_write_default_0_53 pass alsa_mixer-test_write_valid_0_53 pass alsa_mixer-test_write_invalid_0_53 pass alsa_mixer-test_event_missing_0_53 pass alsa_mixer-test_event_spurious_0_53 pass alsa_mixer-test_get_value_0_52 pass alsa_mixer-test_name_0_52 fail alsa_mixer-test_write_default_0_52 pass alsa_mixer-test_write_valid_0_52 pass alsa_mixer-test_write_invalid_0_52 pass alsa_mixer-test_event_missing_0_52 pass alsa_mixer-test_event_spurious_0_52 pass alsa_mixer-test_get_value_0_51 pass alsa_mixer-test_name_0_51 fail alsa_mixer-test_write_default_0_51 pass alsa_mixer-test_write_valid_0_51 pass alsa_mixer-test_write_invalid_0_51 pass alsa_mixer-test_event_missing_0_51 pass alsa_mixer-test_event_spurious_0_51 pass alsa_mixer-test_get_value_0_50 pass alsa_mixer-test_name_0_50 fail alsa_mixer-test_write_default_0_50 pass alsa_mixer-test_write_valid_0_50 pass alsa_mixer-test_write_invalid_0_50 pass alsa_mixer-test_event_missing_0_50 pass alsa_mixer-test_event_spurious_0_50 pass alsa_mixer-test_get_value_0_49 pass alsa_mixer-test_name_0_49 fail alsa_mixer-test_write_default_0_49 pass alsa_mixer-test_write_valid_0_49 pass alsa_mixer-test_write_invalid_0_49 pass alsa_mixer-test_event_missing_0_49 pass alsa_mixer-test_event_spurious_0_49 pass alsa_mixer-test_get_value_0_48 pass alsa_mixer-test_name_0_48 fail alsa_mixer-test_write_default_0_48 pass alsa_mixer-test_write_valid_0_48 pass alsa_mixer-test_write_invalid_0_48 pass alsa_mixer-test_event_missing_0_48 pass alsa_mixer-test_event_spurious_0_48 pass alsa_mixer-test_get_value_0_47 pass alsa_mixer-test_name_0_47 fail alsa_mixer-test_write_default_0_47 pass alsa_mixer-test_write_valid_0_47 pass alsa_mixer-test_write_invalid_0_47 pass alsa_mixer-test_event_missing_0_47 pass alsa_mixer-test_event_spurious_0_47 pass alsa_mixer-test_get_value_0_46 pass alsa_mixer-test_name_0_46 fail alsa_mixer-test_write_default_0_46 pass alsa_mixer-test_write_valid_0_46 pass alsa_mixer-test_write_invalid_0_46 pass alsa_mixer-test_event_missing_0_46 pass alsa_mixer-test_event_spurious_0_46 pass alsa_mixer-test_get_value_0_45 pass alsa_mixer-test_name_0_45 fail alsa_mixer-test_write_default_0_45 pass alsa_mixer-test_write_valid_0_45 pass alsa_mixer-test_write_invalid_0_45 pass alsa_mixer-test_event_missing_0_45 pass alsa_mixer-test_event_spurious_0_45 pass alsa_mixer-test_get_value_0_44 pass alsa_mixer-test_name_0_44 fail alsa_mixer-test_write_default_0_44 pass alsa_mixer-test_write_valid_0_44 pass alsa_mixer-test_write_invalid_0_44 pass alsa_mixer-test_event_missing_0_44 pass alsa_mixer-test_event_spurious_0_44 pass alsa_mixer-test_get_value_0_43 pass alsa_mixer-test_name_0_43 fail alsa_mixer-test_write_default_0_43 pass alsa_mixer-test_write_valid_0_43 pass alsa_mixer-test_write_invalid_0_43 pass alsa_mixer-test_event_missing_0_43 pass alsa_mixer-test_event_spurious_0_43 pass alsa_mixer-test_get_value_0_42 pass alsa_mixer-test_name_0_42 fail alsa_mixer-test_write_default_0_42 pass alsa_mixer-test_write_valid_0_42 pass alsa_mixer-test_write_invalid_0_42 pass alsa_mixer-test_event_missing_0_42 pass alsa_mixer-test_event_spurious_0_42 pass alsa_mixer-test_get_value_0_41 pass alsa_mixer-test_name_0_41 fail alsa_mixer-test_write_default_0_41 pass alsa_mixer-test_write_valid_0_41 pass alsa_mixer-test_write_invalid_0_41 pass alsa_mixer-test_event_missing_0_41 pass alsa_mixer-test_event_spurious_0_41 pass alsa_mixer-test_get_value_0_40 pass alsa_mixer-test_name_0_40 fail alsa_mixer-test_write_default_0_40 pass alsa_mixer-test_write_valid_0_40 pass alsa_mixer-test_write_invalid_0_40 pass alsa_mixer-test_event_missing_0_40 pass alsa_mixer-test_event_spurious_0_40 pass alsa_mixer-test_get_value_0_39 pass alsa_mixer-test_name_0_39 fail alsa_mixer-test_write_default_0_39 pass alsa_mixer-test_write_valid_0_39 pass alsa_mixer-test_write_invalid_0_39 pass alsa_mixer-test_event_missing_0_39 pass alsa_mixer-test_event_spurious_0_39 pass alsa_mixer-test_get_value_0_38 pass alsa_mixer-test_name_0_38 fail alsa_mixer-test_write_default_0_38 pass alsa_mixer-test_write_valid_0_38 pass alsa_mixer-test_write_invalid_0_38 pass alsa_mixer-test_event_missing_0_38 pass alsa_mixer-test_event_spurious_0_38 pass alsa_mixer-test_get_value_0_37 pass alsa_mixer-test_name_0_37 fail alsa_mixer-test_write_default_0_37 pass alsa_mixer-test_write_valid_0_37 pass alsa_mixer-test_write_invalid_0_37 pass alsa_mixer-test_event_missing_0_37 pass alsa_mixer-test_event_spurious_0_37 pass alsa_mixer-test_get_value_0_36 pass alsa_mixer-test_name_0_36 fail alsa_mixer-test_write_default_0_36 pass alsa_mixer-test_write_valid_0_36 pass alsa_mixer-test_write_invalid_0_36 pass alsa_mixer-test_event_missing_0_36 pass alsa_mixer-test_event_spurious_0_36 pass alsa_mixer-test_get_value_0_35 pass alsa_mixer-test_name_0_35 fail alsa_mixer-test_write_default_0_35 pass alsa_mixer-test_write_valid_0_35 pass alsa_mixer-test_write_invalid_0_35 pass alsa_mixer-test_event_missing_0_35 pass alsa_mixer-test_event_spurious_0_35 pass alsa_mixer-test_get_value_0_34 pass alsa_mixer-test_name_0_34 fail alsa_mixer-test_write_default_0_34 pass alsa_mixer-test_write_valid_0_34 pass alsa_mixer-test_write_invalid_0_34 pass alsa_mixer-test_event_missing_0_34 pass alsa_mixer-test_event_spurious_0_34 pass alsa_mixer-test_get_value_0_33 pass alsa_mixer-test_name_0_33 fail alsa_mixer-test_write_default_0_33 pass alsa_mixer-test_write_valid_0_33 pass alsa_mixer-test_write_invalid_0_33 pass alsa_mixer-test_event_missing_0_33 pass alsa_mixer-test_event_spurious_0_33 pass alsa_mixer-test_get_value_0_32 pass alsa_mixer-test_name_0_32 fail alsa_mixer-test_write_default_0_32 pass alsa_mixer-test_write_valid_0_32 pass alsa_mixer-test_write_invalid_0_32 pass alsa_mixer-test_event_missing_0_32 pass alsa_mixer-test_event_spurious_0_32 pass alsa_mixer-test_get_value_0_31 pass alsa_mixer-test_name_0_31 fail alsa_mixer-test_write_default_0_31 pass alsa_mixer-test_write_valid_0_31 pass alsa_mixer-test_write_invalid_0_31 pass alsa_mixer-test_event_missing_0_31 pass alsa_mixer-test_event_spurious_0_31 pass alsa_mixer-test_get_value_0_30 pass alsa_mixer-test_name_0_30 fail alsa_mixer-test_write_default_0_30 pass alsa_mixer-test_write_valid_0_30 pass alsa_mixer-test_write_invalid_0_30 pass alsa_mixer-test_event_missing_0_30 pass alsa_mixer-test_event_spurious_0_30 pass alsa_mixer-test_get_value_0_29 pass alsa_mixer-test_name_0_29 pass alsa_mixer-test_write_default_0_29 pass alsa_mixer-test_write_valid_0_29 pass alsa_mixer-test_write_invalid_0_29 pass alsa_mixer-test_event_missing_0_29 pass alsa_mixer-test_event_spurious_0_29 pass alsa_mixer-test_get_value_0_28 pass alsa_mixer-test_name_0_28 pass alsa_mixer-test_write_default_0_28 pass alsa_mixer-test_write_valid_0_28 pass alsa_mixer-test_write_invalid_0_28 pass alsa_mixer-test_event_missing_0_28 pass alsa_mixer-test_event_spurious_0_28 pass alsa_mixer-test_get_value_0_27 pass alsa_mixer-test_name_0_27 pass alsa_mixer-test_write_default_0_27 pass alsa_mixer-test_write_valid_0_27 pass alsa_mixer-test_write_invalid_0_27 pass alsa_mixer-test_event_missing_0_27 pass alsa_mixer-test_event_spurious_0_27 pass alsa_mixer-test_get_value_0_26 pass alsa_mixer-test_name_0_26 pass alsa_mixer-test_write_default_0_26 pass alsa_mixer-test_write_valid_0_26 pass alsa_mixer-test_write_invalid_0_26 pass alsa_mixer-test_event_missing_0_26 pass alsa_mixer-test_event_spurious_0_26 pass alsa_mixer-test_get_value_0_25 pass alsa_mixer-test_name_0_25 pass alsa_mixer-test_write_default_0_25 pass alsa_mixer-test_write_valid_0_25 pass alsa_mixer-test_write_invalid_0_25 pass alsa_mixer-test_event_missing_0_25 pass alsa_mixer-test_event_spurious_0_25 pass alsa_mixer-test_get_value_0_24 pass alsa_mixer-test_name_0_24 pass alsa_mixer-test_write_default_0_24 pass alsa_mixer-test_write_valid_0_24 pass alsa_mixer-test_write_invalid_0_24 pass alsa_mixer-test_event_missing_0_24 pass alsa_mixer-test_event_spurious_0_24 pass alsa_mixer-test_get_value_0_23 pass alsa_mixer-test_name_0_23 pass alsa_mixer-test_write_default_0_23 pass alsa_mixer-test_write_valid_0_23 pass alsa_mixer-test_write_invalid_0_23 pass alsa_mixer-test_event_missing_0_23 pass alsa_mixer-test_event_spurious_0_23 pass alsa_mixer-test_get_value_0_22 pass alsa_mixer-test_name_0_22 pass alsa_mixer-test_write_default_0_22 pass alsa_mixer-test_write_valid_0_22 pass alsa_mixer-test_write_invalid_0_22 pass alsa_mixer-test_event_missing_0_22 pass alsa_mixer-test_event_spurious_0_22 pass alsa_mixer-test_get_value_0_21 pass alsa_mixer-test_name_0_21 fail alsa_mixer-test_write_default_0_21 pass alsa_mixer-test_write_valid_0_21 pass alsa_mixer-test_write_invalid_0_21 pass alsa_mixer-test_event_missing_0_21 pass alsa_mixer-test_event_spurious_0_21 pass alsa_mixer-test_get_value_0_20 pass alsa_mixer-test_name_0_20 fail alsa_mixer-test_write_default_0_20 pass alsa_mixer-test_write_valid_0_20 pass alsa_mixer-test_write_invalid_0_20 pass alsa_mixer-test_event_missing_0_20 pass alsa_mixer-test_event_spurious_0_20 pass alsa_mixer-test_get_value_0_19 pass alsa_mixer-test_name_0_19 fail alsa_mixer-test_write_default_0_19 pass alsa_mixer-test_write_valid_0_19 pass alsa_mixer-test_write_invalid_0_19 pass alsa_mixer-test_event_missing_0_19 pass alsa_mixer-test_event_spurious_0_19 pass alsa_mixer-test_get_value_0_18 pass alsa_mixer-test_name_0_18 fail alsa_mixer-test_write_default_0_18 pass alsa_mixer-test_write_valid_0_18 pass alsa_mixer-test_write_invalid_0_18 pass alsa_mixer-test_event_missing_0_18 pass alsa_mixer-test_event_spurious_0_18 pass alsa_mixer-test_get_value_0_17 pass alsa_mixer-test_name_0_17 fail alsa_mixer-test_write_default_0_17 pass alsa_mixer-test_write_valid_0_17 pass alsa_mixer-test_write_invalid_0_17 pass alsa_mixer-test_event_missing_0_17 pass alsa_mixer-test_event_spurious_0_17 pass alsa_mixer-test_get_value_0_16 pass alsa_mixer-test_name_0_16 fail alsa_mixer-test_write_default_0_16 pass alsa_mixer-test_write_valid_0_16 pass alsa_mixer-test_write_invalid_0_16 pass alsa_mixer-test_event_missing_0_16 pass alsa_mixer-test_event_spurious_0_16 pass alsa_mixer-test_get_value_0_15 pass alsa_mixer-test_name_0_15 fail alsa_mixer-test_write_default_0_15 pass alsa_mixer-test_write_valid_0_15 pass alsa_mixer-test_write_invalid_0_15 pass alsa_mixer-test_event_missing_0_15 pass alsa_mixer-test_event_spurious_0_15 pass alsa_mixer-test_get_value_0_14 pass alsa_mixer-test_name_0_14 fail alsa_mixer-test_write_default_0_14 pass alsa_mixer-test_write_valid_0_14 pass alsa_mixer-test_write_invalid_0_14 pass alsa_mixer-test_event_missing_0_14 pass alsa_mixer-test_event_spurious_0_14 pass alsa_mixer-test_get_value_0_13 pass alsa_mixer-test_name_0_13 fail alsa_mixer-test_write_default_0_13 pass alsa_mixer-test_write_valid_0_13 pass alsa_mixer-test_write_invalid_0_13 pass alsa_mixer-test_event_missing_0_13 pass alsa_mixer-test_event_spurious_0_13 pass alsa_mixer-test_get_value_0_12 pass alsa_mixer-test_name_0_12 fail alsa_mixer-test_write_default_0_12 pass alsa_mixer-test_write_valid_0_12 pass alsa_mixer-test_write_invalid_0_12 pass alsa_mixer-test_event_missing_0_12 pass alsa_mixer-test_event_spurious_0_12 pass alsa_mixer-test_get_value_0_11 pass alsa_mixer-test_name_0_11 fail alsa_mixer-test_write_default_0_11 pass alsa_mixer-test_write_valid_0_11 pass alsa_mixer-test_write_invalid_0_11 pass alsa_mixer-test_event_missing_0_11 pass alsa_mixer-test_event_spurious_0_11 pass alsa_mixer-test_get_value_0_10 pass alsa_mixer-test_name_0_10 fail alsa_mixer-test_write_default_0_10 pass alsa_mixer-test_write_valid_0_10 pass alsa_mixer-test_write_invalid_0_10 pass alsa_mixer-test_event_missing_0_10 pass alsa_mixer-test_event_spurious_0_10 pass alsa_mixer-test_get_value_0_9 pass alsa_mixer-test_name_0_9 fail alsa_mixer-test_write_default_0_9 pass alsa_mixer-test_write_valid_0_9 pass alsa_mixer-test_write_invalid_0_9 pass alsa_mixer-test_event_missing_0_9 pass alsa_mixer-test_event_spurious_0_9 pass alsa_mixer-test_get_value_0_8 pass alsa_mixer-test_name_0_8 fail alsa_mixer-test_write_default_0_8 pass alsa_mixer-test_write_valid_0_8 pass alsa_mixer-test_write_invalid_0_8 pass alsa_mixer-test_event_missing_0_8 pass alsa_mixer-test_event_spurious_0_8 pass alsa_mixer-test_get_value_0_7 pass alsa_mixer-test_name_0_7 fail alsa_mixer-test_write_default_0_7 pass alsa_mixer-test_write_valid_0_7 pass alsa_mixer-test_write_invalid_0_7 pass alsa_mixer-test_event_missing_0_7 pass alsa_mixer-test_event_spurious_0_7 pass alsa_mixer-test_get_value_0_6 pass alsa_mixer-test_name_0_6 fail alsa_mixer-test_write_default_0_6 pass alsa_mixer-test_write_valid_0_6 pass alsa_mixer-test_write_invalid_0_6 pass alsa_mixer-test_event_missing_0_6 pass alsa_mixer-test_event_spurious_0_6 pass alsa_mixer-test_get_value_0_5 pass alsa_mixer-test_name_0_5 pass alsa_mixer-test_write_default_0_5 pass alsa_mixer-test_write_valid_0_5 pass alsa_mixer-test_write_invalid_0_5 pass alsa_mixer-test_event_missing_0_5 fail alsa_mixer-test_event_spurious_0_5 pass alsa_mixer-test_get_value_0_4 pass alsa_mixer-test_name_0_4 pass alsa_mixer-test_write_default_0_4 pass alsa_mixer-test_write_valid_0_4 pass alsa_mixer-test_write_invalid_0_4 pass alsa_mixer-test_event_missing_0_4 fail alsa_mixer-test_event_spurious_0_4 pass alsa_mixer-test_get_value_0_3 pass alsa_mixer-test_name_0_3 pass alsa_mixer-test_write_default_0_3 pass alsa_mixer-test_write_valid_0_3 pass alsa_mixer-test_write_invalid_0_3 pass alsa_mixer-test_event_missing_0_3 fail alsa_mixer-test_event_spurious_0_3 pass alsa_mixer-test_get_value_0_2 pass alsa_mixer-test_name_0_2 pass alsa_mixer-test_write_default_0_2 pass alsa_mixer-test_write_valid_0_2 pass alsa_mixer-test_write_invalid_0_2 pass alsa_mixer-test_event_missing_0_2 fail alsa_mixer-test_event_spurious_0_2 pass alsa_mixer-test_get_value_0_1 pass alsa_mixer-test_name_0_1 pass alsa_mixer-test_write_default_0_1 pass alsa_mixer-test_write_valid_0_1 pass alsa_mixer-test_write_invalid_0_1 pass alsa_mixer-test_event_missing_0_1 fail alsa_mixer-test_event_spurious_0_1 pass alsa_mixer-test_get_value_0_0 pass alsa_mixer-test_name_0_0 pass alsa_mixer-test_write_default_0_0 pass alsa_mixer-test_write_valid_0_0 pass alsa_mixer-test_write_invalid_0_0 pass alsa_mixer-test_event_missing_0_0 fail alsa_mixer-test_event_spurious_0_0 pass alsa_mixer-test pass + ../../utils/send-to-lava.sh ./output/result.txt <6>[ 38.071305] vaux18: disabling <6>[ 38.074861] vio28: disabling + set +x / #